From 024757d8131e5e5c8e474624f33c1f20ad8301cc Mon Sep 17 00:00:00 2001 From: heitbaum Date: Sat, 8 Jan 2022 23:03:45 +0000 Subject: [PATCH] linux (Allwinner): patches included in 5.16 --- ...edia-hevc-Add-scaling-matrix-control.patch | 180 ------------ ...s-hevc-Add-support-for-scaling-lists.patch | 151 ---------- ...cedrus-Don-t-kernel-map-most-buffers.patch | 266 ------------------ ...edrus-hevc-Improve-buffer-management.patch | 5 +- ...-check-for-H264-and-HEVC-limitations.patch | 98 ------- .../0040-a64-increase-mali-frequency.patch | 22 -- .../linux/0042-r40-hdmi-audio-wip.patch | 24 +- .../linux/0055-WIp-10-bit-HEVC-support.patch | 2 +- ...0i-de2-Adjust-printing-error-message.patch | 38 --- 9 files changed, 6 insertions(+), 780 deletions(-) delete mode 100644 projects/Allwinner/patches/linux/0015-media-hevc-Add-scaling-matrix-control.patch delete mode 100644 projects/Allwinner/patches/linux/0017-media-cedrus-hevc-Add-support-for-scaling-lists.patch delete mode 100644 projects/Allwinner/patches/linux/0018-media-cedrus-Don-t-kernel-map-most-buffers.patch delete mode 100644 projects/Allwinner/patches/linux/0023-media-cedrus-add-check-for-H264-and-HEVC-limitations.patch delete mode 100644 projects/Allwinner/patches/linux/0040-a64-increase-mali-frequency.patch delete mode 100644 projects/Allwinner/patches/linux/0059-bus-sun50i-de2-Adjust-printing-error-message.patch diff --git a/projects/Allwinner/patches/linux/0015-media-hevc-Add-scaling-matrix-control.patch b/projects/Allwinner/patches/linux/0015-media-hevc-Add-scaling-matrix-control.patch deleted file mode 100644 index 2264fc6b1b..0000000000 --- a/projects/Allwinner/patches/linux/0015-media-hevc-Add-scaling-matrix-control.patch +++ /dev/null @@ -1,180 +0,0 @@ -From 478e8d8b3997e15825c49f6f716faf26e1becaeb Mon Sep 17 00:00:00 2001 -From: Benjamin Gaignard -Date: Thu, 15 Jul 2021 17:12:22 +0200 -Subject: [PATCH] media: hevc: Add scaling matrix control - -HEVC scaling lists are used for the scaling process for transform -coefficients. -V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED has to set when they are -encoded in the bitstream. - -Signed-off-by: Benjamin Gaignard -Reviewed-by: Jernej Skrabec -Reviewed-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab ---- - .../media/v4l/ext-ctrls-codec.rst | 57 +++++++++++++++++++ - .../media/v4l/vidioc-queryctrl.rst | 6 ++ - drivers/media/v4l2-core/v4l2-ctrls-core.c | 6 ++ - drivers/media/v4l2-core/v4l2-ctrls-defs.c | 4 ++ - include/media/hevc-ctrls.h | 11 ++++ - 5 files changed, 84 insertions(+) - ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -3071,6 +3071,63 @@ enum v4l2_mpeg_video_hevc_size_of_length - - \normalsize - -+``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (struct)`` -+ Specifies the HEVC scaling matrix parameters used for the scaling process -+ for transform coefficients. -+ These matrix and parameters are defined according to :ref:`hevc`. -+ They are described in section 7.4.5 "Scaling list data semantics" of -+ the specification. -+ -+.. c:type:: v4l2_ctrl_hevc_scaling_matrix -+ -+.. raw:: latex -+ -+ \scriptsize -+ -+.. tabularcolumns:: |p{5.4cm}|p{6.8cm}|p{5.1cm}| -+ -+.. cssclass:: longtable -+ -+.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``scaling_list_4x4[6][16]`` -+ - Scaling list is used for the scaling process for transform -+ coefficients. The values on each scaling list are expected -+ in raster scan order. -+ * - __u8 -+ - ``scaling_list_8x8[6][64]`` -+ - Scaling list is used for the scaling process for transform -+ coefficients. The values on each scaling list are expected -+ in raster scan order. -+ * - __u8 -+ - ``scaling_list_16x16[6][64]`` -+ - Scaling list is used for the scaling process for transform -+ coefficients. The values on each scaling list are expected -+ in raster scan order. -+ * - __u8 -+ - ``scaling_list_32x32[2][64]`` -+ - Scaling list is used for the scaling process for transform -+ coefficients. The values on each scaling list are expected -+ in raster scan order. -+ * - __u8 -+ - ``scaling_list_dc_coef_16x16[6]`` -+ - Scaling list is used for the scaling process for transform -+ coefficients. The values on each scaling list are expected -+ in raster scan order. -+ * - __u8 -+ - ``scaling_list_dc_coef_32x32[2]`` -+ - Scaling list is used for the scaling process for transform -+ coefficients. The values on each scaling list are expected -+ in raster scan order. -+ -+.. raw:: latex -+ -+ \normalsize -+ - .. c:type:: v4l2_hevc_dpb_entry - - .. raw:: latex ---- a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst -+++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst -@@ -495,6 +495,12 @@ See also the examples in :ref:`control`. - - n/a - - A struct :c:type:`v4l2_ctrl_hevc_slice_params`, containing HEVC - slice parameters for stateless video decoders. -+ * - ``V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX`` -+ - n/a -+ - n/a -+ - n/a -+ - A struct :c:type:`v4l2_ctrl_hevc_scaling_matrix`, containing HEVC -+ scaling matrix for stateless video decoders. - * - ``V4L2_CTRL_TYPE_VP8_FRAME`` - - n/a - - n/a ---- a/drivers/media/v4l2-core/v4l2-ctrls-core.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c -@@ -687,6 +687,9 @@ static int std_validate_compound(const s - - break; - -+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX: -+ break; -+ - case V4L2_CTRL_TYPE_AREA: - area = p; - if (!area->width || !area->height) -@@ -1240,6 +1243,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s - case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS: - elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params); - break; -+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX: -+ elem_size = sizeof(struct v4l2_ctrl_hevc_scaling_matrix); -+ break; - case V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS: - elem_size = sizeof(struct v4l2_ctrl_hevc_decode_params); - break; ---- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c -@@ -996,6 +996,7 @@ const char *v4l2_ctrl_get_name(u32 id) - case V4L2_CID_MPEG_VIDEO_HEVC_SPS: return "HEVC Sequence Parameter Set"; - case V4L2_CID_MPEG_VIDEO_HEVC_PPS: return "HEVC Picture Parameter Set"; - case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: return "HEVC Slice Parameters"; -+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX: return "HEVC Scaling Matrix"; - case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS: return "HEVC Decode Parameters"; - case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode"; - case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code"; -@@ -1488,6 +1489,9 @@ void v4l2_ctrl_fill(u32 id, const char * - case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: - *type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS; - break; -+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX: -+ *type = V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX; -+ break; - case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS: - *type = V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS; - break; ---- a/include/media/hevc-ctrls.h -+++ b/include/media/hevc-ctrls.h -@@ -19,6 +19,7 @@ - #define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_CODEC_BASE + 1008) - #define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_CODEC_BASE + 1009) - #define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_CODEC_BASE + 1010) -+#define V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (V4L2_CID_CODEC_BASE + 1011) - #define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS (V4L2_CID_CODEC_BASE + 1012) - #define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_CODEC_BASE + 1015) - #define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_CODEC_BASE + 1016) -@@ -27,6 +28,7 @@ - #define V4L2_CTRL_TYPE_HEVC_SPS 0x0120 - #define V4L2_CTRL_TYPE_HEVC_PPS 0x0121 - #define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122 -+#define V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX 0x0123 - #define V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS 0x0124 - - enum v4l2_mpeg_video_hevc_decode_mode { -@@ -225,6 +227,15 @@ struct v4l2_ctrl_hevc_decode_params { - __u64 flags; - }; - -+struct v4l2_ctrl_hevc_scaling_matrix { -+ __u8 scaling_list_4x4[6][16]; -+ __u8 scaling_list_8x8[6][64]; -+ __u8 scaling_list_16x16[6][64]; -+ __u8 scaling_list_32x32[2][64]; -+ __u8 scaling_list_dc_coef_16x16[6]; -+ __u8 scaling_list_dc_coef_32x32[2]; -+}; -+ - /* MPEG-class control IDs specific to the Hantro driver as defined by V4L2 */ - #define V4L2_CID_CODEC_HANTRO_BASE (V4L2_CTRL_CLASS_CODEC | 0x1200) - /* diff --git a/projects/Allwinner/patches/linux/0017-media-cedrus-hevc-Add-support-for-scaling-lists.patch b/projects/Allwinner/patches/linux/0017-media-cedrus-hevc-Add-support-for-scaling-lists.patch deleted file mode 100644 index bf9d2c6248..0000000000 --- a/projects/Allwinner/patches/linux/0017-media-cedrus-hevc-Add-support-for-scaling-lists.patch +++ /dev/null @@ -1,151 +0,0 @@ -From 297289d611b802ecd232df6cab02987f9059c3bc Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 6 Jun 2021 08:50:50 +0200 -Subject: [PATCH] media: cedrus: hevc: Add support for scaling lists - -HEVC frames may use scaling list feature. Add support for it. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/staging/media/sunxi/cedrus/cedrus.c | 6 ++ - drivers/staging/media/sunxi/cedrus/cedrus.h | 1 + - .../staging/media/sunxi/cedrus/cedrus_dec.c | 2 + - .../staging/media/sunxi/cedrus/cedrus_h265.c | 70 ++++++++++++++++++- - .../staging/media/sunxi/cedrus/cedrus_regs.h | 2 + - 5 files changed, 80 insertions(+), 1 deletion(-) - ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -137,6 +137,12 @@ static const struct cedrus_control cedru - }, - { - .cfg = { -+ .id = V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX, -+ }, -+ .codec = CEDRUS_CODEC_H265, -+ }, -+ { -+ .cfg = { - .id = V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE, - .max = V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED, - .def = V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED, ---- a/drivers/staging/media/sunxi/cedrus/cedrus.h -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h -@@ -78,6 +78,7 @@ struct cedrus_h265_run { - const struct v4l2_ctrl_hevc_pps *pps; - const struct v4l2_ctrl_hevc_slice_params *slice_params; - const struct v4l2_ctrl_hevc_decode_params *decode_params; -+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; - }; - - struct cedrus_vp8_run { ---- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c -@@ -72,6 +72,8 @@ void cedrus_device_run(void *priv) - V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS); - run.h265.decode_params = cedrus_find_control_data(ctx, - V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS); -+ run.h265.scaling_matrix = cedrus_find_control_data(ctx, -+ V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX); - break; - - case V4L2_PIX_FMT_VP8_FRAME: ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c -@@ -238,6 +238,69 @@ static void cedrus_h265_skip_bits(struct - } - } - -+static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx, -+ struct cedrus_run *run) -+{ -+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling; -+ struct cedrus_dev *dev = ctx->dev; -+ u32 i, j, k, val; -+ -+ scaling = run->h265.scaling_matrix; -+ -+ cedrus_write(dev, VE_DEC_H265_SCALING_LIST_DC_COEF0, -+ (scaling->scaling_list_dc_coef_32x32[1] << 24) | -+ (scaling->scaling_list_dc_coef_32x32[0] << 16) | -+ (scaling->scaling_list_dc_coef_16x16[1] << 8) | -+ (scaling->scaling_list_dc_coef_16x16[0] << 0)); -+ -+ cedrus_write(dev, VE_DEC_H265_SCALING_LIST_DC_COEF1, -+ (scaling->scaling_list_dc_coef_16x16[5] << 24) | -+ (scaling->scaling_list_dc_coef_16x16[4] << 16) | -+ (scaling->scaling_list_dc_coef_16x16[3] << 8) | -+ (scaling->scaling_list_dc_coef_16x16[2] << 0)); -+ -+ cedrus_h265_sram_write_offset(dev, VE_DEC_H265_SRAM_OFFSET_SCALING_LISTS); -+ -+ for (i = 0; i < 6; i++) -+ for (j = 0; j < 8; j++) -+ for (k = 0; k < 8; k += 4) { -+ val = ((u32)scaling->scaling_list_8x8[i][j + (k + 3) * 8] << 24) | -+ ((u32)scaling->scaling_list_8x8[i][j + (k + 2) * 8] << 16) | -+ ((u32)scaling->scaling_list_8x8[i][j + (k + 1) * 8] << 8) | -+ scaling->scaling_list_8x8[i][j + k * 8]; -+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val); -+ } -+ -+ for (i = 0; i < 2; i++) -+ for (j = 0; j < 8; j++) -+ for (k = 0; k < 8; k += 4) { -+ val = ((u32)scaling->scaling_list_32x32[i][j + (k + 3) * 8] << 24) | -+ ((u32)scaling->scaling_list_32x32[i][j + (k + 2) * 8] << 16) | -+ ((u32)scaling->scaling_list_32x32[i][j + (k + 1) * 8] << 8) | -+ scaling->scaling_list_32x32[i][j + k * 8]; -+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val); -+ } -+ -+ for (i = 0; i < 6; i++) -+ for (j = 0; j < 8; j++) -+ for (k = 0; k < 8; k += 4) { -+ val = ((u32)scaling->scaling_list_16x16[i][j + (k + 3) * 8] << 24) | -+ ((u32)scaling->scaling_list_16x16[i][j + (k + 2) * 8] << 16) | -+ ((u32)scaling->scaling_list_16x16[i][j + (k + 1) * 8] << 8) | -+ scaling->scaling_list_16x16[i][j + k * 8]; -+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val); -+ } -+ -+ for (i = 0; i < 6; i++) -+ for (j = 0; j < 4; j++) { -+ val = ((u32)scaling->scaling_list_4x4[i][j + 12] << 24) | -+ ((u32)scaling->scaling_list_4x4[i][j + 8] << 16) | -+ ((u32)scaling->scaling_list_4x4[i][j + 4] << 8) | -+ scaling->scaling_list_4x4[i][j]; -+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val); -+ } -+} -+ - static void cedrus_h265_setup(struct cedrus_ctx *ctx, - struct cedrus_run *run) - { -@@ -527,7 +590,12 @@ static void cedrus_h265_setup(struct ced - - /* Scaling list. */ - -- reg = VE_DEC_H265_SCALING_LIST_CTRL0_DEFAULT; -+ if (sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED) { -+ cedrus_h265_write_scaling_list(ctx, run); -+ reg = VE_DEC_H265_SCALING_LIST_CTRL0_FLAG_ENABLED; -+ } else { -+ reg = VE_DEC_H265_SCALING_LIST_CTRL0_DEFAULT; -+ } - cedrus_write(dev, VE_DEC_H265_SCALING_LIST_CTRL0, reg); - - /* Neightbor information address. */ ---- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h -@@ -494,6 +494,8 @@ - #define VE_DEC_H265_ENTRY_POINT_OFFSET_ADDR (VE_ENGINE_DEC_H265 + 0x64) - #define VE_DEC_H265_TILE_START_CTB (VE_ENGINE_DEC_H265 + 0x68) - #define VE_DEC_H265_TILE_END_CTB (VE_ENGINE_DEC_H265 + 0x6c) -+#define VE_DEC_H265_SCALING_LIST_DC_COEF0 (VE_ENGINE_DEC_H265 + 0x78) -+#define VE_DEC_H265_SCALING_LIST_DC_COEF1 (VE_ENGINE_DEC_H265 + 0x7c) - - #define VE_DEC_H265_LOW_ADDR (VE_ENGINE_DEC_H265 + 0x80) - diff --git a/projects/Allwinner/patches/linux/0018-media-cedrus-Don-t-kernel-map-most-buffers.patch b/projects/Allwinner/patches/linux/0018-media-cedrus-Don-t-kernel-map-most-buffers.patch deleted file mode 100644 index 32ae28f21e..0000000000 --- a/projects/Allwinner/patches/linux/0018-media-cedrus-Don-t-kernel-map-most-buffers.patch +++ /dev/null @@ -1,266 +0,0 @@ -From 6ed03518966d47be39ed628b6b8f228b6ea9a908 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 12 Sep 2021 07:46:51 +0200 -Subject: [PATCH] media: cedrus: Don't kernel map most buffers - -Except VP8 probability coefficients buffer, all other buffers are never -accessed by CPU. That allows us to mark them with DMA_ATTR_NO_KERNEL_MAPPING -flag. This helps with decoding big (like 4k) videos on 32-bit ARM -platforms where default vmalloc size is relatively small - 240 MiB. -Since auxiliary buffer are not yet efficiently allocated, this can be -easily exceeded. Even if allocation is optimized, 4k videos will still -often exceed this limit. - -Signed-off-by: Jernej Skrabec ---- - .../staging/media/sunxi/cedrus/cedrus_h264.c | 102 ++++++++++-------- - .../staging/media/sunxi/cedrus/cedrus_h265.c | 28 ++--- - .../staging/media/sunxi/cedrus/cedrus_video.c | 2 + - 3 files changed, 73 insertions(+), 59 deletions(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index de7442d4834d..6e38b37d9fe1 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -538,23 +538,23 @@ static int cedrus_h264_start(struct cedrus_ctx *ctx) - - ctx->codec.h264.pic_info_buf_size = pic_info_size; - ctx->codec.h264.pic_info_buf = -- dma_alloc_coherent(dev->dev, ctx->codec.h264.pic_info_buf_size, -- &ctx->codec.h264.pic_info_buf_dma, -- GFP_KERNEL); -+ dma_alloc_attrs(dev->dev, ctx->codec.h264.pic_info_buf_size, -+ &ctx->codec.h264.pic_info_buf_dma, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h264.pic_info_buf) - return -ENOMEM; - - /* - * That buffer is supposed to be 16kiB in size, and be aligned -- * on 16kiB as well. However, dma_alloc_coherent provides the -+ * on 16kiB as well. However, dma_alloc_attrs provides the - * guarantee that we'll have a CPU and DMA address aligned on - * the smallest page order that is greater to the requested - * size, so we don't have to overallocate. - */ - ctx->codec.h264.neighbor_info_buf = -- dma_alloc_coherent(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, -- &ctx->codec.h264.neighbor_info_buf_dma, -- GFP_KERNEL); -+ dma_alloc_attrs(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, -+ &ctx->codec.h264.neighbor_info_buf_dma, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h264.neighbor_info_buf) { - ret = -ENOMEM; - goto err_pic_buf; -@@ -582,10 +582,11 @@ static int cedrus_h264_start(struct cedrus_ctx *ctx) - - mv_col_size = field_size * 2 * CEDRUS_H264_FRAME_NUM; - ctx->codec.h264.mv_col_buf_size = mv_col_size; -- ctx->codec.h264.mv_col_buf = dma_alloc_coherent(dev->dev, -- ctx->codec.h264.mv_col_buf_size, -- &ctx->codec.h264.mv_col_buf_dma, -- GFP_KERNEL); -+ ctx->codec.h264.mv_col_buf = -+ dma_alloc_attrs(dev->dev, -+ ctx->codec.h264.mv_col_buf_size, -+ &ctx->codec.h264.mv_col_buf_dma, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h264.mv_col_buf) { - ret = -ENOMEM; - goto err_neighbor_buf; -@@ -600,10 +601,10 @@ static int cedrus_h264_start(struct cedrus_ctx *ctx) - ctx->codec.h264.deblk_buf_size = - ALIGN(ctx->src_fmt.width, 32) * 12; - ctx->codec.h264.deblk_buf = -- dma_alloc_coherent(dev->dev, -- ctx->codec.h264.deblk_buf_size, -- &ctx->codec.h264.deblk_buf_dma, -- GFP_KERNEL); -+ dma_alloc_attrs(dev->dev, -+ ctx->codec.h264.deblk_buf_size, -+ &ctx->codec.h264.deblk_buf_dma, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h264.deblk_buf) { - ret = -ENOMEM; - goto err_mv_col_buf; -@@ -616,10 +617,10 @@ static int cedrus_h264_start(struct cedrus_ctx *ctx) - ctx->codec.h264.intra_pred_buf_size = - ALIGN(ctx->src_fmt.width, 64) * 5 * 2; - ctx->codec.h264.intra_pred_buf = -- dma_alloc_coherent(dev->dev, -- ctx->codec.h264.intra_pred_buf_size, -- &ctx->codec.h264.intra_pred_buf_dma, -- GFP_KERNEL); -+ dma_alloc_attrs(dev->dev, -+ ctx->codec.h264.intra_pred_buf_size, -+ &ctx->codec.h264.intra_pred_buf_dma, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h264.intra_pred_buf) { - ret = -ENOMEM; - goto err_deblk_buf; -@@ -629,24 +630,28 @@ static int cedrus_h264_start(struct cedrus_ctx *ctx) - return 0; - - err_deblk_buf: -- dma_free_coherent(dev->dev, ctx->codec.h264.deblk_buf_size, -- ctx->codec.h264.deblk_buf, -- ctx->codec.h264.deblk_buf_dma); -+ dma_free_attrs(dev->dev, ctx->codec.h264.deblk_buf_size, -+ ctx->codec.h264.deblk_buf, -+ ctx->codec.h264.deblk_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - - err_mv_col_buf: -- dma_free_coherent(dev->dev, ctx->codec.h264.mv_col_buf_size, -- ctx->codec.h264.mv_col_buf, -- ctx->codec.h264.mv_col_buf_dma); -+ dma_free_attrs(dev->dev, ctx->codec.h264.mv_col_buf_size, -+ ctx->codec.h264.mv_col_buf, -+ ctx->codec.h264.mv_col_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - - err_neighbor_buf: -- dma_free_coherent(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, -- ctx->codec.h264.neighbor_info_buf, -- ctx->codec.h264.neighbor_info_buf_dma); -+ dma_free_attrs(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, -+ ctx->codec.h264.neighbor_info_buf, -+ ctx->codec.h264.neighbor_info_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - - err_pic_buf: -- dma_free_coherent(dev->dev, ctx->codec.h264.pic_info_buf_size, -- ctx->codec.h264.pic_info_buf, -- ctx->codec.h264.pic_info_buf_dma); -+ dma_free_attrs(dev->dev, ctx->codec.h264.pic_info_buf_size, -+ ctx->codec.h264.pic_info_buf, -+ ctx->codec.h264.pic_info_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - return ret; - } - -@@ -654,23 +659,28 @@ static void cedrus_h264_stop(struct cedrus_ctx *ctx) - { - struct cedrus_dev *dev = ctx->dev; - -- dma_free_coherent(dev->dev, ctx->codec.h264.mv_col_buf_size, -- ctx->codec.h264.mv_col_buf, -- ctx->codec.h264.mv_col_buf_dma); -- dma_free_coherent(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, -- ctx->codec.h264.neighbor_info_buf, -- ctx->codec.h264.neighbor_info_buf_dma); -- dma_free_coherent(dev->dev, ctx->codec.h264.pic_info_buf_size, -- ctx->codec.h264.pic_info_buf, -- ctx->codec.h264.pic_info_buf_dma); -+ dma_free_attrs(dev->dev, ctx->codec.h264.mv_col_buf_size, -+ ctx->codec.h264.mv_col_buf, -+ ctx->codec.h264.mv_col_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); -+ dma_free_attrs(dev->dev, CEDRUS_NEIGHBOR_INFO_BUF_SIZE, -+ ctx->codec.h264.neighbor_info_buf, -+ ctx->codec.h264.neighbor_info_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); -+ dma_free_attrs(dev->dev, ctx->codec.h264.pic_info_buf_size, -+ ctx->codec.h264.pic_info_buf, -+ ctx->codec.h264.pic_info_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - if (ctx->codec.h264.deblk_buf_size) -- dma_free_coherent(dev->dev, ctx->codec.h264.deblk_buf_size, -- ctx->codec.h264.deblk_buf, -- ctx->codec.h264.deblk_buf_dma); -+ dma_free_attrs(dev->dev, ctx->codec.h264.deblk_buf_size, -+ ctx->codec.h264.deblk_buf, -+ ctx->codec.h264.deblk_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - if (ctx->codec.h264.intra_pred_buf_size) -- dma_free_coherent(dev->dev, ctx->codec.h264.intra_pred_buf_size, -- ctx->codec.h264.intra_pred_buf, -- ctx->codec.h264.intra_pred_buf_dma); -+ dma_free_attrs(dev->dev, ctx->codec.h264.intra_pred_buf_size, -+ ctx->codec.h264.intra_pred_buf, -+ ctx->codec.h264.intra_pred_buf_dma, -+ DMA_ATTR_NO_KERNEL_MAPPING); - } - - static void cedrus_h264_trigger(struct cedrus_ctx *ctx) -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c -index 3d9561d4aadb..bb7eb56106c5 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c -@@ -351,10 +351,10 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, - ctx->codec.h265.mv_col_buf_unit_size; - - ctx->codec.h265.mv_col_buf = -- dma_alloc_coherent(dev->dev, -- ctx->codec.h265.mv_col_buf_size, -- &ctx->codec.h265.mv_col_buf_addr, -- GFP_KERNEL); -+ dma_alloc_attrs(dev->dev, -+ ctx->codec.h265.mv_col_buf_size, -+ &ctx->codec.h265.mv_col_buf_addr, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h265.mv_col_buf) { - ctx->codec.h265.mv_col_buf_size = 0; - // TODO: Abort the process here. -@@ -668,9 +668,9 @@ static int cedrus_h265_start(struct cedrus_ctx *ctx) - ctx->codec.h265.mv_col_buf_size = 0; - - ctx->codec.h265.neighbor_info_buf = -- dma_alloc_coherent(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE, -- &ctx->codec.h265.neighbor_info_buf_addr, -- GFP_KERNEL); -+ dma_alloc_attrs(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE, -+ &ctx->codec.h265.neighbor_info_buf_addr, -+ GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); - if (!ctx->codec.h265.neighbor_info_buf) - return -ENOMEM; - -@@ -682,16 +682,18 @@ static void cedrus_h265_stop(struct cedrus_ctx *ctx) - struct cedrus_dev *dev = ctx->dev; - - if (ctx->codec.h265.mv_col_buf_size > 0) { -- dma_free_coherent(dev->dev, ctx->codec.h265.mv_col_buf_size, -- ctx->codec.h265.mv_col_buf, -- ctx->codec.h265.mv_col_buf_addr); -+ dma_free_attrs(dev->dev, ctx->codec.h265.mv_col_buf_size, -+ ctx->codec.h265.mv_col_buf, -+ ctx->codec.h265.mv_col_buf_addr, -+ DMA_ATTR_NO_KERNEL_MAPPING); - - ctx->codec.h265.mv_col_buf_size = 0; - } - -- dma_free_coherent(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE, -- ctx->codec.h265.neighbor_info_buf, -- ctx->codec.h265.neighbor_info_buf_addr); -+ dma_free_attrs(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE, -+ ctx->codec.h265.neighbor_info_buf, -+ ctx->codec.h265.neighbor_info_buf_addr, -+ DMA_ATTR_NO_KERNEL_MAPPING); - } - - static void cedrus_h265_trigger(struct cedrus_ctx *ctx) -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -index 66714609b577..800ffa5382de 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -@@ -568,6 +568,7 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, - - src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; - src_vq->io_modes = VB2_MMAP | VB2_DMABUF; -+ src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; - src_vq->drv_priv = ctx; - src_vq->buf_struct_size = sizeof(struct cedrus_buffer); - src_vq->ops = &cedrus_qops; -@@ -584,6 +585,7 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, - - dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; -+ src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING; - dst_vq->drv_priv = ctx; - dst_vq->buf_struct_size = sizeof(struct cedrus_buffer); - dst_vq->ops = &cedrus_qops; --- -2.33.0 - diff --git a/projects/Allwinner/patches/linux/0021-media-cedrus-hevc-Improve-buffer-management.patch b/projects/Allwinner/patches/linux/0021-media-cedrus-hevc-Improve-buffer-management.patch index 71ded1c704..bf630474b7 100644 --- a/projects/Allwinner/patches/linux/0021-media-cedrus-hevc-Improve-buffer-management.patch +++ b/projects/Allwinner/patches/linux/0021-media-cedrus-hevc-Improve-buffer-management.patch @@ -130,7 +130,7 @@ Signed-off-by: Jernej Skrabec } } -@@ -388,36 +429,6 @@ static void cedrus_h265_setup(struct ced +@@ -388,37 +429,6 @@ static void cedrus_h265_setup(struct ced width_in_ctb_luma = DIV_ROUND_UP(sps->pic_width_in_luma_samples, ctb_size_luma); @@ -152,6 +152,7 @@ Signed-off-by: Jernej Skrabec - ctx->codec.h265.mv_col_buf_size = num_buffers * - ctx->codec.h265.mv_col_buf_unit_size; - +- /* Buffer is never accessed by CPU, so we can skip kernel mapping. */ - ctx->codec.h265.mv_col_buf = - dma_alloc_attrs(dev->dev, - ctx->codec.h265.mv_col_buf_size, @@ -192,9 +193,9 @@ Signed-off-by: Jernej Skrabec - /* The buffer size is calculated at setup time. */ - ctx->codec.h265.mv_col_buf_size = 0; - + /* Buffer is never accessed by CPU, so we can skip kernel mapping. */ ctx->codec.h265.neighbor_info_buf = dma_alloc_attrs(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE, - &ctx->codec.h265.neighbor_info_buf_addr, @@ -759,15 +767,6 @@ static void cedrus_h265_stop(struct cedr { struct cedrus_dev *dev = ctx->dev; diff --git a/projects/Allwinner/patches/linux/0023-media-cedrus-add-check-for-H264-and-HEVC-limitations.patch b/projects/Allwinner/patches/linux/0023-media-cedrus-add-check-for-H264-and-HEVC-limitations.patch deleted file mode 100644 index cafa23c6e1..0000000000 --- a/projects/Allwinner/patches/linux/0023-media-cedrus-add-check-for-H264-and-HEVC-limitations.patch +++ /dev/null @@ -1,98 +0,0 @@ -From f26df66c4d6ea08a865a16df82af37035401254d Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 21 Jul 2020 21:53:27 +0200 -Subject: [PATCH 32/44] media: cedrus: add check for H264 and HEVC limitations - -Signed-off-by: Jernej Skrabec ---- - drivers/staging/media/sunxi/cedrus/cedrus.c | 49 ++++++++++++++++++++- - drivers/staging/media/sunxi/cedrus/cedrus.h | 1 + - 2 files changed, 49 insertions(+), 1 deletion(-) - ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -28,6 +28,50 @@ - #include "cedrus_dec.h" - #include "cedrus_hw.h" - -+static int cedrus_try_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) { -+ const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; -+ -+ if (sps->chroma_format_idc != 1) -+ /* Only 4:2:0 is supported */ -+ return -EINVAL; -+ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) -+ /* Luma and chroma bit depth mismatch */ -+ return -EINVAL; -+ if (sps->bit_depth_luma_minus8 != 0) -+ /* Only 8-bit is supported */ -+ return -EINVAL; -+ } else if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_SPS) { -+ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; -+ struct cedrus_ctx *ctx = container_of(ctrl->handler, struct cedrus_ctx, hdl); -+ -+ if (sps->chroma_format_idc != 1) -+ /* Only 4:2:0 is supported */ -+ return -EINVAL; -+ -+ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) -+ /* Luma and chroma bit depth mismatch */ -+ return -EINVAL; -+ -+ if (ctx->dev->capabilities & CEDRUS_CAPABILITY_H265_10_DEC) { -+ if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) -+ /* Only 8-bit and 10-bit are supported */ -+ return -EINVAL; -+ } else { -+ if (sps->bit_depth_luma_minus8 != 0) -+ /* Only 8-bit is supported */ -+ return -EINVAL; -+ } -+ } -+ -+ return 0; -+} -+ -+static const struct v4l2_ctrl_ops cedrus_ctrl_ops = { -+ .try_ctrl = cedrus_try_ctrl, -+}; -+ - static const struct cedrus_control cedrus_controls[] = { - { - .cfg = { -@@ -62,6 +106,7 @@ static const struct cedrus_control cedru - { - .cfg = { - .id = V4L2_CID_STATELESS_H264_SPS, -+ .ops = &cedrus_ctrl_ops, - }, - .codec = CEDRUS_CODEC_H264, - }, -@@ -120,6 +165,7 @@ static const struct cedrus_control cedru - { - .cfg = { - .id = V4L2_CID_MPEG_VIDEO_HEVC_SPS, -+ .ops = &cedrus_ctrl_ops, - }, - .codec = CEDRUS_CODEC_H265, - }, -@@ -556,6 +602,7 @@ static const struct cedrus_variant sun50 - CEDRUS_CAPABILITY_MPEG2_DEC | - CEDRUS_CAPABILITY_H264_DEC | - CEDRUS_CAPABILITY_H265_DEC | -+ CEDRUS_CAPABILITY_H265_10_DEC | - CEDRUS_CAPABILITY_VP8_DEC, - .mod_rate = 600000000, - }; ---- a/drivers/staging/media/sunxi/cedrus/cedrus.h -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h -@@ -32,6 +32,7 @@ - #define CEDRUS_CAPABILITY_H264_DEC BIT(2) - #define CEDRUS_CAPABILITY_MPEG2_DEC BIT(3) - #define CEDRUS_CAPABILITY_VP8_DEC BIT(4) -+#define CEDRUS_CAPABILITY_H265_10_DEC BIT(5) - - enum cedrus_codec { - CEDRUS_CODEC_MPEG2, diff --git a/projects/Allwinner/patches/linux/0040-a64-increase-mali-frequency.patch b/projects/Allwinner/patches/linux/0040-a64-increase-mali-frequency.patch deleted file mode 100644 index c2e76e80ab..0000000000 --- a/projects/Allwinner/patches/linux/0040-a64-increase-mali-frequency.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 6c2c1ff1f601956df8afe70b6ad2a936f5a581de Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 4 Apr 2020 11:30:02 +0200 -Subject: [PATCH 1/3] arm64: dts: allwinner: a64: increase mali frequency - -Signed-off-by: Jernej Skrabec ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -1141,6 +1141,9 @@ - clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_BUS_GPU>; -+ -+ assigned-clocks = <&ccu CLK_GPU>; -+ assigned-clock-rates = <432000000>; - }; - - gic: interrupt-controller@1c81000 { diff --git a/projects/Allwinner/patches/linux/0042-r40-hdmi-audio-wip.patch b/projects/Allwinner/patches/linux/0042-r40-hdmi-audio-wip.patch index 6d6bbeef47..3d80a6b9d8 100644 --- a/projects/Allwinner/patches/linux/0042-r40-hdmi-audio-wip.patch +++ b/projects/Allwinner/patches/linux/0042-r40-hdmi-audio-wip.patch @@ -5,8 +5,8 @@ Subject: [PATCH 17/17] r40 hdmi audio wip Signed-off-by: Jernej Skrabec --- - arch/arm/boot/dts/sun8i-r40.dtsi | 32 ++++++++++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) + arch/arm/boot/dts/sun8i-r40.dtsi | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -35,26 +35,6 @@ Signed-off-by: Jernej Skrabec thermal-zones { cpu_thermal: cpu0-thermal { /* milliseconds */ -@@ -710,6 +728,19 @@ - clocks = <&osc24M>; - }; - -+ i2s2: i2s@1c22800 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun8i-r40-i2s", -+ "allwinner,sun8i-h3-i2s"; -+ reg = <0x01c22800 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; -+ clock-names = "apb", "mod"; -+ resets = <&ccu RST_BUS_I2S2>; -+ dmas = <&dma 6>, <&dma 6>; -+ dma-names = "rx", "tx"; -+ }; -+ - ir0: ir@1c21800 { - compatible = "allwinner,sun8i-r40-ir", - "allwinner,sun6i-a31-ir"; @@ -1186,6 +1217,7 @@ }; diff --git a/projects/Allwinner/patches/linux/0055-WIp-10-bit-HEVC-support.patch b/projects/Allwinner/patches/linux/0055-WIp-10-bit-HEVC-support.patch index 4c3b59d9f5..05fb6b6954 100644 --- a/projects/Allwinner/patches/linux/0055-WIp-10-bit-HEVC-support.patch +++ b/projects/Allwinner/patches/linux/0055-WIp-10-bit-HEVC-support.patch @@ -17,7 +17,7 @@ Signed-off-by: Jernej Skrabec @@ -289,7 +289,7 @@ static int cedrus_open(struct file *file goto err_ctrls; } - ctx->dst_fmt.pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12; + ctx->dst_fmt.pixelformat = V4L2_PIX_FMT_NV12_32L32; - cedrus_prepare_format(&ctx->dst_fmt); + cedrus_prepare_format(&ctx->dst_fmt, 0); ctx->src_fmt.pixelformat = V4L2_PIX_FMT_MPEG2_SLICE; diff --git a/projects/Allwinner/patches/linux/0059-bus-sun50i-de2-Adjust-printing-error-message.patch b/projects/Allwinner/patches/linux/0059-bus-sun50i-de2-Adjust-printing-error-message.patch deleted file mode 100644 index 94354b8bb1..0000000000 --- a/projects/Allwinner/patches/linux/0059-bus-sun50i-de2-Adjust-printing-error-message.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 215e40242ae4348b97011b25a7f8f1bb6fb638ba Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 10 Oct 2021 09:11:00 +0200 -Subject: [PATCH] bus: sun50i-de2: Adjust printing error message - -SRAM driver often returns -EPROBE_DEFER and thus this bus driver often -prints error message, even if it probes successfully later. This is -confusing for users and they often think that something is wrong. - -Use dev_err_probe() helper for printing error message. It handles --EPROBE_DEFER automatically. - -Signed-off-by: Jernej Skrabec ---- - drivers/bus/sun50i-de2.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - -diff --git a/drivers/bus/sun50i-de2.c b/drivers/bus/sun50i-de2.c -index 672518741f86..414f29cdedf0 100644 ---- a/drivers/bus/sun50i-de2.c -+++ b/drivers/bus/sun50i-de2.c -@@ -15,10 +15,9 @@ static int sun50i_de2_bus_probe(struct platform_device *pdev) - int ret; - - ret = sunxi_sram_claim(&pdev->dev); -- if (ret) { -- dev_err(&pdev->dev, "Error couldn't map SRAM to device\n"); -- return ret; -- } -+ if (ret) -+ return dev_err_probe(&pdev->dev, ret, -+ "Couldn't map SRAM to device\n"); - - of_platform_populate(np, NULL, NULL, &pdev->dev); - --- -2.33.0 -