mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
synced 2025-08-02 23:47:49 +00:00
linux (Allwinner): update patches for 5.14
This commit is contained in:
parent
e198af10b6
commit
0404b23ae1
@ -16,17 +16,6 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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include/drm/bridge/dw_hdmi.h | 2 +
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5 files changed, 89 insertions(+), 3 deletions(-)
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--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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@@ -3421,7 +3421,7 @@ struct dw_hdmi *dw_hdmi_probe(struct pla
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hdmi->audio = platform_device_register_full(&pdevinfo);
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}
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- if (config0 & HDMI_CONFIG0_CEC) {
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+ if (!plat_data->is_cec_unusable && (config0 & HDMI_CONFIG0_CEC)) {
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cec.hdmi = hdmi;
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cec.ops = &dw_hdmi_cec_ops;
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cec.irq = irq;
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--- a/drivers/gpu/drm/sun4i/Kconfig
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+++ b/drivers/gpu/drm/sun4i/Kconfig
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@@ -56,6 +56,8 @@ config DRM_SUN8I_DW_HDMI
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@ -98,7 +87,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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plat_data->cur_ctr = variant->cur_ctr;
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plat_data->phy_config = variant->phy_cfg;
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}
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+ plat_data->is_cec_unusable = phy->variant->bit_bang_cec;
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+ plat_data->disable_cec = phy->variant->bit_bang_cec;
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}
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+static int sun8i_hdmi_phy_cec_pin_read(struct cec_adapter *adap)
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@ -197,14 +186,3 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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clk_disable_unprepare(phy->clk_mod);
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clk_disable_unprepare(phy->clk_bus);
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clk_disable_unprepare(phy->clk_phy);
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--- a/include/drm/bridge/dw_hdmi.h
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+++ b/include/drm/bridge/dw_hdmi.h
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@@ -153,6 +153,8 @@ struct dw_hdmi_plat_data {
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const struct dw_hdmi_phy_config *phy_config;
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int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
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unsigned long mpixelclock);
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+
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+ unsigned int is_cec_unusable : 1;
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};
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struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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@ -1,35 +0,0 @@
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From 8e2b67acc77a0c7704b2001dd4bf8646f286e4be Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@siol.net>
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Date: Sat, 16 Jan 2021 13:09:00 +0100
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Subject: [PATCH] ARM: dts: sun8i: r40: Add timer node
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Allwinner R40 has a timer.
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Add a node for it.
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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arch/arm/boot/dts/sun8i-r40.dtsi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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--- a/arch/arm/boot/dts/sun8i-r40.dtsi
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+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
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@@ -647,6 +647,18 @@
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};
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};
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+ timer@1c20c00 {
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+ compatible = "allwinner,sun4i-a10-timer";
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+ reg = <0x01c20c00 0x90>;
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+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&osc24M>;
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+ };
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+
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wdt: watchdog@1c20c90 {
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compatible = "allwinner,sun4i-a10-wdt";
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reg = <0x01c20c90 0x10>;
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@ -1,6 +1,6 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# Linux/arm64 5.13.0 Kernel Configuration
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# Linux/arm64 5.14.0-rc6 Kernel Configuration
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#
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CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 10.2.1 20201103"
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CONFIG_CC_IS_GCC=y
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@ -15,6 +15,7 @@ CONFIG_CC_CAN_LINK=y
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CONFIG_CC_CAN_LINK_STATIC=y
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CONFIG_CC_HAS_ASM_GOTO=y
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CONFIG_CC_HAS_ASM_INLINE=y
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CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
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CONFIG_IRQ_WORK=y
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CONFIG_BUILDTIME_TABLE_SORT=y
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CONFIG_THREAD_INFO_IN_TASK=y
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@ -210,9 +211,10 @@ CONFIG_LD_ORPHAN_WARN=y
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CONFIG_SYSCTL=y
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CONFIG_HAVE_UID16=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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# CONFIG_EXPERT is not set
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CONFIG_EXPERT=y
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CONFIG_UID16=y
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CONFIG_MULTIUSER=y
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# CONFIG_SGETMASK_SYSCALL is not set
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CONFIG_SYSFS_SYSCALL=y
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CONFIG_FHANDLE=y
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CONFIG_POSIX_TIMERS=y
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@ -240,8 +242,10 @@ CONFIG_KALLSYMS_BASE_RELATIVE=y
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CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
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CONFIG_KCMP=y
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CONFIG_RSEQ=y
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# CONFIG_DEBUG_RSEQ is not set
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# CONFIG_EMBEDDED is not set
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CONFIG_HAVE_PERF_EVENTS=y
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# CONFIG_PC104 is not set
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#
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# Kernel Performance Events And Counters
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@ -255,6 +259,7 @@ CONFIG_SLUB_DEBUG=y
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# CONFIG_COMPAT_BRK is not set
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# CONFIG_SLAB is not set
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CONFIG_SLUB=y
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# CONFIG_SLOB is not set
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CONFIG_SLAB_MERGE_DEFAULT=y
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# CONFIG_SLAB_FREELIST_RANDOM is not set
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# CONFIG_SLAB_FREELIST_HARDENED is not set
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@ -284,8 +289,6 @@ CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
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CONFIG_GENERIC_HWEIGHT=y
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CONFIG_GENERIC_CSUM=y
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CONFIG_GENERIC_CALIBRATE_DELAY=y
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CONFIG_ZONE_DMA=y
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CONFIG_ZONE_DMA32=y
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CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
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CONFIG_SMP=y
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CONFIG_KERNEL_MODE_NEON=y
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@ -399,7 +402,6 @@ CONFIG_NODES_SHIFT=2
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CONFIG_USE_PERCPU_NUMA_NODE_ID=y
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CONFIG_HAVE_SETUP_PER_CPU_AREA=y
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CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
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CONFIG_HOLES_IN_ZONE=y
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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# CONFIG_HZ_300 is not set
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@ -448,6 +450,7 @@ CONFIG_ARM64_CNP=y
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# ARMv8.3 architectural features
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#
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CONFIG_ARM64_PTR_AUTH=y
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CONFIG_ARM64_PTR_AUTH_KERNEL=y
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CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y
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CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y
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CONFIG_AS_HAS_PAC=y
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@ -504,6 +507,7 @@ CONFIG_SYSVIPC_COMPAT=y
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#
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CONFIG_SUSPEND=y
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CONFIG_SUSPEND_FREEZER=y
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# CONFIG_SUSPEND_SKIP_SYNC is not set
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CONFIG_HIBERNATE_CALLBACKS=y
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CONFIG_HIBERNATION=y
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CONFIG_HIBERNATION_SNAPSHOT_DEV=y
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@ -585,6 +589,8 @@ CONFIG_ARM_SCPI_CPUFREQ=y
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CONFIG_ARM_SCPI_PROTOCOL=y
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CONFIG_ARM_SCPI_POWER_DOMAIN=y
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# CONFIG_ARM_SDE_INTERFACE is not set
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# CONFIG_FIRMWARE_MEMMAP is not set
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# CONFIG_ARM_FFA_TRANSPORT is not set
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# CONFIG_GOOGLE_FIRMWARE is not set
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CONFIG_ARM_PSCI_FW=y
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# CONFIG_ARM_PSCI_CHECKER is not set
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@ -642,6 +648,7 @@ CONFIG_ARCH_HAS_KEEPINITRD=y
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CONFIG_ARCH_HAS_SET_MEMORY=y
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CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
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CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
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CONFIG_ARCH_WANTS_NO_INSTR=y
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CONFIG_HAVE_ASM_MODVERSIONS=y
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CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
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CONFIG_HAVE_RSEQ=y
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@ -704,7 +711,6 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
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# CONFIG_LOCK_EVENT_COUNTS is not set
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CONFIG_ARCH_HAS_RELR=y
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CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
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CONFIG_HAVE_ARCH_PFN_VALID=y
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CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
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#
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@ -733,6 +739,7 @@ CONFIG_MODULE_COMPRESS_NONE=y
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# CONFIG_MODULE_COMPRESS_ZSTD is not set
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# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
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CONFIG_MODPROBE_PATH="/sbin/modprobe"
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# CONFIG_TRIM_UNUSED_KSYMS is not set
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CONFIG_MODULES_TREE_LOOKUP=y
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CONFIG_BLOCK=y
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CONFIG_BLK_SCSI_REQUEST=y
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@ -748,6 +755,7 @@ CONFIG_BLK_DEV_THROTTLING=y
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# CONFIG_BLK_WBT is not set
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CONFIG_BLK_CGROUP_IOLATENCY=y
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# CONFIG_BLK_CGROUP_IOCOST is not set
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# CONFIG_BLK_CGROUP_IOPRIO is not set
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CONFIG_BLK_DEBUG_FS=y
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# CONFIG_BLK_SED_OPAL is not set
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# CONFIG_BLK_INLINE_ENCRYPTION is not set
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@ -804,7 +812,6 @@ CONFIG_COREDUMP=y
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# Memory Management options
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#
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CONFIG_SPARSEMEM=y
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CONFIG_NEED_MULTIPLE_NODES=y
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CONFIG_SPARSEMEM_EXTREME=y
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CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
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CONFIG_SPARSEMEM_VMEMMAP=y
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@ -839,18 +846,21 @@ CONFIG_CMA_DEBUGFS=y
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CONFIG_CMA_SYSFS=y
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CONFIG_CMA_AREAS=7
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# CONFIG_ZPOOL is not set
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# CONFIG_ZBUD is not set
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# CONFIG_ZSMALLOC is not set
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CONFIG_GENERIC_EARLY_IOREMAP=y
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# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
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# CONFIG_IDLE_PAGE_TRACKING is not set
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CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
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CONFIG_ARCH_HAS_PTE_DEVMAP=y
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CONFIG_ARCH_HAS_ZONE_DMA_SET=y
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CONFIG_ZONE_DMA=y
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CONFIG_ZONE_DMA32=y
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CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
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# CONFIG_PERCPU_STATS is not set
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# CONFIG_GUP_TEST is not set
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# CONFIG_READ_ONLY_THP_FOR_FS is not set
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CONFIG_ARCH_HAS_PTE_SPECIAL=y
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CONFIG_SECRETMEM=y
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# end of Memory Management options
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CONFIG_NET=y
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@ -1357,6 +1367,7 @@ CONFIG_WEXT_PRIV=y
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CONFIG_CFG80211=m
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# CONFIG_NL80211_TESTMODE is not set
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# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
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# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
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CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y
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CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y
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CONFIG_CFG80211_DEFAULT_PS=y
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@ -1513,6 +1524,7 @@ CONFIG_MTD_CFI_I2=y
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#
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# CONFIG_MTD_DATAFLASH is not set
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# CONFIG_MTD_MCHP23K256 is not set
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# CONFIG_MTD_MCHP48L640 is not set
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# CONFIG_MTD_SST25L is not set
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# CONFIG_MTD_SLRAM is not set
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# CONFIG_MTD_PHRAM is not set
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@ -1885,7 +1897,7 @@ CONFIG_AC200_PHY=y
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# CONFIG_AMD_PHY is not set
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# CONFIG_ADIN_PHY is not set
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# CONFIG_AQUANTIA_PHY is not set
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# CONFIG_AX88796B_PHY is not set
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CONFIG_AX88796B_PHY=m
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# CONFIG_BROADCOM_PHY is not set
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# CONFIG_BCM54140_PHY is not set
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# CONFIG_BCM7XXX_PHY is not set
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@ -1901,10 +1913,12 @@ CONFIG_AC200_PHY=y
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CONFIG_MARVELL_PHY=m
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CONFIG_MARVELL_10G_PHY=m
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# CONFIG_MARVELL_88X2222_PHY is not set
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# CONFIG_MEDIATEK_GE_PHY is not set
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CONFIG_MICREL_PHY=y
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CONFIG_MICROCHIP_PHY=m
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# CONFIG_MICROCHIP_T1_PHY is not set
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# CONFIG_MICROSEMI_PHY is not set
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# CONFIG_MOTORCOMM_PHY is not set
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# CONFIG_NATIONAL_PHY is not set
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# CONFIG_NXP_C45_TJA11XX_PHY is not set
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# CONFIG_NXP_TJA11XX_PHY is not set
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@ -1926,6 +1940,7 @@ CONFIG_SMSC_PHY=m
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# CONFIG_MICREL_KS8995MA is not set
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CONFIG_MDIO_DEVICE=y
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CONFIG_MDIO_BUS=y
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CONFIG_FWNODE_MDIO=y
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CONFIG_OF_MDIO=y
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CONFIG_MDIO_DEVRES=y
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# CONFIG_MDIO_SUN4I is not set
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@ -2113,7 +2128,13 @@ CONFIG_ZD1211RW=m
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CONFIG_USB_NET_RNDIS_WLAN=m
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# CONFIG_VIRT_WIFI is not set
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# CONFIG_WAN is not set
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#
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# Wireless WAN
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#
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# CONFIG_WWAN is not set
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# end of Wireless WAN
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# CONFIG_NETDEVSIM is not set
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CONFIG_NET_FAILOVER=y
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# CONFIG_ISDN is not set
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@ -2199,6 +2220,7 @@ CONFIG_JOYSTICK_XPAD_FF=y
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CONFIG_JOYSTICK_XPAD_LEDS=y
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# CONFIG_JOYSTICK_PSXPAD_SPI is not set
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# CONFIG_JOYSTICK_PXRC is not set
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# CONFIG_JOYSTICK_QWIIC is not set
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# CONFIG_JOYSTICK_FSIA6B is not set
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# CONFIG_INPUT_TABLET is not set
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CONFIG_INPUT_TOUCHSCREEN=y
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@ -2411,6 +2433,7 @@ CONFIG_SERIAL_MCTRL_GPIO=y
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# CONFIG_HVC_DCC is not set
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CONFIG_SERIAL_DEV_BUS=y
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CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
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# CONFIG_TTY_PRINTK is not set
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# CONFIG_VIRTIO_CONSOLE is not set
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# CONFIG_IPMI_HANDLER is not set
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# CONFIG_IPMB_DEVICE_INTERFACE is not set
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@ -2420,7 +2443,6 @@ CONFIG_HW_RANDOM=y
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# CONFIG_HW_RANDOM_CCTRNG is not set
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# CONFIG_HW_RANDOM_XIPHERA is not set
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CONFIG_DEVMEM=y
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# CONFIG_RAW_DRIVER is not set
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CONFIG_TCG_TPM=y
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CONFIG_HW_RANDOM_TPM=y
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# CONFIG_TCG_TIS is not set
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@ -2433,6 +2455,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
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# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
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# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
|
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# CONFIG_XILLYBUS is not set
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# CONFIG_XILLYUSB is not set
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# end of Character devices
|
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# CONFIG_RANDOM_TRUST_CPU is not set
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@ -2760,6 +2783,7 @@ CONFIG_AXP20X_POWER=y
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# CONFIG_CHARGER_SMB347 is not set
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# CONFIG_BATTERY_GAUGE_LTC2941 is not set
|
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# CONFIG_BATTERY_GOLDFISH is not set
|
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# CONFIG_BATTERY_RT5033 is not set
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# CONFIG_CHARGER_RT9455 is not set
|
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# CONFIG_CHARGER_UCS1002 is not set
|
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# CONFIG_CHARGER_BD99954 is not set
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||||
@ -2875,6 +2899,7 @@ CONFIG_SENSORS_LM90=m
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# CONFIG_SENSORS_SHT15 is not set
|
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# CONFIG_SENSORS_SHT21 is not set
|
||||
# CONFIG_SENSORS_SHT3x is not set
|
||||
# CONFIG_SENSORS_SHT4x is not set
|
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# CONFIG_SENSORS_SHTC1 is not set
|
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# CONFIG_SENSORS_DME1737 is not set
|
||||
# CONFIG_SENSORS_EMC1403 is not set
|
||||
@ -2942,6 +2967,7 @@ CONFIG_WATCHDOG_CORE=y
|
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CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
|
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CONFIG_WATCHDOG_OPEN_TIMEOUT=0
|
||||
# CONFIG_WATCHDOG_SYSFS is not set
|
||||
# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set
|
||||
|
||||
#
|
||||
# Watchdog Pretimeout Governors
|
||||
@ -3033,6 +3059,7 @@ CONFIG_MFD_MAX77620=y
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# CONFIG_MFD_NTXEC is not set
|
||||
# CONFIG_MFD_RETU is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_MFD_RT4831 is not set
|
||||
# CONFIG_MFD_RT5033 is not set
|
||||
# CONFIG_MFD_RC5T583 is not set
|
||||
CONFIG_MFD_RK808=y
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||||
@ -3084,6 +3111,7 @@ CONFIG_MFD_WL1273_CORE=m
|
||||
# CONFIG_MFD_STPMIC1 is not set
|
||||
# CONFIG_MFD_STMFX is not set
|
||||
# CONFIG_MFD_ATC260X_I2C is not set
|
||||
# CONFIG_MFD_QCOM_PM8008 is not set
|
||||
CONFIG_MFD_VEXPRESS_SYSREG=y
|
||||
# CONFIG_RAVE_SP_CORE is not set
|
||||
# CONFIG_MFD_INTEL_M10_BMC is not set
|
||||
@ -3118,6 +3146,7 @@ CONFIG_REGULATOR_HI6421V530=y
|
||||
CONFIG_REGULATOR_MAX77620=y
|
||||
# CONFIG_REGULATOR_MAX8649 is not set
|
||||
# CONFIG_REGULATOR_MAX8660 is not set
|
||||
# CONFIG_REGULATOR_MAX8893 is not set
|
||||
# CONFIG_REGULATOR_MAX8952 is not set
|
||||
# CONFIG_REGULATOR_MAX8973 is not set
|
||||
# CONFIG_REGULATOR_MAX77826 is not set
|
||||
@ -3137,6 +3166,8 @@ CONFIG_REGULATOR_PWM=y
|
||||
# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set
|
||||
CONFIG_REGULATOR_RK808=y
|
||||
# CONFIG_REGULATOR_RT4801 is not set
|
||||
# CONFIG_REGULATOR_RT6160 is not set
|
||||
# CONFIG_REGULATOR_RT6245 is not set
|
||||
# CONFIG_REGULATOR_RTMV20 is not set
|
||||
# CONFIG_REGULATOR_S2MPA01 is not set
|
||||
CONFIG_REGULATOR_S2MPS11=y
|
||||
@ -3229,6 +3260,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_VIDEO_TUNER=m
|
||||
CONFIG_V4L2_MEM2MEM_DEV=y
|
||||
CONFIG_V4L2_FWNODE=m
|
||||
CONFIG_V4L2_ASYNC=m
|
||||
CONFIG_VIDEOBUF_GEN=m
|
||||
CONFIG_VIDEOBUF_VMALLOC=m
|
||||
# end of Video4Linux options
|
||||
@ -3262,7 +3294,6 @@ CONFIG_DVB_MAX_ADAPTERS=16
|
||||
#
|
||||
# Drivers filtered as selected at 'Filter media drivers'
|
||||
#
|
||||
CONFIG_TTPCI_EEPROM=m
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
|
||||
#
|
||||
@ -3392,6 +3423,7 @@ CONFIG_MEDIA_COMMON_OPTIONS=y
|
||||
#
|
||||
CONFIG_VIDEO_CX2341X=m
|
||||
CONFIG_VIDEO_TVEEPROM=m
|
||||
CONFIG_TTPCI_EEPROM=m
|
||||
CONFIG_CYPRESS_FIRMWARE=m
|
||||
CONFIG_VIDEOBUF2_CORE=y
|
||||
CONFIG_VIDEOBUF2_V4L2=y
|
||||
@ -3415,8 +3447,6 @@ CONFIG_DVB_PLATFORM_DRIVERS=y
|
||||
# CONFIG_SMS_SDIO_DRV is not set
|
||||
# end of Media drivers
|
||||
|
||||
CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y
|
||||
|
||||
#
|
||||
# Media ancillary drivers
|
||||
#
|
||||
@ -3428,28 +3458,116 @@ CONFIG_MEDIA_ATTACH=y
|
||||
CONFIG_VIDEO_IR_I2C=y
|
||||
|
||||
#
|
||||
# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers'
|
||||
# Audio decoders, processors and mixers
|
||||
#
|
||||
CONFIG_VIDEO_TVAUDIO=m
|
||||
CONFIG_VIDEO_TDA7432=m
|
||||
CONFIG_VIDEO_TDA9840=m
|
||||
CONFIG_VIDEO_TDA1997X=m
|
||||
CONFIG_VIDEO_TEA6415C=m
|
||||
CONFIG_VIDEO_TEA6420=m
|
||||
CONFIG_VIDEO_MSP3400=m
|
||||
CONFIG_VIDEO_CS3308=m
|
||||
CONFIG_VIDEO_CS5345=m
|
||||
CONFIG_VIDEO_CS53L32A=m
|
||||
CONFIG_VIDEO_TLV320AIC23B=m
|
||||
CONFIG_VIDEO_UDA1342=m
|
||||
CONFIG_VIDEO_WM8775=m
|
||||
CONFIG_VIDEO_WM8739=m
|
||||
CONFIG_VIDEO_VP27SMPX=m
|
||||
CONFIG_VIDEO_SONY_BTF_MPX=m
|
||||
# end of Audio decoders, processors and mixers
|
||||
|
||||
#
|
||||
# RDS decoders
|
||||
#
|
||||
CONFIG_VIDEO_SAA6588=m
|
||||
# end of RDS decoders
|
||||
|
||||
#
|
||||
# Video decoders
|
||||
#
|
||||
CONFIG_VIDEO_ADV7180=m
|
||||
CONFIG_VIDEO_ADV7183=m
|
||||
CONFIG_VIDEO_ADV748X=m
|
||||
CONFIG_VIDEO_ADV7604=m
|
||||
CONFIG_VIDEO_ADV7604_CEC=y
|
||||
CONFIG_VIDEO_ADV7842=m
|
||||
CONFIG_VIDEO_ADV7842_CEC=y
|
||||
CONFIG_VIDEO_BT819=m
|
||||
CONFIG_VIDEO_BT856=m
|
||||
CONFIG_VIDEO_BT866=m
|
||||
CONFIG_VIDEO_KS0127=m
|
||||
CONFIG_VIDEO_ML86V7667=m
|
||||
CONFIG_VIDEO_SAA7110=m
|
||||
CONFIG_VIDEO_SAA711X=m
|
||||
CONFIG_VIDEO_TC358743=m
|
||||
CONFIG_VIDEO_TC358743_CEC=y
|
||||
CONFIG_VIDEO_TVP514X=m
|
||||
CONFIG_VIDEO_TVP5150=m
|
||||
CONFIG_VIDEO_TVP7002=m
|
||||
CONFIG_VIDEO_TW2804=m
|
||||
CONFIG_VIDEO_TW9903=m
|
||||
CONFIG_VIDEO_TW9906=m
|
||||
CONFIG_VIDEO_TW9910=m
|
||||
CONFIG_VIDEO_VPX3220=m
|
||||
CONFIG_VIDEO_MAX9286=m
|
||||
|
||||
#
|
||||
# Video and audio decoders
|
||||
#
|
||||
CONFIG_VIDEO_SAA717X=m
|
||||
CONFIG_VIDEO_CX25840=m
|
||||
# end of Video decoders
|
||||
|
||||
#
|
||||
# Video encoders
|
||||
#
|
||||
CONFIG_VIDEO_SAA7127=m
|
||||
CONFIG_VIDEO_SAA7185=m
|
||||
CONFIG_VIDEO_ADV7170=m
|
||||
CONFIG_VIDEO_ADV7175=m
|
||||
CONFIG_VIDEO_ADV7343=m
|
||||
CONFIG_VIDEO_ADV7393=m
|
||||
CONFIG_VIDEO_ADV7511=m
|
||||
CONFIG_VIDEO_ADV7511_CEC=y
|
||||
CONFIG_VIDEO_AD9389B=m
|
||||
CONFIG_VIDEO_AK881X=m
|
||||
CONFIG_VIDEO_THS8200=m
|
||||
# end of Video encoders
|
||||
|
||||
#
|
||||
# Video improvement chips
|
||||
#
|
||||
CONFIG_VIDEO_UPD64031A=m
|
||||
CONFIG_VIDEO_UPD64083=m
|
||||
# end of Video improvement chips
|
||||
|
||||
#
|
||||
# Audio/Video compression chips
|
||||
#
|
||||
CONFIG_VIDEO_SAA6752HS=m
|
||||
# end of Audio/Video compression chips
|
||||
|
||||
#
|
||||
# SDR tuner chips
|
||||
#
|
||||
# end of SDR tuner chips
|
||||
|
||||
#
|
||||
# Miscellaneous helper chips
|
||||
#
|
||||
CONFIG_VIDEO_THS7303=m
|
||||
CONFIG_VIDEO_M52790=m
|
||||
CONFIG_VIDEO_I2C=m
|
||||
# CONFIG_VIDEO_ST_MIPID02 is not set
|
||||
# end of Miscellaneous helper chips
|
||||
|
||||
#
|
||||
# Camera sensor devices
|
||||
#
|
||||
# CONFIG_VIDEO_HI556 is not set
|
||||
# CONFIG_VIDEO_IMX208 is not set
|
||||
# CONFIG_VIDEO_IMX214 is not set
|
||||
# CONFIG_VIDEO_IMX219 is not set
|
||||
# CONFIG_VIDEO_IMX258 is not set
|
||||
@ -3525,8 +3643,10 @@ CONFIG_VIDEO_MT9V011=m
|
||||
# end of Flash devices
|
||||
|
||||
#
|
||||
# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers'
|
||||
# SPI helper chips
|
||||
#
|
||||
CONFIG_VIDEO_GS1662=m
|
||||
# end of SPI helper chips
|
||||
|
||||
#
|
||||
# Media SPI Adapters
|
||||
@ -3537,7 +3657,7 @@ CONFIG_CXD2880_SPI_DRV=m
|
||||
CONFIG_MEDIA_TUNER=y
|
||||
|
||||
#
|
||||
# Tuner drivers auto-selected by 'Autoselect ancillary drivers'
|
||||
# Customize TV tuners
|
||||
#
|
||||
CONFIG_MEDIA_TUNER_SIMPLE=y
|
||||
CONFIG_MEDIA_TUNER_TDA18250=m
|
||||
@ -3547,10 +3667,12 @@ CONFIG_MEDIA_TUNER_TDA18271=y
|
||||
CONFIG_MEDIA_TUNER_TDA9887=y
|
||||
CONFIG_MEDIA_TUNER_TEA5761=y
|
||||
CONFIG_MEDIA_TUNER_TEA5767=y
|
||||
CONFIG_MEDIA_TUNER_MSI001=m
|
||||
CONFIG_MEDIA_TUNER_MT20XX=y
|
||||
CONFIG_MEDIA_TUNER_MT2060=m
|
||||
CONFIG_MEDIA_TUNER_MT2063=m
|
||||
CONFIG_MEDIA_TUNER_MT2266=m
|
||||
CONFIG_MEDIA_TUNER_MT2131=m
|
||||
CONFIG_MEDIA_TUNER_QT1010=m
|
||||
CONFIG_MEDIA_TUNER_XC2028=y
|
||||
CONFIG_MEDIA_TUNER_XC5000=y
|
||||
@ -3566,14 +3688,18 @@ CONFIG_MEDIA_TUNER_FC0013=m
|
||||
CONFIG_MEDIA_TUNER_TDA18212=m
|
||||
CONFIG_MEDIA_TUNER_E4000=m
|
||||
CONFIG_MEDIA_TUNER_FC2580=m
|
||||
CONFIG_MEDIA_TUNER_M88RS6000T=m
|
||||
CONFIG_MEDIA_TUNER_TUA9001=m
|
||||
CONFIG_MEDIA_TUNER_SI2157=m
|
||||
CONFIG_MEDIA_TUNER_IT913X=m
|
||||
CONFIG_MEDIA_TUNER_R820T=m
|
||||
CONFIG_MEDIA_TUNER_MXL301RF=m
|
||||
CONFIG_MEDIA_TUNER_QM1D1C0042=m
|
||||
CONFIG_MEDIA_TUNER_QM1D1B0004=m
|
||||
# end of Customize TV tuners
|
||||
|
||||
#
|
||||
# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers'
|
||||
# Customise DVB Frontends
|
||||
#
|
||||
|
||||
#
|
||||
@ -3582,7 +3708,10 @@ CONFIG_MEDIA_TUNER_QM1D1C0042=m
|
||||
CONFIG_DVB_STB0899=m
|
||||
CONFIG_DVB_STB6100=m
|
||||
CONFIG_DVB_STV090x=m
|
||||
CONFIG_DVB_STV0910=m
|
||||
CONFIG_DVB_STV6110x=m
|
||||
CONFIG_DVB_STV6111=m
|
||||
CONFIG_DVB_MXL5XX=m
|
||||
CONFIG_DVB_M88DS3103=m
|
||||
|
||||
#
|
||||
@ -3597,8 +3726,10 @@ CONFIG_DVB_MN88473=m
|
||||
#
|
||||
# DVB-S (satellite) frontends
|
||||
#
|
||||
CONFIG_DVB_CX24110=m
|
||||
CONFIG_DVB_CX24123=m
|
||||
CONFIG_DVB_MT312=m
|
||||
CONFIG_DVB_ZL10036=m
|
||||
CONFIG_DVB_ZL10039=m
|
||||
CONFIG_DVB_S5H1420=m
|
||||
CONFIG_DVB_STV0288=m
|
||||
@ -3606,22 +3737,32 @@ CONFIG_DVB_STB6000=m
|
||||
CONFIG_DVB_STV0299=m
|
||||
CONFIG_DVB_STV6110=m
|
||||
CONFIG_DVB_STV0900=m
|
||||
CONFIG_DVB_TDA8083=m
|
||||
CONFIG_DVB_TDA10086=m
|
||||
CONFIG_DVB_TDA8261=m
|
||||
CONFIG_DVB_VES1X93=m
|
||||
CONFIG_DVB_TUNER_ITD1000=m
|
||||
CONFIG_DVB_TUNER_CX24113=m
|
||||
CONFIG_DVB_TDA826X=m
|
||||
CONFIG_DVB_TUA6100=m
|
||||
CONFIG_DVB_CX24116=m
|
||||
CONFIG_DVB_CX24117=m
|
||||
CONFIG_DVB_CX24120=m
|
||||
CONFIG_DVB_SI21XX=m
|
||||
CONFIG_DVB_TS2020=m
|
||||
CONFIG_DVB_DS3000=m
|
||||
CONFIG_DVB_MB86A16=m
|
||||
CONFIG_DVB_TDA10071=m
|
||||
|
||||
#
|
||||
# DVB-T (terrestrial) frontends
|
||||
#
|
||||
CONFIG_DVB_SP887X=m
|
||||
CONFIG_DVB_CX22700=m
|
||||
CONFIG_DVB_CX22702=m
|
||||
CONFIG_DVB_S5H1432=m
|
||||
CONFIG_DVB_DRXD=m
|
||||
CONFIG_DVB_L64781=m
|
||||
CONFIG_DVB_TDA1004X=m
|
||||
CONFIG_DVB_NXT6000=m
|
||||
CONFIG_DVB_MT352=m
|
||||
@ -3630,9 +3771,11 @@ CONFIG_DVB_DIB3000MB=m
|
||||
CONFIG_DVB_DIB3000MC=m
|
||||
CONFIG_DVB_DIB7000M=m
|
||||
CONFIG_DVB_DIB7000P=m
|
||||
CONFIG_DVB_DIB9000=m
|
||||
CONFIG_DVB_TDA10048=m
|
||||
CONFIG_DVB_AF9013=m
|
||||
CONFIG_DVB_EC100=m
|
||||
CONFIG_DVB_STV0367=m
|
||||
CONFIG_DVB_CXD2820R=m
|
||||
CONFIG_DVB_CXD2841ER=m
|
||||
CONFIG_DVB_RTL2830=m
|
||||
@ -3641,10 +3784,13 @@ CONFIG_DVB_SI2168=m
|
||||
CONFIG_DVB_AS102_FE=m
|
||||
CONFIG_DVB_ZD1301_DEMOD=m
|
||||
CONFIG_DVB_GP8PSK_FE=m
|
||||
CONFIG_DVB_CXD2880=m
|
||||
|
||||
#
|
||||
# DVB-C (cable) frontends
|
||||
#
|
||||
CONFIG_DVB_VES1820=m
|
||||
CONFIG_DVB_TDA10021=m
|
||||
CONFIG_DVB_TDA10023=m
|
||||
CONFIG_DVB_STV0297=m
|
||||
|
||||
@ -3652,6 +3798,8 @@ CONFIG_DVB_STV0297=m
|
||||
# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
|
||||
#
|
||||
CONFIG_DVB_NXT200X=m
|
||||
CONFIG_DVB_OR51211=m
|
||||
CONFIG_DVB_OR51132=m
|
||||
CONFIG_DVB_BCM3510=m
|
||||
CONFIG_DVB_LGDT330X=m
|
||||
CONFIG_DVB_LGDT3305=m
|
||||
@ -3675,6 +3823,7 @@ CONFIG_DVB_MB86A20S=m
|
||||
# ISDB-S (satellite) & ISDB-T (terrestrial) frontends
|
||||
#
|
||||
CONFIG_DVB_TC90522=m
|
||||
CONFIG_DVB_MN88443X=m
|
||||
|
||||
#
|
||||
# Digital terrestrial only tuners/PLL
|
||||
@ -3687,21 +3836,31 @@ CONFIG_DVB_TUNER_DIB0090=m
|
||||
# SEC control devices for DVB-S
|
||||
#
|
||||
CONFIG_DVB_DRX39XYJ=m
|
||||
CONFIG_DVB_LNBH25=m
|
||||
CONFIG_DVB_LNBH29=m
|
||||
CONFIG_DVB_LNBP21=m
|
||||
CONFIG_DVB_LNBP22=m
|
||||
CONFIG_DVB_ISL6405=m
|
||||
CONFIG_DVB_ISL6421=m
|
||||
CONFIG_DVB_ISL6423=m
|
||||
CONFIG_DVB_A8293=m
|
||||
CONFIG_DVB_LGS8GL5=m
|
||||
CONFIG_DVB_LGS8GXX=m
|
||||
CONFIG_DVB_ATBM8830=m
|
||||
CONFIG_DVB_TDA665x=m
|
||||
CONFIG_DVB_IX2505V=m
|
||||
CONFIG_DVB_M88RS2000=m
|
||||
CONFIG_DVB_AF9033=m
|
||||
CONFIG_DVB_HORUS3A=m
|
||||
CONFIG_DVB_ASCOT2E=m
|
||||
CONFIG_DVB_HELENE=m
|
||||
|
||||
#
|
||||
# Common Interface (EN50221) controller drivers
|
||||
#
|
||||
CONFIG_DVB_CXD2099=m
|
||||
CONFIG_DVB_SP2=m
|
||||
# end of Customise DVB Frontends
|
||||
# end of Media ancillary drivers
|
||||
|
||||
#
|
||||
@ -3712,9 +3871,10 @@ CONFIG_DRM=y
|
||||
# CONFIG_DRM_DEBUG_MM is not set
|
||||
# CONFIG_DRM_DEBUG_SELFTEST is not set
|
||||
CONFIG_DRM_KMS_HELPER=y
|
||||
CONFIG_DRM_KMS_FB_HELPER=y
|
||||
# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
|
||||
CONFIG_DRM_FBDEV_EMULATION=y
|
||||
CONFIG_DRM_FBDEV_OVERALLOC=100
|
||||
# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
|
||||
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
|
||||
# CONFIG_DRM_DP_CEC is not set
|
||||
CONFIG_DRM_GEM_CMA_HELPER=y
|
||||
@ -3792,6 +3952,7 @@ CONFIG_DRM_DISPLAY_CONNECTOR=y
|
||||
# CONFIG_DRM_LONTIUM_LT8912B is not set
|
||||
# CONFIG_DRM_LONTIUM_LT9611 is not set
|
||||
# CONFIG_DRM_LONTIUM_LT9611UXC is not set
|
||||
# CONFIG_DRM_ITE_IT66121 is not set
|
||||
# CONFIG_DRM_LVDS_CODEC is not set
|
||||
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
|
||||
# CONFIG_DRM_NWL_MIPI_DSI is not set
|
||||
@ -3809,6 +3970,7 @@ CONFIG_DRM_SIMPLE_BRIDGE=y
|
||||
# CONFIG_DRM_TOSHIBA_TC358768 is not set
|
||||
# CONFIG_DRM_TOSHIBA_TC358775 is not set
|
||||
# CONFIG_DRM_TI_TFP410 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI83 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI86 is not set
|
||||
# CONFIG_DRM_TI_TPD12S015 is not set
|
||||
CONFIG_DRM_ANALOGIX_ANX6345=m
|
||||
@ -3828,6 +3990,7 @@ CONFIG_DRM_DW_HDMI_CEC=y
|
||||
# CONFIG_DRM_MXSFB is not set
|
||||
# CONFIG_DRM_ARCPGU is not set
|
||||
# CONFIG_DRM_GM12U320 is not set
|
||||
# CONFIG_DRM_SIMPLEDRM is not set
|
||||
# CONFIG_TINYDRM_HX8357D is not set
|
||||
# CONFIG_TINYDRM_ILI9225 is not set
|
||||
# CONFIG_TINYDRM_ILI9341 is not set
|
||||
@ -4107,14 +4270,17 @@ CONFIG_SND_SOC_HDMI_CODEC=y
|
||||
# CONFIG_SND_SOC_PCM512x_I2C is not set
|
||||
# CONFIG_SND_SOC_PCM512x_SPI is not set
|
||||
# CONFIG_SND_SOC_RK3328 is not set
|
||||
# CONFIG_SND_SOC_RK817 is not set
|
||||
# CONFIG_SND_SOC_RT5616 is not set
|
||||
# CONFIG_SND_SOC_RT5631 is not set
|
||||
# CONFIG_SND_SOC_RT5640 is not set
|
||||
# CONFIG_SND_SOC_RT5659 is not set
|
||||
# CONFIG_SND_SOC_SGTL5000 is not set
|
||||
# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
|
||||
# CONFIG_SND_SOC_SIMPLE_MUX is not set
|
||||
# CONFIG_SND_SOC_SPDIF is not set
|
||||
# CONFIG_SND_SOC_SSM2305 is not set
|
||||
# CONFIG_SND_SOC_SSM2518 is not set
|
||||
# CONFIG_SND_SOC_SSM2602_SPI is not set
|
||||
# CONFIG_SND_SOC_SSM2602_I2C is not set
|
||||
# CONFIG_SND_SOC_SSM4567 is not set
|
||||
@ -4131,6 +4297,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y
|
||||
# CONFIG_SND_SOC_TAS6424 is not set
|
||||
# CONFIG_SND_SOC_TDA7419 is not set
|
||||
# CONFIG_SND_SOC_TFA9879 is not set
|
||||
# CONFIG_SND_SOC_TFA989X is not set
|
||||
# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
|
||||
# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
|
||||
# CONFIG_SND_SOC_TLV320AIC31XX is not set
|
||||
@ -4167,7 +4334,6 @@ CONFIG_SND_SOC_HDMI_CODEC=y
|
||||
# CONFIG_SND_SOC_WM8978 is not set
|
||||
# CONFIG_SND_SOC_WM8985 is not set
|
||||
# CONFIG_SND_SOC_ZL38060 is not set
|
||||
# CONFIG_SND_SOC_ZX_AUD96P22 is not set
|
||||
# CONFIG_SND_SOC_MAX9759 is not set
|
||||
# CONFIG_SND_SOC_MT6351 is not set
|
||||
# CONFIG_SND_SOC_MT6358 is not set
|
||||
@ -4944,9 +5110,18 @@ CONFIG_VIDEO_SUNXI_CEDRUS=y
|
||||
# CONFIG_CHROME_PLATFORMS is not set
|
||||
# CONFIG_MELLANOX_PLATFORM is not set
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
|
||||
#
|
||||
# Clock driver for ARM Reference designs
|
||||
#
|
||||
# CONFIG_ICST is not set
|
||||
# CONFIG_CLK_SP810 is not set
|
||||
# CONFIG_CLK_VEXPRESS_OSC is not set
|
||||
# end of Clock driver for ARM Reference designs
|
||||
|
||||
# CONFIG_LMK04832 is not set
|
||||
# CONFIG_COMMON_CLK_MAX77686 is not set
|
||||
# CONFIG_COMMON_CLK_MAX9485 is not set
|
||||
# CONFIG_COMMON_CLK_RK808 is not set
|
||||
@ -4979,12 +5154,15 @@ CONFIG_SUN8I_DE2_CCU=y
|
||||
CONFIG_SUN8I_R_CCU=y
|
||||
# CONFIG_XILINX_VCU is not set
|
||||
CONFIG_HWSPINLOCK=y
|
||||
CONFIG_HWSPINLOCK_SUN6I=y
|
||||
|
||||
#
|
||||
# Clock Source drivers
|
||||
#
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_SUN4I_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
|
||||
@ -5156,6 +5334,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_DMARD06 is not set
|
||||
# CONFIG_DMARD09 is not set
|
||||
# CONFIG_DMARD10 is not set
|
||||
# CONFIG_FXLS8962AF_I2C is not set
|
||||
# CONFIG_FXLS8962AF_SPI is not set
|
||||
# CONFIG_IIO_ST_ACCEL_3AXIS is not set
|
||||
# CONFIG_KXSD9 is not set
|
||||
# CONFIG_KXCJK1013 is not set
|
||||
@ -5169,6 +5349,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_MXC4005 is not set
|
||||
# CONFIG_MXC6255 is not set
|
||||
# CONFIG_SCA3000 is not set
|
||||
# CONFIG_SCA3300 is not set
|
||||
# CONFIG_STK8312 is not set
|
||||
# CONFIG_STK8BA50 is not set
|
||||
# end of Accelerometers
|
||||
@ -5232,6 +5413,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_TI_ADS124S08 is not set
|
||||
# CONFIG_TI_ADS131E08 is not set
|
||||
# CONFIG_TI_TLC4541 is not set
|
||||
# CONFIG_TI_TSC2046 is not set
|
||||
# CONFIG_VF610_ADC is not set
|
||||
# CONFIG_XILINX_XADC is not set
|
||||
# end of Analog to digital converters
|
||||
@ -5266,7 +5448,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_PMS7003 is not set
|
||||
# CONFIG_SCD30_CORE is not set
|
||||
# CONFIG_SENSIRION_SGP30 is not set
|
||||
# CONFIG_SPS30 is not set
|
||||
# CONFIG_SPS30_I2C is not set
|
||||
# CONFIG_SPS30_SERIAL is not set
|
||||
# CONFIG_VZ89X is not set
|
||||
# end of Chemical Sensors
|
||||
|
||||
@ -5409,6 +5592,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_INV_MPU6050_I2C is not set
|
||||
# CONFIG_INV_MPU6050_SPI is not set
|
||||
# CONFIG_IIO_ST_LSM6DSX is not set
|
||||
# CONFIG_IIO_ST_LSM9DS0 is not set
|
||||
# end of Inertial measurement units
|
||||
|
||||
#
|
||||
@ -5450,6 +5634,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_TCS3472 is not set
|
||||
# CONFIG_SENSORS_TSL2563 is not set
|
||||
# CONFIG_TSL2583 is not set
|
||||
# CONFIG_TSL2591 is not set
|
||||
# CONFIG_TSL2772 is not set
|
||||
# CONFIG_TSL4531 is not set
|
||||
# CONFIG_US5182D is not set
|
||||
@ -5581,6 +5766,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_MLX90632 is not set
|
||||
# CONFIG_TMP006 is not set
|
||||
# CONFIG_TMP007 is not set
|
||||
# CONFIG_TMP117 is not set
|
||||
# CONFIG_TSYS01 is not set
|
||||
# CONFIG_TSYS02D is not set
|
||||
# CONFIG_MAX31856 is not set
|
||||
@ -5609,8 +5795,7 @@ CONFIG_PARTITION_PERCPU=y
|
||||
# CONFIG_IPACK_BUS is not set
|
||||
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
# CONFIG_RESET_BRCMSTB_RESCAL is not set
|
||||
# CONFIG_RESET_INTEL_GW is not set
|
||||
# CONFIG_RESET_MCHP_SPARX5 is not set
|
||||
CONFIG_RESET_SIMPLE=y
|
||||
CONFIG_RESET_SUNXI=y
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
@ -5620,6 +5805,7 @@ CONFIG_RESET_SUNXI=y
|
||||
#
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_PHY_XGENE=y
|
||||
# CONFIG_PHY_CAN_TRANSCEIVER is not set
|
||||
CONFIG_PHY_SUN4I_USB=y
|
||||
# CONFIG_PHY_SUN6I_MIPI_DPHY is not set
|
||||
# CONFIG_PHY_SUN9I_USB is not set
|
||||
@ -5871,7 +6057,6 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
|
||||
# CONFIG_PSTORE_CONSOLE is not set
|
||||
# CONFIG_PSTORE_PMSG is not set
|
||||
# CONFIG_PSTORE_RAM is not set
|
||||
# CONFIG_PSTORE_BLK is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
# CONFIG_EROFS_FS is not set
|
||||
@ -6352,7 +6537,6 @@ CONFIG_FONT_8x16=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_ARCH_STACKWALK=y
|
||||
CONFIG_SBITMAP=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
# end of Library routines
|
||||
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
@ -6366,6 +6550,7 @@ CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
#
|
||||
CONFIG_PRINTK_TIME=y
|
||||
# CONFIG_PRINTK_CALLER is not set
|
||||
# CONFIG_STACKTRACE_BUILD_ID is not set
|
||||
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
|
||||
CONFIG_CONSOLE_LOGLEVEL_QUIET=4
|
||||
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
|
||||
@ -6395,8 +6580,10 @@ CONFIG_FRAME_WARN=2048
|
||||
# CONFIG_HEADERS_INSTALL is not set
|
||||
# CONFIG_DEBUG_SECTION_MISMATCH is not set
|
||||
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
|
||||
# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set
|
||||
CONFIG_ARCH_WANT_FRAME_POINTERS=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_VMLINUX_MAP is not set
|
||||
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
|
||||
# end of Compile-time checks and compiler options
|
||||
|
||||
@ -6566,7 +6753,6 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y
|
||||
# CONFIG_KCOV is not set
|
||||
CONFIG_RUNTIME_TESTING_MENU=y
|
||||
# CONFIG_LKDTM is not set
|
||||
# CONFIG_TEST_LIST_SORT is not set
|
||||
# CONFIG_TEST_MIN_HEAP is not set
|
||||
# CONFIG_TEST_SORT is not set
|
||||
# CONFIG_TEST_DIV64 is not set
|
||||
@ -6577,10 +6763,12 @@ CONFIG_RUNTIME_TESTING_MENU=y
|
||||
# CONFIG_PERCPU_TEST is not set
|
||||
# CONFIG_ATOMIC64_SELFTEST is not set
|
||||
# CONFIG_TEST_HEXDUMP is not set
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
# CONFIG_TEST_STRING_HELPERS is not set
|
||||
# CONFIG_TEST_STRSCPY is not set
|
||||
# CONFIG_TEST_KSTRTOX is not set
|
||||
# CONFIG_TEST_PRINTF is not set
|
||||
# CONFIG_TEST_SCANF is not set
|
||||
# CONFIG_TEST_BITMAP is not set
|
||||
# CONFIG_TEST_UUID is not set
|
||||
# CONFIG_TEST_XARRAY is not set
|
||||
|
@ -1,10 +1,10 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm 5.13.0 Kernel Configuration
|
||||
# Linux/arm 5.14.0-rc6 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-10.2.0 (GCC) 10.2.0"
|
||||
CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-10.3.0 (GCC) 10.3.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
CONFIG_GCC_VERSION=100200
|
||||
CONFIG_GCC_VERSION=100300
|
||||
CONFIG_CLANG_VERSION=0
|
||||
CONFIG_AS_IS_GNU=y
|
||||
CONFIG_AS_VERSION=23501
|
||||
@ -15,6 +15,7 @@ CONFIG_CC_CAN_LINK=y
|
||||
CONFIG_CC_CAN_LINK_STATIC=y
|
||||
CONFIG_CC_HAS_ASM_GOTO=y
|
||||
CONFIG_CC_HAS_ASM_INLINE=y
|
||||
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_BUILDTIME_TABLE_SORT=y
|
||||
|
||||
@ -719,6 +720,7 @@ CONFIG_BLK_DEV_THROTTLING=y
|
||||
# CONFIG_BLK_WBT is not set
|
||||
CONFIG_BLK_CGROUP_IOLATENCY=y
|
||||
# CONFIG_BLK_CGROUP_IOCOST is not set
|
||||
# CONFIG_BLK_CGROUP_IOPRIO is not set
|
||||
CONFIG_BLK_DEBUG_FS=y
|
||||
# CONFIG_BLK_SED_OPAL is not set
|
||||
# CONFIG_BLK_INLINE_ENCRYPTION is not set
|
||||
@ -794,7 +796,6 @@ CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
@ -814,7 +815,6 @@ CONFIG_CMA_SYSFS=y
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_ZSWAP is not set
|
||||
# CONFIG_ZPOOL is not set
|
||||
# CONFIG_ZBUD is not set
|
||||
# CONFIG_ZSMALLOC is not set
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
# CONFIG_IDLE_PAGE_TRACKING is not set
|
||||
@ -1691,7 +1691,7 @@ CONFIG_FIXED_PHY=y
|
||||
# CONFIG_AMD_PHY is not set
|
||||
# CONFIG_ADIN_PHY is not set
|
||||
# CONFIG_AQUANTIA_PHY is not set
|
||||
# CONFIG_AX88796B_PHY is not set
|
||||
CONFIG_AX88796B_PHY=m
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
# CONFIG_BCM54140_PHY is not set
|
||||
# CONFIG_BCM7XXX_PHY is not set
|
||||
@ -1707,10 +1707,12 @@ CONFIG_FIXED_PHY=y
|
||||
# CONFIG_MARVELL_PHY is not set
|
||||
# CONFIG_MARVELL_10G_PHY is not set
|
||||
# CONFIG_MARVELL_88X2222_PHY is not set
|
||||
# CONFIG_MEDIATEK_GE_PHY is not set
|
||||
CONFIG_MICREL_PHY=y
|
||||
CONFIG_MICROCHIP_PHY=y
|
||||
CONFIG_MICROCHIP_T1_PHY=y
|
||||
# CONFIG_MICROSEMI_PHY is not set
|
||||
# CONFIG_MOTORCOMM_PHY is not set
|
||||
# CONFIG_NATIONAL_PHY is not set
|
||||
# CONFIG_NXP_C45_TJA11XX_PHY is not set
|
||||
# CONFIG_NXP_TJA11XX_PHY is not set
|
||||
@ -1732,6 +1734,7 @@ CONFIG_SMSC_PHY=y
|
||||
CONFIG_MICREL_KS8995MA=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_FWNODE_MDIO=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_MDIO_DEVRES=y
|
||||
CONFIG_MDIO_SUN4I=y
|
||||
@ -1940,7 +1943,13 @@ CONFIG_ZD1211RW=m
|
||||
CONFIG_USB_NET_RNDIS_WLAN=m
|
||||
# CONFIG_VIRT_WIFI is not set
|
||||
# CONFIG_WAN is not set
|
||||
|
||||
#
|
||||
# Wireless WAN
|
||||
#
|
||||
# CONFIG_WWAN is not set
|
||||
# end of Wireless WAN
|
||||
|
||||
# CONFIG_NETDEVSIM is not set
|
||||
# CONFIG_NET_FAILOVER is not set
|
||||
# CONFIG_ISDN is not set
|
||||
@ -2026,6 +2035,7 @@ CONFIG_JOYSTICK_XPAD_FF=y
|
||||
CONFIG_JOYSTICK_XPAD_LEDS=y
|
||||
# CONFIG_JOYSTICK_PSXPAD_SPI is not set
|
||||
# CONFIG_JOYSTICK_PXRC is not set
|
||||
# CONFIG_JOYSTICK_QWIIC is not set
|
||||
# CONFIG_JOYSTICK_FSIA6B is not set
|
||||
# CONFIG_INPUT_TABLET is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
@ -2169,9 +2179,9 @@ CONFIG_HW_RANDOM=m
|
||||
# CONFIG_HW_RANDOM_CCTRNG is not set
|
||||
# CONFIG_HW_RANDOM_XIPHERA is not set
|
||||
CONFIG_DEVMEM=y
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
# CONFIG_XILLYBUS is not set
|
||||
# CONFIG_XILLYUSB is not set
|
||||
# end of Character devices
|
||||
|
||||
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
|
||||
@ -2472,6 +2482,7 @@ CONFIG_AXP20X_POWER=y
|
||||
# CONFIG_CHARGER_SMB347 is not set
|
||||
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
|
||||
# CONFIG_BATTERY_GOLDFISH is not set
|
||||
# CONFIG_BATTERY_RT5033 is not set
|
||||
# CONFIG_CHARGER_RT9455 is not set
|
||||
# CONFIG_CHARGER_UCS1002 is not set
|
||||
# CONFIG_CHARGER_BD99954 is not set
|
||||
@ -2586,6 +2597,7 @@ CONFIG_HWMON=y
|
||||
# CONFIG_SENSORS_SHT15 is not set
|
||||
# CONFIG_SENSORS_SHT21 is not set
|
||||
# CONFIG_SENSORS_SHT3x is not set
|
||||
# CONFIG_SENSORS_SHT4x is not set
|
||||
# CONFIG_SENSORS_SHTC1 is not set
|
||||
# CONFIG_SENSORS_DME1737 is not set
|
||||
# CONFIG_SENSORS_EMC1403 is not set
|
||||
@ -2651,6 +2663,7 @@ CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
|
||||
CONFIG_WATCHDOG_OPEN_TIMEOUT=0
|
||||
# CONFIG_WATCHDOG_SYSFS is not set
|
||||
# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set
|
||||
|
||||
#
|
||||
# Watchdog Pretimeout Governors
|
||||
@ -2751,6 +2764,7 @@ CONFIG_MFD_AXP20X_RSB=y
|
||||
# CONFIG_MFD_RETU is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_MFD_PM8XXX is not set
|
||||
# CONFIG_MFD_RT4831 is not set
|
||||
# CONFIG_MFD_RT5033 is not set
|
||||
# CONFIG_MFD_RC5T583 is not set
|
||||
# CONFIG_MFD_RK808 is not set
|
||||
@ -2805,6 +2819,7 @@ CONFIG_MFD_WL1273_CORE=m
|
||||
# CONFIG_MFD_STPMIC1 is not set
|
||||
# CONFIG_MFD_STMFX is not set
|
||||
# CONFIG_MFD_ATC260X_I2C is not set
|
||||
# CONFIG_MFD_QCOM_PM8008 is not set
|
||||
# CONFIG_RAVE_SP_CORE is not set
|
||||
# CONFIG_MFD_INTEL_M10_BMC is not set
|
||||
# end of Multifunction device drivers
|
||||
@ -2835,6 +2850,7 @@ CONFIG_REGULATOR_GPIO=y
|
||||
# CONFIG_REGULATOR_MAX1586 is not set
|
||||
# CONFIG_REGULATOR_MAX8649 is not set
|
||||
# CONFIG_REGULATOR_MAX8660 is not set
|
||||
# CONFIG_REGULATOR_MAX8893 is not set
|
||||
# CONFIG_REGULATOR_MAX8952 is not set
|
||||
# CONFIG_REGULATOR_MAX8973 is not set
|
||||
# CONFIG_REGULATOR_MAX77826 is not set
|
||||
@ -2852,6 +2868,8 @@ CONFIG_REGULATOR_GPIO=y
|
||||
# CONFIG_REGULATOR_PV88090 is not set
|
||||
# CONFIG_REGULATOR_PWM is not set
|
||||
# CONFIG_REGULATOR_RT4801 is not set
|
||||
# CONFIG_REGULATOR_RT6160 is not set
|
||||
# CONFIG_REGULATOR_RT6245 is not set
|
||||
# CONFIG_REGULATOR_RTMV20 is not set
|
||||
# CONFIG_REGULATOR_SLG51000 is not set
|
||||
CONFIG_REGULATOR_SY8106A=y
|
||||
@ -2945,6 +2963,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_VIDEO_TUNER=m
|
||||
CONFIG_V4L2_MEM2MEM_DEV=y
|
||||
CONFIG_V4L2_FWNODE=m
|
||||
CONFIG_V4L2_ASYNC=m
|
||||
CONFIG_VIDEOBUF_GEN=m
|
||||
CONFIG_VIDEOBUF_VMALLOC=m
|
||||
# end of Video4Linux options
|
||||
@ -2974,7 +2993,6 @@ CONFIG_DVB_MAX_ADAPTERS=16
|
||||
#
|
||||
# Media drivers
|
||||
#
|
||||
CONFIG_TTPCI_EEPROM=m
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
|
||||
#
|
||||
@ -3104,6 +3122,7 @@ CONFIG_MEDIA_COMMON_OPTIONS=y
|
||||
#
|
||||
CONFIG_VIDEO_CX2341X=m
|
||||
CONFIG_VIDEO_TVEEPROM=m
|
||||
CONFIG_TTPCI_EEPROM=m
|
||||
CONFIG_CYPRESS_FIRMWARE=m
|
||||
CONFIG_VIDEOBUF2_CORE=y
|
||||
CONFIG_VIDEOBUF2_V4L2=y
|
||||
@ -3251,6 +3270,7 @@ CONFIG_VIDEO_ST_MIPID02=m
|
||||
# Camera sensor devices
|
||||
#
|
||||
# CONFIG_VIDEO_HI556 is not set
|
||||
# CONFIG_VIDEO_IMX208 is not set
|
||||
# CONFIG_VIDEO_IMX214 is not set
|
||||
# CONFIG_VIDEO_IMX219 is not set
|
||||
# CONFIG_VIDEO_IMX258 is not set
|
||||
@ -3440,7 +3460,6 @@ CONFIG_DVB_TDA10071=m
|
||||
#
|
||||
# DVB-T (terrestrial) frontends
|
||||
#
|
||||
CONFIG_DVB_SP8870=m
|
||||
CONFIG_DVB_SP887X=m
|
||||
CONFIG_DVB_CX22700=m
|
||||
CONFIG_DVB_CX22702=m
|
||||
@ -3563,7 +3582,6 @@ CONFIG_DRM_MIPI_DSI=y
|
||||
# CONFIG_DRM_DEBUG_MM is not set
|
||||
# CONFIG_DRM_DEBUG_SELFTEST is not set
|
||||
CONFIG_DRM_KMS_HELPER=y
|
||||
CONFIG_DRM_KMS_FB_HELPER=y
|
||||
# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
|
||||
CONFIG_DRM_FBDEV_EMULATION=y
|
||||
CONFIG_DRM_FBDEV_OVERALLOC=100
|
||||
@ -3646,6 +3664,7 @@ CONFIG_DRM_DISPLAY_CONNECTOR=m
|
||||
# CONFIG_DRM_LONTIUM_LT8912B is not set
|
||||
# CONFIG_DRM_LONTIUM_LT9611 is not set
|
||||
# CONFIG_DRM_LONTIUM_LT9611UXC is not set
|
||||
# CONFIG_DRM_ITE_IT66121 is not set
|
||||
# CONFIG_DRM_LVDS_CODEC is not set
|
||||
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
|
||||
# CONFIG_DRM_NWL_MIPI_DSI is not set
|
||||
@ -3663,6 +3682,7 @@ CONFIG_DRM_SIMPLE_BRIDGE=m
|
||||
# CONFIG_DRM_TOSHIBA_TC358768 is not set
|
||||
# CONFIG_DRM_TOSHIBA_TC358775 is not set
|
||||
# CONFIG_DRM_TI_TFP410 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI83 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI86 is not set
|
||||
# CONFIG_DRM_TI_TPD12S015 is not set
|
||||
# CONFIG_DRM_ANALOGIX_ANX6345 is not set
|
||||
@ -3681,6 +3701,7 @@ CONFIG_DRM_DW_HDMI_CEC=y
|
||||
# CONFIG_DRM_MXSFB is not set
|
||||
# CONFIG_DRM_ARCPGU is not set
|
||||
# CONFIG_DRM_GM12U320 is not set
|
||||
# CONFIG_DRM_SIMPLEDRM is not set
|
||||
# CONFIG_TINYDRM_HX8357D is not set
|
||||
# CONFIG_TINYDRM_ILI9225 is not set
|
||||
# CONFIG_TINYDRM_ILI9341 is not set
|
||||
@ -3935,12 +3956,14 @@ CONFIG_SND_SOC_HDMI_CODEC=y
|
||||
# CONFIG_SND_SOC_RK3328 is not set
|
||||
# CONFIG_SND_SOC_RT5616 is not set
|
||||
# CONFIG_SND_SOC_RT5631 is not set
|
||||
# CONFIG_SND_SOC_RT5640 is not set
|
||||
# CONFIG_SND_SOC_RT5659 is not set
|
||||
# CONFIG_SND_SOC_SGTL5000 is not set
|
||||
# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
|
||||
# CONFIG_SND_SOC_SIMPLE_MUX is not set
|
||||
CONFIG_SND_SOC_SPDIF=y
|
||||
# CONFIG_SND_SOC_SSM2305 is not set
|
||||
# CONFIG_SND_SOC_SSM2518 is not set
|
||||
# CONFIG_SND_SOC_SSM2602_SPI is not set
|
||||
# CONFIG_SND_SOC_SSM2602_I2C is not set
|
||||
# CONFIG_SND_SOC_SSM4567 is not set
|
||||
@ -3957,6 +3980,7 @@ CONFIG_SND_SOC_SPDIF=y
|
||||
# CONFIG_SND_SOC_TAS6424 is not set
|
||||
# CONFIG_SND_SOC_TDA7419 is not set
|
||||
# CONFIG_SND_SOC_TFA9879 is not set
|
||||
# CONFIG_SND_SOC_TFA989X is not set
|
||||
# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
|
||||
# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
|
||||
# CONFIG_SND_SOC_TLV320AIC31XX is not set
|
||||
@ -3993,7 +4017,6 @@ CONFIG_SND_SOC_SPDIF=y
|
||||
# CONFIG_SND_SOC_WM8978 is not set
|
||||
# CONFIG_SND_SOC_WM8985 is not set
|
||||
# CONFIG_SND_SOC_ZL38060 is not set
|
||||
# CONFIG_SND_SOC_ZX_AUD96P22 is not set
|
||||
# CONFIG_SND_SOC_MAX9759 is not set
|
||||
# CONFIG_SND_SOC_MT6351 is not set
|
||||
# CONFIG_SND_SOC_MT6358 is not set
|
||||
@ -4760,9 +4783,17 @@ CONFIG_VIDEO_SUNXI_CEDRUS=y
|
||||
# CONFIG_CHROME_PLATFORMS is not set
|
||||
# CONFIG_MELLANOX_PLATFORM is not set
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
|
||||
#
|
||||
# Clock driver for ARM Reference designs
|
||||
#
|
||||
# CONFIG_ICST is not set
|
||||
# CONFIG_CLK_SP810 is not set
|
||||
# end of Clock driver for ARM Reference designs
|
||||
|
||||
# CONFIG_LMK04832 is not set
|
||||
# CONFIG_COMMON_CLK_MAX9485 is not set
|
||||
# CONFIG_COMMON_CLK_SI5341 is not set
|
||||
# CONFIG_COMMON_CLK_SI5351 is not set
|
||||
@ -4933,6 +4964,8 @@ CONFIG_IIO_SW_TRIGGER=y
|
||||
# CONFIG_DMARD06 is not set
|
||||
# CONFIG_DMARD09 is not set
|
||||
# CONFIG_DMARD10 is not set
|
||||
# CONFIG_FXLS8962AF_I2C is not set
|
||||
# CONFIG_FXLS8962AF_SPI is not set
|
||||
# CONFIG_IIO_ST_ACCEL_3AXIS is not set
|
||||
# CONFIG_KXSD9 is not set
|
||||
# CONFIG_KXCJK1013 is not set
|
||||
@ -4946,6 +4979,7 @@ CONFIG_IIO_SW_TRIGGER=y
|
||||
# CONFIG_MXC4005 is not set
|
||||
# CONFIG_MXC6255 is not set
|
||||
# CONFIG_SCA3000 is not set
|
||||
# CONFIG_SCA3300 is not set
|
||||
# CONFIG_STK8312 is not set
|
||||
# CONFIG_STK8BA50 is not set
|
||||
# end of Accelerometers
|
||||
@ -5010,6 +5044,7 @@ CONFIG_SUN4I_GPADC=y
|
||||
# CONFIG_TI_ADS124S08 is not set
|
||||
# CONFIG_TI_ADS131E08 is not set
|
||||
# CONFIG_TI_TLC4541 is not set
|
||||
# CONFIG_TI_TSC2046 is not set
|
||||
# CONFIG_VF610_ADC is not set
|
||||
# CONFIG_XILINX_XADC is not set
|
||||
# end of Analog to digital converters
|
||||
@ -5044,7 +5079,8 @@ CONFIG_SUN4I_GPADC=y
|
||||
# CONFIG_PMS7003 is not set
|
||||
# CONFIG_SCD30_CORE is not set
|
||||
# CONFIG_SENSIRION_SGP30 is not set
|
||||
# CONFIG_SPS30 is not set
|
||||
# CONFIG_SPS30_I2C is not set
|
||||
# CONFIG_SPS30_SERIAL is not set
|
||||
# CONFIG_VZ89X is not set
|
||||
# end of Chemical Sensors
|
||||
|
||||
@ -5187,6 +5223,7 @@ CONFIG_SUN4I_GPADC=y
|
||||
# CONFIG_INV_MPU6050_I2C is not set
|
||||
# CONFIG_INV_MPU6050_SPI is not set
|
||||
# CONFIG_IIO_ST_LSM6DSX is not set
|
||||
# CONFIG_IIO_ST_LSM9DS0 is not set
|
||||
# end of Inertial measurement units
|
||||
|
||||
#
|
||||
@ -5228,6 +5265,7 @@ CONFIG_SUN4I_GPADC=y
|
||||
# CONFIG_TCS3472 is not set
|
||||
# CONFIG_SENSORS_TSL2563 is not set
|
||||
# CONFIG_TSL2583 is not set
|
||||
# CONFIG_TSL2591 is not set
|
||||
# CONFIG_TSL2772 is not set
|
||||
# CONFIG_TSL4531 is not set
|
||||
# CONFIG_US5182D is not set
|
||||
@ -5352,6 +5390,7 @@ CONFIG_SUN4I_GPADC=y
|
||||
# CONFIG_MLX90632 is not set
|
||||
# CONFIG_TMP006 is not set
|
||||
# CONFIG_TMP007 is not set
|
||||
# CONFIG_TMP117 is not set
|
||||
# CONFIG_TSYS01 is not set
|
||||
# CONFIG_TSYS02D is not set
|
||||
# CONFIG_MAX31856 is not set
|
||||
@ -5377,8 +5416,7 @@ CONFIG_ARM_GIC_MAX_NR=1
|
||||
# CONFIG_IPACK_BUS is not set
|
||||
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
# CONFIG_RESET_BRCMSTB_RESCAL is not set
|
||||
# CONFIG_RESET_INTEL_GW is not set
|
||||
# CONFIG_RESET_MCHP_SPARX5 is not set
|
||||
CONFIG_RESET_SIMPLE=y
|
||||
CONFIG_RESET_SUNXI=y
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
@ -5388,6 +5426,7 @@ CONFIG_RESET_SUNXI=y
|
||||
#
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PHY_MIPI_DPHY=y
|
||||
# CONFIG_PHY_CAN_TRANSCEIVER is not set
|
||||
CONFIG_PHY_SUN4I_USB=y
|
||||
CONFIG_PHY_SUN6I_MIPI_DPHY=y
|
||||
CONFIG_PHY_SUN9I_USB=y
|
||||
@ -6052,7 +6091,6 @@ CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SBITMAP=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
# end of Library routines
|
||||
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
@ -6066,6 +6104,7 @@ CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
#
|
||||
CONFIG_PRINTK_TIME=y
|
||||
# CONFIG_PRINTK_CALLER is not set
|
||||
# CONFIG_STACKTRACE_BUILD_ID is not set
|
||||
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
|
||||
CONFIG_CONSOLE_LOGLEVEL_QUIET=4
|
||||
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
|
||||
@ -6086,7 +6125,7 @@ CONFIG_FRAME_WARN=1024
|
||||
# CONFIG_HEADERS_INSTALL is not set
|
||||
# CONFIG_DEBUG_SECTION_MISMATCH is not set
|
||||
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
|
||||
# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set
|
||||
# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set
|
||||
# CONFIG_VMLINUX_MAP is not set
|
||||
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
|
||||
# end of Compile-time checks and compiler options
|
||||
@ -6251,7 +6290,6 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y
|
||||
# CONFIG_KCOV is not set
|
||||
CONFIG_RUNTIME_TESTING_MENU=y
|
||||
# CONFIG_LKDTM is not set
|
||||
# CONFIG_TEST_LIST_SORT is not set
|
||||
# CONFIG_TEST_MIN_HEAP is not set
|
||||
# CONFIG_TEST_SORT is not set
|
||||
# CONFIG_TEST_DIV64 is not set
|
||||
@ -6262,10 +6300,12 @@ CONFIG_RUNTIME_TESTING_MENU=y
|
||||
# CONFIG_PERCPU_TEST is not set
|
||||
# CONFIG_ATOMIC64_SELFTEST is not set
|
||||
# CONFIG_TEST_HEXDUMP is not set
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
# CONFIG_TEST_STRING_HELPERS is not set
|
||||
# CONFIG_TEST_STRSCPY is not set
|
||||
# CONFIG_TEST_KSTRTOX is not set
|
||||
# CONFIG_TEST_PRINTF is not set
|
||||
# CONFIG_TEST_SCANF is not set
|
||||
# CONFIG_TEST_BITMAP is not set
|
||||
# CONFIG_TEST_UUID is not set
|
||||
# CONFIG_TEST_XARRAY is not set
|
||||
|
@ -10,7 +10,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
@@ -641,6 +641,7 @@
|
||||
@@ -646,6 +646,7 @@
|
||||
reg = <0x01c20000 0x400>;
|
||||
clocks = <&osc24M>, <&rtc 0>;
|
||||
clock-names = "hosc", "losc";
|
||||
@ -18,7 +18,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -1233,6 +1234,7 @@
|
||||
@@ -1267,6 +1268,7 @@
|
||||
clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
|
||||
<&ccu CLK_PLL_PERIPH0>;
|
||||
clock-names = "hosc", "losc", "iosc", "pll-periph";
|
||||
|
@ -18,7 +18,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -916,6 +917,7 @@
|
||||
@@ -925,6 +926,7 @@
|
||||
clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
|
||||
<&ccu CLK_PLL_PERIPH0>;
|
||||
clock-names = "hosc", "losc", "iosc", "pll-periph";
|
||||
|
@ -54,7 +54,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
}
|
||||
|
||||
static int scpi_remove(struct platform_device *pdev)
|
||||
@@ -905,6 +911,7 @@ static int scpi_probe(struct platform_de
|
||||
@@ -913,6 +919,7 @@ static int scpi_probe(struct platform_de
|
||||
struct resource res;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
@ -62,7 +62,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
|
||||
scpi_info = devm_kzalloc(dev, sizeof(*scpi_info), GFP_KERNEL);
|
||||
if (!scpi_info)
|
||||
@@ -918,6 +925,14 @@ static int scpi_probe(struct platform_de
|
||||
@@ -926,6 +933,14 @@ static int scpi_probe(struct platform_de
|
||||
dev_err(dev, "no mboxes property in '%pOF'\n", np);
|
||||
return -ENODEV;
|
||||
}
|
||||
@ -77,7 +77,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
|
||||
scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan),
|
||||
GFP_KERNEL);
|
||||
@@ -963,15 +978,34 @@ static int scpi_probe(struct platform_de
|
||||
@@ -974,15 +989,34 @@ static int scpi_probe(struct platform_de
|
||||
mutex_init(&pchan->xfers_lock);
|
||||
|
||||
ret = scpi_alloc_xfer_list(dev, pchan);
|
||||
|
@ -22,9 +22,9 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
+ };
|
||||
+
|
||||
sound: sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "sun50i-a64-audio";
|
||||
@@ -339,6 +346,19 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@@ -344,6 +351,19 @@
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
|
@ -0,0 +1,45 @@
|
||||
From 229e5bdcd39ed3ca0a71dc8500ba4ea90d4415db Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sun, 6 Jun 2021 10:23:13 +0200
|
||||
Subject: [PATCH] media: hevc: Add segment address field
|
||||
|
||||
If HEVC frame consists of multiple slices, segment address has to be
|
||||
known in order to properly decode it.
|
||||
|
||||
Add segment address field to slice parameters.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
|
||||
---
|
||||
Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 3 +++
|
||||
include/media/hevc-ctrls.h | 3 ++-
|
||||
2 files changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
|
||||
+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
|
||||
@@ -3000,6 +3000,9 @@ enum v4l2_mpeg_video_hevc_size_of_length
|
||||
* - __u8
|
||||
- ``pic_struct``
|
||||
-
|
||||
+ * - __u32
|
||||
+ - ``slice_segment_addr``
|
||||
+ -
|
||||
* - __u8
|
||||
- ``ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
|
||||
- The list of L0 reference elements as indices in the DPB.
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -196,10 +196,11 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u8 pic_struct;
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
|
||||
+ __u32 slice_segment_addr;
|
||||
__u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
||||
__u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
||||
|
||||
- __u8 padding[5];
|
||||
+ __u8 padding;
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
|
||||
struct v4l2_hevc_pred_weight_table pred_weight_table;
|
@ -1,85 +0,0 @@
|
||||
From 82a8ceccbaf9aa3d8cbc56d10e3905eec0d4ffb4 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 26 Oct 2019 13:55:15 +0200
|
||||
Subject: [PATCH 23/44] media: uapi: hevc: Add scaling matrix control
|
||||
|
||||
HEVC has a scaling matrix concept. Add support for it.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
drivers/media/v4l2-core/v4l2-ctrls.c | 10 ++++++++++
|
||||
include/media/hevc-ctrls.h | 11 +++++++++++
|
||||
2 files changed, 21 insertions(+)
|
||||
|
||||
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
|
||||
@@ -1041,6 +1041,7 @@ const char *v4l2_ctrl_get_name(u32 id)
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_SPS: return "HEVC Sequence Parameter Set";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_PPS: return "HEVC Picture Parameter Set";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: return "HEVC Slice Parameters";
|
||||
+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX: return "HEVC Scaling Matrix";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code";
|
||||
|
||||
@@ -1526,6 +1527,9 @@ void v4l2_ctrl_fill(u32 id, const char *
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS:
|
||||
*type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS;
|
||||
break;
|
||||
+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX:
|
||||
+ *type = V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX;
|
||||
+ break;
|
||||
case V4L2_CID_UNIT_CELL_SIZE:
|
||||
*type = V4L2_CTRL_TYPE_AREA;
|
||||
*flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
||||
@@ -2237,6 +2241,9 @@ static int std_validate_compound(const s
|
||||
|
||||
break;
|
||||
|
||||
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
|
||||
+ break;
|
||||
+
|
||||
case V4L2_CTRL_TYPE_AREA:
|
||||
area = p;
|
||||
if (!area->width || !area->height)
|
||||
@@ -2953,6 +2960,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
|
||||
case V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY:
|
||||
elem_size = sizeof(struct v4l2_ctrl_hdr10_mastering_display);
|
||||
break;
|
||||
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
|
||||
+ elem_size = sizeof(struct v4l2_ctrl_hevc_scaling_matrix);
|
||||
+ break;
|
||||
case V4L2_CTRL_TYPE_AREA:
|
||||
elem_size = sizeof(struct v4l2_area);
|
||||
break;
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -19,6 +19,7 @@
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_CODEC_BASE + 1008)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_CODEC_BASE + 1009)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_CODEC_BASE + 1010)
|
||||
+#define V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (V4L2_CID_CODEC_BASE + 1011)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_CODEC_BASE + 1015)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_CODEC_BASE + 1016)
|
||||
|
||||
@@ -26,6 +27,7 @@
|
||||
#define V4L2_CTRL_TYPE_HEVC_SPS 0x0120
|
||||
#define V4L2_CTRL_TYPE_HEVC_PPS 0x0121
|
||||
#define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122
|
||||
+#define V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX 0x0123
|
||||
|
||||
enum v4l2_mpeg_video_hevc_decode_mode {
|
||||
V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED,
|
||||
@@ -209,4 +211,13 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u64 flags;
|
||||
};
|
||||
|
||||
+struct v4l2_ctrl_hevc_scaling_matrix {
|
||||
+ __u8 scaling_list_4x4[6][16];
|
||||
+ __u8 scaling_list_8x8[6][64];
|
||||
+ __u8 scaling_list_16x16[6][64];
|
||||
+ __u8 scaling_list_32x32[2][64];
|
||||
+ __u8 scaling_list_dc_coef_16x16[6];
|
||||
+ __u8 scaling_list_dc_coef_32x32[2];
|
||||
+};
|
||||
+
|
||||
#endif
|
@ -0,0 +1,180 @@
|
||||
From 478e8d8b3997e15825c49f6f716faf26e1becaeb Mon Sep 17 00:00:00 2001
|
||||
From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
|
||||
Date: Thu, 15 Jul 2021 17:12:22 +0200
|
||||
Subject: [PATCH] media: hevc: Add scaling matrix control
|
||||
|
||||
HEVC scaling lists are used for the scaling process for transform
|
||||
coefficients.
|
||||
V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED has to set when they are
|
||||
encoded in the bitstream.
|
||||
|
||||
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
|
||||
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
|
||||
---
|
||||
.../media/v4l/ext-ctrls-codec.rst | 57 +++++++++++++++++++
|
||||
.../media/v4l/vidioc-queryctrl.rst | 6 ++
|
||||
drivers/media/v4l2-core/v4l2-ctrls-core.c | 6 ++
|
||||
drivers/media/v4l2-core/v4l2-ctrls-defs.c | 4 ++
|
||||
include/media/hevc-ctrls.h | 11 ++++
|
||||
5 files changed, 84 insertions(+)
|
||||
|
||||
--- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
|
||||
+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
|
||||
@@ -3071,6 +3071,63 @@ enum v4l2_mpeg_video_hevc_size_of_length
|
||||
|
||||
\normalsize
|
||||
|
||||
+``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (struct)``
|
||||
+ Specifies the HEVC scaling matrix parameters used for the scaling process
|
||||
+ for transform coefficients.
|
||||
+ These matrix and parameters are defined according to :ref:`hevc`.
|
||||
+ They are described in section 7.4.5 "Scaling list data semantics" of
|
||||
+ the specification.
|
||||
+
|
||||
+.. c:type:: v4l2_ctrl_hevc_scaling_matrix
|
||||
+
|
||||
+.. raw:: latex
|
||||
+
|
||||
+ \scriptsize
|
||||
+
|
||||
+.. tabularcolumns:: |p{5.4cm}|p{6.8cm}|p{5.1cm}|
|
||||
+
|
||||
+.. cssclass:: longtable
|
||||
+
|
||||
+.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix
|
||||
+ :header-rows: 0
|
||||
+ :stub-columns: 0
|
||||
+ :widths: 1 1 2
|
||||
+
|
||||
+ * - __u8
|
||||
+ - ``scaling_list_4x4[6][16]``
|
||||
+ - Scaling list is used for the scaling process for transform
|
||||
+ coefficients. The values on each scaling list are expected
|
||||
+ in raster scan order.
|
||||
+ * - __u8
|
||||
+ - ``scaling_list_8x8[6][64]``
|
||||
+ - Scaling list is used for the scaling process for transform
|
||||
+ coefficients. The values on each scaling list are expected
|
||||
+ in raster scan order.
|
||||
+ * - __u8
|
||||
+ - ``scaling_list_16x16[6][64]``
|
||||
+ - Scaling list is used for the scaling process for transform
|
||||
+ coefficients. The values on each scaling list are expected
|
||||
+ in raster scan order.
|
||||
+ * - __u8
|
||||
+ - ``scaling_list_32x32[2][64]``
|
||||
+ - Scaling list is used for the scaling process for transform
|
||||
+ coefficients. The values on each scaling list are expected
|
||||
+ in raster scan order.
|
||||
+ * - __u8
|
||||
+ - ``scaling_list_dc_coef_16x16[6]``
|
||||
+ - Scaling list is used for the scaling process for transform
|
||||
+ coefficients. The values on each scaling list are expected
|
||||
+ in raster scan order.
|
||||
+ * - __u8
|
||||
+ - ``scaling_list_dc_coef_32x32[2]``
|
||||
+ - Scaling list is used for the scaling process for transform
|
||||
+ coefficients. The values on each scaling list are expected
|
||||
+ in raster scan order.
|
||||
+
|
||||
+.. raw:: latex
|
||||
+
|
||||
+ \normalsize
|
||||
+
|
||||
.. c:type:: v4l2_hevc_dpb_entry
|
||||
|
||||
.. raw:: latex
|
||||
--- a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst
|
||||
+++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst
|
||||
@@ -495,6 +495,12 @@ See also the examples in :ref:`control`.
|
||||
- n/a
|
||||
- A struct :c:type:`v4l2_ctrl_hevc_slice_params`, containing HEVC
|
||||
slice parameters for stateless video decoders.
|
||||
+ * - ``V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX``
|
||||
+ - n/a
|
||||
+ - n/a
|
||||
+ - n/a
|
||||
+ - A struct :c:type:`v4l2_ctrl_hevc_scaling_matrix`, containing HEVC
|
||||
+ scaling matrix for stateless video decoders.
|
||||
* - ``V4L2_CTRL_TYPE_VP8_FRAME``
|
||||
- n/a
|
||||
- n/a
|
||||
--- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
|
||||
@@ -687,6 +687,9 @@ static int std_validate_compound(const s
|
||||
|
||||
break;
|
||||
|
||||
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
|
||||
+ break;
|
||||
+
|
||||
case V4L2_CTRL_TYPE_AREA:
|
||||
area = p;
|
||||
if (!area->width || !area->height)
|
||||
@@ -1240,6 +1243,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
|
||||
case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
|
||||
elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params);
|
||||
break;
|
||||
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
|
||||
+ elem_size = sizeof(struct v4l2_ctrl_hevc_scaling_matrix);
|
||||
+ break;
|
||||
case V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS:
|
||||
elem_size = sizeof(struct v4l2_ctrl_hevc_decode_params);
|
||||
break;
|
||||
--- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c
|
||||
@@ -996,6 +996,7 @@ const char *v4l2_ctrl_get_name(u32 id)
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_SPS: return "HEVC Sequence Parameter Set";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_PPS: return "HEVC Picture Parameter Set";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: return "HEVC Slice Parameters";
|
||||
+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX: return "HEVC Scaling Matrix";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS: return "HEVC Decode Parameters";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode";
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code";
|
||||
@@ -1488,6 +1489,9 @@ void v4l2_ctrl_fill(u32 id, const char *
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS:
|
||||
*type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS;
|
||||
break;
|
||||
+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX:
|
||||
+ *type = V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX;
|
||||
+ break;
|
||||
case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS:
|
||||
*type = V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS;
|
||||
break;
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -19,6 +19,7 @@
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_CODEC_BASE + 1008)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_CODEC_BASE + 1009)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_CODEC_BASE + 1010)
|
||||
+#define V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (V4L2_CID_CODEC_BASE + 1011)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS (V4L2_CID_CODEC_BASE + 1012)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_CODEC_BASE + 1015)
|
||||
#define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_CODEC_BASE + 1016)
|
||||
@@ -27,6 +28,7 @@
|
||||
#define V4L2_CTRL_TYPE_HEVC_SPS 0x0120
|
||||
#define V4L2_CTRL_TYPE_HEVC_PPS 0x0121
|
||||
#define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122
|
||||
+#define V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX 0x0123
|
||||
#define V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS 0x0124
|
||||
|
||||
enum v4l2_mpeg_video_hevc_decode_mode {
|
||||
@@ -225,6 +227,15 @@ struct v4l2_ctrl_hevc_decode_params {
|
||||
__u64 flags;
|
||||
};
|
||||
|
||||
+struct v4l2_ctrl_hevc_scaling_matrix {
|
||||
+ __u8 scaling_list_4x4[6][16];
|
||||
+ __u8 scaling_list_8x8[6][64];
|
||||
+ __u8 scaling_list_16x16[6][64];
|
||||
+ __u8 scaling_list_32x32[2][64];
|
||||
+ __u8 scaling_list_dc_coef_16x16[6];
|
||||
+ __u8 scaling_list_dc_coef_32x32[2];
|
||||
+};
|
||||
+
|
||||
/* MPEG-class control IDs specific to the Hantro driver as defined by V4L2 */
|
||||
#define V4L2_CID_CODEC_HANTRO_BASE (V4L2_CTRL_CLASS_CODEC | 0x1200)
|
||||
/*
|
@ -1,12 +1,14 @@
|
||||
From d99740197a9776b9332d21b9f3b05dab658a90eb Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 26 Oct 2019 15:44:15 +0200
|
||||
Subject: [PATCH 26/44] media: cedrus: hevc: Add support for multiple slices
|
||||
From d92a4a27d983032267b231a32be98a11a9995e5c Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sun, 6 Jun 2021 10:23:14 +0200
|
||||
Subject: [PATCH] media: cedrus: hevc: Add support for multiple slices
|
||||
|
||||
Now that segment address is available, support for multi-slice frames
|
||||
can be easily added.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
|
||||
---
|
||||
.../staging/media/sunxi/cedrus/cedrus_h265.c | 26 ++++++++++++-------
|
||||
.../staging/media/sunxi/cedrus/cedrus_video.c | 1 +
|
||||
@ -14,17 +16,17 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
|
||||
@@ -309,6 +309,8 @@ static void cedrus_h265_setup(struct ced
|
||||
const struct v4l2_ctrl_hevc_pps *pps;
|
||||
@@ -247,6 +247,8 @@ static void cedrus_h265_setup(struct ced
|
||||
const struct v4l2_ctrl_hevc_slice_params *slice_params;
|
||||
const struct v4l2_ctrl_hevc_decode_params *decode_params;
|
||||
const struct v4l2_hevc_pred_weight_table *pred_weight_table;
|
||||
+ unsigned int width_in_ctb_luma, ctb_size_luma;
|
||||
+ unsigned int log2_max_luma_coding_block_size;
|
||||
dma_addr_t src_buf_addr;
|
||||
dma_addr_t src_buf_end_addr;
|
||||
u32 chroma_log2_weight_denom;
|
||||
@@ -321,15 +323,17 @@ static void cedrus_h265_setup(struct ced
|
||||
slice_params = run->h265.slice_params;
|
||||
@@ -260,15 +262,17 @@ static void cedrus_h265_setup(struct ced
|
||||
decode_params = run->h265.decode_params;
|
||||
pred_weight_table = &slice_params->pred_weight_table;
|
||||
|
||||
+ log2_max_luma_coding_block_size =
|
||||
@ -46,7 +48,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
/*
|
||||
* Each CTB requires a MV col buffer with a specific unit size.
|
||||
@@ -383,15 +387,17 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -322,15 +326,17 @@ static void cedrus_h265_setup(struct ced
|
||||
reg = VE_DEC_H265_BITS_END_ADDR_BASE(src_buf_end_addr);
|
||||
cedrus_write(dev, VE_DEC_H265_BITS_END_ADDR, reg);
|
||||
|
||||
@ -67,9 +69,9 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
/* Initialize bitstream access. */
|
||||
cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC);
|
||||
@@ -543,8 +549,8 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -482,8 +488,8 @@ static void cedrus_h265_setup(struct ced
|
||||
V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT,
|
||||
pps->flags);
|
||||
slice_params->flags);
|
||||
|
||||
- /* FIXME: For multi-slice support. */
|
||||
- reg |= VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
|
@ -1,36 +0,0 @@
|
||||
From e61cf76fca5984dd9edcb0daf6c5cb5278f32e05 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 26 Oct 2019 15:42:28 +0200
|
||||
Subject: [PATCH 25/44] media: uapi: hevc: Add segment address field
|
||||
|
||||
If HEVC frame consists of multiple slices, segment address has to be
|
||||
known in order to properly decode it.
|
||||
|
||||
Add segment address field to slice parameters.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
include/media/hevc-ctrls.h | 5 ++++-
|
||||
1 file changed, 4 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -167,6 +167,9 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u32 bit_size;
|
||||
__u32 data_bit_offset;
|
||||
|
||||
+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
|
||||
+ __u32 slice_segment_addr;
|
||||
+
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
|
||||
__u8 nal_unit_type;
|
||||
__u8 nuh_temporal_id_plus1;
|
||||
@@ -200,7 +203,7 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u8 num_rps_poc_st_curr_after;
|
||||
__u8 num_rps_poc_lt_curr;
|
||||
|
||||
- __u8 padding;
|
||||
+ __u8 padding[5];
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
|
||||
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
@ -1,22 +1,24 @@
|
||||
From b4b79b4eeacb63f0a72c866526e4a2021a201090 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 26 Oct 2019 13:58:49 +0200
|
||||
Subject: [PATCH 24/44] media: cedrus: hevc: Add support for scaling matrix
|
||||
From 297289d611b802ecd232df6cab02987f9059c3bc Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sun, 6 Jun 2021 08:50:50 +0200
|
||||
Subject: [PATCH] media: cedrus: hevc: Add support for scaling lists
|
||||
|
||||
HEVC frames may use scaling list feature. Add support for it.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
|
||||
---
|
||||
drivers/staging/media/sunxi/cedrus/cedrus.c | 7 ++
|
||||
drivers/staging/media/sunxi/cedrus/cedrus.c | 6 ++
|
||||
drivers/staging/media/sunxi/cedrus/cedrus.h | 1 +
|
||||
.../staging/media/sunxi/cedrus/cedrus_dec.c | 2 +
|
||||
.../staging/media/sunxi/cedrus/cedrus_h265.c | 70 ++++++++++++++++++-
|
||||
.../staging/media/sunxi/cedrus/cedrus_regs.h | 2 +
|
||||
5 files changed, 81 insertions(+), 1 deletion(-)
|
||||
5 files changed, 80 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
@@ -131,6 +131,12 @@ static const struct cedrus_control cedru
|
||||
@@ -137,6 +137,12 @@ static const struct cedrus_control cedru
|
||||
},
|
||||
{
|
||||
.cfg = {
|
||||
@ -31,20 +33,20 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
.def = V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED,
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
@@ -76,6 +76,7 @@ struct cedrus_h265_run {
|
||||
const struct v4l2_ctrl_hevc_sps *sps;
|
||||
@@ -78,6 +78,7 @@ struct cedrus_h265_run {
|
||||
const struct v4l2_ctrl_hevc_pps *pps;
|
||||
const struct v4l2_ctrl_hevc_slice_params *slice_params;
|
||||
const struct v4l2_ctrl_hevc_decode_params *decode_params;
|
||||
+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix;
|
||||
};
|
||||
|
||||
struct cedrus_vp8_run {
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
|
||||
@@ -68,6 +68,8 @@ void cedrus_device_run(void *priv)
|
||||
V4L2_CID_MPEG_VIDEO_HEVC_PPS);
|
||||
run.h265.slice_params = cedrus_find_control_data(ctx,
|
||||
@@ -72,6 +72,8 @@ void cedrus_device_run(void *priv)
|
||||
V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS);
|
||||
run.h265.decode_params = cedrus_find_control_data(ctx,
|
||||
V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS);
|
||||
+ run.h265.scaling_matrix = cedrus_find_control_data(ctx,
|
||||
+ V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX);
|
||||
break;
|
||||
@ -122,7 +124,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
static void cedrus_h265_setup(struct cedrus_ctx *ctx,
|
||||
struct cedrus_run *run)
|
||||
{
|
||||
@@ -519,7 +582,12 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -527,7 +590,12 @@ static void cedrus_h265_setup(struct ced
|
||||
|
||||
/* Scaling list. */
|
||||
|
@ -12,7 +12,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
@@ -142,6 +142,8 @@ struct cedrus_ctx {
|
||||
@@ -144,6 +144,8 @@ struct cedrus_ctx {
|
||||
ssize_t mv_col_buf_unit_size;
|
||||
void *neighbor_info_buf;
|
||||
dma_addr_t neighbor_info_buf_addr;
|
||||
@ -85,7 +85,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
static void cedrus_h265_setup(struct cedrus_ctx *ctx,
|
||||
struct cedrus_run *run)
|
||||
{
|
||||
@@ -311,6 +366,7 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -312,6 +367,7 @@ static void cedrus_h265_setup(struct ced
|
||||
const struct v4l2_hevc_pred_weight_table *pred_weight_table;
|
||||
unsigned int width_in_ctb_luma, ctb_size_luma;
|
||||
unsigned int log2_max_luma_coding_block_size;
|
||||
@ -93,7 +93,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
dma_addr_t src_buf_addr;
|
||||
dma_addr_t src_buf_end_addr;
|
||||
u32 chroma_log2_weight_denom;
|
||||
@@ -388,12 +444,19 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -390,12 +446,19 @@ static void cedrus_h265_setup(struct ced
|
||||
cedrus_write(dev, VE_DEC_H265_BITS_END_ADDR, reg);
|
||||
|
||||
/* Coding tree block address */
|
||||
@ -117,7 +117,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
/* Clear the number of correctly-decoded coding tree blocks. */
|
||||
if (ctx->fh.m2m_ctx->new_frame)
|
||||
@@ -497,7 +560,9 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -499,7 +562,9 @@ static void cedrus_h265_setup(struct ced
|
||||
V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED,
|
||||
pps->flags);
|
||||
|
||||
@ -128,7 +128,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_PPS_CTRL1_FLAG_TRANSQUANT_BYPASS_ENABLED,
|
||||
V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED,
|
||||
@@ -573,12 +638,14 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -575,12 +640,14 @@ static void cedrus_h265_setup(struct ced
|
||||
|
||||
chroma_log2_weight_denom = pred_weight_table->luma_log2_weight_denom +
|
||||
pred_weight_table->delta_chroma_log2_weight_denom;
|
||||
@ -144,7 +144,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
/* Decoded picture size. */
|
||||
|
||||
reg = VE_DEC_H265_DEC_PIC_SIZE_WIDTH(ctx->src_fmt.width) |
|
||||
@@ -672,6 +739,17 @@ static int cedrus_h265_start(struct cedr
|
||||
@@ -674,6 +741,17 @@ static int cedrus_h265_start(struct cedr
|
||||
if (!ctx->codec.h265.neighbor_info_buf)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -162,7 +162,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -690,6 +768,9 @@ static void cedrus_h265_stop(struct cedr
|
||||
@@ -692,6 +770,9 @@ static void cedrus_h265_stop(struct cedr
|
||||
dma_free_coherent(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE,
|
||||
ctx->codec.h265.neighbor_info_buf,
|
||||
ctx->codec.h265.neighbor_info_buf_addr);
|
||||
|
@ -11,7 +11,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
@@ -164,6 +164,7 @@ struct cedrus_dec_ops {
|
||||
@@ -166,6 +166,7 @@ struct cedrus_dec_ops {
|
||||
int (*start)(struct cedrus_ctx *ctx);
|
||||
void (*stop)(struct cedrus_ctx *ctx);
|
||||
void (*trigger)(struct cedrus_ctx *ctx);
|
||||
@ -21,7 +21,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
struct cedrus_variant {
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
|
||||
@@ -463,6 +463,18 @@ static int cedrus_buf_prepare(struct vb2
|
||||
@@ -469,6 +469,18 @@ static int cedrus_buf_prepare(struct vb2
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -40,7 +40,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
static int cedrus_start_streaming(struct vb2_queue *vq, unsigned int count)
|
||||
{
|
||||
struct cedrus_ctx *ctx = vb2_get_drv_priv(vq);
|
||||
@@ -547,6 +559,7 @@ static void cedrus_buf_request_complete(
|
||||
@@ -551,6 +563,7 @@ static void cedrus_buf_request_complete(
|
||||
static struct vb2_ops cedrus_qops = {
|
||||
.queue_setup = cedrus_queue_setup,
|
||||
.buf_prepare = cedrus_buf_prepare,
|
||||
|
@ -11,7 +11,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
@@ -103,6 +103,11 @@ struct cedrus_buffer {
|
||||
@@ -105,6 +105,11 @@ struct cedrus_buffer {
|
||||
unsigned int position;
|
||||
enum cedrus_h264_pic_type pic_type;
|
||||
} h264;
|
||||
@ -23,7 +23,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
} codec;
|
||||
};
|
||||
|
||||
@@ -136,10 +141,6 @@ struct cedrus_ctx {
|
||||
@@ -138,10 +143,6 @@ struct cedrus_ctx {
|
||||
ssize_t intra_pred_buf_size;
|
||||
} h264;
|
||||
struct {
|
||||
@ -130,7 +130,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
}
|
||||
}
|
||||
|
||||
@@ -386,36 +427,6 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -388,36 +429,6 @@ static void cedrus_h265_setup(struct ced
|
||||
width_in_ctb_luma =
|
||||
DIV_ROUND_UP(sps->pic_width_in_luma_samples, ctb_size_luma);
|
||||
|
||||
@ -167,16 +167,16 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
/* Activate H265 engine. */
|
||||
cedrus_engine_enable(ctx, CEDRUS_CODEC_H265);
|
||||
|
||||
@@ -669,7 +680,7 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -671,7 +682,7 @@ static void cedrus_h265_setup(struct ced
|
||||
|
||||
/* Write decoded picture buffer in pic list. */
|
||||
cedrus_h265_frame_info_write_dpb(ctx, slice_params->dpb,
|
||||
- slice_params->num_active_dpb_entries);
|
||||
+ slice_params->num_active_dpb_entries, sps);
|
||||
cedrus_h265_frame_info_write_dpb(ctx, decode_params->dpb,
|
||||
- decode_params->num_active_dpb_entries);
|
||||
+ decode_params->num_active_dpb_entries, sps);
|
||||
|
||||
/* Output frame. */
|
||||
|
||||
@@ -680,7 +691,7 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -682,7 +693,7 @@ static void cedrus_h265_setup(struct ced
|
||||
cedrus_h265_frame_info_write_single(ctx, output_pic_list_index,
|
||||
slice_params->pic_struct != 0,
|
||||
pic_order_cnt,
|
||||
@ -185,7 +185,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
cedrus_write(dev, VE_DEC_H265_OUTPUT_FRAME_IDX, output_pic_list_index);
|
||||
|
||||
@@ -729,9 +740,6 @@ static int cedrus_h265_start(struct cedr
|
||||
@@ -731,9 +742,6 @@ static int cedrus_h265_start(struct cedr
|
||||
{
|
||||
struct cedrus_dev *dev = ctx->dev;
|
||||
|
||||
@ -195,7 +195,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
ctx->codec.h265.neighbor_info_buf =
|
||||
dma_alloc_coherent(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE,
|
||||
&ctx->codec.h265.neighbor_info_buf_addr,
|
||||
@@ -757,14 +765,6 @@ static void cedrus_h265_stop(struct cedr
|
||||
@@ -759,14 +767,6 @@ static void cedrus_h265_stop(struct cedr
|
||||
{
|
||||
struct cedrus_dev *dev = ctx->dev;
|
||||
|
||||
@ -210,7 +210,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
dma_free_coherent(dev->dev, CEDRUS_H265_NEIGHBOR_INFO_BUF_SIZE,
|
||||
ctx->codec.h265.neighbor_info_buf,
|
||||
ctx->codec.h265.neighbor_info_buf_addr);
|
||||
@@ -780,6 +780,16 @@ static void cedrus_h265_trigger(struct c
|
||||
@@ -782,6 +782,16 @@ static void cedrus_h265_trigger(struct c
|
||||
cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_DEC_SLICE);
|
||||
}
|
||||
|
||||
@ -227,7 +227,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
struct cedrus_dec_ops cedrus_dec_ops_h265 = {
|
||||
.irq_clear = cedrus_h265_irq_clear,
|
||||
.irq_disable = cedrus_h265_irq_disable,
|
||||
@@ -788,4 +798,5 @@ struct cedrus_dec_ops cedrus_dec_ops_h26
|
||||
@@ -790,4 +800,5 @@ struct cedrus_dec_ops cedrus_dec_ops_h26
|
||||
.start = cedrus_h265_start,
|
||||
.stop = cedrus_h265_stop,
|
||||
.trigger = cedrus_h265_trigger,
|
||||
|
@ -11,7 +11,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
|
||||
@@ -102,6 +102,9 @@ struct cedrus_buffer {
|
||||
@@ -104,6 +104,9 @@ struct cedrus_buffer {
|
||||
struct {
|
||||
unsigned int position;
|
||||
enum cedrus_h264_pic_type pic_type;
|
||||
|
@ -14,7 +14,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
|
||||
@@ -277,7 +277,7 @@ static int cedrus_open(struct file *file
|
||||
@@ -289,7 +289,7 @@ static int cedrus_open(struct file *file
|
||||
goto err_ctrls;
|
||||
}
|
||||
ctx->dst_fmt.pixelformat = V4L2_PIX_FMT_SUNXI_TILED_NV12;
|
||||
@ -23,7 +23,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
ctx->src_fmt.pixelformat = V4L2_PIX_FMT_MPEG2_SLICE;
|
||||
/*
|
||||
* TILED_NV12 has more strict requirements, so copy the width and
|
||||
@@ -285,7 +285,7 @@ static int cedrus_open(struct file *file
|
||||
@@ -297,7 +297,7 @@ static int cedrus_open(struct file *file
|
||||
*/
|
||||
ctx->src_fmt.width = ctx->dst_fmt.width;
|
||||
ctx->src_fmt.height = ctx->dst_fmt.height;
|
||||
@ -34,7 +34,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
|
||||
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
|
||||
@@ -532,6 +532,18 @@ static void cedrus_h265_setup(struct ced
|
||||
@@ -534,6 +534,18 @@ static void cedrus_h265_setup(struct ced
|
||||
|
||||
cedrus_write(dev, VE_DEC_H265_DEC_PCM_CTRL, reg);
|
||||
|
||||
|
@ -62,7 +62,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
static const struct cedrus_control cedrus_controls[] = {
|
||||
{
|
||||
.cfg = {
|
||||
@@ -56,6 +100,7 @@ static const struct cedrus_control cedru
|
||||
@@ -62,6 +106,7 @@ static const struct cedrus_control cedru
|
||||
{
|
||||
.cfg = {
|
||||
.id = V4L2_CID_STATELESS_H264_SPS,
|
||||
@ -70,7 +70,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
},
|
||||
.codec = CEDRUS_CODEC_H264,
|
||||
},
|
||||
@@ -114,6 +159,7 @@ static const struct cedrus_control cedru
|
||||
@@ -120,6 +165,7 @@ static const struct cedrus_control cedru
|
||||
{
|
||||
.cfg = {
|
||||
.id = V4L2_CID_MPEG_VIDEO_HEVC_SPS,
|
||||
@ -78,7 +78,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
},
|
||||
.codec = CEDRUS_CODEC_H265,
|
||||
},
|
||||
@@ -544,7 +590,8 @@ static const struct cedrus_variant sun50
|
||||
@@ -556,7 +602,8 @@ static const struct cedrus_variant sun50
|
||||
CEDRUS_CAPABILITY_MPEG2_DEC |
|
||||
CEDRUS_CAPABILITY_H264_DEC |
|
||||
CEDRUS_CAPABILITY_H265_DEC |
|
||||
|
@ -33,7 +33,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
select MFD_CORE
|
||||
--- a/drivers/mfd/Makefile
|
||||
+++ b/drivers/mfd/Makefile
|
||||
@@ -143,6 +143,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-s
|
||||
@@ -142,6 +142,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-s
|
||||
obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
|
||||
|
||||
obj-$(CONFIG_MFD_AC100) += ac100.o
|
||||
|
@ -278,7 +278,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
ret = clk_prepare_enable(i2s->mod_clk);
|
||||
if (ret) {
|
||||
@@ -1527,6 +1583,7 @@ static int sun4i_i2s_probe(struct platfo
|
||||
@@ -1526,6 +1582,7 @@ static int sun4i_i2s_probe(struct platfo
|
||||
|
||||
i2s->capture_dma_data.addr = res->start + SUN4I_I2S_FIFO_RX_REG;
|
||||
i2s->capture_dma_data.maxburst = 8;
|
||||
|
@ -12,39 +12,33 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -56,6 +56,9 @@ enum v4l2_mpeg_video_hevc_start_code {
|
||||
@@ -58,6 +58,8 @@ enum v4l2_mpeg_video_hevc_start_code {
|
||||
/* The controls are not stable at the moment and will likely be reworked. */
|
||||
struct v4l2_ctrl_hevc_sps {
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */
|
||||
+ __u8 video_parameter_set_id;
|
||||
+ __u8 seq_parameter_set_id;
|
||||
+ __u8 chroma_format_idc;
|
||||
__u16 pic_width_in_luma_samples;
|
||||
__u16 pic_height_in_luma_samples;
|
||||
__u8 bit_depth_luma_minus8;
|
||||
@@ -76,9 +79,8 @@ struct v4l2_ctrl_hevc_sps {
|
||||
__u8 log2_diff_max_min_pcm_luma_coding_block_size;
|
||||
__u8 num_short_term_ref_pic_sets;
|
||||
__u8 num_long_term_ref_pics_sps;
|
||||
- __u8 chroma_format_idc;
|
||||
|
||||
- __u8 padding;
|
||||
+ __u8 padding[7];
|
||||
@@ -81,6 +83,8 @@ struct v4l2_ctrl_hevc_sps {
|
||||
__u8 chroma_format_idc;
|
||||
__u8 sps_max_sub_layers_minus1;
|
||||
|
||||
+ __u8 padding[6];
|
||||
+
|
||||
__u64 flags;
|
||||
};
|
||||
@@ -105,7 +107,10 @@ struct v4l2_ctrl_hevc_sps {
|
||||
|
||||
@@ -108,6 +112,7 @@ struct v4l2_ctrl_hevc_sps {
|
||||
|
||||
struct v4l2_ctrl_hevc_pps {
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */
|
||||
+ __u8 pic_parameter_set_id;
|
||||
__u8 num_extra_slice_header_bits;
|
||||
+ __u8 num_ref_idx_l0_default_active_minus1;
|
||||
+ __u8 num_ref_idx_l1_default_active_minus1;
|
||||
__s8 init_qp_minus26;
|
||||
__u8 diff_cu_qp_delta_depth;
|
||||
__s8 pps_cb_qp_offset;
|
||||
@@ -118,7 +123,7 @@ struct v4l2_ctrl_hevc_pps {
|
||||
__u8 num_ref_idx_l0_default_active_minus1;
|
||||
__u8 num_ref_idx_l1_default_active_minus1;
|
||||
@@ -123,7 +128,7 @@ struct v4l2_ctrl_hevc_pps {
|
||||
__s8 pps_tc_offset_div2;
|
||||
__u8 log2_parallel_merge_level_minus2;
|
||||
|
||||
@ -53,15 +47,15 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
__u64 flags;
|
||||
};
|
||||
|
||||
@@ -204,7 +209,10 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u8 num_rps_poc_st_curr_after;
|
||||
__u8 num_rps_poc_lt_curr;
|
||||
@@ -202,7 +207,10 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
||||
__u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
||||
|
||||
- __u8 padding[5];
|
||||
- __u8 padding;
|
||||
+ __u16 short_term_ref_pic_set_size;
|
||||
+ __u16 long_term_ref_pic_set_size;
|
||||
+
|
||||
+ __u8 padding;
|
||||
+ __u8 padding[4];
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
|
||||
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
|
||||
struct v4l2_hevc_pred_weight_table pred_weight_table;
|
@ -0,0 +1,32 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sat, 23 May 2020 15:07:15 +0000
|
||||
Subject: [PATCH] HACK: media: uapi: hevc: tiles and num_slices
|
||||
|
||||
---
|
||||
include/media/hevc-ctrls.h | 8 ++++++--
|
||||
1 file changed, 6 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -83,7 +83,8 @@ struct v4l2_ctrl_hevc_sps {
|
||||
__u8 chroma_format_idc;
|
||||
__u8 sps_max_sub_layers_minus1;
|
||||
|
||||
- __u8 padding[6];
|
||||
+ __u8 num_slices;
|
||||
+ __u8 padding[5];
|
||||
|
||||
__u64 flags;
|
||||
};
|
||||
@@ -210,7 +211,9 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u16 short_term_ref_pic_set_size;
|
||||
__u16 long_term_ref_pic_set_size;
|
||||
|
||||
- __u8 padding[4];
|
||||
+ __u32 num_entry_point_offsets;
|
||||
+ __u32 entry_point_offset_minus1[256];
|
||||
+ __u8 padding[8];
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
|
||||
struct v4l2_hevc_pred_weight_table pred_weight_table;
|
@ -10,7 +10,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
@@ -161,6 +161,24 @@
|
||||
@@ -166,6 +166,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
@ -35,7 +35,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
allwinner,erratum-unknown1;
|
||||
@@ -878,7 +896,6 @@
|
||||
@@ -918,7 +936,6 @@
|
||||
resets = <&ccu RST_BUS_I2S2>;
|
||||
dma-names = "rx", "tx";
|
||||
dmas = <&dma 27>, <&dma 27>;
|
||||
@ -43,7 +43,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
};
|
||||
|
||||
dai: dai@1c22c00 {
|
||||
@@ -1178,6 +1195,7 @@
|
||||
@@ -1218,6 +1235,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@1ee0000 {
|
@ -1,40 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sat, 23 May 2020 15:07:15 +0000
|
||||
Subject: [PATCH] HACK: media: uapi: hevc: tiles and num_slices
|
||||
|
||||
---
|
||||
include/media/hevc-ctrls.h | 8 ++++++--
|
||||
1 file changed, 6 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/include/media/hevc-ctrls.h
|
||||
+++ b/include/media/hevc-ctrls.h
|
||||
@@ -80,7 +80,8 @@ struct v4l2_ctrl_hevc_sps {
|
||||
__u8 num_short_term_ref_pic_sets;
|
||||
__u8 num_long_term_ref_pics_sps;
|
||||
|
||||
- __u8 padding[7];
|
||||
+ __u8 num_slices;
|
||||
+ __u8 padding[6];
|
||||
|
||||
__u64 flags;
|
||||
};
|
||||
@@ -175,6 +176,7 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
|
||||
__u32 slice_segment_addr;
|
||||
+ __u32 num_entry_point_offsets;
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
|
||||
__u8 nal_unit_type;
|
||||
@@ -212,7 +214,9 @@ struct v4l2_ctrl_hevc_slice_params {
|
||||
__u16 short_term_ref_pic_set_size;
|
||||
__u16 long_term_ref_pic_set_size;
|
||||
|
||||
- __u8 padding;
|
||||
+ __u8 padding[5];
|
||||
+
|
||||
+ __u32 entry_point_offset_minus1[256];
|
||||
|
||||
/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
|
||||
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
|
@ -10,7 +10,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
@@ -1101,6 +1101,9 @@
|
||||
@@ -1141,6 +1141,9 @@
|
||||
clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
|
||||
clock-names = "bus", "core";
|
||||
resets = <&ccu RST_BUS_GPU>;
|
@ -29,7 +29,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
};
|
||||
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
|
||||
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
|
||||
@@ -692,6 +692,25 @@
|
||||
@@ -736,6 +736,25 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -35,7 +35,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu0-thermal {
|
||||
/* milliseconds */
|
||||
@@ -666,6 +684,19 @@
|
||||
@@ -710,6 +728,19 @@
|
||||
clocks = <&osc24M>;
|
||||
};
|
||||
|
||||
@ -55,7 +55,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
ir0: ir@1c21800 {
|
||||
compatible = "allwinner,sun8i-r40-ir",
|
||||
"allwinner,sun6i-a31-ir";
|
||||
@@ -1142,6 +1173,7 @@
|
||||
@@ -1186,6 +1217,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@1ee0000 {
|
@ -35,7 +35,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@@ -655,7 +673,6 @@
|
||||
@@ -664,7 +682,6 @@
|
||||
dmas = <&dma 4>, <&dma 4>;
|
||||
resets = <&ccu RST_BUS_I2S1>;
|
||||
dma-names = "rx", "tx";
|
||||
@ -43,7 +43,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
};
|
||||
|
||||
spdif: spdif@5093000 {
|
||||
@@ -792,6 +809,7 @@
|
||||
@@ -801,6 +818,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@6000000 {
|
@ -37,8 +37,8 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
+ };
|
||||
};
|
||||
|
||||
watchdog: watchdog@30090a0 {
|
||||
@@ -364,6 +378,13 @@
|
||||
timer@3009000 {
|
||||
@@ -373,6 +387,13 @@
|
||||
drive-strength = <40>;
|
||||
};
|
||||
|
||||
@ -52,7 +52,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
hdmi_pins: hdmi-pins {
|
||||
pins = "PH8", "PH9", "PH10";
|
||||
function = "hdmi";
|
||||
@@ -384,6 +405,11 @@
|
||||
@@ -393,6 +414,11 @@
|
||||
function = "i2c2";
|
||||
};
|
||||
|
||||
@ -64,7 +64,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
mmc0_pins: mmc0-pins {
|
||||
pins = "PF0", "PF1", "PF2", "PF3",
|
||||
"PF4", "PF5";
|
||||
@@ -410,6 +436,11 @@
|
||||
@@ -419,6 +445,11 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
@ -76,7 +76,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
/omit-if-no-ref/
|
||||
spi0_pins: spi0-pins {
|
||||
pins = "PC0", "PC2", "PC3";
|
||||
@@ -643,6 +674,31 @@
|
||||
@@ -652,6 +683,31 @@
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
Loading…
x
Reference in New Issue
Block a user