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linux: bump Amlogic patches for Linux 6.12.y

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Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
This commit is contained in:
Christian Hewitt 2024-12-15 07:18:01 +00:00
parent 94059cd3fb
commit 064699b940
No known key found for this signature in database
61 changed files with 2616 additions and 302 deletions
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4
packages/linux/package.mk
View File

@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
case "${LINUX}" in
amlogic)
PKG_VERSION="47edb26c8ed9dd1877f8623ee1cd3b998874ca65" # 6.12.3
PKG_SHA256="400f47b06a05798b215842950baf918439c0e2f026f71160bd5d547b6ac10edb"
PKG_VERSION="5996393469d99560b7845d22c9eff00661de0724" # 6.12.9
PKG_SHA256="1a140beb8b10ea52e4dd595c5ce4e00995e0176353f980be50aedca4c009c2b7"
PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
PKG_PATCH_DIRS="default rtlwifi/after-6.12"

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch
View File

@ -1,7 +1,7 @@
From 2d2fade84ccde0cd0675b66a1924a6196caea2ba Mon Sep 17 00:00:00 2001
From b2aa2cc114b511c8624470e1a294fd0544f7c7f4 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:41:51 +0000
Subject: [PATCH 01/33] LOCAL: set meson-gx cma pool to 896MB
Subject: [PATCH 01/58] LOCAL: set meson-gx cma pool to 896MB
This change sets the CMA pool to a larger 896MB! value for vdec use

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch
View File

@ -1,7 +1,7 @@
From 9aa18b4f2b73b028999f2ce89728e294f2debc78 Mon Sep 17 00:00:00 2001
From 535e600d792af4d60acde764d2defff5c7521be3 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 14 Aug 2019 19:58:14 +0000
Subject: [PATCH 02/33] LOCAL: set meson-g12 cma pool to 896MB
Subject: [PATCH 02/58] LOCAL: set meson-g12 cma pool to 896MB
This change sets the CMA pool to a larger 896MB! value for vdec use

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch
View File

@ -1,7 +1,7 @@
From 8d06b6fbce75e0dba5467c8fd74ee90a07d4827e Mon Sep 17 00:00:00 2001
From 6278379b84ca61605d0e86492caaba57b20644b6 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:45:18 +0000
Subject: [PATCH 03/33] LOCAL: arm64: fix Kodi sysinfo CPU information
Subject: [PATCH 03/58] LOCAL: arm64: fix Kodi sysinfo CPU information
This allows the CPU information to show in the Kodi sysinfo screen, e.g.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch
View File

@ -1,7 +1,7 @@
From 8a00f12605bfd2696598a833fa1f9ae688a99393 Mon Sep 17 00:00:00 2001
From d6b4aee953537ba901a65275045b6a0703770067 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:23 +0100
Subject: [PATCH 04/33] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
Subject: [PATCH 04/58] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
The Amlogic Meson GX SoCs uses a non-standard argument to the
PSCI CPU_SUSPEND call to enter system suspend.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch
View File

@ -1,7 +1,7 @@
From f506a68611749da1f4b1077d68c3fd70209f5860 Mon Sep 17 00:00:00 2001
From 1e4c25a0f363de1786a93af1276978001dffdb55 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:25 +0100
Subject: [PATCH 05/33] LOCAL: arm64: dts: meson: add support for GX PM and
Subject: [PATCH 05/58] LOCAL: arm64: dts: meson: add support for GX PM and
Virtual RTC
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch
View File

@ -1,7 +1,7 @@
From f7b53f20f3a4e123abebb4ca1f18e80b50ae0243 Mon Sep 17 00:00:00 2001
From ec690a25fe036fa171b745e0d69ec531894269c1 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 21 Jan 2021 01:35:36 +0000
Subject: [PATCH 06/33] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Subject: [PATCH 06/58] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Khadas VIM
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch
View File

@ -1,7 +1,7 @@
From 624dc7572e32231bad189e0b79b5f54f6c977fc7 Mon Sep 17 00:00:00 2001
From 4a3e41ffca965716f704a002158fa5a38d779637 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 6 Nov 2021 13:01:08 +0000
Subject: [PATCH 07/33] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Subject: [PATCH 07/58] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Khadas VIM2
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch
View File

@ -1,7 +1,7 @@
From 44820e5d97f27b5a829766320e3d161d4a0db8fb Mon Sep 17 00:00:00 2001
From 15a29e760d0488ec170293db626c4edddc364e9c Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Mon, 1 Feb 2021 19:27:40 +0000
Subject: [PATCH 08/33] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
Subject: [PATCH 08/58] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
NEO U9-H
Add node aliases to prevent meson-vrtc from claiming /dev/rtc0

8
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch
View File

@ -1,7 +1,7 @@
From da0908efcb33f719f74e8571759de877fffa8520 Mon Sep 17 00:00:00 2001
From 1de6319b774217b31404dfeac7303402670a58a9 Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@iki.fi>
Date: Sun, 17 Apr 2022 04:37:48 +0000
Subject: [PATCH 09/33] LOCAL: ASoC: meson: assign internal PCM
Subject: [PATCH 09/58] LOCAL: ASoC: meson: assign internal PCM
chmap/ELD/IEC958 kctls to device 0
On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
@ -40,10 +40,10 @@ index 6eaa950504cf..dbcf1f613fb4 100644
knew.private_value = private_value;
info->kctl = snd_ctl_new1(&knew, info);
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index 74caae52e127..99300f3bfb8c 100644
index d9df29a26f4f..b39756f2e49b 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -802,7 +802,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
@@ -816,7 +816,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
if (!kctl)
return -ENOMEM;

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch
View File

@ -1,7 +1,7 @@
From f9a06dc2af551e9c54c60b47262f7edadeceb023 Mon Sep 17 00:00:00 2001
From 528d75a3dfe9427f1d12af981a5dc9af7aad7174 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 5 Jan 2023 15:16:46 +0000
Subject: [PATCH 10/33] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
Subject: [PATCH 10/58] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
decoding
The MPEG1/2 decoder is broken and nobody has volunteered to poke

203
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.13-ASoC-hdmi-codec-reorder-channel-allocat.patch
View File

@ -1,203 +0,0 @@
From 7678776ab7b19cac0b232082deb01cee5a86f180 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 23 Dec 2018 02:24:38 +0100
Subject: [PATCH 11/33] FROMGIT(6.13): ASoC: hdmi-codec: reorder channel
allocation list
Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().
E.g when ELD reports FL|FR|LFE|FC|RL|RR or FL|FR|LFE|FC|RL|RR|RC|RLC|RRC
ca_id 0x01 with speaker mask FL|FR|LFE gets selected instead of
ca_id 0x03 with speaker mask FL|FR|LFE|FC for 4 channels
and
ca_id 0x04 with speaker mask FL|FR|RC gets selected instead of
ca_id 0x0b with speaker mask FL|FR|LFE|FC|RL|RR for 6 channels
Fix this by reorder the channel allocation list with
most specific speaker mask at the top.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
sound/soc/codecs/hdmi-codec.c | 140 +++++++++++++++++++---------------
1 file changed, 77 insertions(+), 63 deletions(-)
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index 99300f3bfb8c..b39756f2e49b 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -185,84 +185,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
/*
* hdmi_codec_channel_alloc: speaker configuration available for CEA
*
- * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
+ * This is an ordered list where ca_id must exist in hdmi_codec_8ch_chmaps
* The preceding ones have better chances to be selected by
* hdmi_codec_get_ch_alloc_table_idx().
*/
static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
{ .ca_id = 0x00, .n_ch = 2,
- .mask = FL | FR},
- /* 2.1 */
- { .ca_id = 0x01, .n_ch = 4,
- .mask = FL | FR | LFE},
- /* Dolby Surround */
+ .mask = FL | FR },
+ { .ca_id = 0x03, .n_ch = 4,
+ .mask = FL | FR | LFE | FC },
{ .ca_id = 0x02, .n_ch = 4,
.mask = FL | FR | FC },
- /* surround51 */
+ { .ca_id = 0x01, .n_ch = 4,
+ .mask = FL | FR | LFE },
{ .ca_id = 0x0b, .n_ch = 6,
- .mask = FL | FR | LFE | FC | RL | RR},
- /* surround40 */
- { .ca_id = 0x08, .n_ch = 6,
- .mask = FL | FR | RL | RR },
- /* surround41 */
- { .ca_id = 0x09, .n_ch = 6,
- .mask = FL | FR | LFE | RL | RR },
- /* surround50 */
+ .mask = FL | FR | LFE | FC | RL | RR },
{ .ca_id = 0x0a, .n_ch = 6,
.mask = FL | FR | FC | RL | RR },
- /* 6.1 */
- { .ca_id = 0x0f, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RL | RR | RC },
- /* surround71 */
+ { .ca_id = 0x09, .n_ch = 6,
+ .mask = FL | FR | LFE | RL | RR },
+ { .ca_id = 0x08, .n_ch = 6,
+ .mask = FL | FR | RL | RR },
+ { .ca_id = 0x07, .n_ch = 6,
+ .mask = FL | FR | LFE | FC | RC },
+ { .ca_id = 0x06, .n_ch = 6,
+ .mask = FL | FR | FC | RC },
+ { .ca_id = 0x05, .n_ch = 6,
+ .mask = FL | FR | LFE | RC },
+ { .ca_id = 0x04, .n_ch = 6,
+ .mask = FL | FR | RC },
{ .ca_id = 0x13, .n_ch = 8,
.mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
- /* others */
- { .ca_id = 0x03, .n_ch = 8,
- .mask = FL | FR | LFE | FC },
- { .ca_id = 0x04, .n_ch = 8,
- .mask = FL | FR | RC},
- { .ca_id = 0x05, .n_ch = 8,
- .mask = FL | FR | LFE | RC },
- { .ca_id = 0x06, .n_ch = 8,
- .mask = FL | FR | FC | RC },
- { .ca_id = 0x07, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RC },
- { .ca_id = 0x0c, .n_ch = 8,
- .mask = FL | FR | RC | RL | RR },
- { .ca_id = 0x0d, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | RC },
- { .ca_id = 0x0e, .n_ch = 8,
- .mask = FL | FR | FC | RL | RR | RC },
- { .ca_id = 0x10, .n_ch = 8,
- .mask = FL | FR | RL | RR | RLC | RRC },
- { .ca_id = 0x11, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | RLC | RRC },
+ { .ca_id = 0x1f, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
{ .ca_id = 0x12, .n_ch = 8,
.mask = FL | FR | FC | RL | RR | RLC | RRC },
- { .ca_id = 0x14, .n_ch = 8,
- .mask = FL | FR | FLC | FRC },
- { .ca_id = 0x15, .n_ch = 8,
- .mask = FL | FR | LFE | FLC | FRC },
- { .ca_id = 0x16, .n_ch = 8,
- .mask = FL | FR | FC | FLC | FRC },
- { .ca_id = 0x17, .n_ch = 8,
- .mask = FL | FR | LFE | FC | FLC | FRC },
- { .ca_id = 0x18, .n_ch = 8,
- .mask = FL | FR | RC | FLC | FRC },
- { .ca_id = 0x19, .n_ch = 8,
- .mask = FL | FR | LFE | RC | FLC | FRC },
- { .ca_id = 0x1a, .n_ch = 8,
- .mask = FL | FR | RC | FC | FLC | FRC },
- { .ca_id = 0x1b, .n_ch = 8,
- .mask = FL | FR | LFE | RC | FC | FLC | FRC },
- { .ca_id = 0x1c, .n_ch = 8,
- .mask = FL | FR | RL | RR | FLC | FRC },
- { .ca_id = 0x1d, .n_ch = 8,
- .mask = FL | FR | LFE | RL | RR | FLC | FRC },
{ .ca_id = 0x1e, .n_ch = 8,
.mask = FL | FR | FC | RL | RR | FLC | FRC },
- { .ca_id = 0x1f, .n_ch = 8,
- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
+ { .ca_id = 0x11, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | RLC | RRC },
+ { .ca_id = 0x1d, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | FLC | FRC },
+ { .ca_id = 0x10, .n_ch = 8,
+ .mask = FL | FR | RL | RR | RLC | RRC },
+ { .ca_id = 0x1c, .n_ch = 8,
+ .mask = FL | FR | RL | RR | FLC | FRC },
+ { .ca_id = 0x0f, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR | RC },
+ { .ca_id = 0x1b, .n_ch = 8,
+ .mask = FL | FR | LFE | RC | FC | FLC | FRC },
+ { .ca_id = 0x0e, .n_ch = 8,
+ .mask = FL | FR | FC | RL | RR | RC },
+ { .ca_id = 0x1a, .n_ch = 8,
+ .mask = FL | FR | RC | FC | FLC | FRC },
+ { .ca_id = 0x0d, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR | RC },
+ { .ca_id = 0x19, .n_ch = 8,
+ .mask = FL | FR | LFE | RC | FLC | FRC },
+ { .ca_id = 0x0c, .n_ch = 8,
+ .mask = FL | FR | RC | RL | RR },
+ { .ca_id = 0x18, .n_ch = 8,
+ .mask = FL | FR | RC | FLC | FRC },
+ { .ca_id = 0x17, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | FLC | FRC },
+ { .ca_id = 0x16, .n_ch = 8,
+ .mask = FL | FR | FC | FLC | FRC },
+ { .ca_id = 0x15, .n_ch = 8,
+ .mask = FL | FR | LFE | FLC | FRC },
+ { .ca_id = 0x14, .n_ch = 8,
+ .mask = FL | FR | FLC | FRC },
+ { .ca_id = 0x0b, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RL | RR },
+ { .ca_id = 0x0a, .n_ch = 8,
+ .mask = FL | FR | FC | RL | RR },
+ { .ca_id = 0x09, .n_ch = 8,
+ .mask = FL | FR | LFE | RL | RR },
+ { .ca_id = 0x08, .n_ch = 8,
+ .mask = FL | FR | RL | RR },
+ { .ca_id = 0x07, .n_ch = 8,
+ .mask = FL | FR | LFE | FC | RC },
+ { .ca_id = 0x06, .n_ch = 8,
+ .mask = FL | FR | FC | RC },
+ { .ca_id = 0x05, .n_ch = 8,
+ .mask = FL | FR | LFE | RC },
+ { .ca_id = 0x04, .n_ch = 8,
+ .mask = FL | FR | RC },
+ { .ca_id = 0x03, .n_ch = 8,
+ .mask = FL | FR | LFE | FC },
+ { .ca_id = 0x02, .n_ch = 8,
+ .mask = FL | FR | FC },
+ { .ca_id = 0x01, .n_ch = 8,
+ .mask = FL | FR | LFE },
};
struct hdmi_codec_priv {
@@ -371,7 +384,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
struct hdmi_codec_priv *hcp = info->private_data;
- map = info->chmap[hcp->chmap_idx].map;
+ if (hcp->chmap_idx != HDMI_CODEC_CHMAP_IDX_UNKNOWN)
+ map = info->chmap[hcp->chmap_idx].map;
for (i = 0; i < info->max_channels; i++) {
if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
--
2.34.1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-arm64-dts-meson-drop-broadcom-compatible.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.14-arm64-dts-meson-drop-broadcom-compatibl.patch
View File

@ -1,7 +1,7 @@
From feec73f837332b144afb16d137b407192bf8b938 Mon Sep 17 00:00:00 2001
From 14311c2df4463e5ed541c8baa1087b9bec05fd7f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 3 Jan 2024 03:14:06 +0000
Subject: [PATCH 28/33] FROMLIST(v1): arm64: dts: meson: drop broadcom
Subject: [PATCH 11/58] FROMGIT(6.14): arm64: dts: meson: drop broadcom
compatible from reference board SDIO nodes
Drop the Broadcom compatible and use a generic sdio identifier with the Amlogic

40
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.14-clk-amlogic-g12a-fix-mmc-A-peripheral-c.patch Normal file
View File

@ -0,0 +1,40 @@
From a4658eb9da3ee5555a82be9bbd838fa14f2a914e Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 13 Dec 2024 11:03:23 +0100
Subject: [PATCH 12/58] FROMGIT(6.14): clk: amlogic: g12a: fix mmc A peripheral
clock
The bit index of the peripheral clock for mmc A is wrong
This was probably not a problem for mmc A as the peripheral is likely left
enabled by the bootloader.
No issues has been reported so far but it could be a problem, most likely
some form of conflict between the ethernet and mmc A clock, breaking
ethernet on init.
Use the value provided by the documentation for mmc A before this
becomes an actual problem.
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/clk/meson/g12a.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 02dda57105b1..ff634d3a2f95 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -4317,7 +4317,7 @@ static MESON_GATE(g12a_spicc_1, HHI_GCLK_MPEG0, 14);
static MESON_GATE(g12a_hiu_reg, HHI_GCLK_MPEG0, 19);
static MESON_GATE(g12a_mipi_dsi_phy, HHI_GCLK_MPEG0, 20);
static MESON_GATE(g12a_assist_misc, HHI_GCLK_MPEG0, 23);
-static MESON_GATE(g12a_emmc_a, HHI_GCLK_MPEG0, 4);
+static MESON_GATE(g12a_emmc_a, HHI_GCLK_MPEG0, 24);
static MESON_GATE(g12a_emmc_b, HHI_GCLK_MPEG0, 25);
static MESON_GATE(g12a_emmc_c, HHI_GCLK_MPEG0, 26);
static MESON_GATE(g12a_audio_codec, HHI_GCLK_MPEG0, 28);
--
2.34.1

99
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMGIT-6.14-clk-amlogic-g12b-fix-cluster-A-parent-d.patch Normal file
View File

@ -0,0 +1,99 @@
From 48432d3ed3b7011051afc3d422e50cd42ebf860b Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 13 Dec 2024 15:30:17 +0100
Subject: [PATCH 13/58] FROMGIT(6.14): clk: amlogic: g12b: fix cluster A parent
data
Several clocks used by both g12a and g12b use the g12a cpu A clock hw
pointer as clock parent. This is incorrect on g12b since the parents of
cluster A cpu clock are different. Also the hw clock provided as parent to
these children is not even registered clock on g12b.
Fix the problem by reverting to the global namespace and let CCF pick
the appropriate, as it is already done for other clocks, such as
cpu_clk_trace_div.
Fixes: 25e682a02d91 ("clk: meson: g12a: migrate to the new parent description method")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/g12a.c | 36 ++++++++++++++++++++++++------------
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index ff634d3a2f95..4f92b83965d5 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -1139,8 +1139,18 @@ static struct clk_regmap g12a_cpu_clk_div16_en = {
.hw.init = &(struct clk_init_data) {
.name = "cpu_clk_div16_en",
.ops = &clk_regmap_gate_ro_ops,
- .parent_hws = (const struct clk_hw *[]) {
- &g12a_cpu_clk.hw
+ .parent_data = &(const struct clk_parent_data) {
+ /*
+ * Note:
+ * G12A and G12B have different cpu clocks (with
+ * different struct clk_hw). We fallback to the global
+ * naming string mechanism so this clock picks
+ * up the appropriate one. Same goes for the other
+ * clock using cpu cluster A clock output and present
+ * on both G12 variant.
+ */
+ .name = "cpu_clk",
+ .index = -1,
},
.num_parents = 1,
/*
@@ -1205,7 +1215,10 @@ static struct clk_regmap g12a_cpu_clk_apb_div = {
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_apb_div",
.ops = &clk_regmap_divider_ro_ops,
- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
+ .parent_data = &(const struct clk_parent_data) {
+ .name = "cpu_clk",
+ .index = -1,
+ },
.num_parents = 1,
},
};
@@ -1239,7 +1252,10 @@ static struct clk_regmap g12a_cpu_clk_atb_div = {
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_atb_div",
.ops = &clk_regmap_divider_ro_ops,
- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
+ .parent_data = &(const struct clk_parent_data) {
+ .name = "cpu_clk",
+ .index = -1,
+ },
.num_parents = 1,
},
};
@@ -1273,7 +1289,10 @@ static struct clk_regmap g12a_cpu_clk_axi_div = {
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_axi_div",
.ops = &clk_regmap_divider_ro_ops,
- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
+ .parent_data = &(const struct clk_parent_data) {
+ .name = "cpu_clk",
+ .index = -1,
+ },
.num_parents = 1,
},
};
@@ -1308,13 +1327,6 @@ static struct clk_regmap g12a_cpu_clk_trace_div = {
.name = "cpu_clk_trace_div",
.ops = &clk_regmap_divider_ro_ops,
.parent_data = &(const struct clk_parent_data) {
- /*
- * Note:
- * G12A and G12B have different cpu_clks (with
- * different struct clk_hw). We fallback to the global
- * naming string mechanism so cpu_clk_trace_div picks
- * up the appropriate one.
- */
.name = "cpu_clk",
.index = -1,
},
--
2.34.1

38
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMGIT-6.14-clk-amlogic-gxbb-drop-incorrect-flag-on.patch Normal file
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@ -0,0 +1,38 @@
From f04ec1d9f34c9310b944fc36c542f528044fba4c Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 20 Dec 2024 11:25:36 +0100
Subject: [PATCH 14/58] FROMGIT(6.14): clk: amlogic: gxbb: drop incorrect flag
on 32k clock
gxbb_32k_clk_div sets CLK_DIVIDER_ROUND_CLOSEST in the init_data flag which
is incorrect. This is field is not where the divider flags belong.
Thankfully, CLK_DIVIDER_ROUND_CLOSEST maps to bit 4 which is an unused
clock flag, so there is no unintended consequence to this error.
Effectively, the clock has been used without CLK_DIVIDER_ROUND_CLOSEST
so far, so just drop it.
Fixes: 14c735c8e308 ("clk: meson-gxbb: Add EE 32K Clock for CEC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/clk/meson/gxbb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index f071faad1ebb..738317b3e274 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -1312,7 +1312,7 @@ static struct clk_regmap gxbb_32k_clk_div = {
&gxbb_32k_clk_sel.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_DIVIDER_ROUND_CLOSEST,
+ .flags = CLK_SET_RATE_PARENT,
},
};
--
2.34.1

57
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@ -0,0 +1,57 @@
From f248ceae106d48ff1b1a81a32fdd5d0f4ad9c40e Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Fri, 20 Dec 2024 11:25:37 +0100
Subject: [PATCH 15/58] FROMGIT(6.14): clk: amlogic: gxbb: drop non existing
32k clock parent
The 32k clock reference a parent 'cts_slow_oscin' with a fixme note saying
that this clock should be provided by AO controller.
The HW probably has this clock but it does not exist at the moment in
any controller implementation. Furthermore, referencing clock by the global
name should be avoided whenever possible.
There is no reason to keep this hack around, at least for now.
Fixes: 14c735c8e308 ("clk: meson-gxbb: Add EE 32K Clock for CEC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/clk/meson/gxbb.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 738317b3e274..d9529de200ae 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -1272,14 +1272,13 @@ static struct clk_regmap gxbb_cts_i958 = {
},
};
+/*
+ * This table skips a clock named 'cts_slow_oscin' in the documentation
+ * This clock does not exist yet in this controller or the AO one
+ */
+static u32 gxbb_32k_clk_parents_val_table[] = { 0, 2, 3 };
static const struct clk_parent_data gxbb_32k_clk_parent_data[] = {
{ .fw_name = "xtal", },
- /*
- * FIXME: This clock is provided by the ao clock controller but the
- * clock is not yet part of the binding of this controller, so string
- * name must be use to set this parent.
- */
- { .name = "cts_slow_oscin", .index = -1 },
{ .hw = &gxbb_fclk_div3.hw },
{ .hw = &gxbb_fclk_div5.hw },
};
@@ -1289,6 +1288,7 @@ static struct clk_regmap gxbb_32k_clk_sel = {
.offset = HHI_32K_CLK_CNTL,
.mask = 0x3,
.shift = 16,
+ .table = gxbb_32k_clk_parents_val_table,
},
.hw.init = &(struct clk_init_data){
.name = "32k_clk_sel",
--
2.34.1

365
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@ -0,0 +1,365 @@
From 3b97b2884e6416ef0d723c93e381a59b829d1411 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Fri, 27 Dec 2024 22:25:12 +0100
Subject: [PATCH 16/58] FROMGIT(6.14): arm64: dts: amlogic: gx: switch to the
new PWM controller binding
Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
.../dts/amlogic/meson-gx-libretech-pc.dtsi | 6 -----
.../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 --
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 +++---
.../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 2 --
.../dts/amlogic/meson-gxbb-nexbox-a95x.dts | 2 --
.../boot/dts/amlogic/meson-gxbb-p20x.dtsi | 2 --
.../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 2 --
.../boot/dts/amlogic/meson-gxbb-wetek.dtsi | 2 --
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 +++++++++++++++++++
.../boot/dts/amlogic/meson-gxl-s805x-p241.dts | 2 --
.../meson-gxl-s905w-jethome-jethub-j80.dts | 2 --
.../meson-gxl-s905x-hwacom-amazetv.dts | 2 --
.../amlogic/meson-gxl-s905x-khadas-vim.dts | 2 --
.../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 2 --
.../dts/amlogic/meson-gxl-s905x-p212.dtsi | 2 --
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 25 +++++++++++++++++++
.../dts/amlogic/meson-gxm-khadas-vim2.dts | 4 ---
.../boot/dts/amlogic/meson-gxm-rbox-pro.dts | 2 --
18 files changed, 54 insertions(+), 40 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
index d38c3a224fbe..2da49cfbde77 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
@@ -345,24 +345,18 @@ rtc: rtc@51 {
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_3_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_ab {
pinctrl-0 = <&pwm_b_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 45ccddd1aaf0..6da1316d97c6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -240,8 +240,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index b702a7f7bcf5..260628cf218e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -333,14 +333,14 @@ i2c_A: i2c@8500 {
};
pwm_ab: pwm@8550 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x08550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x08650 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -355,7 +355,7 @@ saradc: adc@8680 {
};
pwm_ef: pwm@86c0 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x086c0 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -507,7 +507,7 @@ i2c_AO: i2c@500 {
};
pwm_AO_ab: pwm@550 {
- compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x00550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index cf2e2ef81680..2ecc6ebd5a43 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -298,8 +298,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
index 7d7dde93fff3..c09da40ff7b0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
@@ -241,8 +241,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
index 1736bd2e96e2..6f67364fd63f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
@@ -150,8 +150,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index 3807a184810b..6ff567225fee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -222,8 +222,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
index deb295227189..bfedfc1472ec 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
@@ -185,8 +185,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index ed00e67e6923..8ebce7114a60 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -739,6 +739,31 @@ mux {
};
};
+&pwm_ab {
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_AO_ab {
+ clocks = <&xtal>, <&clkc CLKID_CLK81>;
+};
+
+&pwm_cd {
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_ef {
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
index c5e2306ad7a4..ca7c4e8e7cac 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
@@ -280,8 +280,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* This is connected to the Bluetooth module: */
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
index 2b94b6e5285e..4ca90ac947b7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
@@ -116,8 +116,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
index 89fe5110f7a2..62a2da766a00 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
@@ -115,8 +115,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* SD card */
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index 0741d34945bb..e137ebd48c5e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -213,8 +213,6 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
- clocks = <&xtal> , <&xtal>;
- clock-names = "clkin0", "clkin1" ;
};
&pwm_ef {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
index c79f9f2099bf..236cedec9f19 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
@@ -145,8 +145,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
index b52a830efcce..05a0d4de3ad7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -101,8 +101,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index f58d1790de1c..2dc2fdaecf9f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -809,6 +809,31 @@ internal_phy: ethernet-phy@8 {
};
};
+&pwm_ab {
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_AO_ab {
+ clocks = <&xtal>, <&clkc CLKID_CLK81>;
+};
+
+&pwm_cd {
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_ef {
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 544c757f8bb7..8a89940869b0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -291,16 +291,12 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&sd_emmc_a {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
index 7356d3b628b1..ecaf678b23dd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
@@ -192,8 +192,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
--
2.34.1

76
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMGIT-6.14-arm64-dts-amlogic-axg-switch-to-the-new.patch Normal file
View File

@ -0,0 +1,76 @@
From e6298e5601c435f4b847271bfcf33044a343ec6a Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Fri, 27 Dec 2024 22:25:13 +0100
Subject: [PATCH 17/58] FROMGIT(6.14): arm64: dts: amlogic: axg: switch to the
new PWM controller binding
Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 24 ++++++++++++++++++----
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index e9b22868983d..a6924d246bb1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -1693,8 +1693,12 @@ sec_AO: ao-secure@140 {
};
pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-axg-ao-pwm";
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x02000 0x0 0x20>;
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -1728,8 +1732,12 @@ i2c_AO: i2c@5000 {
};
pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-axg-ao-pwm";
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x07000 0x0 0x20>;
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -1806,15 +1814,23 @@ watchdog@f0d0 {
};
pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-axg-ee-pwm";
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x1b000 0x0 0x20>;
+ clocks = <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-axg-ee-pwm";
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x1a000 0x0 0x20>;
+ clocks = <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
--
2.34.1

499
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMGIT-6.14-arm64-dts-amlogic-g12-switch-to-the-new.patch Normal file
View File

@ -0,0 +1,499 @@
From 3bd24f271e013ef166e88af74f7ab2931b4fb08c Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Fri, 27 Dec 2024 22:25:14 +0100
Subject: [PATCH 18/58] FROMGIT(6.14): arm64: dts: amlogic: g12: switch to the
new PWM controller binding
Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
.../boot/dts/amlogic/meson-g12-common.dtsi | 33 ++++++++++++++++---
.../boot/dts/amlogic/meson-g12a-fbx8am.dts | 4 ---
.../dts/amlogic/meson-g12a-radxa-zero.dts | 4 ---
.../boot/dts/amlogic/meson-g12a-sei510.dts | 4 ---
.../boot/dts/amlogic/meson-g12a-u200.dts | 2 --
.../boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ---
.../amlogic/meson-g12b-a311d-libretech-cc.dts | 2 --
.../dts/amlogic/meson-g12b-bananapi-cm4.dtsi | 4 ---
.../boot/dts/amlogic/meson-g12b-bananapi.dtsi | 4 ---
.../dts/amlogic/meson-g12b-khadas-vim3.dtsi | 4 ---
.../boot/dts/amlogic/meson-g12b-odroid.dtsi | 4 ---
.../dts/amlogic/meson-g12b-radxa-zero2.dts | 8 -----
.../boot/dts/amlogic/meson-g12b-w400.dtsi | 6 ----
.../amlogic/meson-libretech-cottonwood.dtsi | 6 ----
.../boot/dts/amlogic/meson-sm1-ac2xx.dtsi | 6 ----
.../boot/dts/amlogic/meson-sm1-bananapi.dtsi | 2 --
.../dts/amlogic/meson-sm1-khadas-vim3l.dts | 2 --
.../boot/dts/amlogic/meson-sm1-odroid.dtsi | 2 --
.../boot/dts/amlogic/meson-sm1-sei610.dts | 6 ----
19 files changed, 28 insertions(+), 79 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 0bc28eb2079b..705c1c56112f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -2060,8 +2060,11 @@ cecb_AO: cec@280 {
};
pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-g12a-ao-pwm-cd";
+ compatible = "amlogic,meson-g12-pwm-v2",
+ "amlogic,meson8-pwm-v2";
reg = <0x0 0x2000 0x0 0x20>;
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -2099,8 +2102,13 @@ i2c_AO: i2c@5000 {
};
pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-g12a-ao-pwm-ab";
+ compatible = "amlogic,meson-g12-pwm-v2",
+ "amlogic,meson8-pwm-v2";
reg = <0x0 0x7000 0x0 0x20>;
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -2301,22 +2309,37 @@ spifc: spi@14000 {
};
pwm_ef: pwm@19000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
+ compatible = "amlogic,meson-g12-pwm-v2",
+ "amlogic,meson8-pwm-v2";
reg = <0x0 0x19000 0x0 0x20>;
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
+ compatible = "amlogic,meson-g12-pwm-v2",
+ "amlogic,meson8-pwm-v2";
reg = <0x0 0x1a000 0x0 0x20>;
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
+ compatible = "amlogic,meson-g12-pwm-v2",
+ "amlogic,meson8-pwm-v2";
reg = <0x0 0x1b000 0x0 0x20>;
+ clocks = <&xtal>,
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
index a457b3f4397b..9aa36f17ffa2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
@@ -346,8 +346,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -355,8 +353,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pdm {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
index c779a5da7d1e..952b8d02e5c2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
@@ -284,8 +284,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -293,8 +291,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
index ea51341f031b..52fbc5103e45 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
@@ -389,8 +389,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -398,8 +396,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pdm {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
index f70a46967e2b..5407049d2647 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
@@ -502,8 +502,6 @@ &i2c3 {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 32f98a192494..01da83658ae3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -328,8 +328,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -363,8 +361,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&uart_A {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
index 65b963d794cd..adedc1340c78 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
@@ -116,6 +116,4 @@ &cpu103 {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
- clocks = <&xtal>, <&xtal>;
- clock-names = "clkin0", "clkin1";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
index 08c33ec7e9f1..92e8b26ecccc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
@@ -257,8 +257,6 @@ &pcie {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
@@ -273,8 +271,6 @@ &pwm_ef {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
index d4e1990b5f26..54663c55a20e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
@@ -367,8 +367,6 @@ &pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pwm_ef {
@@ -380,8 +378,6 @@ &pwm_ef {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
index 16dd409051b4..48650bad230d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
@@ -92,16 +92,12 @@ &cpu103 {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index 09d959aefb18..7e8964bacfce 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -327,16 +327,12 @@ hdmi_tx_tmds_out: endpoint {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
index 39feba7f2d08..fc05ecf90714 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
@@ -379,32 +379,24 @@ &ir {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
index 4cb6930ffb19..a7a0fc264cdc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
@@ -304,24 +304,18 @@ &ir {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
index 929e4720ae76..ac9c4c2673b1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
@@ -458,24 +458,18 @@ &pwm_AO_cd {
status = "okay";
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
};
&pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_b_x7_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
};
&pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_d_x3_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
index d1fa8b8bf795..a3463149db3d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
@@ -199,15 +199,11 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -215,8 +211,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&saradc {
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
index 81dce862902a..40db95f64636 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
@@ -367,8 +367,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
index 9c0b544e2209..5d75ad3f3e46 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
@@ -78,8 +78,6 @@ &cpu3 {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index 7b0e9817a615..ad8d07883760 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -392,8 +392,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
index 2e3397e55da2..37d7f64b6d5d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
@@ -435,15 +435,11 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -451,8 +447,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&saradc {
--
2.34.1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v1-iio-adc-meson-fix-voltage-reference-sele.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMGIT-6.14-iio-adc-meson-fix-voltage-reference-sel.patch
View File

@ -1,7 +1,7 @@
From 56e84bec23b10cabde822270d302894606e4b713 Mon Sep 17 00:00:00 2001
From a6281657db05969415768f451e0a00ea78d3ed4f Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:04:49 +0100
Subject: [PATCH 21/33] FROMLIST(v1): iio: adc: meson: fix voltage reference
Subject: [PATCH 19/58] FROMGIT(6.14): iio: adc: meson: fix voltage reference
selection field name typo
The field should be called "vref_voltage", without a typo in the word

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v1-iio-adc-consistently-use-bool-and-enum-i.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMGIT-6.14-iio-adc-consistently-use-bool-and-enum-.patch
View File

@ -1,7 +1,7 @@
From c1aabff59ea22fa738468c6d6b27529486220a3f Mon Sep 17 00:00:00 2001
From e29ff40f91293fa328007a5619276acd9d3ed517 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:30:02 +0100
Subject: [PATCH 22/33] FROMLIST(v1): iio: adc: consistently use bool and enum
Subject: [PATCH 20/58] FROMGIT(6.14): iio: adc: consistently use bool and enum
in struct meson_sar_adc_param
Consistently use bool for any register bit that enables/disables

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v1-iio-adc-meson-simplify-MESON_SAR_ADC_REG.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMGIT-6.14-iio-adc-meson-simplify-MESON_SAR_ADC_RE.patch
View File

@ -1,7 +1,7 @@
From 606148e3e5f9dde444493b5e4ba08875606f938c Mon Sep 17 00:00:00 2001
From 57dd1613ffad9447ab060acf43c89e3fdb02f007 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:35:58 +0100
Subject: [PATCH 23/33] FROMLIST(v1): iio: adc: meson: simplify
Subject: [PATCH 21/58] FROMGIT(6.14): iio: adc: meson: simplify
MESON_SAR_ADC_REG11 register access
Simply check the max_register value to decide whether

52
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v1-phy-amlogic-meson8b-usb2-Use-FIELD_PREP-.patch Normal file
View File

@ -0,0 +1,52 @@
From dc482c50adb617ed078a0b8d6ed592ee366ba1f2 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Tue, 31 Dec 2024 20:17:17 +0100
Subject: [PATCH 22/58] FROMLIST(v1): phy: amlogic: meson8b-usb2: Use
FIELD_PREP instead of _SHIFT macros
This simplifies the code by re-using the FIELD_PREP helper. No
functional changes inteded.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
drivers/phy/amlogic/phy-meson8b-usb2.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/amlogic/phy-meson8b-usb2.c b/drivers/phy/amlogic/phy-meson8b-usb2.c
index d63147c41b8c..d9c761b7c15c 100644
--- a/drivers/phy/amlogic/phy-meson8b-usb2.c
+++ b/drivers/phy/amlogic/phy-meson8b-usb2.c
@@ -5,6 +5,7 @@
* Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
@@ -39,9 +40,7 @@
#define REG_CTRL_TX_BITSTUFF_ENN BIT(18)
#define REG_CTRL_COMMON_ON BIT(19)
#define REG_CTRL_REF_CLK_SEL_MASK GENMASK(21, 20)
- #define REG_CTRL_REF_CLK_SEL_SHIFT 20
#define REG_CTRL_FSEL_MASK GENMASK(24, 22)
- #define REG_CTRL_FSEL_SHIFT 22
#define REG_CTRL_PORT_RESET BIT(25)
#define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26)
@@ -170,10 +169,10 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
REG_CONFIG_CLK_32k_ALTSEL);
regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK,
- 0x2 << REG_CTRL_REF_CLK_SEL_SHIFT);
+ FIELD_PREP(REG_CTRL_REF_CLK_SEL_MASK, 0x2));
regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK,
- 0x5 << REG_CTRL_FSEL_SHIFT);
+ FIELD_PREP(REG_CTRL_FSEL_MASK, 0x5));
/* reset the PHY */
regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET,
--
2.34.1

83
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v1-phy-amlogic-meson8b-usb2-Use-the-regmap_.patch Normal file
View File

@ -0,0 +1,83 @@
From 7f60fb3bd884d9a369597f7d87ff50b51314890b Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Tue, 31 Dec 2024 20:17:18 +0100
Subject: [PATCH 23/58] FROMLIST(v1): phy: amlogic: meson8b-usb2: Use the
regmap_{clear,set}_bits helpers
These require less code, reduce the chance of typos and overall make the
intent clearer. No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
drivers/phy/amlogic/phy-meson8b-usb2.c | 28 ++++++++++----------------
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/drivers/phy/amlogic/phy-meson8b-usb2.c b/drivers/phy/amlogic/phy-meson8b-usb2.c
index d9c761b7c15c..a553231a9f7c 100644
--- a/drivers/phy/amlogic/phy-meson8b-usb2.c
+++ b/drivers/phy/amlogic/phy-meson8b-usb2.c
@@ -165,8 +165,7 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
return ret;
}
- regmap_update_bits(priv->regmap, REG_CONFIG, REG_CONFIG_CLK_32k_ALTSEL,
- REG_CONFIG_CLK_32k_ALTSEL);
+ regmap_set_bits(priv->regmap, REG_CONFIG, REG_CONFIG_CLK_32k_ALTSEL);
regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK,
FIELD_PREP(REG_CTRL_REF_CLK_SEL_MASK, 0x2));
@@ -175,23 +174,20 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
FIELD_PREP(REG_CTRL_FSEL_MASK, 0x5));
/* reset the PHY */
- regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET,
- REG_CTRL_POWER_ON_RESET);
+ regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET);
udelay(RESET_COMPLETE_TIME);
- regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, 0);
+ regmap_clear_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET);
udelay(RESET_COMPLETE_TIME);
- regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT,
- REG_CTRL_SOF_TOGGLE_OUT);
+ regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT);
if (priv->dr_mode == USB_DR_MODE_HOST) {
- regmap_update_bits(priv->regmap, REG_DBG_UART,
- REG_DBG_UART_SET_IDDQ, 0);
+ regmap_clear_bits(priv->regmap, REG_DBG_UART,
+ REG_DBG_UART_SET_IDDQ);
if (priv->match->host_enable_aca) {
- regmap_update_bits(priv->regmap, REG_ADP_BC,
- REG_ADP_BC_ACA_ENABLE,
- REG_ADP_BC_ACA_ENABLE);
+ regmap_set_bits(priv->regmap, REG_ADP_BC,
+ REG_ADP_BC_ACA_ENABLE);
udelay(ACA_ENABLE_COMPLETE_TIME);
@@ -214,17 +210,15 @@ static int phy_meson8b_usb2_power_off(struct phy *phy)
struct phy_meson8b_usb2_priv *priv = phy_get_drvdata(phy);
if (priv->dr_mode == USB_DR_MODE_HOST)
- regmap_update_bits(priv->regmap, REG_DBG_UART,
- REG_DBG_UART_SET_IDDQ,
- REG_DBG_UART_SET_IDDQ);
+ regmap_set_bits(priv->regmap, REG_DBG_UART,
+ REG_DBG_UART_SET_IDDQ);
clk_disable_unprepare(priv->clk_usb);
clk_disable_unprepare(priv->clk_usb_general);
reset_control_rearm(priv->reset);
/* power off the PHY by putting it into reset mode */
- regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET,
- REG_CTRL_POWER_ON_RESET);
+ regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET);
return 0;
}
--
2.34.1

14
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-dt-bindings-iio-adc-amlogic-meson-saradc.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v1-dt-bindings-iio-adc-amlogic-meson-saradc.patch
View File

@ -1,14 +1,14 @@
From 2576e48d539b38b0bd7dcdde8d6fac41976d3162 Mon Sep 17 00:00:00 2001
From d76a2842469fc900d6449b4aa07b196391a4c46a Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:38:59 +0100
Subject: [PATCH 25/33] FROMLIST(v1): dt-bindings: iio: adc:
amlogic,meson-saradc: add GXLX SoC compatible
Date: Tue, 31 Dec 2024 20:42:06 +0100
Subject: [PATCH 24/58] FROMLIST(v1): dt-bindings: iio: adc:
amlogic,meson-saradc: Add GXLX SoC compatible
Add support for the GXLX SoC. GXLX is very similar to GXL but has three
additional bits in MESON_SAR_ADC_REG12 for the three MPLL clocks.
Add a compatible string for the GXLX SoC. It's very similar to GXL but
has three additional bits in MESON_SAR_ADC_REG12 for the three MPLL
clocks.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml | 1 +
1 file changed, 1 insertion(+)

50
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v1-iio-adc-meson-add-support-for-the-GXLX-S.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-iio-adc-meson-add-support-for-the-GXLX-S.patch
View File

@ -1,22 +1,27 @@
From 6533ea8356b2834ebeb5093cfd13110cb01e0609 Mon Sep 17 00:00:00 2001
From 4c158d6d73a74576fa56c603ebc6ed6758785f97 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:44:41 +0100
Subject: [PATCH 26/33] FROMLIST(v1): iio: adc: meson: add support for the GXLX
Date: Wed, 1 Jan 2025 07:13:52 +0000
Subject: [PATCH 25/58] FROMLIST(v1): iio: adc: meson: add support for the GXLX
SoC
The SARADC IP on GXLX is identical to the one found on GXL SoCs: except
GXLX requires poking the first three bits in the MESON_SAR_ADC_REG12
register to get the three MPLL clocks (used as clock generators for the
audio frequencies) to work. Register bits are from the vendor kernel.
The SARADC IP on the GXLX SoC itself is identical to the one found on
GXL SoCs. However, GXLX SoCs require poking the first three bits in the
MESON_SAR_ADC_REG12 register to get the three MPLL clocks (used as clock
generators for the audio frequencies) to work.
The reason why there are MPLL clock bits in the ADC register space is
entirely unknown and it seems that nobody is able to comment on this.
So clearly mark this as a workaround and add a warning so users are
notified that this workaround can change (once we know what these bits
actually do).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/iio/adc/meson_saradc.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
drivers/iio/adc/meson_saradc.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
index ba63ec05d8c0..4896442ccf69 100644
index ba63ec05d8c0..78db771ce602 100644
--- a/drivers/iio/adc/meson_saradc.c
+++ b/drivers/iio/adc/meson_saradc.c
@@ -160,6 +160,11 @@
@ -31,28 +36,31 @@ index ba63ec05d8c0..4896442ccf69 100644
#define MESON_SAR_ADC_REG13 0x34
#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8)
@@ -329,6 +334,7 @@ struct meson_sar_adc_param {
bool has_vref_select;
bool cmv_select;
@@ -331,6 +336,7 @@ struct meson_sar_adc_param {
bool adc_eoc;
+ bool mpll_clock_bits;
enum meson_sar_adc_vref_sel vref_select;
enum meson_sar_adc_vref_voltage vref_voltage;
+ bool enable_mpll_clock_workaround;
};
@@ -1001,6 +1007,12 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
struct meson_sar_adc_data {
@@ -1001,6 +1007,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0;
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
MESON_SAR_ADC_REG11_CMV_SEL, regval);
+
+ if (priv->param->mpll_clock_bits)
+ if (priv->param->enable_mpll_clock_workaround) {
+ dev_warn(dev,
+ "Enabling unknown bits to make the MPLL clocks work\n");
+ regmap_write(priv->regmap, MESON_SAR_ADC_REG12,
+ MESON_SAR_ADC_REG12_MPLL0_UNKNOWN |
+ MESON_SAR_ADC_REG12_MPLL1_UNKNOWN |
+ MESON_SAR_ADC_REG12_MPLL2_UNKNOWN);
+ }
}
ret = clk_set_parent(priv->adc_sel_clk, priv->clkin);
@@ -1225,6 +1237,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
@@ -1225,6 +1240,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
.cmv_select = true,
};
@ -64,13 +72,13 @@ index ba63ec05d8c0..4896442ccf69 100644
+ .disable_ring_counter = 1,
+ .vref_voltage = VREF_VOLTAGE_1V8,
+ .cmv_select = true,
+ .mpll_clock_bits = true,
+ .enable_mpll_clock_workaround = true,
+};
+
static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
.has_bl30_integration = true,
.clock_rate = 1200000,
@@ -1274,6 +1297,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
@@ -1274,6 +1300,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
.name = "meson-gxl-saradc",
};
@ -82,7 +90,7 @@ index ba63ec05d8c0..4896442ccf69 100644
static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
.param = &meson_sar_adc_gxl_param,
.name = "meson-gxm-saradc",
@@ -1305,6 +1333,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
@@ -1305,6 +1336,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
}, {
.compatible = "amlogic,meson-gxl-saradc",
.data = &meson_sar_adc_gxl_data,

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch
View File

@ -1,7 +1,7 @@
From 19e7465b242ecc0c8cfaede20164295b6f660d34 Mon Sep 17 00:00:00 2001
From 16fcf51c5694fa2ac6ae87b514c74603cd45da74 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Sun, 20 Feb 2022 08:23:12 +0000
Subject: [PATCH 12/33] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
Subject: [PATCH 26/58] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
Micro Electronics
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch
View File

@ -1,7 +1,7 @@
From e46deeed69482ec684815f3a531cb8ad251fe142 Mon Sep 17 00:00:00 2001
From 1d0270575e13458c4519572595f7b4ddae4cfd95 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 20 Feb 2022 08:24:47 +0000
Subject: [PATCH 13/33] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
Subject: [PATCH 27/58] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
Electronics TM1628
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch
View File

@ -1,7 +1,7 @@
From 2a4d5208903d3665578367b6f7865a19f4e3f986 Mon Sep 17 00:00:00 2001
From 569d8ef29673036cbd08a556ac9e0e8ec75d86f5 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 20 Feb 2022 08:26:27 +0000
Subject: [PATCH 14/33] FROMLIST(v5): docs: ABI: document tm1628 attribute
Subject: [PATCH 28/58] FROMLIST(v5): docs: ABI: document tm1628 attribute
display-text
Document the attribute for reading / writing the text to be displayed on

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch
View File

@ -1,7 +1,7 @@
From c1711421b2572675ce9d5daae6ea74b553240599 Mon Sep 17 00:00:00 2001
From ff2e2e672a2dbe994d12ad056adeace66238e008 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:51:20 +0000
Subject: [PATCH 15/33] FROMLIST(v5): auxdisplay: add support for Titanmec
Subject: [PATCH 29/58] FROMLIST(v5): auxdisplay: add support for Titanmec
TM1628 7 segment display controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch
View File

@ -1,7 +1,7 @@
From 02c3bfc2944b0e2d90390319c2da2a5ccfc30231 Mon Sep 17 00:00:00 2001
From cc2a2e7e870bd2f2a80151ad327e56786a098369 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:52:34 +0000
Subject: [PATCH 16/33] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
Subject: [PATCH 30/58] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
support for the 7 segment display
This patch adds support for the 7 segment display of the device.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch
View File

@ -1,7 +1,7 @@
From 6a54c2089e7c40e29bcf7f0a916a6ac7fc476f6b Mon Sep 17 00:00:00 2001
From 936d8c801b33826118dc4af1206a41a72426dc1a Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:53:32 +0000
Subject: [PATCH 17/33] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
Subject: [PATCH 31/58] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
auxdisplay driver
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch
View File

@ -1,7 +1,7 @@
From cdb6e254eb68d10a44fc95b6540f2cfe6f3d9773 Mon Sep 17 00:00:00 2001
From ef9cd2cdcba0395ea27a277159a4865ec5a81f07 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Mon, 22 Nov 2021 09:15:21 +0000
Subject: [PATCH 18/33] FROMLIST(v1): media: meson: vdec: esparser: check
Subject: [PATCH 32/58] FROMLIST(v1): media: meson: vdec: esparser: check
parsing state with hardware write pointer
Also check the hardware write pointer to check if ES Parser has stalled.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch
View File

@ -1,7 +1,7 @@
From 8fb47151a82295fef3997194419d0b5eee5bbda2 Mon Sep 17 00:00:00 2001
From 4adad828c9424fa38e77d4d4db059005a801b137 Mon Sep 17 00:00:00 2001
From: Benjamin Roszak <benjamin545@gmail.com>
Date: Mon, 23 Jan 2023 10:56:46 +0000
Subject: [PATCH 19/33] FROMLIST(v2): media: meson: vdec: implement 10bit
Subject: [PATCH 33/58] FROMLIST(v2): media: meson: vdec: implement 10bit
bitstream handling
In order to support 10bit bitstream decoding, buffers and MMU

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch
View File

@ -1,7 +1,7 @@
From 3de3422522f8108586a64a6975035573aa25e854 Mon Sep 17 00:00:00 2001
From 17d64d5f1306f504ccb704b054c095b77e44ec14 Mon Sep 17 00:00:00 2001
From: Maxime Jourdan <mjourdan@baylibre.com>
Date: Mon, 23 Jan 2023 11:07:04 +0000
Subject: [PATCH 20/33] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
Subject: [PATCH 34/58] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
the common "HEVC" decoder driver.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v1-net-mdio-meson-gxl-set-28th-bit-in-eth_r.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-net-mdio-meson-gxl-set-28th-bit-in-eth_r.patch
View File

@ -1,7 +1,7 @@
From 5e3029b2cb9d6ab605542073be21fa9800155dd4 Mon Sep 17 00:00:00 2001
From 0835f2e90254da80bc6aa91c8eff6632d654898a Mon Sep 17 00:00:00 2001
From: Da Xue <da@libre.computer>
Date: Fri, 24 May 2024 15:17:37 +0000
Subject: [PATCH 24/33] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
Subject: [PATCH 35/58] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
eth_reg2
This bit is necessary to enable packets on the interface. Without this

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v1-dt-bindings-usb-dwc2-allow-device-sub-no.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-FROMLIST-v1-dt-bindings-usb-dwc2-allow-device-sub-no.patch
View File

@ -1,7 +1,7 @@
From b3a3dbc7608b4e8c96879b2322889543951c0dfe Mon Sep 17 00:00:00 2001
From 667dcccc4fdc1f37a4b79d6010cd1b07a4667416 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 5 Jun 2024 11:15:11 +0200
Subject: [PATCH 27/33] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
Subject: [PATCH 36/58] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
sub-nodes
Allow the '#address-cells', '#size-cells' and subnodes as defined in

60
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-FROMLIST-v1-drm-meson-Avoid-use-after-free-issues-wi.patch Normal file
View File

@ -0,0 +1,60 @@
From cc29170bb5e920caa4d4db264c703ad0cbca937c Mon Sep 17 00:00:00 2001
From: Zhang Kunbo <zhangkunbo@huawei.com>
Date: Wed, 6 Nov 2024 02:45:48 +0000
Subject: [PATCH 37/58] FROMLIST(v1): drm/meson: Avoid use-after-free issues
with crtc
It's dangerous to call drm_crtc_init_with_planes() whose second
argument is allocated with devm_kzalloc() [1][2].
Use drmm_kzalloc instead to avoid UAF.
[1] https://lore.kernel.org/all/a830685d8b10a00cfe0a86db1ee9fb13@ispras.ru
[2] https://lore.kernel.org/all/2111196.TG1k3f53YQ@avalon
Fixes: bbbe775ec5b5 ("drm: Add support for Amlogic Meson Graphic Controller")
Signed-off-by: Zhang Kunbo <zhangkunbo@huawei.com>
---
drivers/gpu/drm/meson/meson_crtc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
index d70616da8ce2..603022554a48 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -17,6 +17,7 @@
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_vblank.h>
+#include <drm/drm_managed.h>
#include "meson_crtc.h"
#include "meson_plane.h"
@@ -72,7 +73,6 @@ static void meson_crtc_disable_vblank(struct drm_crtc *crtc)
static const struct drm_crtc_funcs meson_crtc_funcs = {
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
- .destroy = drm_crtc_cleanup,
.page_flip = drm_atomic_helper_page_flip,
.reset = drm_atomic_helper_crtc_reset,
.set_config = drm_atomic_helper_set_config,
@@ -677,14 +677,14 @@ int meson_crtc_create(struct meson_drm *priv)
struct drm_crtc *crtc;
int ret;
- meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc),
+ meson_crtc = drmm_kzalloc(priv->drm, sizeof(*meson_crtc),
GFP_KERNEL);
if (!meson_crtc)
return -ENOMEM;
meson_crtc->priv = priv;
crtc = &meson_crtc->base;
- ret = drm_crtc_init_with_planes(priv->drm, crtc,
+ ret = drmm_crtc_init_with_planes(priv->drm, crtc,
priv->primary_plane, NULL,
&meson_crtc_funcs, "meson_crtc");
if (ret) {
--
2.34.1

79
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-FROMLIST-v1-ASoC-soc-dai-add-snd_soc_dai_prepare-and.patch Normal file
View File

@ -0,0 +1,79 @@
From 53a5f81522a4dd7c288f1861924a2c1eb98e7d14 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Mon, 6 Jan 2025 15:13:15 +0100
Subject: [PATCH 38/58] FROMLIST(v1): ASoC: soc-dai: add snd_soc_dai_prepare()
and use it internally
Add a new snd_soc_dai_prepare() which can be used (in an upcoming patch)
by soc-dapm.c. Use this new function internally in
snd_soc_pcm_dai_prepare() to avoid duplicating code.
Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
include/sound/soc-dai.h | 3 +++
sound/soc/soc-dai.c | 27 +++++++++++++++++++--------
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index 0d1b215f24f4..2680836ab28c 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -193,6 +193,9 @@ int snd_soc_dai_set_channel_map(struct snd_soc_dai *dai,
int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate);
+int snd_soc_dai_prepare(struct snd_soc_dai *dai,
+ struct snd_pcm_substream *substream);
+
/* Digital Audio Interface mute */
int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute,
int direction);
diff --git a/sound/soc/soc-dai.c b/sound/soc/soc-dai.c
index 4e08892d24c6..41328a8832ef 100644
--- a/sound/soc/soc-dai.c
+++ b/sound/soc/soc-dai.c
@@ -360,6 +360,22 @@ int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate)
}
EXPORT_SYMBOL_GPL(snd_soc_dai_set_tristate);
+int snd_soc_dai_prepare(struct snd_soc_dai *dai,
+ struct snd_pcm_substream *substream)
+{
+ int ret = 0;
+
+ if (!snd_soc_dai_stream_valid(dai, substream->stream))
+ return 0;
+
+ if (dai->driver->ops &&
+ dai->driver->ops->prepare)
+ ret = dai->driver->ops->prepare(substream, dai);
+
+ return soc_dai_ret(dai, ret);
+}
+EXPORT_SYMBOL_GPL(snd_soc_dai_prepare);
+
/**
* snd_soc_dai_digital_mute - configure DAI system or master clock.
* @dai: DAI
@@ -577,14 +593,9 @@ int snd_soc_pcm_dai_prepare(struct snd_pcm_substream *substream)
int i, ret;
for_each_rtd_dais(rtd, i, dai) {
- if (!snd_soc_dai_stream_valid(dai, substream->stream))
- continue;
- if (dai->driver->ops &&
- dai->driver->ops->prepare) {
- ret = dai->driver->ops->prepare(substream, dai);
- if (ret < 0)
- return soc_dai_ret(dai, ret);
- }
+ ret = snd_soc_dai_prepare(dai, substream);
+ if (ret < 0)
+ return ret;
}
return 0;
--
2.34.1

52
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-FROMLIST-v1-ASoC-dapm-add-support-for-preparing-stre.patch Normal file
View File

@ -0,0 +1,52 @@
From b9e02af3bf8aac6fd3815255b46bcb36fe082911 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Mon, 6 Jan 2025 15:13:16 +0100
Subject: [PATCH 39/58] FROMLIST(v1): ASoC: dapm: add support for preparing
streams
Codec driver can implement .hw_params and/or .prepare from struct
snd_soc_dai_ops. For codec-to-codec links only the former (.hw_params)
callback has been called.
On platforms like Amlogic Meson8/8b/8m2 the SoC's sound card
(sound/soc/meson/gx-card.c) uses a codec-to-codec link for the HDMI
codec output because further digital routing is required after the
backend. The new DRM HDMI (audio) codec framework (which internally
uses sound/soc/codecs/hdmi-codec.c) relies on the .prepare callback
of the hdmi-codec to be called. Implement a call to
snd_soc_dai_prepare() so the .prepare callback of the hdmi-codec is
called on those platforms.
For platforms or sound cards without a codec-to-codec link with
additional parameters (which applies to most hardware) this changes
nothing as the .prepare callback is already called via
snd_pcm_do_prepare() (as well as dpcm_fe_dai_prepare() and
dpcm_be_dai_prepare()) on those.
Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
sound/soc/soc-dapm.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index 99521c784a9b..ac8eef217dc4 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -4013,6 +4013,13 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w,
break;
case SND_SOC_DAPM_POST_PMU:
+ snd_soc_dapm_widget_for_each_sink_path(w, path) {
+ sink = path->sink->priv;
+
+ snd_soc_dai_prepare(sink, substream);
+ ret = 0;
+ }
+
snd_soc_dapm_widget_for_each_sink_path(w, path) {
sink = path->sink->priv;
--
2.34.1

32
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-arm64-dts-amlogic-gxlx-s905l-p271-add-saradc-com.patch Normal file
View File

@ -0,0 +1,32 @@
From 60e960b84a37676eb06d7d045799d0d5eeb357d6 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 1 Jan 2025 07:16:49 +0000
Subject: [PATCH 40/58] WIP: arm64: dts: amlogic: gxlx-s905l-p271: add saradc
compatible
Support for the meson-gxlx-saradc compatible has been merged and can
be added to the p271 (S905L) board to enable audio output.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts b/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts
index 942df754a0ed..1221f4545130 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts
@@ -38,6 +38,10 @@ mali: gpu@c0000 {
};
};
+&saradc {
+ compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
+};
+
&usb {
dr_mode = "host";
};
--
2.34.1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-WIP-media-meson-vdec-add-HEVC-and-remove-MPEG1-2-fro.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-media-meson-vdec-add-HEVC-and-remove-MPEG1-2-fro.patch
View File

@ -1,7 +1,7 @@
From 5f53272ee614cf73ecaf34a7e53ee3654cd7558e Mon Sep 17 00:00:00 2001
From 640283d8c1bcdb8951b7b3282be1581668ff4d59 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 4 Jun 2024 10:49:58 +0000
Subject: [PATCH 29/33] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
Subject: [PATCH 41/58] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
from GXLX
This patch is required until GXLX support has been merged upstream.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-WIP-media-meson-vdec-reintroduce-wiggle-room.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-media-meson-vdec-reintroduce-wiggle-room.patch
View File

@ -1,7 +1,7 @@
From 4d2be4c79a07f34759419a82e5939300d3a07725 Mon Sep 17 00:00:00 2001
From 8cb4bd2f10a588f0ec6e191fca998fb803b00c9c Mon Sep 17 00:00:00 2001
From: Andreas Baierl <ichgeh@imkreisrum.de>
Date: Tue, 2 Apr 2024 14:22:52 +0000
Subject: [PATCH 30/33] WIP: media: meson: vdec: reintroduce wiggle room
Subject: [PATCH 42/58] WIP: media: meson: vdec: reintroduce wiggle room
Without the wiggle room, it happens that matching offsets can't be found.
This results in non-matches and afterwards in frame drops in userspace apps.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch
View File

@ -1,7 +1,7 @@
From 1308444793f1952c583f1ccd3e8c22a88e1b04f4 Mon Sep 17 00:00:00 2001
From 50cd94397b46f73ad977477191d0e30b4830784f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 14 Mar 2023 01:13:15 +0000
Subject: [PATCH 31/33] WIP: media: meson: vdec: fix memory leak of 'new_frame'
Subject: [PATCH 43/58] WIP: media: meson: vdec: fix memory leak of 'new_frame'
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <error27@gmail.com>

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch
View File

@ -1,7 +1,7 @@
From 0f870d373ada156952baab7390bdec859c43b98f Mon Sep 17 00:00:00 2001
From d9310ff07f390796ce2d7752c3de1695348b18f9 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 26 May 2024 12:53:07 +0000
Subject: [PATCH 33/33] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
Subject: [PATCH 44/58] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
boards
Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)

46
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-mmc-core-set-initial-signal-voltage-on-power-off.patch Normal file
View File

@ -0,0 +1,46 @@
From 71e505c40e0c57bf296d749666087d3d26305ef8 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 17 Feb 2019 22:14:38 +0000
Subject: [PATCH 45/58] WIP: mmc: core: set initial signal voltage on power off
Some boards have SD card connectors where the power rail cannot be switched
off by the driver. If the card has not been power cycled, it may still be
using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling
will fail to boot from a UHS card that continue to use 1.8V signaling.
Set initial signal voltage in mmc_power_off() to allow re-boot to function.
This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288),
same issue have been seen on some Rockchip RK3399 boards.
I am sending this as a RFC because I have no insights into SD/MMC subsystem,
this change fix a re-boot issue on my boards and does not break emmc/sdio.
Is this an acceptable workaround? Any advice is appreciated.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/mmc/core/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 327029f5c59b..5ac10a847630 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1368,6 +1368,14 @@ void mmc_power_off(struct mmc_host *host)
if (host->ios.power_mode == MMC_POWER_OFF)
return;
+ mmc_set_initial_signal_voltage(host);
+
+ /*
+ * This delay should be sufficient to allow the power supply
+ * to reach the minimum voltage.
+ */
+ mmc_delay(host->ios.power_delay_ms);
+
mmc_pwrseq_power_off(host);
host->ios.clock = 0;
--
2.34.1

64
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@ -0,0 +1,64 @@
From 2610446cf4c76d44a74d94fa15381925711f5f97 Mon Sep 17 00:00:00 2001
From: Da Xue <da@libre.computer>
Date: Tue, 8 Aug 2023 01:00:15 -0400
Subject: [PATCH 46/58] WIP: net: phy: meson-gxl: implement
meson_gxl_phy_resume()
While testing the suspend/resume functionality, we found the ethernet
is broken if internal PHY of the Amlogic meson GXL SoC is used.
After system resume back, the ethernet is down, no carrier can be found.
eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state
DOWN group default qlen 1000
In this patch, the internal PHY is re-initialized to fix this problem.
eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP
group default qlen 1000
Cc: stable@vger.kernel.org # v5.10+
Fixes: 7334b3e47aee ("net: phy: Add Meson GXL Internal PHY driver")
Signed-off-by: Da Xue <da@libre.computer>
Signed-off-by: Luke Lu <luke.lu@libre.computer>
---
drivers/net/phy/meson-gxl.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
index bb9b33b6bce2..9ebe09b0cd8c 100644
--- a/drivers/net/phy/meson-gxl.c
+++ b/drivers/net/phy/meson-gxl.c
@@ -132,6 +132,21 @@ static int meson_gxl_config_init(struct phy_device *phydev)
return 0;
}
+static int meson_gxl_phy_resume(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = genphy_resume(phydev);
+ if (ret)
+ return ret;
+
+ ret = meson_gxl_config_init(phydev);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
/* This function is provided to cope with the possible failures of this phy
* during aneg process. When aneg fails, the PHY reports that aneg is done
* but the value found in MII_LPA is wrong:
@@ -196,7 +211,7 @@ static struct phy_driver meson_gxl_phy[] = {
.config_intr = smsc_phy_config_intr,
.handle_interrupt = smsc_phy_handle_interrupt,
.suspend = genphy_suspend,
- .resume = genphy_resume,
+ .resume = meson_gxl_phy_resume,
.read_mmd = genphy_read_mmd_unsupported,
.write_mmd = genphy_write_mmd_unsupported,
}, {
--
2.34.1

80
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@ -0,0 +1,80 @@
From 61d4d8fc7505b56e6b6fff1da6867783c4147151 Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Thu, 10 Sep 2020 11:01:33 +0900
Subject: [PATCH 47/58] WIP: drm/meson: add support for 2560x1440 resolution
output
Add support for Quad HD (QHD) 2560x1440 resolution output. Timings
have been adapted from the vendor kernel.
Signed-off-by: Joy Cho <joy.cho@hardkernel.com>
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/gpu/drm/meson/meson_vclk.c | 18 ++++++++++++++++++
drivers/gpu/drm/meson/meson_venc.c | 4 ++--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index 2a942dc6a6dc..c7a98da6b1ce 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -357,6 +357,8 @@ enum {
MESON_VCLK_HDMI_594000,
/* 2970 /1 /1 /1 /5 /1 => /1 /2 */
MESON_VCLK_HDMI_594000_YUV420,
+/* 4830 /2 /1 /2 /5 /1 => /1 /1 */
+ MESON_VCLK_HDMI_241500,
};
struct meson_vclk_params {
@@ -467,6 +469,18 @@ struct meson_vclk_params {
.vid_pll_div = VID_PLL_DIV_5,
.vclk_div = 1,
},
+ [MESON_VCLK_HDMI_241500] = {
+ .pll_freq = 4830000,
+ .phy_freq = 2415000,
+ .venc_freq = 241500,
+ .vclk_freq = 241500,
+ .pixel_freq = 241500,
+ .pll_od1 = 2,
+ .pll_od2 = 1,
+ .pll_od3 = 2,
+ .vid_pll_div = VID_PLL_DIV_5,
+ .vclk_div = 1,
+ },
{ /* sentinel */ },
};
@@ -873,6 +887,10 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
m = 0xf7;
frac = vic_alternate_clock ? 0x8148 : 0x10000;
break;
+ case 4830000:
+ m = 0xc9;
+ frac = 0xd560;
+ break;
}
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c
index 3bf0d6e4fc30..229602259248 100644
--- a/drivers/gpu/drm/meson/meson_venc.c
+++ b/drivers/gpu/drm/meson/meson_venc.c
@@ -868,10 +868,10 @@ meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode)
DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC))
return MODE_BAD;
- if (mode->hdisplay < 400 || mode->hdisplay > 1920)
+ if (mode->hdisplay < 320 || mode->hdisplay > 1920)
return MODE_BAD_HVALUE;
- if (mode->vdisplay < 480 || mode->vdisplay > 1920)
+ if (mode->vdisplay < 320 || mode->vdisplay > 1920)
return MODE_BAD_VVALUE;
return MODE_OK;
--
2.34.1

89
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@ -0,0 +1,89 @@
From e96a3e445695907574977ed7eabab53a617e0dd8 Mon Sep 17 00:00:00 2001
From: Luke Lu <luke.lu@libre.computer>
Date: Mon, 21 Aug 2023 10:50:04 +0000
Subject: [PATCH 48/58] WIP: drm/meson: do setup after resumption to fix hdmi
output
Some HDMI displays connected to gxl-based boards go black after
resumption, but recover after disconnecting and reconnecting.
Redoing setup by calling dw_hdmi_poweron() fixes the problem, which
requires a call of dw_hdmi_poweroff() to maintain the internal state.
Signed-off-by: Luke Lu <luke.lu@libre.computer>
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++--
drivers/gpu/drm/meson/meson_dw_hdmi.c | 3 +++
include/drm/bridge/dw_hdmi.h | 3 ++-
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 0031f3c54882..189a9abe2035 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -2378,7 +2378,7 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
}
-static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
+void dw_hdmi_poweron(struct dw_hdmi *hdmi)
{
hdmi->bridge_is_on = true;
@@ -2388,8 +2388,9 @@ static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
*/
dw_hdmi_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode);
}
+EXPORT_SYMBOL_GPL(dw_hdmi_poweron);
-static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
+void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
{
if (hdmi->phy.enabled) {
hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
@@ -2398,6 +2399,7 @@ static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
hdmi->bridge_is_on = false;
}
+EXPORT_SYMBOL_GPL(dw_hdmi_poweroff);
static void dw_hdmi_update_power(struct dw_hdmi *hdmi)
{
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 5565f7777529..eaee6e750550 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -823,6 +823,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
meson_dw_hdmi->data->top_write(meson_dw_hdmi,
HDMITX_TOP_SW_RESET, 0);
+ dw_hdmi_poweroff(meson_dw_hdmi->hdmi);
+
return 0;
}
@@ -835,6 +837,7 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
meson_dw_hdmi_init(meson_dw_hdmi);
+ dw_hdmi_poweron(meson_dw_hdmi->hdmi);
dw_hdmi_resume(meson_dw_hdmi->hdmi);
return 0;
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index 6a46baa0737c..5eac26a51245 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -171,7 +171,8 @@ void dw_hdmi_unbind(struct dw_hdmi *hdmi);
struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
struct drm_encoder *encoder,
const struct dw_hdmi_plat_data *plat_data);
-
+void dw_hdmi_poweron(struct dw_hdmi *hdmi);
+void dw_hdmi_poweroff(struct dw_hdmi *hdmi);
void dw_hdmi_resume(struct dw_hdmi *hdmi);
void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
--
2.34.1

77
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@ -0,0 +1,77 @@
From 8d9cb36fc74da909c1514a89b319c95b9253055c Mon Sep 17 00:00:00 2001
From: Luke Lu <luke.lu@libre.computer>
Date: Wed, 13 Dec 2023 03:47:44 +0000
Subject: [PATCH 49/58] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
enabled
dw_hdmi_poweron() assumes that hdmi->curr_conn is valid. Calling
dw_hdmi_poweron() in meson_dw_hdmi_pm_resume() only with the bridge
enabled ensures this, avoiding invalid memory access when resuming
with HDMI port disconnected.
dw_hdmi_poweroff() is called to maintain the internal state of dw_hdmi.
This is only needed when dw_hdmi_poweron() will be called later, i.e.
dw_hdmi is enabled.
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++++
drivers/gpu/drm/meson/meson_dw_hdmi.c | 7 +++++--
include/drm/bridge/dw_hdmi.h | 1 +
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 189a9abe2035..c4a60be40603 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -3642,6 +3642,12 @@ void dw_hdmi_resume(struct dw_hdmi *hdmi)
}
EXPORT_SYMBOL_GPL(dw_hdmi_resume);
+bool dw_hdmi_is_bridge_on(struct dw_hdmi *hdmi)
+{
+ return !hdmi->disabled;
+}
+EXPORT_SYMBOL_GPL(dw_hdmi_is_bridge_on);
+
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index eaee6e750550..a91cedbeed3d 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -823,7 +823,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
meson_dw_hdmi->data->top_write(meson_dw_hdmi,
HDMITX_TOP_SW_RESET, 0);
- dw_hdmi_poweroff(meson_dw_hdmi->hdmi);
+ if (dw_hdmi_is_bridge_on(meson_dw_hdmi->hdmi))
+ dw_hdmi_poweroff(meson_dw_hdmi->hdmi);
return 0;
}
@@ -837,7 +838,9 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
meson_dw_hdmi_init(meson_dw_hdmi);
- dw_hdmi_poweron(meson_dw_hdmi->hdmi);
+ if (dw_hdmi_is_bridge_on(meson_dw_hdmi->hdmi))
+ dw_hdmi_poweron(meson_dw_hdmi->hdmi);
+
dw_hdmi_resume(meson_dw_hdmi->hdmi);
return 0;
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index 5eac26a51245..e57d61009645 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -174,6 +174,7 @@ struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
void dw_hdmi_poweron(struct dw_hdmi *hdmi);
void dw_hdmi_poweroff(struct dw_hdmi *hdmi);
void dw_hdmi_resume(struct dw_hdmi *hdmi);
+bool dw_hdmi_is_bridge_on(struct dw_hdmi *hdmi);
void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
--
2.34.1

109
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch Normal file
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@ -0,0 +1,109 @@
From c94221d0abeae2820c328dd90bdf58260b3db2de Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 18 Jan 2022 15:09:12 +0000
Subject: [PATCH 50/58] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
100MHz
Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but
real-world tests on an assortment of GXL and GXM boards show noteable
increases in throughput when max-frequency is 100MHz, so let's use it.
Before results from a p231 device:
Connecting to host 192.168.0.1, port 5201
Reverse mode, remote host 192.168.0.1 is sending
[ 5] local 192.168.0.41 port 42550 connected to 192.168.0.1 port 5201
[ ID] Interval Transfer Bitrate
[ 5] 0.00-1.00 sec 8.84 MBytes 74.2 Mbits/sec
[ 5] 1.00-2.00 sec 9.60 MBytes 80.5 Mbits/sec
[ 5] 2.00-3.00 sec 9.07 MBytes 76.1 Mbits/sec
[ 5] 3.00-4.00 sec 9.14 MBytes 76.6 Mbits/sec
[ 5] 4.00-5.00 sec 9.26 MBytes 77.7 Mbits/sec
[ 5] 5.00-6.00 sec 9.08 MBytes 76.2 Mbits/sec
[ 5] 6.00-7.00 sec 9.11 MBytes 76.4 Mbits/sec
[ 5] 7.00-8.00 sec 8.65 MBytes 72.5 Mbits/sec
[ 5] 8.00-9.00 sec 9.24 MBytes 77.5 Mbits/sec
[ 5] 9.00-10.00 sec 8.57 MBytes 71.9 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bitrate Retr
[ 5] 0.00-10.27 sec 94.1 MBytes 76.8 Mbits/sec 0 sender
[ 5] 0.00-10.00 sec 90.6 MBytes 76.0 Mbits/sec receiver
clock: 50000000 Hz
actual clock: 50000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 2 (4 bits)
timing spec: 2 (sd high-speed)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
After results from a p231 device:
Connecting to host 192.168.0.1, port 5201
Reverse mode, remote host 192.168.0.1 is sending
[ 5] local 192.168.0.41 port 58534 connected to 192.168.0.1 port 5201
[ ID] Interval Transfer Bitrate
[ 5] 0.00-1.00 sec 12.6 MBytes 106 Mbits/sec
[ 5] 1.00-2.00 sec 13.0 MBytes 109 Mbits/sec
[ 5] 2.00-3.00 sec 12.8 MBytes 107 Mbits/sec
[ 5] 3.00-4.00 sec 13.2 MBytes 111 Mbits/sec
[ 5] 4.00-5.00 sec 12.4 MBytes 104 Mbits/sec
[ 5] 5.00-6.00 sec 11.2 MBytes 93.9 Mbits/sec
[ 5] 6.00-7.00 sec 12.3 MBytes 103 Mbits/sec
[ 5] 7.00-8.00 sec 12.3 MBytes 103 Mbits/sec
[ 5] 8.00-9.00 sec 12.5 MBytes 105 Mbits/sec
[ 5] 9.00-10.00 sec 12.3 MBytes 103 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bitrate Retr
[ 5] 0.00-10.22 sec 127 MBytes 104 Mbits/sec 0 sender
[ 5] 0.00-10.00 sec 125 MBytes 105 Mbits/sec receiver
clock: 100000000 Hz
actual clock: 100000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 2 (4 bits)
timing spec: 6 (sd uhs SDR104)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 +-
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 6da1316d97c6..f6ef4fc4a85c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -258,7 +258,7 @@ &sd_emmc_a {
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ max-frequency = <100000000>;
non-removable;
disable-wp;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
index 05a0d4de3ad7..ccaadb497880 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -119,7 +119,7 @@ &sd_emmc_a {
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ max-frequency = <100000000>;
non-removable;
disable-wp;
--
2.34.1

32
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0051-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch Normal file
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@ -0,0 +1,32 @@
From a3f4bebd2d4ea458ecb4ce61435ab100b7fa25b4 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 18 Jan 2022 15:18:32 +0000
Subject: [PATCH 51/58] WIP: arm64: dts: meson: remove SDIO node from Khadas
VIM1
Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we
can drop the node from the board dts.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index e137ebd48c5e..563e6e909363 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -219,10 +219,6 @@ &pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
};
-&sd_emmc_a {
- max-frequency = <100000000>;
-};
-
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
&uart_AO {
status = "okay";
--
2.34.1

47
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0052-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch Normal file
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@ -0,0 +1,47 @@
From e4f842f8844f4e1b936b304624d29dc3298de563 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 19 Jan 2022 06:45:06 +0000
Subject: [PATCH 52/58] WIP: arm64: dts: meson: add UHS SDIO capabilities to
p212/p23x/q20x
Add UHS capabilities to the SDIO node to enable 100MHz speeds.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index f6ef4fc4a85c..b3385f71bb48 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -258,6 +258,10 @@ &sd_emmc_a {
bus-width = <4>;
cap-sd-highspeed;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
max-frequency = <100000000>;
non-removable;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
index ccaadb497880..59539eca8f42 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -119,6 +119,10 @@ &sd_emmc_a {
bus-width = <4>;
cap-sd-highspeed;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
max-frequency = <100000000>;
non-removable;
--
2.34.1

28
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0053-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch Normal file
View File

@ -0,0 +1,28 @@
From d5b9ce9ddd25fb5c578f510730c03144a0e421e6 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Feb 2023 09:59:58 +0000
Subject: [PATCH 53/58] WIP: dt-bindings: arm: amlogic: add support for Tanix
TX9 Pro
The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 0647851ae1f5..1b449a03aeab 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -126,6 +126,7 @@ properties:
- libretech,aml-s912-pc
- minix,neo-u9h
- nexbox,a1
+ - oranth,tx9-pro
- tronsmart,vega-s96
- videostrong,gxm-kiii-pro
- wetek,core2
--
2.34.1

139
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0054-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch Normal file
View File

@ -0,0 +1,139 @@
From fb49a89b26b637997b16b598365b62df33e2fa07 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Feb 2023 10:01:14 +0000
Subject: [PATCH 54/58] WIP: arm64: dts: meson: add initial device-tree for
Tanix TX9 Pro
Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with
an S912 chip and the following specs:
- 3GB DDR3 RAM
- 32GB eMMC
- 10/100/1000 Base-T Ethernet
- AP6356 Wireless (802.11 b/g/n/ac, BT 5.0)
- HDMI 2.0a video
- VFD for clock/status
- 2x USB 2.0 ports
- IR receiver
- 1x Power LED (white)
- 1x Update/Reset button (underside)
- 1x micro SD card slot
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../boot/dts/amlogic/meson-gxm-tx9-pro.dts | 90 +++++++++++++++++++
2 files changed, 91 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 6c246387985a..9e27cc204a05 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-tx9-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
new file mode 100644
index 000000000000..9a62176cfe5a
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Endless Computers, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ */
+
+/dts-v1/;
+
+#include "meson-gxm.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
+ model = "Tanix TX9 Pro";
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "Update";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ button {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&ethmac {
+ pinctrl-0 = <&eth_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&external_phy>;
+ amlogic,tx-delay-ns = <2>;
+ phy-mode = "rgmii";
+};
+
+&external_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_15 */
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&ir {
+ linux,rc-map-name = "rc-tanix-tx3mini";
+};
+
+&sd_emmc_a {
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
--
2.34.1

93
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0055-WIP-arm64-dts-meson-add-7-segment-display-to-Tanix-T.patch Normal file
View File

@ -0,0 +1,93 @@
From ef8df69654666b8cc1335ee609bc01c04f606eb9 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Feb 2023 10:11:39 +0000
Subject: [PATCH 55/58] WIP: arm64: dts: meson: add 7-segment display to Tanix
TX9 Pro
Add support for the 7-segment VFD display of the device
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
.../boot/dts/amlogic/meson-gxm-tx9-pro.dts | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
index 9a62176cfe5a..2dcff00794b9 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
@@ -9,6 +9,7 @@
#include "meson-gxm.dtsi"
#include "meson-gx-p23x-q20x.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
/ {
compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
@@ -37,6 +38,64 @@ button {
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
+
+ spi {
+ compatible = "spi-gpio";
+ sck-gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio GPIODV_4 GPIO_ACTIVE_LOW>;
+ num-chipselects = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tm1628: led-controller@0 {
+ compatible = "titanmec,tm1628";
+ reg = <0>;
+ spi-3wire;
+ spi-lsb-first;
+ spi-rx-delay-us = <1>;
+ spi-max-frequency = <500000>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ titanmec,segment-mapping = /bits/ 8 <4 5 6 1 2 3 7>;
+ titanmec,grid = /bits/ 8 <4 3 2 1>;
+
+ alarm@5,1 {
+ reg = <5 1>;
+ function = LED_FUNCTION_ALARM;
+ };
+
+ usb@5,2 {
+ reg = <5 2>;
+ function = LED_FUNCTION_USB;
+ };
+ play@5,3 {
+ reg = <5 3>;
+ function = "play";
+ };
+
+ pause@5,4 {
+ reg = <5 4>;
+ function = "pause";
+ };
+
+ colon@5,5 {
+ reg = <5 5>;
+ function = "colon";
+ };
+
+ lan@5,6 {
+ reg = <5 6>;
+ function = LED_FUNCTION_LAN;
+ };
+
+ wlan@5,7 {
+ reg = <5 7>;
+ function = LED_FUNCTION_WLAN;
+ };
+ };
+ };
};
&ethmac {
--
2.34.1

12
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-Revert-drm-meson-vclk-fix-calculation-of-59.94-fract.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0056-WIP-revert-drm-meson-vclk-fix-calculation-of-59.94-f.patch
View File

@ -1,7 +1,7 @@
From dc557b41ff1fb30b13ac3e5fd5db8cbee9b523f6 Mon Sep 17 00:00:00 2001
From efab6d85acee1674025d985ad7334908d822279c Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 7 Jul 2024 03:16:12 +0000
Subject: [PATCH 32/33] Revert "drm/meson: vclk: fix calculation of 59.94
Date: Sat, 4 Jan 2025 23:45:46 +0000
Subject: [PATCH 56/58] WIP: revert "drm/meson: vclk: fix calculation of 59.94
fractional rates"
This reverts commit bfbc68e4d8695497f858a45a142665e22a512ea3.
@ -10,10 +10,10 @@ This reverts commit bfbc68e4d8695497f858a45a142665e22a512ea3.
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index 2a942dc6a6dc..2a82119eb58e 100644
index c7a98da6b1ce..eb4c251d79b7 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
@@ -804,13 +804,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
FREQ_1000_1001(params[i].pixel_freq));
DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
i, params[i].phy_freq,
@ -29,7 +29,7 @@ index 2a942dc6a6dc..2a82119eb58e 100644
vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
return MODE_OK;
}
@@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
@@ -1088,7 +1088,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
if ((phy_freq == params[freq].phy_freq ||

127
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0057-WIP-drm-meson-vclk-fix-precision-in-vclk-calculation.patch Normal file
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@ -0,0 +1,127 @@
From 67f0f159e9a9393f783191bc7e23a5514bf0836f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 4 Jan 2025 23:53:19 +0000
Subject: [PATCH 57/58] WIP: drm/meson: vclk: fix precision in vclk
calculations
Playing YUV420 @ 29.97 or 59.94 media causes HDMI output to
lose sync with a fatal error reported:
[ 89.610280] Fatal Error, invalid HDMI vclk freq 593406
In meson_encoder_hdmi_set_vclk the initial vclk_freq value is
593407 (correct) but YUV420 modes halve the value to 296703.5
and this is stored as int which loses precision by rounding
down to 296703. The rounded value is later doubled to 593406
resulting in meson_encoder_hdmi_set_vclk setting an invalid
value for vclk_freq and triggering the fatal error.
Correct the initial loss of precision by switching to unsigned
long long instead of int. However, as other areas of code are
still dependent on int calculations we need to fixup phy_freq
when YUV420 @ 29.97 or 59.94 modes are used.
Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 46 ++++++++++++----------
1 file changed, 26 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
index 0593a1cde906..2046a71477fd 100644
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
{
struct meson_drm *priv = encoder_hdmi->priv;
int vic = drm_match_cea_mode(mode);
- unsigned int phy_freq;
- unsigned int vclk_freq;
- unsigned int venc_freq;
- unsigned int hdmi_freq;
+ unsigned long long vclk_freq;
+ unsigned long long phy_freq;
+ unsigned long long venc_freq;
+ unsigned long long hdmi_freq;
- vclk_freq = mode->clock;
+ vclk_freq = mode->clock * 1000ULL;
/* For 420, pixel clock is half unlike venc clock */
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
@@ -85,8 +85,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
phy_freq = vclk_freq * 10;
if (!vic) {
- meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
- vclk_freq, vclk_freq, vclk_freq, false);
+ meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq / 1000ULL,
+ vclk_freq / 1000ULL, vclk_freq / 1000ULL,
+ vclk_freq / 1000ULL, false);
return;
}
@@ -107,12 +108,15 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2;
- dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
- phy_freq, vclk_freq, venc_freq, hdmi_freq,
- priv->venc.hdmi_use_enci);
+ /* Correct phy_freq for YUV420 @ 29.97 or 59.94 */
+ /* FIXME find a better way to do this */
+ if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 &&
+ phy_freq == 2967035000)
+ phy_freq -= 5000ULL;
- meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
- venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
+ meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq / 1000ULL,
+ vclk_freq / 1000ULL, venc_freq / 1000ULL, hdmi_freq / 1000ULL,
+ priv->venc.hdmi_use_enci);
}
static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
@@ -122,10 +126,10 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
struct meson_drm *priv = encoder_hdmi->priv;
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
- unsigned int phy_freq;
- unsigned int vclk_freq;
- unsigned int venc_freq;
- unsigned int hdmi_freq;
+ unsigned long long vclk_freq;
+ unsigned long long phy_freq;
+ unsigned long long venc_freq;
+ unsigned long long hdmi_freq;
int vic = drm_match_cea_mode(mode);
enum drm_mode_status status;
@@ -149,7 +153,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
} else if (!meson_venc_hdmi_supported_vic(vic))
return MODE_BAD;
- vclk_freq = mode->clock;
+ vclk_freq = mode->clock * 1000ULL;
/* For 420, pixel clock is half unlike venc clock */
if (drm_mode_is_420_only(display_info, mode) ||
@@ -179,10 +183,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2;
- dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
- __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
+ dev_dbg(priv->dev, "%s: phy=%lld vclk=%lld venc=%lld hdmi=%lld\n",
+ __func__, phy_freq / 1000ULL, vclk_freq / 1000ULL,
+ venc_freq / 1000ULL, hdmi_freq / 1000ULL);
- return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
+ return meson_vclk_vic_supported_freq(priv, phy_freq / 1000ULL,
+ vclk_freq / 1000ULL);
}
static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
--
2.34.1

45
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0058-fixup.patch Normal file
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@ -0,0 +1,45 @@
From 63d4c5e16a8c8c725d3c20b3b0d7710812307c17 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 10 Jan 2025 01:48:49 +0000
Subject: [PATCH 58/58] fixup!
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 6 +++---
drivers/gpu/drm/meson/meson_vclk.c | 3 ++-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
index 2046a71477fd..40431f912a4a 100644
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
@@ -110,9 +110,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
/* Correct phy_freq for YUV420 @ 29.97 or 59.94 */
/* FIXME find a better way to do this */
- if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 &&
- phy_freq == 2967035000)
- phy_freq -= 5000ULL;
+ //if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 &&
+ // phy_freq == 2967035000)
+ // phy_freq -= 5000ULL;
meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq / 1000ULL,
vclk_freq / 1000ULL, venc_freq / 1000ULL, hdmi_freq / 1000ULL,
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index eb4c251d79b7..35884fd4ba1c 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -1088,7 +1088,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
if ((phy_freq == params[freq].phy_freq ||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10 ||
+ ((phy_freq/10)*10) == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
(vclk_freq == params[freq].vclk_freq ||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
if (vclk_freq != params[freq].vclk_freq)
--
2.34.1

7
projects/Amlogic/linux/linux.aarch64.conf
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.12.3 Kernel Configuration
# Linux/arm64 6.12.9 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-14.2.0 (GCC) 14.2.0"
CONFIG_CC_IS_GCC=y
@ -384,6 +384,7 @@ CONFIG_ARM64_ERRATUM_3194386=y
# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set
# CONFIG_FUJITSU_ERRATUM_010001 is not set
# CONFIG_HISILICON_ERRATUM_161600802 is not set
# CONFIG_HISILICON_ERRATUM_162100801 is not set
# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
@ -1727,6 +1728,7 @@ CONFIG_ARM_SCPI_PROTOCOL=y
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_ARM_FFA_TRANSPORT is not set
# CONFIG_GOOGLE_FIRMWARE is not set
# CONFIG_IMX_SCMI_MISC_DRV is not set
CONFIG_MESON_SM=y
CONFIG_MESON_GX_PM=y
CONFIG_ARM_PSCI_FW=y
@ -4821,6 +4823,7 @@ CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FB_SYSMEM_FOPS=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_DMAMEM_HELPERS=y
CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y
CONFIG_FB_IOMEM_FOPS=y
CONFIG_FB_IOMEM_HELPERS=y
CONFIG_FB_SYSMEM_HELPERS=y
@ -7836,8 +7839,6 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y
# CONFIG_SCHEDSTATS is not set
# end of Scheduler Debugging
# CONFIG_DEBUG_TIMEKEEPING is not set
#
# Lock Debugging (spinlocks, mutexes, etc...)
#