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linux: update to linux-3.10.5
Signed-off-by: Stephan Raue <stephan@openelec.tv>
This commit is contained in:
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@ -34,7 +34,7 @@ case "$LINUX" in
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PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.bz2"
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PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.bz2"
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;;
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;;
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*)
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*)
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PKG_VERSION="3.10.4"
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PKG_VERSION="3.10.5"
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PKG_URL="http://www.kernel.org/pub/linux/kernel/v3.x/$PKG_NAME-$PKG_VERSION.tar.xz"
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PKG_URL="http://www.kernel.org/pub/linux/kernel/v3.x/$PKG_NAME-$PKG_VERSION.tar.xz"
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;;
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;;
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esac
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esac
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@ -1,106 +0,0 @@
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From 94a335dba34ff47cad3d6d0c29b452d43a1be3c8 Mon Sep 17 00:00:00 2001
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From: Daniel Vetter <daniel.vetter@ffwll.ch>
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Date: Wed, 17 Jul 2013 12:51:28 +0000
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Subject: drm/i915: correctly restore fences with objects attached
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To avoid stalls we delay tiling changes and especially hold of
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committing the new fence state for as long as possible.
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Synchronization points are in the execbuf code and in our gtt fault
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handler.
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Unfortunately we've missed that tricky detail when adding proper fence
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restore code in
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commit 19b2dbde5732170a03bd82cc8bd442cf88d856f7
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Author: Chris Wilson <chris@chris-wilson.co.uk>
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Date: Wed Jun 12 10:15:12 2013 +0100
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drm/i915: Restore fences after resume and GPU resets
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The result was that we've restored fences for objects with no tiling,
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since the object<->fence link still existed after resume. Now that
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wouldn't have been too bad since any subsequent access would have
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fixed things up, but if we've changed from tiled to untiled real havoc
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happened:
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The tiling stride is stored -1 in the fence register, so a stride of 0
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resulted in all 1s in the top 32bits, and so a completely bogus fence
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spanning everything from the start of the object to the top of the
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GTT. The tell-tale in the register dumps looks like:
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FENCE START 2: 0x0214d001
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FENCE END 2: 0xfffff3ff
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Bit 11 isn't set since the hw doesn't store it, even when writing all
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1s (at least on my snb here).
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To prevent such a gaffle in the future add a sanity check for fences
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with an untiled object attached in i915_gem_write_fence.
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v2: Fix the WARN, spotted by Chris.
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v3: Trying to reuse get_fences looked ugly and obfuscated the code.
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Instead reuse update_fence and to make it really dtrt also move the
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fence dirty state clearing into update_fence.
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Cc: Chris Wilson <chris@chris-wilson.co.uk>
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Cc: Stéphane Marchesin <marcheu@chromium.org>
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Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=60530
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Cc: stable@vger.kernel.org (for 3.10 only)
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Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Tested-by: Matthew Garrett <matthew.garrett@nebula.com>
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Tested-by: Björn Bidar <theodorstormgrade@gmail.com>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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---
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diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
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index 97afd26..d9e2208 100644
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--- a/drivers/gpu/drm/i915/i915_gem.c
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+++ b/drivers/gpu/drm/i915/i915_gem.c
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@@ -2258,7 +2258,17 @@ void i915_gem_restore_fences(struct drm_device *dev)
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for (i = 0; i < dev_priv->num_fence_regs; i++) {
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struct drm_i915_fence_reg *reg = &dev_priv->fence_regs[i];
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- i915_gem_write_fence(dev, i, reg->obj);
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+
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+ /*
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+ * Commit delayed tiling changes if we have an object still
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+ * attached to the fence, otherwise just clear the fence.
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+ */
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+ if (reg->obj) {
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+ i915_gem_object_update_fence(reg->obj, reg,
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+ reg->obj->tiling_mode);
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+ } else {
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+ i915_gem_write_fence(dev, i, NULL);
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+ }
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}
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}
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@@ -2795,6 +2805,10 @@ static void i915_gem_write_fence(struct drm_device *dev, int reg,
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if (i915_gem_object_needs_mb(dev_priv->fence_regs[reg].obj))
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mb();
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+ WARN(obj && (!obj->stride || !obj->tiling_mode),
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+ "bogus fence setup with stride: 0x%x, tiling mode: %i\n",
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+ obj->stride, obj->tiling_mode);
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+
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switch (INTEL_INFO(dev)->gen) {
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case 7:
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case 6:
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@@ -2836,6 +2850,7 @@ static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,
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fence->obj = NULL;
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list_del_init(&fence->lru_list);
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}
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+ obj->fence_dirty = false;
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}
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static int
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@@ -2965,7 +2980,6 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj)
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return 0;
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i915_gem_object_update_fence(obj, reg, enable);
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- obj->fence_dirty = false;
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return 0;
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}
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--
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cgit v0.9.0.2-2-gbebe
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