From f090615460fddf0dfde7b6e9071303c0406e95b2 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 7 Aug 2022 21:03:32 +0200 Subject: [PATCH 1/3] Allwinner: linux: remove unuseful patches for LE --- ...ement-plane-z-position-setting-logic.patch | 273 ------------------ ...use-update-regmap-variant-for-blend-.patch | 55 ---- ...dd-parenthesis-around-macro-argument.patch | 50 ---- 3 files changed, 378 deletions(-) delete mode 100644 projects/Allwinner/patches/linux/0025-drm-sun4i-Reimplement-plane-z-position-setting-logic.patch delete mode 100644 projects/Allwinner/patches/linux/0026-drm-sun4i-Don-t-use-update-regmap-variant-for-blend-.patch delete mode 100644 projects/Allwinner/patches/linux/0032-ASoC-sun4i-i2s-Add-parenthesis-around-macro-argument.patch diff --git a/projects/Allwinner/patches/linux/0025-drm-sun4i-Reimplement-plane-z-position-setting-logic.patch b/projects/Allwinner/patches/linux/0025-drm-sun4i-Reimplement-plane-z-position-setting-logic.patch deleted file mode 100644 index 89011ed4c1..0000000000 --- a/projects/Allwinner/patches/linux/0025-drm-sun4i-Reimplement-plane-z-position-setting-logic.patch +++ /dev/null @@ -1,273 +0,0 @@ -From f1c04148f8cc62bf99cb06e348f04452d307ebc8 Mon Sep 17 00:00:00 2001 -From: Roman Stratiienko -Date: Sat, 28 Dec 2019 22:28:17 +0200 -Subject: [PATCH 35/44] drm/sun4i: Reimplement plane z position setting logic - -To set blending channel order register software needs to know state and -position of each channel, which impossible at plane commit stage. - -Move this procedure to atomic_flush stage, where all necessary information -is available. - -Signed-off-by: Roman Stratiienko -Signed-off-by: Jernej Skrabec ---- - drivers/gpu/drm/sun4i/sun8i_mixer.c | 43 ++++++++++++++++++++++++-- - drivers/gpu/drm/sun4i/sun8i_mixer.h | 5 +++ - drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 42 ++++--------------------- - drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 39 +++-------------------- - 4 files changed, 57 insertions(+), 72 deletions(-) - ---- a/drivers/gpu/drm/sun4i/sun8i_mixer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c -@@ -250,8 +250,45 @@ int sun8i_mixer_drm_format_to_hw(u32 for - - static void sun8i_mixer_commit(struct sunxi_engine *engine) - { -- DRM_DEBUG_DRIVER("Committing changes\n"); -+ struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); -+ int channel_by_zpos[SUN8I_MIXER_MAX_CHANNELS]; -+ u32 base = sun8i_blender_base(mixer); -+ u32 route = 0, pipe_ctl = 0; -+ unsigned int channel_count; -+ int i, j; -+ -+ channel_count = mixer->cfg->vi_num + mixer->cfg->ui_num; -+ -+ DRM_DEBUG_DRIVER("Update blender routing\n"); -+ -+ for (i = 0; i < SUN8I_MIXER_MAX_CHANNELS; i++) -+ channel_by_zpos[i] = -1; -+ -+ for (i = 0; i < channel_count; i++) { -+ int zpos = mixer->channel_zpos[i]; -+ -+ if (zpos >= 0 && zpos < channel_count) -+ channel_by_zpos[zpos] = i; -+ } - -+ j = 0; -+ for (i = 0; i < channel_count; i++) { -+ int ch = channel_by_zpos[i]; -+ -+ if (ch >= 0) { -+ pipe_ctl |= SUN8I_MIXER_BLEND_PIPE_CTL_EN(j); -+ route |= ch << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(j); -+ j++; -+ } -+ } -+ -+ regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), -+ SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, pipe_ctl); -+ -+ regmap_write(mixer->engine.regs, -+ SUN8I_MIXER_BLEND_ROUTE(base), route); -+ -+ DRM_DEBUG_DRIVER("Committing changes\n"); - regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, - SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); - } -@@ -489,10 +526,12 @@ static int sun8i_mixer_bind(struct devic - SUN8I_MIXER_BLEND_COLOR_BLACK); - - plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; -- for (i = 0; i < plane_cnt; i++) -+ for (i = 0; i < plane_cnt; i++) { - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_MODE(base, i), - SUN8I_MIXER_BLEND_MODE_DEF); -+ mixer->channel_zpos[i] = -1; -+ } - - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); ---- a/drivers/gpu/drm/sun4i/sun8i_mixer.h -+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h -@@ -12,6 +12,8 @@ - - #include "sunxi_engine.h" - -+#define SUN8I_MIXER_MAX_CHANNELS 5 -+ - #define SUN8I_MIXER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) - #define SUN8I_MIXER_COORD(x, y) ((y) << 16 | (x)) - -@@ -177,6 +179,9 @@ struct sun8i_mixer { - - struct clk *bus_clk; - struct clk *mod_clk; -+ -+ /* -1 means that layer is disabled */ -+ int channel_zpos[SUN8I_MIXER_MAX_CHANNELS]; - }; - - static inline struct sun8i_mixer * ---- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -@@ -24,12 +24,10 @@ - #include "sun8i_ui_scaler.h" - - static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, -- int overlay, bool enable, unsigned int zpos, -- unsigned int old_zpos) -+ int overlay, bool enable, unsigned int zpos) - { -- u32 val, bld_base, ch_base; -+ u32 val, ch_base; - -- bld_base = sun8i_blender_base(mixer); - ch_base = sun8i_channel_base(mixer, channel); - - DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n", -@@ -44,32 +42,7 @@ static void sun8i_ui_layer_enable(struct - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); - -- if (!enable || zpos != old_zpos) { -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -- SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), -- 0); -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_ROUTE(bld_base), -- SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), -- 0); -- } -- -- if (enable) { -- val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -- val, val); -- -- val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_ROUTE(bld_base), -- SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), -- val); -- } -+ mixer->channel_zpos[channel] = enable ? zpos : -1; - } - - static void sun8i_ui_layer_update_alpha(struct sun8i_mixer *mixer, int channel, -@@ -294,11 +267,9 @@ static void sun8i_ui_layer_atomic_disabl - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, - plane); - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); -- unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; - -- sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, -- old_zpos); -+ sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0); - } - - static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, -@@ -310,12 +281,11 @@ static void sun8i_ui_layer_atomic_update - plane); - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); - unsigned int zpos = new_state->normalized_zpos; -- unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; - - if (!new_state->visible) { - sun8i_ui_layer_enable(mixer, layer->channel, -- layer->overlay, false, 0, old_zpos); -+ layer->overlay, false, 0); - return; - } - -@@ -328,7 +298,7 @@ static void sun8i_ui_layer_atomic_update - sun8i_ui_layer_update_buffer(mixer, layer->channel, - layer->overlay, plane); - sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, -- true, zpos, old_zpos); -+ true, zpos); - } - - static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = { ---- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -@@ -18,8 +18,7 @@ - #include "sun8i_vi_scaler.h" - - static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, -- int overlay, bool enable, unsigned int zpos, -- unsigned int old_zpos) -+ int overlay, bool enable, unsigned int zpos) - { - u32 val, bld_base, ch_base; - -@@ -38,32 +37,7 @@ static void sun8i_vi_layer_enable(struct - SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); - -- if (!enable || zpos != old_zpos) { -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -- SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), -- 0); -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_ROUTE(bld_base), -- SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), -- 0); -- } -- -- if (enable) { -- val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), -- val, val); -- -- val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); -- -- regmap_update_bits(mixer->engine.regs, -- SUN8I_MIXER_BLEND_ROUTE(bld_base), -- SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), -- val); -- } -+ mixer->channel_zpos[channel] = enable ? zpos : -1; - } - - static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, -@@ -398,11 +372,9 @@ static void sun8i_vi_layer_atomic_disabl - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, - plane); - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); -- unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; - -- sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, -- old_zpos); -+ sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0); - } - - static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, -@@ -414,12 +386,11 @@ static void sun8i_vi_layer_atomic_update - plane); - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); - unsigned int zpos = new_state->normalized_zpos; -- unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; - - if (!new_state->visible) { - sun8i_vi_layer_enable(mixer, layer->channel, -- layer->overlay, false, 0, old_zpos); -+ layer->overlay, false, 0); - return; - } - -@@ -432,7 +403,7 @@ static void sun8i_vi_layer_atomic_update - sun8i_vi_layer_update_buffer(mixer, layer->channel, - layer->overlay, plane); - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, -- true, zpos, old_zpos); -+ true, zpos); - } - - static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { diff --git a/projects/Allwinner/patches/linux/0026-drm-sun4i-Don-t-use-update-regmap-variant-for-blend-.patch b/projects/Allwinner/patches/linux/0026-drm-sun4i-Don-t-use-update-regmap-variant-for-blend-.patch deleted file mode 100644 index 6dbad80533..0000000000 --- a/projects/Allwinner/patches/linux/0026-drm-sun4i-Don-t-use-update-regmap-variant-for-blend-.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 144ad308ded7c5617d9574e174b68cbcb622cf4c Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 19 Jul 2020 11:28:49 +0200 -Subject: [PATCH 36/44] drm/sun4i: Don't use update regmap variant for blend - pipe register - -Readout might return invalid value, so always write it. - -Signed-off-by: Jernej Skrabec ---- - drivers/gpu/drm/sun4i/sun8i_mixer.c | 19 ++++++++----------- - 1 file changed, 8 insertions(+), 11 deletions(-) - ---- a/drivers/gpu/drm/sun4i/sun8i_mixer.c -+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c -@@ -282,8 +282,14 @@ static void sun8i_mixer_commit(struct su - } - } - -- regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), -- SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, pipe_ctl); -+ /* -+ * Set fill color of bottom plane to black. Generally not needed -+ * except when VI plane is at bottom (zpos = 0) and enabled. -+ */ -+ pipe_ctl |= SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0); -+ -+ regmap_write(mixer->engine.regs, -+ SUN8I_MIXER_BLEND_PIPE_CTL(base), pipe_ctl); - - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(base), route); -@@ -516,12 +522,6 @@ static int sun8i_mixer_bind(struct devic - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), - SUN8I_MIXER_BLEND_COLOR_BLACK); - -- /* -- * Set fill color of bottom plane to black. Generally not needed -- * except when VI plane is at bottom (zpos = 0) and enabled. -- */ -- regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), -- SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), - SUN8I_MIXER_BLEND_COLOR_BLACK); - -@@ -533,9 +533,6 @@ static int sun8i_mixer_bind(struct devic - mixer->channel_zpos[i] = -1; - } - -- regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), -- SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); -- - return 0; - - err_disable_bus_clk: diff --git a/projects/Allwinner/patches/linux/0032-ASoC-sun4i-i2s-Add-parenthesis-around-macro-argument.patch b/projects/Allwinner/patches/linux/0032-ASoC-sun4i-i2s-Add-parenthesis-around-macro-argument.patch deleted file mode 100644 index 1d50f97a4d..0000000000 --- a/projects/Allwinner/patches/linux/0032-ASoC-sun4i-i2s-Add-parenthesis-around-macro-argument.patch +++ /dev/null @@ -1,50 +0,0 @@ -From b10b474925447933bf1d718e6d064190b15b56d9 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 14 Jan 2021 19:26:03 +0100 -Subject: [PATCH 42/44] ASoC: sun4i-i2s: Add parenthesis around macro arguments - -Several macro arguments are not put inside parenthesis, which may cause -subtle issues. - -Fix those macros. - -Signed-off-by: Jernej Skrabec ---- - sound/soc/sunxi/sun4i-i2s.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - ---- a/sound/soc/sunxi/sun4i-i2s.c -+++ b/sound/soc/sunxi/sun4i-i2s.c -@@ -116,16 +116,16 @@ - - #define SUN8I_I2S_CHAN_CFG_REG 0x30 - #define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK GENMASK(7, 4) --#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) ((chan - 1) << 4) -+#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) (((chan) - 1) << 4) - #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(3, 0) --#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) (chan - 1) -+#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) ((chan) - 1) - - #define SUN8I_I2S_TX_CHAN_MAP_REG 0x44 - #define SUN8I_I2S_TX_CHAN_SEL_REG 0x34 - #define SUN8I_I2S_TX_CHAN_OFFSET_MASK GENMASK(13, 12) --#define SUN8I_I2S_TX_CHAN_OFFSET(offset) (offset << 12) -+#define SUN8I_I2S_TX_CHAN_OFFSET(offset) ((offset) << 12) - #define SUN8I_I2S_TX_CHAN_EN_MASK GENMASK(11, 4) --#define SUN8I_I2S_TX_CHAN_EN(num_chan) (((1 << num_chan) - 1) << 4) -+#define SUN8I_I2S_TX_CHAN_EN(num_chan) (((1 << (num_chan)) - 1) << 4) - - #define SUN8I_I2S_RX_CHAN_SEL_REG 0x54 - #define SUN8I_I2S_RX_CHAN_MAP_REG 0x58 -@@ -134,9 +134,9 @@ - #define SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET_MASK GENMASK(21, 20) - #define SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(offset) ((offset) << 20) - #define SUN50I_H6_I2S_TX_CHAN_SEL_MASK GENMASK(19, 16) --#define SUN50I_H6_I2S_TX_CHAN_SEL(chan) ((chan - 1) << 16) -+#define SUN50I_H6_I2S_TX_CHAN_SEL(chan) (((chan) - 1) << 16) - #define SUN50I_H6_I2S_TX_CHAN_EN_MASK GENMASK(15, 0) --#define SUN50I_H6_I2S_TX_CHAN_EN(num_chan) (((1 << num_chan) - 1)) -+#define SUN50I_H6_I2S_TX_CHAN_EN(num_chan) (((1 << (num_chan)) - 1)) - - #define SUN50I_H6_I2S_TX_CHAN_MAP0_REG 0x44 - #define SUN50I_H6_I2S_TX_CHAN_MAP1_REG 0x48 From 4bc6d8e381b4eb68b6ff88aadcf2f27a3a6fbe97 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 7 Aug 2022 21:04:29 +0200 Subject: [PATCH 2/3] Allwinner: linux: Re-enable mbus for SoCs with driver --- ...CK-Disable-MBUS-due-to-fw_devlink-on.patch | 40 ++++++------------- 1 file changed, 12 insertions(+), 28 deletions(-) diff --git a/projects/Allwinner/patches/linux/0057-HACK-Disable-MBUS-due-to-fw_devlink-on.patch b/projects/Allwinner/patches/linux/0057-HACK-Disable-MBUS-due-to-fw_devlink-on.patch index f0ce3264c5..8017edfe99 100644 --- a/projects/Allwinner/patches/linux/0057-HACK-Disable-MBUS-due-to-fw_devlink-on.patch +++ b/projects/Allwinner/patches/linux/0057-HACK-Disable-MBUS-due-to-fw_devlink-on.patch @@ -5,9 +5,8 @@ Subject: [PATCH] HACK: Disable MBUS due to fw_devlink=on --- arch/arm/boot/dts/sun8i-r40.dtsi | 1 + - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 + - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + - 3 files changed, 3 insertions(+) + arch/arm/boot/dts/sun8i-h3.dtsi | 1 + + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 291f4784e86c..173edaff4c9b 100644 @@ -21,30 +20,15 @@ index 291f4784e86c..173edaff4c9b 100644 }; tcon_top: tcon-top@1c70000 { -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index c7428df9469e..1cbb871b6628 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -575,6 +575,7 @@ mbus: dram-controller@1c62000 { - #size-cells = <1>; - dma-ranges = <0x00000000 0x40000000 0xc0000000>; - #interconnect-cells = <1>; -+ status = "disabled"; - }; +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index eac2349a2380..3c08f5ee2780 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -297,6 +297,7 @@ &display_clocks { - spi0: spi@1c68000 { -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 6ddb717f2f98..f0ec62b4170b 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -1135,6 +1135,7 @@ mbus: dram-controller@1c62000 { - #size-cells = <1>; - dma-ranges = <0x00000000 0x40000000 0xc0000000>; - #interconnect-cells = <1>; -+ status = "disabled"; - }; + &mbus { + compatible = "allwinner,sun8i-h3-mbus"; ++ status = "disabled"; + }; - csi: csi@1cb0000 { --- -2.33.0 - + &mmc0 { From a043f3220653538fbf3ecbae16d9d3f1957d267a Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 7 Aug 2022 21:39:32 +0200 Subject: [PATCH 3/3] Allwinner: u-boot: Fix boot on at least one board --- ...stabilization-delay-from-1ms-to-20ms.patch | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 projects/Allwinner/patches/u-boot/0013-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch diff --git a/projects/Allwinner/patches/u-boot/0013-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch b/projects/Allwinner/patches/u-boot/0013-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch new file mode 100644 index 0000000000..47eabdfe25 --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0013-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch @@ -0,0 +1,49 @@ +From: Da Xue +Date: Thu, 21 Jul 2022 18:08:21 -0400 + +Some users experienced problems booting u-boot from SPL hanging here: + +Trying to boot from MMC1 or Trying to boot from MMC2 + +This seems to occur with both MicroSD and eMMC modules on ALL-H3-CC. +Increasing the delay after mmc reset fixes these boot problems. +Some MicroSD cards are impacted more than others so it is possible that +MicroSD internals need time to stabilize. Below is some failure data. + +sandisk ultra 64gb 9/20 with 1ms, 20/20 with 10ms +sandisk ultra 16gb 2/20 with 1ms, 20/20 with 10ms +sandisk extreme 16gb 6/20 with 10ms, 20/20 with 20ms + +A quick comparison of schematics show series resistors for ESD +protection on the MicroSD GPIOs not present on all H3/H5 boards. +It is not known if this is related to the issue. + +This patch adds a fixed 20ms delay to mmc init to mitigate the problem. +If boot time optimization is required and the platform does not require +the delay. The delay can be replaced with: + +writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl); +if (wait_for_bit_le32( &priv->reg->gctrl, +SUNXI_MMC_GCTRL_RESET, false, 20, false)) { +printf("%s: Timeout\n", __func__); +return -ETIMEDOUT; +} + +Signed-off-by: Da Xue +--- + drivers/mmc/sunxi_mmc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c +index 1bb7b6d0e9..f7942b69ce 100644 +--- a/drivers/mmc/sunxi_mmc.c ++++ b/drivers/mmc/sunxi_mmc.c +@@ -297,7 +297,7 @@ static int sunxi_mmc_core_init(struct mmc *mmc) + + /* Reset controller */ + writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl); +- udelay(1000); ++ udelay(20000); + + return 0; + }