diff --git a/projects/Rockchip/README.md b/projects/Rockchip/README.md index e39aefc74c..58dc43c489 100644 --- a/projects/Rockchip/README.md +++ b/projects/Rockchip/README.md @@ -4,6 +4,8 @@ This project is for Rockchip SoC devices ## Devices +* [ASUS Tinker Board](devices/TinkerBoard) + **My single-board computer is not listed, will it be added in the future?**
If your single-board computer uses a current generation SoC listed on http://opensource.rock-chips.com/wiki_Main_Page the odds are in your favor. diff --git a/projects/Rockchip/devices/TinkerBoard/README.md b/projects/Rockchip/devices/TinkerBoard/README.md new file mode 100644 index 0000000000..69988b45a4 --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/README.md @@ -0,0 +1,46 @@ +# ASUS Tinker Board + +This is an experimental project for the ASUS Tinker Board + +**Progress** + +* [x] LEDs +* [ ] ~~CEC~~ +* [ ] Audio + * [x] HDMI Stereo L-PCM + * [x] HDMI Multi-channel L-PCM + * [x] HDA 3.5 mm jack + * [ ] HDMI NL-PCM (AC3/E-AC3/DTS) + * [ ] HDMI HBR (TrueHD/DTS-HD) +* [ ] Video + * [x] Software decoding + * [ ] Hardware decoding + * [x] h264 / hevc / vp8 + * [ ] mpeg4 / mpeg2 +* [ ] HDMI Video Format + * [x] RGB 4:4:4 Limited Range + * [ ] RGB 4:4:4 Full Range + * [ ] YCbCr 4:4:4 + * [ ] YCbCr 4:2:0 +* [x] WiFi +* [x] Bluetooth + +**Known Issues/Limitations** + +* Video output is RGB 4:4:4 8-bit limited range +* Video aspect ratio / zoom is not working for all modes +* Generic USB-Audio do not work due to a custom alsa config +* 4K resolution is limited to 30hz due to failed compliance test +* CEC is not connected to SoC + +**Serial Console** + +* UART2 on GPIO pin 32/33 with baud rate 115200 + +**Build** + +* `PROJECT=Rockchip DEVICE=TinkerBoard ARCH=arm make image` + +## Links + +* Community Forum: https://tinkerboarding.co.uk/forum/ diff --git a/projects/Rockchip/devices/TinkerBoard/filesystem/usr/share/alsa/cards/USB-Audio.conf b/projects/Rockchip/devices/TinkerBoard/filesystem/usr/share/alsa/cards/USB-Audio.conf new file mode 100644 index 0000000000..66367c7323 --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/filesystem/usr/share/alsa/cards/USB-Audio.conf @@ -0,0 +1,21 @@ +# +# Configuration for ALC4040 +# + +USB-Audio.pcm.default { + @args [ CARD ] + @args.CARD { type string } + type hw + card $CARD + device 2 +} + + + +USB-Audio.pcm.front.0 { + @args [ CARD ] + @args.CARD { type string } + type hw + card $CARD + device 2 +} diff --git a/projects/Rockchip/devices/TinkerBoard/options b/projects/Rockchip/devices/TinkerBoard/options new file mode 100644 index 0000000000..5c1164803b --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/options @@ -0,0 +1,32 @@ +################################################################################ +# setup device defaults +################################################################################ + + # The TARGET_CPU variable controls which processor should be targeted for + # generated code. + case $TARGET_ARCH in + arm) + TARGET_FLOAT="hard" + TARGET_CPU="cortex-a17" + TARGET_FPU="neon-vfpv4" + TARGET_FEATURES="32bit neon" + ;; + esac + + # Configuration for u-boot + UBOOT_SYSTEM="rk3288" + + # Kernel target + KERNEL_TARGET="zImage" + + # Additional kernel make parameters (for example to specify the u-boot loadaddress) + KERNEL_MAKE_EXTRACMD="rk3288-miniarm.dtb" + + # Mali GPU family + MALI_FAMILY="t760" + + # kernel image name + KERNEL_NAME="zImage" + + # kernel serial console + EXTRA_CMDLINE="console=uart8250,mmio32,0xff690000 console=tty0" diff --git a/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch new file mode 100644 index 0000000000..a58aa39795 --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch @@ -0,0 +1,220 @@ +From d2e1807b0248e9b0068a6f5f018bee44d5519797 Mon Sep 17 00:00:00 2001 +From: Ziyuan Xu +Date: Fri, 23 Sep 2016 13:43:18 +0800 +Subject: [PATCH 1/5] MINIARM: HACK: switch vccio_sd to 3.3v while shutdowning + +Change-Id: I80d6d2b61b31f16b6b42b9ffcaab077231a7a91c +Signed-off-by: Ziyuan Xu +--- + drivers/mmc/host/dw_mmc-rockchip.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c +index 29e3ae99edbc..531ad93ff912 100644 +--- a/drivers/mmc/host/dw_mmc-rockchip.c ++++ b/drivers/mmc/host/dw_mmc-rockchip.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + + #include "dw_mmc.h" +@@ -285,6 +286,15 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev) + return dw_mci_pltfm_register(pdev, drv_data); + } + ++static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) ++{ ++ struct dw_mci *host = platform_get_drvdata(pdev); ++ struct mmc_host *mmc = host->cur_slot->mmc; ++ ++ if (!IS_ERR(mmc->supply.vqmmc)) ++ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); ++} ++ + #ifdef CONFIG_PM_SLEEP + static int dw_mci_rockchip_suspend(struct device *dev) + { +@@ -308,6 +318,7 @@ static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops, + static struct platform_driver dw_mci_rockchip_pltfm_driver = { + .probe = dw_mci_rockchip_probe, + .remove = dw_mci_pltfm_remove, ++ .shutdown = dw_mci_rockchip_platfm_shutdown, + .driver = { + .name = "dwmmc_rockchip", + .of_match_table = dw_mci_rockchip_match, + +From 6683b1dea673b2747a4c20611f058f8a584e5e19 Mon Sep 17 00:00:00 2001 +From: Ziyuan Xu +Date: Mon, 6 Feb 2017 08:39:46 +0800 +Subject: [PATCH 2/5] MINIARM: HACK: mmc: dw_mmc-rockchip: enable vmmc supply + for reboot + +Mmc core has already power off the vmmc since shutdown, re-enable it so +that card is active in next reboot. + +Change-Id: Id64ed02844db9d834c820ed5b8c5bf7a0afe4ed5 +Signed-off-by: Ziyuan Xu +--- + drivers/mmc/host/dw_mmc-rockchip.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c +index 531ad93ff912..eae304077e17 100644 +--- a/drivers/mmc/host/dw_mmc-rockchip.c ++++ b/drivers/mmc/host/dw_mmc-rockchip.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + + #include "dw_mmc.h" + #include "dw_mmc-pltfm.h" +@@ -290,6 +291,12 @@ static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) + { + struct dw_mci *host = platform_get_drvdata(pdev); + struct mmc_host *mmc = host->cur_slot->mmc; ++ int ret; ++ ++ mdelay(20); ++ ++ if (!IS_ERR(mmc->supply.vmmc)) ++ ret = regulator_enable(mmc->supply.vmmc); + + if (!IS_ERR(mmc->supply.vqmmc)) + regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); + +From 9eb1e1e71abe6c2b0f10e3c1bd9dfba7acf2c8c5 Mon Sep 17 00:00:00 2001 +From: Jacob Chen +Date: Sat, 22 Jul 2017 19:55:09 +0800 +Subject: [PATCH 3/5] MINIARM: drm/rockchip: update phy settings + +Change-Id: I9e92a4191115e13999183a5d7656d6708adda632 +Signed-off-by: Jacob Chen +--- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index bc82b964943c..3585b0c10866 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -268,8 +268,7 @@ static struct dw_hdmi_phy_config rockchip_phy_config[] = { + /*pixelclk symbol term vlev*/ + { 74250000, 0x8009, 0x0004, 0x0272}, + { 165000000, 0x802b, 0x0004, 0x0209}, +- { 297000000, 0x8039, 0x0005, 0x028d}, +- { 594000000, 0x8039, 0x0000, 0x019d}, ++ { 297000000, 0x802d, 0x0001, 0x0149}, + { ~0UL, 0x0000, 0x0000, 0x0000} + }; + + +From e764ad67f5cf429a368cd406a1a9a2e5ffe3773c Mon Sep 17 00:00:00 2001 +From: Nickey Yang +Date: Mon, 17 Jul 2017 16:35:34 +0800 +Subject: [PATCH 4/5] MINIARM: set npll be used for hdmi only + +Change-Id: I8bebfb2cfb68e3dad172e5547d3886526ad5e912 +Signed-off-by: Nickey Yang +--- + arch/arm/boot/dts/rk3288.dtsi | 4 +++- + drivers/clk/rockchip/clk-rk3288.c | 6 +++--- + 2 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index b6d5dc42aee1..38f7c6dd11ca 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -979,7 +979,7 @@ + <&cru PCLK_PERI>; + assigned-clock-rates = <594000000>, + <500000000>, <300000000>, +- <150000000>, <75000000>, ++ <0>, <75000000>, + <300000000>, <150000000>, + <75000000>; + }; +@@ -1199,6 +1199,8 @@ + resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; + reset-names = "axi", "ahb", "dclk"; + iommus = <&vopb_mmu>; ++ assigned-clocks = <&cru DCLK_VOP0>; ++ assigned-clock-parents = <&cru PLL_NPLL>; + status = "disabled"; + + vopb_out: port { +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 54ff9e36e0e2..77cc66a501f7 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -211,9 +211,9 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { + [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3288_PLL_CON(8), + RK3288_MODE_CON, 8, 7, 0, rk3288_pll_rates), + [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12), +- RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), ++ RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates), + [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16), +- RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), ++ RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates), + }; + + static struct clk_div_table div_hclk_cpu_t[] = { +@@ -428,7 +428,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS, + RK3288_CLKGATE_CON(3), 4, GFLAGS), + +- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0, ++ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, + RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS, + RK3288_CLKGATE_CON(3), 1, GFLAGS), + COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0, + +From 73f855ba760c9df6eb1203948197f13b41365ba0 Mon Sep 17 00:00:00 2001 +From: Nickey Yang +Date: Mon, 24 Jul 2017 09:38:03 +0800 +Subject: [PATCH 5/5] MINIARM: clk: rockchip: add some clock settings + +Change-Id: I5f172106258f9dcb5617b245f729b661feacc92c +Signed-off-by: Nickey Yang +--- + drivers/clk/rockchip/clk-rk3288.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 77cc66a501f7..15d3aeb4448c 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -100,6 +100,29 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = { + RK3066_PLL_RATE( 216000000, 1, 72, 8), + RK3066_PLL_RATE( 148500000, 2, 99, 8), + RK3066_PLL_RATE( 126000000, 1, 84, 16), ++ RK3066_PLL_RATE_NB( 241500000, 2, 161, 8, 1), ++ RK3066_PLL_RATE( 252000000, 1, 84, 8), ++ RK3066_PLL_RATE( 216000000, 1, 72, 8), ++ RK3066_PLL_RATE( 148500000, 8, 693, 14), ++ RK3066_PLL_RATE( 135000000, 4, 315, 14), ++ RK3066_PLL_RATE( 126000000, 1, 84, 16), ++ RK3066_PLL_RATE( 119000000, 3, 238, 16), ++ RK3066_PLL_RATE( 108000000, 1, 72, 16), ++ RK3066_PLL_RATE( 88750000, 6, 355, 16), ++ RK3066_PLL_RATE( 71000000, 3, 142, 16), ++ RK3066_PLL_RATE( 74250000, 8, 297, 12), ++ RK3066_PLL_RATE( 78750000, 4, 210, 16), ++ RK3066_PLL_RATE( 78800000, 15, 788, 16), ++ RK3066_PLL_RATE( 75000000, 2, 100, 16), ++ RK3066_PLL_RATE( 65000000, 3, 130, 16), ++ RK3066_PLL_RATE( 136750000, 8, 547, 12), ++ RK3066_PLL_RATE( 106500000, 1, 71, 16), ++ RK3066_PLL_RATE( 88750000, 6, 355, 16), ++ RK3066_PLL_RATE( 67500000, 8, 315, 14), ++ RK3066_PLL_RATE( 49500000, 1, 33, 16), ++ RK3066_PLL_RATE( 40000000, 3, 80, 16), ++ RK3066_PLL_RATE( 36000000, 1, 24, 16), ++ RK3066_PLL_RATE( 35500000, 3, 71, 16), + RK3066_PLL_RATE( 48000000, 1, 64, 32), + { /* sentinel */ }, + }; diff --git a/scripts/uboot_helper b/scripts/uboot_helper index ace24186ad..14b8a5c29f 100755 --- a/scripts/uboot_helper +++ b/scripts/uboot_helper @@ -10,6 +10,7 @@ devices = { }, 'Rockchip' : { + 'TinkerBoard' : { 'rk3288' : { 'dtb' : 'rk3288-miniarm.dtb', 'config' : 'tinker-rk3288_config' }, }, }, }