From 03e61f9216354f601d797b1f0131f5393f0b225d Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 11 Sep 2021 09:07:38 +0200 Subject: [PATCH 1/4] u-boot: Update to 2021.07 --- packages/tools/u-boot/package.mk | 5 +- ...001-pxe-add-support-for-FDT-overlays.patch | 197 ------------------ ...i-Add-fdtoverlay_addr_r-env-variable.patch | 84 -------- 3 files changed, 2 insertions(+), 284 deletions(-) delete mode 100644 packages/tools/u-boot/patches/default/0001-pxe-add-support-for-FDT-overlays.patch delete mode 100644 packages/tools/u-boot/patches/default/0002-sunxi-Add-fdtoverlay_addr_r-env-variable.patch diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index b1d4fc2c38..0df61e5cc4 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -35,10 +35,9 @@ case "${PROJECT}" in PKG_PATCH_DIRS="rockchip" ;; *) - PKG_VERSION="2021.01" - PKG_SHA256="b407e1510a74e863b8b5cb42a24625344f0e0c2fc7582d8c866bd899367d0454" + PKG_VERSION="2021.07" + PKG_SHA256="312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e" PKG_URL="http://ftp.denx.de/pub/u-boot/${PKG_NAME}-${PKG_VERSION}.tar.bz2" - PKG_PATCH_DIRS="default" ;; esac diff --git a/packages/tools/u-boot/patches/default/0001-pxe-add-support-for-FDT-overlays.patch b/packages/tools/u-boot/patches/default/0001-pxe-add-support-for-FDT-overlays.patch deleted file mode 100644 index 1c2550284e..0000000000 --- a/packages/tools/u-boot/patches/default/0001-pxe-add-support-for-FDT-overlays.patch +++ /dev/null @@ -1,197 +0,0 @@ -From ac4728b374f39debc266fe42c513ea8f61e3d369 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Thu, 24 Dec 2020 09:03:15 +0100 -Subject: [PATCH] pxe: add support for FDT overlays -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This adds support for specicyinf FDT overlays in an extlinux/pxelinux -configuration file. - -Without this, there is no simple way to apply overlays when the kernel -and ftd is loaded by the pxe command. - -This change adds the 'fdtoverlays' keyword for a label, supporting multiple -overlay files to be applied on top of the fdt specific in the 'fdt' or -'devicetree' keyword. - -Cc: Jernej Škrabec -Cc: Jonas Karlman -Signed-off-by: Neil Armstrong ---- - cmd/pxe_utils.c | 103 ++++++++++++++++++++++++++++++++++++++++++++++++ - cmd/pxe_utils.h | 1 + - 2 files changed, 104 insertions(+) - -diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c -index 8716e782f6aa..25367190a700 100644 ---- a/cmd/pxe_utils.c -+++ b/cmd/pxe_utils.c -@@ -13,6 +13,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -284,6 +286,9 @@ static void label_destroy(struct pxe_label *label) - if (label->fdtdir) - free(label->fdtdir); - -+ if (label->fdtoverlays) -+ free(label->fdtoverlays); -+ - free(label); - } - -@@ -331,6 +336,92 @@ static int label_localboot(struct pxe_label *label) - return run_command_list(localcmd, strlen(localcmd), 0); - } - -+/* -+ * Loads fdt overlays specified in 'fdtoverlays'. -+ */ -+#ifdef CONFIG_OF_LIBFDT_OVERLAY -+static void label_boot_fdtoverlay(struct cmd_tbl *cmdtp, struct pxe_label *label) -+{ -+ char *fdtoverlay = label->fdtoverlays; -+ struct fdt_header *working_fdt; -+ char *fdtoverlay_addr_env; -+ ulong fdtoverlay_addr; -+ ulong fdt_addr; -+ int err; -+ -+ /* Get the main fdt and map it */ -+ fdt_addr = simple_strtoul(env_get("fdt_addr_r"), NULL, 16); -+ working_fdt = map_sysmem(fdt_addr, 0); -+ err = fdt_check_header(working_fdt); -+ if (err) -+ return; -+ -+ /* Get the specific overlay loading address */ -+ fdtoverlay_addr_env = env_get("fdtoverlay_addr_r"); -+ if (!fdtoverlay_addr_env) { -+ printf("Invalid fdtoverlay_addr_r for loading overlays\n"); -+ return; -+ } -+ -+ fdtoverlay_addr = simple_strtoul(fdtoverlay_addr_env, NULL, 16); -+ -+ /* Cycle over the overlay files and apply them in order */ -+ do { -+ struct fdt_header *blob; -+ char *overlayfile; -+ char *end; -+ int len; -+ -+ /* Drop leading spaces */ -+ while (*fdtoverlay == ' ') -+ ++fdtoverlay; -+ -+ /* Copy a single filename if multiple provided */ -+ end = strstr(fdtoverlay, " "); -+ if (end) { -+ len = (int)(end - fdtoverlay); -+ overlayfile = malloc(len + 1); -+ strncpy(overlayfile, fdtoverlay, len); -+ overlayfile[len] = '\0'; -+ } else -+ overlayfile = fdtoverlay; -+ -+ if (!strlen(overlayfile)) -+ goto skip_overlay; -+ -+ /* Load overlay file */ -+ err = get_relfile_envaddr(cmdtp, overlayfile, -+ "fdtoverlay_addr_r"); -+ if (err < 0) { -+ printf("Failed loading overlay %s\n", overlayfile); -+ goto skip_overlay; -+ } -+ -+ /* Resize main fdt */ -+ fdt_shrink_to_minimum(working_fdt, 8192); -+ -+ blob = map_sysmem(fdtoverlay_addr, 0); -+ err = fdt_check_header(blob); -+ if (err) { -+ printf("Invalid overlay %s, skipping\n", -+ overlayfile); -+ goto skip_overlay; -+ } -+ -+ err = fdt_overlay_apply_verbose(working_fdt, blob); -+ if (err) { -+ printf("Failed to apply overlay %s, skipping\n", -+ overlayfile); -+ goto skip_overlay; -+ } -+ -+skip_overlay: -+ if (end) -+ free(overlayfile); -+ } while ((fdtoverlay = strstr(fdtoverlay, " "))); -+} -+#endif -+ - /* - * Boot according to the contents of a pxe_label. - * -@@ -525,6 +616,11 @@ static int label_boot(struct cmd_tbl *cmdtp, struct pxe_label *label) - label->name); - goto cleanup; - } -+ -+#ifdef CONFIG_OF_LIBFDT_OVERLAY -+ if (label->fdtoverlays) -+ label_boot_fdtoverlay(cmdtp, label); -+#endif - } else { - bootm_argv[3] = NULL; - } -@@ -582,6 +678,7 @@ enum token_type { - T_INCLUDE, - T_FDT, - T_FDTDIR, -+ T_FDTOVERLAYS, - T_ONTIMEOUT, - T_IPAPPEND, - T_BACKGROUND, -@@ -616,6 +713,7 @@ static const struct token keywords[] = { - {"fdt", T_FDT}, - {"devicetreedir", T_FDTDIR}, - {"fdtdir", T_FDTDIR}, -+ {"fdtoverlays", T_FDTOVERLAYS}, - {"ontimeout", T_ONTIMEOUT,}, - {"ipappend", T_IPAPPEND,}, - {"background", T_BACKGROUND,}, -@@ -1048,6 +1146,11 @@ static int parse_label(char **c, struct pxe_menu *cfg) - err = parse_sliteral(c, &label->fdtdir); - break; - -+ case T_FDTOVERLAYS: -+ if (!label->fdtoverlays) -+ err = parse_sliteral(c, &label->fdtoverlays); -+ break; -+ - case T_LOCALBOOT: - label->localboot = 1; - err = parse_integer(c, &label->localboot_val); -diff --git a/cmd/pxe_utils.h b/cmd/pxe_utils.h -index 77d25888758f..6af952373430 100644 ---- a/cmd/pxe_utils.h -+++ b/cmd/pxe_utils.h -@@ -43,6 +43,7 @@ struct pxe_label { - char *initrd; - char *fdt; - char *fdtdir; -+ char *fdtoverlays; - int ipappend; - int attempted; - int localboot; --- -2.29.2 - diff --git a/packages/tools/u-boot/patches/default/0002-sunxi-Add-fdtoverlay_addr_r-env-variable.patch b/packages/tools/u-boot/patches/default/0002-sunxi-Add-fdtoverlay_addr_r-env-variable.patch deleted file mode 100644 index 857af13284..0000000000 --- a/packages/tools/u-boot/patches/default/0002-sunxi-Add-fdtoverlay_addr_r-env-variable.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 48f5c27ae2edfb36d7f6a628d3763b4c4b85c9c7 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Wed, 30 Dec 2020 21:01:20 +0100 -Subject: [PATCH] sunxi: Add fdtoverlay_addr_r env variable - -Signed-off-by: Jernej Skrabec ---- - include/configs/sunxi-common.h | 40 +++++++++++++++++++--------------- - 1 file changed, 22 insertions(+), 18 deletions(-) - -diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h -index a6a4879523a3..34917be3325f 100644 ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -287,12 +287,13 @@ extern int soft_i2c_gpio_scl; - * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. - * Align the initrd to a 2MB page. - */ --#define BOOTM_SIZE __stringify(0xa000000) --#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) --#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) --#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) --#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) --#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) -+#define BOOTM_SIZE __stringify(0xa000000) -+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) -+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) -+#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FB00000)) -+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) -+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) -+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) - - #else - /* -@@ -301,24 +302,26 @@ extern int soft_i2c_gpio_scl; - * 1M script, 1M pxe and the ramdisk at the end. - */ - #ifndef CONFIG_MACH_SUN8I_V3S --#define BOOTM_SIZE __stringify(0xa000000) --#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) --#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) --#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) --#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) --#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) -+#define BOOTM_SIZE __stringify(0xa000000) -+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) -+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) -+#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3100000)) -+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3200000)) -+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3300000)) -+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000)) - #else - /* - * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. - * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, - * 1M script, 1M pxe and the ramdisk at the end. - */ --#define BOOTM_SIZE __stringify(0x2e00000) --#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) --#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) --#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) --#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) --#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) -+#define BOOTM_SIZE __stringify(0x2e00000) -+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) -+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) -+#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1900000)) -+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) -+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) -+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000)) - #endif - #endif - -@@ -326,6 +329,7 @@ extern int soft_i2c_gpio_scl; - "bootm_size=" BOOTM_SIZE "\0" \ - "kernel_addr_r=" KERNEL_ADDR_R "\0" \ - "fdt_addr_r=" FDT_ADDR_R "\0" \ -+ "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \ - "scriptaddr=" SCRIPT_ADDR_R "\0" \ - "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ - "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" --- -2.30.0 - From 6427019a9e08a8e5114d9f0cf47bacd759043415 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 11 Sep 2021 09:08:19 +0200 Subject: [PATCH 2/4] Allwinner: u-boot: Update patches for 2021.07 --- ...-A-wild-PSCI-implementation-appears.patch} | 2 +- ...tor-out-eGON-BROM-header-description.patch | 181 --- ...ort-for-building-a-sunxi-resume-shi.patch} | 2 +- ...s-mkimage-Add-Allwinner-eGON-support.patch | 202 --- ...kimage-for-SPL-boot-image-generation.patch | 35 - ...Explicitly-pad-SPL-to-expected-size.patch} | 2 +- ...-sunxi-Put-secure-monitor-in-SRAM-A2.patch | 51 - ...upport-FIT-images-for-32-bit-boards.patch} | 6 +- ...0005-sunxi-binman-Add-a-resume-shim.patch} | 6 +- ...espect-the-default-FIT-configuration.patch | 21 - ...-Do-not-hardcode-U-Boot-load-address.patch | 21 - ...ram-h6-Improve-DDR3-config-detection.patch | 185 --- ...002-ARM-dts-sunxi-h6-Update-DT-files.patch | 1374 ----------------- ...0003-sunxi-Add-support-for-Tanix-TX6.patch | 201 --- ...act-creating-a-unique-sid-into-a-hel.patch | 159 -- ...config-option-to-fixup-a-Bluetooth-a.patch | 96 -- ...s-sun50i-Add-support-for-Orange-Pi-3.patch | 424 ----- .../patches/u-boot/0010-unreliable-dram.patch | 40 - .../0001-OrangePi-PC2-Update-defaults.patch | 10 +- ...-Move-sun8i-secure-monitor-to-SRAM-A.patch | 63 + ...roperly-check-for-SATAPWR-and-MACPWR.patch | 65 - ...xup_ethernet-again-to-set-macaddr-f.patch} | 13 +- ...-allwinner-h6-tanix-tx6-enable-emmc.patch} | 0 23 files changed, 78 insertions(+), 3081 deletions(-) rename projects/Allwinner/devices/H3/patches/u-boot/{0005-sunxi-A-wild-PSCI-implementation-appears.patch => 0001-sunxi-A-wild-PSCI-implementation-appears.patch} (99%) delete mode 100644 projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-Factor-out-eGON-BROM-header-description.patch rename projects/Allwinner/devices/H3/patches/u-boot/{0006-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch => 0002-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch} (94%) delete mode 100644 projects/Allwinner/devices/H3/patches/u-boot/0002-tools-mkimage-Add-Allwinner-eGON-support.patch delete mode 100644 projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-Use-mkimage-for-SPL-boot-image-generation.patch rename projects/Allwinner/devices/H3/patches/u-boot/{0009-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch => 0003-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch} (97%) delete mode 100644 projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-Put-secure-monitor-in-SRAM-A2.patch rename projects/Allwinner/devices/H3/patches/u-boot/{0010-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch => 0004-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch} (97%) rename projects/Allwinner/devices/H3/patches/u-boot/{0011-sunxi-binman-Add-a-resume-shim.patch => 0005-sunxi-binman-Add-a-resume-shim.patch} (94%) delete mode 100644 projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-binman-Respect-the-default-FIT-configuration.patch delete mode 100644 projects/Allwinner/devices/H3/patches/u-boot/0008-sunxi-binman-Do-not-hardcode-U-Boot-load-address.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0001-sunxi-dram-h6-Improve-DDR3-config-detection.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0002-ARM-dts-sunxi-h6-Update-DT-files.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0003-sunxi-Add-support-for-Tanix-TX6.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0004-sunxi-board-extract-creating-a-unique-sid-into-a-hel.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0005-arm-sunxi-add-a-config-option-to-fixup-a-Bluetooth-a.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0007-arm64-dts-sun50i-Add-support-for-Orange-Pi-3.patch delete mode 100644 projects/Allwinner/devices/H6/patches/u-boot/0010-unreliable-dram.patch rename projects/Allwinner/{devices/H5 => }/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch (71%) create mode 100644 projects/Allwinner/patches/u-boot/0002-sunxi-A23-A33-H3-Move-sun8i-secure-monitor-to-SRAM-A.patch delete mode 100644 projects/Allwinner/patches/u-boot/0002-sunxi-Properly-check-for-SATAPWR-and-MACPWR.patch rename projects/Allwinner/patches/u-boot/{0001-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch => 0003-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch} (78%) rename projects/Allwinner/{devices/H6/patches/u-boot/0008-arm64-dts-allwinner-h6-tanix-tx6-enable-emmc.patch => patches/u-boot/0004-arm64-dts-allwinner-h6-tanix-tx6-enable-emmc.patch} (100%) diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0005-sunxi-A-wild-PSCI-implementation-appears.patch b/projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-A-wild-PSCI-implementation-appears.patch similarity index 99% rename from projects/Allwinner/devices/H3/patches/u-boot/0005-sunxi-A-wild-PSCI-implementation-appears.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-A-wild-PSCI-implementation-appears.patch index 587c8a9063..ea9699b9b5 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0005-sunxi-A-wild-PSCI-implementation-appears.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-A-wild-PSCI-implementation-appears.patch @@ -536,7 +536,7 @@ Signed-off-by: Samuel Holland #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT) --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h -@@ -549,17 +549,20 @@ void mmu_page_table_flush(unsigned long +@@ -535,17 +535,20 @@ void mmu_page_table_flush(unsigned long #ifdef CONFIG_ARMV7_PSCI void psci_arch_cpu_entry(void); void psci_arch_init(void); diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-Factor-out-eGON-BROM-header-description.patch b/projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-Factor-out-eGON-BROM-header-description.patch deleted file mode 100644 index aa82231de4..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0001-sunxi-Factor-out-eGON-BROM-header-description.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Wed, 18 Nov 2020 17:32:02 +0000 -Subject: [PATCH] sunxi: Factor out eGON BROM header description - -To be able to easily share the Allwinner eGON BROM header structure -between the tools and the SPL code, move the struct definition into a -separate header file. - -Signed-off-by: Andre Przywara ---- - arch/arm/include/asm/arch-sunxi/spl.h | 65 +-------------------- - include/sunxi_image.h | 81 +++++++++++++++++++++++++++ - 2 files changed, 82 insertions(+), 64 deletions(-) - create mode 100644 include/sunxi_image.h - ---- a/arch/arm/include/asm/arch-sunxi/spl.h -+++ b/arch/arm/include/asm/arch-sunxi/spl.h -@@ -7,19 +7,7 @@ - #ifndef _ASM_ARCH_SPL_H_ - #define _ASM_ARCH_SPL_H_ - --#define BOOT0_MAGIC "eGON.BT0" --#define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */ --#define SPL_MAJOR_BITS 3 --#define SPL_MINOR_BITS 5 --#define SPL_VERSION(maj, min) \ -- ((((maj) & ((1U << SPL_MAJOR_BITS) - 1)) << SPL_MINOR_BITS) | \ -- ((min) & ((1U << SPL_MINOR_BITS) - 1))) -- --#define SPL_HEADER_VERSION SPL_VERSION(0, 2) -- --#define SPL_ENV_HEADER_VERSION SPL_VERSION(0, 1) --#define SPL_DT_HEADER_VERSION SPL_VERSION(0, 2) --#define SPL_DRAM_HEADER_VERSION SPL_VERSION(0, 3) -+#include - - #define SPL_ADDR CONFIG_SUNXI_SRAM_ADDRESS - -@@ -31,57 +19,6 @@ - #define SUNXI_BOOTED_FROM_MMC0_HIGH 0x10 - #define SUNXI_BOOTED_FROM_MMC2_HIGH 0x12 - --/* boot head definition from sun4i boot code */ --struct boot_file_head { -- uint32_t b_instruction; /* one intruction jumping to real code */ -- uint8_t magic[8]; /* ="eGON.BT0" or "eGON.BT1", not C-style str */ -- uint32_t check_sum; /* generated by PC */ -- uint32_t length; /* generated by PC */ -- /* -- * We use a simplified header, only filling in what is needed -- * by the boot ROM. To be compatible with Allwinner tools we -- * would need to implement the proper fields here instead of -- * padding. -- * -- * Actually we want the ability to recognize our "sunxi" variant -- * of the SPL. To do so, let's place a special signature into the -- * "pub_head_size" field. We can reasonably expect Allwinner's -- * boot0 to always have the upper 16 bits of this set to 0 (after -- * all the value shouldn't be larger than the limit imposed by -- * SRAM size). -- * If the signature is present (at 0x14), then we know it's safe -- * to use the remaining 8 bytes (at 0x18) for our own purposes. -- * (E.g. sunxi-tools "fel" utility can pass information there.) -- */ -- union { -- uint32_t pub_head_size; -- uint8_t spl_signature[4]; -- }; -- uint32_t fel_script_address; /* since v0.1, set by sunxi-fel */ -- /* -- * If the fel_uEnv_length member below is set to a non-zero value, -- * it specifies the size (byte count) of data at fel_script_address. -- * At the same time this indicates that the data is in uEnv.txt -- * compatible format, ready to be imported via "env import -t". -- */ -- uint32_t fel_uEnv_length; /* since v0.1, set by sunxi-fel */ -- /* -- * Offset of an ASCIIZ string (relative to the SPL header), which -- * contains the default device tree name (CONFIG_DEFAULT_DEVICE_TREE). -- * This is optional and may be set to NULL. Is intended to be used -- * by flash programming tools for providing nice informative messages -- * to the users. -- */ -- uint32_t dt_name_offset; /* since v0.2, set by mksunxiboot */ -- uint32_t dram_size; /* in MiB, since v0.3, set by SPL */ -- uint32_t boot_media; /* written here by the boot ROM */ -- /* A padding area (may be used for storing text strings) */ -- uint32_t string_pool[13]; /* since v0.2, filled by mksunxiboot */ -- /* The header must be a multiple of 32 bytes (for VBAR alignment) */ --}; -- --/* Compile time check to assure proper alignment of structure */ --typedef char boot_file_head_not_multiple_of_32[1 - 2*(sizeof(struct boot_file_head) % 32)]; - - #define is_boot0_magic(addr) (memcmp((void *)addr, BOOT0_MAGIC, 8) == 0) - ---- /dev/null -+++ b/include/sunxi_image.h -@@ -0,0 +1,81 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2007-2011 -+ * Allwinner Technology Co., Ltd. -+ * Tom Cubie -+ * -+ * Constants and data structures used in Allwinner "eGON" images, as -+ * parsed by the Boot-ROM. -+ * -+ * Shared between mkimage and the SPL. -+ */ -+#ifndef SUNXI_IMAGE_H -+#define SUNXI_IMAGE_H -+ -+#define BOOT0_MAGIC "eGON.BT0" -+#define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */ -+#define SPL_MAJOR_BITS 3 -+#define SPL_MINOR_BITS 5 -+#define SPL_VERSION(maj, min) \ -+ ((((maj) & ((1U << SPL_MAJOR_BITS) - 1)) << SPL_MINOR_BITS) | \ -+ ((min) & ((1U << SPL_MINOR_BITS) - 1))) -+ -+#define SPL_HEADER_VERSION SPL_VERSION(0, 2) -+ -+#define SPL_ENV_HEADER_VERSION SPL_VERSION(0, 1) -+#define SPL_DT_HEADER_VERSION SPL_VERSION(0, 2) -+#define SPL_DRAM_HEADER_VERSION SPL_VERSION(0, 3) -+ -+/* boot head definition from sun4i boot code */ -+struct boot_file_head { -+ uint32_t b_instruction; /* one intruction jumping to real code */ -+ uint8_t magic[8]; /* ="eGON.BT0" or "eGON.BT1", not C-style str */ -+ uint32_t check_sum; /* generated by PC */ -+ uint32_t length; /* generated by PC */ -+ /* -+ * We use a simplified header, only filling in what is needed -+ * by the boot ROM. To be compatible with Allwinner tools we -+ * would need to implement the proper fields here instead of -+ * padding. -+ * -+ * Actually we want the ability to recognize our "sunxi" variant -+ * of the SPL. To do so, let's place a special signature into the -+ * "pub_head_size" field. We can reasonably expect Allwinner's -+ * boot0 to always have the upper 16 bits of this set to 0 (after -+ * all the value shouldn't be larger than the limit imposed by -+ * SRAM size). -+ * If the signature is present (at 0x14), then we know it's safe -+ * to use the remaining 8 bytes (at 0x18) for our own purposes. -+ * (E.g. sunxi-tools "fel" utility can pass information there.) -+ */ -+ union { -+ uint32_t pub_head_size; -+ uint8_t spl_signature[4]; -+ }; -+ uint32_t fel_script_address; /* since v0.1, set by sunxi-fel */ -+ /* -+ * If the fel_uEnv_length member below is set to a non-zero value, -+ * it specifies the size (byte count) of data at fel_script_address. -+ * At the same time this indicates that the data is in uEnv.txt -+ * compatible format, ready to be imported via "env import -t". -+ */ -+ uint32_t fel_uEnv_length; /* since v0.1, set by sunxi-fel */ -+ /* -+ * Offset of an ASCIIZ string (relative to the SPL header), which -+ * contains the default device tree name (CONFIG_DEFAULT_DEVICE_TREE). -+ * This is optional and may be set to NULL. Is intended to be used -+ * by flash programming tools for providing nice informative messages -+ * to the users. -+ */ -+ uint32_t dt_name_offset; /* since v0.2, set by mksunxiboot */ -+ uint32_t dram_size; /* in MiB, since v0.3, set by SPL */ -+ uint32_t boot_media; /* written here by the boot ROM */ -+ /* A padding area (may be used for storing text strings) */ -+ uint32_t string_pool[13]; /* since v0.2, filled by mksunxiboot */ -+ /* The header must be a multiple of 32 bytes (for VBAR alignment) */ -+}; -+ -+/* Compile time check to assure proper alignment of structure */ -+typedef char boot_file_head_not_multiple_of_32[1 - 2*(sizeof(struct boot_file_head) % 32)]; -+ -+#endif diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0006-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch b/projects/Allwinner/devices/H3/patches/u-boot/0002-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch similarity index 94% rename from projects/Allwinner/devices/H3/patches/u-boot/0006-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0002-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch index b51ab23624..932fde0ba5 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0006-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0002-Makefile-Add-support-for-building-a-sunxi-resume-shi.patch @@ -20,7 +20,7 @@ Subject: [PATCH] Makefile: Add support for building a sunxi resume shim # git files that we don't want to ignore even it they are dot-files --- a/Makefile +++ b/Makefile -@@ -961,6 +961,21 @@ INPUTS-$(CONFIG_X86) += u-boot-x86-start +@@ -992,6 +992,21 @@ INPUTS-$(CONFIG_X86) += u-boot-x86-start $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0002-tools-mkimage-Add-Allwinner-eGON-support.patch b/projects/Allwinner/devices/H3/patches/u-boot/0002-tools-mkimage-Add-Allwinner-eGON-support.patch deleted file mode 100644 index e440e0a716..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0002-tools-mkimage-Add-Allwinner-eGON-support.patch +++ /dev/null @@ -1,202 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Wed, 18 Nov 2020 17:32:03 +0000 -Subject: [PATCH] tools: mkimage: Add Allwinner eGON support - -So far we used the separate mksunxiboot tool for generating a bootable -image for Allwinner SPLs, probably just for historical reasons. - -Use the mkimage framework to generate a so called eGON image the -Allwinner BROM expects. -The new image type is called "sunxi_egon", to differentiate it -from the (still to be implemented) secure boot TOC0 image. - -Signed-off-by: Andre Przywara ---- - common/image.c | 1 + - include/image.h | 1 + - include/sunxi_image.h | 1 + - tools/Makefile | 1 + - tools/sunxi_egon.c | 136 ++++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 140 insertions(+) - create mode 100644 tools/sunxi_egon.c - ---- a/common/image.c -+++ b/common/image.c -@@ -189,6 +189,7 @@ static const table_entry_t uimage_type[] - { IH_TYPE_STM32IMAGE, "stm32image", "STMicroelectronics STM32 Image" }, - { IH_TYPE_MTKIMAGE, "mtk_image", "MediaTek BootROM loadable Image" }, - { IH_TYPE_COPRO, "copro", "Coprocessor Image"}, -+ { IH_TYPE_SUNXI_EGON, "sunxi_egon", "Allwinner eGON Boot Image" }, - { -1, "", "", }, - }; - ---- a/include/image.h -+++ b/include/image.h -@@ -308,6 +308,7 @@ enum { - IH_TYPE_IMX8MIMAGE, /* Freescale IMX8MBoot Image */ - IH_TYPE_IMX8IMAGE, /* Freescale IMX8Boot Image */ - IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/ -+ IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */ - - IH_TYPE_COUNT, /* Number of image types */ - }; ---- a/include/sunxi_image.h -+++ b/include/sunxi_image.h -@@ -13,6 +13,7 @@ - #define SUNXI_IMAGE_H - - #define BOOT0_MAGIC "eGON.BT0" -+#define BROM_STAMP_VALUE 0x5f0a6c39 - #define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */ - #define SPL_MAJOR_BITS 3 - #define SPL_MINOR_BITS 5 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -104,6 +104,7 @@ dumpimage-mkimage-objs := aisimage.o \ - stm32image.o \ - $(ROCKCHIP_OBS) \ - socfpgaimage.o \ -+ sunxi_egon.o \ - lib/crc16.o \ - lib/sha1.o \ - lib/sha256.o \ ---- /dev/null -+++ b/tools/sunxi_egon.c -@@ -0,0 +1,136 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2018 Arm Ltd. -+ */ -+ -+#include "imagetool.h" -+#include -+ -+#include -+ -+/* -+ * NAND requires 8K padding. SD/eMMC gets away with 512 bytes, -+ * but let's use the larger padding to cover both. -+ */ -+#define PAD_SIZE 8192 -+ -+static int egon_check_params(struct image_tool_params *params) -+{ -+ /* We just need a binary image file. */ -+ return !params->dflag; -+} -+ -+static int egon_verify_header(unsigned char *ptr, int image_size, -+ struct image_tool_params *params) -+{ -+ const struct boot_file_head *header = (void *)ptr; -+ uint32_t length; -+ -+ /* First 4 bytes must be an ARM branch instruction. */ -+ if ((le32_to_cpu(header->b_instruction) & 0xff000000) != 0xea000000) -+ return EXIT_FAILURE; -+ -+ if (memcmp(header->magic, BOOT0_MAGIC, sizeof(header->magic))) -+ return EXIT_FAILURE; -+ -+ length = le32_to_cpu(header->length); -+ /* Must be at least 512 byte aligned. */ -+ if (length & 511) -+ return EXIT_FAILURE; -+ -+ /* -+ * Image could also contain U-Boot proper, so could be bigger. -+ * But it must not be shorter. -+ */ -+ if (image_size < length) -+ return EXIT_FAILURE; -+ -+ return EXIT_SUCCESS; -+} -+ -+static void egon_print_header(const void *buf) -+{ -+ const struct boot_file_head *header = buf; -+ -+ printf("Allwinner eGON image, size: %d bytes\n", -+ le32_to_cpu(header->length)); -+ -+ if (memcmp(header->spl_signature, SPL_SIGNATURE, 3)) -+ return; -+ -+ printf("\tSPL header version %d.%d\n", -+ header->spl_signature[3] >> SPL_MINOR_BITS, -+ header->spl_signature[3] & ((1U << SPL_MINOR_BITS) - 1)); -+ if (header->spl_signature[3] >= SPL_DT_HEADER_VERSION) { -+ uint32_t dt_name_offs = le32_to_cpu(header->dt_name_offset); -+ -+ if (dt_name_offs > 0) -+ printf("\tDT name: %s\n", (char *)buf + dt_name_offs); -+ } -+} -+ -+static void egon_set_header(void *buf, struct stat *sbuf, int infd, -+ struct image_tool_params *params) -+{ -+ struct boot_file_head *header = buf; -+ uint32_t *buf32 = buf; -+ uint32_t checksum = 0, value; -+ int i; -+ -+ /* Generate an ARM branch instruction to jump over the header. */ -+ value = 0xea000000 | (sizeof(struct boot_file_head) / 4 - 2); -+ header->b_instruction = cpu_to_le32(value); -+ -+ memcpy(header->magic, BOOT0_MAGIC, sizeof(header->magic)); -+ header->check_sum = cpu_to_le32(BROM_STAMP_VALUE); -+ header->length = cpu_to_le32(params->file_size); -+ -+ memcpy(header->spl_signature, SPL_SIGNATURE, 3); -+ -+ /* If an image name has been provided, use it as the DT name. */ -+ if (params->imagename && params->imagename[0]) { -+ header->spl_signature[3] = SPL_DT_HEADER_VERSION; -+ -+ value = offsetof(struct boot_file_head, string_pool); -+ header->dt_name_offset = cpu_to_le32(value); -+ -+ strncpy((char *)header->string_pool, params->imagename, 52); -+ /* Make sure we have a terminating zero byte. */ -+ ((char *)header->string_pool)[51] = 0; -+ } else -+ header->spl_signature[3] = SPL_ENV_HEADER_VERSION; -+ -+ /* Calculate the checksum. Yes, it's that simple. */ -+ for (i = 0; i < sbuf->st_size / 4; i++) -+ checksum += le32_to_cpu(buf32[i]); -+ header->check_sum = cpu_to_le32(checksum); -+} -+ -+static int egon_check_image_type(uint8_t type) -+{ -+ return type == IH_TYPE_SUNXI_EGON ? 0 : 1; -+} -+ -+static int egon_vrec_header(struct image_tool_params *params, -+ struct image_type_params *tparams) -+{ -+ tparams->hdr = calloc(sizeof(struct boot_file_head), 1); -+ -+ /* Return padding to 8K blocks. */ -+ return ALIGN(params->file_size, PAD_SIZE) - params->file_size; -+} -+ -+U_BOOT_IMAGE_TYPE( -+ sunxi_egon, -+ "Allwinner eGON Boot Image support", -+ sizeof(struct boot_file_head), -+ NULL, -+ egon_check_params, -+ egon_verify_header, -+ egon_print_header, -+ egon_set_header, -+ NULL, -+ egon_check_image_type, -+ NULL, -+ egon_vrec_header -+); diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-Use-mkimage-for-SPL-boot-image-generation.patch b/projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-Use-mkimage-for-SPL-boot-image-generation.patch deleted file mode 100644 index d9de621679..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-Use-mkimage-for-SPL-boot-image-generation.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Andre Przywara -Date: Wed, 18 Nov 2020 17:32:04 +0000 -Subject: [PATCH] sunxi: Use mkimage for SPL boot image generation - -Switch the SPL boot image generation from using mksunxiboot to the new -sunxi_egon format of mkimage. - -Verified to create identical results for all 152 Allwinner boards. - -Signed-off-by: Andre Przywara -Reviewed-by: Simon Glass -Reviewed-by: Jagan Teki ---- - scripts/Makefile.spl | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/scripts/Makefile.spl -+++ b/scripts/Makefile.spl -@@ -382,11 +382,11 @@ endif - $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE - $(call if_changed,mkimage) - --quiet_cmd_mksunxiboot = MKSUNXI $@ --cmd_mksunxiboot = $(objtree)/tools/mksunxiboot \ -- --default-dt $(CONFIG_DEFAULT_DEVICE_TREE) $< $@ -+MKIMAGEFLAGS_sunxi-spl.bin = -T sunxi_egon \ -+ -n $(CONFIG_DEFAULT_DEVICE_TREE) -+ - $(obj)/sunxi-spl.bin: $(obj)/$(SPL_BIN).bin FORCE -- $(call if_changed,mksunxiboot) -+ $(call if_changed,mkimage) - - quiet_cmd_sunxi_spl_image_builder = SUNXI_SPL_IMAGE_BUILDER $@ - cmd_sunxi_spl_image_builder = $(objtree)/tools/sunxi-spl-image-builder \ diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0009-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch b/projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch similarity index 97% rename from projects/Allwinner/devices/H3/patches/u-boot/0009-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch index bd1ab82535..0edef63bac 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0009-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0003-sunxi-binman-Explicitly-pad-SPL-to-expected-size.patch @@ -10,7 +10,7 @@ Signed-off-by: Samuel Holland --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -30,6 +30,7 @@ +@@ -33,6 +33,7 @@ #ifdef CONFIG_ARM64 fit { description = "Configuration to load ATF before U-Boot"; diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-Put-secure-monitor-in-SRAM-A2.patch b/projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-Put-secure-monitor-in-SRAM-A2.patch deleted file mode 100644 index 09ecd3ecd1..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-Put-secure-monitor-in-SRAM-A2.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Fri, 20 Nov 2020 01:26:34 -0600 -Subject: [PATCH] sunxi: Put secure monitor in SRAM A2 - -Signed-off-by: Samuel Holland ---- - arch/arm/include/asm/arch-sunxi/cpu.h | 9 +++++++++ - arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 1 - - include/configs/sunxi-common.h | 2 ++ - 3 files changed, 11 insertions(+), 1 deletion(-) - ---- a/arch/arm/include/asm/arch-sunxi/cpu.h -+++ b/arch/arm/include/asm/arch-sunxi/cpu.h -@@ -14,6 +14,15 @@ - #include - #endif - -+#if defined(CONFIG_MACH_SUN4I) -+#define SUNXI_SRAM_A2_BASE 0x00004000 -+#elif defined(CONFIG_MACH_SUN6I) || \ -+ defined(CONFIG_MACH_SUN8I) || \ -+ defined(CONFIG_MACH_SUN50I) || \ -+ defined(CONFIG_MACH_SUN50I_H5) -+#define SUNXI_SRAM_A2_BASE 0x00040000 -+#endif -+ - #define SOCID_A64 0x1689 - #define SOCID_H3 0x1680 - #define SOCID_V3S 0x1681 ---- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h -+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h -@@ -11,7 +11,6 @@ - #define SUNXI_SRAM_A1_BASE 0x00000000 - #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */ - --#define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */ - #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */ - #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */ - #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -192,6 +192,8 @@ - - #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ - -+#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_A2_BASE + 0x4000 -+#define CONFIG_ARMV7_SECURE_MAX_SIZE (16 * 1024) /* 16 KB */ - - /* I2C */ - #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0010-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch b/projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch similarity index 97% rename from projects/Allwinner/devices/H3/patches/u-boot/0010-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch index e68c7faabe..63db486838 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0010-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0004-sunxi-binman-Support-FIT-images-for-32-bit-boards.patch @@ -17,7 +17,7 @@ Signed-off-by: Samuel Holland #ifdef CONFIG_MACH_SUN50I_H6 #define BL31_ADDR 0x104000 #define SCP_ADDR 0x114000 -@@ -7,6 +8,9 @@ +@@ -9,6 +10,9 @@ #define BL31_ADDR 0x44000 #define SCP_ADDR 0x50000 #endif @@ -27,7 +27,7 @@ Signed-off-by: Samuel Holland / { aliases { -@@ -27,6 +31,7 @@ +@@ -30,6 +34,7 @@ filename = "spl/sunxi-spl.bin"; }; @@ -35,7 +35,7 @@ Signed-off-by: Samuel Holland #ifdef CONFIG_ARM64 fit { description = "Configuration to load ATF before U-Boot"; -@@ -94,6 +99,59 @@ +@@ -103,6 +108,59 @@ }; }; #else diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0011-sunxi-binman-Add-a-resume-shim.patch b/projects/Allwinner/devices/H3/patches/u-boot/0005-sunxi-binman-Add-a-resume-shim.patch similarity index 94% rename from projects/Allwinner/devices/H3/patches/u-boot/0011-sunxi-binman-Add-a-resume-shim.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0005-sunxi-binman-Add-a-resume-shim.patch index 11c5f99ac5..f4161e00d4 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0011-sunxi-binman-Add-a-resume-shim.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0005-sunxi-binman-Add-a-resume-shim.patch @@ -10,7 +10,7 @@ Signed-off-by: Samuel Holland --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -10,6 +10,7 @@ +@@ -12,6 +12,7 @@ #endif #else #define SCP_ADDR 0x48000 @@ -18,7 +18,7 @@ Signed-off-by: Samuel Holland #endif / { -@@ -118,6 +119,18 @@ +@@ -127,6 +128,18 @@ }; }; @@ -37,7 +37,7 @@ Signed-off-by: Samuel Holland scp { description = "SCP firmware"; type = "firmware"; -@@ -145,7 +158,7 @@ +@@ -154,7 +167,7 @@ @config-SEQ { description = "NAME"; firmware = "uboot"; diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-binman-Respect-the-default-FIT-configuration.patch b/projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-binman-Respect-the-default-FIT-configuration.patch deleted file mode 100644 index 2e934bd7ff..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-binman-Respect-the-default-FIT-configuration.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Wed, 18 Nov 2020 23:00:07 -0600 -Subject: [PATCH] sunxi: binman: Respect the default FIT configuration - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sunxi-u-boot.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -82,7 +82,7 @@ - }; - - configurations { -- default = "config-1"; -+ default = "@config-DEFAULT-SEQ"; - - @config-SEQ { - description = "NAME"; diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0008-sunxi-binman-Do-not-hardcode-U-Boot-load-address.patch b/projects/Allwinner/devices/H3/patches/u-boot/0008-sunxi-binman-Do-not-hardcode-U-Boot-load-address.patch deleted file mode 100644 index 599be22595..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0008-sunxi-binman-Do-not-hardcode-U-Boot-load-address.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Wed, 18 Nov 2020 23:04:49 -0600 -Subject: [PATCH] sunxi: binman: Do not hardcode U-Boot load address - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sunxi-u-boot.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -40,7 +40,7 @@ - os = "u-boot"; - arch = "arm64"; - compression = "none"; -- load = <0x4a000000>; -+ load = ; - - u-boot-nodtb { - }; diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0001-sunxi-dram-h6-Improve-DDR3-config-detection.patch b/projects/Allwinner/devices/H6/patches/u-boot/0001-sunxi-dram-h6-Improve-DDR3-config-detection.patch deleted file mode 100644 index b46cb8bbaa..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0001-sunxi-dram-h6-Improve-DDR3-config-detection.patch +++ /dev/null @@ -1,185 +0,0 @@ -From 4d2be560fe0123536aed35f86184290b0afffccc Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 1 Oct 2020 19:56:38 +0200 -Subject: [PATCH] sunxi: dram: h6: Improve DDR3 config detection - -It turns out that in rare cases, current analytical approach to detect -correct DRAM bus width and rank on H6 doesn't work. On some TV boxes -with DDR3, incorrect DRAM configuration triggers write leveling error -which immediately stops initialization process. Exact reason why this -error appears isn't known. However, if correct configuration is used, -initalization works without problem. - -In order to fix this issue, simply try another configuration when any -kind of error appears during initialization, not just those related to -rank and bus width. - -Tested-by: Thomas Graichen -Signed-off-by: Jernej Skrabec ---- - arch/arm/mach-sunxi/dram_sun50i_h6.c | 95 +++++++++++++++------------- - 1 file changed, 51 insertions(+), 44 deletions(-) - -diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c -index 9e34da474798..1cde6132be2c 100644 ---- a/arch/arm/mach-sunxi/dram_sun50i_h6.c -+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c -@@ -37,9 +37,9 @@ - - static void mctl_sys_init(struct dram_para *para); - static void mctl_com_init(struct dram_para *para); --static void mctl_channel_init(struct dram_para *para); -+static bool mctl_channel_init(struct dram_para *para); - --static void mctl_core_init(struct dram_para *para) -+static bool mctl_core_init(struct dram_para *para) - { - mctl_sys_init(para); - mctl_com_init(para); -@@ -51,7 +51,7 @@ static void mctl_core_init(struct dram_para *para) - default: - panic("Unsupported DRAM type!"); - }; -- mctl_channel_init(para); -+ return mctl_channel_init(para); - } - - /* PHY initialisation */ -@@ -411,7 +411,7 @@ static void mctl_bit_delay_set(struct dram_para *para) - } - } - --static void mctl_channel_init(struct dram_para *para) -+static bool mctl_channel_init(struct dram_para *para) - { - struct sunxi_mctl_com_reg * const mctl_com = - (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; -@@ -528,46 +528,15 @@ static void mctl_channel_init(struct dram_para *para) - clrbits_le32(&mctl_phy->dx[i].gcr[3], ~0x3ffff); - udelay(10); - -- if (readl(&mctl_phy->pgsr[0]) & 0x400000) -- { -- /* Check for single rank and optionally half DQ. */ -- if ((readl(&mctl_phy->dx[0].rsr[0]) & 0x3) == 2 && -- (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 2) { -- para->ranks = 1; -- -- if ((readl(&mctl_phy->dx[2].rsr[0]) & 0x3) != 2 || -- (readl(&mctl_phy->dx[3].rsr[0]) & 0x3) != 2) -- para->bus_full_width = 0; -- -- /* Restart DRAM initialization from scratch. */ -- mctl_core_init(para); -- return; -- } -- -- /* -- * Check for dual rank and half DQ. NOTE: This combination -- * is highly unlikely and was not tested. Condition is the -- * same as in libdram, though. -- */ -- if ((readl(&mctl_phy->dx[0].rsr[0]) & 0x3) == 0 && -- (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 0) { -- para->bus_full_width = 0; -- -- /* Restart DRAM initialization from scratch. */ -- mctl_core_init(para); -- return; -- } -- -- panic("This DRAM setup is currently not supported.\n"); -- } -- - if (readl(&mctl_phy->pgsr[0]) & 0xff00000) { - /* Oops! There's something wrong! */ - debug("PLL = %x\n", readl(0x3001010)); - debug("DRAM PHY PGSR0 = %x\n", readl(&mctl_phy->pgsr[0])); - for (i = 0; i < 4; i++) - debug("DRAM PHY DX%dRSR0 = %x\n", i, readl(&mctl_phy->dx[i].rsr[0])); -- panic("Error while initializing DRAM PHY!\n"); -+ debug("Error while initializing DRAM PHY!\n"); -+ -+ return false; - } - - if (sunxi_dram_is_lpddr(para->type)) -@@ -582,13 +551,54 @@ static void mctl_channel_init(struct dram_para *para) - writel(0xffffffff, &mctl_com->maer0); - writel(0x7ff, &mctl_com->maer1); - writel(0xffff, &mctl_com->maer2); -+ -+ return true; -+} -+ -+static void mctl_auto_detect_rank_width(struct dram_para *para) -+{ -+ /* this is minimum size that it's supported */ -+ para->cols = 8; -+ para->rows = 13; -+ -+ /* -+ * Strategy here is to test most demanding combination first and least -+ * demanding last, otherwise HW might not be fully utilized. For -+ * example, half bus width and rank = 1 combination would also work -+ * on HW with full bus width and rank = 2, but only 1/4 RAM would be -+ * visible. -+ */ -+ -+ debug("testing 32-bit width, rank = 2\n"); -+ para->bus_full_width = 1; -+ para->ranks = 2; -+ if (mctl_core_init(para)) -+ return; -+ -+ debug("testing 32-bit width, rank = 1\n"); -+ para->bus_full_width = 1; -+ para->ranks = 1; -+ if (mctl_core_init(para)) -+ return; -+ -+ debug("testing 16-bit width, rank = 2\n"); -+ para->bus_full_width = 0; -+ para->ranks = 2; -+ if (mctl_core_init(para)) -+ return; -+ -+ debug("testing 16-bit width, rank = 1\n"); -+ para->bus_full_width = 0; -+ para->ranks = 1; -+ if (mctl_core_init(para)) -+ return; -+ -+ panic("This DRAM setup is currently not supported.\n"); - } - - static void mctl_auto_detect_dram_size(struct dram_para *para) - { - /* TODO: non-(LP)DDR3 */ -- /* Detect rank number and half DQ by the code in mctl_channel_init. */ -- mctl_core_init(para); - - /* detect row address bits */ - para->cols = 8; -@@ -652,10 +662,6 @@ unsigned long sunxi_dram_init(void) - (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; - struct dram_para para = { - .clk = CONFIG_DRAM_CLK, -- .ranks = 2, -- .cols = 11, -- .rows = 14, -- .bus_full_width = 1, - #ifdef CONFIG_SUNXI_DRAM_H6_LPDDR3 - .type = SUNXI_DRAM_TYPE_LPDDR3, - .dx_read_delays = SUN50I_H6_LPDDR3_DX_READ_DELAYS, -@@ -673,6 +679,7 @@ unsigned long sunxi_dram_init(void) - setbits_le32(0x7010310, BIT(8)); - clrbits_le32(0x7010318, 0x3f); - -+ mctl_auto_detect_rank_width(¶); - mctl_auto_detect_dram_size(¶); - - mctl_core_init(¶); --- -2.29.2 - diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0002-ARM-dts-sunxi-h6-Update-DT-files.patch b/projects/Allwinner/devices/H6/patches/u-boot/0002-ARM-dts-sunxi-h6-Update-DT-files.patch deleted file mode 100644 index 42b0517f5f..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0002-ARM-dts-sunxi-h6-Update-DT-files.patch +++ /dev/null @@ -1,1374 +0,0 @@ -From cec4496355d1c9ff651a049b2ae5f51c7e49bd90 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 3 Jan 2021 10:45:14 +0100 -Subject: [PATCH v3 1/2] ARM: dts: sunxi: h6: Update DT files - -Updated H6 DT files are based on Linux 5.11-rc1 release. - -Signed-off-by: Jernej Skrabec ---- - arch/arm/dts/sun50i-h6-beelink-gs1.dts | 70 +++- - arch/arm/dts/sun50i-h6-cpu-opp.dtsi | 117 ++++++ - arch/arm/dts/sun50i-h6-orangepi-lite2.dts | 71 +++- - arch/arm/dts/sun50i-h6-orangepi-one-plus.dts | 41 +- - arch/arm/dts/sun50i-h6-orangepi.dtsi | 72 +++- - arch/arm/dts/sun50i-h6-pine-h64.dts | 102 +++-- - arch/arm/dts/sun50i-h6.dtsi | 394 +++++++++++++++++-- - 7 files changed, 794 insertions(+), 73 deletions(-) - create mode 100644 arch/arm/dts/sun50i-h6-cpu-opp.dtsi - -diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts -index 0dc33c90dd60..7c9dbde645b5 100644 ---- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts -+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts -@@ -1,11 +1,10 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2019 Clément Péron -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2019 Clément Péron - - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -25,6 +24,7 @@ - connector { - compatible = "hdmi-connector"; - type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ - - port { - hdmi_con_in: endpoint { -@@ -33,6 +33,13 @@ - }; - }; - -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -51,12 +58,38 @@ - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; -+ -+ sound-spdif { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "sun50i-h6-spdif"; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&spdif>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&spdif_out>; -+ }; -+ }; -+ -+ spdif_out: spdif-out { -+ #sound-dai-cells = <0>; -+ compatible = "linux,spdif-dit"; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_dcdca>; - }; - - &de { - status = "okay"; - }; - -+&dwc3 { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -64,12 +97,17 @@ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; - phy-supply = <®_aldo2>; - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdcc>; -+ status = "okay"; -+}; -+ - &hdmi { - status = "okay"; - }; -@@ -201,13 +239,16 @@ - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - - reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - -@@ -232,6 +273,11 @@ - }; - }; - -+&r_ir { -+ linux,rc-map-name = "rc-beelink-gs1"; -+ status = "okay"; -+}; -+ - &r_pio { - /* - * PL0 and PL1 are used for PMIC I2C -@@ -243,6 +289,14 @@ - vcc-pm-supply = <®_aldo1>; - }; - -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ -+&spdif { -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; -@@ -258,3 +312,7 @@ - usb0_vbus-supply = <®_vcc5v>; - status = "okay"; - }; -+ -+&usb3phy { -+ status = "okay"; -+}; -diff --git a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi -new file mode 100644 -index 000000000000..1a5eddc5a40f ---- /dev/null -+++ b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi -@@ -0,0 +1,117 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+// Copyright (C) 2020 Clément Péron -+ -+/ { -+ cpu_opp_table: cpu-opp-table { -+ compatible = "allwinner,sun50i-h6-operating-points"; -+ nvmem-cells = <&cpu_speed_grade>; -+ opp-shared; -+ -+ opp@480000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <480000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@720000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <720000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@816000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <816000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@888000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <888000000>; -+ -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; -+ }; -+ -+ opp@1080000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1080000000>; -+ -+ opp-microvolt-speed0 = <940000 940000 1200000>; -+ opp-microvolt-speed1 = <880000 880000 1200000>; -+ opp-microvolt-speed2 = <880000 880000 1200000>; -+ }; -+ -+ opp@1320000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1320000000>; -+ -+ opp-microvolt-speed0 = <1000000 1000000 1200000>; -+ opp-microvolt-speed1 = <940000 940000 1200000>; -+ opp-microvolt-speed2 = <940000 940000 1200000>; -+ }; -+ -+ opp@1488000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1488000000>; -+ -+ opp-microvolt-speed0 = <1060000 1060000 1200000>; -+ opp-microvolt-speed1 = <1000000 1000000 1200000>; -+ opp-microvolt-speed2 = <1000000 1000000 1200000>; -+ }; -+ -+ opp@1608000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1608000000>; -+ -+ opp-microvolt-speed0 = <1090000 1090000 1200000>; -+ opp-microvolt-speed1 = <1030000 1030000 1200000>; -+ opp-microvolt-speed2 = <1030000 1030000 1200000>; -+ }; -+ -+ opp@1704000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1704000000>; -+ -+ opp-microvolt-speed0 = <1120000 1120000 1200000>; -+ opp-microvolt-speed1 = <1060000 1060000 1200000>; -+ opp-microvolt-speed2 = <1060000 1060000 1200000>; -+ }; -+ -+ opp@1800000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1800000000>; -+ -+ opp-microvolt-speed0 = <1160000 1160000 1200000>; -+ opp-microvolt-speed1 = <1100000 1100000 1200000>; -+ opp-microvolt-speed2 = <1100000 1100000 1200000>; -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -diff --git a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts -index e098a2475f2d..e8770858b5d0 100644 ---- a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts -+++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts -@@ -1,11 +1,74 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2018 Jagan Teki -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2018 Jagan Teki - - #include "sun50i-h6-orangepi.dtsi" - - / { - model = "OrangePi Lite2"; - compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; -+ -+ aliases { -+ serial1 = &uart1; /* BT-UART */ -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_cldo2>; -+ vqmmc-supply = <®_bldo3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ brcm: sdio-wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+®_cldo2 { -+ /* -+ * This regulator is connected with CLDO3. -+ * Before the kernel can support synchronized -+ * enable of coupled regulators, keep them -+ * both always on as a ugly hack. -+ */ -+ regulator-always-on; -+}; -+ -+®_cldo3 { -+ /* -+ * This regulator is connected with CLDO2. -+ * See the comments for CLDO2. -+ */ -+ regulator-always-on; -+}; -+ -+/* There's the BT part of the AP6255 connected to that UART */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rtc 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ -+ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ -+ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ -+ max-speed = <1500000>; -+ }; - }; -diff --git a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts -index 12e17567ab56..29a081e72a9b 100644 ---- a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts -+++ b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts -@@ -1,12 +1,43 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2018 Amarula Solutions -- * Author: Jagan Teki -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2018 Amarula Solutions -+// Author: Jagan Teki - - #include "sun50i-h6-orangepi.dtsi" - - / { - model = "OrangePi One Plus"; - compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6"; -+ -+ aliases { -+ ethernet0 = &emac; -+ }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ vin-supply = <®_aldo2>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ext_rgmii_pins>; -+ phy-mode = "rgmii-id"; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-supply = <®_gmac_3v3>; -+ allwinner,rx-delay-ps = <200>; -+ allwinner,tx-delay-ps = <200>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; -diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi -index 62e27948a3fa..ebc120a9232f 100644 ---- a/arch/arm/dts/sun50i-h6-orangepi.dtsi -+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi -@@ -1,8 +1,6 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2018 Amarula Solutions -- * Author: Jagan Teki -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2018 Amarula Solutions -+// Author: Jagan Teki - - /dts-v1/; - -@@ -22,6 +20,25 @@ - stdout-path = "serial0:115200n8"; - }; - -+ connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ - leds { - compatible = "gpio-leds"; - -@@ -47,6 +64,10 @@ - }; - }; - -+&de { -+ status = "okay"; -+}; -+ - &ehci0 { - status = "okay"; - }; -@@ -55,6 +76,21 @@ - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdcc>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ - &mmc0 { - vmmc-supply = <®_cldo1>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; -@@ -70,6 +106,12 @@ - status = "okay"; - }; - -+&pio { -+ vcc-pc-supply = <®_bldo2>; -+ vcc-pd-supply = <®_cldo1>; -+ vcc-pg-supply = <®_aldo1>; -+}; -+ - &r_i2c { - status = "okay"; - -@@ -163,6 +205,7 @@ - }; - - reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; - regulator-name = "vdd-gpu"; -@@ -189,6 +232,18 @@ - }; - }; - -+&r_ir { -+ status = "okay"; -+}; -+ -+&r_pio { -+ vcc-pm-supply = <®_bldo3>; -+}; -+ -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; -@@ -196,7 +251,12 @@ - }; - - &usb2otg { -- dr_mode = "otg"; -+ /* -+ * OrangePi Lite 2 and One Plus, where this DT is used, don't -+ * have a controllable VBUS even though they do have an ID pin. -+ * Using it as anything but a USB host is unsafe. -+ */ -+ dr_mode = "host"; - status = "okay"; - }; - -diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts -index 189834518391..961732c52aa0 100644 ---- a/arch/arm/dts/sun50i-h6-pine-h64.dts -+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts -@@ -1,30 +1,38 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (c) 2017 Icenowy Zheng -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (c) 2017 Icenowy Zheng - - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - - / { -- model = "Pine H64"; -+ model = "Pine H64 model A"; - compatible = "pine64,pine-h64", "allwinner,sun50i-h6"; - - aliases { - ethernet0 = &emac; - serial0 = &uart0; -+ spi0 = &spi0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - -- connector { -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ -+ hdmi_connector: connector { - compatible = "hdmi-connector"; - type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ - - port { - hdmi_con_in: endpoint { -@@ -52,6 +60,16 @@ - }; - }; - -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+ - reg_usb_vbus: vbus { - compatible = "regulator-fixed"; - regulator-name = "usb-vbus"; -@@ -63,25 +81,35 @@ - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -- phy-mode = "rgmii"; -+ phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; -- phy-supply = <®_aldo2>; -+ phy-supply = <®_gmac_3v3>; - allwinner,rx-delay-ps = <200>; - allwinner,tx-delay-ps = <200>; - status = "okay"; - }; - --&mdio { -- ext_rgmii_phy: ethernet-phy@1 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <1>; -- }; --}; -- --&de { -+&gpu { -+ mali-supply = <®_dcdcc>; - status = "okay"; - }; - -@@ -95,12 +123,11 @@ - }; - }; - --&ehci0 { -- status = "okay"; --}; -- --&ehci3 { -- status = "okay"; -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; - - &mmc0 { -@@ -216,13 +243,16 @@ - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - - reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - -@@ -255,10 +285,36 @@ - }; - }; - -+&r_ir { -+ status = "okay"; -+}; -+ - &r_pio { - vcc-pm-supply = <®_aldo1>; - }; - -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ -+/* -+ * The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI -+ * flash and eMMC at the same time, as one of them would fail probing. -+ * Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can -+ * fix this up in no eMMC is connected. -+ */ -+&spi0 { -+ pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ -+ flash@0 { -+ compatible = "winbond,w25q128", "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <4000000>; -+ }; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; -diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi -index a117f479ae55..8a62a9fbe347 100644 ---- a/arch/arm/dts/sun50i-h6.dtsi -+++ b/arch/arm/dts/sun50i-h6.dtsi -@@ -1,7 +1,5 @@ --// SPDX-License-Identifier: (GPL-2.0+ or MIT) --/* -- * Copyright (C) 2017 Icenowy Zheng -- */ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2017 Icenowy Zheng - - #include - #include -@@ -11,6 +9,7 @@ - #include - #include - #include -+#include - - / { - interrupt-parent = <&gic>; -@@ -26,6 +25,9 @@ - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu1: cpu@1 { -@@ -33,6 +35,9 @@ - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu2: cpu@2 { -@@ -40,6 +45,9 @@ - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu3: cpu@3 { -@@ -47,6 +55,9 @@ - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - }; - -@@ -56,14 +67,6 @@ - status = "disabled"; - }; - -- iosc: internal-osc-clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <16000000>; -- clock-accuracy = <300000000>; -- clock-output-names = "iosc"; -- }; -- - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; -@@ -71,11 +74,13 @@ - clock-output-names = "osc24M"; - }; - -- osc32k: osc32k_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <32768>; -- clock-output-names = "osc32k"; -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = , -+ , -+ , -+ ; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { -@@ -85,6 +90,7 @@ - - timer { - compatible = "arm,armv8-timer"; -+ arm,no-tick-in-suspend; - interrupts = , - ; -+ iommus = <&iommu 0>; - - ports { - #address-cells = <1>; -@@ -155,6 +162,30 @@ - resets = <&ccu RST_BUS_VE>; - interrupts = ; - allwinner,sram = <&ve_sram 1>; -+ iommus = <&iommu 3>; -+ }; -+ -+ gpu: gpu@1800000 { -+ compatible = "allwinner,sun50i-h6-mali", -+ "arm,mali-t720"; -+ reg = <0x01800000 0x4000>; -+ interrupts = , -+ , -+ ; -+ interrupt-names = "job", "mmu", "gpu"; -+ clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>; -+ clock-names = "core", "bus"; -+ resets = <&ccu RST_BUS_GPU>; -+ status = "disabled"; -+ }; -+ -+ crypto: crypto@1904000 { -+ compatible = "allwinner,sun50i-h6-crypto"; -+ reg = <0x01904000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_MBUS_CE>; -+ clock-names = "bus", "mod", "ram"; -+ resets = <&ccu RST_BUS_CE>; - }; - - syscon: syscon@3000000 { -@@ -197,7 +228,7 @@ - ccu: clock@3001000 { - compatible = "allwinner,sun50i-h6-ccu"; - reg = <0x03001000 0x1000>; -- clocks = <&osc24M>, <&osc32k>, <&iosc>; -+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; -@@ -215,9 +246,29 @@ - #dma-cells = <1>; - }; - -- sid: sid@3006000 { -+ msgbox: mailbox@3003000 { -+ compatible = "allwinner,sun50i-h6-msgbox", -+ "allwinner,sun6i-a31-msgbox"; -+ reg = <0x03003000 0x1000>; -+ clocks = <&ccu CLK_BUS_MSGBOX>; -+ resets = <&ccu RST_BUS_MSGBOX>; -+ interrupts = ; -+ #mbox-cells = <1>; -+ }; -+ -+ sid: efuse@3006000 { - compatible = "allwinner,sun50i-h6-sid"; - reg = <0x03006000 0x400>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ ths_calibration: thermal-sensor-calibration@14 { -+ reg = <0x14 0x8>; -+ }; -+ -+ cpu_speed_grade: cpu-speed-grade@1c { -+ reg = <0x1c 0x4>; -+ }; - }; - - watchdog: watchdog@30090a0 { -@@ -225,10 +276,21 @@ - "allwinner,sun6i-a31-wdt"; - reg = <0x030090a0 0x20>; - interrupts = ; -+ clocks = <&osc24M>; - /* Broken on some H6 boards */ - status = "disabled"; - }; - -+ pwm: pwm@300a000 { -+ compatible = "allwinner,sun50i-h6-pwm"; -+ reg = <0x0300a000 0x400>; -+ clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; -+ clock-names = "mod", "bus"; -+ resets = <&ccu RST_BUS_PWM>; -+ #pwm-cells = <3>; -+ status = "disabled"; -+ }; -+ - pio: pinctrl@300b000 { - compatible = "allwinner,sun50i-h6-pinctrl"; - reg = <0x0300b000 0x400>; -@@ -236,7 +298,7 @@ - , - , - ; -- clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>; -+ clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; -@@ -256,6 +318,21 @@ - function = "hdmi"; - }; - -+ i2c0_pins: i2c0-pins { -+ pins = "PD25", "PD26"; -+ function = "i2c0"; -+ }; -+ -+ i2c1_pins: i2c1-pins { -+ pins = "PH5", "PH6"; -+ function = "i2c1"; -+ }; -+ -+ i2c2_pins: i2c2-pins { -+ pins = "PD23", "PD24"; -+ function = "i2c2"; -+ }; -+ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; -@@ -264,10 +341,7 @@ - bias-pull-up; - }; - -- /* -- * /omit-if-no-ref/ isn't supported by U-boot -- * keep this comment to avoid bad sync with Linux -- */ -+ /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", - "PG4", "PG5"; -@@ -285,10 +359,50 @@ - bias-pull-up; - }; - -+ /omit-if-no-ref/ -+ spi0_pins: spi0-pins { -+ pins = "PC0", "PC2", "PC3"; -+ function = "spi0"; -+ }; -+ -+ /* pin shared with MMC2-CMD (eMMC) */ -+ /omit-if-no-ref/ -+ spi0_cs_pin: spi0-cs-pin { -+ pins = "PC5"; -+ function = "spi0"; -+ }; -+ -+ /omit-if-no-ref/ -+ spi1_pins: spi1-pins { -+ pins = "PH4", "PH5", "PH6"; -+ function = "spi1"; -+ }; -+ -+ /omit-if-no-ref/ -+ spi1_cs_pin: spi1-cs-pin { -+ pins = "PH3"; -+ function = "spi1"; -+ }; -+ -+ spdif_tx_pin: spdif-tx-pin { -+ pins = "PH7"; -+ function = "spdif"; -+ }; -+ - uart0_ph_pins: uart0-ph-pins { - pins = "PH0", "PH1"; - function = "uart0"; - }; -+ -+ uart1_pins: uart1-pins { -+ pins = "PG6", "PG7"; -+ function = "uart1"; -+ }; -+ -+ uart1_rts_cts_pins: uart1-rts-cts-pins { -+ pins = "PG8", "PG9"; -+ function = "uart1"; -+ }; - }; - - gic: interrupt-controller@3021000 { -@@ -302,6 +416,15 @@ - #interrupt-cells = <3>; - }; - -+ iommu: iommu@30f0000 { -+ compatible = "allwinner,sun50i-h6-iommu"; -+ reg = <0x030f0000 0x10000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_IOMMU>; -+ resets = <&ccu RST_BUS_IOMMU>; -+ #iommu-cells = <1>; -+ }; -+ - mmc0: mmc@4020000 { - compatible = "allwinner,sun50i-h6-mmc", - "allwinner,sun50i-a64-mmc"; -@@ -394,6 +517,78 @@ - status = "disabled"; - }; - -+ i2c0: i2c@5002000 { -+ compatible = "allwinner,sun50i-h6-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x05002000 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2C0>; -+ resets = <&ccu RST_BUS_I2C0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c1: i2c@5002400 { -+ compatible = "allwinner,sun50i-h6-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x05002400 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2C1>; -+ resets = <&ccu RST_BUS_I2C1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c2: i2c@5002800 { -+ compatible = "allwinner,sun50i-h6-i2c", -+ "allwinner,sun6i-a31-i2c"; -+ reg = <0x05002800 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2C2>; -+ resets = <&ccu RST_BUS_I2C2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2_pins>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ spi0: spi@5010000 { -+ compatible = "allwinner,sun50i-h6-spi", -+ "allwinner,sun8i-h3-spi"; -+ reg = <0x05010000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -+ clock-names = "ahb", "mod"; -+ dmas = <&dma 22>, <&dma 22>; -+ dma-names = "rx", "tx"; -+ resets = <&ccu RST_BUS_SPI0>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ spi1: spi@5011000 { -+ compatible = "allwinner,sun50i-h6-spi", -+ "allwinner,sun8i-h3-spi"; -+ reg = <0x05011000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -+ clock-names = "ahb", "mod"; -+ dmas = <&dma 23>, <&dma 23>; -+ dma-names = "rx", "tx"; -+ resets = <&ccu RST_BUS_SPI1>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - emac: ethernet@5020000 { - compatible = "allwinner,sun50i-h6-emac", - "allwinner,sun50i-a64-emac"; -@@ -414,6 +609,34 @@ - }; - }; - -+ i2s1: i2s@5091000 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun50i-h6-i2s"; -+ reg = <0x05091000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>; -+ clock-names = "apb", "mod"; -+ dmas = <&dma 4>, <&dma 4>; -+ resets = <&ccu RST_BUS_I2S1>; -+ dma-names = "rx", "tx"; -+ status = "disabled"; -+ }; -+ -+ spdif: spdif@5093000 { -+ #sound-dai-cells = <0>; -+ compatible = "allwinner,sun50i-h6-spdif"; -+ reg = <0x05093000 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; -+ clock-names = "apb", "spdif"; -+ resets = <&ccu RST_BUS_SPDIF>; -+ dmas = <&dma 2>; -+ dma-names = "tx"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spdif_tx_pin>; -+ status = "disabled"; -+ }; -+ - usb2otg: usb@5100000 { - compatible = "allwinner,sun50i-h6-musb", - "allwinner,sun8i-a33-musb"; -@@ -470,6 +693,38 @@ - status = "disabled"; - }; - -+ dwc3: usb@5200000 { -+ compatible = "snps,dwc3"; -+ reg = <0x05200000 0x10000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_XHCI>, -+ <&ccu CLK_BUS_XHCI>, -+ <&rtc 0>; -+ clock-names = "ref", "bus_early", "suspend"; -+ resets = <&ccu RST_BUS_XHCI>; -+ /* -+ * The datasheet of the chip doesn't declare the -+ * peripheral function, and there's no boards known -+ * to have a USB Type-B port routed to the port. -+ * In addition, no one has tested the peripheral -+ * function yet. -+ * So set the dr_mode to "host" in the DTSI file. -+ */ -+ dr_mode = "host"; -+ phys = <&usb3phy>; -+ phy-names = "usb3-phy"; -+ status = "disabled"; -+ }; -+ -+ usb3phy: phy@5210000 { -+ compatible = "allwinner,sun50i-h6-usb3-phy"; -+ reg = <0x5210000 0x10000>; -+ clocks = <&ccu CLK_USB_PHY1>; -+ resets = <&ccu RST_USB_PHY1>; -+ #phy-cells = <0>; -+ status = "disabled"; -+ }; -+ - ehci3: usb@5311000 { - compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; - reg = <0x05311000 0x100>; -@@ -480,6 +735,7 @@ - resets = <&ccu RST_BUS_OHCI3>, - <&ccu RST_BUS_EHCI3>; - phys = <&usb2phy 3>; -+ phy-names = "usb"; - status = "disabled"; - }; - -@@ -491,6 +747,7 @@ - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>; - phys = <&usb2phy 3>; -+ phy-names = "usb"; - status = "disabled"; - }; - -@@ -507,7 +764,7 @@ - resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>; - reset-names = "ctrl", "hdcp"; - phys = <&hdmi_phy>; -- phy-names = "hdmi-phy"; -+ phy-names = "phy"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_pins>; - status = "disabled"; -@@ -549,7 +806,6 @@ - "tcon-tv0"; - clock-output-names = "tcon-top-tv0"; - resets = <&ccu RST_BUS_TCON_TOP>; -- reset-names = "rst"; - #clock-cells = <1>; - - ports { -@@ -636,10 +892,19 @@ - }; - }; - -+ rtc: rtc@7000000 { -+ compatible = "allwinner,sun50i-h6-rtc"; -+ reg = <0x07000000 0x400>; -+ interrupts = , -+ ; -+ clock-output-names = "osc32k", "osc32k-out", "iosc"; -+ #clock-cells = <1>; -+ }; -+ - r_ccu: clock@7010000 { - compatible = "allwinner,sun50i-h6-r-ccu"; - reg = <0x07010000 0x400>; -- clocks = <&osc24M>, <&osc32k>, <&iosc>, -+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, - <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; -@@ -651,6 +916,7 @@ - "allwinner,sun6i-a31-wdt"; - reg = <0x07020400 0x20>; - interrupts = ; -+ clocks = <&osc24M>; - }; - - r_intc: interrupt-controller@7021000 { -@@ -667,7 +933,7 @@ - reg = <0x07022000 0x400>; - interrupts = , - ; -- clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>; -+ clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; -@@ -678,10 +944,30 @@ - pins = "PL0", "PL1"; - function = "s_i2c"; - }; -+ -+ r_ir_rx_pin: r-ir-rx-pin { -+ pins = "PL9"; -+ function = "s_cir_rx"; -+ }; -+ }; -+ -+ r_ir: ir@7040000 { -+ compatible = "allwinner,sun50i-h6-ir", -+ "allwinner,sun6i-a31-ir"; -+ reg = <0x07040000 0x400>; -+ interrupts = ; -+ clocks = <&r_ccu CLK_R_APB1_IR>, -+ <&r_ccu CLK_IR>; -+ clock-names = "apb", "ir"; -+ resets = <&r_ccu RST_R_APB1_IR>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&r_ir_rx_pin>; -+ status = "disabled"; - }; - - r_i2c: i2c@7081400 { -- compatible = "allwinner,sun6i-a31-i2c"; -+ compatible = "allwinner,sun50i-h6-i2c", -+ "allwinner,sun6i-a31-i2c"; - reg = <0x07081400 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB2_I2C>; -@@ -692,5 +978,55 @@ - #address-cells = <1>; - #size-cells = <0>; - }; -+ -+ ths: thermal-sensor@5070400 { -+ compatible = "allwinner,sun50i-h6-ths"; -+ reg = <0x05070400 0x100>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_THS>; -+ clock-names = "bus"; -+ resets = <&ccu RST_BUS_THS>; -+ nvmem-cells = <&ths_calibration>; -+ nvmem-cell-names = "calibration"; -+ #thermal-sensor-cells = <1>; -+ }; -+ }; -+ -+ thermal-zones { -+ cpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 0>; -+ -+ trips { -+ cpu_alert: cpu-alert { -+ temperature = <85000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu-crit { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ map0 { -+ trip = <&cpu_alert>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+ }; -+ -+ gpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&ths 1>; -+ }; - }; - }; --- -2.30.0 - diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0003-sunxi-Add-support-for-Tanix-TX6.patch b/projects/Allwinner/devices/H6/patches/u-boot/0003-sunxi-Add-support-for-Tanix-TX6.patch deleted file mode 100644 index dd01738fd8..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0003-sunxi-Add-support-for-Tanix-TX6.patch +++ /dev/null @@ -1,201 +0,0 @@ -From 6edd6f3d8ee26d37a557a890fa75e0840c6273db Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 3 Jan 2021 10:50:27 +0100 -Subject: [PATCH v3 2/2] sunxi: Add support for Tanix TX6 - -This commit adds support for Tanix TX6 TV box, based on H6. It's low end -H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other -peripherals. - -DT file is taken from Linux 5.11-rc1 release. - -Signed-off-by: Jernej Skrabec ---- - arch/arm/dts/Makefile | 3 +- - arch/arm/dts/sun50i-h6-tanix-tx6.dts | 124 +++++++++++++++++++++++++++ - board/sunxi/MAINTAINERS | 6 ++ - configs/tanix_tx6_defconfig | 10 +++ - 4 files changed, 142 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/dts/sun50i-h6-tanix-tx6.dts - create mode 100644 configs/tanix_tx6_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index fd47e408f826..e00aed1ec207 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -607,7 +607,8 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \ - sun50i-h6-beelink-gs1.dtb \ - sun50i-h6-orangepi-lite2.dtb \ - sun50i-h6-orangepi-one-plus.dtb \ -- sun50i-h6-pine-h64.dtb -+ sun50i-h6-pine-h64.dtb \ -+ sun50i-h6-tanix-tx6.dtb - dtb-$(CONFIG_MACH_SUN50I) += \ - sun50i-a64-amarula-relic.dtb \ - sun50i-a64-bananapi-m64.dtb \ -diff --git a/arch/arm/dts/sun50i-h6-tanix-tx6.dts b/arch/arm/dts/sun50i-h6-tanix-tx6.dts -new file mode 100644 -index 000000000000..be81330db14f ---- /dev/null -+++ b/arch/arm/dts/sun50i-h6-tanix-tx6.dts -@@ -0,0 +1,124 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (c) 2019 Jernej Skrabec -+ -+/dts-v1/; -+ -+#include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" -+ -+#include -+ -+/ { -+ model = "Tanix TX6"; -+ compatible = "oranth,tanix-tx6", "allwinner,sun50i-h6"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ connector { -+ compatible = "hdmi-connector"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ -+ reg_vcc3v3: vcc3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_vdd_cpu_gpu: vdd-cpu-gpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu-gpu"; -+ regulator-min-microvolt = <1135000>; -+ regulator-max-microvolt = <1135000>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu_gpu>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&dwc3 { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <®_vdd_cpu_gpu>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_pins>; -+ vmmc-supply = <®_vcc3v3>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&ohci3 { -+ status = "okay"; -+}; -+ -+&r_ir { -+ linux,rc-map-name = "rc-tanix-tx5max"; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; -+ -+&usb2otg { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usb2phy { -+ status = "okay"; -+}; -+ -+&usb3phy { -+ status = "okay"; -+}; -diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS -index d3755ae41a9d..1b37a9899edd 100644 ---- a/board/sunxi/MAINTAINERS -+++ b/board/sunxi/MAINTAINERS -@@ -489,6 +489,12 @@ S: Maintained - F: configs/Sunchip_CX-A99_defconfig - W: https://linux-sunxi.org/Sunchip_CX-A99 - -+TANIX TX6 BOARD -+M: Jernej Skrabec -+S: Maintained -+F: configs/tanix_tx6_defconfig -+W: https://linux-sunxi.org/Tanix_TX6 -+ - TBS A711 BOARD - M: Maxime Ripard - S: Maintained -diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig -new file mode 100644 -index 000000000000..9ce812ecc35d ---- /dev/null -+++ b/configs/tanix_tx6_defconfig -@@ -0,0 +1,10 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL=y -+CONFIG_MACH_SUN50I_H6=y -+CONFIG_SUNXI_DRAM_H6_DDR3_1333=y -+CONFIG_DRAM_CLK=648 -+CONFIG_MMC0_CD_PIN="PF6" -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-tanix-tx6" -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set --- -2.30.0 - diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0004-sunxi-board-extract-creating-a-unique-sid-into-a-hel.patch b/projects/Allwinner/devices/H6/patches/u-boot/0004-sunxi-board-extract-creating-a-unique-sid-into-a-hel.patch deleted file mode 100644 index b0aa49881b..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0004-sunxi-board-extract-creating-a-unique-sid-into-a-hel.patch +++ /dev/null @@ -1,159 +0,0 @@ -From a0770d90e89c03115eaf1c22d74b955f37b8ddbd Mon Sep 17 00:00:00 2001 -From: Andre Heider -Date: Tue, 26 Nov 2019 12:38:46 +0100 -Subject: [PATCH 1/3] sunxi: board: extract creating a unique sid into a helper - function - -Refactor setup_environment() so we can use the created sid for a -Bluetooth address too. - -Signed-off-by: Andre Heider -Acked-by: Maxime Ripard -[rebased] -Signed-off-by: Jernej Skrabec ---- - board/sunxi/board.c | 121 ++++++++++++++++++++++++-------------------- - 1 file changed, 66 insertions(+), 55 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 708a27ed78e9..4a29e351141b 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -789,6 +789,38 @@ static void parse_spl_header(const uint32_t spl_addr) - env_set_hex("fel_scriptaddr", spl->fel_script_address); - } - -+static bool get_unique_sid(unsigned int *sid) -+{ -+ if (sunxi_get_sid(sid) != 0) -+ return false; -+ -+ if (!sid[0]) -+ return false; -+ -+ /* -+ * The single words 1 - 3 of the SID have quite a few bits -+ * which are the same on many models, so we take a crc32 -+ * of all 3 words, to get a more unique value. -+ * -+ * Note we only do this on newer SoCs as we cannot change -+ * the algorithm on older SoCs since those have been using -+ * fixed mac-addresses based on only using word 3 for a -+ * long time and changing a fixed mac-address with an -+ * u-boot update is not good. -+ */ -+#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \ -+ !defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \ -+ !defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33) -+ sid[3] = crc32(0, (unsigned char *)&sid[1], 12); -+#endif -+ -+ /* Ensure the NIC specific bytes of the mac are not all 0 */ -+ if ((sid[3] & 0xffffff) == 0) -+ sid[3] |= 0x800000; -+ -+ return true; -+} -+ - /* - * Note this function gets called multiple times. - * It must not make any changes to env variables which already exist. -@@ -799,61 +831,40 @@ static void setup_environment(const void *fdt) - unsigned int sid[4]; - uint8_t mac_addr[6]; - char ethaddr[16]; -- int i, ret; -- -- ret = sunxi_get_sid(sid); -- if (ret == 0 && sid[0] != 0) { -- /* -- * The single words 1 - 3 of the SID have quite a few bits -- * which are the same on many models, so we take a crc32 -- * of all 3 words, to get a more unique value. -- * -- * Note we only do this on newer SoCs as we cannot change -- * the algorithm on older SoCs since those have been using -- * fixed mac-addresses based on only using word 3 for a -- * long time and changing a fixed mac-address with an -- * u-boot update is not good. -- */ --#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \ -- !defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \ -- !defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33) -- sid[3] = crc32(0, (unsigned char *)&sid[1], 12); --#endif -- -- /* Ensure the NIC specific bytes of the mac are not all 0 */ -- if ((sid[3] & 0xffffff) == 0) -- sid[3] |= 0x800000; -- -- for (i = 0; i < 4; i++) { -- sprintf(ethaddr, "ethernet%d", i); -- if (!fdt_get_alias(fdt, ethaddr)) -- continue; -- -- if (i == 0) -- strcpy(ethaddr, "ethaddr"); -- else -- sprintf(ethaddr, "eth%daddr", i); -- -- if (env_get(ethaddr)) -- continue; -- -- /* Non OUI / registered MAC address */ -- mac_addr[0] = (i << 4) | 0x02; -- mac_addr[1] = (sid[0] >> 0) & 0xff; -- mac_addr[2] = (sid[3] >> 24) & 0xff; -- mac_addr[3] = (sid[3] >> 16) & 0xff; -- mac_addr[4] = (sid[3] >> 8) & 0xff; -- mac_addr[5] = (sid[3] >> 0) & 0xff; -- -- eth_env_set_enetaddr(ethaddr, mac_addr); -- } -- -- if (!env_get("serial#")) { -- snprintf(serial_string, sizeof(serial_string), -- "%08x%08x", sid[0], sid[3]); -- -- env_set("serial#", serial_string); -- } -+ int i; -+ -+ if (!get_unique_sid(sid)) -+ return; -+ -+ for (i = 0; i < 4; i++) { -+ sprintf(ethaddr, "ethernet%d", i); -+ if (!fdt_get_alias(fdt, ethaddr)) -+ continue; -+ -+ if (i == 0) -+ strcpy(ethaddr, "ethaddr"); -+ else -+ sprintf(ethaddr, "eth%daddr", i); -+ -+ if (env_get(ethaddr)) -+ continue; -+ -+ /* Non OUI / registered MAC address */ -+ mac_addr[0] = (i << 4) | 0x02; -+ mac_addr[1] = (sid[0] >> 0) & 0xff; -+ mac_addr[2] = (sid[3] >> 24) & 0xff; -+ mac_addr[3] = (sid[3] >> 16) & 0xff; -+ mac_addr[4] = (sid[3] >> 8) & 0xff; -+ mac_addr[5] = (sid[3] >> 0) & 0xff; -+ -+ eth_env_set_enetaddr(ethaddr, mac_addr); -+ } -+ -+ if (!env_get("serial#")) { -+ snprintf(serial_string, sizeof(serial_string), -+ "%08x%08x", sid[0], sid[3]); -+ -+ env_set("serial#", serial_string); - } - } - --- -2.30.0 - diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0005-arm-sunxi-add-a-config-option-to-fixup-a-Bluetooth-a.patch b/projects/Allwinner/devices/H6/patches/u-boot/0005-arm-sunxi-add-a-config-option-to-fixup-a-Bluetooth-a.patch deleted file mode 100644 index e9f62fa708..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0005-arm-sunxi-add-a-config-option-to-fixup-a-Bluetooth-a.patch +++ /dev/null @@ -1,96 +0,0 @@ -From c8216074411efbc484d2e308451477fa9f4e342c Mon Sep 17 00:00:00 2001 -From: Andre Heider -Date: Sun, 17 Nov 2019 20:24:43 +0100 -Subject: [PATCH 2/3] arm: sunxi: add a config option to fixup a Bluetooth - address - -Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3, -ship with the controller default address. - -Add a config option to fix it up so it can function properly. - -Signed-off-by: Andre Heider -Tested-by: Ondrej Jirman -Acked-by: Maxime Ripard -[rebased] -Signed-off-by: Jernej Skrabec ---- - arch/arm/mach-sunxi/Kconfig | 11 +++++++++++ - board/sunxi/board.c | 34 ++++++++++++++++++++++++++++++++++ - 2 files changed, 45 insertions(+) - -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index 49ef217f08c0..269aef5f01a1 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -1016,4 +1016,15 @@ config PINEPHONE_DT_SELECTION - Enable this option to automatically select the device tree for the - correct PinePhone hardware revision during boot. - -+config FIXUP_BDADDR -+ string "Fixup the Bluetooth controller address" -+ default "" -+ help -+ This option specifies the DT compatible name of the Bluetooth -+ controller for which to set the "local-bd-address" property. -+ Set this option if your device ships with the Bluetooth controller -+ default address. -+ The used address is "bdaddr" if set, and "ethaddr" with the LSB -+ flipped elsewise. -+ - endif -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 4a29e351141b..d19119b7eb36 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -908,6 +908,38 @@ int misc_init_r(void) - return 0; - } - -+static void fixup_bd_address(void *blob) -+{ -+ /* Some devices ship with a Bluetooth controller default address. -+ * Set a valid address through the device tree. -+ */ -+ uchar tmp[ETH_ALEN], bdaddr[ETH_ALEN]; -+ unsigned int sid[4]; -+ int i; -+ -+ if (!CONFIG_FIXUP_BDADDR[0]) -+ return; -+ -+ if (eth_env_get_enetaddr("bdaddr", tmp)) { -+ /* Convert between the binary formats of the corresponding stacks */ -+ for (i = 0; i < ETH_ALEN; ++i) -+ bdaddr[i] = tmp[ETH_ALEN - i - 1]; -+ } else { -+ if (!get_unique_sid(sid)) -+ return; -+ -+ bdaddr[0] = ((sid[3] >> 0) & 0xff) ^ 1; -+ bdaddr[1] = (sid[3] >> 8) & 0xff; -+ bdaddr[2] = (sid[3] >> 16) & 0xff; -+ bdaddr[3] = (sid[3] >> 24) & 0xff; -+ bdaddr[4] = (sid[0] >> 0) & 0xff; -+ bdaddr[5] = 0x02; -+ } -+ -+ do_fixup_by_compat(blob, CONFIG_FIXUP_BDADDR, -+ "local-bd-address", bdaddr, ETH_ALEN, 1); -+} -+ - int ft_board_setup(void *blob, struct bd_info *bd) - { - int __maybe_unused r; -@@ -918,6 +950,8 @@ int ft_board_setup(void *blob, struct bd_info *bd) - */ - setup_environment(blob); - -+ fixup_bd_address(blob); -+ - #ifdef CONFIG_VIDEO_DT_SIMPLEFB - r = sunxi_simplefb_setup(blob); - if (r) --- -2.30.0 - diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0007-arm64-dts-sun50i-Add-support-for-Orange-Pi-3.patch b/projects/Allwinner/devices/H6/patches/u-boot/0007-arm64-dts-sun50i-Add-support-for-Orange-Pi-3.patch deleted file mode 100644 index 8a1331e5e6..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0007-arm64-dts-sun50i-Add-support-for-Orange-Pi-3.patch +++ /dev/null @@ -1,424 +0,0 @@ -From ebbb185d268f795de19aa4d2934531ec61a8ed84 Mon Sep 17 00:00:00 2001 -From: Andre Heider -Date: Mon, 18 Nov 2019 09:54:43 +0100 -Subject: [PATCH 3/3] arm64: dts: sun50i: Add support for Orange Pi 3 - -dts file is taken from Linux 5.11-rc1 tag. - -The Bluetooth controller of this device ships with a default address, -use the new CONFIG_FIXUP_BDADDR option to fix it up. - -Signed-off-by: Andre Heider -Acked-by: Maxime Ripard -[Updated OrangePi 3 DT, rebase and config update] -Signed-off-by: Jernej Skrabec ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/sun50i-h6-orangepi-3.dts | 345 ++++++++++++++++++++++++++ - board/sunxi/MAINTAINERS | 5 + - configs/orangepi_3_defconfig | 13 + - 4 files changed, 364 insertions(+) - create mode 100644 arch/arm/dts/sun50i-h6-orangepi-3.dts - create mode 100644 configs/orangepi_3_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index e00aed1ec207..607571d04b25 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -605,6 +605,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ - sun50i-h5-orangepi-zero-plus2.dtb - dtb-$(CONFIG_MACH_SUN50I_H6) += \ - sun50i-h6-beelink-gs1.dtb \ -+ sun50i-h6-orangepi-3.dtb \ - sun50i-h6-orangepi-lite2.dtb \ - sun50i-h6-orangepi-one-plus.dtb \ - sun50i-h6-pine-h64.dtb \ -diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts -new file mode 100644 -index 000000000000..15c9dd8c4479 ---- /dev/null -+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts -@@ -0,0 +1,345 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2019 Ondřej Jirman -+ -+/dts-v1/; -+ -+#include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" -+ -+#include -+ -+/ { -+ model = "OrangePi 3"; -+ compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6"; -+ -+ aliases { -+ serial0 = &uart0; -+ serial1 = &uart1; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ connector { -+ compatible = "hdmi-connector"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ -+ type = "a"; -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ -+ ext_osc32k: ext_osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "ext_osc32k"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ power { -+ label = "orangepi:red:power"; -+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ -+ default-state = "on"; -+ }; -+ -+ status { -+ label = "orangepi:green:status"; -+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ -+ }; -+ }; -+ -+ reg_vcc5v: vcc5v { -+ /* board wide 5V supply directly from the DC jack */ -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-5v"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_vcc33_wifi: vcc33-wifi { -+ /* Always on 3.3V regulator for WiFi and BT */ -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc33-wifi"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ vin-supply = <®_vcc5v>; -+ }; -+ -+ reg_vcc_wifi_io: vcc-wifi-io { -+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */ -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-wifi-io"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ vin-supply = <®_vcc33_wifi>; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&dwc3 { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <®_dcdcc>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ -+&mmc0 { -+ vmmc-supply = <®_cldo1>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_vcc33_wifi>; -+ vqmmc-supply = <®_vcc_wifi_io>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ brcm: sdio-wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+&mmc2 { -+ vmmc-supply = <®_cldo1>; -+ vqmmc-supply = <®_bldo2>; -+ cap-mmc-hw-reset; -+ non-removable; -+ bus-width = <8>; -+ status = "okay"; -+}; -+ -+&ohci0 { -+ status = "okay"; -+}; -+ -+&ohci3 { -+ status = "okay"; -+}; -+ -+&pio { -+ vcc-pc-supply = <®_bldo2>; -+ vcc-pd-supply = <®_cldo1>; -+ vcc-pg-supply = <®_vcc_wifi_io>; -+}; -+ -+&r_i2c { -+ status = "okay"; -+ -+ axp805: pmic@36 { -+ compatible = "x-powers,axp805", "x-powers,axp806"; -+ reg = <0x36>; -+ interrupt-parent = <&r_intc>; -+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ x-powers,self-working-mode; -+ vina-supply = <®_vcc5v>; -+ vinb-supply = <®_vcc5v>; -+ vinc-supply = <®_vcc5v>; -+ vind-supply = <®_vcc5v>; -+ vine-supply = <®_vcc5v>; -+ aldoin-supply = <®_vcc5v>; -+ bldoin-supply = <®_vcc5v>; -+ cldoin-supply = <®_vcc5v>; -+ -+ regulators { -+ reg_aldo1: aldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-pl-led-ir"; -+ }; -+ -+ reg_aldo2: aldo2 { -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33-audio-tv-ephy-mac"; -+ }; -+ -+ /* ALDO3 is shorted to CLDO1 */ -+ reg_aldo3: aldo3 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1"; -+ }; -+ -+ reg_bldo1: bldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18-dram-bias-pll"; -+ }; -+ -+ reg_bldo2: bldo2 { -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc-efuse-pcie-hdmi-pc"; -+ }; -+ -+ bldo3 { -+ /* unused */ -+ }; -+ -+ bldo4 { -+ /* unused */ -+ }; -+ -+ reg_cldo1: cldo1 { -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2"; -+ }; -+ -+ cldo2 { -+ /* unused */ -+ }; -+ -+ cldo3 { -+ /* unused */ -+ }; -+ -+ reg_dcdca: dcdca { -+ regulator-always-on; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; -+ regulator-name = "vdd-cpu"; -+ }; -+ -+ reg_dcdcc: dcdcc { -+ regulator-enable-ramp-delay = <32000>; -+ regulator-min-microvolt = <810000>; -+ regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; -+ regulator-name = "vdd-gpu"; -+ }; -+ -+ reg_dcdcd: dcdcd { -+ regulator-always-on; -+ regulator-min-microvolt = <960000>; -+ regulator-max-microvolt = <960000>; -+ regulator-name = "vdd-sys"; -+ }; -+ -+ reg_dcdce: dcdce { -+ regulator-always-on; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ regulator-name = "vcc-dram"; -+ }; -+ -+ sw { -+ /* unused */ -+ }; -+ }; -+ }; -+}; -+ -+&r_ir { -+ status = "okay"; -+}; -+ -+&rtc { -+ clocks = <&ext_osc32k>; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; -+ -+/* There's the BT part of the AP6256 connected to that UART */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rtc 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ -+ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ -+ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ -+ max-speed = <1500000>; -+ }; -+}; -+ -+&usb2otg { -+ /* -+ * This board doesn't have a controllable VBUS even though it -+ * does have an ID pin. Using it as anything but a USB host is -+ * unsafe. -+ */ -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usb2phy { -+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */ -+ usb0_vbus-supply = <®_vcc5v>; -+ usb3_vbus-supply = <®_vcc5v>; -+ status = "okay"; -+}; -+ -+&usb3phy { -+ status = "okay"; -+}; -diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS -index 1b37a9899edd..95b4df83e0a9 100644 ---- a/board/sunxi/MAINTAINERS -+++ b/board/sunxi/MAINTAINERS -@@ -385,6 +385,11 @@ M: Icenowy Zheng - S: Maintained - F: configs/teres_i_defconfig - -+ORANGEPI 3 BOARD -+M: Andre Heider -+S: Maintained -+F: configs/orangepi_3_defconfig -+ - ORANGEPI LITE2 BOARD - M: Jagan Teki - S: Maintained -diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig -new file mode 100644 -index 000000000000..6a4a11739213 ---- /dev/null -+++ b/configs/orangepi_3_defconfig -@@ -0,0 +1,13 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL=y -+CONFIG_MACH_SUN50I_H6=y -+CONFIG_SUNXI_DRAM_H6_LPDDR3=y -+CONFIG_MMC0_CD_PIN="PF6" -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_FIXUP_BDADDR="brcm,bcm4345c5" -+# CONFIG_PSCI_RESET is not set -+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3" -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_OHCI_HCD=y --- -2.30.0 - diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0010-unreliable-dram.patch b/projects/Allwinner/devices/H6/patches/u-boot/0010-unreliable-dram.patch deleted file mode 100644 index 222c60b429..0000000000 --- a/projects/Allwinner/devices/H6/patches/u-boot/0010-unreliable-dram.patch +++ /dev/null @@ -1,40 +0,0 @@ -From: megous@megous.com -Date: Mon, 29 Jul 2019 01:39:42 +0200 -Subject: [U-Boot] [PATCH] Fix unreliable detection of DRAM size on Orange Pi 3 - -From: Ondrej Jirman - -Orange Pi 3 has 2 GiB of DRAM, that sometime get misdetected -as 4 GiB, due to false negative result from mctl_mem_matches() -when detecting number of column address bits. This leads to -u-boot detecting more address bits than there are and the -boot process hangs shortly after. - -In mctl_mem_matches() we need to wait for each write to finish, -separately. Without this, the check is not reliable for some -unknown reason, probably having to do with unpredictable memory -access ordering. - -Patch was made with help from André Przywara, who noticed that -my original idea about detection failing due to read-back from -cache without involving DRAM was false, because data cache is -still of at the time of the DRAM size autodetection. - -Signed-off-by: Ondrej Jirman -Cc: André Przywara ---- - arch/arm/mach-sunxi/dram_helpers.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c -index 239ab421a8..6dba448638 100644 ---- a/arch/arm/mach-sunxi/dram_helpers.c -+++ b/arch/arm/mach-sunxi/dram_helpers.c -@@ -30,6 +30,7 @@ bool mctl_mem_matches(u32 offset) - { - /* Try to write different values to RAM at two addresses */ - writel(0, CONFIG_SYS_SDRAM_BASE); -+ dsb(); - writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset); - dsb(); - /* Check if the same value is actually observed when reading back */ diff --git a/projects/Allwinner/devices/H5/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch b/projects/Allwinner/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch similarity index 71% rename from projects/Allwinner/devices/H5/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch rename to projects/Allwinner/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch index 0f0e2a73d8..383c9769f4 100644 --- a/projects/Allwinner/devices/H5/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch +++ b/projects/Allwinner/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch @@ -1,4 +1,4 @@ -From 06860479d1bfd84037f29236511d5945e5193c85 Mon Sep 17 00:00:00 2001 +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 8 Mar 2020 08:08:03 +0100 Subject: [PATCH] OrangePi PC2: Update defaults @@ -7,11 +7,9 @@ Subject: [PATCH] OrangePi PC2: Update defaults configs/orangepi_pc2_defconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig -index 3d65b87d33..1ffeeed6cd 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig -@@ -3,12 +3,14 @@ CONFIG_SPL=y +@@ -5,11 +5,13 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 @@ -19,7 +17,6 @@ index 3d65b87d33..1ffeeed6cd 100644 CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y +CONFIG_SPL_I2C_SUPPORT=y - CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y +CONFIG_SY8106A_POWER=y @@ -27,6 +24,3 @@ index 3d65b87d33..1ffeeed6cd 100644 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y --- -2.25.1 - diff --git a/projects/Allwinner/patches/u-boot/0002-sunxi-A23-A33-H3-Move-sun8i-secure-monitor-to-SRAM-A.patch b/projects/Allwinner/patches/u-boot/0002-sunxi-A23-A33-H3-Move-sun8i-secure-monitor-to-SRAM-A.patch new file mode 100644 index 0000000000..a534094482 --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0002-sunxi-A23-A33-H3-Move-sun8i-secure-monitor-to-SRAM-A.patch @@ -0,0 +1,63 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 18 Apr 2021 22:21:41 -0500 +Subject: [PATCH] sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2 + +So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure +monitor code (providing PSCI runtime services). And while those SoCs do +not have the secure SRAM B like older SoCs, there is enough (secure) +SRAM A2 to put the monitor code and data in there instead. + +Follow the design of 64-bit SoCs and use the first part for the monitor, +and the last 16 KiB for the SCP firmware. With this change, the monitor +no longer needs to reserve a region in DRAM. + +Signed-off-by: Samuel Holland +Reviewed-by: Andre Przywara +[Andre: amend commit message, fix R40 and V3s build] +Signed-off-by: Andre Przywara +--- + arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++++++++++ + include/configs/sun8i.h | 10 ++++++++++ + 2 files changed, 21 insertions(+) + +--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h ++++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +@@ -11,7 +11,18 @@ + #define SUNXI_SRAM_A1_BASE 0x00000000 + #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */ + ++#if defined(CONFIG_SUNXI_GEN_SUN6I) && \ ++ !defined(CONFIG_MACH_SUN8I_R40) && \ ++ !defined(CONFIG_MACH_SUN8I_V3S) ++#define SUNXI_SRAM_A2_BASE 0x00040000 ++#ifdef CONFIG_MACH_SUN8I_H3 ++#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */ ++#else ++#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */ ++#endif ++#else + #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */ ++#endif + #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */ + #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */ + #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ +--- a/include/configs/sun8i.h ++++ b/include/configs/sun8i.h +@@ -12,6 +12,16 @@ + * A23 specific configuration + */ + ++#ifdef SUNXI_SRAM_A2_SIZE ++/* ++ * If the SoC has enough SRAM A2, use that for the secure monitor. ++ * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes ++ * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware. ++ */ ++#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024) ++#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024) ++#endif ++ + /* + * Include common sunxi configuration where most the settings are + */ diff --git a/projects/Allwinner/patches/u-boot/0002-sunxi-Properly-check-for-SATAPWR-and-MACPWR.patch b/projects/Allwinner/patches/u-boot/0002-sunxi-Properly-check-for-SATAPWR-and-MACPWR.patch deleted file mode 100644 index 2db4d2ff7d..0000000000 --- a/projects/Allwinner/patches/u-boot/0002-sunxi-Properly-check-for-SATAPWR-and-MACPWR.patch +++ /dev/null @@ -1,65 +0,0 @@ -From: Andre Przywara -Subject: [PATCH] sunxi: Properly check for SATAPWR and MACPWR -Date: Tue, 19 Jan 2021 01:05:20 +0000 - -The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as -string Kconfig symbols are always "defined" from the preprocessor's -perspective. This lead to unnecessary calls to the GPIO routines, but -also always added a half a second delay to wait for a SATA disk to power -up. Many thanks to Peter for pointing this out! - -Fix this by properly comparing the Kconfig symbols against the empty -string. strcmp() would be nicer for this, but GCC does not optimise this -away, probably due to our standalone compiler switches. - -Reported-by: Peter Robinson -Signed-off-by: Andre Przywara -Tested-by: Samuel Holland # Orange Pi WinPlus -Tested-by: Peter Robinson ---- - board/sunxi/board.c | 34 ++++++++++++++++++++++------------ - 1 file changed, 22 insertions(+), 12 deletions(-) - ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -264,18 +264,28 @@ int board_init(void) - if (ret) - return ret; - --#ifdef CONFIG_SATAPWR -- satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR); -- gpio_request(satapwr_pin, "satapwr"); -- gpio_direction_output(satapwr_pin, 1); -- /* Give attached sata device time to power-up to avoid link timeouts */ -- mdelay(500); --#endif --#ifdef CONFIG_MACPWR -- macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR); -- gpio_request(macpwr_pin, "macpwr"); -- gpio_direction_output(macpwr_pin, 1); --#endif -+ /* strcmp() would look better, but doesn't get optimised away. */ -+ if (CONFIG_SATAPWR[0]) { -+ satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR); -+ if (satapwr_pin >= 0) { -+ gpio_request(satapwr_pin, "satapwr"); -+ gpio_direction_output(satapwr_pin, 1); -+ -+ /* -+ * Give the attached SATA device time to power-up -+ * to avoid link timeouts -+ */ -+ mdelay(500); -+ } -+ } -+ -+ if (CONFIG_MACPWR[0]) { -+ macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR); -+ if (macpwr_pin >= 0) { -+ gpio_request(macpwr_pin, "macpwr"); -+ gpio_direction_output(macpwr_pin, 1); -+ } -+ } - - #ifdef CONFIG_DM_I2C - /* diff --git a/projects/Allwinner/patches/u-boot/0001-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch b/projects/Allwinner/patches/u-boot/0003-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch similarity index 78% rename from projects/Allwinner/patches/u-boot/0001-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch rename to projects/Allwinner/patches/u-boot/0003-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch index bdd63efabd..1a1f4bec61 100644 --- a/projects/Allwinner/patches/u-boot/0001-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch +++ b/projects/Allwinner/patches/u-boot/0003-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch @@ -1,4 +1,4 @@ -From 55d3cc28b37000d1a3d7224c0ba4a808274e0b33 Mon Sep 17 00:00:00 2001 +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Fri, 27 Oct 2017 17:25:00 +0800 Subject: [PATCH 20/20] sunxi: call fdt_fixup_ethernet again to set macaddr for @@ -18,11 +18,9 @@ Signed-off-by: Icenowy Zheng board/sunxi/board.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 192cf8ca45..0fe70f47cb 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c -@@ -751,10 +751,12 @@ int ft_board_setup(void *blob, bd_t *bd) +@@ -970,10 +970,12 @@ int ft_board_setup(void *blob, struct bd int __maybe_unused r; /* @@ -35,8 +33,5 @@ index 192cf8ca45..0fe70f47cb 100644 setup_environment(blob); + fdt_fixup_ethernet(blob); - #ifdef CONFIG_VIDEO_DT_SIMPLEFB - r = sunxi_simplefb_setup(blob); --- -2.13.6 - + bluetooth_dt_fixup(blob); + diff --git a/projects/Allwinner/devices/H6/patches/u-boot/0008-arm64-dts-allwinner-h6-tanix-tx6-enable-emmc.patch b/projects/Allwinner/patches/u-boot/0004-arm64-dts-allwinner-h6-tanix-tx6-enable-emmc.patch similarity index 100% rename from projects/Allwinner/devices/H6/patches/u-boot/0008-arm64-dts-allwinner-h6-tanix-tx6-enable-emmc.patch rename to projects/Allwinner/patches/u-boot/0004-arm64-dts-allwinner-h6-tanix-tx6-enable-emmc.patch From 788f6e2eb9187a548211fe604a34ffa51025c9f6 Mon Sep 17 00:00:00 2001 From: heitbaum Date: Sat, 17 Apr 2021 08:24:54 +0000 Subject: [PATCH 3/4] u-boot-tools: update to 2021.07 --- packages/tools/u-boot-tools/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/tools/u-boot-tools/package.mk b/packages/tools/u-boot-tools/package.mk index 1fa15b30d8..3007efe2ed 100644 --- a/packages/tools/u-boot-tools/package.mk +++ b/packages/tools/u-boot-tools/package.mk @@ -2,8 +2,8 @@ # Copyright (C) 2019-present Team LibreELEC (https://libreelec.tv) PKG_NAME="u-boot-tools" -PKG_VERSION="2021.01" -PKG_SHA256="b407e1510a74e863b8b5cb42a24625344f0e0c2fc7582d8c866bd899367d0454" +PKG_VERSION="2021.07" +PKG_SHA256="312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e" PKG_LICENSE="GPL" PKG_SITE="https://www.denx.de/wiki/U-Boot" PKG_URL="http://ftp.denx.de/pub/u-boot/u-boot-${PKG_VERSION}.tar.bz2" From 5b6fac0e979567c58a13d269284b02e6f7147a93 Mon Sep 17 00:00:00 2001 From: heitbaum Date: Sun, 12 Sep 2021 21:31:03 +1000 Subject: [PATCH 4/4] u-boot (imx8m): remove upstreamed patches --- ...tore-the-original-__ALIGN_MASK-macro.patch | 40 ------ ...move-u-boot-off-on-delay-us-property.patch | 14 -- ...x8mq_evk-add-distro-boot-cmd-support.patch | 121 ------------------ 3 files changed, 175 deletions(-) delete mode 100644 projects/NXP/devices/iMX8/patches/u-boot/0001-v2-tools-imx8mimage-Restore-the-original-__ALIGN_MASK-macro.patch delete mode 100644 projects/NXP/devices/iMX8/patches/u-boot/0002-ARM-dts-imx8mq-evk-Remove-u-boot-off-on-delay-us-property.patch delete mode 100644 projects/NXP/devices/iMX8/patches/u-boot/0003-imx8mq_evk-add-distro-boot-cmd-support.patch diff --git a/projects/NXP/devices/iMX8/patches/u-boot/0001-v2-tools-imx8mimage-Restore-the-original-__ALIGN_MASK-macro.patch b/projects/NXP/devices/iMX8/patches/u-boot/0001-v2-tools-imx8mimage-Restore-the-original-__ALIGN_MASK-macro.patch deleted file mode 100644 index 1995de48a4..0000000000 --- a/projects/NXP/devices/iMX8/patches/u-boot/0001-v2-tools-imx8mimage-Restore-the-original-__ALIGN_MASK-macro.patch +++ /dev/null @@ -1,40 +0,0 @@ -diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c -index bc4ee793cb97..9985b95a98ab 100644 ---- a/tools/imx8mimage.c -+++ b/tools/imx8mimage.c -@@ -32,6 +32,8 @@ static uint32_t rom_version = ROM_V1; - - #define HDMI_FW_SIZE 0x17000 /* Use Last 0x1000 for IVT and CSF */ - #define ALIGN_SIZE 0x1000 -+#define ALIGN_IMX(x, a) __ALIGN_MASK_IMX((x), (__typeof__(x))(a) - 1, a) -+#define __ALIGN_MASK_IMX(x, mask, mask2) (((x) + (mask)) / (mask2) * (mask2)) - - static uint32_t get_cfg_value(char *token, char *name, int linenr) - { -@@ -342,7 +344,7 @@ static int generate_ivt_for_fit(int fd, int fit_offset, uint32_t ep, - - fit_size = fdt_totalsize(&image_header); - -- fit_size = ALIGN(fit_size, ALIGN_SIZE); -+ fit_size = ALIGN_IMX(fit_size, ALIGN_SIZE); - - ret = lseek(fd, fit_offset + fit_size, SEEK_SET); - if (ret < 0) { -@@ -446,7 +448,7 @@ void build_image(int ofd) - * Aligned to 104KB = 92KB FW image + 0x8000 - * (IVT and alignment) + 0x4000 (second IVT + CSF) - */ -- file_off += ALIGN(sbuf.st_size, -+ file_off += ALIGN_IMX(sbuf.st_size, - HDMI_FW_SIZE + 0x2000 + 0x1000); - } - -@@ -479,7 +481,7 @@ void build_image(int ofd) - imx_header[IMAGE_IVT_ID].boot_data.start = - imx_header[IMAGE_IVT_ID].fhdr.self - ivt_offset; - imx_header[IMAGE_IVT_ID].boot_data.size = -- ALIGN(sbuf.st_size + sizeof(imx_header_v3_t) + ivt_offset, -+ ALIGN_IMX(sbuf.st_size + sizeof(imx_header_v3_t) + ivt_offset, - sector_size); - - image_off = header_image_off + sizeof(imx_header_v3_t); diff --git a/projects/NXP/devices/iMX8/patches/u-boot/0002-ARM-dts-imx8mq-evk-Remove-u-boot-off-on-delay-us-property.patch b/projects/NXP/devices/iMX8/patches/u-boot/0002-ARM-dts-imx8mq-evk-Remove-u-boot-off-on-delay-us-property.patch deleted file mode 100644 index 0877987b3c..0000000000 --- a/projects/NXP/devices/iMX8/patches/u-boot/0002-ARM-dts-imx8mq-evk-Remove-u-boot-off-on-delay-us-property.patch +++ /dev/null @@ -1,14 +0,0 @@ -diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi -index 44af66372712..2cfc12b7e0a4 100644 ---- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi -+++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi -@@ -1,9 +1,5 @@ - // SPDX-License-Identifier: (GPL-2.0 OR MIT) - --®_usdhc2_vmmc { -- u-boot,off-on-delay-us = <20000>; --}; -- - &usdhc1 { - mmc-hs400-1_8v; - }; diff --git a/projects/NXP/devices/iMX8/patches/u-boot/0003-imx8mq_evk-add-distro-boot-cmd-support.patch b/projects/NXP/devices/iMX8/patches/u-boot/0003-imx8mq_evk-add-distro-boot-cmd-support.patch deleted file mode 100644 index abc83a7599..0000000000 --- a/projects/NXP/devices/iMX8/patches/u-boot/0003-imx8mq_evk-add-distro-boot-cmd-support.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 4b5359b936e44421f9c5841feb39f6db8ae140f6 Mon Sep 17 00:00:00 2001 -From: Lukas Rusak -Date: Mon, 26 Oct 2020 16:33:12 -0700 -Subject: [PATCH 1/4] imx8mq_evk add distro boot cmd support - ---- - configs/imx8mq_evk_defconfig | 1 + - include/configs/imx8mq_evk.h | 86 ++++++------------------------------ - 2 files changed, 15 insertions(+), 72 deletions(-) - -diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig -index de91a76d41..bbcdb2d252 100644 ---- a/configs/imx8mq_evk_defconfig -+++ b/configs/imx8mq_evk_defconfig -@@ -60,3 +60,4 @@ CONFIG_DM_REGULATOR_GPIO=y - CONFIG_DM_RESET=y - CONFIG_MXC_UART=y - CONFIG_DM_THERMAL=y -+CONFIG_DISTRO_DEFAULTS=y -diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h -index 3f9a3bc100..62f670bb2a 100644 ---- a/include/configs/imx8mq_evk.h -+++ b/include/configs/imx8mq_evk.h -@@ -74,80 +74,22 @@ - #define IMX_FEC_BASE 0x30BE0000 - #endif - --#define CONFIG_MFG_ENV_SETTINGS \ -- "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ -- "rdinit=/linuxrc " \ -- "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ -- "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ -- "g_mass_storage.iSerialNumber=\"\" "\ -- "clk_ignore_unused "\ -- "\0" \ -- "initrd_addr=0x43800000\0" \ -- "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ --/* Initial environment variables */ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 1) \ -+ func(MMC, mmc, 0) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ -+#include -+ - #define CONFIG_EXTRA_ENV_SETTINGS \ -- CONFIG_MFG_ENV_SETTINGS \ -- "script=boot.scr\0" \ -- "image=Image\0" \ - "console=ttymxc0,115200\0" \ -- "fdt_addr=0x43000000\0" \ -- "boot_fdt=try\0" \ -- "fdt_file=imx8mq-evk.dtb\0" \ -- "initrd_addr=0x43800000\0" \ -- "bootm_size=0x10000000\0" \ -- "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ -- "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ -- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ -- "mmcautodetect=yes\0" \ -- "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ -- "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ -- "bootscript=echo Running bootscript from mmc ...; " \ -- "source\0" \ -- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ -- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ -- "mmcboot=echo Booting from mmc ...; " \ -- "run mmcargs; " \ -- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- "if run loadfdt; then " \ -- "booti ${loadaddr} - ${fdt_addr}; " \ -- "else " \ -- "echo WARN: Cannot load the DT; " \ -- "fi; " \ -- "else " \ -- "echo wait for boot; " \ -- "fi;\0" \ -- "netargs=setenv bootargs console=${console} " \ -- "root=/dev/nfs " \ -- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ -- "netboot=echo Booting from net ...; " \ -- "run netargs; " \ -- "if test ${ip_dyn} = yes; then " \ -- "setenv get_cmd dhcp; " \ -- "else " \ -- "setenv get_cmd tftp; " \ -- "fi; " \ -- "${get_cmd} ${loadaddr} ${image}; " \ -- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ -- "booti ${loadaddr} - ${fdt_addr}; " \ -- "else " \ -- "echo WARN: Cannot load the DT; " \ -- "fi; " \ -- "else " \ -- "booti; " \ -- "fi;\0" -- --#define CONFIG_BOOTCOMMAND \ -- "mmc dev ${mmcdev}; if mmc rescan; then " \ -- "if run loadbootscript; then " \ -- "run bootscript; " \ -- "else " \ -- "if run loadimage; then " \ -- "run mmcboot; " \ -- "else run netboot; " \ -- "fi; " \ -- "fi; " \ -- "else booti ${loadaddr} - ${fdt_addr}; fi" -+ "loadaddr=0x40480000\0" \ -+ "kernel_addr_r=0x40480000\0" \ -+ "fdt_addr_r=0x43000000\0" \ -+ "scriptaddr=0x50480000\0" \ -+ "pxefile_addr_r=0x50580000\0" \ -+ BOOTENV - - /* Link Definitions */ - #define CONFIG_LOADADDR 0x40480000 --- -2.29.2 -