Merge branch 'master' of github.com:OpenELEC/OpenELEC.tv

This commit is contained in:
Stephan Raue 2013-12-18 17:35:40 +01:00
commit 11bbaadcce
35 changed files with 428 additions and 2119 deletions

6
TODO
View File

@ -7,9 +7,3 @@ irserver:
buildsystem:
- always use fakeroot for converted packages
- built-in $PKG_DIR/unpack replacement
rework samba/ext drive sharing:
ref: issues/2427
- remove /media share
- implement auto-share-on-mount (now possible with udevil/udev/systemd)
- configurable in addon -> services -> samba -> autoshare new drives ?

View File

@ -19,7 +19,7 @@
################################################################################
PKG_NAME="libcec"
PKG_VERSION="2.1.3"
PKG_VERSION="2.1.4"
PKG_REV="1"
PKG_ARCH="any"
PKG_LICENSE="GPL"

View File

@ -1,6 +1,6 @@
diff -urN a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig
--- a/drivers/media/dvb-frontends/Kconfig 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/dvb-frontends/Kconfig 2013-05-03 17:03:57.000000000 +0800
--- a/drivers/media/dvb-frontends/Kconfig 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/dvb-frontends/Kconfig 2013-12-18 19:59:34.694846566 +0800
@@ -200,6 +200,20 @@
help
A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
@ -24,7 +24,7 @@ diff -urN a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kc
depends on DVB_CORE && I2C
diff -urN a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontends/m88dc2800.c
--- a/drivers/media/dvb-frontends/m88dc2800.c 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88dc2800.c 2013-01-26 16:03:21.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88dc2800.c 2013-12-18 19:59:39.354846514 +0800
@@ -0,0 +1,2124 @@
+/*
+ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage
@ -2152,8 +2152,8 @@ diff -urN a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontend
+MODULE_VERSION("1.00");
diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontends/m88dc2800.h
--- a/drivers/media/dvb-frontends/m88dc2800.h 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88dc2800.h 2013-01-26 14:57:32.000000000 +0800
@@ -0,0 +1,43 @@
+++ b/drivers/media/dvb-frontends/m88dc2800.h 2013-12-18 19:59:43.174846471 +0800
@@ -0,0 +1,44 @@
+/*
+ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage
+
@ -2178,6 +2178,7 @@ diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontend
+#ifndef M88DC2800_H
+#define M88DC2800_H
+
+#include <linux/kconfig.h>
+#include <linux/dvb/frontend.h>
+
+struct m88dc2800_config {
@ -2185,7 +2186,7 @@ diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontend
+ u8 ts_mode;
+};
+
+#if defined(CONFIG_DVB_M88DC2800) || (defined(CONFIG_DVB_M88DC2800_MODULE) && defined(MODULE))
+#if IS_ENABLED(CONFIG_DVB_M88DC2800)
+extern struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config,
+ struct i2c_adapter* i2c);
+#else
@ -2199,8 +2200,8 @@ diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontend
+#endif /* M88DC2800_H */
diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c
--- a/drivers/media/dvb-frontends/m88ds3103.c 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88ds3103.c 2013-01-30 12:33:47.000000000 +0800
@@ -0,0 +1,1710 @@
+++ b/drivers/media/dvb-frontends/m88ds3103.c 2013-12-18 19:59:46.950846428 +0800
@@ -0,0 +1,1707 @@
+/*
+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver
+
@ -3315,8 +3316,12 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontend
+ m88ds3103_writereg(state, 0x22, val1);
+ m88ds3103_writereg(state, 0x24, val2);
+
+ if(state->config->ci_mode)
+ if(state->config->ci_mode){
+ if(state->config->ci_mode == 2)
+ val1 = 0x43;
+ else
+ val1 = 0x03;
+ }
+ else if(state->config->ts_mode)
+ val1 = 0x06;
+ else
@ -3381,8 +3386,12 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontend
+ m88ds3103_writereg(state, 0x24, val2);
+ }
+
+ if(state->config->ci_mode)
+ if(state->config->ci_mode){
+ if(state->config->ci_mode == 2)
+ val1 = 0x43;
+ else
+ val1 = 0x03;
+ }
+ else if(state->config->ts_mode)
+ val1 = 0x06;
+ else
@ -3447,6 +3456,8 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontend
+ dprintk("symbol rate = %d\n", c->symbol_rate);
+ dprintk("delivery system = %d\n", c->delivery_system);
+
+ state->delivery_system = c->delivery_system;
+
+ realFreq = c->frequency;
+ lpf_offset_KHz = 0;
+ if(c->symbol_rate < 5000000){
@ -3705,19 +3716,6 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontend
+ msleep(20);
+ }
+
+ if((status & FE_HAS_LOCK) == 0){
+ state->delivery_system = (state->delivery_system == SYS_DVBS) ? SYS_DVBS2 : SYS_DVBS;
+ m88ds3103_demod_connect(fe, offset_khz);
+
+ for (i = 0; i < 30 ; i++) {
+ m88ds3103_read_status(fe, &status);
+ if (status & FE_HAS_LOCK){
+ break;
+ }
+ msleep(20);
+ }
+ }
+
+ if (status & FE_HAS_LOCK){
+ if(state->config->ci_mode == 2)
+ m88ds3103_set_clock_ratio(state);
@ -3913,7 +3911,7 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontend
+MODULE_LICENSE("GPL");
diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h
--- a/drivers/media/dvb-frontends/m88ds3103.h 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88ds3103.h 2013-01-30 12:33:51.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88ds3103.h 2013-12-18 20:00:00.866846272 +0800
@@ -0,0 +1,53 @@
+/*
+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver
@ -3936,6 +3934,7 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontend
+#ifndef M88DS3103_H
+#define M88DS3103_H
+
+#include <linux/kconfig.h>
+#include <linux/dvb/frontend.h>
+
+struct m88ds3103_config {
@ -3953,8 +3952,7 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontend
+ int (*set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage);
+};
+
+#if defined(CONFIG_DVB_M88DS3103) || \
+ (defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE))
+#if IS_ENABLED(CONFIG_DVB_M88DS3103)
+extern struct dvb_frontend *m88ds3103_attach(
+ const struct m88ds3103_config *config,
+ struct i2c_adapter *i2c);
@ -3970,7 +3968,7 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontend
+#endif /* M88DS3103_H */
diff -urN a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-frontends/m88ds3103_priv.h
--- a/drivers/media/dvb-frontends/m88ds3103_priv.h 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88ds3103_priv.h 2013-01-30 12:33:56.000000000 +0800
+++ b/drivers/media/dvb-frontends/m88ds3103_priv.h 2013-12-18 20:00:05.458846220 +0800
@@ -0,0 +1,403 @@
+/*
+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver
@ -4376,8 +4374,8 @@ diff -urN a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-fro
+
+#endif /* M88DS3103_PRIV_H */
diff -urN a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile
--- a/drivers/media/dvb-frontends/Makefile 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/dvb-frontends/Makefile 2013-05-03 17:04:31.000000000 +0800
--- a/drivers/media/dvb-frontends/Makefile 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/dvb-frontends/Makefile 2013-12-18 20:00:11.726846150 +0800
@@ -103,4 +103,5 @@
obj-$(CONFIG_DVB_RTL2832) += rtl2832.o
obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o
@ -4386,9 +4384,9 @@ diff -urN a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/M
+obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o
+obj-$(CONFIG_DVB_M88DC2800) += m88dc2800.o
diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c
--- a/drivers/media/pci/cx23885/cimax2.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cimax2.c 2013-03-31 22:03:29.000000000 +0800
@@ -415,7 +415,7 @@
--- a/drivers/media/pci/cx23885/cimax2.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cimax2.c 2013-12-18 20:01:45.986845090 +0800
@@ -426,7 +426,7 @@
return state->status;
}
@ -4397,7 +4395,7 @@ diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax
{
struct netup_ci_state *state;
u8 cimax_init[34] = {
@@ -464,6 +464,11 @@
@@ -475,6 +475,11 @@
goto err;
}
@ -4409,7 +4407,7 @@ diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax
port->port_priv = state;
switch (port->nr) {
@@ -537,3 +542,19 @@
@@ -548,3 +553,19 @@
dvb_ca_en50221_release(&state->ca);
kfree(state);
}
@ -4430,8 +4428,8 @@ diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax
+ return 1;
+}
diff -urN a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h
--- a/drivers/media/pci/cx23885/cimax2.h 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cimax2.h 2013-01-30 12:34:37.000000000 +0800
--- a/drivers/media/pci/cx23885/cimax2.h 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cimax2.h 2013-12-18 20:01:51.530845028 +0800
@@ -41,7 +41,9 @@
extern int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status);
extern int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
@ -4444,9 +4442,9 @@ diff -urN a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax
+
#endif
diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c
--- a/drivers/media/pci/cx23885/cx23885-cards.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-cards.c 2013-05-03 17:34:46.000000000 +0800
@@ -569,6 +569,34 @@
--- a/drivers/media/pci/cx23885/cx23885-cards.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-cards.c 2013-12-18 20:02:02.178844908 +0800
@@ -570,6 +570,34 @@
.name = "TeVii S471",
.portb = CX23885_MPEG_DVB,
},
@ -4481,16 +4479,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
[CX23885_BOARD_PROF_8000] = {
.name = "Prof Revolution DVB-S2 8000",
.portb = CX23885_MPEG_DVB,
@@ -605,7 +633,7 @@
CX25840_NONE1_CH3,
.amux = CX25840_AUDIO6,
} },
- }
+ }
};
const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
@@ -818,6 +846,30 @@
@@ -819,6 +847,30 @@
.subdevice = 0x9022,
.card = CX23885_BOARD_TEVII_S471,
}, {
@ -4521,16 +4510,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
.subvendor = 0x8000,
.subdevice = 0x3034,
.card = CX23885_BOARD_PROF_8000,
@@ -1224,7 +1276,7 @@
cx_set(GP0_IO, 0x00040004);
break;
case CX23885_BOARD_TBS_6920:
- case CX23885_BOARD_PROF_8000:
+ case CX23885_BOARD_PROF_8000:
cx_write(MC417_CTL, 0x00000036);
cx_write(MC417_OEN, 0x00001000);
cx_set(MC417_RWD, 0x00000002);
@@ -1394,9 +1446,84 @@
@@ -1395,9 +1447,84 @@
cx_set(GP0_IO, 0x00040004);
mdelay(60);
break;
@ -4615,7 +4595,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
int cx23885_ir_init(struct cx23885_dev *dev)
{
static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
@@ -1482,6 +1609,23 @@
@@ -1483,6 +1610,23 @@
v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
ir_rx_pin_cfg_count, ir_rx_pin_cfg);
break;
@ -4639,7 +4619,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
case CX23885_BOARD_HAUPPAUGE_HVR1250:
if (!enable_885_ir)
break;
@@ -1511,9 +1655,15 @@
@@ -1512,6 +1656,12 @@
cx23888_ir_remove(dev);
dev->sd_ir = NULL;
break;
@ -4651,12 +4631,8 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
+ case CX23885_BOARD_DVBSKY_T9580:
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
case CX23885_BOARD_TEVII_S470:
- case CX23885_BOARD_HAUPPAUGE_HVR1250:
+ case CX23885_BOARD_HAUPPAUGE_HVR1250:
case CX23885_BOARD_MYGICA_X8507:
cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
/* sd_ir is a duplicate pointer to the AV Core, just clear it */
@@ -1556,6 +1706,12 @@
case CX23885_BOARD_HAUPPAUGE_HVR1250:
@@ -1557,6 +1707,12 @@
if (dev->sd_ir)
cx23885_irq_add_enable(dev, PCI_MSK_IR);
break;
@ -4669,7 +4645,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
case CX23885_BOARD_TEVII_S470:
case CX23885_BOARD_HAUPPAUGE_HVR1250:
@@ -1657,6 +1813,10 @@
@@ -1658,6 +1814,10 @@
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
break;
@ -4680,7 +4656,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
case CX23885_BOARD_TEVII_S470:
case CX23885_BOARD_TEVII_S471:
case CX23885_BOARD_DVBWORLD_2005:
@@ -1694,6 +1854,22 @@
@@ -1696,6 +1856,22 @@
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
break;
@ -4703,7 +4679,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
case CX23885_BOARD_HAUPPAUGE_HVR1250:
case CX23885_BOARD_HAUPPAUGE_HVR1500:
case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
@@ -1749,6 +1925,12 @@
@@ -1751,6 +1927,12 @@
case CX23885_BOARD_MPX885:
case CX23885_BOARD_MYGICA_X8507:
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
@ -4717,8 +4693,8 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx2388
dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
&dev->i2c_bus[2].i2c_adap,
diff -urN a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c
--- a/drivers/media/pci/cx23885/cx23885-core.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-core.c 2013-05-03 17:36:31.000000000 +0800
--- a/drivers/media/pci/cx23885/cx23885-core.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-core.c 2013-12-18 20:02:07.086844853 +0800
@@ -1909,6 +1909,10 @@
(pci_status & PCI_MSK_GPIO0))
handled += altera_ci_irq(dev);
@ -4730,7 +4706,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885
if (ts1_status) {
if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
handled += cx23885_irq_ts(ts1, ts1_status);
@@ -2144,6 +2148,8 @@
@@ -2141,6 +2145,8 @@
cx23885_irq_add_enable(dev, PCI_MSK_GPIO1 | PCI_MSK_GPIO0);
break;
case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
@ -4740,8 +4716,8 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885
break;
}
diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c
--- a/drivers/media/pci/cx23885/cx23885-dvb.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-dvb.c 2013-05-03 17:38:34.000000000 +0800
--- a/drivers/media/pci/cx23885/cx23885-dvb.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-dvb.c 2013-12-18 20:02:12.338844794 +0800
@@ -51,6 +51,8 @@
#include "stv6110.h"
#include "lnbh24.h"
@ -4751,49 +4727,15 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
#include "cimax2.h"
#include "lgs8gxx.h"
#include "netup-eeprom.h"
@@ -64,8 +66,8 @@
#include "stv0367.h"
#include "drxk.h"
#include "mt2063.h"
-#include "stv090x.h"
-#include "stb6100.h"
+#include "stv090x.h"
+#include "stb6100.h"
#include "stb6100_cfg.h"
#include "tda10071.h"
#include "a8293.h"
@@ -500,42 +502,130 @@
.if_khz = 5380,
@@ -502,6 +504,93 @@
.if_khz = 4000,
};
-static struct stv090x_config prof_8000_stv090x_config = {
- .device = STV0903,
- .demod_mode = STV090x_SINGLE,
- .clk_mode = STV090x_CLK_EXT,
- .xtal = 27000000,
- .address = 0x6A,
- .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
- .repeater_level = STV090x_RPTLEVEL_64,
- .adc1_range = STV090x_ADC_2Vpp,
- .diseqc_envelope_mode = false,
-
- .tuner_get_frequency = stb6100_get_frequency,
- .tuner_set_frequency = stb6100_set_frequency,
- .tuner_set_bandwidth = stb6100_set_bandwidth,
- .tuner_get_bandwidth = stb6100_get_bandwidth,
-};
-static struct stb6100_config prof_8000_stb6100_config = {
- .tuner_address = 0x60,
- .refclock = 27000000,
-};
-
-static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
+/* bst control */
+int bst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
{
struct cx23885_tsport *port = fe->dvb->priv;
struct cx23885_dev *dev = port->dev;
+{
+ struct cx23885_tsport *port = fe->dvb->priv;
+ struct cx23885_dev *dev = port->dev;
+
+ cx23885_gpio_enable(dev, GPIO_1, 1);
+ cx23885_gpio_enable(dev, GPIO_0, 1);
@ -4814,13 +4756,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
+ }
+ return 0;
+}
- if (voltage == SEC_VOLTAGE_18)
- cx_write(MC417_RWD, 0x00001e00);
- else if (voltage == SEC_VOLTAGE_13)
- cx_write(MC417_RWD, 0x00001a00);
- else
- cx_write(MC417_RWD, 0x00001800);
+
+int dvbsky_set_voltage_sec(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
+{
+ struct cx23885_tsport *port = fe->dvb->priv;
@ -4843,9 +4779,9 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
+ cx23885_gpio_clear(dev, GPIO_12);
+ break;
+ }
return 0;
}
+ return 0;
+}
+
+/* bestunar single dvb-s2 */
+static struct m88ds3103_config bst_ds3103_config = {
+ .demod_address = 0x68,
@ -4882,51 +4818,13 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
+ .ts_mode = 3,
+};
+
+static struct stv090x_config prof_8000_stv090x_config = {
+ .device = STV0903,
+ .demod_mode = STV090x_SINGLE,
+ .clk_mode = STV090x_CLK_EXT,
+ .xtal = 27000000,
+ .address = 0x6A,
+ .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
+ .repeater_level = STV090x_RPTLEVEL_64,
+ .adc1_range = STV090x_ADC_2Vpp,
+ .diseqc_envelope_mode = false,
+
+ .tuner_get_frequency = stb6100_get_frequency,
+ .tuner_set_frequency = stb6100_set_frequency,
+ .tuner_set_bandwidth = stb6100_set_bandwidth,
+ .tuner_get_bandwidth = stb6100_get_bandwidth,
+};
+
+static struct stb6100_config prof_8000_stb6100_config = {
+ .tuner_address = 0x60,
+ .refclock = 27000000,
+};
+
+static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
+{
+ struct cx23885_tsport *port = fe->dvb->priv;
+ struct cx23885_dev *dev = port->dev;
+
+ if (voltage == SEC_VOLTAGE_18)
+ cx_write(MC417_RWD, 0x00001e00);
+ else if (voltage == SEC_VOLTAGE_13)
+ cx_write(MC417_RWD, 0x00001a00);
+ else
+ cx_write(MC417_RWD, 0x00001800);
+ return 0;
+}
+
static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
@@ -1250,23 +1340,79 @@
&tevii_ds3000_config,
&i2c_bus->i2c_adap);
static struct stv090x_config prof_8000_stv090x_config = {
.device = STV0903,
.demod_mode = STV090x_SINGLE,
@@ -1287,6 +1376,57 @@
&tevii_ts2020_config, &i2c_bus->i2c_adap);
}
break;
- case CX23885_BOARD_PROF_8000:
- i2c_bus = &dev->i2c_bus[0];
+ case CX23885_BOARD_BST_PS8512:
+ case CX23885_BOARD_DVBSKY_S950:
+ i2c_bus = &dev->i2c_bus[1];
@ -4934,7 +4832,6 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
+ &bst_ds3103_config,
+ &i2c_bus->i2c_adap);
+ break;
+
+ case CX23885_BOARD_DVBSKY_S952:
+ switch (port->nr) {
+ /* port B */
@ -4953,32 +4850,18 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
+ break;
+ }
+ break;
- fe0->dvb.frontend = dvb_attach(stv090x_attach,
- &prof_8000_stv090x_config,
- &i2c_bus->i2c_adap,
- STV090x_DEMODULATOR_0);
- if (fe0->dvb.frontend != NULL) {
- if (!dvb_attach(stb6100_attach,
- fe0->dvb.frontend,
- &prof_8000_stb6100_config,
- &i2c_bus->i2c_adap))
- goto frontend_detach;
+ case CX23885_BOARD_DVBSKY_S950_CI:
+ i2c_bus = &dev->i2c_bus[1];
+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
+ &dvbsky_ds3103_ci_config,
+ &i2c_bus->i2c_adap);
+ break;
+
+ case CX23885_BOARD_DVBSKY_C2800E_CI:
+ i2c_bus = &dev->i2c_bus[1];
+ fe0->dvb.frontend = dvb_attach(m88dc2800_attach,
+ &dvbsky_dc2800_config,
+ &i2c_bus->i2c_adap);
+ break;
- fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
+ case CX23885_BOARD_DVBSKY_T9580:
+ switch (port->nr) {
+ /* port B */
@ -4991,30 +4874,12 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
+ /* port C */
+ case 2:
+ break;
}
break;
+
+ case CX23885_BOARD_PROF_8000:
+ i2c_bus = &dev->i2c_bus[0];
+
+ fe0->dvb.frontend = dvb_attach(stv090x_attach,
+ &prof_8000_stv090x_config,
+ &i2c_bus->i2c_adap,
+ STV090x_DEMODULATOR_0);
+ if (fe0->dvb.frontend != NULL) {
+ if (!dvb_attach(stb6100_attach,
+ fe0->dvb.frontend,
+ &prof_8000_stb6100_config,
+ &i2c_bus->i2c_adap))
+ goto frontend_detach;
+
+ fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
+ }
+ break;
case CX23885_BOARD_HAUPPAUGE_HVR4400:
case CX23885_BOARD_PROF_8000:
i2c_bus = &dev->i2c_bus[0];
fe0->dvb.frontend = dvb_attach(tda10071_attach,
@@ -1325,7 +1471,7 @@
@@ -1362,7 +1502,7 @@
printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
port->nr, port->frontends.adapter.proposed_mac);
@ -5023,7 +4888,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
break;
}
case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
@@ -1352,6 +1498,41 @@
@@ -1389,6 +1529,41 @@
memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
break;
}
@ -5065,7 +4930,7 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
}
return ret;
@@ -1434,6 +1615,8 @@
@@ -1471,6 +1646,8 @@
switch (port->dev->board) {
case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
@ -5075,8 +4940,8 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/
break;
case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
diff -urN a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h
--- a/drivers/media/pci/cx23885/cx23885.h 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885.h 2013-05-03 17:14:20.000000000 +0800
--- a/drivers/media/pci/cx23885/cx23885.h 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885.h 2013-12-18 20:01:57.070844966 +0800
@@ -94,6 +94,14 @@
#define CX23885_BOARD_HAUPPAUGE_HVR4400 38
#define CX23885_BOARD_AVERMEDIA_HC81R 39
@ -5102,8 +4967,8 @@ diff -urN a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23
u32 force_bff;
};
diff -urN a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c
--- a/drivers/media/pci/cx23885/cx23885-input.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-input.c 2013-05-03 17:42:09.000000000 +0800
--- a/drivers/media/pci/cx23885/cx23885-input.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/cx23885-input.c 2013-12-18 20:02:22.262844683 +0800
@@ -89,6 +89,12 @@
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
case CX23885_BOARD_TEVII_S470:
@ -5150,8 +5015,8 @@ diff -urN a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx2388
/* Integrated CX23885 IR controller */
driver_type = RC_DRIVER_IR_RAW;
diff -urN a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig
--- a/drivers/media/pci/cx23885/Kconfig 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx23885/Kconfig 2013-05-03 17:43:05.000000000 +0800
--- a/drivers/media/pci/cx23885/Kconfig 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx23885/Kconfig 2013-12-18 20:02:27.162844628 +0800
@@ -23,6 +23,8 @@
select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT
@ -5162,9 +5027,9 @@ diff -urN a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfi
select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT
select DVB_TS2020 if MEDIA_SUBDRV_AUTOSELECT
diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c
--- a/drivers/media/pci/cx88/cx88-cards.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88-cards.c 2013-05-03 17:06:55.000000000 +0800
@@ -2309,6 +2309,18 @@
--- a/drivers/media/pci/cx88/cx88-cards.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88-cards.c 2013-12-18 20:01:17.934845406 +0800
@@ -2314,6 +2314,18 @@
} },
.mpeg = CX88_MPEG_DVB,
},
@ -5183,7 +5048,7 @@ diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-ca
};
/* ------------------------------------------------------------------ */
@@ -2813,6 +2825,10 @@
@@ -2818,6 +2830,10 @@
.subvendor = 0x1822,
.subdevice = 0x0023,
.card = CX88_BOARD_TWINHAN_VP1027_DVBS,
@ -5194,7 +5059,7 @@ diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-ca
},
};
@@ -3547,6 +3563,12 @@
@@ -3551,6 +3567,12 @@
cx_write(MO_SRST_IO, 1);
msleep(100);
break;
@ -5208,8 +5073,8 @@ diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-ca
diff -urN a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.c
--- a/drivers/media/pci/cx88/cx88-dvb.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88-dvb.c 2013-05-03 17:09:09.000000000 +0800
--- a/drivers/media/pci/cx88/cx88-dvb.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88-dvb.c 2013-12-18 20:01:23.110845347 +0800
@@ -54,6 +54,7 @@
#include "stv0288.h"
#include "stb6000.h"
@ -5287,12 +5152,10 @@ diff -urN a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.
static const struct stv0900_config prof_7301_stv0900_config = {
.demod_address = 0x6a,
/* demod_mode = 0,*/
@@ -1477,6 +1533,35 @@
&tevii_ts2020_config, &core->i2c_adap);
fe0->dvb.frontend->ops.set_voltage =
@@ -1487,6 +1543,35 @@
tevii_dvbs_set_voltage;
+ }
+ break;
}
break;
+ case CX88_BOARD_BST_PS8312:
+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
+ &dvbsky_ds3103_config,
@ -5320,13 +5183,15 @@ diff -urN a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.
+ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage_v2;
+ else
+ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage;
}
break;
+ }
+ break;
case CX88_BOARD_OMICOM_SS4_PCI:
case CX88_BOARD_TBS_8920:
case CX88_BOARD_PROF_7300:
diff -urN a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h
--- a/drivers/media/pci/cx88/cx88.h 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88.h 2013-05-03 17:05:57.000000000 +0800
@@ -238,6 +238,7 @@
--- a/drivers/media/pci/cx88/cx88.h 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88.h 2013-12-18 20:01:11.974845473 +0800
@@ -237,6 +237,7 @@
#define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
@ -5335,8 +5200,8 @@ diff -urN a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h
enum cx88_itype {
CX88_VMUX_COMPOSITE1 = 1,
diff -urN a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c
--- a/drivers/media/pci/cx88/cx88-input.c 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88-input.c 2013-01-26 14:52:03.000000000 +0800
--- a/drivers/media/pci/cx88/cx88-input.c 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx88/cx88-input.c 2013-12-18 20:01:28.158845291 +0800
@@ -419,6 +419,10 @@
rc_type = RC_BIT_NEC;
ir->sampling = 0xff00; /* address */
@ -5349,8 +5214,8 @@ diff -urN a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-in
if (!ir_codes) {
diff -urN a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig
--- a/drivers/media/pci/cx88/Kconfig 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/pci/cx88/Kconfig 2013-05-03 17:10:41.000000000 +0800
--- a/drivers/media/pci/cx88/Kconfig 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/pci/cx88/Kconfig 2013-12-18 20:01:33.034845236 +0800
@@ -57,6 +57,7 @@
select DVB_ISL6421 if MEDIA_SUBDRV_AUTOSELECT
select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT
@ -5360,9 +5225,9 @@ diff -urN a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig
select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT
diff -urN a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
--- a/drivers/media/rc/keymaps/Makefile 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/rc/keymaps/Makefile 2013-05-03 17:43:41.000000000 +0800
@@ -27,6 +27,7 @@
--- a/drivers/media/rc/keymaps/Makefile 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/rc/keymaps/Makefile 2013-12-18 20:02:46.202844414 +0800
@@ -28,6 +28,7 @@
rc-dm1105-nec.o \
rc-dntv-live-dvb-t.o \
rc-dntv-live-dvbt-pro.o \
@ -5372,7 +5237,7 @@ diff -urN a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefil
rc-encore-enltv.o \
diff -urN a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c
--- a/drivers/media/rc/keymaps/rc-dvbsky.c 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/rc/keymaps/rc-dvbsky.c 2013-01-26 14:52:49.000000000 +0800
+++ b/drivers/media/rc/keymaps/rc-dvbsky.c 2013-12-18 20:02:49.870844372 +0800
@@ -0,0 +1,78 @@
+/* rc-dvbsky.c - Keytable for Dvbsky Remote Controllers
+ *
@ -5454,8 +5319,8 @@ diff -urN a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-d
+MODULE_AUTHOR("Nibble Max <nibble.max@gmail.com>");
diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2/dvbsky.c
--- a/drivers/media/usb/dvb-usb-v2/dvbsky.c 1970-01-01 08:00:00.000000000 +0800
+++ b/drivers/media/usb/dvb-usb-v2/dvbsky.c 2013-05-03 17:47:38.000000000 +0800
@@ -0,0 +1,665 @@
+++ b/drivers/media/usb/dvb-usb-v2/dvbsky.c 2013-12-18 20:03:15.374844086 +0800
@@ -0,0 +1,741 @@
+/*
+ * Driver for DVBSky USB2.0 receiver
+ *
@ -5969,6 +5834,18 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2
+ return dvbsky_gpio_ctrl(d, 0x80, value);
+}
+
+static int dvbsky_usb_ci_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
+{
+ struct dvb_usb_device *d = fe_to_d(fe);
+ u8 value;
+
+ if (voltage == SEC_VOLTAGE_OFF)
+ value = 0;
+ else
+ value = 1;
+ return dvbsky_gpio_ctrl(d, 0x00, value);
+}
+
+static int dvbsky_read_mac_addr(struct dvb_usb_adapter *adap, u8 mac[6])
+{
+ struct dvb_usb_device *d = adap_to_d(adap);
@ -6034,6 +5911,43 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2
+ return ret;
+}
+
+static struct m88ds3103_config dvbsky_usb_ds3103_ci_config = {
+ .demod_address = 0x68,
+ .ci_mode = 2,
+ .pin_ctrl = 0x82,
+ .ts_mode = 0,
+ .start_ctrl = dvbsky_sync_ctrl,
+ .set_voltage = dvbsky_usb_ci_set_voltage,
+};
+
+static int dvbsky_s960c_attach(struct dvb_usb_adapter *adap)
+{
+ struct dvbsky_state *state = adap_to_priv(adap);
+ struct dvb_usb_device *d = adap_to_d(adap);
+ int ret = 0;
+
+ dprintk("%s, build on %s %s()\n", __func__, __DATE__,__TIME__);
+
+ dvbsky_gpio_ctrl(d, 0x04, 1);
+
+ dvbsky_gpio_ctrl(d, 0x83, 0);
+ msleep(50);
+ dvbsky_gpio_ctrl(d, 0x83, 1);
+ msleep(20);
+
+ adap->fe[0] = dvb_attach(m88ds3103_attach,
+ &dvbsky_usb_ds3103_ci_config,
+ &d->i2c_adap);
+ if (!adap->fe[0]) {
+ printk(KERN_ERR "dvbsky_s960c_attach fail.");
+ ret = -ENODEV;
+ }
+
+ state->has_ci = 1;
+
+ return ret;
+}
+
+static int dvbsky_identify_state(struct dvb_usb_device *d, const char **name)
+{
+ return WARM;
@ -6071,6 +5985,31 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2
+}
+
+/* DVB USB Driver stuff */
+static struct dvb_usb_device_properties dvbsky_s960c_props = {
+ .driver_name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
+ .adapter_nr = adapter_nr,
+ .size_of_priv = sizeof(struct dvbsky_state),
+
+ .generic_bulk_ctrl_endpoint = 0x01,
+ .generic_bulk_ctrl_endpoint_response = 0x81,
+
+ .i2c_algo = &dvbsky_i2c_algo,
+ .frontend_attach = dvbsky_s960c_attach,
+ .init = dvbsky_init,
+ .get_rc_config = dvbsky_get_rc_config,
+ .streaming_ctrl = dvbsky_streaming_ctrl,
+ .identify_state = dvbsky_identify_state,
+ .exit = dvbsky_exit,
+
+ .num_adapters = 1,
+ .adapter = {
+ {
+ .stream = DVB_USB_STREAM_BULK(0x82, 8, 4096),
+ }
+ }
+};
+
+static struct dvb_usb_device_properties dvbsky_s960_props = {
+ .driver_name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
@ -6098,6 +6037,8 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2
+};
+
+static const struct usb_device_id dvbsky_id_table[] = {
+ { DVB_USB_DEVICE(0x0572, 0x960c,
+ &dvbsky_s960c_props, "DVBSky S960CI", RC_MAP_DVBSKY) },
+ { DVB_USB_DEVICE(0x0572, 0x6831,
+ &dvbsky_s960_props, "DVBSky S960/S860", RC_MAP_DVBSKY) },
+ { }
@ -6122,9 +6063,9 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2
+MODULE_DESCRIPTION("Driver for DVBSky USB2.0");
+MODULE_LICENSE("GPL");
diff -urN a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/Kconfig
--- a/drivers/media/usb/dvb-usb-v2/Kconfig 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/usb/dvb-usb-v2/Kconfig 2013-05-03 17:45:35.000000000 +0800
@@ -149,3 +149,10 @@
--- a/drivers/media/usb/dvb-usb-v2/Kconfig 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/usb/dvb-usb-v2/Kconfig 2013-12-18 20:03:20.618844027 +0800
@@ -147,3 +147,9 @@
help
Say Y here to support the Realtek RTL28xxU DVB USB receiver.
@ -6134,11 +6075,10 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/
+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT
+ help
+ Say Y here to support the USB receivers from DVBSky.
+
diff -urN a/drivers/media/usb/dvb-usb-v2/Makefile b/drivers/media/usb/dvb-usb-v2/Makefile
--- a/drivers/media/usb/dvb-usb-v2/Makefile 2013-04-29 08:36:01.000000000 +0800
+++ b/drivers/media/usb/dvb-usb-v2/Makefile 2013-02-17 12:03:00.000000000 +0800
@@ -43,6 +43,9 @@
--- a/drivers/media/usb/dvb-usb-v2/Makefile 2013-12-12 14:38:07.000000000 +0800
+++ b/drivers/media/usb/dvb-usb-v2/Makefile 2013-12-18 20:03:26.218843964 +0800
@@ -40,6 +40,9 @@
dvb-usb-rtl28xxu-objs := rtl28xxu.o
obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o
@ -6149,9 +6089,9 @@ diff -urN a/drivers/media/usb/dvb-usb-v2/Makefile b/drivers/media/usb/dvb-usb-v2
ccflags-y += -I$(srctree)/drivers/media/dvb-frontends
ccflags-y += -I$(srctree)/drivers/media/tuners
diff -urN a/include/media/rc-map.h b/include/media/rc-map.h
--- a/include/media/rc-map.h 2013-04-29 08:36:01.000000000 +0800
+++ b/include/media/rc-map.h 2013-05-03 17:02:46.000000000 +0800
@@ -118,6 +118,7 @@
--- a/include/media/rc-map.h 2013-12-12 14:38:07.000000000 +0800
+++ b/include/media/rc-map.h 2013-12-18 19:59:03.122846921 +0800
@@ -119,6 +119,7 @@
#define RC_MAP_DM1105_NEC "rc-dm1105-nec"
#define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro"
#define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t"

View File

@ -1,31 +0,0 @@
diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c
index 315809d..54dff7c 100644
--- a/drivers/media/dvb-frontends/m88ds3103.c
+++ b/drivers/media/dvb-frontends/m88ds3103.c
@@ -1244,6 +1244,8 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
dprintk("symbol rate = %d\n", c->symbol_rate);
dprintk("delivery system = %d\n", c->delivery_system);
+ state->delivery_system = c->delivery_system;
+
realFreq = c->frequency;
lpf_offset_KHz = 0;
if(c->symbol_rate < 5000000){
@@ -1501,7 +1503,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
}
msleep(20);
}
-
+/*
if((status & FE_HAS_LOCK) == 0){
state->delivery_system = (state->delivery_system == SYS_DVBS) ? SYS_DVBS2 : SYS_DVBS;
m88ds3103_demod_connect(fe, offset_khz);
@@ -1514,7 +1516,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
msleep(20);
}
}
-
+*/
if (status & FE_HAS_LOCK){
if(state->config->ci_mode == 2)
m88ds3103_set_clock_ratio(state);

View File

@ -19,7 +19,7 @@
################################################################################
PKG_NAME="service.openelec.settings"
PKG_VERSION="0.3.7"
PKG_VERSION="0.3.8"
PKG_REV="1"
PKG_ARCH="any"
PKG_LICENSE="prop."

View File

@ -19,7 +19,7 @@
################################################################################
PKG_NAME="xbmc-theme-Confluence"
PKG_VERSION="13.alpha-0d22ffb"
PKG_VERSION="13.alpha-ee5f905"
PKG_REV="1"
PKG_ARCH="any"
PKG_LICENSE="GPL"

View File

@ -19,7 +19,7 @@
################################################################################
PKG_NAME="xbmc"
PKG_VERSION="13.alpha-0d22ffb"
PKG_VERSION="13.alpha-ee5f905"
PKG_REV="1"
PKG_ARCH="any"
PKG_LICENSE="GPL"

View File

@ -9,8 +9,9 @@ ConditionPathExists=/storage/.cache/openelec/network_wait
Type=oneshot
EnvironmentFile=/storage/.cache/openelec/network_wait
ExecStartPre=/bin/sh -c 'echo "waiting on Network to come online ... (max. $WAIT_NETWORK_TIME sec.)"
ExecStart=/usr/bin/cm-online --timeout=${WAIT_NETWORK_TIME}
ExecStart=/usr/bin/cm-online ${WAIT_NETWORK_TIME}
StandardOutput=tty
RemainAfterExit=yes
[Install]
WantedBy=xbmc.service

View File

@ -0,0 +1,29 @@
From f65afef1df49f53e14c8d4173ff960fff8d44ecb Mon Sep 17 00:00:00 2001
From: Rainer Hochecker <fernetmenta@online.de>
Date: Tue, 3 Dec 2013 10:03:04 +0100
Subject: [PATCH] mpegts: do not set pts for missing dts in video streams
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
---
libavformat/mpegts.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/libavformat/mpegts.c b/libavformat/mpegts.c
index 59b0058..d67c63a 100644
--- a/libavformat/mpegts.c
+++ b/libavformat/mpegts.c
@@ -972,7 +972,10 @@ static int mpegts_push_data(MpegTSFilter *filter,
pes->pts = AV_NOPTS_VALUE;
pes->dts = AV_NOPTS_VALUE;
if ((flags & 0xc0) == 0x80) {
- pes->dts = pes->pts = ff_parse_pes_pts(r);
+ pes->pts = ff_parse_pes_pts(r);
+ /* video pts is not monotonic, can't be used for dts */
+ if (pes->st->codec->codec_type != AVMEDIA_TYPE_VIDEO)
+ pes->dts = pes->pts;
r += 5;
} else if ((flags & 0xc0) == 0xc0) {
pes->pts = ff_parse_pes_pts(r);
--
1.8.5-rc3

View File

@ -0,0 +1,135 @@
From 120e44f817d73572d14a3db4af24a3d517aaacd8 Mon Sep 17 00:00:00 2001
From: Joakim Plate <elupus@ecce.se>
Date: Sat, 14 Dec 2013 14:55:13 +0100
Subject: [PATCH 1/1] mpegts: stop analyzing when pmt for all programs have
been found
This disables NOHEADER after finding PMT for all programs to
avoid find_stream_info always exhausting probe size for mpegts.
This is very important for live streams since read speed
will be limited. rtsp, udp and any protocol streaming a live
mpegts will have dramatically faster startup time.
Note, lack of codec parameters for streams can still cause
the full probe size to be exhausted.
---
libavformat/mpegts.c | 54 +++++++++++++++++++++++++++++++++++++++++++---------
1 file changed, 45 insertions(+), 9 deletions(-)
diff --git a/libavformat/mpegts.c b/libavformat/mpegts.c
index d67c63a..fa92fb7 100644
--- a/libavformat/mpegts.c
+++ b/libavformat/mpegts.c
@@ -90,6 +90,9 @@ struct Program {
unsigned int id; //program id/service id
unsigned int nb_pids;
unsigned int pids[MAX_PIDS_PER_PROGRAM];
+
+ /** have we found pmt for this program */
+ int pmt_found;
};
struct MpegTSContext {
@@ -205,6 +208,17 @@ typedef struct PESContext {
extern AVInputFormat ff_mpegts_demuxer;
+static struct Program * get_program(MpegTSContext *ts, unsigned int programid)
+{
+ int i;
+ for(i=0; i<ts->nb_prg; i++) {
+ if(ts->prg[i].id == programid) {
+ return &ts->prg[i];
+ }
+ }
+ return NULL;
+}
+
static void clear_avprogram(MpegTSContext *ts, unsigned int programid)
{
AVProgram *prg = NULL;
@@ -225,8 +239,10 @@ static void clear_program(MpegTSContext *ts, unsigned int programid)
clear_avprogram(ts, programid);
for(i=0; i<ts->nb_prg; i++)
- if(ts->prg[i].id == programid)
+ if(ts->prg[i].id == programid) {
ts->prg[i].nb_pids = 0;
+ ts->prg[i].pmt_found = 0;
+ }
}
static void clear_programs(MpegTSContext *ts)
@@ -245,19 +261,13 @@ static void add_pat_entry(MpegTSContext *ts, unsigned int programid)
p = &ts->prg[ts->nb_prg];
p->id = programid;
p->nb_pids = 0;
+ p->pmt_found = 0;
ts->nb_prg++;
}
static void add_pid_to_pmt(MpegTSContext *ts, unsigned int programid, unsigned int pid)
{
- int i;
- struct Program *p = NULL;
- for(i=0; i<ts->nb_prg; i++) {
- if(ts->prg[i].id == programid) {
- p = &ts->prg[i];
- break;
- }
- }
+ struct Program *p = get_program(ts, programid);
if(!p)
return;
@@ -266,6 +276,15 @@ static void add_pid_to_pmt(MpegTSContext *ts, unsigned int programid, unsigned i
p->pids[p->nb_pids++] = pid;
}
+static void set_pmt_found(MpegTSContext *ts, unsigned int programid)
+{
+ struct Program *p = get_program(ts, programid);
+ if(!p)
+ return;
+
+ p->pmt_found = 1;
+}
+
static void set_pcr_pid(AVFormatContext *s, unsigned int programid, unsigned int pid)
{
int i;
@@ -1590,6 +1609,8 @@ static void pmt_cb(MpegTSFilter *filter, const uint8_t *section, int section_len
if (!ts->stream->nb_streams)
ts->stop_parse = 2;
+ set_pmt_found(ts, h->id);
+
for(;;) {
st = 0;
pes = NULL;
@@ -1912,6 +1933,21 @@ static int handle_packet(MpegTSContext *ts, const uint8_t *packet)
p, p_end - p, 0);
}
}
+
+ // stop find_stream_info from waiting for more streams
+ // when all programs have received a PMT
+ if( ts->stream->ctx_flags & AVFMTCTX_NOHEADER) {
+ int i;
+ for(i=0; i<ts->nb_prg; i++) {
+ if (!ts->prg[i].pmt_found)
+ break;
+ }
+ if (i == ts->nb_prg && ts->nb_prg > 0) {
+ av_log(ts->stream, AV_LOG_DEBUG, "All programs have pmt, headers found\n");
+ ts->stream->ctx_flags &= ~AVFMTCTX_NOHEADER;
+ }
+ }
+
} else {
int ret;
int64_t pcr = -1;
--
1.8.2

View File

@ -19,7 +19,7 @@
################################################################################
PKG_NAME="libva-driver-intel"
PKG_VERSION="1.2.1"
PKG_VERSION="1.2.2"
PKG_REV="1"
PKG_ARCH="i386 x86_64"
PKG_LICENSE="GPL"

View File

@ -1,659 +0,0 @@
From f81d7beb3f0a849851f232ad5fc1404b4a0c5802 Mon Sep 17 00:00:00 2001
From: "Xiang, Haihao" <haihao.xiang@intel.com>
Date: Thu, 26 Sep 2013 11:02:09 +0800
Subject: [PATCH 1/5] render: add support for
brightness/contrast/hue/saturation
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
src/i965_drv_video.c | 35 +++++++++-
src/i965_drv_video.h | 9 +++
src/i965_render.c | 33 +++++++++-
src/shaders/render/Makefile.am | 17 ++++-
src/shaders/render/exa_wm.g4i | 19 ++++++
src/shaders/render/exa_wm_yuv_color_balance.g4a | 38 +++++++++++
src/shaders/render/exa_wm_yuv_color_balance.g4b | 15 +++++
.../render/exa_wm_yuv_color_balance.g4b.gen5 | 15 +++++
src/shaders/render/exa_wm_yuv_color_balance.g6a | 38 +++++++++++
src/shaders/render/exa_wm_yuv_color_balance.g6b | 15 +++++
src/shaders/render/exa_wm_yuv_color_balance.g7a | 38 +++++++++++
src/shaders/render/exa_wm_yuv_color_balance.g7b | 15 +++++
.../render/exa_wm_yuv_color_balance.g7b.haswell | 15 +++++
src/shaders/render/exa_wm_yuv_color_balance.gxa | 75 ++++++++++++++++++++++
14 files changed, 371 insertions(+), 6 deletions(-)
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g4a
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g4b
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g6a
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g6b
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g7a
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g7b
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell
create mode 100644 src/shaders/render/exa_wm_yuv_color_balance.gxa
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index 31dafa2..6ed07f1 100755
--- a/src/i965_drv_video.c
+++ b/src/i965_drv_video.c
@@ -97,6 +97,30 @@ enum {
/* List of supported display attributes */
static const VADisplayAttribute i965_display_attributes[] = {
{
+ VADisplayAttribBrightness,
+ -100, 100, DEFAULT_BRIGHTNESS,
+ VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE
+ },
+
+ {
+ VADisplayAttribContrast,
+ 0, 100, DEFAULT_CONTRAST,
+ VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE
+ },
+
+ {
+ VADisplayAttribHue,
+ -180, 180, DEFAULT_HUE,
+ VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE
+ },
+
+ {
+ VADisplayAttribSaturation,
+ 0, 100, DEFAULT_SATURATION,
+ VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE
+ },
+
+ {
VADisplayAttribRotation,
0, 3, VA_ROTATION_NONE,
VA_DISPLAY_ATTRIB_GETTABLE|VA_DISPLAY_ATTRIB_SETTABLE
@@ -2410,7 +2434,16 @@ i965_display_attributes_init(VADriverContextP ctx)
);
i965->rotation_attrib = get_display_attribute(ctx, VADisplayAttribRotation);
- if (!i965->rotation_attrib) {
+ i965->brightness_attrib = get_display_attribute(ctx, VADisplayAttribBrightness);
+ i965->contrast_attrib = get_display_attribute(ctx, VADisplayAttribContrast);
+ i965->hue_attrib = get_display_attribute(ctx, VADisplayAttribHue);
+ i965->saturation_attrib = get_display_attribute(ctx, VADisplayAttribSaturation);
+
+ if (!i965->rotation_attrib ||
+ !i965->brightness_attrib ||
+ !i965->contrast_attrib ||
+ !i965->hue_attrib ||
+ !i965->saturation_attrib) {
goto error;
}
return true;
diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h
index a0e7790..3b06ac0 100644
--- a/src/i965_drv_video.h
+++ b/src/i965_drv_video.h
@@ -59,6 +59,11 @@
#define I965_SURFACE_FLAG_TOP_FIELD_FIRST 0x00000001
#define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST 0x00000002
+#define DEFAULT_BRIGHTNESS 0
+#define DEFAULT_CONTRAST 10
+#define DEFAULT_HUE 0
+#define DEFAULT_SATURATION 10
+
struct i965_surface
{
struct object_base *base;
@@ -321,6 +326,10 @@ struct i965_driver_data
VADisplayAttribute *display_attributes;
unsigned int num_display_attributes;
VADisplayAttribute *rotation_attrib;
+ VADisplayAttribute *brightness_attrib;
+ VADisplayAttribute *contrast_attrib;
+ VADisplayAttribute *hue_attrib;
+ VADisplayAttribute *saturation_attrib;
VAContextID current_context_id;
/* VA/DRI (X11) specific data */
diff --git a/src/i965_render.c b/src/i965_render.c
index 26a7baf..b4fd29b 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -35,6 +35,7 @@
#include <stdlib.h>
#include <string.h>
#include <assert.h>
+#include <math.h>
#include <va/va_drmcommon.h>
@@ -64,6 +65,7 @@ static const uint32_t ps_kernel_static[][4] =
#include "shaders/render/exa_wm_xy.g4b"
#include "shaders/render/exa_wm_src_affine.g4b"
#include "shaders/render/exa_wm_src_sample_planar.g4b"
+#include "shaders/render/exa_wm_yuv_color_balance.g4b"
#include "shaders/render/exa_wm_yuv_rgb.g4b"
#include "shaders/render/exa_wm_write.g4b"
};
@@ -86,6 +88,7 @@ static const uint32_t ps_kernel_static_gen5[][4] =
#include "shaders/render/exa_wm_xy.g4b.gen5"
#include "shaders/render/exa_wm_src_affine.g4b.gen5"
#include "shaders/render/exa_wm_src_sample_planar.g4b.gen5"
+#include "shaders/render/exa_wm_yuv_color_balance.g4b.gen5"
#include "shaders/render/exa_wm_yuv_rgb.g4b.gen5"
#include "shaders/render/exa_wm_write.g4b.gen5"
};
@@ -105,6 +108,7 @@ static const uint32_t sf_kernel_static_gen6[][4] =
static const uint32_t ps_kernel_static_gen6[][4] = {
#include "shaders/render/exa_wm_src_affine.g6b"
#include "shaders/render/exa_wm_src_sample_planar.g6b"
+#include "shaders/render/exa_wm_yuv_color_balance.g6b"
#include "shaders/render/exa_wm_yuv_rgb.g6b"
#include "shaders/render/exa_wm_write.g6b"
};
@@ -123,6 +127,7 @@ static const uint32_t sf_kernel_static_gen7[][4] =
static const uint32_t ps_kernel_static_gen7[][4] = {
#include "shaders/render/exa_wm_src_affine.g7b"
#include "shaders/render/exa_wm_src_sample_planar.g7b"
+#include "shaders/render/exa_wm_yuv_color_balance.g7b"
#include "shaders/render/exa_wm_yuv_rgb.g7b"
#include "shaders/render/exa_wm_write.g7b"
};
@@ -137,6 +142,7 @@ static const uint32_t ps_subpic_kernel_static_gen7[][4] = {
static const uint32_t ps_kernel_static_gen7_haswell[][4] = {
#include "shaders/render/exa_wm_src_affine.g7b"
#include "shaders/render/exa_wm_src_sample_planar.g7b.haswell"
+#include "shaders/render/exa_wm_yuv_color_balance.g7b.haswell"
#include "shaders/render/exa_wm_yuv_rgb.g7b"
#include "shaders/render/exa_wm_write.g7b"
};
@@ -1050,6 +1056,8 @@ i965_render_upload_vertex(
i965_fill_vertex_buffer(ctx, tex_coords, vid_coords);
}
+#define PI 3.1415926
+
static void
i965_render_upload_constants(VADriverContextP ctx,
struct object_surface *obj_surface)
@@ -1057,6 +1065,11 @@ i965_render_upload_constants(VADriverContextP ctx,
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct i965_render_state *render_state = &i965->render_state;
unsigned short *constant_buffer;
+ float *color_balance_base;
+ float contrast = (float)i965->contrast_attrib->value / DEFAULT_CONTRAST;
+ float brightness = (float)i965->brightness_attrib->value / 255; /* YUV is float in the shader */
+ float hue = (float)i965->hue_attrib->value / 180 * PI;
+ float saturation = (float)i965->saturation_attrib->value / DEFAULT_SATURATION;
dri_bo_map(render_state->curbe.bo, 1);
assert(render_state->curbe.bo->virtual);
@@ -1065,14 +1078,28 @@ i965_render_upload_constants(VADriverContextP ctx,
if (obj_surface->subsampling == SUBSAMPLE_YUV400) {
assert(obj_surface->fourcc == VA_FOURCC('Y', '8', '0', '0'));
- *constant_buffer = 2;
+ constant_buffer[0] = 2;
} else {
if (obj_surface->fourcc == VA_FOURCC('N', 'V', '1', '2'))
- *constant_buffer = 1;
+ constant_buffer[0] = 1;
else
- *constant_buffer = 0;
+ constant_buffer[0] = 0;
}
+ if (i965->contrast_attrib->value == DEFAULT_CONTRAST &&
+ i965->brightness_attrib->value == DEFAULT_BRIGHTNESS &&
+ i965->hue_attrib->value == DEFAULT_HUE &&
+ i965->saturation_attrib->value == DEFAULT_SATURATION)
+ constant_buffer[1] = 1; /* skip color balance transformation */
+ else
+ constant_buffer[1] = 0;
+
+ color_balance_base = (float *)constant_buffer + 4;
+ *color_balance_base++ = contrast;
+ *color_balance_base++ = brightness;
+ *color_balance_base++ = cos(hue) * contrast * saturation;
+ *color_balance_base++ = sin(hue) * contrast * saturation;
+
dri_bo_unmap(render_state->curbe.bo);
}
diff --git a/src/shaders/render/Makefile.am b/src/shaders/render/Makefile.am
index dac58c7..1653b4a 100644
--- a/src/shaders/render/Makefile.am
+++ b/src/shaders/render/Makefile.am
@@ -1,7 +1,8 @@
INTEL_G4I = \
exa_wm.g4i \
- exa_wm_affine.g4i
+ exa_wm_affine.g4i \
+ exa_wm_yuv_color_balance.gxa
INTEL_G4A = \
exa_sf.g4a \
@@ -9,6 +10,7 @@ INTEL_G4A = \
exa_wm_src_affine.g4a \
exa_wm_src_sample_argb.g4a \
exa_wm_src_sample_planar.g4a \
+ exa_wm_yuv_color_balance.g4a \
exa_wm_yuv_rgb.g4a \
exa_wm_write.g4a
@@ -20,6 +22,7 @@ INTEL_G4B = \
exa_wm_src_affine.g4b \
exa_wm_src_sample_argb.g4b \
exa_wm_src_sample_planar.g4b \
+ exa_wm_yuv_color_balance.g4b \
exa_wm_yuv_rgb.g4b \
exa_wm_write.g4b
@@ -29,14 +32,18 @@ INTEL_G4B_GEN5 = \
exa_wm_src_affine.g4b.gen5 \
exa_wm_src_sample_argb.g4b.gen5 \
exa_wm_src_sample_planar.g4b.gen5 \
+ exa_wm_yuv_color_balance.g4b.gen5 \
exa_wm_yuv_rgb.g4b.gen5 \
exa_wm_write.g4b.gen5
+INTEL_G6I = $(INTEL_G4I)
+
INTEL_G6A = \
exa_wm_src_affine.g6a \
exa_wm_src_sample_argb.g6a \
exa_wm_src_sample_planar.g6a \
exa_wm_write.g6a \
+ exa_wm_yuv_color_balance.g6a \
exa_wm_yuv_rgb.g6a
INTEL_G6S = $(INTEL_G6A:%.g6a=%.g6s)
@@ -46,13 +53,17 @@ INTEL_G6B = \
exa_wm_src_sample_argb.g6b \
exa_wm_src_sample_planar.g6b \
exa_wm_write.g6b \
+ exa_wm_yuv_color_balance.g6b \
exa_wm_yuv_rgb.g6b
+INTEL_G7I = $(INTEL_G4I)
+
INTEL_G7A = \
exa_wm_src_affine.g7a \
exa_wm_src_sample_argb.g7a \
exa_wm_src_sample_planar.g7a \
exa_wm_write.g7a \
+ exa_wm_yuv_color_balance.g7a \
exa_wm_yuv_rgb.g7a
INTEL_G7S = $(INTEL_G7A:%.g7a=%.g7s)
@@ -62,11 +73,13 @@ INTEL_G7B = \
exa_wm_src_sample_argb.g7b \
exa_wm_src_sample_planar.g7b \
exa_wm_write.g7b \
+ exa_wm_yuv_color_balance.g7b \
exa_wm_yuv_rgb.g7b
# XXX: only regenerate binary for EU code containing JMPI instructions
INTEL_G7B_HASWELL = \
exa_wm_src_sample_planar.g7b.haswell \
+ exa_wm_yuv_color_balance.g7b.haswell \
$(NULL)
TARGETS =
@@ -80,7 +93,7 @@ endif
all-local: $(TARGETS)
-SUFFIXES = .g4a .g4s .g4b .g6a .g6s .g6b .g7a .g7s .g7b .g7b.haswell
+SUFFIXES = .g4a .g4s .g4b .g4b.gen5 .g6a .g6s .g6b .g7a .g7s .g7b .g7b.haswell
if HAVE_GEN4ASM
$(INTEL_G4S): $(INTEL_G4A) $(INTEL_G4I)
diff --git a/src/shaders/render/exa_wm.g4i b/src/shaders/render/exa_wm.g4i
index 8163de5..dd47d51 100644
--- a/src/shaders/render/exa_wm.g4i
+++ b/src/shaders/render/exa_wm.g4i
@@ -142,6 +142,25 @@ define(`mask_sample_a', `g28')
define(`mask_sample_a_01', `g28')
define(`mask_sample_a_23', `g29')
+/* Color Balance to these registers */
+define(`color_balance_base', `g32')
+
+define(`color_balance_r', `g32')
+define(`color_balance_r_01', `g32')
+define(`color_balance_r_23', `g33')
+
+define(`color_balance_g', `g34')
+define(`color_balance_g_01', `g34')
+define(`color_balance_g_23', `g35')
+
+define(`color_balance_b', `g36')
+define(`color_balance_b_01', `g37')
+define(`color_balance_b_23', `g37')
+
+define(`color_balance_a', `g38')
+define(`color_balance_a_01', `g39')
+define(`color_balance_a_23', `g39')
+
/* data port SIMD16 send registers */
define(`data_port_msg_0', `m0')
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g4a b/src/shaders/render/exa_wm_yuv_color_balance.g4a
new file mode 100644
index 0000000..33ba67a
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g4a
@@ -0,0 +1,38 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Haihao Xiang <haihao.xiang@intel.com>
+ *
+ */
+
+include(`exa_wm.g4i')
+
+/* Color Balance parameters */
+define(`skip_color_balance', `g2.2<0,1,0>uw')
+define(`contrast', `g2.16<0,1,0>f')
+define(`brightness', `g2.20<0,1,0>f')
+define(`cos_c_s', `g2.24<0,1,0>f')
+define(`sin_c_s', `g2.28<0,1,0>f')
+define(`sin_c_s_t', `g2.28')
+
+include(`exa_wm_yuv_color_balance.gxa')
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g4b b/src/shaders/render/exa_wm_yuv_color_balance.g4b
new file mode 100644
index 0000000..cba9aca
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g4b
@@ -0,0 +1,15 @@
+ { 0x01000010, 0x20002d3c, 0x00000042, 0x00010001 },
+ { 0x00010020, 0x34001c00, 0x00001400, 0x0000000d },
+ { 0x00802040, 0x24007fbd, 0x008d01c0, 0xbd808081 },
+ { 0x00802041, 0x240077bd, 0x008d0400, 0x00000050 },
+ { 0x00802040, 0x240077bd, 0x008d0400, 0x00000054 },
+ { 0x00802040, 0x21c07fbd, 0x008d0400, 0x3d808081 },
+ { 0x00802040, 0x24807fbd, 0x008d0200, 0xbf008084 },
+ { 0x00802040, 0x24407fbd, 0x008d0240, 0xbf008084 },
+ { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00802048, 0x240077bc, 0x008d0440, 0x0000005c },
+ { 0x00802048, 0x220077bd, 0x008d0480, 0x00000058 },
+ { 0x00000041, 0x205c7fbd, 0x0000005c, 0xbf800000 },
+ { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00802048, 0x240077bc, 0x008d0480, 0x0000005c },
+ { 0x00802048, 0x224077bd, 0x008d0440, 0x00000058 },
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5 b/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5
new file mode 100644
index 0000000..5a24a0e
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5
@@ -0,0 +1,15 @@
+ { 0x01000010, 0x20002d3c, 0x00000042, 0x00010001 },
+ { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a },
+ { 0x00802040, 0x24007fbd, 0x008d01c0, 0xbd808081 },
+ { 0x00802041, 0x240077bd, 0x008d0400, 0x00000050 },
+ { 0x00802040, 0x240077bd, 0x008d0400, 0x00000054 },
+ { 0x00802040, 0x21c07fbd, 0x008d0400, 0x3d808081 },
+ { 0x00802040, 0x24807fbd, 0x008d0200, 0xbf008084 },
+ { 0x00802040, 0x24407fbd, 0x008d0240, 0xbf008084 },
+ { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00802048, 0x240077bc, 0x008d0440, 0x0000005c },
+ { 0x00802048, 0x220077bd, 0x008d0480, 0x00000058 },
+ { 0x00000041, 0x205c7fbd, 0x0000005c, 0xbf800000 },
+ { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00802048, 0x240077bc, 0x008d0480, 0x0000005c },
+ { 0x00802048, 0x224077bd, 0x008d0440, 0x00000058 },
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g6a b/src/shaders/render/exa_wm_yuv_color_balance.g6a
new file mode 100644
index 0000000..6906357
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g6a
@@ -0,0 +1,38 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Haihao Xiang <haihao.xiang@intel.com>
+ *
+ */
+
+include(`exa_wm.g4i')
+
+/* Color Balance parameters */
+define(`skip_color_balance', `g6.2<0,1,0>uw')
+define(`contrast', `g6.16<0,1,0>f')
+define(`brightness', `g6.20<0,1,0>f')
+define(`cos_c_s', `g6.24<0,1,0>f')
+define(`sin_c_s', `g6.28<0,1,0>f')
+define(`sin_c_s_t', `g6.28')
+
+include(`exa_wm_yuv_color_balance.gxa')
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g6b b/src/shaders/render/exa_wm_yuv_color_balance.g6b
new file mode 100644
index 0000000..0a9e6b9
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g6b
@@ -0,0 +1,15 @@
+ { 0x01000010, 0x20002d3c, 0x000000c2, 0x00010001 },
+ { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a },
+ { 0x00800040, 0x24007fbd, 0x008d01c0, 0xbd808081 },
+ { 0x00800041, 0x240077bd, 0x008d0400, 0x000000d0 },
+ { 0x00800040, 0x240077bd, 0x008d0400, 0x000000d4 },
+ { 0x00800040, 0x21c07fbd, 0x008d0400, 0x3d808081 },
+ { 0x00800040, 0x24807fbd, 0x008d0200, 0xbf008084 },
+ { 0x00800040, 0x24407fbd, 0x008d0240, 0xbf008084 },
+ { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00800048, 0x240077bc, 0x008d0440, 0x000000dc },
+ { 0x00800048, 0x220077bd, 0x008d0480, 0x000000d8 },
+ { 0x00000041, 0x20dc7fbd, 0x000000dc, 0xbf800000 },
+ { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00800048, 0x240077bc, 0x008d0480, 0x000000dc },
+ { 0x00800048, 0x224077bd, 0x008d0440, 0x000000d8 },
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g7a b/src/shaders/render/exa_wm_yuv_color_balance.g7a
new file mode 100644
index 0000000..6906357
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g7a
@@ -0,0 +1,38 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Haihao Xiang <haihao.xiang@intel.com>
+ *
+ */
+
+include(`exa_wm.g4i')
+
+/* Color Balance parameters */
+define(`skip_color_balance', `g6.2<0,1,0>uw')
+define(`contrast', `g6.16<0,1,0>f')
+define(`brightness', `g6.20<0,1,0>f')
+define(`cos_c_s', `g6.24<0,1,0>f')
+define(`sin_c_s', `g6.28<0,1,0>f')
+define(`sin_c_s_t', `g6.28')
+
+include(`exa_wm_yuv_color_balance.gxa')
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g7b b/src/shaders/render/exa_wm_yuv_color_balance.g7b
new file mode 100644
index 0000000..0a9e6b9
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g7b
@@ -0,0 +1,15 @@
+ { 0x01000010, 0x20002d3c, 0x000000c2, 0x00010001 },
+ { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a },
+ { 0x00800040, 0x24007fbd, 0x008d01c0, 0xbd808081 },
+ { 0x00800041, 0x240077bd, 0x008d0400, 0x000000d0 },
+ { 0x00800040, 0x240077bd, 0x008d0400, 0x000000d4 },
+ { 0x00800040, 0x21c07fbd, 0x008d0400, 0x3d808081 },
+ { 0x00800040, 0x24807fbd, 0x008d0200, 0xbf008084 },
+ { 0x00800040, 0x24407fbd, 0x008d0240, 0xbf008084 },
+ { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00800048, 0x240077bc, 0x008d0440, 0x000000dc },
+ { 0x00800048, 0x220077bd, 0x008d0480, 0x000000d8 },
+ { 0x00000041, 0x20dc7fbd, 0x000000dc, 0xbf800000 },
+ { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00800048, 0x240077bc, 0x008d0480, 0x000000dc },
+ { 0x00800048, 0x224077bd, 0x008d0440, 0x000000d8 },
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell b/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell
new file mode 100644
index 0000000..2780c08
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell
@@ -0,0 +1,15 @@
+ { 0x01000010, 0x20002d3c, 0x000000c2, 0x00010001 },
+ { 0x00010020, 0x34001c00, 0x00001400, 0x000000d0 },
+ { 0x00800040, 0x24007fbd, 0x008d01c0, 0xbd808081 },
+ { 0x00800041, 0x240077bd, 0x008d0400, 0x000000d0 },
+ { 0x00800040, 0x240077bd, 0x008d0400, 0x000000d4 },
+ { 0x00800040, 0x21c07fbd, 0x008d0400, 0x3d808081 },
+ { 0x00800040, 0x24807fbd, 0x008d0200, 0xbf008084 },
+ { 0x00800040, 0x24407fbd, 0x008d0240, 0xbf008084 },
+ { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00800048, 0x240077bc, 0x008d0440, 0x000000dc },
+ { 0x00800048, 0x220077bd, 0x008d0480, 0x000000d8 },
+ { 0x00000041, 0x20dc7fbd, 0x000000dc, 0xbf800000 },
+ { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 },
+ { 0x00800048, 0x240077bc, 0x008d0480, 0x000000dc },
+ { 0x00800048, 0x224077bd, 0x008d0440, 0x000000d8 },
diff --git a/src/shaders/render/exa_wm_yuv_color_balance.gxa b/src/shaders/render/exa_wm_yuv_color_balance.gxa
new file mode 100644
index 0000000..948067c
--- /dev/null
+++ b/src/shaders/render/exa_wm_yuv_color_balance.gxa
@@ -0,0 +1,75 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Haihao Xiang <haihao.xiang@intel.com>
+ *
+ */
+
+define(`Cr', `src_sample_b')
+define(`Cr_01', `src_sample_b_01')
+define(`Cr_23', `src_sample_b_23')
+
+define(`Y', `src_sample_r')
+define(`Y_01', `src_sample_r_01')
+define(`Y_23', `src_sample_r_23')
+
+define(`Cb', `src_sample_g')
+define(`Cb_01', `src_sample_g_01')
+define(`Cb_23', `src_sample_g_23')
+
+define(`Crn', `color_balance_g')
+define(`Crn_01', `color_balance_g_01')
+define(`Crn_23', `color_balance_g_23')
+
+define(`Yn', `color_balance_r')
+define(`Yn_01', `color_balance_r_01')
+define(`Yn_23', `color_balance_r_23')
+
+define(`Cbn', `color_balance_b')
+define(`Cbn_01', `color_balance_b_01')
+define(`Cbn_23', `color_balance_b_23')
+
+cmp.e.f0.0 (1) null skip_color_balance 0x1uw {align1};
+(f0.0) jmpi _DONE_COLOR_BALANCE;
+
+/* Yout = (Yin - 16 / 255) * contrast + brightness + 16 / 255 */
+add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 };
+mul (16) Yn<1>F Yn<8,8,1>F contrast { compr align1 };
+add (16) Yn<1>F Yn<8,8,1>F brightness { compr align1 };
+add (16) Y<1>F Yn<8,8,1>F 0.0627451F { compr align1 };
+
+/* Uout = (Uin - 128 / 255) * cos_c_s + (Vin - 128 / 255) * sin_c_s + 128 / 255 */
+/* Vout = (Vin - 128 / 255) * cos_c_s - (Uin - 128 / 255) * sin_c_s + 128 / 255 */
+add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 };
+add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 };
+
+mov (16) acc0<1>F 0.501961F { compr align1 };
+mac (16) acc0<1>F Crn<8,8,1>F sin_c_s { compr align1 };
+mac (16) Cb<1>F Cbn<8,8,1>F cos_c_s { compr align1 };
+
+mul (1) sin_c_s_t<1>F sin_c_s -1.0F { align1};
+mov (16) acc0<1>F 0.501961F { compr align1 };
+mac (16) acc0<1>F Cbn<8,8,1>F sin_c_s { compr align1 };
+mac (16) Cr<1>F Crn<8,8,1>F cos_c_s { compr align1 };
+
+_DONE_COLOR_BALANCE:
--
1.8.3.2

View File

@ -1,276 +0,0 @@
From bf2bb5e0ccc8375800a9ed1bad956fd766641f1a Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Fri, 22 Nov 2013 13:39:34 +0800
Subject: [PATCH 2/5] Increase the size of constant buffer for PS thread to
pass more info
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
---
src/i965_render.c | 16 ++++-----
src/shaders/render/exa_wm.g4i | 52 ++++++++++++++-------------
src/shaders/render/exa_wm_src_affine.g4b | 12 +++----
src/shaders/render/exa_wm_src_affine.g4b.gen5 | 12 +++----
src/shaders/render/exa_wm_src_affine.g6a | 3 --
src/shaders/render/exa_wm_src_affine.g6b | 8 ++---
src/shaders/render/exa_wm_src_affine.g7a | 2 --
src/shaders/render/exa_wm_src_affine.g7b | 8 ++---
src/shaders/render/exa_wm_xy.g4b | 4 +--
src/shaders/render/exa_wm_xy.g4b.gen5 | 4 +--
10 files changed, 60 insertions(+), 61 deletions(-)
diff --git a/src/i965_render.c b/src/i965_render.c
index b4fd29b..0777ce0 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -55,7 +55,7 @@ static const uint32_t sf_kernel_static[][4] =
#include "shaders/render/exa_sf.g4b"
};
-#define PS_KERNEL_NUM_GRF 32
+#define PS_KERNEL_NUM_GRF 48
#define PS_MAX_THREADS 32
#define I965_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
@@ -308,8 +308,8 @@ static struct i965_kernel render_kernels_gen7_haswell[] = {
#define URB_SF_ENTRIES 1
#define URB_SF_ENTRY_SIZE 2
-#define URB_CS_ENTRIES 1
-#define URB_CS_ENTRY_SIZE 1
+#define URB_CS_ENTRIES 4
+#define URB_CS_ENTRY_SIZE 4
static void
i965_render_vs_unit(VADriverContextP ctx)
@@ -445,8 +445,8 @@ i965_subpic_render_wm_unit(VADriverContextP ctx)
wm_state->thread2.scratch_space_base_pointer = 0;
wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
- wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */
- wm_state->thread3.const_urb_entry_read_length = 0;
+ wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */
+ wm_state->thread3.const_urb_entry_read_length = 4;
wm_state->thread3.const_urb_entry_read_offset = 0;
wm_state->thread3.urb_entry_read_length = 1; /* XXX */
wm_state->thread3.urb_entry_read_offset = 0; /* XXX */
@@ -510,7 +510,7 @@ i965_render_wm_unit(VADriverContextP ctx)
wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */
- wm_state->thread3.const_urb_entry_read_length = 1;
+ wm_state->thread3.const_urb_entry_read_length = 4;
wm_state->thread3.const_urb_entry_read_offset = 0;
wm_state->thread3.urb_entry_read_length = 1; /* XXX */
wm_state->thread3.urb_entry_read_offset = 0; /* XXX */
@@ -2071,7 +2071,7 @@ gen6_emit_wm_state(VADriverContextP ctx, int kernel)
OUT_RELOC(batch,
render_state->curbe.bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
- 0);
+ (URB_CS_ENTRY_SIZE-1));
OUT_BATCH(batch, 0);
OUT_BATCH(batch, 0);
OUT_BATCH(batch, 0);
@@ -2837,7 +2837,7 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel)
BEGIN_BATCH(batch, 7);
OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | (7 - 2));
- OUT_BATCH(batch, 1);
+ OUT_BATCH(batch, URB_CS_ENTRY_SIZE);
OUT_BATCH(batch, 0);
OUT_RELOC(batch,
render_state->curbe.bo,
diff --git a/src/shaders/render/exa_wm.g4i b/src/shaders/render/exa_wm.g4i
index dd47d51..e186d3a 100644
--- a/src/shaders/render/exa_wm.g4i
+++ b/src/shaders/render/exa_wm.g4i
@@ -1,5 +1,5 @@
/*
- * Copyright © 2006 Intel Corporation
+ * Copyright © 2006-2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,39 +39,43 @@ define(`screen_y0', `g1.4<0,1,0>F')
define(`interleaved_uv', `g2.0<0,1,0>UW')
/* Source transformation parameters */
-define(`src_du_dx', `g3.0<0,1,0>F')
-define(`src_du_dy', `g3.4<0,1,0>F')
-define(`src_uo', `g3.12<0,1,0>F')
-define(`src_dv_dx', `g3.16<0,1,0>F')
-define(`src_dv_dy', `g3.20<0,1,0>F')
-define(`src_vo', `g3.28<0,1,0>F')
-define(`src_dw_dx', `g4.0<0,1,0>F')
-define(`src_dw_dy', `g4.4<0,1,0>F')
-define(`src_wo', `g4.12<0,1,0>F')
-
-define(`mask_du_dx', `g5.0<0,1,0>F')
-define(`mask_du_dy', `g5.4<0,1,0>F')
-define(`mask_uo', `g5.12<0,1,0>F')
-define(`mask_dv_dx', `g5.16<0,1,0>F')
-define(`mask_dv_dy', `g5.20<0,1,0>F')
-define(`mask_vo', `g5.28<0,1,0>F')
-define(`mask_dw_dx', `g6.0<0,1,0>F')
-define(`mask_dw_dy', `g6.4<0,1,0>F')
-define(`mask_wo', `g6.12<0,1,0>F')
+define(`src_du_dx', `g6.0<0,1,0>F')
+define(`src_du_dy', `g6.4<0,1,0>F')
+define(`src_uo', `g6.12<0,1,0>F')
+define(`src_dv_dx', `g6.16<0,1,0>F')
+define(`src_dv_dy', `g6.20<0,1,0>F')
+define(`src_vo', `g6.28<0,1,0>F')
+define(`src_dw_dx', `g7.0<0,1,0>F')
+define(`src_dw_dy', `g7.4<0,1,0>F')
+define(`src_wo', `g7.12<0,1,0>F')
+
+define(`mask_du_dx', `g8.0<0,1,0>F')
+define(`mask_du_dy', `g8.4<0,1,0>F')
+define(`mask_uo', `g8.12<0,1,0>F')
+define(`mask_dv_dx', `g8.16<0,1,0>F')
+define(`mask_dv_dy', `g8.20<0,1,0>F')
+define(`mask_vo', `g8.28<0,1,0>F')
+define(`mask_dw_dx', `g9.0<0,1,0>F')
+define(`mask_dw_dy', `g9.4<0,1,0>F')
+define(`mask_wo', `g9.12<0,1,0>F')
+
+/* Attribute for snb+ */
+define(`a0_a_x',`g10.0<0,1,0>F')
+define(`a0_a_y',`g10.16<0,1,0>F')
/*
* Local variables. Pairs must be aligned on even reg boundry
*/
/* this holds the X dest coordinates */
-define(`dst_x', `g8')
+define(`dst_x', `g42')
define(`dst_x_0', `dst_x')
-define(`dst_x_1', `g9')
+define(`dst_x_1', `g43')
/* this holds the Y dest coordinates */
-define(`dst_y', `g10')
+define(`dst_y', `g44')
define(`dst_y_0', `dst_y')
-define(`dst_y_1', `g11')
+define(`dst_y_1', `g45')
/* When computing x * dn/dx, use this */
define(`temp_x', `g30')
diff --git a/src/shaders/render/exa_wm_src_affine.g4b b/src/shaders/render/exa_wm_src_affine.g4b
index d30da87..7507b72 100644
--- a/src/shaders/render/exa_wm_src_affine.g4b
+++ b/src/shaders/render/exa_wm_src_affine.g4b
@@ -1,8 +1,8 @@
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000c0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000c4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c },
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 },
+ { 0x00802040, 0x204077be, 0x008d03c0, 0x000000cc },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000d0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000d4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c },
+ { 0x00802040, 0x208077be, 0x008d03c0, 0x000000dc },
diff --git a/src/shaders/render/exa_wm_src_affine.g4b.gen5 b/src/shaders/render/exa_wm_src_affine.g4b.gen5
index d30da87..7507b72 100644
--- a/src/shaders/render/exa_wm_src_affine.g4b.gen5
+++ b/src/shaders/render/exa_wm_src_affine.g4b.gen5
@@ -1,8 +1,8 @@
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000c0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000c4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c },
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 },
+ { 0x00802040, 0x204077be, 0x008d03c0, 0x000000cc },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000d0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000d4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c },
+ { 0x00802040, 0x208077be, 0x008d03c0, 0x000000dc },
diff --git a/src/shaders/render/exa_wm_src_affine.g6a b/src/shaders/render/exa_wm_src_affine.g6a
index 568aef3..04358cb 100644
--- a/src/shaders/render/exa_wm_src_affine.g6a
+++ b/src/shaders/render/exa_wm_src_affine.g6a
@@ -35,9 +35,6 @@ define(`vh', `m5')
define(`bl', `g2.0<8,8,1>F')
define(`bh', `g4.0<8,8,1>F')
-define(`a0_a_x',`g7.0<0,1,0>F')
-define(`a0_a_y',`g7.16<0,1,0>F')
-
/* U */
pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */
pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */
diff --git a/src/shaders/render/exa_wm_src_affine.g6b b/src/shaders/render/exa_wm_src_affine.g6b
index 5d0ffcc..22c1d22 100644
--- a/src/shaders/render/exa_wm_src_affine.g6b
+++ b/src/shaders/render/exa_wm_src_affine.g6b
@@ -1,4 +1,4 @@
- { 0x0060005a, 0x204077be, 0x000000e0, 0x008d0040 },
- { 0x0060005a, 0x206077be, 0x000000e0, 0x008d0080 },
- { 0x0060005a, 0x208077be, 0x000000f0, 0x008d0040 },
- { 0x0060005a, 0x20a077be, 0x000000f0, 0x008d0080 },
+ { 0x0060005a, 0x204077be, 0x00000140, 0x008d0040 },
+ { 0x0060005a, 0x206077be, 0x00000140, 0x008d0080 },
+ { 0x0060005a, 0x208077be, 0x00000150, 0x008d0040 },
+ { 0x0060005a, 0x20a077be, 0x00000150, 0x008d0080 },
diff --git a/src/shaders/render/exa_wm_src_affine.g7a b/src/shaders/render/exa_wm_src_affine.g7a
index a786bc0..88e5ed5 100644
--- a/src/shaders/render/exa_wm_src_affine.g7a
+++ b/src/shaders/render/exa_wm_src_affine.g7a
@@ -35,8 +35,6 @@ define(`vh', `g69')
define(`bl', `g2.0<8,8,1>F')
define(`bh', `g4.0<8,8,1>F')
-define(`a0_a_x',`g7.0<0,1,0>F')
-define(`a0_a_y',`g7.16<0,1,0>F')
/* U */
pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */
diff --git a/src/shaders/render/exa_wm_src_affine.g7b b/src/shaders/render/exa_wm_src_affine.g7b
index 5dbbf1b..a15b7b6 100644
--- a/src/shaders/render/exa_wm_src_affine.g7b
+++ b/src/shaders/render/exa_wm_src_affine.g7b
@@ -1,4 +1,4 @@
- { 0x0060005a, 0x284077bd, 0x000000e0, 0x008d0040 },
- { 0x0060005a, 0x286077bd, 0x000000e0, 0x008d0080 },
- { 0x0060005a, 0x288077bd, 0x000000f0, 0x008d0040 },
- { 0x0060005a, 0x28a077bd, 0x000000f0, 0x008d0080 },
+ { 0x0060005a, 0x284077bd, 0x00000140, 0x008d0040 },
+ { 0x0060005a, 0x286077bd, 0x00000140, 0x008d0080 },
+ { 0x0060005a, 0x288077bd, 0x00000150, 0x008d0040 },
+ { 0x0060005a, 0x28a077bd, 0x00000150, 0x008d0080 },
diff --git a/src/shaders/render/exa_wm_xy.g4b b/src/shaders/render/exa_wm_xy.g4b
index 327fc29..2b3b235 100644
--- a/src/shaders/render/exa_wm_xy.g4b
+++ b/src/shaders/render/exa_wm_xy.g4b
@@ -1,4 +1,4 @@
{ 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 },
{ 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 },
- { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 },
- { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 },
+ { 0x00802040, 0x2540753d, 0x008d03c0, 0x00004020 },
+ { 0x00802040, 0x2580753d, 0x008d0380, 0x00004024 },
diff --git a/src/shaders/render/exa_wm_xy.g4b.gen5 b/src/shaders/render/exa_wm_xy.g4b.gen5
index 327fc29..2b3b235 100644
--- a/src/shaders/render/exa_wm_xy.g4b.gen5
+++ b/src/shaders/render/exa_wm_xy.g4b.gen5
@@ -1,4 +1,4 @@
{ 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 },
{ 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 },
- { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 },
- { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 },
+ { 0x00802040, 0x2540753d, 0x008d03c0, 0x00004020 },
+ { 0x00802040, 0x2580753d, 0x008d0380, 0x00004024 },
--
1.8.3.2

View File

@ -1,629 +0,0 @@
From 7be8aa161fd9d885c1d4cb27ad21af21f617256b Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Fri, 22 Nov 2013 13:39:34 +0800
Subject: [PATCH 3/5] Constant buffer passes YUV2RGB CSC matrix instead of
hardcoded matrix
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
---
src/i965_render.c | 10 ++++
src/shaders/render/Makefile.am | 5 +-
src/shaders/render/exa_wm_yuv_rgb.g4a | 72 ++---------------------------
src/shaders/render/exa_wm_yuv_rgb.g4b | 23 +++++-----
src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 | 23 +++++-----
src/shaders/render/exa_wm_yuv_rgb.g6a | 73 ++---------------------------
src/shaders/render/exa_wm_yuv_rgb.g6b | 23 +++++-----
src/shaders/render/exa_wm_yuv_rgb.g7a | 73 ++---------------------------
src/shaders/render/exa_wm_yuv_rgb.g7b | 23 +++++-----
src/shaders/render/exa_yuv_gen4.g4i | 42 +++++++++++++++++
src/shaders/render/exa_yuv_gen6.g4i | 42 +++++++++++++++++
src/shaders/render/exa_yuv_rgb.gxa | 74 ++++++++++++++++++++++++++++++
12 files changed, 229 insertions(+), 254 deletions(-)
create mode 100644 src/shaders/render/exa_yuv_gen4.g4i
create mode 100644 src/shaders/render/exa_yuv_gen6.g4i
create mode 100644 src/shaders/render/exa_yuv_rgb.gxa
diff --git a/src/i965_render.c b/src/i965_render.c
index 0777ce0..5b1a1a5 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -311,6 +311,12 @@ static struct i965_kernel render_kernels_gen7_haswell[] = {
#define URB_CS_ENTRIES 4
#define URB_CS_ENTRY_SIZE 4
+static float yuv_to_rgb_bt601[3][4] = {
+{1.164, 0, 1.596, -0.06275,},
+{1.164, -0.392, -0.813, -0.50196,},
+{1.164, 2.017, 0, -0.50196,},
+};
+
static void
i965_render_vs_unit(VADriverContextP ctx)
{
@@ -1070,6 +1076,7 @@ i965_render_upload_constants(VADriverContextP ctx,
float brightness = (float)i965->brightness_attrib->value / 255; /* YUV is float in the shader */
float hue = (float)i965->hue_attrib->value / 180 * PI;
float saturation = (float)i965->saturation_attrib->value / DEFAULT_SATURATION;
+ float *yuv_to_rgb;
dri_bo_map(render_state->curbe.bo, 1);
assert(render_state->curbe.bo->virtual);
@@ -1100,6 +1107,9 @@ i965_render_upload_constants(VADriverContextP ctx,
*color_balance_base++ = cos(hue) * contrast * saturation;
*color_balance_base++ = sin(hue) * contrast * saturation;
+ yuv_to_rgb = (float *)constant_buffer + 8;
+ memcpy(yuv_to_rgb, yuv_to_rgb_bt601, sizeof(yuv_to_rgb_bt601));
+
dri_bo_unmap(render_state->curbe.bo);
}
diff --git a/src/shaders/render/Makefile.am b/src/shaders/render/Makefile.am
index 1653b4a..bed683b 100644
--- a/src/shaders/render/Makefile.am
+++ b/src/shaders/render/Makefile.am
@@ -2,7 +2,10 @@
INTEL_G4I = \
exa_wm.g4i \
exa_wm_affine.g4i \
- exa_wm_yuv_color_balance.gxa
+ exa_wm_yuv_color_balance.gxa \
+ exa_yuv_rgb.gxa \
+ exa_yuv_gen4.g4i \
+ exa_yuv_gen6.g4i
INTEL_G4A = \
exa_sf.g4a \
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g4a b/src/shaders/render/exa_wm_yuv_rgb.g4a
index b3abe4b..e3d2464 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g4a
+++ b/src/shaders/render/exa_wm_yuv_rgb.g4a
@@ -1,5 +1,5 @@
/*
- * Copyright © 2006 Intel Corporation
+ * Copyright © 2006-2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -27,72 +27,6 @@
*/
include(`exa_wm.g4i')
+include(`exa_yuv_gen4.g4i')
+include(`exa_yuv_rgb.gxa')
-define(`YCbCr_base', `src_sample_base')
-
-define(`Cr', `src_sample_b')
-define(`Cr_01', `src_sample_b_01')
-define(`Cr_23', `src_sample_b_23')
-
-define(`Y', `src_sample_r')
-define(`Y_01', `src_sample_r_01')
-define(`Y_23', `src_sample_r_23')
-
-define(`Cb', `src_sample_g')
-define(`Cb_01', `src_sample_g_01')
-define(`Cb_23', `src_sample_g_23')
-
-define(`Crn', `mask_sample_g')
-define(`Crn_01', `mask_sample_g_01')
-define(`Crn_23', `mask_sample_g_23')
-
-define(`Yn', `mask_sample_r')
-define(`Yn_01', `mask_sample_r_01')
-define(`Yn_23', `mask_sample_r_23')
-
-define(`Cbn', `mask_sample_b')
-define(`Cbn_01', `mask_sample_b_01')
-define(`Cbn_23', `mask_sample_b_23')
-
- /* color space conversion function:
- * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1)
- * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1)
- * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1)
- */
-
- /* Normalize Y, Cb and Cr:
- *
- * Yn = (Y - 16/255) * 1.164
- * Crn = Cr - 128 / 255
- * Cbn = Cb - 128 / 255
- */
-add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 };
-mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 };
-
-add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 };
-
-add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 };
-
- /*
- * R = Y + Cr * 1.596
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 };
-
- /*
- * G = Crn * -0.813 + Cbn * -0.392 + Y
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 };
-mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 };
-
- /*
- * B = Cbn * 2.017 + Y
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 };
-
- /*
- * A = 1.0
- */
-mov (16) src_sample_a<1>F 1.0F { compr align1 };
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g4b b/src/shaders/render/exa_wm_yuv_rgb.g4b
index 6b99838..b116ece 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g4b
+++ b/src/shaders/render/exa_wm_yuv_rgb.g4b
@@ -1,12 +1,13 @@
- { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbd808081 },
- { 0x00802041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 },
- { 0x00802040, 0x23007fbd, 0x008d0240, 0xbf008084 },
- { 0x00802040, 0x23407fbd, 0x008d0200, 0xbf008084 },
- { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80802048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba },
- { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x00802048, 0x24007fbc, 0x008d0300, 0xbf5020c5 },
- { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 },
- { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 },
+ { 0x00802040, 0x22c077bd, 0x008d01c0, 0x0000006c },
+ { 0x00802040, 0x230077bd, 0x008d0200, 0x0000007c },
+ { 0x00802040, 0x234077bd, 0x008d0240, 0x0000008c },
+ { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000060 },
+ { 0x00802048, 0x240077bc, 0x008d0300, 0x00000064 },
+ { 0x80802048, 0x21c077bd, 0x008d0340, 0x00000068 },
+ { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000070 },
+ { 0x00802048, 0x240077bc, 0x008d0300, 0x00000074 },
+ { 0x80802048, 0x220077bd, 0x008d0340, 0x00000078 },
+ { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000080 },
+ { 0x00802048, 0x240077bc, 0x008d0300, 0x00000084 },
+ { 0x80802048, 0x224077bd, 0x008d0340, 0x00000088 },
{ 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 },
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 b/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5
index 6b99838..b116ece 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5
+++ b/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5
@@ -1,12 +1,13 @@
- { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbd808081 },
- { 0x00802041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 },
- { 0x00802040, 0x23007fbd, 0x008d0240, 0xbf008084 },
- { 0x00802040, 0x23407fbd, 0x008d0200, 0xbf008084 },
- { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80802048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba },
- { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x00802048, 0x24007fbc, 0x008d0300, 0xbf5020c5 },
- { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 },
- { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 },
+ { 0x00802040, 0x22c077bd, 0x008d01c0, 0x0000006c },
+ { 0x00802040, 0x230077bd, 0x008d0200, 0x0000007c },
+ { 0x00802040, 0x234077bd, 0x008d0240, 0x0000008c },
+ { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000060 },
+ { 0x00802048, 0x240077bc, 0x008d0300, 0x00000064 },
+ { 0x80802048, 0x21c077bd, 0x008d0340, 0x00000068 },
+ { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000070 },
+ { 0x00802048, 0x240077bc, 0x008d0300, 0x00000074 },
+ { 0x80802048, 0x220077bd, 0x008d0340, 0x00000078 },
+ { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000080 },
+ { 0x00802048, 0x240077bc, 0x008d0300, 0x00000084 },
+ { 0x80802048, 0x224077bd, 0x008d0340, 0x00000088 },
{ 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 },
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g6a b/src/shaders/render/exa_wm_yuv_rgb.g6a
index b3abe4b..ede0298 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g6a
+++ b/src/shaders/render/exa_wm_yuv_rgb.g6a
@@ -1,5 +1,5 @@
/*
- * Copyright © 2006 Intel Corporation
+ * Copyright © 2006-2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -27,72 +27,5 @@
*/
include(`exa_wm.g4i')
-
-define(`YCbCr_base', `src_sample_base')
-
-define(`Cr', `src_sample_b')
-define(`Cr_01', `src_sample_b_01')
-define(`Cr_23', `src_sample_b_23')
-
-define(`Y', `src_sample_r')
-define(`Y_01', `src_sample_r_01')
-define(`Y_23', `src_sample_r_23')
-
-define(`Cb', `src_sample_g')
-define(`Cb_01', `src_sample_g_01')
-define(`Cb_23', `src_sample_g_23')
-
-define(`Crn', `mask_sample_g')
-define(`Crn_01', `mask_sample_g_01')
-define(`Crn_23', `mask_sample_g_23')
-
-define(`Yn', `mask_sample_r')
-define(`Yn_01', `mask_sample_r_01')
-define(`Yn_23', `mask_sample_r_23')
-
-define(`Cbn', `mask_sample_b')
-define(`Cbn_01', `mask_sample_b_01')
-define(`Cbn_23', `mask_sample_b_23')
-
- /* color space conversion function:
- * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1)
- * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1)
- * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1)
- */
-
- /* Normalize Y, Cb and Cr:
- *
- * Yn = (Y - 16/255) * 1.164
- * Crn = Cr - 128 / 255
- * Cbn = Cb - 128 / 255
- */
-add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 };
-mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 };
-
-add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 };
-
-add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 };
-
- /*
- * R = Y + Cr * 1.596
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 };
-
- /*
- * G = Crn * -0.813 + Cbn * -0.392 + Y
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 };
-mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 };
-
- /*
- * B = Cbn * 2.017 + Y
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 };
-
- /*
- * A = 1.0
- */
-mov (16) src_sample_a<1>F 1.0F { compr align1 };
+include(`exa_yuv_gen6.g4i')
+include(`exa_yuv_rgb.gxa')
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g6b b/src/shaders/render/exa_wm_yuv_rgb.g6b
index 6c8c724..d09ae00 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g6b
+++ b/src/shaders/render/exa_wm_yuv_rgb.g6b
@@ -1,12 +1,13 @@
- { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbd808081 },
- { 0x00800041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 },
- { 0x00800040, 0x23007fbd, 0x008d0240, 0xbf008084 },
- { 0x00800040, 0x23407fbd, 0x008d0200, 0xbf008084 },
- { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80800048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba },
- { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x00800048, 0x24007fbc, 0x008d0300, 0xbf5020c5 },
- { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 },
- { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 },
+ { 0x00800040, 0x22c077bd, 0x008d01c0, 0x000000ec },
+ { 0x00800040, 0x230077bd, 0x008d0200, 0x000000fc },
+ { 0x00800040, 0x234077bd, 0x008d0240, 0x0000010c },
+ { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000e0 },
+ { 0x00800048, 0x240077bc, 0x008d0300, 0x000000e4 },
+ { 0x80800048, 0x21c077bd, 0x008d0340, 0x000000e8 },
+ { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000f0 },
+ { 0x00800048, 0x240077bc, 0x008d0300, 0x000000f4 },
+ { 0x80800048, 0x220077bd, 0x008d0340, 0x000000f8 },
+ { 0x00800041, 0x240077bc, 0x008d02c0, 0x00000100 },
+ { 0x00800048, 0x240077bc, 0x008d0300, 0x00000104 },
+ { 0x80800048, 0x224077bd, 0x008d0340, 0x00000108 },
{ 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 },
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g7a b/src/shaders/render/exa_wm_yuv_rgb.g7a
index 5cd33e2..ede0298 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g7a
+++ b/src/shaders/render/exa_wm_yuv_rgb.g7a
@@ -1,5 +1,5 @@
/*
- * Copyright © 2006 Intel Corporation
+ * Copyright © 2006-2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -27,72 +27,5 @@
*/
include(`exa_wm.g4i')
-
-define(`YCbCr_base', `src_sample_base')
-
-define(`Cr', `src_sample_b')
-define(`Cr_01', `src_sample_b_01')
-define(`Cr_23', `src_sample_b_23')
-
-define(`Y', `src_sample_r')
-define(`Y_01', `src_sample_r_01')
-define(`Y_23', `src_sample_r_23')
-
-define(`Cb', `src_sample_g')
-define(`Cb_01', `src_sample_g_01')
-define(`Cb_23', `src_sample_g_23')
-
-define(`Crn', `mask_sample_g')
-define(`Crn_01', `mask_sample_g_01')
-define(`Crn_23', `mask_sample_g_23')
-
-define(`Yn', `mask_sample_r')
-define(`Yn_01', `mask_sample_r_01')
-define(`Yn_23', `mask_sample_r_23')
-
-define(`Cbn', `mask_sample_b')
-define(`Cbn_01', `mask_sample_b_01')
-define(`Cbn_23', `mask_sample_b_23')
-
- /* color space conversion function:
- * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1)
- * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1)
- * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1)
- */
-
- /* Normalize Y, Cb and Cr:
- *
- * Yn = (Y - 16/255) * 1.164
- * Crn = Cr - 128 / 255
- * Cbn = Cb - 128 / 255
- */
-add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 };
-mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 };
-
-add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 };
-
-add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 };
-
- /*
- * R = Y + Cr * 1.596
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 };
-
- /*
- * G = Crn * -0.813 + Cbn * -0.392 + Y
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 };
-mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 };
-
- /*
- * B = Cbn * 2.017 + Y
- */
-mov (16) acc0<1>F Yn<8,8,1>F { compr align1 };
-mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 };
-
- /*
- * A = 1.0
- */
-mov (16) src_sample_a<1>F 1.0F { compr align1 };
+include(`exa_yuv_gen6.g4i')
+include(`exa_yuv_rgb.gxa')
diff --git a/src/shaders/render/exa_wm_yuv_rgb.g7b b/src/shaders/render/exa_wm_yuv_rgb.g7b
index 6c8c724..d09ae00 100644
--- a/src/shaders/render/exa_wm_yuv_rgb.g7b
+++ b/src/shaders/render/exa_wm_yuv_rgb.g7b
@@ -1,12 +1,13 @@
- { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbd808081 },
- { 0x00800041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 },
- { 0x00800040, 0x23007fbd, 0x008d0240, 0xbf008084 },
- { 0x00800040, 0x23407fbd, 0x008d0200, 0xbf008084 },
- { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80800048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba },
- { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x00800048, 0x24007fbc, 0x008d0300, 0xbf5020c5 },
- { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 },
- { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 },
- { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 },
+ { 0x00800040, 0x22c077bd, 0x008d01c0, 0x000000ec },
+ { 0x00800040, 0x230077bd, 0x008d0200, 0x000000fc },
+ { 0x00800040, 0x234077bd, 0x008d0240, 0x0000010c },
+ { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000e0 },
+ { 0x00800048, 0x240077bc, 0x008d0300, 0x000000e4 },
+ { 0x80800048, 0x21c077bd, 0x008d0340, 0x000000e8 },
+ { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000f0 },
+ { 0x00800048, 0x240077bc, 0x008d0300, 0x000000f4 },
+ { 0x80800048, 0x220077bd, 0x008d0340, 0x000000f8 },
+ { 0x00800041, 0x240077bc, 0x008d02c0, 0x00000100 },
+ { 0x00800048, 0x240077bc, 0x008d0300, 0x00000104 },
+ { 0x80800048, 0x224077bd, 0x008d0340, 0x00000108 },
{ 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 },
diff --git a/src/shaders/render/exa_yuv_gen4.g4i b/src/shaders/render/exa_yuv_gen4.g4i
new file mode 100644
index 0000000..5a66616
--- /dev/null
+++ b/src/shaders/render/exa_yuv_gen4.g4i
@@ -0,0 +1,42 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Zhao Yakui <yakui.zhao@intel.com>
+ */
+
+/* YUV to RGB matrix coeff */
+
+define(`coef_ry', `g3.0<0,1,0>F')
+define(`coef_ru', `g3.4<0,1,0>F')
+define(`coef_rv', `g3.8<0,1,0>F')
+define(`coef_yd', `g3.12<0,1,0>F')
+
+define(`coef_gy', `g3.16<0,1,0>F')
+define(`coef_gu', `g3.20<0,1,0>F')
+define(`coef_gv', `g3.24<0,1,0>F')
+define(`coef_ud', `g3.28<0,1,0>F')
+
+define(`coef_by', `g4.0<0,1,0>F')
+define(`coef_bu', `g4.4<0,1,0>F')
+define(`coef_bv', `g4.8<0,1,0>F')
+define(`coef_vd', `g4.12<0,1,0>F')
diff --git a/src/shaders/render/exa_yuv_gen6.g4i b/src/shaders/render/exa_yuv_gen6.g4i
new file mode 100644
index 0000000..a8d69ee
--- /dev/null
+++ b/src/shaders/render/exa_yuv_gen6.g4i
@@ -0,0 +1,42 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Zhao Yakui <yakui.zhao@intel.com>
+ */
+/* YUV to RGB matrix coeff */
+
+
+define(`coef_ry', `g7.0<0,1,0>F')
+define(`coef_ru', `g7.4<0,1,0>F')
+define(`coef_rv', `g7.8<0,1,0>F')
+define(`coef_yd', `g7.12<0,1,0>F')
+
+define(`coef_gy', `g7.16<0,1,0>F')
+define(`coef_gu', `g7.20<0,1,0>F')
+define(`coef_gv', `g7.24<0,1,0>F')
+define(`coef_ud', `g7.28<0,1,0>F')
+
+define(`coef_by', `g8.0<0,1,0>F')
+define(`coef_bu', `g8.4<0,1,0>F')
+define(`coef_bv', `g8.8<0,1,0>F')
+define(`coef_vd', `g8.12<0,1,0>F')
diff --git a/src/shaders/render/exa_yuv_rgb.gxa b/src/shaders/render/exa_yuv_rgb.gxa
new file mode 100644
index 0000000..656ae73
--- /dev/null
+++ b/src/shaders/render/exa_yuv_rgb.gxa
@@ -0,0 +1,74 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Zhao Yakui <yakui.zhao@intel.com>
+ */
+
+define(`YCbCr_base', `src_sample_base')
+
+define(`Cr', `src_sample_b')
+define(`Cr_01', `src_sample_b_01')
+define(`Cr_23', `src_sample_b_23')
+
+define(`Y', `src_sample_r')
+define(`Y_01', `src_sample_r_01')
+define(`Y_23', `src_sample_r_23')
+
+define(`Cb', `src_sample_g')
+define(`Cb_01', `src_sample_g_01')
+define(`Cb_23', `src_sample_g_23')
+
+define(`Crn', `mask_sample_b')
+define(`Crn_01', `mask_sample_b_01')
+define(`Crn_23', `mask_sample_b_23')
+
+define(`Yn', `mask_sample_r')
+define(`Yn_01', `mask_sample_r_01')
+define(`Yn_23', `mask_sample_r_23')
+
+define(`Cbn', `mask_sample_g')
+define(`Cbn_01', `mask_sample_g_01')
+define(`Cbn_23', `mask_sample_g_23')
+
+add (16) Yn<1>F Y<8,8,1>F coef_yd { compr align1 };
+
+add (16) Cbn<1>F Cb<8,8,1>F coef_ud { compr align1 };
+
+add (16) Crn<1>F Cr<8,8,1>F coef_vd { compr align1 };
+
+mul (16) acc0<1>F Yn<8,8,1>F coef_ry { compr align1 };
+mac (16) acc0<1>F Cbn<8,8,1>F coef_ru { compr align1 };
+mac.sat (16) src_sample_r<1>F Crn<8,8,1>F coef_rv { compr align1 };
+
+mul (16) acc0<1>F Yn<8,8,1>F coef_gy { compr align1 };
+mac (16) acc0<1>F Cbn<8,8,1>F coef_gu { compr align1 };
+mac.sat(16) src_sample_g<1>F Crn<8,8,1>F coef_gv { compr align1 };
+
+mul (16) acc0<1>F Yn<8,8,1>F coef_by { compr align1 };
+mac (16) acc0<1>F Cbn<8,8,1>F coef_bu { compr align1 };
+mac.sat(16) src_sample_b<1>F Crn<8,8,1>F coef_bv { compr align1 };
+
+ /*
+ * A = 1.0
+ */
+mov (16) src_sample_a<1>F 1.0F { compr align1 };
--
1.8.3.2

View File

@ -1,130 +0,0 @@
From 9c5a739430029aece3b9e29bd3e3ae612e46c6f0 Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Fri, 22 Nov 2013 13:39:34 +0800
Subject: [PATCH 4/5] Support the BT709 color standard for conversion from YUV
to RGB
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
---
src/i965_output_dri.c | 7 +++++++
src/i965_render.c | 22 +++++++++++++++++-----
src/i965_render.h | 2 ++
3 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/src/i965_output_dri.c b/src/i965_output_dri.c
index de7be92..1467367 100644
--- a/src/i965_output_dri.c
+++ b/src/i965_output_dri.c
@@ -127,6 +127,7 @@ i965_put_surface_dri(
bool new_region = false;
uint32_t name;
int i, ret;
+ unsigned int color_flag = 0;
/* Currently don't support DRI1 */
if (!VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_DRI2))
@@ -179,6 +180,12 @@ i965_put_surface_dri(
assert(ret == 0);
}
+ color_flag = flags & VA_SRC_COLOR_MASK;
+ if (color_flag == 0)
+ color_flag = VA_SRC_BT601;
+
+ pp_flag = color_flag;
+
if ((flags & VA_FILTER_SCALING_MASK) == VA_FILTER_SCALING_NL_ANAMORPHIC)
pp_flag |= I965_PP_FLAG_AVS;
diff --git a/src/i965_render.c b/src/i965_render.c
index 5b1a1a5..5be8a96 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -317,6 +317,12 @@ static float yuv_to_rgb_bt601[3][4] = {
{1.164, 2.017, 0, -0.50196,},
};
+static float yuv_to_rgb_bt709[3][4] = {
+{1.164, 0, 1.793, -0.06275,},
+{1.164, -0.213, -0.533, -0.50196,},
+{1.164, 2.112, 0, -0.50196,},
+};
+
static void
i965_render_vs_unit(VADriverContextP ctx)
{
@@ -1066,7 +1072,8 @@ i965_render_upload_vertex(
static void
i965_render_upload_constants(VADriverContextP ctx,
- struct object_surface *obj_surface)
+ struct object_surface *obj_surface,
+ unsigned int flags)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct i965_render_state *render_state = &i965->render_state;
@@ -1077,6 +1084,7 @@ i965_render_upload_constants(VADriverContextP ctx,
float hue = (float)i965->hue_attrib->value / 180 * PI;
float saturation = (float)i965->saturation_attrib->value / DEFAULT_SATURATION;
float *yuv_to_rgb;
+ unsigned int color_flag;
dri_bo_map(render_state->curbe.bo, 1);
assert(render_state->curbe.bo->virtual);
@@ -1107,8 +1115,12 @@ i965_render_upload_constants(VADriverContextP ctx,
*color_balance_base++ = cos(hue) * contrast * saturation;
*color_balance_base++ = sin(hue) * contrast * saturation;
+ color_flag = flags & VA_SRC_COLOR_MASK;
yuv_to_rgb = (float *)constant_buffer + 8;
- memcpy(yuv_to_rgb, yuv_to_rgb_bt601, sizeof(yuv_to_rgb_bt601));
+ if (color_flag == VA_SRC_BT709)
+ memcpy(yuv_to_rgb, yuv_to_rgb_bt709, sizeof(yuv_to_rgb_bt709));
+ else
+ memcpy(yuv_to_rgb, yuv_to_rgb_bt601, sizeof(yuv_to_rgb_bt601));
dri_bo_unmap(render_state->curbe.bo);
}
@@ -1155,7 +1167,7 @@ i965_surface_render_state_setup(
i965_render_cc_viewport(ctx);
i965_render_cc_unit(ctx);
i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect);
- i965_render_upload_constants(ctx, obj_surface);
+ i965_render_upload_constants(ctx, obj_surface, flags);
}
static void
@@ -1842,7 +1854,7 @@ gen6_render_setup_states(
gen6_render_color_calc_state(ctx);
gen6_render_blend_state(ctx);
gen6_render_depth_stencil_state(ctx);
- i965_render_upload_constants(ctx, obj_surface);
+ i965_render_upload_constants(ctx, obj_surface, flags);
i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect);
}
@@ -2436,7 +2448,7 @@ gen7_render_setup_states(
gen7_render_color_calc_state(ctx);
gen7_render_blend_state(ctx);
gen7_render_depth_stencil_state(ctx);
- i965_render_upload_constants(ctx, obj_surface);
+ i965_render_upload_constants(ctx, obj_surface, flags);
i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect);
}
diff --git a/src/i965_render.h b/src/i965_render.h
index f09b535..1960ace 100644
--- a/src/i965_render.h
+++ b/src/i965_render.h
@@ -33,6 +33,8 @@
#define NUM_RENDER_KERNEL 3
+#define VA_SRC_COLOR_MASK 0x000000f0
+
#include "i965_post_processing.h"
struct i965_kernel;
--
1.8.3.2

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@ -1,40 +0,0 @@
From a653c376d7650bf967a753cd4bda68bfeab5f4eb Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Fri, 22 Nov 2013 13:39:34 +0800
Subject: [PATCH 5/5] Support the smpte240m color standard for conversion from
YUV to RGB
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
---
src/i965_render.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/src/i965_render.c b/src/i965_render.c
index 5be8a96..92270cb 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -323,6 +323,12 @@ static float yuv_to_rgb_bt709[3][4] = {
{1.164, 2.112, 0, -0.50196,},
};
+static float yuv_to_rgb_smpte_240[3][4] = {
+{1.164, 0, 1.794, -0.06275,},
+{1.164, -0.258, -0.5425, -0.50196,},
+{1.164, 2.078, 0, -0.50196,},
+};
+
static void
i965_render_vs_unit(VADriverContextP ctx)
{
@@ -1119,6 +1125,8 @@ i965_render_upload_constants(VADriverContextP ctx,
yuv_to_rgb = (float *)constant_buffer + 8;
if (color_flag == VA_SRC_BT709)
memcpy(yuv_to_rgb, yuv_to_rgb_bt709, sizeof(yuv_to_rgb_bt709));
+ else if (color_flag == VA_SRC_SMPTE_240)
+ memcpy(yuv_to_rgb, yuv_to_rgb_smpte_240, sizeof(yuv_to_rgb_smpte_240));
else
memcpy(yuv_to_rgb, yuv_to_rgb_bt601, sizeof(yuv_to_rgb_bt601));
--
1.8.3.2

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@ -1,35 +0,0 @@
diff --git a/src/gen75_vpp_vebox.c b/src/gen75_vpp_vebox.c
index a973ed4..ff1dd11 100644
--- a/src/gen75_vpp_vebox.c
+++ b/src/gen75_vpp_vebox.c
@@ -140,7 +140,7 @@ void hsw_veb_dndi_table(VADriverContextP ctx, struct intel_vebox_context *proc_c
assert(di_param);
progressive_dn = 0;
- dndi_top_first = !(di_param->flags & VA_DEINTERLACING_BOTTOM_FIELD_FIRST);
+ dndi_top_first = !(di_param->flags & VA_DEINTERLACING_BOTTOM_FIELD);
}
/*
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 536eb64..ccdd54c 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -3215,7 +3215,7 @@ pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_contex
int dndi_top_first = 1;
VAProcFilterParameterBufferDeinterlacing *di_filter_param = (VAProcFilterParameterBufferDeinterlacing *)filter_param;
- if (di_filter_param->flags & VA_DEINTERLACING_BOTTOM_FIELD_FIRST)
+ if (di_filter_param->flags & VA_DEINTERLACING_BOTTOM_FIELD)
dndi_top_first = 0;
else
dndi_top_first = 1;
@@ -3617,7 +3617,7 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c
VAProcFilterParameterBufferDeinterlacing *di_filter_param = (VAProcFilterParameterBufferDeinterlacing *)filter_param;
int is_first_frame = (pp_dndi_context->frame_order == -1);
- if (di_filter_param->flags & VA_DEINTERLACING_BOTTOM_FIELD_FIRST)
+ if (di_filter_param->flags & VA_DEINTERLACING_BOTTOM_FIELD)
dndi_top_first = 0;
else
dndi_top_first = 1;

View File

@ -20,40 +20,14 @@
################################################################################
# Wait for the network to come up and exit after timeout or if network is online
#
# Usage:
# cm-online [--timeout=n] [--verbose]
# --timeout : timeout in sec. (default 30)
# --verbose : print status on exit
#
# Exit status:
# (0) Network online
# (1) Network not online
TIMEOUT=30
for arg in $@; do
case $arg in
--timeout=*)
TIMEOUT="${arg#*=}"
;;
--verbose)
VERBOSE=yes
;;
esac
done
# default 30sec
[ ! -z $1 ] && TIMEOUT=$1 || TIMEOUT=30
LOOP_COUNT=$((TIMEOUT * 4))
for i in $(seq 1 $LOOP_COUNT) ; do
STATUS=$(ifconfig | sed -e '/inet addr:/!d' -e '/127.0.0.1/d' |wc -l)
if [ "$STATUS" -gt 0 ]; then
[ "$VERBOSE" = yes ] && echo "Network is online"
exit 0
fi
[ "$STATUS" -gt 0 ] && break
usleep 250000
done
[ "$VERBOSE" = yes ] && echo "Network is down"
exit 1

View File

@ -144,14 +144,6 @@
writable = yes
root preexec = mkdir -p /storage/screenshots
[Media]
path = /media
available = yes
browsable = yes
public = yes
writable = yes
root preexec = mkdir -p /media
[Logfiles]
path = /storage/logfiles
available = yes

View File

@ -181,6 +181,7 @@ makeinstall_target() {
mkdir -p $INSTALL/usr/lib/samba
cp $PKG_DIR/scripts/samba-config $INSTALL/usr/lib/samba
cp $PKG_DIR/scripts/samba-autoshare $INSTALL/usr/lib/samba
if [ -f $PROJECT_DIR/$PROJECT/config/smb.conf ]; then
mkdir -p $INSTALL/etc/samba

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@ -0,0 +1,28 @@
#!/bin/sh
################################################################################
# This file is part of OpenELEC - http://www.openelec.tv
# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv)
#
# This Program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This Program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with OpenELEC.tv; see the file COPYING. If not, write to
# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA.
# http://www.gnu.org/copyleft/gpl.html
################################################################################
if [ -f /storage/.cache/services/samba.conf ]; then
. /storage/.cache/services/samba.conf
if [ "$SAMBA_AUTOSHARE" == "true" ] ; then
systemctl restart smbd.service
fi
fi

View File

@ -33,6 +33,16 @@ if [ -f /storage/.cache/services/samba.conf ]; then
cp $SMB_DEFCONF $SMB_CONF
fi
# handle external drives
if [ "$SAMBA_AUTOSHARE" == "true" ] ; then
for dir in /media/* ; do
if [ -d "$dir" ] ; then
name=$(basename "$dir")
echo -e "[$name]\n path = $dir\n available = yes\n browsable = yes\n public = yes\n writable = yes\n" >> $SMB_CONF
fi
done
fi
# only letters & numbers permitted for username & password
SAMBA_USERNAME=`echo $SAMBA_USERNAME | sed "s/[^a-zA-Z0-9]//g;"`
SAMBA_PASSWORD=`echo $SAMBA_PASSWORD | sed "s/[^a-zA-Z0-9]//g;"`

View File

@ -12,6 +12,7 @@ PIDFile=/var/run/nmbd-smb.conf.pid
ExecStart=/usr/bin/nmbd --configfile=/run/samba/smb.conf
ExecReload=/bin/kill -HUP $MAINPID
TimeoutStopSec=1s
StartLimitInterval=0
[Install]
WantedBy=multi-user.target

View File

@ -8,4 +8,4 @@ ConditionPathExists=/storage/.cache/services/samba.conf
[Service]
Type=oneshot
ExecStart=/usr/lib/samba/samba-config
StartLimitInterval=0

View File

@ -13,6 +13,7 @@ LimitNOFILE=16384
ExecStart=/usr/bin/smbd --configfile=/run/samba/smb.conf
ExecReload=/bin/kill -HUP $MAINPID
TimeoutStopSec=1s
StartLimitInterval=0
[Install]
WantedBy=multi-user.target

View File

@ -5,4 +5,6 @@ Description=Udevil mount service
Type=oneshot
ExecStart=-/usr/bin/udevil --mount %I
ExecStop=-/usr/bin/udevil --umount %I
ExecStartPost=-/usr/lib/samba/samba-autoshare
ExecStopPost=-/usr/lib/samba/samba-autoshare
RemainAfterExit=yes

View File

@ -27,6 +27,7 @@ PKG_SITE="http://xmlsoft.org"
PKG_URL="ftp://xmlsoft.org/libxml2/$PKG_NAME-$PKG_VERSION.tar.gz"
PKG_DEPENDS="zlib"
PKG_BUILD_DEPENDS_TARGET="toolchain zlib"
PKG_BUILD_DEPENDS_HOST="toolchain zlib:host Python-host"
PKG_PRIORITY="optional"
PKG_SECTION="textproc"
PKG_SHORTDESC="libxml: XML parser library for Gnome"

View File

@ -24,8 +24,8 @@ PKG_REV="1"
PKG_ARCH="i386 x86_64"
PKG_LICENSE="nonfree"
PKG_SITE="http://www.nvidia.com/"
[ "$TARGET_ARCH" = "i386" ] && PKG_URL="http://download.nvidia.com/XFree86/Linux-x86/$PKG_VERSION/NVIDIA-Linux-x86-$PKG_VERSION.run"
[ "$TARGET_ARCH" = "x86_64" ] && PKG_URL="http://download.nvidia.com/XFree86/Linux-x86_64/$PKG_VERSION/NVIDIA-Linux-x86_64-$PKG_VERSION-no-compat32.run"
[ "$TARGET_ARCH" = "i386" ] && PKG_URL="http://us.download.nvidia.com/XFree86/Linux-x86/$PKG_VERSION/NVIDIA-Linux-x86-$PKG_VERSION.run"
[ "$TARGET_ARCH" = "x86_64" ] && PKG_URL="http://us.download.nvidia.com/XFree86/Linux-x86_64/$PKG_VERSION/NVIDIA-Linux-x86_64-$PKG_VERSION-no-compat32.run"
PKG_DEPENDS="linux libXinerama"
PKG_BUILD_DEPENDS="toolchain util-macros linux xorg-server"
PKG_NEED_UNPACK="$LINUX_DEPENDS"

View File

@ -2100,7 +2100,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set

View File

@ -1810,7 +1810,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set

View File

@ -2122,7 +2122,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set

View File

@ -2101,7 +2101,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set

View File

@ -1565,7 +1565,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set

View File

@ -2121,7 +2121,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set

View File

@ -2100,7 +2100,7 @@ CONFIG_VIDEOBUF2_MEMOPS=m
CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_V4L2_INT_DEVICE is not set
CONFIG_DVB_CORE=m
# CONFIG_DVB_NET is not set
CONFIG_DVB_NET=y
CONFIG_TTPCI_EEPROM=m
CONFIG_DVB_MAX_ADAPTERS=8
# CONFIG_DVB_DYNAMIC_MINORS is not set