diff --git a/packages/graphics/mali-rockchip/package.mk b/packages/graphics/mali-rockchip/package.mk index 1216ff54db..67f3e3b11d 100644 --- a/packages/graphics/mali-rockchip/package.mk +++ b/packages/graphics/mali-rockchip/package.mk @@ -104,7 +104,7 @@ makeinstall_target() { mkdir -p $INSTALL/usr/lib/modules-load.d if [ "$MALI_FAMILY" = "t760" -o "$MALI_FAMILY" = "t860" ]; then - echo "mali_kbase" > $INSTALL/usr/lib/modules-load.d/mali.conf + echo "midgard_kbase" > $INSTALL/usr/lib/modules-load.d/mali.conf elif [ "$MALI_FAMILY" = "450" -o "$MALI_FAMILY" = "400" ]; then echo "mali" > $INSTALL/usr/lib/modules-load.d/mali.conf fi diff --git a/packages/linux/package.mk b/packages/linux/package.mk index 65f8c78cbd..bb31df9053 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -47,8 +47,8 @@ case "$LINUX" in PKG_DEPENDS_TARGET="$PKG_DEPENDS_TARGET aml-dtbtools:host" ;; rockchip-4.4) - PKG_VERSION="7b43537e" - PKG_SHA256="f934e8364308388868edd8d89f6fa71af8516a9b25bfaa1451bdc1b473735fdc" + PKG_VERSION="eae92ae2" + PKG_SHA256="da453ca6ecefc3719a1165bc7b08fe00fc2b50ab64f6289ef6f3670a9fc1ceca" PKG_URL="https://github.com/rockchip-linux/kernel/archive/$PKG_VERSION.tar.gz" PKG_SOURCE_DIR="kernel-$PKG_VERSION*" PKG_PATCH_DIRS="rockchip-4.4" diff --git a/projects/Rockchip/README.md b/projects/Rockchip/README.md index 4fa5486a86..21c2034b42 100644 --- a/projects/Rockchip/README.md +++ b/projects/Rockchip/README.md @@ -16,6 +16,8 @@ This project is for Rockchip SoC devices **RK3399** * [96rocks ROCK960](devices/RK3399) +* [Hardkernel ODROID-N1](devices/RK3399) +* [PINE64 RockPro64](devices/RK3399) * [Rockchip Sapphire Board](devices/RK3399) **My single-board computer is not listed, will it be added in the future?**
diff --git a/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf b/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf index e14a0b1b05..ef452a4adb 100644 --- a/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf +++ b/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.4.112 Kernel Configuration +# Linux/arm 4.4.114 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y @@ -1976,6 +1976,8 @@ CONFIG_CHARGER_BQ24735=y # CONFIG_BATTERY_EC is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set # CONFIG_BATTERY_RK818 is not set # CONFIG_CHARGER_RK818 is not set # CONFIG_CHARGER_RT9455 is not set @@ -2467,6 +2469,8 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" # CONFIG_MALI_TRACE_TIMELINE is not set # CONFIG_MALI_SYSTEM_TRACE is not set # CONFIG_MALI_GPU_MMU_AARCH64 is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2709,7 +2713,9 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set # CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y CONFIG_SND_SOC_RT5616=y # CONFIG_SND_SOC_RT5631 is not set @@ -4092,6 +4098,7 @@ CONFIG_NLS_UTF8=y # printk and dmesg options # CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y diff --git a/projects/Rockchip/devices/RK3328/README.md b/projects/Rockchip/devices/RK3328/README.md index c821507ba5..685eca9b81 100644 --- a/projects/Rockchip/devices/RK3328/README.md +++ b/projects/Rockchip/devices/RK3328/README.md @@ -5,7 +5,8 @@ This is a SoC device for RK3328 **Build** * `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box make image` -* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box-plus make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box-trn9 make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box-z28 make image` * `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=roc-cc make image` * `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=rock64 make image` * `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=rockbox make image` diff --git a/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf b/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf index f064a54541..674c8cf8e0 100644 --- a/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 4.4.112 Kernel Configuration +# Linux/arm64 4.4.114 Kernel Configuration # CONFIG_ARM64=y CONFIG_64BIT=y @@ -2119,6 +2119,8 @@ CONFIG_CHARGER_BQ24735=y # CONFIG_BATTERY_EC is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set # CONFIG_BATTERY_RK818 is not set # CONFIG_CHARGER_RK818 is not set # CONFIG_CHARGER_RT9455 is not set @@ -2619,7 +2621,7 @@ CONFIG_MALI450=y # CONFIG_MALI400_PROFILING is not set # CONFIG_MALI400_UMP is not set CONFIG_MALI_DMA_BUF_MAP_ON_ATTACH=y -CONFIG_MALI_SHARED_INTERRUPTS=y +# CONFIG_MALI_SHARED_INTERRUPTS is not set # CONFIG_MALI_PMU_PARALLEL_POWER_UP is not set CONFIG_MALI_DT=y CONFIG_MALI_DEVFREQ=y @@ -2627,6 +2629,8 @@ CONFIG_MALI_DEVFREQ=y CONFIG_MALI_MIDGARD_FOR_ANDROID=y # CONFIG_MALI_MIDGARD_FOR_LINUX is not set # CONFIG_MALI_MIDGARD is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2895,7 +2899,9 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set CONFIG_SND_SOC_RK3328=y +# CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y CONFIG_SND_SOC_RT5616=y # CONFIG_SND_SOC_RT5631 is not set @@ -4344,6 +4350,7 @@ CONFIG_NLS_UTF8=y # printk and dmesg options # CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y diff --git a/projects/Rockchip/devices/RK3328/options b/projects/Rockchip/devices/RK3328/options index 0b1310a92b..28624f8eca 100644 --- a/projects/Rockchip/devices/RK3328/options +++ b/projects/Rockchip/devices/RK3328/options @@ -27,7 +27,8 @@ # Additional kernel make parameters (for example to specify the u-boot loadaddress) KERNEL_MAKE_EXTRACMD="" KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box.dtb" - KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box-plus.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box-trn9.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box-z28.dtb" KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-roc-cc.dtb" KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-rock64.dtb" KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-rockbox.dtb" diff --git a/projects/Rockchip/devices/RK3399/README.md b/projects/Rockchip/devices/RK3399/README.md index b586208d21..2c9e8cbfeb 100644 --- a/projects/Rockchip/devices/RK3399/README.md +++ b/projects/Rockchip/devices/RK3399/README.md @@ -4,5 +4,7 @@ This is a SoC device for RK3399 **Build** +* `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=odroidn1 make image` * `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=rock960 make image` +* `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=rockpro64 make image` * `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=sapphire make image` diff --git a/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf b/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf index 6dd2af3e15..9f9c512614 100644 --- a/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 4.4.112 Kernel Configuration +# Linux/arm64 4.4.114 Kernel Configuration # CONFIG_ARM64=y CONFIG_64BIT=y @@ -2119,6 +2119,8 @@ CONFIG_CHARGER_BQ24735=y # CONFIG_BATTERY_EC is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set # CONFIG_BATTERY_RK818 is not set # CONFIG_CHARGER_RK818 is not set # CONFIG_CHARGER_RT9455 is not set @@ -2421,7 +2423,7 @@ CONFIG_MFD_TPS6586X=y # CONFIG_MFD_RK1000 is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set -# CONFIG_FUSB_30X is not set +CONFIG_FUSB_30X=y CONFIG_REGULATOR=y CONFIG_REGULATOR_DEBUG=y CONFIG_REGULATOR_FIXED_VOLTAGE=y @@ -2631,6 +2633,8 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" # CONFIG_MALI_TRACE_TIMELINE is not set # CONFIG_MALI_SYSTEM_TRACE is not set # CONFIG_MALI_GPU_MMU_AARCH64 is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2899,7 +2903,9 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set CONFIG_SND_SOC_RK3328=y +# CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y CONFIG_SND_SOC_RT5616=y # CONFIG_SND_SOC_RT5631 is not set @@ -4348,6 +4354,7 @@ CONFIG_NLS_UTF8=y # printk and dmesg options # CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y diff --git a/projects/Rockchip/devices/RK3399/options b/projects/Rockchip/devices/RK3399/options index 4063f4839f..7249edb0be 100644 --- a/projects/Rockchip/devices/RK3399/options +++ b/projects/Rockchip/devices/RK3399/options @@ -26,7 +26,9 @@ # Additional kernel make parameters (for example to specify the u-boot loadaddress) KERNEL_MAKE_EXTRACMD="" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-odroidn1.dtb" KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-rock960.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-rockpro64.dtb" KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-sapphire.dtb" # Mali GPU family diff --git a/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf b/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf index 50e38b9864..b243f9c722 100644 --- a/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf +++ b/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.4.112 Kernel Configuration +# Linux/arm 4.4.114 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y @@ -1976,6 +1976,8 @@ CONFIG_CHARGER_BQ24735=y # CONFIG_BATTERY_EC is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set # CONFIG_BATTERY_RK818 is not set # CONFIG_CHARGER_RK818 is not set # CONFIG_CHARGER_RT9455 is not set @@ -2467,6 +2469,8 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" # CONFIG_MALI_TRACE_TIMELINE is not set # CONFIG_MALI_SYSTEM_TRACE is not set # CONFIG_MALI_GPU_MMU_AARCH64 is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2709,7 +2713,9 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set # CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y CONFIG_SND_SOC_RT5616=y # CONFIG_SND_SOC_RT5631 is not set @@ -4092,6 +4098,7 @@ CONFIG_NLS_UTF8=y # printk and dmesg options # CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y diff --git a/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch index 288827377f..bf75e56d6b 100644 --- a/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch +++ b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch @@ -1,4 +1,4 @@ -From 61d54b00c343c81af975a9742c17a01e4c343a31 Mon Sep 17 00:00:00 2001 +From f490b48f29fb0b976b7f3d749f14dd4bbb95705a Mon Sep 17 00:00:00 2001 From: Ziyuan Xu Date: Fri, 23 Sep 2016 13:43:18 +0800 Subject: [PATCH] MINIARM: HACK: switch vccio_sd to 3.3v while shutdowning @@ -46,7 +46,7 @@ index 29e3ae99edbc..531ad93ff912 100644 .name = "dwmmc_rockchip", .of_match_table = dw_mci_rockchip_match, -From 834b425c19718d57c528806800a90ea0ac528472 Mon Sep 17 00:00:00 2001 +From dcd64488045c2c7b54f4257a0f5e6d56f93f28f6 Mon Sep 17 00:00:00 2001 From: Ziyuan Xu Date: Mon, 6 Feb 2017 08:39:46 +0800 Subject: [PATCH] MINIARM: HACK: mmc: dw_mmc-rockchip: enable vmmc supply for @@ -87,7 +87,7 @@ index 531ad93ff912..eae304077e17 100644 if (!IS_ERR(mmc->supply.vqmmc)) regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); -From ae8ebf01d7ff8e736cf85a720597ca9c94a1709a Mon Sep 17 00:00:00 2001 +From 6947d06a6b9bccb4fca863cb40638b3cdf487fa8 Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Sat, 22 Jul 2017 19:55:09 +0800 Subject: [PATCH] MINIARM: drm/rockchip: update phy settings @@ -99,10 +99,10 @@ Signed-off-by: Jacob Chen 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 257d0d0dcc3d..0c66a27bea93 100644 +index bdc96cd4253d..cea7b9d6bdb3 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -345,8 +345,7 @@ static struct dw_hdmi_phy_config rockchip_phy_config[] = { +@@ -347,8 +347,7 @@ static struct dw_hdmi_phy_config rockchip_phy_config[] = { /*pixelclk symbol term vlev*/ { 74250000, 0x8009, 0x0004, 0x0272}, { 165000000, 0x802b, 0x0004, 0x0209}, @@ -113,7 +113,7 @@ index 257d0d0dcc3d..0c66a27bea93 100644 }; -From 79fb3a561bf55774b571c737537cada202f78044 Mon Sep 17 00:00:00 2001 +From 8b96d29710578f258442bb7975581e30c5c1a209 Mon Sep 17 00:00:00 2001 From: Nickey Yang Date: Mon, 17 Jul 2017 16:35:34 +0800 Subject: [PATCH] MINIARM: set npll be used for hdmi only @@ -126,7 +126,7 @@ Signed-off-by: Nickey Yang 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 0af92bd2a723..70f8a69cc9bd 100644 +index b37d1954d27c..904a7955e347 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1027,7 +1027,7 @@ @@ -148,7 +148,7 @@ index 0af92bd2a723..70f8a69cc9bd 100644 vopb_out: port { diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c -index 72797f9479db..f79ebd843379 100644 +index 4adbace24ff7..9df15059d584 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -211,9 +211,9 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { @@ -173,7 +173,7 @@ index 72797f9479db..f79ebd843379 100644 RK3288_CLKGATE_CON(3), 1, GFLAGS), COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0, -From 559fff078aedf673e1e4e191ec9a5eddc2a87f88 Mon Sep 17 00:00:00 2001 +From 07d84a3e6f43def7af179d417224a610ca7aaf98 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 11 Dec 2017 23:09:54 +0100 Subject: [PATCH] clk: rockchip: rk3288: add more pixel clock rates @@ -183,7 +183,7 @@ Subject: [PATCH] clk: rockchip: rk3288: add more pixel clock rates 1 file changed, 75 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c -index f79ebd843379..412a0165ec57 100644 +index 9df15059d584..e1f3bd273a58 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -84,23 +84,94 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = { diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch index 55c3275c2f..9b9eafe7d5 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch @@ -1,4 +1,4 @@ -From 7d28363c78715dbc7d9e9c3ea1208c000357e60f Mon Sep 17 00:00:00 2001 +From 3ab7c88ff74eb4f8f1eb9a8d4e27661a8e8f2103 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Mar 2017 23:51:09 +0200 Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor @@ -47,7 +47,7 @@ index 9b00cce9b2b3..739ac83b484f 100644 /* * Power Management poweroff tick granuality. This is in nanoseconds to -From 05bf0dd806a0621d8daf1a0ca0a057db52c766c7 Mon Sep 17 00:00:00 2001 +From c49efbd36cf0b4d676adee155d3c68862c93d400 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 17 Apr 2017 13:09:16 +0200 Subject: [PATCH] sound/usb/quirks-table: add Realtek ALC4040 @@ -75,7 +75,7 @@ index 8a59d4782a0f..96e1e2fdc9c3 100644 + #undef USB_DEVICE_VENDOR_SPEC -From b9abd7bdaf549b7ab366ed00bf2bda82a3f27de2 Mon Sep 17 00:00:00 2001 +From 9224460a1f2208076d8b67454603db5415dcb992 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 May 2017 09:08:50 +0200 Subject: [PATCH] gpu/arm/mali400: default to performance gpu governor @@ -98,20 +98,20 @@ index 3eac07d76766..14916ea86905 100644 mali_devfreq_term_freq_table(mdev); return PTR_ERR(mdev->devfreq); -From b23910f4b14b183874bb6ae3d2312a0dbb819558 Mon Sep 17 00:00:00 2001 +From 2d2af9eb328f709fc6b8bc63c42699dd22932e3e Mon Sep 17 00:00:00 2001 From: LongChair Date: Fri, 21 Apr 2017 13:39:12 +0200 Subject: [PATCH] drm/rockchip: remove unsupported 4K freqs --- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 257d0d0dcc3d..f3571e417c6c 100644 +index bdc96cd4253d..b22e7a67024f 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -506,9 +506,19 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, +@@ -508,9 +508,23 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, return MODE_BAD; hdmi = to_rockchip_hdmi(encoder); @@ -128,12 +128,16 @@ index 257d0d0dcc3d..f3571e417c6c 100644 + /* Skip 4K 50/60Hz clocks for RK3328 */ + if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000) + return MODE_CLOCK_RANGE; ++ ++ /* Skip 4K 50/60Hz clocks for RK3399 */ ++ if (hdmi->dev_type == RK3399_HDMI && mode->clock > 340000) ++ return MODE_CLOCK_RANGE; + /* * ensure all drm display mode can work, if someone want support more * resolutions, please limit the possible_crtc, only connect to -From d60669d40ac968f4a6f2d43dfe0ed4a1960cb50f Mon Sep 17 00:00:00 2001 +From 66db06144315ec2212c9724f57291acadeffe8d8 Mon Sep 17 00:00:00 2001 From: xuhuicong Date: Fri, 23 Jun 2017 18:56:17 +0800 Subject: [PATCH] drm/rockchip: hdmi: fix no sound some time @@ -145,10 +149,10 @@ Signed-off-by: xuhuicong 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 3616265dae0c..6f220dffe345 100644 +index a7f2e381a5bd..df2f72fbf93a 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1967,10 +1967,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, +@@ -1981,10 +1981,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, HDMI_FC_INVIDCONF_IN_I_P_INTERLACED : HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE; @@ -159,7 +163,7 @@ index 3616265dae0c..6f220dffe345 100644 hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); hdisplay = mode->hdisplay; -@@ -2268,6 +2264,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) +@@ -2282,6 +2278,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) /* not for DVI mode */ if (hdmi->sink_is_hdmi) { dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__); @@ -170,7 +174,7 @@ index 3616265dae0c..6f220dffe345 100644 /* HDMI Initialization Step F - Configure AVI InfoFrame */ hdmi_config_AVI(hdmi, mode); -From 8697d61bca564c67696cc10c0188b02ac3371309 Mon Sep 17 00:00:00 2001 +From 61d75a50a3eb5c9f7894d102749c1aed2cb69db8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 25 Aug 2017 18:29:35 +0200 Subject: [PATCH] video: rockchip: vpu: partial revise for rk322xh feature @@ -180,10 +184,10 @@ Subject: [PATCH] video: rockchip: vpu: partial revise for rk322xh feature 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c -index 4b2eb9093d35..7dae54e2c984 100644 +index 9236c5e93215..bdc4722f4e3a 100644 --- a/drivers/video/rockchip/vcodec/vcodec_service.c +++ b/drivers/video/rockchip/vcodec/vcodec_service.c -@@ -3662,21 +3662,15 @@ static irqreturn_t vdpu_irq(int irq, void *dev_id) +@@ -3630,21 +3630,15 @@ static irqreturn_t vdpu_irq(int irq, void *dev_id) time_record(task, 1); vpu_debug(DEBUG_IRQ_STATUS, "vdpu_irq dec status %08x\n", dec_status); @@ -209,7 +213,7 @@ index 4b2eb9093d35..7dae54e2c984 100644 time_diff(task); pservice->irq_status = raw_status; -From 6b89c0851c7b9e5f30a344d7d9d10f339908406b Mon Sep 17 00:00:00 2001 +From 336b80f1b8830171de634f41d29f6153a8ccac14 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 2 Oct 2017 21:53:19 +0200 Subject: [PATCH] drm/rockchip: use limited range @@ -219,7 +223,7 @@ Subject: [PATCH] drm/rockchip: use limited range 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 6f220dffe345..fde18ec6cb7f 100644 +index df2f72fbf93a..f603eeadaa1b 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -147,6 +147,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { @@ -260,7 +264,7 @@ index 6f220dffe345..fde18ec6cb7f 100644 V4L2_YCBCR_ENC_601) csc_coeff = &csc_coeff_rgb_out_eitu601; -From 4ff657ebf2730706c0929f341e5c403b0841cceb Mon Sep 17 00:00:00 2001 +From 63c7038ff1424b8362ccaa5c8c5907ed285284fc Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 18 Nov 2017 11:09:39 +0100 Subject: [PATCH] rockchip: vop: force skip lines if image too big @@ -270,10 +274,10 @@ Subject: [PATCH] rockchip: vop: force skip lines if image too big 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 2426c0f7d6ac..df44b8028a4e 100644 +index 3e6798b4b821..23516a195261 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1565,6 +1565,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1584,6 +1584,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, int ymirror, xmirror; uint32_t val; bool rb_swap, global_alpha_en; @@ -281,7 +285,7 @@ index 2426c0f7d6ac..df44b8028a4e 100644 /* * can't update plane when vop is disabled. -@@ -1578,8 +1579,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1597,8 +1598,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, } mode = &crtc->state->adjusted_mode; @@ -297,7 +301,7 @@ index 2426c0f7d6ac..df44b8028a4e 100644 act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); dsp_info = (drm_rect_height(dest) - 1) << 16; -@@ -1601,10 +1608,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1620,10 +1627,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, VOP_WIN_SET(vop, win, xmirror, xmirror); VOP_WIN_SET(vop, win, ymirror, ymirror); VOP_WIN_SET(vop, win, format, vop_plane_state->format); @@ -311,7 +315,7 @@ index 2426c0f7d6ac..df44b8028a4e 100644 } VOP_WIN_SET(vop, win, fmt_10, is_yuv_10bit(fb->pixel_format)); -From 65b437251804b8055f6a320e88068a4e8ac1dc1d Mon Sep 17 00:00:00 2001 +From 2fef240b349e8adbf74f672a2203453839a59ee2 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 18 Nov 2017 23:17:24 +0100 Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor @@ -359,7 +363,7 @@ index e674cc2ea183..0f11388acfd7 100644 /* * Power Management poweroff tick granuality. This is in nanoseconds to -From 5fa6f2d6940c197ce66eb6c9dc9b66b8439c8b9b Mon Sep 17 00:00:00 2001 +From 0dbe82f20d885716f74242621fe96a914db03064 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 10 Dec 2017 14:16:09 +0100 Subject: [PATCH] uapi: install rockchip_drm header @@ -381,7 +385,7 @@ index 38d437096c35..b7ae9969d41e 100644 header-y += sis_drm.h header-y += tegra_drm.h -From 5fd93ac070893b22220c3bf22a2a94d820f09710 Mon Sep 17 00:00:00 2001 +From f166ba88945f1ea7ff327bb9f22f53aed728dde3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 10 Dec 2017 18:03:53 +0100 Subject: [PATCH] phy: rockchip-inno-hdmi-phy: add vesa dmt pixel clocks @@ -391,7 +395,7 @@ Subject: [PATCH] phy: rockchip-inno-hdmi-phy: add vesa dmt pixel clocks 1 file changed, 71 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c -index 5b28b33e8be4..f1915d4e7e01 100644 +index ca50c8f58c50..2455c87ab5d8 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c @@ -245,6 +245,77 @@ static const struct pre_pll_config pre_pll_cfg_table[] = { @@ -473,7 +477,7 @@ index 5b28b33e8be4..f1915d4e7e01 100644 }; -From ddcf34bd97e390948a327cb152e0c3ea8641c0da Mon Sep 17 00:00:00 2001 +From 1a99dae778ad3402f8283aa19b27ea606fdfcd4c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 12 Dec 2017 00:37:27 +0100 Subject: [PATCH] clk: rockchip: fix round rate @@ -483,7 +487,7 @@ Subject: [PATCH] clk: rockchip: fix round rate 1 file changed, 11 insertions(+) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c -index 781a92909a7c..ec41034041d0 100644 +index 80d1d4095f2e..e4f64087aa78 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -299,6 +299,17 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings( @@ -505,7 +509,7 @@ index 781a92909a7c..ec41034041d0 100644 } -From 67aa835849326a6cb61b0b3b5470a0a14611bae8 Mon Sep 17 00:00:00 2001 +From 6e9921f5c0511283de78b221cc204d6aad53e68f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 21 Jan 2018 17:20:00 +0100 Subject: [PATCH] drm: fix HDR metadata infoframe length @@ -522,10 +526,10 @@ Fixes activation of HDR mode on my LG OLED 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index fde18ec6cb7f..48c46f4b25ae 100644 +index f603eeadaa1b..affba6ab8163 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1845,7 +1845,7 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) +@@ -1859,7 +1859,7 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) return; } @@ -552,7 +556,7 @@ index 3e3ebdf34e9f..d06786a58ca1 100644 for (i = 0; i < 3; i++) { frame->display_primaries_x[i] = -From 57597be2f7639355547ec5da5196cc09109fcd47 Mon Sep 17 00:00:00 2001 +From 83b81c3876baf020491ee497f637b01c45eef059 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 27 Jan 2018 09:39:09 +0100 Subject: [PATCH] drm: add edid detection for Hybrid Log-Gamma EOTF @@ -584,43 +588,7 @@ index d06786a58ca1..bfd64112178a 100644 return val; } -From 2f32c637798915651318af4c193462ae3116174b Mon Sep 17 00:00:00 2001 -From: Martin Cerveny -Date: Wed, 31 Jan 2018 15:50:14 +0100 -Subject: [PATCH] phy: rockchip-inno-hdmi-phy: TMDS calculation overflow - -For example 3840x2160p60 (Pixel Clk: 594000000Hz) -> bus_width==5 (YUV420 10bit) -> TMDS Clk: 371250000 (and should not overflow) ! ---- - drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c -index f1915d4e7e01..dfde5d3f22dd 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c -@@ -411,16 +411,16 @@ static u32 inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, int rate) - tmdsclk = rate / 2; - break; - case 5: -- tmdsclk = rate * 5 / 8; -+ tmdsclk = (uint64_t)rate * 5 / 8; - break; - case 6: -- tmdsclk = rate * 3 / 4; -+ tmdsclk = (uint64_t)rate * 3 / 4; - break; - case 10: -- tmdsclk = rate * 5 / 4; -+ tmdsclk = (uint64_t)rate * 5 / 4; - break; - case 12: -- tmdsclk = rate * 3 / 2; -+ tmdsclk = (uint64_t)rate * 3 / 2; - break; - case 16: - tmdsclk = rate * 2; - -From 67b544841243ffe0bd72938d64e8d3be6c27743d Mon Sep 17 00:00:00 2001 +From 9a00f6e3bc2a7d6f3c3783f98bf3b142a1445f00 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 11 Feb 2018 19:21:41 +0100 Subject: [PATCH] drm: bridge: dw-hdmi: default to underscan mode @@ -630,10 +598,10 @@ Subject: [PATCH] drm: bridge: dw-hdmi: default to underscan mode 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 48c46f4b25ae..8086940664b4 100644 +index affba6ab8163..1c55ff385ce4 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1679,7 +1679,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) +@@ -1693,7 +1693,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) break; } @@ -643,7 +611,7 @@ index 48c46f4b25ae..8086940664b4 100644 /* * The Designware IP uses a different byte format from standard -From ba31c3d5eb595d9b5266e1a52df6e71c1557d14d Mon Sep 17 00:00:00 2001 +From 8076bb526d8c6d19006d460e2f904afafdf019e2 Mon Sep 17 00:00:00 2001 From: David Carrillo-Cisneros Date: Tue, 18 Jul 2017 18:18:37 -0700 Subject: [PATCH] UPSTREAM: perf tools: Add EXCLUDE_EXTLIBS and EXTRA_PERFLIBS @@ -702,3 +670,66 @@ index fb1c9ddc3478..9b3b9bd50d54 100644 export INSTALL SHELL_PATH + +From 8fb0d8531aece502c4cc3a82077ace8c09b4918a Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 27 Feb 2018 20:49:00 +0100 +Subject: [PATCH] net: wireless: rockchip_wlan: rtl8723bs: do not accept all + sdio wlan id + +--- + drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile | 2 +- + drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c | 3 +++ + 2 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +index b1403a8e22af..716f1baec373 100644 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +@@ -1248,7 +1248,7 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFO + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + # default setting for Power control +-EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC + #EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN + # default setting for Special function + EXTRA_CFLAGS += -DCONFIG_P2P_IPS +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +index 0c03f775eb7f..45533aacecdc 100644 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +@@ -47,6 +47,9 @@ static struct mmc_host *mmc_host = NULL; + static const struct sdio_device_id sdio_ids[] = + { + #ifdef CONFIG_RTL8723B ++ { SDIO_DEVICE(0x024c, 0x0523),.driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0623),.driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0626),.driver_data = RTL8723B}, + { SDIO_DEVICE(0x024c, 0xB723),.driver_data = RTL8723B}, + #endif + #ifdef CONFIG_RTL8188E + +From dced379ed8ce510bbf781704e6ff32557fa0950c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 2 Mar 2018 20:53:32 +0100 +Subject: [PATCH] net: wireless: rockchip_wlan: bcmdhd: detect broadcom sdio + device id + +--- + drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c +index 8864582b1706..b5a388cc3cbe 100755 +--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c +@@ -225,7 +225,7 @@ static const struct sdio_device_id bcmsdh_sdmmc_ids[] = { + { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4334) }, + { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4324) }, + { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_43239) }, +- { SDIO_DEVICE_CLASS(SDIO_CLASS_NONE) }, ++ { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_ANY_ID) }, + { 0, 0, 0, 0 /* end: all zeroes */ + }, + }; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch index f2f41e2a64..1e52a9776c 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch @@ -1,4 +1,4 @@ -From 7ed1ed35ede3d6a5ad864924f65de15910690140 Mon Sep 17 00:00:00 2001 +From abd68c63a163f8cd1efb40087f6a8569fafe7d64 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 19 Nov 2015 11:41:36 -0200 Subject: [PATCH] UPSTREAM: smsir.h: remove a now duplicated definition @@ -26,7 +26,7 @@ index fc8b7925c532..d9abd96ef48b 100644 struct ir_t { -From ae4106c9f6587e5bcbd414c1df4b59bf6a009794 Mon Sep 17 00:00:00 2001 +From 8fcf408f26690b403ea41a34c419a7cf25430b4f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for Pine64 IR Remote @@ -135,7 +135,7 @@ index 7c4bbc4dfab4..3a34a9631dd1 100644 #define RC_MAP_PINNACLE_GREY "rc-pinnacle-grey" #define RC_MAP_PINNACLE_PCTV_HD "rc-pinnacle-pctv-hd" -From d8df6397a5a354ff41e25d93a625fe517ec5d5a4 Mon Sep 17 00:00:00 2001 +From 3b5e2f781693301e6ba4b3d9dcfc23f05402251c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for ODROID IR Remote @@ -231,7 +231,7 @@ index 3a34a9631dd1..f1badbfbca90 100644 #define RC_MAP_PINE64 "rc-pine64" #define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color" -From a256d6c59814dcdd1489c82368bb9e9937f11408 Mon Sep 17 00:00:00 2001 +From b78470cab538b641350de506371924b48c19455e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Hub Remote @@ -327,7 +327,7 @@ index f1badbfbca90..cd8590c99e22 100644 #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350" #define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr" -From def6431495bad6e916a10ce9ddfc5f4b3597422a Mon Sep 17 00:00:00 2001 +From 03250f10b133c09eb0d8793b89afe760572c1f9e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Play 2 Remote diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch index eb463eed3b..77787f8dd8 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch @@ -1,4 +1,4 @@ -From 9e81a6caf8bceb87b3ea0d394f41f911fd92ff4b Mon Sep 17 00:00:00 2001 +From 830aaed8ea116ecac827f830729f1d57f96ac22e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 4 Sep 2017 22:34:19 +0200 Subject: [PATCH] BACKPORT: HDMI CEC support from v4.15 @@ -2419,10 +2419,10 @@ index b88e249026a1..bb1aa323019c 100644 M: Arnd Bergmann L: linuxppc-dev@lists.ozlabs.org diff --git a/drivers/media/cec/cec-adap.c b/drivers/media/cec/cec-adap.c -index 2e66ee402801..9d19003eddb2 100644 +index 8c75a51333b2..4f5d382268f7 100644 --- a/drivers/media/cec/cec-adap.c +++ b/drivers/media/cec/cec-adap.c -@@ -200,7 +200,10 @@ static void cec_queue_msg_fh(struct cec_fh *fh, const struct cec_msg *msg) +@@ -202,7 +202,10 @@ static void cec_queue_msg_fh(struct cec_fh *fh, const struct cec_msg *msg) { static const struct cec_event ev_lost_msgs = { .event = CEC_EVENT_LOST_MSGS, @@ -2434,7 +2434,7 @@ index 2e66ee402801..9d19003eddb2 100644 }; struct cec_msg_entry *entry; -@@ -1791,6 +1794,9 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, +@@ -1793,6 +1796,9 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, int la_idx = cec_log_addr2idx(adap, dest_laddr); bool from_unregistered = init_laddr == 0xf; struct cec_msg tx_cec_msg = { }; @@ -2444,7 +2444,7 @@ index 2e66ee402801..9d19003eddb2 100644 dprintk(2, "%s: %*ph\n", __func__, msg->len, msg->msg); -@@ -1886,11 +1892,9 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, +@@ -1888,11 +1894,9 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, */ case 0x60: if (msg->len == 2) @@ -2458,7 +2458,7 @@ index 2e66ee402801..9d19003eddb2 100644 break; /* * Other function messages that are not handled. -@@ -1903,11 +1907,54 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, +@@ -1905,11 +1909,54 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, */ case 0x56: case 0x57: case 0x67: case 0x68: case 0x69: case 0x6a: @@ -2514,7 +2514,7 @@ index 2e66ee402801..9d19003eddb2 100644 #endif break; -@@ -1917,6 +1964,8 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, +@@ -1919,6 +1966,8 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, break; #ifdef CONFIG_MEDIA_CEC_RC rc_keyup(adap->rc); @@ -3041,7 +3041,7 @@ index 2758687300b4..41e8dff588e1 100644 /* * MT_TOOL types -From 03e885addf35184601cf77dd9cd72ca13ec92935 Mon Sep 17 00:00:00 2001 +From d97e3abed49306c25ac724841c21c4705c55a6ea Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 4 Sep 2017 22:34:22 +0200 Subject: [PATCH] BACKPORT: Pulse Eight HDMI CEC from v4.15 @@ -3944,7 +3944,7 @@ index becdd78295cc..4588c66a8df0 100644 #endif /* _UAPI_SERIO_H */ -From ab37540e363f046bf03f4b590c76baef21eef971 Mon Sep 17 00:00:00 2001 +From 6af6d21e67410357403b1f99082ab2c825044657 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 4 Sep 2017 22:34:24 +0200 Subject: [PATCH] BACKPORT: RainShadow Tech HDMI CEC from v4.15 @@ -4427,7 +4427,7 @@ index 4588c66a8df0..89b72003fb68 100644 #endif /* _UAPI_SERIO_H */ -From 4a4bfdbc39eb4e39c0f55a444d3d1206934daba3 Mon Sep 17 00:00:00 2001 +From 4ceffb68390fda7643be488544dc25e439bc164d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 2 Sep 2017 16:23:11 +0200 Subject: [PATCH] [media] rc/keymaps: initialize rc-cec early @@ -4450,7 +4450,7 @@ index 354c8e724b8e..fb0c2b1f3814 100644 MODULE_LICENSE("GPL"); -From 1f1667ea20cca6e24161a9d3087849a467004af0 Mon Sep 17 00:00:00 2001 +From 3365306ff585f94071383606546cd0f0000c1bb3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 2 Sep 2017 16:23:11 +0200 Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event @@ -4460,10 +4460,10 @@ Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 3616265dae0c..3afc51dfccf8 100644 +index a7f2e381a5bd..b98a1c828657 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -2451,6 +2451,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge) +@@ -2465,6 +2465,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge) static enum drm_connector_status dw_hdmi_connector_detect(struct drm_connector *connector, bool force) { @@ -4471,7 +4471,7 @@ index 3616265dae0c..3afc51dfccf8 100644 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, connector); -@@ -2460,7 +2461,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) +@@ -2474,7 +2475,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) dw_hdmi_update_phy_mask(hdmi); mutex_unlock(&hdmi->mutex); @@ -4497,7 +4497,7 @@ index 3616265dae0c..3afc51dfccf8 100644 } static int dw_hdmi_connector_get_modes(struct drm_connector *connector) -@@ -2842,9 +2860,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) +@@ -2867,9 +2885,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) dw_hdmi_update_phy_mask(hdmi); } mutex_unlock(&hdmi->mutex); diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch index 875b5c0fdc..40c8d07dbc 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch @@ -1,4 +1,4 @@ -From c533e47da64de8edfaa7451bae673e2e736cd888 Mon Sep 17 00:00:00 2001 +From d2ee02d81c40aef4fdf0278bd0dc529a1793af79 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Mon, 18 Jul 2016 22:34:34 +0800 Subject: [PATCH] UPSTREAM: ASoC: rockchip: correct the spdif clk @@ -53,7 +53,7 @@ index 44b8c72e6a16..feaba2ad6022 100644 SPDIF_CFGR_CLK_DIV_MASK | SPDIF_CFGR_HALFWORD_ENABLE | SDPIF_CFGR_VDW_MASK, -From 75e844a16be8b2d264b02cac8c6d9c3246acf7ca Mon Sep 17 00:00:00 2001 +From 2316686749dfb94a33efc7f9238319c050f2c2e2 Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Wed, 7 Sep 2016 14:30:21 +0800 Subject: [PATCH] UPSTREAM: ASoC: rockchip: spdif: restore register during @@ -100,7 +100,7 @@ index feaba2ad6022..cac85a5538d5 100644 static int rk_spdif_hw_params(struct snd_pcm_substream *substream, -From 184f7ad17dddaa81ed86f1a384fa460290db9d24 Mon Sep 17 00:00:00 2001 +From f7d622d11eba15ed1a68b8aedfd920ee4ba5ab12 Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Tue, 3 Jan 2017 16:52:50 +0100 Subject: [PATCH] UPSTREAM: DRM: add help to get ELD speaker allocation @@ -148,7 +148,7 @@ index 85861b63e77a..55201e7e2ede 100644 int (*get_edid_block)(void *data, u8 *buf, unsigned int block, size_t len), -From 9965339e8800af62ff283d264673ecf1a2aadc34 Mon Sep 17 00:00:00 2001 +From a0dc556877d94de213dd9522af39156f0a5bfe2b Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Tue, 3 Jan 2017 16:52:51 +0100 Subject: [PATCH] UPSTREAM: ASoC: core: add optional pcm_new callback for DAI @@ -229,7 +229,7 @@ index 49263f3a50b0..c583022d7910 100644 INIT_DELAYED_WORK(&rtd->delayed_work, codec2codec_close_delayed_work); -From ccb05c9bfcb986d05f4247fea1178f541e8aad5c Mon Sep 17 00:00:00 2001 +From 5c39a02d6f966de9f9f26a98a401c90651ebeb41 Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Tue, 3 Jan 2017 16:52:52 +0100 Subject: [PATCH] UPSTREAM: ASoC: hdmi-codec: add channel mapping control @@ -715,7 +715,7 @@ index 028d60c196ae..cb78d8971b41 100644 snd_soc_unregister_codec(&pdev->dev); return 0; -From dfa634f7fa86acf2ea9d5343ddfaf8f928f05a9d Mon Sep 17 00:00:00 2001 +From 4eb5c7bce96c6856f0e949e598bd9f8ec21d7b56 Mon Sep 17 00:00:00 2001 From: Christophe Jaillet Date: Thu, 15 Jun 2017 07:53:11 +0200 Subject: [PATCH] UPSTREAM: ASoC: rockchip: Fix an error handling in @@ -756,7 +756,7 @@ index 7687368779db..5a3436351efb 100644 if (val >= 2 && val <= 8) soc_dai->playback.channels_max = val; -From 2ec7b817abc647335792094109c346d66d2551be Mon Sep 17 00:00:00 2001 +From 3fd7ca46725a4a16a1a52530ac2421bc8e037088 Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Thu, 10 Aug 2017 18:38:09 +0200 Subject: [PATCH] UPSTREAM: ASoC: rockchip: Delete an error message for a @@ -791,7 +791,7 @@ index 5a3436351efb..1da10e79a1bb 100644 i2s->dev = &pdev->dev; -From 2ce2fd399b40c0bbb1aad13344f4b79050a763ad Mon Sep 17 00:00:00 2001 +From d6adb14ce27f7ef3687c6d965e781782329c790d Mon Sep 17 00:00:00 2001 From: John Keeping Date: Thu, 14 Sep 2017 16:58:55 +0100 Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix unbalanced clk_disable @@ -820,7 +820,7 @@ index 1da10e79a1bb..f131dba7645d 100644 return 0; -From 1fd8ed3e609084541a9343468e54d6b675377f93 Mon Sep 17 00:00:00 2001 +From 2c4899311942a4aaf098faf513ac7200cbc71f11 Mon Sep 17 00:00:00 2001 From: Stefan Potyra Date: Wed, 6 Dec 2017 16:03:24 +0100 Subject: [PATCH] UPSTREAM: ASoC: rockchip: disable clock on error @@ -890,7 +890,7 @@ index cac85a5538d5..6ff8b195acf4 100644 return ret; } -From 421ce8b8057331617a93c37b7f14199bac36f2c1 Mon Sep 17 00:00:00 2001 +From 4cc851cd3ae5216602422e85bde844f1ff0e592c Mon Sep 17 00:00:00 2001 From: John Keeping Date: Mon, 8 Jan 2018 16:01:04 +0000 Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix playback after runtime @@ -957,7 +957,7 @@ index f131dba7645d..0b9bb973b5a7 100644 return false; } -From fccd2e78a518d2f396e684b9f77d4b6c1ee805c8 Mon Sep 17 00:00:00 2001 +From 4d40b158d955d27eef520c49f221cd7ed31d9ae0 Mon Sep 17 00:00:00 2001 From: Romain Perier Date: Fri, 14 Apr 2017 10:31:12 +0200 Subject: [PATCH] UPSTREAM: drm: dw-hdmi: add specific I2S and AHB functions @@ -985,7 +985,7 @@ Link: http://patchwork.freedesktop.org/patch/msgid/20170414083113.4255-2-romain. 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 3616265dae0c..ca4d64253757 100644 +index a7f2e381a5bd..da4340491fea 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -261,6 +261,8 @@ struct dw_hdmi { @@ -1038,7 +1038,7 @@ index 3616265dae0c..ca4d64253757 100644 spin_unlock_irqrestore(&hdmi->audio_lock, flags); } EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable); -@@ -3627,6 +3646,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3677,6 +3696,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.irq = irq; audio.hdmi = hdmi; audio.eld = hdmi->connector.eld; @@ -1047,7 +1047,7 @@ index 3616265dae0c..ca4d64253757 100644 pdevinfo.name = "dw-hdmi-ahb-audio"; pdevinfo.data = &audio; -@@ -3640,6 +3661,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3690,6 +3711,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.write = hdmi_writeb; audio.read = hdmi_readb; audio.mod = hdmi_modb; @@ -1056,7 +1056,7 @@ index 3616265dae0c..ca4d64253757 100644 pdevinfo.name = "dw-hdmi-i2s-audio"; pdevinfo.data = &audio; -From 5b3a2d7e71e94b7df6c9e88a72d9f17c8c177f3c Mon Sep 17 00:00:00 2001 +From 4ea3fd9308b3bc3b5e7699e4a52e3f7bca6e857e Mon Sep 17 00:00:00 2001 From: Romain Perier Date: Thu, 20 Apr 2017 14:34:34 +0530 Subject: [PATCH] UPSTREAM: drm: dw-hdmi: gate audio clock from the I2S @@ -1084,7 +1084,7 @@ Signed-off-by: Archit Taneja 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index ca4d64253757..01965c4e7128 100644 +index da4340491fea..e1a5966ce394 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -813,6 +813,15 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) @@ -1116,7 +1116,7 @@ index ca4d64253757..01965c4e7128 100644 } void dw_hdmi_audio_enable(struct dw_hdmi *hdmi) -@@ -2124,12 +2139,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) +@@ -2138,12 +2153,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) HDMI_MC_FLOWCTRL); } @@ -1129,7 +1129,7 @@ index ca4d64253757..01965c4e7128 100644 /* Workaround to clear the overflow condition */ static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) { -@@ -2281,7 +2290,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) +@@ -2295,7 +2304,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) /* HDMI Initialization Step E - Configure audio */ hdmi_clk_regenerator_update_pixel_clock(hdmi); @@ -1138,7 +1138,7 @@ index ca4d64253757..01965c4e7128 100644 } /* not for DVI mode */ -@@ -3662,6 +3671,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3712,6 +3721,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.read = hdmi_readb; audio.mod = hdmi_modb; hdmi->enable_audio = dw_hdmi_i2s_audio_enable; @@ -1147,7 +1147,7 @@ index ca4d64253757..01965c4e7128 100644 pdevinfo.name = "dw-hdmi-i2s-audio"; pdevinfo.data = &audio; -From 81fb01490b055b58d3695c064b2761ac4d4681d2 Mon Sep 17 00:00:00 2001 +From df0540deb663a3d0b3852b88ded0817146f20e67 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 7 Aug 2017 22:24:15 +0200 Subject: [PATCH] drm: dw-hdmi-i2s: sync with upstream @@ -1158,10 +1158,10 @@ Subject: [PATCH] drm: dw-hdmi-i2s: sync with upstream 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h -index d3194b4e186b..b9e839f4151a 100644 +index 3930ba04977b..af7f39c85ba4 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h -@@ -13,7 +13,6 @@ struct dw_hdmi_audio_data { +@@ -14,7 +14,6 @@ struct dw_hdmi_audio_data { struct dw_hdmi_i2s_audio_data { struct dw_hdmi *hdmi; @@ -1226,7 +1226,7 @@ index f1f62d8c1d16..5ff993a35ab6 100644 .name = DRIVER_NAME, .owner = THIS_MODULE, -From 84857277755016550e30b9c4d2021ea7e699bb54 Mon Sep 17 00:00:00 2001 +From 8835208cc656c44c6c1238f637a428f6f5403bf4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 2 Apr 2017 11:33:39 +0200 Subject: [PATCH] drm: dw-hdmi-i2s: implement get_eld @@ -1238,10 +1238,10 @@ Subject: [PATCH] drm: dw-hdmi-i2s: implement get_eld 3 files changed, 14 insertions(+) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h -index b9e839f4151a..e75f458ef4df 100644 +index af7f39c85ba4..c5ace7808fdf 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h -@@ -13,6 +13,7 @@ struct dw_hdmi_audio_data { +@@ -14,6 +14,7 @@ struct dw_hdmi_audio_data { struct dw_hdmi_i2s_audio_data { struct dw_hdmi *hdmi; @@ -1283,10 +1283,10 @@ index 5ff993a35ab6..e7312571e2cb 100644 static int snd_dw_hdmi_probe(struct platform_device *pdev) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 01965c4e7128..b9ec4a024276 100644 +index e1a5966ce394..605a55e3693d 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -3670,6 +3670,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3720,6 +3720,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.write = hdmi_writeb; audio.read = hdmi_readb; audio.mod = hdmi_modb; @@ -1295,7 +1295,7 @@ index 01965c4e7128..b9ec4a024276 100644 hdmi->disable_audio = dw_hdmi_i2s_audio_disable; -From ae58251c3608aebf3e01ebbff8749d3424265702 Mon Sep 17 00:00:00 2001 +From 572da20ab103a328f7b3afdb78c93fb62947ff78 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 17 Apr 2017 13:09:16 +0200 Subject: [PATCH] drm: dw-hdmi-i2s: configure channel allocation @@ -1318,7 +1318,7 @@ index e7312571e2cb..1d4570e3fbed 100644 /* Set LFEPBLDOWN-MIX INH and LSV */ hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3); -From 0ec4060f98de2f10639b400b4538bfd5ed6e4da6 Mon Sep 17 00:00:00 2001 +From 1f19793a9437b295d7dfca822f511e487c47ef4a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 2 May 2017 18:57:19 +0200 Subject: [PATCH] ASoC: hdmi-codec: fix I2S audio in Kodi @@ -1340,7 +1340,7 @@ index cb78d8971b41..9ebca57014e4 100644 .ops = &hdmi_dai_ops, .pcm_new = hdmi_codec_pcm_new, -From 152015324ec711e9af13e9ab12d8a6aaf3f1a2f2 Mon Sep 17 00:00:00 2001 +From 559c23102f957335d697de310dce921f72fff040 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 14 Aug 2017 00:14:05 +0200 Subject: [PATCH] ASoC: hdmi-codec: reorder channel map @@ -1485,7 +1485,7 @@ index 9ebca57014e4..e65060ae8ffc 100644 struct hdmi_codec_priv { -From f46805059adc970ca913cf200174de4d4a35c754 Mon Sep 17 00:00:00 2001 +From d6e589fc6c9211db345d667545f191e187640e41 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 27 Aug 2017 23:32:40 +0200 Subject: [PATCH] ASoC: codecs: rk3328: limit to working rates @@ -1513,7 +1513,7 @@ index af1b7429b6d4..d0b4578ffa0e 100644 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE | -From b38b721277f213bb71cef58e00ad71982a0e700d Mon Sep 17 00:00:00 2001 +From 8f4b1d8cd40d4e052214c4abc200ab68f1a4bb78 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 14 Aug 2017 00:14:05 +0200 Subject: [PATCH] drm: dw-hdmi: change audio config @@ -1523,7 +1523,7 @@ Subject: [PATCH] drm: dw-hdmi: change audio config 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index b9ec4a024276..99e27f0dcdb6 100644 +index 605a55e3693d..661b1259ebe0 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -628,18 +628,14 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi) @@ -1556,7 +1556,7 @@ index b9ec4a024276..99e27f0dcdb6 100644 spin_unlock_irq(&hdmi->audio_lock); } -@@ -3671,8 +3667,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3721,8 +3717,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.read = hdmi_readb; audio.mod = hdmi_modb; audio.eld = hdmi->connector.eld; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-dts.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch similarity index 68% rename from projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-dts.patch rename to projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch index 327e720c4d..72c26686c4 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-dts.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch @@ -1,4 +1,4 @@ -From 83f0db119a7b874af4db8d280e33fe0b541cb112 Mon Sep 17 00:00:00 2001 +From 7b26b6c4eef43138c3c014ce4d185745bc9a0174 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Aug 2017 10:24:19 +0200 Subject: [PATCH] arm: dts: rk3288-miniarm: update dts @@ -91,7 +91,7 @@ index 2fbec41f0b23..3d2507b8c864 100644 supports-sdio; }; -From 3d304e4b4d7146e29ebd22876d69dba212dd03b1 Mon Sep 17 00:00:00 2001 +From b550971c44a70aad2dd503c12ea90d67d65fe806 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 2 Nov 2017 23:17:46 +0100 Subject: [PATCH] arm: dts: rk3288-miqi: update dts @@ -214,17 +214,17 @@ index b90b0e5969ec..ffced204abcf 100644 &vopl_mmu { -From 5036951993971301b25e23da49d1dd430fd941f0 Mon Sep 17 00:00:00 2001 +From ccb6c0062630f497f3b10e3b35a33085b32da968 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: rk3328: update dtsi --- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 49 +++++++++++++++++++++++++------- - 1 file changed, 38 insertions(+), 11 deletions(-) + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 54 ++++++++++++++++++++++++-------- + 1 file changed, 41 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index cfb645b45dd9..a3faafd88c28 100644 +index c7316fdd582f..d5ad73bc2932 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -88,6 +88,8 @@ @@ -311,7 +311,7 @@ index cfb645b45dd9..a3faafd88c28 100644 #iommu-cells = <0>; status = "disabled"; }; -@@ -1207,9 +1231,10 @@ +@@ -1205,9 +1229,10 @@ sdmmc: dwmmc@ff500000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff500000 0x0 0x4000>; @@ -325,7 +325,7 @@ index cfb645b45dd9..a3faafd88c28 100644 fifo-depth = <0x100>; interrupts = ; status = "disabled"; -@@ -1218,10 +1243,10 @@ +@@ -1216,10 +1241,10 @@ sdio: dwmmc@ff510000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff510000 0x0 0x4000>; @@ -338,7 +338,7 @@ index cfb645b45dd9..a3faafd88c28 100644 fifo-depth = <0x100>; interrupts = ; status = "disabled"; -@@ -1230,9 +1255,10 @@ +@@ -1228,9 +1253,10 @@ emmc: dwmmc@ff520000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff520000 0x0 0x4000>; @@ -352,7 +352,7 @@ index cfb645b45dd9..a3faafd88c28 100644 fifo-depth = <0x100>; interrupts = ; status = "disabled"; -@@ -1254,6 +1280,7 @@ +@@ -1252,6 +1278,7 @@ "pclk_mac"; resets = <&cru SRST_GMAC2IO_A>; reset-names = "stmmaceth"; @@ -360,27 +360,32 @@ index cfb645b45dd9..a3faafd88c28 100644 status = "disabled"; }; -@@ -1324,7 +1351,7 @@ +@@ -1322,9 +1349,10 @@ sdmmc_ext: dwmmc@ff5f0000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff5f0000 0x0 0x4000>; - clock-freq-min-max = <400000 150000000>; +- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; +- clock-names = "biu", "ciu"; + max-frequency = <150000000>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; - clock-names = "biu", "ciu"; ++ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, ++ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; ++ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; -From ecdb644017db6d6b5e2efed64cb6631fab2e5054 Mon Sep 17 00:00:00 2001 +From db792f3a20ed76c42048f6c155c308b18bdb9f0d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: update dts --- - arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 204 ++++++++++++++++--------- - 1 file changed, 128 insertions(+), 76 deletions(-) + arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 215 +++++++++++++++---------- + 1 file changed, 134 insertions(+), 81 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index b5bb7bf0f34c..67a3ff2215e5 100644 +index b5bb7bf0f34c..82f257d39be3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -52,18 +52,6 @@ @@ -636,7 +641,12 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -288,8 +320,8 @@ +@@ -284,12 +316,13 @@ + vdd_arm: RK805_DCDC2@1 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; + regulator-min-microvolt = <712500>; regulator-max-microvolt = <1450000>; regulator-initial-mode = <0x1>; regulator-ramp-delay = <12500>; @@ -646,7 +656,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -301,8 +333,8 @@ +@@ -301,8 +334,8 @@ regulator-compatible = "RK805_DCDC3"; regulator-name = "vcc_ddr"; regulator-initial-mode = <0x1>; @@ -656,7 +666,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -315,8 +347,8 @@ +@@ -315,8 +348,8 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-initial-mode = <0x1>; @@ -666,7 +676,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -324,13 +356,13 @@ +@@ -324,13 +357,13 @@ }; }; @@ -683,7 +693,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; -@@ -342,8 +374,8 @@ +@@ -342,24 +375,24 @@ regulator-name = "vcc18_emmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -693,17 +703,29 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; -@@ -355,8 +387,8 @@ - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; + }; + }; + +- vdd_10: RK805_LDO3@6 { ++ vdd_11: RK805_LDO3@6 { + regulator-compatible = "RK805_LDO3"; +- regulator-name = "vdd_10"; +- regulator-min-microvolt = <1000000>; +- regulator-max-microvolt = <1000000>; - regulator-boot-on; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; regulator-always-on; + regulator-boot-on; regulator-state-mem { regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; -@@ -373,6 +405,16 @@ +- regulator-suspend-microvolt = <1000000>; ++ regulator-suspend-microvolt = <1100000>; + }; + }; + }; +@@ -373,6 +406,16 @@ }; &i2s1 { @@ -720,7 +742,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 #sound-dai-cells = <0>; status = "okay"; }; -@@ -383,7 +425,7 @@ +@@ -383,7 +426,7 @@ vccio1-supply = <&vcc_io>; vccio2-supply = <&vcc18_emmc>; vccio3-supply = <&vcc_io>; @@ -729,7 +751,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 vccio5-supply = <&vcc_io>; vccio6-supply = <&vcc_io>; pmuio-supply = <&vcc_io>; -@@ -392,37 +434,26 @@ +@@ -392,37 +435,26 @@ &pinctrl { ir { ir_int: ir-int { @@ -773,7 +795,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 }; &rkvdec_mmu { -@@ -437,8 +468,15 @@ +@@ -437,8 +469,15 @@ max-frequency = <150000000>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; @@ -790,7 +812,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 status = "okay"; }; -@@ -456,9 +494,22 @@ +@@ -456,9 +495,22 @@ }; }; @@ -813,7 +835,7 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 status = "okay"; }; -@@ -482,15 +533,16 @@ +@@ -482,15 +534,16 @@ }; &u3phy { @@ -832,22 +854,22 @@ index b5bb7bf0f34c..67a3ff2215e5 100644 }; -From 46a7e76341bde2abaf2177b4354a5601beb25b93 Mon Sep 17 00:00:00 2001 +From 5f81039a852799686e3bed6d5b5e2c0d12d849f1 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-box board --- - arch/arm64/boot/dts/rockchip/rk3328-box.dts | 608 ++++++++++++++++++++++++++++ - 1 file changed, 608 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-box.dts | 628 ++++++++++++++++++++++++++++ + 1 file changed, 628 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box.dts b/arch/arm64/boot/dts/rockchip/rk3328-box.dts new file mode 100644 -index 000000000000..a2c5d616f4bd +index 000000000000..215e6a42c8b8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-box.dts -@@ -0,0 +1,608 @@ +@@ -0,0 +1,628 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -1015,8 +1037,6 @@ index 000000000000..a2c5d616f4bd + + wireless-bluetooth { + compatible = "bluetooth-platdata"; -+ clocks = <&rk805 1>; -+ clock-names = "ext_clock"; + uart_rts_gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart0_rts>; @@ -1030,7 +1050,6 @@ index 000000000000..a2c5d616f4bd + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "rtl8723bs"; -+ sdio_vref = <1800>; + WIFI,host_wake_irq = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; @@ -1179,6 +1198,7 @@ index 000000000000..a2c5d616f4bd + vdd_arm: RK805_DCDC2@1 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = <0x1>; @@ -1245,16 +1265,16 @@ index 000000000000..a2c5d616f4bd + }; + }; + -+ vdd_10: RK805_LDO3@6 { ++ vdd_11: RK805_LDO3@6 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_10"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; ++ regulator-suspend-microvolt = <1100000>; + }; + }; + }; @@ -1280,6 +1300,15 @@ index 000000000000..a2c5d616f4bd +}; + +&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clk_32k_out>; ++ ++ clk_32k { ++ clk_32k_out: clk-32k-out { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ + ir { + ir_int: ir-int { + rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; @@ -1363,9 +1392,22 @@ index 000000000000..a2c5d616f4bd + status = "okay"; +}; + ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; + status = "okay"; +}; + @@ -1457,22 +1499,22 @@ index 000000000000..a2c5d616f4bd + status = "okay"; +}; -From 1298112e7e4aa23834943ad89a0f1495445c45b6 Mon Sep 17 00:00:00 2001 +From 29ab3ef6a26cc6639f3975d9e9987bbb7b0aa242 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-rockbox board --- - arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts | 555 ++++++++++++++++++++++++ - 1 file changed, 555 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts | 568 ++++++++++++++++++++++++ + 1 file changed, 568 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts b/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts new file mode 100644 -index 000000000000..ac1a6b21fd14 +index 000000000000..05d496fd2c20 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts -@@ -0,0 +1,555 @@ +@@ -0,0 +1,568 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -1626,7 +1668,6 @@ index 000000000000..ac1a6b21fd14 + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "rtl8189fs"; -+ sdio_vref = <1800>; + WIFI,host_wake_irq = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; @@ -1775,6 +1816,7 @@ index 000000000000..ac1a6b21fd14 + vdd_arm: RK805_DCDC2@1 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = <0x1>; @@ -1841,16 +1883,16 @@ index 000000000000..ac1a6b21fd14 + }; + }; + -+ vdd_10: RK805_LDO3@6 { ++ vdd_11: RK805_LDO3@6 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_10"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; ++ regulator-suspend-microvolt = <1100000>; + }; + }; + }; @@ -1869,7 +1911,7 @@ index 000000000000..ac1a6b21fd14 + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; -+ vccio4-supply = <&vcc_18>; ++ vccio4-supply = <&vcc_io>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + pmuio-supply = <&vcc_io>; @@ -1941,9 +1983,22 @@ index 000000000000..ac1a6b21fd14 + status = "okay"; +}; + ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; + status = "okay"; +}; + @@ -2029,22 +2084,22 @@ index 000000000000..ac1a6b21fd14 + status = "okay"; +}; -From 4e58637cfc4366f4e9ae03152811e40cfd76e6f1 Mon Sep 17 00:00:00 2001 +From 72dadc98a19512cb446bd7c8501139433939e680 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-roc-cc board --- - arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 542 +++++++++++++++++++++++++ - 1 file changed, 542 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 556 +++++++++++++++++++++++++ + 1 file changed, 556 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts new file mode 100644 -index 000000000000..929d7c16060b +index 000000000000..f739f9b28832 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -@@ -0,0 +1,542 @@ +@@ -0,0 +1,556 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -2350,6 +2405,7 @@ index 000000000000..929d7c16060b + vdd_arm: RK805_DCDC2@1 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = <0x1>; @@ -2416,16 +2472,16 @@ index 000000000000..929d7c16060b + }; + }; + -+ vdd_10: RK805_LDO3@6 { ++ vdd_11: RK805_LDO3@6 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_10"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; ++ regulator-suspend-microvolt = <1100000>; + }; + }; + }; @@ -2500,9 +2556,22 @@ index 000000000000..929d7c16060b + status = "okay"; +}; + ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; + status = "okay"; +}; + @@ -2588,662 +2657,7 @@ index 000000000000..929d7c16060b + status = "okay"; +}; -From 4b28de8866e777301994ae85a237b02805faea2b Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 17 Jan 2018 22:17:45 +0100 -Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-plus board - ---- - arch/arm64/boot/dts/rockchip/rk3328-box-plus.dts | 638 +++++++++++++++++++++++ - 1 file changed, 638 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-plus.dts - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-plus.dts -new file mode 100644 -index 000000000000..aa2925cda274 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-box-plus.dts -@@ -0,0 +1,638 @@ -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+#include "rk3328.dtsi" -+ -+/ { -+ model = "Rockchip RK3328 BOX Plus"; -+ compatible = "rockchip,rk3328-box-plus", "rockchip,rk3328"; -+ -+ chosen { -+ bootargs = "rockchip_jtag"; -+ }; -+ -+ gmac_clkin: external-gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "gmac_clkin"; -+ #clock-cells = <0>; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_enable_h>; -+ -+ /* -+ * On the module itself this is one of these (depending -+ * on the actual card populated): -+ * - SDIO_RESET_L_WL_REG_ON -+ * - PDN (power down when low) -+ */ -+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0m1_gpio>; -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_io>; -+ }; -+ -+ vcc_host_5v: vcc-host-5v-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&usb30_host_drv>; -+ regulator-name = "vcc_host_5v"; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_sys>; -+ }; -+ -+ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&usb20_host_drv>; -+ regulator-name = "vcc_host1_5v"; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_sys>; -+ }; -+ -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led1 { -+ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led2 { -+ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "mmc0"; -+ }; -+ }; -+ -+ ir-receiver { -+ compatible = "gpio-ir-receiver"; -+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; -+ pinctrl-0 = <&ir_int>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ }; -+ -+ hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,name = "HDMI"; -+ simple-audio-card,cpu { -+ sound-dai = <&i2s0>; -+ }; -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <256>; -+ simple-audio-card,name = "I2S"; -+ simple-audio-card,cpu { -+ sound-dai = <&i2s1>; -+ }; -+ simple-audio-card,codec { -+ sound-dai = <&codec>; -+ }; -+ }; -+ -+ spdif-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "SPDIF"; -+ simple-audio-card,cpu { -+ sound-dai = <&spdif>; -+ }; -+ simple-audio-card,codec { -+ sound-dai = <&spdif_out>; -+ }; -+ }; -+ -+ spdif_out: spdif-out { -+ compatible = "linux,spdif-dit"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ wireless-bluetooth { -+ compatible = "bluetooth-platdata"; -+ clocks = <&rk805 1>; -+ clock-names = "ext_clock"; -+ BT,power_gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; -+ BT,wake_host_irq = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ wireless-wlan { -+ compatible = "wlan-platdata"; -+ rockchip,grf = <&grf>; -+ wifi_chip_type = "rtl8723bs"; -+ sdio_vref = <1800>; -+ WIFI,host_wake_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+}; -+ -+&codec { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&dfi { -+ status = "okay"; -+}; -+ -+&dmc { -+ center-supply = <&vdd_logic>; -+ status = "okay"; -+}; -+ -+&display_subsystem { -+ status = "okay"; -+}; -+ -+&emmc { -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ mmc-hs200-1_8v; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; -+ supports-emmc; -+ vmmc-supply = <&vcc_io>; -+ vqmmc-supply = <&vcc18_emmc>; -+ status = "okay"; -+}; -+ -+&gmac2io { -+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; -+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; -+ clock_in_out = "input"; -+ phy-supply = <&vcc_io>; -+ phy-mode = "rgmii"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmiim1_pins>; -+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 50000>; -+ tx_delay = <0x26>; -+ rx_delay = <0x11>; -+ status = "okay"; -+}; -+ -+&gmac2phy { -+ phy-supply = <&vcc_io>; -+ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; -+ assigned-clock-rate = <50000000>; -+ assigned-clocks = <&cru SCLK_MAC2PHY>; -+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; -+ clock_in_out = "output"; -+ status = "disabled"; -+}; -+ -+&gpu { -+ status = "okay"; -+ mali-supply = <&vdd_logic>; -+}; -+ -+&h265e { -+ status = "okay"; -+}; -+ -+&h265e_mmu { -+ status = "okay"; -+}; -+ -+&hdmi { -+ #sound-dai-cells = <0>; -+ ddc-i2c-scl-high-time-ns = <9625>; -+ ddc-i2c-scl-low-time-ns = <10000>; -+ status = "okay"; -+}; -+ -+&hdmiphy { -+ status = "okay"; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ rk805: rk805@18 { -+ compatible = "rockchip,rk805"; -+ status = "okay"; -+ reg = <0x18>; -+ interrupt-parent = <&gpio2>; -+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc5-supply = <&vcc_io>; -+ vcc6-supply = <&vcc_sys>; -+ -+ rtc { -+ status = "okay"; -+ }; -+ -+ pwrkey { -+ status = "okay"; -+ }; -+ -+ gpio { -+ status = "okay"; -+ }; -+ -+ regulators { -+ compatible = "rk805-regulator"; -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ vdd_logic: RK805_DCDC1@0 { -+ regulator-compatible = "RK805_DCDC1"; -+ regulator-name = "vdd_logic"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-initial-mode = <0x1>; -+ regulator-ramp-delay = <12500>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-mode = <0x2>; -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vdd_arm: RK805_DCDC2@1 { -+ regulator-compatible = "RK805_DCDC2"; -+ regulator-name = "vdd_arm"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-initial-mode = <0x1>; -+ regulator-ramp-delay = <12500>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-mode = <0x2>; -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vcc_ddr: RK805_DCDC3@2 { -+ regulator-compatible = "RK805_DCDC3"; -+ regulator-name = "vcc_ddr"; -+ regulator-initial-mode = <0x1>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-mode = <0x2>; -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io: RK805_DCDC4@3 { -+ regulator-compatible = "RK805_DCDC4"; -+ regulator-name = "vcc_io"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-initial-mode = <0x1>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-mode = <0x2>; -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_18: RK805_LDO1@4 { -+ regulator-compatible = "RK805_LDO1"; -+ regulator-name = "vcc_18"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_emmc: RK805_LDO2@5 { -+ regulator-compatible = "RK805_LDO2"; -+ regulator-name = "vcc18_emmc"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_10: RK805_LDO3@6 { -+ regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_10"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2s0 { -+ #sound-dai-cells = <0>; -+ rockchip,bclk-fs = <128>; -+ status = "okay"; -+}; -+ -+&i2s1 { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ vccio1-supply = <&vcc_io>; -+ vccio2-supply = <&vcc18_emmc>; -+ vccio3-supply = <&vcc_io>; -+ vccio4-supply = <&vcc_18>; -+ vccio5-supply = <&vcc_io>; -+ vccio6-supply = <&vcc_io>; -+ pmuio-supply = <&vcc_io>; -+}; -+ -+&pinctrl { -+ ir { -+ ir_int: ir-int { -+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h: wifi-enable-h { -+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb2 { -+ usb20_host_drv: usb20-host-drv { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb3 { -+ usb30_host_drv: usb30-host-drv { -+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ wireless-bluetooth { -+ uart0_gpios: uart0-gpios { -+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&rkvdec { -+ status = "okay"; -+ vcodec-supply = <&vdd_logic>; -+}; -+ -+&rkvdec_mmu { -+ status = "okay"; -+}; -+ -+&sdmmc_ext { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cap-sdio-irq; -+ disable-wp; -+ keep-power-in-suspend; -+ max-frequency = <150000000>; -+ mmc-pwrseq = <&sdio_pwrseq>; -+ non-removable; -+ num-slots = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0ext_bus4 &sdmmc0ext_cmd &sdmmc0ext_clk>; -+ sd-uhs-sdr104; -+ supports-sdio; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ disable-wp; -+ max-frequency = <150000000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; -+ supports-sd; -+ vmmc-supply = <&vcc_sd>; -+ status = "okay"; -+}; -+ -+&spdif { -+ #sound-dai-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spdifm0_tx>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <0>; -+ rockchip,hw-tshut-polarity = <0>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&u2phy { -+ status = "okay"; -+ -+}; -+ -+&u2phy_host { -+ phy-supply = <&vcc_host1_5v>; -+ status = "okay"; -+}; -+ -+&u2phy_otg { -+ phy-supply = <&vcc_otg_5v>; -+ status = "okay"; -+}; -+ -+&u3phy { -+ status = "okay"; -+}; -+ -+&u3phy_utmi { -+ phy-supply = <&vcc_host_5v>; -+ status = "okay"; -+}; -+ -+&u3phy_pipe { -+ phy-supply = <&vcc_host_5v>; -+ status = "okay"; -+}; -+ -+&usb20_otg { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usbdrd3 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3 { -+ status = "okay"; -+}; -+ -+&vop { -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+&vpu_service { -+ status = "okay"; -+}; -+ -+&vpu_mmu { -+ status = "okay"; -+}; -+ -+&vepu { -+ status = "okay"; -+}; -+ -+&vepu_mmu { -+ status = "okay"; -+}; -+ -+&venc_srv { -+ status = "okay"; -+}; - -From 05fdbaf77827cf77ade56c832093147bae42885e Mon Sep 17 00:00:00 2001 +From 37a995d53a00f87bd07dd59db51905ec70f9456b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 3 Sep 2017 11:19:19 +0200 Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: use two dai-link for i2s @@ -3255,7 +2669,7 @@ Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: use two dai-link for i2s 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index 67a3ff2215e5..d25bcc36e32f 100644 +index 82f257d39be3..995829a12ad3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -114,6 +114,11 @@ @@ -3333,7 +2747,7 @@ index 53dd085d3ee2..bf7ce34084a9 100644 .probe = snd_soc_dummy_probe, .remove = snd_soc_dummy_remove, -From b765e2f30f2e05cbcf0a489b5239d078fd4c0583 Mon Sep 17 00:00:00 2001 +From 1f23d678ac0e5f1e65492a3c35653461e3b19633 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 26 Jan 2018 00:03:46 +0100 Subject: [PATCH] arm64: dts: rockchip: rk3328-roc-cc: disable sd-card voltage @@ -3347,7 +2761,7 @@ RK kernel uses GRF_SOC_CON10 bit 1 to mute avcodec. 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -index 929d7c16060b..02b41b7a5776 100644 +index f739f9b28832..5c79dfd32d87 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts @@ -75,8 +75,6 @@ @@ -3359,7 +2773,7 @@ index 929d7c16060b..02b41b7a5776 100644 regulator-name = "vccio_sd"; regulator-type = "voltage"; regulator-min-microvolt = <1800000>; -@@ -410,12 +408,6 @@ +@@ -411,12 +409,6 @@ }; }; @@ -3372,7 +2786,7 @@ index 929d7c16060b..02b41b7a5776 100644 pmic { pmic_int_l: pmic-int-l { rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; -@@ -443,13 +435,11 @@ +@@ -444,13 +436,11 @@ cap-mmc-highspeed; cap-sd-highspeed; disable-wp; @@ -3388,7 +2802,7 @@ index 929d7c16060b..02b41b7a5776 100644 }; -From 9e44b548e1803f1927e2dd0d4dacd89ffa12b040 Mon Sep 17 00:00:00 2001 +From e9dc16e71f4cbdd6069e4fa51ac80dfe124d0e42 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 Jan 2018 15:17:34 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3399-sapphire board @@ -3547,7 +2961,7 @@ index 000000000000..36613de5c68e + }; +}; -From e327e79ab50c8491950d8f9030fb52769336940c Mon Sep 17 00:00:00 2001 +From 7e61af4aa1c7c98c768aea2d7c48dcb4765227d0 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 Jan 2018 15:17:53 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3399-rock960 board @@ -4547,7 +3961,7 @@ index 000000000000..a5c906dd5961 + status = "okay"; +}; -From 6dace0f751dbd697dd4481af949a102852f85c30 Mon Sep 17 00:00:00 2001 +From eae2191351dd73db48ff927de52c2e961decfa45 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 Jan 2018 15:38:32 +0100 Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl @@ -4557,7 +3971,7 @@ Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 0af92bd2a723..60a488b28f1c 100644 +index b37d1954d27c..db142a89bb7b 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -947,6 +947,8 @@ @@ -4569,7 +3983,7 @@ index 0af92bd2a723..60a488b28f1c 100644 <&cru SCLK_ISP_JPE>, <&cru SCLK_ISP>, <&cru SCLK_RGA>; -@@ -1524,10 +1526,10 @@ +@@ -1531,10 +1533,10 @@ reg-io-width = <4>; rockchip,grf = <&grf>; interrupts = ; @@ -4583,7 +3997,7 @@ index 0af92bd2a723..60a488b28f1c 100644 pinctrl-1 = <&hdmi_gpio>; power-domains = <&power RK3288_PD_VIO>; status = "disabled"; -@@ -1896,6 +1898,14 @@ +@@ -1903,6 +1905,14 @@ &pcfg_pull_none>; }; @@ -4598,3 +4012,2482 @@ index 0af92bd2a723..60a488b28f1c 100644 hdmi_ddc: hdmi-ddc { rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>, <7 20 RK_FUNC_2 &pcfg_pull_none>; + +From d3f46f176f6ea3d7f1f201875279dbf7bbcdb37c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 14 Feb 2018 08:03:12 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3399-odroidn1 board + +--- + arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts | 1005 ++++++++++++++++++++++ + 1 file changed, 1005 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts b/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts +new file mode 100644 +index 000000000000..1bff86c2bf03 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts +@@ -0,0 +1,1005 @@ ++/* ++ * Copyright (c) 2017 Hardkernel Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "dt-bindings/pwm/pwm.h" ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++#include "rk3399-linux.dtsi" ++#include ++ ++/ { ++ model = "Hardkernel ODROID-N1"; ++ compatible = "hardkernel,odroidn1", "rockchip,rk3399"; ++ ++ cpuinfo { ++ compatible = "rockchip,cpuinfo"; ++ nvmem-cells = <&efuse_id>; ++ nvmem-cell-names = "id"; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ leds: gpio_leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "led_pins"; ++ pinctrl-0 = <&led_pins>; ++ ++ heartbeat { ++ label = "blue:heartbeat"; ++ gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ autorepeat; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn>; ++ ++ button@0 { ++ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ label = "GPIO Key Power"; ++ linux,input-type = <1>; ++ gpio-key,wakeup = <1>; ++ debounce-interval = <100>; ++ }; ++ }; ++ ++ gpio-restart { ++ compatible = "gpio-restart"; ++ gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; ++ open-source; ++ priority = <255>; /* Highest priority */ ++ }; ++ ++ gpiomem { ++ compatible = "rockchip,rock-gpiomem"; ++ ++ /* gpio mmap area define */ ++ /* GPIO0 64K : 0xff720000 - 0xff72ffff */ ++ /* GPIO1 64K : 0xff730000 - 0xff73ffff */ ++ /* Reserved 64K : 0xff740000 - 0xff74ffff */ ++ /* PMUCRU 64K : 0xff750000 - 0xff75ffff */ ++ /* CRU 64K : 0xff760000 - 0xff76ffff */ ++ /* GRF 64K : 0xff770000 - 0xff77ffff */ ++ /* GPIO2 32K : 0xff780000 - 0xff777fff */ ++ /* GPIO3 32K : 0xff788000 - 0xff78ffff */ ++ /* GPIO4 32K : 0xff790000 - 0xff797fff */ ++ reg = <0 0xff720000 0 0x78000>, ++ ++ /* PMUGRF 64K : 0xff320000 - 0xff32ffff */ ++ <0 0xff320000 0 0x10000>; ++ status = "okay"; ++ }; ++ ++ fan0: pwm-fan { ++ compatible = "pwm-fan"; ++ status = "okay"; ++ pwms = <&pwm0 0 40000 PWM_POLARITY_INVERTED>; /* 25 kHz */ ++ ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <255 125 102 51>; /* PWM duty cycle */ ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s2>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ vccadc_ref: vccadc-ref { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ vcc5v0_host31: vcc5v0-host31-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host31_vbus_drv>; ++ regulator-name = "vcc5v0_host31"; ++ }; ++ ++ vcc5v0_host32: vcc5v0-host32-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host32_vbus_drv>; ++ regulator-name = "vcc5v0_host32"; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ /* for rockchip boot on */ ++ rockchip,pwm_id= <2>; ++ rockchip,pwm_voltage = <1000000>; ++ }; ++ ++ odroid_sysfs: odroid-sysfs { ++ status = "okay"; ++ compatible = "odroid-sysfs"; ++ }; ++}; ++ ++&cluster0_opp { ++ opp-408000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-600000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-816000000 { ++ opp-microvolt = <850000>; ++ }; ++ opp-1008000000 { ++ opp-microvolt = <925000>; ++ }; ++ opp-1200000000 { ++ opp-microvolt = <1000000>; ++ }; ++ opp-1416000000 { ++ opp-microvolt = <1125000>; ++ }; ++ opp-1512000000 { ++ opp-hz = /bits/ 64 <1512000000>; ++ opp-microvolt = <1200000>; ++ opp-microvolt-L0 = <1200000>; ++ opp-microvolt-L1 = <1175000>; ++ opp-microvolt-L2 = <1150000>; ++ opp-microvolt-L3 = <1125000>; ++ clock-latency-ns = <40000>; ++ }; ++}; ++ ++&cluster1_opp { ++ opp-408000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-600000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-816000000 { ++ opp-microvolt = <825000>; ++ }; ++ opp-1008000000 { ++ opp-microvolt = <875000>; ++ }; ++ opp-1200000000 { ++ opp-microvolt = <950000>; ++ }; ++ opp-1416000000 { ++ opp-microvolt = <1025000>; ++ }; ++ opp-1608000000 { ++ opp-microvolt = <1100000>; ++ }; ++ opp-1800000000 { ++ opp-microvolt = <1200000>; ++ }; ++ opp-1992000000 { ++ opp-hz = /bits/ 64 <1992000000>; ++ opp-microvolt = <1300000>; ++ opp-microvolt-L0 = <1300000>; ++ opp-microvolt-L1 = <1275000>; ++ opp-microvolt-L2 = <1250000>; ++ opp-microvolt-L3 = <1225000>; ++ clock-latency-ns = <40000>; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gmac { ++ phy-supply = <&vcc_phy>; ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ tx_delay = <0x100>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_gpu>; ++}; ++ ++&hdmi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_in_vopl { ++ status = "disabled"; ++}; ++ ++&dp_in_vopl { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ clock-frequency = <400000>; ++ ++ vdd_cpu_b: syr827@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ vin-supply = <&vcc3v3_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-state = <3>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: syr828@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ vin-supply = <&vcc3v3_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-state = <3>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <23 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l &pmic_dvs2>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ vcc10-supply = <&vcc3v3_sys>; ++ vcc11-supply = <&vcc3v3_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc1v8_pmu>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-name = "vdd_center"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-name = "vdd_cpu_l"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8_dvp"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_tp: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc3v0_tp"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc1v8_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_sd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcca3v0_codec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vcc_1v5"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_codec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc_3v0"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s0"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++}; ++ ++&i2s0 { ++ status = "okay"; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++}; ++ ++&i2s1 { ++ status = "okay"; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <2>; ++ rockchip,capture-channels = <2>; ++ #sound-dai-cells = <0>; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */ ++ audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */ ++ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ ++ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ assigned-clocks = <&cru SCLK_PCIEPHY_REF>; ++ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; ++ assigned-clock-rates = <100000000>; ++ ep-gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; ++ num-lanes = <1>; ++ max-link-speed = <2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmu1830-supply = <&vcc_3v0>; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pmic { ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = ++ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = ++ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = ++ <1 23 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ pmic_dvs2: pmic-dvs2 { ++ rockchip,pins = ++ <1 18 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = ++ <4 25 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host31_vbus_drv: host31-vbus-drv { ++ rockchip,pins = ++ <0 12 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host32_vbus_drv: host32-vbus-drv { ++ rockchip,pins = ++ <0 13 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_pins: led-pins { ++ rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rockchip_suspend { ++ rockchip,power-ctrl = ++ <&gpio1 18 GPIO_ACTIVE_LOW>, ++ <&gpio1 14 GPIO_ACTIVE_HIGH>; ++}; ++ ++&route_edp { ++ status = "disabled"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vccadc_ref>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ keep-power-in-suspend; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++ supports-emmc; ++}; ++ ++&sdmmc { ++ max-frequency = <150000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ num-slots = <1>; ++ vqmmc-supply = <&vcc_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ status = "okay"; ++}; ++ ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&soc_thermal { ++ polling-delay-passive = <20>; /* milliseconds */ ++ polling-delay = <1000>; /* milliseconds */ ++ sustainable-power = <1000>; /* milliwatts */ ++ ++ thermal-sensors = <&tsadc 0>; ++ ++ trips { ++ /* fan active thermal point */ ++ cpu_alert0: trip-point@0 { ++ temperature = <50000>; /* millicelsius */ ++ hysteresis = <10000>; /* millicelsius */ ++ type = "active"; ++ }; ++ cpu_alert1: trip-point@1 { ++ temperature = <55000>; /* millicelsius */ ++ hysteresis = <10000>; /* millicelsius */ ++ type = "active"; ++ }; ++ cpu_alert2: trip-point@2 { ++ temperature = <60000>; /* millicelsius */ ++ hysteresis = <10000>; /* millicelsius */ ++ type = "active"; ++ }; ++ ++ /* big cluster thermal point */ ++ cpu_alert3: trip-point@3 { ++ temperature = <80000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert4: trip-point@4 { ++ temperature = <82000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert5: trip-point@5 { ++ temperature = <85000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert6: trip-point@6 { ++ temperature = <88000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ ++ /* little cluster thermal point */ ++ cpu_alert7: trip-point@7 { ++ temperature = <90000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert8: trip-point@8 { ++ temperature = <92000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert9: trip-point@9 { ++ temperature = <95000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ soc_crit: soc-crit { ++ temperature = <120000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ /* fan cooling map */ ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = ++ <&fan0 0 1>; ++ }; ++ map1 { ++ trip = <&cpu_alert1>; ++ cooling-device = ++ <&fan0 1 2>; ++ }; ++ map2 { ++ trip = <&cpu_alert2>; ++ cooling-device = ++ <&fan0 2 3>; ++ }; ++ ++ /* cpu cooling map */ ++ /* big cluster */ ++ map3 { ++ trip = <&cpu_alert3>; ++ cooling-device = ++ <&cpu_b0 0 2>; ++ contribution = <4096>; ++ }; ++ map4 { ++ trip = <&cpu_alert4>; ++ cooling-device = ++ <&cpu_b0 2 4>; ++ contribution = <4096>; ++ }; ++ map5 { ++ trip = <&cpu_alert5>; ++ cooling-device = ++ <&cpu_b0 4 7>; ++ contribution = <4096>; ++ }; ++ map6 { ++ trip = <&cpu_alert6>; ++ cooling-device = ++ <&cpu_b0 4 7>; ++ contribution = <4096>; ++ }; ++ ++ /* little cluster */ ++ map7 { ++ trip = <&cpu_alert7>; ++ cooling-device = ++ <&cpu_l0 0 2>; ++ contribution = <1024>; ++ }; ++ map8 { ++ trip = <&cpu_alert8>; ++ cooling-device = ++ <&cpu_l0 2 5>; ++ contribution = <1024>; ++ }; ++ ++ map9 { ++ trip = <&cpu_alert9>; ++ cooling-device = ++ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ contribution = <1024>; ++ }; ++ }; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ phy-supply = <&vcc5v0_host31>; ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ phy-supply = <&vcc5v0_host32>; ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&sdio0 { ++ status = "disabled"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd_dwc3_1 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; ++ ++&vpu { ++ status = "okay"; ++}; + +From 7675bf39195d3c70ef6a0b6a123f5ce112012563 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 26 Feb 2018 23:39:15 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3399-rockpro64 board + +--- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 171 ++++++++++++++++++++++ + 1 file changed, 171 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +new file mode 100644 +index 000000000000..0606771dbf5c +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +@@ -0,0 +1,171 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3399-box.dtsi" ++ ++/ { ++ model = "Pine64 RockPro64"; ++ compatible = "pine64,rockpro64", "rockchip,rk3399"; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&cpt_gpio>; ++ ++ sdio0 { ++ sdio0_bus1: sdio0-bus1 { ++ rockchip,pins = ++ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_bus4: sdio0-bus4 { ++ rockchip,pins = ++ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_cmd: sdio0-cmd { ++ rockchip,pins = ++ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_clk: sdio0-clk { ++ rockchip,pins = ++ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus1: sdmmc-bus1 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = ++ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = ++ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ }; ++ ++ fusb30x { ++ fusb0_int: fusb0-int { ++ rockchip,pins = ++ <1 2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ compat { ++ cpt_gpio: cpt-gpio { ++ rockchip,pins = ++ <1 18 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ fusb0: fusb30x@22 { ++ compatible = "fairchild,fusb302"; ++ reg = <0x22>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int>; ++ vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; ++ int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&cdn_dp { ++ status = "okay"; ++ extcon = <&fusb0>; ++}; ++ ++&hdmi_in_vopl { ++ status = "disabled"; ++}; ++ ++&dp_in_vopb { ++ status = "disabled"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ rockchip,phy-table = ++ <74250000 0x8009 0x0004 0x0272>, ++ <165000000 0x802b 0x0004 0x0209>, ++ <297000000 0x8039 0x0005 0x028d>, ++ <594000000 0x8039 0x0000 0x019d>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio1 0x18 0x0>; ++ num-lanes = <4>; ++ max-link-speed = <2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ status = "okay"; ++}; + +From 7a0c34397e79227e3ff85e566e0b121e09b29786 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Mar 2018 09:08:35 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-trn9 board + +--- + arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts | 652 +++++++++++++++++++++++ + 1 file changed, 652 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts +new file mode 100644 +index 000000000000..a736d00d838a +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts +@@ -0,0 +1,652 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Rockchip RK3328 TRN9"; ++ compatible = "rockchip,rk3328-box-trn9", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag"; ++ }; ++ ++ gmac_clkin: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_host_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb30_host_drv>; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb20_host_drv>; ++ regulator-name = "vcc_host1_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "I2S"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ BT,power_gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "rtl8723bs"; ++ WIFI,host_wake_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; ++ clock_in_out = "input"; ++ phy-supply = <&vcc_io>; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmiim1_pins>; ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x26>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "disabled"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&i2s1 { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_18>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clk_32k_out>; ++ ++ clk_32k { ++ clk_32k_out: clk-32k-out { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb2 { ++ usb20_host_drv: usb20-host-drv { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb3 { ++ usb30_host_drv: usb30-host-drv { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdmmc_ext { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ max-frequency = <150000000>; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0ext_bus4 &sdmmc0ext_cmd &sdmmc0ext_clk>; ++ sd-uhs-sdr104; ++ supports-sdio; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; + +From 429966f1cf706834d8e35e4a8ac7230067796734 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Mar 2018 09:08:35 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-z28 board + +--- + arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts | 583 ++++++++++++++++++++++++ + 1 file changed, 583 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts +new file mode 100644 +index 000000000000..d124195d6798 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts +@@ -0,0 +1,583 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Rockchip RK3328 Z28"; ++ compatible = "rockchip,rk3328-box-z28", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_host_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb30_host_drv>; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb20_host_drv>; ++ regulator-name = "vcc_host1_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ BT,power_gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "rtl8188eu"; ++ WIFI,poweren_gpio = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>; ++ WIFI,reset_gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; ++ WIFI,host_wake_irq = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_io>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clk_32k_out>; ++ ++ clk_32k { ++ clk_32k_out: clk-32k-out { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ usb20_host_drv: usb20-host-drv { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb3 { ++ usb30_host_drv: usb30-host-drv { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-legacy.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-legacy.patch deleted file mode 100644 index 17bb37f34e..0000000000 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-legacy.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 23c1ed00568676ff958024283024a30b0c37565b Mon Sep 17 00:00:00 2001 -From: LongChair -Date: Sun, 26 Mar 2017 15:30:16 +0200 -Subject: [PATCH] drm/rockchip: make video overlay bottom layer - ---- - drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index d626acf00f10..2b0c739ade64 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -@@ -283,9 +283,9 @@ static const struct vop_ctrl rk3288_ctrl_data = { - */ - static const struct vop_win_data rk3288_vop_win_data[] = { - { .base = 0x00, .phy = &rk3288_win01_data, -- .type = DRM_PLANE_TYPE_PRIMARY }, -- { .base = 0x40, .phy = &rk3288_win01_data, - .type = DRM_PLANE_TYPE_OVERLAY }, -+ { .base = 0x40, .phy = &rk3288_win01_data, -+ .type = DRM_PLANE_TYPE_PRIMARY }, - { .base = 0x00, .phy = &rk3288_win23_data, - .type = DRM_PLANE_TYPE_OVERLAY, - .area = rk3288_area_data, -@@ -988,10 +988,10 @@ static const struct vop_csc rk3328_win2_csc = { - - static const struct vop_win_data rk3328_vop_win_data[] = { - { .base = 0xd0, .phy = &rk3288_win01_data, .csc = &rk3328_win0_csc, -- .type = DRM_PLANE_TYPE_PRIMARY, -+ .type = DRM_PLANE_TYPE_OVERLAY, - .feature = WIN_FEATURE_HDR2SDR | WIN_FEATURE_SDR2HDR }, - { .base = 0x1d0, .phy = &rk3288_win01_data, .csc = &rk3328_win1_csc, -- .type = DRM_PLANE_TYPE_OVERLAY, -+ .type = DRM_PLANE_TYPE_PRIMARY, - .feature = WIN_FEATURE_SDR2HDR | WIN_FEATURE_PRE_OVERLAY }, - { .base = 0x2d0, .phy = &rk3288_win01_data, .csc = &rk3328_win2_csc, - .type = DRM_PLANE_TYPE_CURSOR, - -From dfed31cd9c52c004a51ac4e673e2746aeb0977fa Mon Sep 17 00:00:00 2001 -From: LongChair -Date: Mon, 24 Apr 2017 09:48:54 +0200 -Subject: [PATCH] drm : allow framebuffer and videomodes not to have same size - -DRM legacy doesn't allow that, will be only available with drm atomic. -Although, when running 4K modes, it's preferable to get a 1080p frambuffer that can be handlded properly by GPU and then use VOP to upscale that to 4K. ---- - drivers/gpu/drm/drm_atomic_helper.c | 8 ++++---- - drivers/gpu/drm/drm_crtc.c | 2 ++ - 2 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c -index f77d4aa1e58b..e611f93a80d6 100644 ---- a/drivers/gpu/drm/drm_atomic_helper.c -+++ b/drivers/gpu/drm/drm_atomic_helper.c -@@ -2210,11 +2210,11 @@ int __drm_atomic_helper_set_config(struct drm_mode_set *set, - primary_state->src_x = set->x << 16; - primary_state->src_y = set->y << 16; - if (primary_state->rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270))) { -- primary_state->src_h = hdisplay << 16; -- primary_state->src_w = vdisplay << 16; -+ primary_state->src_h = set->fb->width << 16; -+ primary_state->src_w = set->fb->height << 16; - } else { -- primary_state->src_h = vdisplay << 16; -- primary_state->src_w = hdisplay << 16; -+ primary_state->src_h = set->fb->height << 16; -+ primary_state->src_w = set->fb->width << 16; - } - - commit: -diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c -index 7cd13faf83ca..365e3d588163 100644 ---- a/drivers/gpu/drm/drm_crtc.c -+++ b/drivers/gpu/drm/drm_crtc.c -@@ -2931,6 +2931,8 @@ int drm_crtc_check_viewport(const struct drm_crtc *crtc, - - { - int hdisplay, vdisplay; -+ pr_info("%s: skip check\n", __func__); -+ return 0; - - drm_crtc_get_hv_timing(mode, &hdisplay, &vdisplay); - diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-rtl8211f.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch similarity index 97% rename from projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-rtl8211f.patch rename to projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch index d6d7b2c6e8..dc6600ee86 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-rtl8211f.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch @@ -1,4 +1,4 @@ -From 8c15967b21f2caf9897b1c4fa6c80b5de07aa7d0 Mon Sep 17 00:00:00 2001 +From 7894722c99f2be6806a245c2db1c0df61e890096 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Fri, 25 Nov 2016 14:12:01 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: fix enabling of the TX-delay for @@ -66,7 +66,7 @@ index 43ab691362d4..686f3b259dc0 100644 return 0; } -From b3a985bdb18be879aa7a8ffe7fd9d7f1ee7a201d Mon Sep 17 00:00:00 2001 +From 91f88fe0a8ae6a575e42384236ddac74a7343f33 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 12 Sep 2017 18:54:35 +0900 Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL8211F_PAGE_SELECT to @@ -132,7 +132,7 @@ index 686f3b259dc0..d58cc8f518ac 100644 return 0; } -From 3a2afedaf759bd28b2c94f4f1e9ef06909142728 Mon Sep 17 00:00:00 2001 +From 418a6d18802923ffc35b9d8d40ce97a7d44f4482 Mon Sep 17 00:00:00 2001 From: Jassi Brar Date: Tue, 12 Sep 2017 18:54:36 +0900 Subject: [PATCH] UPSTREAM: net: phy: realtek: add RTL8201F phy-id and @@ -235,7 +235,7 @@ index d58cc8f518ac..422cf1f6a60c 100644 { 0x001cc914, 0x001fffff }, { 0x001cc915, 0x001fffff }, -From 25fa2a3516b4836cc1ccf275dfb6f4eee1e21ba4 Mon Sep 17 00:00:00 2001 +From 0e7b02714fa25f16aebcb917fa7017aded5bdf06 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Sun, 12 Nov 2017 16:16:04 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: fix RTL8211F interrupt mode @@ -280,7 +280,7 @@ index 422cf1f6a60c..a30d0c08c63b 100644 return err; } -From 4c621c2c47a298310290c3a053f5d5b920470927 Mon Sep 17 00:00:00 2001 +From 013120bec5f5e717baf7465e0eaafd6e5141d8c6 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:24 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: use the BIT and GENMASK macros @@ -329,7 +329,7 @@ index a30d0c08c63b..f8dc29a75828 100644 #define RTL8201F_ISR 0x1e #define RTL8201F_IER 0x13 -From 3167d5ad9d83b77af30fe513bef24430bc31bdb4 Mon Sep 17 00:00:00 2001 +From ac2c0298c225eacc49b74a6f723b18a99a7b4b28 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:25 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL821x_INER_INIT to @@ -370,7 +370,7 @@ index f8dc29a75828..89308eac4088 100644 err = phy_write(phydev, RTL821x_INER, 0); -From 351cf2d39cbbf73ca6369f2967176bc24b30dba0 Mon Sep 17 00:00:00 2001 +From 68e38ec78893a72b91255eaf56e1aa5dfcf81d1f Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:26 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: group all register bit #defines @@ -414,7 +414,7 @@ index 89308eac4088..df97d903d2bf 100644 #define RTL8211F_TX_DELAY BIT(8) -From 2eca64452d4ba8d77ee9edf9a554ec122b2fe53a Mon Sep 17 00:00:00 2001 +From 89b955d9f11cc268626cdedbf75561ccc607bb90 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:27 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: use the same indentation for all @@ -474,7 +474,7 @@ index df97d903d2bf..701f34ad7d8d 100644 MODULE_DESCRIPTION("Realtek PHY driver"); MODULE_AUTHOR("Johnson Leung"); -From dedcf805b9b0cadc952d358a39ba5cfb7af7765e Mon Sep 17 00:00:00 2001 +From 304312f104de088682456d4cf7353732685fe455 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:28 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: add utility functions to @@ -645,7 +645,7 @@ index 701f34ad7d8d..b1d52e61d91c 100644 return 0; } -From 9fece68d69e33eadcb03bb9dfd4240be21357603 Mon Sep 17 00:00:00 2001 +From aa354e4db670dda7682b1c4aed23cd6ffb51f715 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 23:06:48 +0100 Subject: [PATCH] FROMLIST: net: phy: realtek: add support for configuring the @@ -755,7 +755,7 @@ index b1d52e61d91c..890ea9d18d27 100644 return ret; -From 62c37a52b123444e2696963251428b0b9566721c Mon Sep 17 00:00:00 2001 +From 1503227b699167969f0c630a95f73e7760edefbc Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 23:06:49 +0100 Subject: [PATCH] FROMLIST: net: phy: realtek: configure the INTB pin on @@ -834,7 +834,7 @@ index 890ea9d18d27..f307d220b49a 100644 return rtl8211x_page_write(phydev, 0xa42, RTL821x_INER, val); } -From 4ea16aca3e2095f6904f1a534d8c668c383f595b Mon Sep 17 00:00:00 2001 +From 429c1855e10305c2838913a9dc074bd70831bb14 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 23:06:50 +0100 Subject: [PATCH] FROMLIST: net: phy: realtek: add more interrupt bits for diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-dtoverlay-configfs.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch similarity index 99% rename from projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-dtoverlay-configfs.patch rename to projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch index 10faee01de..a0ffcf317a 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-dtoverlay-configfs.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch @@ -1,4 +1,4 @@ -From 76d5a6e8f8b6a9574e52ff1ff303d09a55f2474c Mon Sep 17 00:00:00 2001 +From 59a82f24064c60e03af52938e5a2257038e1ee07 Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Thu, 22 Oct 2015 23:30:04 +0300 Subject: [PATCH] UPSTREAM: configfs: implement binary attributes @@ -651,7 +651,7 @@ index 758a029011b1..f7300d023dbe 100644 * If allow_link() exists, the item can symlink(2) out to other * items. If the item is a group, it may support mkdir(2). -From 31cda7c76173d5a63f153191237764201c6b0f6c Mon Sep 17 00:00:00 2001 +From e35c4a7f4a74aa78fb3518e6eaccb7387600eccb Mon Sep 17 00:00:00 2001 From: Octavian Purdila Date: Wed, 23 Mar 2016 14:14:48 +0200 Subject: [PATCH] UPSTREAM: configfs: fix CONFIGFS_BIN_ATTR_[RW]O definitions @@ -689,7 +689,7 @@ index f7300d023dbe..658066d63180 100644 .ca_name = __stringify(_name), \ .ca_mode = S_IWUSR, \ -From 8f9101e3d38691c7f17057173b32a57a2173382f Mon Sep 17 00:00:00 2001 +From b0f4ef7b999ed084376777763e20644dc9061ad3 Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Wed, 4 Dec 2013 19:32:00 +0200 Subject: [PATCH] FROMLIST: OF: DT-Overlay configfs interface (v7) diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc-pwrseq.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch similarity index 98% rename from projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc-pwrseq.patch rename to projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch index 89219c55de..ce5cc4992a 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc-pwrseq.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch @@ -1,4 +1,4 @@ -From bbfc2a0527160401e8e668a0dbeb6fc7ad8ad625 Mon Sep 17 00:00:00 2001 +From 3c894b625c24537d22213836dbc44e1973b2b1f4 Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Sat, 14 Nov 2015 18:05:20 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq: constify mmc_pwrseq_ops structures @@ -56,7 +56,7 @@ index d10538bb5e07..2b16263458af 100644 .post_power_on = mmc_pwrseq_simple_post_power_on, .power_off = mmc_pwrseq_simple_power_off, -From 20acf1170bc2135cd600fceb97a18dcd7468fcfc Mon Sep 17 00:00:00 2001 +From 11396ee87b7a090c5807c2fc2b8a640d109c30ce Mon Sep 17 00:00:00 2001 From: Martin Fuzzey Date: Wed, 20 Jan 2016 16:08:03 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Make reset-gpios optional to @@ -128,7 +128,7 @@ index 2b16263458af..aba786daebca 100644 goto clk_put; } -From 6eab92ee9750e9e1f82f600ecfdd5e1990bb50e6 Mon Sep 17 00:00:00 2001 +From eecad6e4c48e9e82ec2f8415dec690f67c7ba12b Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Wed, 6 Jan 2016 11:34:10 +0800 Subject: [PATCH] UPSTREAM: mmc: core: pwrseq_simple: remove unused header file @@ -153,7 +153,7 @@ index aba786daebca..bc173e18b71c 100644 #include -From 0eb034a2e78479467e7b0551f7b1ac3cfeec3c07 Mon Sep 17 00:00:00 2001 +From ea74f89b7e6bb89a2824df5bf3ae94786f6b30b3 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 14 Apr 2016 14:02:14 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: add to_pwrseq_simple() macro @@ -220,7 +220,7 @@ index bc173e18b71c..f94271bb1f6b 100644 if (!IS_ERR(pwrseq->reset_gpios)) gpiod_put_array(pwrseq->reset_gpios); -From adfbca02ae62674576d6d88a30ef9c1d8ec502fa Mon Sep 17 00:00:00 2001 +From 11bf8cedf08ee10e4053d8787268c69a0bd7419b Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 14 Apr 2016 14:02:15 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq_emmc: add to_pwrseq_emmc() macro @@ -267,7 +267,7 @@ index 4a82bc77fe49..c2d732aa464c 100644 unregister_restart_handler(&pwrseq->reset_nb); gpiod_put(pwrseq->reset_gpio); -From 107ec2633bdbfb18f18b80ad2b9bd9c1a43fe3d8 Mon Sep 17 00:00:00 2001 +From 9a32c48a17c3a0de3bd96cc6e9289d9fb8710b91 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 14 Apr 2016 14:02:16 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq: convert to proper platform device @@ -785,7 +785,7 @@ index f94271bb1f6b..450d907c6e6c 100644 +module_platform_driver(mmc_pwrseq_simple_driver); +MODULE_LICENSE("GPL v2"); -From d4986d574cca4ea8985a3d725ff4190b8ad584f3 Mon Sep 17 00:00:00 2001 +From d94057e963bb557eb61324a2f05e5a0a743813c5 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 7 Aug 2016 21:02:38 +0200 Subject: [PATCH] UPSTREAM: mmc: pwrseq-simple: Add an optional @@ -861,7 +861,7 @@ index 450d907c6e6c..1304160de168 100644 pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops; pwrseq->pwrseq.owner = THIS_MODULE; -From dc809aa3772b2cbc912b34bf6a99daba7c071cac Mon Sep 17 00:00:00 2001 +From 50e40e09e01a67684fd3b7ef2422f194a656dd93 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Sat, 6 May 2017 11:41:30 +0200 Subject: [PATCH] UPSTREAM: mmc: dt: pwrseq-simple: Invent power-off-delay-us @@ -897,7 +897,7 @@ index e25436861867..9029b45b8a22 100644 Example: -From e0841b21b5b9597b674ddbf3f62fe0c418467a93 Mon Sep 17 00:00:00 2001 +From e4960aff45ecb83728279dd1e524f4e62ec11240 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Sat, 6 May 2017 11:43:05 +0200 Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Parse DTS for the diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch index 48005dcd77..0efb534c19 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch @@ -1,4 +1,4 @@ -From b9995f420ecbdc8496a3f92f4e35173268fc2697 Mon Sep 17 00:00:00 2001 +From 1ed55271b88f5055f501d4c83e1702b38760ccdf Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 10:47:28 +0100 Subject: [PATCH] Revert "dmaengine: pl330: fix bug that chan descdone is null" @@ -39,7 +39,7 @@ index 08179f5d0428..766ab72d119e 100644 } -From 4c25aa573e13f31f628d10ae41f24264fe15695c Mon Sep 17 00:00:00 2001 +From 43f2eb7bd8a74147c2d9fe37d98df41c4973db63 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 10:47:38 +0100 Subject: [PATCH] Revert "dmaengine: pl330: flush before first loop" @@ -80,7 +80,7 @@ index 766ab72d119e..055e3cd8832c 100644 c = bursts; off += _loop(pl330, dry_run, &buf[off], &c, pxs); -From 4977bdedb837ac640fd6be482ed7c501959e4a55 Mon Sep 17 00:00:00 2001 +From 1bea0136096ba90fb53c056f3ce3422086361a02 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 10:47:51 +0100 Subject: [PATCH] Revert "dmaengine: pl330: fix 2 bursts transfer when dma @@ -130,7 +130,7 @@ index 055e3cd8832c..ce52aa411c0b 100644 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) off += _emit_FLUSHP(dry_run, &buf[off], -From 29be0d6a2e7bace45bc18728b59d7bcac498cb0c Mon Sep 17 00:00:00 2001 +From b234afcd6b84fedb81f0cb14dc0002b3cefe0296 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 21 Oct 2017 19:49:27 +0200 Subject: [PATCH] Revert "dmaengine: pl330: _loop_cyclic fix cycles of last @@ -155,7 +155,7 @@ index ce52aa411c0b..9fbd8d863774 100644 off += _bursts(pl330, dry_run, &buf[off], pxs, 1); lpend.cond = ALWAYS; -From 350bb8b0d3efbeb398c058d6343a7a9466230b36 Mon Sep 17 00:00:00 2001 +From a7c635636d588f97e1e9a22313029843a3f8b486 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 11:05:44 +0100 Subject: [PATCH] Revert "dmaengine: pl330: pl330_tasklet init power_down by @@ -180,7 +180,7 @@ index 9fbd8d863774..359475bbe89f 100644 } else { /* Make sure the PL330 Channel thread is active */ -From 3eff212db53fd374baa1a9040212442057bb9110 Mon Sep 17 00:00:00 2001 +From 50f85fa5c566c0d706ca264fa9327bc360255639 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:54 +0200 Subject: [PATCH] Revert "dmaengine: pl330: _loop_cyclic supports unaligned @@ -256,7 +256,7 @@ index 359475bbe89f..3fa6a7e474de 100644 pxs, thrd->ev); } -From 7835c891fdb8016da760f81b95291333b03c9fbc Mon Sep 17 00:00:00 2001 +From f511e38f0d47ec8f8cd4db8f05fae8d496cec3a1 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:54 +0200 Subject: [PATCH] Revert "dmaengine: pl330: redefine the cyclic transfer" @@ -471,7 +471,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 fill_px(&desc->px, dst, src, period_len); -From e5c15e6005f796dae98de9e7a0d844bd101cd974 Mon Sep 17 00:00:00 2001 +From 682a7f71bd308635045e9d49cbabb31002429d3f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:54 +0200 Subject: [PATCH] Revert "dmaengine: pl330: make transfer run infinitely @@ -814,7 +814,7 @@ index 0452a189d7fd..47c2e67f0296 100644 return &desc->txd; -From 6fa8512feac35cc27a6b929a0a9b5baaf8ec104d Mon Sep 17 00:00:00 2001 +From bf7ad151876459f44d29cb8949a95b69b2f3c3db Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:55 +0200 Subject: [PATCH] Revert "dmaengine: pl330: support transfer that doesn't align @@ -874,7 +874,7 @@ index 47c2e67f0296..b5cf3fe9e9c3 100644 off += _setup_xfer(pl330, dry_run, &buf[off], pxs); -From 0e2fc7209d34d86502cfe4cf2a8808dc51e99492 Mon Sep 17 00:00:00 2001 +From 782768f2aa48a7ec4ef509936a2ff46f481d3d3c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:55 +0200 Subject: [PATCH] Revert "dmaengine: pl330: add burst mode according to dts @@ -975,7 +975,7 @@ index b5cf3fe9e9c3..131763534a39 100644 for (i = 0; i < ARRAY_SIZE(of_quirks); i++) if (of_property_read_bool(np, of_quirks[i].quirk)) -From 11bc7b36d8a54c6c1858c23a1e91a660ab8f34c8 Mon Sep 17 00:00:00 2001 +From a715ea1481fee1d4be239873f89c38a95cddc7cc Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Tue, 5 Jul 2016 10:02:16 +0530 Subject: [PATCH] UPSTREAM: dmaengine: pl330: explicitly freeup irq @@ -1018,7 +1018,7 @@ index 131763534a39..5b4a419673fc 100644 /* Idle the DMAC */ -From 0406b9fd94d38cc2de78e82bd7b7c3272991e7d5 Mon Sep 17 00:00:00 2001 +From 5dd1aed3e2ad901aa4b3be9db31e1b2e7b270b45 Mon Sep 17 00:00:00 2001 From: Stephen Barber Date: Thu, 18 Aug 2016 17:59:59 -0700 Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix residual for non-running BUSY @@ -1078,7 +1078,7 @@ index 5b4a419673fc..aab5abab5a10 100644 transferred = 0; residual += desc->bytes_requested - transferred; -From 9bda78186df672f7c813dfd7db3bcd6d557e11e5 Mon Sep 17 00:00:00 2001 +From e2ae4ead3868a8aad8b87dcc8523e392302bc77a Mon Sep 17 00:00:00 2001 From: Hsin-Yu Chao Date: Tue, 23 Aug 2016 17:16:55 +0800 Subject: [PATCH] UPSTREAM: dmaengine: pl330: Acquire dmac's spinlock in @@ -1123,7 +1123,7 @@ index aab5abab5a10..1741cfbe311e 100644 out: -From 6e3724a83db9e92e163261bc22c2e3f6f0865e69 Mon Sep 17 00:00:00 2001 +From fc4fc3aa1348b018e072526781991bc837113436 Mon Sep 17 00:00:00 2001 From: Stephen Barber Date: Tue, 1 Nov 2016 16:44:27 -0700 Subject: [PATCH] UPSTREAM: dmaengine: pl330: Handle xferred count if DMAMOV @@ -1158,7 +1158,7 @@ index 1741cfbe311e..dd58cf886fa0 100644 } -From 529feba8e68c331c6385d51e820599466a24f6eb Mon Sep 17 00:00:00 2001 +From d5ad98021dc2135d0d5df3fbca7f74b97d1341af Mon Sep 17 00:00:00 2001 From: Vladimir Murzin Date: Wed, 7 Dec 2016 13:17:40 +0000 Subject: [PATCH] UPSTREAM: dmaengine: pl330: do not generate unaligned access @@ -1260,7 +1260,7 @@ index dd58cf886fa0..50a5f8e1e371 100644 return SZ_DMAGO; } -From 6b7fb23e9950ce28ddc7303236bfe2e8c9505fa9 Mon Sep 17 00:00:00 2001 +From 8c88ea42d57ce47924c1fc8524a61ef96f8bba51 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Fri, 9 Dec 2016 15:24:12 +0530 Subject: [PATCH] =?UTF-8?q?UPSTREAM:=20dmaengine:=20pl330:=20remove=20unus?= @@ -1301,7 +1301,7 @@ index 50a5f8e1e371..c725ceb4644d 100644 if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", -From 7c01c9e12f3c5ba64102d9cdf3022427c2cb87dd Mon Sep 17 00:00:00 2001 +From 7b131091273ee28bfa40e16b13f24fed7880abcb Mon Sep 17 00:00:00 2001 From: Jean-Philippe Brucker Date: Thu, 1 Jun 2017 19:22:01 +0100 Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix warning in pl330_remove @@ -1333,7 +1333,7 @@ index c725ceb4644d..73eaf78871f1 100644 dma_async_device_unregister(&pl330->ddma); -From e2cdb111e43e8ca7ac2682bb95a7d056e50c847e Mon Sep 17 00:00:00 2001 +From 69414d3c8067401efa793708cb465f3891c087b7 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Mon, 27 Mar 2017 07:31:03 +0200 Subject: [PATCH] UPSTREAM: dmaengine: pl330: remove pdata based initialization @@ -1512,7 +1512,7 @@ index fe93758e8403..000000000000 -extern bool pl330_filter(struct dma_chan *chan, void *param); -#endif /* __AMBA_PL330_H_ */ -From 9093533777a0b008ac236ddf724312931e76a156 Mon Sep 17 00:00:00 2001 +From b6ec69572e0392b5aa2ded093809d2ff12efb32a Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Thu, 15 Jun 2017 16:55:57 -0700 Subject: [PATCH] UPSTREAM: dmaengine: pl330: Delete unused functions @@ -1627,7 +1627,7 @@ index 23fdb826c6e8..51aa1de88007 100644 enum pl330_cond cond, u8 peri) { -From f1dc421cf01a6fb47f157f6d15eb50955c9a0aef Mon Sep 17 00:00:00 2001 +From e8316771f06dfd265999bfd43301329c6955fb24 Mon Sep 17 00:00:00 2001 From: Arvind Yadav Date: Wed, 23 Aug 2017 21:57:31 +0530 Subject: [PATCH] UPSTREAM: dmaengine: pl330: constify amba_id @@ -1656,7 +1656,7 @@ index 51aa1de88007..defec1b4bc2f 100644 .id = 0x00041330, .mask = 0x000fffff, -From efc0eb0c26f642db285a449c52d3d571d06206fe Mon Sep 17 00:00:00 2001 +From 784e0ffe42096a6c6119668a631338c6cff43374 Mon Sep 17 00:00:00 2001 From: Alexander Kochetkov Date: Wed, 4 Oct 2017 14:37:23 +0300 Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix descriptor allocation fail diff --git a/scripts/uboot_helper b/scripts/uboot_helper index 47dda5d741..74de5024bb 100755 --- a/scripts/uboot_helper +++ b/scripts/uboot_helper @@ -13,13 +13,16 @@ devices = { 'MiQi' : { 'rk3288' : { 'dtb' : 'rk3288-miqi.dtb', 'config' : 'miqi-rk3288_config' }, }, 'RK3328' : { 'box' : { 'dtb' : 'rk3328-box.dtb', 'config' : 'evb-rk3328_defconfig' }, - 'box-plus' : { 'dtb' : 'rk3328-box-plus.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'box-trn9' : { 'dtb' : 'rk3328-box-trn9.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'box-z28' : { 'dtb' : 'rk3328-box-z28.dtb', 'config' : 'evb-rk3328_defconfig' }, 'roc-cc' : { 'dtb' : 'rk3328-roc-cc.dtb', 'config' : 'evb-rk3328_defconfig' }, 'rock64' : { 'dtb' : 'rk3328-rock64.dtb', 'config' : 'evb-rk3328_defconfig' }, 'rockbox' : { 'dtb' : 'rk3328-rockbox.dtb', 'config' : 'evb-rk3328_defconfig' }, }, 'RK3399' : { + 'odroidn1' : { 'dtb' : 'rk3399-odroidn1.dtb', 'config' : 'odroidn1_config' }, 'rock960' : { 'dtb' : 'rk3399-rock960.dtb', 'config' : 'evb-rk3399_config' }, + 'rockpro64' : { 'dtb' : 'rk3399-rockpro64.dtb', 'config' : 'evb-rk3399_config' }, 'sapphire' : { 'dtb' : 'rk3399-sapphire.dtb', 'config' : 'evb-rk3399_config' }, }, 'TinkerBoard' : { 'rk3288' : { 'dtb' : 'rk3288-miniarm.dtb', 'config' : 'tinker-rk3288_config' }, },