From 1d0bfb1daa6b8da7c31b4cb16c7a6c65f58e7856 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Sun, 1 May 2022 04:00:26 +0000 Subject: [PATCH] linux (Allwinner): I2S multi-channel patch for 5.18 --- .../linux/0033-WIP-I2S-multi-channel.patch | 69 ++++++++++--------- 1 file changed, 35 insertions(+), 34 deletions(-) diff --git a/projects/Allwinner/patches/linux/0033-WIP-I2S-multi-channel.patch b/projects/Allwinner/patches/linux/0033-WIP-I2S-multi-channel.patch index c74a2a654e..7b8421ee43 100644 --- a/projects/Allwinner/patches/linux/0033-WIP-I2S-multi-channel.patch +++ b/projects/Allwinner/patches/linux/0033-WIP-I2S-multi-channel.patch @@ -20,7 +20,7 @@ Signed-off-by: Jernej Skrabec #define SUN4I_I2S_CTRL_MODE_SLAVE (1 << 5) #define SUN4I_I2S_CTRL_MODE_MASTER (0 << 5) @@ -120,8 +120,8 @@ - #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(2, 0) + #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(3, 0) #define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) ((chan) - 1) -#define SUN8I_I2S_TX_CHAN_MAP_REG 0x44 @@ -30,7 +30,7 @@ Signed-off-by: Jernej Skrabec #define SUN8I_I2S_TX_CHAN_OFFSET_MASK GENMASK(13, 12) #define SUN8I_I2S_TX_CHAN_OFFSET(offset) ((offset) << 12) #define SUN8I_I2S_TX_CHAN_EN_MASK GENMASK(11, 4) -@@ -189,7 +189,7 @@ struct sun4i_i2s_quirks { +@@ -198,7 +198,7 @@ struct sun4i_i2s_quirks { * @slots: channels per frame + padding slots, regardless of format * @slot_width: bits per sample + padding bits, regardless of format */ @@ -39,7 +39,7 @@ Signed-off-by: Jernej Skrabec unsigned int channels, unsigned int slots, unsigned int slot_width); int (*set_fmt)(const struct sun4i_i2s *i2s, unsigned int fmt); -@@ -205,6 +205,7 @@ struct sun4i_i2s { +@@ -214,6 +214,7 @@ struct sun4i_i2s { unsigned int mclk_freq; unsigned int slots; unsigned int slot_width; @@ -47,7 +47,7 @@ Signed-off-by: Jernej Skrabec struct snd_dmaengine_dai_dma_data capture_dma_data; struct snd_dmaengine_dai_dma_data playback_dma_data; -@@ -445,7 +446,7 @@ static int sun8i_i2s_get_sr_wss(unsigned +@@ -454,7 +455,7 @@ static int sun8i_i2s_get_sr_wss(unsigned return -EINVAL; } @@ -56,7 +56,7 @@ Signed-off-by: Jernej Skrabec unsigned int channels, unsigned int slots, unsigned int slot_width) { -@@ -464,20 +465,42 @@ static int sun4i_i2s_set_chan_cfg(const +@@ -473,20 +474,42 @@ static int sun4i_i2s_set_chan_cfg(const return 0; } @@ -105,7 +105,7 @@ Signed-off-by: Jernej Skrabec regmap_update_bits(i2s->regmap, SUN8I_I2S_RX_CHAN_SEL_REG, SUN4I_I2S_CHAN_SEL_MASK, SUN4I_I2S_CHAN_SEL(channels)); -@@ -509,29 +532,47 @@ static int sun8i_i2s_set_chan_cfg(const +@@ -518,36 +541,54 @@ static int sun8i_i2s_set_chan_cfg(const SUN8I_I2S_FMT0_LRCK_PERIOD_MASK, SUN8I_I2S_FMT0_LRCK_PERIOD(lrck_period)); @@ -133,18 +133,23 @@ Signed-off-by: Jernej Skrabec + SUN4I_I2S_CTRL_SDO_EN(i2s->lines)); /* Map the channels for playback and capture */ -- regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP0_REG, 0xFEDCBA98); -- regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG, 0x76543210); -+ regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP0_REG(0), 0xFEDCBA98); -+ regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG(0), 0x76543210); + regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP0_REG(0), 0xFEDCBA98); + regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG(0), 0x76543210); + regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG(1), 0x32); + regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG(2), 0x54); + regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG(3), 0x76); - regmap_write(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_MAP0_REG, 0xFEDCBA98); - regmap_write(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_MAP1_REG, 0x76543210); + if (i2s->variant->num_din_pins > 1) { + regmap_write(i2s->regmap, SUN50I_R329_I2S_RX_CHAN_MAP0_REG, 0x0F0E0D0C); + regmap_write(i2s->regmap, SUN50I_R329_I2S_RX_CHAN_MAP1_REG, 0x0B0A0908); + regmap_write(i2s->regmap, SUN50I_R329_I2S_RX_CHAN_MAP2_REG, 0x07060504); + regmap_write(i2s->regmap, SUN50I_R329_I2S_RX_CHAN_MAP3_REG, 0x03020100); + } else { + regmap_write(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_MAP0_REG, 0xFEDCBA98); + regmap_write(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_MAP1_REG, 0x76543210); + } /* Configure the channels */ -- regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG, +- regmap_update_bits(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_SEL_REG(0), - SUN50I_H6_I2S_TX_CHAN_SEL_MASK, - SUN50I_H6_I2S_TX_CHAN_SEL(channels)); + for (i = 0; i < 4; i++) { @@ -154,7 +159,7 @@ Signed-off-by: Jernej Skrabec + val = 1; + else + val = 2; -+ regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG(i), ++ regmap_update_bits(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_SEL_REG(i), + SUN50I_H6_I2S_TX_CHAN_SEL_MASK | + SUN50I_H6_I2S_TX_CHAN_EN_MASK, + SUN50I_H6_I2S_TX_CHAN_SEL(val) | @@ -164,18 +169,18 @@ Signed-off-by: Jernej Skrabec regmap_update_bits(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_SEL_REG, SUN50I_H6_I2S_TX_CHAN_SEL_MASK, SUN50I_H6_I2S_TX_CHAN_SEL(channels)); -@@ -563,10 +604,6 @@ static int sun50i_h6_i2s_set_chan_cfg(co +@@ -579,10 +620,6 @@ static int sun50i_h6_i2s_set_chan_cfg(co SUN8I_I2S_FMT0_LRCK_PERIOD_MASK, SUN8I_I2S_FMT0_LRCK_PERIOD(lrck_period)); -- regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG, +- regmap_update_bits(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_SEL_REG(0), - SUN50I_H6_I2S_TX_CHAN_EN_MASK, - SUN50I_H6_I2S_TX_CHAN_EN(channels)); - return 0; } -@@ -711,6 +748,7 @@ static int sun8i_i2s_set_soc_fmt(const s +@@ -727,6 +764,7 @@ static int sun8i_i2s_set_soc_fmt(const s { u32 mode, val; u8 offset; @@ -183,7 +188,7 @@ Signed-off-by: Jernej Skrabec /* * DAI clock polarity -@@ -778,9 +816,10 @@ static int sun8i_i2s_set_soc_fmt(const s +@@ -794,9 +832,10 @@ static int sun8i_i2s_set_soc_fmt(const s regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG, SUN8I_I2S_CTRL_MODE_MASK, mode); @@ -197,7 +202,7 @@ Signed-off-by: Jernej Skrabec regmap_update_bits(i2s->regmap, SUN8I_I2S_RX_CHAN_SEL_REG, SUN8I_I2S_TX_CHAN_OFFSET_MASK, SUN8I_I2S_TX_CHAN_OFFSET(offset)); -@@ -818,6 +857,7 @@ static int sun50i_h6_i2s_set_soc_fmt(con +@@ -834,6 +873,7 @@ static int sun50i_h6_i2s_set_soc_fmt(con { u32 mode, val; u8 offset; @@ -205,7 +210,7 @@ Signed-off-by: Jernej Skrabec /* * DAI clock polarity -@@ -885,9 +925,10 @@ static int sun50i_h6_i2s_set_soc_fmt(con +@@ -901,9 +941,10 @@ static int sun50i_h6_i2s_set_soc_fmt(con regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG, SUN8I_I2S_CTRL_MODE_MASK, mode); @@ -219,7 +224,7 @@ Signed-off-by: Jernej Skrabec regmap_update_bits(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_SEL_REG, SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET_MASK, SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(offset)); -@@ -1196,8 +1237,14 @@ static const struct reg_default sun8i_i2 +@@ -1212,8 +1253,14 @@ static const struct reg_default sun8i_i2 { SUN4I_I2S_DMA_INT_CTRL_REG, 0x00000000 }, { SUN4I_I2S_CLK_DIV_REG, 0x00000000 }, { SUN8I_I2S_CHAN_CFG_REG, 0x00000000 }, @@ -236,19 +241,15 @@ Signed-off-by: Jernej Skrabec { SUN8I_I2S_RX_CHAN_SEL_REG, 0x00000000 }, { SUN8I_I2S_RX_CHAN_MAP_REG, 0x00000000 }, }; -@@ -1210,9 +1257,18 @@ static const struct reg_default sun50i_h - { SUN4I_I2S_DMA_INT_CTRL_REG, 0x00000000 }, +@@ -1227,8 +1274,17 @@ static const struct reg_default sun50i_h { SUN4I_I2S_CLK_DIV_REG, 0x00000000 }, { SUN8I_I2S_CHAN_CFG_REG, 0x00000000 }, -- { SUN8I_I2S_TX_CHAN_SEL_REG, 0x00000000 }, -- { SUN50I_H6_I2S_TX_CHAN_MAP0_REG, 0x00000000 }, -- { SUN50I_H6_I2S_TX_CHAN_MAP1_REG, 0x00000000 }, -+ { SUN8I_I2S_TX_CHAN_SEL_REG(0), 0x00000000 }, -+ { SUN8I_I2S_TX_CHAN_SEL_REG(1), 0x00000000 }, -+ { SUN8I_I2S_TX_CHAN_SEL_REG(2), 0x00000000 }, -+ { SUN8I_I2S_TX_CHAN_SEL_REG(3), 0x00000000 }, -+ { SUN50I_H6_I2S_TX_CHAN_MAP0_REG(0), 0x00000000 }, -+ { SUN50I_H6_I2S_TX_CHAN_MAP1_REG(0), 0x00000000 }, + { SUN50I_H6_I2S_TX_CHAN_SEL_REG(0), 0x00000000 }, ++ { SUN50I_H6_I2S_TX_CHAN_SEL_REG(1), 0x00000000 }, ++ { SUN50I_H6_I2S_TX_CHAN_SEL_REG(2), 0x00000000 }, ++ { SUN50I_H6_I2S_TX_CHAN_SEL_REG(3), 0x00000000 }, + { SUN50I_H6_I2S_TX_CHAN_MAP0_REG(0), 0x00000000 }, + { SUN50I_H6_I2S_TX_CHAN_MAP1_REG(0), 0x00000000 }, + { SUN50I_H6_I2S_TX_CHAN_MAP0_REG(1), 0x00000000 }, + { SUN50I_H6_I2S_TX_CHAN_MAP1_REG(1), 0x00000000 }, + { SUN50I_H6_I2S_TX_CHAN_MAP0_REG(2), 0x00000000 }, @@ -258,7 +259,7 @@ Signed-off-by: Jernej Skrabec { SUN50I_H6_I2S_RX_CHAN_SEL_REG, 0x00000000 }, { SUN50I_H6_I2S_RX_CHAN_MAP0_REG, 0x00000000 }, { SUN50I_H6_I2S_RX_CHAN_MAP1_REG, 0x00000000 }, -@@ -1285,7 +1341,7 @@ static int sun4i_i2s_runtime_resume(stru +@@ -1301,7 +1357,7 @@ static int sun4i_i2s_runtime_resume(stru /* Enable the first output line */ regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG, SUN4I_I2S_CTRL_SDO_EN_MASK, @@ -267,7 +268,7 @@ Signed-off-by: Jernej Skrabec ret = clk_prepare_enable(i2s->mod_clk); if (ret) { -@@ -1526,6 +1582,7 @@ static int sun4i_i2s_probe(struct platfo +@@ -1562,6 +1618,7 @@ static int sun4i_i2s_probe(struct platfo i2s->capture_dma_data.addr = res->start + SUN4I_I2S_FIFO_RX_REG; i2s->capture_dma_data.maxburst = 8;