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https://github.com/LibreELEC/LibreELEC.tv.git
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Merge pull request #5626 from jernejsk/aw-hdmi-fix
Allwinner: linux: Fix HDMI driver
This commit is contained in:
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commit
2d87cff8b0
@ -140,7 +140,7 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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.is_custom_phy = true,
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.phy_init = &sun8i_hdmi_phy_init_h3,
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@@ -725,10 +766,36 @@ static int sun8i_hdmi_phy_probe(struct p
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clk_prepare_enable(phy->clk_phy);
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goto err_put_clk_pll1;
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}
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+ if (phy->variant->bit_bang_cec) {
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@ -173,9 +173,9 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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+ cec_delete_adapter(phy->cec_adapter);
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+err_disable_clk_phy:
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+ clk_disable_unprepare(phy->clk_phy);
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err_disable_clk_mod:
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clk_disable_unprepare(phy->clk_mod);
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err_disable_clk_bus:
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err_put_clk_pll1:
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clk_put(phy->clk_pll1);
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err_put_clk_pll0:
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@@ -753,6 +820,9 @@ static int sun8i_hdmi_phy_remove(struct
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{
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struct sun8i_hdmi_phy *phy = platform_get_drvdata(pdev);
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@ -183,6 +183,6 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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+ cec_notifier_cec_adap_unregister(phy->cec_notifier, phy->cec_adapter);
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+ cec_unregister_adapter(phy->cec_adapter);
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+
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clk_disable_unprepare(phy->clk_mod);
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clk_disable_unprepare(phy->clk_bus);
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clk_disable_unprepare(phy->clk_phy);
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reset_control_put(phy->rst_phy);
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clk_put(phy->clk_pll0);
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@ -0,0 +1,210 @@
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From 887d1018e2c5ab5e81edbd1318bbf4bbd2c739b0 Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@gmail.com>
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Date: Sun, 12 Sep 2021 20:15:26 +0200
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Subject: [PATCH] drm/sun4i: dw-hdmi: Fix HDMI PHY clock setup
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Recent rework which made HDMI PHY driver a platform device inadvertely
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reversed clock setup order. HW is very touch about it. Proper way is to
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handle controllers resets and clocks first and HDMI PHYs second.
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Move HDMI PHY reset & clocks handling to sun8i_hdmi_phy_init() which
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will assure that code is executed after controllers reset & clocks are
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handled. Additionally, add sun8i_hdmi_phy_deinit() which will deinit it
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at controllers driver unload.
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Fixes: 9bf3797796f5 ("drm/sun4i: dw-hdmi: Make HDMI PHY into a platform device")
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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---
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drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 7 +-
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drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 4 +-
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drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 97 ++++++++++++++------------
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3 files changed, 61 insertions(+), 47 deletions(-)
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diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
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index f75fb157f2ff..5fa5407ac583 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
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@@ -216,11 +216,13 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
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goto err_disable_clk_tmds;
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}
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+ ret = sun8i_hdmi_phy_init(hdmi->phy);
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+ if (ret)
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+ return ret;
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+
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drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
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drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
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- sun8i_hdmi_phy_init(hdmi->phy);
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-
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plat_data->mode_valid = hdmi->quirks->mode_valid;
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plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe;
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sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
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@@ -262,6 +264,7 @@ static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master,
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struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
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dw_hdmi_unbind(hdmi->hdmi);
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+ sun8i_hdmi_phy_deinit(hdmi->phy);
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clk_disable_unprepare(hdmi->clk_tmds);
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reset_control_assert(hdmi->rst_ctrl);
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gpiod_set_value(hdmi->ddc_en, 0);
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diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
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index 74f6ed0e2570..bffe1b9cd3dc 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
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+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
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@@ -169,6 +169,7 @@ struct sun8i_hdmi_phy {
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struct clk *clk_phy;
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struct clk *clk_pll0;
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struct clk *clk_pll1;
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+ struct device *dev;
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unsigned int rcal;
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struct regmap *regs;
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struct reset_control *rst_phy;
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@@ -205,7 +206,8 @@ encoder_to_sun8i_dw_hdmi(struct drm_encoder *encoder)
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int sun8i_hdmi_phy_get(struct sun8i_dw_hdmi *hdmi, struct device_node *node);
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-void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy);
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+int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy);
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+void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy);
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void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
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struct dw_hdmi_plat_data *plat_data);
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diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
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index c9239708d398..78b152973957 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
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@@ -506,9 +506,60 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
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phy->rcal = (val & SUN8I_HDMI_PHY_ANA_STS_RCAL_MASK) >> 2;
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}
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-void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
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+int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
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{
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+ int ret;
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+
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+ ret = reset_control_deassert(phy->rst_phy);
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+ if (ret) {
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+ dev_err(phy->dev, "Cannot deassert phy reset control: %d\n", ret);
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+ return ret;
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+ }
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+
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+ ret = clk_prepare_enable(phy->clk_bus);
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+ if (ret) {
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+ dev_err(phy->dev, "Cannot enable bus clock: %d\n", ret);
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+ goto err_deassert_rst_phy;
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+ }
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+
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+ ret = clk_prepare_enable(phy->clk_mod);
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+ if (ret) {
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+ dev_err(phy->dev, "Cannot enable mod clock: %d\n", ret);
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+ goto err_disable_clk_bus;
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+ }
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+
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+ if (phy->variant->has_phy_clk) {
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+ ret = sun8i_phy_clk_create(phy, phy->dev,
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+ phy->variant->has_second_pll);
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+ if (ret) {
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+ dev_err(phy->dev, "Couldn't create the PHY clock\n");
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+ goto err_disable_clk_mod;
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+ }
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+
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+ clk_prepare_enable(phy->clk_phy);
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+ }
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+
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phy->variant->phy_init(phy);
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+
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+ return 0;
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+
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+err_disable_clk_mod:
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+ clk_disable_unprepare(phy->clk_mod);
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+err_disable_clk_bus:
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+ clk_disable_unprepare(phy->clk_bus);
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+err_deassert_rst_phy:
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+ reset_control_assert(phy->rst_phy);
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+
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+ return ret;
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+}
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+
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+void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy)
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+{
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+ clk_disable_unprepare(phy->clk_mod);
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+ clk_disable_unprepare(phy->clk_bus);
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+ clk_disable_unprepare(phy->clk_phy);
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+
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+ reset_control_assert(phy->rst_phy);
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}
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void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
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@@ -638,6 +689,7 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev)
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return -ENOMEM;
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phy->variant = (struct sun8i_hdmi_phy_variant *)match->data;
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+ phy->dev = dev;
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ret = of_address_to_resource(node, 0, &res);
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if (ret) {
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@@ -696,47 +748,10 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev)
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goto err_put_clk_pll1;
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}
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- ret = reset_control_deassert(phy->rst_phy);
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- if (ret) {
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- dev_err(dev, "Cannot deassert phy reset control: %d\n", ret);
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- goto err_put_rst_phy;
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- }
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-
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- ret = clk_prepare_enable(phy->clk_bus);
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- if (ret) {
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- dev_err(dev, "Cannot enable bus clock: %d\n", ret);
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- goto err_deassert_rst_phy;
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- }
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-
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- ret = clk_prepare_enable(phy->clk_mod);
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- if (ret) {
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- dev_err(dev, "Cannot enable mod clock: %d\n", ret);
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- goto err_disable_clk_bus;
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- }
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-
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- if (phy->variant->has_phy_clk) {
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- ret = sun8i_phy_clk_create(phy, dev,
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- phy->variant->has_second_pll);
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- if (ret) {
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- dev_err(dev, "Couldn't create the PHY clock\n");
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- goto err_disable_clk_mod;
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- }
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-
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- clk_prepare_enable(phy->clk_phy);
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- }
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-
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platform_set_drvdata(pdev, phy);
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return 0;
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-err_disable_clk_mod:
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- clk_disable_unprepare(phy->clk_mod);
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-err_disable_clk_bus:
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- clk_disable_unprepare(phy->clk_bus);
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-err_deassert_rst_phy:
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- reset_control_assert(phy->rst_phy);
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-err_put_rst_phy:
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- reset_control_put(phy->rst_phy);
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err_put_clk_pll1:
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clk_put(phy->clk_pll1);
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err_put_clk_pll0:
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@@ -753,12 +768,6 @@ static int sun8i_hdmi_phy_remove(struct platform_device *pdev)
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{
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struct sun8i_hdmi_phy *phy = platform_get_drvdata(pdev);
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- clk_disable_unprepare(phy->clk_mod);
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- clk_disable_unprepare(phy->clk_bus);
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- clk_disable_unprepare(phy->clk_phy);
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-
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- reset_control_assert(phy->rst_phy);
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-
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reset_control_put(phy->rst_phy);
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clk_put(phy->clk_pll0);
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--
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2.33.0
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