Merge pull request #5719 from heitbaum/uboot

u-boot: Update to 2021.10

packages/tools/u-boot-tools/package.mk

@@ -2,8 +2,8 @@
 # Copyright (C) 2019-present Team LibreELEC (https://libreelec.tv)
 
 PKG_NAME="u-boot-tools"
-PKG_VERSION="2021.07"
+PKG_VERSION="2021.10"
-PKG_SHA256="312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e"
+PKG_SHA256="cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4"
 PKG_LICENSE="GPL"
 PKG_SITE="https://www.denx.de/wiki/U-Boot"
 PKG_URL="http://ftp.denx.de/pub/u-boot/u-boot-${PKG_VERSION}.tar.bz2"

packages/tools/u-boot/package.mk

@@ -6,7 +6,7 @@ PKG_NAME="u-boot"
 PKG_ARCH="arm aarch64"
 PKG_LICENSE="GPL"
 PKG_SITE="https://www.denx.de/wiki/U-Boot"
-PKG_DEPENDS_TARGET="toolchain Python3:host swig:host"
+PKG_DEPENDS_TARGET="toolchain openssl:host Python3:host swig:host"
 PKG_LONGDESC="Das U-Boot is a cross-platform bootloader for embedded systems."
 
 PKG_STAMP="${UBOOT_SYSTEM} ${UBOOT_TARGET}"
@@ -35,8 +35,8 @@ case "${PROJECT}" in
     PKG_PATCH_DIRS="rockchip"
     ;;
   *)
-    PKG_VERSION="2021.07"
+    PKG_VERSION="2021.10"
-    PKG_SHA256="312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e"
+    PKG_SHA256="cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4"
     PKG_URL="http://ftp.denx.de/pub/u-boot/${PKG_NAME}-${PKG_VERSION}.tar.bz2"
     ;;
 esac
@@ -51,6 +51,9 @@ post_patch() {
 }
 
 make_target() {
+  # U-Boot needs host openssl for tools - make sure it finds right one
+  # setup_pkg_config_host is required
+  setup_pkg_config_host
   if [ -z "${UBOOT_SYSTEM}" ]; then
     echo "UBOOT_SYSTEM must be set to build an image"
     echo "see './scripts/uboot_helper' for more information"

projects/Allwinner/patches/u-boot/0001-OrangePi-PC2-Update-defaults.patch

@@ -1,26 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jernej Skrabec <jernej.skrabec@siol.net>
-Date: Sun, 8 Mar 2020 08:08:03 +0100
-Subject: [PATCH] OrangePi PC2: Update defaults
-
----
- configs/orangepi_pc2_defconfig | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/configs/orangepi_pc2_defconfig
-+++ b/configs/orangepi_pc2_defconfig
-@@ -5,11 +5,13 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H5=y
- CONFIG_DRAM_CLK=672
- CONFIG_DRAM_ZQ=3881977
--# CONFIG_DRAM_ODT_EN is not set
- CONFIG_MACPWR="PD6"
- CONFIG_SPL_SPI_SUNXI=y
-+CONFIG_SPL_I2C_SUPPORT=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_SUN8I_EMAC=y
-+CONFIG_SY8106A_POWER=y
-+CONFIG_SY8106A_VOUT1_VOLT=1100
- CONFIG_USB_EHCI_HCD=y
- CONFIG_USB_OHCI_HCD=y
- CONFIG_USB_MUSB_GADGET=y

projects/Allwinner/patches/u-boot/0002-sunxi-A23-A33-H3-Move-sun8i-secure-monitor-to-SRAM-A.patch

@@ -1,63 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 18 Apr 2021 22:21:41 -0500
-Subject: [PATCH] sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2
-
-So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure
-monitor code (providing PSCI runtime services). And while those SoCs do
-not have the secure SRAM B like older SoCs, there is enough (secure)
-SRAM A2 to put the monitor code and data in there instead.
-
-Follow the design of 64-bit SoCs and use the first part for the monitor,
-and the last 16 KiB for the SCP firmware. With this change, the monitor
-no longer needs to reserve a region in DRAM.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
-Reviewed-by: Andre Przywara <andre.przywara@arm.com>
-[Andre: amend commit message, fix R40 and V3s build]
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
----
- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++++++++++
- include/configs/sun8i.h                     | 10 ++++++++++
- 2 files changed, 21 insertions(+)
-
---- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
-+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
-@@ -11,7 +11,18 @@
- #define SUNXI_SRAM_A1_BASE		0x00000000
- #define SUNXI_SRAM_A1_SIZE		(16 * 1024)	/* 16 kiB */
- 
-+#if defined(CONFIG_SUNXI_GEN_SUN6I) && \
-+    !defined(CONFIG_MACH_SUN8I_R40) && \
-+    !defined(CONFIG_MACH_SUN8I_V3S)
-+#define SUNXI_SRAM_A2_BASE		0x00040000
-+#ifdef CONFIG_MACH_SUN8I_H3
-+#define SUNXI_SRAM_A2_SIZE		(48 * 1024)	/* 16+32 kiB */
-+#else
-+#define SUNXI_SRAM_A2_SIZE		(80 * 1024)	/* 16+64 kiB */
-+#endif
-+#else
- #define SUNXI_SRAM_A2_BASE		0x00004000	/* 16 kiB */
-+#endif
- #define SUNXI_SRAM_A3_BASE		0x00008000	/* 13 kiB */
- #define SUNXI_SRAM_A4_BASE		0x0000b400	/* 3 kiB */
- #define SUNXI_SRAM_D_BASE		0x00010000	/* 4 kiB */
---- a/include/configs/sun8i.h
-+++ b/include/configs/sun8i.h
-@@ -12,6 +12,16 @@
-  * A23 specific configuration
-  */
- 
-+#ifdef SUNXI_SRAM_A2_SIZE
-+/*
-+ * If the SoC has enough SRAM A2, use that for the secure monitor.
-+ * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
-+ * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
-+ */
-+#define CONFIG_ARMV7_SECURE_BASE	(SUNXI_SRAM_A2_BASE + 16 * 1024)
-+#define CONFIG_ARMV7_SECURE_MAX_SIZE	(SUNXI_SRAM_A2_SIZE - 33 * 1024)
-+#endif
-+
- /*
-  * Include common sunxi configuration where most the settings are
-  */