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https://github.com/LibreELEC/LibreELEC.tv.git
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RPi5: sync mesa patches with RPiOS 23.2.1-0+rpt2 version
Signed-off-by: Matthias Reichl <hias@horus.com>
This commit is contained in:
Matthias Reichl
parent
1ee2d6f8f9
commit
37bacb2760
@ -1,7 +1,7 @@
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From f62aa2640f92796ff5216da0a5d3c8f46a2855b4 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Mon, 26 Apr 2021 00:02:21 +0200
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Subject: [PATCH 001/139] broadcom(cle,clif,common,simulator): add 7.1 version
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Subject: [PATCH 001/142] broadcom(cle,clif,common,simulator): add 7.1 version
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on the list of versions to build
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This adds 7.1 to the list of available V3D_VERSION, and first changes
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@ -1,7 +1,7 @@
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From 9e85edd1b347b0e779b393f463f42044a720bcff Mon Sep 17 00:00:00 2001
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From: Iago Toral Quiroga <itoral@igalia.com>
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Date: Tue, 28 Sep 2021 13:16:49 +0200
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Subject: [PATCH 002/139] broadcom/simulator: reset CFG7 for compute dispatch
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Subject: [PATCH 002/142] broadcom/simulator: reset CFG7 for compute dispatch
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in v71
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This register is new in 7.x, it doesn't seem that we need to
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@ -1,7 +1,7 @@
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From 6f744bc4bec98f9769486d427e8e2d4e314ae056 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Tue, 29 Jun 2021 12:03:24 +0200
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Subject: [PATCH 003/139] broadcom/cle: update the packet definitions for new
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Subject: [PATCH 003/142] broadcom/cle: update the packet definitions for new
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generation v71
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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@ -1,7 +1,7 @@
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From 569cbe4229df737ce5915c4be2cad534707fb4f7 Mon Sep 17 00:00:00 2001
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From: Iago Toral Quiroga <itoral@igalia.com>
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Date: Tue, 9 Nov 2021 08:50:51 +0100
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Subject: [PATCH 004/139] broadcom/common: retrieve V3D revision number
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Subject: [PATCH 004/142] broadcom/common: retrieve V3D revision number
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The subrev field from the hub ident3 register is bumped with every
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hardware revision doing backwards incompatible changes so we want to
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@ -1,7 +1,7 @@
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From c260843c882d25bd31e308566b45d4517fda0fa2 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Wed, 17 Nov 2021 14:40:47 +0100
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Subject: [PATCH 005/139] broadcom/common: add some common v71 helpers
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Subject: [PATCH 005/142] broadcom/common: add some common v71 helpers
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---
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src/broadcom/common/v3d_util.c | 27 +++++++++++++++++++++++++++
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@ -1,7 +1,7 @@
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From a5211a4d71acc53183d2a90eb1694d8cce6eb44f Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 5 Aug 2021 01:03:11 +0200
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Subject: [PATCH 006/139] broadcom/qpu: add comments on waddr not used on V3D
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Subject: [PATCH 006/142] broadcom/qpu: add comments on waddr not used on V3D
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7.x
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---
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@ -1,7 +1,7 @@
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From 0ccf3043e4a584e5592bb7fad737d5d98ed23db0 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 5 Aug 2021 01:00:47 +0200
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Subject: [PATCH 007/139] broadcom/qpu: set V3D 7.x names for some waddr
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Subject: [PATCH 007/142] broadcom/qpu: set V3D 7.x names for some waddr
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aliasing
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V3D 7.x got rid of the accumulator, but still uses the values for
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@ -1,7 +1,7 @@
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From 18de3cc85cf8bbe294e044f7a12abe14e554de0a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Sun, 19 Sep 2021 03:20:18 +0200
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Subject: [PATCH 008/139] broadcom/compiler: rename small_imm to small_imm_b
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Subject: [PATCH 008/142] broadcom/compiler: rename small_imm to small_imm_b
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Current small_imm is associated with the "B" read address.
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@ -1,7 +1,7 @@
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From 0e87405fe73694c173b7ce14c3d60611f241922c Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 5 Aug 2021 00:50:12 +0200
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Subject: [PATCH 009/139] broadcom/compiler: add small_imm a/c/d on v3d_qpu_sig
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Subject: [PATCH 009/142] broadcom/compiler: add small_imm a/c/d on v3d_qpu_sig
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small_imm_a, small_imm_c and small_imm_d added on top of the already
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existing small_imm_b, as V3D 7.1 defines 4 small immediates, tied to
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@ -1,7 +1,7 @@
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From eca19c911d9af3b0ab3b563ea65dc455e3d27987 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Wed, 4 Aug 2021 01:11:16 +0200
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Subject: [PATCH 010/139] broadcom/qpu: add v71 signal map
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Subject: [PATCH 010/142] broadcom/qpu: add v71 signal map
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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@ -1,7 +1,7 @@
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From d10e67a396d713ec81fb133f3516e09fe1e067b6 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Fri, 6 Aug 2021 01:22:31 +0200
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Subject: [PATCH 011/139] broadcom/qpu: define v3d_qpu_input, use on
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Subject: [PATCH 011/142] broadcom/qpu: define v3d_qpu_input, use on
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v3d_qpu_alu_instr
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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@ -1,7 +1,7 @@
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From 52ea09792ff8a438ccdecac47b8415657be90098 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Fri, 6 Aug 2021 01:33:32 +0200
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Subject: [PATCH 012/139] broadcom/qpu: add raddr on v3d_qpu_input
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Subject: [PATCH 012/142] broadcom/qpu: add raddr on v3d_qpu_input
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On V3D 7.x mux are not used, and raddr_a/b/c/d are used instead
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@ -1,7 +1,7 @@
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From 3e5ad0881c2789619cdf65f40a44d5481e28e800 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 12 Aug 2021 02:24:02 +0200
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Subject: [PATCH 013/139] broadcom/qpu: defining shift/mask for raddr_c/d
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Subject: [PATCH 013/142] broadcom/qpu: defining shift/mask for raddr_c/d
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On V3D 7.x it replaces mul_a/b and add_a/b
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---
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@ -1,7 +1,7 @@
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From 81febf14fe05ad26e992275b911e8bc1e1416ebc Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Fri, 17 Sep 2021 01:04:31 +0200
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Subject: [PATCH 014/139] broadcom/commmon: add has_accumulators field on
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Subject: [PATCH 014/142] broadcom/commmon: add has_accumulators field on
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v3d_device_info
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Even if we can just check for the version on the code, checking for
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@ -1,7 +1,7 @@
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From 7d42eca87b6e144697810405308d99d200dca62a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Wed, 15 Sep 2021 10:56:43 +0200
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Subject: [PATCH 015/139] broadcom/qpu: add qpu_writes_rf0_implicitly helper
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Subject: [PATCH 015/142] broadcom/qpu: add qpu_writes_rf0_implicitly helper
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On v71 rf0 replaces r5 as the register that gets updated implicitly
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with uniform loads, and gets the C coefficient with ldvary. This
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@ -1,7 +1,7 @@
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From f0859613bd59e14fb21571e7978bb5c5d5e9c6d7 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Sat, 7 Aug 2021 02:20:39 +0200
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Subject: [PATCH 016/139] broadcom/qpu: add pack/unpack support for v71
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Subject: [PATCH 016/142] broadcom/qpu: add pack/unpack support for v71
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Note that we provide new v71 alu pack/unpack methods. As there are a
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lot that it is equivalent, initially we tried to use existing methods
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@ -1,7 +1,7 @@
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From ebba9019461083687f6afd23ff0d4646c1a667cb Mon Sep 17 00:00:00 2001
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From: Iago Toral Quiroga <itoral@igalia.com>
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Date: Sun, 29 Jan 2023 00:27:11 +0100
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Subject: [PATCH 017/139] broadcom/compiler: update node/temp translation for
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Subject: [PATCH 017/142] broadcom/compiler: update node/temp translation for
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v71
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As the offset applied needs to take into account if we have
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@ -1,7 +1,7 @@
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From 9b2dfe0286212aba3687a06023cc5b4ce9944ee0 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Mon, 23 Aug 2021 02:18:43 +0200
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Subject: [PATCH 018/139] broadcom/compiler: phys index depends on hw version
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Subject: [PATCH 018/142] broadcom/compiler: phys index depends on hw version
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For 7.1 there are not accumulators. So we replace the macro with a
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function call.
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@ -1,7 +1,7 @@
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From da0a3deadf86a46c8323267d3f6a49e442835608 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Fri, 17 Sep 2021 01:07:06 +0200
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Subject: [PATCH 019/139] broadcom/compiler: don't favor/select accum registers
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Subject: [PATCH 019/142] broadcom/compiler: don't favor/select accum registers
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for hw not supporting it
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Note that what we do is to just return false on the favor/select accum
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@ -1,7 +1,7 @@
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From 6c04d7c917da6b38f8b2b4306ab03ed2ab7e6ce0 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 9 Sep 2021 00:28:53 +0200
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Subject: [PATCH 020/139] broadcom/vir: implement is_no_op_mov for v71
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Subject: [PATCH 020/142] broadcom/vir: implement is_no_op_mov for v71
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Did some refactoring/splitting.
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---
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@ -1,7 +1,7 @@
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From 7b5be2d9b178a45c34c22db2744639a6a8a216d1 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 9 Sep 2021 01:18:54 +0200
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Subject: [PATCH 021/139] broadcom/compiler: update vir_to_qpu::set_src for v71
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Subject: [PATCH 021/142] broadcom/compiler: update vir_to_qpu::set_src for v71
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---
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src/broadcom/compiler/vir_to_qpu.c | 47 ++++++++++++++++++++++++++----
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@ -1,7 +1,7 @@
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From fe89703008f2a3d6bfe6e260791f712013be5e48 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Thu, 9 Sep 2021 23:59:28 +0200
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Subject: [PATCH 022/139] broadcom/qpu_schedule: add process_raddr_deps
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Subject: [PATCH 022/142] broadcom/qpu_schedule: add process_raddr_deps
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On v71 we don't have muxes, but more raddr. Adding a equivalent add
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deps function.
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@ -1,7 +1,7 @@
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From 20ce426df1ab2546332141f4bc4531ada754cdea Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Fri, 10 Sep 2021 01:20:44 +0200
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Subject: [PATCH 023/139] broadcom/qpu: update disasm_raddr for v71
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Subject: [PATCH 023/142] broadcom/qpu: update disasm_raddr for v71
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---
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src/broadcom/qpu/qpu_disasm.c | 72 ++++++++++++++++++++++++++++++++---
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@ -1,7 +1,7 @@
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From 7263fa24a3c57b1dcd4d870670cda86ae89aa28c Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Wed, 15 Sep 2021 10:55:49 +0200
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Subject: [PATCH 024/139] broadcom/qpu: return false on
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Subject: [PATCH 024/142] broadcom/qpu: return false on
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qpu_writes_accumulatorXX helpers for v71
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As for v71 doesn't have accumulators (devinfo->has_accumulators set to
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@ -1,7 +1,7 @@
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From 6a9611c5a22218388bba419174d3343e0cdf773b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Tue, 14 Sep 2021 10:42:55 +0200
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Subject: [PATCH 025/139] broadcom/compiler: add support for varyings on nir to
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Subject: [PATCH 025/142] broadcom/compiler: add support for varyings on nir to
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vir generation for v71
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Needs update as v71 doesn't have accumulators anymore, and ldvary uses
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@ -1,7 +1,7 @@
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From 06af15a60f7a9c135893e5f8934b8030c1da95f9 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Wed, 15 Sep 2021 01:14:15 +0200
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Subject: [PATCH 026/139] broadcom/compiler: payload_w is loaded on rf3 for v71
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Subject: [PATCH 026/142] broadcom/compiler: payload_w is loaded on rf3 for v71
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And in general rf0 is now used for other needs.
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---
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@ -1,7 +1,7 @@
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From d38d8056903b9a4f96ab56261ac3b3c3be0af4fb Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
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Date: Wed, 15 Sep 2021 11:12:59 +0200
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Subject: [PATCH 027/139] broadcom/qpu_schedule: update write deps for v71
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Subject: [PATCH 027/142] broadcom/qpu_schedule: update write deps for v71
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We just need to add a write dep if rf0 is written implicitly.
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@ -1,7 +1,7 @@
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From 7e2a2be830b1672ab846389a46b5d09bad0f7a98 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
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Date: Thu, 16 Sep 2021 00:49:25 +0200
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Subject: [PATCH 028/139] broadcom/compiler: update register classes to not
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Subject: [PATCH 028/142] broadcom/compiler: update register classes to not
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include accumulators on v71
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---
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@ -1,7 +1,7 @@
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From 0157228c729b8812dc4900fa24db63b7d27aa342 Mon Sep 17 00:00:00 2001
|
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From: Iago Toral Quiroga <itoral@igalia.com>
|
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Date: Thu, 23 Sep 2021 11:19:58 +0200
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Subject: [PATCH 029/139] broadcom/compiler: implement "reads/writes too soon"
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Subject: [PATCH 029/142] broadcom/compiler: implement "reads/writes too soon"
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checks for v71
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---
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@ -1,7 +1,7 @@
|
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From 3fb3333bdf9699157cf0a2bd46ba4c25058bc5c1 Mon Sep 17 00:00:00 2001
|
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From: Iago Toral Quiroga <itoral@igalia.com>
|
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Date: Thu, 23 Sep 2021 11:44:59 +0200
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Subject: [PATCH 030/139] broadcom/compiler: implement read stall check for v71
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Subject: [PATCH 030/142] broadcom/compiler: implement read stall check for v71
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---
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src/broadcom/compiler/qpu_schedule.c | 32 +++++++++++++++++-----------
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@ -1,7 +1,7 @@
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From cbe0a7a06a5fb9b3f28acba8c9cac362a6bc5324 Mon Sep 17 00:00:00 2001
|
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From: Iago Toral Quiroga <itoral@igalia.com>
|
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Date: Wed, 6 Oct 2021 13:58:00 +0200
|
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Subject: [PATCH 031/139] broadcom/compiler: add a
|
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Subject: [PATCH 031/142] broadcom/compiler: add a
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v3d71_qpu_writes_waddr_explicitly helper
|
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---
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@ -1,7 +1,7 @@
|
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From 92e91a9b22ae61dc9f39880e8fdaa7714789efdb Mon Sep 17 00:00:00 2001
|
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From: Iago Toral Quiroga <itoral@igalia.com>
|
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Date: Mon, 27 Sep 2021 11:49:24 +0200
|
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Subject: [PATCH 032/139] broadcom/compiler: prevent rf2-3 usage in thread end
|
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Subject: [PATCH 032/142] broadcom/compiler: prevent rf2-3 usage in thread end
|
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delay slots for v71
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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@ -1,7 +1,7 @@
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From 68a1545eb973e41608534ff05a9e84a86c046453 Mon Sep 17 00:00:00 2001
|
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From: Iago Toral Quiroga <itoral@igalia.com>
|
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Date: Mon, 27 Sep 2021 13:26:04 +0200
|
||||
Subject: [PATCH 033/139] broadcom/qpu: add new ADD opcodes for FMOV/MOV in v71
|
||||
Subject: [PATCH 033/142] broadcom/qpu: add new ADD opcodes for FMOV/MOV in v71
|
||||
|
||||
---
|
||||
src/broadcom/qpu/qpu_instr.c | 5 +++++
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 8dbbb7e22b694fdc62376d112b3dc6105d556c63 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 4 Oct 2021 13:07:35 +0200
|
||||
Subject: [PATCH 034/139] broadcom/qpu: fix packing/unpacking of fmov variants
|
||||
Subject: [PATCH 034/142] broadcom/qpu: fix packing/unpacking of fmov variants
|
||||
for v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 63d0059ebef288afb0e2e746dadda8c2238bdfcb Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 28 Sep 2021 01:17:08 +0200
|
||||
Subject: [PATCH 035/139] broadcom/qpu: implement switch rules for fmin/fmax
|
||||
Subject: [PATCH 035/142] broadcom/qpu: implement switch rules for fmin/fmax
|
||||
fadd/faddnf for v71
|
||||
|
||||
They use the same opcodes, and switch between one and the other based
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From c9f6faa3ddc91024b3d9dc67ce2221187daac128 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 29 Sep 2021 11:54:18 +0200
|
||||
Subject: [PATCH 036/139] broadcom/compiler: make vir_write_rX return false on
|
||||
Subject: [PATCH 036/142] broadcom/compiler: make vir_write_rX return false on
|
||||
platforms without accums
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 3d16229743e26b58735ed049ee982073f6034342 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 29 Sep 2021 12:03:50 +0200
|
||||
Subject: [PATCH 037/139] broadcom/compiler: rename vir_writes_rX to
|
||||
Subject: [PATCH 037/142] broadcom/compiler: rename vir_writes_rX to
|
||||
vir_writes_rX_implicitly
|
||||
|
||||
Since that represents more accurately what they check..
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 83fae160491737e8568b8fb5eaa5be4d2c8bf3c8 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 29 Sep 2021 12:10:31 +0200
|
||||
Subject: [PATCH 038/139] broadcom/compiler: only handle accumulator classes if
|
||||
Subject: [PATCH 038/142] broadcom/compiler: only handle accumulator classes if
|
||||
present
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From fd77cc3204e7c69927f97ce2a1d55d2a47d77a27 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 29 Sep 2021 12:14:04 +0200
|
||||
Subject: [PATCH 039/139] broadcom/compiler: don't assign rf0 to temps across
|
||||
Subject: [PATCH 039/142] broadcom/compiler: don't assign rf0 to temps across
|
||||
implicit rf0 writes
|
||||
|
||||
In platforms that don't have accumulators and have implicit writes to
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 9a08ae9f354a6da6d9d71b87800aca8b3df49e29 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 28 Sep 2021 13:37:28 +0200
|
||||
Subject: [PATCH 040/139] broadcom/compiler: CS payload registers have changed
|
||||
Subject: [PATCH 040/142] broadcom/compiler: CS payload registers have changed
|
||||
in v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 5477884196cb54a71f54fa6cad42c6d3326bde88 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Fri, 22 Oct 2021 13:39:48 +0200
|
||||
Subject: [PATCH 041/139] broadcom/compiler: don't schedule rf0 writes right
|
||||
Subject: [PATCH 041/142] broadcom/compiler: don't schedule rf0 writes right
|
||||
after ldvary
|
||||
|
||||
ldvary writes rf0 implicitly on the next cycle so they would clash.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 31623712c2f741d393767641f32d56c35150eda5 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 30 Sep 2021 13:22:48 +0200
|
||||
Subject: [PATCH 042/139] broadcom/compiler: allow instruction merges in v71
|
||||
Subject: [PATCH 042/142] broadcom/compiler: allow instruction merges in v71
|
||||
|
||||
In v3d 4.x there were restrictions based on the number of raddrs used
|
||||
by the combined instructions, but we don't have these restrictions in
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 959a0128654c94d84fda53ffc108971d3b3a817a Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 6 Oct 2021 09:27:43 +0200
|
||||
Subject: [PATCH 043/139] broadcom/qpu: add MOV integer packing/unpacking
|
||||
Subject: [PATCH 043/142] broadcom/qpu: add MOV integer packing/unpacking
|
||||
variants
|
||||
|
||||
These are new in v71 and cover MOV on both the ADD and the MUL alus.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 2e86dd0c357d7b432ce6794ae22fbfae89ad186b Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 6 Oct 2021 12:01:10 +0200
|
||||
Subject: [PATCH 044/139] broadcom/qpu: fail packing on unhandled mul
|
||||
Subject: [PATCH 044/142] broadcom/qpu: fail packing on unhandled mul
|
||||
pack/unpack
|
||||
|
||||
We are doing this for the ADD alu already and it may be helpful to
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From ed6bfa29d43b5a89ff070961454f1e82e23b4f45 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Fri, 8 Oct 2021 15:10:24 +0200
|
||||
Subject: [PATCH 045/139] broadcom/compiler: generalize check for shaders using
|
||||
Subject: [PATCH 045/142] broadcom/compiler: generalize check for shaders using
|
||||
pixel center W
|
||||
|
||||
V3D 4.x has pixel center W in rf0 and V3D 7.x has it in rf3. We already
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From e1a0fa2c2010ef29b8cec798cd0fc99cf44f3a2d Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 14 Oct 2021 14:16:40 +0200
|
||||
Subject: [PATCH 046/139] broadcom/compiler: v71 isn't affected by
|
||||
Subject: [PATCH 046/142] broadcom/compiler: v71 isn't affected by
|
||||
double-rounding of viewport X,Y coords
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 697e6cf01b781b244404872f331a778b6d4e67da Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 19 Oct 2021 11:16:43 +0200
|
||||
Subject: [PATCH 047/139] broadcom/compiler: update one TMUWT restriction for
|
||||
Subject: [PATCH 047/142] broadcom/compiler: update one TMUWT restriction for
|
||||
v71
|
||||
|
||||
TMUWT not allowed in the final instruction restriction doesn't apply
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 26fea727a9f34b75a3fe3f6a806accaddcc317f6 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 19 Oct 2021 11:51:32 +0200
|
||||
Subject: [PATCH 048/139] broadcom/compiler: update ldunif/ldvary comment for
|
||||
Subject: [PATCH 048/142] broadcom/compiler: update ldunif/ldvary comment for
|
||||
v71
|
||||
|
||||
For v42 and below ldunif/ldvary write both on r5, but with a different
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 70456e27b039174f767010f96d9b649e5e42d84f Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 19 Oct 2021 23:52:30 +0200
|
||||
Subject: [PATCH 049/139] broadcom/compiler: update payload registers handling
|
||||
Subject: [PATCH 049/142] broadcom/compiler: update payload registers handling
|
||||
when computing live intervals
|
||||
|
||||
As for v71 the payload registers are not the same. Specifically now
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From f9a76b3a1e316e5ed6387819b87eaaf60f989a2b Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 26 Oct 2021 11:43:02 +0200
|
||||
Subject: [PATCH 050/139] broadcom/compiler: update peripheral access
|
||||
Subject: [PATCH 050/142] broadcom/compiler: update peripheral access
|
||||
restrictions for v71
|
||||
|
||||
In V3D 4.x only a couple of simultaneous accesses where allowed, but
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 3520cceb87fb2f9765ba7dbe2771fbd0cadca78d Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 26 Oct 2021 08:37:54 +0200
|
||||
Subject: [PATCH 051/139] broadcom/qpu: add packing for fmov on ADD alu
|
||||
Subject: [PATCH 051/142] broadcom/qpu: add packing for fmov on ADD alu
|
||||
|
||||
---
|
||||
src/broadcom/qpu/qpu_pack.c | 31 +++++++++++++++++++++++++++++++
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 7c7ab15b3c9def4bc3bb5be492228a933c325f8a Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 6 Oct 2021 13:58:27 +0200
|
||||
Subject: [PATCH 052/139] broadcom/compiler: handle rf0 flops storage
|
||||
Subject: [PATCH 052/142] broadcom/compiler: handle rf0 flops storage
|
||||
restriction in v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 0c6910721eb50b38b3388c2d2344b6ecfe0fee58 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 27 Oct 2021 11:35:12 +0200
|
||||
Subject: [PATCH 053/139] broadcom/compiler: enable ldvary pipelining on v71
|
||||
Subject: [PATCH 053/142] broadcom/compiler: enable ldvary pipelining on v71
|
||||
|
||||
---
|
||||
src/broadcom/compiler/qpu_schedule.c | 121 ++++++++++++++++++---------
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 0670d642bb91fc68ce73f2d9fb88c482295a446d Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 28 Oct 2021 14:13:29 +0200
|
||||
Subject: [PATCH 054/139] broadcom/compiler: try to use ldunif(a) instead of
|
||||
Subject: [PATCH 054/142] broadcom/compiler: try to use ldunif(a) instead of
|
||||
ldunif(a)rf in v71
|
||||
|
||||
The rf variants need to encode the destination in the cond bits, which
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From cbed3b97394da09c9ae644c79e098e3ba8b5c3e8 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Fri, 29 Oct 2021 13:00:56 +0200
|
||||
Subject: [PATCH 055/139] broadcom/compiler: don't assign rf0 to temps that
|
||||
Subject: [PATCH 055/142] broadcom/compiler: don't assign rf0 to temps that
|
||||
conflict with ldvary
|
||||
|
||||
ldvary writes to rf0 implicitly, so we don't want to allocate rf0 to
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From cbaa469c09974c1574b16f559173694904fe1bb0 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 25 Oct 2021 09:38:57 +0200
|
||||
Subject: [PATCH 056/139] broadcom/compiler: convert mul to add when needed to
|
||||
Subject: [PATCH 056/142] broadcom/compiler: convert mul to add when needed to
|
||||
allow merge
|
||||
|
||||
V3D 7.x added 'mov' opcodes to the ADD alu, so now it is possible to
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From b59b3725fb16f4ab1ac0db86a5452a4ed6176074 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 3 Nov 2021 10:34:19 +0100
|
||||
Subject: [PATCH 057/139] broadcom/compiler: implement small immediates for v71
|
||||
Subject: [PATCH 057/142] broadcom/compiler: implement small immediates for v71
|
||||
|
||||
---
|
||||
src/broadcom/compiler/qpu_schedule.c | 90 +++++++++++++------
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 3af87d2672da7c928ecf8a0a1cd1bef8a6729364 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 22 Nov 2021 12:56:03 +0100
|
||||
Subject: [PATCH 058/139] broadcom/compiler: update thread end restrictions for
|
||||
Subject: [PATCH 058/142] broadcom/compiler: update thread end restrictions for
|
||||
v7.x
|
||||
|
||||
In 4.x it is not allowed to write to the register file in the last
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 7cfd5b808bb2f1cb17f57435cb5d411c4ac3aa6c Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 23 Nov 2021 10:04:49 +0100
|
||||
Subject: [PATCH 059/139] broadcom/compiler: update ldvary thread switch delay
|
||||
Subject: [PATCH 059/142] broadcom/compiler: update ldvary thread switch delay
|
||||
slot restriction for v7.x
|
||||
|
||||
In V3D 7.x we don't have accumulators which would not survive a thread
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From ca4063d627cd31c589a8e8688f2876dd8211d1bc Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 25 Nov 2021 08:31:02 +0100
|
||||
Subject: [PATCH 060/139] broadcom/compiler: lift restriction for branch +
|
||||
Subject: [PATCH 060/142] broadcom/compiler: lift restriction for branch +
|
||||
msfign after setmsf for v7.x
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 167510aa43bbcf06e57a64495cee40e8cdaf5f8b Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Fri, 26 Nov 2021 10:37:05 +0100
|
||||
Subject: [PATCH 061/139] broadcom/compiler: start allocating from RF 4 in V7.x
|
||||
Subject: [PATCH 061/142] broadcom/compiler: start allocating from RF 4 in V7.x
|
||||
|
||||
In V3D 4.x we start at RF3 so that we allocate RF0-2 only if there
|
||||
aren't any other RFs available. This is useful with small shaders
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From d47ea903b96e43b07bdef21f8026da818e30fcd1 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 25 Nov 2021 13:00:34 +0100
|
||||
Subject: [PATCH 062/139] broadcom/compiler: validate restrictions after TLB Z
|
||||
Subject: [PATCH 062/142] broadcom/compiler: validate restrictions after TLB Z
|
||||
write
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 6cdf01fad49489b5fc66d231b527de5245d5de32 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 29 Nov 2021 13:23:11 +0100
|
||||
Subject: [PATCH 063/139] broadcom/compiler: lift restriction on vpmwt in last
|
||||
Subject: [PATCH 063/142] broadcom/compiler: lift restriction on vpmwt in last
|
||||
instruction for V3D 7.x
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From acc54637f0787ba4dc887130c25c628ccdaf4e38 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 9 Nov 2021 11:34:59 +0100
|
||||
Subject: [PATCH 064/139] broadcom/compiler: fix up copy propagation for v71
|
||||
Subject: [PATCH 064/142] broadcom/compiler: fix up copy propagation for v71
|
||||
|
||||
Update rules for unsafe copy propagations to match v7.x.
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From c340f7f1eb4a1e5c0fafe1ea2f801f2ebaf82d8d Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Fri, 26 Nov 2021 01:24:12 +0100
|
||||
Subject: [PATCH 065/139] broadcom/qpu: new packing/conversion v71 instructions
|
||||
Subject: [PATCH 065/142] broadcom/qpu: new packing/conversion v71 instructions
|
||||
|
||||
This commits adds the qpu definitions for several new v71
|
||||
instructions.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 4f33de7771621e15aae3e3c60c09fd5a2f29bdac Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 30 Nov 2021 02:39:20 +0100
|
||||
Subject: [PATCH 066/139] nir: add new opcodes to map new v71
|
||||
Subject: [PATCH 066/142] nir: add new opcodes to map new v71
|
||||
packing/conversion instructions
|
||||
|
||||
Since v71, broadcom hw include specific packing/conversion
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 381c29e3ff5237c89380cc53eb2271d1985f4e34 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Thu, 2 Dec 2021 13:26:43 +0100
|
||||
Subject: [PATCH 067/139] broadcom/compiler: update image store lowering to use
|
||||
Subject: [PATCH 067/142] broadcom/compiler: update image store lowering to use
|
||||
v71 new packing/conversion instructions
|
||||
|
||||
Vulkan shaderdb stats with pattern dEQP-VK.image.*.with_format.*.*:
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From f6082e941a3454c8735df2ff2713ae49b3daa74f Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 18 Apr 2023 08:50:13 +0200
|
||||
Subject: [PATCH 068/139] broadcom/compiler: don't allocate spill base to rf0
|
||||
Subject: [PATCH 068/142] broadcom/compiler: don't allocate spill base to rf0
|
||||
in V3D 7.x
|
||||
|
||||
Otherwise it can be stomped by instructions doing implicit rf0 writes.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 0e9577fbb18a026390f653ca22f5a98a69a5fe59 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 2 May 2023 10:12:37 +0200
|
||||
Subject: [PATCH 069/139] broadcom/compiler: improve allocation for final
|
||||
Subject: [PATCH 069/142] broadcom/compiler: improve allocation for final
|
||||
program instructions
|
||||
|
||||
The last 3 instructions can't use specific registers so flag all the
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 645fe451bcecbe3345a144222306d06fb39f6b9f Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 2 May 2023 10:17:47 +0200
|
||||
Subject: [PATCH 070/139] broadcom/compiler: don't assign registers to unused
|
||||
Subject: [PATCH 070/142] broadcom/compiler: don't assign registers to unused
|
||||
nodes/temps
|
||||
|
||||
In programs with a lot of unused temps, if we don't do this, we may
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 851704169d59e28c5429b06d05e5ef952be893a2 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 15 May 2023 10:02:10 +0200
|
||||
Subject: [PATCH 071/139] broadcom/compiler: only assign rf0 as last resort in
|
||||
Subject: [PATCH 071/142] broadcom/compiler: only assign rf0 as last resort in
|
||||
V3D 7.x
|
||||
|
||||
So we can use it for ldunif(a) and avoid generating ldunif(a)rf which
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 0d3fd30d67ffc0195b0783e30ab6afbbe403310a Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Wed, 28 Apr 2021 14:31:38 +0200
|
||||
Subject: [PATCH 072/139] v3dv: recover non-conformant warning for not fully
|
||||
Subject: [PATCH 072/142] v3dv: recover non-conformant warning for not fully
|
||||
supported hw
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 52b5ac62b367ae89574c8031fdcf7c1dae05c942 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 29 Jun 2021 11:59:53 +0200
|
||||
Subject: [PATCH 073/139] v3dv/meson: add v71 hw generation
|
||||
Subject: [PATCH 073/142] v3dv/meson: add v71 hw generation
|
||||
|
||||
Starting point for v71 version inclusion.
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 7aa016bca8bb1bf449ea79505692353c0bd174b8 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 10 Nov 2021 10:06:50 +0100
|
||||
Subject: [PATCH 074/139] v3dv: expose V3D revision number in device name
|
||||
Subject: [PATCH 074/142] v3dv: expose V3D revision number in device name
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dv_device.c | 6 ++++--
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From fb9e95b7e1d5987fd25e914635c4e09d81ea9561 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 10 Nov 2021 07:54:35 +0100
|
||||
Subject: [PATCH 075/139] v3dv/device: handle new rpi5 device (bcm2712)
|
||||
Subject: [PATCH 075/142] v3dv/device: handle new rpi5 device (bcm2712)
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From c4f957af4fb0e10abf0a7ffad4f7a468633b7d99 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 20 Jul 2021 14:00:44 +0200
|
||||
Subject: [PATCH 076/139] v3dv/cmd_buffer: emit TILE_BINNING_MODE_CFG for v71
|
||||
Subject: [PATCH 076/142] v3dv/cmd_buffer: emit TILE_BINNING_MODE_CFG for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 9 ++++++++-
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 1934ac07df73cb685f6550b8b0f5b4f2ead11396 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 20 Jul 2021 14:33:00 +0200
|
||||
Subject: [PATCH 077/139] v3dv: emit TILE_RENDERING_MODE_CFG_COMMON for v71
|
||||
Subject: [PATCH 077/142] v3dv: emit TILE_RENDERING_MODE_CFG_COMMON for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 9 ++++++++-
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From f0f9eea3cad83ed8824c6a7686150327407a5286 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Thu, 22 Jul 2021 14:26:13 +0200
|
||||
Subject: [PATCH 078/139] v3dv/cmd_buffer: emit
|
||||
Subject: [PATCH 078/142] v3dv/cmd_buffer: emit
|
||||
TILE_RENDERING_MODE_CFG_RENDER_TARGET_PART1 for v71
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 7c89d8026fd550282d54933f37ffc2773869326f Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Mon, 26 Jul 2021 15:08:11 +0200
|
||||
Subject: [PATCH 079/139] v3dvx/cmd_buffer: emit CLEAR_RENDER_TARGETS for v71
|
||||
Subject: [PATCH 079/142] v3dvx/cmd_buffer: emit CLEAR_RENDER_TARGETS for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 2 +-
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 2eb29b57fde2acda76e12953b3a1050f3056b39d Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Sun, 19 Sep 2021 23:37:32 +0200
|
||||
Subject: [PATCH 080/139] v3dv/cmd_buffer: emit CLIPPER_XY_SCALING for v71
|
||||
Subject: [PATCH 080/142] v3dv/cmd_buffer: emit CLIPPER_XY_SCALING for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 7 ++++---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 611bf6a7445837c7e20416ff9f11a6dad9c543d7 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 14 Sep 2021 10:08:19 +0200
|
||||
Subject: [PATCH 081/139] v3dv/uniforms: update VIEWPORT_X/Y_SCALE uniforms for
|
||||
Subject: [PATCH 081/142] v3dv/uniforms: update VIEWPORT_X/Y_SCALE uniforms for
|
||||
v71
|
||||
|
||||
As the packet CLIPPER_XY scaling, this needs to be computed on 1/64ths
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 3819efaf2bb6fd8bd9cd45d54fb7254377b2296a Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Tue, 27 Jul 2021 14:02:30 +0200
|
||||
Subject: [PATCH 082/139] v3dv/cmd_buffer: just don't fill up early-z fields
|
||||
Subject: [PATCH 082/142] v3dv/cmd_buffer: just don't fill up early-z fields
|
||||
for CFG_BITS for v71
|
||||
|
||||
For v71 early_z_enable/early_z_updates_enable is configured with
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From e3b1a578f45ea830d790970115b6de978d56edb8 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Wed, 28 Jul 2021 12:01:38 +0200
|
||||
Subject: [PATCH 083/139] v3dv: default vertex attribute values are gen
|
||||
Subject: [PATCH 083/142] v3dv: default vertex attribute values are gen
|
||||
dependant
|
||||
|
||||
Content, structure and size would depend on the generation. Even if it
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 8464dc8869f3d2eccfecac7b4358cc0ffe05f081 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Wed, 28 Jul 2021 12:05:26 +0200
|
||||
Subject: [PATCH 084/139] v3dv/pipeline: default vertex attributes values are
|
||||
Subject: [PATCH 084/142] v3dv/pipeline: default vertex attributes values are
|
||||
not needed for v71
|
||||
|
||||
There are not part of the shader state record.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 339096598660ec34be8087007dd4d66581de1c4e Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Wed, 28 Jul 2021 13:45:52 +0200
|
||||
Subject: [PATCH 085/139] v3dv/pipeline: handle GL_SHADER_STATE_RECORD changed
|
||||
Subject: [PATCH 085/142] v3dv/pipeline: handle GL_SHADER_STATE_RECORD changed
|
||||
size on v71
|
||||
|
||||
It is likely that we would need more changes, as this packet changed,
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 5b1342eb1e255d17619b1a7b33eaf7b31f5e50a5 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 22 Sep 2021 12:03:58 +0200
|
||||
Subject: [PATCH 086/139] v3dv: setup render pass color clears for any format
|
||||
Subject: [PATCH 086/142] v3dv: setup render pass color clears for any format
|
||||
bpp in v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From ff5b5d4405b1d5600d7f1c4355202fd303f56700 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 22 Sep 2021 12:04:21 +0200
|
||||
Subject: [PATCH 087/139] v3dv: setup TLB clear color for meta operations in
|
||||
Subject: [PATCH 087/142] v3dv: setup TLB clear color for meta operations in
|
||||
v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 1e9d7d69849fa646b331f7661c74ee138badc4bb Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 25 Oct 2021 01:37:12 +0200
|
||||
Subject: [PATCH 088/139] v3dv: fix up texture shader state for v71
|
||||
Subject: [PATCH 088/142] v3dv: fix up texture shader state for v71
|
||||
|
||||
There are some new fields for YCbCr with pointers for the various
|
||||
planes in multi-planar formats. These need to match the base address
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 1f150a3a92741f7654a13626bd5b27b5575f2b76 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Mon, 25 Oct 2021 01:38:31 +0200
|
||||
Subject: [PATCH 089/139] v3dv: handle new texture state transfer functions in
|
||||
Subject: [PATCH 089/142] v3dv: handle new texture state transfer functions in
|
||||
v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 45de9f019ee92635de9a505db58439f0f4561281 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 28 Sep 2021 08:14:11 +0200
|
||||
Subject: [PATCH 090/139] v3dv: implement noop job for v71
|
||||
Subject: [PATCH 090/142] v3dv: implement noop job for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_queue.c | 10 +++++++---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 3e607bb28056bb52242be6878281efae84026813 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 28 Sep 2021 08:23:48 +0200
|
||||
Subject: [PATCH 091/139] v3dv: handle render pass global clear for v71
|
||||
Subject: [PATCH 091/142] v3dv: handle render pass global clear for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 66 ++++++++++++++++----------
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 3794f6f08c559c4e442b57e992d501fb7d515b9b Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 28 Sep 2021 08:31:04 +0200
|
||||
Subject: [PATCH 092/139] v3dv: GFX-1461 does not affect V3D 7.x
|
||||
Subject: [PATCH 092/142] v3dv: GFX-1461 does not affect V3D 7.x
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dv_pass.c | 6 ++++--
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 5be7f484210103e40b77fa3135042da4a8406659 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Tue, 28 Sep 2021 08:59:08 +0200
|
||||
Subject: [PATCH 093/139] v3dv: update thread end restrictions validation for
|
||||
Subject: [PATCH 093/142] v3dv: update thread end restrictions validation for
|
||||
v71
|
||||
|
||||
---
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From a751dff57b6d769f5b031054cc65415cc3b44c08 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 29 Sep 2021 08:22:59 +0200
|
||||
Subject: [PATCH 094/139] v3dv: handle early Z/S clears for v71
|
||||
Subject: [PATCH 094/142] v3dv: handle early Z/S clears for v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 30 ++++++++++++++++++++------
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 2add46ebce4760bf8349606201324ee0e6b1f9da Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Wed, 29 Sep 2021 09:07:28 +0200
|
||||
Subject: [PATCH 095/139] v3dv: handle RTs with no color targets in v71
|
||||
Subject: [PATCH 095/142] v3dv: handle RTs with no color targets in v71
|
||||
|
||||
---
|
||||
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 11 +++++++++++
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 019abbd34d2d904d6bb33f9fa4433cb53ca7899c Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Fri, 1 Oct 2021 15:18:38 +0200
|
||||
Subject: [PATCH 096/139] v3dv: no specific separate_segments flag for V3D 7.1
|
||||
Subject: [PATCH 096/142] v3dv: no specific separate_segments flag for V3D 7.1
|
||||
|
||||
On V3D 7.1 there is not a flag on the Shader State Record to specify
|
||||
if we are using shared or separate segments. This is done by setting
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 4f6b4f91577ec04aab907d59d836d0c17731a9d0 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 7 Oct 2021 12:43:49 +0200
|
||||
Subject: [PATCH 097/139] v3dv: don't convert floating point border colors in
|
||||
Subject: [PATCH 097/142] v3dv: don't convert floating point border colors in
|
||||
v71
|
||||
|
||||
The TMU does this for us now.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From d8083cb8f104e0f035f5b812e000a500fa52d66f Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Fri, 15 Oct 2021 13:06:31 +0200
|
||||
Subject: [PATCH 098/139] v3dv: handle Z clipping in v71
|
||||
Subject: [PATCH 098/142] v3dv: handle Z clipping in v71
|
||||
|
||||
Fixes the following tests:
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 2925fa6dc936d9268a59d8d7d4a775e89fd3fbdb Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Alejandro=20Pi=C3=B1eiro?= <apinheiro@igalia.com>
|
||||
Date: Wed, 17 Nov 2021 11:33:59 +0100
|
||||
Subject: [PATCH 099/139] broadcom/common: add TFU register definitions for v71
|
||||
Subject: [PATCH 099/142] broadcom/common: add TFU register definitions for v71
|
||||
|
||||
---
|
||||
src/broadcom/common/v3d_tfu.h | 23 +++++++++++++++++++++++
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
From 6d10aa8a64e009d4d1f4f05885621bd2d9a72465 Mon Sep 17 00:00:00 2001
|
||||
From: Iago Toral Quiroga <itoral@igalia.com>
|
||||
Date: Thu, 23 Sep 2021 13:09:41 +0200
|
||||
Subject: [PATCH 100/139] broadcom/simulator: TFU register names changed for
|
||||
Subject: [PATCH 100/142] broadcom/simulator: TFU register names changed for
|
||||
v71
|
||||
|
||||
---
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user