diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index eecc00ad4f..6bc4884442 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -3,8 +3,8 @@ # Copyright (C) 2017-present Team LibreELEC (https://libreelec.tv) PKG_NAME="u-boot" -PKG_VERSION="2023.10" -PKG_SHA256="e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900" +PKG_VERSION="2024.01" +PKG_SHA256="b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3" PKG_ARCH="arm aarch64" PKG_LICENSE="GPL" PKG_SITE="https://www.denx.de/wiki/U-Boot" diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch b/projects/Allwinner/devices/H3/patches/u-boot/0006-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch similarity index 57% rename from projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0006-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch index 154a616cb5..33c1ef3d05 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0007-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0006-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch @@ -1,7 +1,7 @@ -From f15f4f36e023aaaeacdbebe16736119d1be3ac6b Mon Sep 17 00:00:00 2001 +From e814c64fcbd08fb588b7e52b7e968ed9feb2d747 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 9 Oct 2021 17:12:57 -0500 -Subject: [PATCH 07/13] sunxi: psci: Add support for H3 CPU 0 hotplug +Subject: [PATCH 06/13] sunxi: psci: Add support for H3 CPU 0 hotplug Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be written, resuming CPU 0 requires using the "Super Standby" code path in @@ -21,17 +21,17 @@ PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at Signed-off-by: Samuel Holland --- Makefile | 17 +++++++++++++++++ - arch/arm/cpu/armv7/sunxi/psci.c | 31 +++++++++++++++++++++++++++++++ - arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++++++- - include/configs/sun8i.h | 4 ++++ - 4 files changed, 74 insertions(+), 1 deletion(-) + arch/arm/cpu/armv7/sunxi/psci.c | 32 ++++++++++++++++++++++++++++++++ + arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++++--- + arch/arm/mach-sunxi/Kconfig | 7 +++++++ + 4 files changed, 76 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile -index f911f7034430..9edcadfa9c47 100644 +index 8a04dfcf36..670c87c2ff 100644 --- a/Makefile +++ b/Makefile -@@ -984,6 +984,23 @@ endif - endif +@@ -1024,6 +1024,23 @@ ifeq ($(CONFIG_ARCH_ROCKCHIP)_$(CONFIG_SPL_FRAMEWORK),y_) + INPUTS-y += u-boot.img endif +ifeq ($(CONFIG_MACH_SUN8I_H3)$(CONFIG_ARMV7_PSCI),yy) @@ -55,7 +55,7 @@ index f911f7034430..9edcadfa9c47 100644 $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ $(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin) diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c -index 3448fe2edcaa..299bd3ba65e0 100644 +index 098e2b12bf..d76266d9c2 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -10,6 +10,7 @@ @@ -64,38 +64,45 @@ index 3448fe2edcaa..299bd3ba65e0 100644 +#include #include - #include - #include -@@ -141,6 +142,13 @@ static void __secure sunxi_set_entry_address(void *entry) - (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; - - writel((u32)entry, &cpucfg->priv0); + #include + #include +@@ -31,7 +32,9 @@ + #define SUNXI_CPU_RST(cpu) (0x40 + (cpu) * 0x40 + 0x0) + #define SUNXI_CPU_STATUS(cpu) (0x40 + (cpu) * 0x40 + 0x8) + #define SUNXI_GEN_CTRL (0x184) ++#define SUNXI_SUPER_STANDBY_FLAG (0x1a0) + #define SUNXI_PRIV0 (0x1a4) ++#define SUNXI_PRIV1 (0x1a8) + #define SUN7I_CPU1_PWR_CLAMP (0x1b0) + #define SUN7I_CPU1_PWROFF (0x1b4) + #define SUNXI_DBG_CTRL1 (0x1e4) +@@ -139,6 +142,13 @@ static void __secure sunxi_cpu_set_entry(int __always_unused cpu, void *entry) + } else { + writel((u32)entry, SUNXI_CPUCFG_BASE + SUNXI_PRIV0); + } + -+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3)) { ++ if (CONFIG_SUNXI_RESUME_BASE) { + /* Redirect CPU 0 to the secure monitor via the resume shim. */ -+ writel(0x16aaefe8, &cpucfg->super_standy_flag); -+ writel(0xaa16efe8, &cpucfg->super_standy_flag); -+ writel(SUNXI_RESUME_BASE, &cpucfg->priv1); ++ writel(0x16aaefe8, SUNXI_R_CPUCFG_BASE + SUNXI_SUPER_STANDBY_FLAG); ++ writel(0xaa16efe8, SUNXI_R_CPUCFG_BASE + SUNXI_SUPER_STANDBY_FLAG); ++ writel(CONFIG_SUNXI_RESUME_BASE, SUNXI_R_CPUCFG_BASE + SUNXI_PRIV1); + } } - #endif -@@ -255,9 +263,12 @@ out: + static void __secure sunxi_cpu_set_power(int cpu, bool on) +@@ -307,7 +317,9 @@ out: int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc, u32 context_id) { + struct sunxi_ccm_reg *ccu = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_cpucfg_reg *cpucfg = - (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; u32 cpu = (mpidr & 0x3); -+ u32 cpu_clk; -+ u32 bus_clk; ++ u32 bus_clk, cpu_clk; /* store target PC and context id */ psci_save(cpu, pc, context_id); -@@ -274,12 +285,32 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc, +@@ -324,12 +336,32 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc, /* Lock CPU (Disable external debug access) */ - clrbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu)); + sunxi_cpu_set_locking(cpu, true); + if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) { + /* Save registers that will be clobbered by the BROM. */ @@ -110,7 +117,7 @@ index 3448fe2edcaa..299bd3ba65e0 100644 sunxi_cpu_set_power(cpu, true); /* De-assert reset on target CPU */ - writel(BIT(1) | BIT(0), &cpucfg->cpu[cpu].rst); + sunxi_cpu_set_reset(cpu, false); + if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) { + /* Spin until the BROM has clobbered the clock registers. */ @@ -123,37 +130,24 @@ index 3448fe2edcaa..299bd3ba65e0 100644 + clrbits_le32(&ccu->pll6_cfg, BIT(25)); + } + - /* Unlock CPU (Disable external debug access) */ - setbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu)); + /* Unlock CPU (Reenable external debug access) */ + sunxi_cpu_set_locking(cpu, false); diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi -index ad1f97632979..a2c74da81aa9 100644 +index ed1cb91eeb..8c6d36d4ac 100644 --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -6,7 +6,11 @@ - #define ARCH "arm" - #endif - --#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) -+#if defined(CONFIG_MACH_SUN8I_H3) -+#ifdef CONFIG_ARMV7_PSCI -+#define RESUME_ADDR SUNXI_RESUME_BASE -+#endif -+#elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) - #define BL31_ADDR 0x00044000 - #define SCP_ADDR 0x00050000 - #elif defined(CONFIG_MACH_SUN50I_H6) -@@ -74,6 +78,20 @@ +@@ -77,6 +77,20 @@ }; #endif -+#ifdef RESUME_ADDR ++#if CONFIG_SUNXI_RESUME_BASE + resume { + description = "Super Standby resume image"; + type = "standalone"; + arch = ARCH; + compression = "none"; -+ load = ; ++ load = ; + + blob-ext { + filename = "u-boot-resume.img"; @@ -161,36 +155,46 @@ index ad1f97632979..a2c74da81aa9 100644 + }; +#endif + - #ifdef SCP_ADDR + #if CONFIG_SUNXI_SCP_BASE scp { description = "SCP firmware"; -@@ -107,6 +125,9 @@ +@@ -108,12 +122,15 @@ + firmware = "atf"; + #else firmware = "uboot"; - #endif - loadables = -+#ifdef RESUME_ADDR ++#endif ++ loadables = ++#if CONFIG_SUNXI_RESUME_BASE + "resume", -+#endif - #ifdef SCP_ADDR - "scp", #endif -diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h -index 563635636624..2f0d69bdfce2 100644 ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -15,6 +15,12 @@ - #include - #include + #if CONFIG_SUNXI_SCP_BASE +- loadables = "scp", "uboot"; +-#else +- loadables = "uboot"; ++ "scp", + #endif ++ "uboot"; + fdt = "fdt-SEQ"; + }; + }; +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index b0fbda0aa0..48e750d070 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -164,6 +164,13 @@ config SUNXI_BL31_BASE + help + Address where BL31 (TF-A) is loaded, or zero if BL31 is not used. -+#ifdef SUNXI_SRAM_A2_SIZE -+#define SUNXI_RESUME_BASE (CONFIG_ARMV7_SECURE_BASE + \ -+ CONFIG_ARMV7_SECURE_MAX_SIZE) -+#define SUNXI_RESUME_SIZE 1024 -+#endif ++config SUNXI_RESUME_BASE ++ hex ++ default 0x00047c00 if MACH_SUN8I_H3 ++ default 0x0 ++ help ++ Address where the resume shim is loaded, or zero if it is not used. + - /* Serial & console */ - #define CONFIG_SYS_NS16550_SERIAL - /* ns16550 reg in the low bits of cpu reg */ + config SUNXI_SCP_BASE + hex + default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5 -- -2.33.0 +2.34.1 diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0009-sunxi-Enable-support-for-SCP-firmware-on-H3.patch b/projects/Allwinner/devices/H3/patches/u-boot/0009-sunxi-Enable-support-for-SCP-firmware-on-H3.patch new file mode 100644 index 0000000000..6d2cd5e372 --- /dev/null +++ b/projects/Allwinner/devices/H3/patches/u-boot/0009-sunxi-Enable-support-for-SCP-firmware-on-H3.patch @@ -0,0 +1,57 @@ +From 2f330ad98dfb70c245b285d4d2d2a1fe5029fda8 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sat, 17 Apr 2021 13:33:54 -0500 +Subject: [PATCH 09/13] sunxi: Enable support for SCP firmware on H3 + +Now that issues with the BROM have been sorted out, we can implement +PSCI system suspend on H3 by delegating to SCP firmware. Let's start by +including the firmware in the FIT image and starting the coprocessor if +valid firmware is loaded. + +Signed-off-by: Samuel Holland +--- + arch/arm/mach-sunxi/Kconfig | 1 + + board/sunxi/board.c | 8 ++++++++ + 2 files changed, 9 insertions(+) + +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index 48e750d070..a6d5de9e3b 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -173,6 +173,7 @@ config SUNXI_RESUME_BASE + + config SUNXI_SCP_BASE + hex ++ default 0x00048000 if MACH_SUN8I_H3 + default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5 + default 0x00114000 if MACH_SUN50I_H6 + default 0x0 +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 39ecbe988f..b83d21ef08 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -851,6 +852,13 @@ int board_late_init(void) + usb_ether_init(); + #endif + ++#ifdef CONFIG_REMOTEPROC_SUN6I_AR100 ++ if (!rproc_load(0, CONFIG_SUNXI_SCP_BASE, 1)) { ++ puts("Starting SCP...\n"); ++ rproc_start(0); ++ } ++#endif ++ + return 0; + } + +-- +2.34.1 + diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0010-sunxi-Enable-support-for-SCP-firmware-on-H3.patch b/projects/Allwinner/devices/H3/patches/u-boot/0010-sunxi-Enable-support-for-SCP-firmware-on-H3.patch deleted file mode 100644 index 6c90b79842..0000000000 --- a/projects/Allwinner/devices/H3/patches/u-boot/0010-sunxi-Enable-support-for-SCP-firmware-on-H3.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 92657de6d2ac3ae100a4d78cc37c729142f1a59b Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 17 Apr 2021 13:33:54 -0500 -Subject: [PATCH 10/13] sunxi: Enable support for SCP firmware on H3 - -Now that issues with the BROM have been sorted out, we can implement -PSCI system suspend on H3 by delegating to SCP firmware. Let's start by -including the firmware in the FIT image and starting the coprocessor if -valid firmware is loaded. - -Signed-off-by: Samuel Holland ---- - arch/arm/dts/sunxi-u-boot.dtsi | 1 + - board/sunxi/board.c | 8 ++++++++ - include/configs/sun8i.h | 3 +++ - 3 files changed, 12 insertions(+) - -diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi -index a2c74da81aa9..ce062fe94052 100644 ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -9,6 +9,7 @@ - #if defined(CONFIG_MACH_SUN8I_H3) - #ifdef CONFIG_ARMV7_PSCI - #define RESUME_ADDR SUNXI_RESUME_BASE -+#define SCP_ADDR SUNXI_SCP_BASE - #endif - #elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) - #define BL31_ADDR 0x00044000 -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 2b7d655678d0..a25cd11f1124 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -957,6 +958,13 @@ int board_late_init(void) - usb_ether_init(); - #endif - -+#ifdef SUNXI_SCP_BASE -+ if (!rproc_load(0, SUNXI_SCP_BASE, SUNXI_SCP_MAX_SIZE)) { -+ puts("Starting SCP...\n"); -+ rproc_start(0); -+ } -+#endif -+ - return 0; - } - -diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h -index 2f0d69bdfce2..fda5b235a3e0 100644 ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -26,6 +26,9 @@ - #define SUNXI_RESUME_BASE (CONFIG_ARMV7_SECURE_BASE + \ - CONFIG_ARMV7_SECURE_MAX_SIZE) - #define SUNXI_RESUME_SIZE 1024 -+ -+#define SUNXI_SCP_BASE (SUNXI_RESUME_BASE + SUNXI_RESUME_SIZE) -+#define SUNXI_SCP_MAX_SIZE (16 * 1024) - #endif - - /* --- -2.33.0 - diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0001-DO-NOT-MERGE-sunxi-psci-Delegate-PSCI-to-SCPI.patch b/projects/Allwinner/devices/H3/patches/u-boot/0012-DO-NOT-MERGE-sunxi-psci-Delegate-PSCI-to-SCPI.patch similarity index 88% rename from projects/Allwinner/devices/H3/patches/u-boot/0001-DO-NOT-MERGE-sunxi-psci-Delegate-PSCI-to-SCPI.patch rename to projects/Allwinner/devices/H3/patches/u-boot/0012-DO-NOT-MERGE-sunxi-psci-Delegate-PSCI-to-SCPI.patch index 2e658a8cc5..6709170083 100644 --- a/projects/Allwinner/devices/H3/patches/u-boot/0001-DO-NOT-MERGE-sunxi-psci-Delegate-PSCI-to-SCPI.patch +++ b/projects/Allwinner/devices/H3/patches/u-boot/0012-DO-NOT-MERGE-sunxi-psci-Delegate-PSCI-to-SCPI.patch @@ -1,7 +1,7 @@ -From 470309271de34eb8c24138f1ac15bd37966ed01a Mon Sep 17 00:00:00 2001 +From 03db81bb312e8a9503f52779da4b2007bc08954a Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 9 Oct 2021 23:01:05 -0500 -Subject: [PATCH 13/13] [DO NOT MERGE] sunxi: psci: Delegate PSCI to SCPI +Subject: [PATCH 12/13] [DO NOT MERGE] sunxi: psci: Delegate PSCI to SCPI This adds a new PSCI implementation which communicates with SCP firmware running on the AR100 using the SCPI protocol. This allows it to support @@ -10,44 +10,47 @@ suspend, and multiple reset methods. Signed-off-by: Samuel Holland --- - arch/arm/cpu/armv7/Kconfig | 2 +- - arch/arm/cpu/armv7/sunxi/Makefile | 2 +- - arch/arm/cpu/armv7/sunxi/psci-scpi.c | 451 +++++++++++++++++++++++++++ - 3 files changed, 453 insertions(+), 2 deletions(-) + arch/arm/cpu/armv7/Kconfig | 1 + + arch/arm/cpu/armv7/sunxi/Makefile | 4 + + arch/arm/cpu/armv7/sunxi/psci-scpi.c | 463 +++++++++++++++++++++++++++ + 3 files changed, 468 insertions(+) create mode 100644 arch/arm/cpu/armv7/sunxi/psci-scpi.c diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig -index 06b477619334..948f4e8276fe 100644 +index ec3d31e750..9dccc12253 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig -@@ -44,7 +44,7 @@ config ARMV7_PSCI +@@ -86,6 +86,7 @@ config ARMV7_PSCI choice prompt "Supported PSCI version" depends on ARMV7_PSCI -- default ARMV7_PSCI_0_1 if ARCH_SUNXI -+ default ARMV7_PSCI_1_1 if ARCH_SUNXI ++ default ARMV7_PSCI_1_1 if MACH_SUN8I_H3 + default ARMV7_PSCI_0_1 if ARCH_SUNXI default ARMV7_PSCI_1_0 help - Select the supported PSCI version. diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile -index 1d40d6a18dca..4a0c16deb459 100644 +index 3e975b366c..6473b9acbd 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile -@@ -13,7 +13,7 @@ obj-$(CONFIG_MACH_SUN6I) += tzpc.o +@@ -13,8 +13,12 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o obj-$(CONFIG_MACH_SUN8I) += sram.o ifndef CONFIG_SPL_BUILD --obj-$(CONFIG_ARMV7_PSCI) += psci.o ++ifdef CONFIG_MACH_SUN8I_H3 +obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o ++else + obj-$(CONFIG_ARMV7_PSCI) += psci.o endif ++endif ifdef CONFIG_SPL_BUILD + obj-y += fel_utils.o diff --git a/arch/arm/cpu/armv7/sunxi/psci-scpi.c b/arch/arm/cpu/armv7/sunxi/psci-scpi.c new file mode 100644 -index 000000000000..b3849b366e31 +index 0000000000..fea51eb456 --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/psci-scpi.c -@@ -0,0 +1,451 @@ +@@ -0,0 +1,463 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016 Chen-Yu Tsai @@ -56,7 +59,6 @@ index 000000000000..b3849b366e31 + +#include +#include -+#include +#include +#include +#include @@ -67,6 +69,19 @@ index 000000000000..b3849b366e31 +#define GICD_BASE (SUNXI_GIC400_BASE + GIC_DIST_OFFSET) +#define GICC_BASE (SUNXI_GIC400_BASE + GIC_CPU_OFFSET_A15) + ++/* ++ * Offsets into the CPUCFG block applicable to most SUNXIs. ++ */ ++#define SUNXI_CPU_RST(cpu) (0x40 + (cpu) * 0x40 + 0x0) ++#define SUNXI_CPU_STATUS(cpu) (0x40 + (cpu) * 0x40 + 0x8) ++#define SUNXI_GEN_CTRL (0x184) ++#define SUNXI_SUPER_STANDY_FLAG (0x1a0) ++#define SUNXI_PRIV0 (0x1a4) ++#define SUNXI_PRIV1 (0x1a8) ++#define SUN7I_CPU1_PWR_CLAMP (0x1b0) ++#define SUN7I_CPU1_PWROFF (0x1b4) ++#define SUNXI_DBG_CTRL1 (0x1e4) ++ +#define HW_ON 0 +#define HW_OFF 1 +#define HW_STANDBY 2 @@ -446,14 +461,14 @@ index 000000000000..b3849b366e31 + struct sunxi_cpucfg_reg *cpucfg = + (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; + -+ writel((u32)entry, &cpucfg->priv0); ++ writel((u32)entry, SUNXI_CPUCFG_BASE + SUNXI_PRIV0); + -+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3)) { -+ /* Redirect CPU 0 to the secure monitor via the resume shim. */ -+ writel(0x16aaefe8, &cpucfg->super_standy_flag); -+ writel(0xaa16efe8, &cpucfg->super_standy_flag); -+ writel(SUNXI_RESUME_BASE, &cpucfg->priv1); -+ } ++#ifdef CONFIG_MACH_SUN8I_H3 ++ /* Redirect CPU 0 to the secure monitor via the resume shim. */ ++ writel(0x16aaefe8, SUNXI_CPUCFG_BASE + SUNXI_SUPER_STANDY_FLAG); ++ writel(0xaa16efe8, SUNXI_CPUCFG_BASE + SUNXI_SUPER_STANDY_FLAG); ++ writel(CONFIG_SUNXI_RESUME_BASE, SUNXI_CPUCFG_BASE + SUNXI_PRIV1); ++#endif +} +#endif + @@ -500,5 +515,5 @@ index 000000000000..b3849b366e31 + writel(0xff, GICC_BASE + GICC_PMR); +} -- -2.33.0 +2.34.1 diff --git a/projects/Allwinner/devices/H3/patches/u-boot/0013-DO-NOT-MERGE-sunxi-Enable-SCP-SCPI-on-A33-as-well.patch b/projects/Allwinner/devices/H3/patches/u-boot/0013-DO-NOT-MERGE-sunxi-Enable-SCP-SCPI-on-A33-as-well.patch new file mode 100644 index 0000000000..33a0bd7b2c --- /dev/null +++ b/projects/Allwinner/devices/H3/patches/u-boot/0013-DO-NOT-MERGE-sunxi-Enable-SCP-SCPI-on-A33-as-well.patch @@ -0,0 +1,103 @@ +From c8ea2780f2c37080eaba4115e35b684267aa9467 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Wed, 8 Jun 2022 07:55:54 -0500 +Subject: [PATCH 13/13] [DO NOT MERGE] sunxi: Enable SCP/SCPI on A33 as well + +Signed-off-by: Samuel Holland +--- + arch/arm/cpu/armv7/Kconfig | 2 +- + arch/arm/cpu/armv7/sunxi/Makefile | 2 +- + arch/arm/cpu/armv7/sunxi/psci-scpi.c | 4 ++++ + arch/arm/dts/sun8i-a23-a33.dtsi | 14 ++++++++++++++ + arch/arm/mach-sunxi/Kconfig | 2 +- + 5 files changed, 21 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig +index 9dccc12253..e60b0049ea 100644 +--- a/arch/arm/cpu/armv7/Kconfig ++++ b/arch/arm/cpu/armv7/Kconfig +@@ -86,7 +86,7 @@ config ARMV7_PSCI + choice + prompt "Supported PSCI version" + depends on ARMV7_PSCI +- default ARMV7_PSCI_1_1 if MACH_SUN8I_H3 ++ default ARMV7_PSCI_1_1 if MACH_SUN8I_A33 || MACH_SUN8I_H3 + default ARMV7_PSCI_0_1 if ARCH_SUNXI + default ARMV7_PSCI_1_0 + help +diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile +index 6473b9acbd..033042666f 100644 +--- a/arch/arm/cpu/armv7/sunxi/Makefile ++++ b/arch/arm/cpu/armv7/sunxi/Makefile +@@ -13,7 +13,7 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o + obj-$(CONFIG_MACH_SUN8I) += sram.o + + ifndef CONFIG_SPL_BUILD +-ifdef CONFIG_MACH_SUN8I_H3 ++ifneq ($(CONFIG_MACH_SUN8I_A33)$(CONFIG_MACH_SUN8I_H3),) + obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o + else + obj-$(CONFIG_ARMV7_PSCI) += psci.o +diff --git a/arch/arm/cpu/armv7/sunxi/psci-scpi.c b/arch/arm/cpu/armv7/sunxi/psci-scpi.c +index fea51eb456..d459eef22e 100644 +--- a/arch/arm/cpu/armv7/sunxi/psci-scpi.c ++++ b/arch/arm/cpu/armv7/sunxi/psci-scpi.c +@@ -24,7 +24,11 @@ + #define MPIDR_AFFLVL0(mpidr) (mpidr & 0xf) + #define MPIDR_AFFLVL1(mpidr) (mpidr >> 8 & 0xf) + ++#if defined(CONFIG_MACH_SUN8I_H3) + #define SCPI_SHMEM_BASE 0x0004be00 ++#else ++#define SCPI_SHMEM_BASE 0x00053e00 ++#endif + #define SCPI_SHMEM ((struct scpi_shmem *)SCPI_SHMEM_BASE) + + #define SCPI_RX_CHANNEL 1 +diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi +index a0cac966af..a26edbbf31 100644 +--- a/arch/arm/dts/sun8i-a23-a33.dtsi ++++ b/arch/arm/dts/sun8i-a23-a33.dtsi +@@ -138,6 +138,14 @@ + #size-cells = <1>; + ranges; + ++ sram_a2: sram@40000 { ++ compatible = "mmio-sram"; ++ reg = <0x00040000 0x14000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x00040000 0x14000>; ++ }; ++ + sram_c: sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x01d00000 0x80000>; +@@ -847,5 +855,11 @@ + #address-cells = <1>; + #size-cells = <0>; + }; ++ ++ remoteproc@1f01c00 { ++ compatible = "allwinner,sun6i-a31-ar100"; ++ reg = <0x01f01c00 0x400>; ++ sram = <&sram_a2>; ++ }; + }; + }; +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index a6d5de9e3b..381cc3f6fd 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -174,7 +174,7 @@ config SUNXI_RESUME_BASE + config SUNXI_SCP_BASE + hex + default 0x00048000 if MACH_SUN8I_H3 +- default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5 ++ default 0x00050000 if MACH_SUN8I_A33 || MACH_SUN50I || MACH_SUN50I_H5 + default 0x00114000 if MACH_SUN50I_H6 + default 0x0 + help +-- +2.34.1 + diff --git a/projects/Allwinner/patches/u-boot/0001-sunxi-spl-Disable-padding-from-SPL_PAD_TO.patch b/projects/Allwinner/patches/u-boot/0001-sunxi-spl-Disable-padding-from-SPL_PAD_TO.patch new file mode 100644 index 0000000000..62bda85c8a --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0001-sunxi-spl-Disable-padding-from-SPL_PAD_TO.patch @@ -0,0 +1,41 @@ +From 8674b92c48a528ec82a548bb677d0231316f5aa4 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 22 Jan 2023 14:29:17 -0600 +Subject: [PATCH 01/13] sunxi: spl: Disable padding from SPL_PAD_TO + +Starting with H6, Allwinner removed the artificial 32 KiB SPL size limit +from the boot ROM. Now SPL size is only limited by the available SRAM. +This limit ranges from 152 KiB on H6 to a whopping 2052 KiB on R329. To +take advantage of this additional space, we must increase SPL_MAX_SIZE. +Since we do not want to unnecessarily pad SPL out to these giant sizes, +we must set SPL_PAD_TO to zero. This causes no problems because binman +already takes care of appending the SPL payload at the right offset. + +Commit-changes: 2 + - New patch for v2 + +Cover-changes: 2 + - Disable padding from SPL_PAD_TO + +Signed-off-by: Samuel Holland +--- + common/spl/Kconfig | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/common/spl/Kconfig b/common/spl/Kconfig +index 25cd18afda..a0968ff106 100644 +--- a/common/spl/Kconfig ++++ b/common/spl/Kconfig +@@ -97,8 +97,7 @@ config SPL_PAD_TO + default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB + default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB) + default 0x10000 if ARCH_KEYSTONE +- default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616 +- default 0x0 if ARCH_MTMIPS ++ default 0x0 if ARCH_MTMIPS || ARCH_SUNXI + default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE + default SPL_MAX_SIZE + help +-- +2.34.1 + diff --git a/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch b/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch deleted file mode 100644 index edd617ff74..0000000000 --- a/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch +++ /dev/null @@ -1,41 +0,0 @@ -From a2f92f02abaae9df68759586102438df6f8d5efb Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 10:43:56 -0500 -Subject: [PATCH 02/13] binman: Prevent entries in a section from overlapping - -Currently, if the "offset" property is given for an entry, the section's -running offset is completely ignored. This causes entries to overlap if -the provided offset is less than the size of the entries earlier in the -section. Avoid the overlap by only using the provided offset when it is -greater than the running offset. - -The motivation for this change is the rule used by SPL to find U-Boot on -sunxi boards: U-Boot starts 32 KiB after the start of SPL, unless SPL is -larger than 32 KiB, in which case U-Boot immediately follows SPL. - -Signed-off-by: Samuel Holland ---- - tools/binman/entry.py | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/tools/binman/entry.py b/tools/binman/entry.py -index 70222718ea93..61822eb5e44f 100644 ---- a/tools/binman/entry.py -+++ b/tools/binman/entry.py -@@ -404,10 +404,9 @@ class Entry(object): - if self.offset_unset: - self.Raise('No offset set with offset-unset: should another ' - 'entry provide this correct offset?') -- elif self.offset_from_elf: -- self.offset = self.lookup_offset() -- else: -- self.offset = tools.align(offset, self.align) -+ elif self.offset > offset: -+ offset = self.offset -+ self.offset = tools.align(offset, self.align) - needed = self.pad_before + self.contents_size + self.pad_after - needed = tools.align(needed, self.align_size) - size = self.size --- -2.33.0 - diff --git a/projects/Allwinner/patches/u-boot/0002-sunxi-binman-Move-BL31-and-SCP-firmware-addresses-to.patch b/projects/Allwinner/patches/u-boot/0002-sunxi-binman-Move-BL31-and-SCP-firmware-addresses-to.patch new file mode 100644 index 0000000000..c6eaf28a79 --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0002-sunxi-binman-Move-BL31-and-SCP-firmware-addresses-to.patch @@ -0,0 +1,112 @@ +From fa31297e5f79d6eb97aed3cf94326124b308e337 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 22 Jan 2023 11:46:34 -0600 +Subject: [PATCH 02/13] sunxi: binman: Move BL31 and SCP firmware addresses to + Kconfig + +This is easier to read than the #ifdef staircase, provides better +visibility into the memory map (alongside the other Kconfig +definitions), and allows these addresses to be reused from code. + +Commit-changes: 2 + - New patch for v2, split from the .dtsi changes + +Reviewed-by: Simon Glass +Signed-off-by: Samuel Holland +--- + arch/arm/dts/sunxi-u-boot.dtsi | 24 +++++++----------------- + arch/arm/mach-sunxi/Kconfig | 17 +++++++++++++++++ + 2 files changed, 24 insertions(+), 17 deletions(-) + +diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi +index a0c8abb703..7a8764e463 100644 +--- a/arch/arm/dts/sunxi-u-boot.dtsi ++++ b/arch/arm/dts/sunxi-u-boot.dtsi +@@ -1,15 +1,5 @@ + #include + +-#ifdef CONFIG_MACH_SUN50I_H6 +-#define BL31_ADDR 0x104000 +-#define SCP_ADDR 0x114000 +-#elif defined(CONFIG_MACH_SUN50I_H616) +-#define BL31_ADDR 0x40000000 +-#else +-#define BL31_ADDR 0x44000 +-#define SCP_ADDR 0x50000 +-#endif +- + / { + aliases { + mmc0 = &mmc0; +@@ -69,8 +59,8 @@ + os = "arm-trusted-firmware"; + arch = "arm64"; + compression = "none"; +- load = ; +- entry = ; ++ load = ; ++ entry = ; + + atf-bl31 { + filename = "bl31.bin"; +@@ -78,13 +68,13 @@ + }; + }; + +-#ifdef SCP_ADDR ++#if CONFIG_SUNXI_SCP_BASE + scp { + description = "SCP firmware"; + type = "firmware"; + arch = "or1k"; + compression = "none"; +- load = ; ++ load = ; + + scp { + filename = "scp.bin"; +@@ -106,10 +96,10 @@ + @config-SEQ { + description = "NAME"; + firmware = "atf"; +-#ifndef SCP_ADDR +- loadables = "uboot"; +-#else ++#if CONFIG_SUNXI_SCP_BASE + loadables = "scp", "uboot"; ++#else ++ loadables = "uboot"; + #endif + fdt = "fdt-SEQ"; + }; +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index a10e4c06b6..b0fbda0aa0 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -155,6 +155,23 @@ config SUNXI_RVBAR_ALTERNATIVE + for all other SoCs, so the content of the SRAM_VER_REG becomes + irrelevant there, and we can use the same code. + ++config SUNXI_BL31_BASE ++ hex ++ default 0x00044000 if MACH_SUN50I || MACH_SUN50I_H5 ++ default 0x00104000 if MACH_SUN50I_H6 ++ default 0x40000000 if MACH_SUN50I_H616 ++ default 0x0 ++ help ++ Address where BL31 (TF-A) is loaded, or zero if BL31 is not used. ++ ++config SUNXI_SCP_BASE ++ hex ++ default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5 ++ default 0x00114000 if MACH_SUN50I_H6 ++ default 0x0 ++ help ++ Address where SCP firmware is loaded, or zero if it is not used. ++ + config SUNXI_A64_TIMER_ERRATUM + bool + +-- +2.34.1 + diff --git a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch deleted file mode 100644 index 4a8a66443c..0000000000 --- a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 45a9ce4ec981ab55b4a4374879348496877df75d Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 17 Apr 2021 13:33:54 -0500 -Subject: [PATCH 03/13] sunxi: binman: Enable SPL FIT loading for 32-bit SoCs - -Now that Crust (SCP firmware) has support for H3, we need a FIT image to -load it. H3 also needs to load a SoC-specific eGon blob to support CPU 0 -hotplug. - -Update the binman description to work on either 32-bit or 64-bit SoCs: - - Make BL31 optional, since it is not used on 32-bit SoCs (though BL32 - may be used in the future). - - Explicitly set the minimum offset of the FIT to 32 KiB, since SPL on - some boards is still only 24 KiB large even with FIT support enabled. - CONFIG_SPL_PAD_TO cannot be used because it is not defined for H616. - -FIT unlocks more features (signatures, multiple DTBs, etc.), so enable -it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs -SPL_FIT_IMAGE_TINY. For simplicity, enable that option everywhere. - -Signed-off-by: Samuel Holland ---- - arch/arm/Kconfig | 1 + - arch/arm/dts/sunxi-u-boot.dtsi | 46 ++++++++++++++++++++++------------ - common/spl/Kconfig | 3 +-- - 3 files changed, 32 insertions(+), 18 deletions(-) - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index ebb19272708d..cb321b6afac3 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1032,6 +1032,7 @@ config ARCH_SUNXI - imply SPL_GPIO - imply SPL_LIBCOMMON_SUPPORT - imply SPL_LIBGENERIC_SUPPORT -+ imply SPL_LOAD_FIT - imply SPL_MMC if MMC - imply SPL_POWER - imply SPL_SERIAL -diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi -index 4a6ed3a7dd5c..ad1f97632979 100644 ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ b/arch/arm/dts/sunxi-u-boot.dtsi -@@ -1,13 +1,19 @@ - #include - --#ifdef CONFIG_MACH_SUN50I_H6 --#define BL31_ADDR 0x104000 --#define SCP_ADDR 0x114000 -+#ifdef CONFIG_ARM64 -+#define ARCH "arm64" -+#else -+#define ARCH "arm" -+#endif -+ -+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5) -+#define BL31_ADDR 0x00044000 -+#define SCP_ADDR 0x00050000 -+#elif defined(CONFIG_MACH_SUN50I_H6) -+#define BL31_ADDR 0x00104000 -+#define SCP_ADDR 0x00114000 - #elif defined(CONFIG_MACH_SUN50I_H616) --#define BL31_ADDR 0x40000000 --#else --#define BL31_ADDR 0x44000 --#define SCP_ADDR 0x50000 -+#define BL31_ADDR 0x40000000 - #endif - - / { -@@ -30,30 +36,33 @@ - filename = "spl/sunxi-spl.bin"; - }; - --#ifdef CONFIG_ARM64 -+#ifdef CONFIG_SPL_LOAD_FIT - fit { -- description = "Configuration to load ATF before U-Boot"; -+ description = "Configuration to load U-Boot and firmware"; -+ offset = <32768>; - #address-cells = <1>; - fit,fdt-list = "of-list"; - - images { - uboot { -- description = "U-Boot (64-bit)"; -+ description = "U-Boot"; - type = "standalone"; - os = "u-boot"; -- arch = "arm64"; -+ arch = ARCH; - compression = "none"; - load = ; -+ entry = ; - - u-boot-nodtb { - }; - }; - -+#ifdef BL31_ADDR - atf { - description = "ARM Trusted Firmware"; - type = "firmware"; - os = "arm-trusted-firmware"; -- arch = "arm64"; -+ arch = ARCH; - compression = "none"; - load = ; - entry = ; -@@ -63,6 +72,7 @@ - missing-msg = "atf-bl31-sunxi"; - }; - }; -+#endif - - #ifdef SCP_ADDR - scp { -@@ -91,18 +101,23 @@ - - @config-SEQ { - description = "NAME"; -+#ifdef BL31_ADDR - firmware = "atf"; --#ifndef SCP_ADDR -- loadables = "uboot"; - #else -- loadables = "scp", "uboot"; -+ firmware = "uboot"; - #endif -+ loadables = -+#ifdef SCP_ADDR -+ "scp", -+#endif -+ "uboot"; - fdt = "fdt-SEQ"; - }; - }; - }; - #else - u-boot-img { -+ offset = <32768>; - }; - #endif - }; -diff --git a/common/spl/Kconfig b/common/spl/Kconfig -index 8a8a971a91e1..374818c05741 100644 ---- a/common/spl/Kconfig -+++ b/common/spl/Kconfig -@@ -442,8 +442,7 @@ config SPL_MD5 - config SPL_FIT_IMAGE_TINY - bool "Remove functionality from SPL FIT loading to reduce size" - depends on SPL_FIT -- default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6 -- default y if ARCH_IMX8M || ARCH_IMX9 -+ default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI - help - Enable this to reduce the size of the FIT image loading code - in SPL, if space for the SPL binary is very tight. --- -2.33.0 - diff --git a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Support-FIT-generation-for-32-bit-SoCs.patch b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Support-FIT-generation-for-32-bit-SoCs.patch new file mode 100644 index 0000000000..b38bb91645 --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Support-FIT-generation-for-32-bit-SoCs.patch @@ -0,0 +1,99 @@ +From 50ec5566a9eb50288c7aca9d85182e152aaf47d9 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 22 Jan 2023 11:57:42 -0600 +Subject: [PATCH 03/13] sunxi: binman: Support FIT generation for 32-bit SoCs + +Some 32-bit SoCs can use SCP firmware to implement additional PSCI +functionality, such as system suspend. In order to load this firmware +from SPL, we need to generate and use a FIT instead of a legacy image. + +Adjust the binman FIT definition so it does not rely on TF-A BL31, as +this is not used on 32-bit SoCs. Instead, after loading the firmware, +U-Boot proper is executed directly. + +Series-changes: 2 + - Rely on binman min-size instead of using explicit offsets + - Use Kconfig for firmware addresses instead of an #ifdef staircase + +Signed-off-by: Samuel Holland +--- + arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++----- + 1 file changed, 18 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi +index 7a8764e463..ed1cb91eeb 100644 +--- a/arch/arm/dts/sunxi-u-boot.dtsi ++++ b/arch/arm/dts/sunxi-u-boot.dtsi +@@ -1,5 +1,11 @@ + #include + ++#ifdef CONFIG_ARM64 ++#define ARCH "arm64" ++#else ++#define ARCH "arm" ++#endif ++ + / { + aliases { + mmc0 = &mmc0; +@@ -34,30 +40,32 @@ + filename = "spl/sunxi-spl.bin"; + }; + +-#ifdef CONFIG_ARM64 ++#ifdef CONFIG_SPL_LOAD_FIT + fit { +- description = "Configuration to load ATF before U-Boot"; ++ description = "Configuration to load U-Boot and firmware"; + #address-cells = <1>; + fit,fdt-list = "of-list"; + + images { + uboot { +- description = "U-Boot (64-bit)"; ++ description = "U-Boot"; + type = "standalone"; + os = "u-boot"; +- arch = "arm64"; ++ arch = ARCH; + compression = "none"; + load = ; ++ entry = ; + + u-boot-nodtb { + }; + }; + ++#if CONFIG_SUNXI_BL31_BASE + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + os = "arm-trusted-firmware"; +- arch = "arm64"; ++ arch = ARCH; + compression = "none"; + load = ; + entry = ; +@@ -67,6 +75,7 @@ + missing-msg = "atf-bl31-sunxi"; + }; + }; ++#endif + + #if CONFIG_SUNXI_SCP_BASE + scp { +@@ -95,7 +104,11 @@ + + @config-SEQ { + description = "NAME"; ++#if CONFIG_SUNXI_BL31_BASE + firmware = "atf"; ++#else ++ firmware = "uboot"; ++#endif + #if CONFIG_SUNXI_SCP_BASE + loadables = "scp", "uboot"; + #else +-- +2.34.1 + diff --git a/projects/Allwinner/patches/u-boot/0004-sunxi-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch b/projects/Allwinner/patches/u-boot/0004-sunxi-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch new file mode 100644 index 0000000000..bb3870ee1f --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0004-sunxi-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch @@ -0,0 +1,77 @@ +From 11b7f4963a4e87ca2c71a8e9c9767b82b024508b Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 22 Jan 2023 12:19:10 -0600 +Subject: [PATCH 04/13] sunxi: Enable SPL FIT loading for 32-bit SoCs + +Now that 32-bit SoCs can load U-Boot proper (and possibly other +firmware) from a FIT, use this method by default. SPL_FIT_IMAGE_TINY is +required to stay within the 24 or 32 KiB SPL size limit on early SoCs; +for consistency, enable it everywhere. + +Series-to: Andre Przywara +Series-to: Jagan Teki +Series-cc: Icenowy Zheng +Series-cc: Jesse Taube +Series-cc: u-boot@lists.denx.de + +Series-version: 3 + +Commit-changes: 2 + - New patch for v2, split from the .dtsi changes + +Cover-changes: 3 + - Rebased and collected tags + +Cover-letter: +sunxi: SPL FIT support for 32-bit sunxi SoCs +This series makes the necessary changes so 32-bit sunxi SoCs can load +additional device trees or firmware from SPL along with U-Boot proper. +Crust (SCP firmware) has support for A33 and H3, and H3 also needs to +load an eGon blob to support CPU 0 hotplug (a silicon bug workaround). + +FIT unlocks more features (signatures, multiple DTBs, etc.), so enable +it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs +SPL_FIT_IMAGE_TINY. For consistency, enable that option everywhere. + +After this series is applied, we can increase SPL_MAX_SIZE for H6 and +newer SoCs, both 32-bit (e.g. A50, T113) and 64-bit. I did not do that +yet because there is some discussion to be had about the correct value: +it must be adjusted to guarantee return-to-FEL functionality, and the +exact adjustment depends on the sunxi-fel tool implementation. +END + +Signed-off-by: Samuel Holland +--- + arch/arm/Kconfig | 1 + + common/spl/Kconfig | 3 +-- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index d812685c98..42781d02f0 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1167,6 +1167,7 @@ config ARCH_SUNXI + imply SPL_GPIO + imply SPL_LIBCOMMON_SUPPORT + imply SPL_LIBGENERIC_SUPPORT ++ imply SPL_LOAD_FIT + imply SPL_MMC if MMC + imply SPL_POWER + imply SPL_SERIAL +diff --git a/common/spl/Kconfig b/common/spl/Kconfig +index a0968ff106..aebbfbf99d 100644 +--- a/common/spl/Kconfig ++++ b/common/spl/Kconfig +@@ -567,8 +567,7 @@ config SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION + config SPL_FIT_IMAGE_TINY + bool "Remove functionality from SPL FIT loading to reduce size" + depends on SPL_FIT +- default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6 +- default y if ARCH_IMX8M || ARCH_IMX9 ++ default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI + help + Enable this to reduce the size of the FIT image loading code + in SPL, if space for the SPL binary is very tight. +-- +2.34.1 + diff --git a/projects/Allwinner/patches/u-boot/0005-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch b/projects/Allwinner/patches/u-boot/0005-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch index c577923520..611dd02229 100644 --- a/projects/Allwinner/patches/u-boot/0005-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch +++ b/projects/Allwinner/patches/u-boot/0005-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch @@ -1,4 +1,4 @@ -From c7bb6bf4bcee8577c3af0e2345c1bdc0925f9468 Mon Sep 17 00:00:00 2001 +From 2a1d897f25f57d6ccfa0cae091c51373b5711c3b Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 9 Oct 2021 22:00:22 -0500 Subject: [PATCH 05/13] sunxi: psci: Avoid hanging when CPU 0 is hot-unplugged @@ -14,12 +14,12 @@ Signed-off-by: Samuel Holland 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c -index 1ac50f558a40..3448fe2edcaa 100644 +index 5cb8cfa6cf..098e2b12bf 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c -@@ -38,6 +38,15 @@ - #define SUN8I_R40_PWR_CLAMP(cpu) (0x120 + (cpu) * 0x4) - #define SUN8I_R40_SRAMC_SOFT_ENTRY_REG0 (0xbc) +@@ -65,6 +65,15 @@ + #define SUNXI_R_CPUCFG_BASE 0 + #endif +static inline u32 __secure cp15_read_mpidr(void) +{ @@ -33,7 +33,7 @@ index 1ac50f558a40..3448fe2edcaa 100644 static void __secure cp15_write_cntp_tval(u32 tval) { asm volatile ("mcr p15, 0, %0, c14, c2, 0" : : "r" (tval)); -@@ -281,9 +290,14 @@ s32 __secure psci_cpu_off(void) +@@ -331,9 +340,14 @@ s32 __secure psci_cpu_off(void) { psci_cpu_off_common(); @@ -52,5 +52,5 @@ index 1ac50f558a40..3448fe2edcaa 100644 /* Wait to be turned off */ while (1) -- -2.33.0 +2.34.1 diff --git a/projects/Allwinner/patches/u-boot/0008-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch b/projects/Allwinner/patches/u-boot/0007-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch similarity index 94% rename from projects/Allwinner/patches/u-boot/0008-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch rename to projects/Allwinner/patches/u-boot/0007-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch index b134e7bdff..ad54b53b72 100644 --- a/projects/Allwinner/patches/u-boot/0008-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch +++ b/projects/Allwinner/patches/u-boot/0007-remoteproc-Add-a-driver-for-the-Allwinner-AR100.patch @@ -1,7 +1,7 @@ -From 9f1a0739ddd535b25fe07f7be9cc18aeaa5181c7 Mon Sep 17 00:00:00 2001 +From d02969c87094b379375f5053e5ef08060a9fac65 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 9 Oct 2021 14:58:27 -0500 -Subject: [PATCH 08/13] remoteproc: Add a driver for the Allwinner AR100 +Subject: [PATCH 07/13] remoteproc: Add a driver for the Allwinner AR100 Signed-off-by: Samuel Holland --- @@ -12,7 +12,7 @@ Signed-off-by: Samuel Holland create mode 100644 drivers/remoteproc/sun6i_ar100_rproc.c diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig -index 24e536463bbd..9789623ebee5 100644 +index 27e4a60ff5..bcaf6a2753 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -41,6 +41,15 @@ config REMOTEPROC_STM32_COPRO @@ -32,7 +32,7 @@ index 24e536463bbd..9789623ebee5 100644 bool "Support for TI's K3 based ARM64 remoteproc driver" select REMOTEPROC diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile -index f0e83451d66f..022e64f2053e 100644 +index fbe9c172bc..9529844b2a 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_)REMOTEPROC) += rproc-uclass.o rproc-elf-loader.o @@ -45,7 +45,7 @@ index f0e83451d66f..022e64f2053e 100644 obj-$(CONFIG_REMOTEPROC_TI_K3_R5F) += ti_k3_r5f_rproc.o diff --git a/drivers/remoteproc/sun6i_ar100_rproc.c b/drivers/remoteproc/sun6i_ar100_rproc.c new file mode 100644 -index 000000000000..c94f6c752bdd +index 0000000000..c94f6c752b --- /dev/null +++ b/drivers/remoteproc/sun6i_ar100_rproc.c @@ -0,0 +1,111 @@ @@ -161,5 +161,5 @@ index 000000000000..c94f6c752bdd + .ops = &sun6i_ar100_rproc_ops, +}; -- -2.33.0 +2.34.1 diff --git a/projects/Allwinner/patches/u-boot/0009-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch b/projects/Allwinner/patches/u-boot/0008-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch similarity index 84% rename from projects/Allwinner/patches/u-boot/0009-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch rename to projects/Allwinner/patches/u-boot/0008-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch index d422aa48e6..07e97e9941 100644 --- a/projects/Allwinner/patches/u-boot/0009-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch +++ b/projects/Allwinner/patches/u-boot/0008-arm-dts-sunxi-h3-Add-nodes-for-AR100-remoteproc.patch @@ -1,7 +1,7 @@ -From 910c452284dfbc086d9dfb18feb1b6c1b95f2eeb Mon Sep 17 00:00:00 2001 +From 5c52b7d8526785dafed602d230d5ef02569325c5 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 9 Oct 2021 15:04:16 -0500 -Subject: [PATCH 09/13] arm: dts: sunxi: h3: Add nodes for AR100 remoteproc +Subject: [PATCH 08/13] arm: dts: sunxi: h3: Add nodes for AR100 remoteproc Signed-off-by: Samuel Holland --- @@ -9,7 +9,7 @@ Signed-off-by: Samuel Holland 1 file changed, 14 insertions(+) diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi -index 4e89701df91f..076f0716da46 100644 +index eac2349a23..b88dcd4272 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -170,6 +170,14 @@ @@ -41,5 +41,5 @@ index 4e89701df91f..076f0716da46 100644 thermal-zones { -- -2.33.0 +2.34.1 diff --git a/projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch b/projects/Allwinner/patches/u-boot/0010-arm-psci-Add-definitions-for-PSCI-v1.1.patch similarity index 78% rename from projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch rename to projects/Allwinner/patches/u-boot/0010-arm-psci-Add-definitions-for-PSCI-v1.1.patch index b7d3e2bd28..8200bf07aa 100644 --- a/projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch +++ b/projects/Allwinner/patches/u-boot/0010-arm-psci-Add-definitions-for-PSCI-v1.1.patch @@ -1,7 +1,7 @@ -From 7719c6f06b698b3a32248dea61710f222ee8d7a1 Mon Sep 17 00:00:00 2001 +From 35c037e402d3d1a342830d72ac18a785bc03052a Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 9 Oct 2021 22:43:26 -0500 -Subject: [PATCH 11/13] arm: psci: Add definitions for PSCI v1.1 +Subject: [PATCH 10/13] arm: psci: Add definitions for PSCI v1.1 Add the new option, function IDs, and prototypes for PSCI v1.1 implementations. In the process, fix some issues with the existing @@ -12,16 +12,16 @@ definitions: Signed-off-by: Samuel Holland --- arch/arm/cpu/armv7/Kconfig | 3 +++ - arch/arm/include/asm/psci.h | 1 + + arch/arm/include/asm/psci.h | 6 ++++-- arch/arm/include/asm/system.h | 14 +++++++++----- arch/arm/lib/psci-dt.c | 2 ++ - 4 files changed, 20 insertions(+), 5 deletions(-) + 4 files changed, 18 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig -index 60bb0a9e1ec4..06b477619334 100644 +index 4eb34b7b44..ec3d31e750 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig -@@ -80,6 +80,9 @@ choice +@@ -91,6 +91,9 @@ choice help Select the supported PSCI version. @@ -32,22 +32,35 @@ index 60bb0a9e1ec4..06b477619334 100644 bool "PSCI V1.0" diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h -index 67e9234066b0..aa351867eee7 100644 +index 7343b941ef..aa351867ee 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h -@@ -87,6 +87,7 @@ +@@ -22,9 +22,9 @@ + #include + #endif + +-#define ARM_PSCI_VER_1_1 (0x00010001) +-#define ARM_PSCI_VER_1_0 (0x00010000) + #define ARM_PSCI_VER_0_2 (0x00000002) ++#define ARM_PSCI_VER_1_0 (0x00010000) ++#define ARM_PSCI_VER_1_1 (0x00010001) + + /* PSCI 0.1 interface */ + #define ARM_PSCI_FN_BASE 0x95c1ba5e +@@ -87,6 +87,8 @@ #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17) /* PSCI 1.1 interface */ +#define ARM_PSCI_1_1_FN_SYSTEM_RESET2 ARM_PSCI_0_2_FN(18) ++ #define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) /* 1KB stack per core */ diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h -index f75eea16b36c..02effcc6cc38 100644 +index 0eae857e73..63f0c4c39e 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h -@@ -557,17 +557,21 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop); +@@ -558,16 +558,20 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop); #ifdef CONFIG_ARMV7_PSCI void psci_arch_cpu_entry(void); void psci_arch_init(void); @@ -73,9 +86,8 @@ index f75eea16b36c..02effcc6cc38 100644 #endif #endif /* __ASSEMBLY__ */ - diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c -index 903b3357048a..ea9d1c8355c2 100644 +index 903b335704..ea9d1c8355 100644 --- a/arch/arm/lib/psci-dt.c +++ b/arch/arm/lib/psci-dt.c @@ -66,6 +66,8 @@ int fdt_psci(void *fdt) @@ -88,5 +100,5 @@ index 903b3357048a..ea9d1c8355c2 100644 psci_ver = ARM_PSCI_VER_1_0; #elif defined(CONFIG_ARMV7_PSCI_0_2) -- -2.33.0 +2.34.1 diff --git a/projects/Allwinner/patches/u-boot/0011-DO-NOT-MERGE-sunxi-Enable-remoteproc-on-some-H3-boar.patch b/projects/Allwinner/patches/u-boot/0011-DO-NOT-MERGE-sunxi-Enable-remoteproc-on-some-H3-boar.patch new file mode 100644 index 0000000000..6fe8b56ffa --- /dev/null +++ b/projects/Allwinner/patches/u-boot/0011-DO-NOT-MERGE-sunxi-Enable-remoteproc-on-some-H3-boar.patch @@ -0,0 +1,37 @@ +From 23a37da3c54dcda1b988d2f87b15d8a1154c1c4e Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Mon, 11 Oct 2021 03:20:28 -0500 +Subject: [PATCH 11/13] [DO NOT MERGE] sunxi: Enable remoteproc on some H3 + boards + +Signed-off-by: Samuel Holland +--- + configs/orangepi_one_defconfig | 1 + + configs/orangepi_plus2e_defconfig | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig +index 1064b4a39d..7af932870a 100644 +--- a/configs/orangepi_one_defconfig ++++ b/configs/orangepi_one_defconfig +@@ -6,5 +6,6 @@ CONFIG_MACH_SUN8I_H3=y + CONFIG_DRAM_CLK=672 + # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set + CONFIG_SUN8I_EMAC=y ++CONFIG_REMOTEPROC_SUN6I_AR100=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_OHCI_HCD=y +diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig +index 5e2cbc48ea..03fba682f7 100644 +--- a/configs/orangepi_plus2e_defconfig ++++ b/configs/orangepi_plus2e_defconfig +@@ -11,5 +11,6 @@ CONFIG_SPL_SYS_I2C_LEGACY=y + CONFIG_SYS_I2C_MVTWSI=y + CONFIG_SUN8I_EMAC=y + CONFIG_SY8106A_POWER=y ++CONFIG_REMOTEPROC_SUN6I_AR100=y + CONFIG_USB_EHCI_HCD=y + CONFIG_USB_OHCI_HCD=y +-- +2.34.1 + diff --git a/projects/Allwinner/patches/u-boot/0012-DO-NOT-MERGE-sunxi-Enable-remoteproc-on-H3.patch b/projects/Allwinner/patches/u-boot/0012-DO-NOT-MERGE-sunxi-Enable-remoteproc-on-H3.patch deleted file mode 100644 index c18d776f3a..0000000000 --- a/projects/Allwinner/patches/u-boot/0012-DO-NOT-MERGE-sunxi-Enable-remoteproc-on-H3.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 3fe205fc0e4c81cddbd3b7adacf29e0819f3672f Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 12 Oct 2021 20:45:10 +0200 -Subject: [PATCH] [DO NOT MERGE] sunxi: Enable remoteproc on H3 - -Signed-off-by: Jernej Skrabec ---- - arch/arm/mach-sunxi/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index 1d4a4fdd0c59..4414b847b7e4 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -295,6 +295,7 @@ config MACH_SUN8I_H3 - select CPU_V7_HAS_VIRT - select ARCH_SUPPORT_PSCI - select MACH_SUNXI_H3_H5 -+ select REMOTEPROC_SUN6I_AR100 - select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT - - config MACH_SUN8I_R40 --- -2.33.0 - diff --git a/projects/Allwinner/patches/u-boot/0010-sunxi-Add-OrangePi-3-LTS-board.patch b/projects/Allwinner/patches/u-boot/0014-sunxi-Add-OrangePi-3-LTS-board.patch similarity index 100% rename from projects/Allwinner/patches/u-boot/0010-sunxi-Add-OrangePi-3-LTS-board.patch rename to projects/Allwinner/patches/u-boot/0014-sunxi-Add-OrangePi-3-LTS-board.patch diff --git a/projects/Allwinner/patches/u-boot/0013-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch b/projects/Allwinner/patches/u-boot/0015-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch similarity index 100% rename from projects/Allwinner/patches/u-boot/0013-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch rename to projects/Allwinner/patches/u-boot/0015-sunxi-mmc-increase-stabilization-delay-from-1ms-to-20ms.patch diff --git a/projects/Allwinner/patches/u-boot/0014-sunxi-dram-Fix-incorrect-ram-size-detection-for-some-H6-boards.patch b/projects/Allwinner/patches/u-boot/0016-sunxi-dram-Fix-incorrect-ram-size-detection-for-some-H6-boards.patch similarity index 100% rename from projects/Allwinner/patches/u-boot/0014-sunxi-dram-Fix-incorrect-ram-size-detection-for-some-H6-boards.patch rename to projects/Allwinner/patches/u-boot/0016-sunxi-dram-Fix-incorrect-ram-size-detection-for-some-H6-boards.patch diff --git a/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch b/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch index 45cc8a216a..ab1df63604 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch @@ -1,7 +1,7 @@ -From 95ed57b0ca24cde1d7547878101c62f552cb1160 Mon Sep 17 00:00:00 2001 +From f7a0409730c486cc4151be60537ca71c25e2bf69 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Fri, 13 Nov 2020 02:09:36 +0000 -Subject: [PATCH 01/22] LOCAL: configs: meson64: prevent stdout/stderr on +Subject: [PATCH 1/5] LOCAL: configs: meson64: prevent stdout/stderr on videoconsole Several devices have CONFIG_VIDEO enabled which causes stdout/stderr @@ -14,10 +14,10 @@ Signed-off-by: Christian Hewitt 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/meson64.h b/include/configs/meson64.h -index 40803ee9da..05b1fcb9fd 100644 +index efab9a624d..0976774e5c 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h -@@ -18,7 +18,7 @@ +@@ -28,7 +28,7 @@ /* For splashscreen */ #ifdef CONFIG_VIDEO diff --git a/projects/Amlogic/patches/u-boot/u-boot-0002-LOCAL-configs-meson64-remove-amlogic-so-fdtdir-finds.patch b/projects/Amlogic/patches/u-boot/u-boot-0002-LOCAL-configs-meson64-remove-amlogic-so-fdtdir-finds.patch index 8b93165b7c..a35c23cac9 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0002-LOCAL-configs-meson64-remove-amlogic-so-fdtdir-finds.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0002-LOCAL-configs-meson64-remove-amlogic-so-fdtdir-finds.patch @@ -1,26 +1,26 @@ -From d16384b766e1704470f678589e01d288fbb94960 Mon Sep 17 00:00:00 2001 +From a9231a59ceb4b5025aa0e65599944a73b3a38257 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Thu, 22 Apr 2021 06:52:50 +0000 -Subject: [PATCH 02/22] LOCAL: configs: meson64: remove /amlogic so fdtdir - finds LE boot files +Subject: [PATCH 2/5] LOCAL: configs: meson64: remove /amlogic so fdtdir finds + LE boot files --- include/configs/meson64.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/meson64.h b/include/configs/meson64.h -index 05b1fcb9fd..c4af944382 100644 +index 0976774e5c..8490091824 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h -@@ -89,7 +89,7 @@ - "pxefile_addr_r=0x01080000\0" \ - "fdtoverlay_addr_r=0x01000000\0" \ - "ramdisk_addr_r=0x13000000\0" \ +@@ -133,7 +133,7 @@ + "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ + "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ - "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "fdtfile=/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "dfu_alt_info=fitimage ram " KERNEL_ADDR_R " 0x4000000 \0" \ BOOTENV #endif - -- 2.34.1 diff --git a/projects/Amlogic/patches/u-boot/u-boot-0003-LOCAL-board-amlogic-odroid-n2-remove-amlogic-prefix-.patch b/projects/Amlogic/patches/u-boot/u-boot-0003-LOCAL-board-amlogic-odroid-n2-remove-amlogic-prefix-.patch index bcebc030c5..9e221df736 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0003-LOCAL-board-amlogic-odroid-n2-remove-amlogic-prefix-.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0003-LOCAL-board-amlogic-odroid-n2-remove-amlogic-prefix-.patch @@ -1,8 +1,8 @@ -From a9fc1d56916fbcf4e00a1dd7543c9f53d697477a Mon Sep 17 00:00:00 2001 +From 95d719fb5565ae6eac12af1b63bfda78d7028ef5 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Tue, 3 Aug 2021 18:42:55 +0000 -Subject: [PATCH 03/22] LOCAL: board: amlogic: odroid-n2: remove /amlogic/ - prefix for dtb path +Subject: [PATCH 3/5] LOCAL: board: amlogic: odroid-n2: remove /amlogic/ prefix + for dtb path Remove the /amlogic/ prefix to align with current LE dtb locations. diff --git a/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-net-Add-Amlogic-GXL-MDIO-Mux-driver.patch b/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-net-Add-Amlogic-GXL-MDIO-Mux-driver.patch new file mode 100644 index 0000000000..da7d7e5616 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-net-Add-Amlogic-GXL-MDIO-Mux-driver.patch @@ -0,0 +1,197 @@ +From 60eefe057501e5bc4bd7b9deffb7f5ccaa45aae7 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 13 Dec 2023 10:30:12 +0100 +Subject: [PATCH 4/5] FROMGIT: net: Add Amlogic GXL MDIO Mux driver + +Port the mdio-mux-meson-gxl.c Linux driver introduced in [1], +and adapt it to U-Boot. + +This driver is needed to boot U-Boot with Linux DT since v6.4, +since it switched the MDIO mux from the mmio to a proper GXL driver. + +[1] 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support") + +Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-1-c56bb02a75ea@linaro.org +Signed-off-by: Neil Armstrong +--- + drivers/net/Kconfig | 7 ++ + drivers/net/Makefile | 1 + + drivers/net/mdio_mux_meson_gxl.c | 138 +++++++++++++++++++++++++++++++ + 3 files changed, 146 insertions(+) + create mode 100644 drivers/net/mdio_mux_meson_gxl.c + +diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig +index ebab4d9f2e..18ec910d12 100644 +--- a/drivers/net/Kconfig ++++ b/drivers/net/Kconfig +@@ -988,4 +988,11 @@ config MDIO_MUX_MESON_G12A + This driver is used for the MDIO mux found on the Amlogic G12A & compatible + SoCs. + ++config MDIO_MUX_MESON_GXL ++ bool "MDIO MUX for Amlogic Meson GXL SoCs" ++ depends on DM_MDIO_MUX ++ help ++ This driver is used for the MDIO mux found on the Amlogic GXL & compatible ++ SoCs. ++ + endif # NETDEVICES +diff --git a/drivers/net/Makefile b/drivers/net/Makefile +index 1ce6fea323..3794609fd2 100644 +--- a/drivers/net/Makefile ++++ b/drivers/net/Makefile +@@ -58,6 +58,7 @@ obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o + obj-$(CONFIG_MDIO_IPQ4019) += mdio-ipq4019.o + obj-$(CONFIG_MDIO_MUX_I2CREG) += mdio_mux_i2creg.o + obj-$(CONFIG_MDIO_MUX_MESON_G12A) += mdio_mux_meson_g12a.o ++obj-$(CONFIG_MDIO_MUX_MESON_GXL) += mdio_mux_meson_gxl.o + obj-$(CONFIG_MDIO_MUX_MMIOREG) += mdio_mux_mmioreg.o + obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o + obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o +diff --git a/drivers/net/mdio_mux_meson_gxl.c b/drivers/net/mdio_mux_meson_gxl.c +new file mode 100644 +index 0000000000..8ef3ae598b +--- /dev/null ++++ b/drivers/net/mdio_mux_meson_gxl.c +@@ -0,0 +1,138 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2022 Baylibre, SAS. ++ * Author: Jerome Brunet ++ * Copyright (c) 2023 Neil Armstrong ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define ETH_REG2 0x0 ++#define REG2_PHYID GENMASK(21, 0) ++#define EPHY_GXL_ID 0x110181 ++#define REG2_LEDACT GENMASK(23, 22) ++#define REG2_LEDLINK GENMASK(25, 24) ++#define REG2_DIV4SEL BIT(27) ++#define REG2_ADCBYPASS BIT(30) ++#define REG2_CLKINSEL BIT(31) ++#define ETH_REG3 0x4 ++#define REG3_ENH BIT(3) ++#define REG3_CFGMODE GENMASK(6, 4) ++#define REG3_AUTOMDIX BIT(7) ++#define REG3_PHYADDR GENMASK(12, 8) ++#define REG3_PWRUPRST BIT(21) ++#define REG3_PWRDOWN BIT(22) ++#define REG3_LEDPOL BIT(23) ++#define REG3_PHYMDI BIT(26) ++#define REG3_CLKINEN BIT(29) ++#define REG3_PHYIP BIT(30) ++#define REG3_PHYEN BIT(31) ++#define ETH_REG4 0x8 ++#define REG4_PWRUPRSTSIG BIT(0) ++ ++#define MESON_GXL_MDIO_EXTERNAL_ID 0 ++#define MESON_GXL_MDIO_INTERNAL_ID 1 ++ ++struct mdio_mux_meson_gxl_priv { ++ phys_addr_t regs; ++}; ++ ++static int meson_gxl_enable_internal_mdio(struct mdio_mux_meson_gxl_priv *priv) ++{ ++ u32 val; ++ ++ /* Setup the internal phy */ ++ val = (REG3_ENH | ++ FIELD_PREP(REG3_CFGMODE, 0x7) | ++ REG3_AUTOMDIX | ++ FIELD_PREP(REG3_PHYADDR, 8) | ++ REG3_LEDPOL | ++ REG3_PHYMDI | ++ REG3_CLKINEN | ++ REG3_PHYIP); ++ ++ writel(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4); ++ writel(val, priv->regs + ETH_REG3); ++ mdelay(10); ++ ++ /* NOTE: The HW kept the phy id configurable at runtime. ++ * The id below is arbitrary. It is the one used in the vendor code. ++ * The only constraint is that it must match the one in ++ * drivers/net/phy/meson-gxl.c to properly match the PHY. ++ */ ++ writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID), ++ priv->regs + ETH_REG2); ++ ++ /* Enable the internal phy */ ++ val |= REG3_PHYEN; ++ writel(val, priv->regs + ETH_REG3); ++ writel(0, priv->regs + ETH_REG4); ++ ++ /* The phy needs a bit of time to power up */ ++ mdelay(10); ++ ++ return 0; ++} ++ ++static int meson_gxl_enable_external_mdio(struct mdio_mux_meson_gxl_priv *priv) ++{ ++ /* Reset the mdio bus mux to the external phy */ ++ writel(0, priv->regs + ETH_REG3); ++ ++ return 0; ++} ++ ++static int mdio_mux_meson_gxl_select(struct udevice *mux, int cur, int sel) ++{ ++ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(mux); ++ ++ debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel); ++ ++ /* if last selection didn't change we're good to go */ ++ if (cur == sel) ++ return 0; ++ ++ switch (sel) { ++ case MESON_GXL_MDIO_EXTERNAL_ID: ++ return meson_gxl_enable_external_mdio(priv); ++ case MESON_GXL_MDIO_INTERNAL_ID: ++ return meson_gxl_enable_internal_mdio(priv); ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static const struct mdio_mux_ops mdio_mux_meson_gxl_ops = { ++ .select = mdio_mux_meson_gxl_select, ++}; ++ ++static int mdio_mux_meson_gxl_probe(struct udevice *dev) ++{ ++ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(dev); ++ ++ priv->regs = dev_read_addr(dev); ++ ++ return 0; ++} ++ ++static const struct udevice_id mdio_mux_meson_gxl_ids[] = { ++ { .compatible = "amlogic,gxl-mdio-mux" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(mdio_mux_meson_gxl) = { ++ .name = "mdio_mux_meson_gxl", ++ .id = UCLASS_MDIO_MUX, ++ .of_match = mdio_mux_meson_gxl_ids, ++ .probe = mdio_mux_meson_gxl_probe, ++ .ops = &mdio_mux_meson_gxl_ops, ++ .priv_auto = sizeof(struct mdio_mux_meson_gxl_priv), ++}; +-- +2.34.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-ARM-dts-sync-Amlogic-GX-DT-to-Linux-v6.4.patch b/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-ARM-dts-sync-Amlogic-GX-DT-to-Linux-v6.4.patch new file mode 100644 index 0000000000..e7a8b2cc1e --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-ARM-dts-sync-Amlogic-GX-DT-to-Linux-v6.4.patch @@ -0,0 +1,785 @@ +From 5f0a6294ad795b9644c2811469cca7c375bede6e Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 13 Dec 2023 10:30:13 +0100 +Subject: [PATCH 5/5] FROMGIT: ARM: dts: sync Amlogic GX DT to Linux v6.4 + +Sync Amlogic GXBB, GXL & GXM DTs from Linux v6.4, and also +switch to GXL MDIO MUX driver to adapt to DT change, + +Most of the changes are only cosmetic or doesn't concern U-Boot, +the most important change for U-Boot is the GXL mdio mux compatible +switch to amlogic,gxl-mdio-mux. + +Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-2-c56bb02a75ea@linaro.org +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-gx-libretech-pc.dtsi | 4 +- + arch/arm/dts/meson-gx.dtsi | 21 ++++-- + arch/arm/dts/meson-gxbb-nanopi-k2.dts | 13 +++- + arch/arm/dts/meson-gxbb-odroidc2.dts | 26 +++---- + arch/arm/dts/meson-gxbb.dtsi | 18 ++++- + arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 2 +- + .../meson-gxl-s905w-jethome-jethub-j80.dts | 12 +++- + arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 16 +---- + .../dts/meson-gxl-s905x-libretech-cc-v2.dts | 3 +- + arch/arm/dts/meson-gxl-s905x-p212.dts | 68 +++++++++++++++++++ + arch/arm/dts/meson-gxl-s905x-p212.dtsi | 21 +++--- + arch/arm/dts/meson-gxl.dtsi | 43 ++++++++---- + arch/arm/dts/meson-gxm-khadas-vim2.dts | 15 ++-- + arch/arm/dts/meson-gxm-wetek-core2.dts | 2 - + configs/beelink-gt1-ultimate_defconfig | 2 +- + configs/jethub_j80_defconfig | 2 +- + configs/khadas-vim2_defconfig | 2 +- + configs/khadas-vim_defconfig | 2 +- + configs/libretech-ac_defconfig | 2 +- + configs/libretech-cc_defconfig | 2 +- + configs/libretech-cc_v2_defconfig | 2 +- + configs/libretech-s905d-pc_defconfig | 2 +- + configs/libretech-s912-pc_defconfig | 2 +- + configs/p212_defconfig | 2 +- + configs/wetek-core2_defconfig | 2 +- + 25 files changed, 196 insertions(+), 90 deletions(-) + +diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi +index 2d7032f41e..4e84ab87cc 100644 +--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi ++++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi +@@ -17,7 +17,7 @@ + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + +- update-button { ++ button-update { + label = "update"; + linux,code = ; + press-threshold-microvolt = <1300000>; +@@ -416,7 +416,7 @@ + pinctrl-names = "default"; + status = "okay"; + +- gd25lq128: spi-flash@0 { ++ gd25lq128: flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; +diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi +index 6b457b2c30..11f89bfecb 100644 +--- a/arch/arm/dts/meson-gx.dtsi ++++ b/arch/arm/dts/meson-gx.dtsi +@@ -49,6 +49,12 @@ + no-map; + }; + ++ /* 32 MiB reserved for ARM Trusted Firmware (BL32) */ ++ secmon_reserved_bl32: secmon@5300000 { ++ reg = <0x0 0x05300000 0x0 0x2000000>; ++ no-map; ++ }; ++ + linux,cma { + compatible = "shared-dma-pool"; + reusable; +@@ -126,6 +132,7 @@ + + l2: l2-cache0 { + compatible = "cache"; ++ cache-level = <2>; + }; + }; + +@@ -226,7 +233,7 @@ + reg = <0x14 0x10>; + }; + +- eth_mac: eth_mac@34 { ++ eth_mac: eth-mac@34 { + reg = <0x34 0x10>; + }; + +@@ -243,7 +250,7 @@ + scpi_clocks: clocks { + compatible = "arm,scpi-clocks"; + +- scpi_dvfs: scpi_clocks@0 { ++ scpi_dvfs: clocks-0 { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>; +@@ -444,7 +451,7 @@ + + sysctrl_AO: sys-ctrl@0 { + compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; +- reg = <0x0 0x0 0x0 0x100>; ++ reg = <0x0 0x0 0x0 0x100>; + + clkc_AO: clock-controller { + compatible = "amlogic,meson-gx-aoclkc"; +@@ -525,7 +532,7 @@ + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; + +- hwrng: rng { ++ hwrng: rng@0 { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x0 0x0 0x4>; + }; +@@ -596,21 +603,21 @@ + sd_emmc_a: mmc@70000 { + compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; + reg = <0x0 0x70000 0x0 0x800>; +- interrupts = ; ++ interrupts = ; + status = "disabled"; + }; + + sd_emmc_b: mmc@72000 { + compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; + reg = <0x0 0x72000 0x0 0x800>; +- interrupts = ; ++ interrupts = ; + status = "disabled"; + }; + + sd_emmc_c: mmc@74000 { + compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; + reg = <0x0 0x74000 0x0 0x800>; +- interrupts = ; ++ interrupts = ; + status = "disabled"; + }; + }; +diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +index 7273eed529..7d94160f58 100644 +--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +@@ -385,9 +385,20 @@ + + /* Bluetooth on AP6212 */ + &uart_A { +- status = "disabled"; ++ status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ clocks = <&wifi_32k>; ++ clock-names = "lpo"; ++ vbat-supply = <&vddio_ao3v3>; ++ vddio-supply = <&vddio_ao18>; ++ host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>; ++ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; ++ }; + }; + + /* 40-pin CON1 */ +diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts +index 201596247f..01356437a0 100644 +--- a/arch/arm/dts/meson-gxbb-odroidc2.dts ++++ b/arch/arm/dts/meson-gxbb-odroidc2.dts +@@ -250,21 +250,6 @@ + }; + }; + +-&gpio_ao { +- /* +- * WARNING: The USB Hub on the Odroid-C2 needs a reset signal +- * to be turned high in order to be detected by the USB Controller +- * This signal should be handled by a USB specific power sequence +- * in order to reset the Hub when USB bus is powered down. +- */ +- hog-0 { +- gpio-hog; +- gpios = ; +- output-high; +- line-name = "usb-hub-reset"; +- }; +-}; +- + &hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; +@@ -414,5 +399,16 @@ + }; + + &usb1 { ++ dr_mode = "host"; ++ #address-cells = <1>; ++ #size-cells = <0>; + status = "okay"; ++ ++ hub@1 { ++ /* Genesys Logic GL852G USB 2.0 hub */ ++ compatible = "usb5e3,610"; ++ reg = <1>; ++ vdd-supply = <&p5v0>; ++ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>; ++ }; + }; +diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi +index 7c029f552a..12ef6e81c8 100644 +--- a/arch/arm/dts/meson-gxbb.dtsi ++++ b/arch/arm/dts/meson-gxbb.dtsi +@@ -300,8 +300,8 @@ + }; + + &gpio_intc { +- compatible = "amlogic,meson-gpio-intc", +- "amlogic,meson-gxbb-gpio-intc"; ++ compatible = "amlogic,meson-gxbb-gpio-intc", ++ "amlogic,meson-gpio-intc"; + status = "okay"; + }; + +@@ -427,6 +427,20 @@ + }; + }; + ++ spi_idle_high_pins: spi-idle-high-pins { ++ mux { ++ groups = "spi_sclk"; ++ bias-pull-up; ++ }; ++ }; ++ ++ spi_idle_low_pins: spi-idle-low-pins { ++ mux { ++ groups = "spi_sclk"; ++ bias-pull-down; ++ }; ++ }; ++ + spi_ss0_pins: spi-ss0 { + mux { + groups = "spi_ss0"; +diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +index 2d769203f6..213a0705eb 100644 +--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts ++++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +@@ -298,7 +298,7 @@ + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + +- w25q32: spi-flash@0 { ++ w25q32: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; +diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts +index 6eafb90869..a18d6d241a 100644 +--- a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts ++++ b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts +@@ -86,11 +86,11 @@ + }; + + &efuse { +- bt_mac: bt_mac@6 { ++ bt_mac: bt-mac@6 { + reg = <0x6 0x6>; + }; + +- wifi_mac: wifi_mac@C { ++ wifi_mac: wifi-mac@c { + reg = <0xc 0x6>; + }; + }; +@@ -213,6 +213,12 @@ + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "realtek,rtl8822cs-bt"; ++ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; ++ host-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &uart_C { +@@ -233,7 +239,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&i2c_b_pins>; + +- pcf8563: pcf8563@51 { ++ pcf8563: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + status = "okay"; +diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +index 60feac0179..02f81839d4 100644 +--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +@@ -140,7 +140,6 @@ + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +- clock-frequency = <32768>; + clock-output-names = "xin32k"; + }; + }; +@@ -218,20 +217,7 @@ + }; + + &sd_emmc_a { +- brcmf: wifi@1 { +- reg = <1>; +- compatible = "brcm,bcm4329-fmac"; +- }; +-}; +- +-&uart_A { +- bluetooth { +- compatible = "brcm,bcm43438-bt"; +- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; +- max-speed = <2000000>; +- clocks = <&wifi32k>; +- clock-names = "lpo"; +- }; ++ max-frequency = <100000000>; + }; + + /* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts +index 93d8f8aff7..6c4e68e0e6 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts +@@ -284,7 +284,7 @@ + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + +- nor_4u1: spi-flash@0 { ++ nor_4u1: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; +@@ -305,7 +305,6 @@ + }; + + &usb2_phy0 { +- pinctrl-names = "default"; + phy-supply = <&vcc5v>; + }; + +diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dts b/arch/arm/dts/meson-gxl-s905x-p212.dts +index 2602940c20..9b4ea6a493 100644 +--- a/arch/arm/dts/meson-gxl-s905x-p212.dts ++++ b/arch/arm/dts/meson-gxl-s905x-p212.dts +@@ -7,11 +7,19 @@ + /dts-v1/; + + #include "meson-gxl-s905x-p212.dtsi" ++#include + + / { + compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl"; + model = "Amlogic Meson GXL (S905X) P212 Development Board"; + ++ dio2133: analog-amplifier { ++ compatible = "simple-audio-amplifier"; ++ sound-name-prefix = "AU2"; ++ VCC-supply = <&hdmi_5v>; ++ enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; ++ }; ++ + cvbs-connector { + compatible = "composite-video-connector"; + +@@ -32,6 +40,66 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "S905X-P212"; ++ audio-aux-devs = <&dio2133>; ++ audio-widgets = "Line", "Lineout"; ++ audio-routing = "AU2 INL", "ACODEC LOLN", ++ "AU2 INR", "ACODEC LORN", ++ "Lineout", "AU2 OUTL", ++ "Lineout", "AU2 OUTR"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ ++ codec-1 { ++ sound-dai = <&aiu AIU_ACODEC CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&aiu AIU_ACODEC CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&acodec>; ++ }; ++ }; ++ }; ++}; ++ ++&acodec { ++ AVDD-supply = <&vddio_ao18>; ++ status = "okay"; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi +index 05cb2f5e5c..a150cc0e18 100644 +--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi ++++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi +@@ -97,6 +97,14 @@ + pinctrl-names = "default"; + }; + ++&pwm_ef { ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++}; ++ + &saradc { + status = "okay"; + vref-supply = <&vddio_ao18>; +@@ -125,6 +133,11 @@ + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; + }; + + /* SD card */ +@@ -165,14 +178,6 @@ + vqmmc-supply = <&vddio_boot>; + }; + +-&pwm_ef { +- status = "okay"; +- pinctrl-0 = <&pwm_e_pins>; +- pinctrl-names = "default"; +- clocks = <&clkc CLKID_FCLK_DIV4>; +- clock-names = "clkin0"; +-}; +- + /* This is connected to the Bluetooth module: */ + &uart_A { + status = "okay"; +diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi +index c3ac531c4f..17bcfa4702 100644 +--- a/arch/arm/dts/meson-gxl.dtsi ++++ b/arch/arm/dts/meson-gxl.dtsi +@@ -312,8 +312,8 @@ + }; + + &gpio_intc { +- compatible = "amlogic,meson-gpio-intc", +- "amlogic,meson-gxl-gpio-intc"; ++ compatible = "amlogic,meson-gxl-gpio-intc", ++ "amlogic,meson-gpio-intc"; + status = "okay"; + }; + +@@ -429,6 +429,20 @@ + }; + }; + ++ spi_idle_high_pins: spi-idle-high-pins { ++ mux { ++ groups = "spi_sclk"; ++ bias-pull-up; ++ }; ++ }; ++ ++ spi_idle_low_pins: spi-idle-low-pins { ++ mux { ++ groups = "spi_sclk"; ++ bias-pull-down; ++ }; ++ }; ++ + spi_ss0_pins: spi-ss0 { + mux { + groups = "spi_ss0"; +@@ -759,16 +773,23 @@ + }; + }; + +- eth-phy-mux { +- compatible = "mdio-mux-mmioreg", "mdio-mux"; ++ eth_phy_mux: mdio@558 { ++ reg = <0x0 0x558 0x0 0xc>; ++ compatible = "amlogic,gxl-mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; +- reg = <0x0 0x55c 0x0 0x4>; +- mux-mask = <0xffffffff>; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "ref"; + mdio-parent-bus = <&mdio0>; + +- internal_mdio: mdio@e40908ff { +- reg = <0xe40908ff>; ++ external_mdio: mdio@0 { ++ reg = <0x0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ internal_mdio: mdio@1 { ++ reg = <0x1>; + #address-cells = <1>; + #size-cells = <0>; + +@@ -779,12 +800,6 @@ + max-speed = <100>; + }; + }; +- +- external_mdio: mdio@2009087f { +- reg = <0x2009087f>; +- #address-cells = <1>; +- #size-cells = <0>; +- }; + }; + }; + +diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts +index 18a4b7a6c5..74897a1548 100644 +--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts ++++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts +@@ -52,10 +52,11 @@ + gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH + &gpio GPIODV_15 GPIO_ACTIVE_HIGH>; + /* Dummy RPM values since fan is optional */ +- gpio-fan,speed-map = <0 0 +- 1 1 +- 2 2 +- 3 3>; ++ gpio-fan,speed-map = ++ <0 0>, ++ <1 1>, ++ <2 2>, ++ <3 3>; + #cooling-cells = <2>; + }; + +@@ -270,7 +271,6 @@ + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +- clock-frequency = <32768>; + clock-output-names = "xin32k"; + }; + }; +@@ -307,7 +307,8 @@ + #size-cells = <0>; + + bus-width = <4>; +- max-frequency = <60000000>; ++ cap-sd-highspeed; ++ max-frequency = <100000000>; + + non-removable; + disable-wp; +@@ -373,7 +374,7 @@ + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + +- w25q32: spi-flash@0 { ++ w25q32: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q16", "jedec,spi-nor"; +diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts +index 1e7f77f9b5..f8c40340b9 100644 +--- a/arch/arm/dts/meson-gxm-wetek-core2.dts ++++ b/arch/arm/dts/meson-gxm-wetek-core2.dts +@@ -45,8 +45,6 @@ + + gpio-keys-polled { + compatible = "gpio-keys-polled"; +- #address-cells = <1>; +- #size-cells = <0>; + poll-interval = <100>; + + button-power { +diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig +index 1313dde92f..00fdad8544 100644 +--- a/configs/beelink-gt1-ultimate_defconfig ++++ b/configs/beelink-gt1-ultimate_defconfig +@@ -46,7 +46,7 @@ CONFIG_PHY_REALTEK=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig +index b370e5d1d4..15e410de82 100644 +--- a/configs/jethub_j80_defconfig ++++ b/configs/jethub_j80_defconfig +@@ -54,7 +54,7 @@ CONFIG_PHY_MESON_GXL=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig +index 28e9052245..59ef33723e 100644 +--- a/configs/khadas-vim2_defconfig ++++ b/configs/khadas-vim2_defconfig +@@ -51,7 +51,7 @@ CONFIG_PHY_REALTEK=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig +index d27ab6f590..5ed7c1a408 100644 +--- a/configs/khadas-vim_defconfig ++++ b/configs/khadas-vim_defconfig +@@ -45,7 +45,7 @@ CONFIG_PHY_MESON_GXL=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig +index bc17b423a2..f0ab19580c 100644 +--- a/configs/libretech-ac_defconfig ++++ b/configs/libretech-ac_defconfig +@@ -57,7 +57,7 @@ CONFIG_PHY_MESON_GXL=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig +index baa9b1b3db..bb1a37a0cd 100644 +--- a/configs/libretech-cc_defconfig ++++ b/configs/libretech-cc_defconfig +@@ -44,7 +44,7 @@ CONFIG_PHY_MESON_GXL=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig +index b1c267a791..8949e240c9 100644 +--- a/configs/libretech-cc_v2_defconfig ++++ b/configs/libretech-cc_v2_defconfig +@@ -52,7 +52,7 @@ CONFIG_PHY_MESON_GXL=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_PHY=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y +diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig +index cd138d696e..a5dc3115fc 100644 +--- a/configs/libretech-s905d-pc_defconfig ++++ b/configs/libretech-s905d-pc_defconfig +@@ -53,7 +53,7 @@ CONFIG_PHY_REALTEK=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig +index dabb4ca4ec..68f462eeff 100644 +--- a/configs/libretech-s912-pc_defconfig ++++ b/configs/libretech-s912-pc_defconfig +@@ -52,7 +52,7 @@ CONFIG_PHY_REALTEK=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/p212_defconfig b/configs/p212_defconfig +index b90391d9b5..6b73607d64 100644 +--- a/configs/p212_defconfig ++++ b/configs/p212_defconfig +@@ -40,7 +40,7 @@ CONFIG_PHY_MESON_GXL=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig +index 9bf3de9e7a..01ffb8bbd7 100644 +--- a/configs/wetek-core2_defconfig ++++ b/configs/wetek-core2_defconfig +@@ -46,7 +46,7 @@ CONFIG_PHY_REALTEK=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + CONFIG_ETH_DESIGNWARE_MESON8B=y +-CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MDIO_MUX_MESON_GXL=y + CONFIG_MESON_GXL_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXL=y +-- +2.34.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0007-WIP-boards-amlogic-add-board-files-for-wetek-gxbb-de.patch b/projects/Amlogic/patches/u-boot/u-boot-0007-WIP-boards-amlogic-add-board-files-for-wetek-gxbb-de.patch deleted file mode 100644 index 9f9800b6dd..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0007-WIP-boards-amlogic-add-board-files-for-wetek-gxbb-de.patch +++ /dev/null @@ -1,103 +0,0 @@ -From cec8965a83baea925ac82ca0be5dac3cc1823915 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Thu, 22 Apr 2021 05:45:29 +0000 -Subject: [PATCH 07/22] WIP: boards: amlogic: add board files for wetek-gxbb - devices - -These support the WeTek Hub and Play2 devices. - -Signed-off-by: Christian Hewitt ---- - board/amlogic/wetek-gxbb/MAINTAINERS | 8 +++++ - board/amlogic/wetek-gxbb/Makefile | 6 ++++ - board/amlogic/wetek-gxbb/wetek-gxbb.c | 50 +++++++++++++++++++++++++++ - 3 files changed, 64 insertions(+) - create mode 100644 board/amlogic/wetek-gxbb/MAINTAINERS - create mode 100644 board/amlogic/wetek-gxbb/Makefile - create mode 100644 board/amlogic/wetek-gxbb/wetek-gxbb.c - -diff --git a/board/amlogic/wetek-gxbb/MAINTAINERS b/board/amlogic/wetek-gxbb/MAINTAINERS -new file mode 100644 -index 0000000000..8aaa82ce17 ---- /dev/null -+++ b/board/amlogic/wetek-gxbb/MAINTAINERS -@@ -0,0 +1,8 @@ -+WETEK-GXBB -+M: Christian Hewitt -+S: Maintained -+L: u-boot-amlogic@groups.io -+F: board/amlogic/wetek-gxbb/ -+F: configs/wetek-hub_defconfig -+F: configs/wetek-play2_defconfig -+F: doc/board/amlogic/wetek-gxbb.rst -diff --git a/board/amlogic/wetek-gxbb/Makefile b/board/amlogic/wetek-gxbb/Makefile -new file mode 100644 -index 0000000000..7a5266b028 ---- /dev/null -+++ b/board/amlogic/wetek-gxbb/Makefile -@@ -0,0 +1,6 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# (C) Copyright 2020 BayLibre, SAS -+# Author: Neil Armstrong -+ -+obj-y := wetek-gxbb.o -diff --git a/board/amlogic/wetek-gxbb/wetek-gxbb.c b/board/amlogic/wetek-gxbb/wetek-gxbb.c -new file mode 100644 -index 0000000000..fb07eefa53 ---- /dev/null -+++ b/board/amlogic/wetek-gxbb/wetek-gxbb.c -@@ -0,0 +1,50 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2016 Beniamino Galvani -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define EFUSE_MAC_OFFSET 0 -+#define EFUSE_MAC_SIZE 12 -+#define MAC_ADDR_LEN 6 -+ -+int misc_init_r(void) -+{ -+ u8 mac_addr[MAC_ADDR_LEN]; -+ char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3]; -+ ssize_t len; -+ -+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { -+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, -+ efuse_mac_addr, EFUSE_MAC_SIZE); -+ if (len != EFUSE_MAC_SIZE) -+ return 0; -+ -+ /* MAC is stored in ASCII format, 1bytes = 2characters */ -+ for (int i = 0; i < 6; i++) { -+ tmp[0] = efuse_mac_addr[i * 2]; -+ tmp[1] = efuse_mac_addr[i * 2 + 1]; -+ tmp[2] = '\0'; -+ mac_addr[i] = simple_strtoul(tmp, NULL, 16); -+ } -+ -+ if (is_valid_ethaddr(mac_addr)) -+ eth_env_set_enetaddr("ethaddr", mac_addr); -+ else -+ meson_generate_serial_ethaddr(); -+ -+ eth_env_get_enetaddr("ethaddr", mac_addr); -+ } -+ -+ return 0; -+} --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch deleted file mode 100644 index 5dc514487b..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 7416bc16b956d7b9b2761ac5511c6b51ac8b4ca1 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Thu, 7 Jul 2022 10:27:01 +0000 -Subject: [PATCH 14/22] WIP: boards: amlogic: add Beelink GT1 defconfig - -Add a board config for Beelink GT1 devices - -Signed-off-by: Christian Hewitt ---- - configs/beelink-gt1_defconfig | 71 +++++++++++++++++++++++++++++++++++ - 1 file changed, 71 insertions(+) - create mode 100644 configs/beelink-gt1_defconfig - -diff --git a/configs/beelink-gt1_defconfig b/configs/beelink-gt1_defconfig -new file mode 100644 -index 0000000000..77ffc9aa49 ---- /dev/null -+++ b/configs/beelink-gt1_defconfig -@@ -0,0 +1,71 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_MESON=y -+CONFIG_TEXT_BASE=0x01000000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_DM_GPIO=y -+CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-gt1-ultimate" -+CONFIG_MESON_GXM=y -+CONFIG_DEBUG_UART_BASE=0xc81004c0 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING=" beelink-gt1" -+CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 -+CONFIG_REMAKE_ELF=y -+CONFIG_OF_BOARD_SETUP=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_MISC_INIT_R=y -+# CONFIG_CMD_BDI is not set -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_ADC=y -+CONFIG_CMD_GPIO=y -+# CONFIG_CMD_LOADS is not set -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+CONFIG_OF_CONTROL=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SARADC_MESON=y -+CONFIG_MMC_MESON_GX=y -+CONFIG_MTD=y -+CONFIG_DM_MTD=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DM_ETH=y -+CONFIG_DM_MDIO=y -+CONFIG_DM_MDIO_MUX=y -+CONFIG_ETH_DESIGNWARE_MESON8B=y -+CONFIG_MDIO_MUX_MMIOREG=y -+CONFIG_MESON_GXL_USB_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_MESON_GXL=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_MESON_GX_VPU_POWER_DOMAIN=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_RESET=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_SKIP_INIT=y -+CONFIG_MESON_SERIAL=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_DWC3_MESON_GXL=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e -+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_VIDEO=y -+# CONFIG_VIDEO_BPP8 is not set -+# CONFIG_VIDEO_BPP16 is not set -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_MESON=y -+CONFIG_VIDEO_DT_SIMPLEFB=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.34.1 -