linux (Allwinner): update patches for 5.18-rc3

This commit is contained in:
Rudi Heitbaum 2022-04-23 13:35:43 +00:00
parent 3a6b48013e
commit 3cafdc99bb
4 changed files with 18 additions and 19 deletions

View File

@ -5,7 +5,7 @@ Subject: [PATCH 40/44] wip: H6 deinterlace
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/media/platform/Kconfig | 13 +
.../media/platform/sunxi/sunxi50i-di/Kconfig | 13 +
drivers/media/platform/sunxi/Makefile | 1 +
.../media/platform/sunxi/sun50i-di/Makefile | 2 +
.../platform/sunxi/sun50i-di/sun50i-di.c | 1134 +++++++++++++++++
@ -15,12 +15,10 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
create mode 100644 drivers/media/platform/sunxi/sun50i-di/sun50i-di.c
create mode 100644 drivers/media/platform/sunxi/sun50i-di/sun50i-di.h
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -574,6 +574,19 @@ config VIDEO_QCOM_VENUS
on various Qualcomm SoCs.
To compile this driver as a module choose m here.
--- /dev/null
+++ b/drivers/media/platform/sunxi/sun50i-di/Kconfig
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config VIDEO_SUN50I_DEINTERLACE
+ tristate "Allwinner Deinterlace v2 driver"
+ depends on VIDEO_DEV && VIDEO_V4L2
@ -33,10 +31,6 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+ Support for the Allwinner deinterlace v2 unit found on
+ some SoCs, like H6.
+ To compile this driver as a module choose m here.
+
config VIDEO_SUN8I_DEINTERLACE
tristate "Allwinner Deinterlace driver"
depends on VIDEO_DEV && VIDEO_V4L2
--- a/drivers/media/platform/sunxi/Makefile
+++ b/drivers/media/platform/sunxi/Makefile
@@ -3,4 +3,5 @@
@ -1362,3 +1356,11 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+};
+
+#endif
--- a/drivers/media/platform/sunxi/Kconfig 2022-04-17 20:57:31.000000000 +0000
+++ b/drivers/media/platform/sunxi/Kconfig 2022-04-23 13:22:19.652398021 +0000
@@ -5,4 +5,5 @@
source "drivers/media/platform/sunxi/sun4i-csi/Kconfig"
source "drivers/media/platform/sunxi/sun6i-csi/Kconfig"
source "drivers/media/platform/sunxi/sun8i-di/Kconfig"
+source "drivers/media/platform/sunxi/sun50i-di/Kconfig"
source "drivers/media/platform/sunxi/sun8i-rotate/Kconfig"

View File

@ -18,10 +18,10 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
@@ -116,16 +116,16 @@
#define SUN8I_I2S_CHAN_CFG_REG 0x30
#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK GENMASK(6, 4)
#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK GENMASK(7, 4)
-#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) ((chan - 1) << 4)
+#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) (((chan) - 1) << 4)
#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(2, 0)
#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(3, 0)
-#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) (chan - 1)
+#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) ((chan) - 1)

View File

@ -14,11 +14,10 @@ Signed-off-by: Ondrej Jirman <megous@megous.com>
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -57,20 +57,22 @@ struct emac_variant {
@@ -57,18 +57,20 @@ struct emac_variant {
};
/* struct sunxi_priv_data - hold all sunxi private data
- * @tx_clk: reference to MAC TX clock
- * @ephy_clk: reference to the optional EPHY clock for the internal PHY
- * @regulator: reference to the optional regulator
- * @rst_ephy: reference to the optional EPHY reset for the internal PHY
@ -27,7 +26,6 @@ Signed-off-by: Ondrej Jirman <megous@megous.com>
- * @internal_phy_powered: Does the internal PHY is enabled
- * @use_internal_phy: Is the internal PHY selected for use
- * @mux_handle: Internal pointer used by mdio-mux lib
+ * @tx_clk: reference to MAC TX clock
+ * @ephy_clk: reference to the optional EPHY clock for
+ * the internal PHY
+ * @regulator_phy: reference to the optional regulator
@ -40,7 +38,6 @@ Signed-off-by: Ondrej Jirman <megous@megous.com>
+ * @mux_handle: Internal pointer used by mdio-mux lib
*/
struct sunxi_priv_data {
struct clk *tx_clk;
struct clk *ephy_clk;
- struct regulator *regulator;
+ struct regulator *regulator_phy;

View File

@ -26,8 +26,8 @@ Signed-off-by: Ondrej Jirman <megous@megous.com>
* @rst_ephy: reference to the optional EPHY reset for
* the internal PHY
* @variant: reference to the current board variant
@@ -73,6 +75,7 @@ struct sunxi_priv_data {
struct clk *tx_clk;
@@ -73,6 +75,7 @@
struct sunxi_priv_data {
struct clk *ephy_clk;
struct regulator *regulator_phy;
+ struct regulator *regulator_phy_io;