mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
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linux: update Amlogic patches for Linux 6.14.y
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
This commit is contained in:
parent
15e53d5586
commit
3e7432503e
@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
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case "${LINUX}" in
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amlogic)
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PKG_VERSION="9bc5c94e278f780af15b3f6e13ae08310aeae880" # 6.14.2
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PKG_SHA256="c031ffd2ce70ffe5f89e8893b9b385169d3f27103af60e2e6b1903c67d3c98cd"
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PKG_VERSION="e2d3e1fdb530198317501eb7ded4f3a5fb6c881c" # 6.14.6
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PKG_SHA256="ba423436e51426f26ab4f82b799f92305e228db37610cdb1da9d67eb67661911"
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PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
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PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
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PKG_PATCH_DIRS="default rtlwifi/after-6.14"
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@ -1,7 +1,7 @@
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From 5bb8805228fcb342a09ae2093775d8ca9825eef7 Mon Sep 17 00:00:00 2001
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From a396947aad7b93cbb9af74aa05872432d2ba7077 Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Sat, 13 Apr 2019 05:41:51 +0000
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Subject: [PATCH 01/51] LOCAL: set meson-gx cma pool to 896MB
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Subject: [PATCH 01/55] LOCAL: set meson-gx cma pool to 896MB
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This change sets the CMA pool to a larger 896MB! value for vdec use
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@ -1,7 +1,7 @@
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From 61ec51fc6355b44c6a67bd31dfae62d1ef49bde1 Mon Sep 17 00:00:00 2001
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From 6391e61ed787d1ad01caf743570ade3fb08aa219 Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Wed, 14 Aug 2019 19:58:14 +0000
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Subject: [PATCH 02/51] LOCAL: set meson-g12 cma pool to 896MB
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Subject: [PATCH 02/55] LOCAL: set meson-g12 cma pool to 896MB
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This change sets the CMA pool to a larger 896MB! value for vdec use
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@ -1,7 +1,7 @@
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From 8ad1d87fdd6ef19e36698ed3196da4290d539327 Mon Sep 17 00:00:00 2001
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From 2d868721c40d4652d595b5150974451e7a9ac1eb Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Sat, 13 Apr 2019 05:45:18 +0000
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Subject: [PATCH 03/51] LOCAL: arm64: fix Kodi sysinfo CPU information
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Subject: [PATCH 03/55] LOCAL: arm64: fix Kodi sysinfo CPU information
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This allows the CPU information to show in the Kodi sysinfo screen, e.g.
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@ -1,7 +1,7 @@
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From 541a3e64dce42c72d208016abcb91200ae6c893c Mon Sep 17 00:00:00 2001
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From b97bcac935313e7876c320ea28386f1eb8878912 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Thu, 3 Nov 2016 15:29:23 +0100
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Subject: [PATCH 04/51] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
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Subject: [PATCH 04/55] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
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The Amlogic Meson GX SoCs uses a non-standard argument to the
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PSCI CPU_SUSPEND call to enter system suspend.
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@ -1,7 +1,7 @@
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From f0cd0ee46866bf5c51e5e9ae659bf65a00a52b17 Mon Sep 17 00:00:00 2001
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From a943d0edc42f086d306761830e72203aec47e091 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Thu, 3 Nov 2016 15:29:25 +0100
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Subject: [PATCH 05/51] LOCAL: arm64: dts: meson: add support for GX PM and
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Subject: [PATCH 05/55] LOCAL: arm64: dts: meson: add support for GX PM and
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Virtual RTC
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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@ -1,7 +1,7 @@
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From 11f6cc8d5b113befe40a069fcd3b4d14253440d1 Mon Sep 17 00:00:00 2001
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From c5f0f6858c0b816bdfcb57def52f3a9a22519e59 Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Thu, 21 Jan 2021 01:35:36 +0000
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Subject: [PATCH 06/51] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
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Subject: [PATCH 06/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
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Khadas VIM
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Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
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@ -1,7 +1,7 @@
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From faaef1d48296fd78ad60dc6f8d76a133ed67fb09 Mon Sep 17 00:00:00 2001
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From 3a886a0d0a14b5b6c02c05150cd8bedb0828392a Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Sat, 6 Nov 2021 13:01:08 +0000
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Subject: [PATCH 07/51] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
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Subject: [PATCH 07/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
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Khadas VIM2
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Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
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@ -1,7 +1,7 @@
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From af394a3409915c1d7d022a779476f65cd6876c39 Mon Sep 17 00:00:00 2001
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From 9029e2f01165e924c404eb75339a81528d1de39c Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Mon, 1 Feb 2021 19:27:40 +0000
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Subject: [PATCH 08/51] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
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Subject: [PATCH 08/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
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NEO U9-H
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Add node aliases to prevent meson-vrtc from claiming /dev/rtc0
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@ -1,7 +1,7 @@
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From 6169c8539c94c04523469ca0c9a0618881eb7163 Mon Sep 17 00:00:00 2001
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From d5b5b93b0911f8efe1f31a66eb7b215ba56e4718 Mon Sep 17 00:00:00 2001
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From: Anssi Hannula <anssi.hannula@iki.fi>
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Date: Sun, 17 Apr 2022 04:37:48 +0000
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Subject: [PATCH 09/51] LOCAL: ASoC: meson: assign internal PCM
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Subject: [PATCH 09/55] LOCAL: ASoC: meson: assign internal PCM
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chmap/ELD/IEC958 kctls to device 0
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On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
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@ -1,7 +1,7 @@
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From b38f002a46b824e6da63514b82fe965af1272d44 Mon Sep 17 00:00:00 2001
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From 5f2d4a3a4724ea99fa2cdd43c1442bdc3eaa58c8 Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Thu, 5 Jan 2023 15:16:46 +0000
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Subject: [PATCH 10/51] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
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Subject: [PATCH 10/55] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
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decoding
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The MPEG1/2 decoder is broken and nobody has volunteered to poke
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@ -0,0 +1,365 @@
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From b2963904dee44fd06600e5fa5fce3355650924b7 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Fri, 27 Dec 2024 22:25:12 +0100
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Subject: [PATCH 11/55] FROMGIT(6.15): arm64: dts: amlogic: gx: switch to the
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new PWM controller binding
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Use the new PWM controller binding which now relies on passing all
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clock inputs available on the SoC (instead of passing the "wanted"
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clock input for a given board).
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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.../dts/amlogic/meson-gx-libretech-pc.dtsi | 6 -----
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.../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 --
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arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 +++---
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.../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 2 --
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.../dts/amlogic/meson-gxbb-nexbox-a95x.dts | 2 --
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.../boot/dts/amlogic/meson-gxbb-p20x.dtsi | 2 --
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.../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 2 --
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.../boot/dts/amlogic/meson-gxbb-wetek.dtsi | 2 --
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arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 +++++++++++++++++++
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.../boot/dts/amlogic/meson-gxl-s805x-p241.dts | 2 --
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.../meson-gxl-s905w-jethome-jethub-j80.dts | 2 --
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.../meson-gxl-s905x-hwacom-amazetv.dts | 2 --
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.../amlogic/meson-gxl-s905x-khadas-vim.dts | 2 --
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.../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 2 --
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.../dts/amlogic/meson-gxl-s905x-p212.dtsi | 2 --
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arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 25 +++++++++++++++++++
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.../dts/amlogic/meson-gxm-khadas-vim2.dts | 4 ---
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.../boot/dts/amlogic/meson-gxm-rbox-pro.dts | 2 --
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18 files changed, 54 insertions(+), 40 deletions(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
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index d38c3a224fbe..2da49cfbde77 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
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@@ -345,24 +345,18 @@ rtc: rtc@51 {
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&pwm_AO_ab {
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pinctrl-0 = <&pwm_ao_a_3_pins>;
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pinctrl-names = "default";
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- clocks = <&clkc CLKID_FCLK_DIV4>;
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- clock-names = "clkin0";
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status = "okay";
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};
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&pwm_ab {
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pinctrl-0 = <&pwm_b_pins>;
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pinctrl-names = "default";
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- clocks = <&clkc CLKID_FCLK_DIV4>;
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- clock-names = "clkin0";
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status = "okay";
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};
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&pwm_ef {
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pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
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pinctrl-names = "default";
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- clocks = <&clkc CLKID_FCLK_DIV4>;
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- clock-names = "clkin0";
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status = "okay";
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};
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
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index 45ccddd1aaf0..6da1316d97c6 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
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@@ -240,8 +240,6 @@ &pwm_ef {
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
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- clocks = <&clkc CLKID_FCLK_DIV4>;
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- clock-names = "clkin0";
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};
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&saradc {
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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index b702a7f7bcf5..260628cf218e 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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@@ -333,14 +333,14 @@ i2c_A: i2c@8500 {
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};
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pwm_ab: pwm@8550 {
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- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x08550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
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- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x08650 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -355,7 +355,7 @@ saradc: adc@8680 {
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};
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pwm_ef: pwm@86c0 {
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- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x086c0 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -507,7 +507,7 @@ i2c_AO: i2c@500 {
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};
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pwm_AO_ab: pwm@550 {
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- compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
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+ compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x00550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
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index cf2e2ef81680..2ecc6ebd5a43 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
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@@ -298,8 +298,6 @@ &pwm_ef {
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
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- clocks = <&clkc CLKID_FCLK_DIV4>;
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- clock-names = "clkin0";
|
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};
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&saradc {
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
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index 7d7dde93fff3..c09da40ff7b0 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
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@@ -241,8 +241,6 @@ &pwm_ef {
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status = "okay";
|
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pinctrl-0 = <&pwm_e_pins>;
|
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pinctrl-names = "default";
|
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- clocks = <&clkc CLKID_FCLK_DIV4>;
|
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- clock-names = "clkin0";
|
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};
|
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|
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/* Wireless SDIO Module */
|
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
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index 1736bd2e96e2..6f67364fd63f 100644
|
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
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@@ -150,8 +150,6 @@ &pwm_ef {
|
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status = "okay";
|
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pinctrl-0 = <&pwm_e_pins>;
|
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pinctrl-names = "default";
|
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- clocks = <&clkc CLKID_FCLK_DIV4>;
|
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- clock-names = "clkin0";
|
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};
|
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|
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/* Wireless SDIO Module */
|
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
|
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index 3807a184810b..6ff567225fee 100644
|
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
|
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
|
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@@ -222,8 +222,6 @@ &pwm_ef {
|
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status = "okay";
|
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pinctrl-0 = <&pwm_e_pins>;
|
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pinctrl-names = "default";
|
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- clocks = <&clkc CLKID_FCLK_DIV4>;
|
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- clock-names = "clkin0";
|
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};
|
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|
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&saradc {
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
|
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index deb295227189..bfedfc1472ec 100644
|
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
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@@ -185,8 +185,6 @@ &pwm_ef {
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status = "okay";
|
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pinctrl-0 = <&pwm_e_pins>;
|
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pinctrl-names = "default";
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- clocks = <&clkc CLKID_FCLK_DIV4>;
|
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- clock-names = "clkin0";
|
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};
|
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|
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&saradc {
|
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
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index ed00e67e6923..8ebce7114a60 100644
|
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
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@@ -739,6 +739,31 @@ mux {
|
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};
|
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};
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|
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+&pwm_ab {
|
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+ clocks = <&xtal>,
|
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+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
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+ <&clkc CLKID_FCLK_DIV4>,
|
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+ <&clkc CLKID_FCLK_DIV3>;
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+};
|
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+
|
||||
+&pwm_AO_ab {
|
||||
+ clocks = <&xtal>, <&clkc CLKID_CLK81>;
|
||||
+};
|
||||
+
|
||||
+&pwm_cd {
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
+};
|
||||
+
|
||||
&pwrc {
|
||||
resets = <&reset RESET_VIU>,
|
||||
<&reset RESET_VENC>,
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
|
||||
index c5e2306ad7a4..ca7c4e8e7cac 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
|
||||
@@ -280,8 +280,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* This is connected to the Bluetooth module: */
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
|
||||
index 2b94b6e5285e..4ca90ac947b7 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
|
||||
@@ -116,8 +116,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
|
||||
index 89fe5110f7a2..62a2da766a00 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
|
||||
@@ -115,8 +115,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* SD card */
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
|
||||
index 0741d34945bb..e137ebd48c5e 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
|
||||
@@ -213,8 +213,6 @@ &pwm_AO_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal> , <&xtal>;
|
||||
- clock-names = "clkin0", "clkin1" ;
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
|
||||
index c79f9f2099bf..236cedec9f19 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
|
||||
@@ -145,8 +145,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* Wireless SDIO Module */
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
index b52a830efcce..05a0d4de3ad7 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
@@ -101,8 +101,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
index f58d1790de1c..2dc2fdaecf9f 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
@@ -809,6 +809,31 @@ internal_phy: ethernet-phy@8 {
|
||||
};
|
||||
};
|
||||
|
||||
+&pwm_ab {
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
+};
|
||||
+
|
||||
+&pwm_AO_ab {
|
||||
+ clocks = <&xtal>, <&clkc CLKID_CLK81>;
|
||||
+};
|
||||
+
|
||||
+&pwm_cd {
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
+};
|
||||
+
|
||||
&pwrc {
|
||||
resets = <&reset RESET_VIU>,
|
||||
<&reset RESET_VENC>,
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
|
||||
index 544c757f8bb7..8a89940869b0 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
|
||||
@@ -291,16 +291,12 @@ &pwm_AO_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
|
||||
index 7356d3b628b1..ecaf678b23dd 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
|
||||
@@ -192,8 +192,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* Wireless SDIO Module */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,76 @@
|
||||
From 4d8253e3d57b93822f641032c17b1aab8d7c7e8b Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Fri, 27 Dec 2024 22:25:13 +0100
|
||||
Subject: [PATCH 12/55] FROMGIT(6.15): arm64: dts: amlogic: axg: switch to the
|
||||
new PWM controller binding
|
||||
|
||||
Use the new PWM controller binding which now relies on passing all
|
||||
clock inputs available on the SoC (instead of passing the "wanted"
|
||||
clock input for a given board).
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 24 ++++++++++++++++++----
|
||||
1 file changed, 20 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
|
||||
index e9b22868983d..a6924d246bb1 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
|
||||
@@ -1693,8 +1693,12 @@ sec_AO: ao-secure@140 {
|
||||
};
|
||||
|
||||
pwm_AO_cd: pwm@2000 {
|
||||
- compatible = "amlogic,meson-axg-ao-pwm";
|
||||
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x02000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <&clkc_AO CLKID_AO_CLK81>,
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV5>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1728,8 +1732,12 @@ i2c_AO: i2c@5000 {
|
||||
};
|
||||
|
||||
pwm_AO_ab: pwm@7000 {
|
||||
- compatible = "amlogic,meson-axg-ao-pwm";
|
||||
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x07000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <&clkc_AO CLKID_AO_CLK81>,
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV5>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1806,15 +1814,23 @@ watchdog@f0d0 {
|
||||
};
|
||||
|
||||
pwm_ab: pwm@1b000 {
|
||||
- compatible = "amlogic,meson-axg-ee-pwm";
|
||||
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x1b000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <&clkc CLKID_FCLK_DIV5>,
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_cd: pwm@1a000 {
|
||||
- compatible = "amlogic,meson-axg-ee-pwm";
|
||||
+ compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x1a000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <&clkc CLKID_FCLK_DIV5>,
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,499 @@
|
||||
From 46257346eb613ee141712a6ed6ddf97efd249832 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Fri, 27 Dec 2024 22:25:14 +0100
|
||||
Subject: [PATCH 13/55] FROMGIT(6.15): arm64: dts: amlogic: g12: switch to the
|
||||
new PWM controller binding
|
||||
|
||||
Use the new PWM controller binding which now relies on passing all
|
||||
clock inputs available on the SoC (instead of passing the "wanted"
|
||||
clock input for a given board).
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-g12-common.dtsi | 33 ++++++++++++++++---
|
||||
.../boot/dts/amlogic/meson-g12a-fbx8am.dts | 4 ---
|
||||
.../dts/amlogic/meson-g12a-radxa-zero.dts | 4 ---
|
||||
.../boot/dts/amlogic/meson-g12a-sei510.dts | 4 ---
|
||||
.../boot/dts/amlogic/meson-g12a-u200.dts | 2 --
|
||||
.../boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ---
|
||||
.../amlogic/meson-g12b-a311d-libretech-cc.dts | 2 --
|
||||
.../dts/amlogic/meson-g12b-bananapi-cm4.dtsi | 4 ---
|
||||
.../boot/dts/amlogic/meson-g12b-bananapi.dtsi | 4 ---
|
||||
.../dts/amlogic/meson-g12b-khadas-vim3.dtsi | 4 ---
|
||||
.../boot/dts/amlogic/meson-g12b-odroid.dtsi | 4 ---
|
||||
.../dts/amlogic/meson-g12b-radxa-zero2.dts | 8 -----
|
||||
.../boot/dts/amlogic/meson-g12b-w400.dtsi | 6 ----
|
||||
.../amlogic/meson-libretech-cottonwood.dtsi | 6 ----
|
||||
.../boot/dts/amlogic/meson-sm1-ac2xx.dtsi | 6 ----
|
||||
.../boot/dts/amlogic/meson-sm1-bananapi.dtsi | 2 --
|
||||
.../dts/amlogic/meson-sm1-khadas-vim3l.dts | 2 --
|
||||
.../boot/dts/amlogic/meson-sm1-odroid.dtsi | 2 --
|
||||
.../boot/dts/amlogic/meson-sm1-sei610.dts | 6 ----
|
||||
19 files changed, 28 insertions(+), 79 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index 2a7f91b2a7cb..9b6593555912 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -2060,8 +2060,11 @@ cecb_AO: cec@280 {
|
||||
};
|
||||
|
||||
pwm_AO_cd: pwm@2000 {
|
||||
- compatible = "amlogic,meson-g12a-ao-pwm-cd";
|
||||
+ compatible = "amlogic,meson-g12-pwm-v2",
|
||||
+ "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x2000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <&clkc_AO CLKID_AO_CLK81>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -2099,8 +2102,13 @@ i2c_AO: i2c@5000 {
|
||||
};
|
||||
|
||||
pwm_AO_ab: pwm@7000 {
|
||||
- compatible = "amlogic,meson-g12a-ao-pwm-ab";
|
||||
+ compatible = "amlogic,meson-g12-pwm-v2",
|
||||
+ "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x7000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <&clkc_AO CLKID_AO_CLK81>,
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV5>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -2301,22 +2309,37 @@ spifc: spi@14000 {
|
||||
};
|
||||
|
||||
pwm_ef: pwm@19000 {
|
||||
- compatible = "amlogic,meson-g12a-ee-pwm";
|
||||
+ compatible = "amlogic,meson-g12-pwm-v2",
|
||||
+ "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x19000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_cd: pwm@1a000 {
|
||||
- compatible = "amlogic,meson-g12a-ee-pwm";
|
||||
+ compatible = "amlogic,meson-g12-pwm-v2",
|
||||
+ "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x1a000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_ab: pwm@1b000 {
|
||||
- compatible = "amlogic,meson-g12a-ee-pwm";
|
||||
+ compatible = "amlogic,meson-g12-pwm-v2",
|
||||
+ "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x1b000 0x0 0x20>;
|
||||
+ clocks = <&xtal>,
|
||||
+ <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <&clkc CLKID_FCLK_DIV4>,
|
||||
+ <&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
|
||||
index a457b3f4397b..9aa36f17ffa2 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
|
||||
@@ -346,8 +346,6 @@ &ir {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -355,8 +353,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pdm {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
|
||||
index c779a5da7d1e..952b8d02e5c2 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
|
||||
@@ -284,8 +284,6 @@ &ir {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -293,8 +291,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
|
||||
index ea51341f031b..52fbc5103e45 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
|
||||
@@ -389,8 +389,6 @@ &ir {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -398,8 +396,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pdm {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index f70a46967e2b..5407049d2647 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -502,8 +502,6 @@ &i2c3 {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
|
||||
index 32f98a192494..01da83658ae3 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
|
||||
@@ -328,8 +328,6 @@ &ir {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -363,8 +361,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&uart_A {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
|
||||
index 65b963d794cd..adedc1340c78 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
|
||||
@@ -116,6 +116,4 @@ &cpu103 {
|
||||
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
|
||||
- clocks = <&xtal>, <&xtal>;
|
||||
- clock-names = "clkin0", "clkin1";
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
|
||||
index 08c33ec7e9f1..92e8b26ecccc 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
|
||||
@@ -257,8 +257,6 @@ &pcie {
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
@@ -273,8 +271,6 @@ &pwm_ef {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
|
||||
index d4e1990b5f26..54663c55a20e 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
|
||||
@@ -367,8 +367,6 @@ &pwm_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
@@ -380,8 +378,6 @@ &pwm_ef {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
|
||||
index 16dd409051b4..48650bad230d 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
|
||||
@@ -92,16 +92,12 @@ &cpu103 {
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
|
||||
index 09d959aefb18..7e8964bacfce 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
|
||||
@@ -327,16 +327,12 @@ hdmi_tx_tmds_out: endpoint {
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
|
||||
index 39feba7f2d08..fc05ecf90714 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
|
||||
@@ -379,32 +379,24 @@ &ir {
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_ab {
|
||||
pinctrl-0 = <&pwm_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
|
||||
index 4cb6930ffb19..a7a0fc264cdc 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
|
||||
@@ -304,24 +304,18 @@ &ir {
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
|
||||
index 929e4720ae76..ac9c4c2673b1 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
|
||||
@@ -458,24 +458,18 @@ &pwm_AO_cd {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&pwm_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_b_x7_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&pwm_cd {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_d_x3_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
|
||||
index d1fa8b8bf795..a3463149db3d 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
|
||||
@@ -199,15 +199,11 @@ &pwm_AO_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -215,8 +211,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
|
||||
index 81dce862902a..40db95f64636 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
|
||||
@@ -367,8 +367,6 @@ &ir {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
|
||||
index 9c0b544e2209..5d75ad3f3e46 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
|
||||
@@ -78,8 +78,6 @@ &cpu3 {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
|
||||
index 7b0e9817a615..ad8d07883760 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
|
||||
@@ -392,8 +392,6 @@ &ir {
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
|
||||
index 2e3397e55da2..37d7f64b6d5d 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
|
||||
@@ -435,15 +435,11 @@ &pwm_AO_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -451,8 +447,6 @@ &pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
- clocks = <&xtal>;
|
||||
- clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,82 @@
|
||||
From bc7b1c3119fd74f4898d547849dffdfefccbcc06 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sun, 20 Apr 2025 18:48:00 +0200
|
||||
Subject: [PATCH 14/55] FROMGIT(6.15): arm64: dts: amlogic: gx: fix reference
|
||||
to unknown/untested PWM clock
|
||||
|
||||
Device-tree expects absent clocks to be specified as <0> (instead of
|
||||
using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
|
||||
seen at their correct index (while before they were recognized, but at
|
||||
the correct index - resulting in the hardware using a different clock
|
||||
than what the kernel sees).
|
||||
|
||||
Fixes: a526eeef9a81 ("arm64: dts: amlogic: gx: switch to the new PWM controller binding")
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++---
|
||||
2 files changed, 6 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
index 8ebce7114a60..6c134592c7bb 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
@@ -741,7 +741,7 @@ mux {
|
||||
|
||||
&pwm_ab {
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
@@ -752,14 +752,14 @@ &pwm_AO_ab {
|
||||
|
||||
&pwm_cd {
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
index 2dc2fdaecf9f..19b8a39de6a0 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
@@ -811,7 +811,7 @@ internal_phy: ethernet-phy@8 {
|
||||
|
||||
&pwm_ab {
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
@@ -822,14 +822,14 @@ &pwm_AO_ab {
|
||||
|
||||
&pwm_cd {
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,52 @@
|
||||
From d9207b2496fb9ddbcf0b874af6920bcf2371752b Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sun, 20 Apr 2025 18:48:01 +0200
|
||||
Subject: [PATCH 15/55] FROMGIT(6.15): arm64: dts: amlogic: g12: fix reference
|
||||
to unknown/untested PWM clock
|
||||
|
||||
Device-tree expects absent clocks to be specified as <0> (instead of
|
||||
using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
|
||||
seen at their correct index (while before they were recognized, but at
|
||||
the correct index - resulting in the hardware using a different clock
|
||||
than what the kernel sees).
|
||||
|
||||
Fixes: e6884f2e4129 ("arm64: dts: amlogic: g12: switch to the new PWM controller binding")
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index 9b6593555912..4b75b4d07901 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -2313,7 +2313,7 @@ pwm_ef: pwm@19000 {
|
||||
"amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x19000 0x0 0x20>;
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
@@ -2325,7 +2325,7 @@ pwm_cd: pwm@1a000 {
|
||||
"amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x1a000 0x0 0x20>;
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
@@ -2337,7 +2337,7 @@ pwm_ab: pwm@1b000 {
|
||||
"amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x1b000 0x0 0x20>;
|
||||
clocks = <&xtal>,
|
||||
- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
#pwm-cells = <3>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,34 @@
|
||||
From f7410af04d5d6099a99a033136688328699c7c75 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 30 Apr 2025 11:51:27 +0000
|
||||
Subject: [PATCH 16/55] FROMGIT(6.15): arm64: dts: amlogic: dreambox: fix
|
||||
missing clkc_audio node
|
||||
|
||||
Add the clkc_audio node to fix audio support on Dreambox One/Two.
|
||||
|
||||
Fixes: 83a6f4c62cb1 ("arm64: dts: meson: add initial support for Dreambox One/Two")
|
||||
CC: <stable@vger.kernel.org>
|
||||
Suggested-by: Emanuel Strobel <emanuel.strobel@yahoo.com>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
|
||||
index de35fa2d7a6d..8e3e3354ed67 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
|
||||
@@ -116,6 +116,10 @@ &arb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&frddr_a {
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 3eca81d6c8551f3f4ed83e6943ccc86fe1b0130e Mon Sep 17 00:00:00 2001
|
||||
From a36ed75aaa253ce71bb995407f28d74548728b50 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 19:58:51 +0100
|
||||
Subject: [PATCH 11/51] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
|
||||
Subject: [PATCH 17/55] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
|
||||
RX and TX pull up by default
|
||||
|
||||
Some boards have noise on the UART RX line when the UART pins are not
|
||||
@ -17,7 +17,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
index ed00e67e6923..e45f629bd71a 100644
|
||||
index 6c134592c7bb..f69923da07fe 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
@@ -105,7 +105,7 @@ uart_ao_a_pins: uart_ao_a {
|
@ -1,7 +1,7 @@
|
||||
From f0e1b70a0267605a1dd9f22c9ff7cf59bb837d67 Mon Sep 17 00:00:00 2001
|
||||
From dcec0de116607bba150c5d0721f0d711d9cba2f6 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 19:58:52 +0100
|
||||
Subject: [PATCH 12/51] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
|
||||
Subject: [PATCH 18/55] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
|
||||
and TX pull up by default
|
||||
|
||||
Some boards have noise on the UART RX line when the UART pins are not
|
||||
@ -17,7 +17,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
1 file changed, 6 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
index f58d1790de1c..d4497dc7d76b 100644
|
||||
index 19b8a39de6a0..bc52b9e954b4 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
@@ -163,7 +163,7 @@ uart_ao_a_pins: uart_ao_a {
|
@ -1,44 +0,0 @@
|
||||
From 2bb51b4f2f12406ee3145127c77523c2602b7ba1 Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Fri, 24 May 2024 15:17:37 +0000
|
||||
Subject: [PATCH 18/51] FROMLIST(v2): net: mdio: mux-meson-gxl: set 28th bit in
|
||||
eth_reg2
|
||||
|
||||
This bit is necessary to enable packets on the interface. Without this
|
||||
bit set, ethernet behaves as if it is working, but no activity occurs.
|
||||
|
||||
The vendor SDK sets this bit along with the PHY_ID bits. U-boot also
|
||||
sets this bit, but if u-boot is not compiled with networking support
|
||||
the interface will not work.
|
||||
|
||||
Fixes: 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support");
|
||||
Signed-off-by: Da Xue <da@libre.computer>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/net/mdio/mdio-mux-meson-gxl.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c
|
||||
index 00c66240136b..fc5883387718 100644
|
||||
--- a/drivers/net/mdio/mdio-mux-meson-gxl.c
|
||||
+++ b/drivers/net/mdio/mdio-mux-meson-gxl.c
|
||||
@@ -17,6 +17,7 @@
|
||||
#define REG2_LEDACT GENMASK(23, 22)
|
||||
#define REG2_LEDLINK GENMASK(25, 24)
|
||||
#define REG2_DIV4SEL BIT(27)
|
||||
+#define REG2_RESERVED_28 BIT(28)
|
||||
#define REG2_ADCBYPASS BIT(30)
|
||||
#define REG2_CLKINSEL BIT(31)
|
||||
#define ETH_REG3 0x4
|
||||
@@ -65,7 +66,7 @@ static void gxl_enable_internal_mdio(struct gxl_mdio_mux *priv)
|
||||
* The only constraint is that it must match the one in
|
||||
* drivers/net/phy/meson-gxl.c to properly match the PHY.
|
||||
*/
|
||||
- writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
|
||||
+ writel(REG2_RESERVED_28 | FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
|
||||
priv->regs + ETH_REG2);
|
||||
|
||||
/* Enable the internal phy */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 1f4b636dc055b01d41fd3510a0374b2cdb9ed40c Mon Sep 17 00:00:00 2001
|
||||
From 4273cc49bc0f790016c96d7fb17ddcf7275f5ac5 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 19:58:53 +0100
|
||||
Subject: [PATCH 13/51] FROMGIT(6.16): arm64: dts: amlogic: g12: enable UART RX
|
||||
Subject: [PATCH 19/55] FROMGIT(6.16): arm64: dts: amlogic: g12: enable UART RX
|
||||
and TX pull up by default
|
||||
|
||||
Some boards have noise on the UART RX line when the UART pins are not
|
||||
@ -17,7 +17,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index 2a7f91b2a7cb..5a54076375fc 100644
|
||||
index 4b75b4d07901..0b6f13f8911b 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -1503,7 +1503,7 @@ mux {
|
@ -1,7 +1,7 @@
|
||||
From 27768c0407ff0215c11d484b7ab05feabde7a7b8 Mon Sep 17 00:00:00 2001
|
||||
From bee8914209cb91e57f650bf8b74c915e7b7dc1c9 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 20:01:32 +0100
|
||||
Subject: [PATCH 14/51] FROMGIT(6.16): pinctrl: meson: define the pull up/down
|
||||
Subject: [PATCH 20/55] FROMGIT(6.16): pinctrl: meson: define the pull up/down
|
||||
resistor value as 60 kOhm
|
||||
|
||||
The public datasheets of the following Amlogic SoCs describe a typical
|
@ -1,7 +1,7 @@
|
||||
From 1cab497fa17c6ed946a166bb99ccbd7676826c2e Mon Sep 17 00:00:00 2001
|
||||
From eb2fe5d0c75ebe02ccdfab1c17697ef02b24da8f Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Tue, 31 Dec 2024 20:42:06 +0100
|
||||
Subject: [PATCH 15/51] FROMGIT(6.16): dt-bindings: iio: adc:
|
||||
Subject: [PATCH 21/55] FROMGIT(6.16): dt-bindings: iio: adc:
|
||||
amlogic,meson-saradc: Add GXLX SoC compatible
|
||||
|
||||
Add a compatible string for the GXLX SoC. It's very similar to GXL but
|
@ -1,7 +1,7 @@
|
||||
From 0cbeda74d6d647f313b00e6bfd423de76805f747 Mon Sep 17 00:00:00 2001
|
||||
From 9e477da82afb28e19343ea8f27c5cbe8dd011b53 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 23 Mar 2024 20:44:41 +0100
|
||||
Subject: [PATCH 16/51] FROMGIT(6.16): iio: adc: meson: add support for the
|
||||
Subject: [PATCH 22/55] FROMGIT(6.16): iio: adc: meson: add support for the
|
||||
GXLX SoC
|
||||
|
||||
The SARADC IP on the GXLX SoC itself is identical to the one found on
|
@ -1,7 +1,7 @@
|
||||
From 96bda6fd0ab17afd599d8b823292c3587dc072a5 Mon Sep 17 00:00:00 2001
|
||||
From 29f555feca8c3107a5731b3ee1aaa3139bcedc41 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 1 Jan 2025 07:16:49 +0000
|
||||
Subject: [PATCH 17/51] FROMGIT(6.16): arm64: dts: amlogic: gxlx-s905l-p271:
|
||||
Subject: [PATCH 23/55] FROMGIT(6.16): arm64: dts: amlogic: gxlx-s905l-p271:
|
||||
add saradc compatible
|
||||
|
||||
Add the saradac node using the meson-gxlx-saradc compatible to ensure
|
@ -0,0 +1,68 @@
|
||||
From 44b80f870a2ec32f321d6b690bddd546174e1b28 Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Fri, 25 Apr 2025 16:31:18 -0400
|
||||
Subject: [PATCH 24/55] FROMGIT(6.16): arm64: dts: amlogic: gxl: set i2c bias
|
||||
to pull-up
|
||||
|
||||
GXL I2C pins need internal pull-up enabled to operate if there
|
||||
is no external resistor. The pull-up is 60kohms per the datasheet.
|
||||
|
||||
We should set the bias when i2c pinmux is enabled.
|
||||
|
||||
Signed-off-by: Da Xue <da@libre.computer>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 10 +++++-----
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
index bc52b9e954b4..ba535010a3c9 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
@@ -214,7 +214,7 @@ mux {
|
||||
groups = "i2c_sck_ao",
|
||||
"i2c_sda_ao";
|
||||
function = "i2c_ao";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -576,7 +576,7 @@ mux {
|
||||
groups = "i2c_sck_a",
|
||||
"i2c_sda_a";
|
||||
function = "i2c_a";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -585,7 +585,7 @@ mux {
|
||||
groups = "i2c_sck_b",
|
||||
"i2c_sda_b";
|
||||
function = "i2c_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -594,7 +594,7 @@ mux {
|
||||
groups = "i2c_sck_c",
|
||||
"i2c_sda_c";
|
||||
function = "i2c_c";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -603,7 +603,7 @@ mux {
|
||||
groups = "i2c_sck_c_dv19",
|
||||
"i2c_sda_c_dv18";
|
||||
function = "i2c_c";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 26b3645eb68d787fdea261e2c7f5eade2e0d0b8f Mon Sep 17 00:00:00 2001
|
||||
From fd634276727deab9f2a8a3cc2132049c3568de0c Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 19 Apr 2025 23:34:48 +0200
|
||||
Subject: [PATCH 34/51] FROMLIST(v1): ASoC: meson: meson-card-utils: use
|
||||
Subject: [PATCH 25/55] FROMGIT(6.16): ASoC: meson: meson-card-utils: use
|
||||
of_property_present() for DT parsing
|
||||
|
||||
Commit c141ecc3cecd ("of: Warn when of_property_read_bool() is used on
|
@ -1,7 +1,7 @@
|
||||
From ac0c47e3468d631992aaeb949a85667eb67b6191 Mon Sep 17 00:00:00 2001
|
||||
From ded1e14e10fbc0318a75fc496df3eaab23aa9e2b Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Wed, 9 Apr 2025 23:44:22 +0200
|
||||
Subject: [PATCH 33/51] FROMLIST(v1): drm/meson: fix resource cleanup in
|
||||
Subject: [PATCH 26/55] FROMLIST(v1): drm/meson: fix resource cleanup in
|
||||
meson_drv_bind_master() on error
|
||||
|
||||
meson_drv_bind_master() does not free resources in the order they are
|
||||
@ -56,7 +56,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
1 file changed, 17 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
|
||||
index 81d2ee37e773..031686fd4104 100644
|
||||
index 49ff9f1f16d3..ea5bda297a74 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_drv.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_drv.c
|
||||
@@ -314,35 +314,35 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
|
@ -1,7 +1,7 @@
|
||||
From f34935b97e04a2d7493e65734d90fc1e3ee5cc4b Mon Sep 17 00:00:00 2001
|
||||
From b955dfd9549480c8e7e76726fadf9078b8882cbc Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 20:07:11 +0100
|
||||
Subject: [PATCH 19/51] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use
|
||||
Subject: [PATCH 27/55] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use
|
||||
FIELD_PREP instead of _SHIFT macros
|
||||
|
||||
This simplifies the code by re-using the FIELD_PREP helper. No
|
@ -1,7 +1,7 @@
|
||||
From df3e619072dae02707312b265d64f82ac9adc7b2 Mon Sep 17 00:00:00 2001
|
||||
From 0c06d5b06e3aa54f5b3d90e2b060c85c3c671655 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 20:07:12 +0100
|
||||
Subject: [PATCH 20/51] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use the
|
||||
Subject: [PATCH 28/55] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use the
|
||||
regmap_{clear,set}_bits helpers
|
||||
|
||||
These require less code, reduce the chance of typos and overall make the
|
@ -1,7 +1,7 @@
|
||||
From 6d3b1774ee807a5240f72d2c87febe0c65c317ad Mon Sep 17 00:00:00 2001
|
||||
From 13d3f57d955e74323bb2ec16e4b78e0f722d6044 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
|
||||
Date: Sun, 20 Feb 2022 08:23:12 +0000
|
||||
Subject: [PATCH 21/51] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
|
||||
Subject: [PATCH 29/55] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
|
||||
Micro Electronics
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
@ -1,7 +1,7 @@
|
||||
From 8cdf6ddcdc863c058f7d2f2b772406c8cda9bb7c Mon Sep 17 00:00:00 2001
|
||||
From 3fe5dc3d0402e5dd3e24ee7e68f51a89cba18478 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sun, 20 Feb 2022 08:24:47 +0000
|
||||
Subject: [PATCH 22/51] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
|
||||
Subject: [PATCH 30/55] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
|
||||
Electronics TM1628
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
@ -1,7 +1,7 @@
|
||||
From 6484382755ef7a31a5cf7e8e2e02cbe3ab9852a4 Mon Sep 17 00:00:00 2001
|
||||
From 632f5d3157fb5db48de377adb8019f1937533e00 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sun, 20 Feb 2022 08:26:27 +0000
|
||||
Subject: [PATCH 23/51] FROMLIST(v5): docs: ABI: document tm1628 attribute
|
||||
Subject: [PATCH 31/55] FROMLIST(v5): docs: ABI: document tm1628 attribute
|
||||
display-text
|
||||
|
||||
Document the attribute for reading / writing the text to be displayed on
|
@ -1,7 +1,7 @@
|
||||
From 434a2f57588a7051e4c68046be339f7d3770e3d4 Mon Sep 17 00:00:00 2001
|
||||
From 146b3fb7cea3270fba30151d9b126818a69c9851 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:51:20 +0000
|
||||
Subject: [PATCH 24/51] FROMLIST(v5): auxdisplay: add support for Titanmec
|
||||
Subject: [PATCH 32/55] FROMLIST(v5): auxdisplay: add support for Titanmec
|
||||
TM1628 7 segment display controller
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
@ -1,7 +1,7 @@
|
||||
From 6f0afab88e64f7af3a3e07c2dc78f04920bab8b7 Mon Sep 17 00:00:00 2001
|
||||
From 2d8366ff3590284424babd86ae83545ca028216c Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:52:34 +0000
|
||||
Subject: [PATCH 25/51] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
|
||||
Subject: [PATCH 33/55] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
|
||||
support for the 7 segment display
|
||||
|
||||
This patch adds support for the 7 segment display of the device.
|
@ -1,7 +1,7 @@
|
||||
From 261f695262ad45848fd464b411410aba8d2ca44e Mon Sep 17 00:00:00 2001
|
||||
From c3fe742e133aab3173ed166c1007aec9910bf16c Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:53:32 +0000
|
||||
Subject: [PATCH 26/51] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
|
||||
Subject: [PATCH 34/55] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
|
||||
auxdisplay driver
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
@ -1,51 +0,0 @@
|
||||
From cea22ff6abfc0d053eba4fe6eecb39060451c2c9 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 4 Jan 2025 23:45:46 +0000
|
||||
Subject: [PATCH 35/51] FROMLIST(v1): Revert "drm/meson: vclk: fix calculation
|
||||
of 59.94 fractional rates"
|
||||
|
||||
This reverts commit bfbc68e4d8695497f858a45a142665e22a512ea3.
|
||||
|
||||
The patch does permit the offending YUV420 @ 59.94 phy_freq and
|
||||
vclk_freq mode to match in calculations. It also results in all
|
||||
fractional rates being unavailable for use. This was unintended
|
||||
and requires the patch to be reverted.
|
||||
|
||||
Cc: <stable@vger.kernel.org>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_vclk.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index 2a942dc6a6dc..2a82119eb58e 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
FREQ_1000_1001(params[i].pixel_freq));
|
||||
DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
|
||||
i, params[i].phy_freq,
|
||||
- FREQ_1000_1001(params[i].phy_freq/1000)*1000);
|
||||
+ FREQ_1000_1001(params[i].phy_freq/10)*10);
|
||||
/* Match strict frequency */
|
||||
if (phy_freq == params[i].phy_freq &&
|
||||
vclk_freq == params[i].vclk_freq)
|
||||
return MODE_OK;
|
||||
/* Match 1000/1001 variant */
|
||||
- if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/1000)*1000) &&
|
||||
+ if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
|
||||
vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
|
||||
return MODE_OK;
|
||||
}
|
||||
@@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
||||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/1000)*1000) &&
|
||||
+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
(vclk_freq == params[freq].vclk_freq ||
|
||||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
if (vclk_freq != params[freq].vclk_freq)
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 753ad3063981d401a92388a143d22369775cdc0f Mon Sep 17 00:00:00 2001
|
||||
From d724db741128f511f3e867fac6ecde99e96b418e Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 7 Feb 2025 04:29:08 +0000
|
||||
Subject: [PATCH 27/51] FROMLIST(v2): media: si2168: increase cmd execution
|
||||
Subject: [PATCH 35/55] FROMLIST(v2): media: si2168: increase cmd execution
|
||||
timeout value
|
||||
|
||||
Testing with a MyGica T230C v2 USB device (0572:c68a) shows occasional
|
@ -1,7 +1,7 @@
|
||||
From dc7b5f9513efe9a081126d82f9681ed94d195523 Mon Sep 17 00:00:00 2001
|
||||
From 5caea62d534d293badcc1da5c0946b5d9cf0ed3f Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Mon, 22 Nov 2021 09:15:21 +0000
|
||||
Subject: [PATCH 28/51] FROMLIST(v1): media: meson: vdec: esparser: check
|
||||
Subject: [PATCH 36/55] FROMLIST(v1): media: meson: vdec: esparser: check
|
||||
parsing state with hardware write pointer
|
||||
|
||||
Also check the hardware write pointer to check if ES Parser has stalled.
|
@ -1,603 +0,0 @@
|
||||
From 8498067827a5ad84f3a716aa02fc30fee1d2b5f0 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 5 Apr 2025 04:13:19 +0000
|
||||
Subject: [PATCH 36/51] WIP: drm/meson: use unsigned long long for frequency
|
||||
types
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_drv.c | 2 +-
|
||||
drivers/gpu/drm/meson/meson_drv.h | 2 +-
|
||||
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 29 +--
|
||||
drivers/gpu/drm/meson/meson_vclk.c | 195 +++++++++++----------
|
||||
drivers/gpu/drm/meson/meson_vclk.h | 13 +-
|
||||
5 files changed, 126 insertions(+), 115 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
|
||||
index 031686fd4104..ea5bda297a74 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_drv.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_drv.c
|
||||
@@ -169,7 +169,7 @@ static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
|
||||
/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
|
||||
{
|
||||
.limits = {
|
||||
- .max_hdmi_phy_freq = 1650000,
|
||||
+ .max_hdmi_phy_freq = 1650000000,
|
||||
},
|
||||
.attrs = (const struct soc_device_attribute []) {
|
||||
{ .soc_id = "GXL (S805*)", },
|
||||
diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
|
||||
index 3f9345c14f31..be4b0e4df6e1 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_drv.h
|
||||
+++ b/drivers/gpu/drm/meson/meson_drv.h
|
||||
@@ -37,7 +37,7 @@ struct meson_drm_match_data {
|
||||
};
|
||||
|
||||
struct meson_drm_soc_limits {
|
||||
- unsigned int max_hdmi_phy_freq;
|
||||
+ unsigned long long max_hdmi_phy_freq;
|
||||
};
|
||||
|
||||
struct meson_drm {
|
||||
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
index 0593a1cde906..ce8cea5d3a56 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
{
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int hdmi_freq;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long hdmi_freq;
|
||||
|
||||
- vclk_freq = mode->clock;
|
||||
+ vclk_freq = mode->clock * 1000;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
|
||||
@@ -107,7 +107,8 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
- dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
|
||||
+ dev_dbg(priv->dev,
|
||||
+ "vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
|
||||
phy_freq, vclk_freq, venc_freq, hdmi_freq,
|
||||
priv->venc.hdmi_use_enci);
|
||||
|
||||
@@ -122,10 +123,11 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int hdmi_freq;
|
||||
+ unsigned long long clock = mode->clock * 1000;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long hdmi_freq;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
enum drm_mode_status status;
|
||||
|
||||
@@ -144,12 +146,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
- return meson_vclk_dmt_supported_freq(priv, mode->clock);
|
||||
+ return meson_vclk_dmt_supported_freq(priv, clock);
|
||||
/* Check against supported VIC modes */
|
||||
} else if (!meson_venc_hdmi_supported_vic(vic))
|
||||
return MODE_BAD;
|
||||
|
||||
- vclk_freq = mode->clock;
|
||||
+ vclk_freq = clock;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (drm_mode_is_420_only(display_info, mode) ||
|
||||
@@ -179,7 +181,8 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
- dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
|
||||
+ dev_dbg(priv->dev,
|
||||
+ "%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n",
|
||||
__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
|
||||
|
||||
return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index 2a82119eb58e..3325580d885d 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -110,7 +110,10 @@
|
||||
#define HDMI_PLL_LOCK BIT(31)
|
||||
#define HDMI_PLL_LOCK_G12A (3 << 30)
|
||||
|
||||
-#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001)
|
||||
+#define PIXEL_FREQ_1000_1001(_freq) \
|
||||
+ DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
|
||||
+#define PHY_FREQ_1000_1001(_freq) \
|
||||
+ (PIXEL_FREQ_1000_1001(DIV_ROUND_DOWN_ULL(_freq, 10ULL)) * 10)
|
||||
|
||||
/* VID PLL Dividers */
|
||||
enum {
|
||||
@@ -360,11 +363,11 @@ enum {
|
||||
};
|
||||
|
||||
struct meson_vclk_params {
|
||||
- unsigned int pll_freq;
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int pixel_freq;
|
||||
+ unsigned long long pll_freq;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long pixel_freq;
|
||||
unsigned int pll_od1;
|
||||
unsigned int pll_od2;
|
||||
unsigned int pll_od3;
|
||||
@@ -372,11 +375,11 @@ struct meson_vclk_params {
|
||||
unsigned int vclk_div;
|
||||
} params[] = {
|
||||
[MESON_VCLK_HDMI_ENCI_54000] = {
|
||||
- .pll_freq = 4320000,
|
||||
- .phy_freq = 270000,
|
||||
- .vclk_freq = 54000,
|
||||
- .venc_freq = 54000,
|
||||
- .pixel_freq = 54000,
|
||||
+ .pll_freq = 4320000000,
|
||||
+ .phy_freq = 270000000,
|
||||
+ .vclk_freq = 54000000,
|
||||
+ .venc_freq = 54000000,
|
||||
+ .pixel_freq = 54000000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 4,
|
||||
.pll_od3 = 1,
|
||||
@@ -384,11 +387,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_DDR_54000] = {
|
||||
- .pll_freq = 4320000,
|
||||
- .phy_freq = 270000,
|
||||
- .vclk_freq = 54000,
|
||||
- .venc_freq = 54000,
|
||||
- .pixel_freq = 27000,
|
||||
+ .pll_freq = 4320000000,
|
||||
+ .phy_freq = 270000000,
|
||||
+ .vclk_freq = 54000000,
|
||||
+ .venc_freq = 54000000,
|
||||
+ .pixel_freq = 27000000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 4,
|
||||
.pll_od3 = 1,
|
||||
@@ -396,11 +399,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_DDR_148500] = {
|
||||
- .pll_freq = 2970000,
|
||||
- .phy_freq = 742500,
|
||||
- .vclk_freq = 148500,
|
||||
- .venc_freq = 148500,
|
||||
- .pixel_freq = 74250,
|
||||
+ .pll_freq = 2970000000,
|
||||
+ .phy_freq = 742500000,
|
||||
+ .vclk_freq = 148500000,
|
||||
+ .venc_freq = 148500000,
|
||||
+ .pixel_freq = 74250000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -408,11 +411,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_74250] = {
|
||||
- .pll_freq = 2970000,
|
||||
- .phy_freq = 742500,
|
||||
- .vclk_freq = 74250,
|
||||
- .venc_freq = 74250,
|
||||
- .pixel_freq = 74250,
|
||||
+ .pll_freq = 2970000000,
|
||||
+ .phy_freq = 742500000,
|
||||
+ .vclk_freq = 74250000,
|
||||
+ .venc_freq = 74250000,
|
||||
+ .pixel_freq = 74250000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 2,
|
||||
.pll_od3 = 2,
|
||||
@@ -420,11 +423,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_148500] = {
|
||||
- .pll_freq = 2970000,
|
||||
- .phy_freq = 1485000,
|
||||
- .vclk_freq = 148500,
|
||||
- .venc_freq = 148500,
|
||||
- .pixel_freq = 148500,
|
||||
+ .pll_freq = 2970000000,
|
||||
+ .phy_freq = 1485000000,
|
||||
+ .vclk_freq = 148500000,
|
||||
+ .venc_freq = 148500000,
|
||||
+ .pixel_freq = 148500000,
|
||||
.pll_od1 = 1,
|
||||
.pll_od2 = 2,
|
||||
.pll_od3 = 2,
|
||||
@@ -432,11 +435,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_297000] = {
|
||||
- .pll_freq = 5940000,
|
||||
- .phy_freq = 2970000,
|
||||
- .venc_freq = 297000,
|
||||
- .vclk_freq = 297000,
|
||||
- .pixel_freq = 297000,
|
||||
+ .pll_freq = 5940000000,
|
||||
+ .phy_freq = 2970000000,
|
||||
+ .venc_freq = 297000000,
|
||||
+ .vclk_freq = 297000000,
|
||||
+ .pixel_freq = 297000000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -444,11 +447,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 2,
|
||||
},
|
||||
[MESON_VCLK_HDMI_594000] = {
|
||||
- .pll_freq = 5940000,
|
||||
- .phy_freq = 5940000,
|
||||
- .venc_freq = 594000,
|
||||
- .vclk_freq = 594000,
|
||||
- .pixel_freq = 594000,
|
||||
+ .pll_freq = 5940000000,
|
||||
+ .phy_freq = 5940000000,
|
||||
+ .venc_freq = 594000000,
|
||||
+ .vclk_freq = 594000000,
|
||||
+ .pixel_freq = 594000000,
|
||||
.pll_od1 = 1,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 2,
|
||||
@@ -456,11 +459,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_594000_YUV420] = {
|
||||
- .pll_freq = 5940000,
|
||||
- .phy_freq = 2970000,
|
||||
- .venc_freq = 594000,
|
||||
- .vclk_freq = 594000,
|
||||
- .pixel_freq = 297000,
|
||||
+ .pll_freq = 5940000000,
|
||||
+ .phy_freq = 2970000000,
|
||||
+ .venc_freq = 594000000,
|
||||
+ .vclk_freq = 594000000,
|
||||
+ .pixel_freq = 297000000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -617,16 +620,16 @@ static void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m,
|
||||
3 << 20, pll_od_to_reg(od3) << 20);
|
||||
}
|
||||
|
||||
-#define XTAL_FREQ 24000
|
||||
+#define XTAL_FREQ (24 * 1000 * 1000)
|
||||
|
||||
static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
|
||||
- unsigned int pll_freq)
|
||||
+ unsigned long long pll_freq)
|
||||
{
|
||||
/* The GXBB PLL has a /2 pre-multiplier */
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB))
|
||||
- pll_freq /= 2;
|
||||
+ pll_freq = DIV_ROUND_DOWN_ULL(pll_freq, 2);
|
||||
|
||||
- return pll_freq / XTAL_FREQ;
|
||||
+ return DIV_ROUND_DOWN_ULL(pll_freq, XTAL_FREQ);
|
||||
}
|
||||
|
||||
#define HDMI_FRAC_MAX_GXBB 4096
|
||||
@@ -635,12 +638,13 @@ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
|
||||
|
||||
static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
unsigned int m,
|
||||
- unsigned int pll_freq)
|
||||
+ unsigned long long pll_freq)
|
||||
{
|
||||
- unsigned int parent_freq = XTAL_FREQ;
|
||||
+ unsigned long long parent_freq = XTAL_FREQ;
|
||||
unsigned int frac_max = HDMI_FRAC_MAX_GXL;
|
||||
unsigned int frac_m;
|
||||
unsigned int frac;
|
||||
+ u32 remainder;
|
||||
|
||||
/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
@@ -652,11 +656,11 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
frac_max = HDMI_FRAC_MAX_G12A;
|
||||
|
||||
/* We can have a perfect match !*/
|
||||
- if (pll_freq / m == parent_freq &&
|
||||
- pll_freq % m == 0)
|
||||
+ if (div_u64_rem(pll_freq, m, &remainder) == parent_freq &&
|
||||
+ remainder == 0)
|
||||
return 0;
|
||||
|
||||
- frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq);
|
||||
+ frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
|
||||
frac_m = m * frac_max;
|
||||
if (frac_m > frac)
|
||||
return frac_max;
|
||||
@@ -666,7 +670,7 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
}
|
||||
|
||||
static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
|
||||
- unsigned int m,
|
||||
+ unsigned long long m,
|
||||
unsigned int frac)
|
||||
{
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
@@ -694,7 +698,7 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
|
||||
}
|
||||
|
||||
static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
- unsigned int freq,
|
||||
+ unsigned long long freq,
|
||||
unsigned int *m,
|
||||
unsigned int *frac,
|
||||
unsigned int *od)
|
||||
@@ -706,7 +710,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
continue;
|
||||
*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);
|
||||
|
||||
- DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n",
|
||||
+ DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d\n",
|
||||
freq, *m, *frac, *od);
|
||||
|
||||
if (meson_hdmi_pll_validate_params(priv, *m, *frac))
|
||||
@@ -718,7 +722,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
|
||||
/* pll_freq is the frequency after the OD dividers */
|
||||
enum drm_mode_status
|
||||
-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq)
|
||||
+meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq)
|
||||
{
|
||||
unsigned int od, m, frac;
|
||||
|
||||
@@ -741,7 +745,7 @@ EXPORT_SYMBOL_GPL(meson_vclk_dmt_supported_freq);
|
||||
|
||||
/* pll_freq is the frequency after the OD dividers */
|
||||
static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
- unsigned int pll_freq)
|
||||
+ unsigned long long pll_freq)
|
||||
{
|
||||
unsigned int od, m, frac, od1, od2, od3;
|
||||
|
||||
@@ -756,7 +760,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
od1 = od / od2;
|
||||
}
|
||||
|
||||
- DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n",
|
||||
+ DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d/%d/%d\n",
|
||||
pll_freq, m, frac, od1, od2, od3);
|
||||
|
||||
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
|
||||
@@ -764,17 +768,18 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
return;
|
||||
}
|
||||
|
||||
- DRM_ERROR("Fatal, unable to find parameters for PLL freq %d\n",
|
||||
+ DRM_ERROR("Fatal, unable to find parameters for PLL freq %lluHz\n",
|
||||
pll_freq);
|
||||
}
|
||||
|
||||
enum drm_mode_status
|
||||
-meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
- unsigned int vclk_freq)
|
||||
+meson_vclk_vic_supported_freq(struct meson_drm *priv,
|
||||
+ unsigned long long phy_freq,
|
||||
+ unsigned long long vclk_freq)
|
||||
{
|
||||
int i;
|
||||
|
||||
- DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n",
|
||||
+ DRM_DEBUG_DRIVER("phy_freq = %lluHz vclk_freq = %lluHz\n",
|
||||
phy_freq, vclk_freq);
|
||||
|
||||
/* Check against soc revision/package limits */
|
||||
@@ -785,19 +790,19 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
}
|
||||
|
||||
for (i = 0 ; params[i].pixel_freq ; ++i) {
|
||||
- DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n",
|
||||
+ DRM_DEBUG_DRIVER("i = %d pixel_freq = %lluHz alt = %lluHz\n",
|
||||
i, params[i].pixel_freq,
|
||||
- FREQ_1000_1001(params[i].pixel_freq));
|
||||
- DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
|
||||
+ PIXEL_FREQ_1000_1001(params[i].pixel_freq));
|
||||
+ DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
|
||||
i, params[i].phy_freq,
|
||||
- FREQ_1000_1001(params[i].phy_freq/10)*10);
|
||||
+ PHY_FREQ_1000_1001(params[i].phy_freq));
|
||||
/* Match strict frequency */
|
||||
if (phy_freq == params[i].phy_freq &&
|
||||
vclk_freq == params[i].vclk_freq)
|
||||
return MODE_OK;
|
||||
/* Match 1000/1001 variant */
|
||||
- if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
|
||||
- vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
|
||||
+ if (phy_freq == PHY_FREQ_1000_1001(params[i].phy_freq) &&
|
||||
+ vclk_freq == PIXEL_FREQ_1000_1001(params[i].vclk_freq))
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
@@ -805,8 +810,9 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq);
|
||||
|
||||
-static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
- unsigned int od1, unsigned int od2, unsigned int od3,
|
||||
+static void meson_vclk_set(struct meson_drm *priv,
|
||||
+ unsigned long long pll_base_freq, unsigned int od1,
|
||||
+ unsigned int od2, unsigned int od3,
|
||||
unsigned int vid_pll_div, unsigned int vclk_div,
|
||||
unsigned int hdmi_tx_div, unsigned int venc_div,
|
||||
bool hdmi_use_enci, bool vic_alternate_clock)
|
||||
@@ -826,15 +832,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
meson_hdmi_pll_generic_set(priv, pll_base_freq);
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
switch (pll_base_freq) {
|
||||
- case 2970000:
|
||||
+ case 2970000000:
|
||||
m = 0x3d;
|
||||
frac = vic_alternate_clock ? 0xd02 : 0xe00;
|
||||
break;
|
||||
- case 4320000:
|
||||
+ case 4320000000:
|
||||
m = vic_alternate_clock ? 0x59 : 0x5a;
|
||||
frac = vic_alternate_clock ? 0xe8f : 0;
|
||||
break;
|
||||
- case 5940000:
|
||||
+ case 5940000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0xa05 : 0xc00;
|
||||
break;
|
||||
@@ -844,15 +850,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
|
||||
meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
|
||||
switch (pll_base_freq) {
|
||||
- case 2970000:
|
||||
+ case 2970000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0x281 : 0x300;
|
||||
break;
|
||||
- case 4320000:
|
||||
+ case 4320000000:
|
||||
m = vic_alternate_clock ? 0xb3 : 0xb4;
|
||||
frac = vic_alternate_clock ? 0x347 : 0;
|
||||
break;
|
||||
- case 5940000:
|
||||
+ case 5940000000:
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x102 : 0x200;
|
||||
break;
|
||||
@@ -861,15 +867,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
|
||||
switch (pll_base_freq) {
|
||||
- case 2970000:
|
||||
+ case 2970000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0x140b4 : 0x18000;
|
||||
break;
|
||||
- case 4320000:
|
||||
+ case 4320000000:
|
||||
m = vic_alternate_clock ? 0xb3 : 0xb4;
|
||||
frac = vic_alternate_clock ? 0x1a3ee : 0;
|
||||
break;
|
||||
- case 5940000:
|
||||
+ case 5940000000:
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x8148 : 0x10000;
|
||||
break;
|
||||
@@ -1025,14 +1031,14 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
}
|
||||
|
||||
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
- unsigned int phy_freq, unsigned int vclk_freq,
|
||||
- unsigned int venc_freq, unsigned int dac_freq,
|
||||
+ unsigned long long phy_freq, unsigned long long vclk_freq,
|
||||
+ unsigned long long venc_freq, unsigned long long dac_freq,
|
||||
bool hdmi_use_enci)
|
||||
{
|
||||
bool vic_alternate_clock = false;
|
||||
- unsigned int freq;
|
||||
- unsigned int hdmi_tx_div;
|
||||
- unsigned int venc_div;
|
||||
+ unsigned long long freq;
|
||||
+ unsigned long long hdmi_tx_div;
|
||||
+ unsigned long long venc_div;
|
||||
|
||||
if (target == MESON_VCLK_TARGET_CVBS) {
|
||||
meson_venci_cvbs_clock_config(priv);
|
||||
@@ -1052,27 +1058,27 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
return;
|
||||
}
|
||||
|
||||
- hdmi_tx_div = vclk_freq / dac_freq;
|
||||
+ hdmi_tx_div = DIV_ROUND_DOWN_ULL(vclk_freq, dac_freq);
|
||||
|
||||
if (hdmi_tx_div == 0) {
|
||||
- pr_err("Fatal Error, invalid HDMI-TX freq %d\n",
|
||||
+ pr_err("Fatal Error, invalid HDMI-TX freq %lluHz\n",
|
||||
dac_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
- venc_div = vclk_freq / venc_freq;
|
||||
+ venc_div = DIV_ROUND_DOWN_ULL(vclk_freq, venc_freq);
|
||||
|
||||
if (venc_div == 0) {
|
||||
- pr_err("Fatal Error, invalid HDMI venc freq %d\n",
|
||||
+ pr_err("Fatal Error, invalid HDMI venc freq %lluHz\n",
|
||||
venc_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
||||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
+ phy_freq == PHY_FREQ_1000_1001(params[freq].phy_freq)) &&
|
||||
(vclk_freq == params[freq].vclk_freq ||
|
||||
- vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
+ vclk_freq == PIXEL_FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
if (vclk_freq != params[freq].vclk_freq)
|
||||
vic_alternate_clock = true;
|
||||
else
|
||||
@@ -1098,7 +1104,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
}
|
||||
|
||||
if (!params[freq].pixel_freq) {
|
||||
- pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq);
|
||||
+ pr_err("Fatal Error, invalid HDMI vclk freq %lluHz\n",
|
||||
+ vclk_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h
|
||||
index 60617aaf18dd..7ac55744e574 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.h
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.h
|
||||
@@ -20,17 +20,18 @@ enum {
|
||||
};
|
||||
|
||||
/* 27MHz is the CVBS Pixel Clock */
|
||||
-#define MESON_VCLK_CVBS 27000
|
||||
+#define MESON_VCLK_CVBS (27 * 1000 * 1000)
|
||||
|
||||
enum drm_mode_status
|
||||
-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq);
|
||||
+meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq);
|
||||
enum drm_mode_status
|
||||
-meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
- unsigned int vclk_freq);
|
||||
+meson_vclk_vic_supported_freq(struct meson_drm *priv,
|
||||
+ unsigned long long phy_freq,
|
||||
+ unsigned long long vclk_freq);
|
||||
|
||||
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
- unsigned int phy_freq, unsigned int vclk_freq,
|
||||
- unsigned int venc_freq, unsigned int dac_freq,
|
||||
+ unsigned long long phy_freq, unsigned long long vclk_freq,
|
||||
+ unsigned long long venc_freq, unsigned long long dac_freq,
|
||||
bool hdmi_use_enci);
|
||||
|
||||
#endif /* __MESON_VCLK_H */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From e883c21fdc846fe8a7f5d24645fda420d9cd1cf6 Mon Sep 17 00:00:00 2001
|
||||
From fd4db8cc01ab6866be0245d12a90355dc35b8f08 Mon Sep 17 00:00:00 2001
|
||||
From: Benjamin Roszak <benjamin545@gmail.com>
|
||||
Date: Mon, 23 Jan 2023 10:56:46 +0000
|
||||
Subject: [PATCH 29/51] FROMLIST(v2): media: meson: vdec: implement 10bit
|
||||
Subject: [PATCH 37/55] FROMLIST(v2): media: meson: vdec: implement 10bit
|
||||
bitstream handling
|
||||
|
||||
In order to support 10bit bitstream decoding, buffers and MMU
|
@ -1,7 +1,7 @@
|
||||
From 4914cd2636248ed0b02b2ca746c4b4d7a203f74c Mon Sep 17 00:00:00 2001
|
||||
From d66c3e35d69980eae01a21acb2f1e571771d6d04 Mon Sep 17 00:00:00 2001
|
||||
From: Maxime Jourdan <mjourdan@baylibre.com>
|
||||
Date: Mon, 23 Jan 2023 11:07:04 +0000
|
||||
Subject: [PATCH 30/51] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
|
||||
Subject: [PATCH 38/55] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
|
||||
|
||||
Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
|
||||
the common "HEVC" decoder driver.
|
@ -1,7 +1,7 @@
|
||||
From 84a5ee50a437ade0f8d0dac3faa6fc20b043c8f3 Mon Sep 17 00:00:00 2001
|
||||
From 22c4ce5ab3abb15c6e3e97ed09dd1a59f22465be Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Wed, 5 Jun 2024 11:15:11 +0200
|
||||
Subject: [PATCH 31/51] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
|
||||
Subject: [PATCH 39/55] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
|
||||
sub-nodes
|
||||
|
||||
Allow the '#address-cells', '#size-cells' and subnodes as defined in
|
@ -1,7 +1,7 @@
|
||||
From feee6a25cfea5f02068b1d8b8aaa1f8a912c5640 Mon Sep 17 00:00:00 2001
|
||||
From 1ad64efd7378da5f37072a459b9cf895ed1d4a0a Mon Sep 17 00:00:00 2001
|
||||
From: Zhang Kunbo <zhangkunbo@huawei.com>
|
||||
Date: Wed, 6 Nov 2024 02:45:48 +0000
|
||||
Subject: [PATCH 32/51] FROMLIST(v1): drm/meson: Avoid use-after-free issues
|
||||
Subject: [PATCH 40/55] FROMLIST(v1): drm/meson: Avoid use-after-free issues
|
||||
with crtc
|
||||
|
||||
It's dangerous to call drm_crtc_init_with_planes() whose second
|
@ -0,0 +1,41 @@
|
||||
From 1ab37c8a80866f61515a295e65ea34f9b4c478e5 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 3 May 2025 15:18:07 +0000
|
||||
Subject: [PATCH 41/55] FROMLIST(v1): arm64: dts: amlogic: sm1-bananapi: lower
|
||||
SD card speed for stability
|
||||
|
||||
Users report being able to boot (u-boot) from SD card but kernel
|
||||
init then fails to mount partitions on the card containing boot
|
||||
media resulting in first-boot failure. System logs show only the
|
||||
probe of the mmc devices: the SD card is seen, but no partitions
|
||||
are found so init fails to mount them and boot stalls.
|
||||
|
||||
Reducing the speed of the SD card from 50MHz to 35MHz results in
|
||||
complete probing of the card and successful boot.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi | 5 ++---
|
||||
1 file changed, 2 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
|
||||
index 40db95f64636..03b4b414cd5f 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
|
||||
@@ -384,11 +384,10 @@ &sd_emmc_b {
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
- max-frequency = <50000000>;
|
||||
+ /* Boot failures are observed at 50MHz */
|
||||
+ max-frequency = <35000000>;
|
||||
disable-wp;
|
||||
|
||||
- /* TOFIX: SD card is barely usable in SDR modes */
|
||||
-
|
||||
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <&tflash_vdd>;
|
||||
vqmmc-supply = <&vddio_c>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 730b88bfa86446ef847e53252bcfef02c9169e93 Mon Sep 17 00:00:00 2001
|
||||
From 0b8f613e33f928d6d0e920cba8ea7402aa7ad224 Mon Sep 17 00:00:00 2001
|
||||
From: Andreas Baierl <ichgeh@imkreisrum.de>
|
||||
Date: Tue, 2 Apr 2024 14:22:52 +0000
|
||||
Subject: [PATCH 37/51] WIP: media: meson: vdec: reintroduce wiggle room
|
||||
Subject: [PATCH 42/55] WIP: media: meson: vdec: reintroduce wiggle room
|
||||
|
||||
Without the wiggle room, it happens that matching offsets can't be found.
|
||||
This results in non-matches and afterwards in frame drops in userspace apps.
|
@ -1,7 +1,7 @@
|
||||
From e4125158db00f8488e4e6cbafed72f1e7e19b2c6 Mon Sep 17 00:00:00 2001
|
||||
From 1ba4604fcb1fe4e10c67f0ffe886f4ddeaf6435a Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 14 Mar 2023 01:13:15 +0000
|
||||
Subject: [PATCH 38/51] WIP: media: meson: vdec: fix memory leak of 'new_frame'
|
||||
Subject: [PATCH 43/55] WIP: media: meson: vdec: fix memory leak of 'new_frame'
|
||||
|
||||
Reported-by: kernel test robot <lkp@intel.com>
|
||||
Reported-by: Dan Carpenter <error27@gmail.com>
|
@ -1,7 +1,7 @@
|
||||
From 15ec62d05962392265d7964474c8d749f9dc1673 Mon Sep 17 00:00:00 2001
|
||||
From 7814d0db70c4da0e6a82135af2d71424519177d4 Mon Sep 17 00:00:00 2001
|
||||
From: Andreas Baierl <ichgeh@imkreisrum.de>
|
||||
Date: Thu, 20 Feb 2025 23:59:14 +0000
|
||||
Subject: [PATCH 39/51] WIP: media: meson: vdec: fix
|
||||
Subject: [PATCH 44/55] WIP: media: meson: vdec: fix
|
||||
V4L2_BUF_FLAG_{KEY|P|B}FRAME
|
||||
|
||||
ffmpeg needs the keyframe flag to be set correctly, else
|
@ -1,7 +1,7 @@
|
||||
From 483b88c4236ce0b2f5eb36308bb6b3222712cf08 Mon Sep 17 00:00:00 2001
|
||||
From d35e1db4644b17254613befa2f72825b484bcdb9 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sun, 26 May 2024 12:53:07 +0000
|
||||
Subject: [PATCH 40/51] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
|
||||
Subject: [PATCH 45/55] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
|
||||
boards
|
||||
|
||||
Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)
|
@ -1,7 +1,7 @@
|
||||
From 51aef4d4d9062c5c9c3ccbc95a6d0acf78edaabd Mon Sep 17 00:00:00 2001
|
||||
From 6dbcc039a4a11f3c8179f20a25f1354a28fd7ce4 Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Tue, 8 Aug 2023 01:00:15 -0400
|
||||
Subject: [PATCH 41/51] WIP: net: phy: meson-gxl: implement
|
||||
Subject: [PATCH 46/55] WIP: net: phy: meson-gxl: implement
|
||||
meson_gxl_phy_resume()
|
||||
|
||||
While testing the suspend/resume functionality, we found the ethernet
|
@ -1,7 +1,7 @@
|
||||
From d9032ded4dfc151a1ea5733e92dd351b814fd3bf Mon Sep 17 00:00:00 2001
|
||||
From 480f01786ce23d0dc2b831856bb8b1c2434b22a2 Mon Sep 17 00:00:00 2001
|
||||
From: Dongjin Kim <tobetter@gmail.com>
|
||||
Date: Thu, 10 Sep 2020 11:01:33 +0900
|
||||
Subject: [PATCH 42/51] WIP: drm/meson: add support for 2560x1440 resolution
|
||||
Subject: [PATCH 47/55] WIP: drm/meson: add support for 2560x1440 resolution
|
||||
output
|
||||
|
||||
Add support for Quad HD (QHD) 2560x1440 resolution output. Timings
|
@ -1,7 +1,7 @@
|
||||
From 9abde365a972976762155220b275cc5986e12f14 Mon Sep 17 00:00:00 2001
|
||||
From 97e24af0fb499d312fbee2f2358e765567c64e83 Mon Sep 17 00:00:00 2001
|
||||
From: Luke Lu <luke.lu@libre.computer>
|
||||
Date: Mon, 21 Aug 2023 10:50:04 +0000
|
||||
Subject: [PATCH 43/51] WIP: drm/meson: do setup after resumption to fix hdmi
|
||||
Subject: [PATCH 48/55] WIP: drm/meson: do setup after resumption to fix hdmi
|
||||
output
|
||||
|
||||
Some HDMI displays connected to gxl-based boards go black after
|
@ -1,7 +1,7 @@
|
||||
From c469a3a9512d67f1dd656d1d0fb84cc82d57d380 Mon Sep 17 00:00:00 2001
|
||||
From eeab2711a9a6c4caa1a1e9d5f9154b7f70f8b07d Mon Sep 17 00:00:00 2001
|
||||
From: Luke Lu <luke.lu@libre.computer>
|
||||
Date: Wed, 13 Dec 2023 03:47:44 +0000
|
||||
Subject: [PATCH 44/51] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
|
||||
Subject: [PATCH 49/55] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
|
||||
enabled
|
||||
|
||||
dw_hdmi_poweron() assumes that hdmi->curr_conn is valid. Calling
|
@ -1,7 +1,7 @@
|
||||
From d32d823a70587d632369aca5e8774d8c6c9f94d5 Mon Sep 17 00:00:00 2001
|
||||
From 0e4b183b4d1c53af989628ca8901c73108bb3b47 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 18 Jan 2022 15:09:12 +0000
|
||||
Subject: [PATCH 45/51] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
|
||||
Subject: [PATCH 50/55] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
|
||||
100MHz
|
||||
|
||||
Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but
|
||||
@ -79,10 +79,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
2 files changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
|
||||
index 45ccddd1aaf0..bcc3d2e9e81f 100644
|
||||
index 6da1316d97c6..f6ef4fc4a85c 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
|
||||
@@ -260,7 +260,7 @@ &sd_emmc_a {
|
||||
@@ -258,7 +258,7 @@ &sd_emmc_a {
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
@ -92,10 +92,10 @@ index 45ccddd1aaf0..bcc3d2e9e81f 100644
|
||||
non-removable;
|
||||
disable-wp;
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
index b52a830efcce..edfbd882fd47 100644
|
||||
index 05a0d4de3ad7..ccaadb497880 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
@@ -121,7 +121,7 @@ &sd_emmc_a {
|
||||
@@ -119,7 +119,7 @@ &sd_emmc_a {
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
@ -1,7 +1,7 @@
|
||||
From 57d5576b53b15d4e65ec27c0cc76778b5d8d2a9a Mon Sep 17 00:00:00 2001
|
||||
From ae6354d50055bee9eff5ae402f13087d5874073c Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 18 Jan 2022 15:18:32 +0000
|
||||
Subject: [PATCH 46/51] WIP: arm64: dts: meson: remove SDIO node from Khadas
|
||||
Subject: [PATCH 51/55] WIP: arm64: dts: meson: remove SDIO node from Khadas
|
||||
VIM1
|
||||
|
||||
Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we
|
||||
@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
1 file changed, 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
|
||||
index 0741d34945bb..18223afde3e7 100644
|
||||
index e137ebd48c5e..563e6e909363 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
|
||||
@@ -221,10 +221,6 @@ &pwm_ef {
|
||||
@@ -219,10 +219,6 @@ &pwm_ef {
|
||||
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
|
||||
};
|
||||
|
@ -1,52 +0,0 @@
|
||||
From 24333ce109de3cd43052ca420d250d84468b821c Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 27 Jan 2025 17:52:10 +0000
|
||||
Subject: [PATCH 51/51] WIP: drm/panfrost: fix power transition timeout
|
||||
warnings (again)
|
||||
|
||||
*** THIS IS NOT PROVEN ***
|
||||
|
||||
Commit 2bd02f5a0bac ("drm/panfrost: fix power transition timeout warnings")
|
||||
increased the timeout value from 1000ms to 2000ms but in recent kernels the
|
||||
messages started to spam the system log again. Increasing timeout values to
|
||||
the arbitrary value of 3000ms stops the noise and hopefully adds a little
|
||||
headroom so further increases aren't required in the future.
|
||||
|
||||
[0] https://patchwork.kernel.org/project/dri-devel/patch/20240322164525.2617508-1-christianshewitt@gmail.com/
|
||||
|
||||
Fixes: 22aa1a209018 ("drm/panfrost: Really power off GPU cores in panfrost_gpu_power_off()")
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/panfrost/panfrost_gpu.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
index 174e190ba40f..eb99d0d5584e 100644
|
||||
--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
@@ -456,19 +456,19 @@ void panfrost_gpu_power_off(struct panfrost_device *pfdev)
|
||||
|
||||
gpu_write(pfdev, SHADER_PWROFF_LO, pfdev->features.shader_present);
|
||||
ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_PWRTRANS_LO,
|
||||
- val, !val, 1, 2000);
|
||||
+ val, !val, 1, 3000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "shader power transition timeout");
|
||||
|
||||
gpu_write(pfdev, TILER_PWROFF_LO, pfdev->features.tiler_present);
|
||||
ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_PWRTRANS_LO,
|
||||
- val, !val, 1, 2000);
|
||||
+ val, !val, 1, 3000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "tiler power transition timeout");
|
||||
|
||||
gpu_write(pfdev, L2_PWROFF_LO, pfdev->features.l2_present);
|
||||
ret = readl_poll_timeout(pfdev->iomem + L2_PWRTRANS_LO,
|
||||
- val, !val, 0, 2000);
|
||||
+ val, !val, 0, 3000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "l2 power transition timeout");
|
||||
}
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 4988cc0bea195656a8c9fa84c0cc5a55f450890f Mon Sep 17 00:00:00 2001
|
||||
From c2a167bc9c453c36e2b939f44f2f9a7476109e60 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 19 Jan 2022 06:45:06 +0000
|
||||
Subject: [PATCH 47/51] WIP: arm64: dts: meson: add UHS SDIO capabilities to
|
||||
Subject: [PATCH 52/55] WIP: arm64: dts: meson: add UHS SDIO capabilities to
|
||||
p212/p23x/q20x
|
||||
|
||||
Add UHS capabilities to the SDIO node to enable 100MHz speeds.
|
||||
@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
2 files changed, 8 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
|
||||
index bcc3d2e9e81f..34f20a6ad38f 100644
|
||||
index f6ef4fc4a85c..b3385f71bb48 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
|
||||
@@ -260,6 +260,10 @@ &sd_emmc_a {
|
||||
@@ -258,6 +258,10 @@ &sd_emmc_a {
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
@ -28,10 +28,10 @@ index bcc3d2e9e81f..34f20a6ad38f 100644
|
||||
|
||||
non-removable;
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
index edfbd882fd47..c74308499786 100644
|
||||
index ccaadb497880..59539eca8f42 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
@@ -121,6 +121,10 @@ &sd_emmc_a {
|
||||
@@ -119,6 +119,10 @@ &sd_emmc_a {
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
@ -1,7 +1,7 @@
|
||||
From 6bc6c1f6d8d280f7d86ce376079f65d8f17cceee Mon Sep 17 00:00:00 2001
|
||||
From d3bd0c26f58273b4caf8ca7ec8a2a0fe606ec74e Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 09:59:58 +0000
|
||||
Subject: [PATCH 48/51] WIP: dt-bindings: arm: amlogic: add support for Tanix
|
||||
Subject: [PATCH 53/55] WIP: dt-bindings: arm: amlogic: add support for Tanix
|
||||
TX9 Pro
|
||||
|
||||
The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip
|
@ -1,7 +1,7 @@
|
||||
From 1f9e333a442bb030d227ef0afb4290cbd27f6a82 Mon Sep 17 00:00:00 2001
|
||||
From 46e1bf577e16fecf6e15716c500ea28683a2c9bc Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 10:01:14 +0000
|
||||
Subject: [PATCH 49/51] WIP: arm64: dts: meson: add initial device-tree for
|
||||
Subject: [PATCH 54/55] WIP: arm64: dts: meson: add initial device-tree for
|
||||
Tanix TX9 Pro
|
||||
|
||||
Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with
|
@ -1,7 +1,7 @@
|
||||
From 44c76bc403938f997751bc14858e0d7c514d1eeb Mon Sep 17 00:00:00 2001
|
||||
From 7c254b38d6481864d8348c4dca5ada8eeb0d53f1 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 10:11:39 +0000
|
||||
Subject: [PATCH 50/51] WIP: arm64: dts: meson: add 7-segment display to Tanix
|
||||
Subject: [PATCH 55/55] WIP: arm64: dts: meson: add 7-segment display to Tanix
|
||||
TX9 Pro
|
||||
|
||||
Add support for the 7-segment VFD display of the device
|
@ -1,6 +1,6 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm64 6.14.2 Kernel Configuration
|
||||
# Linux/arm64 6.14.6 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-14.2.0 (GCC) 14.2.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
@ -394,6 +394,7 @@ CONFIG_ARM64_ERRATUM_3194386=y
|
||||
# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
|
||||
# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set
|
||||
# CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set
|
||||
# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set
|
||||
# CONFIG_ROCKCHIP_ERRATUM_3588001 is not set
|
||||
# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
|
||||
# end of ARM errata workarounds via the alternatives framework
|
||||
@ -6069,7 +6070,6 @@ CONFIG_COMMON_CLK=y
|
||||
|
||||
# CONFIG_LMK04832 is not set
|
||||
# CONFIG_COMMON_CLK_MAX9485 is not set
|
||||
# CONFIG_COMMON_CLK_SCMI is not set
|
||||
CONFIG_COMMON_CLK_SCPI=y
|
||||
# CONFIG_COMMON_CLK_SI5341 is not set
|
||||
# CONFIG_COMMON_CLK_SI5351 is not set
|
||||
@ -7659,13 +7659,16 @@ CONFIG_CRYPTO_LIB_GF128MUL=y
|
||||
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
||||
CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y
|
||||
CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y
|
||||
CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=y
|
||||
CONFIG_CRYPTO_LIB_CHACHA=y
|
||||
CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y
|
||||
CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=y
|
||||
CONFIG_CRYPTO_LIB_CURVE25519=y
|
||||
CONFIG_CRYPTO_LIB_DES=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
|
||||
CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305=y
|
||||
CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y
|
||||
CONFIG_CRYPTO_LIB_SHA1=y
|
||||
|
Loading…
x
Reference in New Issue
Block a user