diff --git a/packages/linux/patches/raspberrypi/linux-010-pr6309-fix-no-signal-after-modeswitch.patch b/packages/linux/patches/raspberrypi/linux-010-pr6309-fix-no-signal-after-modeswitch.patch new file mode 100644 index 0000000000..33982389fa --- /dev/null +++ b/packages/linux/patches/raspberrypi/linux-010-pr6309-fix-no-signal-after-modeswitch.patch @@ -0,0 +1,100 @@ +From 733e7a51a128e950d210ef3652f5427e4179e17a Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Mon, 12 Aug 2024 13:31:58 +0100 +Subject: [PATCH 1/3] drm/vc4: Add a delay after disabling hdmi phy output + +There appears to be a requirement for some devices +(I'm testing with a 8K VRROOM 40Gbps HDMI switch) +for a measable delay between removing the hdmi phy output from +the old mode, to enabling the hdmi phy output for the new mode. + +Without the delay, a mode switch has a small change of getting a permanent +'no signal', which requires a subsequent mode switch or a unplug/replug +to redetect. + +Switching between 4kp24/25/30 modes fails about 5% of time in my testing. + +Add a delay to make it impossible to switch faster than this. + +Signed-off-by: Dom Cobley +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c +index 859ac51d06f3a..c85737f2b7f73 100644 +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -668,6 +668,7 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, + * someone was waiting it. + */ + vc4_crtc_send_vblank(crtc); ++ msleep(20); + } + + static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, + +From 75c37d08890881c02a5db5ef763ef7e97f4253d3 Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Tue, 13 Aug 2024 16:13:16 +0100 +Subject: [PATCH 2/3] drm/vc4: Implement vc6_hdmi_phy_disable + +The body of this function was missing so we don't reset the phy +when disabling it. + +Signed-off-by: Dom Cobley +--- + drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c +index 0d55627148327..f36558932f083 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c +@@ -1197,4 +1197,9 @@ void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, + + void vc6_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi) + { ++ unsigned long flags; ++ ++ spin_lock_irqsave(&vc4_hdmi->hw_lock, flags); ++ vc6_hdmi_reset_phy(vc4_hdmi); ++ spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags); + } + +From 1360bf475f7a12392e041bb80b20e21b677dcd4c Mon Sep 17 00:00:00 2001 +From: Dom Cobley +Date: Tue, 13 Aug 2024 17:18:51 +0100 +Subject: [PATCH 3/3] drm/vc4: Also power down the PLL core when resetting PHY + +The current reset code doesn't actually stop the hdmi output. +That makes it difficult for displays to handle a mode set. + +Powering down the PLL does actually remove the hdmi signal +and makes mode sets more reliable + +Signed-off-by: Dom Cobley +--- + drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c +index f36558932f083..83801c2684250 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c +@@ -137,6 +137,7 @@ + #define VC6_HDMI_TX_PHY_PLL_REFCLK_REFCLK_SEL_CMOS BIT(13) + #define VC6_HDMI_TX_PHY_PLL_REFCLK_REFFRQ_MASK VC4_MASK(9, 0) + ++#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN BIT(4) + #define VC6_HDMI_TX_PHY_PLL_POST_KDIV_CLK0_SEL_MASK VC4_MASK(3, 2) + #define VC6_HDMI_TX_PHY_PLL_POST_KDIV_KDIV_MASK VC4_MASK(1, 0) + +@@ -947,6 +948,7 @@ static void vc6_hdmi_reset_phy(struct vc4_hdmi *vc4_hdmi) + + HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0); + HDMI_WRITE(HDMI_TX_PHY_POWERUP_CTL, 0); ++ HDMI_WRITE(HDMI_TX_PHY_PLL_POST_KDIV, VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN); + } + + void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,