diff --git a/packages/linux/patches/36_drm-i915-resume-force-mode.diff b/packages/linux/patches/36_drm-i915-resume-force-mode.diff deleted file mode 100644 index 3e6c6484bf..0000000000 --- a/packages/linux/patches/36_drm-i915-resume-force-mode.diff +++ /dev/null @@ -1,50 +0,0 @@ -http://lists.freedesktop.org/archives/intel-gfx/2009-February/001313.html - ---- a/drivers/gpu/drm/i915/i915_suspend.c.orig 2009-02-18 22:59:19.000000000 -0500 -+++ b/drivers/gpu/drm/i915/i915_suspend.c 2009-02-18 22:59:58.000000000 -0500 -@@ -28,6 +28,7 @@ - #include "drm.h" - #include "i915_drm.h" - #include "i915_drv.h" -+#include - - static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) - { -@@ -519,6 +520,8 @@ - - i915_restore_vga(dev); - -+ drm_helper_resume_force_mode(dev); -+ - return 0; - } - -From f5192bce8be69e5b33d7579bc282fef4d673e2c1 Mon Sep 17 00:00:00 2001 -From: Lubomir Rintel -Date: Sun, 15 Mar 2009 13:55:55 +0100 -Subject: [PATCH] Fix i915 nomodeset NULL deref. during PM resume - -drm_helper_resume_force_mode() would crash while attempting to -iterate through crtc_list, which is uninitialized when is modesetting -disabled. ---- - drivers/gpu/drm/i915/i915_suspend.c | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c -index ef5fb6e..b138032 100644 ---- a/drivers/gpu/drm/i915/i915_suspend.c -+++ b/drivers/gpu/drm/i915/i915_suspend.c -@@ -520,7 +520,8 @@ int i915_restore_state(struct drm_device *dev) - - i915_restore_vga(dev); - -- drm_helper_resume_force_mode(dev); -+ if (drm_core_check_feature(dev, DRIVER_MODESET)) -+ drm_helper_resume_force_mode(dev); - - return 0; - } --- -1.6.2 - diff --git a/packages/linux/patches/37_drm-intel-big-hammer.diff b/packages/linux/patches/37_drm-intel-big-hammer.diff deleted file mode 100644 index e7047508d4..0000000000 --- a/packages/linux/patches/37_drm-intel-big-hammer.diff +++ /dev/null @@ -1,16 +0,0 @@ -diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c -index 37427e4..08af9db 100644 ---- a/drivers/gpu/drm/i915/i915_gem.c -+++ b/drivers/gpu/drm/i915/i915_gem.c -@@ -2553,6 +2553,11 @@ i915_gem_execbuffer(struct drm_device *dev, void *data, - - mutex_lock(&dev->struct_mutex); - -+ /* We don't get the flushing right for these chipsets, use the -+ * big hamer for now to avoid random crashiness. */ -+ if (IS_I855(dev) || IS_I865G(dev)) -+ wbinvd(); -+ - i915_verify_inactive(dev, __FILE__, __LINE__); - - if (dev_priv->mm.wedged) { diff --git a/packages/linux/patches/80_drm-page-flip.diff b/packages/linux/patches/80_drm-page-flip.diff deleted file mode 100644 index 15fdbbf5f6..0000000000 --- a/packages/linux/patches/80_drm-page-flip.diff +++ /dev/null @@ -1,847 +0,0 @@ -diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c -index ba728ad..4b7e748 100644 ---- a/drivers/gpu/drm/drm_crtc.c -+++ b/drivers/gpu/drm/drm_crtc.c -@@ -34,6 +34,8 @@ - #include "drmP.h" - #include "drm_crtc.h" - -+#undef set_base -+ - struct drm_prop_enum_list { - int type; - char *name; -@@ -330,6 +332,34 @@ void drm_framebuffer_cleanup(struct drm_framebuffer *fb) - EXPORT_SYMBOL(drm_framebuffer_cleanup); - - /** -+ * drm_crtc_async_flip - do a set_base call from a work queue -+ * @work: work struct -+ * -+ * Called when a set_base call is queued by the page flip code. This -+ * allows the flip ioctl itself to return immediately and allow userspace -+ * to continue working. -+ */ -+static void drm_crtc_async_flip(struct work_struct *work) -+{ -+ struct drm_crtc *crtc = container_of(work, struct drm_crtc, async_flip); -+ struct drm_device *dev = crtc->dev; -+ struct drm_pending_flip *pending; -+ -+ BUG_ON(crtc->pending_flip == NULL); -+ -+ mutex_lock(&dev->struct_mutex); -+ crtc->funcs->set_base(crtc, crtc->x, crtc->y, NULL); -+ -+ pending = crtc->pending_flip; -+ crtc->pending_flip = NULL; -+ -+ pending->frame = drm_vblank_count(dev, crtc->pipe); -+ list_add_tail(&pending->link, &dev->flip_list); -+ -+ mutex_unlock(&dev->struct_mutex); -+} -+ -+/** - * drm_crtc_init - Initialise a new CRTC object - * @dev: DRM device - * @crtc: CRTC object to init -@@ -340,17 +370,19 @@ EXPORT_SYMBOL(drm_framebuffer_cleanup); - * - * Inits a new object created as base part of an driver crtc object. - */ --void drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, -+void drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, int pipe, - const struct drm_crtc_funcs *funcs) - { - crtc->dev = dev; - crtc->funcs = funcs; -+ crtc->pipe = pipe; - - mutex_lock(&dev->mode_config.mutex); - drm_mode_object_get(dev, &crtc->base, DRM_MODE_OBJECT_CRTC); - - list_add_tail(&crtc->head, &dev->mode_config.crtc_list); - dev->mode_config.num_crtc++; -+ INIT_WORK(&crtc->async_flip, drm_crtc_async_flip); - mutex_unlock(&dev->mode_config.mutex); - } - EXPORT_SYMBOL(drm_crtc_init); -@@ -369,6 +401,9 @@ void drm_crtc_cleanup(struct drm_crtc *crtc) - { - struct drm_device *dev = crtc->dev; - -+ mutex_lock(&dev->mode_config.mutex); -+ flush_work(&crtc->async_flip); -+ - if (crtc->gamma_store) { - kfree(crtc->gamma_store); - crtc->gamma_store = NULL; -@@ -376,6 +411,7 @@ void drm_crtc_cleanup(struct drm_crtc *crtc) - - drm_mode_object_put(dev, &crtc->base); - list_del(&crtc->head); -+ mutex_unlock(&dev->mode_config.mutex); - dev->mode_config.num_crtc--; - } - EXPORT_SYMBOL(drm_crtc_cleanup); -@@ -2479,3 +2515,134 @@ out: - mutex_unlock(&dev->mode_config.mutex); - return ret; - } -+ -+/** -+ * drm_mode_page_flip_ioctl - page flip ioctl -+ * @dev: DRM device -+ * @data: ioctl args -+ * @file_priv: file private data -+ * -+ * The page flip ioctl replaces the current front buffer with a new -+ * one, using the CRTC's set_base function, which should just update -+ * the front buffer base pointer. It's up to set_base to make -+ * sure the update doesn't result in tearing (on some hardware the -+ * base register is double buffered, so this is easy). -+ * -+ * Note that this covers just the simple case of flipping the front -+ * buffer immediately. Interval handling and interlaced modes have to -+ * be handled by userspace, or with new ioctls. -+ */ -+int drm_mode_page_flip_ioctl(struct drm_device *dev, void *data, -+ struct drm_file *file_priv) -+{ -+ struct drm_pending_flip *pending; -+ struct drm_mode_page_flip *flip_data = data; -+ struct drm_mode_object *drm_obj, *fb_obj; -+ struct drm_crtc *crtc; -+ int ret = 0; -+ -+ if (!(drm_core_check_feature(dev, DRIVER_MODESET))) -+ return -ENODEV; -+ -+ /* -+ * Reject unknown flags so future userspace knows what we (don't) -+ * support -+ */ -+ if (flip_data->flags & (~DRM_MODE_PAGE_FLIP_FLAGS_MASK)) { -+ DRM_DEBUG("bad page flip flags\n"); -+ return -EINVAL; -+ } -+ -+ pending = kzalloc(sizeof *pending, GFP_KERNEL); -+ if (pending == NULL) -+ return -ENOMEM; -+ -+ mutex_lock(&dev->struct_mutex); -+ -+ fb_obj = drm_mode_object_find(dev, flip_data->fb_id, -+ DRM_MODE_OBJECT_FB); -+ if (!fb_obj) { -+ DRM_DEBUG("unknown fb %d\n", flip_data->fb_id); -+ ret = -ENOENT; -+ goto out_unlock; -+ } -+ -+ drm_obj = drm_mode_object_find(dev, flip_data->crtc_id, -+ DRM_MODE_OBJECT_CRTC); -+ if (!drm_obj) { -+ DRM_DEBUG("unknown crtc %d\n", flip_data->crtc_id); -+ ret = -ENOENT; -+ goto out_unlock; -+ } -+ crtc = obj_to_crtc(drm_obj); -+ if (!crtc->enabled) { -+ DRM_DEBUG("crtc %d not enabled\n", flip_data->crtc_id); -+ ret = -EINVAL; -+ goto out_unlock; -+ } -+ -+ if (crtc->fb->funcs->unpin == NULL) { -+ DRM_DEBUG("fb for crtc %d does not support delayed unpin\n", -+ flip_data->crtc_id); -+ ret = -ENODEV; -+ goto out_unlock; -+ } -+ -+ pending->crtc = crtc; -+ pending->old_fb = crtc->fb; -+ pending->pipe = crtc->pipe; -+ pending->event.base.type = DRM_EVENT_MODE_PAGE_FLIP; -+ pending->event.base.length = sizeof pending->event; -+ pending->event.user_data = flip_data->user_data; -+ pending->pending_event.event = &pending->event.base; -+ pending->pending_event.file_priv = file_priv; -+ pending->pending_event.destroy = -+ (void (*) (struct drm_pending_event *)) kfree; -+ -+ /* Get vblank ref for completion handling */ -+ ret = drm_vblank_get(dev, crtc->pipe); -+ if (ret) { -+ DRM_DEBUG("failed to take vblank ref\n"); -+ goto out_unlock; -+ } -+ -+ /* -+ * The set_base call will change the domain on the new fb, -+ * which will force the rendering to finish and block the -+ * ioctl. We need to do this last part from a work queue, to -+ * avoid blocking userspace here. -+ */ -+ crtc->fb = obj_to_fb(fb_obj); -+ -+ if (crtc->pending_flip != NULL) { -+ struct drm_pending_flip *old_flip; -+ -+ /* We have an outstanding flip request for this crtc/pipe. -+ * In order to satisfy the user we can either queue the requests -+ * and apply them on sequential vblanks, or we can drop old -+ * requests. -+ * -+ * Here we choose to discard the previous request for -+ * simplicity. Note that since we have not yet applied the -+ * previous flip, we need to preserve the original (i.e. still -+ * current) fb. -+ */ -+ -+ old_flip = crtc->pending_flip; -+ pending->old_fb = old_flip->old_fb; -+ old_flip->old_fb = NULL; -+ drm_finish_pending_flip (dev, old_flip, 0); -+ } else -+ schedule_work(&crtc->async_flip); -+ crtc->pending_flip = pending; -+ -+ mutex_unlock(&dev->struct_mutex); -+ -+ return 0; -+ -+out_unlock: -+ mutex_unlock(&dev->struct_mutex); -+ kfree(pending); -+ -+ return ret; -+} -diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c -index ff447f1..fec66f9 100644 ---- a/drivers/gpu/drm/drm_crtc_helper.c -+++ b/drivers/gpu/drm/drm_crtc_helper.c -@@ -872,8 +872,10 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) - old_fb = set->crtc->fb; - if (set->crtc->fb != set->fb) - set->crtc->fb = set->fb; -+ mutex_lock(&dev->struct_mutex); - ret = crtc_funcs->mode_set_base(set->crtc, - set->x, set->y, old_fb); -+ mutex_unlock(&dev->struct_mutex); - if (ret != 0) - goto fail; - } -@@ -1095,3 +1097,13 @@ int drm_helper_resume_force_mode(struct drm_device *dev) - return 0; - } - EXPORT_SYMBOL(drm_helper_resume_force_mode); -+ -+int -+drm_crtc_helper_set_base(struct drm_crtc *crtc, int x, int y, -+ struct drm_framebuffer *old_fb) -+{ -+ struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; -+ -+ return crtc_funcs->mode_set_base(crtc, x, y, old_fb); -+} -+EXPORT_SYMBOL(drm_crtc_helper_set_base); -diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c -index a75ca63..672f473 100644 ---- a/drivers/gpu/drm/drm_drv.c -+++ b/drivers/gpu/drm/drm_drv.c -@@ -145,6 +145,7 @@ static struct drm_ioctl_desc drm_ioctls[] = { - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETFB, drm_mode_getfb, DRM_MASTER|DRM_CONTROL_ALLOW), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_ADDFB, drm_mode_addfb, DRM_MASTER|DRM_CONTROL_ALLOW), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_RMFB, drm_mode_rmfb, DRM_MASTER|DRM_CONTROL_ALLOW), -+ DRM_IOCTL_DEF(DRM_IOCTL_MODE_PAGE_FLIP, drm_mode_page_flip_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW), - }; - - #define DRM_CORE_IOCTL_COUNT ARRAY_SIZE( drm_ioctls ) -diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c -index 251bc0e..dcd9c66 100644 ---- a/drivers/gpu/drm/drm_fops.c -+++ b/drivers/gpu/drm/drm_fops.c -@@ -257,6 +257,8 @@ static int drm_open_helper(struct inode *inode, struct file *filp, - - INIT_LIST_HEAD(&priv->lhead); - INIT_LIST_HEAD(&priv->fbs); -+ INIT_LIST_HEAD(&priv->event_list); -+ init_waitqueue_head(&priv->event_wait); - - if (dev->driver->driver_features & DRIVER_GEM) - drm_gem_open(dev, priv); -@@ -429,6 +431,9 @@ int drm_release(struct inode *inode, struct file *filp) - { - struct drm_file *file_priv = filp->private_data; - struct drm_device *dev = file_priv->minor->dev; -+ struct drm_pending_flip *f, *ft; -+ struct drm_pending_event *e, *et; -+ - int retcode = 0; - - lock_kernel(); -@@ -451,6 +456,19 @@ int drm_release(struct inode *inode, struct file *filp) - if (file_priv->minor->master) - drm_master_release(dev, filp); - -+ mutex_lock(&dev->struct_mutex); -+ -+ /* Remove pending flips */ -+ list_for_each_entry_safe(f, ft, &dev->flip_list, link) -+ if (f->pending_event.file_priv == file_priv) -+ drm_finish_pending_flip(dev, f, 0); -+ -+ /* Remove unconsumed events */ -+ list_for_each_entry_safe(e, et, &file_priv->event_list, link) -+ e->destroy(e); -+ -+ mutex_unlock(&dev->struct_mutex); -+ - if (dev->driver->driver_features & DRIVER_GEM) - drm_gem_release(dev, file_priv); - -@@ -544,9 +562,55 @@ int drm_release(struct inode *inode, struct file *filp) - } - EXPORT_SYMBOL(drm_release); - --/** No-op. */ -+ssize_t drm_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *offset) -+{ -+ struct drm_file *file_priv = filp->private_data; -+ struct drm_device *dev = file_priv->minor->dev; -+ struct drm_pending_event *event; -+ ssize_t total, ret; -+ -+ ret = wait_event_interruptible(file_priv->event_wait, -+ !list_empty(&file_priv->event_list)); -+ if (ret < 0) -+ return ret; -+ -+ total = 0; -+ while (!list_empty(&file_priv->event_list)) { -+ mutex_lock(&dev->struct_mutex); -+ event = list_first_entry(&file_priv->event_list, -+ struct drm_pending_event, link); -+ if (total + event->event->length > count) { -+ mutex_unlock(&dev->struct_mutex); -+ break; -+ } -+ list_del(&event->link); -+ mutex_unlock(&dev->struct_mutex); -+ -+ if (copy_to_user(buffer + total, -+ event->event, event->event->length)) { -+ total = -EFAULT; -+ break; -+ } -+ -+ total += event->event->length; -+ event->destroy(event); -+ } -+ -+ return total; -+} -+EXPORT_SYMBOL(drm_read); -+ - unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait) - { -- return 0; -+ struct drm_file *file_priv = filp->private_data; -+ unsigned int mask = 0; -+ -+ poll_wait(filp, &file_priv->event_wait, wait); -+ -+ if (!list_empty(&file_priv->event_list)) -+ mask |= POLLIN | POLLRDNORM; -+ -+ return mask; - } - EXPORT_SYMBOL(drm_poll); -diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c -index f85aaf2..102d19d 100644 ---- a/drivers/gpu/drm/drm_irq.c -+++ b/drivers/gpu/drm/drm_irq.c -@@ -34,6 +34,7 @@ - */ - - #include "drmP.h" -+#include "drm_crtc_helper.h" - - #include /* For task queue support */ - -@@ -71,6 +72,44 @@ int drm_irq_by_busid(struct drm_device *dev, void *data, - return 0; - } - -+#define vblank_passed(a,b) ((long)(a - b) > 0) -+ -+void drm_finish_pending_flip(struct drm_device *dev, -+ struct drm_pending_flip *f, u32 frame) -+{ -+ struct timeval now; -+ -+ f->event.frame = frame; -+ do_gettimeofday(&now); -+ f->event.tv_sec = now.tv_sec; -+ f->event.tv_usec = now.tv_usec; -+ drm_vblank_put(dev, f->pipe); -+ list_del_init(&f->link); -+ list_add_tail(&f->pending_event.link, -+ &f->pending_event.file_priv->event_list); -+ if (f->old_fb) -+ f->old_fb->funcs->unpin(f->old_fb); -+ wake_up_interruptible(&f->pending_event.file_priv->event_wait); -+} -+ -+static void drm_flip_work_func(struct work_struct *work) -+{ -+ struct drm_device *dev = -+ container_of(work, struct drm_device, flip_work); -+ struct drm_pending_flip *f, *t; -+ u32 frame; -+ -+ mutex_lock(&dev->struct_mutex); -+ -+ list_for_each_entry_safe(f, t, &dev->flip_list, link) { -+ frame = drm_vblank_count(dev, f->pipe); -+ if (vblank_passed(frame, f->frame)) -+ drm_finish_pending_flip(dev, f, frame); -+ } -+ -+ mutex_unlock(&dev->struct_mutex); -+} -+ - static void vblank_disable_fn(unsigned long arg) - { - struct drm_device *dev = (struct drm_device *)arg; -@@ -161,6 +200,8 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs) - atomic_set(&dev->vblank_refcount[i], 0); - } - -+ INIT_WORK(&dev->flip_work, drm_flip_work_func); -+ - dev->vblank_disable_allowed = 0; - - return 0; -@@ -626,5 +667,7 @@ void drm_handle_vblank(struct drm_device *dev, int crtc) - { - atomic_inc(&dev->_vblank_count[crtc]); - DRM_WAKEUP(&dev->vbl_queue[crtc]); -+ schedule_work(&dev->flip_work); - } - EXPORT_SYMBOL(drm_handle_vblank); -+ -diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c -index 55bb8a8..65c8662 100644 ---- a/drivers/gpu/drm/drm_stub.c -+++ b/drivers/gpu/drm/drm_stub.c -@@ -220,6 +220,7 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev, - INIT_LIST_HEAD(&dev->ctxlist); - INIT_LIST_HEAD(&dev->vmalist); - INIT_LIST_HEAD(&dev->maplist); -+ INIT_LIST_HEAD(&dev->flip_list); - - spin_lock_init(&dev->count_lock); - spin_lock_init(&dev->drw_lock); -diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c -index dbe568c..b81305e 100644 ---- a/drivers/gpu/drm/i915/i915_drv.c -+++ b/drivers/gpu/drm/i915/i915_drv.c -@@ -206,6 +206,7 @@ static struct drm_driver driver = { - .mmap = drm_gem_mmap, - .poll = drm_poll, - .fasync = drm_fasync, -+ .read = drm_read, - #ifdef CONFIG_COMPAT - .compat_ioctl = i915_compat_ioctl, - #endif -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index 155719f..0d6e677 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -973,6 +973,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - u32 dspcntr, alignment; - int ret; - -+ BUG_ON(!mutex_is_locked(&dev->struct_mutex)); -+ - /* no fb bound */ - if (!crtc->fb) { - DRM_DEBUG("No FB bound\n"); -@@ -1008,17 +1010,14 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - BUG(); - } - -- mutex_lock(&dev->struct_mutex); - ret = i915_gem_object_pin(obj, alignment); - if (ret != 0) { -- mutex_unlock(&dev->struct_mutex); - return ret; - } - - ret = i915_gem_object_set_to_gtt_domain(obj, 1); - if (ret != 0) { - i915_gem_object_unpin(obj); -- mutex_unlock(&dev->struct_mutex); - return ret; - } - -@@ -1029,7 +1028,6 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - ret = i915_gem_object_get_fence_reg(obj); - if (ret != 0) { - i915_gem_object_unpin(obj); -- mutex_unlock(&dev->struct_mutex); - return ret; - } - } -@@ -1054,7 +1052,6 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - default: - DRM_ERROR("Unknown color depth\n"); - i915_gem_object_unpin(obj); -- mutex_unlock(&dev->struct_mutex); - return -EINVAL; - } - if (IS_I965G(dev)) { -@@ -1086,17 +1083,14 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - I915_READ(dspbase); - } - -- intel_wait_for_vblank(dev); -- - if (old_fb) { - intel_fb = to_intel_framebuffer(old_fb); - obj_priv = intel_fb->obj->driver_private; -+ intel_wait_for_vblank(dev); - i915_gem_object_unpin(intel_fb->obj); - } - intel_increase_pllclock(crtc, true); - -- mutex_unlock(&dev->struct_mutex); -- - if (!dev->primary->master) - return 0; - -@@ -2732,7 +2726,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, - I915_WRITE(dspcntr_reg, dspcntr); - - /* Flush the plane changes */ -+ mutex_lock(&dev->struct_mutex); - ret = intel_pipe_set_base(crtc, x, y, old_fb); -+ mutex_unlock(&dev->struct_mutex); - - intel_update_watermarks(dev); - -@@ -3521,6 +3517,7 @@ static const struct drm_crtc_funcs intel_crtc_funcs = { - .gamma_set = intel_crtc_gamma_set, - .set_config = drm_crtc_helper_set_config, - .destroy = intel_crtc_destroy, -+ .set_base = drm_crtc_helper_set_base, - }; - - -@@ -3533,7 +3530,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) - if (intel_crtc == NULL) - return; - -- drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs); -+ drm_crtc_init(dev, &intel_crtc->base, pipe, &intel_crtc_funcs); - - drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256); - intel_crtc->pipe = pipe; -@@ -3717,9 +3714,18 @@ static int intel_user_framebuffer_create_handle(struct drm_framebuffer *fb, - return drm_gem_handle_create(file_priv, object, handle); - } - -+static void intel_user_framebuffer_unpin(struct drm_framebuffer *fb) -+{ -+ struct intel_framebuffer *intel_fb; -+ -+ intel_fb = to_intel_framebuffer(fb); -+ i915_gem_object_unpin(intel_fb->obj); -+} -+ - static const struct drm_framebuffer_funcs intel_fb_funcs = { - .destroy = intel_user_framebuffer_destroy, - .create_handle = intel_user_framebuffer_create_handle, -+ .unpin = intel_user_framebuffer_unpin - }; - - int intel_framebuffer_create(struct drm_device *dev, -diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c -index f5739e2..0ec45bc 100644 ---- a/drivers/gpu/drm/radeon/radeon_display.c -+++ b/drivers/gpu/drm/radeon/radeon_display.c -@@ -168,6 +168,7 @@ static const struct drm_crtc_funcs radeon_crtc_funcs = { - .gamma_set = radeon_crtc_gamma_set, - .set_config = drm_crtc_helper_set_config, - .destroy = radeon_crtc_destroy, -+ .set_base = drm_crtc_helper_set_base, - }; - - static void radeon_crtc_init(struct drm_device *dev, int index) -@@ -180,7 +181,7 @@ static void radeon_crtc_init(struct drm_device *dev, int index) - if (radeon_crtc == NULL) - return; - -- drm_crtc_init(dev, &radeon_crtc->base, &radeon_crtc_funcs); -+ drm_crtc_init(dev, &radeon_crtc->base, index, &radeon_crtc_funcs); - - drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256); - radeon_crtc->crtc_id = index; -diff --git a/include/drm/drm.h b/include/drm/drm.h -index 7cb50bd..1920323 100644 ---- a/include/drm/drm.h -+++ b/include/drm/drm.h -@@ -686,6 +686,7 @@ struct drm_gem_open { - #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) - #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) - #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) -+#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOW( 0xB0, struct drm_mode_page_flip) - - /** - * Device specific ioctls should only be in their respective headers -@@ -698,6 +699,30 @@ struct drm_gem_open { - #define DRM_COMMAND_BASE 0x40 - #define DRM_COMMAND_END 0xA0 - -+/** -+ * Header for events written back to userspace on the drm fd. The -+ * type defines the type of event, the length specifies the total -+ * length of the event (including the header), and user_data is -+ * typically a 64 bit value passed with the ioctl that triggered the -+ * event. A read on the drm fd will always only return complete -+ * events, that is, if for example the read buffer is 100 bytes, and -+ * there are two 64 byte events pending, only one will be returned. -+ */ -+struct drm_event { -+ __u32 type; -+ __u32 length; -+}; -+ -+#define DRM_EVENT_MODE_PAGE_FLIP 0x01 -+ -+struct drm_event_page_flip { -+ struct drm_event base; -+ __u64 user_data; -+ __u32 tv_sec; -+ __u32 tv_usec; -+ __u32 frame; -+}; -+ - /* typedef area */ - #ifndef __KERNEL__ - typedef struct drm_clip_rect drm_clip_rect_t; -diff --git a/include/drm/drmP.h b/include/drm/drmP.h -index eeefb63..5431888 100644 ---- a/include/drm/drmP.h -+++ b/include/drm/drmP.h -@@ -426,6 +426,14 @@ struct drm_buf_entry { - struct drm_freelist freelist; - }; - -+/* Event queued up for userspace to read */ -+struct drm_pending_event { -+ struct drm_event *event; -+ struct list_head link; -+ struct drm_file *file_priv; -+ void (*destroy) (struct drm_pending_event *event); -+}; -+ - /** File private data */ - struct drm_file { - int authenticated; -@@ -449,6 +457,9 @@ struct drm_file { - struct drm_master *master; /* master this node is currently associated with - N.B. not always minor->master */ - struct list_head fbs; -+ -+ wait_queue_head_t event_wait; -+ struct list_head event_list; - }; - - /** Wait queue */ -@@ -897,6 +908,16 @@ struct drm_minor { - struct drm_mode_group mode_group; - }; - -+struct drm_pending_flip { -+ struct drm_pending_event pending_event; -+ struct drm_framebuffer *old_fb; -+ struct drm_crtc *crtc; -+ u32 frame; -+ int pipe; -+ struct list_head link; -+ struct drm_event_page_flip event; -+}; -+ - /** - * DRM device structure. This structure represent a complete card that - * may contain multiple heads. -@@ -996,6 +1017,13 @@ struct drm_device { - - u32 max_vblank_count; /**< size of vblank counter register */ - -+ struct work_struct flip_work; -+ -+ /** -+ * List of objects waiting on flip completion -+ */ -+ struct list_head flip_list; -+ - /*@} */ - cycles_t ctx_start; - cycles_t lck_start; -@@ -1132,6 +1160,8 @@ extern int drm_lastclose(struct drm_device *dev); - extern int drm_open(struct inode *inode, struct file *filp); - extern int drm_stub_open(struct inode *inode, struct file *filp); - extern int drm_fasync(int fd, struct file *filp, int on); -+extern ssize_t drm_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *offset); - extern int drm_release(struct inode *inode, struct file *filp); - - /* Mapping support (drm_vm.h) */ -@@ -1298,6 +1328,8 @@ extern void drm_vblank_pre_modeset(struct drm_device *dev, int crtc); - extern void drm_vblank_post_modeset(struct drm_device *dev, int crtc); - extern int drm_modeset_ctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -+extern void drm_finish_pending_flip(struct drm_device *dev, -+ struct drm_pending_flip *f, u32 frame); - - /* AGP/GART support (drm_agpsupport.h) */ - extern struct drm_agp_head *drm_agp_init(struct drm_device *dev); -diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h -index ae1e9e1..525f770 100644 ---- a/include/drm/drm_crtc.h -+++ b/include/drm/drm_crtc.h -@@ -238,6 +238,12 @@ struct drm_display_info { - }; - - struct drm_framebuffer_funcs { -+ /* -+ * Unpin the old fb after setting a mode. Must be called -+ * after the old framebuffer is no longer visible, ie, after -+ * the next vblank, typically. -+ */ -+ void (*unpin)(struct drm_framebuffer *fb); - void (*destroy)(struct drm_framebuffer *framebuffer); - int (*create_handle)(struct drm_framebuffer *fb, - struct drm_file *file_priv, -@@ -290,6 +296,7 @@ struct drm_property { - struct drm_crtc; - struct drm_connector; - struct drm_encoder; -+struct drm_pending_flip; - - /** - * drm_crtc_funcs - control CRTCs for a given device -@@ -333,17 +340,29 @@ struct drm_crtc_funcs { - void (*destroy)(struct drm_crtc *crtc); - - int (*set_config)(struct drm_mode_set *set); -+ -+ /* -+ * Move the crtc on the current fb to the given position. -+ * This function is optional. If old_fb is provided, the -+ * function will wait for vblank and unpin it. If old_fb is -+ * NULL, nothing is unpinned and the caller must call -+ * mode_unpin_fb to release the old framebuffer. -+ */ -+ int (*set_base)(struct drm_crtc *crtc, int x, int y, -+ struct drm_framebuffer *old_fb); - }; - - /** - * drm_crtc - central CRTC control structure - * @enabled: is this CRTC enabled? -+ * @pipe: pipe number (as seen by DRM vblank functions) - * @x: x position on screen - * @y: y position on screen - * @desired_mode: new desired mode - * @desired_x: desired x for desired_mode - * @desired_y: desired y for desired_mode - * @funcs: CRTC control functions -+ * @async_work: work queue for async set base calls - * - * Each CRTC may have one or more connectors associated with it. This structure - * allows the CRTC to be controlled. -@@ -361,6 +380,7 @@ struct drm_crtc { - - struct drm_display_mode mode; - -+ int pipe; - int x, y; - struct drm_display_mode *desired_mode; - int desired_x, desired_y; -@@ -370,6 +390,10 @@ struct drm_crtc { - uint32_t gamma_size; - uint16_t *gamma_store; - -+ /* Allow async set_pipe_base calls for flipping */ -+ struct work_struct async_flip; -+ struct drm_pending_flip *pending_flip; -+ - /* if you are using the helper */ - void *helper_private; - }; -@@ -597,6 +621,7 @@ struct drm_mode_config { - - extern void drm_crtc_init(struct drm_device *dev, - struct drm_crtc *crtc, -+ int pipe, - const struct drm_crtc_funcs *funcs); - extern void drm_crtc_cleanup(struct drm_crtc *crtc); - -@@ -744,6 +769,8 @@ extern int drm_mode_gamma_get_ioctl(struct drm_device *dev, - extern int drm_mode_gamma_set_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); - extern bool drm_detect_hdmi_monitor(struct edid *edid); -+extern int drm_mode_page_flip_ioctl(struct drm_device *dev, void *data, -+ struct drm_file *file_priv); - extern struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, - int hdisplay, int vdisplay, int vrefresh, - bool reduced, bool interlaced); -diff --git a/include/drm/drm_crtc_helper.h b/include/drm/drm_crtc_helper.h -index 4c8daca..b5bd0b8 100644 ---- a/include/drm/drm_crtc_helper.h -+++ b/include/drm/drm_crtc_helper.h -@@ -126,4 +126,8 @@ static inline void drm_connector_helper_add(struct drm_connector *connector, - } - - extern int drm_helper_resume_force_mode(struct drm_device *dev); -+ -+extern int drm_crtc_helper_set_base(struct drm_crtc *crtc, int x, int y, -+ struct drm_framebuffer *old_fb); -+ - #endif -diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h -index 1f90841..6f08a77 100644 ---- a/include/drm/drm_mode.h -+++ b/include/drm/drm_mode.h -@@ -268,4 +268,20 @@ struct drm_mode_crtc_lut { - __u64 blue; - }; - -+#define DRM_MODE_PAGE_FLIP_WAIT (1<<0) /* block on previous page flip */ -+#define DRM_MODE_PAGE_FLIP_FLAGS_MASK (DRM_MODE_PAGE_FLIP_WAIT) -+ -+struct drm_mode_page_flip { -+ /** Handle of new front buffer */ -+ __u32 fb_id; -+ __u32 crtc_id; -+ -+ /* 64 bit cookie returned to userspace in the page flip event. */ -+ __u64 user_data; -+ /** -+ * page flip flags (wait on flip only for now) -+ */ -+ __u32 flags; -+}; -+ - #endif -diff -up linux-2.6.30.noarch/drivers/gpu/drm/nouveau/nv04_crtc.c.da linux-2.6.30.noarch/drivers/gpu/drm/nouveau/nv04_crtc.c -diff -up linux-2.6.30.noarch/drivers/gpu/drm/nouveau/nv50_crtc.c.da linux-2.6.30.noarch/drivers/gpu/drm/nouveau/nv50_crtc.c diff --git a/packages/linux/patches/intel-kms-overlay-for-2.6.32.diff b/packages/linux/patches/intel-kms-overlay-for-2.6.32.diff deleted file mode 100644 index 3937b17483..0000000000 --- a/packages/linux/patches/intel-kms-overlay-for-2.6.32.diff +++ /dev/null @@ -1,1746 +0,0 @@ -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/i915_dma.c linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_dma.c ---- linux-2.6.32.2/drivers/gpu/drm/i915/i915_dma.c 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_dma.c 2009-12-19 11:54:31.017126352 +0100 -@@ -807,6 +807,9 @@ - case I915_PARAM_NUM_FENCES_AVAIL: - value = dev_priv->num_fence_regs - dev_priv->fence_reg_start; - break; -+ case I915_PARAM_HAS_OVERLAY: -+ value = dev_priv->overlay ? 1 : 0; -+ break; - default: - DRM_DEBUG_DRIVER("Unknown parameter %d\n", - param->param); -@@ -1548,6 +1551,8 @@ - mutex_unlock(&dev->struct_mutex); - drm_mm_takedown(&dev_priv->vram); - i915_gem_lastclose(dev); -+ -+ intel_cleanup_overlay(dev); - } - - pci_dev_put(dev_priv->bridge_dev); -@@ -1656,6 +1661,8 @@ - DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), - DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0), - DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, 0), -+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW), -+ DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW), - }; - - int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/i915_drv.h linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_drv.h ---- linux-2.6.32.2/drivers/gpu/drm/i915/i915_drv.h 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_drv.h 2009-12-19 11:54:31.019126448 +0100 -@@ -170,6 +170,8 @@ - /* clock gating init */ - }; - -+struct intel_overlay; -+ - typedef struct drm_i915_private { - struct drm_device *dev; - -@@ -240,6 +242,9 @@ - - struct intel_opregion opregion; - -+ /* overlay */ -+ struct intel_overlay *overlay; -+ - /* LVDS info */ - int backlight_duty_cycle; /* restore backlight to this value */ - bool panel_wants_dither; -@@ -813,6 +818,10 @@ - int i915_gem_do_init(struct drm_device *dev, unsigned long start, - unsigned long end); - int i915_gem_idle(struct drm_device *dev); -+uint32_t i915_add_request(struct drm_device *dev, struct drm_file *file_priv, -+ uint32_t flush_domains); -+int i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible); -+int i915_lp_ring_sync(struct drm_device *dev); - int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf); - int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, - int write); -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/i915_gem.c linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_gem.c ---- linux-2.6.32.2/drivers/gpu/drm/i915/i915_gem.c 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_gem.c 2009-12-19 11:54:31.033126624 +0100 -@@ -1584,7 +1584,7 @@ - * - * Returned sequence numbers are nonzero on success. - */ --static uint32_t -+uint32_t - i915_add_request(struct drm_device *dev, struct drm_file *file_priv, - uint32_t flush_domains) - { -@@ -1821,12 +1821,8 @@ - mutex_unlock(&dev->struct_mutex); - } - --/** -- * Waits for a sequence number to be signaled, and cleans up the -- * request and object lists appropriately for that event. -- */ --static int --i915_wait_request(struct drm_device *dev, uint32_t seqno) -+int -+i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible) - { - drm_i915_private_t *dev_priv = dev->dev_private; - u32 ier; -@@ -1853,10 +1849,15 @@ - - dev_priv->mm.waiting_gem_seqno = seqno; - i915_user_irq_get(dev); -- ret = wait_event_interruptible(dev_priv->irq_queue, -- i915_seqno_passed(i915_get_gem_seqno(dev), -- seqno) || -- atomic_read(&dev_priv->mm.wedged)); -+ if (interruptible) -+ ret = wait_event_interruptible(dev_priv->irq_queue, -+ i915_seqno_passed(i915_get_gem_seqno(dev), seqno) || -+ atomic_read(&dev_priv->mm.wedged)); -+ else -+ wait_event(dev_priv->irq_queue, -+ i915_seqno_passed(i915_get_gem_seqno(dev), seqno) || -+ atomic_read(&dev_priv->mm.wedged)); -+ - i915_user_irq_put(dev); - dev_priv->mm.waiting_gem_seqno = 0; - -@@ -1880,6 +1881,34 @@ - return ret; - } - -+/** -+ * Waits for a sequence number to be signaled, and cleans up the -+ * request and object lists appropriately for that event. -+ */ -+static int -+i915_wait_request(struct drm_device *dev, uint32_t seqno) -+{ -+ return i915_do_wait_request(dev, seqno, 1); -+} -+ -+/** -+ * Waits for the ring to finish up to the latest request. Usefull for waiting -+ * for flip events, e.g for the overlay support. */ -+int i915_lp_ring_sync(struct drm_device *dev) -+{ -+ uint32_t seqno; -+ int ret; -+ -+ seqno = i915_add_request(dev, NULL, 0); -+ -+ if (seqno == 0) -+ return -ENOMEM; -+ -+ ret = i915_do_wait_request(dev, seqno, 0); -+ BUG_ON(ret == -ERESTARTSYS); -+ return ret; -+} -+ - static void - i915_gem_flush(struct drm_device *dev, - uint32_t invalidate_domains, -@@ -1948,7 +1977,7 @@ - #endif - BEGIN_LP_RING(2); - OUT_RING(cmd); -- OUT_RING(0); /* noop */ -+ OUT_RING(MI_NOOP); - ADVANCE_LP_RING(); - } - } -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/i915_reg.h linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_reg.h ---- linux-2.6.32.2/drivers/gpu/drm/i915/i915_reg.h 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/i915_reg.h 2009-12-19 11:54:31.036126278 +0100 -@@ -140,6 +140,7 @@ - #define MI_NOOP MI_INSTR(0, 0) - #define MI_USER_INTERRUPT MI_INSTR(0x02, 0) - #define MI_WAIT_FOR_EVENT MI_INSTR(0x03, 0) -+#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) - #define MI_WAIT_FOR_PLANE_B_FLIP (1<<6) - #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) - #define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) -@@ -151,6 +152,10 @@ - #define MI_END_SCENE (1 << 4) /* flush binner and incr scene count */ - #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0) - #define MI_REPORT_HEAD MI_INSTR(0x07, 0) -+#define MI_OVERLAY_FLIP MI_INSTR(0x11,0) -+#define MI_OVERLAY_CONTINUE (0x0<<21) -+#define MI_OVERLAY_ON (0x1<<21) -+#define MI_OVERLAY_OFF (0x2<<21) - #define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0) - #define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1) - #define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */ -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/intel_display.c linux-2.6.32.2.patch/drivers/gpu/drm/i915/intel_display.c ---- linux-2.6.32.2/drivers/gpu/drm/i915/intel_display.c 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/intel_display.c 2009-12-19 11:56:16.720124643 +0100 -@@ -1803,6 +1803,22 @@ - } - } - -+static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable) -+{ -+ struct intel_overlay *overlay; -+ -+ if (!enable && intel_crtc->overlay) { -+ overlay = intel_crtc->overlay; -+ mutex_lock(&overlay->dev->struct_mutex); -+ intel_overlay_switch_off(overlay); -+ mutex_unlock(&overlay->dev->struct_mutex); -+ } -+ /* Let userspace switch the overlay on again. In most cases userspace -+ * has to recompute where to put it anyway. */ -+ -+ return; -+} -+ - static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) - { - struct drm_device *dev = crtc->dev; -@@ -1861,12 +1877,12 @@ - intel_update_fbc(crtc, &crtc->mode); - - /* Give the overlay scaler a chance to enable if it's on this pipe */ -- //intel_crtc_dpms_video(crtc, true); TODO -+ intel_crtc_dpms_overlay(intel_crtc, true); - break; - case DRM_MODE_DPMS_OFF: - intel_update_watermarks(dev); - /* Give the overlay scaler a chance to disable if it's on this pipe */ -- //intel_crtc_dpms_video(crtc, FALSE); TODO -+ intel_crtc_dpms_overlay(intel_crtc, true); - drm_vblank_off(dev, pipe); - - if (dev_priv->cfb_plane == plane && -@@ -2062,7 +2078,7 @@ - * Return the pipe currently connected to the panel fitter, - * or -1 if the panel fitter is not present or not in use - */ --static int intel_panel_fitter_pipe (struct drm_device *dev) -+int intel_panel_fitter_pipe (struct drm_device *dev) - { - struct drm_i915_private *dev_priv = dev->dev_private; - u32 pfit_control; -@@ -4347,7 +4363,7 @@ - } - - /* Returns the core display clock speed */ -- if (IS_I945G(dev)) -+ if (IS_I945G(dev) || (IS_G33(dev) && ! IS_IGDGM(dev))) - dev_priv->display.get_display_clock_speed = - i945_get_display_clock_speed; - else if (IS_I915G(dev)) -@@ -4445,6 +4461,8 @@ - INIT_WORK(&dev_priv->idle_work, intel_idle_update); - setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer, - (unsigned long)dev); -+ -+ intel_setup_overlay(dev); - } - - void intel_modeset_cleanup(struct drm_device *dev) -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/intel_drv.h linux-2.6.32.2.patch/drivers/gpu/drm/i915/intel_drv.h ---- linux-2.6.32.2/drivers/gpu/drm/i915/intel_drv.h 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/intel_drv.h 2009-12-19 11:54:31.044124074 +0100 -@@ -110,6 +110,27 @@ - int clone_mask; - }; - -+struct intel_crtc; -+struct intel_overlay { -+ struct drm_device *dev; -+ struct intel_crtc *crtc; -+ struct drm_i915_gem_object *vid_bo; -+ struct drm_i915_gem_object *old_vid_bo; -+ int active; -+ int pfit_active; -+ u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */ -+ u32 color_key; -+ u32 brightness, contrast, saturation; -+ u32 old_xscale, old_yscale; -+ /* register access */ -+ u32 flip_addr; -+ struct drm_i915_gem_object *reg_bo; -+ void *virt_addr; -+ /* flip handling */ -+ int hw_wedged; -+ uint32_t last_flip_req; -+}; -+ - struct intel_crtc { - struct drm_crtc base; - enum pipe pipe; -@@ -121,6 +142,7 @@ - bool busy; /* is scanout buffer being updated frequently? */ - struct timer_list idle_timer; - bool lowfreq_avail; -+ struct intel_overlay *overlay; - }; - - #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) -@@ -148,6 +170,7 @@ - extern void intel_edp_link_config (struct intel_output *, int *, int *); - - -+extern int intel_panel_fitter_pipe (struct drm_device *dev); - extern void intel_crtc_load_lut(struct drm_crtc *crtc); - extern void intel_encoder_prepare (struct drm_encoder *encoder); - extern void intel_encoder_commit (struct drm_encoder *encoder); -@@ -183,4 +206,11 @@ - struct drm_framebuffer **fb, - struct drm_gem_object *obj); - -+extern void intel_setup_overlay(struct drm_device *dev); -+extern void intel_cleanup_overlay(struct drm_device *dev); -+extern int intel_overlay_switch_off(struct intel_overlay *overlay); -+extern int intel_overlay_put_image(struct drm_device *dev, void *data, -+ struct drm_file *file_priv); -+extern int intel_overlay_attrs(struct drm_device *dev, void *data, -+ struct drm_file *file_priv); - #endif /* __INTEL_DRV_H__ */ -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/intel_overlay.c linux-2.6.32.2.patch/drivers/gpu/drm/i915/intel_overlay.c ---- linux-2.6.32.2/drivers/gpu/drm/i915/intel_overlay.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/intel_overlay.c 2009-12-19 11:54:31.050123801 +0100 -@@ -0,0 +1,1317 @@ -+/* -+ * Copyright © 2009 -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the next -+ * paragraph) shall be included in all copies or substantial portions of the -+ * Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -+ * SOFTWARE. -+ * -+ * Authors: -+ * Daniel Vetter -+ * -+ * Derived from Xorg ddx, xf86-video-intel, src/i830_video.c -+ */ -+#include "drmP.h" -+#include "drm.h" -+#include "i915_drm.h" -+#include "i915_drv.h" -+#include "i915_reg.h" -+#include "intel_drv.h" -+ -+/* Limits for overlay size. According to intel doc, the real limits are: -+ * Y width: 4095, UV width (planar): 2047, Y height: 2047, -+ * UV width (planar): * 1023. But the xorg thinks 2048 for height and width. Use -+ * the mininum of both. */ -+#define IMAGE_MAX_WIDTH 2048 -+#define IMAGE_MAX_HEIGHT 2046 /* 2 * 1023 */ -+/* on 830 and 845 these large limits result in the card hanging */ -+#define IMAGE_MAX_WIDTH_LEGACY 1024 -+#define IMAGE_MAX_HEIGHT_LEGACY 1088 -+ -+/* overlay register definitions */ -+/* OCMD register */ -+#define OCMD_TILED_SURFACE (0x1<<19) -+#define OCMD_MIRROR_MASK (0x3<<17) -+#define OCMD_MIRROR_MODE (0x3<<17) -+#define OCMD_MIRROR_HORIZONTAL (0x1<<17) -+#define OCMD_MIRROR_VERTICAL (0x2<<17) -+#define OCMD_MIRROR_BOTH (0x3<<17) -+#define OCMD_BYTEORDER_MASK (0x3<<14) /* zero for YUYV or FOURCC YUY2 */ -+#define OCMD_UV_SWAP (0x1<<14) /* YVYU */ -+#define OCMD_Y_SWAP (0x2<<14) /* UYVY or FOURCC UYVY */ -+#define OCMD_Y_AND_UV_SWAP (0x3<<14) /* VYUY */ -+#define OCMD_SOURCE_FORMAT_MASK (0xf<<10) -+#define OCMD_RGB_888 (0x1<<10) /* not in i965 Intel docs */ -+#define OCMD_RGB_555 (0x2<<10) /* not in i965 Intel docs */ -+#define OCMD_RGB_565 (0x3<<10) /* not in i965 Intel docs */ -+#define OCMD_YUV_422_PACKED (0x8<<10) -+#define OCMD_YUV_411_PACKED (0x9<<10) /* not in i965 Intel docs */ -+#define OCMD_YUV_420_PLANAR (0xc<<10) -+#define OCMD_YUV_422_PLANAR (0xd<<10) -+#define OCMD_YUV_410_PLANAR (0xe<<10) /* also 411 */ -+#define OCMD_TVSYNCFLIP_PARITY (0x1<<9) -+#define OCMD_TVSYNCFLIP_ENABLE (0x1<<7) -+#define OCMD_BUF_TYPE_MASK (Ox1<<5) -+#define OCMD_BUF_TYPE_FRAME (0x0<<5) -+#define OCMD_BUF_TYPE_FIELD (0x1<<5) -+#define OCMD_TEST_MODE (0x1<<4) -+#define OCMD_BUFFER_SELECT (0x3<<2) -+#define OCMD_BUFFER0 (0x0<<2) -+#define OCMD_BUFFER1 (0x1<<2) -+#define OCMD_FIELD_SELECT (0x1<<2) -+#define OCMD_FIELD0 (0x0<<1) -+#define OCMD_FIELD1 (0x1<<1) -+#define OCMD_ENABLE (0x1<<0) -+ -+/* OCONFIG register */ -+#define OCONF_PIPE_MASK (0x1<<18) -+#define OCONF_PIPE_A (0x0<<18) -+#define OCONF_PIPE_B (0x1<<18) -+#define OCONF_GAMMA2_ENABLE (0x1<<16) -+#define OCONF_CSC_MODE_BT601 (0x0<<5) -+#define OCONF_CSC_MODE_BT709 (0x1<<5) -+#define OCONF_CSC_BYPASS (0x1<<4) -+#define OCONF_CC_OUT_8BIT (0x1<<3) -+#define OCONF_TEST_MODE (0x1<<2) -+#define OCONF_THREE_LINE_BUFFER (0x1<<0) -+#define OCONF_TWO_LINE_BUFFER (0x0<<0) -+ -+/* DCLRKM (dst-key) register */ -+#define DST_KEY_ENABLE (0x1<<31) -+#define CLK_RGB24_MASK 0x0 -+#define CLK_RGB16_MASK 0x070307 -+#define CLK_RGB15_MASK 0x070707 -+#define CLK_RGB8I_MASK 0xffffff -+ -+#define RGB16_TO_COLORKEY(c) \ -+ (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3)) -+#define RGB15_TO_COLORKEY(c) \ -+ (((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3)) -+ -+/* overlay flip addr flag */ -+#define OFC_UPDATE 0x1 -+ -+/* polyphase filter coefficients */ -+#define N_HORIZ_Y_TAPS 5 -+#define N_VERT_Y_TAPS 3 -+#define N_HORIZ_UV_TAPS 3 -+#define N_VERT_UV_TAPS 3 -+#define N_PHASES 17 -+#define MAX_TAPS 5 -+ -+/* memory bufferd overlay registers */ -+struct overlay_registers { -+ u32 OBUF_0Y; -+ u32 OBUF_1Y; -+ u32 OBUF_0U; -+ u32 OBUF_0V; -+ u32 OBUF_1U; -+ u32 OBUF_1V; -+ u32 OSTRIDE; -+ u32 YRGB_VPH; -+ u32 UV_VPH; -+ u32 HORZ_PH; -+ u32 INIT_PHS; -+ u32 DWINPOS; -+ u32 DWINSZ; -+ u32 SWIDTH; -+ u32 SWIDTHSW; -+ u32 SHEIGHT; -+ u32 YRGBSCALE; -+ u32 UVSCALE; -+ u32 OCLRC0; -+ u32 OCLRC1; -+ u32 DCLRKV; -+ u32 DCLRKM; -+ u32 SCLRKVH; -+ u32 SCLRKVL; -+ u32 SCLRKEN; -+ u32 OCONFIG; -+ u32 OCMD; -+ u32 RESERVED1; /* 0x6C */ -+ u32 OSTART_0Y; -+ u32 OSTART_1Y; -+ u32 OSTART_0U; -+ u32 OSTART_0V; -+ u32 OSTART_1U; -+ u32 OSTART_1V; -+ u32 OTILEOFF_0Y; -+ u32 OTILEOFF_1Y; -+ u32 OTILEOFF_0U; -+ u32 OTILEOFF_0V; -+ u32 OTILEOFF_1U; -+ u32 OTILEOFF_1V; -+ u32 FASTHSCALE; /* 0xA0 */ -+ u32 UVSCALEV; /* 0xA4 */ -+ u32 RESERVEDC[(0x200 - 0xA8) / 4]; /* 0xA8 - 0x1FC */ -+ u16 Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */ -+ u16 RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES]; -+ u16 Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */ -+ u16 RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES]; -+ u16 UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */ -+ u16 RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES]; -+ u16 UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */ -+ u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES]; -+}; -+ -+/* overlay flip addr flag */ -+#define OFC_UPDATE 0x1 -+ -+#define OVERLAY_NONPHYSICAL(dev) (IS_G33(dev) || IS_I965G(dev)) -+#define OVERLAY_EXISTS(dev) (!IS_G4X(dev) && !IS_IGDNG(dev)) -+ -+ -+static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_overlay *overlay) -+{ -+ drm_i915_private_t *dev_priv = overlay->dev->dev_private; -+ struct overlay_registers *regs; -+ -+ /* no recursive mappings */ -+ BUG_ON(overlay->virt_addr); -+ -+ if (OVERLAY_NONPHYSICAL(overlay->dev)) { -+ regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, -+ overlay->reg_bo->gtt_offset); -+ -+ if (!regs) { -+ DRM_ERROR("failed to map overlay regs in GTT\n"); -+ return NULL; -+ } -+ } else -+ regs = overlay->reg_bo->phys_obj->handle->vaddr; -+ -+ return overlay->virt_addr = regs; -+} -+ -+static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay) -+{ -+ struct drm_device *dev = overlay->dev; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ -+ if (OVERLAY_NONPHYSICAL(overlay->dev)) -+ io_mapping_unmap_atomic(overlay->virt_addr); -+ -+ overlay->virt_addr = NULL; -+ -+ I915_READ(OVADD); /* flush wc cashes */ -+ -+ return; -+} -+ -+/* overlay needs to be disable in OCMD reg */ -+static int intel_overlay_on(struct intel_overlay *overlay) -+{ -+ struct drm_device *dev = overlay->dev; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ int ret; -+ RING_LOCALS; -+ -+ BUG_ON(overlay->active); -+ -+ BEGIN_LP_RING(6); -+ OUT_RING(MI_FLUSH); -+ OUT_RING(MI_NOOP); -+ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_ON); -+ OUT_RING(overlay->flip_addr | OFC_UPDATE); -+ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); -+ OUT_RING(MI_NOOP); -+ ADVANCE_LP_RING(); -+ -+ ret = i915_lp_ring_sync(dev); -+ if (ret != 0) { -+ DRM_ERROR("intel overlay: ring sync failed, hw likely wedged\n"); -+ overlay->hw_wedged = 1; -+ return 0; -+ } -+ -+ overlay->active = 1; -+ -+ return 0; -+} -+ -+/* overlay needs to be enabled in OCMD reg */ -+static void intel_overlay_continue(struct intel_overlay *overlay, -+ bool load_polyphase_filter) -+{ -+ struct drm_device *dev = overlay->dev; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ u32 flip_addr = overlay->flip_addr; -+ u32 tmp; -+ RING_LOCALS; -+ -+ BUG_ON(!overlay->active); -+ -+ if (load_polyphase_filter) -+ flip_addr |= OFC_UPDATE; -+ -+ /* check for underruns */ -+ tmp = I915_READ(DOVSTA); -+ if (tmp & (1 << 17)) -+ DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp); -+ -+ BEGIN_LP_RING(4); -+ OUT_RING(MI_FLUSH); -+ OUT_RING(MI_NOOP); -+ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE); -+ OUT_RING(flip_addr); -+ ADVANCE_LP_RING(); -+ -+ overlay->last_flip_req = i915_add_request(dev, NULL, 0); -+} -+ -+static int intel_overlay_wait_flip(struct intel_overlay *overlay) -+{ -+ struct drm_device *dev = overlay->dev; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ int ret; -+ u32 tmp; -+ RING_LOCALS; -+ -+ if (overlay->last_flip_req != 0) { -+ ret = i915_do_wait_request(dev, overlay->last_flip_req, 0); -+ -+ if (ret != 0) -+ return ret; -+ -+ overlay->last_flip_req = 0; -+ -+ tmp = I915_READ(ISR); -+ -+ if (!(tmp & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) -+ return 0; -+ } -+ -+ /* synchronous slowpath */ -+ BEGIN_LP_RING(2); -+ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); -+ OUT_RING(MI_NOOP); -+ ADVANCE_LP_RING(); -+ -+ /* run in lockstep with the hw for easier testing */ -+ ret = i915_lp_ring_sync(dev); -+ if (ret != 0) { -+ DRM_ERROR("intel overlay: ring sync failed, hw likely wedged\n"); -+ overlay->hw_wedged = 1; -+ } -+ -+ return ret; -+} -+ -+/* overlay needs to be disabled in OCMD reg */ -+static int intel_overlay_off(struct intel_overlay *overlay) -+{ -+ u32 flip_addr = overlay->flip_addr; -+ struct drm_device *dev = overlay->dev; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ int ret; -+ RING_LOCALS; -+ -+ BUG_ON(!overlay->active); -+ -+ /* According to intel docs the overlay hw may hang (when switching -+ * off) without loading the filter coeffs. It is however unclear whether -+ * this applies to the disabling of the overlay or to the switching off -+ * of the hw. Do it in both cases */ -+ flip_addr |= OFC_UPDATE; -+ -+ /* wait for overlay to go idle */ -+ BEGIN_LP_RING(6); -+ OUT_RING(MI_FLUSH); -+ OUT_RING(MI_NOOP); -+ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE); -+ OUT_RING(flip_addr); -+ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); -+ OUT_RING(MI_NOOP); -+ ADVANCE_LP_RING(); -+ -+ ret = i915_lp_ring_sync(dev); -+ if (ret != 0) { -+ DRM_ERROR("intel overlay: ring sync failed, hw likely wedged\n"); -+ overlay->hw_wedged = 1; -+ return ret; -+ } -+ -+ /* turn overlay off */ -+ BEGIN_LP_RING(6); -+ OUT_RING(MI_FLUSH); -+ OUT_RING(MI_NOOP); -+ OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF); -+ OUT_RING(flip_addr); -+ OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); -+ OUT_RING(MI_NOOP); -+ ADVANCE_LP_RING(); -+ -+ ret = i915_lp_ring_sync(dev); -+ if (ret != 0) { -+ DRM_ERROR("intel overlay: ring sync failed, hw likely wedged\n"); -+ overlay->hw_wedged = 1; -+ return ret; -+ } -+ -+ overlay->active = 0; -+ -+ return ret; -+} -+ -+/* Wait for pending overlay flip and release old frame. -+ * Needs to be called before the overlay register are changed -+ * via intel_overlay_(un)map_regs_atomic */ -+static int intel_overlay_release_old_vid(struct intel_overlay *overlay) -+{ -+ int ret; -+ struct drm_gem_object *obj; -+ -+ ret = intel_overlay_wait_flip(overlay); -+ if (ret != 0) -+ return ret; -+ -+ if (!overlay->old_vid_bo) -+ return 0; -+ -+ obj = overlay->old_vid_bo->obj; -+ i915_gem_object_unpin(obj); -+ drm_gem_object_unreference(obj); -+ overlay->old_vid_bo = NULL; -+ -+ return 0; -+} -+ -+struct put_image_params { -+ int format; -+ short dst_x; -+ short dst_y; -+ short dst_w; -+ short dst_h; -+ short src_w; -+ short src_scan_h; -+ short src_scan_w; -+ short src_h; -+ short stride_Y; -+ short stride_UV; -+ int offset_Y; -+ int offset_U; -+ int offset_V; -+}; -+ -+static int packed_depth_bytes(u32 format) -+{ -+ switch (format & I915_OVERLAY_DEPTH_MASK) { -+ case I915_OVERLAY_YUV422: -+ return 4; -+ case I915_OVERLAY_YUV411: -+ /* return 6; not implemented */ -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int packed_width_bytes(u32 format, short width) -+{ -+ switch (format & I915_OVERLAY_DEPTH_MASK) { -+ case I915_OVERLAY_YUV422: -+ return width << 1; -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int uv_hsubsampling(u32 format) -+{ -+ switch (format & I915_OVERLAY_DEPTH_MASK) { -+ case I915_OVERLAY_YUV422: -+ case I915_OVERLAY_YUV420: -+ return 2; -+ case I915_OVERLAY_YUV411: -+ case I915_OVERLAY_YUV410: -+ return 4; -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int uv_vsubsampling(u32 format) -+{ -+ switch (format & I915_OVERLAY_DEPTH_MASK) { -+ case I915_OVERLAY_YUV420: -+ case I915_OVERLAY_YUV410: -+ return 2; -+ case I915_OVERLAY_YUV422: -+ case I915_OVERLAY_YUV411: -+ return 1; -+ default: -+ return -EINVAL; -+ } -+} -+ -+static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width) -+{ -+ u32 mask, shift, ret; -+ if (IS_I9XX(dev)) { -+ mask = 0x3f; -+ shift = 6; -+ } else { -+ mask = 0x1f; -+ shift = 5; -+ } -+ ret = ((offset + width + mask) >> shift) - (offset >> shift); -+ if (IS_I9XX(dev)) -+ ret <<= 1; -+ ret -=1; -+ return ret << 2; -+} -+ -+static const u16 y_static_hcoeffs[N_HORIZ_Y_TAPS * N_PHASES] = { -+ 0x3000, 0xb4a0, 0x1930, 0x1920, 0xb4a0, -+ 0x3000, 0xb500, 0x19d0, 0x1880, 0xb440, -+ 0x3000, 0xb540, 0x1a88, 0x2f80, 0xb3e0, -+ 0x3000, 0xb580, 0x1b30, 0x2e20, 0xb380, -+ 0x3000, 0xb5c0, 0x1bd8, 0x2cc0, 0xb320, -+ 0x3020, 0xb5e0, 0x1c60, 0x2b80, 0xb2c0, -+ 0x3020, 0xb5e0, 0x1cf8, 0x2a20, 0xb260, -+ 0x3020, 0xb5e0, 0x1d80, 0x28e0, 0xb200, -+ 0x3020, 0xb5c0, 0x1e08, 0x3f40, 0xb1c0, -+ 0x3020, 0xb580, 0x1e78, 0x3ce0, 0xb160, -+ 0x3040, 0xb520, 0x1ed8, 0x3aa0, 0xb120, -+ 0x3040, 0xb4a0, 0x1f30, 0x3880, 0xb0e0, -+ 0x3040, 0xb400, 0x1f78, 0x3680, 0xb0a0, -+ 0x3020, 0xb340, 0x1fb8, 0x34a0, 0xb060, -+ 0x3020, 0xb240, 0x1fe0, 0x32e0, 0xb040, -+ 0x3020, 0xb140, 0x1ff8, 0x3160, 0xb020, -+ 0xb000, 0x3000, 0x0800, 0x3000, 0xb000}; -+static const u16 uv_static_hcoeffs[N_HORIZ_UV_TAPS * N_PHASES] = { -+ 0x3000, 0x1800, 0x1800, 0xb000, 0x18d0, 0x2e60, -+ 0xb000, 0x1990, 0x2ce0, 0xb020, 0x1a68, 0x2b40, -+ 0xb040, 0x1b20, 0x29e0, 0xb060, 0x1bd8, 0x2880, -+ 0xb080, 0x1c88, 0x3e60, 0xb0a0, 0x1d28, 0x3c00, -+ 0xb0c0, 0x1db8, 0x39e0, 0xb0e0, 0x1e40, 0x37e0, -+ 0xb100, 0x1eb8, 0x3620, 0xb100, 0x1f18, 0x34a0, -+ 0xb100, 0x1f68, 0x3360, 0xb0e0, 0x1fa8, 0x3240, -+ 0xb0c0, 0x1fe0, 0x3140, 0xb060, 0x1ff0, 0x30a0, -+ 0x3000, 0x0800, 0x3000}; -+ -+static void update_polyphase_filter(struct overlay_registers *regs) -+{ -+ memcpy(regs->Y_HCOEFS, y_static_hcoeffs, sizeof(y_static_hcoeffs)); -+ memcpy(regs->UV_HCOEFS, uv_static_hcoeffs, sizeof(uv_static_hcoeffs)); -+} -+ -+static bool update_scaling_factors(struct intel_overlay *overlay, -+ struct overlay_registers *regs, -+ struct put_image_params *params) -+{ -+ /* fixed point with a 12 bit shift */ -+ u32 xscale, yscale, xscale_UV, yscale_UV; -+#define FP_SHIFT 12 -+#define FRACT_MASK 0xfff -+ bool scale_changed = false; -+ int uv_hscale = uv_hsubsampling(params->format); -+ int uv_vscale = uv_vsubsampling(params->format); -+ -+ if (params->dst_w > 1) -+ xscale = ((params->src_scan_w - 1) << FP_SHIFT) -+ /(params->dst_w); -+ else -+ xscale = 1 << FP_SHIFT; -+ -+ if (params->dst_h > 1) -+ yscale = ((params->src_scan_h - 1) << FP_SHIFT) -+ /(params->dst_h); -+ else -+ yscale = 1 << FP_SHIFT; -+ -+ /*if (params->format & I915_OVERLAY_YUV_PLANAR) {*/ -+ xscale_UV = xscale/uv_hscale; -+ yscale_UV = yscale/uv_vscale; -+ /* make the Y scale to UV scale ratio an exact multiply */ -+ xscale = xscale_UV * uv_hscale; -+ yscale = yscale_UV * uv_vscale; -+ /*} else { -+ xscale_UV = 0; -+ yscale_UV = 0; -+ }*/ -+ -+ if (xscale != overlay->old_xscale || yscale != overlay->old_yscale) -+ scale_changed = true; -+ overlay->old_xscale = xscale; -+ overlay->old_yscale = yscale; -+ -+ regs->YRGBSCALE = ((yscale & FRACT_MASK) << 20) -+ | ((xscale >> FP_SHIFT) << 16) -+ | ((xscale & FRACT_MASK) << 3); -+ regs->UVSCALE = ((yscale_UV & FRACT_MASK) << 20) -+ | ((xscale_UV >> FP_SHIFT) << 16) -+ | ((xscale_UV & FRACT_MASK) << 3); -+ regs->UVSCALEV = ((yscale >> FP_SHIFT) << 16) -+ | ((yscale_UV >> FP_SHIFT) << 0); -+ -+ if (scale_changed) -+ update_polyphase_filter(regs); -+ -+ return scale_changed; -+} -+ -+static void update_colorkey(struct intel_overlay *overlay, -+ struct overlay_registers *regs) -+{ -+ u32 key = overlay->color_key; -+ switch (overlay->crtc->base.fb->bits_per_pixel) { -+ case 8: -+ regs->DCLRKV = 0; -+ regs->DCLRKM = CLK_RGB8I_MASK | DST_KEY_ENABLE; -+ case 16: -+ if (overlay->crtc->base.fb->depth == 15) { -+ regs->DCLRKV = RGB15_TO_COLORKEY(key); -+ regs->DCLRKM = CLK_RGB15_MASK | DST_KEY_ENABLE; -+ } else { -+ regs->DCLRKV = RGB16_TO_COLORKEY(key); -+ regs->DCLRKM = CLK_RGB16_MASK | DST_KEY_ENABLE; -+ } -+ case 24: -+ case 32: -+ regs->DCLRKV = key; -+ regs->DCLRKM = CLK_RGB24_MASK | DST_KEY_ENABLE; -+ } -+} -+ -+static u32 overlay_cmd_reg(struct put_image_params *params) -+{ -+ u32 cmd = OCMD_ENABLE | OCMD_BUF_TYPE_FRAME | OCMD_BUFFER0; -+ -+ if (params->format & I915_OVERLAY_YUV_PLANAR) { -+ switch (params->format & I915_OVERLAY_DEPTH_MASK) { -+ case I915_OVERLAY_YUV422: -+ cmd |= OCMD_YUV_422_PLANAR; -+ break; -+ case I915_OVERLAY_YUV420: -+ cmd |= OCMD_YUV_420_PLANAR; -+ break; -+ case I915_OVERLAY_YUV411: -+ case I915_OVERLAY_YUV410: -+ cmd |= OCMD_YUV_410_PLANAR; -+ break; -+ } -+ } else { /* YUV packed */ -+ switch (params->format & I915_OVERLAY_DEPTH_MASK) { -+ case I915_OVERLAY_YUV422: -+ cmd |= OCMD_YUV_422_PACKED; -+ break; -+ case I915_OVERLAY_YUV411: -+ cmd |= OCMD_YUV_411_PACKED; -+ break; -+ } -+ -+ switch (params->format & I915_OVERLAY_SWAP_MASK) { -+ case I915_OVERLAY_NO_SWAP: -+ break; -+ case I915_OVERLAY_UV_SWAP: -+ cmd |= OCMD_UV_SWAP; -+ break; -+ case I915_OVERLAY_Y_SWAP: -+ cmd |= OCMD_Y_SWAP; -+ break; -+ case I915_OVERLAY_Y_AND_UV_SWAP: -+ cmd |= OCMD_Y_AND_UV_SWAP; -+ break; -+ } -+ } -+ -+ return cmd; -+} -+ -+int intel_overlay_do_put_image(struct intel_overlay *overlay, -+ struct drm_gem_object *new_bo, -+ struct put_image_params *params) -+{ -+ int ret, tmp_width; -+ struct overlay_registers *regs; -+ bool scale_changed = false; -+ struct drm_i915_gem_object *bo_priv = new_bo->driver_private; -+ struct drm_device *dev = overlay->dev; -+ -+ BUG_ON(!mutex_is_locked(&dev->struct_mutex)); -+ BUG_ON(!mutex_is_locked(&dev->mode_config.mutex)); -+ BUG_ON(!overlay); -+ -+ if (overlay->hw_wedged) -+ return -EBUSY; -+ -+ ret = intel_overlay_release_old_vid(overlay); -+ if (ret != 0) -+ return ret; -+ -+ ret = i915_gem_object_pin(new_bo, PAGE_SIZE); -+ if (ret != 0) -+ return ret; -+ -+ ret = i915_gem_object_set_to_gtt_domain(new_bo, 0); -+ if (ret != 0) -+ goto out_unpin; -+ -+ if (!overlay->active) { -+ regs = intel_overlay_map_regs_atomic(overlay); -+ if (!regs) { -+ ret = -ENOMEM; -+ goto out_unpin; -+ } -+ regs->OCONFIG = OCONF_CC_OUT_8BIT; -+ if (IS_I965GM(overlay->dev)) -+ regs->OCONFIG |= OCONF_CSC_MODE_BT709; -+ regs->OCONFIG |= overlay->crtc->pipe == 0 ? -+ OCONF_PIPE_A : OCONF_PIPE_B; -+ intel_overlay_unmap_regs_atomic(overlay); -+ -+ ret = intel_overlay_on(overlay); -+ if (ret != 0) -+ goto out_unpin; -+ } -+ -+ regs = intel_overlay_map_regs_atomic(overlay); -+ if (!regs) { -+ ret = -ENOMEM; -+ goto out_unpin; -+ } -+ -+ regs->DWINPOS = (params->dst_y << 16) | params->dst_x; -+ regs->DWINSZ = (params->dst_h << 16) | params->dst_w; -+ -+ if (params->format & I915_OVERLAY_YUV_PACKED) -+ tmp_width = packed_width_bytes(params->format, params->src_w); -+ else -+ tmp_width = params->src_w; -+ -+ regs->SWIDTH = params->src_w; -+ regs->SWIDTHSW = calc_swidthsw(overlay->dev, -+ params->offset_Y, tmp_width); -+ regs->SHEIGHT = params->src_h; -+ regs->OBUF_0Y = bo_priv->gtt_offset + params-> offset_Y; -+ regs->OSTRIDE = params->stride_Y; -+ -+ if (params->format & I915_OVERLAY_YUV_PLANAR) { -+ int uv_hscale = uv_hsubsampling(params->format); -+ int uv_vscale = uv_vsubsampling(params->format); -+ u32 tmp_U, tmp_V; -+ regs->SWIDTH |= (params->src_w/uv_hscale) << 16; -+ tmp_U = calc_swidthsw(overlay->dev, params->offset_U, -+ params->src_w/uv_hscale); -+ tmp_V = calc_swidthsw(overlay->dev, params->offset_V, -+ params->src_w/uv_hscale); -+ regs->SWIDTHSW |= max_t(u32, tmp_U, tmp_V) << 16; -+ regs->SHEIGHT |= (params->src_h/uv_vscale) << 16; -+ regs->OBUF_0U = bo_priv->gtt_offset + params->offset_U; -+ regs->OBUF_0V = bo_priv->gtt_offset + params->offset_V; -+ regs->OSTRIDE |= params->stride_UV << 16; -+ } -+ -+ scale_changed = update_scaling_factors(overlay, regs, params); -+ -+ update_colorkey(overlay, regs); -+ -+ regs->OCMD = overlay_cmd_reg(params); -+ -+ intel_overlay_unmap_regs_atomic(overlay); -+ -+ intel_overlay_continue(overlay, scale_changed); -+ -+ overlay->old_vid_bo = overlay->vid_bo; -+ overlay->vid_bo = new_bo->driver_private; -+ -+ return 0; -+ -+out_unpin: -+ i915_gem_object_unpin(new_bo); -+ return ret; -+} -+ -+int intel_overlay_switch_off(struct intel_overlay *overlay) -+{ -+ int ret; -+ struct overlay_registers *regs; -+ struct drm_gem_object *obj; -+ struct drm_device *dev = overlay->dev; -+ -+ BUG_ON(!mutex_is_locked(&dev->struct_mutex)); -+ BUG_ON(!mutex_is_locked(&dev->mode_config.mutex)); -+ -+ if (!overlay->active) -+ return 0; -+ -+ if (overlay->hw_wedged) -+ return -EBUSY; -+ -+ ret = intel_overlay_release_old_vid(overlay); -+ if (ret != 0) -+ return ret; -+ -+ regs = intel_overlay_map_regs_atomic(overlay); -+ regs->OCMD = 0; -+ intel_overlay_unmap_regs_atomic(overlay); -+ -+ ret = intel_overlay_off(overlay); -+ /* never have the overlay hw on without showing a frame */ -+ BUG_ON(!overlay->vid_bo); -+ obj = overlay->vid_bo->obj; -+ -+ i915_gem_object_unpin(obj); -+ drm_gem_object_unreference(obj); -+ overlay->vid_bo = NULL; -+ -+ overlay->crtc->overlay = NULL; -+ overlay->crtc = NULL; -+ -+ return 0; -+} -+ -+static int check_overlay_possible_on_crtc(struct intel_overlay *overlay, -+ struct intel_crtc *crtc) -+{ -+ drm_i915_private_t *dev_priv = overlay->dev->dev_private; -+ u32 pipeconf; -+ int pipeconf_reg = (crtc->pipe == 0) ? PIPEACONF : PIPEBCONF; -+ -+ if (!crtc->base.enabled || crtc->dpms_mode != DRM_MODE_DPMS_ON) -+ return -EINVAL; -+ -+ pipeconf = I915_READ(pipeconf_reg); -+ -+ /* can't use the overlay with double wide pipe */ -+ if (!IS_I965G(overlay->dev) && pipeconf & PIPEACONF_DOUBLE_WIDE) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static void update_pfit_vscale_ratio(struct intel_overlay *overlay) -+{ -+ struct drm_device *dev = overlay->dev; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ u32 ratio; -+ u32 pfit_control = I915_READ(PFIT_CONTROL); -+ -+ /* XXX: This is not the same logic as in the xorg driver, but more in -+ * line with the intel documentation for the i965 */ -+ if (!IS_I965G(dev) && (pfit_control & VERT_AUTO_SCALE)) { -+ ratio = I915_READ(PFIT_AUTO_RATIOS) >> PFIT_VERT_SCALE_SHIFT; -+ } else { /* on i965 use the PGM reg to read out the autoscaler values */ -+ ratio = I915_READ(PFIT_PGM_RATIOS); -+ if (IS_I965G(dev)) -+ ratio >>= PFIT_VERT_SCALE_SHIFT_965; -+ else -+ ratio >>= PFIT_VERT_SCALE_SHIFT; -+ } -+ -+ overlay->pfit_vscale_ratio = ratio; -+} -+ -+static int check_overlay_dst(struct intel_overlay *overlay, -+ struct drm_intel_overlay_put_image *rec) -+{ -+ struct drm_display_mode *mode = &overlay->crtc->base.mode; -+ -+ if ((rec->dst_x < mode->crtc_hdisplay) -+ && (rec->dst_x + rec->dst_width -+ <= mode->crtc_hdisplay) -+ && (rec->dst_y < mode->crtc_vdisplay) -+ && (rec->dst_y + rec->dst_height -+ <= mode->crtc_vdisplay)) -+ return 0; -+ else -+ return -EINVAL; -+} -+ -+static int check_overlay_scaling(struct put_image_params *rec) -+{ -+ u32 tmp; -+ -+ /* downscaling limit is 8.0 */ -+ tmp = ((rec->src_scan_h << 16) / rec->dst_h) >> 16; -+ if (tmp > 7) -+ return -EINVAL; -+ tmp = ((rec->src_scan_w << 16) / rec->dst_w) >> 16; -+ if (tmp > 7) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static int check_overlay_src(struct drm_device *dev, -+ struct drm_intel_overlay_put_image *rec, -+ struct drm_gem_object *new_bo) -+{ -+ u32 stride_mask; -+ int depth; -+ int uv_hscale = uv_hsubsampling(rec->flags); -+ int uv_vscale = uv_vsubsampling(rec->flags); -+ size_t tmp; -+ -+ /* check src dimensions */ -+ if (IS_845G(dev) || IS_I830(dev)) { -+ if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY -+ || rec->src_width > IMAGE_MAX_WIDTH_LEGACY) -+ return -EINVAL; -+ } else { -+ if (rec->src_height > IMAGE_MAX_HEIGHT -+ || rec->src_width > IMAGE_MAX_WIDTH) -+ return -EINVAL; -+ } -+ /* better safe than sorry, use 4 as the maximal subsampling ratio */ -+ if (rec->src_height < N_VERT_Y_TAPS*4 -+ || rec->src_width < N_HORIZ_Y_TAPS*4) -+ return -EINVAL; -+ -+ /* check alingment constrains */ -+ switch (rec->flags & I915_OVERLAY_TYPE_MASK) { -+ case I915_OVERLAY_RGB: -+ /* not implemented */ -+ return -EINVAL; -+ case I915_OVERLAY_YUV_PACKED: -+ depth = packed_depth_bytes(rec->flags); -+ if (uv_vscale != 1) -+ return -EINVAL; -+ if (depth < 0) -+ return depth; -+ /* ignore UV planes */ -+ rec->stride_UV = 0; -+ rec->offset_U = 0; -+ rec->offset_V = 0; -+ /* check pixel alignment */ -+ if (rec->offset_Y % depth) -+ return -EINVAL; -+ break; -+ case I915_OVERLAY_YUV_PLANAR: -+ if (uv_vscale < 0 || uv_hscale < 0) -+ return -EINVAL; -+ /* no offset restrictions for planar formats */ -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (rec->src_width % uv_hscale) -+ return -EINVAL; -+ -+ /* stride checking */ -+ stride_mask = 63; -+ -+ if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask) -+ return -EINVAL; -+ if (IS_I965G(dev) && rec->stride_Y < 512) -+ return -EINVAL; -+ -+ tmp = (rec->flags & I915_OVERLAY_TYPE_MASK) == I915_OVERLAY_YUV_PLANAR ? -+ 4 : 8; -+ if (rec->stride_Y > tmp*1024 || rec->stride_UV > 2*1024) -+ return -EINVAL; -+ -+ /* check buffer dimensions */ -+ switch (rec->flags & I915_OVERLAY_TYPE_MASK) { -+ case I915_OVERLAY_RGB: -+ case I915_OVERLAY_YUV_PACKED: -+ /* always 4 Y values per depth pixels */ -+ if (packed_width_bytes(rec->flags, rec->src_width) -+ > rec->stride_Y) -+ return -EINVAL; -+ -+ tmp = rec->stride_Y*rec->src_height; -+ if (rec->offset_Y + tmp > new_bo->size) -+ return -EINVAL; -+ break; -+ case I915_OVERLAY_YUV_PLANAR: -+ if (rec->src_width > rec->stride_Y) -+ return -EINVAL; -+ if (rec->src_width/uv_hscale > rec->stride_UV) -+ return -EINVAL; -+ -+ tmp = rec->stride_Y*rec->src_height; -+ if (rec->offset_Y + tmp > new_bo->size) -+ return -EINVAL; -+ tmp = rec->stride_UV*rec->src_height; -+ tmp /= uv_vscale; -+ if (rec->offset_U + tmp > new_bo->size -+ || rec->offset_V + tmp > new_bo->size) -+ return -EINVAL; -+ break; -+ } -+ -+ return 0; -+} -+ -+int intel_overlay_put_image(struct drm_device *dev, void *data, -+ struct drm_file *file_priv) -+{ -+ struct drm_intel_overlay_put_image *put_image_rec = data; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ struct intel_overlay *overlay; -+ struct drm_mode_object *drmmode_obj; -+ struct intel_crtc *crtc; -+ struct drm_gem_object *new_bo; -+ struct put_image_params *params; -+ int ret; -+ -+ if (!dev_priv) { -+ DRM_ERROR("called with no initialization\n"); -+ return -EINVAL; -+ } -+ -+ overlay = dev_priv->overlay; -+ if (!overlay) { -+ DRM_DEBUG("userspace bug: no overlay\n"); -+ return -ENODEV; -+ } -+ -+ if (!(put_image_rec->flags & I915_OVERLAY_ENABLE)) { -+ mutex_lock(&dev->mode_config.mutex); -+ mutex_lock(&dev->struct_mutex); -+ -+ ret = intel_overlay_switch_off(overlay); -+ -+ mutex_unlock(&dev->struct_mutex); -+ mutex_unlock(&dev->mode_config.mutex); -+ -+ return ret; -+ } -+ -+ params = kmalloc(sizeof(struct put_image_params), GFP_KERNEL); -+ if (!params) -+ return -ENOMEM; -+ -+ drmmode_obj = drm_mode_object_find(dev, put_image_rec->crtc_id, -+ DRM_MODE_OBJECT_CRTC); -+ if (!drmmode_obj) -+ return -ENOENT; -+ crtc = to_intel_crtc(obj_to_crtc(drmmode_obj)); -+ -+ new_bo = drm_gem_object_lookup(dev, file_priv, -+ put_image_rec->bo_handle); -+ if (!new_bo) -+ return -ENOENT; -+ -+ mutex_lock(&dev->mode_config.mutex); -+ mutex_lock(&dev->struct_mutex); -+ -+ if (overlay->crtc != crtc) { -+ struct drm_display_mode *mode = &crtc->base.mode; -+ ret = intel_overlay_switch_off(overlay); -+ if (ret != 0) -+ goto out_unlock; -+ -+ ret = check_overlay_possible_on_crtc(overlay, crtc); -+ if (ret != 0) -+ goto out_unlock; -+ -+ overlay->crtc = crtc; -+ crtc->overlay = overlay; -+ -+ if (intel_panel_fitter_pipe(dev) == crtc->pipe -+ /* and line to wide, i.e. one-line-mode */ -+ && mode->hdisplay > 1024) { -+ overlay->pfit_active = 1; -+ update_pfit_vscale_ratio(overlay); -+ } else -+ overlay->pfit_active = 0; -+ } -+ -+ ret = check_overlay_dst(overlay, put_image_rec); -+ if (ret != 0) -+ goto out_unlock; -+ -+ if (overlay->pfit_active) { -+ params->dst_y = ((((u32)put_image_rec->dst_y) << 12) / -+ overlay->pfit_vscale_ratio); -+ /* shifting right rounds downwards, so add 1 */ -+ params->dst_h = ((((u32)put_image_rec->dst_height) << 12) / -+ overlay->pfit_vscale_ratio) + 1; -+ } else { -+ params->dst_y = put_image_rec->dst_y; -+ params->dst_h = put_image_rec->dst_height; -+ } -+ params->dst_x = put_image_rec->dst_x; -+ params->dst_w = put_image_rec->dst_width; -+ -+ params->src_w = put_image_rec->src_width; -+ params->src_h = put_image_rec->src_height; -+ params->src_scan_w = put_image_rec->src_scan_width; -+ params->src_scan_h = put_image_rec->src_scan_height; -+ if (params->src_scan_h > params->src_h -+ || params->src_scan_w > params->src_w) { -+ ret = -EINVAL; -+ goto out_unlock; -+ } -+ -+ ret = check_overlay_src(dev, put_image_rec, new_bo); -+ if (ret != 0) -+ goto out_unlock; -+ params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK; -+ params->stride_Y = put_image_rec->stride_Y; -+ params->stride_UV = put_image_rec->stride_UV; -+ params->offset_Y = put_image_rec->offset_Y; -+ params->offset_U = put_image_rec->offset_U; -+ params->offset_V = put_image_rec->offset_V; -+ -+ /* Check scaling after src size to prevent a divide-by-zero. */ -+ ret = check_overlay_scaling(params); -+ if (ret != 0) -+ goto out_unlock; -+ -+ ret = intel_overlay_do_put_image(overlay, new_bo, params); -+ if (ret != 0) -+ goto out_unlock; -+ -+ mutex_unlock(&dev->struct_mutex); -+ mutex_unlock(&dev->mode_config.mutex); -+ -+ kfree(params); -+ -+ return 0; -+ -+out_unlock: -+ mutex_unlock(&dev->struct_mutex); -+ mutex_unlock(&dev->mode_config.mutex); -+ drm_gem_object_unreference(new_bo); -+ kfree(params); -+ -+ return ret; -+} -+ -+static void update_reg_attrs(struct intel_overlay *overlay, -+ struct overlay_registers *regs) -+{ -+ regs->OCLRC0 = (overlay->contrast << 18) | (overlay->brightness & 0xff); -+ regs->OCLRC1 = overlay->saturation; -+} -+ -+static bool check_gamma_bounds(u32 gamma1, u32 gamma2) -+{ -+ int i; -+ -+ if (gamma1 & 0xff000000 || gamma2 & 0xff000000) -+ return false; -+ -+ for (i = 0; i < 3; i++) { -+ if (((gamma1 >> i * 8) & 0xff) >= ((gamma2 >> i*8) & 0xff)) -+ return false; -+ } -+ -+ return true; -+} -+ -+static bool check_gamma5_errata(u32 gamma5) -+{ -+ int i; -+ -+ for (i = 0; i < 3; i++) { -+ if (((gamma5 >> i*8) & 0xff) == 0x80) -+ return false; -+ } -+ -+ return true; -+} -+ -+static int check_gamma(struct drm_intel_overlay_attrs *attrs) -+{ -+ if (!check_gamma_bounds(0, attrs->gamma0) -+ || !check_gamma_bounds(attrs->gamma0, attrs->gamma1) -+ || !check_gamma_bounds(attrs->gamma1, attrs->gamma2) -+ || !check_gamma_bounds(attrs->gamma2, attrs->gamma3) -+ || !check_gamma_bounds(attrs->gamma3, attrs->gamma4) -+ || !check_gamma_bounds(attrs->gamma4, attrs->gamma5) -+ || !check_gamma_bounds(attrs->gamma5, 0x00ffffff)) -+ return -EINVAL; -+ if (!check_gamma5_errata(attrs->gamma5)) -+ return -EINVAL; -+ return 0; -+} -+ -+int intel_overlay_attrs(struct drm_device *dev, void *data, -+ struct drm_file *file_priv) -+{ -+ struct drm_intel_overlay_attrs *attrs = data; -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ struct intel_overlay *overlay; -+ struct overlay_registers *regs; -+ int ret; -+ -+ if (!dev_priv) { -+ DRM_ERROR("called with no initialization\n"); -+ return -EINVAL; -+ } -+ -+ overlay = dev_priv->overlay; -+ if (!overlay) { -+ DRM_DEBUG("userspace bug: no overlay\n"); -+ return -ENODEV; -+ } -+ -+ mutex_lock(&dev->mode_config.mutex); -+ mutex_lock(&dev->struct_mutex); -+ -+ if (!(attrs->flags & I915_OVERLAY_UPDATE_ATTRS)) { -+ attrs->color_key = overlay->color_key; -+ attrs->brightness = overlay->brightness; -+ attrs->contrast = overlay->contrast; -+ attrs->saturation = overlay->saturation; -+ -+ if (IS_I9XX(dev)) { -+ attrs->gamma0 = I915_READ(OGAMC0); -+ attrs->gamma1 = I915_READ(OGAMC1); -+ attrs->gamma2 = I915_READ(OGAMC2); -+ attrs->gamma3 = I915_READ(OGAMC3); -+ attrs->gamma4 = I915_READ(OGAMC4); -+ attrs->gamma5 = I915_READ(OGAMC5); -+ } -+ ret = 0; -+ } else { -+ overlay->color_key = attrs->color_key; -+ if (attrs->brightness >= -128 && attrs->brightness <= 127) { -+ overlay->brightness = attrs->brightness; -+ } else { -+ ret = -EINVAL; -+ goto out_unlock; -+ } -+ if (attrs->contrast <= 255) { -+ overlay->contrast = attrs->contrast; -+ } else { -+ ret = -EINVAL; -+ goto out_unlock; -+ } -+ if (attrs->saturation <= 1023) { -+ overlay->saturation = attrs->saturation; -+ } else { -+ ret = -EINVAL; -+ goto out_unlock; -+ } -+ -+ regs = intel_overlay_map_regs_atomic(overlay); -+ if (!regs) { -+ ret = -ENOMEM; -+ goto out_unlock; -+ } -+ -+ update_reg_attrs(overlay, regs); -+ -+ intel_overlay_unmap_regs_atomic(overlay); -+ -+ if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) { -+ if (!IS_I9XX(dev)) { -+ ret = -EINVAL; -+ goto out_unlock; -+ } -+ -+ if (overlay->active) { -+ ret = -EBUSY; -+ goto out_unlock; -+ } -+ -+ ret = check_gamma(attrs); -+ if (ret != 0) -+ goto out_unlock; -+ -+ I915_WRITE(OGAMC0, attrs->gamma0); -+ I915_WRITE(OGAMC1, attrs->gamma1); -+ I915_WRITE(OGAMC2, attrs->gamma2); -+ I915_WRITE(OGAMC3, attrs->gamma3); -+ I915_WRITE(OGAMC4, attrs->gamma4); -+ I915_WRITE(OGAMC5, attrs->gamma5); -+ } -+ ret = 0; -+ } -+ -+out_unlock: -+ mutex_unlock(&dev->struct_mutex); -+ mutex_unlock(&dev->mode_config.mutex); -+ -+ return ret; -+} -+ -+void intel_setup_overlay(struct drm_device *dev) -+{ -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ struct intel_overlay *overlay; -+ struct drm_gem_object *reg_bo; -+ struct overlay_registers *regs; -+ int ret; -+ -+ if (!OVERLAY_EXISTS(dev)) -+ return; -+ -+ overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL); -+ if (!overlay) -+ return; -+ overlay->dev = dev; -+ -+ reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE); -+ if (!reg_bo) -+ goto out_free; -+ overlay->reg_bo = reg_bo->driver_private; -+ -+ if (OVERLAY_NONPHYSICAL(dev)) { -+ ret = i915_gem_object_pin(reg_bo, PAGE_SIZE); -+ if (ret) { -+ DRM_ERROR("failed to pin overlay register bo\n"); -+ goto out_free_bo; -+ } -+ overlay->flip_addr = overlay->reg_bo->gtt_offset; -+ } else { -+ ret = i915_gem_attach_phys_object(dev, reg_bo, -+ I915_GEM_PHYS_OVERLAY_REGS); -+ if (ret) { -+ DRM_ERROR("failed to attach phys overlay regs\n"); -+ goto out_free_bo; -+ } -+ overlay->flip_addr = overlay->reg_bo->phys_obj->handle->busaddr; -+ } -+ -+ /* init all values */ -+ overlay->color_key = 0x0101fe; -+ overlay->brightness = -19; -+ overlay->contrast = 75; -+ overlay->saturation = 146; -+ -+ regs = intel_overlay_map_regs_atomic(overlay); -+ if (!regs) -+ goto out_free_bo; -+ -+ memset(regs, 0, sizeof(struct overlay_registers)); -+ update_polyphase_filter(regs); -+ -+ update_reg_attrs(overlay, regs); -+ -+ intel_overlay_unmap_regs_atomic(overlay); -+ -+ dev_priv->overlay = overlay; -+ DRM_INFO("initialized overlay support\n"); -+ return; -+ -+out_free_bo: -+ drm_gem_object_unreference(reg_bo); -+out_free: -+ kfree(overlay); -+ return; -+} -+ -+void intel_cleanup_overlay(struct drm_device *dev) -+{ -+ drm_i915_private_t *dev_priv = dev->dev_private; -+ -+ if (dev_priv->overlay) { -+ /* The bo's should be free'd by the generic code already. -+ * Furthermore modesetting teardown happens beforehand so the -+ * hardware should be off already */ -+ BUG_ON(dev_priv->overlay->active); -+ -+ kfree(dev_priv->overlay); -+ } -+} -diff -Naur linux-2.6.32.2/drivers/gpu/drm/i915/Makefile linux-2.6.32.2.patch/drivers/gpu/drm/i915/Makefile ---- linux-2.6.32.2/drivers/gpu/drm/i915/Makefile 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/drivers/gpu/drm/i915/Makefile 2009-12-19 11:54:31.051124826 +0100 -@@ -23,6 +23,7 @@ - intel_fb.o \ - intel_tv.o \ - intel_dvo.o \ -+ intel_overlay.o \ - dvo_ch7xxx.o \ - dvo_ch7017.o \ - dvo_ivch.o \ -diff -Naur linux-2.6.32.2/include/drm/drm_os_linux.h linux-2.6.32.2.patch/include/drm/drm_os_linux.h ---- linux-2.6.32.2/include/drm/drm_os_linux.h 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/include/drm/drm_os_linux.h 2009-12-19 11:54:31.052124664 +0100 -@@ -123,5 +123,5 @@ - remove_wait_queue(&(queue), &entry); \ - } while (0) - --#define DRM_WAKEUP( queue ) wake_up_interruptible( queue ) -+#define DRM_WAKEUP( queue ) wake_up( queue ) - #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue ) -diff -Naur linux-2.6.32.2/include/drm/i915_drm.h linux-2.6.32.2.patch/include/drm/i915_drm.h ---- linux-2.6.32.2/include/drm/i915_drm.h 2009-12-18 23:27:07.000000000 +0100 -+++ linux-2.6.32.2.patch/include/drm/i915_drm.h 2009-12-19 11:54:31.053124642 +0100 -@@ -186,6 +186,8 @@ - #define DRM_I915_GEM_MMAP_GTT 0x24 - #define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25 - #define DRM_I915_GEM_MADVISE 0x26 -+#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 -+#define DRM_I915_OVERLAY_ATTRS 0x28 - - #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) - #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) -@@ -223,6 +225,8 @@ - #define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) - #define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_intel_get_pipe_from_crtc_id) - #define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) -+#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_IOCTL_I915_OVERLAY_ATTRS, struct drm_intel_overlay_put_image) -+#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) - - /* Allow drivers to submit batchbuffers directly to hardware, relying - * on the security mechanisms provided by hardware. -@@ -266,6 +270,7 @@ - #define I915_PARAM_CHIPSET_ID 4 - #define I915_PARAM_HAS_GEM 5 - #define I915_PARAM_NUM_FENCES_AVAIL 6 -+#define I915_PARAM_HAS_OVERLAY 7 - - typedef struct drm_i915_getparam { - int param; -@@ -686,4 +691,70 @@ - __u32 retained; - }; - -+/* flags */ -+#define I915_OVERLAY_TYPE_MASK 0xff -+#define I915_OVERLAY_YUV_PLANAR 0x01 -+#define I915_OVERLAY_YUV_PACKED 0x02 -+#define I915_OVERLAY_RGB 0x03 -+ -+#define I915_OVERLAY_DEPTH_MASK 0xff00 -+#define I915_OVERLAY_RGB24 0x1000 -+#define I915_OVERLAY_RGB16 0x2000 -+#define I915_OVERLAY_RGB15 0x3000 -+#define I915_OVERLAY_YUV422 0x0100 -+#define I915_OVERLAY_YUV411 0x0200 -+#define I915_OVERLAY_YUV420 0x0300 -+#define I915_OVERLAY_YUV410 0x0400 -+ -+#define I915_OVERLAY_SWAP_MASK 0xff0000 -+#define I915_OVERLAY_NO_SWAP 0x000000 -+#define I915_OVERLAY_UV_SWAP 0x010000 -+#define I915_OVERLAY_Y_SWAP 0x020000 -+#define I915_OVERLAY_Y_AND_UV_SWAP 0x030000 -+ -+#define I915_OVERLAY_FLAGS_MASK 0xff000000 -+#define I915_OVERLAY_ENABLE 0x01000000 -+ -+struct drm_intel_overlay_put_image { -+ /* various flags and src format description */ -+ __u32 flags; -+ /* source picture description */ -+ __u32 bo_handle; -+ /* stride values and offsets are in bytes, buffer relative */ -+ __u16 stride_Y; /* stride for packed formats */ -+ __u16 stride_UV; -+ __u32 offset_Y; /* offset for packet formats */ -+ __u32 offset_U; -+ __u32 offset_V; -+ /* in pixels */ -+ __u16 src_width; -+ __u16 src_height; -+ /* to compensate the scaling factors for partially covered surfaces */ -+ __u16 src_scan_width; -+ __u16 src_scan_height; -+ /* output crtc description */ -+ __u32 crtc_id; -+ __u16 dst_x; -+ __u16 dst_y; -+ __u16 dst_width; -+ __u16 dst_height; -+}; -+ -+/* flags */ -+#define I915_OVERLAY_UPDATE_ATTRS (1<<0) -+#define I915_OVERLAY_UPDATE_GAMMA (1<<1) -+struct drm_intel_overlay_attrs { -+ __u32 flags; -+ __u32 color_key; -+ __s32 brightness; -+ __u32 contrast; -+ __u32 saturation; -+ __u32 gamma0; -+ __u32 gamma1; -+ __u32 gamma2; -+ __u32 gamma3; -+ __u32 gamma4; -+ __u32 gamma5; -+}; -+ - #endif /* _I915_DRM_H_ */ diff --git a/packages/linux/patches/linux-2.6-e1000-ich9.diff b/packages/linux/patches/linux-2.6-e1000-ich9.diff deleted file mode 100644 index 5a3391cde5..0000000000 --- a/packages/linux/patches/linux-2.6-e1000-ich9.diff +++ /dev/null @@ -1,27 +0,0 @@ -diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c -index 8f8139d..22c49ec 100644 ---- a/drivers/net/e1000e/ich8lan.c -+++ b/drivers/net/e1000e/ich8lan.c -@@ -209,6 +209,12 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw) - - /* Verify phy id */ - switch (phy->id) { -+ case 0x0: -+ if (hw->adapter->pdev->device == 0x10be) -+ hw_dbg(hw, "got 0 phy id, trying anyway"); -+ /* Fall through to IGP03E1000 case below */ -+ else -+ return -E1000_ERR_PHY; - case IGP03E1000_E_PHY_ID: - phy->type = e1000_phy_igp_3; - phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; ---- linux-2.6.25.noarch/drivers/net/e1000e/netdev.c~ 2008-05-16 10:31:41.000000000 -0400 -+++ linux-2.6.25.noarch/drivers/net/e1000e/netdev.c 2008-05-16 10:32:43.000000000 -0400 -@@ -4599,6 +4599,7 @@ static struct pci_device_id e1000_pci_tb - { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, - { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, - { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, -+ { PCI_VDEVICE(INTEL, 0x10be), board_ich9lan }, - - { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, - { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, diff --git a/packages/linux/url b/packages/linux/url index 3fa5b5d12c..2ee386dea2 100644 --- a/packages/linux/url +++ b/packages/linux/url @@ -1 +1 @@ -http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.32.2.tar.bz2 +http://www.kernel.org/pub/linux/kernel/v2.6/testing/linux-2.6.33-rc2.tar.bz2 \ No newline at end of file diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index e148e01b8a..514e496067 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.32.1 +# Linux kernel version: 2.6.33-rc2 # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -88,6 +88,7 @@ CONFIG_AUDIT_TREE=y # CONFIG_TREE_RCU=y # CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=32 # CONFIG_RCU_FANOUT_EXACT is not set @@ -140,7 +141,7 @@ CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # -# CONFIG_PERF_EVENTS is not set +CONFIG_PERF_EVENTS=y # CONFIG_PERF_COUNTERS is not set # CONFIG_VM_EVENT_COUNTERS is not set CONFIG_PCI_QUIRKS=y @@ -158,6 +159,8 @@ CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_ATTRS=y CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y # # GCOV-based kernel profiling @@ -182,14 +185,41 @@ CONFIG_BLK_DEV_BSG=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set # CONFIG_IOSCHED_DEADLINE is not set CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y # CONFIG_FREEZER is not set # @@ -235,8 +265,7 @@ CONFIG_MATOM=y # CONFIG_GENERIC_CPU is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_CPU=y -CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_INTERNODE_CACHE_BYTES=64 +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_XADD=y @@ -308,8 +337,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_HIGHPTE=y @@ -442,6 +469,7 @@ CONFIG_PCI_LEGACY=y # CONFIG_PCI_STUB is not set CONFIG_HT_IRQ=y # CONFIG_PCI_IOV is not set +CONFIG_PCI_IOAPIC=y CONFIG_ISA_DMA_API=y # CONFIG_ISA is not set # CONFIG_MCA is not set @@ -549,14 +577,15 @@ CONFIG_BT_HCIBTUSB=m # CONFIG_BT_MRVL is not set # CONFIG_AF_RXRPC is not set CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_REG_DEBUG is not set CONFIG_CFG80211_DEFAULT_PS=y -CONFIG_CFG80211_DEFAULT_PS_VALUE=1 # CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_WIRELESS_EXT=y +CONFIG_CFG80211_WEXT=y CONFIG_WIRELESS_EXT_SYSFS=y CONFIG_LIB80211=m # CONFIG_LIB80211_DEBUG is not set @@ -610,6 +639,10 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set @@ -718,15 +751,16 @@ CONFIG_ATA_GENERIC=y # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RDC is not set # CONFIG_PATA_RZ1000 is not set # CONFIG_PATA_SC1200 is not set # CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set @@ -808,9 +842,6 @@ CONFIG_FORCEDETH=m # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set CONFIG_WLAN=y -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_AIRO is not set # CONFIG_ATMEL is not set @@ -823,24 +854,28 @@ CONFIG_WLAN_80211=y # CONFIG_ADM8211 is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set -# CONFIG_P54_COMMON is not set CONFIG_ATH_COMMON=m +# CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m CONFIG_ATH9K=m -# CONFIG_ATH9K_DEBUG is not set +# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_AR9170_USB is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_HOSTAP is not set # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set # CONFIG_IWLWIFI is not set -# CONFIG_HOSTAP is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_ZD1211RW is not set -# CONFIG_RT2X00 is not set -# CONFIG_HERMES is not set -# CONFIG_WL12XX is not set # CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_WL12XX is not set +# CONFIG_ZD1211RW is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers @@ -874,6 +909,7 @@ CONFIG_ATH9K=m CONFIG_INPUT=y CONFIG_INPUT_FF_MEMLESS=y # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -949,6 +985,7 @@ CONFIG_TABLET_USB_WACOM=m CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_AD7879_I2C is not set # CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set @@ -976,6 +1013,7 @@ CONFIG_SERIO_I8042=y # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1073,11 +1111,6 @@ CONFIG_I2C_HELPER_AUTO=y # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set -# -# Graphics adapter I2C/DDC channel drivers -# -# CONFIG_I2C_VOODOO3 is not set - # # Other I2C/SMBus bus drivers # @@ -1088,7 +1121,6 @@ CONFIG_I2C_HELPER_AUTO=y # # Miscellaneous I2C Chip support # -# CONFIG_DS1682 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set @@ -1129,7 +1161,6 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_TMIO is not set # CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_AB3100_CORE is not set @@ -1526,6 +1557,7 @@ CONFIG_LEDS_CLASS=m # CONFIG_LEDS_CLEVO_MAIL is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_INTEL_SS4200 is not set # # LED Triggers @@ -1570,6 +1602,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8581 is not set @@ -1591,7 +1624,9 @@ CONFIG_RTC_DRV_CMOS=y # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_V3020 is not set # @@ -1621,13 +1656,11 @@ CONFIG_FIRMWARE_MEMMAP=y # File systems # # CONFIG_EXT2_FS is not set -CONFIG_EXT3_FS=m -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y # CONFIG_EXT4_FS_XATTR is not set # CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=m CONFIG_JBD2=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set @@ -1793,7 +1826,7 @@ CONFIG_FRAME_WARN=1024 # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_MEMORY_INIT is not set CONFIG_ARCH_WANT_FRAME_POINTERS=y # CONFIG_FRAME_POINTER is not set @@ -1840,8 +1873,11 @@ CONFIG_OPTIMIZE_INLINING=y # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_IMA is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y # diff --git a/projects/generic/linux/linux.i386.conf b/projects/generic/linux/linux.i386.conf index fb483b07e2..8d39116790 100644 --- a/projects/generic/linux/linux.i386.conf +++ b/projects/generic/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.32.1 +# Linux kernel version: 2.6.33-rc2 # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -88,6 +88,7 @@ CONFIG_AUDIT_TREE=y # CONFIG_TREE_RCU=y # CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=32 # CONFIG_RCU_FANOUT_EXACT is not set @@ -140,7 +141,7 @@ CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # -# CONFIG_PERF_EVENTS is not set +CONFIG_PERF_EVENTS=y # CONFIG_PERF_COUNTERS is not set # CONFIG_VM_EVENT_COUNTERS is not set CONFIG_PCI_QUIRKS=y @@ -158,6 +159,8 @@ CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_ATTRS=y CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y # # GCOV-based kernel profiling @@ -182,14 +185,41 @@ CONFIG_BLK_DEV_BSG=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set # CONFIG_IOSCHED_DEADLINE is not set CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y # CONFIG_FREEZER is not set # @@ -215,8 +245,8 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_M686 is not set # CONFIG_MPENTIUMII is not set # CONFIG_MPENTIUMIII is not set -# CONFIG_MPENTIUMM is not set -CONFIG_MPENTIUM4=y +CONFIG_MPENTIUMM=y +# CONFIG_MPENTIUM4 is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set @@ -235,10 +265,9 @@ CONFIG_MPENTIUM4=y # CONFIG_GENERIC_CPU is not set CONFIG_X86_GENERIC=y CONFIG_X86_CPU=y -CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_INTERNODE_CACHE_BYTES=64 +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_CMPXCHG=y -CONFIG_X86_L1_CACHE_SHIFT=7 +CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_XADD=y CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INVLPG=y @@ -309,8 +338,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_HIGHPTE=y @@ -445,6 +472,7 @@ CONFIG_PCI_LEGACY=y # CONFIG_PCI_STUB is not set CONFIG_HT_IRQ=y # CONFIG_PCI_IOV is not set +CONFIG_PCI_IOAPIC=y CONFIG_ISA_DMA_API=y # CONFIG_ISA is not set # CONFIG_MCA is not set @@ -552,14 +580,18 @@ CONFIG_BT_HCIBTUSB=m # CONFIG_BT_MRVL is not set # CONFIG_AF_RXRPC is not set CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_REG_DEBUG is not set CONFIG_CFG80211_DEFAULT_PS=y -CONFIG_CFG80211_DEFAULT_PS_VALUE=1 # CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_WIRELESS_EXT=y +CONFIG_CFG80211_WEXT=y CONFIG_WIRELESS_EXT_SYSFS=y CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m @@ -616,6 +648,10 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set @@ -725,15 +761,16 @@ CONFIG_PATA_OLDPIIX=y # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RDC is not set # CONFIG_PATA_RZ1000 is not set # CONFIG_PATA_SC1200 is not set # CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set @@ -819,11 +856,11 @@ CONFIG_E100=m # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set +CONFIG_8139CP=m CONFIG_8139TOO=m -CONFIG_8139TOO_PIO=y -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set +# CONFIG_8139TOO_PIO is not set +CONFIG_8139TOO_TUNE_TWISTER=y +CONFIG_8139TOO_8129=y # CONFIG_8139_OLD_RX_RESET is not set # CONFIG_R6040 is not set # CONFIG_SIS900 is not set @@ -864,9 +901,6 @@ CONFIG_CNIC=m # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set CONFIG_WLAN=y -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_AIRO is not set CONFIG_ATMEL=m @@ -880,14 +914,36 @@ CONFIG_AT76C50X_USB=m # CONFIG_ADM8211 is not set # CONFIG_MAC80211_HWSIM is not set CONFIG_MWL8K=m -# CONFIG_P54_COMMON is not set CONFIG_ATH_COMMON=m +# CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m CONFIG_ATH9K=m -# CONFIG_ATH9K_DEBUG is not set +# CONFIG_ATH9K_DEBUGFS is not set CONFIG_AR9170_USB=m CONFIG_AR9170_LEDS=y +CONFIG_B43=m +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y +# CONFIG_B43_SDIO is not set +CONFIG_B43_PHY_LP=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_PCI_AUTOSELECT=y +CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_HWRNG=y +# CONFIG_B43LEGACY_DEBUG is not set +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_PIO=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +# CONFIG_B43LEGACY_PIO_MODE is not set +# CONFIG_HOSTAP is not set CONFIG_IPW2100=m # CONFIG_IPW2100_MONITOR is not set # CONFIG_IPW2100_DEBUG is not set @@ -898,7 +954,6 @@ CONFIG_IPW2200=m CONFIG_LIBIPW=m # CONFIG_LIBIPW_DEBUG is not set CONFIG_IWLWIFI=m -CONFIG_IWLWIFI_LEDS=y CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT=y # CONFIG_IWLWIFI_DEBUG is not set CONFIG_IWLAGN=m @@ -906,14 +961,13 @@ CONFIG_IWL4965=y CONFIG_IWL5000=y CONFIG_IWL3945=m CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y -# CONFIG_HOSTAP is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_ZD1211RW is not set -# CONFIG_RT2X00 is not set -# CONFIG_HERMES is not set -# CONFIG_WL12XX is not set # CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_WL12XX is not set +# CONFIG_ZD1211RW is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers @@ -947,6 +1001,7 @@ CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y CONFIG_INPUT=y CONFIG_INPUT_FF_MEMLESS=y # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -1022,6 +1077,7 @@ CONFIG_TABLET_USB_WACOM=m CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_AD7879_I2C is not set # CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set @@ -1034,6 +1090,7 @@ CONFIG_TOUCHSCREEN_WACOM_W8001=m # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_WM97XX is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set @@ -1049,6 +1106,7 @@ CONFIG_SERIO_I8042=y # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1109,14 +1167,8 @@ CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y # CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=m -# CONFIG_I2C_HELPER_AUTO is not set - -# -# I2C Algorithms -# +CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set # # I2C Hardware Bus support @@ -1158,11 +1210,6 @@ CONFIG_I2C_I801=m # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set -# -# Graphics adapter I2C/DDC channel drivers -# -# CONFIG_I2C_VOODOO3 is not set - # # Other I2C/SMBus bus drivers # @@ -1173,7 +1220,6 @@ CONFIG_I2C_I801=m # # Miscellaneous I2C Chip support # -# CONFIG_DS1682 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set @@ -1218,6 +1264,7 @@ CONFIG_HWMON=m # CONFIG_SENSORS_ADT7473 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_K8TEMP is not set +# CONFIG_SENSORS_K10TEMP is not set # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set @@ -1232,6 +1279,7 @@ CONFIG_HWMON=m CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set @@ -1259,6 +1307,7 @@ CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA_CPUTEMP is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set @@ -1271,6 +1320,7 @@ CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_SENSORS_HDAPS is not set +# CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_SENSORS_APPLESMC is not set # @@ -1336,7 +1386,7 @@ CONFIG_SSB=m CONFIG_SSB_SPROM=y CONFIG_SSB_PCIHOST_POSSIBLE=y CONFIG_SSB_PCIHOST=y -# CONFIG_SSB_B43_PCI_BRIDGE is not set +CONFIG_SSB_B43_PCI_BRIDGE=y CONFIG_SSB_SDIOHOST_POSSIBLE=y # CONFIG_SSB_SDIOHOST is not set # CONFIG_SSB_SILENT is not set @@ -1353,11 +1403,13 @@ CONFIG_SSB_DRIVER_PCICORE=y # CONFIG_TWL4030_CORE is not set # CONFIG_MFD_TMIO is not set # CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_AB3100_CORE is not set +# CONFIG_MFD_88PM8607 is not set # CONFIG_REGULATOR is not set # CONFIG_MEDIA_SUPPORT is not set @@ -1378,9 +1430,10 @@ CONFIG_AGP_INTEL=y CONFIG_VGA_ARB=y CONFIG_DRM=y CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_TTM=y # CONFIG_DRM_TDFX is not set # CONFIG_DRM_R128 is not set -# CONFIG_DRM_RADEON is not set +CONFIG_DRM_RADEON=y # CONFIG_DRM_I810 is not set # CONFIG_DRM_I830 is not set CONFIG_DRM_I915=y @@ -1389,12 +1442,6 @@ CONFIG_DRM_I915_KMS=y # CONFIG_DRM_SIS is not set # CONFIG_DRM_VIA is not set # CONFIG_DRM_SAVAGE is not set -# CONFIG_DRM_NOUVEAU is not set - -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set # CONFIG_VGASTATE is not set CONFIG_VIDEO_OUTPUT_CONTROL=y CONFIG_FB=y @@ -1507,6 +1554,7 @@ CONFIG_SND_DMA_SGBUF=y # CONFIG_SND_OPL4_LIB_SEQ is not set # CONFIG_SND_SBAWE_SEQ is not set # CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_AC97_CODEC=m # CONFIG_SND_DRIVERS is not set CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set @@ -1576,8 +1624,8 @@ CONFIG_SND_HDA_POWER_SAVE_DEFAULT=5 # CONFIG_SND_HIFIER is not set # CONFIG_SND_ICE1712 is not set # CONFIG_SND_ICE1724 is not set -# CONFIG_SND_INTEL8X0 is not set -# CONFIG_SND_INTEL8X0M is not set +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m # CONFIG_SND_KORG1212 is not set # CONFIG_SND_LX6464ES is not set # CONFIG_SND_MAESTRO3 is not set @@ -1599,6 +1647,7 @@ CONFIG_SND_HDA_POWER_SAVE_DEFAULT=5 # CONFIG_SND_USB is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m CONFIG_HID_SUPPORT=y CONFIG_HID=y CONFIG_HIDRAW=y @@ -1808,6 +1857,7 @@ CONFIG_LEDS_CLASS=m # CONFIG_LEDS_CLEVO_MAIL is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_INTEL_SS4200 is not set # # LED Triggers @@ -1852,6 +1902,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8581 is not set @@ -1873,7 +1924,9 @@ CONFIG_RTC_DRV_CMOS=y # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_V3020 is not set # @@ -1893,7 +1946,63 @@ CONFIG_UIO=m # # TI VLYNQ # -# CONFIG_STAGING is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_ET131X is not set +# CONFIG_SLICOSS is not set +# CONFIG_USB_IP_COMMON is not set +# CONFIG_W35UND is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_POCH is not set +# CONFIG_OTUS is not set +# CONFIG_RT2860 is not set +# CONFIG_RT2870 is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_ALTERA_PCIE_CHDMA is not set +# CONFIG_R8187SE is not set +# CONFIG_RTL8192SU is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTL8192E is not set +# CONFIG_INPUT_MIMIO is not set +# CONFIG_TRANZPORT is not set + +# +# Qualcomm MSM Camera And Video +# + +# +# Camera Sensor Selection +# +# CONFIG_INPUT_GPIO is not set +# CONFIG_POHMELFS is not set +# CONFIG_B3DFG is not set +# CONFIG_IDE_PHISON is not set +# CONFIG_PLAN9AUTH is not set +# CONFIG_LINE6_USB is not set +# CONFIG_DRM_VMWGFX is not set +CONFIG_DRM_RADEON_KMS=y +# CONFIG_DRM_NOUVEAU is not set + +# +# I2C encoder or helper chips +# +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set +# CONFIG_FB_UDL is not set +# CONFIG_HYPERV is not set +# CONFIG_VME_BUS is not set + +# +# RAR Register Driver +# +# CONFIG_RAR_REGISTER is not set +# CONFIG_IIO is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_SAMSUNG_LAPTOP is not set +# CONFIG_STRIP is not set +# CONFIG_FB_SM7XX is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -1910,13 +2019,11 @@ CONFIG_FIRMWARE_MEMMAP=y # File systems # # CONFIG_EXT2_FS is not set -CONFIG_EXT3_FS=m -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y # CONFIG_EXT4_FS_XATTR is not set # CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=m CONFIG_JBD2=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set @@ -2082,7 +2189,7 @@ CONFIG_FRAME_WARN=1024 # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_MEMORY_INIT is not set CONFIG_ARCH_WANT_FRAME_POINTERS=y # CONFIG_FRAME_POINTER is not set @@ -2129,8 +2236,11 @@ CONFIG_OPTIMIZE_INLINING=y # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_IMA is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y # diff --git a/projects/intel/linux/linux.i386.conf b/projects/intel/linux/linux.i386.conf index fbe4c863a9..b7d25c9a1c 100644 --- a/projects/intel/linux/linux.i386.conf +++ b/projects/intel/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.32.2 +# Linux kernel version: 2.6.33-rc2 # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -88,6 +88,7 @@ CONFIG_AUDIT_TREE=y # CONFIG_TREE_RCU=y # CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=32 # CONFIG_RCU_FANOUT_EXACT is not set @@ -140,7 +141,7 @@ CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # -# CONFIG_PERF_EVENTS is not set +CONFIG_PERF_EVENTS=y # CONFIG_PERF_COUNTERS is not set # CONFIG_VM_EVENT_COUNTERS is not set CONFIG_PCI_QUIRKS=y @@ -158,6 +159,8 @@ CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_ATTRS=y CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y # # GCOV-based kernel profiling @@ -182,14 +185,41 @@ CONFIG_BLK_DEV_BSG=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set # CONFIG_IOSCHED_DEADLINE is not set CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y # CONFIG_FREEZER is not set # @@ -235,8 +265,7 @@ CONFIG_MCORE2=y # CONFIG_GENERIC_CPU is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_CPU=y -CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_INTERNODE_CACHE_BYTES=64 +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_XADD=y @@ -309,8 +338,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_HIGHPTE=y @@ -445,6 +472,7 @@ CONFIG_PCI_LEGACY=y # CONFIG_PCI_STUB is not set CONFIG_HT_IRQ=y # CONFIG_PCI_IOV is not set +CONFIG_PCI_IOAPIC=y CONFIG_ISA_DMA_API=y # CONFIG_ISA is not set # CONFIG_MCA is not set @@ -551,14 +579,15 @@ CONFIG_BT_HCIBTUSB=m # CONFIG_BT_MRVL is not set # CONFIG_AF_RXRPC is not set CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_REG_DEBUG is not set CONFIG_CFG80211_DEFAULT_PS=y -CONFIG_CFG80211_DEFAULT_PS_VALUE=1 # CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_WIRELESS_EXT=y +CONFIG_CFG80211_WEXT=y CONFIG_WIRELESS_EXT_SYSFS=y CONFIG_LIB80211=m # CONFIG_LIB80211_DEBUG is not set @@ -612,6 +641,10 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set @@ -721,15 +754,16 @@ CONFIG_PATA_OLDPIIX=y # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RDC is not set # CONFIG_PATA_RZ1000 is not set # CONFIG_PATA_SC1200 is not set # CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set @@ -793,9 +827,6 @@ CONFIG_E1000E=m # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set CONFIG_WLAN=y -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_AIRO is not set # CONFIG_ATMEL is not set @@ -808,12 +839,13 @@ CONFIG_WLAN_80211=y # CONFIG_ADM8211 is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set -# CONFIG_P54_COMMON is not set # CONFIG_ATH_COMMON is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_HOSTAP is not set # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set CONFIG_IWLWIFI=m -CONFIG_IWLWIFI_LEDS=y CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT=y # CONFIG_IWLWIFI_DEBUG is not set CONFIG_IWLAGN=m @@ -821,13 +853,12 @@ CONFIG_IWL4965=y CONFIG_IWL5000=y CONFIG_IWL3945=m CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y -# CONFIG_HOSTAP is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_ZD1211RW is not set -# CONFIG_RT2X00 is not set +# CONFIG_LIBERTAS is not set # CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set # CONFIG_WL12XX is not set +# CONFIG_ZD1211RW is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers @@ -861,6 +892,7 @@ CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y CONFIG_INPUT=y CONFIG_INPUT_FF_MEMLESS=y # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -936,6 +968,7 @@ CONFIG_TABLET_USB_WACOM=m CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_AD7879_I2C is not set # CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set @@ -963,6 +996,7 @@ CONFIG_SERIO_I8042=y # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1072,11 +1106,6 @@ CONFIG_I2C_I801=m # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set -# -# Graphics adapter I2C/DDC channel drivers -# -# CONFIG_I2C_VOODOO3 is not set - # # Other I2C/SMBus bus drivers # @@ -1087,7 +1116,6 @@ CONFIG_I2C_I801=m # # Miscellaneous I2C Chip support # -# CONFIG_DS1682 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set @@ -1132,6 +1160,7 @@ CONFIG_HWMON=m # CONFIG_SENSORS_ADT7473 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_K8TEMP is not set +# CONFIG_SENSORS_K10TEMP is not set # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set @@ -1146,6 +1175,7 @@ CONFIG_HWMON=m CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set @@ -1173,6 +1203,7 @@ CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA_CPUTEMP is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set @@ -1185,6 +1216,7 @@ CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_SENSORS_HDAPS is not set +# CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_SENSORS_APPLESMC is not set # @@ -1257,11 +1289,13 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_TWL4030_CORE is not set # CONFIG_MFD_TMIO is not set # CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_AB3100_CORE is not set +# CONFIG_MFD_88PM8607 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -1278,6 +1312,8 @@ CONFIG_VIDEO_MEDIA=m # # Multimedia drivers # +CONFIG_IR_CORE=m +CONFIG_VIDEO_IR=m CONFIG_MEDIA_ATTACH=y CONFIG_MEDIA_TUNER=m CONFIG_MEDIA_TUNER_CUSTOMISE=y @@ -1298,12 +1334,12 @@ CONFIG_MEDIA_TUNER_XC5000=m CONFIG_MEDIA_TUNER_MXL5005S=m CONFIG_MEDIA_TUNER_MXL5007T=m CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m CONFIG_VIDEO_V4L2=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_DMA_SG=m CONFIG_VIDEOBUF_DVB=m CONFIG_VIDEO_BTCX=m -CONFIG_VIDEO_IR=m CONFIG_VIDEO_TVEEPROM=m CONFIG_VIDEO_TUNER=m CONFIG_VIDEO_CAPTURE_DRIVERS=y @@ -1355,6 +1391,7 @@ CONFIG_VIDEO_CX18=m CONFIG_DVB_MAX_ADAPTERS=8 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_CAPTURE_DRIVERS is not set +CONFIG_DVB_STB6100=m CONFIG_DVB_CX24123=m CONFIG_DVB_MT312=m CONFIG_DVB_ZL10036=m @@ -1367,6 +1404,7 @@ CONFIG_DVB_STV0900=m CONFIG_DVB_TDA10086=m CONFIG_DVB_TDA826X=m CONFIG_DVB_CX24116=m +CONFIG_DVB_DS3000=m CONFIG_DVB_CX22702=m CONFIG_DVB_TDA1004X=m CONFIG_DVB_MT352=m @@ -1798,6 +1836,7 @@ CONFIG_LEDS_CLASS=m # CONFIG_LEDS_CLEVO_MAIL is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_INTEL_SS4200 is not set # # LED Triggers @@ -1842,6 +1881,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8581 is not set @@ -1863,7 +1903,9 @@ CONFIG_RTC_DRV_CMOS=y # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_V3020 is not set # @@ -1893,13 +1935,11 @@ CONFIG_FIRMWARE_MEMMAP=y # File systems # # CONFIG_EXT2_FS is not set -CONFIG_EXT3_FS=m -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y # CONFIG_EXT4_FS_XATTR is not set # CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=m CONFIG_JBD2=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set @@ -2065,7 +2105,7 @@ CONFIG_FRAME_WARN=1024 # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_MEMORY_INIT is not set CONFIG_ARCH_WANT_FRAME_POINTERS=y # CONFIG_FRAME_POINTER is not set @@ -2112,8 +2152,11 @@ CONFIG_OPTIMIZE_INLINING=y # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_IMA is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y #