mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
synced 2025-07-24 11:16:51 +00:00
Merge pull request #8650 from chewitt/amlogic-upstream
Amlogic kernel bump and misc. bits
This commit is contained in:
commit
4307755f99
@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
|
||||
|
||||
case "${LINUX}" in
|
||||
amlogic)
|
||||
PKG_VERSION="ffc253263a1375a65fa6c9f62a893e9767fbebfa" # 6.6
|
||||
PKG_SHA256="2fa48537a32d233ec8f8f0ba36fdd19c07a9ee78a574034876b39939429ced84"
|
||||
PKG_VERSION="004dcea13dc10acaf1486d9939be4c793834c13c" # 6.7.5
|
||||
PKG_SHA256="65911f37f072778f60f77821e8c4cf67e7a8aeca8a290fbbb743ee877048a676"
|
||||
PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
|
||||
PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
|
||||
PKG_PATCH_DIRS="default"
|
||||
|
@ -14,9 +14,9 @@ PKG_PATCH_DIRS="libreelec"
|
||||
|
||||
case "${PROJECT}" in
|
||||
Amlogic)
|
||||
PKG_VERSION="6859fc2a8791c0fcc25851b77fed15a691ceb332"
|
||||
PKG_VERSION="9011d22fed1834cb7bd946349cc8a5eda748eec7"
|
||||
PKG_FFMPEG_BRANCH="dev/6.0/rpi_import_1"
|
||||
PKG_SHA256="d9ba353b5ab95489bb999cec958bed154534ccb46c154fb8b9d6848188f7ef8c"
|
||||
PKG_SHA256="35b6b84a3e6542a4d96f9a0537c8dbf95176cc07452b0a63339a44b1590bf5f2"
|
||||
PKG_URL="https://github.com/jc-kynesim/rpi-ffmpeg/archive/${PKG_VERSION}.tar.gz"
|
||||
;;
|
||||
RPi)
|
||||
|
@ -62,6 +62,7 @@ mkimage_dtb(){
|
||||
mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/$DTB" ::
|
||||
if [ "$DTB" = "meson-g12b-odroid-n2.dtb" ]; then
|
||||
mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-odroid-n2-plus.dtb" ::
|
||||
mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-odroid-n2l.dtb" ::
|
||||
elif [ "$DTB" = "meson-g12b-gtking.dtb" ]; then
|
||||
mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-gtking-pro.dtb" ::
|
||||
mcopy -s -o "${RELEASE_DIR}/3rdparty/bootloader/dtb/meson-g12b-gsking-x.dtb" ::
|
||||
|
@ -7,6 +7,7 @@ mt7662.bin
|
||||
mt7662_rom_patch.bin
|
||||
qca/nvm_00230302.bin
|
||||
qca/rampatch_00230302.bin
|
||||
rtlwifi/rtl8188eufw.bin
|
||||
rtlwifi/rtl8192cufw_TMSC.bin
|
||||
rtlwifi/rtl8192cufw.bin
|
||||
rtlwifi/rtl8192eu_nic.bin
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 6afe9e1f72b5b6a8088e06e677df69af563da7de Mon Sep 17 00:00:00 2001
|
||||
From 7b7853885891650fff72c6133d24d34998b658fb Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 13 Apr 2019 05:41:51 +0000
|
||||
Subject: [PATCH 01/41] LOCAL: set meson-gx cma pool to 896MB
|
||||
Subject: [PATCH 01/64] LOCAL: set meson-gx cma pool to 896MB
|
||||
|
||||
This change sets the CMA pool to a larger 896MB! value for vdec use
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
From b43e58e6d606414c65fa1cbe91bbabcb6dccc92e Mon Sep 17 00:00:00 2001
|
||||
From b06263d189fe8c6afc4b6bfe0bd50823042b39fc Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 14 Aug 2019 19:58:14 +0000
|
||||
Subject: [PATCH 02/41] LOCAL: set meson-g12 cma pool to 896MB
|
||||
Subject: [PATCH 02/64] LOCAL: set meson-g12 cma pool to 896MB
|
||||
|
||||
This change sets the CMA pool to a larger 896MB! value for vdec use
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 71908cf37c0985a0807af0997518615998e624ba Mon Sep 17 00:00:00 2001
|
||||
From cc51fd5a5dc1eedeb89f802f9479d3510817bebe Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 13 Apr 2019 05:45:18 +0000
|
||||
Subject: [PATCH 03/41] LOCAL: arm64: fix Kodi sysinfo CPU information
|
||||
Subject: [PATCH 03/64] LOCAL: arm64: fix Kodi sysinfo CPU information
|
||||
|
||||
This allows the CPU information to show in the Kodi sysinfo screen, e.g.
|
||||
|
||||
@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
1 file changed, 1 insertion(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
|
||||
index 98fda8500535..945030a5caf6 100644
|
||||
index a257da7b56fe..de893e3a5e57 100644
|
||||
--- a/arch/arm64/kernel/cpuinfo.c
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||||
+++ b/arch/arm64/kernel/cpuinfo.c
|
||||
@@ -189,8 +189,7 @@ static int c_show(struct seq_file *m, void *v)
|
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@@ -192,8 +192,7 @@ static int c_show(struct seq_file *m, void *v)
|
||||
* "processor". Give glibc what it expects.
|
||||
*/
|
||||
seq_printf(m, "processor\t: %d\n", i);
|
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|
@ -1,7 +1,7 @@
|
||||
From 7a0b8b90cf643983e6e5cded5a0cdaba04485024 Mon Sep 17 00:00:00 2001
|
||||
From 8686b57a5828a674d07954da9d0993b84202966b Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Thu, 3 Nov 2016 15:29:23 +0100
|
||||
Subject: [PATCH 04/41] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
|
||||
Subject: [PATCH 04/64] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
|
||||
|
||||
The Amlogic Meson GX SoCs uses a non-standard argument to the
|
||||
PSCI CPU_SUSPEND call to enter system suspend.
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 740e1962fd1667772186f5ff5d1298ccdcc926f1 Mon Sep 17 00:00:00 2001
|
||||
From feabed1f718912863b14a051074fc5feb7e6e55a Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Thu, 3 Nov 2016 15:29:25 +0100
|
||||
Subject: [PATCH 05/41] LOCAL: arm64: dts: meson: add support for GX PM and
|
||||
Subject: [PATCH 05/64] LOCAL: arm64: dts: meson: add support for GX PM and
|
||||
Virtual RTC
|
||||
|
||||
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 0c3583f1c9c959c6211c4c9d956bd973c955bcd3 Mon Sep 17 00:00:00 2001
|
||||
From 3f431bfc58eb527290ad1b461e5e291536a675cf Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 21 Jan 2021 01:35:36 +0000
|
||||
Subject: [PATCH 06/41] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Subject: [PATCH 06/64] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Khadas VIM
|
||||
|
||||
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 1e017589a33d2bf5be5f3c2d9985950c3723fcd7 Mon Sep 17 00:00:00 2001
|
||||
From 9f5b04acf796cb5c423de664296dfd66b3c98975 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 6 Nov 2021 13:01:08 +0000
|
||||
Subject: [PATCH 07/41] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Subject: [PATCH 07/64] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Khadas VIM2
|
||||
|
||||
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 6fc5f33e5e637279ff0f5576c6b3f31d8906d15e Mon Sep 17 00:00:00 2001
|
||||
From 9d15c5b5d125d392bbcca8d74f9c76cbbd6157e8 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 1 Feb 2021 19:27:40 +0000
|
||||
Subject: [PATCH 08/41] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
|
||||
Subject: [PATCH 08/64] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
|
||||
NEO U9-H
|
||||
|
||||
Add node aliases to prevent meson-vrtc from claiming /dev/rtc0
|
||||
|
@ -1,24 +1,23 @@
|
||||
From 4debf07727dd1a4bd8c13120529de73cfa6d1f35 Mon Sep 17 00:00:00 2001
|
||||
From ef1379f8920505d862ae335355afa60ff564554b Mon Sep 17 00:00:00 2001
|
||||
From: Anssi Hannula <anssi.hannula@iki.fi>
|
||||
Date: Sun, 17 Apr 2022 04:37:48 +0000
|
||||
Subject: [PATCH 09/41] LOCAL: ALSA: Assign internal PCM chmap/ELD/IEC958 kctls
|
||||
to device 0
|
||||
Subject: [PATCH 09/64] LOCAL: ASoC: meson: assign internal PCM
|
||||
chmap/ELD/IEC958 kctls to device 0
|
||||
|
||||
On SoC sound devices utilizing codec2codec DAI links with a HDMI codec
|
||||
the kctls for chmap, ELD, IEC958 are currently created using the
|
||||
internal PCM device numbers. This causes userspace to not see the
|
||||
actual channel mapping.
|
||||
On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
|
||||
for chmap, ELD, IEC958 are created using internal PCM device numbers. This causes
|
||||
userspace to not see the actual channel mapping. This affects all Amlogic devices
|
||||
using the AIU and AXG audio drivers: currently all Amlogic devices.
|
||||
|
||||
Affected devices include LibreTech LePotato and Wetek Play 2.
|
||||
The proper fix would be not create these kctls for internal PCMs and instead create
|
||||
them for the real userspace-visible PCMs, somehow forwarding the controls between
|
||||
the HDMI codec and the real PCM.
|
||||
|
||||
The proper fix would be not create these kctls for internal PCMs and
|
||||
instead create them for the real userspace-visible PCMs, somehow
|
||||
forwarding the controls between the HDMI codec and the real PCM.
|
||||
|
||||
As a workaround, simply use device=0 for all channel map controls and
|
||||
SoC HDMI codec controls for internal PCM devices.
|
||||
As a workaround, simply use device=0 for all channel map controls and SoC HDMI codec
|
||||
controls for internal PCM devices.
|
||||
|
||||
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
|
||||
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
sound/core/pcm_lib.c | 5 ++++-
|
||||
sound/soc/codecs/hdmi-codec.c | 3 ++-
|
||||
@ -41,7 +40,7 @@ index a11cd7d6295f..94269e485873 100644
|
||||
knew.private_value = private_value;
|
||||
info->kctl = snd_ctl_new1(&knew, info);
|
||||
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
|
||||
index 09eef6042aad..71b44385d235 100644
|
||||
index 0938671700c6..3131a20f1b21 100644
|
||||
--- a/sound/soc/codecs/hdmi-codec.c
|
||||
+++ b/sound/soc/codecs/hdmi-codec.c
|
||||
@@ -801,7 +801,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
|
@ -1,7 +1,7 @@
|
||||
From dd37d023ae1ccbdf3d8bb96ef209bd32ad8742f1 Mon Sep 17 00:00:00 2001
|
||||
From 0e5347d521ba33c9d07f1ce9eb7cb04a7249210f Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
|
||||
Date: Sun, 20 Feb 2022 08:23:12 +0000
|
||||
Subject: [PATCH 21/41] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
|
||||
Subject: [PATCH 10/64] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
|
||||
Micro Electronics
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
@ -17,10 +17,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
|
||||
index 573578db9509..0022fb4a36ed 100644
|
||||
index 309b94c328c8..3244083ab0af 100644
|
||||
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
|
||||
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
|
||||
@@ -1383,6 +1383,8 @@ patternProperties:
|
||||
@@ -1407,6 +1407,8 @@ patternProperties:
|
||||
description: Texas Instruments
|
||||
"^tianma,.*":
|
||||
description: Tianma Micro-electronics Co., Ltd.
|
@ -1,34 +0,0 @@
|
||||
From b985e435372a2870b8175e3a93623f274b14adfa Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 3 Jan 2022 10:44:17 +0000
|
||||
Subject: [PATCH 10/41] LOCAL: usb: hub: disable autosuspend for Genesys Logic
|
||||
Hubs
|
||||
|
||||
Disable autosuspend in Genesys Logic hubs to allow USB devices on the
|
||||
Odroid C2 board to be used. The alternative to this patch is setting
|
||||
usbcore.autosuspend=-1 in boot params.
|
||||
|
||||
This patch only impacts GXBB devices as GXL/GXM onwards use the newer
|
||||
dwc3 core which does not have the problem.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/usb/core/hub.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
|
||||
index 0ff47eeffb49..fd94382c3fcc 100644
|
||||
--- a/drivers/usb/core/hub.c
|
||||
+++ b/drivers/usb/core/hub.c
|
||||
@@ -5903,7 +5903,7 @@ static const struct usb_device_id hub_id_table[] = {
|
||||
| USB_DEVICE_ID_MATCH_INT_CLASS,
|
||||
.idVendor = USB_VENDOR_GENESYS_LOGIC,
|
||||
.bInterfaceClass = USB_CLASS_HUB,
|
||||
- .driver_info = HUB_QUIRK_CHECK_PORT_AUTOSUSPEND},
|
||||
+ .driver_info = HUB_QUIRK_DISABLE_AUTOSUSPEND},
|
||||
{ .match_flags = USB_DEVICE_ID_MATCH_VENDOR
|
||||
| USB_DEVICE_ID_MATCH_PRODUCT,
|
||||
.idVendor = USB_VENDOR_TEXAS_INSTRUMENTS,
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,99 +0,0 @@
|
||||
From ba393a7d0fdd07caaa5f7f13ff9384d1acf0568f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 15 May 2020 07:56:15 +0000
|
||||
Subject: [PATCH 11/41] FROMGIT(6.7): arm64: dts: meson: add audio playback to
|
||||
p200
|
||||
|
||||
Add initial support limited to HDMI i2s and SPDIF (LPCM).
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-gxbb-p200.dts | 60 +++++++++++++++++++
|
||||
1 file changed, 60 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
|
||||
index 3c93d1898b40..292c718ee19c 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
|
||||
@@ -9,11 +9,19 @@
|
||||
|
||||
#include "meson-gxbb-p20x.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/sound/meson-aiu.h>
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,p200", "amlogic,meson-gxbb";
|
||||
model = "Amlogic Meson GXBB P200 Development Board";
|
||||
|
||||
+ spdif_dit: audio-codec-0 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "linux,spdif-dit";
|
||||
+ status = "okay";
|
||||
+ sound-name-prefix = "DIT";
|
||||
+ };
|
||||
+
|
||||
avdd18_usb_adc: regulator-avdd18_usb_adc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "AVDD18_USB_ADC";
|
||||
@@ -57,6 +65,58 @@ button-menu {
|
||||
press-threshold-microvolt = <0>; /* 0% */
|
||||
};
|
||||
};
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,gx-sound-card";
|
||||
+ model = "P200";
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>,
|
||||
+ <&clkc CLKID_MPLL2>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&spdif_dit>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&spdif_out_y_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
};
|
||||
|
||||
ðmac {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From ff3ca6ccd23f301066f0e84f69a8d02127263edb Mon Sep 17 00:00:00 2001
|
||||
From b77beaa8de150b04b2de2242bb3bcbde18eca04d Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sun, 20 Feb 2022 08:24:47 +0000
|
||||
Subject: [PATCH 22/41] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
|
||||
Subject: [PATCH 11/64] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
|
||||
Electronics TM1628
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
@ -1,70 +0,0 @@
|
||||
From 833c06b7da2e381d2b87949cb76fce198d4102c8 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 15 May 2020 07:52:47 +0000
|
||||
Subject: [PATCH 12/41] FROMGIT(6.7): arm64: dts: meson: add audio playback to
|
||||
p201
|
||||
|
||||
Add initial audio support limited to HDMI i2s.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-gxbb-p201.dts | 39 +++++++++++++++++++
|
||||
1 file changed, 39 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
|
||||
index 150a82f3b2d7..6f81eed83bec 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
|
||||
@@ -8,10 +8,49 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "meson-gxbb-p20x.dtsi"
|
||||
+#include <dt-bindings/sound/meson-aiu.h>
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,p201", "amlogic,meson-gxbb";
|
||||
model = "Amlogic Meson GXBB P201 Development Board";
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,gx-sound-card";
|
||||
+ model = "P201";
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>,
|
||||
+ <&clkc CLKID_MPLL2>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
ðmac {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 9dec15af4585a5957523dbcc1943f4897c73e38a Mon Sep 17 00:00:00 2001
|
||||
From da6fb6205863869aa1edc27169a085a08630c086 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sun, 20 Feb 2022 08:26:27 +0000
|
||||
Subject: [PATCH 23/41] FROMLIST(v5): docs: ABI: document tm1628 attribute
|
||||
Subject: [PATCH 12/64] FROMLIST(v5): docs: ABI: document tm1628 attribute
|
||||
display-text
|
||||
|
||||
Document the attribute for reading / writing the text to be displayed on
|
@ -1,191 +0,0 @@
|
||||
From d53d631f08dd12cb841a10850e2f3efdc36d1d6f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sun, 17 May 2020 05:00:55 +0000
|
||||
Subject: [PATCH 13/41] FROMGIT(6.7): arm64: dts: meson: add audio playback to
|
||||
u200
|
||||
|
||||
Add initial support limited to HDMI i2s and SPDIF (LPCM).
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-g12a-u200.dts | 129 ++++++++++++++++++
|
||||
1 file changed, 129 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index 4b5d11e56364..2878e3ad7de2 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -8,6 +8,7 @@
|
||||
#include "meson-g12a.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,u200", "amlogic,g12a";
|
||||
@@ -18,6 +19,13 @@ aliases {
|
||||
ethernet0 = ðmac;
|
||||
};
|
||||
|
||||
+ spdif_dit: audio-codec-1 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "linux,spdif-dit";
|
||||
+ status = "okay";
|
||||
+ sound-name-prefix = "DIT";
|
||||
+ };
|
||||
+
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
@@ -147,6 +155,89 @@ vddcpu: regulator-vddcpu {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,axg-sound-card";
|
||||
+ model = "U200";
|
||||
+ audio-aux-devs = <&tdmout_b>;
|
||||
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT IN 2", "FRDDR_C OUT 3";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
+ <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&frddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&frddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&frddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif hdmi or toslink interface */
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&spdifout>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&spdif_dit>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif hdmi interface */
|
||||
+ dai-link-5 {
|
||||
+ sound-dai = <&spdifout_b>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* hdmi glue */
|
||||
+ dai-link-6 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&arb {
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&cec_AO {
|
||||
@@ -163,6 +254,10 @@ &cecb_AO {
|
||||
hdmi-phandle = <&hdmi_tx>;
|
||||
};
|
||||
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&cpu0 {
|
||||
cpu-supply = <&vddcpu>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
@@ -203,6 +298,18 @@ ðmac {
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
+&frddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&hdmi_tx {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
||||
@@ -288,6 +395,28 @@ &sd_emmc_c {
|
||||
vqmmc-supply = <&flash_1v8>;
|
||||
};
|
||||
|
||||
+&spdifout {
|
||||
+ pinctrl-0 = <&spdif_out_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spdifout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&uart_AO {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&uart_ao_a_pins>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From ff7dd59e1598ce3d29f51b095be42f8ec73c3954 Mon Sep 17 00:00:00 2001
|
||||
From 759bef4817e478e057433f65e34036e22cc1b62d Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:51:20 +0000
|
||||
Subject: [PATCH 24/41] FROMLIST(v5): auxdisplay: add support for Titanmec
|
||||
Subject: [PATCH 13/64] FROMLIST(v5): auxdisplay: add support for Titanmec
|
||||
TM1628 7 segment display controller
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
@ -1,33 +0,0 @@
|
||||
From 07540de878a712ea0b204c4f2a8fc766eb2b6842 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 11 Sep 2023 17:45:37 +0200
|
||||
Subject: [PATCH 14/41] FROMGIT(6.7): arm64: dts: meson: u200: fix spdif output
|
||||
pin
|
||||
|
||||
u200 outputs spdif on GPIOAO_10, not GPIOH_4 which is used for the LCD
|
||||
panel.
|
||||
|
||||
Fixes: cfae4eadb7cd ("arm64: dts: meson: add audio playback to u200")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20230911154541.471484-2-jbrunet@baylibre.com
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index 2878e3ad7de2..8fa17a62534c 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -396,7 +396,7 @@ &sd_emmc_c {
|
||||
};
|
||||
|
||||
&spdifout {
|
||||
- pinctrl-0 = <&spdif_out_h_pins>;
|
||||
+ pinctrl-0 = <&spdif_ao_out_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 4e864ed37bdfd4ba8a2581ee032425565989c145 Mon Sep 17 00:00:00 2001
|
||||
From 838bae2f7d263c884239028500a60ca562ae2c2c Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:52:34 +0000
|
||||
Subject: [PATCH 25/41] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
|
||||
Subject: [PATCH 14/64] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
|
||||
support for the 7 segment display
|
||||
|
||||
This patch adds support for the 7 segment display of the device.
|
@ -1,35 +0,0 @@
|
||||
From 71128149d3bcae9cbe7f4ec7902e2c5727f629af Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 11 Sep 2023 17:45:38 +0200
|
||||
Subject: [PATCH 15/41] FROMGIT(6.7): arm64: dts: meson: u200: add missing
|
||||
audio clock controller
|
||||
|
||||
The audio subsystem will not work if the audio clock controller is not
|
||||
enabled.
|
||||
|
||||
Fixes: cfae4eadb7cd ("arm64: dts: meson: add audio playback to u200")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20230911154541.471484-3-jbrunet@baylibre.com
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index 8fa17a62534c..2380d237d220 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -286,6 +286,10 @@ &cpu3 {
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&cvbs_vdac_port {
|
||||
cvbs_vdac_out: endpoint {
|
||||
remote-endpoint = <&cvbs_connector_in>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From ab7deebd236cc78134692021439f175a3bcf5a9a Mon Sep 17 00:00:00 2001
|
||||
From 09ba3701f1cf474aa774f2a79b0eae67f216dc39 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:53:32 +0000
|
||||
Subject: [PATCH 26/41] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
|
||||
Subject: [PATCH 15/64] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
|
||||
auxdisplay driver
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
@ -10,10 +10,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/MAINTAINERS b/MAINTAINERS
|
||||
index dd5de540ec0b..d1b1ce8f5ebe 100644
|
||||
index a7c4cf8201e0..2b1d4c6eb346 100644
|
||||
--- a/MAINTAINERS
|
||||
+++ b/MAINTAINERS
|
||||
@@ -21693,6 +21693,13 @@ W: http://sourceforge.net/projects/tlan/
|
||||
@@ -21851,6 +21851,13 @@ W: http://sourceforge.net/projects/tlan/
|
||||
F: Documentation/networking/device_drivers/ethernet/ti/tlan.rst
|
||||
F: drivers/net/ethernet/ti/tlan.*
|
||||
|
@ -1,38 +0,0 @@
|
||||
From 63377f9080cfcdbc8129fa969c1758c5086df61b Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 11 Sep 2023 17:45:39 +0200
|
||||
Subject: [PATCH 16/41] FROMGIT(6.7): arm64: dts: meson: u200: add spdifout b
|
||||
routes
|
||||
|
||||
spdifout B remains untested as it can only feed the HDMI controller, which
|
||||
does not support spdif ATM.
|
||||
|
||||
Still if the u200 has spdifout b, the routes to it should be set.
|
||||
|
||||
Fixes: cfae4eadb7cd ("arm64: dts: meson: add audio playback to u200")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20230911154541.471484-4-jbrunet@baylibre.com
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 5 ++++-
|
||||
1 file changed, 4 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index 2380d237d220..921b62c5ab33 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -166,7 +166,10 @@ sound {
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
- "SPDIFOUT IN 2", "FRDDR_C OUT 3";
|
||||
+ "SPDIFOUT IN 2", "FRDDR_C OUT 3",
|
||||
+ "SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
|
||||
+ "SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
|
||||
+ "SPDIFOUT_B IN 2", "FRDDR_C OUT 4";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 5263c9b4b4386aa55dc40dada82f8aae4f184317 Mon Sep 17 00:00:00 2001
|
||||
From a06eb0c57ce793d99be5b078fb02cd4ca2ff93e5 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 23 Dec 2018 02:24:38 +0100
|
||||
Subject: [PATCH 27/41] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
|
||||
Subject: [PATCH 16/64] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
|
||||
allocation list
|
||||
|
||||
Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().
|
||||
@ -25,7 +25,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 77 insertions(+), 63 deletions(-)
|
||||
|
||||
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
|
||||
index 71b44385d235..2e4c69efa4ee 100644
|
||||
index 3131a20f1b21..b6d274c4b5e3 100644
|
||||
--- a/sound/soc/codecs/hdmi-codec.c
|
||||
+++ b/sound/soc/codecs/hdmi-codec.c
|
||||
@@ -184,84 +184,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
|
@ -1,77 +0,0 @@
|
||||
From b61d92fb849afa52c59af8323da76b33381549e1 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 11 Sep 2023 17:45:40 +0200
|
||||
Subject: [PATCH 17/41] FROMGIT(6.7): arm64: dts: meson: u200: use TDM C for
|
||||
HDMI
|
||||
|
||||
On the u200, TDM B is wired to the onboard AD82584F i2c speaker codec.
|
||||
This makes TDM B a poor choice for the interface dedicated to HDMI which
|
||||
uses 4 i2s lanes.
|
||||
|
||||
TDM A is not a good choice either as it is connected to the SDIO wifi/bt
|
||||
chip.
|
||||
|
||||
TDM C is not used externally by default, which makes it a better choice for
|
||||
the HDMI interface.
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20230911154541.471484-5-jbrunet@baylibre.com
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 16 ++++++++--------
|
||||
1 file changed, 8 insertions(+), 8 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index 921b62c5ab33..da66e2e1dffb 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -159,10 +159,10 @@ vddcpu: regulator-vddcpu {
|
||||
sound {
|
||||
compatible = "amlogic,axg-sound-card";
|
||||
model = "U200";
|
||||
- audio-aux-devs = <&tdmout_b>;
|
||||
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ audio-aux-devs = <&tdmout_c>;
|
||||
+ audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
|
||||
+ "TDMOUT_C IN 1", "FRDDR_B OUT 2",
|
||||
+ "TDMOUT_C IN 2", "FRDDR_C OUT 2",
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
@@ -193,7 +193,7 @@ dai-link-2 {
|
||||
|
||||
/* 8ch hdmi interface */
|
||||
dai-link-3 {
|
||||
- sound-dai = <&tdmif_b>;
|
||||
+ sound-dai = <&tdmif_c>;
|
||||
dai-format = "i2s";
|
||||
dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
@@ -202,7 +202,7 @@ dai-link-3 {
|
||||
mclk-fs = <256>;
|
||||
|
||||
codec {
|
||||
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -412,11 +412,11 @@ &spdifout_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
-&tdmif_b {
|
||||
+&tdmif_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
-&tdmout_b {
|
||||
+&tdmout_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From b6c37f6642a56bc9b9b6e4c2b8cb52d8bf187e20 Mon Sep 17 00:00:00 2001
|
||||
From 75d03ce5ecfc46fb45b849dd93605f66a3fdf767 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Mon, 22 Nov 2021 09:15:21 +0000
|
||||
Subject: [PATCH 28/41] FROMLIST(v1): media: meson: vdec: esparser: check
|
||||
Subject: [PATCH 17/64] FROMLIST(v1): media: meson: vdec: esparser: check
|
||||
parsing state with hardware write pointer
|
||||
|
||||
Also check the hardware write pointer to check if ES Parser has stalled.
|
@ -1,356 +0,0 @@
|
||||
From f2276f72a3b5581a3297d1c18c36d7a68f704606 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 11 Sep 2023 17:45:41 +0200
|
||||
Subject: [PATCH 18/41] FROMGIT(6.7): arm64: dts: meson: u200: add onboard
|
||||
devices
|
||||
|
||||
Add missing audio devices found on the u200 PCB. This includes
|
||||
* Lineout connected to the internal DAC
|
||||
* SPDIF input connected to a coaxial socket
|
||||
* TDM input decoders allowing output loopback
|
||||
* TDM A and B output encoders and interfaces
|
||||
|
||||
TDM A and B link format is set by the related external codec.
|
||||
Internal audio DAC can hook to any TDM output.
|
||||
|
||||
This change does not include support necessary the optional the speaker and
|
||||
PDM Mic headers
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20230911154541.471484-6-jbrunet@baylibre.com
|
||||
[narmstrong: fixed sound-dai-cells and removed default okay status]
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-g12a-u200.dts | 229 +++++++++++++++++-
|
||||
1 file changed, 217 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index da66e2e1dffb..7310e192efe7 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -9,6 +9,7 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
+#include <dt-bindings/sound/meson-g12a-toacodec.h>
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,u200", "amlogic,g12a";
|
||||
@@ -19,10 +20,23 @@ aliases {
|
||||
ethernet0 = ðmac;
|
||||
};
|
||||
|
||||
- spdif_dit: audio-codec-1 {
|
||||
+ dioo2133: audio-amplifier-0 {
|
||||
+ compatible = "simple-audio-amplifier";
|
||||
+ enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
|
||||
+ VCC-supply = <&vcc_5v>;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ sound-name-prefix = "10U2";
|
||||
+ };
|
||||
+
|
||||
+ spdif_dir: audio-codec-0 {
|
||||
+ compatible = "linux,spdif-dir";
|
||||
#sound-dai-cells = <0>;
|
||||
+ sound-name-prefix = "DIR";
|
||||
+ };
|
||||
+
|
||||
+ spdif_dit: audio-codec-1 {
|
||||
compatible = "linux,spdif-dit";
|
||||
- status = "okay";
|
||||
+ #sound-dai-cells = <0>;
|
||||
sound-name-prefix = "DIT";
|
||||
};
|
||||
|
||||
@@ -159,17 +173,71 @@ vddcpu: regulator-vddcpu {
|
||||
sound {
|
||||
compatible = "amlogic,axg-sound-card";
|
||||
model = "U200";
|
||||
- audio-aux-devs = <&tdmout_c>;
|
||||
- audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
|
||||
+ audio-widgets = "Line", "Lineout";
|
||||
+ audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
|
||||
+ <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
|
||||
+ <&tdmin_lb>, <&dioo2133>;
|
||||
+ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
|
||||
+ "TDMOUT_A IN 1", "FRDDR_B OUT 0",
|
||||
+ "TDMOUT_A IN 2", "FRDDR_C OUT 0",
|
||||
+ "TDM_A Playback", "TDMOUT_A OUT",
|
||||
+ "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "TDMOUT_C IN 0", "FRDDR_A OUT 2",
|
||||
"TDMOUT_C IN 1", "FRDDR_B OUT 2",
|
||||
"TDMOUT_C IN 2", "FRDDR_C OUT 2",
|
||||
- "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "TDM_C Playback", "TDMOUT_C OUT",
|
||||
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
"SPDIFOUT IN 2", "FRDDR_C OUT 3",
|
||||
"SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
|
||||
"SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
|
||||
- "SPDIFOUT_B IN 2", "FRDDR_C OUT 4";
|
||||
+ "SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
|
||||
+ "TDMIN_A IN 0", "TDM_A Capture",
|
||||
+ "TDMIN_A IN 1", "TDM_B Capture",
|
||||
+ "TDMIN_A IN 2", "TDM_C Capture",
|
||||
+ "TDMIN_A IN 3", "TDM_A Loopback",
|
||||
+ "TDMIN_A IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_A IN 5", "TDM_C Loopback",
|
||||
+ "TDMIN_B IN 0", "TDM_A Capture",
|
||||
+ "TDMIN_B IN 1", "TDM_B Capture",
|
||||
+ "TDMIN_B IN 2", "TDM_C Capture",
|
||||
+ "TDMIN_B IN 3", "TDM_A Loopback",
|
||||
+ "TDMIN_B IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_B IN 5", "TDM_C Loopback",
|
||||
+ "TDMIN_C IN 0", "TDM_A Capture",
|
||||
+ "TDMIN_C IN 1", "TDM_B Capture",
|
||||
+ "TDMIN_C IN 2", "TDM_C Capture",
|
||||
+ "TDMIN_C IN 3", "TDM_A Loopback",
|
||||
+ "TDMIN_C IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_C IN 5", "TDM_C Loopback",
|
||||
+ "TDMIN_LB IN 3", "TDM_A Capture",
|
||||
+ "TDMIN_LB IN 4", "TDM_B Capture",
|
||||
+ "TDMIN_LB IN 5", "TDM_C Capture",
|
||||
+ "TDMIN_LB IN 0", "TDM_A Loopback",
|
||||
+ "TDMIN_LB IN 1", "TDM_B Loopback",
|
||||
+ "TDMIN_LB IN 2", "TDM_C Loopback",
|
||||
+ "TODDR_A IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_B IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_C IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_A IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_B IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_C IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_A IN 2", "TDMIN_C OUT",
|
||||
+ "TODDR_B IN 2", "TDMIN_C OUT",
|
||||
+ "TODDR_C IN 2", "TDMIN_C OUT",
|
||||
+ "TODDR_A IN 3", "SPDIFIN Capture",
|
||||
+ "TODDR_B IN 3", "SPDIFIN Capture",
|
||||
+ "TODDR_C IN 3", "SPDIFIN Capture",
|
||||
+ "TODDR_A IN 6", "TDMIN_LB OUT",
|
||||
+ "TODDR_B IN 6", "TDMIN_LB OUT",
|
||||
+ "TODDR_C IN 6", "TDMIN_LB OUT",
|
||||
+ "10U2 INL", "ACODEC LOLP",
|
||||
+ "10U2 INR", "ACODEC LORP",
|
||||
+ "Lineout", "10U2 OUTL",
|
||||
+ "Lineout", "10U2 OUTR";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
@@ -191,8 +259,52 @@ dai-link-2 {
|
||||
sound-dai = <&frddr_c>;
|
||||
};
|
||||
|
||||
- /* 8ch hdmi interface */
|
||||
dai-link-3 {
|
||||
+ sound-dai = <&toddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&toddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-5 {
|
||||
+ sound-dai = <&toddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* Connected to the WIFI/BT chip */
|
||||
+ dai-link-6 {
|
||||
+ sound-dai = <&tdmif_a>;
|
||||
+ dai-format = "dsp_a";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&toacodec TOACODEC_IN_A>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* Connected to the onboard AD82584F DAC */
|
||||
+ dai-link-7 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&toacodec TOACODEC_IN_B>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch HDMI interface */
|
||||
+ dai-link-8 {
|
||||
sound-dai = <&tdmif_c>;
|
||||
dai-format = "i2s";
|
||||
dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
@@ -201,13 +313,17 @@ dai-link-3 {
|
||||
dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
mclk-fs = <256>;
|
||||
|
||||
- codec {
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&toacodec TOACODEC_IN_C>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
|
||||
};
|
||||
};
|
||||
|
||||
- /* spdif hdmi or toslink interface */
|
||||
- dai-link-4 {
|
||||
+ /* spdif hdmi and coax output */
|
||||
+ dai-link-9 {
|
||||
sound-dai = <&spdifout>;
|
||||
|
||||
codec-0 {
|
||||
@@ -220,7 +336,7 @@ codec-1 {
|
||||
};
|
||||
|
||||
/* spdif hdmi interface */
|
||||
- dai-link-5 {
|
||||
+ dai-link-10 {
|
||||
sound-dai = <&spdifout_b>;
|
||||
|
||||
codec {
|
||||
@@ -229,16 +345,38 @@ codec {
|
||||
};
|
||||
|
||||
/* hdmi glue */
|
||||
- dai-link-6 {
|
||||
+ dai-link-11 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
|
||||
codec {
|
||||
sound-dai = <&hdmi_tx>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ /* internal codec glue */
|
||||
+ dai-link-12 {
|
||||
+ sound-dai = <&toacodec TOACODEC_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&acodec>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif coax input */
|
||||
+ dai-link-13 {
|
||||
+ sound-dai = <&spdifin>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&spdif_dir>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
};
|
||||
|
||||
+&acodec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&arb {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -402,6 +540,12 @@ &sd_emmc_c {
|
||||
vqmmc-supply = <&flash_1v8>;
|
||||
};
|
||||
|
||||
+&spdifin {
|
||||
+ pinctrl-0 = <&spdif_in_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&spdifout {
|
||||
pinctrl-0 = <&spdif_ao_out_pins>;
|
||||
pinctrl-names = "default";
|
||||
@@ -412,14 +556,75 @@ &spdifout_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&tdmif_a {
|
||||
+ pinctrl-0 = <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>, <&tdm_a_dout0_pins> ;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ pinctrl-0 = <&mclk0_a_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>,
|
||||
+ <&tdm_b_dout0_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+
|
||||
+ assigned-clocks = <&clkc_audio AUD_CLKID_TDM_MCLK_PAD0>,
|
||||
+ <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>,
|
||||
+ <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>;
|
||||
+ assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
|
||||
+ <&clkc_audio AUD_CLKID_MST_B_SCLK>,
|
||||
+ <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
|
||||
+ assigned-clock-rates = <0>, <0>, <0>;
|
||||
+};
|
||||
+
|
||||
&tdmif_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&tdmin_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_lb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&tdmout_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&toacodec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&tohdmitx {
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 7f5ef3d93ad43e02e8dbf6303664b1d793918a6d Mon Sep 17 00:00:00 2001
|
||||
From 1fe10d8edcc624e13ed80cbc13737d29358bed9d Mon Sep 17 00:00:00 2001
|
||||
From: Benjamin Roszak <benjamin545@gmail.com>
|
||||
Date: Mon, 23 Jan 2023 10:56:46 +0000
|
||||
Subject: [PATCH 29/41] FROMLIST(v2): media: meson: vdec: implement 10bit
|
||||
Subject: [PATCH 18/64] FROMLIST(v2): media: meson: vdec: implement 10bit
|
||||
bitstream handling
|
||||
|
||||
In order to support 10bit bitstream decoding, buffers and MMU
|
@ -1,187 +0,0 @@
|
||||
From 45299195b2d6efb09decf03fb29540085584d627 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 25 Sep 2023 15:53:26 +0200
|
||||
Subject: [PATCH 19/41] FROMGIT(6.7): arm64: dts: meson: g12: name spdifout
|
||||
consistently
|
||||
|
||||
g12 and sm1 are fairly similar when it comes to audio.
|
||||
Both have 2 spdif outputs. While the 2nd output is named "spdifout_b" for
|
||||
both, the 1st one is named 'spdifout' for g12 and 'spdifout_a' for sm1.
|
||||
|
||||
Use 'spdifout_a' for both instead.
|
||||
|
||||
This change does not fix any particular problem. The intent is just to make
|
||||
it easier to have a common card definitions for platform designs using both
|
||||
SoC families, when spdifout is used.
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 4 ++--
|
||||
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 10 +++++-----
|
||||
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 10 +++++-----
|
||||
arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts | 10 +++++-----
|
||||
arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts | 10 +++++-----
|
||||
5 files changed, 22 insertions(+), 22 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
|
||||
index 6a1f4dcf6488..9b9d0d2863aa 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
|
||||
@@ -272,12 +272,12 @@ spdifin: audio-controller@400 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
- spdifout: audio-controller@480 {
|
||||
+ spdifout_a: audio-controller@480 {
|
||||
compatible = "amlogic,g12a-spdifout",
|
||||
"amlogic,axg-spdifout";
|
||||
reg = <0x0 0x480 0x0 0x50>;
|
||||
#sound-dai-cells = <0>;
|
||||
- sound-name-prefix = "SPDIFOUT";
|
||||
+ sound-name-prefix = "SPDIFOUT_A";
|
||||
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
|
||||
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
|
||||
clock-names = "pclk", "mclk";
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
index 7310e192efe7..8355ddd7e9ae 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
@@ -189,9 +189,9 @@ sound {
|
||||
"TDMOUT_C IN 1", "FRDDR_B OUT 2",
|
||||
"TDMOUT_C IN 2", "FRDDR_C OUT 2",
|
||||
"TDM_C Playback", "TDMOUT_C OUT",
|
||||
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
- "SPDIFOUT IN 2", "FRDDR_C OUT 3",
|
||||
+ "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
|
||||
"SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
|
||||
"SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
|
||||
"SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
|
||||
@@ -324,7 +324,7 @@ codec-1 {
|
||||
|
||||
/* spdif hdmi and coax output */
|
||||
dai-link-9 {
|
||||
- sound-dai = <&spdifout>;
|
||||
+ sound-dai = <&spdifout_a>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&spdif_dit>;
|
||||
@@ -546,7 +546,7 @@ &spdifin {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
-&spdifout {
|
||||
+&spdifout_a {
|
||||
pinctrl-0 = <&spdif_ao_out_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
|
||||
index 7ca904f5acbb..4969a76460fa 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
|
||||
@@ -155,9 +155,9 @@ sound {
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
- "SPDIFOUT IN 2", "FRDDR_C OUT 3";
|
||||
+ "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
@@ -196,7 +196,7 @@ codec {
|
||||
|
||||
/* spdif hdmi or toslink interface */
|
||||
dai-link-4 {
|
||||
- sound-dai = <&spdifout>;
|
||||
+ sound-dai = <&spdifout_a>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&spdif_dit>;
|
||||
@@ -456,7 +456,7 @@ &sd_emmc_c {
|
||||
vqmmc-supply = <&flash_1v8>;
|
||||
};
|
||||
|
||||
-&spdifout {
|
||||
+&spdifout_a {
|
||||
pinctrl-0 = <&spdif_out_h_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
|
||||
index 3e826095e792..8fc2e143cb54 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
|
||||
@@ -34,9 +34,9 @@ sound {
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
- "SPDIFOUT IN 2", "FRDDR_C OUT 3";
|
||||
+ "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
@@ -75,7 +75,7 @@ codec {
|
||||
|
||||
/* spdif hdmi or toslink interface */
|
||||
dai-link-4 {
|
||||
- sound-dai = <&spdifout>;
|
||||
+ sound-dai = <&spdifout_a>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&spdif_dit>;
|
||||
@@ -139,7 +139,7 @@ rtc: rtc@51 {
|
||||
};
|
||||
};
|
||||
|
||||
-&spdifout {
|
||||
+&spdifout_a {
|
||||
pinctrl-0 = <&spdif_out_h_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
|
||||
index 098a3af6d381..ce548b373296 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
|
||||
@@ -29,9 +29,9 @@ sound {
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
- "SPDIFOUT IN 2", "FRDDR_C OUT 3";
|
||||
+ "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
@@ -70,7 +70,7 @@ codec {
|
||||
|
||||
/* spdif hdmi or toslink interface */
|
||||
dai-link-4 {
|
||||
- sound-dai = <&spdifout>;
|
||||
+ sound-dai = <&spdifout_a>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&spdif_dit>;
|
||||
@@ -125,7 +125,7 @@ &ir {
|
||||
linux,rc-map-name = "rc-khadas";
|
||||
};
|
||||
|
||||
-&spdifout {
|
||||
+&spdifout_a {
|
||||
pinctrl-0 = <&spdif_out_h_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 6bd258290dd548acfe4834f7ebc7de4831ba074e Mon Sep 17 00:00:00 2001
|
||||
From 204f24973926f6b7cc3bfb27d31215d2d730d12f Mon Sep 17 00:00:00 2001
|
||||
From: Maxime Jourdan <mjourdan@baylibre.com>
|
||||
Date: Mon, 23 Jan 2023 11:07:04 +0000
|
||||
Subject: [PATCH 30/41] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
|
||||
Subject: [PATCH 19/64] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
|
||||
|
||||
Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
|
||||
the common "HEVC" decoder driver.
|
@ -1,60 +0,0 @@
|
||||
From 2def978be083a51a830916e6e9773bafb4336f33 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Thu, 7 Sep 2023 11:09:10 +0200
|
||||
Subject: [PATCH 20/41] FROMGIT(6.7): ASoC: meson: axg: extend TDM maximum
|
||||
sample rate to 384kHz
|
||||
|
||||
The TDM HW on the axg SoC families and derivatives actually supports
|
||||
384kHz sampling rate.
|
||||
|
||||
Update the fifo and tdm interface constraints accordingly.
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
sound/soc/meson/axg-fifo.c | 2 +-
|
||||
sound/soc/meson/axg-fifo.h | 2 +-
|
||||
sound/soc/meson/axg-tdm.h | 2 +-
|
||||
3 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
|
||||
index bccfb770b339..2e3d0108179b 100644
|
||||
--- a/sound/soc/meson/axg-fifo.c
|
||||
+++ b/sound/soc/meson/axg-fifo.c
|
||||
@@ -31,7 +31,7 @@ static struct snd_pcm_hardware axg_fifo_hw = {
|
||||
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
|
||||
.formats = AXG_FIFO_FORMATS,
|
||||
.rate_min = 5512,
|
||||
- .rate_max = 192000,
|
||||
+ .rate_max = 384000,
|
||||
.channels_min = 1,
|
||||
.channels_max = AXG_FIFO_CH_MAX,
|
||||
.period_bytes_min = AXG_FIFO_BURST,
|
||||
diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h
|
||||
index b63acd723c87..df528e8cb7c9 100644
|
||||
--- a/sound/soc/meson/axg-fifo.h
|
||||
+++ b/sound/soc/meson/axg-fifo.h
|
||||
@@ -22,7 +22,7 @@ struct snd_soc_pcm_runtime;
|
||||
|
||||
#define AXG_FIFO_CH_MAX 128
|
||||
#define AXG_FIFO_RATES (SNDRV_PCM_RATE_5512 | \
|
||||
- SNDRV_PCM_RATE_8000_192000)
|
||||
+ SNDRV_PCM_RATE_8000_384000)
|
||||
#define AXG_FIFO_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
|
||||
SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S20_LE | \
|
||||
diff --git a/sound/soc/meson/axg-tdm.h b/sound/soc/meson/axg-tdm.h
|
||||
index 5774ce0916d4..42f7470b9a7f 100644
|
||||
--- a/sound/soc/meson/axg-tdm.h
|
||||
+++ b/sound/soc/meson/axg-tdm.h
|
||||
@@ -16,7 +16,7 @@
|
||||
#define AXG_TDM_NUM_LANES 4
|
||||
#define AXG_TDM_CHANNEL_MAX 128
|
||||
#define AXG_TDM_RATES (SNDRV_PCM_RATE_5512 | \
|
||||
- SNDRV_PCM_RATE_8000_192000)
|
||||
+ SNDRV_PCM_RATE_8000_384000)
|
||||
#define AXG_TDM_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
|
||||
SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S20_LE | \
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,118 @@
|
||||
From 02e0d943c1581ca1a1462c73b8f2340e7dfe7d7e Mon Sep 17 00:00:00 2001
|
||||
From: Anand Moon <linux.amoon@gmail.com>
|
||||
Date: Wed, 22 Nov 2023 23:53:46 +0530
|
||||
Subject: [PATCH 20/64] FROMLIST(v4): dt-bindings: usb: Add the binding example
|
||||
for the Genesys Logic GL3523 hub
|
||||
|
||||
Add the binding example for the USB3.1 Genesys Logic GL3523
|
||||
integrates with USB 3.1 Gen 1 Super Speed and USB 2.0 High-Speed
|
||||
hub.
|
||||
|
||||
Onboard USB hub supports USB 3.x and USB 2.0 peer controllers.
|
||||
which has a common reset pin and power supply.
|
||||
peer-hub phandle each peer controller with proper gpio reset
|
||||
and help each peer power on during initialization
|
||||
and power off during suspend.
|
||||
|
||||
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
|
||||
---
|
||||
.../bindings/usb/genesys,gl850g.yaml | 67 +++++++++++++++++--
|
||||
1 file changed, 63 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
|
||||
index ee08b9c3721f..bc3b3f4c8473 100644
|
||||
--- a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
|
||||
+++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
|
||||
@@ -9,9 +9,6 @@ title: Genesys Logic USB hub controller
|
||||
maintainers:
|
||||
- Icenowy Zheng <uwu@icenowy.me>
|
||||
|
||||
-allOf:
|
||||
- - $ref: usb-device.yaml#
|
||||
-
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
@@ -27,12 +24,48 @@ properties:
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
- the regulator that provides 3.3V core power to the hub.
|
||||
+ phandle to the regulator that provides power to the hub.
|
||||
+
|
||||
+ peer-hub:
|
||||
+ $ref: /schemas/types.yaml#/definitions/phandle
|
||||
+ description:
|
||||
+ onboard USB hub supports USB 3.x and USB 2.0 peer controllers.
|
||||
+ which has a common reset pin and power supply.
|
||||
+ peer-hub phandle each peer controller with proper gpio reset
|
||||
+ and help each peer power on during initialization
|
||||
+ and power off during suspend.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
+allOf:
|
||||
+ - $ref: usb-device.yaml#
|
||||
+ - if:
|
||||
+ properties:
|
||||
+ compatible:
|
||||
+ contains:
|
||||
+ enum:
|
||||
+ - usb5e3,608
|
||||
+ then:
|
||||
+ properties:
|
||||
+ peer-hub: false
|
||||
+ vdd-supply: false
|
||||
+ reset-gpios: true
|
||||
+
|
||||
+ - if:
|
||||
+ properties:
|
||||
+ compatible:
|
||||
+ contains:
|
||||
+ enum:
|
||||
+ - usb5e3,610
|
||||
+ - usb5e3,620
|
||||
+ then:
|
||||
+ properties:
|
||||
+ peer-hub: true
|
||||
+ vdd-supply: true
|
||||
+ reset-gpios: true
|
||||
+
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
@@ -49,3 +82,29 @@ examples:
|
||||
reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ - |
|
||||
+ #include <dt-bindings/gpio/gpio.h>
|
||||
+ usb {
|
||||
+ dr_mode = "host";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ /* 2.0 hub on port 1 */
|
||||
+ hub_2_0: hub@1 {
|
||||
+ compatible = "usb5e3,610";
|
||||
+ reg = <1>;
|
||||
+ peer-hub = <&hub_3_0>;
|
||||
+ reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
|
||||
+ vdd-supply = <&vcc_5v>;
|
||||
+ };
|
||||
+
|
||||
+ /* 3.1 hub on port 4 */
|
||||
+ hub_3_0: hub@2 {
|
||||
+ compatible = "usb5e3,620";
|
||||
+ reg = <2>;
|
||||
+ peer-hub = <&hub_2_0>;
|
||||
+ reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
|
||||
+ vdd-supply = <&vcc_5v>;
|
||||
+ };
|
||||
+ };
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From c73788f92a21b049f7ae84526cdd08cb2c602e7a Mon Sep 17 00:00:00 2001
|
||||
From 87bdbd2b503d662cdb4c4a1caa00460500fc0bcd Mon Sep 17 00:00:00 2001
|
||||
From: Anand Moon <linux.amoon@gmail.com>
|
||||
Date: Tue, 10 Oct 2023 08:54:43 +0530
|
||||
Subject: [PATCH 31/41] FROMLIST(v1): arm64: dts: amlogic: Used onboard usb hub
|
||||
Subject: [PATCH 21/64] FROMLIST(v4): arm64: dts: amlogic: Used onboard usb hub
|
||||
reset on odroid n2
|
||||
|
||||
On Odroid n2/n2+ previously use gpio-hog to reset the usb hub,
|
@ -1,7 +1,7 @@
|
||||
From 9143815458210fd7c4139b60ec68f43f9ee6f243 Mon Sep 17 00:00:00 2001
|
||||
From 2e3a661a580292de22a1d73b6e8987dde8a03bb2 Mon Sep 17 00:00:00 2001
|
||||
From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
|
||||
Date: Mon, 16 Oct 2023 10:02:03 +0200
|
||||
Subject: [PATCH 32/41] FROMLIST(v1): arm64: dts: VIM3: Set the rates of the
|
||||
Subject: [PATCH 22/64] FROMLIST(v1): arm64: dts: VIM3: Set the rates of the
|
||||
clocks for the NPU
|
||||
|
||||
Otherwise they are left at 24MHz and the NPU runs very slowly.
|
@ -1,7 +1,7 @@
|
||||
From e256ec3b18d14d1ff1d57bede8aa92e4b5d1d5cc Mon Sep 17 00:00:00 2001
|
||||
From f8bf2e3d64b44bcecc27302a98bffd2cfc800b59 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 30 Jan 2023 05:09:18 +0000
|
||||
Subject: [PATCH 35/41] FROMLIST(v1): arm64: dts: meson: radxa-zero2: add
|
||||
Subject: [PATCH 23/64] FROMLIST(v1): arm64: dts: meson: radxa-zero2: add
|
||||
pwm-fan support
|
||||
|
||||
The A311D on Zero2 needs active cooling and the board includes a header to
|
@ -0,0 +1,30 @@
|
||||
From 6a5eaac07c780df7934d9fd776ca87339e326283 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:02 +0100
|
||||
Subject: [PATCH 24/64] FROMLIST(v8): dt-bindings: clk: g12a-clkc: add CTS_ENCL
|
||||
clock ids
|
||||
|
||||
Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks
|
||||
on G12A compatible SoCs.
|
||||
|
||||
Acked-by: Conor Dooley <conor.dooley@microchip.com>
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
include/dt-bindings/clock/g12a-clkc.h | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h
|
||||
index 387767f4e298..636d713f95ff 100644
|
||||
--- a/include/dt-bindings/clock/g12a-clkc.h
|
||||
+++ b/include/dt-bindings/clock/g12a-clkc.h
|
||||
@@ -279,5 +279,7 @@
|
||||
#define CLKID_MIPI_DSI_PXCLK_DIV 268
|
||||
#define CLKID_MIPI_DSI_PXCLK_SEL 269
|
||||
#define CLKID_MIPI_DSI_PXCLK 270
|
||||
+#define CLKID_CTS_ENCL 271
|
||||
+#define CLKID_CTS_ENCL_SEL 272
|
||||
|
||||
#endif /* __G12A_CLKC_H */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,67 @@
|
||||
From 54d0c47551759eccf5d75a107c168f69d9e4bad7 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:03 +0100
|
||||
Subject: [PATCH 25/64] FROMLIST(v8): dt-bindings: soc:
|
||||
amlogic,meson-gx-hhi-sysctrl: add example covering meson-axg-hhi-sysctrl
|
||||
|
||||
Add a thirst example covering the meson-axg-hhi-sysctrl variant and more
|
||||
importantly the phy subnode.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Acked-by: Conor Dooley <conor.dooley@microchip.com>
|
||||
---
|
||||
.../amlogic/amlogic,meson-gx-hhi-sysctrl.yaml | 41 +++++++++++++++++++
|
||||
1 file changed, 41 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
|
||||
index 16977e4e4357..2edf4ccea845 100644
|
||||
--- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
|
||||
+++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
|
||||
@@ -158,3 +158,44 @@ examples:
|
||||
};
|
||||
};
|
||||
};
|
||||
+
|
||||
+ bus@ff63c000 {
|
||||
+ compatible = "simple-bus";
|
||||
+ reg = <0xff63c000 0x1c00>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ ranges = <0x0 0xff63c000 0x1c00>;
|
||||
+
|
||||
+ system-controller@0 {
|
||||
+ compatible = "amlogic,meson-axg-hhi-sysctrl", "simple-mfd", "syscon";
|
||||
+ reg = <0 0x400>;
|
||||
+
|
||||
+ clock-controller {
|
||||
+ compatible = "amlogic,axg-clkc";
|
||||
+ #clock-cells = <1>;
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "xtal";
|
||||
+ };
|
||||
+
|
||||
+ power-controller {
|
||||
+ compatible = "amlogic,meson-axg-pwrc";
|
||||
+ #power-domain-cells = <1>;
|
||||
+ amlogic,ao-sysctrl = <&sysctrl_AO>;
|
||||
+
|
||||
+ resets = <&reset_viu>,
|
||||
+ <&reset_venc>,
|
||||
+ <&reset_vcbus>,
|
||||
+ <&reset_vencl>,
|
||||
+ <&reset_vid_lock>;
|
||||
+ reset-names = "viu", "venc", "vcbus", "vencl", "vid_lock";
|
||||
+ clocks = <&clk_vpu>, <&clk_vapb>;
|
||||
+ clock-names = "vpu", "vapb";
|
||||
+ };
|
||||
+
|
||||
+ phy {
|
||||
+ compatible = "amlogic,axg-mipi-pcie-analog-phy";
|
||||
+ #phy-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,51 @@
|
||||
From afe3f7c46d20a132f0d7b31df9cb0956232ae49d Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:04 +0100
|
||||
Subject: [PATCH 26/64] FROMLIST(v8): dt-bindings: phy:
|
||||
amlogic,meson-axg-mipi-pcie-analog: drop text about parent syscon and drop
|
||||
example
|
||||
|
||||
Since this bindings is referred from amlogic,meson-gx-hhi-sysctrl.yaml, drop the now
|
||||
useless description about the parent node and also drop the unnecessary example.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Acked-by: Conor Dooley <conor.dooley@microchip.com>
|
||||
---
|
||||
.../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 -----------------
|
||||
1 file changed, 17 deletions(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
|
||||
index 009a39808318..70def36e5688 100644
|
||||
--- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
|
||||
+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
|
||||
@@ -9,16 +9,6 @@ title: Amlogic AXG shared MIPI/PCIE analog PHY
|
||||
maintainers:
|
||||
- Remi Pommarel <repk@triplefau.lt>
|
||||
|
||||
-description: |+
|
||||
- The Everything-Else Power Domains node should be the child of a syscon
|
||||
- node with the required property:
|
||||
-
|
||||
- - compatible: Should be the following:
|
||||
- "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
|
||||
-
|
||||
- Refer to the bindings described in
|
||||
- Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
-
|
||||
properties:
|
||||
compatible:
|
||||
const: amlogic,axg-mipi-pcie-analog-phy
|
||||
@@ -31,10 +21,3 @@ required:
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
-
|
||||
-examples:
|
||||
- - |
|
||||
- mpphy: phy {
|
||||
- compatible = "amlogic,axg-mipi-pcie-analog-phy";
|
||||
- #phy-cells = <0>;
|
||||
- };
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,45 @@
|
||||
From d9a23fe8b1b3d326641f818ac9f8c6a470eb05b7 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:05 +0100
|
||||
Subject: [PATCH 27/64] FROMLIST(v8): dt-bindings: phy:
|
||||
amlogic,g12a-mipi-dphy-analog: drop unneeded reg property and example
|
||||
|
||||
Now this bindings is referred from amlogic,meson-gx-hhi-sysctrl.yaml and is
|
||||
documented as a subnode of a simple-mfd, drop the invalid reg property.
|
||||
|
||||
Also drop the unnecessary example, the top level bindings example should
|
||||
be enough.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
.../bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml | 12 ------------
|
||||
1 file changed, 12 deletions(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml
|
||||
index c8c83acfb871..81c2654b7e57 100644
|
||||
--- a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml
|
||||
+++ b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml
|
||||
@@ -16,20 +16,8 @@ properties:
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
- reg:
|
||||
- maxItems: 1
|
||||
-
|
||||
required:
|
||||
- compatible
|
||||
- - reg
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
-
|
||||
-examples:
|
||||
- - |
|
||||
- phy@0 {
|
||||
- compatible = "amlogic,g12a-mipi-dphy-analog";
|
||||
- reg = <0x0 0xc>;
|
||||
- #phy-cells = <0>;
|
||||
- };
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,30 @@
|
||||
From fca51065b3fe383fbddb87ac1721bddcd95efc3b Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:06 +0100
|
||||
Subject: [PATCH 28/64] FROMLIST(v8): dt-bindings: arm: amlogic: Document the
|
||||
MNT Reform 2 CM4 adapter with a BPI-CM4 Module
|
||||
|
||||
The MNT Reform 2 CM4 adapter can be populated with any Raspberry Pi CM4
|
||||
compatible module such as a BPI-CM4 Module, document that.
|
||||
|
||||
Acked-by: Conor Dooley <conor.dooley@microchip.com>
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
index caab7ceeda45..2154a4614fda 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
@@ -164,6 +164,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- bananapi,bpi-cm4io
|
||||
+ - mntre,reform2-cm4
|
||||
- const: bananapi,bpi-cm4
|
||||
- const: amlogic,a311d
|
||||
- const: amlogic,g12b
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,120 @@
|
||||
From 2679f6f082479807380db1bd9977856ac8cc8da0 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:07 +0100
|
||||
Subject: [PATCH 29/64] FROMLIST(v8): clk: meson: g12a: add CTS_ENCL &
|
||||
CTS_ENCL_SEL clocks
|
||||
|
||||
Add new CTS_ENCL & CTS_ENCL_SEL clocks for the G12A compatible
|
||||
SoCs, they are used to feed the VPU LCD Pixel encoder used for
|
||||
DSI display purposes.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 40 ++++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 40 insertions(+)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index f373a8d48b1d..cadd824336ad 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -3549,6 +3549,22 @@ static struct clk_regmap g12a_cts_encp_sel = {
|
||||
},
|
||||
};
|
||||
|
||||
+static struct clk_regmap g12a_cts_encl_sel = {
|
||||
+ .data = &(struct clk_regmap_mux_data){
|
||||
+ .offset = HHI_VIID_CLK_DIV,
|
||||
+ .mask = 0xf,
|
||||
+ .shift = 12,
|
||||
+ .table = mux_table_cts_sel,
|
||||
+ },
|
||||
+ .hw.init = &(struct clk_init_data){
|
||||
+ .name = "cts_encl_sel",
|
||||
+ .ops = &clk_regmap_mux_ops,
|
||||
+ .parent_hws = g12a_cts_parent_hws,
|
||||
+ .num_parents = ARRAY_SIZE(g12a_cts_parent_hws),
|
||||
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
static struct clk_regmap g12a_cts_vdac_sel = {
|
||||
.data = &(struct clk_regmap_mux_data){
|
||||
.offset = HHI_VIID_CLK_DIV,
|
||||
@@ -3628,6 +3644,22 @@ static struct clk_regmap g12a_cts_encp = {
|
||||
},
|
||||
};
|
||||
|
||||
+static struct clk_regmap g12a_cts_encl = {
|
||||
+ .data = &(struct clk_regmap_gate_data){
|
||||
+ .offset = HHI_VID_CLK_CNTL2,
|
||||
+ .bit_idx = 3,
|
||||
+ },
|
||||
+ .hw.init = &(struct clk_init_data) {
|
||||
+ .name = "cts_encl",
|
||||
+ .ops = &clk_regmap_gate_ops,
|
||||
+ .parent_hws = (const struct clk_hw *[]) {
|
||||
+ &g12a_cts_encl_sel.hw
|
||||
+ },
|
||||
+ .num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
static struct clk_regmap g12a_cts_vdac = {
|
||||
.data = &(struct clk_regmap_gate_data){
|
||||
.offset = HHI_VID_CLK_CNTL2,
|
||||
@@ -4407,10 +4439,12 @@ static struct clk_hw *g12a_hw_clks[] = {
|
||||
[CLKID_VCLK2_DIV12] = &g12a_vclk2_div12.hw,
|
||||
[CLKID_CTS_ENCI_SEL] = &g12a_cts_enci_sel.hw,
|
||||
[CLKID_CTS_ENCP_SEL] = &g12a_cts_encp_sel.hw,
|
||||
+ [CLKID_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
|
||||
[CLKID_CTS_VDAC_SEL] = &g12a_cts_vdac_sel.hw,
|
||||
[CLKID_HDMI_TX_SEL] = &g12a_hdmi_tx_sel.hw,
|
||||
[CLKID_CTS_ENCI] = &g12a_cts_enci.hw,
|
||||
[CLKID_CTS_ENCP] = &g12a_cts_encp.hw,
|
||||
+ [CLKID_CTS_ENCL] = &g12a_cts_encl.hw,
|
||||
[CLKID_CTS_VDAC] = &g12a_cts_vdac.hw,
|
||||
[CLKID_HDMI_TX] = &g12a_hdmi_tx.hw,
|
||||
[CLKID_HDMI_SEL] = &g12a_hdmi_sel.hw,
|
||||
@@ -4632,10 +4666,12 @@ static struct clk_hw *g12b_hw_clks[] = {
|
||||
[CLKID_VCLK2_DIV12] = &g12a_vclk2_div12.hw,
|
||||
[CLKID_CTS_ENCI_SEL] = &g12a_cts_enci_sel.hw,
|
||||
[CLKID_CTS_ENCP_SEL] = &g12a_cts_encp_sel.hw,
|
||||
+ [CLKID_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
|
||||
[CLKID_CTS_VDAC_SEL] = &g12a_cts_vdac_sel.hw,
|
||||
[CLKID_HDMI_TX_SEL] = &g12a_hdmi_tx_sel.hw,
|
||||
[CLKID_CTS_ENCI] = &g12a_cts_enci.hw,
|
||||
[CLKID_CTS_ENCP] = &g12a_cts_encp.hw,
|
||||
+ [CLKID_CTS_ENCL] = &g12a_cts_encl.hw,
|
||||
[CLKID_CTS_VDAC] = &g12a_cts_vdac.hw,
|
||||
[CLKID_HDMI_TX] = &g12a_hdmi_tx.hw,
|
||||
[CLKID_HDMI_SEL] = &g12a_hdmi_sel.hw,
|
||||
@@ -4892,10 +4928,12 @@ static struct clk_hw *sm1_hw_clks[] = {
|
||||
[CLKID_VCLK2_DIV12] = &g12a_vclk2_div12.hw,
|
||||
[CLKID_CTS_ENCI_SEL] = &g12a_cts_enci_sel.hw,
|
||||
[CLKID_CTS_ENCP_SEL] = &g12a_cts_encp_sel.hw,
|
||||
+ [CLKID_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
|
||||
[CLKID_CTS_VDAC_SEL] = &g12a_cts_vdac_sel.hw,
|
||||
[CLKID_HDMI_TX_SEL] = &g12a_hdmi_tx_sel.hw,
|
||||
[CLKID_CTS_ENCI] = &g12a_cts_enci.hw,
|
||||
[CLKID_CTS_ENCP] = &g12a_cts_encp.hw,
|
||||
+ [CLKID_CTS_ENCL] = &g12a_cts_encl.hw,
|
||||
[CLKID_CTS_VDAC] = &g12a_cts_vdac.hw,
|
||||
[CLKID_HDMI_TX] = &g12a_hdmi_tx.hw,
|
||||
[CLKID_HDMI_SEL] = &g12a_hdmi_sel.hw,
|
||||
@@ -5123,10 +5161,12 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
|
||||
&g12a_vclk2_div12_en,
|
||||
&g12a_cts_enci_sel,
|
||||
&g12a_cts_encp_sel,
|
||||
+ &g12a_cts_encl_sel,
|
||||
&g12a_cts_vdac_sel,
|
||||
&g12a_hdmi_tx_sel,
|
||||
&g12a_cts_enci,
|
||||
&g12a_cts_encp,
|
||||
+ &g12a_cts_encl,
|
||||
&g12a_cts_vdac,
|
||||
&g12a_hdmi_tx,
|
||||
&g12a_hdmi_sel,
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,271 @@
|
||||
From 66f1e78fbe2a3d6726e90986a8ecc09098d3d3a6 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:08 +0100
|
||||
Subject: [PATCH 30/64] FROMLIST(v8): clk: meson: add vclk driver
|
||||
|
||||
The VCLK and VCLK_DIV clocks have supplementary bits.
|
||||
|
||||
The VCLK has a "SOFT RESET" bit to toggle after the whole
|
||||
VCLK sub-tree rate has been set, this is implemented in
|
||||
the gate enable callback.
|
||||
|
||||
The VCLK_DIV clocks as enable and reset bits used to disable
|
||||
and reset the divider, associated with CLK_SET_RATE_GATE it ensures
|
||||
the rate is set while the divider is disabled and in reset mode.
|
||||
|
||||
The VCLK_DIV enable bit isn't implemented as a gate since it's part
|
||||
of the divider logic and vendor does this exact sequence to ensure
|
||||
the divider is correctly set.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/Kconfig | 5 ++
|
||||
drivers/clk/meson/Makefile | 1 +
|
||||
drivers/clk/meson/vclk.c | 141 +++++++++++++++++++++++++++++++++++++
|
||||
drivers/clk/meson/vclk.h | 51 ++++++++++++++
|
||||
4 files changed, 198 insertions(+)
|
||||
create mode 100644 drivers/clk/meson/vclk.c
|
||||
create mode 100644 drivers/clk/meson/vclk.h
|
||||
|
||||
diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
|
||||
index 29ffd14d267b..59a40a49f8e1 100644
|
||||
--- a/drivers/clk/meson/Kconfig
|
||||
+++ b/drivers/clk/meson/Kconfig
|
||||
@@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV
|
||||
tristate
|
||||
select COMMON_CLK_MESON_REGMAP
|
||||
|
||||
+config COMMON_CLK_MESON_VCLK
|
||||
+ tristate
|
||||
+ select COMMON_CLK_MESON_REGMAP
|
||||
+
|
||||
config COMMON_CLK_MESON_CLKC_UTILS
|
||||
tristate
|
||||
|
||||
@@ -140,6 +144,7 @@ config COMMON_CLK_G12A
|
||||
select COMMON_CLK_MESON_EE_CLKC
|
||||
select COMMON_CLK_MESON_CPU_DYNDIV
|
||||
select COMMON_CLK_MESON_VID_PLL_DIV
|
||||
+ select COMMON_CLK_MESON_VCLK
|
||||
select MFD_SYSCON
|
||||
help
|
||||
Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
|
||||
diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
|
||||
index 9ee4b954c896..9ba43fe7a07a 100644
|
||||
--- a/drivers/clk/meson/Makefile
|
||||
+++ b/drivers/clk/meson/Makefile
|
||||
@@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
|
||||
obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o
|
||||
obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o
|
||||
obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o
|
||||
+obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o
|
||||
|
||||
# Amlogic Clock controllers
|
||||
|
||||
diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c
|
||||
new file mode 100644
|
||||
index 000000000000..47f08a52b49f
|
||||
--- /dev/null
|
||||
+++ b/drivers/clk/meson/vclk.c
|
||||
@@ -0,0 +1,141 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/module.h>
|
||||
+#include "vclk.h"
|
||||
+
|
||||
+/* The VCLK gate has a supplementary reset bit to pulse after ungating */
|
||||
+
|
||||
+static inline struct clk_regmap_vclk_data *
|
||||
+clk_get_regmap_vclk_data(struct clk_regmap *clk)
|
||||
+{
|
||||
+ return (struct clk_regmap_vclk_data *)clk->data;
|
||||
+}
|
||||
+
|
||||
+static int clk_regmap_vclk_enable(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_data *vclk = clk_get_regmap_vclk_data(clk);
|
||||
+
|
||||
+ meson_parm_write(clk->map, &vclk->enable, 1);
|
||||
+
|
||||
+ /* Do a reset pulse */
|
||||
+ meson_parm_write(clk->map, &vclk->reset, 1);
|
||||
+ meson_parm_write(clk->map, &vclk->reset, 0);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void clk_regmap_vclk_disable(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_data *vclk = clk_get_regmap_vclk_data(clk);
|
||||
+
|
||||
+ meson_parm_write(clk->map, &vclk->enable, 0);
|
||||
+}
|
||||
+
|
||||
+static int clk_regmap_vclk_is_enabled(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_data *vclk = clk_get_regmap_vclk_data(clk);
|
||||
+
|
||||
+ return meson_parm_read(clk->map, &vclk->enable);
|
||||
+}
|
||||
+
|
||||
+const struct clk_ops clk_regmap_vclk_ops = {
|
||||
+ .enable = clk_regmap_vclk_enable,
|
||||
+ .disable = clk_regmap_vclk_disable,
|
||||
+ .is_enabled = clk_regmap_vclk_is_enabled,
|
||||
+};
|
||||
+EXPORT_SYMBOL_GPL(clk_regmap_vclk_ops);
|
||||
+
|
||||
+/* The VCLK Divider has supplementary reset & enable bits */
|
||||
+
|
||||
+static inline struct clk_regmap_vclk_div_data *
|
||||
+clk_get_regmap_vclk_div_data(struct clk_regmap *clk)
|
||||
+{
|
||||
+ return (struct clk_regmap_vclk_div_data *)clk->data;
|
||||
+}
|
||||
+
|
||||
+static unsigned long clk_regmap_vclk_div_recalc_rate(struct clk_hw *hw,
|
||||
+ unsigned long prate)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
|
||||
+
|
||||
+ return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, &vclk->div),
|
||||
+ vclk->table, vclk->flags, vclk->div.width);
|
||||
+}
|
||||
+
|
||||
+static int clk_regmap_vclk_div_determine_rate(struct clk_hw *hw,
|
||||
+ struct clk_rate_request *req)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
|
||||
+
|
||||
+ return divider_determine_rate(hw, req, vclk->table, vclk->div.width,
|
||||
+ vclk->flags);
|
||||
+}
|
||||
+
|
||||
+static int clk_regmap_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
+ unsigned long parent_rate)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = divider_get_val(rate, parent_rate, vclk->table, vclk->div.width,
|
||||
+ vclk->flags);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ meson_parm_write(clk->map, &vclk->div, ret);
|
||||
+
|
||||
+ return 0;
|
||||
+};
|
||||
+
|
||||
+static int clk_regmap_vclk_div_enable(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
|
||||
+
|
||||
+ /* Unreset the divider when ungating */
|
||||
+ meson_parm_write(clk->map, &vclk->reset, 0);
|
||||
+ meson_parm_write(clk->map, &vclk->enable, 1);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void clk_regmap_vclk_div_disable(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
|
||||
+
|
||||
+ /* Reset the divider when gating */
|
||||
+ meson_parm_write(clk->map, &vclk->enable, 0);
|
||||
+ meson_parm_write(clk->map, &vclk->reset, 1);
|
||||
+}
|
||||
+
|
||||
+static int clk_regmap_vclk_div_is_enabled(struct clk_hw *hw)
|
||||
+{
|
||||
+ struct clk_regmap *clk = to_clk_regmap(hw);
|
||||
+ struct clk_regmap_vclk_div_data *vclk = clk_get_regmap_vclk_div_data(clk);
|
||||
+
|
||||
+ return meson_parm_read(clk->map, &vclk->enable);
|
||||
+}
|
||||
+
|
||||
+const struct clk_ops clk_regmap_vclk_div_ops = {
|
||||
+ .recalc_rate = clk_regmap_vclk_div_recalc_rate,
|
||||
+ .determine_rate = clk_regmap_vclk_div_determine_rate,
|
||||
+ .set_rate = clk_regmap_vclk_div_set_rate,
|
||||
+ .enable = clk_regmap_vclk_div_enable,
|
||||
+ .disable = clk_regmap_vclk_div_disable,
|
||||
+ .is_enabled = clk_regmap_vclk_div_is_enabled,
|
||||
+};
|
||||
+EXPORT_SYMBOL_GPL(clk_regmap_vclk_div_ops);
|
||||
+
|
||||
+MODULE_DESCRIPTION("Amlogic vclk clock driver");
|
||||
+MODULE_AUTHOR("Neil Armstrong <neil.armstrong@linaro.org>");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
diff --git a/drivers/clk/meson/vclk.h b/drivers/clk/meson/vclk.h
|
||||
new file mode 100644
|
||||
index 000000000000..4f25d7ad2717
|
||||
--- /dev/null
|
||||
+++ b/drivers/clk/meson/vclk.h
|
||||
@@ -0,0 +1,51 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||
+/*
|
||||
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
|
||||
+ */
|
||||
+
|
||||
+#ifndef __VCLK_H
|
||||
+#define __VCLK_H
|
||||
+
|
||||
+#include "clk-regmap.h"
|
||||
+#include "parm.h"
|
||||
+
|
||||
+/**
|
||||
+ * struct clk_regmap_vclk_data - vclk regmap backed specific data
|
||||
+ *
|
||||
+ * @enable: vclk enable field
|
||||
+ * @reset: vclk reset field
|
||||
+ * @flags: hardware-specific flags
|
||||
+ *
|
||||
+ * Flags:
|
||||
+ * Same as clk_gate except CLK_GATE_HIWORD_MASK which is ignored
|
||||
+ */
|
||||
+struct clk_regmap_vclk_data {
|
||||
+ struct parm enable;
|
||||
+ struct parm reset;
|
||||
+ u8 flags;
|
||||
+};
|
||||
+
|
||||
+extern const struct clk_ops clk_regmap_vclk_ops;
|
||||
+
|
||||
+/**
|
||||
+ * struct clk_regmap_vclk_div_data - vclk_div regmap back specific data
|
||||
+ *
|
||||
+ * @div: divider field
|
||||
+ * @enable: vclk divider enable field
|
||||
+ * @reset: vclk divider reset field
|
||||
+ * @table: array of value/divider pairs, last entry should have div = 0
|
||||
+ *
|
||||
+ * Flags:
|
||||
+ * Same as clk_divider except CLK_DIVIDER_HIWORD_MASK which is ignored
|
||||
+ */
|
||||
+struct clk_regmap_vclk_div_data {
|
||||
+ struct parm div;
|
||||
+ struct parm enable;
|
||||
+ struct parm reset;
|
||||
+ const struct clk_div_table *table;
|
||||
+ u8 flags;
|
||||
+};
|
||||
+
|
||||
+extern const struct clk_ops clk_regmap_vclk_div_ops;
|
||||
+
|
||||
+#endif /* __VCLK_H */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,264 @@
|
||||
From a947da42547598dc8c44569cd55eda49c1c7f064 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:09 +0100
|
||||
Subject: [PATCH 31/64] FROMLIST(v8): clk: meson: g12a: make VCLK2 and ENCL
|
||||
clock path configurable by CCF
|
||||
|
||||
In order to setup the DSI clock, let's make the unused VCLK2 clock path
|
||||
configuration via CCF.
|
||||
|
||||
The nocache option is removed from following clocks:
|
||||
- vclk2_sel
|
||||
- vclk2_input
|
||||
- vclk2_div
|
||||
- vclk2
|
||||
- vclk_div1
|
||||
- vclk2_div2_en
|
||||
- vclk2_div4_en
|
||||
- vclk2_div6_en
|
||||
- vclk2_div12_en
|
||||
- vclk2_div2
|
||||
- vclk2_div4
|
||||
- vclk2_div6
|
||||
- vclk2_div12
|
||||
- cts_encl_sel
|
||||
|
||||
vclk2 and vclk2_div uses the newly introduced vclk regmap driver
|
||||
to handle the enable and reset bits.
|
||||
|
||||
In order to set a rate on cts_encl via the vclk2 clock path,
|
||||
the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in order
|
||||
to keep CCF from selection a parent.
|
||||
The parents of cts_encl_sel & vclk2_sel are expected to be defined
|
||||
in DT.
|
||||
|
||||
The following clock scheme is to be used for DSI:
|
||||
|
||||
xtal
|
||||
\_ gp0_pll_dco
|
||||
\_ gp0_pll
|
||||
|- vclk2_sel
|
||||
| \_ vclk2_input
|
||||
| \_ vclk2_div
|
||||
| \_ vclk2
|
||||
| \_ vclk2_div1
|
||||
| \_ cts_encl_sel
|
||||
| \_ cts_encl -> to VPU LCD Encoder
|
||||
|- mipi_dsi_pxclk_sel
|
||||
\_ mipi_dsi_pxclk_div
|
||||
\_ mipi_dsi_pxclk -> to DSI controller
|
||||
|
||||
The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
|
||||
for mipi_dsi_pxclk and vclk2_input.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 68 +++++++++++++++++++++++++++-------------
|
||||
1 file changed, 47 insertions(+), 21 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index cadd824336ad..fb3d9196a1fd 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -22,6 +22,7 @@
|
||||
#include "clk-regmap.h"
|
||||
#include "clk-cpu-dyndiv.h"
|
||||
#include "vid-pll-div.h"
|
||||
+#include "vclk.h"
|
||||
#include "meson-eeclk.h"
|
||||
#include "g12a.h"
|
||||
|
||||
@@ -3165,7 +3166,7 @@ static struct clk_regmap g12a_vclk2_sel = {
|
||||
.ops = &clk_regmap_mux_ops,
|
||||
.parent_hws = g12a_vclk_parent_hws,
|
||||
.num_parents = ARRAY_SIZE(g12a_vclk_parent_hws),
|
||||
- .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3193,7 +3194,7 @@ static struct clk_regmap g12a_vclk2_input = {
|
||||
.ops = &clk_regmap_gate_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_sel.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3215,19 +3216,32 @@ static struct clk_regmap g12a_vclk_div = {
|
||||
};
|
||||
|
||||
static struct clk_regmap g12a_vclk2_div = {
|
||||
- .data = &(struct clk_regmap_div_data){
|
||||
- .offset = HHI_VIID_CLK_DIV,
|
||||
- .shift = 0,
|
||||
- .width = 8,
|
||||
+ .data = &(struct clk_regmap_vclk_div_data){
|
||||
+ .div = {
|
||||
+ .reg_off = HHI_VIID_CLK_DIV,
|
||||
+ .shift = 0,
|
||||
+ .width = 8,
|
||||
+ },
|
||||
+ .enable = {
|
||||
+ .reg_off = HHI_VIID_CLK_DIV,
|
||||
+ .shift = 16,
|
||||
+ .width = 1,
|
||||
+ },
|
||||
+ .reset = {
|
||||
+ .reg_off = HHI_VIID_CLK_DIV,
|
||||
+ .shift = 17,
|
||||
+ .width = 1,
|
||||
+ },
|
||||
+ .flags = CLK_DIVIDER_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "vclk2_div",
|
||||
- .ops = &clk_regmap_divider_ops,
|
||||
+ .ops = &clk_regmap_vclk_div_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) {
|
||||
&g12a_vclk2_input.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_GET_RATE_NOCACHE,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3246,16 +3260,24 @@ static struct clk_regmap g12a_vclk = {
|
||||
};
|
||||
|
||||
static struct clk_regmap g12a_vclk2 = {
|
||||
- .data = &(struct clk_regmap_gate_data){
|
||||
- .offset = HHI_VIID_CLK_CNTL,
|
||||
- .bit_idx = 19,
|
||||
+ .data = &(struct clk_regmap_vclk_data){
|
||||
+ .enable = {
|
||||
+ .reg_off = HHI_VIID_CLK_CNTL,
|
||||
+ .shift = 19,
|
||||
+ .width = 1,
|
||||
+ },
|
||||
+ .reset = {
|
||||
+ .reg_off = HHI_VIID_CLK_CNTL,
|
||||
+ .shift = 15,
|
||||
+ .width = 1,
|
||||
+ },
|
||||
},
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "vclk2",
|
||||
- .ops = &clk_regmap_gate_ops,
|
||||
+ .ops = &clk_regmap_vclk_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_div.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3339,7 +3361,7 @@ static struct clk_regmap g12a_vclk2_div1 = {
|
||||
.ops = &clk_regmap_gate_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3353,7 +3375,7 @@ static struct clk_regmap g12a_vclk2_div2_en = {
|
||||
.ops = &clk_regmap_gate_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3367,7 +3389,7 @@ static struct clk_regmap g12a_vclk2_div4_en = {
|
||||
.ops = &clk_regmap_gate_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3381,7 +3403,7 @@ static struct clk_regmap g12a_vclk2_div6_en = {
|
||||
.ops = &clk_regmap_gate_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3395,7 +3417,7 @@ static struct clk_regmap g12a_vclk2_div12_en = {
|
||||
.ops = &clk_regmap_gate_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw },
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3461,6 +3483,7 @@ static struct clk_fixed_factor g12a_vclk2_div2 = {
|
||||
&g12a_vclk2_div2_en.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3474,6 +3497,7 @@ static struct clk_fixed_factor g12a_vclk2_div4 = {
|
||||
&g12a_vclk2_div4_en.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3487,6 +3511,7 @@ static struct clk_fixed_factor g12a_vclk2_div6 = {
|
||||
&g12a_vclk2_div6_en.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3500,6 +3525,7 @@ static struct clk_fixed_factor g12a_vclk2_div12 = {
|
||||
&g12a_vclk2_div12_en.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3561,7 +3587,7 @@ static struct clk_regmap g12a_cts_encl_sel = {
|
||||
.ops = &clk_regmap_mux_ops,
|
||||
.parent_hws = g12a_cts_parent_hws,
|
||||
.num_parents = ARRAY_SIZE(g12a_cts_parent_hws),
|
||||
- .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3717,7 +3743,7 @@ static struct clk_regmap g12a_mipi_dsi_pxclk_sel = {
|
||||
.ops = &clk_regmap_mux_ops,
|
||||
.parent_hws = g12a_mipi_dsi_pxclk_parent_hws,
|
||||
.num_parents = ARRAY_SIZE(g12a_mipi_dsi_pxclk_parent_hws),
|
||||
- .flags = CLK_SET_RATE_NO_REPARENT,
|
||||
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3729,7 +3755,7 @@ static struct clk_regmap g12a_mipi_dsi_pxclk_div = {
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "mipi_dsi_pxclk_div",
|
||||
- .ops = &clk_regmap_divider_ops,
|
||||
+ .ops = &clk_regmap_divider_ro_ops,
|
||||
.parent_hws = (const struct clk_hw *[]) {
|
||||
&g12a_mipi_dsi_pxclk_sel.hw
|
||||
},
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,43 @@
|
||||
From e2dfeecc7473e47a20c14814ff4d0cfdcb85fea3 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:10 +0100
|
||||
Subject: [PATCH 32/64] FROMLIST(v8): drm/meson: gate px_clk when setting rate
|
||||
|
||||
Disable the px_clk when setting the rate to recover a fully
|
||||
configured and correctly reset VCLK clock tree after the rate
|
||||
is set.
|
||||
|
||||
Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++++++
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
|
||||
index e5fe4e994f43..72abe2057ec3 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
|
||||
@@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+ clk_disable_unprepare(mipi_dsi->px_clk);
|
||||
ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
|
||||
|
||||
if (ret) {
|
||||
@@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+ ret = clk_prepare_enable(mipi_dsi->px_clk);
|
||||
+ if (ret) {
|
||||
+ dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
switch (mipi_dsi->dsi_device->format) {
|
||||
case MIPI_DSI_FMT_RGB888:
|
||||
dpi_data_format = DPI_COLOR_24BIT;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,31 +0,0 @@
|
||||
From b6516692a447924f5aca081ca5ec5645a88cfc99 Mon Sep 17 00:00:00 2001
|
||||
From: Tomeu Vizoso <tomeu@tomeuvizoso.net>
|
||||
Date: Mon, 16 Oct 2023 10:02:04 +0200
|
||||
Subject: [PATCH 33/41] FROMLIST(v1): pmdomain: amlogic: Fix mask for the
|
||||
second NNA mem PD domain
|
||||
|
||||
Without this change, the NPU hangs when the 8th NN core is used.
|
||||
|
||||
It matches what the out-of-tree driver does.
|
||||
|
||||
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
|
||||
---
|
||||
drivers/pmdomain/amlogic/meson-ee-pwrc.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/pmdomain/amlogic/meson-ee-pwrc.c b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
|
||||
index cfb796d40d9d..0dd71cd814c5 100644
|
||||
--- a/drivers/pmdomain/amlogic/meson-ee-pwrc.c
|
||||
+++ b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
|
||||
@@ -228,7 +228,7 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {
|
||||
|
||||
static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
|
||||
{ G12A_HHI_NANOQ_MEM_PD_REG0, GENMASK(31, 0) },
|
||||
- { G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(23, 0) },
|
||||
+ { G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
|
||||
};
|
||||
|
||||
#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,115 @@
|
||||
From b619319aa02b96b8a7271885066da15b5d3b6578 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Thu, 9 Nov 2023 10:00:11 +0100
|
||||
Subject: [PATCH 33/64] FROMLIST(v8): arm64: meson: g12-common: add the MIPI
|
||||
DSI nodes
|
||||
|
||||
Add the MIPI DSI Analog & Digital PHY nodes and the DSI control
|
||||
nodes with proper port endpoint to the VPU.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-g12-common.dtsi | 70 +++++++++++++++++++
|
||||
1 file changed, 70 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index a960d07f9af3..ad0bfc8f1db6 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -1663,9 +1663,28 @@ pwrc: power-controller {
|
||||
<250000000>,
|
||||
<0>; /* Do Nothing */
|
||||
};
|
||||
+
|
||||
+ mipi_analog_dphy: phy {
|
||||
+ compatible = "amlogic,g12a-mipi-dphy-analog";
|
||||
+ #phy-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
};
|
||||
};
|
||||
|
||||
+ mipi_dphy: phy@44000 {
|
||||
+ compatible = "amlogic,axg-mipi-dphy";
|
||||
+ reg = <0x0 0x44000 0x0 0x2000>;
|
||||
+ clocks = <&clkc CLKID_MIPI_DSI_PHY>;
|
||||
+ clock-names = "pclk";
|
||||
+ resets = <&reset RESET_MIPI_DSI_PHY>;
|
||||
+ reset-names = "phy";
|
||||
+ phys = <&mipi_analog_dphy>;
|
||||
+ phy-names = "analog";
|
||||
+ #phy-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
usb3_pcie_phy: phy@46000 {
|
||||
compatible = "amlogic,g12a-usb3-pcie-phy";
|
||||
reg = <0x0 0x46000 0x0 0x2000>;
|
||||
@@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint {
|
||||
remote-endpoint = <&hdmi_tx_in>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ /* DPI output port */
|
||||
+ dpi_port: port@2 {
|
||||
+ reg = <2>;
|
||||
+
|
||||
+ dpi_out: endpoint {
|
||||
+ remote-endpoint = <&mipi_dsi_in>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
gic: interrupt-controller@ffc01000 {
|
||||
@@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 {
|
||||
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
|
||||
};
|
||||
|
||||
+ mipi_dsi: dsi@7000 {
|
||||
+ compatible = "amlogic,meson-g12a-dw-mipi-dsi";
|
||||
+ reg = <0x0 0x7000 0x0 0x1000>;
|
||||
+ resets = <&reset RESET_MIPI_DSI_HOST>;
|
||||
+ reset-names = "top";
|
||||
+ clocks = <&clkc CLKID_MIPI_DSI_HOST>,
|
||||
+ <&clkc CLKID_MIPI_DSI_PXCLK>,
|
||||
+ <&clkc CLKID_CTS_ENCL>;
|
||||
+ clock-names = "pclk", "bit", "px";
|
||||
+ phys = <&mipi_dphy>;
|
||||
+ phy-names = "dphy";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
|
||||
+ <&clkc CLKID_CTS_ENCL_SEL>,
|
||||
+ <&clkc CLKID_VCLK2_SEL>;
|
||||
+ assigned-clock-parents = <&clkc CLKID_GP0_PLL>,
|
||||
+ <&clkc CLKID_VCLK2_DIV1>,
|
||||
+ <&clkc CLKID_GP0_PLL>;
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ /* VPU VENC Input */
|
||||
+ mipi_dsi_venc_port: port@0 {
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ mipi_dsi_in: endpoint {
|
||||
+ remote-endpoint = <&dpi_out>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* DSI Output */
|
||||
+ mipi_dsi_panel_port: port@1 {
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
watchdog: watchdog@f0d0 {
|
||||
compatible = "amlogic,meson-gxbb-wdt";
|
||||
reg = <0x0 0xf0d0 0x0 0x10>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,32 @@
|
||||
From 61521f25f94a41ca43a822838ba006f3cf98a22b Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Tue, 14 Nov 2023 11:14:43 +0100
|
||||
Subject: [PATCH 34/64] FROMLIST(v1): dt-bindings: clock: g12a-clkc: add MIPI
|
||||
ISP & CSI PHY clock ids
|
||||
|
||||
Add MIPI ISP & CSI PHY clock ids to G12A clock bindings header
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
include/dt-bindings/clock/g12a-clkc.h | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h
|
||||
index 636d713f95ff..fd09819da2ec 100644
|
||||
--- a/include/dt-bindings/clock/g12a-clkc.h
|
||||
+++ b/include/dt-bindings/clock/g12a-clkc.h
|
||||
@@ -281,5 +281,11 @@
|
||||
#define CLKID_MIPI_DSI_PXCLK 270
|
||||
#define CLKID_CTS_ENCL 271
|
||||
#define CLKID_CTS_ENCL_SEL 272
|
||||
+#define CLKID_MIPI_ISP_DIV 273
|
||||
+#define CLKID_MIPI_ISP_SEL 274
|
||||
+#define CLKID_MIPI_ISP 275
|
||||
+#define CLKID_MIPI_ISP_GATE 276
|
||||
+#define CLKID_MIPI_ISP_CSI_PHY0 277
|
||||
+#define CLKID_MIPI_ISP_CSI_PHY1 278
|
||||
|
||||
#endif /* __G12A_CLKC_H */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,34 +0,0 @@
|
||||
From dc37a4f15253cd5a88c973ab041c56ad1e3166a7 Mon Sep 17 00:00:00 2001
|
||||
From: Rong Chen <rong.chen@amlogic.com>
|
||||
Date: Thu, 26 Oct 2023 15:31:56 +0800
|
||||
Subject: [PATCH 34/41] FROMLIST(v2): mmc: meson-gx: Remove setting of
|
||||
CMD_CFG_ERROR
|
||||
|
||||
For the t7 and older SoC families, the CMD_CFG_ERROR has no effect.
|
||||
Starting from SoC family C3, setting this bit without SG LINK data
|
||||
address will cause the controller to generate an IRQ and stop working.
|
||||
|
||||
To fix it, don't set the bit CMD_CFG_ERROR anymore.
|
||||
|
||||
Fixes: 18f92bc02f17 ("mmc: meson-gx: make sure the descriptor is stopped on errors")
|
||||
Signed-off-by: Rong Chen <rong.chen@amlogic.com>
|
||||
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
drivers/mmc/host/meson-gx-mmc.c | 1 -
|
||||
1 file changed, 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
|
||||
index 9837dab096e6..c7c067b9415a 100644
|
||||
--- a/drivers/mmc/host/meson-gx-mmc.c
|
||||
+++ b/drivers/mmc/host/meson-gx-mmc.c
|
||||
@@ -801,7 +801,6 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
|
||||
|
||||
cmd_cfg |= FIELD_PREP(CMD_CFG_CMD_INDEX_MASK, cmd->opcode);
|
||||
cmd_cfg |= CMD_CFG_OWNER; /* owned by CPU */
|
||||
- cmd_cfg |= CMD_CFG_ERROR; /* stop in case of error */
|
||||
|
||||
meson_mmc_set_response_bits(cmd, &cmd_cfg);
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,120 @@
|
||||
From 075caf89c3400340b8b8396bdf4f8dd8bf09ca45 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Tue, 14 Nov 2023 11:14:44 +0100
|
||||
Subject: [PATCH 35/64] FROMLIST(v1): clk: meson: g12a: add MIPI ISP clocks
|
||||
|
||||
Add the MIPI ISP gate, divider and mux used to feed the MIPI CSI ISP
|
||||
(Image Signal Processor) IP on the Amlogic G12B SoC.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 66 ++++++++++++++++++++++++++++++++++++++++
|
||||
drivers/clk/meson/g12a.h | 1 +
|
||||
2 files changed, 67 insertions(+)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index fb3d9196a1fd..b32812bf6d8d 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -3780,6 +3780,66 @@ static struct clk_regmap g12a_mipi_dsi_pxclk = {
|
||||
},
|
||||
};
|
||||
|
||||
+/* MIPI ISP Clocks */
|
||||
+
|
||||
+static const struct clk_parent_data g12b_mipi_isp_parent_data[] = {
|
||||
+ { .fw_name = "xtal", },
|
||||
+ { .hw = &g12a_gp0_pll.hw },
|
||||
+ { .hw = &g12a_hifi_pll.hw },
|
||||
+ { .hw = &g12a_fclk_div2p5.hw },
|
||||
+ { .hw = &g12a_fclk_div3.hw },
|
||||
+ { .hw = &g12a_fclk_div4.hw },
|
||||
+ { .hw = &g12a_fclk_div5.hw },
|
||||
+ { .hw = &g12a_fclk_div7.hw },
|
||||
+};
|
||||
+
|
||||
+static struct clk_regmap g12b_mipi_isp_sel = {
|
||||
+ .data = &(struct clk_regmap_mux_data){
|
||||
+ .offset = HHI_ISP_CLK_CNTL,
|
||||
+ .mask = 7,
|
||||
+ .shift = 9,
|
||||
+ },
|
||||
+ .hw.init = &(struct clk_init_data){
|
||||
+ .name = "mipi_isp_sel",
|
||||
+ .ops = &clk_regmap_mux_ops,
|
||||
+ .parent_data = g12b_mipi_isp_parent_data,
|
||||
+ .num_parents = ARRAY_SIZE(g12b_mipi_isp_parent_data),
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct clk_regmap g12b_mipi_isp_div = {
|
||||
+ .data = &(struct clk_regmap_div_data){
|
||||
+ .offset = HHI_ISP_CLK_CNTL,
|
||||
+ .shift = 0,
|
||||
+ .width = 7,
|
||||
+ },
|
||||
+ .hw.init = &(struct clk_init_data){
|
||||
+ .name = "mipi_isp_div",
|
||||
+ .ops = &clk_regmap_divider_ops,
|
||||
+ .parent_hws = (const struct clk_hw *[]) {
|
||||
+ &g12b_mipi_isp_sel.hw
|
||||
+ },
|
||||
+ .num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct clk_regmap g12b_mipi_isp = {
|
||||
+ .data = &(struct clk_regmap_gate_data){
|
||||
+ .offset = HHI_ISP_CLK_CNTL,
|
||||
+ .bit_idx = 8,
|
||||
+ },
|
||||
+ .hw.init = &(struct clk_init_data) {
|
||||
+ .name = "mipi_isp",
|
||||
+ .ops = &clk_regmap_gate_ops,
|
||||
+ .parent_hws = (const struct clk_hw *[]) {
|
||||
+ &g12b_mipi_isp_div.hw
|
||||
+ },
|
||||
+ .num_parents = 1,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
/* HDMI Clocks */
|
||||
|
||||
static const struct clk_parent_data g12a_hdmi_parent_data[] = {
|
||||
@@ -4791,6 +4851,9 @@ static struct clk_hw *g12b_hw_clks[] = {
|
||||
[CLKID_MIPI_DSI_PXCLK_SEL] = &g12a_mipi_dsi_pxclk_sel.hw,
|
||||
[CLKID_MIPI_DSI_PXCLK_DIV] = &g12a_mipi_dsi_pxclk_div.hw,
|
||||
[CLKID_MIPI_DSI_PXCLK] = &g12a_mipi_dsi_pxclk.hw,
|
||||
+ [CLKID_MIPI_ISP_SEL] = &g12b_mipi_isp_sel.hw,
|
||||
+ [CLKID_MIPI_ISP_DIV] = &g12b_mipi_isp_div.hw,
|
||||
+ [CLKID_MIPI_ISP] = &g12b_mipi_isp.hw,
|
||||
};
|
||||
|
||||
static struct clk_hw *sm1_hw_clks[] = {
|
||||
@@ -5287,6 +5350,9 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
|
||||
&g12a_mipi_dsi_pxclk_sel,
|
||||
&g12a_mipi_dsi_pxclk_div,
|
||||
&g12a_mipi_dsi_pxclk,
|
||||
+ &g12b_mipi_isp_sel,
|
||||
+ &g12b_mipi_isp_div,
|
||||
+ &g12b_mipi_isp,
|
||||
};
|
||||
|
||||
static const struct reg_sequence g12a_init_regs[] = {
|
||||
diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h
|
||||
index f11ee3c59849..27df99c4565a 100644
|
||||
--- a/drivers/clk/meson/g12a.h
|
||||
+++ b/drivers/clk/meson/g12a.h
|
||||
@@ -70,6 +70,7 @@
|
||||
#define HHI_MALI_CLK_CNTL 0x1b0
|
||||
#define HHI_VPU_CLKC_CNTL 0x1b4
|
||||
#define HHI_VPU_CLK_CNTL 0x1bC
|
||||
+#define HHI_ISP_CLK_CNTL 0x1C0
|
||||
#define HHI_NNA_CLK_CNTL 0x1C8
|
||||
#define HHI_HDMI_CLK_CNTL 0x1CC
|
||||
#define HHI_VDEC_CLK_CNTL 0x1E0
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,53 @@
|
||||
From 9a03043242074b17f7fcd90ef3e49647eea67032 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Tue, 14 Nov 2023 11:14:45 +0100
|
||||
Subject: [PATCH 36/64] FROMLIST(v1): clk: meson: g12a: add CSI & ISP gates
|
||||
clocks
|
||||
|
||||
Add the gates entires for the CSI ISP domain and CSI PHYs.
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index b32812bf6d8d..078ef5cd026c 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -4332,9 +4332,12 @@ static MESON_GATE(g12a_htx_hdcp22, HHI_GCLK_MPEG2, 3);
|
||||
static MESON_GATE(g12a_htx_pclk, HHI_GCLK_MPEG2, 4);
|
||||
static MESON_GATE(g12a_bt656, HHI_GCLK_MPEG2, 6);
|
||||
static MESON_GATE(g12a_usb1_to_ddr, HHI_GCLK_MPEG2, 8);
|
||||
+static MESON_GATE(g12b_mipi_isp_gate, HHI_GCLK_MPEG2, 17);
|
||||
static MESON_GATE(g12a_mmc_pclk, HHI_GCLK_MPEG2, 11);
|
||||
static MESON_GATE(g12a_uart2, HHI_GCLK_MPEG2, 15);
|
||||
static MESON_GATE(g12a_vpu_intr, HHI_GCLK_MPEG2, 25);
|
||||
+static MESON_GATE(g12b_csi_phy1, HHI_GCLK_MPEG2, 28);
|
||||
+static MESON_GATE(g12b_csi_phy0, HHI_GCLK_MPEG2, 29);
|
||||
static MESON_GATE(g12a_gic, HHI_GCLK_MPEG2, 30);
|
||||
|
||||
static MESON_GATE(g12a_vclk2_venci0, HHI_GCLK_OTHER, 1);
|
||||
@@ -4854,6 +4857,9 @@ static struct clk_hw *g12b_hw_clks[] = {
|
||||
[CLKID_MIPI_ISP_SEL] = &g12b_mipi_isp_sel.hw,
|
||||
[CLKID_MIPI_ISP_DIV] = &g12b_mipi_isp_div.hw,
|
||||
[CLKID_MIPI_ISP] = &g12b_mipi_isp.hw,
|
||||
+ [CLKID_MIPI_ISP_GATE] = &g12b_mipi_isp_gate.hw,
|
||||
+ [CLKID_MIPI_ISP_CSI_PHY0] = &g12b_csi_phy0.hw,
|
||||
+ [CLKID_MIPI_ISP_CSI_PHY1] = &g12b_csi_phy1.hw,
|
||||
};
|
||||
|
||||
static struct clk_hw *sm1_hw_clks[] = {
|
||||
@@ -5353,6 +5359,9 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
|
||||
&g12b_mipi_isp_sel,
|
||||
&g12b_mipi_isp_div,
|
||||
&g12b_mipi_isp,
|
||||
+ &g12b_mipi_isp_gate,
|
||||
+ &g12b_csi_phy1,
|
||||
+ &g12b_csi_phy0,
|
||||
};
|
||||
|
||||
static const struct reg_sequence g12a_init_regs[] = {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,27 @@
|
||||
From 71004ec4f352989cddfc3e119d100b74cbc79a58 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Tue, 14 Nov 2023 11:19:50 +0100
|
||||
Subject: [PATCH 37/64] FROMLIST(v1): dt-bindings: power: meson-g12a-power:
|
||||
document ISP power domain
|
||||
|
||||
Add MIPI ISP power domain ID to the G12A Power domains bindings header
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
include/dt-bindings/power/meson-g12a-power.h | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
|
||||
index 44ec0c50e340..01fd0ac4dd08 100644
|
||||
--- a/include/dt-bindings/power/meson-g12a-power.h
|
||||
+++ b/include/dt-bindings/power/meson-g12a-power.h
|
||||
@@ -10,5 +10,6 @@
|
||||
#define PWRC_G12A_VPU_ID 0
|
||||
#define PWRC_G12A_ETH_ID 1
|
||||
#define PWRC_G12A_NNA_ID 2
|
||||
+#define PWRC_G12A_ISP_ID 3
|
||||
|
||||
#endif
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,64 @@
|
||||
From 34bb3dd9fabe0a5680368d093c7993d213106bc1 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Tue, 14 Nov 2023 11:19:51 +0100
|
||||
Subject: [PATCH 38/64] FROMLIST(v1): pmdomain: amlogic: meson-ee-pwrc: add
|
||||
support for G12A ISP power domain
|
||||
|
||||
Add entries for the ISP power domain found in the Amlogic G12B SoC
|
||||
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/pmdomain/amlogic/meson-ee-pwrc.c | 16 ++++++++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/drivers/pmdomain/amlogic/meson-ee-pwrc.c b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
|
||||
index 0dd71cd814c5..cba216a2175e 100644
|
||||
--- a/drivers/pmdomain/amlogic/meson-ee-pwrc.c
|
||||
+++ b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
|
||||
@@ -47,6 +47,8 @@
|
||||
|
||||
#define G12A_HHI_NANOQ_MEM_PD_REG0 (0x43 << 2)
|
||||
#define G12A_HHI_NANOQ_MEM_PD_REG1 (0x44 << 2)
|
||||
+#define G12A_HHI_ISP_MEM_PD_REG0 (0x45 << 2)
|
||||
+#define G12A_HHI_ISP_MEM_PD_REG1 (0x46 << 2)
|
||||
|
||||
struct meson_ee_pwrc;
|
||||
struct meson_ee_pwrc_domain;
|
||||
@@ -115,6 +117,13 @@ static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
|
||||
.iso_mask = BIT(16) | BIT(17),
|
||||
};
|
||||
|
||||
+static struct meson_ee_pwrc_top_domain g12a_pwrc_isp = {
|
||||
+ .sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
|
||||
+ .sleep_mask = BIT(18) | BIT(19),
|
||||
+ .iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
|
||||
+ .iso_mask = BIT(18) | BIT(19),
|
||||
+};
|
||||
+
|
||||
/* Memory PD Domains */
|
||||
|
||||
#define VPU_MEMPD(__reg) \
|
||||
@@ -231,6 +240,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
|
||||
{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
|
||||
};
|
||||
|
||||
+static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
|
||||
+ { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
|
||||
+ { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
|
||||
+};
|
||||
+
|
||||
#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \
|
||||
{ \
|
||||
.name = __name, \
|
||||
@@ -269,6 +283,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
|
||||
[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
|
||||
[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
|
||||
pwrc_ee_is_powered_off),
|
||||
+ [PWRC_G12A_ISP_ID] = TOP_PD("ISP", &g12a_pwrc_isp, g12a_pwrc_mem_isp,
|
||||
+ pwrc_ee_is_powered_off),
|
||||
};
|
||||
|
||||
static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,59 @@
|
||||
From 97012c291c705261fa0931a2ed1590d5aa1c60b0 Mon Sep 17 00:00:00 2001
|
||||
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
Date: Fri, 24 Nov 2023 10:47:00 +0100
|
||||
Subject: [PATCH 39/64] FROMLIST(v1): arm64: dts: amlogic: minor whitespace
|
||||
cleanup around '='
|
||||
|
||||
The DTS code coding style expects exactly one space before and after '='
|
||||
sign.
|
||||
|
||||
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
Reviewed-by: Viacheslav Bocharov<adeep@lexina.in>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts | 2 +-
|
||||
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi | 2 +-
|
||||
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi | 2 +-
|
||||
3 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts
|
||||
index 0062667c4f65..c9e84db0831a 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts
|
||||
@@ -30,7 +30,7 @@ &sd_emmc_b {
|
||||
&uart_B {
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8822cs-bt";
|
||||
- enable-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
|
||||
host-wake-gpios = <&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
|
||||
device-wake-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
|
||||
index 995ce10d5c81..08c33ec7e9f1 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
|
||||
@@ -369,7 +369,7 @@ &uart_A {
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8822cs-bt";
|
||||
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
|
||||
device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
|
||||
index 0a6a12808568..4b8db872bbf3 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
|
||||
@@ -487,7 +487,7 @@ &uart_A {
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8822cs-bt";
|
||||
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
|
||||
device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,53 @@
|
||||
From a3fac2d6602af61a6647a89e4edd1b60c7ae0884 Mon Sep 17 00:00:00 2001
|
||||
From: Haoran Liu <liuhaoran14@163.com>
|
||||
Date: Wed, 29 Nov 2023 03:34:05 -0800
|
||||
Subject: [PATCH 40/64] FROMLIST(v2): meson_plane: Add error handling
|
||||
|
||||
This patch adds robust error handling to the meson_plane_create
|
||||
function in drivers/gpu/drm/meson/meson_plane.c. The function
|
||||
previously lacked proper handling for potential failure scenarios
|
||||
of the drm_universal_plane_init call.
|
||||
|
||||
Signed-off-by: Haoran Liu <liuhaoran14@163.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_plane.c | 17 +++++++++++------
|
||||
1 file changed, 11 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
|
||||
index 815dfe30492b..b43ac61201f3 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_plane.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_plane.c
|
||||
@@ -534,6 +534,7 @@ int meson_plane_create(struct meson_drm *priv)
|
||||
struct meson_plane *meson_plane;
|
||||
struct drm_plane *plane;
|
||||
const uint64_t *format_modifiers = format_modifiers_default;
|
||||
+ int ret;
|
||||
|
||||
meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane),
|
||||
GFP_KERNEL);
|
||||
@@ -548,12 +549,16 @@ int meson_plane_create(struct meson_drm *priv)
|
||||
else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
|
||||
format_modifiers = format_modifiers_afbc_g12a;
|
||||
|
||||
- drm_universal_plane_init(priv->drm, plane, 0xFF,
|
||||
- &meson_plane_funcs,
|
||||
- supported_drm_formats,
|
||||
- ARRAY_SIZE(supported_drm_formats),
|
||||
- format_modifiers,
|
||||
- DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
|
||||
+ ret = drm_universal_plane_init(priv->drm, plane, 0xFF,
|
||||
+ &meson_plane_funcs,
|
||||
+ supported_drm_formats,
|
||||
+ ARRAY_SIZE(supported_drm_formats),
|
||||
+ format_modifiers,
|
||||
+ DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
|
||||
+ if (ret) {
|
||||
+ devm_kfree(priv->drm->dev, meson_plane);
|
||||
+ return ret;
|
||||
+ }
|
||||
|
||||
drm_plane_helper_add(plane, &meson_plane_helper_funcs);
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,57 @@
|
||||
From f6a65a3e57eaa033fecd68cf48603ec9112ce1b7 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 9 Jan 2024 16:20:14 +0000
|
||||
Subject: [PATCH 41/64] FROMLIST(v1): drm/meson: vclk: fix calculation of 59.94
|
||||
fractional rates
|
||||
|
||||
Playing 4K media with 59.94 fractional rate (typically VP9) causes the screen to lose
|
||||
sync with the following error reported in the system log:
|
||||
|
||||
[ 89.610280] Fatal Error, invalid HDMI vclk freq 593406
|
||||
|
||||
Modetest shows the following:
|
||||
|
||||
3840x2160 59.94 3840 4016 4104 4400 2160 2168 2178 2250 593407 flags: phsync, pvsync; type: driver
|
||||
drm calculated value -------------------------------------^
|
||||
|
||||
Change the fractional rate calculation to stop DIV_ROUND_CLOSEST rounding down which
|
||||
results in vclk freq failing to match correctly.
|
||||
|
||||
Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_vclk.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index 2a82119eb58e..2a942dc6a6dc 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
FREQ_1000_1001(params[i].pixel_freq));
|
||||
DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
|
||||
i, params[i].phy_freq,
|
||||
- FREQ_1000_1001(params[i].phy_freq/10)*10);
|
||||
+ FREQ_1000_1001(params[i].phy_freq/1000)*1000);
|
||||
/* Match strict frequency */
|
||||
if (phy_freq == params[i].phy_freq &&
|
||||
vclk_freq == params[i].vclk_freq)
|
||||
return MODE_OK;
|
||||
/* Match 1000/1001 variant */
|
||||
- if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
|
||||
+ if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/1000)*1000) &&
|
||||
vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
|
||||
return MODE_OK;
|
||||
}
|
||||
@@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
||||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/1000)*1000) &&
|
||||
(vclk_freq == params[freq].vclk_freq ||
|
||||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
if (vclk_freq != params[freq].vclk_freq)
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 45437e5468366aa728e145e1cab8485af3141c21 Mon Sep 17 00:00:00 2001
|
||||
From 9034557a662a52e608fb504570f6f5fa92bb2b55 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 5 Jan 2023 15:16:46 +0000
|
||||
Subject: [PATCH 36/41] WIP: media: meson: vdec: disable MPEG1/MPEG2 hardware
|
||||
Subject: [PATCH 42/64] WIP: media: meson: vdec: disable MPEG1/MPEG2 hardware
|
||||
decoding
|
||||
|
||||
The MPEG1/2 decoder is broken and nobody has volunteered to poke
|
@ -1,7 +1,7 @@
|
||||
From 7b8c6282bd2047b55d2da9e76523eb8b5fde4855 Mon Sep 17 00:00:00 2001
|
||||
From 58786177fc62e50be1c7f5dc703db0fa6a751ea7 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 18 Jan 2022 15:09:12 +0000
|
||||
Subject: [PATCH 37/41] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
|
||||
Subject: [PATCH 43/64] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
|
||||
100MHz
|
||||
|
||||
Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but
|
@ -1,7 +1,7 @@
|
||||
From 8a8bfb5b66f73e5e1e826f1ec66861349107879d Mon Sep 17 00:00:00 2001
|
||||
From 6b18138cdb3af412733e4f77db111d7e72d8d004 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 19 Jan 2022 06:45:06 +0000
|
||||
Subject: [PATCH 38/41] WIP: arm64: dts: meson: add UHS SDIO capabilities to
|
||||
Subject: [PATCH 44/64] WIP: arm64: dts: meson: add UHS SDIO capabilities to
|
||||
p212/p23x/q20x
|
||||
|
||||
Add UHS capabilities to the SDIO node to enable 100MHz speeds.
|
@ -1,7 +1,7 @@
|
||||
From 48ff2bb4767bedc319ed39b260b4d7428e03d655 Mon Sep 17 00:00:00 2001
|
||||
From cde2b45ce0d675b4ef40621268cfbdcd738799b5 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 18 Jan 2022 15:18:32 +0000
|
||||
Subject: [PATCH 39/41] WIP: arm64: dts: meson: remove SDIO node from Khadas
|
||||
Subject: [PATCH 45/64] WIP: arm64: dts: meson: remove SDIO node from Khadas
|
||||
VIM1
|
||||
|
||||
Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we
|
@ -0,0 +1,109 @@
|
||||
From f8c00dd2bf6ea3414e65a3fb3be96d3d7c13ae0b Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 3 Jan 2024 03:14:06 +0000
|
||||
Subject: [PATCH 46/64] WIP: arm64: dts: meson: drop broadcom compatible from
|
||||
reference board SDIO nodes
|
||||
|
||||
Removing the Broadcom compatible from the SDIO node allows WiFi modules with QCA9377
|
||||
and Realtek WiFi chips to also probe (as SDIO supports discovery) resulting in wider
|
||||
compatibility with boards/boxes that follow the Amlogic reference designs.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts | 3 +--
|
||||
6 files changed, 6 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
||||
index e803a466fe4e..5f24e83925a8 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
||||
@@ -178,9 +178,8 @@ &sd_emmc_a {
|
||||
vmmc-supply = <&vddao_3v3>;
|
||||
vqmmc-supply = <&vddio_boot>;
|
||||
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
|
||||
index c1470416faad..7dffeb5931c9 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
|
||||
@@ -102,8 +102,7 @@ hdmi_tx_tmds_out: endpoint {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
|
||||
index 92c425d0259c..ff9145d49090 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
|
||||
@@ -21,8 +21,7 @@ ðmac {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
index 6eec4e81592b..fb967f25cecc 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
@@ -138,9 +138,8 @@ &sd_emmc_a {
|
||||
vmmc-supply = <&vddao_3v3>;
|
||||
vqmmc-supply = <&vddio_boot>;
|
||||
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
|
||||
index d4858afa0e9c..feb31207773f 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
|
||||
@@ -72,8 +72,7 @@ external_phy: ethernet-phy@0 {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
|
||||
index d02b80d77378..6c8bec1853ac 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
|
||||
@@ -21,8 +21,7 @@ ðmac {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 46a35ec2a76dbbeff597e177e362a2ad624ed5c3 Mon Sep 17 00:00:00 2001
|
||||
From 3be8ecaac4c22b8cd5d834ed43135a958111bf9b Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 14 Feb 2023 08:28:00 +0000
|
||||
Subject: [PATCH 40/41] WIP: arm64: dts: meson: p23x-q20x: fix usb init - don't
|
||||
Subject: [PATCH 47/64] WIP: arm64: dts: meson: p23x-q20x: fix usb init - don't
|
||||
force otg
|
||||
|
||||
Forcing OTG in the p23x-q20x dtsi causes USB problems on multiple boards:
|
@ -1,7 +1,7 @@
|
||||
From 070f58b39370084cd65b5c0f50333dd01ed2ea33 Mon Sep 17 00:00:00 2001
|
||||
From f9f4b1667c1343b6544e98f80268583a3579458a Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 7 Mar 2023 13:17:16 +0000
|
||||
Subject: [PATCH 41/41] WIP: arm64: dts: meson: add WiFi/BT support to BananaPi
|
||||
Subject: [PATCH 48/64] WIP: arm64: dts: meson: add WiFi/BT support to BananaPi
|
||||
M5
|
||||
|
||||
The BPI-M5 has an optional RTL8822CS WiFi/BT mezzanine board. Describe
|
@ -0,0 +1,30 @@
|
||||
From ac4472cdd67f2d161991c7a386e6b06115e45bb7 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 5 Apr 2021 13:48:34 +0000
|
||||
Subject: [PATCH 49/64] WIP: dt-bindings: arm: amlogic: add support for
|
||||
Dreambox One/Two
|
||||
|
||||
The Dreambox One and Dreambox Two are DVBS/T2 receiver boxes based
|
||||
on the Amlogic W400 reference board with an S922X chip.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
Documentation/devicetree/bindings/arm/amlogic.yaml | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
index 2154a4614fda..112f4c17e219 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
@@ -176,6 +176,8 @@ properties:
|
||||
- azw,gtking
|
||||
- azw,gtking-pro
|
||||
- bananapi,bpi-m2s
|
||||
+ - dream,dreambox-one
|
||||
+ - dream,dreambox-two
|
||||
- hardkernel,odroid-go-ultra
|
||||
- hardkernel,odroid-n2
|
||||
- hardkernel,odroid-n2l
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,272 @@
|
||||
From f8ed5f43c6bc2cfcb5b9d6bb4ebfca2b9bbde896 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 5 Apr 2021 13:51:20 +0000
|
||||
Subject: [PATCH 50/64] WIP: arm64: dts: meson: add initial device-trees for
|
||||
Dreambox One/Two
|
||||
|
||||
Dreambox One and Dreambox Two are based on the Amlogic W400 reference
|
||||
board with an S922X chip and the following specs:
|
||||
|
||||
- 2GB DDR3 RAM
|
||||
- 16GB eMMC
|
||||
- 10/100/1000 Base-T Ethernet
|
||||
- AP6356 Wireless (802.11 b/g/n/ac, BT 5.0)
|
||||
- HDMI 2.1 video
|
||||
- S/PDIF optical output
|
||||
- 2x DVB-S2/T2
|
||||
- Smartcard Reader Slot
|
||||
- 2x USB 2.0 port (1x micro-USB for service)
|
||||
- 1x USB 3.0 port
|
||||
- IR receiver
|
||||
- 1x Power LED (blue)
|
||||
- 1x Power button (top)
|
||||
- 1x Update/Reset button (underside)
|
||||
- 1x micro SD card slot
|
||||
|
||||
Dreambox Two differences:
|
||||
|
||||
- 3" Colour LCD display (MIPI-DSI)
|
||||
- Common Interface Slot
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/Makefile | 2 +
|
||||
.../dts/amlogic/meson-g12b-dreambox-one.dts | 17 ++
|
||||
.../dts/amlogic/meson-g12b-dreambox-two.dts | 20 +++
|
||||
.../boot/dts/amlogic/meson-g12b-dreambox.dtsi | 160 ++++++++++++++++++
|
||||
4 files changed, 199 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
index cc8b34bd583d..edb22c57f11d 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
@@ -15,6 +15,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-dreambox-one.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-dreambox-two.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts
|
||||
new file mode 100644
|
||||
index 000000000000..ecfa1c683dde
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts
|
||||
@@ -0,0 +1,17 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12b-dreambox.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "dream,dreambox-one", "amlogic,s922x", "amlogic,g12b";
|
||||
+ model = "Dreambox One";
|
||||
+};
|
||||
+
|
||||
+&sd_emmc_a {
|
||||
+ sd-uhs-sdr12;
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts
|
||||
new file mode 100644
|
||||
index 000000000000..df0d71983c3d
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts
|
||||
@@ -0,0 +1,20 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12b-dreambox.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "dream,dreambox-two", "amlogic,s922x", "amlogic,g12b";
|
||||
+ model = "Dreambox Two";
|
||||
+};
|
||||
+
|
||||
+&sd_emmc_a {
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
|
||||
new file mode 100644
|
||||
index 000000000000..a76045fd739c
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
|
||||
@@ -0,0 +1,160 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2021 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-g12b-w400.dtsi"
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
+
|
||||
+/ {
|
||||
+ cvbs-connector {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOA_11 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ spdif_dit: audio-codec-1 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "linux,spdif-dit";
|
||||
+ status = "okay";
|
||||
+ sound-name-prefix = "DIT";
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,axg-sound-card";
|
||||
+ model = "DREAMBOX";
|
||||
+ audio-aux-devs = <&tdmout_b>;
|
||||
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
+ <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&frddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&frddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&frddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif hdmi or toslink interface */
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&spdifout_a>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&spdif_dit>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif hdmi interface */
|
||||
+ dai-link-5 {
|
||||
+ sound-dai = <&spdifout_b>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* hdmi glue */
|
||||
+ dai-link-6 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&arb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ linux,rc-map-name = "rc-dreambox";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vddao_1v8>;
|
||||
+};
|
||||
+
|
||||
+&spdifout_a {
|
||||
+ pinctrl-0 = <&spdif_out_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spdifout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,28 @@
|
||||
From 89c283b20308f3e8a3387d0d5427392df01511c8 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 09:59:58 +0000
|
||||
Subject: [PATCH 51/64] WIP: dt-bindings: arm: amlogic: add support for Tanix
|
||||
TX9 Pro
|
||||
|
||||
The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
index 112f4c17e219..40cb96161f9d 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
@@ -126,6 +126,7 @@ properties:
|
||||
- libretech,aml-s912-pc
|
||||
- minix,neo-u9h
|
||||
- nexbox,a1
|
||||
+ - oranth,tx9-pro
|
||||
- tronsmart,vega-s96
|
||||
- videostrong,gxm-kiii-pro
|
||||
- wetek,core2
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,139 @@
|
||||
From d7927812537ff2e8bc44d762923b525f9c4717fc Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 10:01:14 +0000
|
||||
Subject: [PATCH 52/64] WIP: arm64: dts: meson: add initial device-tree for
|
||||
Tanix TX9 Pro
|
||||
|
||||
Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with
|
||||
an S912 chip and the following specs:
|
||||
|
||||
- 3GB DDR3 RAM
|
||||
- 32GB eMMC
|
||||
- 10/100/1000 Base-T Ethernet
|
||||
- AP6356 Wireless (802.11 b/g/n/ac, BT 5.0)
|
||||
- HDMI 2.0a video
|
||||
- VFD for clock/status
|
||||
- 2x USB 2.0 ports
|
||||
- IR receiver
|
||||
- 1x Power LED (white)
|
||||
- 1x Update/Reset button (underside)
|
||||
- 1x micro SD card slot
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/Makefile | 1 +
|
||||
.../boot/dts/amlogic/meson-gxm-tx9-pro.dts | 90 +++++++++++++++++++
|
||||
2 files changed, 91 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
index edb22c57f11d..35f760e3c9df 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
@@ -67,6 +67,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-tx9-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
|
||||
new file mode 100644
|
||||
index 000000000000..9a62176cfe5a
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
|
||||
@@ -0,0 +1,90 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 Endless Computers, Inc.
|
||||
+ * Author: Carlo Caione <carlo@endlessm.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxm.dtsi"
|
||||
+#include "meson-gx-p23x-q20x.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
|
||||
+ model = "Tanix TX9 Pro";
|
||||
+
|
||||
+ adc-keys {
|
||||
+ compatible = "adc-keys";
|
||||
+ io-channels = <&saradc 0>;
|
||||
+ io-channel-names = "buttons";
|
||||
+ keyup-threshold-microvolt = <1710000>;
|
||||
+
|
||||
+ button-function {
|
||||
+ label = "Update";
|
||||
+ linux,code = <KEY_VENDOR>;
|
||||
+ press-threshold-microvolt = <10000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys-polled {
|
||||
+ compatible = "gpio-keys-polled";
|
||||
+ poll-interval = <100>;
|
||||
+
|
||||
+ button {
|
||||
+ label = "power";
|
||||
+ linux,code = <KEY_POWER>;
|
||||
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ pinctrl-0 = <ð_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ phy-handle = <&external_phy>;
|
||||
+ amlogic,tx-delay-ns = <2>;
|
||||
+ phy-mode = "rgmii";
|
||||
+};
|
||||
+
|
||||
+&external_mdio {
|
||||
+ external_phy: ethernet-phy@0 {
|
||||
+ /* Realtek RTL8211F (0x001cc916) */
|
||||
+ reg = <0>;
|
||||
+ max-speed = <1000>;
|
||||
+
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <80000>;
|
||||
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio_intc>;
|
||||
+ /* MAC_INTR on GPIOZ_15 */
|
||||
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ linux,rc-map-name = "rc-tanix-tx3mini";
|
||||
+};
|
||||
+
|
||||
+&sd_emmc_a {
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ max-speed = <2000000>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "lpo";
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,93 @@
|
||||
From c25019a4df4553853883bdeba2cd3f0ffaea8a5d Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 10:11:39 +0000
|
||||
Subject: [PATCH 53/64] WIP: arm64: dts: meson: add 7-segment display to Tanix
|
||||
TX9 Pro
|
||||
|
||||
Add support for the 7-segment VFD display of the device
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-gxm-tx9-pro.dts | 59 +++++++++++++++++++
|
||||
1 file changed, 59 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
|
||||
index 9a62176cfe5a..2dcff00794b9 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts
|
||||
@@ -9,6 +9,7 @@
|
||||
#include "meson-gxm.dtsi"
|
||||
#include "meson-gx-p23x-q20x.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm";
|
||||
@@ -37,6 +38,64 @@ button {
|
||||
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ spi {
|
||||
+ compatible = "spi-gpio";
|
||||
+ sck-gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
|
||||
+ mosi-gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
|
||||
+ cs-gpios = <&gpio GPIODV_4 GPIO_ACTIVE_LOW>;
|
||||
+ num-chipselects = <1>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ tm1628: led-controller@0 {
|
||||
+ compatible = "titanmec,tm1628";
|
||||
+ reg = <0>;
|
||||
+ spi-3wire;
|
||||
+ spi-lsb-first;
|
||||
+ spi-rx-delay-us = <1>;
|
||||
+ spi-max-frequency = <500000>;
|
||||
+ #address-cells = <2>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ titanmec,segment-mapping = /bits/ 8 <4 5 6 1 2 3 7>;
|
||||
+ titanmec,grid = /bits/ 8 <4 3 2 1>;
|
||||
+
|
||||
+ alarm@5,1 {
|
||||
+ reg = <5 1>;
|
||||
+ function = LED_FUNCTION_ALARM;
|
||||
+ };
|
||||
+
|
||||
+ usb@5,2 {
|
||||
+ reg = <5 2>;
|
||||
+ function = LED_FUNCTION_USB;
|
||||
+ };
|
||||
+ play@5,3 {
|
||||
+ reg = <5 3>;
|
||||
+ function = "play";
|
||||
+ };
|
||||
+
|
||||
+ pause@5,4 {
|
||||
+ reg = <5 4>;
|
||||
+ function = "pause";
|
||||
+ };
|
||||
+
|
||||
+ colon@5,5 {
|
||||
+ reg = <5 5>;
|
||||
+ function = "colon";
|
||||
+ };
|
||||
+
|
||||
+ lan@5,6 {
|
||||
+ reg = <5 6>;
|
||||
+ function = LED_FUNCTION_LAN;
|
||||
+ };
|
||||
+
|
||||
+ wlan@5,7 {
|
||||
+ reg = <5 7>;
|
||||
+ function = LED_FUNCTION_WLAN;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
ðmac {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,467 @@
|
||||
From 8a909c5fd193cd2750954a0ec174a95a8bb5a279 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 13 Dec 2023 05:35:46 +0000
|
||||
Subject: [PATCH 54/64] WIP: arm64: dts: meson: add support for
|
||||
odroidc2-hifishield
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/Makefile | 3 +
|
||||
.../meson-gxbb-odroidc2-hifishield.dts | 434 ++++++++++++++++++
|
||||
2 files changed, 437 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
index 35f760e3c9df..33a8430a33b8 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
@@ -83,3 +83,6 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-gbit.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
|
||||
+
|
||||
+# place experimental dtb/dtbo below here:
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
|
||||
new file mode 100644
|
||||
index 000000000000..466d3d112b38
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
|
||||
@@ -0,0 +1,434 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 Andreas Färber
|
||||
+ * Copyright (c) 2016 BayLibre, Inc.
|
||||
+ * Author: Kevin Hilman <khilman@kernel.org>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxbb.dtsi"
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/sound/meson-aiu.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
|
||||
+ model = "Hardkernel ODROID-C2";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ ethernet0 = ðmac;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>;
|
||||
+ };
|
||||
+
|
||||
+ spdif_dit: audio-codec-0 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "linux,spdif-dit";
|
||||
+ status = "okay";
|
||||
+ sound-name-prefix = "DIT";
|
||||
+ };
|
||||
+
|
||||
+ usb_otg_pwr: regulator-usb-pwrs {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "USB_OTG_PWR";
|
||||
+
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ /*
|
||||
+ * signal name from schematics: PWREN
|
||||
+ */
|
||||
+ gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ /*
|
||||
+ * signal name from schematics: USB_POWER
|
||||
+ */
|
||||
+ vin-supply = <&p5v0>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ led-blue {
|
||||
+ label = "c2:blue:alive";
|
||||
+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ p5v0: regulator-p5v0 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "P5V0";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ hdmi_p5v0: regulator-hdmi_p5v0 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "HDMI_P5V0";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ /* AP2331SA-7 */
|
||||
+ vin-supply = <&p5v0>;
|
||||
+ };
|
||||
+
|
||||
+ tflash_vdd: regulator-tflash_vdd {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "TFLASH_VDD";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ /*
|
||||
+ * signal name from schematics: TFLASH_VDD_EN
|
||||
+ */
|
||||
+ gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ /* U16 RT9179GB */
|
||||
+ vin-supply = <&vddio_ao3v3>;
|
||||
+ };
|
||||
+
|
||||
+ tf_io: gpio-regulator-tf_io {
|
||||
+ compatible = "regulator-gpio";
|
||||
+
|
||||
+ regulator-name = "TF_IO";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ /*
|
||||
+ * signal name from schematics: TF_3V3N_1V8_EN
|
||||
+ */
|
||||
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
|
||||
+ gpios-states = <0>;
|
||||
+
|
||||
+ states = <3300000 0>,
|
||||
+ <1800000 1>;
|
||||
+ /* U12/U13 RT9179GB */
|
||||
+ vin-supply = <&vddio_ao3v3>;
|
||||
+ };
|
||||
+
|
||||
+ vcc1v8: regulator-vcc1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ /* U18 RT9179GB */
|
||||
+ vin-supply = <&vddio_ao3v3>;
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3: regulator-vcc3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vddio_ao1v8: regulator-vddio-ao1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_AO1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ /* U17 RT9179GB */
|
||||
+ vin-supply = <&p5v0>;
|
||||
+ };
|
||||
+
|
||||
+ vddio_ao3v3: regulator-vddio-ao3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_AO3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ /* U11 MP2161GJ-C499 */
|
||||
+ vin-supply = <&p5v0>;
|
||||
+ };
|
||||
+
|
||||
+ ddr3_1v5: regulator-ddr3_1v5 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "DDR3_1V5";
|
||||
+ regulator-min-microvolt = <1500000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-always-on;
|
||||
+ /* U15 MP2161GJ-C499 */
|
||||
+ vin-supply = <&p5v0>;
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,gx-sound-card";
|
||||
+ model = "ODROID-C2";
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>,
|
||||
+ <&clkc CLKID_MPLL2>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&spdif_dit>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&spdif_out_ao_6_pins &i2s_am_clk_pins &i2s_out_ao_clk_pins &i2s_out_lr_clk_pins &i2s_out_ch01_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&ao_cec_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <ð_rgmii_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ phy-handle = <ð_phy0>;
|
||||
+ phy-mode = "rgmii";
|
||||
+
|
||||
+ amlogic,tx-delay-ns = <2>;
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ eth_phy0: ethernet-phy@0 {
|
||||
+ /* Realtek RTL8211F (0x001cc916) */
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <80000>;
|
||||
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio_intc>;
|
||||
+ /* MAC_INTR on GPIOZ_15 */
|
||||
+ interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-supply = <&hdmi_p5v0>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&i2c_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ linux,rc-map-name = "rc-odroid";
|
||||
+};
|
||||
+
|
||||
+&gpio_ao {
|
||||
+ gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
|
||||
+ "USB HUB nRESET", "USB OTG Power En",
|
||||
+ "SPDIF_OUTPUT", "IR In", "I2S_MCLK",
|
||||
+ "I2S_SCLK", "I2S_LRCLK", "I2S_DATA_OUTPUT",
|
||||
+ "HDMI CEC", "SYS LED",
|
||||
+ /* GPIO_TEST_N */
|
||||
+ "";
|
||||
+};
|
||||
+
|
||||
+&gpio {
|
||||
+ gpio-line-names = /* Bank GPIOZ */
|
||||
+ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
|
||||
+ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
|
||||
+ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
|
||||
+ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
|
||||
+ "Eth PHY nRESET", "Eth PHY Intc",
|
||||
+ /* Bank GPIOH */
|
||||
+ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
|
||||
+ /* Bank BOOT */
|
||||
+ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
|
||||
+ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
|
||||
+ "eMMC Reset", "eMMC CMD",
|
||||
+ "", "", "", "", "", "", "",
|
||||
+ /* Bank CARD */
|
||||
+ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
|
||||
+ "SDCard D3", "SDCard D2", "SDCard Det",
|
||||
+ /* Bank GPIODV */
|
||||
+ "", "", "", "", "", "", "", "", "", "", "", "", "",
|
||||
+ "", "", "", "", "", "", "", "", "", "", "",
|
||||
+ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
|
||||
+ "PWM D", "PWM B",
|
||||
+ /* Bank GPIOY */
|
||||
+ "Revision Bit0", "Revision Bit1", "",
|
||||
+ "J2 Header Pin35", "", "", "", "J2 Header Pin36",
|
||||
+ "J2 Header Pin31", "", "", "", "TF VDD En",
|
||||
+ "J2 Header Pin32", "J2 Header Pin26", "", "",
|
||||
+ /* Bank GPIOX */
|
||||
+ "J2 Header Pin29", "J2 Header Pin24",
|
||||
+ "J2 Header Pin23", "J2 Header Pin22",
|
||||
+ "J2 Header Pin21", "J2 Header Pin18",
|
||||
+ "J2 Header Pin33", "J2 Header Pin19",
|
||||
+ "J2 Header Pin16", "J2 Header Pin15",
|
||||
+ "J2 Header Pin12", "J2 Header Pin13",
|
||||
+ "J2 Header Pin8", "J2 Header Pin10",
|
||||
+ "", "", "", "", "",
|
||||
+ "J2 Header Pin11", "", "J2 Header Pin7", "",
|
||||
+ /* Bank GPIOCLK */
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vcc1v8>;
|
||||
+};
|
||||
+
|
||||
+&scpi_clocks {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+/* SD */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-ddr50;
|
||||
+ max-frequency = <100000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ vmmc-supply = <&tflash_vdd>;
|
||||
+ vqmmc-supply = <&tf_io>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc3v3>;
|
||||
+ vqmmc-supply = <&vcc1v8>;
|
||||
+};
|
||||
+
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb0_phy {
|
||||
+ status = "disabled";
|
||||
+ phy-supply = <&usb_otg_pwr>;
|
||||
+};
|
||||
+
|
||||
+&usb1_phy {
|
||||
+ status = "okay";
|
||||
+ phy-supply = <&usb_otg_pwr>;
|
||||
+};
|
||||
+
|
||||
+&usb0 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&usb1 {
|
||||
+ dr_mode = "host";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ hub@1 {
|
||||
+ /* Genesys Logic GL852G USB 2.0 hub */
|
||||
+ compatible = "usb5e3,610";
|
||||
+ reg = <1>;
|
||||
+ vdd-supply = <&p5v0>;
|
||||
+ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,36 @@
|
||||
From 10eff8ca7236d75c1aecc427675865d17d421e3f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 1 Jan 2024 06:15:40 +0000
|
||||
Subject: [PATCH 55/64] WIP: arm64: dts: meson: increase SD speeds on Minix Neo
|
||||
U9-H
|
||||
|
||||
Lets see what happens/breaks when all the fancy modes are added
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
|
||||
index b929682805dd..c3fb523fd18e 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
|
||||
@@ -106,6 +106,15 @@ brcmf: wifi@1 {
|
||||
};
|
||||
};
|
||||
|
||||
+&sd_emmc_b {
|
||||
+ /* experimental */
|
||||
+ sd-uhs-sdr12;
|
||||
+ sd-uhs-sdr25;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
+ max-frequency = <200000000>;
|
||||
+};
|
||||
+
|
||||
&uart_A {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,39 @@
|
||||
From 3c5bbd567ecaafcf4f2294f0eb5ed84c728a24e1 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 1 Jan 2024 07:13:19 +0000
|
||||
Subject: [PATCH 56/64] WIP: dt-bindings: arm: amlogic: add S905L and p261/p271
|
||||
boards
|
||||
|
||||
Add bindings for the Amlogic S905L SoC and P261/P271 reference design boards. Similar
|
||||
to P281/S905W the boards are derived from P212 (S905X) but with silicon differences:
|
||||
|
||||
- P271 omits VP9 support and uses Mali 450-MP3
|
||||
- P261 omits VP9 support and uses Mali 450-MP2
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
Documentation/devicetree/bindings/arm/amlogic.yaml | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
index 40cb96161f9d..77e41410a966 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
@@ -81,6 +81,14 @@ properties:
|
||||
- const: amlogic,s805x
|
||||
- const: amlogic,meson-gxl
|
||||
|
||||
+ - description: Boards with the Amlogic Meson GXL S905L SoC
|
||||
+ items:
|
||||
+ - enum:
|
||||
+ - amlogic,p261
|
||||
+ - amlogic,p271
|
||||
+ - const: amlogic,s905l
|
||||
+ - const: amlogic,meson-gxl
|
||||
+
|
||||
- description: Boards with the Amlogic Meson GXL S905W SoC
|
||||
items:
|
||||
- enum:
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,30 @@
|
||||
From 884ee605e1eda41440cbac34267e04d5b6d5c741 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 1 Jan 2024 07:48:39 +0000
|
||||
Subject: [PATCH 57/64] WIP: soc: amlogic: meson-gx-socinfo: Add S905L ID
|
||||
|
||||
Add the S905L SoC id observed in several P261 boards (before/after):
|
||||
|
||||
soc soc0: Amlogic Meson GXLX (Unknown) Revision 26:a (c1:2) Detected
|
||||
soc soc0: Amlogic Meson GXLX (S905L) Revision 26:a (c1:2) Detected
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/soc/amlogic/meson-gx-socinfo.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c
|
||||
index 6abb730344ab..30a2e56e981b 100644
|
||||
--- a/drivers/soc/amlogic/meson-gx-socinfo.c
|
||||
+++ b/drivers/soc/amlogic/meson-gx-socinfo.c
|
||||
@@ -64,6 +64,7 @@ static const struct meson_gx_package_id {
|
||||
{ "962E", 0x24, 0x20, 0xf0 },
|
||||
{ "A113X", 0x25, 0x37, 0xff },
|
||||
{ "A113D", 0x25, 0x22, 0xff },
|
||||
+ { "S905L", 0x26, 0xc1, 0xc0 },
|
||||
{ "S905D2", 0x28, 0x10, 0xf0 },
|
||||
{ "S905Y2", 0x28, 0x30, 0xf0 },
|
||||
{ "S905X2", 0x28, 0x40, 0xf0 },
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,28 @@
|
||||
From fd09fef84e3db5e1b835a17cd95bca16e641390c Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 2 Jan 2024 12:21:18 +0000
|
||||
Subject: [PATCH 58/64] WIP: dt-bindings: iio: adc: amlogic,meson-saradc: add
|
||||
meson-saradc-gxlx
|
||||
|
||||
Add meson-saradc-gxlx to the list of enums.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
|
||||
index 7e8328e9ce13..b2fef72267b4 100644
|
||||
--- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
|
||||
+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
|
||||
@@ -23,6 +23,7 @@ properties:
|
||||
- amlogic,meson8m2-saradc
|
||||
- amlogic,meson-gxbb-saradc
|
||||
- amlogic,meson-gxl-saradc
|
||||
+ - amlogic,meson-gxlx-saradc
|
||||
- amlogic,meson-gxm-saradc
|
||||
- amlogic,meson-axg-saradc
|
||||
- amlogic,meson-g12a-saradc
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,86 @@
|
||||
From 3c895b6a1fcb03cbb6f13349e8a8e71ecb24246f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 2 Jan 2024 11:40:54 +0000
|
||||
Subject: [PATCH 59/64] WIP: iio: adc: meson: add meson-saradc-gxlx
|
||||
|
||||
Add support for meson-saradc-gxlx derived from meson-saradc-gxl but with an additional
|
||||
magic register defined (MESON_SAR_ADC_REG12) which is needed for audio to work on GXLX
|
||||
boards. The magic value was obtained from the vendor kernel [0].
|
||||
|
||||
[0] https://github.com/khadas/linux/commit/d1d98f2ed8c83eb42af8880ed8e206aa402dd70a
|
||||
|
||||
Suggested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/iio/adc/meson_saradc.c | 27 +++++++++++++++++++++++++++
|
||||
1 file changed, 27 insertions(+)
|
||||
|
||||
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
|
||||
index 13b473d8c6c7..a43e7b917a30 100644
|
||||
--- a/drivers/iio/adc/meson_saradc.c
|
||||
+++ b/drivers/iio/adc/meson_saradc.c
|
||||
@@ -323,6 +323,7 @@ struct meson_sar_adc_param {
|
||||
unsigned int temperature_divider;
|
||||
u8 disable_ring_counter;
|
||||
bool has_reg11;
|
||||
+ bool has_reg12;
|
||||
bool has_vref_select;
|
||||
u8 vref_select;
|
||||
u8 cmv_select;
|
||||
@@ -1241,6 +1242,19 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
.cmv_select = 1,
|
||||
};
|
||||
|
||||
+static const struct meson_sar_adc_param meson_sar_adc_gxlx_param = {
|
||||
+ .has_bl30_integration = true,
|
||||
+ .clock_rate = 1200000,
|
||||
+ .bandgap_reg = MESON_SAR_ADC_REG11,
|
||||
+ .regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
+ .resolution = 12,
|
||||
+ .disable_ring_counter = 1,
|
||||
+ .has_reg11 = true,
|
||||
+ .has_reg12 = true,
|
||||
+ .vref_volatge = 1,
|
||||
+ .cmv_select = 1,
|
||||
+};
|
||||
+
|
||||
static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
.has_bl30_integration = true,
|
||||
.clock_rate = 1200000,
|
||||
@@ -1293,6 +1307,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
|
||||
.name = "meson-gxl-saradc",
|
||||
};
|
||||
|
||||
+static const struct meson_sar_adc_data meson_sar_adc_gxlx_data = {
|
||||
+ .param = &meson_sar_adc_gxlx_param,
|
||||
+ .name = "meson-gxlx-saradc",
|
||||
+};
|
||||
+
|
||||
static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
|
||||
.param = &meson_sar_adc_gxl_param,
|
||||
.name = "meson-gxm-saradc",
|
||||
@@ -1324,6 +1343,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
|
||||
}, {
|
||||
.compatible = "amlogic,meson-gxl-saradc",
|
||||
.data = &meson_sar_adc_gxl_data,
|
||||
+ }, {
|
||||
+ .compatible = "amlogic,meson-gxlx-saradc",
|
||||
+ .data = &meson_sar_adc_gxl_data,
|
||||
}, {
|
||||
.compatible = "amlogic,meson-gxm-saradc",
|
||||
.data = &meson_sar_adc_gxm_data,
|
||||
@@ -1447,6 +1469,11 @@ static int meson_sar_adc_probe(struct platform_device *pdev)
|
||||
goto err_hw;
|
||||
}
|
||||
|
||||
+ if (priv->param->has_reg12) {
|
||||
+ /* MESON_SAR_ADC_REG12 poke for audio on GXLX */
|
||||
+ regmap_write(priv->regmap, 0x30, 0x3);
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
|
||||
err_hw:
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,129 @@
|
||||
From 4ecc1452c707369da8582a118b31bc6d7453c8ea Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 1 Jan 2024 07:40:15 +0000
|
||||
Subject: [PATCH 60/64] WIP: arm64: dts: meson: add p261/p271 support
|
||||
|
||||
Add device-trees for Amlogic P261/P271 (S905L) reference design boards. Similar to the
|
||||
P281 (S905W) the boards are derived from P212 (S905X) but with silicon differences:
|
||||
|
||||
- P271 omits VP9 support and uses Mali 450-MP3
|
||||
- P261 omits VP9 support and uses Mali 450-MP2
|
||||
|
||||
P271 boards have an S905L SoC with "B-3" or "3" marking. P261 boards have an S905L SoC
|
||||
with "B-2" or "2" marking. The B is believed to denote a chip with DTS license and the
|
||||
number is believed to reference the Mali 450 core(s) spec. The MP2 variant is referred
|
||||
to as "S905C" in some Amlogic marketing presos and vendor code, and "S905L2" on chip
|
||||
distributor stock lists.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/Makefile | 2 +
|
||||
.../boot/dts/amlogic/meson-gxl-s905l-p261.dts | 47 +++++++++++++++++++
|
||||
.../boot/dts/amlogic/meson-gxl-s905l-p271.dts | 31 ++++++++++++
|
||||
3 files changed, 80 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
index 33a8430a33b8..b2f07ba0b342 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
@@ -86,3 +86,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
|
||||
|
||||
# place experimental dtb/dtbo below here:
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p261.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p271.dtb
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts
|
||||
new file mode 100644
|
||||
index 000000000000..b10a10277e0b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p261.dts
|
||||
@@ -0,0 +1,47 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2024 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxl-s905x.dtsi"
|
||||
+#include "meson-gx-p23x-q20x.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "amlogic,p261", "amlogic,s905l", "amlogic,meson-gxl";
|
||||
+ model = "Amlogic Meson GXLX (S905L) P261 Development Board";
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ model = "P261";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&apb {
|
||||
+ mali: gpu@c0000 {
|
||||
+ /* Mali 450-MP2 */
|
||||
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "gp", "gpmmu", "pp", "pmu",
|
||||
+ "pp0", "ppmmu0", "pp1", "ppmmu1";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
|
||||
new file mode 100644
|
||||
index 000000000000..91dac8fc0951
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts
|
||||
@@ -0,0 +1,31 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2024 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxl-s905x.dtsi"
|
||||
+#include "meson-gx-p23x-q20x.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "amlogic,p271", "amlogic,s905l", "amlogic,meson-gxl";
|
||||
+ model = "Amlogic Meson GXLX (S905L) P271 Development Board";
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ model = "P271";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,27 @@
|
||||
From 62f76cf72b0a8496ae63f68318016e6d65d9fb23 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 9 Apr 2022 06:27:50 +0000
|
||||
Subject: [PATCH 61/64] WIP: dt-bindings: arm: amlogic: add Venz V10
|
||||
|
||||
Add the Venz V10 (S905L) board.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
index 77e41410a966..adda90bd54e3 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
|
||||
@@ -86,6 +86,7 @@ properties:
|
||||
- enum:
|
||||
- amlogic,p261
|
||||
- amlogic,p271
|
||||
+ - venz,v10
|
||||
- const: amlogic,s905l
|
||||
- const: amlogic,meson-gxl
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,154 @@
|
||||
From 6d36a3f7a18eeb746c6e73f1c18a18a30ffc627e Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sun, 10 Apr 2022 11:51:38 +0000
|
||||
Subject: [PATCH 62/64] WIP: media: rc: add keymap for Venz V10 remote
|
||||
|
||||
Add a keymap and bindings for the IR (NEC) remote used with
|
||||
the Venz V10 Android STB device.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../devicetree/bindings/media/rc.yaml | 1 +
|
||||
drivers/media/rc/keymaps/Makefile | 1 +
|
||||
drivers/media/rc/keymaps/rc-venz-v10.c | 92 +++++++++++++++++++
|
||||
include/media/rc-map.h | 1 +
|
||||
4 files changed, 95 insertions(+)
|
||||
create mode 100644 drivers/media/rc/keymaps/rc-venz-v10.c
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml
|
||||
index 7bbe580c80f7..1cb227e38d28 100644
|
||||
--- a/Documentation/devicetree/bindings/media/rc.yaml
|
||||
+++ b/Documentation/devicetree/bindings/media/rc.yaml
|
||||
@@ -151,6 +151,7 @@ properties:
|
||||
- rc-videomate-tv-pvr
|
||||
- rc-videostrong-kii-pro
|
||||
- rc-vega-s9x
|
||||
+ - rc-venz-v10
|
||||
- rc-wetek-hub
|
||||
- rc-wetek-play2
|
||||
- rc-winfast
|
||||
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
|
||||
index f19558fdab0c..436999e6053a 100644
|
||||
--- a/drivers/media/rc/keymaps/Makefile
|
||||
+++ b/drivers/media/rc/keymaps/Makefile
|
||||
@@ -127,6 +127,7 @@ obj-$(CONFIG_RC_MAP) += \
|
||||
rc-twinhan1027.o \
|
||||
rc-twinhan-dtv-cab-ci.o \
|
||||
rc-vega-s9x.o \
|
||||
+ rc-venz-v10.o \
|
||||
rc-videomate-m1f.o \
|
||||
rc-videomate-s350.o \
|
||||
rc-videomate-tv-pvr.o \
|
||||
diff --git a/drivers/media/rc/keymaps/rc-venz-v10.c b/drivers/media/rc/keymaps/rc-venz-v10.c
|
||||
new file mode 100644
|
||||
index 000000000000..f0a99a31a1d7
|
||||
--- /dev/null
|
||||
+++ b/drivers/media/rc/keymaps/rc-venz-v10.c
|
||||
@@ -0,0 +1,92 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+//
|
||||
+// Copyright (C) 2022 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+
|
||||
+#include <media/rc-map.h>
|
||||
+#include <linux/module.h>
|
||||
+
|
||||
+//
|
||||
+// Keytable for the Venz V10 remote control
|
||||
+//
|
||||
+
|
||||
+static struct rc_map_table venz_v10[] = {
|
||||
+ { 0x847912, KEY_POWER },
|
||||
+ { 0x847903, KEY_MUTE },
|
||||
+
|
||||
+ { 0x847921, KEY_EPG },
|
||||
+ { 0x847922, KEY_ZOOMIN },
|
||||
+ { 0x847923, KEY_ZOOMOUT },
|
||||
+ { 0x847924, KEY_SCREEN }, // LAUNCHER
|
||||
+
|
||||
+ // UP
|
||||
+ // DOWN
|
||||
+ // LEFT
|
||||
+ // RIGHT
|
||||
+
|
||||
+ { 0x847904, KEY_FAVORITES }, // TV-SYS
|
||||
+ { 0x84790a, KEY_INFO }, // RATIO
|
||||
+ { 0x84791f, KEY_LANGUAGE }, // TRACK
|
||||
+ { 0x84791e, KEY_SUBTITLE }, // SUB-T
|
||||
+
|
||||
+ { 0x847929, KEY_RED },
|
||||
+ { 0x847930, KEY_GREEN },
|
||||
+ { 0x847931, KEY_YELLOW },
|
||||
+ { 0x847932, KEY_BLUE },
|
||||
+
|
||||
+ { 0x847906, KEY_HOME },
|
||||
+ { 0x84791b, KEY_CONFIG },
|
||||
+
|
||||
+ { 0x847905, KEY_UP },
|
||||
+ { 0x847907, KEY_LEFT },
|
||||
+ { 0x847908, KEY_OK },
|
||||
+ { 0x847909, KEY_RIGHT },
|
||||
+ { 0x847900, KEY_DOWN },
|
||||
+
|
||||
+ { 0x847920, KEY_CONTEXT_MENU },
|
||||
+ { 0x84791a, KEY_BACK },
|
||||
+
|
||||
+ { 0x847910, KEY_VOLUMEUP },
|
||||
+ { 0x84790f, KEY_VOLUMEDOWN },
|
||||
+ { 0x847919, KEY_PLAYPAUSE },
|
||||
+ { 0x84791c, KEY_STOP },
|
||||
+ { 0x84791d, KEY_PREVIOUS },
|
||||
+ { 0x847928, KEY_NEXT },
|
||||
+
|
||||
+ { 0x84790b, KEY_1 },
|
||||
+ { 0x84790c, KEY_2 },
|
||||
+ { 0x84790d, KEY_3 },
|
||||
+ { 0x84790e, KEY_4 },
|
||||
+ { 0x847911, KEY_5 },
|
||||
+ { 0x847927, KEY_6 },
|
||||
+ { 0x847913, KEY_7 },
|
||||
+ { 0x847914, KEY_8 },
|
||||
+ { 0x847915, KEY_9 },
|
||||
+ { 0x847916, KEY_MENU }, // MOUSE
|
||||
+ { 0x847917, KEY_0 },
|
||||
+ { 0x847918, KEY_DELETE },
|
||||
+};
|
||||
+
|
||||
+static struct rc_map_list venz_v10_map = {
|
||||
+ .map = {
|
||||
+ .scan = venz_v10,
|
||||
+ .size = ARRAY_SIZE(venz_v10),
|
||||
+ .rc_proto = RC_PROTO_NEC,
|
||||
+ .name = RC_MAP_VENZ_V10,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static int __init init_rc_map_venz_v10(void)
|
||||
+{
|
||||
+ return rc_map_register(&venz_v10_map);
|
||||
+}
|
||||
+
|
||||
+static void __exit exit_rc_map_venz_v10(void)
|
||||
+{
|
||||
+ rc_map_unregister(&venz_v10_map);
|
||||
+}
|
||||
+
|
||||
+module_init(init_rc_map_venz_v10)
|
||||
+module_exit(exit_rc_map_venz_v10)
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("Christian Hewitt <christianshewitt@gmail.com");
|
||||
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
|
||||
index 4676545ffd8f..d4624e8232f1 100644
|
||||
--- a/include/media/rc-map.h
|
||||
+++ b/include/media/rc-map.h
|
||||
@@ -333,6 +333,7 @@ struct rc_map *rc_map_get(const char *name);
|
||||
#define RC_MAP_TT_1500 "rc-tt-1500"
|
||||
#define RC_MAP_TWINHAN_DTV_CAB_CI "rc-twinhan-dtv-cab-ci"
|
||||
#define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027"
|
||||
+#define RC_MAP_VENZ_V10 "rc-venz-v10"
|
||||
#define RC_MAP_VEGA_S9X "rc-vega-s9x"
|
||||
#define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100"
|
||||
#define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350"
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,369 @@
|
||||
From c55a7293d186c476de1d6245ae9804500157c4e8 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 9 Apr 2022 06:21:58 +0000
|
||||
Subject: [PATCH 63/64] WIP: arm64: dts: meson: add support for Venz V10
|
||||
|
||||
The Venz V10 is an Android STB based on the Amlogic P271 (GXLX)
|
||||
reference design with an S905L chip and the following specs:
|
||||
|
||||
- 1GB DDR3 RAM
|
||||
- 8GB eMMC
|
||||
- 10/100 Base-T Ethernet
|
||||
- RTL8189ES Wireless (802.11 b/g/n)
|
||||
- HDMI 2.0b video
|
||||
- 1x 3.5mm AV jack
|
||||
- 2x USB 2.0 port
|
||||
- IR receiver
|
||||
- 1x Update/Reset button (underside)
|
||||
- 1x micro SD card slot
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/Makefile | 1 +
|
||||
.../dts/amlogic/meson-gxl-s905l-venz-v10.dts | 325 ++++++++++++++++++
|
||||
2 files changed, 326 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
index b2f07ba0b342..a288f7c3c52a 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/Makefile
|
||||
+++ b/arch/arm64/boot/dts/amlogic/Makefile
|
||||
@@ -88,3 +88,4 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p261.dtb
|
||||
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p271.dtb
|
||||
+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-venz-v10.dtb
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts
|
||||
new file mode 100644
|
||||
index 000000000000..30e799e608bb
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-venz-v10.dts
|
||||
@@ -0,0 +1,325 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 Endless Computers, Inc.
|
||||
+ * Author: Carlo Caione <carlo@endlessm.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxl-s905x.dtsi"
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+#include <dt-bindings/sound/meson-aiu.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "venz,v10", "amlogic,s905l", "amlogic,meson-gxl";
|
||||
+ model = "Venz V10";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ ethernet0 = ðmac;
|
||||
+ wlan0 = &rtl8189;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>;
|
||||
+ };
|
||||
+
|
||||
+ dio2133: analog-amplifier {
|
||||
+ compatible = "simple-audio-amplifier";
|
||||
+ sound-name-prefix = "AU2";
|
||||
+ VCC-supply = <&hdmi_5v>;
|
||||
+ enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led-standby {
|
||||
+ color = <LED_COLOR_ID_BLUE>;
|
||||
+ function = LED_FUNCTION_POWER;
|
||||
+ gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "on";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ cvbs-connector {
|
||||
+ compatible = "composite-video-connector";
|
||||
+
|
||||
+ port {
|
||||
+ cvbs_connector_in: endpoint {
|
||||
+ remote-endpoint = <&cvbs_vdac_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi_5v: regulator-hdmi-5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "HDMI_5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddio_boot: regulator-vddio_boot {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_BOOT";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3: regulator-vddao_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vddio_ao18: regulator-vddio_ao18 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_AO18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-vcc_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ wifi32k: wifi32k {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,gx-sound-card";
|
||||
+ model = "VENZ-V10";
|
||||
+ audio-aux-devs = <&dio2133>;
|
||||
+ audio-widgets = "Line", "Lineout";
|
||||
+ audio-routing = "AU2 INL", "ACODEC LOLN",
|
||||
+ "AU2 INR", "ACODEC LORN",
|
||||
+ "Lineout", "AU2 OUTL",
|
||||
+ "Lineout", "AU2 OUTR";
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>,
|
||||
+ <&clkc CLKID_MPLL2>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&acodec>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&acodec {
|
||||
+ AVDD-supply = <&vddio_ao18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&ao_cec_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cvbs_vdac_port {
|
||||
+ cvbs_vdac_out: endpoint {
|
||||
+ remote-endpoint = <&cvbs_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-supply = <&hdmi_5v>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ linux,rc-map-name = "rc-venz-v10";
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
+ clock-names = "clkin0";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vddio_ao18>;
|
||||
+};
|
||||
+
|
||||
+/* Wireless SDIO Module */
|
||||
+&sd_emmc_a {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdio_pins>;
|
||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <100000000>;
|
||||
+
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
||||
+ keep-power-in-suspend;
|
||||
+
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+
|
||||
+ rtl8189: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+};
|
||||
+
|
||||
+/* This UART is brought out to the DB9 connector */
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+};
|
||||
+
|
||||
+&usb2_phy0 {
|
||||
+ /* HDMI_5V is the supply for the USB VBUS */
|
||||
+ phy-supply = <&hdmi_5v>;
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,33 @@
|
||||
From 2845d329ab30d3d9ef32bc52b46933c9d92da08c Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 5 Jan 2024 03:07:58 +0000
|
||||
Subject: [PATCH 64/64] WIP: arm64: dts: meson: fixup Minix U9-H wifi
|
||||
|
||||
I think the 'drop compatible' change conflicted so remove this too.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts | 7 -------
|
||||
1 file changed, 7 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
|
||||
index c3fb523fd18e..bed70c5c2d9c 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
|
||||
@@ -99,13 +99,6 @@ rtc: rtc@51 {
|
||||
};
|
||||
};
|
||||
|
||||
-&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
- reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
- };
|
||||
-};
|
||||
-
|
||||
&sd_emmc_b {
|
||||
/* experimental */
|
||||
sd-uhs-sdr12;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,6 +1,6 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm64 6.6.0 Kernel Configuration
|
||||
# Linux/arm64 6.7.5 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
@ -313,6 +313,7 @@ CONFIG_ARCH_MESON=y
|
||||
# CONFIG_ARCH_NXP is not set
|
||||
# CONFIG_ARCH_MA35 is not set
|
||||
# CONFIG_ARCH_NPCM is not set
|
||||
# CONFIG_ARCH_PENSANDO is not set
|
||||
# CONFIG_ARCH_QCOM is not set
|
||||
# CONFIG_ARCH_REALTEK is not set
|
||||
# CONFIG_ARCH_RENESAS is not set
|
||||
@ -371,7 +372,9 @@ CONFIG_ARM64_ERRATUM_2067961=y
|
||||
CONFIG_ARM64_ERRATUM_2441009=y
|
||||
CONFIG_ARM64_ERRATUM_2457168=y
|
||||
CONFIG_ARM64_ERRATUM_2645198=y
|
||||
CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD=y
|
||||
CONFIG_ARM64_ERRATUM_2966298=y
|
||||
CONFIG_ARM64_ERRATUM_3117295=y
|
||||
# CONFIG_CAVIUM_ERRATUM_22375 is not set
|
||||
# CONFIG_CAVIUM_ERRATUM_23154 is not set
|
||||
# CONFIG_CAVIUM_ERRATUM_27456 is not set
|
||||
@ -855,6 +858,7 @@ CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_ARCH_ENABLE_THP_MIGRATION=y
|
||||
CONFIG_CONTIG_ALLOC=y
|
||||
CONFIG_PCP_BATCH_SCALE_MAX=5
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
# CONFIG_KSM is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
@ -979,6 +983,7 @@ CONFIG_TCP_CONG_CDG=m
|
||||
CONFIG_DEFAULT_CUBIC=y
|
||||
# CONFIG_DEFAULT_RENO is not set
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_AO is not set
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
CONFIG_IPV6=y
|
||||
# CONFIG_IPV6_ROUTER_PREF is not set
|
||||
@ -1392,7 +1397,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
|
||||
CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
|
||||
# CONFIG_MAC80211_MESH is not set
|
||||
CONFIG_MAC80211_LEDS=y
|
||||
# CONFIG_MAC80211_DEBUGFS is not set
|
||||
# CONFIG_MAC80211_MESSAGE_TRACING is not set
|
||||
# CONFIG_MAC80211_DEBUG_MENU is not set
|
||||
CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
|
||||
@ -1547,7 +1551,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
#
|
||||
# Bus devices
|
||||
#
|
||||
# CONFIG_BRCMSTB_GISB_ARB is not set
|
||||
# CONFIG_MOXTET is not set
|
||||
# CONFIG_VEXPRESS_CONFIG is not set
|
||||
# CONFIG_MHI_BUS is not set
|
||||
@ -1581,6 +1584,12 @@ CONFIG_MESON_SM=y
|
||||
CONFIG_MESON_GX_PM=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
# CONFIG_ARM_PSCI_CHECKER is not set
|
||||
|
||||
#
|
||||
# Qualcomm firmware drivers
|
||||
#
|
||||
# end of Qualcomm firmware drivers
|
||||
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y
|
||||
CONFIG_ARM_SMCCC_SOC_ID=y
|
||||
@ -1598,7 +1607,6 @@ CONFIG_MTD=y
|
||||
#
|
||||
# Partition parsers
|
||||
#
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
# CONFIG_MTD_AFS_PARTS is not set
|
||||
@ -1767,7 +1775,6 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
#
|
||||
CONFIG_EEPROM_AT24=m
|
||||
# CONFIG_EEPROM_AT25 is not set
|
||||
# CONFIG_EEPROM_LEGACY is not set
|
||||
# CONFIG_EEPROM_MAX6875 is not set
|
||||
CONFIG_EEPROM_93CX6=m
|
||||
# CONFIG_EEPROM_93XX46 is not set
|
||||
@ -2022,6 +2029,7 @@ CONFIG_TUN=y
|
||||
# CONFIG_TUN_VNET_CROSS_LE is not set
|
||||
CONFIG_VETH=m
|
||||
CONFIG_NLMON=m
|
||||
# CONFIG_NETKIT is not set
|
||||
# CONFIG_ARCNET is not set
|
||||
CONFIG_ETHERNET=y
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
@ -2100,7 +2108,6 @@ CONFIG_STMMAC_PLATFORM=y
|
||||
CONFIG_DWMAC_GENERIC=y
|
||||
CONFIG_DWMAC_MESON=y
|
||||
# CONFIG_DWMAC_INTEL_PLAT is not set
|
||||
# CONFIG_DWMAC_LOONGSON is not set
|
||||
# CONFIG_STMMAC_PCI is not set
|
||||
# CONFIG_NET_VENDOR_SUN is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
@ -2277,7 +2284,6 @@ CONFIG_ATH9K_BTCOEX_SUPPORT=y
|
||||
CONFIG_ATH9K=m
|
||||
# CONFIG_ATH9K_PCI is not set
|
||||
# CONFIG_ATH9K_AHB is not set
|
||||
# CONFIG_ATH9K_DEBUGFS is not set
|
||||
# CONFIG_ATH9K_DYNACK is not set
|
||||
# CONFIG_ATH9K_WOW is not set
|
||||
CONFIG_ATH9K_RFKILL=y
|
||||
@ -2369,6 +2375,8 @@ CONFIG_MT76_SDIO=m
|
||||
CONFIG_MT76x02_LIB=m
|
||||
CONFIG_MT76x02_USB=m
|
||||
CONFIG_MT76_CONNAC_LIB=m
|
||||
CONFIG_MT792x_LIB=m
|
||||
CONFIG_MT792x_USB=m
|
||||
CONFIG_MT76x0_COMMON=m
|
||||
CONFIG_MT76x0U=m
|
||||
# CONFIG_MT76x0E is not set
|
||||
@ -2382,10 +2390,13 @@ CONFIG_MT7663_USB_SDIO_COMMON=m
|
||||
CONFIG_MT7663U=m
|
||||
CONFIG_MT7663S=m
|
||||
# CONFIG_MT7915E is not set
|
||||
CONFIG_MT7921_COMMON=m
|
||||
# CONFIG_MT7921E is not set
|
||||
# CONFIG_MT7921S is not set
|
||||
CONFIG_MT7921U=m
|
||||
# CONFIG_MT7996E is not set
|
||||
# CONFIG_MT7925E is not set
|
||||
# CONFIG_MT7925U is not set
|
||||
CONFIG_WLAN_VENDOR_MICROCHIP=y
|
||||
# CONFIG_WILC1000_SDIO is not set
|
||||
# CONFIG_WILC1000_SPI is not set
|
||||
@ -2947,6 +2958,7 @@ CONFIG_PINCTRL_MESON_G12A=y
|
||||
CONFIG_PINCTRL_MESON_A1=y
|
||||
CONFIG_PINCTRL_MESON_S4=y
|
||||
CONFIG_PINCTRL_AMLOGIC_C3=y
|
||||
CONFIG_PINCTRL_AMLOGIC_T7=y
|
||||
|
||||
#
|
||||
# Renesas pinctrl drivers
|
||||
@ -3043,7 +3055,6 @@ CONFIG_GPIO_PCA953X=m
|
||||
|
||||
# CONFIG_W1 is not set
|
||||
CONFIG_POWER_RESET=y
|
||||
# CONFIG_POWER_RESET_BRCMSTB is not set
|
||||
CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_POWER_RESET_GPIO_RESTART=y
|
||||
# CONFIG_POWER_RESET_ODROID_GO_ULTRA_POWEROFF is not set
|
||||
@ -3100,6 +3111,7 @@ CONFIG_POWER_SUPPLY_HWMON=y
|
||||
# CONFIG_CHARGER_UCS1002 is not set
|
||||
# CONFIG_CHARGER_BD99954 is not set
|
||||
# CONFIG_BATTERY_UG3105 is not set
|
||||
# CONFIG_FUEL_GAUGE_MM8013 is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
@ -3149,12 +3161,14 @@ CONFIG_SENSORS_GPIO_FAN=m
|
||||
# CONFIG_SENSORS_IIO_HWMON is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_JC42 is not set
|
||||
# CONFIG_SENSORS_POWERZ is not set
|
||||
# CONFIG_SENSORS_POWR1220 is not set
|
||||
# CONFIG_SENSORS_LINEAGE is not set
|
||||
# CONFIG_SENSORS_LTC2945 is not set
|
||||
# CONFIG_SENSORS_LTC2947_I2C is not set
|
||||
# CONFIG_SENSORS_LTC2947_SPI is not set
|
||||
# CONFIG_SENSORS_LTC2990 is not set
|
||||
# CONFIG_SENSORS_LTC2991 is not set
|
||||
# CONFIG_SENSORS_LTC2992 is not set
|
||||
# CONFIG_SENSORS_LTC4151 is not set
|
||||
# CONFIG_SENSORS_LTC4215 is not set
|
||||
@ -3431,7 +3445,6 @@ CONFIG_MFD_SEC_CORE=y
|
||||
# CONFIG_MFD_SKY81452 is not set
|
||||
# CONFIG_MFD_STMPE is not set
|
||||
CONFIG_MFD_SYSCON=y
|
||||
# CONFIG_MFD_TI_AM335X_TSCADC is not set
|
||||
# CONFIG_MFD_LP3943 is not set
|
||||
# CONFIG_MFD_LP8788 is not set
|
||||
# CONFIG_MFD_TI_LMU is not set
|
||||
@ -3505,6 +3518,7 @@ CONFIG_REGULATOR_GPIO=y
|
||||
# CONFIG_REGULATOR_LTC3589 is not set
|
||||
# CONFIG_REGULATOR_LTC3676 is not set
|
||||
# CONFIG_REGULATOR_MAX1586 is not set
|
||||
# CONFIG_REGULATOR_MAX77503 is not set
|
||||
# CONFIG_REGULATOR_MAX77857 is not set
|
||||
# CONFIG_REGULATOR_MAX8649 is not set
|
||||
# CONFIG_REGULATOR_MAX8660 is not set
|
||||
@ -3646,6 +3660,7 @@ CONFIG_VIDEO_V4L2_I2C=y
|
||||
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
|
||||
CONFIG_VIDEO_TUNER=m
|
||||
CONFIG_V4L2_MEM2MEM_DEV=m
|
||||
# CONFIG_V4L2_FLASH_LED_CLASS is not set
|
||||
# end of Video4Linux options
|
||||
|
||||
#
|
||||
@ -3829,6 +3844,10 @@ CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m
|
||||
# Microchip Technology, Inc. media platform drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Nuvoton media platform drivers
|
||||
#
|
||||
|
||||
#
|
||||
# NVidia media platform drivers
|
||||
#
|
||||
@ -4351,10 +4370,12 @@ CONFIG_DRM_PANEL=y
|
||||
# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
|
||||
# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set
|
||||
# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
|
||||
# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set
|
||||
# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set
|
||||
# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
|
||||
# CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set
|
||||
# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
|
||||
# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set
|
||||
# CONFIG_DRM_PANEL_JDI_R63452 is not set
|
||||
# CONFIG_DRM_PANEL_KHADAS_TS050 is not set
|
||||
# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
|
||||
@ -4382,6 +4403,7 @@ CONFIG_DRM_PANEL=y
|
||||
# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
|
||||
# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
|
||||
# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
|
||||
# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set
|
||||
# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set
|
||||
@ -4556,6 +4578,7 @@ CONFIG_FB_SYS_IMAGEBLIT=y
|
||||
CONFIG_FB_SYS_FOPS=y
|
||||
CONFIG_FB_DEFERRED_IO=y
|
||||
CONFIG_FB_DMAMEM_HELPERS=y
|
||||
CONFIG_FB_IOMEM_FOPS=y
|
||||
CONFIG_FB_IOMEM_HELPERS=y
|
||||
CONFIG_FB_SYSMEM_HELPERS=y
|
||||
CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y
|
||||
@ -4746,6 +4769,8 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
|
||||
# CONFIG_SND_SOC_AW8738 is not set
|
||||
# CONFIG_SND_SOC_AW88395 is not set
|
||||
# CONFIG_SND_SOC_AW88261 is not set
|
||||
# CONFIG_SND_SOC_AW87390 is not set
|
||||
# CONFIG_SND_SOC_AW88399 is not set
|
||||
# CONFIG_SND_SOC_BD28623 is not set
|
||||
# CONFIG_SND_SOC_BT_SCO is not set
|
||||
# CONFIG_SND_SOC_CHV3_CODEC is not set
|
||||
@ -4816,7 +4841,7 @@ CONFIG_SND_SOC_MAX98357A=y
|
||||
# CONFIG_SND_SOC_PCM3060_SPI is not set
|
||||
# CONFIG_SND_SOC_PCM3168A_I2C is not set
|
||||
# CONFIG_SND_SOC_PCM3168A_SPI is not set
|
||||
# CONFIG_SND_SOC_PCM5102A is not set
|
||||
CONFIG_SND_SOC_PCM5102A=m
|
||||
# CONFIG_SND_SOC_PCM512x_I2C is not set
|
||||
# CONFIG_SND_SOC_PCM512x_SPI is not set
|
||||
# CONFIG_SND_SOC_PEB2466 is not set
|
||||
@ -4826,6 +4851,7 @@ CONFIG_SND_SOC_MAX98357A=y
|
||||
# CONFIG_SND_SOC_RT5640 is not set
|
||||
# CONFIG_SND_SOC_RT5659 is not set
|
||||
# CONFIG_SND_SOC_RT9120 is not set
|
||||
# CONFIG_SND_SOC_RTQ9128 is not set
|
||||
# CONFIG_SND_SOC_SGTL5000 is not set
|
||||
CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y
|
||||
# CONFIG_SND_SOC_SIMPLE_MUX is not set
|
||||
@ -5345,6 +5371,7 @@ CONFIG_TYPEC_UCSI=m
|
||||
# CONFIG_TYPEC_MUX_GPIO_SBU is not set
|
||||
# CONFIG_TYPEC_MUX_PI3USB30532 is not set
|
||||
# CONFIG_TYPEC_MUX_NB7VPQ904M is not set
|
||||
# CONFIG_TYPEC_MUX_PTN36502 is not set
|
||||
# end of USB Type-C Multiplexer/DeMultiplexer Switch support
|
||||
|
||||
#
|
||||
@ -5439,10 +5466,21 @@ CONFIG_LEDS_SYSCON=y
|
||||
#
|
||||
# Flash and Torch LED drivers
|
||||
#
|
||||
# CONFIG_LEDS_AAT1290 is not set
|
||||
# CONFIG_LEDS_AS3645A is not set
|
||||
# CONFIG_LEDS_KTD2692 is not set
|
||||
# CONFIG_LEDS_LM3601X is not set
|
||||
# CONFIG_LEDS_RT4505 is not set
|
||||
# CONFIG_LEDS_RT8515 is not set
|
||||
# CONFIG_LEDS_SGM3140 is not set
|
||||
|
||||
#
|
||||
# RGB LED drivers
|
||||
#
|
||||
# CONFIG_LEDS_GROUP_MULTICOLOR is not set
|
||||
# CONFIG_LEDS_KTD202X is not set
|
||||
# CONFIG_LEDS_PWM_MULTICOLOR is not set
|
||||
# CONFIG_LEDS_QCOM_LPG is not set
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
@ -5456,6 +5494,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
|
||||
CONFIG_LEDS_TRIGGER_CPU=y
|
||||
# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
|
||||
# CONFIG_LEDS_TRIGGER_GPIO is not set
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
|
||||
#
|
||||
@ -5623,7 +5662,6 @@ CONFIG_DMABUF_HEAPS_CMA=y
|
||||
# CONFIG_COMEDI is not set
|
||||
CONFIG_STAGING=y
|
||||
# CONFIG_PRISM2_USB is not set
|
||||
CONFIG_RTL8192U=m
|
||||
CONFIG_RTLLIB=m
|
||||
CONFIG_RTLLIB_CRYPTO_CCMP=m
|
||||
CONFIG_RTLLIB_CRYPTO_TKIP=m
|
||||
@ -5670,12 +5708,6 @@ CONFIG_R8712U=m
|
||||
#
|
||||
# CONFIG_AD5933 is not set
|
||||
# end of Network Analyzer, Impedance Converters
|
||||
|
||||
#
|
||||
# Resolver to digital converters
|
||||
#
|
||||
# CONFIG_AD2S1210 is not set
|
||||
# end of Resolver to digital converters
|
||||
# end of IIO staging drivers
|
||||
|
||||
# CONFIG_FB_SM750 is not set
|
||||
@ -5691,7 +5723,6 @@ CONFIG_VIDEO_MESON_VDEC=m
|
||||
# CONFIG_PI433 is not set
|
||||
# CONFIG_XIL_AXIS_FIFO is not set
|
||||
# CONFIG_FIELDBUS_DEV is not set
|
||||
# CONFIG_QLGE is not set
|
||||
# CONFIG_VME_BUS is not set
|
||||
# CONFIG_GOLDFISH is not set
|
||||
# CONFIG_CHROME_PLATFORMS is not set
|
||||
@ -5740,6 +5771,7 @@ CONFIG_COMMON_CLK_MESON_PHASE=y
|
||||
CONFIG_COMMON_CLK_MESON_PLL=y
|
||||
CONFIG_COMMON_CLK_MESON_SCLK_DIV=y
|
||||
CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y
|
||||
CONFIG_COMMON_CLK_MESON_VCLK=y
|
||||
CONFIG_COMMON_CLK_MESON_CLKC_UTILS=y
|
||||
CONFIG_COMMON_CLK_MESON_AO_CLKC=y
|
||||
CONFIG_COMMON_CLK_MESON_EE_CLKC=y
|
||||
@ -5750,6 +5782,8 @@ CONFIG_COMMON_CLK_AXG_AUDIO=y
|
||||
# CONFIG_COMMON_CLK_A1_PLL is not set
|
||||
# CONFIG_COMMON_CLK_A1_PERIPHERALS is not set
|
||||
CONFIG_COMMON_CLK_G12A=y
|
||||
CONFIG_COMMON_CLK_S4_PLL=y
|
||||
CONFIG_COMMON_CLK_S4_PERIPHERALS=y
|
||||
# end of Clock support for Amlogic platforms
|
||||
|
||||
# CONFIG_XILINX_VCU is not set
|
||||
@ -5825,15 +5859,11 @@ CONFIG_IOMMU_DMA=y
|
||||
CONFIG_MESON_CANVAS=y
|
||||
CONFIG_MESON_CLK_MEASURE=y
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_GX_PM_DOMAINS=y
|
||||
CONFIG_MESON_EE_PM_DOMAINS=y
|
||||
CONFIG_MESON_SECURE_PM_DOMAINS=y
|
||||
# end of Amlogic SoC drivers
|
||||
|
||||
#
|
||||
# Broadcom SoC drivers
|
||||
#
|
||||
# CONFIG_SOC_BRCMSTB is not set
|
||||
# end of Broadcom SoC drivers
|
||||
|
||||
#
|
||||
@ -5874,6 +5904,34 @@ CONFIG_MESON_SECURE_PM_DOMAINS=y
|
||||
# end of Xilinx SoC drivers
|
||||
# end of SOC (System On Chip) specific Drivers
|
||||
|
||||
#
|
||||
# PM Domains
|
||||
#
|
||||
|
||||
#
|
||||
# Amlogic PM Domains
|
||||
#
|
||||
CONFIG_MESON_GX_PM_DOMAINS=y
|
||||
CONFIG_MESON_EE_PM_DOMAINS=y
|
||||
CONFIG_MESON_SECURE_PM_DOMAINS=y
|
||||
# end of Amlogic PM Domains
|
||||
|
||||
#
|
||||
# Broadcom PM Domains
|
||||
#
|
||||
# end of Broadcom PM Domains
|
||||
|
||||
#
|
||||
# i.MX PM Domains
|
||||
#
|
||||
# end of i.MX PM Domains
|
||||
|
||||
#
|
||||
# Qualcomm PM Domains
|
||||
#
|
||||
# end of Qualcomm PM Domains
|
||||
# end of PM Domains
|
||||
|
||||
CONFIG_PM_DEVFREQ=y
|
||||
|
||||
#
|
||||
@ -5997,6 +6055,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_HI8435 is not set
|
||||
# CONFIG_HX711 is not set
|
||||
# CONFIG_INA2XX_ADC is not set
|
||||
# CONFIG_LTC2309 is not set
|
||||
# CONFIG_LTC2471 is not set
|
||||
# CONFIG_LTC2485 is not set
|
||||
# CONFIG_LTC2496 is not set
|
||||
@ -6011,6 +6070,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_MAX9611 is not set
|
||||
# CONFIG_MCP320X is not set
|
||||
# CONFIG_MCP3422 is not set
|
||||
# CONFIG_MCP3564 is not set
|
||||
# CONFIG_MCP3911 is not set
|
||||
CONFIG_MESON_SARADC=y
|
||||
# CONFIG_NAU7802 is not set
|
||||
@ -6372,6 +6432,7 @@ CONFIG_MESON_SARADC=y
|
||||
# Pressure sensors
|
||||
#
|
||||
# CONFIG_ABP060MG is not set
|
||||
# CONFIG_ROHM_BM1390 is not set
|
||||
# CONFIG_BMP280 is not set
|
||||
# CONFIG_DLHL60D is not set
|
||||
# CONFIG_DPS310 is not set
|
||||
@ -6419,6 +6480,7 @@ CONFIG_MESON_SARADC=y
|
||||
#
|
||||
# CONFIG_AD2S90 is not set
|
||||
# CONFIG_AD2S1200 is not set
|
||||
# CONFIG_AD2S1210 is not set
|
||||
# end of Resolver to digital converters
|
||||
|
||||
#
|
||||
@ -6609,9 +6671,6 @@ CONFIG_JBD2=y
|
||||
# CONFIG_JBD2_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_REISERFS_CHECK is not set
|
||||
# CONFIG_REISERFS_PROC_INFO is not set
|
||||
# CONFIG_REISERFS_FS_XATTR is not set
|
||||
CONFIG_JFS_FS=m
|
||||
# CONFIG_JFS_POSIX_ACL is not set
|
||||
# CONFIG_JFS_SECURITY is not set
|
||||
@ -6630,7 +6689,6 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
CONFIG_BTRFS_FS=m
|
||||
CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
|
||||
# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
|
||||
# CONFIG_BTRFS_DEBUG is not set
|
||||
# CONFIG_BTRFS_ASSERT is not set
|
||||
@ -6644,6 +6702,7 @@ CONFIG_F2FS_CHECK_FS=y
|
||||
# CONFIG_F2FS_FS_COMPRESSION is not set
|
||||
CONFIG_F2FS_IOSTAT=y
|
||||
# CONFIG_F2FS_UNFAIR_RWSEM is not set
|
||||
# CONFIG_BCACHEFS_FS is not set
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_EXPORTFS=y
|
||||
# CONFIG_EXPORTFS_BLOCK_OPS is not set
|
||||
@ -7086,7 +7145,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
# CONFIG_CRYPTO_DRBG_CTR is not set
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set
|
||||
CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64
|
||||
CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32
|
||||
CONFIG_CRYPTO_JITTERENTROPY_OSR=1
|
||||
CONFIG_CRYPTO_KDF800108_CTR=y
|
||||
# end of Random number generation
|
||||
|
||||
@ -7246,7 +7307,6 @@ CONFIG_ZSTD_DECOMPRESS=y
|
||||
CONFIG_XZ_DEC=y
|
||||
# CONFIG_XZ_DEC_X86 is not set
|
||||
# CONFIG_XZ_DEC_POWERPC is not set
|
||||
# CONFIG_XZ_DEC_IA64 is not set
|
||||
# CONFIG_XZ_DEC_ARM is not set
|
||||
# CONFIG_XZ_DEC_ARMTHUMB is not set
|
||||
# CONFIG_XZ_DEC_SPARC is not set
|
||||
@ -7313,6 +7373,7 @@ CONFIG_SG_POOL=y
|
||||
CONFIG_ARCH_STACKWALK=y
|
||||
CONFIG_STACKDEPOT=y
|
||||
CONFIG_SBITMAP=y
|
||||
# CONFIG_LWQ_TEST is not set
|
||||
# end of Library routines
|
||||
|
||||
CONFIG_GENERIC_IOREMAP=y
|
||||
@ -7499,8 +7560,6 @@ CONFIG_STACKTRACE=y
|
||||
# CONFIG_DEBUG_MAPLE_TREE is not set
|
||||
# end of Debug kernel data structures
|
||||
|
||||
# CONFIG_DEBUG_CREDENTIALS is not set
|
||||
|
||||
#
|
||||
# RCU Debugging
|
||||
#
|
||||
|
456
projects/Amlogic/patches/kodi/000-temp-revert-fences.patch
Normal file
456
projects/Amlogic/patches/kodi/000-temp-revert-fences.patch
Normal file
@ -0,0 +1,456 @@
|
||||
diff --git a/xbmc/utils/EGLFence.cpp b/xbmc/utils/EGLFence.cpp
|
||||
index 9d0065bdaf..535e3bce31 100644
|
||||
--- a/xbmc/utils/EGLFence.cpp
|
||||
+++ b/xbmc/utils/EGLFence.cpp
|
||||
@@ -22,14 +22,6 @@ CEGLFence::CEGLFence(EGLDisplay display)
|
||||
m_eglGetSyncAttribKHR(
|
||||
CEGLUtils::GetRequiredProcAddress<PFNEGLGETSYNCATTRIBKHRPROC>("eglGetSyncAttribKHR"))
|
||||
{
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- m_eglDupNativeFenceFDANDROID =
|
||||
- CEGLUtils::GetRequiredProcAddress<PFNEGLDUPNATIVEFENCEFDANDROIDPROC>(
|
||||
- "eglDupNativeFenceFDANDROID");
|
||||
- m_eglClientWaitSyncKHR =
|
||||
- CEGLUtils::GetRequiredProcAddress<PFNEGLCLIENTWAITSYNCKHRPROC>("eglClientWaitSyncKHR");
|
||||
- m_eglWaitSyncKHR = CEGLUtils::GetRequiredProcAddress<PFNEGLWAITSYNCKHRPROC>("eglWaitSyncKHR");
|
||||
-#endif
|
||||
}
|
||||
|
||||
void CEGLFence::CreateFence()
|
||||
@@ -79,65 +71,3 @@ bool CEGLFence::IsSignaled()
|
||||
|
||||
return false;
|
||||
}
|
||||
-
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
-EGLSyncKHR CEGLFence::CreateFence(int fd)
|
||||
-{
|
||||
- CEGLAttributes<1> attributeList;
|
||||
- attributeList.Add({{EGL_SYNC_NATIVE_FENCE_FD_ANDROID, fd}});
|
||||
-
|
||||
- EGLSyncKHR fence =
|
||||
- m_eglCreateSyncKHR(m_display, EGL_SYNC_NATIVE_FENCE_ANDROID, attributeList.Get());
|
||||
-
|
||||
- if (fence == EGL_NO_SYNC_KHR)
|
||||
- {
|
||||
- CEGLUtils::Log(LOGERROR, "failed to create EGL sync object");
|
||||
- return nullptr;
|
||||
- }
|
||||
-
|
||||
- return fence;
|
||||
-}
|
||||
-
|
||||
-void CEGLFence::CreateGPUFence()
|
||||
-{
|
||||
- m_gpuFence = CreateFence(EGL_NO_NATIVE_FENCE_FD_ANDROID);
|
||||
-}
|
||||
-
|
||||
-void CEGLFence::CreateKMSFence(int fd)
|
||||
-{
|
||||
- m_kmsFence = CreateFence(fd);
|
||||
-}
|
||||
-
|
||||
-EGLint CEGLFence::FlushFence()
|
||||
-{
|
||||
- EGLint fd = m_eglDupNativeFenceFDANDROID(m_display, m_gpuFence);
|
||||
- if (fd == EGL_NO_NATIVE_FENCE_FD_ANDROID)
|
||||
- CEGLUtils::Log(LOGERROR, "failed to duplicate EGL fence fd");
|
||||
-
|
||||
- m_eglDestroySyncKHR(m_display, m_gpuFence);
|
||||
-
|
||||
- return fd;
|
||||
-}
|
||||
-
|
||||
-void CEGLFence::WaitSyncGPU()
|
||||
-{
|
||||
- if (!m_kmsFence)
|
||||
- return;
|
||||
-
|
||||
- if (m_eglWaitSyncKHR(m_display, m_kmsFence, 0) != EGL_TRUE)
|
||||
- CEGLUtils::Log(LOGERROR, "failed to create EGL sync point");
|
||||
-}
|
||||
-
|
||||
-void CEGLFence::WaitSyncCPU()
|
||||
-{
|
||||
- if (!m_kmsFence)
|
||||
- return;
|
||||
-
|
||||
- EGLint status{EGL_FALSE};
|
||||
-
|
||||
- while (status != EGL_CONDITION_SATISFIED_KHR)
|
||||
- status = m_eglClientWaitSyncKHR(m_display, m_kmsFence, 0, EGL_FOREVER_KHR);
|
||||
-
|
||||
- m_eglDestroySyncKHR(m_display, m_kmsFence);
|
||||
-}
|
||||
-#endif
|
||||
diff --git a/xbmc/utils/EGLFence.h b/xbmc/utils/EGLFence.h
|
||||
index 03c246b60b..bd96444e47 100644
|
||||
--- a/xbmc/utils/EGLFence.h
|
||||
+++ b/xbmc/utils/EGLFence.h
|
||||
@@ -30,14 +30,6 @@ public:
|
||||
void DestroyFence();
|
||||
bool IsSignaled();
|
||||
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- void CreateKMSFence(int fd);
|
||||
- void CreateGPUFence();
|
||||
- EGLint FlushFence();
|
||||
- void WaitSyncGPU();
|
||||
- void WaitSyncCPU();
|
||||
-#endif
|
||||
-
|
||||
private:
|
||||
EGLDisplay m_display{nullptr};
|
||||
EGLSyncKHR m_fence{nullptr};
|
||||
@@ -45,17 +37,6 @@ private:
|
||||
PFNEGLCREATESYNCKHRPROC m_eglCreateSyncKHR{nullptr};
|
||||
PFNEGLDESTROYSYNCKHRPROC m_eglDestroySyncKHR{nullptr};
|
||||
PFNEGLGETSYNCATTRIBKHRPROC m_eglGetSyncAttribKHR{nullptr};
|
||||
-
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- EGLSyncKHR CreateFence(int fd);
|
||||
-
|
||||
- EGLSyncKHR m_gpuFence{EGL_NO_SYNC_KHR};
|
||||
- EGLSyncKHR m_kmsFence{EGL_NO_SYNC_KHR};
|
||||
-
|
||||
- PFNEGLDUPNATIVEFENCEFDANDROIDPROC m_eglDupNativeFenceFDANDROID{nullptr};
|
||||
- PFNEGLCLIENTWAITSYNCKHRPROC m_eglClientWaitSyncKHR{nullptr};
|
||||
- PFNEGLWAITSYNCKHRPROC m_eglWaitSyncKHR{nullptr};
|
||||
-#endif
|
||||
};
|
||||
|
||||
}
|
||||
diff --git a/xbmc/windowing/gbm/WinSystemGbm.cpp b/xbmc/windowing/gbm/WinSystemGbm.cpp
|
||||
index f334156d89..34c8c16fe4 100644
|
||||
--- a/xbmc/windowing/gbm/WinSystemGbm.cpp
|
||||
+++ b/xbmc/windowing/gbm/WinSystemGbm.cpp
|
||||
@@ -278,7 +278,7 @@ void CWinSystemGbm::UpdateDisplayHardwareScaling(const RESOLUTION_INFO& resInfo)
|
||||
SetFullScreen(true, resMutable, false);
|
||||
}
|
||||
|
||||
-void CWinSystemGbm::FlipPage(bool rendered, bool videoLayer, bool async)
|
||||
+void CWinSystemGbm::FlipPage(bool rendered, bool videoLayer)
|
||||
{
|
||||
if (m_videoLayerBridge && !videoLayer)
|
||||
{
|
||||
@@ -293,7 +293,7 @@ void CWinSystemGbm::FlipPage(bool rendered, bool videoLayer, bool async)
|
||||
bo = m_GBM->GetDevice()->GetSurface()->LockFrontBuffer()->Get();
|
||||
}
|
||||
|
||||
- m_DRM->FlipPage(bo, rendered, videoLayer, async);
|
||||
+ m_DRM->FlipPage(bo, rendered, videoLayer);
|
||||
|
||||
if (m_videoLayerBridge && !videoLayer)
|
||||
{
|
||||
@@ -310,14 +310,14 @@ bool CWinSystemGbm::UseLimitedColor()
|
||||
bool CWinSystemGbm::Hide()
|
||||
{
|
||||
bool ret = m_DRM->SetActive(false);
|
||||
- FlipPage(false, false, false);
|
||||
+ FlipPage(false, false);
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool CWinSystemGbm::Show(bool raise)
|
||||
{
|
||||
bool ret = m_DRM->SetActive(true);
|
||||
- FlipPage(false, false, false);
|
||||
+ FlipPage(false, false);
|
||||
return ret;
|
||||
}
|
||||
|
||||
diff --git a/xbmc/windowing/gbm/WinSystemGbm.h b/xbmc/windowing/gbm/WinSystemGbm.h
|
||||
index 879d0f58f8..a800acef6b 100644
|
||||
--- a/xbmc/windowing/gbm/WinSystemGbm.h
|
||||
+++ b/xbmc/windowing/gbm/WinSystemGbm.h
|
||||
@@ -49,7 +49,7 @@ public:
|
||||
bool DisplayHardwareScalingEnabled() override;
|
||||
void UpdateDisplayHardwareScaling(const RESOLUTION_INFO& resInfo) override;
|
||||
|
||||
- void FlipPage(bool rendered, bool videoLayer, bool async);
|
||||
+ void FlipPage(bool rendered, bool videoLayer);
|
||||
|
||||
bool CanDoWindowed() override { return false; }
|
||||
void UpdateResolutions() override;
|
||||
diff --git a/xbmc/windowing/gbm/WinSystemGbmEGLContext.cpp b/xbmc/windowing/gbm/WinSystemGbmEGLContext.cpp
|
||||
index ee27fba1bd..83a59413f7 100644
|
||||
--- a/xbmc/windowing/gbm/WinSystemGbmEGLContext.cpp
|
||||
+++ b/xbmc/windowing/gbm/WinSystemGbmEGLContext.cpp
|
||||
@@ -58,17 +58,6 @@ bool CWinSystemGbmEGLContext::InitWindowSystemEGL(EGLint renderableType, EGLint
|
||||
return false;
|
||||
}
|
||||
|
||||
- if (CEGLUtils::HasExtension(m_eglContext.GetEGLDisplay(), "EGL_ANDROID_native_fence_sync") &&
|
||||
- CEGLUtils::HasExtension(m_eglContext.GetEGLDisplay(), "EGL_KHR_fence_sync"))
|
||||
- {
|
||||
- m_eglFence = std::make_unique<KODI::UTILS::EGL::CEGLFence>(m_eglContext.GetEGLDisplay());
|
||||
- }
|
||||
- else
|
||||
- {
|
||||
- CLog::Log(LOGWARNING, "[GBM] missing support for EGL_KHR_fence_sync and "
|
||||
- "EGL_ANDROID_native_fence_sync - performance may be impacted");
|
||||
- }
|
||||
-
|
||||
return true;
|
||||
}
|
||||
|
||||
diff --git a/xbmc/windowing/gbm/WinSystemGbmEGLContext.h b/xbmc/windowing/gbm/WinSystemGbmEGLContext.h
|
||||
index fbd52354ee..84f863d6d3 100644
|
||||
--- a/xbmc/windowing/gbm/WinSystemGbmEGLContext.h
|
||||
+++ b/xbmc/windowing/gbm/WinSystemGbmEGLContext.h
|
||||
@@ -9,7 +9,6 @@
|
||||
#pragma once
|
||||
|
||||
#include "WinSystemGbm.h"
|
||||
-#include "utils/EGLFence.h"
|
||||
#include "utils/EGLUtils.h"
|
||||
#include "windowing/linux/WinSystemEGL.h"
|
||||
|
||||
@@ -47,8 +46,6 @@ protected:
|
||||
bool InitWindowSystemEGL(EGLint renderableType, EGLint apiType);
|
||||
virtual bool CreateContext() = 0;
|
||||
|
||||
- std::unique_ptr<KODI::UTILS::EGL::CEGLFence> m_eglFence;
|
||||
-
|
||||
struct delete_CVaapiProxy
|
||||
{
|
||||
void operator()(CVaapiProxy *p) const;
|
||||
diff --git a/xbmc/windowing/gbm/WinSystemGbmGLContext.cpp b/xbmc/windowing/gbm/WinSystemGbmGLContext.cpp
|
||||
index adbb539f21..e4ff49c618 100644
|
||||
--- a/xbmc/windowing/gbm/WinSystemGbmGLContext.cpp
|
||||
+++ b/xbmc/windowing/gbm/WinSystemGbmGLContext.cpp
|
||||
@@ -119,37 +119,13 @@ void CWinSystemGbmGLContext::PresentRender(bool rendered, bool videoLayer)
|
||||
{
|
||||
if (rendered)
|
||||
{
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- if (m_eglFence)
|
||||
- {
|
||||
- int fd = m_DRM->TakeOutFenceFd();
|
||||
- if (fd != -1)
|
||||
- {
|
||||
- m_eglFence->CreateKMSFence(fd);
|
||||
- m_eglFence->WaitSyncGPU();
|
||||
- }
|
||||
-
|
||||
- m_eglFence->CreateGPUFence();
|
||||
- }
|
||||
-#endif
|
||||
-
|
||||
if (!m_eglContext.TrySwapBuffers())
|
||||
{
|
||||
CEGLUtils::Log(LOGERROR, "eglSwapBuffers failed");
|
||||
throw std::runtime_error("eglSwapBuffers failed");
|
||||
}
|
||||
-
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- if (m_eglFence)
|
||||
- {
|
||||
- int fd = m_eglFence->FlushFence();
|
||||
- m_DRM->SetInFenceFd(fd);
|
||||
-
|
||||
- m_eglFence->WaitSyncCPU();
|
||||
- }
|
||||
-#endif
|
||||
}
|
||||
- CWinSystemGbm::FlipPage(rendered, videoLayer, static_cast<bool>(m_eglFence));
|
||||
+ CWinSystemGbm::FlipPage(rendered, videoLayer);
|
||||
|
||||
if (m_dispReset && m_dispResetTimer.IsTimePast())
|
||||
{
|
||||
diff --git a/xbmc/windowing/gbm/WinSystemGbmGLESContext.cpp b/xbmc/windowing/gbm/WinSystemGbmGLESContext.cpp
|
||||
index ad80abf46c..0d071c31f1 100644
|
||||
--- a/xbmc/windowing/gbm/WinSystemGbmGLESContext.cpp
|
||||
+++ b/xbmc/windowing/gbm/WinSystemGbmGLESContext.cpp
|
||||
@@ -128,38 +128,13 @@ void CWinSystemGbmGLESContext::PresentRender(bool rendered, bool videoLayer)
|
||||
{
|
||||
if (rendered)
|
||||
{
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- if (m_eglFence)
|
||||
- {
|
||||
- int fd = m_DRM->TakeOutFenceFd();
|
||||
- if (fd != -1)
|
||||
- {
|
||||
- m_eglFence->CreateKMSFence(fd);
|
||||
- m_eglFence->WaitSyncGPU();
|
||||
- }
|
||||
-
|
||||
- m_eglFence->CreateGPUFence();
|
||||
- }
|
||||
-#endif
|
||||
-
|
||||
if (!m_eglContext.TrySwapBuffers())
|
||||
{
|
||||
CEGLUtils::Log(LOGERROR, "eglSwapBuffers failed");
|
||||
throw std::runtime_error("eglSwapBuffers failed");
|
||||
}
|
||||
-
|
||||
-#if defined(EGL_ANDROID_native_fence_sync) && defined(EGL_KHR_fence_sync)
|
||||
- if (m_eglFence)
|
||||
- {
|
||||
- int fd = m_eglFence->FlushFence();
|
||||
- m_DRM->SetInFenceFd(fd);
|
||||
-
|
||||
- m_eglFence->WaitSyncCPU();
|
||||
- }
|
||||
-#endif
|
||||
}
|
||||
-
|
||||
- CWinSystemGbm::FlipPage(rendered, videoLayer, static_cast<bool>(m_eglFence));
|
||||
+ CWinSystemGbm::FlipPage(rendered, videoLayer);
|
||||
|
||||
if (m_dispReset && m_dispResetTimer.IsTimePast())
|
||||
{
|
||||
diff --git a/xbmc/windowing/gbm/drm/DRMAtomic.cpp b/xbmc/windowing/gbm/drm/DRMAtomic.cpp
|
||||
index ff7f137d60..029b5cae81 100644
|
||||
--- a/xbmc/windowing/gbm/drm/DRMAtomic.cpp
|
||||
+++ b/xbmc/windowing/gbm/drm/DRMAtomic.cpp
|
||||
@@ -111,11 +111,6 @@ void CDRMAtomic::DrmAtomicCommit(int fb_id, int flags, bool rendered, bool video
|
||||
AddProperty(m_gui_plane, "CRTC_H", m_mode->vdisplay);
|
||||
}
|
||||
|
||||
- if (m_inFenceFd != -1)
|
||||
- {
|
||||
- AddProperty(m_crtc, "OUT_FENCE_PTR", reinterpret_cast<uint64_t>(&m_outFenceFd));
|
||||
- AddProperty(m_gui_plane, "IN_FENCE_FD", m_inFenceFd);
|
||||
- }
|
||||
}
|
||||
else if (videoLayer && !CServiceBroker::GetGUI()->GetWindowManager().HasVisibleControls())
|
||||
{
|
||||
@@ -151,12 +146,6 @@ void CDRMAtomic::DrmAtomicCommit(int fb_id, int flags, bool rendered, bool video
|
||||
strerror(errno));
|
||||
}
|
||||
|
||||
- if (m_inFenceFd != -1)
|
||||
- {
|
||||
- close(m_inFenceFd);
|
||||
- m_inFenceFd = -1;
|
||||
- }
|
||||
-
|
||||
if (flags & DRM_MODE_ATOMIC_ALLOW_MODESET)
|
||||
{
|
||||
if (drmModeDestroyPropertyBlob(m_fd, blob_id) != 0)
|
||||
@@ -171,10 +160,9 @@ void CDRMAtomic::DrmAtomicCommit(int fb_id, int flags, bool rendered, bool video
|
||||
m_req = m_atomicRequestQueue.back().get();
|
||||
}
|
||||
|
||||
-void CDRMAtomic::FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, bool async)
|
||||
+void CDRMAtomic::FlipPage(struct gbm_bo *bo, bool rendered, bool videoLayer)
|
||||
{
|
||||
struct drm_fb *drm_fb = nullptr;
|
||||
- uint32_t flags = 0;
|
||||
|
||||
if (rendered)
|
||||
{
|
||||
@@ -189,11 +177,10 @@ void CDRMAtomic::FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, boo
|
||||
CLog::Log(LOGERROR, "CDRMAtomic::{} - Failed to get a new FBO", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
-
|
||||
- if (async && !m_need_modeset)
|
||||
- flags |= DRM_MODE_ATOMIC_NONBLOCK;
|
||||
}
|
||||
|
||||
+ uint32_t flags = 0;
|
||||
+
|
||||
if (m_need_modeset)
|
||||
{
|
||||
flags |= DRM_MODE_ATOMIC_ALLOW_MODESET;
|
||||
diff --git a/xbmc/windowing/gbm/drm/DRMAtomic.h b/xbmc/windowing/gbm/drm/DRMAtomic.h
|
||||
index 6b19657587..ca2cd9a1d0 100644
|
||||
--- a/xbmc/windowing/gbm/drm/DRMAtomic.h
|
||||
+++ b/xbmc/windowing/gbm/drm/DRMAtomic.h
|
||||
@@ -27,7 +27,7 @@ class CDRMAtomic : public CDRMUtils
|
||||
public:
|
||||
CDRMAtomic() = default;
|
||||
~CDRMAtomic() override = default;
|
||||
- void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, bool async) override;
|
||||
+ void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer) override;
|
||||
bool SetVideoMode(const RESOLUTION_INFO& res, struct gbm_bo* bo) override;
|
||||
bool SetActive(bool active) override;
|
||||
bool InitDrm() override;
|
||||
diff --git a/xbmc/windowing/gbm/drm/DRMLegacy.cpp b/xbmc/windowing/gbm/drm/DRMLegacy.cpp
|
||||
index 4e9c3a6b9f..418d067e70 100644
|
||||
--- a/xbmc/windowing/gbm/drm/DRMLegacy.cpp
|
||||
+++ b/xbmc/windowing/gbm/drm/DRMLegacy.cpp
|
||||
@@ -108,7 +108,7 @@ bool CDRMLegacy::QueueFlip(struct gbm_bo *bo)
|
||||
return true;
|
||||
}
|
||||
|
||||
-void CDRMLegacy::FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, bool async)
|
||||
+void CDRMLegacy::FlipPage(struct gbm_bo *bo, bool rendered, bool videoLayer)
|
||||
{
|
||||
if (rendered || videoLayer)
|
||||
{
|
||||
diff --git a/xbmc/windowing/gbm/drm/DRMLegacy.h b/xbmc/windowing/gbm/drm/DRMLegacy.h
|
||||
index e763f298f7..2b7ff45617 100644
|
||||
--- a/xbmc/windowing/gbm/drm/DRMLegacy.h
|
||||
+++ b/xbmc/windowing/gbm/drm/DRMLegacy.h
|
||||
@@ -22,7 +22,7 @@ class CDRMLegacy : public CDRMUtils
|
||||
public:
|
||||
CDRMLegacy() = default;
|
||||
~CDRMLegacy() override = default;
|
||||
- void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, bool async) override;
|
||||
+ void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer) override;
|
||||
bool SetVideoMode(const RESOLUTION_INFO& res, struct gbm_bo* bo) override;
|
||||
bool SetActive(bool active) override;
|
||||
bool InitDrm() override;
|
||||
diff --git a/xbmc/windowing/gbm/drm/DRMUtils.h b/xbmc/windowing/gbm/drm/DRMUtils.h
|
||||
index f92f716fc4..5327e35570 100644
|
||||
--- a/xbmc/windowing/gbm/drm/DRMUtils.h
|
||||
+++ b/xbmc/windowing/gbm/drm/DRMUtils.h
|
||||
@@ -15,7 +15,6 @@
|
||||
#include "windowing/Resolution.h"
|
||||
#include "windowing/gbm/GBMUtils.h"
|
||||
|
||||
-#include <utility>
|
||||
#include <vector>
|
||||
|
||||
#include <gbm.h>
|
||||
@@ -40,7 +39,7 @@ class CDRMUtils
|
||||
public:
|
||||
CDRMUtils() = default;
|
||||
virtual ~CDRMUtils();
|
||||
- virtual void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, bool async) {}
|
||||
+ virtual void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer) {}
|
||||
virtual bool SetVideoMode(const RESOLUTION_INFO& res, struct gbm_bo* bo) { return false; }
|
||||
virtual bool SetActive(bool active) { return false; }
|
||||
virtual bool InitDrm();
|
||||
@@ -63,13 +62,6 @@ public:
|
||||
static uint32_t FourCCWithAlpha(uint32_t fourcc);
|
||||
static uint32_t FourCCWithoutAlpha(uint32_t fourcc);
|
||||
|
||||
- void SetInFenceFd(int fd) { m_inFenceFd = fd; }
|
||||
- int TakeOutFenceFd()
|
||||
- {
|
||||
- int fd{-1};
|
||||
- return std::exchange(m_outFenceFd, fd);
|
||||
- }
|
||||
-
|
||||
protected:
|
||||
bool OpenDrm(bool needConnector);
|
||||
drm_fb* DrmFbGetFromBo(struct gbm_bo *bo);
|
||||
@@ -86,9 +78,6 @@ protected:
|
||||
int m_width = 0;
|
||||
int m_height = 0;
|
||||
|
||||
- int m_inFenceFd{-1};
|
||||
- int m_outFenceFd{-1};
|
||||
-
|
||||
std::vector<std::unique_ptr<CDRMPlane>> m_planes;
|
||||
|
||||
private:
|
||||
diff --git a/xbmc/windowing/gbm/drm/OffScreenModeSetting.h b/xbmc/windowing/gbm/drm/OffScreenModeSetting.h
|
||||
index bba0db9a53..4270d4ecb2 100644
|
||||
--- a/xbmc/windowing/gbm/drm/OffScreenModeSetting.h
|
||||
+++ b/xbmc/windowing/gbm/drm/OffScreenModeSetting.h
|
||||
@@ -22,7 +22,7 @@ class COffScreenModeSetting : public CDRMUtils
|
||||
public:
|
||||
COffScreenModeSetting() = default;
|
||||
~COffScreenModeSetting() override = default;
|
||||
- void FlipPage(struct gbm_bo* bo, bool rendered, bool videoLayer, bool async) override {}
|
||||
+ void FlipPage(struct gbm_bo *bo, bool rendered, bool videoLayer) override {}
|
||||
bool SetVideoMode(const RESOLUTION_INFO& res, struct gbm_bo *bo) override { return false; }
|
||||
bool SetActive(bool active) override { return false; }
|
||||
bool InitDrm() override;
|
Loading…
x
Reference in New Issue
Block a user