From 436325306d7144f9325e0c20f98da2712ac6d04b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 21 Aug 2018 23:37:45 +0200 Subject: [PATCH] linux: update rockchip-4.4 to bca24644 --- packages/linux/package.mk | 4 +- projects/Rockchip/README.md | 1 + .../MiQi/linux/rockchip-4.4/linux.arm.conf | 148 +- .../linux/rockchip-4.4/linux.aarch64.conf | 120 +- .../linux/rockchip-4.4/linux.aarch64.conf | 126 +- .../linux/rockchip-4.4/linux.arm.conf | 152 +- .../rockchip-4.4/linux-0001-miniarm.patch | 287 -- .../rockchip-4.4/linux-0001-rockchip.patch | 834 ++-- .../linux/rockchip-4.4/linux-0002-ir.patch | 202 +- .../linux/rockchip-4.4/linux-0003-cec.patch | 32 +- .../linux/rockchip-4.4/linux-0004-audio.patch | 372 +- .../linux/rockchip-4.4/linux-0005-dts.patch | 3461 +++++++++-------- .../rockchip-4.4/linux-0006-rtl8211f.patch | 24 +- .../linux-0007-dtoverlay-configfs.patch | 6 +- .../rockchip-4.4/linux-0008-mmc-pwrseq.patch | 18 +- .../linux/rockchip-4.4/linux-0009-mmc.patch | 633 +++ ...ield-header.patch => linux-0010-dvb.patch} | 190 +- .../rockchip-4.4/linux-0010-dvbcompat.patch | 167 - .../linux/rockchip-4.4/linux-1000-limit.patch | 49 + .../linux/rockchip-4.4/linux-1000-pl330.patch | 894 ++++- .../rockchip-4.4/linux-1000-vcodec.patch | 945 +++++ 21 files changed, 5883 insertions(+), 2782 deletions(-) delete mode 100644 projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch create mode 100644 projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc.patch rename projects/Rockchip/patches/linux/rockchip-4.4/{linux-0011-add-bitfield-header.patch => linux-0010-dvb.patch} (57%) delete mode 100644 projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvbcompat.patch create mode 100644 projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-limit.patch create mode 100644 projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-vcodec.patch diff --git a/packages/linux/package.mk b/packages/linux/package.mk index d164c69ed4..878bbbf8e9 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -35,8 +35,8 @@ case "$LINUX" in PKG_BUILD_PERF="no" ;; rockchip-4.4) - PKG_VERSION="eae92ae2b930999857df47c3057327c1c490454b" - PKG_SHA256="da453ca6ecefc3719a1165bc7b08fe00fc2b50ab64f6289ef6f3670a9fc1ceca" + PKG_VERSION="bca2464422eb8dd734f9218265dae256a82299be" + PKG_SHA256="baaea04ca4a1b34e0bfce36bfcf74d65b06ae371e29fa2ef96d26327e55b690d" PKG_URL="https://github.com/rockchip-linux/kernel/archive/$PKG_VERSION.tar.gz" PKG_SOURCE_DIR="kernel-$PKG_VERSION" ;; diff --git a/projects/Rockchip/README.md b/projects/Rockchip/README.md index 21c2034b42..cd3888e388 100644 --- a/projects/Rockchip/README.md +++ b/projects/Rockchip/README.md @@ -38,3 +38,4 @@ You may have luck if your device vendor is open source friendly, otherwise keep * `cat /sys/kernel/debug/clk/clk_summary` * `hexdump -C /sys/class/drm/card0-HDMI-A-1/edid` * `edid-decode /sys/class/drm/card0-HDMI-A-1/edid` +* `cat /sys/kernel/debug/dma_buf/bufinfo` diff --git a/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf b/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf index 5f4b48b425..5c054b8749 100644 --- a/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf +++ b/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.4.114 Kernel Configuration +# Linux/arm 4.4.143 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y @@ -152,6 +152,7 @@ CONFIG_RD_GZIP=y CONFIG_RD_XZ=y # CONFIG_RD_LZO is not set # CONFIG_RD_LZ4 is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -237,6 +238,7 @@ CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_BITS_MAX=16 CONFIG_ARCH_MMAP_RND_BITS=8 @@ -471,7 +473,6 @@ CONFIG_ARM_CPU_TOPOLOGY=y # CONFIG_SCHED_SMT is not set CONFIG_HAVE_ARM_SCU=y CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_TWD=y # CONFIG_MCPM is not set # CONFIG_BIG_LITTLE is not set CONFIG_VMSPLIT_3G=y @@ -511,9 +512,11 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_HAVE_MEMBLOCK=y CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set +CONFIG_MIGRATION=y # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_BOUNCE=y @@ -521,11 +524,14 @@ CONFIG_BOUNCE=y CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 # CONFIG_CLEANCACHE is not set # CONFIG_FRONTSWAP is not set -# CONFIG_CMA is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +CONFIG_CMA_DEBUGFS=y +CONFIG_CMA_AREAS=7 # CONFIG_ZPOOL is not set # CONFIG_ZBUD is not set -CONFIG_ZSMALLOC=y -# CONFIG_PGTABLE_MAPPING is not set +CONFIG_ZSMALLOC=m +CONFIG_PGTABLE_MAPPING=y # CONFIG_ZSMALLOC_STAT is not set # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_FORCE_MAX_ZONEORDER=11 @@ -547,7 +553,7 @@ CONFIG_ATAGS=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 # CONFIG_ARM_APPENDED_DTB is not set -CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1" +CONFIG_CMDLINE="usbcore.autosuspend=-1" # CONFIG_CMDLINE_FROM_BOOTLOADER is not set CONFIG_CMDLINE_EXTEND=y # CONFIG_CMDLINE_FORCE is not set @@ -566,13 +572,13 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_TIMES=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y @@ -1016,6 +1022,7 @@ CONFIG_RFKILL_GPIO=y # CONFIG_CEPH_LIB is not set # CONFIG_NFC is not set # CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y CONFIG_HAVE_BPF_JIT=y # @@ -1051,6 +1058,17 @@ CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 # # Bus devices @@ -1078,8 +1096,8 @@ CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=y -# CONFIG_ZRAM_LZ4_COMPRESS is not set +CONFIG_ZRAM=m +CONFIG_ZRAM_LZ4_COMPRESS=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 @@ -1097,7 +1115,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # Misc devices # -# CONFIG_ROCKCHIP_SCR is not set +CONFIG_ROCKCHIP_SCR=y # CONFIG_SENSORS_LIS3LV02D is not set # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set @@ -1329,7 +1347,7 @@ CONFIG_PHYLIB=y # CONFIG_CICADA_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_TERANETICS_PHY is not set -# CONFIG_ROCKCHIP_PHY is not set +CONFIG_ROCKCHIP_PHY=y # CONFIG_SMSC_PHY is not set # CONFIG_BROADCOM_PHY is not set # CONFIG_BCM7XXX_PHY is not set @@ -1434,7 +1452,8 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_WL_ROCKCHIP=y CONFIG_WIFI_BUILD_MODULE=y # CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set -CONFIG_AP6XXX=m +# CONFIG_AP6XXX is not set +# CONFIG_CYW_BCMDHD is not set CONFIG_RTL_WIRELESS_SOLUTION=y # CONFIG_RTL8188EU is not set # CONFIG_RTL8188FU is not set @@ -1444,6 +1463,12 @@ CONFIG_RTL8723BS=m # CONFIG_RTL8723BU is not set # CONFIG_RTL8723CS is not set # CONFIG_RTL8723DS is not set +# CONFIG_MVL88W8977 is not set + +# +# SouthSV 6XXX WLAN support +# +# CONFIG_SSV6051 is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set @@ -1578,6 +1603,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y # CONFIG_TOUCHSCREEN_FT6236 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680A is not set # CONFIG_TOUCHSCREEN_GSLX680_D708 is not set # CONFIG_TOUCHSCREEN_GSLX680_PAD is not set # CONFIG_TOUCHSCREEN_GSLX680_VR is not set @@ -1892,6 +1918,7 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_RK805 is not set CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y CONFIG_ARCH_REQUIRE_GPIOLIB=y @@ -2304,6 +2331,7 @@ CONFIG_REGULATOR_RK808=y # CONFIG_REGULATOR_RK818 is not set # CONFIG_REGULATOR_SYR82X is not set # CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS549B22 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set @@ -2311,6 +2339,7 @@ CONFIG_REGULATOR_RK808=y CONFIG_REGULATOR_TPS6586X=y # CONFIG_REGULATOR_XZ3216 is not set CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y CONFIG_MEDIA_SUPPORT=y # @@ -2346,15 +2375,15 @@ CONFIG_IR_SHARP_DECODER=y CONFIG_IR_MCE_KBD_DECODER=y CONFIG_IR_XMP_DECODER=y CONFIG_RC_DEVICES=y -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_IR_HIX5HD2 is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_IGORPLUGUSB is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_TTUSBIR is not set +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_HIX5HD2=m +CONFIG_IR_IMON=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_STREAMZAP=m +CONFIG_IR_IGORPLUGUSB=m +CONFIG_IR_IGUANA=m +CONFIG_IR_TTUSBIR=m # CONFIG_RC_LOOPBACK is not set CONFIG_IR_GPIO_CIR=y CONFIG_MEDIA_USB_SUPPORT=y @@ -2364,6 +2393,7 @@ CONFIG_MEDIA_USB_SUPPORT=y # CONFIG_USB_PULSE8_CEC=y CONFIG_USB_RAINSHADOW_CEC=y +# CONFIG_ROCKCHIP_TSP is not set # # Supported MMC/SDIO adapters @@ -2399,7 +2429,7 @@ CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set # CONFIG_DRM_SCDC_HELPER is not set -CONFIG_DRM_DMA_SYNC=y +# CONFIG_DRM_DMA_SYNC is not set # # I2C encoder or helper chips @@ -2411,13 +2441,14 @@ CONFIG_DRM_DMA_SYNC=y # CONFIG_DRM_VGEM is not set # CONFIG_DRM_EXYNOS is not set CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_DRM_DEBUG is not set # CONFIG_ROCKCHIP_CDN_DP is not set CONFIG_ROCKCHIP_DW_HDMI=y CONFIG_ROCKCHIP_DW_MIPI_DSI=y CONFIG_ROCKCHIP_ANALOGIX_DP=y CONFIG_ROCKCHIP_INNO_HDMI=y CONFIG_ROCKCHIP_LVDS=y -# CONFIG_ROCKCHIP_DRM_TVE is not set +CONFIG_ROCKCHIP_DRM_TVE=y # CONFIG_ROCKCHIP_RGB is not set # CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set # CONFIG_ROCKCHIP_RK3066_HDMI is not set @@ -2444,22 +2475,22 @@ CONFIG_DRM_BRIDGE=y # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_RK1000 is not set # CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LONTIUM_LT8912 is not set CONFIG_DRM_ANALOGIX_DP=y CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set CONFIG_DRM_DW_HDMI_I2S_AUDIO=y -# CONFIG_DRM_DW_HDMI_CEC is not set +CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_DRM_STI is not set # CONFIG_POWERVR_ROGUE_M is not set # CONFIG_MALI400 is not set CONFIG_MALI_DEVFREQ=y -CONFIG_MALI_MIDGARD_FOR_ANDROID=y -# CONFIG_MALI_MIDGARD_FOR_LINUX is not set CONFIG_MALI_MIDGARD=m # CONFIG_MALI_GATOR_SUPPORT is not set # CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set # CONFIG_MALI_DMA_FENCE is not set CONFIG_MALI_EXPERT=y +# CONFIG_MALI_CORESTACK is not set # CONFIG_MALI_PRFCNT_SET_SECONDARY is not set # CONFIG_MALI_PLATFORM_FAKE is not set # CONFIG_MALI_PLATFORM_DEVICETREE is not set @@ -2470,8 +2501,11 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" # CONFIG_MALI_TRACE_TIMELINE is not set # CONFIG_MALI_SYSTEM_TRACE is not set # CONFIG_MALI_GPU_MMU_AARCH64 is not set +CONFIG_MALI_PWRSOFT_765=y +# CONFIG_MALI_KUTF is not set +# CONFIG_MALI_BIFROST_FOR_ANDROID is not set +CONFIG_MALI_BIFROST_FOR_LINUX=y # CONFIG_MALI_BIFROST is not set -# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2568,7 +2602,8 @@ CONFIG_RK_VCODEC=y # # ROCKCHIP_MPP # -# CONFIG_ROCKCHIP_MPP_SERVICE is not set +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_DEVICE=y # CONFIG_VGASTATE is not set CONFIG_VIDEOMODE_HELPERS=y CONFIG_HDMI=y @@ -2656,13 +2691,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set CONFIG_SND_SOC_ROCKCHIP=y +# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set +# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set # CONFIG_SND_SOC_ROCKCHIP_PDM is not set CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set +# CONFIG_SND_SOC_ROCKCHIP_VAD is not set # CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set CONFIG_SND_SOC_ROCKCHIP_RT5645=y # CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set # CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set @@ -2698,6 +2739,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_DUMMY_CODEC is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_ES8316 is not set CONFIG_SND_SOC_ES8323=y @@ -2715,6 +2757,7 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set # CONFIG_SND_SOC_RK3228 is not set +# CONFIG_SND_SOC_RK3308 is not set # CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y @@ -3061,7 +3104,6 @@ CONFIG_USB_EZUSB_FX2=y # CONFIG_USB_PHY is not set # CONFIG_USB_OTG_WAKELOCK is not set # CONFIG_NOP_USB_XCEIV is not set -# CONFIG_AM335X_PHY_USB is not set # CONFIG_USB_GPIO_VBUS is not set # CONFIG_USB_ISP1301 is not set # CONFIG_USB_ULPI is not set @@ -3255,6 +3297,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_FAKE is not set CONFIG_RTC_DRV_HYM8563=y # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_RK808=y @@ -3518,15 +3561,11 @@ CONFIG_COMMON_CLK_RK808=y # CONFIG_CLKSRC_OF=y CONFIG_CLKSRC_PROBE=y -CONFIG_DW_APB_TIMER=y -CONFIG_DW_APB_TIMER_OF=y CONFIG_ROCKCHIP_TIMER=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y -CONFIG_ARM_GLOBAL_TIMER=y # CONFIG_ARM_TIMER_SP804 is not set -CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y # CONFIG_ATMEL_PIT is not set # CONFIG_SH_TIMER_CMT is not set # CONFIG_SH_TIMER_MTU2 is not set @@ -3560,13 +3599,31 @@ CONFIG_ROCKCHIP_IOMMU=y # SOC (System On Chip) specific Drivers # # CONFIG_SOC_BRCMSTB is not set + +# +# CPU selection +# +# CONFIG_CPU_RK312X is not set +# CONFIG_CPU_RK3036 is not set +# CONFIG_CPU_RK30XX is not set +# CONFIG_CPU_RK3188 is not set +CONFIG_CPU_RK3288=y +# CONFIG_CPU_RK322X is not set +# CONFIG_CPU_RV110X is not set +# CONFIG_CPU_PX30 is not set +# CONFIG_CPU_RK3308 is not set +# CONFIG_CPU_RK3328 is not set +# CONFIG_CPU_RK3366 is not set +# CONFIG_CPU_RK3368 is not set +# CONFIG_CPU_RK3399 is not set CONFIG_ANDROID_VERSION=0x07010000 CONFIG_ROCKCHIP_CPUINFO=y # CONFIG_ROCKCHIP_DEVICEINFO is not set # CONFIG_ROCKCHIP_PM_TEST is not set CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_PVTM is not set +CONFIG_ROCKCHIP_PVTM=y +CONFIG_ROCKCHIP_SUSPEND_MODE=y # CONFIG_SUNXI_SRAM is not set # CONFIG_SOC_TI is not set CONFIG_PM_DEVFREQ=y @@ -3582,6 +3639,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y # # DEVFREQ Drivers # +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y @@ -3745,6 +3803,7 @@ CONFIG_SENSORS_TSL2563=y # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set +# CONFIG_VL6180 is not set # # Magnetometer sensors @@ -3804,8 +3863,10 @@ CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_CROS_EC is not set # CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_GPIO=y # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y +# CONFIG_PWM_ROCKCHIP_I2S is not set CONFIG_IRQCHIP=y CONFIG_ARM_GIC=y # CONFIG_IPACK_BUS is not set @@ -3824,7 +3885,7 @@ CONFIG_GENERIC_PHY=y CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set # CONFIG_PHY_ROCKCHIP_INNO_USB3 is not set -# CONFIG_PHY_ROCKCHIP_EMMC is not set +CONFIG_PHY_ROCKCHIP_EMMC=y CONFIG_PHY_ROCKCHIP_DP=y # CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set # CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set @@ -3846,6 +3907,7 @@ CONFIG_ANDROID=y # CONFIG_ANDROID_BINDER_IPC is not set CONFIG_NVMEM=y CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_OTP=y # CONFIG_STM is not set # CONFIG_INTEL_TH is not set @@ -3854,6 +3916,7 @@ CONFIG_ROCKCHIP_EFUSE=y # # CONFIG_FPGA is not set # CONFIG_TEE is not set +# CONFIG_RK_FLASH is not set # CONFIG_RK_NAND is not set # @@ -3866,7 +3929,7 @@ CONFIG_ROCKCHIP_EFUSE=y # # CONFIG_FIRMWARE_MEMMAP is not set CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_ROCKCHIP_SIP is not set +CONFIG_ROCKCHIP_SIP=y # # File systems @@ -3964,6 +4027,7 @@ CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set +CONFIG_PROC_UID=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y @@ -3993,6 +4057,7 @@ CONFIG_SQUASHFS_ZLIB=y CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 @@ -4415,6 +4480,7 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SPECK is not set # CONFIG_CRYPTO_TEA is not set CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_TWOFISH_COMMON=y @@ -4446,6 +4512,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y # CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ROCKCHIP is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_PUBLIC_KEY_ALGO_RSA=y @@ -4487,13 +4554,16 @@ CONFIG_CRC32_SLICEBY8=y CONFIG_CRC7=y CONFIG_LIBCRC32C=y # CONFIG_CRC8 is not set +CONFIG_XXHASH=y # CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y +CONFIG_LZO_COMPRESS=m CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set diff --git a/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf b/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf index bd42fa88d6..b529caf5bc 100644 --- a/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 4.4.114 Kernel Configuration +# Linux/arm64 4.4.143 Kernel Configuration # CONFIG_ARM64=y CONFIG_64BIT=y @@ -12,8 +12,8 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_SHIFT=4 -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y @@ -157,6 +157,7 @@ CONFIG_RD_GZIP=y CONFIG_RD_XZ=y # CONFIG_RD_LZO is not set # CONFIG_RD_LZ4 is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -392,6 +393,7 @@ CONFIG_ARM64_ERRATUM_819472=y # CONFIG_ARM64_ERRATUM_832075 is not set CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y +# CONFIG_ARM64_ERRATUM_1024718 is not set # CONFIG_CAVIUM_ERRATUM_22375 is not set # CONFIG_CAVIUM_ERRATUM_23154 is not set # CONFIG_CAVIUM_ERRATUM_27456 is not set @@ -434,9 +436,11 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_HAVE_MEMBLOCK=y CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set +CONFIG_MIGRATION=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y @@ -445,11 +449,14 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 # CONFIG_TRANSPARENT_HUGEPAGE is not set # CONFIG_CLEANCACHE is not set # CONFIG_FRONTSWAP is not set -# CONFIG_CMA is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +CONFIG_CMA_DEBUGFS=y +CONFIG_CMA_AREAS=7 # CONFIG_ZPOOL is not set # CONFIG_ZBUD is not set -CONFIG_ZSMALLOC=y -# CONFIG_PGTABLE_MAPPING is not set +CONFIG_ZSMALLOC=m +CONFIG_PGTABLE_MAPPING=y # CONFIG_ZSMALLOC_STAT is not set CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set @@ -475,7 +482,7 @@ CONFIG_ARM64_MODULE_CMODEL_LARGE=y # # Boot options # -CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1" +CONFIG_CMDLINE="usbcore.autosuspend=-1" # CONFIG_CMDLINE_FROM_BOOTLOADER is not set CONFIG_CMDLINE_EXTEND=y # CONFIG_CMDLINE_FORCE is not set @@ -549,13 +556,13 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_TIMES=y CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y @@ -934,7 +941,9 @@ CONFIG_RFKILL_GPIO=y # CONFIG_CEPH_LIB is not set # CONFIG_NFC is not set # CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y CONFIG_HAVE_BPF_JIT=y +CONFIG_HAVE_EBPF_JIT=y # # Device Drivers @@ -970,6 +979,17 @@ CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 # # Bus devices @@ -1074,8 +1094,8 @@ CONFIG_OF_RESERVED_MEM=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set -CONFIG_ZRAM=y -# CONFIG_ZRAM_LZ4_COMPRESS is not set +CONFIG_ZRAM=m +CONFIG_ZRAM_LZ4_COMPRESS=y # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set @@ -1538,6 +1558,7 @@ CONFIG_WL_ROCKCHIP=y CONFIG_WIFI_BUILD_MODULE=y # CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set CONFIG_AP6XXX=m +# CONFIG_CYW_BCMDHD is not set CONFIG_RTL_WIRELESS_SOLUTION=y # CONFIG_RTL8188EU is not set # CONFIG_RTL8188FU is not set @@ -1548,6 +1569,12 @@ CONFIG_RTL8723BS=m # CONFIG_RTL8723CS is not set # CONFIG_RTL8723DS is not set # CONFIG_RTL8822BE is not set +# CONFIG_MVL88W8977 is not set + +# +# SouthSV 6XXX WLAN support +# +# CONFIG_SSV6051 is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set @@ -1683,6 +1710,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y # CONFIG_TOUCHSCREEN_FT6236 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680A is not set # CONFIG_TOUCHSCREEN_GSLX680_D708 is not set # CONFIG_TOUCHSCREEN_GSLX680_PAD is not set # CONFIG_TOUCHSCREEN_GSLX680_VR is not set @@ -2026,6 +2054,7 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set +CONFIG_PINCTRL_RK805=y CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y @@ -2116,6 +2145,7 @@ CONFIG_CHARGER_BQ24735=y # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_CHARGER_SY6982C is not set +# CONFIG_CHARGER_UNIVERSAL is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_BATTERY_EC is not set # CONFIG_BATTERY_CW2015 is not set @@ -2458,6 +2488,7 @@ CONFIG_REGULATOR_RK808=y CONFIG_REGULATOR_RK818=y # CONFIG_REGULATOR_SYR82X is not set # CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS549B22 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set @@ -2501,15 +2532,15 @@ CONFIG_IR_SHARP_DECODER=y CONFIG_IR_MCE_KBD_DECODER=y CONFIG_IR_XMP_DECODER=y CONFIG_RC_DEVICES=y -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_IR_HIX5HD2 is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_IGORPLUGUSB is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_TTUSBIR is not set +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_HIX5HD2=m +CONFIG_IR_IMON=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_STREAMZAP=m +CONFIG_IR_IGORPLUGUSB=m +CONFIG_IR_IGUANA=m +CONFIG_IR_TTUSBIR=m # CONFIG_RC_LOOPBACK is not set CONFIG_IR_GPIO_CIR=y CONFIG_MEDIA_USB_SUPPORT=y @@ -2520,6 +2551,7 @@ CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_PULSE8_CEC=y CONFIG_USB_RAINSHADOW_CEC=y # CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_ROCKCHIP_TSP is not set # # Supported MMC/SDIO adapters @@ -2555,7 +2587,7 @@ CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set # CONFIG_DRM_SCDC_HELPER is not set -CONFIG_DRM_DMA_SYNC=y +# CONFIG_DRM_DMA_SYNC is not set # # I2C encoder or helper chips @@ -2574,6 +2606,7 @@ CONFIG_DRM_DMA_SYNC=y # CONFIG_DRM_SAVAGE is not set # CONFIG_DRM_VGEM is not set CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_DRM_DEBUG is not set # CONFIG_ROCKCHIP_CDN_DP is not set CONFIG_ROCKCHIP_DW_HDMI=y CONFIG_ROCKCHIP_DW_MIPI_DSI=y @@ -2609,6 +2642,7 @@ CONFIG_DRM_BRIDGE=y # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_RK1000 is not set # CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LONTIUM_LT8912 is not set CONFIG_DRM_ANALOGIX_DP=y CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set @@ -2627,11 +2661,11 @@ CONFIG_MALI_DMA_BUF_MAP_ON_ATTACH=y CONFIG_MALI_DT=y CONFIG_MALI_DEVFREQ=y # CONFIG_MALI_QUIET is not set -CONFIG_MALI_MIDGARD_FOR_ANDROID=y -# CONFIG_MALI_MIDGARD_FOR_LINUX is not set # CONFIG_MALI_MIDGARD is not set +# CONFIG_MALI_KUTF is not set +# CONFIG_MALI_BIFROST_FOR_ANDROID is not set +CONFIG_MALI_BIFROST_FOR_LINUX=y # CONFIG_MALI_BIFROST is not set -# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2842,13 +2876,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set CONFIG_SND_SOC_ROCKCHIP=y +# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set +# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set # CONFIG_SND_SOC_ROCKCHIP_PDM is not set CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set +# CONFIG_SND_SOC_ROCKCHIP_VAD is not set # CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set CONFIG_SND_SOC_ROCKCHIP_RT5645=y # CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set # CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set @@ -2884,6 +2924,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_DUMMY_CODEC is not set # CONFIG_SND_SOC_BT_SCO is not set CONFIG_SND_SOC_ES8316=y # CONFIG_SND_SOC_ES8323 is not set @@ -2901,6 +2942,7 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set # CONFIG_SND_SOC_RK3228 is not set +# CONFIG_SND_SOC_RK3308 is not set CONFIG_SND_SOC_RK3328=y # CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y @@ -3471,6 +3513,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_FAKE is not set CONFIG_RTC_DRV_HYM8563=y # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_RK808=y @@ -3694,6 +3737,7 @@ CONFIG_TSL2583=y # CONFIG_ANDROID_TIMED_OUTPUT is not set # CONFIG_ANDROID_LOW_MEMORY_KILLER is not set # CONFIG_SYNC is not set +# CONFIG_ANDROID_VSOC is not set # CONFIG_ION is not set # CONFIG_FIQ_DEBUGGER is not set # CONFIG_FIQ_WATCHDOG is not set @@ -3729,7 +3773,7 @@ CONFIG_COMMON_CLK_RK808=y # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_CLK_QORIQ is not set -CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_XGENE is not set # CONFIG_COMMON_CLK_PWM is not set # CONFIG_COMMON_CLK_PXA is not set # CONFIG_COMMON_CLK_CDCE706 is not set @@ -3746,7 +3790,7 @@ CONFIG_CLKSRC_PROBE=y CONFIG_ROCKCHIP_TIMER=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set +CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y # CONFIG_ARM_TIMER_SP804 is not set # CONFIG_ATMEL_PIT is not set # CONFIG_SH_TIMER_CMT is not set @@ -3786,13 +3830,23 @@ CONFIG_ROCKCHIP_IOMMU=y # # SOC (System On Chip) specific Drivers # + +# +# CPU selection +# +# CONFIG_CPU_PX30 is not set +# CONFIG_CPU_RK3308 is not set +CONFIG_CPU_RK3328=y +# CONFIG_CPU_RK3366 is not set +# CONFIG_CPU_RK3368 is not set +# CONFIG_CPU_RK3399 is not set CONFIG_ANDROID_VERSION=0x07010000 CONFIG_ROCKCHIP_CPUINFO=y # CONFIG_ROCKCHIP_DEVICEINFO is not set # CONFIG_ROCKCHIP_PM_TEST is not set CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_PVTM is not set +CONFIG_ROCKCHIP_PVTM=y CONFIG_ROCKCHIP_SUSPEND_MODE=y # CONFIG_SUNXI_SRAM is not set # CONFIG_SOC_TI is not set @@ -3809,6 +3863,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y # # DEVFREQ Drivers # +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y @@ -3981,6 +4036,7 @@ CONFIG_SENSORS_TSL2563=y # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set +# CONFIG_VL6180 is not set # # Magnetometer sensors @@ -4042,8 +4098,10 @@ CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_CROS_EC is not set # CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_GPIO=y # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y +# CONFIG_PWM_ROCKCHIP_I2S is not set CONFIG_IRQCHIP=y CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y @@ -4091,6 +4149,7 @@ CONFIG_ANDROID=y # CONFIG_LIBNVDIMM is not set CONFIG_NVMEM=y CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_OTP=y # CONFIG_STM is not set # CONFIG_INTEL_TH is not set @@ -4099,6 +4158,7 @@ CONFIG_ROCKCHIP_EFUSE=y # # CONFIG_FPGA is not set # CONFIG_TEE is not set +# CONFIG_RK_FLASH is not set # CONFIG_RK_NAND is not set # @@ -4213,6 +4273,7 @@ CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set +CONFIG_PROC_UID=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y @@ -4244,6 +4305,7 @@ CONFIG_SQUASHFS_ZLIB=y CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 @@ -4665,6 +4727,7 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SPECK is not set # CONFIG_CRYPTO_TEA is not set CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_TWOFISH_COMMON=y @@ -4697,6 +4760,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_ROCKCHIP is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_PUBLIC_KEY_ALGO_RSA=y @@ -4719,6 +4783,7 @@ CONFIG_CRYPTO_AES_ARM64_CE_CCM=y CONFIG_CRYPTO_AES_ARM64_CE_BLK=y # CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set # CONFIG_CRYPTO_CRC32_ARM64 is not set +# CONFIG_CRYPTO_SPECK_NEON is not set CONFIG_BINARY_PRINTF=y # @@ -4747,13 +4812,16 @@ CONFIG_CRC32_SLICEBY8=y CONFIG_CRC7=y CONFIG_LIBCRC32C=y # CONFIG_CRC8 is not set +CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y +CONFIG_LZO_COMPRESS=m CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set diff --git a/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf b/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf index fa01682626..5c05047bac 100644 --- a/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 4.4.114 Kernel Configuration +# Linux/arm64 4.4.143 Kernel Configuration # CONFIG_ARM64=y CONFIG_64BIT=y @@ -12,8 +12,8 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_SHIFT=4 -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y @@ -157,6 +157,7 @@ CONFIG_RD_GZIP=y CONFIG_RD_XZ=y # CONFIG_RD_LZO is not set # CONFIG_RD_LZ4 is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -392,6 +393,7 @@ CONFIG_ARM64_ERRATUM_819472=y # CONFIG_ARM64_ERRATUM_832075 is not set CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y +# CONFIG_ARM64_ERRATUM_1024718 is not set # CONFIG_CAVIUM_ERRATUM_22375 is not set # CONFIG_CAVIUM_ERRATUM_23154 is not set # CONFIG_CAVIUM_ERRATUM_27456 is not set @@ -434,9 +436,11 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_HAVE_MEMBLOCK=y CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set +CONFIG_MIGRATION=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y @@ -445,11 +449,14 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 # CONFIG_TRANSPARENT_HUGEPAGE is not set # CONFIG_CLEANCACHE is not set # CONFIG_FRONTSWAP is not set -# CONFIG_CMA is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +CONFIG_CMA_DEBUGFS=y +CONFIG_CMA_AREAS=7 # CONFIG_ZPOOL is not set # CONFIG_ZBUD is not set -CONFIG_ZSMALLOC=y -# CONFIG_PGTABLE_MAPPING is not set +CONFIG_ZSMALLOC=m +CONFIG_PGTABLE_MAPPING=y # CONFIG_ZSMALLOC_STAT is not set CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set @@ -475,7 +482,7 @@ CONFIG_ARM64_MODULE_CMODEL_LARGE=y # # Boot options # -CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1" +CONFIG_CMDLINE="usbcore.autosuspend=-1" # CONFIG_CMDLINE_FROM_BOOTLOADER is not set CONFIG_CMDLINE_EXTEND=y # CONFIG_CMDLINE_FORCE is not set @@ -549,13 +556,13 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_TIMES=y # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y @@ -934,7 +941,9 @@ CONFIG_RFKILL_GPIO=y # CONFIG_CEPH_LIB is not set # CONFIG_NFC is not set # CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y CONFIG_HAVE_BPF_JIT=y +CONFIG_HAVE_EBPF_JIT=y # # Device Drivers @@ -970,6 +979,17 @@ CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 # # Bus devices @@ -1074,8 +1094,8 @@ CONFIG_OF_RESERVED_MEM=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set -CONFIG_ZRAM=y -# CONFIG_ZRAM_LZ4_COMPRESS is not set +CONFIG_ZRAM=m +CONFIG_ZRAM_LZ4_COMPRESS=y # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set @@ -1538,6 +1558,7 @@ CONFIG_WL_ROCKCHIP=y CONFIG_WIFI_BUILD_MODULE=y # CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set CONFIG_AP6XXX=m +# CONFIG_CYW_BCMDHD is not set CONFIG_RTL_WIRELESS_SOLUTION=y # CONFIG_RTL8188EU is not set # CONFIG_RTL8188FU is not set @@ -1548,6 +1569,12 @@ CONFIG_RTL8723BS=m # CONFIG_RTL8723CS is not set # CONFIG_RTL8723DS is not set # CONFIG_RTL8822BE is not set +# CONFIG_MVL88W8977 is not set + +# +# SouthSV 6XXX WLAN support +# +# CONFIG_SSV6051 is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set @@ -1683,6 +1710,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y # CONFIG_TOUCHSCREEN_FT6236 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680A is not set # CONFIG_TOUCHSCREEN_GSLX680_D708 is not set # CONFIG_TOUCHSCREEN_GSLX680_PAD is not set # CONFIG_TOUCHSCREEN_GSLX680_VR is not set @@ -2026,6 +2054,7 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_RK805 is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y @@ -2116,6 +2145,7 @@ CONFIG_CHARGER_BQ24735=y # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_CHARGER_SY6982C is not set +# CONFIG_CHARGER_UNIVERSAL is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_BATTERY_EC is not set # CONFIG_BATTERY_CW2015 is not set @@ -2458,6 +2488,7 @@ CONFIG_REGULATOR_RK808=y CONFIG_REGULATOR_RK818=y # CONFIG_REGULATOR_SYR82X is not set # CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS549B22 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set @@ -2501,15 +2532,15 @@ CONFIG_IR_SHARP_DECODER=y CONFIG_IR_MCE_KBD_DECODER=y CONFIG_IR_XMP_DECODER=y CONFIG_RC_DEVICES=y -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_IR_HIX5HD2 is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_IGORPLUGUSB is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_TTUSBIR is not set +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_HIX5HD2=m +CONFIG_IR_IMON=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_STREAMZAP=m +CONFIG_IR_IGORPLUGUSB=m +CONFIG_IR_IGUANA=m +CONFIG_IR_TTUSBIR=m # CONFIG_RC_LOOPBACK is not set CONFIG_IR_GPIO_CIR=y CONFIG_MEDIA_USB_SUPPORT=y @@ -2520,6 +2551,7 @@ CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_PULSE8_CEC=y CONFIG_USB_RAINSHADOW_CEC=y # CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_ROCKCHIP_TSP is not set # # Supported MMC/SDIO adapters @@ -2555,7 +2587,7 @@ CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set # CONFIG_DRM_SCDC_HELPER is not set -CONFIG_DRM_DMA_SYNC=y +# CONFIG_DRM_DMA_SYNC is not set # # I2C encoder or helper chips @@ -2574,7 +2606,8 @@ CONFIG_DRM_DMA_SYNC=y # CONFIG_DRM_SAVAGE is not set # CONFIG_DRM_VGEM is not set CONFIG_DRM_ROCKCHIP=y -# CONFIG_ROCKCHIP_CDN_DP is not set +# CONFIG_ROCKCHIP_DRM_DEBUG is not set +CONFIG_ROCKCHIP_CDN_DP=y CONFIG_ROCKCHIP_DW_HDMI=y CONFIG_ROCKCHIP_DW_MIPI_DSI=y CONFIG_ROCKCHIP_ANALOGIX_DP=y @@ -2609,6 +2642,7 @@ CONFIG_DRM_BRIDGE=y # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_RK1000 is not set # CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LONTIUM_LT8912 is not set CONFIG_DRM_ANALOGIX_DP=y CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set @@ -2617,13 +2651,12 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_POWERVR_ROGUE_M is not set # CONFIG_MALI400 is not set CONFIG_MALI_DEVFREQ=y -CONFIG_MALI_MIDGARD_FOR_ANDROID=y -# CONFIG_MALI_MIDGARD_FOR_LINUX is not set CONFIG_MALI_MIDGARD=m # CONFIG_MALI_GATOR_SUPPORT is not set # CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set # CONFIG_MALI_DMA_FENCE is not set CONFIG_MALI_EXPERT=y +# CONFIG_MALI_CORESTACK is not set # CONFIG_MALI_PRFCNT_SET_SECONDARY is not set # CONFIG_MALI_PLATFORM_FAKE is not set # CONFIG_MALI_PLATFORM_DEVICETREE is not set @@ -2634,8 +2667,11 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" # CONFIG_MALI_TRACE_TIMELINE is not set # CONFIG_MALI_SYSTEM_TRACE is not set # CONFIG_MALI_GPU_MMU_AARCH64 is not set +CONFIG_MALI_PWRSOFT_765=y +# CONFIG_MALI_KUTF is not set +# CONFIG_MALI_BIFROST_FOR_ANDROID is not set +CONFIG_MALI_BIFROST_FOR_LINUX=y # CONFIG_MALI_BIFROST is not set -# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2846,13 +2882,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set CONFIG_SND_SOC_ROCKCHIP=y +# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set +# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set # CONFIG_SND_SOC_ROCKCHIP_PDM is not set CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set +# CONFIG_SND_SOC_ROCKCHIP_VAD is not set # CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set CONFIG_SND_SOC_ROCKCHIP_RT5645=y # CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set # CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set @@ -2888,6 +2930,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_DUMMY_CODEC is not set # CONFIG_SND_SOC_BT_SCO is not set CONFIG_SND_SOC_ES8316=y # CONFIG_SND_SOC_ES8323 is not set @@ -2905,7 +2948,8 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set # CONFIG_SND_SOC_RK3228 is not set -CONFIG_SND_SOC_RK3328=y +# CONFIG_SND_SOC_RK3308 is not set +# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y CONFIG_SND_SOC_RT5616=y @@ -3475,6 +3519,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_FAKE is not set CONFIG_RTC_DRV_HYM8563=y # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_RK808=y @@ -3698,6 +3743,7 @@ CONFIG_TSL2583=y # CONFIG_ANDROID_TIMED_OUTPUT is not set # CONFIG_ANDROID_LOW_MEMORY_KILLER is not set # CONFIG_SYNC is not set +# CONFIG_ANDROID_VSOC is not set # CONFIG_ION is not set # CONFIG_FIQ_DEBUGGER is not set # CONFIG_FIQ_WATCHDOG is not set @@ -3733,7 +3779,7 @@ CONFIG_COMMON_CLK_RK808=y # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_CLK_QORIQ is not set -CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_XGENE is not set # CONFIG_COMMON_CLK_PWM is not set # CONFIG_COMMON_CLK_PXA is not set # CONFIG_COMMON_CLK_CDCE706 is not set @@ -3750,7 +3796,7 @@ CONFIG_CLKSRC_PROBE=y CONFIG_ROCKCHIP_TIMER=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set +CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y # CONFIG_ARM_TIMER_SP804 is not set # CONFIG_ATMEL_PIT is not set # CONFIG_SH_TIMER_CMT is not set @@ -3790,13 +3836,23 @@ CONFIG_ROCKCHIP_IOMMU=y # # SOC (System On Chip) specific Drivers # + +# +# CPU selection +# +# CONFIG_CPU_PX30 is not set +# CONFIG_CPU_RK3308 is not set +# CONFIG_CPU_RK3328 is not set +# CONFIG_CPU_RK3366 is not set +# CONFIG_CPU_RK3368 is not set +CONFIG_CPU_RK3399=y CONFIG_ANDROID_VERSION=0x07010000 CONFIG_ROCKCHIP_CPUINFO=y # CONFIG_ROCKCHIP_DEVICEINFO is not set # CONFIG_ROCKCHIP_PM_TEST is not set CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_PVTM is not set +CONFIG_ROCKCHIP_PVTM=y CONFIG_ROCKCHIP_SUSPEND_MODE=y # CONFIG_SUNXI_SRAM is not set # CONFIG_SOC_TI is not set @@ -3813,6 +3869,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y # # DEVFREQ Drivers # +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y @@ -3985,6 +4042,7 @@ CONFIG_SENSORS_TSL2563=y # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set +# CONFIG_VL6180 is not set # # Magnetometer sensors @@ -4046,8 +4104,10 @@ CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_CROS_EC is not set # CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_GPIO=y # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y +# CONFIG_PWM_ROCKCHIP_I2S is not set CONFIG_IRQCHIP=y CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y @@ -4095,6 +4155,7 @@ CONFIG_ANDROID=y # CONFIG_LIBNVDIMM is not set CONFIG_NVMEM=y CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_OTP=y # CONFIG_STM is not set # CONFIG_INTEL_TH is not set @@ -4103,6 +4164,7 @@ CONFIG_ROCKCHIP_EFUSE=y # # CONFIG_FPGA is not set # CONFIG_TEE is not set +# CONFIG_RK_FLASH is not set # CONFIG_RK_NAND is not set # @@ -4217,6 +4279,7 @@ CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set +CONFIG_PROC_UID=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y @@ -4248,6 +4311,7 @@ CONFIG_SQUASHFS_ZLIB=y CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 @@ -4670,6 +4734,7 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SPECK is not set # CONFIG_CRYPTO_TEA is not set CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_TWOFISH_COMMON=y @@ -4702,6 +4767,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_ROCKCHIP is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_PUBLIC_KEY_ALGO_RSA=y @@ -4724,6 +4790,7 @@ CONFIG_CRYPTO_AES_ARM64_CE_CCM=y CONFIG_CRYPTO_AES_ARM64_CE_BLK=y # CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set # CONFIG_CRYPTO_CRC32_ARM64 is not set +# CONFIG_CRYPTO_SPECK_NEON is not set CONFIG_BINARY_PRINTF=y # @@ -4752,13 +4819,16 @@ CONFIG_CRC32_SLICEBY8=y CONFIG_CRC7=y CONFIG_LIBCRC32C=y # CONFIG_CRC8 is not set +CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y +CONFIG_LZO_COMPRESS=m CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set diff --git a/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf b/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf index caa7b31407..5c054b8749 100644 --- a/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf +++ b/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.4.114 Kernel Configuration +# Linux/arm 4.4.143 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y @@ -152,6 +152,7 @@ CONFIG_RD_GZIP=y CONFIG_RD_XZ=y # CONFIG_RD_LZO is not set # CONFIG_RD_LZ4 is not set +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -237,6 +238,7 @@ CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_BITS_MAX=16 CONFIG_ARCH_MMAP_RND_BITS=8 @@ -471,7 +473,6 @@ CONFIG_ARM_CPU_TOPOLOGY=y # CONFIG_SCHED_SMT is not set CONFIG_HAVE_ARM_SCU=y CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_TWD=y # CONFIG_MCPM is not set # CONFIG_BIG_LITTLE is not set CONFIG_VMSPLIT_3G=y @@ -511,9 +512,11 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_HAVE_MEMBLOCK=y CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set +CONFIG_MIGRATION=y # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_BOUNCE=y @@ -521,11 +524,14 @@ CONFIG_BOUNCE=y CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 # CONFIG_CLEANCACHE is not set # CONFIG_FRONTSWAP is not set -# CONFIG_CMA is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +CONFIG_CMA_DEBUGFS=y +CONFIG_CMA_AREAS=7 # CONFIG_ZPOOL is not set # CONFIG_ZBUD is not set -CONFIG_ZSMALLOC=y -# CONFIG_PGTABLE_MAPPING is not set +CONFIG_ZSMALLOC=m +CONFIG_PGTABLE_MAPPING=y # CONFIG_ZSMALLOC_STAT is not set # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_FORCE_MAX_ZONEORDER=11 @@ -547,7 +553,7 @@ CONFIG_ATAGS=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 # CONFIG_ARM_APPENDED_DTB is not set -CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1" +CONFIG_CMDLINE="usbcore.autosuspend=-1" # CONFIG_CMDLINE_FROM_BOOTLOADER is not set CONFIG_CMDLINE_EXTEND=y # CONFIG_CMDLINE_FORCE is not set @@ -566,13 +572,13 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_TIMES=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y @@ -1016,6 +1022,7 @@ CONFIG_RFKILL_GPIO=y # CONFIG_CEPH_LIB is not set # CONFIG_NFC is not set # CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y CONFIG_HAVE_BPF_JIT=y # @@ -1051,6 +1058,17 @@ CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 # # Bus devices @@ -1078,8 +1096,8 @@ CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=y -# CONFIG_ZRAM_LZ4_COMPRESS is not set +CONFIG_ZRAM=m +CONFIG_ZRAM_LZ4_COMPRESS=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 @@ -1097,7 +1115,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # Misc devices # -# CONFIG_ROCKCHIP_SCR is not set +CONFIG_ROCKCHIP_SCR=y # CONFIG_SENSORS_LIS3LV02D is not set # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set @@ -1329,7 +1347,7 @@ CONFIG_PHYLIB=y # CONFIG_CICADA_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_TERANETICS_PHY is not set -# CONFIG_ROCKCHIP_PHY is not set +CONFIG_ROCKCHIP_PHY=y # CONFIG_SMSC_PHY is not set # CONFIG_BROADCOM_PHY is not set # CONFIG_BCM7XXX_PHY is not set @@ -1432,18 +1450,25 @@ CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RTL_CARDS is not set # CONFIG_RTL8XXXU is not set CONFIG_WL_ROCKCHIP=y -# CONFIG_WIFI_BUILD_MODULE is not set -CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y +CONFIG_WIFI_BUILD_MODULE=y +# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set # CONFIG_AP6XXX is not set +# CONFIG_CYW_BCMDHD is not set CONFIG_RTL_WIRELESS_SOLUTION=y # CONFIG_RTL8188EU is not set # CONFIG_RTL8188FU is not set # CONFIG_RTL8189ES is not set # CONFIG_RTL8189FS is not set -CONFIG_RTL8723BS=y +CONFIG_RTL8723BS=m # CONFIG_RTL8723BU is not set # CONFIG_RTL8723CS is not set # CONFIG_RTL8723DS is not set +# CONFIG_MVL88W8977 is not set + +# +# SouthSV 6XXX WLAN support +# +# CONFIG_SSV6051 is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set @@ -1578,6 +1603,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y # CONFIG_TOUCHSCREEN_FT6236 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680A is not set # CONFIG_TOUCHSCREEN_GSLX680_D708 is not set # CONFIG_TOUCHSCREEN_GSLX680_PAD is not set # CONFIG_TOUCHSCREEN_GSLX680_VR is not set @@ -1892,6 +1918,7 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_RK805 is not set CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y CONFIG_ARCH_REQUIRE_GPIOLIB=y @@ -2304,6 +2331,7 @@ CONFIG_REGULATOR_RK808=y # CONFIG_REGULATOR_RK818 is not set # CONFIG_REGULATOR_SYR82X is not set # CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS549B22 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set @@ -2311,6 +2339,7 @@ CONFIG_REGULATOR_RK808=y CONFIG_REGULATOR_TPS6586X=y # CONFIG_REGULATOR_XZ3216 is not set CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y CONFIG_MEDIA_SUPPORT=y # @@ -2346,15 +2375,15 @@ CONFIG_IR_SHARP_DECODER=y CONFIG_IR_MCE_KBD_DECODER=y CONFIG_IR_XMP_DECODER=y CONFIG_RC_DEVICES=y -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_IR_HIX5HD2 is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_IGORPLUGUSB is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_TTUSBIR is not set +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_HIX5HD2=m +CONFIG_IR_IMON=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_STREAMZAP=m +CONFIG_IR_IGORPLUGUSB=m +CONFIG_IR_IGUANA=m +CONFIG_IR_TTUSBIR=m # CONFIG_RC_LOOPBACK is not set CONFIG_IR_GPIO_CIR=y CONFIG_MEDIA_USB_SUPPORT=y @@ -2364,6 +2393,7 @@ CONFIG_MEDIA_USB_SUPPORT=y # CONFIG_USB_PULSE8_CEC=y CONFIG_USB_RAINSHADOW_CEC=y +# CONFIG_ROCKCHIP_TSP is not set # # Supported MMC/SDIO adapters @@ -2399,7 +2429,7 @@ CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set # CONFIG_DRM_SCDC_HELPER is not set -CONFIG_DRM_DMA_SYNC=y +# CONFIG_DRM_DMA_SYNC is not set # # I2C encoder or helper chips @@ -2411,13 +2441,14 @@ CONFIG_DRM_DMA_SYNC=y # CONFIG_DRM_VGEM is not set # CONFIG_DRM_EXYNOS is not set CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_DRM_DEBUG is not set # CONFIG_ROCKCHIP_CDN_DP is not set CONFIG_ROCKCHIP_DW_HDMI=y CONFIG_ROCKCHIP_DW_MIPI_DSI=y CONFIG_ROCKCHIP_ANALOGIX_DP=y CONFIG_ROCKCHIP_INNO_HDMI=y CONFIG_ROCKCHIP_LVDS=y -# CONFIG_ROCKCHIP_DRM_TVE is not set +CONFIG_ROCKCHIP_DRM_TVE=y # CONFIG_ROCKCHIP_RGB is not set # CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set # CONFIG_ROCKCHIP_RK3066_HDMI is not set @@ -2444,22 +2475,22 @@ CONFIG_DRM_BRIDGE=y # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_RK1000 is not set # CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LONTIUM_LT8912 is not set CONFIG_DRM_ANALOGIX_DP=y CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set CONFIG_DRM_DW_HDMI_I2S_AUDIO=y -# CONFIG_DRM_DW_HDMI_CEC is not set +CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_DRM_STI is not set # CONFIG_POWERVR_ROGUE_M is not set # CONFIG_MALI400 is not set CONFIG_MALI_DEVFREQ=y -CONFIG_MALI_MIDGARD_FOR_ANDROID=y -# CONFIG_MALI_MIDGARD_FOR_LINUX is not set CONFIG_MALI_MIDGARD=m # CONFIG_MALI_GATOR_SUPPORT is not set # CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set # CONFIG_MALI_DMA_FENCE is not set CONFIG_MALI_EXPERT=y +# CONFIG_MALI_CORESTACK is not set # CONFIG_MALI_PRFCNT_SET_SECONDARY is not set # CONFIG_MALI_PLATFORM_FAKE is not set # CONFIG_MALI_PLATFORM_DEVICETREE is not set @@ -2470,8 +2501,11 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" # CONFIG_MALI_TRACE_TIMELINE is not set # CONFIG_MALI_SYSTEM_TRACE is not set # CONFIG_MALI_GPU_MMU_AARCH64 is not set +CONFIG_MALI_PWRSOFT_765=y +# CONFIG_MALI_KUTF is not set +# CONFIG_MALI_BIFROST_FOR_ANDROID is not set +CONFIG_MALI_BIFROST_FOR_LINUX=y # CONFIG_MALI_BIFROST is not set -# CONFIG_MALI_PWRSOFT_765 is not set # # Frame buffer Devices @@ -2568,7 +2602,8 @@ CONFIG_RK_VCODEC=y # # ROCKCHIP_MPP # -# CONFIG_ROCKCHIP_MPP_SERVICE is not set +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_DEVICE=y # CONFIG_VGASTATE is not set CONFIG_VIDEOMODE_HELPERS=y CONFIG_HDMI=y @@ -2656,13 +2691,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set CONFIG_SND_SOC_ROCKCHIP=y +# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set +# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set # CONFIG_SND_SOC_ROCKCHIP_PDM is not set CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set +# CONFIG_SND_SOC_ROCKCHIP_VAD is not set # CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set # CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set CONFIG_SND_SOC_ROCKCHIP_RT5645=y # CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set # CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set @@ -2698,6 +2739,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_DUMMY_CODEC is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_ES8316 is not set CONFIG_SND_SOC_ES8323=y @@ -2715,6 +2757,7 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK312X is not set # CONFIG_SND_SOC_RK3228 is not set +# CONFIG_SND_SOC_RK3308 is not set # CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=y @@ -3061,7 +3104,6 @@ CONFIG_USB_EZUSB_FX2=y # CONFIG_USB_PHY is not set # CONFIG_USB_OTG_WAKELOCK is not set # CONFIG_NOP_USB_XCEIV is not set -# CONFIG_AM335X_PHY_USB is not set # CONFIG_USB_GPIO_VBUS is not set # CONFIG_USB_ISP1301 is not set # CONFIG_USB_ULPI is not set @@ -3255,6 +3297,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_FAKE is not set CONFIG_RTC_DRV_HYM8563=y # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_RK808=y @@ -3518,15 +3561,11 @@ CONFIG_COMMON_CLK_RK808=y # CONFIG_CLKSRC_OF=y CONFIG_CLKSRC_PROBE=y -CONFIG_DW_APB_TIMER=y -CONFIG_DW_APB_TIMER_OF=y CONFIG_ROCKCHIP_TIMER=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y -CONFIG_ARM_GLOBAL_TIMER=y # CONFIG_ARM_TIMER_SP804 is not set -CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y # CONFIG_ATMEL_PIT is not set # CONFIG_SH_TIMER_CMT is not set # CONFIG_SH_TIMER_MTU2 is not set @@ -3560,13 +3599,31 @@ CONFIG_ROCKCHIP_IOMMU=y # SOC (System On Chip) specific Drivers # # CONFIG_SOC_BRCMSTB is not set + +# +# CPU selection +# +# CONFIG_CPU_RK312X is not set +# CONFIG_CPU_RK3036 is not set +# CONFIG_CPU_RK30XX is not set +# CONFIG_CPU_RK3188 is not set +CONFIG_CPU_RK3288=y +# CONFIG_CPU_RK322X is not set +# CONFIG_CPU_RV110X is not set +# CONFIG_CPU_PX30 is not set +# CONFIG_CPU_RK3308 is not set +# CONFIG_CPU_RK3328 is not set +# CONFIG_CPU_RK3366 is not set +# CONFIG_CPU_RK3368 is not set +# CONFIG_CPU_RK3399 is not set CONFIG_ANDROID_VERSION=0x07010000 CONFIG_ROCKCHIP_CPUINFO=y # CONFIG_ROCKCHIP_DEVICEINFO is not set # CONFIG_ROCKCHIP_PM_TEST is not set CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_PM_DOMAINS=y -# CONFIG_ROCKCHIP_PVTM is not set +CONFIG_ROCKCHIP_PVTM=y +CONFIG_ROCKCHIP_SUSPEND_MODE=y # CONFIG_SUNXI_SRAM is not set # CONFIG_SOC_TI is not set CONFIG_PM_DEVFREQ=y @@ -3582,6 +3639,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y # # DEVFREQ Drivers # +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y @@ -3745,6 +3803,7 @@ CONFIG_SENSORS_TSL2563=y # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set +# CONFIG_VL6180 is not set # # Magnetometer sensors @@ -3804,8 +3863,10 @@ CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_CROS_EC is not set # CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_GPIO=y # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y +# CONFIG_PWM_ROCKCHIP_I2S is not set CONFIG_IRQCHIP=y CONFIG_ARM_GIC=y # CONFIG_IPACK_BUS is not set @@ -3824,7 +3885,7 @@ CONFIG_GENERIC_PHY=y CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set # CONFIG_PHY_ROCKCHIP_INNO_USB3 is not set -# CONFIG_PHY_ROCKCHIP_EMMC is not set +CONFIG_PHY_ROCKCHIP_EMMC=y CONFIG_PHY_ROCKCHIP_DP=y # CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set # CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set @@ -3846,6 +3907,7 @@ CONFIG_ANDROID=y # CONFIG_ANDROID_BINDER_IPC is not set CONFIG_NVMEM=y CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_OTP=y # CONFIG_STM is not set # CONFIG_INTEL_TH is not set @@ -3854,6 +3916,7 @@ CONFIG_ROCKCHIP_EFUSE=y # # CONFIG_FPGA is not set # CONFIG_TEE is not set +# CONFIG_RK_FLASH is not set # CONFIG_RK_NAND is not set # @@ -3866,7 +3929,7 @@ CONFIG_ROCKCHIP_EFUSE=y # # CONFIG_FIRMWARE_MEMMAP is not set CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_ROCKCHIP_SIP is not set +CONFIG_ROCKCHIP_SIP=y # # File systems @@ -3964,6 +4027,7 @@ CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set +CONFIG_PROC_UID=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y @@ -3993,6 +4057,7 @@ CONFIG_SQUASHFS_ZLIB=y CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 @@ -4415,6 +4480,7 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SPECK is not set # CONFIG_CRYPTO_TEA is not set CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_TWOFISH_COMMON=y @@ -4446,6 +4512,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y # CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ROCKCHIP is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_PUBLIC_KEY_ALGO_RSA=y @@ -4487,13 +4554,16 @@ CONFIG_CRC32_SLICEBY8=y CONFIG_CRC7=y CONFIG_LIBCRC32C=y # CONFIG_CRC8 is not set +CONFIG_XXHASH=y # CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=y +CONFIG_LZO_COMPRESS=m CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=m CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set diff --git a/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch deleted file mode 100644 index bf75e56d6b..0000000000 --- a/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch +++ /dev/null @@ -1,287 +0,0 @@ -From f490b48f29fb0b976b7f3d749f14dd4bbb95705a Mon Sep 17 00:00:00 2001 -From: Ziyuan Xu -Date: Fri, 23 Sep 2016 13:43:18 +0800 -Subject: [PATCH] MINIARM: HACK: switch vccio_sd to 3.3v while shutdowning - -Change-Id: I80d6d2b61b31f16b6b42b9ffcaab077231a7a91c -Signed-off-by: Ziyuan Xu ---- - drivers/mmc/host/dw_mmc-rockchip.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c -index 29e3ae99edbc..531ad93ff912 100644 ---- a/drivers/mmc/host/dw_mmc-rockchip.c -+++ b/drivers/mmc/host/dw_mmc-rockchip.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - - #include "dw_mmc.h" -@@ -285,6 +286,15 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev) - return dw_mci_pltfm_register(pdev, drv_data); - } - -+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) -+{ -+ struct dw_mci *host = platform_get_drvdata(pdev); -+ struct mmc_host *mmc = host->cur_slot->mmc; -+ -+ if (!IS_ERR(mmc->supply.vqmmc)) -+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); -+} -+ - #ifdef CONFIG_PM_SLEEP - static int dw_mci_rockchip_suspend(struct device *dev) - { -@@ -308,6 +318,7 @@ static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops, - static struct platform_driver dw_mci_rockchip_pltfm_driver = { - .probe = dw_mci_rockchip_probe, - .remove = dw_mci_pltfm_remove, -+ .shutdown = dw_mci_rockchip_platfm_shutdown, - .driver = { - .name = "dwmmc_rockchip", - .of_match_table = dw_mci_rockchip_match, - -From dcd64488045c2c7b54f4257a0f5e6d56f93f28f6 Mon Sep 17 00:00:00 2001 -From: Ziyuan Xu -Date: Mon, 6 Feb 2017 08:39:46 +0800 -Subject: [PATCH] MINIARM: HACK: mmc: dw_mmc-rockchip: enable vmmc supply for - reboot - -Mmc core has already power off the vmmc since shutdown, re-enable it so -that card is active in next reboot. - -Change-Id: Id64ed02844db9d834c820ed5b8c5bf7a0afe4ed5 -Signed-off-by: Ziyuan Xu ---- - drivers/mmc/host/dw_mmc-rockchip.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c -index 531ad93ff912..eae304077e17 100644 ---- a/drivers/mmc/host/dw_mmc-rockchip.c -+++ b/drivers/mmc/host/dw_mmc-rockchip.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - - #include "dw_mmc.h" - #include "dw_mmc-pltfm.h" -@@ -290,6 +291,12 @@ static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) - { - struct dw_mci *host = platform_get_drvdata(pdev); - struct mmc_host *mmc = host->cur_slot->mmc; -+ int ret; -+ -+ mdelay(20); -+ -+ if (!IS_ERR(mmc->supply.vmmc)) -+ ret = regulator_enable(mmc->supply.vmmc); - - if (!IS_ERR(mmc->supply.vqmmc)) - regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); - -From 6947d06a6b9bccb4fca863cb40638b3cdf487fa8 Mon Sep 17 00:00:00 2001 -From: Jacob Chen -Date: Sat, 22 Jul 2017 19:55:09 +0800 -Subject: [PATCH] MINIARM: drm/rockchip: update phy settings - -Change-Id: I9e92a4191115e13999183a5d7656d6708adda632 -Signed-off-by: Jacob Chen ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index bdc96cd4253d..cea7b9d6bdb3 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -347,8 +347,7 @@ static struct dw_hdmi_phy_config rockchip_phy_config[] = { - /*pixelclk symbol term vlev*/ - { 74250000, 0x8009, 0x0004, 0x0272}, - { 165000000, 0x802b, 0x0004, 0x0209}, -- { 297000000, 0x8039, 0x0005, 0x028d}, -- { 594000000, 0x8039, 0x0000, 0x019d}, -+ { 297000000, 0x802d, 0x0001, 0x0149}, - { ~0UL, 0x0000, 0x0000, 0x0000} - }; - - -From 8b96d29710578f258442bb7975581e30c5c1a209 Mon Sep 17 00:00:00 2001 -From: Nickey Yang -Date: Mon, 17 Jul 2017 16:35:34 +0800 -Subject: [PATCH] MINIARM: set npll be used for hdmi only - -Change-Id: I8bebfb2cfb68e3dad172e5547d3886526ad5e912 -Signed-off-by: Nickey Yang ---- - arch/arm/boot/dts/rk3288.dtsi | 4 +++- - drivers/clk/rockchip/clk-rk3288.c | 6 +++--- - 2 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index b37d1954d27c..904a7955e347 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -1027,7 +1027,7 @@ - <&cru PCLK_PERI>; - assigned-clock-rates = <594000000>, - <500000000>, <300000000>, -- <150000000>, <75000000>, -+ <0>, <75000000>, - <300000000>, <150000000>, - <75000000>; - }; -@@ -1265,6 +1265,8 @@ - resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; - reset-names = "axi", "ahb", "dclk"; - iommus = <&vopb_mmu>; -+ assigned-clocks = <&cru DCLK_VOP0>; -+ assigned-clock-parents = <&cru PLL_NPLL>; - status = "disabled"; - - vopb_out: port { -diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c -index 4adbace24ff7..9df15059d584 100644 ---- a/drivers/clk/rockchip/clk-rk3288.c -+++ b/drivers/clk/rockchip/clk-rk3288.c -@@ -211,9 +211,9 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { - [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3288_PLL_CON(8), - RK3288_MODE_CON, 8, 7, 0, rk3288_pll_rates), - [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12), -- RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), -+ RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates), - [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16), -- RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), -+ RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates), - }; - - static struct clk_div_table div_hclk_cpu_t[] = { -@@ -428,7 +428,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { - RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS, - RK3288_CLKGATE_CON(3), 4, GFLAGS), - -- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0, -+ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, - RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS, - RK3288_CLKGATE_CON(3), 1, GFLAGS), - COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0, - -From 07d84a3e6f43def7af179d417224a610ca7aaf98 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 11 Dec 2017 23:09:54 +0100 -Subject: [PATCH] clk: rockchip: rk3288: add more pixel clock rates - ---- - drivers/clk/rockchip/clk-rk3288.c | 79 +++++++++++++++++++++++++++++++++++++-- - 1 file changed, 75 insertions(+), 4 deletions(-) - -diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c -index 9df15059d584..e1f3bd273a58 100644 ---- a/drivers/clk/rockchip/clk-rk3288.c -+++ b/drivers/clk/rockchip/clk-rk3288.c -@@ -84,23 +84,94 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = { - RK3066_PLL_RATE( 742500000, 8, 495, 2), - RK3066_PLL_RATE( 696000000, 1, 58, 2), - RK3066_PLL_RATE( 600000000, 1, 50, 2), -- RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1), -+ RK3066_PLL_RATE( 594000000, 2, 99, 2), -+ RK3066_PLL_RATE( 552750000, 16, 737, 2), - RK3066_PLL_RATE( 552000000, 1, 46, 2), -+ RK3066_PLL_RATE( 505250000, 24, 2021, 4), - RK3066_PLL_RATE( 504000000, 1, 84, 4), - RK3066_PLL_RATE( 500000000, 3, 125, 2), - RK3066_PLL_RATE( 456000000, 1, 76, 4), -+ RK3066_PLL_RATE( 443250000, 8, 591, 4), - RK3066_PLL_RATE( 408000000, 1, 68, 4), - RK3066_PLL_RATE( 400000000, 3, 100, 2), - RK3066_PLL_RATE( 384000000, 2, 128, 4), -+ RK3066_PLL_RATE( 380500000, 12, 761, 4), - RK3066_PLL_RATE( 360000000, 1, 60, 4), -+ RK3066_PLL_RATE( 356500000, 8, 713, 6), -+ RK3066_PLL_RATE( 348500000, 8, 697, 6), -+ RK3066_PLL_RATE( 333250000, 16, 1333, 6), -+ RK3066_PLL_RATE( 317000000, 4, 317, 6), -+ RK3066_PLL_RATE( 312250000, 16, 1249, 6), - RK3066_PLL_RATE( 312000000, 1, 52, 4), - RK3066_PLL_RATE( 300000000, 1, 50, 4), -- RK3066_PLL_RATE( 297000000, 2, 198, 8), -+ RK3066_PLL_RATE( 297000000, 4, 297, 6), -+ RK3066_PLL_RATE( 288000000, 1, 72, 6), -+ RK3066_PLL_RATE( 281250000, 16, 1125, 6), -+ RK3066_PLL_RATE( 268500000, 2, 179, 8), -+ RK3066_PLL_RATE( 268250000, 12, 1073, 8), -+ RK3066_PLL_RATE( 261000000, 1, 87, 8), - RK3066_PLL_RATE( 252000000, 1, 84, 8), -+ RK3066_PLL_RATE( 245500000, 6, 491, 8), -+ RK3066_PLL_RATE( 245250000, 4, 327, 8), -+ RK3066_PLL_RATE( 241500000, 2, 161, 8), -+ RK3066_PLL_RATE( 234000000, 1, 78, 8), -+ RK3066_PLL_RATE( 229500000, 2, 153, 8), -+ RK3066_PLL_RATE( 218250000, 16, 1455, 10), - RK3066_PLL_RATE( 216000000, 1, 72, 8), -- RK3066_PLL_RATE( 148500000, 2, 99, 8), -+ RK3066_PLL_RATE( 214750000, 12, 859, 8), -+ RK3066_PLL_RATE( 208000000, 3, 260, 10), -+ RK3066_PLL_RATE( 204750000, 16, 1365, 10), -+ RK3066_PLL_RATE( 202500000, 8, 675, 10), -+ RK3066_PLL_RATE( 193250000, 48, 3865, 10), -+ RK3066_PLL_RATE( 189000000, 4, 315, 10), -+ RK3066_PLL_RATE( 187250000, 48, 3745, 10), -+ RK3066_PLL_RATE( 187000000, 12, 935, 10), -+ RK3066_PLL_RATE( 182750000, 8, 731, 12), -+ RK3066_PLL_RATE( 179500000, 4, 359, 12), -+ RK3066_PLL_RATE( 175500000, 4, 351, 12), -+ RK3066_PLL_RATE( 162000000, 1, 81, 12), -+ RK3066_PLL_RATE( 157500000, 4, 315, 12), -+ RK3066_PLL_RATE( 157000000, 12, 1099, 14), -+ RK3066_PLL_RATE( 156750000, 16, 1463, 14), -+ RK3066_PLL_RATE( 156000000, 1, 91, 14), -+ RK3066_PLL_RATE( 154000000, 6, 539, 14), -+ RK3066_PLL_RATE( 148500000, 8, 693, 14), -+ RK3066_PLL_RATE( 148250000, 8, 593, 12), -+ RK3066_PLL_RATE( 146250000, 16, 1365, 14), -+ RK3066_PLL_RATE( 140250000, 16, 1309, 14), -+ RK3066_PLL_RATE( 136750000, 6, 547, 16), -+ RK3066_PLL_RATE( 135000000, 1, 90, 16), - RK3066_PLL_RATE( 126000000, 1, 84, 16), -- RK3066_PLL_RATE( 48000000, 1, 64, 32), -+ RK3066_PLL_RATE( 122500000, 3, 245, 16), -+ RK3066_PLL_RATE( 121750000, 6, 487, 16), -+ RK3066_PLL_RATE( 119000000, 3, 238, 16), -+ RK3066_PLL_RATE( 117500000, 3, 235, 16), -+ RK3066_PLL_RATE( 115500000, 1, 77, 16), -+ RK3066_PLL_RATE( 108000000, 1, 72, 16), -+ RK3066_PLL_RATE( 106500000, 1, 71, 16), -+ RK3066_PLL_RATE( 102250000, 6, 409, 16), -+ RK3066_PLL_RATE( 101000000, 3, 202, 16), -+ RK3066_PLL_RATE( 94500000, 1, 63, 16), -+ RK3066_PLL_RATE( 88750000, 6, 355, 16), -+ RK3066_PLL_RATE( 85500000, 1, 57, 16), -+ RK3066_PLL_RATE( 83500000, 3, 167, 16), -+ RK3066_PLL_RATE( 79500000, 1, 53, 16), -+ RK3066_PLL_RATE( 78750000, 2, 105, 16), -+ RK3066_PLL_RATE( 75000000, 1, 50, 16), -+ RK3066_PLL_RATE( 74250000, 2, 99, 16), -+ RK3066_PLL_RATE( 73250000, 6, 293, 16), -+ RK3066_PLL_RATE( 72000000, 1, 48, 16), -+ RK3066_PLL_RATE( 71000000, 3, 142, 16), -+ RK3066_PLL_RATE( 68250000, 2, 91, 16), -+ RK3066_PLL_RATE( 65000000, 3, 130, 16), -+ RK3066_PLL_RATE( 56250000, 2, 75, 16), -+ RK3066_PLL_RATE( 50000000, 3, 100, 16), -+ RK3066_PLL_RATE( 49500000, 1, 33, 16), -+ RK3066_PLL_RATE( 40000000, 3, 80, 16), -+ RK3066_PLL_RATE( 36000000, 1, 24, 16), -+ RK3066_PLL_RATE( 35500000, 3, 71, 16), -+ RK3066_PLL_RATE( 33750000, 2, 45, 16), -+ RK3066_PLL_RATE( 31500000, 1, 21, 16), - { /* sentinel */ }, - }; - diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch index 9b9eafe7d5..7288c3769f 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch @@ -1,53 +1,4 @@ -From 3ab7c88ff74eb4f8f1eb9a8d4e27661a8e8f2103 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 29 Mar 2017 23:51:09 +0200 -Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor - ---- - drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c | 6 ++---- - drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h | 3 +-- - 2 files changed, 3 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c -index 69b13ddad95f..6f3b654cd3fd 100644 ---- a/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c -+++ b/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c -@@ -213,8 +213,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) - dp = &kbdev->devfreq_profile; - - dp->initial_freq = kbdev->current_freq; -- /* .KP : set devfreq_dvfs_interval_in_ms */ -- dp->polling_ms = 20; -+ dp->polling_ms = 100; - dp->target = kbase_devfreq_target; - dp->get_dev_status = kbase_devfreq_status; - dp->get_cur_freq = kbase_devfreq_cur_freq; -@@ -229,8 +228,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) - &kbdev->ondemand_data.downdifferential); - - kbdev->devfreq = devfreq_add_device(kbdev->dev, dp, -- "simple_ondemand", -- &kbdev->ondemand_data); -+ "performance", NULL); - if (IS_ERR(kbdev->devfreq)) { - kbase_devfreq_term_freq_table(kbdev); - return PTR_ERR(kbdev->devfreq); -diff --git a/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h b/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h -index 9b00cce9b2b3..739ac83b484f 100644 ---- a/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h -+++ b/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h -@@ -157,8 +157,7 @@ enum { - /* - * Default period for DVFS sampling - */ --// #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ --#define DEFAULT_PM_DVFS_PERIOD 20 /* 20 ms */ -+#define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ - - /* - * Power Management poweroff tick granuality. This is in nanoseconds to - -From c49efbd36cf0b4d676adee155d3c68862c93d400 Mon Sep 17 00:00:00 2001 +From 00ddf696ea9a7e980ea8e6ff895defe392db0c11 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 17 Apr 2017 13:09:16 +0200 Subject: [PATCH] sound/usb/quirks-table: add Realtek ALC4040 @@ -57,10 +8,10 @@ Subject: [PATCH] sound/usb/quirks-table: add Realtek ALC4040 1 file changed, 9 insertions(+) diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h -index 8a59d4782a0f..96e1e2fdc9c3 100644 +index 69bf5cf1e91e..00672a818145 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h -@@ -3277,4 +3277,13 @@ AU0828_DEVICE(0x2040, 0x7270, "Hauppauge", "HVR-950Q"), +@@ -3324,4 +3324,13 @@ AU0828_DEVICE(0x2040, 0x7270, "Hauppauge", "HVR-950Q"), } }, @@ -75,7 +26,7 @@ index 8a59d4782a0f..96e1e2fdc9c3 100644 + #undef USB_DEVICE_VENDOR_SPEC -From 9224460a1f2208076d8b67454603db5415dcb992 Mon Sep 17 00:00:00 2001 +From 55a67a2125f372eed3281cec9914ecd66283955b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 May 2017 09:08:50 +0200 Subject: [PATCH] gpu/arm/mali400: default to performance gpu governor @@ -85,10 +36,10 @@ Subject: [PATCH] gpu/arm/mali400: default to performance gpu governor 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c b/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c -index 3eac07d76766..14916ea86905 100644 +index c9b8652f100d..6c97c530a2ae 100644 --- a/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c +++ b/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c -@@ -249,7 +249,7 @@ int mali_devfreq_init(struct mali_device *mdev) +@@ -259,7 +259,7 @@ int mali_devfreq_init(struct mali_device *mdev) return -EFAULT; mdev->devfreq = devfreq_add_device(mdev->dev, dp, @@ -98,20 +49,20 @@ index 3eac07d76766..14916ea86905 100644 mali_devfreq_term_freq_table(mdev); return PTR_ERR(mdev->devfreq); -From 2d2af9eb328f709fc6b8bc63c42699dd22932e3e Mon Sep 17 00:00:00 2001 +From 188e9f097216cd73fa78abf9545837464dd70231 Mon Sep 17 00:00:00 2001 From: LongChair Date: Fri, 21 Apr 2017 13:39:12 +0200 Subject: [PATCH] drm/rockchip: remove unsupported 4K freqs --- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index bdc96cd4253d..b22e7a67024f 100644 +index a58edabe600c..7273561fe6b1 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -508,9 +508,23 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, +@@ -510,9 +510,15 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, return MODE_BAD; hdmi = to_rockchip_hdmi(encoder); @@ -124,20 +75,12 @@ index bdc96cd4253d..b22e7a67024f 100644 + /* Skip bad clocks for RK3288 */ + if (hdmi->dev_type == RK3288_HDMI && (mode->clock < 27500 || mode->clock > 340000)) + return MODE_CLOCK_RANGE; -+ -+ /* Skip 4K 50/60Hz clocks for RK3328 */ -+ if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000) -+ return MODE_CLOCK_RANGE; -+ -+ /* Skip 4K 50/60Hz clocks for RK3399 */ -+ if (hdmi->dev_type == RK3399_HDMI && mode->clock > 340000) -+ return MODE_CLOCK_RANGE; + /* * ensure all drm display mode can work, if someone want support more * resolutions, please limit the possible_crtc, only connect to -From 66db06144315ec2212c9724f57291acadeffe8d8 Mon Sep 17 00:00:00 2001 +From cde112e9f9e564806b49bbe317b783e78a6b5c3a Mon Sep 17 00:00:00 2001 From: xuhuicong Date: Fri, 23 Jun 2017 18:56:17 +0800 Subject: [PATCH] drm/rockchip: hdmi: fix no sound some time @@ -149,10 +92,10 @@ Signed-off-by: xuhuicong 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index a7f2e381a5bd..df2f72fbf93a 100644 +index d57d999c50a5..ae498d097b61 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1981,10 +1981,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, +@@ -1991,10 +1991,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, HDMI_FC_INVIDCONF_IN_I_P_INTERLACED : HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE; @@ -163,7 +106,7 @@ index a7f2e381a5bd..df2f72fbf93a 100644 hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); hdisplay = mode->hdisplay; -@@ -2282,6 +2278,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) +@@ -2292,6 +2288,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) /* not for DVI mode */ if (hdmi->sink_is_hdmi) { dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__); @@ -174,97 +117,7 @@ index a7f2e381a5bd..df2f72fbf93a 100644 /* HDMI Initialization Step F - Configure AVI InfoFrame */ hdmi_config_AVI(hdmi, mode); -From 61d75a50a3eb5c9f7894d102749c1aed2cb69db8 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 25 Aug 2017 18:29:35 +0200 -Subject: [PATCH] video: rockchip: vpu: partial revise for rk322xh feature - ---- - drivers/video/rockchip/vcodec/vcodec_service.c | 12 +++--------- - 1 file changed, 3 insertions(+), 9 deletions(-) - -diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c -index 9236c5e93215..bdc4722f4e3a 100644 ---- a/drivers/video/rockchip/vcodec/vcodec_service.c -+++ b/drivers/video/rockchip/vcodec/vcodec_service.c -@@ -3630,21 +3630,15 @@ static irqreturn_t vdpu_irq(int irq, void *dev_id) - time_record(task, 1); - vpu_debug(DEBUG_IRQ_STATUS, "vdpu_irq dec status %08x\n", - dec_status); -- if ((dec_status & 0x40001) == 0x40001) { -- do { -- dec_status = readl_relaxed(dev->regs + -- task->reg_irq); -- } while ((dec_status & 0x40001) == 0x40001); -- } -- -- if (check_irq_err(task, dec_status)) -- atomic_add(1, &pservice->reset_request); - - writel_relaxed(0, dev->regs + task->reg_irq); - - /* set clock gating to save power */ - writel(task->gating_mask, dev->regs + task->reg_en); - -+ if (check_irq_err(task, dec_status)) -+ atomic_add(1, &pservice->reset_request); -+ - atomic_add(1, &dev->irq_count_codec); - time_diff(task); - pservice->irq_status = raw_status; - -From 336b80f1b8830171de634f41d29f6153a8ccac14 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 2 Oct 2017 21:53:19 +0200 -Subject: [PATCH] drm/rockchip: use limited range - ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++++++++++++++-- - 1 file changed, 14 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index df2f72fbf93a..f603eeadaa1b 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -147,6 +147,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { - { 0x6756, 0x78ab, 0x2000, 0x0200 } - }; - -+static const u16 csc_coeff_rgb_in_limited[3][4] = { -+ { 0x36f7, 0x0000, 0x0000, 0x0040 }, -+ { 0x0000, 0x36f7, 0x0000, 0x0040 }, -+ { 0x0000, 0x0000, 0x36f7, 0x0040 } -+}; -+ - struct hdmi_vmode { - bool mdataenablepolarity; - -@@ -996,7 +1002,9 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format; -+ return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format || -+ (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -+ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -1030,7 +1038,11 @@ static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - u32 csc_scale = 1; - - if (is_color_space_conversion(hdmi)) { -- if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -+ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -+ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -+ csc_coeff = &csc_coeff_rgb_in_limited; -+ csc_scale = 0; -+ } else if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { - if (hdmi->hdmi_data.enc_out_encoding == - V4L2_YCBCR_ENC_601) - csc_coeff = &csc_coeff_rgb_out_eitu601; - -From 63c7038ff1424b8362ccaa5c8c5907ed285284fc Mon Sep 17 00:00:00 2001 +From e56478758d232f503414c1e004f6f52973aeb0c4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 18 Nov 2017 11:09:39 +0100 Subject: [PATCH] rockchip: vop: force skip lines if image too big @@ -274,18 +127,18 @@ Subject: [PATCH] rockchip: vop: force skip lines if image too big 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 3e6798b4b821..23516a195261 100644 +index a2c1d85bba95..784e83537692 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1584,6 +1584,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1649,6 +1649,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, int ymirror, xmirror; uint32_t val; bool rb_swap, global_alpha_en; + int skip_lines = 0; - /* - * can't update plane when vop is disabled. -@@ -1597,8 +1598,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, + #if defined(CONFIG_ROCKCHIP_DRM_DEBUG) + bool AFBC_flag = false; +@@ -1685,8 +1686,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, } mode = &crtc->state->adjusted_mode; @@ -301,7 +154,7 @@ index 3e6798b4b821..23516a195261 100644 act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); dsp_info = (drm_rect_height(dest) - 1) << 16; -@@ -1620,10 +1627,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1708,10 +1715,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, VOP_WIN_SET(vop, win, xmirror, xmirror); VOP_WIN_SET(vop, win, ymirror, ymirror); VOP_WIN_SET(vop, win, format, vop_plane_state->format); @@ -315,7 +168,7 @@ index 3e6798b4b821..23516a195261 100644 } VOP_WIN_SET(vop, win, fmt_10, is_yuv_10bit(fb->pixel_format)); -From 2fef240b349e8adbf74f672a2203453839a59ee2 Mon Sep 17 00:00:00 2001 +From d1cc2fb593abab7510948339db9cf4b9a59926c6 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 18 Nov 2017 23:17:24 +0100 Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor @@ -326,10 +179,10 @@ Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c -index 0bf5fcd21c03..e578bd0f92dd 100644 +index 1495f06cd9b9..a6d2e0121015 100644 --- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c +++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c -@@ -232,8 +232,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) +@@ -348,8 +348,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) dp = &kbdev->devfreq_profile; dp->initial_freq = kbdev->current_freq; @@ -339,8 +192,8 @@ index 0bf5fcd21c03..e578bd0f92dd 100644 dp->target = kbase_devfreq_target; dp->get_dev_status = kbase_devfreq_status; dp->get_cur_freq = kbase_devfreq_cur_freq; -@@ -243,7 +242,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) - return -EFAULT; +@@ -363,7 +362,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) + return err; kbdev->devfreq = devfreq_add_device(kbdev->dev, dp, - "simple_ondemand", NULL); @@ -349,10 +202,10 @@ index 0bf5fcd21c03..e578bd0f92dd 100644 kbase_devfreq_term_freq_table(kbdev); return PTR_ERR(kbdev->devfreq); diff --git a/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h b/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h -index e674cc2ea183..0f11388acfd7 100644 +index 1cf44b3500cf..a6a1a52f0463 100644 --- a/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h +++ b/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h -@@ -157,8 +157,7 @@ enum { +@@ -109,8 +109,7 @@ enum { /* * Default period for DVFS sampling */ @@ -363,7 +216,7 @@ index e674cc2ea183..0f11388acfd7 100644 /* * Power Management poweroff tick granuality. This is in nanoseconds to -From 0dbe82f20d885716f74242621fe96a914db03064 Mon Sep 17 00:00:00 2001 +From fd3c597dd56bca81fc642d918343ab2f9435628f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 10 Dec 2017 14:16:09 +0100 Subject: [PATCH] uapi: install rockchip_drm header @@ -385,23 +238,23 @@ index 38d437096c35..b7ae9969d41e 100644 header-y += sis_drm.h header-y += tegra_drm.h -From f166ba88945f1ea7ff327bb9f22f53aed728dde3 Mon Sep 17 00:00:00 2001 +From b5afb970037ac69a22f6d514c34175835f6078fc Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 10 Dec 2017 18:03:53 +0100 Subject: [PATCH] phy: rockchip-inno-hdmi-phy: add vesa dmt pixel clocks --- - drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c | 71 +++++++++++++++++++++++ - 1 file changed, 71 insertions(+) + drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c | 64 +++++++++++++++++++++++ + 1 file changed, 64 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c -index ca50c8f58c50..2455c87ab5d8 100644 +index 0161f80ab964..6cf391405ad6 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c -@@ -245,6 +245,77 @@ static const struct pre_pll_config pre_pll_cfg_table[] = { - {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0}, - {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B}, - {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0}, +@@ -278,6 +278,70 @@ static const struct pre_pll_config pre_pll_cfg_table[] = { + {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0}, + {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B}, + {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0}, + { 25175000, 25175000, 30, 1007, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + { 31500000, 31500000, 1, 21, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + { 33750000, 33750000, 1, 45, 1, 2, 2, 1, 2, 3, 4, 0, 0}, @@ -410,25 +263,19 @@ index ca50c8f58c50..2455c87ab5d8 100644 + { 49500000, 49500000, 1, 33, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + { 50000000, 50000000, 3, 50, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + { 56250000, 56250000, 1, 75, 1, 2, 2, 1, 2, 3, 4, 0, 0}, -+ { 65000000, 65000000, 3, 65, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + { 68250000, 68250000, 1, 91, 1, 2, 2, 1, 2, 3, 4, 0, 0}, -+ { 71000000, 71000000, 3, 71, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + { 72000000, 72000000, 1, 24, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + { 73250000, 73250000, 3, 293, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + { 75000000, 75000000, 1, 25, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + { 78750000, 78750000, 1, 105, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + { 79500000, 79500000, 1, 53, 1, 1, 1, 1, 2, 2, 2, 0, 0}, -+ { 83500000, 83500000, 3, 167, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + { 85500000, 85500000, 1, 57, 1, 1, 1, 1, 2, 2, 2, 0, 0}, -+ { 88750000, 88750000, 3, 355, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + { 94500000, 94500000, 1, 63, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + {101000000, 101000000, 3, 101, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + {102250000, 102250000, 3, 409, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + {106500000, 106500000, 1, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0}, -+ {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + {115500000, 115500000, 1, 77, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + {117500000, 117500000, 3, 235, 1, 1, 1, 1, 2, 2, 2, 0, 0}, -+ {119000000, 119000000, 3, 119, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + {121750000, 121750000, 3, 487, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + {122500000, 122500000, 3, 245, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0}, @@ -441,7 +288,6 @@ index ca50c8f58c50..2455c87ab5d8 100644 + {156750000, 156750000, 1, 209, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + {157000000, 157000000, 3, 157, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + {157500000, 157500000, 1, 105, 1, 1, 1, 1, 2, 2, 2, 0, 0}, -+ {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0}, + {175500000, 175500000, 1, 117, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + {179500000, 179500000, 3, 359, 1, 1, 1, 1, 2, 2, 2, 0, 0}, + {182750000, 182750000, 3, 731, 1, 2, 2, 1, 2, 3, 4, 0, 0}, @@ -473,11 +319,11 @@ index ca50c8f58c50..2455c87ab5d8 100644 + {443250000, 443250000, 1, 591, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + {505250000, 505250000, 3, 2021, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + {552750000, 552750000, 1, 737, 1, 2, 2, 1, 2, 3, 4, 0, 0}, - { ~0UL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + { ~0UL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} }; -From 1a99dae778ad3402f8283aa19b27ea606fdfcd4c Mon Sep 17 00:00:00 2001 +From 0377b8c27f4b56b0b6f1fc8af11cde6ab8517c3b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 12 Dec 2017 00:37:27 +0100 Subject: [PATCH] clk: rockchip: fix round rate @@ -487,10 +333,10 @@ Subject: [PATCH] clk: rockchip: fix round rate 1 file changed, 11 insertions(+) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c -index 80d1d4095f2e..e4f64087aa78 100644 +index addcdb07553a..e3d7a9ee1078 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c -@@ -299,6 +299,17 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings( +@@ -356,6 +356,17 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings( static long rockchip_pll_round_rate(struct clk_hw *hw, unsigned long drate, unsigned long *prate) { @@ -509,7 +355,7 @@ index 80d1d4095f2e..e4f64087aa78 100644 } -From 6e9921f5c0511283de78b221cc204d6aad53e68f Mon Sep 17 00:00:00 2001 +From c4bc7e7f44f76a7f6f2374956fd68cab657f1eb3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 21 Jan 2018 17:20:00 +0100 Subject: [PATCH] drm: fix HDR metadata infoframe length @@ -526,10 +372,10 @@ Fixes activation of HDR mode on my LG OLED 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index f603eeadaa1b..affba6ab8163 100644 +index ae498d097b61..018bef374dc3 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1859,7 +1859,7 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) +@@ -1857,7 +1857,7 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) return; } @@ -539,10 +385,10 @@ index f603eeadaa1b..affba6ab8163 100644 hdmi_writeb(hdmi, frame.eotf, HDMI_FC_DRM_PB0); hdmi_writeb(hdmi, frame.metadata_type, HDMI_FC_DRM_PB1); diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c -index 3e3ebdf34e9f..d06786a58ca1 100644 +index bfe671071d9f..e3a0f561e8f0 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c -@@ -4727,10 +4727,10 @@ drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame, +@@ -4735,10 +4735,10 @@ drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame, hdr_source_metadata = (struct hdr_static_metadata *)hdr_metadata; @@ -556,7 +402,7 @@ index 3e3ebdf34e9f..d06786a58ca1 100644 for (i = 0; i < 3; i++) { frame->display_primaries_x[i] = -From 83b81c3876baf020491ee497f637b01c45eef059 Mon Sep 17 00:00:00 2001 +From 3b4e87792660182b9f0093e016d41a7be53fe59e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 27 Jan 2018 09:39:09 +0100 Subject: [PATCH] drm: add edid detection for Hybrid Log-Gamma EOTF @@ -566,10 +412,10 @@ Subject: [PATCH] drm: add edid detection for Hybrid Log-Gamma EOTF 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c -index d06786a58ca1..bfd64112178a 100644 +index e3a0f561e8f0..f7d41950614e 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c -@@ -2737,7 +2737,7 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, +@@ -2740,7 +2740,7 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, #define TRADITIONAL_GAMMA_SDR (0x1 << 0) #define TRADITIONAL_GAMMA_HDR (0x1 << 1) #define SMPTE_ST2084 (0x1 << 2) @@ -578,7 +424,7 @@ index d06786a58ca1..bfd64112178a 100644 #define RESERVED_EOTF (0x3 << 4) #define STATIC_METADATA_TYPE1 (0x1 << 0) -@@ -3707,6 +3707,8 @@ static uint16_t eotf_supported(const u8 *edid_ext) +@@ -3710,6 +3710,8 @@ static uint16_t eotf_supported(const u8 *edid_ext) val |= TRADITIONAL_GAMMA_HDR; if (edid_ext[2] & SMPTE_ST2084) val |= SMPTE_ST2084; @@ -588,7 +434,7 @@ index d06786a58ca1..bfd64112178a 100644 return val; } -From 9a00f6e3bc2a7d6f3c3783f98bf3b142a1445f00 Mon Sep 17 00:00:00 2001 +From a11ad9338755a57859c7ca1b54b7719fb644a5ef Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 11 Feb 2018 19:21:41 +0100 Subject: [PATCH] drm: bridge: dw-hdmi: default to underscan mode @@ -598,10 +444,10 @@ Subject: [PATCH] drm: bridge: dw-hdmi: default to underscan mode 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index affba6ab8163..1c55ff385ce4 100644 +index 018bef374dc3..d0866baa75fc 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1693,7 +1693,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) +@@ -1691,7 +1691,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) break; } @@ -611,7 +457,7 @@ index affba6ab8163..1c55ff385ce4 100644 /* * The Designware IP uses a different byte format from standard -From 8076bb526d8c6d19006d460e2f904afafdf019e2 Mon Sep 17 00:00:00 2001 +From cb40442a2cd891541ac55381a2610f61f9d56fa9 Mon Sep 17 00:00:00 2001 From: David Carrillo-Cisneros Date: Tue, 18 Jul 2017 18:18:37 -0700 Subject: [PATCH] UPSTREAM: perf tools: Add EXCLUDE_EXTLIBS and EXTRA_PERFLIBS @@ -671,7 +517,7 @@ index fb1c9ddc3478..9b3b9bd50d54 100644 export INSTALL SHELL_PATH -From 8fb0d8531aece502c4cc3a82077ace8c09b4918a Mon Sep 17 00:00:00 2001 +From 6f95e5cdd43756df0bc1caa983f0f326a38bb9ff Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 27 Feb 2018 20:49:00 +0100 Subject: [PATCH] net: wireless: rockchip_wlan: rtl8723bs: do not accept all @@ -683,34 +529,34 @@ Subject: [PATCH] net: wireless: rockchip_wlan: rtl8723bs: do not accept all 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile -index b1403a8e22af..716f1baec373 100644 +index 0ff707fd37eb..ca79c18b8eb8 100644 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile -@@ -1248,7 +1248,7 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFO +@@ -1347,7 +1347,7 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFO EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE # default setting for Power control -EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC +#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC - #EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN + EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN + EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE # default setting for Special function - EXTRA_CFLAGS += -DCONFIG_P2P_IPS diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c -index 0c03f775eb7f..45533aacecdc 100644 +index b4654d229634..48b6cf61d436 100644 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c -@@ -47,6 +47,9 @@ static struct mmc_host *mmc_host = NULL; - static const struct sdio_device_id sdio_ids[] = - { +@@ -45,6 +45,9 @@ static struct mmc_host *mmc_host = NULL; + + static const struct sdio_device_id sdio_ids[] = { #ifdef CONFIG_RTL8723B -+ { SDIO_DEVICE(0x024c, 0x0523),.driver_data = RTL8723B}, -+ { SDIO_DEVICE(0x024c, 0x0623),.driver_data = RTL8723B}, -+ { SDIO_DEVICE(0x024c, 0x0626),.driver_data = RTL8723B}, - { SDIO_DEVICE(0x024c, 0xB723),.driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0523), .driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0623), .driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0626), .driver_data = RTL8723B}, + { SDIO_DEVICE(0x024c, 0xB723), .driver_data = RTL8723B}, #endif #ifdef CONFIG_RTL8188E -From dced379ed8ce510bbf781704e6ff32557fa0950c Mon Sep 17 00:00:00 2001 +From 157645ba1282857bf4440707620c9ca91d8f8913 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 2 Mar 2018 20:53:32 +0100 Subject: [PATCH] net: wireless: rockchip_wlan: bcmdhd: detect broadcom sdio @@ -733,3 +579,545 @@ index 8864582b1706..b5a388cc3cbe 100755 { 0, 0, 0, 0 /* end: all zeroes */ }, }; + +From 00c9d5749537dacbd745ce3456f1335cbe019d54 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 1 Jul 2018 23:17:47 +0200 +Subject: [PATCH] drm/rockchip: clip yuv + +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 ++ + drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 ++ + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 3 +++ + 3 files changed, 7 insertions(+) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index 784e83537692..7073ea91c349 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -1712,6 +1712,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, + + spin_lock(&vop->reg_lock); + ++ VOP_WIN_SET(vop, win, yuv_clip, 1); + VOP_WIN_SET(vop, win, xmirror, xmirror); + VOP_WIN_SET(vop, win, ymirror, ymirror); + VOP_WIN_SET(vop, win, format, vop_plane_state->format); +@@ -2512,6 +2513,7 @@ static void vop_update_csc(struct drm_crtc *crtc) + VOP_CTRL_SET(vop, dsp_data_swap, 0); + + VOP_CTRL_SET(vop, out_mode, s->output_mode); ++ VOP_CTRL_SET(vop, yuv_clip, 1); + + switch (s->bus_format) { + case MEDIA_BUS_FMT_RGB565_1X16: +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +index 5850572b40ff..b465c08876f8 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +@@ -171,6 +171,7 @@ struct vop_ctrl { + struct vop_reg dsp_lut_en; + + struct vop_reg out_mode; ++ struct vop_reg yuv_clip; + + struct vop_reg xmirror; + struct vop_reg ymirror; +@@ -395,6 +396,7 @@ struct vop_win_phy { + struct vop_reg format; + struct vop_reg fmt_10; + struct vop_reg csc_mode; ++ struct vop_reg yuv_clip; + struct vop_reg xmirror; + struct vop_reg ymirror; + struct vop_reg rb_swap; +diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +index 5f517e193cc8..f03009e304f8 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c ++++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +@@ -110,6 +110,7 @@ static const struct vop_win_phy rk3288_win01_data = { + .fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 4), + .csc_mode = VOP_REG_VER(RK3288_WIN0_CTRL0, 0x3, 10, 3, 2, -1), + .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), ++ .yuv_clip = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 20), + .xmirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 21, 3, 2, -1), + .ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1), + .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0), +@@ -277,6 +278,7 @@ static const struct vop_ctrl rk3288_ctrl_data = { + .bcsh_color_bar = VOP_REG(RK3288_BCSH_COLOR_BAR, 0xffffff, 8), + .bcsh_en = VOP_REG(RK3288_BCSH_COLOR_BAR, 0x1, 0), + ++ .yuv_clip = VOP_REG(RK3288_DSP_CTRL0, 0x1, 21), + .xmirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 22), + .ymirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 23), + +@@ -955,6 +957,7 @@ static const struct vop_ctrl rk3328_ctrl_data = { + .dsp_lut_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 0), + .out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0), + ++ .yuv_clip = VOP_REG(RK3328_DSP_CTRL0, 0x1, 21), + .xmirror = VOP_REG(RK3328_DSP_CTRL0, 0x1, 22), + .ymirror = VOP_REG(RK3328_DSP_CTRL0, 0x1, 23), + + +From 93fb1cdc962e44ce72fec1191e0bf200c9aaf130 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 8 Jul 2018 12:38:00 +0200 +Subject: [PATCH] drm/atomic: use active_only flag for connector atomic + begin/flush + +--- + drivers/gpu/drm/drm_atomic_helper.c | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c +index f77d4aa1e58b..4da489b54dc5 100644 +--- a/drivers/gpu/drm/drm_atomic_helper.c ++++ b/drivers/gpu/drm/drm_atomic_helper.c +@@ -1563,15 +1563,15 @@ void drm_atomic_helper_commit_planes(struct drm_device *dev, + for_each_connector_in_state(old_state, connector, old_conn_state, i) { + const struct drm_connector_helper_funcs *funcs; + +- if (!connector->state->crtc) +- continue; ++ funcs = connector->helper_private; + +- if (!connector->state->crtc->state->active) ++ if (!funcs || !funcs->atomic_begin) + continue; + +- funcs = connector->helper_private; ++ if (!connector->state->crtc) ++ continue; + +- if (!funcs || !funcs->atomic_begin) ++ if (active_only && !connector->state->crtc->state->active) + continue; + + DRM_DEBUG_ATOMIC("flush beginning [CONNECTOR:%d:%s]\n", +@@ -1645,15 +1645,15 @@ void drm_atomic_helper_commit_planes(struct drm_device *dev, + for_each_connector_in_state(old_state, connector, old_conn_state, i) { + const struct drm_connector_helper_funcs *funcs; + +- if (!connector->state->crtc) +- continue; ++ funcs = connector->helper_private; + +- if (!connector->state->crtc->state->active) ++ if (!funcs || !funcs->atomic_flush) + continue; + +- funcs = connector->helper_private; ++ if (!connector->state->crtc) ++ continue; + +- if (!funcs || !funcs->atomic_flush) ++ if (active_only && !connector->state->crtc->state->active) + continue; + + DRM_DEBUG_ATOMIC("flushing [CONNECTOR:%d:%s]\n", + +From d0f8100f82203017bac6617d3f0e30b524956d36 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 22 Jul 2018 14:51:58 +0200 +Subject: [PATCH] drm: rockchip: dw-hdmi: only force YCbCr422 when max tmds is + up to 340Mhz + +--- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index 7273561fe6b1..e2aad6e2149b 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -728,7 +728,9 @@ dw_hdmi_rockchip_select_output(struct drm_connector_state *conn_state, + /* BT2020 require color depth at lest 10bit */ + *color_depth = 10; + /* We prefer use YCbCr422 to send 10bit */ +- if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422) ++ if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422 && ++ info->max_tmds_clock <= 340000 && ++ hdmi->dev_type != RK3288_HDMI) + *color_format = DRM_HDMI_OUTPUT_YCBCR422; + } + + +From d093be3d79b5c781719298676282e44b7d7bb290 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 22 Jul 2018 15:09:16 +0200 +Subject: [PATCH] drm: bridge: dw-hdmi: signal full range for rgb output + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index d0866baa75fc..520f87b88130 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1693,6 +1693,14 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + + frame.scan_mode = HDMI_SCAN_MODE_UNDERSCAN; + ++ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { ++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; ++ frame.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_FULL; ++ } else { ++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; ++ frame.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_LIMITED; ++ } ++ + /* + * The Designware IP uses a different byte format from standard + * AVI info frames, though generally the bits are in the correct + +From 623aaf53edd860816297c9230d39b5b96b0146f3 Mon Sep 17 00:00:00 2001 +From: Myy Miouyouyou +Date: Mon, 21 May 2018 22:32:59 +0200 +Subject: [PATCH] GPU: ARM: Midgard: Adapt to the new mmap call checks. + +Now, I don't know if this driver is just one of these "buggy" drivers +Linus is talking about, or if this is just standard GPU procedure. + +Anyway, this patch is due to this change by Linus Torvalds : +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=be83bbf806822b1b89e0a0f23cd87cddc409e429 + +And the fix is inspired by : +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76ef6b28ea4f81c3d511866a9b31392caa833126 + +Signed-off-by: Myy Miouyouyou +--- + drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c +index 3a6e5aae0bce..2b24e415dfa6 100644 +--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c ++++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c +@@ -1155,6 +1155,7 @@ static int kbase_open(struct inode *inode, struct file *filp) + + init_waitqueue_head(&kctx->event_queue); + filp->private_data = kctx; ++ filp->f_mode |= FMODE_UNSIGNED_OFFSET; + kctx->filp = filp; + + if (kbdev->infinite_cache_active_default) + +From d0e509162ace165ab24c8a005a2666c6c17e4d69 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 28 Jul 2018 10:41:40 +0200 +Subject: [PATCH] WIP: mm: dma-mapping: increase dma pool size + +--- + arch/arm/mm/dma-mapping.c | 2 +- + arch/arm64/mm/dma-mapping.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c +index d539dee3c78d..689961153d71 100644 +--- a/arch/arm/mm/dma-mapping.c ++++ b/arch/arm/mm/dma-mapping.c +@@ -301,7 +301,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size) + VM_ARM_DMA_CONSISTENT | VM_USERMAP); + } + +-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K ++#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M + static struct gen_pool *atomic_pool; + + static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE; +diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c +index 2b05653e8156..2ad8515cd4da 100644 +--- a/arch/arm64/mm/dma-mapping.c ++++ b/arch/arm64/mm/dma-mapping.c +@@ -32,7 +32,7 @@ + + static struct gen_pool *atomic_pool; + +-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K ++#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M + static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; + + static int __init early_coherent_pool(char *p) + +From 9cfc544f5914ccf2a44da96e491195eea763d70f Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 4 Aug 2018 15:19:39 +0200 +Subject: [PATCH] drm: add picture_aspect_ratio to hdmi 1.4 4k modes + +--- + drivers/gpu/drm/drm_edid.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index f7d41950614e..69a1eb4ee382 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -1233,25 +1233,25 @@ static const struct drm_display_mode edid_4k_modes[] = { + 3840, 4016, 4104, 4400, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), +- .vrefresh = 30, }, ++ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 2 - 3840x2160@25Hz */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, + 3840, 4896, 4984, 5280, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), +- .vrefresh = 25, }, ++ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 3 - 3840x2160@24Hz */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, + 3840, 5116, 5204, 5500, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), +- .vrefresh = 24, }, ++ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 4 - 4096x2160@24Hz (SMPTE) */ + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, + 4096, 5116, 5204, 5500, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), +- .vrefresh = 24, }, ++ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + }; + + /*** DDC fetch and block validation ***/ + +From 728a068901826027cf45d404f49b58f6cf02156a Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 4 Aug 2018 16:26:47 +0200 +Subject: [PATCH] drm: bridge: dw-hdmi: signal none colorimetry for rgb output + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 520f87b88130..c6ef3d43f997 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1694,6 +1694,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + frame.scan_mode = HDMI_SCAN_MODE_UNDERSCAN; + + if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { ++ frame.colorimetry = HDMI_COLORIMETRY_NONE; ++ frame.extended_colorimetry = 0; + frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; + frame.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_FULL; + } else { + +From bc7d29237337d1506fe63bbb421d64710e176537 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 4 Aug 2018 16:27:08 +0200 +Subject: [PATCH] drm: bridge: dw-hdmi: signal it content and content type + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index c6ef3d43f997..a0e25278232b 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1692,6 +1692,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + } + + frame.scan_mode = HDMI_SCAN_MODE_UNDERSCAN; ++ frame.content_type = HDMI_CONTENT_TYPE_GRAPHICS; ++ frame.itc = true; + + if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { + frame.colorimetry = HDMI_COLORIMETRY_NONE; + +From d0b82f5649ddb897cbf92f5e06030244ffc4e9eb Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 4 Aug 2018 16:27:40 +0200 +Subject: [PATCH] drm: bridge: dw-hdmi: log infoframes + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index a0e25278232b..f56f3224a1c9 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1705,6 +1705,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + frame.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_LIMITED; + } + ++ hdmi_infoframe_log(KERN_INFO, hdmi->dev, &frame); ++ + /* + * The Designware IP uses a different byte format from standard + * AVI info frames, though generally the bits are in the correct +@@ -1798,6 +1800,8 @@ static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, + return; + } + ++ hdmi_infoframe_log(KERN_INFO, hdmi->dev, &frame); ++ + /* Set the length of HDMI vendor specific InfoFrame payload */ + hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE); + +@@ -1838,7 +1842,7 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) + + /* Dynamic Range and Mastering Infoframe is introduced in v2.11a. */ + if (hdmi->version < 0x211a) { +- DRM_ERROR("Not support DRM Infoframe\n"); ++ DRM_DEBUG("Not support DRM Infoframe\n"); + return; + } + +@@ -1869,6 +1873,8 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) + return; + } + ++ hdmi_infoframe_log(KERN_INFO, hdmi->dev, &frame); ++ + hdmi_writeb(hdmi, frame.version, HDMI_FC_DRM_HB0); + hdmi_writeb(hdmi, frame.length, HDMI_FC_DRM_HB1); + hdmi_writeb(hdmi, frame.eotf, HDMI_FC_DRM_PB0); + +From 13040ab461d79e1dc720677eb462ace745b33b84 Mon Sep 17 00:00:00 2001 +From: Nickey Yang +Date: Mon, 17 Jul 2017 16:35:34 +0800 +Subject: [PATCH] MINIARM: set npll be used for hdmi only + +Change-Id: I8bebfb2cfb68e3dad172e5547d3886526ad5e912 +Signed-off-by: Nickey Yang +--- + arch/arm/boot/dts/rk3288.dtsi | 4 +++- + drivers/clk/rockchip/clk-rk3288.c | 4 ++-- + 2 files changed, 5 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 8e51132ef7e4..66962169da17 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -1052,7 +1052,7 @@ + <&cru PCLK_PERI>; + assigned-clock-rates = <594000000>, + <500000000>, <300000000>, +- <150000000>, <75000000>, ++ <0>, <75000000>, + <300000000>, <150000000>, + <75000000>; + }; +@@ -1303,6 +1303,8 @@ + resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; + reset-names = "axi", "ahb", "dclk"; + iommus = <&vopb_mmu>; ++ assigned-clocks = <&cru DCLK_VOP0>; ++ assigned-clock-parents = <&cru PLL_NPLL>; + status = "disabled"; + + vopb_out: port { +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index ca6c2ad3de96..415df387a5d6 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -214,7 +214,7 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { + [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12), + RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates), + [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16), +- RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), ++ RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates), + }; + + static struct clk_div_table div_hclk_cpu_t[] = { +@@ -429,7 +429,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS, + RK3288_CLKGATE_CON(3), 4, GFLAGS), + +- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0, ++ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, + RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS, + RK3288_CLKGATE_CON(3), 1, GFLAGS), + COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0, + +From fbefbd0989cf14e3d8f7864437a2264ab94c9b3f Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 4 Aug 2018 14:51:14 +0200 +Subject: [PATCH] clk: rockchip: rk3288: use npll table to to improve HDMI + compatibility + +Based on https://github.com/TinkerBoard/debian_kernel/commit/3d90870530b8a2901681f7b7fa598ee7381e49f3 +--- + drivers/clk/rockchip/clk-rk3288.c | 23 ++++++++++++++++++++++- + 1 file changed, 22 insertions(+), 1 deletion(-) + +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 415df387a5d6..f748a292b7f4 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -105,6 +105,27 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = { + { /* sentinel */ }, + }; + ++static struct rockchip_pll_rate_table rk3288_npll_rates[] = { ++ RK3066_PLL_RATE_NB(594000000, 1, 99, 4, 32), ++ RK3066_PLL_RATE_NB(585000000, 6, 585, 4, 32), ++ RK3066_PLL_RATE_NB(432000000, 3, 216, 4, 32), ++ RK3066_PLL_RATE_NB(426000000, 3, 213, 4, 32), ++ RK3066_PLL_RATE_NB(400000000, 1, 100, 6, 32), ++ RK3066_PLL_RATE_NB(342000000, 3, 171, 4, 32), ++ RK3066_PLL_RATE_NB(297000000, 2, 198, 8, 16), ++ RK3066_PLL_RATE_NB(270000000, 1, 135, 12, 32), ++ RK3066_PLL_RATE_NB(260000000, 1, 130, 12, 32), ++ RK3066_PLL_RATE_NB(148500000, 1, 99, 16, 32), ++ RK3066_PLL_RATE(148352000, 13, 1125, 14), ++ RK3066_PLL_RATE_NB(146250000, 6, 585, 16, 32), ++ RK3066_PLL_RATE_NB(108000000, 1, 54, 12, 32), ++ RK3066_PLL_RATE_NB(106500000, 4, 213, 12, 32), ++ RK3066_PLL_RATE_NB(85500000, 4, 171, 12, 32), ++ RK3066_PLL_RATE_NB(74250000, 4, 198, 16, 32), ++ RK3066_PLL_RATE(74176000, 26, 1125, 14), ++ { /* sentinel */ }, ++}; ++ + #define RK3288_DIV_ACLK_CORE_M0_MASK 0xf + #define RK3288_DIV_ACLK_CORE_M0_SHIFT 0 + #define RK3288_DIV_ACLK_CORE_MP_MASK 0xf +@@ -214,7 +235,7 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { + [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12), + RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates), + [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16), +- RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates), ++ RK3288_MODE_CON, 14, 9, 0, rk3288_npll_rates), + }; + + static struct clk_div_table div_hclk_cpu_t[] = { + +From d6d68acc58b75aa26c243e21599674e259b58cbd Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= +Date: Wed, 30 May 2018 13:06:14 +0200 +Subject: [PATCH] ayufan: fan53555: support syr83x found in rockpro64 + +Change-Id: I7115081286692f4cbfbe5d11a05d40be112c3037 +--- + drivers/regulator/fan53555.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c +index 74e5ae2bc0d2..6b0854a3cae3 100644 +--- a/drivers/regulator/fan53555.c ++++ b/drivers/regulator/fan53555.c +@@ -78,6 +78,7 @@ enum { + + enum { + SILERGY_SYR82X = 8, ++ SILERGY_SYR83X = 9, + }; + + struct fan53555_device_info { +@@ -323,6 +324,7 @@ static int fan53555_voltages_setup_silergy(struct fan53555_device_info *di) + /* Init voltage range and step */ + switch (di->chip_id) { + case SILERGY_SYR82X: ++ case SILERGY_SYR83X: + di->vsel_min = 712500; + di->vsel_step = 12500; + break; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch index 1e52a9776c..b9d3567306 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch @@ -1,4 +1,4 @@ -From abd68c63a163f8cd1efb40087f6a8569fafe7d64 Mon Sep 17 00:00:00 2001 +From 65d921fb8b2ec126c5e1ff2b846c179d0ab0e4d1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 19 Nov 2015 11:41:36 -0200 Subject: [PATCH] UPSTREAM: smsir.h: remove a now duplicated definition @@ -26,7 +26,7 @@ index fc8b7925c532..d9abd96ef48b 100644 struct ir_t { -From 8fcf408f26690b403ea41a34c419a7cf25430b4f Mon Sep 17 00:00:00 2001 +From 3e5e8aa798a67f94158f7fbdfca9b31021ffab90 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for Pine64 IR Remote @@ -135,7 +135,7 @@ index 7c4bbc4dfab4..3a34a9631dd1 100644 #define RC_MAP_PINNACLE_GREY "rc-pinnacle-grey" #define RC_MAP_PINNACLE_PCTV_HD "rc-pinnacle-pctv-hd" -From 3b5e2f781693301e6ba4b3d9dcfc23f05402251c Mon Sep 17 00:00:00 2001 +From 8eab80060ab0c45ed3843ea1ab1d355c2e61c417 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for ODROID IR Remote @@ -231,7 +231,7 @@ index 3a34a9631dd1..f1badbfbca90 100644 #define RC_MAP_PINE64 "rc-pine64" #define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color" -From b78470cab538b641350de506371924b48c19455e Mon Sep 17 00:00:00 2001 +From e4e4bf0e4ffdf3715d29ce0fdc40ac4942b0b509 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Hub Remote @@ -327,7 +327,7 @@ index f1badbfbca90..cd8590c99e22 100644 #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350" #define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr" -From 03250f10b133c09eb0d8793b89afe760572c1f9e Mon Sep 17 00:00:00 2001 +From c603eb8c844555707072415329d7bb2572d64fdf Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 6 Sep 2017 18:39:09 +0200 Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Play 2 Remote @@ -453,3 +453,195 @@ index cd8590c99e22..93cac05a5170 100644 #define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100" #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350" #define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr" + +From 6c88a757042bd1f3ea3ec197aa930b7beb48e11a Mon Sep 17 00:00:00 2001 +From: hzq +Date: Mon, 19 Mar 2018 16:47:24 +0800 +Subject: [PATCH] [media] rc/keymaps: add keytable for ROC-RK3328-CC Remote + Controller + +--- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-roc-cc.c | 52 ++++++++++++++++++++++++++++++++++++ + include/media/rc-map.h | 1 + + 3 files changed, 54 insertions(+) + create mode 100644 drivers/media/rc/keymaps/rc-roc-cc.c + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index 650481039f00..b743914487a5 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -83,6 +83,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-rc6-mce.o \ + rc-real-audio-220-32-keys.o \ + rc-reddo.o \ ++ rc-roc-cc.o \ + rc-snapstream-firefly.o \ + rc-streamzap.o \ + rc-tbs-nec.o \ +diff --git a/drivers/media/rc/keymaps/rc-roc-cc.c b/drivers/media/rc/keymaps/rc-roc-cc.c +new file mode 100644 +index 000000000000..3a2a255d5723 +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-roc-cc.c +@@ -0,0 +1,52 @@ ++/* Keytable for ROC-RK3328-CC IR Remote Controller ++ * ++ * Copyright (c) 2017 ROC-RK3328-CC ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static struct rc_map_table roc_cc[] = { ++ { 0x28d7, KEY_POWER }, ++ { 0xc837, KEY_MUTE }, ++ { 0xe01f, KEY_ENTER}, ++ { 0xc03f, KEY_UP }, ++ { 0x40bf, KEY_DOWN }, ++ { 0x708f, KEY_LEFT }, ++ { 0x58a7, KEY_RIGHT }, ++ { 0x1ae5, KEY_VOLUMEDOWN }, ++ { 0xd02f, KEY_VOLUMEUP }, ++ { 0x3ac5, KEY_WWW }, ++ { 0x807f, KEY_BACK }, ++ { 0x12ed, KEY_HOME }, ++}; ++ ++static struct rc_map_list roc_cc_map = { ++ .map = { ++ .scan = roc_cc, ++ .size = ARRAY_SIZE(roc_cc), ++ .rc_type = RC_TYPE_NEC, ++ .name = RC_MAP_ROC_CC, ++ } ++}; ++ ++static int __init init_rc_map_roc_cc(void) ++{ ++ return rc_map_register(&roc_cc_map); ++} ++ ++static void __exit exit_rc_map_roc_cc(void) ++{ ++ rc_map_unregister(&roc_cc_map); ++} ++ ++module_init(init_rc_map_roc_cc) ++module_exit(exit_rc_map_roc_cc) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("ROC-RK3328-CC"); +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index 93cac05a5170..8bbe335e650c 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -191,6 +191,7 @@ void rc_map_init(void); + #define RC_MAP_RC6_MCE "rc-rc6-mce" + #define RC_MAP_REAL_AUDIO_220_32_KEYS "rc-real-audio-220-32-keys" + #define RC_MAP_REDDO "rc-reddo" ++#define RC_MAP_ROC_CC "rc-roc-cc" + #define RC_MAP_SNAPSTREAM_FIREFLY "rc-snapstream-firefly" + #define RC_MAP_STREAMZAP "rc-streamzap" + #define RC_MAP_TBS_NEC "rc-tbs-nec" + +From 04a93492c4c715a6a826c93f69e0855ca5534e81 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 3 Jul 2018 21:55:56 +0200 +Subject: [PATCH] [media] rc/keymaps: add keytable for T-Chip TRN9 IR Remote + Controller + +--- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-trn9.c | 52 ++++++++++++++++++++++++++++++++++++++ + include/media/rc-map.h | 1 + + 3 files changed, 54 insertions(+) + create mode 100644 drivers/media/rc/keymaps/rc-trn9.c + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index b743914487a5..2aaa1b33ddca 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -102,6 +102,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-tt-1500.o \ + rc-twinhan-dtv-cab-ci.o \ + rc-twinhan1027.o \ ++ rc-trn9.o \ + rc-wetek-hub.o \ + rc-wetek-play-2.o \ + rc-videomate-m1f.o \ +diff --git a/drivers/media/rc/keymaps/rc-trn9.c b/drivers/media/rc/keymaps/rc-trn9.c +new file mode 100644 +index 000000000000..f81bc3a419b3 +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-trn9.c +@@ -0,0 +1,52 @@ ++/* Keytable for T-Chip TRN9 IR Remote Controller ++ * ++ * Copyright (c) 2018 Omegamoon ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static struct rc_map_table trn9[] = { ++ { 0x0014, KEY_POWER }, ++ { 0x0013, KEY_MENU }, ++ { 0x0003, KEY_UP }, ++ { 0x0002, KEY_DOWN }, ++ { 0x000e, KEY_LEFT }, ++ { 0x001a, KEY_RIGHT }, ++ { 0x0007, KEY_OK }, ++ { 0x0058, KEY_VOLUMEDOWN }, ++ { 0x005c, KEY_MUTE }, ++ { 0x000b, KEY_VOLUMEUP }, ++ { 0x0001, KEY_BACK }, ++ { 0x0048, KEY_HOME }, ++}; ++ ++static struct rc_map_list trn9_map = { ++ .map = { ++ .scan = trn9, ++ .size = ARRAY_SIZE(trn9), ++ .rc_type = RC_TYPE_NEC, ++ .name = RC_MAP_TRN9, ++ } ++}; ++ ++static int __init init_rc_map_trn9(void) ++{ ++ return rc_map_register(&trn9_map); ++} ++ ++static void __exit exit_rc_map_trn9(void) ++{ ++ rc_map_unregister(&trn9_map); ++} ++ ++module_init(init_rc_map_trn9) ++module_exit(exit_rc_map_trn9) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Omegamoon"); +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index 8bbe335e650c..66e1c50b38fc 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -210,6 +210,7 @@ void rc_map_init(void); + #define RC_MAP_TT_1500 "rc-tt-1500" + #define RC_MAP_TWINHAN_DTV_CAB_CI "rc-twinhan-dtv-cab-ci" + #define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027" ++#define RC_MAP_TRN9 "rc-trn9" + #define RC_MAP_WETEK_HUB "rc-wetek-hub" + #define RC_MAP_WETEK_PLAY_2 "rc-wetek-play-2" + #define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100" diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch index 77787f8dd8..a5510754e0 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch @@ -1,4 +1,4 @@ -From 830aaed8ea116ecac827f830729f1d57f96ac22e Mon Sep 17 00:00:00 2001 +From dbd999a2a4e11f420098860e84bfb3c9151b4622 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 4 Sep 2017 22:34:19 +0200 Subject: [PATCH] BACKPORT: HDMI CEC support from v4.15 @@ -2392,10 +2392,10 @@ index 000000000000..bdad4b197bcd +ERESTARTSYS + The wait for a successful transmit was interrupted (e.g. by Ctrl-C). diff --git a/MAINTAINERS b/MAINTAINERS -index b88e249026a1..bb1aa323019c 100644 +index 443bc975b562..225ab2c1d35b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -2657,6 +2657,22 @@ F: drivers/net/ieee802154/cc2520.c +@@ -2674,6 +2674,22 @@ F: drivers/net/ieee802154/cc2520.c F: include/linux/spi/cc2520.h F: Documentation/devicetree/bindings/net/ieee802154/cc2520.txt @@ -2781,7 +2781,7 @@ index 3f0f71adabb4..a639ea653c7e 100644 /** diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c -index dcf26537c935..1957c340878d 100644 +index a52ca5cba015..b0b96fc01da3 100644 --- a/fs/compat_ioctl.c +++ b/fs/compat_ioctl.c @@ -57,6 +57,7 @@ @@ -3041,7 +3041,7 @@ index 2758687300b4..41e8dff588e1 100644 /* * MT_TOOL types -From d97e3abed49306c25ac724841c21c4705c55a6ea Mon Sep 17 00:00:00 2001 +From 48d7f1f5bd8f2a2252158e7eda0d83975d7b170b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 4 Sep 2017 22:34:22 +0200 Subject: [PATCH] BACKPORT: Pulse Eight HDMI CEC from v4.15 @@ -3061,10 +3061,10 @@ Subject: [PATCH] BACKPORT: Pulse Eight HDMI CEC from v4.15 create mode 100644 drivers/media/usb/pulse8-cec/pulse8-cec.c diff --git a/MAINTAINERS b/MAINTAINERS -index bb1aa323019c..3ba807edf5c6 100644 +index 225ab2c1d35b..0c1232c326a5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -8637,6 +8637,13 @@ F: include/linux/tracehook.h +@@ -8673,6 +8673,13 @@ F: include/linux/tracehook.h F: include/uapi/linux/ptrace.h F: kernel/ptrace.c @@ -3944,7 +3944,7 @@ index becdd78295cc..4588c66a8df0 100644 #endif /* _UAPI_SERIO_H */ -From 6af6d21e67410357403b1f99082ab2c825044657 Mon Sep 17 00:00:00 2001 +From c9a3bba3534d8673f07a233e5298d12979ada5b8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 4 Sep 2017 22:34:24 +0200 Subject: [PATCH] BACKPORT: RainShadow Tech HDMI CEC from v4.15 @@ -3963,10 +3963,10 @@ Subject: [PATCH] BACKPORT: RainShadow Tech HDMI CEC from v4.15 create mode 100644 drivers/media/usb/rainshadow-cec/rainshadow-cec.c diff --git a/MAINTAINERS b/MAINTAINERS -index 3ba807edf5c6..c6413ddaa627 100644 +index 0c1232c326a5..551555a162c3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -8876,6 +8876,13 @@ L: linux-fbdev@vger.kernel.org +@@ -8912,6 +8912,13 @@ L: linux-fbdev@vger.kernel.org S: Maintained F: drivers/video/fbdev/aty/aty128fb.c @@ -4427,7 +4427,7 @@ index 4588c66a8df0..89b72003fb68 100644 #endif /* _UAPI_SERIO_H */ -From 4ceffb68390fda7643be488544dc25e439bc164d Mon Sep 17 00:00:00 2001 +From d7ef718f1c62b9f4e0b7042d5b4040a14335c369 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 2 Sep 2017 16:23:11 +0200 Subject: [PATCH] [media] rc/keymaps: initialize rc-cec early @@ -4450,7 +4450,7 @@ index 354c8e724b8e..fb0c2b1f3814 100644 MODULE_LICENSE("GPL"); -From 3365306ff585f94071383606546cd0f0000c1bb3 Mon Sep 17 00:00:00 2001 +From e583e082ee42c04d3458ee71521175d39b4daed5 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 2 Sep 2017 16:23:11 +0200 Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event @@ -4460,10 +4460,10 @@ Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index a7f2e381a5bd..b98a1c828657 100644 +index d57d999c50a5..4ae2735f59e4 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -2465,6 +2465,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge) +@@ -2479,6 +2479,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge) static enum drm_connector_status dw_hdmi_connector_detect(struct drm_connector *connector, bool force) { @@ -4471,7 +4471,7 @@ index a7f2e381a5bd..b98a1c828657 100644 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, connector); -@@ -2474,7 +2475,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) +@@ -2488,7 +2489,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) dw_hdmi_update_phy_mask(hdmi); mutex_unlock(&hdmi->mutex); @@ -4497,7 +4497,7 @@ index a7f2e381a5bd..b98a1c828657 100644 } static int dw_hdmi_connector_get_modes(struct drm_connector *connector) -@@ -2867,9 +2885,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) +@@ -2891,9 +2909,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) dw_hdmi_update_phy_mask(hdmi); } mutex_unlock(&hdmi->mutex); diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch index 40c8d07dbc..9c3608ae6f 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch @@ -1,4 +1,4 @@ -From d2ee02d81c40aef4fdf0278bd0dc529a1793af79 Mon Sep 17 00:00:00 2001 +From dabace918ba0543c5a12e03fb823886891cd82dc Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Mon, 18 Jul 2016 22:34:34 +0800 Subject: [PATCH] UPSTREAM: ASoC: rockchip: correct the spdif clk @@ -18,7 +18,7 @@ Signed-off-by: Mark Brown 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c -index 44b8c72e6a16..feaba2ad6022 100644 +index c211750b54ee..784941ca2408 100644 --- a/sound/soc/rockchip/rockchip_spdif.c +++ b/sound/soc/rockchip/rockchip_spdif.c @@ -105,21 +105,7 @@ static int rk_spdif_hw_params(struct snd_pcm_substream *substream, @@ -53,7 +53,7 @@ index 44b8c72e6a16..feaba2ad6022 100644 SPDIF_CFGR_CLK_DIV_MASK | SPDIF_CFGR_HALFWORD_ENABLE | SDPIF_CFGR_VDW_MASK, -From 2316686749dfb94a33efc7f9238319c050f2c2e2 Mon Sep 17 00:00:00 2001 +From 3069a5725338532939d13e3dc329f2b3d183b260 Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Wed, 7 Sep 2016 14:30:21 +0800 Subject: [PATCH] UPSTREAM: ASoC: rockchip: spdif: restore register during @@ -70,10 +70,10 @@ Signed-off-by: Mark Brown 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c -index feaba2ad6022..cac85a5538d5 100644 +index 784941ca2408..831e4caf29d3 100644 --- a/sound/soc/rockchip/rockchip_spdif.c +++ b/sound/soc/rockchip/rockchip_spdif.c -@@ -69,6 +69,7 @@ static int rk_spdif_runtime_suspend(struct device *dev) +@@ -69,6 +69,7 @@ static int __maybe_unused rk_spdif_runtime_suspend(struct device *dev) { struct rk_spdif_dev *spdif = dev_get_drvdata(dev); @@ -81,7 +81,7 @@ index feaba2ad6022..cac85a5538d5 100644 clk_disable_unprepare(spdif->mclk); clk_disable_unprepare(spdif->hclk); -@@ -92,7 +93,16 @@ static int rk_spdif_runtime_resume(struct device *dev) +@@ -92,7 +93,16 @@ static int __maybe_unused rk_spdif_runtime_resume(struct device *dev) return ret; } @@ -100,7 +100,7 @@ index feaba2ad6022..cac85a5538d5 100644 static int rk_spdif_hw_params(struct snd_pcm_substream *substream, -From f7d622d11eba15ed1a68b8aedfd920ee4ba5ab12 Mon Sep 17 00:00:00 2001 +From d852c659ff563456480c55cfea53c578399c04ff Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Tue, 3 Jan 2017 16:52:50 +0100 Subject: [PATCH] UPSTREAM: DRM: add help to get ELD speaker allocation @@ -148,7 +148,7 @@ index 85861b63e77a..55201e7e2ede 100644 int (*get_edid_block)(void *data, u8 *buf, unsigned int block, size_t len), -From a0dc556877d94de213dd9522af39156f0a5bfe2b Mon Sep 17 00:00:00 2001 +From 4e08e72298c858a65950b98ca62613fb95cd0a35 Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Tue, 3 Jan 2017 16:52:51 +0100 Subject: [PATCH] UPSTREAM: ASoC: core: add optional pcm_new callback for DAI @@ -183,10 +183,10 @@ index 212eaaf172ed..345e4f8ee93f 100644 bool bus_control; diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c -index 49263f3a50b0..c583022d7910 100644 +index 3c6713da3ad9..e46e80c0e07d 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c -@@ -1277,6 +1277,27 @@ static int soc_probe_dai(struct snd_soc_dai *dai, int order) +@@ -1289,6 +1289,27 @@ static int soc_probe_dai(struct snd_soc_dai *dai, int order) return 0; } @@ -214,7 +214,7 @@ index 49263f3a50b0..c583022d7910 100644 static int soc_link_dai_widgets(struct snd_soc_card *card, struct snd_soc_dai_link *dai_link, struct snd_soc_pcm_runtime *rtd) -@@ -1388,6 +1409,13 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) +@@ -1400,6 +1421,13 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) dai_link->stream_name, ret); return ret; } @@ -229,7 +229,7 @@ index 49263f3a50b0..c583022d7910 100644 INIT_DELAYED_WORK(&rtd->delayed_work, codec2codec_close_delayed_work); -From 5c39a02d6f966de9f9f26a98a401c90651ebeb41 Mon Sep 17 00:00:00 2001 +From 900f1d7bb2cddd1f445e0f3ef92fb0f7056a4c5a Mon Sep 17 00:00:00 2001 From: Arnaud Pouliquen Date: Tue, 3 Jan 2017 16:52:52 +0100 Subject: [PATCH] UPSTREAM: ASoC: hdmi-codec: add channel mapping control @@ -715,7 +715,7 @@ index 028d60c196ae..cb78d8971b41 100644 snd_soc_unregister_codec(&pdev->dev); return 0; -From 4eb5c7bce96c6856f0e949e598bd9f8ec21d7b56 Mon Sep 17 00:00:00 2001 +From 5ad6154eea74dec3635e2417f06ad12d3f0a36c4 Mon Sep 17 00:00:00 2001 From: Christophe Jaillet Date: Thu, 15 Jun 2017 07:53:11 +0200 Subject: [PATCH] UPSTREAM: ASoC: rockchip: Fix an error handling in @@ -734,7 +734,7 @@ Signed-off-by: Mark Brown 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c -index 7687368779db..5a3436351efb 100644 +index b359639c1038..02ff642499bf 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -658,12 +658,13 @@ static int rockchip_i2s_probe(struct platform_device *pdev) @@ -756,7 +756,7 @@ index 7687368779db..5a3436351efb 100644 if (val >= 2 && val <= 8) soc_dai->playback.channels_max = val; -From 3fd7ca46725a4a16a1a52530ac2421bc8e037088 Mon Sep 17 00:00:00 2001 +From 9aeca2222a8f8a700c446fc9a38235ab2e3a4efd Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Thu, 10 Aug 2017 18:38:09 +0200 Subject: [PATCH] UPSTREAM: ASoC: rockchip: Delete an error message for a @@ -775,7 +775,7 @@ Signed-off-by: Mark Brown 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c -index 5a3436351efb..1da10e79a1bb 100644 +index 02ff642499bf..16ff8d5e0033 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -594,10 +594,8 @@ static int rockchip_i2s_probe(struct platform_device *pdev) @@ -791,7 +791,7 @@ index 5a3436351efb..1da10e79a1bb 100644 i2s->dev = &pdev->dev; -From d6adb14ce27f7ef3687c6d965e781782329c790d Mon Sep 17 00:00:00 2001 +From dad1bc0769692d7fd45701a4ab3fb55be012e01e Mon Sep 17 00:00:00 2001 From: John Keeping Date: Thu, 14 Sep 2017 16:58:55 +0100 Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix unbalanced clk_disable @@ -808,10 +808,10 @@ Signed-off-by: Mark Brown 1 file changed, 1 deletion(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c -index 1da10e79a1bb..f131dba7645d 100644 +index 16ff8d5e0033..986ad2efc8e9 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c -@@ -713,7 +713,6 @@ static int rockchip_i2s_remove(struct platform_device *pdev) +@@ -727,7 +727,6 @@ static int rockchip_i2s_remove(struct platform_device *pdev) if (!pm_runtime_status_suspended(&pdev->dev)) i2s_runtime_suspend(&pdev->dev); @@ -820,77 +820,7 @@ index 1da10e79a1bb..f131dba7645d 100644 return 0; -From 2c4899311942a4aaf098faf513ac7200cbc71f11 Mon Sep 17 00:00:00 2001 -From: Stefan Potyra -Date: Wed, 6 Dec 2017 16:03:24 +0100 -Subject: [PATCH] UPSTREAM: ASoC: rockchip: disable clock on error - -Disable the clocks in rk_spdif_probe when an error occurs after one -of the clocks has been enabled previously. - -Found by Linux Driver Verification project (linuxtesting.org). - -Fixes: f874b80e1571 ASoC: rockchip: Add rockchip SPDIF transceiver driver -Signed-off-by: Stefan Potyra -Signed-off-by: Mark Brown -(cherry picked from commit c7b92172a61b91936be985cb9bc499a4ebc6489b) ---- - sound/soc/rockchip/rockchip_spdif.c | 18 +++++++++++++----- - 1 file changed, 13 insertions(+), 5 deletions(-) - -diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c -index cac85a5538d5..6ff8b195acf4 100644 ---- a/sound/soc/rockchip/rockchip_spdif.c -+++ b/sound/soc/rockchip/rockchip_spdif.c -@@ -322,26 +322,30 @@ static int rk_spdif_probe(struct platform_device *pdev) - spdif->mclk = devm_clk_get(&pdev->dev, "mclk"); - if (IS_ERR(spdif->mclk)) { - dev_err(&pdev->dev, "Can't retrieve rk_spdif master clock\n"); -- return PTR_ERR(spdif->mclk); -+ ret = PTR_ERR(spdif->mclk); -+ goto err_disable_hclk; - } - - ret = clk_prepare_enable(spdif->mclk); - if (ret) { - dev_err(spdif->dev, "clock enable failed %d\n", ret); -- return ret; -+ goto err_disable_clocks; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(&pdev->dev, res); -- if (IS_ERR(regs)) -- return PTR_ERR(regs); -+ if (IS_ERR(regs)) { -+ ret = PTR_ERR(regs); -+ goto err_disable_clocks; -+ } - - spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs, - &rk_spdif_regmap_config); - if (IS_ERR(spdif->regmap)) { - dev_err(&pdev->dev, - "Failed to initialise managed register map\n"); -- return PTR_ERR(spdif->regmap); -+ ret = PTR_ERR(spdif->regmap); -+ goto err_disable_clocks; - } - - spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR; -@@ -373,6 +377,10 @@ static int rk_spdif_probe(struct platform_device *pdev) - - err_pm_runtime: - pm_runtime_disable(&pdev->dev); -+err_disable_clocks: -+ clk_disable_unprepare(spdif->mclk); -+err_disable_hclk: -+ clk_disable_unprepare(spdif->hclk); - - return ret; - } - -From 4cc851cd3ae5216602422e85bde844f1ff0e592c Mon Sep 17 00:00:00 2001 +From 20b260f46771f7313ecd6e296ec6c08a43967eb4 Mon Sep 17 00:00:00 2001 From: John Keeping Date: Mon, 8 Jan 2018 16:01:04 +0000 Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix playback after runtime @@ -926,7 +856,7 @@ Signed-off-by: John Keeping 1 file changed, 6 insertions(+) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c -index f131dba7645d..0b9bb973b5a7 100644 +index 986ad2efc8e9..5297373fe6c4 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -514,6 +514,7 @@ static bool rockchip_i2s_rd_reg(struct device *dev, unsigned int reg) @@ -957,7 +887,7 @@ index f131dba7645d..0b9bb973b5a7 100644 return false; } -From 4d40b158d955d27eef520c49f221cd7ed31d9ae0 Mon Sep 17 00:00:00 2001 +From fa8e48f2fd0abe00ee0f04128a2e9b4fed184c3f Mon Sep 17 00:00:00 2001 From: Romain Perier Date: Fri, 14 Apr 2017 10:31:12 +0200 Subject: [PATCH] UPSTREAM: drm: dw-hdmi: add specific I2S and AHB functions @@ -981,23 +911,24 @@ Signed-off-by: Archit Taneja Link: http://patchwork.freedesktop.org/patch/msgid/20170414083113.4255-2-romain.perier@collabora.com (cherry picked from commit a7d555d2f2bd675d641e742a202a5e4b37d4d019) --- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 26 ++++++++++++++++++++++++-- - 1 file changed, 24 insertions(+), 2 deletions(-) + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 27 +++++++++++++++++++++++++-- + 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index a7f2e381a5bd..da4340491fea 100644 +index d57d999c50a5..0541d96be662 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -261,6 +261,8 @@ struct dw_hdmi { - - void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); +@@ -263,6 +263,9 @@ struct dw_hdmi { u8 (*read)(struct dw_hdmi *hdmi, int offset); + + bool initialized; /* hdmi is enabled before bind */ ++ + void (*enable_audio)(struct dw_hdmi *hdmi); + void (*disable_audio)(struct dw_hdmi *hdmi); }; #define HDMI_IH_PHY_STAT0_RX_SENSE \ -@@ -811,13 +813,29 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) +@@ -821,13 +824,29 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) } EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate); @@ -1028,7 +959,7 @@ index a7f2e381a5bd..da4340491fea 100644 spin_unlock_irqrestore(&hdmi->audio_lock, flags); } EXPORT_SYMBOL_GPL(dw_hdmi_audio_enable); -@@ -828,7 +846,8 @@ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi) +@@ -838,7 +857,8 @@ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi) spin_lock_irqsave(&hdmi->audio_lock, flags); hdmi->audio_enable = false; @@ -1038,7 +969,7 @@ index a7f2e381a5bd..da4340491fea 100644 spin_unlock_irqrestore(&hdmi->audio_lock, flags); } EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable); -@@ -3677,6 +3696,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3706,6 +3726,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.irq = irq; audio.hdmi = hdmi; audio.eld = hdmi->connector.eld; @@ -1047,7 +978,7 @@ index a7f2e381a5bd..da4340491fea 100644 pdevinfo.name = "dw-hdmi-ahb-audio"; pdevinfo.data = &audio; -@@ -3690,6 +3711,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3719,6 +3741,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.write = hdmi_writeb; audio.read = hdmi_readb; audio.mod = hdmi_modb; @@ -1056,7 +987,7 @@ index a7f2e381a5bd..da4340491fea 100644 pdevinfo.name = "dw-hdmi-i2s-audio"; pdevinfo.data = &audio; -From 4ea3fd9308b3bc3b5e7699e4a52e3f7bca6e857e Mon Sep 17 00:00:00 2001 +From f856228e8933ba1e6375dbda53cc59da8d71647a Mon Sep 17 00:00:00 2001 From: Romain Perier Date: Thu, 20 Apr 2017 14:34:34 +0530 Subject: [PATCH] UPSTREAM: drm: dw-hdmi: gate audio clock from the I2S @@ -1084,10 +1015,10 @@ Signed-off-by: Archit Taneja 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index da4340491fea..e1a5966ce394 100644 +index 0541d96be662..f3a2034a0883 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -813,6 +813,15 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) +@@ -824,6 +824,15 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) } EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate); @@ -1103,7 +1034,7 @@ index da4340491fea..e1a5966ce394 100644 static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi) { hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); -@@ -826,6 +835,12 @@ static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi) +@@ -837,6 +846,12 @@ static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi) static void dw_hdmi_i2s_audio_enable(struct dw_hdmi *hdmi) { hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); @@ -1116,7 +1047,7 @@ index da4340491fea..e1a5966ce394 100644 } void dw_hdmi_audio_enable(struct dw_hdmi *hdmi) -@@ -2138,12 +2153,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) +@@ -2149,12 +2164,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) HDMI_MC_FLOWCTRL); } @@ -1129,7 +1060,7 @@ index da4340491fea..e1a5966ce394 100644 /* Workaround to clear the overflow condition */ static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) { -@@ -2295,7 +2304,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) +@@ -2306,7 +2315,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) /* HDMI Initialization Step E - Configure audio */ hdmi_clk_regenerator_update_pixel_clock(hdmi); @@ -1138,7 +1069,7 @@ index da4340491fea..e1a5966ce394 100644 } /* not for DVI mode */ -@@ -3712,6 +3721,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3742,6 +3751,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.read = hdmi_readb; audio.mod = hdmi_modb; hdmi->enable_audio = dw_hdmi_i2s_audio_enable; @@ -1147,7 +1078,7 @@ index da4340491fea..e1a5966ce394 100644 pdevinfo.name = "dw-hdmi-i2s-audio"; pdevinfo.data = &audio; -From df0540deb663a3d0b3852b88ded0817146f20e67 Mon Sep 17 00:00:00 2001 +From 5736074e471dc5306e07581bf0958043cf434341 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 7 Aug 2017 22:24:15 +0200 Subject: [PATCH] drm: dw-hdmi-i2s: sync with upstream @@ -1226,7 +1157,7 @@ index f1f62d8c1d16..5ff993a35ab6 100644 .name = DRIVER_NAME, .owner = THIS_MODULE, -From 8835208cc656c44c6c1238f637a428f6f5403bf4 Mon Sep 17 00:00:00 2001 +From d2f29756df76806c12fa12b668aeb8ac5f626bdd Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 2 Apr 2017 11:33:39 +0200 Subject: [PATCH] drm: dw-hdmi-i2s: implement get_eld @@ -1283,10 +1214,10 @@ index 5ff993a35ab6..e7312571e2cb 100644 static int snd_dw_hdmi_probe(struct platform_device *pdev) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index e1a5966ce394..605a55e3693d 100644 +index f3a2034a0883..c222b6455f03 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -3720,6 +3720,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, +@@ -3750,6 +3750,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, audio.write = hdmi_writeb; audio.read = hdmi_readb; audio.mod = hdmi_modb; @@ -1295,7 +1226,7 @@ index e1a5966ce394..605a55e3693d 100644 hdmi->disable_audio = dw_hdmi_i2s_audio_disable; -From 572da20ab103a328f7b3afdb78c93fb62947ff78 Mon Sep 17 00:00:00 2001 +From 18a9fcdb5cbde0462179d04336622cb4f97c2a7e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 17 Apr 2017 13:09:16 +0200 Subject: [PATCH] drm: dw-hdmi-i2s: configure channel allocation @@ -1318,29 +1249,7 @@ index e7312571e2cb..1d4570e3fbed 100644 /* Set LFEPBLDOWN-MIX INH and LSV */ hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3); -From 1f19793a9437b295d7dfca822f511e487c47ef4a Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Tue, 2 May 2017 18:57:19 +0200 -Subject: [PATCH] ASoC: hdmi-codec: fix I2S audio in Kodi - ---- - sound/soc/codecs/hdmi-codec.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c -index cb78d8971b41..9ebca57014e4 100644 ---- a/sound/soc/codecs/hdmi-codec.c -+++ b/sound/soc/codecs/hdmi-codec.c -@@ -758,7 +758,6 @@ static struct snd_soc_dai_driver hdmi_i2s_dai = { - .channels_max = 8, - .rates = HDMI_RATES, - .formats = I2S_FORMATS, -- .sig_bits = 24, - }, - .ops = &hdmi_dai_ops, - .pcm_new = hdmi_codec_pcm_new, - -From 559c23102f957335d697de310dce921f72fff040 Mon Sep 17 00:00:00 2001 +From c19ba12d08a8c491d21a1daf305b1b58231ca362 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 14 Aug 2017 00:14:05 +0200 Subject: [PATCH] ASoC: hdmi-codec: reorder channel map @@ -1350,7 +1259,7 @@ Subject: [PATCH] ASoC: hdmi-codec: reorder channel map 1 file changed, 52 insertions(+), 61 deletions(-) diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c -index 9ebca57014e4..e65060ae8ffc 100644 +index cb78d8971b41..b74659bc3bbc 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c @@ -205,78 +205,69 @@ const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { @@ -1485,7 +1394,7 @@ index 9ebca57014e4..e65060ae8ffc 100644 struct hdmi_codec_priv { -From d6e589fc6c9211db345d667545f191e187640e41 Mon Sep 17 00:00:00 2001 +From 0b22ce2a2766052fe28a3162623d19ba38adaef5 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 27 Aug 2017 23:32:40 +0200 Subject: [PATCH] ASoC: codecs: rk3328: limit to working rates @@ -1513,20 +1422,109 @@ index af1b7429b6d4..d0b4578ffa0e 100644 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE | -From 8f4b1d8cd40d4e052214c4abc200ab68f1a4bb78 Mon Sep 17 00:00:00 2001 +From f96be8cf25bfda88d5c492f42e1f6ca5951356f3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman -Date: Mon, 14 Aug 2017 00:14:05 +0200 +Date: Sun, 8 Jul 2018 12:34:43 +0200 Subject: [PATCH] drm: dw-hdmi: change audio config --- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 14 +++++--------- - 1 file changed, 5 insertions(+), 9 deletions(-) + drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 9 ++------- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 15 ++++++++++++--- + 2 files changed, 14 insertions(+), 10 deletions(-) +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +index 1d4570e3fbed..d0904f6b7a82 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +@@ -110,8 +110,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, + HDMI_AUD_INT_FIFO_FULL_MSK, HDMI_AUD_INT); + hdmi_update_bits(audio, HDMI_AUD_CONF0_SW_RESET, + HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0); +- hdmi_update_bits(audio, HDMI_MC_SWRSTZ_I2S_RESET_MSK, +- HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ); ++ hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ); + + switch (hparms->mode) { + case NLPCM: +@@ -193,11 +192,6 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, + /* Set LFEPBLDOWN-MIX INH and LSV */ + hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3); + +- hdmi_update_bits(audio, HDMI_AUD_CONF0_SW_RESET, +- HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0); +- hdmi_update_bits(audio, HDMI_MC_SWRSTZ_I2S_RESET_MSK, +- HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ); +- + dw_hdmi_audio_enable(hdmi); + + return 0; +@@ -211,6 +205,7 @@ static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data) + dw_hdmi_audio_disable(hdmi); + + hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0); ++ hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ); + } + + static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, u8 *buf, size_t len) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 605a55e3693d..661b1259ebe0 100644 +index c222b6455f03..065723179791 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -628,18 +628,14 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi) +@@ -89,6 +89,7 @@ static const struct dw_hdmi_audio_tmds_n common_tmds_n_table[] = { + { .tmds = 71000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, }, + { .tmds = 72000000, .n_32k = 4096, .n_44k1 = 5635, .n_48k = 6144, }, + { .tmds = 73250000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, }, ++ { .tmds = 74176000, .n_32k = 11648, .n_44k1 = 17836, .n_48k = 11648, }, + { .tmds = 74250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, }, + { .tmds = 75000000, .n_32k = 4096, .n_44k1 = 5880, .n_48k = 6144, }, + { .tmds = 78750000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, }, +@@ -105,13 +106,16 @@ static const struct dw_hdmi_audio_tmds_n common_tmds_n_table[] = { + { .tmds = 119000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, }, + { .tmds = 135000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, }, + { .tmds = 146250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, }, +- { .tmds = 148500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, }, ++ { .tmds = 148352000, .n_32k = 11648, .n_44k1 = 8918, .n_48k = 5824, }, ++ { .tmds = 148500000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, }, + { .tmds = 154000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, }, + { .tmds = 162000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, }, + + /* For 297 MHz+ HDMI spec have some other rule for setting N */ +- { .tmds = 297000000, .n_32k = 3073, .n_44k1 = 4704, .n_48k = 5120, }, +- { .tmds = 594000000, .n_32k = 3073, .n_44k1 = 9408, .n_48k = 10240, }, ++ { .tmds = 296703000, .n_32k = 5824, .n_44k1 = 4459, .n_48k = 5824, }, ++ { .tmds = 297000000, .n_32k = 3072, .n_44k1 = 4704, .n_48k = 5120, }, ++ { .tmds = 593407000, .n_32k = 5824, .n_44k1 = 8918, .n_48k = 5824, }, ++ { .tmds = 594000000, .n_32k = 3072, .n_44k1 = 9408, .n_48k = 6144, }, + + /* End of table */ + { .tmds = 0, .n_32k = 0, .n_44k1 = 0, .n_48k = 0, }, +@@ -831,6 +835,11 @@ static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable) + else + hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE; + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); ++ ++ if (enable) { ++ hdmi_set_cts_n(hdmi, 0, 0); ++ hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); ++ } + } + + static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi) + +From ed2e01d46f3bbf3eda4d37ce2a6e8874b15a478a Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 8 Jul 2018 12:56:51 +0200 +Subject: [PATCH] WIP: drm: dw-hdmi: use Auto CTS mode + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 52 ++++++++++++++++++------------- + 1 file changed, 31 insertions(+), 21 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 065723179791..841bdfcae3e0 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -643,14 +643,18 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi) static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts, unsigned int n) { @@ -1535,35 +1533,65 @@ index 605a55e3693d..661b1259ebe0 100644 - - /* nshift factor = 0 */ - hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); -+ hdmi_modb(hdmi, 0x80, 0x80, HDMI_AUD_N3); - - hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | - HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); +- +- hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | +- HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); ++ /* Use Auto CTS mode with CTS is unknown */ ++ if (cts) { ++ /* Must be set/cleared first */ ++ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); ++ ++ /* nshift factor = 0 */ ++ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); ++ ++ hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | ++ HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); ++ } else ++ hdmi_writeb(hdmi, 0, HDMI_AUD_CTS3); hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); -- hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3); -+ hdmi_writeb(hdmi, ((n >> 16) & 0x0f) | 0x80, HDMI_AUD_N3); - hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2); - hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1); - } -@@ -784,7 +780,7 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, +@@ -777,24 +781,30 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, + { + unsigned long ftdms = pixel_clk; + unsigned int n, cts; ++ u8 config3; + u64 tmp; + + n = hdmi_find_n(hdmi, pixel_clk, sample_rate); + +- /* +- * Compute the CTS value from the N value. Note that CTS and N +- * can be up to 20 bits in total, so we need 64-bit math. Also +- * note that our TDMS clock is not fully accurate; it is accurate +- * to kHz. This can introduce an unnecessary remainder in the +- * calculation below, so we don't try to warn about that. +- */ +- tmp = (u64)ftdms * n; +- do_div(tmp, 128 * sample_rate); +- cts = tmp; ++ config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID); + +- dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", +- __func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000, +- n, cts); ++ if (config3 & HDMI_CONFIG3_AHBAUDDMA) { ++ /* ++ * Compute the CTS value from the N value. Note that CTS and N ++ * can be up to 20 bits in total, so we need 64-bit math. Also ++ * note that our TDMS clock is not fully accurate; it is accurate ++ * to kHz. This can introduce an unnecessary remainder in the ++ * calculation below, so we don't try to warn about that. ++ */ ++ tmp = (u64)ftdms * n; ++ do_div(tmp, 128 * sample_rate); ++ cts = tmp; ++ ++ dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", ++ __func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000, ++ n, cts); ++ } else ++ cts = 0; + spin_lock_irq(&hdmi->audio_lock); hdmi->audio_n = n; - hdmi->audio_cts = cts; -- hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0); -+ hdmi_set_cts_n(hdmi, cts, n); - spin_unlock_irq(&hdmi->audio_lock); - } - -@@ -3721,8 +3717,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, - audio.read = hdmi_readb; - audio.mod = hdmi_modb; - audio.eld = hdmi->connector.eld; -- hdmi->enable_audio = dw_hdmi_i2s_audio_enable; -- hdmi->disable_audio = dw_hdmi_i2s_audio_disable; -+ //hdmi->enable_audio = dw_hdmi_i2s_audio_enable; -+ //hdmi->disable_audio = dw_hdmi_i2s_audio_disable; - - pdevinfo.name = "dw-hdmi-i2s-audio"; - pdevinfo.data = &audio; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch index 72c26686c4..c176ccda0b 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch @@ -1,17 +1,142 @@ -From 7b26b6c4eef43138c3c014ce4d185745bc9a0174 Mon Sep 17 00:00:00 2001 +From cf1a1299ed4c29012b0cf0476d93f45d49629b18 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 1 Jul 2018 23:22:32 +0200 +Subject: [PATCH] arm: dts: rockchip: rk3288: update dtsi + +--- + arch/arm/boot/dts/rk3288.dtsi | 20 +++++++++++++++----- + 1 file changed, 15 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 8e51132ef7e4..54b785278956 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -352,49 +352,57 @@ + + sdmmc: dwmmc@ff0c0000 { + compatible = "rockchip,rk3288-dw-mshc"; +- clock-freq-min-max = <400000 150000000>; ++ max-frequency = <150000000>; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, + <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0x0 0xff0c0000 0x0 0x4000>; ++ resets = <&cru SRST_MMC0>; ++ reset-names = "reset"; + status = "disabled"; + }; + + sdio0: dwmmc@ff0d0000 { + compatible = "rockchip,rk3288-dw-mshc"; +- clock-freq-min-max = <400000 150000000>; ++ max-frequency = <150000000>; + clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, + <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0x0 0xff0d0000 0x0 0x4000>; ++ resets = <&cru SRST_SDIO0>; ++ reset-names = "reset"; + status = "disabled"; + }; + + sdio1: dwmmc@ff0e0000 { + compatible = "rockchip,rk3288-dw-mshc"; +- clock-freq-min-max = <400000 150000000>; ++ max-frequency = <150000000>; + clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>, + <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0x0 0xff0e0000 0x0 0x4000>; ++ resets = <&cru SRST_SDIO1>; ++ reset-names = "reset"; + status = "disabled"; + }; + + emmc: dwmmc@ff0f0000 { + compatible = "rockchip,rk3288-dw-mshc"; +- clock-freq-min-max = <400000 150000000>; ++ max-frequency = <150000000>; + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, + <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0x0 0xff0f0000 0x0 0x4000>; ++ resets = <&cru SRST_EMMC>; ++ reset-names = "reset"; + status = "disabled"; + supports-emmc; + }; +@@ -638,6 +646,7 @@ + compatible = "rockchip,rk3288-tsadc"; + reg = <0x0 0xff280000 0x0 0x100>; + interrupts = ; ++ rockchip,grf = <&grf>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + assigned-clocks = <&cru SCLK_TSADC>; +@@ -646,7 +655,7 @@ + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; +- pinctrl-1 = <&otp_gpio>; ++ pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <120000>; +@@ -1699,6 +1708,7 @@ + operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + power-domains = <&power RK3288_PD_GPU>; ++ power-off-delay-ms = <200>; + status = "disabled"; + + upthreshold = <75>; + +From 25d521533a524ec201dd8b0e38a32989f8c00bfc Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Aug 2017 10:24:19 +0200 Subject: [PATCH] arm: dts: rk3288-miniarm: update dts --- - arch/arm/boot/dts/rk3288-miniarm.dts | 26 ++++++++++++++++++++------ - 1 file changed, 20 insertions(+), 6 deletions(-) + arch/arm/boot/dts/rk3288-miniarm.dts | 55 ++++++++++++++++++++++++++++-------- + 1 file changed, 44 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts -index 2fbec41f0b23..3d2507b8c864 100644 +index a5c5300797ab..7fc92c037dfd 100644 --- a/arch/arm/boot/dts/rk3288-miniarm.dts +++ b/arch/arm/boot/dts/rk3288-miniarm.dts -@@ -66,7 +66,7 @@ +@@ -42,11 +42,22 @@ + #include + #include "rk3288.dtsi" + #include "rk3288-rkisp1.dtsi" +-#include "rk3288-linux.dtsi" ++#include "rk3288cg-opp.dtsi" + + / { ++ model = "ASUS Tinker Board"; + compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288"; + ++ chosen { ++ bootargs = "earlyprintk=uart8250-32bit,0xff690000"; ++ }; ++ ++ cpuinfo { ++ compatible = "rockchip,cpuinfo"; ++ nvmem-cells = <&efuse_id>; ++ nvmem-cell-names = "id"; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; +@@ -67,7 +78,7 @@ wireless-wlan { compatible = "wlan-platdata"; rockchip,grf = <&grf>; @@ -20,9 +145,12 @@ index 2fbec41f0b23..3d2507b8c864 100644 sdio_vref = <1800>; WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>; status = "okay"; -@@ -130,14 +130,14 @@ +@@ -129,16 +140,16 @@ + linux,default-trigger="mmc0"; + }; - led1-led { +- led1-led { ++ heartbeat-led { gpios=<&gpio1 25 GPIO_ACTIVE_HIGH>; - linux,default-trigger="default-off"; + linux,default-trigger="heartbeat"; @@ -37,21 +165,21 @@ index 2fbec41f0b23..3d2507b8c864 100644 simple-audio-card,mclk-fs = <512>; simple-audio-card,cpu { sound-dai = <&i2s>; -@@ -196,20 +196,33 @@ +@@ -204,20 +215,33 @@ cpu0-supply = <&vdd_cpu>; }; -+&cpu0_opp_table { -+ opp-1704000000 { -+ opp-hz = /bits/ 64 <1704000000>; -+ opp-microvolt = <1350000>; -+ clock-latency-ns = <40000>; -+ }; -+ opp-1800000000 { -+ opp-hz = /bits/ 64 <1800000000>; -+ opp-microvolt = <1400000>; -+ clock-latency-ns = <40000>; -+ }; ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ disable-wp; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; ++ status = "okay"; +}; + &gmac { @@ -73,7 +201,19 @@ index 2fbec41f0b23..3d2507b8c864 100644 }; &dsi0 { -@@ -537,6 +550,7 @@ +@@ -238,6 +262,11 @@ + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <0>; ++ rockchip,phy-table = ++ <74250000 0x8009 0x0004 0x0272>, ++ <165000000 0x802b 0x0004 0x0209>, ++ <371250000 0x802d 0x0001 0x0149>, ++ <0 0x0000 0x0000 0x0000>; + status = "okay"; + /* Don't use vopl for HDMI */ + ports { +@@ -545,6 +574,7 @@ &i2s { #sound-dai-cells = <0>; @@ -81,30 +221,98 @@ index 2fbec41f0b23..3d2507b8c864 100644 status = "okay"; }; -@@ -560,7 +574,7 @@ - non-removable; - num-slots = <1>; - pinctrl-names = "default"; -- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; -+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>; - sd-uhs-sdr104; - supports-sdio; +@@ -558,7 +588,7 @@ + &sdio0 { + status = "okay"; + clock-frequency = <50000000>; +- clock-freq-min-max = <200000 50000000>; ++ max-frequency = <50000000>; + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; +@@ -579,7 +609,7 @@ + + &saradc { + vref-supply = <&vcc18_ldo1>; +- status ="okay"; ++ status = "okay"; }; + + &sdmmc { +@@ -604,7 +634,6 @@ + &tsadc { + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ +- pinctrl-1 = <&otp_out>; + status = "okay"; + }; + +@@ -615,6 +644,8 @@ + }; + + &uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_xfer>, <&uart1_cts>, <&uart1_rts>; + status = "okay"; + }; + +@@ -627,6 +658,8 @@ + }; + + &uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart4_xfer>, <&uart4_cts>, <&uart4_rts>; + status = "okay"; + }; + +@@ -644,7 +677,7 @@ + }; + + &usb_otg { +- status= "okay"; ++ status = "okay"; + }; + + &vopb { -From b550971c44a70aad2dd503c12ea90d67d65fe806 Mon Sep 17 00:00:00 2001 +From 6cf3332dd491b1898930ff53e3cdd3b9f2a4a190 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 2 Nov 2017 23:17:46 +0100 Subject: [PATCH] arm: dts: rk3288-miqi: update dts --- - arch/arm/boot/dts/rk3288-miqi.dts | 56 +++++++++++++++++++++++---------------- - 1 file changed, 33 insertions(+), 23 deletions(-) + arch/arm/boot/dts/rk3288-miqi.dts | 69 ++++++++++++++++++++++++--------------- + 1 file changed, 43 insertions(+), 26 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts -index b90b0e5969ec..ffced204abcf 100644 +index a2862c6a17f1..18f2a9f96d71 100644 --- a/arch/arm/boot/dts/rk3288-miqi.dts +++ b/arch/arm/boot/dts/rk3288-miqi.dts -@@ -55,29 +55,14 @@ +@@ -43,10 +43,21 @@ + /dts-v1/; + #include + #include "rk3288.dtsi" +-#include "rk3288-linux.dtsi" ++#include "rk3288cg-opp.dtsi" + + / { +- compatible = "rockchip,rk3288-miqi", "rockchip,rk3288"; ++ model = "mqmaker MiQi"; ++ compatible = "rockchip,rk3288-miqi", "rockchip,rk3288w", "rockchip,rk3288"; ++ ++ chosen { ++ bootargs = "earlyprintk=uart8250-32bit,0xff690000"; ++ }; ++ ++ cpuinfo { ++ compatible = "rockchip,cpuinfo"; ++ nvmem-cells = <&efuse_id>; ++ nvmem-cell-names = "id"; ++ }; + + memory { + device_type = "memory"; +@@ -56,29 +67,14 @@ sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -140,31 +348,7 @@ index b90b0e5969ec..ffced204abcf 100644 }; ext_gmac: external-gmac-clock { -@@ -181,9 +166,23 @@ - cpu0-supply = <&vdd_cpu>; - }; - -+&cpu0_opp_table { -+ opp-1704000000 { -+ opp-hz = /bits/ 64 <1704000000>; -+ opp-microvolt = <1350000>; -+ clock-latency-ns = <40000>; -+ }; -+ opp-1800000000 { -+ opp-hz = /bits/ 64 <1800000000>; -+ opp-microvolt = <1400000>; -+ clock-latency-ns = <40000>; -+ }; -+}; -+ - &gpu { - status = "okay"; - mali-supply = <&vdd_gpu>; -+ power-off-delay-ms = <200>; - }; - - &emmc { -@@ -203,6 +202,12 @@ +@@ -204,6 +200,12 @@ #size-cells = <0>; #sound-dai-cells = <0>; status = "okay"; @@ -177,7 +361,7 @@ index b90b0e5969ec..ffced204abcf 100644 }; &hevc_service { -@@ -234,14 +239,14 @@ +@@ -235,14 +237,14 @@ clock_in_out = "input"; snps,reset-gpio = <&gpio4 7 0>; snps,reset-active-low; @@ -194,7 +378,7 @@ index b90b0e5969ec..ffced204abcf 100644 }; /* ---------------------------------------------------------------------------------- -@@ -413,6 +418,7 @@ I2C +@@ -414,6 +416,7 @@ I2C &i2s { #sound-dai-cells = <0>; @@ -202,7 +386,25 @@ index b90b0e5969ec..ffced204abcf 100644 status = "okay"; }; -@@ -471,6 +477,10 @@ I2C +@@ -439,6 +442,17 @@ I2C + status = "okay"; + }; + ++&saradc { ++ vref-supply = <&vcc_18>; ++ status = "okay"; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ + /* + * Debug Serial Port + */ +@@ -472,6 +486,10 @@ I2C &vopl { status = "okay"; @@ -213,18 +415,23 @@ index b90b0e5969ec..ffced204abcf 100644 }; &vopl_mmu { +@@ -546,4 +564,3 @@ I2C + }; + + }; +- -From ccb6c0062630f497f3b10e3b35a33085b32da968 Mon Sep 17 00:00:00 2001 +From ca712805039a7324e9451784ebec7099cb36e5d3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: rk3328: update dtsi --- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 54 ++++++++++++++++++++++++-------- - 1 file changed, 41 insertions(+), 13 deletions(-) + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 60 +++++++++++++++++++++++++------- + 1 file changed, 48 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index c7316fdd582f..d5ad73bc2932 100644 +index 0d2251c903b1..4e2418be4bda 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -88,6 +88,8 @@ @@ -254,46 +461,82 @@ index c7316fdd582f..d5ad73bc2932 100644 enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; }; -@@ -161,6 +167,18 @@ - opp-microvolt-L1 = <1300000>; +@@ -161,6 +167,22 @@ + opp-microvolt-L1 = <1300000 1300000 1350000>; clock-latency-ns = <40000>; }; + /* + opp-1392000000 { + opp-hz = /bits/ 64 <1392000000>; -+ opp-microvolt = <1350000>; ++ opp-microvolt = <1350000 1350000 1350000>; ++ opp-microvolt-L0 = <1350000 1350000 1350000>; ++ opp-microvolt-L1 = <1325000 1325000 1350000>; + clock-latency-ns = <40000>; + }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; -+ opp-microvolt = <1350000>; ++ opp-microvolt = <1350000 1350000 1350000>; ++ opp-microvolt-L0 = <1350000 1350000 1350000>; ++ opp-microvolt-L1 = <1325000 1325000 1350000>; + clock-latency-ns = <40000>; + }; + */ }; arm-pmu { -@@ -186,7 +204,7 @@ - }; - - psci { -- compatible = "arm,psci-1.0"; -+ compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - -@@ -705,6 +723,10 @@ - opp-microvolt-L0 = <1125000>; +@@ -438,6 +460,7 @@ + reg-shift = <2>; + reg-io-width = <4>; + dmas = <&dmac 2>, <&dmac 3>; ++ dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "disabled"; +@@ -452,6 +475,7 @@ + reg-shift = <2>; + reg-io-width = <4>; + dmas = <&dmac 4>, <&dmac 5>; ++ dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>; + status = "disabled"; +@@ -466,6 +490,7 @@ + reg-shift = <2>; + reg-io-width = <4>; + dmas = <&dmac 6>, <&dmac 7>; ++ dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2m1_xfer>; + status = "disabled"; +@@ -704,9 +729,9 @@ + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; +- opp-microvolt = <975000>; +- opp-microvolt-L0 = <975000>; +- opp-microvolt-L1 = <950000>; ++ opp-microvolt = <1050000>; ++ opp-microvolt-L0 = <1050000>; ++ opp-microvolt-L1 = <1025000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; +@@ -720,6 +745,14 @@ + opp-microvolt-L0 = <1150000>; opp-microvolt-L1 = <1100000>; }; ++ /* + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1150000>; ++ opp-microvolt-L0 = <1150000>; ++ opp-microvolt-L1 = <1125000>; + }; ++ */ }; vdpu: vpu_service@ff350000 { -@@ -828,7 +850,7 @@ +@@ -843,7 +876,7 @@ interrupts = ; interrupt-names = "rkvdec_mmu"; clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; @@ -302,30 +545,29 @@ index c7316fdd582f..d5ad73bc2932 100644 power-domains = <&power RK3328_PD_VIDEO>; #iommu-cells = <0>; }; -@@ -932,6 +954,8 @@ - reg = <0x0 0xff373f00 0x0 0x100>; +@@ -921,6 +954,8 @@ + vop: vop@ff370000 { + compatible = "rockchip,rk3328-vop"; + reg = <0x0 0xff370000 0x0 0x3efc>; ++ reg-names = "regs", "gamma_lut"; ++ rockchip,grf = <&grf>; interrupts = ; - interrupt-names = "vop_mmu"; -+ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; -+ clock-names = "aclk", "hclk"; - #iommu-cells = <0>; - status = "disabled"; - }; -@@ -1205,9 +1229,10 @@ + clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; +@@ -1226,10 +1261,10 @@ sdmmc: dwmmc@ff500000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff500000 0x0 0x4000>; - clock-freq-min-max = <400000 150000000>; -- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; -- clock-names = "biu", "ciu"; + max-frequency = <150000000>; -+ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, -+ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, + <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; +- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; status = "disabled"; -@@ -1216,10 +1241,10 @@ +@@ -1238,10 +1273,10 @@ sdio: dwmmc@ff510000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff510000 0x0 0x4000>; @@ -338,21 +580,20 @@ index c7316fdd582f..d5ad73bc2932 100644 fifo-depth = <0x100>; interrupts = ; status = "disabled"; -@@ -1228,9 +1253,10 @@ +@@ -1250,10 +1285,10 @@ emmc: dwmmc@ff520000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff520000 0x0 0x4000>; - clock-freq-min-max = <400000 150000000>; -- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; -- clock-names = "biu", "ciu"; + max-frequency = <150000000>; -+ clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, -+ <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, + <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; +- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; status = "disabled"; -@@ -1252,6 +1278,7 @@ +@@ -1275,6 +1310,7 @@ "pclk_mac"; resets = <&cru SRST_GMAC2IO_A>; reset-names = "stmmaceth"; @@ -360,35 +601,39 @@ index c7316fdd582f..d5ad73bc2932 100644 status = "disabled"; }; -@@ -1322,9 +1349,10 @@ +@@ -1345,10 +1381,10 @@ sdmmc_ext: dwmmc@ff5f0000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff5f0000 0x0 0x4000>; - clock-freq-min-max = <400000 150000000>; -- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; -- clock-names = "biu", "ciu"; + max-frequency = <150000000>; -+ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, -+ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; + clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, + <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; +- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = ; status = "disabled"; -From db792f3a20ed76c42048f6c155c308b18bdb9f0d Mon Sep 17 00:00:00 2001 +From 0cf4e80b916ca39a676d998252b99ebceeaa8ba7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: update dts --- - arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 215 +++++++++++++++---------- - 1 file changed, 134 insertions(+), 81 deletions(-) + arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 250 ++++++++++++++++--------- + 1 file changed, 158 insertions(+), 92 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index b5bb7bf0f34c..82f257d39be3 100644 +index ea8cd77333a8..68795d255309 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -@@ -52,18 +52,6 @@ +@@ -48,20 +48,15 @@ + compatible = "pine64,rock64", "rockchip,rk3328"; + + chosen { +- bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ bootargs = "earlyprintk=uart8250-32bit,0xff130000"; stdout-path = "serial2:1500000n8"; }; @@ -402,13 +647,34 @@ index b5bb7bf0f34c..82f257d39be3 100644 - rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ - interrupts = ; - status = "okay"; -- }; -- - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; -@@ -73,7 +61,7 @@ ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; + }; + gmac_clkin: external-gmac-clock { +@@ -71,9 +66,25 @@ + #clock-cells = <0>; + }; + ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ vcc_sd: sdmmc-regulator { compatible = "regulator-fixed"; - gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; @@ -416,12 +682,12 @@ index b5bb7bf0f34c..82f257d39be3 100644 pinctrl-names = "default"; pinctrl-0 = <&sdmmc0m1_gpio>; regulator-name = "vcc_sd"; -@@ -82,25 +70,15 @@ +@@ -82,56 +93,58 @@ vin-supply = <&vcc_io>; }; - vcc_host_5v: vcc-host-5v-regulator { -+ vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { ++ vcc_host_5v: vcc_otg_5v: vcc-host-5v-regulator { compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; @@ -430,10 +696,12 @@ index b5bb7bf0f34c..82f257d39be3 100644 - pinctrl-0 = <&usb30_host_drv>; + pinctrl-0 = <&usb_host_drv>; regulator-name = "vcc_host_5v"; - regulator-always-on; -- vin-supply = <&vcc_sys>; -- }; -- +- regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_sys>; + }; + - vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { - compatible = "regulator-fixed"; - enable-active-high; @@ -442,29 +710,35 @@ index b5bb7bf0f34c..82f257d39be3 100644 - pinctrl-0 = <&usb20_host_drv>; - regulator-name = "vcc_host1_5v"; - regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_sys>; - }; - -@@ -113,18 +91,47 @@ - regulator-max-microvolt = <5000000>; - }; - +- vin-supply = <&vcc_sys>; +- }; + leds { + compatible = "gpio-leds"; -+ + +- vcc_sys: vcc-sys { +- compatible = "regulator-fixed"; +- regulator-name = "vcc_sys"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- }; + standby-led { + gpios = <&rk805 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; -+ + +- xin32k: xin32k { +- compatible = "fixed-clock"; +- clock-frequency = <32768>; +- clock-output-names = "xin32k"; +- #clock-cells = <0>; + power-led { + gpios = <&rk805 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc0"; + }; -+ }; -+ + }; + ir-receiver { compatible = "gpio-ir-receiver"; + gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; @@ -496,7 +770,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 simple-audio-card,cpu { sound-dai = <&i2s1>; }; -@@ -133,18 +140,21 @@ +@@ -140,18 +153,21 @@ }; }; @@ -524,7 +798,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 }; &codec { -@@ -168,6 +178,15 @@ +@@ -175,6 +191,15 @@ cpu-supply = <&vdd_arm>; }; @@ -540,11 +814,9 @@ index b5bb7bf0f34c..82f257d39be3 100644 &display_subsystem { status = "okay"; }; -@@ -175,31 +194,42 @@ - &emmc { - bus-width = <8>; +@@ -184,30 +209,40 @@ cap-mmc-highspeed; -+ mmc-hs200-1_8v; + mmc-hs200-1_8v; non-removable; - supports-emmc; pinctrl-names = "default"; @@ -564,7 +836,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 - snps,reset-gpio = <&gpio1 18 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; pinctrl-names = "default"; pinctrl-0 = <&rgmiim1_pins>; @@ -579,7 +851,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 }; +&gmac2phy { -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; @@ -591,7 +863,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 &gpu { status = "okay"; mali-supply = <&vdd_logic>; -@@ -215,6 +245,8 @@ +@@ -223,6 +258,8 @@ &hdmi { #sound-dai-cells = <0>; @@ -600,24 +872,24 @@ index b5bb7bf0f34c..82f257d39be3 100644 status = "okay"; }; -@@ -231,14 +263,14 @@ +@@ -239,14 +276,14 @@ reg = <0x18>; interrupt-parent = <&gpio2>; interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; ++ clock-output-names = "rk805-clkout1", "rk805-clkout2"; pinctrl-names = "default"; pinctrl-0 = <&pmic_int_l>; rockchip,system-power-controller; wakeup-source; gpio-controller; -- clock-output-names = "xin32k", "rk805-clkout2"; +- clock-output-names = "rk805-clkout1", "rk805-clkout2"; #gpio-cells = <2>; - #clock-cells = <1>; vcc1-supply = <&vcc_sys>; vcc2-supply = <&vcc_sys>; -@@ -248,11 +280,11 @@ +@@ -256,11 +293,11 @@ vcc6-supply = <&vcc_sys>; rtc { @@ -631,7 +903,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 }; gpio { -@@ -272,8 +304,8 @@ +@@ -280,8 +317,8 @@ regulator-max-microvolt = <1450000>; regulator-initial-mode = <0x1>; regulator-ramp-delay = <12500>; @@ -641,8 +913,8 @@ index b5bb7bf0f34c..82f257d39be3 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -284,12 +316,13 @@ - vdd_arm: RK805_DCDC2@1 { +@@ -292,12 +329,13 @@ + vdd_arm: RK805_DCDC2 { regulator-compatible = "RK805_DCDC2"; regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; @@ -656,7 +928,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -301,8 +334,8 @@ +@@ -309,8 +347,8 @@ regulator-compatible = "RK805_DCDC3"; regulator-name = "vcc_ddr"; regulator-initial-mode = <0x1>; @@ -666,7 +938,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -315,8 +348,8 @@ +@@ -323,8 +361,8 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-initial-mode = <0x1>; @@ -676,12 +948,12 @@ index b5bb7bf0f34c..82f257d39be3 100644 regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; -@@ -324,13 +357,13 @@ +@@ -332,13 +370,13 @@ }; }; -- vdd_18: RK805_LDO1@4 { -+ vcc_18: RK805_LDO1@4 { +- vdd_18: RK805_LDO1 { ++ vcc_18: RK805_LDO1 { regulator-compatible = "RK805_LDO1"; - regulator-name = "vdd_18"; + regulator-name = "vcc_18"; @@ -693,7 +965,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; -@@ -342,24 +375,24 @@ +@@ -350,8 +388,8 @@ regulator-name = "vcc18_emmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -703,29 +975,17 @@ index b5bb7bf0f34c..82f257d39be3 100644 regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; - }; - }; - -- vdd_10: RK805_LDO3@6 { -+ vdd_11: RK805_LDO3@6 { - regulator-compatible = "RK805_LDO3"; -- regulator-name = "vdd_10"; -- regulator-min-microvolt = <1000000>; -- regulator-max-microvolt = <1000000>; +@@ -363,8 +401,8 @@ + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; - regulator-boot-on; -+ regulator-name = "vdd_11"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; regulator-always-on; + regulator-boot-on; regulator-state-mem { regulator-on-in-suspend; -- regulator-suspend-microvolt = <1000000>; -+ regulator-suspend-microvolt = <1100000>; - }; - }; - }; -@@ -373,6 +406,16 @@ + regulator-suspend-microvolt = <1000000>; +@@ -381,6 +419,16 @@ }; &i2s1 { @@ -742,7 +1002,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 #sound-dai-cells = <0>; status = "okay"; }; -@@ -383,7 +426,7 @@ +@@ -391,7 +439,7 @@ vccio1-supply = <&vcc_io>; vccio2-supply = <&vcc18_emmc>; vccio3-supply = <&vcc_io>; @@ -751,7 +1011,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 vccio5-supply = <&vcc_io>; vccio6-supply = <&vcc_io>; pmuio-supply = <&vcc_io>; -@@ -392,37 +435,26 @@ +@@ -400,37 +448,26 @@ &pinctrl { ir { ir_int: ir-int { @@ -795,7 +1055,7 @@ index b5bb7bf0f34c..82f257d39be3 100644 }; &rkvdec_mmu { -@@ -437,8 +469,15 @@ +@@ -445,8 +482,15 @@ max-frequency = <150000000>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; @@ -812,64 +1072,92 @@ index b5bb7bf0f34c..82f257d39be3 100644 status = "okay"; }; -@@ -456,9 +495,22 @@ +@@ -454,19 +498,43 @@ + status = "okay"; + + flash@0 { +- compatible = "gigadevice,gd25q128", "jedec,spi-nor"; ++ compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + m25p,fast-read; + /* The max SCLK of the flash 104/80 MHZ */ + spi-max-frequency = <50000000>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ loader@8000 { ++ label = "loader"; ++ reg = <0x8000 0x3F0000>; ++ }; ++ }; }; }; +&threshold { -+ temperature = <90000>; /* millicelsius */ ++ temperature = <80000>; /* millicelsius */ +}; + +&target { -+ temperature = <105000>; /* millicelsius */ ++ temperature = <95000>; /* millicelsius */ +}; + +&soc_crit { -+ temperature = <110000>; /* millicelsius */ ++ temperature = <100000>; /* millicelsius */ +}; + &tsadc { rockchip,hw-tshut-mode = <0>; rockchip,hw-tshut-polarity = <0>; -+ rockchip,hw-tshut-temp = <120000>; ++ rockchip,hw-tshut-temp = <110000>; status = "okay"; }; -@@ -482,15 +534,16 @@ +@@ -476,21 +544,19 @@ + + &u2phy { + status = "okay"; +- + }; + + &u2phy_host { +- phy-supply = <&vcc_host1_5v>; + status = "okay"; + }; + + &u2phy_otg { +- phy-supply = <&vcc_otg_5v>; ++ vbus-supply = <&vcc_otg_5v>; + status = "okay"; }; &u3phy { - phy-supply = <&vcc_host_5v>; - status = "okay"; - }; - - &u3phy_utmi { -+ phy-supply = <&vcc_host_5v>; - status = "okay"; - }; - - &u3phy_pipe { -+ phy-supply = <&vcc_host_5v>; ++ vbus-supply = <&vcc_host_5v>; status = "okay"; }; -From 5f81039a852799686e3bed6d5b5e2c0d12d849f1 Mon Sep 17 00:00:00 2001 +From f8574a0c71e49e998490c77d4666c23cee4c7aa7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-box board --- - arch/arm64/boot/dts/rockchip/rk3328-box.dts | 628 ++++++++++++++++++++++++++++ - 1 file changed, 628 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-box.dts | 642 ++++++++++++++++++++++++++++ + 1 file changed, 642 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box.dts b/arch/arm64/boot/dts/rockchip/rk3328-box.dts new file mode 100644 -index 000000000000..215e6a42c8b8 +index 000000000000..3587126087e5 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-box.dts -@@ -0,0 +1,628 @@ +@@ -0,0 +1,642 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -920,10 +1208,17 @@ index 000000000000..215e6a42c8b8 + compatible = "rockchip,rk3328-box", "rockchip,rk3328"; + + chosen { -+ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ bootargs = "earlyprintk=uart8250-32bit,0xff130000"; + stdout-path = "serial2:1500000n8"; + }; + ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; ++ }; ++ + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; @@ -938,6 +1233,22 @@ index 000000000000..215e6a42c8b8 + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; @@ -975,15 +1286,6 @@ index 000000000000..215e6a42c8b8 + vin-supply = <&vcc_sys>; + }; + -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ + leds { + compatible = "gpio-leds"; + @@ -1103,7 +1405,7 @@ index 000000000000..215e6a42c8b8 +}; + +&gmac2phy { -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; @@ -1146,7 +1448,7 @@ index 000000000000..215e6a42c8b8 + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; ++ clock-output-names = "rk805-clkout1", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; @@ -1179,7 +1481,7 @@ index 000000000000..215e6a42c8b8 + #address-cells = <1>; + #size-cells = <0>; + -+ vdd_logic: RK805_DCDC1@0 { ++ vdd_logic: RK805_DCDC1 { + regulator-compatible = "RK805_DCDC1"; + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; @@ -1195,7 +1497,7 @@ index 000000000000..215e6a42c8b8 + }; + }; + -+ vdd_arm: RK805_DCDC2@1 { ++ vdd_arm: RK805_DCDC2 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; @@ -1212,7 +1514,7 @@ index 000000000000..215e6a42c8b8 + }; + }; + -+ vcc_ddr: RK805_DCDC3@2 { ++ vcc_ddr: RK805_DCDC3 { + regulator-compatible = "RK805_DCDC3"; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; @@ -1224,7 +1526,7 @@ index 000000000000..215e6a42c8b8 + }; + }; + -+ vcc_io: RK805_DCDC4@3 { ++ vcc_io: RK805_DCDC4 { + regulator-compatible = "RK805_DCDC4"; + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; @@ -1239,7 +1541,7 @@ index 000000000000..215e6a42c8b8 + }; + }; + -+ vcc_18: RK805_LDO1@4 { ++ vcc_18: RK805_LDO1 { + regulator-compatible = "RK805_LDO1"; + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; @@ -1252,7 +1554,7 @@ index 000000000000..215e6a42c8b8 + }; + }; + -+ vcc18_emmc: RK805_LDO2@5 { ++ vcc18_emmc: RK805_LDO2 { + regulator-compatible = "RK805_LDO2"; + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; @@ -1265,16 +1567,16 @@ index 000000000000..215e6a42c8b8 + }; + }; + -+ vdd_11: RK805_LDO3@6 { ++ vdd_10: RK805_LDO3 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_11"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd_10"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1100000>; ++ regulator-suspend-microvolt = <1000000>; + }; + }; + }; @@ -1393,21 +1695,21 @@ index 000000000000..215e6a42c8b8 +}; + +&threshold { -+ temperature = <90000>; /* millicelsius */ ++ temperature = <80000>; /* millicelsius */ +}; + +&target { -+ temperature = <105000>; /* millicelsius */ ++ temperature = <95000>; /* millicelsius */ +}; + +&soc_crit { -+ temperature = <110000>; /* millicelsius */ ++ temperature = <100000>; /* millicelsius */ +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; -+ rockchip,hw-tshut-temp = <120000>; ++ rockchip,hw-tshut-temp = <110000>; + status = "okay"; +}; + @@ -1499,22 +1801,22 @@ index 000000000000..215e6a42c8b8 + status = "okay"; +}; -From 29ab3ef6a26cc6639f3975d9e9987bbb7b0aa242 Mon Sep 17 00:00:00 2001 +From 22fd62816f459b28ee5a5edfa5218f671138f9dc Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-rockbox board --- - arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts | 568 ++++++++++++++++++++++++ - 1 file changed, 568 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts | 582 ++++++++++++++++++++++++ + 1 file changed, 582 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts b/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts new file mode 100644 -index 000000000000..05d496fd2c20 +index 000000000000..75f890e548e5 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts -@@ -0,0 +1,568 @@ +@@ -0,0 +1,582 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -1565,10 +1867,17 @@ index 000000000000..05d496fd2c20 + compatible = "pine64,rockbox", "rockchip,rk3328"; + + chosen { -+ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ bootargs = "earlyprintk=uart8250-32bit,0xff130000"; + stdout-path = "serial2:1500000n8"; + }; + ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; ++ }; ++ + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; @@ -1583,6 +1892,22 @@ index 000000000000..05d496fd2c20 + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; @@ -1603,15 +1928,6 @@ index 000000000000..05d496fd2c20 + vin-supply = <&vcc_sys>; + }; + -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ + leds { + compatible = "gpio-leds"; + @@ -1721,7 +2037,7 @@ index 000000000000..05d496fd2c20 +}; + +&gmac2phy { -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; @@ -1764,7 +2080,7 @@ index 000000000000..05d496fd2c20 + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; ++ clock-output-names = "rk805-clkout1", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; @@ -1797,7 +2113,7 @@ index 000000000000..05d496fd2c20 + #address-cells = <1>; + #size-cells = <0>; + -+ vdd_logic: RK805_DCDC1@0 { ++ vdd_logic: RK805_DCDC1 { + regulator-compatible = "RK805_DCDC1"; + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; @@ -1813,7 +2129,7 @@ index 000000000000..05d496fd2c20 + }; + }; + -+ vdd_arm: RK805_DCDC2@1 { ++ vdd_arm: RK805_DCDC2 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; @@ -1830,7 +2146,7 @@ index 000000000000..05d496fd2c20 + }; + }; + -+ vcc_ddr: RK805_DCDC3@2 { ++ vcc_ddr: RK805_DCDC3 { + regulator-compatible = "RK805_DCDC3"; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; @@ -1842,7 +2158,7 @@ index 000000000000..05d496fd2c20 + }; + }; + -+ vcc_io: RK805_DCDC4@3 { ++ vcc_io: RK805_DCDC4 { + regulator-compatible = "RK805_DCDC4"; + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; @@ -1857,7 +2173,7 @@ index 000000000000..05d496fd2c20 + }; + }; + -+ vcc_18: RK805_LDO1@4 { ++ vcc_18: RK805_LDO1 { + regulator-compatible = "RK805_LDO1"; + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; @@ -1870,7 +2186,7 @@ index 000000000000..05d496fd2c20 + }; + }; + -+ vcc18_emmc: RK805_LDO2@5 { ++ vcc18_emmc: RK805_LDO2 { + regulator-compatible = "RK805_LDO2"; + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; @@ -1883,16 +2199,16 @@ index 000000000000..05d496fd2c20 + }; + }; + -+ vdd_11: RK805_LDO3@6 { ++ vdd_10: RK805_LDO3 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_11"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd_10"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1100000>; ++ regulator-suspend-microvolt = <1000000>; + }; + }; + }; @@ -1984,21 +2300,21 @@ index 000000000000..05d496fd2c20 +}; + +&threshold { -+ temperature = <90000>; /* millicelsius */ ++ temperature = <80000>; /* millicelsius */ +}; + +&target { -+ temperature = <105000>; /* millicelsius */ ++ temperature = <95000>; /* millicelsius */ +}; + +&soc_crit { -+ temperature = <110000>; /* millicelsius */ ++ temperature = <100000>; /* millicelsius */ +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; -+ rockchip,hw-tshut-temp = <120000>; ++ rockchip,hw-tshut-temp = <110000>; + status = "okay"; +}; + @@ -2084,22 +2400,22 @@ index 000000000000..05d496fd2c20 + status = "okay"; +}; -From 72dadc98a19512cb446bd7c8501139433939e680 Mon Sep 17 00:00:00 2001 +From cb2feb6b91c5716b3d0d50f4cb36cc544d8a238c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 17 Jan 2018 22:17:45 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-roc-cc board --- - arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 556 +++++++++++++++++++++++++ - 1 file changed, 556 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 571 +++++++++++++++++++++++++ + 1 file changed, 571 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts new file mode 100644 -index 000000000000..f739f9b28832 +index 000000000000..cd0b377977ab --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -@@ -0,0 +1,556 @@ +@@ -0,0 +1,571 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -2150,10 +2466,17 @@ index 000000000000..f739f9b28832 + compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; + + chosen { -+ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ bootargs = "earlyprintk=uart8250-32bit,0xff130000"; + stdout-path = "serial2:1500000n8"; + }; + ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; ++ }; ++ + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; @@ -2161,6 +2484,22 @@ index 000000000000..f739f9b28832 + #clock-cells = <0>; + }; + ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; @@ -2198,15 +2537,6 @@ index 000000000000..f739f9b28832 + vin-supply = <&vcc_sys>; + }; + -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ + leds { + compatible = "gpio-leds"; + @@ -2224,6 +2554,7 @@ index 000000000000..f739f9b28832 + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ linux,rc-map-name = "rc-roc-cc"; + pinctrl-0 = <&ir_int>; + pinctrl-names = "default"; + status = "okay"; @@ -2307,7 +2638,7 @@ index 000000000000..f739f9b28832 + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; @@ -2353,7 +2684,7 @@ index 000000000000..f739f9b28832 + interrupt-parent = <&gpio1>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; ++ clock-output-names = "rk805-clkout1", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; @@ -2386,7 +2717,7 @@ index 000000000000..f739f9b28832 + #address-cells = <1>; + #size-cells = <0>; + -+ vdd_logic: RK805_DCDC1@0 { ++ vdd_logic: RK805_DCDC1 { + regulator-compatible = "RK805_DCDC1"; + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; @@ -2402,7 +2733,7 @@ index 000000000000..f739f9b28832 + }; + }; + -+ vdd_arm: RK805_DCDC2@1 { ++ vdd_arm: RK805_DCDC2 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; @@ -2419,7 +2750,7 @@ index 000000000000..f739f9b28832 + }; + }; + -+ vcc_ddr: RK805_DCDC3@2 { ++ vcc_ddr: RK805_DCDC3 { + regulator-compatible = "RK805_DCDC3"; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; @@ -2431,7 +2762,7 @@ index 000000000000..f739f9b28832 + }; + }; + -+ vcc_io: RK805_DCDC4@3 { ++ vcc_io: RK805_DCDC4 { + regulator-compatible = "RK805_DCDC4"; + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; @@ -2446,7 +2777,7 @@ index 000000000000..f739f9b28832 + }; + }; + -+ vcc_18: RK805_LDO1@4 { ++ vcc_18: RK805_LDO1 { + regulator-compatible = "RK805_LDO1"; + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; @@ -2459,7 +2790,7 @@ index 000000000000..f739f9b28832 + }; + }; + -+ vcc18_emmc: RK805_LDO2@5 { ++ vcc18_emmc: RK805_LDO2 { + regulator-compatible = "RK805_LDO2"; + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; @@ -2472,16 +2803,16 @@ index 000000000000..f739f9b28832 + }; + }; + -+ vdd_11: RK805_LDO3@6 { ++ vdd_10: RK805_LDO3 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_11"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd_10"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1100000>; ++ regulator-suspend-microvolt = <1000000>; + }; + }; + }; @@ -2557,21 +2888,21 @@ index 000000000000..f739f9b28832 +}; + +&threshold { -+ temperature = <90000>; /* millicelsius */ ++ temperature = <80000>; /* millicelsius */ +}; + +&target { -+ temperature = <105000>; /* millicelsius */ ++ temperature = <95000>; /* millicelsius */ +}; + +&soc_crit { -+ temperature = <110000>; /* millicelsius */ ++ temperature = <100000>; /* millicelsius */ +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; -+ rockchip,hw-tshut-temp = <120000>; ++ rockchip,hw-tshut-temp = <110000>; + status = "okay"; +}; + @@ -2657,7 +2988,7 @@ index 000000000000..f739f9b28832 + status = "okay"; +}; -From 37a995d53a00f87bd07dd59db51905ec70f9456b Mon Sep 17 00:00:00 2001 +From 464ffff441b6bb08cc72885c76de00d0b864341c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 3 Sep 2017 11:19:19 +0200 Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: use two dai-link for i2s @@ -2669,10 +3000,10 @@ Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: use two dai-link for i2s 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index 82f257d39be3..995829a12ad3 100644 +index 68795d255309..ea68f0a892bc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -@@ -114,6 +114,11 @@ +@@ -127,6 +127,11 @@ status = "okay"; }; @@ -2684,7 +3015,7 @@ index 82f257d39be3..995829a12ad3 100644 hdmi-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; -@@ -129,14 +134,25 @@ +@@ -142,14 +147,25 @@ sound { compatible = "simple-audio-card"; @@ -2747,7 +3078,7 @@ index 53dd085d3ee2..bf7ce34084a9 100644 .probe = snd_soc_dummy_probe, .remove = snd_soc_dummy_remove, -From 1f23d678ac0e5f1e65492a3c35653461e3b19633 Mon Sep 17 00:00:00 2001 +From 47f55b038b49b9009832bbac865c8d74f3ff5c50 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 26 Jan 2018 00:03:46 +0100 Subject: [PATCH] arm64: dts: rockchip: rk3328-roc-cc: disable sd-card voltage @@ -2761,10 +3092,10 @@ RK kernel uses GRF_SOC_CON10 bit 1 to mute avcodec. 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -index f739f9b28832..5c79dfd32d87 100644 +index cd0b377977ab..fadb35d978a9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -@@ -75,8 +75,6 @@ +@@ -98,8 +98,6 @@ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; states = <1800000 0x1 3300000 0x0>; @@ -2773,7 +3104,7 @@ index f739f9b28832..5c79dfd32d87 100644 regulator-name = "vccio_sd"; regulator-type = "voltage"; regulator-min-microvolt = <1800000>; -@@ -411,12 +409,6 @@ +@@ -426,12 +424,6 @@ }; }; @@ -2786,7 +3117,7 @@ index f739f9b28832..5c79dfd32d87 100644 pmic { pmic_int_l: pmic-int-l { rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; -@@ -444,13 +436,11 @@ +@@ -459,13 +451,11 @@ cap-mmc-highspeed; cap-sd-highspeed; disable-wp; @@ -2802,22 +3133,22 @@ index f739f9b28832..5c79dfd32d87 100644 }; -From e9dc16e71f4cbdd6069e4fa51ac80dfe124d0e42 Mon Sep 17 00:00:00 2001 +From 5ff8fc9b1cd50bc59f01aad0d0dd161a149d4012 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 Jan 2018 15:17:34 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3399-sapphire board --- - arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts | 142 +++++++++++++++++++++++ - 1 file changed, 142 insertions(+) + arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts | 162 +++++++++++++++++++++++ + 1 file changed, 162 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts new file mode 100644 -index 000000000000..36613de5c68e +index 000000000000..03d009578814 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts -@@ -0,0 +1,142 @@ +@@ -0,0 +1,162 @@ +/* + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd + * @@ -2900,7 +3231,6 @@ index 000000000000..36613de5c68e +}; + +&hdmi_sound { -+ simple-audio-card,mclk-fs = <128>; + simple-audio-card,name = "HDMI"; + status = "okay"; +}; @@ -2917,20 +3247,29 @@ index 000000000000..36613de5c68e + +&vpu { + status = "okay"; -+ /* 0 means ion, 1 means drm */ -+ //allocator = <0>; +}; + +&rkvdec { + status = "okay"; -+ /* 0 means ion, 1 means drm */ -+ //allocator = <0>; +}; + +&display_subsystem { ++ ports = <&vopb_out>; + status = "okay"; +}; + ++&route_hdmi { ++ status = "okay"; ++}; ++ ++&cdn_dp { ++ status = "disabled"; ++}; ++ ++&dp_in_vopb { ++ status = "disabled"; ++}; ++ +&hdmi { + #address-cells = <1>; + #size-cells = <0>; @@ -2938,6 +3277,18 @@ index 000000000000..36613de5c68e + status = "okay"; +}; + ++&pcie_phy { ++ status = "disabled"; ++}; ++ ++&pcie0 { ++ status = "disabled"; ++}; ++ ++&sdio0 { ++ status = "disabled"; ++}; ++ +&vopb { + status = "okay"; +}; @@ -2950,7 +3301,7 @@ index 000000000000..36613de5c68e + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = -+ <0 10 RK_FUNC_GPIO &pcfg_pull_none>; ++ <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + @@ -2961,22 +3312,22 @@ index 000000000000..36613de5c68e + }; +}; -From 7e61af4aa1c7c98c768aea2d7c48dcb4765227d0 Mon Sep 17 00:00:00 2001 +From 7fb5fa6744e8e57dd985479dafffff7a08c57b3d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 Jan 2018 15:17:53 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3399-rock960 board --- - arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 983 ++++++++++++++++++++++++ - 1 file changed, 983 insertions(+) + arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 995 ++++++++++++++++++++++++ + 1 file changed, 995 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts new file mode 100644 -index 000000000000..a5c906dd5961 +index 000000000000..828fff747135 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts -@@ -0,0 +1,983 @@ +@@ -0,0 +1,995 @@ +/* + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd + * @@ -3067,13 +3418,12 @@ index 000000000000..a5c906dd5961 + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio3 11 GPIO_ACTIVE_LOW>; -+ //gpio = <&gpio3 8 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_drv>; + regulator-boot-on; ++ regulator-always-on; + regulator-name = "vcc3v3_pcie"; + vin-supply = <&vcc3v3_sys>; -+ startup-delay-us = <70000>; + }; + + vcc5v0_host: vcc5v0-host-regulator { @@ -3112,7 +3462,7 @@ index 000000000000..a5c906dd5961 + hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "HDMI"; + simple-audio-card,cpu { + sound-dai = <&i2s2>; @@ -3195,14 +3545,17 @@ index 000000000000..a5c906dd5961 + +&sdmmc { + clock-frequency = <100000000>; -+ clock-freq-min-max = <100000 100000000>; ++ max-frequency = <100000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; -+ //sd-uhs-sdr104; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; + vqmmc-supply = <&vcc_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; @@ -3212,7 +3565,7 @@ index 000000000000..a5c906dd5961 + +&sdio0 { + clock-frequency = <100000000>; -+ clock-freq-min-max = <200000 100000000>; ++ max-frequency = <100000000>; + supports-sdio; + bus-width = <4>; + disable-wp; @@ -3416,12 +3769,12 @@ index 000000000000..a5c906dd5961 + vcc_sd: LDO_REG4 { + regulator-name = "vcc_sd"; + regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; ++ regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; ++ regulator-suspend-microvolt = <3000000>; + }; + }; + @@ -3498,7 +3851,7 @@ index 000000000000..a5c906dd5961 + status = "okay"; +}; + -+&i2c7 { ++&i2c6 { + status = "okay"; +}; + @@ -3583,10 +3936,6 @@ index 000000000000..a5c906dd5961 + +}; + -+&i2c7 { -+ status = "okay"; -+}; -+ +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; @@ -3674,6 +4023,8 @@ index 000000000000..a5c906dd5961 +}; + +&uart0 { ++ dmas = <&dmac_peri 0>, <&dmac_peri 1>; ++ dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; @@ -3683,6 +4034,18 @@ index 000000000000..a5c906dd5961 + status = "okay"; +}; + ++&uart3 { ++ dmas = <&dmac_peri 6>, <&dmac_peri 7>; ++ dma-names = "tx", "rx"; ++ status = "okay"; ++}; ++ ++&uart4 { ++ dmas = <&dmac_peri 8>, <&dmac_peri 9>; ++ dma-names = "tx", "rx"; ++ status = "okay"; ++}; ++ +&usb_host0_ehci { + status = "okay"; +}; @@ -3961,7 +4324,7 @@ index 000000000000..a5c906dd5961 + status = "okay"; +}; -From eae2191351dd73db48ff927de52c2e961decfa45 Mon Sep 17 00:00:00 2001 +From 703631a6fd61c6d4cb2b972a71d4b4406bd1925a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 28 Jan 2018 15:38:32 +0100 Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl @@ -3971,10 +4334,10 @@ Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index b37d1954d27c..db142a89bb7b 100644 +index 54b785278956..e3e3a58bb91e 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -947,6 +947,8 @@ +@@ -981,6 +981,8 @@ <&cru PCLK_MIPI_DSI1>, <&cru SCLK_EDP_24M>, <&cru SCLK_EDP>, @@ -3983,7 +4346,7 @@ index b37d1954d27c..db142a89bb7b 100644 <&cru SCLK_ISP_JPE>, <&cru SCLK_ISP>, <&cru SCLK_RGA>; -@@ -1531,10 +1533,10 @@ +@@ -1579,10 +1581,10 @@ reg-io-width = <4>; rockchip,grf = <&grf>; interrupts = ; @@ -3997,7 +4360,7 @@ index b37d1954d27c..db142a89bb7b 100644 pinctrl-1 = <&hdmi_gpio>; power-domains = <&power RK3288_PD_VIO>; status = "disabled"; -@@ -1903,6 +1905,14 @@ +@@ -1966,6 +1968,14 @@ &pcfg_pull_none>; }; @@ -4013,1232 +4376,22 @@ index b37d1954d27c..db142a89bb7b 100644 rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>, <7 20 RK_FUNC_2 &pcfg_pull_none>; -From d3f46f176f6ea3d7f1f201875279dbf7bbcdb37c Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 14 Feb 2018 08:03:12 +0100 -Subject: [PATCH] arm64: dts: rockchip: add rk3399-odroidn1 board - ---- - arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts | 1005 ++++++++++++++++++++++ - 1 file changed, 1005 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts b/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts -new file mode 100644 -index 000000000000..1bff86c2bf03 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts -@@ -0,0 +1,1005 @@ -+/* -+ * Copyright (c) 2017 Hardkernel Co., Ltd -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "dt-bindings/pwm/pwm.h" -+#include "rk3399.dtsi" -+#include "rk3399-opp.dtsi" -+#include "rk3399-linux.dtsi" -+#include -+ -+/ { -+ model = "Hardkernel ODROID-N1"; -+ compatible = "hardkernel,odroidn1", "rockchip,rk3399"; -+ -+ cpuinfo { -+ compatible = "rockchip,cpuinfo"; -+ nvmem-cells = <&efuse_id>; -+ nvmem-cell-names = "id"; -+ }; -+ -+ clkin_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "clkin_gmac"; -+ #clock-cells = <0>; -+ }; -+ -+ leds: gpio_leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "led_pins"; -+ pinctrl-0 = <&led_pins>; -+ -+ heartbeat { -+ label = "blue:heartbeat"; -+ gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ autorepeat; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn>; -+ -+ button@0 { -+ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ label = "GPIO Key Power"; -+ linux,input-type = <1>; -+ gpio-key,wakeup = <1>; -+ debounce-interval = <100>; -+ }; -+ }; -+ -+ gpio-restart { -+ compatible = "gpio-restart"; -+ gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; -+ open-source; -+ priority = <255>; /* Highest priority */ -+ }; -+ -+ gpiomem { -+ compatible = "rockchip,rock-gpiomem"; -+ -+ /* gpio mmap area define */ -+ /* GPIO0 64K : 0xff720000 - 0xff72ffff */ -+ /* GPIO1 64K : 0xff730000 - 0xff73ffff */ -+ /* Reserved 64K : 0xff740000 - 0xff74ffff */ -+ /* PMUCRU 64K : 0xff750000 - 0xff75ffff */ -+ /* CRU 64K : 0xff760000 - 0xff76ffff */ -+ /* GRF 64K : 0xff770000 - 0xff77ffff */ -+ /* GPIO2 32K : 0xff780000 - 0xff777fff */ -+ /* GPIO3 32K : 0xff788000 - 0xff78ffff */ -+ /* GPIO4 32K : 0xff790000 - 0xff797fff */ -+ reg = <0 0xff720000 0 0x78000>, -+ -+ /* PMUGRF 64K : 0xff320000 - 0xff32ffff */ -+ <0 0xff320000 0 0x10000>; -+ status = "okay"; -+ }; -+ -+ fan0: pwm-fan { -+ compatible = "pwm-fan"; -+ status = "okay"; -+ pwms = <&pwm0 0 40000 PWM_POLARITY_INVERTED>; /* 25 kHz */ -+ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <255 125 102 51>; /* PWM duty cycle */ -+ }; -+ -+ hdmi-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <128>; -+ simple-audio-card,name = "HDMI"; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s2>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ }; -+ -+ vccadc_ref: vccadc-ref { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc1v8_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ vcc3v3_sys: vcc3v3-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ vcc5v0_host: vcc5v0-host-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host_vbus_drv>; -+ regulator-name = "vcc5v0_host"; -+ regulator-always-on; -+ }; -+ -+ vcc5v0_host31: vcc5v0-host31-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host31_vbus_drv>; -+ regulator-name = "vcc5v0_host31"; -+ }; -+ -+ vcc5v0_host32: vcc5v0-host32-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host32_vbus_drv>; -+ regulator-name = "vcc5v0_host32"; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ vcc_phy: vcc-phy-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_phy"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vdd_log: vdd-log { -+ compatible = "pwm-regulator"; -+ pwms = <&pwm2 0 25000 1>; -+ regulator-name = "vdd_log"; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ /* for rockchip boot on */ -+ rockchip,pwm_id= <2>; -+ rockchip,pwm_voltage = <1000000>; -+ }; -+ -+ odroid_sysfs: odroid-sysfs { -+ status = "okay"; -+ compatible = "odroid-sysfs"; -+ }; -+}; -+ -+&cluster0_opp { -+ opp-408000000 { -+ opp-microvolt = <800000>; -+ }; -+ opp-600000000 { -+ opp-microvolt = <800000>; -+ }; -+ opp-816000000 { -+ opp-microvolt = <850000>; -+ }; -+ opp-1008000000 { -+ opp-microvolt = <925000>; -+ }; -+ opp-1200000000 { -+ opp-microvolt = <1000000>; -+ }; -+ opp-1416000000 { -+ opp-microvolt = <1125000>; -+ }; -+ opp-1512000000 { -+ opp-hz = /bits/ 64 <1512000000>; -+ opp-microvolt = <1200000>; -+ opp-microvolt-L0 = <1200000>; -+ opp-microvolt-L1 = <1175000>; -+ opp-microvolt-L2 = <1150000>; -+ opp-microvolt-L3 = <1125000>; -+ clock-latency-ns = <40000>; -+ }; -+}; -+ -+&cluster1_opp { -+ opp-408000000 { -+ opp-microvolt = <800000>; -+ }; -+ opp-600000000 { -+ opp-microvolt = <800000>; -+ }; -+ opp-816000000 { -+ opp-microvolt = <825000>; -+ }; -+ opp-1008000000 { -+ opp-microvolt = <875000>; -+ }; -+ opp-1200000000 { -+ opp-microvolt = <950000>; -+ }; -+ opp-1416000000 { -+ opp-microvolt = <1025000>; -+ }; -+ opp-1608000000 { -+ opp-microvolt = <1100000>; -+ }; -+ opp-1800000000 { -+ opp-microvolt = <1200000>; -+ }; -+ opp-1992000000 { -+ opp-hz = /bits/ 64 <1992000000>; -+ opp-microvolt = <1300000>; -+ opp-microvolt-L0 = <1300000>; -+ opp-microvolt-L1 = <1275000>; -+ opp-microvolt-L2 = <1250000>; -+ opp-microvolt-L3 = <1225000>; -+ clock-latency-ns = <40000>; -+ }; -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&display_subsystem { -+ status = "okay"; -+}; -+ -+&emmc_phy { -+ status = "okay"; -+}; -+ -+&gmac { -+ phy-supply = <&vcc_phy>; -+ phy-mode = "rgmii"; -+ clock_in_out = "input"; -+ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 50000>; -+ assigned-clocks = <&cru SCLK_RMII_SRC>; -+ assigned-clock-parents = <&clkin_gmac>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ tx_delay = <0x100>; -+ rx_delay = <0x11>; -+ status = "okay"; -+}; -+ -+&gpu { -+ status = "okay"; -+ mali-supply = <&vdd_gpu>; -+}; -+ -+&hdmi { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&hdmi_in_vopl { -+ status = "disabled"; -+}; -+ -+&dp_in_vopl { -+ status = "disabled"; -+}; -+ -+&i2c0 { -+ status = "okay"; -+ i2c-scl-rising-time-ns = <168>; -+ i2c-scl-falling-time-ns = <4>; -+ clock-frequency = <400000>; -+ -+ vdd_cpu_b: syr827@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ vin-supply = <&vcc3v3_sys>; -+ regulator-compatible = "fan53555-reg"; -+ regulator-name = "vdd_cpu_b"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-initial-state = <3>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: syr828@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ vin-supply = <&vcc3v3_sys>; -+ regulator-compatible = "fan53555-reg"; -+ regulator-name = "vdd_gpu"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-initial-state = <3>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <23 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l &pmic_dvs2>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ -+ vcc1-supply = <&vcc3v3_sys>; -+ vcc2-supply = <&vcc3v3_sys>; -+ vcc3-supply = <&vcc3v3_sys>; -+ vcc4-supply = <&vcc3v3_sys>; -+ vcc6-supply = <&vcc3v3_sys>; -+ vcc7-supply = <&vcc3v3_sys>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc3v3_sys>; -+ vcc10-supply = <&vcc3v3_sys>; -+ vcc11-supply = <&vcc3v3_sys>; -+ vcc12-supply = <&vcc3v3_sys>; -+ vddio-supply = <&vcc1v8_pmu>; -+ -+ regulators { -+ vdd_center: DCDC_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-name = "vdd_center"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_l: DCDC_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-name = "vdd_cpu_l"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc_ddr"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: DCDC_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc_1v8"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc1v8_dvp: LDO_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc1v8_dvp"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v0_tp: LDO_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-name = "vcc3v0_tp"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc1v8_pmu: LDO_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc1v8_pmu"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc_sd: LDO_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcca3v0_codec: LDO_REG5 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-name = "vcca3v0_codec"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-name = "vcc_1v5"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; -+ }; -+ }; -+ -+ vcca1v8_codec: LDO_REG7 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcca1v8_codec"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG8 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-name = "vcc_3v0"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc3v3_s3: SWITCH_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc3v3_s3"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc3v3_s0"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ i2c-scl-rising-time-ns = <300>; -+ i2c-scl-falling-time-ns = <15>; -+}; -+ -+&i2c4 { -+ status = "okay"; -+ i2c-scl-rising-time-ns = <600>; -+ i2c-scl-falling-time-ns = <20>; -+}; -+ -+&i2s0 { -+ status = "okay"; -+ rockchip,i2s-broken-burst-len; -+ rockchip,playback-channels = <8>; -+ rockchip,capture-channels = <8>; -+ #sound-dai-cells = <0>; -+}; -+ -+&i2s1 { -+ status = "okay"; -+ rockchip,i2s-broken-burst-len; -+ rockchip,playback-channels = <2>; -+ rockchip,capture-channels = <2>; -+ #sound-dai-cells = <0>; -+}; -+ -+&i2s2 { -+ #sound-dai-cells = <0>; -+ rockchip,bclk-fs = <128>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */ -+ audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */ -+ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ -+ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ -+}; -+ -+&pcie_phy { -+ status = "okay"; -+}; -+ -+&pcie0 { -+ assigned-clocks = <&cru SCLK_PCIEPHY_REF>; -+ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; -+ assigned-clock-rates = <100000000>; -+ ep-gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; -+ num-lanes = <1>; -+ max-link-speed = <2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_clkreqn>; -+ status = "okay"; -+}; -+ -+&pmu_io_domains { -+ status = "okay"; -+ pmu1830-supply = <&vcc_3v0>; -+}; -+ -+&pinctrl { -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ pmic { -+ vsel1_gpio: vsel1-gpio { -+ rockchip,pins = -+ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ vsel2_gpio: vsel2-gpio { -+ rockchip,pins = -+ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = -+ <1 23 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ pmic_dvs2: pmic-dvs2 { -+ rockchip,pins = -+ <1 18 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ usb2 { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = -+ <4 25 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ host31_vbus_drv: host31-vbus-drv { -+ rockchip,pins = -+ <0 12 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ host32_vbus_drv: host32-vbus-drv { -+ rockchip,pins = -+ <0 13 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ leds { -+ led_pins: led-pins { -+ rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&rkvdec { -+ status = "okay"; -+}; -+ -+&rockchip_suspend { -+ rockchip,power-ctrl = -+ <&gpio1 18 GPIO_ACTIVE_LOW>, -+ <&gpio1 14 GPIO_ACTIVE_HIGH>; -+}; -+ -+&route_edp { -+ status = "disabled"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vccadc_ref>; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ keep-power-in-suspend; -+ mmc-hs400-1_8v; -+ mmc-hs400-enhanced-strobe; -+ non-removable; -+ status = "okay"; -+ supports-emmc; -+}; -+ -+&sdmmc { -+ max-frequency = <150000000>; -+ supports-sd; -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ disable-wp; -+ num-slots = <1>; -+ vqmmc-supply = <&vcc_sd>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ status = "okay"; -+}; -+ -+&tcphy0 { -+ status = "okay"; -+}; -+ -+&tcphy1 { -+ status = "okay"; -+}; -+ -+&soc_thermal { -+ polling-delay-passive = <20>; /* milliseconds */ -+ polling-delay = <1000>; /* milliseconds */ -+ sustainable-power = <1000>; /* milliwatts */ -+ -+ thermal-sensors = <&tsadc 0>; -+ -+ trips { -+ /* fan active thermal point */ -+ cpu_alert0: trip-point@0 { -+ temperature = <50000>; /* millicelsius */ -+ hysteresis = <10000>; /* millicelsius */ -+ type = "active"; -+ }; -+ cpu_alert1: trip-point@1 { -+ temperature = <55000>; /* millicelsius */ -+ hysteresis = <10000>; /* millicelsius */ -+ type = "active"; -+ }; -+ cpu_alert2: trip-point@2 { -+ temperature = <60000>; /* millicelsius */ -+ hysteresis = <10000>; /* millicelsius */ -+ type = "active"; -+ }; -+ -+ /* big cluster thermal point */ -+ cpu_alert3: trip-point@3 { -+ temperature = <80000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ cpu_alert4: trip-point@4 { -+ temperature = <82000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ cpu_alert5: trip-point@5 { -+ temperature = <85000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ cpu_alert6: trip-point@6 { -+ temperature = <88000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ -+ /* little cluster thermal point */ -+ cpu_alert7: trip-point@7 { -+ temperature = <90000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ cpu_alert8: trip-point@8 { -+ temperature = <92000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ cpu_alert9: trip-point@9 { -+ temperature = <95000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "passive"; -+ }; -+ soc_crit: soc-crit { -+ temperature = <120000>; /* millicelsius */ -+ hysteresis = <2000>; /* millicelsius */ -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ /* fan cooling map */ -+ map0 { -+ trip = <&cpu_alert0>; -+ cooling-device = -+ <&fan0 0 1>; -+ }; -+ map1 { -+ trip = <&cpu_alert1>; -+ cooling-device = -+ <&fan0 1 2>; -+ }; -+ map2 { -+ trip = <&cpu_alert2>; -+ cooling-device = -+ <&fan0 2 3>; -+ }; -+ -+ /* cpu cooling map */ -+ /* big cluster */ -+ map3 { -+ trip = <&cpu_alert3>; -+ cooling-device = -+ <&cpu_b0 0 2>; -+ contribution = <4096>; -+ }; -+ map4 { -+ trip = <&cpu_alert4>; -+ cooling-device = -+ <&cpu_b0 2 4>; -+ contribution = <4096>; -+ }; -+ map5 { -+ trip = <&cpu_alert5>; -+ cooling-device = -+ <&cpu_b0 4 7>; -+ contribution = <4096>; -+ }; -+ map6 { -+ trip = <&cpu_alert6>; -+ cooling-device = -+ <&cpu_b0 4 7>; -+ contribution = <4096>; -+ }; -+ -+ /* little cluster */ -+ map7 { -+ trip = <&cpu_alert7>; -+ cooling-device = -+ <&cpu_l0 0 2>; -+ contribution = <1024>; -+ }; -+ map8 { -+ trip = <&cpu_alert8>; -+ cooling-device = -+ <&cpu_l0 2 5>; -+ contribution = <1024>; -+ }; -+ -+ map9 { -+ trip = <&cpu_alert9>; -+ cooling-device = -+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ contribution = <1024>; -+ }; -+ }; -+}; -+ -+&tsadc { -+ /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-mode = <1>; -+ /* tshut polarity 0:LOW 1:HIGH */ -+ rockchip,hw-tshut-polarity = <1>; -+ status = "okay"; -+}; -+ -+&u2phy0 { -+ status = "okay"; -+ -+ u2phy0_otg: otg-port { -+ phy-supply = <&vcc5v0_host31>; -+ status = "okay"; -+ }; -+ -+ u2phy0_host: host-port { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+ }; -+}; -+ -+&u2phy1 { -+ status = "okay"; -+ -+ u2phy1_otg: otg-port { -+ phy-supply = <&vcc5v0_host32>; -+ status = "okay"; -+ }; -+ -+ u2phy1_host: host-port { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+ }; -+}; -+ -+&sdio0 { -+ status = "disabled"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usbdrd3_0 { -+ status = "okay"; -+}; -+ -+&usbdrd3_1 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_0 { -+ status = "okay"; -+ dr_mode = "host"; -+}; -+ -+&usbdrd_dwc3_1 { -+ status = "okay"; -+ dr_mode = "host"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; -+ -+&vpu { -+ status = "okay"; -+}; - -From 7675bf39195d3c70ef6a0b6a123f5ce112012563 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 26 Feb 2018 23:39:15 +0100 -Subject: [PATCH] arm64: dts: rockchip: add rk3399-rockpro64 board - ---- - arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 171 ++++++++++++++++++++++ - 1 file changed, 171 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts -new file mode 100644 -index 000000000000..0606771dbf5c ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts -@@ -0,0 +1,171 @@ -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+#include "rk3399-box.dtsi" -+ -+/ { -+ model = "Pine64 RockPro64"; -+ compatible = "pine64,rockpro64", "rockchip,rk3399"; -+}; -+ -+&pinctrl { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&cpt_gpio>; -+ -+ sdio0 { -+ sdio0_bus1: sdio0-bus1 { -+ rockchip,pins = -+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>; -+ }; -+ -+ sdio0_bus4: sdio0-bus4 { -+ rockchip,pins = -+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>, -+ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>, -+ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>, -+ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>; -+ }; -+ -+ sdio0_cmd: sdio0-cmd { -+ rockchip,pins = -+ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>; -+ }; -+ -+ sdio0_clk: sdio0-clk { -+ rockchip,pins = -+ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>; -+ }; -+ }; -+ -+ sdmmc { -+ sdmmc_bus1: sdmmc-bus1 { -+ rockchip,pins = -+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ }; -+ -+ sdmmc_bus4: sdmmc-bus4 { -+ rockchip,pins = -+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, -+ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, -+ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, -+ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ }; -+ -+ sdmmc_clk: sdmmc-clk { -+ rockchip,pins = -+ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; -+ }; -+ -+ sdmmc_cmd: sdmmc-cmd { -+ rockchip,pins = -+ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; -+ }; -+ }; -+ -+ fusb30x { -+ fusb0_int: fusb0-int { -+ rockchip,pins = -+ <1 2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ compat { -+ cpt_gpio: cpt-gpio { -+ rockchip,pins = -+ <1 18 RK_FUNC_GPIO &pcfg_output_low>; -+ }; -+ }; -+}; -+ -+&i2c4 { -+ status = "okay"; -+ fusb0: fusb30x@22 { -+ compatible = "fairchild,fusb302"; -+ reg = <0x22>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fusb0_int>; -+ vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; -+ int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+}; -+ -+&cdn_dp { -+ status = "okay"; -+ extcon = <&fusb0>; -+}; -+ -+&hdmi_in_vopl { -+ status = "disabled"; -+}; -+ -+&dp_in_vopb { -+ status = "disabled"; -+}; -+ -+&route_hdmi { -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+ rockchip,phy-table = -+ <74250000 0x8009 0x0004 0x0272>, -+ <165000000 0x802b 0x0004 0x0209>, -+ <297000000 0x8039 0x0005 0x028d>, -+ <594000000 0x8039 0x0000 0x019d>, -+ <000000000 0x0000 0x0000 0x0000>; -+}; -+ -+&pcie_phy { -+ status = "okay"; -+}; -+ -+&pcie0 { -+ ep-gpios = <&gpio1 0x18 0x0>; -+ num-lanes = <4>; -+ max-link-speed = <2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_clkreqn_cpm>; -+ status = "okay"; -+}; - -From 7a0c34397e79227e3ff85e566e0b121e09b29786 Mon Sep 17 00:00:00 2001 +From 6d9ee1951a667f61e29262045f287d9c2cbe78a7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Mar 2018 09:08:35 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-trn9 board --- - arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts | 652 +++++++++++++++++++++++ - 1 file changed, 652 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts | 667 +++++++++++++++++++++++ + 1 file changed, 667 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts new file mode 100644 -index 000000000000..a736d00d838a +index 000000000000..55c4cbf6baff --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts -@@ -0,0 +1,652 @@ +@@ -0,0 +1,667 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -5289,7 +4442,14 @@ index 000000000000..a736d00d838a + compatible = "rockchip,rk3328-box-trn9", "rockchip,rk3328"; + + chosen { -+ bootargs = "rockchip_jtag"; ++ bootargs = ""; ++ }; ++ ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; + }; + + gmac_clkin: external-gmac-clock { @@ -5313,6 +4473,22 @@ index 000000000000..a736d00d838a + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + }; + ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; @@ -5350,15 +4526,6 @@ index 000000000000..a736d00d838a + vin-supply = <&vcc_sys>; + }; + -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ + leds { + compatible = "gpio-leds"; + @@ -5376,6 +4543,7 @@ index 000000000000..a736d00d838a + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ linux,rc-map-name = "rc-trn9"; + pinctrl-0 = <&ir_int>; + pinctrl-names = "default"; + status = "okay"; @@ -5490,7 +4658,7 @@ index 000000000000..a736d00d838a + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; @@ -5503,7 +4671,7 @@ index 000000000000..a736d00d838a +}; + +&gmac2phy { -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; @@ -5546,7 +4714,7 @@ index 000000000000..a736d00d838a + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; ++ clock-output-names = "rk805-clkout1", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; @@ -5579,7 +4747,7 @@ index 000000000000..a736d00d838a + #address-cells = <1>; + #size-cells = <0>; + -+ vdd_logic: RK805_DCDC1@0 { ++ vdd_logic: RK805_DCDC1 { + regulator-compatible = "RK805_DCDC1"; + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; @@ -5595,7 +4763,7 @@ index 000000000000..a736d00d838a + }; + }; + -+ vdd_arm: RK805_DCDC2@1 { ++ vdd_arm: RK805_DCDC2 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; @@ -5612,7 +4780,7 @@ index 000000000000..a736d00d838a + }; + }; + -+ vcc_ddr: RK805_DCDC3@2 { ++ vcc_ddr: RK805_DCDC3 { + regulator-compatible = "RK805_DCDC3"; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; @@ -5624,7 +4792,7 @@ index 000000000000..a736d00d838a + }; + }; + -+ vcc_io: RK805_DCDC4@3 { ++ vcc_io: RK805_DCDC4 { + regulator-compatible = "RK805_DCDC4"; + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; @@ -5639,7 +4807,7 @@ index 000000000000..a736d00d838a + }; + }; + -+ vcc_18: RK805_LDO1@4 { ++ vcc_18: RK805_LDO1 { + regulator-compatible = "RK805_LDO1"; + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; @@ -5652,7 +4820,7 @@ index 000000000000..a736d00d838a + }; + }; + -+ vcc18_emmc: RK805_LDO2@5 { ++ vcc18_emmc: RK805_LDO2 { + regulator-compatible = "RK805_LDO2"; + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; @@ -5665,16 +4833,16 @@ index 000000000000..a736d00d838a + }; + }; + -+ vdd_11: RK805_LDO3@6 { ++ vdd_10: RK805_LDO3 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_11"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd_10"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1100000>; ++ regulator-suspend-microvolt = <1000000>; + }; + }; + }; @@ -5792,21 +4960,21 @@ index 000000000000..a736d00d838a +}; + +&threshold { -+ temperature = <90000>; /* millicelsius */ ++ temperature = <80000>; /* millicelsius */ +}; + +&target { -+ temperature = <105000>; /* millicelsius */ ++ temperature = <95000>; /* millicelsius */ +}; + +&soc_crit { -+ temperature = <110000>; /* millicelsius */ ++ temperature = <100000>; /* millicelsius */ +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; -+ rockchip,hw-tshut-temp = <120000>; ++ rockchip,hw-tshut-temp = <110000>; + status = "okay"; +}; + @@ -5892,22 +5060,22 @@ index 000000000000..a736d00d838a + status = "okay"; +}; -From 429966f1cf706834d8e35e4a8ac7230067796734 Mon Sep 17 00:00:00 2001 +From 141b61c301ed86e187a746ccd378213aca8c3372 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Mar 2018 09:08:35 +0100 Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-z28 board --- - arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts | 583 ++++++++++++++++++++++++ - 1 file changed, 583 insertions(+) + arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts | 597 ++++++++++++++++++++++++ + 1 file changed, 597 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts new file mode 100644 -index 000000000000..d124195d6798 +index 000000000000..f94526f6f190 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts -@@ -0,0 +1,583 @@ +@@ -0,0 +1,597 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd + * @@ -5958,10 +5126,33 @@ index 000000000000..d124195d6798 + compatible = "rockchip,rk3328-box-z28", "rockchip,rk3328"; + + chosen { -+ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ bootargs = "earlyprintk=uart8250-32bit,0xff130000"; + stdout-path = "serial2:1500000n8"; + }; + ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; @@ -5999,15 +5190,6 @@ index 000000000000..d124195d6798 + vin-supply = <&vcc_sys>; + }; + -+ vcc_sys: vcc-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ + leds { + compatible = "gpio-leds"; + @@ -6125,7 +5307,7 @@ index 000000000000..d124195d6798 +}; + +&gmac2phy { -+ phy-supply = <&vcc_io>; ++ phy-supply = <&vcc_phy>; + assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; @@ -6168,7 +5350,7 @@ index 000000000000..d124195d6798 + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; ++ clock-output-names = "rk805-clkout1", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; @@ -6201,7 +5383,7 @@ index 000000000000..d124195d6798 + #address-cells = <1>; + #size-cells = <0>; + -+ vdd_logic: RK805_DCDC1@0 { ++ vdd_logic: RK805_DCDC1 { + regulator-compatible = "RK805_DCDC1"; + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; @@ -6217,7 +5399,7 @@ index 000000000000..d124195d6798 + }; + }; + -+ vdd_arm: RK805_DCDC2@1 { ++ vdd_arm: RK805_DCDC2 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; @@ -6234,7 +5416,7 @@ index 000000000000..d124195d6798 + }; + }; + -+ vcc_ddr: RK805_DCDC3@2 { ++ vcc_ddr: RK805_DCDC3 { + regulator-compatible = "RK805_DCDC3"; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; @@ -6246,7 +5428,7 @@ index 000000000000..d124195d6798 + }; + }; + -+ vcc_io: RK805_DCDC4@3 { ++ vcc_io: RK805_DCDC4 { + regulator-compatible = "RK805_DCDC4"; + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; @@ -6261,7 +5443,7 @@ index 000000000000..d124195d6798 + }; + }; + -+ vcc_18: RK805_LDO1@4 { ++ vcc_18: RK805_LDO1 { + regulator-compatible = "RK805_LDO1"; + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; @@ -6274,7 +5456,7 @@ index 000000000000..d124195d6798 + }; + }; + -+ vcc18_emmc: RK805_LDO2@5 { ++ vcc18_emmc: RK805_LDO2 { + regulator-compatible = "RK805_LDO2"; + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; @@ -6287,16 +5469,16 @@ index 000000000000..d124195d6798 + }; + }; + -+ vdd_11: RK805_LDO3@6 { ++ vdd_10: RK805_LDO3 { + regulator-compatible = "RK805_LDO3"; -+ regulator-name = "vdd_11"; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd_10"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1100000>; ++ regulator-suspend-microvolt = <1000000>; + }; + }; + }; @@ -6386,21 +5568,21 @@ index 000000000000..d124195d6798 +}; + +&threshold { -+ temperature = <90000>; /* millicelsius */ ++ temperature = <80000>; /* millicelsius */ +}; + +&target { -+ temperature = <105000>; /* millicelsius */ ++ temperature = <95000>; /* millicelsius */ +}; + +&soc_crit { -+ temperature = <110000>; /* millicelsius */ ++ temperature = <100000>; /* millicelsius */ +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; -+ rockchip,hw-tshut-temp = <120000>; ++ rockchip,hw-tshut-temp = <110000>; + status = "okay"; +}; + @@ -6491,3 +5673,1064 @@ index 000000000000..d124195d6798 +&venc_srv { + status = "okay"; +}; + +From b71af0f2ea1244e216b400a3a806472fc83e8bd2 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 10 Apr 2018 22:07:37 +0200 +Subject: [PATCH] arm64: dts: rockchip: rk3328-roc-cc: use 1066MHz ddr + frequency + +--- + .../dts/rockchip/rk3328-dram-box-plus-timing.dtsi | 263 +++++++++++++++++++++ + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 33 ++- + 2 files changed, 295 insertions(+), 1 deletion(-) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-box-plus-timing.dtsi + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-dram-box-plus-timing.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-dram-box-plus-timing.dtsi +new file mode 100644 +index 000000000000..ac34cc7ab1ce +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-dram-box-plus-timing.dtsi +@@ -0,0 +1,263 @@ ++/* ++ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#include ++#include ++ ++&ddr_timing { ++ ddr4_odt = ; ++ phy_ddr4_ca_drv = ; ++ phy_ddr4_ck_drv = ; ++ phy_ddr4_dq_drv = ; ++ phy_ddr4_odt = ; ++ ++ /* CA de-skew, one step is 47.8ps, range 0-15 */ ++ ddr3a1_ddr4a9_de-skew = <1>; ++ ddr3a0_ddr4a10_de-skew = <1>; ++ ddr3a3_ddr4a6_de-skew = <0>; ++ ddr3a2_ddr4a4_de-skew = <1>; ++ ddr3a5_ddr4a8_de-skew = <0>; ++ ddr3a4_ddr4a5_de-skew = <1>; ++ ddr3a7_ddr4a11_de-skew = <1>; ++ ddr3a6_ddr4a7_de-skew = <0>; ++ ddr3a9_ddr4a0_de-skew = <1>; ++ ddr3a8_ddr4a13_de-skew = <0>; ++ ddr3a11_ddr4a3_de-skew = <2>; ++ ddr3a10_ddr4cs0_de-skew = <3>; ++ ddr3a13_ddr4a2_de-skew = <1>; ++ ddr3a12_ddr4ba1_de-skew = <0>; ++ ddr3a15_ddr4odt0_de-skew = <3>; ++ ddr3a14_ddr4a1_de-skew = <2>; ++ ddr3ba1_ddr4a15_de-skew = <1>; ++ ddr3ba0_ddr4bg0_de-skew = <1>; ++ ddr3ras_ddr4cke_de-skew = <3>; ++ ddr3ba2_ddr4ba0_de-skew = <1>; ++ ddr3we_ddr4bg1_de-skew = <3>; ++ ddr3cas_ddr4a12_de-skew = <1>; ++ ddr3ckn_ddr4ckn_de-skew = <4>; ++ ddr3ckp_ddr4ckp_de-skew = <4>; ++ ddr3cke_ddr4a16_de-skew = <1>; ++ ddr3odt0_ddr4a14_de-skew = <1>; ++ ddr3cs0_ddr4act_de-skew = <2>; ++ ddr3reset_ddr4reset_de-skew = <3>; ++ ddr3cs1_ddr4cs1_de-skew = <2>; ++ ddr3odt1_ddr4odt1_de-skew = <2>; ++ ++ /* DATA de-skew ++ * RX one step is 25.1ps, range 0-15 ++ * TX one step is 47.8ps, range 0-15 ++ */ ++ cs0_dm0_rx_de-skew = <8>; ++ cs0_dm0_tx_de-skew = <9>; ++ cs0_dq0_rx_de-skew = <8>; ++ cs0_dq0_tx_de-skew = <9>; ++ cs0_dq1_rx_de-skew = <8>; ++ cs0_dq1_tx_de-skew = <9>; ++ cs0_dq2_rx_de-skew = <8>; ++ cs0_dq2_tx_de-skew = <9>; ++ cs0_dq3_rx_de-skew = <8>; ++ cs0_dq3_tx_de-skew = <9>; ++ cs0_dq4_rx_de-skew = <8>; ++ cs0_dq4_tx_de-skew = <9>; ++ cs0_dq5_rx_de-skew = <8>; ++ cs0_dq5_tx_de-skew = <9>; ++ cs0_dq6_rx_de-skew = <8>; ++ cs0_dq6_tx_de-skew = <9>; ++ cs0_dq7_rx_de-skew = <8>; ++ cs0_dq7_tx_de-skew = <9>; ++ cs0_dqs0_rx_de-skew = <7>; ++ cs0_dqs0p_tx_de-skew = <10>; ++ cs0_dqs0n_tx_de-skew = <10>; ++ ++ cs0_dm1_rx_de-skew = <8>; ++ cs0_dm1_tx_de-skew = <8>; ++ cs0_dq8_rx_de-skew = <8>; ++ cs0_dq8_tx_de-skew = <9>; ++ cs0_dq9_rx_de-skew = <8>; ++ cs0_dq9_tx_de-skew = <8>; ++ cs0_dq10_rx_de-skew = <8>; ++ cs0_dq10_tx_de-skew = <9>; ++ cs0_dq11_rx_de-skew = <8>; ++ cs0_dq11_tx_de-skew = <8>; ++ cs0_dq12_rx_de-skew = <8>; ++ cs0_dq12_tx_de-skew = <9>; ++ cs0_dq13_rx_de-skew = <8>; ++ cs0_dq13_tx_de-skew = <8>; ++ cs0_dq14_rx_de-skew = <8>; ++ cs0_dq14_tx_de-skew = <9>; ++ cs0_dq15_rx_de-skew = <8>; ++ cs0_dq15_tx_de-skew = <8>; ++ cs0_dqs1_rx_de-skew = <8>; ++ cs0_dqs1p_tx_de-skew = <10>; ++ cs0_dqs1n_tx_de-skew = <10>; ++ ++ cs0_dm2_rx_de-skew = <8>; ++ cs0_dm2_tx_de-skew = <9>; ++ cs0_dq16_rx_de-skew = <8>; ++ cs0_dq16_tx_de-skew = <9>; ++ cs0_dq17_rx_de-skew = <8>; ++ cs0_dq17_tx_de-skew = <9>; ++ cs0_dq18_rx_de-skew = <8>; ++ cs0_dq18_tx_de-skew = <9>; ++ cs0_dq19_rx_de-skew = <8>; ++ cs0_dq19_tx_de-skew = <9>; ++ cs0_dq20_rx_de-skew = <8>; ++ cs0_dq20_tx_de-skew = <9>; ++ cs0_dq21_rx_de-skew = <8>; ++ cs0_dq21_tx_de-skew = <9>; ++ cs0_dq22_rx_de-skew = <8>; ++ cs0_dq22_tx_de-skew = <9>; ++ cs0_dq23_rx_de-skew = <8>; ++ cs0_dq23_tx_de-skew = <9>; ++ cs0_dqs2_rx_de-skew = <7>; ++ cs0_dqs2p_tx_de-skew = <10>; ++ cs0_dqs2n_tx_de-skew = <10>; ++ ++ cs0_dm3_rx_de-skew = <8>; ++ cs0_dm3_tx_de-skew = <8>; ++ cs0_dq24_rx_de-skew = <8>; ++ cs0_dq24_tx_de-skew = <9>; ++ cs0_dq25_rx_de-skew = <8>; ++ cs0_dq25_tx_de-skew = <8>; ++ cs0_dq26_rx_de-skew = <8>; ++ cs0_dq26_tx_de-skew = <8>; ++ cs0_dq27_rx_de-skew = <8>; ++ cs0_dq27_tx_de-skew = <8>; ++ cs0_dq28_rx_de-skew = <8>; ++ cs0_dq28_tx_de-skew = <8>; ++ cs0_dq29_rx_de-skew = <8>; ++ cs0_dq29_tx_de-skew = <8>; ++ cs0_dq30_rx_de-skew = <8>; ++ cs0_dq30_tx_de-skew = <8>; ++ cs0_dq31_rx_de-skew = <8>; ++ cs0_dq31_tx_de-skew = <8>; ++ cs0_dqs3_rx_de-skew = <8>; ++ cs0_dqs3p_tx_de-skew = <10>; ++ cs0_dqs3n_tx_de-skew = <10>; ++ ++ cs1_dm0_rx_de-skew = <8>; ++ cs1_dm0_tx_de-skew = <9>; ++ cs1_dq0_rx_de-skew = <8>; ++ cs1_dq0_tx_de-skew = <9>; ++ cs1_dq1_rx_de-skew = <8>; ++ cs1_dq1_tx_de-skew = <9>; ++ cs1_dq2_rx_de-skew = <8>; ++ cs1_dq2_tx_de-skew = <9>; ++ cs1_dq3_rx_de-skew = <8>; ++ cs1_dq3_tx_de-skew = <9>; ++ cs1_dq4_rx_de-skew = <8>; ++ cs1_dq4_tx_de-skew = <9>; ++ cs1_dq5_rx_de-skew = <8>; ++ cs1_dq5_tx_de-skew = <9>; ++ cs1_dq6_rx_de-skew = <8>; ++ cs1_dq6_tx_de-skew = <9>; ++ cs1_dq7_rx_de-skew = <8>; ++ cs1_dq7_tx_de-skew = <9>; ++ cs1_dqs0_rx_de-skew = <7>; ++ cs1_dqs0p_tx_de-skew = <10>; ++ cs1_dqs0n_tx_de-skew = <10>; ++ ++ cs1_dm1_rx_de-skew = <8>; ++ cs1_dm1_tx_de-skew = <8>; ++ cs1_dq8_rx_de-skew = <8>; ++ cs1_dq8_tx_de-skew = <9>; ++ cs1_dq9_rx_de-skew = <8>; ++ cs1_dq9_tx_de-skew = <8>; ++ cs1_dq10_rx_de-skew = <8>; ++ cs1_dq10_tx_de-skew = <9>; ++ cs1_dq11_rx_de-skew = <8>; ++ cs1_dq11_tx_de-skew = <8>; ++ cs1_dq12_rx_de-skew = <8>; ++ cs1_dq12_tx_de-skew = <9>; ++ cs1_dq13_rx_de-skew = <8>; ++ cs1_dq13_tx_de-skew = <8>; ++ cs1_dq14_rx_de-skew = <8>; ++ cs1_dq14_tx_de-skew = <9>; ++ cs1_dq15_rx_de-skew = <8>; ++ cs1_dq15_tx_de-skew = <8>; ++ cs1_dqs1_rx_de-skew = <8>; ++ cs1_dqs1p_tx_de-skew = <10>; ++ cs1_dqs1n_tx_de-skew = <10>; ++ ++ cs1_dm2_rx_de-skew = <8>; ++ cs1_dm2_tx_de-skew = <9>; ++ cs1_dq16_rx_de-skew = <8>; ++ cs1_dq16_tx_de-skew = <9>; ++ cs1_dq17_rx_de-skew = <8>; ++ cs1_dq17_tx_de-skew = <9>; ++ cs1_dq18_rx_de-skew = <8>; ++ cs1_dq18_tx_de-skew = <9>; ++ cs1_dq19_rx_de-skew = <8>; ++ cs1_dq19_tx_de-skew = <9>; ++ cs1_dq20_rx_de-skew = <8>; ++ cs1_dq20_tx_de-skew = <9>; ++ cs1_dq21_rx_de-skew = <8>; ++ cs1_dq21_tx_de-skew = <9>; ++ cs1_dq22_rx_de-skew = <8>; ++ cs1_dq22_tx_de-skew = <9>; ++ cs1_dq23_rx_de-skew = <8>; ++ cs1_dq23_tx_de-skew = <9>; ++ cs1_dqs2_rx_de-skew = <7>; ++ cs1_dqs2p_tx_de-skew = <10>; ++ cs1_dqs2n_tx_de-skew = <10>; ++ ++ cs1_dm3_rx_de-skew = <8>; ++ cs1_dm3_tx_de-skew = <8>; ++ cs1_dq24_rx_de-skew = <8>; ++ cs1_dq24_tx_de-skew = <9>; ++ cs1_dq25_rx_de-skew = <8>; ++ cs1_dq25_tx_de-skew = <8>; ++ cs1_dq26_rx_de-skew = <8>; ++ cs1_dq26_tx_de-skew = <8>; ++ cs1_dq27_rx_de-skew = <8>; ++ cs1_dq27_tx_de-skew = <8>; ++ cs1_dq28_rx_de-skew = <8>; ++ cs1_dq28_tx_de-skew = <8>; ++ cs1_dq29_rx_de-skew = <8>; ++ cs1_dq29_tx_de-skew = <8>; ++ cs1_dq30_rx_de-skew = <8>; ++ cs1_dq30_tx_de-skew = <8>; ++ cs1_dq31_rx_de-skew = <8>; ++ cs1_dq31_tx_de-skew = <8>; ++ cs1_dqs3_rx_de-skew = <8>; ++ cs1_dqs3p_tx_de-skew = <10>; ++ cs1_dqs3n_tx_de-skew = <10>; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +index fadb35d978a9..d0db35366b68 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +@@ -42,6 +42,7 @@ + + /dts-v1/; + #include "rk3328.dtsi" ++#include "rk3328-dram-box-plus-timing.dtsi" + + / { + model = "Firefly ROC-RK3328-CC Board"; +@@ -194,7 +195,37 @@ + + &dmc { + center-supply = <&vdd_logic>; +- status = "okay"; ++ system-status-freq = < ++ /*system status freq(KHz)*/ ++ SYS_STATUS_NORMAL 1066000 ++ SYS_STATUS_REBOOT 1066000 ++ SYS_STATUS_SUSPEND 1066000 ++ SYS_STATUS_VIDEO_1080P 1066000 ++ SYS_STATUS_VIDEO_4K 1066000 ++ SYS_STATUS_VIDEO_4K_10B 1066000 ++ SYS_STATUS_PERFORMANCE 1066000 ++ SYS_STATUS_BOOST 1066000 ++ >; ++ status = "okay"; ++}; ++ ++&dmc_opp_table { ++ rockchip,leakage-voltage-sel = < ++ 1 8 0 ++ 9 254 0 ++ >; ++ opp-933000000 { ++ opp-hz = /bits/ 64 <933000000>; ++ opp-microvolt = <1150000>; ++ opp-microvolt-L0 = <1150000>; ++ opp-microvolt-L1 = <1100000>; ++ }; ++ opp-1066000000 { ++ opp-hz = /bits/ 64 <1066000000>; ++ opp-microvolt = <1200000>; ++ opp-microvolt-L0 = <1200000>; ++ opp-microvolt-L1 = <1175000>; ++ }; + }; + + &display_subsystem { + +From 730acd01d665d0cfa1154ba4578b26e0e5479c5b Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 21 Apr 2018 13:21:24 +0200 +Subject: [PATCH] arm64: dts: rockchip: rk3328-box-trn9: use 1066MHz ddr + frequency + +--- + arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts | 29 +++++++++++++++++++++++- + 1 file changed, 28 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts +index 55c4cbf6baff..da823ee47b6a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts +@@ -42,6 +42,7 @@ + + /dts-v1/; + #include "rk3328.dtsi" ++#include "rk3328-dram-box-plus-timing.dtsi" + + / { + model = "Rockchip RK3328 TRN9"; +@@ -240,7 +241,33 @@ + + &dmc { + center-supply = <&vdd_logic>; +- status = "okay"; ++ system-status-freq = < ++ /*system status freq(KHz)*/ ++ SYS_STATUS_NORMAL 1066000 ++ SYS_STATUS_REBOOT 1066000 ++ SYS_STATUS_SUSPEND 1066000 ++ SYS_STATUS_VIDEO_1080P 1066000 ++ SYS_STATUS_VIDEO_4K 1066000 ++ SYS_STATUS_VIDEO_4K_10B 1066000 ++ SYS_STATUS_PERFORMANCE 1066000 ++ SYS_STATUS_BOOST 1066000 ++ >; ++ status = "okay"; ++}; ++ ++&dmc_opp_table { ++ opp-933000000 { ++ opp-hz = /bits/ 64 <933000000>; ++ opp-microvolt = <1150000>; ++ opp-microvolt-L0 = <1150000>; ++ opp-microvolt-L1 = <1100000>; ++ }; ++ opp-1066000000 { ++ opp-hz = /bits/ 64 <1066000000>; ++ opp-microvolt = <1200000>; ++ opp-microvolt-L0 = <1200000>; ++ opp-microvolt-L1 = <1175000>; ++ }; + }; + + &display_subsystem { + +From 04f76286ef4c33805646a10515a65a6689aee386 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 18 Aug 2018 20:53:04 +0200 +Subject: [PATCH] arm64: dts: rockchip: rk3399: update dtsi + +--- + arch/arm64/boot/dts/rockchip/rk3399-linux.dtsi | 14 +------------- + arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 17 ++++++++++++++--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + + 3 files changed, 16 insertions(+), 16 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-linux.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-linux.dtsi +index 2851cd529e04..7be2af6b0ba8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-linux.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-linux.dtsi +@@ -47,18 +47,7 @@ + compatible = "rockchip,linux", "rockchip,rk3399"; + + chosen { +- bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1 console=ttyFIQ0 rw root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait"; +- }; +- +- reserved-memory { +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; +- +- drm_logo: drm-logo@00000000 { +- compatible = "rockchip,drm-logo"; +- reg = <0x0 0x0 0x0 0x0>; +- }; ++ bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1"; + }; + + cif_isp0: cif_isp@ff910000 { +@@ -120,7 +109,6 @@ + status = "disabled"; + + ports = <&vopb_out>, <&vopl_out>; +- logo-memory-region = <&drm_logo>; + + route { + route_hdmi: route-hdmi { +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +index 3d76b9733665..62ba4281197e 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +@@ -536,6 +536,14 @@ + status = "okay"; + }; + ++&pvtm { ++ status = "okay"; ++}; ++ ++&pmu_pvtm { ++ status = "okay"; ++}; ++ + &pmu_io_domains { + status = "okay"; + pmu1830-supply = <&vcc_3v0>; +@@ -563,7 +571,7 @@ + + &sdio0 { + clock-frequency = <50000000>; +- clock-freq-min-max = <200000 50000000>; ++ max-frequency = <50000000>; + supports-sdio; + bus-width = <4>; + disable-wp; +@@ -581,14 +589,17 @@ + + &sdmmc { + clock-frequency = <150000000>; +- clock-freq-min-max = <100000 150000000>; ++ max-frequency = <150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; +- //sd-uhs-sdr104; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 36fbafe89e19..30646785fa70 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -1858,6 +1858,7 @@ + clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source"; + resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>; + reset-names = "axi", "ahb", "dclk"; ++ rockchip,grf = <&grf>; + power-domains = <&power RK3399_PD_VOPB>; + iommus = <&vopb_mmu>; + status = "disabled"; + +From 20e2d297c0a1f3dde0d149927581e2998b374bb8 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 19 Aug 2018 23:10:05 +0200 +Subject: [PATCH] arm64: dts: rk3399-rockpro64: update dts + +--- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 299 ++++++++-------------- + 1 file changed, 110 insertions(+), 189 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +index 02b8ba7dcc94..51df0a47896c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +@@ -8,17 +8,13 @@ + #include + #include + #include "rk3399.dtsi" ++#include "rk3399-linux.dtsi" + #include "rk3399-opp.dtsi" + + / { + model = "Pine64 RockPro64"; + compatible = "pine64,rockpro64", "rockchip,rk3399"; + +- chosen { +- bootargs = "earlyprintk=uart8250,mmio32,0xff1a0000 swiotlb=1"; +- stdout-path = "serial2:1500000n8"; +- }; +- + /* first 64k(0xff8c0000~0xff8d0000) for ddr and suspend */ + iram: sram@ff8d0000 { + compatible = "mmio-sram"; +@@ -92,6 +88,7 @@ + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; ++ pwm-supply = <&vcc_sys>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; +@@ -101,8 +98,6 @@ + /* for rockchip boot on */ + rockchip,pwm_id= <2>; + rockchip,pwm_voltage = <900000>; +- +- vin-supply = <&vcc_sys>; + }; + + clkin_gmac: external-gmac-clock { +@@ -112,20 +107,20 @@ + #clock-cells = <0>; + }; + +- spdif-sound { +- status = "disabled"; ++ hdmi-sound { + compatible = "simple-audio-card"; +- simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "HDMI"; + simple-audio-card,cpu { +- sound-dai = <&spdif>; ++ sound-dai = <&i2s2>; + }; + simple-audio-card,codec { +- sound-dai = <&spdif_out>; ++ sound-dai = <&hdmi>; + }; + }; + + spdif_out: spdif-out { +- status = "disabled"; + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; +@@ -146,11 +141,41 @@ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "ap6354"; ++ sdio_vref = <1800>; ++ WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart0_rts>; ++ pinctrl-1 = <&uart0_gpios>; ++ BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ + es8316-sound { + status = "okay"; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; +- simple-audio-card,name = "rockchip,es8316-codec"; ++ simple-audio-card,name = "ES8316"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", +@@ -168,6 +193,17 @@ + }; + }; + ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ + leds { + status = "okay"; + compatible = "gpio-leds"; +@@ -183,30 +219,13 @@ + }; + }; + +- rk_key: rockchip-key { +- compatible = "rockchip,key"; +- status = "okay"; +- +- io-channels = <&saradc 1>; +- +- power-key { +- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; +- linux,code = <116>; +- label = "power"; +- gpio-key,wakeup; +- }; +- }; +- +- hdmi_dp_sound: hdmi-dp-sound { ++ test-power { + status = "okay"; +- compatible = "rockchip,rk3399-hdmi-dp"; +- rockchip,cpu = <&i2s2>; +- rockchip,codec = <&hdmi>, <&cdn_dp>; + }; + }; + + &cdn_dp { +- status = "okay"; ++ status = "disabled"; + extcon = <&fusb0>; + }; + +@@ -247,11 +266,11 @@ + }; + + &dfi { +- status = "okay"; ++ status = "disabled"; + }; + + &dmc { +- status = "okay"; ++ status = "disabled"; + center-supply = <&vdd_center>; + upthreshold = <40>; + downdifferential = <20>; +@@ -260,11 +279,11 @@ + SYS_STATUS_NORMAL 800000 + SYS_STATUS_REBOOT 400000 + SYS_STATUS_SUSPEND 400000 +- SYS_STATUS_VIDEO_1080P 400000 ++ SYS_STATUS_VIDEO_1080P 800000 + SYS_STATUS_VIDEO_4K 800000 + SYS_STATUS_VIDEO_4K_10B 800000 + SYS_STATUS_PERFORMANCE 800000 +- SYS_STATUS_BOOST 400000 ++ SYS_STATUS_BOOST 800000 + SYS_STATUS_DUALVIEW 800000 + SYS_STATUS_ISP 800000 + >; +@@ -276,7 +295,6 @@ + >; + auto-min-freq = <400000>; + auto-freq-en = <0>; +- + }; + + &dmc_opp_table { +@@ -324,33 +342,6 @@ + + &display_subsystem { + status = "okay"; +- +- ports = <&vopb_out>; +- +- route { +- route_hdmi: route-hdmi { +- status = "okay"; +- connect = <&vopb_out_hdmi>; +- }; +- +- route_dsi: route-dsi { +- status = "disabled"; +- connect = <&vopb_out_dsi>; +- }; +- +- route_edp: route-edp { +- status = "disabled"; +- connect = <&vopb_out_edp>; +- }; +- }; +-}; +- +-&dp_in_vopb { +- status = "disabled"; +-}; +- +-&edp { +- /delete-node/ pinctrl-0; + }; + + &emmc_phy { +@@ -359,8 +350,8 @@ + + &i2c0 { + status = "okay"; +- i2c-scl-rising-time-ns = <168>; +- i2c-scl-falling-time-ns = <4>; ++ i2c-scl-rising-time-ns = <180>; ++ i2c-scl-falling-time-ns = <30>; + clock-frequency = <400000>; + + vdd_cpu_b: syr827@40 { +@@ -393,6 +384,7 @@ + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ +@@ -429,8 +421,8 @@ + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <1350000>; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-always-on; + regulator-boot-on; +@@ -476,6 +468,7 @@ + regulator-name = "vcc1v8_dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; ++ regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; +@@ -487,6 +480,7 @@ + regulator-name = "vcc3v0_touch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; ++ regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; +@@ -510,6 +504,7 @@ + regulator-name = "vcc_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; ++ regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; +@@ -586,14 +581,6 @@ + }; + }; + +-&i2s0 { +- status = "okay"; +- rockchip,i2s-broken-burst-len; +- rockchip,playback-channels = <8>; +- rockchip,capture-channels = <8>; +- #sound-dai-cells = <0>; +-}; +- + &i2c1 { + status = "okay"; + i2c-scl-rising-time-ns = <168>; +@@ -624,6 +611,14 @@ + }; + }; + ++&i2s0 { ++ status = "okay"; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++}; ++ + &i2s1 { + status = "okay"; + rockchip,i2s-broken-burst-len; +@@ -634,6 +629,7 @@ + + &i2s2 { + #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; + status = "okay"; + }; + +@@ -650,7 +646,7 @@ + pinctrl-0 = <&rgmii_pins>; + pinctrl-1 = <&rgmii_sleep_pins>; + tx_delay = <0x28>; +- rx_delay = <0x20>; ++ rx_delay = <0x11>; + status = "okay"; + }; + +@@ -660,6 +656,9 @@ + }; + + &hdmi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #sound-dai-cells = <0>; + status = "okay"; + }; + +@@ -678,13 +677,17 @@ + + &sdmmc { + clock-frequency = <50000000>; +- clock-freq-min-max = <400000 150000000>; ++ max-frequency = <150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; + vqmmc-supply = <&vcc_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; +@@ -693,8 +696,8 @@ + }; + + &sdio0 { +- clock-frequency = <50000000>; +- clock-freq-min-max = <200000 50000000>; ++ clock-frequency = <100000000>; ++ max-frequency = <100000000>; + supports-sdio; + bus-width = <4>; + disable-wp; +@@ -707,35 +710,51 @@ + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; +- status = "okay"; ++ status = "disabled"; + }; + + &sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ supports-emmc; ++ non-removable; + keep-power-in-suspend; + status = "okay"; + }; + + &spdif { +- status = "disabled"; ++ status = "okay"; + pinctrl-0 = <&spdif_bus_1>; + #sound-dai-cells = <0>; + }; + + &spi1 { + status = "okay"; ++ max-freq = <10000000>; ++ + flash@0 { +- compatible = "gigadevice,gd25q128", "jedec,spi-nor"; ++ compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; +- m25p,fast-read; +- spi-max-frequency = <24000000>; ++ spi-max-frequency = <10000000>; + }; + }; + ++&threshold { ++ temperature = <80000>; ++}; ++ ++&target { ++ temperature = <95000>; ++}; ++ ++&soc_crit { ++ temperature = <100000>; ++}; ++ + &tcphy0 { + extcon = <&fusb0>; + status = "okay"; +@@ -826,114 +845,15 @@ + status = "okay"; + }; + +-&pwm2 { ++&pwm1 { + status = "okay"; + pinctrl-names = "active"; +- pinctrl-0 = <&pwm2_pin_pull_down>; + }; + +-&pwm3 { ++&pwm2 { + status = "okay"; +- +- interrupts = ; +- compatible = "rockchip,remotectl-pwm"; +- remote_pwm_id = <3>; +- handle_cpu_id = <1>; +- remote_support_psci = <1>; +- +- ir_key1 { +- rockchip,usercode = <0x4040>; +- rockchip,key_table = +- <0xf2 KEY_REPLY>, +- <0xba KEY_BACK>, +- <0xf4 KEY_UP>, +- <0xf1 KEY_DOWN>, +- <0xef KEY_LEFT>, +- <0xee KEY_RIGHT>, +- <0xbd KEY_HOME>, +- <0xea KEY_VOLUMEUP>, +- <0xe3 KEY_VOLUMEDOWN>, +- <0xe2 KEY_SEARCH>, +- <0xb2 KEY_POWER>, +- <0xbc KEY_MUTE>, +- <0xec KEY_MENU>, +- <0xbf 0x190>, +- <0xe0 0x191>, +- <0xe1 0x192>, +- <0xe9 183>, +- <0xe6 248>, +- <0xe8 185>, +- <0xe7 186>, +- <0xf0 388>, +- <0xbe 0x175>; +- }; +- +- ir_key2 { +- rockchip,usercode = <0xff00>; +- rockchip,key_table = +- <0xf9 KEY_HOME>, +- <0xbf KEY_BACK>, +- <0xfb KEY_MENU>, +- <0xaa KEY_REPLY>, +- <0xb9 KEY_UP>, +- <0xe9 KEY_DOWN>, +- <0xb8 KEY_LEFT>, +- <0xea KEY_RIGHT>, +- <0xeb KEY_VOLUMEDOWN>, +- <0xef KEY_VOLUMEUP>, +- <0xf7 KEY_MUTE>, +- <0xe7 KEY_POWER>, +- <0xfc KEY_POWER>, +- <0xa9 KEY_VOLUMEDOWN>, +- <0xa8 KEY_VOLUMEDOWN>, +- <0xe0 KEY_VOLUMEDOWN>, +- <0xa5 KEY_VOLUMEDOWN>, +- <0xab 183>, +- <0xb7 388>, +- <0xe8 388>, +- <0xf8 184>, +- <0xaf 185>, +- <0xed KEY_VOLUMEDOWN>, +- <0xee 186>, +- <0xb3 KEY_VOLUMEDOWN>, +- <0xf1 KEY_VOLUMEDOWN>, +- <0xf2 KEY_VOLUMEDOWN>, +- <0xf3 KEY_SEARCH>, +- <0xb4 KEY_VOLUMEDOWN>, +- <0xbe KEY_SEARCH>; +- }; +- +- ir_key3 { +- rockchip,usercode = <0x1dcc>; +- rockchip,key_table = +- <0xee KEY_REPLY>, +- <0xf0 KEY_BACK>, +- <0xf8 KEY_UP>, +- <0xbb KEY_DOWN>, +- <0xef KEY_LEFT>, +- <0xed KEY_RIGHT>, +- <0xfc KEY_HOME>, +- <0xf1 KEY_VOLUMEUP>, +- <0xfd KEY_VOLUMEDOWN>, +- <0xb7 KEY_SEARCH>, +- <0xff KEY_POWER>, +- <0xf3 KEY_MUTE>, +- <0xbf KEY_MENU>, +- <0xf9 0x191>, +- <0xf5 0x192>, +- <0xb3 388>, +- <0xbe KEY_1>, +- <0xba KEY_2>, +- <0xb2 KEY_3>, +- <0xbd KEY_4>, +- <0xf9 KEY_5>, +- <0xb1 KEY_6>, +- <0xfc KEY_7>, +- <0xf8 KEY_8>, +- <0xb0 KEY_9>, +- <0xb6 KEY_0>, +- <0xb5 KEY_BACKSPACE>; +- }; ++ pinctrl-names = "active"; ++ pinctrl-0 = <&pwm2_pin_pull_down>; + }; + + &pinctrl { +@@ -982,6 +902,7 @@ + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = ++ <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch index dc6600ee86..5d497819ae 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch @@ -1,4 +1,4 @@ -From 7894722c99f2be6806a245c2db1c0df61e890096 Mon Sep 17 00:00:00 2001 +From c5300de0fe982ae8a78e1b95ef7bf30b744e4ca1 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Fri, 25 Nov 2016 14:12:01 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: fix enabling of the TX-delay for @@ -66,7 +66,7 @@ index 43ab691362d4..686f3b259dc0 100644 return 0; } -From 91f88fe0a8ae6a575e42384236ddac74a7343f33 Mon Sep 17 00:00:00 2001 +From 647c38d9964680f7fbb24c5a889ef74b23b4cbd4 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 12 Sep 2017 18:54:35 +0900 Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL8211F_PAGE_SELECT to @@ -132,7 +132,7 @@ index 686f3b259dc0..d58cc8f518ac 100644 return 0; } -From 418a6d18802923ffc35b9d8d40ce97a7d44f4482 Mon Sep 17 00:00:00 2001 +From 724532e7b4ad78722821763c639a73383a0f4418 Mon Sep 17 00:00:00 2001 From: Jassi Brar Date: Tue, 12 Sep 2017 18:54:36 +0900 Subject: [PATCH] UPSTREAM: net: phy: realtek: add RTL8201F phy-id and @@ -235,7 +235,7 @@ index d58cc8f518ac..422cf1f6a60c 100644 { 0x001cc914, 0x001fffff }, { 0x001cc915, 0x001fffff }, -From 0e7b02714fa25f16aebcb917fa7017aded5bdf06 Mon Sep 17 00:00:00 2001 +From 933e1e195c40a941b6e5dec0c6a3a4bb7f804cf7 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Sun, 12 Nov 2017 16:16:04 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: fix RTL8211F interrupt mode @@ -280,7 +280,7 @@ index 422cf1f6a60c..a30d0c08c63b 100644 return err; } -From 013120bec5f5e717baf7465e0eaafd6e5141d8c6 Mon Sep 17 00:00:00 2001 +From 046a2dc318a05236e06b09d8c0ca3f1005cbceca Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:24 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: use the BIT and GENMASK macros @@ -329,7 +329,7 @@ index a30d0c08c63b..f8dc29a75828 100644 #define RTL8201F_ISR 0x1e #define RTL8201F_IER 0x13 -From ac2c0298c225eacc49b74a6f723b18a99a7b4b28 Mon Sep 17 00:00:00 2001 +From 7894b1cae69475242cdb1ca0fb639a5d70ac6316 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:25 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL821x_INER_INIT to @@ -370,7 +370,7 @@ index f8dc29a75828..89308eac4088 100644 err = phy_write(phydev, RTL821x_INER, 0); -From 68e38ec78893a72b91255eaf56e1aa5dfcf81d1f Mon Sep 17 00:00:00 2001 +From f6e8b6c88c6b3d4925607575bc4387a289d49708 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:26 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: group all register bit #defines @@ -414,7 +414,7 @@ index 89308eac4088..df97d903d2bf 100644 #define RTL8211F_TX_DELAY BIT(8) -From 89b955d9f11cc268626cdedbf75561ccc607bb90 Mon Sep 17 00:00:00 2001 +From d5e2b112bb8e5707fc2fb727122ee5a8444ee462 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:27 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: use the same indentation for all @@ -474,7 +474,7 @@ index df97d903d2bf..701f34ad7d8d 100644 MODULE_DESCRIPTION("Realtek PHY driver"); MODULE_AUTHOR("Johnson Leung"); -From 304312f104de088682456d4cf7353732685fe455 Mon Sep 17 00:00:00 2001 +From 8c16425a3c99a1cca4458eb17bd6414d65074027 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 22:51:28 +0100 Subject: [PATCH] UPSTREAM: net: phy: realtek: add utility functions to @@ -645,7 +645,7 @@ index 701f34ad7d8d..b1d52e61d91c 100644 return 0; } -From aa354e4db670dda7682b1c4aed23cd6ffb51f715 Mon Sep 17 00:00:00 2001 +From 13e556c6d4ece3c890edc414f205cc26381e9826 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 23:06:48 +0100 Subject: [PATCH] FROMLIST: net: phy: realtek: add support for configuring the @@ -755,7 +755,7 @@ index b1d52e61d91c..890ea9d18d27 100644 return ret; -From 1503227b699167969f0c630a95f73e7760edefbc Mon Sep 17 00:00:00 2001 +From e8fa4ce26460af84f028b7d215134caa33aa9ecb Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 23:06:49 +0100 Subject: [PATCH] FROMLIST: net: phy: realtek: configure the INTB pin on @@ -834,7 +834,7 @@ index 890ea9d18d27..f307d220b49a 100644 return rtl8211x_page_write(phydev, 0xa42, RTL821x_INER, val); } -From 429c1855e10305c2838913a9dc074bd70831bb14 Mon Sep 17 00:00:00 2001 +From dd026c252cd898bca0b85eb14aa6479b415d2471 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 2 Dec 2017 23:06:50 +0100 Subject: [PATCH] FROMLIST: net: phy: realtek: add more interrupt bits for diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch index a0ffcf317a..ee3b0a1258 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch @@ -1,4 +1,4 @@ -From 59a82f24064c60e03af52938e5a2257038e1ee07 Mon Sep 17 00:00:00 2001 +From bb0e3fa6305fe3dead0aa670d7979d6ebcbaf47d Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Thu, 22 Oct 2015 23:30:04 +0300 Subject: [PATCH] UPSTREAM: configfs: implement binary attributes @@ -651,7 +651,7 @@ index 758a029011b1..f7300d023dbe 100644 * If allow_link() exists, the item can symlink(2) out to other * items. If the item is a group, it may support mkdir(2). -From e35c4a7f4a74aa78fb3518e6eaccb7387600eccb Mon Sep 17 00:00:00 2001 +From 5bbcb67edd92f639228cbaf7d597af715442db16 Mon Sep 17 00:00:00 2001 From: Octavian Purdila Date: Wed, 23 Mar 2016 14:14:48 +0200 Subject: [PATCH] UPSTREAM: configfs: fix CONFIGFS_BIN_ATTR_[RW]O definitions @@ -689,7 +689,7 @@ index f7300d023dbe..658066d63180 100644 .ca_name = __stringify(_name), \ .ca_mode = S_IWUSR, \ -From b0f4ef7b999ed084376777763e20644dc9061ad3 Mon Sep 17 00:00:00 2001 +From 34d6438a4d2cedcd1b47f55a3cc63374252c6682 Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Wed, 4 Dec 2013 19:32:00 +0200 Subject: [PATCH] FROMLIST: OF: DT-Overlay configfs interface (v7) diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch index ce5cc4992a..2eb189826f 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch @@ -1,4 +1,4 @@ -From 3c894b625c24537d22213836dbc44e1973b2b1f4 Mon Sep 17 00:00:00 2001 +From 75bb99dc815464846a4add357494acf04212271d Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Sat, 14 Nov 2015 18:05:20 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq: constify mmc_pwrseq_ops structures @@ -56,7 +56,7 @@ index d10538bb5e07..2b16263458af 100644 .post_power_on = mmc_pwrseq_simple_post_power_on, .power_off = mmc_pwrseq_simple_power_off, -From 11396ee87b7a090c5807c2fc2b8a640d109c30ce Mon Sep 17 00:00:00 2001 +From 1977551c6ef29f55b398a02112e3075c9a38649d Mon Sep 17 00:00:00 2001 From: Martin Fuzzey Date: Wed, 20 Jan 2016 16:08:03 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Make reset-gpios optional to @@ -128,7 +128,7 @@ index 2b16263458af..aba786daebca 100644 goto clk_put; } -From eecad6e4c48e9e82ec2f8415dec690f67c7ba12b Mon Sep 17 00:00:00 2001 +From e79ed0004dc68dc2f2189256bf00a1f579c78f1a Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Wed, 6 Jan 2016 11:34:10 +0800 Subject: [PATCH] UPSTREAM: mmc: core: pwrseq_simple: remove unused header file @@ -153,7 +153,7 @@ index aba786daebca..bc173e18b71c 100644 #include -From ea74f89b7e6bb89a2824df5bf3ae94786f6b30b3 Mon Sep 17 00:00:00 2001 +From 545d059f7a0a4c470acfdb0fff30397899597f09 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 14 Apr 2016 14:02:14 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: add to_pwrseq_simple() macro @@ -220,7 +220,7 @@ index bc173e18b71c..f94271bb1f6b 100644 if (!IS_ERR(pwrseq->reset_gpios)) gpiod_put_array(pwrseq->reset_gpios); -From 11bf8cedf08ee10e4053d8787268c69a0bd7419b Mon Sep 17 00:00:00 2001 +From e8c5f0b9383e6a528c8fc00d61755f8187e4c0b8 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 14 Apr 2016 14:02:15 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq_emmc: add to_pwrseq_emmc() macro @@ -267,7 +267,7 @@ index 4a82bc77fe49..c2d732aa464c 100644 unregister_restart_handler(&pwrseq->reset_nb); gpiod_put(pwrseq->reset_gpio); -From 9a32c48a17c3a0de3bd96cc6e9289d9fb8710b91 Mon Sep 17 00:00:00 2001 +From ef2f3c5b7375b930697a64c85f30f9109e631cb0 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Thu, 14 Apr 2016 14:02:16 +0100 Subject: [PATCH] UPSTREAM: mmc: pwrseq: convert to proper platform device @@ -785,7 +785,7 @@ index f94271bb1f6b..450d907c6e6c 100644 +module_platform_driver(mmc_pwrseq_simple_driver); +MODULE_LICENSE("GPL v2"); -From d94057e963bb557eb61324a2f05e5a0a743813c5 Mon Sep 17 00:00:00 2001 +From 42eb02ddb70002e4f72fa627037b6acbdd4cb7a1 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 7 Aug 2016 21:02:38 +0200 Subject: [PATCH] UPSTREAM: mmc: pwrseq-simple: Add an optional @@ -861,7 +861,7 @@ index 450d907c6e6c..1304160de168 100644 pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops; pwrseq->pwrseq.owner = THIS_MODULE; -From 50e40e09e01a67684fd3b7ef2422f194a656dd93 Mon Sep 17 00:00:00 2001 +From bf90ebd56d6f327f77bd7add55b3593679cd5c67 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Sat, 6 May 2017 11:41:30 +0200 Subject: [PATCH] UPSTREAM: mmc: dt: pwrseq-simple: Invent power-off-delay-us @@ -897,7 +897,7 @@ index e25436861867..9029b45b8a22 100644 Example: -From e4960aff45ecb83728279dd1e524f4e62ec11240 Mon Sep 17 00:00:00 2001 +From bc79b1f8ca4d16d45b93c2888474bb3f11b10226 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Sat, 6 May 2017 11:43:05 +0200 Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Parse DTS for the diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc.patch new file mode 100644 index 0000000000..d3a8ed9a15 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc.patch @@ -0,0 +1,633 @@ +From 38396ba52ab85ea1eabea3c92fd7532f8732f92e Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 24 Jul 2018 15:49:29 +0200 +Subject: [PATCH] mmc: core: use hs400es voltage flags + +--- + drivers/mmc/core/mmc.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c +index a814eb6882aa..1d950f0b3aa6 100644 +--- a/drivers/mmc/core/mmc.c ++++ b/drivers/mmc/core/mmc.c +@@ -1259,10 +1259,10 @@ static int mmc_select_hs400es(struct mmc_card *card) + goto out_err; + } + +- if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_2V) ++ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); + +- if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_8V) ++ if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V) + err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); + + /* If fails try again during next card power cycle */ + +From 92a57737adc14e15e80b6913932bb5d2d3478068 Mon Sep 17 00:00:00 2001 +From: Haibo Chen +Date: Tue, 8 Aug 2017 18:54:01 +0800 +Subject: [PATCH] UPSTREAM: mmc: mmc: correct the logic for setting HS400ES + signal voltage + +Change the default err value to -EINVAL, make sure the card only +has type EXT_CSD_CARD_TYPE_HS400_1_8V also do the signal voltage +setting when select hs400es mode. + +Fixes: commit 1720d3545b77 ("mmc: core: switch to 1V8 or 1V2 for hs400es mode") +Cc: +Signed-off-by: Haibo Chen +Reviewed-by: Shawn Lin +Signed-off-by: Ulf Hansson +(cherry picked from commit 92ddd95919466de5d34f3cb43635da9a7f9ab814) +--- + drivers/mmc/core/mmc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c +index 1d950f0b3aa6..70de514dd061 100644 +--- a/drivers/mmc/core/mmc.c ++++ b/drivers/mmc/core/mmc.c +@@ -1251,7 +1251,7 @@ out_err: + static int mmc_select_hs400es(struct mmc_card *card) + { + struct mmc_host *host = card->host; +- int err = 0; ++ int err = -EINVAL; + u8 val; + + if (!(host->caps & MMC_CAP_8_BIT_DATA)) { + +From 108a045df9dc1cee2127aec0bdd327ba7f2fdb81 Mon Sep 17 00:00:00 2001 +From: Ulf Hansson +Date: Wed, 25 Jan 2017 10:12:10 +0100 +Subject: [PATCH] UPSTREAM: mmc: core: Remove redundant code in + mmc_set_signal_voltage() + +The mmc_set_signal_voltage() function is used for SD/SDIO when switching to +1.8V for UHS mode. Therefore let's remove the redundant code dealing with +MMC_SIGNAL_VOLTAGE_330. + +Signed-off-by: Ulf Hansson +Reviewed-by: Shawn Lin +Tested-by: Jan Glauber +Tested-by: Stefan Wahren +(cherry picked from commit a44efa4796249c6d4341935e90e9105d6e1a5f15) +--- + drivers/mmc/core/core.c | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index 3e3c79feb07b..b69c96ad9486 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1598,13 +1598,6 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr) + + BUG_ON(!host); + +- /* +- * Send CMD11 only if the request is to switch the card to +- * 1.8V signalling. +- */ +- if (signal_voltage == MMC_SIGNAL_VOLTAGE_330) +- return __mmc_set_signal_voltage(host, signal_voltage); +- + /* + * If we cannot switch voltages, return failure so the caller + * can continue without UHS mode + +From d28c1bfff6556db2c4ce1093091293cf20542202 Mon Sep 17 00:00:00 2001 +From: Ulf Hansson +Date: Wed, 25 Jan 2017 10:25:01 +0100 +Subject: [PATCH] UPSTREAM: mmc: core: Clarify usage of + mmc_set_signal_voltage() + +The mmc_set_signal_voltage() function is used for SD/SDIO when switching to +1.8V for UHS mode. To clarify this let's do the following changes. + +- We are always providing MMC_SIGNAL_VOLTAGE_180 as the signal_voltage + parameter to the function. Then, let's just remove the parameter as it + serves no purpose. +- Rename the function to mmc_set_uhs_voltage(). + +Signed-off-by: Ulf Hansson +Reviewed-by: Shawn Lin +Tested-by: Jan Glauber +Tested-by: Stefan Wahren +(cherry picked from commit 2ed573b603f78289dd1435c94597aa25a97e2b76) +--- + drivers/mmc/core/core.c | 4 ++-- + drivers/mmc/core/core.h | 2 +- + drivers/mmc/core/sd.c | 3 +-- + drivers/mmc/core/sdio.c | 3 +-- + 4 files changed, 5 insertions(+), 7 deletions(-) + +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index b69c96ad9486..35d19d57d2c5 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1590,7 +1590,7 @@ int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage) + + } + +-int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr) ++int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr) + { + struct mmc_command cmd = {0}; + int err = 0; +@@ -1636,7 +1636,7 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr) + host->ios.clock = 0; + mmc_set_ios(host); + +- if (__mmc_set_signal_voltage(host, signal_voltage)) { ++ if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) { + /* + * Voltages may not have been switched, but we've already + * sent CMD11, so a power cycle is required anyway +diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h +index ed7c3167763a..88ef50b2e0be 100644 +--- a/drivers/mmc/core/core.h ++++ b/drivers/mmc/core/core.h +@@ -43,7 +43,7 @@ void mmc_set_clock(struct mmc_host *host, unsigned int hz); + void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode); + void mmc_set_bus_width(struct mmc_host *host, unsigned int width); + u32 mmc_select_voltage(struct mmc_host *host, u32 ocr); +-int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr); ++int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr); + int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage); + void mmc_set_timing(struct mmc_host *host, unsigned int timing); + void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type); +diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c +index cd437d6b1843..d9943d82db95 100644 +--- a/drivers/mmc/core/sd.c ++++ b/drivers/mmc/core/sd.c +@@ -742,8 +742,7 @@ try_again: + */ + if (!mmc_host_is_spi(host) && rocr && + ((*rocr & 0x41000000) == 0x41000000)) { +- err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180, +- pocr); ++ err = mmc_set_uhs_voltage(host, pocr); + if (err == -EAGAIN) { + retries--; + goto try_again; +diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c +index c586b11a40b5..f221418542e2 100644 +--- a/drivers/mmc/core/sdio.c ++++ b/drivers/mmc/core/sdio.c +@@ -648,8 +648,7 @@ try_again: + * to make sure which speed mode should work. + */ + if (!powered_resume && (rocr & ocr & R4_18V_PRESENT)) { +- err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180, +- ocr_card); ++ err = mmc_set_uhs_voltage(host, ocr_card); + if (err == -EAGAIN) { + mmc_sdio_resend_if_cond(host, card); + retries--; + +From 0f61c64862ed54163c5f88389170c95055a74f68 Mon Sep 17 00:00:00 2001 +From: Ulf Hansson +Date: Wed, 25 Jan 2017 11:12:34 +0100 +Subject: [PATCH] UPSTREAM: mmc: core: Rename __mmc_set_signal_voltage() to + mmc_set_signal_voltage() + +Earlier the mmc_set_signal_voltage() existed, but since it has been renamed +to mmc_set_uhs_voltage(), we can now use that name instead. + +Signed-off-by: Ulf Hansson +Reviewed-by: Shawn Lin +Tested-by: Jan Glauber +Tested-by: Stefan Wahren +(cherry picked from commit 4e74b6b3c6e9adfe6a8fdebfc56a6416a996d905) +--- + drivers/mmc/core/core.c | 10 +++++----- + drivers/mmc/core/core.h | 2 +- + drivers/mmc/core/mmc.c | 16 ++++++++-------- + 3 files changed, 14 insertions(+), 14 deletions(-) + +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index 35d19d57d2c5..ba285431c2d0 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1574,7 +1574,7 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) + return ocr; + } + +-int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage) ++int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage) + { + int err = 0; + int old_signal_voltage = host->ios.signal_voltage; +@@ -1636,7 +1636,7 @@ int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr) + host->ios.clock = 0; + mmc_set_ios(host); + +- if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) { ++ if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) { + /* + * Voltages may not have been switched, but we've already + * sent CMD11, so a power cycle is required anyway +@@ -1745,11 +1745,11 @@ void mmc_power_up(struct mmc_host *host, u32 ocr) + mmc_set_initial_state(host); + + /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */ +- if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330) == 0) ++ if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330)) + dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n"); +- else if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180) == 0) ++ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) + dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n"); +- else if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120) == 0) ++ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120)) + dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n"); + + /* +diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h +index 88ef50b2e0be..0e4bc1c7a773 100644 +--- a/drivers/mmc/core/core.h ++++ b/drivers/mmc/core/core.h +@@ -44,7 +44,7 @@ void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode); + void mmc_set_bus_width(struct mmc_host *host, unsigned int width); + u32 mmc_select_voltage(struct mmc_host *host, u32 ocr); + int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr); +-int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage); ++int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage); + void mmc_set_timing(struct mmc_host *host, unsigned int timing); + void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type); + int mmc_select_drive_strength(struct mmc_card *card, unsigned int max_dtr, +diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c +index 70de514dd061..dd0040a10c0b 100644 +--- a/drivers/mmc/core/mmc.c ++++ b/drivers/mmc/core/mmc.c +@@ -1088,14 +1088,14 @@ static int mmc_select_hs_ddr(struct mmc_card *card) + */ + err = -EINVAL; + if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); + + if (err && (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_8V)) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); + + /* make sure vccq is 3.3v after switching disaster */ + if (err) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330); + + if (!err) + mmc_set_timing(host, MMC_TIMING_MMC_DDR52); +@@ -1260,10 +1260,10 @@ static int mmc_select_hs400es(struct mmc_card *card) + } + + if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); + + if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); + + /* If fails try again during next card power cycle */ + if (err) +@@ -1362,10 +1362,10 @@ static int mmc_select_hs200(struct mmc_card *card) + + old_signal_voltage = host->ios.signal_voltage; + if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_2V) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); + + if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_8V) +- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); ++ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); + + /* If fails try again during next card power cycle */ + if (err) +@@ -1393,7 +1393,7 @@ static int mmc_select_hs200(struct mmc_card *card) + err: + if (err) { + /* fall back to the old signal voltage, if fails report error */ +- if (__mmc_set_signal_voltage(host, old_signal_voltage)) ++ if (mmc_set_signal_voltage(host, old_signal_voltage)) + err = -EIO; + + pr_err("%s: %s failed, error %d\n", mmc_hostname(card->host), + +From db9fd591980256d95de5675ebd84759b9cc9831c Mon Sep 17 00:00:00 2001 +From: Adrian Hunter +Date: Mon, 25 Sep 2017 11:29:03 +0300 +Subject: [PATCH] UPSTREAM: mmc: core: Factor out mmc_host_set_uhs_voltage() + +Factor out mmc_host_set_uhs_voltage() so it can be reused. + +Signed-off-by: Adrian Hunter +Signed-off-by: Ulf Hansson +(cherry picked from commit 3f496afb6fb361b282f37968ff7d3d80b0f1b5cb) +--- + drivers/mmc/core/core.c | 38 ++++++++++++++++++++++++-------------- + drivers/mmc/core/core.h | 1 + + 2 files changed, 25 insertions(+), 14 deletions(-) + +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index ba285431c2d0..dae82afcbc99 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1590,11 +1590,33 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage) + + } + ++int mmc_host_set_uhs_voltage(struct mmc_host *host) ++{ ++ u32 clock; ++ ++ /* ++ * During a signal voltage level switch, the clock must be gated ++ * for 5 ms according to the SD spec ++ */ ++ clock = host->ios.clock; ++ host->ios.clock = 0; ++ mmc_set_ios(host); ++ ++ if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) ++ return -EAGAIN; ++ ++ /* Keep clock gated for at least 10 ms, though spec only says 5 ms */ ++ mmc_delay(10); ++ host->ios.clock = clock; ++ mmc_set_ios(host); ++ ++ return 0; ++} ++ + int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr) + { + struct mmc_command cmd = {0}; + int err = 0; +- u32 clock; + + BUG_ON(!host); + +@@ -1628,15 +1650,8 @@ int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr) + err = -EAGAIN; + goto power_cycle; + } +- /* +- * During a signal voltage level switch, the clock must be gated +- * for 5 ms according to the SD spec +- */ +- clock = host->ios.clock; +- host->ios.clock = 0; +- mmc_set_ios(host); + +- if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) { ++ if (mmc_host_set_uhs_voltage(host)) { + /* + * Voltages may not have been switched, but we've already + * sent CMD11, so a power cycle is required anyway +@@ -1645,11 +1660,6 @@ int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr) + goto power_cycle; + } + +- /* Keep clock gated for at least 10 ms, though spec only says 5 ms */ +- mmc_delay(10); +- host->ios.clock = clock; +- mmc_set_ios(host); +- + /* Wait for at least 1 ms according to spec */ + mmc_delay(1); + +diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h +index 0e4bc1c7a773..11f3d2c22ecb 100644 +--- a/drivers/mmc/core/core.h ++++ b/drivers/mmc/core/core.h +@@ -44,6 +44,7 @@ void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode); + void mmc_set_bus_width(struct mmc_host *host, unsigned int width); + u32 mmc_select_voltage(struct mmc_host *host, u32 ocr); + int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr); ++int mmc_host_set_uhs_voltage(struct mmc_host *host); + int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage); + void mmc_set_timing(struct mmc_host *host, unsigned int timing); + void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type); + +From 9c2d593200bd835b8e55eb6e0ba188e4dd9c744e Mon Sep 17 00:00:00 2001 +From: Adrian Hunter +Date: Mon, 25 Sep 2017 11:29:04 +0300 +Subject: [PATCH] UPSTREAM: mmc: sd: Fix signal voltage when there is no power + cycle + +Some boards have SD card connectors where the power rail cannot be switched +off by the driver. However there are various circumstances when a card +might be re-initialized, such as after system resume, warm re-boot, or +error handling. However, a UHS card will continue to use 1.8V signaling +unless it is power cycled. + +If the card has not been power cycled, it may still be using 1.8V +signaling. According to the SD spec., the Bus Speed Mode (function group 1) +bits 2 to 4 are zero if the card is initialized at 3.3V signal level. Thus +they can be used to determine if the card has already switched to 1.8V +signaling. Detect that situation and try to initialize a UHS-I (1.8V) +transfer mode. + +Tested with the following cards: + Transcend 4GB High Speed + Kingston 64GB SDR104 + Lexar by Micron HIGH-PERFORMANCE 300x 16GB DDR50 + SanDisk Ultra 8GB DDR50 + Transcend Ultimate 600x 16GB SDR104 + Transcend Premium 300x 64GB SDR104 + Lexar by Micron Professional 1000x 32GB UHS-II SDR104 + SanDisk Extreme Pro 16GB SDR104 + +Signed-off-by: Adrian Hunter +Tested-by: Zhoujie Wu +Reviewed-by: Shawn Lin +Signed-off-by: Ulf Hansson +(cherry picked from commit 6a11fc47f175c8d87018e89cb58e2d36c66534cb) +--- + drivers/mmc/core/sd.c | 47 +++++++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 45 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c +index d9943d82db95..2808a281d094 100644 +--- a/drivers/mmc/core/sd.c ++++ b/drivers/mmc/core/sd.c +@@ -898,6 +898,18 @@ unsigned mmc_sd_get_max_clock(struct mmc_card *card) + return max_dtr; + } + ++static bool mmc_sd_card_using_v18(struct mmc_card *card) ++{ ++ /* ++ * According to the SD spec., the Bus Speed Mode (function group 1) bits ++ * 2 to 4 are zero if the card is initialized at 3.3V signal level. Thus ++ * they can be used to determine if the card has already switched to ++ * 1.8V signaling. ++ */ ++ return card->sw_caps.sd3_bus_mode & ++ (SD_MODE_UHS_SDR50 | SD_MODE_UHS_SDR104 | SD_MODE_UHS_DDR50); ++} ++ + /* + * Handle the detection and initialisation of a card. + * +@@ -911,10 +923,11 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, + int err; + u32 cid[4]; + u32 rocr = 0; ++ bool v18_fixup_failed = false; + + BUG_ON(!host); + WARN_ON(!host->claimed); +- ++retry: + err = mmc_sd_get_cid(host, ocr, cid, &rocr); + if (err) + return err; +@@ -980,6 +993,36 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, + if (err) + goto free_card; + ++ /* ++ * If the card has not been power cycled, it may still be using 1.8V ++ * signaling. Detect that situation and try to initialize a UHS-I (1.8V) ++ * transfer mode. ++ */ ++ if (!v18_fixup_failed && !mmc_host_is_spi(host) && mmc_host_uhs(host) && ++ mmc_sd_card_using_v18(card) && ++ host->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_180) { ++ /* ++ * Re-read switch information in case it has changed since ++ * oldcard was initialized. ++ */ ++ if (oldcard) { ++ err = mmc_read_switch(card); ++ if (err) ++ goto free_card; ++ } ++ if (mmc_sd_card_using_v18(card)) { ++ if (mmc_host_set_uhs_voltage(host) || ++ mmc_sd_init_uhs_card(card)) { ++ v18_fixup_failed = true; ++ mmc_power_cycle(host, ocr); ++ if (!oldcard) ++ mmc_remove_card(card); ++ goto retry; ++ } ++ goto done; ++ } ++ } ++ + /* Initialization sequence for UHS-I cards */ + if (rocr & SD_ROCR_S18A && mmc_host_uhs(host)) { + err = mmc_sd_init_uhs_card(card); +@@ -1012,7 +1055,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, + mmc_set_bus_width(host, MMC_BUS_WIDTH_4); + } + } +- ++done: + host->card = card; + return 0; + + +From 6ee3035196c307a77f95b1c1f3cc537e467fb838 Mon Sep 17 00:00:00 2001 +From: Ulf Hansson +Date: Thu, 5 Apr 2018 21:24:15 +0200 +Subject: [PATCH] UPSTREAM: mmc: core: Share internal function to set initial + signal voltage + +Move the corresponding code for setting the initial signal voltage, from +mmc_power_up() into a new function, mmc_set_initial_signal_voltage(). + +Make the function internally available to the mmc core, as to allow the +following changes to make use of it. + +Signed-off-by: Ulf Hansson +Tested-by: Quentin Schulz +Reviewed-by: Shawn Lin +(cherry picked from commit 508c9864ccede5dd4b8a7220b3fe6998763e4407) +--- + drivers/mmc/core/core.c | 19 ++++++++++++------- + drivers/mmc/core/core.h | 1 + + 2 files changed, 13 insertions(+), 7 deletions(-) + +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index dae82afcbc99..7aa83beea957 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1590,6 +1590,17 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage) + + } + ++void mmc_set_initial_signal_voltage(struct mmc_host *host) ++{ ++ /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */ ++ if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330)) ++ dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n"); ++ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) ++ dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n"); ++ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120)) ++ dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n"); ++} ++ + int mmc_host_set_uhs_voltage(struct mmc_host *host) + { + u32 clock; +@@ -1754,13 +1765,7 @@ void mmc_power_up(struct mmc_host *host, u32 ocr) + /* Set initial state and call mmc_set_ios */ + mmc_set_initial_state(host); + +- /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */ +- if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330)) +- dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n"); +- else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) +- dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n"); +- else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120)) +- dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n"); ++ mmc_set_initial_signal_voltage(host); + + /* + * This delay should be sufficient to allow the power supply +diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h +index 11f3d2c22ecb..2634722265ad 100644 +--- a/drivers/mmc/core/core.h ++++ b/drivers/mmc/core/core.h +@@ -46,6 +46,7 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr); + int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr); + int mmc_host_set_uhs_voltage(struct mmc_host *host); + int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage); ++void mmc_set_initial_signal_voltage(struct mmc_host *host); + void mmc_set_timing(struct mmc_host *host, unsigned int timing); + void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type); + int mmc_select_drive_strength(struct mmc_card *card, unsigned int max_dtr, + +From adadab9687a3e07be7557e4272fdf5a007b4c604 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 24 Jul 2018 15:50:06 +0200 +Subject: [PATCH] mmc: core: set initial signal voltage on power off + +--- + drivers/mmc/core/core.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c +index 7aa83beea957..d2c59b5e04ab 100644 +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1792,6 +1792,14 @@ void mmc_power_off(struct mmc_host *host) + if (host->ios.power_mode == MMC_POWER_OFF) + return; + ++ mmc_set_initial_signal_voltage(host); ++ ++ /* ++ * This delay should be sufficient to allow the power supply ++ * to reach the minimum voltage. ++ */ ++ mmc_delay(10); ++ + mmc_pwrseq_power_off(host); + + host->ios.clock = 0; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0011-add-bitfield-header.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvb.patch similarity index 57% rename from projects/Rockchip/patches/linux/rockchip-4.4/linux-0011-add-bitfield-header.patch rename to projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvb.patch index 83be553bfc..d871851a64 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0011-add-bitfield-header.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvb.patch @@ -1,7 +1,7 @@ -From 9260fcc02a97e6acceb6dc0ef064939382b6b74d Mon Sep 17 00:00:00 2001 +From ae39146426642d51de99ba3bdef54912c579991b Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Wed, 31 Aug 2016 12:46:44 +0100 -Subject: [PATCH 1/2] add basic register-field manipulation macros +Subject: [PATCH] UPSTREAM: add basic register-field manipulation macros Common approach to accessing register fields is to define structures or sets of macros containing mask and shift pair. @@ -39,6 +39,7 @@ GCC < 6.0. Signed-off-by: Jakub Kicinski Reviewed-by: Dinan Gunawardena Signed-off-by: Kalle Valo +(cherry picked from commit 3e9b3112ec74f192eaab976c3889e34255cae940) --- include/linux/bitfield.h | 93 ++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/bug.h | 3 ++ @@ -165,20 +166,18 @@ index 7f4818673c41..edd3d8d3cd90 100644 #define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) --- -2.11.0 - -From ae411606724c694ec6fa0f255ed8d7788094109d Mon Sep 17 00:00:00 2001 +From 8c11cf13e9f5c633bc2d1f3414d3b95c9cc82e4c Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Thu, 9 Feb 2017 09:17:27 -0800 -Subject: [PATCH 2/2] bitfield.h: add FIELD_FIT() helper +Subject: [PATCH] UPSTREAM: bitfield.h: add FIELD_FIT() helper Add a helper for checking at runtime that a value will fit inside a specified field/mask. Signed-off-by: Jakub Kicinski Signed-off-by: David S. Miller +(cherry picked from commit 1697599ee301a52cded6499a09bd609f7f63fd06) --- include/linux/bitfield.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) @@ -187,10 +186,11 @@ diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index f6505d83069d..8b9d6fff002d 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h -@@ -63,6 +63,19 @@ +@@ -62,6 +62,19 @@ + (1ULL << __bf_shf(_mask))); \ }) - /** ++/** + * FIELD_FIT() - check if value fits in the field + * @_mask: shifted mask defining the field's length and position + * @_val: value to test against the field @@ -203,10 +203,174 @@ index f6505d83069d..8b9d6fff002d 100644 + !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + }) + -+/** + /** * FIELD_PREP() - prepare a bitfield element * @_mask: shifted mask defining the field's length and position - * @_val: value to put in the field --- -2.11.0 +From 9b03f083c3ba2b3ca6dbcfdc76bf24edfe8b2947 Mon Sep 17 00:00:00 2001 +From: Laurent Defert +Date: Wed, 11 Oct 2017 08:46:52 +0200 +Subject: [PATCH] FROMLIST: compat_ioctl: add compat handler for + FE_SET_PROPERTY and FE_GET_PROPERTY + +https://patchwork.linuxtv.org/patch/8209/ +--- + fs/compat_ioctl.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 138 insertions(+) + +diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c +index a52ca5cba015..438ce0c6851e 100644 +--- a/fs/compat_ioctl.c ++++ b/fs/compat_ioctl.c +@@ -223,6 +223,140 @@ static int do_video_set_spu_palette(unsigned int fd, unsigned int cmd, + return err; + } + ++struct compat_dtv_property { ++ __u32 cmd; ++ __u32 reserved[3]; ++ union { ++ __u32 data; ++ struct { ++ __u8 data[32]; ++ __u32 len; ++ __u32 reserved1[3]; ++ compat_uptr_t reserved2; ++ } buffer; ++ } u; ++ int result; ++}; ++ ++struct compat_dtv_properties { ++ __u32 num; ++ compat_uptr_t props; ++}; ++ ++#define FE_SET_PROPERTY32 _IOW('o', 82, struct compat_dtv_properties) ++#define FE_GET_PROPERTY32 _IOR('o', 83, struct compat_dtv_properties) ++ ++static int do_fe_set_property(unsigned int fd, unsigned int cmd, ++ struct compat_dtv_properties __user *dtv32) ++{ ++ struct dtv_properties __user *dtv; ++ struct dtv_property __user *properties; ++ struct compat_dtv_property __user *properties32; ++ compat_uptr_t data; ++ ++ int err; ++ int i; ++ __u32 num; ++ ++ err = get_user(num, &dtv32->num); ++ err |= get_user(data, &dtv32->props); ++ ++ if(err) ++ return -EFAULT; ++ ++ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) + ++ sizeof(struct dtv_property) * num); ++ properties = (struct dtv_property*)((char*)dtv + ++ sizeof(struct dtv_properties)); ++ ++ err = put_user(properties, &dtv->props); ++ err |= put_user(num, &dtv->num); ++ ++ properties32 = compat_ptr(data); ++ ++ if(err) ++ return -EFAULT; ++ ++ for(i = 0; i < num; i++) { ++ compat_uptr_t reserved2; ++ ++ err |= copy_in_user(&properties[i], &properties32[i], ++ (8 * sizeof(__u32)) + (32 * sizeof(__u8))); ++ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2); ++ err |= put_user(compat_ptr(reserved2), ++ &properties[i].u.buffer.reserved2); ++ } ++ ++ if(err) ++ return -EFAULT; ++ ++ err = sys_ioctl(fd, FE_SET_PROPERTY, (unsigned long) dtv); ++ ++ for(i = 0; i < num; i++) { ++ if(copy_in_user(&properties32[i].result, &properties[i].result, ++ sizeof(int))) ++ return -EFAULT; ++ } ++ ++ return err; ++} ++ ++static int do_fe_get_property(unsigned int fd, unsigned int cmd, ++ struct compat_dtv_properties __user *dtv32) ++{ ++ struct dtv_properties __user *dtv; ++ struct dtv_property __user *properties; ++ struct compat_dtv_property __user *properties32; ++ compat_uptr_t data; ++ ++ int err; ++ int i; ++ __u32 num; ++ ++ err = get_user(num, &dtv32->num); ++ err |= get_user(data, &dtv32->props); ++ ++ if(err) ++ return -EFAULT; ++ ++ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) + ++ sizeof(struct dtv_property) * num); ++ properties = (struct dtv_property*)((char*)dtv + ++ sizeof(struct dtv_properties)); ++ ++ err = put_user(properties, &dtv->props); ++ err |= put_user(num, &dtv->num); ++ ++ properties32 = compat_ptr(data); ++ ++ if(err) ++ return -EFAULT; ++ ++ for(i = 0; i < num; i++) { ++ compat_uptr_t reserved2; ++ ++ err |= copy_in_user(&properties[i], &properties32[i], ++ (8 * sizeof(__u32)) + (32 * sizeof(__u8))); ++ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2); ++ err |= put_user(compat_ptr(reserved2), ++ &properties[i].u.buffer.reserved2); ++ } ++ ++ if(err) ++ return -EFAULT; ++ ++ err = sys_ioctl(fd, FE_GET_PROPERTY, (unsigned long) dtv); ++ ++ for(i = 0; i < num; i++) { ++ ++ if(copy_in_user(&properties32[i], &properties[i], ++ sizeof(properties32[i]))) ++ return -EFAULT; ++ } ++ ++ return err; ++} ++ + #ifdef CONFIG_BLOCK + typedef struct sg_io_hdr32 { + compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */ +@@ -1483,6 +1617,10 @@ static long do_ioctl_trans(int fd, unsigned int cmd, + return do_video_stillpicture(fd, cmd, argp); + case VIDEO_SET_SPU_PALETTE: + return do_video_set_spu_palette(fd, cmd, argp); ++ case FE_SET_PROPERTY32: ++ return do_fe_set_property(fd, cmd, argp); ++ case FE_GET_PROPERTY32: ++ return do_fe_get_property(fd, cmd, argp); + } + + /* diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvbcompat.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvbcompat.patch deleted file mode 100644 index 5433acc3af..0000000000 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvbcompat.patch +++ /dev/null @@ -1,167 +0,0 @@ -From 23e9ba535d09e96564c8bc6a28afefbadb5ee619 Mon Sep 17 00:00:00 2001 -From: Laurent Defert -Date: Wed, 11 Oct 2017 08:46:52 +0200 -Subject: [PATCH] [media] compat_ioctl: add compat handler for FE_SET_PROPERTY - and FE_GET_PROPERTY - -https://patchwork.linuxtv.org/patch/8209/ ---- - fs/compat_ioctl.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 138 insertions(+) - -diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c -index 76e1f2dc669..f6b4144d94d 100644 ---- a/fs/compat_ioctl.c -+++ b/fs/compat_ioctl.c -@@ -224,6 +224,140 @@ static int do_video_set_spu_palette(unsigned int fd, unsigned int cmd, - return err; - } - -+struct compat_dtv_property { -+ __u32 cmd; -+ __u32 reserved[3]; -+ union { -+ __u32 data; -+ struct { -+ __u8 data[32]; -+ __u32 len; -+ __u32 reserved1[3]; -+ compat_uptr_t reserved2; -+ } buffer; -+ } u; -+ int result; -+}; -+ -+struct compat_dtv_properties { -+ __u32 num; -+ compat_uptr_t props; -+}; -+ -+#define FE_SET_PROPERTY32 _IOW('o', 82, struct compat_dtv_properties) -+#define FE_GET_PROPERTY32 _IOR('o', 83, struct compat_dtv_properties) -+ -+static int do_fe_set_property(unsigned int fd, unsigned int cmd, -+ struct compat_dtv_properties __user *dtv32) -+{ -+ struct dtv_properties __user *dtv; -+ struct dtv_property __user *properties; -+ struct compat_dtv_property __user *properties32; -+ compat_uptr_t data; -+ -+ int err; -+ int i; -+ __u32 num; -+ -+ err = get_user(num, &dtv32->num); -+ err |= get_user(data, &dtv32->props); -+ -+ if(err) -+ return -EFAULT; -+ -+ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) + -+ sizeof(struct dtv_property) * num); -+ properties = (struct dtv_property*)((char*)dtv + -+ sizeof(struct dtv_properties)); -+ -+ err = put_user(properties, &dtv->props); -+ err |= put_user(num, &dtv->num); -+ -+ properties32 = compat_ptr(data); -+ -+ if(err) -+ return -EFAULT; -+ -+ for(i = 0; i < num; i++) { -+ compat_uptr_t reserved2; -+ -+ err |= copy_in_user(&properties[i], &properties32[i], -+ (8 * sizeof(__u32)) + (32 * sizeof(__u8))); -+ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2); -+ err |= put_user(compat_ptr(reserved2), -+ &properties[i].u.buffer.reserved2); -+ } -+ -+ if(err) -+ return -EFAULT; -+ -+ err = sys_ioctl(fd, FE_SET_PROPERTY, (unsigned long) dtv); -+ -+ for(i = 0; i < num; i++) { -+ if(copy_in_user(&properties32[i].result, &properties[i].result, -+ sizeof(int))) -+ return -EFAULT; -+ } -+ -+ return err; -+} -+ -+static int do_fe_get_property(unsigned int fd, unsigned int cmd, -+ struct compat_dtv_properties __user *dtv32) -+{ -+ struct dtv_properties __user *dtv; -+ struct dtv_property __user *properties; -+ struct compat_dtv_property __user *properties32; -+ compat_uptr_t data; -+ -+ int err; -+ int i; -+ __u32 num; -+ -+ err = get_user(num, &dtv32->num); -+ err |= get_user(data, &dtv32->props); -+ -+ if(err) -+ return -EFAULT; -+ -+ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) + -+ sizeof(struct dtv_property) * num); -+ properties = (struct dtv_property*)((char*)dtv + -+ sizeof(struct dtv_properties)); -+ -+ err = put_user(properties, &dtv->props); -+ err |= put_user(num, &dtv->num); -+ -+ properties32 = compat_ptr(data); -+ -+ if(err) -+ return -EFAULT; -+ -+ for(i = 0; i < num; i++) { -+ compat_uptr_t reserved2; -+ -+ err |= copy_in_user(&properties[i], &properties32[i], -+ (8 * sizeof(__u32)) + (32 * sizeof(__u8))); -+ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2); -+ err |= put_user(compat_ptr(reserved2), -+ &properties[i].u.buffer.reserved2); -+ } -+ -+ if(err) -+ return -EFAULT; -+ -+ err = sys_ioctl(fd, FE_GET_PROPERTY, (unsigned long) dtv); -+ -+ for(i = 0; i < num; i++) { -+ -+ if(copy_in_user(&properties32[i], &properties[i], -+ sizeof(properties32[i]))) -+ return -EFAULT; -+ } -+ -+ return err; -+} -+ - #ifdef CONFIG_BLOCK - typedef struct sg_io_hdr32 { - compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */ -@@ -1489,6 +1623,10 @@ static long do_ioctl_trans(int fd, unsigned int cmd, - return do_video_stillpicture(fd, cmd, argp); - case VIDEO_SET_SPU_PALETTE: - return do_video_set_spu_palette(fd, cmd, argp); -+ case FE_SET_PROPERTY32: -+ return do_fe_set_property(fd, cmd, argp); -+ case FE_GET_PROPERTY32: -+ return do_fe_get_property(fd, cmd, argp); - } - - /* diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-limit.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-limit.patch new file mode 100644 index 0000000000..ecea7bf2b9 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-limit.patch @@ -0,0 +1,49 @@ +From 6ed983631422dcce52d8b029818617b4cd067a93 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 21 Apr 2018 12:52:58 +0200 +Subject: [PATCH] drm/rockchip: skip 4K 50/60Hz clocks for RK3328 + +--- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index e2aad6e2149b..6399bb2f3a32 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -519,6 +519,10 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, + if (hdmi->dev_type == RK3288_HDMI && (mode->clock < 27500 || mode->clock > 340000)) + return MODE_CLOCK_RANGE; + ++ /* Skip 4K 50/60Hz clocks for RK3328 */ ++ if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000) ++ return MODE_CLOCK_RANGE; ++ + /* + * ensure all drm display mode can work, if someone want support more + * resolutions, please limit the possible_crtc, only connect to + +From 3953395d6056914e32f4d3459cdb0d5bd8c362a0 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 21 Apr 2018 12:53:04 +0200 +Subject: [PATCH] drm/rockchip: skip 4K 50/60Hz clocks for RK3399 + +--- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index 6399bb2f3a32..3171c21f1c78 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -523,6 +523,10 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, + if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000) + return MODE_CLOCK_RANGE; + ++ /* Skip 4K 50/60Hz clocks for RK3399 */ ++ if (hdmi->dev_type == RK3399_HDMI && mode->clock > 340000) ++ return MODE_CLOCK_RANGE; ++ + /* + * ensure all drm display mode can work, if someone want support more + * resolutions, please limit the possible_crtc, only connect to diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch index 0efb534c19..f3f1590f20 100644 --- a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch @@ -1,4 +1,222 @@ -From 1ed55271b88f5055f501d4c83e1702b38760ccdf Mon Sep 17 00:00:00 2001 +From 0a3affb0d28223e6ffbdb3ccceeaae1ed7a35b21 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 3 Jun 2018 07:36:35 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: add support for interlace cyclic + xfer" + +This reverts commit 191583d95bae59c82b50f7437f2b738fcc5f8015. +--- + drivers/dma/pl330.c | 21 ++++++++++++--------- + 1 file changed, 12 insertions(+), 9 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 5893c11dd858..b4a0d48bafa4 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1398,9 +1398,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, + off += _emit_LPEND(dry_run, &buf[off], &lpend); + } + +- if (pxs->desc->src_interlace_size == 0 && +- pxs->desc->dst_interlace_size == 0 && +- pl330->peripherals_req_type == BURST) { ++ if (pl330->peripherals_req_type == BURST) { + unsigned int ccr = pxs->ccr; + unsigned long c = 0; + +@@ -1501,12 +1499,6 @@ static inline int _setup_xfer_cyclic(struct pl330_dmac *pl330, unsigned dry_run, + unsigned long bursts = BYTE_TO_BURST(x->bytes, ccr); + int off = 0; + +- if (pxs->desc->rqtype == DMA_DEV_TO_MEM) +- bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) +- + pxs->desc->dst_interlace_size); +- else if (pxs->desc->rqtype == DMA_MEM_TO_DEV) +- bursts = x->bytes / (BRST_SIZE(ccr) * BRST_LEN(ccr) +- + pxs->desc->src_interlace_size); + /* Setup Loop(s) */ + off += _loop_cyclic(pl330, dry_run, &buf[off], bursts, pxs, ev); + +@@ -2729,6 +2721,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + struct dma_pl330_desc *desc = NULL; + struct dma_pl330_chan *pch = to_pchan(chan); + struct pl330_dmac *pl330 = pch->dmac; ++ unsigned int size = 0; + dma_addr_t dst; + dma_addr_t src; + +@@ -2754,12 +2747,14 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + desc->rqcfg.dst_inc = 0; + src = dma_addr; + dst = pch->fifo_addr; ++ size = pch->src_interlace_size; + break; + case DMA_DEV_TO_MEM: + desc->rqcfg.src_inc = 0; + desc->rqcfg.dst_inc = 1; + src = pch->fifo_addr; + dst = dma_addr; ++ size = pch->dst_interlace_size; + break; + default: + break; +@@ -2779,8 +2774,16 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + desc->cyclic = true; + desc->num_periods = len / period_len; + desc->txd.flags = flags; ++ + desc->src_interlace_size = pch->src_interlace_size; + desc->dst_interlace_size = pch->dst_interlace_size; ++ /* refine bytes_requested if interlace_size set */ ++ if (size) { ++ size += (pch->burst_len * (1 << pch->burst_sz)); ++ size *= desc->bytes_requested; ++ size /= (pch->burst_len * (1 << pch->burst_sz)); ++ desc->bytes_requested = size; ++ } + return &desc->txd; + } + + +From 16aaccef2d6178e8ce9bdb676526301fd071c3d6 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 3 Jun 2018 07:36:53 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: add support for interlace size + config" + +This reverts commit ddd2e87ad41e2c9e95322a1fb7d8ca65e578aa65. +--- + drivers/dma/pl330.c | 32 -------------------------------- + include/linux/dmaengine.h | 2 -- + 2 files changed, 34 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index b4a0d48bafa4..babaeace0a8a 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -447,10 +447,6 @@ struct dma_pl330_chan { + int burst_len; /* the number of burst */ + dma_addr_t fifo_addr; + +- /* interlace size */ +- unsigned int src_interlace_size; +- unsigned int dst_interlace_size; +- + /* for runtime pm tracking */ + bool active; + }; +@@ -540,9 +536,6 @@ struct dma_pl330_desc { + /* For cyclic capability */ + bool cyclic; + size_t num_periods; +- /* interlace size */ +- unsigned int src_interlace_size; +- unsigned int dst_interlace_size; + }; + + struct _xfer_spec { +@@ -1194,10 +1187,6 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, + if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) + off += _emit_FLUSHP(dry_run, &buf[off], + pxs->desc->peri); +- if (pxs->desc->dst_interlace_size) { +- off += _emit_ADDH(dry_run, &buf[off], DST, +- pxs->desc->dst_interlace_size); +- } + } + + return off; +@@ -1228,9 +1217,6 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, + if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) + off += _emit_FLUSHP(dry_run, &buf[off], + pxs->desc->peri); +- if (pxs->desc->src_interlace_size) +- off += _emit_ADDH(dry_run, &buf[off], SRC, +- pxs->desc->src_interlace_size); + } + + return off; +@@ -2318,8 +2304,6 @@ static int pl330_config(struct dma_chan *chan, + pch->burst_sz = __ffs(slave_config->dst_addr_width); + if (slave_config->dst_maxburst) + pch->burst_len = slave_config->dst_maxburst; +- if (slave_config->src_interlace_size) +- pch->src_interlace_size = slave_config->src_interlace_size; + } else if (slave_config->direction == DMA_DEV_TO_MEM) { + if (slave_config->src_addr) + pch->fifo_addr = slave_config->src_addr; +@@ -2327,8 +2311,6 @@ static int pl330_config(struct dma_chan *chan, + pch->burst_sz = __ffs(slave_config->src_addr_width); + if (slave_config->src_maxburst) + pch->burst_len = slave_config->src_maxburst; +- if (slave_config->dst_interlace_size) +- pch->dst_interlace_size = slave_config->dst_interlace_size; + } + + return 0; +@@ -2721,7 +2703,6 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + struct dma_pl330_desc *desc = NULL; + struct dma_pl330_chan *pch = to_pchan(chan); + struct pl330_dmac *pl330 = pch->dmac; +- unsigned int size = 0; + dma_addr_t dst; + dma_addr_t src; + +@@ -2747,14 +2728,12 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + desc->rqcfg.dst_inc = 0; + src = dma_addr; + dst = pch->fifo_addr; +- size = pch->src_interlace_size; + break; + case DMA_DEV_TO_MEM: + desc->rqcfg.src_inc = 0; + desc->rqcfg.dst_inc = 1; + src = pch->fifo_addr; + dst = dma_addr; +- size = pch->dst_interlace_size; + break; + default: + break; +@@ -2775,15 +2754,6 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + desc->num_periods = len / period_len; + desc->txd.flags = flags; + +- desc->src_interlace_size = pch->src_interlace_size; +- desc->dst_interlace_size = pch->dst_interlace_size; +- /* refine bytes_requested if interlace_size set */ +- if (size) { +- size += (pch->burst_len * (1 << pch->burst_sz)); +- size *= desc->bytes_requested; +- size /= (pch->burst_len * (1 << pch->burst_sz)); +- desc->bytes_requested = size; +- } + return &desc->txd; + } + +@@ -2920,8 +2890,6 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, + + desc->rqtype = direction; + desc->bytes_requested = sg_dma_len(sg); +- desc->src_interlace_size = pch->src_interlace_size; +- desc->dst_interlace_size = pch->dst_interlace_size; + } + + /* Return the last desc in the chain */ +diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h +index 3050f88daf9e..948c17e409e9 100644 +--- a/include/linux/dmaengine.h ++++ b/include/linux/dmaengine.h +@@ -365,8 +365,6 @@ struct dma_slave_config { + u32 dst_maxburst; + bool device_fc; + unsigned int slave_id; +- unsigned int src_interlace_size; +- unsigned int dst_interlace_size; + }; + + /** + +From ef7bddfb9e1490a323aa322b3f1719f071720f3b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 10:47:28 +0100 Subject: [PATCH] Revert "dmaengine: pl330: fix bug that chan descdone is null" @@ -9,10 +227,10 @@ This reverts commit 636c30b38ae6ec499735ce7621ba474944b4e9b7. 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 08179f5d0428..766ab72d119e 100644 +index babaeace0a8a..6e375d7ec09c 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1785,17 +1785,16 @@ static int pl330_update(struct pl330_dmac *pl330) +@@ -1789,17 +1789,16 @@ static int pl330_update(struct pl330_dmac *pl330) /* Detach the req */ descdone = thrd->req[active].desc; @@ -39,7 +257,7 @@ index 08179f5d0428..766ab72d119e 100644 } -From 43f2eb7bd8a74147c2d9fe37d98df41c4973db63 Mon Sep 17 00:00:00 2001 +From 0e87104dd4138e358202bc6bad1f6ca2701fb711 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 10:47:38 +0100 Subject: [PATCH] Revert "dmaengine: pl330: flush before first loop" @@ -50,10 +268,10 @@ This reverts commit 34be2cf4679cadbf910de9651d54b46930166446. 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 766ab72d119e..055e3cd8832c 100644 +index 6e375d7ec09c..9664f71dbab2 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1347,11 +1347,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1351,11 +1351,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, /* forever loop */ off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); @@ -66,7 +284,7 @@ index 766ab72d119e..055e3cd8832c 100644 /* loop0 */ off += _emit_LP(dry_run, &buf[off], 0, lcnt0); ljmp0 = off; -@@ -1427,11 +1423,7 @@ static inline int _setup_loops(struct pl330_dmac *pl330, +@@ -1431,11 +1427,7 @@ static inline int _setup_loops(struct pl330_dmac *pl330, u32 ccr = pxs->ccr; unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); int off = 0; @@ -80,7 +298,7 @@ index 766ab72d119e..055e3cd8832c 100644 c = bursts; off += _loop(pl330, dry_run, &buf[off], &c, pxs); -From 1bea0136096ba90fb53c056f3ce3422086361a02 Mon Sep 17 00:00:00 2001 +From 31a66caa86b6ed3bde555f70d7d6cb351ff60156 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 10:47:51 +0100 Subject: [PATCH] Revert "dmaengine: pl330: fix 2 bursts transfer when dma @@ -92,10 +310,10 @@ This reverts commit 98753e172dc1d06cf4d61c48f5c3487df0247472. 1 file changed, 20 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 055e3cd8832c..ce52aa411c0b 100644 +index 9664f71dbab2..9c3699ad2245 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1169,16 +1169,6 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1173,16 +1173,6 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_LDP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_ST(dry_run, &buf[off], ALWAYS); @@ -112,7 +330,7 @@ index 055e3cd8832c..ce52aa411c0b 100644 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) off += _emit_FLUSHP(dry_run, &buf[off], -@@ -1199,16 +1189,6 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, +@@ -1203,16 +1193,6 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_LD(dry_run, &buf[off], ALWAYS); off += _emit_STP(dry_run, &buf[off], cond, pxs->desc->peri); @@ -130,7 +348,7 @@ index 055e3cd8832c..ce52aa411c0b 100644 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) off += _emit_FLUSHP(dry_run, &buf[off], -From b234afcd6b84fedb81f0cb14dc0002b3cefe0296 Mon Sep 17 00:00:00 2001 +From 4429392f7f65d46bac1dd0dda3d8611663acce63 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 21 Oct 2017 19:49:27 +0200 Subject: [PATCH] Revert "dmaengine: pl330: _loop_cyclic fix cycles of last @@ -142,10 +360,10 @@ This reverts commit d7155171cbc65e45b5b0c8db03fd16fa57a181f2. 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index ce52aa411c0b..9fbd8d863774 100644 +index 9c3699ad2245..be4ea6e089ae 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1366,7 +1366,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1370,7 +1370,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, ccr &= ~(0xf << CC_SRCBRSTLEN_SHFT); ccr &= ~(0xf << CC_DSTBRSTLEN_SHFT); off += _emit_MOV(dry_run, &buf[off], CCR, ccr); @@ -155,7 +373,7 @@ index ce52aa411c0b..9fbd8d863774 100644 off += _bursts(pl330, dry_run, &buf[off], pxs, 1); lpend.cond = ALWAYS; -From a7c635636d588f97e1e9a22313029843a3f8b486 Mon Sep 17 00:00:00 2001 +From 4bd0efa160df1d9cdfd2fd213b96587cb7961c76 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 4 Feb 2018 11:05:44 +0100 Subject: [PATCH] Revert "dmaengine: pl330: pl330_tasklet init power_down by @@ -167,10 +385,10 @@ This reverts commit 796b13f24a158f14d540bcf7316d843f72242c0d. 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 9fbd8d863774..359475bbe89f 100644 +index be4ea6e089ae..2ba795d599fb 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -2163,7 +2163,7 @@ static void pl330_tasklet(unsigned long data) +@@ -2169,7 +2169,7 @@ static void pl330_tasklet(unsigned long data) spin_lock(&pch->thread->dmac->lock); _stop(pch->thread); spin_unlock(&pch->thread->dmac->lock); @@ -180,7 +398,7 @@ index 9fbd8d863774..359475bbe89f 100644 } else { /* Make sure the PL330 Channel thread is active */ -From 50f85fa5c566c0d706ca264fa9327bc360255639 Mon Sep 17 00:00:00 2001 +From 2550b832a5aec4d0a2b584bed27a789cb76c2d35 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:54 +0200 Subject: [PATCH] Revert "dmaengine: pl330: _loop_cyclic supports unaligned @@ -192,10 +410,10 @@ This reverts commit 13dbe2cccd5851540af8158b12499c33801b6ef6. 1 file changed, 10 insertions(+), 28 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 359475bbe89f..3fa6a7e474de 100644 +index 2ba795d599fb..e5b3893d441e 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1356,28 +1356,6 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1360,28 +1360,6 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, off += _emit_LPEND(dry_run, &buf[off], &lpend); } @@ -224,7 +442,7 @@ index 359475bbe89f..3fa6a7e474de 100644 off += _emit_SEV(dry_run, &buf[off], ev); lpend.cond = ALWAYS; -@@ -1479,13 +1457,13 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1483,13 +1461,13 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, x = &pxs->desc->px; @@ -244,7 +462,7 @@ index 359475bbe89f..3fa6a7e474de 100644 off += _setup_xfer(pl330, dry_run, &buf[off], pxs); /* DMASEV peripheral/event */ -@@ -1493,6 +1471,10 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1497,6 +1475,10 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, /* DMAEND */ off += _emit_END(dry_run, &buf[off]); } else { @@ -256,7 +474,7 @@ index 359475bbe89f..3fa6a7e474de 100644 pxs, thrd->ev); } -From f511e38f0d47ec8f8cd4db8f05fae8d496cec3a1 Mon Sep 17 00:00:00 2001 +From ce768db94e3fb2c33d68ccf90001f725c0c7feb5 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:54 +0200 Subject: [PATCH] Revert "dmaengine: pl330: redefine the cyclic transfer" @@ -267,10 +485,10 @@ This reverts commit 5f638786e66089344c9cf594b81fbf02cd794f15. 1 file changed, 29 insertions(+), 108 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 3fa6a7e474de..0452a189d7fd 100644 +index e5b3893d441e..38c46f4e0408 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1303,76 +1303,6 @@ static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], +@@ -1307,76 +1307,6 @@ static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], return off; } @@ -347,7 +565,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 static inline int _setup_loops(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], const struct _xfer_spec *pxs) -@@ -1392,16 +1322,19 @@ static inline int _setup_loops(struct pl330_dmac *pl330, +@@ -1396,16 +1326,19 @@ static inline int _setup_loops(struct pl330_dmac *pl330, } static inline int _setup_xfer(struct pl330_dmac *pl330, @@ -370,7 +588,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 /* Setup Loop(s) */ off += _setup_loops(pl330, dry_run, &buf[off], pxs); -@@ -1423,20 +1356,6 @@ static inline int _setup_xfer(struct pl330_dmac *pl330, +@@ -1427,20 +1360,6 @@ static inline int _setup_xfer(struct pl330_dmac *pl330, return off; } @@ -391,7 +609,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 /* * A req is a sequence of one or more xfer units. * Returns the number of bytes taken to setup the MC for the req. -@@ -1449,34 +1368,42 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1453,34 +1372,42 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, struct pl330_xfer *x; u8 *buf = req->mc_cpu; int off = 0; @@ -448,7 +666,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 } return off; -@@ -2649,7 +2576,6 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( +@@ -2655,7 +2582,6 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( { struct dma_pl330_desc *desc = NULL; struct dma_pl330_chan *pch = to_pchan(chan); @@ -456,7 +674,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 dma_addr_t dst; dma_addr_t src; -@@ -2688,12 +2614,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( +@@ -2694,12 +2620,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( desc->rqtype = direction; desc->rqcfg.brst_size = pch->burst_sz; @@ -471,7 +689,7 @@ index 3fa6a7e474de..0452a189d7fd 100644 fill_px(&desc->px, dst, src, period_len); -From 682a7f71bd308635045e9d49cbabb31002429d3f Mon Sep 17 00:00:00 2001 +From 8ad1819a2e61483c3840d09b9a27f669c7fcb8bc Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:54 +0200 Subject: [PATCH] Revert "dmaengine: pl330: make transfer run infinitely @@ -483,7 +701,7 @@ This reverts commit e8a6e5086cb82d59cae6ae029b1eb4432cc62288. 1 file changed, 105 insertions(+), 94 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 0452a189d7fd..47c2e67f0296 100644 +index 38c46f4e0408..ad9d616551f8 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -447,6 +447,9 @@ struct dma_pl330_chan { @@ -507,7 +725,7 @@ index 0452a189d7fd..47c2e67f0296 100644 }; struct _xfer_spec { -@@ -1322,19 +1321,16 @@ static inline int _setup_loops(struct pl330_dmac *pl330, +@@ -1326,19 +1325,16 @@ static inline int _setup_loops(struct pl330_dmac *pl330, } static inline int _setup_xfer(struct pl330_dmac *pl330, @@ -530,7 +748,7 @@ index 0452a189d7fd..47c2e67f0296 100644 /* Setup Loop(s) */ off += _setup_loops(pl330, dry_run, &buf[off], pxs); -@@ -1368,14 +1364,11 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1372,14 +1368,11 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, struct pl330_xfer *x; u8 *buf = req->mc_cpu; int off = 0; @@ -545,7 +763,7 @@ index 0452a189d7fd..47c2e67f0296 100644 x = &pxs->desc->px; if (pl330->peripherals_req_type != BURST) { -@@ -1384,27 +1377,12 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1388,27 +1381,12 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, return -EINVAL; } @@ -578,7 +796,7 @@ index 0452a189d7fd..47c2e67f0296 100644 return off; } -@@ -1666,13 +1644,12 @@ static int pl330_update(struct pl330_dmac *pl330) +@@ -1670,13 +1648,12 @@ static int pl330_update(struct pl330_dmac *pl330) /* Detach the req */ descdone = thrd->req[active].desc; @@ -597,7 +815,7 @@ index 0452a189d7fd..47c2e67f0296 100644 /* For now, just make a list of callbacks to be done */ list_add_tail(&descdone->rqd, &pl330->req_done); -@@ -2043,27 +2020,12 @@ static void pl330_tasklet(unsigned long data) +@@ -2049,27 +2026,12 @@ static void pl330_tasklet(unsigned long data) spin_lock_irqsave(&pch->lock, flags); /* Pick up ripe tomatoes */ @@ -628,7 +846,7 @@ index 0452a189d7fd..47c2e67f0296 100644 /* Try to submit a req imm. next to the last completed cookie */ fill_queue(pch); -@@ -2091,8 +2053,20 @@ static void pl330_tasklet(unsigned long data) +@@ -2097,8 +2059,20 @@ static void pl330_tasklet(unsigned long data) callback = desc->txd.callback; callback_param = desc->txd.callback_param; @@ -651,7 +869,7 @@ index 0452a189d7fd..47c2e67f0296 100644 dma_descriptor_unmap(&desc->txd); -@@ -2152,6 +2126,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan) +@@ -2158,6 +2132,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan) spin_lock_irqsave(&pl330->lock, flags); dma_cookie_init(chan); @@ -659,7 +877,7 @@ index 0452a189d7fd..47c2e67f0296 100644 pch->thread = pl330_request_channel(pl330); if (!pch->thread) { -@@ -2275,7 +2250,8 @@ static void pl330_free_chan_resources(struct dma_chan *chan) +@@ -2281,7 +2256,8 @@ static void pl330_free_chan_resources(struct dma_chan *chan) pl330_release_channel(pch->thread); pch->thread = NULL; @@ -669,7 +887,7 @@ index 0452a189d7fd..47c2e67f0296 100644 spin_unlock_irqrestore(&pl330->lock, flags); pm_runtime_mark_last_busy(pch->dmac->ddma.dev); -@@ -2329,7 +2305,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, +@@ -2335,7 +2311,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, /* Check in pending list */ list_for_each_entry(desc, &pch->work_list, node) { @@ -678,7 +896,7 @@ index 0452a189d7fd..47c2e67f0296 100644 transferred = desc->bytes_requested; else if (running && desc == running) transferred = -@@ -2401,8 +2377,12 @@ static dma_cookie_t pl330_tx_submit(struct dma_async_tx_descriptor *tx) +@@ -2407,8 +2383,12 @@ static dma_cookie_t pl330_tx_submit(struct dma_async_tx_descriptor *tx) /* Assign cookies to all nodes */ while (!list_empty(&last->node)) { desc = list_entry(last->node.next, struct dma_pl330_desc, node); @@ -692,7 +910,7 @@ index 0452a189d7fd..47c2e67f0296 100644 dma_cookie_assign(&desc->txd); list_move_tail(&desc->node, &pch->submitted_list); -@@ -2502,9 +2482,6 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) +@@ -2508,9 +2488,6 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) desc->peri = peri_id ? pch->chan.chan_id : 0; desc->rqcfg.pcfg = &pch->dmac->pcfg; @@ -702,7 +920,7 @@ index 0452a189d7fd..47c2e67f0296 100644 dma_async_tx_descriptor_init(&desc->txd, &pch->chan); return desc; -@@ -2574,8 +2551,10 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( +@@ -2580,8 +2557,10 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( size_t period_len, enum dma_transfer_direction direction, unsigned long flags) { @@ -714,7 +932,7 @@ index 0452a189d7fd..47c2e67f0296 100644 dma_addr_t dst; dma_addr_t src; -@@ -2588,38 +2567,70 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( +@@ -2594,38 +2573,70 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( return NULL; } @@ -814,7 +1032,34 @@ index 0452a189d7fd..47c2e67f0296 100644 return &desc->txd; -From bf7ad151876459f44d29cb8949a95b69b2f3c3db Mon Sep 17 00:00:00 2001 +From ef009783e673113536eb2c9809f3787f5aeef87a Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 22 Jul 2018 16:07:46 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: fix error message to + dev_err_ratelimited" + +This reverts commit e25503f147cf665b6fc910983859d9f94eaf0d00. +--- + drivers/dma/pl330.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index ad9d616551f8..3d5d91084605 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1620,8 +1620,8 @@ static int pl330_update(struct pl330_dmac *pl330) + if (pl330->pcfg.num_events < 32 + && val & ~((1 << pl330->pcfg.num_events) - 1)) { + pl330->dmac_tbd.reset_dmac = true; +- dev_err_ratelimited(pl330->ddma.dev, "%s:%d Unexpected!\n", +- __func__, __LINE__); ++ dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__, ++ __LINE__); + ret = 1; + goto updt_exit; + } + +From 45c38c611da7df545138bf436f43e78481a6fa1a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:55 +0200 Subject: [PATCH] Revert "dmaengine: pl330: support transfer that doesn't align @@ -826,7 +1071,7 @@ This reverts commit c66ecf19b98ffac86177c29859e683de39f44e73. 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 47c2e67f0296..b5cf3fe9e9c3 100644 +index 3d5d91084605..2f5f8d40147c 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -240,7 +240,6 @@ enum pl330_byteswap { @@ -837,7 +1082,7 @@ index 47c2e67f0296..b5cf3fe9e9c3 100644 /* * With 256 bytes, we can do more than 2.5MB and 5MB xfers per req -@@ -1335,20 +1334,6 @@ static inline int _setup_xfer(struct pl330_dmac *pl330, +@@ -1339,20 +1338,6 @@ static inline int _setup_xfer(struct pl330_dmac *pl330, /* Setup Loop(s) */ off += _setup_loops(pl330, dry_run, &buf[off], pxs); @@ -858,7 +1103,7 @@ index 47c2e67f0296..b5cf3fe9e9c3 100644 return off; } -@@ -1371,11 +1356,9 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1375,11 +1360,9 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); x = &pxs->desc->px; @@ -874,7 +1119,7 @@ index 47c2e67f0296..b5cf3fe9e9c3 100644 off += _setup_xfer(pl330, dry_run, &buf[off], pxs); -From 782768f2aa48a7ec4ef509936a2ff46f481d3d3c Mon Sep 17 00:00:00 2001 +From 0be5f99a27515b375304a2dc85226a2fd3d560cd Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 16 Jun 2017 23:14:55 +0200 Subject: [PATCH] Revert "dmaengine: pl330: add burst mode according to dts @@ -886,7 +1131,7 @@ This reverts commit 8e770f371cc27f8828cb9ceb0516adc23fe75995. 1 file changed, 14 insertions(+), 22 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index b5cf3fe9e9c3..131763534a39 100644 +index 2f5f8d40147c..f7977979cbf5 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -494,8 +494,6 @@ struct pl330_dmac { @@ -898,7 +1143,7 @@ index b5cf3fe9e9c3..131763534a39 100644 int quirks; }; -@@ -1161,7 +1159,12 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, +@@ -1165,7 +1163,12 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, int cyc) { int off = 0; @@ -912,7 +1157,7 @@ index b5cf3fe9e9c3..131763534a39 100644 while (cyc--) { off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); -@@ -1181,7 +1184,12 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, +@@ -1185,7 +1188,12 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, const struct _xfer_spec *pxs, int cyc) { int off = 0; @@ -926,7 +1171,7 @@ index b5cf3fe9e9c3..131763534a39 100644 while (cyc--) { off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); -@@ -2593,12 +2601,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( +@@ -2599,12 +2607,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( desc->rqtype = direction; desc->rqcfg.brst_size = pch->burst_sz; @@ -940,7 +1185,7 @@ index b5cf3fe9e9c3..131763534a39 100644 desc->bytes_requested = period_len; fill_px(&desc->px, dst, src, period_len); -@@ -2700,7 +2703,6 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, +@@ -2706,7 +2709,6 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, { struct dma_pl330_desc *first, *desc = NULL; struct dma_pl330_chan *pch = to_pchan(chan); @@ -948,7 +1193,7 @@ index b5cf3fe9e9c3..131763534a39 100644 struct scatterlist *sg; int i; dma_addr_t addr; -@@ -2744,12 +2746,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, +@@ -2750,12 +2752,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, } desc->rqcfg.brst_size = pch->burst_sz; @@ -962,7 +1207,7 @@ index b5cf3fe9e9c3..131763534a39 100644 desc->rqtype = direction; desc->bytes_requested = sg_dma_len(sg); } -@@ -2845,11 +2842,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2851,11 +2848,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0; @@ -975,7 +1220,7 @@ index b5cf3fe9e9c3..131763534a39 100644 for (i = 0; i < ARRAY_SIZE(of_quirks); i++) if (of_property_read_bool(np, of_quirks[i].quirk)) -From a715ea1481fee1d4be239873f89c38a95cddc7cc Mon Sep 17 00:00:00 2001 +From a3456e55253a88214f07c72127744eee7e81ede1 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Tue, 5 Jul 2016 10:02:16 +0530 Subject: [PATCH] UPSTREAM: dmaengine: pl330: explicitly freeup irq @@ -995,10 +1240,10 @@ Cc: Linus Walleij 1 file changed, 6 insertions(+) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 131763534a39..5b4a419673fc 100644 +index f7977979cbf5..b6793b0d53c9 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -3009,12 +3009,18 @@ static int pl330_remove(struct amba_device *adev) +@@ -3015,12 +3015,18 @@ static int pl330_remove(struct amba_device *adev) { struct pl330_dmac *pl330 = amba_get_drvdata(adev); struct dma_pl330_chan *pch, *_p; @@ -1018,7 +1263,7 @@ index 131763534a39..5b4a419673fc 100644 /* Idle the DMAC */ -From 5dd1aed3e2ad901aa4b3be9db31e1b2e7b270b45 Mon Sep 17 00:00:00 2001 +From f1fd696d39b9ded57b30f79bbe23317262481a80 Mon Sep 17 00:00:00 2001 From: Stephen Barber Date: Thu, 18 Aug 2016 17:59:59 -0700 Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix residual for non-running BUSY @@ -1040,10 +1285,10 @@ Signed-off-by: Vinod Koul 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 5b4a419673fc..aab5abab5a10 100644 +index b6793b0d53c9..7e05ef5ba37f 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -2277,7 +2277,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, +@@ -2283,7 +2283,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, { enum dma_status ret; unsigned long flags; @@ -1052,7 +1297,7 @@ index 5b4a419673fc..aab5abab5a10 100644 struct dma_pl330_chan *pch = to_pchan(chan); unsigned int transferred, residual = 0; -@@ -2294,6 +2294,8 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, +@@ -2300,6 +2300,8 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, if (pch->thread->req_running != -1) running = pch->thread->req[pch->thread->req_running].desc; @@ -1061,7 +1306,7 @@ index 5b4a419673fc..aab5abab5a10 100644 /* Check in pending list */ list_for_each_entry(desc, &pch->work_list, node) { if (desc->status == DONE) -@@ -2301,6 +2303,15 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, +@@ -2307,6 +2309,15 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, else if (running && desc == running) transferred = pl330_get_current_xferred_count(pch, desc); @@ -1078,7 +1323,7 @@ index 5b4a419673fc..aab5abab5a10 100644 transferred = 0; residual += desc->bytes_requested - transferred; -From e2ae4ead3868a8aad8b87dcc8523e392302bc77a Mon Sep 17 00:00:00 2001 +From 5cb6529514e53ca8db016137788675be769a75b7 Mon Sep 17 00:00:00 2001 From: Hsin-Yu Chao Date: Tue, 23 Aug 2016 17:16:55 +0800 Subject: [PATCH] UPSTREAM: dmaengine: pl330: Acquire dmac's spinlock in @@ -1103,10 +1348,10 @@ Signed-off-by: Vinod Koul 1 file changed, 2 insertions(+) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index aab5abab5a10..1741cfbe311e 100644 +index 7e05ef5ba37f..93efdcc54f19 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -2290,6 +2290,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, +@@ -2296,6 +2296,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, goto out; spin_lock_irqsave(&pch->lock, flags); @@ -1114,7 +1359,7 @@ index aab5abab5a10..1741cfbe311e 100644 if (pch->thread->req_running != -1) running = pch->thread->req[pch->thread->req_running].desc; -@@ -2332,6 +2333,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, +@@ -2338,6 +2339,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, if (desc->last) residual = 0; } @@ -1123,7 +1368,7 @@ index aab5abab5a10..1741cfbe311e 100644 out: -From fc4fc3aa1348b018e072526781991bc837113436 Mon Sep 17 00:00:00 2001 +From cd1b3fa8ef7ec0a775321d44d2f5469ffbab7431 Mon Sep 17 00:00:00 2001 From: Stephen Barber Date: Tue, 1 Nov 2016 16:44:27 -0700 Subject: [PATCH] UPSTREAM: dmaengine: pl330: Handle xferred count if DMAMOV @@ -1142,10 +1387,10 @@ Signed-off-by: Vinod Koul 1 file changed, 5 insertions(+) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 1741cfbe311e..dd58cf886fa0 100644 +index 93efdcc54f19..497cc048feaa 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -2268,6 +2268,11 @@ static int pl330_get_current_xferred_count(struct dma_pl330_chan *pch, +@@ -2274,6 +2274,11 @@ static int pl330_get_current_xferred_count(struct dma_pl330_chan *pch, } pm_runtime_mark_last_busy(pch->dmac->ddma.dev); pm_runtime_put_autosuspend(pl330->ddma.dev); @@ -1158,7 +1403,7 @@ index 1741cfbe311e..dd58cf886fa0 100644 } -From d5ad98021dc2135d0d5df3fbca7f74b97d1341af Mon Sep 17 00:00:00 2001 +From 5f387aa530599beb607885a28a5bbf8f50d1dbb6 Mon Sep 17 00:00:00 2001 From: Vladimir Murzin Date: Wed, 7 Dec 2016 13:17:40 +0000 Subject: [PATCH] UPSTREAM: dmaengine: pl330: do not generate unaligned access @@ -1219,7 +1464,7 @@ Signed-off-by: Vinod Koul 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index dd58cf886fa0..50a5f8e1e371 100644 +index 497cc048feaa..eb274eeda0aa 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -573,7 +573,8 @@ static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[], @@ -1260,7 +1505,7 @@ index dd58cf886fa0..50a5f8e1e371 100644 return SZ_DMAGO; } -From 8c88ea42d57ce47924c1fc8524a61ef96f8bba51 Mon Sep 17 00:00:00 2001 +From 90b0d473241a84db9a284123c7357231a0ffd7d2 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Fri, 9 Dec 2016 15:24:12 +0530 Subject: [PATCH] =?UTF-8?q?UPSTREAM:=20dmaengine:=20pl330:=20remove=20unus?= @@ -1285,10 +1530,10 @@ Signed-off-by: Vinod Koul 1 file changed, 3 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 50a5f8e1e371..c725ceb4644d 100644 +index eb274eeda0aa..14efb0e4a6a8 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -1883,11 +1883,8 @@ static int dmac_alloc_resources(struct pl330_dmac *pl330) +@@ -1889,11 +1889,8 @@ static int dmac_alloc_resources(struct pl330_dmac *pl330) static int pl330_add(struct pl330_dmac *pl330) { @@ -1301,39 +1546,7 @@ index 50a5f8e1e371..c725ceb4644d 100644 if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", -From 7b131091273ee28bfa40e16b13f24fed7880abcb Mon Sep 17 00:00:00 2001 -From: Jean-Philippe Brucker -Date: Thu, 1 Jun 2017 19:22:01 +0100 -Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix warning in pl330_remove - -When removing a device with less than 9 IRQs (AMBA_NR_IRQS), we'll get a -big WARN_ON from devres.c because pl330_remove calls devm_free_irqs for -unallocated irqs. Similarly to pl330_probe, check that IRQ number is -present before calling devm_free_irq. - -Signed-off-by: Jean-Philippe Brucker -Signed-off-by: Vinod Koul -(cherry picked from commit ebcdaee4cebb3a8d0d702ab5e9392373672ec1de) ---- - drivers/dma/pl330.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index c725ceb4644d..73eaf78871f1 100644 ---- a/drivers/dma/pl330.c -+++ b/drivers/dma/pl330.c -@@ -3038,7 +3038,8 @@ static int pl330_remove(struct amba_device *adev) - - for (i = 0; i < AMBA_NR_IRQS; i++) { - irq = adev->irq[i]; -- devm_free_irq(&adev->dev, irq, pl330); -+ if (irq) -+ devm_free_irq(&adev->dev, irq, pl330); - } - - dma_async_device_unregister(&pl330->ddma); - -From 69414d3c8067401efa793708cb465f3891c087b7 Mon Sep 17 00:00:00 2001 +From 10abe915578c8bbd0e2621a255718beecc6a3425 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Mon, 27 Mar 2017 07:31:03 +0200 Subject: [PATCH] UPSTREAM: dmaengine: pl330: remove pdata based initialization @@ -1368,7 +1581,7 @@ index e212f9d804bd..2ef19ad5cb62 100644 #include #include diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 73eaf78871f1..23fdb826c6e8 100644 +index 14efb0e4a6a8..8d6c483663dc 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -22,7 +22,6 @@ @@ -1379,7 +1592,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 #include #include #include -@@ -2078,18 +2077,6 @@ static void pl330_tasklet(unsigned long data) +@@ -2084,18 +2083,6 @@ static void pl330_tasklet(unsigned long data) } } @@ -1398,7 +1611,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 static struct dma_chan *of_dma_pl330_xlate(struct of_phandle_args *dma_spec, struct of_dma *ofdma) { -@@ -2834,7 +2821,6 @@ static SIMPLE_DEV_PM_OPS(pl330_pm, pl330_suspend, pl330_resume); +@@ -2840,7 +2827,6 @@ static SIMPLE_DEV_PM_OPS(pl330_pm, pl330_suspend, pl330_resume); static int pl330_probe(struct amba_device *adev, const struct amba_id *id) { @@ -1406,7 +1619,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 struct pl330_config *pcfg; struct pl330_dmac *pl330; struct dma_pl330_chan *pch, *_p; -@@ -2844,8 +2830,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2850,8 +2836,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) int num_chan; struct device_node *np = adev->dev.of_node; @@ -1415,7 +1628,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); if (ret) return ret; -@@ -2860,7 +2844,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2866,7 +2850,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) pd = &pl330->ddma; pd->dev = &adev->dev; @@ -1424,7 +1637,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 /* get quirk */ for (i = 0; i < ARRAY_SIZE(of_quirks); i++) -@@ -2904,10 +2888,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2910,10 +2894,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) INIT_LIST_HEAD(&pd->channels); /* Initialize channel parameters */ @@ -1436,7 +1649,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 pl330->num_peripherals = num_chan; -@@ -2920,11 +2901,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2926,11 +2907,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) for (i = 0; i < num_chan; i++) { pch = &pl330->peripherals[i]; @@ -1449,7 +1662,7 @@ index 73eaf78871f1..23fdb826c6e8 100644 INIT_LIST_HEAD(&pch->submitted_list); INIT_LIST_HEAD(&pch->work_list); INIT_LIST_HEAD(&pch->completed_list); -@@ -2937,15 +2915,11 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2943,15 +2921,11 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) list_add_tail(&pch->chan.device_node, &pd->channels); } @@ -1512,7 +1725,39 @@ index fe93758e8403..000000000000 -extern bool pl330_filter(struct dma_chan *chan, void *param); -#endif /* __AMBA_PL330_H_ */ -From b6ec69572e0392b5aa2ded093809d2ff12efb32a Mon Sep 17 00:00:00 2001 +From 1ecb8e7abb5ba82380d83c7951621faeba06389e Mon Sep 17 00:00:00 2001 +From: Jean-Philippe Brucker +Date: Thu, 1 Jun 2017 19:22:01 +0100 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix warning in pl330_remove + +When removing a device with less than 9 IRQs (AMBA_NR_IRQS), we'll get a +big WARN_ON from devres.c because pl330_remove calls devm_free_irqs for +unallocated irqs. Similarly to pl330_probe, check that IRQ number is +present before calling devm_free_irq. + +Signed-off-by: Jean-Philippe Brucker +Signed-off-by: Vinod Koul +(cherry picked from commit ebcdaee4cebb3a8d0d702ab5e9392373672ec1de) +--- + drivers/dma/pl330.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 8d6c483663dc..f6a4a89ae8aa 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -3018,7 +3018,8 @@ static int pl330_remove(struct amba_device *adev) + + for (i = 0; i < AMBA_NR_IRQS; i++) { + irq = adev->irq[i]; +- devm_free_irq(&adev->dev, irq, pl330); ++ if (irq) ++ devm_free_irq(&adev->dev, irq, pl330); + } + + dma_async_device_unregister(&pl330->ddma); + +From 7d8694893a9e8d32c82b52fa589fe1e5660ec590 Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Thu, 15 Jun 2017 16:55:57 -0700 Subject: [PATCH] UPSTREAM: dmaengine: pl330: Delete unused functions @@ -1528,7 +1773,7 @@ Signed-off-by: Vinod Koul 1 file changed, 67 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 23fdb826c6e8..51aa1de88007 100644 +index f6a4a89ae8aa..bd4a0c3deaf6 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -538,11 +538,6 @@ struct _xfer_spec { @@ -1627,7 +1872,7 @@ index 23fdb826c6e8..51aa1de88007 100644 enum pl330_cond cond, u8 peri) { -From e8316771f06dfd265999bfd43301329c6955fb24 Mon Sep 17 00:00:00 2001 +From 66625effb6e47117c803249fc0d843eff367f32b Mon Sep 17 00:00:00 2001 From: Arvind Yadav Date: Wed, 23 Aug 2017 21:57:31 +0530 Subject: [PATCH] UPSTREAM: dmaengine: pl330: constify amba_id @@ -1643,10 +1888,10 @@ Signed-off-by: Vinod Koul 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index 51aa1de88007..defec1b4bc2f 100644 +index bd4a0c3deaf6..63ffb8d1f885 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -2970,7 +2970,7 @@ static int pl330_remove(struct amba_device *adev) +@@ -2976,7 +2976,7 @@ static int pl330_remove(struct amba_device *adev) return 0; } @@ -1656,7 +1901,7 @@ index 51aa1de88007..defec1b4bc2f 100644 .id = 0x00041330, .mask = 0x000fffff, -From 784e0ffe42096a6c6119668a631338c6cff43374 Mon Sep 17 00:00:00 2001 +From 32b006c4a5e5af627e8daa773a49da36a5deeced Mon Sep 17 00:00:00 2001 From: Alexander Kochetkov Date: Wed, 4 Oct 2017 14:37:23 +0300 Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix descriptor allocation fail @@ -1687,10 +1932,10 @@ Signed-off-by: Vinod Koul 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c -index defec1b4bc2f..76f514efe9d0 100644 +index 63ffb8d1f885..257492238cea 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c -@@ -2338,7 +2338,8 @@ static inline void _init_desc(struct dma_pl330_desc *desc) +@@ -2344,7 +2344,8 @@ static inline void _init_desc(struct dma_pl330_desc *desc) } /* Returns the number of descriptors added to the DMAC pool */ @@ -1700,7 +1945,7 @@ index defec1b4bc2f..76f514efe9d0 100644 { struct dma_pl330_desc *desc; unsigned long flags; -@@ -2348,27 +2349,28 @@ static int add_desc(struct pl330_dmac *pl330, gfp_t flg, int count) +@@ -2354,27 +2355,28 @@ static int add_desc(struct pl330_dmac *pl330, gfp_t flg, int count) if (!desc) return 0; @@ -1736,7 +1981,7 @@ index defec1b4bc2f..76f514efe9d0 100644 struct dma_pl330_desc, node); list_del_init(&desc->node); -@@ -2377,7 +2379,7 @@ static struct dma_pl330_desc *pluck_desc(struct pl330_dmac *pl330) +@@ -2383,7 +2385,7 @@ static struct dma_pl330_desc *pluck_desc(struct pl330_dmac *pl330) desc->txd.callback = NULL; } @@ -1745,7 +1990,7 @@ index defec1b4bc2f..76f514efe9d0 100644 return desc; } -@@ -2389,20 +2391,18 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) +@@ -2395,20 +2397,18 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) struct dma_pl330_desc *desc; /* Pluck one desc from the pool of DMAC */ @@ -1773,7 +2018,7 @@ index defec1b4bc2f..76f514efe9d0 100644 } /* Initialize the descriptor */ -@@ -2815,7 +2815,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) +@@ -2821,7 +2821,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) spin_lock_init(&pl330->pool_lock); /* Create a descriptor pool of default size */ @@ -1783,3 +2028,392 @@ index defec1b4bc2f..76f514efe9d0 100644 dev_warn(&adev->dev, "unable to allocate desc\n"); INIT_LIST_HEAD(&pd->channels); + +From 60af02189c1e3cc3d8e957754ac0f97dc20655f5 Mon Sep 17 00:00:00 2001 +From: Frank Mori Hess +Date: Wed, 18 Apr 2018 20:31:06 -0400 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: flush before wait, and add dev + burst support. + +Do DMAFLUSHP _before_ the first DMAWFP to ensure controller +and peripheral are in agreement about dma request state before first +transfer. Add support for burst transfers to/from peripherals. In the new +scheme, the controller does as many burst transfers as it can then +transfers the remaining dregs with either single transfers for +peripherals, or with a reduced size burst for memory-to-memory transfers. + +Signed-off-by: Frank Mori Hess +Tested-by: Frank Mori Hess +Signed-off-by: Vinod Koul +(cherry picked from commit 1d48745b192a7a45bbdd3557b4c039609569ca41) +--- + drivers/dma/pl330.c | 209 +++++++++++++++++++++++++++++++++++++++------------- + 1 file changed, 159 insertions(+), 50 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 257492238cea..fd48c031ead8 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + #include "dmaengine.h" + #define PL330_MAX_CHAN 8 +@@ -1095,51 +1096,96 @@ static inline int _ldst_memtomem(unsigned dry_run, u8 buf[], + return off; + } + +-static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, +- u8 buf[], const struct _xfer_spec *pxs, +- int cyc) ++static u32 _emit_load(unsigned int dry_run, u8 buf[], ++ enum pl330_cond cond, enum dma_transfer_direction direction, ++ u8 peri) + { + int off = 0; +- enum pl330_cond cond; + +- if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) +- cond = BURST; +- else +- cond = SINGLE; ++ switch (direction) { ++ case DMA_MEM_TO_MEM: ++ /* fall through */ ++ case DMA_MEM_TO_DEV: ++ off += _emit_LD(dry_run, &buf[off], cond); ++ break; + +- while (cyc--) { +- off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); +- off += _emit_LDP(dry_run, &buf[off], cond, pxs->desc->peri); +- off += _emit_ST(dry_run, &buf[off], ALWAYS); ++ case DMA_DEV_TO_MEM: ++ if (cond == ALWAYS) { ++ off += _emit_LDP(dry_run, &buf[off], SINGLE, ++ peri); ++ off += _emit_LDP(dry_run, &buf[off], BURST, ++ peri); ++ } else { ++ off += _emit_LDP(dry_run, &buf[off], cond, ++ peri); ++ } ++ break; + +- if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) +- off += _emit_FLUSHP(dry_run, &buf[off], +- pxs->desc->peri); ++ default: ++ /* this code should be unreachable */ ++ WARN_ON(1); ++ break; + } + + return off; + } + +-static inline int _ldst_memtodev(struct pl330_dmac *pl330, ++static inline u32 _emit_store(unsigned int dry_run, u8 buf[], ++ enum pl330_cond cond, enum dma_transfer_direction direction, ++ u8 peri) ++{ ++ int off = 0; ++ ++ switch (direction) { ++ case DMA_MEM_TO_MEM: ++ /* fall through */ ++ case DMA_DEV_TO_MEM: ++ off += _emit_ST(dry_run, &buf[off], cond); ++ break; ++ ++ case DMA_MEM_TO_DEV: ++ if (cond == ALWAYS) { ++ off += _emit_STP(dry_run, &buf[off], SINGLE, ++ peri); ++ off += _emit_STP(dry_run, &buf[off], BURST, ++ peri); ++ } else { ++ off += _emit_STP(dry_run, &buf[off], cond, ++ peri); ++ } ++ break; ++ ++ default: ++ /* this code should be unreachable */ ++ WARN_ON(1); ++ break; ++ } ++ ++ return off; ++} ++ ++static inline int _ldst_peripheral(struct pl330_dmac *pl330, + unsigned dry_run, u8 buf[], +- const struct _xfer_spec *pxs, int cyc) ++ const struct _xfer_spec *pxs, int cyc, ++ enum pl330_cond cond) + { + int off = 0; +- enum pl330_cond cond; + + if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) + cond = BURST; +- else +- cond = SINGLE; + ++ /* ++ * do FLUSHP at beginning to clear any stale dma requests before the ++ * first WFP. ++ */ ++ if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) ++ off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); + while (cyc--) { + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); +- off += _emit_LD(dry_run, &buf[off], ALWAYS); +- off += _emit_STP(dry_run, &buf[off], cond, pxs->desc->peri); +- +- if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) +- off += _emit_FLUSHP(dry_run, &buf[off], +- pxs->desc->peri); ++ off += _emit_load(dry_run, &buf[off], cond, pxs->desc->rqtype, ++ pxs->desc->peri); ++ off += _emit_store(dry_run, &buf[off], cond, pxs->desc->rqtype, ++ pxs->desc->peri); + } + + return off; +@@ -1149,19 +1195,65 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], + const struct _xfer_spec *pxs, int cyc) + { + int off = 0; ++ enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; + + switch (pxs->desc->rqtype) { + case DMA_MEM_TO_DEV: +- off += _ldst_memtodev(pl330, dry_run, &buf[off], pxs, cyc); +- break; ++ /* fall through */ + case DMA_DEV_TO_MEM: +- off += _ldst_devtomem(pl330, dry_run, &buf[off], pxs, cyc); ++ off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, cyc, ++ cond); + break; ++ + case DMA_MEM_TO_MEM: + off += _ldst_memtomem(dry_run, &buf[off], pxs, cyc); + break; ++ ++ default: ++ /* this code should be unreachable */ ++ WARN_ON(1); ++ break; ++ } ++ ++ return off; ++} ++ ++/* ++ * transfer dregs with single transfers to peripheral, or a reduced size burst ++ * for mem-to-mem. ++ */ ++static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[], ++ const struct _xfer_spec *pxs, int transfer_length) ++{ ++ int off = 0; ++ int dregs_ccr; ++ ++ if (transfer_length == 0) ++ return off; ++ ++ switch (pxs->desc->rqtype) { ++ case DMA_MEM_TO_DEV: ++ /* fall through */ ++ case DMA_DEV_TO_MEM: ++ off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, ++ transfer_length, SINGLE); ++ break; ++ ++ case DMA_MEM_TO_MEM: ++ dregs_ccr = pxs->ccr; ++ dregs_ccr &= ~((0xf << CC_SRCBRSTLEN_SHFT) | ++ (0xf << CC_DSTBRSTLEN_SHFT)); ++ dregs_ccr |= (((transfer_length - 1) & 0xf) << ++ CC_SRCBRSTLEN_SHFT); ++ dregs_ccr |= (((transfer_length - 1) & 0xf) << ++ CC_DSTBRSTLEN_SHFT); ++ off += _emit_MOV(dry_run, &buf[off], CCR, dregs_ccr); ++ off += _ldst_memtomem(dry_run, &buf[off], pxs, 1); ++ break; ++ + default: +- off += 0x40000000; /* Scare off the Client */ ++ /* this code should be unreachable */ ++ WARN_ON(1); + break; + } + +@@ -1257,6 +1349,8 @@ static inline int _setup_loops(struct pl330_dmac *pl330, + struct pl330_xfer *x = &pxs->desc->px; + u32 ccr = pxs->ccr; + unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); ++ int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) / ++ BRST_SIZE(ccr); + int off = 0; + + while (bursts) { +@@ -1264,6 +1358,7 @@ static inline int _setup_loops(struct pl330_dmac *pl330, + off += _loop(pl330, dry_run, &buf[off], &c, pxs); + bursts -= c; + } ++ off += _dregs(pl330, dry_run, &buf[off], pxs, num_dregs); + + return off; + } +@@ -1295,7 +1390,6 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + struct _xfer_spec *pxs) + { + struct _pl330_req *req = &thrd->req[index]; +- struct pl330_xfer *x; + u8 *buf = req->mc_cpu; + int off = 0; + +@@ -1304,11 +1398,6 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + /* DMAMOV CCR, ccr */ + off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); + +- x = &pxs->desc->px; +- /* Error if xfer length is not aligned at burst size */ +- if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) +- return -EINVAL; +- + off += _setup_xfer(pl330, dry_run, &buf[off], pxs); + + /* DMASEV peripheral/event */ +@@ -1366,6 +1455,20 @@ static int pl330_submit_req(struct pl330_thread *thrd, + u32 ccr; + int ret = 0; + ++ switch (desc->rqtype) { ++ case DMA_MEM_TO_DEV: ++ break; ++ ++ case DMA_DEV_TO_MEM: ++ break; ++ ++ case DMA_MEM_TO_MEM: ++ break; ++ ++ default: ++ return -ENOTSUPP; ++ } ++ + if (pl330->state == DYING + || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) { + dev_info(thrd->dmac->ddma.dev, "%s:%d\n", +@@ -2060,6 +2163,18 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan) + return 1; + } + ++static int fixup_burst_len(int max_burst_len, int quirks) ++{ ++ if (quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ++ return 1; ++ else if (max_burst_len > PL330_MAX_BURST) ++ return PL330_MAX_BURST; ++ else if (max_burst_len < 1) ++ return 1; ++ else ++ return max_burst_len; ++} ++ + static int pl330_config(struct dma_chan *chan, + struct dma_slave_config *slave_config) + { +@@ -2070,15 +2185,15 @@ static int pl330_config(struct dma_chan *chan, + pch->fifo_addr = slave_config->dst_addr; + if (slave_config->dst_addr_width) + pch->burst_sz = __ffs(slave_config->dst_addr_width); +- if (slave_config->dst_maxburst) +- pch->burst_len = slave_config->dst_maxburst; ++ pch->burst_len = fixup_burst_len(slave_config->dst_maxburst, ++ pch->dmac->quirks); + } else if (slave_config->direction == DMA_DEV_TO_MEM) { + if (slave_config->src_addr) + pch->fifo_addr = slave_config->src_addr; + if (slave_config->src_addr_width) + pch->burst_sz = __ffs(slave_config->src_addr_width); +- if (slave_config->src_maxburst) +- pch->burst_len = slave_config->src_maxburst; ++ pch->burst_len = fixup_burst_len(slave_config->src_maxburst, ++ pch->dmac->quirks); + } + + return 0; +@@ -2471,14 +2586,8 @@ static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len) + burst_len >>= desc->rqcfg.brst_size; + + /* src/dst_burst_len can't be more than 16 */ +- if (burst_len > 16) +- burst_len = 16; +- +- while (burst_len > 1) { +- if (!(len % (burst_len << desc->rqcfg.brst_size))) +- break; +- burst_len--; +- } ++ if (burst_len > PL330_MAX_BURST) ++ burst_len = PL330_MAX_BURST; + + return burst_len; + } +@@ -2547,7 +2656,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + + desc->rqtype = direction; + desc->rqcfg.brst_size = pch->burst_sz; +- desc->rqcfg.brst_len = 1; ++ desc->rqcfg.brst_len = pch->burst_len; + desc->bytes_requested = period_len; + fill_px(&desc->px, dst, src, period_len); + +@@ -2692,7 +2801,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, + } + + desc->rqcfg.brst_size = pch->burst_sz; +- desc->rqcfg.brst_len = 1; ++ desc->rqcfg.brst_len = pch->burst_len; + desc->rqtype = direction; + desc->bytes_requested = sg_dma_len(sg); + } + +From b970d8fda69d56f0c9b59e436493bbbc6448ef10 Mon Sep 17 00:00:00 2001 +From: Marek Szyprowski +Date: Tue, 19 Jun 2018 15:20:50 +0200 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: report BURST residue granularity + +The reported residue is already calculated in BURST unit granularity, so +advertise this capability properly to other devices in the system. + +Fixes: aee4d1fac887 ("dmaengine: pl330: improve pl330_tx_status() function") +Signed-off-by: Marek Szyprowski +Signed-off-by: Vinod Koul +(cherry picked from commit e3f329c600033f011a978a8bc4ddb1e2e94c4f4d) +--- + drivers/dma/pl330.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index fd48c031ead8..029bd0444137 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2984,7 +2984,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + pd->src_addr_widths = PL330_DMA_BUSWIDTHS; + pd->dst_addr_widths = PL330_DMA_BUSWIDTHS; + pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); +- pd->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; ++ pd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; + pd->max_burst = ((pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ? + 1 : PL330_MAX_BURST); + diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-vcodec.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-vcodec.patch new file mode 100644 index 0000000000..2de4f79a0d --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-vcodec.patch @@ -0,0 +1,945 @@ +From 499f15c3237602cca9ccebe902d31bd7404fb2db Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Thu, 5 Jul 2018 00:14:14 +0200 +Subject: [PATCH] Revert "drm/drm-prime: cache dma_buf import context" + +This reverts commit 5a90381e5acc2cf32be03099a14d05d4362b3348. +--- + drivers/gpu/drm/drm_prime.c | 46 ++--------------------------- + drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 1 + + 2 files changed, 3 insertions(+), 44 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index 6f207d5946dc..6b7417a194a3 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -71,11 +71,6 @@ struct drm_prime_attachment { + enum dma_data_direction dir; + }; + +-struct drm_prime_callback_data { +- struct drm_gem_object *obj; +- struct sg_table *sgt; +-}; +- + static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv, + struct dma_buf *dma_buf, uint32_t handle) + { +@@ -524,23 +519,6 @@ out_unlock: + } + EXPORT_SYMBOL(drm_gem_prime_handle_to_fd); + +-static void drm_gem_prime_dmabuf_release_callback(void *data) +-{ +- struct drm_prime_callback_data *cb_data = data; +- +- if (cb_data && cb_data->obj && cb_data->obj->import_attach) { +- struct dma_buf_attachment *attach = cb_data->obj->import_attach; +- struct sg_table *sgt = cb_data->sgt; +- +- if (sgt) +- dma_buf_unmap_attachment(attach, sgt, +- DMA_BIDIRECTIONAL); +- dma_buf_detach(attach->dmabuf, attach); +- drm_gem_object_unreference_unlocked(cb_data->obj); +- kfree(cb_data); +- } +-} +- + /** + * drm_gem_prime_import - helper library implementation of the import callback + * @dev: drm_device to import into +@@ -555,7 +533,6 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev, + struct dma_buf_attachment *attach; + struct sg_table *sgt; + struct drm_gem_object *obj; +- struct drm_prime_callback_data *cb_data; + int ret; + + if (dma_buf->ops == &drm_gem_prime_dmabuf_ops) { +@@ -570,13 +547,6 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev, + } + } + +- cb_data = dma_buf_get_release_callback_data(dma_buf, +- drm_gem_prime_dmabuf_release_callback); +- if (cb_data && cb_data->obj && cb_data->obj->dev == dev) { +- drm_gem_object_reference(cb_data->obj); +- return cb_data->obj; +- } +- + if (!dev->driver->gem_prime_import_sg_table) + return ERR_PTR(-EINVAL); + +@@ -585,16 +555,11 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev, + return ERR_CAST(attach); + + get_dma_buf(dma_buf); +- cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL); +- if (!cb_data) { +- ret = -ENOMEM; +- goto fail_detach; +- } + + sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + if (IS_ERR(sgt)) { + ret = PTR_ERR(sgt); +- goto fail_free; ++ goto fail_detach; + } + + obj = dev->driver->gem_prime_import_sg_table(dev, attach, sgt); +@@ -602,20 +567,13 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev, + ret = PTR_ERR(obj); + goto fail_unmap; + } ++ + obj->import_attach = attach; +- cb_data->obj = obj; +- cb_data->sgt = sgt; +- dma_buf_set_release_callback(dma_buf, +- drm_gem_prime_dmabuf_release_callback, cb_data); +- dma_buf_put(dma_buf); +- drm_gem_object_reference(obj); + + return obj; + + fail_unmap: + dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); +-fail_free: +- kfree(cb_data); + fail_detach: + dma_buf_detach(dma_buf, attach); + dma_buf_put(dma_buf); +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c +index 273a52b5eb66..85bbd19c87b0 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c +@@ -649,6 +649,7 @@ void rockchip_gem_free_object(struct drm_gem_object *obj) + dma_unmap_sg(drm->dev, rk_obj->sgt->sgl, + rk_obj->sgt->nents, DMA_BIDIRECTIONAL); + } ++ drm_prime_gem_destroy(obj, rk_obj->sgt); + } else { + rockchip_gem_free_buf(rk_obj); + } + +From 3dd29985f5f1cec249c833b1b2ca33e131f79825 Mon Sep 17 00:00:00 2001 +From: Rob Clark +Date: Thu, 9 Jun 2016 15:29:19 -0400 +Subject: [PATCH] UPSTREAM: drm/prime: fix error path deadlock fail + +There were a couple messed up things about this fail path. +(1) it would drop object_name_lock twice +(2) drm_gem_handle_delete() (in drm_gem_remove_prime_handles()) + needs to grab prime_lock + +Reported-by: Alex Deucher +Signed-off-by: Rob Clark +Reviewed-by: Alex Deucher +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/1465500559-17873-1-git-send-email-robdclark@gmail.com +(cherry picked from commit bd6e2732f0e2894ce792f344c41fc32591436fe3) +--- + drivers/gpu/drm/drm_prime.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index 6b7417a194a3..d8d85286764d 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -628,7 +628,7 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev, + get_dma_buf(dma_buf); + } + +- /* drm_gem_handle_create_tail unlocks dev->object_name_lock. */ ++ /* _handle_create_tail unconditionally unlocks dev->object_name_lock. */ + ret = drm_gem_handle_create_tail(file_priv, obj, handle); + drm_gem_object_unreference_unlocked(obj); + if (ret) +@@ -636,11 +636,10 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev, + + ret = drm_prime_add_buf_handle(&file_priv->prime, + dma_buf, *handle); ++ mutex_unlock(&file_priv->prime.lock); + if (ret) + goto fail; + +- mutex_unlock(&file_priv->prime.lock); +- + dma_buf_put(dma_buf); + + return 0; +@@ -650,11 +649,14 @@ fail: + * to detach.. which seems ok.. + */ + drm_gem_handle_delete(file_priv, *handle); ++ dma_buf_put(dma_buf); ++ return ret; ++ + out_unlock: + mutex_unlock(&dev->object_name_lock); + out_put: +- dma_buf_put(dma_buf); + mutex_unlock(&file_priv->prime.lock); ++ dma_buf_put(dma_buf); + return ret; + } + EXPORT_SYMBOL(drm_gem_prime_fd_to_handle); + +From a689159fac372a8210d2c63ba63da3a097388b97 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Mon, 26 Sep 2016 21:44:14 +0100 +Subject: [PATCH] UPSTREAM: drm: Convert prime dma-buf <-> handle to rbtree + +Currently we use a linear walk to lookup a handle and return a dma-buf, +and vice versa. A long overdue TODO task is to convert that to a +hashtable. Since the initial implementation of dma-buf/prime, we now +have resizeable hashtables we can use (and now a future task is to RCU +enable the lookup!). However, this patch opts to use an rbtree instead +to provide O(lgN) lookups (and insertion, deletion). rbtrees were chosen +over using the RCU backed resizable hashtable to firstly avoid the +reallocations (rbtrees can be embedded entirely within the parent +struct) and to favour simpler code with predictable worst case +behaviour. In simple testing, the difference between using the constant +lookup and insertion of the rhashtable and the rbtree was less than 10% +of the wall time (igt/benchmarks/prime_lookup) - both are dramatic +improvements over the existing linear lists. + +v2: Favour rbtree over rhashtable + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94631 +Signed-off-by: Chris Wilson +Cc: Sean Paul +Cc: David Herrmann +Reviewed-by: David Herrmann +Reviewed-by: Sean Paul +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20160926204414.23222-1-chris@chris-wilson.co.uk +(cherry picked from commit 077675c1e8a193a6355d4a7c8c7bf63be310b472) +--- + drivers/gpu/drm/drm_prime.c | 85 +++++++++++++++++++++++++++++++++++++++------ + include/drm/drmP.h | 5 +-- + 2 files changed, 77 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index d8d85286764d..4c49e736bc9c 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -28,6 +28,7 @@ + + #include + #include ++#include + #include + #include + +@@ -61,9 +62,11 @@ + */ + + struct drm_prime_member { +- struct list_head entry; + struct dma_buf *dma_buf; + uint32_t handle; ++ ++ struct rb_node dmabuf_rb; ++ struct rb_node handle_rb; + }; + + struct drm_prime_attachment { +@@ -75,6 +78,7 @@ static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv, + struct dma_buf *dma_buf, uint32_t handle) + { + struct drm_prime_member *member; ++ struct rb_node **p, *rb; + + member = kmalloc(sizeof(*member), GFP_KERNEL); + if (!member) +@@ -83,18 +87,56 @@ static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv, + get_dma_buf(dma_buf); + member->dma_buf = dma_buf; + member->handle = handle; +- list_add(&member->entry, &prime_fpriv->head); ++ ++ rb = NULL; ++ p = &prime_fpriv->dmabufs.rb_node; ++ while (*p) { ++ struct drm_prime_member *pos; ++ ++ rb = *p; ++ pos = rb_entry(rb, struct drm_prime_member, dmabuf_rb); ++ if (dma_buf > pos->dma_buf) ++ p = &rb->rb_right; ++ else ++ p = &rb->rb_left; ++ } ++ rb_link_node(&member->dmabuf_rb, rb, p); ++ rb_insert_color(&member->dmabuf_rb, &prime_fpriv->dmabufs); ++ ++ rb = NULL; ++ p = &prime_fpriv->handles.rb_node; ++ while (*p) { ++ struct drm_prime_member *pos; ++ ++ rb = *p; ++ pos = rb_entry(rb, struct drm_prime_member, handle_rb); ++ if (handle > pos->handle) ++ p = &rb->rb_right; ++ else ++ p = &rb->rb_left; ++ } ++ rb_link_node(&member->handle_rb, rb, p); ++ rb_insert_color(&member->handle_rb, &prime_fpriv->handles); ++ + return 0; + } + + static struct dma_buf *drm_prime_lookup_buf_by_handle(struct drm_prime_file_private *prime_fpriv, + uint32_t handle) + { +- struct drm_prime_member *member; ++ struct rb_node *rb; ++ ++ rb = prime_fpriv->handles.rb_node; ++ while (rb) { ++ struct drm_prime_member *member; + +- list_for_each_entry(member, &prime_fpriv->head, entry) { ++ member = rb_entry(rb, struct drm_prime_member, handle_rb); + if (member->handle == handle) + return member->dma_buf; ++ else if (member->handle < handle) ++ rb = rb->rb_right; ++ else ++ rb = rb->rb_left; + } + + return NULL; +@@ -104,14 +146,23 @@ static int drm_prime_lookup_buf_handle(struct drm_prime_file_private *prime_fpri + struct dma_buf *dma_buf, + uint32_t *handle) + { +- struct drm_prime_member *member; ++ struct rb_node *rb; ++ ++ rb = prime_fpriv->dmabufs.rb_node; ++ while (rb) { ++ struct drm_prime_member *member; + +- list_for_each_entry(member, &prime_fpriv->head, entry) { ++ member = rb_entry(rb, struct drm_prime_member, dmabuf_rb); + if (member->dma_buf == dma_buf) { + *handle = member->handle; + return 0; ++ } else if (member->dma_buf < dma_buf) { ++ rb = rb->rb_right; ++ } else { ++ rb = rb->rb_left; + } + } ++ + return -ENOENT; + } + +@@ -166,13 +217,24 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf, + void drm_prime_remove_buf_handle_locked(struct drm_prime_file_private *prime_fpriv, + struct dma_buf *dma_buf) + { +- struct drm_prime_member *member, *safe; ++ struct rb_node *rb; + +- list_for_each_entry_safe(member, safe, &prime_fpriv->head, entry) { ++ rb = prime_fpriv->dmabufs.rb_node; ++ while (rb) { ++ struct drm_prime_member *member; ++ ++ member = rb_entry(rb, struct drm_prime_member, dmabuf_rb); + if (member->dma_buf == dma_buf) { ++ rb_erase(&member->handle_rb, &prime_fpriv->handles); ++ rb_erase(&member->dmabuf_rb, &prime_fpriv->dmabufs); ++ + dma_buf_put(dma_buf); +- list_del(&member->entry); + kfree(member); ++ return; ++ } else if (member->dma_buf < dma_buf) { ++ rb = rb->rb_right; ++ } else { ++ rb = rb->rb_left; + } + } + } +@@ -794,12 +856,13 @@ EXPORT_SYMBOL(drm_prime_gem_destroy); + + void drm_prime_init_file_private(struct drm_prime_file_private *prime_fpriv) + { +- INIT_LIST_HEAD(&prime_fpriv->head); + mutex_init(&prime_fpriv->lock); ++ prime_fpriv->dmabufs = RB_ROOT; ++ prime_fpriv->handles = RB_ROOT; + } + + void drm_prime_destroy_file_private(struct drm_prime_file_private *prime_fpriv) + { + /* by now drm_gem_release should've made sure the list is empty */ +- WARN_ON(!list_empty(&prime_fpriv->head)); ++ WARN_ON(!RB_EMPTY_ROOT(&prime_fpriv->dmabufs)); + } +diff --git a/include/drm/drmP.h b/include/drm/drmP.h +index 04edcd32b409..93da65df2e7e 100644 +--- a/include/drm/drmP.h ++++ b/include/drm/drmP.h +@@ -51,6 +51,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -365,10 +366,10 @@ struct drm_pending_event { + void (*destroy)(struct drm_pending_event *event); + }; + +-/* initial implementaton using a linked list - todo hashtab */ + struct drm_prime_file_private { +- struct list_head head; + struct mutex lock; ++ struct rb_root dmabufs; ++ struct rb_root handles; + }; + + /** File private data */ + +From f977098a9a02ac2df267eafe860370cb4c407d69 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Wed, 5 Oct 2016 13:21:44 +0100 +Subject: [PATCH] UPSTREAM: drm/prime: Take a ref on the drm_dev when exporting + a dma_buf +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +dma_buf may live a long time, longer than the last direct user of the +driver. We already hold a reference to the owner module (that prevents +the object code from disappearing), but there is no reference to the +drm_dev - so the pointers to the driver backend themselves may vanish. + +v2: Resist temptation to fix the bug in armada_gem.c not setting the +correct flags on the exported dma-buf (it should pass the flags through +and not be arbitrarily setting O_RDWR). + +Use a common wrapper for exporting the dmabuf and acquiring the +reference to the drm_device. + +Testcase: igt/vgem_basic/unload +Suggested-by: Daniel Vetter +Signed-off-by: Chris Wilson +Cc: Petri Latvala +Cc: Daniel Vetter +Cc: stable@vger.kernel.org +Tested-by: Petri Latvala +Reviewed-by: Christian König +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20161005122145.1507-2-chris@chris-wilson.co.uk +(cherry picked from commit a4fce9cb782ad340ee5576a38e934e5e75832dc6) +--- + drivers/gpu/drm/armada/armada_gem.c | 2 +- + drivers/gpu/drm/drm_prime.c | 30 +++++++++++++++++++++++++++++- + drivers/gpu/drm/i915/i915_gem_dmabuf.c | 2 +- + drivers/gpu/drm/tegra/gem.c | 2 +- + drivers/gpu/drm/udl/udl_dmabuf.c | 2 +- + include/drm/drmP.h | 4 ++++ + 6 files changed, 37 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/armada/armada_gem.c b/drivers/gpu/drm/armada/armada_gem.c +index 60a688ef81c7..cd5bb991f49a 100644 +--- a/drivers/gpu/drm/armada/armada_gem.c ++++ b/drivers/gpu/drm/armada/armada_gem.c +@@ -546,7 +546,7 @@ armada_gem_prime_export(struct drm_device *dev, struct drm_gem_object *obj, + exp_info.flags = O_RDWR; + exp_info.priv = obj; + +- return dma_buf_export(&exp_info); ++ return drm_gem_dmabuf_export(dev, &exp_info); + } + + struct drm_gem_object * +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index 4c49e736bc9c..94b4872255c8 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -283,19 +283,47 @@ static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach, + /* nothing to be done here */ + } + ++/** ++ * drm_gem_dmabuf_export - dma_buf export implementation for GEM ++ * @dma_buf: buffer to be exported ++ * ++ * This wraps dma_buf_export() for use by generic GEM drivers that are using ++ * drm_gem_dmabuf_release(). In addition to calling dma_buf_export(), we take ++ * a reference to the drm_device which is released by drm_gem_dmabuf_release(). ++ * ++ * Returns the new dmabuf. ++ */ ++struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev, ++ struct dma_buf_export_info *exp_info) ++{ ++ struct dma_buf *dma_buf; ++ ++ dma_buf = dma_buf_export(exp_info); ++ if (!IS_ERR(dma_buf)) ++ drm_dev_ref(dev); ++ ++ return dma_buf; ++} ++EXPORT_SYMBOL(drm_gem_dmabuf_export); ++ + /** + * drm_gem_dmabuf_release - dma_buf release implementation for GEM + * @dma_buf: buffer to be released + * + * Generic release function for dma_bufs exported as PRIME buffers. GEM drivers + * must use this in their dma_buf ops structure as the release callback. ++ * drm_gem_dmabuf_release() should be used in conjunction with ++ * drm_gem_dmabuf_export(). + */ + void drm_gem_dmabuf_release(struct dma_buf *dma_buf) + { + struct drm_gem_object *obj = dma_buf->priv; ++ struct drm_device *dev = obj->dev; + + /* drop the reference on the export fd holds */ + drm_gem_object_unreference_unlocked(obj); ++ ++ drm_dev_unref(dev); + } + EXPORT_SYMBOL(drm_gem_dmabuf_release); + +@@ -444,7 +472,7 @@ struct dma_buf *drm_gem_prime_export(struct drm_device *dev, + if (dev->driver->gem_prime_res_obj) + exp_info.resv = dev->driver->gem_prime_res_obj(obj); + +- return dma_buf_export(&exp_info); ++ return drm_gem_dmabuf_export(dev, &exp_info); + } + EXPORT_SYMBOL(drm_gem_prime_export); + +diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c +index e9c2bfd85b52..d4a021629bd6 100644 +--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c ++++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c +@@ -244,7 +244,7 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev, + return ERR_PTR(ret); + } + +- return dma_buf_export(&exp_info); ++ return drm_gem_dmabuf_export(dev, &exp_info); + } + + static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj) +diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c +index 01e16e146bfe..da06f1c1ee0f 100644 +--- a/drivers/gpu/drm/tegra/gem.c ++++ b/drivers/gpu/drm/tegra/gem.c +@@ -625,7 +625,7 @@ struct dma_buf *tegra_gem_prime_export(struct drm_device *drm, + exp_info.flags = flags; + exp_info.priv = gem; + +- return dma_buf_export(&exp_info); ++ return drm_gem_dmabuf_export(drm, &exp_info); + } + + struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm, +diff --git a/drivers/gpu/drm/udl/udl_dmabuf.c b/drivers/gpu/drm/udl/udl_dmabuf.c +index e2243edd1ce3..ac90ffdb5912 100644 +--- a/drivers/gpu/drm/udl/udl_dmabuf.c ++++ b/drivers/gpu/drm/udl/udl_dmabuf.c +@@ -209,7 +209,7 @@ struct dma_buf *udl_gem_prime_export(struct drm_device *dev, + exp_info.flags = flags; + exp_info.priv = obj; + +- return dma_buf_export(&exp_info); ++ return drm_gem_dmabuf_export(dev, &exp_info); + } + + static int udl_prime_create(struct drm_device *dev, +diff --git a/include/drm/drmP.h b/include/drm/drmP.h +index 93da65df2e7e..4aba6478d718 100644 +--- a/include/drm/drmP.h ++++ b/include/drm/drmP.h +@@ -1124,6 +1124,8 @@ static inline int drm_debugfs_remove_files(const struct drm_info_list *files, + } + #endif + ++struct dma_buf_export_info; ++ + extern struct dma_buf *drm_gem_prime_export(struct drm_device *dev, + struct drm_gem_object *obj, + int flags); +@@ -1134,6 +1136,8 @@ extern struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev, + struct dma_buf *dma_buf); + extern int drm_gem_prime_fd_to_handle(struct drm_device *dev, + struct drm_file *file_priv, int prime_fd, uint32_t *handle); ++struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev, ++ struct dma_buf_export_info *exp_info); + extern void drm_gem_dmabuf_release(struct dma_buf *dma_buf); + + extern int drm_prime_sg_to_page_addr_arrays(struct sg_table *sgt, struct page **pages, + +From f30ee0d19425a6c21a9959513e482282ba08dd6a Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Wed, 7 Dec 2016 21:45:27 +0000 +Subject: [PATCH] UPSTREAM: drm: Take ownership of the dmabuf->obj when + exporting + +Currently the reference for the dmabuf->obj is incremented for the +dmabuf in drm_gem_prime_handle_to_fd() (at the high level userspace +interface), but is released in drm_gem_dmabuf_release() (the lowlevel +handler). Improve the symmetry of the dmabuf->obj ownership by acquiring +the reference in drm_gem_dmabuf_export(). This makes it easier to use +the prime functions directly. + +Signed-off-by: Chris Wilson +[danvet: Update kerneldoc.] +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20161207214527.22533-1-chris@chris-wilson.co.uk +(cherry picked from commit 72a93e8dd52c9feea42f1258d555e6070680a347) +--- + drivers/gpu/drm/drm_prime.c | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index 94b4872255c8..dbd34fa7f71c 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -289,7 +289,8 @@ static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach, + * + * This wraps dma_buf_export() for use by generic GEM drivers that are using + * drm_gem_dmabuf_release(). In addition to calling dma_buf_export(), we take +- * a reference to the drm_device which is released by drm_gem_dmabuf_release(). ++ * a reference to the &drm_device and the exported &drm_gem_object (stored in ++ * exp_info->priv) which is released by drm_gem_dmabuf_release(). + * + * Returns the new dmabuf. + */ +@@ -299,8 +300,11 @@ struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev, + struct dma_buf *dma_buf; + + dma_buf = dma_buf_export(exp_info); +- if (!IS_ERR(dma_buf)) +- drm_dev_ref(dev); ++ if (IS_ERR(dma_buf)) ++ return dma_buf; ++ ++ drm_dev_ref(dev); ++ drm_gem_object_reference(exp_info->priv); + + return dma_buf; + } +@@ -503,8 +507,6 @@ static struct dma_buf *export_and_register_object(struct drm_device *dev, + */ + obj->dma_buf = dmabuf; + get_dma_buf(obj->dma_buf); +- /* Grab a new ref since the callers is now used by the dma-buf */ +- drm_gem_object_reference(obj); + + return dmabuf; + } + +From a1fe1ad6076ec27f60555a9393f40959cea94bff Mon Sep 17 00:00:00 2001 +From: Lucas Stach +Date: Thu, 30 Nov 2017 18:34:28 +0100 +Subject: [PATCH] UPSTREAM: drm/prime: skip CPU sync in map/unmap dma_buf + +Dma-bufs should already be device coherent, as they are only pulled in the +CPU domain via the begin/end cpu_access calls. As we cache the mapping set +up by dma_map_sg a CPU sync at this point will not actually guarantee proper +coherency on non-coherent architectures, so we can as well stop pretending. + +This is an important performance fix for architectures which need explicit +cache synchronization and userspace doing lots of dma-buf imports. +Improves Weston on Etnaviv performance 5x, where before this patch > 90% +of Weston CPU time was spent synchronizing caches for buffers which are +already device coherent. + +Signed-off-by: Lucas Stach +Reviewed-by: Chris Wilson +Signed-off-by: Daniel Vetter +Link: https://patchwork.freedesktop.org/patch/msgid/20171130173428.8666-1-l.stach@pengutronix.de +(cherry picked from commit ca0e68e21aae10220eff71a297e7d794425add77) +--- + drivers/gpu/drm/drm_prime.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index dbd34fa7f71c..133362279591 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -203,9 +203,12 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf, + + sgt = prime_attach->sgt; + if (sgt) { ++ DEFINE_DMA_ATTRS(attrs); ++ dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); + if (prime_attach->dir != DMA_NONE) +- dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, +- prime_attach->dir); ++ dma_unmap_sg_attrs(attach->dev, sgt->sgl, sgt->nents, ++ prime_attach->dir, ++ &attrs); + sg_free_table(sgt); + } + +@@ -263,7 +266,9 @@ static struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach, + sgt = obj->dev->driver->gem_prime_get_sg_table(obj); + + if (!IS_ERR(sgt)) { +- if (!dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir)) { ++ DEFINE_DMA_ATTRS(attrs); ++ dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); ++ if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir, &attrs)) { + sg_free_table(sgt); + kfree(sgt); + sgt = ERR_PTR(-ENOMEM); + +From bdfc956545f8292cf462a7feee96d811f5d34414 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= +Date: Tue, 27 Feb 2018 12:49:56 +0100 +Subject: [PATCH] UPSTREAM: drm/prime: fix potential race in drm_gem_map_detach +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Unpin the GEM object only after freeing the sg table. + +Signed-off-by: Christian König +Reviewed-by: Daniel Vetter +Acked-by: Roger He +Signed-off-by: Alex Deucher +Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-1-christian.koenig@amd.com +(cherry picked from commit 681066ec1d41e4b299146bada52cef846b323c04) +--- + drivers/gpu/drm/drm_prime.c | 36 ++++++++++++++++++------------------ + 1 file changed, 18 insertions(+), 18 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index 133362279591..95ecc69d03a0 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -193,28 +193,28 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf, + struct drm_prime_attachment *prime_attach = attach->priv; + struct drm_gem_object *obj = dma_buf->priv; + struct drm_device *dev = obj->dev; +- struct sg_table *sgt; +- +- if (dev->driver->gem_prime_unpin) +- dev->driver->gem_prime_unpin(obj); + +- if (!prime_attach) +- return; ++ if (prime_attach) { ++ struct sg_table *sgt = prime_attach->sgt; ++ ++ if (sgt) { ++ DEFINE_DMA_ATTRS(attrs); ++ dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); ++ if (prime_attach->dir != DMA_NONE) ++ dma_unmap_sg_attrs(attach->dev, sgt->sgl, ++ sgt->nents, ++ prime_attach->dir, ++ &attrs); ++ sg_free_table(sgt); ++ } + +- sgt = prime_attach->sgt; +- if (sgt) { +- DEFINE_DMA_ATTRS(attrs); +- dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); +- if (prime_attach->dir != DMA_NONE) +- dma_unmap_sg_attrs(attach->dev, sgt->sgl, sgt->nents, +- prime_attach->dir, +- &attrs); +- sg_free_table(sgt); ++ kfree(sgt); ++ kfree(prime_attach); ++ attach->priv = NULL; + } + +- kfree(sgt); +- kfree(prime_attach); +- attach->priv = NULL; ++ if (dev->driver->gem_prime_unpin) ++ dev->driver->gem_prime_unpin(obj); + } + + void drm_prime_remove_buf_handle_locked(struct drm_prime_file_private *prime_fpriv, + +From 54f13f6370c654d59a9a5938e5953888a65c1980 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= +Date: Tue, 27 Feb 2018 12:49:57 +0100 +Subject: [PATCH] UPSTREAM: drm/prime: make the pages array optional for + drm_prime_sg_to_page_addr_arrays +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Most of the time we only need the dma addresses. + +Signed-off-by: Christian König +Reviewed-by: Roger He +Signed-off-by: Alex Deucher +Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-2-christian.koenig@amd.com +Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-3-christian.koenig@amd.com +Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-4-christian.koenig@amd.com +Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-5-christian.koenig@amd.com +Link: https://patchwork.freedesktop.org/patch/msgid/BN6PR12MB18262C0DE9B5F07B9A42EAE7F2C60@BN6PR12MB1826.namprd12.prod.outlook.com +(cherry picked from commit 186ca446aea19e49d2e1433dd170c6e1c211a52a) +--- + drivers/gpu/drm/drm_prime.c | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c +index 95ecc69d03a0..7ea65c4105c1 100644 +--- a/drivers/gpu/drm/drm_prime.c ++++ b/drivers/gpu/drm/drm_prime.c +@@ -827,40 +827,40 @@ EXPORT_SYMBOL(drm_prime_pages_to_sg); + /** + * drm_prime_sg_to_page_addr_arrays - convert an sg table into a page array + * @sgt: scatter-gather table to convert +- * @pages: array of page pointers to store the page array in ++ * @pages: optional array of page pointers to store the page array in + * @addrs: optional array to store the dma bus address of each page +- * @max_pages: size of both the passed-in arrays ++ * @max_entries: size of both the passed-in arrays + * + * Exports an sg table into an array of pages and addresses. This is currently + * required by the TTM driver in order to do correct fault handling. + */ + int drm_prime_sg_to_page_addr_arrays(struct sg_table *sgt, struct page **pages, +- dma_addr_t *addrs, int max_pages) ++ dma_addr_t *addrs, int max_entries) + { + unsigned count; + struct scatterlist *sg; + struct page *page; +- u32 len; +- int pg_index; ++ u32 len, index; + dma_addr_t addr; + +- pg_index = 0; ++ index = 0; + for_each_sg(sgt->sgl, sg, sgt->nents, count) { + len = sg->length; + page = sg_page(sg); + addr = sg_dma_address(sg); + + while (len > 0) { +- if (WARN_ON(pg_index >= max_pages)) ++ if (WARN_ON(index >= max_entries)) + return -1; +- pages[pg_index] = page; ++ if (pages) ++ pages[index] = page; + if (addrs) +- addrs[pg_index] = addr; ++ addrs[index] = addr; + + page++; + addr += PAGE_SIZE; + len -= PAGE_SIZE; +- pg_index++; ++ index++; + } + } + return 0; + +From c5e39a7e46511dffadabea97e3d74310561d1ba0 Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Sat, 19 Aug 2017 13:05:58 +0100 +Subject: [PATCH] UPSTREAM: drm: Release driver tracking before making the + object available again +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This is the same bug as we fixed in commit f6cd7daecff5 ("drm: Release +driver references to handle before making it available again"), but now +the exposure is via the PRIME lookup tables. If we remove the +object/handle from the PRIME lut, then a new request for the same +object/fd will generate a new handle, thus for a short window that +object is known to userspace by two different handles. Fix this by +releasing the driver tracking before PRIME. + +Fixes: 0ff926c7d4f0 ("drm/prime: add exported buffers to current fprivs +imported buffer list (v2)") +Signed-off-by: Chris Wilson +Cc: David Airlie +Cc: Daniel Vetter +Cc: Rob Clark +Cc: Ville Syrjälä +Cc: Thierry Reding +Cc: stable@vger.kernel.org +Reviewed-by: Daniel Vetter +Signed-off-by: Joonas Lahtinen +Link: https://patchwork.freedesktop.org/patch/msgid/20170819120558.6465-1-chris@chris-wilson.co.uk +(cherry picked from commit d0a133f7f5bc3583e460ba6bb54474a50ada5201) +--- + drivers/gpu/drm/drm_gem.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c +index d7f39a03c2c9..966ea63581b1 100644 +--- a/drivers/gpu/drm/drm_gem.c ++++ b/drivers/gpu/drm/drm_gem.c +@@ -255,13 +255,13 @@ drm_gem_object_release_handle(int id, void *ptr, void *data) + struct drm_gem_object *obj = ptr; + struct drm_device *dev = obj->dev; + ++ if (dev->driver->gem_close_object) ++ dev->driver->gem_close_object(obj, file_priv); ++ + if (drm_core_check_feature(dev, DRIVER_PRIME)) + drm_gem_remove_prime_handles(obj, file_priv); + drm_vma_node_revoke(&obj->vma_node, file_priv->filp); + +- if (dev->driver->gem_close_object) +- dev->driver->gem_close_object(obj, file_priv); +- + drm_gem_object_handle_unreference_unlocked(obj); + + return 0; + +From 42f26aa9c8d429886b0af174b740f72741e571e2 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 17 Feb 2018 05:30:36 +0100 +Subject: [PATCH] vcodec: skip reduce freq + +--- + drivers/video/rockchip/vcodec/vcodec_service.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c +index 0f177d9ab4c2..903ea8554649 100644 +--- a/drivers/video/rockchip/vcodec/vcodec_service.c ++++ b/drivers/video/rockchip/vcodec/vcodec_service.c +@@ -1602,9 +1602,6 @@ static void try_set_reg(struct vpu_subdev_data *data) + reg_from_wait_to_run(pservice, reg); + reg_copy_to_hw(reg->data, reg); + } +- } else { +- if (pservice->hw_ops->reduce_freq) +- pservice->hw_ops->reduce_freq(pservice); + } + + mutex_unlock(&pservice->shutdown_lock); +@@ -2353,6 +2350,7 @@ static void vcodec_set_freq_rk3328(struct vpu_service_info *pservice, + if (curr == reg->freq) + return; + ++ atomic_set(&pservice->freq_status, reg->freq); + if (pservice->dev_id == VCODEC_DEVICE_ID_RKVDEC) { + if (reg->reg[1] & 0x00800000) { + if (rkv_dec_get_fmt(reg->reg) == FMT_H264D)