From e2275e96566c575f9ac5f86386f21824f6b17627 Mon Sep 17 00:00:00 2001 From: Ian Leonard Date: Fri, 28 Apr 2023 20:52:24 +0000 Subject: [PATCH 01/19] pyelftools: initial commit Signed-off-by: Ian Leonard --- packages/python/devel/pyelftools/package.mk | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 packages/python/devel/pyelftools/package.mk diff --git a/packages/python/devel/pyelftools/package.mk b/packages/python/devel/pyelftools/package.mk new file mode 100644 index 0000000000..c127678f03 --- /dev/null +++ b/packages/python/devel/pyelftools/package.mk @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 2023-present Team LibreELEC (https://libreelec.tv) + +PKG_NAME="pyelftools" +PKG_VERSION="0.29" +PKG_SHA256="591c2b5150f180937c60714a1ae288365b1a3d6ae68aaaa4503dd5ecf5e3c299" +PKG_LICENSE="Unlicense" +PKG_SITE="https://github.com/eliben/pyelftools" +PKG_URL="https://github.com/eliben/pyelftools/archive/refs/tags/v${PKG_VERSION}.tar.gz" +PKG_DEPENDS_HOST="Python3:host setuptools:host" +PKG_LONGDESC="Library for analyzing ELF files and DWARF debugging information" +PKG_TOOLCHAIN="manual" + +makeinstall_host() { + exec_thread_safe python3 setup.py install --prefix=${TOOLCHAIN} +} From a5a6a9f51b60dc37935334e82eadd1c6d9e6a8c6 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 4 Apr 2023 21:34:35 +0000 Subject: [PATCH 02/19] u-boot: depend on pyelftools --- packages/tools/u-boot/package.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index c7c3f1424f..0a7bb55e92 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -9,7 +9,7 @@ PKG_ARCH="arm aarch64" PKG_LICENSE="GPL" PKG_SITE="https://www.denx.de/wiki/U-Boot" PKG_URL="https://ftp.denx.de/pub/u-boot/${PKG_NAME}-${PKG_VERSION}.tar.bz2" -PKG_DEPENDS_TARGET="toolchain openssl:host pkg-config:host Python3:host swig:host" +PKG_DEPENDS_TARGET="toolchain openssl:host pkg-config:host Python3:host swig:host pyelftools:host" PKG_LONGDESC="Das U-Boot is a cross-platform bootloader for embedded systems." PKG_STAMP="${UBOOT_SYSTEM} ${UBOOT_TARGET}" From 60bbff034c52151c65792997b67b8bbdcca2277d Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 10 Jan 2023 10:28:40 +0000 Subject: [PATCH 03/19] u-boot: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO As part of v2023.01 CONFIG_DM_VIDEO has been renamed to CONFIG_VIDEO - https://github.com/u-boot/u-boot/commit/b86986c7b314f1378ca5be8df49310a6ce7302f8 --- ...LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch | 4 ++-- ...boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch | 2 +- ...ot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch | 2 +- ...ot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch | 2 +- ...ot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch | 2 +- projects/Rockchip/bootloader/config | 2 +- projects/Rockchip/devices/RK3288/bootloader/config | 2 +- 7 files changed, 8 insertions(+), 8 deletions(-) diff --git a/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch b/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch index a5bdb26d5d..45cc8a216a 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0001-LOCAL-configs-meson64-prevent-stdout-stderr-on-video.patch @@ -4,7 +4,7 @@ Date: Fri, 13 Nov 2020 02:09:36 +0000 Subject: [PATCH 01/22] LOCAL: configs: meson64: prevent stdout/stderr on videoconsole -Several devices have CONFIG_DM_VIDEO enabled which causes stdout/stderr +Several devices have CONFIG_VIDEO enabled which causes stdout/stderr to appear on videoconsole, so remove videoconsole from STDOUT so that early u-boot boot remains silent unless using the uart/serial console. @@ -20,7 +20,7 @@ index 40803ee9da..05b1fcb9fd 100644 @@ -18,7 +18,7 @@ /* For splashscreen */ - #ifdef CONFIG_DM_VIDEO + #ifdef CONFIG_VIDEO -#define STDOUT_CFG "vidconsole,serial" +#define STDOUT_CFG "serial" #else diff --git a/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch index 0dce3407b3..5878cd358d 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch @@ -73,7 +73,7 @@ index 0000000000..9ad263ca2c +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y -+CONFIG_DM_VIDEO=y ++CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch index 41b94fd28a..a190d14225 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch @@ -73,7 +73,7 @@ index 0000000000..624679f90c +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y -+CONFIG_DM_VIDEO=y ++CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch index 547babb8a7..545452811f 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch @@ -92,7 +92,7 @@ index 0000000000..3ef3c9c143 +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_DM_VIDEO=y ++CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch index 24bdcda648..ea69b977e3 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch @@ -81,7 +81,7 @@ index 0000000000..77ffc9aa49 +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_DM_VIDEO=y ++CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/projects/Rockchip/bootloader/config b/projects/Rockchip/bootloader/config index 18c676d8fe..c0d3a54b2f 100644 --- a/projects/Rockchip/bootloader/config +++ b/projects/Rockchip/bootloader/config @@ -1,5 +1,5 @@ CONFIG_BOOTDELAY=1 -# CONFIG_DM_VIDEO is not set +# CONFIG_VIDEO is not set # CONFIG_DISPLAY is not set # CONFIG_ENV_IS_IN_MMC is not set # CONFIG_NET_RANDOM_ETHADDR is not set diff --git a/projects/Rockchip/devices/RK3288/bootloader/config b/projects/Rockchip/devices/RK3288/bootloader/config index a067c28356..48779ace61 100644 --- a/projects/Rockchip/devices/RK3288/bootloader/config +++ b/projects/Rockchip/devices/RK3288/bootloader/config @@ -1,5 +1,5 @@ CONFIG_BOOTDELAY=1 -# CONFIG_DM_VIDEO is not set +# CONFIG_VIDEO is not set # CONFIG_DISPLAY is not set # CONFIG_ENV_IS_IN_MMC is not set # CONFIG_NET_RANDOM_ETHADDR is not set From 8f1fac6604d444ac33e630e67790dea68b98810a Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 10 Jan 2023 11:06:49 +0000 Subject: [PATCH 04/19] u-boot: Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE As part of v2023.01 CONFIG_SYS_TEXT_BASE has been renamed to CONFIG_TEXT_BASE - https://github.com/u-boot/u-boot/commit/984639039f4cfe32ec2cc531d6ace05326ac49eb --- ...-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch | 4 ++-- ...boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch | 2 +- ...ot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch | 2 +- ...ot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch | 2 +- ...ot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch | 2 +- projects/Rockchip/devices/RK3288/bootloader/config | 2 +- .../patches/u-boot/u-boot-0001-add-xu4-defconfig.patch | 2 +- 7 files changed, 8 insertions(+), 8 deletions(-) diff --git a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch index 01984f8b66..06221c93db 100644 --- a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch +++ b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch @@ -90,8 +90,8 @@ index 4a6ed3a7dd5c..ad1f97632979 100644 - arch = "arm64"; + arch = ARCH; compression = "none"; - load = ; -+ entry = ; + load = ; ++ entry = ; u-boot-nodtb { }; diff --git a/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch index 5878cd358d..dcf99b2f34 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch @@ -18,7 +18,7 @@ index 0000000000..9ad263ca2c +CONFIG_ARM=y +CONFIG_SYS_BOARD="wetek-gxbb" +CONFIG_ARCH_MESON=y -+CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_TEXT_BASE=0x01000000 +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 diff --git a/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch index a190d14225..a6f55080c2 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch @@ -18,7 +18,7 @@ index 0000000000..624679f90c +CONFIG_ARM=y +CONFIG_SYS_BOARD="wetek-gxbb" +CONFIG_ARCH_MESON=y -+CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_TEXT_BASE=0x01000000 +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 diff --git a/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch index 545452811f..b1d9d5550d 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch @@ -30,7 +30,7 @@ index 0000000000..3ef3c9c143 @@ -0,0 +1,77 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y -+CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y diff --git a/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch index ea69b977e3..5dc514487b 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0014-WIP-boards-amlogic-add-Beelink-GT1-defconfig.patch @@ -19,7 +19,7 @@ index 0000000000..77ffc9aa49 @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y -+CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y diff --git a/projects/Rockchip/devices/RK3288/bootloader/config b/projects/Rockchip/devices/RK3288/bootloader/config index 48779ace61..17f6fe7324 100644 --- a/projects/Rockchip/devices/RK3288/bootloader/config +++ b/projects/Rockchip/devices/RK3288/bootloader/config @@ -18,4 +18,4 @@ CONFIG_ROCKCHIP_EFUSE=y CONFIG_SHA256=y CONFIG_TPL=y CONFIG_SPL_SIZE_LIMIT=0x4b000 -CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_TEXT_BASE=0x01000000 diff --git a/projects/Samsung/patches/u-boot/u-boot-0001-add-xu4-defconfig.patch b/projects/Samsung/patches/u-boot/u-boot-0001-add-xu4-defconfig.patch index d3a4bbdf72..aaf8671494 100644 --- a/projects/Samsung/patches/u-boot/u-boot-0001-add-xu4-defconfig.patch +++ b/projects/Samsung/patches/u-boot/u-boot-0001-add-xu4-defconfig.patch @@ -17,7 +17,7 @@ index 0000000000..097f03b243 +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_EXYNOS=y -+CONFIG_SYS_TEXT_BASE=0x43E00000 ++CONFIG_TEXT_BASE=0x43E00000 +CONFIG_ARCH_EXYNOS5=y +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x310000 From c4fa4d81f13269a7314885d6e4ffb44f799cd885 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Apr 2023 11:37:39 +0000 Subject: [PATCH 05/19] u-boot (Allwinner): update binman patch https://github.com/u-boot/u-boot/commit/571bc4e67d39e4c376f8bab0d6518ab5ee832d9e https://github.com/u-boot/u-boot/commit/9766f69c98c2aa056d0518a9545f9e89484e9172 --- ...man-Prevent-entries-in-a-section-from-overlapping.patch | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch b/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch index b02ea40ff4..edd617ff74 100644 --- a/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch +++ b/projects/Allwinner/patches/u-boot/0002-binman-Prevent-entries-in-a-section-from-overlapping.patch @@ -22,11 +22,14 @@ diff --git a/tools/binman/entry.py b/tools/binman/entry.py index 70222718ea93..61822eb5e44f 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py -@@ -404,7 +404,9 @@ class Entry(object): +@@ -404,10 +404,9 @@ class Entry(object): if self.offset_unset: self.Raise('No offset set with offset-unset: should another ' 'entry provide this correct offset?') -- self.offset = tools.align(offset, self.align) +- elif self.offset_from_elf: +- self.offset = self.lookup_offset() +- else: +- self.offset = tools.align(offset, self.align) + elif self.offset > offset: + offset = self.offset + self.offset = tools.align(offset, self.align) From 0e11663c6536958fa6dedf501869704fcad1deb5 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 4 Apr 2023 11:57:56 +0000 Subject: [PATCH 06/19] u-boot (Allwinner): rebase patches for 2023.04 --- ...onfig-Remove-an-impossible-condition.patch | 8 +-- ...m-psci-Add-definitions-for-PSCI-v1.1.patch | 53 +++---------------- 2 files changed, 12 insertions(+), 49 deletions(-) diff --git a/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch b/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch index 8875507c3e..fab4045671 100644 --- a/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch +++ b/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch @@ -15,15 +15,15 @@ diff --git a/Kconfig b/Kconfig index 931a22806e4e..ede20d74c948 100644 --- a/Kconfig +++ b/Kconfig -@@ -359,7 +359,7 @@ config BUILD_TARGET - default "u-boot-spl.kwb" if ARCH_MVEBU && SPL +@@ -432,7 +432,7 @@ config BUILD_TARGET + default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL default "u-boot-elf.srec" if RCAR_GEN3 default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ - ARCH_SUNXI || RISCV || ARCH_ZYNQMP) + RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if ARCH_KIRKWOOD + default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL + default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT - default "u-boot-with-spl.imx" if ARCH_MX6 && SPL -- 2.33.0 diff --git a/projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch b/projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch index b072e82ce5..b7d3e2bd28 100644 --- a/projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch +++ b/projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch @@ -12,17 +12,16 @@ definitions: Signed-off-by: Samuel Holland --- arch/arm/cpu/armv7/Kconfig | 3 +++ - arch/arm/cpu/armv8/fwcall.c | 2 +- - arch/arm/include/asm/psci.h | 9 +++++++-- + arch/arm/include/asm/psci.h | 1 + arch/arm/include/asm/system.h | 14 +++++++++----- arch/arm/lib/psci-dt.c | 2 ++ - 5 files changed, 22 insertions(+), 8 deletions(-) + 4 files changed, 20 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 60bb0a9e1ec4..06b477619334 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig -@@ -49,6 +49,9 @@ choice +@@ -80,6 +80,9 @@ choice help Select the supported PSCI version. @@ -32,59 +31,23 @@ index 60bb0a9e1ec4..06b477619334 100644 config ARMV7_PSCI_1_0 bool "PSCI V1.0" -diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c -index 16914dc1eed6..87de09979b18 100644 ---- a/arch/arm/cpu/armv8/fwcall.c -+++ b/arch/arm/cpu/armv8/fwcall.c -@@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 reset_level, u32 cookie) - { - struct pt_regs regs; - -- regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2; -+ regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2; - regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level; - regs.regs[2] = cookie; - if (use_smc_for_psci) diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index 67e9234066b0..aa351867eee7 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h -@@ -22,8 +22,9 @@ - #include - #endif - --#define ARM_PSCI_VER_1_0 (0x00010000) - #define ARM_PSCI_VER_0_2 (0x00000002) -+#define ARM_PSCI_VER_1_0 (0x00010000) -+#define ARM_PSCI_VER_1_1 (0x00010001) - - /* PSCI 0.1 interface */ - #define ARM_PSCI_FN_BASE 0x95c1ba5e -@@ -68,7 +69,6 @@ - #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4) - #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5) - #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7) --#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) - - /* PSCI 1.0 interface */ - #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10) -@@ -86,6 +86,11 @@ - #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16) +@@ -87,6 +87,7 @@ #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17) -+/* PSCI 1.1 interface */ + /* PSCI 1.1 interface */ +#define ARM_PSCI_1_1_FN_SYSTEM_RESET2 ARM_PSCI_0_2_FN(18) -+ -+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) -+ + #define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) + /* 1KB stack per core */ - #define ARM_PSCI_STACK_SHIFT 10 - #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index f75eea16b36c..02effcc6cc38 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h -@@ -556,17 +556,21 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop); +@@ -557,17 +557,21 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop); #ifdef CONFIG_ARMV7_PSCI void psci_arch_cpu_entry(void); void psci_arch_init(void); From 20468737ec63ba0cb86e5eeafe3b289541a7fedb Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Sat, 21 Oct 2023 09:46:13 +0000 Subject: [PATCH 07/19] u-boot (Allwinner): drop upstreamed patches in 2023.10 --- ...onfig-Remove-an-impossible-condition.patch | 29 ------------------- 1 file changed, 29 deletions(-) delete mode 100644 projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch diff --git a/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch b/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch deleted file mode 100644 index fab4045671..0000000000 --- a/projects/Allwinner/patches/u-boot/0001-Kconfig-Remove-an-impossible-condition.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 7b4ff873927b131df05449df873cdf91958517a8 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 9 Oct 2021 10:40:45 -0500 -Subject: [PATCH 01/13] Kconfig: Remove an impossible condition - -ARCH_SUNXI selects BINMAN, so the condition "!BINMAN && ARCH_SUNXI" -is impossible. - -Signed-off-by: Samuel Holland ---- - Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Kconfig b/Kconfig -index 931a22806e4e..ede20d74c948 100644 ---- a/Kconfig -+++ b/Kconfig -@@ -432,7 +432,7 @@ config BUILD_TARGET - default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL - default "u-boot-elf.srec" if RCAR_GEN3 - default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ -- ARCH_SUNXI || RISCV || ARCH_ZYNQMP) -+ RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL - default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL - default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT --- -2.33.0 - From 026b0ce96359b5e0d429d48e0da68ec2a7c9f64b Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Sat, 21 Oct 2023 09:55:47 +0000 Subject: [PATCH 08/19] u-boot (Allwinner): rebase patches for 2023.10 ref: - https://github.com/u-boot/u-boot/commit/9a4aa31ad514a534e57b2607df327cb4f93b87bc --- ...3-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch index 06221c93db..4a8a66443c 100644 --- a/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch +++ b/projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch @@ -115,7 +115,7 @@ index 4a6ed3a7dd5c..ad1f97632979 100644 #ifdef SCP_ADDR scp { -@@ -91,19 +101,23 @@ +@@ -91,18 +101,23 @@ @config-SEQ { description = "NAME"; @@ -138,7 +138,6 @@ index 4a6ed3a7dd5c..ad1f97632979 100644 }; #else u-boot-img { -- offset = ; + offset = <32768>; }; #endif From b09b8d82865a41b1ed39992d4f6e06662b6df91b Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 4 Apr 2023 12:57:15 +0000 Subject: [PATCH 09/19] u-boot (Amlogic): drop upstreamed patches in 2023.04 --- ...ts-meson-nanopi-k2-readd-PHY-reset-p.patch | 38 ------------------- 1 file changed, 38 deletions(-) delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0004-BACKPORT-arm64-dts-meson-nanopi-k2-readd-PHY-reset-p.patch diff --git a/projects/Amlogic/patches/u-boot/u-boot-0004-BACKPORT-arm64-dts-meson-nanopi-k2-readd-PHY-reset-p.patch b/projects/Amlogic/patches/u-boot/u-boot-0004-BACKPORT-arm64-dts-meson-nanopi-k2-readd-PHY-reset-p.patch deleted file mode 100644 index c94e8c8e84..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0004-BACKPORT-arm64-dts-meson-nanopi-k2-readd-PHY-reset-p.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 7d8355053316d3f760a5ac14156e77e27aa5f6d5 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Tue, 25 Oct 2022 14:24:21 +0000 -Subject: [PATCH 04/22] BACKPORT: arm64: dts: meson: nanopi-k2: readd PHY reset - properties - -The sync of device-tree/bindings in 11a48a5a18c6 ("Linux 5.6-rc2") causes -Ethernet to break on some GXBB boards; the PHY seems to need proper reset -timing to function in u-boot and Linux. Re-add the old PHY reset binding -for dwmac until we support new bindings in the PHY node. This borrows the -same fix applied to the Odroid C2 board [0]. - -[0] https://lists.denx.de/pipermail/u-boot/2021-April/446658.html - -Fixes: dd5f2351e99a ("arm64: dts: meson: sync dt and bindings from v5.6-rc2") -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi -index c35158d7e9..2a245bbe7f 100644 ---- a/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi -+++ b/arch/arm/dts/meson-gxbb-nanopi-k2-u-boot.dtsi -@@ -5,3 +5,10 @@ - */ - - #include "meson-gx-u-boot.dtsi" -+ -+ðmac { -+ snps,reset-gpio = <&gpio GPIOZ_14 0>; -+ snps,reset-delays-us = <0 10000 1000000>; -+ snps,reset-active-low; -+}; -+ --- -2.34.1 - From 2ffa89bb213996c20ef0a191e66a70602664019d Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 4 Apr 2023 13:26:14 +0000 Subject: [PATCH 10/19] u-boot (Amlogic): documentation only patches dont apply cleanly - drop them --- ...oards-amlogic-update-for-Radxa-Zero2.patch | 123 ------------- ...oards-amlogic-update-for-Beelink-GT1.patch | 165 ------------------ ...s-amlogic-update-for-BananaPi-M2-Pro.patch | 49 ------ ...ards-amlogic-update-for-BananaPi-M2S.patch | 40 ----- 4 files changed, 377 deletions(-) delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0012-WIP-doc-boards-amlogic-update-for-Radxa-Zero2.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0015-WIP-doc-boards-amlogic-update-for-Beelink-GT1.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0019-WIP-docs-boards-amlogic-update-for-BananaPi-M2-Pro.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0021-WIP-docs-boards-amlogic-update-for-BananaPi-M2S.patch diff --git a/projects/Amlogic/patches/u-boot/u-boot-0012-WIP-doc-boards-amlogic-update-for-Radxa-Zero2.patch b/projects/Amlogic/patches/u-boot/u-boot-0012-WIP-doc-boards-amlogic-update-for-Radxa-Zero2.patch deleted file mode 100644 index e1d7cead98..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0012-WIP-doc-boards-amlogic-update-for-Radxa-Zero2.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 2fc65ac09a5698b9e2060890de1cd3310a237658 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 15 Jan 2022 06:35:47 +0000 -Subject: [PATCH 12/22] WIP: doc: boards: amlogic: update for Radxa Zero2 - -Add documentation bits for the Radxa Zero2 - -Signed-off-by: Christian Hewitt ---- - board/amlogic/w400/MAINTAINERS | 1 + - doc/board/amlogic/index.rst | 3 +- - .../{radxa-zero.rst => radxa-zero2.rst} | 29 ++++++++++--------- - 3 files changed, 18 insertions(+), 15 deletions(-) - rename doc/board/amlogic/{radxa-zero.rst => radxa-zero2.rst} (76%) - -diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS -index caad41577d..6e1ef9b8b8 100644 ---- a/board/amlogic/w400/MAINTAINERS -+++ b/board/amlogic/w400/MAINTAINERS -@@ -5,3 +5,4 @@ L: u-boot-amlogic@groups.io - F: board/amlogic/w400/ - F: configs/radxa-zero2_defconfig - F: doc/board/amlogic/w400.rst -+F: doc/board/amlogic/radxa-zero2.rst -diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst -index 4d407f9362..f0b92e4209 100644 ---- a/doc/board/amlogic/index.rst -+++ b/doc/board/amlogic/index.rst -@@ -19,7 +19,7 @@ This matrix concerns the actual source code version. - | | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L | - | | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 | - | | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | --| | | JetHub J80 | | | | | BananaPi-M5 | -+| | | JetHub J80 | | | | Radxa Zero2 | BananaPi-M5 | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ - | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ -@@ -110,6 +110,7 @@ Board Documentation - p212 - q200 - radxa-zero -+ radxa-zero2 - s400 - sei510 - sei610 -diff --git a/doc/board/amlogic/radxa-zero.rst b/doc/board/amlogic/radxa-zero2.rst -similarity index 76% -rename from doc/board/amlogic/radxa-zero.rst -rename to doc/board/amlogic/radxa-zero2.rst -index f5611f52ec..95a42a05d0 100644 ---- a/doc/board/amlogic/radxa-zero.rst -+++ b/doc/board/amlogic/radxa-zero2.rst -@@ -1,18 +1,17 @@ - .. SPDX-License-Identifier: GPL-2.0+ - --U-Boot for Radxa Zero --===================== -+U-Boot for Radxa Zero2 -+====================== - --Radxa Zero is a small form factor SBC based on the Amlogic S905Y2 --chipset that ships in a number of RAM/eMMC configurations: -+Radxa Zero2 is a small form factor SBC based on the Amlogic A311D -+chipset that ships in a number of eMMC configurations: - --Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436 --wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB --eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac). -- --- Amlogic S905Y2 quad-core Cortex-A53 --- Mali G31-MP2 GPU -+- Amlogic A311D (Quad A73 + Dual A53) CPU -+- 4GB LPDDR4 RAM -+- 32/64/128GB eMMC -+- Mali G52-MP4 GPU - - HDMI 2.1 output (micro) -+- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0 - - 1x USB 2.0 port - Type C (OTG) - - 1x USB 3.0 port - Type C (Host) - - 1x micro SD Card slot -@@ -20,6 +19,7 @@ eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac). - - Schematics are available on the manufacturer website: - -+** TO-DO ** (provide updated URL) - https://dl.radxa.com/zero/docs/hw/RADAX_ZERO_V13_SCH_20210309.pdf - - U-Boot compilation -@@ -28,7 +28,7 @@ U-Boot compilation - .. code-block:: bash - - $ export CROSS_COMPILE=aarch64-none-elf- -- $ make radxa-zero_defconfig -+ $ make radxa-zero2_defconfig - $ make - - Image creation -@@ -42,6 +42,7 @@ git trees published by the board vendor: - - .. code-block:: bash - -+ ** TO-DO ** UPDATE URLs - $ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git - $ git clone https://github.com/radxa/fip.git - -@@ -54,11 +55,11 @@ git trees published by the board vendor: - $ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf- - $ export ARCH=arm - $ cd u-boot -- $ make radxa-zero_defconfig -+ $ make radxa-zero2_defconfig - $ make - -- $ cp u-boot.bin ../fip/radxa-zero/bl33.bin -- $ cd ../fip/radxa-zero -+ $ cp u-boot.bin ../fip/radxa-zero2/bl33.bin -+ $ cd ../fip/radxa-zero2 - $ make - - This will generate: --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0015-WIP-doc-boards-amlogic-update-for-Beelink-GT1.patch b/projects/Amlogic/patches/u-boot/u-boot-0015-WIP-doc-boards-amlogic-update-for-Beelink-GT1.patch deleted file mode 100644 index 5b3f11a276..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0015-WIP-doc-boards-amlogic-update-for-Beelink-GT1.patch +++ /dev/null @@ -1,165 +0,0 @@ -From 5c21b65a0efdae590e0d0ecd1191078725e4abf4 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Thu, 14 Jul 2022 19:38:41 +0000 -Subject: [PATCH 15/22] WIP: doc: boards: amlogic: update for Beelink GT1 - -Add documentation bits for the Beelink GT1 and GT1-Ultimate - -Signed-off-by: Christian Hewitt ---- - board/amlogic/q200/MAINTAINERS | 2 + - doc/board/amlogic/beelink-gt1.rst | 98 +++++++++++++++++++++++++++++++ - doc/board/amlogic/index.rst | 9 +-- - 3 files changed, 105 insertions(+), 4 deletions(-) - create mode 100644 doc/board/amlogic/beelink-gt1.rst - -diff --git a/board/amlogic/q200/MAINTAINERS b/board/amlogic/q200/MAINTAINERS -index 9c84cca27e..46beffe17f 100644 ---- a/board/amlogic/q200/MAINTAINERS -+++ b/board/amlogic/q200/MAINTAINERS -@@ -4,9 +4,11 @@ S: Maintained - L: u-boot-amlogic@groups.io - F: board/amlogic/q200/ - F: include/configs/q200.h -+F: configs/beelink-gt1_defconfig - F: configs/khadas-vim2_defconfig - F: configs/libretech-s905d-pc_defconfig - F: configs/libretech-s912-pc_defconfig - F: configs/wetek-core2_defconfig -+F: doc/board/amlogic/beelink-gt1.rst - F: doc/board/amlogic/khadas-vim2.rst - F: doc/board/amlogic/wetek-core2.rst -diff --git a/doc/board/amlogic/beelink-gt1.rst b/doc/board/amlogic/beelink-gt1.rst -new file mode 100644 -index 0000000000..28a7c4366f ---- /dev/null -+++ b/doc/board/amlogic/beelink-gt1.rst -@@ -0,0 +1,98 @@ -+.. SPDX-License-Identifier: GPL-2.0+ -+ -+U-Boot for Beelink GT1/GT1-Ultimate -+=================================== -+ -+The Shenzen AZW (Beelink) GT1 and GT1-Ultimate are based on the Amlogic -+Q200 reference board with an S912 chip. -+ -+- 2GB or 3GB DDR3 RAM -+- 32GB eMMC -+- HDMI 2.1 video -+- S/PDIF optical output -+- 10/100/1000 Ethernet -+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.2) -+- 3x USB 2.0 ports -+- IR receiver -+- 1x micro SD card slot -+- 1x Power LED (white) -+- 1x Reset button (internal) -+ -+Beelink do not provide public schematics, but have been willing -+to share them with known distro developers on request. -+ -+U-Boot compilation -+------------------ -+ -+.. code-block:: bash -+ -+ $ export CROSS_COMPILE=aarch64-none-elf- -+ $ make beelink-gt1_defconfig -+ $ make -+ -+Image creation -+-------------- -+ -+Amlogic does not provide sources for the firmware and for tools needed -+to create the bootloader image. Beelink have provided the Amlogic SDK -+u-boot sources to known distro developers on-request, allowing FIPs to -+be generated. The GT1 (2GB) and GT1-Ultimate (3GB) models differ in -+RAM size and original Beelink devices use the same spec RAM chips and -+can share the same boot FIPs: -+ -+https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-gt1 -+ -+For simplified usage, pleaser refer to :doc:`pre-generated-fip` with codename `beelink-gt1` -+ -+.. code-block:: bash -+ -+ $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip -+ $ unzip master.zip -+ $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-gt1 -+ -+Go back to the mainline U-Boot source tree then: -+ -+.. code-block:: bash -+ -+ $ mkdir fip -+ $ cp $FIPDIR/* fip/ -+ $ cp u-boot.bin fip/bl33.bin -+ -+ $ sh fip/blx_fix.sh \ -+ fip/bl30.bin \ -+ fip/zero_tmp \ -+ fip/bl30_zero.bin \ -+ fip/bl301.bin \ -+ fip/bl301_zero.bin \ -+ fip/bl30_new.bin \ -+ bl30 -+ -+ $ python fip/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 -+ -+ $ sh fip/blx_fix.sh \ -+ fip/bl2_acs.bin \ -+ fip/zero_tmp \ -+ fip/bl2_zero.bin \ -+ fip/bl21.bin \ -+ fip/bl21_zero.bin \ -+ fip/bl2_new.bin \ -+ bl2 -+ -+ $ fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin -+ $ fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img -+ $ fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin -+ $ fip/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig -+ $ fip/gxl/aml_encrypt_gxl --bootmk \ -+ --output fip/u-boot.bin \ -+ --bl2 fip/bl2.n.bin.sig \ -+ --bl30 fip/bl30_new.bin.enc \ -+ --bl31 fip/bl31.img.enc \ -+ --bl33 fip/bl33.bin.enc -+ -+And then write the image to SD or eMMC with: -+ -+.. code-block:: bash -+ -+ $ DEV=/dev/your_sd_device -+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 -+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 -diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst -index f0b92e4209..b8b6f9b98a 100644 ---- a/doc/board/amlogic/index.rst -+++ b/doc/board/amlogic/index.rst -@@ -15,10 +15,10 @@ This matrix concerns the actual source code version. - | | | S805X | S905D | | S905D2 | A311D | S905D3 | - | | | S905W | | | S905Y2 | | | - +===============================+===========+=================+==============+=============+============+=============+==============+ --| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | --| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L | --| | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 | --| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | -+| Boards | Odroid-C2 | P212 | Beelink GT1 | S400 | U200 | Odroid-N2 | SEI610 | -+| | Nanopi-K2 | Khadas-VIM | Khadas VIM2 | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L | -+| | P200 | LibreTech-CC v1 | Libretech-PC | | Radxa Zero | GT-King/Pro | Odroid-C4 | -+| | P201 | LibreTech-AC v2 | WeTek Core2 | | | GSKing-X | Odroid-HC4 | - | | | JetHub J80 | | | | Radxa Zero2 | BananaPi-M5 | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ - | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | -@@ -93,6 +93,7 @@ Board Documentation - - beelink-gtking - beelink-gtkingpro -+ beelink-gt1 - jethub-j100 - jethub-j80 - khadas-vim2 --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0019-WIP-docs-boards-amlogic-update-for-BananaPi-M2-Pro.patch b/projects/Amlogic/patches/u-boot/u-boot-0019-WIP-docs-boards-amlogic-update-for-BananaPi-M2-Pro.patch deleted file mode 100644 index 03ad4f5c60..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0019-WIP-docs-boards-amlogic-update-for-BananaPi-M2-Pro.patch +++ /dev/null @@ -1,49 +0,0 @@ -From b4870c47202687c6a6880b449c97a2e32ec3d278 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Fri, 17 Feb 2023 05:49:44 +0000 -Subject: [PATCH 19/22] WIP: docs: boards: amlogic: update for BananaPi M2-Pro - -Signed-off-by: Christian Hewitt ---- - board/amlogic/u200/MAINTAINERS | 1 + - doc/board/amlogic/index.rst | 5 +++-- - 2 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS -index 47cec234a1..2a2d9d4c49 100644 ---- a/board/amlogic/u200/MAINTAINERS -+++ b/board/amlogic/u200/MAINTAINERS -@@ -4,6 +4,7 @@ S: Maintained - L: u-boot-amlogic@groups.io - F: board/amlogic/u200/ - F: configs/u200_defconfig -+F: configs/bananapi-m2-pro_defconfig - F: configs/bananapi-m5_defconfig - F: configs/radxa-zero_defconfig - F: doc/board/amlogic/u200.rst -diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst -index b8b6f9b98a..629284fca9 100644 ---- a/doc/board/amlogic/index.rst -+++ b/doc/board/amlogic/index.rst -@@ -19,7 +19,8 @@ This matrix concerns the actual source code version. - | | Nanopi-K2 | Khadas-VIM | Khadas VIM2 | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L | - | | P200 | LibreTech-CC v1 | Libretech-PC | | Radxa Zero | GT-King/Pro | Odroid-C4 | - | | P201 | LibreTech-AC v2 | WeTek Core2 | | | GSKing-X | Odroid-HC4 | --| | | JetHub J80 | | | | Radxa Zero2 | BananaPi-M5 | -+| | | JetHub J80 | | | | Radxa Zero2 | BPi-M2-Pro | -+| | | | | | | Radxa Zero2 | BPi-M5 | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ - | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ -@@ -37,7 +38,7 @@ This matrix concerns the actual source code version. - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ - | Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ --| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** | -+| Fuse access | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ - | SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0021-WIP-docs-boards-amlogic-update-for-BananaPi-M2S.patch b/projects/Amlogic/patches/u-boot/u-boot-0021-WIP-docs-boards-amlogic-update-for-BananaPi-M2S.patch deleted file mode 100644 index 68e1d2aa95..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0021-WIP-docs-boards-amlogic-update-for-BananaPi-M2S.patch +++ /dev/null @@ -1,40 +0,0 @@ -From e1484036ca5e032a9039ed2f361f2b123a8efd64 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 18 Feb 2023 08:08:42 +0000 -Subject: [PATCH 21/22] WIP: docs: boards: amlogic: update for BananaPi M2S - -Signed-off-by: Christian Hewitt ---- - board/amlogic/w400/MAINTAINERS | 2 ++ - doc/board/amlogic/index.rst | 2 +- - 2 files changed, 3 insertions(+), 1 deletion(-) - -diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS -index 6e1ef9b8b8..d4b4d4f91d 100644 ---- a/board/amlogic/w400/MAINTAINERS -+++ b/board/amlogic/w400/MAINTAINERS -@@ -3,6 +3,8 @@ M: Neil Armstrong - S: Maintained - L: u-boot-amlogic@groups.io - F: board/amlogic/w400/ -+F: configs/bananapi-m2s_defconfig - F: configs/radxa-zero2_defconfig - F: doc/board/amlogic/w400.rst -+F: doc/board/amlogic/bananapi-m2s.rst - F: doc/board/amlogic/radxa-zero2.rst -diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst -index 629284fca9..fd8d4185f8 100644 ---- a/doc/board/amlogic/index.rst -+++ b/doc/board/amlogic/index.rst -@@ -20,7 +20,7 @@ This matrix concerns the actual source code version. - | | P200 | LibreTech-CC v1 | Libretech-PC | | Radxa Zero | GT-King/Pro | Odroid-C4 | - | | P201 | LibreTech-AC v2 | WeTek Core2 | | | GSKing-X | Odroid-HC4 | - | | | JetHub J80 | | | | Radxa Zero2 | BPi-M2-Pro | --| | | | | | | Radxa Zero2 | BPi-M5 | -+| | | | | | | BPI-M2S | BPi-M5 | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ - | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | - +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ --- -2.34.1 - From 0779a1f47680483e6b431c84514283bf70b185f3 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Sat, 21 Oct 2023 10:55:56 +0000 Subject: [PATCH 11/19] u-boot (Amlogic): drop upstreamed patches for 2023.10 --- ...rt-WeTek-Hub-Play2-DTs-from-Linux-5..patch | 554 ----------- ...snps-reset-on-WeTek-devices-to-fix-E.patch | 52 - ...ards-amlogic-add-WeTek-Hub-defconfig.patch | 91 -- ...ds-amlogic-add-WeTek-Play2-defconfig.patch | 91 -- ...-ARM-dts-add-support-for-Radxa-Zero2.patch | 543 ---------- ...ds-amlogic-add-Radxa-Zero2-defconfig.patch | 110 -- ...mport-Beelink-GT1-DT-from-Linux-5.21.patch | 128 --- ...-ARM-dts-convert-bananapi-m5-to-dtsi.patch | 936 ------------------ ...-dts-add-support-for-BananaPi-M2-Pro.patch | 152 --- ...boards-add-BananaPi-M2-Pro-defconfig.patch | 96 -- ...IP-boards-add-BananaPi-M2S-defconfig.patch | 102 -- ...ARM-dts-add-support-for-BananaPi-M2S.patch | 651 ------------ 12 files changed, 3506 deletions(-) delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0005-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0006-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0010-WIP-ARM-dts-add-support-for-Radxa-Zero2.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0013-WIP-ARM-dts-import-Beelink-GT1-DT-from-Linux-5.21.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0016-WIP-ARM-dts-convert-bananapi-m5-to-dtsi.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0017-WIP-ARM-dts-add-support-for-BananaPi-M2-Pro.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0018-WIP-boards-add-BananaPi-M2-Pro-defconfig.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0020-WIP-boards-add-BananaPi-M2S-defconfig.patch delete mode 100644 projects/Amlogic/patches/u-boot/u-boot-0022-WIP-ARM-dts-add-support-for-BananaPi-M2S.patch diff --git a/projects/Amlogic/patches/u-boot/u-boot-0005-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch b/projects/Amlogic/patches/u-boot/u-boot-0005-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch deleted file mode 100644 index cb830c8ede..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0005-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch +++ /dev/null @@ -1,554 +0,0 @@ -From f72090a5d057a18fa8bceec0400c212012f56126 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Tue, 20 Apr 2021 05:19:43 +0000 -Subject: [PATCH 05/22] WIP: ARM: dts: import WeTek Hub/Play2 DTs from Linux - 5.19 - -Import the WeTek common dtsi and Hub/Play2 device-trees. - -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/Makefile | 2 + - arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 + - arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 ++++ - .../dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 + - arch/arm/dts/meson-gxbb-wetek-play2.dts | 121 ++++++++ - arch/arm/dts/meson-gxbb-wetek.dtsi | 292 ++++++++++++++++++ - 6 files changed, 487 insertions(+) - create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts - create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts - create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 965895bc2a..4a1ac8ecaf 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -181,6 +181,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ - meson-gxbb-nanopi-k2.dtb \ - meson-gxbb-p200.dtb \ - meson-gxbb-p201.dtb \ -+ meson-gxbb-wetek-hub.dtb \ -+ meson-gxbb-wetek-play2.dtb \ - meson-gxl-s805x-libretech-ac.dtb \ - meson-gxl-s905d-libretech-pc.dtb \ - meson-gxl-s905w-jethome-jethub-j80.dtb \ -diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi -new file mode 100644 -index 0000000000..c35158d7e9 ---- /dev/null -+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 BayLibre, SAS. -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-gx-u-boot.dtsi" -diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts b/arch/arm/dts/meson-gxbb-wetek-hub.dts -new file mode 100644 -index 0000000000..58733017ed ---- /dev/null -+++ b/arch/arm/dts/meson-gxbb-wetek-hub.dts -@@ -0,0 +1,58 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2016 BayLibre, Inc. -+ * Author: Neil Armstrong -+ */ -+ -+/dts-v1/; -+ -+#include "meson-gxbb-wetek.dtsi" -+#include -+ -+/ { -+ compatible = "wetek,hub", "amlogic,meson-gxbb"; -+ model = "WeTek Hub"; -+ -+ sound { -+ compatible = "amlogic,gx-sound-card"; -+ model = "WETEK-HUB"; -+ assigned-clocks = <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>, -+ <&clkc CLKID_MPLL2>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ status = "okay"; -+ -+ dai-link-0 { -+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; -+ dai-format = "i2s"; -+ mclk-fs = <256>; -+ -+ codec-0 { -+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; -+ }; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; -+ -+ codec-0 { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+}; -+ -+&aiu { -+ status = "okay"; -+}; -+ -+&ir { -+ linux,rc-map-name = "rc-wetek-hub"; -+}; -diff --git a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi -new file mode 100644 -index 0000000000..c35158d7e9 ---- /dev/null -+++ b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 BayLibre, SAS. -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-gx-u-boot.dtsi" -diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts b/arch/arm/dts/meson-gxbb-wetek-play2.dts -new file mode 100644 -index 0000000000..6eae692792 ---- /dev/null -+++ b/arch/arm/dts/meson-gxbb-wetek-play2.dts -@@ -0,0 +1,121 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2016 BayLibre, Inc. -+ * Author: Neil Armstrong -+ */ -+ -+/dts-v1/; -+ -+#include "meson-gxbb-wetek.dtsi" -+#include -+#include -+ -+/ { -+ compatible = "wetek,play2", "amlogic,meson-gxbb"; -+ model = "WeTek Play 2"; -+ -+ spdif_dit: audio-codec-0 { -+ #sound-dai-cells = <0>; -+ compatible = "linux,spdif-dit"; -+ status = "okay"; -+ sound-name-prefix = "DIT"; -+ }; -+ -+ leds { -+ led-wifi { -+ label = "wetek-play:wifi-status"; -+ gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ }; -+ -+ led-ethernet { -+ label = "wetek-play:ethernet-status"; -+ gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ }; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ poll-interval = <100>; -+ -+ button@0 { -+ label = "reset"; -+ linux,code = ; -+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ sound { -+ compatible = "amlogic,gx-sound-card"; -+ model = "WETEK-PLAY2"; -+ assigned-clocks = <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>, -+ <&clkc CLKID_MPLL2>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ status = "okay"; -+ -+ dai-link-0 { -+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; -+ dai-format = "i2s"; -+ mclk-fs = <256>; -+ -+ codec-0 { -+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; -+ }; -+ }; -+ -+ dai-link-3 { -+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; -+ -+ codec-0 { -+ sound-dai = <&spdif_dit>; -+ }; -+ }; -+ -+ dai-link-4 { -+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; -+ -+ codec-0 { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+}; -+ -+&aiu { -+ status = "okay"; -+ pinctrl-0 = <&spdif_out_y_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&i2c_A { -+ status = "okay"; -+ pinctrl-0 = <&i2c_a_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&usb1_phy { -+ status = "okay"; -+}; -+ -+&usb1 { -+ status = "okay"; -+}; -+ -+&ir { -+ linux,rc-map-name = "rc-wetek-play2"; -+}; -diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi -new file mode 100644 -index 0000000000..3c3eeb148e ---- /dev/null -+++ b/arch/arm/dts/meson-gxbb-wetek.dtsi -@@ -0,0 +1,292 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2016 Andreas Färber -+ * Copyright (c) 2016 BayLibre, Inc. -+ * Author: Kevin Hilman -+ */ -+ -+#include "meson-gxbb.dtsi" -+#include -+#include -+ -+/ { -+ aliases { -+ serial0 = &uart_AO; -+ ethernet0 = ðmac; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x40000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-blue { -+ /* red in suspend or power-off */ -+ color = ; -+ function = LED_FUNCTION_POWER; -+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ panic-indicator; -+ }; -+ }; -+ -+ usb_pwr: regulator-usb-pwrs { -+ compatible = "regulator-fixed"; -+ -+ regulator-name = "USB_PWR"; -+ -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ -+ gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+ -+ vddio_boot: regulator-vddio_boot { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDIO_BOOT"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ vddao_3v3: regulator-vddao_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDAO_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ vddio_ao18: regulator-vddio_ao18 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDIO_AO18"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ -+ vcc_3v3: regulator-vcc_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VCC_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ emmc_pwrseq: emmc-pwrseq { -+ compatible = "mmc-pwrseq-emmc"; -+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; -+ }; -+ -+ wifi32k: wifi32k { -+ compatible = "pwm-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; -+ clocks = <&wifi32k>; -+ clock-names = "ext_clock"; -+ }; -+ -+ cvbs-connector { -+ compatible = "composite-video-connector"; -+ -+ port { -+ cvbs_connector_in: endpoint { -+ remote-endpoint = <&cvbs_vdac_out>; -+ }; -+ }; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_tx_tmds_out>; -+ }; -+ }; -+ }; -+}; -+ -+&cec_AO { -+ status = "okay"; -+ pinctrl-0 = <&ao_cec_pins>; -+ pinctrl-names = "default"; -+ hdmi-phandle = <&hdmi_tx>; -+}; -+ -+&cvbs_vdac_port { -+ cvbs_vdac_out: endpoint { -+ remote-endpoint = <&cvbs_connector_in>; -+ }; -+}; -+ -+ðmac { -+ status = "okay"; -+ pinctrl-0 = <ð_rgmii_pins>; -+ pinctrl-names = "default"; -+ -+ phy-handle = <ð_phy0>; -+ phy-mode = "rgmii"; -+ -+ amlogic,tx-delay-ns = <2>; -+ -+ mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ eth_phy0: ethernet-phy@0 { -+ /* Realtek RTL8211F (0x001cc916) */ -+ reg = <0>; -+ -+ reset-assert-us = <10000>; -+ reset-deassert-us = <80000>; -+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; -+ -+ interrupt-parent = <&gpio_intc>; -+ /* MAC_INTR on GPIOZ_15 */ -+ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; -+ }; -+ }; -+}; -+ -+&hdmi_tx { -+ status = "okay"; -+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; -+ pinctrl-names = "default"; -+ hdmi-supply = <&vddio_ao18>; -+}; -+ -+&hdmi_tx_tmds_port { -+ hdmi_tx_tmds_out: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&ir { -+ status = "okay"; -+ pinctrl-0 = <&remote_input_ao_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&pwm_ef { -+ status = "okay"; -+ pinctrl-0 = <&pwm_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&clkc CLKID_FCLK_DIV4>; -+ clock-names = "clkin0"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vddio_ao18>; -+}; -+ -+/* Wireless SDIO Module */ -+&sd_emmc_a { -+ status = "okay"; -+ pinctrl-0 = <&sdio_pins>; -+ pinctrl-1 = <&sdio_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ bus-width = <4>; -+ cap-sd-highspeed; -+ max-frequency = <50000000>; -+ -+ non-removable; -+ disable-wp; -+ -+ /* WiFi firmware requires power to be kept while in suspend */ -+ keep-power-in-suspend; -+ -+ mmc-pwrseq = <&sdio_pwrseq>; -+ -+ vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&vddio_boot>; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+/* SD card */ -+&sd_emmc_b { -+ status = "okay"; -+ pinctrl-0 = <&sdcard_pins>; -+ pinctrl-1 = <&sdcard_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <4>; -+ cap-sd-highspeed; -+ max-frequency = <100000000>; -+ disable-wp; -+ -+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; -+ -+ vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&vcc_3v3>; -+}; -+ -+/* eMMC */ -+&sd_emmc_c { -+ status = "okay"; -+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; -+ pinctrl-1 = <&emmc_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ max-frequency = <50000000>; -+ non-removable; -+ disable-wp; -+ mmc-ddr-1_8v; -+ mmc-hs200-1_8v; -+ -+ mmc-pwrseq = <&emmc_pwrseq>; -+ vmmc-supply = <&vcc_3v3>; -+ vqmmc-supply = <&vddio_boot>; -+}; -+ -+/* This is connected to the Bluetooth module: */ -+&uart_A { -+ status = "okay"; -+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; -+ pinctrl-names = "default"; -+ uart-has-rtscts; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; -+ }; -+}; -+ -+/* This UART is brought out to the DB9 connector */ -+&uart_AO { -+ status = "okay"; -+ pinctrl-0 = <&uart_ao_a_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&usb0_phy { -+ status = "okay"; -+ phy-supply = <&usb_pwr>; -+}; -+ -+&usb0 { -+ status = "okay"; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0006-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch b/projects/Amlogic/patches/u-boot/u-boot-0006-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch deleted file mode 100644 index c29d217a9b..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0006-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 4df4197e1eb7e257d0c4dda60a7ff427fbd47c6f Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Tue, 20 Apr 2021 05:29:19 +0000 -Subject: [PATCH 06/22] WIP: ARM: dts: use snps,reset on WeTek devices to fix - Ethernet - -The sync of the device tree and dt-bindings from Linux v5.6-rc2 -11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on both -WeTek devices. The PHY seems to need proper reset timing to be -functional in U-Boot and Linux afterwards. Re-add the old PHY -reset bindings for dwmac until we support the new bindings in -the PHY node. - -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 +++++++ - arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 +++++++ - 2 files changed, 14 insertions(+) - -diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi -index c35158d7e9..2a245bbe7f 100644 ---- a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi -+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi -@@ -5,3 +5,10 @@ - */ - - #include "meson-gx-u-boot.dtsi" -+ -+ðmac { -+ snps,reset-gpio = <&gpio GPIOZ_14 0>; -+ snps,reset-delays-us = <0 10000 1000000>; -+ snps,reset-active-low; -+}; -+ -diff --git a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi -index c35158d7e9..2a245bbe7f 100644 ---- a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi -+++ b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi -@@ -5,3 +5,10 @@ - */ - - #include "meson-gx-u-boot.dtsi" -+ -+ðmac { -+ snps,reset-gpio = <&gpio GPIOZ_14 0>; -+ snps,reset-delays-us = <0 10000 1000000>; -+ snps,reset-active-low; -+}; -+ --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch deleted file mode 100644 index dcf99b2f34..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0008-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 8b7dfec310b69a5b7cafacbe11a3ca36b497c78c Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 27 Feb 2021 06:03:00 +0000 -Subject: [PATCH 08/22] WIP: boards: amlogic: add WeTek Hub defconfig - -Signed-of-by: Christian Hewitt ---- - configs/wetek-hub_defconfig | 71 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 71 insertions(+) - create mode 100644 configs/wetek-hub_defconfig - -diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig -new file mode 100644 -index 0000000000..9ad263ca2c ---- /dev/null -+++ b/configs/wetek-hub_defconfig -@@ -0,0 +1,71 @@ -+CONFIG_ARM=y -+CONFIG_SYS_BOARD="wetek-gxbb" -+CONFIG_ARCH_MESON=y -+CONFIG_TEXT_BASE=0x01000000 -+CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_DM_GPIO=y -+CONFIG_DEBUG_UART_BASE=0xc81004c0 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING=" wetek-hub" -+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 -+CONFIG_OF_BOARD_SETUP=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_MISC_INIT_R=y -+# CONFIG_CMD_BDI is not set -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_ADC=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+# CONFIG_CMD_LOADS is not set -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+CONFIG_OF_CONTROL=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_SARADC_MESON=y -+CONFIG_DM_I2C=y -+CONFIG_SYS_I2C_MESON=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_MESON_GX=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DM_ETH=y -+CONFIG_ETH_DESIGNWARE_MESON8B=y -+CONFIG_PHY=y -+CONFIG_MESON_GXBB_USB_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_MESON_GXBB=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_MESON_EE_POWER_DOMAIN=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_DM_RESET=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_SKIP_INIT=y -+CONFIG_MESON_SERIAL=y -+CONFIG_SYSINFO=y -+CONFIG_SYSINFO_SMBIOS=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_DWC2=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_VIDEO=y -+# CONFIG_VIDEO_BPP8 is not set -+# CONFIG_VIDEO_BPP16 is not set -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_MESON=y -+CONFIG_VIDEO_DT_SIMPLEFB=y -+CONFIG_SPLASH_SCREEN=y -+CONFIG_SPLASH_SCREEN_ALIGN=y -+CONFIG_VIDEO_BMP_RLE8=y -+CONFIG_BMP_16BPP=y -+CONFIG_BMP_24BPP=y -+CONFIG_BMP_32BPP=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch deleted file mode 100644 index a6f55080c2..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0009-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch +++ /dev/null @@ -1,91 +0,0 @@ -From e45b57304c28592eae3ad386559abb6dd3a7a802 Mon Sep 17 00:00:00 2001 -From: chewitt -Date: Sat, 27 Feb 2021 06:04:00 +0000 -Subject: [PATCH 09/22] WIP: boards: amlogic: add WeTek Play2 defconfig - -Signed-off-by: Christian Hewittt ---- - configs/wetek-play2_defconfig | 71 +++++++++++++++++++++++++++++++++++ - 1 file changed, 71 insertions(+) - create mode 100644 configs/wetek-play2_defconfig - -diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig -new file mode 100644 -index 0000000000..624679f90c ---- /dev/null -+++ b/configs/wetek-play2_defconfig -@@ -0,0 +1,71 @@ -+CONFIG_ARM=y -+CONFIG_SYS_BOARD="wetek-gxbb" -+CONFIG_ARCH_MESON=y -+CONFIG_TEXT_BASE=0x01000000 -+CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_DM_GPIO=y -+CONFIG_DEBUG_UART_BASE=0xc81004c0 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING=" wetek-play2" -+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 -+CONFIG_OF_BOARD_SETUP=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_MISC_INIT_R=y -+# CONFIG_CMD_BDI is not set -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_ADC=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_I2C=y -+# CONFIG_CMD_LOADS is not set -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+CONFIG_OF_CONTROL=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_SARADC_MESON=y -+CONFIG_DM_I2C=y -+CONFIG_SYS_I2C_MESON=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_MESON_GX=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DM_ETH=y -+CONFIG_ETH_DESIGNWARE_MESON8B=y -+CONFIG_PHY=y -+CONFIG_MESON_GXBB_USB_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_MESON_GXBB=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_MESON_EE_POWER_DOMAIN=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_DM_RESET=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_SKIP_INIT=y -+CONFIG_MESON_SERIAL=y -+CONFIG_SYSINFO=y -+CONFIG_SYSINFO_SMBIOS=y -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_DWC2=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_VIDEO=y -+# CONFIG_VIDEO_BPP8 is not set -+# CONFIG_VIDEO_BPP16 is not set -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_MESON=y -+CONFIG_VIDEO_DT_SIMPLEFB=y -+CONFIG_SPLASH_SCREEN=y -+CONFIG_SPLASH_SCREEN_ALIGN=y -+CONFIG_VIDEO_BMP_RLE8=y -+CONFIG_BMP_16BPP=y -+CONFIG_BMP_24BPP=y -+CONFIG_BMP_32BPP=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0010-WIP-ARM-dts-add-support-for-Radxa-Zero2.patch b/projects/Amlogic/patches/u-boot/u-boot-0010-WIP-ARM-dts-add-support-for-Radxa-Zero2.patch deleted file mode 100644 index 3c3b36f534..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0010-WIP-ARM-dts-add-support-for-Radxa-Zero2.patch +++ /dev/null @@ -1,543 +0,0 @@ -From 7a49690898b3af72646df09784b8cdd9b1b593fd Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 15 Jan 2022 06:17:23 +0000 -Subject: [PATCH 10/22] WIP: ARM: dts: add support for Radxa Zero2 - -Import the initial dts (WIP) from chewitt/amlogic-5.16.y - -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/Makefile | 1 + - .../dts/meson-g12b-radxa-zero2-u-boot.dtsi | 7 + - arch/arm/dts/meson-g12b-radxa-zero2.dts | 493 ++++++++++++++++++ - 3 files changed, 501 insertions(+) - create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 4a1ac8ecaf..926ae0aae4 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ - meson-g12b-gsking-x.dtb \ - meson-g12b-odroid-n2.dtb \ - meson-g12b-odroid-n2-plus.dtb \ -+ meson-g12b-radxa-zero2.dtb \ - meson-sm1-bananapi-m5.dtb \ - meson-sm1-khadas-vim3l.dtb \ - meson-sm1-odroid-c4.dtb \ -diff --git a/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi -new file mode 100644 -index 0000000000..236f2468dc ---- /dev/null -+++ b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 BayLibre, SAS. -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-g12-common-u-boot.dtsi" -diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts b/arch/arm/dts/meson-g12b-radxa-zero2.dts -new file mode 100644 -index 0000000000..f0c9ef8592 ---- /dev/null -+++ b/arch/arm/dts/meson-g12b-radxa-zero2.dts -@@ -0,0 +1,493 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 BayLibre, SAS -+ * Author: Neil Armstrong -+ * Copyright (c) 2019 Christian Hewitt -+ * Copyright (c) 2022 Radxa Limited -+ * Author: Yuntian Zhang -+ */ -+ -+/dts-v1/; -+ -+#include "meson-g12b-a311d.dtsi" -+#include -+#include -+#include -+#include -+ -+/ { -+ compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b"; -+ model = "Radxa Zero2"; -+ -+ aliases { -+ serial0 = &uart_AO; -+ serial2 = &uart_A; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x80000000>; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ poll-interval = <100>; -+ power-button { -+ label = "power"; -+ linux,code = ; -+ gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-green { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ cvbs-connector { -+ status = "disabled"; -+ compatible = "composite-video-connector"; -+ -+ port { -+ cvbs_connector_in: endpoint { -+ remote-endpoint = <&cvbs_vdac_out>; -+ }; -+ }; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_tx_tmds_out>; -+ }; -+ }; -+ }; -+ -+ emmc_pwrseq: emmc-pwrseq { -+ compatible = "mmc-pwrseq-emmc"; -+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; -+ clocks = <&wifi32k>; -+ clock-names = "ext_clock"; -+ }; -+ -+ ao_5v: regulator-ao_5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "AO_5V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ vcc_1v8: regulator-vcc_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VCC_1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc_3v3>; -+ regulator-always-on; -+ }; -+ -+ vcc_3v3: regulator-vcc_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VCC_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vddao_3v3>; -+ regulator-always-on; -+ /* FIXME: actually controlled by VDDCPU_B_EN */ -+ }; -+ -+ vddao_1v8: regulator-vddao_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDIO_AO1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vddao_3v3>; -+ regulator-always-on; -+ }; -+ -+ vddao_3v3: regulator-vddao_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDAO_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&ao_5v>; -+ regulator-always-on; -+ }; -+ -+ vddcpu_a: regulator-vddcpu-a { -+ /* -+ * MP8756GD Regulator. -+ */ -+ compatible = "pwm-regulator"; -+ -+ regulator-name = "VDDCPU_A"; -+ regulator-min-microvolt = <730000>; -+ regulator-max-microvolt = <1022000>; -+ -+ pwm-supply = <&ao_5v>; -+ -+ pwms = <&pwm_ab 0 1250 0>; -+ pwm-dutycycle-range = <100 0>; -+ -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vddcpu_b: regulator-vddcpu-b { -+ /* -+ * Silergy SY8120B1ABC Regulator. -+ */ -+ compatible = "pwm-regulator"; -+ -+ regulator-name = "VDDCPU_B"; -+ regulator-min-microvolt = <730000>; -+ regulator-max-microvolt = <1022000>; -+ -+ pwm-supply = <&ao_5v>; -+ -+ pwms = <&pwm_AO_cd 1 1250 0>; -+ pwm-dutycycle-range = <100 0>; -+ -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sound { -+ compatible = "amlogic,axg-sound-card"; -+ model = "RADXA-ZERO2"; -+ audio-aux-devs = <&tdmout_b>; -+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", -+ "TDMOUT_B IN 1", "FRDDR_B OUT 1", -+ "TDMOUT_B IN 2", "FRDDR_C OUT 1", -+ "TDM_B Playback", "TDMOUT_B OUT"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ status = "okay"; -+ -+ dai-link-0 { -+ sound-dai = <&frddr_a>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&frddr_b>; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&frddr_c>; -+ }; -+ -+ /* 8ch hdmi interface */ -+ dai-link-3 { -+ sound-dai = <&tdmif_b>; -+ dai-format = "i2s"; -+ dai-tdm-slot-tx-mask-0 = <1 1>; -+ dai-tdm-slot-tx-mask-1 = <1 1>; -+ dai-tdm-slot-tx-mask-2 = <1 1>; -+ dai-tdm-slot-tx-mask-3 = <1 1>; -+ mclk-fs = <256>; -+ -+ codec { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; -+ }; -+ }; -+ -+ /* hdmi glue */ -+ dai-link-4 { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+ -+ wifi32k: wifi32k { -+ compatible = "pwm-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ -+ }; -+}; -+ -+&arb { -+ status = "okay"; -+}; -+ -+&cec_AO { -+ pinctrl-0 = <&cec_ao_a_h_pins>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ hdmi-phandle = <&hdmi_tx>; -+}; -+ -+&cecb_AO { -+ pinctrl-0 = <&cec_ao_b_h_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ hdmi-phandle = <&hdmi_tx>; -+}; -+ -+&clkc_audio { -+ status = "okay"; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vddcpu_b>; -+ operating-points-v2 = <&cpu_opp_table_0>; -+ clocks = <&clkc CLKID_CPU_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vddcpu_b>; -+ operating-points-v2 = <&cpu_opp_table_0>; -+ clocks = <&clkc CLKID_CPU_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu100 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu101 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu102 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu103 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cvbs_vdac_port { -+ cvbs_vdac_out: endpoint { -+ remote-endpoint = <&cvbs_connector_in>; -+ }; -+}; -+ -+&frddr_a { -+ status = "okay"; -+}; -+ -+&frddr_b { -+ status = "okay"; -+}; -+ -+&frddr_c { -+ status = "okay"; -+}; -+ -+&gpio { -+ gpio-line-names = -+ /* GPIOZ */ -+ "PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40", -+ "", "", "", "", "", "", "", "", -+ /* GPIOH */ -+ "", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23", -+ "", -+ /* BOOT */ -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "EMMC_PWRSEQ", "", "", "", -+ /* GPIOC */ -+ "", "", "", "", "", "", "SD_CD", "PIN_36", -+ /* GPIOA */ -+ "PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "", -+ "", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5", -+ /* GPIOX */ -+ "", "", "", "", "", "", "SDIO_PWRSEQ", "", -+ "", "", "", "", "", "", "", "", -+ "", "BT_SHUTDOWN", "", ""; -+}; -+ -+&gpio_ao { -+ gpio-line-names = -+ /* GPIOAO */ -+ "PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29", -+ "PIN_33", "PIN_37", "FAN", "", -+ /* GPIOE */ -+ "", "", ""; -+}; -+ -+&hdmi_tx { -+ status = "okay"; -+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; -+ pinctrl-names = "default"; -+ hdmi-supply = <&ao_5v>; -+}; -+ -+&hdmi_tx_tmds_port { -+ hdmi_tx_tmds_out: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&ir { -+ status = "disabled"; -+ pinctrl-0 = <&remote_input_ao_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&pwm_ab { -+ pinctrl-0 = <&pwm_a_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&xtal>; -+ clock-names = "clkin0"; -+ status = "okay"; -+}; -+ -+&pwm_ef { -+ pinctrl-0 = <&pwm_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&xtal>; -+ clock-names = "clkin2"; -+ status = "okay"; -+}; -+ -+&pwm_AO_cd { -+ pinctrl-0 = <&pwm_ao_d_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&xtal>; -+ clock-names = "clkin4"; -+ status = "okay"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vddao_1v8>; -+}; -+ -+/* SDIO */ -+&sd_emmc_a { -+ status = "okay"; -+ pinctrl-0 = <&sdio_pins>; -+ pinctrl-1 = <&sdio_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ bus-width = <4>; -+ cap-sd-highspeed; -+ max-frequency = <100000000>; -+ -+ non-removable; -+ disable-wp; -+ -+ /* WiFi firmware requires power to be kept while in suspend */ -+ keep-power-in-suspend; -+ -+ mmc-pwrseq = <&sdio_pwrseq>; -+ -+ vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&vddao_1v8>; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+/* SD card */ -+&sd_emmc_b { -+ status = "okay"; -+ pinctrl-0 = <&sdcard_c_pins>; -+ pinctrl-1 = <&sdcard_clk_gate_c_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <4>; -+ cap-sd-highspeed; -+ max-frequency = <50000000>; -+ disable-wp; -+ -+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&vddao_3v3>; -+}; -+ -+/* eMMC */ -+&sd_emmc_c { -+ status = "okay"; -+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; -+ pinctrl-1 = <&emmc_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ mmc-ddr-1_8v; -+ mmc-hs200-1_8v; -+ max-frequency = <200000000>; -+ disable-wp; -+ -+ mmc-pwrseq = <&emmc_pwrseq>; -+ vmmc-supply = <&vcc_3v3>; -+ vqmmc-supply = <&vcc_1v8>; -+}; -+ -+&tdmif_b { -+ status = "okay"; -+}; -+ -+&tdmout_b { -+ status = "okay"; -+}; -+ -+&tohdmitx { -+ status = "okay"; -+}; -+ -+&uart_A { -+ status = "okay"; -+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; -+ pinctrl-names = "default"; -+ uart-has-rtscts; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; -+ max-speed = <2000000>; -+ clocks = <&wifi32k>; -+ clock-names = "lpo"; -+ }; -+}; -+ -+&usb { -+ status = "okay"; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch deleted file mode 100644 index b1d9d5550d..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0011-WIP-boards-amlogic-add-Radxa-Zero2-defconfig.patch +++ /dev/null @@ -1,110 +0,0 @@ -From e7babbfd6c66c20e81e9d728a6a4384a9a5885dd Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 15 Jan 2022 06:23:29 +0000 -Subject: [PATCH 11/22] WIP: boards: amlogic: add Radxa Zero2 defconfig - -Add a defconfig for the Radxa Zero2 SBC, using an Amlogic A311D chip. - -Signed-off-by: Christian Hewitt ---- - board/amlogic/w400/MAINTAINERS | 1 + - configs/radxa-zero2_defconfig | 77 ++++++++++++++++++++++++++++++++++ - 2 files changed, 78 insertions(+) - create mode 100644 configs/radxa-zero2_defconfig - -diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS -index 96ccda2001..caad41577d 100644 ---- a/board/amlogic/w400/MAINTAINERS -+++ b/board/amlogic/w400/MAINTAINERS -@@ -3,4 +3,5 @@ M: Neil Armstrong - S: Maintained - L: u-boot-amlogic@groups.io - F: board/amlogic/w400/ -+F: configs/radxa-zero2_defconfig - F: doc/board/amlogic/w400.rst -diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig -new file mode 100644 -index 0000000000..3ef3c9c143 ---- /dev/null -+++ b/configs/radxa-zero2_defconfig -@@ -0,0 +1,77 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_MESON=y -+CONFIG_TEXT_BASE=0x01000000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_DM_GPIO=y -+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2" -+CONFIG_MESON_G12A=y -+CONFIG_DEBUG_UART_BASE=0xff803000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING=" radxa-zero2" -+CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 -+CONFIG_REMAKE_ELF=y -+CONFIG_OF_BOARD_SETUP=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_MISC_INIT_R=y -+CONFIG_SYS_MAXARGS=32 -+# CONFIG_CMD_BDI is not set -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_GPIO=y -+# CONFIG_CMD_LOADS is not set -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+CONFIG_OF_CONTROL=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_MMC_MESON_GX=y -+CONFIG_MTD=y -+CONFIG_DM_MTD=y -+# CONFIG_PHY_REALTEK is not set -+CONFIG_DM_MDIO=y -+CONFIG_DM_MDIO_MUX=y -+# CONFIG_ETH_DESIGNWARE_MESON8B is not set -+CONFIG_MDIO_MUX_MESON_G12A=y -+CONFIG_MESON_G12A_USB_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_MESON_G12A=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_MESON_EE_POWER_DOMAIN=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_RESET=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_SKIP_INIT=y -+CONFIG_MESON_SERIAL=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_DWC3_MESON_G12A=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e -+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_VIDEO=y -+# CONFIG_VIDEO_BPP8 is not set -+# CONFIG_VIDEO_BPP16 is not set -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_MESON=y -+CONFIG_VIDEO_DT_SIMPLEFB=y -+CONFIG_SPLASH_SCREEN=y -+CONFIG_SPLASH_SCREEN_ALIGN=y -+CONFIG_VIDEO_BMP_RLE8=y -+CONFIG_BMP_16BPP=y -+CONFIG_BMP_24BPP=y -+CONFIG_BMP_32BPP=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0013-WIP-ARM-dts-import-Beelink-GT1-DT-from-Linux-5.21.patch b/projects/Amlogic/patches/u-boot/u-boot-0013-WIP-ARM-dts-import-Beelink-GT1-DT-from-Linux-5.21.patch deleted file mode 100644 index 786a26d81c..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0013-WIP-ARM-dts-import-Beelink-GT1-DT-from-Linux-5.21.patch +++ /dev/null @@ -1,128 +0,0 @@ -From 7ce3779954032f9ac2591a02df06282115032cb3 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Thu, 7 Jul 2022 10:24:03 +0000 -Subject: [PATCH 13/22] WIP: ARM: dts: import Beelink GT1 DT from Linux 5.21 - -Import the Beelink GT1 device-tree. - -Signed-off-by: Christian Hewitt ---- - .../dts/meson-gxm-gt1-ultimate-u-boot.dtsi | 7 ++ - arch/arm/dts/meson-gxm-gt1-ultimate.dts | 91 +++++++++++++++++++ - 2 files changed, 98 insertions(+) - create mode 100644 arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-gxm-gt1-ultimate.dts - -diff --git a/arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi b/arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi -new file mode 100644 -index 0000000000..39270ea71c ---- /dev/null -+++ b/arch/arm/dts/meson-gxm-gt1-ultimate-u-boot.dtsi -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 BayLibre, SAS. -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-gxl-u-boot.dtsi" -diff --git a/arch/arm/dts/meson-gxm-gt1-ultimate.dts b/arch/arm/dts/meson-gxm-gt1-ultimate.dts -new file mode 100644 -index 0000000000..2c267884cc ---- /dev/null -+++ b/arch/arm/dts/meson-gxm-gt1-ultimate.dts -@@ -0,0 +1,91 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-gxm.dtsi" -+#include "meson-gx-p23x-q20x.dtsi" -+#include -+#include -+ -+/ { -+ compatible = "azw,gt1-ultimate", "amlogic,s912", "amlogic,meson-gxm"; -+ model = "Beelink GT1 Ultimate"; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-white { -+ color = ; -+ function = LED_FUNCTION_POWER; -+ gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ panic-indicator; -+ }; -+ }; -+ -+ adc-keys { -+ compatible = "adc-keys"; -+ io-channels = <&saradc 0>; -+ io-channel-names = "buttons"; -+ keyup-threshold-microvolt = <1710000>; -+ -+ button-function { -+ label = "update"; -+ linux,code = ; -+ press-threshold-microvolt = <10000>; -+ }; -+ }; -+}; -+ -+ðmac { -+ pinctrl-0 = <ð_pins>; -+ pinctrl-names = "default"; -+ phy-handle = <&external_phy>; -+ amlogic,tx-delay-ns = <2>; -+ phy-mode = "rgmii"; -+}; -+ -+&external_mdio { -+ external_phy: ethernet-phy@0 { -+ /* Realtek RTL8211F (0x001cc916) */ -+ reg = <0>; -+ max-speed = <1000>; -+ -+ reset-assert-us = <10000>; -+ reset-deassert-us = <80000>; -+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; -+ -+ interrupt-parent = <&gpio_intc>; -+ /* MAC_INTR on GPIOZ_15 */ -+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; -+ }; -+}; -+ -+&ir { -+ linux,rc-map-name = "rc-beelink-gs1"; -+}; -+ -+&sd_emmc_a { -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+&uart_A { -+ status = "okay"; -+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; -+ pinctrl-names = "default"; -+ uart-has-rtscts; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; -+ max-speed = <2000000>; -+ clocks = <&wifi32k>; -+ clock-names = "lpo"; -+ }; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0016-WIP-ARM-dts-convert-bananapi-m5-to-dtsi.patch b/projects/Amlogic/patches/u-boot/u-boot-0016-WIP-ARM-dts-convert-bananapi-m5-to-dtsi.patch deleted file mode 100644 index eef144642c..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0016-WIP-ARM-dts-convert-bananapi-m5-to-dtsi.patch +++ /dev/null @@ -1,936 +0,0 @@ -From 0addaf5179afa1c985f493035a1dca8f1b23a4ed Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Fri, 17 Feb 2023 05:37:13 +0000 -Subject: [PATCH 16/22] WIP: ARM: dts: convert bananapi-m5 to dtsi - -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/meson-sm1-bananapi-m5.dts | 426 +----------------------- - arch/arm/dts/meson-sm1-bananapi.dtsi | 435 +++++++++++++++++++++++++ - 2 files changed, 436 insertions(+), 425 deletions(-) - create mode 100644 arch/arm/dts/meson-sm1-bananapi.dtsi - -diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts b/arch/arm/dts/meson-sm1-bananapi-m5.dts -index effaa138b5..34b3238ee0 100644 ---- a/arch/arm/dts/meson-sm1-bananapi-m5.dts -+++ b/arch/arm/dts/meson-sm1-bananapi-m5.dts -@@ -6,10 +6,7 @@ - - /dts-v1/; - --#include "meson-sm1.dtsi" --#include --#include --#include -+#include "meson-sm1-bananapi.dtsi" - #include - #include - -@@ -17,28 +14,6 @@ - compatible = "bananapi,bpi-m5", "amlogic,sm1"; - model = "Banana Pi BPI-M5"; - -- adc_keys { -- compatible = "adc-keys"; -- io-channels = <&saradc 2>; -- io-channel-names = "buttons"; -- keyup-threshold-microvolt = <1800000>; -- -- key { -- label = "SW3"; -- linux,code = ; -- press-threshold-microvolt = <1700000>; -- }; -- }; -- -- aliases { -- serial0 = &uart_AO; -- ethernet0 = ðmac; -- }; -- -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- - /* TOFIX: handle CVBS_DET on SARADC channel 0 */ - cvbs-connector { - compatible = "composite-video-connector"; -@@ -50,150 +25,6 @@ - }; - }; - -- emmc_pwrseq: emmc-pwrseq { -- compatible = "mmc-pwrseq-emmc"; -- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; -- }; -- -- gpio-keys { -- compatible = "gpio-keys"; -- -- key { -- label = "SW1"; -- linux,code = ; -- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; -- interrupt-parent = <&gpio_intc>; -- interrupts = <3 IRQ_TYPE_EDGE_BOTH>; -- }; -- }; -- -- hdmi-connector { -- compatible = "hdmi-connector"; -- type = "a"; -- -- port { -- hdmi_connector_in: endpoint { -- remote-endpoint = <&hdmi_tx_tmds_out>; -- }; -- }; -- }; -- -- leds { -- compatible = "gpio-leds"; -- -- green { -- color = ; -- function = LED_FUNCTION_STATUS; -- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; -- }; -- -- blue { -- color = ; -- function = LED_FUNCTION_STATUS; -- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "heartbeat"; -- }; -- }; -- -- memory@0 { -- device_type = "memory"; -- reg = <0x0 0x0 0x0 0x40000000>; -- }; -- -- emmc_1v8: regulator-emmc_1v8 { -- compatible = "regulator-fixed"; -- regulator-name = "EMMC_1V8"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -- vin-supply = <&vddao_3v3>; -- regulator-always-on; -- }; -- -- dc_in: regulator-dc_in { -- compatible = "regulator-fixed"; -- regulator-name = "DC_IN"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- regulator-always-on; -- }; -- -- vddio_c: regulator-vddio_c { -- compatible = "regulator-gpio"; -- regulator-name = "VDDIO_C"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- -- enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; -- enable-active-high; -- regulator-always-on; -- -- gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>; -- gpios-states = <1>; -- -- states = <1800000 0>, -- <3300000 1>; -- }; -- -- tflash_vdd: regulator-tflash_vdd { -- compatible = "regulator-fixed"; -- regulator-name = "TFLASH_VDD"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- vin-supply = <&dc_in>; -- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; -- enable-active-high; -- regulator-always-on; -- }; -- -- vddao_1v8: regulator-vddao_1v8 { -- compatible = "regulator-fixed"; -- regulator-name = "VDDAO_1V8"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -- vin-supply = <&vddao_3v3>; -- regulator-always-on; -- }; -- -- vddao_3v3: regulator-vddao_3v3 { -- compatible = "regulator-fixed"; -- regulator-name = "VDDAO_3V3"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- vin-supply = <&dc_in>; -- regulator-always-on; -- }; -- -- vddcpu: regulator-vddcpu { -- /* -- * SY8120B1ABC DC/DC Regulator. -- */ -- compatible = "pwm-regulator"; -- -- regulator-name = "VDDCPU"; -- regulator-min-microvolt = <690000>; -- regulator-max-microvolt = <1050000>; -- -- vin-supply = <&dc_in>; -- -- pwms = <&pwm_AO_cd 1 1250 0>; -- pwm-dutycycle-range = <100 0>; -- -- regulator-boot-on; -- regulator-always-on; -- }; -- -- /* USB Hub Power Enable */ -- vl_pwr_en: regulator-vl_pwr_en { -- compatible = "regulator-fixed"; -- regulator-name = "VL_PWR_EN"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- vin-supply = <&dc_in>; -- -- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; -- enable-active-high; -- }; -- - sound { - compatible = "amlogic,axg-sound-card"; - model = "BPI-M5"; -@@ -319,68 +150,17 @@ - status = "okay"; - }; - --&arb { -- status = "okay"; --}; - - &clkc_audio { - status = "okay"; - }; - --&cpu0 { -- cpu-supply = <&vddcpu>; -- operating-points-v2 = <&cpu_opp_table>; -- clocks = <&clkc CLKID_CPU_CLK>; -- clock-latency = <50000>; --}; -- --&cpu1 { -- cpu-supply = <&vddcpu>; -- operating-points-v2 = <&cpu_opp_table>; -- clocks = <&clkc CLKID_CPU1_CLK>; -- clock-latency = <50000>; --}; -- --&cpu2 { -- cpu-supply = <&vddcpu>; -- operating-points-v2 = <&cpu_opp_table>; -- clocks = <&clkc CLKID_CPU2_CLK>; -- clock-latency = <50000>; --}; -- --&cpu3 { -- cpu-supply = <&vddcpu>; -- operating-points-v2 = <&cpu_opp_table>; -- clocks = <&clkc CLKID_CPU3_CLK>; -- clock-latency = <50000>; --}; -- - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; - }; - --&ext_mdio { -- external_phy: ethernet-phy@0 { -- /* Realtek RTL8211F (0x001cc916) */ -- reg = <0>; -- max-speed = <1000>; -- -- interrupt-parent = <&gpio_intc>; -- /* MAC_INTR on GPIOZ_14 */ -- interrupts = <26 IRQ_TYPE_LEVEL_LOW>; -- }; --}; -- --ðmac { -- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; -- pinctrl-names = "default"; -- status = "okay"; -- phy-mode = "rgmii-txid"; -- phy-handle = <&external_phy>; --}; -- - &frddr_a { - status = "okay"; - }; -@@ -393,191 +173,6 @@ - status = "okay"; - }; - --&gpio { -- gpio-line-names = -- /* GPIOZ */ -- "ETH_MDIO", /* GPIOZ_0 */ -- "ETH_MDC", /* GPIOZ_1 */ -- "ETH_RXCLK", /* GPIOZ_2 */ -- "ETH_RX_DV", /* GPIOZ_3 */ -- "ETH_RXD0", /* GPIOZ_4 */ -- "ETH_RXD1", /* GPIOZ_5 */ -- "ETH_RXD2", /* GPIOZ_6 */ -- "ETH_RXD3", /* GPIOZ_7 */ -- "ETH_TXCLK", /* GPIOZ_8 */ -- "ETH_TXEN", /* GPIOZ_9 */ -- "ETH_TXD0", /* GPIOZ_10 */ -- "ETH_TXD1", /* GPIOZ_11 */ -- "ETH_TXD2", /* GPIOZ_12 */ -- "ETH_TXD3", /* GPIOZ_13 */ -- "ETH_INTR", /* GPIOZ_14 */ -- "ETH_NRST", /* GPIOZ_15 */ -- /* GPIOH */ -- "HDMI_SDA", /* GPIOH_0 */ -- "HDMI_SCL", /* GPIOH_1 */ -- "HDMI_HPD", /* GPIOH_2 */ -- "HDMI_CEC", /* GPIOH_3 */ -- "VL-RST_N", /* GPIOH_4 */ -- "CON1-P36", /* GPIOH_5 */ -- "VL-PWREN", /* GPIOH_6 */ -- "WiFi_3V3_1V8", /* GPIOH_7 */ -- "TFLASH_VDD_EN", /* GPIOH_8 */ -- /* BOOT */ -- "eMMC_D0", /* BOOT_0 */ -- "eMMC_D1", /* BOOT_1 */ -- "eMMC_D2", /* BOOT_2 */ -- "eMMC_D3", /* BOOT_3 */ -- "eMMC_D4", /* BOOT_4 */ -- "eMMC_D5", /* BOOT_5 */ -- "eMMC_D6", /* BOOT_6 */ -- "eMMC_D7", /* BOOT_7 */ -- "eMMC_CLK", /* BOOT_8 */ -- "", -- "eMMC_CMD", /* BOOT_10 */ -- "", -- "eMMC_RST#", /* BOOT_12 */ -- "eMMC_DS", /* BOOT_13 */ -- /* GPIOC */ -- "SD_D0_B", /* GPIOC_0 */ -- "SD_D1_B", /* GPIOC_1 */ -- "SD_D2_B", /* GPIOC_2 */ -- "SD_D3_B", /* GPIOC_3 */ -- "SD_CLK_B", /* GPIOC_4 */ -- "SD_CMD_B", /* GPIOC_5 */ -- "CARD_EN_DET", /* GPIOC_6 */ -- "", -- /* GPIOA */ -- "", "", "", "", "", "", "", "", -- "", "", "", "", "", "", -- "CON1-P27", /* GPIOA_14 */ -- "CON1-P28", /* GPIOA_15 */ -- /* GPIOX */ -- "CON1-P16", /* GPIOX_0 */ -- "CON1-P18", /* GPIOX_1 */ -- "CON1-P22", /* GPIOX_2 */ -- "CON1-P11", /* GPIOX_3 */ -- "CON1-P13", /* GPIOX_4 */ -- "CON1-P07", /* GPIOX_5 */ -- "CON1-P33", /* GPIOX_6 */ -- "CON1-P15", /* GPIOX_7 */ -- "CON1-P19", /* GPIOX_8 */ -- "CON1-P21", /* GPIOX_9 */ -- "CON1-P24", /* GPIOX_10 */ -- "CON1-P23", /* GPIOX_11 */ -- "CON1-P08", /* GPIOX_12 */ -- "CON1-P10", /* GPIOX_13 */ -- "CON1-P29", /* GPIOX_14 */ -- "CON1-P31", /* GPIOX_15 */ -- "CON1-P26", /* GPIOX_16 */ -- "CON1-P03", /* GPIOX_17 */ -- "CON1-P05", /* GPIOX_18 */ -- "CON1-P32"; /* GPIOX_19 */ -- -- /* -- * WARNING: The USB Hub on the BPI-M5 needs a reset signal -- * to be turned high in order to be detected by the USB Controller -- * This signal should be handled by a USB specific power sequence -- * in order to reset the Hub when USB bus is powered down. -- */ -- usb-hub { -- gpio-hog; -- gpios = ; -- output-high; -- line-name = "usb-hub-reset"; -- }; --}; -- --&gpio_ao { -- gpio-line-names = -- /* GPIOAO */ -- "DEBUG TX", /* GPIOAO_0 */ -- "DEBUG RX", /* GPIOAO_1 */ -- "SYS_LED2", /* GPIOAO_2 */ -- "UPDATE_KEY", /* GPIOAO_3 */ -- "CON1-P40", /* GPIOAO_4 */ -- "IR_IN", /* GPIOAO_5 */ -- "TF_3V3N_1V8_EN", /* GPIOAO_6 */ -- "CON1-P35", /* GPIOAO_7 */ -- "CON1-P12", /* GPIOAO_8 */ -- "CON1-P37", /* GPIOAO_9 */ -- "CON1-P38", /* GPIOAO_10 */ -- "SYS_LED", /* GPIOAO_11 */ -- /* GPIOE */ -- "VDDEE_PWM", /* GPIOE_0 */ -- "VDDCPU_PWM", /* GPIOE_1 */ -- "TF_PWR_EN"; /* GPIOE_2 */ --}; -- --&hdmi_tx { -- status = "okay"; -- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; -- pinctrl-names = "default"; -- hdmi-supply = <&dc_in>; --}; -- --&hdmi_tx_tmds_port { -- hdmi_tx_tmds_out: endpoint { -- remote-endpoint = <&hdmi_connector_in>; -- }; --}; -- --&ir { -- status = "okay"; -- pinctrl-0 = <&remote_input_ao_pins>; -- pinctrl-names = "default"; --}; -- --&pwm_AO_cd { -- pinctrl-0 = <&pwm_ao_d_e_pins>; -- pinctrl-names = "default"; -- clocks = <&xtal>; -- clock-names = "clkin1"; -- status = "okay"; --}; -- --&saradc { -- status = "okay"; -- vref-supply = <&vddao_1v8>; --}; -- --/* SD card */ --&sd_emmc_b { -- status = "okay"; -- pinctrl-0 = <&sdcard_c_pins>; -- pinctrl-1 = <&sdcard_clk_gate_c_pins>; -- pinctrl-names = "default", "clk-gate"; -- -- bus-width = <4>; -- cap-sd-highspeed; -- max-frequency = <50000000>; -- disable-wp; -- -- /* TOFIX: SD card is barely usable in SDR modes */ -- -- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; -- vmmc-supply = <&tflash_vdd>; -- vqmmc-supply = <&vddio_c>; --}; -- --/* eMMC */ --&sd_emmc_c { -- status = "okay"; -- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; -- pinctrl-1 = <&emmc_clk_gate_pins>; -- pinctrl-names = "default", "clk-gate"; -- -- bus-width = <8>; -- cap-mmc-highspeed; -- mmc-ddr-1_8v; -- mmc-hs200-1_8v; -- max-frequency = <200000000>; -- disable-wp; -- -- mmc-pwrseq = <&emmc_pwrseq>; -- vmmc-supply = <&vddao_3v3>; -- vqmmc-supply = <&emmc_1v8>; --}; -- - &tdmif_b { - status = "okay"; - }; -@@ -625,22 +220,3 @@ - &toddr_c { - status = "okay"; - }; -- --&uart_AO { -- status = "okay"; -- pinctrl-0 = <&uart_ao_a_pins>; -- pinctrl-names = "default"; --}; -- --&usb { -- status = "okay"; --}; -- --&usb2_phy0 { -- phy-supply = <&dc_in>; --}; -- --&usb2_phy1 { -- /* Enable the hub which is connected to this port */ -- phy-supply = <&vl_pwr_en>; --}; -diff --git a/arch/arm/dts/meson-sm1-bananapi.dtsi b/arch/arm/dts/meson-sm1-bananapi.dtsi -new file mode 100644 -index 0000000000..c914f11481 ---- /dev/null -+++ b/arch/arm/dts/meson-sm1-bananapi.dtsi -@@ -0,0 +1,435 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 BayLibre SAS -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-sm1.dtsi" -+#include -+#include -+#include -+ -+/ { -+ adc_keys { -+ compatible = "adc-keys"; -+ io-channels = <&saradc 2>; -+ io-channel-names = "buttons"; -+ keyup-threshold-microvolt = <1800000>; -+ -+ key { -+ label = "SW3"; -+ linux,code = ; -+ press-threshold-microvolt = <1700000>; -+ }; -+ }; -+ -+ aliases { -+ serial0 = &uart_AO; -+ ethernet0 = ðmac; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ emmc_pwrseq: emmc-pwrseq { -+ compatible = "mmc-pwrseq-emmc"; -+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ -+ key { -+ label = "SW1"; -+ linux,code = ; -+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; -+ interrupt-parent = <&gpio_intc>; -+ interrupts = <3 IRQ_TYPE_EDGE_BOTH>; -+ }; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_tx_tmds_out>; -+ }; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-green { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-blue { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x40000000>; -+ }; -+ -+ emmc_1v8: regulator-emmc_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "EMMC_1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vddao_3v3>; -+ regulator-always-on; -+ }; -+ -+ dc_in: regulator-dc_in { -+ compatible = "regulator-fixed"; -+ regulator-name = "DC_IN"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ vddio_c: regulator-vddio_c { -+ compatible = "regulator-gpio"; -+ regulator-name = "VDDIO_C"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ -+ enable-gpio = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>; -+ enable-active-high; -+ regulator-always-on; -+ -+ gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>; -+ gpios-states = <1>; -+ -+ states = <1800000 0>, -+ <3300000 1>; -+ }; -+ -+ tflash_vdd: regulator-tflash_vdd { -+ compatible = "regulator-fixed"; -+ regulator-name = "TFLASH_VDD"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&dc_in>; -+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; -+ enable-active-high; -+ regulator-always-on; -+ }; -+ -+ vddao_1v8: regulator-vddao_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDAO_1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vddao_3v3>; -+ regulator-always-on; -+ }; -+ -+ vddao_3v3: regulator-vddao_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDAO_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&dc_in>; -+ regulator-always-on; -+ }; -+ -+ vddcpu: regulator-vddcpu { -+ /* -+ * SY8120B1ABC DC/DC Regulator. -+ */ -+ compatible = "pwm-regulator"; -+ -+ regulator-name = "VDDCPU"; -+ regulator-min-microvolt = <690000>; -+ regulator-max-microvolt = <1050000>; -+ -+ pwm-supply = <&dc_in>; -+ -+ pwms = <&pwm_AO_cd 1 1250 0>; -+ pwm-dutycycle-range = <100 0>; -+ -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* USB Hub Power Enable */ -+ vl_pwr_en: regulator-vl_pwr_en { -+ compatible = "regulator-fixed"; -+ regulator-name = "VL_PWR_EN"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&dc_in>; -+ -+ gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+}; -+ -+&arb { -+ status = "okay"; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vddcpu>; -+ operating-points-v2 = <&cpu_opp_table>; -+ clocks = <&clkc CLKID_CPU_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vddcpu>; -+ operating-points-v2 = <&cpu_opp_table>; -+ clocks = <&clkc CLKID_CPU1_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vddcpu>; -+ operating-points-v2 = <&cpu_opp_table>; -+ clocks = <&clkc CLKID_CPU2_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vddcpu>; -+ operating-points-v2 = <&cpu_opp_table>; -+ clocks = <&clkc CLKID_CPU3_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&ext_mdio { -+ external_phy: ethernet-phy@0 { -+ /* Realtek RTL8211F (0x001cc916) */ -+ reg = <0>; -+ max-speed = <1000>; -+ -+ interrupt-parent = <&gpio_intc>; -+ /* MAC_INTR on GPIOZ_14 */ -+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; -+ }; -+}; -+ -+ðmac { -+ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ phy-mode = "rgmii-txid"; -+ phy-handle = <&external_phy>; -+}; -+ -+&gpio { -+ gpio-line-names = -+ /* GPIOZ */ -+ "ETH_MDIO", /* GPIOZ_0 */ -+ "ETH_MDC", /* GPIOZ_1 */ -+ "ETH_RXCLK", /* GPIOZ_2 */ -+ "ETH_RX_DV", /* GPIOZ_3 */ -+ "ETH_RXD0", /* GPIOZ_4 */ -+ "ETH_RXD1", /* GPIOZ_5 */ -+ "ETH_RXD2", /* GPIOZ_6 */ -+ "ETH_RXD3", /* GPIOZ_7 */ -+ "ETH_TXCLK", /* GPIOZ_8 */ -+ "ETH_TXEN", /* GPIOZ_9 */ -+ "ETH_TXD0", /* GPIOZ_10 */ -+ "ETH_TXD1", /* GPIOZ_11 */ -+ "ETH_TXD2", /* GPIOZ_12 */ -+ "ETH_TXD3", /* GPIOZ_13 */ -+ "ETH_INTR", /* GPIOZ_14 */ -+ "ETH_NRST", /* GPIOZ_15 */ -+ /* GPIOH */ -+ "HDMI_SDA", /* GPIOH_0 */ -+ "HDMI_SCL", /* GPIOH_1 */ -+ "HDMI_HPD", /* GPIOH_2 */ -+ "HDMI_CEC", /* GPIOH_3 */ -+ "VL-RST_N", /* GPIOH_4 */ -+ "CON1-P36", /* GPIOH_5 */ -+ "VL-PWREN", /* GPIOH_6 */ -+ "WiFi_3V3_1V8", /* GPIOH_7 */ -+ "TFLASH_VDD_EN", /* GPIOH_8 */ -+ /* BOOT */ -+ "eMMC_D0", /* BOOT_0 */ -+ "eMMC_D1", /* BOOT_1 */ -+ "eMMC_D2", /* BOOT_2 */ -+ "eMMC_D3", /* BOOT_3 */ -+ "eMMC_D4", /* BOOT_4 */ -+ "eMMC_D5", /* BOOT_5 */ -+ "eMMC_D6", /* BOOT_6 */ -+ "eMMC_D7", /* BOOT_7 */ -+ "eMMC_CLK", /* BOOT_8 */ -+ "", -+ "eMMC_CMD", /* BOOT_10 */ -+ "", -+ "eMMC_RST#", /* BOOT_12 */ -+ "eMMC_DS", /* BOOT_13 */ -+ "", "", -+ /* GPIOC */ -+ "SD_D0_B", /* GPIOC_0 */ -+ "SD_D1_B", /* GPIOC_1 */ -+ "SD_D2_B", /* GPIOC_2 */ -+ "SD_D3_B", /* GPIOC_3 */ -+ "SD_CLK_B", /* GPIOC_4 */ -+ "SD_CMD_B", /* GPIOC_5 */ -+ "CARD_EN_DET", /* GPIOC_6 */ -+ "", -+ /* GPIOA */ -+ "", "", "", "", "", "", "", "", -+ "", "", "", "", "", "", -+ "CON1-P27", /* GPIOA_14 */ -+ "CON1-P28", /* GPIOA_15 */ -+ /* GPIOX */ -+ "CON1-P16", /* GPIOX_0 */ -+ "CON1-P18", /* GPIOX_1 */ -+ "CON1-P22", /* GPIOX_2 */ -+ "CON1-P11", /* GPIOX_3 */ -+ "CON1-P13", /* GPIOX_4 */ -+ "CON1-P07", /* GPIOX_5 */ -+ "CON1-P33", /* GPIOX_6 */ -+ "CON1-P15", /* GPIOX_7 */ -+ "CON1-P19", /* GPIOX_8 */ -+ "CON1-P21", /* GPIOX_9 */ -+ "CON1-P24", /* GPIOX_10 */ -+ "CON1-P23", /* GPIOX_11 */ -+ "CON1-P08", /* GPIOX_12 */ -+ "CON1-P10", /* GPIOX_13 */ -+ "CON1-P29", /* GPIOX_14 */ -+ "CON1-P31", /* GPIOX_15 */ -+ "CON1-P26", /* GPIOX_16 */ -+ "CON1-P03", /* GPIOX_17 */ -+ "CON1-P05", /* GPIOX_18 */ -+ "CON1-P32"; /* GPIOX_19 */ -+ -+ /* -+ * WARNING: The USB Hub needs a reset signal to be turned high in -+ * order to be detected by the USB Controller. This signal should -+ * be handled by a USB specific power sequence to reset the Hub -+ * when the USB bus is powered down. -+ */ -+ usb-hub { -+ gpio-hog; -+ gpios = ; -+ output-high; -+ line-name = "usb-hub-reset"; -+ }; -+}; -+ -+&gpio_ao { -+ gpio-line-names = -+ /* GPIOAO */ -+ "DEBUG TX", /* GPIOAO_0 */ -+ "DEBUG RX", /* GPIOAO_1 */ -+ "SYS_LED2", /* GPIOAO_2 */ -+ "UPDATE_KEY", /* GPIOAO_3 */ -+ "CON1-P40", /* GPIOAO_4 */ -+ "IR_IN", /* GPIOAO_5 */ -+ "TF_3V3N_1V8_EN", /* GPIOAO_6 */ -+ "CON1-P35", /* GPIOAO_7 */ -+ "CON1-P12", /* GPIOAO_8 */ -+ "CON1-P37", /* GPIOAO_9 */ -+ "CON1-P38", /* GPIOAO_10 */ -+ "SYS_LED", /* GPIOAO_11 */ -+ /* GPIOE */ -+ "VDDEE_PWM", /* GPIOE_0 */ -+ "VDDCPU_PWM", /* GPIOE_1 */ -+ "TF_PWR_EN"; /* GPIOE_2 */ -+}; -+ -+&hdmi_tx { -+ status = "okay"; -+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; -+ pinctrl-names = "default"; -+ hdmi-supply = <&dc_in>; -+}; -+ -+&hdmi_tx_tmds_port { -+ hdmi_tx_tmds_out: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&ir { -+ status = "okay"; -+ pinctrl-0 = <&remote_input_ao_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&pwm_AO_cd { -+ pinctrl-0 = <&pwm_ao_d_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&xtal>; -+ clock-names = "clkin1"; -+ status = "okay"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vddao_1v8>; -+}; -+ -+/* SD card */ -+&sd_emmc_b { -+ status = "okay"; -+ pinctrl-0 = <&sdcard_c_pins>; -+ pinctrl-1 = <&sdcard_clk_gate_c_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <4>; -+ cap-sd-highspeed; -+ max-frequency = <50000000>; -+ disable-wp; -+ -+ /* TOFIX: SD card is barely usable in SDR modes */ -+ -+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <&tflash_vdd>; -+ vqmmc-supply = <&vddio_c>; -+}; -+ -+/* eMMC */ -+&sd_emmc_c { -+ status = "okay"; -+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; -+ pinctrl-1 = <&emmc_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ mmc-ddr-1_8v; -+ mmc-hs200-1_8v; -+ max-frequency = <200000000>; -+ disable-wp; -+ -+ mmc-pwrseq = <&emmc_pwrseq>; -+ vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&emmc_1v8>; -+}; -+ -+&uart_AO { -+ status = "okay"; -+ pinctrl-0 = <&uart_ao_a_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&usb { -+ status = "okay"; -+}; -+ -+&usb2_phy0 { -+ phy-supply = <&dc_in>; -+}; -+ -+&usb2_phy1 { -+ /* Enable the hub which is connected to this port */ -+ phy-supply = <&vl_pwr_en>; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0017-WIP-ARM-dts-add-support-for-BananaPi-M2-Pro.patch b/projects/Amlogic/patches/u-boot/u-boot-0017-WIP-ARM-dts-add-support-for-BananaPi-M2-Pro.patch deleted file mode 100644 index aa2db89932..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0017-WIP-ARM-dts-add-support-for-BananaPi-M2-Pro.patch +++ /dev/null @@ -1,152 +0,0 @@ -From dbf80e3d843cb58b9098d7c0e24c9ab1208003a7 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Fri, 17 Feb 2023 05:38:46 +0000 -Subject: [PATCH 17/22] WIP: ARM: dts: add support for BananaPi M2-Pro - -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/Makefile | 1 + - .../dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi | 13 +++ - arch/arm/dts/meson-sm1-bananapi-m2-pro.dts | 98 +++++++++++++++++++ - 3 files changed, 112 insertions(+) - create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 926ae0aae4..4e9fa81e18 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ - meson-g12b-odroid-n2.dtb \ - meson-g12b-odroid-n2-plus.dtb \ - meson-g12b-radxa-zero2.dtb \ -+ meson-sm1-bananapi-m2-pro.dtb \ - meson-sm1-bananapi-m5.dtb \ - meson-sm1-khadas-vim3l.dtb \ - meson-sm1-odroid-c4.dtb \ -diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi -new file mode 100644 -index 0000000000..a86fdb5668 ---- /dev/null -+++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 BayLibre, SAS -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-sm1-u-boot.dtsi" -+ -+ðmac { -+ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; -+ snps,reset-delays-us = <0 10000 1000000>; -+ snps,reset-active-low; -+}; -diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts -new file mode 100644 -index 0000000000..4890d5d9a4 ---- /dev/null -+++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts -@@ -0,0 +1,98 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 BayLibre SAS -+ * Author: Neil Armstrong -+ */ -+ -+/dts-v1/; -+ -+#include "meson-sm1-bananapi.dtsi" -+#include -+ -+/ { -+ compatible = "bananapi,bpi-m2-pro", "amlogic,sm1"; -+ model = "Banana Pi BPI-M2-PRO"; -+ -+ sound { -+ compatible = "amlogic,axg-sound-card"; -+ model = "BPI-M2-PRO"; -+ audio-aux-devs = <&tdmout_b>; -+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", -+ "TDMOUT_B IN 1", "FRDDR_B OUT 1", -+ "TDMOUT_B IN 2", "FRDDR_C OUT 1", -+ "TDM_B Playback", "TDMOUT_B OUT"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ status = "okay"; -+ -+ dai-link-0 { -+ sound-dai = <&frddr_a>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&frddr_b>; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&frddr_c>; -+ }; -+ -+ /* 8ch hdmi interface */ -+ dai-link-3 { -+ sound-dai = <&tdmif_b>; -+ dai-format = "i2s"; -+ dai-tdm-slot-tx-mask-0 = <1 1>; -+ dai-tdm-slot-tx-mask-1 = <1 1>; -+ dai-tdm-slot-tx-mask-2 = <1 1>; -+ dai-tdm-slot-tx-mask-3 = <1 1>; -+ mclk-fs = <256>; -+ -+ codec { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; -+ }; -+ }; -+ -+ /* hdmi glue */ -+ dai-link-4 { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+}; -+ -+&clkc_audio { -+ status = "okay"; -+}; -+ -+&frddr_a { -+ status = "okay"; -+}; -+ -+&frddr_b { -+ status = "okay"; -+}; -+ -+&frddr_c { -+ status = "okay"; -+}; -+ -+&tdmif_b { -+ status = "okay"; -+}; -+ -+&tdmout_b { -+ status = "okay"; -+}; -+ -+&tohdmitx { -+ status = "okay"; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0018-WIP-boards-add-BananaPi-M2-Pro-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0018-WIP-boards-add-BananaPi-M2-Pro-defconfig.patch deleted file mode 100644 index e17be8f0c5..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0018-WIP-boards-add-BananaPi-M2-Pro-defconfig.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 0be895d75648124c0bd8d7fce1fe61c3dbacbe5f Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Fri, 17 Feb 2023 05:41:36 +0000 -Subject: [PATCH 18/22] WIP: boards: add BananaPi M2-Pro defconfig - -Signed-off-by: Christian Hewitt ---- - configs/bananapi-m2-pro_defconfig | 76 +++++++++++++++++++++++++++++++ - 1 file changed, 76 insertions(+) - create mode 100644 configs/bananapi-m2-pro_defconfig - -diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig -new file mode 100644 -index 0000000000..1c2b8ab95e ---- /dev/null -+++ b/configs/bananapi-m2-pro_defconfig -@@ -0,0 +1,76 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_MESON=y -+CONFIG_SYS_TEXT_BASE=0x01000000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_DM_GPIO=y -+CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m2-pro" -+CONFIG_MESON_G12A=y -+CONFIG_DEBUG_UART_BASE=0xff803000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING="bpi-m2-pro" -+CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 -+CONFIG_REMAKE_ELF=y -+CONFIG_OF_BOARD_SETUP=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_MISC_INIT_R=y -+CONFIG_SYS_MAXARGS=32 -+# CONFIG_CMD_BDI is not set -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_GPIO=y -+# CONFIG_CMD_LOADS is not set -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+CONFIG_OF_CONTROL=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_ADC=y -+CONFIG_SARADC_MESON=y -+CONFIG_MMC_MESON_GX=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DM_MDIO=y -+CONFIG_DM_MDIO_MUX=y -+CONFIG_ETH_DESIGNWARE_MESON8B=y -+CONFIG_MDIO_MUX_MESON_G12A=y -+CONFIG_MESON_G12A_USB_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_MESON_G12A=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_MESON_EE_POWER_DOMAIN=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_RESET=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_SKIP_INIT=y -+CONFIG_MESON_SERIAL=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_DWC3_MESON_G12A=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e -+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_DM_VIDEO=y -+# CONFIG_VIDEO_BPP8 is not set -+# CONFIG_VIDEO_BPP16 is not set -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_MESON=y -+CONFIG_VIDEO_DT_SIMPLEFB=y -+CONFIG_SPLASH_SCREEN=y -+CONFIG_SPLASH_SCREEN_ALIGN=y -+CONFIG_VIDEO_BMP_RLE8=y -+CONFIG_BMP_16BPP=y -+CONFIG_BMP_24BPP=y -+CONFIG_BMP_32BPP=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0020-WIP-boards-add-BananaPi-M2S-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0020-WIP-boards-add-BananaPi-M2S-defconfig.patch deleted file mode 100644 index 82df4f88b2..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0020-WIP-boards-add-BananaPi-M2S-defconfig.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 665eff902425685a2278e393a89452276e4ea665 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 18 Feb 2023 08:06:04 +0000 -Subject: [PATCH 20/22] WIP: boards: add BananaPi M2S defconfig - -Signed-off-by: Christian Hewitt ---- - configs/bananapi-m2s_defconfig | 82 ++++++++++++++++++++++++++++++++++ - 1 file changed, 82 insertions(+) - create mode 100644 configs/bananapi-m2s_defconfig - -diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig -new file mode 100644 -index 0000000000..7a35ea623d ---- /dev/null -+++ b/configs/bananapi-m2s_defconfig -@@ -0,0 +1,82 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_MESON=y -+CONFIG_SYS_TEXT_BASE=0x01000000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x2000 -+CONFIG_DM_GPIO=y -+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-bananapi-m2s" -+CONFIG_MESON_G12A=y -+CONFIG_DEBUG_UART_BASE=0xff803000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING=" bpi-m2s" -+CONFIG_SYS_LOAD_ADDR=0x1000000 -+CONFIG_DEBUG_UART=y -+CONFIG_AHCI=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 -+CONFIG_REMAKE_ELF=y -+CONFIG_OF_BOARD_SETUP=y -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_MISC_INIT_R=y -+CONFIG_SYS_MAXARGS=32 -+# CONFIG_CMD_BDI is not set -+# CONFIG_CMD_IMI is not set -+CONFIG_CMD_GPIO=y -+# CONFIG_CMD_LOADS is not set -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+CONFIG_OF_CONTROL=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_ADC=y -+CONFIG_SARADC_MESON=y -+CONFIG_AHCI_PCI=y -+CONFIG_MMC_MESON_GX=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DM_MDIO=y -+CONFIG_DM_MDIO_MUX=y -+CONFIG_ETH_DESIGNWARE_MESON8B=y -+CONFIG_MDIO_MUX_MESON_G12A=y -+CONFIG_PCI=y -+CONFIG_PCIE_DW_MESON=y -+CONFIG_MESON_G12A_USB_PHY=y -+CONFIG_PINCTRL=y -+CONFIG_PINCTRL_MESON_G12A=y -+CONFIG_POWER_DOMAIN=y -+CONFIG_MESON_EE_POWER_DOMAIN=y -+CONFIG_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_DM_RESET=y -+CONFIG_DEBUG_UART_ANNOUNCE=y -+CONFIG_DEBUG_UART_SKIP_INIT=y -+CONFIG_MESON_SERIAL=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_DWC3_MESON_G12A=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e -+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_DM_VIDEO=y -+# CONFIG_VIDEO_BPP8 is not set -+# CONFIG_VIDEO_BPP16 is not set -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_VIDEO_MESON=y -+CONFIG_VIDEO_DT_SIMPLEFB=y -+CONFIG_SPLASH_SCREEN=y -+CONFIG_SPLASH_SCREEN_ALIGN=y -+CONFIG_VIDEO_BMP_RLE8=y -+CONFIG_BMP_16BPP=y -+CONFIG_BMP_24BPP=y -+CONFIG_BMP_32BPP=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.34.1 - diff --git a/projects/Amlogic/patches/u-boot/u-boot-0022-WIP-ARM-dts-add-support-for-BananaPi-M2S.patch b/projects/Amlogic/patches/u-boot/u-boot-0022-WIP-ARM-dts-add-support-for-BananaPi-M2S.patch deleted file mode 100644 index fe9a7d6e12..0000000000 --- a/projects/Amlogic/patches/u-boot/u-boot-0022-WIP-ARM-dts-add-support-for-BananaPi-M2S.patch +++ /dev/null @@ -1,651 +0,0 @@ -From 821819ff0d9185954b251d5fd197b5b67cdd08d3 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 18 Feb 2023 07:59:25 +0000 -Subject: [PATCH 22/22] WIP: ARM: dts: add support for BananaPi M2S - -Import the device-tree from Linux 6.x - -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/Makefile | 1 + - .../arm/dts/meson-g12b-a311d-bananapi-m2s.dts | 14 + - arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi | 13 + - arch/arm/dts/meson-g12b-bananapi.dtsi | 551 ++++++++++++++++++ - .../arm/dts/meson-g12b-s922x-bananapi-m2s.dts | 14 + - 5 files changed, 593 insertions(+) - create mode 100644 arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts - create mode 100644 arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-g12b-bananapi.dtsi - create mode 100644 arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 4e9fa81e18..788fec93a3 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -196,6 +196,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ - meson-g12a-radxa-zero.dtb \ - meson-g12a-sei510.dtb \ - meson-g12a-u200.dtb \ -+ meson-g12b-a311d-bananapi-m2s.dtb \ - meson-g12b-a311d-khadas-vim3.dtb \ - meson-g12b-gtking.dtb \ - meson-g12b-gtking-pro.dtb \ -diff --git a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts -new file mode 100644 -index 0000000000..f6c950919b ---- /dev/null -+++ b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2023 Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-g12b-a311d.dtsi" -+#include "meson-g12b-bananapi.dtsi" -+ -+/ { -+ compatible = "bananapi,bpi-m2s", "amlogic,a311d", "amlogic,g12b"; -+ model = "BananaPi M2S"; -+}; -diff --git a/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi b/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi -new file mode 100644 -index 0000000000..a92f9e9ff1 ---- /dev/null -+++ b/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 BayLibre, SAS. -+ * Author: Neil Armstrong -+ */ -+ -+#include "meson-g12-common-u-boot.dtsi" -+ -+/* SARADC is needed for proper board variant detection */ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vddao_1v8>; -+}; -diff --git a/arch/arm/dts/meson-g12b-bananapi.dtsi b/arch/arm/dts/meson-g12b-bananapi.dtsi -new file mode 100644 -index 0000000000..3a9f36ad4e ---- /dev/null -+++ b/arch/arm/dts/meson-g12b-bananapi.dtsi -@@ -0,0 +1,551 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2023 Christian Hewitt -+ */ -+ -+#include -+#include -+#include -+#include -+ -+/ { -+ aliases { -+ serial0 = &uart_AO; -+ serial2 = &uart_A; -+ ethernet0 = ðmac; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x80000000>; -+ }; -+ -+ adc-keys { -+ compatible = "adc-keys"; -+ io-channels = <&saradc 2>; -+ io-channel-names = "buttons"; -+ keyup-threshold-microvolt = <1800000>; -+ -+ button-function { -+ label = "RST"; -+ linux,code = ; -+ press-threshold-microvolt = <40000>; -+ }; -+ }; -+ -+ emmc_pwrseq: emmc-pwrseq { -+ compatible = "mmc-pwrseq-emmc"; -+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; -+ }; -+ -+ fan0: pwm-fan { -+ compatible = "pwm-fan"; -+ #cooling-cells = <2>; -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ cooling-levels = <0 120 170 220>; -+ pwms = <&pwm_cd 1 40000 0>; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_tx_tmds_out>; -+ }; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ green { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ blue { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; -+ clocks = <&wifi32k>; -+ clock-names = "ext_clock"; -+ }; -+ -+ wifi32k: wifi32k { -+ compatible = "pwm-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ -+ }; -+ -+ dc_in: regulator-dc_in { -+ compatible = "regulator-fixed"; -+ regulator-name = "DC_IN"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ vcc_5v: regulator-vcc_5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "VCC_5V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&dc_in>; -+ -+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; -+ enable-active-high; -+ }; -+ -+ vcc_3v3: regulator-vcc_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VCC_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vsys_3v3>; -+ regulator-always-on; -+ }; -+ -+ vcc_1v8: regulator-vcc_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VCC_1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc_3v3>; -+ regulator-always-on; -+ }; -+ -+ vddao_1v8: regulator-vddao_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDIO_AO1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vsys_3v3>; -+ regulator-always-on; -+ }; -+ -+ vddcpu_a: regulator-vddcpu-a { -+ compatible = "pwm-regulator"; -+ regulator-name = "VDDCPU_A"; -+ regulator-min-microvolt = <690000>; -+ regulator-max-microvolt = <1050000>; -+ pwm-supply = <&dc_in>; -+ pwms = <&pwm_ab 0 1250 0>; -+ pwm-dutycycle-range = <100 0>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vddcpu_b: regulator-vddcpu-b { -+ compatible = "pwm-regulator"; -+ regulator-name = "VDDCPU_B"; -+ regulator-min-microvolt = <690000>; -+ regulator-max-microvolt = <1050000>; -+ pwm-supply = <&vsys_3v3>; -+ pwms = <&pwm_AO_cd 1 1250 0>; -+ pwm-dutycycle-range = <100 0>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vsys_3v3: regulator-vsys_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VSYS_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&dc_in>; -+ regulator-always-on; -+ }; -+ -+ emmc_1v8: regulator-emmc_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "EMMC_AO1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc_3v3>; -+ regulator-always-on; -+ }; -+ -+ usb_pwr: regulator-usb_pwr { -+ compatible = "regulator-fixed"; -+ regulator-name = "USB_PWR"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_5v>; -+ -+ gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+ -+ sound { -+ compatible = "amlogic,axg-sound-card"; -+ model = "BPI-M2S"; -+ audio-aux-devs = <&tdmin_a>, <&tdmout_a>; -+ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", -+ "TDMOUT_A IN 1", "FRDDR_B OUT 0", -+ "TDMOUT_A IN 2", "FRDDR_C OUT 0", -+ "TDM_A Playback", "TDMOUT_A OUT", -+ "TDMIN_A IN 0", "TDM_A Capture", -+ "TDMIN_A IN 3", "TDM_A Loopback", -+ "TODDR_A IN 0", "TDMIN_A OUT", -+ "TODDR_B IN 0", "TDMIN_A OUT", -+ "TODDR_C IN 0", "TDMIN_A OUT"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ dai-link-0 { -+ sound-dai = <&frddr_a>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&frddr_b>; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&frddr_c>; -+ }; -+ -+ dai-link-3 { -+ sound-dai = <&toddr_a>; -+ }; -+ -+ dai-link-4 { -+ sound-dai = <&toddr_b>; -+ }; -+ -+ dai-link-5 { -+ sound-dai = <&toddr_c>; -+ }; -+ -+ /* 8ch hdmi interface */ -+ dai-link-6 { -+ sound-dai = <&tdmif_a>; -+ dai-format = "i2s"; -+ dai-tdm-slot-tx-mask-0 = <1 1>; -+ dai-tdm-slot-tx-mask-1 = <1 1>; -+ dai-tdm-slot-tx-mask-2 = <1 1>; -+ dai-tdm-slot-tx-mask-3 = <1 1>; -+ mclk-fs = <256>; -+ -+ codec { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; -+ }; -+ }; -+ -+ /* hdmi glue */ -+ dai-link-7 { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+}; -+ -+&arb { -+ status = "okay"; -+}; -+ -+&clkc_audio { -+ status = "okay"; -+}; -+ -+&cec_AO { -+ pinctrl-0 = <&cec_ao_a_h_pins>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ hdmi-phandle = <&hdmi_tx>; -+}; -+ -+&cecb_AO { -+ pinctrl-0 = <&cec_ao_b_h_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ hdmi-phandle = <&hdmi_tx>; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vddcpu_b>; -+ operating-points-v2 = <&cpu_opp_table_0>; -+ clocks = <&clkc CLKID_CPU_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vddcpu_b>; -+ operating-points-v2 = <&cpu_opp_table_0>; -+ clocks = <&clkc CLKID_CPU_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu100 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu101 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu102 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+&cpu103 { -+ cpu-supply = <&vddcpu_a>; -+ operating-points-v2 = <&cpub_opp_table_1>; -+ clocks = <&clkc CLKID_CPUB_CLK>; -+ clock-latency = <50000>; -+}; -+ -+ðmac { -+ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ phy-mode = "rgmii"; -+ phy-handle = <&external_phy>; -+ amlogic,tx-delay-ns = <2>; -+}; -+ -+&ext_mdio { -+ external_phy: ethernet-phy@0 { -+ /* Realtek RTL8211F (0x001cc916) */ -+ reg = <0>; -+ max-speed = <1000>; -+ -+ reset-assert-us = <10000>; -+ reset-deassert-us = <80000>; -+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; -+ -+ interrupt-parent = <&gpio_intc>; -+ /* MAC_INTR on GPIOZ_14 */ -+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; -+ }; -+}; -+ -+&frddr_a { -+ status = "okay"; -+}; -+ -+&frddr_b { -+ status = "okay"; -+}; -+ -+&frddr_c { -+ status = "okay"; -+}; -+ -+&hdmi_tx { -+ status = "okay"; -+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; -+ pinctrl-names = "default"; -+ hdmi-supply = <&vcc_5v>; -+}; -+ -+&hdmi_tx_tmds_port { -+ hdmi_tx_tmds_out: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&pcie { -+ status = "okay"; -+ reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>; -+}; -+ -+&pwm_ab { -+ status = "okay"; -+ pinctrl-0 = <&pwm_a_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&xtal>; -+ clock-names = "clkin0"; -+}; -+ -+&pwm_cd { -+ status = "okay"; -+ pinctrl-0 = <&pwm_d_x6_pins>; -+ pinctrl-names = "default"; -+ pwm-gpios = <&gpio GPIOAO_10 GPIO_ACTIVE_HIGH>; -+}; -+ -+&pwm_ef { -+ status = "okay"; -+ pinctrl-0 = <&pwm_e_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&pwm_AO_cd { -+ pinctrl-0 = <&pwm_ao_d_e_pins>; -+ pinctrl-names = "default"; -+ clocks = <&xtal>; -+ clock-names = "clkin1"; -+ status = "okay"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vddao_1v8>; -+}; -+ -+/* SDIO */ -+&sd_emmc_a { -+ status = "okay"; -+ pinctrl-0 = <&sdio_pins>; -+ pinctrl-1 = <&sdio_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ bus-width = <4>; -+ sd-uhs-sdr104; -+ max-frequency = <50000000>; -+ -+ non-removable; -+ disable-wp; -+ -+ /* WiFi firmware requires power to be kept while in suspend */ -+ keep-power-in-suspend; -+ -+ mmc-pwrseq = <&sdio_pwrseq>; -+ -+ vmmc-supply = <&vsys_3v3>; -+ vqmmc-supply = <&vddao_1v8>; -+ -+ rtl8822cs: wifi@1 { -+ reg = <1>; -+ }; -+}; -+ -+/* SD card */ -+&sd_emmc_b { -+ status = "okay"; -+ pinctrl-0 = <&sdcard_c_pins>; -+ pinctrl-1 = <&sdcard_clk_gate_c_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <4>; -+ cap-sd-highspeed; -+ max-frequency = <50000000>; -+ disable-wp; -+ -+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <&vsys_3v3>; -+ vqmmc-supply = <&vsys_3v3>; -+}; -+ -+/* eMMC */ -+&sd_emmc_c { -+ status = "okay"; -+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; -+ pinctrl-1 = <&emmc_clk_gate_pins>; -+ pinctrl-names = "default", "clk-gate"; -+ -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ mmc-ddr-1_8v; -+ mmc-hs200-1_8v; -+ max-frequency = <200000000>; -+ disable-wp; -+ -+ mmc-pwrseq = <&emmc_pwrseq>; -+ vmmc-supply = <&vcc_3v3>; -+ vqmmc-supply = <&emmc_1v8>; -+}; -+ -+&tdmif_a { -+ status = "okay"; -+}; -+ -+&tdmin_a { -+ status = "okay"; -+}; -+ -+&tdmout_a { -+ status = "okay"; -+}; -+ -+&toddr_a { -+ status = "okay"; -+}; -+ -+&toddr_b { -+ status = "okay"; -+}; -+ -+&toddr_c { -+ status = "okay"; -+}; -+ -+&tohdmitx { -+ status = "okay"; -+}; -+ -+&uart_A { -+ status = "disabled"; -+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; -+ pinctrl-names = "default"; -+ uart-has-rtscts; -+ -+ bluetooth { -+ compatible = "realtek,rtl8822cs-bt"; -+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; -+ host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; -+ device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>; -+ max-speed = <2000000>; -+ }; -+}; -+ -+&uart_AO { -+ status = "okay"; -+ pinctrl-0 = <&uart_ao_a_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&usb2_phy0 { -+ phy-supply = <&dc_in>; -+}; -+ -+&usb2_phy1 { -+ phy-supply = <&usb_pwr>; -+}; -+ -+&usb3_pcie_phy { -+ phy-supply = <&usb_pwr>; -+}; -+ -+&usb { -+ status = "okay"; -+ dr_mode = "peripheral"; -+ phys = <&usb2_phy0>, <&usb2_phy1>; -+ phy-names = "usb2-phy0", "usb2-phy1"; -+}; -diff --git a/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts -new file mode 100644 -index 0000000000..7f66f263a2 ---- /dev/null -+++ b/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2023 Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-g12b-s922x.dtsi" -+#include "meson-g12b-bananapi.dtsi" -+ -+/ { -+ compatible = "bananapi,bpi-m2s", "amlogic,s922x", "amlogic,g12b"; -+ model = "BananaPi M2S"; -+}; --- -2.34.1 - From bfc92addeedc60a6da06e10078776e2c5ce8d4b1 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 4 Apr 2023 13:23:18 +0000 Subject: [PATCH 12/19] u-boot (NXP iMX8): rebase for 2023.04 --- .../0005-pico-imx8mq-add-distro-boot-cmd-support.patch | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/projects/NXP/devices/iMX8/patches/u-boot/0005-pico-imx8mq-add-distro-boot-cmd-support.patch b/projects/NXP/devices/iMX8/patches/u-boot/0005-pico-imx8mq-add-distro-boot-cmd-support.patch index f1dac88678..90d46653be 100644 --- a/projects/NXP/devices/iMX8/patches/u-boot/0005-pico-imx8mq-add-distro-boot-cmd-support.patch +++ b/projects/NXP/devices/iMX8/patches/u-boot/0005-pico-imx8mq-add-distro-boot-cmd-support.patch @@ -21,12 +21,12 @@ diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 7a5891652f..e301bc736d 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h -@@ -41,42 +41,22 @@ - #define IMX_FEC_BASE 0x30BE0000 +@@ -23,42 +23,22 @@ + #define CFG_FEC_MXC_PHYADDR 1 #endif -/* Initial environment variables */ --#define CONFIG_EXTRA_ENV_SETTINGS \ +-#define CFG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=Image\0" \ - "console=ttymxc0,115200\0" \ From bcef4bfd9e311579e9dace00fd48b6b7f412a848 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 10 Jan 2023 11:04:50 +0000 Subject: [PATCH 13/19] u-boot (Rockchip): rebase patches for 2023.01 --- .../0003-arm-dts-enable-efuse-for-RK3288.patch | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch b/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch index 00e5d0dbdc..61dee23e84 100644 --- a/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch +++ b/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch @@ -1,23 +1,22 @@ From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 11 Sep 2022 10:56:43 +0200 -Subject: [PATCH 3/6] arm: dts: enable efuse for RK3288 +Subject: [PATCH 3/6] arm: dts: update efuse for RK3288 for 0x20 --- - arch/arm/dts/rk3288.dtsi | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) + arch/arm/dts/rk3288.dtsi | 3 +- + 1 file changed, 1 insertion(+), 1 deletions(-) diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi index 53ee760b98..f923630f63 100644 --- a/arch/arm/dts/rk3288.dtsi +++ b/arch/arm/dts/rk3288.dtsi -@@ -866,8 +866,7 @@ +@@ -1214,7 +1214,7 @@ efuse: efuse@ffb40000 { compatible = "rockchip,rk3288-efuse"; - reg = <0xffb40000 0x10000>; -- status = "disabled"; + reg = <0xffb40000 0x20>; - }; - - gic: interrupt-controller@ffc01000 { + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru PCLK_EFUSE256>; From a34e611e7ef892594d203364b59e791f3c1bfb22 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 20 Jan 2023 07:10:32 +0000 Subject: [PATCH 14/19] u-boot (Rockchip): do not build TOOLS_MKEFICAPSULE --- projects/Rockchip/bootloader/config | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/Rockchip/bootloader/config b/projects/Rockchip/bootloader/config index c0d3a54b2f..386dd1a80d 100644 --- a/projects/Rockchip/bootloader/config +++ b/projects/Rockchip/bootloader/config @@ -5,6 +5,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_USB_KEYBOARD is not set # CONFIG_TPL_DRIVERS_MISC is not set +# CONFIG_TOOLS_MKEFICAPSULE is not set CONFIG_MISC=y CONFIG_MISC_INIT_R=y CONFIG_ROCKCHIP_EFUSE=y From d16106b387fbad24166a22b084ba25adf5c1abb7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 4 Apr 2023 21:34:35 +0000 Subject: [PATCH 15/19] u-boot (Rockchip): drop upstreamed patches in 2023.04 --- ...399-Program-PLL-clock-for-DDR-at-50-.patch | 115 -------------- ...dd-support-for-RK322x-non-secure-efu.patch | 150 ------------------ ...dd-support-for-RK3328-non-secure-efu.patch | 117 -------------- ...0003-arm-dts-enable-efuse-for-RK3288.patch | 22 --- 4 files changed, 404 deletions(-) delete mode 100644 projects/Rockchip/patches/u-boot/0001-202301-arm-rockchip-rk3399-Program-PLL-clock-for-DDR-at-50-.patch delete mode 100644 projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch delete mode 100644 projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch delete mode 100644 projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch diff --git a/projects/Rockchip/patches/u-boot/0001-202301-arm-rockchip-rk3399-Program-PLL-clock-for-DDR-at-50-.patch b/projects/Rockchip/patches/u-boot/0001-202301-arm-rockchip-rk3399-Program-PLL-clock-for-DDR-at-50-.patch deleted file mode 100644 index 12e3907ecb..0000000000 --- a/projects/Rockchip/patches/u-boot/0001-202301-arm-rockchip-rk3399-Program-PLL-clock-for-DDR-at-50-.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 2cb23b80e4169e121c520ff33cb6a60e0a0ded21 Mon Sep 17 00:00:00 2001 -From: Xavier Drudis Ferran -Date: Sat, 16 Jul 2022 12:31:45 +0200 -Subject: [PATCH] arm: rockchip: rk3399: Program PLL clock for DDR at 50 MHz in - documented range -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The original code set up the DDR clock to 48 MHz, not 50MHz as -requested, and did it in a way that didn't satisfy the Application -Notes in RK3399 TRM [1]. 2.9.2.B says: - - PLL frequency range requirement - [...] - FOUTVCO: 800MHz to 3.2GHz - -2.9.2.A : - PLL output frequency configuration - [...] - FOUTVCO = FREF / REFDIV * FBDIV - FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2 - -FREF = 24 MHz - -The original code gives FOUTVCO: 24MHz/1 * 12 = 288MHz < 800MHz -And the resulting FOUTPOSTDIV is 288MHz / 3 / 2 = 48MHz -but the requested frequency was 50MHz - -Note: -2.7.2 Detail Register Description -PMUCRU_PPLL_CON0 says - - fbdiv - Feedback Divide Value - Valid divider settings are: - [16, 3200] in integer mode - -So .fbdiv = 12 wouldn't be right. But 2.9.2.C says: - - PLL setting consideration - [...] - The following settings are valid for FBDIV: - DSMPD=1 (Integer Mode): - 12,13,14,16-4095 (practical value is limited to 3200, 2400, or 1600 - (FVCOMAX / FREFMIN)) - [...] - -So .fbdiv = 12 would be right. - -In any case FOUTVCO is still wrong. I thank YouMin Chen for -confirmation and explanation. - -Despite documentation, I don't seem to be able to reproduce a -practical problem with the wrong FOUTVCO. When I initially found it I -thought some problems with detecting the RAM capacity in my Rock Pi 4B -could be related to it and my patch seemed to help. But since I'm no -longer able to reproduce the issue, it works with or without this -patch. And meanwhile a patch[2] by Lee Jones and YouMin Chen addresses -this issue. Btw, shouldn't that be commited? - -So this patches solves no visible problem. Yet, to prevent future -problems, I think it'd be best to stick to spec. - -An alternative to this patch could be - - {.refdiv = 1, .fbdiv = 75, .postdiv1 = 6, .postdiv2 = 6}; - -This would theoretically consume more power and yield less jitter, -according to 2.9.2.C : - - PLL setting consideration - [...] - For lowest power operation, the minimum VCO and FREF frequencies - should be used. For minimum jitter operation, the highest VCO and - FREF frequencies should be used. - [...] - -But I haven't tried it because I don't think it matters much. 50MHz -for DDR is only shortly used by TPL at RAM init. Normal operation is -at 800MHz. Maybe it's better to use less power until later when more -complex software can control batteries or charging or whatever ? - -Cc: Simon Glass -Cc: Philipp Tomsich -Cc: Kever Yang -Cc: Lukasz Majewski -Cc: Sean Anderson - -Link: [1] https://opensource.rock-chips.com/images/e/ee/Rockchip_RK3399TRM_V1.4_Part1-20170408.pdf -Link: [2] https://patchwork.ozlabs.org/project/uboot/list/?series=305766 - -Signed-off-by: Xavier Drudis Ferran -Tested-by: Michal Suchánek -Reviewed-by: Kever Yang ---- - drivers/clk/rockchip/clk_rk3399.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c -index 97bf1c6e15..eaeac451df 100644 ---- a/drivers/clk/rockchip/clk_rk3399.c -+++ b/drivers/clk/rockchip/clk_rk3399.c -@@ -856,7 +856,7 @@ static ulong rk3399_ddr_set_clk(struct rockchip_cru *cru, - switch (set_rate) { - case 50 * MHz: - dpll_cfg = (struct pll_div) -- {.refdiv = 1, .fbdiv = 12, .postdiv1 = 3, .postdiv2 = 2}; -+ {.refdiv = 2, .fbdiv = 75, .postdiv1 = 3, .postdiv2 = 6}; - break; - case 200 * MHz: - dpll_cfg = (struct pll_div) --- -2.39.0 - diff --git a/projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch b/projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch deleted file mode 100644 index b7c5e57993..0000000000 --- a/projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Francis Fan -Date: Tue, 7 Nov 2017 17:50:11 +0800 -Subject: [PATCH 1/6] rockchip: efuse: add support for RK322x non-secure efuse - block - -Signed-off-by: Francis Fan -Signed-off-by: Cody Xie ---- - drivers/misc/rockchip-efuse.c | 96 +++++++++++++++++++++++++++++++++-- - 1 file changed, 92 insertions(+), 4 deletions(-) - -diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c -index 083ee65e0a..4c9239f7ba 100644 ---- a/drivers/misc/rockchip-efuse.c -+++ b/drivers/misc/rockchip-efuse.c -@@ -27,6 +27,17 @@ - #define RK3399_STROBE BIT(1) - #define RK3399_CSB BIT(0) - -+#define RK3288_A_SHIFT 6 -+#define RK3288_A_MASK 0x3ff -+#define RK3288_NFUSES 32 -+#define RK3288_BYTES_PER_FUSE 1 -+#define RK3288_PGENB BIT(3) -+#define RK3288_LOAD BIT(2) -+#define RK3288_STROBE BIT(1) -+#define RK3288_CSB BIT(0) -+ -+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size); -+ - struct rockchip_efuse_regs { - u32 ctrl; /* 0x00 efuse control register */ - u32 dout; /* 0x04 efuse data out register */ -@@ -53,7 +64,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag, - */ - - struct udevice *dev; -- u8 fuses[128]; -+ u8 fuses[128] = {0}; - int ret; - - /* retrieve the device */ -@@ -77,7 +88,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag, - } - - U_BOOT_CMD( -- rk3399_dump_efuses, 1, 1, dump_efuses, -+ rockchip_dump_efuses, 1, 1, dump_efuses, - "Dump the content of the efuses", - "" - ); -@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset, - return 0; - } - -+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset, -+ void *buf, int size) -+{ -+ struct rockchip_efuse_plat *plat = dev_get_plat(dev); -+ struct rockchip_efuse_regs *efuse = -+ (struct rockchip_efuse_regs *)plat->base; -+ u8 *buffer = buf; -+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE; -+ -+ if (size > (max_size - offset)) -+ size = max_size - offset; -+ -+ /* Switch to read mode */ -+ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl); -+ udelay(1); -+ -+ while (size--) { -+ writel(readl(&efuse->ctrl) & -+ (~(RK3288_A_MASK << RK3288_A_SHIFT)), -+ &efuse->ctrl); -+ /* set addr */ -+ writel(readl(&efuse->ctrl) | -+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT), -+ &efuse->ctrl); -+ udelay(1); -+ /* strobe low to high */ -+ writel(readl(&efuse->ctrl) | -+ RK3288_STROBE, &efuse->ctrl); -+ ndelay(60); -+ /* read data */ -+ *buffer++ = readl(&efuse->dout); -+ /* reset strobe to low */ -+ writel(readl(&efuse->ctrl) & -+ (~RK3288_STROBE), &efuse->ctrl); -+ udelay(1); -+ } -+ -+ /* Switch to standby mode */ -+ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl); -+ -+ return 0; -+} -+ - static int rockchip_efuse_read(struct udevice *dev, int offset, - void *buf, int size) - { -- return rockchip_rk3399_efuse_read(dev, offset, buf, size); -+ EFUSE_READ efuse_read = NULL; -+ -+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev); -+ if (!efuse_read) -+ return -ENOSYS; -+ -+ return (*efuse_read)(dev, offset, buf, size); - } - - static const struct misc_ops rockchip_efuse_ops = { -@@ -146,7 +206,35 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev) - } - - static const struct udevice_id rockchip_efuse_ids[] = { -- { .compatible = "rockchip,rk3399-efuse" }, -+ /* deprecated but kept around for dts binding compatibility */ -+ { -+ .compatible = "rockchip,rockchip-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3066a-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3188-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3228-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3288-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3368-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3399-efuse", -+ .data = (ulong)&rockchip_rk3399_efuse_read, -+ }, - {} - }; - diff --git a/projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch b/projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch deleted file mode 100644 index 62d190d8ce..0000000000 --- a/projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Joseph Chen -Date: Thu, 2 Aug 2018 20:33:16 +0800 -Subject: [PATCH 2/6] rockchip: efuse: add support for RK3328 non-secure efuse - block - -Signed-off-by: Joseph Chen ---- - drivers/misc/rockchip-efuse.c | 67 +++++++++++++++++++++++++++++++++++ - 1 file changed, 67 insertions(+) - -diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c -index 4c9239f7ba..c75405bfcf 100644 ---- a/drivers/misc/rockchip-efuse.c -+++ b/drivers/misc/rockchip-efuse.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - - #define RK3399_A_SHIFT 16 -@@ -36,6 +37,13 @@ - #define RK3288_STROBE BIT(1) - #define RK3288_CSB BIT(0) - -+#define RK3328_INT_STATUS 0x0018 -+#define RK3328_DOUT 0x0020 -+#define RK3328_AUTO_CTRL 0x0024 -+#define RK3328_INT_FINISH BIT(0) -+#define RK3328_AUTO_ENB BIT(0) -+#define RK3328_AUTO_RD BIT(1) -+ - typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size); - - struct rockchip_efuse_regs { -@@ -46,6 +54,10 @@ struct rockchip_efuse_regs { - u32 jtag_pass; /* 0x10 JTAG password */ - u32 strobe_finish_ctrl; - /* 0x14 efuse strobe finish control register */ -+ u32 int_status;/* 0x18 */ -+ u32 reserved; /* 0x1c */ -+ u32 dout2; /* 0x20 */ -+ u32 auto_ctrl; /* 0x24 */ - }; - - struct rockchip_efuse_plat { -@@ -181,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset, - return 0; - } - -+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset, -+ void *buf, int size) -+{ -+ struct rockchip_efuse_plat *plat = dev_get_plat(dev); -+ struct rockchip_efuse_regs *efuse = -+ (struct rockchip_efuse_regs *)plat->base; -+ unsigned int addr_start, addr_end, addr_offset, addr_len; -+ u32 out_value, status; -+ u8 *buffer; -+ int ret = 0, i = 0, j = 0; -+ -+ /* Max non-secure Byte */ -+ if (size > 32) -+ size = 32; -+ -+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */ -+ offset += 96; -+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) / -+ RK3399_BYTES_PER_FUSE; -+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) / -+ RK3399_BYTES_PER_FUSE; -+ addr_offset = offset % RK3399_BYTES_PER_FUSE; -+ addr_len = addr_end - addr_start; -+ -+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE); -+ if (!buffer) -+ return -ENOMEM; -+ -+ for (j = 0; j < addr_len; j++) { -+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | -+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT), -+ &efuse->auto_ctrl); -+ udelay(5); -+ status = readl(&efuse->int_status); -+ if (!(status & RK3328_INT_FINISH)) { -+ ret = -EIO; -+ goto err; -+ } -+ out_value = readl(&efuse->dout2); -+ writel(RK3328_INT_FINISH, &efuse->int_status); -+ -+ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE); -+ i += RK3399_BYTES_PER_FUSE; -+ } -+ memcpy(buf, buffer + addr_offset, size); -+err: -+ free(buffer); -+ -+ return ret; -+} -+ - static int rockchip_efuse_read(struct udevice *dev, int offset, - void *buf, int size) - { -@@ -231,6 +294,10 @@ static const struct udevice_id rockchip_efuse_ids[] = { - .compatible = "rockchip,rk3368-efuse", - .data = (ulong)&rockchip_rk3288_efuse_read, - }, -+ { -+ .compatible = "rockchip,rk3328-efuse", -+ .data = (ulong)&rockchip_rk3328_efuse_read, -+ }, - { - .compatible = "rockchip,rk3399-efuse", - .data = (ulong)&rockchip_rk3399_efuse_read, diff --git a/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch b/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch deleted file mode 100644 index 61dee23e84..0000000000 --- a/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Alex Bee -Date: Sun, 11 Sep 2022 10:56:43 +0200 -Subject: [PATCH 3/6] arm: dts: update efuse for RK3288 for 0x20 - ---- - arch/arm/dts/rk3288.dtsi | 3 +- - 1 file changed, 1 insertion(+), 1 deletions(-) - -diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi -index 53ee760b98..f923630f63 100644 ---- a/arch/arm/dts/rk3288.dtsi -+++ b/arch/arm/dts/rk3288.dtsi -@@ -1214,7 +1214,7 @@ - - efuse: efuse@ffb40000 { - compatible = "rockchip,rk3288-efuse"; -- reg = <0xffb40000 0x10000>; -+ reg = <0xffb40000 0x20>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru PCLK_EFUSE256>; From cfc97dc93500d5700d9cf2c7f53d8ccbedbf7222 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 4 Apr 2023 21:34:35 +0000 Subject: [PATCH 16/19] u-boot (Rockchip): do not build EFI_LOADER --- projects/Rockchip/bootloader/config | 2 +- projects/Rockchip/devices/RK3288/bootloader/config | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/projects/Rockchip/bootloader/config b/projects/Rockchip/bootloader/config index 386dd1a80d..06132bd951 100644 --- a/projects/Rockchip/bootloader/config +++ b/projects/Rockchip/bootloader/config @@ -1,11 +1,11 @@ CONFIG_BOOTDELAY=1 # CONFIG_VIDEO is not set # CONFIG_DISPLAY is not set +# CONFIG_EFI_LOADER is not set # CONFIG_ENV_IS_IN_MMC is not set # CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_USB_KEYBOARD is not set # CONFIG_TPL_DRIVERS_MISC is not set -# CONFIG_TOOLS_MKEFICAPSULE is not set CONFIG_MISC=y CONFIG_MISC_INIT_R=y CONFIG_ROCKCHIP_EFUSE=y diff --git a/projects/Rockchip/devices/RK3288/bootloader/config b/projects/Rockchip/devices/RK3288/bootloader/config index 17f6fe7324..a459f8f4fd 100644 --- a/projects/Rockchip/devices/RK3288/bootloader/config +++ b/projects/Rockchip/devices/RK3288/bootloader/config @@ -1,6 +1,7 @@ CONFIG_BOOTDELAY=1 # CONFIG_VIDEO is not set # CONFIG_DISPLAY is not set +# CONFIG_EFI_LOADER is not set # CONFIG_ENV_IS_IN_MMC is not set # CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_USB_KEYBOARD is not set From 0e141689997235774c4038b72610b349f164d9c4 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Sat, 21 Oct 2023 11:09:28 +0000 Subject: [PATCH 17/19] u-boot (Rockchip): rebase patch for 2023.10 --- ...6-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch b/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch index baa200a7aa..d1984ee807 100644 --- a/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch +++ b/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch @@ -25,11 +25,11 @@ index 5e39b1493d..18733da7f9 100644 }; -&i2c0 { -- u-boot,dm-pre-reloc; +- bootph-all; -}; - -&rk808 { -- u-boot,dm-pre-reloc; +- bootph-all; -}; - &tcphy1 { From 5818da3a1c26ea4d63f0a2c6bc6c4b376f9a5ceb Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Tue, 4 Apr 2023 12:13:58 +0000 Subject: [PATCH 18/19] bootloader/install (Rockchip): update PKG_LOAD_ADDR to match u-boot 2023.01 --- projects/Rockchip/bootloader/install | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/Rockchip/bootloader/install b/projects/Rockchip/bootloader/install index af8e3992df..d66e339191 100644 --- a/projects/Rockchip/bootloader/install +++ b/projects/Rockchip/bootloader/install @@ -20,7 +20,7 @@ if [ "${ROCKCHIP_LEGACY_BOOT}" = "1" ]; then PKG_DDR_BIN="${PKG_RKBIN}"/$(sed -n "/FlashData/s/FlashData=//p" "${PKG_BOOT_INI}") PKG_MINILOADER="${PKG_RKBIN}"/$(sed -n "/FlashBoot/s/FlashBoot=//p" "${PKG_BOOT_INI}") - PKG_LOAD_ADDR=$(sed -n "/SYS_TEXT_BASE/s/#define CONFIG_SYS_TEXT_BASE //p" u-boot.cfg) + PKG_LOAD_ADDR=$(sed -n "/CONFIG_TEXT_BASE/s/#define CONFIG_TEXT_BASE //p" u-boot.cfg) # Override sdram frequency if [ "${DEVICE}" = "RK3328" ]; then From 36506ed672b5c5fd5077d03d71b9ff9b5610ea2b Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Mon, 9 Jan 2023 23:33:57 +0000 Subject: [PATCH 19/19] u-boot: update to 2023.10 --- packages/tools/u-boot/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index 0a7bb55e92..eecc00ad4f 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -3,8 +3,8 @@ # Copyright (C) 2017-present Team LibreELEC (https://libreelec.tv) PKG_NAME="u-boot" -PKG_VERSION="2022.10" -PKG_SHA256="50b4482a505bc281ba8470c399a3c26e145e29b23500bc35c50debd7fa46bdf8" +PKG_VERSION="2023.10" +PKG_SHA256="e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900" PKG_ARCH="arm aarch64" PKG_LICENSE="GPL" PKG_SITE="https://www.denx.de/wiki/U-Boot"