From 4f8d4d9aa6a56822a422c4004be6143cb26a6b82 Mon Sep 17 00:00:00 2001 From: heitbaum Date: Sun, 19 Sep 2021 14:21:10 +1000 Subject: [PATCH] linux (Rockchip): update patches for 5.14.6 --- .../linux-0001-rockchip-from-5.15.patch | 44 --------- .../default/linux-0010-v4l2-from-5.15.patch | 93 ------------------- 2 files changed, 137 deletions(-) diff --git a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.15.patch b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.15.patch index 7a2165e1be..014c34b156 100644 --- a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.15.patch +++ b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.15.patch @@ -295,50 +295,6 @@ index 000000000000..72b286a1beba + #reset-cells = <1>; + }; -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Peter Geis -Date: Wed, 28 Jul 2021 14:00:28 -0400 -Subject: [PATCH] clk: rockchip: drop GRF dependency for rk3328/rk3036 pll - types - -The rk3036/rk3328 pll types were converted to checking the lock status -via the internal register in january 2020, so don't need the grf -reference since then. - -But it was forgotten to remove grf check when deciding between the -pll rate ops (read-only vs. read-write), so a clock driver without -the needed grf reference might've been put into the read-only mode -just because the grf reference was missing. - -This affected the rk356x that needs to reclock certain plls at boot. - -Fix this by removing the check for the grf for selecting the utilized -operations. - -Suggested-by: Heiko Stuebner -Fixes: 7f6ffbb885d1 ("clk: rockchip: convert rk3036 pll type to use internal lock status") -Signed-off-by: Peter Geis -[adjusted the commit message, adjusted the fixes tag] -Link: https://lore.kernel.org/r/20210728180034.717953-3-pgwipeout@gmail.com -Signed-off-by: Heiko Stuebner ---- - drivers/clk/rockchip/clk-pll.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c -index fe937bcdb487..f7827b3b7fc1 100644 ---- a/drivers/clk/rockchip/clk-pll.c -+++ b/drivers/clk/rockchip/clk-pll.c -@@ -940,7 +940,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, - switch (pll_type) { - case pll_rk3036: - case pll_rk3328: -- if (!pll->rate_table || IS_ERR(ctx->grf)) -+ if (!pll->rate_table) - init.ops = &rockchip_rk3036_pll_clk_norate_ops; - else - init.ops = &rockchip_rk3036_pll_clk_ops; - From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Yunhao Tian Date: Wed, 21 Jul 2021 20:48:16 +0800 diff --git a/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.15.patch b/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.15.patch index c54e0ae4f6..7f916173a2 100644 --- a/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.15.patch +++ b/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.15.patch @@ -1,96 +1,3 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Mon, 19 Jul 2021 22:52:33 +0200 -Subject: [PATCH] media: hantro: vp8: Move noisy WARN_ON to vpu_debug - -When the VP8 decoders can't find a reference frame, -the driver falls back to the current output frame. - -This will probably produce some undesirable results, -leading to frame corruption, but shouldn't cause -noisy warnings. - -Signed-off-by: Ezequiel Garcia -Acked-by: Nicolas Dufresne -Tested-by: Alex Bee -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/staging/media/hantro/hantro_g1_vp8_dec.c | 13 ++++++++++--- - .../staging/media/hantro/rockchip_vpu2_hw_vp8_dec.c | 13 ++++++++++--- - 2 files changed, 20 insertions(+), 6 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c -index 96622a7f8279..2afd5996d75f 100644 ---- a/drivers/staging/media/hantro/hantro_g1_vp8_dec.c -+++ b/drivers/staging/media/hantro/hantro_g1_vp8_dec.c -@@ -376,12 +376,17 @@ static void cfg_ref(struct hantro_ctx *ctx, - vb2_dst = hantro_get_dst_buf(ctx); - - ref = hantro_get_ref(ctx, hdr->last_frame_ts); -- if (!ref) -+ if (!ref) { -+ vpu_debug(0, "failed to find last frame ts=%llu\n", -+ hdr->last_frame_ts); - ref = vb2_dma_contig_plane_dma_addr(&vb2_dst->vb2_buf, 0); -+ } - vdpu_write_relaxed(vpu, ref, G1_REG_ADDR_REF(0)); - - ref = hantro_get_ref(ctx, hdr->golden_frame_ts); -- WARN_ON(!ref && hdr->golden_frame_ts); -+ if (!ref && hdr->golden_frame_ts) -+ vpu_debug(0, "failed to find golden frame ts=%llu\n", -+ hdr->golden_frame_ts); - if (!ref) - ref = vb2_dma_contig_plane_dma_addr(&vb2_dst->vb2_buf, 0); - if (hdr->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN) -@@ -389,7 +394,9 @@ static void cfg_ref(struct hantro_ctx *ctx, - vdpu_write_relaxed(vpu, ref, G1_REG_ADDR_REF(4)); - - ref = hantro_get_ref(ctx, hdr->alt_frame_ts); -- WARN_ON(!ref && hdr->alt_frame_ts); -+ if (!ref && hdr->alt_frame_ts) -+ vpu_debug(0, "failed to find alt frame ts=%llu\n", -+ hdr->alt_frame_ts); - if (!ref) - ref = vb2_dma_contig_plane_dma_addr(&vb2_dst->vb2_buf, 0); - if (hdr->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT) -diff --git a/drivers/staging/media/hantro/rockchip_vpu2_hw_vp8_dec.c b/drivers/staging/media/hantro/rockchip_vpu2_hw_vp8_dec.c -index 951b55f58a61..704607511b57 100644 ---- a/drivers/staging/media/hantro/rockchip_vpu2_hw_vp8_dec.c -+++ b/drivers/staging/media/hantro/rockchip_vpu2_hw_vp8_dec.c -@@ -453,12 +453,17 @@ static void cfg_ref(struct hantro_ctx *ctx, - vb2_dst = hantro_get_dst_buf(ctx); - - ref = hantro_get_ref(ctx, hdr->last_frame_ts); -- if (!ref) -+ if (!ref) { -+ vpu_debug(0, "failed to find last frame ts=%llu\n", -+ hdr->last_frame_ts); - ref = vb2_dma_contig_plane_dma_addr(&vb2_dst->vb2_buf, 0); -+ } - vdpu_write_relaxed(vpu, ref, VDPU_REG_VP8_ADDR_REF0); - - ref = hantro_get_ref(ctx, hdr->golden_frame_ts); -- WARN_ON(!ref && hdr->golden_frame_ts); -+ if (!ref && hdr->golden_frame_ts) -+ vpu_debug(0, "failed to find golden frame ts=%llu\n", -+ hdr->golden_frame_ts); - if (!ref) - ref = vb2_dma_contig_plane_dma_addr(&vb2_dst->vb2_buf, 0); - if (hdr->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN) -@@ -466,7 +471,9 @@ static void cfg_ref(struct hantro_ctx *ctx, - vdpu_write_relaxed(vpu, ref, VDPU_REG_VP8_ADDR_REF2_5(2)); - - ref = hantro_get_ref(ctx, hdr->alt_frame_ts); -- WARN_ON(!ref && hdr->alt_frame_ts); -+ if (!ref && hdr->alt_frame_ts) -+ vpu_debug(0, "failed to find alt frame ts=%llu\n", -+ hdr->alt_frame_ts); - if (!ref) - ref = vb2_dma_contig_plane_dma_addr(&vb2_dst->vb2_buf, 0); - if (hdr->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT) - From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Mon, 19 Jul 2021 22:52:34 +0200