diff --git a/packages/linux/patches/linux-2.6.39-rc3-054_nuvoton-cir-only-warn-about-unknown-chips.patch b/packages/linux/patches/linux-2.6.39-rc3-054_nuvoton-cir-only-warn-about-unknown-chips.patch
new file mode 100644
index 0000000000..08c91bfbc2
--- /dev/null
+++ b/packages/linux/patches/linux-2.6.39-rc3-054_nuvoton-cir-only-warn-about-unknown-chips.patch
@@ -0,0 +1,89 @@
+diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c
+index d4d6449..bc5c1e2 100644
+--- a/drivers/media/rc/nuvoton-cir.c
++++ b/drivers/media/rc/nuvoton-cir.c
+@@ -37,8 +37,6 @@
+ 
+ #include "nuvoton-cir.h"
+ 
+-static char *chip_id = "w836x7hg";
+-
+ /* write val to config reg */
+ static inline void nvt_cr_write(struct nvt_dev *nvt, u8 val, u8 reg)
+ {
+@@ -233,6 +231,8 @@ static int nvt_hw_detect(struct nvt_dev *nvt)
+ 	unsigned long flags;
+ 	u8 chip_major, chip_minor;
+ 	int ret = 0;
++	char chip_id[12];
++	bool chip_unknown = false;
+ 
+ 	nvt_efm_enable(nvt);
+ 
+@@ -246,15 +246,39 @@ static int nvt_hw_detect(struct nvt_dev *nvt)
+ 	}
+ 
+ 	chip_minor = nvt_cr_read(nvt, CR_CHIP_ID_LO);
+-	nvt_dbg("%s: chip id: 0x%02x 0x%02x", chip_id, chip_major, chip_minor);
+ 
+-	if (chip_major != CHIP_ID_HIGH ||
+-	    (chip_minor != CHIP_ID_LOW && chip_minor != CHIP_ID_LOW2)) {
+-		nvt_pr(KERN_ERR, "%s: unsupported chip, id: 0x%02x 0x%02x",
+-		       chip_id, chip_major, chip_minor);
+-		ret = -ENODEV;
++	/* these are the known working chip revisions... */
++	switch (chip_major) {
++	case CHIP_ID_HIGH_667:
++		strcpy(chip_id, "w83667hg\0");
++		if (chip_minor != CHIP_ID_LOW_667)
++			chip_unknown = true;
++		break;
++	case CHIP_ID_HIGH_677B:
++		strcpy(chip_id, "w83677hg\0");
++		if (chip_minor != CHIP_ID_LOW_677B2 &&
++		    chip_minor != CHIP_ID_LOW_677B3)
++			chip_unknown = true;
++		break;
++	case CHIP_ID_HIGH_677C:
++		strcpy(chip_id, "w83677hg-c\0");
++		if (chip_minor != CHIP_ID_LOW_677C)
++			chip_unknown = true;
++		break;
++	default:
++		strcpy(chip_id, "w836x7hg\0");
++		chip_unknown = true;
++		break;
+ 	}
+ 
++	/* warn, but still let the driver load, if we don't know this chip */
++	if (chip_unknown)
++		nvt_pr(KERN_WARNING, "%s: unknown chip, id: 0x%02x 0x%02x, "
++		       "it may not work...", chip_id, chip_major, chip_minor);
++	else
++		nvt_dbg("%s: chip id: 0x%02x 0x%02x",
++			chip_id, chip_major, chip_minor);
++
+ 	nvt_efm_disable(nvt);
+ 
+ 	spin_lock_irqsave(&nvt->nvt_lock, flags);
+diff --git a/drivers/media/rc/nuvoton-cir.h b/drivers/media/rc/nuvoton-cir.h
+index 048135e..cc8cee3 100644
+--- a/drivers/media/rc/nuvoton-cir.h
++++ b/drivers/media/rc/nuvoton-cir.h
+@@ -330,9 +330,13 @@ struct nvt_dev {
+ #define EFER_EFM_DISABLE	0xaa
+ 
+ /* Chip IDs found in CR_CHIP_ID_{HI,LO} */
+-#define CHIP_ID_HIGH		0xb4
+-#define CHIP_ID_LOW		0x72
+-#define CHIP_ID_LOW2		0x73
++#define CHIP_ID_HIGH_667	0xa5
++#define CHIP_ID_HIGH_677B	0xb4
++#define CHIP_ID_HIGH_677C	0xc3
++#define CHIP_ID_LOW_667		0x13
++#define CHIP_ID_LOW_677B2	0x72
++#define CHIP_ID_LOW_677B3	0x73
++#define CHIP_ID_LOW_677C	0x33
+ 
+ /* Config regs we need to care about */
+ #define CR_SOFTWARE_RESET	0x02
diff --git a/packages/linux/patches/linux-2.6.39-rc3-054_nuvoton_dont_fail_with_unsupported_chip_versions-0.1.diff b/packages/linux/patches/linux-2.6.39-rc3-054_nuvoton_dont_fail_with_unsupported_chip_versions-0.1.diff
deleted file mode 100644
index 58a642e52d..0000000000
--- a/packages/linux/patches/linux-2.6.39-rc3-054_nuvoton_dont_fail_with_unsupported_chip_versions-0.1.diff
+++ /dev/null
@@ -1,14 +0,0 @@
-diff -Naur linux-2.6.38.2/drivers/media/rc/nuvoton-cir.c linux-2.6.38.2.patch/drivers/media/rc/nuvoton-cir.c
---- linux-2.6.38.2/drivers/media/rc/nuvoton-cir.c	2011-03-27 20:37:20.000000000 +0200
-+++ linux-2.6.38.2.patch/drivers/media/rc/nuvoton-cir.c	2011-04-11 21:02:39.897028275 +0200
-@@ -250,9 +250,8 @@
- 
- 	if (chip_major != CHIP_ID_HIGH ||
- 	    (chip_minor != CHIP_ID_LOW && chip_minor != CHIP_ID_LOW2)) {
--		nvt_pr(KERN_ERR, "%s: unsupported chip, id: 0x%02x 0x%02x",
-+		nvt_pr(KERN_WARNING, "warning %s: unsupported chip revision, id: 0x%02x 0x%02x, it may not work",
- 		       chip_id, chip_major, chip_minor);
--		ret = -ENODEV;
- 	}
- 
- 	nvt_efm_disable(nvt);
diff --git a/packages/linux/patches/linux-2.6.39-rc3-055_nuvoton-cir-enable-CIR-on-w83667hg-chip-variant.patch b/packages/linux/patches/linux-2.6.39-rc3-055_nuvoton-cir-enable-CIR-on-w83667hg-chip-variant.patch
new file mode 100644
index 0000000000..3cd8c0be50
--- /dev/null
+++ b/packages/linux/patches/linux-2.6.39-rc3-055_nuvoton-cir-enable-CIR-on-w83667hg-chip-variant.patch
@@ -0,0 +1,63 @@
+diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c
+index bc5c1e2..5d93384 100644
+--- a/drivers/media/rc/nuvoton-cir.c
++++ b/drivers/media/rc/nuvoton-cir.c
+@@ -291,13 +291,23 @@ static int nvt_hw_detect(struct nvt_dev *nvt)
+ 
+ static void nvt_cir_ldev_init(struct nvt_dev *nvt)
+ {
+-	u8 val;
++	u8 val, psreg, psmask, psval;
++
++	if (nvt->chip_major == CHIP_ID_HIGH_667) {
++		psreg  = CR_MULTIFUNC_PIN_SEL;
++		psmask = MULTIFUNC_PIN_SEL_MASK;
++		psval  = MULTIFUNC_ENABLE_CIR | MULTIFUNC_ENABLE_CIRWB;
++	} else {
++		psreg  = CR_OUTPUT_PIN_SEL;
++		psmask = OUTPUT_PIN_SEL_MASK;
++		psval  = OUTPUT_ENABLE_CIR | OUTPUT_ENABLE_CIRWB;
++	}
+ 
+-	/* output pin selection (Pin95=CIRRX, Pin96=CIRTX1, WB enabled */
+-	val = nvt_cr_read(nvt, CR_OUTPUT_PIN_SEL);
+-	val &= OUTPUT_PIN_SEL_MASK;
+-	val |= (OUTPUT_ENABLE_CIR | OUTPUT_ENABLE_CIRWB);
+-	nvt_cr_write(nvt, val, CR_OUTPUT_PIN_SEL);
++	/* output pin selection: enable CIR, with WB sensor enabled */
++	val = nvt_cr_read(nvt, psreg);
++	val &= psmask;
++	val |= psval;
++	nvt_cr_write(nvt, val, psreg);
+ 
+ 	/* Select CIR logical device and enable */
+ 	nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR);
+diff --git a/drivers/media/rc/nuvoton-cir.h b/drivers/media/rc/nuvoton-cir.h
+index cc8cee3..379795d 100644
+--- a/drivers/media/rc/nuvoton-cir.h
++++ b/drivers/media/rc/nuvoton-cir.h
+@@ -345,6 +345,7 @@ struct nvt_dev {
+ #define CR_CHIP_ID_LO		0x21
+ #define CR_DEV_POWER_DOWN	0x22 /* bit 2 is CIR power, default power on */
+ #define CR_OUTPUT_PIN_SEL	0x27
++#define CR_MULTIFUNC_PIN_SEL	0x2c
+ #define CR_LOGICAL_DEV_EN	0x30 /* valid for all logical devices */
+ /* next three regs valid for both the CIR and CIR_WAKE logical devices */
+ #define CR_CIR_BASE_ADDR_HI	0x60
+@@ -368,10 +369,16 @@ struct nvt_dev {
+ #define CIR_INTR_MOUSE_IRQ_BIT	0x80
+ #define PME_INTR_CIR_PASS_BIT	0x08
+ 
++/* w83677hg CIR pin config */
+ #define OUTPUT_PIN_SEL_MASK	0xbc
+ #define OUTPUT_ENABLE_CIR	0x01 /* Pin95=CIRRX, Pin96=CIRTX1 */
+ #define OUTPUT_ENABLE_CIRWB	0x40 /* enable wide-band sensor */
+ 
++/* w83667hg CIR pin config */
++#define MULTIFUNC_PIN_SEL_MASK	0x1f
++#define MULTIFUNC_ENABLE_CIR	0x80 /* Pin75=CIRRX, Pin76=CIRTX1 */
++#define MULTIFUNC_ENABLE_CIRWB	0x20 /* enable wide-band sensor */
++
+ /* MCE CIR signal length, related on sample period */
+ 
+ /* MCE CIR controller signal length: about 43ms