Merge pull request #4198 from dhewg/pull/sunxi-boot

Allwinner: update boot components

packages/tools/atf/package.mk

@@ -2,8 +2,8 @@
 # Copyright (C) 2018-present Team LibreELEC
 
 PKG_NAME="atf"
-PKG_VERSION="v2.1"
+PKG_VERSION="v2.2"
-PKG_SHA256="7c4c00a4f28d3cfbb235fd1a1fb28c4d2fc1d657c9301686e7d8824ef575d059"
+PKG_SHA256="07e3c058ae2d95c7d516a46fc93565b797e912c3271ddbf29df523b1ab1ee911"
 PKG_ARCH="arm aarch64"
 PKG_LICENSE="BSD-3c"
 PKG_SITE="https://github.com/ARM-software/arm-trusted-firmware"

packages/tools/atf/patches/01-plat-allwinner-h6-add-wdt_quirk-to-use-r_wdt-instead.patch

@@ -1,36 +0,0 @@
-From 523ab5be1a84e9aa15fb62c3a15a6338b01d3961 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= <peron.clem@gmail.com>
-Date: Tue, 9 Apr 2019 00:15:06 +0200
-Subject: [PATCH] plat: allwinner: common: use r_wdog instead of wdog
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Some Allwinner H6 has a broken watchdog that doesn't
-make the soc reboot.
-
-Use the R_WATCHDOG instead.
-
-Signed-off-by: Clément Péron <peron.clem@gmail.com>
-Change-Id: Ie95cc30a80ed517b60b30d6bc2e655a1b53f18ba
----
- plat/allwinner/common/sunxi_pm.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/plat/allwinner/common/sunxi_pm.c b/plat/allwinner/common/sunxi_pm.c
-index 1d2dc93852..13e1353258 100644
---- a/plat/allwinner/common/sunxi_pm.c
-+++ b/plat/allwinner/common/sunxi_pm.c
-@@ -20,9 +20,9 @@
- #include <sunxi_mmap.h>
- #include <sunxi_private.h>
- 
--#define SUNXI_WDOG0_CTRL_REG		(SUNXI_WDOG_BASE + 0x0010)
--#define SUNXI_WDOG0_CFG_REG		(SUNXI_WDOG_BASE + 0x0014)
--#define SUNXI_WDOG0_MODE_REG		(SUNXI_WDOG_BASE + 0x0018)
-+#define SUNXI_WDOG0_CTRL_REG		(SUNXI_R_WDOG_BASE + 0x0010)
-+#define SUNXI_WDOG0_CFG_REG		(SUNXI_R_WDOG_BASE + 0x0014)
-+#define SUNXI_WDOG0_MODE_REG		(SUNXI_R_WDOG_BASE + 0x0018)
- 
- #define mpidr_is_valid(mpidr) ( \
- 	MPIDR_AFFLVL3_VAL(mpidr) == 0 && \

packages/tools/u-boot/package.mk

@@ -29,8 +29,8 @@ case "$PROJECT" in
     PKG_PATCH_DIRS="rockchip"
     ;;
   *)
-    PKG_VERSION="d9110878895634cd9e8bf891c832d2a58b36863c"
+    PKG_VERSION="v2020.01"
-    PKG_SHA256="4d89dc15e5fa3bc9379c097d3315aba08ff6812b892b8900f4bef3fabb8ca1f5"
+    PKG_SHA256="e981e02592f7b5386e5bc2b8a076aebc47d90b0ec9ae62be4b76daadc083b3ef"
     PKG_URL="https://github.com/u-boot/u-boot/archive/$PKG_VERSION.tar.gz"
     ;;
 esac

projects/Allwinner/devices/H6/patches/u-boot/002-orange-pi-3-support.patch

@@ -1,111 +1,17 @@
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+--- a/arch/arm/dts/sun50i-h6-orangepi-3.dts	2019-11-26 07:49:45.449465112 +0100
-index 0e2ffdb87f..ad60ae0179 100644
++++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts	2019-11-26 07:55:56.414722853 +0100
---- a/arch/arm/dts/Makefile
+@@ -15,6 +15,7 @@
-+++ b/arch/arm/dts/Makefile
+ 	aliases {
-@@ -467,6 +467,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ 		serial0 = &uart0;
- 	sun50i-h5-orangepi-prime.dtb \
+ 		serial1 = &uart1;
- 	sun50i-h5-orangepi-zero-plus2.dtb
- dtb-$(CONFIG_MACH_SUN50I_H6) += \
-+	sun50i-h6-orangepi-3.dtb \
- 	sun50i-h6-beelink-gs1.dtb \
- 	sun50i-h6-orangepi-lite2.dtb \
- 	sun50i-h6-orangepi-one-plus.dtb \
- 	sun50i-h6-pine-h64.dtb
-diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts
-new file mode 100644
-index 0000000000..8070adc39b
---- /dev/null
-+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
-@@ -0,0 +1,326 @@
-+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
-+/*
-+ * Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
-+ */
-+
-+/dts-v1/;
-+
-+#include "sun50i-h6.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+
-+/ {
-+	model = "OrangePi 3";
-+	compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";
-+
-+	aliases {
-+		serial0 = &uart0;
-+		serial1 = &uart1;
 +		ethernet0 = &emac;
-+	};
+ 	};
-+
+ 
-+	chosen {
+ 	chosen {
-+		stdout-path = "serial0:115200n8";
+@@ -84,6 +85,27 @@
-+	};
+ 		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
-+
+ 		post-power-on-delay-ms = <200>;
-+	connector {
+ 	};
-+		compatible = "hdmi-connector";
-+		type = "a";
-+		ddc-supply = <&reg_ddc>;
-+
-+		port {
-+			hdmi_con_in: endpoint {
-+				remote-endpoint = <&hdmi_out_con>;
-+			};
-+		};
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		power {
-+			label = "orangepi:red:power";
-+			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
-+			default-state = "on";
-+		};
-+
-+		status {
-+			label = "orangepi:green:status";
-+			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
-+		};
-+	};
-+
-+	reg_ddc: ddc-io {
-+		compatible = "regulator-fixed";
-+		regulator-name = "ddc-io";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		enable-active-high;
-+		gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
-+	};
-+
-+	reg_vcc5v: vcc5v {
-+		/* board wide 5V supply directly from the DC jack */
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc-5v";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+	};
-+
-+	reg_vcc33_wifi: vcc33-wifi {
-+		/* Always on 3.3V regulator for WiFi and BT */
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc33-wifi";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		vin-supply = <&reg_vcc5v>;
-+	};
-+
-+	reg_vcc_wifi_io: vcc-wifi-io {
-+		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc-wifi-io";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+		vin-supply = <&reg_vcc33_wifi>;
-+	};
 +
 +	/*
 +	 * The board uses 2.5V RGMII signalling. Power sequence to enable
@@ -127,24 +33,13 @@ index 0000000000..8070adc39b
 +		 */
 +		vin-supply = <&reg_aldo2>; /* GMAC-3V3 */
 +	};
-+};
+ };
-+
+ 
-+&cpu0 {
+ &cpu0 {
-+	cpu-supply = <&reg_dcdca>;
+@@ -102,6 +124,17 @@
-+};
+ 	status = "okay";
-+
+ };
-+&de {
+ 
-+	status = "okay";
-+};
-+
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ehci3 {
-+	status = "okay";
-+};
-+
 +&emac {
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&ext_rgmii_pins>;
@@ -156,16 +51,13 @@ index 0000000000..8070adc39b
 +	status = "okay";
 +};
 +
-+&hdmi {
+ &hdmi {
-+	status = "okay";
+ 	status = "okay";
-+};
+ };
-+
+@@ -112,6 +145,17 @@
-+&hdmi_out {
+ 	};
-+	hdmi_out_con: endpoint {
+ };
-+		remote-endpoint = <&hdmi_con_in>;
+ 
-+	};
-+};
-+
 +&mdio {
 +	ext_rgmii_phy: ethernet-phy@1 {
 +		compatible = "ethernet-phy-ieee802.3-c22";
@@ -177,13 +69,13 @@ index 0000000000..8070adc39b
 +	};
 +};
 +
-+&mmc0 {
+ &mmc0 {
-+	vmmc-supply = <&reg_cldo1>;
+ 	vmmc-supply = <&reg_cldo1>;
-+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-+	bus-width = <4>;
+@@ -136,6 +180,16 @@
-+	status = "okay";
+ 	};
-+};
+ };
-+
+ 
 +&mmc2 {
 +      pinctrl-names = "default";
 +      pinctrl-0 = <&mmc2_pins>;
@@ -194,173 +86,6 @@ index 0000000000..8070adc39b
 +      status = "okay";
 +};
 +
-+&ohci0 {
+ &ohci0 {
-+	status = "okay";
+ 	status = "okay";
-+};
+ };
-+
-+&ohci3 {
-+	status = "okay";
-+};
-+
-+&pio {
-+	vcc-pc-supply = <&reg_bldo2>;
-+	vcc-pd-supply = <&reg_cldo1>;
-+	vcc-pg-supply = <&reg_vcc_wifi_io>;
-+};
-+
-+&r_i2c {
-+	status = "okay";
-+
-+	axp805: pmic@36 {
-+		compatible = "x-powers,axp805", "x-powers,axp806";
-+		reg = <0x36>;
-+		interrupt-parent = <&r_intc>;
-+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-+		interrupt-controller;
-+		#interrupt-cells = <1>;
-+		x-powers,self-working-mode;
-+		vina-supply = <&reg_vcc5v>;
-+		vinb-supply = <&reg_vcc5v>;
-+		vinc-supply = <&reg_vcc5v>;
-+		vind-supply = <&reg_vcc5v>;
-+		vine-supply = <&reg_vcc5v>;
-+		aldoin-supply = <&reg_vcc5v>;
-+		bldoin-supply = <&reg_vcc5v>;
-+		cldoin-supply = <&reg_vcc5v>;
-+
-+		regulators {
-+			reg_aldo1: aldo1 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc-pl-led-ir";
-+			};
-+
-+			reg_aldo2: aldo2 {
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc33-audio-tv-ephy-mac";
-+			};
-+
-+			/* ALDO3 is shorted to CLDO1 */
-+			reg_aldo3: aldo3 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
-+			};
-+
-+			reg_bldo1: bldo1 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc18-dram-bias-pll";
-+			};
-+
-+			reg_bldo2: bldo2 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc-efuse-pcie-hdmi-pc";
-+			};
-+
-+			bldo3 {
-+				/* unused */
-+			};
-+
-+			bldo4 {
-+				/* unused */
-+			};
-+
-+			reg_cldo1: cldo1 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
-+			};
-+
-+			cldo2 {
-+				/* unused */
-+			};
-+
-+			cldo3 {
-+				/* unused */
-+			};
-+
-+			reg_dcdca: dcdca {
-+				regulator-always-on;
-+				regulator-min-microvolt = <800000>;
-+				regulator-max-microvolt = <1160000>;
-+				regulator-name = "vdd-cpu";
-+			};
-+
-+			reg_dcdcc: dcdcc {
-+				regulator-min-microvolt = <810000>;
-+				regulator-max-microvolt = <1080000>;
-+				regulator-name = "vdd-gpu";
-+			};
-+
-+			reg_dcdcd: dcdcd {
-+				regulator-always-on;
-+				regulator-min-microvolt = <960000>;
-+				regulator-max-microvolt = <960000>;
-+				regulator-name = "vdd-sys";
-+			};
-+
-+			reg_dcdce: dcdce {
-+				regulator-always-on;
-+				regulator-min-microvolt = <1200000>;
-+				regulator-max-microvolt = <1200000>;
-+				regulator-name = "vcc-dram";
-+			};
-+
-+			sw {
-+				/* unused */
-+			};
-+		};
-+	};
-+};
-+
-+&uart0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_ph_pins>;
-+	status = "okay";
-+};
-+
-+&usb2otg {
-+	/*
-+	 * This board doesn't have a controllable VBUS even though it
-+	 * does have an ID pin. Using it as anything but a USB host is
-+	 * unsafe.
-+	 */
-+	dr_mode = "host";
-+	status = "okay";
-+};
-+
-+&usb2phy {
-+	usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
-+	usb0_vbus-supply = <&reg_vcc5v>;
-+	usb3_vbus-supply = <&reg_vcc5v>;
-+	status = "okay";
-+};
-diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig
-new file mode 100644
-index 0000000000..9a9cd28142
---- /dev/null
-+++ b/configs/orangepi_3_defconfig
-@@ -0,0 +1,15 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN50I_H6=y
-+CONFIG_SUNXI_DRAM_H6_LPDDR3=y
-+CONFIG_MMC0_CD_PIN="PF6"
-+# CONFIG_PSCI_RESET is not set
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
-+CONFIG_NR_DRAM_BANKS=1
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_SPL_TEXT_BASE=0x20060
-+# CONFIG_CMD_FLASH is not set
-+# CONFIG_SPL_DOS_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3"

projects/Allwinner/devices/H6/patches/u-boot/006-DDR3.patch

@@ -29,7 +29,7 @@ index 528fb909d5..c463aca190 100644
  	sun50i-h5-orangepi-zero-plus2.dtb
  dtb-$(CONFIG_MACH_SUN50I_H6) += \
 +	sun50i-h6-eachlink-h6-mini.dtb \
- 	sun50i-h6-orangepi-3.dtb \
+ 	sun50i-h6-beelink-gs1.dtb \
  	sun50i-h6-orangepi-lite2.dtb \
  	sun50i-h6-orangepi-one-plus.dtb \
 diff --git a/arch/arm/dts/sun50i-h6-eachlink-h6-mini.dts b/arch/arm/dts/sun50i-h6-eachlink-h6-mini.dts

projects/Allwinner/devices/H6/patches/u-boot/008-sunxi-board-fixup-the-BT-address-for-Orange-Pi-3.patch

@@ -1,60 +0,0 @@
-From c7e886b9f2a39fe2ce98a16c6e7359171bac8c65 Mon Sep 17 00:00:00 2001
-From: Andre Heider <a.heider@gmail.com>
-Date: Sun, 17 Nov 2019 20:24:43 +0100
-Subject: [PATCH] sunxi: board: fixup the BT address for Orange Pi 3
-
-The BCM4345C5 of the Orange Pi 3 ships with the controller default
-address. Fix it up so it can function properly.
-
-The used address is "ethaddr" with the LSB flipped.
-
-Signed-off-by: Andre Heider <a.heider@gmail.com>
----
- board/sunxi/board.c | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
-diff --git a/board/sunxi/board.c b/board/sunxi/board.c
-index e3b2d13892..a0e08dc9b8 100644
---- a/board/sunxi/board.c
-+++ b/board/sunxi/board.c
-@@ -864,6 +864,28 @@ int misc_init_r(void)
- 	return 0;
- }
- 
-+static void fixup_bdaddr(void *blob)
-+{
-+#if defined(CONFIG_MACH_SUN50I_H6)
-+	uchar mac[ETH_ALEN], bdaddr[ETH_ALEN];
-+	int i;
-+
-+	if (!of_machine_is_compatible("xunlong,orangepi-3"))
-+		return;
-+
-+	if (!eth_env_get_enetaddr("ethaddr", mac))
-+		return;
-+
-+	for (i = 0; i < sizeof(mac); ++i)
-+		bdaddr[i] = mac[ETH_ALEN - i - 1];
-+
-+	bdaddr[0] ^= 0x01;
-+
-+	do_fixup_by_compat(blob, "brcm,bcm4345c5",
-+			   "local-bd-address", bdaddr, ETH_ALEN, 1);
-+#endif
-+}
-+
- int ft_board_setup(void *blob, bd_t *bd)
- {
- 	int __maybe_unused r;
-@@ -874,6 +896,8 @@ int ft_board_setup(void *blob, bd_t *bd)
- 	 */
- 	setup_environment(blob);
- 
-+	fixup_bdaddr(blob);
-+
- #ifdef CONFIG_VIDEO_DT_SIMPLEFB
- 	r = sunxi_simplefb_setup(blob);
- 	if (r)
--- 
-2.24.0
-

projects/Allwinner/linux/linux.aarch64.conf

@@ -425,15 +425,15 @@ CONFIG_ARM64_SVE=y
 CONFIG_ARM64_MODULE_PLTS=y
 # CONFIG_ARM64_PSEUDO_NMI is not set
 # CONFIG_RANDOMIZE_BASE is not set
+CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+CONFIG_STACKPROTECTOR_PER_TASK=y
 # end of Kernel Features
 
 #
 # Boot options
 #
 CONFIG_CMDLINE=""
-CONFIG_EFI_STUB=y
+# CONFIG_EFI is not set
-CONFIG_EFI=y
-CONFIG_DMI=y
 # end of Boot options
 
 CONFIG_SYSVIPC_COMPAT=y
@@ -525,27 +525,10 @@ CONFIG_ARM_SCPI_CPUFREQ=y
 CONFIG_ARM_SCPI_PROTOCOL=y
 CONFIG_ARM_SCPI_POWER_DOMAIN=y
 # CONFIG_ARM_SDE_INTERFACE is not set
-CONFIG_DMIID=y
-# CONFIG_DMI_SYSFS is not set
 CONFIG_HAVE_ARM_SMCCC=y
 CONFIG_ARM_PSCI_FW=y
 # CONFIG_ARM_PSCI_CHECKER is not set
 # CONFIG_GOOGLE_FIRMWARE is not set
-
-#
-# EFI (Extensible Firmware Interface) Support
-#
-# CONFIG_EFI_VARS is not set
-CONFIG_EFI_ESRT=y
-CONFIG_EFI_PARAMS_FROM_FDT=y
-CONFIG_EFI_RUNTIME_WRAPPERS=y
-CONFIG_EFI_ARMSTUB=y
-CONFIG_EFI_ARMSTUB_DTB_LOADER=y
-CONFIG_EFI_CAPSULE_LOADER=y
-# CONFIG_EFI_TEST is not set
-# CONFIG_RESET_ATTACK_MITIGATION is not set
-# end of EFI (Extensible Firmware Interface) Support
-
 CONFIG_EFI_EARLYCON=y
 
 #
@@ -554,8 +537,6 @@ CONFIG_EFI_EARLYCON=y
 # end of Tegra firmware driver
 # end of Firmware Drivers
 
-CONFIG_ARCH_SUPPORTS_ACPI=y
-# CONFIG_ACPI is not set
 # CONFIG_VIRTUALIZATION is not set
 CONFIG_ARM64_CRYPTO=y
 CONFIG_CRYPTO_SHA256_ARM64=y
@@ -3602,7 +3583,6 @@ CONFIG_FB_MODE_HELPERS=y
 # Frame buffer hardware drivers
 #
 CONFIG_FB_ARMCLCD=y
-# CONFIG_FB_EFI is not set
 # CONFIG_FB_OPENCORES is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_SMSCUFX is not set
@@ -4445,7 +4425,6 @@ CONFIG_RTC_DRV_DS3232_HWMON=y
 # CONFIG_RTC_DRV_DS1685_FAMILY is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_DS2404 is not set
-CONFIG_RTC_DRV_EFI=y
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
 # CONFIG_RTC_DRV_M48T35 is not set
@@ -5445,7 +5424,6 @@ CONFIG_HUGETLB_PAGE=y
 CONFIG_MEMFD_CREATE=y
 CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
 CONFIG_CONFIGFS_FS=y
-CONFIG_EFIVAR_FS=y
 # end of Pseudo filesystems
 
 CONFIG_MISC_FILESYSTEMS=y
@@ -5936,7 +5914,6 @@ CONFIG_CLZ_TAB=y
 CONFIG_MPILIB=y
 CONFIG_LIBFDT=y
 CONFIG_OID_REGISTRY=y
-CONFIG_UCS2_STRING=y
 CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
 CONFIG_FONT_SUPPORT=y
@@ -6127,7 +6104,6 @@ CONFIG_STRICT_DEVMEM=y
 # CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
 # CONFIG_DEBUG_WX is not set
 # CONFIG_DEBUG_ALIGN_RODATA is not set
-# CONFIG_DEBUG_EFI is not set
 # CONFIG_ARM64_RELOC_TEST is not set
 # CONFIG_CORESIGHT is not set
 # end of arm64 Debugging