From cdd3ee99c7fee5140d870a185e2f0e0cdce769bc Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:01:28 +0200 Subject: [PATCH 01/11] RTL8192CU: Update package --- packages/linux-drivers/RTL8192CU/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/linux-drivers/RTL8192CU/package.mk b/packages/linux-drivers/RTL8192CU/package.mk index 3fa1a529f5..3a8fa70018 100644 --- a/packages/linux-drivers/RTL8192CU/package.mk +++ b/packages/linux-drivers/RTL8192CU/package.mk @@ -3,8 +3,8 @@ # Copyright (C) 2018-present Team LibreELEC (https://libreelec.tv) PKG_NAME="RTL8192CU" -PKG_VERSION="9a5fe3e94176c5154515834e99c00069d0bf1fd7" -PKG_SHA256="1488e6fdfc51d7a7ec8fb95d1c3b212d64f3e66e8d2f7e6637bf3dd642a75289" +PKG_VERSION="0f37bd7f97573f835e4dedb4b2628c1ceedd71ad" +PKG_SHA256="0291b11b11b0949769270ba28b279194c3f77a407922cb1221d06c13cbbb5a13" PKG_LICENSE="GPL" PKG_SITE="https://github.com/pvaret/rtl8192cu-fixes" PKG_URL="$PKG_SITE/archive/$PKG_VERSION.tar.gz" From 873b6e28d47be59ad8f3f4c2292fcf7ef10fa54b Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:01:45 +0200 Subject: [PATCH 02/11] RTL8192DU: Update package --- packages/linux-drivers/RTL8192DU/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/linux-drivers/RTL8192DU/package.mk b/packages/linux-drivers/RTL8192DU/package.mk index e7f15ad82d..ddffded333 100644 --- a/packages/linux-drivers/RTL8192DU/package.mk +++ b/packages/linux-drivers/RTL8192DU/package.mk @@ -3,8 +3,8 @@ # Copyright (C) 2018-present Team LibreELEC (https://libreelec.tv) PKG_NAME="RTL8192DU" -PKG_VERSION="68ee70c46aeeb81220f5981f62a57916fd896cc8" -PKG_SHA256="f35aa7b832561a9d771cbb92acfe83498de05a985de94ec7acf995d5b244a10a" +PKG_VERSION="d6185ff4a242ebf553e9e9980da21591660e8f8c" +PKG_SHA256="fef5ab863b3f4f3d6e7e4af891aca6bcb5a080fc9a0a4bd88abef82e8966c35d" PKG_LICENSE="GPL" PKG_SITE="https://github.com/lwfinger/rtl8192du" PKG_URL="https://github.com/lwfinger/rtl8192du/archive/$PKG_VERSION.tar.gz" From ca749d2825f655e3ce63f62ba8fd9f91373aeafd Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:02:07 +0200 Subject: [PATCH 03/11] RTL8192EU: Update package --- packages/linux-drivers/RTL8192EU/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/linux-drivers/RTL8192EU/package.mk b/packages/linux-drivers/RTL8192EU/package.mk index ed52ad77a5..88c0598c97 100644 --- a/packages/linux-drivers/RTL8192EU/package.mk +++ b/packages/linux-drivers/RTL8192EU/package.mk @@ -3,8 +3,8 @@ # Copyright (C) 2018-present Team LibreELEC (https://libreelec.tv) PKG_NAME="RTL8192EU" -PKG_VERSION="83b5aff2a54785608129ac2a7db659a9699508ee" -PKG_SHA256="09b6bf64ea0686a4ecc6ec25191b32e384b903edf9cc1d2f891c56cf7b7e6d5e" +PKG_VERSION="925ac2be34dd608a7ca42daebf9713f0c1bcec74" +PKG_SHA256="0cc55fd22443d8b4010f1cd64a8164378b93e63193b42d1796b101713c41c07b" PKG_LICENSE="GPL" PKG_SITE="https://github.com/Mange/rtl8192eu-linux-driver" PKG_URL="https://github.com/Mange/rtl8192eu-linux-driver/archive/$PKG_VERSION.tar.gz" From 515a15c4d7dc5c66d3ffa4ffd78cd769b321d24d Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:02:46 +0200 Subject: [PATCH 04/11] RTL8188EU: Fix build on linux 5.8 --- .../patches/fix-build-with-5.8.patch | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 packages/linux-drivers/RTL8188EU/patches/fix-build-with-5.8.patch diff --git a/packages/linux-drivers/RTL8188EU/patches/fix-build-with-5.8.patch b/packages/linux-drivers/RTL8188EU/patches/fix-build-with-5.8.patch new file mode 100644 index 0000000000..366d08f273 --- /dev/null +++ b/packages/linux-drivers/RTL8188EU/patches/fix-build-with-5.8.patch @@ -0,0 +1,82 @@ +diff --git a/hostapd-0.8/src/crypto/sha256-internal.c b/hostapd-0.8/src/crypto/sha256-internal.c +index b0613739fbc6..c51983c6d633 100644 +--- a/hostapd-0.8/src/crypto/sha256-internal.c ++++ b/hostapd-0.8/src/crypto/sha256-internal.c +@@ -18,16 +18,10 @@ + #include "sha256.h" + #include "crypto.h" + +-struct sha256_state { +- u64 length; +- u32 state[8], curlen; +- u8 buf[64]; +-}; +- +-static void sha256_init(struct sha256_state *md); +-static int sha256_process(struct sha256_state *md, const unsigned char *in, ++static void sha256_init(struct sha256_state_rtw *md); ++static int sha256_process(struct sha256_state_rtw *md, const unsigned char *in, + unsigned long inlen); +-static int sha256_done(struct sha256_state *md, unsigned char *out); ++static int sha256_done(struct sha256_state_rtw *md, unsigned char *out); + + + /** +@@ -41,7 +35,7 @@ static int sha256_done(struct sha256_state *md, unsigned char *out); + int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len, + u8 *mac) + { +- struct sha256_state ctx; ++ struct sha256_state_rtw ctx; + size_t i; + + sha256_init(&ctx); +@@ -94,7 +88,7 @@ static const unsigned long K[64] = { + #endif + + /* compress 512-bits */ +-static int sha256_compress(struct sha256_state *md, unsigned char *buf) ++static int sha256_compress(struct sha256_state_rtw *md, unsigned char *buf) + { + u32 S[8], W[64], t0, t1; + u32 t; +@@ -137,7 +131,7 @@ static int sha256_compress(struct sha256_state *md, unsigned char *buf) + + + /* Initialize the hash state */ +-static void sha256_init(struct sha256_state *md) ++static void sha256_init(struct sha256_state_rtw *md) + { + md->curlen = 0; + md->length = 0; +@@ -158,7 +152,7 @@ static void sha256_init(struct sha256_state *md) + @param inlen The length of the data (octets) + @return CRYPT_OK if successful + */ +-static int sha256_process(struct sha256_state *md, const unsigned char *in, ++static int sha256_process(struct sha256_state_rtw *md, const unsigned char *in, + unsigned long inlen) + { + unsigned long n; +@@ -199,7 +193,7 @@ static int sha256_process(struct sha256_state *md, const unsigned char *in, + @param out [out] The destination of the hash (32 bytes) + @return CRYPT_OK if successful + */ +-static int sha256_done(struct sha256_state *md, unsigned char *out) ++static int sha256_done(struct sha256_state_rtw *md, unsigned char *out) + { + int i; + +diff --git a/include/rtw_security.h b/include/rtw_security.h +index 21b9c35ce34c..374e6ca86c47 100644 +--- a/include/rtw_security.h ++++ b/include/rtw_security.h +@@ -168,7 +168,7 @@ struct security_priv { + u8 bWepDefaultKeyIdxSet; + }; + +-struct sha256_state { ++struct sha256_state_rtw { + u64 length; + u32 state[8], curlen; + u8 buf[64]; From 3a4cbd103c53ba1983ac3e6a32d9a47340d0b0c9 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:03:22 +0200 Subject: [PATCH 05/11] RTL8812AU: Update package --- packages/linux-drivers/RTL8812AU/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/linux-drivers/RTL8812AU/package.mk b/packages/linux-drivers/RTL8812AU/package.mk index 171e99c776..ecf4ddfa43 100644 --- a/packages/linux-drivers/RTL8812AU/package.mk +++ b/packages/linux-drivers/RTL8812AU/package.mk @@ -3,8 +3,8 @@ # Copyright (C) 2018-present Team LibreELEC (https://libreelec.tv) PKG_NAME="RTL8812AU" -PKG_VERSION="d88d8b2e2a1b33ebdd62b8a5de307b37c39d8477" -PKG_SHA256="c5b2fcc6cbf6901e63f75ece49a8ce3219004536cfc585b9815b34d943c9f311" +PKG_VERSION="8af27f5bebe1c890879fb2cc50e672a7f55c6505" +PKG_SHA256="6badcf35d7f42e0f906000d7cf59b0afcdc7d97f41de16e54158cf53e1518c58" PKG_LICENSE="GPL" PKG_SITE="https://github.com/MilhouseVH/RTL8812AU" PKG_URL="https://github.com/MilhouseVH/RTL8812AU/archive/$PKG_VERSION.tar.gz" From aeb313145678ecb6fd1ea87dc98b6d0a5ac03126 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:03:53 +0200 Subject: [PATCH 06/11] linux: Update to 5.8 --- packages/linux/package.mk | 4 +- ...-definition-of-traceid_list-global-v.patch | 66 ------------------- ...o_clock_gettime64-phys-timer-syscall.patch | 12 ---- 3 files changed, 2 insertions(+), 80 deletions(-) delete mode 100644 packages/linux/patches/default/linux-0001-perf-cs-etm-Move-definition-of-traceid_list-global-v.patch delete mode 100644 packages/linux/patches/default/linux.999.03-arm-vdso-add-vdso_clock_gettime64-phys-timer-syscall.patch diff --git a/packages/linux/package.mk b/packages/linux/package.mk index abe520750b..ca1b475413 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -22,8 +22,8 @@ case "$LINUX" in PKG_SOURCE_NAME="linux-$LINUX-$PKG_VERSION.tar.gz" ;; *) - PKG_VERSION="5.7.6" - PKG_SHA256="9fd4c93dc6df53efa904134aa2ede6100f7453c11383490dd32ebbed84f610e6" + PKG_VERSION="5.8" + PKG_SHA256="e7f75186aa0642114af8f19d99559937300ca27acaf7451b36d4f9b0f85cf1f5" PKG_URL="https://www.kernel.org/pub/linux/kernel/v5.x/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_PATCH_DIRS="default" ;; diff --git a/packages/linux/patches/default/linux-0001-perf-cs-etm-Move-definition-of-traceid_list-global-v.patch b/packages/linux/patches/default/linux-0001-perf-cs-etm-Move-definition-of-traceid_list-global-v.patch deleted file mode 100644 index 5c3d2df2da..0000000000 --- a/packages/linux/patches/default/linux-0001-perf-cs-etm-Move-definition-of-traceid_list-global-v.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 168200b6d6ea0cb5765943ec5da5b8149701f36a Mon Sep 17 00:00:00 2001 -From: Leo Yan -Date: Tue, 5 May 2020 21:36:42 +0800 -Subject: [PATCH] perf cs-etm: Move definition of 'traceid_list' global - variable from header file - -The variable 'traceid_list' is defined in the header file cs-etm.h, -if multiple C files include cs-etm.h the compiler might complaint for -multiple definition of 'traceid_list'. - -To fix multiple definition error, move the definition of 'traceid_list' -into cs-etm.c. - -Fixes: cd8bfd8c973e ("perf tools: Add processing of coresight metadata") -Reported-by: Thomas Backlund -Signed-off-by: Leo Yan -Reviewed-by: Mathieu Poirier -Reviewed-by: Mike Leach -Tested-by: Mike Leach -Tested-by: Thomas Backlund -Cc: Alexander Shishkin -Cc: Jiri Olsa -Cc: Mark Rutland -Cc: Namhyung Kim -Cc: Peter Zijlstra -Cc: Suzuki Poulouse -Cc: Tor Jeremiassen -Cc: linux-arm-kernel@lists.infradead.org -Link: http://lore.kernel.org/lkml/20200505133642.4756-1-leo.yan@linaro.org -Signed-off-by: Arnaldo Carvalho de Melo ---- - tools/perf/util/cs-etm.c | 3 +++ - tools/perf/util/cs-etm.h | 3 --- - 2 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c -index 3c802fde4954..c283223fb31f 100644 ---- a/tools/perf/util/cs-etm.c -+++ b/tools/perf/util/cs-etm.c -@@ -94,6 +94,9 @@ struct cs_etm_queue { - struct cs_etm_traceid_queue **traceid_queues; - }; - -+/* RB tree for quick conversion between traceID and metadata pointers */ -+static struct intlist *traceid_list; -+ - static int cs_etm__update_queues(struct cs_etm_auxtrace *etm); - static int cs_etm__process_queues(struct cs_etm_auxtrace *etm); - static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm, -diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h -index 650ecc2a6349..4ad925d6d799 100644 ---- a/tools/perf/util/cs-etm.h -+++ b/tools/perf/util/cs-etm.h -@@ -114,9 +114,6 @@ enum cs_etm_isa { - CS_ETM_ISA_T32, - }; - --/* RB tree for quick conversion between traceID and metadata pointers */ --struct intlist *traceid_list; -- - struct cs_etm_queue; - - struct cs_etm_packet { --- -2.27.0 - diff --git a/packages/linux/patches/default/linux.999.03-arm-vdso-add-vdso_clock_gettime64-phys-timer-syscall.patch b/packages/linux/patches/default/linux.999.03-arm-vdso-add-vdso_clock_gettime64-phys-timer-syscall.patch deleted file mode 100644 index 8bef6a5996..0000000000 --- a/packages/linux/patches/default/linux.999.03-arm-vdso-add-vdso_clock_gettime64-phys-timer-syscall.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff --git a/arch/arm/kernel/vdso.c b/arch/arm/kernel/vdso.c -index e0330a25e1..28cfe7bad1 100644 ---- a/arch/arm/kernel/vdso.c -+++ b/arch/arm/kernel/vdso.c -@@ -184,6 +184,7 @@ static void __init patch_vdso(void *ehdr) - if (!cntvct_ok) { - vdso_nullpatch_one(&einfo, "__vdso_gettimeofday"); - vdso_nullpatch_one(&einfo, "__vdso_clock_gettime"); -+ vdso_nullpatch_one(&einfo, "__vdso_clock_gettime64"); - } - } - From db2df29c5f1de645142d8b6986284abb398304d1 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 4 Aug 2020 23:04:55 +0200 Subject: [PATCH 07/11] Allwinner: linux: Update to 5.8 --- .../linux/18-h3-increase-mali-frequency.patch | 26 - projects/Allwinner/linux/linux.aarch64.conf | 347 +++-- projects/Allwinner/linux/linux.arm.conf | 280 ++-- .../linux/0001-backport-from-5.8.patch | 1244 ----------------- .../linux/0002-backport-from-next.patch | 269 ---- .../linux/0005-cedrus-improvements.patch | 87 -- .../linux/0006-wip-cec-improvements.patch | 2 +- 7 files changed, 407 insertions(+), 1848 deletions(-) delete mode 100644 projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch delete mode 100644 projects/Allwinner/patches/linux/0001-backport-from-5.8.patch delete mode 100644 projects/Allwinner/patches/linux/0002-backport-from-next.patch diff --git a/projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch b/projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch deleted file mode 100644 index a15ea04d88..0000000000 --- a/projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 553421da73a5762107818f6e91771b54d80ff88e Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 4 Apr 2020 11:31:29 +0200 -Subject: [PATCH 3/3] ARM: dts: sun8i-h3: increase mali frequency - -Signed-off-by: Jernej Skrabec ---- - arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index e83aa6866e7e..808769cb6665 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -207,7 +207,7 @@ mali: gpu@1c40000 { - resets = <&ccu RST_BUS_GPU>; - - assigned-clocks = <&ccu CLK_GPU>; -- assigned-clock-rates = <384000000>; -+ assigned-clock-rates = <576000000>; - }; - - ths: thermal-sensor@1c25000 { --- -2.26.0 - diff --git a/projects/Allwinner/linux/linux.aarch64.conf b/projects/Allwinner/linux/linux.aarch64.conf index 7b452b22f5..ebf0a9b901 100644 --- a/projects/Allwinner/linux/linux.aarch64.conf +++ b/projects/Allwinner/linux/linux.aarch64.conf @@ -1,16 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.7.0 Kernel Configuration -# - -# -# Compiler: aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025 +# Linux/arm64 5.8.0 Kernel Configuration # +CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -25,12 +23,14 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set CONFIG_AUDIT=y @@ -109,6 +109,7 @@ CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -137,7 +138,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -330,12 +330,12 @@ CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_1024718=y CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_VHE=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_NVHE=y CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y CONFIG_ARM64_ERRATUM_1542419=y CONFIG_CAVIUM_ERRATUM_22375=y @@ -344,14 +344,13 @@ CONFIG_CAVIUM_ERRATUM_23154=y CONFIG_CAVIUM_ERRATUM_27456=y CONFIG_CAVIUM_ERRATUM_30115=y CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_QCOM_FALKOR_ERRATUM_1009=y CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y # end of ARM errata workarounds via the alternatives framework CONFIG_ARM64_4K_PAGES=y @@ -447,6 +446,8 @@ CONFIG_ARM64_AMU_EXTN=y # # ARMv8.5 architectural features # +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y CONFIG_ARM64_E0PD=y CONFIG_ARCH_RANDOM=y # end of ARMv8.5 architectural features @@ -454,6 +455,7 @@ CONFIG_ARCH_RANDOM=y CONFIG_ARM64_SVE=y CONFIG_ARM64_MODULE_PLTS=y # CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y @@ -476,6 +478,7 @@ CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -544,7 +547,6 @@ CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y CONFIG_ARM_SCPI_CPUFREQ=y -# CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # end of CPU Power Management @@ -555,11 +557,12 @@ CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_ARM_SDE_INTERFACE is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y # # Tegra firmware driver @@ -615,7 +618,6 @@ CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -663,6 +665,7 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y # # GCOV-based kernel profiling @@ -705,6 +708,7 @@ CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -744,6 +748,9 @@ CONFIG_FREEZER=y # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_SCRIPT=y @@ -762,7 +769,6 @@ CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_HAVE_FAST_GUP=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y @@ -823,6 +829,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set # CONFIG_XDP_SOCKETS is not set CONFIG_INET=y @@ -1135,6 +1142,7 @@ CONFIG_MRP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m @@ -1215,6 +1223,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1247,8 +1256,10 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HS is not set CONFIG_BT_LE=y CONFIG_BT_LEDS=y -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set # # Bluetooth device drivers @@ -1535,7 +1546,6 @@ CONFIG_BLK_DEV_NBD=m # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y -CONFIG_VEXPRESS_SYSCFG=y # CONFIG_XILINX_SDFEC is not set # CONFIG_PVPANIC is not set # CONFIG_C2PORT is not set @@ -1677,6 +1687,7 @@ CONFIG_DM_PERSISTENT_DATA=m CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_CACHE is not set # CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set # CONFIG_DM_ERA is not set # CONFIG_DM_CLONE is not set # CONFIG_DM_MIRROR is not set @@ -1806,7 +1817,6 @@ CONFIG_DWMAC_SUN8I=m CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_VIA=y -# CONFIG_VIA_RHINE is not set # CONFIG_VIA_VELOCITY is not set CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5100 is not set @@ -1822,6 +1832,7 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_GPIO is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1845,6 +1856,7 @@ CONFIG_AC200_PHY=y # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1994,6 +2006,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -2135,6 +2149,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set @@ -2194,9 +2209,7 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -2216,6 +2229,7 @@ CONFIG_INPUT_UINPUT=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -2238,7 +2252,7 @@ CONFIG_RMI4_F30=y # Hardware I/O ports # CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_SERPORT=m CONFIG_SERIO_AMBAKMI=y CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set @@ -2331,6 +2345,7 @@ CONFIG_SERIAL_DEV_CTRL_TTYPORT=y # CONFIG_IPMB_DEVICE_INTERFACE is not set CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_CCTRNG is not set CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set CONFIG_TCG_TPM=y @@ -2385,8 +2400,8 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_CADENCE is not set # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set CONFIG_I2C_MV64XXX=y @@ -2446,6 +2461,7 @@ CONFIG_SPI_ROCKCHIP=y # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2495,7 +2511,6 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AXP209=y -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_SINGLE=y # CONFIG_PINCTRL_SX150X is not set @@ -2523,7 +2538,6 @@ CONFIG_PINCTRL_SUN50I_A64_R=y CONFIG_PINCTRL_SUN50I_H5=y CONFIG_PINCTRL_SUN50I_H6=y CONFIG_PINCTRL_SUN50I_H6_R=y -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y @@ -2590,6 +2604,7 @@ CONFIG_GPIO_MAX77620=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set CONFIG_POWER_AVS=y @@ -2614,6 +2629,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2644,6 +2660,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2806,7 +2823,6 @@ CONFIG_CPU_FREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set # CONFIG_MAX77620_THERMAL is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_SUN8I_THERMAL=y # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y @@ -2835,6 +2851,7 @@ CONFIG_ARM_SP805_WATCHDOG=y CONFIG_SUNXI_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2874,8 +2891,10 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set CONFIG_MFD_HI6421_PMIC=y # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2894,6 +2913,7 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2985,6 +3005,7 @@ CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -3011,9 +3032,6 @@ CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_TPS6524X is not set CONFIG_REGULATOR_VCTRL=m # CONFIG_REGULATOR_VEXPRESS is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y -CONFIG_CEC_PIN=y CONFIG_RC_CORE=y CONFIG_RC_MAP=y CONFIG_LIRC=y @@ -3050,26 +3068,41 @@ CONFIG_IR_SUNXI=y # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set CONFIG_RC_XBOX_DVD=y +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_CEC_PIN=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_CEC_PIN_ERROR_INJ is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_GPIO is not set +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y CONFIG_MEDIA_RADIO_SUPPORT=y # CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -# CONFIG_CEC_PIN_ERROR_INJ is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=y CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m @@ -3077,18 +3110,38 @@ CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_DVB_CORE=y +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # + +# +# Drivers filtered as selected at 'Filter media drivers' +# +CONFIG_TTPCI_EEPROM=m CONFIG_MEDIA_USB_SUPPORT=y # @@ -3191,25 +3244,6 @@ CONFIG_VIDEO_EM28XX_V4L2=m CONFIG_VIDEO_EM28XX_ALSA=m CONFIG_VIDEO_EM28XX_DVB=m CONFIG_VIDEO_EM28XX_RC=m - -# -# USB HDMI CEC adapters -# -# CONFIG_V4L_PLATFORM_DRIVERS is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# CONFIG_V4L_TEST_DRIVERS is not set -CONFIG_DVB_PLATFORM_DRIVERS=y -CONFIG_CEC_PLATFORM_DRIVERS=y -# CONFIG_CEC_GPIO is not set - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set CONFIG_RADIO_ADAPTERS=y CONFIG_RADIO_TEA575X=m CONFIG_RADIO_SI470X=m @@ -3230,12 +3264,6 @@ CONFIG_RADIO_TEA5764=m CONFIG_RADIO_SAA7706H=m CONFIG_RADIO_TEF6862=m CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -# end of Texas Instruments WL128x FM driver (ST based) - CONFIG_MEDIA_COMMON_OPTIONS=y # @@ -3252,35 +3280,39 @@ CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y +# CONFIG_V4L_PLATFORM_DRIVERS is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_SUN8I_DEINTERLACE=m +CONFIG_VIDEO_SUN8I_ROTATE=m +CONFIG_DVB_PLATFORM_DRIVERS=y # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# MMC/SDIO DVB adapters # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +# CONFIG_SMS_SDIO_DRV is not set +# end of Media drivers + CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y + +# +# Media ancillary drivers +# CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# CONFIG_VIDEO_IR_I2C=y # -# I2C drivers hidden by 'Autoselect ancillary drivers' -# - -# -# Audio decoders, processors and mixers +# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' # CONFIG_VIDEO_MSP3400=m CONFIG_VIDEO_CS53L32A=m CONFIG_VIDEO_UDA1342=m CONFIG_VIDEO_WM8775=m CONFIG_VIDEO_SONY_BTF_MPX=m - -# -# RDS decoders -# - -# -# Video decoders -# CONFIG_VIDEO_SAA711X=m CONFIG_VIDEO_TVP5150=m CONFIG_VIDEO_TW2804=m @@ -3292,43 +3324,80 @@ CONFIG_VIDEO_TW9906=m # CONFIG_VIDEO_CX25840=m -# -# Video encoders -# - # # Camera sensor devices # +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set CONFIG_VIDEO_OV2640=m +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set CONFIG_VIDEO_OV7640=m +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set CONFIG_VIDEO_MT9V011=m +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers # +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices # +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices # -# Video improvement chips -# - -# -# Audio/Video compression chips -# - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# - -# -# SPI drivers hidden by 'Autoselect ancillary drivers' +# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -3340,7 +3409,7 @@ CONFIG_CXD2880_SPI_DRV=m CONFIG_MEDIA_TUNER=y # -# Tuner drivers hidden by 'Autoselect ancillary drivers' +# Tuner drivers auto-selected by 'Autoselect ancillary drivers' # CONFIG_MEDIA_TUNER_SIMPLE=y CONFIG_MEDIA_TUNER_TDA18250=m @@ -3376,7 +3445,7 @@ CONFIG_MEDIA_TUNER_R820T=m CONFIG_MEDIA_TUNER_QM1D1C0042=m # -# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' +# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -3504,10 +3573,7 @@ CONFIG_DVB_AF9033=m # Common Interface (EN50221) controller drivers # CONFIG_DVB_SP2=m - -# -# Tools to develop new frontends -# +# end of Media ancillary drivers # # Graphics support @@ -3592,9 +3658,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set @@ -3880,6 +3948,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set @@ -3951,6 +4020,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -4124,6 +4194,7 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set +# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4143,7 +4214,7 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y # # USB Device Class drivers # -# CONFIG_USB_ACM is not set +CONFIG_USB_ACM=m # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set @@ -4214,9 +4285,12 @@ CONFIG_USB_DWC2_DUAL_ROLE=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_OF=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y @@ -4377,6 +4451,7 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set @@ -4612,7 +4687,6 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRTIO_MENU is not set # CONFIG_VDPA is not set -CONFIG_VHOST_DPN=y # CONFIG_VHOST_MENU is not set # @@ -4730,15 +4804,10 @@ CONFIG_VIDEO_USBVISION=m # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_COMMON_CLK_VERSATILE is not set -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX77686 is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_RK808 is not set @@ -4766,8 +4835,6 @@ CONFIG_SUN50I_H6_R_CCU=y CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_DE2_CCU=y CONFIG_SUN8I_R_CCU=y -# end of Common Clock Framework - CONFIG_HWSPINLOCK=y # @@ -4775,7 +4842,6 @@ CONFIG_HWSPINLOCK=y # CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y -CONFIG_CLKSRC_MMIO=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y @@ -4783,7 +4849,6 @@ CONFIG_FSL_ERRATUM_A008585=y CONFIG_HISILICON_ERRATUM_161010101=y CONFIG_ARM64_ERRATUM_858921=y CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -CONFIG_CLKSRC_VERSATILE=y # CONFIG_MICROCHIP_PIT64B is not set # end of Clock Source drivers @@ -4811,6 +4876,7 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y +# CONFIG_SUN50I_IOMMU is not set # CONFIG_ARM_SMMU is not set # CONFIG_ARM_SMMU_V3 is not set @@ -4825,7 +4891,7 @@ CONFIG_IOMMU_DMA=y # CONFIG_RPMSG=y # CONFIG_RPMSG_CHAR is not set -CONFIG_RPMSG_QCOM_GLINK_NATIVE=y +CONFIG_RPMSG_QCOM_GLINK=y CONFIG_RPMSG_QCOM_GLINK_RPM=y # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers @@ -4977,6 +5043,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set @@ -4991,6 +5059,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -5032,6 +5101,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -5160,6 +5230,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -5316,8 +5387,10 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -5383,6 +5456,7 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -5394,7 +5468,6 @@ CONFIG_PHY_QCOM_USB_HS=y # CONFIG_PHY_QCOM_USB_HSIC is not set CONFIG_PHY_SAMSUNG_USB2=y # CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5488,6 +5561,7 @@ CONFIG_F2FS_FS_COMPRESSION=y CONFIG_F2FS_FS_LZO=y CONFIG_F2FS_FS_LZ4=y CONFIG_F2FS_FS_ZSTD=y +CONFIG_F2FS_FS_LZORLE=y # CONFIG_FS_DAX is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y @@ -5617,6 +5691,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_CONSOLE is not set # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_RAM is not set +# CONFIG_PSTORE_BLK is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5811,10 +5886,10 @@ CONFIG_CRYPTO_ECDH=m # Authenticated Encryption with Associated Data # CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GCM=y # CONFIG_CRYPTO_CHACHA20POLY1305 is not set # CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_ECHAINIV=y # @@ -5822,7 +5897,7 @@ CONFIG_CRYPTO_ECHAINIV=y # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_LRW is not set @@ -5850,7 +5925,7 @@ CONFIG_CRYPTO_XXHASH=m CONFIG_CRYPTO_BLAKE2B=m # CONFIG_CRYPTO_BLAKE2S is not set CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_GHASH=y # CONFIG_CRYPTO_POLY1305 is not set CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y @@ -5972,6 +6047,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5979,10 +6055,12 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y CONFIG_INDIRECT_PIO=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y @@ -6038,6 +6116,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_SWIOTLB=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_REMAP=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_CMA=y @@ -6088,6 +6167,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options @@ -6097,6 +6177,7 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set @@ -6138,6 +6219,8 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set @@ -6147,7 +6230,9 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y @@ -6155,6 +6240,7 @@ CONFIG_DEBUG_MEMORY_INIT=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -6251,8 +6337,6 @@ CONFIG_STRICT_DEVMEM=y # arm64 Debugging # # CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -# CONFIG_DEBUG_WX is not set # CONFIG_ARM64_RELOC_TEST is not set # CONFIG_CORESIGHT is not set # end of arm64 Debugging @@ -6291,6 +6375,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set diff --git a/projects/Allwinner/linux/linux.arm.conf b/projects/Allwinner/linux/linux.arm.conf index 67510ce2b9..0c5d476f6d 100644 --- a/projects/Allwinner/linux/linux.arm.conf +++ b/projects/Allwinner/linux/linux.arm.conf @@ -1,16 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 5.7.0 Kernel Configuration -# - -# -# Compiler: armv7ve-libreelec-linux-gnueabihf-gcc-9.3.0 (GCC) 9.3.0 +# Linux/arm 5.8.0 Kernel Configuration # +CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-10.2.0 (GCC) 10.2.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=90300 +CONFIG_GCC_VERSION=100200 CONFIG_LD_VERSION=234000000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -34,12 +32,14 @@ CONFIG_HAVE_KERNEL_LZ4=y # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set CONFIG_KERNEL_LZ4=y +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set @@ -128,7 +128,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -316,6 +315,7 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_SIRF is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_S5PV210 is not set @@ -447,6 +447,9 @@ CONFIG_SCHED_HRTICK=y CONFIG_ARM_PATCH_IDIV=y CONFIG_AEABI=y # CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y @@ -512,7 +515,6 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y # CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -# CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # @@ -575,10 +577,11 @@ CONFIG_ARCH_HIBERNATION_POSSIBLE=y # CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set -CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set -# CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y # # Tegra firmware driver @@ -617,7 +620,6 @@ CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -692,6 +694,7 @@ CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -760,6 +763,9 @@ CONFIG_COREDUMP=y # # Memory Management options # +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_ARCH_KEEP_MEMBLOCK=y @@ -809,6 +815,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=m # CONFIG_NET_KEY is not set # CONFIG_XDP_SOCKETS is not set CONFIG_INET=y @@ -1085,6 +1092,7 @@ CONFIG_STP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y # CONFIG_BRIDGE_VLAN_FILTERING is not set +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m @@ -1165,6 +1173,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1246,8 +1255,10 @@ CONFIG_BT_HIDP=m CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_LEDS=y -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set # # Bluetooth device drivers @@ -1582,6 +1593,7 @@ CONFIG_DM_PERSISTENT_DATA=m CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_CACHE is not set # CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set # CONFIG_DM_ERA is not set # CONFIG_DM_CLONE is not set # CONFIG_DM_MIRROR is not set @@ -1704,6 +1716,7 @@ CONFIG_MDIO_BUS_MUX=y # CONFIG_MDIO_BUS_MUX_MMIOREG is not set # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1726,6 +1739,7 @@ CONFIG_SWPHY=y # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1895,6 +1909,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -2029,9 +2045,7 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -2050,6 +2064,7 @@ CONFIG_INPUT_UINPUT=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -2259,6 +2274,7 @@ CONFIG_SPI_SUN6I=y # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2306,7 +2322,6 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AXP209=y -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SINGLE is not set # CONFIG_PINCTRL_SX150X is not set @@ -2332,7 +2347,6 @@ CONFIG_PINCTRL_SUN9I_A80_R=y # CONFIG_PINCTRL_SUN50I_H5 is not set # CONFIG_PINCTRL_SUN50I_H6 is not set # CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 @@ -2397,6 +2411,7 @@ CONFIG_GPIO_SYSFS=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set # CONFIG_POWER_AVS is not set @@ -2408,6 +2423,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2438,6 +2454,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2597,7 +2614,6 @@ CONFIG_CLOCK_THERMAL=y CONFIG_DEVFREQ_THERMAL=y # CONFIG_THERMAL_EMULATION is not set # CONFIG_THERMAL_MMIO is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_SUN8I_THERMAL=y CONFIG_GENERIC_ADC_THERMAL=y CONFIG_WATCHDOG=y @@ -2624,6 +2640,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_DW_WATCHDOG is not set CONFIG_SUNXI_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2673,8 +2690,10 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2693,6 +2712,7 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2735,7 +2755,7 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set +CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_T7L66XB is not set @@ -2784,6 +2804,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -2805,9 +2826,6 @@ CONFIG_REGULATOR_SY8106A=y # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set # CONFIG_REGULATOR_VCTRL is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y -CONFIG_CEC_PIN=y CONFIG_RC_CORE=y CONFIG_RC_MAP=y CONFIG_LIRC=y @@ -2844,26 +2862,44 @@ CONFIG_IR_SUNXI=y # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set CONFIG_RC_XBOX_DVD=y +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_CEC_PIN=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_CEC_PIN_ERROR_INJ is not set +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -# CONFIG_CEC_PIN_ERROR_INJ is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y +# end of Media core support + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=y CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m @@ -2871,18 +2907,34 @@ CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_DVB_CORE=y +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # +CONFIG_TTPCI_EEPROM=m CONFIG_MEDIA_USB_SUPPORT=y # @@ -2980,22 +3032,31 @@ CONFIG_DVB_AS102=m # CONFIG_VIDEO_EM28XX is not set # -# USB HDMI CEC adapters +# Software defined radio USB devices # -# CONFIG_V4L_PLATFORM_DRIVERS is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_DVB_PLATFORM_DRIVERS is not set -# CONFIG_CEC_PLATFORM_DRIVERS is not set - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_TEA575X=m +CONFIG_RADIO_SI470X=m +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m +CONFIG_RADIO_SI4713=m +CONFIG_USB_SI4713=m +CONFIG_PLATFORM_SI4713=m +CONFIG_I2C_SI4713=m +CONFIG_USB_MR800=m +CONFIG_USB_DSBR=m +CONFIG_RADIO_SHARK=m +CONFIG_RADIO_SHARK2=m +CONFIG_USB_KEENE=m +CONFIG_USB_RAREMONO=m +CONFIG_USB_MA901=m +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_SAA7706H=m +CONFIG_RADIO_TEF6862=m +CONFIG_RADIO_WL1273=m CONFIG_MEDIA_COMMON_OPTIONS=y # @@ -3012,17 +3073,30 @@ CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y +# CONFIG_V4L_PLATFORM_DRIVERS is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_SUN8I_DEINTERLACE=m +CONFIG_VIDEO_SUN8I_ROTATE=m +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# end of Media drivers + +# +# Media ancillary drivers # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y CONFIG_MEDIA_ATTACH=y -CONFIG_VIDEO_IR_I2C=y # -# I2C Encoders, decoders, sensors and other helper chips +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' # +CONFIG_VIDEO_IR_I2C=y # # Audio decoders, processors and mixers @@ -3043,11 +3117,13 @@ CONFIG_VIDEO_WM8775=m CONFIG_VIDEO_WM8739=m CONFIG_VIDEO_VP27SMPX=m CONFIG_VIDEO_SONY_BTF_MPX=m +# end of Audio decoders, processors and mixers # # RDS decoders # CONFIG_VIDEO_SAA6588=m +# end of RDS decoders # # Video decoders @@ -3082,6 +3158,7 @@ CONFIG_VIDEO_VPX3220=m # CONFIG_VIDEO_SAA717X=m CONFIG_VIDEO_CX25840=m +# end of Video decoders # # Video encoders @@ -3097,6 +3174,35 @@ CONFIG_VIDEO_ADV7511_CEC=y CONFIG_VIDEO_AD9389B=m CONFIG_VIDEO_AK881X=m CONFIG_VIDEO_THS8200=m +# end of Video encoders + +# +# Video improvement chips +# +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +# end of Video improvement chips + +# +# Audio/Video compression chips +# +CONFIG_VIDEO_SAA6752HS=m +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +CONFIG_SDR_MAX2175=m +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +CONFIG_VIDEO_THS7303=m +CONFIG_VIDEO_M52790=m +CONFIG_VIDEO_I2C=m +CONFIG_VIDEO_ST_MIPID02=m +# end of Miscellaneous helper chips # # Camera sensor devices @@ -3113,6 +3219,7 @@ CONFIG_VIDEO_THS8200=m # CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2680 is not set # CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set # CONFIG_VIDEO_OV5640 is not set # CONFIG_VIDEO_OV5645 is not set # CONFIG_VIDEO_OV5647 is not set @@ -3150,6 +3257,7 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_SMIAPP is not set # CONFIG_VIDEO_ET8EK8 is not set # CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers @@ -3158,6 +3266,7 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_AK7375 is not set # CONFIG_VIDEO_DW9714 is not set # CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices @@ -3165,30 +3274,7 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_ADP1653 is not set # CONFIG_VIDEO_LM3560 is not set # CONFIG_VIDEO_LM3646 is not set - -# -# Video improvement chips -# -CONFIG_VIDEO_UPD64031A=m -CONFIG_VIDEO_UPD64083=m - -# -# Audio/Video compression chips -# -CONFIG_VIDEO_SAA6752HS=m - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# -CONFIG_VIDEO_THS7303=m -CONFIG_VIDEO_M52790=m -CONFIG_VIDEO_I2C=m -CONFIG_VIDEO_ST_MIPID02=m -# end of I2C Encoders, decoders, sensors and other helper chips +# end of Flash devices # # SPI helper chips @@ -3213,8 +3299,8 @@ CONFIG_MEDIA_TUNER_TDA8290=y CONFIG_MEDIA_TUNER_TDA827X=y CONFIG_MEDIA_TUNER_TDA18271=y CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y CONFIG_MEDIA_TUNER_MSI001=m CONFIG_MEDIA_TUNER_MT20XX=y CONFIG_MEDIA_TUNER_MT2060=m @@ -3329,6 +3415,7 @@ CONFIG_DVB_CXD2820R=m CONFIG_DVB_CXD2841ER=m CONFIG_DVB_RTL2830=m CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m CONFIG_DVB_SI2168=m CONFIG_DVB_AS102_FE=m CONFIG_DVB_ZD1301_DEMOD=m @@ -3408,12 +3495,13 @@ CONFIG_DVB_HELENE=m # CONFIG_DVB_CXD2099=m CONFIG_DVB_SP2=m +# end of Customise DVB Frontends # # Tools to develop new frontends # # CONFIG_DVB_DUMMY_FE is not set -# end of Customise DVB Frontends +# end of Media ancillary drivers # # Graphics support @@ -3492,6 +3580,7 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y @@ -3501,9 +3590,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set @@ -3762,6 +3853,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set @@ -3833,6 +3925,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -4023,7 +4116,7 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y # # USB Device Class drivers # -# CONFIG_USB_ACM is not set +CONFIG_USB_ACM=m # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set @@ -4260,6 +4353,7 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set @@ -4483,7 +4577,6 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRTIO_MENU is not set # CONFIG_VDPA is not set -CONFIG_VHOST_DPN=y # CONFIG_VHOST_MENU is not set # @@ -4601,14 +4694,10 @@ CONFIG_VIDEO_USBVISION=m # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set @@ -4637,8 +4726,6 @@ CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_DE2_CCU=y # CONFIG_SUN8I_R40_CCU is not set CONFIG_SUN8I_R_CCU=y -# end of Common Clock Framework - # CONFIG_HWSPINLOCK is not set # @@ -4814,6 +4901,8 @@ CONFIG_IIO_SW_TRIGGER=y # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set CONFIG_AXP20X_ADC=y # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set @@ -4828,6 +4917,7 @@ CONFIG_AXP20X_ADC=y # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -4870,6 +4960,7 @@ CONFIG_SUN4I_GPADC=y # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -4998,6 +5089,7 @@ CONFIG_SUN4I_GPADC=y # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -5147,8 +5239,10 @@ CONFIG_SUN4I_GPADC=y # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -5211,6 +5305,7 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -5218,7 +5313,6 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5316,6 +5410,7 @@ CONFIG_F2FS_FS_COMPRESSION=y CONFIG_F2FS_FS_LZO=y CONFIG_F2FS_FS_LZ4=y CONFIG_F2FS_FS_ZSTD=y +CONFIG_F2FS_FS_LZORLE=y CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -5750,6 +5845,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5757,6 +5853,7 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y @@ -5855,6 +5952,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set CONFIG_SYMBOLIC_ERRNAME=y # CONFIG_DEBUG_BUGVERBOSE is not set # end of printk and dmesg options @@ -5897,6 +5995,7 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_WX is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set @@ -5911,6 +6010,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_HIGHMEM is not set CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -6002,7 +6102,6 @@ CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # arm Debugging # # CONFIG_ARM_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_WX is not set # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -6048,6 +6147,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set diff --git a/projects/Allwinner/patches/linux/0001-backport-from-5.8.patch b/projects/Allwinner/patches/linux/0001-backport-from-5.8.patch deleted file mode 100644 index 28c294e667..0000000000 --- a/projects/Allwinner/patches/linux/0001-backport-from-5.8.patch +++ /dev/null @@ -1,1244 +0,0 @@ -From b928fd4674fe339374aa0aead9a82d9d6e476f88 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Mon, 13 Apr 2020 08:24:31 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Add gpio power supply - -OrangePi Lite2 and One Plus have GPIO ports powered by same power -supplies. Add them in common DT. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index 9287976c4a50..f1be3dd558ca 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -106,6 +106,12 @@ &ohci3 { - status = "okay"; - }; - -+&pio { -+ vcc-pc-supply = <®_bldo2>; -+ vcc-pd-supply = <®_cldo1>; -+ vcc-pg-supply = <®_aldo1>; -+}; -+ - &r_i2c { - status = "okay"; - -@@ -230,6 +236,10 @@ &r_ir { - status = "okay"; - }; - -+&r_pio { -+ vcc-pm-supply = <®_bldo3>; -+}; -+ - &rtc { - clocks = <&ext_osc32k>; - }; --- -2.26.2 - -From 27c9f2a0c5125727f0a9f7a19366d044b841e873 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Mon, 13 Apr 2020 08:24:32 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Disable OTG mode - -As can be seen from OrangePi Lite 2 and One Plus schematics, VBUS pin on -USB OTG port is directly connected to 5 V power supply. This mean that -OTG port can safely operate only in host mode, even though these two -boards have ID pin connected. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index f1be3dd558ca..ebc120a9232f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -251,7 +251,12 @@ &uart0 { - }; - - &usb2otg { -- dr_mode = "otg"; -+ /* -+ * OrangePi Lite 2 and One Plus, where this DT is used, don't -+ * have a controllable VBUS even though they do have an ID pin. -+ * Using it as anything but a USB host is unsafe. -+ */ -+ dr_mode = "host"; - status = "okay"; - }; - --- -2.26.2 - -From 3d478d211b8e40deb609594f0676be205e8d89c1 Mon Sep 17 00:00:00 2001 -From: Sebastian Meyer -Date: Mon, 13 Apr 2020 08:24:33 +0200 -Subject: [PATCH] arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI combo - module - -OrangePi Lite2 has AP6255 BT+WIFI combo chip. Add support for it. - -Signed-off-by: Sebastian Meyer -[merged BT and WIFI patches and updated commit message] -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard ---- - .../allwinner/sun50i-h6-orangepi-lite2.dts | 65 +++++++++++++++++++ - 1 file changed, 65 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -index e7ca75c0d0f7..e8770858b5d0 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -@@ -6,4 +6,69 @@ - / { - model = "OrangePi Lite2"; - compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; -+ -+ aliases { -+ serial1 = &uart1; /* BT-UART */ -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_cldo2>; -+ vqmmc-supply = <®_bldo3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ brcm: sdio-wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+®_cldo2 { -+ /* -+ * This regulator is connected with CLDO3. -+ * Before the kernel can support synchronized -+ * enable of coupled regulators, keep them -+ * both always on as a ugly hack. -+ */ -+ regulator-always-on; -+}; -+ -+®_cldo3 { -+ /* -+ * This regulator is connected with CLDO2. -+ * See the comments for CLDO2. -+ */ -+ regulator-always-on; -+}; -+ -+/* There's the BT part of the AP6255 connected to that UART */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rtc 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ -+ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ -+ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ -+ max-speed = <1500000>; -+ }; - }; --- -2.26.2 - -From 8a3a9535189d908f7e325238c9f09069d4fe9b8f Mon Sep 17 00:00:00 2001 -From: Yangtao Li -Date: Mon, 20 Apr 2020 15:00:13 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Add clock to CPU cores -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The ARM CPU cores are fed by the CPU clock from the CCU. Add a -reference to the clock for each CPU core, along with the clock -transition latency. - -Signed-off-by: Yangtao Li -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index a5ee68388bd3..370e77b86fe1 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -25,6 +25,8 @@ cpu0: cpu@0 { - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - cpu1: cpu@1 { -@@ -32,6 +34,8 @@ cpu1: cpu@1 { - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - cpu2: cpu@2 { -@@ -39,6 +43,8 @@ cpu2: cpu@2 { - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - cpu3: cpu@3 { -@@ -46,6 +52,8 @@ cpu3: cpu@3 { - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - }; - --- -2.26.2 - -From 9f8a93b742e99dd93ca888161909e7245f1c7269 Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Mon, 20 Apr 2020 15:00:14 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Add thermal trip points/cooling - map -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This enables passive cooling by down-regulating CPU voltage -and frequency. - -Signed-off-by: Ondrej Jirman -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 28 ++++++++++++++++++++ - 1 file changed, 28 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index 370e77b86fe1..7cd10e4a5e2e 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -27,6 +27,7 @@ cpu0: cpu@0 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu1: cpu@1 { -@@ -36,6 +37,7 @@ cpu1: cpu@1 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu2: cpu@2 { -@@ -45,6 +47,7 @@ cpu2: cpu@2 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu3: cpu@3 { -@@ -54,6 +57,7 @@ cpu3: cpu@3 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - }; - -@@ -964,6 +968,30 @@ cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&ths 0>; -+ -+ trips { -+ cpu_alert: cpu-alert { -+ temperature = <85000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu-crit { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ map0 { -+ trip = <&cpu_alert>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; - }; - - gpu-thermal { --- -2.26.2 - -From 905434e0b544ee220bcce6da16a6857c0274b8ba Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Mon, 20 Apr 2020 15:00:15 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Add CPU Operating Performance - Points table -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add an Operating Performance Points table for the CPU cores to -enable Dynamic Voltage & Frequency Scaling on the H6. - -Signed-off-by: Ondrej Jirman -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 117 ++++++++++++++++++ - arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 + - 2 files changed, 121 insertions(+) - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -new file mode 100644 -index 000000000000..dcb789519797 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -@@ -0,0 +1,117 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+// Copyright (C) 2020 Clément Péron -+ -+/ { -+ cpu_opp_table: cpu-opp-table { -+ compatible = "allwinner,sun50i-h6-operating-points"; -+ nvmem-cells = <&cpu_speed_grade>; -+ opp-shared; -+ -+ opp@480000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <480000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@720000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <720000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@816000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <816000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@888000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <888000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@1080000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1080000000>; -+ -+ opp-microvolt-speed0 = <940000>; -+ opp-microvolt-speed1 = <880000>; -+ opp-microvolt-speed2 = <880000>; -+ }; -+ -+ opp@1320000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1320000000>; -+ -+ opp-microvolt-speed0 = <1000000>; -+ opp-microvolt-speed1 = <940000>; -+ opp-microvolt-speed2 = <940000>; -+ }; -+ -+ opp@1488000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1488000000>; -+ -+ opp-microvolt-speed0 = <1060000>; -+ opp-microvolt-speed1 = <1000000>; -+ opp-microvolt-speed2 = <1000000>; -+ }; -+ -+ opp@1608000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1608000000>; -+ -+ opp-microvolt-speed0 = <1090000>; -+ opp-microvolt-speed1 = <1030000>; -+ opp-microvolt-speed2 = <1030000>; -+ }; -+ -+ opp@1704000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1704000000>; -+ -+ opp-microvolt-speed0 = <1120000>; -+ opp-microvolt-speed1 = <1060000>; -+ opp-microvolt-speed2 = <1060000>; -+ }; -+ -+ opp@1800000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1800000000>; -+ -+ opp-microvolt-speed0 = <1160000>; -+ opp-microvolt-speed1 = <1100000>; -+ opp-microvolt-speed2 = <1100000>; -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index 7cd10e4a5e2e..2e31632c6ca8 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -262,6 +262,10 @@ sid: efuse@3006000 { - ths_calibration: thermal-sensor-calibration@14 { - reg = <0x14 0x8>; - }; -+ -+ cpu_speed_grade: cpu-speed-grade@1c { -+ reg = <0x1c 0x4>; -+ }; - }; - - watchdog: watchdog@30090a0 { --- -2.26.2 - -From 67533f873ad7e2a4af1a1ed47f03f501d6c770df Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:17 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink - GS1 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU opp tables for Beelink GS1. - -This needs to change the CPU regulator max voltage to fit -the OPP table. - -Also add the ramp-delay information to avoid any out of spec -running as the regulator is slower at reaching the voltage -requested compare to the PLL reaching the frequency. - -There is no such information for AXP805 but similar PMIC (AXP813) -has a DVM (Dynamic Voltage scaling Management) ramp rate equal -to 2500uV/us. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -index 8f09d209359b..3f7ceeb1a767 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -77,6 +78,10 @@ spdif_out: spdif-out { - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ - &de { - status = "okay"; - }; -@@ -234,7 +239,8 @@ reg_cldo3: cldo3 { - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - -@@ -242,6 +248,7 @@ reg_dcdcc: dcdcc { - regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - --- -2.26.2 - -From ebae33c3f6cee978f60ad48371258a03f9440691 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:18 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Orange - Pi 3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU opp tables for Orange Pi 3. - -This needs to change the CPU regulator max voltage to fit -the OPP table. - -Also add the ramp-delay information to avoid any out of spec -running as the regulator is slower at reaching the voltage -requested compare to the PLL reaching the frequency. - -There is no such information for AXP805 but similar PMIC (AXP813) -has a DVM (Dynamic Voltage scaling Management) ramp rate equal -to 2500uV/us. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index 47f579610dcc..15c9dd8c4479 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -257,6 +258,7 @@ reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - -@@ -264,6 +266,7 @@ reg_dcdcc: dcdcc { - regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - --- -2.26.2 - -From d8e2b7e11b50c332e03fae05a68d40a48d4646ed Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:20 +0200 -Subject: [PATCH] arm64: dts: allwinner: Sort Pine H64 device-tree nodes -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Pine H64 device-tree have some nodes not properly sorted. - -Fix this. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 34 +++++++++---------- - 1 file changed, 17 insertions(+), 17 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -index b0642d841933..63a785b534e1 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -@@ -80,6 +80,18 @@ reg_usb_vbus: vbus { - }; - }; - -+&de { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -@@ -91,17 +103,6 @@ &emac { - status = "okay"; - }; - --&mdio { -- ext_rgmii_phy: ethernet-phy@1 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <1>; -- }; --}; -- --&de { -- status = "okay"; --}; -- - &gpu { - mali-supply = <®_dcdcc>; - status = "okay"; -@@ -117,12 +118,11 @@ hdmi_out_con: endpoint { - }; - }; - --&ehci0 { -- status = "okay"; --}; -- --&ehci3 { -- status = "okay"; -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; - - &mmc0 { --- -2.26.2 - -From fe79ea577be81e1e71642826ab00e676dc59c194 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:21 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU and GPU opp tables for Pine H64. - -This needs to change the CPU regulator max voltage to fit -the OPP table. - -Also add the ramp-delay information to avoid any out of spec -running as the regulator is slower at reaching the voltage -requested compare to the PLL reaching the frequency. - -There is no such information for AXP805 but similar PMIC (AXP813) -has a DVM (Dynamic Voltage scaling Management) ramp rate equal -to 2500uV/us. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -index 63a785b534e1..af85b2074867 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -80,6 +81,10 @@ reg_usb_vbus: vbus { - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ - &de { - status = "okay"; - }; -@@ -238,7 +243,8 @@ reg_cldo3: cldo3 { - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - -@@ -246,6 +252,7 @@ reg_dcdcc: dcdcc { - regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - --- -2.26.2 - -From c83e24e7bf1cfa7486165f066f2bc1335703e1fd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Fri, 8 May 2020 21:10:34 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: add voltage range to OPP table -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some boards have a fixed regulator and can't reach the voltage set -by the OPP table. - -Add a range where the minimal voltage is the target and the maximal -voltage is 1.2V. - -Suggested-by: Ondřej Jirman -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 60 +++++++++---------- - 1 file changed, 30 insertions(+), 30 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -index dcb789519797..1a5eddc5a40f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -@@ -12,90 +12,90 @@ opp@480000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <480000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@720000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <720000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@816000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <816000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@888000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <888000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@1080000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1080000000>; - -- opp-microvolt-speed0 = <940000>; -- opp-microvolt-speed1 = <880000>; -- opp-microvolt-speed2 = <880000>; -+ opp-microvolt-speed0 = <940000 940000 1200000>; -+ opp-microvolt-speed1 = <880000 880000 1200000>; -+ opp-microvolt-speed2 = <880000 880000 1200000>; - }; - - opp@1320000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1320000000>; - -- opp-microvolt-speed0 = <1000000>; -- opp-microvolt-speed1 = <940000>; -- opp-microvolt-speed2 = <940000>; -+ opp-microvolt-speed0 = <1000000 1000000 1200000>; -+ opp-microvolt-speed1 = <940000 940000 1200000>; -+ opp-microvolt-speed2 = <940000 940000 1200000>; - }; - - opp@1488000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1488000000>; - -- opp-microvolt-speed0 = <1060000>; -- opp-microvolt-speed1 = <1000000>; -- opp-microvolt-speed2 = <1000000>; -+ opp-microvolt-speed0 = <1060000 1060000 1200000>; -+ opp-microvolt-speed1 = <1000000 1000000 1200000>; -+ opp-microvolt-speed2 = <1000000 1000000 1200000>; - }; - - opp@1608000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1608000000>; - -- opp-microvolt-speed0 = <1090000>; -- opp-microvolt-speed1 = <1030000>; -- opp-microvolt-speed2 = <1030000>; -+ opp-microvolt-speed0 = <1090000 1090000 1200000>; -+ opp-microvolt-speed1 = <1030000 1030000 1200000>; -+ opp-microvolt-speed2 = <1030000 1030000 1200000>; - }; - - opp@1704000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1704000000>; - -- opp-microvolt-speed0 = <1120000>; -- opp-microvolt-speed1 = <1060000>; -- opp-microvolt-speed2 = <1060000>; -+ opp-microvolt-speed0 = <1120000 1120000 1200000>; -+ opp-microvolt-speed1 = <1060000 1060000 1200000>; -+ opp-microvolt-speed2 = <1060000 1060000 1200000>; - }; - - opp@1800000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1800000000>; - -- opp-microvolt-speed0 = <1160000>; -- opp-microvolt-speed1 = <1100000>; -- opp-microvolt-speed2 = <1100000>; -+ opp-microvolt-speed0 = <1160000 1160000 1200000>; -+ opp-microvolt-speed1 = <1100000 1100000 1200000>; -+ opp-microvolt-speed2 = <1100000 1100000 1200000>; - }; - }; - }; --- -2.26.2 - -From 5961bdf2dfe5d7fa9e9e6cc3cc67d02f122a46bd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Fri, 8 May 2020 21:10:35 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix - TX6 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU opp tables for Tanix TX6. - -Also add the fixed regulator that provided vdd-cpu-gpu required for -CPU opp tables. - -This voltage has been found using a voltmeter and could be wrong. - -Tested-by: Jernej Škrabec -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-tanix-tx6.dts | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts -index 83e6cb0e59ce..be81330db14f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -37,6 +38,17 @@ reg_vcc3v3: vcc3v3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -+ -+ reg_vdd_cpu_gpu: vdd-cpu-gpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu-gpu"; -+ regulator-min-microvolt = <1135000>; -+ regulator-max-microvolt = <1135000>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu_gpu>; - }; - - &de { -@@ -56,6 +68,7 @@ &ehci3 { - }; - - &gpu { -+ mali-supply = <®_vdd_cpu_gpu>; - status = "okay"; - }; - --- -2.26.2 - -From 6b633e3efbb45b574bdd803ebdddc8e010758a95 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Thu, 5 Mar 2020 00:25:10 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: do not force "none" scan mode - -Setting scan mode to "none" confuses some TVs like LG B8, which randomly -change overscan percentage over time. Digital outputs like HDMI and DVI, -handled by this controller, don't really need overscan, so we can always -set scan mode to underscan. Actually, this is exactly what -drm_hdmi_avi_infoframe_from_display_mode() already does, so we can just -remove offending line. - -Reviewed-by: Neil Armstrong -Acked-by: Laurent Pinchart -Signed-off-by: Jonas Karlman -[updated commit message] -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-3-jernej.skrabec@siol.net ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index f85c15ad8486..6e95bcbb2413 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1648,8 +1648,6 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - break; - } - -- frame.scan_mode = HDMI_SCAN_MODE_NONE; -- - /* - * The Designware IP uses a different byte format from standard - * AVI info frames, though generally the bits are in the correct --- -2.26.2 - -From 86af379ebca2ef0b01d998a49e531cd495dcf9a3 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 5 Mar 2020 00:25:11 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: Add support for RGB limited range - -CEA 861 standard requestis that RGB quantization range is "limited" for -CEA modes. Support that by adding CSC matrix which downscales values. - -This allows proper color reproduction on TV and PC monitor at the same -time. In future, override property can be added, like "Broadcast RGB" -in i915 driver. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-4-jernej.skrabec@siol.net ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 +++++++++++++++++------ - 1 file changed, 46 insertions(+), 17 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 6e95bcbb2413..43c763ee8307 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -92,6 +92,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { - { 0x6756, 0x78ab, 0x2000, 0x0200 } - }; - -+static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { -+ { 0x1b7c, 0x0000, 0x0000, 0x0020 }, -+ { 0x0000, 0x1b7c, 0x0000, 0x0020 }, -+ { 0x0000, 0x0000, 0x1b7c, 0x0020 } -+}; -+ - struct hdmi_vmode { - bool mdataenablepolarity; - -@@ -109,6 +115,7 @@ struct hdmi_data_info { - unsigned int pix_repet_factor; - unsigned int hdcp_enable; - struct hdmi_vmode video_mode; -+ bool rgb_limited_range; - }; - - struct dw_hdmi_i2c { -@@ -956,7 +963,11 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format; -+ return (hdmi->hdmi_data.enc_in_bus_format != -+ hdmi->hdmi_data.enc_out_bus_format) || -+ (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -+ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && -+ hdmi->hdmi_data.rgb_limited_range); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -986,25 +997,27 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) - static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - { - const u16 (*csc_coeff)[3][4] = &csc_coeff_default; -+ bool is_input_rgb, is_output_rgb; - unsigned i; - u32 csc_scale = 1; - -- if (is_color_space_conversion(hdmi)) { -- if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -- if (hdmi->hdmi_data.enc_out_encoding == -- V4L2_YCBCR_ENC_601) -- csc_coeff = &csc_coeff_rgb_out_eitu601; -- else -- csc_coeff = &csc_coeff_rgb_out_eitu709; -- } else if (hdmi_bus_fmt_is_rgb( -- hdmi->hdmi_data.enc_in_bus_format)) { -- if (hdmi->hdmi_data.enc_out_encoding == -- V4L2_YCBCR_ENC_601) -- csc_coeff = &csc_coeff_rgb_in_eitu601; -- else -- csc_coeff = &csc_coeff_rgb_in_eitu709; -- csc_scale = 0; -- } -+ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format); -+ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format); -+ -+ if (!is_input_rgb && is_output_rgb) { -+ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) -+ csc_coeff = &csc_coeff_rgb_out_eitu601; -+ else -+ csc_coeff = &csc_coeff_rgb_out_eitu709; -+ } else if (is_input_rgb && !is_output_rgb) { -+ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) -+ csc_coeff = &csc_coeff_rgb_in_eitu601; -+ else -+ csc_coeff = &csc_coeff_rgb_in_eitu709; -+ csc_scale = 0; -+ } else if (is_input_rgb && is_output_rgb && -+ hdmi->hdmi_data.rgb_limited_range) { -+ csc_coeff = &csc_coeff_rgb_full_to_rgb_limited; - } - - /* The CSC registers are sequential, alternating MSB then LSB */ -@@ -1614,6 +1627,18 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - drm_hdmi_avi_infoframe_from_display_mode(&frame, - &hdmi->connector, mode); - -+ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -+ drm_hdmi_avi_infoframe_quant_range(&frame, &hdmi->connector, -+ mode, -+ hdmi->hdmi_data.rgb_limited_range ? -+ HDMI_QUANTIZATION_RANGE_LIMITED : -+ HDMI_QUANTIZATION_RANGE_FULL); -+ } else { -+ frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; -+ frame.ycc_quantization_range = -+ HDMI_YCC_QUANTIZATION_RANGE_LIMITED; -+ } -+ - if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) - frame.colorspace = HDMI_COLORSPACE_YUV444; - else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) -@@ -2111,6 +2136,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_FIXED) - hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; - -+ hdmi->hdmi_data.rgb_limited_range = hdmi->sink_is_hdmi && -+ drm_default_rgb_quant_range(mode) == -+ HDMI_QUANTIZATION_RANGE_LIMITED; -+ - hdmi->hdmi_data.pix_repet_factor = 0; - hdmi->hdmi_data.hdcp_enable = 0; - hdmi->hdmi_data.video_mode.mdataenablepolarity = true; --- -2.26.2 - -From 0e8003076aca7b29c868e923e73f332cca12ed8b Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 5 Mar 2020 00:25:12 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: rework csc related functions - -is_color_space_conversion() is a misnomer. It checks not only if color -space conversion is needed, but also if format conversion is needed. -This is actually desired behaviour because result of this function -determines if CSC block should be enabled or not (CSC block can also do -format conversion). - -In order to clear misunderstandings, let's rework -is_color_space_conversion() to do exactly what is supposed to do and add -another function which will determine if CSC block must be enabled or -not. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-5-jernej.skrabec@siol.net ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 31 +++++++++++++++-------- - 1 file changed, 21 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 43c763ee8307..ec3b06433d98 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -963,11 +963,14 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return (hdmi->hdmi_data.enc_in_bus_format != -- hdmi->hdmi_data.enc_out_bus_format) || -- (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -- hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && -- hdmi->hdmi_data.rgb_limited_range); -+ struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; -+ bool is_input_rgb, is_output_rgb; -+ -+ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_in_bus_format); -+ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_out_bus_format); -+ -+ return (is_input_rgb != is_output_rgb) || -+ (is_input_rgb && is_output_rgb && hdmi_data->rgb_limited_range); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -994,6 +997,13 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) - return 0; - } - -+static bool is_csc_needed(struct dw_hdmi *hdmi) -+{ -+ return is_color_space_conversion(hdmi) || -+ is_color_space_decimation(hdmi) || -+ is_color_space_interpolation(hdmi); -+} -+ - static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - { - const u16 (*csc_coeff)[3][4] = &csc_coeff_default; -@@ -2027,18 +2037,19 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) - hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); - - /* Enable csc path */ -- if (is_color_space_conversion(hdmi)) { -+ if (is_csc_needed(hdmi)) { - hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; - hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); -- } - -- /* Enable color space conversion if needed */ -- if (is_color_space_conversion(hdmi)) - hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH, - HDMI_MC_FLOWCTRL); -- else -+ } else { -+ hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CSCCLK_DISABLE; -+ hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); -+ - hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, - HDMI_MC_FLOWCTRL); -+ } - } - - /* Workaround to clear the overflow condition */ --- -2.26.2 - diff --git a/projects/Allwinner/patches/linux/0002-backport-from-next.patch b/projects/Allwinner/patches/linux/0002-backport-from-next.patch deleted file mode 100644 index 664cdfa2ca..0000000000 --- a/projects/Allwinner/patches/linux/0002-backport-from-next.patch +++ /dev/null @@ -1,269 +0,0 @@ -From d5aecd289babf3adcf5a837b067a5efddb097d99 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 9 May 2020 22:06:43 +0200 -Subject: [PATCH] media: cedrus: Implement runtime PM - -This allows the VE clocks and PLL_VE to be disabled most of the time. -A runtime PM reference is held while streaming. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Samuel Holland -Reviewed-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/staging/media/sunxi/cedrus/cedrus.c | 7 ++ - .../staging/media/sunxi/cedrus/cedrus_hw.c | 106 ++++++++++++------ - .../staging/media/sunxi/cedrus/cedrus_hw.h | 3 + - .../staging/media/sunxi/cedrus/cedrus_video.c | 33 ++++-- - 4 files changed, 104 insertions(+), 45 deletions(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c -index 05a85517ff60..bc27f9430eeb 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -551,12 +552,18 @@ static const struct of_device_id cedrus_dt_match[] = { - }; - MODULE_DEVICE_TABLE(of, cedrus_dt_match); - -+static const struct dev_pm_ops cedrus_dev_pm_ops = { -+ SET_RUNTIME_PM_OPS(cedrus_hw_suspend, -+ cedrus_hw_resume, NULL) -+}; -+ - static struct platform_driver cedrus_driver = { - .probe = cedrus_probe, - .remove = cedrus_remove, - .driver = { - .name = CEDRUS_NAME, - .of_match_table = of_match_ptr(cedrus_dt_match), -+ .pm = &cedrus_dev_pm_ops, - }, - }; - module_platform_driver(cedrus_driver); -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c -index daf5f244f93b..1744e6fcc999 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -140,6 +141,64 @@ static irqreturn_t cedrus_irq(int irq, void *data) - return IRQ_HANDLED; - } - -+int cedrus_hw_suspend(struct device *device) -+{ -+ struct cedrus_dev *dev = dev_get_drvdata(device); -+ -+ reset_control_assert(dev->rstc); -+ -+ clk_disable_unprepare(dev->ram_clk); -+ clk_disable_unprepare(dev->mod_clk); -+ clk_disable_unprepare(dev->ahb_clk); -+ -+ return 0; -+} -+ -+int cedrus_hw_resume(struct device *device) -+{ -+ struct cedrus_dev *dev = dev_get_drvdata(device); -+ int ret; -+ -+ ret = clk_prepare_enable(dev->ahb_clk); -+ if (ret) { -+ dev_err(dev->dev, "Failed to enable AHB clock\n"); -+ -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(dev->mod_clk); -+ if (ret) { -+ dev_err(dev->dev, "Failed to enable MOD clock\n"); -+ -+ goto err_ahb_clk; -+ } -+ -+ ret = clk_prepare_enable(dev->ram_clk); -+ if (ret) { -+ dev_err(dev->dev, "Failed to enable RAM clock\n"); -+ -+ goto err_mod_clk; -+ } -+ -+ ret = reset_control_reset(dev->rstc); -+ if (ret) { -+ dev_err(dev->dev, "Failed to apply reset\n"); -+ -+ goto err_ram_clk; -+ } -+ -+ return 0; -+ -+err_ram_clk: -+ clk_disable_unprepare(dev->ram_clk); -+err_mod_clk: -+ clk_disable_unprepare(dev->mod_clk); -+err_ahb_clk: -+ clk_disable_unprepare(dev->ahb_clk); -+ -+ return ret; -+} -+ - int cedrus_hw_probe(struct cedrus_dev *dev) - { - const struct cedrus_variant *variant; -@@ -236,42 +295,17 @@ int cedrus_hw_probe(struct cedrus_dev *dev) - goto err_sram; - } - -- ret = clk_prepare_enable(dev->ahb_clk); -- if (ret) { -- dev_err(dev->dev, "Failed to enable AHB clock\n"); -- -- goto err_sram; -- } -- -- ret = clk_prepare_enable(dev->mod_clk); -- if (ret) { -- dev_err(dev->dev, "Failed to enable MOD clock\n"); -- -- goto err_ahb_clk; -- } -- -- ret = clk_prepare_enable(dev->ram_clk); -- if (ret) { -- dev_err(dev->dev, "Failed to enable RAM clock\n"); -- -- goto err_mod_clk; -- } -- -- ret = reset_control_reset(dev->rstc); -- if (ret) { -- dev_err(dev->dev, "Failed to apply reset\n"); -- -- goto err_ram_clk; -+ pm_runtime_enable(dev->dev); -+ if (!pm_runtime_enabled(dev->dev)) { -+ ret = cedrus_hw_resume(dev->dev); -+ if (ret) -+ goto err_pm; - } - - return 0; - --err_ram_clk: -- clk_disable_unprepare(dev->ram_clk); --err_mod_clk: -- clk_disable_unprepare(dev->mod_clk); --err_ahb_clk: -- clk_disable_unprepare(dev->ahb_clk); -+err_pm: -+ pm_runtime_disable(dev->dev); - err_sram: - sunxi_sram_release(dev->dev); - err_mem: -@@ -282,11 +316,9 @@ int cedrus_hw_probe(struct cedrus_dev *dev) - - void cedrus_hw_remove(struct cedrus_dev *dev) - { -- reset_control_assert(dev->rstc); -- -- clk_disable_unprepare(dev->ram_clk); -- clk_disable_unprepare(dev->mod_clk); -- clk_disable_unprepare(dev->ahb_clk); -+ pm_runtime_disable(dev->dev); -+ if (!pm_runtime_status_suspended(dev->dev)) -+ cedrus_hw_suspend(dev->dev); - - sunxi_sram_release(dev->dev); - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h -index 604ff932fbf5..45f641f0bfa2 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h -@@ -22,6 +22,9 @@ void cedrus_engine_disable(struct cedrus_dev *dev); - void cedrus_dst_format_set(struct cedrus_dev *dev, - struct v4l2_pix_format *fmt); - -+int cedrus_hw_suspend(struct device *device); -+int cedrus_hw_resume(struct device *device); -+ - int cedrus_hw_probe(struct cedrus_dev *dev); - void cedrus_hw_remove(struct cedrus_dev *dev); - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -index ed3f511f066f..16d82309e7b6 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -@@ -13,6 +13,8 @@ - * Marek Szyprowski, - */ - -+#include -+ - #include - #include - #include -@@ -450,12 +452,24 @@ static int cedrus_start_streaming(struct vb2_queue *vq, unsigned int count) - return -EINVAL; - } - -- if (V4L2_TYPE_IS_OUTPUT(vq->type) && -- dev->dec_ops[ctx->current_codec]->start) -- ret = dev->dec_ops[ctx->current_codec]->start(ctx); -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) { -+ ret = pm_runtime_get_sync(dev->dev); -+ if (ret < 0) -+ goto err_cleanup; - -- if (ret) -- cedrus_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); -+ if (dev->dec_ops[ctx->current_codec]->start) { -+ ret = dev->dec_ops[ctx->current_codec]->start(ctx); -+ if (ret) -+ goto err_pm; -+ } -+ } -+ -+ return 0; -+ -+err_pm: -+ pm_runtime_put(dev->dev); -+err_cleanup: -+ cedrus_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); - - return ret; - } -@@ -465,9 +479,12 @@ static void cedrus_stop_streaming(struct vb2_queue *vq) - struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); - struct cedrus_dev *dev = ctx->dev; - -- if (V4L2_TYPE_IS_OUTPUT(vq->type) && -- dev->dec_ops[ctx->current_codec]->stop) -- dev->dec_ops[ctx->current_codec]->stop(ctx); -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) { -+ if (dev->dec_ops[ctx->current_codec]->stop) -+ dev->dec_ops[ctx->current_codec]->stop(ctx); -+ -+ pm_runtime_put(dev->dev); -+ } - - cedrus_queue_cleanup(vq, VB2_BUF_STATE_ERROR); - } --- -2.27.0 - diff --git a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch index e7293229e3..4f84e60dc2 100644 --- a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch +++ b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch @@ -13,70 +13,6 @@ Signed-off-by: Jernej Skrabec include/media/hevc-ctrls.h | 11 +++++ 4 files changed, 63 insertions(+) -diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -index d4fc5f25aa14..e8e707642336 100644 ---- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -@@ -4196,6 +4196,47 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - - ``padding[6]`` - - Applications and drivers must set this to zero. - -+``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (struct)`` -+ Specifies the scaling matrix (as extracted from the bitstream) for -+ the associated HEVC slice data. The bitstream parameters are -+ defined according to :ref:`hevc`, section 7.4.5 "Scaling list -+ data semantics". For further documentation, refer to the above -+ specification, unless there is an explicit comment stating -+ otherwise. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_hevc_scaling_matrix -+ -+.. cssclass:: longtable -+ -+.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``scaling_list_4x4[6][16]`` -+ - -+ * - __u8 -+ - ``scaling_list_8x8[6][64]`` -+ - -+ * - __u8 -+ - ``scaling_list_16x16[6][64]`` -+ - -+ * - __u8 -+ - ``scaling_list_32x32[2][64]`` -+ - -+ * - __u8 -+ - ``scaling_list_dc_coef_16x16[6]`` -+ - -+ * - __u8 -+ - ``scaling_list_dc_coef_32x32[2]`` -+ - -+ - ``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (enum)`` - Specifies the decoding mode to use. Currently exposes slice-based and - frame-based decoding but new modes might be added later on. -diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst -index 561bda112809..3aabc322daa4 100644 ---- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst -+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst -@@ -207,6 +207,7 @@ Compressed Formats - * ``V4L2_CID_MPEG_VIDEO_HEVC_SPS`` - * ``V4L2_CID_MPEG_VIDEO_HEVC_PPS`` - * ``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS`` -+ * ``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX`` - See the :ref:`associated Codec Control IDs `. - Buffers associated with this pixel format must contain the appropriate - number of macroblocks to decode a full corresponding frame. diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 93d33d1db4e8..94c3e64ffb8b 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c @@ -337,29 +273,6 @@ Signed-off-by: Jernej Skrabec include/media/hevc-ctrls.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -index e8e707642336..0d85a3ec0a45 100644 ---- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -@@ -3991,6 +3991,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - * - __u32 - - ``data_bit_offset`` - - Offset (in bits) to the video data in the current slice data. -+ * - __u32 -+ - ``slice_segment_addr`` -+ - - * - __u8 - - ``nal_unit_type`` - - -@@ -4068,7 +4071,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - - ``num_rps_poc_lt_curr`` - - The number of reference pictures in the long-term set. - * - __u8 -- - ``padding[7]`` -+ - ``padding[5]`` - - Applications and drivers must set this to zero. - * - struct :c:type:`v4l2_hevc_dpb_entry` - - ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 1592e52c3614..3e2e32098312 100644 --- a/include/media/hevc-ctrls.h diff --git a/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch b/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch index 8bc2106a74..23c6f2f95c 100644 --- a/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch +++ b/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch @@ -177,7 +177,7 @@ index 43643ad31730..d840bc07cba6 100644 } +#ifdef CONFIG_DRM_SUN8I_DW_HDMI_CEC -+static bool sun8i_hdmi_phy_cec_pin_read(struct cec_adapter *adap) ++static int sun8i_hdmi_phy_cec_pin_read(struct cec_adapter *adap) +{ + struct sun8i_hdmi_phy *phy = cec_get_drvdata(adap); + unsigned int val; From f342bce716487bbab370c2a89f8fd1e450e709db Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Wed, 5 Aug 2020 23:24:29 +0200 Subject: [PATCH 08/11] xf86-video-nvidia-legacy: Fix building with Linux 5.8 --- ...f86-video-nvidia-legacy-0004-fix-5.8.patch | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 packages/x11/driver/xf86-video-nvidia-legacy/patches/xf86-video-nvidia-legacy-0004-fix-5.8.patch diff --git a/packages/x11/driver/xf86-video-nvidia-legacy/patches/xf86-video-nvidia-legacy-0004-fix-5.8.patch b/packages/x11/driver/xf86-video-nvidia-legacy/patches/xf86-video-nvidia-legacy-0004-fix-5.8.patch new file mode 100644 index 0000000000..7e61f58e0d --- /dev/null +++ b/packages/x11/driver/xf86-video-nvidia-legacy/patches/xf86-video-nvidia-legacy-0004-fix-5.8.patch @@ -0,0 +1,57 @@ +diff -Naur NVIDIA-Linux-x86_64-340.108-old/kernel/nvidia-modules-common.mk NVIDIA-Linux-x86_64-340.108-new/kernel/nvidia-modules-common.mk +--- NVIDIA-Linux-x86_64-340.108-old/kernel/nvidia-modules-common.mk 2019-12-11 23:04:24.000000000 +0100 ++++ NVIDIA-Linux-x86_64-340.108-new/kernel/nvidia-modules-common.mk 2020-08-04 16:18:14.073333322 +0200 +@@ -222,6 +222,7 @@ + define BUILD_MODULE_RULE + $(1): build-sanity-checks $(3) + @echo "NVIDIA: calling KBUILD..."; \ ++ touch .nv-kernel.o.cmd; \ + $$(MAKE) "CC=$$(CC)" NV_MODULE_SUFFIX=$$(strip $(2)) $$(KBUILD_PARAMS) modules; \ + echo "NVIDIA: left KBUILD."; \ + if ! [ -f $(1) ]; then \ +diff -Naur NVIDIA-Linux-x86_64-340.108-old/kernel/nv-linux.h NVIDIA-Linux-x86_64-340.108-new/kernel/nv-linux.h +--- NVIDIA-Linux-x86_64-340.108-old/kernel/nv-linux.h 2020-08-01 20:34:33.900000000 +0200 ++++ NVIDIA-Linux-x86_64-340.108-new/kernel/nv-linux.h 2020-08-03 13:10:17.693333317 +0200 +@@ -669,11 +669,19 @@ + # define KM_FREE_RECORD(a,b,c) + #endif + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0) ++#define NV_VMALLOC(ptr, size) \ ++ { \ ++ (ptr) = __vmalloc(size, GFP_KERNEL); \ ++ VM_ALLOC_RECORD(ptr, size, "vm_vmalloc"); \ ++ } ++#else + #define NV_VMALLOC(ptr, size) \ + { \ + (ptr) = __vmalloc(size, GFP_KERNEL, PAGE_KERNEL); \ + VM_ALLOC_RECORD(ptr, size, "vm_vmalloc"); \ + } ++#endif + + #define NV_VFREE(ptr, size) \ + { \ +diff -Naur NVIDIA-Linux-x86_64-340.108-old/kernel/os-mlock.c NVIDIA-Linux-x86_64-340.108-new/kernel/os-mlock.c +--- NVIDIA-Linux-x86_64-340.108-old/kernel/os-mlock.c 2019-12-11 23:04:24.000000000 +0100 ++++ NVIDIA-Linux-x86_64-340.108-new/kernel/os-mlock.c 2020-08-03 13:11:06.536666663 +0200 +@@ -44,11 +44,19 @@ + return rmStatus; + } + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0) ++ down_read(&mm->mmap_lock); ++ ret = NV_GET_USER_PAGES((unsigned long)address, ++ page_count, write, force, user_pages, NULL); ++ up_read(&mm->mmap_lock); ++ pinned = ret; ++#else + down_read(&mm->mmap_sem); + ret = NV_GET_USER_PAGES((unsigned long)address, + page_count, write, force, user_pages, NULL); + up_read(&mm->mmap_sem); + pinned = ret; ++#endif + + if (ret < 0) + { From 1e45f300089ba3e525a9d5d2e87f044f777720c5 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Wed, 5 Aug 2020 23:25:09 +0200 Subject: [PATCH 09/11] xf86-video-nvidia: Update to 450.57 --- .../x11/driver/xf86-video-nvidia/package.mk | 4 +-- .../xf86-video-nvidia-0002-fix-5.7-rc1.patch | 35 ------------------- .../xf86-video-nvidia/udev.d/96-nvidia.rules | 17 +++++++++ 3 files changed, 19 insertions(+), 37 deletions(-) delete mode 100644 packages/x11/driver/xf86-video-nvidia/patches/xf86-video-nvidia-0002-fix-5.7-rc1.patch diff --git a/packages/x11/driver/xf86-video-nvidia/package.mk b/packages/x11/driver/xf86-video-nvidia/package.mk index aa23f98524..b5101cf7f3 100644 --- a/packages/x11/driver/xf86-video-nvidia/package.mk +++ b/packages/x11/driver/xf86-video-nvidia/package.mk @@ -6,8 +6,8 @@ PKG_NAME="xf86-video-nvidia" # Remember to run "python packages/x11/driver/xf86-video-nvidia/scripts/make_nvidia_udev.py" and commit changes to # "packages/x11/driver/xf86-video-nvidia/udev.d/96-nvidia.rules" whenever bumping version. # Host may require installation of python-lxml and python-requests packages. -PKG_VERSION="440.82" -PKG_SHA256="89feda0c3e54c9c0d0528760bbb5cf4d8e57408fb3df2728653f3a1b73c110a9" +PKG_VERSION="450.57" +PKG_SHA256="8a65da18761a2e6547d681b0d87201a46d822e71a318c89a849767a95fbd1e07" PKG_ARCH="x86_64" PKG_LICENSE="nonfree" PKG_SITE="http://www.nvidia.com/" diff --git a/packages/x11/driver/xf86-video-nvidia/patches/xf86-video-nvidia-0002-fix-5.7-rc1.patch b/packages/x11/driver/xf86-video-nvidia/patches/xf86-video-nvidia-0002-fix-5.7-rc1.patch deleted file mode 100644 index dac4e2a661..0000000000 --- a/packages/x11/driver/xf86-video-nvidia/patches/xf86-video-nvidia-0002-fix-5.7-rc1.patch +++ /dev/null @@ -1,35 +0,0 @@ -From b54cae6b96e4891708ee72d3c98766348c3feece Mon Sep 17 00:00:00 2001 -From: MilhouseVH -Date: Mon, 13 Apr 2020 01:30:59 +0100 -Subject: [PATCH] NVIDIA 440.82 - Kernel 5.7 Patch - -Credit: Isaak I. Aleksandrov, https://gitlab.com/snippets/1965550 ---- - kernel/conftest.sh | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/kernel/conftest.sh b/kernel/conftest.sh -index 8f807a1..af29636 100755 ---- a/kernel/conftest.sh -+++ b/kernel/conftest.sh -@@ -143,6 +143,7 @@ test_headers() { - FILES="$FILES video/nv_internal.h" - FILES="$FILES asm/book3s/64/hash-64k.h" - FILES="$FILES asm/set_memory.h" -+ FILES="$FILES asm/pgtable.h" - FILES="$FILES asm/prom.h" - FILES="$FILES asm/powernv.h" - FILES="$FILES asm/tlbflush.h" -@@ -466,6 +467,9 @@ compile_test() { - # It does not exist on all architectures. - # - CODE=" -+ #if defined(NV_ASM_PGTABLE_H_PRESENT) -+ #include -+ #endif - #if defined(NV_ASM_SET_MEMORY_H_PRESENT) - #include - #else --- -2.20.1 - diff --git a/packages/x11/driver/xf86-video-nvidia/udev.d/96-nvidia.rules b/packages/x11/driver/xf86-video-nvidia/udev.d/96-nvidia.rules index 9f90b486e2..0b9d13555f 100644 --- a/packages/x11/driver/xf86-video-nvidia/udev.d/96-nvidia.rules +++ b/packages/x11/driver/xf86-video-nvidia/udev.d/96-nvidia.rules @@ -246,6 +246,8 @@ ATTRS{device}=="0x1e84", GOTO="configure_nvidia" ATTRS{device}=="0x1e87", GOTO="configure_nvidia" ATTRS{device}=="0x1e89", GOTO="configure_nvidia" ATTRS{device}=="0x1e90", GOTO="configure_nvidia" +ATTRS{device}=="0x1e91", GOTO="configure_nvidia" +ATTRS{device}=="0x1e93", GOTO="configure_nvidia" ATTRS{device}=="0x1eb0", GOTO="configure_nvidia" ATTRS{device}=="0x1eb1", GOTO="configure_nvidia" ATTRS{device}=="0x1eb5", GOTO="configure_nvidia" @@ -254,29 +256,44 @@ ATTRS{device}=="0x1eb8", GOTO="configure_nvidia" ATTRS{device}=="0x1ec2", GOTO="configure_nvidia" ATTRS{device}=="0x1ec7", GOTO="configure_nvidia" ATTRS{device}=="0x1ed0", GOTO="configure_nvidia" +ATTRS{device}=="0x1ed1", GOTO="configure_nvidia" +ATTRS{device}=="0x1ed3", GOTO="configure_nvidia" +ATTRS{device}=="0x1ef5", GOTO="configure_nvidia" ATTRS{device}=="0x1f02", GOTO="configure_nvidia" ATTRS{device}=="0x1f06", GOTO="configure_nvidia" ATTRS{device}=="0x1f07", GOTO="configure_nvidia" ATTRS{device}=="0x1f08", GOTO="configure_nvidia" ATTRS{device}=="0x1f09", GOTO="configure_nvidia" +ATTRS{device}=="0x1f0a", GOTO="configure_nvidia" ATTRS{device}=="0x1f10", GOTO="configure_nvidia" ATTRS{device}=="0x1f11", GOTO="configure_nvidia" ATTRS{device}=="0x1f12", GOTO="configure_nvidia" +ATTRS{device}=="0x1f14", GOTO="configure_nvidia" +ATTRS{device}=="0x1f15", GOTO="configure_nvidia" ATTRS{device}=="0x1f36", GOTO="configure_nvidia" ATTRS{device}=="0x1f42", GOTO="configure_nvidia" ATTRS{device}=="0x1f47", GOTO="configure_nvidia" ATTRS{device}=="0x1f50", GOTO="configure_nvidia" ATTRS{device}=="0x1f51", GOTO="configure_nvidia" +ATTRS{device}=="0x1f54", GOTO="configure_nvidia" +ATTRS{device}=="0x1f55", GOTO="configure_nvidia" ATTRS{device}=="0x1f76", GOTO="configure_nvidia" ATTRS{device}=="0x1f82", GOTO="configure_nvidia" ATTRS{device}=="0x1f91", GOTO="configure_nvidia" +ATTRS{device}=="0x1f95", GOTO="configure_nvidia" ATTRS{device}=="0x1f96", GOTO="configure_nvidia" +ATTRS{device}=="0x1f99", GOTO="configure_nvidia" ATTRS{device}=="0x1fb8", GOTO="configure_nvidia" ATTRS{device}=="0x1fb9", GOTO="configure_nvidia" +ATTRS{device}=="0x1ff9", GOTO="configure_nvidia" +ATTRS{device}=="0x20b0", GOTO="configure_nvidia" +ATTRS{device}=="0x20f1", GOTO="configure_nvidia" ATTRS{device}=="0x2182", GOTO="configure_nvidia" ATTRS{device}=="0x2184", GOTO="configure_nvidia" ATTRS{device}=="0x2187", GOTO="configure_nvidia" +ATTRS{device}=="0x2188", GOTO="configure_nvidia" ATTRS{device}=="0x2191", GOTO="configure_nvidia" +ATTRS{device}=="0x2192", GOTO="configure_nvidia" ATTRS{device}=="0x21c4", GOTO="configure_nvidia" ATTRS{device}=="0x21d1", GOTO="configure_nvidia" GOTO="configure_nvidia-legacy" From 4f328a679a705e3744d02b9d562db3d0cb22e4e6 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Thu, 6 Aug 2020 00:03:24 +0200 Subject: [PATCH 10/11] Generic: Update linux config --- projects/Generic/linux/linux.x86_64.conf | 367 ++++++++++++++++------- 1 file changed, 255 insertions(+), 112 deletions(-) diff --git a/projects/Generic/linux/linux.x86_64.conf b/projects/Generic/linux/linux.x86_64.conf index 17752c40d2..aa1d2dad36 100644 --- a/projects/Generic/linux/linux.x86_64.conf +++ b/projects/Generic/linux/linux.x86_64.conf @@ -1,16 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 5.7.0-rc6 Kernel Configuration -# - -# -# Compiler: gcc (Ubuntu 7.2.0-8ubuntu3.2) 7.2.0 +# Linux/x86 5.8.0 Kernel Configuration # +CONFIG_CC_VERSION_TEXT="x86_64-libreelec-linux-gnu-gcc-10.2.0 (GCC) 10.2.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=70200 -CONFIG_LD_VERSION=233000000 +CONFIG_GCC_VERSION=100200 +CONFIG_LD_VERSION=234000000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -37,12 +35,14 @@ CONFIG_HAVE_KERNEL_LZ4=y CONFIG_KERNEL_XZ=y # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set @@ -116,6 +116,8 @@ CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_RUDE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y # end of RCU Subsystem @@ -144,7 +146,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -315,7 +316,6 @@ CONFIG_PARAVIRT_SPINLOCKS=y CONFIG_KVM_GUEST=y CONFIG_ARCH_CPUIDLE_HALTPOLL=y # CONFIG_PVH is not set -# CONFIG_KVM_DEBUG_FS is not set CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set @@ -384,7 +384,6 @@ CONFIG_X86_DIRECT_GBPAGES=y CONFIG_NUMA=y # CONFIG_AMD_NUMA is not set CONFIG_X86_64_ACPI_NUMA=y -CONFIG_NODES_SPAN_OTHER_NODES=y # CONFIG_NUMA_EMU is not set CONFIG_NODES_SHIFT=6 CONFIG_ARCH_SPARSEMEM_ENABLE=y @@ -618,6 +617,7 @@ CONFIG_EFI_VARS=y CONFIG_EFI_ESRT=y # CONFIG_EFI_FAKE_MEMMAP is not set CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y # CONFIG_EFI_BOOTLOADER_CONTROL is not set # CONFIG_EFI_CAPSULE_LOADER is not set # CONFIG_EFI_TEST is not set @@ -628,6 +628,7 @@ CONFIG_APPLE_PROPERTIES=y # end of EFI (Extensible Firmware Interface) Support CONFIG_EFI_DEV_PATH_PARSER=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y # # Tegra firmware driver @@ -640,6 +641,7 @@ CONFIG_HAVE_KVM=y CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y +CONFIG_AS_TPAUSE=y # # General architecture-dependent options @@ -675,7 +677,6 @@ CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y @@ -712,7 +713,6 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y @@ -774,6 +774,7 @@ CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -857,7 +858,6 @@ CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_HAVE_FAST_GUP=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_SPLIT_PTLOCK_CPUS=4 @@ -1196,6 +1196,7 @@ CONFIG_STP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y # CONFIG_BRIDGE_VLAN_FILTERING is not set +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m @@ -1275,6 +1276,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set # CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1308,8 +1310,9 @@ CONFIG_BT_HIDP=m CONFIG_BT_HS=y CONFIG_BT_LE=y # CONFIG_BT_LEDS is not set -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set # # Bluetooth device drivers @@ -2047,6 +2050,7 @@ CONFIG_AMD_PHY=y # CONFIG_BCM87XX_PHY is not set CONFIG_BCM_NET_PHYLIB=y CONFIG_BROADCOM_PHY=y +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -2270,7 +2274,10 @@ CONFIG_MT76x2_COMMON=m CONFIG_MT76x2E=m CONFIG_MT76x2U=m CONFIG_MT7603E=m +CONFIG_MT7615_COMMON=m CONFIG_MT7615E=m +CONFIG_MT7663U=m +CONFIG_MT7915E=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2400PCI=m @@ -2324,8 +2331,12 @@ CONFIG_RTLBTCOEXIST=m CONFIG_RTW88=m CONFIG_RTW88_CORE=m CONFIG_RTW88_PCI=m -CONFIG_RTW88_8822BE=y -CONFIG_RTW88_8822CE=y +CONFIG_RTW88_8822B=m +CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723D=m +CONFIG_RTW88_8822BE=m +CONFIG_RTW88_8822CE=m +CONFIG_RTW88_8723DE=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set CONFIG_WLAN_VENDOR_RSI=y @@ -2468,6 +2479,7 @@ CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set @@ -2540,10 +2552,8 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set # CONFIG_INPUT_APANEL is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -2560,6 +2570,7 @@ CONFIG_INPUT_UINPUT=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set @@ -2642,6 +2653,7 @@ CONFIG_SERIAL_8250_MID=y # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_LANTIQ is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set @@ -2749,10 +2761,10 @@ CONFIG_I2C_VIAPRO=y # # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set -# CONFIG_I2C_DESIGNWARE_PCI is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_DESIGNWARE_BAYTRAIL=y +# CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set @@ -2831,6 +2843,7 @@ CONFIG_PINCTRL_CEDARFORK=y CONFIG_PINCTRL_DENVERTON=y CONFIG_PINCTRL_GEMINILAKE=y CONFIG_PINCTRL_ICELAKE=y +CONFIG_PINCTRL_JASPERLAKE=y CONFIG_PINCTRL_LEWISBURG=y CONFIG_PINCTRL_SUNRISEPOINT=y CONFIG_PINCTRL_TIGERLAKE=y @@ -2886,7 +2899,6 @@ CONFIG_GPIO_SYSFS=y # PCI GPIO expanders # # CONFIG_GPIO_AMD8111 is not set -# CONFIG_GPIO_BT8XX is not set # CONFIG_GPIO_ML_IOH is not set # CONFIG_GPIO_PCI_IDIO_16 is not set # CONFIG_GPIO_PCIE_IDIO_24 is not set @@ -2898,6 +2910,7 @@ CONFIG_GPIO_SYSFS=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set # CONFIG_POWER_AVS is not set @@ -2908,6 +2921,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_PDA_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2929,6 +2943,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2958,6 +2973,7 @@ CONFIG_HWMON_VID=y CONFIG_SENSORS_K8TEMP=m CONFIG_SENSORS_K10TEMP=m CONFIG_SENSORS_FAM15H_POWER=m +CONFIG_SENSORS_AMD_ENERGY=m # CONFIG_SENSORS_APPLESMC is not set # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ASPEED is not set @@ -3025,7 +3041,6 @@ CONFIG_SENSORS_IT87=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set @@ -3148,6 +3163,7 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set @@ -3159,6 +3175,7 @@ CONFIG_LPC_SCH=y CONFIG_MFD_INTEL_LPSS=y CONFIG_MFD_INTEL_LPSS_ACPI=y CONFIG_MFD_INTEL_LPSS_PCI=y +# CONFIG_MFD_INTEL_PMC_BXT is not set # CONFIG_MFD_IQS62X is not set # CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_KEMPLD is not set @@ -3172,6 +3189,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_MFD_VIPERBOARD is not set @@ -3206,7 +3224,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set +CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TQMX86 is not set # CONFIG_MFD_VX855 is not set @@ -3242,6 +3260,7 @@ CONFIG_REGULATOR=y # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MP8859 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PFUZE100 is not set @@ -3254,7 +3273,6 @@ CONFIG_REGULATOR=y # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set # CONFIG_REGULATOR_TPS65132 is not set -CONFIG_CEC_CORE=y CONFIG_RC_CORE=y CONFIG_RC_MAP=m CONFIG_LIRC=y @@ -3291,43 +3309,70 @@ CONFIG_IR_SERIAL=m CONFIG_IR_SERIAL_TRANSMITTER=y # CONFIG_IR_SIR is not set CONFIG_RC_XBOX_DVD=m +CONFIG_CEC_CORE=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set CONFIG_MEDIA_SUPPORT=m +# CONFIG_MEDIA_SUPPORT_FILTER is not set +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -# CONFIG_MEDIA_CEC_RC is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# CONFIG_VIDEO_DEV=m -# CONFIG_VIDEO_V4L2_SUBDEV_API is not set +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m +# end of Media core support + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m +# CONFIG_V4L2_FLASH_LED_CLASS is not set +CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_DMA_SG=m CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_DVB_CORE=m +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=64 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # +CONFIG_TTPCI_EEPROM=m CONFIG_MEDIA_USB_SUPPORT=y # @@ -3429,6 +3474,12 @@ CONFIG_VIDEO_EM28XX=m # CONFIG_VIDEO_EM28XX_ALSA is not set CONFIG_VIDEO_EM28XX_DVB=m CONFIG_VIDEO_EM28XX_RC=m + +# +# Software defined radio USB devices +# +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set CONFIG_MEDIA_PCI_SUPPORT=y # @@ -3464,6 +3515,8 @@ CONFIG_VIDEO_CX88_DVB=m CONFIG_VIDEO_CX88_ENABLE_VP3054=y CONFIG_VIDEO_CX88_VP3054=m CONFIG_VIDEO_CX88_MPEG=m +CONFIG_VIDEO_BT848=m +CONFIG_DVB_BT8XX=m CONFIG_VIDEO_SAA7134=m # CONFIG_VIDEO_SAA7134_ALSA is not set CONFIG_VIDEO_SAA7134_RC=y @@ -3494,21 +3547,28 @@ CONFIG_DVB_NGENE=m CONFIG_DVB_DDBRIDGE=m # CONFIG_DVB_DDBRIDGE_MSIENABLE is not set CONFIG_DVB_SMIPCIE=m -# CONFIG_V4L_PLATFORM_DRIVERS is not set -# CONFIG_V4L_MEM2MEM_DRIVERS is not set -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_DVB_PLATFORM_DRIVERS is not set - -# -# Supported MMC/SDIO adapters -# -CONFIG_SMS_SDIO_DRV=m - -# -# Supported FireWire (IEEE 1394) Adapters -# -CONFIG_DVB_FIREDTV=m -CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_VIDEO_IPU3_CIO2=m +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_TEA575X=m +CONFIG_RADIO_SI470X=m +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m +CONFIG_RADIO_SI4713=m +CONFIG_USB_SI4713=m +CONFIG_PLATFORM_SI4713=m +CONFIG_I2C_SI4713=m +CONFIG_USB_MR800=m +CONFIG_USB_DSBR=m +CONFIG_RADIO_MAXIRADIO=m +CONFIG_RADIO_SHARK=m +CONFIG_RADIO_SHARK2=m +CONFIG_USB_KEENE=m +CONFIG_USB_RAREMONO=m +CONFIG_USB_MA901=m +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_SAA7706H=m +CONFIG_RADIO_TEF6862=m +CONFIG_RADIO_WL1273=m CONFIG_MEDIA_COMMON_OPTIONS=y # @@ -3529,24 +3589,41 @@ CONFIG_VIDEO_SAA7146_VV=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y # CONFIG_SMS_SIANO_DEBUGFS is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# MMC/SDIO DVB adapters +# +CONFIG_SMS_SDIO_DRV=m +# CONFIG_V4L_TEST_DRIVERS is not set + +# +# FireWire (IEEE 1394) Adapters +# +CONFIG_DVB_FIREDTV=m +CONFIG_DVB_FIREDTV_INPUT=y +# end of Media drivers + +# +# Media ancillary drivers # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y CONFIG_MEDIA_ATTACH=y -CONFIG_VIDEO_IR_I2C=m # -# I2C Encoders, decoders, sensors and other helper chips +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' # +CONFIG_VIDEO_IR_I2C=m # # Audio decoders, processors and mixers # -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set +CONFIG_VIDEO_TVAUDIO=m +CONFIG_VIDEO_TDA7432=m # CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set # CONFIG_VIDEO_TEA6415C is not set # CONFIG_VIDEO_TEA6420 is not set CONFIG_VIDEO_MSP3400=m @@ -3559,16 +3636,21 @@ CONFIG_VIDEO_WM8775=m # CONFIG_VIDEO_WM8739 is not set # CONFIG_VIDEO_VP27SMPX is not set # CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers # # RDS decoders # CONFIG_VIDEO_SAA6588=m +# end of RDS decoders # # Video decoders # +CONFIG_VIDEO_ADV7180=m # CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set # CONFIG_VIDEO_BT819 is not set # CONFIG_VIDEO_BT856 is not set # CONFIG_VIDEO_BT866 is not set @@ -3576,6 +3658,7 @@ CONFIG_VIDEO_SAA6588=m # CONFIG_VIDEO_ML86V7667 is not set # CONFIG_VIDEO_SAA7110 is not set CONFIG_VIDEO_SAA711X=m +# CONFIG_VIDEO_TC358743 is not set # CONFIG_VIDEO_TVP514X is not set # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set @@ -3590,6 +3673,7 @@ CONFIG_VIDEO_SAA711X=m # # CONFIG_VIDEO_SAA717X is not set CONFIG_VIDEO_CX25840=m +# end of Video decoders # # Video encoders @@ -3600,57 +3684,30 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_ADV7175 is not set # CONFIG_VIDEO_ADV7343 is not set # CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set # CONFIG_VIDEO_AK881X is not set # CONFIG_VIDEO_THS8200 is not set - -# -# Camera sensor devices -# -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV2680 is not set -# CONFIG_VIDEO_OV2685 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_OV9640 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_RJ54N1 is not set - -# -# Lens drivers -# -# CONFIG_VIDEO_AD5820 is not set - -# -# Flash devices -# -# CONFIG_VIDEO_ADP1653 is not set -# CONFIG_VIDEO_LM3560 is not set -# CONFIG_VIDEO_LM3646 is not set +# end of Video encoders # # Video improvement chips # # CONFIG_VIDEO_UPD64031A is not set # CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips # # Audio/Video compression chips # CONFIG_VIDEO_SAA6752HS=m +# end of Audio/Video compression chips # # SDR tuner chips # +CONFIG_SDR_MAX2175=m +# end of SDR tuner chips # # Miscellaneous helper chips @@ -3658,7 +3715,77 @@ CONFIG_VIDEO_SAA6752HS=m # CONFIG_VIDEO_THS7303 is not set # CONFIG_VIDEO_M52790 is not set # CONFIG_VIDEO_I2C is not set -# end of I2C Encoders, decoders, sensors and other helper chips +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips + +# +# Camera sensor devices +# +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices # # SPI helper chips @@ -3676,8 +3803,8 @@ CONFIG_MEDIA_TUNER_TDA8290=m CONFIG_MEDIA_TUNER_TDA827X=m CONFIG_MEDIA_TUNER_TDA18271=m CONFIG_MEDIA_TUNER_TDA9887=m -# CONFIG_MEDIA_TUNER_TEA5761 is not set -# CONFIG_MEDIA_TUNER_TEA5767 is not set +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m CONFIG_MEDIA_TUNER_MT20XX=m CONFIG_MEDIA_TUNER_MT2060=m CONFIG_MEDIA_TUNER_MT2063=m @@ -3736,7 +3863,7 @@ CONFIG_DVB_MN88473=m # # DVB-S (satellite) frontends # -# CONFIG_DVB_CX24110 is not set +CONFIG_DVB_CX24110=m CONFIG_DVB_CX24123=m CONFIG_DVB_MT312=m CONFIG_DVB_ZL10036=m @@ -3768,7 +3895,7 @@ CONFIG_DVB_TDA10071=m # DVB-T (terrestrial) frontends # CONFIG_DVB_SP8870=m -# CONFIG_DVB_SP887X is not set +CONFIG_DVB_SP887X=m CONFIG_DVB_CX22700=m CONFIG_DVB_CX22702=m # CONFIG_DVB_S5H1432 is not set @@ -3791,6 +3918,7 @@ CONFIG_DVB_CXD2820R=m CONFIG_DVB_CXD2841ER=m CONFIG_DVB_RTL2830=m CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m CONFIG_DVB_SI2168=m CONFIG_DVB_AS102_FE=m CONFIG_DVB_ZD1301_DEMOD=m @@ -3808,7 +3936,7 @@ CONFIG_DVB_STV0297=m # ATSC (North American/Korean Terrestrial/Cable DTV) frontends # CONFIG_DVB_NXT200X=m -# CONFIG_DVB_OR51211 is not set +CONFIG_DVB_OR51211=m CONFIG_DVB_OR51132=m CONFIG_DVB_BCM3510=m CONFIG_DVB_LGDT330X=m @@ -3869,12 +3997,13 @@ CONFIG_DVB_AF9033=m # CONFIG_DVB_CXD2099=m CONFIG_DVB_SP2=m +# end of Customise DVB Frontends # # Tools to develop new frontends # CONFIG_DVB_DUMMY_FE=m -# end of Customise DVB Frontends +# end of Media ancillary drivers # # Graphics support @@ -3970,6 +4099,7 @@ CONFIG_DRM_I915_USERPTR=y # # drm/i915 Profile Guided Optimisation # +CONFIG_DRM_I915_FENCE_TIMEOUT=10000 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 @@ -3986,7 +4116,6 @@ CONFIG_DRM_VMWGFX_FBCON=y # CONFIG_DRM_UDL is not set # CONFIG_DRM_AST is not set # CONFIG_DRM_MGAG200 is not set -# CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_QXL is not set # CONFIG_DRM_BOCHS is not set CONFIG_DRM_VIRTIO_GPU=y @@ -4008,6 +4137,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_VBOXVIDEO is not set # CONFIG_DRM_LEGACY is not set @@ -4287,6 +4417,8 @@ CONFIG_SND_SOC_AMD_ACP=m CONFIG_SND_SOC_AMD_CZ_DA7219MX98357_MACH=m CONFIG_SND_SOC_AMD_CZ_RT5645_MACH=m CONFIG_SND_SOC_AMD_ACP3x=m +CONFIG_SND_SOC_AMD_RENOIR=m +CONFIG_SND_SOC_AMD_RENOIR_MACH=m # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_BCM63XX_I2S_WHISTLER is not set # CONFIG_SND_DESIGNWARE_I2S is not set @@ -4430,6 +4562,7 @@ CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_MAX9867 is not set CONFIG_SND_SOC_MAX98927=m # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set @@ -4677,7 +4810,8 @@ CONFIG_USB_MON=m # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PCI=m +CONFIG_USB_XHCI_PCI_RENESAS=m # CONFIG_USB_XHCI_PLATFORM is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4931,6 +5065,7 @@ CONFIG_LEDS_CLASS_FLASH=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_NIC78BX is not set # CONFIG_LEDS_TI_LMU_COMMON is not set +# CONFIG_LEDS_SGM3140 is not set # # LED Triggers @@ -5088,7 +5223,8 @@ CONFIG_SYNC_FILE=y # CONFIG_UDMABUF is not set # CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_SELFTESTS is not set -# CONFIG_DMABUF_HEAPS is not set +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y # end of DMABUF options CONFIG_DCA=m @@ -5113,7 +5249,6 @@ CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set # CONFIG_VDPA is not set -CONFIG_VHOST_DPN=y # CONFIG_VHOST_MENU is not set # @@ -5143,6 +5278,8 @@ CONFIG_VT6656=m # end of Speakup console speech CONFIG_STAGING_MEDIA=y +# CONFIG_INTEL_ATOMISP is not set +CONFIG_VIDEO_IPU3_IMGU=m # # soc_camera sensor drivers @@ -5176,6 +5313,7 @@ CONFIG_ACPI_WMI=y CONFIG_WMI_BMOF=y # CONFIG_ALIENWARE_WMI is not set # CONFIG_HUAWEI_WMI is not set +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set # CONFIG_INTEL_WMI_THUNDERBOLT is not set # CONFIG_MXM_WMI is not set # CONFIG_PEAQ_WMI is not set @@ -5242,27 +5380,23 @@ CONFIG_INTEL_ATOMISP2_PM=y # CONFIG_INTEL_TURBO_MAX_3 is not set # CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set # CONFIG_INTEL_PMC_CORE is not set -# CONFIG_INTEL_PMC_IPC is not set # CONFIG_INTEL_PUNIT_IPC is not set +# CONFIG_INTEL_SCU_PCI is not set +# CONFIG_INTEL_SCU_PLATFORM is not set CONFIG_PMC_ATOM=y # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI544 is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set -# end of Common Clock Framework - # CONFIG_HWSPINLOCK is not set # @@ -5275,6 +5409,7 @@ CONFIG_CLKBLD_I8253=y CONFIG_MAILBOX=y CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set +CONFIG_IOMMU_IOVA=m # CONFIG_IOMMU_SUPPORT is not set # CONFIG_AMD_IOMMU_V2 is not set @@ -5676,7 +5811,6 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y CONFIG_KEYS_REQUEST_CACHE=y # CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_BIG_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y # CONFIG_SECURITY_DMESG_RESTRICT is not set @@ -5936,6 +6070,7 @@ CONFIG_BINARY_PRINTF=y # CONFIG_RAID6_PQ=y # CONFIG_RAID6_PQ_BENCHMARK is not set +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y @@ -5943,11 +6078,13 @@ CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_GENERIC_FIND_FIRST_BIT=y # CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set @@ -6034,6 +6171,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options @@ -6080,6 +6218,8 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set # CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set @@ -6089,7 +6229,9 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set # CONFIG_DEBUG_MEMORY_INIT is not set @@ -6097,6 +6239,7 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -6214,7 +6357,6 @@ CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y # CONFIG_FUNCTION_PROFILER is not set CONFIG_STACK_TRACER=y -# CONFIG_PREEMPTIRQ_EVENTS is not set CONFIG_IRQSOFF_TRACER=y CONFIG_SCHED_TRACER=y # CONFIG_HWLAT_TRACER is not set @@ -6234,6 +6376,7 @@ CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y # CONFIG_BPF_KPROBE_OVERRIDE is not set CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_SYNTH_EVENTS is not set # CONFIG_HIST_TRIGGERS is not set # CONFIG_TRACE_EVENT_INJECT is not set # CONFIG_TRACEPOINT_BENCHMARK is not set @@ -6245,6 +6388,7 @@ CONFIG_FTRACE_MCOUNT_RECORD=y # CONFIG_KPROBE_EVENT_GEN_TEST is not set # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set # CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KCSAN=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y CONFIG_STRICT_DEVMEM=y # CONFIG_IO_STRICT_DEVMEM is not set @@ -6256,8 +6400,6 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_X86_VERBOSE_BOOTUP is not set # CONFIG_EARLY_PRINTK is not set # CONFIG_EFI_PGT_DUMP is not set -# CONFIG_DEBUG_WX is not set -CONFIG_DOUBLEFAULT=y # CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_DEBUG is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y @@ -6313,6 +6455,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set From 09bb6a4cb5d5e0b6af25b875601b95399e119974 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 9 Aug 2020 19:19:46 +0000 Subject: [PATCH 11/11] Rockchip: linux: update to 5.8 --- .../RK3288/linux/default/linux.arm.conf | 247 +- .../RK3328/linux/default/linux.aarch64.conf | 300 +- .../RK3399/linux/default/linux.aarch64.conf | 300 +- .../linux-0001-rockchip-from-5.8.patch | 3409 ---------- .../linux-0001-rockchip-from-5.9.patch | 4098 ++++++++++++ .../linux-0002-rockchip-from-next.patch | 251 +- .../default/linux-0011-v4l2-from-5.8.patch | 5631 ----------------- .../default/linux-0011-v4l2-from-5.9.patch | 1190 ++++ .../default/linux-0021-drm-from-5.8.patch | 3066 --------- .../default/linux-0021-drm-from-5.9.patch | 3613 +++++++++++ .../default/linux-0022-drm-from-next.patch | 1276 ++++ 11 files changed, 10942 insertions(+), 12439 deletions(-) delete mode 100644 projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch create mode 100644 projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.9.patch delete mode 100644 projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch create mode 100644 projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.9.patch delete mode 100644 projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch create mode 100644 projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.9.patch create mode 100644 projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch diff --git a/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf b/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf index 536bd444a2..4e9ea279bd 100644 --- a/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf +++ b/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf @@ -1,13 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 5.7.2 Kernel Configuration +# Linux/arm 5.8.0 Kernel Configuration # - +CONFIG_CC_VERSION_TEXT="arm-none-linux-gnueabihf-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -31,12 +32,14 @@ CONFIG_HAVE_KERNEL_LZ4=y # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set CONFIG_KERNEL_LZ4=y +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set @@ -130,7 +133,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -314,6 +316,7 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_SIRF is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_REALVIEW is not set CONFIG_ARCH_ROCKCHIP=y # CONFIG_ARCH_S5PV210 is not set @@ -438,6 +441,9 @@ CONFIG_SCHED_HRTICK=y CONFIG_ARM_PATCH_IDIV=y CONFIG_AEABI=y # CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y @@ -505,7 +511,6 @@ CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y # CONFIG_ARM_SCPI_CPUFREQ is not set # CONFIG_ARM_SCMI_CPUFREQ is not set -CONFIG_QORIQ_CPUFREQ=y # end of CPU Frequency scaling # @@ -573,8 +578,8 @@ CONFIG_ARM_SCPI_PROTOCOL=m CONFIG_ARM_SCPI_POWER_DOMAIN=m # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set -CONFIG_HAVE_ARM_SMCCC=y # CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_HAVE_ARM_SMCCC=y # # Tegra firmware driver @@ -614,7 +619,6 @@ CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -691,6 +695,7 @@ CONFIG_BLK_CMDLINE_PARSER=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -742,6 +747,9 @@ CONFIG_COREDUMP=y # # Memory Management options # +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_ARCH_KEEP_MEMBLOCK=y @@ -789,6 +797,8 @@ CONFIG_XFRM_ALGO=m # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_AH=m +CONFIG_XFRM_ESP=m CONFIG_XFRM_IPCOMP=m # CONFIG_NET_KEY is not set # CONFIG_XDP_SOCKETS is not set @@ -827,6 +837,7 @@ CONFIG_IPV6_OPTIMISTIC_DAD=y CONFIG_INET6_AH=m CONFIG_INET6_ESP=m # CONFIG_INET6_ESP_OFFLOAD is not set +# CONFIG_INET6_ESPINTCP is not set CONFIG_INET6_IPCOMP=m CONFIG_IPV6_MIP6=m CONFIG_INET6_XFRM_TUNNEL=m @@ -893,6 +904,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set CONFIG_NET_SWITCHDEV=y # CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -923,8 +935,9 @@ CONFIG_BT_BREDR=y CONFIG_BT_HS=y CONFIG_BT_LE=y # CONFIG_BT_LEDS is not set -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set CONFIG_BT_DEBUGFS=y +# CONFIG_BT_SELFTEST is not set # # Bluetooth device drivers @@ -1404,6 +1417,7 @@ CONFIG_MDIO_BCM_UNIMAC=m # CONFIG_MDIO_BUS_MUX_MMIOREG is not set # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1425,6 +1439,7 @@ CONFIG_BCM7XXX_PHY=m # CONFIG_BCM87XX_PHY is not set CONFIG_BCM_NET_PHYLIB=m # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1602,6 +1617,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -1733,13 +1750,11 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_PM8XXX_VIBRATOR is not set # CONFIG_INPUT_PMIC8XXX_PWRKEY is not set CONFIG_INPUT_MAX77693_HAPTIC=m CONFIG_INPUT_MAX8997_HAPTIC=m # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -1765,6 +1780,7 @@ CONFIG_INPUT_ADXL34X=m CONFIG_INPUT_ADXL34X_I2C=m CONFIG_INPUT_ADXL34X_SPI=m # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -1873,6 +1889,7 @@ CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_OPTEE=m +# CONFIG_HW_RANDOM_CCTRNG is not set CONFIG_DEVMEM=y # CONFIG_DEVKMEM is not set # CONFIG_RAW_DRIVER is not set @@ -1918,8 +1935,8 @@ CONFIG_I2C_ALGOBIT=y # # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_EMEV2=m CONFIG_I2C_GPIO=m # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set @@ -1978,6 +1995,7 @@ CONFIG_SPI_ROCKCHIP=m # CONFIG_SPI_XCOMM is not set CONFIG_SPI_XILINX=y # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2026,7 +2044,6 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AS3722=y # CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set @@ -2035,7 +2052,6 @@ CONFIG_PINCTRL_ROCKCHIP=y CONFIG_PINCTRL_PALMAS=y # CONFIG_PINCTRL_RK805 is not set # CONFIG_PINCTRL_OCELOT is not set -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 @@ -2109,6 +2125,7 @@ CONFIG_GPIO_TPS65910=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set CONFIG_POWER_AVS=y @@ -2124,6 +2141,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_ACT8945A is not set CONFIG_BATTERY_CPCAP=y +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2159,6 +2177,7 @@ CONFIG_BATTERY_CPCAP=y # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_CROS_USBPD is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2319,7 +2338,6 @@ CONFIG_CPU_FREQ_THERMAL=y CONFIG_DEVFREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_ROCKCHIP_THERMAL=y # CONFIG_TI_SOC_THERMAL is not set # CONFIG_GENERIC_ADC_THERMAL is not set @@ -2349,6 +2367,7 @@ CONFIG_DA9063_WATCHDOG=m CONFIG_DW_WATCHDOG=y CONFIG_RN5T618_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2395,8 +2414,10 @@ CONFIG_MFD_CROS_EC_DEV=m CONFIG_MFD_DA9063=m # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2415,6 +2436,7 @@ CONFIG_MFD_MAX8907=y # CONFIG_MFD_MAX8925 is not set CONFIG_MFD_MAX8997=y CONFIG_MFD_MAX8998=y +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2526,6 +2548,7 @@ CONFIG_REGULATOR_MAX8998=m CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77693=m CONFIG_REGULATOR_MAX77802=m +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -2559,8 +2582,6 @@ CONFIG_REGULATOR_TPS65218=y CONFIG_REGULATOR_TPS6586X=y CONFIG_REGULATOR_TPS65910=y # CONFIG_REGULATOR_VCTRL is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y CONFIG_RC_CORE=y CONFIG_RC_MAP=m CONFIG_LIRC=y @@ -2597,33 +2618,62 @@ CONFIG_IR_SERIAL=m # CONFIG_IR_SERIAL_TRANSMITTER is not set CONFIG_IR_SIR=m CONFIG_RC_XBOX_DVD=m +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CROS_EC is not set +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y # CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set # CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set # CONFIG_MEDIA_RADIO_SUPPORT is not set # CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +# CONFIG_MEDIA_PLATFORM_SUPPORT is not set +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_V4L2_H264=m CONFIG_V4L2_MEM2MEM_DEV=m # CONFIG_V4L2_FLASH_LED_CLASS is not set +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options # # Media drivers # + +# +# Drivers filtered as selected at 'Filter media drivers' +# CONFIG_MEDIA_USB_SUPPORT=y # @@ -2692,53 +2742,18 @@ CONFIG_USB_GSPCA=m # Webcam, TV (analog/digital) USB devices # # CONFIG_VIDEO_EM28XX is not set - -# -# USB HDMI CEC adapters -# -CONFIG_USB_PULSE8_CEC=m -CONFIG_USB_RAINSHADOW_CEC=m -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_ASPEED is not set -# CONFIG_VIDEO_MUX is not set -# CONFIG_VIDEO_XILINX is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_ROCKCHIP_RGA=m -CONFIG_V4L_TEST_DRIVERS=y -# CONFIG_VIDEO_VIMC is not set -CONFIG_VIDEO_VIVID=m -# CONFIG_VIDEO_VIVID_CEC is not set -CONFIG_VIDEO_VIVID_MAX_DEVS=64 -# CONFIG_VIDEO_VIM2M is not set -# CONFIG_VIDEO_VICODEC is not set -CONFIG_CEC_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_CROS_EC_CEC is not set - -# -# Supported MMC/SDIO adapters -# -# CONFIG_CYPRESS_FIRMWARE is not set CONFIG_VIDEOBUF2_CORE=m CONFIG_VIDEOBUF2_V4L2=m CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_DMA_CONTIG=m CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEOBUF2_DMA_SG=m -CONFIG_VIDEO_V4L2_TPG=m +# end of Media drivers # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# Media ancillary drivers # -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set CONFIG_VIDEO_IR_I2C=m -# -# I2C Encoders, decoders, sensors and other helper chips -# - # # Audio decoders, processors and mixers # @@ -2758,11 +2773,13 @@ CONFIG_VIDEO_IR_I2C=m # CONFIG_VIDEO_WM8739 is not set # CONFIG_VIDEO_VP27SMPX is not set # CONFIG_VIDEO_SONY_BTF_MPX is not set +# end of Audio decoders, processors and mixers # # RDS decoders # # CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders # # Video decoders @@ -2794,6 +2811,7 @@ CONFIG_VIDEO_ML86V7667=m # # CONFIG_VIDEO_SAA717X is not set # CONFIG_VIDEO_CX25840 is not set +# end of Video decoders # # Video encoders @@ -2807,6 +2825,34 @@ CONFIG_VIDEO_ML86V7667=m # CONFIG_VIDEO_AD9389B is not set # CONFIG_VIDEO_AK881X is not set # CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# end of Miscellaneous helper chips # # Camera sensor devices @@ -2822,6 +2868,7 @@ CONFIG_VIDEO_ML86V7667=m # CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2680 is not set # CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set # CONFIG_VIDEO_OV5640 is not set # CONFIG_VIDEO_OV5645 is not set # CONFIG_VIDEO_OV5647 is not set @@ -2859,6 +2906,7 @@ CONFIG_VIDEO_ML86V7667=m # CONFIG_VIDEO_SMIAPP is not set # CONFIG_VIDEO_ET8EK8 is not set # CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers @@ -2867,6 +2915,7 @@ CONFIG_VIDEO_ML86V7667=m # CONFIG_VIDEO_AK7375 is not set # CONFIG_VIDEO_DW9714 is not set # CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices @@ -2874,30 +2923,7 @@ CONFIG_VIDEO_ML86V7667=m # CONFIG_VIDEO_ADP1653 is not set # CONFIG_VIDEO_LM3560 is not set # CONFIG_VIDEO_LM3646 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set - -# -# Audio/Video compression chips -# -# CONFIG_VIDEO_SAA6752HS is not set - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_I2C is not set -# CONFIG_VIDEO_ST_MIPID02 is not set -# end of I2C Encoders, decoders, sensors and other helper chips +# end of Flash devices # # SPI helper chips @@ -2909,15 +2935,7 @@ CONFIG_VIDEO_ML86V7667=m # Media SPI Adapters # # end of Media SPI Adapters - -# -# Customise DVB Frontends -# - -# -# Tools to develop new frontends -# -# end of Customise DVB Frontends +# end of Media ancillary drivers # # Graphics support @@ -2985,6 +3003,7 @@ CONFIG_DRM_PANEL=y # Display Panels # # CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set # CONFIG_DRM_PANEL_LVDS is not set @@ -2997,6 +3016,7 @@ CONFIG_DRM_PANEL_SIMPLE=y # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set @@ -3031,6 +3051,7 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels @@ -3041,9 +3062,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set CONFIG_DRM_NXP_PTN3460=m CONFIG_DRM_PARADE_PS8622=m # CONFIG_DRM_PARADE_PS8640 is not set @@ -3325,6 +3348,7 @@ CONFIG_SND_SOC_MAX98090=m # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set @@ -3399,6 +3423,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_WM8974 is not set CONFIG_SND_SOC_WM8978=m # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -3562,6 +3587,7 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set +# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -3653,9 +3679,12 @@ CONFIG_USB_DWC2_DUAL_ROLE=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_OF=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y @@ -3859,6 +3888,7 @@ CONFIG_LEDS_CLASS_FLASH=m # CONFIG_LEDS_AAT1290 is not set # CONFIG_LEDS_AN30259A is not set # CONFIG_LEDS_AS3645A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set CONFIG_LEDS_CPCAP=m @@ -3904,6 +3934,7 @@ CONFIG_LEDS_MAX8997=m # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_TI_LMU_COMMON is not set +# CONFIG_LEDS_SGM3140 is not set # # LED Triggers @@ -4113,7 +4144,6 @@ CONFIG_VIRTIO_MMIO=y # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=y CONFIG_VHOST_RING=y -CONFIG_VHOST_DPN=y CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set @@ -4247,14 +4277,10 @@ CONFIG_CROS_EC_SENSORHUB=m CONFIG_CROS_EC_SYSFS=m CONFIG_CROS_USBPD_NOTIFY=m # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_CLK_HSDK is not set CONFIG_COMMON_CLK_MAX77686=y # CONFIG_COMMON_CLK_MAX9485 is not set CONFIG_COMMON_CLK_RK808=y @@ -4274,8 +4300,6 @@ CONFIG_CLK_QORIQ=y # CONFIG_COMMON_CLK_PWM is not set # CONFIG_COMMON_CLK_VC5 is not set # CONFIG_COMMON_CLK_FIXED_MMIO is not set -# end of Common Clock Framework - # CONFIG_HWSPINLOCK is not set # @@ -4487,6 +4511,8 @@ CONFIG_IIO_SW_TRIGGER=y # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set @@ -4502,6 +4528,7 @@ CONFIG_CPCAP_ADC=m # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -4551,6 +4578,7 @@ CONFIG_VF610_ADC=m # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -4682,6 +4710,7 @@ CONFIG_MPU3050_I2C=y # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -4840,8 +4869,10 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -4901,6 +4932,7 @@ CONFIG_GENERIC_PHY=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -4920,7 +4952,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=m CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5134,6 +5165,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_RAM=y +# CONFIG_PSTORE_BLK is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5229,7 +5261,6 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_BIG_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set @@ -5356,7 +5387,7 @@ CONFIG_CRYPTO_MD5=m # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RMD256 is not set # CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=m # CONFIG_CRYPTO_SHA512 is not set # CONFIG_CRYPTO_SHA3 is not set @@ -5465,6 +5496,7 @@ CONFIG_BINARY_PRINTF=y # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5472,6 +5504,7 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y @@ -5572,6 +5605,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options @@ -5581,6 +5615,7 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set @@ -5617,6 +5652,7 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set # CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_WX is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set @@ -5631,6 +5667,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_HIGHMEM is not set CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -5724,7 +5761,6 @@ CONFIG_FTRACE=y # CONFIG_BOOTTIME_TRACING is not set # CONFIG_FUNCTION_TRACER is not set # CONFIG_STACK_TRACER is not set -# CONFIG_PREEMPTIRQ_EVENTS is not set # CONFIG_IRQSOFF_TRACER is not set # CONFIG_SCHED_TRACER is not set # CONFIG_HWLAT_TRACER is not set @@ -5739,6 +5775,7 @@ CONFIG_UPROBE_EVENTS=y CONFIG_BPF_EVENTS=y CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y +# CONFIG_SYNTH_EVENTS is not set # CONFIG_TRACE_EVENT_INJECT is not set # CONFIG_TRACEPOINT_BENCHMARK is not set # CONFIG_RING_BUFFER_BENCHMARK is not set @@ -5753,7 +5790,6 @@ CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # arm Debugging # # CONFIG_ARM_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_WX is not set # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -5799,6 +5835,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set diff --git a/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf b/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf index cb933df4cf..18c15f6eba 100644 --- a/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf @@ -1,13 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.7.2 Kernel Configuration +# Linux/arm64 5.8.0 Kernel Configuration # - +CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -22,12 +23,14 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set @@ -127,7 +130,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -320,12 +322,12 @@ CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_1024718=y CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_VHE=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_NVHE=y CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y CONFIG_ARM64_ERRATUM_1542419=y CONFIG_CAVIUM_ERRATUM_22375=y @@ -333,14 +335,13 @@ CONFIG_CAVIUM_ERRATUM_23154=y CONFIG_CAVIUM_ERRATUM_27456=y CONFIG_CAVIUM_ERRATUM_30115=y CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_QCOM_FALKOR_ERRATUM_1009=y CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y # end of ARM errata workarounds via the alternatives framework CONFIG_ARM64_4K_PAGES=y @@ -433,6 +434,8 @@ CONFIG_ARM64_AMU_EXTN=y # # ARMv8.5 architectural features # +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y CONFIG_ARM64_E0PD=y CONFIG_ARCH_RANDOM=y # end of ARMv8.5 architectural features @@ -440,6 +443,7 @@ CONFIG_ARCH_RANDOM=y CONFIG_ARM64_SVE=y CONFIG_ARM64_MODULE_PLTS=y # CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y @@ -526,7 +530,6 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_SCPI_CPUFREQ=y -# CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # end of CPU Power Management @@ -537,11 +540,12 @@ CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_ARM_SDE_INTERFACE is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y # # Tegra firmware driver @@ -594,7 +598,6 @@ CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -642,6 +645,7 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y # # GCOV-based kernel profiling @@ -683,6 +687,7 @@ CONFIG_BLK_DEV_BSG=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -773,6 +778,9 @@ CONFIG_FREEZER=y # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_SCRIPT=y @@ -1108,6 +1116,7 @@ CONFIG_NF_DEFRAG_IPV6=m CONFIG_STP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set @@ -1132,6 +1141,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set # CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1161,8 +1171,9 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HS is not set # CONFIG_BT_LE is not set CONFIG_BT_LEDS=y -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set # # Bluetooth device drivers @@ -1609,6 +1620,7 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MDIO_GPIO=y # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1630,6 +1642,7 @@ CONFIG_SWPHY=y # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1805,6 +1818,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -1933,9 +1948,7 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -1954,6 +1967,7 @@ CONFIG_INPUT_RK805_PWRKEY=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -2057,6 +2071,7 @@ CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_OPTEE=m +# CONFIG_HW_RANDOM_CCTRNG is not set CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set @@ -2103,8 +2118,8 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_CADENCE is not set # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_EMEV2 is not set CONFIG_I2C_GPIO=m # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set @@ -2161,6 +2176,7 @@ CONFIG_SPI_ROCKCHIP=m # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2207,7 +2223,6 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set @@ -2216,7 +2231,6 @@ CONFIG_PINCTRL_ROCKCHIP=y CONFIG_PINCTRL_MAX77620=y CONFIG_PINCTRL_RK805=y # CONFIG_PINCTRL_OCELOT is not set -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y @@ -2283,6 +2297,7 @@ CONFIG_GPIO_MAX77620=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set CONFIG_POWER_AVS=y @@ -2307,6 +2322,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2333,6 +2349,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2493,7 +2510,6 @@ CONFIG_DEVFREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set # CONFIG_MAX77620_THERMAL is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_ROCKCHIP_THERMAL=y # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y @@ -2521,6 +2537,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_DW_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2564,8 +2581,10 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2584,6 +2603,7 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2670,6 +2690,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -2696,8 +2717,6 @@ CONFIG_REGULATOR_RK808=y # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set # CONFIG_REGULATOR_VCTRL is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y CONFIG_RC_CORE=y CONFIG_RC_MAP=m CONFIG_LIRC=y @@ -2734,41 +2753,74 @@ CONFIG_IR_SERIAL=m # CONFIG_IR_SERIAL_TRANSMITTER is not set CONFIG_IR_SIR=m CONFIG_RC_XBOX_DVD=m +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y # CONFIG_MEDIA_RADIO_SUPPORT is not set # CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -CONFIG_MEDIA_CONTROLLER=y -# CONFIG_MEDIA_CONTROLLER_DVB is not set -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +# CONFIG_MEDIA_PLATFORM_SUPPORT is not set +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_V4L2_H264=m CONFIG_V4L2_MEM2MEM_DEV=m CONFIG_V4L2_FLASH_LED_CLASS=m -CONFIG_DVB_CORE=m +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set # CONFIG_DVB_NET is not set CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # + +# +# Drivers filtered as selected at 'Filter media drivers' +# CONFIG_MEDIA_USB_SUPPORT=y # @@ -2811,95 +2863,106 @@ CONFIG_MEDIA_USB_SUPPORT=y # Webcam, TV (analog/digital) USB devices # # CONFIG_VIDEO_EM28XX is not set - -# -# USB HDMI CEC adapters -# -CONFIG_USB_PULSE8_CEC=m -CONFIG_USB_RAINSHADOW_CEC=m -# CONFIG_V4L_PLATFORM_DRIVERS is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_ROCKCHIP_RGA=m -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_DVB_PLATFORM_DRIVERS is not set -CONFIG_CEC_PLATFORM_DRIVERS=y - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set -# CONFIG_CYPRESS_FIRMWARE is not set CONFIG_VIDEOBUF2_CORE=m CONFIG_VIDEOBUF2_V4L2=m CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_DMA_CONTIG=m CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEOBUF2_DMA_SG=m +# end of Media drivers + +CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# Media ancillary drivers # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y -CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# CONFIG_VIDEO_IR_I2C=m # -# I2C drivers hidden by 'Autoselect ancillary drivers' -# - -# -# Audio decoders, processors and mixers -# - -# -# RDS decoders -# - -# -# Video decoders +# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' # # # Video and audio decoders # -# -# Video encoders -# - # # Camera sensor devices # +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers # +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices # +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices # -# Video improvement chips -# - -# -# Audio/Video compression chips -# - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# - -# -# SPI drivers hidden by 'Autoselect ancillary drivers' +# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -2911,7 +2974,7 @@ CONFIG_VIDEO_IR_I2C=m CONFIG_MEDIA_TUNER=m # -# Tuner drivers hidden by 'Autoselect ancillary drivers' +# Tuner drivers auto-selected by 'Autoselect ancillary drivers' # CONFIG_MEDIA_TUNER_SIMPLE=m CONFIG_MEDIA_TUNER_TDA8290=m @@ -2925,7 +2988,7 @@ CONFIG_MEDIA_TUNER_XC4000=m CONFIG_MEDIA_TUNER_MC44S803=m # -# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' +# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -2971,10 +3034,7 @@ CONFIG_MEDIA_TUNER_MC44S803=m # # Common Interface (EN50221) controller drivers # - -# -# Tools to develop new frontends -# +# end of Media ancillary drivers # # Graphics support @@ -3060,9 +3120,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set @@ -3334,6 +3396,7 @@ CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set @@ -3410,6 +3473,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -3572,6 +3636,7 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set +# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -3663,9 +3728,12 @@ CONFIG_USB_DWC2_DUAL_ROLE=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_OF=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y @@ -3823,6 +3891,7 @@ CONFIG_LEDS_CLASS_FLASH=m # CONFIG_LEDS_AAT1290 is not set # CONFIG_LEDS_AN30259A is not set # CONFIG_LEDS_AS3645A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set @@ -3864,6 +3933,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_TI_LMU_COMMON is not set +# CONFIG_LEDS_SGM3140 is not set # # LED Triggers @@ -4069,7 +4139,6 @@ CONFIG_VIRTIO_MMIO=y # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=y CONFIG_VHOST_RING=y -CONFIG_VHOST_DPN=y CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set @@ -4193,15 +4262,10 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m CONFIG_CHROME_PLATFORMS=y # CONFIG_CROS_EC is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_COMMON_CLK_VERSATILE is not set -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX77686 is not set # CONFIG_COMMON_CLK_MAX9485 is not set CONFIG_COMMON_CLK_RK808=y @@ -4220,8 +4284,6 @@ CONFIG_COMMON_CLK_XGENE=y CONFIG_COMMON_CLK_PWM=y # CONFIG_COMMON_CLK_VC5 is not set # CONFIG_COMMON_CLK_FIXED_MMIO is not set -# end of Common Clock Framework - CONFIG_HWSPINLOCK=y # @@ -4429,6 +4491,8 @@ CONFIG_IIO=y # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_HI8435 is not set @@ -4441,6 +4505,7 @@ CONFIG_IIO=y # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -4486,6 +4551,7 @@ CONFIG_ROCKCHIP_SARADC=y # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -4614,6 +4680,7 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -4763,8 +4830,10 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -4824,6 +4893,7 @@ CONFIG_GENERIC_PHY=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -4843,7 +4913,6 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5069,6 +5138,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_RAM=y +# CONFIG_PSTORE_BLK is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5168,7 +5238,6 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_BIG_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set @@ -5420,6 +5489,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5427,10 +5497,12 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # CONFIG_INDIRECT_PIO is not set CONFIG_CRC_CCITT=m CONFIG_CRC16=y @@ -5486,6 +5558,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_SWIOTLB=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_REMAP=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_CMA=y @@ -5534,6 +5607,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options @@ -5543,6 +5617,7 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set @@ -5584,6 +5659,8 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set @@ -5593,7 +5670,9 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y @@ -5601,6 +5680,7 @@ CONFIG_DEBUG_MEMORY_INIT=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -5696,8 +5776,6 @@ CONFIG_STRICT_DEVMEM=y # arm64 Debugging # # CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -# CONFIG_DEBUG_WX is not set # CONFIG_ARM64_RELOC_TEST is not set # CONFIG_CORESIGHT is not set # end of arm64 Debugging diff --git a/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf b/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf index f8ee70791f..8da146b90e 100644 --- a/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf @@ -1,13 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.7.2 Kernel Configuration +# Linux/arm64 5.8.0 Kernel Configuration # - +CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -22,12 +23,14 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set @@ -127,7 +130,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -320,12 +322,12 @@ CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_1024718=y CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_VHE=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_NVHE=y CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y CONFIG_ARM64_ERRATUM_1542419=y CONFIG_CAVIUM_ERRATUM_22375=y @@ -333,14 +335,13 @@ CONFIG_CAVIUM_ERRATUM_23154=y CONFIG_CAVIUM_ERRATUM_27456=y CONFIG_CAVIUM_ERRATUM_30115=y CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_QCOM_FALKOR_ERRATUM_1009=y CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y # end of ARM errata workarounds via the alternatives framework CONFIG_ARM64_4K_PAGES=y @@ -433,6 +434,8 @@ CONFIG_ARM64_AMU_EXTN=y # # ARMv8.5 architectural features # +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y CONFIG_ARM64_E0PD=y CONFIG_ARCH_RANDOM=y # end of ARMv8.5 architectural features @@ -440,6 +443,7 @@ CONFIG_ARCH_RANDOM=y CONFIG_ARM64_SVE=y CONFIG_ARM64_MODULE_PLTS=y # CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y @@ -526,7 +530,6 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_SCPI_CPUFREQ=y -# CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # end of CPU Power Management @@ -537,11 +540,12 @@ CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_ARM_SDE_INTERFACE is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y # # Tegra firmware driver @@ -594,7 +598,6 @@ CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -642,6 +645,7 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y # # GCOV-based kernel profiling @@ -683,6 +687,7 @@ CONFIG_BLK_DEV_BSG=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -773,6 +778,9 @@ CONFIG_FREEZER=y # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_SCRIPT=y @@ -1108,6 +1116,7 @@ CONFIG_NF_DEFRAG_IPV6=m CONFIG_STP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set @@ -1132,6 +1141,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set # CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1161,8 +1171,9 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HS is not set # CONFIG_BT_LE is not set CONFIG_BT_LEDS=y -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set # # Bluetooth device drivers @@ -1609,6 +1620,7 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MDIO_GPIO=y # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1630,6 +1642,7 @@ CONFIG_SWPHY=y # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1805,6 +1818,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -1933,9 +1948,7 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -1954,6 +1967,7 @@ CONFIG_INPUT_RK805_PWRKEY=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -2057,6 +2071,7 @@ CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_OPTEE=m +# CONFIG_HW_RANDOM_CCTRNG is not set CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set @@ -2103,8 +2118,8 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_CADENCE is not set # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_EMEV2 is not set CONFIG_I2C_GPIO=m # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set @@ -2161,6 +2176,7 @@ CONFIG_SPI_ROCKCHIP=m # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2207,7 +2223,6 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SINGLE is not set @@ -2216,7 +2231,6 @@ CONFIG_PINCTRL_ROCKCHIP=y CONFIG_PINCTRL_MAX77620=y CONFIG_PINCTRL_RK805=y # CONFIG_PINCTRL_OCELOT is not set -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y @@ -2283,6 +2297,7 @@ CONFIG_GPIO_MAX77620=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set CONFIG_POWER_AVS=y @@ -2307,6 +2322,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2333,6 +2349,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2493,7 +2510,6 @@ CONFIG_DEVFREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set # CONFIG_MAX77620_THERMAL is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_ROCKCHIP_THERMAL=y # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y @@ -2521,6 +2537,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_DW_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2564,8 +2581,10 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2584,6 +2603,7 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2670,6 +2690,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -2696,8 +2717,6 @@ CONFIG_REGULATOR_RK808=y # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set # CONFIG_REGULATOR_VCTRL is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y CONFIG_RC_CORE=y CONFIG_RC_MAP=m CONFIG_LIRC=y @@ -2734,41 +2753,74 @@ CONFIG_IR_SERIAL=m # CONFIG_IR_SERIAL_TRANSMITTER is not set CONFIG_IR_SIR=m CONFIG_RC_XBOX_DVD=m +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +# CONFIG_MEDIA_CEC_RC is not set +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y # CONFIG_MEDIA_RADIO_SUPPORT is not set # CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -CONFIG_MEDIA_CONTROLLER=y -# CONFIG_MEDIA_CONTROLLER_DVB is not set -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +# CONFIG_MEDIA_PLATFORM_SUPPORT is not set +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_V4L2_H264=m CONFIG_V4L2_MEM2MEM_DEV=m CONFIG_V4L2_FLASH_LED_CLASS=m -CONFIG_DVB_CORE=m +# end of Video4Linux options + +# +# Media controller options +# +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set # CONFIG_DVB_NET is not set CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # + +# +# Drivers filtered as selected at 'Filter media drivers' +# CONFIG_MEDIA_USB_SUPPORT=y # @@ -2811,95 +2863,106 @@ CONFIG_MEDIA_USB_SUPPORT=y # Webcam, TV (analog/digital) USB devices # # CONFIG_VIDEO_EM28XX is not set - -# -# USB HDMI CEC adapters -# -CONFIG_USB_PULSE8_CEC=m -CONFIG_USB_RAINSHADOW_CEC=m -# CONFIG_V4L_PLATFORM_DRIVERS is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_ROCKCHIP_RGA=m -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_DVB_PLATFORM_DRIVERS is not set -CONFIG_CEC_PLATFORM_DRIVERS=y - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set -# CONFIG_CYPRESS_FIRMWARE is not set CONFIG_VIDEOBUF2_CORE=m CONFIG_VIDEOBUF2_V4L2=m CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_DMA_CONTIG=m CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_VIDEOBUF2_DMA_SG=m +# end of Media drivers + +CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# Media ancillary drivers # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y -CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# CONFIG_VIDEO_IR_I2C=m # -# I2C drivers hidden by 'Autoselect ancillary drivers' -# - -# -# Audio decoders, processors and mixers -# - -# -# RDS decoders -# - -# -# Video decoders +# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' # # # Video and audio decoders # -# -# Video encoders -# - # # Camera sensor devices # +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set +# CONFIG_VIDEO_OV2640 is not set +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers # +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices # +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices # -# Video improvement chips -# - -# -# Audio/Video compression chips -# - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# - -# -# SPI drivers hidden by 'Autoselect ancillary drivers' +# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -2911,7 +2974,7 @@ CONFIG_VIDEO_IR_I2C=m CONFIG_MEDIA_TUNER=m # -# Tuner drivers hidden by 'Autoselect ancillary drivers' +# Tuner drivers auto-selected by 'Autoselect ancillary drivers' # CONFIG_MEDIA_TUNER_SIMPLE=m CONFIG_MEDIA_TUNER_TDA8290=m @@ -2925,7 +2988,7 @@ CONFIG_MEDIA_TUNER_XC4000=m CONFIG_MEDIA_TUNER_MC44S803=m # -# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' +# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -2971,10 +3034,7 @@ CONFIG_MEDIA_TUNER_MC44S803=m # # Common Interface (EN50221) controller drivers # - -# -# Tools to develop new frontends -# +# end of Media ancillary drivers # # Graphics support @@ -3060,9 +3120,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set @@ -3334,6 +3396,7 @@ CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set @@ -3410,6 +3473,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -3572,6 +3636,7 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set +# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -3663,9 +3728,12 @@ CONFIG_USB_DWC2_DUAL_ROLE=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_OF=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y @@ -3823,6 +3891,7 @@ CONFIG_LEDS_CLASS_FLASH=m # CONFIG_LEDS_AAT1290 is not set # CONFIG_LEDS_AN30259A is not set # CONFIG_LEDS_AS3645A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set @@ -3864,6 +3933,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_TI_LMU_COMMON is not set +# CONFIG_LEDS_SGM3140 is not set # # LED Triggers @@ -4069,7 +4139,6 @@ CONFIG_VIRTIO_MMIO=y # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=y CONFIG_VHOST_RING=y -CONFIG_VHOST_DPN=y CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set @@ -4193,15 +4262,10 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m CONFIG_CHROME_PLATFORMS=y # CONFIG_CROS_EC is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_COMMON_CLK_VERSATILE is not set -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX77686 is not set # CONFIG_COMMON_CLK_MAX9485 is not set CONFIG_COMMON_CLK_RK808=y @@ -4220,8 +4284,6 @@ CONFIG_COMMON_CLK_XGENE=y CONFIG_COMMON_CLK_PWM=y # CONFIG_COMMON_CLK_VC5 is not set # CONFIG_COMMON_CLK_FIXED_MMIO is not set -# end of Common Clock Framework - CONFIG_HWSPINLOCK=y # @@ -4429,6 +4491,8 @@ CONFIG_IIO=y # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_HI8435 is not set @@ -4441,6 +4505,7 @@ CONFIG_IIO=y # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -4486,6 +4551,7 @@ CONFIG_ROCKCHIP_SARADC=y # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -4614,6 +4680,7 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -4763,8 +4830,10 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -4824,6 +4893,7 @@ CONFIG_GENERIC_PHY=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -4843,7 +4913,6 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5069,6 +5138,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_RAM=y +# CONFIG_PSTORE_BLK is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5168,7 +5238,6 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_BIG_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set @@ -5420,6 +5489,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5427,10 +5497,12 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # CONFIG_INDIRECT_PIO is not set CONFIG_CRC_CCITT=m CONFIG_CRC16=y @@ -5486,6 +5558,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_SWIOTLB=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_REMAP=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_CMA=y @@ -5534,6 +5607,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options @@ -5543,6 +5617,7 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set @@ -5584,6 +5659,8 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set @@ -5593,7 +5670,9 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y @@ -5601,6 +5680,7 @@ CONFIG_DEBUG_MEMORY_INIT=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -5696,8 +5776,6 @@ CONFIG_STRICT_DEVMEM=y # arm64 Debugging # # CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -# CONFIG_DEBUG_WX is not set # CONFIG_ARM64_RELOC_TEST is not set # CONFIG_CORESIGHT is not set # end of arm64 Debugging diff --git a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch deleted file mode 100644 index 6c77dc0fa0..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch +++ /dev/null @@ -1,3409 +0,0 @@ -From 6b78e5f6a3f6af03228b5523f58d63435896cfc8 Mon Sep 17 00:00:00 2001 -From: Thomas Zimmermann -Date: Thu, 5 Mar 2020 16:59:40 +0100 -Subject: [PATCH] drm/rockchip: Use simple encoder - -The rockchip driver uses empty implementations for its encoders. Replace -the code with the generic simple encoder. - -Signed-off-by: Thomas Zimmermann -Reviewed-by: Laurent Pinchart -Acked-by: Daniel Vetter -Link: https://patchwork.freedesktop.org/patch/msgid/20200305155950.2705-13-tzimmermann@suse.de -(cherry picked from commit 0dbd735448bfdb078a429d5d63e1bd0ef2c5d0f0) ---- - drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 9 +++------ - drivers/gpu/drm/rockchip/cdn-dp-core.c | 9 +++------ - drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 ++------ - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8 ++------ - drivers/gpu/drm/rockchip/inno_hdmi.c | 8 ++------ - drivers/gpu/drm/rockchip/rk3066_hdmi.c | 8 ++------ - drivers/gpu/drm/rockchip/rockchip_lvds.c | 10 +++------- - drivers/gpu/drm/rockchip/rockchip_rgb.c | 8 ++------ - 8 files changed, 19 insertions(+), 49 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c -index ce98c08aa8b4..ade2327a10e2 100644 ---- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c -+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - - #include "rockchip_drm_drv.h" - #include "rockchip_drm_vop.h" -@@ -258,10 +259,6 @@ static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = { - .atomic_check = rockchip_dp_drm_encoder_atomic_check, - }; - --static struct drm_encoder_funcs rockchip_dp_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static int rockchip_dp_of_probe(struct rockchip_dp_device *dp) - { - struct device *dev = dp->dev; -@@ -309,8 +306,8 @@ static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp) - dev->of_node); - DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); - -- ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs, -- DRM_MODE_ENCODER_TMDS, NULL); -+ ret = drm_simple_encoder_init(drm_dev, encoder, -+ DRM_MODE_ENCODER_TMDS); - if (ret) { - DRM_ERROR("failed to initialize encoder with drm\n"); - return ret; -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c -index eed594bd38d3..06f85138b51b 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - - #include "cdn-dp-core.h" - #include "cdn-dp-reg.h" -@@ -689,10 +690,6 @@ static const struct drm_encoder_helper_funcs cdn_dp_encoder_helper_funcs = { - .atomic_check = cdn_dp_encoder_atomic_check, - }; - --static const struct drm_encoder_funcs cdn_dp_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static int cdn_dp_parse_dt(struct cdn_dp_device *dp) - { - struct device *dev = dp->dev; -@@ -1030,8 +1027,8 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data) - dev->of_node); - DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); - -- ret = drm_encoder_init(drm_dev, encoder, &cdn_dp_encoder_funcs, -- DRM_MODE_ENCODER_TMDS, NULL); -+ ret = drm_simple_encoder_init(drm_dev, encoder, -+ DRM_MODE_ENCODER_TMDS); - if (ret) { - DRM_ERROR("failed to initialize encoder with drm\n"); - return ret; -diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c -index 6e1270e45f97..3feff0c45b3f 100644 ---- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - - #include "rockchip_drm_drv.h" - #include "rockchip_drm_vop.h" -@@ -789,10 +790,6 @@ dw_mipi_dsi_encoder_helper_funcs = { - .disable = dw_mipi_dsi_encoder_disable, - }; - --static const struct drm_encoder_funcs dw_mipi_dsi_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, - struct drm_device *drm_dev) - { -@@ -802,8 +799,7 @@ static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, - dsi->dev->of_node); - -- ret = drm_encoder_init(drm_dev, encoder, &dw_mipi_dsi_encoder_funcs, -- DRM_MODE_ENCODER_DSI, NULL); -+ ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_DSI); - if (ret) { - DRM_ERROR("Failed to initialize encoder with drm\n"); - return ret; -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 7f56d8c3491d..121aa8a63a76 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - #include "rockchip_drm_drv.h" - #include "rockchip_drm_vop.h" -@@ -237,10 +238,6 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, - return (valid) ? MODE_OK : MODE_BAD; - } - --static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder) - { - } -@@ -546,8 +543,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, - } - - drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); -- drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs, -- DRM_MODE_ENCODER_TMDS, NULL); -+ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); - - platform_set_drvdata(pdev, hdmi); - -diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c -index e5864e823020..7afdc54eb3ec 100644 ---- a/drivers/gpu/drm/rockchip/inno_hdmi.c -+++ b/drivers/gpu/drm/rockchip/inno_hdmi.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - - #include "rockchip_drm_drv.h" - #include "rockchip_drm_vop.h" -@@ -532,10 +533,6 @@ static struct drm_encoder_helper_funcs inno_hdmi_encoder_helper_funcs = { - .atomic_check = inno_hdmi_encoder_atomic_check, - }; - --static struct drm_encoder_funcs inno_hdmi_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static enum drm_connector_status - inno_hdmi_connector_detect(struct drm_connector *connector, bool force) - { -@@ -617,8 +614,7 @@ static int inno_hdmi_register(struct drm_device *drm, struct inno_hdmi *hdmi) - return -EPROBE_DEFER; - - drm_encoder_helper_add(encoder, &inno_hdmi_encoder_helper_funcs); -- drm_encoder_init(drm, encoder, &inno_hdmi_encoder_funcs, -- DRM_MODE_ENCODER_TMDS, NULL); -+ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); - - hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; - -diff --git a/drivers/gpu/drm/rockchip/rk3066_hdmi.c b/drivers/gpu/drm/rockchip/rk3066_hdmi.c -index fe203d38664e..1c546c3a8998 100644 ---- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c -+++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c -@@ -6,6 +6,7 @@ - - #include - #include -+#include - - #include - #include -@@ -451,10 +452,6 @@ struct drm_encoder_helper_funcs rk3066_hdmi_encoder_helper_funcs = { - .atomic_check = rk3066_hdmi_encoder_atomic_check, - }; - --static const struct drm_encoder_funcs rk3066_hdmi_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static enum drm_connector_status - rk3066_hdmi_connector_detect(struct drm_connector *connector, bool force) - { -@@ -557,8 +554,7 @@ rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi) - return -EPROBE_DEFER; - - drm_encoder_helper_add(encoder, &rk3066_hdmi_encoder_helper_funcs); -- drm_encoder_init(drm, encoder, &rk3066_hdmi_encoder_funcs, -- DRM_MODE_ENCODER_TMDS, NULL); -+ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); - - hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; - -diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c -index 449a62908d21..63f967902c2d 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_lvds.c -+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c -@@ -16,13 +16,14 @@ - #include - #include - #include -+ - #include - #include -- - #include - #include - #include - #include -+#include - - #include "rockchip_drm_drv.h" - #include "rockchip_drm_vop.h" -@@ -435,10 +436,6 @@ struct drm_encoder_helper_funcs px30_lvds_encoder_helper_funcs = { - .atomic_check = rockchip_lvds_encoder_atomic_check, - }; - --static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - static int rk3288_lvds_probe(struct platform_device *pdev, - struct rockchip_lvds *lvds) - { -@@ -607,8 +604,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master, - encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, - dev->of_node); - -- ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs, -- DRM_MODE_ENCODER_LVDS, NULL); -+ ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_LVDS); - if (ret < 0) { - DRM_DEV_ERROR(drm_dev->dev, - "failed to initialize encoder: %d\n", ret); -diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c -index 90784781e515..9a771af5d0c9 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_rgb.c -+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - #include "rockchip_drm_drv.h" - #include "rockchip_drm_vop.h" -@@ -67,10 +68,6 @@ struct drm_encoder_helper_funcs rockchip_rgb_encoder_helper_funcs = { - .atomic_check = rockchip_rgb_encoder_atomic_check, - }; - --static const struct drm_encoder_funcs rockchip_rgb_encoder_funcs = { -- .destroy = drm_encoder_cleanup, --}; -- - struct rockchip_rgb *rockchip_rgb_init(struct device *dev, - struct drm_crtc *crtc, - struct drm_device *drm_dev) -@@ -126,8 +123,7 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, - encoder = &rgb->encoder; - encoder->possible_crtcs = drm_crtc_mask(crtc); - -- ret = drm_encoder_init(drm_dev, encoder, &rockchip_rgb_encoder_funcs, -- DRM_MODE_ENCODER_NONE, NULL); -+ ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_NONE); - if (ret < 0) { - DRM_DEV_ERROR(drm_dev->dev, - "failed to initialize encoder: %d\n", ret); - -From 6fd7de812d8d4f76b2c05cea1dc2c6159c62d473 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 16:22:34 +0200 -Subject: [PATCH] dt-bindings: display: convert rockchip vop bindings to yaml - -Current dts files with 'vop' nodes are manually verified. -In order to automate this process rockchip-vop.txt -has to be converted to yaml. - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Signed-off-by: Sam Ravnborg -Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-1-jbx6244@gmail.com -(cherry picked from commit 4e78ba278722480fa1fa933caa6ff24a53b441c8) ---- - .../bindings/display/rockchip/rockchip-vop.txt | 74 ------------- - .../bindings/display/rockchip/rockchip-vop.yaml | 123 +++++++++++++++++++++ - 2 files changed, 123 insertions(+), 74 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt - create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt -deleted file mode 100644 -index 8b3a5f514205..000000000000 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt -+++ /dev/null -@@ -1,74 +0,0 @@ --device-tree bindings for rockchip soc display controller (vop) -- --VOP (Visual Output Processor) is the Display Controller for the Rockchip --series of SoCs which transfers the image data from a video memory --buffer to an external LCD interface. -- --Required properties: --- compatible: value should be one of the following -- "rockchip,rk3036-vop"; -- "rockchip,rk3126-vop"; -- "rockchip,px30-vop-lit"; -- "rockchip,px30-vop-big"; -- "rockchip,rk3066-vop"; -- "rockchip,rk3188-vop"; -- "rockchip,rk3288-vop"; -- "rockchip,rk3368-vop"; -- "rockchip,rk3366-vop"; -- "rockchip,rk3399-vop-big"; -- "rockchip,rk3399-vop-lit"; -- "rockchip,rk3228-vop"; -- "rockchip,rk3328-vop"; -- --- reg: Must contain one entry corresponding to the base address and length -- of the register space. Can optionally contain a second entry -- corresponding to the CRTC gamma LUT address. -- --- interrupts: should contain a list of all VOP IP block interrupts in the -- order: VSYNC, LCD_SYSTEM. The interrupt specifier -- format depends on the interrupt controller used. -- --- clocks: must include clock specifiers corresponding to entries in the -- clock-names property. -- --- clock-names: Must contain -- aclk_vop: for ddr buffer transfer. -- hclk_vop: for ahb bus to R/W the phy regs. -- dclk_vop: pixel clock. -- --- resets: Must contain an entry for each entry in reset-names. -- See ../reset/reset.txt for details. --- reset-names: Must include the following entries: -- - axi -- - ahb -- - dclk -- --- iommus: required a iommu node -- --- port: A port node with endpoint definitions as defined in -- Documentation/devicetree/bindings/media/video-interfaces.txt. -- --Example: --SoC specific DT entry: -- vopb: vopb@ff930000 { -- compatible = "rockchip,rk3288-vop"; -- reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>; -- interrupts = ; -- clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; -- clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; -- resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; -- reset-names = "axi", "ahb", "dclk"; -- iommus = <&vopb_mmu>; -- vopb_out: port { -- #address-cells = <1>; -- #size-cells = <0>; -- vopb_out_edp: endpoint@0 { -- reg = <0>; -- remote-endpoint=<&edp_in_vopb>; -- }; -- vopb_out_hdmi: endpoint@1 { -- reg = <1>; -- remote-endpoint=<&hdmi_in_vopb>; -- }; -- }; -- }; -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -new file mode 100644 -index 000000000000..42ee2b5c31e1 ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -@@ -0,0 +1,123 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip SoC display controller (VOP) -+ -+description: -+ VOP (Video Output Processor) is the display controller for the Rockchip -+ series of SoCs which transfers the image data from a video memory -+ buffer to an external LCD interface. -+ -+maintainers: -+ - Sandy Huang -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ enum: -+ - rockchip,px30-vop-big -+ - rockchip,px30-vop-lit -+ - rockchip,rk3036-vop -+ - rockchip,rk3066-vop -+ - rockchip,rk3126-vop -+ - rockchip,rk3188-vop -+ - rockchip,rk3228-vop -+ - rockchip,rk3288-vop -+ - rockchip,rk3328-vop -+ - rockchip,rk3366-vop -+ - rockchip,rk3368-vop -+ - rockchip,rk3399-vop-big -+ - rockchip,rk3399-vop-lit -+ -+ reg: -+ minItems: 1 -+ items: -+ - description: -+ Must contain one entry corresponding to the base address and length -+ of the register space. -+ - description: -+ Can optionally contain a second entry corresponding to -+ the CRTC gamma LUT address. -+ -+ interrupts: -+ maxItems: 1 -+ description: -+ The VOP interrupt is shared by several interrupt sources, such as -+ frame start (VSYNC), line flag and other status interrupts. -+ -+ clocks: -+ items: -+ - description: Clock for ddr buffer transfer. -+ - description: Pixel clock. -+ - description: Clock for the ahb bus to R/W the phy regs. -+ -+ clock-names: -+ items: -+ - const: aclk_vop -+ - const: dclk_vop -+ - const: hclk_vop -+ -+ resets: -+ maxItems: 3 -+ -+ reset-names: -+ items: -+ - const: axi -+ - const: ahb -+ - const: dclk -+ -+ port: -+ type: object -+ description: -+ A port node with endpoint definitions as defined in -+ Documentation/devicetree/bindings/media/video-interfaces.txt. -+ -+ iommus: -+ maxItems: 1 -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - resets -+ - reset-names -+ - port -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ vopb: vopb@ff930000 { -+ compatible = "rockchip,rk3288-vop"; -+ reg = <0x0 0xff930000 0x0 0x19c>, -+ <0x0 0xff931000 0x0 0x1000>; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP0>, -+ <&cru DCLK_VOP0>, -+ <&cru HCLK_VOP0>; -+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; -+ resets = <&cru SRST_LCDC1_AXI>, -+ <&cru SRST_LCDC1_AHB>, -+ <&cru SRST_LCDC1_DCLK>; -+ reset-names = "axi", "ahb", "dclk"; -+ iommus = <&vopb_mmu>; -+ vopb_out: port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ vopb_out_edp: endpoint@0 { -+ reg = <0>; -+ remote-endpoint=<&edp_in_vopb>; -+ }; -+ vopb_out_hdmi: endpoint@1 { -+ reg = <1>; -+ remote-endpoint=<&hdmi_in_vopb>; -+ }; -+ }; -+ }; - -From be1bed307943cb2d6b871ab8cf938c26b5db62b7 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 16:22:35 +0200 -Subject: [PATCH] dt-bindings: display: rockchip-vop: add additional properties - -In the old txt situation we add/describe only properties that are used -by the driver/hardware itself. With yaml it also filters things in a -node that are used by other drivers like 'assigned-clocks' and -'assigned-clock-rates' for rk3399 and 'power-domains' for most -Rockchip Socs in 'vop' nodes, so add them to 'rockchip-vop.yaml'. - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Signed-off-by: Sam Ravnborg -Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-2-jbx6244@gmail.com -(cherry picked from commit 0706cd0f94d4d8dd71fad7f70dcbf19d514391ef) ---- - .../devicetree/bindings/display/rockchip/rockchip-vop.yaml | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -index 42ee2b5c31e1..1695e3e4bcec 100644 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -@@ -75,9 +75,18 @@ properties: - A port node with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - -+ assigned-clocks: -+ maxItems: 2 -+ -+ assigned-clock-rates: -+ maxItems: 2 -+ - iommus: - maxItems: 1 - -+ power-domains: -+ maxItems: 1 -+ - required: - - compatible - - reg -@@ -94,6 +103,7 @@ examples: - - | - #include - #include -+ #include - vopb: vopb@ff930000 { - compatible = "rockchip,rk3288-vop"; - reg = <0x0 0xff930000 0x0 0x19c>, -@@ -103,6 +113,7 @@ examples: - <&cru DCLK_VOP0>, - <&cru HCLK_VOP0>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; -+ power-domains = <&power RK3288_PD_VIO>; - resets = <&cru SRST_LCDC1_AXI>, - <&cru SRST_LCDC1_AHB>, - <&cru SRST_LCDC1_DCLK>; - -From f272b063e0038cfea7c0ef695b5058e1cfef39df Mon Sep 17 00:00:00 2001 -From: Geert Uytterhoeven -Date: Wed, 12 Feb 2020 11:08:27 +0100 -Subject: [PATCH] ARM: rockchip: Replace by - - -The Rockchip platform code is not a clock provider, and just needs to -call of_clk_init(). - -Hence it can include instead of . - -Signed-off-by: Geert Uytterhoeven -Reviewed-by: Stephen Boyd -Link: https://lore.kernel.org/r/20200212100830.446-5-geert+renesas@glider.be -Signed-off-by: Heiko Stuebner -(cherry picked from commit 37aed36cfec3b35469be3dc5fb52c8a459414cff) ---- - arch/arm/mach-rockchip/rockchip.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c -index f9797a2b5d0d..beea4564eed4 100644 ---- a/arch/arm/mach-rockchip/rockchip.c -+++ b/arch/arm/mach-rockchip/rockchip.c -@@ -9,9 +9,9 @@ - #include - #include - #include -+#include - #include - #include --#include - #include - #include - #include - -From 2c6d20227da1c80097cd28c0bb7b6c1eb5b7d184 Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Thu, 23 Jan 2020 00:48:07 +0000 -Subject: [PATCH] ARM: rockchip: fix spelling mistake "to" -> "too" - -There is a spelling mistake in a pr_err message. Fix it. - -Signed-off-by: Colin Ian King -Link: https://lore.kernel.org/r/20200123004807.2833556-1-colin.king@canonical.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 0b973c65d2f2da049252bc8370e4cf037b99c7e9) ---- - arch/arm/mach-rockchip/platsmp.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c -index 649e0a54784c..d60856898d97 100644 ---- a/arch/arm/mach-rockchip/platsmp.c -+++ b/arch/arm/mach-rockchip/platsmp.c -@@ -180,7 +180,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node) - - rsize = resource_size(&res); - if (rsize < trampoline_sz) { -- pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n", -+ pr_err("%s: reserved block with size 0x%x is too small for trampoline size 0x%x\n", - __func__, rsize, trampoline_sz); - return -EINVAL; - } - -From 4da52ea9970395cc4fd12e22cdde5cad0908a8b6 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 15:36:30 +0200 -Subject: [PATCH] dt-bindings: display: convert rockchip rk3066 hdmi bindings - to yaml - -Current dts files with 'hdmi' nodes for rk3066 are manually verified. -In order to automate this process rockchip,rk3066-hdmi.txt -has to be converted to yaml. - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200403133630.7377-1-jbx6244@gmail.com -(cherry picked from commit 8eea6e26fc2eda6922e5008ccb7f55bc1775d5b3) ---- - .../display/rockchip/rockchip,rk3066-hdmi.txt | 72 ----------- - .../display/rockchip/rockchip,rk3066-hdmi.yaml | 140 +++++++++++++++++++++ - 2 files changed, 140 insertions(+), 72 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt - create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt -deleted file mode 100644 -index d1ad31bca8d9..000000000000 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt -+++ /dev/null -@@ -1,72 +0,0 @@ --Rockchip specific extensions for rk3066 HDMI --============================================ -- --Required properties: --- compatible: -- "rockchip,rk3066-hdmi"; --- reg: -- Physical base address and length of the controller's registers. --- clocks, clock-names: -- Phandle to HDMI controller clock, name should be "hclk". --- interrupts: -- HDMI interrupt number. --- power-domains: -- Phandle to the RK3066_PD_VIO power domain. --- rockchip,grf: -- This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. --- ports: -- Contains one port node with two endpoints, numbered 0 and 1, -- connected respectively to vop0 and vop1. -- Contains one port node with one endpoint -- connected to a hdmi-connector node. --- pinctrl-0, pinctrl-name: -- Switch the iomux for the HPD/I2C pins to HDMI function. -- --Example: -- hdmi: hdmi@10116000 { -- compatible = "rockchip,rk3066-hdmi"; -- reg = <0x10116000 0x2000>; -- interrupts = ; -- clocks = <&cru HCLK_HDMI>; -- clock-names = "hclk"; -- power-domains = <&power RK3066_PD_VIO>; -- rockchip,grf = <&grf>; -- pinctrl-names = "default"; -- pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; -- -- ports { -- #address-cells = <1>; -- #size-cells = <0>; -- hdmi_in: port@0 { -- reg = <0>; -- #address-cells = <1>; -- #size-cells = <0>; -- hdmi_in_vop0: endpoint@0 { -- reg = <0>; -- remote-endpoint = <&vop0_out_hdmi>; -- }; -- hdmi_in_vop1: endpoint@1 { -- reg = <1>; -- remote-endpoint = <&vop1_out_hdmi>; -- }; -- }; -- hdmi_out: port@1 { -- reg = <1>; -- hdmi_out_con: endpoint { -- remote-endpoint = <&hdmi_con_in>; -- }; -- }; -- }; -- }; -- --&pinctrl { -- hdmi { -- hdmi_hpd: hdmi-hpd { -- rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; -- }; -- hdmii2c_xfer: hdmii2c-xfer { -- rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, -- <0 RK_PA2 1 &pcfg_pull_none>; -- }; -- }; --}; -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml -new file mode 100644 -index 000000000000..4110d003ce1f ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml -@@ -0,0 +1,140 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip rk3066 HDMI controller -+ -+maintainers: -+ - Sandy Huang -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ const: rockchip,rk3066-hdmi -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ maxItems: 1 -+ -+ clocks: -+ maxItems: 1 -+ -+ clock-names: -+ const: hclk -+ -+ pinctrl-0: -+ maxItems: 2 -+ -+ pinctrl-names: -+ const: default -+ description: -+ Switch the iomux for the HPD/I2C pins to HDMI function. -+ -+ power-domains: -+ maxItems: 1 -+ -+ rockchip,grf: -+ $ref: /schemas/types.yaml#/definitions/phandle -+ description: -+ This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. -+ -+ ports: -+ type: object -+ -+ properties: -+ "#address-cells": -+ const: 1 -+ -+ "#size-cells": -+ const: 0 -+ -+ port@0: -+ type: object -+ description: -+ Port node with two endpoints, numbered 0 and 1, -+ connected respectively to vop0 and vop1. -+ -+ port@1: -+ type: object -+ description: -+ Port node with one endpoint connected to a hdmi-connector node. -+ -+ required: -+ - "#address-cells" -+ - "#size-cells" -+ - port@0 -+ - port@1 -+ -+ additionalProperties: false -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - pinctrl-0 -+ - pinctrl-names -+ - power-domains -+ - rockchip,grf -+ - ports -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ #include -+ #include -+ hdmi: hdmi@10116000 { -+ compatible = "rockchip,rk3066-hdmi"; -+ reg = <0x10116000 0x2000>; -+ interrupts = ; -+ clocks = <&cru HCLK_HDMI>; -+ clock-names = "hclk"; -+ pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; -+ pinctrl-names = "default"; -+ power-domains = <&power RK3066_PD_VIO>; -+ rockchip,grf = <&grf>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ hdmi_in: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ hdmi_in_vop0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&vop0_out_hdmi>; -+ }; -+ hdmi_in_vop1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&vop1_out_hdmi>; -+ }; -+ }; -+ hdmi_out: port@1 { -+ reg = <1>; -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+ }; -+ }; -+ }; -+ -+ pinctrl { -+ hdmi { -+ hdmi_hpd: hdmi-hpd { -+ rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; -+ }; -+ hdmii2c_xfer: hdmii2c-xfer { -+ rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, -+ <0 RK_PA2 1 &pcfg_pull_none>; -+ }; -+ }; -+ }; - -From 1d8b864057e02861a494d9c18a12328d8bea7239 Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Thu, 16 Apr 2020 16:55:34 +0200 -Subject: [PATCH] arm64: dts: rockchip: add micro SD card regulator to - rockpro64 - -This patch adds the RockPro64's micro SD card regulator to the -RockPro64 dtsi. The regulator is present on all revisions of the -device. -Previously the regular was missing, resulting in unreliable boot -behaviour when booting from SD card. - -Signed-off-by: Tobias Schramm -Link: https://lore.kernel.org/r/20200416145534.1263575-1-t.schramm@manjaro.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 1f5a3e1679353fb53e955afd8801a7f4f60877ff) ---- - arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 27 ++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -index 9bca25801260..6788ab28f89a 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -@@ -96,6 +96,24 @@ - vin-supply = <&vcc_1v8>; - }; - -+ /* micro SD card power */ -+ vcc3v0_sd: vcc3v0-sd { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0_pwr_h>; -+ regulator-name = "vcc3v0_sd"; -+ regulator-always-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ vin-supply = <&vcc3v3_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; -@@ -603,6 +621,13 @@ - }; - }; - -+ sdcard { -+ sdmmc0_pwr_h: sdmmc0-pwr-h { -+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ }; -+ - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -@@ -661,6 +686,8 @@ - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; -+ vmmc-supply = <&vcc3v0_sd>; -+ vqmmc-supply = <&vcc_sdio>; - status = "okay"; - }; - - -From fdf2fafc9d59f980955fb1c26cd7358a5aaa27a0 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Wed, 15 Apr 2020 15:10:57 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove bus-width from mmc nodes in - rk3308-roc-cc - -The 'bus-width' property for mmc nodes is defined both in -'rk3308.dtsi' and 'rk3308-roc-cc.dts'. -'bus-width' and pinctrl containing the bus-pins -should be in the same file, so remove all entries -from mmc nodes in 'rk3308-roc-cc.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200415131057.2366-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 051083dddf07a4472bc1720d5c2b1909e0865890) ---- - arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -index aa256350b18f..8011e9b12347 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -@@ -123,7 +123,6 @@ - }; - - &emmc { -- bus-width = <8>; - cap-mmc-highspeed; - disable-wp; - mmc-hs200-1_8v; -@@ -171,7 +170,6 @@ - }; - - &sdmmc { -- bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <300>; - -From a98b1173f1af7cdf913383e7e0287475b9933a2d Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 14 Apr 2020 10:29:36 +0200 -Subject: [PATCH] arm64: dts: rockchip: add core devicetree for rk3326 - -The rk3326 is basically a px30 without the second display controller. -So add a dtsi based on that, that just removes the affected nodes. - -Signed-off-by: Heiko Stuebner -Link: https://lore.kernel.org/r/20200414082938.2977572-1-heiko@sntech.de -Signed-off-by: Heiko Stuebner -(cherry picked from commit df07f7df7e5a61d06b21f89c4ab744fb4e4c2222) ---- - arch/arm64/boot/dts/rockchip/rk3326.dtsi | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3326.dtsi - -diff --git a/arch/arm64/boot/dts/rockchip/rk3326.dtsi b/arch/arm64/boot/dts/rockchip/rk3326.dtsi -new file mode 100644 -index 000000000000..2ba6da125137 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3326.dtsi -@@ -0,0 +1,15 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd -+ */ -+ -+#include "px30.dtsi" -+ -+&display_subsystem { -+ ports = <&vopb_out>; -+}; -+ -+/delete-node/ &dsi_in_vopl; -+/delete-node/ &lvds_vopl_in; -+/delete-node/ &vopl; -+/delete-node/ &vopl_mmu; - -From 2b1d742b479da9dc96ccf21e92e474c99c930aa3 Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 14 Apr 2020 10:29:37 +0200 -Subject: [PATCH] dt-bindings: Add binding for Hardkernel Odroid Go Advance - -Add a compatible for the Odroid Go Advance from Hardkernel. -The compatible used by the vendor already is odroid-go2, to distinguish -it from the previous (microcontroller-based) Odroid Go, so we're keeping -that, also to not cause unnecessary incompatibilites. - -Signed-off-by: Heiko Stuebner -Acked-by: Rob Herring -Link: https://lore.kernel.org/r/20200414082938.2977572-2-heiko@sntech.de -Signed-off-by: Heiko Stuebner -(cherry picked from commit 98412e1e57ea776b4581077a68fe6ed598bfba99) ---- - Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml -index 715586dea9bb..d4a4045092df 100644 ---- a/Documentation/devicetree/bindings/arm/rockchip.yaml -+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml -@@ -358,6 +358,11 @@ properties: - - const: haoyu,marsboard-rk3066 - - const: rockchip,rk3066a - -+ - description: Hardkernel Odroid Go Advance -+ items: -+ - const: hardkernel,rk3326-odroid-go2 -+ - const: rockchip,rk3326 -+ - - description: Hugsun X99 TV Box - items: - - const: hugsun,x99 - -From 9ef671f45e7d27b711a82178e0fa11455428fd3c Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 14 Apr 2020 10:29:38 +0200 -Subject: [PATCH] arm64: dts: rockchip: add Odroid Advance Go - -The Odroid Advance Go is a handheld based on Rockchip's rk3326 soc -with a DSI display and some handheld controls including an analog -joystick connected to the saradc. - -Signed-off-by: Heiko Stuebner -Link: https://lore.kernel.org/r/20200414082938.2977572-3-heiko@sntech.de -Signed-off-by: Heiko Stuebner -(cherry picked from commit ce33988fb69828dfcb5825f9086d9dc2b37a9282) ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 560 +++++++++++++++++++++ - 2 files changed, 561 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts - -diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile -index ae7621309e92..b87b1f773083 100644 ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -2,6 +2,7 @@ - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb -diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -new file mode 100644 -index 000000000000..cf20aac5f2fe ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -@@ -0,0 +1,560 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 Hardkernel Co., Ltd -+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH -+ */ -+ -+/dts-v1/; -+#include -+#include -+#include -+#include "rk3326.dtsi" -+ -+/ { -+ model = "ODROID-GO Advance"; -+ compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; -+ -+ chosen { -+ stdout-path = "serial2:115200n8"; -+ }; -+ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ power-supply = <&vcc_bl>; -+ pwms = <&pwm1 0 25000 0>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&btn_pins>; -+ -+ /* -+ * *** ODROIDGO2-Advance Switch layout *** -+ * |------------------------------------------------| -+ * | sw15 sw16 | -+ * |------------------------------------------------| -+ * | sw1 |-------------------| sw8 | -+ * | sw3 sw4 | | sw7 sw5 | -+ * | sw2 | LCD Display | sw6 | -+ * | | | | -+ * | |-------------------| | -+ * | sw9 sw10 sw11 sw12 sw13 sw14 | -+ * |------------------------------------------------| -+ */ -+ -+ sw1 { -+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; -+ label = "DPAD-UP"; -+ linux,code = ; -+ }; -+ sw2 { -+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; -+ label = "DPAD-DOWN"; -+ linux,code = ; -+ }; -+ sw3 { -+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; -+ label = "DPAD-LEFT"; -+ linux,code = ; -+ }; -+ sw4 { -+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; -+ label = "DPAD-RIGHT"; -+ linux,code = ; -+ }; -+ sw5 { -+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; -+ label = "BTN-A"; -+ linux,code = ; -+ }; -+ sw6 { -+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "BTN-B"; -+ linux,code = ; -+ }; -+ sw7 { -+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; -+ label = "BTN-Y"; -+ linux,code = ; -+ }; -+ sw8 { -+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; -+ label = "BTN-X"; -+ linux,code = ; -+ }; -+ sw9 { -+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; -+ label = "F1"; -+ linux,code = ; -+ }; -+ sw10 { -+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; -+ label = "F2"; -+ linux,code = ; -+ }; -+ sw11 { -+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; -+ label = "F3"; -+ linux,code = ; -+ }; -+ sw12 { -+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; -+ label = "F4"; -+ linux,code = ; -+ }; -+ sw13 { -+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; -+ label = "F5"; -+ linux,code = ; -+ }; -+ sw14 { -+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "F6"; -+ linux,code = ; -+ }; -+ sw15 { -+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; -+ label = "TOP-LEFT"; -+ linux,code = ; -+ }; -+ sw16 { -+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; -+ label = "TOP-RIGHT"; -+ linux,code = ; -+ }; -+ }; -+ -+ leds: gpio-leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "led_pins"; -+ pinctrl-0 = <&led_pins>; -+ -+ led-0 { -+ label = "blue:heartbeat"; -+ gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ vccsys: vccsys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v8_sys"; -+ regulator-always-on; -+ regulator-min-microvolt = <3800000>; -+ regulator-max-microvolt = <3800000>; -+ }; -+ -+ vcc_host: vcc_host { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_host"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ -+ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ regulator-always-on; -+ vin-supply = <&vccsys>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cru { -+ assigned-clocks = <&cru PLL_NPLL>, -+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, -+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, -+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, -+ <&cru PLL_CPLL>; -+ -+ assigned-clock-rates = <1188000000>, -+ <200000000>, <200000000>, -+ <150000000>, <150000000>, -+ <100000000>, <200000000>, -+ <17000000>; -+}; -+ -+&display_subsystem { -+ status = "okay"; -+}; -+ -+&dsi { -+ status = "okay"; -+ -+ ports { -+ mipi_out: port@1 { -+ reg = <1>; -+ -+ mipi_out_panel: endpoint { -+ remote-endpoint = <&mipi_in_panel>; -+ }; -+ }; -+ }; -+ -+ panel@0 { -+ compatible = "elida,kd35t133"; -+ reg = <0>; -+ backlight = <&backlight>; -+ iovcc-supply = <&vcc_lcd>; -+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; -+ vdd-supply = <&vcc_lcd>; -+ -+ port { -+ mipi_in_panel: endpoint { -+ remote-endpoint = <&mipi_out_panel>; -+ }; -+ }; -+ }; -+}; -+ -+&dsi_dphy { -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <&vdd_logic>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-falling-time-ns = <16>; -+ i2c-scl-rising-time-ns = <280>; -+ status = "okay"; -+ -+ rk817: pmic@20 { -+ compatible = "rockchip,rk817"; -+ reg = <0x20>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ #clock-cells = <1>; -+ clock-output-names = "rk808-clkout1", "xin32k"; -+ -+ vcc1-supply = <&vccsys>; -+ vcc2-supply = <&vccsys>; -+ vcc3-supply = <&vccsys>; -+ vcc4-supply = <&vccsys>; -+ vcc5-supply = <&vccsys>; -+ vcc6-supply = <&vccsys>; -+ vcc7-supply = <&vccsys>; -+ -+ regulators { -+ vdd_logic: DCDC_REG1 { -+ regulator-name = "vdd_logic"; -+ regulator-min-microvolt = <950000>; -+ regulator-max-microvolt = <1150000>; -+ regulator-ramp-delay = <6001>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vdd_arm: DCDC_REG2 { -+ regulator-name = "vdd_arm"; -+ regulator-min-microvolt = <950000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_3v3: DCDC_REG4 { -+ regulator-name = "vcc_3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_1v8: LDO_REG2 { -+ regulator-name = "vcc_1v8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_1v0: LDO_REG3 { -+ regulator-name = "vdd_1v0"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc3v3_pmu: LDO_REG4 { -+ regulator-name = "vcc3v3_pmu"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-name = "vccio_sd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_sd: LDO_REG6 { -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_bl: LDO_REG7 { -+ regulator-name = "vcc_bl"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_lcd: LDO_REG8 { -+ regulator-name = "vcc_lcd"; -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <2800000>; -+ }; -+ }; -+ -+ vcc_cam: LDO_REG9 { -+ regulator-name = "vcc_cam"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ -+&i2c1 { -+ clock-frequency = <400000>; -+ status = "okay"; -+}; -+ -+/* I2S 1 Channel Used */ -+&i2s1_2ch { -+ status = "okay"; -+}; -+ -+&io_domains { -+ vccio1-supply = <&vcc_3v3>; -+ vccio2-supply = <&vccio_sd>; -+ vccio3-supply = <&vcc_3v3>; -+ vccio4-supply = <&vcc_3v3>; -+ vccio5-supply = <&vcc_3v3>; -+ vccio6-supply = <&vcc_3v3>; -+ status = "okay"; -+}; -+ -+&pmu_io_domains { -+ pmuio1-supply = <&vcc3v3_pmu>; -+ pmuio2-supply = <&vcc3v3_pmu>; -+ status = "okay"; -+}; -+ -+&pwm1 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ card-detect-delay = <200>; -+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc_sd>; -+ vqmmc-supply = <&vccio_sd>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ status = "okay"; -+}; -+ -+&u2phy { -+ status = "okay"; -+ -+ u2phy_host: host-port { -+ status = "okay"; -+ }; -+ -+ u2phy_otg: otg-port { -+ status = "disabled"; -+ }; -+}; -+ -+&usb20_otg { -+ status = "okay"; -+}; -+ -+/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_xfer &uart1_cts>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2m1_xfer>; -+ status = "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&pinctrl { -+ btns { -+ btn_pins: btn-pins { -+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ headphone { -+ hp_det: hp-det { -+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ leds { -+ led_pins: led-pins { -+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ dc_det: dc-det { -+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pmic_int: pmic-int { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ soc_slppin_gpio: soc_slppin_gpio { -+ rockchip,pins = -+ <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; -+ }; -+ -+ soc_slppin_rst: soc_slppin_rst { -+ rockchip,pins = -+ <0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>; -+ }; -+ -+ soc_slppin_slp: soc_slppin_slp { -+ rockchip,pins = -+ <0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>; -+ }; -+ }; -+}; - -From 77b50f8cb30ce28b97f98134d6d60ed1021b398a Mon Sep 17 00:00:00 2001 -From: Enric Balletbo i Serra -Date: Sun, 26 Apr 2020 18:16:53 +0200 -Subject: [PATCH] drm/rockchip: cdn-dp-core: Make cdn_dp_core_suspend/resume - static -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes the following warning detected when running make with W=1 - - drivers/gpu/drm/rockchip//cdn-dp-core.c:1112:5: warning: no previous - prototype for ‘cdn_dp_suspend’ [-Wmissing-prototypes] - - drivers/gpu/drm/rockchip//cdn-dp-core.c:1126:5: warning: no previous - prototype for ‘cdn_dp_resume’ [-Wmissing-prototypes] - -Signed-off-by: Enric Balletbo i Serra -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200426161653.7710-1-enric.balletbo@collabora.com -(cherry picked from commit 7c49abb4c2f8853520abc05b7f7e8b751fbb3086) ---- - drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c -index 06f85138b51b..c634b95b50f7 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c -@@ -1106,7 +1106,7 @@ static const struct component_ops cdn_dp_component_ops = { - .unbind = cdn_dp_unbind, - }; - --int cdn_dp_suspend(struct device *dev) -+static int cdn_dp_suspend(struct device *dev) - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); - int ret = 0; -@@ -1120,7 +1120,7 @@ int cdn_dp_suspend(struct device *dev) - return ret; - } - --int cdn_dp_resume(struct device *dev) -+static int cdn_dp_resume(struct device *dev) - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); - - -From 6a83f833666332ecafaf69e5b74fece84b91acd2 Mon Sep 17 00:00:00 2001 -From: Zheng Bin -Date: Fri, 24 Apr 2020 15:44:10 +0800 -Subject: [PATCH] drm/rockchip: Remove unneeded semicolon - -Fixes coccicheck warning: - -drivers/gpu/drm/rockchip/cdn-dp-reg.c:604:2-3: Unneeded semicolon -drivers/gpu/drm/rockchip/cdn-dp-reg.c:622:2-3: Unneeded semicolon -drivers/gpu/drm/rockchip/cdn-dp-reg.c:703:2-3: Unneeded semicolon - -Reported-by: Hulk Robot -Signed-off-by: Zheng Bin -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200424074410.1070-1-zhengbin13@huawei.com -(cherry picked from commit 611e22b1d9f61a8742c99433de9ff40795574c61) ---- - drivers/gpu/drm/rockchip/cdn-dp-reg.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c -index 7361c07cb4a7..9d2163ef4d6e 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c -@@ -601,7 +601,7 @@ static int cdn_dp_get_msa_misc(struct video_info *video, - case YCBCR_4_2_0: - val[0] = 5; - break; -- }; -+ } - - switch (video->color_depth) { - case 6: -@@ -619,7 +619,7 @@ static int cdn_dp_get_msa_misc(struct video_info *video, - case 16: - val[1] = 4; - break; -- }; -+ } - - msa_misc = 2 * val[0] + 32 * val[1] + - ((video->color_fmt == Y_ONLY) ? (1 << 14) : 0); -@@ -700,7 +700,7 @@ int cdn_dp_config_video(struct cdn_dp_device *dp) - case 16: - val = BCS_16; - break; -- }; -+ } - - val += video->color_fmt << 8; - ret = cdn_dp_reg_write(dp, DP_FRAMER_PXL_REPR, val); - -From 097d9346541d9f2e4639e65a70d8a68fd8be1986 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 24 Apr 2020 17:55:59 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node - of rk3399-pinebook-pro.dts - -The '#sound-dai-cells' property is already defined in rk3399.dtsi -at the 'i2s1' node, so remove it from the '&i2s1' node in -'rk3399-pinebook-pro.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200424155600.24254-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit e565dd298c6bc9f53f0b07d96b019e000777c1fe) ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index c49982dfd8fc..d44c73521218 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -744,7 +744,6 @@ - }; - - &i2s1 { -- #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; - rockchip,capture-channels = <8>; - -From 41878dbb1271eb73d952575f29f7095e08750196 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 24 Apr 2020 17:56:00 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove #sound-dai-cells from &spdif - node of rk3399-hugsun-x99.dts - -The '#sound-dai-cells' property is already defined in rk3399.dtsi -at the 'spdif' node, so remove it from the '&spdif' node in -'rk3399-hugsun-x99.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200424155600.24254-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit de70083cbaabb86c282f421b070b041236ba6f4b) ---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index aee484a05181..4b4a38e59283 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -633,7 +633,6 @@ - &spdif { - status = "okay"; - pinctrl-0 = <&spdif_bus_1>; -- #sound-dai-cells = <0>; - }; - - &spi1 { - -From 1af0d8e117e762c29ffb9a0d02b6e77aeff3165c Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 3 Apr 2020 19:13:45 -0300 -Subject: [PATCH] arm64: dts: rockchip: Define the rockchip Video Decoder node - on rk3399 - -RK3399 has a Video decoder, define the node in the dtsi. We also add -the missing power-domain in mmu node and enable the block. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Link: https://lore.kernel.org/r/20200403221345.16702-6-ezequiel@collabora.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit cbd7214402ecf7ecc59e21862ea3c901be48e831) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 +++++++++++++- - 1 file changed, 13 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 1448f358ed0a..de53f145c4fa 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1269,6 +1269,18 @@ - power-domains = <&power RK3399_PD_VCODEC>; - }; - -+ vdec: video-codec@ff660000 { -+ compatible = "rockchip,rk3399-vdec"; -+ reg = <0x0 0xff660000 0x0 0x400>; -+ interrupts = ; -+ interrupt-names = "vdpu"; -+ clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, -+ <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; -+ clock-names = "axi", "ahb", "cabac", "core"; -+ iommus = <&vdec_mmu>; -+ power-domains = <&power RK3399_PD_VDU>; -+ }; -+ - vdec_mmu: iommu@ff660480 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; -@@ -1276,8 +1288,8 @@ - interrupt-names = "vdec_mmu"; - clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; - clock-names = "aclk", "iface"; -+ power-domains = <&power RK3399_PD_VDU>; - #iommu-cells = <0>; -- status = "disabled"; - }; - - iep_mmu: iommu@ff670800 { - -From e51cf454395eb45f7277fc33bbc6d07268281bca Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 25 Apr 2020 17:40:37 +0200 -Subject: [PATCH] dt-bindings: gpu: add power-domains #cooling-cells to - arm,mali-bifrost.yaml - -A test with the command below gives this error: - -arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: gpu@ff400000: -'#cooling-cells', 'power-domains' -do not match any of the regexes: 'pinctrl-[0-9]+' - -With the conversion to yaml it also filters things -in a node that are used by other drivers like -'#cooling-cells' and 'power-domains' -for Rockchip px30 gpu nodes, -so add them to 'arm,mali-bifrost.yaml'. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/ -arm,mali-bifrost.yaml - -Signed-off-by: Johan Jonker -Signed-off-by: Rob Herring -(cherry picked from commit 2c905f6c3334691a3d96d7dcdffdff0e0a9dadb5) ---- - Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml -index 0b229a7d4a98..b1844b9c295d 100644 ---- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml -+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml -@@ -43,9 +43,15 @@ properties: - - operating-points-v2: true - -+ power-domains: -+ maxItems: 1 -+ - resets: - maxItems: 2 - -+ "#cooling-cells": -+ const: 2 -+ - required: - - compatible - - reg - -From de74efa1defc4106cda6f31e011cb856a1074b59 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Tue, 12 May 2020 22:35:22 +0200 -Subject: [PATCH] arm64: dts: rockchip: replace RK_FUNC defines in - rk3326-odroid-go2 - -The defines RK_FUNC_1 and RK_FUNC_2 are deprecated, -so replace them with the preferred form. -Restyle properties in the same line. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200512203524.7317-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 213f272b754f4e27aeab9d1265c775610e612bb7) ---- - arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 9 +++------ - 1 file changed, 3 insertions(+), 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -index cf20aac5f2fe..bd54a37738be 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -@@ -543,18 +543,15 @@ - }; - - soc_slppin_gpio: soc_slppin_gpio { -- rockchip,pins = -- <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; -+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; - }; - - soc_slppin_rst: soc_slppin_rst { -- rockchip,pins = -- <0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>; -+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; - }; - - soc_slppin_slp: soc_slppin_slp { -- rockchip,pins = -- <0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>; -+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; - }; - }; - }; - -From 0b86f8e0f92794c9db7314819600507d458ef25e Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 21 Mar 2020 22:54:18 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix phy nodename for rk3328 - -A test with the command below gives for example this error: - -arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: phy@0: -'#phy-cells' is a required property - -The phy nodename is normally used by a phy-handle. -This node is however compatible with -"ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22" -which is just been added to 'ethernet-phy.yaml'. -So change nodename to 'ethernet-phy' for which '#phy-cells' -is not a required property - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200321215423.12176-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 8370cc5533b3baa5e0f18075ae638b050458aabd) ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index a4d591d91533..d399883d4b75 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -934,7 +934,7 @@ - #address-cells = <1>; - #size-cells = <0>; - -- phy: phy@0 { -+ phy: ethernet-phy@0 { - compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - clocks = <&cru SCLK_MAC2PHY_OUT>; - -From bd64674b64f3f4c70f7cef0855f8c66e1a2acdb3 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 21 Mar 2020 22:54:19 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix rtl8211f nodename for rk3328 - Beelink A1 - -A test with the command below gives this error: - -arch/arm64/boot/dts/rockchip/rk3328-a1.dt.yaml: phy@0: -'#phy-cells' is a required property - -The rtl8211f node is used by a phy-handle. -The parent node is compatible with "snps,dwmac-mdio", -so change nodename to 'ethernet-phy', for which '#phy-cells' -is not a required property. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200321215423.12176-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 63834d1edb96e2016191e53444934299bbc06bb1) ---- - arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts -index 797e90a3ac92..37f307cfa4cc 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts -@@ -115,7 +115,7 @@ - #address-cells = <1>; - #size-cells = <0>; - -- rtl8211f: phy@0 { -+ rtl8211f: ethernet-phy@0 { - reg = <0>; - reset-assert-us = <10000>; - reset-deassert-us = <30000>; - -From ba183cce2ebccac052414ee447ef615bb2ff1dc5 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 21 Mar 2020 22:54:20 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix rtl8211e nodename for - rk3399-nanopi4 - -A test with the command below gives these errors: - -arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dt.yaml: phy@1: -'#phy-cells' is a required property -arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dt.yaml: phy@1: -'#phy-cells' is a required property -arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dt.yaml: phy@1: -'#phy-cells' is a required property - -The rtl8211e node is used by a phy-handle. -The parent node is compatible with "snps,dwmac-mdio", -so change nodename to 'ethernet-phy', for which '#phy-cells' -is not a required property. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200321215423.12176-3-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b450d1c566bd726f93bc72a3cf3155cecebc1b75) ---- - arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -index c88018a0ef35..20529105c63c 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -@@ -182,7 +182,7 @@ - #address-cells = <1>; - #size-cells = <0>; - -- rtl8211e: phy@1 { -+ rtl8211e: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&gpio3>; - interrupts = ; - -From e655529bad8cb4dea6495eb500a8db94cf907a89 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 21 Mar 2020 22:54:21 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix &pinctrl phy sub nodename for - rk3399-nanopi4 - -A test with the command below gives for example this error: - -arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dt.yaml: phy: -'#phy-cells' is a required property -arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dt.yaml: phy: -'#phy-cells' is a required property -arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dt.yaml: phy: -'#phy-cells' is a required property - -'phy' is a reserved nodename and should not be used for pinctrl, -so change it to 'gmac'. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200321215423.12176-4-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 737157f9618b40c7147cf697aec431ce9dd178a0) ---- - arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -index 20529105c63c..1d246c2caa3c 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi -@@ -525,7 +525,7 @@ - }; - }; - -- phy { -+ gmac { - phy_intb: phy-intb { - rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - -From daa7af1392aa91d53ca050e6f92561af8d375643 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 21 Mar 2020 22:54:22 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix rtl8211e nodename for - rk3399-orangepi - -A test with the command below gives this error: - -arch/arm64/boot/dts/rockchip/rk3399-orangepi.dt.yaml: phy@1: -'#phy-cells' is a required property - -The phy nodename is used by a phy-handle. -The parent node is compatible with "snps,dwmac-mdio", -so change nodename to 'ethernet-phy', for which '#phy-cells' -is not a required property - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200321215423.12176-5-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b2bb769100d49c6acbfb2756cc4748aac09209c9) ---- - arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -index f9f7246d4d2f..afbcd213cccf 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -@@ -214,7 +214,7 @@ - #address-cells = <1>; - #size-cells = <0>; - -- rtl8211e: phy@1 { -+ rtl8211e: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&gpio3>; - interrupts = ; - -From f5eac7148efd93ba264852dfd3378881d9afa6bf Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 21 Mar 2020 22:54:23 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix &pinctrl phy sub nodename for - rk3399-orangepi - -A test with the command below this error: - -arch/arm64/boot/dts/rockchip/rk3399-orangepi.dt.yaml: phy: -'#phy-cells' is a required property - -'phy' is a reserved nodename and should not be used for pinctrl, -so change it to 'gmac'. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200321215423.12176-6-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 302a729c84b59c835f7857ec378efecbda58b9b3) ---- - arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -index afbcd213cccf..6163ae8063a7 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -@@ -554,7 +554,7 @@ - }; - }; - -- phy { -+ gmac { - phy_intb: phy-intb { - rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - -From 623a0252df25c7cc22203c84c7606cdcff1ccfc2 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Tue, 28 Apr 2020 22:30:02 +0200 -Subject: [PATCH] arm64: dts: rockchip: fix defines in pd_vio node for rk3399 - -A test with the command below gives for example this error: - -arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pd_vio@15: -'pd_tcpc0@RK3399_PD_TCPC0', 'pd_tcpc1@RK3399_PD_TCPC1' -do not match any of the regexes: -'.*-names$', '.*-supply$', '^#.*-cells$', -'^#[a-zA-Z0-9,+\\-._]{0,63}$', -'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}$', -'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+(,[0-9a-fA-F]+)*$', -'^__.*__$', 'pinctrl-[0-9]+' - -Fix error by replacing the wrong defines by the ones -mentioned in 'rk3399-power.h'. - -make -k ARCH=arm64 dtbs_check - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200428203003.3318-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 84836ded76ec9a6f25d1d0acebaad44977e0ec6f) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index de53f145c4fa..e6442d249abf 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1088,12 +1088,12 @@ - pm_qos = <&qos_isp1_m0>, - <&qos_isp1_m1>; - }; -- pd_tcpc0@RK3399_PD_TCPC0 { -+ pd_tcpc0@RK3399_PD_TCPD0 { - reg = ; - clocks = <&cru SCLK_UPHY0_TCPDCORE>, - <&cru SCLK_UPHY0_TCPDPHY_REF>; - }; -- pd_tcpc1@RK3399_PD_TCPC1 { -+ pd_tcpc1@RK3399_PD_TCPD1 { - reg = ; - clocks = <&cru SCLK_UPHY1_TCPDCORE>, - <&cru SCLK_UPHY1_TCPDPHY_REF>; - -From 027988b4a390644acef9f4b9df0b0e30cc673309 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Tue, 28 Apr 2020 16:49:33 +0200 -Subject: [PATCH] arm64: dts: rockchip: rename and label gpio-led subnodes - -Current dts files with 'gpio-led' nodes were manually verified. -In order to automate this process leds-gpio.txt -has been converted to yaml. With this conversion a check -for pattern properties was added. A test with the command -below gives a screen full of warnings like: - -arch/arm64/boot/dts/rockchip/rk3368-r88.dt.yaml: gpio-leds: -'work' does not match any of the regexes: -'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' - -Fix these errors with help of the following rules: - -1: Add nodename in the preferred form. - -2: Always add a label that ends with '_led' to prevent conflicts - with other labels such as 'power' and 'mmc' - -3: If leds need pinctrl add a label that ends with '_led_pin' - also to prevent conflicts with other labels. - -patternProperties: - # The first form is preferred, but fall back to just 'led' - # anywhere in the node name to at least catch some child nodes. - "(^led-[0-9a-f]$|led)": - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/leds/ -leds-gpio.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200428144933.10953-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit e916d85b922fed7be861f63e388214bba6f20719) ---- - arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 4 +-- - arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 6 ++--- - arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 4 +-- - arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 +-- - arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 4 +-- - .../boot/dts/rockchip/rk3368-orion-r68-meta.dts | 4 +-- - arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 29 +++++++++++----------- - arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 10 ++++---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 ++--- - .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 10 ++++---- - arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 29 +++++++++++----------- - 12 files changed, 57 insertions(+), 55 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -index 8011e9b12347..ccb27023ccce 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -@@ -28,14 +28,14 @@ - leds { - compatible = "gpio-leds"; - -- power { -+ power_led: led-0 { - label = "firefly:red:power"; - linux,default-trigger = "ir-power-click"; - default-state = "on"; - gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - -- user { -+ user_led: led-1 { - label = "firefly:blue:user"; - linux,default-trigger = "ir-user-click"; - default-state = "off"; -diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -index bd54a37738be..46826b6e237f 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -@@ -128,9 +128,9 @@ - leds: gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; -- pinctrl-0 = <&led_pins>; -+ pinctrl-0 = <&blue_led_pin>; - -- led-0 { -+ blue_led: led-0 { - label = "blue:heartbeat"; - gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; -@@ -528,7 +528,7 @@ - }; - - leds { -- led_pins: led-pins { -+ blue_led_pin: blue-led-pin { - rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -index 8d553c92182a..34db48c274e5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -@@ -86,7 +86,7 @@ - leds { - compatible = "gpio-leds"; - -- power { -+ power_led: led-0 { - label = "firefly:blue:power"; - linux,default-trigger = "heartbeat"; - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; -@@ -94,7 +94,7 @@ - mode = <0x23>; - }; - -- user { -+ user_led: led-1 { - label = "firefly:yellow:user"; - linux,default-trigger = "mmc1"; - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index ebf3eb222e1f..6e09c223ed57 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -@@ -73,12 +73,12 @@ - leds { - compatible = "gpio-leds"; - -- power { -+ power_led: led-0 { - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; - linux,default-trigger = "mmc0"; - }; - -- standby { -+ standby_led: led-1 { - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts -index 1d0778ff217c..46357d1d77cd 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts -@@ -50,13 +50,13 @@ - leds: gpio-leds { - compatible = "gpio-leds"; - -- blue { -+ blue_led: led-0 { - gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "geekbox:blue:led"; - default-state = "on"; - }; - -- red { -+ red_led: led-1 { - gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; - label = "geekbox:red:led"; - default-state = "off"; -diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -index 6cc310255da8..b058ce999e3b 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts -@@ -50,7 +50,7 @@ - leds: gpio-leds { - compatible = "gpio-leds"; - -- red { -+ red_led: led-0 { - gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; - label = "orion:red:led"; - pinctrl-names = "default"; -@@ -58,7 +58,7 @@ - default-state = "on"; - }; - -- blue { -+ blue_led: led-1 { - gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; - label = "orion:blue:led"; - pinctrl-names = "default"; -diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts -index 006a1fb6a816..236ab0f1b206 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts -@@ -43,7 +43,7 @@ - leds: gpio-leds { - compatible = "gpio-leds"; - -- work { -+ work_led: led-0 { - gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; - label = "r88:green:led"; - pinctrl-names = "default"; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts -index ebe2ee77ba1f..1ce85a5816e4 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts -@@ -27,42 +27,43 @@ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; -- pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, -- <&user_led4>, <&wlan_led>, <&bt_led>; -+ pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, -+ <&user_led3_pin>, <&user_led4_pin>, -+ <&wlan_led_pin>, <&bt_led_pin>; - -- user_led1 { -+ user_led1: led-1 { - label = "red:user1"; - gpios = <&gpio4 25 0>; - linux,default-trigger = "heartbeat"; - }; - -- user_led2 { -+ user_led2: led-2 { - label = "red:user2"; - gpios = <&gpio4 26 0>; - linux,default-trigger = "mmc0"; - }; - -- user_led3 { -+ user_led3: led-3 { - label = "red:user3"; - gpios = <&gpio4 30 0>; - linux,default-trigger = "mmc1"; - }; - -- user_led4 { -+ user_led4: led-4 { - label = "red:user4"; - gpios = <&gpio1 0 0>; - panic-indicator; - linux,default-trigger = "none"; - }; - -- wlan_active_led { -+ wlan_active_led: led-5 { - label = "red:wlan"; - gpios = <&gpio1 1 0>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - -- bt_active_led { -+ bt_active_led: led-6 { - label = "red:bt"; - gpios = <&gpio1 4 0>; - linux,default-trigger = "hci0-power"; -@@ -114,32 +115,32 @@ - }; - - leds { -- user_led1: user_led1 { -+ user_led1_pin: user-led1-pin { - rockchip,pins = - <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- user_led2: user_led2 { -+ user_led2_pin: user-led2-pin { - rockchip,pins = - <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- user_led3: user_led3 { -+ user_led3_pin: user-led3-pin { - rockchip,pins = - <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- user_led4: user_led4 { -+ user_led4_pin: user-led4-pin { - rockchip,pins = - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- wlan_led: wlan_led { -+ wlan_led_pin: wlan-led-pin { - rockchip,pins = - <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- bt_led: bt_led { -+ bt_led_pin: bt-led-pin { - rockchip,pins = - <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts -index d63faf38cc81..20b5599f5e78 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts -@@ -91,15 +91,15 @@ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; -- pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; -+ pinctrl-0 = <&work_led_pin>, <&diy_led_pin>; - -- work-led { -+ work_led: led-0 { - label = "work"; - default-state = "on"; - gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - }; - -- diy-led { -+ diy_led: led-1 { - label = "diy"; - default-state = "off"; - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; -@@ -629,11 +629,11 @@ - }; - - leds { -- work_led_gpio: work_led-gpio { -+ work_led_pin: work-led-pin { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- diy_led_gpio: diy_led-gpio { -+ diy_led_pin: diy-led-pin { - rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index 4b4a38e59283..bf87fa32d3b1 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -39,9 +39,9 @@ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; -- pinctrl-0 = <&power_led_gpio>; -+ pinctrl-0 = <&power_led_pin>; - -- led-0 { -+ power_led: led-0 { - label = "blue:power"; - gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; - default-state = "on"; -@@ -510,7 +510,7 @@ - }; - - leds { -- power_led_gpio: power-led-gpio { -+ power_led_pin: power-led-pin { - rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index d44c73521218..cb0245d2226d 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -90,9 +90,9 @@ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; -- pinctrl-0 = <&pwrled_gpio &slpled_gpio>; -+ pinctrl-0 = <&pwr_led_pin &slp_led_pin>; - -- green-led { -+ green_led: led-0 { - color = ; - default-state = "on"; - function = LED_FUNCTION_POWER; -@@ -100,7 +100,7 @@ - label = "green:power"; - }; - -- red-led { -+ red_led: led-1 { - color = ; - default-state = "off"; - function = LED_FUNCTION_STANDBY; -@@ -825,11 +825,11 @@ - }; - - leds { -- pwrled_gpio: pwrled_gpio { -+ pwr_led_pin: pwr-led-pin { - rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- slpled_gpio: slpled_gpio { -+ slp_led_pin: slp-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts -index 437a75f31ad4..c88295782e7b 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts -@@ -17,42 +17,43 @@ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; -- pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, -- <&user_led4>, <&wlan_led>, <&bt_led>; -+ pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, -+ <&user_led3_pin>, <&user_led4_pin>, -+ <&wlan_led_pin>, <&bt_led_pin>; - -- user_led1 { -+ user_led1: led-1 { - label = "green:user1"; - gpios = <&gpio4 RK_PC2 0>; - linux,default-trigger = "heartbeat"; - }; - -- user_led2 { -+ user_led2: led-2 { - label = "green:user2"; - gpios = <&gpio4 RK_PC6 0>; - linux,default-trigger = "mmc0"; - }; - -- user_led3 { -+ user_led3: led-3 { - label = "green:user3"; - gpios = <&gpio4 RK_PD0 0>; - linux,default-trigger = "mmc1"; - }; - -- user_led4 { -+ user_led4: led-4 { - label = "green:user4"; - gpios = <&gpio4 RK_PD4 0>; - panic-indicator; - linux,default-trigger = "none"; - }; - -- wlan_active_led { -+ wlan_active_led: led-5 { - label = "yellow:wlan"; - gpios = <&gpio4 RK_PD5 0>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - -- bt_active_led { -+ bt_active_led: led-6 { - label = "blue:bt"; - gpios = <&gpio4 RK_PD6 0>; - linux,default-trigger = "hci0-power"; -@@ -68,32 +69,32 @@ - - &pinctrl { - leds { -- user_led1: user_led1 { -+ user_led1_pin: user-led1-pin { - rockchip,pins = - <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- user_led2: user_led2 { -+ user_led2_pin: user-led2-pin { - rockchip,pins = - <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- user_led3: user_led3 { -+ user_led3_pin: user-led3-pin { - rockchip,pins = - <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- user_led4: user_led4 { -+ user_led4_pin: user-led4-pin { - rockchip,pins = - <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- wlan_led: wlan_led { -+ wlan_led_pin: wlan-led-pin { - rockchip,pins = - <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- bt_led: bt_led { -+ bt_led_pin: bt-led-pin { - rockchip,pins = - <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -From 8b38d3ef602806f1b15176f8ee9829d2660d6941 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 19 Dec 2019 13:19:54 +0100 -Subject: [PATCH] arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc - emmc node - -The mmc-controller.yaml didn't explicitly say disable-wp is -for SD card slot only, but that is what it was designed for -in the first place. -Remove all disable-wp from emmc or sdio controllers. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20191219121954.2450-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 1fab4cf51e48e9525cf70a9604e90dd3dd666a2f) ---- - arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -index ccb27023ccce..7a96be10eaf0 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -@@ -124,7 +124,6 @@ - - &emmc { - cap-mmc-highspeed; -- disable-wp; - mmc-hs200-1_8v; - non-removable; - status = "okay"; - -From 6c32c9a746c3fe1a7232e38b163a4976e22d67f2 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Tue, 28 Apr 2020 16:49:32 +0200 -Subject: [PATCH] ARM: dts: rockchip: rename and label gpio-led subnodes - -Current dts files with 'gpio-led' nodes were manually verified. -In order to automate this process leds-gpio.txt -has been converted to yaml. With this conversion a check -for pattern properties was added. A test with the command -below gives a screen full of warnings like: - -arch/arm/boot/dts/rk3188-radxarock.dt.yaml: gpio-leds: -'blue', 'green', 'sleep' -do not match any of the regexes: -'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' - -Fix these errors with help of the following rules: - -1: Add nodename in the preferred form. - -2: Always add a label that ends with '_led' to prevent conflicts - with other labels such as 'power' and 'mmc' - -3: If leds need pinctrl add a label that ends with '_led_pin' - also to prevent conflicts with other labels. - -patternProperties: - # The first form is preferred, but fall back to just 'led' - # anywhere in the node name to at least catch some child nodes. - "(^led-[0-9a-f]$|led)": - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/leds/ -leds-gpio.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200428144933.10953-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit f0344b33546cee3ea887d41e07900226dec6a23a) ---- - arch/arm/boot/dts/rk3036-kylin.dts | 2 +- - arch/arm/boot/dts/rk3066a-mk808.dts | 2 +- - arch/arm/boot/dts/rk3188-radxarock.dts | 6 +++--- - arch/arm/boot/dts/rk3229-xms6.dts | 2 +- - arch/arm/boot/dts/rk3288-firefly-reload.dts | 12 ++++++------ - arch/arm/boot/dts/rk3288-firefly.dtsi | 12 ++++++------ - arch/arm/boot/dts/rk3288-miqi.dts | 2 +- - arch/arm/boot/dts/rk3288-phycore-som.dtsi | 6 +++--- - arch/arm/boot/dts/rk3288-rock2-square.dts | 4 ++-- - arch/arm/boot/dts/rk3288-tinker.dtsi | 6 +++--- - 10 files changed, 27 insertions(+), 27 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts -index 2ff9f152d29b..7154b827ea2f 100644 ---- a/arch/arm/boot/dts/rk3036-kylin.dts -+++ b/arch/arm/boot/dts/rk3036-kylin.dts -@@ -16,7 +16,7 @@ - leds: gpio-leds { - compatible = "gpio-leds"; - -- work { -+ work_led: led-0 { - gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - label = "kylin:red:led"; - pinctrl-names = "default"; -diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts -index 365eff621113..eed9e60cffa2 100644 ---- a/arch/arm/boot/dts/rk3066a-mk808.dts -+++ b/arch/arm/boot/dts/rk3066a-mk808.dts -@@ -22,7 +22,7 @@ - gpio-leds { - compatible = "gpio-leds"; - -- blue { -+ blue_led: led-0 { - label = "mk808:blue:power"; - gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; - default-state = "off"; -diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts -index c9a7f5409960..b0fef82c0a71 100644 ---- a/arch/arm/boot/dts/rk3188-radxarock.dts -+++ b/arch/arm/boot/dts/rk3188-radxarock.dts -@@ -33,19 +33,19 @@ - gpio-leds { - compatible = "gpio-leds"; - -- green { -+ green_led: led-0 { - label = "rock:green:user1"; - gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - -- blue { -+ blue_led: led-1 { - label = "rock:blue:user2"; - gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - -- sleep { -+ sleep_led: led-2 { - label = "rock:red:power"; - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - default-state = "off"; -diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts -index 933ef69da32a..637245324a5e 100644 ---- a/arch/arm/boot/dts/rk3229-xms6.dts -+++ b/arch/arm/boot/dts/rk3229-xms6.dts -@@ -33,7 +33,7 @@ - power-led { - compatible = "gpio-leds"; - -- blue { -+ blue_led: led-0 { - gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; -diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts -index 8c38bda21a7c..9a4a9749c405 100644 ---- a/arch/arm/boot/dts/rk3288-firefly-reload.dts -+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts -@@ -45,20 +45,20 @@ - leds { - compatible = "gpio-leds"; - -- power { -+ power_led: led-0 { - gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>; - label = "firefly:blue:power"; - pinctrl-names = "default"; -- pinctrl-0 = <&power_led>; -+ pinctrl-0 = <&power_led_pin>; - panic-indicator; - }; - -- work { -+ work_led: led-1 { - gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>; - label = "firefly:blue:user"; - linux,default-trigger = "rc-feedback"; - pinctrl-names = "default"; -- pinctrl-0 = <&work_led>; -+ pinctrl-0 = <&work_led_pin>; - }; - }; - -@@ -334,11 +334,11 @@ - }; - - leds { -- power_led: power-led { -+ power_led_pin: power-led-pin { - rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- work_led: work-led { -+ work_led_pin: work-led-pin { - rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi -index 5e0a19004e46..e5c4fd4ea67e 100644 ---- a/arch/arm/boot/dts/rk3288-firefly.dtsi -+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi -@@ -62,20 +62,20 @@ - leds { - compatible = "gpio-leds"; - -- work { -+ work_led: led-0 { - gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>; - label = "firefly:blue:user"; - linux,default-trigger = "rc-feedback"; - pinctrl-names = "default"; -- pinctrl-0 = <&work_led>; -+ pinctrl-0 = <&work_led_pin>; - }; - -- power { -+ power_led: led-1 { - gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>; - label = "firefly:green:power"; - linux,default-trigger = "default-on"; - pinctrl-names = "default"; -- pinctrl-0 = <&power_led>; -+ pinctrl-0 = <&power_led_pin>; - }; - }; - -@@ -429,11 +429,11 @@ - }; - - leds { -- power_led: power-led { -+ power_led_pin: power-led-pin { - rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - -- work_led: work-led { -+ work_led_pin: work-led-pin { - rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts -index c41d012c8850..213c9eb84f76 100644 ---- a/arch/arm/boot/dts/rk3288-miqi.dts -+++ b/arch/arm/boot/dts/rk3288-miqi.dts -@@ -30,7 +30,7 @@ - leds { - compatible = "gpio-leds"; - -- work { -+ work_led: led-0 { - gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "miqi:green:user"; - linux,default-trigger = "timer"; -diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi -index 77a47b9b756d..e43887c9635f 100644 ---- a/arch/arm/boot/dts/rk3288-phycore-som.dtsi -+++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi -@@ -36,9 +36,9 @@ - leds: user-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; -- pinctrl-0 = <&user_led>; -+ pinctrl-0 = <&user_led_pin>; - -- user { -+ user_led: led-0 { - label = "green_led"; - gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; -@@ -372,7 +372,7 @@ - }; - - leds { -- user_led: user-led { -+ user_led_pin: user-led-pin { - rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; -diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts -index cdcdc921ee09..3cca4d0f9b09 100644 ---- a/arch/arm/boot/dts/rk3288-rock2-square.dts -+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts -@@ -41,13 +41,13 @@ - gpio-leds { - compatible = "gpio-leds"; - -- heartbeat { -+ heartbeat_led: led-0 { - gpios = <&gpio7 RK_PB7 GPIO_ACTIVE_LOW>; - label = "rock2:green:state1"; - linux,default-trigger = "heartbeat"; - }; - -- mmc { -+ mmc_led: led-1 { - gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; - label = "rock2:blue:state2"; - linux,default-trigger = "mmc0"; -diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi -index acfaa12ec239..90e9be443fe6 100644 ---- a/arch/arm/boot/dts/rk3288-tinker.dtsi -+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi -@@ -46,17 +46,17 @@ - gpio-leds { - compatible = "gpio-leds"; - -- act-led { -+ act_led: led-0 { - gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - }; - -- heartbeat-led { -+ heartbeat_led: led-1 { - gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - -- pwr-led { -+ pwr_led: led-2 { - gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "default-on"; - }; - -From d735cc7ec7128c7513fc64a292b618bacaf7b044 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 20:01:56 +0200 -Subject: [PATCH] ARM: dts: rockchip: remove identical #include from - rk3288.dtsi - -There are 2 identical '#include' for 'rk3288-power.h', -so remove one of them. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200403180159.13387-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 439062737bc06232761196f07046872d0ce3f3d6) ---- - arch/arm/boot/dts/rk3288.dtsi | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 0cd88774db95..2e1edd85f04a 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -7,7 +7,6 @@ - #include - #include - #include --#include - #include - - / { - -From 10623149945c885081ae775a7fcc2711975ad7fa Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 16 Apr 2020 20:30:53 +0200 -Subject: [PATCH] arm64: dts: rockchip: add bus-width properties to mmc nodes - for px30 - -'bus-width' and pinctrl containing the bus-pins -should be in the same file, so add them to -all mmc nodes in 'px30.dtsi'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200416183053.6045-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit fb0ab17f1ab750d9662ec6b9fb3aa541a8ac1f5c) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index adc9b8bf5eaa..a6b8427156d5 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -931,6 +931,7 @@ - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; -+ bus-width = <4>; - fifo-depth = <0x100>; - max-frequency = <150000000>; - pinctrl-names = "default"; -@@ -946,6 +947,7 @@ - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; -+ bus-width = <4>; - fifo-depth = <0x100>; - max-frequency = <150000000>; - pinctrl-names = "default"; -@@ -961,6 +963,7 @@ - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; -+ bus-width = <8>; - fifo-depth = <0x100>; - max-frequency = <150000000>; - pinctrl-names = "default"; - -From cbed48821189566fec7fc794f847d37864b84a8b Mon Sep 17 00:00:00 2001 -From: Justin Swartz -Date: Mon, 6 Apr 2020 13:50:04 +0000 -Subject: [PATCH] ARM: dts: enable WLAN for Mecer Xtreme Mini S6 - -The Mecer Xtreme Mini S6 features a wireless module, based on a -Realtek 8723BS, which provides WLAN and Bluetooth connectivity via -SDIO and UART interfaces respectively. - -Define a simple MMC power sequence that declares the GPIO pins -connected to the module's WLAN Disable and Bluetooth Disable pins -as active low reset signals, because both signals must be deasserted -for WLAN radio operation. - -Configure the host's SDIO interface for High Speed mode with 1.8v -I/O signalling and IRQ detection over a 4-bit wide bus. - -Signed-off-by: Justin Swartz -Link: https://lore.kernel.org/r/20200406135006.23759-1-justin.swartz@risingedge.co.za -Signed-off-by: Heiko Stuebner -(cherry picked from commit 6067ec2c7ffacab4689ddfed3df74a467d112efe) ---- - arch/arm/boot/dts/rk3229-xms6.dts | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - -diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts -index 637245324a5e..17a547fe8e3c 100644 ---- a/arch/arm/boot/dts/rk3229-xms6.dts -+++ b/arch/arm/boot/dts/rk3229-xms6.dts -@@ -39,6 +39,12 @@ - }; - }; - -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, -+ <&gpio2 29 GPIO_ACTIVE_LOW>; -+ }; -+ - vcc_host: vcc-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; -@@ -202,6 +208,16 @@ - status = "okay"; - }; - -+&sdio { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cap-sdio-irq; -+ mmc-pwrseq = <&sdio_pwrseq>; -+ non-removable; -+ vqmmc-supply = <&vccio_1v8>; -+ status = "okay"; -+}; -+ - &sdmmc { - cap-mmc-highspeed; - disable-wp; - -From 8a8225b677d45d3fd9a683447ae08fe729789593 Mon Sep 17 00:00:00 2001 -From: Justin Swartz -Date: Mon, 6 Apr 2020 13:50:05 +0000 -Subject: [PATCH] ARM: dts: remove disable-wp from rk3229-xms6 emmc - -Remove the disable-wp attribute from &emmc as it is, according to -Documentation/devicetree/bindings/mmc/mmc-controller.yaml: - - "Not used in combination with eMMC or SDIO." - -Suggested-by: Johan Jonker -Signed-off-by: Justin Swartz -Link: https://lore.kernel.org/r/20200406135006.23759-2-justin.swartz@risingedge.co.za -Signed-off-by: Heiko Stuebner -(cherry picked from commit 2dd579fc969882c0036433a74446ba5e57ffab2d) ---- - arch/arm/boot/dts/rk3229-xms6.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts -index 17a547fe8e3c..263393ac4fa6 100644 ---- a/arch/arm/boot/dts/rk3229-xms6.dts -+++ b/arch/arm/boot/dts/rk3229-xms6.dts -@@ -137,7 +137,6 @@ - - &emmc { - cap-mmc-highspeed; -- disable-wp; - non-removable; - status = "okay"; - }; - -From 6d03d3fb5c5ae4760549d428ceb0ace0c6dd5b57 Mon Sep 17 00:00:00 2001 -From: Justin Swartz -Date: Sun, 19 Apr 2020 12:51:33 +0000 -Subject: [PATCH] ARM: dts: rockchip: add rga node for rk322x - -Add a node to define the presence of RGA, a 2D raster graphic -acceleration unit. - -Signed-off-by: Justin Swartz -Link: https://lore.kernel.org/r/20200419125134.29923-2-justin.swartz@risingedge.co.za -Signed-off-by: Heiko Stuebner -(cherry picked from commit 54b1a4e070330c3fba5becfb0b619bf360bc2657) ---- - arch/arm/boot/dts/rk322x.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index 5485a9918da6..b0fd92befdeb 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -615,6 +615,16 @@ - status = "disabled"; - }; - -+ rga: rga@20060000 { -+ compatible = "rockchip,rk3228-rga", "rockchip,rk3288-rga"; -+ reg = <0x20060000 0x1000>; -+ interrupts = ; -+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; -+ clock-names = "aclk", "hclk", "sclk"; -+ resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>; -+ reset-names = "core", "axi", "ahb"; -+ }; -+ - iep_mmu: iommu@20070800 { - compatible = "rockchip,iommu"; - reg = <0x20070800 0x100>; - -From 895cd23b800f934da3f5d49feef3c72d3aa84f0d Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Tue, 28 Apr 2020 22:30:03 +0200 -Subject: [PATCH] arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position - on rk3399 - -The pd_tcpc0 and pd_tcpc1 nodes are currently a sub node of pd_vio. -In the rk3399 TRM figure of the 'Power Domain Partition' and in the -table of 'Power Domain and Voltage Domain Summary' these power domains -are positioned directly under VD_LOGIC, so fix that in 'rk3399.dtsi'. - -Signed-off-by: Johan Jonker -Reviewed-by: Caesar Wang -Link: https://lore.kernel.org/r/20200428203003.3318-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 2b99e6196663199409540fb95798dba464e34343) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++---------- - 1 file changed, 10 insertions(+), 10 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index e6442d249abf..2581e9cc7a1d 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1056,6 +1056,16 @@ - clocks = <&cru HCLK_SDIO>; - pm_qos = <&qos_sdioaudio>; - }; -+ pd_tcpc0@RK3399_PD_TCPD0 { -+ reg = ; -+ clocks = <&cru SCLK_UPHY0_TCPDCORE>, -+ <&cru SCLK_UPHY0_TCPDPHY_REF>; -+ }; -+ pd_tcpc1@RK3399_PD_TCPD1 { -+ reg = ; -+ clocks = <&cru SCLK_UPHY1_TCPDCORE>, -+ <&cru SCLK_UPHY1_TCPDPHY_REF>; -+ }; - pd_usb3@RK3399_PD_USB3 { - reg = ; - clocks = <&cru ACLK_USB3>; -@@ -1088,16 +1098,6 @@ - pm_qos = <&qos_isp1_m0>, - <&qos_isp1_m1>; - }; -- pd_tcpc0@RK3399_PD_TCPD0 { -- reg = ; -- clocks = <&cru SCLK_UPHY0_TCPDCORE>, -- <&cru SCLK_UPHY0_TCPDPHY_REF>; -- }; -- pd_tcpc1@RK3399_PD_TCPD1 { -- reg = ; -- clocks = <&cru SCLK_UPHY1_TCPDCORE>, -- <&cru SCLK_UPHY1_TCPDPHY_REF>; -- }; - pd_vo@RK3399_PD_VO { - reg = ; - #address-cells = <1>; - -From 0a5518e8a60d1ba9a38b22735f092aa846699d55 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Tue, 19 May 2020 13:14:44 +0200 -Subject: [PATCH] arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on - rk3326-odroid-go2 - -The 'pinctrl-names' property should contain a list of names -to the assigned states. The value 'led_pins' in the gpio-leds -node on rk3326-odroid-go2 is not a state that is normally used, -so change it the common name 'default'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200519111444.2208-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b2cb68e864222eb3cc1d7c3c06edc40469699983) ---- - arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -index 46826b6e237f..b3a8f936578f 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -@@ -127,7 +127,7 @@ - - leds: gpio-leds { - compatible = "gpio-leds"; -- pinctrl-names = "led_pins"; -+ pinctrl-names = "default"; - pinctrl-0 = <&blue_led_pin>; - - blue_led: led-0 { diff --git a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.9.patch b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.9.patch new file mode 100644 index 0000000000..4825cab216 --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.9.patch @@ -0,0 +1,4098 @@ +From 55085f3c06672bd8d4ebbff1ced4b5fa6c1333a7 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 28 May 2020 19:25:50 +0200 +Subject: [PATCH] arm64: dts: rockchip: add fuel gauge to Pinebook Pro dts + +This commit adds cw2015 fuel gauge and battery to the Pinebook Pro dts. + +Signed-off-by: Tobias Schramm +Link: https://lore.kernel.org/r/20200528172550.2324722-2-t.schramm@manjaro.org +Signed-off-by: Heiko Stuebner +(cherry picked from commit c7c4d698cd2882c4d095aeed43bbad6fc990e998) +--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 25 ++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index cb0245d2226d..8f5b2df01560 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -28,6 +28,13 @@ + pwms = <&pwm0 0 740740 0>; + }; + ++ bat: battery { ++ compatible = "simple-battery"; ++ charge-full-design-microamp-hours = <9800000>; ++ voltage-max-design-microvolt = <4350000>; ++ voltage-min-design-microvolt = <3000000>; ++ }; ++ + edp_panel: edp-panel { + compatible = "boe,nv140fhmn49"; + backlight = <&backlight>; +@@ -741,6 +748,24 @@ + }; + }; + }; ++ ++ cw2015@62 { ++ compatible = "cellwise,cw2015"; ++ reg = <0x62>; ++ cellwise,battery-profile = /bits/ 8 < ++ 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63 ++ 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36 ++ 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69 ++ 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59 ++ 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17 ++ 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D ++ 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB ++ 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11 ++ >; ++ cellwise,monitor-interval-ms = <5000>; ++ monitored-battery = <&bat>; ++ power-supplies = <&mains_charger>, <&fusb0>; ++ }; + }; + + &i2s1 { + +From b7bb225f855f25cdd503b84296774fc1a96f1b7f Mon Sep 17 00:00:00 2001 +From: Peter Geis +Date: Sun, 14 Jun 2020 14:29:51 +0000 +Subject: [PATCH] arm64: dts: rockchip: set rockpro64 usbc dr_mode as host + +The usb-c port on the rockpro64 does not detect devices reliably when in otg mode. +Setting the mode to "host" allows the port to work reliably. +This aligns with the pinebook-pro configuration. + +Signed-off-by: Peter Geis +Link: https://lore.kernel.org/r/20200614142950.1120694-1-pgwipeout@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 75152d66315521a48c4997305f4e01c5f139e160) +--- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +index 6788ab28f89a..3456ee97c288 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +@@ -795,7 +795,7 @@ + + &usbdrd_dwc3_0 { + status = "okay"; +- dr_mode = "otg"; ++ dr_mode = "host"; + }; + + &usbdrd3_1 { + +From 8e445f12f1fcc91f96b79c88cae0d20399436b95 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Sun, 7 Jun 2020 23:29:09 +0200 +Subject: [PATCH] arm64: dts: rockchip: fix rk3368-lion gmac reset gpio + +The lion gmac node currently uses opposite active-values for the +gmac phy reset pin. The gpio-declaration uses active-high while the +separate snps,reset-active-low property marks the pin as active low. + +While on the kernel side this works ok, other DT users may get +confused - as seen with uboot right now. + +So bring this in line and make both properties match, similar to the +other Rockchip board. + +Fixes: d99a02bcfa81 ("arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM") +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20200607212909.920575-1-heiko@sntech.de +(cherry picked from commit 2300e6dab473e93181cf76e4fe6671aa3d24c57b) +--- + arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +index e17311e09082..216aafd90e7f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +@@ -156,7 +156,7 @@ + pinctrl-0 = <&rgmii_pins>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; +- snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; ++ snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + tx_delay = <0x10>; + rx_delay = <0x10>; + status = "okay"; + +From f083f0c9daebefdfd97690ced05b1dbc994cb619 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Thu, 4 Jun 2020 11:12:39 +0200 +Subject: [PATCH] arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpio + +The puma vcc5v0_host regulator node currently uses opposite active-values +for the enable pin. The gpio-declaration uses active-high while the +separate enable-active-low property marks the pin as active low. + +While on the kernel side this works ok, other DT users may get +confused - as seen with uboot right now. + +So bring this in line and make both properties match, similar to the +gmac fix. + +Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20200604091239.424318-1-heiko@sntech.de +(cherry picked from commit 7a7184f6cfa9279f1a1c10a1845d247d7fad54ff) +--- + arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +index 07694b196fdb..063f59a420b6 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +@@ -101,7 +101,7 @@ + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; +- gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; ++ gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; + enable-active-low; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + +From 7361aa23039cce5a8e113ea0de374deab933c264 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Wed, 3 Jun 2020 15:28:36 +0200 +Subject: [PATCH] arm64: dts: rockchip: fix rk3399-puma gmac reset gpio + +The puma gmac node currently uses opposite active-values for the +gmac phy reset pin. The gpio-declaration uses active-high while the +separate snps,reset-active-low property marks the pin as active low. + +While on the kernel side this works ok, other DT users may get +confused - as seen with uboot right now. + +So bring this in line and make both properties match, similar to the +other Rockchip board. + +Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20200603132836.362519-1-heiko@sntech.de +(cherry picked from commit 8a445086f8af0b7b9bd8d1901d6f306bb154f70d) +--- + arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +index 063f59a420b6..72c06abd27ea 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +@@ -157,7 +157,7 @@ + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; +- snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; ++ snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x10>; + +From 6ac9e5a0c010eaae64e413c1e4712757acd80933 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sun, 24 May 2020 18:06:36 +0200 +Subject: [PATCH] arm64: dts: rockchip: rename label and nodename pinctrl + subnodes that end with gpio + +A test with the command below gives for example this error: + +arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dt.yaml: +tsadc: tsadc-otp-gpio: +{'phandle': [[90]], 'rockchip,pins': [[0, 6, 0, 123]]} +is not of type 'array' + +'gpio' is a sort of reserved nodename and should not be used +for pinctrl in combination with 'rockchip,pins', so change +nodes that end with 'gpio' to end with 'pin' or 'pins'. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/ +dtschema/schemas/gpio/gpio.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200524160636.16547-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 2bc65fef4fe424f5f8295175f1b42f8b94c6df01) +--- + arch/arm64/boot/dts/rockchip/px30.dtsi | 6 +- + arch/arm64/boot/dts/rockchip/rk3308.dtsi | 6 +- + arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 2 +- + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 2 +- + arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 2 +- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 24 +++---- + .../arm64/boot/dts/rockchip/rk3368-lion-haikou.dts | 2 +- + arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 +- + arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 4 +- + .../boot/dts/rockchip/rk3399-gru-scarlet.dtsi | 2 +- + arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 4 +- + arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 8 +-- + arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 8 +-- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 74 +++++++++++----------- + arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 8 +-- + arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 8 +-- + arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 +- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 8 +-- + arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 4 +- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 +- + 20 files changed, 94 insertions(+), 94 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi +index a6b8427156d5..e9bb2b97ae55 100644 +--- a/arch/arm64/boot/dts/rockchip/px30.dtsi ++++ b/arch/arm64/boot/dts/rockchip/px30.dtsi +@@ -733,9 +733,9 @@ + rockchip,grf = <&grf>; + rockchip,hw-tshut-temp = <120000>; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&tsadc_otp_gpio>; ++ pinctrl-0 = <&tsadc_otp_pin>; + pinctrl-1 = <&tsadc_otp_out>; +- pinctrl-2 = <&tsadc_otp_gpio>; ++ pinctrl-2 = <&tsadc_otp_pin>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; +@@ -1373,7 +1373,7 @@ + }; + + tsadc { +- tsadc_otp_gpio: tsadc-otp-gpio { ++ tsadc_otp_pin: tsadc-otp-pin { + rockchip,pins = + <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi +index ac7f694079d0..ba1c71568164 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi +@@ -1629,7 +1629,7 @@ + }; + + tsadc { +- tsadc_otp_gpio: tsadc-otp-gpio { ++ tsadc_otp_pin: tsadc-otp-pin { + rockchip,pins = + <0 RK_PB2 0 &pcfg_pull_none>; + }; +@@ -1657,7 +1657,7 @@ + <2 RK_PA3 1 &pcfg_pull_none>; + }; + +- uart0_rts_gpio: uart0-rts-gpio { ++ uart0_rts_pin: uart0-rts-pin { + rockchip,pins = + <2 RK_PA3 0 &pcfg_pull_none>; + }; +@@ -1730,7 +1730,7 @@ + <4 RK_PA7 1 &pcfg_pull_none>; + }; + +- uart4_rts_gpio: uart4-rts-gpio { ++ uart4_rts_pin: uart4-rts-pin { + rockchip,pins = + <4 RK_PA7 0 &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts +index ac29c2744d08..1969dab84138 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts +@@ -41,7 +41,7 @@ + compatible = "regulator-fixed"; + gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc0m1_gpio>; ++ pinctrl-0 = <&sdmmc0m1_pin>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +index 34db48c274e5..b70ffb1c6a63 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +@@ -34,7 +34,7 @@ + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc0m1_gpio>; ++ pinctrl-0 = <&sdmmc0m1_pin>; + regulator-boot-on; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +index 6e09c223ed57..86cfb5c50a94 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +@@ -25,7 +25,7 @@ + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc0m1_gpio>; ++ pinctrl-0 = <&sdmmc0m1_pin>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index d399883d4b75..72e655020560 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -552,9 +552,9 @@ + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&otp_gpio>; ++ pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; +- pinctrl-2 = <&otp_gpio>; ++ pinctrl-2 = <&otp_pin>; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + rockchip,grf = <&grf>; +@@ -1154,7 +1154,7 @@ + rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>, + <0 RK_PA6 2 &pcfg_pull_none>; + }; +- i2c3_gpio: i2c3-gpio { ++ i2c3_pins: i2c3-pins { + rockchip,pins = + <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; +@@ -1225,7 +1225,7 @@ + }; + + tsadc { +- otp_gpio: otp-gpio { ++ otp_pin: otp-pin { + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +@@ -1248,7 +1248,7 @@ + rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>; + }; + +- uart0_rts_gpio: uart0-rts-gpio { ++ uart0_rts_pin: uart0-rts-pin { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +@@ -1267,7 +1267,7 @@ + rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>; + }; + +- uart1_rts_gpio: uart1-rts-gpio { ++ uart1_rts_pin: uart1-rts-pin { + rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +@@ -1493,7 +1493,7 @@ + rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>; + }; + +- sdmmc0m0_gpio: sdmmc0m0-gpio { ++ sdmmc0m0_pin: sdmmc0m0-pin { + rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; + }; + }; +@@ -1503,7 +1503,7 @@ + rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>; + }; + +- sdmmc0m1_gpio: sdmmc0m1-gpio { ++ sdmmc0m1_pin: sdmmc0m1-pin { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>; + }; + }; +@@ -1536,7 +1536,7 @@ + <1 RK_PA3 1 &pcfg_pull_up_8ma>; + }; + +- sdmmc0_gpio: sdmmc0-gpio { ++ sdmmc0_pins: sdmmc0-pins { + rockchip,pins = + <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, + <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, +@@ -1578,7 +1578,7 @@ + <3 RK_PA7 3 &pcfg_pull_up_4ma>; + }; + +- sdmmc0ext_gpio: sdmmc0ext-gpio { ++ sdmmc0ext_pins: sdmmc0ext-pins { + rockchip,pins = + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, +@@ -1623,7 +1623,7 @@ + <1 RK_PC1 1 &pcfg_pull_up_8ma>; + }; + +- sdmmc1_gpio: sdmmc1-gpio { ++ sdmmc1_pins: sdmmc1-pins { + rockchip,pins = + <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, + <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, +@@ -1817,7 +1817,7 @@ + tsadc_int: tsadc-int { + rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>; + }; +- tsadc_gpio: tsadc-gpio { ++ tsadc_pin: tsadc-pin { + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +index cbde279ae81d..dbd2caba322f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +@@ -125,7 +125,7 @@ + }; + + sdmmc { +- sdmmc_cd_gpio: sdmmc-cd-gpio { ++ sdmmc_cd_pin: sdmmc-cd-pin { + rockchip,pins = + <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi +index 1ebb0eef42da..5d25a9d04051 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi +@@ -483,9 +483,9 @@ + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&otp_gpio>; ++ pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; +- pinctrl-2 = <&otp_gpio>; ++ pinctrl-2 = <&otp_pin>; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; +@@ -1145,7 +1145,7 @@ + }; + + tsadc { +- otp_gpio: otp-gpio { ++ otp_pin: otp-pin { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +index 20b5599f5e78..6db18808b9c5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +@@ -589,11 +589,11 @@ + }; + + pmic { +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +index 4373ed732af7..60cd1c18cd4e 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +@@ -499,7 +499,7 @@ camera: &i2c7 { + }; + + /* there is no external pull up, so need to set this pin pull up */ +-&sdmmc_cd_gpio { ++&sdmmc_cd_pin { + rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +index 2f3997740068..32dcaf210085 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +@@ -516,7 +516,7 @@ ap_i2c_audio: &i2c8 { + * configured as SDMMC and not JTAG. + */ + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_gpio ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin + &sdmmc_bus4>; + + bus-width = <4>; +@@ -767,7 +767,7 @@ ap_i2c_audio: &i2c8 { + }; + + /* This is where we actually hook up CD; has external pull */ +- sdmmc_cd_gpio: sdmmc-cd-gpio { ++ sdmmc_cd_pin: sdmmc-cd-pin { + rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +index bf87fa32d3b1..341d074ed996 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +@@ -205,7 +205,7 @@ + compatible = "silergy,syr827"; + reg = <0x40>; + regulator-compatible = "fan53555-reg"; +- pinctrl-0 = <&vsel1_gpio>; ++ pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -223,7 +223,7 @@ + compatible = "silergy,syr828"; + reg = <0x41>; + regulator-compatible = "fan53555-reg"; +- pinctrl-0 = <&vsel2_gpio>; ++ pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -521,12 +521,12 @@ + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = + <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts +index 73be38a53796..1fa80ac15464 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts +@@ -341,7 +341,7 @@ + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel1_gpio>; ++ pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -360,7 +360,7 @@ + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel2_gpio>; ++ pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -447,11 +447,11 @@ + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 8f5b2df01560..06d48338c836 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -40,7 +40,7 @@ + backlight = <&backlight>; + enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&panel_en_gpio>; ++ pinctrl-0 = <&panel_en_pin>; + power-supply = <&vcc3v3_panel>; + + ports { +@@ -67,7 +67,7 @@ + gpio-key-lid { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&lidbtn_gpio>; ++ pinctrl-0 = <&lidbtn_pin>; + + lid { + debounce-interval = <20>; +@@ -83,7 +83,7 @@ + gpio-key-power { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&pwrbtn_gpio>; ++ pinctrl-0 = <&pwrbtn_pin>; + + power { + debounce-interval = <20>; +@@ -124,7 +124,7 @@ + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; +- pinctrl-0 = <&wifi_enable_h_gpio>; ++ pinctrl-0 = <&wifi_enable_h_pin>; + post-power-on-delay-ms = <100>; + power-off-delay-us = <500000>; + +@@ -136,7 +136,7 @@ + es8316-sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; +- pinctrl-0 = <&hp_det_gpio>; ++ pinctrl-0 = <&hp_det_pin>; + simple-audio-card,name = "rockchip,es8316-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; +@@ -220,7 +220,7 @@ + enable-active-high; + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&pwr_5v_gpio>; ++ pinctrl-0 = <&pwr_5v_pin>; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-min-microvolt = <5000000>; +@@ -277,7 +277,7 @@ + enable-active-high; + gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc0_pwr_h_gpio>; ++ pinctrl-0 = <&sdmmc0_pwr_h_pin>; + regulator-name = "vcc3v0_sd"; + regulator-always-on; + regulator-min-microvolt = <3000000>; +@@ -295,7 +295,7 @@ + enable-active-high; + gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&lcdvcc_en_gpio>; ++ pinctrl-0 = <&lcdvcc_en_pin>; + regulator-name = "vcc3v3_panel"; + regulator-always-on; + regulator-min-microvolt = <3300000>; +@@ -324,7 +324,7 @@ + enable-active-high; + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_host_en_gpio>; ++ pinctrl-0 = <&vcc5v0_host_en_pin>; + regulator-name = "vcc5v0_otg"; + regulator-always-on; + regulator-min-microvolt = <5000000>; +@@ -343,7 +343,7 @@ + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_typec0_en_gpio>; ++ pinctrl-0 = <&vcc5v0_typec0_en_pin>; + regulator-name = "vbus_5vout"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +@@ -375,7 +375,7 @@ + + /* Also triggered by USB charger */ + pinctrl-names = "default"; +- pinctrl-0 = <&dc_det_gpio>; ++ pinctrl-0 = <&dc_det_pin>; + }; + }; + +@@ -454,7 +454,7 @@ + interrupt-parent = <&gpio3>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; +- pinctrl-0 = <&pmic_int_l_gpio>; ++ pinctrl-0 = <&pmic_int_l_pin>; + rockchip,system-power-controller; + wakeup-source; + +@@ -634,7 +634,7 @@ + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel1_gpio>; ++ pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-always-on; + regulator-boot-on; +@@ -653,7 +653,7 @@ + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel2_gpio>; ++ pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; +@@ -700,7 +700,7 @@ + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; +- pinctrl-0 = <&fusb0_int_gpio>; ++ pinctrl-0 = <&fusb0_int_pin>; + vbus-supply = <&vbus_typec>; + + connector { +@@ -770,7 +770,7 @@ + + &i2s1 { + pinctrl-names = "default"; +- pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; ++ pinctrl-0 = <&i2s_8ch_mclk_pin>, <&i2s1_2ch_bus>; + rockchip,capture-channels = <8>; + rockchip,playback-channels = <8>; + status = "okay"; +@@ -802,49 +802,49 @@ + + &pinctrl { + buttons { +- pwrbtn_gpio: pwrbtn-gpio { ++ pwrbtn_pin: pwrbtn-pin { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- lidbtn_gpio: lidbtn-gpio { ++ lidbtn_pin: lidbtn-pin { + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + dc-charger { +- dc_det_gpio: dc-det-gpio { ++ dc_det_pin: dc-det-pin { + rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + es8316 { +- hp_det_gpio: hp-det-gpio { ++ hp_det_pin: hp-det-pin { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + fusb302x { +- fusb0_int_gpio: fusb0-int-gpio { ++ fusb0_int_pin: fusb0-int-pin { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + i2s1 { +- i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio { ++ i2s_8ch_mclk_pin: i2s-8ch-mclk-pin { + rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; + }; + }; + + lcd-panel { +- lcdvcc_en_gpio: lcdvcc-en-gpio { ++ lcdvcc_en_pin: lcdvcc-en-pin { + rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- panel_en_gpio: panel-en-gpio { ++ panel_en_pin: panel-en-pin { + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- lcd_panel_reset_gpio: lcd-panel-reset-gpio { ++ lcd_panel_reset_pin: lcd-panel-reset-pin { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +@@ -860,58 +860,58 @@ + }; + + pmic { +- pmic_int_l_gpio: pmic-int-l-gpio { ++ pmic_int_l_pin: pmic-int-l-pin { + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdcard { +- sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio { ++ sdmmc0_pwr_h_pin: sdmmc0-pwr-h-pin { + rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + }; + + sdio-pwrseq { +- wifi_enable_h_gpio: wifi-enable-h-gpio { ++ wifi_enable_h_pin: wifi-enable-h-pin { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { +- vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio { ++ vcc5v0_typec0_en_pin: vcc5v0-typec0-en-pin { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { +- pwr_5v_gpio: pwr-5v-gpio { ++ pwr_5v_pin: pwr-5v-pin { + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { ++ vcc5v0_host_en_pin: vcc5v0-host-en-pin { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-bluetooth { +- bt_wake_gpio: bt-wake-gpio { ++ bt_wake_pin: bt-wake-pin { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- bt_host_wake_gpio: bt-host-wake-gpio { ++ bt_host_wake_pin: bt-host-wake-pin { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- bt_reset_gpio: bt-reset-gpio { ++ bt_reset_pin: bt-reset-pin { + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +@@ -1059,7 +1059,7 @@ + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + pinctrl-names = "default"; +- pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; ++ pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + vbat-supply = <&wifi_bat>; + vddio-supply = <&vcc_wl>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +index 9f225e9c3d54..59b89d6ccdef 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +@@ -456,7 +456,7 @@ + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel1_gpio>; ++ pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -475,7 +475,7 @@ + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel2_gpio>; ++ pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -609,11 +609,11 @@ + }; + + pmic { +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts +index 3923ec01ef66..60f98a3e19d8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts +@@ -390,7 +390,7 @@ + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel1_gpio>; ++ pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -409,7 +409,7 @@ + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel2_gpio>; ++ pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -532,11 +532,11 @@ + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +index ba7c75c9f2a1..5e3ac589bc54 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +@@ -470,12 +470,12 @@ + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = + <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +index 3456ee97c288..c84cad16118a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +@@ -445,7 +445,7 @@ + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel1_gpio>; ++ pinctrl-0 = <&vsel1_pin>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -464,7 +464,7 @@ + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&vsel2_gpio>; ++ pinctrl-0 = <&vsel2_pin>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; +@@ -612,11 +612,11 @@ + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +index 1bc1579674e5..701a567d7638 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +@@ -481,11 +481,11 @@ + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +- vsel1_gpio: vsel1-gpio { ++ vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + +- vsel2_gpio: vsel2-gpio { ++ vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 2581e9cc7a1d..781b5c2cdb4d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -845,9 +845,9 @@ + rockchip,grf = <&grf>; + rockchip,hw-tshut-temp = <95000>; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&otp_gpio>; ++ pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; +- pinctrl-2 = <&otp_gpio>; ++ pinctrl-2 = <&otp_pin>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; +@@ -2485,7 +2485,7 @@ + }; + + tsadc { +- otp_gpio: otp-gpio { ++ otp_pin: otp-pin { + rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + +From 909929e1a7134ccbb43967882d8fcdaefc12a48e Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 22 May 2020 17:46:57 +0200 +Subject: [PATCH] arm64: dts: rockchip: rename and label gpio-led subnodes part + 2 + +Current dts files with 'gpio-led' nodes were manually verified. +In order to automate this process leds-gpio.txt +has been converted to yaml. With this conversion a check +for pattern properties was added. In part 2 rename and label +gpio-led subnodes that passed the regex, but still don't have +the preferred form. Any pin subnode that ends with '-gpio' +in the pinctrl node generates a warning. + +Fix with help of the following rules: + +1: Add nodename in the preferred form. + +2: Always add a label that ends with '_led' to prevent conflicts + with other labels such as 'power' and 'mmc' + +3: If leds need pinctrl add a label that ends with '_led_pin' + also to prevent conflicts with other labels. + +patternProperties: + # The first form is preferred, but fall back to just 'led' + # anywhere in the node name to at least catch some child nodes. + "(^led-[0-9a-f]$|led)": + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/leds/ +leds-gpio.yaml + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ +schemas/gpio/gpio.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200522154657.9472-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 6dd5e12c0b9bba40b3947ac1a9fd2f992585b5c6) +--- + arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts | 6 +++--- + arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi | 8 ++++---- + arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi | 10 +++++----- + arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 6 +++--- + arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 6 +++--- + arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 6 +++--- + arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi | 14 +++++++------- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 10 +++++----- + 8 files changed, 33 insertions(+), 33 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +index dbd2caba322f..7fcb1eacea8a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +@@ -25,9 +25,9 @@ + }; + + leds { +- pinctrl-0 = <&led_pins_module>, <&led_sd_haikou>; ++ pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>; + +- sd-card-led { ++ sd_card_led: led-3 { + label = "sd_card_led"; + gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; +@@ -118,7 +118,7 @@ + }; + + leds { +- led_sd_haikou: led-sd-gpio { ++ sd_card_led_pin: sd-card-led-pin { + rockchip,pins = + <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +index 216aafd90e7f..24d28be4736c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +@@ -76,16 +76,16 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&led_pins_module>; ++ pinctrl-0 = <&module_led_pins>; + +- module_led1 { ++ module_led1: led-1 { + label = "module_led1"; + gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + panic-indicator; + }; + +- module_led2 { ++ module_led2: led-2 { + label = "module_led2"; + gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; + default-state = "off"; +@@ -270,7 +270,7 @@ + + &pinctrl { + leds { +- led_pins_module: led-module-gpio { ++ module_led_pins: module-led-pins { + rockchip,pins = + <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi +index e87a04477440..e36837c04dc7 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi +@@ -141,15 +141,15 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&sys_led_gpio>, <&user_led_gpio>; ++ pinctrl-0 = <&sys_led_pin>, <&user_led_pin>; + +- sys-led { ++ sys_led: led-0 { + label = "sys_led"; + linux,default-trigger = "heartbeat"; + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + +- user-led { ++ user_led: led-1 { + label = "user_led"; + default-state = "off"; + gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>; +@@ -586,11 +586,11 @@ + }; + + leds { +- sys_led_gpio: sys_led-gpio { ++ sys_led_pin: sys-led-pin { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led_gpio: user_led-gpio { ++ user_led_pin: user-led-pin { + rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +index 1d246c2caa3c..76a8b40a93c6 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +@@ -117,9 +117,9 @@ + leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&leds_gpio>; ++ pinctrl-0 = <&status_led_pin>; + +- status { ++ status_led: led-0 { + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + label = "status_led"; + linux,default-trigger = "heartbeat"; +@@ -520,7 +520,7 @@ + }; + + gpio-leds { +- leds_gpio: leds-gpio { ++ status_led_pin: status-led-pin { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +index d80d6b726820..a8d363568fd6 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +@@ -15,9 +15,9 @@ + }; + + leds { +- pinctrl-0 = <&led_pin_module>, <&led_sd_haikou>; ++ pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>; + +- sd-card-led { ++ sd_card_led: led-1 { + label = "sd_card_led"; + gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; +@@ -179,7 +179,7 @@ + }; + + leds { +- led_sd_haikou: led-sd-gpio { ++ sd_card_led_pin: sd-card-led-pin { + rockchip,pins = + <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +index 72c06abd27ea..4660416c8f38 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +@@ -11,9 +11,9 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&led_pin_module>; ++ pinctrl-0 = <&module_led_pin>; + +- module-led { ++ module_led: led-0 { + label = "module_led"; + gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; +@@ -450,7 +450,7 @@ + }; + + leds { +- led_pin_module: led-module-gpio { ++ module_led_pin: module-led-pin { + rockchip,pins = + <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +index 59b89d6ccdef..b85ec31cd283 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +@@ -61,23 +61,23 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>, <&yellow_led_gpio>; ++ pinctrl-0 = <&work_led_pin>, <&diy_led_pin>, <&yellow_led_pin>; + +- work-led { ++ work_led: led-0 { + label = "green:work"; + gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + +- diy-led { ++ diy_led: led-1 { + label = "red:diy"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc1"; + }; + +- yellow-led { ++ yellow_led: led-2 { + label = "yellow:yellow-led"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + default-state = "off"; +@@ -595,15 +595,15 @@ + }; + + leds { +- diy_led_gpio: diy_led-gpio { ++ diy_led_pin: diy-led-pin { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- work_led_gpio: work_led-gpio { ++ work_led_pin: work-led-pin { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- yellow_led_gpio: yellow_led-gpio { ++ yellow_led_pin: yellow-led-pin { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +index c84cad16118a..6e553ff47534 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +@@ -39,15 +39,15 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; ++ pinctrl-0 = <&work_led_pin>, <&diy_led_pin>; + +- work-led { ++ work_led: led-0 { + label = "work"; + default-state = "on"; + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; + }; + +- diy-led { ++ diy_led: led-1 { + label = "diy"; + default-state = "off"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; +@@ -588,11 +588,11 @@ + }; + + leds { +- work_led_gpio: work_led-gpio { ++ work_led_pin: work-led-pin { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- diy_led_gpio: diy_led-gpio { ++ diy_led_pin: diy-led-pin { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + +From 21cc12f4a0becd48996323c3cacf8f70433c3760 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sun, 24 May 2020 18:06:35 +0200 +Subject: [PATCH] ARM: dts: rockchip: rename label and nodename pinctrl + subnodes that end with gpio + +A test with the command below gives for example this error: + +arch/arm/boot/dts/rk3288-tinker.dt.yaml: tsadc: otp-gpio: +{'phandle': [[54]], 'rockchip,pins': [[0, 10, 0, 118]]} +is not of type 'array' + +'gpio' is a sort of reserved nodename and should not be used +for pinctrl in combination with 'rockchip,pins', so change +nodes that end with 'gpio' to end with 'pin' or 'pins'. + +make ARCH=arm dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/ +dtschema/schemas/gpio/gpio.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200524160636.16547-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit fff987e7328951f7d6fb2d0545de8635ceafa89f) +--- + arch/arm/boot/dts/rk322x.dtsi | 6 +++--- + arch/arm/boot/dts/rk3288-veyron-jaq.dts | 2 +- + arch/arm/boot/dts/rk3288-veyron-jerry.dts | 2 +- + arch/arm/boot/dts/rk3288-veyron-mighty.dts | 6 +++--- + arch/arm/boot/dts/rk3288-veyron-minnie.dts | 2 +- + arch/arm/boot/dts/rk3288-veyron-pinky.dts | 6 +++--- + arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 2 +- + arch/arm/boot/dts/rk3288-veyron-speedy.dts | 2 +- + arch/arm/boot/dts/rk3288.dtsi | 6 +++--- + arch/arm/boot/dts/rv1108.dtsi | 12 ++++++------ + 10 files changed, 23 insertions(+), 23 deletions(-) + +diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi +index b0fd92befdeb..3236abb0aba9 100644 +--- a/arch/arm/boot/dts/rk322x.dtsi ++++ b/arch/arm/boot/dts/rk322x.dtsi +@@ -520,9 +520,9 @@ + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&otp_gpio>; ++ pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; +- pinctrl-2 = <&otp_gpio>; ++ pinctrl-2 = <&otp_pin>; + #thermal-sensor-cells = <0>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; +@@ -1111,7 +1111,7 @@ + }; + + tsadc { +- otp_gpio: otp-gpio { ++ otp_pin: otp-pin { + rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts +index 171ba6185b6d..8efba9deae3c 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts +@@ -47,7 +47,7 @@ + &sdmmc { + disable-wp; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin + &sdmmc_bus4>; + }; + +diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts +index 66f00d28801a..2c916c50dda5 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts +@@ -192,7 +192,7 @@ + &sdmmc { + disable-wp; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin + &sdmmc_bus4>; + }; + +diff --git a/arch/arm/boot/dts/rk3288-veyron-mighty.dts b/arch/arm/boot/dts/rk3288-veyron-mighty.dts +index 27fbc07476d2..fa695a88f236 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-mighty.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-mighty.dts +@@ -18,8 +18,8 @@ + }; + + &sdmmc { +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio +- &sdmmc_wp_gpio &sdmmc_bus4>; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin ++ &sdmmc_wp_pin &sdmmc_bus4>; + wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>; + + /delete-property/ disable-wp; +@@ -27,7 +27,7 @@ + + &pinctrl { + sdmmc { +- sdmmc_wp_gpio: sdmmc-wp-gpio { ++ sdmmc_wp_pin: sdmmc-wp-pin { + rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts +index 383fad1a88a1..f8b69e0a16a0 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts +@@ -114,7 +114,7 @@ + &sdmmc { + disable-wp; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin + &sdmmc_bus4>; + }; + +diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts +index 71e6629cc208..4e9fdb0f722d 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts +@@ -105,7 +105,7 @@ + }; + + sdmmc { +- sdmmc_wp_gpio: sdmmc-wp-gpio { ++ sdmmc_wp_pin: sdmmc-wp-pin { + rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +@@ -126,8 +126,8 @@ + + &sdmmc { + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio +- &sdmmc_wp_gpio &sdmmc_bus4>; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin ++ &sdmmc_wp_pin &sdmmc_bus4>; + wp-gpios = <&gpio7 RK_PB2 GPIO_ACTIVE_HIGH>; + }; + +diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi +index fe950f9863e8..27fb06ce907e 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi ++++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi +@@ -41,7 +41,7 @@ + }; + + /* This is where we actually hook up CD */ +- sdmmc_cd_gpio: sdmmc-cd-gpio { ++ sdmmc_cd_pin: sdmmc-cd-pin { + rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts +index e354c61a45e7..4a3ea934d03e 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts +@@ -54,7 +54,7 @@ + &sdmmc { + disable-wp; + pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin + &sdmmc_bus4>; + }; + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 2e1edd85f04a..84d59469035e 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -574,9 +574,9 @@ + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&otp_gpio>; ++ pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; +- pinctrl-2 = <&otp_gpio>; ++ pinctrl-2 = <&otp_pin>; + #thermal-sensor-cells = <1>; + rockchip,grf = <&grf>; + rockchip,hw-tshut-temp = <95000>; +@@ -1929,7 +1929,7 @@ + }; + + tsadc { +- otp_gpio: otp-gpio { ++ otp_pin: otp-pin { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi +index f9cfe2c80791..a5d130bd0547 100644 +--- a/arch/arm/boot/dts/rv1108.dtsi ++++ b/arch/arm/boot/dts/rv1108.dtsi +@@ -351,9 +351,9 @@ + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + pinctrl-names = "init", "default", "sleep"; +- pinctrl-0 = <&otp_gpio>; ++ pinctrl-0 = <&otp_pin>; + pinctrl-1 = <&otp_out>; +- pinctrl-2 = <&otp_gpio>; ++ pinctrl-2 = <&otp_pin>; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + rockchip,hw-tshut-temp = <120000>; +@@ -728,7 +728,7 @@ + <0 RK_PC6 3 &pcfg_pull_none>; + }; + +- i2c2m1_gpio: i2c2m1-gpio { ++ i2c2m1_pins: i2c2m1-pins { + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; +@@ -740,7 +740,7 @@ + <1 RK_PD4 2 &pcfg_pull_none>; + }; + +- i2c2m05v_gpio: i2c2m05v-gpio { ++ i2c2m05v_pins: i2c2m05v-pins { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, + <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; +@@ -867,7 +867,7 @@ + rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>; + }; + +- otp_gpio: otp-gpio { ++ otp_pin: otp-pin { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +@@ -886,7 +886,7 @@ + rockchip,pins = <3 RK_PA3 1 &pcfg_pull_none>; + }; + +- uart0_rts_gpio: uart0-rts-gpio { ++ uart0_rts_pin: uart0-rts-pin { + rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + +From 5501ee8504dd2cc8f55cf564572b4e7568fb58c2 Mon Sep 17 00:00:00 2001 +From: Abhishek Pandit-Subedi +Date: Fri, 12 Jun 2020 13:02:48 -0700 +Subject: [PATCH] ARM: dts: rockchip: Add marvell BT irq config + +Veyron Jaq and Mighty both use the Marvel 8897 WiFi+BT chip. Add wakeup +and pinctrl block to devicetree so the btmrvl driver can correctly +configure the wakeup interrupt. + +Signed-off-by: Abhishek Pandit-Subedi +Reviewed-by: Douglas Anderson +Link: https://lore.kernel.org/r/20200612130219.v2.1.I66864be898aa835ccb66b6cd5220d0b082338a81@changeid +Signed-off-by: Heiko Stuebner +(cherry picked from commit 6c2b99a2e7a073575b4ee91abf7d16470991c1f4) +--- + arch/arm/boot/dts/rk3288-veyron-jaq.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts +index 8efba9deae3c..af77ab20586d 100644 +--- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts ++++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts +@@ -44,6 +44,21 @@ + }; + }; + ++&sdio0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ btmrvl: btmrvl@2 { ++ compatible = "marvell,sd8897-bt"; ++ reg = <2>; ++ interrupt-parent = <&gpio4>; ++ interrupts = ; ++ marvell,wakeup-pin = /bits/ 16 <13>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_l>; ++ }; ++}; ++ + &sdmmc { + disable-wp; + pinctrl-names = "default"; + +From b98b61fe61d412492bb63f1fb59e6bdca1fcb45d Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Thu, 4 Jun 2020 09:36:38 +0800 +Subject: [PATCH] dmaengine: pl330: Make sure the debug is idle before doing + DMAGO + +According to the datasheet of pl330: + +Example 2-1 Using DMAGO with the debug instruction registers + +1. Create a program for the DMA channel +2. Store the program in a region of system memory +3. Poll the DBGSTATUS Register to ensure that the debug is idle +4. Write to the DBGINST0 Register +5. Write to the DBGINST1 Register +6. Write zero to the DBGCMD Register + +so, we should make sure the debug is idle before step 4/5/6, not +only step 6. if not, there maybe a risk that fail to write DBGINST0/1. + +Signed-off-by: Sugar Zhang +Link: https://lore.kernel.org/r/1591234598-78919-1-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Vinod Koul +(cherry picked from commit d12ea5591eddf625b7707c018b72e46e8674c3c2) +--- + drivers/dma/pl330.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 88b884cbb7c1..6a158eef6b8a 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -885,6 +885,12 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, + void __iomem *regs = thrd->dmac->base; + u32 val; + ++ /* If timed out due to halted state-machine */ ++ if (_until_dmac_idle(thrd)) { ++ dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); ++ return; ++ } ++ + val = (insn[0] << 16) | (insn[1] << 24); + if (!as_manager) { + val |= (1 << 0); +@@ -895,12 +901,6 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, + val = le32_to_cpu(*((__le32 *)&insn[2])); + writel(val, regs + DBGINST1); + +- /* If timed out due to halted state-machine */ +- if (_until_dmac_idle(thrd)) { +- dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); +- return; +- } +- + /* Get going */ + writel(0, regs + DBGCMD); + } + +From 41e2127ef8f5e49a419d2f0c6bb04f529a7958bb Mon Sep 17 00:00:00 2001 +From: Shunqian Zheng +Date: Fri, 3 Apr 2020 13:15:37 -0300 +Subject: [PATCH] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 + +Designware MIPI D-PHY, used for ISP0 in rk3399. + +Verified with: +make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml + +Signed-off-by: Shunqian Zheng +Signed-off-by: Jacob Chen +Signed-off-by: Helen Koike +Link: https://lore.kernel.org/r/20200403161538.1375908-9-helen.koike@collabora.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit e4bfde13e323f9ee5f2f38aa5cac0676dd656f8e) +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 781b5c2cdb4d..f2ef0d8ba54b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -1397,6 +1397,17 @@ + status = "disabled"; + }; + ++ mipi_dphy_rx0: mipi-dphy-rx0 { ++ compatible = "rockchip,rk3399-mipi-dphy-rx0"; ++ clocks = <&cru SCLK_MIPIDPHY_REF>, ++ <&cru SCLK_DPHY_RX0_CFG>, ++ <&cru PCLK_VIO_GRF>; ++ clock-names = "dphy-ref", "dphy-cfg", "grf"; ++ power-domains = <&power RK3399_PD_VIO>; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ + u2phy0: usb2-phy@e450 { + compatible = "rockchip,rk3399-usb2phy"; + reg = <0xe450 0x10>; + +From 769c26773769a18c6657ffdbe3c27e3f18fb842f Mon Sep 17 00:00:00 2001 +From: Pierre-Louis Bossart +Date: Tue, 7 Jul 2020 14:06:10 -0500 +Subject: [PATCH] ASoC: codecs: es8316: fix 'defined but not used' warning + +Fix W=1 warning + +sound/soc/codecs/es8316.c:842:36: warning: 'es8316_acpi_match' defined +but not used [-Wunused-const-variable=] + 842 | static const struct acpi_device_id es8316_acpi_match[] = { + | ^~~~~~~~~~~~~~~~~ + +Signed-off-by: Pierre-Louis Bossart +Link: https://lore.kernel.org/r/20200707190612.97799-12-pierre-louis.bossart@linux.intel.com +Signed-off-by: Mark Brown +(cherry picked from commit 07ac670981fc5932ca3799ce7d96431d80afce0e) +--- + sound/soc/codecs/es8316.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/sound/soc/codecs/es8316.c b/sound/soc/codecs/es8316.c +index 36eef1fb3d18..70af35c5f727 100644 +--- a/sound/soc/codecs/es8316.c ++++ b/sound/soc/codecs/es8316.c +@@ -839,11 +839,13 @@ static const struct of_device_id es8316_of_match[] = { + }; + MODULE_DEVICE_TABLE(of, es8316_of_match); + ++#ifdef CONFIG_ACPI + static const struct acpi_device_id es8316_acpi_match[] = { + {"ESSX8316", 0}, + {}, + }; + MODULE_DEVICE_TABLE(acpi, es8316_acpi_match); ++#endif + + static struct i2c_driver es8316_i2c_driver = { + .driver = { + +From 168750c814b2aa91f3c31502c882cd946709c733 Mon Sep 17 00:00:00 2001 +From: Vinod Koul +Date: Wed, 8 Jul 2020 18:58:07 +0530 +Subject: [PATCH] phy: rockchip-typec: use correct format for structure + description + +We get warning with W=1 build: +drivers/phy/rockchip/phy-rockchip-typec.c:360: warning: cannot +understand function prototype: 'struct rockchip_usb3phy_port_cfg ' + +The 'struct rockchip_usb3phy_port_cfg ' is commented properly but uses +wrong format, so fix that up + +Link: https://lore.kernel.org/r/20200708132809.265967-4-vkoul@kernel.org +Signed-off-by: Vinod Koul +(cherry picked from commit 72fbf95f36218ec2a901e0eb7c3aa0bea6f1f396) +--- + drivers/phy/rockchip/phy-rockchip-typec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c +index 24563160197f..70a31251b202 100644 +--- a/drivers/phy/rockchip/phy-rockchip-typec.c ++++ b/drivers/phy/rockchip/phy-rockchip-typec.c +@@ -347,7 +347,7 @@ struct usb3phy_reg { + }; + + /** +- * struct rockchip_usb3phy_port_cfg: usb3-phy port configuration. ++ * struct rockchip_usb3phy_port_cfg - usb3-phy port configuration. + * @reg: the base address for usb3-phy config. + * @typec_conn_dir: the register of type-c connector direction. + * @usb3tousb2_en: the register of type-c force usb2 to usb2 enable. + +From 2bf866df390e99598321d05a0254e4035b8d8f32 Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Mon, 13 Jul 2020 18:26:00 +0800 +Subject: [PATCH] ASoC: rockchip: spdif: Handle clk by pm runtime + +This patch handle the clk by pm runtime mechanism to simplify +the clk management. + +Signed-off-by: Sugar Zhang +Link: https://lore.kernel.org/r/1594635960-67855-1-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Mark Brown +(cherry picked from commit f50d67f9eff62f8078fe6e98ede3f4fb1defc361) +--- + sound/soc/rockchip/rockchip_spdif.c | 59 +++++++++++-------------------------- + 1 file changed, 17 insertions(+), 42 deletions(-) + +diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c +index 6635145a26c4..674810851fbc 100644 +--- a/sound/soc/rockchip/rockchip_spdif.c ++++ b/sound/soc/rockchip/rockchip_spdif.c +@@ -306,44 +306,22 @@ static int rk_spdif_probe(struct platform_device *pdev) + return -ENOMEM; + + spdif->hclk = devm_clk_get(&pdev->dev, "hclk"); +- if (IS_ERR(spdif->hclk)) { +- dev_err(&pdev->dev, "Can't retrieve rk_spdif bus clock\n"); ++ if (IS_ERR(spdif->hclk)) + return PTR_ERR(spdif->hclk); +- } +- ret = clk_prepare_enable(spdif->hclk); +- if (ret) { +- dev_err(spdif->dev, "hclock enable failed %d\n", ret); +- return ret; +- } + + spdif->mclk = devm_clk_get(&pdev->dev, "mclk"); +- if (IS_ERR(spdif->mclk)) { +- dev_err(&pdev->dev, "Can't retrieve rk_spdif master clock\n"); +- ret = PTR_ERR(spdif->mclk); +- goto err_disable_hclk; +- } +- +- ret = clk_prepare_enable(spdif->mclk); +- if (ret) { +- dev_err(spdif->dev, "clock enable failed %d\n", ret); +- goto err_disable_clocks; +- } ++ if (IS_ERR(spdif->mclk)) ++ return PTR_ERR(spdif->mclk); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + regs = devm_ioremap_resource(&pdev->dev, res); +- if (IS_ERR(regs)) { +- ret = PTR_ERR(regs); +- goto err_disable_clocks; +- } ++ if (IS_ERR(regs)) ++ return PTR_ERR(regs); + + spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs, + &rk_spdif_regmap_config); +- if (IS_ERR(spdif->regmap)) { +- dev_err(&pdev->dev, +- "Failed to initialise managed register map\n"); +- ret = PTR_ERR(spdif->regmap); +- goto err_disable_clocks; +- } ++ if (IS_ERR(spdif->regmap)) ++ return PTR_ERR(spdif->regmap); + + spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR; + spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; +@@ -352,47 +330,44 @@ static int rk_spdif_probe(struct platform_device *pdev) + spdif->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, spdif); + +- pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); +- pm_request_idle(&pdev->dev); ++ if (!pm_runtime_enabled(&pdev->dev)) { ++ ret = rk_spdif_runtime_resume(&pdev->dev); ++ if (ret) ++ goto err_pm_runtime; ++ } + + ret = devm_snd_soc_register_component(&pdev->dev, + &rk_spdif_component, + &rk_spdif_dai, 1); + if (ret) { + dev_err(&pdev->dev, "Could not register DAI\n"); +- goto err_pm_runtime; ++ goto err_pm_suspend; + } + + ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); + if (ret) { + dev_err(&pdev->dev, "Could not register PCM\n"); +- goto err_pm_runtime; ++ goto err_pm_suspend; + } + + return 0; + ++err_pm_suspend: ++ if (!pm_runtime_status_suspended(&pdev->dev)) ++ rk_spdif_runtime_suspend(&pdev->dev); + err_pm_runtime: + pm_runtime_disable(&pdev->dev); +-err_disable_clocks: +- clk_disable_unprepare(spdif->mclk); +-err_disable_hclk: +- clk_disable_unprepare(spdif->hclk); + + return ret; + } + + static int rk_spdif_remove(struct platform_device *pdev) + { +- struct rk_spdif_dev *spdif = dev_get_drvdata(&pdev->dev); +- + pm_runtime_disable(&pdev->dev); + if (!pm_runtime_status_suspended(&pdev->dev)) + rk_spdif_runtime_suspend(&pdev->dev); + +- clk_disable_unprepare(spdif->mclk); +- clk_disable_unprepare(spdif->hclk); +- + return 0; + } + + +From fb8424e2b2c666f57f82363939bbe9ae7c12b88b Mon Sep 17 00:00:00 2001 +From: Katsuhiro Suzuki +Date: Tue, 14 Jul 2020 16:32:47 +0900 +Subject: [PATCH] ASoC: convert rk3328 codec binding to yaml + +This patch converts Rockchip rk3328 audio codec binding to DT schema. +And adds description about "mclk" clock and fixes some errors in +original example. + +Signed-off-by: Katsuhiro Suzuki +Reviewed-by: Rob Herring +Link: https://lore.kernel.org/r/20200714073247.172859-1-katsuhiro@katsuster.net +Signed-off-by: Mark Brown +(cherry picked from commit 3f6597ad2f9ed8ed89dbd2a9ec0b0c892774f9d2) +--- + .../bindings/sound/rockchip,rk3328-codec.txt | 28 --------- + .../bindings/sound/rockchip,rk3328-codec.yaml | 69 ++++++++++++++++++++++ + 2 files changed, 69 insertions(+), 28 deletions(-) + delete mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt + create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml + +diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt +deleted file mode 100644 +index 1ecd75d2032a..000000000000 +--- a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt ++++ /dev/null +@@ -1,28 +0,0 @@ +-* Rockchip Rk3328 internal codec +- +-Required properties: +- +-- compatible: "rockchip,rk3328-codec" +-- reg: physical base address of the controller and length of memory mapped +- region. +-- rockchip,grf: the phandle of the syscon node for GRF register. +-- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. +-- clock-names: should be "pclk". +-- spk-depop-time-ms: speak depop time msec. +- +-Optional properties: +- +-- mute-gpios: GPIO specifier for external line driver control (typically the +- dedicated GPIO_MUTE pin) +- +-Example for rk3328 internal codec: +- +-codec: codec@ff410000 { +- compatible = "rockchip,rk3328-codec"; +- reg = <0x0 0xff410000 0x0 0x1000>; +- rockchip,grf = <&grf>; +- clocks = <&cru PCLK_ACODEC>; +- clock-names = "pclk"; +- mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; +- spk-depop-time-ms = 100; +-}; +diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml +new file mode 100644 +index 000000000000..5b85ad5e4834 +--- /dev/null ++++ b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml +@@ -0,0 +1,69 @@ ++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/sound/rockchip,rk3328-codec.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Rockchip rk3328 internal codec ++ ++maintainers: ++ - Heiko Stuebner ++ ++properties: ++ compatible: ++ const: rockchip,rk3328-codec ++ ++ reg: ++ maxItems: 1 ++ ++ clocks: ++ items: ++ - description: clock for audio codec ++ - description: clock for I2S master clock ++ ++ clock-names: ++ items: ++ - const: pclk ++ - const: mclk ++ ++ rockchip,grf: ++ $ref: /schemas/types.yaml#/definitions/phandle ++ description: ++ The phandle of the syscon node for the GRF register. ++ ++ spk-depop-time-ms: ++ default: 200 ++ description: ++ Speaker depop time in msec. ++ ++ mute-gpios: ++ maxItems: 1 ++ description: ++ GPIO specifier for external line driver control (typically the ++ dedicated GPIO_MUTE pin) ++ ++ "#sound-dai-cells": ++ const: 0 ++ ++required: ++ - compatible ++ - reg ++ - clocks ++ - clock-names ++ - rockchip,grf ++ - "#sound-dai-cells" ++ ++examples: ++ - | ++ #include ++ #include ++ codec: codec@ff410000 { ++ compatible = "rockchip,rk3328-codec"; ++ reg = <0xff410000 0x1000>; ++ clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>; ++ clock-names = "pclk", "mclk"; ++ rockchip,grf = <&grf>; ++ mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; ++ spk-depop-time-ms = <100>; ++ #sound-dai-cells = <0>; ++ }; + +From 0af70ee151c875caa591c2d5d3115f7c807ef228 Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Mon, 29 Jun 2020 22:05:42 +0800 +Subject: [PATCH] dmaengine: pl330: Remove the burst limit for quirk + 'NO-FLUSHP' + +There is no reason to limit the performance on the 'NO-FLUSHP' SoCs, +because 'FLUSHP' instruction is broken on these platforms, so remove +the limit to improve the efficiency. + +Signed-off-by: Sugar Zhang +Link: https://lore.kernel.org/r/1593439555-68130-2-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Vinod Koul +(cherry picked from commit 05611a93b8ffa3fe7d2eb43dd6c11e37ead5908a) +--- + drivers/dma/pl330.c | 10 ++-------- + 1 file changed, 2 insertions(+), 8 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 6a158eef6b8a..7686292bc1db 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1183,9 +1183,6 @@ static inline int _ldst_peripheral(struct pl330_dmac *pl330, + { + int off = 0; + +- if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) +- cond = BURST; +- + /* + * do FLUSHP at beginning to clear any stale dma requests before the + * first WFP. +@@ -2221,9 +2218,7 @@ static bool pl330_prep_slave_fifo(struct dma_pl330_chan *pch, + + static int fixup_burst_len(int max_burst_len, int quirks) + { +- if (quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) +- return 1; +- else if (max_burst_len > PL330_MAX_BURST) ++ if (max_burst_len > PL330_MAX_BURST) + return PL330_MAX_BURST; + else if (max_burst_len < 1) + return 1; +@@ -3128,8 +3123,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + pd->dst_addr_widths = PL330_DMA_BUSWIDTHS; + pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); + pd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; +- pd->max_burst = ((pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ? +- 1 : PL330_MAX_BURST); ++ pd->max_burst = PL330_MAX_BURST; + + ret = dma_async_device_register(pd); + if (ret) { + +From eaedb49ad444ff15939418b10d758395b2c2885f Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Mon, 29 Jun 2020 22:05:43 +0800 +Subject: [PATCH] dmaengine: pl330: Improve transfer efficiency for the dregs + +Only the unaligned burst transfers have the dregs. +so, still use BURST transfer with a reduced size +for better performance. + +Signed-off-by: Sugar Zhang +Link: https://lore.kernel.org/r/1593439555-68130-3-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Vinod Koul +(cherry picked from commit 3e7f0bd872087bf4653eeee9a83050f91baae907) +--- + drivers/dma/pl330.c | 32 +++++++++++++++++++++----------- + 1 file changed, 21 insertions(+), 11 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 7686292bc1db..f1f0176c6c05 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1228,8 +1228,9 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], + } + + /* +- * transfer dregs with single transfers to peripheral, or a reduced size burst +- * for mem-to-mem. ++ * only the unaligned burst transfers have the dregs. ++ * so, still transfer dregs with a reduced size burst ++ * for mem-to-mem, mem-to-dev or dev-to-mem. + */ + static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[], + const struct _xfer_spec *pxs, int transfer_length) +@@ -1240,22 +1241,31 @@ static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[], + if (transfer_length == 0) + return off; + ++ /* ++ * dregs_len = (total bytes - BURST_TO_BYTE(bursts, ccr)) / ++ * BRST_SIZE(ccr) ++ * the dregs len must be smaller than burst len, ++ * so, for higher efficiency, we can modify CCR ++ * to use a reduced size burst len for the dregs. ++ */ ++ dregs_ccr = pxs->ccr; ++ dregs_ccr &= ~((0xf << CC_SRCBRSTLEN_SHFT) | ++ (0xf << CC_DSTBRSTLEN_SHFT)); ++ dregs_ccr |= (((transfer_length - 1) & 0xf) << ++ CC_SRCBRSTLEN_SHFT); ++ dregs_ccr |= (((transfer_length - 1) & 0xf) << ++ CC_DSTBRSTLEN_SHFT); ++ + switch (pxs->desc->rqtype) { + case DMA_MEM_TO_DEV: + /* fall through */ + case DMA_DEV_TO_MEM: +- off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, +- transfer_length, SINGLE); ++ off += _emit_MOV(dry_run, &buf[off], CCR, dregs_ccr); ++ off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, 1, ++ BURST); + break; + + case DMA_MEM_TO_MEM: +- dregs_ccr = pxs->ccr; +- dregs_ccr &= ~((0xf << CC_SRCBRSTLEN_SHFT) | +- (0xf << CC_DSTBRSTLEN_SHFT)); +- dregs_ccr |= (((transfer_length - 1) & 0xf) << +- CC_SRCBRSTLEN_SHFT); +- dregs_ccr |= (((transfer_length - 1) & 0xf) << +- CC_DSTBRSTLEN_SHFT); + off += _emit_MOV(dry_run, &buf[off], CCR, dregs_ccr); + off += _ldst_memtomem(dry_run, &buf[off], pxs, 1); + break; + +From a2321c41b827bf897f39ab2e0049fb3c69cdcfd2 Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Mon, 29 Jun 2020 22:05:45 +0800 +Subject: [PATCH] dmaengine: pl330: Add quirk 'arm,pl330-periph-burst' + +This patch adds the qurik to use burst transfers only +for pl330 controller, even for request with a length of 1. + +Although, the correct way should be: if the peripheral request +length is 1, the peripheral should use SINGLE request, and then +notify the dmac using SINGLE mode by src/dst_maxburst with 1. + +For example, on the Rockchip SoCs, all the peripherals can use +SINGLE or BURST request by setting GRF registers. it is possible +that if these peripheral drivers are used only for Rockchip SoCs. +Unfortunately, it's not, such as dw uart, which is used so widely, +and we can't set src/dst_maxburst according to the SoCs' specific +to compatible with all the other SoCs. + +So, for convenience, all the peripherals are set as BURST request +by default on the Rockchip SoCs. even for request with a length of 1. +the current pl330 driver will perform SINGLE transfer if the client's +maxburst is 1, which still should be working according to chapter 2.6.6 +of datasheet which describe how DMAC performs SINGLE transfers for +a BURST request. Unfortunately, it's broken on the Rockchip SoCs, +which support only matching transfers, such as BURST transfer for +BURST request, SINGLE transfer for SINGLE request. + +Finally, we add the quirk to specify pl330 to use burst transfers only. + +Signed-off-by: Sugar Zhang +Link: https://lore.kernel.org/r/1593439555-68130-5-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Vinod Koul +(cherry picked from commit 5fb9e3a3423313fe6169d5069e471bfdab6e0b79) +--- + drivers/dma/pl330.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index f1f0176c6c05..3be8d462eab4 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -33,7 +33,8 @@ + #define PL330_MAX_PERI 32 + #define PL330_MAX_BURST 16 + +-#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0) ++#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0) ++#define PL330_QUIRK_PERIPH_BURST BIT(1) + + enum pl330_cachectrl { + CCTRL0, /* Noncacheable and nonbufferable */ +@@ -509,6 +510,10 @@ static struct pl330_of_quirks { + { + .quirk = "arm,pl330-broken-no-flushp", + .id = PL330_QUIRK_BROKEN_NO_FLUSHP, ++ }, ++ { ++ .quirk = "arm,pl330-periph-burst", ++ .id = PL330_QUIRK_PERIPH_BURST, + } + }; + +@@ -1206,6 +1211,9 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], + int off = 0; + enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; + ++ if (pl330->quirks & PL330_QUIRK_PERIPH_BURST) ++ cond = BURST; ++ + switch (pxs->desc->rqtype) { + case DMA_MEM_TO_DEV: + /* fall through */ + +From c8c01a9881647f07fbd0a5a0b2dc316c89ec8198 Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Tue, 14 Jul 2020 12:15:34 +0100 +Subject: [PATCH] dmaengine: pl330: Demote obvious misuse of kerneldoc to + standard comment block + +No 'struct' title is provided. Nor are any attribute descriptions. + +Fixes the following W=1 kernel build warning(s): + + drivers/dma/pl330.c:295: warning: cannot understand function prototype: 'struct pl330_reqcfg ' + +Signed-off-by: Lee Jones +Cc: Philipp Zabel +Cc: Jaswinder Singh +Link: https://lore.kernel.org/r/20200714111546.1755231-6-lee.jones@linaro.org +Signed-off-by: Vinod Koul +(cherry picked from commit f9e036df575d8efce6fd469acd9df3148c2adf6e) +--- + drivers/dma/pl330.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 3be8d462eab4..2c508ee672b9 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -285,7 +285,7 @@ struct pl330_config { + u32 irq_ns; + }; + +-/** ++/* + * Request Configuration. + * The PL330 core does not modify this and uses the last + * working configuration if the request doesn't provide any. + +From 0d6ca0a2c723ee54eb279942db95274fdccb525c Mon Sep 17 00:00:00 2001 +From: Kuninori Morimoto +Date: Thu, 9 Jul 2020 10:55:36 +0900 +Subject: [PATCH] ASoC: hdmi-codec: return -ENOTSUPP for digital_mute + +snd_soc_dai_digital_mute() will return -ENOTSUPP if driver doesn't +support mute. +In hdmi-codec case, hdmi_codec_digital_mute() will be used for it, +and each driver has .digital_mute() callback. +hdmi_codec_digital_mute() want to return -ENOTSUPP to follow it. + +Signed-off-by: Kuninori Morimoto +Link: https://lore.kernel.org/r/87fta1xxjc.wl-kuninori.morimoto.gx@renesas.com +Signed-off-by: Mark Brown +(cherry picked from commit e07e49c0d1e3693facf588142c4cbde45904b3f8) +--- + sound/soc/codecs/hdmi-codec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c +index f005751da2cc..926ab447a96b 100644 +--- a/sound/soc/codecs/hdmi-codec.c ++++ b/sound/soc/codecs/hdmi-codec.c +@@ -566,7 +566,7 @@ static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute) + return hcp->hcd.ops->digital_mute(dai->dev->parent, + hcp->hcd.data, mute); + +- return 0; ++ return -ENOTSUPP; + } + + static const struct snd_soc_dai_ops hdmi_codec_i2s_dai_ops = { + +From 302002cea0d7b39f8274d1466b8b6184d5687f86 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Wed, 15 Jul 2020 09:09:54 +0200 +Subject: [PATCH] arm64: dts: rockchip: remove bus-width from mmc nodes in px30 + dts files + +'bus-width' has been added to px30.dtsi mmc nodes, so now it can be +removed from the dts files that include it. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200715070954.1992-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit e7e46a1f6b755248058db531b1cff3b0cc580650) +--- + arch/arm64/boot/dts/rockchip/px30-evb.dts | 3 --- + arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 1 - + 2 files changed, 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts +index 0a680257d9c2..5fe905fae9a8 100644 +--- a/arch/arm64/boot/dts/rockchip/px30-evb.dts ++++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts +@@ -145,7 +145,6 @@ + }; + + &emmc { +- bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + non-removable; +@@ -499,7 +498,6 @@ + }; + + &sdmmc { +- bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <800>; +@@ -513,7 +511,6 @@ + }; + + &sdio { +- bus-width = <4>; + cap-sd-highspeed; + keep-power-in-suspend; + non-removable; +diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +index b3a8f936578f..35bd6b904b9c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +@@ -445,7 +445,6 @@ + }; + + &sdmmc { +- bus-width = <4>; + cap-sd-highspeed; + card-detect-delay = <200>; + cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ + +From 2998dd296342e93744c25268f5103cc628e0f004 Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Mon, 29 Jun 2020 22:12:11 +0800 +Subject: [PATCH] arm64: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac + +This patch Add the quirk to specify to use burst transfer +for better compatible and higher performance. + +Signed-off-by: Sugar Zhang + +Link: https://lore.kernel.org/r/1593439935-68540-1-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 505af9184ec0a0222bb883486137fac32731e01d) +--- + arch/arm64/boot/dts/rockchip/px30.dtsi | 1 + + arch/arm64/boot/dts/rockchip/rk3308.dtsi | 2 ++ + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 + + arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++ + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ + 5 files changed, 8 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi +index e9bb2b97ae55..2695ea8cda14 100644 +--- a/arch/arm64/boot/dts/rockchip/px30.dtsi ++++ b/arch/arm64/boot/dts/rockchip/px30.dtsi +@@ -714,6 +714,7 @@ + reg = <0x0 0xff240000 0x0 0x4000>; + interrupts = , + ; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC>; + clock-names = "apb_pclk"; + #dma-cells = <1>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi +index ba1c71568164..e8b754d415d8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi +@@ -524,6 +524,7 @@ + reg = <0x0 0xff2c0000 0x0 0x4000>; + interrupts = , + ; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; +@@ -534,6 +535,7 @@ + reg = <0x0 0xff2d0000 0x0 0x4000>; + interrupts = , + ; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index 72e655020560..bbdb19a3e85d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -153,6 +153,7 @@ + reg = <0x0 0xff1f0000 0x0 0x4000>; + interrupts = , + ; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC>; + clock-names = "apb_pclk"; + #dma-cells = <1>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi +index 5d25a9d04051..3746f23dc3df 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi +@@ -149,6 +149,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC_PERI>; + clock-names = "apb_pclk"; + }; +@@ -160,6 +161,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC_BUS>; + clock-names = "apb_pclk"; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index f2ef0d8ba54b..ada724b12f01 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -209,6 +209,7 @@ + interrupts = , + ; + #dma-cells = <1>; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC0_PERILP>; + clock-names = "apb_pclk"; + }; +@@ -219,6 +220,7 @@ + interrupts = , + ; + #dma-cells = <1>; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1_PERILP>; + clock-names = "apb_pclk"; + }; + +From bdb45209dbe7864cf6d04c4ae32d207e580ffbd0 Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Mon, 29 Jun 2020 22:10:57 +0800 +Subject: [PATCH] ARM: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac + +This patch Add the quirk to specify to use burst transfer +for better compatible and higher performance. + +Signed-off-by: Sugar Zhang + +Link: https://lore.kernel.org/r/1593439866-68459-1-git-send-email-sugar.zhang@rock-chips.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit fb082df317823463eaf09ac88de19fb3319e4f58) +--- + arch/arm/boot/dts/rk3036.dtsi | 1 + + arch/arm/boot/dts/rk322x.dtsi | 1 + + arch/arm/boot/dts/rk3288.dtsi | 3 +++ + arch/arm/boot/dts/rk3xxx.dtsi | 3 +++ + arch/arm/boot/dts/rv1108.dtsi | 1 + + 5 files changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi +index d9a0c9a29b68..093567022386 100644 +--- a/arch/arm/boot/dts/rk3036.dtsi ++++ b/arch/arm/boot/dts/rk3036.dtsi +@@ -67,6 +67,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC2>; + clock-names = "apb_pclk"; + }; +diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi +index 3236abb0aba9..48e6e8d44a1a 100644 +--- a/arch/arm/boot/dts/rk322x.dtsi ++++ b/arch/arm/boot/dts/rk322x.dtsi +@@ -107,6 +107,7 @@ + interrupts = , + ; + #dma-cells = <1>; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC>; + clock-names = "apb_pclk"; + }; +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 84d59469035e..9fa11b9f4522 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -167,6 +167,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC2>; + clock-names = "apb_pclk"; + }; +@@ -178,6 +179,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + status = "disabled"; +@@ -190,6 +192,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + }; +diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi +index d929b60517ab..859a7477909f 100644 +--- a/arch/arm/boot/dts/rk3xxx.dtsi ++++ b/arch/arm/boot/dts/rk3xxx.dtsi +@@ -45,6 +45,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMA1>; + clock-names = "apb_pclk"; + }; +@@ -56,6 +57,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMA1>; + clock-names = "apb_pclk"; + status = "disabled"; +@@ -68,6 +70,7 @@ + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMA2>; + clock-names = "apb_pclk"; + }; +diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi +index a5d130bd0547..a1a08cb9364e 100644 +--- a/arch/arm/boot/dts/rv1108.dtsi ++++ b/arch/arm/boot/dts/rv1108.dtsi +@@ -97,6 +97,7 @@ + interrupts = ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; ++ arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC>; + clock-names = "apb_pclk"; + }; + +From c731874b9b0b7cb275d9cebd9ceb4a7dbc78d9cd Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Wed, 15 Jul 2020 14:04:12 +0530 +Subject: [PATCH] ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM + +I2C nodes and associated slave devices defined in Carrier board +are specific to rk3399pro vmrac SOM. + +So, move them into SOM dtsi. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200715083418.112003-2-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit c2f343510d99ab53b46bdfeb184cb48f622e6943) +--- + .../boot/dts/rockchip-radxa-dalang-carrier.dtsi | 32 ---------------------- + .../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 29 ++++++++++++++++++++ + 2 files changed, 29 insertions(+), 32 deletions(-) + +diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +index df3712aedf8a..176b53b8e41a 100644 +--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi ++++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +@@ -17,29 +17,6 @@ + status = "okay"; + }; + +-&i2c1 { +- status = "okay"; +- i2c-scl-rising-time-ns = <140>; +- i2c-scl-falling-time-ns = <30>; +-}; +- +-&i2c2 { +- status = "okay"; +- clock-frequency = <400000>; +- +- hym8563: hym8563@51 { +- compatible = "haoyu,hym8563"; +- reg = <0x51>; +- #clock-cells = <0>; +- clock-frequency = <32768>; +- clock-output-names = "hym8563"; +- pinctrl-names = "default"; +- pinctrl-0 = <&hym8563_int>; +- interrupt-parent = <&gpio4>; +- interrupts = <30 IRQ_TYPE_LEVEL_LOW>; +- }; +-}; +- + &pwm0 { + status = "okay"; + }; +@@ -70,12 +47,3 @@ + &uart2 { + status = "okay"; + }; +- +-&pinctrl { +- hym8563 { +- hym8563_int: hym8563-int { +- rockchip,pins = +- <4 RK_PD6 0 &pcfg_pull_up>; +- }; +- }; +-}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index 0a516334f15f..e11538171e67 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -297,6 +297,29 @@ + }; + }; + ++&i2c1 { ++ i2c-scl-falling-time-ns = <30>; ++ i2c-scl-rising-time-ns = <140>; ++ status = "okay"; ++}; ++ ++&i2c2 { ++ clock-frequency = <400000>; ++ status = "okay"; ++ ++ hym8563: hym8563@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ interrupt-parent = <&gpio4>; ++ interrupts = ; ++ }; ++}; ++ + &io_domains { + status = "okay"; + bt656-supply = <&vcca_1v8>; +@@ -324,6 +347,12 @@ + }; + + &pinctrl { ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>; ++ }; ++ }; ++ + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + +From 9f90d56d4ad373cf51dffb34e5288e7b8e83840c Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Wed, 15 Jul 2020 14:04:13 +0530 +Subject: [PATCH] arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, + properties + +Fix node, properties sorting on RockPI N10 board dts(i) files. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200715083418.112003-3-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 3047b384a74090f09b994298eb5c40986275233a) +--- + .../boot/dts/rockchip/rk3399pro-rock-pi-n10.dts | 2 +- + .../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 35 +++++++++++----------- + 2 files changed, 18 insertions(+), 19 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts +index a1783e7f769a..539f4005386d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts +@@ -8,8 +8,8 @@ + /dts-v1/; + #include "rk3399.dtsi" + #include "rk3399-opp.dtsi" +-#include "rk3399pro-vmarc-som.dtsi" + #include ++#include "rk3399pro-vmarc-som.dtsi" + + / { + model = "Radxa ROCK Pi N10"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index e11538171e67..121a430d6a70 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -76,8 +76,8 @@ + + &i2c0 { + clock-frequency = <400000>; +- i2c-scl-rising-time-ns = <180>; + i2c-scl-falling-time-ns = <30>; ++ i2c-scl-rising-time-ns = <180>; + status = "okay"; + + rk809: pmic@20 { +@@ -323,8 +323,22 @@ + &io_domains { + status = "okay"; + bt656-supply = <&vcca_1v8>; +- sdmmc-supply = <&vccio_sd>; + gpio1830-supply = <&vccio_3v0>; ++ sdmmc-supply = <&vccio_sd>; ++}; ++ ++&pinctrl { ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>; ++ }; ++ }; + }; + + &pmu_io_domains { +@@ -341,22 +355,7 @@ + }; + + &tsadc { +- status = "okay"; + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <1>; +-}; +- +-&pinctrl { +- hym8563 { +- hym8563_int: hym8563-int { +- rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>; +- }; +- }; +- +- pmic { +- pmic_int_l: pmic-int-l { +- rockchip,pins = +- <1 RK_PC2 0 &pcfg_pull_up>; +- }; +- }; ++ status = "okay"; + }; + +From af119e1d768dcbebf778716c5318b896132d9b35 Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Wed, 15 Jul 2020 14:04:14 +0530 +Subject: [PATCH] arm64: dts: rk3399pro: vmarc-som: Move supply regulators into + Carrier + +Supply regulators are common across different variants of vmarc SOM's +since the Type C power controller IC is part of the carrier board. + +So, move the supply regulators into carrier board dtsi. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200715083418.112003-4-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 4a3ca113c0f3a2ce33e51fc6a48a121b2d707d4f) +--- + arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi | 19 +++++++++++++++++++ + arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 19 ------------------- + 2 files changed, 19 insertions(+), 19 deletions(-) + +diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +index 176b53b8e41a..00b200a62263 100644 +--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi ++++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +@@ -11,6 +11,25 @@ + chosen { + stdout-path = "serial2:1500000n8"; + }; ++ ++ vcc12v_dcin: vcc12v-dcin-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; + }; + + &gmac { +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index 121a430d6a70..d8fa8127d9dc 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -18,25 +18,6 @@ + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; +- +- vcc12v_dcin: vcc12v-dcin-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc12v_dcin"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <12000000>; +- regulator-max-microvolt = <12000000>; +- }; +- +- vcc5v0_sys: vcc5v0-sys-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_sys"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc12v_dcin>; +- }; + }; + + &cpu_l0 { + +From 5bd86db05f58c75af3819ed6d28db6d87e408c96 Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Wed, 15 Jul 2020 14:04:15 +0530 +Subject: [PATCH] arm64: dts: rk3399pro: vmarc-som: Move common properties into + Carrier + +Some of gmac, sdmmc node properties are common across rk3288 and +rk3399pro SOM's so move them into Carrier dtsi. + +Chosen node is specific to rk3399pro configure SBC, so move it into +RockPI N10 dts. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit a66bd94d0eac017e4846658750acaca2937555bb) +--- + .../arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi | 18 ++++++++++++++---- + .../boot/dts/rockchip/rk3399pro-rock-pi-n10.dts | 4 ++++ + .../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 21 +++++---------------- + 3 files changed, 23 insertions(+), 20 deletions(-) + +diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +index 00b200a62263..450e5bb5af0b 100644 +--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi ++++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +@@ -8,8 +8,11 @@ + #include + + / { +- chosen { +- stdout-path = "serial2:1500000n8"; ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; + }; + + vcc12v_dcin: vcc12v-dcin-regulator { +@@ -33,6 +36,15 @@ + }; + + &gmac { ++ assigned-clock-parents = <&clkin_gmac>; ++ clock_in_out = "input"; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x28>; ++ rx_delay = <0x11>; + status = "okay"; + }; + +@@ -48,10 +60,8 @@ + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; +- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + vqmmc-supply = <&vccio_sd>; +- max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts +index 539f4005386d..369de5dc0ebd 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts +@@ -15,4 +15,8 @@ + model = "Radxa ROCK Pi N10"; + compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som", + "rockchip,rk3399pro"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index d8fa8127d9dc..37ed95d5f7e9 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -11,13 +11,6 @@ + + / { + compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; +- +- clkin_gmac: external-gmac-clock { +- compatible = "fixed-clock"; +- clock-frequency = <125000000>; +- clock-output-names = "clkin_gmac"; +- #clock-cells = <0>; +- }; + }; + + &cpu_l0 { +@@ -42,17 +35,8 @@ + + &gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; +- assigned-clock-parents = <&clkin_gmac>; +- clock_in_out = "input"; + phy-supply = <&vcc_lan>; +- phy-mode = "rgmii"; +- pinctrl-names = "default"; +- pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; +- snps,reset-active-low; +- snps,reset-delays-us = <0 10000 50000>; +- tx_delay = <0x28>; +- rx_delay = <0x11>; + }; + + &i2c0 { +@@ -335,6 +319,11 @@ + status = "okay"; + }; + ++&sdmmc { ++ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; ++ max-frequency = <150000000>; ++}; ++ + &tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <1>; + +From 1b73fa113236dfaa889027bb2c133e349568da14 Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Wed, 15 Jul 2020 14:04:16 +0530 +Subject: [PATCH] dt-bindings: arm: rockchip: Add Rock Pi N8 binding + +Rock Pi N8 is a Rockchip RK3288 based SBC, which has +- VMARC RK3288 SOM (as per SMARC standard) from Vamrs. +- Compatible carrier board from Radxa. + +VMARC RK3288 SOM need to mount on top of dalang carrier +board for making Rock PI N8 SBC. + +Add dt-bindings for it. + +Signed-off-by: Jagan Teki +Reviewed-by: Rob Herring +Link: https://lore.kernel.org/r/20200715083418.112003-6-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 09ee4794270f0010c6397163f033f883f5bff1aa) +--- + Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml +index d4a4045092df..db2e35796795 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.yaml ++++ b/Documentation/devicetree/bindings/arm/rockchip.yaml +@@ -435,6 +435,12 @@ properties: + - const: radxa,rockpi4 + - const: rockchip,rk3399 + ++ - description: Radxa ROCK Pi N8 ++ items: ++ - const: radxa,rockpi-n8 ++ - const: vamrs,rk3288-vmarc-som ++ - const: rockchip,rk3288 ++ + - description: Radxa ROCK Pi N10 + items: + - const: radxa,rockpi-n10 + +From e3b88d81f3f782d8a899bda98b167a628ab7178b Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Wed, 15 Jul 2020 14:04:17 +0530 +Subject: [PATCH] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support + +VMARC RK3288 SOM is a standard SMARC SOM design with +Rockchip RK3288 SoC, which is designed by Vamrs. + +Specification: +- Rockchip RK3288 +- PMIC: RK808 +- eMMC: 16GB/32GB/64GB +- SD slot +- 2xUSB-2.0, 1xUSB3.0 +- USB-C for power supply +- Ethernet +- HDMI, MIPI-DSI/CSI, eDP + +Add initial support for VMARC RK3288 SOM, this would use +with associated carrier board. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200715083418.112003-7-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit b8c564d4fa76b1314a10585eea8e97b8c621a77a) +--- + arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270 ++++++++++++++++++++++++++++++++ + 1 file changed, 270 insertions(+) + create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi + +diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi +new file mode 100644 +index 000000000000..cd61b6230f0d +--- /dev/null ++++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi +@@ -0,0 +1,270 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd ++ * Copyright (c) 2019 Vamrs Limited ++ * Copyright (c) 2019 Amarula Solutions(India) ++ */ ++ ++#include ++#include ++ ++/ { ++ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288"; ++ ++ vccio_flash: vccio-flash-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vccio_flash"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_io>; ++ }; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ disable-wp; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vccio_flash>; ++ status = "okay"; ++}; ++ ++&gmac { ++ assigned-clocks = <&cru SCLK_MAC>; ++ phy-supply = <&vcc_io>; ++ snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int &global_pwroff>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ ++ vcc1-supply = <&vcc5v0_sys>; ++ vcc2-supply = <&vcc5v0_sys>; ++ vcc3-supply = <&vcc5v0_sys>; ++ vcc4-supply = <&vcc5v0_sys>; ++ vcc6-supply = <&vcc5v0_sys>; ++ vcc7-supply = <&vcc5v0_sys>; ++ vcc8-supply = <&vcc_io>; ++ vcc9-supply = <&vcc_io>; ++ vcc10-supply = <&vcc5v0_sys>; ++ vcc11-supply = <&vcc5v0_sys>; ++ vcc12-supply = <&vcc_io>; ++ vddio-supply = <&vcc_io>; ++ ++ regulators { ++ vdd_cpu: DCDC_REG1 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-name = "vdd_gpu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-ramp-delay = <6000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: DCDC_REG4 { ++ regulator-name = "vcc_io"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_tp: LDO_REG1 { ++ regulator-name = "vcc_tp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca_codec: LDO_REG2 { ++ regulator-name = "vcca_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc_wl: LDO_REG4 { ++ regulator-name = "vcc_wl"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-name = "vccio_sd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vdd10_lcd: LDO_REG6 { ++ regulator-name = "vdd10_lcd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_18: LDO_REG7 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_lcd: LDO_REG8 { ++ regulator-name = "vcc18_lcd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_sd: SWITCH_REG1 { ++ regulator-name = "vcc_sd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_lcd: SWITCH_REG2 { ++ regulator-name = "vcc_lcd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ bb-supply = <&vcc_io>; ++ flash0-supply = <&vccio_flash>; ++ gpio1830-supply = <&vcc_18>; ++ gpio30-supply = <&vcc_io>; ++ sdcard-supply = <&vccio_sd>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { ++ drive-strength = <8>; ++ }; ++ ++ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { ++ bias-pull-up; ++ drive-strength = <8>; ++ }; ++ ++ pmic { ++ pmic_int: pmic-int { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = ++ <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>, ++ <6 RK_PC1 1 &pcfg_pull_up_drv_8ma>, ++ <6 RK_PC2 1 &pcfg_pull_up_drv_8ma>, ++ <6 RK_PC3 1 &pcfg_pull_up_drv_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>; ++ }; ++ }; ++}; + +From 0eab92051a5c64b595ebb266350b3ae537f76fcb Mon Sep 17 00:00:00 2001 +From: Michael Trimarchi +Date: Tue, 7 Jul 2020 12:12:14 +0200 +Subject: [PATCH] ARM: dts: rockchip: Fix VBUS on rk3288-vyasa + +Connect the voltage regulator of vbus to the otg connector. +Depending on the current mode this is enabled (in "host" mode") +or disabled (in "peripheral" mode). The regulator must be updated +if the controller is configured in "otg" mode and the status changes +between "host" and "peripheral". + +Signed-off-by: Michael Trimarchi +Link: https://lore.kernel.org/r/20200707101214.2301768-1-michael@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 719646b76a41b8a482f8701825b635e9710ab329) +--- + arch/arm/boot/dts/rk3288-vyasa.dts | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts +index 385dd59393e1..1a20854a1317 100644 +--- a/arch/arm/boot/dts/rk3288-vyasa.dts ++++ b/arch/arm/boot/dts/rk3288-vyasa.dts +@@ -99,8 +99,6 @@ + pinctrl-0 = <&otg_vbus_drv>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- regulator-always-on; +- regulator-boot-on; + vin-supply = <&vsus_5v>; + }; + +@@ -416,6 +414,7 @@ + }; + + &usb_otg { ++ vbus-supply = <&vusb1_5v>; + status = "okay"; + }; + + +From c9012318ac0f9eddc9ab0243c230f6932ba747d6 Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Mon, 20 Jul 2020 16:28:46 +0530 +Subject: [PATCH] ARM: dts: rockchip: Add usb host0 ohci node for rk3288 + +rk3288 and rk3288w have a usb host0 ohci controller. + +Although rk3288 ohci doesn't actually work on hardware, but +rk3288w ohci can work well. + +So add usb host0 ohci node in rk3288 dtsi and boards +can then enable it if supported. + +Signed-off-by: Jagan Teki +Cc: William Wu +Link: https://lore.kernel.org/r/20200720105846.367776-1-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 82540defdd9cfc491f564ffb8d01911966636bc7) +--- + arch/arm/boot/dts/rk3288.dtsi | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 9fa11b9f4522..68d5a58cfe88 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -616,7 +616,16 @@ + status = "disabled"; + }; + +- /* NOTE: ohci@ff520000 doesn't actually work on hardware */ ++ /* NOTE: doesn't work on RK3288, but was fixed on RK3288W */ ++ usb_host0_ohci: usb@ff520000 { ++ compatible = "generic-ohci"; ++ reg = <0x0 0xff520000 0x0 0x100>; ++ interrupts = ; ++ clocks = <&cru HCLK_USBHOST0>; ++ phys = <&usbphy1>; ++ phy-names = "usb"; ++ status = "disabled"; ++ }; + + usb_host1: usb@ff540000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + +From cf9073499d98c73f36c6db78d215d6fc122cb0e0 Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Mon, 20 Jul 2020 16:32:28 +0530 +Subject: [PATCH] ARM: dts: rockchip: Add USB for RockPI N8/N10 + +Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0 +ports. + +This patch adds support to enable all these USB ports for +N10 and N8 combinations SBCs. + +Note that the USB 3.0 port on RockPI N8 combination works +as USB 2.0 OTG since it is driven from RK3288. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200720110230.367985-1-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 417b188a985d3557b0ecb5623b27bd9843f03aec) +--- + arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 42 ++++++++++++ + .../boot/dts/rockchip-radxa-dalang-carrier.dtsi | 18 +++++ + .../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 78 ++++++++++++++++++++++ + 3 files changed, 138 insertions(+) + +diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi +index cd61b6230f0d..78164d117248 100644 +--- a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi ++++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi +@@ -267,4 +267,46 @@ + rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>; + }; + }; ++ ++ vbus_host { ++ usb1_en_oc: usb1-en-oc { ++ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ vbus_typec { ++ usb0_en_oc: usb0-en-oc { ++ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1 { ++ status = "okay"; ++}; ++ ++&usb_otg { ++ status = "okay"; ++}; ++ ++&vbus_host { ++ enable-active-high; ++ gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */ ++}; ++ ++&vbus_typec { ++ enable-active-high; ++ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */ + }; +diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +index 450e5bb5af0b..d2b6ead148a2 100644 +--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi ++++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +@@ -33,6 +33,24 @@ + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; ++ ++ vbus_host: vbus-host { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb1_en_oc>; ++ regulator-name = "vbus_host"; /* HOST-5V */ ++ regulator-always-on; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vbus_typec: vbus-typec { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb0_en_oc>; ++ regulator-name = "vbus_typec"; ++ regulator-always-on; ++ vin-supply = <&vcc5v0_sys>; ++ }; + }; + + &gmac { +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index 37ed95d5f7e9..111d6cf9a4e6 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -304,6 +304,18 @@ + rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>; + }; + }; ++ ++ vbus_host { ++ usb1_en_oc: usb1-en-oc { ++ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ vbus_typec { ++ usb0_en_oc: usb0-en-oc { ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; + }; + + &pmu_io_domains { +@@ -324,8 +336,74 @@ + max-frequency = <150000000>; + }; + ++&tcphy0 { ++ status = "okay"; ++}; ++ + &tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <1>; + status = "okay"; + }; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ phy-supply = <&vbus_typec>; ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vbus_host>; ++ status = "okay"; ++ }; ++}; ++ ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vbus_host>; ++ status = "okay"; ++ }; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++}; ++ ++&vbus_host { ++ enable-active-high; ++ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb1_en_oc>; ++}; ++ ++&vbus_typec { ++ enable-active-high; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb0_en_oc>; ++}; + +From 173aa8b05ebe857f08a24d3d1766b5f32ab9004e Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Mon, 20 Jul 2020 16:32:29 +0530 +Subject: [PATCH] ARM: dts: rockchip: Add HDMI out for RockPI N8/N10 + +This patch adds support to enable HDMI out for +N10 and N8 combinations SBCs. + +Signed-off-by: Jagan Teki +Signed-off-by: Suniel Mahesh +Link: https://lore.kernel.org/r/20200720110230.367985-2-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit d0cb2f30e7c033f0a8bbe98ec73dbc1db4788942) +--- + arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 10 ++++++++++ + arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi | 20 ++++++++++++++++++++ + .../arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 12 ++++++++++++ + 3 files changed, 42 insertions(+) + +diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi +index 78164d117248..4a373f5aa600 100644 +--- a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi ++++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi +@@ -38,6 +38,12 @@ + snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + }; + ++&hdmi { ++ ddc-i2c-bus = <&i2c5>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_cec_c0>; ++}; ++ + &i2c0 { + clock-frequency = <400000>; + status = "okay"; +@@ -225,6 +231,10 @@ + }; + }; + ++&i2c5 { ++ status = "okay"; ++}; ++ + &io_domains { + bb-supply = <&vcc_io>; + flash0-supply = <&vccio_flash>; +diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +index d2b6ead148a2..26b53eac4706 100644 +--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi ++++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi +@@ -66,6 +66,10 @@ + status = "okay"; + }; + ++&hdmi { ++ status = "okay"; ++}; ++ + &pwm0 { + status = "okay"; + }; +@@ -94,3 +98,19 @@ + &uart2 { + status = "okay"; + }; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index 111d6cf9a4e6..ebccc4a153a2 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -39,6 +39,12 @@ + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + }; + ++&hdmi { ++ ddc-i2c-bus = <&i2c3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_cec>; ++}; ++ + &i2c0 { + clock-frequency = <400000>; + i2c-scl-falling-time-ns = <30>; +@@ -285,6 +291,12 @@ + }; + }; + ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ + &io_domains { + status = "okay"; + bt656-supply = <&vcca_1v8>; + +From 5cce5ce7244c4d34004176fc9887d9217e98b09c Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Mon, 20 Jul 2020 16:32:30 +0530 +Subject: [PATCH] arm64: dts: rockchip: Add PCIe for RockPI N10 + +This patch adds support to enable PCIe for RockPI N10. + +Signed-off-by: Jagan Teki +Link: https://lore.kernel.org/r/20200720110230.367985-3-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 93ca8ac2e8fcea6feb02a40edd2334144b62fc6e) +--- + .../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 40 ++++++++++++++++++++-- + 1 file changed, 38 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +index ebccc4a153a2..5d087be04af8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +@@ -11,6 +11,18 @@ + + / { + compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; ++ ++ vcc3v3_pcie: vcc-pcie-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_pwr>; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ }; + }; + + &cpu_l0 { +@@ -142,7 +154,8 @@ + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-state-mem { +- regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; + }; + }; + +@@ -177,7 +190,8 @@ + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1850000>; + regulator-state-mem { +- regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1850000>; + }; + }; + +@@ -304,6 +318,22 @@ + sdmmc-supply = <&vccio_sd>; + }; + ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; ++ max-link-speed = <2>; ++ num-lanes = <4>; ++ pinctrl-0 = <&pcie_clkreqnb_cpm>; ++ pinctrl-names = "default"; ++ vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */ ++ vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */ ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ status = "okay"; ++}; ++ + &pinctrl { + hym8563 { + hym8563_int: hym8563-int { +@@ -311,6 +341,12 @@ + }; + }; + ++ pcie { ++ pcie_pwr: pcie-pwr { ++ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>; + +From 09a6626e55ac70435dbad23fb461d930d1c34a30 Mon Sep 17 00:00:00 2001 +From: Katsuhiro Suzuki +Date: Sat, 25 Jul 2020 00:59:33 +0900 +Subject: [PATCH] ASoC: convert Everest ES8316 binding to yaml + +This patch converts Everest Semiconductor ES8316 low power audio +CODEC binding to DT schema. + +Signed-off-by: Katsuhiro Suzuki +Reviewed-by: Rob Herring +Link: https://lore.kernel.org/r/20200724155933.1040501-1-katsuhiro@katsuster.net +Signed-off-by: Mark Brown +(cherry picked from commit 92e67a9c4f206dc9c859c405e67448a8be59ac5d) +--- + .../devicetree/bindings/sound/everest,es8316.txt | 23 ---------- + .../devicetree/bindings/sound/everest,es8316.yaml | 50 ++++++++++++++++++++++ + 2 files changed, 50 insertions(+), 23 deletions(-) + delete mode 100644 Documentation/devicetree/bindings/sound/everest,es8316.txt + create mode 100644 Documentation/devicetree/bindings/sound/everest,es8316.yaml + +diff --git a/Documentation/devicetree/bindings/sound/everest,es8316.txt b/Documentation/devicetree/bindings/sound/everest,es8316.txt +deleted file mode 100644 +index 1bf03c5f2af4..000000000000 +--- a/Documentation/devicetree/bindings/sound/everest,es8316.txt ++++ /dev/null +@@ -1,23 +0,0 @@ +-Everest ES8316 audio CODEC +- +-This device supports both I2C and SPI. +- +-Required properties: +- +- - compatible : should be "everest,es8316" +- - reg : the I2C address of the device for I2C +- +-Optional properties: +- +- - clocks : a list of phandle, should contain entries for clock-names +- - clock-names : should include as follows: +- "mclk" : master clock (MCLK) of the device +- +-Example: +- +-es8316: codec@11 { +- compatible = "everest,es8316"; +- reg = <0x11>; +- clocks = <&clks 10>; +- clock-names = "mclk"; +-}; +diff --git a/Documentation/devicetree/bindings/sound/everest,es8316.yaml b/Documentation/devicetree/bindings/sound/everest,es8316.yaml +new file mode 100644 +index 000000000000..3b752bba748b +--- /dev/null ++++ b/Documentation/devicetree/bindings/sound/everest,es8316.yaml +@@ -0,0 +1,50 @@ ++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/sound/everest,es8316.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Everest ES8316 audio CODEC ++ ++maintainers: ++ - Daniel Drake ++ - Katsuhiro Suzuki ++ ++properties: ++ compatible: ++ const: everest,es8316 ++ ++ reg: ++ maxItems: 1 ++ ++ clocks: ++ items: ++ - description: clock for master clock (MCLK) ++ ++ clock-names: ++ items: ++ - const: mclk ++ ++ "#sound-dai-cells": ++ const: 0 ++ ++required: ++ - compatible ++ - reg ++ - "#sound-dai-cells" ++ ++additionalProperties: false ++ ++examples: ++ - | ++ i2c0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ es8316: codec@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ clocks = <&clks 10>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ }; ++ }; + +From caea25a96e707f4bd13e3dc35d3016c9842cebe4 Mon Sep 17 00:00:00 2001 +From: Alper Nebi Yasak +Date: Tue, 21 Jul 2020 21:27:10 +0300 +Subject: [PATCH] ASoC: rk3399_gru_sound: Add DAPM pins, kcontrols for jack + detection + +PulseAudio (and perhaps other userspace utilities) can not detect any +jack for rk3399_gru_sound as the driver doesn't expose related Jack +kcontrols. + +This patch adds two DAPM pins to the headset jack, where the +snd_soc_card_jack_new() call automatically creates "Headphones Jack" and +"Headset Mic Jack" kcontrols from them. + +With an appropriate ALSA UCM config specifying JackControl fields for +the "Headphones" and "Headset" (mic) devices, PulseAudio can detect +plug/unplug events for both of them after this patch. + +Signed-off-by: Alper Nebi Yasak +Link: https://lore.kernel.org/r/20200721182709.6895-1-alpernebiyasak@gmail.com +Signed-off-by: Mark Brown +(cherry picked from commit d0508b4f16049a658d68a7c276ba08296c5a76bc) +--- + sound/soc/rockchip/rk3399_gru_sound.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/rockchip/rk3399_gru_sound.c b/sound/soc/rockchip/rk3399_gru_sound.c +index 9539b0d024fe..3e45179638ca 100644 +--- a/sound/soc/rockchip/rk3399_gru_sound.c ++++ b/sound/soc/rockchip/rk3399_gru_sound.c +@@ -32,6 +32,19 @@ static unsigned int dmic_wakeup_delay; + + static struct snd_soc_jack rockchip_sound_jack; + ++/* Headset jack detection DAPM pins */ ++static struct snd_soc_jack_pin rockchip_sound_jack_pins[] = { ++ { ++ .pin = "Headphones", ++ .mask = SND_JACK_HEADPHONE, ++ }, ++ { ++ .pin = "Headset Mic", ++ .mask = SND_JACK_MICROPHONE, ++ }, ++ ++}; ++ + static const struct snd_soc_dapm_widget rockchip_dapm_widgets[] = { + SND_SOC_DAPM_HP("Headphones", NULL), + SND_SOC_DAPM_SPK("Speakers", NULL), +@@ -176,7 +189,9 @@ static int rockchip_sound_da7219_init(struct snd_soc_pcm_runtime *rtd) + SND_JACK_HEADSET | SND_JACK_LINEOUT | + SND_JACK_BTN_0 | SND_JACK_BTN_1 | + SND_JACK_BTN_2 | SND_JACK_BTN_3, +- &rockchip_sound_jack, NULL, 0); ++ &rockchip_sound_jack, ++ rockchip_sound_jack_pins, ++ ARRAY_SIZE(rockchip_sound_jack_pins)); + + if (ret) { + dev_err(rtd->card->dev, "New Headset Jack failed! (%d)\n", ret); diff --git a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch index 96b378d8f7..17a5bb140a 100644 --- a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch +++ b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch @@ -1,4 +1,4 @@ -From 00d6e830dc1ff5520ddb23561916f35e848a41ea Mon Sep 17 00:00:00 2001 +From f916206d652ac8c3bf9757891b224739a71ebd08 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jan 2020 17:38:19 +0100 Subject: [PATCH] clk: rockchip: convert rk3399 pll type to use @@ -14,7 +14,7 @@ Suggested-by: Stephen Boyd Signed-off-by: Heiko Stuebner Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200129163821.1547295-1-heiko@sntech.de -(cherry picked from commit a504d1b30bd6124c286a2f1ffeaff5e29f4023a0) +(cherry picked from commit bf4237a188f872e535de8cbfc7903c1387b83b01) --- drivers/clk/rockchip/clk-pll.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) @@ -56,7 +56,7 @@ index 10560d963baf..28b04aad31ad 100644 static void rockchip_rk3399_pll_get_params(struct rockchip_clk_pll *pll, -From 90f7bc7cd3e82b3f6d2fa1086ab59f7fac1bc2b2 Mon Sep 17 00:00:00 2001 +From 75fe2528cfc9d96d885cebca24d7d16f09e90697 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jan 2020 17:38:20 +0100 Subject: [PATCH] clk: rockchip: convert basic pll lock_wait to use @@ -72,7 +72,7 @@ Suggested-by: Stephen Boyd Signed-off-by: Heiko Stuebner Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200129163821.1547295-2-heiko@sntech.de -(cherry picked from commit 883265d871b3e1ab389d698f99713871dfac0003) +(cherry picked from commit 3507df1a4615113ae6509e0f14f6546f0d1c84b4) --- drivers/clk/rockchip/clk-pll.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) @@ -112,7 +112,7 @@ index 28b04aad31ad..945f8b2cacc1 100644 /** -From 2cf8100576106e8461fc289613b7d7a4c521b732 Mon Sep 17 00:00:00 2001 +From e3e19d6127b1e323cb6236d1c2bd10c9c405c2b6 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jan 2020 17:38:21 +0100 Subject: [PATCH] clk: rockchip: convert rk3036 pll type to use internal lock @@ -125,7 +125,7 @@ it to the "internal" lock status, similar to how rk3399 handles it. Signed-off-by: Heiko Stuebner Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200129163821.1547295-3-heiko@sntech.de -(cherry picked from commit 7b5c597083e78fea79be0d9316e1de018e12ad9c) +(cherry picked from commit 7f6ffbb885d147557bdca471c37b7b1204005798) --- drivers/clk/rockchip/clk-pll.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) @@ -193,3 +193,242 @@ index 945f8b2cacc1..4c6c9167ef50 100644 return 0; } + +From 49b2aa801327bfab69916ef87eb942c56b2ada88 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= +Date: Tue, 2 Jun 2020 10:06:43 +0200 +Subject: [PATCH] clk: rockchip: Handle clock tree for rk3288w variant +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The revision rk3288w has a different clock tree about "hclk_vio" +clock, according to the BSP kernel code. + +This patch handles this difference by detecting which device-tree +we are using. If it is a "rockchip,rk3288-cru", let's register +the clock tree as it was before. If the device-tree node is +"rockchip,rk3288w-cru", we will apply the difference with this +version of this SoC. + +Noticed that this new device-tree compatible must be handled in +bootloader such as u-boot. + +Signed-off-by: Mylène Josserand +Link: https://lore.kernel.org/r/20200602080644.11333-2-mylene.josserand@collabora.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 1627f683636df70fb25358b0a7b39a24e8fce5bf) +--- + drivers/clk/rockchip/clk-rk3288.c | 20 ++++++++++++++++++-- + 1 file changed, 18 insertions(+), 2 deletions(-) + +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index cc2a177bbdbf..204976e2d0cb 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -425,8 +425,6 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + COMPOSITE(0, "aclk_vio0", mux_pll_src_cpll_gpll_usb480m_p, CLK_IGNORE_UNUSED, + RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS, + RK3288_CLKGATE_CON(3), 0, GFLAGS), +- DIV(0, "hclk_vio", "aclk_vio0", 0, +- RK3288_CLKSEL_CON(28), 8, 5, DFLAGS), + COMPOSITE(0, "aclk_vio1", mux_pll_src_cpll_gpll_usb480m_p, CLK_IGNORE_UNUSED, + RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFLAGS, + RK3288_CLKGATE_CON(3), 2, GFLAGS), +@@ -819,6 +817,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS), + }; + ++static struct rockchip_clk_branch rk3288w_hclkvio_branch[] __initdata = { ++ DIV(0, "hclk_vio", "aclk_vio1", 0, ++ RK3288_CLKSEL_CON(28), 8, 5, DFLAGS), ++}; ++ ++static struct rockchip_clk_branch rk3288_hclkvio_branch[] __initdata = { ++ DIV(0, "hclk_vio", "aclk_vio0", 0, ++ RK3288_CLKSEL_CON(28), 8, 5, DFLAGS), ++}; ++ + static const char *const rk3288_critical_clocks[] __initconst = { + "aclk_cpu", + "aclk_peri", +@@ -936,6 +944,14 @@ static void __init rk3288_clk_init(struct device_node *np) + RK3288_GRF_SOC_STATUS1); + rockchip_clk_register_branches(ctx, rk3288_clk_branches, + ARRAY_SIZE(rk3288_clk_branches)); ++ ++ if (of_device_is_compatible(np, "rockchip,rk3288w-cru")) ++ rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch, ++ ARRAY_SIZE(rk3288w_hclkvio_branch)); ++ else ++ rockchip_clk_register_branches(ctx, rk3288_hclkvio_branch, ++ ARRAY_SIZE(rk3288_hclkvio_branch)); ++ + rockchip_clk_protect_critical(rk3288_critical_clocks, + ARRAY_SIZE(rk3288_critical_clocks)); + + +From 3559f1d09de0bc44790de8a71ae7978bb79e73d6 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Fri, 3 Jul 2020 17:49:48 +0200 +Subject: [PATCH] clk: rockchip: use separate compatibles for rk3288w-cru + +Commit 1627f683636d ("clk: rockchip: Handle clock tree for rk3288w variant") +added the check for rk3288w-specific clock-tree changes but in turn would +require a double-compatible due to re-using the main rockchip,rk3288-cru +compatible as entry point. + +The binding change actually describes the compatibles as one or the other +so adapt the code accordingly and add a real second entry-point for the +clock controller. + +Signed-off-by: Heiko Stuebner +Reviewed-by: Ezequiel Garcia +Reviewed-by: Jagan Teki +Tested-by: Jagan Teki # rock-pi-n8 +Link: https://lore.kernel.org/r/20200703154948.260369-1-heiko@sntech.de +(cherry picked from commit 0a7f99aad259d223ce69c03e792c7e2bfcf8c2c6) +--- + drivers/clk/rockchip/clk-rk3288.c | 21 +++++++++++++++++++-- + 1 file changed, 19 insertions(+), 2 deletions(-) + +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 204976e2d0cb..93c794695c46 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -15,6 +15,11 @@ + #define RK3288_GRF_SOC_CON(x) (0x244 + x * 4) + #define RK3288_GRF_SOC_STATUS1 0x284 + ++enum rk3288_variant { ++ RK3288_CRU, ++ RK3288W_CRU, ++}; ++ + enum rk3288_plls { + apll, dpll, cpll, gpll, npll, + }; +@@ -922,7 +927,8 @@ static struct syscore_ops rk3288_clk_syscore_ops = { + .resume = rk3288_clk_resume, + }; + +-static void __init rk3288_clk_init(struct device_node *np) ++static void __init rk3288_common_init(struct device_node *np, ++ enum rk3288_variant soc) + { + struct rockchip_clk_provider *ctx; + +@@ -945,7 +951,7 @@ static void __init rk3288_clk_init(struct device_node *np) + rockchip_clk_register_branches(ctx, rk3288_clk_branches, + ARRAY_SIZE(rk3288_clk_branches)); + +- if (of_device_is_compatible(np, "rockchip,rk3288w-cru")) ++ if (soc == RK3288W_CRU) + rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch, + ARRAY_SIZE(rk3288w_hclkvio_branch)); + else +@@ -970,4 +976,15 @@ static void __init rk3288_clk_init(struct device_node *np) + + rockchip_clk_of_add_provider(np, ctx); + } ++ ++static void __init rk3288_clk_init(struct device_node *np) ++{ ++ rk3288_common_init(np, RK3288_CRU); ++} + CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init); ++ ++static void __init rk3288w_clk_init(struct device_node *np) ++{ ++ rk3288_common_init(np, RK3288W_CRU); ++} ++CLK_OF_DECLARE(rk3288w_cru, "rockchip,rk3288w-cru", rk3288w_clk_init); + +From 785f0d7bf291f2939c9f5c0c2248d89849ff8fb8 Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Thu, 18 Jun 2020 18:56:29 +0100 +Subject: [PATCH] clk: rockchip: Revert "fix wrong mmc sample phase shift for + rk3328" + +This reverts commit 82f4b67f018c88a7cc9337f0067ed3d6ec352648. + +According to a subsequent revert in the vendor kernel, the original +change was based on unclear documentation and was in fact incorrect. + +Emprically, my board's HS200 eMMC at 200MHZ apparently gets lucky with a +phase where this had no impact, but limiting max-frequency to 150MHz to +match the nominal capability of the I/O pins made it virtually unusable, +constantly throwing errors and retuning. With this revert, it starts +behaving perfectly at 150MHz too. + +Fixes: 82f4b67f018c ("clk: rockchip: fix wrong mmc sample phase shift for rk3328") +Signed-off-by: Robin Murphy +Reviewed-by: Shawn Lin +Link: https://lore.kernel.org/r/c80eb52e34c03f817586b6b7912fbd4e31be9079.1589475794.git.robin.murphy@arm.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 465931e70881476a210d44705102ef8b6ee6cdb0) +--- + drivers/clk/rockchip/clk-rk3328.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c +index c186a1985bf4..2429b7c2a8b3 100644 +--- a/drivers/clk/rockchip/clk-rk3328.c ++++ b/drivers/clk/rockchip/clk-rk3328.c +@@ -808,22 +808,22 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = { + MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "clk_sdmmc", + RK3328_SDMMC_CON0, 1), + MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "clk_sdmmc", +- RK3328_SDMMC_CON1, 0), ++ RK3328_SDMMC_CON1, 1), + + MMC(SCLK_SDIO_DRV, "sdio_drv", "clk_sdio", + RK3328_SDIO_CON0, 1), + MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "clk_sdio", +- RK3328_SDIO_CON1, 0), ++ RK3328_SDIO_CON1, 1), + + MMC(SCLK_EMMC_DRV, "emmc_drv", "clk_emmc", + RK3328_EMMC_CON0, 1), + MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "clk_emmc", +- RK3328_EMMC_CON1, 0), ++ RK3328_EMMC_CON1, 1), + + MMC(SCLK_SDMMC_EXT_DRV, "sdmmc_ext_drv", "clk_sdmmc_ext", + RK3328_SDMMC_EXT_CON0, 1), + MMC(SCLK_SDMMC_EXT_SAMPLE, "sdmmc_ext_sample", "clk_sdmmc_ext", +- RK3328_SDMMC_EXT_CON1, 0), ++ RK3328_SDMMC_EXT_CON1, 1), + }; + + static const char *const rk3328_critical_clocks[] __initconst = { + +From e1e87d6b234a855b1a7adcec8d32ad8b87047c2e Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Wed, 22 Jul 2020 18:18:20 +0200 +Subject: [PATCH] clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks + +Since the loopbacktest clock is not exported and is not touched in the +driver, it has to be added to rk3188_critical_clocks to be protected from +being disabled and in order to get the emac working. + +Signed-off-by: Alex Bee +Link: https://lore.kernel.org/r/20200722161820.5316-1-knaerzche@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit ef990bcad58cf1d13c5a49191a2c2342eb8d6709) +--- + drivers/clk/rockchip/clk-rk3188.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c +index 77aebfb1d6d5..730020fcc7fe 100644 +--- a/drivers/clk/rockchip/clk-rk3188.c ++++ b/drivers/clk/rockchip/clk-rk3188.c +@@ -751,6 +751,7 @@ static const char *const rk3188_critical_clocks[] __initconst = { + "pclk_peri", + "hclk_cpubus", + "hclk_vio_bus", ++ "sclk_mac_lbtest", + }; + + static struct rockchip_clk_provider *__init rk3188_common_clk_init(struct device_node *np) diff --git a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch deleted file mode 100644 index 12d7395cd9..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch +++ /dev/null @@ -1,5631 +0,0 @@ -From 33f924acf6b0b4778810b2a25189b02c30b60234 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 25 Mar 2020 22:34:32 +0100 -Subject: [PATCH] media: v4l2-mem2mem: return CAPTURE buffer first - -When the request API is used, typically an OUTPUT (src) buffer -will be part of a request. A userspace process will be typically -blocked, waiting on the request file descriptor. - -Returning the OUTPUT (src) buffer will wake-up such processes, -who will immediately attempt to dequeue the CAPTURE buffer, -only to find it's still unavailable. - -Therefore, change v4l2_m2m_buf_done_and_job_finish returning -the CAPTURE (dst) buffer first, to avoid signalling the request -file descriptor prematurely, i.e. before the CAPTURE buffer is done. - -When the request API is not used, this change should have -no impact. - -Tested-by: Nicolas Dufresne -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit e1e213b1b0e4c785bac8bfa52130996105bffb62) ---- - drivers/media/v4l2-core/v4l2-mem2mem.c | 11 ++++++++++- - 1 file changed, 10 insertions(+), 1 deletion(-) - -diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c -index 8986c31176e9..62ac9424c92a 100644 ---- a/drivers/media/v4l2-core/v4l2-mem2mem.c -+++ b/drivers/media/v4l2-core/v4l2-mem2mem.c -@@ -504,12 +504,21 @@ void v4l2_m2m_buf_done_and_job_finish(struct v4l2_m2m_dev *m2m_dev, - - if (WARN_ON(!src_buf || !dst_buf)) - goto unlock; -- v4l2_m2m_buf_done(src_buf, state); - dst_buf->is_held = src_buf->flags & V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF; - if (!dst_buf->is_held) { - v4l2_m2m_dst_buf_remove(m2m_ctx); - v4l2_m2m_buf_done(dst_buf, state); - } -+ /* -+ * If the request API is being used, returning the OUTPUT -+ * (src) buffer will wake-up any process waiting on the -+ * request file descriptor. -+ * -+ * Therefore, return the CAPTURE (dst) buffer first, -+ * to avoid signalling the request file descriptor -+ * before the CAPTURE buffer is done. -+ */ -+ v4l2_m2m_buf_done(src_buf, state); - schedule_next = _v4l2_m2m_job_finish(m2m_dev, m2m_ctx); - unlock: - spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags); - -From 7afc11962aa5f0be37913db8f510481fc365a6f3 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 25 Mar 2020 22:34:33 +0100 -Subject: [PATCH] media: hantro: Set buffers' zeroth plane payload in - .buf_prepare - -Buffers' zeroth plane payload size is calculated at format -negotiation time, and so it can be set in .buf_prepare. - -Keep in mind that, to make this change easier, hantro_buf_prepare -is refactored, using the cedrus driver as reference. This results -in cleaner code as byproduct. - -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 6837e43e9ca11c49eac175326a736ee1bd2de516) ---- - drivers/staging/media/hantro/hantro_v4l2.c | 16 +++++++++++----- - 1 file changed, 11 insertions(+), 5 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c -index f4ae2cee0f18..3142ab6697d5 100644 ---- a/drivers/staging/media/hantro/hantro_v4l2.c -+++ b/drivers/staging/media/hantro/hantro_v4l2.c -@@ -608,7 +608,7 @@ hantro_queue_setup(struct vb2_queue *vq, unsigned int *num_buffers, - } - - static int --hantro_buf_plane_check(struct vb2_buffer *vb, const struct hantro_fmt *vpu_fmt, -+hantro_buf_plane_check(struct vb2_buffer *vb, - struct v4l2_pix_format_mplane *pixfmt) - { - unsigned int sz; -@@ -630,12 +630,18 @@ static int hantro_buf_prepare(struct vb2_buffer *vb) - { - struct vb2_queue *vq = vb->vb2_queue; - struct hantro_ctx *ctx = vb2_get_drv_priv(vq); -+ struct v4l2_pix_format_mplane *pix_fmt; -+ int ret; - - if (V4L2_TYPE_IS_OUTPUT(vq->type)) -- return hantro_buf_plane_check(vb, ctx->vpu_src_fmt, -- &ctx->src_fmt); -- -- return hantro_buf_plane_check(vb, ctx->vpu_dst_fmt, &ctx->dst_fmt); -+ pix_fmt = &ctx->src_fmt; -+ else -+ pix_fmt = &ctx->dst_fmt; -+ ret = hantro_buf_plane_check(vb, pix_fmt); -+ if (ret) -+ return ret; -+ vb2_set_plane_payload(vb, 0, pix_fmt->plane_fmt[0].sizeimage); -+ return 0; - } - - static void hantro_buf_queue(struct vb2_buffer *vb) - -From 7c92154bc9dcdefedfdaeea0d12ca95b0b800188 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 25 Mar 2020 22:34:34 +0100 -Subject: [PATCH] media: hantro: Use v4l2_m2m_buf_done_and_job_finish - -Let the core sort out the nuances of returning buffers -to userspace, by using the v4l2_m2m_buf_done_and_job_finish -helper. - -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 28a202c55963386b8bc45bcc52029362e9aa0d33) ---- - drivers/staging/media/hantro/hantro_drv.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index ace13973e2d0..d0097c5fe7d9 100644 ---- a/drivers/staging/media/hantro/hantro_drv.c -+++ b/drivers/staging/media/hantro/hantro_drv.c -@@ -101,8 +101,8 @@ static void hantro_job_finish(struct hantro_dev *vpu, - pm_runtime_put_autosuspend(vpu->dev); - clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks); - -- src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); -- dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); -+ src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); -+ dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); - - if (WARN_ON(!src)) - return; -@@ -112,14 +112,14 @@ static void hantro_job_finish(struct hantro_dev *vpu, - src->sequence = ctx->sequence_out++; - dst->sequence = ctx->sequence_cap++; - -- ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused); -- if (ret) -- result = VB2_BUF_STATE_ERROR; -- -- v4l2_m2m_buf_done(src, result); -- v4l2_m2m_buf_done(dst, result); -+ if (ctx->buf_finish) { -+ ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused); -+ if (ret) -+ result = VB2_BUF_STATE_ERROR; -+ } - -- v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx); -+ v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, -+ result); - } - - void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, - -From fc2058179fcab5ab2bbaa2b654562890a8076684 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 25 Mar 2020 22:34:35 +0100 -Subject: [PATCH] media: hantro: Remove unneeded hantro_dec_buf_finish - -Since now .buf_prepare takes care of setting the -buffer payload size, we can get rid of this, -at least for decoders. - -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit c9f98d9aeb0914c05d18d97a7aa89feb5fedb10f) ---- - drivers/staging/media/hantro/hantro_drv.c | 10 ---------- - 1 file changed, 10 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index d0097c5fe7d9..0db8ad455160 100644 ---- a/drivers/staging/media/hantro/hantro_drv.c -+++ b/drivers/staging/media/hantro/hantro_drv.c -@@ -80,15 +80,6 @@ hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf, - return 0; - } - --static int --hantro_dec_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf, -- unsigned int bytesused) --{ -- /* For decoders set bytesused as per the output picture. */ -- buf->planes[0].bytesused = ctx->dst_fmt.plane_fmt[0].sizeimage; -- return 0; --} -- - static void hantro_job_finish(struct hantro_dev *vpu, - struct hantro_ctx *ctx, - unsigned int bytesused, -@@ -431,7 +422,6 @@ static int hantro_open(struct file *filp) - ctx->buf_finish = hantro_enc_buf_finish; - } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) { - allowed_codecs = vpu->variant->codec & HANTRO_DECODERS; -- ctx->buf_finish = hantro_dec_buf_finish; - } else { - ret = -ENODEV; - goto err_ctx_free; - -From c89a32acae32073d01df707edef1551ca9052858 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 25 Mar 2020 22:34:36 +0100 -Subject: [PATCH] media: hantro: Move H264 motion vector calculation to a - helper - -Move the extra bytes calculation that are needed for H264 -motion vector to a helper. This is just a cosmetic cleanup. - -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 774ffd751a94eb6a5c7c6f809ea1ea7203591920) ---- - drivers/staging/media/hantro/hantro.h | 4 ---- - drivers/staging/media/hantro/hantro_hw.h | 31 ++++++++++++++++++++++++++++++ - drivers/staging/media/hantro/hantro_v4l2.c | 25 ++---------------------- - 3 files changed, 33 insertions(+), 27 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h -index 327ddef45345..2089f88a44a2 100644 ---- a/drivers/staging/media/hantro/hantro.h -+++ b/drivers/staging/media/hantro/hantro.h -@@ -26,10 +26,6 @@ - - #include "hantro_hw.h" - --#define MB_DIM 16 --#define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM) --#define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM) -- - struct hantro_ctx; - struct hantro_codec_ops; - -diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h -index 7dfc9bad7297..4053d8710e04 100644 ---- a/drivers/staging/media/hantro/hantro_hw.h -+++ b/drivers/staging/media/hantro/hantro_hw.h -@@ -18,6 +18,10 @@ - - #define DEC_8190_ALIGN_MASK 0x07U - -+#define MB_DIM 16 -+#define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM) -+#define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM) -+ - struct hantro_dev; - struct hantro_ctx; - struct hantro_buf; -@@ -176,6 +180,33 @@ void hantro_g1_h264_dec_run(struct hantro_ctx *ctx); - int hantro_h264_dec_init(struct hantro_ctx *ctx); - void hantro_h264_dec_exit(struct hantro_ctx *ctx); - -+static inline size_t -+hantro_h264_mv_size(unsigned int width, unsigned int height) -+{ -+ /* -+ * A decoded 8-bit 4:2:0 NV12 frame may need memory for up to -+ * 448 bytes per macroblock with additional 32 bytes on -+ * multi-core variants. -+ * -+ * The H264 decoder needs extra space on the output buffers -+ * to store motion vectors. This is needed for reference -+ * frames and only if the format is non-post-processed NV12. -+ * -+ * Memory layout is as follow: -+ * -+ * +---------------------------+ -+ * | Y-plane 256 bytes x MBs | -+ * +---------------------------+ -+ * | UV-plane 128 bytes x MBs | -+ * +---------------------------+ -+ * | MV buffer 64 bytes x MBs | -+ * +---------------------------+ -+ * | MC sync 32 bytes | -+ * +---------------------------+ -+ */ -+ return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32; -+} -+ - void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx); - void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx); - void hantro_mpeg2_dec_copy_qtable(u8 *qtable, -diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c -index 3142ab6697d5..458b502ff01b 100644 ---- a/drivers/staging/media/hantro/hantro_v4l2.c -+++ b/drivers/staging/media/hantro/hantro_v4l2.c -@@ -273,32 +273,11 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, - /* Fill remaining fields */ - v4l2_fill_pixfmt_mp(pix_mp, fmt->fourcc, pix_mp->width, - pix_mp->height); -- /* -- * A decoded 8-bit 4:2:0 NV12 frame may need memory for up to -- * 448 bytes per macroblock with additional 32 bytes on -- * multi-core variants. -- * -- * The H264 decoder needs extra space on the output buffers -- * to store motion vectors. This is needed for reference -- * frames and only if the format is non-post-processed NV12. -- * -- * Memory layout is as follow: -- * -- * +---------------------------+ -- * | Y-plane 256 bytes x MBs | -- * +---------------------------+ -- * | UV-plane 128 bytes x MBs | -- * +---------------------------+ -- * | MV buffer 64 bytes x MBs | -- * +---------------------------+ -- * | MC sync 32 bytes | -- * +---------------------------+ -- */ - if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE && - !hantro_needs_postproc(ctx, fmt)) - pix_mp->plane_fmt[0].sizeimage += -- 64 * MB_WIDTH(pix_mp->width) * -- MB_WIDTH(pix_mp->height) + 32; -+ hantro_h264_mv_size(pix_mp->width, -+ pix_mp->height); - } else if (!pix_mp->plane_fmt[0].sizeimage) { - /* - * For coded formats the application can specify - -From b14f424b8dc02bff91351231870b95ccc91c32ec Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 25 Mar 2020 22:34:37 +0100 -Subject: [PATCH] media: hantro: Refactor for V4L2 API spec compliancy - -Refactor how S_FMT and TRY_FMT are handled, and also make sure -internal initial format and format reset are done properly. - -The latter is achieved by making sure the same hantro_{set,try}_fmt -helpers are called on all paths that set the format (which is -part of the driver state). - -This commit removes the following v4l2-compliance warnings: - -test VIDIOC_G_FMT: OK - fail: v4l2-test-formats.cpp(711): Video Capture Multiplanar: TRY_FMT(G_FMT) != G_FMT -test VIDIOC_TRY_FMT: FAIL - fail: v4l2-test-formats.cpp(1116): Video Capture Multiplanar: S_FMT(G_FMT) != G_FMT -test VIDIOC_S_FMT: FAIL - -Reported-by: Nicolas Dufresne -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 88d06362d1d052e4c844ac95a2ca308ed4d90452) ---- - drivers/staging/media/hantro/hantro.h | 3 +- - drivers/staging/media/hantro/hantro_v4l2.c | 70 +++++++++++++++++++----------- - 2 files changed, 47 insertions(+), 26 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h -index 2089f88a44a2..3005207fc6fb 100644 ---- a/drivers/staging/media/hantro/hantro.h -+++ b/drivers/staging/media/hantro/hantro.h -@@ -417,7 +417,8 @@ hantro_get_dst_buf(struct hantro_ctx *ctx) - } - - static inline bool --hantro_needs_postproc(struct hantro_ctx *ctx, const struct hantro_fmt *fmt) -+hantro_needs_postproc(const struct hantro_ctx *ctx, -+ const struct hantro_fmt *fmt) - { - return !hantro_is_encoder_ctx(ctx) && fmt->fourcc != V4L2_PIX_FMT_NV12; - } -diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c -index 458b502ff01b..f28a94e2fa93 100644 ---- a/drivers/staging/media/hantro/hantro_v4l2.c -+++ b/drivers/staging/media/hantro/hantro_v4l2.c -@@ -30,6 +30,11 @@ - #include "hantro_hw.h" - #include "hantro_v4l2.h" - -+static int hantro_set_fmt_out(struct hantro_ctx *ctx, -+ struct v4l2_pix_format_mplane *pix_mp); -+static int hantro_set_fmt_cap(struct hantro_ctx *ctx, -+ struct v4l2_pix_format_mplane *pix_mp); -+ - static const struct hantro_fmt * - hantro_get_formats(const struct hantro_ctx *ctx, unsigned int *num_fmts) - { -@@ -227,12 +232,12 @@ static int vidioc_g_fmt_cap_mplane(struct file *file, void *priv, - return 0; - } - --static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, -- bool capture) -+static int hantro_try_fmt(const struct hantro_ctx *ctx, -+ struct v4l2_pix_format_mplane *pix_mp, -+ enum v4l2_buf_type type) - { -- struct hantro_ctx *ctx = fh_to_ctx(priv); -- struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; - const struct hantro_fmt *fmt, *vpu_fmt; -+ bool capture = !V4L2_TYPE_IS_OUTPUT(type); - bool coded; - - coded = capture == hantro_is_encoder_ctx(ctx); -@@ -246,7 +251,7 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, - fmt = hantro_find_format(ctx, pix_mp->pixelformat); - if (!fmt) { - fmt = hantro_get_default_fmt(ctx, coded); -- f->fmt.pix_mp.pixelformat = fmt->fourcc; -+ pix_mp->pixelformat = fmt->fourcc; - } - - if (coded) { -@@ -294,13 +299,13 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, - static int vidioc_try_fmt_cap_mplane(struct file *file, void *priv, - struct v4l2_format *f) - { -- return vidioc_try_fmt(file, priv, f, true); -+ return hantro_try_fmt(fh_to_ctx(priv), &f->fmt.pix_mp, f->type); - } - - static int vidioc_try_fmt_out_mplane(struct file *file, void *priv, - struct v4l2_format *f) - { -- return vidioc_try_fmt(file, priv, f, false); -+ return hantro_try_fmt(fh_to_ctx(priv), &f->fmt.pix_mp, f->type); - } - - static void -@@ -334,11 +339,12 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) - } - - hantro_reset_fmt(fmt, vpu_fmt); -- fmt->num_planes = 1; - fmt->width = vpu_fmt->frmsize.min_width; - fmt->height = vpu_fmt->frmsize.min_height; -- fmt->plane_fmt[0].sizeimage = vpu_fmt->header_size + -- fmt->width * fmt->height * vpu_fmt->max_depth; -+ if (hantro_is_encoder_ctx(ctx)) -+ hantro_set_fmt_cap(ctx, fmt); -+ else -+ hantro_set_fmt_out(ctx, fmt); - } - - static void -@@ -360,9 +366,12 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) - } - - hantro_reset_fmt(raw_fmt, raw_vpu_fmt); -- v4l2_fill_pixfmt_mp(raw_fmt, raw_vpu_fmt->fourcc, -- encoded_fmt->width, -- encoded_fmt->height); -+ raw_fmt->width = encoded_fmt->width; -+ raw_fmt->width = encoded_fmt->width; -+ if (hantro_is_encoder_ctx(ctx)) -+ hantro_set_fmt_out(ctx, raw_fmt); -+ else -+ hantro_set_fmt_cap(ctx, raw_fmt); - } - - void hantro_reset_fmts(struct hantro_ctx *ctx) -@@ -388,15 +397,15 @@ hantro_update_requires_request(struct hantro_ctx *ctx, u32 fourcc) - } - } - --static int --vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) -+static int hantro_set_fmt_out(struct hantro_ctx *ctx, -+ struct v4l2_pix_format_mplane *pix_mp) - { -- struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; -- struct hantro_ctx *ctx = fh_to_ctx(priv); -- struct vb2_queue *vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); -+ struct vb2_queue *vq; - int ret; - -- ret = vidioc_try_fmt_out_mplane(file, priv, f); -+ vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, -+ V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); -+ ret = hantro_try_fmt(ctx, pix_mp, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); - if (ret) - return ret; - -@@ -458,16 +467,15 @@ vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) - return 0; - } - --static int vidioc_s_fmt_cap_mplane(struct file *file, void *priv, -- struct v4l2_format *f) -+static int hantro_set_fmt_cap(struct hantro_ctx *ctx, -+ struct v4l2_pix_format_mplane *pix_mp) - { -- struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; -- struct hantro_ctx *ctx = fh_to_ctx(priv); - struct vb2_queue *vq; - int ret; - - /* Change not allowed if queue is busy. */ -- vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); -+ vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, -+ V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); - if (vb2_is_busy(vq)) - return -EBUSY; - -@@ -488,7 +496,7 @@ static int vidioc_s_fmt_cap_mplane(struct file *file, void *priv, - return -EBUSY; - } - -- ret = vidioc_try_fmt_cap_mplane(file, priv, f); -+ ret = hantro_try_fmt(ctx, pix_mp, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); - if (ret) - return ret; - -@@ -522,6 +530,18 @@ static int vidioc_s_fmt_cap_mplane(struct file *file, void *priv, - return 0; - } - -+static int -+vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) -+{ -+ return hantro_set_fmt_out(fh_to_ctx(priv), &f->fmt.pix_mp); -+} -+ -+static int -+vidioc_s_fmt_cap_mplane(struct file *file, void *priv, struct v4l2_format *f) -+{ -+ return hantro_set_fmt_cap(fh_to_ctx(priv), &f->fmt.pix_mp); -+} -+ - const struct v4l2_ioctl_ops hantro_ioctl_ops = { - .vidioc_querycap = vidioc_querycap, - .vidioc_enum_framesizes = vidioc_enum_framesizes, - -From 9d1f636edd321ed8a8a6bbe852d56dc01b275109 Mon Sep 17 00:00:00 2001 -From: Dafna Hirschfeld -Date: Mon, 23 Mar 2020 18:36:18 +0100 -Subject: [PATCH] media: v4l2-common: change the pixel_enc of V4L2_PIX_FMT_GREY - to YUV - -V4L2_PIX_FMT_GREY format is Ycbcr format without -the color data, therefore its pixel_enc should -set to V4L2_PIXEL_ENC_YUV. - -Signed-off-by: Dafna Hirschfeld -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 7ca02435ff25fd384dc7e02da7ea01fe2799ffce) ---- - drivers/media/v4l2-core/v4l2-common.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c -index d0e5ebc736f9..054f2e607dff 100644 ---- a/drivers/media/v4l2-core/v4l2-common.c -+++ b/drivers/media/v4l2-core/v4l2-common.c -@@ -250,7 +250,6 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) - { .format = V4L2_PIX_FMT_RGBA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_ABGR32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_BGRA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, -- { .format = V4L2_PIX_FMT_GREY, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_RGB565, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_RGB555, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - -@@ -274,6 +273,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) - { .format = V4L2_PIX_FMT_YUV420, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, - { .format = V4L2_PIX_FMT_YVU420, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, - { .format = V4L2_PIX_FMT_YUV422P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 1 }, -+ { .format = V4L2_PIX_FMT_GREY, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - - /* YUV planar formats, non contiguous variant */ - { .format = V4L2_PIX_FMT_YUV420M, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 3, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, - -From 4d0508cfc89d1c462c1ecf7b8714242be9c08d94 Mon Sep 17 00:00:00 2001 -From: Dafna Hirschfeld -Date: Mon, 16 Mar 2020 08:01:23 +0100 -Subject: [PATCH] media: v4l2-common: Add BGR666 to v4l2_format_info - -Add V4L2_PIX_FMT_BGR666 to the format table. - -Signed-off-by: Dafna Hirschfeld -Reviewed-by: Laurent Pinchart -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 58d4c14ed89ca51c782cab7ae6bf2c5215109204) ---- - drivers/media/v4l2-core/v4l2-common.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c -index 054f2e607dff..9e8eb45a5b03 100644 ---- a/drivers/media/v4l2-core/v4l2-common.c -+++ b/drivers/media/v4l2-core/v4l2-common.c -@@ -252,6 +252,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) - { .format = V4L2_PIX_FMT_BGRA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_RGB565, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_RGB555, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, -+ { .format = V4L2_PIX_FMT_BGR666, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - - /* YUV packed formats */ - { .format = V4L2_PIX_FMT_YUYV, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 2, .vdiv = 1 }, - -From dbdcb1168a4a2ca7722ba274816cd5c829a640f8 Mon Sep 17 00:00:00 2001 -From: Philipp Zabel -Date: Wed, 18 Mar 2020 19:35:32 +0100 -Subject: [PATCH] media: add v4l2 JPEG helpers - -Add helpers for JPEG header parsing. They allow both scanning for marker -segment positions and later parsing the segments individually, as -required by s5p-jpeg, as well as parsing all headers in one go, as -required by coda-vpu. The frame header is always parsed, as basically -all decoders are interested in width, height, and number of components. -For convenience, the JPEG chroma subsampling factors are decoded into a -v4l2_jpeg_chroma_subsampling enum. - -Only baseline and extended sequential DCT encoded JPEGs with 8-bit or -12-bit precision with up to four components are supported. - -Signed-off-by: Philipp Zabel -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 50733b5b9102da5b2415e3497aa89588396e4f20) ---- - drivers/media/v4l2-core/Kconfig | 4 + - drivers/media/v4l2-core/Makefile | 2 + - drivers/media/v4l2-core/v4l2-jpeg.c | 632 ++++++++++++++++++++++++++++++++++++ - include/media/v4l2-jpeg.h | 135 ++++++++ - 4 files changed, 773 insertions(+) - create mode 100644 drivers/media/v4l2-core/v4l2-jpeg.c - create mode 100644 include/media/v4l2-jpeg.h - -diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig -index 39e3fb30ba0b..89809ec24779 100644 ---- a/drivers/media/v4l2-core/Kconfig -+++ b/drivers/media/v4l2-core/Kconfig -@@ -45,6 +45,10 @@ config VIDEO_PCI_SKELETON - config VIDEO_TUNER - tristate - -+# Used by drivers that need v4l2-jpeg.ko -+config V4L2_JPEG_HELPER -+ tristate -+ - # Used by drivers that need v4l2-mem2mem.ko - config V4L2_MEM2MEM_DEV - tristate -diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile -index 786bd1ec4d1b..144564656d22 100644 ---- a/drivers/media/v4l2-core/Makefile -+++ b/drivers/media/v4l2-core/Makefile -@@ -24,6 +24,8 @@ obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o - - obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o - -+obj-$(CONFIG_V4L2_JPEG_HELPER) += v4l2-jpeg.o -+ - obj-$(CONFIG_VIDEOBUF_GEN) += videobuf-core.o - obj-$(CONFIG_VIDEOBUF_DMA_SG) += videobuf-dma-sg.o - obj-$(CONFIG_VIDEOBUF_DMA_CONTIG) += videobuf-dma-contig.o -diff --git a/drivers/media/v4l2-core/v4l2-jpeg.c b/drivers/media/v4l2-core/v4l2-jpeg.c -new file mode 100644 -index 000000000000..8947fd95c6f1 ---- /dev/null -+++ b/drivers/media/v4l2-core/v4l2-jpeg.c -@@ -0,0 +1,632 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * V4L2 JPEG header parser helpers. -+ * -+ * Copyright (C) 2019 Pengutronix, Philipp Zabel -+ * -+ * For reference, see JPEG ITU-T.81 (ISO/IEC 10918-1) [1] -+ * -+ * [1] https://www.w3.org/Graphics/JPEG/itu-t81.pdf -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+MODULE_DESCRIPTION("V4L2 JPEG header parser helpers"); -+MODULE_AUTHOR("Philipp Zabel "); -+MODULE_LICENSE("GPL"); -+ -+/* Table B.1 - Marker code assignments */ -+#define SOF0 0xffc0 /* start of frame */ -+#define SOF1 0xffc1 -+#define SOF2 0xffc2 -+#define SOF3 0xffc3 -+#define SOF5 0xffc5 -+#define SOF7 0xffc7 -+#define JPG 0xffc8 /* extensions */ -+#define SOF9 0xffc9 -+#define SOF11 0xffcb -+#define SOF13 0xffcd -+#define SOF15 0xffcf -+#define DHT 0xffc4 /* huffman table */ -+#define DAC 0xffcc /* arithmetic coding conditioning */ -+#define RST0 0xffd0 /* restart */ -+#define RST7 0xffd7 -+#define SOI 0xffd8 /* start of image */ -+#define EOI 0xffd9 /* end of image */ -+#define SOS 0xffda /* start of stream */ -+#define DQT 0xffdb /* quantization table */ -+#define DNL 0xffdc /* number of lines */ -+#define DRI 0xffdd /* restart interval */ -+#define DHP 0xffde /* hierarchical progression */ -+#define EXP 0xffdf /* expand reference */ -+#define APP0 0xffe0 /* application data */ -+#define APP15 0xffef -+#define JPG0 0xfff0 /* extensions */ -+#define JPG13 0xfffd -+#define COM 0xfffe /* comment */ -+#define TEM 0xff01 /* temporary */ -+ -+/** -+ * struct jpeg_stream - JPEG byte stream -+ * @curr: current position in stream -+ * @end: end position, after last byte -+ */ -+struct jpeg_stream { -+ u8 *curr; -+ u8 *end; -+}; -+ -+/* returns a value that fits into u8, or negative error */ -+static int jpeg_get_byte(struct jpeg_stream *stream) -+{ -+ if (stream->curr >= stream->end) -+ return -EINVAL; -+ -+ return *stream->curr++; -+} -+ -+/* returns a value that fits into u16, or negative error */ -+static int jpeg_get_word_be(struct jpeg_stream *stream) -+{ -+ u16 word; -+ -+ if (stream->curr + sizeof(__be16) > stream->end) -+ return -EINVAL; -+ -+ word = get_unaligned_be16(stream->curr); -+ stream->curr += sizeof(__be16); -+ -+ return word; -+} -+ -+static int jpeg_skip(struct jpeg_stream *stream, size_t len) -+{ -+ if (stream->curr + len > stream->end) -+ return -EINVAL; -+ -+ stream->curr += len; -+ -+ return 0; -+} -+ -+static int jpeg_next_marker(struct jpeg_stream *stream) -+{ -+ int byte; -+ u16 marker = 0; -+ -+ while ((byte = jpeg_get_byte(stream)) >= 0) { -+ marker = (marker << 8) | byte; -+ /* skip stuffing bytes and REServed markers */ -+ if (marker == TEM || (marker > 0xffbf && marker < 0xffff)) -+ return marker; -+ } -+ -+ return byte; -+} -+ -+/* this does not advance the current position in the stream */ -+static int jpeg_reference_segment(struct jpeg_stream *stream, -+ struct v4l2_jpeg_reference *segment) -+{ -+ u16 len; -+ -+ if (stream->curr + sizeof(__be16) > stream->end) -+ return -EINVAL; -+ -+ len = get_unaligned_be16(stream->curr); -+ if (stream->curr + len > stream->end) -+ return -EINVAL; -+ -+ segment->start = stream->curr; -+ segment->length = len; -+ -+ return 0; -+} -+ -+static int v4l2_jpeg_decode_subsampling(u8 nf, u8 h_v) -+{ -+ if (nf == 1) -+ return V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY; -+ -+ /* no chroma subsampling for 4-component images */ -+ if (nf == 4 && h_v != 0x11) -+ return -EINVAL; -+ -+ switch (h_v) { -+ case 0x11: -+ return V4L2_JPEG_CHROMA_SUBSAMPLING_444; -+ case 0x21: -+ return V4L2_JPEG_CHROMA_SUBSAMPLING_422; -+ case 0x22: -+ return V4L2_JPEG_CHROMA_SUBSAMPLING_420; -+ case 0x41: -+ return V4L2_JPEG_CHROMA_SUBSAMPLING_411; -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int jpeg_parse_frame_header(struct jpeg_stream *stream, u16 sof_marker, -+ struct v4l2_jpeg_frame_header *frame_header) -+{ -+ int len = jpeg_get_word_be(stream); -+ -+ if (len < 0) -+ return len; -+ /* Lf = 8 + 3 * Nf, Nf >= 1 */ -+ if (len < 8 + 3) -+ return -EINVAL; -+ -+ if (frame_header) { -+ /* Table B.2 - Frame header parameter sizes and values */ -+ int p, y, x, nf; -+ int i; -+ -+ p = jpeg_get_byte(stream); -+ if (p < 0) -+ return p; -+ /* -+ * Baseline DCT only supports 8-bit precision. -+ * Extended sequential DCT also supports 12-bit precision. -+ */ -+ if (p != 8 && (p != 12 || sof_marker != SOF1)) -+ return -EINVAL; -+ -+ y = jpeg_get_word_be(stream); -+ if (y < 0) -+ return y; -+ if (y == 0) -+ return -EINVAL; -+ -+ x = jpeg_get_word_be(stream); -+ if (x < 0) -+ return x; -+ if (x == 0) -+ return -EINVAL; -+ -+ nf = jpeg_get_byte(stream); -+ if (nf < 0) -+ return nf; -+ /* -+ * The spec allows 1 <= Nf <= 255, but we only support up to 4 -+ * components. -+ */ -+ if (nf < 1 || nf > V4L2_JPEG_MAX_COMPONENTS) -+ return -EINVAL; -+ if (len != 8 + 3 * nf) -+ return -EINVAL; -+ -+ frame_header->precision = p; -+ frame_header->height = y; -+ frame_header->width = x; -+ frame_header->num_components = nf; -+ -+ for (i = 0; i < nf; i++) { -+ struct v4l2_jpeg_frame_component_spec *component; -+ int c, h_v, tq; -+ -+ c = jpeg_get_byte(stream); -+ if (c < 0) -+ return c; -+ -+ h_v = jpeg_get_byte(stream); -+ if (h_v < 0) -+ return h_v; -+ if (i == 0) { -+ int subs; -+ -+ subs = v4l2_jpeg_decode_subsampling(nf, h_v); -+ if (subs < 0) -+ return subs; -+ frame_header->subsampling = subs; -+ } else if (h_v != 0x11) { -+ /* all chroma sampling factors must be 1 */ -+ return -EINVAL; -+ } -+ -+ tq = jpeg_get_byte(stream); -+ if (tq < 0) -+ return tq; -+ -+ component = &frame_header->component[i]; -+ component->component_identifier = c; -+ component->horizontal_sampling_factor = -+ (h_v >> 4) & 0xf; -+ component->vertical_sampling_factor = h_v & 0xf; -+ component->quantization_table_selector = tq; -+ } -+ } else { -+ return jpeg_skip(stream, len - 2); -+ } -+ -+ return 0; -+} -+ -+static int jpeg_parse_scan_header(struct jpeg_stream *stream, -+ struct v4l2_jpeg_scan_header *scan_header) -+{ -+ size_t skip; -+ int len = jpeg_get_word_be(stream); -+ -+ if (len < 0) -+ return len; -+ /* Ls = 8 + 3 * Ns, Ns >= 1 */ -+ if (len < 6 + 2) -+ return -EINVAL; -+ -+ if (scan_header) { -+ int ns; -+ int i; -+ -+ ns = jpeg_get_byte(stream); -+ if (ns < 0) -+ return ns; -+ if (ns < 1 || ns > 4 || len != 6 + 2 * ns) -+ return -EINVAL; -+ -+ scan_header->num_components = ns; -+ -+ for (i = 0; i < ns; i++) { -+ struct v4l2_jpeg_scan_component_spec *component; -+ int cs, td_ta; -+ -+ cs = jpeg_get_byte(stream); -+ if (cs < 0) -+ return cs; -+ -+ td_ta = jpeg_get_byte(stream); -+ if (td_ta < 0) -+ return td_ta; -+ -+ component = &scan_header->component[i]; -+ component->component_selector = cs; -+ component->dc_entropy_coding_table_selector = -+ (td_ta >> 4) & 0xf; -+ component->ac_entropy_coding_table_selector = -+ td_ta & 0xf; -+ } -+ -+ skip = 3; /* skip Ss, Se, Ah, and Al */ -+ } else { -+ skip = len - 2; -+ } -+ -+ return jpeg_skip(stream, skip); -+} -+ -+/* B.2.4.1 Quantization table-specification syntax */ -+static int jpeg_parse_quantization_tables(struct jpeg_stream *stream, -+ u8 precision, -+ struct v4l2_jpeg_reference *tables) -+{ -+ int len = jpeg_get_word_be(stream); -+ -+ if (len < 0) -+ return len; -+ /* Lq = 2 + n * 65 (for baseline DCT), n >= 1 */ -+ if (len < 2 + 65) -+ return -EINVAL; -+ -+ len -= 2; -+ while (len >= 65) { -+ u8 pq, tq, *qk; -+ int ret; -+ int pq_tq = jpeg_get_byte(stream); -+ -+ if (pq_tq < 0) -+ return pq_tq; -+ -+ /* quantization table element precision */ -+ pq = (pq_tq >> 4) & 0xf; -+ /* -+ * Only 8-bit Qk values for 8-bit sample precision. Extended -+ * sequential DCT with 12-bit sample precision also supports -+ * 16-bit Qk values. -+ */ -+ if (pq != 0 && (pq != 1 || precision != 12)) -+ return -EINVAL; -+ -+ /* quantization table destination identifier */ -+ tq = pq_tq & 0xf; -+ if (tq > 3) -+ return -EINVAL; -+ -+ /* quantization table element */ -+ qk = stream->curr; -+ ret = jpeg_skip(stream, pq ? 128 : 64); -+ if (ret < 0) -+ return -EINVAL; -+ -+ if (tables) { -+ tables[tq].start = qk; -+ tables[tq].length = pq ? 128 : 64; -+ } -+ -+ len -= pq ? 129 : 65; -+ } -+ -+ return 0; -+} -+ -+/* B.2.4.2 Huffman table-specification syntax */ -+static int jpeg_parse_huffman_tables(struct jpeg_stream *stream, -+ struct v4l2_jpeg_reference *tables) -+{ -+ int mt; -+ int len = jpeg_get_word_be(stream); -+ -+ if (len < 0) -+ return len; -+ /* Table B.5 - Huffman table specification parameter sizes and values */ -+ if (len < 2 + 17) -+ return -EINVAL; -+ -+ for (len -= 2; len >= 17; len -= 17 + mt) { -+ u8 tc, th, *table; -+ int tc_th = jpeg_get_byte(stream); -+ int i, ret; -+ -+ if (tc_th < 0) -+ return tc_th; -+ -+ /* table class - 0 = DC, 1 = AC */ -+ tc = (tc_th >> 4) & 0xf; -+ if (tc > 1) -+ return -EINVAL; -+ -+ /* huffman table destination identifier */ -+ th = tc_th & 0xf; -+ /* only two Huffman tables for baseline DCT */ -+ if (th > 1) -+ return -EINVAL; -+ -+ /* BITS - number of Huffman codes with length i */ -+ table = stream->curr; -+ mt = 0; -+ for (i = 0; i < 16; i++) { -+ int li; -+ -+ li = jpeg_get_byte(stream); -+ if (li < 0) -+ return li; -+ -+ mt += li; -+ } -+ /* HUFFVAL - values associated with each Huffman code */ -+ ret = jpeg_skip(stream, mt); -+ if (ret < 0) -+ return ret; -+ -+ if (tables) { -+ tables[(tc << 1) | th].start = table; -+ tables[(tc << 1) | th].length = stream->curr - table; -+ } -+ } -+ -+ return jpeg_skip(stream, len - 2); -+} -+ -+/* B.2.4.4 Restart interval definition syntax */ -+static int jpeg_parse_restart_interval(struct jpeg_stream *stream, -+ u16 *restart_interval) -+{ -+ int len = jpeg_get_word_be(stream); -+ int ri; -+ -+ if (len < 0) -+ return len; -+ if (len != 4) -+ return -EINVAL; -+ -+ ri = jpeg_get_word_be(stream); -+ if (ri < 0) -+ return ri; -+ -+ *restart_interval = ri; -+ -+ return 0; -+} -+ -+static int jpeg_skip_segment(struct jpeg_stream *stream) -+{ -+ int len = jpeg_get_word_be(stream); -+ -+ if (len < 0) -+ return len; -+ if (len < 2) -+ return -EINVAL; -+ -+ return jpeg_skip(stream, len - 2); -+} -+ -+/** -+ * jpeg_parse_header - locate marker segments and optionally parse headers -+ * @buf: address of the JPEG buffer, should start with a SOI marker -+ * @len: length of the JPEG buffer -+ * @out: returns marker segment positions and optionally parsed headers -+ * -+ * The out->scan_header pointer must be initialized to NULL or point to a valid -+ * v4l2_jpeg_scan_header structure. The out->huffman_tables and -+ * out->quantization_tables pointers must be initialized to NULL or point to a -+ * valid array of 4 v4l2_jpeg_reference structures each. -+ * -+ * Returns 0 or negative error if parsing failed. -+ */ -+int v4l2_jpeg_parse_header(void *buf, size_t len, struct v4l2_jpeg_header *out) -+{ -+ struct jpeg_stream stream; -+ int marker; -+ int ret = 0; -+ -+ stream.curr = buf; -+ stream.end = stream.curr + len; -+ -+ out->num_dht = 0; -+ out->num_dqt = 0; -+ -+ /* the first marker must be SOI */ -+ marker = jpeg_next_marker(&stream); -+ if (marker < 0) -+ return marker; -+ if (marker != SOI) -+ return -EINVAL; -+ -+ /* loop through marker segments */ -+ while ((marker = jpeg_next_marker(&stream)) >= 0) { -+ switch (marker) { -+ /* baseline DCT, extended sequential DCT */ -+ case SOF0 ... SOF1: -+ ret = jpeg_reference_segment(&stream, &out->sof); -+ if (ret < 0) -+ return ret; -+ ret = jpeg_parse_frame_header(&stream, marker, -+ &out->frame); -+ break; -+ /* progressive, lossless */ -+ case SOF2 ... SOF3: -+ /* differential coding */ -+ case SOF5 ... SOF7: -+ /* arithmetic coding */ -+ case SOF9 ... SOF11: -+ case SOF13 ... SOF15: -+ case DAC: -+ case TEM: -+ return -EINVAL; -+ -+ case DHT: -+ ret = jpeg_reference_segment(&stream, -+ &out->dht[out->num_dht++ % 4]); -+ if (ret < 0) -+ return ret; -+ ret = jpeg_parse_huffman_tables(&stream, -+ out->huffman_tables); -+ break; -+ case DQT: -+ ret = jpeg_reference_segment(&stream, -+ &out->dqt[out->num_dqt++ % 4]); -+ if (ret < 0) -+ return ret; -+ ret = jpeg_parse_quantization_tables(&stream, -+ out->frame.precision, -+ out->quantization_tables); -+ break; -+ case DRI: -+ ret = jpeg_parse_restart_interval(&stream, -+ &out->restart_interval); -+ break; -+ -+ case SOS: -+ ret = jpeg_reference_segment(&stream, &out->sos); -+ if (ret < 0) -+ return ret; -+ ret = jpeg_parse_scan_header(&stream, out->scan); -+ /* -+ * stop parsing, the scan header marks the beginning of -+ * the entropy coded segment -+ */ -+ out->ecs_offset = stream.curr - (u8 *)buf; -+ return ret; -+ -+ /* markers without parameters */ -+ case RST0 ... RST7: /* restart */ -+ case SOI: /* start of image */ -+ case EOI: /* end of image */ -+ break; -+ -+ /* skip unknown or unsupported marker segments */ -+ default: -+ ret = jpeg_skip_segment(&stream); -+ break; -+ } -+ if (ret < 0) -+ return ret; -+ } -+ -+ return marker; -+} -+EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_header); -+ -+/** -+ * v4l2_jpeg_parse_frame_header - parse frame header -+ * @buf: address of the frame header, after the SOF0 marker -+ * @len: length of the frame header -+ * @frame_header: returns the parsed frame header -+ * -+ * Returns 0 or negative error if parsing failed. -+ */ -+int v4l2_jpeg_parse_frame_header(void *buf, size_t len, -+ struct v4l2_jpeg_frame_header *frame_header) -+{ -+ struct jpeg_stream stream; -+ -+ stream.curr = buf; -+ stream.end = stream.curr + len; -+ return jpeg_parse_frame_header(&stream, SOF0, frame_header); -+} -+EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_frame_header); -+ -+/** -+ * v4l2_jpeg_parse_scan_header - parse scan header -+ * @buf: address of the scan header, after the SOS marker -+ * @len: length of the scan header -+ * @scan_header: returns the parsed scan header -+ * -+ * Returns 0 or negative error if parsing failed. -+ */ -+int v4l2_jpeg_parse_scan_header(void *buf, size_t len, -+ struct v4l2_jpeg_scan_header *scan_header) -+{ -+ struct jpeg_stream stream; -+ -+ stream.curr = buf; -+ stream.end = stream.curr + len; -+ return jpeg_parse_scan_header(&stream, scan_header); -+} -+EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_scan_header); -+ -+/** -+ * v4l2_jpeg_parse_quantization_tables - parse quantization tables segment -+ * @buf: address of the quantization table segment, after the DQT marker -+ * @len: length of the quantization table segment -+ * @precision: sample precision (P) in bits per component -+ * @q_tables: returns four references into the buffer for the -+ * four possible quantization table destinations -+ * -+ * Returns 0 or negative error if parsing failed. -+ */ -+int v4l2_jpeg_parse_quantization_tables(void *buf, size_t len, u8 precision, -+ struct v4l2_jpeg_reference *q_tables) -+{ -+ struct jpeg_stream stream; -+ -+ stream.curr = buf; -+ stream.end = stream.curr + len; -+ return jpeg_parse_quantization_tables(&stream, precision, q_tables); -+} -+EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_quantization_tables); -+ -+/** -+ * v4l2_jpeg_parse_huffman_tables - parse huffman tables segment -+ * @buf: address of the Huffman table segment, after the DHT marker -+ * @len: length of the Huffman table segment -+ * @huffman_tables: returns four references into the buffer for the -+ * four possible Huffman table destinations, in -+ * the order DC0, DC1, AC0, AC1 -+ * -+ * Returns 0 or negative error if parsing failed. -+ */ -+int v4l2_jpeg_parse_huffman_tables(void *buf, size_t len, -+ struct v4l2_jpeg_reference *huffman_tables) -+{ -+ struct jpeg_stream stream; -+ -+ stream.curr = buf; -+ stream.end = stream.curr + len; -+ return jpeg_parse_huffman_tables(&stream, huffman_tables); -+} -+EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_huffman_tables); -diff --git a/include/media/v4l2-jpeg.h b/include/media/v4l2-jpeg.h -new file mode 100644 -index 000000000000..ddba2a56c321 ---- /dev/null -+++ b/include/media/v4l2-jpeg.h -@@ -0,0 +1,135 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+/* -+ * V4L2 JPEG helpers header -+ * -+ * Copyright (C) 2019 Pengutronix, Philipp Zabel -+ * -+ * For reference, see JPEG ITU-T.81 (ISO/IEC 10918-1) -+ */ -+ -+#ifndef _V4L2_JPEG_H -+#define _V4L2_JPEG_H -+ -+#include -+ -+#define V4L2_JPEG_MAX_COMPONENTS 4 -+#define V4L2_JPEG_MAX_TABLES 4 -+ -+/** -+ * struct v4l2_jpeg_reference - reference into the JPEG buffer -+ * @start: pointer to the start of the referenced segment or table -+ * @length: size of the referenced segment or table -+ * -+ * Wnen referencing marker segments, start points right after the marker code, -+ * and length is the size of the segment parameters, excluding the marker code. -+ */ -+struct v4l2_jpeg_reference { -+ u8 *start; -+ size_t length; -+}; -+ -+/* B.2.2 Frame header syntax */ -+ -+/** -+ * struct v4l2_jpeg_frame_component_spec - frame component-specification -+ * @component_identifier: C[i] -+ * @horizontal_sampling_factor: H[i] -+ * @vertical_sampling_factor: V[i] -+ * @quantization_table_selector: quantization table destination selector Tq[i] -+ */ -+struct v4l2_jpeg_frame_component_spec { -+ u8 component_identifier; -+ u8 horizontal_sampling_factor; -+ u8 vertical_sampling_factor; -+ u8 quantization_table_selector; -+}; -+ -+/** -+ * struct v4l2_jpeg_frame_header - JPEG frame header -+ * @height: Y -+ * @width: X -+ * @precision: P -+ * @num_components: Nf -+ * @component: component-specification, see v4l2_jpeg_frame_component_spec -+ * @subsampling: decoded subsampling from component-specification -+ */ -+struct v4l2_jpeg_frame_header { -+ u16 height; -+ u16 width; -+ u8 precision; -+ u8 num_components; -+ struct v4l2_jpeg_frame_component_spec component[V4L2_JPEG_MAX_COMPONENTS]; -+ enum v4l2_jpeg_chroma_subsampling subsampling; -+}; -+ -+/* B.2.3 Scan header syntax */ -+ -+/** -+ * struct v4l2_jpeg_scan_component_spec - scan component-specification -+ * @component_selector: Cs[j] -+ * @dc_entropy_coding_table_selector: Td[j] -+ * @ac_entropy_coding_table_selector: Ta[j] -+ */ -+struct v4l2_jpeg_scan_component_spec { -+ u8 component_selector; -+ u8 dc_entropy_coding_table_selector; -+ u8 ac_entropy_coding_table_selector; -+}; -+ -+/** -+ * struct v4l2_jpeg_scan_header - JPEG scan header -+ * @num_components: Ns -+ * @component: component-specification, see v4l2_jpeg_scan_component_spec -+ */ -+struct v4l2_jpeg_scan_header { -+ u8 num_components; /* Ns */ -+ struct v4l2_jpeg_scan_component_spec component[V4L2_JPEG_MAX_COMPONENTS]; -+ /* Ss, Se, Ah, and Al are not used by any driver */ -+}; -+ -+/** -+ * struct v4l2_jpeg_header - parsed JPEG header -+ * @sof: pointer to frame header and size -+ * @sos: pointer to scan header and size -+ * @dht: pointers to huffman tables and sizes -+ * @dqt: pointers to quantization tables and sizes -+ * @frame: parsed frame header -+ * @scan: pointer to parsed scan header, optional -+ * @quantization_tables: references to four quantization tables, optional -+ * @huffman_tables: references to four Huffman tables in DC0, DC1, AC0, AC1 -+ * order, optional -+ * @restart_interval: number of MCU per restart interval, Ri -+ * @ecs_offset: buffer offset in bytes to the entropy coded segment -+ * -+ * When this structure is passed to v4l2_jpeg_parse_header, the optional scan, -+ * quantization_tables, and huffman_tables pointers must be initialized to NULL -+ * or point at valid memory. -+ */ -+struct v4l2_jpeg_header { -+ struct v4l2_jpeg_reference sof; -+ struct v4l2_jpeg_reference sos; -+ unsigned int num_dht; -+ struct v4l2_jpeg_reference dht[V4L2_JPEG_MAX_TABLES]; -+ unsigned int num_dqt; -+ struct v4l2_jpeg_reference dqt[V4L2_JPEG_MAX_TABLES]; -+ -+ struct v4l2_jpeg_frame_header frame; -+ struct v4l2_jpeg_scan_header *scan; -+ struct v4l2_jpeg_reference *quantization_tables; -+ struct v4l2_jpeg_reference *huffman_tables; -+ u16 restart_interval; -+ size_t ecs_offset; -+}; -+ -+int v4l2_jpeg_parse_header(void *buf, size_t len, struct v4l2_jpeg_header *out); -+ -+int v4l2_jpeg_parse_frame_header(void *buf, size_t len, -+ struct v4l2_jpeg_frame_header *frame_header); -+int v4l2_jpeg_parse_scan_header(void *buf, size_t len, -+ struct v4l2_jpeg_scan_header *scan_header); -+int v4l2_jpeg_parse_quantization_tables(void *buf, size_t len, u8 precision, -+ struct v4l2_jpeg_reference *q_tables); -+int v4l2_jpeg_parse_huffman_tables(void *buf, size_t len, -+ struct v4l2_jpeg_reference *huffman_tables); -+ -+#endif - -From 035031da98faeb8a01069ac2a0ba3925b72a451f Mon Sep 17 00:00:00 2001 -From: Maheshwar Ajja -Date: Mon, 16 Mar 2020 23:42:30 +0100 -Subject: [PATCH] media: v4l2-ctrl: Add H264 profile and levels - -Add H264 profile "Contrained High" and H264 levels "5.2", -"6.0", "6.1" and "6.2". - -Signed-off-by: Maheshwar Ajja -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 1ca3cb46a992d83ebd093acc64241007b20c5033) ---- - drivers/media/v4l2-core/v4l2-ctrls.c | 5 +++++ - include/uapi/linux/v4l2-controls.h | 5 +++++ - 2 files changed, 10 insertions(+) - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 93d33d1db4e8..0186ba85aac7 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -336,6 +336,10 @@ const char * const *v4l2_ctrl_get_menu(u32 id) - "4.2", - "5", - "5.1", -+ "5.2", -+ "6.0", -+ "6.1", -+ "6.2", - NULL, - }; - static const char * const h264_loop_filter[] = { -@@ -362,6 +366,7 @@ const char * const *v4l2_ctrl_get_menu(u32 id) - "Scalable High Intra", - "Stereo High", - "Multiview High", -+ "Constrained High", - NULL, - }; - static const char * const vui_sar_idc[] = { -diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h -index 1a58d7cc4ccc..0ba1005c9651 100644 ---- a/include/uapi/linux/v4l2-controls.h -+++ b/include/uapi/linux/v4l2-controls.h -@@ -473,6 +473,10 @@ enum v4l2_mpeg_video_h264_level { - V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13, - V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14, - V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15, -+ V4L2_MPEG_VIDEO_H264_LEVEL_5_2 = 16, -+ V4L2_MPEG_VIDEO_H264_LEVEL_6_0 = 17, -+ V4L2_MPEG_VIDEO_H264_LEVEL_6_1 = 18, -+ V4L2_MPEG_VIDEO_H264_LEVEL_6_2 = 19, - }; - #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360) - #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361) -@@ -501,6 +505,7 @@ enum v4l2_mpeg_video_h264_profile { - V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14, - V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15, - V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16, -+ V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH = 17, - }; - #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364) - #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365) - -From 8d940ad30dccc2eba7b79e2498291afe1c6d6a59 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Sat, 4 Apr 2020 00:13:41 +0200 -Subject: [PATCH] media: v4l2-core: Add helpers to build the H264 P/B0/B1 - reflists - -Building those list is a standard procedure described in section -'8.2.4 Decoding process for reference picture lists construction' of -the H264 specification. - -We already have 2 drivers needing the same logic (hantro and rkvdec) and -I suspect we will soon have more. - -Let's provide generic helpers to create those lists. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 624922a2739b96b83aaf1655d0519b41d30140f7) ---- - drivers/media/v4l2-core/Kconfig | 4 + - drivers/media/v4l2-core/Makefile | 1 + - drivers/media/v4l2-core/v4l2-h264.c | 270 ++++++++++++++++++++++++++++++++++++ - include/media/h264-ctrls.h | 8 +- - include/media/v4l2-h264.h | 85 ++++++++++++ - 5 files changed, 367 insertions(+), 1 deletion(-) - create mode 100644 drivers/media/v4l2-core/v4l2-h264.c - create mode 100644 include/media/v4l2-h264.h - -diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig -index 89809ec24779..db09e8b643fd 100644 ---- a/drivers/media/v4l2-core/Kconfig -+++ b/drivers/media/v4l2-core/Kconfig -@@ -49,6 +49,10 @@ config VIDEO_TUNER - config V4L2_JPEG_HELPER - tristate - -+# Used by drivers that need v4l2-h264.ko -+config V4L2_H264 -+ tristate -+ - # Used by drivers that need v4l2-mem2mem.ko - config V4L2_MEM2MEM_DEV - tristate -diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile -index 144564656d22..2ef0c7c958a2 100644 ---- a/drivers/media/v4l2-core/Makefile -+++ b/drivers/media/v4l2-core/Makefile -@@ -21,6 +21,7 @@ obj-$(CONFIG_VIDEO_V4L2) += v4l2-dv-timings.o - obj-$(CONFIG_VIDEO_TUNER) += tuner.o - - obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o -+obj-$(CONFIG_V4L2_H264) += v4l2-h264.o - - obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o - -diff --git a/drivers/media/v4l2-core/v4l2-h264.c b/drivers/media/v4l2-core/v4l2-h264.c -new file mode 100644 -index 000000000000..edf6225f0522 ---- /dev/null -+++ b/drivers/media/v4l2-core/v4l2-h264.c -@@ -0,0 +1,270 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * V4L2 H264 helpers. -+ * -+ * Copyright (C) 2019 Collabora, Ltd. -+ * -+ * Author: Boris Brezillon -+ */ -+ -+#include -+#include -+ -+#include -+ -+/** -+ * v4l2_h264_init_reflist_builder() - Initialize a P/B0/B1 reference list -+ * builder -+ * -+ * @b: the builder context to initialize -+ * @dec_params: decode parameters control -+ * @slice_params: first slice parameters control -+ * @sps: SPS control -+ * @dpb: DPB to use when creating the reference list -+ */ -+void -+v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, -+ const struct v4l2_ctrl_h264_decode_params *dec_params, -+ const struct v4l2_ctrl_h264_slice_params *slice_params, -+ const struct v4l2_ctrl_h264_sps *sps, -+ const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]) -+{ -+ int cur_frame_num, max_frame_num; -+ unsigned int i; -+ -+ max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); -+ cur_frame_num = slice_params->frame_num; -+ -+ memset(b, 0, sizeof(*b)); -+ if (!(slice_params->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)) -+ b->cur_pic_order_count = min(dec_params->bottom_field_order_cnt, -+ dec_params->top_field_order_cnt); -+ else if (slice_params->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) -+ b->cur_pic_order_count = dec_params->bottom_field_order_cnt; -+ else -+ b->cur_pic_order_count = dec_params->top_field_order_cnt; -+ -+ for (i = 0; i < V4L2_H264_NUM_DPB_ENTRIES; i++) { -+ u32 pic_order_count; -+ -+ if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) -+ continue; -+ -+ b->refs[i].pic_num = dpb[i].pic_num; -+ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) -+ b->refs[i].longterm = true; -+ -+ /* -+ * Handle frame_num wraparound as described in section -+ * '8.2.4.1 Decoding process for picture numbers' of the spec. -+ * TODO: This logic will have to be adjusted when we start -+ * supporting interlaced content. -+ */ -+ if (dpb[i].frame_num > cur_frame_num) -+ b->refs[i].frame_num = (int)dpb[i].frame_num - -+ max_frame_num; -+ else -+ b->refs[i].frame_num = dpb[i].frame_num; -+ -+ if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) -+ pic_order_count = min(dpb[i].top_field_order_cnt, -+ dpb[i].bottom_field_order_cnt); -+ else if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD) -+ pic_order_count = dpb[i].bottom_field_order_cnt; -+ else -+ pic_order_count = dpb[i].top_field_order_cnt; -+ -+ b->refs[i].pic_order_count = pic_order_count; -+ b->unordered_reflist[b->num_valid] = i; -+ b->num_valid++; -+ } -+ -+ for (i = b->num_valid; i < ARRAY_SIZE(b->unordered_reflist); i++) -+ b->unordered_reflist[i] = i; -+} -+EXPORT_SYMBOL_GPL(v4l2_h264_init_reflist_builder); -+ -+static int v4l2_h264_p_ref_list_cmp(const void *ptra, const void *ptrb, -+ const void *data) -+{ -+ const struct v4l2_h264_reflist_builder *builder = data; -+ u8 idxa, idxb; -+ -+ idxa = *((u8 *)ptra); -+ idxb = *((u8 *)ptrb); -+ -+ if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES || -+ idxb >= V4L2_H264_NUM_DPB_ENTRIES)) -+ return 1; -+ -+ if (builder->refs[idxa].longterm != builder->refs[idxb].longterm) { -+ /* Short term pics first. */ -+ if (!builder->refs[idxa].longterm) -+ return -1; -+ else -+ return 1; -+ } -+ -+ /* -+ * Short term pics in descending pic num order, long term ones in -+ * ascending order. -+ */ -+ if (!builder->refs[idxa].longterm) -+ return builder->refs[idxb].frame_num < -+ builder->refs[idxa].frame_num ? -+ -1 : 1; -+ -+ return builder->refs[idxa].pic_num < builder->refs[idxb].pic_num ? -+ -1 : 1; -+} -+ -+static int v4l2_h264_b0_ref_list_cmp(const void *ptra, const void *ptrb, -+ const void *data) -+{ -+ const struct v4l2_h264_reflist_builder *builder = data; -+ s32 poca, pocb; -+ u8 idxa, idxb; -+ -+ idxa = *((u8 *)ptra); -+ idxb = *((u8 *)ptrb); -+ -+ if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES || -+ idxb >= V4L2_H264_NUM_DPB_ENTRIES)) -+ return 1; -+ -+ if (builder->refs[idxa].longterm != builder->refs[idxb].longterm) { -+ /* Short term pics first. */ -+ if (!builder->refs[idxa].longterm) -+ return -1; -+ else -+ return 1; -+ } -+ -+ /* Long term pics in ascending pic num order. */ -+ if (builder->refs[idxa].longterm) -+ return builder->refs[idxa].pic_num < -+ builder->refs[idxb].pic_num ? -+ -1 : 1; -+ -+ poca = builder->refs[idxa].pic_order_count; -+ pocb = builder->refs[idxb].pic_order_count; -+ -+ /* -+ * Short term pics with POC < cur POC first in POC descending order -+ * followed by short term pics with POC > cur POC in POC ascending -+ * order. -+ */ -+ if ((poca < builder->cur_pic_order_count) != -+ (pocb < builder->cur_pic_order_count)) -+ return poca < pocb ? -1 : 1; -+ else if (poca < builder->cur_pic_order_count) -+ return pocb < poca ? -1 : 1; -+ -+ return poca < pocb ? -1 : 1; -+} -+ -+static int v4l2_h264_b1_ref_list_cmp(const void *ptra, const void *ptrb, -+ const void *data) -+{ -+ const struct v4l2_h264_reflist_builder *builder = data; -+ s32 poca, pocb; -+ u8 idxa, idxb; -+ -+ idxa = *((u8 *)ptra); -+ idxb = *((u8 *)ptrb); -+ -+ if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES || -+ idxb >= V4L2_H264_NUM_DPB_ENTRIES)) -+ return 1; -+ -+ if (builder->refs[idxa].longterm != builder->refs[idxb].longterm) { -+ /* Short term pics first. */ -+ if (!builder->refs[idxa].longterm) -+ return -1; -+ else -+ return 1; -+ } -+ -+ /* Long term pics in ascending pic num order. */ -+ if (builder->refs[idxa].longterm) -+ return builder->refs[idxa].pic_num < -+ builder->refs[idxb].pic_num ? -+ -1 : 1; -+ -+ poca = builder->refs[idxa].pic_order_count; -+ pocb = builder->refs[idxb].pic_order_count; -+ -+ /* -+ * Short term pics with POC > cur POC first in POC ascending order -+ * followed by short term pics with POC < cur POC in POC descending -+ * order. -+ */ -+ if ((poca < builder->cur_pic_order_count) != -+ (pocb < builder->cur_pic_order_count)) -+ return pocb < poca ? -1 : 1; -+ else if (poca < builder->cur_pic_order_count) -+ return pocb < poca ? -1 : 1; -+ -+ return poca < pocb ? -1 : 1; -+} -+ -+/** -+ * v4l2_h264_build_p_ref_list() - Build the P reference list -+ * -+ * @builder: reference list builder context -+ * @reflist: 16-bytes array used to store the P reference list. Each entry -+ * is an index in the DPB -+ * -+ * This functions builds the P reference lists. This procedure is describe in -+ * section '8.2.4 Decoding process for reference picture lists construction' -+ * of the H264 spec. This function can be used by H264 decoder drivers that -+ * need to pass a P reference list to the hardware. -+ */ -+void -+v4l2_h264_build_p_ref_list(const struct v4l2_h264_reflist_builder *builder, -+ u8 *reflist) -+{ -+ memcpy(reflist, builder->unordered_reflist, -+ sizeof(builder->unordered_reflist[0]) * builder->num_valid); -+ sort_r(reflist, builder->num_valid, sizeof(*reflist), -+ v4l2_h264_p_ref_list_cmp, NULL, builder); -+} -+EXPORT_SYMBOL_GPL(v4l2_h264_build_p_ref_list); -+ -+/** -+ * v4l2_h264_build_b_ref_lists() - Build the B0/B1 reference lists -+ * -+ * @builder: reference list builder context -+ * @b0_reflist: 16-bytes array used to store the B0 reference list. Each entry -+ * is an index in the DPB -+ * @b1_reflist: 16-bytes array used to store the B1 reference list. Each entry -+ * is an index in the DPB -+ * -+ * This functions builds the B0/B1 reference lists. This procedure is described -+ * in section '8.2.4 Decoding process for reference picture lists construction' -+ * of the H264 spec. This function can be used by H264 decoder drivers that -+ * need to pass B0/B1 reference lists to the hardware. -+ */ -+void -+v4l2_h264_build_b_ref_lists(const struct v4l2_h264_reflist_builder *builder, -+ u8 *b0_reflist, u8 *b1_reflist) -+{ -+ memcpy(b0_reflist, builder->unordered_reflist, -+ sizeof(builder->unordered_reflist[0]) * builder->num_valid); -+ sort_r(b0_reflist, builder->num_valid, sizeof(*b0_reflist), -+ v4l2_h264_b0_ref_list_cmp, NULL, builder); -+ -+ memcpy(b1_reflist, builder->unordered_reflist, -+ sizeof(builder->unordered_reflist[0]) * builder->num_valid); -+ sort_r(b1_reflist, builder->num_valid, sizeof(*b1_reflist), -+ v4l2_h264_b1_ref_list_cmp, NULL, builder); -+ -+ if (builder->num_valid > 1 && -+ !memcmp(b1_reflist, b0_reflist, builder->num_valid)) -+ swap(b1_reflist[0], b1_reflist[1]); -+} -+EXPORT_SYMBOL_GPL(v4l2_h264_build_b_ref_lists); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("V4L2 H264 Helpers"); -+MODULE_AUTHOR("Boris Brezillon "); -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 1c6ff7d63bca..080fd1293c42 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -13,6 +13,12 @@ - - #include - -+/* -+ * Maximum DPB size, as specified by section 'A.3.1 Level limits -+ * common to the Baseline, Main, and Extended profiles'. -+ */ -+#define V4L2_H264_NUM_DPB_ENTRIES 16 -+ - /* Our pixel format isn't stable at the moment */ - #define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */ - -@@ -201,7 +207,7 @@ struct v4l2_h264_dpb_entry { - #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 - - struct v4l2_ctrl_h264_decode_params { -- struct v4l2_h264_dpb_entry dpb[16]; -+ struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]; - __u16 num_slices; - __u16 nal_ref_idc; - __s32 top_field_order_cnt; -diff --git a/include/media/v4l2-h264.h b/include/media/v4l2-h264.h -new file mode 100644 -index 000000000000..bc9ebb560ccf ---- /dev/null -+++ b/include/media/v4l2-h264.h -@@ -0,0 +1,85 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+/* -+ * Helper functions for H264 codecs. -+ * -+ * Copyright (c) 2019 Collabora, Ltd. -+ * -+ * Author: Boris Brezillon -+ */ -+ -+#ifndef _MEDIA_V4L2_H264_H -+#define _MEDIA_V4L2_H264_H -+ -+#include -+ -+/** -+ * struct v4l2_h264_reflist_builder - Reference list builder object -+ * -+ * @refs.pic_order_count: reference picture order count -+ * @refs.frame_num: reference frame number -+ * @refs.pic_num: reference picture number -+ * @refs.longterm: set to true for a long term reference -+ * @refs: array of references -+ * @cur_pic_order_count: picture order count of the frame being decoded -+ * @unordered_reflist: unordered list of references. Will be used to generate -+ * ordered P/B0/B1 lists -+ * @num_valid: number of valid references in the refs array -+ * -+ * This object stores the context of the P/B0/B1 reference list builder. -+ * This procedure is described in section '8.2.4 Decoding process for reference -+ * picture lists construction' of the H264 spec. -+ */ -+struct v4l2_h264_reflist_builder { -+ struct { -+ s32 pic_order_count; -+ int frame_num; -+ u16 pic_num; -+ u16 longterm : 1; -+ } refs[V4L2_H264_NUM_DPB_ENTRIES]; -+ s32 cur_pic_order_count; -+ u8 unordered_reflist[V4L2_H264_NUM_DPB_ENTRIES]; -+ u8 num_valid; -+}; -+ -+void -+v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, -+ const struct v4l2_ctrl_h264_decode_params *dec_params, -+ const struct v4l2_ctrl_h264_slice_params *slice_params, -+ const struct v4l2_ctrl_h264_sps *sps, -+ const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]); -+ -+/** -+ * v4l2_h264_build_b_ref_lists() - Build the B0/B1 reference lists -+ * -+ * @builder: reference list builder context -+ * @b0_reflist: 16-bytes array used to store the B0 reference list. Each entry -+ * is an index in the DPB -+ * @b1_reflist: 16-bytes array used to store the B1 reference list. Each entry -+ * is an index in the DPB -+ * -+ * This functions builds the B0/B1 reference lists. This procedure is described -+ * in section '8.2.4 Decoding process for reference picture lists construction' -+ * of the H264 spec. This function can be used by H264 decoder drivers that -+ * need to pass B0/B1 reference lists to the hardware. -+ */ -+void -+v4l2_h264_build_b_ref_lists(const struct v4l2_h264_reflist_builder *builder, -+ u8 *b0_reflist, u8 *b1_reflist); -+ -+/** -+ * v4l2_h264_build_b_ref_lists() - Build the P reference list -+ * -+ * @builder: reference list builder context -+ * @p_reflist: 16-bytes array used to store the P reference list. Each entry -+ * is an index in the DPB -+ * -+ * This functions builds the P reference lists. This procedure is describe in -+ * section '8.2.4 Decoding process for reference picture lists construction' -+ * of the H264 spec. This function can be used by H264 decoder drivers that -+ * need to pass a P reference list to the hardware. -+ */ -+void -+v4l2_h264_build_p_ref_list(const struct v4l2_h264_reflist_builder *builder, -+ u8 *reflist); -+ -+#endif /* _MEDIA_V4L2_H264_H */ - -From c3231ffe9e7b695ae37bcc0ce9e686100d06a0e0 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Sat, 4 Apr 2020 00:13:42 +0200 -Subject: [PATCH] media: hantro: h264: Use the generic H264 reflist builder - -Now that the core provides generic reflist builders, we can use them -instead of implementing our own. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit b5218cf40c1e030fa402594c845113a989d6e942) ---- - drivers/staging/media/hantro/Kconfig | 1 + - drivers/staging/media/hantro/hantro_h264.c | 237 +---------------------------- - 2 files changed, 9 insertions(+), 229 deletions(-) - -diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig -index 99aed9a5b0b9..868fe2ad439e 100644 ---- a/drivers/staging/media/hantro/Kconfig -+++ b/drivers/staging/media/hantro/Kconfig -@@ -7,6 +7,7 @@ config VIDEO_HANTRO - select VIDEOBUF2_DMA_CONTIG - select VIDEOBUF2_VMALLOC - select V4L2_MEM2MEM_DEV -+ select V4L2_H264 - help - Support for the Hantro IP based Video Processing Units present on - Rockchip and NXP i.MX8M SoCs, which accelerate video and image -diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c -index f2d3e81fb6ce..d561f125085a 100644 ---- a/drivers/staging/media/hantro/hantro_h264.c -+++ b/drivers/staging/media/hantro/hantro_h264.c -@@ -11,7 +11,7 @@ - */ - - #include --#include -+#include - #include - - #include "hantro.h" -@@ -240,229 +240,6 @@ static void prepare_table(struct hantro_ctx *ctx) - reorder_scaling_list(ctx); - } - --struct hantro_h264_reflist_builder { -- const struct v4l2_h264_dpb_entry *dpb; -- s32 pocs[HANTRO_H264_DPB_SIZE]; -- u8 unordered_reflist[HANTRO_H264_DPB_SIZE]; -- int frame_nums[HANTRO_H264_DPB_SIZE]; -- s32 curpoc; -- u8 num_valid; --}; -- --static s32 get_poc(enum v4l2_field field, s32 top_field_order_cnt, -- s32 bottom_field_order_cnt) --{ -- switch (field) { -- case V4L2_FIELD_TOP: -- return top_field_order_cnt; -- case V4L2_FIELD_BOTTOM: -- return bottom_field_order_cnt; -- default: -- break; -- } -- -- return min(top_field_order_cnt, bottom_field_order_cnt); --} -- --static void --init_reflist_builder(struct hantro_ctx *ctx, -- struct hantro_h264_reflist_builder *b) --{ -- const struct v4l2_ctrl_h264_slice_params *slice_params; -- const struct v4l2_ctrl_h264_decode_params *dec_param; -- const struct v4l2_ctrl_h264_sps *sps; -- struct vb2_v4l2_buffer *buf = hantro_get_dst_buf(ctx); -- const struct v4l2_h264_dpb_entry *dpb = ctx->h264_dec.dpb; -- struct vb2_queue *cap_q = &ctx->fh.m2m_ctx->cap_q_ctx.q; -- int cur_frame_num, max_frame_num; -- unsigned int i; -- -- dec_param = ctx->h264_dec.ctrls.decode; -- slice_params = &ctx->h264_dec.ctrls.slices[0]; -- sps = ctx->h264_dec.ctrls.sps; -- max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); -- cur_frame_num = slice_params->frame_num; -- -- memset(b, 0, sizeof(*b)); -- b->dpb = dpb; -- b->curpoc = get_poc(buf->field, dec_param->top_field_order_cnt, -- dec_param->bottom_field_order_cnt); -- -- for (i = 0; i < ARRAY_SIZE(ctx->h264_dec.dpb); i++) { -- int buf_idx; -- -- if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) -- continue; -- -- buf_idx = vb2_find_timestamp(cap_q, dpb[i].reference_ts, 0); -- if (buf_idx < 0) -- continue; -- -- buf = to_vb2_v4l2_buffer(vb2_get_buffer(cap_q, buf_idx)); -- -- /* -- * Handle frame_num wraparound as described in section -- * '8.2.4.1 Decoding process for picture numbers' of the spec. -- * TODO: This logic will have to be adjusted when we start -- * supporting interlaced content. -- */ -- if (dpb[i].frame_num > cur_frame_num) -- b->frame_nums[i] = (int)dpb[i].frame_num - max_frame_num; -- else -- b->frame_nums[i] = dpb[i].frame_num; -- -- b->pocs[i] = get_poc(buf->field, dpb[i].top_field_order_cnt, -- dpb[i].bottom_field_order_cnt); -- b->unordered_reflist[b->num_valid] = i; -- b->num_valid++; -- } -- -- for (i = b->num_valid; i < ARRAY_SIZE(ctx->h264_dec.dpb); i++) -- b->unordered_reflist[i] = i; --} -- --static int p_ref_list_cmp(const void *ptra, const void *ptrb, const void *data) --{ -- const struct hantro_h264_reflist_builder *builder = data; -- const struct v4l2_h264_dpb_entry *a, *b; -- u8 idxa, idxb; -- -- idxa = *((u8 *)ptra); -- idxb = *((u8 *)ptrb); -- a = &builder->dpb[idxa]; -- b = &builder->dpb[idxb]; -- -- if ((a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) != -- (b->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) { -- /* Short term pics firt. */ -- if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) -- return -1; -- else -- return 1; -- } -- -- /* -- * Short term pics in descending pic num order, long term ones in -- * ascending order. -- */ -- if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) -- return HANTRO_CMP(builder->frame_nums[idxb], -- builder->frame_nums[idxa]); -- -- return HANTRO_CMP(a->pic_num, b->pic_num); --} -- --static int b0_ref_list_cmp(const void *ptra, const void *ptrb, const void *data) --{ -- const struct hantro_h264_reflist_builder *builder = data; -- const struct v4l2_h264_dpb_entry *a, *b; -- s32 poca, pocb; -- u8 idxa, idxb; -- -- idxa = *((u8 *)ptra); -- idxb = *((u8 *)ptrb); -- a = &builder->dpb[idxa]; -- b = &builder->dpb[idxb]; -- -- if ((a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) != -- (b->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) { -- /* Short term pics firt. */ -- if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) -- return -1; -- else -- return 1; -- } -- -- /* Long term pics in ascending pic num order. */ -- if (a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) -- return HANTRO_CMP(a->pic_num, b->pic_num); -- -- poca = builder->pocs[idxa]; -- pocb = builder->pocs[idxb]; -- -- /* -- * Short term pics with POC < cur POC first in POC descending order -- * followed by short term pics with POC > cur POC in POC ascending -- * order. -- */ -- if ((poca < builder->curpoc) != (pocb < builder->curpoc)) -- return HANTRO_CMP(poca, pocb); -- else if (poca < builder->curpoc) -- return HANTRO_CMP(pocb, poca); -- -- return HANTRO_CMP(poca, pocb); --} -- --static int b1_ref_list_cmp(const void *ptra, const void *ptrb, const void *data) --{ -- const struct hantro_h264_reflist_builder *builder = data; -- const struct v4l2_h264_dpb_entry *a, *b; -- s32 poca, pocb; -- u8 idxa, idxb; -- -- idxa = *((u8 *)ptra); -- idxb = *((u8 *)ptrb); -- a = &builder->dpb[idxa]; -- b = &builder->dpb[idxb]; -- -- if ((a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) != -- (b->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) { -- /* Short term pics firt. */ -- if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) -- return -1; -- else -- return 1; -- } -- -- /* Long term pics in ascending pic num order. */ -- if (a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) -- return HANTRO_CMP(a->pic_num, b->pic_num); -- -- poca = builder->pocs[idxa]; -- pocb = builder->pocs[idxb]; -- -- /* -- * Short term pics with POC > cur POC first in POC ascending order -- * followed by short term pics with POC < cur POC in POC descending -- * order. -- */ -- if ((poca < builder->curpoc) != (pocb < builder->curpoc)) -- return HANTRO_CMP(pocb, poca); -- else if (poca < builder->curpoc) -- return HANTRO_CMP(pocb, poca); -- -- return HANTRO_CMP(poca, pocb); --} -- --static void --build_p_ref_list(const struct hantro_h264_reflist_builder *builder, -- u8 *reflist) --{ -- memcpy(reflist, builder->unordered_reflist, -- sizeof(builder->unordered_reflist)); -- sort_r(reflist, builder->num_valid, sizeof(*reflist), -- p_ref_list_cmp, NULL, builder); --} -- --static void --build_b_ref_lists(const struct hantro_h264_reflist_builder *builder, -- u8 *b0_reflist, u8 *b1_reflist) --{ -- memcpy(b0_reflist, builder->unordered_reflist, -- sizeof(builder->unordered_reflist)); -- sort_r(b0_reflist, builder->num_valid, sizeof(*b0_reflist), -- b0_ref_list_cmp, NULL, builder); -- -- memcpy(b1_reflist, builder->unordered_reflist, -- sizeof(builder->unordered_reflist)); -- sort_r(b1_reflist, builder->num_valid, sizeof(*b1_reflist), -- b1_ref_list_cmp, NULL, builder); -- -- if (builder->num_valid > 1 && -- !memcmp(b1_reflist, b0_reflist, builder->num_valid)) -- swap(b1_reflist[0], b1_reflist[1]); --} -- - static bool dpb_entry_match(const struct v4l2_h264_dpb_entry *a, - const struct v4l2_h264_dpb_entry *b) - { -@@ -560,7 +337,7 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) - { - struct hantro_h264_dec_hw_ctx *h264_ctx = &ctx->h264_dec; - struct hantro_h264_dec_ctrls *ctrls = &h264_ctx->ctrls; -- struct hantro_h264_reflist_builder reflist_builder; -+ struct v4l2_h264_reflist_builder reflist_builder; - - hantro_start_prepare_run(ctx); - -@@ -596,10 +373,12 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) - prepare_table(ctx); - - /* Build the P/B{0,1} ref lists. */ -- init_reflist_builder(ctx, &reflist_builder); -- build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); -- build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, -- h264_ctx->reflists.b1); -+ v4l2_h264_init_reflist_builder(&reflist_builder, ctrls->decode, -+ &ctrls->slices[0], ctrls->sps, -+ ctx->h264_dec.dpb); -+ v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); -+ v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, -+ h264_ctx->reflists.b1); - return 0; - } - - -From b07a96a7a7c9018cf822c65f0bfbcab9be94798d Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Sat, 4 Apr 2020 00:13:44 +0200 -Subject: [PATCH] media: rkvdec: Add the rkvdec driver - -The rockchip vdec block is a stateless decoder that's able to decode -H264, HEVC and VP9 content. This commit adds the core infrastructure -and the H264 backend. Support for VP9 and HEVS will be added later on. - -[mchehab+huawei@kernel.org: select MEDIA_CONTROLLER and REQUEST_API] -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Tested-by: Nicolas Dufresne -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit cd33c830448baf7b1e94da72eca069e3e1d050c9) ---- - MAINTAINERS | 7 + - drivers/staging/media/Kconfig | 2 + - drivers/staging/media/Makefile | 1 + - drivers/staging/media/rkvdec/Kconfig | 16 + - drivers/staging/media/rkvdec/Makefile | 3 + - drivers/staging/media/rkvdec/TODO | 11 + - drivers/staging/media/rkvdec/rkvdec-h264.c | 1156 ++++++++++++++++++++++++++++ - drivers/staging/media/rkvdec/rkvdec-regs.h | 223 ++++++ - drivers/staging/media/rkvdec/rkvdec.c | 1103 ++++++++++++++++++++++++++ - drivers/staging/media/rkvdec/rkvdec.h | 121 +++ - 10 files changed, 2643 insertions(+) - create mode 100644 drivers/staging/media/rkvdec/Kconfig - create mode 100644 drivers/staging/media/rkvdec/Makefile - create mode 100644 drivers/staging/media/rkvdec/TODO - create mode 100644 drivers/staging/media/rkvdec/rkvdec-h264.c - create mode 100644 drivers/staging/media/rkvdec/rkvdec-regs.h - create mode 100644 drivers/staging/media/rkvdec/rkvdec.c - create mode 100644 drivers/staging/media/rkvdec/rkvdec.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index 50659d76976b..3c5892af3e17 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -14470,6 +14470,13 @@ F: Documentation/ABI/*/sysfs-driver-hid-roccat* - F: drivers/hid/hid-roccat* - F: include/linux/hid-roccat* - -+ROCKCHIP VIDEO DECODER DRIVER -+M: Ezequiel Garcia -+L: linux-media@vger.kernel.org -+S: Maintained -+F: drivers/staging/media/rkvdec/ -+F: Documentation/devicetree/bindings/media/rockchip,vdec.yaml -+ - ROCKCHIP ISP V1 DRIVER - M: Helen Koike - L: linux-media@vger.kernel.org -diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig -index e59a846bc909..c6b4fb5d48b4 100644 ---- a/drivers/staging/media/Kconfig -+++ b/drivers/staging/media/Kconfig -@@ -30,6 +30,8 @@ source "drivers/staging/media/meson/vdec/Kconfig" - - source "drivers/staging/media/omap4iss/Kconfig" - -+source "drivers/staging/media/rkvdec/Kconfig" -+ - source "drivers/staging/media/sunxi/Kconfig" - - source "drivers/staging/media/tegra-vde/Kconfig" -diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile -index 23c682461b62..8b24be1a7076 100644 ---- a/drivers/staging/media/Makefile -+++ b/drivers/staging/media/Makefile -@@ -3,6 +3,7 @@ obj-$(CONFIG_VIDEO_ALLEGRO_DVT) += allegro-dvt/ - obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ - obj-$(CONFIG_VIDEO_MESON_VDEC) += meson/vdec/ - obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ -+obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rkvdec/ - obj-$(CONFIG_VIDEO_SUNXI) += sunxi/ - obj-$(CONFIG_TEGRA_VDE) += tegra-vde/ - obj-$(CONFIG_VIDEO_HANTRO) += hantro/ -diff --git a/drivers/staging/media/rkvdec/Kconfig b/drivers/staging/media/rkvdec/Kconfig -new file mode 100644 -index 000000000000..c02199b5e0fd ---- /dev/null -+++ b/drivers/staging/media/rkvdec/Kconfig -@@ -0,0 +1,16 @@ -+# SPDX-License-Identifier: GPL-2.0 -+config VIDEO_ROCKCHIP_VDEC -+ tristate "Rockchip Video Decoder driver" -+ depends on ARCH_ROCKCHIP || COMPILE_TEST -+ depends on VIDEO_DEV && VIDEO_V4L2 -+ select MEDIA_CONTROLLER -+ select MEDIA_CONTROLLER_REQUEST_API -+ select VIDEOBUF2_DMA_CONTIG -+ select VIDEOBUF2_VMALLOC -+ select V4L2_MEM2MEM_DEV -+ select V4L2_H264 -+ help -+ Support for the Rockchip Video Decoder IP present on Rockchip SoCs, -+ which accelerates video decoding. -+ To compile this driver as a module, choose M here: the module -+ will be called rockchip-vdec. -diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile -new file mode 100644 -index 000000000000..c08fed0a39f9 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/Makefile -@@ -0,0 +1,3 @@ -+obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o -+ -+rockchip-vdec-y += rkvdec.o rkvdec-h264.o -diff --git a/drivers/staging/media/rkvdec/TODO b/drivers/staging/media/rkvdec/TODO -new file mode 100644 -index 000000000000..e0f0f12f0ac5 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/TODO -@@ -0,0 +1,11 @@ -+* Support for VP9 is planned for this driver. -+ -+ Given the V4L controls for those CODECs will be part of -+ the uABI, it will be required to have the driver in staging. -+ -+ For this reason, we are keeping this driver in staging for now. -+ -+* Evaluate introducing a helper to consolidate duplicated -+ code in rkvdec_request_validate and cedrus_request_validate. -+ The helper needs to the driver private data associated with -+ the videobuf2 queue, from a media request. -diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -new file mode 100644 -index 000000000000..cd4980d06be7 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c -@@ -0,0 +1,1156 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip Video Decoder H264 backend -+ * -+ * Copyright (C) 2019 Collabora, Ltd. -+ * Boris Brezillon -+ * -+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd. -+ * Jeffy Chen -+ */ -+ -+#include -+#include -+ -+#include "rkvdec.h" -+#include "rkvdec-regs.h" -+ -+/* Size with u32 units. */ -+#define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128) -+#define RKV_RPS_SIZE ((128 + 128) / 4) -+#define RKV_SCALING_LIST_SIZE (6 * 16 + 6 * 64 + 128) -+#define RKV_ERROR_INFO_SIZE (256 * 144 * 4) -+ -+#define RKVDEC_NUM_REFLIST 3 -+ -+struct rkvdec_sps_pps_packet { -+ u32 info[8]; -+}; -+ -+struct rkvdec_ps_field { -+ u16 offset; -+ u8 len; -+}; -+ -+#define PS_FIELD(_offset, _len) \ -+ ((struct rkvdec_ps_field){ _offset, _len }) -+ -+#define SEQ_PARAMETER_SET_ID PS_FIELD(0, 4) -+#define PROFILE_IDC PS_FIELD(4, 8) -+#define CONSTRAINT_SET3_FLAG PS_FIELD(12, 1) -+#define CHROMA_FORMAT_IDC PS_FIELD(13, 2) -+#define BIT_DEPTH_LUMA PS_FIELD(15, 3) -+#define BIT_DEPTH_CHROMA PS_FIELD(18, 3) -+#define QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG PS_FIELD(21, 1) -+#define LOG2_MAX_FRAME_NUM_MINUS4 PS_FIELD(22, 4) -+#define MAX_NUM_REF_FRAMES PS_FIELD(26, 5) -+#define PIC_ORDER_CNT_TYPE PS_FIELD(31, 2) -+#define LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4 PS_FIELD(33, 4) -+#define DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG PS_FIELD(37, 1) -+#define PIC_WIDTH_IN_MBS PS_FIELD(38, 9) -+#define PIC_HEIGHT_IN_MBS PS_FIELD(47, 9) -+#define FRAME_MBS_ONLY_FLAG PS_FIELD(56, 1) -+#define MB_ADAPTIVE_FRAME_FIELD_FLAG PS_FIELD(57, 1) -+#define DIRECT_8X8_INFERENCE_FLAG PS_FIELD(58, 1) -+#define MVC_EXTENSION_ENABLE PS_FIELD(59, 1) -+#define NUM_VIEWS PS_FIELD(60, 2) -+#define VIEW_ID(i) PS_FIELD(62 + ((i) * 10), 10) -+#define NUM_ANCHOR_REFS_L(i) PS_FIELD(82 + ((i) * 11), 1) -+#define ANCHOR_REF_L(i) PS_FIELD(83 + ((i) * 11), 10) -+#define NUM_NON_ANCHOR_REFS_L(i) PS_FIELD(104 + ((i) * 11), 1) -+#define NON_ANCHOR_REFS_L(i) PS_FIELD(105 + ((i) * 11), 10) -+#define PIC_PARAMETER_SET_ID PS_FIELD(128, 8) -+#define PPS_SEQ_PARAMETER_SET_ID PS_FIELD(136, 5) -+#define ENTROPY_CODING_MODE_FLAG PS_FIELD(141, 1) -+#define BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT_FLAG PS_FIELD(142, 1) -+#define NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(i) PS_FIELD(143 + ((i) * 5), 5) -+#define WEIGHTED_PRED_FLAG PS_FIELD(153, 1) -+#define WEIGHTED_BIPRED_IDC PS_FIELD(154, 2) -+#define PIC_INIT_QP_MINUS26 PS_FIELD(156, 7) -+#define PIC_INIT_QS_MINUS26 PS_FIELD(163, 6) -+#define CHROMA_QP_INDEX_OFFSET PS_FIELD(169, 5) -+#define DEBLOCKING_FILTER_CONTROL_PRESENT_FLAG PS_FIELD(174, 1) -+#define CONSTRAINED_INTRA_PRED_FLAG PS_FIELD(175, 1) -+#define REDUNDANT_PIC_CNT_PRESENT PS_FIELD(176, 1) -+#define TRANSFORM_8X8_MODE_FLAG PS_FIELD(177, 1) -+#define SECOND_CHROMA_QP_INDEX_OFFSET PS_FIELD(178, 5) -+#define SCALING_LIST_ENABLE_FLAG PS_FIELD(183, 1) -+#define SCALING_LIST_ADDRESS PS_FIELD(184, 32) -+#define IS_LONG_TERM(i) PS_FIELD(216 + (i), 1) -+ -+#define DPB_OFFS(i, j) (288 + ((j) * 32 * 7) + ((i) * 7)) -+#define DPB_INFO(i, j) PS_FIELD(DPB_OFFS(i, j), 5) -+#define BOTTOM_FLAG(i, j) PS_FIELD(DPB_OFFS(i, j) + 5, 1) -+#define VIEW_INDEX_OFF(i, j) PS_FIELD(DPB_OFFS(i, j) + 6, 1) -+ -+/* Data structure describing auxiliary buffer format. */ -+struct rkvdec_h264_priv_tbl { -+ s8 cabac_table[4][464][2]; -+ u8 scaling_list[RKV_SCALING_LIST_SIZE]; -+ u32 rps[RKV_RPS_SIZE]; -+ struct rkvdec_sps_pps_packet param_set[256]; -+ u8 err_info[RKV_ERROR_INFO_SIZE]; -+}; -+ -+#define RKVDEC_H264_DPB_SIZE 16 -+ -+struct rkvdec_h264_reflists { -+ u8 p[RKVDEC_H264_DPB_SIZE]; -+ u8 b0[RKVDEC_H264_DPB_SIZE]; -+ u8 b1[RKVDEC_H264_DPB_SIZE]; -+ u8 num_valid; -+}; -+ -+struct rkvdec_h264_run { -+ struct rkvdec_run base; -+ const struct v4l2_ctrl_h264_decode_params *decode_params; -+ const struct v4l2_ctrl_h264_slice_params *slices_params; -+ const struct v4l2_ctrl_h264_sps *sps; -+ const struct v4l2_ctrl_h264_pps *pps; -+ const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix; -+}; -+ -+struct rkvdec_h264_ctx { -+ struct rkvdec_aux_buf priv_tbl; -+ struct rkvdec_h264_reflists reflists; -+}; -+ -+#define CABAC_ENTRY(ctxidx, idc0_m, idc0_n, idc1_m, idc1_n, \ -+ idc2_m, idc2_n, intra_m, intra_n) \ -+ [0][(ctxidx)] = {idc0_m, idc0_n}, \ -+ [1][(ctxidx)] = {idc1_m, idc1_n}, \ -+ [2][(ctxidx)] = {idc2_m, idc2_n}, \ -+ [3][(ctxidx)] = {intra_m, intra_n} -+ -+/* -+ * Constant CABAC table. -+ * Built from the tables described in section '9.3.1.1 Initialisation process -+ * for context variables' of the H264 spec. -+ */ -+static const s8 rkvdec_h264_cabac_table[4][464][2] = { -+ /* Table 9-12 – Values of variables m and n for ctxIdx from 0 to 10 */ -+ CABAC_ENTRY(0, 20, -15, 20, -15, 20, -15, 20, -15), -+ CABAC_ENTRY(1, 2, 54, 2, 54, 2, 54, 2, 54), -+ CABAC_ENTRY(2, 3, 74, 3, 74, 3, 74, 3, 74), -+ CABAC_ENTRY(3, 20, -15, 20, -15, 20, -15, 20, -15), -+ CABAC_ENTRY(4, 2, 54, 2, 54, 2, 54, 2, 54), -+ CABAC_ENTRY(5, 3, 74, 3, 74, 3, 74, 3, 74), -+ CABAC_ENTRY(6, -28, 127, -28, 127, -28, 127, -28, 127), -+ CABAC_ENTRY(7, -23, 104, -23, 104, -23, 104, -23, 104), -+ CABAC_ENTRY(8, -6, 53, -6, 53, -6, 53, -6, 53), -+ CABAC_ENTRY(9, -1, 54, -1, 54, -1, 54, -1, 54), -+ CABAC_ENTRY(10, 7, 51, 7, 51, 7, 51, 7, 51), -+ -+ /* Table 9-13 – Values of variables m and n for ctxIdx from 11 to 23 */ -+ CABAC_ENTRY(11, 23, 33, 22, 25, 29, 16, 0, 0), -+ CABAC_ENTRY(12, 23, 2, 34, 0, 25, 0, 0, 0), -+ CABAC_ENTRY(13, 21, 0, 16, 0, 14, 0, 0, 0), -+ CABAC_ENTRY(14, 1, 9, -2, 9, -10, 51, 0, 0), -+ CABAC_ENTRY(15, 0, 49, 4, 41, -3, 62, 0, 0), -+ CABAC_ENTRY(16, -37, 118, -29, 118, -27, 99, 0, 0), -+ CABAC_ENTRY(17, 5, 57, 2, 65, 26, 16, 0, 0), -+ CABAC_ENTRY(18, -13, 78, -6, 71, -4, 85, 0, 0), -+ CABAC_ENTRY(19, -11, 65, -13, 79, -24, 102, 0, 0), -+ CABAC_ENTRY(20, 1, 62, 5, 52, 5, 57, 0, 0), -+ CABAC_ENTRY(21, 12, 49, 9, 50, 6, 57, 0, 0), -+ CABAC_ENTRY(22, -4, 73, -3, 70, -17, 73, 0, 0), -+ CABAC_ENTRY(23, 17, 50, 10, 54, 14, 57, 0, 0), -+ -+ /* Table 9-14 – Values of variables m and n for ctxIdx from 24 to 39 */ -+ CABAC_ENTRY(24, 18, 64, 26, 34, 20, 40, 0, 0), -+ CABAC_ENTRY(25, 9, 43, 19, 22, 20, 10, 0, 0), -+ CABAC_ENTRY(26, 29, 0, 40, 0, 29, 0, 0, 0), -+ CABAC_ENTRY(27, 26, 67, 57, 2, 54, 0, 0, 0), -+ CABAC_ENTRY(28, 16, 90, 41, 36, 37, 42, 0, 0), -+ CABAC_ENTRY(29, 9, 104, 26, 69, 12, 97, 0, 0), -+ CABAC_ENTRY(30, -46, 127, -45, 127, -32, 127, 0, 0), -+ CABAC_ENTRY(31, -20, 104, -15, 101, -22, 117, 0, 0), -+ CABAC_ENTRY(32, 1, 67, -4, 76, -2, 74, 0, 0), -+ CABAC_ENTRY(33, -13, 78, -6, 71, -4, 85, 0, 0), -+ CABAC_ENTRY(34, -11, 65, -13, 79, -24, 102, 0, 0), -+ CABAC_ENTRY(35, 1, 62, 5, 52, 5, 57, 0, 0), -+ CABAC_ENTRY(36, -6, 86, 6, 69, -6, 93, 0, 0), -+ CABAC_ENTRY(37, -17, 95, -13, 90, -14, 88, 0, 0), -+ CABAC_ENTRY(38, -6, 61, 0, 52, -6, 44, 0, 0), -+ CABAC_ENTRY(39, 9, 45, 8, 43, 4, 55, 0, 0), -+ -+ /* Table 9-15 – Values of variables m and n for ctxIdx from 40 to 53 */ -+ CABAC_ENTRY(40, -3, 69, -2, 69, -11, 89, 0, 0), -+ CABAC_ENTRY(41, -6, 81, -5, 82, -15, 103, 0, 0), -+ CABAC_ENTRY(42, -11, 96, -10, 96, -21, 116, 0, 0), -+ CABAC_ENTRY(43, 6, 55, 2, 59, 19, 57, 0, 0), -+ CABAC_ENTRY(44, 7, 67, 2, 75, 20, 58, 0, 0), -+ CABAC_ENTRY(45, -5, 86, -3, 87, 4, 84, 0, 0), -+ CABAC_ENTRY(46, 2, 88, -3, 100, 6, 96, 0, 0), -+ CABAC_ENTRY(47, 0, 58, 1, 56, 1, 63, 0, 0), -+ CABAC_ENTRY(48, -3, 76, -3, 74, -5, 85, 0, 0), -+ CABAC_ENTRY(49, -10, 94, -6, 85, -13, 106, 0, 0), -+ CABAC_ENTRY(50, 5, 54, 0, 59, 5, 63, 0, 0), -+ CABAC_ENTRY(51, 4, 69, -3, 81, 6, 75, 0, 0), -+ CABAC_ENTRY(52, -3, 81, -7, 86, -3, 90, 0, 0), -+ CABAC_ENTRY(53, 0, 88, -5, 95, -1, 101, 0, 0), -+ -+ /* Table 9-16 – Values of variables m and n for ctxIdx from 54 to 59 */ -+ CABAC_ENTRY(54, -7, 67, -1, 66, 3, 55, 0, 0), -+ CABAC_ENTRY(55, -5, 74, -1, 77, -4, 79, 0, 0), -+ CABAC_ENTRY(56, -4, 74, 1, 70, -2, 75, 0, 0), -+ CABAC_ENTRY(57, -5, 80, -2, 86, -12, 97, 0, 0), -+ CABAC_ENTRY(58, -7, 72, -5, 72, -7, 50, 0, 0), -+ CABAC_ENTRY(59, 1, 58, 0, 61, 1, 60, 0, 0), -+ -+ /* Table 9-17 – Values of variables m and n for ctxIdx from 60 to 69 */ -+ CABAC_ENTRY(60, 0, 41, 0, 41, 0, 41, 0, 41), -+ CABAC_ENTRY(61, 0, 63, 0, 63, 0, 63, 0, 63), -+ CABAC_ENTRY(62, 0, 63, 0, 63, 0, 63, 0, 63), -+ CABAC_ENTRY(63, 0, 63, 0, 63, 0, 63, 0, 63), -+ CABAC_ENTRY(64, -9, 83, -9, 83, -9, 83, -9, 83), -+ CABAC_ENTRY(65, 4, 86, 4, 86, 4, 86, 4, 86), -+ CABAC_ENTRY(66, 0, 97, 0, 97, 0, 97, 0, 97), -+ CABAC_ENTRY(67, -7, 72, -7, 72, -7, 72, -7, 72), -+ CABAC_ENTRY(68, 13, 41, 13, 41, 13, 41, 13, 41), -+ CABAC_ENTRY(69, 3, 62, 3, 62, 3, 62, 3, 62), -+ -+ /* Table 9-18 – Values of variables m and n for ctxIdx from 70 to 104 */ -+ CABAC_ENTRY(70, 0, 45, 13, 15, 7, 34, 0, 11), -+ CABAC_ENTRY(71, -4, 78, 7, 51, -9, 88, 1, 55), -+ CABAC_ENTRY(72, -3, 96, 2, 80, -20, 127, 0, 69), -+ CABAC_ENTRY(73, -27, 126, -39, 127, -36, 127, -17, 127), -+ CABAC_ENTRY(74, -28, 98, -18, 91, -17, 91, -13, 102), -+ CABAC_ENTRY(75, -25, 101, -17, 96, -14, 95, 0, 82), -+ CABAC_ENTRY(76, -23, 67, -26, 81, -25, 84, -7, 74), -+ CABAC_ENTRY(77, -28, 82, -35, 98, -25, 86, -21, 107), -+ CABAC_ENTRY(78, -20, 94, -24, 102, -12, 89, -27, 127), -+ CABAC_ENTRY(79, -16, 83, -23, 97, -17, 91, -31, 127), -+ CABAC_ENTRY(80, -22, 110, -27, 119, -31, 127, -24, 127), -+ CABAC_ENTRY(81, -21, 91, -24, 99, -14, 76, -18, 95), -+ CABAC_ENTRY(82, -18, 102, -21, 110, -18, 103, -27, 127), -+ CABAC_ENTRY(83, -13, 93, -18, 102, -13, 90, -21, 114), -+ CABAC_ENTRY(84, -29, 127, -36, 127, -37, 127, -30, 127), -+ CABAC_ENTRY(85, -7, 92, 0, 80, 11, 80, -17, 123), -+ CABAC_ENTRY(86, -5, 89, -5, 89, 5, 76, -12, 115), -+ CABAC_ENTRY(87, -7, 96, -7, 94, 2, 84, -16, 122), -+ CABAC_ENTRY(88, -13, 108, -4, 92, 5, 78, -11, 115), -+ CABAC_ENTRY(89, -3, 46, 0, 39, -6, 55, -12, 63), -+ CABAC_ENTRY(90, -1, 65, 0, 65, 4, 61, -2, 68), -+ CABAC_ENTRY(91, -1, 57, -15, 84, -14, 83, -15, 84), -+ CABAC_ENTRY(92, -9, 93, -35, 127, -37, 127, -13, 104), -+ CABAC_ENTRY(93, -3, 74, -2, 73, -5, 79, -3, 70), -+ CABAC_ENTRY(94, -9, 92, -12, 104, -11, 104, -8, 93), -+ CABAC_ENTRY(95, -8, 87, -9, 91, -11, 91, -10, 90), -+ CABAC_ENTRY(96, -23, 126, -31, 127, -30, 127, -30, 127), -+ CABAC_ENTRY(97, 5, 54, 3, 55, 0, 65, -1, 74), -+ CABAC_ENTRY(98, 6, 60, 7, 56, -2, 79, -6, 97), -+ CABAC_ENTRY(99, 6, 59, 7, 55, 0, 72, -7, 91), -+ CABAC_ENTRY(100, 6, 69, 8, 61, -4, 92, -20, 127), -+ CABAC_ENTRY(101, -1, 48, -3, 53, -6, 56, -4, 56), -+ CABAC_ENTRY(102, 0, 68, 0, 68, 3, 68, -5, 82), -+ CABAC_ENTRY(103, -4, 69, -7, 74, -8, 71, -7, 76), -+ CABAC_ENTRY(104, -8, 88, -9, 88, -13, 98, -22, 125), -+ -+ /* Table 9-19 – Values of variables m and n for ctxIdx from 105 to 165 */ -+ CABAC_ENTRY(105, -2, 85, -13, 103, -4, 86, -7, 93), -+ CABAC_ENTRY(106, -6, 78, -13, 91, -12, 88, -11, 87), -+ CABAC_ENTRY(107, -1, 75, -9, 89, -5, 82, -3, 77), -+ CABAC_ENTRY(108, -7, 77, -14, 92, -3, 72, -5, 71), -+ CABAC_ENTRY(109, 2, 54, -8, 76, -4, 67, -4, 63), -+ CABAC_ENTRY(110, 5, 50, -12, 87, -8, 72, -4, 68), -+ CABAC_ENTRY(111, -3, 68, -23, 110, -16, 89, -12, 84), -+ CABAC_ENTRY(112, 1, 50, -24, 105, -9, 69, -7, 62), -+ CABAC_ENTRY(113, 6, 42, -10, 78, -1, 59, -7, 65), -+ CABAC_ENTRY(114, -4, 81, -20, 112, 5, 66, 8, 61), -+ CABAC_ENTRY(115, 1, 63, -17, 99, 4, 57, 5, 56), -+ CABAC_ENTRY(116, -4, 70, -78, 127, -4, 71, -2, 66), -+ CABAC_ENTRY(117, 0, 67, -70, 127, -2, 71, 1, 64), -+ CABAC_ENTRY(118, 2, 57, -50, 127, 2, 58, 0, 61), -+ CABAC_ENTRY(119, -2, 76, -46, 127, -1, 74, -2, 78), -+ CABAC_ENTRY(120, 11, 35, -4, 66, -4, 44, 1, 50), -+ CABAC_ENTRY(121, 4, 64, -5, 78, -1, 69, 7, 52), -+ CABAC_ENTRY(122, 1, 61, -4, 71, 0, 62, 10, 35), -+ CABAC_ENTRY(123, 11, 35, -8, 72, -7, 51, 0, 44), -+ CABAC_ENTRY(124, 18, 25, 2, 59, -4, 47, 11, 38), -+ CABAC_ENTRY(125, 12, 24, -1, 55, -6, 42, 1, 45), -+ CABAC_ENTRY(126, 13, 29, -7, 70, -3, 41, 0, 46), -+ CABAC_ENTRY(127, 13, 36, -6, 75, -6, 53, 5, 44), -+ CABAC_ENTRY(128, -10, 93, -8, 89, 8, 76, 31, 17), -+ CABAC_ENTRY(129, -7, 73, -34, 119, -9, 78, 1, 51), -+ CABAC_ENTRY(130, -2, 73, -3, 75, -11, 83, 7, 50), -+ CABAC_ENTRY(131, 13, 46, 32, 20, 9, 52, 28, 19), -+ CABAC_ENTRY(132, 9, 49, 30, 22, 0, 67, 16, 33), -+ CABAC_ENTRY(133, -7, 100, -44, 127, -5, 90, 14, 62), -+ CABAC_ENTRY(134, 9, 53, 0, 54, 1, 67, -13, 108), -+ CABAC_ENTRY(135, 2, 53, -5, 61, -15, 72, -15, 100), -+ CABAC_ENTRY(136, 5, 53, 0, 58, -5, 75, -13, 101), -+ CABAC_ENTRY(137, -2, 61, -1, 60, -8, 80, -13, 91), -+ CABAC_ENTRY(138, 0, 56, -3, 61, -21, 83, -12, 94), -+ CABAC_ENTRY(139, 0, 56, -8, 67, -21, 64, -10, 88), -+ CABAC_ENTRY(140, -13, 63, -25, 84, -13, 31, -16, 84), -+ CABAC_ENTRY(141, -5, 60, -14, 74, -25, 64, -10, 86), -+ CABAC_ENTRY(142, -1, 62, -5, 65, -29, 94, -7, 83), -+ CABAC_ENTRY(143, 4, 57, 5, 52, 9, 75, -13, 87), -+ CABAC_ENTRY(144, -6, 69, 2, 57, 17, 63, -19, 94), -+ CABAC_ENTRY(145, 4, 57, 0, 61, -8, 74, 1, 70), -+ CABAC_ENTRY(146, 14, 39, -9, 69, -5, 35, 0, 72), -+ CABAC_ENTRY(147, 4, 51, -11, 70, -2, 27, -5, 74), -+ CABAC_ENTRY(148, 13, 68, 18, 55, 13, 91, 18, 59), -+ CABAC_ENTRY(149, 3, 64, -4, 71, 3, 65, -8, 102), -+ CABAC_ENTRY(150, 1, 61, 0, 58, -7, 69, -15, 100), -+ CABAC_ENTRY(151, 9, 63, 7, 61, 8, 77, 0, 95), -+ CABAC_ENTRY(152, 7, 50, 9, 41, -10, 66, -4, 75), -+ CABAC_ENTRY(153, 16, 39, 18, 25, 3, 62, 2, 72), -+ CABAC_ENTRY(154, 5, 44, 9, 32, -3, 68, -11, 75), -+ CABAC_ENTRY(155, 4, 52, 5, 43, -20, 81, -3, 71), -+ CABAC_ENTRY(156, 11, 48, 9, 47, 0, 30, 15, 46), -+ CABAC_ENTRY(157, -5, 60, 0, 44, 1, 7, -13, 69), -+ CABAC_ENTRY(158, -1, 59, 0, 51, -3, 23, 0, 62), -+ CABAC_ENTRY(159, 0, 59, 2, 46, -21, 74, 0, 65), -+ CABAC_ENTRY(160, 22, 33, 19, 38, 16, 66, 21, 37), -+ CABAC_ENTRY(161, 5, 44, -4, 66, -23, 124, -15, 72), -+ CABAC_ENTRY(162, 14, 43, 15, 38, 17, 37, 9, 57), -+ CABAC_ENTRY(163, -1, 78, 12, 42, 44, -18, 16, 54), -+ CABAC_ENTRY(164, 0, 60, 9, 34, 50, -34, 0, 62), -+ CABAC_ENTRY(165, 9, 69, 0, 89, -22, 127, 12, 72), -+ -+ /* Table 9-20 – Values of variables m and n for ctxIdx from 166 to 226 */ -+ CABAC_ENTRY(166, 11, 28, 4, 45, 4, 39, 24, 0), -+ CABAC_ENTRY(167, 2, 40, 10, 28, 0, 42, 15, 9), -+ CABAC_ENTRY(168, 3, 44, 10, 31, 7, 34, 8, 25), -+ CABAC_ENTRY(169, 0, 49, 33, -11, 11, 29, 13, 18), -+ CABAC_ENTRY(170, 0, 46, 52, -43, 8, 31, 15, 9), -+ CABAC_ENTRY(171, 2, 44, 18, 15, 6, 37, 13, 19), -+ CABAC_ENTRY(172, 2, 51, 28, 0, 7, 42, 10, 37), -+ CABAC_ENTRY(173, 0, 47, 35, -22, 3, 40, 12, 18), -+ CABAC_ENTRY(174, 4, 39, 38, -25, 8, 33, 6, 29), -+ CABAC_ENTRY(175, 2, 62, 34, 0, 13, 43, 20, 33), -+ CABAC_ENTRY(176, 6, 46, 39, -18, 13, 36, 15, 30), -+ CABAC_ENTRY(177, 0, 54, 32, -12, 4, 47, 4, 45), -+ CABAC_ENTRY(178, 3, 54, 102, -94, 3, 55, 1, 58), -+ CABAC_ENTRY(179, 2, 58, 0, 0, 2, 58, 0, 62), -+ CABAC_ENTRY(180, 4, 63, 56, -15, 6, 60, 7, 61), -+ CABAC_ENTRY(181, 6, 51, 33, -4, 8, 44, 12, 38), -+ CABAC_ENTRY(182, 6, 57, 29, 10, 11, 44, 11, 45), -+ CABAC_ENTRY(183, 7, 53, 37, -5, 14, 42, 15, 39), -+ CABAC_ENTRY(184, 6, 52, 51, -29, 7, 48, 11, 42), -+ CABAC_ENTRY(185, 6, 55, 39, -9, 4, 56, 13, 44), -+ CABAC_ENTRY(186, 11, 45, 52, -34, 4, 52, 16, 45), -+ CABAC_ENTRY(187, 14, 36, 69, -58, 13, 37, 12, 41), -+ CABAC_ENTRY(188, 8, 53, 67, -63, 9, 49, 10, 49), -+ CABAC_ENTRY(189, -1, 82, 44, -5, 19, 58, 30, 34), -+ CABAC_ENTRY(190, 7, 55, 32, 7, 10, 48, 18, 42), -+ CABAC_ENTRY(191, -3, 78, 55, -29, 12, 45, 10, 55), -+ CABAC_ENTRY(192, 15, 46, 32, 1, 0, 69, 17, 51), -+ CABAC_ENTRY(193, 22, 31, 0, 0, 20, 33, 17, 46), -+ CABAC_ENTRY(194, -1, 84, 27, 36, 8, 63, 0, 89), -+ CABAC_ENTRY(195, 25, 7, 33, -25, 35, -18, 26, -19), -+ CABAC_ENTRY(196, 30, -7, 34, -30, 33, -25, 22, -17), -+ CABAC_ENTRY(197, 28, 3, 36, -28, 28, -3, 26, -17), -+ CABAC_ENTRY(198, 28, 4, 38, -28, 24, 10, 30, -25), -+ CABAC_ENTRY(199, 32, 0, 38, -27, 27, 0, 28, -20), -+ CABAC_ENTRY(200, 34, -1, 34, -18, 34, -14, 33, -23), -+ CABAC_ENTRY(201, 30, 6, 35, -16, 52, -44, 37, -27), -+ CABAC_ENTRY(202, 30, 6, 34, -14, 39, -24, 33, -23), -+ CABAC_ENTRY(203, 32, 9, 32, -8, 19, 17, 40, -28), -+ CABAC_ENTRY(204, 31, 19, 37, -6, 31, 25, 38, -17), -+ CABAC_ENTRY(205, 26, 27, 35, 0, 36, 29, 33, -11), -+ CABAC_ENTRY(206, 26, 30, 30, 10, 24, 33, 40, -15), -+ CABAC_ENTRY(207, 37, 20, 28, 18, 34, 15, 41, -6), -+ CABAC_ENTRY(208, 28, 34, 26, 25, 30, 20, 38, 1), -+ CABAC_ENTRY(209, 17, 70, 29, 41, 22, 73, 41, 17), -+ CABAC_ENTRY(210, 1, 67, 0, 75, 20, 34, 30, -6), -+ CABAC_ENTRY(211, 5, 59, 2, 72, 19, 31, 27, 3), -+ CABAC_ENTRY(212, 9, 67, 8, 77, 27, 44, 26, 22), -+ CABAC_ENTRY(213, 16, 30, 14, 35, 19, 16, 37, -16), -+ CABAC_ENTRY(214, 18, 32, 18, 31, 15, 36, 35, -4), -+ CABAC_ENTRY(215, 18, 35, 17, 35, 15, 36, 38, -8), -+ CABAC_ENTRY(216, 22, 29, 21, 30, 21, 28, 38, -3), -+ CABAC_ENTRY(217, 24, 31, 17, 45, 25, 21, 37, 3), -+ CABAC_ENTRY(218, 23, 38, 20, 42, 30, 20, 38, 5), -+ CABAC_ENTRY(219, 18, 43, 18, 45, 31, 12, 42, 0), -+ CABAC_ENTRY(220, 20, 41, 27, 26, 27, 16, 35, 16), -+ CABAC_ENTRY(221, 11, 63, 16, 54, 24, 42, 39, 22), -+ CABAC_ENTRY(222, 9, 59, 7, 66, 0, 93, 14, 48), -+ CABAC_ENTRY(223, 9, 64, 16, 56, 14, 56, 27, 37), -+ CABAC_ENTRY(224, -1, 94, 11, 73, 15, 57, 21, 60), -+ CABAC_ENTRY(225, -2, 89, 10, 67, 26, 38, 12, 68), -+ CABAC_ENTRY(226, -9, 108, -10, 116, -24, 127, 2, 97), -+ -+ /* Table 9-21 – Values of variables m and n for ctxIdx from 227 to 275 */ -+ CABAC_ENTRY(227, -6, 76, -23, 112, -24, 115, -3, 71), -+ CABAC_ENTRY(228, -2, 44, -15, 71, -22, 82, -6, 42), -+ CABAC_ENTRY(229, 0, 45, -7, 61, -9, 62, -5, 50), -+ CABAC_ENTRY(230, 0, 52, 0, 53, 0, 53, -3, 54), -+ CABAC_ENTRY(231, -3, 64, -5, 66, 0, 59, -2, 62), -+ CABAC_ENTRY(232, -2, 59, -11, 77, -14, 85, 0, 58), -+ CABAC_ENTRY(233, -4, 70, -9, 80, -13, 89, 1, 63), -+ CABAC_ENTRY(234, -4, 75, -9, 84, -13, 94, -2, 72), -+ CABAC_ENTRY(235, -8, 82, -10, 87, -11, 92, -1, 74), -+ CABAC_ENTRY(236, -17, 102, -34, 127, -29, 127, -9, 91), -+ CABAC_ENTRY(237, -9, 77, -21, 101, -21, 100, -5, 67), -+ CABAC_ENTRY(238, 3, 24, -3, 39, -14, 57, -5, 27), -+ CABAC_ENTRY(239, 0, 42, -5, 53, -12, 67, -3, 39), -+ CABAC_ENTRY(240, 0, 48, -7, 61, -11, 71, -2, 44), -+ CABAC_ENTRY(241, 0, 55, -11, 75, -10, 77, 0, 46), -+ CABAC_ENTRY(242, -6, 59, -15, 77, -21, 85, -16, 64), -+ CABAC_ENTRY(243, -7, 71, -17, 91, -16, 88, -8, 68), -+ CABAC_ENTRY(244, -12, 83, -25, 107, -23, 104, -10, 78), -+ CABAC_ENTRY(245, -11, 87, -25, 111, -15, 98, -6, 77), -+ CABAC_ENTRY(246, -30, 119, -28, 122, -37, 127, -10, 86), -+ CABAC_ENTRY(247, 1, 58, -11, 76, -10, 82, -12, 92), -+ CABAC_ENTRY(248, -3, 29, -10, 44, -8, 48, -15, 55), -+ CABAC_ENTRY(249, -1, 36, -10, 52, -8, 61, -10, 60), -+ CABAC_ENTRY(250, 1, 38, -10, 57, -8, 66, -6, 62), -+ CABAC_ENTRY(251, 2, 43, -9, 58, -7, 70, -4, 65), -+ CABAC_ENTRY(252, -6, 55, -16, 72, -14, 75, -12, 73), -+ CABAC_ENTRY(253, 0, 58, -7, 69, -10, 79, -8, 76), -+ CABAC_ENTRY(254, 0, 64, -4, 69, -9, 83, -7, 80), -+ CABAC_ENTRY(255, -3, 74, -5, 74, -12, 92, -9, 88), -+ CABAC_ENTRY(256, -10, 90, -9, 86, -18, 108, -17, 110), -+ CABAC_ENTRY(257, 0, 70, 2, 66, -4, 79, -11, 97), -+ CABAC_ENTRY(258, -4, 29, -9, 34, -22, 69, -20, 84), -+ CABAC_ENTRY(259, 5, 31, 1, 32, -16, 75, -11, 79), -+ CABAC_ENTRY(260, 7, 42, 11, 31, -2, 58, -6, 73), -+ CABAC_ENTRY(261, 1, 59, 5, 52, 1, 58, -4, 74), -+ CABAC_ENTRY(262, -2, 58, -2, 55, -13, 78, -13, 86), -+ CABAC_ENTRY(263, -3, 72, -2, 67, -9, 83, -13, 96), -+ CABAC_ENTRY(264, -3, 81, 0, 73, -4, 81, -11, 97), -+ CABAC_ENTRY(265, -11, 97, -8, 89, -13, 99, -19, 117), -+ CABAC_ENTRY(266, 0, 58, 3, 52, -13, 81, -8, 78), -+ CABAC_ENTRY(267, 8, 5, 7, 4, -6, 38, -5, 33), -+ CABAC_ENTRY(268, 10, 14, 10, 8, -13, 62, -4, 48), -+ CABAC_ENTRY(269, 14, 18, 17, 8, -6, 58, -2, 53), -+ CABAC_ENTRY(270, 13, 27, 16, 19, -2, 59, -3, 62), -+ CABAC_ENTRY(271, 2, 40, 3, 37, -16, 73, -13, 71), -+ CABAC_ENTRY(272, 0, 58, -1, 61, -10, 76, -10, 79), -+ CABAC_ENTRY(273, -3, 70, -5, 73, -13, 86, -12, 86), -+ CABAC_ENTRY(274, -6, 79, -1, 70, -9, 83, -13, 90), -+ CABAC_ENTRY(275, -8, 85, -4, 78, -10, 87, -14, 97), -+ -+ /* Table 9-22 – Values of variables m and n for ctxIdx from 277 to 337 */ -+ CABAC_ENTRY(277, -13, 106, -21, 126, -22, 127, -6, 93), -+ CABAC_ENTRY(278, -16, 106, -23, 124, -25, 127, -6, 84), -+ CABAC_ENTRY(279, -10, 87, -20, 110, -25, 120, -8, 79), -+ CABAC_ENTRY(280, -21, 114, -26, 126, -27, 127, 0, 66), -+ CABAC_ENTRY(281, -18, 110, -25, 124, -19, 114, -1, 71), -+ CABAC_ENTRY(282, -14, 98, -17, 105, -23, 117, 0, 62), -+ CABAC_ENTRY(283, -22, 110, -27, 121, -25, 118, -2, 60), -+ CABAC_ENTRY(284, -21, 106, -27, 117, -26, 117, -2, 59), -+ CABAC_ENTRY(285, -18, 103, -17, 102, -24, 113, -5, 75), -+ CABAC_ENTRY(286, -21, 107, -26, 117, -28, 118, -3, 62), -+ CABAC_ENTRY(287, -23, 108, -27, 116, -31, 120, -4, 58), -+ CABAC_ENTRY(288, -26, 112, -33, 122, -37, 124, -9, 66), -+ CABAC_ENTRY(289, -10, 96, -10, 95, -10, 94, -1, 79), -+ CABAC_ENTRY(290, -12, 95, -14, 100, -15, 102, 0, 71), -+ CABAC_ENTRY(291, -5, 91, -8, 95, -10, 99, 3, 68), -+ CABAC_ENTRY(292, -9, 93, -17, 111, -13, 106, 10, 44), -+ CABAC_ENTRY(293, -22, 94, -28, 114, -50, 127, -7, 62), -+ CABAC_ENTRY(294, -5, 86, -6, 89, -5, 92, 15, 36), -+ CABAC_ENTRY(295, 9, 67, -2, 80, 17, 57, 14, 40), -+ CABAC_ENTRY(296, -4, 80, -4, 82, -5, 86, 16, 27), -+ CABAC_ENTRY(297, -10, 85, -9, 85, -13, 94, 12, 29), -+ CABAC_ENTRY(298, -1, 70, -8, 81, -12, 91, 1, 44), -+ CABAC_ENTRY(299, 7, 60, -1, 72, -2, 77, 20, 36), -+ CABAC_ENTRY(300, 9, 58, 5, 64, 0, 71, 18, 32), -+ CABAC_ENTRY(301, 5, 61, 1, 67, -1, 73, 5, 42), -+ CABAC_ENTRY(302, 12, 50, 9, 56, 4, 64, 1, 48), -+ CABAC_ENTRY(303, 15, 50, 0, 69, -7, 81, 10, 62), -+ CABAC_ENTRY(304, 18, 49, 1, 69, 5, 64, 17, 46), -+ CABAC_ENTRY(305, 17, 54, 7, 69, 15, 57, 9, 64), -+ CABAC_ENTRY(306, 10, 41, -7, 69, 1, 67, -12, 104), -+ CABAC_ENTRY(307, 7, 46, -6, 67, 0, 68, -11, 97), -+ CABAC_ENTRY(308, -1, 51, -16, 77, -10, 67, -16, 96), -+ CABAC_ENTRY(309, 7, 49, -2, 64, 1, 68, -7, 88), -+ CABAC_ENTRY(310, 8, 52, 2, 61, 0, 77, -8, 85), -+ CABAC_ENTRY(311, 9, 41, -6, 67, 2, 64, -7, 85), -+ CABAC_ENTRY(312, 6, 47, -3, 64, 0, 68, -9, 85), -+ CABAC_ENTRY(313, 2, 55, 2, 57, -5, 78, -13, 88), -+ CABAC_ENTRY(314, 13, 41, -3, 65, 7, 55, 4, 66), -+ CABAC_ENTRY(315, 10, 44, -3, 66, 5, 59, -3, 77), -+ CABAC_ENTRY(316, 6, 50, 0, 62, 2, 65, -3, 76), -+ CABAC_ENTRY(317, 5, 53, 9, 51, 14, 54, -6, 76), -+ CABAC_ENTRY(318, 13, 49, -1, 66, 15, 44, 10, 58), -+ CABAC_ENTRY(319, 4, 63, -2, 71, 5, 60, -1, 76), -+ CABAC_ENTRY(320, 6, 64, -2, 75, 2, 70, -1, 83), -+ CABAC_ENTRY(321, -2, 69, -1, 70, -2, 76, -7, 99), -+ CABAC_ENTRY(322, -2, 59, -9, 72, -18, 86, -14, 95), -+ CABAC_ENTRY(323, 6, 70, 14, 60, 12, 70, 2, 95), -+ CABAC_ENTRY(324, 10, 44, 16, 37, 5, 64, 0, 76), -+ CABAC_ENTRY(325, 9, 31, 0, 47, -12, 70, -5, 74), -+ CABAC_ENTRY(326, 12, 43, 18, 35, 11, 55, 0, 70), -+ CABAC_ENTRY(327, 3, 53, 11, 37, 5, 56, -11, 75), -+ CABAC_ENTRY(328, 14, 34, 12, 41, 0, 69, 1, 68), -+ CABAC_ENTRY(329, 10, 38, 10, 41, 2, 65, 0, 65), -+ CABAC_ENTRY(330, -3, 52, 2, 48, -6, 74, -14, 73), -+ CABAC_ENTRY(331, 13, 40, 12, 41, 5, 54, 3, 62), -+ CABAC_ENTRY(332, 17, 32, 13, 41, 7, 54, 4, 62), -+ CABAC_ENTRY(333, 7, 44, 0, 59, -6, 76, -1, 68), -+ CABAC_ENTRY(334, 7, 38, 3, 50, -11, 82, -13, 75), -+ CABAC_ENTRY(335, 13, 50, 19, 40, -2, 77, 11, 55), -+ CABAC_ENTRY(336, 10, 57, 3, 66, -2, 77, 5, 64), -+ CABAC_ENTRY(337, 26, 43, 18, 50, 25, 42, 12, 70), -+ -+ /* Table 9-23 – Values of variables m and n for ctxIdx from 338 to 398 */ -+ CABAC_ENTRY(338, 14, 11, 19, -6, 17, -13, 15, 6), -+ CABAC_ENTRY(339, 11, 14, 18, -6, 16, -9, 6, 19), -+ CABAC_ENTRY(340, 9, 11, 14, 0, 17, -12, 7, 16), -+ CABAC_ENTRY(341, 18, 11, 26, -12, 27, -21, 12, 14), -+ CABAC_ENTRY(342, 21, 9, 31, -16, 37, -30, 18, 13), -+ CABAC_ENTRY(343, 23, -2, 33, -25, 41, -40, 13, 11), -+ CABAC_ENTRY(344, 32, -15, 33, -22, 42, -41, 13, 15), -+ CABAC_ENTRY(345, 32, -15, 37, -28, 48, -47, 15, 16), -+ CABAC_ENTRY(346, 34, -21, 39, -30, 39, -32, 12, 23), -+ CABAC_ENTRY(347, 39, -23, 42, -30, 46, -40, 13, 23), -+ CABAC_ENTRY(348, 42, -33, 47, -42, 52, -51, 15, 20), -+ CABAC_ENTRY(349, 41, -31, 45, -36, 46, -41, 14, 26), -+ CABAC_ENTRY(350, 46, -28, 49, -34, 52, -39, 14, 44), -+ CABAC_ENTRY(351, 38, -12, 41, -17, 43, -19, 17, 40), -+ CABAC_ENTRY(352, 21, 29, 32, 9, 32, 11, 17, 47), -+ CABAC_ENTRY(353, 45, -24, 69, -71, 61, -55, 24, 17), -+ CABAC_ENTRY(354, 53, -45, 63, -63, 56, -46, 21, 21), -+ CABAC_ENTRY(355, 48, -26, 66, -64, 62, -50, 25, 22), -+ CABAC_ENTRY(356, 65, -43, 77, -74, 81, -67, 31, 27), -+ CABAC_ENTRY(357, 43, -19, 54, -39, 45, -20, 22, 29), -+ CABAC_ENTRY(358, 39, -10, 52, -35, 35, -2, 19, 35), -+ CABAC_ENTRY(359, 30, 9, 41, -10, 28, 15, 14, 50), -+ CABAC_ENTRY(360, 18, 26, 36, 0, 34, 1, 10, 57), -+ CABAC_ENTRY(361, 20, 27, 40, -1, 39, 1, 7, 63), -+ CABAC_ENTRY(362, 0, 57, 30, 14, 30, 17, -2, 77), -+ CABAC_ENTRY(363, -14, 82, 28, 26, 20, 38, -4, 82), -+ CABAC_ENTRY(364, -5, 75, 23, 37, 18, 45, -3, 94), -+ CABAC_ENTRY(365, -19, 97, 12, 55, 15, 54, 9, 69), -+ CABAC_ENTRY(366, -35, 125, 11, 65, 0, 79, -12, 109), -+ CABAC_ENTRY(367, 27, 0, 37, -33, 36, -16, 36, -35), -+ CABAC_ENTRY(368, 28, 0, 39, -36, 37, -14, 36, -34), -+ CABAC_ENTRY(369, 31, -4, 40, -37, 37, -17, 32, -26), -+ CABAC_ENTRY(370, 27, 6, 38, -30, 32, 1, 37, -30), -+ CABAC_ENTRY(371, 34, 8, 46, -33, 34, 15, 44, -32), -+ CABAC_ENTRY(372, 30, 10, 42, -30, 29, 15, 34, -18), -+ CABAC_ENTRY(373, 24, 22, 40, -24, 24, 25, 34, -15), -+ CABAC_ENTRY(374, 33, 19, 49, -29, 34, 22, 40, -15), -+ CABAC_ENTRY(375, 22, 32, 38, -12, 31, 16, 33, -7), -+ CABAC_ENTRY(376, 26, 31, 40, -10, 35, 18, 35, -5), -+ CABAC_ENTRY(377, 21, 41, 38, -3, 31, 28, 33, 0), -+ CABAC_ENTRY(378, 26, 44, 46, -5, 33, 41, 38, 2), -+ CABAC_ENTRY(379, 23, 47, 31, 20, 36, 28, 33, 13), -+ CABAC_ENTRY(380, 16, 65, 29, 30, 27, 47, 23, 35), -+ CABAC_ENTRY(381, 14, 71, 25, 44, 21, 62, 13, 58), -+ CABAC_ENTRY(382, 8, 60, 12, 48, 18, 31, 29, -3), -+ CABAC_ENTRY(383, 6, 63, 11, 49, 19, 26, 26, 0), -+ CABAC_ENTRY(384, 17, 65, 26, 45, 36, 24, 22, 30), -+ CABAC_ENTRY(385, 21, 24, 22, 22, 24, 23, 31, -7), -+ CABAC_ENTRY(386, 23, 20, 23, 22, 27, 16, 35, -15), -+ CABAC_ENTRY(387, 26, 23, 27, 21, 24, 30, 34, -3), -+ CABAC_ENTRY(388, 27, 32, 33, 20, 31, 29, 34, 3), -+ CABAC_ENTRY(389, 28, 23, 26, 28, 22, 41, 36, -1), -+ CABAC_ENTRY(390, 28, 24, 30, 24, 22, 42, 34, 5), -+ CABAC_ENTRY(391, 23, 40, 27, 34, 16, 60, 32, 11), -+ CABAC_ENTRY(392, 24, 32, 18, 42, 15, 52, 35, 5), -+ CABAC_ENTRY(393, 28, 29, 25, 39, 14, 60, 34, 12), -+ CABAC_ENTRY(394, 23, 42, 18, 50, 3, 78, 39, 11), -+ CABAC_ENTRY(395, 19, 57, 12, 70, -16, 123, 30, 29), -+ CABAC_ENTRY(396, 22, 53, 21, 54, 21, 53, 34, 26), -+ CABAC_ENTRY(397, 22, 61, 14, 71, 22, 56, 29, 39), -+ CABAC_ENTRY(398, 11, 86, 11, 83, 25, 61, 19, 66), -+ -+ /* Values of variables m and n for ctxIdx from 399 to 463 (not documented) */ -+ CABAC_ENTRY(399, 12, 40, 25, 32, 21, 33, 31, 21), -+ CABAC_ENTRY(400, 11, 51, 21, 49, 19, 50, 31, 31), -+ CABAC_ENTRY(401, 14, 59, 21, 54, 17, 61, 25, 50), -+ CABAC_ENTRY(402, -4, 79, -5, 85, -3, 78, -17, 120), -+ CABAC_ENTRY(403, -7, 71, -6, 81, -8, 74, -20, 112), -+ CABAC_ENTRY(404, -5, 69, -10, 77, -9, 72, -18, 114), -+ CABAC_ENTRY(405, -9, 70, -7, 81, -10, 72, -11, 85), -+ CABAC_ENTRY(406, -8, 66, -17, 80, -18, 75, -15, 92), -+ CABAC_ENTRY(407, -10, 68, -18, 73, -12, 71, -14, 89), -+ CABAC_ENTRY(408, -19, 73, -4, 74, -11, 63, -26, 71), -+ CABAC_ENTRY(409, -12, 69, -10, 83, -5, 70, -15, 81), -+ CABAC_ENTRY(410, -16, 70, -9, 71, -17, 75, -14, 80), -+ CABAC_ENTRY(411, -15, 67, -9, 67, -14, 72, 0, 68), -+ CABAC_ENTRY(412, -20, 62, -1, 61, -16, 67, -14, 70), -+ CABAC_ENTRY(413, -19, 70, -8, 66, -8, 53, -24, 56), -+ CABAC_ENTRY(414, -16, 66, -14, 66, -14, 59, -23, 68), -+ CABAC_ENTRY(415, -22, 65, 0, 59, -9, 52, -24, 50), -+ CABAC_ENTRY(416, -20, 63, 2, 59, -11, 68, -11, 74), -+ CABAC_ENTRY(417, 9, -2, 17, -10, 9, -2, 23, -13), -+ CABAC_ENTRY(418, 26, -9, 32, -13, 30, -10, 26, -13), -+ CABAC_ENTRY(419, 33, -9, 42, -9, 31, -4, 40, -15), -+ CABAC_ENTRY(420, 39, -7, 49, -5, 33, -1, 49, -14), -+ CABAC_ENTRY(421, 41, -2, 53, 0, 33, 7, 44, 3), -+ CABAC_ENTRY(422, 45, 3, 64, 3, 31, 12, 45, 6), -+ CABAC_ENTRY(423, 49, 9, 68, 10, 37, 23, 44, 34), -+ CABAC_ENTRY(424, 45, 27, 66, 27, 31, 38, 33, 54), -+ CABAC_ENTRY(425, 36, 59, 47, 57, 20, 64, 19, 82), -+ CABAC_ENTRY(426, -6, 66, -5, 71, -9, 71, -3, 75), -+ CABAC_ENTRY(427, -7, 35, 0, 24, -7, 37, -1, 23), -+ CABAC_ENTRY(428, -7, 42, -1, 36, -8, 44, 1, 34), -+ CABAC_ENTRY(429, -8, 45, -2, 42, -11, 49, 1, 43), -+ CABAC_ENTRY(430, -5, 48, -2, 52, -10, 56, 0, 54), -+ CABAC_ENTRY(431, -12, 56, -9, 57, -12, 59, -2, 55), -+ CABAC_ENTRY(432, -6, 60, -6, 63, -8, 63, 0, 61), -+ CABAC_ENTRY(433, -5, 62, -4, 65, -9, 67, 1, 64), -+ CABAC_ENTRY(434, -8, 66, -4, 67, -6, 68, 0, 68), -+ CABAC_ENTRY(435, -8, 76, -7, 82, -10, 79, -9, 92), -+ CABAC_ENTRY(436, -5, 85, -3, 81, -3, 78, -14, 106), -+ CABAC_ENTRY(437, -6, 81, -3, 76, -8, 74, -13, 97), -+ CABAC_ENTRY(438, -10, 77, -7, 72, -9, 72, -15, 90), -+ CABAC_ENTRY(439, -7, 81, -6, 78, -10, 72, -12, 90), -+ CABAC_ENTRY(440, -17, 80, -12, 72, -18, 75, -18, 88), -+ CABAC_ENTRY(441, -18, 73, -14, 68, -12, 71, -10, 73), -+ CABAC_ENTRY(442, -4, 74, -3, 70, -11, 63, -9, 79), -+ CABAC_ENTRY(443, -10, 83, -6, 76, -5, 70, -14, 86), -+ CABAC_ENTRY(444, -9, 71, -5, 66, -17, 75, -10, 73), -+ CABAC_ENTRY(445, -9, 67, -5, 62, -14, 72, -10, 70), -+ CABAC_ENTRY(446, -1, 61, 0, 57, -16, 67, -10, 69), -+ CABAC_ENTRY(447, -8, 66, -4, 61, -8, 53, -5, 66), -+ CABAC_ENTRY(448, -14, 66, -9, 60, -14, 59, -9, 64), -+ CABAC_ENTRY(449, 0, 59, 1, 54, -9, 52, -5, 58), -+ CABAC_ENTRY(450, 2, 59, 2, 58, -11, 68, 2, 59), -+ CABAC_ENTRY(451, 21, -13, 17, -10, 9, -2, 21, -10), -+ CABAC_ENTRY(452, 33, -14, 32, -13, 30, -10, 24, -11), -+ CABAC_ENTRY(453, 39, -7, 42, -9, 31, -4, 28, -8), -+ CABAC_ENTRY(454, 46, -2, 49, -5, 33, -1, 28, -1), -+ CABAC_ENTRY(455, 51, 2, 53, 0, 33, 7, 29, 3), -+ CABAC_ENTRY(456, 60, 6, 64, 3, 31, 12, 29, 9), -+ CABAC_ENTRY(457, 61, 17, 68, 10, 37, 23, 35, 20), -+ CABAC_ENTRY(458, 55, 34, 66, 27, 31, 38, 29, 36), -+ CABAC_ENTRY(459, 42, 62, 47, 57, 20, 64, 14, 67), -+}; -+ -+static void set_ps_field(u32 *buf, struct rkvdec_ps_field field, u32 value) -+{ -+ u8 bit = field.offset % 32, word = field.offset / 32; -+ u64 mask = GENMASK_ULL(bit + field.len - 1, bit); -+ u64 val = ((u64)value << bit) & mask; -+ -+ buf[word] &= ~mask; -+ buf[word] |= val; -+ if (bit + field.len > 32) { -+ buf[word + 1] &= ~(mask >> 32); -+ buf[word + 1] |= val >> 32; -+ } -+} -+ -+static void assemble_hw_pps(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ const struct v4l2_ctrl_h264_sps *sps = run->sps; -+ const struct v4l2_ctrl_h264_pps *pps = run->pps; -+ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; -+ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; -+ struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; -+ struct rkvdec_sps_pps_packet *hw_ps; -+ dma_addr_t scaling_list_address; -+ u32 scaling_distance; -+ u32 i; -+ -+ /* -+ * HW read the SPS/PPS information from PPS packet index by PPS id. -+ * offset from the base can be calculated by PPS_id * 32 (size per PPS -+ * packet unit). so the driver copy SPS/PPS information to the exact PPS -+ * packet unit for HW accessing. -+ */ -+ hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; -+ memset(hw_ps, 0, sizeof(*hw_ps)); -+ -+#define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value) -+ /* write sps */ -+ WRITE_PPS(0xf, SEQ_PARAMETER_SET_ID); -+ WRITE_PPS(0xff, PROFILE_IDC); -+ WRITE_PPS(1, CONSTRAINT_SET3_FLAG); -+ WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC); -+ WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA); -+ WRITE_PPS(sps->bit_depth_chroma_minus8 + 8, BIT_DEPTH_CHROMA); -+ WRITE_PPS(0, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG); -+ WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4); -+ WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES); -+ WRITE_PPS(sps->pic_order_cnt_type, PIC_ORDER_CNT_TYPE); -+ WRITE_PPS(sps->log2_max_pic_order_cnt_lsb_minus4, -+ LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4); -+ WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO), -+ DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG); -+ WRITE_PPS(DIV_ROUND_UP(ctx->coded_fmt.fmt.pix_mp.width, 16), PIC_WIDTH_IN_MBS); -+ WRITE_PPS(DIV_ROUND_UP(ctx->coded_fmt.fmt.pix_mp.height, 16), PIC_HEIGHT_IN_MBS); -+ WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY), -+ FRAME_MBS_ONLY_FLAG); -+ WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD), -+ MB_ADAPTIVE_FRAME_FIELD_FLAG); -+ WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE), -+ DIRECT_8X8_INFERENCE_FLAG); -+ -+ /* write pps */ -+ WRITE_PPS(0xff, PIC_PARAMETER_SET_ID); -+ WRITE_PPS(0x1f, PPS_SEQ_PARAMETER_SET_ID); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE), -+ ENTROPY_CODING_MODE_FLAG); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT), -+ BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT_FLAG); -+ WRITE_PPS(pps->num_ref_idx_l0_default_active_minus1, -+ NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(0)); -+ WRITE_PPS(pps->num_ref_idx_l1_default_active_minus1, -+ NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(1)); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED), -+ WEIGHTED_PRED_FLAG); -+ WRITE_PPS(pps->weighted_bipred_idc, WEIGHTED_BIPRED_IDC); -+ WRITE_PPS(pps->pic_init_qp_minus26, PIC_INIT_QP_MINUS26); -+ WRITE_PPS(pps->pic_init_qs_minus26, PIC_INIT_QS_MINUS26); -+ WRITE_PPS(pps->chroma_qp_index_offset, CHROMA_QP_INDEX_OFFSET); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT), -+ DEBLOCKING_FILTER_CONTROL_PRESENT_FLAG); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED), -+ CONSTRAINED_INTRA_PRED_FLAG); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT), -+ REDUNDANT_PIC_CNT_PRESENT); -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE), -+ TRANSFORM_8X8_MODE_FLAG); -+ WRITE_PPS(pps->second_chroma_qp_index_offset, -+ SECOND_CHROMA_QP_INDEX_OFFSET); -+ -+ /* always use the matrix sent from userspace */ -+ WRITE_PPS(1, SCALING_LIST_ENABLE_FLAG); -+ -+ scaling_distance = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); -+ scaling_list_address = h264_ctx->priv_tbl.dma + scaling_distance; -+ WRITE_PPS(scaling_list_address, SCALING_LIST_ADDRESS); -+ -+ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { -+ u32 is_longterm = 0; -+ -+ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) -+ is_longterm = 1; -+ -+ WRITE_PPS(is_longterm, IS_LONG_TERM(i)); -+ } -+} -+ -+static void assemble_hw_rps(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; -+ const struct v4l2_ctrl_h264_slice_params *sl_params = &run->slices_params[0]; -+ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ const struct v4l2_ctrl_h264_sps *sps = run->sps; -+ struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; -+ u32 max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); -+ -+ u32 *hw_rps = priv_tbl->rps; -+ u32 i, j; -+ u16 *p = (u16 *)hw_rps; -+ -+ memset(hw_rps, 0, sizeof(priv_tbl->rps)); -+ -+ /* -+ * Assign an invalid pic_num if DPB entry at that position is inactive. -+ * If we assign 0 in that position hardware will treat that as a real -+ * reference picture with pic_num 0, triggering output picture -+ * corruption. -+ */ -+ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { -+ if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) -+ continue; -+ -+ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM || -+ dpb[i].frame_num < sl_params->frame_num) { -+ p[i] = dpb[i].frame_num; -+ continue; -+ } -+ -+ p[i] = dpb[i].frame_num - max_frame_num; -+ } -+ -+ for (j = 0; j < RKVDEC_NUM_REFLIST; j++) { -+ for (i = 0; i < h264_ctx->reflists.num_valid; i++) { -+ u8 dpb_valid = 0; -+ u8 idx = 0; -+ -+ switch (j) { -+ case 0: -+ idx = h264_ctx->reflists.p[i]; -+ break; -+ case 1: -+ idx = h264_ctx->reflists.b0[i]; -+ break; -+ case 2: -+ idx = h264_ctx->reflists.b1[i]; -+ break; -+ } -+ -+ if (idx >= ARRAY_SIZE(dec_params->dpb)) -+ continue; -+ dpb_valid = !!(dpb[idx].flags & -+ V4L2_H264_DPB_ENTRY_FLAG_ACTIVE); -+ -+ set_ps_field(hw_rps, DPB_INFO(i, j), -+ idx | dpb_valid << 4); -+ } -+ } -+} -+ -+/* -+ * NOTE: The values in a scaling list are in zig-zag order, apply inverse -+ * scanning process to get the values in matrix order. -+ */ -+static const u32 zig_zag_4x4[16] = { -+ 0, 1, 4, 8, 5, 2, 3, 6, 9, 12, 13, 10, 7, 11, 14, 15 -+}; -+ -+static const u32 zig_zag_8x8[64] = { -+ 0, 1, 8, 16, 9, 2, 3, 10, 17, 24, 32, 25, 18, 11, 4, 5, -+ 12, 19, 26, 33, 40, 48, 41, 34, 27, 20, 13, 6, 7, 14, 21, 28, -+ 35, 42, 49, 56, 57, 50, 43, 36, 29, 22, 15, 23, 30, 37, 44, 51, -+ 58, 59, 52, 45, 38, 31, 39, 46, 53, 60, 61, 54, 47, 55, 62, 63 -+}; -+ -+static void reorder_scaling_list(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix; -+ const size_t num_list_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4); -+ const size_t list_len_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4[0]); -+ const size_t num_list_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8); -+ const size_t list_len_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8[0]); -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; -+ u8 *dst = tbl->scaling_list; -+ const u8 *src; -+ int i, j; -+ -+ BUILD_BUG_ON(ARRAY_SIZE(zig_zag_4x4) != list_len_4x4); -+ BUILD_BUG_ON(ARRAY_SIZE(zig_zag_8x8) != list_len_8x8); -+ BUILD_BUG_ON(ARRAY_SIZE(tbl->scaling_list) < -+ num_list_4x4 * list_len_4x4 + -+ num_list_8x8 * list_len_8x8); -+ -+ src = &scaling->scaling_list_4x4[0][0]; -+ for (i = 0; i < num_list_4x4; ++i) { -+ for (j = 0; j < list_len_4x4; ++j) -+ dst[zig_zag_4x4[j]] = src[j]; -+ src += list_len_4x4; -+ dst += list_len_4x4; -+ } -+ -+ src = &scaling->scaling_list_8x8[0][0]; -+ for (i = 0; i < num_list_8x8; ++i) { -+ for (j = 0; j < list_len_8x8; ++j) -+ dst[zig_zag_8x8[j]] = src[j]; -+ src += list_len_8x8; -+ dst += list_len_8x8; -+ } -+} -+ -+/* -+ * dpb poc related registers table -+ */ -+static const u32 poc_reg_tbl_top_field[16] = { -+ RKVDEC_REG_H264_POC_REFER0(0), -+ RKVDEC_REG_H264_POC_REFER0(2), -+ RKVDEC_REG_H264_POC_REFER0(4), -+ RKVDEC_REG_H264_POC_REFER0(6), -+ RKVDEC_REG_H264_POC_REFER0(8), -+ RKVDEC_REG_H264_POC_REFER0(10), -+ RKVDEC_REG_H264_POC_REFER0(12), -+ RKVDEC_REG_H264_POC_REFER0(14), -+ RKVDEC_REG_H264_POC_REFER1(1), -+ RKVDEC_REG_H264_POC_REFER1(3), -+ RKVDEC_REG_H264_POC_REFER1(5), -+ RKVDEC_REG_H264_POC_REFER1(7), -+ RKVDEC_REG_H264_POC_REFER1(9), -+ RKVDEC_REG_H264_POC_REFER1(11), -+ RKVDEC_REG_H264_POC_REFER1(13), -+ RKVDEC_REG_H264_POC_REFER2(0) -+}; -+ -+static const u32 poc_reg_tbl_bottom_field[16] = { -+ RKVDEC_REG_H264_POC_REFER0(1), -+ RKVDEC_REG_H264_POC_REFER0(3), -+ RKVDEC_REG_H264_POC_REFER0(5), -+ RKVDEC_REG_H264_POC_REFER0(7), -+ RKVDEC_REG_H264_POC_REFER0(9), -+ RKVDEC_REG_H264_POC_REFER0(11), -+ RKVDEC_REG_H264_POC_REFER0(13), -+ RKVDEC_REG_H264_POC_REFER1(0), -+ RKVDEC_REG_H264_POC_REFER1(2), -+ RKVDEC_REG_H264_POC_REFER1(4), -+ RKVDEC_REG_H264_POC_REFER1(6), -+ RKVDEC_REG_H264_POC_REFER1(8), -+ RKVDEC_REG_H264_POC_REFER1(10), -+ RKVDEC_REG_H264_POC_REFER1(12), -+ RKVDEC_REG_H264_POC_REFER1(14), -+ RKVDEC_REG_H264_POC_REFER2(1) -+}; -+ -+static struct vb2_buffer * -+get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_h264_run *run, -+ unsigned int dpb_idx) -+{ -+ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; -+ const struct v4l2_h264_dpb_entry *dpb = run->decode_params->dpb; -+ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; -+ int buf_idx = -1; -+ -+ if (dpb[dpb_idx].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE) -+ buf_idx = vb2_find_timestamp(cap_q, -+ dpb[dpb_idx].reference_ts, 0); -+ -+ /* -+ * If a DPB entry is unused or invalid, address of current destination -+ * buffer is returned. -+ */ -+ if (buf_idx < 0) -+ return &run->base.bufs.dst->vb2_buf; -+ -+ return vb2_get_buffer(cap_q, buf_idx); -+} -+ -+static void config_registers(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; -+ const struct v4l2_ctrl_h264_sps *sps = run->sps; -+ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ dma_addr_t priv_start_addr = h264_ctx->priv_tbl.dma; -+ const struct v4l2_pix_format_mplane *dst_fmt; -+ struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; -+ struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; -+ const struct v4l2_format *f; -+ dma_addr_t rlc_addr; -+ dma_addr_t refer_addr; -+ u32 rlc_len; -+ u32 hor_virstride = 0; -+ u32 ver_virstride = 0; -+ u32 y_virstride = 0; -+ u32 yuv_virstride = 0; -+ u32 offset; -+ dma_addr_t dst_addr; -+ u32 reg, i; -+ -+ reg = RKVDEC_MODE(RKVDEC_MODE_H264); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_SYSCTRL); -+ -+ f = &ctx->decoded_fmt; -+ dst_fmt = &f->fmt.pix_mp; -+ hor_virstride = (sps->bit_depth_luma_minus8 + 8) * dst_fmt->width / 8; -+ ver_virstride = round_up(dst_fmt->height, 16); -+ y_virstride = hor_virstride * ver_virstride; -+ -+ if (sps->chroma_format_idc == 0) -+ yuv_virstride = y_virstride; -+ else if (sps->chroma_format_idc == 1) -+ yuv_virstride += y_virstride + y_virstride / 2; -+ else if (sps->chroma_format_idc == 2) -+ yuv_virstride += 2 * y_virstride; -+ -+ reg = RKVDEC_Y_HOR_VIRSTRIDE(hor_virstride / 16) | -+ RKVDEC_UV_HOR_VIRSTRIDE(hor_virstride / 16) | -+ RKVDEC_SLICE_NUM_HIGHBIT | -+ RKVDEC_SLICE_NUM_LOWBITS(0x7ff); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_PICPAR); -+ -+ /* config rlc base address */ -+ rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); -+ writel_relaxed(rlc_addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); -+ writel_relaxed(rlc_addr, rkvdec->regs + RKVDEC_REG_RLCWRITE_BASE); -+ -+ rlc_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); -+ reg = RKVDEC_STRM_LEN(rlc_len); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_STRM_LEN); -+ -+ /* config cabac table */ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, cabac_table); -+ writel_relaxed(priv_start_addr + offset, -+ rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); -+ -+ /* config output base address */ -+ dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); -+ writel_relaxed(dst_addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); -+ -+ reg = RKVDEC_Y_VIRSTRIDE(y_virstride / 16); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); -+ -+ reg = RKVDEC_YUV_VIRSTRIDE(yuv_virstride / 16); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); -+ -+ /* config ref pic address & poc */ -+ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { -+ struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i); -+ -+ refer_addr = vb2_dma_contig_plane_dma_addr(vb_buf, 0) | -+ RKVDEC_COLMV_USED_FLAG_REF; -+ -+ if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) -+ refer_addr |= RKVDEC_TOPFIELD_USED_REF | -+ RKVDEC_BOTFIELD_USED_REF; -+ else if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD) -+ refer_addr |= RKVDEC_BOTFIELD_USED_REF; -+ else -+ refer_addr |= RKVDEC_TOPFIELD_USED_REF; -+ -+ writel_relaxed(dpb[i].top_field_order_cnt, -+ rkvdec->regs + poc_reg_tbl_top_field[i]); -+ writel_relaxed(dpb[i].bottom_field_order_cnt, -+ rkvdec->regs + poc_reg_tbl_bottom_field[i]); -+ -+ if (i < V4L2_H264_NUM_DPB_ENTRIES - 1) -+ writel_relaxed(refer_addr, -+ rkvdec->regs + RKVDEC_REG_H264_BASE_REFER(i)); -+ else -+ writel_relaxed(refer_addr, -+ rkvdec->regs + RKVDEC_REG_H264_BASE_REFER15); -+ } -+ -+ /* -+ * Since support frame mode only -+ * top_field_order_cnt is the same as bottom_field_order_cnt -+ */ -+ reg = RKVDEC_CUR_POC(dec_params->top_field_order_cnt); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_CUR_POC0); -+ -+ reg = RKVDEC_CUR_POC(dec_params->bottom_field_order_cnt); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_CUR_POC1); -+ -+ /* config hw pps address */ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, param_set); -+ writel_relaxed(priv_start_addr + offset, -+ rkvdec->regs + RKVDEC_REG_PPS_BASE); -+ -+ /* config hw rps address */ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, rps); -+ writel_relaxed(priv_start_addr + offset, -+ rkvdec->regs + RKVDEC_REG_RPS_BASE); -+ -+ reg = RKVDEC_AXI_DDR_RDATA(0); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_RDATA); -+ -+ reg = RKVDEC_AXI_DDR_WDATA(0); -+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_WDATA); -+ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, err_info); -+ writel_relaxed(priv_start_addr + offset, -+ rkvdec->regs + RKVDEC_REG_H264_ERRINFO_BASE); -+} -+ -+#define RKVDEC_H264_MAX_DEPTH_IN_BYTES 2 -+ -+static int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; -+ -+ fmt->num_planes = 1; -+ fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * -+ RKVDEC_H264_MAX_DEPTH_IN_BYTES; -+ return 0; -+} -+ -+static int rkvdec_h264_start(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_h264_priv_tbl *priv_tbl; -+ struct rkvdec_h264_ctx *h264_ctx; -+ int ret; -+ -+ h264_ctx = kzalloc(sizeof(*h264_ctx), GFP_KERNEL); -+ if (!h264_ctx) -+ return -ENOMEM; -+ -+ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), -+ &h264_ctx->priv_tbl.dma, GFP_KERNEL); -+ if (!priv_tbl) { -+ ret = -ENOMEM; -+ goto err_free_ctx; -+ } -+ -+ h264_ctx->priv_tbl.size = sizeof(*priv_tbl); -+ h264_ctx->priv_tbl.cpu = priv_tbl; -+ memcpy(priv_tbl->cabac_table, rkvdec_h264_cabac_table, -+ sizeof(rkvdec_h264_cabac_table)); -+ -+ ctx->priv = h264_ctx; -+ return 0; -+ -+err_free_ctx: -+ kfree(h264_ctx); -+ return ret; -+} -+ -+static void rkvdec_h264_stop(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ dma_free_coherent(rkvdec->dev, h264_ctx->priv_tbl.size, -+ h264_ctx->priv_tbl.cpu, h264_ctx->priv_tbl.dma); -+ kfree(h264_ctx); -+} -+ -+static void rkvdec_h264_run_preamble(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ struct v4l2_ctrl *ctrl; -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS); -+ run->decode_params = ctrl ? ctrl->p_cur.p : NULL; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS); -+ run->slices_params = ctrl ? ctrl->p_cur.p : NULL; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_H264_SPS); -+ run->sps = ctrl ? ctrl->p_cur.p : NULL; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_H264_PPS); -+ run->pps = ctrl ? ctrl->p_cur.p : NULL; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX); -+ run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL; -+ -+ rkvdec_run_preamble(ctx, &run->base); -+} -+ -+static int rkvdec_h264_run(struct rkvdec_ctx *ctx) -+{ -+ struct v4l2_h264_reflist_builder reflist_builder; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ struct rkvdec_h264_run run; -+ -+ rkvdec_h264_run_preamble(ctx, &run); -+ -+ /* Build the P/B{0,1} ref lists. */ -+ v4l2_h264_init_reflist_builder(&reflist_builder, run.decode_params, -+ &run.slices_params[0], run.sps, -+ run.decode_params->dpb); -+ h264_ctx->reflists.num_valid = reflist_builder.num_valid; -+ v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); -+ v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, -+ h264_ctx->reflists.b1); -+ -+ reorder_scaling_list(ctx, &run); -+ assemble_hw_pps(ctx, &run); -+ assemble_hw_rps(ctx, &run); -+ config_registers(ctx, &run); -+ -+ rkvdec_run_postamble(ctx, &run.base); -+ -+ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); -+ -+ writel(0xffffffff, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); -+ writel(0xffffffff, rkvdec->regs + RKVDEC_REG_H264_ERR_E); -+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); -+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); -+ -+ /* Start decoding! */ -+ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | -+ RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, -+ rkvdec->regs + RKVDEC_REG_INTERRUPT); -+ -+ return 0; -+} -+ -+const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops = { -+ .adjust_fmt = rkvdec_h264_adjust_fmt, -+ .start = rkvdec_h264_start, -+ .stop = rkvdec_h264_stop, -+ .run = rkvdec_h264_run, -+}; -diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h -new file mode 100644 -index 000000000000..15b9bee92016 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/rkvdec-regs.h -@@ -0,0 +1,223 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+ -+#ifndef RKVDEC_REGS_H_ -+#define RKVDEC_REGS_H_ -+ -+/* rkvcodec registers */ -+#define RKVDEC_REG_INTERRUPT 0x004 -+#define RKVDEC_INTERRUPT_DEC_E BIT(0) -+#define RKVDEC_CONFIG_DEC_CLK_GATE_E BIT(1) -+#define RKVDEC_E_STRMD_CLKGATE_DIS BIT(2) -+#define RKVDEC_TIMEOUT_MODE BIT(3) -+#define RKVDEC_IRQ_DIS BIT(4) -+#define RKVDEC_TIMEOUT_E BIT(5) -+#define RKVDEC_BUF_EMPTY_E BIT(6) -+#define RKVDEC_STRM_E_WAITDECFIFO_EMPTY BIT(7) -+#define RKVDEC_IRQ BIT(8) -+#define RKVDEC_IRQ_RAW BIT(9) -+#define RKVDEC_E_REWRITE_VALID BIT(10) -+#define RKVDEC_COMMONIRQ_MODE BIT(11) -+#define RKVDEC_RDY_STA BIT(12) -+#define RKVDEC_BUS_STA BIT(13) -+#define RKVDEC_ERR_STA BIT(14) -+#define RKVDEC_TIMEOUT_STA BIT(15) -+#define RKVDEC_BUF_EMPTY_STA BIT(16) -+#define RKVDEC_COLMV_REF_ERR_STA BIT(17) -+#define RKVDEC_CABU_END_STA BIT(18) -+#define RKVDEC_H264ORVP9_ERR_MODE BIT(19) -+#define RKVDEC_SOFTRST_EN_P BIT(20) -+#define RKVDEC_FORCE_SOFTRESET_VALID BIT(21) -+#define RKVDEC_SOFTRESET_RDY BIT(22) -+ -+#define RKVDEC_REG_SYSCTRL 0x008 -+#define RKVDEC_IN_ENDIAN BIT(0) -+#define RKVDEC_IN_SWAP32_E BIT(1) -+#define RKVDEC_IN_SWAP64_E BIT(2) -+#define RKVDEC_STR_ENDIAN BIT(3) -+#define RKVDEC_STR_SWAP32_E BIT(4) -+#define RKVDEC_STR_SWAP64_E BIT(5) -+#define RKVDEC_OUT_ENDIAN BIT(6) -+#define RKVDEC_OUT_SWAP32_E BIT(7) -+#define RKVDEC_OUT_CBCR_SWAP BIT(8) -+#define RKVDEC_RLC_MODE_DIRECT_WRITE BIT(10) -+#define RKVDEC_RLC_MODE BIT(11) -+#define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12) -+#define RKVDEC_MODE(x) (((x) & 0x03) << 20) -+#define RKVDEC_MODE_H264 1 -+#define RKVDEC_MODE_VP9 2 -+#define RKVDEC_RPS_MODE BIT(24) -+#define RKVDEC_STRM_MODE BIT(25) -+#define RKVDEC_H264_STRM_LASTPKT BIT(26) -+#define RKVDEC_H264_FIRSTSLICE_FLAG BIT(27) -+#define RKVDEC_H264_FRAME_ORSLICE BIT(28) -+#define RKVDEC_BUSPR_SLOT_DIS BIT(29) -+ -+#define RKVDEC_REG_PICPAR 0x00C -+#define RKVDEC_Y_HOR_VIRSTRIDE(x) ((x) & 0x1ff) -+#define RKVDEC_SLICE_NUM_HIGHBIT BIT(11) -+#define RKVDEC_UV_HOR_VIRSTRIDE(x) (((x) & 0x1ff) << 12) -+#define RKVDEC_SLICE_NUM_LOWBITS(x) (((x) & 0x7ff) << 21) -+ -+#define RKVDEC_REG_STRM_RLC_BASE 0x010 -+ -+#define RKVDEC_REG_STRM_LEN 0x014 -+#define RKVDEC_STRM_LEN(x) ((x) & 0x7ffffff) -+ -+#define RKVDEC_REG_CABACTBL_PROB_BASE 0x018 -+#define RKVDEC_REG_DECOUT_BASE 0x01C -+ -+#define RKVDEC_REG_Y_VIRSTRIDE 0x020 -+#define RKVDEC_Y_VIRSTRIDE(x) ((x) & 0xfffff) -+ -+#define RKVDEC_REG_YUV_VIRSTRIDE 0x024 -+#define RKVDEC_YUV_VIRSTRIDE(x) ((x) & 0x1fffff) -+#define RKVDEC_REG_H264_BASE_REFER(i) (((i) * 0x04) + 0x028) -+ -+#define RKVDEC_REG_H264_BASE_REFER15 0x0C0 -+#define RKVDEC_FIELD_REF BIT(0) -+#define RKVDEC_TOPFIELD_USED_REF BIT(1) -+#define RKVDEC_BOTFIELD_USED_REF BIT(2) -+#define RKVDEC_COLMV_USED_FLAG_REF BIT(3) -+ -+#define RKVDEC_REG_VP9_LAST_FRAME_BASE 0x02c -+#define RKVDEC_REG_VP9_GOLDEN_FRAME_BASE 0x030 -+#define RKVDEC_REG_VP9_ALTREF_FRAME_BASE 0x034 -+ -+#define RKVDEC_REG_VP9_CPRHEADER_OFFSET 0x028 -+#define RKVDEC_VP9_CPRHEADER_OFFSET(x) ((x) & 0xffff) -+ -+#define RKVDEC_REG_VP9_REFERLAST_BASE 0x02C -+#define RKVDEC_REG_VP9_REFERGOLDEN_BASE 0x030 -+#define RKVDEC_REG_VP9_REFERALFTER_BASE 0x034 -+ -+#define RKVDEC_REG_VP9COUNT_BASE 0x038 -+#define RKVDEC_VP9COUNT_UPDATE_EN BIT(0) -+ -+#define RKVDEC_REG_VP9_SEGIDLAST_BASE 0x03C -+#define RKVDEC_REG_VP9_SEGIDCUR_BASE 0x040 -+#define RKVDEC_REG_VP9_FRAME_SIZE(i) ((i) * 0x04 + 0x044) -+#define RKVDEC_VP9_FRAMEWIDTH(x) (((x) & 0xffff) << 0) -+#define RKVDEC_VP9_FRAMEHEIGHT(x) (((x) & 0xffff) << 16) -+ -+#define RKVDEC_VP9_SEGID_GRP(i) ((i) * 0x04 + 0x050) -+#define RKVDEC_SEGID_ABS_DELTA(x) ((x) & 0x1) -+#define RKVDEC_SEGID_FRAME_QP_DELTA_EN(x) (((x) & 0x1) << 1) -+#define RKVDEC_SEGID_FRAME_QP_DELTA(x) (((x) & 0x1ff) << 2) -+#define RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(x) (((x) & 0x1) << 11) -+#define RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(x) (((x) & 0x7f) << 12) -+#define RKVDEC_SEGID_REFERINFO_EN(x) (((x) & 0x1) << 19) -+#define RKVDEC_SEGID_REFERINFO(x) (((x) & 0x03) << 20) -+#define RKVDEC_SEGID_FRAME_SKIP_EN(x) (((x) & 0x1) << 22) -+ -+#define RKVDEC_VP9_CPRHEADER_CONFIG 0x070 -+#define RKVDEC_VP9_TX_MODE(x) ((x) & 0x07) -+#define RKVDEC_VP9_FRAME_REF_MODE(x) (((x) & 0x03) << 3) -+ -+#define RKVDEC_VP9_REF_SCALE(i) ((i) * 0x04 + 0x074) -+#define RKVDEC_VP9_REF_HOR_SCALE(x) ((x) & 0xffff) -+#define RKVDEC_VP9_REF_VER_SCALE(x) (((x) & 0xffff) << 16) -+ -+#define RKVDEC_VP9_REF_DELTAS_LASTFRAME 0x080 -+#define RKVDEC_REF_DELTAS_LASTFRAME(pos, val) (((val) & 0x7f) << ((pos) * 7)) -+ -+#define RKVDEC_VP9_INFO_LASTFRAME 0x084 -+#define RKVDEC_MODE_DELTAS_LASTFRAME(pos, val) (((val) & 0x7f) << ((pos) * 7)) -+#define RKVDEC_SEG_EN_LASTFRAME BIT(16) -+#define RKVDEC_LAST_SHOW_FRAME BIT(17) -+#define RKVDEC_LAST_INTRA_ONLY BIT(18) -+#define RKVDEC_LAST_WIDHHEIGHT_EQCUR BIT(19) -+#define RKVDEC_COLOR_SPACE_LASTKEYFRAME(x) (((x) & 0x07) << 20) -+ -+#define RKVDEC_VP9_INTERCMD_BASE 0x088 -+ -+#define RKVDEC_VP9_INTERCMD_NUM 0x08C -+#define RKVDEC_INTERCMD_NUM(x) ((x) & 0xffffff) -+ -+#define RKVDEC_VP9_LASTTILE_SIZE 0x090 -+#define RKVDEC_LASTTILE_SIZE(x) ((x) & 0xffffff) -+ -+#define RKVDEC_VP9_HOR_VIRSTRIDE(i) ((i) * 0x04 + 0x094) -+#define RKVDEC_HOR_Y_VIRSTRIDE(x) ((x) & 0x1ff) -+#define RKVDEC_HOR_UV_VIRSTRIDE(x) (((x) & 0x1ff) << 16) -+ -+#define RKVDEC_REG_H264_POC_REFER0(i) (((i) * 0x04) + 0x064) -+#define RKVDEC_REG_H264_POC_REFER1(i) (((i) * 0x04) + 0x0C4) -+#define RKVDEC_REG_H264_POC_REFER2(i) (((i) * 0x04) + 0x120) -+#define RKVDEC_POC_REFER(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_CUR_POC0 0x0A0 -+#define RKVDEC_REG_CUR_POC1 0x128 -+#define RKVDEC_CUR_POC(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_RLCWRITE_BASE 0x0A4 -+#define RKVDEC_REG_PPS_BASE 0x0A8 -+#define RKVDEC_REG_RPS_BASE 0x0AC -+ -+#define RKVDEC_REG_STRMD_ERR_EN 0x0B0 -+#define RKVDEC_STRMD_ERR_EN(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_STRMD_ERR_STA 0x0B4 -+#define RKVDEC_STRMD_ERR_STA(x) ((x) & 0xfffffff) -+#define RKVDEC_COLMV_ERR_REF_PICIDX(x) (((x) & 0x0f) << 28) -+ -+#define RKVDEC_REG_STRMD_ERR_CTU 0x0B8 -+#define RKVDEC_STRMD_ERR_CTU(x) ((x) & 0xff) -+#define RKVDEC_STRMD_ERR_CTU_YOFFSET(x) (((x) & 0xff) << 8) -+#define RKVDEC_STRMFIFO_SPACE2FULL(x) (((x) & 0x7f) << 16) -+#define RKVDEC_VP9_ERR_EN_CTU0 BIT(24) -+ -+#define RKVDEC_REG_SAO_CTU_POS 0x0BC -+#define RKVDEC_SAOWR_XOFFSET(x) ((x) & 0x1ff) -+#define RKVDEC_SAOWR_YOFFSET(x) (((x) & 0x3ff) << 16) -+ -+#define RKVDEC_VP9_LAST_FRAME_YSTRIDE 0x0C0 -+#define RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE 0x0C4 -+#define RKVDEC_VP9_ALTREF_FRAME_YSTRIDE 0x0C8 -+#define RKVDEC_VP9_REF_YSTRIDE(x) (((x) & 0xfffff) << 0) -+ -+#define RKVDEC_VP9_LAST_FRAME_YUVSTRIDE 0x0CC -+#define RKVDEC_VP9_REF_YUVSTRIDE(x) (((x) & 0x1fffff) << 0) -+ -+#define RKVDEC_VP9_REF_COLMV_BASE 0x0D0 -+ -+#define RKVDEC_REG_PERFORMANCE_CYCLE 0x100 -+#define RKVDEC_PERFORMANCE_CYCLE(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_AXI_DDR_RDATA 0x104 -+#define RKVDEC_AXI_DDR_RDATA(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_AXI_DDR_WDATA 0x108 -+#define RKVDEC_AXI_DDR_WDATA(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_FPGADEBUG_RESET 0x10C -+#define RKVDEC_BUSIFD_RESETN BIT(0) -+#define RKVDEC_CABAC_RESETN BIT(1) -+#define RKVDEC_DEC_CTRL_RESETN BIT(2) -+#define RKVDEC_TRANSD_RESETN BIT(3) -+#define RKVDEC_INTRA_RESETN BIT(4) -+#define RKVDEC_INTER_RESETN BIT(5) -+#define RKVDEC_RECON_RESETN BIT(6) -+#define RKVDEC_FILER_RESETN BIT(7) -+ -+#define RKVDEC_REG_PERFORMANCE_SEL 0x110 -+#define RKVDEC_PERF_SEL_CNT0(x) ((x) & 0x3f) -+#define RKVDEC_PERF_SEL_CNT1(x) (((x) & 0x3f) << 8) -+#define RKVDEC_PERF_SEL_CNT2(x) (((x) & 0x3f) << 16) -+ -+#define RKVDEC_REG_PERFORMANCE_CNT(i) ((i) * 0x04 + 0x114) -+#define RKVDEC_PERF_CNT(x) ((x) & 0xffffffff) -+ -+#define RKVDEC_REG_H264_ERRINFO_BASE 0x12C -+ -+#define RKVDEC_REG_H264_ERRINFO_NUM 0x130 -+#define RKVDEC_SLICEDEC_NUM(x) ((x) & 0x3fff) -+#define RKVDEC_STRMD_DECT_ERR_FLAG BIT(15) -+#define RKVDEC_ERR_PKT_NUM(x) (((x) & 0x3fff) << 16) -+ -+#define RKVDEC_REG_H264_ERR_E 0x134 -+#define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff) -+ -+#define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410 -+#define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450 -+ -+#endif /* RKVDEC_REGS_H_ */ -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -new file mode 100644 -index 000000000000..225eeca73356 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -0,0 +1,1103 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip Video Decoder driver -+ * -+ * Copyright (C) 2019 Collabora, Ltd. -+ * -+ * Based on rkvdec driver by Google LLC. (Tomasz Figa ) -+ * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. -+ * Copyright (C) 2011 Samsung Electronics Co., Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "rkvdec.h" -+#include "rkvdec-regs.h" -+ -+static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { -+ { -+ .per_request = true, -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS, -+ }, -+ { -+ .per_request = true, -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS, -+ }, -+ { -+ .per_request = true, -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SPS, -+ }, -+ { -+ .per_request = true, -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_PPS, -+ }, -+ { -+ .per_request = true, -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX, -+ }, -+ { -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE, -+ .cfg.min = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, -+ .cfg.max = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, -+ .cfg.def = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, -+ }, -+ { -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_H264_START_CODE, -+ .cfg.min = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, -+ .cfg.def = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, -+ .cfg.max = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, -+ }, -+}; -+ -+static const struct rkvdec_ctrls rkvdec_h264_ctrls = { -+ .ctrls = rkvdec_h264_ctrl_descs, -+ .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), -+}; -+ -+static const u32 rkvdec_h264_decoded_fmts[] = { -+ V4L2_PIX_FMT_NV12, -+}; -+ -+static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { -+ { -+ .fourcc = V4L2_PIX_FMT_H264_SLICE, -+ .frmsize = { -+ .min_width = 48, -+ .max_width = 4096, -+ .step_width = 16, -+ .min_height = 48, -+ .max_height = 2304, -+ .step_height = 16, -+ }, -+ .ctrls = &rkvdec_h264_ctrls, -+ .ops = &rkvdec_h264_fmt_ops, -+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), -+ .decoded_fmts = rkvdec_h264_decoded_fmts, -+ } -+}; -+ -+static const struct rkvdec_coded_fmt_desc * -+rkvdec_find_coded_fmt_desc(u32 fourcc) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { -+ if (rkvdec_coded_fmts[i].fourcc == fourcc) -+ return &rkvdec_coded_fmts[i]; -+ } -+ -+ return NULL; -+} -+ -+static void rkvdec_reset_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f, -+ u32 fourcc) -+{ -+ memset(f, 0, sizeof(*f)); -+ f->fmt.pix_mp.pixelformat = fourcc; -+ f->fmt.pix_mp.field = V4L2_FIELD_NONE; -+ f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_REC709, -+ f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; -+ f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; -+ f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; -+} -+ -+static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx) -+{ -+ struct v4l2_format *f = &ctx->coded_fmt; -+ -+ ctx->coded_fmt_desc = &rkvdec_coded_fmts[0]; -+ rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc); -+ -+ f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; -+ f->fmt.pix_mp.width = ctx->coded_fmt_desc->frmsize.min_width; -+ f->fmt.pix_mp.height = ctx->coded_fmt_desc->frmsize.min_height; -+ -+ if (ctx->coded_fmt_desc->ops->adjust_fmt) -+ ctx->coded_fmt_desc->ops->adjust_fmt(ctx, f); -+} -+ -+static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx) -+{ -+ struct v4l2_format *f = &ctx->decoded_fmt; -+ -+ rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]); -+ f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; -+ v4l2_fill_pixfmt_mp(&f->fmt.pix_mp, -+ ctx->coded_fmt_desc->decoded_fmts[0], -+ ctx->coded_fmt.fmt.pix_mp.width, -+ ctx->coded_fmt.fmt.pix_mp.height); -+ f->fmt.pix_mp.plane_fmt[0].sizeimage += 128 * -+ DIV_ROUND_UP(f->fmt.pix_mp.width, 16) * -+ DIV_ROUND_UP(f->fmt.pix_mp.height, 16); -+} -+ -+static int rkvdec_enum_framesizes(struct file *file, void *priv, -+ struct v4l2_frmsizeenum *fsize) -+{ -+ const struct rkvdec_coded_fmt_desc *fmt; -+ -+ if (fsize->index != 0) -+ return -EINVAL; -+ -+ fmt = rkvdec_find_coded_fmt_desc(fsize->pixel_format); -+ if (!fmt) -+ return -EINVAL; -+ -+ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; -+ fsize->stepwise = fmt->frmsize; -+ return 0; -+} -+ -+static int rkvdec_querycap(struct file *file, void *priv, -+ struct v4l2_capability *cap) -+{ -+ struct rkvdec_dev *rkvdec = video_drvdata(file); -+ struct video_device *vdev = video_devdata(file); -+ -+ strscpy(cap->driver, rkvdec->dev->driver->name, -+ sizeof(cap->driver)); -+ strscpy(cap->card, vdev->name, sizeof(cap->card)); -+ snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", -+ rkvdec->dev->driver->name); -+ return 0; -+} -+ -+static int rkvdec_try_capture_fmt(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ const struct rkvdec_coded_fmt_desc *coded_desc; -+ unsigned int i; -+ -+ /* -+ * The codec context should point to a coded format desc, if the format -+ * on the coded end has not been set yet, it should point to the -+ * default value. -+ */ -+ coded_desc = ctx->coded_fmt_desc; -+ if (WARN_ON(!coded_desc)) -+ return -EINVAL; -+ -+ for (i = 0; i < coded_desc->num_decoded_fmts; i++) { -+ if (coded_desc->decoded_fmts[i] == pix_mp->pixelformat) -+ break; -+ } -+ -+ if (i == coded_desc->num_decoded_fmts) -+ pix_mp->pixelformat = coded_desc->decoded_fmts[0]; -+ -+ /* Always apply the frmsize constraint of the coded end. */ -+ v4l2_apply_frmsize_constraints(&pix_mp->width, -+ &pix_mp->height, -+ &coded_desc->frmsize); -+ -+ v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, -+ pix_mp->width, pix_mp->height); -+ pix_mp->plane_fmt[0].sizeimage += -+ 128 * -+ DIV_ROUND_UP(pix_mp->width, 16) * -+ DIV_ROUND_UP(pix_mp->height, 16); -+ pix_mp->field = V4L2_FIELD_NONE; -+ -+ return 0; -+} -+ -+static int rkvdec_try_output_fmt(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ const struct rkvdec_coded_fmt_desc *desc; -+ -+ desc = rkvdec_find_coded_fmt_desc(pix_mp->pixelformat); -+ if (!desc) { -+ pix_mp->pixelformat = rkvdec_coded_fmts[0].fourcc; -+ desc = &rkvdec_coded_fmts[0]; -+ } -+ -+ v4l2_apply_frmsize_constraints(&pix_mp->width, -+ &pix_mp->height, -+ &desc->frmsize); -+ -+ pix_mp->field = V4L2_FIELD_NONE; -+ /* All coded formats are considered single planar for now. */ -+ pix_mp->num_planes = 1; -+ -+ if (desc->ops->adjust_fmt) { -+ int ret; -+ -+ ret = desc->ops->adjust_fmt(ctx, f); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_s_fmt(struct file *file, void *priv, -+ struct v4l2_format *f, -+ int (*try_fmt)(struct file *, void *, -+ struct v4l2_format *)) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ struct vb2_queue *vq; -+ -+ if (!try_fmt) -+ return -EINVAL; -+ -+ vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); -+ if (vb2_is_busy(vq)) -+ return -EBUSY; -+ -+ return try_fmt(file, priv, f); -+} -+ -+static int rkvdec_s_capture_fmt(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ int ret; -+ -+ ret = rkvdec_s_fmt(file, priv, f, rkvdec_try_capture_fmt); -+ if (ret) -+ return ret; -+ -+ ctx->decoded_fmt = *f; -+ return 0; -+} -+ -+static int rkvdec_s_output_fmt(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; -+ const struct rkvdec_coded_fmt_desc *desc; -+ struct v4l2_format *cap_fmt; -+ struct vb2_queue *peer_vq; -+ int ret; -+ -+ /* -+ * Since format change on the OUTPUT queue will reset the CAPTURE -+ * queue, we can't allow doing so when the CAPTURE queue has buffers -+ * allocated. -+ */ -+ peer_vq = v4l2_m2m_get_vq(m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); -+ if (vb2_is_busy(peer_vq)) -+ return -EBUSY; -+ -+ ret = rkvdec_s_fmt(file, priv, f, rkvdec_try_output_fmt); -+ if (ret) -+ return ret; -+ -+ desc = rkvdec_find_coded_fmt_desc(f->fmt.pix_mp.pixelformat); -+ if (!desc) -+ return -EINVAL; -+ ctx->coded_fmt_desc = desc; -+ ctx->coded_fmt = *f; -+ -+ /* -+ * Current decoded format might have become invalid with newly -+ * selected codec, so reset it to default just to be safe and -+ * keep internal driver state sane. User is mandated to set -+ * the decoded format again after we return, so we don't need -+ * anything smarter. -+ * -+ * Note that this will propagates any size changes to the decoded format. -+ */ -+ rkvdec_reset_decoded_fmt(ctx); -+ -+ /* Propagate colorspace information to capture. */ -+ cap_fmt = &ctx->decoded_fmt; -+ cap_fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; -+ cap_fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; -+ cap_fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; -+ cap_fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; -+ -+ return 0; -+} -+ -+static int rkvdec_g_output_fmt(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ -+ *f = ctx->coded_fmt; -+ return 0; -+} -+ -+static int rkvdec_g_capture_fmt(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ -+ *f = ctx->decoded_fmt; -+ return 0; -+} -+ -+static int rkvdec_enum_output_fmt(struct file *file, void *priv, -+ struct v4l2_fmtdesc *f) -+{ -+ if (f->index >= ARRAY_SIZE(rkvdec_coded_fmts)) -+ return -EINVAL; -+ -+ f->pixelformat = rkvdec_coded_fmts[f->index].fourcc; -+ return 0; -+} -+ -+static int rkvdec_enum_capture_fmt(struct file *file, void *priv, -+ struct v4l2_fmtdesc *f) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); -+ -+ if (WARN_ON(!ctx->coded_fmt_desc)) -+ return -EINVAL; -+ -+ if (f->index >= ctx->coded_fmt_desc->num_decoded_fmts) -+ return -EINVAL; -+ -+ f->pixelformat = ctx->coded_fmt_desc->decoded_fmts[f->index]; -+ return 0; -+} -+ -+static const struct v4l2_ioctl_ops rkvdec_ioctl_ops = { -+ .vidioc_querycap = rkvdec_querycap, -+ .vidioc_enum_framesizes = rkvdec_enum_framesizes, -+ -+ .vidioc_try_fmt_vid_cap_mplane = rkvdec_try_capture_fmt, -+ .vidioc_try_fmt_vid_out_mplane = rkvdec_try_output_fmt, -+ .vidioc_s_fmt_vid_out_mplane = rkvdec_s_output_fmt, -+ .vidioc_s_fmt_vid_cap_mplane = rkvdec_s_capture_fmt, -+ .vidioc_g_fmt_vid_out_mplane = rkvdec_g_output_fmt, -+ .vidioc_g_fmt_vid_cap_mplane = rkvdec_g_capture_fmt, -+ .vidioc_enum_fmt_vid_out = rkvdec_enum_output_fmt, -+ .vidioc_enum_fmt_vid_cap = rkvdec_enum_capture_fmt, -+ -+ .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, -+ .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, -+ .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, -+ .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, -+ .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, -+ .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, -+ .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, -+ -+ .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, -+ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, -+ -+ .vidioc_streamon = v4l2_m2m_ioctl_streamon, -+ .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, -+}; -+ -+static int rkvdec_queue_setup(struct vb2_queue *vq, unsigned int *num_buffers, -+ unsigned int *num_planes, unsigned int sizes[], -+ struct device *alloc_devs[]) -+{ -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(vq); -+ struct v4l2_format *f; -+ unsigned int i; -+ -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) -+ f = &ctx->coded_fmt; -+ else -+ f = &ctx->decoded_fmt; -+ -+ if (*num_planes) { -+ if (*num_planes != f->fmt.pix_mp.num_planes) -+ return -EINVAL; -+ -+ for (i = 0; i < f->fmt.pix_mp.num_planes; i++) { -+ if (sizes[i] < f->fmt.pix_mp.plane_fmt[i].sizeimage) -+ return -EINVAL; -+ } -+ } else { -+ *num_planes = f->fmt.pix_mp.num_planes; -+ for (i = 0; i < f->fmt.pix_mp.num_planes; i++) -+ sizes[i] = f->fmt.pix_mp.plane_fmt[i].sizeimage; -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_buf_prepare(struct vb2_buffer *vb) -+{ -+ struct vb2_queue *vq = vb->vb2_queue; -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(vq); -+ struct v4l2_format *f; -+ unsigned int i; -+ -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) -+ f = &ctx->coded_fmt; -+ else -+ f = &ctx->decoded_fmt; -+ -+ for (i = 0; i < f->fmt.pix_mp.num_planes; ++i) { -+ u32 sizeimage = f->fmt.pix_mp.plane_fmt[i].sizeimage; -+ -+ if (vb2_plane_size(vb, i) < sizeimage) -+ return -EINVAL; -+ } -+ vb2_set_plane_payload(vb, 0, f->fmt.pix_mp.plane_fmt[0].sizeimage); -+ return 0; -+} -+ -+static void rkvdec_buf_queue(struct vb2_buffer *vb) -+{ -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); -+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); -+ -+ v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); -+} -+ -+static int rkvdec_buf_out_validate(struct vb2_buffer *vb) -+{ -+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); -+ -+ vbuf->field = V4L2_FIELD_NONE; -+ return 0; -+} -+ -+static void rkvdec_buf_request_complete(struct vb2_buffer *vb) -+{ -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); -+ -+ v4l2_ctrl_request_complete(vb->req_obj.req, &ctx->ctrl_hdl); -+} -+ -+static int rkvdec_start_streaming(struct vb2_queue *q, unsigned int count) -+{ -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(q); -+ const struct rkvdec_coded_fmt_desc *desc; -+ int ret; -+ -+ if (!V4L2_TYPE_IS_OUTPUT(q->type)) -+ return 0; -+ -+ desc = ctx->coded_fmt_desc; -+ if (WARN_ON(!desc)) -+ return -EINVAL; -+ -+ if (desc->ops->start) { -+ ret = desc->ops->start(ctx); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void rkvdec_queue_cleanup(struct vb2_queue *vq, u32 state) -+{ -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(vq); -+ -+ while (true) { -+ struct vb2_v4l2_buffer *vbuf; -+ -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) -+ vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); -+ else -+ vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); -+ -+ if (!vbuf) -+ break; -+ -+ v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, -+ &ctx->ctrl_hdl); -+ v4l2_m2m_buf_done(vbuf, state); -+ } -+} -+ -+static void rkvdec_stop_streaming(struct vb2_queue *q) -+{ -+ struct rkvdec_ctx *ctx = vb2_get_drv_priv(q); -+ -+ if (V4L2_TYPE_IS_OUTPUT(q->type)) { -+ const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc; -+ -+ if (WARN_ON(!desc)) -+ return; -+ -+ if (desc->ops->stop) -+ desc->ops->stop(ctx); -+ } -+ -+ rkvdec_queue_cleanup(q, VB2_BUF_STATE_ERROR); -+} -+ -+static const struct vb2_ops rkvdec_queue_ops = { -+ .queue_setup = rkvdec_queue_setup, -+ .buf_prepare = rkvdec_buf_prepare, -+ .buf_queue = rkvdec_buf_queue, -+ .buf_out_validate = rkvdec_buf_out_validate, -+ .buf_request_complete = rkvdec_buf_request_complete, -+ .start_streaming = rkvdec_start_streaming, -+ .stop_streaming = rkvdec_stop_streaming, -+ .wait_prepare = vb2_ops_wait_prepare, -+ .wait_finish = vb2_ops_wait_finish, -+}; -+ -+static int rkvdec_request_validate(struct media_request *req) -+{ -+ struct media_request_object *obj; -+ const struct rkvdec_ctrls *ctrls; -+ struct v4l2_ctrl_handler *hdl; -+ struct rkvdec_ctx *ctx = NULL; -+ unsigned int count, i; -+ int ret; -+ -+ list_for_each_entry(obj, &req->objects, list) { -+ if (vb2_request_object_is_buffer(obj)) { -+ struct vb2_buffer *vb; -+ -+ vb = container_of(obj, struct vb2_buffer, req_obj); -+ ctx = vb2_get_drv_priv(vb->vb2_queue); -+ break; -+ } -+ } -+ -+ if (!ctx) -+ return -EINVAL; -+ -+ count = vb2_request_buffer_cnt(req); -+ if (!count) -+ return -ENOENT; -+ else if (count > 1) -+ return -EINVAL; -+ -+ hdl = v4l2_ctrl_request_hdl_find(req, &ctx->ctrl_hdl); -+ if (!hdl) -+ return -ENOENT; -+ -+ ret = 0; -+ ctrls = ctx->coded_fmt_desc->ctrls; -+ for (i = 0; ctrls && i < ctrls->num_ctrls; i++) { -+ u32 id = ctrls->ctrls[i].cfg.id; -+ struct v4l2_ctrl *ctrl; -+ -+ if (!ctrls->ctrls[i].per_request || !ctrls->ctrls[i].mandatory) -+ continue; -+ -+ ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl, id); -+ if (!ctrl) { -+ ret = -ENOENT; -+ break; -+ } -+ } -+ -+ v4l2_ctrl_request_hdl_put(hdl); -+ -+ if (ret) -+ return ret; -+ -+ return vb2_request_validate(req); -+} -+ -+static const struct media_device_ops rkvdec_media_ops = { -+ .req_validate = rkvdec_request_validate, -+ .req_queue = v4l2_m2m_request_queue, -+}; -+ -+static void rkvdec_job_finish_no_pm(struct rkvdec_ctx *ctx, -+ enum vb2_buffer_state result) -+{ -+ if (ctx->coded_fmt_desc->ops->done) { -+ struct vb2_v4l2_buffer *src_buf, *dst_buf; -+ -+ src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); -+ dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); -+ ctx->coded_fmt_desc->ops->done(ctx, src_buf, dst_buf, result); -+ } -+ -+ v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, -+ result); -+} -+ -+static void rkvdec_job_finish(struct rkvdec_ctx *ctx, -+ enum vb2_buffer_state result) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ pm_runtime_mark_last_busy(rkvdec->dev); -+ pm_runtime_put_autosuspend(rkvdec->dev); -+ rkvdec_job_finish_no_pm(ctx, result); -+} -+ -+void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) -+{ -+ struct media_request *src_req; -+ -+ memset(run, 0, sizeof(*run)); -+ -+ run->bufs.src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); -+ run->bufs.dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); -+ -+ /* Apply request(s) controls if needed. */ -+ src_req = run->bufs.src->vb2_buf.req_obj.req; -+ if (src_req) -+ v4l2_ctrl_request_setup(src_req, &ctx->ctrl_hdl); -+ -+ v4l2_m2m_buf_copy_metadata(run->bufs.src, run->bufs.dst, true); -+} -+ -+void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) -+{ -+ struct media_request *src_req = run->bufs.src->vb2_buf.req_obj.req; -+ -+ if (src_req) -+ v4l2_ctrl_request_complete(src_req, &ctx->ctrl_hdl); -+} -+ -+static void rkvdec_device_run(void *priv) -+{ -+ struct rkvdec_ctx *ctx = priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc; -+ int ret; -+ -+ if (WARN_ON(!desc)) -+ return; -+ -+ ret = pm_runtime_get_sync(rkvdec->dev); -+ if (ret < 0) { -+ rkvdec_job_finish_no_pm(ctx, VB2_BUF_STATE_ERROR); -+ return; -+ } -+ -+ ret = desc->ops->run(ctx); -+ if (ret) -+ rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR); -+} -+ -+static struct v4l2_m2m_ops rkvdec_m2m_ops = { -+ .device_run = rkvdec_device_run, -+}; -+ -+static int rkvdec_queue_init(void *priv, -+ struct vb2_queue *src_vq, -+ struct vb2_queue *dst_vq) -+{ -+ struct rkvdec_ctx *ctx = priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ int ret; -+ -+ src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; -+ src_vq->io_modes = VB2_MMAP | VB2_DMABUF; -+ src_vq->drv_priv = ctx; -+ src_vq->ops = &rkvdec_queue_ops; -+ src_vq->mem_ops = &vb2_dma_contig_memops; -+ -+ /* -+ * Driver does mostly sequential access, so sacrifice TLB efficiency -+ * for faster allocation. Also, no CPU access on the source queue, -+ * so no kernel mapping needed. -+ */ -+ src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | -+ DMA_ATTR_NO_KERNEL_MAPPING; -+ src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); -+ src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; -+ src_vq->lock = &rkvdec->vdev_lock; -+ src_vq->dev = rkvdec->v4l2_dev.dev; -+ src_vq->supports_requests = true; -+ src_vq->requires_requests = true; -+ -+ ret = vb2_queue_init(src_vq); -+ if (ret) -+ return ret; -+ -+ dst_vq->bidirectional = true; -+ dst_vq->mem_ops = &vb2_dma_contig_memops; -+ dst_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | -+ DMA_ATTR_NO_KERNEL_MAPPING; -+ dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; -+ dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; -+ dst_vq->drv_priv = ctx; -+ dst_vq->ops = &rkvdec_queue_ops; -+ dst_vq->buf_struct_size = sizeof(struct rkvdec_decoded_buffer); -+ dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; -+ dst_vq->lock = &rkvdec->vdev_lock; -+ dst_vq->dev = rkvdec->v4l2_dev.dev; -+ -+ return vb2_queue_init(dst_vq); -+} -+ -+static int rkvdec_add_ctrls(struct rkvdec_ctx *ctx, -+ const struct rkvdec_ctrls *ctrls) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ctrls->num_ctrls; i++) { -+ const struct v4l2_ctrl_config *cfg = &ctrls->ctrls[i].cfg; -+ -+ v4l2_ctrl_new_custom(&ctx->ctrl_hdl, cfg, ctx); -+ if (ctx->ctrl_hdl.error) -+ return ctx->ctrl_hdl.error; -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx) -+{ -+ unsigned int i, nctrls = 0; -+ int ret; -+ -+ for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) -+ nctrls += rkvdec_coded_fmts[i].ctrls->num_ctrls; -+ -+ v4l2_ctrl_handler_init(&ctx->ctrl_hdl, nctrls); -+ -+ for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { -+ ret = rkvdec_add_ctrls(ctx, rkvdec_coded_fmts[i].ctrls); -+ if (ret) -+ goto err_free_handler; -+ } -+ -+ ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl); -+ if (ret) -+ goto err_free_handler; -+ -+ ctx->fh.ctrl_handler = &ctx->ctrl_hdl; -+ return 0; -+ -+err_free_handler: -+ v4l2_ctrl_handler_free(&ctx->ctrl_hdl); -+ return ret; -+} -+ -+static int rkvdec_open(struct file *filp) -+{ -+ struct rkvdec_dev *rkvdec = video_drvdata(filp); -+ struct rkvdec_ctx *ctx; -+ int ret; -+ -+ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); -+ if (!ctx) -+ return -ENOMEM; -+ -+ ctx->dev = rkvdec; -+ rkvdec_reset_coded_fmt(ctx); -+ rkvdec_reset_decoded_fmt(ctx); -+ v4l2_fh_init(&ctx->fh, video_devdata(filp)); -+ -+ ret = rkvdec_init_ctrls(ctx); -+ if (ret) -+ goto err_free_ctx; -+ -+ ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(rkvdec->m2m_dev, ctx, -+ rkvdec_queue_init); -+ if (IS_ERR(ctx->fh.m2m_ctx)) { -+ ret = PTR_ERR(ctx->fh.m2m_ctx); -+ goto err_cleanup_ctrls; -+ } -+ -+ filp->private_data = &ctx->fh; -+ v4l2_fh_add(&ctx->fh); -+ -+ return 0; -+ -+err_cleanup_ctrls: -+ v4l2_ctrl_handler_free(&ctx->ctrl_hdl); -+ -+err_free_ctx: -+ kfree(ctx); -+ return ret; -+} -+ -+static int rkvdec_release(struct file *filp) -+{ -+ struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(filp->private_data); -+ -+ v4l2_fh_del(&ctx->fh); -+ v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); -+ v4l2_ctrl_handler_free(&ctx->ctrl_hdl); -+ v4l2_fh_exit(&ctx->fh); -+ kfree(ctx); -+ -+ return 0; -+} -+ -+static const struct v4l2_file_operations rkvdec_fops = { -+ .owner = THIS_MODULE, -+ .open = rkvdec_open, -+ .release = rkvdec_release, -+ .poll = v4l2_m2m_fop_poll, -+ .unlocked_ioctl = video_ioctl2, -+ .mmap = v4l2_m2m_fop_mmap, -+}; -+ -+static int rkvdec_v4l2_init(struct rkvdec_dev *rkvdec) -+{ -+ int ret; -+ -+ ret = v4l2_device_register(rkvdec->dev, &rkvdec->v4l2_dev); -+ if (ret) { -+ dev_err(rkvdec->dev, "Failed to register V4L2 device\n"); -+ return ret; -+ } -+ -+ rkvdec->m2m_dev = v4l2_m2m_init(&rkvdec_m2m_ops); -+ if (IS_ERR(rkvdec->m2m_dev)) { -+ v4l2_err(&rkvdec->v4l2_dev, "Failed to init mem2mem device\n"); -+ ret = PTR_ERR(rkvdec->m2m_dev); -+ goto err_unregister_v4l2; -+ } -+ -+ rkvdec->mdev.dev = rkvdec->dev; -+ strscpy(rkvdec->mdev.model, "rkvdec", sizeof(rkvdec->mdev.model)); -+ strscpy(rkvdec->mdev.bus_info, "platform:rkvdec", -+ sizeof(rkvdec->mdev.bus_info)); -+ media_device_init(&rkvdec->mdev); -+ rkvdec->mdev.ops = &rkvdec_media_ops; -+ rkvdec->v4l2_dev.mdev = &rkvdec->mdev; -+ -+ rkvdec->vdev.lock = &rkvdec->vdev_lock; -+ rkvdec->vdev.v4l2_dev = &rkvdec->v4l2_dev; -+ rkvdec->vdev.fops = &rkvdec_fops; -+ rkvdec->vdev.release = video_device_release_empty; -+ rkvdec->vdev.vfl_dir = VFL_DIR_M2M; -+ rkvdec->vdev.device_caps = V4L2_CAP_STREAMING | -+ V4L2_CAP_VIDEO_M2M_MPLANE; -+ rkvdec->vdev.ioctl_ops = &rkvdec_ioctl_ops; -+ video_set_drvdata(&rkvdec->vdev, rkvdec); -+ strscpy(rkvdec->vdev.name, "rkvdec", sizeof(rkvdec->vdev.name)); -+ -+ ret = video_register_device(&rkvdec->vdev, VFL_TYPE_VIDEO, -1); -+ if (ret) { -+ v4l2_err(&rkvdec->v4l2_dev, "Failed to register video device\n"); -+ goto err_cleanup_mc; -+ } -+ -+ ret = v4l2_m2m_register_media_controller(rkvdec->m2m_dev, &rkvdec->vdev, -+ MEDIA_ENT_F_PROC_VIDEO_DECODER); -+ if (ret) { -+ v4l2_err(&rkvdec->v4l2_dev, -+ "Failed to initialize V4L2 M2M media controller\n"); -+ goto err_unregister_vdev; -+ } -+ -+ ret = media_device_register(&rkvdec->mdev); -+ if (ret) { -+ v4l2_err(&rkvdec->v4l2_dev, "Failed to register media device\n"); -+ goto err_unregister_mc; -+ } -+ -+ return 0; -+ -+err_unregister_mc: -+ v4l2_m2m_unregister_media_controller(rkvdec->m2m_dev); -+ -+err_unregister_vdev: -+ video_unregister_device(&rkvdec->vdev); -+ -+err_cleanup_mc: -+ media_device_cleanup(&rkvdec->mdev); -+ v4l2_m2m_release(rkvdec->m2m_dev); -+ -+err_unregister_v4l2: -+ v4l2_device_unregister(&rkvdec->v4l2_dev); -+ return ret; -+} -+ -+static void rkvdec_v4l2_cleanup(struct rkvdec_dev *rkvdec) -+{ -+ media_device_unregister(&rkvdec->mdev); -+ v4l2_m2m_unregister_media_controller(rkvdec->m2m_dev); -+ video_unregister_device(&rkvdec->vdev); -+ media_device_cleanup(&rkvdec->mdev); -+ v4l2_m2m_release(rkvdec->m2m_dev); -+ v4l2_device_unregister(&rkvdec->v4l2_dev); -+} -+ -+static irqreturn_t rkvdec_irq_handler(int irq, void *priv) -+{ -+ struct rkvdec_dev *rkvdec = priv; -+ enum vb2_buffer_state state; -+ u32 status; -+ -+ status = readl(rkvdec->regs + RKVDEC_REG_INTERRUPT); -+ state = (status & RKVDEC_RDY_STA) ? -+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; -+ -+ writel(0, rkvdec->regs + RKVDEC_REG_INTERRUPT); -+ if (cancel_delayed_work(&rkvdec->watchdog_work)) { -+ struct rkvdec_ctx *ctx; -+ -+ ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); -+ rkvdec_job_finish(ctx, state); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static void rkvdec_watchdog_func(struct work_struct *work) -+{ -+ struct rkvdec_dev *rkvdec; -+ struct rkvdec_ctx *ctx; -+ -+ rkvdec = container_of(to_delayed_work(work), struct rkvdec_dev, -+ watchdog_work); -+ ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); -+ if (ctx) { -+ dev_err(rkvdec->dev, "Frame processing timed out!\n"); -+ writel(RKVDEC_IRQ_DIS, rkvdec->regs + RKVDEC_REG_INTERRUPT); -+ writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL); -+ rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR); -+ } -+} -+ -+static const struct of_device_id of_rkvdec_match[] = { -+ { .compatible = "rockchip,rk3399-vdec" }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, of_rkvdec_match); -+ -+static const char * const rkvdec_clk_names[] = { -+ "axi", "ahb", "cabac", "core" -+}; -+ -+static int rkvdec_probe(struct platform_device *pdev) -+{ -+ struct rkvdec_dev *rkvdec; -+ struct resource *res; -+ unsigned int i; -+ int ret, irq; -+ -+ rkvdec = devm_kzalloc(&pdev->dev, sizeof(*rkvdec), GFP_KERNEL); -+ if (!rkvdec) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, rkvdec); -+ rkvdec->dev = &pdev->dev; -+ mutex_init(&rkvdec->vdev_lock); -+ INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func); -+ -+ rkvdec->clocks = devm_kcalloc(&pdev->dev, ARRAY_SIZE(rkvdec_clk_names), -+ sizeof(*rkvdec->clocks), GFP_KERNEL); -+ if (!rkvdec->clocks) -+ return -ENOMEM; -+ -+ for (i = 0; i < ARRAY_SIZE(rkvdec_clk_names); i++) -+ rkvdec->clocks[i].id = rkvdec_clk_names[i]; -+ -+ ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(rkvdec_clk_names), -+ rkvdec->clocks); -+ if (ret) -+ return ret; -+ -+ /* -+ * Bump ACLK to max. possible freq. (500 MHz) to improve performance -+ * When 4k video playback. -+ */ -+ clk_set_rate(rkvdec->clocks[0].clk, 500 * 1000 * 1000); -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ rkvdec->regs = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(rkvdec->regs)) -+ return PTR_ERR(rkvdec->regs); -+ -+ ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); -+ if (ret) { -+ dev_err(&pdev->dev, "Could not set DMA coherent mask.\n"); -+ return ret; -+ } -+ -+ vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq <= 0) { -+ dev_err(&pdev->dev, "Could not get vdec IRQ\n"); -+ return -ENXIO; -+ } -+ -+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, -+ rkvdec_irq_handler, IRQF_ONESHOT, -+ dev_name(&pdev->dev), rkvdec); -+ if (ret) { -+ dev_err(&pdev->dev, "Could not request vdec IRQ\n"); -+ return ret; -+ } -+ -+ pm_runtime_set_autosuspend_delay(&pdev->dev, 100); -+ pm_runtime_use_autosuspend(&pdev->dev); -+ pm_runtime_enable(&pdev->dev); -+ -+ ret = rkvdec_v4l2_init(rkvdec); -+ if (ret) -+ goto err_disable_runtime_pm; -+ -+ return 0; -+ -+err_disable_runtime_pm: -+ pm_runtime_dont_use_autosuspend(&pdev->dev); -+ pm_runtime_disable(&pdev->dev); -+ return ret; -+} -+ -+static int rkvdec_remove(struct platform_device *pdev) -+{ -+ struct rkvdec_dev *rkvdec = platform_get_drvdata(pdev); -+ -+ rkvdec_v4l2_cleanup(rkvdec); -+ pm_runtime_disable(&pdev->dev); -+ pm_runtime_dont_use_autosuspend(&pdev->dev); -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int rkvdec_runtime_resume(struct device *dev) -+{ -+ struct rkvdec_dev *rkvdec = dev_get_drvdata(dev); -+ -+ return clk_bulk_prepare_enable(ARRAY_SIZE(rkvdec_clk_names), -+ rkvdec->clocks); -+} -+ -+static int rkvdec_runtime_suspend(struct device *dev) -+{ -+ struct rkvdec_dev *rkvdec = dev_get_drvdata(dev); -+ -+ clk_bulk_disable_unprepare(ARRAY_SIZE(rkvdec_clk_names), -+ rkvdec->clocks); -+ return 0; -+} -+#endif -+ -+static const struct dev_pm_ops rkvdec_pm_ops = { -+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, -+ pm_runtime_force_resume) -+ SET_RUNTIME_PM_OPS(rkvdec_runtime_suspend, rkvdec_runtime_resume, NULL) -+}; -+ -+static struct platform_driver rkvdec_driver = { -+ .probe = rkvdec_probe, -+ .remove = rkvdec_remove, -+ .driver = { -+ .name = "rkvdec", -+ .of_match_table = of_match_ptr(of_rkvdec_match), -+ .pm = &rkvdec_pm_ops, -+ }, -+}; -+module_platform_driver(rkvdec_driver); -+ -+MODULE_AUTHOR("Boris Brezillon "); -+MODULE_DESCRIPTION("Rockchip Video Decoder driver"); -+MODULE_LICENSE("GPL v2"); -diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -new file mode 100644 -index 000000000000..2fc9f46b6910 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/rkvdec.h -@@ -0,0 +1,121 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Rockchip Video Decoder driver -+ * -+ * Copyright (C) 2019 Collabora, Ltd. -+ * -+ * Based on rkvdec driver by Google LLC. (Tomasz Figa ) -+ * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. -+ * Copyright (C) 2011 Samsung Electronics Co., Ltd. -+ */ -+#ifndef RKVDEC_H_ -+#define RKVDEC_H_ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+struct rkvdec_ctx; -+ -+struct rkvdec_ctrl_desc { -+ u32 per_request : 1; -+ u32 mandatory : 1; -+ struct v4l2_ctrl_config cfg; -+}; -+ -+struct rkvdec_ctrls { -+ const struct rkvdec_ctrl_desc *ctrls; -+ unsigned int num_ctrls; -+}; -+ -+struct rkvdec_run { -+ struct { -+ struct vb2_v4l2_buffer *src; -+ struct vb2_v4l2_buffer *dst; -+ } bufs; -+}; -+ -+struct rkvdec_vp9_decoded_buffer_info { -+ /* Info needed when the decoded frame serves as a reference frame. */ -+ u16 width; -+ u16 height; -+ u32 bit_depth : 4; -+}; -+ -+struct rkvdec_decoded_buffer { -+ /* Must be the first field in this struct. */ -+ struct v4l2_m2m_buffer base; -+}; -+ -+static inline struct rkvdec_decoded_buffer * -+vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf) -+{ -+ return container_of(buf, struct rkvdec_decoded_buffer, -+ base.vb.vb2_buf); -+} -+ -+struct rkvdec_coded_fmt_ops { -+ int (*adjust_fmt)(struct rkvdec_ctx *ctx, -+ struct v4l2_format *f); -+ int (*start)(struct rkvdec_ctx *ctx); -+ void (*stop)(struct rkvdec_ctx *ctx); -+ int (*run)(struct rkvdec_ctx *ctx); -+ void (*done)(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *src_buf, -+ struct vb2_v4l2_buffer *dst_buf, -+ enum vb2_buffer_state result); -+}; -+ -+struct rkvdec_coded_fmt_desc { -+ u32 fourcc; -+ struct v4l2_frmsize_stepwise frmsize; -+ const struct rkvdec_ctrls *ctrls; -+ const struct rkvdec_coded_fmt_ops *ops; -+ unsigned int num_decoded_fmts; -+ const u32 *decoded_fmts; -+}; -+ -+struct rkvdec_dev { -+ struct v4l2_device v4l2_dev; -+ struct media_device mdev; -+ struct video_device vdev; -+ struct v4l2_m2m_dev *m2m_dev; -+ struct device *dev; -+ struct clk_bulk_data *clocks; -+ void __iomem *regs; -+ struct mutex vdev_lock; /* serializes ioctls */ -+ struct delayed_work watchdog_work; -+}; -+ -+struct rkvdec_ctx { -+ struct v4l2_fh fh; -+ struct v4l2_format coded_fmt; -+ struct v4l2_format decoded_fmt; -+ const struct rkvdec_coded_fmt_desc *coded_fmt_desc; -+ struct v4l2_ctrl_handler ctrl_hdl; -+ struct rkvdec_dev *dev; -+ void *priv; -+}; -+ -+static inline struct rkvdec_ctx *fh_to_rkvdec_ctx(struct v4l2_fh *fh) -+{ -+ return container_of(fh, struct rkvdec_ctx, fh); -+} -+ -+struct rkvdec_aux_buf { -+ void *cpu; -+ dma_addr_t dma; -+ size_t size; -+}; -+ -+void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); -+void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); -+ -+extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; -+#endif /* RKVDEC_H_ */ - -From 663f227c908199937a37cea794b3387725dc953b Mon Sep 17 00:00:00 2001 -From: Hans Verkuil -Date: Tue, 3 Mar 2020 12:02:00 +0100 -Subject: [PATCH] media: v4l2-ctrls: add __v4l2_ctrl_s_ctrl_compound() - -Rather than creating new compound control helpers for each new -type, create one generic function and just create defines on -top. - -Signed-off-by: Hans Verkuil -Tested-by: Paul Kocialkowski -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit b2b1046f1de6263e6281d46fd376ee048f09d013) ---- - drivers/media/v4l2-core/v4l2-ctrls.c | 10 ++++---- - include/media/v4l2-ctrls.h | 49 +++++++++++++++++++++--------------- - 2 files changed, 34 insertions(+), 25 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 77b0132d9f6f..1c617b42a944 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -4253,18 +4253,18 @@ int __v4l2_ctrl_s_ctrl_string(struct v4l2_ctrl *ctrl, const char *s) - } - EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_string); - --int __v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, -- const struct v4l2_area *area) -+int __v4l2_ctrl_s_ctrl_compound(struct v4l2_ctrl *ctrl, -+ enum v4l2_ctrl_type type, const void *p) - { - lockdep_assert_held(ctrl->handler->lock); - - /* It's a driver bug if this happens. */ -- if (WARN_ON(ctrl->type != V4L2_CTRL_TYPE_AREA)) -+ if (WARN_ON(ctrl->type != type)) - return -EINVAL; -- *ctrl->p_new.p_area = *area; -+ memcpy(ctrl->p_new.p, p, ctrl->elems * ctrl->elem_size); - return set_ctrl(NULL, ctrl, 0); - } --EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_area); -+EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_compound); - - void v4l2_ctrl_request_complete(struct media_request *req, - struct v4l2_ctrl_handler *main_hdl) -diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h -index 7db9e719a583..75a8daacb4c4 100644 ---- a/include/media/v4l2-ctrls.h -+++ b/include/media/v4l2-ctrls.h -@@ -1113,45 +1113,54 @@ static inline int v4l2_ctrl_s_ctrl_string(struct v4l2_ctrl *ctrl, const char *s) - } - - /** -- * __v4l2_ctrl_s_ctrl_area() - Unlocked variant of v4l2_ctrl_s_ctrl_area(). -+ * __v4l2_ctrl_s_ctrl_compound() - Unlocked variant to set a compound control - * -- * @ctrl: The control. -- * @area: The new area. -+ * @ctrl: The control. -+ * @type: The type of the data. -+ * @p: The new compound payload. - * -- * This sets the control's new area safely by going through the control -- * framework. This function assumes the control's handler is already locked, -- * allowing it to be used from within the &v4l2_ctrl_ops functions. -+ * This sets the control's new compound payload safely by going through the -+ * control framework. This function assumes the control's handler is already -+ * locked, allowing it to be used from within the &v4l2_ctrl_ops functions. - * -- * This function is for area type controls only. -+ * This function is for compound type controls only. - */ --int __v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, -- const struct v4l2_area *area); -+int __v4l2_ctrl_s_ctrl_compound(struct v4l2_ctrl *ctrl, -+ enum v4l2_ctrl_type type, const void *p); - - /** -- * v4l2_ctrl_s_ctrl_area() - Helper function to set a control's area value -- * from within a driver. -+ * v4l2_ctrl_s_ctrl_compound() - Helper function to set a compound control -+ * from within a driver. - * -- * @ctrl: The control. -- * @area: The new area. -+ * @ctrl: The control. -+ * @type: The type of the data. -+ * @p: The new compound payload. - * -- * This sets the control's new area safely by going through the control -- * framework. This function will lock the control's handler, so it cannot be -- * used from within the &v4l2_ctrl_ops functions. -+ * This sets the control's new compound payload safely by going through the -+ * control framework. This function will lock the control's handler, so it -+ * cannot be used from within the &v4l2_ctrl_ops functions. - * -- * This function is for area type controls only. -+ * This function is for compound type controls only. - */ --static inline int v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, -- const struct v4l2_area *area) -+static inline int v4l2_ctrl_s_ctrl_compound(struct v4l2_ctrl *ctrl, -+ enum v4l2_ctrl_type type, -+ const void *p) - { - int rval; - - v4l2_ctrl_lock(ctrl); -- rval = __v4l2_ctrl_s_ctrl_area(ctrl, area); -+ rval = __v4l2_ctrl_s_ctrl_compound(ctrl, type, p); - v4l2_ctrl_unlock(ctrl); - - return rval; - } - -+/* Helper defines for area type controls */ -+#define __v4l2_ctrl_s_ctrl_area(ctrl, area) \ -+ __v4l2_ctrl_s_ctrl_compound((ctrl), V4L2_CTRL_TYPE_AREA, (area)) -+#define v4l2_ctrl_s_ctrl_area(ctrl, area) \ -+ v4l2_ctrl_s_ctrl_compound((ctrl), V4L2_CTRL_TYPE_AREA, (area)) -+ - /* Internal helper functions that deal with control events. */ - extern const struct v4l2_subscribed_event_ops v4l2_ctrl_sub_ev_ops; - - -From 8e8bc31ca973c638d5dca39cb9f6ac2bb86e355e Mon Sep 17 00:00:00 2001 -From: Jacopo Mondi -Date: Thu, 7 May 2020 17:12:50 +0200 -Subject: [PATCH] media: v4l2-dev: Add v4l2_device_register_ro_subdev_node() - -Add to the V4L2 core a function to register device nodes for video -subdevices in read-only mode. - -Registering a device node in read-only mode is useful to expose to -userspace the current sub-device configuration, without allowing -application to change it by using the V4L2 subdevice ioctls. - -Acked-by: Sakari Ailus -Signed-off-by: Jacopo Mondi -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit f75c431e54e2e43c91fe267097b974ff2e5dc668) ---- - drivers/media/v4l2-core/v4l2-device.c | 7 +++-- - drivers/media/v4l2-core/v4l2-subdev.c | 19 +++++++++++++ - include/media/v4l2-dev.h | 7 +++++ - include/media/v4l2-device.h | 50 ++++++++++++++++++++++++++++++++--- - 4 files changed, 77 insertions(+), 6 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-device.c b/drivers/media/v4l2-core/v4l2-device.c -index c69941214bb2..de4287251a89 100644 ---- a/drivers/media/v4l2-core/v4l2-device.c -+++ b/drivers/media/v4l2-core/v4l2-device.c -@@ -186,7 +186,8 @@ static void v4l2_device_release_subdev_node(struct video_device *vdev) - kfree(vdev); - } - --int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) -+int __v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev, -+ bool read_only) - { - struct video_device *vdev; - struct v4l2_subdev *sd; -@@ -215,6 +216,8 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) - vdev->fops = &v4l2_subdev_fops; - vdev->release = v4l2_device_release_subdev_node; - vdev->ctrl_handler = sd->ctrl_handler; -+ if (read_only) -+ set_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); - err = __video_register_device(vdev, VFL_TYPE_SUBDEV, -1, 1, - sd->owner); - if (err < 0) { -@@ -252,7 +255,7 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) - - return err; - } --EXPORT_SYMBOL_GPL(v4l2_device_register_subdev_nodes); -+EXPORT_SYMBOL_GPL(__v4l2_device_register_subdev_nodes); - - void v4l2_device_unregister_subdev(struct v4l2_subdev *sd) - { -diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c -index a376b351135f..1dc263c2ca0a 100644 ---- a/drivers/media/v4l2-core/v4l2-subdev.c -+++ b/drivers/media/v4l2-core/v4l2-subdev.c -@@ -331,6 +331,7 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - struct v4l2_fh *vfh = file->private_data; - #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) - struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh); -+ bool ro_subdev = test_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); - #endif - int rval; - -@@ -477,6 +478,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - case VIDIOC_SUBDEV_S_FMT: { - struct v4l2_subdev_format *format = arg; - -+ if (format->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) -+ return -EPERM; -+ - memset(format->reserved, 0, sizeof(format->reserved)); - memset(format->format.reserved, 0, sizeof(format->format.reserved)); - return v4l2_subdev_call(sd, pad, set_fmt, subdev_fh->pad, format); -@@ -504,6 +508,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - struct v4l2_subdev_crop *crop = arg; - struct v4l2_subdev_selection sel; - -+ if (crop->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) -+ return -EPERM; -+ - memset(crop->reserved, 0, sizeof(crop->reserved)); - memset(&sel, 0, sizeof(sel)); - sel.which = crop->which; -@@ -545,6 +552,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - case VIDIOC_SUBDEV_S_FRAME_INTERVAL: { - struct v4l2_subdev_frame_interval *fi = arg; - -+ if (ro_subdev) -+ return -EPERM; -+ - memset(fi->reserved, 0, sizeof(fi->reserved)); - return v4l2_subdev_call(sd, video, s_frame_interval, arg); - } -@@ -568,6 +578,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - case VIDIOC_SUBDEV_S_SELECTION: { - struct v4l2_subdev_selection *sel = arg; - -+ if (sel->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) -+ return -EPERM; -+ - memset(sel->reserved, 0, sizeof(sel->reserved)); - return v4l2_subdev_call( - sd, pad, set_selection, subdev_fh->pad, sel); -@@ -604,6 +617,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - return v4l2_subdev_call(sd, video, g_dv_timings, arg); - - case VIDIOC_SUBDEV_S_DV_TIMINGS: -+ if (ro_subdev) -+ return -EPERM; -+ - return v4l2_subdev_call(sd, video, s_dv_timings, arg); - - case VIDIOC_SUBDEV_G_STD: -@@ -612,6 +628,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) - case VIDIOC_SUBDEV_S_STD: { - v4l2_std_id *std = arg; - -+ if (ro_subdev) -+ return -EPERM; -+ - return v4l2_subdev_call(sd, video, s_std, *std); - } - -diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h -index 4602c15ff878..ad2d41952442 100644 ---- a/include/media/v4l2-dev.h -+++ b/include/media/v4l2-dev.h -@@ -82,11 +82,18 @@ struct v4l2_ctrl_handler; - * but the old crop API will still work as expected in order to preserve - * backwards compatibility. - * Never set this flag for new drivers. -+ * @V4L2_FL_SUBDEV_RO_DEVNODE: -+ * indicates that the video device node is registered in read-only mode. -+ * The flag only applies to device nodes registered for sub-devices, it is -+ * set by the core when the sub-devices device nodes are registered with -+ * v4l2_device_register_ro_subdev_nodes() and used by the sub-device ioctl -+ * handler to restrict access to some ioctl calls. - */ - enum v4l2_video_device_flags { - V4L2_FL_REGISTERED = 0, - V4L2_FL_USES_V4L2_FH = 1, - V4L2_FL_QUIRK_INVERTED_CROP = 2, -+ V4L2_FL_SUBDEV_RO_DEVNODE = 3, - }; - - /* Priority helper functions */ -diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h -index 7c912b7d2870..64ec4de948e9 100644 ---- a/include/media/v4l2-device.h -+++ b/include/media/v4l2-device.h -@@ -174,14 +174,56 @@ int __must_check v4l2_device_register_subdev(struct v4l2_device *v4l2_dev, - void v4l2_device_unregister_subdev(struct v4l2_subdev *sd); - - /** -- * v4l2_device_register_subdev_nodes - Registers device nodes for all subdevs -- * of the v4l2 device that are marked with -- * the %V4L2_SUBDEV_FL_HAS_DEVNODE flag. -+ * __v4l2_device_register_ro_subdev_nodes - Registers device nodes for -+ * all subdevs of the v4l2 device that are marked with the -+ * %V4L2_SUBDEV_FL_HAS_DEVNODE flag. - * - * @v4l2_dev: pointer to struct v4l2_device -+ * @read_only: subdevices read-only flag. True to register the subdevices -+ * device nodes in read-only mode, false to allow full access to the -+ * subdevice userspace API. - */ - int __must_check --v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev); -+__v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev, -+ bool read_only); -+ -+/** -+ * v4l2_device_register_subdev_nodes - Registers subdevices device nodes with -+ * unrestricted access to the subdevice userspace operations -+ * -+ * Internally calls __v4l2_device_register_subdev_nodes(). See its documentation -+ * for more details. -+ * -+ * @v4l2_dev: pointer to struct v4l2_device -+ */ -+static inline int __must_check -+v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) -+{ -+#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) -+ return __v4l2_device_register_subdev_nodes(v4l2_dev, false); -+#else -+ return 0; -+#endif -+} -+ -+/** -+ * v4l2_device_register_ro_subdev_nodes - Registers subdevices device nodes -+ * in read-only mode -+ * -+ * Internally calls __v4l2_device_register_subdev_nodes(). See its documentation -+ * for more details. -+ * -+ * @v4l2_dev: pointer to struct v4l2_device -+ */ -+static inline int __must_check -+v4l2_device_register_ro_subdev_nodes(struct v4l2_device *v4l2_dev) -+{ -+#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) -+ return __v4l2_device_register_subdev_nodes(v4l2_dev, true); -+#else -+ return 0; -+#endif -+} - - /** - * v4l2_subdev_notify - Sends a notification to v4l2_device. - -From c5a7a6073492bc86823e9078f978ce2d91dde923 Mon Sep 17 00:00:00 2001 -From: Jacopo Mondi -Date: Sat, 9 May 2020 11:04:48 +0200 -Subject: [PATCH] media: v4l2-ctrls: Add camera orientation and rotation - -Add support for the newly defined V4L2_CID_CAMERA_ORIENTATION -and V4L2_CID_CAMERA_SENSOR_ROTATION read-only controls used to report -the camera device mounting position and orientation respectively. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jacopo Mondi -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 926645d43fd43622a2b056471a2cf41cc19cbf4c) ---- - drivers/media/v4l2-core/v4l2-ctrls.c | 13 +++++++++++++ - include/uapi/linux/v4l2-controls.h | 7 +++++++ - 2 files changed, 20 insertions(+) - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 1c617b42a944..92c3e39efc28 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -583,6 +583,12 @@ const char * const *v4l2_ctrl_get_menu(u32 id) - "Annex B Start Code", - NULL, - }; -+ static const char * const camera_orientation[] = { -+ "Front", -+ "Back", -+ "External", -+ NULL, -+ }; - - switch (id) { - case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: -@@ -708,6 +714,8 @@ const char * const *v4l2_ctrl_get_menu(u32 id) - return hevc_decode_mode; - case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: - return hevc_start_code; -+ case V4L2_CID_CAMERA_ORIENTATION: -+ return camera_orientation; - default: - return NULL; - } -@@ -1020,6 +1028,8 @@ const char *v4l2_ctrl_get_name(u32 id) - case V4L2_CID_PAN_SPEED: return "Pan, Speed"; - case V4L2_CID_TILT_SPEED: return "Tilt, Speed"; - case V4L2_CID_UNIT_CELL_SIZE: return "Unit Cell Size"; -+ case V4L2_CID_CAMERA_ORIENTATION: return "Camera Orientation"; -+ case V4L2_CID_CAMERA_SENSOR_ROTATION: return "Camera Sensor Rotation"; - - /* FM Radio Modulator controls */ - /* Keep the order of the 'case's the same as in v4l2-controls.h! */ -@@ -1293,6 +1303,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, - case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: - case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: - case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: -+ case V4L2_CID_CAMERA_ORIENTATION: - *type = V4L2_CTRL_TYPE_MENU; - break; - case V4L2_CID_LINK_FREQ: -@@ -1482,6 +1493,8 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, - case V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT: - case V4L2_CID_RDS_RX_TRAFFIC_PROGRAM: - case V4L2_CID_RDS_RX_MUSIC_SPEECH: -+ case V4L2_CID_CAMERA_ORIENTATION: -+ case V4L2_CID_CAMERA_SENSOR_ROTATION: - *flags |= V4L2_CTRL_FLAG_READ_ONLY; - break; - case V4L2_CID_RF_TUNER_PLL_LOCK: -diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h -index 0ba1005c9651..62271418c1be 100644 ---- a/include/uapi/linux/v4l2-controls.h -+++ b/include/uapi/linux/v4l2-controls.h -@@ -923,6 +923,13 @@ enum v4l2_auto_focus_range { - #define V4L2_CID_PAN_SPEED (V4L2_CID_CAMERA_CLASS_BASE+32) - #define V4L2_CID_TILT_SPEED (V4L2_CID_CAMERA_CLASS_BASE+33) - -+#define V4L2_CID_CAMERA_ORIENTATION (V4L2_CID_CAMERA_CLASS_BASE+34) -+#define V4L2_CAMERA_ORIENTATION_FRONT 0 -+#define V4L2_CAMERA_ORIENTATION_BACK 1 -+#define V4L2_CAMERA_ORIENTATION_EXTERNAL 2 -+ -+#define V4L2_CID_CAMERA_SENSOR_ROTATION (V4L2_CID_CAMERA_CLASS_BASE+35) -+ - /* FM Modulator class control IDs */ - - #define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900) - -From b3c5ddc2e3fed3ed89a69a484616af9851a2f744 Mon Sep 17 00:00:00 2001 -From: Jacopo Mondi -Date: Sat, 9 May 2020 11:04:51 +0200 -Subject: [PATCH] media: v4l2-ctrls: Sort includes alphabetically - -Before adding a new include directive, sort the existing ones in -alphabetical order. - -Signed-off-by: Jacopo Mondi -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit e0837a6c08e127d8a7b765decc16abbed26589e1) ---- - drivers/media/v4l2-core/v4l2-ctrls.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 92c3e39efc28..4273d56dac65 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -9,14 +9,14 @@ - #define pr_fmt(fmt) "v4l2-ctrls: " fmt - - #include -+#include - #include - #include --#include --#include --#include - #include --#include - #include -+#include -+#include -+#include - - #define dprintk(vdev, fmt, arg...) do { \ - if (!WARN_ON(!(vdev)) && ((vdev)->dev_debug & V4L2_DEV_DEBUG_CTRL)) \ - -From 7e2b4a7ef9b0d8f5613de16bfbbf9a28058f7444 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 22 May 2020 22:21:33 +0200 -Subject: [PATCH] media: rkvdec: Fix H264 scaling list order - -The Rockchip Video Decoder driver is expecting that the values in a -scaling list are in zig-zag order and applies the inverse scanning process -to get the values in matrix order. - -Commit 0b0393d59eb4 ("media: uapi: h264: clarify expected -scaling_list_4x4/8x8 order") clarified that the values in the scaling list -should already be in matrix order. - -Fix this by removing the reordering and change to use two memcpy. - -Fixes: cd33c830448b ("media: rkvdec: Add the rkvdec driver") -Signed-off-by: Jonas Karlman -Tested-by: Nicolas Dufresne -Reviewed-by: Ezequiel Garcia -[hverkuil-cisco@xs4all.nl: rkvdec_scaling_matrix -> rkvdec_h264_scaling_list] -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 2630e1bb0948c3134c6f22ad275ae27cc6023532) ---- - drivers/staging/media/rkvdec/rkvdec-h264.c | 70 ++++++++++-------------------- - 1 file changed, 22 insertions(+), 48 deletions(-) - -diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index cd4980d06be7..7b66e2743a4f 100644 ---- a/drivers/staging/media/rkvdec/rkvdec-h264.c -+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c -@@ -18,11 +18,16 @@ - /* Size with u32 units. */ - #define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128) - #define RKV_RPS_SIZE ((128 + 128) / 4) --#define RKV_SCALING_LIST_SIZE (6 * 16 + 6 * 64 + 128) - #define RKV_ERROR_INFO_SIZE (256 * 144 * 4) - - #define RKVDEC_NUM_REFLIST 3 - -+struct rkvdec_h264_scaling_list { -+ u8 scaling_list_4x4[6][16]; -+ u8 scaling_list_8x8[6][64]; -+ u8 padding[128]; -+}; -+ - struct rkvdec_sps_pps_packet { - u32 info[8]; - }; -@@ -86,7 +91,7 @@ struct rkvdec_ps_field { - /* Data structure describing auxiliary buffer format. */ - struct rkvdec_h264_priv_tbl { - s8 cabac_table[4][464][2]; -- u8 scaling_list[RKV_SCALING_LIST_SIZE]; -+ struct rkvdec_h264_scaling_list scaling_list; - u32 rps[RKV_RPS_SIZE]; - struct rkvdec_sps_pps_packet param_set[256]; - u8 err_info[RKV_ERROR_INFO_SIZE]; -@@ -785,56 +790,25 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx, - } - } - --/* -- * NOTE: The values in a scaling list are in zig-zag order, apply inverse -- * scanning process to get the values in matrix order. -- */ --static const u32 zig_zag_4x4[16] = { -- 0, 1, 4, 8, 5, 2, 3, 6, 9, 12, 13, 10, 7, 11, 14, 15 --}; -- --static const u32 zig_zag_8x8[64] = { -- 0, 1, 8, 16, 9, 2, 3, 10, 17, 24, 32, 25, 18, 11, 4, 5, -- 12, 19, 26, 33, 40, 48, 41, 34, 27, 20, 13, 6, 7, 14, 21, 28, -- 35, 42, 49, 56, 57, 50, 43, 36, 29, 22, 15, 23, 30, 37, 44, 51, -- 58, 59, 52, 45, 38, 31, 39, 46, 53, 60, 61, 54, 47, 55, 62, 63 --}; -- --static void reorder_scaling_list(struct rkvdec_ctx *ctx, -- struct rkvdec_h264_run *run) -+static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) - { - const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix; -- const size_t num_list_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4); -- const size_t list_len_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4[0]); -- const size_t num_list_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8); -- const size_t list_len_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8[0]); - struct rkvdec_h264_ctx *h264_ctx = ctx->priv; - struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; -- u8 *dst = tbl->scaling_list; -- const u8 *src; -- int i, j; -- -- BUILD_BUG_ON(ARRAY_SIZE(zig_zag_4x4) != list_len_4x4); -- BUILD_BUG_ON(ARRAY_SIZE(zig_zag_8x8) != list_len_8x8); -- BUILD_BUG_ON(ARRAY_SIZE(tbl->scaling_list) < -- num_list_4x4 * list_len_4x4 + -- num_list_8x8 * list_len_8x8); -- -- src = &scaling->scaling_list_4x4[0][0]; -- for (i = 0; i < num_list_4x4; ++i) { -- for (j = 0; j < list_len_4x4; ++j) -- dst[zig_zag_4x4[j]] = src[j]; -- src += list_len_4x4; -- dst += list_len_4x4; -- } - -- src = &scaling->scaling_list_8x8[0][0]; -- for (i = 0; i < num_list_8x8; ++i) { -- for (j = 0; j < list_len_8x8; ++j) -- dst[zig_zag_8x8[j]] = src[j]; -- src += list_len_8x8; -- dst += list_len_8x8; -- } -+ BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_4x4) != -+ sizeof(scaling->scaling_list_4x4)); -+ BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_8x8) != -+ sizeof(scaling->scaling_list_8x8)); -+ -+ memcpy(tbl->scaling_list.scaling_list_4x4, -+ scaling->scaling_list_4x4, -+ sizeof(scaling->scaling_list_4x4)); -+ -+ memcpy(tbl->scaling_list.scaling_list_8x8, -+ scaling->scaling_list_8x8, -+ sizeof(scaling->scaling_list_8x8)); - } - - /* -@@ -1126,7 +1100,7 @@ static int rkvdec_h264_run(struct rkvdec_ctx *ctx) - v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, - h264_ctx->reflists.b1); - -- reorder_scaling_list(ctx, &run); -+ assemble_hw_scaling_list(ctx, &run); - assemble_hw_pps(ctx, &run); - assemble_hw_rps(ctx, &run); - config_registers(ctx, &run); diff --git a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.9.patch b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.9.patch new file mode 100644 index 0000000000..25df0565fe --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.9.patch @@ -0,0 +1,1190 @@ +From 36844f391c6e38eb536c4feae921f170963c7134 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:17:30 +0200 +Subject: [PATCH] v4l2-core: Print control name in VIDIOC_S/G_(EXT)_CTRL(S) + +While debugging, it's currently really hard to identify controls +by their ID. Print the control name making the print more helpful. + +With this change, the print changes from: + +video1: VIDIOC_S_EXT_CTRLS: which=0xf010000, count=5, error_idx=4, request_fd=45, id/size=0x990ce8/1048, id/size=0x990ce9/12, id/size=0x990cea/480, id/size=0x990ceb/896, id/size=0x990cec/400 + +video1: VIDIOC_S_EXT_CTRLS: which=0xf010000, count=5, error_idx=4, request_fd=42, name=H264 Sequence Parameter Set, id/size=0x990ce8/1048, name=H264 Picture Parameter Set, id/size=0x990ce9/12, name=H264 Scaling Matrix, id/size=0x990cea/480, name=H264 Slice Parameters, id/size=0x990ceb/896, name=H264 Decode Parameters, id/size=0x990cec/400 + +For instance, this is specially helpful when the ioctl fails. Consider +the following example: + +v4l2-ctrls: prepare_ext_ctrls: video1: pointer control id 0x990cec size too small, 400 bytes but 784 bytes needed +v4l2-ctrls: try_set_ext_ctrls: video1: video1: try_set_ext_ctrls_common failed (-14) +video1: VIDIOC_S_EXT_CTRLS: error -14: which=0xf010000, count=5, error_idx=5, request_fd=39, name=H264 Sequence Parameter Set, id/size=0x990ce8/1048, name=H264 Picture Parameter Set, id/size=0x990ce9/12, name=H264 Scaling Matrix, id/size=0x990cea/480, name=H264 Slice Parameters, id/size=0x990ceb/896, name=H264 Decode Parameters, id/size=0x990cec/400 + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit a69a7a33268308ddcc9abf0f7d7cd61ec4300cbe) +--- + drivers/media/v4l2-core/v4l2-ioctl.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c +index 2322f08a98be..38eaee7eeff6 100644 +--- a/drivers/media/v4l2-core/v4l2-ioctl.c ++++ b/drivers/media/v4l2-core/v4l2-ioctl.c +@@ -582,7 +582,10 @@ static void v4l_print_querymenu(const void *arg, bool write_only) + static void v4l_print_control(const void *arg, bool write_only) + { + const struct v4l2_control *p = arg; ++ const char *name = v4l2_ctrl_get_name(p->id); + ++ if (name) ++ pr_cont("name=%s, ", name); + pr_cont("id=0x%x, value=%d\n", p->id, p->value); + } + +@@ -594,12 +597,15 @@ static void v4l_print_ext_controls(const void *arg, bool write_only) + pr_cont("which=0x%x, count=%d, error_idx=%d, request_fd=%d", + p->which, p->count, p->error_idx, p->request_fd); + for (i = 0; i < p->count; i++) { ++ unsigned int id = p->controls[i].id; ++ const char *name = v4l2_ctrl_get_name(id); ++ ++ if (name) ++ pr_cont(", name=%s", name); + if (!p->controls[i].size) +- pr_cont(", id/val=0x%x/0x%x", +- p->controls[i].id, p->controls[i].value); ++ pr_cont(", id/val=0x%x/0x%x", id, p->controls[i].value); + else +- pr_cont(", id/size=0x%x/%u", +- p->controls[i].id, p->controls[i].size); ++ pr_cont(", id/size=0x%x/%u", id, p->controls[i].size); + } + pr_cont("\n"); + } + +From 9d69da65b06b3f79acf76d2f7f1a4d3cf4205447 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 24 Jun 2020 21:28:00 +0200 +Subject: [PATCH] media: Add V4L2_TYPE_IS_CAPTURE helper + +It's all too easy to get confused by the V4L2_TYPE_IS_OUTPUT +macro, when it's used as !V4L2_TYPE_IS_OUTPUT. + +Reduce the risk of confusion with macro to explicitly +check for the CAPTURE queue type case. + +This change does not affect functionality, and it's +only intended to make the code more readable. + +Suggested-by: Nicolas Dufresne +Signed-off-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +[hverkuil-cisco@xs4all.nl: checkpatch: align with parenthesis] +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit b3ab1c6058fad8cd5726f24e9ed9053e43bb2af4) +--- + drivers/media/common/videobuf2/videobuf2-v4l2.c | 4 ++-- + drivers/media/platform/exynos-gsc/gsc-core.c | 2 +- + drivers/media/platform/exynos-gsc/gsc-m2m.c | 2 +- + drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c | 2 +- + drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c | 7 +++---- + drivers/media/platform/rcar_jpu.c | 2 +- + drivers/media/platform/sti/hva/hva-v4l2.c | 2 +- + drivers/media/platform/ti-vpe/vpe.c | 2 +- + drivers/media/test-drivers/vicodec/vicodec-core.c | 6 +++--- + drivers/media/v4l2-core/v4l2-mem2mem.c | 6 +++--- + drivers/staging/media/hantro/hantro_v4l2.c | 2 +- + drivers/staging/media/rkvdec/rkvdec.c | 2 +- + include/uapi/linux/videodev2.h | 2 ++ + 13 files changed, 21 insertions(+), 20 deletions(-) + +diff --git a/drivers/media/common/videobuf2/videobuf2-v4l2.c b/drivers/media/common/videobuf2/videobuf2-v4l2.c +index eb5d5db96552..fd32c2e64809 100644 +--- a/drivers/media/common/videobuf2/videobuf2-v4l2.c ++++ b/drivers/media/common/videobuf2/videobuf2-v4l2.c +@@ -94,7 +94,7 @@ static int __verify_length(struct vb2_buffer *vb, const struct v4l2_buffer *b) + unsigned int bytesused; + unsigned int plane; + +- if (!V4L2_TYPE_IS_OUTPUT(b->type)) ++ if (V4L2_TYPE_IS_CAPTURE(b->type)) + return 0; + + if (V4L2_TYPE_IS_MULTIPLANAR(b->type)) { +@@ -307,7 +307,7 @@ static int vb2_fill_vb2_v4l2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b + + /* Zero flags that we handle */ + vbuf->flags = b->flags & ~V4L2_BUFFER_MASK_FLAGS; +- if (!vb->vb2_queue->copy_timestamp || !V4L2_TYPE_IS_OUTPUT(b->type)) { ++ if (!vb->vb2_queue->copy_timestamp || V4L2_TYPE_IS_CAPTURE(b->type)) { + /* + * Non-COPY timestamps and non-OUTPUT queues will get + * their timestamp and timestamp source flags from the +diff --git a/drivers/media/platform/exynos-gsc/gsc-core.c b/drivers/media/platform/exynos-gsc/gsc-core.c +index f6650b45bc3d..9f41c2e7097a 100644 +--- a/drivers/media/platform/exynos-gsc/gsc-core.c ++++ b/drivers/media/platform/exynos-gsc/gsc-core.c +@@ -577,7 +577,7 @@ int gsc_try_selection(struct gsc_ctx *ctx, struct v4l2_selection *s) + v4l_bound_align_image(&tmp_w, min_w, max_w, mod_x, + &tmp_h, min_h, max_h, mod_y, 0); + +- if (!V4L2_TYPE_IS_OUTPUT(s->type) && ++ if (V4L2_TYPE_IS_CAPTURE(s->type) && + (ctx->gsc_ctrls.rotate->val == 90 || + ctx->gsc_ctrls.rotate->val == 270)) + gsc_check_crop_change(tmp_h, tmp_w, +diff --git a/drivers/media/platform/exynos-gsc/gsc-m2m.c b/drivers/media/platform/exynos-gsc/gsc-m2m.c +index e2c162635f72..27a3c92c73bc 100644 +--- a/drivers/media/platform/exynos-gsc/gsc-m2m.c ++++ b/drivers/media/platform/exynos-gsc/gsc-m2m.c +@@ -255,7 +255,7 @@ static int gsc_m2m_buf_prepare(struct vb2_buffer *vb) + if (IS_ERR(frame)) + return PTR_ERR(frame); + +- if (!V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { ++ if (V4L2_TYPE_IS_CAPTURE(vb->vb2_queue->type)) { + for (i = 0; i < frame->fmt->num_planes; i++) + vb2_set_plane_payload(vb, i, frame->payload[i]); + } +diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c +index f82a81a3bdee..61fed1e35a00 100644 +--- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c ++++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c +@@ -731,7 +731,7 @@ static void mtk_jpeg_stop_streaming(struct vb2_queue *q) + * subsampling. Update capture queue when the stream is off. + */ + if (ctx->state == MTK_JPEG_SOURCE_CHANGE && +- !V4L2_TYPE_IS_OUTPUT(q->type)) { ++ V4L2_TYPE_IS_CAPTURE(q->type)) { + struct mtk_jpeg_src_buf *src_buf; + + vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); +diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c b/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c +index 821f2cf325f0..a6ea22b57416 100644 +--- a/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c ++++ b/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c +@@ -193,7 +193,7 @@ static const struct mtk_mdp_fmt *mtk_mdp_try_fmt_mplane(struct mtk_mdp_ctx *ctx, + + pix_mp->field = V4L2_FIELD_NONE; + pix_mp->pixelformat = fmt->pixelformat; +- if (!V4L2_TYPE_IS_OUTPUT(f->type)) { ++ if (V4L2_TYPE_IS_CAPTURE(f->type)) { + pix_mp->colorspace = ctx->colorspace; + pix_mp->xfer_func = ctx->xfer_func; + pix_mp->ycbcr_enc = ctx->ycbcr_enc; +@@ -327,9 +327,8 @@ static int mtk_mdp_try_crop(struct mtk_mdp_ctx *ctx, u32 type, + mtk_mdp_bound_align_image(&new_w, min_w, max_w, align_w, + &new_h, min_h, max_h, align_h); + +- if (!V4L2_TYPE_IS_OUTPUT(type) && +- (ctx->ctrls.rotate->val == 90 || +- ctx->ctrls.rotate->val == 270)) ++ if (V4L2_TYPE_IS_CAPTURE(type) && ++ (ctx->ctrls.rotate->val == 90 || ctx->ctrls.rotate->val == 270)) + mtk_mdp_check_crop_change(new_h, new_w, + &r->width, &r->height); + else +diff --git a/drivers/media/platform/rcar_jpu.c b/drivers/media/platform/rcar_jpu.c +index 5250a14324e9..9b99ff368698 100644 +--- a/drivers/media/platform/rcar_jpu.c ++++ b/drivers/media/platform/rcar_jpu.c +@@ -1066,7 +1066,7 @@ static int jpu_buf_prepare(struct vb2_buffer *vb) + } + + /* decoder capture queue */ +- if (!ctx->encoder && !V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) ++ if (!ctx->encoder && V4L2_TYPE_IS_CAPTURE(vb->vb2_queue->type)) + vb2_set_plane_payload(vb, i, size); + } + +diff --git a/drivers/media/platform/sti/hva/hva-v4l2.c b/drivers/media/platform/sti/hva/hva-v4l2.c +index 197b99d8fd9c..bb34d6997d99 100644 +--- a/drivers/media/platform/sti/hva/hva-v4l2.c ++++ b/drivers/media/platform/sti/hva/hva-v4l2.c +@@ -1087,7 +1087,7 @@ static void hva_stop_streaming(struct vb2_queue *vq) + + if ((V4L2_TYPE_IS_OUTPUT(vq->type) && + vb2_is_streaming(&ctx->fh.m2m_ctx->cap_q_ctx.q)) || +- (!V4L2_TYPE_IS_OUTPUT(vq->type) && ++ (V4L2_TYPE_IS_CAPTURE(vq->type) && + vb2_is_streaming(&ctx->fh.m2m_ctx->out_q_ctx.q))) { + dev_dbg(dev, "%s %s out=%d cap=%d\n", + ctx->name, to_type_str(vq->type), +diff --git a/drivers/media/platform/ti-vpe/vpe.c b/drivers/media/platform/ti-vpe/vpe.c +index cff2fcd6d812..346f8212791c 100644 +--- a/drivers/media/platform/ti-vpe/vpe.c ++++ b/drivers/media/platform/ti-vpe/vpe.c +@@ -1576,7 +1576,7 @@ static int vpe_g_fmt(struct file *file, void *priv, struct v4l2_format *f) + + *f = q_data->format; + +- if (!V4L2_TYPE_IS_OUTPUT(f->type)) { ++ if (V4L2_TYPE_IS_CAPTURE(f->type)) { + struct vpe_q_data *s_q_data; + struct v4l2_pix_format_mplane *spix; + +diff --git a/drivers/media/test-drivers/vicodec/vicodec-core.c b/drivers/media/test-drivers/vicodec/vicodec-core.c +index e879290727ef..8941d73f6611 100644 +--- a/drivers/media/test-drivers/vicodec/vicodec-core.c ++++ b/drivers/media/test-drivers/vicodec/vicodec-core.c +@@ -1442,7 +1442,7 @@ static void vicodec_buf_queue(struct vb2_buffer *vb) + .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, + }; + +- if (!V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type) && ++ if (V4L2_TYPE_IS_CAPTURE(vb->vb2_queue->type) && + vb2_is_streaming(vb->vb2_queue) && + v4l2_m2m_dst_buf_is_last(ctx->fh.m2m_ctx)) { + unsigned int i; +@@ -1479,7 +1479,7 @@ static void vicodec_buf_queue(struct vb2_buffer *vb) + * in the compressed stream + */ + if (ctx->is_stateless || ctx->is_enc || +- !V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { ++ V4L2_TYPE_IS_CAPTURE(vb->vb2_queue->type)) { + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); + return; + } +@@ -1574,7 +1574,7 @@ static int vicodec_start_streaming(struct vb2_queue *q, + state->gop_cnt = 0; + + if ((V4L2_TYPE_IS_OUTPUT(q->type) && !ctx->is_enc) || +- (!V4L2_TYPE_IS_OUTPUT(q->type) && ctx->is_enc)) ++ (V4L2_TYPE_IS_CAPTURE(q->type) && ctx->is_enc)) + return 0; + + if (info->id == V4L2_PIX_FMT_FWHT || +diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c +index 62ac9424c92a..95a8f2dc5341 100644 +--- a/drivers/media/v4l2-core/v4l2-mem2mem.c ++++ b/drivers/media/v4l2-core/v4l2-mem2mem.c +@@ -556,7 +556,7 @@ int v4l2_m2m_querybuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, + ret = vb2_querybuf(vq, buf); + + /* Adjust MMAP memory offsets for the CAPTURE queue */ +- if (buf->memory == V4L2_MEMORY_MMAP && !V4L2_TYPE_IS_OUTPUT(vq->type)) { ++ if (buf->memory == V4L2_MEMORY_MMAP && V4L2_TYPE_IS_CAPTURE(vq->type)) { + if (V4L2_TYPE_IS_MULTIPLANAR(vq->type)) { + for (i = 0; i < buf->length; ++i) + buf->m.planes[i].m.mem_offset +@@ -712,7 +712,7 @@ int v4l2_m2m_qbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, + int ret; + + vq = v4l2_m2m_get_vq(m2m_ctx, buf->type); +- if (!V4L2_TYPE_IS_OUTPUT(vq->type) && ++ if (V4L2_TYPE_IS_CAPTURE(vq->type) && + (buf->flags & V4L2_BUF_FLAG_REQUEST_FD)) { + dprintk("%s: requests cannot be used with capture buffers\n", + __func__); +@@ -729,7 +729,7 @@ int v4l2_m2m_qbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, + * buffer as DONE with LAST flag since it won't be queued on the + * device. + */ +- if (!V4L2_TYPE_IS_OUTPUT(vq->type) && ++ if (V4L2_TYPE_IS_CAPTURE(vq->type) && + vb2_is_streaming(vq) && !vb2_start_streaming_called(vq) && + (v4l2_m2m_has_stopped(m2m_ctx) || v4l2_m2m_dst_buf_is_last(m2m_ctx))) + v4l2_m2m_force_last_buf_done(m2m_ctx, vq); +diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c +index f28a94e2fa93..63859e8a0923 100644 +--- a/drivers/staging/media/hantro/hantro_v4l2.c ++++ b/drivers/staging/media/hantro/hantro_v4l2.c +@@ -237,7 +237,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, + enum v4l2_buf_type type) + { + const struct hantro_fmt *fmt, *vpu_fmt; +- bool capture = !V4L2_TYPE_IS_OUTPUT(type); ++ bool capture = V4L2_TYPE_IS_CAPTURE(type); + bool coded; + + coded = capture == hantro_is_encoder_ctx(ctx); +diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c +index 225eeca73356..fd68671f0286 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.c ++++ b/drivers/staging/media/rkvdec/rkvdec.c +@@ -489,7 +489,7 @@ static int rkvdec_start_streaming(struct vb2_queue *q, unsigned int count) + const struct rkvdec_coded_fmt_desc *desc; + int ret; + +- if (!V4L2_TYPE_IS_OUTPUT(q->type)) ++ if (V4L2_TYPE_IS_CAPTURE(q->type)) + return 0; + + desc = ctx->coded_fmt_desc; +diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h +index c3a1cf1c507f..6fe8822d2cb4 100644 +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -171,6 +171,8 @@ enum v4l2_buf_type { + || (type) == V4L2_BUF_TYPE_SDR_OUTPUT \ + || (type) == V4L2_BUF_TYPE_META_OUTPUT) + ++#define V4L2_TYPE_IS_CAPTURE(type) (!V4L2_TYPE_IS_OUTPUT(type)) ++ + enum v4l2_tuner_type { + V4L2_TUNER_RADIO = 1, + V4L2_TUNER_ANALOG_TV = 2, + +From d749cf811605c51dac943327a59f7bdcb3ed7235 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:16:02 +0200 +Subject: [PATCH] hantro: h264: Remove unused macro definition + +The generic H264 reference list builder moved all +the users of this macro, but left the macro. + +Remove it. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 3ebf271b1dee6df816bd8f2135218640c478dedd) +--- + drivers/staging/media/hantro/hantro_h264.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c +index d561f125085a..dd935d7009bf 100644 +--- a/drivers/staging/media/hantro/hantro_h264.c ++++ b/drivers/staging/media/hantro/hantro_h264.c +@@ -22,8 +22,6 @@ + #define POC_BUFFER_SIZE 34 + #define SCALING_LIST_SIZE (6 * 16 + 2 * 64) + +-#define HANTRO_CMP(a, b) ((a) < (b) ? -1 : 1) +- + /* Data structure describing auxiliary buffer format. */ + struct hantro_h264_dec_priv_tbl { + u32 cabac_table[CABAC_INIT_BUFFER_SIZE]; + +From 9eabbf39cb2216e740d66176c4a5b8f284de04f2 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:16:03 +0200 +Subject: [PATCH] hantro: h264: Rename scaling list handling function + +Commit e17f08e31666 ("media: hantro: Do not reorder +H264 scaling list") removed the scaling list reordering, +which was wrong and not needed. + +However, the name of the function stayed, which is +confusing for anyone reading the code. Rename +from "reorder" to "assemble" which is cleaner. + +This is just a cosmetic cleanup. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 4df3a47e3422a9de1f3ce1a4ba8a0447a73e7567) +--- + drivers/staging/media/hantro/hantro_h264.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c +index dd935d7009bf..194d05848077 100644 +--- a/drivers/staging/media/hantro/hantro_h264.c ++++ b/drivers/staging/media/hantro/hantro_h264.c +@@ -193,7 +193,7 @@ static const u32 h264_cabac_table[] = { + }; + + static void +-reorder_scaling_list(struct hantro_ctx *ctx) ++assemble_scaling_list(struct hantro_ctx *ctx) + { + const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; + const struct v4l2_ctrl_h264_scaling_matrix *scaling = ctrls->scaling; +@@ -235,7 +235,7 @@ static void prepare_table(struct hantro_ctx *ctx) + tbl->poc[32] = dec_param->top_field_order_cnt; + tbl->poc[33] = dec_param->bottom_field_order_cnt; + +- reorder_scaling_list(ctx); ++ assemble_scaling_list(ctx); + } + + static bool dpb_entry_match(const struct v4l2_h264_dpb_entry *a, + +From 46dce14fc3b553b0d6008b8880e53629aa842002 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:16:04 +0200 +Subject: [PATCH] hantro: Rework how encoder and decoder are identified + +So far we've been using the .buf_finish hook to distinguish +decoder from encoder. This is unnecessarily obfuscated. + +Moreover, we want to move the buf_finish, so use a cleaner +scheme to distinguish the driver decoder/encoder type. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 21f0315b7b3ee6ca909d81a963744671fb27bf71) +--- + drivers/staging/media/hantro/hantro.h | 6 +++--- + drivers/staging/media/hantro/hantro_drv.c | 9 +++------ + drivers/staging/media/hantro/hantro_v4l2.c | 28 ++++++++++++++-------------- + 3 files changed, 20 insertions(+), 23 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index 3005207fc6fb..2284e23d8500 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -199,6 +199,7 @@ struct hantro_dev { + * + * @dev: VPU driver data to which the context belongs. + * @fh: V4L2 file handler. ++ * @is_encoder: Decoder or encoder context? + * + * @sequence_cap: Sequence counter for capture queue + * @sequence_out: Sequence counter for output queue +@@ -223,6 +224,7 @@ struct hantro_dev { + struct hantro_ctx { + struct hantro_dev *dev; + struct v4l2_fh fh; ++ bool is_encoder; + + u32 sequence_cap; + u32 sequence_out; +@@ -399,8 +401,6 @@ static inline void hantro_reg_write_s(struct hantro_dev *vpu, + vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base); + } + +-bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx); +- + void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id); + dma_addr_t hantro_get_ref(struct hantro_ctx *ctx, u64 ts); + +@@ -420,7 +420,7 @@ static inline bool + hantro_needs_postproc(const struct hantro_ctx *ctx, + const struct hantro_fmt *fmt) + { +- return !hantro_is_encoder_ctx(ctx) && fmt->fourcc != V4L2_PIX_FMT_NV12; ++ return !ctx->is_encoder && fmt->fourcc != V4L2_PIX_FMT_NV12; + } + + static inline dma_addr_t +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 0db8ad455160..9145d02e5d3c 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -195,11 +195,6 @@ static void device_run(void *priv) + hantro_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR); + } + +-bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx) +-{ +- return ctx->buf_finish == hantro_enc_buf_finish; +-} +- + static struct v4l2_m2m_ops vpu_m2m_ops = { + .device_run = device_run, + }; +@@ -240,7 +235,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) + * + * For the DMA destination buffer, we use a bounce buffer. + */ +- if (hantro_is_encoder_ctx(ctx)) { ++ if (ctx->is_encoder) { + dst_vq->mem_ops = &vb2_vmalloc_memops; + } else { + dst_vq->bidirectional = true; +@@ -420,8 +415,10 @@ static int hantro_open(struct file *filp) + if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) { + allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS; + ctx->buf_finish = hantro_enc_buf_finish; ++ ctx->is_encoder = true; + } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) { + allowed_codecs = vpu->variant->codec & HANTRO_DECODERS; ++ ctx->is_encoder = false; + } else { + ret = -ENODEV; + goto err_ctx_free; +diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c +index 63859e8a0923..b668a82d40ad 100644 +--- a/drivers/staging/media/hantro/hantro_v4l2.c ++++ b/drivers/staging/media/hantro/hantro_v4l2.c +@@ -40,7 +40,7 @@ hantro_get_formats(const struct hantro_ctx *ctx, unsigned int *num_fmts) + { + const struct hantro_fmt *formats; + +- if (hantro_is_encoder_ctx(ctx)) { ++ if (ctx->is_encoder) { + formats = ctx->dev->variant->enc_fmts; + *num_fmts = ctx->dev->variant->num_enc_fmts; + } else { +@@ -55,7 +55,7 @@ static const struct hantro_fmt * + hantro_get_postproc_formats(const struct hantro_ctx *ctx, + unsigned int *num_fmts) + { +- if (hantro_is_encoder_ctx(ctx)) { ++ if (ctx->is_encoder) { + *num_fmts = 0; + return NULL; + } +@@ -158,7 +158,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, + * not MODE_NONE. + * - on the output side we want to filter out all MODE_NONE formats. + */ +- skip_mode_none = capture == hantro_is_encoder_ctx(ctx); ++ skip_mode_none = capture == ctx->is_encoder; + + formats = hantro_get_formats(ctx, &num_fmts); + for (i = 0; i < num_fmts; i++) { +@@ -240,7 +240,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, + bool capture = V4L2_TYPE_IS_CAPTURE(type); + bool coded; + +- coded = capture == hantro_is_encoder_ctx(ctx); ++ coded = capture == ctx->is_encoder; + + vpu_debug(4, "trying format %c%c%c%c\n", + (pix_mp->pixelformat & 0x7f), +@@ -257,7 +257,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, + if (coded) { + pix_mp->num_planes = 1; + vpu_fmt = fmt; +- } else if (hantro_is_encoder_ctx(ctx)) { ++ } else if (ctx->is_encoder) { + vpu_fmt = ctx->vpu_dst_fmt; + } else { + vpu_fmt = ctx->vpu_src_fmt; +@@ -330,7 +330,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) + + vpu_fmt = hantro_get_default_fmt(ctx, true); + +- if (hantro_is_encoder_ctx(ctx)) { ++ if (ctx->is_encoder) { + ctx->vpu_dst_fmt = vpu_fmt; + fmt = &ctx->dst_fmt; + } else { +@@ -341,7 +341,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) + hantro_reset_fmt(fmt, vpu_fmt); + fmt->width = vpu_fmt->frmsize.min_width; + fmt->height = vpu_fmt->frmsize.min_height; +- if (hantro_is_encoder_ctx(ctx)) ++ if (ctx->is_encoder) + hantro_set_fmt_cap(ctx, fmt); + else + hantro_set_fmt_out(ctx, fmt); +@@ -355,7 +355,7 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) + + raw_vpu_fmt = hantro_get_default_fmt(ctx, false); + +- if (hantro_is_encoder_ctx(ctx)) { ++ if (ctx->is_encoder) { + ctx->vpu_src_fmt = raw_vpu_fmt; + raw_fmt = &ctx->src_fmt; + encoded_fmt = &ctx->dst_fmt; +@@ -368,7 +368,7 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) + hantro_reset_fmt(raw_fmt, raw_vpu_fmt); + raw_fmt->width = encoded_fmt->width; + raw_fmt->width = encoded_fmt->width; +- if (hantro_is_encoder_ctx(ctx)) ++ if (ctx->is_encoder) + hantro_set_fmt_out(ctx, raw_fmt); + else + hantro_set_fmt_cap(ctx, raw_fmt); +@@ -409,7 +409,7 @@ static int hantro_set_fmt_out(struct hantro_ctx *ctx, + if (ret) + return ret; + +- if (!hantro_is_encoder_ctx(ctx)) { ++ if (!ctx->is_encoder) { + struct vb2_queue *peer_vq; + + /* +@@ -450,7 +450,7 @@ static int hantro_set_fmt_out(struct hantro_ctx *ctx, + * Note that hantro_reset_raw_fmt() also propagates size + * changes to the raw format. + */ +- if (!hantro_is_encoder_ctx(ctx)) ++ if (!ctx->is_encoder) + hantro_reset_raw_fmt(ctx); + + /* Colorimetry information are always propagated. */ +@@ -479,7 +479,7 @@ static int hantro_set_fmt_cap(struct hantro_ctx *ctx, + if (vb2_is_busy(vq)) + return -EBUSY; + +- if (hantro_is_encoder_ctx(ctx)) { ++ if (ctx->is_encoder) { + struct vb2_queue *peer_vq; + + /* +@@ -512,7 +512,7 @@ static int hantro_set_fmt_cap(struct hantro_ctx *ctx, + * Note that hantro_reset_raw_fmt() also propagates size + * changes to the raw format. + */ +- if (hantro_is_encoder_ctx(ctx)) ++ if (ctx->is_encoder) + hantro_reset_raw_fmt(ctx); + + /* Colorimetry information are always propagated. */ +@@ -655,7 +655,7 @@ static bool hantro_vq_is_coded(struct vb2_queue *q) + { + struct hantro_ctx *ctx = vb2_get_drv_priv(q); + +- return hantro_is_encoder_ctx(ctx) != V4L2_TYPE_IS_OUTPUT(q->type); ++ return ctx->is_encoder != V4L2_TYPE_IS_OUTPUT(q->type); + } + + static int hantro_start_streaming(struct vb2_queue *q, unsigned int count) + +From 25e06243f2b6d58dafa7ed480797e20dbc73f44b Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:16:05 +0200 +Subject: [PATCH] hantro: Move hantro_enc_buf_finish to JPEG codec_ops.done + +hantro_enc_buf_finish is used only for JPEG, and so should +be moved to JPEG codec_ops.done. + +This cleanup is also taking care of addressing +a subtle issue: checking the non-NULL bounce buffer +using ctx->jpeg_enc, which is a member of a union is +confusing and error-prone. + +Note that the issue is currently innocuous because an +encoder context only supports JPEG. + +The codec_ops.done has an argument that codec-specific code +shouldn't need, so drop that as well. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit e765dba11ec26d7ea42974ec4d470b5ce00be3de) +--- + drivers/staging/media/hantro/hantro.h | 7 ----- + drivers/staging/media/hantro/hantro_drv.c | 37 +++-------------------- + drivers/staging/media/hantro/hantro_h1_jpeg_enc.c | 17 +++++++++++ + drivers/staging/media/hantro/hantro_hw.h | 3 +- + drivers/staging/media/hantro/rk3288_vpu_hw.c | 1 + + 5 files changed, 24 insertions(+), 41 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index 2284e23d8500..65f9f7ea7dcf 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -212,9 +212,6 @@ struct hantro_dev { + * @ctrl_handler: Control handler used to register controls. + * @jpeg_quality: User-specified JPEG compression quality. + * +- * @buf_finish: Buffer finish. This depends on encoder or decoder +- * context, and it's called right before +- * calling v4l2_m2m_job_finish. + * @codec_ops: Set of operations related to codec mode. + * @postproc: Post-processing context. + * @jpeg_enc: JPEG-encoding context. +@@ -237,10 +234,6 @@ struct hantro_ctx { + struct v4l2_ctrl_handler ctrl_handler; + int jpeg_quality; + +- int (*buf_finish)(struct hantro_ctx *ctx, +- struct vb2_buffer *buf, +- unsigned int bytesused); +- + const struct hantro_codec_ops *codec_ops; + struct hantro_postproc_ctx postproc; + +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 9145d02e5d3c..88b5c5989d83 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -56,37 +56,12 @@ dma_addr_t hantro_get_ref(struct hantro_ctx *ctx, u64 ts) + return hantro_get_dec_buf_addr(ctx, buf); + } + +-static int +-hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf, +- unsigned int bytesused) +-{ +- size_t avail_size; +- +- avail_size = vb2_plane_size(buf, 0) - ctx->vpu_dst_fmt->header_size; +- if (bytesused > avail_size) +- return -EINVAL; +- /* +- * The bounce buffer is only for the JPEG encoder. +- * TODO: Rework the JPEG encoder to eliminate the need +- * for a bounce buffer. +- */ +- if (ctx->jpeg_enc.bounce_buffer.cpu) { +- memcpy(vb2_plane_vaddr(buf, 0) + +- ctx->vpu_dst_fmt->header_size, +- ctx->jpeg_enc.bounce_buffer.cpu, bytesused); +- } +- buf->planes[0].bytesused = +- ctx->vpu_dst_fmt->header_size + bytesused; +- return 0; +-} +- + static void hantro_job_finish(struct hantro_dev *vpu, + struct hantro_ctx *ctx, + unsigned int bytesused, + enum vb2_buffer_state result) + { + struct vb2_v4l2_buffer *src, *dst; +- int ret; + + pm_runtime_mark_last_busy(vpu->dev); + pm_runtime_put_autosuspend(vpu->dev); +@@ -103,12 +78,6 @@ static void hantro_job_finish(struct hantro_dev *vpu, + src->sequence = ctx->sequence_out++; + dst->sequence = ctx->sequence_cap++; + +- if (ctx->buf_finish) { +- ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused); +- if (ret) +- result = VB2_BUF_STATE_ERROR; +- } +- + v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, + result); + } +@@ -124,8 +93,11 @@ void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, + * the timeout expired. The watchdog is running, + * and will take care of finishing the job. + */ +- if (cancel_delayed_work(&vpu->watchdog_work)) ++ if (cancel_delayed_work(&vpu->watchdog_work)) { ++ if (result == VB2_BUF_STATE_DONE && ctx->codec_ops->done) ++ ctx->codec_ops->done(ctx); + hantro_job_finish(vpu, ctx, bytesused, result); ++ } + } + + void hantro_watchdog(struct work_struct *work) +@@ -414,7 +386,6 @@ static int hantro_open(struct file *filp) + ctx->dev = vpu; + if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) { + allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS; +- ctx->buf_finish = hantro_enc_buf_finish; + ctx->is_encoder = true; + } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) { + allowed_codecs = vpu->variant->codec & HANTRO_DECODERS; +diff --git a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c +index b22418436823..b88dc4ed06db 100644 +--- a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c ++++ b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c +@@ -137,3 +137,20 @@ void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx) + + vepu_write(vpu, reg, H1_REG_ENC_CTRL); + } ++ ++void hantro_jpeg_enc_done(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ u32 bytesused = vepu_read(vpu, H1_REG_STR_BUF_LIMIT) / 8; ++ struct vb2_v4l2_buffer *dst_buf = hantro_get_dst_buf(ctx); ++ ++ /* ++ * TODO: Rework the JPEG encoder to eliminate the need ++ * for a bounce buffer. ++ */ ++ memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0) + ++ ctx->vpu_dst_fmt->header_size, ++ ctx->jpeg_enc.bounce_buffer.cpu, bytesused); ++ vb2_set_plane_payload(&dst_buf->vb2_buf, 0, ++ ctx->vpu_dst_fmt->header_size + bytesused); ++} +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 4053d8710e04..2d6323cd6732 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -138,7 +138,7 @@ struct hantro_codec_ops { + int (*init)(struct hantro_ctx *ctx); + void (*exit)(struct hantro_ctx *ctx); + void (*run)(struct hantro_ctx *ctx); +- void (*done)(struct hantro_ctx *ctx, enum vb2_buffer_state); ++ void (*done)(struct hantro_ctx *ctx); + void (*reset)(struct hantro_ctx *ctx); + }; + +@@ -172,6 +172,7 @@ void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx); + void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx); + int hantro_jpeg_enc_init(struct hantro_ctx *ctx); + void hantro_jpeg_enc_exit(struct hantro_ctx *ctx); ++void hantro_jpeg_enc_done(struct hantro_ctx *ctx); + + dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx, + unsigned int dpb_idx); +diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c +index 2f914b37b9e5..b1cf2abb972f 100644 +--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c ++++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c +@@ -180,6 +180,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = { + .run = hantro_h1_jpeg_enc_run, + .reset = rk3288_vpu_enc_reset, + .init = hantro_jpeg_enc_init, ++ .done = hantro_jpeg_enc_done, + .exit = hantro_jpeg_enc_exit, + }, + [HANTRO_MODE_H264_DEC] = { + +From 7c9520827a7dc71dbfd0c43f95805c2c6e3ce0bb Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:16:06 +0200 +Subject: [PATCH] hantro: Remove unused bytesused argument + +The driver doesn't need the bytesused argument. + +For decoders, the plane bytesused is known and therefore, +buf_prepare is used to set it. For encoders, it's +handled by the codec_ops.done hook. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit b72a6342dd240ce8e15b7acf1c38c67a0c56092b) +--- + drivers/staging/media/hantro/hantro_drv.c | 9 ++++----- + drivers/staging/media/hantro/hantro_hw.h | 2 +- + drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +- + drivers/staging/media/hantro/rk3288_vpu_hw.c | 7 +++---- + drivers/staging/media/hantro/rk3399_vpu_hw.c | 7 +++---- + 5 files changed, 12 insertions(+), 15 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 88b5c5989d83..34367b169011 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -58,7 +58,6 @@ dma_addr_t hantro_get_ref(struct hantro_ctx *ctx, u64 ts) + + static void hantro_job_finish(struct hantro_dev *vpu, + struct hantro_ctx *ctx, +- unsigned int bytesused, + enum vb2_buffer_state result) + { + struct vb2_v4l2_buffer *src, *dst; +@@ -82,7 +81,7 @@ static void hantro_job_finish(struct hantro_dev *vpu, + result); + } + +-void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, ++void hantro_irq_done(struct hantro_dev *vpu, + enum vb2_buffer_state result) + { + struct hantro_ctx *ctx = +@@ -96,7 +95,7 @@ void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, + if (cancel_delayed_work(&vpu->watchdog_work)) { + if (result == VB2_BUF_STATE_DONE && ctx->codec_ops->done) + ctx->codec_ops->done(ctx); +- hantro_job_finish(vpu, ctx, bytesused, result); ++ hantro_job_finish(vpu, ctx, result); + } + } + +@@ -111,7 +110,7 @@ void hantro_watchdog(struct work_struct *work) + if (ctx) { + vpu_err("frame processing timed out!\n"); + ctx->codec_ops->reset(ctx); +- hantro_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR); ++ hantro_job_finish(vpu, ctx, VB2_BUF_STATE_ERROR); + } + } + +@@ -164,7 +163,7 @@ static void device_run(void *priv) + return; + + err_cancel_job: +- hantro_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR); ++ hantro_job_finish(ctx->dev, ctx, VB2_BUF_STATE_ERROR); + } + + static struct v4l2_m2m_ops vpu_m2m_ops = { +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 2d6323cd6732..f066de6b592d 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -163,7 +163,7 @@ extern const u32 hantro_vp8_dec_mc_filter[8][6]; + + void hantro_watchdog(struct work_struct *work); + void hantro_run(struct hantro_ctx *ctx); +-void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, ++void hantro_irq_done(struct hantro_dev *vpu, + enum vb2_buffer_state result); + void hantro_start_prepare_run(struct hantro_ctx *ctx); + void hantro_end_prepare_run(struct hantro_ctx *ctx); +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index cb2420c5526e..c222de075ef4 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -143,7 +143,7 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) + vdpu_write(vpu, 0, G1_REG_INTERRUPT); + vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); + +- hantro_irq_done(vpu, 0, state); ++ hantro_irq_done(vpu, state); + + return IRQ_HANDLED; + } +diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c +index b1cf2abb972f..7b299ee3e93d 100644 +--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c ++++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c +@@ -113,17 +113,16 @@ static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id) + { + struct hantro_dev *vpu = dev_id; + enum vb2_buffer_state state; +- u32 status, bytesused; ++ u32 status; + + status = vepu_read(vpu, H1_REG_INTERRUPT); +- bytesused = vepu_read(vpu, H1_REG_STR_BUF_LIMIT) / 8; + state = (status & H1_REG_INTERRUPT_FRAME_RDY) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vepu_write(vpu, 0, H1_REG_INTERRUPT); + vepu_write(vpu, 0, H1_REG_AXI_CTRL); + +- hantro_irq_done(vpu, bytesused, state); ++ hantro_irq_done(vpu, state); + + return IRQ_HANDLED; + } +@@ -141,7 +140,7 @@ static irqreturn_t rk3288_vdpu_irq(int irq, void *dev_id) + vdpu_write(vpu, 0, G1_REG_INTERRUPT); + vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); + +- hantro_irq_done(vpu, 0, state); ++ hantro_irq_done(vpu, state); + + return IRQ_HANDLED; + } +diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw.c b/drivers/staging/media/hantro/rk3399_vpu_hw.c +index 9ac1f2cb6a16..7a7962cf771e 100644 +--- a/drivers/staging/media/hantro/rk3399_vpu_hw.c ++++ b/drivers/staging/media/hantro/rk3399_vpu_hw.c +@@ -92,17 +92,16 @@ static irqreturn_t rk3399_vepu_irq(int irq, void *dev_id) + { + struct hantro_dev *vpu = dev_id; + enum vb2_buffer_state state; +- u32 status, bytesused; ++ u32 status; + + status = vepu_read(vpu, VEPU_REG_INTERRUPT); +- bytesused = vepu_read(vpu, VEPU_REG_STR_BUF_LIMIT) / 8; + state = (status & VEPU_REG_INTERRUPT_FRAME_READY) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vepu_write(vpu, 0, VEPU_REG_INTERRUPT); + vepu_write(vpu, 0, VEPU_REG_AXI_CTRL); + +- hantro_irq_done(vpu, bytesused, state); ++ hantro_irq_done(vpu, state); + + return IRQ_HANDLED; + } +@@ -120,7 +119,7 @@ static irqreturn_t rk3399_vdpu_irq(int irq, void *dev_id) + vdpu_write(vpu, 0, VDPU_REG_INTERRUPT); + vdpu_write(vpu, 0, VDPU_REG_AXI_CTRL); + +- hantro_irq_done(vpu, 0, state); ++ hantro_irq_done(vpu, state); + + return IRQ_HANDLED; + } + +From 6724a9b87cff7d869b51fe6c0a9dc65d2c7e839a Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Wed, 1 Jul 2020 15:16:07 +0200 +Subject: [PATCH] hantro: Make sure we don't use post-processor on an encoder + +Commit 986eee3a5234 ("media: hantro: Prevent encoders from using +post-processing") fixed hantro_needs_postproc condition, +but missed one case. Encoders don't have any post-processor +hardware block, so also can't be disabled. + +Fix it. + +Fixes: 986eee3a5234 ("media: hantro: Prevent encoders from using post-processing") +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 46d7aaebbe441d5381e35d8e16df784690e65ef3) +--- + drivers/staging/media/hantro/hantro_drv.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 34367b169011..d32b6b1ab70b 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -122,10 +122,12 @@ void hantro_start_prepare_run(struct hantro_ctx *ctx) + v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req, + &ctx->ctrl_handler); + +- if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) +- hantro_postproc_enable(ctx); +- else +- hantro_postproc_disable(ctx); ++ if (!ctx->is_encoder) { ++ if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) ++ hantro_postproc_enable(ctx); ++ else ++ hantro_postproc_disable(ctx); ++ } + } + + void hantro_end_prepare_run(struct hantro_ctx *ctx) + +From 6e0c6cfb81852324a6f77e306346ab894416b41f Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Thu, 9 Jul 2020 18:36:34 +0200 +Subject: [PATCH] rkvdec: h264: Refuse to decode unsupported bitstream + +The hardware only supports 4:2:2, 4:2:0 or 4:0:0 (monochrome), +8-bit or 10-bit depth content. + +Verify that the SPS refers to a supported bitstream, and refuse +unsupported bitstreams by failing at TRY_EXT_CTRLS time. + +The driver is currently broken on 10-bit and 4:2:2 +so disallow those as well. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Jonas Karlman +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 9363aa33f6a9acfd16f98c749f17f6c65d184670) +--- + drivers/staging/media/rkvdec/rkvdec.c | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c +index fd68671f0286..c8151328fb70 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.c ++++ b/drivers/staging/media/rkvdec/rkvdec.c +@@ -27,6 +27,32 @@ + #include "rkvdec.h" + #include "rkvdec-regs.h" + ++static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ if (ctrl->id == V4L2_CID_MPEG_VIDEO_H264_SPS) { ++ const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; ++ /* ++ * TODO: The hardware supports 10-bit and 4:2:2 profiles, ++ * but it's currently broken in the driver. ++ * Reject them for now, until it's fixed. ++ */ ++ if (sps->chroma_format_idc > 1) ++ /* Only 4:0:0 and 4:2:0 are supported */ ++ return -EINVAL; ++ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) ++ /* Luma and chroma bit depth mismatch */ ++ return -EINVAL; ++ if (sps->bit_depth_luma_minus8 != 0) ++ /* Only 8-bit is supported */ ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = { ++ .try_ctrl = rkvdec_try_ctrl, ++}; ++ + static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { + { + .per_request = true, +@@ -42,6 +68,7 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { + .per_request = true, + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SPS, ++ .cfg.ops = &rkvdec_ctrl_ops, + }, + { + .per_request = true, + +From ce193e381cc2124e82c3e167996726953c0b8365 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Thu, 9 Jul 2020 18:36:35 +0200 +Subject: [PATCH] hantro: h264: Refuse to decode unsupported bitstream + +The hardware only supports 4:2:0 or 4:0:0 (monochrome), +8-bit depth content. + +Verify that the SPS refers to a supported bitstream, and refuse +unsupported bitstreams by failing at TRY_EXT_CTRLS time. + +Given the JPEG compression level control is the only one +that needs setting, a specific ops is provided. + +Signed-off-by: Ezequiel Garcia +Reviewed-by: Philipp Zabel +Reviewed-by: Jonas Karlman +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit d70cca7323442026e20c474314518c446cb4766f) +--- + drivers/staging/media/hantro/hantro_drv.c | 29 ++++++++++++++++++++++++++--- + 1 file changed, 26 insertions(+), 3 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index d32b6b1ab70b..34797507f214 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -229,7 +229,25 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) + return vb2_queue_init(dst_vq); + } + +-static int hantro_s_ctrl(struct v4l2_ctrl *ctrl) ++static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ if (ctrl->id == V4L2_CID_MPEG_VIDEO_H264_SPS) { ++ const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; ++ ++ if (sps->chroma_format_idc > 1) ++ /* Only 4:0:0 and 4:2:0 are supported */ ++ return -EINVAL; ++ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) ++ /* Luma and chroma bit depth mismatch */ ++ return -EINVAL; ++ if (sps->bit_depth_luma_minus8 != 0) ++ /* Only 8-bit is supported */ ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int hantro_jpeg_s_ctrl(struct v4l2_ctrl *ctrl) + { + struct hantro_ctx *ctx; + +@@ -250,7 +268,11 @@ static int hantro_s_ctrl(struct v4l2_ctrl *ctrl) + } + + static const struct v4l2_ctrl_ops hantro_ctrl_ops = { +- .s_ctrl = hantro_s_ctrl, ++ .try_ctrl = hantro_try_ctrl, ++}; ++ ++static const struct v4l2_ctrl_ops hantro_jpeg_ctrl_ops = { ++ .s_ctrl = hantro_jpeg_s_ctrl, + }; + + static const struct hantro_ctrl controls[] = { +@@ -262,7 +284,7 @@ static const struct hantro_ctrl controls[] = { + .max = 100, + .step = 1, + .def = 50, +- .ops = &hantro_ctrl_ops, ++ .ops = &hantro_jpeg_ctrl_ops, + }, + }, { + .codec = HANTRO_MPEG2_DECODER, +@@ -293,6 +315,7 @@ static const struct hantro_ctrl controls[] = { + .codec = HANTRO_H264_DECODER, + .cfg = { + .id = V4L2_CID_MPEG_VIDEO_H264_SPS, ++ .ops = &hantro_ctrl_ops, + }, + }, { + .codec = HANTRO_H264_DECODER, diff --git a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch deleted file mode 100644 index 595f60880b..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch +++ /dev/null @@ -1,3066 +0,0 @@ -From abd39f808afe2c9a6174dc4b69d18972eb3a3ce1 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Sat, 22 Feb 2020 10:42:06 +0800 -Subject: [PATCH] drm/lima: save process info for debug usage - -When task fail, we can find its process with this information. - -Tested-by: Andreas Baierl -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200222024210.18697-2-yuq825@gmail.com -(cherry picked from commit 6ebd24b6bf106d3195bdbfeaa1ac77571e3dc670) ---- - drivers/gpu/drm/lima/lima_ctx.c | 3 +++ - drivers/gpu/drm/lima/lima_ctx.h | 5 +++++ - 2 files changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/lima/lima_ctx.c b/drivers/gpu/drm/lima/lima_ctx.c -index 22fff6caa961..891d5cd5019a 100644 ---- a/drivers/gpu/drm/lima/lima_ctx.c -+++ b/drivers/gpu/drm/lima/lima_ctx.c -@@ -27,6 +27,9 @@ int lima_ctx_create(struct lima_device *dev, struct lima_ctx_mgr *mgr, u32 *id) - if (err < 0) - goto err_out0; - -+ ctx->pid = task_pid_nr(current); -+ get_task_comm(ctx->pname, current); -+ - return 0; - - err_out0: -diff --git a/drivers/gpu/drm/lima/lima_ctx.h b/drivers/gpu/drm/lima/lima_ctx.h -index 6154e5c9bfe4..74e2be09090f 100644 ---- a/drivers/gpu/drm/lima/lima_ctx.h -+++ b/drivers/gpu/drm/lima/lima_ctx.h -@@ -5,6 +5,7 @@ - #define __LIMA_CTX_H__ - - #include -+#include - - #include "lima_device.h" - -@@ -13,6 +14,10 @@ struct lima_ctx { - struct lima_device *dev; - struct lima_sched_context context[lima_pipe_num]; - atomic_t guilty; -+ -+ /* debug info */ -+ char pname[TASK_COMM_LEN]; -+ pid_t pid; - }; - - struct lima_ctx_mgr { - -From 6bd6464811e273f2a7762e61d58de95dcb83150f Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Sat, 22 Feb 2020 10:42:07 +0800 -Subject: [PATCH] drm/lima: add max_error_tasks module parameter - -Limit error tasks to save. - -Tested-by: Andreas Baierl -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200222024210.18697-3-yuq825@gmail.com -(cherry picked from commit c67a3d4f68c7cff39253e122d26a0152dbef37c8) ---- - drivers/gpu/drm/lima/lima_drv.c | 4 ++++ - drivers/gpu/drm/lima/lima_drv.h | 1 + - 2 files changed, 5 insertions(+) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 2daac64d8955..e235d4545b6c 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -16,6 +16,7 @@ - - int lima_sched_timeout_ms; - uint lima_heap_init_nr_pages = 8; -+uint lima_max_error_tasks; - - MODULE_PARM_DESC(sched_timeout_ms, "task run timeout in ms"); - module_param_named(sched_timeout_ms, lima_sched_timeout_ms, int, 0444); -@@ -23,6 +24,9 @@ module_param_named(sched_timeout_ms, lima_sched_timeout_ms, int, 0444); - MODULE_PARM_DESC(heap_init_nr_pages, "heap buffer init number of pages"); - module_param_named(heap_init_nr_pages, lima_heap_init_nr_pages, uint, 0444); - -+MODULE_PARM_DESC(max_error_tasks, "max number of error tasks to save"); -+module_param_named(max_error_tasks, lima_max_error_tasks, uint, 0644); -+ - static int lima_ioctl_get_param(struct drm_device *dev, void *data, struct drm_file *file) - { - struct drm_lima_get_param *args = data; -diff --git a/drivers/gpu/drm/lima/lima_drv.h b/drivers/gpu/drm/lima/lima_drv.h -index f492ecc6a5d9..fdbd4077c768 100644 ---- a/drivers/gpu/drm/lima/lima_drv.h -+++ b/drivers/gpu/drm/lima/lima_drv.h -@@ -10,6 +10,7 @@ - - extern int lima_sched_timeout_ms; - extern uint lima_heap_init_nr_pages; -+extern uint lima_max_error_tasks; - - struct lima_vm; - struct lima_bo; - -From ebf8e20f3660b300f5fbd4b1731d61c2221234a6 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Sat, 7 Mar 2020 21:44:23 +0800 -Subject: [PATCH] drm/lima: save task info dump when task fail - -Save all information to start a task which can be exported to user -for debug usage. Dump file data format is specified in lima_dump.h - -v2: -Add include header to address build robot complain. - -Tested-by: Andreas Baierl -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200307134423.24329-1-yuq825@gmail.com -(cherry picked from commit b78edd46f6a9eca23b4070166fe98264c07171cc) ---- - drivers/gpu/drm/lima/lima_device.c | 13 ++++ - drivers/gpu/drm/lima/lima_device.h | 8 +++ - drivers/gpu/drm/lima/lima_dump.h | 77 ++++++++++++++++++++++ - drivers/gpu/drm/lima/lima_sched.c | 130 +++++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/lima/lima_sched.h | 7 ++ - 5 files changed, 235 insertions(+) - create mode 100644 drivers/gpu/drm/lima/lima_dump.h - -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index 19829b543024..42a00171fea5 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -344,6 +344,12 @@ int lima_device_init(struct lima_device *ldev) - if (err) - goto err_out5; - -+ ldev->dump.magic = LIMA_DUMP_MAGIC; -+ ldev->dump.version_major = LIMA_DUMP_MAJOR; -+ ldev->dump.version_minor = LIMA_DUMP_MINOR; -+ INIT_LIST_HEAD(&ldev->error_task_list); -+ mutex_init(&ldev->error_task_list_lock); -+ - dev_info(ldev->dev, "bus rate = %lu\n", clk_get_rate(ldev->clk_bus)); - dev_info(ldev->dev, "mod rate = %lu", clk_get_rate(ldev->clk_gpu)); - -@@ -370,6 +376,13 @@ int lima_device_init(struct lima_device *ldev) - void lima_device_fini(struct lima_device *ldev) - { - int i; -+ struct lima_sched_error_task *et, *tmp; -+ -+ list_for_each_entry_safe(et, tmp, &ldev->error_task_list, list) { -+ list_del(&et->list); -+ kvfree(et); -+ } -+ mutex_destroy(&ldev->error_task_list_lock); - - lima_fini_pp_pipe(ldev); - lima_fini_gp_pipe(ldev); -diff --git a/drivers/gpu/drm/lima/lima_device.h b/drivers/gpu/drm/lima/lima_device.h -index 31158d86271c..f17173f47f26 100644 ---- a/drivers/gpu/drm/lima/lima_device.h -+++ b/drivers/gpu/drm/lima/lima_device.h -@@ -6,8 +6,11 @@ - - #include - #include -+#include -+#include - - #include "lima_sched.h" -+#include "lima_dump.h" - - enum lima_gpu_id { - lima_gpu_mali400 = 0, -@@ -94,6 +97,11 @@ struct lima_device { - - u32 *dlbu_cpu; - dma_addr_t dlbu_dma; -+ -+ /* debug info */ -+ struct lima_dump_head dump; -+ struct list_head error_task_list; -+ struct mutex error_task_list_lock; - }; - - static inline struct lima_device * -diff --git a/drivers/gpu/drm/lima/lima_dump.h b/drivers/gpu/drm/lima/lima_dump.h -new file mode 100644 -index 000000000000..ca243d99c51b ---- /dev/null -+++ b/drivers/gpu/drm/lima/lima_dump.h -@@ -0,0 +1,77 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR MIT */ -+/* Copyright 2020 Qiang Yu */ -+ -+#ifndef __LIMA_DUMP_H__ -+#define __LIMA_DUMP_H__ -+ -+#include -+ -+/** -+ * dump file format for all the information to start a lima task -+ * -+ * top level format -+ * | magic code "LIMA" | format version | num tasks | data size | -+ * | reserved | reserved | reserved | reserved | -+ * | task 1 ID | task 1 size | num chunks | reserved | task 1 data | -+ * | task 2 ID | task 2 size | num chunks | reserved | task 2 data | -+ * ... -+ * -+ * task data format -+ * | chunk 1 ID | chunk 1 size | reserved | reserved | chunk 1 data | -+ * | chunk 2 ID | chunk 2 size | reserved | reserved | chunk 2 data | -+ * ... -+ * -+ */ -+ -+#define LIMA_DUMP_MAJOR 1 -+#define LIMA_DUMP_MINOR 0 -+ -+#define LIMA_DUMP_MAGIC 0x414d494c -+ -+struct lima_dump_head { -+ __u32 magic; -+ __u16 version_major; -+ __u16 version_minor; -+ __u32 num_tasks; -+ __u32 size; -+ __u32 reserved[4]; -+}; -+ -+#define LIMA_DUMP_TASK_GP 0 -+#define LIMA_DUMP_TASK_PP 1 -+#define LIMA_DUMP_TASK_NUM 2 -+ -+struct lima_dump_task { -+ __u32 id; -+ __u32 size; -+ __u32 num_chunks; -+ __u32 reserved; -+}; -+ -+#define LIMA_DUMP_CHUNK_FRAME 0 -+#define LIMA_DUMP_CHUNK_BUFFER 1 -+#define LIMA_DUMP_CHUNK_PROCESS_NAME 2 -+#define LIMA_DUMP_CHUNK_PROCESS_ID 3 -+#define LIMA_DUMP_CHUNK_NUM 4 -+ -+struct lima_dump_chunk { -+ __u32 id; -+ __u32 size; -+ __u32 reserved[2]; -+}; -+ -+struct lima_dump_chunk_buffer { -+ __u32 id; -+ __u32 size; -+ __u32 va; -+ __u32 reserved; -+}; -+ -+struct lima_dump_chunk_pid { -+ __u32 id; -+ __u32 size; -+ __u32 pid; -+ __u32 reserved; -+}; -+ -+#endif -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index 3886999b4533..86192422a689 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -4,6 +4,7 @@ - #include - #include - #include -+#include - - #include "lima_drv.h" - #include "lima_sched.h" -@@ -256,6 +257,133 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - return task->fence; - } - -+static void lima_sched_build_error_task_list(struct lima_sched_task *task) -+{ -+ struct lima_sched_error_task *et; -+ struct lima_sched_pipe *pipe = to_lima_pipe(task->base.sched); -+ struct lima_ip *ip = pipe->processor[0]; -+ int pipe_id = ip->id == lima_ip_gp ? lima_pipe_gp : lima_pipe_pp; -+ struct lima_device *dev = ip->dev; -+ struct lima_sched_context *sched_ctx = -+ container_of(task->base.entity, -+ struct lima_sched_context, base); -+ struct lima_ctx *ctx = -+ container_of(sched_ctx, struct lima_ctx, context[pipe_id]); -+ struct lima_dump_task *dt; -+ struct lima_dump_chunk *chunk; -+ struct lima_dump_chunk_pid *pid_chunk; -+ struct lima_dump_chunk_buffer *buffer_chunk; -+ u32 size, task_size, mem_size; -+ int i; -+ -+ mutex_lock(&dev->error_task_list_lock); -+ -+ if (dev->dump.num_tasks >= lima_max_error_tasks) { -+ dev_info(dev->dev, "fail to save task state: error task list is full\n"); -+ goto out; -+ } -+ -+ /* frame chunk */ -+ size = sizeof(struct lima_dump_chunk) + pipe->frame_size; -+ /* process name chunk */ -+ size += sizeof(struct lima_dump_chunk) + sizeof(ctx->pname); -+ /* pid chunk */ -+ size += sizeof(struct lima_dump_chunk); -+ /* buffer chunks */ -+ for (i = 0; i < task->num_bos; i++) { -+ struct lima_bo *bo = task->bos[i]; -+ -+ size += sizeof(struct lima_dump_chunk); -+ size += bo->heap_size ? bo->heap_size : lima_bo_size(bo); -+ } -+ -+ task_size = size + sizeof(struct lima_dump_task); -+ mem_size = task_size + sizeof(*et); -+ et = kvmalloc(mem_size, GFP_KERNEL); -+ if (!et) { -+ dev_err(dev->dev, "fail to alloc task dump buffer of size %x\n", -+ mem_size); -+ goto out; -+ } -+ -+ et->data = et + 1; -+ et->size = task_size; -+ -+ dt = et->data; -+ memset(dt, 0, sizeof(*dt)); -+ dt->id = pipe_id; -+ dt->size = size; -+ -+ chunk = (struct lima_dump_chunk *)(dt + 1); -+ memset(chunk, 0, sizeof(*chunk)); -+ chunk->id = LIMA_DUMP_CHUNK_FRAME; -+ chunk->size = pipe->frame_size; -+ memcpy(chunk + 1, task->frame, pipe->frame_size); -+ dt->num_chunks++; -+ -+ chunk = (void *)(chunk + 1) + chunk->size; -+ memset(chunk, 0, sizeof(*chunk)); -+ chunk->id = LIMA_DUMP_CHUNK_PROCESS_NAME; -+ chunk->size = sizeof(ctx->pname); -+ memcpy(chunk + 1, ctx->pname, sizeof(ctx->pname)); -+ dt->num_chunks++; -+ -+ pid_chunk = (void *)(chunk + 1) + chunk->size; -+ memset(pid_chunk, 0, sizeof(*pid_chunk)); -+ pid_chunk->id = LIMA_DUMP_CHUNK_PROCESS_ID; -+ pid_chunk->pid = ctx->pid; -+ dt->num_chunks++; -+ -+ buffer_chunk = (void *)(pid_chunk + 1) + pid_chunk->size; -+ for (i = 0; i < task->num_bos; i++) { -+ struct lima_bo *bo = task->bos[i]; -+ void *data; -+ -+ memset(buffer_chunk, 0, sizeof(*buffer_chunk)); -+ buffer_chunk->id = LIMA_DUMP_CHUNK_BUFFER; -+ buffer_chunk->va = lima_vm_get_va(task->vm, bo); -+ -+ if (bo->heap_size) { -+ buffer_chunk->size = bo->heap_size; -+ -+ data = vmap(bo->base.pages, bo->heap_size >> PAGE_SHIFT, -+ VM_MAP, pgprot_writecombine(PAGE_KERNEL)); -+ if (!data) { -+ kvfree(et); -+ goto out; -+ } -+ -+ memcpy(buffer_chunk + 1, data, buffer_chunk->size); -+ -+ vunmap(data); -+ } else { -+ buffer_chunk->size = lima_bo_size(bo); -+ -+ data = drm_gem_shmem_vmap(&bo->base.base); -+ if (IS_ERR_OR_NULL(data)) { -+ kvfree(et); -+ goto out; -+ } -+ -+ memcpy(buffer_chunk + 1, data, buffer_chunk->size); -+ -+ drm_gem_shmem_vunmap(&bo->base.base, data); -+ } -+ -+ buffer_chunk = (void *)(buffer_chunk + 1) + buffer_chunk->size; -+ dt->num_chunks++; -+ } -+ -+ list_add(&et->list, &dev->error_task_list); -+ dev->dump.size += et->size; -+ dev->dump.num_tasks++; -+ -+ dev_info(dev->dev, "save error task state success\n"); -+ -+out: -+ mutex_unlock(&dev->error_task_list_lock); -+} -+ - static void lima_sched_timedout_job(struct drm_sched_job *job) - { - struct lima_sched_pipe *pipe = to_lima_pipe(job->sched); -@@ -268,6 +396,8 @@ static void lima_sched_timedout_job(struct drm_sched_job *job) - - drm_sched_increase_karma(&task->base); - -+ lima_sched_build_error_task_list(task); -+ - pipe->task_error(pipe); - - if (pipe->bcast_mmu) -diff --git a/drivers/gpu/drm/lima/lima_sched.h b/drivers/gpu/drm/lima/lima_sched.h -index d64393fb50a9..a1496cb7bc41 100644 ---- a/drivers/gpu/drm/lima/lima_sched.h -+++ b/drivers/gpu/drm/lima/lima_sched.h -@@ -5,9 +5,16 @@ - #define __LIMA_SCHED_H__ - - #include -+#include - - struct lima_vm; - -+struct lima_sched_error_task { -+ struct list_head list; -+ void *data; -+ u32 size; -+}; -+ - struct lima_sched_task { - struct drm_sched_job base; - - -From ac6495c5c05c06f4e84fe746ec11227b99f127ba Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Sat, 22 Feb 2020 10:42:09 +0800 -Subject: [PATCH] drm/lima: add error sysfs to export error task dump - -Export /sys/class/drm/cardX/device/error sysfs for user read out -error task dump file. - -Tested-by: Andreas Baierl -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200222024210.18697-5-yuq825@gmail.com -(cherry picked from commit 57b517cecea05f35fd4a1a00708f9255db7382c8) ---- - drivers/gpu/drm/lima/lima_drv.c | 94 +++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 94 insertions(+) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index e235d4545b6c..97ed70c36340 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -276,6 +276,93 @@ static struct drm_driver lima_drm_driver = { - .gem_prime_mmap = drm_gem_prime_mmap, - }; - -+struct lima_block_reader { -+ void *dst; -+ size_t base; -+ size_t count; -+ size_t off; -+ ssize_t read; -+}; -+ -+static bool lima_read_block(struct lima_block_reader *reader, -+ void *src, size_t src_size) -+{ -+ size_t max_off = reader->base + src_size; -+ -+ if (reader->off < max_off) { -+ size_t size = min_t(size_t, max_off - reader->off, -+ reader->count); -+ -+ memcpy(reader->dst, src + (reader->off - reader->base), size); -+ -+ reader->dst += size; -+ reader->off += size; -+ reader->read += size; -+ reader->count -= size; -+ } -+ -+ reader->base = max_off; -+ -+ return !!reader->count; -+} -+ -+static ssize_t lima_error_state_read(struct file *filp, struct kobject *kobj, -+ struct bin_attribute *attr, char *buf, -+ loff_t off, size_t count) -+{ -+ struct device *dev = kobj_to_dev(kobj); -+ struct lima_device *ldev = dev_get_drvdata(dev); -+ struct lima_sched_error_task *et; -+ struct lima_block_reader reader = { -+ .dst = buf, -+ .count = count, -+ .off = off, -+ }; -+ -+ mutex_lock(&ldev->error_task_list_lock); -+ -+ if (lima_read_block(&reader, &ldev->dump, sizeof(ldev->dump))) { -+ list_for_each_entry(et, &ldev->error_task_list, list) { -+ if (!lima_read_block(&reader, et->data, et->size)) -+ break; -+ } -+ } -+ -+ mutex_unlock(&ldev->error_task_list_lock); -+ return reader.read; -+} -+ -+static ssize_t lima_error_state_write(struct file *file, struct kobject *kobj, -+ struct bin_attribute *attr, char *buf, -+ loff_t off, size_t count) -+{ -+ struct device *dev = kobj_to_dev(kobj); -+ struct lima_device *ldev = dev_get_drvdata(dev); -+ struct lima_sched_error_task *et, *tmp; -+ -+ mutex_lock(&ldev->error_task_list_lock); -+ -+ list_for_each_entry_safe(et, tmp, &ldev->error_task_list, list) { -+ list_del(&et->list); -+ kvfree(et); -+ } -+ -+ ldev->dump.size = 0; -+ ldev->dump.num_tasks = 0; -+ -+ mutex_unlock(&ldev->error_task_list_lock); -+ -+ return count; -+} -+ -+static const struct bin_attribute lima_error_state_attr = { -+ .attr.name = "error", -+ .attr.mode = 0600, -+ .size = 0, -+ .read = lima_error_state_read, -+ .write = lima_error_state_write, -+}; -+ - static int lima_pdev_probe(struct platform_device *pdev) - { - struct lima_device *ldev; -@@ -318,6 +405,11 @@ static int lima_pdev_probe(struct platform_device *pdev) - if (err < 0) - goto err_out2; - -+ platform_set_drvdata(pdev, ldev); -+ -+ if (sysfs_create_bin_file(&ldev->dev->kobj, &lima_error_state_attr)) -+ dev_warn(ldev->dev, "fail to create error state sysfs\n"); -+ - return 0; - - err_out2: -@@ -334,6 +426,8 @@ static int lima_pdev_remove(struct platform_device *pdev) - struct lima_device *ldev = platform_get_drvdata(pdev); - struct drm_device *ddev = ldev->ddev; - -+ sysfs_remove_bin_file(&ldev->dev->kobj, &lima_error_state_attr); -+ platform_set_drvdata(pdev, NULL); - drm_dev_unregister(ddev); - lima_device_fini(ldev); - drm_dev_put(ddev); - -From 1cccc638000e02f6dc64ad2707a9c2a2458cb283 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Sat, 7 Mar 2020 21:54:38 +0800 -Subject: [PATCH] drm/lima: add trace point for tasks - -track lima task start which can be combined with -dma_fence_signal to identify task execution time. - -example command to record: - -trace-cmd record -i \ - -e "lima:lima_task_submit" -e "lima:lima_task_run" \ - -e "*fence:*fence_signaled" -e "drm:drm_vblank_event" \ - -e "drm:drm_vblank_event_queued" sleep 4 - -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200307135438.9981-1-yuq825@gmail.com -(cherry picked from commit 7f60c4b9d964f604262327a0bfdbfd1721288ef8) ---- - drivers/gpu/drm/lima/Makefile | 3 ++- - drivers/gpu/drm/lima/lima_sched.c | 5 +++- - drivers/gpu/drm/lima/lima_sched.h | 1 + - drivers/gpu/drm/lima/lima_trace.c | 7 ++++++ - drivers/gpu/drm/lima/lima_trace.h | 50 +++++++++++++++++++++++++++++++++++++++ - 5 files changed, 64 insertions(+), 2 deletions(-) - create mode 100644 drivers/gpu/drm/lima/lima_trace.c - create mode 100644 drivers/gpu/drm/lima/lima_trace.h - -diff --git a/drivers/gpu/drm/lima/Makefile b/drivers/gpu/drm/lima/Makefile -index a85444b0a1d4..6e7b788408e8 100644 ---- a/drivers/gpu/drm/lima/Makefile -+++ b/drivers/gpu/drm/lima/Makefile -@@ -14,6 +14,7 @@ lima-y := \ - lima_sched.o \ - lima_ctx.o \ - lima_dlbu.o \ -- lima_bcast.o -+ lima_bcast.o \ -+ lima_trace.o - - obj-$(CONFIG_DRM_LIMA) += lima.o -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index 86192422a689..4fbf2c489507 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -3,7 +3,6 @@ - - #include - #include --#include - #include - - #include "lima_drv.h" -@@ -12,6 +11,7 @@ - #include "lima_mmu.h" - #include "lima_l2_cache.h" - #include "lima_gem.h" -+#include "lima_trace.h" - - struct lima_fence { - struct dma_fence base; -@@ -177,6 +177,7 @@ struct dma_fence *lima_sched_context_queue_task(struct lima_sched_context *conte - { - struct dma_fence *fence = dma_fence_get(&task->base.s_fence->finished); - -+ trace_lima_task_submit(task); - drm_sched_entity_push_job(&task->base, &context->base); - return fence; - } -@@ -251,6 +252,8 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - if (last_vm) - lima_vm_put(last_vm); - -+ trace_lima_task_run(task); -+ - pipe->error = false; - pipe->task_run(pipe, task); - -diff --git a/drivers/gpu/drm/lima/lima_sched.h b/drivers/gpu/drm/lima/lima_sched.h -index a1496cb7bc41..02dfa14d7083 100644 ---- a/drivers/gpu/drm/lima/lima_sched.h -+++ b/drivers/gpu/drm/lima/lima_sched.h -@@ -6,6 +6,7 @@ - - #include - #include -+#include - - struct lima_vm; - -diff --git a/drivers/gpu/drm/lima/lima_trace.c b/drivers/gpu/drm/lima/lima_trace.c -new file mode 100644 -index 000000000000..ea1c7289bebc ---- /dev/null -+++ b/drivers/gpu/drm/lima/lima_trace.c -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: GPL-2.0 OR MIT -+/* Copyright 2020 Qiang Yu */ -+ -+#include "lima_sched.h" -+ -+#define CREATE_TRACE_POINTS -+#include "lima_trace.h" -diff --git a/drivers/gpu/drm/lima/lima_trace.h b/drivers/gpu/drm/lima/lima_trace.h -new file mode 100644 -index 000000000000..3a430e93d384 ---- /dev/null -+++ b/drivers/gpu/drm/lima/lima_trace.h -@@ -0,0 +1,50 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR MIT */ -+/* Copyright 2020 Qiang Yu */ -+ -+#if !defined(_LIMA_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) -+#define _LIMA_TRACE_H_ -+ -+#include -+ -+#undef TRACE_SYSTEM -+#define TRACE_SYSTEM lima -+#define TRACE_INCLUDE_FILE lima_trace -+ -+DECLARE_EVENT_CLASS(lima_task, -+ TP_PROTO(struct lima_sched_task *task), -+ TP_ARGS(task), -+ TP_STRUCT__entry( -+ __field(uint64_t, task_id) -+ __field(unsigned int, context) -+ __field(unsigned int, seqno) -+ __string(pipe, task->base.sched->name) -+ ), -+ -+ TP_fast_assign( -+ __entry->task_id = task->base.id; -+ __entry->context = task->base.s_fence->finished.context; -+ __entry->seqno = task->base.s_fence->finished.seqno; -+ __assign_str(pipe, task->base.sched->name) -+ ), -+ -+ TP_printk("task=%llu, context=%u seqno=%u pipe=%s", -+ __entry->task_id, __entry->context, __entry->seqno, -+ __get_str(pipe)) -+); -+ -+DEFINE_EVENT(lima_task, lima_task_submit, -+ TP_PROTO(struct lima_sched_task *task), -+ TP_ARGS(task) -+); -+ -+DEFINE_EVENT(lima_task, lima_task_run, -+ TP_PROTO(struct lima_sched_task *task), -+ TP_ARGS(task) -+); -+ -+#endif -+ -+/* This part must be outside protection */ -+#undef TRACE_INCLUDE_PATH -+#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/lima -+#include - -From ab3fb4a5301fa97b5ccdb8c66906a3dd6d73488c Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Thu, 5 Mar 2020 00:25:10 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: do not force "none" scan mode - -Setting scan mode to "none" confuses some TVs like LG B8, which randomly -change overscan percentage over time. Digital outputs like HDMI and DVI, -handled by this controller, don't really need overscan, so we can always -set scan mode to underscan. Actually, this is exactly what -drm_hdmi_avi_infoframe_from_display_mode() already does, so we can just -remove offending line. - -Reviewed-by: Neil Armstrong -Acked-by: Laurent Pinchart -Signed-off-by: Jonas Karlman -[updated commit message] -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-3-jernej.skrabec@siol.net -(cherry picked from commit 6b633e3efbb45b574bdd803ebdddc8e010758a95) ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 383b1073d7de..cb4d7bed2d9c 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1654,8 +1654,6 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; - } - -- frame.scan_mode = HDMI_SCAN_MODE_NONE; -- - /* - * The Designware IP uses a different byte format from standard - * AVI info frames, though generally the bits are in the correct - -From bf75586c3a0f9f2c4eb81150aba797a5ba4b94c8 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 5 Mar 2020 00:25:11 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: Add support for RGB limited range - -CEA 861 standard requestis that RGB quantization range is "limited" for -CEA modes. Support that by adding CSC matrix which downscales values. - -This allows proper color reproduction on TV and PC monitor at the same -time. In future, override property can be added, like "Broadcast RGB" -in i915 driver. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-4-jernej.skrabec@siol.net -(cherry picked from commit 86af379ebca2ef0b01d998a49e531cd495dcf9a3) ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 ++++++++++++++++++++++--------- - 1 file changed, 46 insertions(+), 17 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index cb4d7bed2d9c..164ee8c353ab 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -92,6 +92,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { - { 0x6756, 0x78ab, 0x2000, 0x0200 } - }; - -+static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { -+ { 0x1b7c, 0x0000, 0x0000, 0x0020 }, -+ { 0x0000, 0x1b7c, 0x0000, 0x0020 }, -+ { 0x0000, 0x0000, 0x1b7c, 0x0020 } -+}; -+ - struct hdmi_vmode { - bool mdataenablepolarity; - -@@ -109,6 +115,7 @@ struct hdmi_data_info { - unsigned int pix_repet_factor; - unsigned int hdcp_enable; - struct hdmi_vmode video_mode; -+ bool rgb_limited_range; - }; - - struct dw_hdmi_i2c { -@@ -956,7 +963,11 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format; -+ return (hdmi->hdmi_data.enc_in_bus_format != -+ hdmi->hdmi_data.enc_out_bus_format) || -+ (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -+ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && -+ hdmi->hdmi_data.rgb_limited_range); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -986,25 +997,27 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) - static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - { - const u16 (*csc_coeff)[3][4] = &csc_coeff_default; -+ bool is_input_rgb, is_output_rgb; - unsigned i; - u32 csc_scale = 1; - -- if (is_color_space_conversion(hdmi)) { -- if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -- if (hdmi->hdmi_data.enc_out_encoding == -- V4L2_YCBCR_ENC_601) -- csc_coeff = &csc_coeff_rgb_out_eitu601; -- else -- csc_coeff = &csc_coeff_rgb_out_eitu709; -- } else if (hdmi_bus_fmt_is_rgb( -- hdmi->hdmi_data.enc_in_bus_format)) { -- if (hdmi->hdmi_data.enc_out_encoding == -- V4L2_YCBCR_ENC_601) -- csc_coeff = &csc_coeff_rgb_in_eitu601; -- else -- csc_coeff = &csc_coeff_rgb_in_eitu709; -- csc_scale = 0; -- } -+ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format); -+ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format); -+ -+ if (!is_input_rgb && is_output_rgb) { -+ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) -+ csc_coeff = &csc_coeff_rgb_out_eitu601; -+ else -+ csc_coeff = &csc_coeff_rgb_out_eitu709; -+ } else if (is_input_rgb && !is_output_rgb) { -+ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) -+ csc_coeff = &csc_coeff_rgb_in_eitu601; -+ else -+ csc_coeff = &csc_coeff_rgb_in_eitu709; -+ csc_scale = 0; -+ } else if (is_input_rgb && is_output_rgb && -+ hdmi->hdmi_data.rgb_limited_range) { -+ csc_coeff = &csc_coeff_rgb_full_to_rgb_limited; - } - - /* The CSC registers are sequential, alternating MSB then LSB */ -@@ -1614,6 +1627,18 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - drm_hdmi_avi_infoframe_from_display_mode(&frame, - &hdmi->connector, mode); - -+ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -+ drm_hdmi_avi_infoframe_quant_range(&frame, &hdmi->connector, -+ mode, -+ hdmi->hdmi_data.rgb_limited_range ? -+ HDMI_QUANTIZATION_RANGE_LIMITED : -+ HDMI_QUANTIZATION_RANGE_FULL); -+ } else { -+ frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; -+ frame.ycc_quantization_range = -+ HDMI_YCC_QUANTIZATION_RANGE_LIMITED; -+ } -+ - if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) - frame.colorspace = HDMI_COLORSPACE_YUV444; - else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) -@@ -2117,6 +2142,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_FIXED) - hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; - -+ hdmi->hdmi_data.rgb_limited_range = hdmi->sink_is_hdmi && -+ drm_default_rgb_quant_range(mode) == -+ HDMI_QUANTIZATION_RANGE_LIMITED; -+ - hdmi->hdmi_data.pix_repet_factor = 0; - hdmi->hdmi_data.hdcp_enable = 0; - hdmi->hdmi_data.video_mode.mdataenablepolarity = true; - -From cc76b13e07c2e7900bf2963f23fb469517dfa1ec Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 5 Mar 2020 00:25:12 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: rework csc related functions - -is_color_space_conversion() is a misnomer. It checks not only if color -space conversion is needed, but also if format conversion is needed. -This is actually desired behaviour because result of this function -determines if CSC block should be enabled or not (CSC block can also do -format conversion). - -In order to clear misunderstandings, let's rework -is_color_space_conversion() to do exactly what is supposed to do and add -another function which will determine if CSC block must be enabled or -not. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-5-jernej.skrabec@siol.net -(cherry picked from commit 0e8003076aca7b29c868e923e73f332cca12ed8b) ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 31 +++++++++++++++++++++---------- - 1 file changed, 21 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 164ee8c353ab..30681398cfb0 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -963,11 +963,14 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return (hdmi->hdmi_data.enc_in_bus_format != -- hdmi->hdmi_data.enc_out_bus_format) || -- (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -- hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && -- hdmi->hdmi_data.rgb_limited_range); -+ struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; -+ bool is_input_rgb, is_output_rgb; -+ -+ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_in_bus_format); -+ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_out_bus_format); -+ -+ return (is_input_rgb != is_output_rgb) || -+ (is_input_rgb && is_output_rgb && hdmi_data->rgb_limited_range); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -994,6 +997,13 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) - return 0; - } - -+static bool is_csc_needed(struct dw_hdmi *hdmi) -+{ -+ return is_color_space_conversion(hdmi) || -+ is_color_space_decimation(hdmi) || -+ is_color_space_interpolation(hdmi); -+} -+ - static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - { - const u16 (*csc_coeff)[3][4] = &csc_coeff_default; -@@ -2033,18 +2043,19 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) - hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); - - /* Enable csc path */ -- if (is_color_space_conversion(hdmi)) { -+ if (is_csc_needed(hdmi)) { - hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; - hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); -- } - -- /* Enable color space conversion if needed */ -- if (is_color_space_conversion(hdmi)) - hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH, - HDMI_MC_FLOWCTRL); -- else -+ } else { -+ hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CSCCLK_DISABLE; -+ hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); -+ - hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, - HDMI_MC_FLOWCTRL); -+ } - } - - /* Workaround to clear the overflow condition */ - -From 42c7d0e07348361a6d5d12a5012c8f4845d7a740 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Thu, 19 Mar 2020 21:34:27 +0100 -Subject: [PATCH] drm/lima: Add optional devfreq and cooling device support - -Most platforms with a Mali-400 or Mali-450 GPU also have support for -changing the GPU clock frequency. Add devfreq support so the GPU clock -rate is updated based on the actual GPU usage when the -"operating-points-v2" property is present in the board.dts. - -The actual devfreq code is taken from panfrost_devfreq.c and modified so -it matches what the lima hardware needs: -- a call to dev_pm_opp_set_clkname() during initialization because there - are two clocks on Mali-4x0 IPs. "core" is the one that actually clocks - the GPU so we need to control it using devfreq. -- locking when reading or writing the devfreq statistics because (unlike - than panfrost) we have multiple PP and GP IRQs which may finish jobs - concurrently. - -Signed-off-by: Martin Blumenstingl -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200319203427.2259891-3-martin.blumenstingl@googlemail.com -(cherry picked from commit 1996970773a323533e1cc1b6b97f00a95d675f32) ---- - drivers/gpu/drm/lima/Kconfig | 2 + - drivers/gpu/drm/lima/Makefile | 3 +- - drivers/gpu/drm/lima/lima_devfreq.c | 234 ++++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/lima/lima_devfreq.h | 41 +++++++ - drivers/gpu/drm/lima/lima_device.c | 4 + - drivers/gpu/drm/lima/lima_device.h | 3 + - drivers/gpu/drm/lima/lima_drv.c | 14 ++- - drivers/gpu/drm/lima/lima_sched.c | 7 ++ - drivers/gpu/drm/lima/lima_sched.h | 3 + - 9 files changed, 308 insertions(+), 3 deletions(-) - create mode 100644 drivers/gpu/drm/lima/lima_devfreq.c - create mode 100644 drivers/gpu/drm/lima/lima_devfreq.h - -diff --git a/drivers/gpu/drm/lima/Kconfig b/drivers/gpu/drm/lima/Kconfig -index d589f09d04d9..fa1d4f5df31e 100644 ---- a/drivers/gpu/drm/lima/Kconfig -+++ b/drivers/gpu/drm/lima/Kconfig -@@ -10,5 +10,7 @@ config DRM_LIMA - depends on OF - select DRM_SCHED - select DRM_GEM_SHMEM_HELPER -+ select PM_DEVFREQ -+ select DEVFREQ_GOV_SIMPLE_ONDEMAND - help - DRM driver for ARM Mali 400/450 GPUs. -diff --git a/drivers/gpu/drm/lima/Makefile b/drivers/gpu/drm/lima/Makefile -index 6e7b788408e8..ca2097b8e1ad 100644 ---- a/drivers/gpu/drm/lima/Makefile -+++ b/drivers/gpu/drm/lima/Makefile -@@ -15,6 +15,7 @@ lima-y := \ - lima_ctx.o \ - lima_dlbu.o \ - lima_bcast.o \ -- lima_trace.o -+ lima_trace.o \ -+ lima_devfreq.o - - obj-$(CONFIG_DRM_LIMA) += lima.o -diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c -new file mode 100644 -index 000000000000..8c4d21d07529 ---- /dev/null -+++ b/drivers/gpu/drm/lima/lima_devfreq.c -@@ -0,0 +1,234 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2020 Martin Blumenstingl -+ * -+ * Based on panfrost_devfreq.c: -+ * Copyright 2019 Collabora ltd. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "lima_device.h" -+#include "lima_devfreq.h" -+ -+static void lima_devfreq_update_utilization(struct lima_devfreq *devfreq) -+{ -+ ktime_t now, last; -+ -+ now = ktime_get(); -+ last = devfreq->time_last_update; -+ -+ if (devfreq->busy_count > 0) -+ devfreq->busy_time += ktime_sub(now, last); -+ else -+ devfreq->idle_time += ktime_sub(now, last); -+ -+ devfreq->time_last_update = now; -+} -+ -+static int lima_devfreq_target(struct device *dev, unsigned long *freq, -+ u32 flags) -+{ -+ struct dev_pm_opp *opp; -+ int err; -+ -+ opp = devfreq_recommended_opp(dev, freq, flags); -+ if (IS_ERR(opp)) -+ return PTR_ERR(opp); -+ dev_pm_opp_put(opp); -+ -+ err = dev_pm_opp_set_rate(dev, *freq); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+static void lima_devfreq_reset(struct lima_devfreq *devfreq) -+{ -+ devfreq->busy_time = 0; -+ devfreq->idle_time = 0; -+ devfreq->time_last_update = ktime_get(); -+} -+ -+static int lima_devfreq_get_dev_status(struct device *dev, -+ struct devfreq_dev_status *status) -+{ -+ struct lima_device *ldev = dev_get_drvdata(dev); -+ struct lima_devfreq *devfreq = &ldev->devfreq; -+ unsigned long irqflags; -+ -+ status->current_frequency = clk_get_rate(ldev->clk_gpu); -+ -+ spin_lock_irqsave(&devfreq->lock, irqflags); -+ -+ lima_devfreq_update_utilization(devfreq); -+ -+ status->total_time = ktime_to_ns(ktime_add(devfreq->busy_time, -+ devfreq->idle_time)); -+ status->busy_time = ktime_to_ns(devfreq->busy_time); -+ -+ lima_devfreq_reset(devfreq); -+ -+ spin_unlock_irqrestore(&devfreq->lock, irqflags); -+ -+ dev_dbg(ldev->dev, "busy %lu total %lu %lu %% freq %lu MHz\n", -+ status->busy_time, status->total_time, -+ status->busy_time / (status->total_time / 100), -+ status->current_frequency / 1000 / 1000); -+ -+ return 0; -+} -+ -+static struct devfreq_dev_profile lima_devfreq_profile = { -+ .polling_ms = 50, /* ~3 frames */ -+ .target = lima_devfreq_target, -+ .get_dev_status = lima_devfreq_get_dev_status, -+}; -+ -+void lima_devfreq_fini(struct lima_device *ldev) -+{ -+ struct lima_devfreq *devfreq = &ldev->devfreq; -+ -+ if (devfreq->cooling) { -+ devfreq_cooling_unregister(devfreq->cooling); -+ devfreq->cooling = NULL; -+ } -+ -+ if (devfreq->devfreq) { -+ devm_devfreq_remove_device(&ldev->pdev->dev, -+ devfreq->devfreq); -+ devfreq->devfreq = NULL; -+ } -+ -+ if (devfreq->opp_of_table_added) { -+ dev_pm_opp_of_remove_table(&ldev->pdev->dev); -+ devfreq->opp_of_table_added = false; -+ } -+ -+ if (devfreq->regulators_opp_table) { -+ dev_pm_opp_put_regulators(devfreq->regulators_opp_table); -+ devfreq->regulators_opp_table = NULL; -+ } -+ -+ if (devfreq->clkname_opp_table) { -+ dev_pm_opp_put_clkname(devfreq->clkname_opp_table); -+ devfreq->clkname_opp_table = NULL; -+ } -+} -+ -+int lima_devfreq_init(struct lima_device *ldev) -+{ -+ struct thermal_cooling_device *cooling; -+ struct device *dev = &ldev->pdev->dev; -+ struct opp_table *opp_table; -+ struct devfreq *devfreq; -+ struct lima_devfreq *ldevfreq = &ldev->devfreq; -+ struct dev_pm_opp *opp; -+ unsigned long cur_freq; -+ int ret; -+ -+ if (!device_property_present(dev, "operating-points-v2")) -+ /* Optional, continue without devfreq */ -+ return 0; -+ -+ spin_lock_init(&ldevfreq->lock); -+ -+ opp_table = dev_pm_opp_set_clkname(dev, "core"); -+ if (IS_ERR(opp_table)) { -+ ret = PTR_ERR(opp_table); -+ goto err_fini; -+ } -+ -+ ldevfreq->clkname_opp_table = opp_table; -+ -+ opp_table = dev_pm_opp_set_regulators(dev, -+ (const char *[]){ "mali" }, -+ 1); -+ if (IS_ERR(opp_table)) { -+ ret = PTR_ERR(opp_table); -+ -+ /* Continue if the optional regulator is missing */ -+ if (ret != -ENODEV) -+ goto err_fini; -+ } else { -+ ldevfreq->regulators_opp_table = opp_table; -+ } -+ -+ ret = dev_pm_opp_of_add_table(dev); -+ if (ret) -+ goto err_fini; -+ ldevfreq->opp_of_table_added = true; -+ -+ lima_devfreq_reset(ldevfreq); -+ -+ cur_freq = clk_get_rate(ldev->clk_gpu); -+ -+ opp = devfreq_recommended_opp(dev, &cur_freq, 0); -+ if (IS_ERR(opp)) { -+ ret = PTR_ERR(opp); -+ goto err_fini; -+ } -+ -+ lima_devfreq_profile.initial_freq = cur_freq; -+ dev_pm_opp_put(opp); -+ -+ devfreq = devm_devfreq_add_device(dev, &lima_devfreq_profile, -+ DEVFREQ_GOV_SIMPLE_ONDEMAND, NULL); -+ if (IS_ERR(devfreq)) { -+ dev_err(dev, "Couldn't initialize GPU devfreq\n"); -+ ret = PTR_ERR(devfreq); -+ goto err_fini; -+ } -+ -+ ldevfreq->devfreq = devfreq; -+ -+ cooling = of_devfreq_cooling_register(dev->of_node, devfreq); -+ if (IS_ERR(cooling)) -+ dev_info(dev, "Failed to register cooling device\n"); -+ else -+ ldevfreq->cooling = cooling; -+ -+ return 0; -+ -+err_fini: -+ lima_devfreq_fini(ldev); -+ return ret; -+} -+ -+void lima_devfreq_record_busy(struct lima_devfreq *devfreq) -+{ -+ unsigned long irqflags; -+ -+ if (!devfreq->devfreq) -+ return; -+ -+ spin_lock_irqsave(&devfreq->lock, irqflags); -+ -+ lima_devfreq_update_utilization(devfreq); -+ -+ devfreq->busy_count++; -+ -+ spin_unlock_irqrestore(&devfreq->lock, irqflags); -+} -+ -+void lima_devfreq_record_idle(struct lima_devfreq *devfreq) -+{ -+ unsigned long irqflags; -+ -+ if (!devfreq->devfreq) -+ return; -+ -+ spin_lock_irqsave(&devfreq->lock, irqflags); -+ -+ lima_devfreq_update_utilization(devfreq); -+ -+ WARN_ON(--devfreq->busy_count < 0); -+ -+ spin_unlock_irqrestore(&devfreq->lock, irqflags); -+} -diff --git a/drivers/gpu/drm/lima/lima_devfreq.h b/drivers/gpu/drm/lima/lima_devfreq.h -new file mode 100644 -index 000000000000..8d71ba9fb22a ---- /dev/null -+++ b/drivers/gpu/drm/lima/lima_devfreq.h -@@ -0,0 +1,41 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* Copyright 2020 Martin Blumenstingl */ -+ -+#ifndef __LIMA_DEVFREQ_H__ -+#define __LIMA_DEVFREQ_H__ -+ -+#include -+#include -+ -+struct devfreq; -+struct opp_table; -+struct thermal_cooling_device; -+ -+struct lima_device; -+ -+struct lima_devfreq { -+ struct devfreq *devfreq; -+ struct opp_table *clkname_opp_table; -+ struct opp_table *regulators_opp_table; -+ struct thermal_cooling_device *cooling; -+ bool opp_of_table_added; -+ -+ ktime_t busy_time; -+ ktime_t idle_time; -+ ktime_t time_last_update; -+ int busy_count; -+ /* -+ * Protect busy_time, idle_time, time_last_update and busy_count -+ * because these can be updated concurrently, for example by the GP -+ * and PP interrupts. -+ */ -+ spinlock_t lock; -+}; -+ -+int lima_devfreq_init(struct lima_device *ldev); -+void lima_devfreq_fini(struct lima_device *ldev); -+ -+void lima_devfreq_record_busy(struct lima_devfreq *devfreq); -+void lima_devfreq_record_idle(struct lima_devfreq *devfreq); -+ -+#endif -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index 42a00171fea5..247f51fd40a2 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -214,6 +214,8 @@ static int lima_init_gp_pipe(struct lima_device *dev) - struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; - int err; - -+ pipe->ldev = dev; -+ - err = lima_sched_pipe_init(pipe, "gp"); - if (err) - return err; -@@ -244,6 +246,8 @@ static int lima_init_pp_pipe(struct lima_device *dev) - struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp; - int err, i; - -+ pipe->ldev = dev; -+ - err = lima_sched_pipe_init(pipe, "pp"); - if (err) - return err; -diff --git a/drivers/gpu/drm/lima/lima_device.h b/drivers/gpu/drm/lima/lima_device.h -index f17173f47f26..06fd9636dd72 100644 ---- a/drivers/gpu/drm/lima/lima_device.h -+++ b/drivers/gpu/drm/lima/lima_device.h -@@ -11,6 +11,7 @@ - - #include "lima_sched.h" - #include "lima_dump.h" -+#include "lima_devfreq.h" - - enum lima_gpu_id { - lima_gpu_mali400 = 0, -@@ -98,6 +99,8 @@ struct lima_device { - u32 *dlbu_cpu; - dma_addr_t dlbu_dma; - -+ struct lima_devfreq devfreq; -+ - /* debug info */ - struct lima_dump_head dump; - struct list_head error_task_list; -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 97ed70c36340..bbbdc8455e2f 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -10,6 +10,7 @@ - #include - #include - -+#include "lima_device.h" - #include "lima_drv.h" - #include "lima_gem.h" - #include "lima_vm.h" -@@ -397,13 +398,19 @@ static int lima_pdev_probe(struct platform_device *pdev) - if (err) - goto err_out1; - -+ err = lima_devfreq_init(ldev); -+ if (err) { -+ dev_err(&pdev->dev, "Fatal error during devfreq init\n"); -+ goto err_out2; -+ } -+ - /* - * Register the DRM device with the core and the connectors with - * sysfs. - */ - err = drm_dev_register(ddev, 0); - if (err < 0) -- goto err_out2; -+ goto err_out3; - - platform_set_drvdata(pdev, ldev); - -@@ -412,8 +419,10 @@ static int lima_pdev_probe(struct platform_device *pdev) - - return 0; - --err_out2: -+err_out3: - lima_device_fini(ldev); -+err_out2: -+ lima_devfreq_fini(ldev); - err_out1: - drm_dev_put(ddev); - err_out0: -@@ -429,6 +438,7 @@ static int lima_pdev_remove(struct platform_device *pdev) - sysfs_remove_bin_file(&ldev->dev->kobj, &lima_error_state_attr); - platform_set_drvdata(pdev, NULL); - drm_dev_unregister(ddev); -+ lima_devfreq_fini(ldev); - lima_device_fini(ldev); - drm_dev_put(ddev); - lima_sched_slab_fini(); -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index 4fbf2c489507..a2db1c937424 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -5,6 +5,7 @@ - #include - #include - -+#include "lima_devfreq.h" - #include "lima_drv.h" - #include "lima_sched.h" - #include "lima_vm.h" -@@ -216,6 +217,8 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - */ - ret = dma_fence_get(task->fence); - -+ lima_devfreq_record_busy(&pipe->ldev->devfreq); -+ - pipe->current_task = task; - - /* this is needed for MMU to work correctly, otherwise GP/PP -@@ -418,6 +421,8 @@ static void lima_sched_timedout_job(struct drm_sched_job *job) - pipe->current_vm = NULL; - pipe->current_task = NULL; - -+ lima_devfreq_record_idle(&pipe->ldev->devfreq); -+ - drm_sched_resubmit_jobs(&pipe->base); - drm_sched_start(&pipe->base, true); - } -@@ -497,5 +502,7 @@ void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe) - } else { - pipe->task_fini(pipe); - dma_fence_signal(task->fence); -+ -+ lima_devfreq_record_idle(&pipe->ldev->devfreq); - } - } -diff --git a/drivers/gpu/drm/lima/lima_sched.h b/drivers/gpu/drm/lima/lima_sched.h -index 02dfa14d7083..90f03c48ef4a 100644 ---- a/drivers/gpu/drm/lima/lima_sched.h -+++ b/drivers/gpu/drm/lima/lima_sched.h -@@ -8,6 +8,7 @@ - #include - #include - -+struct lima_device; - struct lima_vm; - - struct lima_sched_error_task { -@@ -52,6 +53,8 @@ struct lima_sched_pipe { - u32 fence_seqno; - spinlock_t fence_lock; - -+ struct lima_device *ldev; -+ - struct lima_sched_task *current_task; - struct lima_vm *current_vm; - - -From a88d271097a216df71ea1e105229896993bb416d Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 21 Apr 2020 23:51:36 +0100 -Subject: [PATCH] drm/lima: Clean up IRQ warnings - -Use the optional form of platform_get_irq() for blocks that legitimately -may not be present, to avoid getting an annoying barrage of spurious -warnings for non-existent PPs on configurations like Mali-450 MP2. - -Signed-off-by: Robin Murphy -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/de475904091400ef6c123285f221094654d96d35.1587509150.git.robin.murphy@arm.com -(cherry picked from commit 21d81f888299715ce6e1f0a04506aeb7c6012660) ---- - drivers/gpu/drm/lima/lima_device.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index 247f51fd40a2..c334d297796a 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -171,8 +171,10 @@ static void lima_regulator_fini(struct lima_device *dev) - - static int lima_init_ip(struct lima_device *dev, int index) - { -+ struct platform_device *pdev = to_platform_device(dev->dev); - struct lima_ip_desc *desc = lima_ip_desc + index; - struct lima_ip *ip = dev->ip + index; -+ const char *irq_name = desc->irq_name; - int offset = desc->offset[dev->id]; - bool must = desc->must_have[dev->id]; - int err; -@@ -183,8 +185,9 @@ static int lima_init_ip(struct lima_device *dev, int index) - ip->dev = dev; - ip->id = index; - ip->iomem = dev->iomem + offset; -- if (desc->irq_name) { -- err = platform_get_irq_byname(dev->pdev, desc->irq_name); -+ if (irq_name) { -+ err = must ? platform_get_irq_byname(pdev, irq_name) : -+ platform_get_irq_byname_optional(pdev, irq_name); - if (err < 0) - goto out; - ip->irq = err; - -From 538de78c323ed1cff6e46e73756bd1fdd332a61e Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 21 Apr 2020 23:51:37 +0100 -Subject: [PATCH] drm/lima: Clean up redundant pdev pointer - -There's no point explicitly tracking the platform device when it can be -trivially derived from the regular device pointer in the couple of -places it's ever used. - -Signed-off-by: Robin Murphy -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/8d9073cc91c10fc70910587fd1794e0e8f32b467.1587509150.git.robin.murphy@arm.com -(cherry picked from commit 2ce216edf2c661fd9d2f5e19ce72fd80c25abc64) ---- - drivers/gpu/drm/lima/lima_devfreq.c | 7 +++---- - drivers/gpu/drm/lima/lima_device.c | 5 ++--- - drivers/gpu/drm/lima/lima_device.h | 1 - - drivers/gpu/drm/lima/lima_drv.c | 1 - - 4 files changed, 5 insertions(+), 9 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c -index 8c4d21d07529..1d479b5924fe 100644 ---- a/drivers/gpu/drm/lima/lima_devfreq.c -+++ b/drivers/gpu/drm/lima/lima_devfreq.c -@@ -101,13 +101,12 @@ void lima_devfreq_fini(struct lima_device *ldev) - } - - if (devfreq->devfreq) { -- devm_devfreq_remove_device(&ldev->pdev->dev, -- devfreq->devfreq); -+ devm_devfreq_remove_device(ldev->dev, devfreq->devfreq); - devfreq->devfreq = NULL; - } - - if (devfreq->opp_of_table_added) { -- dev_pm_opp_of_remove_table(&ldev->pdev->dev); -+ dev_pm_opp_of_remove_table(ldev->dev); - devfreq->opp_of_table_added = false; - } - -@@ -125,7 +124,7 @@ void lima_devfreq_fini(struct lima_device *ldev) - int lima_devfreq_init(struct lima_device *ldev) - { - struct thermal_cooling_device *cooling; -- struct device *dev = &ldev->pdev->dev; -+ struct device *dev = ldev->dev; - struct opp_table *opp_table; - struct devfreq *devfreq; - struct lima_devfreq *ldevfreq = &ldev->devfreq; -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index c334d297796a..29285dedd124 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -297,8 +297,8 @@ static void lima_fini_pp_pipe(struct lima_device *dev) - - int lima_device_init(struct lima_device *ldev) - { -+ struct platform_device *pdev = to_platform_device(ldev->dev); - int err, i; -- struct resource *res; - - dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32)); - -@@ -329,8 +329,7 @@ int lima_device_init(struct lima_device *ldev) - } else - ldev->va_end = LIMA_VA_RESERVE_END; - -- res = platform_get_resource(ldev->pdev, IORESOURCE_MEM, 0); -- ldev->iomem = devm_ioremap_resource(ldev->dev, res); -+ ldev->iomem = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(ldev->iomem)) { - dev_err(ldev->dev, "fail to ioremap iomem\n"); - err = PTR_ERR(ldev->iomem); -diff --git a/drivers/gpu/drm/lima/lima_device.h b/drivers/gpu/drm/lima/lima_device.h -index 06fd9636dd72..99b1fb147dad 100644 ---- a/drivers/gpu/drm/lima/lima_device.h -+++ b/drivers/gpu/drm/lima/lima_device.h -@@ -76,7 +76,6 @@ enum lima_pipe_id { - struct lima_device { - struct device *dev; - struct drm_device *ddev; -- struct platform_device *pdev; - - enum lima_gpu_id id; - u32 gp_version; -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index bbbdc8455e2f..4e5dd75822c0 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -380,7 +380,6 @@ static int lima_pdev_probe(struct platform_device *pdev) - goto err_out0; - } - -- ldev->pdev = pdev; - ldev->dev = &pdev->dev; - ldev->id = (enum lima_gpu_id)of_device_get_match_data(&pdev->dev); - - -From 15209ebd3f2bce9a30a5261868d3400762c55693 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:42 +0800 -Subject: [PATCH] drm/lima: use module_platform_driver helper - -Simplify module init/exit with module_platform_driver. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-2-yuq825@gmail.com -(cherry picked from commit 4eda21d61904f75cda7635b3c225b7141c2ef20c) ---- - drivers/gpu/drm/lima/lima_drv.c | 12 +----------- - 1 file changed, 1 insertion(+), 11 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 4e5dd75822c0..3d63d496cfc2 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -460,17 +460,7 @@ static struct platform_driver lima_platform_driver = { - }, - }; - --static int __init lima_init(void) --{ -- return platform_driver_register(&lima_platform_driver); --} --module_init(lima_init); -- --static void __exit lima_exit(void) --{ -- platform_driver_unregister(&lima_platform_driver); --} --module_exit(lima_exit); -+module_platform_driver(lima_platform_driver); - - MODULE_AUTHOR("Lima Project Developers"); - MODULE_DESCRIPTION("Lima DRM Driver"); - -From 1a04f643449a17ec603c81f7c87587ec0dddc3d4 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:43 +0800 -Subject: [PATCH] drm/lima: print process name and pid when task error - -When error task list is full, print the process info where -the error task come from for debug usage. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-3-yuq825@gmail.com -(cherry picked from commit d04f2a8e5b190c277663865311ecd6a393abf3b9) ---- - drivers/gpu/drm/lima/lima_sched.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index a2db1c937424..387f9439450a 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -285,7 +285,8 @@ static void lima_sched_build_error_task_list(struct lima_sched_task *task) - mutex_lock(&dev->error_task_list_lock); - - if (dev->dump.num_tasks >= lima_max_error_tasks) { -- dev_info(dev->dev, "fail to save task state: error task list is full\n"); -+ dev_info(dev->dev, "fail to save task state from %s pid %d: " -+ "error task list is full\n", ctx->pname, ctx->pid); - goto out; - } - - -From 2de1ecdd54cc918c60a790a42aa2ca313d388b93 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:44 +0800 -Subject: [PATCH] drm/lima: check vm != NULL in lima_vm_put - -No need to handle this check before calling lima_vm_put. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-4-yuq825@gmail.com -(cherry picked from commit 24943269e51bb6fd2810e71597b675878369e06b) ---- - drivers/gpu/drm/lima/lima_sched.c | 7 ++----- - drivers/gpu/drm/lima/lima_vm.h | 3 ++- - 2 files changed, 4 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index 387f9439450a..3ac5797e31fc 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -252,8 +252,7 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - lima_mmu_switch_vm(pipe->mmu[i], vm); - } - -- if (last_vm) -- lima_vm_put(last_vm); -+ lima_vm_put(last_vm); - - trace_lima_task_run(task); - -@@ -416,9 +415,7 @@ static void lima_sched_timedout_job(struct drm_sched_job *job) - lima_mmu_page_fault_resume(pipe->mmu[i]); - } - -- if (pipe->current_vm) -- lima_vm_put(pipe->current_vm); -- -+ lima_vm_put(pipe->current_vm); - pipe->current_vm = NULL; - pipe->current_task = NULL; - -diff --git a/drivers/gpu/drm/lima/lima_vm.h b/drivers/gpu/drm/lima/lima_vm.h -index 22aeec77d84d..3a7c74822d8b 100644 ---- a/drivers/gpu/drm/lima/lima_vm.h -+++ b/drivers/gpu/drm/lima/lima_vm.h -@@ -54,7 +54,8 @@ static inline struct lima_vm *lima_vm_get(struct lima_vm *vm) - - static inline void lima_vm_put(struct lima_vm *vm) - { -- kref_put(&vm->refcount, lima_vm_release); -+ if (vm) -+ kref_put(&vm->refcount, lima_vm_release); - } - - void lima_vm_print(struct lima_vm *vm); - -From 5ea849a4318381e84ffe009e0033259eafcd8708 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:45 +0800 -Subject: [PATCH] drm/lima: always set page directory when switch vm - -We need to flush TLB anyway before every task start, and the -page directory will be set to empty vm after suspend/resume, -so always set it to the task vm even no ctx switch happens. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-5-yuq825@gmail.com -(cherry picked from commit 4eb70cd3f284e200c9e526bdd60ed720d5ab9e5c) ---- - drivers/gpu/drm/lima/lima_mmu.c | 3 +-- - drivers/gpu/drm/lima/lima_sched.c | 14 ++++---------- - 2 files changed, 5 insertions(+), 12 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_mmu.c b/drivers/gpu/drm/lima/lima_mmu.c -index f79d2af427e7..c26b751b0f9d 100644 ---- a/drivers/gpu/drm/lima/lima_mmu.c -+++ b/drivers/gpu/drm/lima/lima_mmu.c -@@ -113,8 +113,7 @@ void lima_mmu_switch_vm(struct lima_ip *ip, struct lima_vm *vm) - LIMA_MMU_STATUS, v, - v & LIMA_MMU_STATUS_STALL_ACTIVE); - -- if (vm) -- mmu_write(LIMA_MMU_DTE_ADDR, vm->pd.dma); -+ mmu_write(LIMA_MMU_DTE_ADDR, vm->pd.dma); - - /* flush the TLB */ - mmu_write(LIMA_MMU_COMMAND, LIMA_MMU_COMMAND_ZAP_CACHE); -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index 3ac5797e31fc..eb46db0717cd 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -200,7 +200,6 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - struct lima_sched_pipe *pipe = to_lima_pipe(job->sched); - struct lima_fence *fence; - struct dma_fence *ret; -- struct lima_vm *vm = NULL, *last_vm = NULL; - int i; - - /* after GPU reset */ -@@ -239,21 +238,16 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - for (i = 0; i < pipe->num_l2_cache; i++) - lima_l2_cache_flush(pipe->l2_cache[i]); - -- if (task->vm != pipe->current_vm) { -- vm = lima_vm_get(task->vm); -- last_vm = pipe->current_vm; -- pipe->current_vm = task->vm; -- } -+ lima_vm_put(pipe->current_vm); -+ pipe->current_vm = lima_vm_get(task->vm); - - if (pipe->bcast_mmu) -- lima_mmu_switch_vm(pipe->bcast_mmu, vm); -+ lima_mmu_switch_vm(pipe->bcast_mmu, pipe->current_vm); - else { - for (i = 0; i < pipe->num_mmu; i++) -- lima_mmu_switch_vm(pipe->mmu[i], vm); -+ lima_mmu_switch_vm(pipe->mmu[i], pipe->current_vm); - } - -- lima_vm_put(last_vm); -- - trace_lima_task_run(task); - - pipe->error = false; - -From 39ad4523b059035b59cd5082409dabbecafba62d Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:46 +0800 -Subject: [PATCH] drm/lima: add lima_devfreq_resume/suspend - -Used for device resume/suspend in the following commits. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-6-yuq825@gmail.com -(cherry picked from commit 4836cf044d74eb70bb28d3460d8c82e4aaf56d65) ---- - drivers/gpu/drm/lima/lima_devfreq.c | 24 ++++++++++++++++++++++++ - drivers/gpu/drm/lima/lima_devfreq.h | 3 +++ - 2 files changed, 27 insertions(+) - -diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c -index 1d479b5924fe..bbe02817721b 100644 ---- a/drivers/gpu/drm/lima/lima_devfreq.c -+++ b/drivers/gpu/drm/lima/lima_devfreq.c -@@ -231,3 +231,27 @@ void lima_devfreq_record_idle(struct lima_devfreq *devfreq) - - spin_unlock_irqrestore(&devfreq->lock, irqflags); - } -+ -+int lima_devfreq_resume(struct lima_devfreq *devfreq) -+{ -+ unsigned long irqflags; -+ -+ if (!devfreq->devfreq) -+ return 0; -+ -+ spin_lock_irqsave(&devfreq->lock, irqflags); -+ -+ lima_devfreq_reset(devfreq); -+ -+ spin_unlock_irqrestore(&devfreq->lock, irqflags); -+ -+ return devfreq_resume_device(devfreq->devfreq); -+} -+ -+int lima_devfreq_suspend(struct lima_devfreq *devfreq) -+{ -+ if (!devfreq->devfreq) -+ return 0; -+ -+ return devfreq_suspend_device(devfreq->devfreq); -+} -diff --git a/drivers/gpu/drm/lima/lima_devfreq.h b/drivers/gpu/drm/lima/lima_devfreq.h -index 8d71ba9fb22a..5eed2975a375 100644 ---- a/drivers/gpu/drm/lima/lima_devfreq.h -+++ b/drivers/gpu/drm/lima/lima_devfreq.h -@@ -38,4 +38,7 @@ void lima_devfreq_fini(struct lima_device *ldev); - void lima_devfreq_record_busy(struct lima_devfreq *devfreq); - void lima_devfreq_record_idle(struct lima_devfreq *devfreq); - -+int lima_devfreq_resume(struct lima_devfreq *devfreq); -+int lima_devfreq_suspend(struct lima_devfreq *devfreq); -+ - #endif - -From 588dcb54eb7b406b9cfe2aadaa813b28b46bc53c Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:47 +0800 -Subject: [PATCH] drm/lima: power down ip blocks when pmu exit - -Prepare resume/suspend PM. - -v2: -Fix lima_pmu_wait_cmd timeout when mali400 case. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-7-yuq825@gmail.com -(cherry picked from commit 9f5072a191a141dcc919125986ea22bf05d598a7) ---- - drivers/gpu/drm/lima/lima_device.h | 2 ++ - drivers/gpu/drm/lima/lima_pmu.c | 53 +++++++++++++++++++++++++++++++++++++- - 2 files changed, 54 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/lima/lima_device.h b/drivers/gpu/drm/lima/lima_device.h -index 99b1fb147dad..9cd2718079bd 100644 ---- a/drivers/gpu/drm/lima/lima_device.h -+++ b/drivers/gpu/drm/lima/lima_device.h -@@ -64,6 +64,8 @@ struct lima_ip { - bool async_reset; - /* l2 cache */ - spinlock_t lock; -+ /* pmu */ -+ u32 mask; - } data; - }; - -diff --git a/drivers/gpu/drm/lima/lima_pmu.c b/drivers/gpu/drm/lima/lima_pmu.c -index 571f6d661581..d476569f2043 100644 ---- a/drivers/gpu/drm/lima/lima_pmu.c -+++ b/drivers/gpu/drm/lima/lima_pmu.c -@@ -21,7 +21,7 @@ static int lima_pmu_wait_cmd(struct lima_ip *ip) - v, v & LIMA_PMU_INT_CMD_MASK, - 100, 100000); - if (err) { -- dev_err(dev->dev, "timeout wait pmd cmd\n"); -+ dev_err(dev->dev, "timeout wait pmu cmd\n"); - return err; - } - -@@ -29,6 +29,40 @@ static int lima_pmu_wait_cmd(struct lima_ip *ip) - return 0; - } - -+static u32 lima_pmu_get_ip_mask(struct lima_ip *ip) -+{ -+ struct lima_device *dev = ip->dev; -+ u32 ret = 0; -+ int i; -+ -+ ret |= LIMA_PMU_POWER_GP0_MASK; -+ -+ if (dev->id == lima_gpu_mali400) { -+ ret |= LIMA_PMU_POWER_L2_MASK; -+ for (i = 0; i < 4; i++) { -+ if (dev->ip[lima_ip_pp0 + i].present) -+ ret |= LIMA_PMU_POWER_PP_MASK(i); -+ } -+ } else { -+ if (dev->ip[lima_ip_pp0].present) -+ ret |= LIMA450_PMU_POWER_PP0_MASK; -+ for (i = lima_ip_pp1; i <= lima_ip_pp3; i++) { -+ if (dev->ip[i].present) { -+ ret |= LIMA450_PMU_POWER_PP13_MASK; -+ break; -+ } -+ } -+ for (i = lima_ip_pp4; i <= lima_ip_pp7; i++) { -+ if (dev->ip[i].present) { -+ ret |= LIMA450_PMU_POWER_PP47_MASK; -+ break; -+ } -+ } -+ } -+ -+ return ret; -+} -+ - int lima_pmu_init(struct lima_ip *ip) - { - int err; -@@ -56,5 +90,22 @@ int lima_pmu_init(struct lima_ip *ip) - - void lima_pmu_fini(struct lima_ip *ip) - { -+ u32 stat; -+ -+ if (!ip->data.mask) -+ ip->data.mask = lima_pmu_get_ip_mask(ip); - -+ stat = ~pmu_read(LIMA_PMU_STATUS) & ip->data.mask; -+ if (stat) { -+ pmu_write(LIMA_PMU_POWER_DOWN, stat); -+ -+ /* Don't wait for interrupt on Mali400 if all domains are -+ * powered off because the HW won't generate an interrupt -+ * in this case. -+ */ -+ if (ip->dev->id == lima_gpu_mali400) -+ pmu_write(LIMA_PMU_INT_CLEAR, LIMA_PMU_INT_CMD_MASK); -+ else -+ lima_pmu_wait_cmd(ip); -+ } - } - -From 9bc4824a7756fcca51e1edb7324e0354889ad055 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:48 +0800 -Subject: [PATCH] drm/lima: add resume/suspend callback for each ip - -For called when PM do resume/suspend. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-8-yuq825@gmail.com -(cherry picked from commit 3446d7e9883d70882568b0f7b6549835d51a8bc7) ---- - drivers/gpu/drm/lima/lima_bcast.c | 25 ++++++++++++++++---- - drivers/gpu/drm/lima/lima_bcast.h | 2 ++ - drivers/gpu/drm/lima/lima_device.c | 4 ++++ - drivers/gpu/drm/lima/lima_device.h | 2 +- - drivers/gpu/drm/lima/lima_dlbu.c | 17 ++++++++++++- - drivers/gpu/drm/lima/lima_dlbu.h | 2 ++ - drivers/gpu/drm/lima/lima_gp.c | 21 +++++++++++++--- - drivers/gpu/drm/lima/lima_gp.h | 2 ++ - drivers/gpu/drm/lima/lima_l2_cache.c | 38 +++++++++++++++++++++-------- - drivers/gpu/drm/lima/lima_l2_cache.h | 2 ++ - drivers/gpu/drm/lima/lima_mmu.c | 46 ++++++++++++++++++++++++++---------- - drivers/gpu/drm/lima/lima_mmu.h | 2 ++ - drivers/gpu/drm/lima/lima_pmu.c | 24 +++++++++++++++++-- - drivers/gpu/drm/lima/lima_pmu.h | 2 ++ - drivers/gpu/drm/lima/lima_pp.c | 31 +++++++++++++++++++++--- - drivers/gpu/drm/lima/lima_pp.h | 4 ++++ - 16 files changed, 187 insertions(+), 37 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_bcast.c b/drivers/gpu/drm/lima/lima_bcast.c -index 288398027bfa..fbc43f243c54 100644 ---- a/drivers/gpu/drm/lima/lima_bcast.c -+++ b/drivers/gpu/drm/lima/lima_bcast.c -@@ -26,18 +26,33 @@ void lima_bcast_enable(struct lima_device *dev, int num_pp) - bcast_write(LIMA_BCAST_BROADCAST_MASK, mask); - } - -+static int lima_bcast_hw_init(struct lima_ip *ip) -+{ -+ bcast_write(LIMA_BCAST_BROADCAST_MASK, ip->data.mask << 16); -+ bcast_write(LIMA_BCAST_INTERRUPT_MASK, ip->data.mask); -+ return 0; -+} -+ -+int lima_bcast_resume(struct lima_ip *ip) -+{ -+ return lima_bcast_hw_init(ip); -+} -+ -+void lima_bcast_suspend(struct lima_ip *ip) -+{ -+ -+} -+ - int lima_bcast_init(struct lima_ip *ip) - { -- int i, mask = 0; -+ int i; - - for (i = lima_ip_pp0; i <= lima_ip_pp7; i++) { - if (ip->dev->ip[i].present) -- mask |= 1 << (i - lima_ip_pp0); -+ ip->data.mask |= 1 << (i - lima_ip_pp0); - } - -- bcast_write(LIMA_BCAST_BROADCAST_MASK, mask << 16); -- bcast_write(LIMA_BCAST_INTERRUPT_MASK, mask); -- return 0; -+ return lima_bcast_hw_init(ip); - } - - void lima_bcast_fini(struct lima_ip *ip) -diff --git a/drivers/gpu/drm/lima/lima_bcast.h b/drivers/gpu/drm/lima/lima_bcast.h -index c47e58563d0a..465ee587bceb 100644 ---- a/drivers/gpu/drm/lima/lima_bcast.h -+++ b/drivers/gpu/drm/lima/lima_bcast.h -@@ -6,6 +6,8 @@ - - struct lima_ip; - -+int lima_bcast_resume(struct lima_ip *ip); -+void lima_bcast_suspend(struct lima_ip *ip); - int lima_bcast_init(struct lima_ip *ip); - void lima_bcast_fini(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index 29285dedd124..a2d4ec75b3b3 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -25,6 +25,8 @@ struct lima_ip_desc { - - int (*init)(struct lima_ip *ip); - void (*fini)(struct lima_ip *ip); -+ int (*resume)(struct lima_ip *ip); -+ void (*suspend)(struct lima_ip *ip); - }; - - #define LIMA_IP_DESC(ipname, mst0, mst1, off0, off1, func, irq) \ -@@ -41,6 +43,8 @@ struct lima_ip_desc { - }, \ - .init = lima_##func##_init, \ - .fini = lima_##func##_fini, \ -+ .resume = lima_##func##_resume, \ -+ .suspend = lima_##func##_suspend, \ - } - - static struct lima_ip_desc lima_ip_desc[lima_ip_num] = { -diff --git a/drivers/gpu/drm/lima/lima_device.h b/drivers/gpu/drm/lima/lima_device.h -index 9cd2718079bd..d9df1b45dfa9 100644 ---- a/drivers/gpu/drm/lima/lima_device.h -+++ b/drivers/gpu/drm/lima/lima_device.h -@@ -64,7 +64,7 @@ struct lima_ip { - bool async_reset; - /* l2 cache */ - spinlock_t lock; -- /* pmu */ -+ /* pmu/bcast */ - u32 mask; - } data; - }; -diff --git a/drivers/gpu/drm/lima/lima_dlbu.c b/drivers/gpu/drm/lima/lima_dlbu.c -index 8399ceffb94b..c1d5ea35daa7 100644 ---- a/drivers/gpu/drm/lima/lima_dlbu.c -+++ b/drivers/gpu/drm/lima/lima_dlbu.c -@@ -42,7 +42,7 @@ void lima_dlbu_set_reg(struct lima_ip *ip, u32 *reg) - dlbu_write(LIMA_DLBU_START_TILE_POS, reg[3]); - } - --int lima_dlbu_init(struct lima_ip *ip) -+static int lima_dlbu_hw_init(struct lima_ip *ip) - { - struct lima_device *dev = ip->dev; - -@@ -52,6 +52,21 @@ int lima_dlbu_init(struct lima_ip *ip) - return 0; - } - -+int lima_dlbu_resume(struct lima_ip *ip) -+{ -+ return lima_dlbu_hw_init(ip); -+} -+ -+void lima_dlbu_suspend(struct lima_ip *ip) -+{ -+ -+} -+ -+int lima_dlbu_init(struct lima_ip *ip) -+{ -+ return lima_dlbu_hw_init(ip); -+} -+ - void lima_dlbu_fini(struct lima_ip *ip) - { - -diff --git a/drivers/gpu/drm/lima/lima_dlbu.h b/drivers/gpu/drm/lima/lima_dlbu.h -index 16f877984466..be71daaaee89 100644 ---- a/drivers/gpu/drm/lima/lima_dlbu.h -+++ b/drivers/gpu/drm/lima/lima_dlbu.h -@@ -12,6 +12,8 @@ void lima_dlbu_disable(struct lima_device *dev); - - void lima_dlbu_set_reg(struct lima_ip *ip, u32 *reg); - -+int lima_dlbu_resume(struct lima_ip *ip); -+void lima_dlbu_suspend(struct lima_ip *ip); - int lima_dlbu_init(struct lima_ip *ip); - void lima_dlbu_fini(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_gp.c b/drivers/gpu/drm/lima/lima_gp.c -index d8841c870d90..8dd501b7a3d0 100644 ---- a/drivers/gpu/drm/lima/lima_gp.c -+++ b/drivers/gpu/drm/lima/lima_gp.c -@@ -274,6 +274,23 @@ static void lima_gp_print_version(struct lima_ip *ip) - static struct kmem_cache *lima_gp_task_slab; - static int lima_gp_task_slab_refcnt; - -+static int lima_gp_hw_init(struct lima_ip *ip) -+{ -+ ip->data.async_reset = false; -+ lima_gp_soft_reset_async(ip); -+ return lima_gp_soft_reset_async_wait(ip); -+} -+ -+int lima_gp_resume(struct lima_ip *ip) -+{ -+ return lima_gp_hw_init(ip); -+} -+ -+void lima_gp_suspend(struct lima_ip *ip) -+{ -+ -+} -+ - int lima_gp_init(struct lima_ip *ip) - { - struct lima_device *dev = ip->dev; -@@ -281,9 +298,7 @@ int lima_gp_init(struct lima_ip *ip) - - lima_gp_print_version(ip); - -- ip->data.async_reset = false; -- lima_gp_soft_reset_async(ip); -- err = lima_gp_soft_reset_async_wait(ip); -+ err = lima_gp_hw_init(ip); - if (err) - return err; - -diff --git a/drivers/gpu/drm/lima/lima_gp.h b/drivers/gpu/drm/lima/lima_gp.h -index 516e5c1babbb..02ec9af78a51 100644 ---- a/drivers/gpu/drm/lima/lima_gp.h -+++ b/drivers/gpu/drm/lima/lima_gp.h -@@ -7,6 +7,8 @@ - struct lima_ip; - struct lima_device; - -+int lima_gp_resume(struct lima_ip *ip); -+void lima_gp_suspend(struct lima_ip *ip); - int lima_gp_init(struct lima_ip *ip); - void lima_gp_fini(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_l2_cache.c b/drivers/gpu/drm/lima/lima_l2_cache.c -index 6873a7af5a5c..c4080a02957b 100644 ---- a/drivers/gpu/drm/lima/lima_l2_cache.c -+++ b/drivers/gpu/drm/lima/lima_l2_cache.c -@@ -38,9 +38,35 @@ int lima_l2_cache_flush(struct lima_ip *ip) - return ret; - } - -+static int lima_l2_cache_hw_init(struct lima_ip *ip) -+{ -+ int err; -+ -+ err = lima_l2_cache_flush(ip); -+ if (err) -+ return err; -+ -+ l2_cache_write(LIMA_L2_CACHE_ENABLE, -+ LIMA_L2_CACHE_ENABLE_ACCESS | -+ LIMA_L2_CACHE_ENABLE_READ_ALLOCATE); -+ l2_cache_write(LIMA_L2_CACHE_MAX_READS, 0x1c); -+ -+ return 0; -+} -+ -+int lima_l2_cache_resume(struct lima_ip *ip) -+{ -+ return lima_l2_cache_hw_init(ip); -+} -+ -+void lima_l2_cache_suspend(struct lima_ip *ip) -+{ -+ -+} -+ - int lima_l2_cache_init(struct lima_ip *ip) - { -- int i, err; -+ int i; - u32 size; - struct lima_device *dev = ip->dev; - -@@ -63,15 +89,7 @@ int lima_l2_cache_init(struct lima_ip *ip) - 1 << (size & 0xff), - 1 << ((size >> 24) & 0xff)); - -- err = lima_l2_cache_flush(ip); -- if (err) -- return err; -- -- l2_cache_write(LIMA_L2_CACHE_ENABLE, -- LIMA_L2_CACHE_ENABLE_ACCESS|LIMA_L2_CACHE_ENABLE_READ_ALLOCATE); -- l2_cache_write(LIMA_L2_CACHE_MAX_READS, 0x1c); -- -- return 0; -+ return lima_l2_cache_hw_init(ip); - } - - void lima_l2_cache_fini(struct lima_ip *ip) -diff --git a/drivers/gpu/drm/lima/lima_l2_cache.h b/drivers/gpu/drm/lima/lima_l2_cache.h -index c63fb676ff14..1aeeefd53fb9 100644 ---- a/drivers/gpu/drm/lima/lima_l2_cache.h -+++ b/drivers/gpu/drm/lima/lima_l2_cache.h -@@ -6,6 +6,8 @@ - - struct lima_ip; - -+int lima_l2_cache_resume(struct lima_ip *ip); -+void lima_l2_cache_suspend(struct lima_ip *ip); - int lima_l2_cache_init(struct lima_ip *ip); - void lima_l2_cache_fini(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_mmu.c b/drivers/gpu/drm/lima/lima_mmu.c -index c26b751b0f9d..a1ae6c252dc2 100644 ---- a/drivers/gpu/drm/lima/lima_mmu.c -+++ b/drivers/gpu/drm/lima/lima_mmu.c -@@ -59,12 +59,44 @@ static irqreturn_t lima_mmu_irq_handler(int irq, void *data) - return IRQ_HANDLED; - } - --int lima_mmu_init(struct lima_ip *ip) -+static int lima_mmu_hw_init(struct lima_ip *ip) - { - struct lima_device *dev = ip->dev; - int err; - u32 v; - -+ mmu_write(LIMA_MMU_COMMAND, LIMA_MMU_COMMAND_HARD_RESET); -+ err = lima_mmu_send_command(LIMA_MMU_COMMAND_HARD_RESET, -+ LIMA_MMU_DTE_ADDR, v, v == 0); -+ if (err) -+ return err; -+ -+ mmu_write(LIMA_MMU_INT_MASK, -+ LIMA_MMU_INT_PAGE_FAULT | LIMA_MMU_INT_READ_BUS_ERROR); -+ mmu_write(LIMA_MMU_DTE_ADDR, dev->empty_vm->pd.dma); -+ return lima_mmu_send_command(LIMA_MMU_COMMAND_ENABLE_PAGING, -+ LIMA_MMU_STATUS, v, -+ v & LIMA_MMU_STATUS_PAGING_ENABLED); -+} -+ -+int lima_mmu_resume(struct lima_ip *ip) -+{ -+ if (ip->id == lima_ip_ppmmu_bcast) -+ return 0; -+ -+ return lima_mmu_hw_init(ip); -+} -+ -+void lima_mmu_suspend(struct lima_ip *ip) -+{ -+ -+} -+ -+int lima_mmu_init(struct lima_ip *ip) -+{ -+ struct lima_device *dev = ip->dev; -+ int err; -+ - if (ip->id == lima_ip_ppmmu_bcast) - return 0; - -@@ -74,12 +106,6 @@ int lima_mmu_init(struct lima_ip *ip) - return -EIO; - } - -- mmu_write(LIMA_MMU_COMMAND, LIMA_MMU_COMMAND_HARD_RESET); -- err = lima_mmu_send_command(LIMA_MMU_COMMAND_HARD_RESET, -- LIMA_MMU_DTE_ADDR, v, v == 0); -- if (err) -- return err; -- - err = devm_request_irq(dev->dev, ip->irq, lima_mmu_irq_handler, - IRQF_SHARED, lima_ip_name(ip), ip); - if (err) { -@@ -87,11 +113,7 @@ int lima_mmu_init(struct lima_ip *ip) - return err; - } - -- mmu_write(LIMA_MMU_INT_MASK, LIMA_MMU_INT_PAGE_FAULT | LIMA_MMU_INT_READ_BUS_ERROR); -- mmu_write(LIMA_MMU_DTE_ADDR, dev->empty_vm->pd.dma); -- return lima_mmu_send_command(LIMA_MMU_COMMAND_ENABLE_PAGING, -- LIMA_MMU_STATUS, v, -- v & LIMA_MMU_STATUS_PAGING_ENABLED); -+ return lima_mmu_hw_init(ip); - } - - void lima_mmu_fini(struct lima_ip *ip) -diff --git a/drivers/gpu/drm/lima/lima_mmu.h b/drivers/gpu/drm/lima/lima_mmu.h -index 4f8ccbebcba1..f0c97ac75ea0 100644 ---- a/drivers/gpu/drm/lima/lima_mmu.h -+++ b/drivers/gpu/drm/lima/lima_mmu.h -@@ -7,6 +7,8 @@ - struct lima_ip; - struct lima_vm; - -+int lima_mmu_resume(struct lima_ip *ip); -+void lima_mmu_suspend(struct lima_ip *ip); - int lima_mmu_init(struct lima_ip *ip); - void lima_mmu_fini(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_pmu.c b/drivers/gpu/drm/lima/lima_pmu.c -index d476569f2043..e397e1146e96 100644 ---- a/drivers/gpu/drm/lima/lima_pmu.c -+++ b/drivers/gpu/drm/lima/lima_pmu.c -@@ -63,7 +63,7 @@ static u32 lima_pmu_get_ip_mask(struct lima_ip *ip) - return ret; - } - --int lima_pmu_init(struct lima_ip *ip) -+static int lima_pmu_hw_init(struct lima_ip *ip) - { - int err; - u32 stat; -@@ -88,7 +88,7 @@ int lima_pmu_init(struct lima_ip *ip) - return 0; - } - --void lima_pmu_fini(struct lima_ip *ip) -+static void lima_pmu_hw_fini(struct lima_ip *ip) - { - u32 stat; - -@@ -109,3 +109,23 @@ void lima_pmu_fini(struct lima_ip *ip) - lima_pmu_wait_cmd(ip); - } - } -+ -+int lima_pmu_resume(struct lima_ip *ip) -+{ -+ return lima_pmu_hw_init(ip); -+} -+ -+void lima_pmu_suspend(struct lima_ip *ip) -+{ -+ lima_pmu_hw_fini(ip); -+} -+ -+int lima_pmu_init(struct lima_ip *ip) -+{ -+ return lima_pmu_hw_init(ip); -+} -+ -+void lima_pmu_fini(struct lima_ip *ip) -+{ -+ lima_pmu_hw_fini(ip); -+} -diff --git a/drivers/gpu/drm/lima/lima_pmu.h b/drivers/gpu/drm/lima/lima_pmu.h -index a2a18775eb07..652dc7af3047 100644 ---- a/drivers/gpu/drm/lima/lima_pmu.h -+++ b/drivers/gpu/drm/lima/lima_pmu.h -@@ -6,6 +6,8 @@ - - struct lima_ip; - -+int lima_pmu_resume(struct lima_ip *ip); -+void lima_pmu_suspend(struct lima_ip *ip); - int lima_pmu_init(struct lima_ip *ip); - void lima_pmu_fini(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_pp.c b/drivers/gpu/drm/lima/lima_pp.c -index 8fef224b93c8..33f01383409c 100644 ---- a/drivers/gpu/drm/lima/lima_pp.c -+++ b/drivers/gpu/drm/lima/lima_pp.c -@@ -223,6 +223,23 @@ static void lima_pp_print_version(struct lima_ip *ip) - lima_ip_name(ip), name, major, minor); - } - -+static int lima_pp_hw_init(struct lima_ip *ip) -+{ -+ ip->data.async_reset = false; -+ lima_pp_soft_reset_async(ip); -+ return lima_pp_soft_reset_async_wait(ip); -+} -+ -+int lima_pp_resume(struct lima_ip *ip) -+{ -+ return lima_pp_hw_init(ip); -+} -+ -+void lima_pp_suspend(struct lima_ip *ip) -+{ -+ -+} -+ - int lima_pp_init(struct lima_ip *ip) - { - struct lima_device *dev = ip->dev; -@@ -230,9 +247,7 @@ int lima_pp_init(struct lima_ip *ip) - - lima_pp_print_version(ip); - -- ip->data.async_reset = false; -- lima_pp_soft_reset_async(ip); -- err = lima_pp_soft_reset_async_wait(ip); -+ err = lima_pp_hw_init(ip); - if (err) - return err; - -@@ -254,6 +269,16 @@ void lima_pp_fini(struct lima_ip *ip) - - } - -+int lima_pp_bcast_resume(struct lima_ip *ip) -+{ -+ return 0; -+} -+ -+void lima_pp_bcast_suspend(struct lima_ip *ip) -+{ -+ -+} -+ - int lima_pp_bcast_init(struct lima_ip *ip) - { - struct lima_device *dev = ip->dev; -diff --git a/drivers/gpu/drm/lima/lima_pp.h b/drivers/gpu/drm/lima/lima_pp.h -index bf60c77b2633..16ec96de15a9 100644 ---- a/drivers/gpu/drm/lima/lima_pp.h -+++ b/drivers/gpu/drm/lima/lima_pp.h -@@ -7,9 +7,13 @@ - struct lima_ip; - struct lima_device; - -+int lima_pp_resume(struct lima_ip *ip); -+void lima_pp_suspend(struct lima_ip *ip); - int lima_pp_init(struct lima_ip *ip); - void lima_pp_fini(struct lima_ip *ip); - -+int lima_pp_bcast_resume(struct lima_ip *ip); -+void lima_pp_bcast_suspend(struct lima_ip *ip); - int lima_pp_bcast_init(struct lima_ip *ip); - void lima_pp_bcast_fini(struct lima_ip *ip); - - -From 9190b3bed7ccb96f6c8cfa25b3d058a2f9fe26d5 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:49 +0800 -Subject: [PATCH] drm/lima: separate clk/regulator enable/disable function - -For being used by both device init/fini and suspend/resume. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-9-yuq825@gmail.com -(cherry picked from commit 7a475eb470ac482306c9281b2faadf2cbfb6b84c) ---- - drivers/gpu/drm/lima/lima_device.c | 105 ++++++++++++++++++++++++------------- - 1 file changed, 68 insertions(+), 37 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index a2d4ec75b3b3..1d9b7f415da1 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -81,26 +81,10 @@ const char *lima_ip_name(struct lima_ip *ip) - return lima_ip_desc[ip->id].name; - } - --static int lima_clk_init(struct lima_device *dev) -+static int lima_clk_enable(struct lima_device *dev) - { - int err; - -- dev->clk_bus = devm_clk_get(dev->dev, "bus"); -- if (IS_ERR(dev->clk_bus)) { -- err = PTR_ERR(dev->clk_bus); -- if (err != -EPROBE_DEFER) -- dev_err(dev->dev, "get bus clk failed %d\n", err); -- return err; -- } -- -- dev->clk_gpu = devm_clk_get(dev->dev, "core"); -- if (IS_ERR(dev->clk_gpu)) { -- err = PTR_ERR(dev->clk_gpu); -- if (err != -EPROBE_DEFER) -- dev_err(dev->dev, "get core clk failed %d\n", err); -- return err; -- } -- - err = clk_prepare_enable(dev->clk_bus); - if (err) - return err; -@@ -109,15 +93,7 @@ static int lima_clk_init(struct lima_device *dev) - if (err) - goto error_out0; - -- dev->reset = devm_reset_control_array_get_optional_shared(dev->dev); -- -- if (IS_ERR(dev->reset)) { -- err = PTR_ERR(dev->reset); -- if (err != -EPROBE_DEFER) -- dev_err(dev->dev, "get reset controller failed %d\n", -- err); -- goto error_out1; -- } else if (dev->reset != NULL) { -+ if (dev->reset) { - err = reset_control_deassert(dev->reset); - if (err) { - dev_err(dev->dev, -@@ -135,14 +111,76 @@ static int lima_clk_init(struct lima_device *dev) - return err; - } - --static void lima_clk_fini(struct lima_device *dev) -+static void lima_clk_disable(struct lima_device *dev) - { -- if (dev->reset != NULL) -+ if (dev->reset) - reset_control_assert(dev->reset); - clk_disable_unprepare(dev->clk_gpu); - clk_disable_unprepare(dev->clk_bus); - } - -+static int lima_clk_init(struct lima_device *dev) -+{ -+ int err; -+ -+ dev->clk_bus = devm_clk_get(dev->dev, "bus"); -+ if (IS_ERR(dev->clk_bus)) { -+ err = PTR_ERR(dev->clk_bus); -+ if (err != -EPROBE_DEFER) -+ dev_err(dev->dev, "get bus clk failed %d\n", err); -+ dev->clk_bus = NULL; -+ return err; -+ } -+ -+ dev->clk_gpu = devm_clk_get(dev->dev, "core"); -+ if (IS_ERR(dev->clk_gpu)) { -+ err = PTR_ERR(dev->clk_gpu); -+ if (err != -EPROBE_DEFER) -+ dev_err(dev->dev, "get core clk failed %d\n", err); -+ dev->clk_gpu = NULL; -+ return err; -+ } -+ -+ dev->reset = devm_reset_control_array_get_optional_shared(dev->dev); -+ if (IS_ERR(dev->reset)) { -+ err = PTR_ERR(dev->reset); -+ if (err != -EPROBE_DEFER) -+ dev_err(dev->dev, "get reset controller failed %d\n", -+ err); -+ dev->reset = NULL; -+ return err; -+ } -+ -+ return lima_clk_enable(dev); -+} -+ -+static void lima_clk_fini(struct lima_device *dev) -+{ -+ lima_clk_disable(dev); -+} -+ -+static int lima_regulator_enable(struct lima_device *dev) -+{ -+ int ret; -+ -+ if (!dev->regulator) -+ return 0; -+ -+ ret = regulator_enable(dev->regulator); -+ if (ret < 0) { -+ dev_err(dev->dev, "failed to enable regulator: %d\n", ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void lima_regulator_disable(struct lima_device *dev) -+{ -+ if (dev->regulator) -+ regulator_disable(dev->regulator); -+} -+ - static int lima_regulator_init(struct lima_device *dev) - { - int ret; -@@ -158,19 +196,12 @@ static int lima_regulator_init(struct lima_device *dev) - return ret; - } - -- ret = regulator_enable(dev->regulator); -- if (ret < 0) { -- dev_err(dev->dev, "failed to enable regulator: %d\n", ret); -- return ret; -- } -- -- return 0; -+ return lima_regulator_enable(dev); - } - - static void lima_regulator_fini(struct lima_device *dev) - { -- if (dev->regulator) -- regulator_disable(dev->regulator); -+ lima_regulator_disable(dev); - } - - static int lima_init_ip(struct lima_device *dev, int index) - -From e713efb3f1f71c0ed9feabcd70d81ef307edaf76 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:50 +0800 -Subject: [PATCH] drm/lima: add pm resume/suspend ops - -Add driver pm system and runtime hardware resume/suspend ops. -Note this won't enable runtime pm of the device yet. - -v2: -Do clock and power gating when suspend/resume. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-10-yuq825@gmail.com -(cherry picked from commit 63945d51490f16aede6d635e785faf56521e5e4a) ---- - drivers/gpu/drm/lima/lima_device.c | 90 ++++++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/lima/lima_device.h | 3 ++ - drivers/gpu/drm/lima/lima_drv.c | 7 +++ - 3 files changed, 100 insertions(+) - -diff --git a/drivers/gpu/drm/lima/lima_device.c b/drivers/gpu/drm/lima/lima_device.c -index 1d9b7f415da1..65fdca366e41 100644 ---- a/drivers/gpu/drm/lima/lima_device.c -+++ b/drivers/gpu/drm/lima/lima_device.c -@@ -247,6 +247,27 @@ static void lima_fini_ip(struct lima_device *ldev, int index) - desc->fini(ip); - } - -+static int lima_resume_ip(struct lima_device *ldev, int index) -+{ -+ struct lima_ip_desc *desc = lima_ip_desc + index; -+ struct lima_ip *ip = ldev->ip + index; -+ int ret = 0; -+ -+ if (ip->present) -+ ret = desc->resume(ip); -+ -+ return ret; -+} -+ -+static void lima_suspend_ip(struct lima_device *ldev, int index) -+{ -+ struct lima_ip_desc *desc = lima_ip_desc + index; -+ struct lima_ip *ip = ldev->ip + index; -+ -+ if (ip->present) -+ desc->suspend(ip); -+} -+ - static int lima_init_gp_pipe(struct lima_device *dev) - { - struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; -@@ -441,3 +462,72 @@ void lima_device_fini(struct lima_device *ldev) - - lima_clk_fini(ldev); - } -+ -+int lima_device_resume(struct device *dev) -+{ -+ struct lima_device *ldev = dev_get_drvdata(dev); -+ int i, err; -+ -+ err = lima_clk_enable(ldev); -+ if (err) { -+ dev_err(dev, "resume clk fail %d\n", err); -+ return err; -+ } -+ -+ err = lima_regulator_enable(ldev); -+ if (err) { -+ dev_err(dev, "resume regulator fail %d\n", err); -+ goto err_out0; -+ } -+ -+ for (i = 0; i < lima_ip_num; i++) { -+ err = lima_resume_ip(ldev, i); -+ if (err) { -+ dev_err(dev, "resume ip %d fail\n", i); -+ goto err_out1; -+ } -+ } -+ -+ err = lima_devfreq_resume(&ldev->devfreq); -+ if (err) { -+ dev_err(dev, "devfreq resume fail\n"); -+ goto err_out1; -+ } -+ -+ return 0; -+ -+err_out1: -+ while (--i >= 0) -+ lima_suspend_ip(ldev, i); -+ lima_regulator_disable(ldev); -+err_out0: -+ lima_clk_disable(ldev); -+ return err; -+} -+ -+int lima_device_suspend(struct device *dev) -+{ -+ struct lima_device *ldev = dev_get_drvdata(dev); -+ int i, err; -+ -+ /* check any task running */ -+ for (i = 0; i < lima_pipe_num; i++) { -+ if (atomic_read(&ldev->pipe[i].base.hw_rq_count)) -+ return -EBUSY; -+ } -+ -+ err = lima_devfreq_suspend(&ldev->devfreq); -+ if (err) { -+ dev_err(dev, "devfreq suspend fail\n"); -+ return err; -+ } -+ -+ for (i = lima_ip_num - 1; i >= 0; i--) -+ lima_suspend_ip(ldev, i); -+ -+ lima_regulator_disable(ldev); -+ -+ lima_clk_disable(ldev); -+ -+ return 0; -+} -diff --git a/drivers/gpu/drm/lima/lima_device.h b/drivers/gpu/drm/lima/lima_device.h -index d9df1b45dfa9..41b9d7b4bcc7 100644 ---- a/drivers/gpu/drm/lima/lima_device.h -+++ b/drivers/gpu/drm/lima/lima_device.h -@@ -140,4 +140,7 @@ static inline int lima_poll_timeout(struct lima_ip *ip, lima_poll_func_t func, - return 0; - } - -+int lima_device_suspend(struct device *dev); -+int lima_device_resume(struct device *dev); -+ - #endif -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 3d63d496cfc2..f3fe0a2f764b 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -451,11 +452,17 @@ static const struct of_device_id dt_match[] = { - }; - MODULE_DEVICE_TABLE(of, dt_match); - -+static const struct dev_pm_ops lima_pm_ops = { -+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) -+ SET_RUNTIME_PM_OPS(lima_device_suspend, lima_device_resume, NULL) -+}; -+ - static struct platform_driver lima_platform_driver = { - .probe = lima_pdev_probe, - .remove = lima_pdev_remove, - .driver = { - .name = "lima", -+ .pm = &lima_pm_ops, - .of_match_table = dt_match, - }, - }; - -From c5775edca0fba03c638c6fb7c8aefca111b1294c Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Tue, 21 Apr 2020 21:35:51 +0800 -Subject: [PATCH] drm/lima: enable runtime pm - -Enable runtime pm by default so GPU suspend when idle -for 200ms. This value can be changed by -autosuspend_delay_ms in device's power sysfs dir. - -On Allwinner H3 lima_device_resume takes ~40us and -lima_device_suspend takes ~20us. - -Tested-by: Bhushan Shah -Reviewed-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200421133551.31481-11-yuq825@gmail.com -(cherry picked from commit 50de2e9ebbc08e1ca27f9b3f0471d92abaaf834a) ---- - drivers/gpu/drm/lima/lima_drv.c | 21 +++++++++++++++----- - drivers/gpu/drm/lima/lima_sched.c | 41 ++++++++++++++++++++++++++++++++++----- - 2 files changed, 52 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index f3fe0a2f764b..a831565af813 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -404,6 +404,12 @@ static int lima_pdev_probe(struct platform_device *pdev) - goto err_out2; - } - -+ pm_runtime_set_active(ldev->dev); -+ pm_runtime_mark_last_busy(ldev->dev); -+ pm_runtime_set_autosuspend_delay(ldev->dev, 200); -+ pm_runtime_use_autosuspend(ldev->dev); -+ pm_runtime_enable(ldev->dev); -+ - /* - * Register the DRM device with the core and the connectors with - * sysfs. -@@ -412,17 +418,16 @@ static int lima_pdev_probe(struct platform_device *pdev) - if (err < 0) - goto err_out3; - -- platform_set_drvdata(pdev, ldev); -- - if (sysfs_create_bin_file(&ldev->dev->kobj, &lima_error_state_attr)) - dev_warn(ldev->dev, "fail to create error state sysfs\n"); - - return 0; - - err_out3: -- lima_device_fini(ldev); --err_out2: -+ pm_runtime_disable(ldev->dev); - lima_devfreq_fini(ldev); -+err_out2: -+ lima_device_fini(ldev); - err_out1: - drm_dev_put(ddev); - err_out0: -@@ -436,10 +441,16 @@ static int lima_pdev_remove(struct platform_device *pdev) - struct drm_device *ddev = ldev->ddev; - - sysfs_remove_bin_file(&ldev->dev->kobj, &lima_error_state_attr); -- platform_set_drvdata(pdev, NULL); -+ - drm_dev_unregister(ddev); -+ -+ /* stop autosuspend to make sure device is in active state */ -+ pm_runtime_set_autosuspend_delay(ldev->dev, -1); -+ pm_runtime_disable(ldev->dev); -+ - lima_devfreq_fini(ldev); - lima_device_fini(ldev); -+ - drm_dev_put(ddev); - lima_sched_slab_fini(); - return 0; -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index eb46db0717cd..e6cefda00279 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -4,6 +4,7 @@ - #include - #include - #include -+#include - - #include "lima_devfreq.h" - #include "lima_drv.h" -@@ -194,13 +195,36 @@ static struct dma_fence *lima_sched_dependency(struct drm_sched_job *job, - return NULL; - } - -+static int lima_pm_busy(struct lima_device *ldev) -+{ -+ int ret; -+ -+ /* resume GPU if it has been suspended by runtime PM */ -+ ret = pm_runtime_get_sync(ldev->dev); -+ if (ret < 0) -+ return ret; -+ -+ lima_devfreq_record_busy(&ldev->devfreq); -+ return 0; -+} -+ -+static void lima_pm_idle(struct lima_device *ldev) -+{ -+ lima_devfreq_record_idle(&ldev->devfreq); -+ -+ /* GPU can do auto runtime suspend */ -+ pm_runtime_mark_last_busy(ldev->dev); -+ pm_runtime_put_autosuspend(ldev->dev); -+} -+ - static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - { - struct lima_sched_task *task = to_lima_task(job); - struct lima_sched_pipe *pipe = to_lima_pipe(job->sched); -+ struct lima_device *ldev = pipe->ldev; - struct lima_fence *fence; - struct dma_fence *ret; -- int i; -+ int i, err; - - /* after GPU reset */ - if (job->s_fence->finished.error < 0) -@@ -209,6 +233,13 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - fence = lima_fence_create(pipe); - if (!fence) - return NULL; -+ -+ err = lima_pm_busy(ldev); -+ if (err < 0) { -+ dma_fence_put(&fence->base); -+ return NULL; -+ } -+ - task->fence = &fence->base; - - /* for caller usage of the fence, otherwise irq handler -@@ -216,8 +247,6 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job) - */ - ret = dma_fence_get(task->fence); - -- lima_devfreq_record_busy(&pipe->ldev->devfreq); -- - pipe->current_task = task; - - /* this is needed for MMU to work correctly, otherwise GP/PP -@@ -388,6 +417,7 @@ static void lima_sched_timedout_job(struct drm_sched_job *job) - { - struct lima_sched_pipe *pipe = to_lima_pipe(job->sched); - struct lima_sched_task *task = to_lima_task(job); -+ struct lima_device *ldev = pipe->ldev; - - if (!pipe->error) - DRM_ERROR("lima job timeout\n"); -@@ -413,7 +443,7 @@ static void lima_sched_timedout_job(struct drm_sched_job *job) - pipe->current_vm = NULL; - pipe->current_task = NULL; - -- lima_devfreq_record_idle(&pipe->ldev->devfreq); -+ lima_pm_idle(ldev); - - drm_sched_resubmit_jobs(&pipe->base); - drm_sched_start(&pipe->base, true); -@@ -485,6 +515,7 @@ void lima_sched_pipe_fini(struct lima_sched_pipe *pipe) - void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe) - { - struct lima_sched_task *task = pipe->current_task; -+ struct lima_device *ldev = pipe->ldev; - - if (pipe->error) { - if (task && task->recoverable) -@@ -495,6 +526,6 @@ void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe) - pipe->task_fini(pipe); - dma_fence_signal(task->fence); - -- lima_devfreq_record_idle(&pipe->ldev->devfreq); -+ lima_pm_idle(ldev); - } - } diff --git a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.9.patch b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.9.patch new file mode 100644 index 0000000000..2dcfafd3e8 --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.9.patch @@ -0,0 +1,3613 @@ +From a6752edf88b17c77c31e66922789ec10308b618e Mon Sep 17 00:00:00 2001 +From: Emil Velikov +Date: Tue, 5 May 2020 16:16:13 +0100 +Subject: [PATCH] drm/rockchip: vop: call vop_cfg_done() under reg_lock +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The function vop_cfg_done() is a simple VOP_REG_SET(). As such it should +be done under a reg_lock. A quick look through the driver shows that all +other instances (apart from driver init) have the lock. Do the same here + +Cc: Sandy Huang +Cc: Heiko Stübner +Signed-off-by: Emil Velikov +Reviewed-by: Sandy Huang +Link: https://patchwork.freedesktop.org/patch/msgid/20200505151613.2932456-1-emil.l.velikov@gmail.com +(cherry picked from commit 5fa63f0773323b1d028f2da5c94b8f3e38619b69) +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index 33463b79a37b..1d76455ca933 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -645,10 +645,10 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + s->enable_afbc = false; + } + +- spin_unlock(&vop->reg_lock); +- + vop_cfg_done(vop); + ++ spin_unlock(&vop->reg_lock); ++ + /* + * At here, vop clock & iommu is enable, R/W vop regs would be safe. + */ + +From 1fdb9715e312cdfbf594de65992ab36ae441d5b2 Mon Sep 17 00:00:00 2001 +From: Bernard Zhao +Date: Mon, 27 Apr 2020 01:05:23 -0700 +Subject: [PATCH] drivers: video: hdmi: cleanup coding style in video a bit + +Eliminate the magic numbers, add vendor infoframe size macro +like other hdmi modules. + +Signed-off-by: Bernard Zhao +Cc: Uma Shankar +Cc: Ville Syrjala +Cc: Shashank Sharma +Cc: Laurent Pinchart +Cc: Daniel Vetter +Cc: opensource.kernel@vivo.com +[b.zolnierkie: add "hdmi" to the patch summary] +[b.zolnierkie: fix "vender" -> vendor" typo in the patch description] +Signed-off-by: Bartlomiej Zolnierkiewicz +Link: https://patchwork.freedesktop.org/patch/msgid/20200427080530.3234-1-bernard@vivo.com +(cherry picked from commit d43be2554b58621a21cb5f54b32db2263b3008b6) +--- + drivers/video/hdmi.c | 2 +- + include/linux/hdmi.h | 1 + + 2 files changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c +index e70792b3e367..b7a1d6fae90d 100644 +--- a/drivers/video/hdmi.c ++++ b/drivers/video/hdmi.c +@@ -495,7 +495,7 @@ int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame) + * value + */ + frame->s3d_struct = HDMI_3D_STRUCTURE_INVALID; +- frame->length = 4; ++ frame->length = HDMI_VENDOR_INFOFRAME_SIZE; + + return 0; + } +diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h +index 50c31f1a0a2d..9850d59d6f1c 100644 +--- a/include/linux/hdmi.h ++++ b/include/linux/hdmi.h +@@ -57,6 +57,7 @@ enum hdmi_infoframe_type { + #define HDMI_SPD_INFOFRAME_SIZE 25 + #define HDMI_AUDIO_INFOFRAME_SIZE 10 + #define HDMI_DRM_INFOFRAME_SIZE 26 ++#define HDMI_VENDOR_INFOFRAME_SIZE 4 + + #define HDMI_INFOFRAME_SIZE(type) \ + (HDMI_INFOFRAME_HEADER_SIZE + HDMI_ ## type ## _INFOFRAME_SIZE) + +From 326cfcb658e63140cb8f4677572d4180c0540d3d Mon Sep 17 00:00:00 2001 +From: Paul Kocialkowski +Date: Thu, 16 Apr 2020 16:05:26 +0200 +Subject: [PATCH] drm/rockchip: Add per-pixel alpha support for the PX30 VOP + +Compared to its predecessors, the PX30 VOP has a different register layout +for enabling per-pixel alpha. Instead of src_alpha_ctl and dst_alpha_ctl, +there is a single alpha control register. This register takes some fields +from src_alpha_ctl, but with a different layout. + +Add support for the required fields to the PX30 VOP window descriptions, +which makes per-pixel-alpha formats behave correctly. + +Signed-off-by: Paul Kocialkowski +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20200416140526.262533-1-paul.kocialkowski@bootlin.com +(cherry picked from commit 2aae8ed1f390a42ec752e4403ffca877fb3260e1) +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++++ + drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 3 +++ + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 9 +++++++++ + 3 files changed, 16 insertions(+) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index 1d76455ca933..c80f7d9fd13f 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -1007,6 +1007,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, + SRC_ALPHA_CAL_M0(ALPHA_NO_SATURATION) | + SRC_FACTOR_M0(ALPHA_ONE); + VOP_WIN_SET(vop, win, src_alpha_ctl, val); ++ ++ VOP_WIN_SET(vop, win, alpha_pre_mul, ALPHA_SRC_PRE_MUL); ++ VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX); ++ VOP_WIN_SET(vop, win, alpha_en, 1); + } else { + VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); + } +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +index d03bdb531ef2..4a2099cb582e 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +@@ -167,6 +167,9 @@ struct vop_win_phy { + + struct vop_reg dst_alpha_ctl; + struct vop_reg src_alpha_ctl; ++ struct vop_reg alpha_pre_mul; ++ struct vop_reg alpha_mode; ++ struct vop_reg alpha_en; + struct vop_reg channel; + }; + +diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +index 2413deded22c..80053d91a301 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c ++++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +@@ -264,6 +264,9 @@ static const struct vop_win_phy px30_win0_data = { + .uv_mst = VOP_REG(PX30_WIN0_CBR_MST0, 0xffffffff, 0), + .yrgb_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 0), + .uv_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 16), ++ .alpha_pre_mul = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 2), ++ .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1), ++ .alpha_en = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 0), + }; + + static const struct vop_win_phy px30_win1_data = { +@@ -277,6 +280,9 @@ static const struct vop_win_phy px30_win1_data = { + .dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0), + .yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0), + .yrgb_vir = VOP_REG(PX30_WIN1_VIR, 0x1fff, 0), ++ .alpha_pre_mul = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 2), ++ .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1), ++ .alpha_en = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 0), + }; + + static const struct vop_win_phy px30_win2_data = { +@@ -291,6 +297,9 @@ static const struct vop_win_phy px30_win2_data = { + .dsp_st = VOP_REG(PX30_WIN2_DSP_ST0, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(PX30_WIN2_MST0, 0xffffffff, 0), + .yrgb_vir = VOP_REG(PX30_WIN2_VIR0_1, 0x1fff, 0), ++ .alpha_pre_mul = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 2), ++ .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1), ++ .alpha_en = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 0), + }; + + static const struct vop_win_data px30_vop_big_win_data[] = { + +From b0766b1d203e666d01853328c94b154be2efd700 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Wed, 27 May 2020 22:05:44 +0200 +Subject: [PATCH] drm/panfrost: Reduce the amount of logs on deferred probe + +There is no point to print deferred probe (and its failures to get +resources) as an error. Also there is no need to print regulator errors +twice. + +In case of multiple probe tries this would pollute the dmesg. + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Steven Price +Signed-off-by: Steven Price +Link: https://patchwork.freedesktop.org/patch/msgid/20200527200544.7849-1-krzk@kernel.org +(cherry picked from commit e63adeccc0bbba34a7b988b8898bebbd5bbb6461) +--- + drivers/gpu/drm/panfrost/panfrost_device.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c +index 8136babd3ba9..b172087eee6a 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.c ++++ b/drivers/gpu/drm/panfrost/panfrost_device.c +@@ -101,7 +101,9 @@ static int panfrost_regulator_init(struct panfrost_device *pfdev) + pfdev->comp->num_supplies, + pfdev->regulators); + if (ret < 0) { +- dev_err(pfdev->dev, "failed to get regulators: %d\n", ret); ++ if (ret != -EPROBE_DEFER) ++ dev_err(pfdev->dev, "failed to get regulators: %d\n", ++ ret); + return ret; + } + +@@ -213,10 +215,8 @@ int panfrost_device_init(struct panfrost_device *pfdev) + } + + err = panfrost_regulator_init(pfdev); +- if (err) { +- dev_err(pfdev->dev, "regulator init failed %d\n", err); ++ if (err) + goto err_out0; +- } + + err = panfrost_reset_init(pfdev); + if (err) { + +From ae01e6ce2d9a1d413b0dc34f48924b7934cb8670 Mon Sep 17 00:00:00 2001 +From: Steven Price +Date: Fri, 22 May 2020 16:36:53 +0100 +Subject: [PATCH] drm/panfrost: Fix inbalance of devfreq record_busy/idle() + +The calls to panfrost_devfreq_record_busy() and +panfrost_devfreq_record_idle() must be balanced to ensure that the +devfreq utilisation is correctly reported. But there are two cases where +this doesn't work correctly. + +In panfrost_job_hw_submit() if pm_runtime_get_sync() fails or the +WARN_ON() fires then no call to panfrost_devfreq_record_busy() is made, +but when the job times out the corresponding _record_idle() call is +still made in panfrost_job_timedout(). Move the call up to ensure that +it always happens. + +Secondly panfrost_job_timedout() only makes a single call to +panfrost_devfreq_record_idle() even if it is cleaning up multiple jobs. +Move the call inside the loop to ensure that the number of +_record_idle() calls matches the number of _record_busy() calls. + +Fixes: 9e62b885f715 ("drm/panfrost: Simplify devfreq utilisation tracking") +Acked-by: Alyssa Rosenzweig +Signed-off-by: Steven Price +Link: https://patchwork.freedesktop.org/patch/msgid/20200522153653.40754-1-steven.price@arm.com +(cherry picked from commit b99773ef258e628bd53cab22d450a755b73b4d55) +--- + drivers/gpu/drm/panfrost/panfrost_job.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c +index 7914b1570841..f9519afca29d 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_job.c ++++ b/drivers/gpu/drm/panfrost/panfrost_job.c +@@ -145,6 +145,8 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js) + u64 jc_head = job->jc; + int ret; + ++ panfrost_devfreq_record_busy(pfdev); ++ + ret = pm_runtime_get_sync(pfdev->dev); + if (ret < 0) + return; +@@ -155,7 +157,6 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js) + } + + cfg = panfrost_mmu_as_get(pfdev, &job->file_priv->mmu); +- panfrost_devfreq_record_busy(pfdev); + + job_write(pfdev, JS_HEAD_NEXT_LO(js), jc_head & 0xFFFFFFFF); + job_write(pfdev, JS_HEAD_NEXT_HI(js), jc_head >> 32); +@@ -410,12 +411,12 @@ static void panfrost_job_timedout(struct drm_sched_job *sched_job) + for (i = 0; i < NUM_JOB_SLOTS; i++) { + if (pfdev->jobs[i]) { + pm_runtime_put_noidle(pfdev->dev); ++ panfrost_devfreq_record_idle(pfdev); + pfdev->jobs[i] = NULL; + } + } + spin_unlock_irqrestore(&pfdev->js->job_lock, flags); + +- panfrost_devfreq_record_idle(pfdev); + panfrost_device_reset(pfdev); + + for (i = 0; i < NUM_JOB_SLOTS; i++) + +From c786931a8c638a0e3caa97133cef1172664c51a4 Mon Sep 17 00:00:00 2001 +From: Dinghao Liu +Date: Fri, 22 May 2020 21:41:09 +0800 +Subject: [PATCH] drm/panfrost: Fix runtime PM imbalance on error + +The caller expects panfrost_job_hw_submit() to increase +runtime PM usage counter. The refcount decrement on the +error branch of WARN_ON() will break the counter balance +and needs to be removed. + +Signed-off-by: Dinghao Liu +Reviewed-by: Steven Price +Signed-off-by: Steven Price +Link: https://patchwork.freedesktop.org/patch/msgid/20200522134109.27204-1-dinghao.liu@zju.edu.cn +(cherry picked from commit 64092598c4566dc80a71ca57396dc36fdbf3da4b) +--- + drivers/gpu/drm/panfrost/panfrost_job.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c +index f9519afca29d..c6242fe34840 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_job.c ++++ b/drivers/gpu/drm/panfrost/panfrost_job.c +@@ -152,7 +152,6 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js) + return; + + if (WARN_ON(job_read(pfdev, JS_COMMAND_NEXT(js)))) { +- pm_runtime_put_sync_autosuspend(pfdev->dev); + return; + } + + +From a74d3fcf73bcb33ec30edd6cfc6b5ef61c05fc9e Mon Sep 17 00:00:00 2001 +From: Denis Efremov +Date: Mon, 8 Jun 2020 18:17:28 +0300 +Subject: [PATCH] drm/panfrost: Use kvfree() to free bo->sgts + +Use kvfree() to free bo->sgts, because the memory is allocated with +kvmalloc_array() in panfrost_mmu_map_fault_addr(). + +Fixes: 187d2929206e ("drm/panfrost: Add support for GPU heap allocations") +Cc: stable@vger.kernel.org +Signed-off-by: Denis Efremov +Reviewed-by: Steven Price +Signed-off-by: Steven Price +Link: https://patchwork.freedesktop.org/patch/msgid/20200608151728.234026-1-efremov@linux.com +(cherry picked from commit 114427b8927a4def2942b2b886f7e4aeae289ccb) +--- + drivers/gpu/drm/panfrost/panfrost_gem.c | 2 +- + drivers/gpu/drm/panfrost/panfrost_mmu.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c +index 17b654e1eb94..556181ea4a07 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_gem.c ++++ b/drivers/gpu/drm/panfrost/panfrost_gem.c +@@ -46,7 +46,7 @@ static void panfrost_gem_free_object(struct drm_gem_object *obj) + sg_free_table(&bo->sgts[i]); + } + } +- kfree(bo->sgts); ++ kvfree(bo->sgts); + } + + drm_gem_shmem_free_object(obj); +diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c +index ed28aeba6d59..3c8ae7411c80 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c ++++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c +@@ -486,7 +486,7 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as, + pages = kvmalloc_array(bo->base.base.size >> PAGE_SHIFT, + sizeof(struct page *), GFP_KERNEL | __GFP_ZERO); + if (!pages) { +- kfree(bo->sgts); ++ kvfree(bo->sgts); + bo->sgts = NULL; + mutex_unlock(&bo->base.pages_lock); + ret = -ENOMEM; + +From ff20f5bb6ef5dc63914dbe8510a336b7586356d9 Mon Sep 17 00:00:00 2001 +From: Ben Davis +Date: Mon, 1 Jun 2020 17:28:17 +0100 +Subject: [PATCH] drm: drm_fourcc: add NV15, Q410, Q401 YUV formats + +DRM_FORMAT_NV15 is a 2 plane format suitable for linear and 16x16 +block-linear memory layouts (DRM_FORMAT_MOD_SAMSUNG_16_16_TILE). The +format is similar to P010 with 4:2:0 sub-sampling but has no padding +between components. Instead, luminance and chrominance samples are +grouped into 4s so that each group is packed into an integer number +of bytes: + +YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes + +The '15' suffix refers to the optimum effective bits per pixel which is +achieved when the total number of luminance samples is a multiple of 8. + +Q410 and Q401 are both 3 plane non-subsampled formats with 16 bits per +component, but only 10 bits are used and 6 are padded. 'Q' is chosen +as the first letter to denote 3 plane YUV444, (and is the next letter +along from P which is usually 2 plane). + +V2: Updated block_w of NV15 to {4, 2, 0} +V3: Updated commit message to include specific modifier name + +NV15: +Tested-by: Jonas Karlman + +Reviewed-by: Brian Starkey +Signed-off-by: Ben Davis +Signed-off-by: Liviu Dudau +Link: https://patchwork.freedesktop.org/patch/msgid/20200601162817.18230-1-ben.davis@arm.com +(cherry picked from commit 94b292b277343190175d39172c903c0c5fb814f1) +--- + drivers/gpu/drm/drm_fourcc.c | 12 ++++++++++++ + include/uapi/drm/drm_fourcc.h | 22 ++++++++++++++++++++++ + 2 files changed, 34 insertions(+) + +diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c +index b234bfaeda06..722c7ebe4e88 100644 +--- a/drivers/gpu/drm/drm_fourcc.c ++++ b/drivers/gpu/drm/drm_fourcc.c +@@ -274,6 +274,18 @@ const struct drm_format_info *__drm_format_info(u32 format) + { .format = DRM_FORMAT_YUV420_10BIT, .depth = 0, + .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2, + .is_yuv = true }, ++ { .format = DRM_FORMAT_NV15, .depth = 0, ++ .num_planes = 2, .char_per_block = { 5, 5, 0 }, ++ .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2, ++ .vsub = 2, .is_yuv = true }, ++ { .format = DRM_FORMAT_Q410, .depth = 0, ++ .num_planes = 3, .char_per_block = { 2, 2, 2 }, ++ .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0, ++ .vsub = 0, .is_yuv = true }, ++ { .format = DRM_FORMAT_Q401, .depth = 0, ++ .num_planes = 3, .char_per_block = { 2, 2, 2 }, ++ .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0, ++ .vsub = 0, .is_yuv = true }, + }; + + unsigned int i; +diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h +index 490143500a50..8ba2d9153a94 100644 +--- a/include/uapi/drm/drm_fourcc.h ++++ b/include/uapi/drm/drm_fourcc.h +@@ -236,6 +236,12 @@ extern "C" { + #define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */ + #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */ + #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ ++/* ++ * 2 plane YCbCr ++ * index 0 = Y plane, [39:0] Y3:Y2:Y1:Y0 little endian ++ * index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian ++ */ ++#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */ + + /* + * 2 plane YCbCr MSB aligned +@@ -265,6 +271,22 @@ extern "C" { + */ + #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ + ++/* 3 plane non-subsampled (444) YCbCr ++ * 16 bits per component, but only 10 bits are used and 6 bits are padded ++ * index 0: Y plane, [15:0] Y:x [10:6] little endian ++ * index 1: Cb plane, [15:0] Cb:x [10:6] little endian ++ * index 2: Cr plane, [15:0] Cr:x [10:6] little endian ++ */ ++#define DRM_FORMAT_Q410 fourcc_code('Q', '4', '1', '0') ++ ++/* 3 plane non-subsampled (444) YCrCb ++ * 16 bits per component, but only 10 bits are used and 6 bits are padded ++ * index 0: Y plane, [15:0] Y:x [10:6] little endian ++ * index 1: Cr plane, [15:0] Cr:x [10:6] little endian ++ * index 2: Cb plane, [15:0] Cb:x [10:6] little endian ++ */ ++#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1') ++ + /* + * 3 plane YCbCr + * index 0: Y plane, [7:0] Y + +From 0a233934f5acb378db5706316b7a8ffd207c4421 Mon Sep 17 00:00:00 2001 +From: Ben Davis +Date: Thu, 30 Apr 2020 09:32:20 +0100 +Subject: [PATCH] drm: drm_fourcc: Add uncompressed AFBC modifier + +AFBC has a mode that guarantees use of AFBC with an uncompressed +payloads, we add a new modifier to support this mode. + +V2: updated modifier comment + +Signed-off-by: Ben Davis +Acked-by: Liviu Dudau +Signed-off-by: Liviu Dudau +Link: https://patchwork.freedesktop.org/patch/msgid/20200430083220.17347-1-ben.davis@arm.com +(cherry picked from commit 79ce058032c391b12af928b1e30abf92482a270f) +--- + include/uapi/drm/drm_fourcc.h | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h +index 8ba2d9153a94..993c1b342315 100644 +--- a/include/uapi/drm/drm_fourcc.h ++++ b/include/uapi/drm/drm_fourcc.h +@@ -914,6 +914,18 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) + */ + #define AFBC_FORMAT_MOD_BCH (1ULL << 11) + ++/* AFBC uncompressed storage mode ++ * ++ * Indicates that the buffer is using AFBC uncompressed storage mode. ++ * In this mode all superblock payloads in the buffer use the uncompressed ++ * storage mode, which is usually only used for data which cannot be compressed. ++ * The buffer layout is the same as for AFBC buffers without USM set, this only ++ * affects the storage mode of the individual superblocks. Note that even a ++ * buffer without USM set may use uncompressed storage mode for some or all ++ * superblocks, USM just guarantees it for all. ++ */ ++#define AFBC_FORMAT_MOD_USM (1ULL << 12) ++ + /* + * Arm 16x16 Block U-Interleaved modifier + * + +From 57fd7e0d426c2565175f6956da0a31e19000d7e4 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:47 +0300 +Subject: [PATCH] drm: edid: Constify connector argument to infoframe functions + +The drm_hdmi_avi_infoframe_from_display_mode(), +drm_hdmi_vendor_infoframe_from_display_mode() and +drm_hdmi_avi_infoframe_quant_range() functions take a drm_connector that +they don't modify. Mark it as const. + +Signed-off-by: Laurent Pinchart +Acked-by: Sam Ravnborg +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-10-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 192a3aa0e4e20e1087baa29183c5d64d48716fa9) +--- + drivers/gpu/drm/drm_edid.c | 12 ++++++------ + include/drm/drm_edid.h | 6 +++--- + 2 files changed, 9 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index fed653f13c26..b3f659759adb 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -5366,7 +5366,7 @@ void drm_set_preferred_mode(struct drm_connector *connector, + } + EXPORT_SYMBOL(drm_set_preferred_mode); + +-static bool is_hdmi2_sink(struct drm_connector *connector) ++static bool is_hdmi2_sink(const struct drm_connector *connector) + { + /* + * FIXME: sil-sii8620 doesn't have a connector around when +@@ -5451,7 +5451,7 @@ drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame, + } + EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata); + +-static u8 drm_mode_hdmi_vic(struct drm_connector *connector, ++static u8 drm_mode_hdmi_vic(const struct drm_connector *connector, + const struct drm_display_mode *mode) + { + bool has_hdmi_infoframe = connector ? +@@ -5467,7 +5467,7 @@ static u8 drm_mode_hdmi_vic(struct drm_connector *connector, + return drm_match_hdmi_mode(mode); + } + +-static u8 drm_mode_cea_vic(struct drm_connector *connector, ++static u8 drm_mode_cea_vic(const struct drm_connector *connector, + const struct drm_display_mode *mode) + { + u8 vic; +@@ -5505,7 +5505,7 @@ static u8 drm_mode_cea_vic(struct drm_connector *connector, + */ + int + drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, +- struct drm_connector *connector, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode) + { + enum hdmi_picture_aspect picture_aspect; +@@ -5652,7 +5652,7 @@ EXPORT_SYMBOL(drm_hdmi_avi_infoframe_colorspace); + */ + void + drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame, +- struct drm_connector *connector, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode, + enum hdmi_quantization_range rgb_quant_range) + { +@@ -5756,7 +5756,7 @@ s3d_structure_from_display_mode(const struct drm_display_mode *mode) + */ + int + drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, +- struct drm_connector *connector, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode) + { + /* +diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h +index 34b15e3d070c..43254319ab19 100644 +--- a/include/drm/drm_edid.h ++++ b/include/drm/drm_edid.h +@@ -361,11 +361,11 @@ drm_load_edid_firmware(struct drm_connector *connector) + + int + drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, +- struct drm_connector *connector, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode); + int + drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, +- struct drm_connector *connector, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode); + + void +@@ -378,7 +378,7 @@ drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame, + + void + drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame, +- struct drm_connector *connector, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode, + enum hdmi_quantization_range rgb_quant_range); + + +From 1c6fa4a67d81a2a5a74f43ab901b2c80a5f73b10 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:48 +0300 +Subject: [PATCH] drm: bridge: Pass drm_display_info to drm_bridge_funcs + .mode_valid() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When validating a mode, bridges may need to do so in the context of a +display, as specified by drm_display_info. An example is the meson +dw-hdmi bridge that needs to consider the YUV 4:2:0 output format to +perform clock calculations. + +Bridges that need the display info currently retrieve it from the +drm_connector created by the bridge. This gets in the way of moving +connector creation out of bridge drivers. To make this possible, pass +the drm_display_info to drm_bridge_funcs .mode_valid(). + +Changes to the bridge drivers have been performed with the following +coccinelle semantic patch and have been compile-tested. + +@ rule1 @ +identifier funcs; +identifier fn; +@@ + struct drm_bridge_funcs funcs = { + ..., + .mode_valid = fn + }; + +@ depends on rule1 @ +identifier rule1.fn; +identifier bridge; +identifier mode; +@@ + enum drm_mode_status fn( + struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode + ) + { + ... + } + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Reviewed-by: Boris Brezillon +Reviewed-by: Guido Günther # for the nwl-dsi part: +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-11-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 12c683e12cd8e2dcf7b7143bebceae484d17727a) +--- + drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 1 + + drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c | 1 + + drivers/gpu/drm/bridge/cdns-dsi.c | 1 + + drivers/gpu/drm/bridge/chrontel-ch7033.c | 1 + + drivers/gpu/drm/bridge/nwl-dsi.c | 1 + + drivers/gpu/drm/bridge/sii9234.c | 1 + + drivers/gpu/drm/bridge/sil-sii8620.c | 1 + + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 + + drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 1 + + drivers/gpu/drm/bridge/tc358767.c | 1 + + drivers/gpu/drm/bridge/tc358768.c | 1 + + drivers/gpu/drm/bridge/thc63lvd1024.c | 1 + + drivers/gpu/drm/bridge/ti-tfp410.c | 1 + + drivers/gpu/drm/drm_atomic_helper.c | 3 ++- + drivers/gpu/drm/drm_bridge.c | 4 +++- + drivers/gpu/drm/drm_probe_helper.c | 4 +++- + drivers/gpu/drm/i2c/tda998x_drv.c | 1 + + drivers/gpu/drm/omapdrm/dss/dpi.c | 1 + + drivers/gpu/drm/omapdrm/dss/sdi.c | 1 + + drivers/gpu/drm/omapdrm/dss/venc.c | 1 + + include/drm/drm_bridge.h | 3 +++ + 21 files changed, 28 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +index 9af39ec958db..f082b4ed4878 100644 +--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c ++++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +@@ -588,6 +588,7 @@ static int anx6345_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + anx6345_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->flags & DRM_MODE_FLAG_INTERLACE) +diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c +index 0d5a5ad0c9ee..81debd02c169 100644 +--- a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c ++++ b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c +@@ -944,6 +944,7 @@ static int anx78xx_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + anx78xx_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->flags & DRM_MODE_FLAG_INTERLACE) +diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c b/drivers/gpu/drm/bridge/cdns-dsi.c +index 69c3892caee5..76373e31df92 100644 +--- a/drivers/gpu/drm/bridge/cdns-dsi.c ++++ b/drivers/gpu/drm/bridge/cdns-dsi.c +@@ -663,6 +663,7 @@ static int cdns_dsi_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + cdns_dsi_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); +diff --git a/drivers/gpu/drm/bridge/chrontel-ch7033.c b/drivers/gpu/drm/bridge/chrontel-ch7033.c +index f8675d82974b..486f405c2e16 100644 +--- a/drivers/gpu/drm/bridge/chrontel-ch7033.c ++++ b/drivers/gpu/drm/bridge/chrontel-ch7033.c +@@ -317,6 +317,7 @@ static void ch7033_bridge_detach(struct drm_bridge *bridge) + } + + static enum drm_mode_status ch7033_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->clock > 165000) +diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c +index c7bc194bbce3..ce94f797d090 100644 +--- a/drivers/gpu/drm/bridge/nwl-dsi.c ++++ b/drivers/gpu/drm/bridge/nwl-dsi.c +@@ -818,6 +818,7 @@ static bool nwl_dsi_bridge_mode_fixup(struct drm_bridge *bridge, + + static enum drm_mode_status + nwl_dsi_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct nwl_dsi *dsi = bridge_to_dsi(bridge); +diff --git a/drivers/gpu/drm/bridge/sii9234.c b/drivers/gpu/drm/bridge/sii9234.c +index b1258f0ed205..15c98a7bd81c 100644 +--- a/drivers/gpu/drm/bridge/sii9234.c ++++ b/drivers/gpu/drm/bridge/sii9234.c +@@ -873,6 +873,7 @@ static inline struct sii9234 *bridge_to_sii9234(struct drm_bridge *bridge) + } + + static enum drm_mode_status sii9234_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->clock > MHL1_MAX_CLK) +diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c +index 92acd336aa89..7c0c93c7e61f 100644 +--- a/drivers/gpu/drm/bridge/sil-sii8620.c ++++ b/drivers/gpu/drm/bridge/sil-sii8620.c +@@ -2244,6 +2244,7 @@ static int sii8620_is_packing_required(struct sii8620 *ctx, + } + + static enum drm_mode_status sii8620_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct sii8620 *ctx = bridge_to_sii8620(bridge); +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 30681398cfb0..b535354150db 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2767,6 +2767,7 @@ static void dw_hdmi_bridge_detach(struct drm_bridge *bridge) + + static enum drm_mode_status + dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct dw_hdmi *hdmi = bridge->driver_private; +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +index 5ef0f154aa7b..c223fb9a04cb 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +@@ -924,6 +924,7 @@ static void dw_mipi_dsi_bridge_enable(struct drm_bridge *bridge) + + static enum drm_mode_status + dw_mipi_dsi_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); +diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c +index e4c0ea03ae3a..c2777b226c75 100644 +--- a/drivers/gpu/drm/bridge/tc358767.c ++++ b/drivers/gpu/drm/bridge/tc358767.c +@@ -1306,6 +1306,7 @@ static bool tc_bridge_mode_fixup(struct drm_bridge *bridge, + } + + static enum drm_mode_status tc_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct tc_data *tc = bridge_to_tc(bridge); +diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c +index 6650fe4cfc20..4a463fadf743 100644 +--- a/drivers/gpu/drm/bridge/tc358768.c ++++ b/drivers/gpu/drm/bridge/tc358768.c +@@ -529,6 +529,7 @@ static int tc358768_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + tc358768_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct tc358768_priv *priv = bridge_to_tc358768(bridge); +diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c b/drivers/gpu/drm/bridge/thc63lvd1024.c +index 97d8129760e9..86b06975bfdd 100644 +--- a/drivers/gpu/drm/bridge/thc63lvd1024.c ++++ b/drivers/gpu/drm/bridge/thc63lvd1024.c +@@ -51,6 +51,7 @@ static int thc63_attach(struct drm_bridge *bridge, + } + + static enum drm_mode_status thc63_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct thc63_dev *thc63 = to_thc63(bridge); +diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c +index e3eb6364c0f7..30230c552aeb 100644 +--- a/drivers/gpu/drm/bridge/ti-tfp410.c ++++ b/drivers/gpu/drm/bridge/ti-tfp410.c +@@ -188,6 +188,7 @@ static void tfp410_disable(struct drm_bridge *bridge) + } + + static enum drm_mode_status tfp410_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->clock < 25000) +diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c +index 85d163f16801..c1178518dc7a 100644 +--- a/drivers/gpu/drm/drm_atomic_helper.c ++++ b/drivers/gpu/drm/drm_atomic_helper.c +@@ -506,7 +506,8 @@ static enum drm_mode_status mode_valid_path(struct drm_connector *connector, + } + + bridge = drm_bridge_chain_get_first_bridge(encoder); +- ret = drm_bridge_chain_mode_valid(bridge, mode); ++ ret = drm_bridge_chain_mode_valid(bridge, &connector->display_info, ++ mode); + if (ret != MODE_OK) { + DRM_DEBUG_ATOMIC("[BRIDGE] mode_valid() failed\n"); + return ret; +diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c +index afdec8e5fc68..8e31af64e8fe 100644 +--- a/drivers/gpu/drm/drm_bridge.c ++++ b/drivers/gpu/drm/drm_bridge.c +@@ -377,6 +377,7 @@ EXPORT_SYMBOL(drm_bridge_chain_mode_fixup); + * drm_bridge_chain_mode_valid - validate the mode against all bridges in the + * encoder chain. + * @bridge: bridge control structure ++ * @info: display info against which the mode shall be validated + * @mode: desired mode to be validated + * + * Calls &drm_bridge_funcs.mode_valid for all the bridges in the encoder +@@ -390,6 +391,7 @@ EXPORT_SYMBOL(drm_bridge_chain_mode_fixup); + */ + enum drm_mode_status + drm_bridge_chain_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct drm_encoder *encoder; +@@ -404,7 +406,7 @@ drm_bridge_chain_mode_valid(struct drm_bridge *bridge, + if (!bridge->funcs->mode_valid) + continue; + +- ret = bridge->funcs->mode_valid(bridge, mode); ++ ret = bridge->funcs->mode_valid(bridge, info, mode); + if (ret != MODE_OK) + return ret; + } +diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c +index 576b4b7dcd89..f5d141e0400f 100644 +--- a/drivers/gpu/drm/drm_probe_helper.c ++++ b/drivers/gpu/drm/drm_probe_helper.c +@@ -114,7 +114,9 @@ drm_mode_validate_pipeline(struct drm_display_mode *mode, + } + + bridge = drm_bridge_chain_get_first_bridge(encoder); +- ret = drm_bridge_chain_mode_valid(bridge, mode); ++ ret = drm_bridge_chain_mode_valid(bridge, ++ &connector->display_info, ++ mode); + if (ret != MODE_OK) { + /* There is also no point in continuing for crtc check + * here. */ +diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c +index 9517f522dcb9..50fd119a5276 100644 +--- a/drivers/gpu/drm/i2c/tda998x_drv.c ++++ b/drivers/gpu/drm/i2c/tda998x_drv.c +@@ -1379,6 +1379,7 @@ static void tda998x_bridge_detach(struct drm_bridge *bridge) + } + + static enum drm_mode_status tda998x_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + /* TDA19988 dotclock can go up to 165MHz */ +diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c b/drivers/gpu/drm/omapdrm/dss/dpi.c +index 5110acb0c6c1..1d2992daef40 100644 +--- a/drivers/gpu/drm/omapdrm/dss/dpi.c ++++ b/drivers/gpu/drm/omapdrm/dss/dpi.c +@@ -434,6 +434,7 @@ static int dpi_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + dpi_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct dpi_data *dpi = drm_bridge_to_dpi(bridge); +diff --git a/drivers/gpu/drm/omapdrm/dss/sdi.c b/drivers/gpu/drm/omapdrm/dss/sdi.c +index 417a8740ad0a..033fd30074b0 100644 +--- a/drivers/gpu/drm/omapdrm/dss/sdi.c ++++ b/drivers/gpu/drm/omapdrm/dss/sdi.c +@@ -140,6 +140,7 @@ static int sdi_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + sdi_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + struct sdi_device *sdi = drm_bridge_to_sdi(bridge); +diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c b/drivers/gpu/drm/omapdrm/dss/venc.c +index 9701843ccf09..4406ce2a08b4 100644 +--- a/drivers/gpu/drm/omapdrm/dss/venc.c ++++ b/drivers/gpu/drm/omapdrm/dss/venc.c +@@ -548,6 +548,7 @@ static int venc_bridge_attach(struct drm_bridge *bridge, + + static enum drm_mode_status + venc_bridge_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + switch (venc_get_videomode(mode)) { +diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h +index ea2aa5ebae34..e3d7f36d8c39 100644 +--- a/include/drm/drm_bridge.h ++++ b/include/drm/drm_bridge.h +@@ -35,6 +35,7 @@ + struct drm_bridge; + struct drm_bridge_timings; + struct drm_connector; ++struct drm_display_info; + struct drm_panel; + struct edid; + struct i2c_adapter; +@@ -112,6 +113,7 @@ struct drm_bridge_funcs { + * drm_mode_status Enum + */ + enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode); + + /** +@@ -836,6 +838,7 @@ bool drm_bridge_chain_mode_fixup(struct drm_bridge *bridge, + struct drm_display_mode *adjusted_mode); + enum drm_mode_status + drm_bridge_chain_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode); + void drm_bridge_chain_disable(struct drm_bridge *bridge); + void drm_bridge_chain_post_disable(struct drm_bridge *bridge); + +From 5a92a08e1cc2a6a273f6430581b1065d20dbacf5 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:49 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Pass private data pointer to + .mode_valid() + +Platform glue drivers for dw_hdmi may need to access device-specific +data from their .mode_valid() implementation. They currently have no +clean way to do so, and one driver hacks around it by accessing the +dev_private data of the drm_device retrieved from the connector. + +Add a priv_data void pointer to the dw_hdmi_plat_data structure, and +pass it to the .mode_valid() function. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-12-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 96591a4b93fb8b335941783dd6e7ded9d6d49f09) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++-- + drivers/gpu/drm/imx/dw_hdmi-imx.c | 6 ++++-- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 3 ++- + drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c | 3 ++- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 3 ++- + drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++++-- + drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 3 ++- + include/drm/bridge/dw_hdmi.h | 14 ++++++++++++-- + 8 files changed, 32 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index b535354150db..2b3f203cf467 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2771,6 +2771,7 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, + const struct drm_display_mode *mode) + { + struct dw_hdmi *hdmi = bridge->driver_private; ++ const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; + struct drm_connector *connector = &hdmi->connector; + enum drm_mode_status mode_status = MODE_OK; + +@@ -2778,8 +2779,9 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + return MODE_BAD; + +- if (hdmi->plat_data->mode_valid) +- mode_status = hdmi->plat_data->mode_valid(connector, mode); ++ if (pdata->mode_valid) ++ mode_status = pdata->mode_valid(hdmi, pdata->priv_data, ++ connector, mode); + + return mode_status; + } +diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c +index ba4ca17fd4d8..95aed4666c95 100644 +--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c ++++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c +@@ -145,7 +145,8 @@ static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = + }; + + static enum drm_mode_status +-imx6q_hdmi_mode_valid(struct drm_connector *con, ++imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *con, + const struct drm_display_mode *mode) + { + if (mode->clock < 13500) +@@ -158,7 +159,8 @@ imx6q_hdmi_mode_valid(struct drm_connector *con, + } + + static enum drm_mode_status +-imx6dl_hdmi_mode_valid(struct drm_connector *con, ++imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *con, + const struct drm_display_mode *mode) + { + if (mode->clock < 13500) +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 24a12c453095..fc594213c0e0 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -630,7 +630,8 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id) + } + + static enum drm_mode_status +-dw_hdmi_mode_valid(struct drm_connector *connector, ++dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, + const struct drm_display_mode *mode) + { + struct meson_drm *priv = connector->dev->dev_private; +diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +index 452461dc96f2..4d837a4d302d 100644 +--- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c ++++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +@@ -38,7 +38,8 @@ static const struct rcar_hdmi_phy_params rcar_hdmi_phy_params[] = { + }; + + static enum drm_mode_status +-rcar_hdmi_mode_valid(struct drm_connector *connector, ++rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, + const struct drm_display_mode *mode) + { + /* +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index 121aa8a63a76..d08f86783a28 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -220,7 +220,8 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) + } + + static enum drm_mode_status +-dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, ++dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, + const struct drm_display_mode *mode) + { + const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg; +diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +index 972682bb8000..0a3637442ba6 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c ++++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +@@ -31,7 +31,8 @@ sun8i_dw_hdmi_encoder_helper_funcs = { + }; + + static enum drm_mode_status +-sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector, ++sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, + const struct drm_display_mode *mode) + { + if (mode->clock > 297000) +@@ -41,7 +42,8 @@ sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector, + } + + static enum drm_mode_status +-sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector, ++sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, + const struct drm_display_mode *mode) + { + /* +diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +index 8e64945167e9..8587b8d2590e 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h ++++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +@@ -176,7 +176,8 @@ struct sun8i_hdmi_phy { + }; + + struct sun8i_dw_hdmi_quirks { +- enum drm_mode_status (*mode_valid)(struct drm_connector *connector, ++ enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, + const struct drm_display_mode *mode); + unsigned int set_rate : 1; + unsigned int use_drm_infoframe : 1; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 0b34a12c4a1c..66a811f75b91 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -124,13 +124,23 @@ struct dw_hdmi_phy_ops { + + struct dw_hdmi_plat_data { + struct regmap *regm; +- enum drm_mode_status (*mode_valid)(struct drm_connector *connector, +- const struct drm_display_mode *mode); ++ + unsigned long input_bus_format; + unsigned long input_bus_encoding; + bool use_drm_infoframe; + bool ycbcr_420_allowed; + ++ /* ++ * Private data passed to all the .mode_valid() and .configure_phy() ++ * callback functions. ++ */ ++ void *priv_data; ++ ++ /* Platform-specific mode validation (optional). */ ++ enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data, ++ struct drm_connector *connector, ++ const struct drm_display_mode *mode); ++ + /* Vendor PHY support */ + const struct dw_hdmi_phy_ops *phy_ops; + const char *phy_name; + +From b524c7a4d04ca3c726d30ca5e07097198ecb4e61 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:50 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Pass private data pointer to + .configure_phy() + +The .configure_phy() operation takes a dw_hdmi_plat_data pointer as a +context argument. This differs from .mode_valid() that takes a custom +private context pointer, causing possible confusion. Make the +dw_hdmi_plat_data operations more consistent by passing the private +context pointer to .configure_phy() as well. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-13-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 49da7e5d84e3b520355c0b6148d6dc9e5415a13e) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +- + drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c | 3 +-- + include/drm/bridge/dw_hdmi.h | 3 +-- + 3 files changed, 3 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 2b3f203cf467..6edb60e6c784 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1514,7 +1514,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi) + + /* Write to the PHY as configured by the platform */ + if (pdata->configure_phy) +- ret = pdata->configure_phy(hdmi, pdata, mpixelclock); ++ ret = pdata->configure_phy(hdmi, pdata->priv_data, mpixelclock); + else + ret = phy->configure(hdmi, pdata, mpixelclock); + if (ret) { +diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +index 4d837a4d302d..d0dffe55a7cb 100644 +--- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c ++++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +@@ -52,8 +52,7 @@ rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + return MODE_OK; + } + +-static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, +- const struct dw_hdmi_plat_data *pdata, ++static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, void *data, + unsigned long mpixelclock) + { + const struct rcar_hdmi_phy_params *params = rcar_hdmi_phy_params; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 66a811f75b91..09348c9cbd11 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -151,8 +151,7 @@ struct dw_hdmi_plat_data { + const struct dw_hdmi_mpll_config *mpll_cfg; + const struct dw_hdmi_curr_ctrl *cur_ctr; + const struct dw_hdmi_phy_config *phy_config; +- int (*configure_phy)(struct dw_hdmi *hdmi, +- const struct dw_hdmi_plat_data *pdata, ++ int (*configure_phy)(struct dw_hdmi *hdmi, void *data, + unsigned long mpixelclock); + }; + + +From 2753b63f782d0c6cb05859164c9f6acc899b5460 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:51 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Remove unused field from + dw_hdmi_plat_data + +The input_bus_format field of struct dw_hdmi_plat_data is unused. Remove +it. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-14-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 29fc89719d396e81176974ce37e0cc81e23869d8) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 +---- + include/drm/bridge/dw_hdmi.h | 1 - + 2 files changed, 1 insertion(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 6edb60e6c784..adc5a95a06e9 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2137,10 +2137,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0; + hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0; + +- if (hdmi->plat_data->input_bus_format) +- hdmi->hdmi_data.enc_in_bus_format = +- hdmi->plat_data->input_bus_format; +- else if (hdmi->hdmi_data.enc_in_bus_format == MEDIA_BUS_FMT_FIXED) ++ if (hdmi->hdmi_data.enc_in_bus_format == MEDIA_BUS_FMT_FIXED) + hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24; + + /* TOFIX: Get input encoding from plat data or fallback to none */ +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 09348c9cbd11..5dfa9d83e2d3 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -125,7 +125,6 @@ struct dw_hdmi_phy_ops { + struct dw_hdmi_plat_data { + struct regmap *regm; + +- unsigned long input_bus_format; + unsigned long input_bus_encoding; + bool use_drm_infoframe; + bool ycbcr_420_allowed; + +From 48a24bad613caf460cb8f3e003de57f864228dca Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:52 +0300 +Subject: [PATCH] drm: meson: dw-hdmi: Use dw_hdmi context to replace hack + +The meson-dw-hdmi driver needs to access its own context from the +.mode_valid() operation. It currently gets it from the dev_private field +of the drm_device retrieved from the connector, which is a hack. Use the +private data passed to the .mode_valid() operation instead. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-15-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 9bc78d6dc818701e47c5ebd0879877a512f039f0) +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index fc594213c0e0..607bd9f495b1 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -634,7 +634,8 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + struct drm_connector *connector, + const struct drm_display_mode *mode) + { +- struct meson_drm *priv = connector->dev->dev_private; ++ struct meson_dw_hdmi *dw_hdmi = data; ++ struct meson_drm *priv = dw_hdmi->priv; + bool is_hdmi2_sink = connector->display_info.hdmi.scdc.supported; + unsigned int phy_freq; + unsigned int vclk_freq; +@@ -693,7 +694,7 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + venc_freq /= 2; + +- dev_dbg(connector->dev->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", ++ dev_dbg(dw_hdmi->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", + __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); + + return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq); +@@ -1066,6 +1067,7 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master, + + /* Bridge / Connector */ + ++ dw_plat_data->priv_data = meson_dw_hdmi; + dw_plat_data->mode_valid = dw_hdmi_mode_valid; + dw_plat_data->phy_ops = &meson_dw_hdmi_phy_ops; + dw_plat_data->phy_name = "meson_dw_hdmi_phy"; + +From 53a5e36d164de29774055ae009cef6898350f624 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:53 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Pass drm_display_info to .mode_valid() + +Replace the drm_connector pointer passed to the .mode_valid() function +with a const drm_display_info pointer, as that's all the function should +need. Use the display info passed to the bridge .mode_valid() operation +instead of retrieving it from the connector, to prepare for make +connector creation optional. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-16-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit af05bba0fbe2c07fe500f697080d78d050be2fbf) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 ++--- + drivers/gpu/drm/imx/dw_hdmi-imx.c | 4 ++-- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 20 ++++++++++---------- + drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c | 2 +- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- + drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 ++-- + drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 +- + include/drm/bridge/dw_hdmi.h | 4 ++-- + 8 files changed, 21 insertions(+), 22 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index adc5a95a06e9..23650e69604c 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2769,7 +2769,6 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, + { + struct dw_hdmi *hdmi = bridge->driver_private; + const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; +- struct drm_connector *connector = &hdmi->connector; + enum drm_mode_status mode_status = MODE_OK; + + /* We don't support double-clocked modes */ +@@ -2777,8 +2776,8 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, + return MODE_BAD; + + if (pdata->mode_valid) +- mode_status = pdata->mode_valid(hdmi, pdata->priv_data, +- connector, mode); ++ mode_status = pdata->mode_valid(hdmi, pdata->priv_data, info, ++ mode); + + return mode_status; + } +diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c +index 95aed4666c95..2dc93fa6ecb6 100644 +--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c ++++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c +@@ -146,7 +146,7 @@ static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = + + static enum drm_mode_status + imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *con, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->clock < 13500) +@@ -160,7 +160,7 @@ imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + + static enum drm_mode_status + imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *con, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->clock < 13500) +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 607bd9f495b1..50b950f5ca3c 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -631,12 +631,12 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id) + + static enum drm_mode_status + dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *display_info, + const struct drm_display_mode *mode) + { + struct meson_dw_hdmi *dw_hdmi = data; + struct meson_drm *priv = dw_hdmi->priv; +- bool is_hdmi2_sink = connector->display_info.hdmi.scdc.supported; ++ bool is_hdmi2_sink = display_info->hdmi.scdc.supported; + unsigned int phy_freq; + unsigned int vclk_freq; + unsigned int venc_freq; +@@ -647,10 +647,10 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + DRM_DEBUG_DRIVER("Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); + + /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */ +- if (connector->display_info.max_tmds_clock && +- mode->clock > connector->display_info.max_tmds_clock && +- !drm_mode_is_420_only(&connector->display_info, mode) && +- !drm_mode_is_420_also(&connector->display_info, mode)) ++ if (display_info->max_tmds_clock && ++ mode->clock > display_info->max_tmds_clock && ++ !drm_mode_is_420_only(display_info, mode) && ++ !drm_mode_is_420_also(display_info, mode)) + return MODE_BAD; + + /* Check against non-VIC supported modes */ +@@ -667,9 +667,9 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + vclk_freq = mode->clock; + + /* For 420, pixel clock is half unlike venc clock */ +- if (drm_mode_is_420_only(&connector->display_info, mode) || ++ if (drm_mode_is_420_only(display_info, mode) || + (!is_hdmi2_sink && +- drm_mode_is_420_also(&connector->display_info, mode))) ++ drm_mode_is_420_also(display_info, mode))) + vclk_freq /= 2; + + /* TMDS clock is pixel_clock * 10 */ +@@ -684,9 +684,9 @@ dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + + /* VENC double pixels for 1080i, 720p and YUV420 modes */ + if (meson_venc_hdmi_venc_repeat(vic) || +- drm_mode_is_420_only(&connector->display_info, mode) || ++ drm_mode_is_420_only(display_info, mode) || + (!is_hdmi2_sink && +- drm_mode_is_420_also(&connector->display_info, mode))) ++ drm_mode_is_420_also(display_info, mode))) + venc_freq *= 2; + + vclk_freq = max(venc_freq, hdmi_freq); +diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +index d0dffe55a7cb..7b8ec8310699 100644 +--- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c ++++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +@@ -39,7 +39,7 @@ static const struct rcar_hdmi_phy_params rcar_hdmi_phy_params[] = { + + static enum drm_mode_status + rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + /* +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index d08f86783a28..d286751bb333 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -221,7 +221,7 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) + + static enum drm_mode_status + dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg; +diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +index 0a3637442ba6..d4c08043dd81 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c ++++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +@@ -32,7 +32,7 @@ sun8i_dw_hdmi_encoder_helper_funcs = { + + static enum drm_mode_status + sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + if (mode->clock > 297000) +@@ -43,7 +43,7 @@ sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, + + static enum drm_mode_status + sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode) + { + /* +diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +index 8587b8d2590e..d983746fa194 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h ++++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +@@ -177,7 +177,7 @@ struct sun8i_hdmi_phy { + + struct sun8i_dw_hdmi_quirks { + enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode); + unsigned int set_rate : 1; + unsigned int use_drm_infoframe : 1; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 5dfa9d83e2d3..fec293b21c2e 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -8,7 +8,7 @@ + + #include + +-struct drm_connector; ++struct drm_display_info; + struct drm_display_mode; + struct drm_encoder; + struct dw_hdmi; +@@ -137,7 +137,7 @@ struct dw_hdmi_plat_data { + + /* Platform-specific mode validation (optional). */ + enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data, +- struct drm_connector *connector, ++ const struct drm_display_info *info, + const struct drm_display_mode *mode); + + /* Vendor PHY support */ + +From 99ac754367be84fb5c1507dbc09a970a07f17deb Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:54 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Constify mode argument to + dw_hdmi_phy_ops .init() + +The PHY .init() must not modify the mode it receives. Make the pointer +const to enfore that. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-17-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 35a395f1134bbbd2984dcca28c04f09fbbb8b0a4) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 4 ++-- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- + drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 2 +- + include/drm/bridge/dw_hdmi.h | 2 +- + 5 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 23650e69604c..6e6a3d95e68e 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1531,7 +1531,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi) + } + + static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, +- struct drm_display_mode *mode) ++ const struct drm_display_mode *mode) + { + int i, ret; + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 50b950f5ca3c..a1217df5fe5a 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -297,7 +297,7 @@ static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi, + + /* Setup PHY bandwidth modes */ + static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi, +- struct drm_display_mode *mode) ++ const struct drm_display_mode *mode) + { + struct meson_drm *priv = dw_hdmi->priv; + unsigned int pixel_clock = mode->clock; +@@ -427,7 +427,7 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi, + } + + static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, +- struct drm_display_mode *mode) ++ const struct drm_display_mode *mode) + { + struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data; + struct meson_drm *priv = dw_hdmi->priv; +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index d286751bb333..10e210f6455d 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -312,7 +312,7 @@ static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_fun + }; + + static int dw_hdmi_rockchip_genphy_init(struct dw_hdmi *dw_hdmi, void *data, +- struct drm_display_mode *mode) ++ const struct drm_display_mode *mode) + { + struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; + +diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +index 43643ad31730..8e078cacf063 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c ++++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +@@ -341,7 +341,7 @@ static int sun8i_hdmi_phy_config_h3(struct dw_hdmi *hdmi, + } + + static int sun8i_hdmi_phy_config(struct dw_hdmi *hdmi, void *data, +- struct drm_display_mode *mode) ++ const struct drm_display_mode *mode) + { + struct sun8i_hdmi_phy *phy = (struct sun8i_hdmi_phy *)data; + u32 val = 0; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index fec293b21c2e..f930d218cc6b 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -114,7 +114,7 @@ struct dw_hdmi_phy_config { + + struct dw_hdmi_phy_ops { + int (*init)(struct dw_hdmi *hdmi, void *data, +- struct drm_display_mode *mode); ++ const struct drm_display_mode *mode); + void (*disable)(struct dw_hdmi *hdmi, void *data); + enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data); + void (*update_hpd)(struct dw_hdmi *hdmi, void *data, + +From 3f32c1651003657315d10e10ba3f82f814bf679c Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:55 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Constify mode argument to internal + functions + +Several internal functions take a drm_display_mode argument to configure +the HDMI encoder or the HDMI PHY. They must not modify the mode, make +the pointer const to enforce that. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-18-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 9fbfa320b435e6f25499a63f7bb74b4fc5341b30) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 6e6a3d95e68e..5b5f07a23400 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1628,7 +1628,8 @@ static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) + HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1); + } + +-static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) ++static void hdmi_config_AVI(struct dw_hdmi *hdmi, ++ const struct drm_display_mode *mode) + { + struct hdmi_avi_infoframe frame; + u8 val; +@@ -1756,7 +1757,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + } + + static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, +- struct drm_display_mode *mode) ++ const struct drm_display_mode *mode) + { + struct hdmi_vendor_infoframe frame; + u8 buffer[10]; +@@ -2112,7 +2113,8 @@ static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) + HDMI_IH_MUTE_FC_STAT2); + } + +-static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) ++static int dw_hdmi_setup(struct dw_hdmi *hdmi, ++ const struct drm_display_mode *mode) + { + int ret; + + +From 96db500c40d28a630906600cd98b1886298a68e3 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:56 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Pass drm_display_info to + dw_hdmi_support_scdc() + +To prepare for making connector creation optional in the driver, pass +the drm_display_info explicitly to dw_hdmi_support_scdc(). The pointer +is passed to the callers where required, particularly to the +dw_hdmi_phy_ops .init() function. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-19-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 7be390d4c0a125266c558c30a3687d931c3b6101) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 32 +++++++++++++++++------------ + drivers/gpu/drm/meson/meson_dw_hdmi.c | 3 ++- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 1 + + drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 1 + + include/drm/bridge/dw_hdmi.h | 4 +++- + 5 files changed, 26 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 5b5f07a23400..a18794cce0d8 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1241,10 +1241,9 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, + EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write); + + /* Filter out invalid setups to avoid configuring SCDC and scrambling */ +-static bool dw_hdmi_support_scdc(struct dw_hdmi *hdmi) ++static bool dw_hdmi_support_scdc(struct dw_hdmi *hdmi, ++ const struct drm_display_info *display) + { +- struct drm_display_info *display = &hdmi->connector.display_info; +- + /* Completely disable SCDC support for older controllers */ + if (hdmi->version < 0x200a) + return false; +@@ -1282,12 +1281,13 @@ static bool dw_hdmi_support_scdc(struct dw_hdmi *hdmi) + * helper should called right before enabling the TMDS Clock and Data in + * the PHY configuration callback. + */ +-void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi) ++void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi, ++ const struct drm_display_info *display) + { + unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; + + /* Control for TMDS Bit Period/TMDS Clock-Period Ratio */ +- if (dw_hdmi_support_scdc(hdmi)) { ++ if (dw_hdmi_support_scdc(hdmi, display)) { + if (mtmdsclock > HDMI14_MAX_TMDSCLK) + drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 1); + else +@@ -1490,7 +1490,8 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, + return 0; + } + +-static int hdmi_phy_configure(struct dw_hdmi *hdmi) ++static int hdmi_phy_configure(struct dw_hdmi *hdmi, ++ const struct drm_display_info *display) + { + const struct dw_hdmi_phy_data *phy = hdmi->phy.data; + const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; +@@ -1500,7 +1501,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi) + + dw_hdmi_phy_power_off(hdmi); + +- dw_hdmi_set_high_tmds_clock_ratio(hdmi); ++ dw_hdmi_set_high_tmds_clock_ratio(hdmi, display); + + /* Leave low power consumption mode by asserting SVSRET. */ + if (phy->has_svsret) +@@ -1531,6 +1532,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi) + } + + static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, ++ const struct drm_display_info *display, + const struct drm_display_mode *mode) + { + int i, ret; +@@ -1540,7 +1542,7 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, + dw_hdmi_phy_sel_data_en_pol(hdmi, 1); + dw_hdmi_phy_sel_interface_control(hdmi, 0); + +- ret = hdmi_phy_configure(hdmi); ++ ret = hdmi_phy_configure(hdmi, display); + if (ret) + return ret; + } +@@ -1846,10 +1848,11 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi) + } + + static void hdmi_av_composer(struct dw_hdmi *hdmi, ++ const struct drm_display_info *display, + const struct drm_display_mode *mode) + { + u8 inv_val, bytes; +- struct drm_hdmi_info *hdmi_info = &hdmi->connector.display_info.hdmi; ++ const struct drm_hdmi_info *hdmi_info = &display->hdmi; + struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; + int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; + unsigned int vdisplay, hdisplay; +@@ -1882,7 +1885,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + + /* Set up HDMI_FC_INVIDCONF */ + inv_val = (hdmi->hdmi_data.hdcp_enable || +- (dw_hdmi_support_scdc(hdmi) && ++ (dw_hdmi_support_scdc(hdmi, display) && + (vmode->mtmdsclock > HDMI14_MAX_TMDSCLK || + hdmi_info->scdc.scrambling.low_rates)) ? + HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE : +@@ -1950,7 +1953,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + } + + /* Scrambling Control */ +- if (dw_hdmi_support_scdc(hdmi)) { ++ if (dw_hdmi_support_scdc(hdmi, display)) { + if (vmode->mtmdsclock > HDMI14_MAX_TMDSCLK || + hdmi_info->scdc.scrambling.low_rates) { + /* +@@ -2116,6 +2119,7 @@ static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) + static int dw_hdmi_setup(struct dw_hdmi *hdmi, + const struct drm_display_mode *mode) + { ++ struct drm_connector *connector = &hdmi->connector; + int ret; + + hdmi_disable_overflow_interrupts(hdmi); +@@ -2161,10 +2165,12 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, + hdmi->hdmi_data.video_mode.mdataenablepolarity = true; + + /* HDMI Initialization Step B.1 */ +- hdmi_av_composer(hdmi, mode); ++ hdmi_av_composer(hdmi, &connector->display_info, mode); + + /* HDMI Initializateion Step B.2 */ +- ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode); ++ ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, ++ &connector->display_info, ++ &hdmi->previous_mode); + if (ret) + return ret; + hdmi->phy.enabled = true; +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index a1217df5fe5a..29a8ff41595d 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -427,6 +427,7 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi, + } + + static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, ++ const struct drm_display_info *display, + const struct drm_display_mode *mode) + { + struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data; +@@ -496,7 +497,7 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, + /* Disable clock, fifo, fifo_wr */ + regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0); + +- dw_hdmi_set_high_tmds_clock_ratio(hdmi); ++ dw_hdmi_set_high_tmds_clock_ratio(hdmi, display); + + msleep(100); + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index 10e210f6455d..23de359a1dec 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -312,6 +312,7 @@ static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_fun + }; + + static int dw_hdmi_rockchip_genphy_init(struct dw_hdmi *dw_hdmi, void *data, ++ const struct drm_display_info *display, + const struct drm_display_mode *mode) + { + struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; +diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +index 8e078cacf063..156d00e5165b 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c ++++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +@@ -341,6 +341,7 @@ static int sun8i_hdmi_phy_config_h3(struct dw_hdmi *hdmi, + } + + static int sun8i_hdmi_phy_config(struct dw_hdmi *hdmi, void *data, ++ const struct drm_display_info *display, + const struct drm_display_mode *mode) + { + struct sun8i_hdmi_phy *phy = (struct sun8i_hdmi_phy *)data; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index f930d218cc6b..ea34ca146b82 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -114,6 +114,7 @@ struct dw_hdmi_phy_config { + + struct dw_hdmi_phy_ops { + int (*init)(struct dw_hdmi *hdmi, void *data, ++ const struct drm_display_info *display, + const struct drm_display_mode *mode); + void (*disable)(struct dw_hdmi *hdmi, void *data); + enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data); +@@ -174,7 +175,8 @@ void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, u8 *channel_status); + void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca); + void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); + void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); +-void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi); ++void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi, ++ const struct drm_display_info *display); + + /* PHY configuration */ + void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address); + +From 5d3cddd3c75ab9c4dbe6b9cc6e2fbb85ed2c3f80 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:57 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Split connector creation to a separate + function + +Isolate all the code related to connector creation to a new +dw_hdmi_connector_create() function, to prepare for making connector +creation optional. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-20-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 3f588fda4b80dbd7dafa08b0e16fd72a42676e3c) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 107 +++++++++++++++++------------- + 1 file changed, 62 insertions(+), 45 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index a18794cce0d8..35d38b644912 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2317,6 +2317,10 @@ static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi) + hdmi->rxsense); + } + ++/* ----------------------------------------------------------------------------- ++ * DRM Connector Operations ++ */ ++ + static enum drm_connector_status + dw_hdmi_connector_detect(struct drm_connector *connector, bool force) + { +@@ -2438,6 +2442,59 @@ static const struct drm_connector_helper_funcs dw_hdmi_connector_helper_funcs = + .atomic_check = dw_hdmi_connector_atomic_check, + }; + ++static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) ++{ ++ struct drm_connector *connector = &hdmi->connector; ++ struct cec_connector_info conn_info; ++ struct cec_notifier *notifier; ++ ++ if (hdmi->version >= 0x200a) ++ connector->ycbcr_420_allowed = ++ hdmi->plat_data->ycbcr_420_allowed; ++ else ++ connector->ycbcr_420_allowed = false; ++ ++ connector->interlace_allowed = 1; ++ connector->polled = DRM_CONNECTOR_POLL_HPD; ++ ++ drm_connector_helper_add(connector, &dw_hdmi_connector_helper_funcs); ++ ++ drm_connector_init_with_ddc(hdmi->bridge.dev, connector, ++ &dw_hdmi_connector_funcs, ++ DRM_MODE_CONNECTOR_HDMIA, ++ hdmi->ddc); ++ ++ /* ++ * drm_connector_attach_max_bpc_property() requires the ++ * connector to have a state. ++ */ ++ drm_atomic_helper_connector_reset(connector); ++ ++ drm_connector_attach_max_bpc_property(connector, 8, 16); ++ ++ if (hdmi->version >= 0x200a && hdmi->plat_data->use_drm_infoframe) ++ drm_object_attach_property(&connector->base, ++ connector->dev->mode_config.hdr_output_metadata_property, 0); ++ ++ drm_connector_attach_encoder(connector, hdmi->bridge.encoder); ++ ++ cec_fill_conn_info_from_drm(&conn_info, connector); ++ ++ notifier = cec_notifier_conn_register(hdmi->dev, NULL, &conn_info); ++ if (!notifier) ++ return -ENOMEM; ++ ++ mutex_lock(&hdmi->cec_notifier_mutex); ++ hdmi->cec_notifier = notifier; ++ mutex_unlock(&hdmi->cec_notifier_mutex); ++ ++ return 0; ++} ++ ++/* ----------------------------------------------------------------------------- ++ * DRM Bridge Operations ++ */ ++ + /* + * Possible output formats : + * - MEDIA_BUS_FMT_UYYVYY16_0_5X48, +@@ -2713,51 +2770,13 @@ static int dw_hdmi_bridge_attach(struct drm_bridge *bridge, + enum drm_bridge_attach_flags flags) + { + struct dw_hdmi *hdmi = bridge->driver_private; +- struct drm_encoder *encoder = bridge->encoder; +- struct drm_connector *connector = &hdmi->connector; +- struct cec_connector_info conn_info; +- struct cec_notifier *notifier; + + if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) { + DRM_ERROR("Fix bridge driver to make connector optional!"); + return -EINVAL; + } + +- connector->interlace_allowed = 1; +- connector->polled = DRM_CONNECTOR_POLL_HPD; +- +- drm_connector_helper_add(connector, &dw_hdmi_connector_helper_funcs); +- +- drm_connector_init_with_ddc(bridge->dev, connector, +- &dw_hdmi_connector_funcs, +- DRM_MODE_CONNECTOR_HDMIA, +- hdmi->ddc); +- +- /* +- * drm_connector_attach_max_bpc_property() requires the +- * connector to have a state. +- */ +- drm_atomic_helper_connector_reset(connector); +- +- drm_connector_attach_max_bpc_property(connector, 8, 16); +- +- if (hdmi->version >= 0x200a && hdmi->plat_data->use_drm_infoframe) +- drm_object_attach_property(&connector->base, +- connector->dev->mode_config.hdr_output_metadata_property, 0); +- +- drm_connector_attach_encoder(connector, encoder); +- +- cec_fill_conn_info_from_drm(&conn_info, connector); +- +- notifier = cec_notifier_conn_register(hdmi->dev, NULL, &conn_info); +- if (!notifier) +- return -ENOMEM; +- +- mutex_lock(&hdmi->cec_notifier_mutex); +- hdmi->cec_notifier = notifier; +- mutex_unlock(&hdmi->cec_notifier_mutex); +- +- return 0; ++ return dw_hdmi_connector_create(hdmi); + } + + static void dw_hdmi_bridge_detach(struct drm_bridge *bridge) +@@ -2841,6 +2860,10 @@ static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = { + .mode_valid = dw_hdmi_bridge_mode_valid, + }; + ++/* ----------------------------------------------------------------------------- ++ * IRQ Handling ++ */ ++ + static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi) + { + struct dw_hdmi_i2c *i2c = hdmi->i2c; +@@ -3303,12 +3326,6 @@ __dw_hdmi_probe(struct platform_device *pdev, + hdmi->bridge.of_node = pdev->dev.of_node; + #endif + +- if (hdmi->version >= 0x200a) +- hdmi->connector.ycbcr_420_allowed = +- hdmi->plat_data->ycbcr_420_allowed; +- else +- hdmi->connector.ycbcr_420_allowed = false; +- + memset(&pdevinfo, 0, sizeof(pdevinfo)); + pdevinfo.parent = dev; + pdevinfo.id = PLATFORM_DEVID_AUTO; + +From 74b0a99dc5f17e451603a2a71ca1fd6f9a572975 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:58 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Store current connector in struct + dw_hdmi + +Store the connector that the bridge is currently wired to in the dw_hdmi +structure. This is currently identical to the connector field, but will +differ once the driver supports disabling connector creation. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-21-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit ca7b6b7176ffea4d07afbd98ede7a94fb0f68fa1) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 18 ++++++++++++++---- + 1 file changed, 14 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 35d38b644912..16bffedb4715 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -181,6 +181,7 @@ struct dw_hdmi { + + struct mutex mutex; /* for state below and previous_mode */ + enum drm_connector_force force; /* mutex-protected force state */ ++ struct drm_connector *curr_conn;/* current connector (only valid when !disabled) */ + bool disabled; /* DRM has disabled our bridge */ + bool bridge_is_on; /* indicates the bridge is on */ + bool rxsense; /* rxsense state */ +@@ -2823,23 +2824,32 @@ static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge, + mutex_unlock(&hdmi->mutex); + } + +-static void dw_hdmi_bridge_disable(struct drm_bridge *bridge) ++static void dw_hdmi_bridge_atomic_disable(struct drm_bridge *bridge, ++ struct drm_bridge_state *old_state) + { + struct dw_hdmi *hdmi = bridge->driver_private; + + mutex_lock(&hdmi->mutex); + hdmi->disabled = true; ++ hdmi->curr_conn = NULL; + dw_hdmi_update_power(hdmi); + dw_hdmi_update_phy_mask(hdmi); + mutex_unlock(&hdmi->mutex); + } + +-static void dw_hdmi_bridge_enable(struct drm_bridge *bridge) ++static void dw_hdmi_bridge_atomic_enable(struct drm_bridge *bridge, ++ struct drm_bridge_state *old_state) + { + struct dw_hdmi *hdmi = bridge->driver_private; ++ struct drm_atomic_state *state = old_state->base.state; ++ struct drm_connector *connector; ++ ++ connector = drm_atomic_get_new_connector_for_encoder(state, ++ bridge->encoder); + + mutex_lock(&hdmi->mutex); + hdmi->disabled = false; ++ hdmi->curr_conn = connector; + dw_hdmi_update_power(hdmi); + dw_hdmi_update_phy_mask(hdmi); + mutex_unlock(&hdmi->mutex); +@@ -2854,8 +2864,8 @@ static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = { + .atomic_check = dw_hdmi_bridge_atomic_check, + .atomic_get_output_bus_fmts = dw_hdmi_bridge_atomic_get_output_bus_fmts, + .atomic_get_input_bus_fmts = dw_hdmi_bridge_atomic_get_input_bus_fmts, +- .enable = dw_hdmi_bridge_enable, +- .disable = dw_hdmi_bridge_disable, ++ .atomic_enable = dw_hdmi_bridge_atomic_enable, ++ .atomic_disable = dw_hdmi_bridge_atomic_disable, + .mode_set = dw_hdmi_bridge_mode_set, + .mode_valid = dw_hdmi_bridge_mode_valid, + }; + +From e70331acdac9e7cdc58b61bfc95461eba889d0d4 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:14:59 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Pass drm_connector to internal + functions as needed + +To prepare for making connector creation optional in the driver, pass +the drm_connector explicitly to the internal functions that require it. +The functions that still access the connector from the dw_hdmi structure +are dw_hdmi_connector_create() and __dw_hdmi_probe(). The former access +is expected, as that's where the internal connector is created. The +latter will be addressed separately. + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-22-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit 81980037fb275d9db1bbb0239682d707e8dd62a0) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 31 ++++++++++++++++++------------- + 1 file changed, 18 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 16bffedb4715..b69c14b9de62 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1632,18 +1632,17 @@ static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) + } + + static void hdmi_config_AVI(struct dw_hdmi *hdmi, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode) + { + struct hdmi_avi_infoframe frame; + u8 val; + + /* Initialise info frame from DRM mode */ +- drm_hdmi_avi_infoframe_from_display_mode(&frame, +- &hdmi->connector, mode); ++ drm_hdmi_avi_infoframe_from_display_mode(&frame, connector, mode); + + if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { +- drm_hdmi_avi_infoframe_quant_range(&frame, &hdmi->connector, +- mode, ++ drm_hdmi_avi_infoframe_quant_range(&frame, connector, mode, + hdmi->hdmi_data.rgb_limited_range ? + HDMI_QUANTIZATION_RANGE_LIMITED : + HDMI_QUANTIZATION_RANGE_FULL); +@@ -1760,14 +1759,14 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, + } + + static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode) + { + struct hdmi_vendor_infoframe frame; + u8 buffer[10]; + ssize_t err; + +- err = drm_hdmi_vendor_infoframe_from_display_mode(&frame, +- &hdmi->connector, ++ err = drm_hdmi_vendor_infoframe_from_display_mode(&frame, connector, + mode); + if (err < 0) + /* +@@ -1813,9 +1812,10 @@ static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, + HDMI_FC_DATAUTO0_VSD_MASK); + } + +-static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi) ++static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi, ++ const struct drm_connector *connector) + { +- const struct drm_connector_state *conn_state = hdmi->connector.state; ++ const struct drm_connector_state *conn_state = connector->state; + struct hdmi_drm_infoframe frame; + u8 buffer[30]; + ssize_t err; +@@ -2118,9 +2118,9 @@ static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) + } + + static int dw_hdmi_setup(struct dw_hdmi *hdmi, ++ const struct drm_connector *connector, + const struct drm_display_mode *mode) + { +- struct drm_connector *connector = &hdmi->connector; + int ret; + + hdmi_disable_overflow_interrupts(hdmi); +@@ -2192,9 +2192,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, + dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__); + + /* HDMI Initialization Step F - Configure AVI InfoFrame */ +- hdmi_config_AVI(hdmi, mode); +- hdmi_config_vendor_specific_infoframe(hdmi, mode); +- hdmi_config_drm_infoframe(hdmi); ++ hdmi_config_AVI(hdmi, connector, mode); ++ hdmi_config_vendor_specific_infoframe(hdmi, connector, mode); ++ hdmi_config_drm_infoframe(hdmi, connector); + } else { + dev_dbg(hdmi->dev, "%s DVI mode\n", __func__); + } +@@ -2263,7 +2263,12 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi) + static void dw_hdmi_poweron(struct dw_hdmi *hdmi) + { + hdmi->bridge_is_on = true; +- dw_hdmi_setup(hdmi, &hdmi->previous_mode); ++ ++ /* ++ * The curr_conn field is guaranteed to be valid here, as this function ++ * is only be called when !hdmi->disabled. ++ */ ++ dw_hdmi_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode); + } + + static void dw_hdmi_poweroff(struct dw_hdmi *hdmi) + +From 9a877974d7d9247d44baf689d8ba1043b7888161 Mon Sep 17 00:00:00 2001 +From: Laurent Pinchart +Date: Tue, 26 May 2020 04:15:00 +0300 +Subject: [PATCH] drm: bridge: dw-hdmi: Make connector creation optional + +Implement the drm_bridge_funcs .detect() and .get_edid() operations, and +call drm_bridge_hpd_notify() notify to report HPD. This provides the +necessary API to support disabling connector creation, do so by +accepting DRM_BRIDGE_ATTACH_NO_CONNECTOR in dw_hdmi_bridge_attach(). + +Signed-off-by: Laurent Pinchart +Reviewed-by: Neil Armstrong +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-23-laurent.pinchart+renesas@ideasonboard.com +(cherry picked from commit ec971aaa6775cff555b4f58777ceab1d9a8370e0) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 104 +++++++++++++++++++++--------- + 1 file changed, 74 insertions(+), 30 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index b69c14b9de62..6148a022569a 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2323,15 +2323,8 @@ static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi) + hdmi->rxsense); + } + +-/* ----------------------------------------------------------------------------- +- * DRM Connector Operations +- */ +- +-static enum drm_connector_status +-dw_hdmi_connector_detect(struct drm_connector *connector, bool force) ++static enum drm_connector_status dw_hdmi_detect(struct dw_hdmi *hdmi) + { +- struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, +- connector); + enum drm_connector_status result; + + mutex_lock(&hdmi->mutex); +@@ -2354,31 +2347,57 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) + return result; + } + +-static int dw_hdmi_connector_get_modes(struct drm_connector *connector) ++static struct edid *dw_hdmi_get_edid(struct dw_hdmi *hdmi, ++ struct drm_connector *connector) + { +- struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, +- connector); + struct edid *edid; +- int ret = 0; + + if (!hdmi->ddc) +- return 0; ++ return NULL; + + edid = drm_get_edid(connector, hdmi->ddc); +- if (edid) { +- dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n", +- edid->width_cm, edid->height_cm); +- +- hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid); +- hdmi->sink_has_audio = drm_detect_monitor_audio(edid); +- drm_connector_update_edid_property(connector, edid); +- cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid); +- ret = drm_add_edid_modes(connector, edid); +- kfree(edid); +- } else { ++ if (!edid) { + dev_dbg(hdmi->dev, "failed to get edid\n"); ++ return NULL; + } + ++ dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n", ++ edid->width_cm, edid->height_cm); ++ ++ hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid); ++ hdmi->sink_has_audio = drm_detect_monitor_audio(edid); ++ ++ return edid; ++} ++ ++/* ----------------------------------------------------------------------------- ++ * DRM Connector Operations ++ */ ++ ++static enum drm_connector_status ++dw_hdmi_connector_detect(struct drm_connector *connector, bool force) ++{ ++ struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, ++ connector); ++ return dw_hdmi_detect(hdmi); ++} ++ ++static int dw_hdmi_connector_get_modes(struct drm_connector *connector) ++{ ++ struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, ++ connector); ++ struct edid *edid; ++ int ret; ++ ++ edid = dw_hdmi_get_edid(hdmi, connector); ++ if (!edid) ++ return 0; ++ ++ drm_connector_update_edid_property(connector, edid); ++ cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid); ++ ret = drm_add_edid_modes(connector, edid); ++ kfree(edid); ++ + return ret; + } + +@@ -2777,10 +2796,8 @@ static int dw_hdmi_bridge_attach(struct drm_bridge *bridge, + { + struct dw_hdmi *hdmi = bridge->driver_private; + +- if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) { +- DRM_ERROR("Fix bridge driver to make connector optional!"); +- return -EINVAL; +- } ++ if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) ++ return 0; + + return dw_hdmi_connector_create(hdmi); + } +@@ -2860,6 +2877,21 @@ static void dw_hdmi_bridge_atomic_enable(struct drm_bridge *bridge, + mutex_unlock(&hdmi->mutex); + } + ++static enum drm_connector_status dw_hdmi_bridge_detect(struct drm_bridge *bridge) ++{ ++ struct dw_hdmi *hdmi = bridge->driver_private; ++ ++ return dw_hdmi_detect(hdmi); ++} ++ ++static struct edid *dw_hdmi_bridge_get_edid(struct drm_bridge *bridge, ++ struct drm_connector *connector) ++{ ++ struct dw_hdmi *hdmi = bridge->driver_private; ++ ++ return dw_hdmi_get_edid(hdmi, connector); ++} ++ + static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = { + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, +@@ -2873,6 +2905,8 @@ static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = { + .atomic_disable = dw_hdmi_bridge_atomic_disable, + .mode_set = dw_hdmi_bridge_mode_set, + .mode_valid = dw_hdmi_bridge_mode_valid, ++ .detect = dw_hdmi_bridge_detect, ++ .get_edid = dw_hdmi_bridge_get_edid, + }; + + /* ----------------------------------------------------------------------------- +@@ -2988,10 +3022,18 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) + } + + if (intr_stat & HDMI_IH_PHY_STAT0_HPD) { ++ enum drm_connector_status status = phy_int_pol & HDMI_PHY_HPD ++ ? connector_status_connected ++ : connector_status_disconnected; ++ + dev_dbg(hdmi->dev, "EVENT=%s\n", +- phy_int_pol & HDMI_PHY_HPD ? "plugin" : "plugout"); +- if (hdmi->bridge.dev) ++ status == connector_status_connected ? ++ "plugin" : "plugout"); ++ ++ if (hdmi->bridge.dev) { + drm_helper_hpd_irq_event(hdmi->bridge.dev); ++ drm_bridge_hpd_notify(&hdmi->bridge, status); ++ } + } + + hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0); +@@ -3337,6 +3379,8 @@ __dw_hdmi_probe(struct platform_device *pdev, + + hdmi->bridge.driver_private = hdmi; + hdmi->bridge.funcs = &dw_hdmi_bridge_funcs; ++ hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID ++ | DRM_BRIDGE_OP_HPD; + #ifdef CONFIG_OF + hdmi->bridge.of_node = pdev->dev.of_node; + #endif + +From 7ba7f0aef832e3153014cb7148a0a4cc6a6beb12 Mon Sep 17 00:00:00 2001 +From: Stanislav Lisovskiy +Date: Tue, 30 Jun 2020 05:56:58 +0530 +Subject: [PATCH] drm: Add helper to compare edids. + +Many drivers would benefit from using +drm helper to compare edid, rather +than bothering with own implementation. + +v2: Added documentation for this function. + +Signed-off-by: Stanislav Lisovskiy +Signed-off-by: Maarten Lankhorst +Link: https://patchwork.freedesktop.org/patch/msgid/20200630002700.5451-2-kunal1.joshi@intel.com +(cherry picked from commit 536faa450e17f32fddb1a2124e3df71a966122cd) +--- + drivers/gpu/drm/drm_edid.c | 33 +++++++++++++++++++++++++++++++++ + include/drm/drm_edid.h | 9 +++++++++ + 2 files changed, 42 insertions(+) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index b3f659759adb..aa0644d8272a 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -1615,6 +1615,39 @@ static bool drm_edid_is_zero(const u8 *in_edid, int length) + return true; + } + ++/** ++ * drm_edid_are_equal - compare two edid blobs. ++ * @edid1: pointer to first blob ++ * @edid2: pointer to second blob ++ * This helper can be used during probing to determine if ++ * edid had changed. ++ */ ++bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2) ++{ ++ int edid1_len, edid2_len; ++ bool edid1_present = edid1 != NULL; ++ bool edid2_present = edid2 != NULL; ++ ++ if (edid1_present != edid2_present) ++ return false; ++ ++ if (edid1) { ++ ++ edid1_len = EDID_LENGTH * (1 + edid1->extensions); ++ edid2_len = EDID_LENGTH * (1 + edid2->extensions); ++ ++ if (edid1_len != edid2_len) ++ return false; ++ ++ if (memcmp(edid1, edid2, edid1_len)) ++ return false; ++ } ++ ++ return true; ++} ++EXPORT_SYMBOL(drm_edid_are_equal); ++ ++ + /** + * drm_edid_block_valid - Sanity check the EDID block (base or extension) + * @raw_edid: pointer to raw EDID block +diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h +index 43254319ab19..cfa4f5af49af 100644 +--- a/include/drm/drm_edid.h ++++ b/include/drm/drm_edid.h +@@ -359,6 +359,15 @@ drm_load_edid_firmware(struct drm_connector *connector) + } + #endif + ++/** ++ * drm_edid_are_equal - compare two edid blobs. ++ * @edid1: pointer to first blob ++ * @edid2: pointer to second blob ++ * This helper can be used during probing to determine if ++ * edid had changed. ++ */ ++bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2); ++ + int + drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, + const struct drm_connector *connector, + +From 8085a1cfd296f70e4d4c197023880fc51c6c14d9 Mon Sep 17 00:00:00 2001 +From: Stanislav Lisovskiy +Date: Tue, 30 Jun 2020 05:56:59 +0530 +Subject: [PATCH] drm: Introduce epoch counter to drm_connector + +This counter will be used by drm_helper_probe_detect caller to determine +if anything had changed(including edid, connection status and etc). +Hardware specific driver detect hooks are responsible for updating this +counter when some change is detected to notify the drm part, +which can trigger for example hotplug event. + +Also now call drm_connector_update_edid_property +right after we get edid always to make sure there is a +unified way to handle edid change, without having to +change tons of source code as currently +drm_connector_update_edid_property is called only in +certain cases like reprobing and not right after edid is +actually updated. + +v2: Added documentation for the new counter. Rename change_counter to + epoch_counter. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105540 + +Signed-off-by: Stanislav Lisovskiy +Signed-off-by: Maarten Lankhorst +Link: https://patchwork.freedesktop.org/patch/msgid/20200630002700.5451-3-kunal1.joshi@intel.com +(cherry picked from commit 5186421cbfe250002308d4d759674214b385752f) +--- + drivers/gpu/drm/drm_connector.c | 16 ++++++++++++++++ + drivers/gpu/drm/drm_edid.c | 8 +++++--- + drivers/gpu/drm/drm_probe_helper.c | 38 +++++++++++++++++++++++++++++++++----- + include/drm/drm_connector.h | 2 ++ + 4 files changed, 56 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c +index d877ddc6dc57..c6d7fc45aeac 100644 +--- a/drivers/gpu/drm/drm_connector.c ++++ b/drivers/gpu/drm/drm_connector.c +@@ -269,6 +269,7 @@ int drm_connector_init(struct drm_device *dev, + INIT_LIST_HEAD(&connector->modes); + mutex_init(&connector->mutex); + connector->edid_blob_ptr = NULL; ++ connector->epoch_counter = 0; + connector->tile_blob_ptr = NULL; + connector->status = connector_status_unknown; + connector->display_info.panel_orientation = +@@ -1954,6 +1955,7 @@ int drm_connector_update_edid_property(struct drm_connector *connector, + struct drm_device *dev = connector->dev; + size_t size = 0; + int ret; ++ const struct edid *old_edid; + + /* ignore requests to set edid when overridden */ + if (connector->override_edid) +@@ -1977,6 +1979,20 @@ int drm_connector_update_edid_property(struct drm_connector *connector, + + drm_update_tile_info(connector, edid); + ++ if (connector->edid_blob_ptr) { ++ old_edid = (const struct edid *)connector->edid_blob_ptr->data; ++ if (old_edid) { ++ if (!drm_edid_are_equal(edid, old_edid)) { ++ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was changed.\n", ++ connector->base.id, connector->name); ++ ++ connector->epoch_counter += 1; ++ DRM_DEBUG_KMS("Updating change counter to %llu\n", ++ connector->epoch_counter); ++ } ++ } ++ } ++ + drm_object_property_set_value(&connector->base, + dev->mode_config.non_desktop_property, + connector->display_info.non_desktop); +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index aa0644d8272a..ddb9a093ad0d 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -1632,7 +1632,6 @@ bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2) + return false; + + if (edid1) { +- + edid1_len = EDID_LENGTH * (1 + edid1->extensions); + edid2_len = EDID_LENGTH * (1 + edid2->extensions); + +@@ -1647,7 +1646,6 @@ bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2) + } + EXPORT_SYMBOL(drm_edid_are_equal); + +- + /** + * drm_edid_block_valid - Sanity check the EDID block (base or extension) + * @raw_edid: pointer to raw EDID block +@@ -2050,13 +2048,17 @@ EXPORT_SYMBOL(drm_probe_ddc); + struct edid *drm_get_edid(struct drm_connector *connector, + struct i2c_adapter *adapter) + { ++ struct edid *edid; ++ + if (connector->force == DRM_FORCE_OFF) + return NULL; + + if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter)) + return NULL; + +- return drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter); ++ edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter); ++ drm_connector_update_edid_property(connector, edid); ++ return edid; + } + EXPORT_SYMBOL(drm_get_edid); + +diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c +index f5d141e0400f..6d3a1dbfcba5 100644 +--- a/drivers/gpu/drm/drm_probe_helper.c ++++ b/drivers/gpu/drm/drm_probe_helper.c +@@ -290,6 +290,9 @@ drm_helper_probe_detect_ctx(struct drm_connector *connector, bool force) + if (WARN_ON(ret < 0)) + ret = connector_status_unknown; + ++ if (ret != connector->status) ++ connector->epoch_counter += 1; ++ + drm_modeset_drop_locks(&ctx); + drm_modeset_acquire_fini(&ctx); + +@@ -323,11 +326,16 @@ drm_helper_probe_detect(struct drm_connector *connector, + return ret; + + if (funcs->detect_ctx) +- return funcs->detect_ctx(connector, ctx, force); ++ ret = funcs->detect_ctx(connector, ctx, force); + else if (connector->funcs->detect) +- return connector->funcs->detect(connector, force); ++ ret = connector->funcs->detect(connector, force); + else +- return connector_status_connected; ++ ret = connector_status_connected; ++ ++ if (ret != connector->status) ++ connector->epoch_counter += 1; ++ ++ return ret; + } + EXPORT_SYMBOL(drm_helper_probe_detect); + +@@ -780,6 +788,7 @@ bool drm_helper_hpd_irq_event(struct drm_device *dev) + struct drm_connector_list_iter conn_iter; + enum drm_connector_status old_status; + bool changed = false; ++ u64 old_epoch_counter; + + if (!dev->mode_config.poll_enabled) + return false; +@@ -793,20 +802,39 @@ bool drm_helper_hpd_irq_event(struct drm_device *dev) + + old_status = connector->status; + ++ old_epoch_counter = connector->epoch_counter; ++ ++ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Old epoch counter %llu\n", connector->base.id, ++ connector->name, ++ old_epoch_counter); ++ + connector->status = drm_helper_probe_detect(connector, NULL, false); + DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n", + connector->base.id, + connector->name, + drm_get_connector_status_name(old_status), + drm_get_connector_status_name(connector->status)); +- if (old_status != connector->status) ++ ++ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] New epoch counter %llu\n", ++ connector->base.id, ++ connector->name, ++ connector->epoch_counter); ++ ++ /* ++ * Check if epoch counter had changed, meaning that we need ++ * to send a uevent. ++ */ ++ if (old_epoch_counter != connector->epoch_counter) + changed = true; ++ + } + drm_connector_list_iter_end(&conn_iter); + mutex_unlock(&dev->mode_config.mutex); + +- if (changed) ++ if (changed) { + drm_kms_helper_hotplug_event(dev); ++ DRM_DEBUG_KMS("Sent hotplug event\n"); ++ } + + return changed; + } +diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h +index fd543d1db9b2..6a451b86c454 100644 +--- a/include/drm/drm_connector.h ++++ b/include/drm/drm_connector.h +@@ -1329,6 +1329,8 @@ struct drm_connector { + enum drm_connector_force force; + /** @override_edid: has the EDID been overwritten through debugfs for testing? */ + bool override_edid; ++ /** @epoch_counter: used to detect any other changes in connector, besides status */ ++ u64 epoch_counter; + + /** + * @possible_encoders: Bit mask of encoders that can drive this + +From 046e4a5427e133a04a50a794e69030f1bf18b046 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 3 Jul 2020 10:07:23 +0200 +Subject: [PATCH] drm/fourcc: Add modifier definitions for describing Amlogic + Video Framebuffer Compression + +Amlogic uses a proprietary lossless image compression protocol and format +for their hardware video codec accelerators, either video decoders or +video input encoders. + +It considerably reduces memory bandwidth while writing and reading +frames in memory. + +The underlying storage is considered to be 3 components, 8bit or 10-bit +per component, YCbCr 420, single plane : +- DRM_FORMAT_YUV420_8BIT +- DRM_FORMAT_YUV420_10BIT + +This modifier will be notably added to DMA-BUF frames imported from the V4L2 +Amlogic VDEC decoder. + +This introduces the basic layout composed of: +- a body content organized in 64x32 superblocks with 4096 bytes per + superblock in default mode. +- a 32 bytes per 128x64 header block + +This layout is tranferrable between Amlogic SoCs supporting this modifier. + +The Memory Saving option exist changing the layout superblock size to save memory when +using 8bit components pixels size. + +Finally is also adds the Scatter Memory layout, meaning the header contains IOMMU +references to the compressed frames content to optimize memory access +and layout. + +In this mode, only the header memory address is needed, thus the content +memory organization is tied to the current producer execution and cannot +be saved/dumped neither transferrable between Amlogic SoCs supporting this +modifier. + +Signed-off-by: Neil Armstrong +Tested-by: Kevin Hilman +Reviewed-by: Kevin Hilman +Acked-by: Daniel Vetter +Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-2-narmstrong@baylibre.com +(cherry picked from commit d6528ec883096e7ccdb08257bcc45670bc878519) +--- + include/uapi/drm/drm_fourcc.h | 81 +++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 81 insertions(+) + +diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h +index 993c1b342315..cbf92fdf2712 100644 +--- a/include/uapi/drm/drm_fourcc.h ++++ b/include/uapi/drm/drm_fourcc.h +@@ -331,6 +331,7 @@ extern "C" { + #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 + #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 + #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 ++#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a + + /* add more to the end as needed */ + +@@ -950,6 +951,86 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) + */ + #define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1) + ++/* ++ * Amlogic Video Framebuffer Compression modifiers ++ * ++ * Amlogic uses a proprietary lossless image compression protocol and format ++ * for their hardware video codec accelerators, either video decoders or ++ * video input encoders. ++ * ++ * It considerably reduces memory bandwidth while writing and reading ++ * frames in memory. ++ * ++ * The underlying storage is considered to be 3 components, 8bit or 10-bit ++ * per component YCbCr 420, single plane : ++ * - DRM_FORMAT_YUV420_8BIT ++ * - DRM_FORMAT_YUV420_10BIT ++ * ++ * The first 8 bits of the mode defines the layout, then the following 8 bits ++ * defines the options changing the layout. ++ * ++ * Not all combinations are valid, and different SoCs may support different ++ * combinations of layout and options. ++ */ ++#define __fourcc_mod_amlogic_layout_mask 0xf ++#define __fourcc_mod_amlogic_options_shift 8 ++#define __fourcc_mod_amlogic_options_mask 0xf ++ ++#define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ ++ fourcc_mod_code(AMLOGIC, \ ++ ((__layout) & __fourcc_mod_amlogic_layout_mask) | \ ++ ((__options) & __fourcc_mod_amlogic_options_mask \ ++ << __fourcc_mod_amlogic_options_shift)) ++ ++/* Amlogic FBC Layouts */ ++ ++/* ++ * Amlogic FBC Basic Layout ++ * ++ * The basic layout is composed of: ++ * - a body content organized in 64x32 superblocks with 4096 bytes per ++ * superblock in default mode. ++ * - a 32 bytes per 128x64 header block ++ * ++ * This layout is transferrable between Amlogic SoCs supporting this modifier. ++ */ ++#define AMLOGIC_FBC_LAYOUT_BASIC (1ULL) ++ ++/* ++ * Amlogic FBC Scatter Memory layout ++ * ++ * Indicates the header contains IOMMU references to the compressed ++ * frames content to optimize memory access and layout. ++ * ++ * In this mode, only the header memory address is needed, thus the ++ * content memory organization is tied to the current producer ++ * execution and cannot be saved/dumped neither transferrable between ++ * Amlogic SoCs supporting this modifier. ++ * ++ * Due to the nature of the layout, these buffers are not expected to ++ * be accessible by the user-space clients, but only accessible by the ++ * hardware producers and consumers. ++ * ++ * The user-space clients should expect a failure while trying to mmap ++ * the DMA-BUF handle returned by the producer. ++ */ ++#define AMLOGIC_FBC_LAYOUT_SCATTER (2ULL) ++ ++/* Amlogic FBC Layout Options Bit Mask */ ++ ++/* ++ * Amlogic FBC Memory Saving mode ++ * ++ * Indicates the storage is packed when pixel size is multiple of word ++ * boudaries, i.e. 8bit should be stored in this mode to save allocation ++ * memory. ++ * ++ * This mode reduces body layout to 3072 bytes per 64x32 superblock with ++ * the basic layout and 3200 bytes per 64x32 superblock combined with ++ * the scatter layout. ++ */ ++#define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0) ++ + #if defined(__cplusplus) + } + #endif + +From a6e5b6b5a07615cbe478e278554e47d1ddf0fa77 Mon Sep 17 00:00:00 2001 +From: Brian Starkey +Date: Fri, 26 Jun 2020 17:48:00 +0100 +Subject: [PATCH] drm: drm_fourcc: Add generic alias for 16_16_TILE modifier + +In cases such as DRM_FORMAT_MOD_SAMSUNG_16_16_TILE, the modifier +describes a generic pixel re-ordering which can be applicable to +multiple vendors. + +Define an alias: DRM_FORMAT_MOD_GENERIC_16_16_TILE, which can be +used to describe this layout in a vendor-neutral way, and add a +comment about the expected usage of such "generic" modifiers. + +Changes in v2: + - Move note about future cases to comment (Daniel) + +Signed-off-by: Brian Starkey +Reviewed-by: Daniel Vetter +Signed-off-by: Liviu Dudau +Link: https://patchwork.freedesktop.org/patch/msgid/20200626164800.11595-1-brian.starkey@arm.com +(cherry picked from commit 9ac2b63791ef63935c71e2a7f5444a1118c4d084) +--- + include/uapi/drm/drm_fourcc.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h +index cbf92fdf2712..4bee7de5f306 100644 +--- a/include/uapi/drm/drm_fourcc.h ++++ b/include/uapi/drm/drm_fourcc.h +@@ -346,8 +346,33 @@ extern "C" { + * When adding a new token please document the layout with a code comment, + * similar to the fourcc codes above. drm_fourcc.h is considered the + * authoritative source for all of these. ++ * ++ * Generic modifier names: ++ * ++ * DRM_FORMAT_MOD_GENERIC_* definitions are used to provide vendor-neutral names ++ * for layouts which are common across multiple vendors. To preserve ++ * compatibility, in cases where a vendor-specific definition already exists and ++ * a generic name for it is desired, the common name is a purely symbolic alias ++ * and must use the same numerical value as the original definition. ++ * ++ * Note that generic names should only be used for modifiers which describe ++ * generic layouts (such as pixel re-ordering), which may have ++ * independently-developed support across multiple vendors. ++ * ++ * In future cases where a generic layout is identified before merging with a ++ * vendor-specific modifier, a new 'GENERIC' vendor or modifier using vendor ++ * 'NONE' could be considered. This should only be for obvious, exceptional ++ * cases to avoid polluting the 'GENERIC' namespace with modifiers which only ++ * apply to a single vendor. ++ * ++ * Generic names should not be used for cases where multiple hardware vendors ++ * have implementations of the same standardised compression scheme (such as ++ * AFBC). In those cases, all implementations should use the same format ++ * modifier(s), reflecting the vendor of the standard. + */ + ++#define DRM_FORMAT_MOD_GENERIC_16_16_TILE DRM_FORMAT_MOD_SAMSUNG_16_16_TILE ++ + /* + * Invalid Modifier + * + +From ffef9e6d93cea1613e62d2e73c9e9ebcf78d23ad Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Wed, 27 May 2020 16:03:08 +0300 +Subject: [PATCH] drm/edid: Allow looking for ext blocks starting from a + specified index +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Apparently EDIDs with multiple DispID ext blocks is a thing, so prepare +for iterating through multiple ext blocks of the same type by +passing the starting ext block index to drm_find_edid_extension(). Well +also have drm_find_edid_extension() update the index to point to the +next ext block on success. Thus we should be able to call +drm_find_edid_extension() in loop. + +Signed-off-by: Ville Syrjälä +Link: https://patchwork.freedesktop.org/patch/msgid/20200527130310.27099-1-ville.syrjala@linux.intel.com +Reviewed-by: José Roberto de Souza +(cherry picked from commit 8873cfa384055d0348c03161420b1e9b6c1dc5d0) +--- + drivers/gpu/drm/drm_edid.c | 30 +++++++++++++++++++++--------- + 1 file changed, 21 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index ddb9a093ad0d..06cb75b9fc44 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -3226,7 +3226,8 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, + /* + * Search EDID for CEA extension block. + */ +-static u8 *drm_find_edid_extension(const struct edid *edid, int ext_id) ++static u8 *drm_find_edid_extension(const struct edid *edid, ++ int ext_id, int *ext_index) + { + u8 *edid_ext = NULL; + int i; +@@ -3236,23 +3237,26 @@ static u8 *drm_find_edid_extension(const struct edid *edid, int ext_id) + return NULL; + + /* Find CEA extension */ +- for (i = 0; i < edid->extensions; i++) { ++ for (i = *ext_index; i < edid->extensions; i++) { + edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); + if (edid_ext[0] == ext_id) + break; + } + +- if (i == edid->extensions) ++ if (i >= edid->extensions) + return NULL; + ++ *ext_index = i + 1; ++ + return edid_ext; + } + + + static u8 *drm_find_displayid_extension(const struct edid *edid, +- int *length, int *idx) ++ int *length, int *idx, ++ int *ext_index) + { +- u8 *displayid = drm_find_edid_extension(edid, DISPLAYID_EXT); ++ u8 *displayid = drm_find_edid_extension(edid, DISPLAYID_EXT, ext_index); + struct displayid_hdr *base; + int ret; + +@@ -3279,14 +3283,18 @@ static u8 *drm_find_cea_extension(const struct edid *edid) + struct displayid_block *block; + u8 *cea; + u8 *displayid; ++ int ext_index; + + /* Look for a top level CEA extension block */ +- cea = drm_find_edid_extension(edid, CEA_EXT); ++ ext_index = 0; ++ cea = drm_find_edid_extension(edid, CEA_EXT, &ext_index); + if (cea) + return cea; + + /* CEA blocks can also be found embedded in a DisplayID block */ +- displayid = drm_find_displayid_extension(edid, &length, &idx); ++ ext_index = 0; ++ displayid = drm_find_displayid_extension(edid, &length, &idx, ++ &ext_index); + if (!displayid) + return NULL; + +@@ -5236,8 +5244,10 @@ static int add_displayid_detailed_modes(struct drm_connector *connector, + int length, idx; + struct displayid_block *block; + int num_modes = 0; ++ int ext_index = 0; + +- displayid = drm_find_displayid_extension(edid, &length, &idx); ++ displayid = drm_find_displayid_extension(edid, &length, &idx, ++ &ext_index); + if (!displayid) + return 0; + +@@ -5911,11 +5921,13 @@ void drm_update_tile_info(struct drm_connector *connector, + const struct edid *edid) + { + const void *displayid = NULL; ++ int ext_index = 0; + int length, idx; + int ret; + + connector->has_tile = false; +- displayid = drm_find_displayid_extension(edid, &length, &idx); ++ displayid = drm_find_displayid_extension(edid, &length, &idx, ++ &ext_index); + if (!displayid) { + /* drop reference to any tile group we had */ + goto out_drop_ref; + +From 7a987517ed8a51a6e4f27194e46ed67def79ce44 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Wed, 27 May 2020 16:03:09 +0300 +Subject: [PATCH] drm/edid: Iterate through all DispID ext blocks +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Apparently there are EDIDs in the wild with multiple DispID extension +blocks. Iterate through them all. + +In one particular case the tile information is specicied in the +second DispID ext block, and since the current parser only looks +at the first DispID ext block we don't notice that we're dealing +with a tiled display. + +While at it change a few functions to return void since we have +no use for the errno. + +References: https://gitlab.freedesktop.org/drm/intel/-/issues/27 +Signed-off-by: Ville Syrjälä +Link: https://patchwork.freedesktop.org/patch/msgid/20200527130310.27099-2-ville.syrjala@linux.intel.com +Reviewed-by: José Roberto de Souza +(cherry picked from commit 7f261afdcfae363192e3eef52dd34855cc149c15) +--- + drivers/gpu/drm/drm_edid.c | 84 +++++++++++++++++++++------------------------- + 1 file changed, 38 insertions(+), 46 deletions(-) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index 06cb75b9fc44..fcd739af570f 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -3286,6 +3286,7 @@ static u8 *drm_find_cea_extension(const struct edid *edid) + int ext_index; + + /* Look for a top level CEA extension block */ ++ /* FIXME: make callers iterate through multiple CEA ext blocks? */ + ext_index = 0; + cea = drm_find_edid_extension(edid, CEA_EXT, &ext_index); + if (cea) +@@ -3293,20 +3294,20 @@ static u8 *drm_find_cea_extension(const struct edid *edid) + + /* CEA blocks can also be found embedded in a DisplayID block */ + ext_index = 0; +- displayid = drm_find_displayid_extension(edid, &length, &idx, +- &ext_index); +- if (!displayid) +- return NULL; ++ for (;;) { ++ displayid = drm_find_displayid_extension(edid, &length, &idx, ++ &ext_index); ++ if (!displayid) ++ return NULL; + +- idx += sizeof(struct displayid_hdr); +- for_each_displayid_db(displayid, block, idx, length) { +- if (block->tag == DATA_BLOCK_CTA) { +- cea = (u8 *)block; +- break; ++ idx += sizeof(struct displayid_hdr); ++ for_each_displayid_db(displayid, block, idx, length) { ++ if (block->tag == DATA_BLOCK_CTA) ++ return (u8 *)block; + } + } + +- return cea; ++ return NULL; + } + + static __always_inline const struct drm_display_mode *cea_mode_for_vic(u8 vic) +@@ -5246,19 +5247,22 @@ static int add_displayid_detailed_modes(struct drm_connector *connector, + int num_modes = 0; + int ext_index = 0; + +- displayid = drm_find_displayid_extension(edid, &length, &idx, +- &ext_index); +- if (!displayid) +- return 0; +- +- idx += sizeof(struct displayid_hdr); +- for_each_displayid_db(displayid, block, idx, length) { +- switch (block->tag) { +- case DATA_BLOCK_TYPE_1_DETAILED_TIMING: +- num_modes += add_displayid_detailed_1_modes(connector, block); ++ for (;;) { ++ displayid = drm_find_displayid_extension(edid, &length, &idx, ++ &ext_index); ++ if (!displayid) + break; ++ ++ idx += sizeof(struct displayid_hdr); ++ for_each_displayid_db(displayid, block, idx, length) { ++ switch (block->tag) { ++ case DATA_BLOCK_TYPE_1_DETAILED_TIMING: ++ num_modes += add_displayid_detailed_1_modes(connector, block); ++ break; ++ } + } + } ++ + return num_modes; + } + +@@ -5838,8 +5842,8 @@ drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, + } + EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode); + +-static int drm_parse_tiled_block(struct drm_connector *connector, +- const struct displayid_block *block) ++static void drm_parse_tiled_block(struct drm_connector *connector, ++ const struct displayid_block *block) + { + const struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block; + u16 w, h; +@@ -5877,7 +5881,7 @@ static int drm_parse_tiled_block(struct drm_connector *connector, + tg = drm_mode_create_tile_group(connector->dev, tile->topology_id); + } + if (!tg) +- return -ENOMEM; ++ return; + + if (connector->tile_group != tg) { + /* if we haven't got a pointer, +@@ -5889,14 +5893,12 @@ static int drm_parse_tiled_block(struct drm_connector *connector, + } else + /* if same tile group, then release the ref we just took. */ + drm_mode_put_tile_group(connector->dev, tg); +- return 0; + } + +-static int drm_displayid_parse_tiled(struct drm_connector *connector, +- const u8 *displayid, int length, int idx) ++static void drm_displayid_parse_tiled(struct drm_connector *connector, ++ const u8 *displayid, int length, int idx) + { + const struct displayid_block *block; +- int ret; + + idx += sizeof(struct displayid_hdr); + for_each_displayid_db(displayid, block, idx, length) { +@@ -5905,16 +5907,13 @@ static int drm_displayid_parse_tiled(struct drm_connector *connector, + + switch (block->tag) { + case DATA_BLOCK_TILED_DISPLAY: +- ret = drm_parse_tiled_block(connector, block); +- if (ret) +- return ret; ++ drm_parse_tiled_block(connector, block); + break; + default: + DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag); + break; + } + } +- return 0; + } + + void drm_update_tile_info(struct drm_connector *connector, +@@ -5923,26 +5922,19 @@ void drm_update_tile_info(struct drm_connector *connector, + const void *displayid = NULL; + int ext_index = 0; + int length, idx; +- int ret; + + connector->has_tile = false; +- displayid = drm_find_displayid_extension(edid, &length, &idx, +- &ext_index); +- if (!displayid) { +- /* drop reference to any tile group we had */ +- goto out_drop_ref; ++ for (;;) { ++ displayid = drm_find_displayid_extension(edid, &length, &idx, ++ &ext_index); ++ if (!displayid) ++ break; ++ ++ drm_displayid_parse_tiled(connector, displayid, length, idx); + } + +- ret = drm_displayid_parse_tiled(connector, displayid, length, idx); +- if (ret < 0) +- goto out_drop_ref; +- if (!connector->has_tile) +- goto out_drop_ref; +- return; +-out_drop_ref: +- if (connector->tile_group) { ++ if (!connector->has_tile && connector->tile_group) { + drm_mode_put_tile_group(connector->dev, connector->tile_group); + connector->tile_group = NULL; + } +- return; + } + +From b08694ca37609d75f9d2fe8e4d8c22185cac626b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Wed, 27 May 2020 16:03:10 +0300 +Subject: [PATCH] drm/edid: Clean up some curly braces +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Drop some pointless curly braces, and add some across the +else when the if has them too. + +Signed-off-by: Ville Syrjälä +Link: https://patchwork.freedesktop.org/patch/msgid/20200527130310.27099-3-ville.syrjala@linux.intel.com +Reviewed-by: José Roberto de Souza +(cherry picked from commit 392f9fcb159bf95ec3c7de340a880f4778167275) +--- + drivers/gpu/drm/drm_edid.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index fcd739af570f..c28e7678014d 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -5877,22 +5877,21 @@ static void drm_parse_tiled_block(struct drm_connector *connector, + DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]); + + tg = drm_mode_get_tile_group(connector->dev, tile->topology_id); +- if (!tg) { ++ if (!tg) + tg = drm_mode_create_tile_group(connector->dev, tile->topology_id); +- } + if (!tg) + return; + + if (connector->tile_group != tg) { + /* if we haven't got a pointer, + take the reference, drop ref to old tile group */ +- if (connector->tile_group) { ++ if (connector->tile_group) + drm_mode_put_tile_group(connector->dev, connector->tile_group); +- } + connector->tile_group = tg; +- } else ++ } else { + /* if same tile group, then release the ref we just took. */ + drm_mode_put_tile_group(connector->dev, tg); ++ } + } + + static void drm_displayid_parse_tiled(struct drm_connector *connector, + +From 7d9ebd53573f7632d64d61410fb905415de3e81d Mon Sep 17 00:00:00 2001 +From: Liu Ying +Date: Thu, 9 Jul 2020 10:02:35 +0800 +Subject: [PATCH] drm/bridge: dw-hdmi: Don't cleanup i2c adapter and ddc ptr in + __dw_hdmi_probe() bailout path + +It's unnecessary to cleanup the i2c adapter and the ddc pointer in +the bailout path of __dw_hdmi_probe(), since the adapter is not +added and the ddc pointer is not set. + +Fixes: a23d6265f033 ("drm: bridge: dw-hdmi: Extract PHY interrupt setup to a function") +Cc: Andrzej Hajda +Cc: Neil Armstrong +Cc: Laurent Pinchart +Cc: Jonas Karlman +Cc: Jernej Skrabec +Cc: David Airlie +Cc: Daniel Vetter +Cc: Boris Brezillon +Cc: Jerome Brunet +Cc: Cheng-Yi Chiang +Cc: Dariusz Marcinkiewicz +Cc: Archit Taneja +Cc: Jose Abreu +Cc: dri-devel@lists.freedesktop.org +Cc: NXP Linux Team +Signed-off-by: Liu Ying +Reviewed-by: Laurent Pinchart +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/1594260156-8316-1-git-send-email-victor.liu@nxp.com +(cherry picked from commit 2ae53e79f2dec41949d7b089c0b6d7edce292d10) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 6148a022569a..137b6ebfed19 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -3441,11 +3441,6 @@ __dw_hdmi_probe(struct platform_device *pdev, + return hdmi; + + err_iahb: +- if (hdmi->i2c) { +- i2c_del_adapter(&hdmi->i2c->adap); +- hdmi->ddc = NULL; +- } +- + clk_disable_unprepare(hdmi->iahb_clk); + if (hdmi->cec_clk) + clk_disable_unprepare(hdmi->cec_clk); + +From 62824ff0d032a45a21b21c95c4f6081c5e646edf Mon Sep 17 00:00:00 2001 +From: Liu Ying +Date: Thu, 9 Jul 2020 10:02:36 +0800 +Subject: [PATCH] drm/bridge: dw-hdmi: Always add the bridge in the global + bridge list + +It doesn't hurt to add the bridge in the global bridge list also for +platform specific dw-hdmi drivers which are based on the component +framework. This can be achieved by moving the drm_bridge_add() function +call from dw_hdmi_probe() to __dw_hdmi_probe(). A counterpart movement +for drm_bridge_remove() is also needed then. Moreover, since drm_bridge_add() +initializes &bridge->hpd_mutex, this may help those platform specific +dw-hdmi drivers(based on the component framework) avoid accessing the +uninitialized mutex in drm_bridge_hpd_notify() which is called in +dw_hdmi_irq(). Putting drm_bridge_add() in __dw_hdmi_probe() just before +it returns successfully should bring no logic change for platforms based +on the DRM bridge API, which is a good choice from safety point of view. +Also, __dw_hdmi_probe() is renamed to dw_hdmi_probe() since dw_hdmi_probe() +does nothing else but calling __dw_hdmi_probe(). Similar renaming applies +to the __dw_hdmi_remove()/dw_hdmi_remove() pair. + +Fixes: ec971aaa6775 ("drm: bridge: dw-hdmi: Make connector creation optional") +Cc: Andrzej Hajda +Cc: Neil Armstrong +Cc: Laurent Pinchart +Cc: Jonas Karlman +Cc: Jernej Skrabec +Cc: David Airlie +Cc: Daniel Vetter +Cc: Boris Brezillon +Cc: Jerome Brunet +Cc: Cheng-Yi Chiang +Cc: Dariusz Marcinkiewicz +Cc: Archit Taneja +Cc: Jose Abreu +Cc: Sam Ravnborg +Cc: dri-devel@lists.freedesktop.org +Cc: NXP Linux Team +Signed-off-by: Liu Ying +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/1594260156-8316-2-git-send-email-victor.liu@nxp.com +(cherry picked from commit 0bf4f5b5d3972df7014df302b95b58b8de1a1e94) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 44 +++++++++---------------------- + 1 file changed, 13 insertions(+), 31 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 137b6ebfed19..748df1cacd2b 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -3179,9 +3179,11 @@ static void dw_hdmi_init_hw(struct dw_hdmi *hdmi) + hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data); + } + +-static struct dw_hdmi * +-__dw_hdmi_probe(struct platform_device *pdev, +- const struct dw_hdmi_plat_data *plat_data) ++/* ----------------------------------------------------------------------------- ++ * Probe/remove API, used from platforms based on the DRM bridge API. ++ */ ++struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev, ++ const struct dw_hdmi_plat_data *plat_data) + { + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; +@@ -3438,6 +3440,8 @@ __dw_hdmi_probe(struct platform_device *pdev, + hdmi->cec = platform_device_register_full(&pdevinfo); + } + ++ drm_bridge_add(&hdmi->bridge); ++ + return hdmi; + + err_iahb: +@@ -3451,9 +3455,12 @@ __dw_hdmi_probe(struct platform_device *pdev, + + return ERR_PTR(ret); + } ++EXPORT_SYMBOL_GPL(dw_hdmi_probe); + +-static void __dw_hdmi_remove(struct dw_hdmi *hdmi) ++void dw_hdmi_remove(struct dw_hdmi *hdmi) + { ++ drm_bridge_remove(&hdmi->bridge); ++ + if (hdmi->audio && !IS_ERR(hdmi->audio)) + platform_device_unregister(hdmi->audio); + if (!IS_ERR(hdmi->cec)) +@@ -3472,31 +3479,6 @@ static void __dw_hdmi_remove(struct dw_hdmi *hdmi) + else + i2c_put_adapter(hdmi->ddc); + } +- +-/* ----------------------------------------------------------------------------- +- * Probe/remove API, used from platforms based on the DRM bridge API. +- */ +-struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev, +- const struct dw_hdmi_plat_data *plat_data) +-{ +- struct dw_hdmi *hdmi; +- +- hdmi = __dw_hdmi_probe(pdev, plat_data); +- if (IS_ERR(hdmi)) +- return hdmi; +- +- drm_bridge_add(&hdmi->bridge); +- +- return hdmi; +-} +-EXPORT_SYMBOL_GPL(dw_hdmi_probe); +- +-void dw_hdmi_remove(struct dw_hdmi *hdmi) +-{ +- drm_bridge_remove(&hdmi->bridge); +- +- __dw_hdmi_remove(hdmi); +-} + EXPORT_SYMBOL_GPL(dw_hdmi_remove); + + /* ----------------------------------------------------------------------------- +@@ -3509,7 +3491,7 @@ struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev, + struct dw_hdmi *hdmi; + int ret; + +- hdmi = __dw_hdmi_probe(pdev, plat_data); ++ hdmi = dw_hdmi_probe(pdev, plat_data); + if (IS_ERR(hdmi)) + return hdmi; + +@@ -3526,7 +3508,7 @@ EXPORT_SYMBOL_GPL(dw_hdmi_bind); + + void dw_hdmi_unbind(struct dw_hdmi *hdmi) + { +- __dw_hdmi_remove(hdmi); ++ dw_hdmi_remove(hdmi); + } + EXPORT_SYMBOL_GPL(dw_hdmi_unbind); + + +From 7815bc21a8e65bde5ef846a49a0d3735ee942698 Mon Sep 17 00:00:00 2001 +From: Andrey Lebedev +Date: Fri, 19 Jun 2020 10:58:59 +0300 +Subject: [PATCH] drm/lima: Expose job_hang_limit module parameter + +Some pp or gp jobs can be successfully repeated even after they time outs. +Introduce lima module parameter to specify number of times a job can hang +before being dropped. + +Signed-off-by: Andrey Lebedev +Signed-off-by: Qiang Yu +Link: https://patchwork.freedesktop.org/patch/msgid/20200619075900.3030696-1-andrey.lebedev@gmail.com +(cherry picked from commit de48984486d942d4f23e2b29374639f21042bdaa) +--- + drivers/gpu/drm/lima/lima_drv.c | 4 ++++ + drivers/gpu/drm/lima/lima_drv.h | 1 + + drivers/gpu/drm/lima/lima_sched.c | 5 +++-- + 3 files changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c +index a831565af813..ab460121fd52 100644 +--- a/drivers/gpu/drm/lima/lima_drv.c ++++ b/drivers/gpu/drm/lima/lima_drv.c +@@ -19,6 +19,7 @@ + int lima_sched_timeout_ms; + uint lima_heap_init_nr_pages = 8; + uint lima_max_error_tasks; ++uint lima_job_hang_limit; + + MODULE_PARM_DESC(sched_timeout_ms, "task run timeout in ms"); + module_param_named(sched_timeout_ms, lima_sched_timeout_ms, int, 0444); +@@ -29,6 +30,9 @@ module_param_named(heap_init_nr_pages, lima_heap_init_nr_pages, uint, 0444); + MODULE_PARM_DESC(max_error_tasks, "max number of error tasks to save"); + module_param_named(max_error_tasks, lima_max_error_tasks, uint, 0644); + ++MODULE_PARM_DESC(job_hang_limit, "number of times to allow a job to hang before dropping it (default 0)"); ++module_param_named(job_hang_limit, lima_job_hang_limit, uint, 0444); ++ + static int lima_ioctl_get_param(struct drm_device *dev, void *data, struct drm_file *file) + { + struct drm_lima_get_param *args = data; +diff --git a/drivers/gpu/drm/lima/lima_drv.h b/drivers/gpu/drm/lima/lima_drv.h +index fdbd4077c768..c738d288547b 100644 +--- a/drivers/gpu/drm/lima/lima_drv.h ++++ b/drivers/gpu/drm/lima/lima_drv.h +@@ -11,6 +11,7 @@ + extern int lima_sched_timeout_ms; + extern uint lima_heap_init_nr_pages; + extern uint lima_max_error_tasks; ++extern uint lima_job_hang_limit; + + struct lima_vm; + struct lima_bo; +diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c +index e6cefda00279..1602985dfa04 100644 +--- a/drivers/gpu/drm/lima/lima_sched.c ++++ b/drivers/gpu/drm/lima/lima_sched.c +@@ -503,8 +503,9 @@ int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name) + + INIT_WORK(&pipe->recover_work, lima_sched_recover_work); + +- return drm_sched_init(&pipe->base, &lima_sched_ops, 1, 0, +- msecs_to_jiffies(timeout), name); ++ return drm_sched_init(&pipe->base, &lima_sched_ops, 1, ++ lima_job_hang_limit, msecs_to_jiffies(timeout), ++ name); + } + + void lima_sched_pipe_fini(struct lima_sched_pipe *pipe) diff --git a/projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch b/projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch new file mode 100644 index 0000000000..43c39f03d6 --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch @@ -0,0 +1,1276 @@ +From 0265e50360c4bf2bc327f41e662180428652933e Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 23 Jul 2020 11:05:50 +0200 +Subject: [PATCH] drm/fourcc: fix Amlogic Video Framebuffer Compression macro + +Fix the Amlogic Video Framebuffer Compression modifier macro to +correctly add the layout options, a pair of parenthesis was missing. + +Fixes: d6528ec88309 ("drm/fourcc: Add modifier definitions for describing Amlogic Video Framebuffer Compression") +Signed-off-by: Neil Armstrong +Acked-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200723090551.27529-1-narmstrong@baylibre.com +(cherry picked from commit da3a9e9a6aa96ef589c153078f66e0646bf06b55) +--- + include/uapi/drm/drm_fourcc.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h +index 4bee7de5f306..82f327801267 100644 +--- a/include/uapi/drm/drm_fourcc.h ++++ b/include/uapi/drm/drm_fourcc.h +@@ -1004,7 +1004,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) + #define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ + fourcc_mod_code(AMLOGIC, \ + ((__layout) & __fourcc_mod_amlogic_layout_mask) | \ +- ((__options) & __fourcc_mod_amlogic_options_mask \ ++ (((__options) & __fourcc_mod_amlogic_options_mask) \ + << __fourcc_mod_amlogic_options_shift)) + + /* Amlogic FBC Layouts */ + +From 97445c33a53e91080924607652c349470021f903 Mon Sep 17 00:00:00 2001 +From: Tomeu Vizoso +Date: Thu, 11 Jun 2020 10:58:43 +0200 +Subject: [PATCH] drm/panfrost: Make sure GPU is powered on when reading + GPU_LATEST_FLUSH_ID + +Bifrost devices do support the flush reduction feature, so on first job +submit we were trying to read the register while still powered off. + +If the GPU is powered off, the feature doesn't bring any benefit, so +don't try to read. + +Tested-by: Heiko Stuebner +Reviewed-by: Steven Price +Signed-off-by: Tomeu Vizoso +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200611085900.49740-1-tomeu.vizoso@collabora.com +(cherry picked from commit 3a74265c54f883c847ed8554129baefb3e04f135) +--- + drivers/gpu/drm/panfrost/panfrost_gpu.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c +index f2c1ddc41a9b..e0f190e43813 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c ++++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + + #include "panfrost_device.h" + #include "panfrost_features.h" +@@ -368,7 +369,16 @@ void panfrost_gpu_fini(struct panfrost_device *pfdev) + + u32 panfrost_gpu_get_latest_flush_id(struct panfrost_device *pfdev) + { +- if (panfrost_has_hw_feature(pfdev, HW_FEATURE_FLUSH_REDUCTION)) +- return gpu_read(pfdev, GPU_LATEST_FLUSH_ID); ++ u32 flush_id; ++ ++ if (panfrost_has_hw_feature(pfdev, HW_FEATURE_FLUSH_REDUCTION)) { ++ /* Flush reduction only makes sense when the GPU is kept powered on between jobs */ ++ if (pm_runtime_get_if_in_use(pfdev->dev)) { ++ flush_id = gpu_read(pfdev, GPU_LATEST_FLUSH_ID); ++ pm_runtime_put(pfdev->dev); ++ return flush_id; ++ } ++ } ++ + return 0; + } + +From 60dffdcdb8acfc408d983e1a57882346dcf15548 Mon Sep 17 00:00:00 2001 +From: Tomeu Vizoso +Date: Thu, 11 Jun 2020 10:58:44 +0200 +Subject: [PATCH] drm/panfrost: Add compatible string for bifrost + +Mesa now supports some Bifrost devices, so enable it. + +Tested-by: Heiko Stuebner +Reviewed-by: Steven Price +Reviewed-by: Heiko Stuebner +Signed-off-by: Tomeu Vizoso +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200611085900.49740-2-tomeu.vizoso@collabora.com +(cherry picked from commit 72ef7fe96fd20d3d0e538e165b393819f99870ad) +--- + drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c +index 882fecc33fdb..8ff8e140f91e 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_drv.c ++++ b/drivers/gpu/drm/panfrost/panfrost_drv.c +@@ -677,6 +677,7 @@ static const struct of_device_id dt_match[] = { + { .compatible = "arm,mali-t830", .data = &default_data, }, + { .compatible = "arm,mali-t860", .data = &default_data, }, + { .compatible = "arm,mali-t880", .data = &default_data, }, ++ { .compatible = "arm,mali-bifrost", .data = &default_data, }, + {} + }; + MODULE_DEVICE_TABLE(of, dt_match); + +From 6cb794d2c595862996db8e2b0f6749b06b7f8338 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:53:56 +0200 +Subject: [PATCH] drm/panfrost: avoid static declaration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This declaration can be avoided so change it. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-2-peron.clem@gmail.com +(cherry picked from commit 862cc626210e34501b4d7a7795c41a67785987e5) +--- + drivers/gpu/drm/panfrost/panfrost_devfreq.c | 38 ++++++++++++++--------------- + 1 file changed, 18 insertions(+), 20 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +index 413987038fbf..1b560b903ea6 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +@@ -14,7 +14,24 @@ + #include "panfrost_gpu.h" + #include "panfrost_regs.h" + +-static void panfrost_devfreq_update_utilization(struct panfrost_device *pfdev); ++static void panfrost_devfreq_update_utilization(struct panfrost_device *pfdev) ++{ ++ ktime_t now; ++ ktime_t last; ++ ++ if (!pfdev->devfreq.devfreq) ++ return; ++ ++ now = ktime_get(); ++ last = pfdev->devfreq.time_last_update; ++ ++ if (atomic_read(&pfdev->devfreq.busy_count) > 0) ++ pfdev->devfreq.busy_time += ktime_sub(now, last); ++ else ++ pfdev->devfreq.idle_time += ktime_sub(now, last); ++ ++ pfdev->devfreq.time_last_update = now; ++} + + static int panfrost_devfreq_target(struct device *dev, unsigned long *freq, + u32 flags) +@@ -139,25 +156,6 @@ void panfrost_devfreq_suspend(struct panfrost_device *pfdev) + devfreq_suspend_device(pfdev->devfreq.devfreq); + } + +-static void panfrost_devfreq_update_utilization(struct panfrost_device *pfdev) +-{ +- ktime_t now; +- ktime_t last; +- +- if (!pfdev->devfreq.devfreq) +- return; +- +- now = ktime_get(); +- last = pfdev->devfreq.time_last_update; +- +- if (atomic_read(&pfdev->devfreq.busy_count) > 0) +- pfdev->devfreq.busy_time += ktime_sub(now, last); +- else +- pfdev->devfreq.idle_time += ktime_sub(now, last); +- +- pfdev->devfreq.time_last_update = now; +-} +- + void panfrost_devfreq_record_busy(struct panfrost_device *pfdev) + { + panfrost_devfreq_update_utilization(pfdev); + +From f8582b7b92b88a7a5721c93a43f64cce7996a3ba Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:53:57 +0200 +Subject: [PATCH] drm/panfrost: clean headers in devfreq +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Don't include not required headers and sort them. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-3-peron.clem@gmail.com +(cherry picked from commit 9713e942a539c55b5e0bc64ba83b736bda1087fe) +--- + drivers/gpu/drm/panfrost/panfrost_devfreq.c | 8 ++------ + 1 file changed, 2 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +index 1b560b903ea6..df7b71da9a84 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +@@ -1,18 +1,14 @@ + // SPDX-License-Identifier: GPL-2.0 + /* Copyright 2019 Collabora ltd. */ ++ ++#include + #include + #include + #include + #include +-#include +-#include + + #include "panfrost_device.h" + #include "panfrost_devfreq.h" +-#include "panfrost_features.h" +-#include "panfrost_issues.h" +-#include "panfrost_gpu.h" +-#include "panfrost_regs.h" + + static void panfrost_devfreq_update_utilization(struct panfrost_device *pfdev) + { + +From 4bf3b83ab197a9b567917998d8d7e5d069bff60f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:53:58 +0200 +Subject: [PATCH] drm/panfrost: don't use pfdevfreq.busy_count to know if hw is + idle +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This use devfreq variable that will be lock with spinlock in future +patches. We should either introduce a function to access this one +but as devfreq is optional let's just remove it. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-4-peron.clem@gmail.com +(cherry picked from commit eb9dd67249b55fd1fa3d7359be387ea2079247a6) +--- + drivers/gpu/drm/panfrost/panfrost_job.c | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c +index c6242fe34840..aec05be1ba7a 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_job.c ++++ b/drivers/gpu/drm/panfrost/panfrost_job.c +@@ -581,10 +581,6 @@ int panfrost_job_is_idle(struct panfrost_device *pfdev) + struct panfrost_job_slot *js = pfdev->js; + int i; + +- /* Check whether the hardware is idle */ +- if (atomic_read(&pfdev->devfreq.busy_count)) +- return false; +- + for (i = 0; i < NUM_JOB_SLOTS; i++) { + /* If there are any jobs in the HW queue, we're not idle */ + if (atomic_read(&js->queue[i].sched.hw_rq_count)) + +From 6127648dc07553d337a56d9f12857110e13aae9a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:53:59 +0200 +Subject: [PATCH] drm/panfrost: introduce panfrost_devfreq struct +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Introduce a proper panfrost_devfreq to deal with devfreq variables. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-5-peron.clem@gmail.com +(cherry picked from commit 9bfacfc82f903b066b0b63460d5b7943705048a4) +--- + drivers/gpu/drm/panfrost/panfrost_devfreq.c | 76 ++++++++++++++++------------- + drivers/gpu/drm/panfrost/panfrost_devfreq.h | 20 +++++++- + drivers/gpu/drm/panfrost/panfrost_device.h | 11 ++--- + drivers/gpu/drm/panfrost/panfrost_job.c | 6 +-- + 4 files changed, 66 insertions(+), 47 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +index df7b71da9a84..962550363391 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +@@ -10,23 +10,23 @@ + #include "panfrost_device.h" + #include "panfrost_devfreq.h" + +-static void panfrost_devfreq_update_utilization(struct panfrost_device *pfdev) ++static void panfrost_devfreq_update_utilization(struct panfrost_devfreq *pfdevfreq) + { + ktime_t now; + ktime_t last; + +- if (!pfdev->devfreq.devfreq) ++ if (!pfdevfreq->devfreq) + return; + + now = ktime_get(); +- last = pfdev->devfreq.time_last_update; ++ last = pfdevfreq->time_last_update; + +- if (atomic_read(&pfdev->devfreq.busy_count) > 0) +- pfdev->devfreq.busy_time += ktime_sub(now, last); ++ if (atomic_read(&pfdevfreq->busy_count) > 0) ++ pfdevfreq->busy_time += ktime_sub(now, last); + else +- pfdev->devfreq.idle_time += ktime_sub(now, last); ++ pfdevfreq->idle_time += ktime_sub(now, last); + +- pfdev->devfreq.time_last_update = now; ++ pfdevfreq->time_last_update = now; + } + + static int panfrost_devfreq_target(struct device *dev, unsigned long *freq, +@@ -47,30 +47,31 @@ static int panfrost_devfreq_target(struct device *dev, unsigned long *freq, + return 0; + } + +-static void panfrost_devfreq_reset(struct panfrost_device *pfdev) ++static void panfrost_devfreq_reset(struct panfrost_devfreq *pfdevfreq) + { +- pfdev->devfreq.busy_time = 0; +- pfdev->devfreq.idle_time = 0; +- pfdev->devfreq.time_last_update = ktime_get(); ++ pfdevfreq->busy_time = 0; ++ pfdevfreq->idle_time = 0; ++ pfdevfreq->time_last_update = ktime_get(); + } + + static int panfrost_devfreq_get_dev_status(struct device *dev, + struct devfreq_dev_status *status) + { + struct panfrost_device *pfdev = dev_get_drvdata(dev); ++ struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; + +- panfrost_devfreq_update_utilization(pfdev); ++ panfrost_devfreq_update_utilization(pfdevfreq); + + status->current_frequency = clk_get_rate(pfdev->clock); +- status->total_time = ktime_to_ns(ktime_add(pfdev->devfreq.busy_time, +- pfdev->devfreq.idle_time)); ++ status->total_time = ktime_to_ns(ktime_add(pfdevfreq->busy_time, ++ pfdevfreq->idle_time)); + +- status->busy_time = ktime_to_ns(pfdev->devfreq.busy_time); ++ status->busy_time = ktime_to_ns(pfdevfreq->busy_time); + +- panfrost_devfreq_reset(pfdev); ++ panfrost_devfreq_reset(pfdevfreq); + +- dev_dbg(pfdev->dev, "busy %lu total %lu %lu %% freq %lu MHz\n", status->busy_time, +- status->total_time, ++ dev_dbg(pfdev->dev, "busy %lu total %lu %lu %% freq %lu MHz\n", ++ status->busy_time, status->total_time, + status->busy_time / (status->total_time / 100), + status->current_frequency / 1000 / 1000); + +@@ -91,6 +92,7 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + struct device *dev = &pfdev->pdev->dev; + struct devfreq *devfreq; + struct thermal_cooling_device *cooling; ++ struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; + + ret = dev_pm_opp_of_add_table(dev); + if (ret == -ENODEV) /* Optional, continue without devfreq */ +@@ -98,7 +100,7 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + else if (ret) + return ret; + +- panfrost_devfreq_reset(pfdev); ++ panfrost_devfreq_reset(pfdevfreq); + + cur_freq = clk_get_rate(pfdev->clock); + +@@ -116,53 +118,59 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + dev_pm_opp_of_remove_table(dev); + return PTR_ERR(devfreq); + } +- pfdev->devfreq.devfreq = devfreq; ++ pfdevfreq->devfreq = devfreq; + + cooling = of_devfreq_cooling_register(dev->of_node, devfreq); + if (IS_ERR(cooling)) + DRM_DEV_INFO(dev, "Failed to register cooling device\n"); + else +- pfdev->devfreq.cooling = cooling; ++ pfdevfreq->cooling = cooling; + + return 0; + } + + void panfrost_devfreq_fini(struct panfrost_device *pfdev) + { +- if (pfdev->devfreq.cooling) +- devfreq_cooling_unregister(pfdev->devfreq.cooling); ++ struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; ++ ++ if (pfdevfreq->cooling) ++ devfreq_cooling_unregister(pfdevfreq->cooling); + dev_pm_opp_of_remove_table(&pfdev->pdev->dev); + } + + void panfrost_devfreq_resume(struct panfrost_device *pfdev) + { +- if (!pfdev->devfreq.devfreq) ++ struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; ++ ++ if (!pfdevfreq->devfreq) + return; + +- panfrost_devfreq_reset(pfdev); ++ panfrost_devfreq_reset(pfdevfreq); + +- devfreq_resume_device(pfdev->devfreq.devfreq); ++ devfreq_resume_device(pfdevfreq->devfreq); + } + + void panfrost_devfreq_suspend(struct panfrost_device *pfdev) + { +- if (!pfdev->devfreq.devfreq) ++ struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; ++ ++ if (!pfdevfreq->devfreq) + return; + +- devfreq_suspend_device(pfdev->devfreq.devfreq); ++ devfreq_suspend_device(pfdevfreq->devfreq); + } + +-void panfrost_devfreq_record_busy(struct panfrost_device *pfdev) ++void panfrost_devfreq_record_busy(struct panfrost_devfreq *pfdevfreq) + { +- panfrost_devfreq_update_utilization(pfdev); +- atomic_inc(&pfdev->devfreq.busy_count); ++ panfrost_devfreq_update_utilization(pfdevfreq); ++ atomic_inc(&pfdevfreq->busy_count); + } + +-void panfrost_devfreq_record_idle(struct panfrost_device *pfdev) ++void panfrost_devfreq_record_idle(struct panfrost_devfreq *pfdevfreq) + { + int count; + +- panfrost_devfreq_update_utilization(pfdev); +- count = atomic_dec_if_positive(&pfdev->devfreq.busy_count); ++ panfrost_devfreq_update_utilization(pfdevfreq); ++ count = atomic_dec_if_positive(&pfdevfreq->busy_count); + WARN_ON(count < 0); + } +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.h b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +index 0611beffc8d0..0697f8d5aa34 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.h ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +@@ -4,13 +4,29 @@ + #ifndef __PANFROST_DEVFREQ_H__ + #define __PANFROST_DEVFREQ_H__ + ++#include ++ ++struct devfreq; ++struct thermal_cooling_device; ++ ++struct panfrost_device; ++ ++struct panfrost_devfreq { ++ struct devfreq *devfreq; ++ struct thermal_cooling_device *cooling; ++ ktime_t busy_time; ++ ktime_t idle_time; ++ ktime_t time_last_update; ++ atomic_t busy_count; ++}; ++ + int panfrost_devfreq_init(struct panfrost_device *pfdev); + void panfrost_devfreq_fini(struct panfrost_device *pfdev); + + void panfrost_devfreq_resume(struct panfrost_device *pfdev); + void panfrost_devfreq_suspend(struct panfrost_device *pfdev); + +-void panfrost_devfreq_record_busy(struct panfrost_device *pfdev); +-void panfrost_devfreq_record_idle(struct panfrost_device *pfdev); ++void panfrost_devfreq_record_busy(struct panfrost_devfreq *devfreq); ++void panfrost_devfreq_record_idle(struct panfrost_devfreq *devfreq); + + #endif /* __PANFROST_DEVFREQ_H__ */ +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h +index c30c719a8059..2efa59c9d1c5 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.h ++++ b/drivers/gpu/drm/panfrost/panfrost_device.h +@@ -13,6 +13,8 @@ + #include + #include + ++#include "panfrost_devfreq.h" ++ + struct panfrost_device; + struct panfrost_mmu; + struct panfrost_job_slot; +@@ -107,14 +109,7 @@ struct panfrost_device { + struct list_head shrinker_list; + struct shrinker shrinker; + +- struct { +- struct devfreq *devfreq; +- struct thermal_cooling_device *cooling; +- ktime_t busy_time; +- ktime_t idle_time; +- ktime_t time_last_update; +- atomic_t busy_count; +- } devfreq; ++ struct panfrost_devfreq pfdevfreq; + }; + + struct panfrost_mmu { +diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c +index aec05be1ba7a..2f297d962e64 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_job.c ++++ b/drivers/gpu/drm/panfrost/panfrost_job.c +@@ -145,7 +145,7 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js) + u64 jc_head = job->jc; + int ret; + +- panfrost_devfreq_record_busy(pfdev); ++ panfrost_devfreq_record_busy(&pfdev->pfdevfreq); + + ret = pm_runtime_get_sync(pfdev->dev); + if (ret < 0) +@@ -410,7 +410,7 @@ static void panfrost_job_timedout(struct drm_sched_job *sched_job) + for (i = 0; i < NUM_JOB_SLOTS; i++) { + if (pfdev->jobs[i]) { + pm_runtime_put_noidle(pfdev->dev); +- panfrost_devfreq_record_idle(pfdev); ++ panfrost_devfreq_record_idle(&pfdev->pfdevfreq); + pfdev->jobs[i] = NULL; + } + } +@@ -478,7 +478,7 @@ static irqreturn_t panfrost_job_irq_handler(int irq, void *data) + pfdev->jobs[j] = NULL; + + panfrost_mmu_as_put(pfdev, &job->file_priv->mmu); +- panfrost_devfreq_record_idle(pfdev); ++ panfrost_devfreq_record_idle(&pfdev->pfdevfreq); + + dma_fence_signal_locked(job->done_fence); + pm_runtime_put_autosuspend(pfdev->dev); + +From 6aa844533781eaf47bd219fafe46fd6647c101e3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:54:00 +0200 +Subject: [PATCH] drm/panfrost: use spinlock instead of atomic +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Convert busy_count to a simple int protected by spinlock. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-6-peron.clem@gmail.com +(cherry picked from commit ed85df3f60740bb4be23fbc2db283d59b361a834) +--- + drivers/gpu/drm/panfrost/panfrost_devfreq.c | 43 +++++++++++++++++++++-------- + drivers/gpu/drm/panfrost/panfrost_devfreq.h | 9 +++++- + 2 files changed, 40 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +index 962550363391..78753cfb59fb 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +@@ -12,16 +12,12 @@ + + static void panfrost_devfreq_update_utilization(struct panfrost_devfreq *pfdevfreq) + { +- ktime_t now; +- ktime_t last; +- +- if (!pfdevfreq->devfreq) +- return; ++ ktime_t now, last; + + now = ktime_get(); + last = pfdevfreq->time_last_update; + +- if (atomic_read(&pfdevfreq->busy_count) > 0) ++ if (pfdevfreq->busy_count > 0) + pfdevfreq->busy_time += ktime_sub(now, last); + else + pfdevfreq->idle_time += ktime_sub(now, last); +@@ -59,10 +55,14 @@ static int panfrost_devfreq_get_dev_status(struct device *dev, + { + struct panfrost_device *pfdev = dev_get_drvdata(dev); + struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; ++ unsigned long irqflags; ++ ++ status->current_frequency = clk_get_rate(pfdev->clock); ++ ++ spin_lock_irqsave(&pfdevfreq->lock, irqflags); + + panfrost_devfreq_update_utilization(pfdevfreq); + +- status->current_frequency = clk_get_rate(pfdev->clock); + status->total_time = ktime_to_ns(ktime_add(pfdevfreq->busy_time, + pfdevfreq->idle_time)); + +@@ -70,6 +70,8 @@ static int panfrost_devfreq_get_dev_status(struct device *dev, + + panfrost_devfreq_reset(pfdevfreq); + ++ spin_unlock_irqrestore(&pfdevfreq->lock, irqflags); ++ + dev_dbg(pfdev->dev, "busy %lu total %lu %lu %% freq %lu MHz\n", + status->busy_time, status->total_time, + status->busy_time / (status->total_time / 100), +@@ -100,6 +102,8 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + else if (ret) + return ret; + ++ spin_lock_init(&pfdevfreq->lock); ++ + panfrost_devfreq_reset(pfdevfreq); + + cur_freq = clk_get_rate(pfdev->clock); +@@ -162,15 +166,32 @@ void panfrost_devfreq_suspend(struct panfrost_device *pfdev) + + void panfrost_devfreq_record_busy(struct panfrost_devfreq *pfdevfreq) + { ++ unsigned long irqflags; ++ ++ if (!pfdevfreq->devfreq) ++ return; ++ ++ spin_lock_irqsave(&pfdevfreq->lock, irqflags); ++ + panfrost_devfreq_update_utilization(pfdevfreq); +- atomic_inc(&pfdevfreq->busy_count); ++ ++ pfdevfreq->busy_count++; ++ ++ spin_unlock_irqrestore(&pfdevfreq->lock, irqflags); + } + + void panfrost_devfreq_record_idle(struct panfrost_devfreq *pfdevfreq) + { +- int count; ++ unsigned long irqflags; ++ ++ if (!pfdevfreq->devfreq) ++ return; ++ ++ spin_lock_irqsave(&pfdevfreq->lock, irqflags); + + panfrost_devfreq_update_utilization(pfdevfreq); +- count = atomic_dec_if_positive(&pfdevfreq->busy_count); +- WARN_ON(count < 0); ++ ++ WARN_ON(--pfdevfreq->busy_count < 0); ++ ++ spin_unlock_irqrestore(&pfdevfreq->lock, irqflags); + } +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.h b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +index 0697f8d5aa34..3392df1020be 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.h ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +@@ -4,6 +4,7 @@ + #ifndef __PANFROST_DEVFREQ_H__ + #define __PANFROST_DEVFREQ_H__ + ++#include + #include + + struct devfreq; +@@ -14,10 +15,16 @@ struct panfrost_device; + struct panfrost_devfreq { + struct devfreq *devfreq; + struct thermal_cooling_device *cooling; ++ + ktime_t busy_time; + ktime_t idle_time; + ktime_t time_last_update; +- atomic_t busy_count; ++ int busy_count; ++ /* ++ * Protect busy_time, idle_time, time_last_update and busy_count ++ * because these can be updated concurrently between multiple jobs. ++ */ ++ spinlock_t lock; + }; + + int panfrost_devfreq_init(struct panfrost_device *pfdev); + +From ae30cb755ce33edff314df7ac0cc473a534da88d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:54:01 +0200 +Subject: [PATCH] drm/panfrost: properly handle error in probe +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Introduce a boolean to know if opp table has been added. + +With this, we can call panfrost_devfreq_fini() in case of error +and release what has been initialised. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-7-peron.clem@gmail.com +(cherry picked from commit 81f2fbe62cb54b6cf3d91078c4d49451ba7b9877) +--- + drivers/gpu/drm/panfrost/panfrost_devfreq.c | 25 +++++++++++++++++++------ + drivers/gpu/drm/panfrost/panfrost_devfreq.h | 1 + + 2 files changed, 20 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +index 78753cfb59fb..d9007f44b772 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +@@ -101,6 +101,7 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + return 0; + else if (ret) + return ret; ++ pfdevfreq->opp_of_table_added = true; + + spin_lock_init(&pfdevfreq->lock); + +@@ -109,8 +110,10 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + cur_freq = clk_get_rate(pfdev->clock); + + opp = devfreq_recommended_opp(dev, &cur_freq, 0); +- if (IS_ERR(opp)) +- return PTR_ERR(opp); ++ if (IS_ERR(opp)) { ++ ret = PTR_ERR(opp); ++ goto err_fini; ++ } + + panfrost_devfreq_profile.initial_freq = cur_freq; + dev_pm_opp_put(opp); +@@ -119,8 +122,8 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + DEVFREQ_GOV_SIMPLE_ONDEMAND, NULL); + if (IS_ERR(devfreq)) { + DRM_DEV_ERROR(dev, "Couldn't initialize GPU devfreq\n"); +- dev_pm_opp_of_remove_table(dev); +- return PTR_ERR(devfreq); ++ ret = PTR_ERR(devfreq); ++ goto err_fini; + } + pfdevfreq->devfreq = devfreq; + +@@ -131,15 +134,25 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + pfdevfreq->cooling = cooling; + + return 0; ++ ++err_fini: ++ panfrost_devfreq_fini(pfdev); ++ return ret; + } + + void panfrost_devfreq_fini(struct panfrost_device *pfdev) + { + struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; + +- if (pfdevfreq->cooling) ++ if (pfdevfreq->cooling) { + devfreq_cooling_unregister(pfdevfreq->cooling); +- dev_pm_opp_of_remove_table(&pfdev->pdev->dev); ++ pfdevfreq->cooling = NULL; ++ } ++ ++ if (pfdevfreq->opp_of_table_added) { ++ dev_pm_opp_of_remove_table(&pfdev->pdev->dev); ++ pfdevfreq->opp_of_table_added = false; ++ } + } + + void panfrost_devfreq_resume(struct panfrost_device *pfdev) +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.h b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +index 3392df1020be..210269944687 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.h ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +@@ -15,6 +15,7 @@ struct panfrost_device; + struct panfrost_devfreq { + struct devfreq *devfreq; + struct thermal_cooling_device *cooling; ++ bool opp_of_table_added; + + ktime_t busy_time; + ktime_t idle_time; + +From 092280fbb01f23da5278e0a6c7cdae288fe3d277 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:54:02 +0200 +Subject: [PATCH] drm/panfrost: rename error labels in device_init +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Rename goto labels in device_init it will be easier to maintain. + +Reviewed-by: Alyssa Rosenzweig +Reviewed-by: Steven Price +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-8-peron.clem@gmail.com +(cherry picked from commit d3c335da0200be9287cdf5755d19f62ce1670a8d) +--- + drivers/gpu/drm/panfrost/panfrost_device.c | 30 +++++++++++++++--------------- + 1 file changed, 15 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c +index b172087eee6a..9f89984f652a 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.c ++++ b/drivers/gpu/drm/panfrost/panfrost_device.c +@@ -216,56 +216,56 @@ int panfrost_device_init(struct panfrost_device *pfdev) + + err = panfrost_regulator_init(pfdev); + if (err) +- goto err_out0; ++ goto out_clk; + + err = panfrost_reset_init(pfdev); + if (err) { + dev_err(pfdev->dev, "reset init failed %d\n", err); +- goto err_out1; ++ goto out_regulator; + } + + err = panfrost_pm_domain_init(pfdev); + if (err) +- goto err_out2; ++ goto out_reset; + + res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0); + pfdev->iomem = devm_ioremap_resource(pfdev->dev, res); + if (IS_ERR(pfdev->iomem)) { + dev_err(pfdev->dev, "failed to ioremap iomem\n"); + err = PTR_ERR(pfdev->iomem); +- goto err_out3; ++ goto out_pm_domain; + } + + err = panfrost_gpu_init(pfdev); + if (err) +- goto err_out3; ++ goto out_pm_domain; + + err = panfrost_mmu_init(pfdev); + if (err) +- goto err_out4; ++ goto out_gpu; + + err = panfrost_job_init(pfdev); + if (err) +- goto err_out5; ++ goto out_mmu; + + err = panfrost_perfcnt_init(pfdev); + if (err) +- goto err_out6; ++ goto out_job; + + return 0; +-err_out6: ++out_job: + panfrost_job_fini(pfdev); +-err_out5: ++out_mmu: + panfrost_mmu_fini(pfdev); +-err_out4: ++out_gpu: + panfrost_gpu_fini(pfdev); +-err_out3: ++out_pm_domain: + panfrost_pm_domain_fini(pfdev); +-err_out2: ++out_reset: + panfrost_reset_fini(pfdev); +-err_out1: ++out_regulator: + panfrost_regulator_fini(pfdev); +-err_out0: ++out_clk: + panfrost_clk_fini(pfdev); + return err; + } + +From ffe4f26e002f995ab9786293857a978ebd800921 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:54:03 +0200 +Subject: [PATCH] drm/panfrost: move devfreq_init()/fini() in device +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Later we will introduce devfreq probing regulator if they +are present. As regulator should be probe only one time we +need to get this logic in the device_init(). + +panfrost_device is already taking care of devfreq_resume() +and devfreq_suspend(), so it's not totally illogic to move +the devfreq_init() and devfreq_fini() here. + +Reviewed-by: Alyssa Rosenzweig +Reviewed-by: Steven Price +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-9-peron.clem@gmail.com +(cherry picked from commit 25e247bbf85af3ad721dfeb2e2caf405f43b7e66) +--- + drivers/gpu/drm/panfrost/panfrost_device.c | 12 +++++++++++- + drivers/gpu/drm/panfrost/panfrost_drv.c | 15 ++------------- + 2 files changed, 13 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c +index 9f89984f652a..36b5c8fea3eb 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.c ++++ b/drivers/gpu/drm/panfrost/panfrost_device.c +@@ -214,9 +214,16 @@ int panfrost_device_init(struct panfrost_device *pfdev) + return err; + } + ++ err = panfrost_devfreq_init(pfdev); ++ if (err) { ++ if (err != -EPROBE_DEFER) ++ dev_err(pfdev->dev, "devfreq init failed %d\n", err); ++ goto out_clk; ++ } ++ + err = panfrost_regulator_init(pfdev); + if (err) +- goto out_clk; ++ goto out_devfreq; + + err = panfrost_reset_init(pfdev); + if (err) { +@@ -265,6 +272,8 @@ int panfrost_device_init(struct panfrost_device *pfdev) + panfrost_reset_fini(pfdev); + out_regulator: + panfrost_regulator_fini(pfdev); ++out_devfreq: ++ panfrost_devfreq_fini(pfdev); + out_clk: + panfrost_clk_fini(pfdev); + return err; +@@ -278,6 +287,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev) + panfrost_gpu_fini(pfdev); + panfrost_pm_domain_fini(pfdev); + panfrost_reset_fini(pfdev); ++ panfrost_devfreq_fini(pfdev); + panfrost_regulator_fini(pfdev); + panfrost_clk_fini(pfdev); + } +diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c +index 8ff8e140f91e..ed8bcdd6b211 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_drv.c ++++ b/drivers/gpu/drm/panfrost/panfrost_drv.c +@@ -14,7 +14,6 @@ + #include + + #include "panfrost_device.h" +-#include "panfrost_devfreq.h" + #include "panfrost_gem.h" + #include "panfrost_mmu.h" + #include "panfrost_job.h" +@@ -606,13 +605,6 @@ static int panfrost_probe(struct platform_device *pdev) + goto err_out0; + } + +- err = panfrost_devfreq_init(pfdev); +- if (err) { +- if (err != -EPROBE_DEFER) +- dev_err(&pdev->dev, "Fatal error during devfreq init\n"); +- goto err_out1; +- } +- + pm_runtime_set_active(pfdev->dev); + pm_runtime_mark_last_busy(pfdev->dev); + pm_runtime_enable(pfdev->dev); +@@ -625,16 +617,14 @@ static int panfrost_probe(struct platform_device *pdev) + */ + err = drm_dev_register(ddev, 0); + if (err < 0) +- goto err_out2; ++ goto err_out1; + + panfrost_gem_shrinker_init(ddev); + + return 0; + +-err_out2: +- pm_runtime_disable(pfdev->dev); +- panfrost_devfreq_fini(pfdev); + err_out1: ++ pm_runtime_disable(pfdev->dev); + panfrost_device_fini(pfdev); + err_out0: + drm_dev_put(ddev); +@@ -650,7 +640,6 @@ static int panfrost_remove(struct platform_device *pdev) + panfrost_gem_shrinker_cleanup(ddev); + + pm_runtime_get_sync(pfdev->dev); +- panfrost_devfreq_fini(pfdev); + panfrost_device_fini(pfdev); + pm_runtime_put_sync_suspend(pfdev->dev); + pm_runtime_disable(pfdev->dev); + +From 7e7b8d6365eb64a4ff6211971523b4ac00d38e97 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:54:04 +0200 +Subject: [PATCH] drm/panfrost: dynamically alloc regulators +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We will later introduce regulators managed by OPP. + +Only alloc regulators when it's needed. This also help use +to release the regulators only when they are allocated. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-10-peron.clem@gmail.com +(cherry picked from commit 512f21227fd3d2dbe7aad57a995b9732229c9b56) +--- + drivers/gpu/drm/panfrost/panfrost_device.c | 14 +++++++++----- + drivers/gpu/drm/panfrost/panfrost_device.h | 3 +-- + 2 files changed, 10 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c +index 36b5c8fea3eb..f1474b961def 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.c ++++ b/drivers/gpu/drm/panfrost/panfrost_device.c +@@ -90,9 +90,11 @@ static int panfrost_regulator_init(struct panfrost_device *pfdev) + { + int ret, i; + +- if (WARN(pfdev->comp->num_supplies > ARRAY_SIZE(pfdev->regulators), +- "Too many supplies in compatible structure.\n")) +- return -EINVAL; ++ pfdev->regulators = devm_kcalloc(pfdev->dev, pfdev->comp->num_supplies, ++ sizeof(*pfdev->regulators), ++ GFP_KERNEL); ++ if (!pfdev->regulators) ++ return -ENOMEM; + + for (i = 0; i < pfdev->comp->num_supplies; i++) + pfdev->regulators[i].supply = pfdev->comp->supply_names[i]; +@@ -119,8 +121,10 @@ static int panfrost_regulator_init(struct panfrost_device *pfdev) + + static void panfrost_regulator_fini(struct panfrost_device *pfdev) + { +- regulator_bulk_disable(pfdev->comp->num_supplies, +- pfdev->regulators); ++ if (!pfdev->regulators) ++ return; ++ ++ regulator_bulk_disable(pfdev->comp->num_supplies, pfdev->regulators); + } + + static void panfrost_pm_domain_fini(struct panfrost_device *pfdev) +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h +index 2efa59c9d1c5..953f7536a773 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.h ++++ b/drivers/gpu/drm/panfrost/panfrost_device.h +@@ -22,7 +22,6 @@ struct panfrost_job; + struct panfrost_perfcnt; + + #define NUM_JOB_SLOTS 3 +-#define MAX_REGULATORS 2 + #define MAX_PM_DOMAINS 3 + + struct panfrost_features { +@@ -81,7 +80,7 @@ struct panfrost_device { + void __iomem *iomem; + struct clk *clock; + struct clk *bus_clock; +- struct regulator_bulk_data regulators[MAX_REGULATORS]; ++ struct regulator_bulk_data *regulators; + struct reset_control *rstc; + /* pm_domains for devices with more than one. */ + struct device *pm_domain_devs[MAX_PM_DOMAINS]; + +From 6d63fc6e324b127bbeffaa515043012f30369338 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= +Date: Fri, 10 Jul 2020 11:54:05 +0200 +Subject: [PATCH] drm/panfrost: add regulators to devfreq +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some OPP tables specify voltage for each frequency. Devfreq can +handle these regulators but they should be get only 1 time to avoid +issue and know who is in charge. + +If OPP table is probe don't init regulator. + +Reviewed-by: Steven Price +Reviewed-by: Alyssa Rosenzweig +Signed-off-by: Clément Péron +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200710095409.407087-11-peron.clem@gmail.com +(cherry picked from commit fd587ff01d59554144e2fd20f4113638a45c7c4e) +--- + drivers/gpu/drm/panfrost/panfrost_devfreq.c | 29 +++++++++++++++++++++++++---- + drivers/gpu/drm/panfrost/panfrost_devfreq.h | 2 ++ + drivers/gpu/drm/panfrost/panfrost_device.c | 9 ++++++--- + 3 files changed, 33 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +index d9007f44b772..8ab025d0035f 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c +@@ -93,14 +93,30 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) + unsigned long cur_freq; + struct device *dev = &pfdev->pdev->dev; + struct devfreq *devfreq; ++ struct opp_table *opp_table; + struct thermal_cooling_device *cooling; + struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; + ++ opp_table = dev_pm_opp_set_regulators(dev, pfdev->comp->supply_names, ++ pfdev->comp->num_supplies); ++ if (IS_ERR(opp_table)) { ++ ret = PTR_ERR(opp_table); ++ /* Continue if the optional regulator is missing */ ++ if (ret != -ENODEV) { ++ DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n"); ++ goto err_fini; ++ } ++ } else { ++ pfdevfreq->regulators_opp_table = opp_table; ++ } ++ + ret = dev_pm_opp_of_add_table(dev); +- if (ret == -ENODEV) /* Optional, continue without devfreq */ +- return 0; +- else if (ret) +- return ret; ++ if (ret) { ++ /* Optional, continue without devfreq */ ++ if (ret == -ENODEV) ++ ret = 0; ++ goto err_fini; ++ } + pfdevfreq->opp_of_table_added = true; + + spin_lock_init(&pfdevfreq->lock); +@@ -153,6 +169,11 @@ void panfrost_devfreq_fini(struct panfrost_device *pfdev) + dev_pm_opp_of_remove_table(&pfdev->pdev->dev); + pfdevfreq->opp_of_table_added = false; + } ++ ++ if (pfdevfreq->regulators_opp_table) { ++ dev_pm_opp_put_regulators(pfdevfreq->regulators_opp_table); ++ pfdevfreq->regulators_opp_table = NULL; ++ } + } + + void panfrost_devfreq_resume(struct panfrost_device *pfdev) +diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.h b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +index 210269944687..db6ea48e21f9 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.h ++++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.h +@@ -8,12 +8,14 @@ + #include + + struct devfreq; ++struct opp_table; + struct thermal_cooling_device; + + struct panfrost_device; + + struct panfrost_devfreq { + struct devfreq *devfreq; ++ struct opp_table *regulators_opp_table; + struct thermal_cooling_device *cooling; + bool opp_of_table_added; + +diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c +index f1474b961def..e6896733838a 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_device.c ++++ b/drivers/gpu/drm/panfrost/panfrost_device.c +@@ -225,9 +225,12 @@ int panfrost_device_init(struct panfrost_device *pfdev) + goto out_clk; + } + +- err = panfrost_regulator_init(pfdev); +- if (err) +- goto out_devfreq; ++ /* OPP will handle regulators */ ++ if (!pfdev->pfdevfreq.opp_of_table_added) { ++ err = panfrost_regulator_init(pfdev); ++ if (err) ++ goto out_devfreq; ++ } + + err = panfrost_reset_init(pfdev); + if (err) { + +From 9b6506ec66b7aac5f2e733028bec27da581977ed Mon Sep 17 00:00:00 2001 +From: Navid Emamdoost +Date: Sun, 14 Jun 2020 01:36:19 -0500 +Subject: [PATCH] drm/panfrost: perfcnt: fix ref count leak in + panfrost_perfcnt_enable_locked + +in panfrost_perfcnt_enable_locked, pm_runtime_get_sync is called which +increments the counter even in case of failure, leading to incorrect +ref count. In case of failure, decrement the ref count before returning. + +Acked-by: Alyssa Rosenzweig +Signed-off-by: Navid Emamdoost +Signed-off-by: Rob Herring +Link: https://patchwork.freedesktop.org/patch/msgid/20200614063619.44944-1-navid.emamdoost@gmail.com +(cherry picked from commit 9df0e0c1889677175037445d5ad1654d54176369) +--- + drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c +index 6913578d5aa7..6169644d4469 100644 +--- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c ++++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c +@@ -83,11 +83,13 @@ static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev, + + ret = pm_runtime_get_sync(pfdev->dev); + if (ret < 0) +- return ret; ++ goto err_put_pm; + + bo = drm_gem_shmem_create(pfdev->ddev, perfcnt->bosize); +- if (IS_ERR(bo)) +- return PTR_ERR(bo); ++ if (IS_ERR(bo)) { ++ ret = PTR_ERR(bo); ++ goto err_put_pm; ++ } + + /* Map the perfcnt buf in the address space attached to file_priv. */ + ret = panfrost_gem_open(&bo->base, file_priv); +@@ -168,6 +170,8 @@ static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev, + panfrost_gem_close(&bo->base, file_priv); + err_put_bo: + drm_gem_object_put_unlocked(&bo->base); ++err_put_pm: ++ pm_runtime_put(pfdev->dev); + return ret; + } +