diff --git a/projects/Rockchip/patches/u-boot/0006-rockchip-roc-3328-cc-use-1600-ddr4-timing.patch b/projects/Rockchip/patches/u-boot/0006-rockchip-roc-3328-cc-use-1600-ddr4-timing.patch new file mode 100644 index 0000000000..6699ad2a0b --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0006-rockchip-roc-3328-cc-use-1600-ddr4-timing.patch @@ -0,0 +1,26 @@ +From 2e54840fd3de7a791669bf20fc7b576b806167b8 Mon Sep 17 00:00:00 2001 +From: Da Xue +Date: Sun, 19 May 2024 18:48:57 -0400 +Subject: [PATCH] arm64: dts: rockchip: roc-3328-cc: use 1600 ddr4 timing + +Swap the ROC-3328-CC from DDR4 666 to 1600 timing to boost performance. + +Signed-off-by: Da Xue +Signed-off-by: Christian Hewitt +--- + arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +index 582d6ba49b4e..c47d29c59de9 100644 +--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi ++++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +@@ -4,7 +4,7 @@ + */ + + #include "rk3328-u-boot.dtsi" +-#include "rk3328-sdram-ddr4-666.dtsi" ++#include "rk3328-sdram-ddr4-1600.dtsi" + + / { + smbios { diff --git a/projects/Rockchip/patches/u-boot/0007-rockchip-rk3328-add-ddr4-1600-sdram-timing.patch b/projects/Rockchip/patches/u-boot/0007-rockchip-rk3328-add-ddr4-1600-sdram-timing.patch new file mode 100644 index 0000000000..4235f87ebe --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0007-rockchip-rk3328-add-ddr4-1600-sdram-timing.patch @@ -0,0 +1,247 @@ +From 825863d08ce323ebcefc03af20fb1e37cdac0eaa Mon Sep 17 00:00:00 2001 +From: Da Xue +Date: Mon, 19 Sep 2022 13:40:01 -0400 +Subject: [PATCH] ram: rk3328: add ddr4-1600 sdram timing + +Add DDR4 1600MHz SDRAM timing data from LibreComputer u-boot sources +for the ROC-3328-CC board. + +Signed-off-by: Da Xue +Signed-off-by: Christian Hewitt +--- + arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi | 226 +++++++++++++++++++++++ + 1 file changed, 226 insertions(+) + create mode 100644 arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi + +diff --git a/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi +new file mode 100644 +index 000000000000..9594bb428399 +--- /dev/null ++++ b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi +@@ -0,0 +1,226 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. ++ ++&dmc { ++ rockchip,sdram-params = < ++ 0x1 ++ 0xA ++ 0x2 ++ 0x1 ++ 0x0 ++ 0x0 ++ 0x11 ++ 0x0 ++ 0x11 ++ 0x0 ++ 0 ++ ++ 0x94496354 ++ 0x00000000 ++ 0x0000002a ++ 0x000004e2 ++ 0x00000015 ++ 0x0000034a ++ 0x000000ff ++ ++ 800 ++ 0 ++ 1 ++ 0 ++ 0 ++ ++ 0x00000000 ++ 0x43041010 ++ 0x00000064 ++ 0x0061008c ++ 0x000000d0 ++ 0x000200c5 ++ 0x000000d4 ++ 0x00500000 ++ 0x000000d8 ++ 0x00000100 ++ 0x000000dc ++ 0x03140401 ++ 0x000000e0 ++ 0x00000000 ++ 0x000000e4 ++ 0x00110000 ++ 0x000000e8 ++ 0x00000420 ++ 0x000000ec ++ 0x00000400 ++ 0x000000f4 ++ 0x000f011f ++ 0x00000100 ++ 0x0c0e1b0e ++ 0x00000104 ++ 0x00030314 ++ 0x00000108 ++ 0x0506050b ++ 0x0000010c ++ 0x0040400c ++ 0x00000110 ++ 0x06030307 ++ 0x00000114 ++ 0x04040302 ++ 0x00000120 ++ 0x06060b06 ++ 0x00000124 ++ 0x00020308 ++ 0x00000180 ++ 0x01000040 ++ 0x00000184 ++ 0x00000000 ++ 0x00000190 ++ 0x07040003 ++ 0x00000198 ++ 0x05001100 ++ 0x000001a0 ++ 0xc0400003 ++ 0x00000240 ++ 0x0600060c ++ 0x00000244 ++ 0x00000201 ++ 0x00000250 ++ 0x00000f00 ++ 0x00000490 ++ 0x00000001 ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ 0xffffffff ++ ++ 0x00000004 ++ 0x0000000c ++ 0x00000028 ++ 0x0000000c ++ 0x0000002c ++ 0x00000000 ++ 0x00000030 ++ 0x00000009 ++ 0xffffffff ++ 0xffffffff ++ ++ 0x77 ++ 0x88 ++ 0x79 ++ 0x79 ++ 0x87 ++ 0x97 ++ 0x87 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x87 ++ 0x88 ++ 0x87 ++ 0x87 ++ 0x77 ++ ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x69 ++ 0x9 ++ ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x79 ++ 0x9 ++ ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x69 ++ 0x9 ++ ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x79 ++ 0x9 ++ ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x69 ++ 0x9 ++ ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x79 ++ 0x9 ++ ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x78 ++ 0x69 ++ 0x9 ++ ++ 0x77 ++ 0x78 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x77 ++ 0x79 ++ 0x9 ++ >; ++};