From 641c345a7feb554c09a8c292f907d635ed42edd0 Mon Sep 17 00:00:00 2001 From: Rudi Heitbaum Date: Thu, 15 Aug 2024 11:05:38 +0000 Subject: [PATCH] linux (Allwinner): drop upstreamed patches included in 6.6.46 --- ...Reparent-CPUX-during-PLL-CPUX-rate-c.patch | 66 ------------------- 1 file changed, 66 deletions(-) delete mode 100644 projects/Allwinner/patches/linux/0069-clk-sunxi-ng-h6-Reparent-CPUX-during-PLL-CPUX-rate-c.patch diff --git a/projects/Allwinner/patches/linux/0069-clk-sunxi-ng-h6-Reparent-CPUX-during-PLL-CPUX-rate-c.patch b/projects/Allwinner/patches/linux/0069-clk-sunxi-ng-h6-Reparent-CPUX-during-PLL-CPUX-rate-c.patch deleted file mode 100644 index a9b2056c88..0000000000 --- a/projects/Allwinner/patches/linux/0069-clk-sunxi-ng-h6-Reparent-CPUX-during-PLL-CPUX-rate-c.patch +++ /dev/null @@ -1,66 +0,0 @@ -From edfe1a6c99aff85e97dc1600355a66bbcb417531 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 12 Oct 2023 20:25:42 +0200 -Subject: [PATCH 22/25] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate - change - -While PLL CPUX clock rate change when CPU is running from it works in -vast majority of cases, now and then it causes instability. This leads -to system crashes and other undefined behaviour. After a lot of testing -(30+ hours) while also doing a lot of frequency switches, we can't -observe any instability issues anymore when doing reparenting to stable -clock like 24 MHz oscillator. - -Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU") -Link: https://forum.libreelec.tv/thread/27295-orange-pi-3-lts-freezes/ -Reported-by: Chad Wagner -Tested-by: Chad Wagner -Signed-off-by: Jernej Skrabec ---- - drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 19 +++++++++++++++++-- - 1 file changed, 17 insertions(+), 2 deletions(-) - -diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c -index 42568c616181..892df807275c 100644 ---- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c -+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c -@@ -1181,11 +1181,18 @@ static const u32 usb2_clk_regs[] = { - SUN50I_H6_USB3_CLK_REG, - }; - -+static struct ccu_mux_nb sun50i_h6_cpu_nb = { -+ .common = &cpux_clk.common, -+ .cm = &cpux_clk.mux, -+ .delay_us = 1, -+ .bypass_index = 0, /* index of 24 MHz oscillator */ -+}; -+ - static int sun50i_h6_ccu_probe(struct platform_device *pdev) - { - void __iomem *reg; -+ int i, ret; - u32 val; -- int i; - - reg = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(reg)) -@@ -1252,7 +1259,15 @@ static int sun50i_h6_ccu_probe(struct platform_device *pdev) - val |= BIT(24); - writel(val, reg + SUN50I_H6_HDMI_CEC_CLK_REG); - -- return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc); -+ ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc); -+ if (ret) -+ return ret; -+ -+ /* Reparent CPU during PLL CPUX rate changes */ -+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk, -+ &sun50i_h6_cpu_nb); -+ -+ return 0; - } - - static const struct of_device_id sun50i_h6_ccu_ids[] = { --- -2.42.0 -