diff --git a/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch b/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch index 7f72e1aeb9..1976ec823b 100644 --- a/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch +++ b/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch @@ -1,7 +1,7 @@ From 904af26693095364851bbc6c6557fca9b3437b69 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 3 Dec 2018 23:48:04 +0100 -Subject: [PATCH 01/18] avutil: add av_buffer_pool_flush() +Subject: [PATCH 01/16] avutil: add av_buffer_pool_flush() Used by V4L2 request API hwaccel @@ -12,7 +12,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 18 insertions(+) diff --git a/libavutil/buffer.c b/libavutil/buffer.c -index 858633e8c7..41555d9982 100644 +index 858633e8c73b..41555d998257 100644 --- a/libavutil/buffer.c +++ b/libavutil/buffer.c @@ -305,6 +305,19 @@ static void buffer_pool_free(AVBufferPool *pool) @@ -36,7 +36,7 @@ index 858633e8c7..41555d9982 100644 { AVBufferPool *pool; diff --git a/libavutil/buffer.h b/libavutil/buffer.h -index 241a80ed67..f41363faf1 100644 +index 241a80ed6709..f41363faf1dc 100644 --- a/libavutil/buffer.h +++ b/libavutil/buffer.h @@ -315,6 +315,11 @@ AVBufferPool *av_buffer_pool_init2(size_t size, void *opaque, @@ -55,7 +55,7 @@ index 241a80ed67..f41363faf1 100644 From ec84dc22e99f544e4de7c43e7f8ef9ab7ee8e19b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 02/18] Add common V4L2 request API code +Subject: [PATCH 02/16] Add common V4L2 request API code Signed-off-by: Jonas Karlman --- @@ -69,7 +69,7 @@ Signed-off-by: Jonas Karlman create mode 100644 libavcodec/v4l2_request.h diff --git a/configure b/configure -index d7a3f507e8..f2e203d134 100755 +index d7a3f507e834..f2e203d13463 100755 --- a/configure +++ b/configure @@ -279,6 +279,7 @@ External library support: @@ -141,7 +141,7 @@ index d7a3f507e8..f2e203d134 100755 test_code cc sys/videoio.h "struct v4l2_frmsizeenum vfse; vfse.discrete.width = 0;" && enable_sanitized struct_v4l2_frmivalenum_discrete diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index 33a280cf69..90dfffcb20 100644 +index 33a280cf6953..90dfffcb2004 100644 --- a/libavcodec/Makefile +++ b/libavcodec/Makefile @@ -155,6 +155,7 @@ OBJS-$(CONFIG_VP3DSP) += vp3dsp.o @@ -153,7 +153,7 @@ index 33a280cf69..90dfffcb20 100644 OBJS-$(CONFIG_WMV2DSP) += wmv2dsp.o diff --git a/libavcodec/hwconfig.h b/libavcodec/hwconfig.h -index f421dc909f..ee78d8ab8e 100644 +index f421dc909f44..ee78d8ab8e89 100644 --- a/libavcodec/hwconfig.h +++ b/libavcodec/hwconfig.h @@ -80,6 +80,8 @@ typedef struct AVCodecHWConfigInternal { @@ -167,7 +167,7 @@ index f421dc909f..ee78d8ab8e 100644 &(const AVCodecHWConfigInternal) { \ diff --git a/libavcodec/v4l2_request.c b/libavcodec/v4l2_request.c new file mode 100644 -index 0000000000..5234b5049b +index 000000000000..5234b5049b0d --- /dev/null +++ b/libavcodec/v4l2_request.c @@ -0,0 +1,984 @@ @@ -1157,7 +1157,7 @@ index 0000000000..5234b5049b +} diff --git a/libavcodec/v4l2_request.h b/libavcodec/v4l2_request.h new file mode 100644 -index 0000000000..58d2aa70af +index 000000000000..58d2aa70af80 --- /dev/null +++ b/libavcodec/v4l2_request.h @@ -0,0 +1,77 @@ @@ -1242,7 +1242,7 @@ index 0000000000..58d2aa70af From e432d3151f4c5507e40fb1fe8b3c3fb7c7a0a08c Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 20 Feb 2019 11:18:00 -0300 -Subject: [PATCH 03/18] h264dec: add idr_pic_id to slice context +Subject: [PATCH 03/16] h264dec: add idr_pic_id to slice context Used by V4L2 request API h264 hwaccel @@ -1254,7 +1254,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/libavcodec/h264_slice.c b/libavcodec/h264_slice.c -index 2d0605c7f4..c3a7338a70 100644 +index 2d0605c7f4f6..c3a7338a7043 100644 --- a/libavcodec/h264_slice.c +++ b/libavcodec/h264_slice.c @@ -1830,7 +1830,7 @@ static int h264_slice_header_parse(const H264Context *h, H264SliceContext *sl, @@ -1267,7 +1267,7 @@ index 2d0605c7f4..c3a7338a70 100644 if (sps->poc_type == 0) { sl->poc_lsb = get_bits(&sl->gb, sps->log2_max_poc_lsb); diff --git a/libavcodec/h264dec.h b/libavcodec/h264dec.h -index b7b19ba4f1..0698ab95ba 100644 +index b7b19ba4f162..0698ab95ba51 100644 --- a/libavcodec/h264dec.h +++ b/libavcodec/h264dec.h @@ -336,6 +336,7 @@ typedef struct H264SliceContext { @@ -1282,7 +1282,7 @@ index b7b19ba4f1..0698ab95ba 100644 From 84564d13ec0ec40f408622ff6b0d900723bbab5b Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Wed, 22 May 2019 14:44:22 +0200 -Subject: [PATCH 04/18] h264dec: add ref_pic_marking and pic_order_cnt bit_size +Subject: [PATCH 04/16] h264dec: add ref_pic_marking and pic_order_cnt bit_size to slice context Used by V4L2 request API h264 hwaccel @@ -1295,7 +1295,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/libavcodec/h264_slice.c b/libavcodec/h264_slice.c -index c3a7338a70..c28b58cd5d 100644 +index c3a7338a7043..c28b58cd5d95 100644 --- a/libavcodec/h264_slice.c +++ b/libavcodec/h264_slice.c @@ -1748,7 +1748,7 @@ static int h264_slice_header_parse(const H264Context *h, H264SliceContext *sl, @@ -1336,7 +1336,7 @@ index c3a7338a70..c28b58cd5d 100644 if (sl->slice_type_nos != AV_PICTURE_TYPE_I && pps->cabac) { diff --git a/libavcodec/h264dec.h b/libavcodec/h264dec.h -index 0698ab95ba..2b39e82c3b 100644 +index 0698ab95ba51..2b39e82c3b03 100644 --- a/libavcodec/h264dec.h +++ b/libavcodec/h264dec.h @@ -329,6 +329,7 @@ typedef struct H264SliceContext { @@ -1359,7 +1359,7 @@ index 0698ab95ba..2b39e82c3b 100644 From 5a8628cf6368fe18457d02bf551d5935609efab5 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 05/18] Add V4L2 request API h264 hwaccel +Subject: [PATCH 05/16] Add V4L2 request API h264 hwaccel Signed-off-by: Jernej Skrabec Signed-off-by: Jonas Karlman @@ -1374,7 +1374,7 @@ Signed-off-by: Jonas Karlman create mode 100644 libavcodec/v4l2_request_h264.c diff --git a/configure b/configure -index f2e203d134..b17e4108c1 100755 +index f2e203d13463..b17e4108c1b6 100755 --- a/configure +++ b/configure @@ -2951,6 +2951,8 @@ h264_dxva2_hwaccel_deps="dxva2" @@ -1395,7 +1395,7 @@ index f2e203d134..b17e4108c1 100755 check_headers sys/videoio.h test_code cc sys/videoio.h "struct v4l2_frmsizeenum vfse; vfse.discrete.width = 0;" && enable_sanitized struct_v4l2_frmivalenum_discrete diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index 90dfffcb20..426c7528e9 100644 +index 90dfffcb2004..426c7528e904 100644 --- a/libavcodec/Makefile +++ b/libavcodec/Makefile @@ -935,6 +935,7 @@ OBJS-$(CONFIG_H264_D3D11VA_HWACCEL) += dxva2_h264.o @@ -1407,7 +1407,7 @@ index 90dfffcb20..426c7528e9 100644 OBJS-$(CONFIG_H264_VDPAU_HWACCEL) += vdpau_h264.o OBJS-$(CONFIG_H264_VIDEOTOOLBOX_HWACCEL) += videotoolbox.o diff --git a/libavcodec/h264_slice.c b/libavcodec/h264_slice.c -index c28b58cd5d..0a10d00aad 100644 +index c28b58cd5d95..0a10d00aad9e 100644 --- a/libavcodec/h264_slice.c +++ b/libavcodec/h264_slice.c @@ -768,6 +768,7 @@ static enum AVPixelFormat get_pixel_format(H264Context *h, int force_callback) @@ -1429,7 +1429,7 @@ index c28b58cd5d..0a10d00aad 100644 if (h->avctx->codec->pix_fmts) choices = h->avctx->codec->pix_fmts; diff --git a/libavcodec/h264dec.c b/libavcodec/h264dec.c -index 0a999bef43..d78e3eaee3 100644 +index 0a999bef43d9..d78e3eaee3a8 100644 --- a/libavcodec/h264dec.c +++ b/libavcodec/h264dec.c @@ -1076,6 +1076,9 @@ AVCodec ff_h264_decoder = { @@ -1443,7 +1443,7 @@ index 0a999bef43..d78e3eaee3 100644 NULL }, diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h -index 8e54cf73f9..969a1da0f4 100644 +index 8e54cf73f90f..969a1da0f4bc 100644 --- a/libavcodec/hwaccels.h +++ b/libavcodec/hwaccels.h @@ -32,6 +32,7 @@ extern const AVHWAccel ff_h264_d3d11va_hwaccel; @@ -1456,7 +1456,7 @@ index 8e54cf73f9..969a1da0f4 100644 extern const AVHWAccel ff_h264_videotoolbox_hwaccel; diff --git a/libavcodec/v4l2_request_h264.c b/libavcodec/v4l2_request_h264.c new file mode 100644 -index 0000000000..88da8f0a2d +index 000000000000..88da8f0a2db0 --- /dev/null +++ b/libavcodec/v4l2_request_h264.c @@ -0,0 +1,456 @@ @@ -1920,7 +1920,7 @@ index 0000000000..88da8f0a2d From 02b8fb17c2a019463dcab4baa1cb0bec63353183 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 06/18] Add V4L2 request API mpeg2 hwaccel +Subject: [PATCH 06/16] Add V4L2 request API mpeg2 hwaccel Signed-off-by: Jonas Karlman --- @@ -1933,7 +1933,7 @@ Signed-off-by: Jonas Karlman create mode 100644 libavcodec/v4l2_request_mpeg2.c diff --git a/configure b/configure -index b17e4108c1..ec141fabbd 100755 +index b17e4108c1b6..ec141fabbdc1 100755 --- a/configure +++ b/configure @@ -2995,6 +2995,8 @@ mpeg2_dxva2_hwaccel_deps="dxva2" @@ -1954,7 +1954,7 @@ index b17e4108c1..ec141fabbd 100755 check_headers sys/videoio.h test_code cc sys/videoio.h "struct v4l2_frmsizeenum vfse; vfse.discrete.width = 0;" && enable_sanitized struct_v4l2_frmivalenum_discrete diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index 426c7528e9..02c023a447 100644 +index 426c7528e904..02c023a44772 100644 --- a/libavcodec/Makefile +++ b/libavcodec/Makefile @@ -955,6 +955,7 @@ OBJS-$(CONFIG_MPEG2_D3D11VA_HWACCEL) += dxva2_mpeg2.o @@ -1966,7 +1966,7 @@ index 426c7528e9..02c023a447 100644 OBJS-$(CONFIG_MPEG2_VDPAU_HWACCEL) += vdpau_mpeg12.o OBJS-$(CONFIG_MPEG2_VIDEOTOOLBOX_HWACCEL) += videotoolbox.o diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h -index 969a1da0f4..a8ae1483d8 100644 +index 969a1da0f4bc..a8ae1483d8e1 100644 --- a/libavcodec/hwaccels.h +++ b/libavcodec/hwaccels.h @@ -53,6 +53,7 @@ extern const AVHWAccel ff_mpeg2_d3d11va_hwaccel; @@ -1978,7 +1978,7 @@ index 969a1da0f4..a8ae1483d8 100644 extern const AVHWAccel ff_mpeg2_vdpau_hwaccel; extern const AVHWAccel ff_mpeg2_videotoolbox_hwaccel; diff --git a/libavcodec/mpeg12dec.c b/libavcodec/mpeg12dec.c -index 94221da2c1..4b0176f6cb 100644 +index 94221da2c158..4b0176f6cb19 100644 --- a/libavcodec/mpeg12dec.c +++ b/libavcodec/mpeg12dec.c @@ -1147,6 +1147,9 @@ static const enum AVPixelFormat mpeg2_hwaccel_pixfmt_list_420[] = { @@ -2003,7 +2003,7 @@ index 94221da2c1..4b0176f6cb 100644 }, diff --git a/libavcodec/v4l2_request_mpeg2.c b/libavcodec/v4l2_request_mpeg2.c new file mode 100644 -index 0000000000..84d53209c7 +index 000000000000..84d53209c79d --- /dev/null +++ b/libavcodec/v4l2_request_mpeg2.c @@ -0,0 +1,159 @@ @@ -2170,7 +2170,7 @@ index 0000000000..84d53209c7 From 1cd61e5730acc12c39c964bcf13c73a54203a390 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Wed, 22 May 2019 14:46:58 +0200 -Subject: [PATCH 07/18] Add V4L2 request API vp8 hwaccel +Subject: [PATCH 07/16] Add V4L2 request API vp8 hwaccel Signed-off-by: Boris Brezillon Signed-off-by: Ezequiel Garcia @@ -2185,7 +2185,7 @@ Signed-off-by: Jonas Karlman create mode 100644 libavcodec/v4l2_request_vp8.c diff --git a/configure b/configure -index ec141fabbd..f16bed65a3 100755 +index ec141fabbdc1..f16bed65a3a3 100755 --- a/configure +++ b/configure @@ -3027,6 +3027,8 @@ vc1_vdpau_hwaccel_deps="vdpau" @@ -2206,7 +2206,7 @@ index ec141fabbd..f16bed65a3 100755 check_headers sys/videoio.h test_code cc sys/videoio.h "struct v4l2_frmsizeenum vfse; vfse.discrete.width = 0;" && enable_sanitized struct_v4l2_frmivalenum_discrete diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index 02c023a447..c79d678eb3 100644 +index 02c023a44772..c79d678eb3ee 100644 --- a/libavcodec/Makefile +++ b/libavcodec/Makefile @@ -971,6 +971,7 @@ OBJS-$(CONFIG_VC1_QSV_HWACCEL) += qsvdec.o @@ -2218,7 +2218,7 @@ index 02c023a447..c79d678eb3 100644 OBJS-$(CONFIG_VP9_D3D11VA_HWACCEL) += dxva2_vp9.o OBJS-$(CONFIG_VP9_DXVA2_HWACCEL) += dxva2_vp9.o diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h -index a8ae1483d8..9f8d41e367 100644 +index a8ae1483d8e1..9f8d41e367ed 100644 --- a/libavcodec/hwaccels.h +++ b/libavcodec/hwaccels.h @@ -69,6 +69,7 @@ extern const AVHWAccel ff_vc1_nvdec_hwaccel; @@ -2231,7 +2231,7 @@ index a8ae1483d8..9f8d41e367 100644 extern const AVHWAccel ff_vp9_d3d11va2_hwaccel; diff --git a/libavcodec/v4l2_request_vp8.c b/libavcodec/v4l2_request_vp8.c new file mode 100644 -index 0000000000..bc0fc40072 +index 000000000000..bc0fc400727a --- /dev/null +++ b/libavcodec/v4l2_request_vp8.c @@ -0,0 +1,180 @@ @@ -2416,7 +2416,7 @@ index 0000000000..bc0fc40072 + .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; diff --git a/libavcodec/vp8.c b/libavcodec/vp8.c -index d16e7b6aa3..8ee768d875 100644 +index d16e7b6aa34e..8ee768d875ad 100644 --- a/libavcodec/vp8.c +++ b/libavcodec/vp8.c @@ -176,6 +176,9 @@ static enum AVPixelFormat get_pixel_format(VP8Context *s) @@ -2440,10 +2440,10 @@ index d16e7b6aa3..8ee768d875 100644 NULL }, -From 0065c180f7345bef065e5704ddb9827dc18b2f4b Mon Sep 17 00:00:00 2001 +From 3c09465f9dee3355b0ef68140b86e9e66797b5fc Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 08/18] Add V4L2 request API hevc hwaccel +Subject: [PATCH 08/16] Add V4L2 request API hevc hwaccel Signed-off-by: Jernej Skrabec Signed-off-by: Jonas Karlman @@ -2452,12 +2452,12 @@ Signed-off-by: Jonas Karlman libavcodec/Makefile | 1 + libavcodec/hevcdec.c | 10 + libavcodec/hwaccels.h | 1 + - libavcodec/v4l2_request_hevc.c | 574 +++++++++++++++++++++++++++++++++ - 5 files changed, 589 insertions(+) + libavcodec/v4l2_request_hevc.c | 604 +++++++++++++++++++++++++++++++++ + 5 files changed, 619 insertions(+) create mode 100644 libavcodec/v4l2_request_hevc.c diff --git a/configure b/configure -index f16bed65a3..02a80cf27f 100755 +index f16bed65a3a3..02a80cf27fd7 100755 --- a/configure +++ b/configure @@ -2967,6 +2967,8 @@ hevc_dxva2_hwaccel_deps="dxva2 DXVA_PicParams_HEVC" @@ -2478,7 +2478,7 @@ index f16bed65a3..02a80cf27f 100755 check_cc vp8_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_VP8_FRAME;" diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index c79d678eb3..0059074530 100644 +index c79d678eb3ee..0059074530c5 100644 --- a/libavcodec/Makefile +++ b/libavcodec/Makefile @@ -943,6 +943,7 @@ OBJS-$(CONFIG_HEVC_D3D11VA_HWACCEL) += dxva2_hevc.o @@ -2490,7 +2490,7 @@ index c79d678eb3..0059074530 100644 OBJS-$(CONFIG_HEVC_VDPAU_HWACCEL) += vdpau_hevc.o h265_profile_level.o OBJS-$(CONFIG_MJPEG_NVDEC_HWACCEL) += nvdec_mjpeg.o diff --git a/libavcodec/hevcdec.c b/libavcodec/hevcdec.c -index 2231aed259..7507966d71 100644 +index 2231aed2599b..7507966d7160 100644 --- a/libavcodec/hevcdec.c +++ b/libavcodec/hevcdec.c @@ -392,6 +392,7 @@ static enum AVPixelFormat get_format(HEVCContext *s, const HEVCSPS *sps) @@ -2532,7 +2532,7 @@ index 2231aed259..7507966d71 100644 NULL }, diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h -index 9f8d41e367..ffb9fa5087 100644 +index 9f8d41e367ed..ffb9fa5087d9 100644 --- a/libavcodec/hwaccels.h +++ b/libavcodec/hwaccels.h @@ -40,6 +40,7 @@ extern const AVHWAccel ff_hevc_d3d11va_hwaccel; @@ -2545,10 +2545,10 @@ index 9f8d41e367..ffb9fa5087 100644 extern const AVHWAccel ff_hevc_videotoolbox_hwaccel; diff --git a/libavcodec/v4l2_request_hevc.c b/libavcodec/v4l2_request_hevc.c new file mode 100644 -index 0000000000..d385c2f036 +index 000000000000..3a9d564ce20b --- /dev/null +++ b/libavcodec/v4l2_request_hevc.c -@@ -0,0 +1,574 @@ +@@ -0,0 +1,604 @@ +/* + * This file is part of FFmpeg. + * @@ -2577,6 +2577,7 @@ index 0000000000..d385c2f036 + struct v4l2_ctrl_hevc_sps sps; + struct v4l2_ctrl_hevc_pps pps; + struct v4l2_ctrl_hevc_decode_params dec_params; ++ struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix; + struct v4l2_ctrl_hevc_slice_params slice_params[MAX_SLICES]; + int first_slice; + int num_slices; //TODO: this should be in control @@ -2737,6 +2738,9 @@ index 0000000000..d385c2f036 + .bit_size = 0, + .data_bit_offset = get_bits_count(&h->HEVClc->gb), + ++ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */ ++ .slice_segment_addr = sh->slice_segment_addr, ++ + /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ + .nal_unit_type = h->nal_unit_type, + .nuh_temporal_id_plus1 = h->temporal_id + 1, @@ -2868,11 +2872,32 @@ index 0000000000..d385c2f036 +{ + const HEVCContext *h = avctx->priv_data; + const HEVCPPS *pps = h->ps.pps; ++ const HEVCSPS *sps = h->ps.sps; ++ const ScalingList *sl = pps->scaling_list_data_present_flag ? ++ &pps->scaling_list : ++ sps->scaling_list_enable_flag ? ++ &sps->scaling_list : NULL; + V4L2RequestControlsHEVC *controls = h->ref->hwaccel_picture_private; + + fill_sps(&controls->sps, h); + fill_dec_params(&controls->dec_params, h); + ++ if (sl) { ++ for (int i = 0; i < 6; i++) { ++ for (int j = 0; j < 16; j++) ++ controls->scaling_matrix.scaling_list_4x4[i][j] = sl->sl[0][i][j]; ++ for (int j = 0; j < 64; j++) { ++ controls->scaling_matrix.scaling_list_8x8[i][j] = sl->sl[1][i][j]; ++ controls->scaling_matrix.scaling_list_16x16[i][j] = sl->sl[2][i][j]; ++ if (i < 2) ++ controls->scaling_matrix.scaling_list_32x32[i][j] = sl->sl[3][i * 3][j]; ++ } ++ controls->scaling_matrix.scaling_list_dc_coef_16x16[i] = sl->sl_dc[0][i]; ++ if (i < 2) ++ controls->scaling_matrix.scaling_list_dc_coef_32x32[i] = sl->sl_dc[1][i * 3]; ++ } ++ } ++ + /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */ + controls->pps = (struct v4l2_ctrl_hevc_pps) { + .num_extra_slice_header_bits = pps->num_extra_slice_header_bits, @@ -2990,6 +3015,11 @@ index 0000000000..d385c2f036 + .size = sizeof(controls->dec_params), + }, + { ++ .id = V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX, ++ .ptr = &controls->scaling_matrix, ++ .size = sizeof(controls->scaling_matrix), ++ }, ++ { + .id = V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS, + .ptr = &controls->slice_params, + .size = sizeof(controls->slice_params[0]) * FFMAX(FFMIN(controls->num_slices, MAX_SLICES), ctx->max_slices), @@ -3124,23 +3154,751 @@ index 0000000000..d385c2f036 + .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; -From 5877cc36995d4cdf012bcee11a36e9f4543d35fe Mon Sep 17 00:00:00 2001 +From 140874637c7d3d99b69e6b30f0ad32b07d4e43e8 Mon Sep 17 00:00:00 2001 +From: Boris Brezillon +Date: Thu, 12 Dec 2019 16:13:55 +0100 +Subject: [PATCH 09/16] Add V4L2 request API VP9 hwaccel + +Signed-off-by: Boris Brezillon +Signed-off-by: Jernej Skrabec +--- + configure | 3 + + libavcodec/Makefile | 1 + + libavcodec/hwaccels.h | 1 + + libavcodec/v4l2_request_vp9.c | 268 ++++++++++++++++++++++++++++++++++ + libavcodec/vp9.c | 192 +++++++++++++++++------- + libavcodec/vp9dec.h | 4 + + libavcodec/vp9shared.h | 1 + + 7 files changed, 415 insertions(+), 55 deletions(-) + create mode 100644 libavcodec/v4l2_request_vp9.c + +diff --git a/configure b/configure +index 02a80cf27fd7..0b238c051dff 100755 +--- a/configure ++++ b/configure +@@ -3041,6 +3041,8 @@ vp9_dxva2_hwaccel_deps="dxva2 DXVA_PicParams_VP9" + vp9_dxva2_hwaccel_select="vp9_decoder" + vp9_nvdec_hwaccel_deps="nvdec" + vp9_nvdec_hwaccel_select="vp9_decoder" ++vp9_v4l2request_hwaccel_deps="v4l2_request" ++vp9_v4l2request_hwaccel_select="vp9_decoder" + vp9_vaapi_hwaccel_deps="vaapi VADecPictureParameterBufferVP9_bit_depth" + vp9_vaapi_hwaccel_select="vp9_decoder" + vp9_vdpau_hwaccel_deps="vdpau VdpPictureInfoVP9" +@@ -6640,6 +6642,7 @@ check_cc h264_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_H264_SLICE;" + check_cc hevc_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_HEVC_SLICE;" + check_cc mpeg2_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_MPEG2_SLICE;" + check_cc vp8_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_VP8_FRAME;" ++check_cc vp9_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_VP9_FRAME;" + + check_headers sys/videoio.h + test_code cc sys/videoio.h "struct v4l2_frmsizeenum vfse; vfse.discrete.width = 0;" && enable_sanitized struct_v4l2_frmivalenum_discrete +diff --git a/libavcodec/Makefile b/libavcodec/Makefile +index 0059074530c5..38edf1cfe5e5 100644 +--- a/libavcodec/Makefile ++++ b/libavcodec/Makefile +@@ -977,6 +977,7 @@ OBJS-$(CONFIG_VP8_VAAPI_HWACCEL) += vaapi_vp8.o + OBJS-$(CONFIG_VP9_D3D11VA_HWACCEL) += dxva2_vp9.o + OBJS-$(CONFIG_VP9_DXVA2_HWACCEL) += dxva2_vp9.o + OBJS-$(CONFIG_VP9_NVDEC_HWACCEL) += nvdec_vp9.o ++OBJS-$(CONFIG_VP9_V4L2REQUEST_HWACCEL) += v4l2_request_vp9.o + OBJS-$(CONFIG_VP9_VAAPI_HWACCEL) += vaapi_vp9.o + OBJS-$(CONFIG_VP9_VDPAU_HWACCEL) += vdpau_vp9.o + OBJS-$(CONFIG_VP8_QSV_HWACCEL) += qsvdec.o +diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h +index ffb9fa5087d9..fc5d0b0479be 100644 +--- a/libavcodec/hwaccels.h ++++ b/libavcodec/hwaccels.h +@@ -76,6 +76,7 @@ extern const AVHWAccel ff_vp9_d3d11va_hwaccel; + extern const AVHWAccel ff_vp9_d3d11va2_hwaccel; + extern const AVHWAccel ff_vp9_dxva2_hwaccel; + extern const AVHWAccel ff_vp9_nvdec_hwaccel; ++extern const AVHWAccel ff_vp9_v4l2request_hwaccel; + extern const AVHWAccel ff_vp9_vaapi_hwaccel; + extern const AVHWAccel ff_vp9_vdpau_hwaccel; + extern const AVHWAccel ff_wmv3_d3d11va_hwaccel; +diff --git a/libavcodec/v4l2_request_vp9.c b/libavcodec/v4l2_request_vp9.c +new file mode 100644 +index 000000000000..9b95c76cdb82 +--- /dev/null ++++ b/libavcodec/v4l2_request_vp9.c +@@ -0,0 +1,268 @@ ++/* ++ * This file is part of FFmpeg. ++ * ++ * FFmpeg is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU Lesser General Public ++ * License as published by the Free Software Foundation; either ++ * version 2.1 of the License, or (at your option) any later version. ++ * ++ * FFmpeg is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with FFmpeg; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++#include "hwconfig.h" ++#include "v4l2_request.h" ++#include "vp9dec.h" ++ ++typedef struct V4L2RequestControlsVP9 { ++ struct v4l2_ctrl_vp9_frame decode_params; ++} V4L2RequestControlsVP9; ++ ++static int v4l2_request_vp9_set_frame_ctx(AVCodecContext *avctx) ++{ ++ VP9Context *s = avctx->priv_data; ++ struct v4l2_ctrl_vp9_compressed_hdr chp; ++ struct v4l2_ext_control control[] = { ++ { ++ .id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, ++ .ptr = &chp, ++ .size = sizeof(chp), ++ }, ++ }; ++ ++ memset(&chp, 0, sizeof(chp)); ++ ++ chp.tx_mode = s->s.h.txfmmode; ++ memcpy(chp.tx8, s->prob_raw.p.tx8p, sizeof(s->prob_raw.p.tx8p)); ++ memcpy(chp.tx16, s->prob_raw.p.tx16p, sizeof(s->prob_raw.p.tx16p)); ++ memcpy(chp.tx32, s->prob_raw.p.tx32p, sizeof(s->prob_raw.p.tx32p)); ++ for (unsigned i = 0; i < 4; i++) { ++ for (unsigned j = 0; j < 2; j++) { ++ for (unsigned k = 0; k < 2; k++) { ++ for (unsigned l = 0; l < 6; l++) { ++ for (unsigned m = 0; m < 6; m++) { ++ memcpy(chp.coef[i][j][k][l][m], s->prob_raw.coef[i][j][k][l][m], sizeof(chp.coef[0][0][0][0][0])); ++ } ++ } ++ } ++ } ++ } ++ memcpy(chp.skip, s->prob_raw.p.skip, sizeof(s->prob_raw.p.skip)); ++ memcpy(chp.inter_mode, s->prob_raw.p.mv_mode, sizeof(s->prob_raw.p.mv_mode)); ++ memcpy(chp.interp_filter, s->prob_raw.p.filter, sizeof(s->prob_raw.p.filter)); ++ memcpy(chp.is_inter, s->prob_raw.p.intra, sizeof(s->prob_raw.p.intra)); ++ memcpy(chp.comp_mode, s->prob_raw.p.comp, sizeof(s->prob_raw.p.comp)); ++ memcpy(chp.single_ref, s->prob_raw.p.single_ref, sizeof(s->prob_raw.p.single_ref)); ++ memcpy(chp.comp_ref, s->prob_raw.p.comp_ref, sizeof(s->prob_raw.p.comp_ref)); ++ memcpy(chp.y_mode, s->prob_raw.p.y_mode, sizeof(s->prob_raw.p.y_mode)); ++ for (unsigned i = 0; i < 10; i++) ++ memcpy(chp.uv_mode[i], s->prob.p.uv_mode[i], sizeof(s->prob.p.uv_mode[0])); ++ for (unsigned i = 0; i < 4; i++) ++ memcpy(chp.partition[i * 4], s->prob_raw.p.partition[i], sizeof(s->prob_raw.p.partition[0])); ++ memcpy(chp.mv.joint, s->prob_raw.p.mv_joint, sizeof(s->prob_raw.p.mv_joint)); ++ for (unsigned i = 0; i < 2; i++) { ++ chp.mv.sign[i] = s->prob_raw.p.mv_comp[i].sign; ++ memcpy(chp.mv.classes[i], s->prob_raw.p.mv_comp[i].classes, sizeof(s->prob_raw.p.mv_comp[0].classes)); ++ chp.mv.class0_bit[i] = s->prob_raw.p.mv_comp[i].class0; ++ memcpy(chp.mv.bits[i], s->prob_raw.p.mv_comp[i].bits, sizeof(s->prob_raw.p.mv_comp[0].bits)); ++ memcpy(chp.mv.class0_fr[i], s->prob_raw.p.mv_comp[i].class0_fp, sizeof(s->prob_raw.p.mv_comp[0].class0_fp)); ++ memcpy(chp.mv.fr[i], s->prob_raw.p.mv_comp[i].fp, sizeof(s->prob_raw.p.mv_comp[0].fp)); ++ chp.mv.class0_hp[i] = s->prob_raw.p.mv_comp[i].class0_hp; ++ chp.mv.hp[i] = s->prob_raw.p.mv_comp[i].hp; ++ } ++ ++ return ff_v4l2_request_set_controls(avctx, control, FF_ARRAY_ELEMS(control)); ++} ++ ++static int v4l2_request_vp9_start_frame(AVCodecContext *avctx, ++ av_unused const uint8_t *buffer, ++ av_unused uint32_t size) ++{ ++ const VP9Context *s = avctx->priv_data; ++ const VP9Frame *f = &s->s.frames[CUR_FRAME]; ++ V4L2RequestControlsVP9 *controls = f->hwaccel_picture_private; ++ struct v4l2_ctrl_vp9_frame *dec_params = &controls->decode_params; ++ const ThreadFrame *ref; ++ int ret; ++ ++ ret = v4l2_request_vp9_set_frame_ctx(avctx); ++ if (ret) ++ return ret; ++ ++ memset(dec_params, 0, sizeof(*dec_params)); ++ ++ if (s->s.h.keyframe) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_KEY_FRAME; ++ if (!s->s.h.invisible) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_SHOW_FRAME; ++ if (s->s.h.errorres) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT; ++ if (s->s.h.intraonly) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_INTRA_ONLY; ++ if (!s->s.h.keyframe && s->s.h.highprecisionmvs) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV; ++ if (s->s.h.refreshctx) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX; ++ if (s->s.h.parallelmode) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE; ++ if (s->ss_h) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING; ++ if (s->ss_v) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING; ++ if (avctx->color_range == AVCOL_RANGE_JPEG) ++ dec_params->flags |= V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING; ++ ++ dec_params->compressed_header_size = s->s.h.compressed_header_size; ++ dec_params->uncompressed_header_size = s->s.h.uncompressed_header_size; ++ dec_params->profile = s->s.h.profile; ++ dec_params->reset_frame_context = s->s.h.resetctx > 0 ? s->s.h.resetctx - 1 : 0; ++ dec_params->frame_context_idx = s->s.h.framectxid; ++ dec_params->bit_depth = s->s.h.bpp; ++ ++ dec_params->interpolation_filter = s->s.h.filtermode ^ (s->s.h.filtermode <= 1); ++ dec_params->tile_cols_log2 = s->s.h.tiling.log2_tile_cols; ++ dec_params->tile_rows_log2 = s->s.h.tiling.log2_tile_rows; ++ dec_params->reference_mode = s->s.h.comppredmode; ++ dec_params->frame_width_minus_1 = s->w - 1; ++ dec_params->frame_height_minus_1 = s->h - 1; ++ //dec_params->render_width_minus_1 = avctx->width - 1; ++ //dec_params->render_height_minus_1 = avctx->height - 1; ++ ++ ref = &s->s.refs[s->s.h.refidx[0]]; ++ if (ref->f && ref->f->buf[0]) ++ dec_params->last_frame_ts = ff_v4l2_request_get_capture_timestamp(ref->f); ++ ref = &s->s.refs[s->s.h.refidx[1]]; ++ if (ref->f && ref->f->buf[0]) ++ dec_params->golden_frame_ts = ff_v4l2_request_get_capture_timestamp(ref->f); ++ ref = &s->s.refs[s->s.h.refidx[2]]; ++ if (ref->f && ref->f->buf[0]) ++ dec_params->alt_frame_ts = ff_v4l2_request_get_capture_timestamp(ref->f); ++ ++ if (s->s.h.signbias[0]) ++ dec_params->ref_frame_sign_bias |= V4L2_VP9_SIGN_BIAS_LAST; ++ if (s->s.h.signbias[1]) ++ dec_params->ref_frame_sign_bias |= V4L2_VP9_SIGN_BIAS_GOLDEN; ++ if (s->s.h.signbias[2]) ++ dec_params->ref_frame_sign_bias |= V4L2_VP9_SIGN_BIAS_ALT; ++ ++ if (s->s.h.lf_delta.enabled) ++ dec_params->lf.flags |= V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED; ++ if (s->s.h.lf_delta.updated) ++ dec_params->lf.flags |= V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE; ++ ++ dec_params->lf.level = s->s.h.filter.level; ++ dec_params->lf.sharpness = s->s.h.filter.sharpness; ++ for (unsigned i = 0; i < 4; i++) ++ dec_params->lf.ref_deltas[i] = s->s.h.lf_delta.ref[i]; ++ for (unsigned i = 0; i < 2; i++) ++ dec_params->lf.mode_deltas[i] = s->s.h.lf_delta.mode[i]; ++ ++ dec_params->quant.base_q_idx = s->s.h.yac_qi; ++ dec_params->quant.delta_q_y_dc = s->s.h.ydc_qdelta; ++ dec_params->quant.delta_q_uv_dc = s->s.h.uvdc_qdelta; ++ dec_params->quant.delta_q_uv_ac = s->s.h.uvac_qdelta; ++ ++ if (s->s.h.segmentation.enabled) ++ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_ENABLED; ++ if (s->s.h.segmentation.update_map) ++ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP; ++ if (s->s.h.segmentation.temporal) ++ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE; ++ if (s->s.h.segmentation.update_data) ++ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA; ++ if (s->s.h.segmentation.absolute_vals) ++ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE; ++ ++ for (unsigned i = 0; i < 7; i++) ++ dec_params->seg.tree_probs[i] = s->s.h.segmentation.prob[i]; ++ ++ if (s->s.h.segmentation.temporal) { ++ for (unsigned i = 0; i < 3; i++) ++ dec_params->seg.pred_probs[i] = s->s.h.segmentation.pred_prob[i]; ++ } else { ++ memset(dec_params->seg.pred_probs, 255, sizeof(dec_params->seg.pred_probs)); ++ } ++ ++ for (unsigned i = 0; i < 8; i++) { ++ if (s->s.h.segmentation.feat[i].q_enabled) { ++ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEG_LVL_ALT_Q; ++ dec_params->seg.feature_data[i][V4L2_VP9_SEG_LVL_ALT_Q] = s->s.h.segmentation.feat[i].q_val; ++ } ++ ++ if (s->s.h.segmentation.feat[i].lf_enabled) { ++ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEG_LVL_ALT_L; ++ dec_params->seg.feature_data[i][V4L2_VP9_SEG_LVL_ALT_L] = s->s.h.segmentation.feat[i].lf_val; ++ } ++ ++ if (s->s.h.segmentation.feat[i].ref_enabled) { ++ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEG_LVL_REF_FRAME; ++ dec_params->seg.feature_data[i][V4L2_VP9_SEG_LVL_REF_FRAME] = s->s.h.segmentation.feat[i].ref_val; ++ } ++ ++ if (s->s.h.segmentation.feat[i].skip_enabled) ++ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEG_LVL_SKIP; ++ } ++ ++ return ff_v4l2_request_reset_frame(avctx, f->tf.f); ++} ++ ++static int v4l2_request_vp9_decode_slice(AVCodecContext *avctx, const uint8_t *buffer, uint32_t size) ++{ ++ const VP9Context *s = avctx->priv_data; ++ const VP9Frame *f = &s->s.frames[CUR_FRAME]; ++ ++ return ff_v4l2_request_append_output_buffer(avctx, f->tf.f, buffer, size); ++} ++ ++static int v4l2_request_vp9_end_frame(AVCodecContext *avctx) ++{ ++ const VP9Context *s = avctx->priv_data; ++ const VP9Frame *f = &s->s.frames[CUR_FRAME]; ++ V4L2RequestControlsVP9 *controls = f->hwaccel_picture_private; ++ int ret; ++ ++ struct v4l2_ext_control control[] = { ++ { ++ .id = V4L2_CID_STATELESS_VP9_FRAME, ++ .ptr = &controls->decode_params, ++ .size = sizeof(controls->decode_params), ++ }, ++ }; ++ ++ ret = ff_v4l2_request_decode_frame(avctx, f->tf.f, control, FF_ARRAY_ELEMS(control)); ++ if (ret) ++ return ret; ++ ++ if (!s->s.h.refreshctx) ++ return 0; ++ ++ return 0; ++} ++ ++static int v4l2_request_vp9_init(AVCodecContext *avctx) ++{ ++ // TODO: check V4L2_CID_MPEG_VIDEO_VP9_PROFILE ++ return ff_v4l2_request_init(avctx, V4L2_PIX_FMT_VP9_FRAME, 3 * 1024 * 1024, NULL, 0); ++} ++ ++const AVHWAccel ff_vp9_v4l2request_hwaccel = { ++ .name = "vp9_v4l2request", ++ .type = AVMEDIA_TYPE_VIDEO, ++ .id = AV_CODEC_ID_VP9, ++ .pix_fmt = AV_PIX_FMT_DRM_PRIME, ++ .start_frame = v4l2_request_vp9_start_frame, ++ .decode_slice = v4l2_request_vp9_decode_slice, ++ .end_frame = v4l2_request_vp9_end_frame, ++ .frame_priv_data_size = sizeof(V4L2RequestControlsVP9), ++ .init = v4l2_request_vp9_init, ++ .uninit = ff_v4l2_request_uninit, ++ .priv_data_size = sizeof(V4L2RequestContext), ++ .frame_params = ff_v4l2_request_frame_params, ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++}; +diff --git a/libavcodec/vp9.c b/libavcodec/vp9.c +index 4659f94ee8b6..1b2f1eeaf69c 100644 +--- a/libavcodec/vp9.c ++++ b/libavcodec/vp9.c +@@ -191,6 +191,7 @@ static int update_size(AVCodecContext *avctx, int w, int h) + #define HWACCEL_MAX (CONFIG_VP9_DXVA2_HWACCEL + \ + CONFIG_VP9_D3D11VA_HWACCEL * 2 + \ + CONFIG_VP9_NVDEC_HWACCEL + \ ++ CONFIG_VP9_V4L2REQUEST_HWACCEL + \ + CONFIG_VP9_VAAPI_HWACCEL + \ + CONFIG_VP9_VDPAU_HWACCEL) + enum AVPixelFormat pix_fmts[HWACCEL_MAX + 2], *fmtp = pix_fmts; +@@ -223,6 +224,9 @@ static int update_size(AVCodecContext *avctx, int w, int h) + #endif + #if CONFIG_VP9_VDPAU_HWACCEL + *fmtp++ = AV_PIX_FMT_VDPAU; ++#endif ++#if CONFIG_VP9_V4L2REQUEST_HWACCEL ++ *fmtp++ = AV_PIX_FMT_DRM_PRIME; + #endif + break; + case AV_PIX_FMT_YUV420P12: +@@ -234,6 +238,9 @@ static int update_size(AVCodecContext *avctx, int w, int h) + #endif + #if CONFIG_VP9_VDPAU_HWACCEL + *fmtp++ = AV_PIX_FMT_VDPAU; ++#endif ++#if CONFIG_VP9_V4L2REQUEST_HWACCEL ++ *fmtp++ = AV_PIX_FMT_DRM_PRIME; + #endif + break; + } +@@ -382,7 +389,7 @@ static av_always_inline int inv_recenter_nonneg(int v, int m) + } + + // differential forward probability updates +-static int update_prob(VP56RangeCoder *c, int p) ++static int read_prob_delta(VP56RangeCoder *c) + { + static const uint8_t inv_map_table[255] = { + 7, 20, 33, 46, 59, 72, 85, 98, 111, 124, 137, 150, 163, 176, +@@ -436,8 +443,13 @@ static int update_prob(VP56RangeCoder *c, int p) + av_assert2(d < FF_ARRAY_ELEMS(inv_map_table)); + } + +- return p <= 128 ? 1 + inv_recenter_nonneg(inv_map_table[d], p - 1) : +- 255 - inv_recenter_nonneg(inv_map_table[d], 255 - p); ++ return inv_map_table[d]; ++} ++ ++static int update_prob(int p, int d) ++{ ++ return p <= 128 ? 1 + inv_recenter_nonneg(d, p - 1) : ++ 255 - inv_recenter_nonneg(d, 255 - p); + } + + static int read_colorspace_details(AVCodecContext *avctx) +@@ -703,7 +715,8 @@ static int decode_frame_header(AVCodecContext *avctx, + get_bits(&s->gb, 8) : 255; + } + +- if (get_bits1(&s->gb)) { ++ s->s.h.segmentation.update_data = get_bits1(&s->gb); ++ if (s->s.h.segmentation.update_data) { + s->s.h.segmentation.absolute_vals = get_bits1(&s->gb); + for (i = 0; i < 8; i++) { + if ((s->s.h.segmentation.feat[i].q_enabled = get_bits1(&s->gb))) +@@ -904,6 +917,8 @@ static int decode_frame_header(AVCodecContext *avctx, + * as explicit copies if the fw update is missing (and skip the copy upon + * fw update)? */ + s->prob.p = s->prob_ctx[c].p; ++ memset(&s->prob_raw.p, 0, sizeof(s->prob_raw.p)); ++ memset(&s->prob_raw.coef, 0, sizeof(s->prob_raw.coef)); + + // txfm updates + if (s->s.h.lossless) { +@@ -915,18 +930,25 @@ static int decode_frame_header(AVCodecContext *avctx, + + if (s->s.h.txfmmode == TX_SWITCHABLE) { + for (i = 0; i < 2; i++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.tx8p[i] = update_prob(&s->c, s->prob.p.tx8p[i]); ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.tx8p[i] = read_prob_delta(&s->c); ++ s->prob.p.tx8p[i] = update_prob(s->prob.p.tx8p[i], ++ s->prob_raw.p.tx8p[i]); ++ } + for (i = 0; i < 2; i++) + for (j = 0; j < 2; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.tx16p[i][j] = +- update_prob(&s->c, s->prob.p.tx16p[i][j]); ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.tx16p[i][j] = read_prob_delta(&s->c); ++ s->prob.p.tx16p[i][j] = update_prob(s->prob.p.tx16p[i][j], ++ s->prob_raw.p.tx16p[i][j]); ++ } + for (i = 0; i < 2; i++) + for (j = 0; j < 3; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.tx32p[i][j] = +- update_prob(&s->c, s->prob.p.tx32p[i][j]); ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.tx32p[i][j] = read_prob_delta(&s->c); ++ s->prob.p.tx32p[i][j] = update_prob(s->prob.p.tx32p[i][j], ++ s->prob_raw.p.tx32p[i][j]); ++ } + } + } + +@@ -938,15 +960,18 @@ static int decode_frame_header(AVCodecContext *avctx, + for (k = 0; k < 2; k++) + for (l = 0; l < 6; l++) + for (m = 0; m < 6; m++) { ++ uint8_t *pd = s->prob_raw.coef[i][j][k][l][m]; + uint8_t *p = s->prob.coef[i][j][k][l][m]; + uint8_t *r = ref[j][k][l][m]; + if (m >= 3 && l == 0) // dc only has 3 pt + break; + for (n = 0; n < 3; n++) { +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- p[n] = update_prob(&s->c, r[n]); +- else ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ pd[n] = read_prob_delta(&s->c); ++ p[n] = update_prob(r[n], pd[n]); ++ } else { + p[n] = r[n]; ++ } + } + memcpy(&p[3], ff_vp9_model_pareto8[p[2]], 8); + } +@@ -961,7 +986,7 @@ static int decode_frame_header(AVCodecContext *avctx, + break; + memcpy(p, r, 3); + memcpy(&p[3], ff_vp9_model_pareto8[p[2]], 8); +- } ++ } + } + if (s->s.h.txfmmode == i) + break; +@@ -969,25 +994,37 @@ static int decode_frame_header(AVCodecContext *avctx, + + // mode updates + for (i = 0; i < 3; i++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.skip[i] = update_prob(&s->c, s->prob.p.skip[i]); ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.skip[i] = read_prob_delta(&s->c); ++ s->prob.p.skip[i] = update_prob(s->prob.p.skip[i], ++ s->prob_raw.p.skip[i]); ++ } + if (!s->s.h.keyframe && !s->s.h.intraonly) { + for (i = 0; i < 7; i++) + for (j = 0; j < 3; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_mode[i][j] = read_prob_delta(&s->c); + s->prob.p.mv_mode[i][j] = +- update_prob(&s->c, s->prob.p.mv_mode[i][j]); ++ update_prob(s->prob.p.mv_mode[i][j], ++ s->prob_raw.p.mv_mode[i][j]); ++ } + + if (s->s.h.filtermode == FILTER_SWITCHABLE) + for (i = 0; i < 4; i++) + for (j = 0; j < 2; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.filter[i][j] = read_prob_delta(&s->c); + s->prob.p.filter[i][j] = +- update_prob(&s->c, s->prob.p.filter[i][j]); ++ update_prob(s->prob.p.filter[i][j], ++ s->prob_raw.p.filter[i][j]); ++ } + + for (i = 0; i < 4; i++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.intra[i] = update_prob(&s->c, s->prob.p.intra[i]); ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.intra[i] = read_prob_delta(&s->c); ++ s->prob.p.intra[i] = update_prob(s->prob.p.intra[i], ++ s->prob_raw.p.intra[i]); ++ } + + if (s->s.h.allowcompinter) { + s->s.h.comppredmode = vp8_rac_get(&s->c); +@@ -995,92 +1032,134 @@ static int decode_frame_header(AVCodecContext *avctx, + s->s.h.comppredmode += vp8_rac_get(&s->c); + if (s->s.h.comppredmode == PRED_SWITCHABLE) + for (i = 0; i < 5; i++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.comp[i] = read_prob_delta(&s->c); + s->prob.p.comp[i] = +- update_prob(&s->c, s->prob.p.comp[i]); ++ update_prob(s->prob.p.comp[i], s->prob_raw.p.comp[i]); ++ } + } else { + s->s.h.comppredmode = PRED_SINGLEREF; + } + + if (s->s.h.comppredmode != PRED_COMPREF) { + for (i = 0; i < 5; i++) { +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.single_ref[i][0] = read_prob_delta(&s->c); + s->prob.p.single_ref[i][0] = +- update_prob(&s->c, s->prob.p.single_ref[i][0]); +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ update_prob(s->prob.p.single_ref[i][0], ++ s->prob_raw.p.single_ref[i][0]); ++ } ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.single_ref[i][1] = read_prob_delta(&s->c); + s->prob.p.single_ref[i][1] = +- update_prob(&s->c, s->prob.p.single_ref[i][1]); ++ update_prob(s->prob.p.single_ref[i][1], ++ s->prob_raw.p.single_ref[i][1]); ++ } + } + } + + if (s->s.h.comppredmode != PRED_SINGLEREF) { + for (i = 0; i < 5; i++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.comp_ref[i] = read_prob_delta(&s->c); + s->prob.p.comp_ref[i] = +- update_prob(&s->c, s->prob.p.comp_ref[i]); ++ update_prob(s->prob.p.comp_ref[i], ++ s->prob_raw.p.comp_ref[i]); ++ } + } + + for (i = 0; i < 4; i++) + for (j = 0; j < 9; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.y_mode[i][j] = read_prob_delta(&s->c); + s->prob.p.y_mode[i][j] = +- update_prob(&s->c, s->prob.p.y_mode[i][j]); ++ update_prob(s->prob.p.y_mode[i][j], ++ s->prob_raw.p.y_mode[i][j]); ++ } + + for (i = 0; i < 4; i++) + for (j = 0; j < 4; j++) + for (k = 0; k < 3; k++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.partition[i][j][k] = read_prob_delta(&s->c); + s->prob.p.partition[3 - i][j][k] = +- update_prob(&s->c, +- s->prob.p.partition[3 - i][j][k]); ++ update_prob(s->prob.p.partition[3 - i][j][k], ++ s->prob_raw.p.partition[i][j][k]); ++ } + + // mv fields don't use the update_prob subexp model for some reason + for (i = 0; i < 3; i++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.mv_joint[i] = (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_joint[i] = (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob.p.mv_joint[i] = s->prob_raw.p.mv_joint[i]; ++ } + + for (i = 0; i < 2; i++) { +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].sign = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].sign = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].sign; ++ } + + for (j = 0; j < 10; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].classes[j] = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].classes[j] = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].classes[j]; ++ } + +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].class0 = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].class0 = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].class0; ++ } + + for (j = 0; j < 10; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].bits[j] = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].bits[j] = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].bits[j]; ++ } + } + + for (i = 0; i < 2; i++) { + for (j = 0; j < 2; j++) + for (k = 0; k < 3; k++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) +- s->prob.p.mv_comp[i].class0_fp[j][k] = ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].class0_fp[j][k] = + (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob.p.mv_comp[i].class0_fp[j][k] = ++ s->prob_raw.p.mv_comp[i].class0_fp[j][k]; ++ } + + for (j = 0; j < 3; j++) +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].fp[j] = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].fp[j] = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].fp[j]; ++ } + } + + if (s->s.h.highprecisionmvs) { + for (i = 0; i < 2; i++) { +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].class0_hp = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].class0_hp = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].class0_hp; ++ } + +- if (vp56_rac_get_prob_branchy(&s->c, 252)) ++ if (vp56_rac_get_prob_branchy(&s->c, 252)) { ++ s->prob_raw.p.mv_comp[i].hp = ++ (vp8_rac_get_uint(&s->c, 7) << 1) | 1; + s->prob.p.mv_comp[i].hp = +- (vp8_rac_get_uint(&s->c, 7) << 1) | 1; ++ s->prob_raw.p.mv_comp[i].hp; ++ } + } + } + } +@@ -1912,6 +1991,9 @@ AVCodec ff_vp9_decoder = { + #endif + #if CONFIG_VP9_VDPAU_HWACCEL + HWACCEL_VDPAU(vp9), ++#endif ++#if CONFIG_VP9_V4L2REQUEST_HWACCEL ++ HWACCEL_V4L2REQUEST(vp9), + #endif + NULL + }, +diff --git a/libavcodec/vp9dec.h b/libavcodec/vp9dec.h +index d82b258a3d81..8d2c341e0b97 100644 +--- a/libavcodec/vp9dec.h ++++ b/libavcodec/vp9dec.h +@@ -131,6 +131,10 @@ typedef struct VP9Context { + ProbContext p; + uint8_t coef[4][2][2][6][6][11]; + } prob; ++ struct { ++ ProbContext p; ++ uint8_t coef[4][2][2][6][6][11]; ++ } prob_raw; + + // contextual (above) cache + uint8_t *above_partition_ctx; +diff --git a/libavcodec/vp9shared.h b/libavcodec/vp9shared.h +index 54726df742f9..fee3568736f7 100644 +--- a/libavcodec/vp9shared.h ++++ b/libavcodec/vp9shared.h +@@ -131,6 +131,7 @@ typedef struct VP9BitstreamHeader { + uint8_t temporal; + uint8_t absolute_vals; + uint8_t update_map; ++ uint8_t update_data; + uint8_t prob[7]; + uint8_t pred_prob[3]; + struct { + +From ae118fbbef1e287c5101d7ceaa164727d825c4c2 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Thu, 14 Feb 2019 23:20:05 +0100 -Subject: [PATCH 09/18] Add and use private linux v5.14 headers for V4L2 +Subject: [PATCH 10/16] Add and use private linux v5.16 headers for V4L2 request API ctrls Signed-off-by: Jernej Skrabec Signed-off-by: Jonas Karlman --- configure | 2 +- - libavcodec/hevc-ctrls.h | 240 +++++++++++++++++++++++++++++++++ + libavcodec/hevc-ctrls.h | 252 +++++++++++++++++++++++++++++++++ libavcodec/v4l2_request_hevc.c | 1 + - 3 files changed, 242 insertions(+), 1 deletion(-) + 3 files changed, 254 insertions(+), 1 deletion(-) create mode 100644 libavcodec/hevc-ctrls.h diff --git a/configure b/configure -index 02a80cf27f..30ee788711 100755 +index 0b238c051dff..1c1929d2c28f 100755 --- a/configure +++ b/configure @@ -2967,7 +2967,7 @@ hevc_dxva2_hwaccel_deps="dxva2 DXVA_PicParams_HEVC" @@ -3154,10 +3912,10 @@ index 02a80cf27f..30ee788711 100755 hevc_vaapi_hwaccel_select="hevc_decoder" diff --git a/libavcodec/hevc-ctrls.h b/libavcodec/hevc-ctrls.h new file mode 100644 -index 0000000000..53c0038c79 +index 000000000000..ef63bc205756 --- /dev/null +++ b/libavcodec/hevc-ctrls.h -@@ -0,0 +1,240 @@ +@@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * These are the HEVC state controls for use with stateless HEVC @@ -3179,6 +3937,7 @@ index 0000000000..53c0038c79 +#define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_CODEC_BASE + 1008) +#define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_CODEC_BASE + 1009) +#define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_CODEC_BASE + 1010) ++#define V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (V4L2_CID_CODEC_BASE + 1011) +#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS (V4L2_CID_CODEC_BASE + 1012) +#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_CODEC_BASE + 1015) +#define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_CODEC_BASE + 1016) @@ -3187,6 +3946,7 @@ index 0000000000..53c0038c79 +#define V4L2_CTRL_TYPE_HEVC_SPS 0x0120 +#define V4L2_CTRL_TYPE_HEVC_PPS 0x0121 +#define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122 ++#define V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX 0x0123 +#define V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS 0x0124 + +enum v4l2_mpeg_video_hevc_decode_mode { @@ -3356,10 +4116,11 @@ index 0000000000..53c0038c79 + __u8 pic_struct; + + /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */ ++ __u32 slice_segment_addr; + __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; + __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; + -+ __u8 padding[5]; ++ __u8 padding; + + /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */ + struct v4l2_hevc_pred_weight_table pred_weight_table; @@ -3384,6 +4145,15 @@ index 0000000000..53c0038c79 + __u64 flags; +}; + ++struct v4l2_ctrl_hevc_scaling_matrix { ++ __u8 scaling_list_4x4[6][16]; ++ __u8 scaling_list_8x8[6][64]; ++ __u8 scaling_list_16x16[6][64]; ++ __u8 scaling_list_32x32[2][64]; ++ __u8 scaling_list_dc_coef_16x16[6]; ++ __u8 scaling_list_dc_coef_32x32[2]; ++}; ++ +/* MPEG-class control IDs specific to the Hantro driver as defined by V4L2 */ +#define V4L2_CID_CODEC_HANTRO_BASE (V4L2_CTRL_CLASS_CODEC | 0x1200) +/* @@ -3399,7 +4169,7 @@ index 0000000000..53c0038c79 + +#endif diff --git a/libavcodec/v4l2_request_hevc.c b/libavcodec/v4l2_request_hevc.c -index d385c2f036..ad555c3bb8 100644 +index 3a9d564ce20b..f645c538c25c 100644 --- a/libavcodec/v4l2_request_hevc.c +++ b/libavcodec/v4l2_request_hevc.c @@ -19,6 +19,7 @@ @@ -3411,10 +4181,10 @@ index d385c2f036..ad555c3bb8 100644 #define MAX_SLICES 16 -From 2cdf67404bf52fb684d1857442331f302d3a35d8 Mon Sep 17 00:00:00 2001 +From afe6727d8c300c77a72549b4e094910f09242a42 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 29 Apr 2019 22:08:59 +0000 -Subject: [PATCH 10/18] HACK: hwcontext_drm: do not require drm device +Subject: [PATCH 11/16] HACK: hwcontext_drm: do not require drm device Signed-off-by: Jonas Karlman --- @@ -3422,7 +4192,7 @@ Signed-off-by: Jonas Karlman 1 file changed, 5 insertions(+) diff --git a/libavutil/hwcontext_drm.c b/libavutil/hwcontext_drm.c -index 7a9fdbd263..6297d1f9b6 100644 +index 7a9fdbd263d4..6297d1f9b613 100644 --- a/libavutil/hwcontext_drm.c +++ b/libavutil/hwcontext_drm.c @@ -53,6 +53,11 @@ static int drm_device_create(AVHWDeviceContext *hwdev, const char *device, @@ -3438,153 +4208,10 @@ index 7a9fdbd263..6297d1f9b6 100644 if (hwctx->fd < 0) return AVERROR(errno); -From 37cbcb6ca05cea82e896e661a185dbf32da0702b Mon Sep 17 00:00:00 2001 +From bcad5ac25923b3d2395edceca821129c00b57b9e Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 11/18] WIP: hevc scaling matrix - -Signed-off-by: Jernej Skrabec ---- - libavcodec/hevc-ctrls.h | 11 +++++++++++ - libavcodec/v4l2_request_hevc.c | 27 +++++++++++++++++++++++++++ - 2 files changed, 38 insertions(+) - -diff --git a/libavcodec/hevc-ctrls.h b/libavcodec/hevc-ctrls.h -index 53c0038c79..0e5c4a2eec 100644 ---- a/libavcodec/hevc-ctrls.h -+++ b/libavcodec/hevc-ctrls.h -@@ -19,6 +19,7 @@ - #define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_CODEC_BASE + 1008) - #define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_CODEC_BASE + 1009) - #define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_CODEC_BASE + 1010) -+#define V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (V4L2_CID_CODEC_BASE + 1011) - #define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS (V4L2_CID_CODEC_BASE + 1012) - #define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_CODEC_BASE + 1015) - #define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_CODEC_BASE + 1016) -@@ -27,6 +28,7 @@ - #define V4L2_CTRL_TYPE_HEVC_SPS 0x0120 - #define V4L2_CTRL_TYPE_HEVC_PPS 0x0121 - #define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122 -+#define V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX 0x0123 - #define V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS 0x0124 - - enum v4l2_mpeg_video_hevc_decode_mode { -@@ -224,6 +226,15 @@ struct v4l2_ctrl_hevc_decode_params { - __u64 flags; - }; - -+struct v4l2_ctrl_hevc_scaling_matrix { -+ __u8 scaling_list_4x4[6][16]; -+ __u8 scaling_list_8x8[6][64]; -+ __u8 scaling_list_16x16[6][64]; -+ __u8 scaling_list_32x32[2][64]; -+ __u8 scaling_list_dc_coef_16x16[6]; -+ __u8 scaling_list_dc_coef_32x32[2]; -+}; -+ - /* MPEG-class control IDs specific to the Hantro driver as defined by V4L2 */ - #define V4L2_CID_CODEC_HANTRO_BASE (V4L2_CTRL_CLASS_CODEC | 0x1200) - /* -diff --git a/libavcodec/v4l2_request_hevc.c b/libavcodec/v4l2_request_hevc.c -index ad555c3bb8..b6c191120e 100644 ---- a/libavcodec/v4l2_request_hevc.c -+++ b/libavcodec/v4l2_request_hevc.c -@@ -27,6 +27,7 @@ typedef struct V4L2RequestControlsHEVC { - struct v4l2_ctrl_hevc_sps sps; - struct v4l2_ctrl_hevc_pps pps; - struct v4l2_ctrl_hevc_decode_params dec_params; -+ struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix; - struct v4l2_ctrl_hevc_slice_params slice_params[MAX_SLICES]; - int first_slice; - int num_slices; //TODO: this should be in control -@@ -318,11 +319,32 @@ static int v4l2_request_hevc_start_frame(AVCodecContext *avctx, - { - const HEVCContext *h = avctx->priv_data; - const HEVCPPS *pps = h->ps.pps; -+ const HEVCSPS *sps = h->ps.sps; -+ const ScalingList *sl = pps->scaling_list_data_present_flag ? -+ &pps->scaling_list : -+ sps->scaling_list_enable_flag ? -+ &sps->scaling_list : NULL; - V4L2RequestControlsHEVC *controls = h->ref->hwaccel_picture_private; - - fill_sps(&controls->sps, h); - fill_dec_params(&controls->dec_params, h); - -+ if (sl) { -+ for (int i = 0; i < 6; i++) { -+ for (int j = 0; j < 16; j++) -+ controls->scaling_matrix.scaling_list_4x4[i][j] = sl->sl[0][i][j]; -+ for (int j = 0; j < 64; j++) { -+ controls->scaling_matrix.scaling_list_8x8[i][j] = sl->sl[1][i][j]; -+ controls->scaling_matrix.scaling_list_16x16[i][j] = sl->sl[2][i][j]; -+ if (i < 2) -+ controls->scaling_matrix.scaling_list_32x32[i][j] = sl->sl[3][i * 3][j]; -+ } -+ controls->scaling_matrix.scaling_list_dc_coef_16x16[i] = sl->sl_dc[0][i]; -+ if (i < 2) -+ controls->scaling_matrix.scaling_list_dc_coef_32x32[i] = sl->sl_dc[1][i * 3]; -+ } -+ } -+ - /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */ - controls->pps = (struct v4l2_ctrl_hevc_pps) { - .num_extra_slice_header_bits = pps->num_extra_slice_header_bits, -@@ -439,6 +461,11 @@ static int v4l2_request_hevc_queue_decode(AVCodecContext *avctx, int last_slice) - .ptr = &controls->dec_params, - .size = sizeof(controls->dec_params), - }, -+ { -+ .id = V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX, -+ .ptr = &controls->scaling_matrix, -+ .size = sizeof(controls->scaling_matrix), -+ }, - { - .id = V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS, - .ptr = &controls->slice_params, - -From ddf97421cbb8583af0f96fa53a0d7f12d9f4ed21 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 12/18] WIP: hevc segment address - -Signed-off-by: Jernej Skrabec ---- - libavcodec/hevc-ctrls.h | 1 + - libavcodec/v4l2_request_hevc.c | 3 +++ - 2 files changed, 4 insertions(+) - -diff --git a/libavcodec/hevc-ctrls.h b/libavcodec/hevc-ctrls.h -index 0e5c4a2eec..42ad0fe81e 100644 ---- a/libavcodec/hevc-ctrls.h -+++ b/libavcodec/hevc-ctrls.h -@@ -198,6 +198,7 @@ struct v4l2_ctrl_hevc_slice_params { - __u8 pic_struct; - - /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */ -+ __u32 slice_segment_addr; - __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; - __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; - -diff --git a/libavcodec/v4l2_request_hevc.c b/libavcodec/v4l2_request_hevc.c -index b6c191120e..f645c538c2 100644 ---- a/libavcodec/v4l2_request_hevc.c -+++ b/libavcodec/v4l2_request_hevc.c -@@ -188,6 +188,9 @@ static void v4l2_request_hevc_fill_slice_params(const HEVCContext *h, - .bit_size = 0, - .data_bit_offset = get_bits_count(&h->HEVClc->gb), - -+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */ -+ .slice_segment_addr = sh->slice_segment_addr, -+ - /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ - .nal_unit_type = h->nal_unit_type, - .nuh_temporal_id_plus1 = h->temporal_id + 1, - -From 1bc89a4553c4c4f7cf4654fe1a7e39de16531126 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 15 Dec 2018 22:32:16 +0100 -Subject: [PATCH 13/18] WIP: hevc entry point offsets +Subject: [PATCH 12/16] WIP: hevc entry point offsets Signed-off-by: Jernej Skrabec --- @@ -3593,14 +4220,14 @@ Signed-off-by: Jernej Skrabec 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/libavcodec/hevc-ctrls.h b/libavcodec/hevc-ctrls.h -index 42ad0fe81e..a249166030 100644 +index ef63bc205756..a24916603017 100644 --- a/libavcodec/hevc-ctrls.h +++ b/libavcodec/hevc-ctrls.h @@ -202,7 +202,9 @@ struct v4l2_ctrl_hevc_slice_params { __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]; -- __u8 padding[5]; +- __u8 padding; + __u32 num_entry_point_offsets; + __u32 entry_point_offset_minus1[256]; + __u8 padding[8]; @@ -3608,7 +4235,7 @@ index 42ad0fe81e..a249166030 100644 /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */ struct v4l2_hevc_pred_weight_table pred_weight_table; diff --git a/libavcodec/v4l2_request_hevc.c b/libavcodec/v4l2_request_hevc.c -index f645c538c2..601202a77d 100644 +index f645c538c25c..601202a77d7a 100644 --- a/libavcodec/v4l2_request_hevc.c +++ b/libavcodec/v4l2_request_hevc.c @@ -256,6 +256,15 @@ static void v4l2_request_hevc_fill_slice_params(const HEVCContext *h, @@ -3628,1024 +4255,10 @@ index f645c538c2..601202a77d 100644 static void fill_sps(struct v4l2_ctrl_hevc_sps *ctrl, const HEVCContext *h) -From 79118d89a57da6fe3fa9b065207e4959c56eff76 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Thu, 12 Dec 2019 16:13:55 +0100 -Subject: [PATCH 14/18] WIP: Add V4L2 request API vp9 hwaccel - -Signed-off-by: Boris Brezillon ---- - configure | 3 + - libavcodec/Makefile | 1 + - libavcodec/hwaccels.h | 1 + - libavcodec/v4l2_request_vp9.c | 352 ++++++++++++++++++++++++++++++++++ - libavcodec/vp9.c | 13 +- - libavcodec/vp9shared.h | 1 + - 6 files changed, 370 insertions(+), 1 deletion(-) - create mode 100644 libavcodec/v4l2_request_vp9.c - -diff --git a/configure b/configure -index 30ee788711..4e3e868d7a 100755 ---- a/configure -+++ b/configure -@@ -3041,6 +3041,8 @@ vp9_dxva2_hwaccel_deps="dxva2 DXVA_PicParams_VP9" - vp9_dxva2_hwaccel_select="vp9_decoder" - vp9_nvdec_hwaccel_deps="nvdec" - vp9_nvdec_hwaccel_select="vp9_decoder" -+vp9_v4l2request_hwaccel_deps="v4l2_request vp9_v4l2_request" -+vp9_v4l2request_hwaccel_select="vp9_decoder" - vp9_vaapi_hwaccel_deps="vaapi VADecPictureParameterBufferVP9_bit_depth" - vp9_vaapi_hwaccel_select="vp9_decoder" - vp9_vdpau_hwaccel_deps="vdpau VdpPictureInfoVP9" -@@ -6640,6 +6642,7 @@ check_cc h264_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_H264_SLICE;" - check_cc hevc_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_HEVC_SLICE;" - check_cc mpeg2_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_MPEG2_SLICE;" - check_cc vp8_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_VP8_FRAME;" -+check_cc vp9_v4l2_request linux/videodev2.h "int i = V4L2_PIX_FMT_VP9_FRAME;" - - check_headers sys/videoio.h - test_code cc sys/videoio.h "struct v4l2_frmsizeenum vfse; vfse.discrete.width = 0;" && enable_sanitized struct_v4l2_frmivalenum_discrete -diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index 0059074530..38edf1cfe5 100644 ---- a/libavcodec/Makefile -+++ b/libavcodec/Makefile -@@ -977,6 +977,7 @@ OBJS-$(CONFIG_VP8_VAAPI_HWACCEL) += vaapi_vp8.o - OBJS-$(CONFIG_VP9_D3D11VA_HWACCEL) += dxva2_vp9.o - OBJS-$(CONFIG_VP9_DXVA2_HWACCEL) += dxva2_vp9.o - OBJS-$(CONFIG_VP9_NVDEC_HWACCEL) += nvdec_vp9.o -+OBJS-$(CONFIG_VP9_V4L2REQUEST_HWACCEL) += v4l2_request_vp9.o - OBJS-$(CONFIG_VP9_VAAPI_HWACCEL) += vaapi_vp9.o - OBJS-$(CONFIG_VP9_VDPAU_HWACCEL) += vdpau_vp9.o - OBJS-$(CONFIG_VP8_QSV_HWACCEL) += qsvdec.o -diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h -index ffb9fa5087..fc5d0b0479 100644 ---- a/libavcodec/hwaccels.h -+++ b/libavcodec/hwaccels.h -@@ -76,6 +76,7 @@ extern const AVHWAccel ff_vp9_d3d11va_hwaccel; - extern const AVHWAccel ff_vp9_d3d11va2_hwaccel; - extern const AVHWAccel ff_vp9_dxva2_hwaccel; - extern const AVHWAccel ff_vp9_nvdec_hwaccel; -+extern const AVHWAccel ff_vp9_v4l2request_hwaccel; - extern const AVHWAccel ff_vp9_vaapi_hwaccel; - extern const AVHWAccel ff_vp9_vdpau_hwaccel; - extern const AVHWAccel ff_wmv3_d3d11va_hwaccel; -diff --git a/libavcodec/v4l2_request_vp9.c b/libavcodec/v4l2_request_vp9.c -new file mode 100644 -index 0000000000..4074c7fe4b ---- /dev/null -+++ b/libavcodec/v4l2_request_vp9.c -@@ -0,0 +1,352 @@ -+/* -+ * This file is part of FFmpeg. -+ * -+ * FFmpeg is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2.1 of the License, or (at your option) any later version. -+ * -+ * FFmpeg is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public -+ * License along with FFmpeg; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+ -+#include "hwconfig.h" -+#include "v4l2_request.h" -+#include "vp9dec.h" -+ -+typedef struct V4L2RequestControlsVP9 { -+ struct v4l2_ctrl_vp9_frame_decode_params decode_params; -+} V4L2RequestControlsVP9; -+ -+static const uint8_t ff_to_v4l2_intramode[] = { -+ [VERT_PRED] = V4L2_VP9_INTRA_PRED_MODE_V, -+ [HOR_PRED] = V4L2_VP9_INTRA_PRED_MODE_H, -+ [DC_PRED] = V4L2_VP9_INTRA_PRED_MODE_DC, -+ [DIAG_DOWN_LEFT_PRED] = V4L2_VP9_INTRA_PRED_MODE_D45, -+ [DIAG_DOWN_RIGHT_PRED] = V4L2_VP9_INTRA_PRED_MODE_D135, -+ [VERT_RIGHT_PRED] = V4L2_VP9_INTRA_PRED_MODE_D117, -+ [HOR_DOWN_PRED] = V4L2_VP9_INTRA_PRED_MODE_D153, -+ [VERT_LEFT_PRED] = V4L2_VP9_INTRA_PRED_MODE_D63, -+ [HOR_UP_PRED] = V4L2_VP9_INTRA_PRED_MODE_D207, -+ [TM_VP8_PRED] = V4L2_VP9_INTRA_PRED_MODE_TM, -+}; -+ -+static int v4l2_request_vp9_set_frame_ctx(AVCodecContext *avctx, unsigned int id) -+{ -+ VP9Context *s = avctx->priv_data; -+ struct v4l2_ctrl_vp9_frame_ctx fctx = {}; -+ struct v4l2_ext_control control[] = { -+ { -+ .id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(id), -+ .ptr = &fctx, -+ .size = sizeof(fctx), -+ }, -+ }; -+ -+ memcpy(fctx.probs.tx8, s->prob_ctx[id].p.tx8p, sizeof(s->prob_ctx[id].p.tx8p)); -+ memcpy(fctx.probs.tx16, s->prob_ctx[id].p.tx16p, sizeof(s->prob_ctx[id].p.tx16p)); -+ memcpy(fctx.probs.tx32, s->prob_ctx[id].p.tx32p, sizeof(s->prob_ctx[id].p.tx32p)); -+ memcpy(fctx.probs.coef, s->prob_ctx[id].coef, sizeof(s->prob_ctx[id].coef)); -+ memcpy(fctx.probs.skip, s->prob_ctx[id].p.skip, sizeof(s->prob_ctx[id].p.skip)); -+ memcpy(fctx.probs.inter_mode, s->prob_ctx[id].p.mv_mode, sizeof(s->prob_ctx[id].p.mv_mode)); -+ memcpy(fctx.probs.interp_filter, s->prob_ctx[id].p.filter, sizeof(s->prob_ctx[id].p.filter)); -+ memcpy(fctx.probs.is_inter, s->prob_ctx[id].p.intra, sizeof(s->prob_ctx[id].p.intra)); -+ memcpy(fctx.probs.comp_mode, s->prob_ctx[id].p.comp, sizeof(s->prob_ctx[id].p.comp)); -+ memcpy(fctx.probs.single_ref, s->prob_ctx[id].p.single_ref, sizeof(s->prob_ctx[id].p.single_ref)); -+ memcpy(fctx.probs.comp_ref, s->prob_ctx[id].p.comp_ref, sizeof(s->prob_ctx[id].p.comp_ref)); -+ memcpy(fctx.probs.y_mode, s->prob_ctx[id].p.y_mode, sizeof(s->prob_ctx[id].p.y_mode)); -+ for (unsigned i = 0; i < 10; i++) -+ memcpy(fctx.probs.uv_mode[ff_to_v4l2_intramode[i]], s->prob_ctx[id].p.uv_mode[i], sizeof(s->prob_ctx[id].p.uv_mode[0])); -+ for (unsigned i = 0; i < 4; i++) -+ memcpy(fctx.probs.partition[i * 4], s->prob_ctx[id].p.partition[3 - i], sizeof(s->prob_ctx[id].p.partition[0])); -+ memcpy(fctx.probs.mv.joint, s->prob_ctx[id].p.mv_joint, sizeof(s->prob_ctx[id].p.mv_joint)); -+ for (unsigned i = 0; i < 2; i++) { -+ fctx.probs.mv.sign[i] = s->prob_ctx[id].p.mv_comp[i].sign; -+ memcpy(fctx.probs.mv.class[i], s->prob_ctx[id].p.mv_comp[i].classes, sizeof(s->prob_ctx[id].p.mv_comp[0].classes)); -+ fctx.probs.mv.class0_bit[i] = s->prob_ctx[id].p.mv_comp[i].class0; -+ memcpy(fctx.probs.mv.bits[i], s->prob_ctx[id].p.mv_comp[i].bits, sizeof(s->prob_ctx[id].p.mv_comp[0].bits)); -+ memcpy(fctx.probs.mv.class0_fr[i], s->prob_ctx[id].p.mv_comp[i].class0_fp, sizeof(s->prob_ctx[id].p.mv_comp[0].class0_fp)); -+ memcpy(fctx.probs.mv.fr[i], s->prob_ctx[id].p.mv_comp[i].fp, sizeof(s->prob_ctx[id].p.mv_comp[0].fp)); -+ fctx.probs.mv.class0_hp[i] = s->prob_ctx[id].p.mv_comp[i].class0_hp; -+ fctx.probs.mv.hp[i] = s->prob_ctx[id].p.mv_comp[i].hp; -+ } -+ -+ return ff_v4l2_request_set_controls(avctx, control, FF_ARRAY_ELEMS(control)); -+} -+ -+static int v4l2_request_vp9_get_frame_ctx(AVCodecContext *avctx, unsigned int id) -+{ -+ VP9Context *s = avctx->priv_data; -+ struct v4l2_ctrl_vp9_frame_ctx fctx = {}; -+ struct v4l2_ext_control control[] = { -+ { -+ .id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(id), -+ .ptr = &fctx, -+ .size = sizeof(fctx), -+ }, -+ }; -+ -+ int ret = ff_v4l2_request_get_controls(avctx, control, FF_ARRAY_ELEMS(control)); -+ if (ret) -+ return ret; -+ -+ memcpy(s->prob_ctx[id].p.tx8p, fctx.probs.tx8, sizeof(s->prob_ctx[id].p.tx8p)); -+ memcpy(s->prob_ctx[id].p.tx16p, fctx.probs.tx16, sizeof(s->prob_ctx[id].p.tx16p)); -+ memcpy(s->prob_ctx[id].p.tx32p, fctx.probs.tx32, sizeof(s->prob_ctx[id].p.tx32p)); -+ memcpy(s->prob_ctx[id].coef, fctx.probs.coef, sizeof(s->prob_ctx[id].coef)); -+ memcpy(s->prob_ctx[id].p.skip, fctx.probs.skip, sizeof(s->prob_ctx[id].p.skip)); -+ memcpy(s->prob_ctx[id].p.mv_mode, fctx.probs.inter_mode, sizeof(s->prob_ctx[id].p.mv_mode)); -+ memcpy(s->prob_ctx[id].p.filter, fctx.probs.interp_filter, sizeof(s->prob_ctx[id].p.filter)); -+ memcpy(s->prob_ctx[id].p.intra, fctx.probs.is_inter, sizeof(s->prob_ctx[id].p.intra)); -+ memcpy(s->prob_ctx[id].p.comp, fctx.probs.comp_mode, sizeof(s->prob_ctx[id].p.comp)); -+ memcpy(s->prob_ctx[id].p.single_ref, fctx.probs.single_ref, sizeof(s->prob_ctx[id].p.single_ref)); -+ memcpy(s->prob_ctx[id].p.comp_ref, fctx.probs.comp_ref, sizeof(s->prob_ctx[id].p.comp_ref)); -+ memcpy(s->prob_ctx[id].p.y_mode, fctx.probs.y_mode, sizeof(s->prob_ctx[id].p.y_mode)); -+ for (unsigned i = 0; i < 10; i++) -+ memcpy(s->prob_ctx[id].p.uv_mode[i], fctx.probs.uv_mode[ff_to_v4l2_intramode[i]], sizeof(s->prob_ctx[id].p.uv_mode[0])); -+ for (unsigned i = 0; i < 4; i++) -+ memcpy(s->prob_ctx[id].p.partition[3 - i], fctx.probs.partition[i * 4], sizeof(s->prob_ctx[id].p.partition[0])); -+ memcpy(s->prob_ctx[id].p.mv_joint, fctx.probs.mv.joint, sizeof(s->prob_ctx[id].p.mv_joint)); -+ for (unsigned i = 0; i < 2; i++) { -+ s->prob_ctx[id].p.mv_comp[i].sign = fctx.probs.mv.sign[i]; -+ memcpy(s->prob_ctx[id].p.mv_comp[i].classes, fctx.probs.mv.class[i], sizeof(s->prob_ctx[id].p.mv_comp[0].classes)); -+ s->prob_ctx[id].p.mv_comp[i].class0 = fctx.probs.mv.class0_bit[i]; -+ memcpy(s->prob_ctx[id].p.mv_comp[i].bits, fctx.probs.mv.bits[i], sizeof(s->prob_ctx[id].p.mv_comp[0].bits)); -+ memcpy(s->prob_ctx[id].p.mv_comp[i].class0_fp, fctx.probs.mv.class0_fr[i], sizeof(s->prob_ctx[id].p.mv_comp[0].class0_fp)); -+ memcpy(s->prob_ctx[id].p.mv_comp[i].fp, fctx.probs.mv.fr[i], sizeof(s->prob_ctx[id].p.mv_comp[0].fp)); -+ s->prob_ctx[id].p.mv_comp[i].class0_hp = fctx.probs.mv.class0_hp[i]; -+ s->prob_ctx[id].p.mv_comp[i].hp = fctx.probs.mv.hp[i]; -+ } -+ -+ return 0; -+} -+ -+static int v4l2_request_vp9_start_frame(AVCodecContext *avctx, -+ av_unused const uint8_t *buffer, -+ av_unused uint32_t size) -+{ -+ const VP9Context *s = avctx->priv_data; -+ const VP9Frame *f = &s->s.frames[CUR_FRAME]; -+ V4L2RequestControlsVP9 *controls = f->hwaccel_picture_private; -+ struct v4l2_ctrl_vp9_frame_decode_params *dec_params = &controls->decode_params; -+ int ret; -+ -+ if (s->s.h.keyframe || s->s.h.errorres || (s->s.h.intraonly && s->s.h.resetctx == 3)) { -+ for (unsigned i = 0; i < 4; i++) { -+ ret = v4l2_request_vp9_set_frame_ctx(avctx, i); -+ if (ret) -+ return ret; -+ } -+ } else if (s->s.h.intraonly && s->s.h.resetctx == 2) { -+ ret = v4l2_request_vp9_set_frame_ctx(avctx, s->s.h.framectxid); -+ if (ret) -+ return ret; -+ } -+ -+ if (s->s.h.keyframe) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_KEY_FRAME; -+ if (!s->s.h.invisible) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_SHOW_FRAME; -+ if (s->s.h.errorres) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT; -+ if (s->s.h.intraonly) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_INTRA_ONLY; -+ if (!s->s.h.keyframe && s->s.h.highprecisionmvs) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV; -+ if (s->s.h.refreshctx) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX; -+ if (s->s.h.parallelmode) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE; -+ if (s->ss_h) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING; -+ if (s->ss_v) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING; -+ if (avctx->color_range == AVCOL_RANGE_JPEG) -+ dec_params->flags |= V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING; -+ -+ dec_params->compressed_header_size = s->s.h.compressed_header_size; -+ dec_params->uncompressed_header_size = s->s.h.uncompressed_header_size; -+ dec_params->profile = s->s.h.profile; -+ dec_params->reset_frame_context = s->s.h.resetctx > 0 ? s->s.h.resetctx - 1 : 0; -+ dec_params->frame_context_idx = s->s.h.framectxid; -+ dec_params->bit_depth = s->s.h.bpp; -+ -+ dec_params->interpolation_filter = s->s.h.filtermode ^ (s->s.h.filtermode <= 1); -+ dec_params->tile_cols_log2 = s->s.h.tiling.log2_tile_cols; -+ dec_params->tile_rows_log2 = s->s.h.tiling.log2_tile_rows; -+ dec_params->tx_mode = s->s.h.txfmmode; -+ dec_params->reference_mode = s->s.h.comppredmode; -+ dec_params->frame_width_minus_1 = s->w - 1; -+ dec_params->frame_height_minus_1 = s->h - 1; -+ //dec_params->render_width_minus_1 = avctx->width - 1; -+ //dec_params->render_height_minus_1 = avctx->height - 1; -+ -+ for (unsigned i = 0; i < 3; i++) { -+ const ThreadFrame *ref = &s->s.refs[s->s.h.refidx[i]]; -+ if (ref->f && ref->f->buf[0]) -+ dec_params->refs[i] = ff_v4l2_request_get_capture_timestamp(ref->f); -+ } -+ -+ if (s->s.h.lf_delta.enabled) -+ dec_params->lf.flags |= V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED; -+ if (s->s.h.lf_delta.updated) -+ dec_params->lf.flags |= V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE; -+ -+ dec_params->lf.level = s->s.h.filter.level; -+ dec_params->lf.sharpness = s->s.h.filter.sharpness; -+ for (unsigned i = 0; i < 4; i++) -+ dec_params->lf.ref_deltas[i] = s->s.h.lf_delta.ref[i]; -+ for (unsigned i = 0; i < 2; i++) -+ dec_params->lf.mode_deltas[i] = s->s.h.lf_delta.mode[i]; -+ for (unsigned i = 0; i < 8; i++) { -+ for (unsigned j = 0; j < 4; j++) -+ memcpy(dec_params->lf.level_lookup[i][j], s->s.h.segmentation.feat[i].lflvl[j], sizeof(dec_params->lf.level_lookup[0][0])); -+ } -+ -+ dec_params->quant.base_q_idx = s->s.h.yac_qi; -+ dec_params->quant.delta_q_y_dc = s->s.h.ydc_qdelta; -+ dec_params->quant.delta_q_uv_dc = s->s.h.uvdc_qdelta; -+ dec_params->quant.delta_q_uv_ac = s->s.h.uvac_qdelta; -+ -+ if (s->s.h.segmentation.enabled) -+ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_ENABLED; -+ if (s->s.h.segmentation.update_map) -+ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP; -+ if (s->s.h.segmentation.temporal) -+ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE; -+ if (s->s.h.segmentation.update_data) -+ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA; -+ if (s->s.h.segmentation.absolute_vals) -+ dec_params->seg.flags |= V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE; -+ -+ for (unsigned i = 0; i < 7; i++) -+ dec_params->seg.tree_probs[i] = s->s.h.segmentation.prob[i]; -+ -+ if (s->s.h.segmentation.temporal) { -+ for (unsigned i = 0; i < 3; i++) -+ dec_params->seg.pred_probs[i] = s->s.h.segmentation.pred_prob[i]; -+ } else { -+ memset(dec_params->seg.pred_probs, 255, sizeof(dec_params->seg.pred_probs)); -+ } -+ -+ for (unsigned i = 0; i < 8; i++) { -+ if (s->s.h.segmentation.feat[i].q_enabled) { -+ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEGMENT_FEATURE_QP_DELTA; -+ dec_params->seg.feature_data[i][V4L2_VP9_SEGMENT_FEATURE_QP_DELTA] = s->s.h.segmentation.feat[i].q_val; -+ } -+ -+ if (s->s.h.segmentation.feat[i].lf_enabled) { -+ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEGMENT_FEATURE_LF; -+ dec_params->seg.feature_data[i][V4L2_VP9_SEGMENT_FEATURE_LF] = s->s.h.segmentation.feat[i].lf_val; -+ } -+ -+ if (s->s.h.segmentation.feat[i].ref_enabled) { -+ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEGMENT_FEATURE_REF_FRAME; -+ dec_params->seg.feature_data[i][V4L2_VP9_SEGMENT_FEATURE_REF_FRAME] = s->s.h.segmentation.feat[i].ref_val; -+ } -+ -+ if (s->s.h.segmentation.feat[i].skip_enabled) -+ dec_params->seg.feature_enabled[i] |= 1 << V4L2_VP9_SEGMENT_FEATURE_SKIP; -+ } -+ -+ memcpy(dec_params->probs.tx8, s->prob.p.tx8p, sizeof(s->prob.p.tx8p)); -+ memcpy(dec_params->probs.tx16, s->prob.p.tx16p, sizeof(s->prob.p.tx16p)); -+ memcpy(dec_params->probs.tx32, s->prob.p.tx32p, sizeof(s->prob.p.tx32p)); -+ for (unsigned i = 0; i < 4; i++) { -+ for (unsigned j = 0; j < 2; j++) { -+ for (unsigned k = 0; k < 2; k++) { -+ for (unsigned l = 0; l < 6; l++) { -+ for (unsigned m = 0; m < 6; m++) { -+ memcpy(dec_params->probs.coef[i][j][k][l][m], s->prob.coef[i][j][k][l][m], sizeof(dec_params->probs.coef[0][0][0][0][0])); -+ } -+ } -+ } -+ } -+ } -+ memcpy(dec_params->probs.skip, s->prob.p.skip, sizeof(s->prob.p.skip)); -+ memcpy(dec_params->probs.inter_mode, s->prob.p.mv_mode, sizeof(s->prob.p.mv_mode)); -+ memcpy(dec_params->probs.interp_filter, s->prob.p.filter, sizeof(s->prob.p.filter)); -+ memcpy(dec_params->probs.is_inter, s->prob.p.intra, sizeof(s->prob.p.intra)); -+ memcpy(dec_params->probs.comp_mode, s->prob.p.comp, sizeof(s->prob.p.comp)); -+ memcpy(dec_params->probs.single_ref, s->prob.p.single_ref, sizeof(s->prob.p.single_ref)); -+ memcpy(dec_params->probs.comp_ref, s->prob.p.comp_ref, sizeof(s->prob.p.comp_ref)); -+ memcpy(dec_params->probs.y_mode, s->prob.p.y_mode, sizeof(s->prob.p.y_mode)); -+ for (unsigned i = 0; i < 10; i++) -+ memcpy(dec_params->probs.uv_mode[ff_to_v4l2_intramode[i]], s->prob.p.uv_mode[i], sizeof(s->prob.p.uv_mode[0])); -+ for (unsigned i = 0; i < 4; i++) -+ memcpy(dec_params->probs.partition[i * 4], s->prob.p.partition[3 - i], sizeof(s->prob.p.partition[0])); -+ memcpy(dec_params->probs.mv.joint, s->prob.p.mv_joint, sizeof(s->prob.p.mv_joint)); -+ for (unsigned i = 0; i < 2; i++) { -+ dec_params->probs.mv.sign[i] = s->prob.p.mv_comp[i].sign; -+ memcpy(dec_params->probs.mv.class[i], s->prob.p.mv_comp[i].classes, sizeof(s->prob.p.mv_comp[0].classes)); -+ dec_params->probs.mv.class0_bit[i] = s->prob.p.mv_comp[i].class0; -+ memcpy(dec_params->probs.mv.bits[i], s->prob.p.mv_comp[i].bits, sizeof(s->prob.p.mv_comp[0].bits)); -+ memcpy(dec_params->probs.mv.class0_fr[i], s->prob.p.mv_comp[i].class0_fp, sizeof(s->prob.p.mv_comp[0].class0_fp)); -+ memcpy(dec_params->probs.mv.fr[i], s->prob.p.mv_comp[i].fp, sizeof(s->prob.p.mv_comp[0].fp)); -+ dec_params->probs.mv.class0_hp[i] = s->prob.p.mv_comp[i].class0_hp; -+ dec_params->probs.mv.hp[i] = s->prob.p.mv_comp[i].hp; -+ } -+ -+ return ff_v4l2_request_reset_frame(avctx, f->tf.f); -+} -+ -+static int v4l2_request_vp9_decode_slice(AVCodecContext *avctx, const uint8_t *buffer, uint32_t size) -+{ -+ const VP9Context *s = avctx->priv_data; -+ const VP9Frame *f = &s->s.frames[CUR_FRAME]; -+ -+ return ff_v4l2_request_append_output_buffer(avctx, f->tf.f, buffer, size); -+} -+ -+static int v4l2_request_vp9_end_frame(AVCodecContext *avctx) -+{ -+ const VP9Context *s = avctx->priv_data; -+ const VP9Frame *f = &s->s.frames[CUR_FRAME]; -+ V4L2RequestControlsVP9 *controls = f->hwaccel_picture_private; -+ int ret; -+ -+ struct v4l2_ext_control control[] = { -+ { -+ .id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS, -+ .ptr = &controls->decode_params, -+ .size = sizeof(controls->decode_params), -+ }, -+ }; -+ -+ ret = ff_v4l2_request_decode_frame(avctx, f->tf.f, control, FF_ARRAY_ELEMS(control)); -+ if (ret) -+ return ret; -+ -+ if (!s->s.h.refreshctx) -+ return 0; -+ -+ return v4l2_request_vp9_get_frame_ctx(avctx, s->s.h.framectxid); -+} -+ -+static int v4l2_request_vp9_init(AVCodecContext *avctx) -+{ -+ // TODO: check V4L2_CID_MPEG_VIDEO_VP9_PROFILE -+ return ff_v4l2_request_init(avctx, V4L2_PIX_FMT_VP9_FRAME, 3 * 1024 * 1024, NULL, 0); -+} -+ -+const AVHWAccel ff_vp9_v4l2request_hwaccel = { -+ .name = "vp9_v4l2request", -+ .type = AVMEDIA_TYPE_VIDEO, -+ .id = AV_CODEC_ID_VP9, -+ .pix_fmt = AV_PIX_FMT_DRM_PRIME, -+ .start_frame = v4l2_request_vp9_start_frame, -+ .decode_slice = v4l2_request_vp9_decode_slice, -+ .end_frame = v4l2_request_vp9_end_frame, -+ .frame_priv_data_size = sizeof(V4L2RequestControlsVP9), -+ .init = v4l2_request_vp9_init, -+ .uninit = ff_v4l2_request_uninit, -+ .priv_data_size = sizeof(V4L2RequestContext), -+ .frame_params = ff_v4l2_request_frame_params, -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, -+}; -diff --git a/libavcodec/vp9.c b/libavcodec/vp9.c -index 4659f94ee8..47340c3875 100644 ---- a/libavcodec/vp9.c -+++ b/libavcodec/vp9.c -@@ -191,6 +191,7 @@ static int update_size(AVCodecContext *avctx, int w, int h) - #define HWACCEL_MAX (CONFIG_VP9_DXVA2_HWACCEL + \ - CONFIG_VP9_D3D11VA_HWACCEL * 2 + \ - CONFIG_VP9_NVDEC_HWACCEL + \ -+ CONFIG_VP9_V4L2REQUEST_HWACCEL + \ - CONFIG_VP9_VAAPI_HWACCEL + \ - CONFIG_VP9_VDPAU_HWACCEL) - enum AVPixelFormat pix_fmts[HWACCEL_MAX + 2], *fmtp = pix_fmts; -@@ -223,6 +224,9 @@ static int update_size(AVCodecContext *avctx, int w, int h) - #endif - #if CONFIG_VP9_VDPAU_HWACCEL - *fmtp++ = AV_PIX_FMT_VDPAU; -+#endif -+#if CONFIG_VP9_V4L2REQUEST_HWACCEL -+ *fmtp++ = AV_PIX_FMT_DRM_PRIME; - #endif - break; - case AV_PIX_FMT_YUV420P12: -@@ -234,6 +238,9 @@ static int update_size(AVCodecContext *avctx, int w, int h) - #endif - #if CONFIG_VP9_VDPAU_HWACCEL - *fmtp++ = AV_PIX_FMT_VDPAU; -+#endif -+#if CONFIG_VP9_V4L2REQUEST_HWACCEL -+ *fmtp++ = AV_PIX_FMT_DRM_PRIME; - #endif - break; - } -@@ -703,7 +710,8 @@ static int decode_frame_header(AVCodecContext *avctx, - get_bits(&s->gb, 8) : 255; - } - -- if (get_bits1(&s->gb)) { -+ s->s.h.segmentation.update_data = get_bits1(&s->gb); -+ if (s->s.h.segmentation.update_data) { - s->s.h.segmentation.absolute_vals = get_bits1(&s->gb); - for (i = 0; i < 8; i++) { - if ((s->s.h.segmentation.feat[i].q_enabled = get_bits1(&s->gb))) -@@ -1912,6 +1920,9 @@ AVCodec ff_vp9_decoder = { - #endif - #if CONFIG_VP9_VDPAU_HWACCEL - HWACCEL_VDPAU(vp9), -+#endif -+#if CONFIG_VP9_V4L2REQUEST_HWACCEL -+ HWACCEL_V4L2REQUEST(vp9), - #endif - NULL - }, -diff --git a/libavcodec/vp9shared.h b/libavcodec/vp9shared.h -index 54726df742..fee3568736 100644 ---- a/libavcodec/vp9shared.h -+++ b/libavcodec/vp9shared.h -@@ -131,6 +131,7 @@ typedef struct VP9BitstreamHeader { - uint8_t temporal; - uint8_t absolute_vals; - uint8_t update_map; -+ uint8_t update_data; - uint8_t prob[7]; - uint8_t pred_prob[3]; - struct { - -From 189a3278e21e4d6ff06d1f1fe4c7430357499471 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Thu, 12 Dec 2019 16:13:55 +0100 -Subject: [PATCH 15/18] WIP: Add and use vp9 private linux header - -Signed-off-by: Boris Brezillon ---- - configure | 2 +- - libavcodec/v4l2_request_vp9.c | 1 + - libavcodec/vp9-ctrls.h | 485 ++++++++++++++++++++++++++++++++++ - 3 files changed, 487 insertions(+), 1 deletion(-) - create mode 100644 libavcodec/vp9-ctrls.h - -diff --git a/configure b/configure -index 4e3e868d7a..1c1929d2c2 100755 ---- a/configure -+++ b/configure -@@ -3041,7 +3041,7 @@ vp9_dxva2_hwaccel_deps="dxva2 DXVA_PicParams_VP9" - vp9_dxva2_hwaccel_select="vp9_decoder" - vp9_nvdec_hwaccel_deps="nvdec" - vp9_nvdec_hwaccel_select="vp9_decoder" --vp9_v4l2request_hwaccel_deps="v4l2_request vp9_v4l2_request" -+vp9_v4l2request_hwaccel_deps="v4l2_request" - vp9_v4l2request_hwaccel_select="vp9_decoder" - vp9_vaapi_hwaccel_deps="vaapi VADecPictureParameterBufferVP9_bit_depth" - vp9_vaapi_hwaccel_select="vp9_decoder" -diff --git a/libavcodec/v4l2_request_vp9.c b/libavcodec/v4l2_request_vp9.c -index 4074c7fe4b..2e10b7ad1a 100644 ---- a/libavcodec/v4l2_request_vp9.c -+++ b/libavcodec/v4l2_request_vp9.c -@@ -19,6 +19,7 @@ - #include "hwconfig.h" - #include "v4l2_request.h" - #include "vp9dec.h" -+#include "vp9-ctrls.h" - - typedef struct V4L2RequestControlsVP9 { - struct v4l2_ctrl_vp9_frame_decode_params decode_params; -diff --git a/libavcodec/vp9-ctrls.h b/libavcodec/vp9-ctrls.h -new file mode 100644 -index 0000000000..0cdea8a18b ---- /dev/null -+++ b/libavcodec/vp9-ctrls.h -@@ -0,0 +1,485 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * These are the VP9 state controls for use with stateless VP9 -+ * codec drivers. -+ * -+ * It turns out that these structs are not stable yet and will undergo -+ * more changes. So keep them private until they are stable and ready to -+ * become part of the official public API. -+ */ -+ -+#ifndef _VP9_CTRLS_H_ -+#define _VP9_CTRLS_H_ -+ -+#include -+ -+#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') -+ -+#define V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(i) (V4L2_CID_MPEG_BASE + 4000 + (i)) -+#define V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS (V4L2_CID_MPEG_BASE + 4004) -+#define V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT 0x400 -+#define V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS 0x404 -+ -+/** -+ * enum v4l2_vp9_loop_filter_flags - VP9 loop filter flags -+ * -+ * @V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED: the filter level depends on -+ * the mode and reference frame used -+ * to predict a block -+ * @V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE: the bitstream contains additional -+ * syntax elements that specify which -+ * mode and reference frame deltas -+ * are to be updated -+ * -+ * Those are the flags you should pass to &v4l2_vp9_loop_filter.flags. See -+ * section '7.2.8 Loop filter semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_loop_filter_flags { -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED = 1 << 0, -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE = 1 << 1, -+}; -+ -+/** -+ * struct v4l2_vp9_loop_filter - VP9 loop filter parameters -+ * -+ * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags -+ * @level: indicates the loop filter strength -+ * @sharpness: indicates the sharpness level -+ * @ref_deltas: contains the adjustment needed for the filter level based on -+ * the chosen reference frame -+ * @mode_deltas: contains the adjustment needed for the filter level based on -+ * the chosen mode -+ * @level_lookup: level lookup table -+ * -+ * This structure contains all loop filter related parameters. See sections -+ * '7.2.8 Loop filter semantics' and '8.8.1 Loop filter frame init process' -+ * of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_loop_filter { -+ __u8 flags; -+ __u8 level; -+ __u8 sharpness; -+ __s8 ref_deltas[4]; -+ __s8 mode_deltas[2]; -+ __u8 level_lookup[8][4][2]; -+}; -+ -+/** -+ * struct v4l2_vp9_quantization - VP9 quantization parameters -+ * -+ * @base_q_idx: indicates the base frame qindex -+ * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx -+ * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx -+ * @delta_q_uv_ac indicates the UV AC quantizer relative to base_q_idx -+ * @padding: padding bytes to align things on 64 bits. Must be set to 0 -+ * -+ * Encodes the quantization parameters. See section '7.2.9 Quantization params -+ * syntax' of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_quantization { -+ __u8 base_q_idx; -+ __s8 delta_q_y_dc; -+ __s8 delta_q_uv_dc; -+ __s8 delta_q_uv_ac; -+ __u8 padding[4]; -+}; -+ -+/** -+ * enum v4l2_vp9_segmentation_flags - VP9 segmentation flags -+ * -+ * @V4L2_VP9_SEGMENTATION_FLAG_ENABLED: indicates that this frame makes use of -+ * the segmentation tool -+ * @V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP: indicates that the segmentation map -+ * should be updated during the -+ * decoding of this frame -+ * @V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE: indicates that the updates to -+ * the segmentation map are coded -+ * relative to the existing -+ * segmentation map -+ * @V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA: indicates that new parameters are -+ * about to be specified for each -+ * segment -+ * @V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE: indicates that the -+ * segmentation parameters -+ * represent the actual values -+ * to be used -+ * -+ * Those are the flags you should pass to &v4l2_vp9_segmentation.flags. See -+ * section '7.2.10 Segmentation params syntax' of the VP9 specification for -+ * more details. -+ */ -+enum v4l2_vp9_segmentation_flags { -+ V4L2_VP9_SEGMENTATION_FLAG_ENABLED = 1 << 0, -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP = 1 << 1, -+ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE = 1 << 2, -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA = 1 << 3, -+ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE = 1 << 4, -+}; -+ -+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) -+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf -+ -+/** -+ * enum v4l2_vp9_segment_feature - VP9 segment feature IDs -+ * -+ * @V4L2_VP9_SEGMENT_FEATURE_QP_DELTA: QP delta segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_LF: loop filter segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_REF_FRAME: reference frame segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_SKIP: skip segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_CNT: number of segment features -+ * -+ * Segment feature IDs. See section '7.2.10 Segmentation params syntax' of the -+ * VP9 specification for more details. -+ */ -+enum v4l2_vp9_segment_feature { -+ V4L2_VP9_SEGMENT_FEATURE_QP_DELTA, -+ V4L2_VP9_SEGMENT_FEATURE_LF, -+ V4L2_VP9_SEGMENT_FEATURE_REF_FRAME, -+ V4L2_VP9_SEGMENT_FEATURE_SKIP, -+ V4L2_VP9_SEGMENT_FEATURE_CNT, -+}; -+ -+/** -+ * struct v4l2_vp9_segmentation - VP9 segmentation parameters -+ * -+ * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_* flags -+ * @tree_probs: specifies the probability values to be used when -+ * decoding a Segment-ID. See '5.15. Segmentation map' -+ * section of the VP9 specification for more details. -+ * @pred_prob: specifies the probability values to be used when decoding a -+ * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' -+ * section of :ref:`vp9` for more details.. -+ * @padding: padding used to make things aligned on 64 bits. Shall be zero -+ * filled -+ * @feature_enabled: bitmask defining which features are enabled in each -+ * segment -+ * @feature_data: data attached to each feature. Data entry is only valid if -+ * the feature is enabled -+ * -+ * Encodes the quantization parameters. See section '7.2.10 Segmentation -+ * params syntax' of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_segmentation { -+ __u8 flags; -+ __u8 tree_probs[7]; -+ __u8 pred_probs[3]; -+ __u8 padding[5]; -+ __u8 feature_enabled[8]; -+ __s16 feature_data[8][4]; -+}; -+ -+/** -+ * enum v4l2_vp9_intra_prediction_mode - VP9 Intra prediction modes -+ * -+ * @V4L2_VP9_INTRA_PRED_DC: DC intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_V: vertical intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_H: horizontal intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D45: D45 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D135: D135 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D117: D117 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D153: D153 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D207: D207 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D63: D63 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_TM: True Motion intra prediction -+ * -+ * See section '7.4.5 Intra frame mode info semantics' for more details. -+ */ -+enum v4l2_vp9_intra_prediction_mode { -+ V4L2_VP9_INTRA_PRED_MODE_DC, -+ V4L2_VP9_INTRA_PRED_MODE_V, -+ V4L2_VP9_INTRA_PRED_MODE_H, -+ V4L2_VP9_INTRA_PRED_MODE_D45, -+ V4L2_VP9_INTRA_PRED_MODE_D135, -+ V4L2_VP9_INTRA_PRED_MODE_D117, -+ V4L2_VP9_INTRA_PRED_MODE_D153, -+ V4L2_VP9_INTRA_PRED_MODE_D207, -+ V4L2_VP9_INTRA_PRED_MODE_D63, -+ V4L2_VP9_INTRA_PRED_MODE_TM, -+}; -+ -+/** -+ * struct v4l2_vp9_mv_probabilities - VP9 Motion vector probabilities -+ * @joint: motion vector joint probabilities -+ * @sign: motion vector sign probabilities -+ * @class: motion vector class probabilities -+ * @class0_bit: motion vector class0 bit probabilities -+ * @bits: motion vector bits probabilities -+ * @class0_fr: motion vector class0 fractional bit probabilities -+ * @fr: motion vector fractional bit probabilities -+ * @class0_hp: motion vector class0 high precision fractional bit probabilities -+ * @hp: motion vector high precision fractional bit probabilities -+ */ -+struct v4l2_vp9_mv_probabilities { -+ __u8 joint[3]; -+ __u8 sign[2]; -+ __u8 class[2][10]; -+ __u8 class0_bit[2]; -+ __u8 bits[2][10]; -+ __u8 class0_fr[2][2][3]; -+ __u8 fr[2][3]; -+ __u8 class0_hp[2]; -+ __u8 hp[2]; -+}; -+ -+/** -+ * struct v4l2_vp9_probabilities - VP9 Probabilities -+ * -+ * @tx8: TX 8x8 probabilities -+ * @tx16: TX 16x16 probabilities -+ * @tx32: TX 32x32 probabilities -+ * @coef: coefficient probabilities -+ * @skip: skip probabilities -+ * @inter_mode: inter mode probabilities -+ * @interp_filter: interpolation filter probabilities -+ * @is_inter: is inter-block probabilities -+ * @comp_mode: compound prediction mode probabilities -+ * @single_ref: single ref probabilities -+ * @comp_ref: compound ref probabilities -+ * @y_mode: Y prediction mode probabilities -+ * @uv_mode: UV prediction mode probabilities -+ * @partition: partition probabilities -+ * @mv: motion vector probabilities -+ * -+ * Structure containing most VP9 probabilities. See the VP9 specification -+ * for more details. -+ */ -+struct v4l2_vp9_probabilities { -+ __u8 tx8[2][1]; -+ __u8 tx16[2][2]; -+ __u8 tx32[2][3]; -+ __u8 coef[4][2][2][6][6][3]; -+ __u8 skip[3]; -+ __u8 inter_mode[7][3]; -+ __u8 interp_filter[4][2]; -+ __u8 is_inter[4]; -+ __u8 comp_mode[5]; -+ __u8 single_ref[5][2]; -+ __u8 comp_ref[5]; -+ __u8 y_mode[4][9]; -+ __u8 uv_mode[10][9]; -+ __u8 partition[16][3]; -+ -+ struct v4l2_vp9_mv_probabilities mv; -+}; -+ -+/** -+ * enum v4l2_vp9_reset_frame_context - Valid values for -+ * &v4l2_ctrl_vp9_frame_decode_params->reset_frame_context -+ * -+ * @V4L2_VP9_RESET_FRAME_CTX_NONE: don't reset any frame context -+ * @V4L2_VP9_RESET_FRAME_CTX_SPEC: reset the frame context pointed by -+ * &v4l2_ctrl_vp9_frame_decode_params.frame_context_idx -+ * @V4L2_VP9_RESET_FRAME_CTX_ALL: reset all frame contexts -+ * -+ * See section '7.2 Uncompressed header semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_reset_frame_context { -+ V4L2_VP9_RESET_FRAME_CTX_NONE, -+ V4L2_VP9_RESET_FRAME_CTX_SPEC, -+ V4L2_VP9_RESET_FRAME_CTX_ALL, -+}; -+ -+/** -+ * enum v4l2_vp9_interpolation_filter - VP9 interpolation filter types -+ * -+ * @V4L2_VP9_INTERP_FILTER_8TAP: height tap filter -+ * @V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH: height tap smooth filter -+ * @V4L2_VP9_INTERP_FILTER_8TAP_SHARP: height tap sharp filter -+ * @V4L2_VP9_INTERP_FILTER_BILINEAR: bilinear filter -+ * @V4L2_VP9_INTERP_FILTER_SWITCHABLE: filter selection is signaled at the -+ * block level -+ * -+ * See section '7.2.7 Interpolation filter semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_interpolation_filter { -+ V4L2_VP9_INTERP_FILTER_8TAP, -+ V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH, -+ V4L2_VP9_INTERP_FILTER_8TAP_SHARP, -+ V4L2_VP9_INTERP_FILTER_BILINEAR, -+ V4L2_VP9_INTERP_FILTER_SWITCHABLE, -+}; -+ -+/** -+ * enum v4l2_vp9_reference_mode - VP9 reference modes -+ * -+ * @V4L2_VP9_REF_MODE_SINGLE: indicates that all the inter blocks use only a -+ * single reference frame to generate motion -+ * compensated prediction -+ * @V4L2_VP9_REF_MODE_COMPOUND: requires all the inter blocks to use compound -+ * mode. Single reference frame prediction is not -+ * allowed -+ * @V4L2_VP9_REF_MODE_SELECT: allows each individual inter block to select -+ * between single and compound prediction modes -+ * -+ * See section '7.3.6 Frame reference mode semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_reference_mode { -+ V4L2_VP9_REF_MODE_SINGLE, -+ V4L2_VP9_REF_MODE_COMPOUND, -+ V4L2_VP9_REF_MODE_SELECT, -+}; -+ -+/** -+ * enum v4l2_vp9_tx_mode - VP9 TX modes -+ * -+ * @V4L2_VP9_TX_MODE_ONLY_4X4: transform size is 4x4 -+ * @V4L2_VP9_TX_MODE_ALLOW_8X8: transform size can be up to 8x8 -+ * @V4L2_VP9_TX_MODE_ALLOW_16X16: transform size can be up to 16x16 -+ * @V4L2_VP9_TX_MODE_ALLOW_32X32: transform size can be up to 32x32 -+ * @V4L2_VP9_TX_MODE_SELECT: bitstream contains transform size for each block -+ * -+ * See section '7.3.1 Tx mode semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_tx_mode { -+ V4L2_VP9_TX_MODE_ONLY_4X4, -+ V4L2_VP9_TX_MODE_ALLOW_8X8, -+ V4L2_VP9_TX_MODE_ALLOW_16X16, -+ V4L2_VP9_TX_MODE_ALLOW_32X32, -+ V4L2_VP9_TX_MODE_SELECT, -+}; -+ -+/** -+ * enum v4l2_vp9_ref_id - VP9 Reference frame IDs -+ * -+ * @V4L2_REF_ID_LAST: last reference frame -+ * @V4L2_REF_ID_GOLDEN: golden reference frame -+ * @V4L2_REF_ID_ALTREF: alternative reference frame -+ * @V4L2_REF_ID_CNT: number of reference frames -+ * -+ * See section '7.4.12 Ref frames semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_ref_id { -+ V4L2_REF_ID_LAST, -+ V4L2_REF_ID_GOLDEN, -+ V4L2_REF_ID_ALTREF, -+ V4L2_REF_ID_CNT, -+}; -+ -+/** -+ * enum v4l2_vp9_frame_flags - VP9 frame flags -+ * @V4L2_VP9_FRAME_FLAG_KEY_FRAME: the frame is a key frame -+ * @V4L2_VP9_FRAME_FLAG_SHOW_FRAME: the frame should be displayed -+ * @V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT: the decoding should be error resilient -+ * @V4L2_VP9_FRAME_FLAG_INTRA_ONLY: the frame does not reference other frames -+ * @V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV: the frame might can high precision -+ * motion vectors -+ * @V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX: frame context should be updated -+ * after decoding -+ * @V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE: parallel decoding is used -+ * @V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING: vertical subsampling is enabled -+ * @V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING: horizontal subsampling is enabled -+ * @V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING: full UV range is used -+ * -+ * Check the VP9 specification for more details. -+ */ -+enum v4l2_vp9_frame_flags { -+ V4L2_VP9_FRAME_FLAG_KEY_FRAME = 1 << 0, -+ V4L2_VP9_FRAME_FLAG_SHOW_FRAME = 1 << 1, -+ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT = 1 << 2, -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY = 1 << 3, -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV = 1 << 4, -+ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX = 1 << 5, -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE = 1 << 6, -+ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING = 1 << 7, -+ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING = 1 << 8, -+ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING = 1 << 9, -+}; -+ -+#define V4L2_VP9_PROFILE_MAX 3 -+ -+/** -+ * struct v4l2_ctrl_vp9_frame_decode_params - VP9 frame decoding control -+ * -+ * @flags: combination of V4L2_VP9_FRAME_FLAG_* flags -+ * @compressed_header_size: compressed header size in bytes -+ * @uncompressed_header_size: uncompressed header size in bytes -+ * @profile: VP9 profile. Can be 0, 1, 2 or 3 -+ * @reset_frame_context: specifies whether the frame context should be reset -+ * to default values. See &v4l2_vp9_reset_frame_context -+ * for more details -+ * @frame_context_idx: frame context that should be used/updated -+ * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all -+ * profiles support 10 and/or 12 bits depths -+ * @interpolation_filter: specifies the filter selection used for performing -+ * inter prediction. See &v4l2_vp9_interpolation_filter -+ * for more details -+ * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile -+ * (where the width is measured in units of 8x8 blocks). -+ * Shall be less than or equal to 6 -+ * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile -+ * (where the height is measured in units of 8x8 blocks) -+ * @tx_mode: specifies the TX mode. See &v4l2_vp9_tx_mode for more details -+ * @reference_mode: specifies the type of inter prediction to be used. See -+ * &v4l2_vp9_reference_mode for more details -+ * @padding: needed to make this struct 64 bit aligned. Shall be filled with -+ * zeros -+ * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed -+ * in pixels -+ * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed -+ * in pixels -+ * @frame_width_minus_1: add 1 to it and you'll get the expected render width -+ * expressed in pixels. This is not used during the -+ * decoding process but might be used by HW scalers to -+ * prepare a frame that's ready for scanout -+ * @frame_height_minus_1: add 1 to it and you'll get the expected render height -+ * expressed in pixels. This is not used during the -+ * decoding process but might be used by HW scalers to -+ * prepare a frame that's ready for scanout -+ * @refs: array of reference frames. See &v4l2_vp9_ref_id for more details -+ * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details -+ * @quant: quantization parameters. See &v4l2_vp9_quantization for more details -+ * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details -+ * @probs: probabilities. See &v4l2_vp9_probabilities for more details -+ */ -+struct v4l2_ctrl_vp9_frame_decode_params { -+ __u32 flags; -+ __u16 compressed_header_size; -+ __u16 uncompressed_header_size; -+ __u8 profile; -+ __u8 reset_frame_context; -+ __u8 frame_context_idx; -+ __u8 bit_depth; -+ __u8 interpolation_filter; -+ __u8 tile_cols_log2; -+ __u8 tile_rows_log2; -+ __u8 tx_mode; -+ __u8 reference_mode; -+ __u8 padding[6]; -+ __u16 frame_width_minus_1; -+ __u16 frame_height_minus_1; -+ __u16 render_width_minus_1; -+ __u16 render_height_minus_1; -+ __u64 refs[V4L2_REF_ID_CNT]; -+ struct v4l2_vp9_loop_filter lf; -+ struct v4l2_vp9_quantization quant; -+ struct v4l2_vp9_segmentation seg; -+ struct v4l2_vp9_probabilities probs; -+}; -+ -+#define V4L2_VP9_NUM_FRAME_CTX 4 -+ -+/** -+ * struct v4l2_ctrl_vp9_frame_ctx - VP9 frame context control -+ * -+ * @probs: VP9 probabilities -+ * -+ * This control is accessed in both direction. The user should initialize the -+ * 4 contexts with default values just after starting the stream. Then before -+ * decoding a frame it should query the current frame context (the one passed -+ * through &v4l2_ctrl_vp9_frame_decode_params.frame_context_idx) to initialize -+ * &v4l2_ctrl_vp9_frame_decode_params.probs. The probs are then adjusted based -+ * on the bitstream info and passed to the kernel. The codec should update -+ * the frame context after the frame has been decoded, so that next time -+ * userspace query this context it contains the updated probabilities. -+ */ -+struct v4l2_ctrl_vp9_frame_ctx { -+ struct v4l2_vp9_probabilities probs; -+}; -+ -+#endif /* _VP9_CTRLS_H_ */ - -From 8fde9d49bf9fbf0a1a9fdf242753c2b1b6ae377c Mon Sep 17 00:00:00 2001 +From 694b79d528295ae4d073c5972d35173116ff2b69 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 15 May 2020 16:54:05 +0000 -Subject: [PATCH 16/18] WIP: add NV15 and NV20 support +Subject: [PATCH 13/16] WIP: add NV15 and NV20 support Signed-off-by: Jonas Karlman --- @@ -4654,7 +4267,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/libavcodec/h264_slice.c b/libavcodec/h264_slice.c -index 0a10d00aad..45057fd049 100644 +index 0a10d00aad9e..45057fd049bd 100644 --- a/libavcodec/h264_slice.c +++ b/libavcodec/h264_slice.c @@ -794,10 +794,17 @@ static enum AVPixelFormat get_pixel_format(H264Context *h, int force_callback) @@ -4688,7 +4301,7 @@ index 0a10d00aad..45057fd049 100644 *fmt++ = AV_PIX_FMT_YUVJ422P; else diff --git a/libavcodec/v4l2_request.c b/libavcodec/v4l2_request.c -index 5234b5049b..0b294feff2 100644 +index 5234b5049b0d..0b294feff2eb 100644 --- a/libavcodec/v4l2_request.c +++ b/libavcodec/v4l2_request.c @@ -188,6 +188,13 @@ const uint32_t v4l2_request_capture_pixelformats[] = { @@ -4729,17 +4342,17 @@ index 5234b5049b..0b294feff2 100644 default: return -1; -From e60693f9f34d717a53b54768e56ccbbdda375abe Mon Sep 17 00:00:00 2001 +From dd29c8e4b504f12be27db8e188ba5bbaade7559f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 27 Jul 2020 23:15:45 +0000 -Subject: [PATCH 17/18] HACK: define drm NV15 and NV20 format +Subject: [PATCH 14/16] HACK: define drm NV15 and NV20 format --- libavcodec/v4l2_request.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/libavcodec/v4l2_request.c b/libavcodec/v4l2_request.c -index 0b294feff2..a8f0ee79ee 100644 +index 0b294feff2eb..a8f0ee79eeef 100644 --- a/libavcodec/v4l2_request.c +++ b/libavcodec/v4l2_request.c @@ -30,6 +30,14 @@ @@ -4758,10 +4371,10 @@ index 0b294feff2..a8f0ee79ee 100644 { V4L2RequestDescriptor *req = (V4L2RequestDescriptor*)frame->data[0]; -From 688bb66bf9715c02565b63446b75933282d41805 Mon Sep 17 00:00:00 2001 +From 0d56f3e7b04a5d574d38dd885000a6eb19eff903 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 13 May 2020 22:51:21 +0000 -Subject: [PATCH 18/18] WIP: hevc rkvdec fields +Subject: [PATCH 15/16] WIP: hevc rkvdec fields Signed-off-by: Jonas Karlman --- @@ -4770,7 +4383,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/libavcodec/hevc-ctrls.h b/libavcodec/hevc-ctrls.h -index a249166030..cd14352668 100644 +index a24916603017..cd143526685f 100644 --- a/libavcodec/hevc-ctrls.h +++ b/libavcodec/hevc-ctrls.h @@ -58,6 +58,8 @@ enum v4l2_mpeg_video_hevc_start_code { @@ -4820,7 +4433,7 @@ index a249166030..cd14352668 100644 __u32 entry_point_offset_minus1[256]; __u8 padding[8]; diff --git a/libavcodec/v4l2_request_hevc.c b/libavcodec/v4l2_request_hevc.c -index 601202a77d..be78382444 100644 +index 601202a77d7a..be7838244447 100644 --- a/libavcodec/v4l2_request_hevc.c +++ b/libavcodec/v4l2_request_hevc.c @@ -214,6 +214,9 @@ static void v4l2_request_hevc_fill_slice_params(const HEVCContext *h, @@ -4873,3 +4486,70 @@ index 601202a77d..be78382444 100644 return ff_v4l2_request_decode_frame(avctx, h->ref->frame, control, FF_ARRAY_ELEMS(control)); } + +From eb9a3213d56d9f6a177f16e907f57e0063b23244 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Sun, 19 Sep 2021 13:10:55 +0200 +Subject: [PATCH 16/16] v4l2_request: validate supported framesizes + +Signed-off-by: Alex Bee +--- + libavcodec/v4l2_request.c | 38 +++++++++++++++++++++++++++++++++++++- + 1 file changed, 37 insertions(+), 1 deletion(-) + +diff --git a/libavcodec/v4l2_request.c b/libavcodec/v4l2_request.c +index a8f0ee79eeef..2fbe16634160 100644 +--- a/libavcodec/v4l2_request.c ++++ b/libavcodec/v4l2_request.c +@@ -376,6 +376,42 @@ int ff_v4l2_request_decode_frame(AVCodecContext *avctx, AVFrame *frame, struct v + return v4l2_request_queue_decode(avctx, frame, control, count, 1, 1); + } + ++static int v4l2_request_try_framesize(AVCodecContext *avctx, uint32_t pixelformat) ++{ ++ V4L2RequestContext *ctx = avctx->internal->hwaccel_priv_data; ++ struct v4l2_frmsizeenum frmsize = { ++ .index = 0, ++ .pixel_format = pixelformat, ++ }; ++ ++ if (ioctl(ctx->video_fd, VIDIOC_ENUM_FRAMESIZES, &frmsize) < 0) ++ return 0; ++ ++ /* ++ * We only validate min/max framesize for V4L2_FRMSIZE_TYPE_STEPWISE here, since the alignment ++ * which is eventually needed will be done driver-side later in VIDIOC_S_FMT and there is no need ++ * validate step_width/step_height here ++ */ ++ ++ do { ++ ++ if (frmsize.type == V4L2_FRMSIZE_TYPE_DISCRETE && frmsize.discrete.width == avctx->coded_width && ++ frmsize.discrete.height == avctx->coded_height) ++ return 0; ++ else if ((frmsize.type == V4L2_FRMSIZE_TYPE_STEPWISE || frmsize.type == V4L2_FRMSIZE_TYPE_CONTINUOUS) && ++ avctx->coded_width >= frmsize.stepwise.min_width && avctx->coded_height >= frmsize.stepwise.min_height && ++ avctx->coded_width <= frmsize.stepwise.max_width && avctx->coded_height <= frmsize.stepwise.max_height) ++ return 0; ++ ++ frmsize.index++; ++ ++ } while (ioctl(ctx->video_fd, VIDIOC_ENUM_FRAMESIZES, &frmsize) >= 0); ++ ++ av_log(avctx, AV_LOG_INFO, "%s: pixelformat %u not supported for width %u height %u\n", __func__, pixelformat, avctx->coded_width, avctx->coded_height); ++ ++ return -1; ++} ++ + static int v4l2_request_try_format(AVCodecContext *avctx, enum v4l2_buf_type type, uint32_t pixelformat) + { + V4L2RequestContext *ctx = avctx->internal->hwaccel_priv_data; +@@ -404,7 +440,7 @@ static int v4l2_request_try_format(AVCodecContext *avctx, enum v4l2_buf_type typ + + while (ioctl(ctx->video_fd, VIDIOC_ENUM_FMT, &fmtdesc) >= 0) { + if (fmtdesc.pixelformat == pixelformat) +- return 0; ++ return v4l2_request_try_framesize(avctx, pixelformat); + + fmtdesc.index++; + } diff --git a/projects/Allwinner/linux/linux.aarch64.conf b/projects/Allwinner/linux/linux.aarch64.conf index 66312d390f..2f5b86e5cf 100644 --- a/projects/Allwinner/linux/linux.aarch64.conf +++ b/projects/Allwinner/linux/linux.aarch64.conf @@ -3309,6 +3309,8 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_H264=m +CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FWNODE=m CONFIG_V4L2_ASYNC=m @@ -5158,6 +5160,8 @@ CONFIG_R8188EU=m # end of IIO staging drivers CONFIG_STAGING_MEDIA=y +CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_SUNXI=y CONFIG_VIDEO_SUNXI=y CONFIG_VIDEO_SUNXI_CEDRUS=y diff --git a/projects/Allwinner/patches/linux/0066-drm-sun4i-virtual-CMA-addresses-are-not-needed.patch b/projects/Allwinner/patches/linux/0066-drm-sun4i-virtual-CMA-addresses-are-not-needed.patch new file mode 100644 index 0000000000..9223b4bfa1 --- /dev/null +++ b/projects/Allwinner/patches/linux/0066-drm-sun4i-virtual-CMA-addresses-are-not-needed.patch @@ -0,0 +1,31 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Tue, 5 Oct 2021 17:22:04 +0200 +Subject: [PATCH] drm/sun4i: virtual CMA addresses are not needed + +Driver never uses virtual address of DRM CMA buffers. Switch to CMA +helpers which don't deal with virtual mapping. + +This was actually already the case before commit ad408c766cef +("drm/sun4i: Use DRM_GEM_CMA_VMAP_DRIVER_OPS for GEM operations"), +but only convenient macro at the time used helpers with virtual +mapping. + +Signed-off-by: Jernej Skrabec +--- + drivers/gpu/drm/sun4i/sun4i_drv.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c +index 54dd562e294c..b630614b3d72 100644 +--- a/drivers/gpu/drm/sun4i/sun4i_drv.c ++++ b/drivers/gpu/drm/sun4i/sun4i_drv.c +@@ -53,7 +53,7 @@ static const struct drm_driver sun4i_drv_driver = { + .minor = 0, + + /* GEM Operations */ +- DRM_GEM_CMA_DRIVER_OPS_VMAP_WITH_DUMB_CREATE(drm_sun4i_gem_dumb_create), ++ DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(drm_sun4i_gem_dumb_create), + }; + + static int sun4i_drv_bind(struct device *dev) diff --git a/projects/Allwinner/patches/linux/0067-hantro-postproc-Fix-motion-vector-space-size.patch b/projects/Allwinner/patches/linux/0067-hantro-postproc-Fix-motion-vector-space-size.patch new file mode 100644 index 0000000000..95ec0de49e --- /dev/null +++ b/projects/Allwinner/patches/linux/0067-hantro-postproc-Fix-motion-vector-space-size.patch @@ -0,0 +1,42 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:31 +0100 +Subject: [PATCH] hantro: postproc: Fix motion vector space size + +When the post-processor hardware block is enabled, the driver +allocates an internal queue of buffers for the decoder enginer, +and uses the vb2 queue for the post-processor engine. + +For instance, on a G1 core, the decoder engine produces NV12 buffers +and the post-processor engine can produce YUY2 buffers. The decoder +engine expects motion vectors to be appended to the NV12 buffers, +but this is only required for CODECs that need motion vectors, +such as H.264. + +Fix the post-processor logic accordingly. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro_postproc.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index ed8916c950a4..07842152003f 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -132,9 +132,10 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) + unsigned int num_buffers = cap_queue->num_buffers; + unsigned int i, buf_size; + +- buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage + +- hantro_h264_mv_size(ctx->dst_fmt.width, +- ctx->dst_fmt.height); ++ buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; ++ if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) ++ buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, ++ ctx->dst_fmt.height); + + for (i = 0; i < num_buffers; ++i) { + struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; diff --git a/projects/Allwinner/patches/linux/0068-hantro-postproc-Introduce-struct-hantro_postproc_ops.patch b/projects/Allwinner/patches/linux/0068-hantro-postproc-Introduce-struct-hantro_postproc_ops.patch new file mode 100644 index 0000000000..8466cd8f22 --- /dev/null +++ b/projects/Allwinner/patches/linux/0068-hantro-postproc-Introduce-struct-hantro_postproc_ops.patch @@ -0,0 +1,229 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:32 +0100 +Subject: [PATCH] hantro: postproc: Introduce struct hantro_postproc_ops + +Turns out the post-processor block on the G2 core is substantially +different from the one on the G1 core. Introduce hantro_postproc_ops +with .enable and .disable methods, which will allow to support +the G2 post-processor cleanly. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Benjamin Gaignard +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro.h | 5 +-- + drivers/staging/media/hantro/hantro_hw.h | 13 ++++++- + .../staging/media/hantro/hantro_postproc.c | 35 +++++++++++++------ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +- + .../staging/media/hantro/rockchip_vpu_hw.c | 6 ++-- + .../staging/media/hantro/sama5d4_vdec_hw.c | 2 +- + 6 files changed, 45 insertions(+), 18 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index c2e2dca38628..c2e01959dc00 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -28,6 +28,7 @@ + + struct hantro_ctx; + struct hantro_codec_ops; ++struct hantro_postproc_ops; + + #define HANTRO_JPEG_ENCODER BIT(0) + #define HANTRO_ENCODERS 0x0000ffff +@@ -59,6 +60,7 @@ struct hantro_irq { + * @num_dec_fmts: Number of decoder formats. + * @postproc_fmts: Post-processor formats. + * @num_postproc_fmts: Number of post-processor formats. ++ * @postproc_ops: Post-processor ops. + * @codec: Supported codecs + * @codec_ops: Codec ops. + * @init: Initialize hardware, optional. +@@ -69,7 +71,6 @@ struct hantro_irq { + * @num_clocks: number of clocks in the array + * @reg_names: array of register range names + * @num_regs: number of register range names in the array +- * @postproc_regs: &struct hantro_postproc_regs pointer + */ + struct hantro_variant { + unsigned int enc_offset; +@@ -80,6 +81,7 @@ struct hantro_variant { + unsigned int num_dec_fmts; + const struct hantro_fmt *postproc_fmts; + unsigned int num_postproc_fmts; ++ const struct hantro_postproc_ops *postproc_ops; + unsigned int codec; + const struct hantro_codec_ops *codec_ops; + int (*init)(struct hantro_dev *vpu); +@@ -90,7 +92,6 @@ struct hantro_variant { + int num_clocks; + const char * const *reg_names; + int num_regs; +- const struct hantro_postproc_regs *postproc_regs; + }; + + /** +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 267a6d33a47b..2f85430682d8 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -174,6 +174,17 @@ struct hantro_postproc_ctx { + struct hantro_aux_buf dec_q[VB2_MAX_FRAME]; + }; + ++/** ++ * struct hantro_postproc_ops - post-processor operations ++ * ++ * @enable: Enable the post-processor block. Optional. ++ * @disable: Disable the post-processor block. Optional. ++ */ ++struct hantro_postproc_ops { ++ void (*enable)(struct hantro_ctx *ctx); ++ void (*disable)(struct hantro_ctx *ctx); ++}; ++ + /** + * struct hantro_codec_ops - codec mode specific operations + * +@@ -221,7 +232,7 @@ extern const struct hantro_variant rk3328_vpu_variant; + extern const struct hantro_variant rk3399_vpu_variant; + extern const struct hantro_variant sama5d4_vdec_variant; + +-extern const struct hantro_postproc_regs hantro_g1_postproc_regs; ++extern const struct hantro_postproc_ops hantro_g1_postproc_ops; + + extern const u32 hantro_vp8_dec_mc_filter[8][6]; + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 07842152003f..882fb8bc5ddd 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -15,14 +15,14 @@ + #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ + { \ + hantro_reg_write(vpu, \ +- &(vpu)->variant->postproc_regs->reg_name, \ ++ &hantro_g1_postproc_regs.reg_name, \ + val); \ + } + + #define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \ + { \ + hantro_reg_write_s(vpu, \ +- &(vpu)->variant->postproc_regs->reg_name, \ ++ &hantro_g1_postproc_regs.reg_name, \ + val); \ + } + +@@ -64,16 +64,13 @@ bool hantro_needs_postproc(const struct hantro_ctx *ctx, + return fmt->fourcc != V4L2_PIX_FMT_NV12; + } + +-void hantro_postproc_enable(struct hantro_ctx *ctx) ++static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *dst_buf; + u32 src_pp_fmt, dst_pp_fmt; + dma_addr_t dst_dma; + +- if (!vpu->variant->postproc_regs) +- return; +- + /* Turn on pipeline mode. Must be done first. */ + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1); + +@@ -154,12 +151,30 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) + return 0; + } + +-void hantro_postproc_disable(struct hantro_ctx *ctx) ++static void hantro_postproc_g1_disable(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; + +- if (!vpu->variant->postproc_regs) +- return; +- + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); + } ++ ++void hantro_postproc_disable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->disable) ++ vpu->variant->postproc_ops->disable(ctx); ++} ++ ++void hantro_postproc_enable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->enable) ++ vpu->variant->postproc_ops->enable(ctx); ++} ++ ++const struct hantro_postproc_ops hantro_g1_postproc_ops = { ++ .enable = hantro_postproc_g1_enable, ++ .disable = hantro_postproc_g1_disable, ++}; +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index ea919bfb9891..22fa7d2f3b64 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -262,7 +262,7 @@ const struct hantro_variant imx8mq_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), + .postproc_fmts = imx8m_vpu_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = imx8mq_vpu_codec_ops, +diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c +index d4f52957cc53..6c1ad5534ce5 100644 +--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c ++++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c +@@ -460,7 +460,7 @@ const struct hantro_variant rk3036_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), + .postproc_fmts = rockchip_vpu1_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = rk3036_vpu_codec_ops, +@@ -485,7 +485,7 @@ const struct hantro_variant rk3066_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), + .postproc_fmts = rockchip_vpu1_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | + HANTRO_VP8_DECODER | HANTRO_H264_DECODER, + .codec_ops = rk3066_vpu_codec_ops, +@@ -505,7 +505,7 @@ const struct hantro_variant rk3288_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts), + .postproc_fmts = rockchip_vpu1_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | + HANTRO_VP8_DECODER | HANTRO_H264_DECODER, + .codec_ops = rk3288_vpu_codec_ops, +diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +index 9c3b8cd0b239..f3fecc7248c4 100644 +--- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c ++++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +@@ -100,7 +100,7 @@ const struct hantro_variant sama5d4_vdec_variant = { + .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts), + .postproc_fmts = sama5d4_vdec_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = sama5d4_vdec_codec_ops, diff --git a/projects/Allwinner/patches/linux/0069-hantro-Simplify-postprocessor.patch b/projects/Allwinner/patches/linux/0069-hantro-Simplify-postprocessor.patch new file mode 100644 index 0000000000..b97d1f284d --- /dev/null +++ b/projects/Allwinner/patches/linux/0069-hantro-Simplify-postprocessor.patch @@ -0,0 +1,97 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:33 +0100 +Subject: [PATCH] hantro: Simplify postprocessor + +Add a 'postprocessed' boolean property to struct hantro_fmt +to signal that a format is produced by the post-processor. +This will allow to introduce the G2 post-processor in a simple way. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro.h | 2 ++ + drivers/staging/media/hantro/hantro_postproc.c | 8 +------- + drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 + + drivers/staging/media/hantro/rockchip_vpu_hw.c | 1 + + drivers/staging/media/hantro/sama5d4_vdec_hw.c | 1 + + 5 files changed, 6 insertions(+), 7 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index c2e01959dc00..dd5e56765d4e 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -263,6 +263,7 @@ struct hantro_ctx { + * @max_depth: Maximum depth, for bitstream formats + * @enc_fmt: Format identifier for encoder registers. + * @frmsize: Supported range of frame sizes (only for bitstream formats). ++ * @postprocessed: Indicates if this format needs the post-processor. + */ + struct hantro_fmt { + char *name; +@@ -272,6 +273,7 @@ struct hantro_fmt { + int max_depth; + enum hantro_enc_fmt enc_fmt; + struct v4l2_frmsize_stepwise frmsize; ++ bool postprocessed; + }; + + struct hantro_reg { +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 882fb8bc5ddd..4549aec08feb 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -53,15 +53,9 @@ const struct hantro_postproc_regs hantro_g1_postproc_regs = { + bool hantro_needs_postproc(const struct hantro_ctx *ctx, + const struct hantro_fmt *fmt) + { +- struct hantro_dev *vpu = ctx->dev; +- + if (ctx->is_encoder) + return false; +- +- if (!vpu->variant->postproc_fmts) +- return false; +- +- return fmt->fourcc != V4L2_PIX_FMT_NV12; ++ return fmt->postprocessed; + } + + static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 22fa7d2f3b64..02e61438220a 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -82,6 +82,7 @@ static const struct hantro_fmt imx8m_vpu_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, + }, + }; + +diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c +index 6c1ad5534ce5..f372f767d4ff 100644 +--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c ++++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c +@@ -62,6 +62,7 @@ static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, + }, + }; + +diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +index f3fecc7248c4..b2fc1c5613e1 100644 +--- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c ++++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +@@ -15,6 +15,7 @@ static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, + }, + }; + diff --git a/projects/Allwinner/patches/linux/0070-hantro-Add-quirk-for-NV12-NV12_4L4-capture-format.patch b/projects/Allwinner/patches/linux/0070-hantro-Add-quirk-for-NV12-NV12_4L4-capture-format.patch new file mode 100644 index 0000000000..d28bfa4a7a --- /dev/null +++ b/projects/Allwinner/patches/linux/0070-hantro-Add-quirk-for-NV12-NV12_4L4-capture-format.patch @@ -0,0 +1,65 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:34 +0100 +Subject: [PATCH] hantro: Add quirk for NV12/NV12_4L4 capture format + +The G2 core decoder engine produces NV12_4L4 format, +which is a simple NV12 4x4 tiled format. The driver currently +hides this format by always enabling the post-processor engine, +and therefore offering NV12 directly. + +This is done without using the logic in hantro_postproc.c +and therefore makes it difficult to add VP9 cleanly. + +Since fixing this is not easy, add a small quirk to force +NV12 if HEVC was configured, but otherwise declare NV12_4L4 +as the pixel format in imx8mq_vpu_g2_variant.dec_fmts. + +This will be used by the VP9 decoder which will be added soon. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro_v4l2.c | 14 ++++++++++++++ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +- + 2 files changed, 15 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c +index bcb0bdff4a9a..d1f060c55fed 100644 +--- a/drivers/staging/media/hantro/hantro_v4l2.c ++++ b/drivers/staging/media/hantro/hantro_v4l2.c +@@ -150,6 +150,20 @@ static int vidioc_enum_fmt(struct file *file, void *priv, + unsigned int num_fmts, i, j = 0; + bool skip_mode_none; + ++ /* ++ * The HEVC decoder on the G2 core needs a little quirk to offer NV12 ++ * only on the capture side. Once the post-processor logic is used, ++ * we will be able to expose NV12_4L4 and NV12 as the other cases, ++ * and therefore remove this quirk. ++ */ ++ if (capture && ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) { ++ if (f->index == 0) { ++ f->pixelformat = V4L2_PIX_FMT_NV12; ++ return 0; ++ } ++ return -EINVAL; ++ } ++ + /* + * When dealing with an encoder: + * - on the capture side we want to filter out all MODE_NONE formats. +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 02e61438220a..a40b161e5956 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -134,7 +134,7 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { + + static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + { +- .fourcc = V4L2_PIX_FMT_NV12, ++ .fourcc = V4L2_PIX_FMT_NV12_4L4, + .codec_mode = HANTRO_MODE_NONE, + }, + { diff --git a/projects/Allwinner/patches/linux/0071-media-uapi-Add-VP9-stateless-decoder-controls.patch b/projects/Allwinner/patches/linux/0071-media-uapi-Add-VP9-stateless-decoder-controls.patch new file mode 100644 index 0000000000..32ed31131e --- /dev/null +++ b/projects/Allwinner/patches/linux/0071-media-uapi-Add-VP9-stateless-decoder-controls.patch @@ -0,0 +1,1309 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:35 +0100 +Subject: [PATCH] media: uapi: Add VP9 stateless decoder controls + +Add the VP9 stateless decoder controls plus the documentation that goes +with it. + +Signed-off-by: Boris Brezillon +Co-developed-by: Ezequiel Garcia +Signed-off-by: Ezequiel Garcia +Signed-off-by: Adrian Ratiu +Signed-off-by: Andrzej Pietrasiewicz +Co-developed-by: Daniel Almeida +Signed-off-by: Daniel Almeida +Signed-off-by: Hans Verkuil +--- + .../userspace-api/media/v4l/biblio.rst | 10 + + .../media/v4l/ext-ctrls-codec-stateless.rst | 573 ++++++++++++++++++ + .../media/v4l/pixfmt-compressed.rst | 15 + + .../media/v4l/vidioc-g-ext-ctrls.rst | 8 + + .../media/v4l/vidioc-queryctrl.rst | 12 + + .../media/videodev2.h.rst.exceptions | 2 + + drivers/media/v4l2-core/v4l2-ctrls-core.c | 180 ++++++ + drivers/media/v4l2-core/v4l2-ctrls-defs.c | 8 + + drivers/media/v4l2-core/v4l2-ioctl.c | 1 + + include/media/v4l2-ctrls.h | 4 + + include/uapi/linux/v4l2-controls.h | 284 +++++++++ + include/uapi/linux/videodev2.h | 6 + + 12 files changed, 1103 insertions(+) + +diff --git a/Documentation/userspace-api/media/v4l/biblio.rst b/Documentation/userspace-api/media/v4l/biblio.rst +index 7b8e6738ff9e..9cd18c153d19 100644 +--- a/Documentation/userspace-api/media/v4l/biblio.rst ++++ b/Documentation/userspace-api/media/v4l/biblio.rst +@@ -417,3 +417,13 @@ VP8 + :title: RFC 6386: "VP8 Data Format and Decoding Guide" + + :author: J. Bankoski et al. ++ ++.. _vp9: ++ ++VP9 ++=== ++ ++ ++:title: VP9 Bitstream & Decoding Process Specification ++ ++:author: Adrian Grange (Google), Peter de Rivaz (Argon Design), Jonathan Hunt (Argon Design) +diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +index 72f5e85b4f34..cc080c4257d0 100644 +--- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst ++++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +@@ -1458,3 +1458,576 @@ FWHT Flags + .. raw:: latex + + \normalsize ++ ++.. _v4l2-codec-stateless-vp9: ++ ++``V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (struct)`` ++ Stores VP9 probabilities updates as parsed from the current compressed frame ++ header. A value of zero in an array element means no update of the relevant ++ probability. Motion vector-related updates contain a new value or zero. All ++ other updates contain values translated with inv_map_table[] (see 6.3.5 in ++ :ref:`vp9`). ++ ++.. c:type:: v4l2_ctrl_vp9_compressed_hdr ++ ++.. tabularcolumns:: |p{1cm}|p{4.8cm}|p{11.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_ctrl_vp9_compressed_hdr ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __u8 ++ - ``tx_mode`` ++ - Specifies the TX mode. See :ref:`TX Mode ` for more details. ++ * - __u8 ++ - ``tx8[2][1]`` ++ - TX 8x8 probabilities delta. ++ * - __u8 ++ - ``tx16[2][2]`` ++ - TX 16x16 probabilities delta. ++ * - __u8 ++ - ``tx32[2][3]`` ++ - TX 32x32 probabilities delta. ++ * - __u8 ++ - ``coef[4][2][2][6][6][3]`` ++ - Coefficient probabilities delta. ++ * - __u8 ++ - ``skip[3]`` ++ - Skip probabilities delta. ++ * - __u8 ++ - ``inter_mode[7][3]`` ++ - Inter prediction mode probabilities delta. ++ * - __u8 ++ - ``interp_filter[4][2]`` ++ - Interpolation filter probabilities delta. ++ * - __u8 ++ - ``is_inter[4]`` ++ - Is inter-block probabilities delta. ++ * - __u8 ++ - ``comp_mode[5]`` ++ - Compound prediction mode probabilities delta. ++ * - __u8 ++ - ``single_ref[5][2]`` ++ - Single reference probabilities delta. ++ * - __u8 ++ - ``comp_ref[5]`` ++ - Compound reference probabilities delta. ++ * - __u8 ++ - ``y_mode[4][9]`` ++ - Y prediction mode probabilities delta. ++ * - __u8 ++ - ``uv_mode[10][9]`` ++ - UV prediction mode probabilities delta. ++ * - __u8 ++ - ``partition[16][3]`` ++ - Partition probabilities delta. ++ * - __u8 ++ - ``mv.joint[3]`` ++ - Motion vector joint probabilities delta. ++ * - __u8 ++ - ``mv.sign[2]`` ++ - Motion vector sign probabilities delta. ++ * - __u8 ++ - ``mv.classes[2][10]`` ++ - Motion vector class probabilities delta. ++ * - __u8 ++ - ``mv.class0_bit[2]`` ++ - Motion vector class0 bit probabilities delta. ++ * - __u8 ++ - ``mv.bits[2][10]`` ++ - Motion vector bits probabilities delta. ++ * - __u8 ++ - ``mv.class0_fr[2][2][3]`` ++ - Motion vector class0 fractional bit probabilities delta. ++ * - __u8 ++ - ``mv.fr[2][3]`` ++ - Motion vector fractional bit probabilities delta. ++ * - __u8 ++ - ``mv.class0_hp[2]`` ++ - Motion vector class0 high precision fractional bit probabilities delta. ++ * - __u8 ++ - ``mv.hp[2]`` ++ - Motion vector high precision fractional bit probabilities delta. ++ ++.. _vp9_tx_mode: ++ ++``TX Mode`` ++ ++.. tabularcolumns:: |p{6.5cm}|p{0.5cm}|p{10.3cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_TX_MODE_ONLY_4X4`` ++ - 0 ++ - Transform size is 4x4. ++ * - ``V4L2_VP9_TX_MODE_ALLOW_8X8`` ++ - 1 ++ - Transform size can be up to 8x8. ++ * - ``V4L2_VP9_TX_MODE_ALLOW_16X16`` ++ - 2 ++ - Transform size can be up to 16x16. ++ * - ``V4L2_VP9_TX_MODE_ALLOW_32X32`` ++ - 3 ++ - transform size can be up to 32x32. ++ * - ``V4L2_VP9_TX_MODE_SELECT`` ++ - 4 ++ - Bitstream contains the transform size for each block. ++ ++See section '7.3.1 Tx mode semantics' of the :ref:`vp9` specification for more details. ++ ++``V4L2_CID_STATELESS_VP9_FRAME (struct)`` ++ Specifies the frame parameters for the associated VP9 frame decode request. ++ This includes the necessary parameters for configuring a stateless hardware ++ decoding pipeline for VP9. The bitstream parameters are defined according ++ to :ref:`vp9`. ++ ++.. c:type:: v4l2_ctrl_vp9_frame ++ ++.. raw:: latex ++ ++ \small ++ ++.. tabularcolumns:: |p{4.7cm}|p{5.5cm}|p{7.1cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_ctrl_vp9_frame ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - struct :c:type:`v4l2_vp9_loop_filter` ++ - ``lf`` ++ - Loop filter parameters. See struct :c:type:`v4l2_vp9_loop_filter` for more details. ++ * - struct :c:type:`v4l2_vp9_quantization` ++ - ``quant`` ++ - Quantization parameters. See :c:type:`v4l2_vp9_quantization` for more details. ++ * - struct :c:type:`v4l2_vp9_segmentation` ++ - ``seg`` ++ - Segmentation parameters. See :c:type:`v4l2_vp9_segmentation` for more details. ++ * - __u32 ++ - ``flags`` ++ - Combination of V4L2_VP9_FRAME_FLAG_* flags. See :ref:`Frame Flags`. ++ * - __u16 ++ - ``compressed_header_size`` ++ - Compressed header size in bytes. ++ * - __u16 ++ - ``uncompressed_header_size`` ++ - Uncompressed header size in bytes. ++ * - __u16 ++ - ``frame_width_minus_1`` ++ - Add 1 to get the frame width expressed in pixels. See section 7.2.3 in :ref:`vp9`. ++ * - __u16 ++ - ``frame_height_minus_1`` ++ - Add 1 to get the frame height expressed in pixels. See section 7.2.3 in :ref:`vp9`. ++ * - __u16 ++ - ``render_width_minus_1`` ++ - Add 1 to get the expected render width expressed in pixels. This is ++ not used during the decoding process but might be used by HW scalers to ++ prepare a frame that's ready for scanout. See section 7.2.4 in :ref:`vp9`. ++ * - __u16 ++ - render_height_minus_1 ++ - Add 1 to get the expected render height expressed in pixels. This is ++ not used during the decoding process but might be used by HW scalers to ++ prepare a frame that's ready for scanout. See section 7.2.4 in :ref:`vp9`. ++ * - __u64 ++ - ``last_frame_ts`` ++ - "last" reference buffer timestamp. ++ The timestamp refers to the ``timestamp`` field in ++ struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` ++ function to convert the struct :c:type:`timeval` in struct ++ :c:type:`v4l2_buffer` to a __u64. ++ * - __u64 ++ - ``golden_frame_ts`` ++ - "golden" reference buffer timestamp. ++ The timestamp refers to the ``timestamp`` field in ++ struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` ++ function to convert the struct :c:type:`timeval` in struct ++ :c:type:`v4l2_buffer` to a __u64. ++ * - __u64 ++ - ``alt_frame_ts`` ++ - "alt" reference buffer timestamp. ++ The timestamp refers to the ``timestamp`` field in ++ struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` ++ function to convert the struct :c:type:`timeval` in struct ++ :c:type:`v4l2_buffer` to a __u64. ++ * - __u8 ++ - ``ref_frame_sign_bias`` ++ - a bitfield specifying whether the sign bias is set for a given ++ reference frame. See :ref:`Reference Frame Sign Bias` ++ for more details. ++ * - __u8 ++ - ``reset_frame_context`` ++ - specifies whether the frame context should be reset to default values. See ++ :ref:`Reset Frame Context` for more details. ++ * - __u8 ++ - ``frame_context_idx`` ++ - Frame context that should be used/updated. ++ * - __u8 ++ - ``profile`` ++ - VP9 profile. Can be 0, 1, 2 or 3. ++ * - __u8 ++ - ``bit_depth`` ++ - Component depth in bits. Can be 8, 10 or 12. Note that not all profiles ++ support 10 and/or 12 bits depths. ++ * - __u8 ++ - ``interpolation_filter`` ++ - Specifies the filter selection used for performing inter prediction. See ++ :ref:`Interpolation Filter` for more details. ++ * - __u8 ++ - ``tile_cols_log2`` ++ - Specifies the base 2 logarithm of the width of each tile (where the ++ width is measured in units of 8x8 blocks). Shall be less than or equal ++ to 6. ++ * - __u8 ++ - ``tile_rows_log2`` ++ - Specifies the base 2 logarithm of the height of each tile (where the ++ height is measured in units of 8x8 blocks). ++ * - __u8 ++ - ``reference_mode`` ++ - Specifies the type of inter prediction to be used. See ++ :ref:`Reference Mode` for more details. ++ * - __u8 ++ - ``reserved[7]`` ++ - Applications and drivers must set this to zero. ++ ++.. raw:: latex ++ ++ \normalsize ++ ++.. _vp9_frame_flags: ++ ++``Frame Flags`` ++ ++.. tabularcolumns:: |p{10.0cm}|p{1.2cm}|p{6.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_FRAME_FLAG_KEY_FRAME`` ++ - 0x001 ++ - The frame is a key frame. ++ * - ``V4L2_VP9_FRAME_FLAG_SHOW_FRAME`` ++ - 0x002 ++ - The frame should be displayed. ++ * - ``V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT`` ++ - 0x004 ++ - The decoding should be error resilient. ++ * - ``V4L2_VP9_FRAME_FLAG_INTRA_ONLY`` ++ - 0x008 ++ - The frame does not reference other frames. ++ * - ``V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV`` ++ - 0x010 ++ - The frame can use high precision motion vectors. ++ * - ``V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX`` ++ - 0x020 ++ - Frame context should be updated after decoding. ++ * - ``V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE`` ++ - 0x040 ++ - Parallel decoding is used. ++ * - ``V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING`` ++ - 0x080 ++ - Vertical subsampling is enabled. ++ * - ``V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING`` ++ - 0x100 ++ - Horizontal subsampling is enabled. ++ * - ``V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING`` ++ - 0x200 ++ - The full UV range is used. ++ ++.. _vp9_ref_frame_sign_bias: ++ ++``Reference Frame Sign Bias`` ++ ++.. tabularcolumns:: |p{7.0cm}|p{1.2cm}|p{9.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_SIGN_BIAS_LAST`` ++ - 0x1 ++ - Sign bias is set for the last reference frame. ++ * - ``V4L2_VP9_SIGN_BIAS_GOLDEN`` ++ - 0x2 ++ - Sign bias is set for the golden reference frame. ++ * - ``V4L2_VP9_SIGN_BIAS_ALT`` ++ - 0x2 ++ - Sign bias is set for the alt reference frame. ++ ++.. _vp9_reset_frame_context: ++ ++``Reset Frame Context`` ++ ++.. tabularcolumns:: |p{7.0cm}|p{1.2cm}|p{9.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_RESET_FRAME_CTX_NONE`` ++ - 0 ++ - Do not reset any frame context. ++ * - ``V4L2_VP9_RESET_FRAME_CTX_SPEC`` ++ - 1 ++ - Reset the frame context pointed to by ++ :c:type:`v4l2_ctrl_vp9_frame`.frame_context_idx. ++ * - ``V4L2_VP9_RESET_FRAME_CTX_ALL`` ++ - 2 ++ - Reset all frame contexts. ++ ++See section '7.2 Uncompressed header semantics' of the :ref:`vp9` specification ++for more details. ++ ++.. _vp9_interpolation_filter: ++ ++``Interpolation Filter`` ++ ++.. tabularcolumns:: |p{9.0cm}|p{1.2cm}|p{7.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_INTERP_FILTER_EIGHTTAP`` ++ - 0 ++ - Eight tap filter. ++ * - ``V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH`` ++ - 1 ++ - Eight tap smooth filter. ++ * - ``V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP`` ++ - 2 ++ - Eeight tap sharp filter. ++ * - ``V4L2_VP9_INTERP_FILTER_BILINEAR`` ++ - 3 ++ - Bilinear filter. ++ * - ``V4L2_VP9_INTERP_FILTER_SWITCHABLE`` ++ - 4 ++ - Filter selection is signaled at the block level. ++ ++See section '7.2.7 Interpolation filter semantics' of the :ref:`vp9` specification ++for more details. ++ ++.. _vp9_reference_mode: ++ ++``Reference Mode`` ++ ++.. tabularcolumns:: |p{9.6cm}|p{0.5cm}|p{7.2cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE`` ++ - 0 ++ - Indicates that all the inter blocks use only a single reference frame ++ to generate motion compensated prediction. ++ * - ``V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE`` ++ - 1 ++ - Requires all the inter blocks to use compound mode. Single reference ++ frame prediction is not allowed. ++ * - ``V4L2_VP9_REFERENCE_MODE_SELECT`` ++ - 2 ++ - Allows each individual inter block to select between single and ++ compound prediction modes. ++ ++See section '7.3.6 Frame reference mode semantics' of the :ref:`vp9` specification for more details. ++ ++.. c:type:: v4l2_vp9_segmentation ++ ++Encodes the quantization parameters. See section '7.2.10 Segmentation ++params syntax' of the :ref:`vp9` specification for more details. ++ ++.. tabularcolumns:: |p{0.8cm}|p{5cm}|p{11.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_vp9_segmentation ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __u8 ++ - ``feature_data[8][4]`` ++ - Data attached to each feature. Data entry is only valid if the feature ++ is enabled. The array shall be indexed with segment number as the first dimension ++ (0..7) and one of V4L2_VP9_SEG_* as the second dimension. ++ See :ref:`Segment Feature IDs`. ++ * - __u8 ++ - ``feature_enabled[8]`` ++ - Bitmask defining which features are enabled in each segment. The value for each ++ segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) values where id is ++ one of V4L2_VP9_SEG_*. See :ref:`Segment Feature IDs`. ++ * - __u8 ++ - ``tree_probs[7]`` ++ - Specifies the probability values to be used when decoding a Segment-ID. ++ See '5.15. Segmentation map' section of :ref:`vp9` for more details. ++ * - __u8 ++ - ``pred_probs[3]`` ++ - Specifies the probability values to be used when decoding a ++ Predicted-Segment-ID. See '6.4.14. Get segment id syntax' ++ section of :ref:`vp9` for more details. ++ * - __u8 ++ - ``flags`` ++ - Combination of V4L2_VP9_SEGMENTATION_FLAG_* flags. See ++ :ref:`Segmentation Flags`. ++ * - __u8 ++ - ``reserved[5]`` ++ - Applications and drivers must set this to zero. ++ ++.. _vp9_segment_feature: ++ ++``Segment feature IDs`` ++ ++.. tabularcolumns:: |p{6.0cm}|p{1cm}|p{10.3cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_SEG_LVL_ALT_Q`` ++ - 0 ++ - Quantizer segment feature. ++ * - ``V4L2_VP9_SEG_LVL_ALT_L`` ++ - 1 ++ - Loop filter segment feature. ++ * - ``V4L2_VP9_SEG_LVL_REF_FRAME`` ++ - 2 ++ - Reference frame segment feature. ++ * - ``V4L2_VP9_SEG_LVL_SKIP`` ++ - 3 ++ - Skip segment feature. ++ * - ``V4L2_VP9_SEG_LVL_MAX`` ++ - 4 ++ - Number of segment features. ++ ++.. _vp9_segmentation_flags: ++ ++``Segmentation Flags`` ++ ++.. tabularcolumns:: |p{10.6cm}|p{0.8cm}|p{5.9cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_ENABLED`` ++ - 0x01 ++ - Indicates that this frame makes use of the segmentation tool. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP`` ++ - 0x02 ++ - Indicates that the segmentation map should be updated during the ++ decoding of this frame. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE`` ++ - 0x04 ++ - Indicates that the updates to the segmentation map are coded ++ relative to the existing segmentation map. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA`` ++ - 0x08 ++ - Indicates that new parameters are about to be specified for each ++ segment. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE`` ++ - 0x10 ++ - Indicates that the segmentation parameters represent the actual values ++ to be used. ++ ++.. c:type:: v4l2_vp9_quantization ++ ++Encodes the quantization parameters. See section '7.2.9 Quantization params ++syntax' of the VP9 specification for more details. ++ ++.. tabularcolumns:: |p{0.8cm}|p{4cm}|p{12.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_vp9_quantization ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __u8 ++ - ``base_q_idx`` ++ - Indicates the base frame qindex. ++ * - __s8 ++ - ``delta_q_y_dc`` ++ - Indicates the Y DC quantizer relative to base_q_idx. ++ * - __s8 ++ - ``delta_q_uv_dc`` ++ - Indicates the UV DC quantizer relative to base_q_idx. ++ * - __s8 ++ - ``delta_q_uv_ac`` ++ - Indicates the UV AC quantizer relative to base_q_idx. ++ * - __u8 ++ - ``reserved[4]`` ++ - Applications and drivers must set this to zero. ++ ++.. c:type:: v4l2_vp9_loop_filter ++ ++This structure contains all loop filter related parameters. See sections ++'7.2.8 Loop filter semantics' of the :ref:`vp9` specification for more details. ++ ++.. tabularcolumns:: |p{0.8cm}|p{4cm}|p{12.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_vp9_loop_filter ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __s8 ++ - ``ref_deltas[4]`` ++ - Contains the adjustment needed for the filter level based on the chosen ++ reference frame. ++ * - __s8 ++ - ``mode_deltas[2]`` ++ - Contains the adjustment needed for the filter level based on the chosen ++ mode. ++ * - __u8 ++ - ``level`` ++ - Indicates the loop filter strength. ++ * - __u8 ++ - ``sharpness`` ++ - Indicates the sharpness level. ++ * - __u8 ++ - ``flags`` ++ - Combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags. ++ See :ref:`Loop Filter Flags `. ++ * - __u8 ++ - ``reserved[7]`` ++ - Applications and drivers must set this to zero. ++ ++ ++.. _vp9_loop_filter_flags: ++ ++``Loop Filter Flags`` ++ ++.. tabularcolumns:: |p{9.6cm}|p{0.5cm}|p{7.2cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED`` ++ - 0x1 ++ - When set, the filter level depends on the mode and reference frame used ++ to predict a block. ++ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE`` ++ - 0x2 ++ - When set, the bitstream contains additional syntax elements that ++ specify which mode and reference frame deltas are to be updated. +diff --git a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +index 0ede39907ee2..967fc803ef94 100644 +--- a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst ++++ b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +@@ -172,6 +172,21 @@ Compressed Formats + - VP9 compressed video frame. The encoder generates one + compressed frame per buffer, and the decoder requires one + compressed frame per buffer. ++ * .. _V4L2-PIX-FMT-VP9-FRAME: ++ ++ - ``V4L2_PIX_FMT_VP9_FRAME`` ++ - 'VP9F' ++ - VP9 parsed frame, including the frame header, as extracted from the container. ++ This format is adapted for stateless video decoders that implement a ++ VP9 pipeline with the :ref:`stateless_decoder`. ++ Metadata associated with the frame to decode is required to be passed ++ through the ``V4L2_CID_STATELESS_VP9_FRAME`` and ++ the ``V4L2_CID_STATELESS_VP9_COMPRESSED_HDR`` controls. ++ See the :ref:`associated Codec Control IDs `. ++ Exactly one output and one capture buffer must be provided for use with ++ this pixel format. The output buffer must contain the appropriate number ++ of macroblocks to decode a full corresponding frame to the matching ++ capture buffer. + * .. _V4L2-PIX-FMT-HEVC: + + - ``V4L2_PIX_FMT_HEVC`` +diff --git a/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst b/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +index fdde0ae6d521..29971a45a2d4 100644 +--- a/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst ++++ b/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +@@ -233,6 +233,14 @@ still cause this situation. + - ``p_mpeg2_quantisation`` + - A pointer to a struct :c:type:`v4l2_ctrl_mpeg2_quantisation`. Valid if this control is + of type ``V4L2_CTRL_TYPE_MPEG2_QUANTISATION``. ++ * - struct :c:type:`v4l2_ctrl_vp9_compressed_hdr` * ++ - ``p_vp9_compressed_hdr_probs`` ++ - A pointer to a struct :c:type:`v4l2_ctrl_vp9_compressed_hdr`. Valid if this ++ control is of type ``V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR``. ++ * - struct :c:type:`v4l2_ctrl_vp9_frame` * ++ - ``p_vp9_frame`` ++ - A pointer to a struct :c:type:`v4l2_ctrl_vp9_frame`. Valid if this ++ control is of type ``V4L2_CTRL_TYPE_VP9_FRAME``. + * - struct :c:type:`v4l2_ctrl_hdr10_cll_info` * + - ``p_hdr10_cll`` + - A pointer to a struct :c:type:`v4l2_ctrl_hdr10_cll_info`. Valid if this control is +diff --git a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +index 2f491c17dd5d..88f630252d98 100644 +--- a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst ++++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +@@ -513,6 +513,18 @@ See also the examples in :ref:`control`. + - n/a + - A struct :c:type:`v4l2_ctrl_hevc_decode_params`, containing HEVC + decoding parameters for stateless video decoders. ++ * - ``V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR`` ++ - n/a ++ - n/a ++ - n/a ++ - A struct :c:type:`v4l2_ctrl_vp9_compressed_hdr`, containing VP9 ++ probabilities updates for stateless video decoders. ++ * - ``V4L2_CTRL_TYPE_VP9_FRAME`` ++ - n/a ++ - n/a ++ - n/a ++ - A struct :c:type:`v4l2_ctrl_vp9_frame`, containing VP9 ++ frame decode parameters for stateless video decoders. + + .. raw:: latex + +diff --git a/Documentation/userspace-api/media/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/videodev2.h.rst.exceptions +index eb0b1cd37abd..9cbb7a0c354a 100644 +--- a/Documentation/userspace-api/media/videodev2.h.rst.exceptions ++++ b/Documentation/userspace-api/media/videodev2.h.rst.exceptions +@@ -149,6 +149,8 @@ replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_FWHT_PARAMS :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_VP8_FRAME :c:type:`v4l2_ctrl_type` ++replace symbol V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR :c:type:`v4l2_ctrl_type` ++replace symbol V4L2_CTRL_TYPE_VP9_FRAME :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_HDR10_CLL_INFO :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY :c:type:`v4l2_ctrl_type` + +diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c +index 70adfc1b9c81..54abe5245dcc 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls-core.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c +@@ -283,6 +283,12 @@ static void std_log(const struct v4l2_ctrl *ctrl) + case V4L2_CTRL_TYPE_MPEG2_PICTURE: + pr_cont("MPEG2_PICTURE"); + break; ++ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR: ++ pr_cont("VP9_COMPRESSED_HDR"); ++ break; ++ case V4L2_CTRL_TYPE_VP9_FRAME: ++ pr_cont("VP9_FRAME"); ++ break; + default: + pr_cont("unknown type %d", ctrl->type); + break; +@@ -317,6 +323,168 @@ static void std_log(const struct v4l2_ctrl *ctrl) + #define zero_reserved(s) \ + memset(&(s).reserved, 0, sizeof((s).reserved)) + ++static int ++validate_vp9_lf_params(struct v4l2_vp9_loop_filter *lf) ++{ ++ unsigned int i; ++ ++ if (lf->flags & ~(V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED | ++ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE)) ++ return -EINVAL; ++ ++ /* That all values are in the accepted range. */ ++ if (lf->level > GENMASK(5, 0)) ++ return -EINVAL; ++ ++ if (lf->sharpness > GENMASK(2, 0)) ++ return -EINVAL; ++ ++ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) ++ if (lf->ref_deltas[i] < -63 || lf->ref_deltas[i] > 63) ++ return -EINVAL; ++ ++ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) ++ if (lf->mode_deltas[i] < -63 || lf->mode_deltas[i] > 63) ++ return -EINVAL; ++ ++ zero_reserved(*lf); ++ return 0; ++} ++ ++static int ++validate_vp9_quant_params(struct v4l2_vp9_quantization *quant) ++{ ++ if (quant->delta_q_y_dc < -15 || quant->delta_q_y_dc > 15 || ++ quant->delta_q_uv_dc < -15 || quant->delta_q_uv_dc > 15 || ++ quant->delta_q_uv_ac < -15 || quant->delta_q_uv_ac > 15) ++ return -EINVAL; ++ ++ zero_reserved(*quant); ++ return 0; ++} ++ ++static int ++validate_vp9_seg_params(struct v4l2_vp9_segmentation *seg) ++{ ++ unsigned int i, j; ++ ++ if (seg->flags & ~(V4L2_VP9_SEGMENTATION_FLAG_ENABLED | ++ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP | ++ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE | ++ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA | ++ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) ++ return -EINVAL; ++ ++ for (i = 0; i < ARRAY_SIZE(seg->feature_enabled); i++) { ++ if (seg->feature_enabled[i] & ++ ~V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK) ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(seg->feature_data); i++) { ++ const int range[] = { 255, 63, 3, 0 }; ++ ++ for (j = 0; j < ARRAY_SIZE(seg->feature_data[j]); j++) { ++ if (seg->feature_data[i][j] < -range[j] || ++ seg->feature_data[i][j] > range[j]) ++ return -EINVAL; ++ } ++ } ++ ++ zero_reserved(*seg); ++ return 0; ++} ++ ++static int ++validate_vp9_compressed_hdr(struct v4l2_ctrl_vp9_compressed_hdr *hdr) ++{ ++ if (hdr->tx_mode > V4L2_VP9_TX_MODE_SELECT) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int ++validate_vp9_frame(struct v4l2_ctrl_vp9_frame *frame) ++{ ++ int ret; ++ ++ /* Make sure we're not passed invalid flags. */ ++ if (frame->flags & ~(V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_SHOW_FRAME | ++ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY | ++ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV | ++ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX | ++ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE | ++ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING | ++ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING | ++ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING)) ++ return -EINVAL; ++ ++ if (frame->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT && ++ frame->flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX) ++ return -EINVAL; ++ ++ if (frame->profile > V4L2_VP9_PROFILE_MAX) ++ return -EINVAL; ++ ++ if (frame->reset_frame_context > V4L2_VP9_RESET_FRAME_CTX_ALL) ++ return -EINVAL; ++ ++ if (frame->frame_context_idx >= V4L2_VP9_NUM_FRAME_CTX) ++ return -EINVAL; ++ ++ /* ++ * Profiles 0 and 1 only support 8-bit depth, profiles 2 and 3 only 10 ++ * and 12 bit depths. ++ */ ++ if ((frame->profile < 2 && frame->bit_depth != 8) || ++ (frame->profile >= 2 && ++ (frame->bit_depth != 10 && frame->bit_depth != 12))) ++ return -EINVAL; ++ ++ /* Profile 0 and 2 only accept YUV 4:2:0. */ ++ if ((frame->profile == 0 || frame->profile == 2) && ++ (!(frame->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) || ++ !(frame->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) ++ return -EINVAL; ++ ++ /* Profile 1 and 3 only accept YUV 4:2:2, 4:4:0 and 4:4:4. */ ++ if ((frame->profile == 1 || frame->profile == 3) && ++ ((frame->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) && ++ (frame->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) ++ return -EINVAL; ++ ++ if (frame->interpolation_filter > V4L2_VP9_INTERP_FILTER_SWITCHABLE) ++ return -EINVAL; ++ ++ /* ++ * According to the spec, tile_cols_log2 shall be less than or equal ++ * to 6. ++ */ ++ if (frame->tile_cols_log2 > 6) ++ return -EINVAL; ++ ++ if (frame->reference_mode > V4L2_VP9_REFERENCE_MODE_SELECT) ++ return -EINVAL; ++ ++ ret = validate_vp9_lf_params(&frame->lf); ++ if (ret) ++ return ret; ++ ++ ret = validate_vp9_quant_params(&frame->quant); ++ if (ret) ++ return ret; ++ ++ ret = validate_vp9_seg_params(&frame->seg); ++ if (ret) ++ return ret; ++ ++ zero_reserved(*frame); ++ return 0; ++} ++ + /* + * Compound controls validation requires setting unused fields/flags to zero + * in order to properly detect unchanged controls with std_equal's memcmp. +@@ -690,6 +858,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, + case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX: + break; + ++ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR: ++ return validate_vp9_compressed_hdr(p); ++ ++ case V4L2_CTRL_TYPE_VP9_FRAME: ++ return validate_vp9_frame(p); ++ + case V4L2_CTRL_TYPE_AREA: + area = p; + if (!area->width || !area->height) +@@ -1255,6 +1429,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, + case V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY: + elem_size = sizeof(struct v4l2_ctrl_hdr10_mastering_display); + break; ++ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR: ++ elem_size = sizeof(struct v4l2_ctrl_vp9_compressed_hdr); ++ break; ++ case V4L2_CTRL_TYPE_VP9_FRAME: ++ elem_size = sizeof(struct v4l2_ctrl_vp9_frame); ++ break; + case V4L2_CTRL_TYPE_AREA: + elem_size = sizeof(struct v4l2_area); + break; +diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c +index ebe82b6ba6e6..23594568b985 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c +@@ -1177,6 +1177,8 @@ const char *v4l2_ctrl_get_name(u32 id) + case V4L2_CID_STATELESS_MPEG2_SEQUENCE: return "MPEG-2 Sequence Header"; + case V4L2_CID_STATELESS_MPEG2_PICTURE: return "MPEG-2 Picture Header"; + case V4L2_CID_STATELESS_MPEG2_QUANTISATION: return "MPEG-2 Quantisation Matrices"; ++ case V4L2_CID_STATELESS_VP9_COMPRESSED_HDR: return "VP9 Probabilities Updates"; ++ case V4L2_CID_STATELESS_VP9_FRAME: return "VP9 Frame Decode Parameters"; + + /* Colorimetry controls */ + /* Keep the order of the 'case's the same as in v4l2-controls.h! */ +@@ -1498,6 +1500,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, + case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS: + *type = V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS; + break; ++ case V4L2_CID_STATELESS_VP9_COMPRESSED_HDR: ++ *type = V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR; ++ break; ++ case V4L2_CID_STATELESS_VP9_FRAME: ++ *type = V4L2_CTRL_TYPE_VP9_FRAME; ++ break; + case V4L2_CID_UNIT_CELL_SIZE: + *type = V4L2_CTRL_TYPE_AREA; + *flags |= V4L2_CTRL_FLAG_READ_ONLY; +diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c +index 31d0109ce5a8..51289d4741dc 100644 +--- a/drivers/media/v4l2-core/v4l2-ioctl.c ++++ b/drivers/media/v4l2-core/v4l2-ioctl.c +@@ -1413,6 +1413,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) + case V4L2_PIX_FMT_VP8: descr = "VP8"; break; + case V4L2_PIX_FMT_VP8_FRAME: descr = "VP8 Frame"; break; + case V4L2_PIX_FMT_VP9: descr = "VP9"; break; ++ case V4L2_PIX_FMT_VP9_FRAME: descr = "VP9 Frame"; break; + case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break; /* aka H.265 */ + case V4L2_PIX_FMT_HEVC_SLICE: descr = "HEVC Parsed Slice Data"; break; + case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */ +diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h +index 575b59fbac77..b3ce438f1329 100644 +--- a/include/media/v4l2-ctrls.h ++++ b/include/media/v4l2-ctrls.h +@@ -50,6 +50,8 @@ struct video_device; + * @p_h264_decode_params: Pointer to a struct v4l2_ctrl_h264_decode_params. + * @p_h264_pred_weights: Pointer to a struct v4l2_ctrl_h264_pred_weights. + * @p_vp8_frame: Pointer to a VP8 frame params structure. ++ * @p_vp9_compressed_hdr_probs: Pointer to a VP9 frame compressed header probs structure. ++ * @p_vp9_frame: Pointer to a VP9 frame params structure. + * @p_hevc_sps: Pointer to an HEVC sequence parameter set structure. + * @p_hevc_pps: Pointer to an HEVC picture parameter set structure. + * @p_hevc_slice_params: Pointer to an HEVC slice parameters structure. +@@ -80,6 +82,8 @@ union v4l2_ctrl_ptr { + struct v4l2_ctrl_hevc_sps *p_hevc_sps; + struct v4l2_ctrl_hevc_pps *p_hevc_pps; + struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params; ++ struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; ++ struct v4l2_ctrl_vp9_frame *p_vp9_frame; + struct v4l2_ctrl_hdr10_cll_info *p_hdr10_cll; + struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; + struct v4l2_area *p_area; +diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h +index 5fea5feb0412..f859b73f0490 100644 +--- a/include/uapi/linux/v4l2-controls.h ++++ b/include/uapi/linux/v4l2-controls.h +@@ -2016,6 +2016,290 @@ struct v4l2_ctrl_hdr10_mastering_display { + __u32 min_display_mastering_luminance; + }; + ++/* Stateless VP9 controls */ ++ ++#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 ++#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 ++ ++/** ++ * struct v4l2_vp9_loop_filter - VP9 loop filter parameters ++ * ++ * @ref_deltas: contains the adjustment needed for the filter level based on the ++ * chosen reference frame. If this syntax element is not present in the bitstream, ++ * users should pass its last value. ++ * @mode_deltas: contains the adjustment needed for the filter level based on the ++ * chosen mode. If this syntax element is not present in the bitstream, users should ++ * pass its last value. ++ * @level: indicates the loop filter strength. ++ * @sharpness: indicates the sharpness level. ++ * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. ++ * @reserved: padding field. Should be zeroed by applications. ++ * ++ * This structure contains all loop filter related parameters. See sections ++ * '7.2.8 Loop filter semantics' of the VP9 specification for more details. ++ */ ++struct v4l2_vp9_loop_filter { ++ __s8 ref_deltas[4]; ++ __s8 mode_deltas[2]; ++ __u8 level; ++ __u8 sharpness; ++ __u8 flags; ++ __u8 reserved[7]; ++}; ++ ++/** ++ * struct v4l2_vp9_quantization - VP9 quantization parameters ++ * ++ * @base_q_idx: indicates the base frame qindex. ++ * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. ++ * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. ++ * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. ++ * @reserved: padding field. Should be zeroed by applications. ++ * ++ * Encodes the quantization parameters. See section '7.2.9 Quantization params ++ * syntax' of the VP9 specification for more details. ++ */ ++struct v4l2_vp9_quantization { ++ __u8 base_q_idx; ++ __s8 delta_q_y_dc; ++ __s8 delta_q_uv_dc; ++ __s8 delta_q_uv_ac; ++ __u8 reserved[4]; ++}; ++ ++#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 ++#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 ++#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 ++#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 ++#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 ++ ++#define V4L2_VP9_SEG_LVL_ALT_Q 0 ++#define V4L2_VP9_SEG_LVL_ALT_L 1 ++#define V4L2_VP9_SEG_LVL_REF_FRAME 2 ++#define V4L2_VP9_SEG_LVL_SKIP 3 ++#define V4L2_VP9_SEG_LVL_MAX 4 ++ ++#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) ++#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf ++ ++/** ++ * struct v4l2_vp9_segmentation - VP9 segmentation parameters ++ * ++ * @feature_data: data attached to each feature. Data entry is only valid if ++ * the feature is enabled. The array shall be indexed with segment number as ++ * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. ++ * @feature_enabled: bitmask defining which features are enabled in each segment. ++ * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) ++ * values where id is one of V4L2_VP9_SEG_LVL_{}. ++ * @tree_probs: specifies the probability values to be used when decoding a ++ * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification ++ * for more details. ++ * @pred_probs: specifies the probability values to be used when decoding a ++ * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` ++ * for more details. ++ * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. ++ * @reserved: padding field. Should be zeroed by applications. ++ * ++ * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of ++ * the VP9 specification for more details. ++ */ ++struct v4l2_vp9_segmentation { ++ __s16 feature_data[8][4]; ++ __u8 feature_enabled[8]; ++ __u8 tree_probs[7]; ++ __u8 pred_probs[3]; ++ __u8 flags; ++ __u8 reserved[5]; ++}; ++ ++#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 ++#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 ++#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 ++#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 ++#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 ++#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 ++#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 ++#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 ++#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 ++#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 ++ ++#define V4L2_VP9_SIGN_BIAS_LAST 0x1 ++#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 ++#define V4L2_VP9_SIGN_BIAS_ALT 0x4 ++ ++#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 ++#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 ++#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 ++ ++#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 ++#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 ++#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 ++#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 ++#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 ++ ++#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 ++#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 ++#define V4L2_VP9_REFERENCE_MODE_SELECT 2 ++ ++#define V4L2_VP9_PROFILE_MAX 3 ++ ++#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) ++/** ++ * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control ++ * ++ * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. ++ * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. ++ * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. ++ * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. ++ * @compressed_header_size: compressed header size in bytes. ++ * @uncompressed_header_size: uncompressed header size in bytes. ++ * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. ++ * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. ++ * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in ++ * pixels. This is not used during the decoding process but might be used by HW scalers ++ * to prepare a frame that's ready for scanout. ++ * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in ++ * pixels. This is not used during the decoding process but might be used by HW scalers ++ * to prepare a frame that's ready for scanout. ++ * @last_frame_ts: "last" reference buffer timestamp. ++ * The timestamp refers to the timestamp field in struct v4l2_buffer. ++ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. ++ * @golden_frame_ts: "golden" reference buffer timestamp. ++ * The timestamp refers to the timestamp field in struct v4l2_buffer. ++ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. ++ * @alt_frame_ts: "alt" reference buffer timestamp. ++ * The timestamp refers to the timestamp field in struct v4l2_buffer. ++ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. ++ * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given ++ * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. ++ * @reset_frame_context: specifies whether the frame context should be reset to default values. ++ * Either of V4L2_VP9_RESET_FRAME_CTX_{}. ++ * @frame_context_idx: frame context that should be used/updated. ++ * @profile: VP9 profile. Can be 0, 1, 2 or 3. ++ * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support ++ * 10 and/or 12 bits depths. ++ * @interpolation_filter: specifies the filter selection used for performing inter prediction. ++ * Set to one of V4L2_VP9_INTERP_FILTER_{}. ++ * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width ++ * is measured in units of 8x8 blocks). Shall be less than or equal to 6. ++ * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height ++ * is measured in units of 8x8 blocks). ++ * @reference_mode: specifies the type of inter prediction to be used. ++ * Set to one of V4L2_VP9_REFERENCE_MODE_{}. ++ * @reserved: padding field. Should be zeroed by applications. ++ */ ++struct v4l2_ctrl_vp9_frame { ++ struct v4l2_vp9_loop_filter lf; ++ struct v4l2_vp9_quantization quant; ++ struct v4l2_vp9_segmentation seg; ++ __u32 flags; ++ __u16 compressed_header_size; ++ __u16 uncompressed_header_size; ++ __u16 frame_width_minus_1; ++ __u16 frame_height_minus_1; ++ __u16 render_width_minus_1; ++ __u16 render_height_minus_1; ++ __u64 last_frame_ts; ++ __u64 golden_frame_ts; ++ __u64 alt_frame_ts; ++ __u8 ref_frame_sign_bias; ++ __u8 reset_frame_context; ++ __u8 frame_context_idx; ++ __u8 profile; ++ __u8 bit_depth; ++ __u8 interpolation_filter; ++ __u8 tile_cols_log2; ++ __u8 tile_rows_log2; ++ __u8 reference_mode; ++ __u8 reserved[7]; ++}; ++ ++#define V4L2_VP9_NUM_FRAME_CTX 4 ++ ++/** ++ * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates ++ * @joint: motion vector joint probability updates. ++ * @sign: motion vector sign probability updates. ++ * @classes: motion vector class probability updates. ++ * @class0_bit: motion vector class0 bit probability updates. ++ * @bits: motion vector bits probability updates. ++ * @class0_fr: motion vector class0 fractional bit probability updates. ++ * @fr: motion vector fractional bit probability updates. ++ * @class0_hp: motion vector class0 high precision fractional bit probability updates. ++ * @hp: motion vector high precision fractional bit probability updates. ++ * ++ * This structure contains new values of motion vector probabilities. ++ * A value of zero in an array element means there is no update of the relevant probability. ++ * See `struct v4l2_vp9_prob_updates` for details. ++ */ ++struct v4l2_vp9_mv_probs { ++ __u8 joint[3]; ++ __u8 sign[2]; ++ __u8 classes[2][10]; ++ __u8 class0_bit[2]; ++ __u8 bits[2][10]; ++ __u8 class0_fr[2][2][3]; ++ __u8 fr[2][3]; ++ __u8 class0_hp[2]; ++ __u8 hp[2]; ++}; ++ ++#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) ++ ++#define V4L2_VP9_TX_MODE_ONLY_4X4 0 ++#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 ++#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 ++#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 ++#define V4L2_VP9_TX_MODE_SELECT 4 ++ ++/** ++ * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control ++ * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. ++ * @tx8: TX 8x8 probability updates. ++ * @tx16: TX 16x16 probability updates. ++ * @tx32: TX 32x32 probability updates. ++ * @coef: coefficient probability updates. ++ * @skip: skip probability updates. ++ * @inter_mode: inter mode probability updates. ++ * @interp_filter: interpolation filter probability updates. ++ * @is_inter: is inter-block probability updates. ++ * @comp_mode: compound prediction mode probability updates. ++ * @single_ref: single ref probability updates. ++ * @comp_ref: compound ref probability updates. ++ * @y_mode: Y prediction mode probability updates. ++ * @uv_mode: UV prediction mode probability updates. ++ * @partition: partition probability updates. ++ * @mv: motion vector probability updates. ++ * ++ * This structure holds the probabilities update as parsed in the compressed ++ * header (Spec 6.3). These values represent the value of probability update after ++ * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element ++ * means that there is no update of the relevant probability. ++ * ++ * This control is optional and needs to be used when dealing with the hardware which is ++ * not capable of parsing the compressed header itself. Only drivers which need it will ++ * implement it. ++ */ ++struct v4l2_ctrl_vp9_compressed_hdr { ++ __u8 tx_mode; ++ __u8 tx8[2][1]; ++ __u8 tx16[2][2]; ++ __u8 tx32[2][3]; ++ __u8 coef[4][2][2][6][6][3]; ++ __u8 skip[3]; ++ __u8 inter_mode[7][3]; ++ __u8 interp_filter[4][2]; ++ __u8 is_inter[4]; ++ __u8 comp_mode[5]; ++ __u8 single_ref[5][2]; ++ __u8 comp_ref[5]; ++ __u8 y_mode[4][9]; ++ __u8 uv_mode[10][9]; ++ __u8 partition[16][3]; ++ ++ struct v4l2_vp9_mv_probs mv; ++}; ++ + /* MPEG-compression definitions kept for backwards compatibility */ + #ifndef __KERNEL__ + #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC +diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h +index f118fe7a9f58..df8b9c486ba1 100644 +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -703,6 +703,7 @@ struct v4l2_pix_format { + #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ + #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ + #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ ++#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ + #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ + #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ + #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ +@@ -1759,6 +1760,8 @@ struct v4l2_ext_control { + struct v4l2_ctrl_mpeg2_sequence __user *p_mpeg2_sequence; + struct v4l2_ctrl_mpeg2_picture __user *p_mpeg2_picture; + struct v4l2_ctrl_mpeg2_quantisation __user *p_mpeg2_quantisation; ++ struct v4l2_ctrl_vp9_compressed_hdr __user *p_vp9_compressed_hdr_probs; ++ struct v4l2_ctrl_vp9_frame __user *p_vp9_frame; + void __user *ptr; + }; + } __attribute__ ((packed)); +@@ -1823,6 +1826,9 @@ enum v4l2_ctrl_type { + V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, + V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, + V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, ++ ++ V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, ++ V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, + }; + + /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ diff --git a/projects/Allwinner/patches/linux/0072-media-Add-VP9-v4l2-library.patch b/projects/Allwinner/patches/linux/0072-media-Add-VP9-v4l2-library.patch new file mode 100644 index 0000000000..62f9c5091c --- /dev/null +++ b/projects/Allwinner/patches/linux/0072-media-Add-VP9-v4l2-library.patch @@ -0,0 +1,2141 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:36 +0100 +Subject: [PATCH] media: Add VP9 v4l2 library + +Provide code common to vp9 drivers in one central location. + +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +--- + drivers/media/v4l2-core/Kconfig | 4 + + drivers/media/v4l2-core/Makefile | 1 + + drivers/media/v4l2-core/v4l2-vp9.c | 1850 ++++++++++++++++++++++++++++ + include/media/v4l2-vp9.h | 233 ++++ + 4 files changed, 2088 insertions(+) + create mode 100644 drivers/media/v4l2-core/v4l2-vp9.c + create mode 100644 include/media/v4l2-vp9.h + +diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig +index 02dc1787e953..6ee75c6c820e 100644 +--- a/drivers/media/v4l2-core/Kconfig ++++ b/drivers/media/v4l2-core/Kconfig +@@ -52,6 +52,10 @@ config V4L2_JPEG_HELPER + config V4L2_H264 + tristate + ++# Used by drivers that need v4l2-vp9.ko ++config V4L2_VP9 ++ tristate ++ + # Used by drivers that need v4l2-mem2mem.ko + config V4L2_MEM2MEM_DEV + tristate +diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile +index 66a78c556c98..83fac5c746f5 100644 +--- a/drivers/media/v4l2-core/Makefile ++++ b/drivers/media/v4l2-core/Makefile +@@ -24,6 +24,7 @@ obj-$(CONFIG_VIDEO_TUNER) += tuner.o + + obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o + obj-$(CONFIG_V4L2_H264) += v4l2-h264.o ++obj-$(CONFIG_V4L2_VP9) += v4l2-vp9.o + + obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o + +diff --git a/drivers/media/v4l2-core/v4l2-vp9.c b/drivers/media/v4l2-core/v4l2-vp9.c +new file mode 100644 +index 000000000000..859589f1fd35 +--- /dev/null ++++ b/drivers/media/v4l2-core/v4l2-vp9.c +@@ -0,0 +1,1850 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * V4L2 VP9 helpers. ++ * ++ * Copyright (C) 2021 Collabora, Ltd. ++ * ++ * Author: Andrzej Pietrasiewicz ++ */ ++ ++#include ++ ++#include ++ ++const u8 v4l2_vp9_kf_y_mode_prob[10][10][9] = { ++ { ++ /* above = dc */ ++ { 137, 30, 42, 148, 151, 207, 70, 52, 91 }, /*left = dc */ ++ { 92, 45, 102, 136, 116, 180, 74, 90, 100 }, /*left = v */ ++ { 73, 32, 19, 187, 222, 215, 46, 34, 100 }, /*left = h */ ++ { 91, 30, 32, 116, 121, 186, 93, 86, 94 }, /*left = d45 */ ++ { 72, 35, 36, 149, 68, 206, 68, 63, 105 }, /*left = d135*/ ++ { 73, 31, 28, 138, 57, 124, 55, 122, 151 }, /*left = d117*/ ++ { 67, 23, 21, 140, 126, 197, 40, 37, 171 }, /*left = d153*/ ++ { 86, 27, 28, 128, 154, 212, 45, 43, 53 }, /*left = d207*/ ++ { 74, 32, 27, 107, 86, 160, 63, 134, 102 }, /*left = d63 */ ++ { 59, 67, 44, 140, 161, 202, 78, 67, 119 }, /*left = tm */ ++ }, { /* above = v */ ++ { 63, 36, 126, 146, 123, 158, 60, 90, 96 }, /*left = dc */ ++ { 43, 46, 168, 134, 107, 128, 69, 142, 92 }, /*left = v */ ++ { 44, 29, 68, 159, 201, 177, 50, 57, 77 }, /*left = h */ ++ { 58, 38, 76, 114, 97, 172, 78, 133, 92 }, /*left = d45 */ ++ { 46, 41, 76, 140, 63, 184, 69, 112, 57 }, /*left = d135*/ ++ { 38, 32, 85, 140, 46, 112, 54, 151, 133 }, /*left = d117*/ ++ { 39, 27, 61, 131, 110, 175, 44, 75, 136 }, /*left = d153*/ ++ { 52, 30, 74, 113, 130, 175, 51, 64, 58 }, /*left = d207*/ ++ { 47, 35, 80, 100, 74, 143, 64, 163, 74 }, /*left = d63 */ ++ { 36, 61, 116, 114, 128, 162, 80, 125, 82 }, /*left = tm */ ++ }, { /* above = h */ ++ { 82, 26, 26, 171, 208, 204, 44, 32, 105 }, /*left = dc */ ++ { 55, 44, 68, 166, 179, 192, 57, 57, 108 }, /*left = v */ ++ { 42, 26, 11, 199, 241, 228, 23, 15, 85 }, /*left = h */ ++ { 68, 42, 19, 131, 160, 199, 55, 52, 83 }, /*left = d45 */ ++ { 58, 50, 25, 139, 115, 232, 39, 52, 118 }, /*left = d135*/ ++ { 50, 35, 33, 153, 104, 162, 64, 59, 131 }, /*left = d117*/ ++ { 44, 24, 16, 150, 177, 202, 33, 19, 156 }, /*left = d153*/ ++ { 55, 27, 12, 153, 203, 218, 26, 27, 49 }, /*left = d207*/ ++ { 53, 49, 21, 110, 116, 168, 59, 80, 76 }, /*left = d63 */ ++ { 38, 72, 19, 168, 203, 212, 50, 50, 107 }, /*left = tm */ ++ }, { /* above = d45 */ ++ { 103, 26, 36, 129, 132, 201, 83, 80, 93 }, /*left = dc */ ++ { 59, 38, 83, 112, 103, 162, 98, 136, 90 }, /*left = v */ ++ { 62, 30, 23, 158, 200, 207, 59, 57, 50 }, /*left = h */ ++ { 67, 30, 29, 84, 86, 191, 102, 91, 59 }, /*left = d45 */ ++ { 60, 32, 33, 112, 71, 220, 64, 89, 104 }, /*left = d135*/ ++ { 53, 26, 34, 130, 56, 149, 84, 120, 103 }, /*left = d117*/ ++ { 53, 21, 23, 133, 109, 210, 56, 77, 172 }, /*left = d153*/ ++ { 77, 19, 29, 112, 142, 228, 55, 66, 36 }, /*left = d207*/ ++ { 61, 29, 29, 93, 97, 165, 83, 175, 162 }, /*left = d63 */ ++ { 47, 47, 43, 114, 137, 181, 100, 99, 95 }, /*left = tm */ ++ }, { /* above = d135 */ ++ { 69, 23, 29, 128, 83, 199, 46, 44, 101 }, /*left = dc */ ++ { 53, 40, 55, 139, 69, 183, 61, 80, 110 }, /*left = v */ ++ { 40, 29, 19, 161, 180, 207, 43, 24, 91 }, /*left = h */ ++ { 60, 34, 19, 105, 61, 198, 53, 64, 89 }, /*left = d45 */ ++ { 52, 31, 22, 158, 40, 209, 58, 62, 89 }, /*left = d135*/ ++ { 44, 31, 29, 147, 46, 158, 56, 102, 198 }, /*left = d117*/ ++ { 35, 19, 12, 135, 87, 209, 41, 45, 167 }, /*left = d153*/ ++ { 55, 25, 21, 118, 95, 215, 38, 39, 66 }, /*left = d207*/ ++ { 51, 38, 25, 113, 58, 164, 70, 93, 97 }, /*left = d63 */ ++ { 47, 54, 34, 146, 108, 203, 72, 103, 151 }, /*left = tm */ ++ }, { /* above = d117 */ ++ { 64, 19, 37, 156, 66, 138, 49, 95, 133 }, /*left = dc */ ++ { 46, 27, 80, 150, 55, 124, 55, 121, 135 }, /*left = v */ ++ { 36, 23, 27, 165, 149, 166, 54, 64, 118 }, /*left = h */ ++ { 53, 21, 36, 131, 63, 163, 60, 109, 81 }, /*left = d45 */ ++ { 40, 26, 35, 154, 40, 185, 51, 97, 123 }, /*left = d135*/ ++ { 35, 19, 34, 179, 19, 97, 48, 129, 124 }, /*left = d117*/ ++ { 36, 20, 26, 136, 62, 164, 33, 77, 154 }, /*left = d153*/ ++ { 45, 18, 32, 130, 90, 157, 40, 79, 91 }, /*left = d207*/ ++ { 45, 26, 28, 129, 45, 129, 49, 147, 123 }, /*left = d63 */ ++ { 38, 44, 51, 136, 74, 162, 57, 97, 121 }, /*left = tm */ ++ }, { /* above = d153 */ ++ { 75, 17, 22, 136, 138, 185, 32, 34, 166 }, /*left = dc */ ++ { 56, 39, 58, 133, 117, 173, 48, 53, 187 }, /*left = v */ ++ { 35, 21, 12, 161, 212, 207, 20, 23, 145 }, /*left = h */ ++ { 56, 29, 19, 117, 109, 181, 55, 68, 112 }, /*left = d45 */ ++ { 47, 29, 17, 153, 64, 220, 59, 51, 114 }, /*left = d135*/ ++ { 46, 16, 24, 136, 76, 147, 41, 64, 172 }, /*left = d117*/ ++ { 34, 17, 11, 108, 152, 187, 13, 15, 209 }, /*left = d153*/ ++ { 51, 24, 14, 115, 133, 209, 32, 26, 104 }, /*left = d207*/ ++ { 55, 30, 18, 122, 79, 179, 44, 88, 116 }, /*left = d63 */ ++ { 37, 49, 25, 129, 168, 164, 41, 54, 148 }, /*left = tm */ ++ }, { /* above = d207 */ ++ { 82, 22, 32, 127, 143, 213, 39, 41, 70 }, /*left = dc */ ++ { 62, 44, 61, 123, 105, 189, 48, 57, 64 }, /*left = v */ ++ { 47, 25, 17, 175, 222, 220, 24, 30, 86 }, /*left = h */ ++ { 68, 36, 17, 106, 102, 206, 59, 74, 74 }, /*left = d45 */ ++ { 57, 39, 23, 151, 68, 216, 55, 63, 58 }, /*left = d135*/ ++ { 49, 30, 35, 141, 70, 168, 82, 40, 115 }, /*left = d117*/ ++ { 51, 25, 15, 136, 129, 202, 38, 35, 139 }, /*left = d153*/ ++ { 68, 26, 16, 111, 141, 215, 29, 28, 28 }, /*left = d207*/ ++ { 59, 39, 19, 114, 75, 180, 77, 104, 42 }, /*left = d63 */ ++ { 40, 61, 26, 126, 152, 206, 61, 59, 93 }, /*left = tm */ ++ }, { /* above = d63 */ ++ { 78, 23, 39, 111, 117, 170, 74, 124, 94 }, /*left = dc */ ++ { 48, 34, 86, 101, 92, 146, 78, 179, 134 }, /*left = v */ ++ { 47, 22, 24, 138, 187, 178, 68, 69, 59 }, /*left = h */ ++ { 56, 25, 33, 105, 112, 187, 95, 177, 129 }, /*left = d45 */ ++ { 48, 31, 27, 114, 63, 183, 82, 116, 56 }, /*left = d135*/ ++ { 43, 28, 37, 121, 63, 123, 61, 192, 169 }, /*left = d117*/ ++ { 42, 17, 24, 109, 97, 177, 56, 76, 122 }, /*left = d153*/ ++ { 58, 18, 28, 105, 139, 182, 70, 92, 63 }, /*left = d207*/ ++ { 46, 23, 32, 74, 86, 150, 67, 183, 88 }, /*left = d63 */ ++ { 36, 38, 48, 92, 122, 165, 88, 137, 91 }, /*left = tm */ ++ }, { /* above = tm */ ++ { 65, 70, 60, 155, 159, 199, 61, 60, 81 }, /*left = dc */ ++ { 44, 78, 115, 132, 119, 173, 71, 112, 93 }, /*left = v */ ++ { 39, 38, 21, 184, 227, 206, 42, 32, 64 }, /*left = h */ ++ { 58, 47, 36, 124, 137, 193, 80, 82, 78 }, /*left = d45 */ ++ { 49, 50, 35, 144, 95, 205, 63, 78, 59 }, /*left = d135*/ ++ { 41, 53, 52, 148, 71, 142, 65, 128, 51 }, /*left = d117*/ ++ { 40, 36, 28, 143, 143, 202, 40, 55, 137 }, /*left = d153*/ ++ { 52, 34, 29, 129, 183, 227, 42, 35, 43 }, /*left = d207*/ ++ { 42, 44, 44, 104, 105, 164, 64, 130, 80 }, /*left = d63 */ ++ { 43, 81, 53, 140, 169, 204, 68, 84, 72 }, /*left = tm */ ++ } ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_kf_y_mode_prob); ++ ++const u8 v4l2_vp9_kf_partition_probs[16][3] = { ++ /* 8x8 -> 4x4 */ ++ { 158, 97, 94 }, /* a/l both not split */ ++ { 93, 24, 99 }, /* a split, l not split */ ++ { 85, 119, 44 }, /* l split, a not split */ ++ { 62, 59, 67 }, /* a/l both split */ ++ /* 16x16 -> 8x8 */ ++ { 149, 53, 53 }, /* a/l both not split */ ++ { 94, 20, 48 }, /* a split, l not split */ ++ { 83, 53, 24 }, /* l split, a not split */ ++ { 52, 18, 18 }, /* a/l both split */ ++ /* 32x32 -> 16x16 */ ++ { 150, 40, 39 }, /* a/l both not split */ ++ { 78, 12, 26 }, /* a split, l not split */ ++ { 67, 33, 11 }, /* l split, a not split */ ++ { 24, 7, 5 }, /* a/l both split */ ++ /* 64x64 -> 32x32 */ ++ { 174, 35, 49 }, /* a/l both not split */ ++ { 68, 11, 27 }, /* a split, l not split */ ++ { 57, 15, 9 }, /* l split, a not split */ ++ { 12, 3, 3 }, /* a/l both split */ ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_kf_partition_probs); ++ ++const u8 v4l2_vp9_kf_uv_mode_prob[10][9] = { ++ { 144, 11, 54, 157, 195, 130, 46, 58, 108 }, /* y = dc */ ++ { 118, 15, 123, 148, 131, 101, 44, 93, 131 }, /* y = v */ ++ { 113, 12, 23, 188, 226, 142, 26, 32, 125 }, /* y = h */ ++ { 120, 11, 50, 123, 163, 135, 64, 77, 103 }, /* y = d45 */ ++ { 113, 9, 36, 155, 111, 157, 32, 44, 161 }, /* y = d135 */ ++ { 116, 9, 55, 176, 76, 96, 37, 61, 149 }, /* y = d117 */ ++ { 115, 9, 28, 141, 161, 167, 21, 25, 193 }, /* y = d153 */ ++ { 120, 12, 32, 145, 195, 142, 32, 38, 86 }, /* y = d207 */ ++ { 116, 12, 64, 120, 140, 125, 49, 115, 121 }, /* y = d63 */ ++ { 102, 19, 66, 162, 182, 122, 35, 59, 128 } /* y = tm */ ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_kf_uv_mode_prob); ++ ++const struct v4l2_vp9_frame_context v4l2_vp9_default_probs = { ++ .tx8 = { ++ { 100 }, ++ { 66 }, ++ }, ++ .tx16 = { ++ { 20, 152 }, ++ { 15, 101 }, ++ }, ++ .tx32 = { ++ { 3, 136, 37 }, ++ { 5, 52, 13 }, ++ }, ++ .coef = { ++ { /* tx = 4x4 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 195, 29, 183 }, ++ { 84, 49, 136 }, ++ { 8, 42, 71 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 31, 107, 169 }, ++ { 35, 99, 159 }, ++ { 17, 82, 140 }, ++ { 8, 66, 114 }, ++ { 2, 44, 76 }, ++ { 1, 19, 32 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 40, 132, 201 }, ++ { 29, 114, 187 }, ++ { 13, 91, 157 }, ++ { 7, 75, 127 }, ++ { 3, 58, 95 }, ++ { 1, 28, 47 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 69, 142, 221 }, ++ { 42, 122, 201 }, ++ { 15, 91, 159 }, ++ { 6, 67, 121 }, ++ { 1, 42, 77 }, ++ { 1, 17, 31 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 102, 148, 228 }, ++ { 67, 117, 204 }, ++ { 17, 82, 154 }, ++ { 6, 59, 114 }, ++ { 2, 39, 75 }, ++ { 1, 15, 29 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 156, 57, 233 }, ++ { 119, 57, 212 }, ++ { 58, 48, 163 }, ++ { 29, 40, 124 }, ++ { 12, 30, 81 }, ++ { 3, 12, 31 } ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 191, 107, 226 }, ++ { 124, 117, 204 }, ++ { 25, 99, 155 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 29, 148, 210 }, ++ { 37, 126, 194 }, ++ { 8, 93, 157 }, ++ { 2, 68, 118 }, ++ { 1, 39, 69 }, ++ { 1, 17, 33 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 41, 151, 213 }, ++ { 27, 123, 193 }, ++ { 3, 82, 144 }, ++ { 1, 58, 105 }, ++ { 1, 32, 60 }, ++ { 1, 13, 26 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 59, 159, 220 }, ++ { 23, 126, 198 }, ++ { 4, 88, 151 }, ++ { 1, 66, 114 }, ++ { 1, 38, 71 }, ++ { 1, 18, 34 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 114, 136, 232 }, ++ { 51, 114, 207 }, ++ { 11, 83, 155 }, ++ { 3, 56, 105 }, ++ { 1, 33, 65 }, ++ { 1, 17, 34 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 149, 65, 234 }, ++ { 121, 57, 215 }, ++ { 61, 49, 166 }, ++ { 28, 36, 114 }, ++ { 12, 25, 76 }, ++ { 3, 16, 42 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 214, 49, 220 }, ++ { 132, 63, 188 }, ++ { 42, 65, 137 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 85, 137, 221 }, ++ { 104, 131, 216 }, ++ { 49, 111, 192 }, ++ { 21, 87, 155 }, ++ { 2, 49, 87 }, ++ { 1, 16, 28 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 89, 163, 230 }, ++ { 90, 137, 220 }, ++ { 29, 100, 183 }, ++ { 10, 70, 135 }, ++ { 2, 42, 81 }, ++ { 1, 17, 33 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 108, 167, 237 }, ++ { 55, 133, 222 }, ++ { 15, 97, 179 }, ++ { 4, 72, 135 }, ++ { 1, 45, 85 }, ++ { 1, 19, 38 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 124, 146, 240 }, ++ { 66, 124, 224 }, ++ { 17, 88, 175 }, ++ { 4, 58, 122 }, ++ { 1, 36, 75 }, ++ { 1, 18, 37 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 141, 79, 241 }, ++ { 126, 70, 227 }, ++ { 66, 58, 182 }, ++ { 30, 44, 136 }, ++ { 12, 34, 96 }, ++ { 2, 20, 47 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 229, 99, 249 }, ++ { 143, 111, 235 }, ++ { 46, 109, 192 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 82, 158, 236 }, ++ { 94, 146, 224 }, ++ { 25, 117, 191 }, ++ { 9, 87, 149 }, ++ { 3, 56, 99 }, ++ { 1, 33, 57 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 83, 167, 237 }, ++ { 68, 145, 222 }, ++ { 10, 103, 177 }, ++ { 2, 72, 131 }, ++ { 1, 41, 79 }, ++ { 1, 20, 39 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 99, 167, 239 }, ++ { 47, 141, 224 }, ++ { 10, 104, 178 }, ++ { 2, 73, 133 }, ++ { 1, 44, 85 }, ++ { 1, 22, 47 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 127, 145, 243 }, ++ { 71, 129, 228 }, ++ { 17, 93, 177 }, ++ { 3, 61, 124 }, ++ { 1, 41, 84 }, ++ { 1, 21, 52 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 157, 78, 244 }, ++ { 140, 72, 231 }, ++ { 69, 58, 184 }, ++ { 31, 44, 137 }, ++ { 14, 38, 105 }, ++ { 8, 23, 61 }, ++ }, ++ }, ++ }, ++ }, ++ { /* tx = 8x8 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 125, 34, 187 }, ++ { 52, 41, 133 }, ++ { 6, 31, 56 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 37, 109, 153 }, ++ { 51, 102, 147 }, ++ { 23, 87, 128 }, ++ { 8, 67, 101 }, ++ { 1, 41, 63 }, ++ { 1, 19, 29 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 31, 154, 185 }, ++ { 17, 127, 175 }, ++ { 6, 96, 145 }, ++ { 2, 73, 114 }, ++ { 1, 51, 82 }, ++ { 1, 28, 45 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 23, 163, 200 }, ++ { 10, 131, 185 }, ++ { 2, 93, 148 }, ++ { 1, 67, 111 }, ++ { 1, 41, 69 }, ++ { 1, 14, 24 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 29, 176, 217 }, ++ { 12, 145, 201 }, ++ { 3, 101, 156 }, ++ { 1, 69, 111 }, ++ { 1, 39, 63 }, ++ { 1, 14, 23 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 57, 192, 233 }, ++ { 25, 154, 215 }, ++ { 6, 109, 167 }, ++ { 3, 78, 118 }, ++ { 1, 48, 69 }, ++ { 1, 21, 29 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 202, 105, 245 }, ++ { 108, 106, 216 }, ++ { 18, 90, 144 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 33, 172, 219 }, ++ { 64, 149, 206 }, ++ { 14, 117, 177 }, ++ { 5, 90, 141 }, ++ { 2, 61, 95 }, ++ { 1, 37, 57 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 33, 179, 220 }, ++ { 11, 140, 198 }, ++ { 1, 89, 148 }, ++ { 1, 60, 104 }, ++ { 1, 33, 57 }, ++ { 1, 12, 21 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 30, 181, 221 }, ++ { 8, 141, 198 }, ++ { 1, 87, 145 }, ++ { 1, 58, 100 }, ++ { 1, 31, 55 }, ++ { 1, 12, 20 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 32, 186, 224 }, ++ { 7, 142, 198 }, ++ { 1, 86, 143 }, ++ { 1, 58, 100 }, ++ { 1, 31, 55 }, ++ { 1, 12, 22 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 57, 192, 227 }, ++ { 20, 143, 204 }, ++ { 3, 96, 154 }, ++ { 1, 68, 112 }, ++ { 1, 42, 69 }, ++ { 1, 19, 32 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 212, 35, 215 }, ++ { 113, 47, 169 }, ++ { 29, 48, 105 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 74, 129, 203 }, ++ { 106, 120, 203 }, ++ { 49, 107, 178 }, ++ { 19, 84, 144 }, ++ { 4, 50, 84 }, ++ { 1, 15, 25 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 71, 172, 217 }, ++ { 44, 141, 209 }, ++ { 15, 102, 173 }, ++ { 6, 76, 133 }, ++ { 2, 51, 89 }, ++ { 1, 24, 42 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 64, 185, 231 }, ++ { 31, 148, 216 }, ++ { 8, 103, 175 }, ++ { 3, 74, 131 }, ++ { 1, 46, 81 }, ++ { 1, 18, 30 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 65, 196, 235 }, ++ { 25, 157, 221 }, ++ { 5, 105, 174 }, ++ { 1, 67, 120 }, ++ { 1, 38, 69 }, ++ { 1, 15, 30 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 65, 204, 238 }, ++ { 30, 156, 224 }, ++ { 7, 107, 177 }, ++ { 2, 70, 124 }, ++ { 1, 42, 73 }, ++ { 1, 18, 34 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 225, 86, 251 }, ++ { 144, 104, 235 }, ++ { 42, 99, 181 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 85, 175, 239 }, ++ { 112, 165, 229 }, ++ { 29, 136, 200 }, ++ { 12, 103, 162 }, ++ { 6, 77, 123 }, ++ { 2, 53, 84 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 75, 183, 239 }, ++ { 30, 155, 221 }, ++ { 3, 106, 171 }, ++ { 1, 74, 128 }, ++ { 1, 44, 76 }, ++ { 1, 17, 28 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 73, 185, 240 }, ++ { 27, 159, 222 }, ++ { 2, 107, 172 }, ++ { 1, 75, 127 }, ++ { 1, 42, 73 }, ++ { 1, 17, 29 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 62, 190, 238 }, ++ { 21, 159, 222 }, ++ { 2, 107, 172 }, ++ { 1, 72, 122 }, ++ { 1, 40, 71 }, ++ { 1, 18, 32 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 61, 199, 240 }, ++ { 27, 161, 226 }, ++ { 4, 113, 180 }, ++ { 1, 76, 129 }, ++ { 1, 46, 80 }, ++ { 1, 23, 41 }, ++ }, ++ }, ++ }, ++ }, ++ { /* tx = 16x16 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 7, 27, 153 }, ++ { 5, 30, 95 }, ++ { 1, 16, 30 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 50, 75, 127 }, ++ { 57, 75, 124 }, ++ { 27, 67, 108 }, ++ { 10, 54, 86 }, ++ { 1, 33, 52 }, ++ { 1, 12, 18 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 43, 125, 151 }, ++ { 26, 108, 148 }, ++ { 7, 83, 122 }, ++ { 2, 59, 89 }, ++ { 1, 38, 60 }, ++ { 1, 17, 27 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 23, 144, 163 }, ++ { 13, 112, 154 }, ++ { 2, 75, 117 }, ++ { 1, 50, 81 }, ++ { 1, 31, 51 }, ++ { 1, 14, 23 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 18, 162, 185 }, ++ { 6, 123, 171 }, ++ { 1, 78, 125 }, ++ { 1, 51, 86 }, ++ { 1, 31, 54 }, ++ { 1, 14, 23 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 15, 199, 227 }, ++ { 3, 150, 204 }, ++ { 1, 91, 146 }, ++ { 1, 55, 95 }, ++ { 1, 30, 53 }, ++ { 1, 11, 20 }, ++ } ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 19, 55, 240 }, ++ { 19, 59, 196 }, ++ { 3, 52, 105 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 41, 166, 207 }, ++ { 104, 153, 199 }, ++ { 31, 123, 181 }, ++ { 14, 101, 152 }, ++ { 5, 72, 106 }, ++ { 1, 36, 52 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 35, 176, 211 }, ++ { 12, 131, 190 }, ++ { 2, 88, 144 }, ++ { 1, 60, 101 }, ++ { 1, 36, 60 }, ++ { 1, 16, 28 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 28, 183, 213 }, ++ { 8, 134, 191 }, ++ { 1, 86, 142 }, ++ { 1, 56, 96 }, ++ { 1, 30, 53 }, ++ { 1, 12, 20 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 20, 190, 215 }, ++ { 4, 135, 192 }, ++ { 1, 84, 139 }, ++ { 1, 53, 91 }, ++ { 1, 28, 49 }, ++ { 1, 11, 20 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 13, 196, 216 }, ++ { 2, 137, 192 }, ++ { 1, 86, 143 }, ++ { 1, 57, 99 }, ++ { 1, 32, 56 }, ++ { 1, 13, 24 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 211, 29, 217 }, ++ { 96, 47, 156 }, ++ { 22, 43, 87 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 78, 120, 193 }, ++ { 111, 116, 186 }, ++ { 46, 102, 164 }, ++ { 15, 80, 128 }, ++ { 2, 49, 76 }, ++ { 1, 18, 28 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 71, 161, 203 }, ++ { 42, 132, 192 }, ++ { 10, 98, 150 }, ++ { 3, 69, 109 }, ++ { 1, 44, 70 }, ++ { 1, 18, 29 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 57, 186, 211 }, ++ { 30, 140, 196 }, ++ { 4, 93, 146 }, ++ { 1, 62, 102 }, ++ { 1, 38, 65 }, ++ { 1, 16, 27 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 47, 199, 217 }, ++ { 14, 145, 196 }, ++ { 1, 88, 142 }, ++ { 1, 57, 98 }, ++ { 1, 36, 62 }, ++ { 1, 15, 26 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 26, 219, 229 }, ++ { 5, 155, 207 }, ++ { 1, 94, 151 }, ++ { 1, 60, 104 }, ++ { 1, 36, 62 }, ++ { 1, 16, 28 }, ++ } ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 233, 29, 248 }, ++ { 146, 47, 220 }, ++ { 43, 52, 140 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 100, 163, 232 }, ++ { 179, 161, 222 }, ++ { 63, 142, 204 }, ++ { 37, 113, 174 }, ++ { 26, 89, 137 }, ++ { 18, 68, 97 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 85, 181, 230 }, ++ { 32, 146, 209 }, ++ { 7, 100, 164 }, ++ { 3, 71, 121 }, ++ { 1, 45, 77 }, ++ { 1, 18, 30 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 65, 187, 230 }, ++ { 20, 148, 207 }, ++ { 2, 97, 159 }, ++ { 1, 68, 116 }, ++ { 1, 40, 70 }, ++ { 1, 14, 29 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 40, 194, 227 }, ++ { 8, 147, 204 }, ++ { 1, 94, 155 }, ++ { 1, 65, 112 }, ++ { 1, 39, 66 }, ++ { 1, 14, 26 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 16, 208, 228 }, ++ { 3, 151, 207 }, ++ { 1, 98, 160 }, ++ { 1, 67, 117 }, ++ { 1, 41, 74 }, ++ { 1, 17, 31 }, ++ }, ++ }, ++ }, ++ }, ++ { /* tx = 32x32 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 17, 38, 140 }, ++ { 7, 34, 80 }, ++ { 1, 17, 29 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 37, 75, 128 }, ++ { 41, 76, 128 }, ++ { 26, 66, 116 }, ++ { 12, 52, 94 }, ++ { 2, 32, 55 }, ++ { 1, 10, 16 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 50, 127, 154 }, ++ { 37, 109, 152 }, ++ { 16, 82, 121 }, ++ { 5, 59, 85 }, ++ { 1, 35, 54 }, ++ { 1, 13, 20 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 40, 142, 167 }, ++ { 17, 110, 157 }, ++ { 2, 71, 112 }, ++ { 1, 44, 72 }, ++ { 1, 27, 45 }, ++ { 1, 11, 17 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 30, 175, 188 }, ++ { 9, 124, 169 }, ++ { 1, 74, 116 }, ++ { 1, 48, 78 }, ++ { 1, 30, 49 }, ++ { 1, 11, 18 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 10, 222, 223 }, ++ { 2, 150, 194 }, ++ { 1, 83, 128 }, ++ { 1, 48, 79 }, ++ { 1, 27, 45 }, ++ { 1, 11, 17 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 36, 41, 235 }, ++ { 29, 36, 193 }, ++ { 10, 27, 111 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 85, 165, 222 }, ++ { 177, 162, 215 }, ++ { 110, 135, 195 }, ++ { 57, 113, 168 }, ++ { 23, 83, 120 }, ++ { 10, 49, 61 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 85, 190, 223 }, ++ { 36, 139, 200 }, ++ { 5, 90, 146 }, ++ { 1, 60, 103 }, ++ { 1, 38, 65 }, ++ { 1, 18, 30 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 72, 202, 223 }, ++ { 23, 141, 199 }, ++ { 2, 86, 140 }, ++ { 1, 56, 97 }, ++ { 1, 36, 61 }, ++ { 1, 16, 27 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 55, 218, 225 }, ++ { 13, 145, 200 }, ++ { 1, 86, 141 }, ++ { 1, 57, 99 }, ++ { 1, 35, 61 }, ++ { 1, 13, 22 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 15, 235, 212 }, ++ { 1, 132, 184 }, ++ { 1, 84, 139 }, ++ { 1, 57, 97 }, ++ { 1, 34, 56 }, ++ { 1, 14, 23 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 181, 21, 201 }, ++ { 61, 37, 123 }, ++ { 10, 38, 71 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 47, 106, 172 }, ++ { 95, 104, 173 }, ++ { 42, 93, 159 }, ++ { 18, 77, 131 }, ++ { 4, 50, 81 }, ++ { 1, 17, 23 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 62, 147, 199 }, ++ { 44, 130, 189 }, ++ { 28, 102, 154 }, ++ { 18, 75, 115 }, ++ { 2, 44, 65 }, ++ { 1, 12, 19 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 55, 153, 210 }, ++ { 24, 130, 194 }, ++ { 3, 93, 146 }, ++ { 1, 61, 97 }, ++ { 1, 31, 50 }, ++ { 1, 10, 16 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 49, 186, 223 }, ++ { 17, 148, 204 }, ++ { 1, 96, 142 }, ++ { 1, 53, 83 }, ++ { 1, 26, 44 }, ++ { 1, 11, 17 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 13, 217, 212 }, ++ { 2, 136, 180 }, ++ { 1, 78, 124 }, ++ { 1, 50, 83 }, ++ { 1, 29, 49 }, ++ { 1, 14, 23 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 197, 13, 247 }, ++ { 82, 17, 222 }, ++ { 25, 17, 162 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 126, 186, 247 }, ++ { 234, 191, 243 }, ++ { 176, 177, 234 }, ++ { 104, 158, 220 }, ++ { 66, 128, 186 }, ++ { 55, 90, 137 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 111, 197, 242 }, ++ { 46, 158, 219 }, ++ { 9, 104, 171 }, ++ { 2, 65, 125 }, ++ { 1, 44, 80 }, ++ { 1, 17, 91 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 104, 208, 245 }, ++ { 39, 168, 224 }, ++ { 3, 109, 162 }, ++ { 1, 79, 124 }, ++ { 1, 50, 102 }, ++ { 1, 43, 102 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 84, 220, 246 }, ++ { 31, 177, 231 }, ++ { 2, 115, 180 }, ++ { 1, 79, 134 }, ++ { 1, 55, 77 }, ++ { 1, 60, 79 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 43, 243, 240 }, ++ { 8, 180, 217 }, ++ { 1, 115, 166 }, ++ { 1, 84, 121 }, ++ { 1, 51, 67 }, ++ { 1, 16, 6 }, ++ }, ++ }, ++ }, ++ }, ++ }, ++ ++ .skip = { 192, 128, 64 }, ++ .inter_mode = { ++ { 2, 173, 34 }, ++ { 7, 145, 85 }, ++ { 7, 166, 63 }, ++ { 7, 94, 66 }, ++ { 8, 64, 46 }, ++ { 17, 81, 31 }, ++ { 25, 29, 30 }, ++ }, ++ .interp_filter = { ++ { 235, 162 }, ++ { 36, 255 }, ++ { 34, 3 }, ++ { 149, 144 }, ++ }, ++ .is_inter = { 9, 102, 187, 225 }, ++ .comp_mode = { 239, 183, 119, 96, 41 }, ++ .single_ref = { ++ { 33, 16 }, ++ { 77, 74 }, ++ { 142, 142 }, ++ { 172, 170 }, ++ { 238, 247 }, ++ }, ++ .comp_ref = { 50, 126, 123, 221, 226 }, ++ .y_mode = { ++ { 65, 32, 18, 144, 162, 194, 41, 51, 98 }, ++ { 132, 68, 18, 165, 217, 196, 45, 40, 78 }, ++ { 173, 80, 19, 176, 240, 193, 64, 35, 46 }, ++ { 221, 135, 38, 194, 248, 121, 96, 85, 29 }, ++ }, ++ .uv_mode = { ++ { 120, 7, 76, 176, 208, 126, 28, 54, 103 } /* y = dc */, ++ { 48, 12, 154, 155, 139, 90, 34, 117, 119 } /* y = v */, ++ { 67, 6, 25, 204, 243, 158, 13, 21, 96 } /* y = h */, ++ { 97, 5, 44, 131, 176, 139, 48, 68, 97 } /* y = d45 */, ++ { 83, 5, 42, 156, 111, 152, 26, 49, 152 } /* y = d135 */, ++ { 80, 5, 58, 178, 74, 83, 33, 62, 145 } /* y = d117 */, ++ { 86, 5, 32, 154, 192, 168, 14, 22, 163 } /* y = d153 */, ++ { 85, 5, 32, 156, 216, 148, 19, 29, 73 } /* y = d207 */, ++ { 77, 7, 64, 116, 132, 122, 37, 126, 120 } /* y = d63 */, ++ { 101, 21, 107, 181, 192, 103, 19, 67, 125 } /* y = tm */ ++ }, ++ .partition = { ++ /* 8x8 -> 4x4 */ ++ { 199, 122, 141 } /* a/l both not split */, ++ { 147, 63, 159 } /* a split, l not split */, ++ { 148, 133, 118 } /* l split, a not split */, ++ { 121, 104, 114 } /* a/l both split */, ++ /* 16x16 -> 8x8 */ ++ { 174, 73, 87 } /* a/l both not split */, ++ { 92, 41, 83 } /* a split, l not split */, ++ { 82, 99, 50 } /* l split, a not split */, ++ { 53, 39, 39 } /* a/l both split */, ++ /* 32x32 -> 16x16 */ ++ { 177, 58, 59 } /* a/l both not split */, ++ { 68, 26, 63 } /* a split, l not split */, ++ { 52, 79, 25 } /* l split, a not split */, ++ { 17, 14, 12 } /* a/l both split */, ++ /* 64x64 -> 32x32 */ ++ { 222, 34, 30 } /* a/l both not split */, ++ { 72, 16, 44 } /* a split, l not split */, ++ { 58, 32, 12 } /* l split, a not split */, ++ { 10, 7, 6 } /* a/l both split */, ++ }, ++ ++ .mv = { ++ .joint = { 32, 64, 96 }, ++ .sign = { 128, 128 }, ++ .classes = { ++ { 224, 144, 192, 168, 192, 176, 192, 198, 198, 245 }, ++ { 216, 128, 176, 160, 176, 176, 192, 198, 198, 208 }, ++ }, ++ .class0_bit = { 216, 208 }, ++ .bits = { ++ { 136, 140, 148, 160, 176, 192, 224, 234, 234, 240}, ++ { 136, 140, 148, 160, 176, 192, 224, 234, 234, 240}, ++ }, ++ .class0_fr = { ++ { ++ { 128, 128, 64 }, ++ { 96, 112, 64 }, ++ }, ++ { ++ { 128, 128, 64 }, ++ { 96, 112, 64 }, ++ }, ++ }, ++ .fr = { ++ { 64, 96, 64 }, ++ { 64, 96, 64 }, ++ }, ++ .class0_hp = { 160, 160 }, ++ .hp = { 128, 128 }, ++ }, ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_default_probs); ++ ++static u32 fastdiv(u32 dividend, u16 divisor) ++{ ++#define DIV_INV(d) ((u32)(((1ULL << 32) + ((d) - 1)) / (d))) ++#define DIVS_INV(d0, d1, d2, d3, d4, d5, d6, d7, d8, d9) \ ++ DIV_INV(d0), DIV_INV(d1), DIV_INV(d2), DIV_INV(d3), \ ++ DIV_INV(d4), DIV_INV(d5), DIV_INV(d6), DIV_INV(d7), \ ++ DIV_INV(d8), DIV_INV(d9) ++ ++ static const u32 inv[] = { ++ DIV_INV(2), DIV_INV(3), DIV_INV(4), DIV_INV(5), ++ DIV_INV(6), DIV_INV(7), DIV_INV(8), DIV_INV(9), ++ DIVS_INV(10, 11, 12, 13, 14, 15, 16, 17, 18, 19), ++ DIVS_INV(20, 21, 22, 23, 24, 25, 26, 27, 28, 29), ++ DIVS_INV(30, 31, 32, 33, 34, 35, 36, 37, 38, 39), ++ DIVS_INV(40, 41, 42, 43, 44, 45, 46, 47, 48, 49), ++ DIVS_INV(50, 51, 52, 53, 54, 55, 56, 57, 58, 59), ++ DIVS_INV(60, 61, 62, 63, 64, 65, 66, 67, 68, 69), ++ DIVS_INV(70, 71, 72, 73, 74, 75, 76, 77, 78, 79), ++ DIVS_INV(80, 81, 82, 83, 84, 85, 86, 87, 88, 89), ++ DIVS_INV(90, 91, 92, 93, 94, 95, 96, 97, 98, 99), ++ DIVS_INV(100, 101, 102, 103, 104, 105, 106, 107, 108, 109), ++ DIVS_INV(110, 111, 112, 113, 114, 115, 116, 117, 118, 119), ++ DIVS_INV(120, 121, 122, 123, 124, 125, 126, 127, 128, 129), ++ DIVS_INV(130, 131, 132, 133, 134, 135, 136, 137, 138, 139), ++ DIVS_INV(140, 141, 142, 143, 144, 145, 146, 147, 148, 149), ++ DIVS_INV(150, 151, 152, 153, 154, 155, 156, 157, 158, 159), ++ DIVS_INV(160, 161, 162, 163, 164, 165, 166, 167, 168, 169), ++ DIVS_INV(170, 171, 172, 173, 174, 175, 176, 177, 178, 179), ++ DIVS_INV(180, 181, 182, 183, 184, 185, 186, 187, 188, 189), ++ DIVS_INV(190, 191, 192, 193, 194, 195, 196, 197, 198, 199), ++ DIVS_INV(200, 201, 202, 203, 204, 205, 206, 207, 208, 209), ++ DIVS_INV(210, 211, 212, 213, 214, 215, 216, 217, 218, 219), ++ DIVS_INV(220, 221, 222, 223, 224, 225, 226, 227, 228, 229), ++ DIVS_INV(230, 231, 232, 233, 234, 235, 236, 237, 238, 239), ++ DIVS_INV(240, 241, 242, 243, 244, 245, 246, 247, 248, 249), ++ DIV_INV(250), DIV_INV(251), DIV_INV(252), DIV_INV(253), ++ DIV_INV(254), DIV_INV(255), DIV_INV(256), ++ }; ++ ++ if (divisor == 0) ++ return 0; ++ else if (divisor == 1) ++ return dividend; ++ ++ if (WARN_ON(divisor - 2 >= ARRAY_SIZE(inv))) ++ return dividend; ++ ++ return ((u64)dividend * inv[divisor - 2]) >> 32; ++} ++ ++/* 6.3.6 inv_recenter_nonneg(v, m) */ ++static int inv_recenter_nonneg(int v, int m) ++{ ++ if (v > 2 * m) ++ return v; ++ ++ if (v & 1) ++ return m - ((v + 1) >> 1); ++ ++ return m + (v >> 1); ++} ++ ++/* ++ * part of 6.3.5 inv_remap_prob(deltaProb, prob) ++ * delta = inv_map_table[deltaProb] done by userspace ++ */ ++static int update_prob(int delta, int prob) ++{ ++ if (!delta) ++ return prob; ++ ++ return prob <= 128 ? ++ 1 + inv_recenter_nonneg(delta, prob - 1) : ++ 255 - inv_recenter_nonneg(delta, 255 - prob); ++} ++ ++/* Counterpart to 6.3.2 tx_mode_probs() */ ++static void update_tx_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { ++ u8 *p8x8 = probs->tx8[i]; ++ u8 *p16x16 = probs->tx16[i]; ++ u8 *p32x32 = probs->tx32[i]; ++ const u8 *d8x8 = deltas->tx8[i]; ++ const u8 *d16x16 = deltas->tx16[i]; ++ const u8 *d32x32 = deltas->tx32[i]; ++ ++ p8x8[0] = update_prob(d8x8[0], p8x8[0]); ++ p16x16[0] = update_prob(d16x16[0], p16x16[0]); ++ p16x16[1] = update_prob(d16x16[1], p16x16[1]); ++ p32x32[0] = update_prob(d32x32[0], p32x32[0]); ++ p32x32[1] = update_prob(d32x32[1], p32x32[1]); ++ p32x32[2] = update_prob(d32x32[2], p32x32[2]); ++ } ++} ++ ++#define BAND_6(band) ((band) == 0 ? 3 : 6) ++ ++static void update_coeff(const u8 deltas[6][6][3], u8 probs[6][6][3]) ++{ ++ int l, m, n; ++ ++ for (l = 0; l < 6; l++) ++ for (m = 0; m < BAND_6(l); m++) { ++ u8 *p = probs[l][m]; ++ const u8 *d = deltas[l][m]; ++ ++ for (n = 0; n < 3; n++) ++ p[n] = update_prob(d[n], p[n]); ++ } ++} ++ ++/* Counterpart to 6.3.7 read_coef_probs() */ ++static void update_coef_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ int i, j, k; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) ++ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) ++ update_coeff(deltas->coef[i][j][k], probs->coef[i][j][k]); ++ ++ if (deltas->tx_mode == i) ++ break; ++ } ++} ++ ++/* Counterpart to 6.3.8 read_skip_prob() */ ++static void update_skip_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->skip); i++) ++ probs->skip[i] = update_prob(deltas->skip[i], probs->skip[i]); ++} ++ ++/* Counterpart to 6.3.9 read_inter_mode_probs() */ ++static void update_inter_mode_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->inter_mode); i++) { ++ u8 *p = probs->inter_mode[i]; ++ const u8 *d = deltas->inter_mode[i]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ p[2] = update_prob(d[2], p[2]); ++ } ++} ++ ++/* Counterpart to 6.3.10 read_interp_filter_probs() */ ++static void update_interp_filter_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->interp_filter); i++) { ++ u8 *p = probs->interp_filter[i]; ++ const u8 *d = deltas->interp_filter[i]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ } ++} ++ ++/* Counterpart to 6.3.11 read_is_inter_probs() */ ++static void update_is_inter_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->is_inter); i++) ++ probs->is_inter[i] = update_prob(deltas->is_inter[i], probs->is_inter[i]); ++} ++ ++/* 6.3.12 frame_reference_mode() done entirely in userspace */ ++ ++/* Counterpart to 6.3.13 frame_reference_mode_probs() */ ++static void ++update_frame_reference_mode_probs(unsigned int reference_mode, ++ struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ if (reference_mode == V4L2_VP9_REFERENCE_MODE_SELECT) ++ for (i = 0; i < ARRAY_SIZE(probs->comp_mode); i++) ++ probs->comp_mode[i] = update_prob(deltas->comp_mode[i], ++ probs->comp_mode[i]); ++ ++ if (reference_mode != V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE) ++ for (i = 0; i < ARRAY_SIZE(probs->single_ref); i++) { ++ u8 *p = probs->single_ref[i]; ++ const u8 *d = deltas->single_ref[i]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ } ++ ++ if (reference_mode != V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE) ++ for (i = 0; i < ARRAY_SIZE(probs->comp_ref); i++) ++ probs->comp_ref[i] = update_prob(deltas->comp_ref[i], probs->comp_ref[i]); ++} ++ ++/* Counterpart to 6.3.14 read_y_mode_probs() */ ++static void update_y_mode_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i, j; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->y_mode); i++) ++ for (j = 0; j < ARRAY_SIZE(probs->y_mode[0]); ++j) ++ probs->y_mode[i][j] = ++ update_prob(deltas->y_mode[i][j], probs->y_mode[i][j]); ++} ++ ++/* Counterpart to 6.3.15 read_partition_probs() */ ++static void update_partition_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i, j; ++ ++ for (i = 0; i < 4; i++) ++ for (j = 0; j < 4; j++) { ++ u8 *p = probs->partition[i * 4 + j]; ++ const u8 *d = deltas->partition[i * 4 + j]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ p[2] = update_prob(d[2], p[2]); ++ } ++} ++ ++static inline int update_mv_prob(int delta, int prob) ++{ ++ if (!delta) ++ return prob; ++ ++ return delta; ++} ++ ++/* Counterpart to 6.3.16 mv_probs() */ ++static void update_mv_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ u8 *p = probs->mv.joint; ++ const u8 *d = deltas->mv.joint; ++ unsigned int i, j; ++ ++ p[0] = update_mv_prob(d[0], p[0]); ++ p[1] = update_mv_prob(d[1], p[1]); ++ p[2] = update_mv_prob(d[2], p[2]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->mv.sign); i++) { ++ p = probs->mv.sign; ++ d = deltas->mv.sign; ++ p[i] = update_mv_prob(d[i], p[i]); ++ ++ p = probs->mv.classes[i]; ++ d = deltas->mv.classes[i]; ++ for (j = 0; j < ARRAY_SIZE(probs->mv.classes[0]); j++) ++ p[j] = update_mv_prob(d[j], p[j]); ++ ++ p = probs->mv.class0_bit; ++ d = deltas->mv.class0_bit; ++ p[i] = update_mv_prob(d[i], p[i]); ++ ++ p = probs->mv.bits[i]; ++ d = deltas->mv.bits[i]; ++ for (j = 0; j < ARRAY_SIZE(probs->mv.bits[0]); j++) ++ p[j] = update_mv_prob(d[j], p[j]); ++ ++ for (j = 0; j < ARRAY_SIZE(probs->mv.class0_fr[0]); j++) { ++ p = probs->mv.class0_fr[i][j]; ++ d = deltas->mv.class0_fr[i][j]; ++ ++ p[0] = update_mv_prob(d[0], p[0]); ++ p[1] = update_mv_prob(d[1], p[1]); ++ p[2] = update_mv_prob(d[2], p[2]); ++ } ++ ++ p = probs->mv.fr[i]; ++ d = deltas->mv.fr[i]; ++ for (j = 0; j < ARRAY_SIZE(probs->mv.fr[i]); j++) ++ p[j] = update_mv_prob(d[j], p[j]); ++ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV) { ++ p = probs->mv.class0_hp; ++ d = deltas->mv.class0_hp; ++ p[i] = update_mv_prob(d[i], p[i]); ++ ++ p = probs->mv.hp; ++ d = deltas->mv.hp; ++ p[i] = update_mv_prob(d[i], p[i]); ++ } ++ } ++} ++ ++/* Counterpart to 6.3 compressed_header(), but parsing has been done in userspace. */ ++void v4l2_vp9_fw_update_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ if (deltas->tx_mode == V4L2_VP9_TX_MODE_SELECT) ++ update_tx_probs(probs, deltas); ++ ++ update_coef_probs(probs, deltas, dec_params); ++ ++ update_skip_probs(probs, deltas); ++ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY) ++ return; ++ ++ update_inter_mode_probs(probs, deltas); ++ ++ if (dec_params->interpolation_filter == V4L2_VP9_INTERP_FILTER_SWITCHABLE) ++ update_interp_filter_probs(probs, deltas); ++ ++ update_is_inter_probs(probs, deltas); ++ ++ update_frame_reference_mode_probs(dec_params->reference_mode, probs, deltas); ++ ++ update_y_mode_probs(probs, deltas); ++ ++ update_partition_probs(probs, deltas); ++ ++ update_mv_probs(probs, deltas, dec_params); ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_fw_update_probs); ++ ++u8 v4l2_vp9_reset_frame_ctx(const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct v4l2_vp9_frame_context *frame_context) ++{ ++ int i; ++ ++ u8 fctx_idx = dec_params->frame_context_idx; ++ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) { ++ /* ++ * setup_past_independence() ++ * We do nothing here. Instead of storing default probs in some intermediate ++ * location and then copying from that location to appropriate contexts ++ * in save_probs() below, we skip that step and save default probs directly ++ * to appropriate contexts. ++ */ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT || ++ dec_params->reset_frame_context == V4L2_VP9_RESET_FRAME_CTX_ALL) ++ for (i = 0; i < 4; ++i) ++ /* save_probs(i) */ ++ memcpy(&frame_context[i], &v4l2_vp9_default_probs, ++ sizeof(v4l2_vp9_default_probs)); ++ else if (dec_params->reset_frame_context == V4L2_VP9_RESET_FRAME_CTX_SPEC) ++ /* save_probs(fctx_idx) */ ++ memcpy(&frame_context[fctx_idx], &v4l2_vp9_default_probs, ++ sizeof(v4l2_vp9_default_probs)); ++ fctx_idx = 0; ++ } ++ ++ return fctx_idx; ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_reset_frame_ctx); ++ ++/* 8.4.1 Merge prob process */ ++static u8 merge_prob(u8 pre_prob, u32 ct0, u32 ct1, u16 count_sat, u32 max_update_factor) ++{ ++ u32 den, prob, count, factor; ++ ++ den = ct0 + ct1; ++ if (!den) { ++ /* ++ * prob = 128, count = 0, update_factor = 0 ++ * Round2's argument: pre_prob * 256 ++ * (pre_prob * 256 + 128) >> 8 == pre_prob ++ */ ++ return pre_prob; ++ } ++ ++ prob = clamp(((ct0 << 8) + (den >> 1)) / den, (u32)1, (u32)255); ++ count = min_t(u32, den, count_sat); ++ factor = fastdiv(max_update_factor * count, count_sat); ++ ++ /* ++ * Round2(pre_prob * (256 - factor) + prob * factor, 8) ++ * Round2(pre_prob * 256 + (prob - pre_prob) * factor, 8) ++ * (pre_prob * 256 >> 8) + (((prob - pre_prob) * factor + 128) >> 8) ++ */ ++ return pre_prob + (((prob - pre_prob) * factor + 128) >> 8); ++} ++ ++static inline u8 noncoef_merge_prob(u8 pre_prob, u32 ct0, u32 ct1) ++{ ++ return merge_prob(pre_prob, ct0, ct1, 20, 128); ++} ++ ++/* 8.4.2 Merge probs process */ ++/* ++ * merge_probs() is a recursive function in the spec. We avoid recursion in the kernel. ++ * That said, the "tree" parameter of merge_probs() controls how deep the recursion goes. ++ * It turns out that in all cases the recursive calls boil down to a short-ish series ++ * of merge_prob() invocations (note no "s"). ++ * ++ * Variant A ++ * --------- ++ * merge_probs(small_token_tree, 2): ++ * merge_prob(p[1], c[0], c[1] + c[2]) ++ * merge_prob(p[2], c[1], c[2]) ++ * ++ * Variant B ++ * --------- ++ * merge_probs(binary_tree, 0) or ++ * merge_probs(tx_size_8_tree, 0): ++ * merge_prob(p[0], c[0], c[1]) ++ * ++ * Variant C ++ * --------- ++ * merge_probs(inter_mode_tree, 0): ++ * merge_prob(p[0], c[2], c[1] + c[0] + c[3]) ++ * merge_prob(p[1], c[0], c[1] + c[3]) ++ * merge_prob(p[2], c[1], c[3]) ++ * ++ * Variant D ++ * --------- ++ * merge_probs(intra_mode_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + ... + c[9]) ++ * merge_prob(p[1], c[9], c[1] + ... + c[8]) ++ * merge_prob(p[2], c[1], c[2] + ... + c[8]) ++ * merge_prob(p[3], c[2] + c[4] + c[5], c[3] + c[8] + c[6] + c[7]) ++ * merge_prob(p[4], c[2], c[4] + c[5]) ++ * merge_prob(p[5], c[4], c[5]) ++ * merge_prob(p[6], c[3], c[8] + c[6] + c[7]) ++ * merge_prob(p[7], c[8], c[6] + c[7]) ++ * merge_prob(p[8], c[6], c[7]) ++ * ++ * Variant E ++ * --------- ++ * merge_probs(partition_tree, 0) or ++ * merge_probs(tx_size_32_tree, 0) or ++ * merge_probs(mv_joint_tree, 0) or ++ * merge_probs(mv_fr_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + c[2] + c[3]) ++ * merge_prob(p[1], c[1], c[2] + c[3]) ++ * merge_prob(p[2], c[2], c[3]) ++ * ++ * Variant F ++ * --------- ++ * merge_probs(interp_filter_tree, 0) or ++ * merge_probs(tx_size_16_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + c[2]) ++ * merge_prob(p[1], c[1], c[2]) ++ * ++ * Variant G ++ * --------- ++ * merge_probs(mv_class_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + ... + c[10]) ++ * merge_prob(p[1], c[1], c[2] + ... + c[10]) ++ * merge_prob(p[2], c[2] + c[3], c[4] + ... + c[10]) ++ * merge_prob(p[3], c[2], c[3]) ++ * merge_prob(p[4], c[4] + c[5], c[6] + ... + c[10]) ++ * merge_prob(p[5], c[4], c[5]) ++ * merge_prob(p[6], c[6], c[7] + ... + c[10]) ++ * merge_prob(p[7], c[7] + c[8], c[9] + c[10]) ++ * merge_prob(p[8], c[7], c[8]) ++ * merge_prob(p[9], c[9], [10]) ++ */ ++ ++static inline void merge_probs_variant_a(u8 *p, const u32 *c, u16 count_sat, u32 update_factor) ++{ ++ p[1] = merge_prob(p[1], c[0], c[1] + c[2], count_sat, update_factor); ++ p[2] = merge_prob(p[2], c[1], c[2], count_sat, update_factor); ++} ++ ++static inline void merge_probs_variant_b(u8 *p, const u32 *c, u16 count_sat, u32 update_factor) ++{ ++ p[0] = merge_prob(p[0], c[0], c[1], count_sat, update_factor); ++} ++ ++static inline void merge_probs_variant_c(u8 *p, const u32 *c) ++{ ++ p[0] = noncoef_merge_prob(p[0], c[2], c[1] + c[0] + c[3]); ++ p[1] = noncoef_merge_prob(p[1], c[0], c[1] + c[3]); ++ p[2] = noncoef_merge_prob(p[2], c[1], c[3]); ++} ++ ++static void merge_probs_variant_d(u8 *p, const u32 *c) ++{ ++ u32 sum = 0, s2; ++ ++ sum = c[1] + c[2] + c[3] + c[4] + c[5] + c[6] + c[7] + c[8] + c[9]; ++ ++ p[0] = noncoef_merge_prob(p[0], c[0], sum); ++ sum -= c[9]; ++ p[1] = noncoef_merge_prob(p[1], c[9], sum); ++ sum -= c[1]; ++ p[2] = noncoef_merge_prob(p[2], c[1], sum); ++ s2 = c[2] + c[4] + c[5]; ++ sum -= s2; ++ p[3] = noncoef_merge_prob(p[3], s2, sum); ++ s2 -= c[2]; ++ p[4] = noncoef_merge_prob(p[4], c[2], s2); ++ p[5] = noncoef_merge_prob(p[5], c[4], c[5]); ++ sum -= c[3]; ++ p[6] = noncoef_merge_prob(p[6], c[3], sum); ++ sum -= c[8]; ++ p[7] = noncoef_merge_prob(p[7], c[8], sum); ++ p[8] = noncoef_merge_prob(p[8], c[6], c[7]); ++} ++ ++static inline void merge_probs_variant_e(u8 *p, const u32 *c) ++{ ++ p[0] = noncoef_merge_prob(p[0], c[0], c[1] + c[2] + c[3]); ++ p[1] = noncoef_merge_prob(p[1], c[1], c[2] + c[3]); ++ p[2] = noncoef_merge_prob(p[2], c[2], c[3]); ++} ++ ++static inline void merge_probs_variant_f(u8 *p, const u32 *c) ++{ ++ p[0] = noncoef_merge_prob(p[0], c[0], c[1] + c[2]); ++ p[1] = noncoef_merge_prob(p[1], c[1], c[2]); ++} ++ ++static void merge_probs_variant_g(u8 *p, const u32 *c) ++{ ++ u32 sum; ++ ++ sum = c[1] + c[2] + c[3] + c[4] + c[5] + c[6] + c[7] + c[8] + c[9] + c[10]; ++ p[0] = noncoef_merge_prob(p[0], c[0], sum); ++ sum -= c[1]; ++ p[1] = noncoef_merge_prob(p[1], c[1], sum); ++ sum -= c[2] + c[3]; ++ p[2] = noncoef_merge_prob(p[2], c[2] + c[3], sum); ++ p[3] = noncoef_merge_prob(p[3], c[2], c[3]); ++ sum -= c[4] + c[5]; ++ p[4] = noncoef_merge_prob(p[4], c[4] + c[5], sum); ++ p[5] = noncoef_merge_prob(p[5], c[4], c[5]); ++ sum -= c[6]; ++ p[6] = noncoef_merge_prob(p[6], c[6], sum); ++ p[7] = noncoef_merge_prob(p[7], c[7] + c[8], c[9] + c[10]); ++ p[8] = noncoef_merge_prob(p[8], c[7], c[8]); ++ p[9] = noncoef_merge_prob(p[9], c[9], c[10]); ++} ++ ++/* 8.4.3 Coefficient probability adaptation process */ ++static inline void adapt_probs_variant_a_coef(u8 *p, const u32 *c, u32 update_factor) ++{ ++ merge_probs_variant_a(p, c, 24, update_factor); ++} ++ ++static inline void adapt_probs_variant_b_coef(u8 *p, const u32 *c, u32 update_factor) ++{ ++ merge_probs_variant_b(p, c, 24, update_factor); ++} ++ ++static void _adapt_coeff(unsigned int i, unsigned int j, unsigned int k, ++ struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_vp9_frame_symbol_counts *counts, ++ u32 uf) ++{ ++ s32 l, m; ++ ++ for (l = 0; l < ARRAY_SIZE(probs->coef[0][0][0]); l++) { ++ for (m = 0; m < BAND_6(l); m++) { ++ u8 *p = probs->coef[i][j][k][l][m]; ++ const u32 counts_more_coefs[2] = { ++ *counts->eob[i][j][k][l][m][1], ++ *counts->eob[i][j][k][l][m][0] - *counts->eob[i][j][k][l][m][1], ++ }; ++ ++ adapt_probs_variant_a_coef(p, *counts->coeff[i][j][k][l][m], uf); ++ adapt_probs_variant_b_coef(p, counts_more_coefs, uf); ++ } ++ } ++} ++ ++static void _adapt_coef_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_vp9_frame_symbol_counts *counts, ++ unsigned int uf) ++{ ++ unsigned int i, j, k; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) ++ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) ++ _adapt_coeff(i, j, k, probs, counts, uf); ++} ++ ++void v4l2_vp9_adapt_coef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ bool use_128, ++ bool frame_is_intra) ++{ ++ if (frame_is_intra) { ++ _adapt_coef_probs(probs, counts, 112); ++ } else { ++ if (use_128) ++ _adapt_coef_probs(probs, counts, 128); ++ else ++ _adapt_coef_probs(probs, counts, 112); ++ } ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_adapt_coef_probs); ++ ++/* 8.4.4 Non coefficient probability adaptation process, adapt_probs() */ ++static inline void adapt_probs_variant_b(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_b(p, c, 20, 128); ++} ++ ++static inline void adapt_probs_variant_c(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_c(p, c); ++} ++ ++static inline void adapt_probs_variant_d(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_d(p, c); ++} ++ ++static inline void adapt_probs_variant_e(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_e(p, c); ++} ++ ++static inline void adapt_probs_variant_f(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_f(p, c); ++} ++ ++static inline void adapt_probs_variant_g(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_g(p, c); ++} ++ ++/* 8.4.4 Non coefficient probability adaptation process, adapt_prob() */ ++static inline u8 adapt_prob(u8 prob, const u32 counts[2]) ++{ ++ return noncoef_merge_prob(prob, counts[0], counts[1]); ++} ++ ++/* 8.4.4 Non coefficient probability adaptation process */ ++void v4l2_vp9_adapt_noncoef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ u8 reference_mode, u8 interpolation_filter, u8 tx_mode, ++ u32 flags) ++{ ++ unsigned int i, j; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->is_inter); i++) ++ probs->is_inter[i] = adapt_prob(probs->is_inter[i], (*counts->intra_inter)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->comp_mode); i++) ++ probs->comp_mode[i] = adapt_prob(probs->comp_mode[i], (*counts->comp)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->comp_ref); i++) ++ probs->comp_ref[i] = adapt_prob(probs->comp_ref[i], (*counts->comp_ref)[i]); ++ ++ if (reference_mode != V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE) ++ for (i = 0; i < ARRAY_SIZE(probs->single_ref); i++) ++ for (j = 0; j < ARRAY_SIZE(probs->single_ref[0]); j++) ++ probs->single_ref[i][j] = adapt_prob(probs->single_ref[i][j], ++ (*counts->single_ref)[i][j]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->inter_mode); i++) ++ adapt_probs_variant_c(probs->inter_mode[i], (*counts->mv_mode)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->y_mode); i++) ++ adapt_probs_variant_d(probs->y_mode[i], (*counts->y_mode)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->uv_mode); i++) ++ adapt_probs_variant_d(probs->uv_mode[i], (*counts->uv_mode)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->partition); i++) ++ adapt_probs_variant_e(probs->partition[i], (*counts->partition)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->skip); i++) ++ probs->skip[i] = adapt_prob(probs->skip[i], (*counts->skip)[i]); ++ ++ if (interpolation_filter == V4L2_VP9_INTERP_FILTER_SWITCHABLE) ++ for (i = 0; i < ARRAY_SIZE(probs->interp_filter); i++) ++ adapt_probs_variant_f(probs->interp_filter[i], (*counts->filter)[i]); ++ ++ if (tx_mode == V4L2_VP9_TX_MODE_SELECT) ++ for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { ++ adapt_probs_variant_b(probs->tx8[i], (*counts->tx8p)[i]); ++ adapt_probs_variant_f(probs->tx16[i], (*counts->tx16p)[i]); ++ adapt_probs_variant_e(probs->tx32[i], (*counts->tx32p)[i]); ++ } ++ ++ adapt_probs_variant_e(probs->mv.joint, *counts->mv_joint); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->mv.sign); i++) { ++ probs->mv.sign[i] = adapt_prob(probs->mv.sign[i], (*counts->sign)[i]); ++ ++ adapt_probs_variant_g(probs->mv.classes[i], (*counts->classes)[i]); ++ ++ probs->mv.class0_bit[i] = adapt_prob(probs->mv.class0_bit[i], (*counts->class0)[i]); ++ ++ for (j = 0; j < ARRAY_SIZE(probs->mv.bits[0]); j++) ++ probs->mv.bits[i][j] = adapt_prob(probs->mv.bits[i][j], ++ (*counts->bits)[i][j]); ++ ++ for (j = 0; j < ARRAY_SIZE(probs->mv.class0_fr[0]); j++) ++ adapt_probs_variant_e(probs->mv.class0_fr[i][j], ++ (*counts->class0_fp)[i][j]); ++ ++ adapt_probs_variant_e(probs->mv.fr[i], (*counts->fp)[i]); ++ ++ if (!(flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)) ++ continue; ++ ++ probs->mv.class0_hp[i] = adapt_prob(probs->mv.class0_hp[i], ++ (*counts->class0_hp)[i]); ++ ++ probs->mv.hp[i] = adapt_prob(probs->mv.hp[i], (*counts->hp)[i]); ++ } ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_adapt_noncoef_probs); ++ ++bool ++v4l2_vp9_seg_feat_enabled(const u8 *feature_enabled, ++ unsigned int feature, ++ unsigned int segid) ++{ ++ u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); ++ ++ return !!(feature_enabled[segid] & mask); ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_seg_feat_enabled); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("V4L2 VP9 Helpers"); ++MODULE_AUTHOR("Andrzej Pietrasiewicz "); +diff --git a/include/media/v4l2-vp9.h b/include/media/v4l2-vp9.h +new file mode 100644 +index 000000000000..05478ad6d4ab +--- /dev/null ++++ b/include/media/v4l2-vp9.h +@@ -0,0 +1,233 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Helper functions for vp9 codecs. ++ * ++ * Copyright (c) 2021 Collabora, Ltd. ++ * ++ * Author: Andrzej Pietrasiewicz ++ */ ++ ++#ifndef _MEDIA_V4L2_VP9_H ++#define _MEDIA_V4L2_VP9_H ++ ++#include ++ ++/** ++ * struct v4l2_vp9_frame_mv_context - motion vector-related probabilities ++ * ++ * @joint: motion vector joint probabilities. ++ * @sign: motion vector sign probabilities. ++ * @classes: motion vector class probabilities. ++ * @class0_bit: motion vector class0 bit probabilities. ++ * @bits: motion vector bits probabilities. ++ * @class0_fr: motion vector class0 fractional bit probabilities. ++ * @fr: motion vector fractional bit probabilities. ++ * @class0_hp: motion vector class0 high precision fractional bit probabilities. ++ * @hp: motion vector high precision fractional bit probabilities. ++ * ++ * A member of v4l2_vp9_frame_context. ++ */ ++struct v4l2_vp9_frame_mv_context { ++ u8 joint[3]; ++ u8 sign[2]; ++ u8 classes[2][10]; ++ u8 class0_bit[2]; ++ u8 bits[2][10]; ++ u8 class0_fr[2][2][3]; ++ u8 fr[2][3]; ++ u8 class0_hp[2]; ++ u8 hp[2]; ++}; ++ ++/** ++ * struct v4l2_vp9_frame_context - frame probabilities, including motion-vector related ++ * ++ * @tx8: TX 8x8 probabilities. ++ * @tx16: TX 16x16 probabilities. ++ * @tx32: TX 32x32 probabilities. ++ * @coef: coefficient probabilities. ++ * @skip: skip probabilities. ++ * @inter_mode: inter mode probabilities. ++ * @interp_filter: interpolation filter probabilities. ++ * @is_inter: is inter-block probabilities. ++ * @comp_mode: compound prediction mode probabilities. ++ * @single_ref: single ref probabilities. ++ * @comp_ref: compound ref probabilities. ++ * @y_mode: Y prediction mode probabilities. ++ * @uv_mode: UV prediction mode probabilities. ++ * @partition: partition probabilities. ++ * @mv: motion vector probabilities. ++ * ++ * Drivers which need to keep track of frame context(s) can use this struct. ++ * The members correspond to probability tables, which are specified only implicitly in the ++ * vp9 spec. Section 10.5 "Default probability tables" contains all the types of involved ++ * tables, i.e. the actual tables are of the same kind, and when they are reset (which is ++ * mandated by the spec sometimes) they are overwritten with values from the default tables. ++ */ ++struct v4l2_vp9_frame_context { ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 coef[4][2][2][6][6][3]; ++ u8 skip[3]; ++ u8 inter_mode[7][3]; ++ u8 interp_filter[4][2]; ++ u8 is_inter[4]; ++ u8 comp_mode[5]; ++ u8 single_ref[5][2]; ++ u8 comp_ref[5]; ++ u8 y_mode[4][9]; ++ u8 uv_mode[10][9]; ++ u8 partition[16][3]; ++ ++ struct v4l2_vp9_frame_mv_context mv; ++}; ++ ++/** ++ * struct v4l2_vp9_frame_symbol_counts - pointers to arrays of symbol counts ++ * ++ * @partition: partition counts. ++ * @skip: skip counts. ++ * @intra_inter: is inter-block counts. ++ * @tx32p: TX32 counts. ++ * @tx16p: TX16 counts. ++ * @tx8p: TX8 counts. ++ * @y_mode: Y prediction mode counts. ++ * @uv_mode: UV prediction mode counts. ++ * @comp: compound prediction mode counts. ++ * @comp_ref: compound ref counts. ++ * @single_ref: single ref counts. ++ * @mv_mode: inter mode counts. ++ * @filter: interpolation filter counts. ++ * @mv_joint: motion vector joint counts. ++ * @sign: motion vector sign counts. ++ * @classes: motion vector class counts. ++ * @class0: motion vector class0 bit counts. ++ * @bits: motion vector bits counts. ++ * @class0_fp: motion vector class0 fractional bit counts. ++ * @fp: motion vector fractional bit counts. ++ * @class0_hp: motion vector class0 high precision fractional bit counts. ++ * @hp: motion vector high precision fractional bit counts. ++ * @coeff: coefficient counts. ++ * @eob: eob counts ++ * ++ * The fields correspond to what is specified in section 8.3 "Clear counts process" of the spec. ++ * Different pieces of hardware can report the counts in different order, so we cannot rely on ++ * simply overlaying a struct on a relevant block of memory. Instead we provide pointers to ++ * arrays or array of pointers to arrays in case of coeff, or array of pointers for eob. ++ */ ++struct v4l2_vp9_frame_symbol_counts { ++ u32 (*partition)[16][4]; ++ u32 (*skip)[3][2]; ++ u32 (*intra_inter)[4][2]; ++ u32 (*tx32p)[2][4]; ++ u32 (*tx16p)[2][4]; ++ u32 (*tx8p)[2][2]; ++ u32 (*y_mode)[4][10]; ++ u32 (*uv_mode)[10][10]; ++ u32 (*comp)[5][2]; ++ u32 (*comp_ref)[5][2]; ++ u32 (*single_ref)[5][2][2]; ++ u32 (*mv_mode)[7][4]; ++ u32 (*filter)[4][3]; ++ u32 (*mv_joint)[4]; ++ u32 (*sign)[2][2]; ++ u32 (*classes)[2][11]; ++ u32 (*class0)[2][2]; ++ u32 (*bits)[2][10][2]; ++ u32 (*class0_fp)[2][2][4]; ++ u32 (*fp)[2][4]; ++ u32 (*class0_hp)[2][2]; ++ u32 (*hp)[2][2]; ++ u32 (*coeff[4][2][2][6][6])[3]; ++ u32 *eob[4][2][2][6][6][2]; ++}; ++ ++extern const u8 v4l2_vp9_kf_y_mode_prob[10][10][9]; /* Section 10.4 of the spec */ ++extern const u8 v4l2_vp9_kf_partition_probs[16][3]; /* Section 10.4 of the spec */ ++extern const u8 v4l2_vp9_kf_uv_mode_prob[10][9]; /* Section 10.4 of the spec */ ++extern const struct v4l2_vp9_frame_context v4l2_vp9_default_probs; /* Section 10.5 of the spec */ ++ ++/** ++ * v4l2_vp9_fw_update_probs() - Perform forward update of vp9 probabilities ++ * ++ * @probs: current probabilities values ++ * @deltas: delta values from compressed header ++ * @dec_params: vp9 frame decoding parameters ++ * ++ * This function performs forward updates of probabilities for the vp9 boolean decoder. ++ * The frame header can contain a directive to update the probabilities (deltas), if so, then ++ * the deltas are provided in the header, too. The userspace parses those and passes the said ++ * deltas struct to the kernel. ++ */ ++void v4l2_vp9_fw_update_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params); ++ ++/** ++ * v4l2_vp9_reset_frame_ctx() - Reset appropriate frame context ++ * ++ * @dec_params: vp9 frame decoding parameters ++ * @frame_context: array of the 4 frame contexts ++ * ++ * This function resets appropriate frame contexts, based on what's in dec_params. ++ * ++ * Returns the frame context index after the update, which might be reset to zero if ++ * mandated by the spec. ++ */ ++u8 v4l2_vp9_reset_frame_ctx(const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct v4l2_vp9_frame_context *frame_context); ++ ++/** ++ * v4l2_vp9_adapt_coef_probs() - Perform backward update of vp9 coefficients probabilities ++ * ++ * @probs: current probabilities values ++ * @counts: values of symbol counts after the current frame has been decoded ++ * @use_128: flag to request that 128 is used as update factor if true, otherwise 112 is used ++ * @frame_is_intra: flag indicating that FrameIsIntra is true ++ * ++ * This function performs backward updates of coefficients probabilities for the vp9 boolean ++ * decoder. After a frame has been decoded the counts of how many times a given symbol has ++ * occurred are known and are used to update the probability of each symbol. ++ */ ++void v4l2_vp9_adapt_coef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ bool use_128, ++ bool frame_is_intra); ++ ++/** ++ * v4l2_vp9_adapt_noncoef_probs() - Perform backward update of vp9 non-coefficients probabilities ++ * ++ * @probs: current probabilities values ++ * @counts: values of symbol counts after the current frame has been decoded ++ * @reference_mode: specifies the type of inter prediction to be used. See ++ * &v4l2_vp9_reference_mode for more details ++ * @interpolation_filter: specifies the filter selection used for performing inter prediction. ++ * See &v4l2_vp9_interpolation_filter for more details ++ * @tx_mode: specifies the TX mode. See &v4l2_vp9_tx_mode for more details ++ * @flags: combination of V4L2_VP9_FRAME_FLAG_* flags ++ * ++ * This function performs backward updates of non-coefficients probabilities for the vp9 boolean ++ * decoder. After a frame has been decoded the counts of how many times a given symbol has ++ * occurred are known and are used to update the probability of each symbol. ++ */ ++void v4l2_vp9_adapt_noncoef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ u8 reference_mode, u8 interpolation_filter, u8 tx_mode, ++ u32 flags); ++ ++/** ++ * v4l2_vp9_seg_feat_enabled() - Check if a segmentation feature is enabled ++ * ++ * @feature_enabled: array of 8-bit flags (for all segments) ++ * @feature: id of the feature to check ++ * @segid: id of the segment to look up ++ * ++ * This function returns true if a given feature is active in a given segment. ++ */ ++bool ++v4l2_vp9_seg_feat_enabled(const u8 *feature_enabled, ++ unsigned int feature, ++ unsigned int segid); ++ ++#endif /* _MEDIA_V4L2_VP9_H */ diff --git a/projects/Allwinner/patches/linux/0073-media-rkvdec-Add-the-VP9-backend.patch b/projects/Allwinner/patches/linux/0073-media-rkvdec-Add-the-VP9-backend.patch new file mode 100644 index 0000000000..cf1bdf401d --- /dev/null +++ b/projects/Allwinner/patches/linux/0073-media-rkvdec-Add-the-VP9-backend.patch @@ -0,0 +1,1217 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Wed, 17 Nov 2021 12:52:56 +0100 +Subject: [PATCH] media: rkvdec: Add the VP9 backend + +The Rockchip VDEC supports VP9 profile 0 up to 4096x2304@30fps. Add +a backend for this new format. + +Signed-off-by: Boris Brezillon +Signed-off-by: Ezequiel Garcia +Signed-off-by: Adrian Ratiu +Co-developed-by: Andrzej Pietrasiewicz +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/rkvdec/Kconfig | 1 + + drivers/staging/media/rkvdec/Makefile | 2 +- + drivers/staging/media/rkvdec/rkvdec-vp9.c | 1072 +++++++++++++++++++++ + drivers/staging/media/rkvdec/rkvdec.c | 41 +- + drivers/staging/media/rkvdec/rkvdec.h | 12 +- + 5 files changed, 1121 insertions(+), 7 deletions(-) + create mode 100644 drivers/staging/media/rkvdec/rkvdec-vp9.c + +diff --git a/drivers/staging/media/rkvdec/Kconfig b/drivers/staging/media/rkvdec/Kconfig +index c02199b5e0fd..dc7292f346fa 100644 +--- a/drivers/staging/media/rkvdec/Kconfig ++++ b/drivers/staging/media/rkvdec/Kconfig +@@ -9,6 +9,7 @@ config VIDEO_ROCKCHIP_VDEC + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + select V4L2_H264 ++ select V4L2_VP9 + help + Support for the Rockchip Video Decoder IP present on Rockchip SoCs, + which accelerates video decoding. +diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile +index c08fed0a39f9..cb86b429cfaa 100644 +--- a/drivers/staging/media/rkvdec/Makefile ++++ b/drivers/staging/media/rkvdec/Makefile +@@ -1,3 +1,3 @@ + obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o + +-rockchip-vdec-y += rkvdec.o rkvdec-h264.o ++rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o +diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c +new file mode 100644 +index 000000000000..311a12656072 +--- /dev/null ++++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c +@@ -0,0 +1,1072 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Rockchip Video Decoder VP9 backend ++ * ++ * Copyright (C) 2019 Collabora, Ltd. ++ * Boris Brezillon ++ * Copyright (C) 2021 Collabora, Ltd. ++ * Andrzej Pietrasiewicz ++ * ++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd. ++ * Alpha Lin ++ */ ++ ++/* ++ * For following the vp9 spec please start reading this driver ++ * code from rkvdec_vp9_run() followed by rkvdec_vp9_done(). ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "rkvdec.h" ++#include "rkvdec-regs.h" ++ ++#define RKVDEC_VP9_PROBE_SIZE 4864 ++#define RKVDEC_VP9_COUNT_SIZE 13232 ++#define RKVDEC_VP9_MAX_SEGMAP_SIZE 73728 ++ ++struct rkvdec_vp9_intra_mode_probs { ++ u8 y_mode[105]; ++ u8 uv_mode[23]; ++}; ++ ++struct rkvdec_vp9_intra_only_frame_probs { ++ u8 coef_intra[4][2][128]; ++ struct rkvdec_vp9_intra_mode_probs intra_mode[10]; ++}; ++ ++struct rkvdec_vp9_inter_frame_probs { ++ u8 y_mode[4][9]; ++ u8 comp_mode[5]; ++ u8 comp_ref[5]; ++ u8 single_ref[5][2]; ++ u8 inter_mode[7][3]; ++ u8 interp_filter[4][2]; ++ u8 padding0[11]; ++ u8 coef[2][4][2][128]; ++ u8 uv_mode_0_2[3][9]; ++ u8 padding1[5]; ++ u8 uv_mode_3_5[3][9]; ++ u8 padding2[5]; ++ u8 uv_mode_6_8[3][9]; ++ u8 padding3[5]; ++ u8 uv_mode_9[9]; ++ u8 padding4[7]; ++ u8 padding5[16]; ++ struct { ++ u8 joint[3]; ++ u8 sign[2]; ++ u8 classes[2][10]; ++ u8 class0_bit[2]; ++ u8 bits[2][10]; ++ u8 class0_fr[2][2][3]; ++ u8 fr[2][3]; ++ u8 class0_hp[2]; ++ u8 hp[2]; ++ } mv; ++}; ++ ++struct rkvdec_vp9_probs { ++ u8 partition[16][3]; ++ u8 pred[3]; ++ u8 tree[7]; ++ u8 skip[3]; ++ u8 tx32[2][3]; ++ u8 tx16[2][2]; ++ u8 tx8[2][1]; ++ u8 is_inter[4]; ++ /* 128 bit alignment */ ++ u8 padding0[3]; ++ union { ++ struct rkvdec_vp9_inter_frame_probs inter; ++ struct rkvdec_vp9_intra_only_frame_probs intra_only; ++ }; ++}; ++ ++/* Data structure describing auxiliary buffer format. */ ++struct rkvdec_vp9_priv_tbl { ++ struct rkvdec_vp9_probs probs; ++ u8 segmap[2][RKVDEC_VP9_MAX_SEGMAP_SIZE]; ++}; ++ ++struct rkvdec_vp9_refs_counts { ++ u32 eob[2]; ++ u32 coeff[3]; ++}; ++ ++struct rkvdec_vp9_inter_frame_symbol_counts { ++ u32 partition[16][4]; ++ u32 skip[3][2]; ++ u32 inter[4][2]; ++ u32 tx32p[2][4]; ++ u32 tx16p[2][4]; ++ u32 tx8p[2][2]; ++ u32 y_mode[4][10]; ++ u32 uv_mode[10][10]; ++ u32 comp[5][2]; ++ u32 comp_ref[5][2]; ++ u32 single_ref[5][2][2]; ++ u32 mv_mode[7][4]; ++ u32 filter[4][3]; ++ u32 mv_joint[4]; ++ u32 sign[2][2]; ++ /* add 1 element for align */ ++ u32 classes[2][11 + 1]; ++ u32 class0[2][2]; ++ u32 bits[2][10][2]; ++ u32 class0_fp[2][2][4]; ++ u32 fp[2][4]; ++ u32 class0_hp[2][2]; ++ u32 hp[2][2]; ++ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; ++}; ++ ++struct rkvdec_vp9_intra_frame_symbol_counts { ++ u32 partition[4][4][4]; ++ u32 skip[3][2]; ++ u32 intra[4][2]; ++ u32 tx32p[2][4]; ++ u32 tx16p[2][4]; ++ u32 tx8p[2][2]; ++ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; ++}; ++ ++struct rkvdec_vp9_run { ++ struct rkvdec_run base; ++ const struct v4l2_ctrl_vp9_frame *decode_params; ++}; ++ ++struct rkvdec_vp9_frame_info { ++ u32 valid : 1; ++ u32 segmapid : 1; ++ u32 frame_context_idx : 2; ++ u32 reference_mode : 2; ++ u32 tx_mode : 3; ++ u32 interpolation_filter : 3; ++ u32 flags; ++ u64 timestamp; ++ struct v4l2_vp9_segmentation seg; ++ struct v4l2_vp9_loop_filter lf; ++}; ++ ++struct rkvdec_vp9_ctx { ++ struct rkvdec_aux_buf priv_tbl; ++ struct rkvdec_aux_buf count_tbl; ++ struct v4l2_vp9_frame_symbol_counts inter_cnts; ++ struct v4l2_vp9_frame_symbol_counts intra_cnts; ++ struct v4l2_vp9_frame_context probability_tables; ++ struct v4l2_vp9_frame_context frame_context[4]; ++ struct rkvdec_vp9_frame_info cur; ++ struct rkvdec_vp9_frame_info last; ++}; ++ ++static void write_coeff_plane(const u8 coef[6][6][3], u8 *coeff_plane) ++{ ++ unsigned int idx = 0, byte_count = 0; ++ int k, m, n; ++ u8 p; ++ ++ for (k = 0; k < 6; k++) { ++ for (m = 0; m < 6; m++) { ++ for (n = 0; n < 3; n++) { ++ p = coef[k][m][n]; ++ coeff_plane[idx++] = p; ++ byte_count++; ++ if (byte_count == 27) { ++ idx += 5; ++ byte_count = 0; ++ } ++ } ++ } ++ } ++} ++ ++static void init_intra_only_probs(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; ++ struct rkvdec_vp9_intra_only_frame_probs *rkprobs; ++ const struct v4l2_vp9_frame_context *probs; ++ unsigned int i, j, k; ++ ++ rkprobs = &tbl->probs.intra_only; ++ probs = &vp9_ctx->probability_tables; ++ ++ /* ++ * intra only 149 x 128 bits ,aligned to 152 x 128 bits coeff related ++ * prob 64 x 128 bits ++ */ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) ++ write_coeff_plane(probs->coef[i][j][0], ++ rkprobs->coef_intra[i][j]); ++ } ++ ++ /* intra mode prob 80 x 128 bits */ ++ for (i = 0; i < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob); i++) { ++ unsigned int byte_count = 0; ++ int idx = 0; ++ ++ /* vp9_kf_y_mode_prob */ ++ for (j = 0; j < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0]); j++) { ++ for (k = 0; k < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0][0]); ++ k++) { ++ u8 val = v4l2_vp9_kf_y_mode_prob[i][j][k]; ++ ++ rkprobs->intra_mode[i].y_mode[idx++] = val; ++ byte_count++; ++ if (byte_count == 27) { ++ byte_count = 0; ++ idx += 5; ++ } ++ } ++ } ++ ++ } ++ ++ for (i = 0; i < sizeof(v4l2_vp9_kf_uv_mode_prob); ++i) { ++ const u8 *ptr = (const u8 *)v4l2_vp9_kf_uv_mode_prob; ++ ++ rkprobs->intra_mode[i / 23].uv_mode[i % 23] = ptr[i]; ++ } ++} ++ ++static void init_inter_probs(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; ++ struct rkvdec_vp9_inter_frame_probs *rkprobs; ++ const struct v4l2_vp9_frame_context *probs; ++ unsigned int i, j, k; ++ ++ rkprobs = &tbl->probs.inter; ++ probs = &vp9_ctx->probability_tables; ++ ++ /* ++ * inter probs ++ * 151 x 128 bits, aligned to 152 x 128 bits ++ * inter only ++ * intra_y_mode & inter_block info 6 x 128 bits ++ */ ++ ++ memcpy(rkprobs->y_mode, probs->y_mode, sizeof(rkprobs->y_mode)); ++ memcpy(rkprobs->comp_mode, probs->comp_mode, ++ sizeof(rkprobs->comp_mode)); ++ memcpy(rkprobs->comp_ref, probs->comp_ref, ++ sizeof(rkprobs->comp_ref)); ++ memcpy(rkprobs->single_ref, probs->single_ref, ++ sizeof(rkprobs->single_ref)); ++ memcpy(rkprobs->inter_mode, probs->inter_mode, ++ sizeof(rkprobs->inter_mode)); ++ memcpy(rkprobs->interp_filter, probs->interp_filter, ++ sizeof(rkprobs->interp_filter)); ++ ++ /* 128 x 128 bits coeff related */ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { ++ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) ++ write_coeff_plane(probs->coef[i][j][k], ++ rkprobs->coef[k][i][j]); ++ } ++ } ++ ++ /* intra uv mode 6 x 128 */ ++ memcpy(rkprobs->uv_mode_0_2, &probs->uv_mode[0], ++ sizeof(rkprobs->uv_mode_0_2)); ++ memcpy(rkprobs->uv_mode_3_5, &probs->uv_mode[3], ++ sizeof(rkprobs->uv_mode_3_5)); ++ memcpy(rkprobs->uv_mode_6_8, &probs->uv_mode[6], ++ sizeof(rkprobs->uv_mode_6_8)); ++ memcpy(rkprobs->uv_mode_9, &probs->uv_mode[9], ++ sizeof(rkprobs->uv_mode_9)); ++ ++ /* mv related 6 x 128 */ ++ memcpy(rkprobs->mv.joint, probs->mv.joint, ++ sizeof(rkprobs->mv.joint)); ++ memcpy(rkprobs->mv.sign, probs->mv.sign, ++ sizeof(rkprobs->mv.sign)); ++ memcpy(rkprobs->mv.classes, probs->mv.classes, ++ sizeof(rkprobs->mv.classes)); ++ memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, ++ sizeof(rkprobs->mv.class0_bit)); ++ memcpy(rkprobs->mv.bits, probs->mv.bits, ++ sizeof(rkprobs->mv.bits)); ++ memcpy(rkprobs->mv.class0_fr, probs->mv.class0_fr, ++ sizeof(rkprobs->mv.class0_fr)); ++ memcpy(rkprobs->mv.fr, probs->mv.fr, ++ sizeof(rkprobs->mv.fr)); ++ memcpy(rkprobs->mv.class0_hp, probs->mv.class0_hp, ++ sizeof(rkprobs->mv.class0_hp)); ++ memcpy(rkprobs->mv.hp, probs->mv.hp, ++ sizeof(rkprobs->mv.hp)); ++} ++ ++static void init_probs(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ const struct v4l2_ctrl_vp9_frame *dec_params; ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; ++ struct rkvdec_vp9_probs *rkprobs = &tbl->probs; ++ const struct v4l2_vp9_segmentation *seg; ++ const struct v4l2_vp9_frame_context *probs; ++ bool intra_only; ++ ++ dec_params = run->decode_params; ++ probs = &vp9_ctx->probability_tables; ++ seg = &dec_params->seg; ++ ++ memset(rkprobs, 0, sizeof(*rkprobs)); ++ ++ intra_only = !!(dec_params->flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); ++ ++ /* sb info 5 x 128 bit */ ++ memcpy(rkprobs->partition, ++ intra_only ? v4l2_vp9_kf_partition_probs : probs->partition, ++ sizeof(rkprobs->partition)); ++ ++ memcpy(rkprobs->pred, seg->pred_probs, sizeof(rkprobs->pred)); ++ memcpy(rkprobs->tree, seg->tree_probs, sizeof(rkprobs->tree)); ++ memcpy(rkprobs->skip, probs->skip, sizeof(rkprobs->skip)); ++ memcpy(rkprobs->tx32, probs->tx32, sizeof(rkprobs->tx32)); ++ memcpy(rkprobs->tx16, probs->tx16, sizeof(rkprobs->tx16)); ++ memcpy(rkprobs->tx8, probs->tx8, sizeof(rkprobs->tx8)); ++ memcpy(rkprobs->is_inter, probs->is_inter, sizeof(rkprobs->is_inter)); ++ ++ if (intra_only) ++ init_intra_only_probs(ctx, run); ++ else ++ init_inter_probs(ctx, run); ++} ++ ++struct rkvdec_vp9_ref_reg { ++ u32 reg_frm_size; ++ u32 reg_hor_stride; ++ u32 reg_y_stride; ++ u32 reg_yuv_stride; ++ u32 reg_ref_base; ++}; ++ ++static struct rkvdec_vp9_ref_reg ref_regs[] = { ++ { ++ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(0), ++ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(0), ++ .reg_y_stride = RKVDEC_VP9_LAST_FRAME_YSTRIDE, ++ .reg_yuv_stride = RKVDEC_VP9_LAST_FRAME_YUVSTRIDE, ++ .reg_ref_base = RKVDEC_REG_VP9_LAST_FRAME_BASE, ++ }, ++ { ++ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(1), ++ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(1), ++ .reg_y_stride = RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE, ++ .reg_yuv_stride = 0, ++ .reg_ref_base = RKVDEC_REG_VP9_GOLDEN_FRAME_BASE, ++ }, ++ { ++ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(2), ++ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(2), ++ .reg_y_stride = RKVDEC_VP9_ALTREF_FRAME_YSTRIDE, ++ .reg_yuv_stride = 0, ++ .reg_ref_base = RKVDEC_REG_VP9_ALTREF_FRAME_BASE, ++ } ++}; ++ ++static struct rkvdec_decoded_buffer * ++get_ref_buf(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) ++{ ++ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; ++ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; ++ int buf_idx; ++ ++ /* ++ * If a ref is unused or invalid, address of current destination ++ * buffer is returned. ++ */ ++ buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); ++ if (buf_idx < 0) ++ return vb2_to_rkvdec_decoded_buf(&dst->vb2_buf); ++ ++ return vb2_to_rkvdec_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); ++} ++ ++static dma_addr_t get_mv_base_addr(struct rkvdec_decoded_buffer *buf) ++{ ++ unsigned int aligned_pitch, aligned_height, yuv_len; ++ ++ aligned_height = round_up(buf->vp9.height, 64); ++ aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; ++ yuv_len = (aligned_height * aligned_pitch * 3) / 2; ++ ++ return vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0) + ++ yuv_len; ++} ++ ++static void config_ref_registers(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run, ++ struct rkvdec_decoded_buffer *ref_buf, ++ struct rkvdec_vp9_ref_reg *ref_reg) ++{ ++ unsigned int aligned_pitch, aligned_height, y_len, yuv_len; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ ++ aligned_height = round_up(ref_buf->vp9.height, 64); ++ writel_relaxed(RKVDEC_VP9_FRAMEWIDTH(ref_buf->vp9.width) | ++ RKVDEC_VP9_FRAMEHEIGHT(ref_buf->vp9.height), ++ rkvdec->regs + ref_reg->reg_frm_size); ++ ++ writel_relaxed(vb2_dma_contig_plane_dma_addr(&ref_buf->base.vb.vb2_buf, 0), ++ rkvdec->regs + ref_reg->reg_ref_base); ++ ++ if (&ref_buf->base.vb == run->base.bufs.dst) ++ return; ++ ++ aligned_pitch = round_up(ref_buf->vp9.width * ref_buf->vp9.bit_depth, 512) / 8; ++ y_len = aligned_height * aligned_pitch; ++ yuv_len = (y_len * 3) / 2; ++ ++ writel_relaxed(RKVDEC_HOR_Y_VIRSTRIDE(aligned_pitch / 16) | ++ RKVDEC_HOR_UV_VIRSTRIDE(aligned_pitch / 16), ++ rkvdec->regs + ref_reg->reg_hor_stride); ++ writel_relaxed(RKVDEC_VP9_REF_YSTRIDE(y_len / 16), ++ rkvdec->regs + ref_reg->reg_y_stride); ++ ++ if (!ref_reg->reg_yuv_stride) ++ return; ++ ++ writel_relaxed(RKVDEC_VP9_REF_YUVSTRIDE(yuv_len / 16), ++ rkvdec->regs + ref_reg->reg_yuv_stride); ++} ++ ++static void config_seg_registers(struct rkvdec_ctx *ctx, unsigned int segid) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ const struct v4l2_vp9_segmentation *seg; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ s16 feature_val; ++ int feature_id; ++ u32 val = 0; ++ ++ seg = vp9_ctx->last.valid ? &vp9_ctx->last.seg : &vp9_ctx->cur.seg; ++ feature_id = V4L2_VP9_SEG_LVL_ALT_Q; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { ++ feature_val = seg->feature_data[segid][feature_id]; ++ val |= RKVDEC_SEGID_FRAME_QP_DELTA_EN(1) | ++ RKVDEC_SEGID_FRAME_QP_DELTA(feature_val); ++ } ++ ++ feature_id = V4L2_VP9_SEG_LVL_ALT_L; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { ++ feature_val = seg->feature_data[segid][feature_id]; ++ val |= RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(1) | ++ RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(feature_val); ++ } ++ ++ feature_id = V4L2_VP9_SEG_LVL_REF_FRAME; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { ++ feature_val = seg->feature_data[segid][feature_id]; ++ val |= RKVDEC_SEGID_REFERINFO_EN(1) | ++ RKVDEC_SEGID_REFERINFO(feature_val); ++ } ++ ++ feature_id = V4L2_VP9_SEG_LVL_SKIP; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) ++ val |= RKVDEC_SEGID_FRAME_SKIP_EN(1); ++ ++ if (!segid && ++ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) ++ val |= RKVDEC_SEGID_ABS_DELTA(1); ++ ++ writel_relaxed(val, rkvdec->regs + RKVDEC_VP9_SEGID_GRP(segid)); ++} ++ ++static void update_dec_buf_info(struct rkvdec_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ buf->vp9.width = dec_params->frame_width_minus_1 + 1; ++ buf->vp9.height = dec_params->frame_height_minus_1 + 1; ++ buf->vp9.bit_depth = dec_params->bit_depth; ++} ++ ++static void update_ctx_cur_info(struct rkvdec_vp9_ctx *vp9_ctx, ++ struct rkvdec_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ vp9_ctx->cur.valid = true; ++ vp9_ctx->cur.reference_mode = dec_params->reference_mode; ++ vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; ++ vp9_ctx->cur.flags = dec_params->flags; ++ vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; ++ vp9_ctx->cur.seg = dec_params->seg; ++ vp9_ctx->cur.lf = dec_params->lf; ++} ++ ++static void update_ctx_last_info(struct rkvdec_vp9_ctx *vp9_ctx) ++{ ++ vp9_ctx->last = vp9_ctx->cur; ++} ++ ++static void config_registers(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ unsigned int y_len, uv_len, yuv_len, bit_depth, aligned_height, aligned_pitch, stream_len; ++ const struct v4l2_ctrl_vp9_frame *dec_params; ++ struct rkvdec_decoded_buffer *ref_bufs[3]; ++ struct rkvdec_decoded_buffer *dst, *last, *mv_ref; ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ u32 val, last_frame_info = 0; ++ const struct v4l2_vp9_segmentation *seg; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ dma_addr_t addr; ++ bool intra_only; ++ unsigned int i; ++ ++ dec_params = run->decode_params; ++ dst = vb2_to_rkvdec_decoded_buf(&run->base.bufs.dst->vb2_buf); ++ ref_bufs[0] = get_ref_buf(ctx, &dst->base.vb, dec_params->last_frame_ts); ++ ref_bufs[1] = get_ref_buf(ctx, &dst->base.vb, dec_params->golden_frame_ts); ++ ref_bufs[2] = get_ref_buf(ctx, &dst->base.vb, dec_params->alt_frame_ts); ++ ++ if (vp9_ctx->last.valid) ++ last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); ++ else ++ last = dst; ++ ++ update_dec_buf_info(dst, dec_params); ++ update_ctx_cur_info(vp9_ctx, dst, dec_params); ++ seg = &dec_params->seg; ++ ++ intra_only = !!(dec_params->flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); ++ ++ writel_relaxed(RKVDEC_MODE(RKVDEC_MODE_VP9), ++ rkvdec->regs + RKVDEC_REG_SYSCTRL); ++ ++ bit_depth = dec_params->bit_depth; ++ aligned_height = round_up(ctx->decoded_fmt.fmt.pix_mp.height, 64); ++ ++ aligned_pitch = round_up(ctx->decoded_fmt.fmt.pix_mp.width * ++ bit_depth, ++ 512) / 8; ++ y_len = aligned_height * aligned_pitch; ++ uv_len = y_len / 2; ++ yuv_len = y_len + uv_len; ++ ++ writel_relaxed(RKVDEC_Y_HOR_VIRSTRIDE(aligned_pitch / 16) | ++ RKVDEC_UV_HOR_VIRSTRIDE(aligned_pitch / 16), ++ rkvdec->regs + RKVDEC_REG_PICPAR); ++ writel_relaxed(RKVDEC_Y_VIRSTRIDE(y_len / 16), ++ rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); ++ writel_relaxed(RKVDEC_YUV_VIRSTRIDE(yuv_len / 16), ++ rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); ++ ++ stream_len = vb2_get_plane_payload(&run->base.bufs.src->vb2_buf, 0); ++ writel_relaxed(RKVDEC_STRM_LEN(stream_len), ++ rkvdec->regs + RKVDEC_REG_STRM_LEN); ++ ++ /* ++ * Reset count buffer, because decoder only output intra related syntax ++ * counts when decoding intra frame, but update entropy need to update ++ * all the probabilities. ++ */ ++ if (intra_only) ++ memset(vp9_ctx->count_tbl.cpu, 0, vp9_ctx->count_tbl.size); ++ ++ vp9_ctx->cur.segmapid = vp9_ctx->last.segmapid; ++ if (!intra_only && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ (!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) || ++ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP))) ++ vp9_ctx->cur.segmapid++; ++ ++ for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) ++ config_ref_registers(ctx, run, ref_bufs[i], &ref_regs[i]); ++ ++ for (i = 0; i < 8; i++) ++ config_seg_registers(ctx, i); ++ ++ writel_relaxed(RKVDEC_VP9_TX_MODE(vp9_ctx->cur.tx_mode) | ++ RKVDEC_VP9_FRAME_REF_MODE(dec_params->reference_mode), ++ rkvdec->regs + RKVDEC_VP9_CPRHEADER_CONFIG); ++ ++ if (!intra_only) { ++ const struct v4l2_vp9_loop_filter *lf; ++ s8 delta; ++ ++ if (vp9_ctx->last.valid) ++ lf = &vp9_ctx->last.lf; ++ else ++ lf = &vp9_ctx->cur.lf; ++ ++ val = 0; ++ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { ++ delta = lf->ref_deltas[i]; ++ val |= RKVDEC_REF_DELTAS_LASTFRAME(i, delta); ++ } ++ ++ writel_relaxed(val, ++ rkvdec->regs + RKVDEC_VP9_REF_DELTAS_LASTFRAME); ++ ++ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { ++ delta = lf->mode_deltas[i]; ++ last_frame_info |= RKVDEC_MODE_DELTAS_LASTFRAME(i, ++ delta); ++ } ++ } ++ ++ if (vp9_ctx->last.valid && !intra_only && ++ vp9_ctx->last.seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) ++ last_frame_info |= RKVDEC_SEG_EN_LASTFRAME; ++ ++ if (vp9_ctx->last.valid && ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME) ++ last_frame_info |= RKVDEC_LAST_SHOW_FRAME; ++ ++ if (vp9_ctx->last.valid && ++ vp9_ctx->last.flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) ++ last_frame_info |= RKVDEC_LAST_INTRA_ONLY; ++ ++ if (vp9_ctx->last.valid && ++ last->vp9.width == dst->vp9.width && ++ last->vp9.height == dst->vp9.height) ++ last_frame_info |= RKVDEC_LAST_WIDHHEIGHT_EQCUR; ++ ++ writel_relaxed(last_frame_info, ++ rkvdec->regs + RKVDEC_VP9_INFO_LASTFRAME); ++ ++ writel_relaxed(stream_len - dec_params->compressed_header_size - ++ dec_params->uncompressed_header_size, ++ rkvdec->regs + RKVDEC_VP9_LASTTILE_SIZE); ++ ++ for (i = 0; !intra_only && i < ARRAY_SIZE(ref_bufs); i++) { ++ unsigned int refw = ref_bufs[i]->vp9.width; ++ unsigned int refh = ref_bufs[i]->vp9.height; ++ u32 hscale, vscale; ++ ++ hscale = (refw << 14) / dst->vp9.width; ++ vscale = (refh << 14) / dst->vp9.height; ++ writel_relaxed(RKVDEC_VP9_REF_HOR_SCALE(hscale) | ++ RKVDEC_VP9_REF_VER_SCALE(vscale), ++ rkvdec->regs + RKVDEC_VP9_REF_SCALE(i)); ++ } ++ ++ addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); ++ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); ++ addr = vb2_dma_contig_plane_dma_addr(&run->base.bufs.src->vb2_buf, 0); ++ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); ++ writel_relaxed(vp9_ctx->priv_tbl.dma + ++ offsetof(struct rkvdec_vp9_priv_tbl, probs), ++ rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); ++ writel_relaxed(vp9_ctx->count_tbl.dma, ++ rkvdec->regs + RKVDEC_REG_VP9COUNT_BASE); ++ ++ writel_relaxed(vp9_ctx->priv_tbl.dma + ++ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + ++ (RKVDEC_VP9_MAX_SEGMAP_SIZE * vp9_ctx->cur.segmapid), ++ rkvdec->regs + RKVDEC_REG_VP9_SEGIDCUR_BASE); ++ writel_relaxed(vp9_ctx->priv_tbl.dma + ++ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + ++ (RKVDEC_VP9_MAX_SEGMAP_SIZE * (!vp9_ctx->cur.segmapid)), ++ rkvdec->regs + RKVDEC_REG_VP9_SEGIDLAST_BASE); ++ ++ if (!intra_only && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ vp9_ctx->last.valid) ++ mv_ref = last; ++ else ++ mv_ref = dst; ++ ++ writel_relaxed(get_mv_base_addr(mv_ref), ++ rkvdec->regs + RKVDEC_VP9_REF_COLMV_BASE); ++ ++ writel_relaxed(ctx->decoded_fmt.fmt.pix_mp.width | ++ (ctx->decoded_fmt.fmt.pix_mp.height << 16), ++ rkvdec->regs + RKVDEC_REG_PERFORMANCE_CYCLE); ++} ++ ++static int validate_dec_params(struct rkvdec_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ unsigned int aligned_width, aligned_height; ++ ++ /* We only support profile 0. */ ++ if (dec_params->profile != 0) { ++ dev_err(ctx->dev->dev, "unsupported profile %d\n", ++ dec_params->profile); ++ return -EINVAL; ++ } ++ ++ aligned_width = round_up(dec_params->frame_width_minus_1 + 1, 64); ++ aligned_height = round_up(dec_params->frame_height_minus_1 + 1, 64); ++ ++ /* ++ * Userspace should update the capture/decoded format when the ++ * resolution changes. ++ */ ++ if (aligned_width != ctx->decoded_fmt.fmt.pix_mp.width || ++ aligned_height != ctx->decoded_fmt.fmt.pix_mp.height) { ++ dev_err(ctx->dev->dev, ++ "unexpected bitstream resolution %dx%d\n", ++ dec_params->frame_width_minus_1 + 1, ++ dec_params->frame_height_minus_1 + 1); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rkvdec_vp9_run_preamble(struct rkvdec_ctx *ctx, ++ struct rkvdec_vp9_run *run) ++{ ++ const struct v4l2_ctrl_vp9_frame *dec_params; ++ const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct v4l2_ctrl *ctrl; ++ unsigned int fctx_idx; ++ int ret; ++ ++ /* v4l2-specific stuff */ ++ rkvdec_run_preamble(ctx, &run->base); ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, ++ V4L2_CID_STATELESS_VP9_FRAME); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ dec_params = ctrl->p_cur.p; ++ ++ ret = validate_dec_params(ctx, dec_params); ++ if (ret) ++ return ret; ++ ++ run->decode_params = dec_params; ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ prob_updates = ctrl->p_cur.p; ++ vp9_ctx->cur.tx_mode = prob_updates->tx_mode; ++ ++ /* ++ * vp9 stuff ++ * ++ * by this point the userspace has done all parts of 6.2 uncompressed_header() ++ * except this fragment: ++ * if ( FrameIsIntra || error_resilient_mode ) { ++ * setup_past_independence ( ) ++ * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || ++ * reset_frame_context == 3 ) { ++ * for ( i = 0; i < 4; i ++ ) { ++ * save_probs( i ) ++ * } ++ * } else if ( reset_frame_context == 2 ) { ++ * save_probs( frame_context_idx ) ++ * } ++ * frame_context_idx = 0 ++ * } ++ */ ++ fctx_idx = v4l2_vp9_reset_frame_ctx(dec_params, vp9_ctx->frame_context); ++ vp9_ctx->cur.frame_context_idx = fctx_idx; ++ ++ /* 6.1 frame(sz): load_probs() and load_probs2() */ ++ vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* ++ * The userspace has also performed 6.3 compressed_header(), but handling the ++ * probs in a special way. All probs which need updating, except MV-related, ++ * have been read from the bitstream and translated through inv_map_table[], ++ * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed ++ * by userspace are either translated values (there are no 0 values in ++ * inv_map_table[]), or zero to indicate no update. All MV-related probs which need ++ * updating have been read from the bitstream and (mv_prob << 1) | 1 has been ++ * performed. The values passed by userspace are either new values ++ * to replace old ones (the above mentioned shift and bitwise or never result in ++ * a zero) or zero to indicate no update. ++ * fw_update_probs() performs actual probs updates or leaves probs as-is ++ * for values for which a zero was passed from userspace. ++ */ ++ v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, dec_params); ++ ++ return 0; ++} ++ ++static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_vp9_run run = { }; ++ int ret; ++ ++ ret = rkvdec_vp9_run_preamble(ctx, &run); ++ if (ret) { ++ rkvdec_run_postamble(ctx, &run.base); ++ return ret; ++ } ++ ++ /* Prepare probs. */ ++ init_probs(ctx, &run); ++ ++ /* Configure hardware registers. */ ++ config_registers(ctx, &run); ++ ++ rkvdec_run_postamble(ctx, &run.base); ++ ++ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); ++ ++ writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); ++ writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); ++ ++ writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); ++ /* Start decoding! */ ++ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | ++ RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, ++ rkvdec->regs + RKVDEC_REG_INTERRUPT); ++ ++ return 0; ++} ++ ++#define copy_tx_and_skip(p1, p2) \ ++do { \ ++ memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ ++ memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ ++ memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ ++ memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ ++} while (0) ++ ++static void rkvdec_vp9_done(struct rkvdec_ctx *ctx, ++ struct vb2_v4l2_buffer *src_buf, ++ struct vb2_v4l2_buffer *dst_buf, ++ enum vb2_buffer_state result) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ unsigned int fctx_idx; ++ ++ /* v4l2-specific stuff */ ++ if (result == VB2_BUF_STATE_ERROR) ++ goto out_update_last; ++ ++ /* ++ * vp9 stuff ++ * ++ * 6.1.2 refresh_probs() ++ * ++ * In the spec a complementary condition goes last in 6.1.2 refresh_probs(), ++ * but it makes no sense to perform all the activities from the first "if" ++ * there if we actually are not refreshing the frame context. On top of that, ++ * because of 6.2 uncompressed_header() whenever error_resilient_mode == 1, ++ * refresh_frame_context == 0. Consequently, if we don't jump to out_update_last ++ * it means error_resilient_mode must be 0. ++ */ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) ++ goto out_update_last; ++ ++ fctx_idx = vp9_ctx->cur.frame_context_idx; ++ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { ++ /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ ++ struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; ++ bool frame_is_intra = vp9_ctx->cur.flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); ++ struct tx_and_skip { ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 skip[3]; ++ } _tx_skip, *tx_skip = &_tx_skip; ++ struct v4l2_vp9_frame_symbol_counts *counts; ++ ++ /* buffer the forward-updated TX and skip probs */ ++ if (frame_is_intra) ++ copy_tx_and_skip(tx_skip, probs); ++ ++ /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ ++ *probs = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* if FrameIsIntra then undo the effect of load_probs2() */ ++ if (frame_is_intra) ++ copy_tx_and_skip(probs, tx_skip); ++ ++ counts = frame_is_intra ? &vp9_ctx->intra_cnts : &vp9_ctx->inter_cnts; ++ v4l2_vp9_adapt_coef_probs(probs, counts, ++ !vp9_ctx->last.valid || ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, ++ frame_is_intra); ++ if (!frame_is_intra) { ++ const struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts; ++ u32 classes[2][11]; ++ int i; ++ ++ inter_cnts = vp9_ctx->count_tbl.cpu; ++ for (i = 0; i < ARRAY_SIZE(classes); ++i) ++ memcpy(classes[i], inter_cnts->classes[i], sizeof(classes[0])); ++ counts->classes = &classes; ++ ++ /* load_probs2() already done */ ++ v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, ++ vp9_ctx->cur.reference_mode, ++ vp9_ctx->cur.interpolation_filter, ++ vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); ++ } ++ } ++ ++ /* 6.1.2 refresh_probs(): save_probs(fctx_idx) */ ++ vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; ++ ++out_update_last: ++ update_ctx_last_info(vp9_ctx); ++} ++ ++static void rkvdec_init_v4l2_vp9_count_tbl(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_intra_frame_symbol_counts *intra_cnts = vp9_ctx->count_tbl.cpu; ++ struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts = vp9_ctx->count_tbl.cpu; ++ int i, j, k, l, m; ++ ++ vp9_ctx->inter_cnts.partition = &inter_cnts->partition; ++ vp9_ctx->inter_cnts.skip = &inter_cnts->skip; ++ vp9_ctx->inter_cnts.intra_inter = &inter_cnts->inter; ++ vp9_ctx->inter_cnts.tx32p = &inter_cnts->tx32p; ++ vp9_ctx->inter_cnts.tx16p = &inter_cnts->tx16p; ++ vp9_ctx->inter_cnts.tx8p = &inter_cnts->tx8p; ++ ++ vp9_ctx->intra_cnts.partition = (u32 (*)[16][4])(&intra_cnts->partition); ++ vp9_ctx->intra_cnts.skip = &intra_cnts->skip; ++ vp9_ctx->intra_cnts.intra_inter = &intra_cnts->intra; ++ vp9_ctx->intra_cnts.tx32p = &intra_cnts->tx32p; ++ vp9_ctx->intra_cnts.tx16p = &intra_cnts->tx16p; ++ vp9_ctx->intra_cnts.tx8p = &intra_cnts->tx8p; ++ ++ vp9_ctx->inter_cnts.y_mode = &inter_cnts->y_mode; ++ vp9_ctx->inter_cnts.uv_mode = &inter_cnts->uv_mode; ++ vp9_ctx->inter_cnts.comp = &inter_cnts->comp; ++ vp9_ctx->inter_cnts.comp_ref = &inter_cnts->comp_ref; ++ vp9_ctx->inter_cnts.single_ref = &inter_cnts->single_ref; ++ vp9_ctx->inter_cnts.mv_mode = &inter_cnts->mv_mode; ++ vp9_ctx->inter_cnts.filter = &inter_cnts->filter; ++ vp9_ctx->inter_cnts.mv_joint = &inter_cnts->mv_joint; ++ vp9_ctx->inter_cnts.sign = &inter_cnts->sign; ++ /* ++ * rk hardware actually uses "u32 classes[2][11 + 1];" ++ * instead of "u32 classes[2][11];", so this must be explicitly ++ * copied into vp9_ctx->classes when passing the data to the ++ * vp9 library function ++ */ ++ vp9_ctx->inter_cnts.class0 = &inter_cnts->class0; ++ vp9_ctx->inter_cnts.bits = &inter_cnts->bits; ++ vp9_ctx->inter_cnts.class0_fp = &inter_cnts->class0_fp; ++ vp9_ctx->inter_cnts.fp = &inter_cnts->fp; ++ vp9_ctx->inter_cnts.class0_hp = &inter_cnts->class0_hp; ++ vp9_ctx->inter_cnts.hp = &inter_cnts->hp; ++ ++#define INNERMOST_LOOP \ ++ do { \ ++ for (m = 0; m < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0][0]); ++m) {\ ++ vp9_ctx->inter_cnts.coeff[i][j][k][l][m] = \ ++ &inter_cnts->ref_cnt[k][i][j][l][m].coeff; \ ++ vp9_ctx->inter_cnts.eob[i][j][k][l][m][0] = \ ++ &inter_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ ++ vp9_ctx->inter_cnts.eob[i][j][k][l][m][1] = \ ++ &inter_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ ++ \ ++ vp9_ctx->intra_cnts.coeff[i][j][k][l][m] = \ ++ &intra_cnts->ref_cnt[k][i][j][l][m].coeff; \ ++ vp9_ctx->intra_cnts.eob[i][j][k][l][m][0] = \ ++ &intra_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ ++ vp9_ctx->intra_cnts.eob[i][j][k][l][m][1] = \ ++ &intra_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ ++ } \ ++ } while (0) ++ ++ for (i = 0; i < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff); ++i) ++ for (j = 0; j < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0]); ++j) ++ for (k = 0; k < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0]); ++k) ++ for (l = 0; l < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0]); ++l) ++ INNERMOST_LOOP; ++#undef INNERMOST_LOOP ++} ++ ++static int rkvdec_vp9_start(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_vp9_priv_tbl *priv_tbl; ++ struct rkvdec_vp9_ctx *vp9_ctx; ++ unsigned char *count_tbl; ++ int ret; ++ ++ vp9_ctx = kzalloc(sizeof(*vp9_ctx), GFP_KERNEL); ++ if (!vp9_ctx) ++ return -ENOMEM; ++ ++ ctx->priv = vp9_ctx; ++ ++ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), ++ &vp9_ctx->priv_tbl.dma, GFP_KERNEL); ++ if (!priv_tbl) { ++ ret = -ENOMEM; ++ goto err_free_ctx; ++ } ++ ++ vp9_ctx->priv_tbl.size = sizeof(*priv_tbl); ++ vp9_ctx->priv_tbl.cpu = priv_tbl; ++ memset(priv_tbl, 0, sizeof(*priv_tbl)); ++ ++ count_tbl = dma_alloc_coherent(rkvdec->dev, RKVDEC_VP9_COUNT_SIZE, ++ &vp9_ctx->count_tbl.dma, GFP_KERNEL); ++ if (!count_tbl) { ++ ret = -ENOMEM; ++ goto err_free_priv_tbl; ++ } ++ ++ vp9_ctx->count_tbl.size = RKVDEC_VP9_COUNT_SIZE; ++ vp9_ctx->count_tbl.cpu = count_tbl; ++ memset(count_tbl, 0, sizeof(*count_tbl)); ++ rkvdec_init_v4l2_vp9_count_tbl(ctx); ++ ++ return 0; ++ ++err_free_priv_tbl: ++ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, ++ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); ++ ++err_free_ctx: ++ kfree(vp9_ctx); ++ return ret; ++} ++ ++static void rkvdec_vp9_stop(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ ++ dma_free_coherent(rkvdec->dev, vp9_ctx->count_tbl.size, ++ vp9_ctx->count_tbl.cpu, vp9_ctx->count_tbl.dma); ++ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, ++ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); ++ kfree(vp9_ctx); ++} ++ ++static int rkvdec_vp9_adjust_fmt(struct rkvdec_ctx *ctx, ++ struct v4l2_format *f) ++{ ++ struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; ++ ++ fmt->num_planes = 1; ++ if (!fmt->plane_fmt[0].sizeimage) ++ fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * 2; ++ return 0; ++} ++ ++const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops = { ++ .adjust_fmt = rkvdec_vp9_adjust_fmt, ++ .start = rkvdec_vp9_start, ++ .stop = rkvdec_vp9_stop, ++ .run = rkvdec_vp9_run, ++ .done = rkvdec_vp9_done, ++}; +diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c +index 4fd4a2907da7..ad2624c30843 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.c ++++ b/drivers/staging/media/rkvdec/rkvdec.c +@@ -99,10 +99,30 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { + .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), + }; + +-static const u32 rkvdec_h264_decoded_fmts[] = { ++static const u32 rkvdec_h264_vp9_decoded_fmts[] = { + V4L2_PIX_FMT_NV12, + }; + ++static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { ++ { ++ .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, ++ }, ++ { ++ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, ++ .cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, ++ .cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0, ++ .cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0, ++ }, ++}; ++ ++static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { ++ .ctrls = rkvdec_vp9_ctrl_descs, ++ .num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs), ++}; ++ + static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_H264_SLICE, +@@ -116,8 +136,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + }, + .ctrls = &rkvdec_h264_ctrls, + .ops = &rkvdec_h264_fmt_ops, +- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), +- .decoded_fmts = rkvdec_h264_decoded_fmts, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, ++ }, ++ { ++ .fourcc = V4L2_PIX_FMT_VP9_FRAME, ++ .frmsize = { ++ .min_width = 64, ++ .max_width = 4096, ++ .step_width = 64, ++ .min_height = 64, ++ .max_height = 2304, ++ .step_height = 64, ++ }, ++ .ctrls = &rkvdec_vp9_ctrls, ++ .ops = &rkvdec_vp9_fmt_ops, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, + } + }; + +diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h +index 52ac3874c5e5..2f4ea1786b93 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.h ++++ b/drivers/staging/media/rkvdec/rkvdec.h +@@ -42,14 +42,18 @@ struct rkvdec_run { + + struct rkvdec_vp9_decoded_buffer_info { + /* Info needed when the decoded frame serves as a reference frame. */ +- u16 width; +- u16 height; +- u32 bit_depth : 4; ++ unsigned short width; ++ unsigned short height; ++ unsigned int bit_depth : 4; + }; + + struct rkvdec_decoded_buffer { + /* Must be the first field in this struct. */ + struct v4l2_m2m_buffer base; ++ ++ union { ++ struct rkvdec_vp9_decoded_buffer_info vp9; ++ }; + }; + + static inline struct rkvdec_decoded_buffer * +@@ -116,4 +120,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + + extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; ++extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; ++ + #endif /* RKVDEC_H_ */ diff --git a/projects/Allwinner/patches/linux/0074-media-hantro-Rename-registers.patch b/projects/Allwinner/patches/linux/0074-media-hantro-Rename-registers.patch new file mode 100644 index 0000000000..84d420e852 --- /dev/null +++ b/projects/Allwinner/patches/linux/0074-media-hantro-Rename-registers.patch @@ -0,0 +1,138 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:38 +0100 +Subject: [PATCH] media: hantro: Rename registers + +Add more consistency in the way registers are named. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +--- + .../staging/media/hantro/hantro_g2_hevc_dec.c | 40 +++++++++---------- + drivers/staging/media/hantro/hantro_g2_regs.h | 28 ++++++------- + 2 files changed, 34 insertions(+), 34 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +index 76a921163b9a..abae36f9b418 100644 +--- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +@@ -448,9 +448,9 @@ static int set_ref(struct hantro_ctx *ctx) + if (dpb[i].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR) + dpb_longterm_e |= BIT(V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1 - i); + +- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); +- hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); +- hantro_write_addr(vpu, G2_REG_DMV_REF(i), mv_addr); ++ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); ++ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); ++ hantro_write_addr(vpu, G2_REF_MV_ADDR(i), mv_addr); + } + + luma_addr = hantro_hevc_get_ref_buf(ctx, decode_params->pic_order_cnt_val); +@@ -460,20 +460,20 @@ static int set_ref(struct hantro_ctx *ctx) + chroma_addr = luma_addr + cr_offset; + mv_addr = luma_addr + mv_offset; + +- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); +- hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); +- hantro_write_addr(vpu, G2_REG_DMV_REF(i++), mv_addr); ++ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); ++ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); ++ hantro_write_addr(vpu, G2_REF_MV_ADDR(i++), mv_addr); + +- hantro_write_addr(vpu, G2_ADDR_DST, luma_addr); +- hantro_write_addr(vpu, G2_ADDR_DST_CHR, chroma_addr); +- hantro_write_addr(vpu, G2_ADDR_DST_MV, mv_addr); ++ hantro_write_addr(vpu, G2_OUT_LUMA_ADDR, luma_addr); ++ hantro_write_addr(vpu, G2_OUT_CHROMA_ADDR, chroma_addr); ++ hantro_write_addr(vpu, G2_OUT_MV_ADDR, mv_addr); + + hantro_hevc_ref_remove_unused(ctx); + + for (; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) { +- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), 0); +- hantro_write_addr(vpu, G2_REG_CHR_REF(i), 0); +- hantro_write_addr(vpu, G2_REG_DMV_REF(i), 0); ++ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), 0); ++ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), 0); ++ hantro_write_addr(vpu, G2_REF_MV_ADDR(i), 0); + } + + hantro_reg_write(vpu, &g2_refer_lterm_e, dpb_longterm_e); +@@ -499,7 +499,7 @@ static void set_buffers(struct hantro_ctx *ctx) + src_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); + src_buf_len = vb2_plane_size(&src_buf->vb2_buf, 0); + +- hantro_write_addr(vpu, G2_ADDR_STR, src_dma); ++ hantro_write_addr(vpu, G2_STREAM_ADDR, src_dma); + hantro_reg_write(vpu, &g2_stream_len, src_len); + hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len); + hantro_reg_write(vpu, &g2_strm_start_offset, 0); +@@ -508,12 +508,12 @@ static void set_buffers(struct hantro_ctx *ctx) + /* Destination (decoded frame) buffer. */ + dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf); + +- hantro_write_addr(vpu, G2_RASTER_SCAN, dst_dma); +- hantro_write_addr(vpu, G2_RASTER_SCAN_CHR, dst_dma + cr_offset); +- hantro_write_addr(vpu, G2_ADDR_TILE_SIZE, ctx->hevc_dec.tile_sizes.dma); +- hantro_write_addr(vpu, G2_TILE_FILTER, ctx->hevc_dec.tile_filter.dma); +- hantro_write_addr(vpu, G2_TILE_SAO, ctx->hevc_dec.tile_sao.dma); +- hantro_write_addr(vpu, G2_TILE_BSD, ctx->hevc_dec.tile_bsd.dma); ++ hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); ++ hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + cr_offset); ++ hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma); ++ hantro_write_addr(vpu, G2_TILE_FILTER_ADDR, ctx->hevc_dec.tile_filter.dma); ++ hantro_write_addr(vpu, G2_TILE_SAO_ADDR, ctx->hevc_dec.tile_sao.dma); ++ hantro_write_addr(vpu, G2_TILE_BSD_ADDR, ctx->hevc_dec.tile_bsd.dma); + } + + static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) +@@ -563,7 +563,7 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) + for (k = 0; k < 8; k++) + *p++ = sc->scaling_list_32x32[i][8 * k + j]; + +- hantro_write_addr(vpu, HEVC_SCALING_LIST, ctx->hevc_dec.scaling_lists.dma); ++ hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma); + } + + static void hantro_g2_check_idle(struct hantro_dev *vpu) +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index bb22fa921914..24b18f839ff8 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -177,20 +177,20 @@ + #define G2_REG_CONFIG_DEC_CLK_GATE_E BIT(16) + #define G2_REG_CONFIG_DEC_CLK_GATE_IDLE_E BIT(17) + +-#define G2_ADDR_DST (G2_SWREG(65)) +-#define G2_REG_ADDR_REF(i) (G2_SWREG(67) + ((i) * 0x8)) +-#define G2_ADDR_DST_CHR (G2_SWREG(99)) +-#define G2_REG_CHR_REF(i) (G2_SWREG(101) + ((i) * 0x8)) +-#define G2_ADDR_DST_MV (G2_SWREG(133)) +-#define G2_REG_DMV_REF(i) (G2_SWREG(135) + ((i) * 0x8)) +-#define G2_ADDR_TILE_SIZE (G2_SWREG(167)) +-#define G2_ADDR_STR (G2_SWREG(169)) +-#define HEVC_SCALING_LIST (G2_SWREG(171)) +-#define G2_RASTER_SCAN (G2_SWREG(175)) +-#define G2_RASTER_SCAN_CHR (G2_SWREG(177)) +-#define G2_TILE_FILTER (G2_SWREG(179)) +-#define G2_TILE_SAO (G2_SWREG(181)) +-#define G2_TILE_BSD (G2_SWREG(183)) ++#define G2_OUT_LUMA_ADDR (G2_SWREG(65)) ++#define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8)) ++#define G2_OUT_CHROMA_ADDR (G2_SWREG(99)) ++#define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8)) ++#define G2_OUT_MV_ADDR (G2_SWREG(133)) ++#define G2_REF_MV_ADDR(i) (G2_SWREG(135) + ((i) * 0x8)) ++#define G2_TILE_SIZES_ADDR (G2_SWREG(167)) ++#define G2_STREAM_ADDR (G2_SWREG(169)) ++#define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171)) ++#define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175)) ++#define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177)) ++#define G2_TILE_FILTER_ADDR (G2_SWREG(179)) ++#define G2_TILE_SAO_ADDR (G2_SWREG(181)) ++#define G2_TILE_BSD_ADDR (G2_SWREG(183)) + + #define g2_strm_buffer_len G2_DEC_REG(258, 0, 0xffffffff) + #define g2_strm_start_offset G2_DEC_REG(259, 0, 0xffffffff) diff --git a/projects/Allwinner/patches/linux/0075-media-hantro-Prepare-for-other-G2-codecs.patch b/projects/Allwinner/patches/linux/0075-media-hantro-Prepare-for-other-G2-codecs.patch new file mode 100644 index 0000000000..9ec34c1123 --- /dev/null +++ b/projects/Allwinner/patches/linux/0075-media-hantro-Prepare-for-other-G2-codecs.patch @@ -0,0 +1,178 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:39 +0100 +Subject: [PATCH] media: hantro: Prepare for other G2 codecs + +VeriSilicon Hantro G2 core supports other codecs besides hevc. +Factor out some common code in preparation for vp9 support. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Benjamin Gaignard +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/Makefile | 1 + + drivers/staging/media/hantro/hantro.h | 7 +++++ + drivers/staging/media/hantro/hantro_drv.c | 5 +++ + drivers/staging/media/hantro/hantro_g2.c | 26 ++++++++++++++++ + .../staging/media/hantro/hantro_g2_hevc_dec.c | 31 ------------------- + drivers/staging/media/hantro/hantro_g2_regs.h | 7 +++++ + drivers/staging/media/hantro/hantro_hw.h | 2 ++ + 7 files changed, 48 insertions(+), 31 deletions(-) + create mode 100644 drivers/staging/media/hantro/hantro_g2.c + +diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile +index 90036831fec4..fe6d84871d07 100644 +--- a/drivers/staging/media/hantro/Makefile ++++ b/drivers/staging/media/hantro/Makefile +@@ -12,6 +12,7 @@ hantro-vpu-y += \ + hantro_g1_mpeg2_dec.o \ + hantro_g2_hevc_dec.o \ + hantro_g1_vp8_dec.o \ ++ hantro_g2.o \ + rockchip_vpu2_hw_jpeg_enc.o \ + rockchip_vpu2_hw_h264_dec.o \ + rockchip_vpu2_hw_mpeg2_dec.o \ +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index dd5e56765d4e..d91eb2b1c509 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -369,6 +369,13 @@ static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg) + writel(val, vpu->dec_base + reg); + } + ++static inline void hantro_write_addr(struct hantro_dev *vpu, ++ unsigned long offset, ++ dma_addr_t addr) ++{ ++ vdpu_write(vpu, addr & 0xffffffff, offset); ++} ++ + static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg) + { + u32 val = readl(vpu->dec_base + reg); +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index fb82b9297a2b..bb72e5e208b7 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -907,6 +907,11 @@ static int hantro_probe(struct platform_device *pdev) + vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; + vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; + ++ /** ++ * TODO: Eventually allow taking advantage of full 64-bit address space. ++ * Until then we assume the MSB portion of buffers' base addresses is ++ * always 0 due to this masking operation. ++ */ + ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); +diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c +new file mode 100644 +index 000000000000..6f3e1f797f83 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_g2.c +@@ -0,0 +1,26 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Hantro VPU codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz ++ */ ++ ++#include "hantro_hw.h" ++#include "hantro_g2_regs.h" ++ ++void hantro_g2_check_idle(struct hantro_dev *vpu) ++{ ++ int i; ++ ++ for (i = 0; i < 3; i++) { ++ u32 status; ++ ++ /* Make sure the VPU is idle */ ++ status = vdpu_read(vpu, G2_REG_INTERRUPT); ++ if (status & G2_REG_INTERRUPT_DEC_E) { ++ dev_warn(vpu->dev, "device still running, aborting"); ++ status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; ++ vdpu_write(vpu, status, G2_REG_INTERRUPT); ++ } ++ } ++} +diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +index abae36f9b418..f62608b0b408 100644 +--- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +@@ -8,20 +8,6 @@ + #include "hantro_hw.h" + #include "hantro_g2_regs.h" + +-#define HEVC_DEC_MODE 0xC +- +-#define BUS_WIDTH_32 0 +-#define BUS_WIDTH_64 1 +-#define BUS_WIDTH_128 2 +-#define BUS_WIDTH_256 3 +- +-static inline void hantro_write_addr(struct hantro_dev *vpu, +- unsigned long offset, +- dma_addr_t addr) +-{ +- vdpu_write(vpu, addr & 0xffffffff, offset); +-} +- + static void prepare_tile_info_buffer(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +@@ -566,23 +552,6 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) + hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma); + } + +-static void hantro_g2_check_idle(struct hantro_dev *vpu) +-{ +- int i; +- +- for (i = 0; i < 3; i++) { +- u32 status; +- +- /* Make sure the VPU is idle */ +- status = vdpu_read(vpu, G2_REG_INTERRUPT); +- if (status & G2_REG_INTERRUPT_DEC_E) { +- dev_warn(vpu->dev, "device still running, aborting"); +- status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; +- vdpu_write(vpu, status, G2_REG_INTERRUPT); +- } +- } +-} +- + int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index 24b18f839ff8..136ba6d98a1f 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -27,6 +27,13 @@ + #define G2_REG_INTERRUPT_DEC_IRQ_DIS BIT(4) + #define G2_REG_INTERRUPT_DEC_E BIT(0) + ++#define HEVC_DEC_MODE 0xc ++ ++#define BUS_WIDTH_32 0 ++#define BUS_WIDTH_64 1 ++#define BUS_WIDTH_128 2 ++#define BUS_WIDTH_256 3 ++ + #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) + #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf) + +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 2f85430682d8..1d869abf90b2 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -312,4 +312,6 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx); + void hantro_vp8_prob_update(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp8_frame *hdr); + ++void hantro_g2_check_idle(struct hantro_dev *vpu); ++ + #endif /* HANTRO_HW_H_ */ diff --git a/projects/Allwinner/patches/linux/0076-media-hantro-Support-VP9-on-the-G2-core.patch b/projects/Allwinner/patches/linux/0076-media-hantro-Support-VP9-on-the-G2-core.patch new file mode 100644 index 0000000000..1b487a4208 --- /dev/null +++ b/projects/Allwinner/patches/linux/0076-media-hantro-Support-VP9-on-the-G2-core.patch @@ -0,0 +1,1888 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:40 +0100 +Subject: [PATCH] media: hantro: Support VP9 on the G2 core + +VeriSilicon Hantro G2 core supports VP9 codec. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Benjamin Gaignard +Signed-off-by: Hans Verkuil +[hverkuil: add kerneldoc line for HANTRO_MODE_VP9_DEC] +--- + drivers/staging/media/hantro/Kconfig | 1 + + drivers/staging/media/hantro/Makefile | 6 +- + drivers/staging/media/hantro/hantro.h | 27 + + drivers/staging/media/hantro/hantro_drv.c | 18 +- + drivers/staging/media/hantro/hantro_g2_regs.h | 97 ++ + .../staging/media/hantro/hantro_g2_vp9_dec.c | 980 ++++++++++++++++++ + drivers/staging/media/hantro/hantro_hw.h | 99 ++ + drivers/staging/media/hantro/hantro_v4l2.c | 6 + + drivers/staging/media/hantro/hantro_vp9.c | 240 +++++ + drivers/staging/media/hantro/hantro_vp9.h | 102 ++ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 22 +- + 11 files changed, 1594 insertions(+), 4 deletions(-) + create mode 100644 drivers/staging/media/hantro/hantro_g2_vp9_dec.c + create mode 100644 drivers/staging/media/hantro/hantro_vp9.c + create mode 100644 drivers/staging/media/hantro/hantro_vp9.h + +diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig +index 20b1f6d7b69c..00a57d88c92e 100644 +--- a/drivers/staging/media/hantro/Kconfig ++++ b/drivers/staging/media/hantro/Kconfig +@@ -9,6 +9,7 @@ config VIDEO_HANTRO + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + select V4L2_H264 ++ select V4L2_VP9 + help + Support for the Hantro IP based Video Processing Units present on + Rockchip and NXP i.MX8M SoCs, which accelerate video and image +diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile +index fe6d84871d07..28af0a1ee4bf 100644 +--- a/drivers/staging/media/hantro/Makefile ++++ b/drivers/staging/media/hantro/Makefile +@@ -10,9 +10,10 @@ hantro-vpu-y += \ + hantro_g1.o \ + hantro_g1_h264_dec.o \ + hantro_g1_mpeg2_dec.o \ +- hantro_g2_hevc_dec.o \ + hantro_g1_vp8_dec.o \ + hantro_g2.o \ ++ hantro_g2_hevc_dec.o \ ++ hantro_g2_vp9_dec.o \ + rockchip_vpu2_hw_jpeg_enc.o \ + rockchip_vpu2_hw_h264_dec.o \ + rockchip_vpu2_hw_mpeg2_dec.o \ +@@ -21,7 +22,8 @@ hantro-vpu-y += \ + hantro_h264.o \ + hantro_hevc.o \ + hantro_mpeg2.o \ +- hantro_vp8.o ++ hantro_vp8.o \ ++ hantro_vp9.o + + hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \ + imx8m_vpu_hw.o +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index d91eb2b1c509..7da23f7f207a 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -36,6 +36,7 @@ struct hantro_postproc_ops; + #define HANTRO_VP8_DECODER BIT(17) + #define HANTRO_H264_DECODER BIT(18) + #define HANTRO_HEVC_DECODER BIT(19) ++#define HANTRO_VP9_DECODER BIT(20) + #define HANTRO_DECODERS 0xffff0000 + + /** +@@ -102,6 +103,7 @@ struct hantro_variant { + * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder. + * @HANTRO_MODE_VP8_DEC: VP8 decoder. + * @HANTRO_MODE_HEVC_DEC: HEVC decoder. ++ * @HANTRO_MODE_VP9_DEC: VP9 decoder. + */ + enum hantro_codec_mode { + HANTRO_MODE_NONE = -1, +@@ -110,6 +112,7 @@ enum hantro_codec_mode { + HANTRO_MODE_MPEG2_DEC, + HANTRO_MODE_VP8_DEC, + HANTRO_MODE_HEVC_DEC, ++ HANTRO_MODE_VP9_DEC, + }; + + /* +@@ -223,6 +226,7 @@ struct hantro_dev { + * @mpeg2_dec: MPEG-2-decoding context. + * @vp8_dec: VP8-decoding context. + * @hevc_dec: HEVC-decoding context. ++ * @vp9_dec: VP9-decoding context. + */ + struct hantro_ctx { + struct hantro_dev *dev; +@@ -250,6 +254,7 @@ struct hantro_ctx { + struct hantro_mpeg2_dec_hw_ctx mpeg2_dec; + struct hantro_vp8_dec_hw_ctx vp8_dec; + struct hantro_hevc_dec_hw_ctx hevc_dec; ++ struct hantro_vp9_dec_hw_ctx vp9_dec; + }; + }; + +@@ -299,6 +304,22 @@ struct hantro_postproc_regs { + struct hantro_reg display_width; + }; + ++struct hantro_vp9_decoded_buffer_info { ++ /* Info needed when the decoded frame serves as a reference frame. */ ++ unsigned short width; ++ unsigned short height; ++ u32 bit_depth : 4; ++}; ++ ++struct hantro_decoded_buffer { ++ /* Must be the first field in this struct. */ ++ struct v4l2_m2m_buffer base; ++ ++ union { ++ struct hantro_vp9_decoded_buffer_info vp9; ++ }; ++}; ++ + /* Logging helpers */ + + /** +@@ -436,6 +457,12 @@ hantro_get_dec_buf_addr(struct hantro_ctx *ctx, struct vb2_buffer *vb) + return vb2_dma_contig_plane_dma_addr(vb, 0); + } + ++static inline struct hantro_decoded_buffer * ++vb2_to_hantro_decoded_buf(struct vb2_buffer *buf) ++{ ++ return container_of(buf, struct hantro_decoded_buffer, base.vb.vb2_buf); ++} ++ + void hantro_postproc_disable(struct hantro_ctx *ctx); + void hantro_postproc_enable(struct hantro_ctx *ctx); + void hantro_postproc_free(struct hantro_ctx *ctx); +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index bb72e5e208b7..ab2467998d29 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -232,7 +232,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->ops = &hantro_queue_ops; +- dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); ++ dst_vq->buf_struct_size = sizeof(struct hantro_decoded_buffer); + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + dst_vq->lock = &ctx->dev->vpu_mutex; + dst_vq->dev = ctx->dev->v4l2_dev.dev; +@@ -263,6 +263,12 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) + if (sps->bit_depth_luma_minus8 != 0) + /* Only 8-bit is supported */ + return -EINVAL; ++ } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { ++ const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; ++ ++ /* We only support profile 0 */ ++ if (dec_params->profile != 0) ++ return -EINVAL; + } + return 0; + } +@@ -461,6 +467,16 @@ static const struct hantro_ctrl controls[] = { + .step = 1, + .ops = &hantro_hevc_ctrl_ops, + }, ++ }, { ++ .codec = HANTRO_VP9_DECODER, ++ .cfg = { ++ .id = V4L2_CID_STATELESS_VP9_FRAME, ++ }, ++ }, { ++ .codec = HANTRO_VP9_DECODER, ++ .cfg = { ++ .id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, ++ }, + }, + }; + +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index 136ba6d98a1f..9c857dd1ad9b 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -28,6 +28,7 @@ + #define G2_REG_INTERRUPT_DEC_E BIT(0) + + #define HEVC_DEC_MODE 0xc ++#define VP9_DEC_MODE 0xd + + #define BUS_WIDTH_32 0 + #define BUS_WIDTH_64 1 +@@ -49,6 +50,7 @@ + #define g2_pic_height_in_cbs G2_DEC_REG(4, 6, 0x1fff) + #define g2_num_ref_frames G2_DEC_REG(4, 0, 0x1f) + ++#define g2_start_bit G2_DEC_REG(5, 25, 0x7f) + #define g2_scaling_list_e G2_DEC_REG(5, 24, 0x1) + #define g2_cb_qp_offset G2_DEC_REG(5, 19, 0x1f) + #define g2_cr_qp_offset G2_DEC_REG(5, 14, 0x1f) +@@ -84,6 +86,7 @@ + #define g2_bit_depth_y_minus8 G2_DEC_REG(8, 6, 0x3) + #define g2_bit_depth_c_minus8 G2_DEC_REG(8, 4, 0x3) + #define g2_output_8_bits G2_DEC_REG(8, 3, 0x1) ++#define g2_output_format G2_DEC_REG(8, 0, 0x7) + + #define g2_refidx1_active G2_DEC_REG(9, 19, 0x1f) + #define g2_refidx0_active G2_DEC_REG(9, 14, 0x1f) +@@ -96,6 +99,14 @@ + #define g2_tile_e G2_DEC_REG(10, 1, 0x1) + #define g2_entropy_sync_e G2_DEC_REG(10, 0, 0x1) + ++#define vp9_transform_mode G2_DEC_REG(11, 27, 0x7) ++#define vp9_filt_sharpness G2_DEC_REG(11, 21, 0x7) ++#define vp9_mcomp_filt_type G2_DEC_REG(11, 8, 0x7) ++#define vp9_high_prec_mv_e G2_DEC_REG(11, 7, 0x1) ++#define vp9_comp_pred_mode G2_DEC_REG(11, 4, 0x3) ++#define vp9_gref_sign_bias G2_DEC_REG(11, 2, 0x1) ++#define vp9_aref_sign_bias G2_DEC_REG(11, 0, 0x1) ++ + #define g2_refer_lterm_e G2_DEC_REG(12, 16, 0xffff) + #define g2_min_cb_size G2_DEC_REG(12, 13, 0x7) + #define g2_max_cb_size G2_DEC_REG(12, 10, 0x7) +@@ -154,6 +165,50 @@ + #define g2_partial_ctb_y G2_DEC_REG(20, 30, 0x1) + #define g2_pic_width_4x4 G2_DEC_REG(20, 16, 0xfff) + #define g2_pic_height_4x4 G2_DEC_REG(20, 0, 0xfff) ++ ++#define vp9_qp_delta_y_dc G2_DEC_REG(13, 23, 0x3f) ++#define vp9_qp_delta_ch_dc G2_DEC_REG(13, 17, 0x3f) ++#define vp9_qp_delta_ch_ac G2_DEC_REG(13, 11, 0x3f) ++#define vp9_last_sign_bias G2_DEC_REG(13, 10, 0x1) ++#define vp9_lossless_e G2_DEC_REG(13, 9, 0x1) ++#define vp9_comp_pred_var_ref1 G2_DEC_REG(13, 7, 0x3) ++#define vp9_comp_pred_var_ref0 G2_DEC_REG(13, 5, 0x3) ++#define vp9_comp_pred_fixed_ref G2_DEC_REG(13, 3, 0x3) ++#define vp9_segment_temp_upd_e G2_DEC_REG(13, 2, 0x1) ++#define vp9_segment_upd_e G2_DEC_REG(13, 1, 0x1) ++#define vp9_segment_e G2_DEC_REG(13, 0, 0x1) ++ ++#define vp9_filt_level G2_DEC_REG(14, 18, 0x3f) ++#define vp9_refpic_seg0 G2_DEC_REG(14, 15, 0x7) ++#define vp9_skip_seg0 G2_DEC_REG(14, 14, 0x1) ++#define vp9_filt_level_seg0 G2_DEC_REG(14, 8, 0x3f) ++#define vp9_quant_seg0 G2_DEC_REG(14, 0, 0xff) ++ ++#define vp9_refpic_seg1 G2_DEC_REG(15, 15, 0x7) ++#define vp9_skip_seg1 G2_DEC_REG(15, 14, 0x1) ++#define vp9_filt_level_seg1 G2_DEC_REG(15, 8, 0x3f) ++#define vp9_quant_seg1 G2_DEC_REG(15, 0, 0xff) ++ ++#define vp9_refpic_seg2 G2_DEC_REG(16, 15, 0x7) ++#define vp9_skip_seg2 G2_DEC_REG(16, 14, 0x1) ++#define vp9_filt_level_seg2 G2_DEC_REG(16, 8, 0x3f) ++#define vp9_quant_seg2 G2_DEC_REG(16, 0, 0xff) ++ ++#define vp9_refpic_seg3 G2_DEC_REG(17, 15, 0x7) ++#define vp9_skip_seg3 G2_DEC_REG(17, 14, 0x1) ++#define vp9_filt_level_seg3 G2_DEC_REG(17, 8, 0x3f) ++#define vp9_quant_seg3 G2_DEC_REG(17, 0, 0xff) ++ ++#define vp9_refpic_seg4 G2_DEC_REG(18, 15, 0x7) ++#define vp9_skip_seg4 G2_DEC_REG(18, 14, 0x1) ++#define vp9_filt_level_seg4 G2_DEC_REG(18, 8, 0x3f) ++#define vp9_quant_seg4 G2_DEC_REG(18, 0, 0xff) ++ ++#define vp9_refpic_seg5 G2_DEC_REG(19, 15, 0x7) ++#define vp9_skip_seg5 G2_DEC_REG(19, 14, 0x1) ++#define vp9_filt_level_seg5 G2_DEC_REG(19, 8, 0x3f) ++#define vp9_quant_seg5 G2_DEC_REG(19, 0, 0xff) ++ + #define hevc_cur_poc_00 G2_DEC_REG(46, 24, 0xff) + #define hevc_cur_poc_01 G2_DEC_REG(46, 16, 0xff) + #define hevc_cur_poc_02 G2_DEC_REG(46, 8, 0xff) +@@ -174,6 +229,44 @@ + #define hevc_cur_poc_14 G2_DEC_REG(49, 8, 0xff) + #define hevc_cur_poc_15 G2_DEC_REG(49, 0, 0xff) + ++#define vp9_refpic_seg6 G2_DEC_REG(31, 15, 0x7) ++#define vp9_skip_seg6 G2_DEC_REG(31, 14, 0x1) ++#define vp9_filt_level_seg6 G2_DEC_REG(31, 8, 0x3f) ++#define vp9_quant_seg6 G2_DEC_REG(31, 0, 0xff) ++ ++#define vp9_refpic_seg7 G2_DEC_REG(32, 15, 0x7) ++#define vp9_skip_seg7 G2_DEC_REG(32, 14, 0x1) ++#define vp9_filt_level_seg7 G2_DEC_REG(32, 8, 0x3f) ++#define vp9_quant_seg7 G2_DEC_REG(32, 0, 0xff) ++ ++#define vp9_lref_width G2_DEC_REG(33, 16, 0xffff) ++#define vp9_lref_height G2_DEC_REG(33, 0, 0xffff) ++ ++#define vp9_gref_width G2_DEC_REG(34, 16, 0xffff) ++#define vp9_gref_height G2_DEC_REG(34, 0, 0xffff) ++ ++#define vp9_aref_width G2_DEC_REG(35, 16, 0xffff) ++#define vp9_aref_height G2_DEC_REG(35, 0, 0xffff) ++ ++#define vp9_lref_hor_scale G2_DEC_REG(36, 16, 0xffff) ++#define vp9_lref_ver_scale G2_DEC_REG(36, 0, 0xffff) ++ ++#define vp9_gref_hor_scale G2_DEC_REG(37, 16, 0xffff) ++#define vp9_gref_ver_scale G2_DEC_REG(37, 0, 0xffff) ++ ++#define vp9_aref_hor_scale G2_DEC_REG(38, 16, 0xffff) ++#define vp9_aref_ver_scale G2_DEC_REG(38, 0, 0xffff) ++ ++#define vp9_filt_ref_adj_0 G2_DEC_REG(46, 24, 0x7f) ++#define vp9_filt_ref_adj_1 G2_DEC_REG(46, 16, 0x7f) ++#define vp9_filt_ref_adj_2 G2_DEC_REG(46, 8, 0x7f) ++#define vp9_filt_ref_adj_3 G2_DEC_REG(46, 0, 0x7f) ++ ++#define vp9_filt_mb_adj_0 G2_DEC_REG(47, 24, 0x7f) ++#define vp9_filt_mb_adj_1 G2_DEC_REG(47, 16, 0x7f) ++#define vp9_filt_mb_adj_2 G2_DEC_REG(47, 8, 0x7f) ++#define vp9_filt_mb_adj_3 G2_DEC_REG(47, 0, 0x7f) ++ + #define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff) + + #define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1) +@@ -186,6 +279,8 @@ + + #define G2_OUT_LUMA_ADDR (G2_SWREG(65)) + #define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8)) ++#define G2_VP9_SEGMENT_WRITE_ADDR (G2_SWREG(79)) ++#define G2_VP9_SEGMENT_READ_ADDR (G2_SWREG(81)) + #define G2_OUT_CHROMA_ADDR (G2_SWREG(99)) + #define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8)) + #define G2_OUT_MV_ADDR (G2_SWREG(133)) +@@ -193,6 +288,8 @@ + #define G2_TILE_SIZES_ADDR (G2_SWREG(167)) + #define G2_STREAM_ADDR (G2_SWREG(169)) + #define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171)) ++#define G2_VP9_CTX_COUNT_ADDR (G2_SWREG(171)) ++#define G2_VP9_PROBS_ADDR (G2_SWREG(173)) + #define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175)) + #define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177)) + #define G2_TILE_FILTER_ADDR (G2_SWREG(179)) +diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +new file mode 100644 +index 000000000000..fc55b03a8004 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +@@ -0,0 +1,980 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Hantro VP9 codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd. ++ */ ++#include "media/videobuf2-core.h" ++#include "media/videobuf2-dma-contig.h" ++#include "media/videobuf2-v4l2.h" ++#include ++#include ++#include ++#include ++ ++#include "hantro.h" ++#include "hantro_vp9.h" ++#include "hantro_g2_regs.h" ++ ++#define G2_ALIGN 16 ++ ++enum hantro_ref_frames { ++ INTRA_FRAME = 0, ++ LAST_FRAME = 1, ++ GOLDEN_FRAME = 2, ++ ALTREF_FRAME = 3, ++ MAX_REF_FRAMES = 4 ++}; ++ ++static int start_prepare_run(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame **dec_params) ++{ ++ const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct v4l2_ctrl *ctrl; ++ unsigned int fctx_idx; ++ ++ /* v4l2-specific stuff */ ++ hantro_start_prepare_run(ctx); ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_FRAME); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ *dec_params = ctrl->p_cur.p; ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ prob_updates = ctrl->p_cur.p; ++ vp9_ctx->cur.tx_mode = prob_updates->tx_mode; ++ ++ /* ++ * vp9 stuff ++ * ++ * by this point the userspace has done all parts of 6.2 uncompressed_header() ++ * except this fragment: ++ * if ( FrameIsIntra || error_resilient_mode ) { ++ * setup_past_independence ( ) ++ * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || ++ * reset_frame_context == 3 ) { ++ * for ( i = 0; i < 4; i ++ ) { ++ * save_probs( i ) ++ * } ++ * } else if ( reset_frame_context == 2 ) { ++ * save_probs( frame_context_idx ) ++ * } ++ * frame_context_idx = 0 ++ * } ++ */ ++ fctx_idx = v4l2_vp9_reset_frame_ctx(*dec_params, vp9_ctx->frame_context); ++ vp9_ctx->cur.frame_context_idx = fctx_idx; ++ ++ /* 6.1 frame(sz): load_probs() and load_probs2() */ ++ vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* ++ * The userspace has also performed 6.3 compressed_header(), but handling the ++ * probs in a special way. All probs which need updating, except MV-related, ++ * have been read from the bitstream and translated through inv_map_table[], ++ * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed ++ * by userspace are either translated values (there are no 0 values in ++ * inv_map_table[]), or zero to indicate no update. All MV-related probs which need ++ * updating have been read from the bitstream and (mv_prob << 1) | 1 has been ++ * performed. The values passed by userspace are either new values ++ * to replace old ones (the above mentioned shift and bitwise or never result in ++ * a zero) or zero to indicate no update. ++ * fw_update_probs() performs actual probs updates or leaves probs as-is ++ * for values for which a zero was passed from userspace. ++ */ ++ v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, *dec_params); ++ ++ return 0; ++} ++ ++static size_t chroma_offset(const struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ int bytes_per_pixel = dec_params->bit_depth == 8 ? 1 : 2; ++ ++ return ctx->src_fmt.width * ctx->src_fmt.height * bytes_per_pixel; ++} ++ ++static size_t mv_offset(const struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ size_t cr_offset = chroma_offset(ctx, dec_params); ++ ++ return ALIGN((cr_offset * 3) / 2, G2_ALIGN); ++} ++ ++static struct hantro_decoded_buffer * ++get_ref_buf(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) ++{ ++ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; ++ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; ++ int buf_idx; ++ ++ /* ++ * If a ref is unused or invalid, address of current destination ++ * buffer is returned. ++ */ ++ buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); ++ if (buf_idx < 0) ++ return vb2_to_hantro_decoded_buf(&dst->vb2_buf); ++ ++ return vb2_to_hantro_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); ++} ++ ++static void update_dec_buf_info(struct hantro_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ buf->vp9.width = dec_params->frame_width_minus_1 + 1; ++ buf->vp9.height = dec_params->frame_height_minus_1 + 1; ++ buf->vp9.bit_depth = dec_params->bit_depth; ++} ++ ++static void update_ctx_cur_info(struct hantro_vp9_dec_hw_ctx *vp9_ctx, ++ struct hantro_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ vp9_ctx->cur.valid = true; ++ vp9_ctx->cur.reference_mode = dec_params->reference_mode; ++ vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; ++ vp9_ctx->cur.flags = dec_params->flags; ++ vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; ++} ++ ++static void config_output(struct hantro_ctx *ctx, ++ struct hantro_decoded_buffer *dst, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ dma_addr_t luma_addr, chroma_addr, mv_addr; ++ ++ hantro_reg_write(ctx->dev, &g2_out_dis, 0); ++ hantro_reg_write(ctx->dev, &g2_output_format, 0); ++ ++ luma_addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); ++ hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); ++ ++ chroma_addr = luma_addr + chroma_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); ++ ++ mv_addr = luma_addr + mv_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); ++} ++ ++struct hantro_vp9_ref_reg { ++ const struct hantro_reg width; ++ const struct hantro_reg height; ++ const struct hantro_reg hor_scale; ++ const struct hantro_reg ver_scale; ++ u32 y_base; ++ u32 c_base; ++}; ++ ++static void config_ref(struct hantro_ctx *ctx, ++ struct hantro_decoded_buffer *dst, ++ const struct hantro_vp9_ref_reg *ref_reg, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ u64 ref_ts) ++{ ++ struct hantro_decoded_buffer *buf; ++ dma_addr_t luma_addr, chroma_addr; ++ u32 refw, refh; ++ ++ buf = get_ref_buf(ctx, &dst->base.vb, ref_ts); ++ refw = buf->vp9.width; ++ refh = buf->vp9.height; ++ ++ hantro_reg_write(ctx->dev, &ref_reg->width, refw); ++ hantro_reg_write(ctx->dev, &ref_reg->height, refh); ++ ++ hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); ++ hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); ++ ++ luma_addr = vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0); ++ hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); ++ ++ chroma_addr = luma_addr + chroma_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); ++} ++ ++static void config_ref_registers(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct hantro_decoded_buffer *dst, ++ struct hantro_decoded_buffer *mv_ref) ++{ ++ static const struct hantro_vp9_ref_reg ref_regs[] = { ++ { ++ /* Last */ ++ .width = vp9_lref_width, ++ .height = vp9_lref_height, ++ .hor_scale = vp9_lref_hor_scale, ++ .ver_scale = vp9_lref_ver_scale, ++ .y_base = G2_REF_LUMA_ADDR(0), ++ .c_base = G2_REF_CHROMA_ADDR(0), ++ }, { ++ /* Golden */ ++ .width = vp9_gref_width, ++ .height = vp9_gref_height, ++ .hor_scale = vp9_gref_hor_scale, ++ .ver_scale = vp9_gref_ver_scale, ++ .y_base = G2_REF_LUMA_ADDR(4), ++ .c_base = G2_REF_CHROMA_ADDR(4), ++ }, { ++ /* Altref */ ++ .width = vp9_aref_width, ++ .height = vp9_aref_height, ++ .hor_scale = vp9_aref_hor_scale, ++ .ver_scale = vp9_aref_ver_scale, ++ .y_base = G2_REF_LUMA_ADDR(5), ++ .c_base = G2_REF_CHROMA_ADDR(5), ++ }, ++ }; ++ dma_addr_t mv_addr; ++ ++ config_ref(ctx, dst, &ref_regs[0], dec_params, dec_params->last_frame_ts); ++ config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts); ++ config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); ++ ++ mv_addr = vb2_dma_contig_plane_dma_addr(&mv_ref->base.vb.vb2_buf, 0) + ++ mv_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); ++ ++ hantro_reg_write(ctx->dev, &vp9_last_sign_bias, ++ dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST ? 1 : 0); ++ ++ hantro_reg_write(ctx->dev, &vp9_gref_sign_bias, ++ dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN ? 1 : 0); ++ ++ hantro_reg_write(ctx->dev, &vp9_aref_sign_bias, ++ dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT ? 1 : 0); ++} ++ ++static void recompute_tile_info(unsigned short *tile_info, unsigned int tiles, unsigned int sbs) ++{ ++ int i; ++ unsigned int accumulated = 0; ++ unsigned int next_accumulated; ++ ++ for (i = 1; i <= tiles; ++i) { ++ next_accumulated = i * sbs / tiles; ++ *tile_info++ = next_accumulated - accumulated; ++ accumulated = next_accumulated; ++ } ++} ++ ++static void ++recompute_tile_rc_info(struct hantro_ctx *ctx, ++ unsigned int tile_r, unsigned int tile_c, ++ unsigned int sbs_r, unsigned int sbs_c) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ ++ recompute_tile_info(vp9_ctx->tile_r_info, tile_r, sbs_r); ++ recompute_tile_info(vp9_ctx->tile_c_info, tile_c, sbs_c); ++ ++ vp9_ctx->last_tile_r = tile_r; ++ vp9_ctx->last_tile_c = tile_c; ++ vp9_ctx->last_sbs_r = sbs_r; ++ vp9_ctx->last_sbs_c = sbs_c; ++} ++ ++static inline unsigned int first_tile_row(unsigned int tile_r, unsigned int sbs_r) ++{ ++ if (tile_r == sbs_r + 1) ++ return 1; ++ ++ if (tile_r == sbs_r + 2) ++ return 2; ++ ++ return 0; ++} ++ ++static void ++fill_tile_info(struct hantro_ctx *ctx, ++ unsigned int tile_r, unsigned int tile_c, ++ unsigned int sbs_r, unsigned int sbs_c, ++ unsigned short *tile_mem) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ unsigned int i, j; ++ bool first = true; ++ ++ for (i = first_tile_row(tile_r, sbs_r); i < tile_r; ++i) { ++ unsigned short r_info = vp9_ctx->tile_r_info[i]; ++ ++ if (first) { ++ if (i > 0) ++ r_info += vp9_ctx->tile_r_info[0]; ++ if (i == 2) ++ r_info += vp9_ctx->tile_r_info[1]; ++ first = false; ++ } ++ for (j = 0; j < tile_c; ++j) { ++ *tile_mem++ = vp9_ctx->tile_c_info[j]; ++ *tile_mem++ = r_info; ++ } ++ } ++} ++ ++static void ++config_tiles(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct hantro_decoded_buffer *dst) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct hantro_aux_buf *misc = &vp9_ctx->misc; ++ struct hantro_aux_buf *tile_edge = &vp9_ctx->tile_edge; ++ dma_addr_t addr; ++ unsigned short *tile_mem; ++ ++ addr = misc->dma + vp9_ctx->tile_info_offset; ++ hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr); ++ ++ tile_mem = misc->cpu + vp9_ctx->tile_info_offset; ++ if (dec_params->tile_cols_log2 || dec_params->tile_rows_log2) { ++ unsigned int tile_r = (1 << dec_params->tile_rows_log2); ++ unsigned int tile_c = (1 << dec_params->tile_cols_log2); ++ unsigned int sbs_r = hantro_vp9_num_sbs(dst->vp9.height); ++ unsigned int sbs_c = hantro_vp9_num_sbs(dst->vp9.width); ++ ++ if (tile_r != vp9_ctx->last_tile_r || tile_c != vp9_ctx->last_tile_c || ++ sbs_r != vp9_ctx->last_sbs_r || sbs_c != vp9_ctx->last_sbs_c) ++ recompute_tile_rc_info(ctx, tile_r, tile_c, sbs_r, sbs_c); ++ ++ fill_tile_info(ctx, tile_r, tile_c, sbs_r, sbs_c, tile_mem); ++ ++ hantro_reg_write(ctx->dev, &g2_tile_e, 1); ++ hantro_reg_write(ctx->dev, &g2_num_tile_cols, tile_c); ++ hantro_reg_write(ctx->dev, &g2_num_tile_rows, tile_r); ++ ++ } else { ++ tile_mem[0] = hantro_vp9_num_sbs(dst->vp9.width); ++ tile_mem[1] = hantro_vp9_num_sbs(dst->vp9.height); ++ ++ hantro_reg_write(ctx->dev, &g2_tile_e, 0); ++ hantro_reg_write(ctx->dev, &g2_num_tile_cols, 1); ++ hantro_reg_write(ctx->dev, &g2_num_tile_rows, 1); ++ } ++ ++ /* provide aux buffers even if no tiles are used */ ++ addr = tile_edge->dma; ++ hantro_write_addr(ctx->dev, G2_TILE_FILTER_ADDR, addr); ++ ++ addr = tile_edge->dma + vp9_ctx->bsd_ctrl_offset; ++ hantro_write_addr(ctx->dev, G2_TILE_BSD_ADDR, addr); ++} ++ ++static void ++update_feat_and_flag(struct hantro_vp9_dec_hw_ctx *vp9_ctx, ++ const struct v4l2_vp9_segmentation *seg, ++ unsigned int feature, ++ unsigned int segid) ++{ ++ u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); ++ ++ vp9_ctx->feature_data[segid][feature] = seg->feature_data[segid][feature]; ++ vp9_ctx->feature_enabled[segid] &= ~mask; ++ vp9_ctx->feature_enabled[segid] |= (seg->feature_enabled[segid] & mask); ++} ++ ++static inline s16 clip3(s16 x, s16 y, s16 z) ++{ ++ return (z < x) ? x : (z > y) ? y : z; ++} ++ ++static s16 feat_val_clip3(s16 feat_val, s16 feature_data, bool absolute, u8 clip) ++{ ++ if (absolute) ++ return feature_data; ++ ++ return clip3(0, 255, feat_val + feature_data); ++} ++ ++static void config_segment(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ const struct v4l2_vp9_segmentation *seg; ++ s16 feat_val; ++ unsigned char feat_id; ++ unsigned int segid; ++ bool segment_enabled, absolute, update_data; ++ ++ static const struct hantro_reg seg_regs[8][V4L2_VP9_SEG_LVL_MAX] = { ++ { vp9_quant_seg0, vp9_filt_level_seg0, vp9_refpic_seg0, vp9_skip_seg0 }, ++ { vp9_quant_seg1, vp9_filt_level_seg1, vp9_refpic_seg1, vp9_skip_seg1 }, ++ { vp9_quant_seg2, vp9_filt_level_seg2, vp9_refpic_seg2, vp9_skip_seg2 }, ++ { vp9_quant_seg3, vp9_filt_level_seg3, vp9_refpic_seg3, vp9_skip_seg3 }, ++ { vp9_quant_seg4, vp9_filt_level_seg4, vp9_refpic_seg4, vp9_skip_seg4 }, ++ { vp9_quant_seg5, vp9_filt_level_seg5, vp9_refpic_seg5, vp9_skip_seg5 }, ++ { vp9_quant_seg6, vp9_filt_level_seg6, vp9_refpic_seg6, vp9_skip_seg6 }, ++ { vp9_quant_seg7, vp9_filt_level_seg7, vp9_refpic_seg7, vp9_skip_seg7 }, ++ }; ++ ++ segment_enabled = !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED); ++ hantro_reg_write(ctx->dev, &vp9_segment_e, segment_enabled); ++ hantro_reg_write(ctx->dev, &vp9_segment_upd_e, ++ !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP)); ++ hantro_reg_write(ctx->dev, &vp9_segment_temp_upd_e, ++ !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE)); ++ ++ seg = &dec_params->seg; ++ absolute = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE); ++ update_data = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA); ++ ++ for (segid = 0; segid < 8; ++segid) { ++ /* Quantizer segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_ALT_Q; ++ feat_val = dec_params->quant.base_q_idx; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) ++ feat_val = feat_val_clip3(feat_val, ++ vp9_ctx->feature_data[segid][feat_id], ++ absolute, 255); ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ ++ /* Loop filter segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_ALT_L; ++ feat_val = dec_params->lf.level; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) ++ feat_val = feat_val_clip3(feat_val, ++ vp9_ctx->feature_data[segid][feat_id], ++ absolute, 63); ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ ++ /* Reference frame segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_REF_FRAME; ++ feat_val = 0; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ if (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && ++ v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) ++ feat_val = vp9_ctx->feature_data[segid][feat_id] + 1; ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ ++ /* Skip segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_SKIP; ++ feat_val = 0; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ feat_val = v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, ++ feat_id, segid) ? 1 : 0; ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ } ++} ++ ++static void config_loop_filter(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ bool d = dec_params->lf.flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED; ++ ++ hantro_reg_write(ctx->dev, &vp9_filt_level, dec_params->lf.level); ++ hantro_reg_write(ctx->dev, &g2_out_filtering_dis, dec_params->lf.level == 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_sharpness, dec_params->lf.sharpness); ++ ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_0, d ? dec_params->lf.ref_deltas[0] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_1, d ? dec_params->lf.ref_deltas[1] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_2, d ? dec_params->lf.ref_deltas[2] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_3, d ? dec_params->lf.ref_deltas[3] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_0, d ? dec_params->lf.mode_deltas[0] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_1, d ? dec_params->lf.mode_deltas[1] : 0); ++} ++ ++static void config_picture_dimensions(struct hantro_ctx *ctx, struct hantro_decoded_buffer *dst) ++{ ++ u32 pic_w_4x4, pic_h_4x4; ++ ++ hantro_reg_write(ctx->dev, &g2_pic_width_in_cbs, (dst->vp9.width + 7) / 8); ++ hantro_reg_write(ctx->dev, &g2_pic_height_in_cbs, (dst->vp9.height + 7) / 8); ++ pic_w_4x4 = roundup(dst->vp9.width, 8) >> 2; ++ pic_h_4x4 = roundup(dst->vp9.height, 8) >> 2; ++ hantro_reg_write(ctx->dev, &g2_pic_width_4x4, pic_w_4x4); ++ hantro_reg_write(ctx->dev, &g2_pic_height_4x4, pic_h_4x4); ++} ++ ++static void ++config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); ++ hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8); ++} ++ ++static inline bool is_lossless(const struct v4l2_vp9_quantization *quant) ++{ ++ return quant->base_q_idx == 0 && quant->delta_q_uv_ac == 0 && ++ quant->delta_q_uv_dc == 0 && quant->delta_q_y_dc == 0; ++} ++ ++static void ++config_quant(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ hantro_reg_write(ctx->dev, &vp9_qp_delta_y_dc, dec_params->quant.delta_q_y_dc); ++ hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_dc, dec_params->quant.delta_q_uv_dc); ++ hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_ac, dec_params->quant.delta_q_uv_ac); ++ hantro_reg_write(ctx->dev, &vp9_lossless_e, is_lossless(&dec_params->quant)); ++} ++ ++static u32 ++hantro_interp_filter_from_v4l2(unsigned int interpolation_filter) ++{ ++ switch (interpolation_filter) { ++ case V4L2_VP9_INTERP_FILTER_EIGHTTAP: ++ return 0x1; ++ case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH: ++ return 0; ++ case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP: ++ return 0x2; ++ case V4L2_VP9_INTERP_FILTER_BILINEAR: ++ return 0x3; ++ case V4L2_VP9_INTERP_FILTER_SWITCHABLE: ++ return 0x4; ++ } ++ ++ return 0; ++} ++ ++static void ++config_others(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, ++ bool intra_only, bool resolution_change) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ ++ hantro_reg_write(ctx->dev, &g2_idr_pic_e, intra_only); ++ ++ hantro_reg_write(ctx->dev, &vp9_transform_mode, vp9_ctx->cur.tx_mode); ++ ++ hantro_reg_write(ctx->dev, &vp9_mcomp_filt_type, intra_only ? ++ 0 : hantro_interp_filter_from_v4l2(dec_params->interpolation_filter)); ++ ++ hantro_reg_write(ctx->dev, &vp9_high_prec_mv_e, ++ !!(dec_params->flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)); ++ ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_mode, dec_params->reference_mode); ++ ++ hantro_reg_write(ctx->dev, &g2_tempor_mvp_e, ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && ++ !(vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY) && ++ !resolution_change && ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME ++ ); ++ ++ hantro_reg_write(ctx->dev, &g2_write_mvs_e, ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME)); ++} ++ ++static void ++config_compound_reference(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ u32 comp_fixed_ref, comp_var_ref[2]; ++ bool last_ref_frame_sign_bias; ++ bool golden_ref_frame_sign_bias; ++ bool alt_ref_frame_sign_bias; ++ bool comp_ref_allowed = 0; ++ ++ comp_fixed_ref = 0; ++ comp_var_ref[0] = 0; ++ comp_var_ref[1] = 0; ++ ++ last_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST; ++ golden_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN; ++ alt_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT; ++ ++ /* 6.3.12 Frame reference mode syntax */ ++ comp_ref_allowed |= golden_ref_frame_sign_bias != last_ref_frame_sign_bias; ++ comp_ref_allowed |= alt_ref_frame_sign_bias != last_ref_frame_sign_bias; ++ ++ if (comp_ref_allowed) { ++ if (last_ref_frame_sign_bias == ++ golden_ref_frame_sign_bias) { ++ comp_fixed_ref = ALTREF_FRAME; ++ comp_var_ref[0] = LAST_FRAME; ++ comp_var_ref[1] = GOLDEN_FRAME; ++ } else if (last_ref_frame_sign_bias == ++ alt_ref_frame_sign_bias) { ++ comp_fixed_ref = GOLDEN_FRAME; ++ comp_var_ref[0] = LAST_FRAME; ++ comp_var_ref[1] = ALTREF_FRAME; ++ } else { ++ comp_fixed_ref = LAST_FRAME; ++ comp_var_ref[0] = GOLDEN_FRAME; ++ comp_var_ref[1] = ALTREF_FRAME; ++ } ++ } ++ ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_fixed_ref, comp_fixed_ref); ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref0, comp_var_ref[0]); ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref1, comp_var_ref[1]); ++} ++ ++#define INNER_LOOP \ ++do { \ ++ for (m = 0; m < ARRAY_SIZE(adaptive->coef[0][0][0][0]); ++m) { \ ++ memcpy(adaptive->coef[i][j][k][l][m], \ ++ probs->coef[i][j][k][l][m], \ ++ sizeof(probs->coef[i][j][k][l][m])); \ ++ \ ++ adaptive->coef[i][j][k][l][m][3] = 0; \ ++ } \ ++} while (0) ++ ++static void config_probs(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct hantro_aux_buf *misc = &vp9_ctx->misc; ++ struct hantro_g2_all_probs *all_probs = misc->cpu; ++ struct hantro_g2_probs *adaptive; ++ struct hantro_g2_mv_probs *mv; ++ const struct v4l2_vp9_segmentation *seg = &dec_params->seg; ++ const struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; ++ int i, j, k, l, m; ++ ++ for (i = 0; i < ARRAY_SIZE(all_probs->kf_y_mode_prob); ++i) ++ for (j = 0; j < ARRAY_SIZE(all_probs->kf_y_mode_prob[0]); ++j) { ++ memcpy(all_probs->kf_y_mode_prob[i][j], ++ v4l2_vp9_kf_y_mode_prob[i][j], ++ ARRAY_SIZE(all_probs->kf_y_mode_prob[i][j])); ++ ++ all_probs->kf_y_mode_prob_tail[i][j][0] = ++ v4l2_vp9_kf_y_mode_prob[i][j][8]; ++ } ++ ++ memcpy(all_probs->mb_segment_tree_probs, seg->tree_probs, ++ sizeof(all_probs->mb_segment_tree_probs)); ++ ++ memcpy(all_probs->segment_pred_probs, seg->pred_probs, ++ sizeof(all_probs->segment_pred_probs)); ++ ++ for (i = 0; i < ARRAY_SIZE(all_probs->kf_uv_mode_prob); ++i) { ++ memcpy(all_probs->kf_uv_mode_prob[i], v4l2_vp9_kf_uv_mode_prob[i], ++ ARRAY_SIZE(all_probs->kf_uv_mode_prob[i])); ++ ++ all_probs->kf_uv_mode_prob_tail[i][0] = v4l2_vp9_kf_uv_mode_prob[i][8]; ++ } ++ ++ adaptive = &all_probs->probs; ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->inter_mode); ++i) { ++ memcpy(adaptive->inter_mode[i], probs->inter_mode[i], ++ ARRAY_SIZE(probs->inter_mode[i])); ++ ++ adaptive->inter_mode[i][3] = 0; ++ } ++ ++ memcpy(adaptive->is_inter, probs->is_inter, sizeof(adaptive->is_inter)); ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->uv_mode); ++i) { ++ memcpy(adaptive->uv_mode[i], probs->uv_mode[i], ++ sizeof(adaptive->uv_mode[i])); ++ adaptive->uv_mode_tail[i][0] = probs->uv_mode[i][8]; ++ } ++ ++ memcpy(adaptive->tx8, probs->tx8, sizeof(adaptive->tx8)); ++ memcpy(adaptive->tx16, probs->tx16, sizeof(adaptive->tx16)); ++ memcpy(adaptive->tx32, probs->tx32, sizeof(adaptive->tx32)); ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->y_mode); ++i) { ++ memcpy(adaptive->y_mode[i], probs->y_mode[i], ++ ARRAY_SIZE(adaptive->y_mode[i])); ++ ++ adaptive->y_mode_tail[i][0] = probs->y_mode[i][8]; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->partition[0]); ++i) { ++ memcpy(adaptive->partition[0][i], v4l2_vp9_kf_partition_probs[i], ++ sizeof(v4l2_vp9_kf_partition_probs[i])); ++ ++ adaptive->partition[0][i][3] = 0; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->partition[1]); ++i) { ++ memcpy(adaptive->partition[1][i], probs->partition[i], ++ sizeof(probs->partition[i])); ++ ++ adaptive->partition[1][i][3] = 0; ++ } ++ ++ memcpy(adaptive->interp_filter, probs->interp_filter, ++ sizeof(adaptive->interp_filter)); ++ ++ memcpy(adaptive->comp_mode, probs->comp_mode, sizeof(adaptive->comp_mode)); ++ ++ memcpy(adaptive->skip, probs->skip, sizeof(adaptive->skip)); ++ ++ mv = &adaptive->mv; ++ ++ memcpy(mv->joint, probs->mv.joint, sizeof(mv->joint)); ++ memcpy(mv->sign, probs->mv.sign, sizeof(mv->sign)); ++ memcpy(mv->class0_bit, probs->mv.class0_bit, sizeof(mv->class0_bit)); ++ memcpy(mv->fr, probs->mv.fr, sizeof(mv->fr)); ++ memcpy(mv->class0_hp, probs->mv.class0_hp, sizeof(mv->class0_hp)); ++ memcpy(mv->hp, probs->mv.hp, sizeof(mv->hp)); ++ memcpy(mv->classes, probs->mv.classes, sizeof(mv->classes)); ++ memcpy(mv->class0_fr, probs->mv.class0_fr, sizeof(mv->class0_fr)); ++ memcpy(mv->bits, probs->mv.bits, sizeof(mv->bits)); ++ ++ memcpy(adaptive->single_ref, probs->single_ref, sizeof(adaptive->single_ref)); ++ ++ memcpy(adaptive->comp_ref, probs->comp_ref, sizeof(adaptive->comp_ref)); ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->coef); ++i) ++ for (j = 0; j < ARRAY_SIZE(adaptive->coef[0]); ++j) ++ for (k = 0; k < ARRAY_SIZE(adaptive->coef[0][0]); ++k) ++ for (l = 0; l < ARRAY_SIZE(adaptive->coef[0][0][0]); ++l) ++ INNER_LOOP; ++ ++ hantro_write_addr(ctx->dev, G2_VP9_PROBS_ADDR, misc->dma); ++} ++ ++static void config_counts(struct hantro_ctx *ctx) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; ++ struct hantro_aux_buf *misc = &vp9_dec->misc; ++ dma_addr_t addr = misc->dma + vp9_dec->ctx_counters_offset; ++ ++ hantro_write_addr(ctx->dev, G2_VP9_CTX_COUNT_ADDR, addr); ++} ++ ++static void config_seg_map(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ bool intra_only, bool update_map) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct hantro_aux_buf *segment_map = &vp9_ctx->segment_map; ++ dma_addr_t addr; ++ ++ if (intra_only || ++ (dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT)) { ++ memset(segment_map->cpu, 0, segment_map->size); ++ memset(vp9_ctx->feature_data, 0, sizeof(vp9_ctx->feature_data)); ++ memset(vp9_ctx->feature_enabled, 0, sizeof(vp9_ctx->feature_enabled)); ++ } ++ ++ addr = segment_map->dma + vp9_ctx->active_segment * vp9_ctx->segment_map_size; ++ hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_READ_ADDR, addr); ++ ++ addr = segment_map->dma + (1 - vp9_ctx->active_segment) * vp9_ctx->segment_map_size; ++ hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_WRITE_ADDR, addr); ++ ++ if (update_map) ++ vp9_ctx->active_segment = 1 - vp9_ctx->active_segment; ++} ++ ++static void ++config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct vb2_v4l2_buffer *vb2_src) ++{ ++ dma_addr_t stream_base, tmp_addr; ++ unsigned int headres_size; ++ u32 src_len, start_bit, src_buf_len; ++ ++ headres_size = dec_params->uncompressed_header_size ++ + dec_params->compressed_header_size; ++ ++ stream_base = vb2_dma_contig_plane_dma_addr(&vb2_src->vb2_buf, 0); ++ hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base); ++ ++ tmp_addr = stream_base + headres_size; ++ start_bit = (tmp_addr & 0xf) * 8; ++ hantro_reg_write(ctx->dev, &g2_start_bit, start_bit); ++ ++ src_len = vb2_get_plane_payload(&vb2_src->vb2_buf, 0); ++ src_len += start_bit / 8 - headres_size; ++ hantro_reg_write(ctx->dev, &g2_stream_len, src_len); ++ ++ tmp_addr &= ~0xf; ++ hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base); ++ src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0); ++ hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len); ++} ++ ++static void ++config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct vb2_v4l2_buffer *vb2_src, struct vb2_v4l2_buffer *vb2_dst) ++{ ++ struct hantro_decoded_buffer *dst, *last, *mv_ref; ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ const struct v4l2_vp9_segmentation *seg; ++ bool intra_only, resolution_change; ++ ++ /* vp9 stuff */ ++ dst = vb2_to_hantro_decoded_buf(&vb2_dst->vb2_buf); ++ ++ if (vp9_ctx->last.valid) ++ last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); ++ else ++ last = dst; ++ ++ update_dec_buf_info(dst, dec_params); ++ update_ctx_cur_info(vp9_ctx, dst, dec_params); ++ seg = &dec_params->seg; ++ ++ intra_only = !!(dec_params->flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); ++ ++ if (!intra_only && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ vp9_ctx->last.valid) ++ mv_ref = last; ++ else ++ mv_ref = dst; ++ ++ resolution_change = dst->vp9.width != last->vp9.width || ++ dst->vp9.height != last->vp9.height; ++ ++ /* configure basic registers */ ++ hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE); ++ hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128); ++ hantro_reg_write(ctx->dev, &g2_max_burst, 16); ++ hantro_reg_write(ctx->dev, &g2_apf_threshold, 8); ++ hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1); ++ hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1); ++ hantro_reg_write(ctx->dev, &g2_max_cb_size, 6); ++ hantro_reg_write(ctx->dev, &g2_min_cb_size, 3); ++ ++ config_output(ctx, dst, dec_params); ++ ++ if (!intra_only) ++ config_ref_registers(ctx, dec_params, dst, mv_ref); ++ ++ config_tiles(ctx, dec_params, dst); ++ config_segment(ctx, dec_params); ++ config_loop_filter(ctx, dec_params); ++ config_picture_dimensions(ctx, dst); ++ config_bit_depth(ctx, dec_params); ++ config_quant(ctx, dec_params); ++ config_others(ctx, dec_params, intra_only, resolution_change); ++ config_compound_reference(ctx, dec_params); ++ config_probs(ctx, dec_params); ++ config_counts(ctx); ++ config_seg_map(ctx, dec_params, intra_only, ++ seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP); ++ config_source(ctx, dec_params, vb2_src); ++} ++ ++int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx) ++{ ++ const struct v4l2_ctrl_vp9_frame *decode_params; ++ struct vb2_v4l2_buffer *src; ++ struct vb2_v4l2_buffer *dst; ++ int ret; ++ ++ hantro_g2_check_idle(ctx->dev); ++ ++ ret = start_prepare_run(ctx, &decode_params); ++ if (ret) { ++ hantro_end_prepare_run(ctx); ++ return ret; ++ } ++ ++ src = hantro_get_src_buf(ctx); ++ dst = hantro_get_dst_buf(ctx); ++ ++ config_registers(ctx, decode_params, src, dst); ++ ++ hantro_end_prepare_run(ctx); ++ ++ vdpu_write(ctx->dev, G2_REG_INTERRUPT_DEC_E, G2_REG_INTERRUPT); ++ ++ return 0; ++} ++ ++#define copy_tx_and_skip(p1, p2) \ ++do { \ ++ memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ ++ memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ ++ memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ ++ memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ ++} while (0) ++ ++void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ unsigned int fctx_idx; ++ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) ++ goto out_update_last; ++ ++ fctx_idx = vp9_ctx->cur.frame_context_idx; ++ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { ++ /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ ++ struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; ++ bool frame_is_intra = vp9_ctx->cur.flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); ++ struct tx_and_skip { ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 skip[3]; ++ } _tx_skip, *tx_skip = &_tx_skip; ++ struct v4l2_vp9_frame_symbol_counts *counts; ++ struct symbol_counts *hantro_cnts; ++ u32 tx16p[2][4]; ++ int i; ++ ++ /* buffer the forward-updated TX and skip probs */ ++ if (frame_is_intra) ++ copy_tx_and_skip(tx_skip, probs); ++ ++ /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ ++ *probs = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* if FrameIsIntra then undo the effect of load_probs2() */ ++ if (frame_is_intra) ++ copy_tx_and_skip(probs, tx_skip); ++ ++ counts = &vp9_ctx->cnts; ++ hantro_cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; ++ for (i = 0; i < ARRAY_SIZE(tx16p); ++i) { ++ memcpy(tx16p[i], ++ hantro_cnts->tx16x16_count[i], ++ sizeof(hantro_cnts->tx16x16_count[0])); ++ tx16p[i][3] = 0; ++ } ++ counts->tx16p = &tx16p; ++ ++ v4l2_vp9_adapt_coef_probs(probs, counts, ++ !vp9_ctx->last.valid || ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, ++ frame_is_intra); ++ ++ if (!frame_is_intra) { ++ /* load_probs2() already done */ ++ u32 mv_mode[7][4]; ++ ++ for (i = 0; i < ARRAY_SIZE(mv_mode); ++i) { ++ mv_mode[i][0] = hantro_cnts->inter_mode_counts[i][1][0]; ++ mv_mode[i][1] = hantro_cnts->inter_mode_counts[i][2][0]; ++ mv_mode[i][2] = hantro_cnts->inter_mode_counts[i][0][0]; ++ mv_mode[i][3] = hantro_cnts->inter_mode_counts[i][2][1]; ++ } ++ counts->mv_mode = &mv_mode; ++ v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, ++ vp9_ctx->cur.reference_mode, ++ vp9_ctx->cur.interpolation_filter, ++ vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); ++ } ++ } ++ ++ vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; ++ ++out_update_last: ++ vp9_ctx->last = vp9_ctx->cur; ++} +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 1d869abf90b2..fe5b51046d33 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + + #define DEC_8190_ALIGN_MASK 0x07U +@@ -165,6 +166,82 @@ struct hantro_vp8_dec_hw_ctx { + struct hantro_aux_buf prob_tbl; + }; + ++/** ++ * struct hantro_vp9_frame_info ++ * ++ * @valid: frame info valid flag ++ * @frame_context_idx: index of frame context ++ * @reference_mode: inter prediction type ++ * @tx_mode: transform mode ++ * @interpolation_filter: filter selection for inter prediction ++ * @flags: frame flags ++ * @timestamp: frame timestamp ++ */ ++struct hantro_vp9_frame_info { ++ u32 valid : 1; ++ u32 frame_context_idx : 2; ++ u32 reference_mode : 2; ++ u32 tx_mode : 3; ++ u32 interpolation_filter : 3; ++ u32 flags; ++ u64 timestamp; ++}; ++ ++#define MAX_SB_COLS 64 ++#define MAX_SB_ROWS 34 ++ ++/** ++ * struct hantro_vp9_dec_hw_ctx ++ * ++ * @tile_edge: auxiliary DMA buffer for tile edge processing ++ * @segment_map: auxiliary DMA buffer for segment map ++ * @misc: auxiliary DMA buffer for tile info, probabilities and hw counters ++ * @cnts: vp9 library struct for abstracting hw counters access ++ * @probability_tables: VP9 probability tables implied by the spec ++ * @frame_context: VP9 frame contexts ++ * @cur: current frame information ++ * @last: last frame information ++ * @bsd_ctrl_offset: bsd offset into tile_edge ++ * @segment_map_size: size of segment map ++ * @ctx_counters_offset: hw counters offset into misc ++ * @tile_info_offset: tile info offset into misc ++ * @tile_r_info: per-tile information array ++ * @tile_c_info: per-tile information array ++ * @last_tile_r: last number of tile rows ++ * @last_tile_c: last number of tile cols ++ * @last_sbs_r: last number of superblock rows ++ * @last_sbs_c: last number of superblock cols ++ * @active_segment: number of active segment (alternating between 0 and 1) ++ * @feature_enabled: segmentation feature enabled flags ++ * @feature_data: segmentation feature data ++ */ ++struct hantro_vp9_dec_hw_ctx { ++ struct hantro_aux_buf tile_edge; ++ struct hantro_aux_buf segment_map; ++ struct hantro_aux_buf misc; ++ struct v4l2_vp9_frame_symbol_counts cnts; ++ struct v4l2_vp9_frame_context probability_tables; ++ struct v4l2_vp9_frame_context frame_context[4]; ++ struct hantro_vp9_frame_info cur; ++ struct hantro_vp9_frame_info last; ++ ++ unsigned int bsd_ctrl_offset; ++ unsigned int segment_map_size; ++ unsigned int ctx_counters_offset; ++ unsigned int tile_info_offset; ++ ++ unsigned short tile_r_info[MAX_SB_ROWS]; ++ unsigned short tile_c_info[MAX_SB_COLS]; ++ unsigned int last_tile_r; ++ unsigned int last_tile_c; ++ unsigned int last_sbs_r; ++ unsigned int last_sbs_c; ++ ++ unsigned int active_segment; ++ u8 feature_enabled[8]; ++ s16 feature_data[8][4]; ++}; ++ + /** + * struct hantro_postproc_ctx + * +@@ -271,6 +348,24 @@ void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx); + size_t hantro_hevc_chroma_offset(const struct v4l2_ctrl_hevc_sps *sps); + size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps); + ++static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension) ++{ ++ return (dimension + 63) / 64; ++} ++ ++static inline size_t ++hantro_vp9_mv_size(unsigned int width, unsigned int height) ++{ ++ int num_ctbs; ++ ++ /* ++ * There can be up to (CTBs x 64) number of blocks, ++ * and the motion vector for each block needs 16 bytes. ++ */ ++ num_ctbs = hantro_vp9_num_sbs(width) * hantro_vp9_num_sbs(height); ++ return (num_ctbs * 64) * 16; ++} ++ + static inline size_t + hantro_h264_mv_size(unsigned int width, unsigned int height) + { +@@ -312,6 +407,10 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx); + void hantro_vp8_prob_update(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp8_frame *hdr); + ++int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx); ++void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx); ++int hantro_vp9_dec_init(struct hantro_ctx *ctx); ++void hantro_vp9_dec_exit(struct hantro_ctx *ctx); + void hantro_g2_check_idle(struct hantro_dev *vpu); + + #endif /* HANTRO_HW_H_ */ +diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c +index d1f060c55fed..e4b0645ba6fc 100644 +--- a/drivers/staging/media/hantro/hantro_v4l2.c ++++ b/drivers/staging/media/hantro/hantro_v4l2.c +@@ -299,6 +299,11 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, + pix_mp->plane_fmt[0].sizeimage += + hantro_h264_mv_size(pix_mp->width, + pix_mp->height); ++ else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME && ++ !hantro_needs_postproc(ctx, fmt)) ++ pix_mp->plane_fmt[0].sizeimage += ++ hantro_vp9_mv_size(pix_mp->width, ++ pix_mp->height); + } else if (!pix_mp->plane_fmt[0].sizeimage) { + /* + * For coded formats the application can specify +@@ -407,6 +412,7 @@ hantro_update_requires_request(struct hantro_ctx *ctx, u32 fourcc) + case V4L2_PIX_FMT_VP8_FRAME: + case V4L2_PIX_FMT_H264_SLICE: + case V4L2_PIX_FMT_HEVC_SLICE: ++ case V4L2_PIX_FMT_VP9_FRAME: + ctx->fh.m2m_ctx->out_q_ctx.q.requires_requests = true; + break; + default: +diff --git a/drivers/staging/media/hantro/hantro_vp9.c b/drivers/staging/media/hantro/hantro_vp9.c +new file mode 100644 +index 000000000000..566cd376c097 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_vp9.c +@@ -0,0 +1,240 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Hantro VP9 codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd. ++ */ ++ ++#include ++#include ++ ++#include "hantro.h" ++#include "hantro_hw.h" ++#include "hantro_vp9.h" ++ ++#define POW2(x) (1 << (x)) ++ ++#define MAX_LOG2_TILE_COLUMNS 6 ++#define MAX_NUM_TILE_COLS POW2(MAX_LOG2_TILE_COLUMNS) ++#define MAX_TILE_COLS 20 ++#define MAX_TILE_ROWS 22 ++ ++static size_t hantro_vp9_tile_filter_size(unsigned int height) ++{ ++ u32 h, height32, size; ++ ++ h = roundup(height, 8); ++ ++ height32 = roundup(h, 64); ++ size = 24 * height32 * (MAX_NUM_TILE_COLS - 1); /* luma: 8, chroma: 8 + 8 */ ++ ++ return size; ++} ++ ++static size_t hantro_vp9_bsd_control_size(unsigned int height) ++{ ++ u32 h, height32; ++ ++ h = roundup(height, 8); ++ height32 = roundup(h, 64); ++ ++ return 16 * (height32 / 4) * (MAX_NUM_TILE_COLS - 1); ++} ++ ++static size_t hantro_vp9_segment_map_size(unsigned int width, unsigned int height) ++{ ++ u32 w, h; ++ int num_ctbs; ++ ++ w = roundup(width, 8); ++ h = roundup(height, 8); ++ num_ctbs = ((w + 63) / 64) * ((h + 63) / 64); ++ ++ return num_ctbs * 32; ++} ++ ++static inline size_t hantro_vp9_prob_tab_size(void) ++{ ++ return roundup(sizeof(struct hantro_g2_all_probs), 16); ++} ++ ++static inline size_t hantro_vp9_count_tab_size(void) ++{ ++ return roundup(sizeof(struct symbol_counts), 16); ++} ++ ++static inline size_t hantro_vp9_tile_info_size(void) ++{ ++ return roundup((MAX_TILE_COLS * MAX_TILE_ROWS * 4 * sizeof(u16) + 15 + 16) & ~0xf, 16); ++} ++ ++static void *get_coeffs_arr(struct symbol_counts *cnts, int i, int j, int k, int l, int m) ++{ ++ if (i == 0) ++ return &cnts->count_coeffs[j][k][l][m]; ++ ++ if (i == 1) ++ return &cnts->count_coeffs8x8[j][k][l][m]; ++ ++ if (i == 2) ++ return &cnts->count_coeffs16x16[j][k][l][m]; ++ ++ if (i == 3) ++ return &cnts->count_coeffs32x32[j][k][l][m]; ++ ++ return NULL; ++} ++ ++static void *get_eobs1(struct symbol_counts *cnts, int i, int j, int k, int l, int m) ++{ ++ if (i == 0) ++ return &cnts->count_coeffs[j][k][l][m][3]; ++ ++ if (i == 1) ++ return &cnts->count_coeffs8x8[j][k][l][m][3]; ++ ++ if (i == 2) ++ return &cnts->count_coeffs16x16[j][k][l][m][3]; ++ ++ if (i == 3) ++ return &cnts->count_coeffs32x32[j][k][l][m][3]; ++ ++ return NULL; ++} ++ ++#define INNER_LOOP \ ++ do { \ ++ for (m = 0; m < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0][0]); ++m) { \ ++ vp9_ctx->cnts.coeff[i][j][k][l][m] = \ ++ get_coeffs_arr(cnts, i, j, k, l, m); \ ++ vp9_ctx->cnts.eob[i][j][k][l][m][0] = \ ++ &cnts->count_eobs[i][j][k][l][m]; \ ++ vp9_ctx->cnts.eob[i][j][k][l][m][1] = \ ++ get_eobs1(cnts, i, j, k, l, m); \ ++ } \ ++ } while (0) ++ ++static void init_v4l2_vp9_count_tbl(struct hantro_ctx *ctx) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct symbol_counts *cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; ++ int i, j, k, l, m; ++ ++ vp9_ctx->cnts.partition = &cnts->partition_counts; ++ vp9_ctx->cnts.skip = &cnts->mbskip_count; ++ vp9_ctx->cnts.intra_inter = &cnts->intra_inter_count; ++ vp9_ctx->cnts.tx32p = &cnts->tx32x32_count; ++ /* ++ * g2 hardware uses tx16x16_count[2][3], while the api ++ * expects tx16p[2][4], so this must be explicitly copied ++ * into vp9_ctx->cnts.tx16p when passing the data to the ++ * vp9 library function ++ */ ++ vp9_ctx->cnts.tx8p = &cnts->tx8x8_count; ++ ++ vp9_ctx->cnts.y_mode = &cnts->sb_ymode_counts; ++ vp9_ctx->cnts.uv_mode = &cnts->uv_mode_counts; ++ vp9_ctx->cnts.comp = &cnts->comp_inter_count; ++ vp9_ctx->cnts.comp_ref = &cnts->comp_ref_count; ++ vp9_ctx->cnts.single_ref = &cnts->single_ref_count; ++ vp9_ctx->cnts.filter = &cnts->switchable_interp_counts; ++ vp9_ctx->cnts.mv_joint = &cnts->mv_counts.joints; ++ vp9_ctx->cnts.sign = &cnts->mv_counts.sign; ++ vp9_ctx->cnts.classes = &cnts->mv_counts.classes; ++ vp9_ctx->cnts.class0 = &cnts->mv_counts.class0; ++ vp9_ctx->cnts.bits = &cnts->mv_counts.bits; ++ vp9_ctx->cnts.class0_fp = &cnts->mv_counts.class0_fp; ++ vp9_ctx->cnts.fp = &cnts->mv_counts.fp; ++ vp9_ctx->cnts.class0_hp = &cnts->mv_counts.class0_hp; ++ vp9_ctx->cnts.hp = &cnts->mv_counts.hp; ++ ++ for (i = 0; i < ARRAY_SIZE(vp9_ctx->cnts.coeff); ++i) ++ for (j = 0; j < ARRAY_SIZE(vp9_ctx->cnts.coeff[i]); ++j) ++ for (k = 0; k < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0]); ++k) ++ for (l = 0; l < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0]); ++l) ++ INNER_LOOP; ++} ++ ++int hantro_vp9_dec_init(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ const struct hantro_variant *variant = vpu->variant; ++ struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; ++ struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; ++ struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; ++ struct hantro_aux_buf *misc = &vp9_dec->misc; ++ u32 i, max_width, max_height, size; ++ ++ if (variant->num_dec_fmts < 1) ++ return -EINVAL; ++ ++ for (i = 0; i < variant->num_dec_fmts; ++i) ++ if (variant->dec_fmts[i].fourcc == V4L2_PIX_FMT_VP9_FRAME) ++ break; ++ ++ if (i == variant->num_dec_fmts) ++ return -EINVAL; ++ ++ max_width = vpu->variant->dec_fmts[i].frmsize.max_width; ++ max_height = vpu->variant->dec_fmts[i].frmsize.max_height; ++ ++ size = hantro_vp9_tile_filter_size(max_height); ++ vp9_dec->bsd_ctrl_offset = size; ++ size += hantro_vp9_bsd_control_size(max_height); ++ ++ tile_edge->cpu = dma_alloc_coherent(vpu->dev, size, &tile_edge->dma, GFP_KERNEL); ++ if (!tile_edge->cpu) ++ return -ENOMEM; ++ ++ tile_edge->size = size; ++ memset(tile_edge->cpu, 0, size); ++ ++ size = hantro_vp9_segment_map_size(max_width, max_height); ++ vp9_dec->segment_map_size = size; ++ size *= 2; /* we need two areas of this size, used alternately */ ++ ++ segment_map->cpu = dma_alloc_coherent(vpu->dev, size, &segment_map->dma, GFP_KERNEL); ++ if (!segment_map->cpu) ++ goto err_segment_map; ++ ++ segment_map->size = size; ++ memset(segment_map->cpu, 0, size); ++ ++ size = hantro_vp9_prob_tab_size(); ++ vp9_dec->ctx_counters_offset = size; ++ size += hantro_vp9_count_tab_size(); ++ vp9_dec->tile_info_offset = size; ++ size += hantro_vp9_tile_info_size(); ++ ++ misc->cpu = dma_alloc_coherent(vpu->dev, size, &misc->dma, GFP_KERNEL); ++ if (!misc->cpu) ++ goto err_misc; ++ ++ misc->size = size; ++ memset(misc->cpu, 0, size); ++ ++ init_v4l2_vp9_count_tbl(ctx); ++ ++ return 0; ++ ++err_misc: ++ dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); ++ ++err_segment_map: ++ dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); ++ ++ return -ENOMEM; ++} ++ ++void hantro_vp9_dec_exit(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; ++ struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; ++ struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; ++ struct hantro_aux_buf *misc = &vp9_dec->misc; ++ ++ dma_free_coherent(vpu->dev, misc->size, misc->cpu, misc->dma); ++ dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); ++ dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); ++} +diff --git a/drivers/staging/media/hantro/hantro_vp9.h b/drivers/staging/media/hantro/hantro_vp9.h +new file mode 100644 +index 000000000000..26b69275f098 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_vp9.h +@@ -0,0 +1,102 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Hantro VP9 codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd. ++ */ ++ ++struct hantro_g2_mv_probs { ++ u8 joint[3]; ++ u8 sign[2]; ++ u8 class0_bit[2][1]; ++ u8 fr[2][3]; ++ u8 class0_hp[2]; ++ u8 hp[2]; ++ u8 classes[2][10]; ++ u8 class0_fr[2][2][3]; ++ u8 bits[2][10]; ++}; ++ ++struct hantro_g2_probs { ++ u8 inter_mode[7][4]; ++ u8 is_inter[4]; ++ u8 uv_mode[10][8]; ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 y_mode_tail[4][1]; ++ u8 y_mode[4][8]; ++ u8 partition[2][16][4]; /* [keyframe][][], [inter][][] */ ++ u8 uv_mode_tail[10][1]; ++ u8 interp_filter[4][2]; ++ u8 comp_mode[5]; ++ u8 skip[3]; ++ ++ u8 pad1[1]; ++ ++ struct hantro_g2_mv_probs mv; ++ ++ u8 single_ref[5][2]; ++ u8 comp_ref[5]; ++ ++ u8 pad2[17]; ++ ++ u8 coef[4][2][2][6][6][4]; ++}; ++ ++struct hantro_g2_all_probs { ++ u8 kf_y_mode_prob[10][10][8]; ++ ++ u8 kf_y_mode_prob_tail[10][10][1]; ++ u8 ref_pred_probs[3]; ++ u8 mb_segment_tree_probs[7]; ++ u8 segment_pred_probs[3]; ++ u8 ref_scores[4]; ++ u8 prob_comppred[2]; ++ ++ u8 pad1[9]; ++ ++ u8 kf_uv_mode_prob[10][8]; ++ u8 kf_uv_mode_prob_tail[10][1]; ++ ++ u8 pad2[6]; ++ ++ struct hantro_g2_probs probs; ++}; ++ ++struct mv_counts { ++ u32 joints[4]; ++ u32 sign[2][2]; ++ u32 classes[2][11]; ++ u32 class0[2][2]; ++ u32 bits[2][10][2]; ++ u32 class0_fp[2][2][4]; ++ u32 fp[2][4]; ++ u32 class0_hp[2][2]; ++ u32 hp[2][2]; ++}; ++ ++struct symbol_counts { ++ u32 inter_mode_counts[7][3][2]; ++ u32 sb_ymode_counts[4][10]; ++ u32 uv_mode_counts[10][10]; ++ u32 partition_counts[16][4]; ++ u32 switchable_interp_counts[4][3]; ++ u32 intra_inter_count[4][2]; ++ u32 comp_inter_count[5][2]; ++ u32 single_ref_count[5][2][2]; ++ u32 comp_ref_count[5][2]; ++ u32 tx32x32_count[2][4]; ++ u32 tx16x16_count[2][3]; ++ u32 tx8x8_count[2][2]; ++ u32 mbskip_count[3][2]; ++ ++ struct mv_counts mv_counts; ++ ++ u32 count_coeffs[2][2][6][6][4]; ++ u32 count_coeffs8x8[2][2][6][6][4]; ++ u32 count_coeffs16x16[2][2][6][6][4]; ++ u32 count_coeffs32x32[2][2][6][6][4]; ++ ++ u32 count_eobs[4][2][2][6][6]; ++}; +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index a40b161e5956..455a107ffb02 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -150,6 +150,19 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + .step_height = MB_DIM, + }, + }, ++ { ++ .fourcc = V4L2_PIX_FMT_VP9_FRAME, ++ .codec_mode = HANTRO_MODE_VP9_DEC, ++ .max_depth = 2, ++ .frmsize = { ++ .min_width = 48, ++ .max_width = 3840, ++ .step_width = MB_DIM, ++ .min_height = 48, ++ .max_height = 2160, ++ .step_height = MB_DIM, ++ }, ++ }, + }; + + static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) +@@ -241,6 +254,13 @@ static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { + .init = hantro_hevc_dec_init, + .exit = hantro_hevc_dec_exit, + }, ++ [HANTRO_MODE_VP9_DEC] = { ++ .run = hantro_g2_vp9_dec_run, ++ .done = hantro_g2_vp9_dec_done, ++ .reset = imx8m_vpu_g2_reset, ++ .init = hantro_vp9_dec_init, ++ .exit = hantro_vp9_dec_exit, ++ }, + }; + + /* +@@ -281,7 +301,7 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { + .dec_offset = 0x0, + .dec_fmts = imx8m_vpu_g2_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), +- .codec = HANTRO_HEVC_DECODER, ++ .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, + .codec_ops = imx8mq_vpu_g2_codec_ops, + .init = imx8mq_vpu_hw_init, + .runtime_resume = imx8mq_runtime_resume, diff --git a/projects/Allwinner/patches/linux/0077-media-hantro-Staticize-a-struct-in-postprocessor-cod.patch b/projects/Allwinner/patches/linux/0077-media-hantro-Staticize-a-struct-in-postprocessor-cod.patch new file mode 100644 index 0000000000..b4c6db8cca --- /dev/null +++ b/projects/Allwinner/patches/linux/0077-media-hantro-Staticize-a-struct-in-postprocessor-cod.patch @@ -0,0 +1,27 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:41 +0100 +Subject: [PATCH] media: hantro: Staticize a struct in postprocessor code + +The struct is not used outside this file, so it can be static. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro_postproc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 4549aec08feb..89de43021779 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -33,7 +33,7 @@ + #define VPU_PP_OUT_RGB 0x0 + #define VPU_PP_OUT_YUYV 0x3 + +-const struct hantro_postproc_regs hantro_g1_postproc_regs = { ++static const struct hantro_postproc_regs hantro_g1_postproc_regs = { + .pipeline_en = {G1_REG_PP_INTERRUPT, 1, 0x1}, + .max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f}, + .clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1}, diff --git a/projects/Allwinner/patches/linux/0078-media-hantro-Support-NV12-on-the-G2-core.patch b/projects/Allwinner/patches/linux/0078-media-hantro-Support-NV12-on-the-G2-core.patch new file mode 100644 index 0000000000..9c7fc3930f --- /dev/null +++ b/projects/Allwinner/patches/linux/0078-media-hantro-Support-NV12-on-the-G2-core.patch @@ -0,0 +1,161 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:42 +0100 +Subject: [PATCH] media: hantro: Support NV12 on the G2 core + +The G2 decoder block produces NV12 4x4 tiled format (NV12_4L4). +Enable the G2 post-processor block, in order to produce regular NV12. + +The logic in hantro_postproc.c is leveraged to take care of allocating +the extra buffers and configure the post-processor, which is +significantly simpler than the one on the G1. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + .../staging/media/hantro/hantro_g2_vp9_dec.c | 6 ++-- + drivers/staging/media/hantro/hantro_hw.h | 1 + + .../staging/media/hantro/hantro_postproc.c | 31 +++++++++++++++++++ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 11 +++++++ + 4 files changed, 46 insertions(+), 3 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +index fc55b03a8004..e04242d10fa2 100644 +--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +@@ -152,7 +152,7 @@ static void config_output(struct hantro_ctx *ctx, + hantro_reg_write(ctx->dev, &g2_out_dis, 0); + hantro_reg_write(ctx->dev, &g2_output_format, 0); + +- luma_addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); ++ luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); +@@ -191,7 +191,7 @@ static void config_ref(struct hantro_ctx *ctx, + hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); + hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); + +- luma_addr = vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0); ++ luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); +@@ -236,7 +236,7 @@ static void config_ref_registers(struct hantro_ctx *ctx, + config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts); + config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); + +- mv_addr = vb2_dma_contig_plane_dma_addr(&mv_ref->base.vb.vb2_buf, 0) + ++ mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + + mv_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); + +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index fe5b51046d33..dbe51303724b 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -310,6 +310,7 @@ extern const struct hantro_variant rk3399_vpu_variant; + extern const struct hantro_variant sama5d4_vdec_variant; + + extern const struct hantro_postproc_ops hantro_g1_postproc_ops; ++extern const struct hantro_postproc_ops hantro_g2_postproc_ops; + + extern const u32 hantro_vp8_dec_mc_filter[8][6]; + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 89de43021779..a7774ad4c445 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -11,6 +11,7 @@ + #include "hantro.h" + #include "hantro_hw.h" + #include "hantro_g1_regs.h" ++#include "hantro_g2_regs.h" + + #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ + { \ +@@ -99,6 +100,21 @@ static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) + HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width); + } + ++static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ struct vb2_v4l2_buffer *dst_buf; ++ size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height; ++ dma_addr_t dst_dma; ++ ++ dst_buf = hantro_get_dst_buf(ctx); ++ dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); ++ ++ hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); ++ hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); ++ hantro_reg_write(vpu, &g2_out_rs_e, 1); ++} ++ + void hantro_postproc_free(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +@@ -127,6 +143,9 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) + if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) + buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); ++ else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME) ++ buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width, ++ ctx->dst_fmt.height); + + for (i = 0; i < num_buffers; ++i) { + struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; +@@ -152,6 +171,13 @@ static void hantro_postproc_g1_disable(struct hantro_ctx *ctx) + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); + } + ++static void hantro_postproc_g2_disable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ hantro_reg_write(vpu, &g2_out_rs_e, 0); ++} ++ + void hantro_postproc_disable(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +@@ -172,3 +198,8 @@ const struct hantro_postproc_ops hantro_g1_postproc_ops = { + .enable = hantro_postproc_g1_enable, + .disable = hantro_postproc_g1_disable, + }; ++ ++const struct hantro_postproc_ops hantro_g2_postproc_ops = { ++ .enable = hantro_postproc_g2_enable, ++ .disable = hantro_postproc_g2_disable, ++}; +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 455a107ffb02..1a43f6fceef9 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -132,6 +132,14 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { + }, + }; + ++static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_NV12, ++ .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, ++ }, ++}; ++ + static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12_4L4, +@@ -301,6 +309,9 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { + .dec_offset = 0x0, + .dec_fmts = imx8m_vpu_g2_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), ++ .postproc_fmts = imx8m_vpu_g2_postproc_fmts, ++ .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_g2_postproc_fmts), ++ .postproc_ops = &hantro_g2_postproc_ops, + .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, + .codec_ops = imx8mq_vpu_g2_codec_ops, + .init = imx8mq_vpu_hw_init, diff --git a/projects/Allwinner/patches/linux/0079-media-hantro-Fix-probe-func-error-path.patch b/projects/Allwinner/patches/linux/0079-media-hantro-Fix-probe-func-error-path.patch new file mode 100644 index 0000000000..0ba016a116 --- /dev/null +++ b/projects/Allwinner/patches/linux/0079-media-hantro-Fix-probe-func-error-path.patch @@ -0,0 +1,39 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Mon, 29 Nov 2021 18:31:35 +0100 +Subject: [PATCH] media: hantro: Fix probe func error path + +If clocks for some reason couldn't be enabled, probe function returns +immediately, without disabling PM. This obviously leaves PM ref counters +unbalanced. + +Fix that by jumping to appropriate error path, so effects of PM functions +are reversed. + +Fixes: 775fec69008d ("media: add Rockchip VPU JPEG encoder driver") +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/hantro_drv.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index ab2467998d29..3d3107a39dae 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -981,7 +981,7 @@ static int hantro_probe(struct platform_device *pdev) + ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); + if (ret) { + dev_err(&pdev->dev, "Failed to prepare clocks\n"); +- return ret; ++ goto err_pm_disable; + } + + ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); +@@ -1037,6 +1037,7 @@ static int hantro_probe(struct platform_device *pdev) + v4l2_device_unregister(&vpu->v4l2_dev); + err_clk_unprepare: + clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); ++err_pm_disable: + pm_runtime_dont_use_autosuspend(vpu->dev); + pm_runtime_disable(vpu->dev); + return ret; diff --git a/projects/Allwinner/patches/linux/0080-media-hantro-add-support-for-reset-lines.patch b/projects/Allwinner/patches/linux/0080-media-hantro-add-support-for-reset-lines.patch new file mode 100644 index 0000000000..116ec8c526 --- /dev/null +++ b/projects/Allwinner/patches/linux/0080-media-hantro-add-support-for-reset-lines.patch @@ -0,0 +1,92 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sat, 7 Aug 2021 17:29:11 +0200 +Subject: [PATCH] media: hantro: add support for reset lines + +Some SoCs like Allwinner H6 use reset lines for resetting Hantro G2. Add +support for them. + +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/hantro.h | 3 +++ + drivers/staging/media/hantro/hantro_drv.c | 15 ++++++++++++++- + 2 files changed, 17 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index 7da23f7f207a..33eb3e092cc1 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -171,6 +172,7 @@ hantro_vdev_to_func(struct video_device *vdev) + * @dev: Pointer to device for convenient logging using + * dev_ macros. + * @clocks: Array of clock handles. ++ * @resets: Array of reset handles. + * @reg_bases: Mapped addresses of VPU registers. + * @enc_base: Mapped address of VPU encoder register for convenience. + * @dec_base: Mapped address of VPU decoder register for convenience. +@@ -190,6 +192,7 @@ struct hantro_dev { + struct platform_device *pdev; + struct device *dev; + struct clk_bulk_data *clocks; ++ struct reset_control *resets; + void __iomem **reg_bases; + void __iomem *enc_base; + void __iomem *dec_base; +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 3d3107a39dae..770f4ce71d29 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -905,6 +905,10 @@ static int hantro_probe(struct platform_device *pdev) + return PTR_ERR(vpu->clocks[0].clk); + } + ++ vpu->resets = devm_reset_control_array_get(&pdev->dev, false, true); ++ if (IS_ERR(vpu->resets)) ++ return PTR_ERR(vpu->resets); ++ + num_bases = vpu->variant->num_regs ?: 1; + vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, + sizeof(*vpu->reg_bases), GFP_KERNEL); +@@ -978,10 +982,16 @@ static int hantro_probe(struct platform_device *pdev) + pm_runtime_use_autosuspend(vpu->dev); + pm_runtime_enable(vpu->dev); + ++ ret = reset_control_deassert(vpu->resets); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to deassert resets\n"); ++ goto err_pm_disable; ++ } ++ + ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); + if (ret) { + dev_err(&pdev->dev, "Failed to prepare clocks\n"); +- goto err_pm_disable; ++ goto err_rst_assert; + } + + ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); +@@ -1037,6 +1047,8 @@ static int hantro_probe(struct platform_device *pdev) + v4l2_device_unregister(&vpu->v4l2_dev); + err_clk_unprepare: + clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); ++err_rst_assert: ++ reset_control_assert(vpu->resets); + err_pm_disable: + pm_runtime_dont_use_autosuspend(vpu->dev); + pm_runtime_disable(vpu->dev); +@@ -1056,6 +1068,7 @@ static int hantro_remove(struct platform_device *pdev) + v4l2_m2m_release(vpu->m2m_dev); + v4l2_device_unregister(&vpu->v4l2_dev); + clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); ++ reset_control_assert(vpu->resets); + pm_runtime_dont_use_autosuspend(vpu->dev); + pm_runtime_disable(vpu->dev); + return 0; diff --git a/projects/Allwinner/patches/linux/0081-media-hantro-vp9-use-double-buffering-if-needed.patch b/projects/Allwinner/patches/linux/0081-media-hantro-vp9-use-double-buffering-if-needed.patch new file mode 100644 index 0000000000..15f258c253 --- /dev/null +++ b/projects/Allwinner/patches/linux/0081-media-hantro-vp9-use-double-buffering-if-needed.patch @@ -0,0 +1,63 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sun, 21 Nov 2021 20:39:11 +0100 +Subject: [PATCH] media: hantro: vp9: use double buffering if needed + +Some G2 variants need double buffering to be enabled in order to work +correctly, like that found in Allwinner H6 SoC. + +Add platform quirk for that. + +Reviewed-by: Andrzej Pietrasiewicz +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/hantro.h | 2 ++ + drivers/staging/media/hantro/hantro_g2_regs.h | 1 + + drivers/staging/media/hantro/hantro_g2_vp9_dec.c | 2 ++ + 3 files changed, 5 insertions(+) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index 33eb3e092cc1..d03824fa3222 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -73,6 +73,7 @@ struct hantro_irq { + * @num_clocks: number of clocks in the array + * @reg_names: array of register range names + * @num_regs: number of register range names in the array ++ * @double_buffer: core needs double buffering + */ + struct hantro_variant { + unsigned int enc_offset; +@@ -94,6 +95,7 @@ struct hantro_variant { + int num_clocks; + const char * const *reg_names; + int num_regs; ++ unsigned int double_buffer : 1; + }; + + /** +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index 9c857dd1ad9b..15a391a4650e 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -270,6 +270,7 @@ + #define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff) + + #define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1) ++#define g2_double_buffer_e G2_DEC_REG(58, 15, 0x1) + #define g2_buswidth G2_DEC_REG(58, 8, 0x7) + #define g2_max_burst G2_DEC_REG(58, 0, 0xff) + +diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +index e04242d10fa2..d4fc649a4da1 100644 +--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +@@ -847,6 +847,8 @@ config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_p + hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1); + hantro_reg_write(ctx->dev, &g2_max_cb_size, 6); + hantro_reg_write(ctx->dev, &g2_min_cb_size, 3); ++ if (ctx->dev->variant->double_buffer) ++ hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1); + + config_output(ctx, dst, dec_params); + diff --git a/projects/Allwinner/patches/linux/0082-media-hantro-vp9-add-support-for-legacy-register-set.patch b/projects/Allwinner/patches/linux/0082-media-hantro-vp9-add-support-for-legacy-register-set.patch new file mode 100644 index 0000000000..0283b8f83e --- /dev/null +++ b/projects/Allwinner/patches/linux/0082-media-hantro-vp9-add-support-for-legacy-register-set.patch @@ -0,0 +1,242 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sun, 26 Sep 2021 19:47:03 +0200 +Subject: [PATCH] media: hantro: vp9: add support for legacy register set + +Some older G2 cores uses slightly different register set for HEVC and +VP9. Since vast majority of registers and logic is the same, it doesn't +make sense to introduce another drivers. + +Add legacy_regs quirk and implement only VP9 changes for now. HEVC +changes will be introduced later, if needed. + +Reviewed-by: Andrzej Pietrasiewicz +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/hantro.h | 2 + + drivers/staging/media/hantro/hantro_g2_regs.h | 16 ++++ + .../staging/media/hantro/hantro_g2_vp9_dec.c | 74 ++++++++++++++----- + 3 files changed, 75 insertions(+), 17 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index d03824fa3222..83ed25d9657b 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -74,6 +74,7 @@ struct hantro_irq { + * @reg_names: array of register range names + * @num_regs: number of register range names in the array + * @double_buffer: core needs double buffering ++ * @legacy_regs: core uses legacy register set + */ + struct hantro_variant { + unsigned int enc_offset; +@@ -96,6 +97,7 @@ struct hantro_variant { + const char * const *reg_names; + int num_regs; + unsigned int double_buffer : 1; ++ unsigned int legacy_regs : 1; + }; + + /** +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index 15a391a4650e..b7c6f9877b9d 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -36,7 +36,13 @@ + #define BUS_WIDTH_256 3 + + #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) ++#define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f) ++#define g2_pic_swap G2_DEC_REG(2, 22, 0x1f) + #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf) ++#define g2_dirmv_swap_old G2_DEC_REG(2, 17, 0x1f) ++#define g2_tab0_swap_old G2_DEC_REG(2, 12, 0x1f) ++#define g2_tab1_swap_old G2_DEC_REG(2, 7, 0x1f) ++#define g2_tab2_swap_old G2_DEC_REG(2, 2, 0x1f) + + #define g2_mode G2_DEC_REG(3, 27, 0x1f) + #define g2_compress_swap G2_DEC_REG(3, 20, 0xf) +@@ -45,6 +51,8 @@ + #define g2_out_dis G2_DEC_REG(3, 15, 0x1) + #define g2_out_filtering_dis G2_DEC_REG(3, 14, 0x1) + #define g2_write_mvs_e G2_DEC_REG(3, 12, 0x1) ++#define g2_tab3_swap_old G2_DEC_REG(3, 7, 0x1f) ++#define g2_rscan_swap G2_DEC_REG(3, 2, 0x1f) + + #define g2_pic_width_in_cbs G2_DEC_REG(4, 19, 0x1fff) + #define g2_pic_height_in_cbs G2_DEC_REG(4, 6, 0x1fff) +@@ -58,6 +66,7 @@ + #define g2_tempor_mvp_e G2_DEC_REG(5, 11, 0x1) + #define g2_max_cu_qpd_depth G2_DEC_REG(5, 5, 0x3f) + #define g2_cu_qpd_e G2_DEC_REG(5, 4, 0x1) ++#define g2_pix_shift G2_DEC_REG(5, 0, 0xf) + + #define g2_stream_len G2_DEC_REG(6, 0, 0xffffffff) + +@@ -80,21 +89,28 @@ + + #define g2_const_intra_e G2_DEC_REG(8, 31, 0x1) + #define g2_filt_ctrl_pres G2_DEC_REG(8, 30, 0x1) ++#define g2_bit_depth_y G2_DEC_REG(8, 21, 0xf) ++#define g2_bit_depth_c G2_DEC_REG(8, 17, 0xf) + #define g2_idr_pic_e G2_DEC_REG(8, 16, 0x1) + #define g2_bit_depth_pcm_y G2_DEC_REG(8, 12, 0xf) + #define g2_bit_depth_pcm_c G2_DEC_REG(8, 8, 0xf) + #define g2_bit_depth_y_minus8 G2_DEC_REG(8, 6, 0x3) + #define g2_bit_depth_c_minus8 G2_DEC_REG(8, 4, 0x3) ++#define g2_rs_out_bit_depth G2_DEC_REG(8, 4, 0xf) + #define g2_output_8_bits G2_DEC_REG(8, 3, 0x1) + #define g2_output_format G2_DEC_REG(8, 0, 0x7) ++#define g2_pp_pix_shift G2_DEC_REG(8, 0, 0xf) + + #define g2_refidx1_active G2_DEC_REG(9, 19, 0x1f) + #define g2_refidx0_active G2_DEC_REG(9, 14, 0x1f) + #define g2_hdr_skip_length G2_DEC_REG(9, 0, 0x3fff) + + #define g2_start_code_e G2_DEC_REG(10, 31, 0x1) ++#define g2_init_qp_old G2_DEC_REG(10, 25, 0x3f) + #define g2_init_qp G2_DEC_REG(10, 24, 0x3f) ++#define g2_num_tile_cols_old G2_DEC_REG(10, 20, 0x1f) + #define g2_num_tile_cols G2_DEC_REG(10, 19, 0x1f) ++#define g2_num_tile_rows_old G2_DEC_REG(10, 15, 0x1f) + #define g2_num_tile_rows G2_DEC_REG(10, 14, 0x1f) + #define g2_tile_e G2_DEC_REG(10, 1, 0x1) + #define g2_entropy_sync_e G2_DEC_REG(10, 0, 0x1) +diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +index d4fc649a4da1..91c21b634fab 100644 +--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +@@ -150,7 +150,8 @@ static void config_output(struct hantro_ctx *ctx, + dma_addr_t luma_addr, chroma_addr, mv_addr; + + hantro_reg_write(ctx->dev, &g2_out_dis, 0); +- hantro_reg_write(ctx->dev, &g2_output_format, 0); ++ if (!ctx->dev->variant->legacy_regs) ++ hantro_reg_write(ctx->dev, &g2_output_format, 0); + + luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); +@@ -327,6 +328,7 @@ config_tiles(struct hantro_ctx *ctx, + struct hantro_aux_buf *tile_edge = &vp9_ctx->tile_edge; + dma_addr_t addr; + unsigned short *tile_mem; ++ unsigned int rows, cols; + + addr = misc->dma + vp9_ctx->tile_info_offset; + hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr); +@@ -344,17 +346,24 @@ config_tiles(struct hantro_ctx *ctx, + + fill_tile_info(ctx, tile_r, tile_c, sbs_r, sbs_c, tile_mem); + ++ cols = tile_c; ++ rows = tile_r; + hantro_reg_write(ctx->dev, &g2_tile_e, 1); +- hantro_reg_write(ctx->dev, &g2_num_tile_cols, tile_c); +- hantro_reg_write(ctx->dev, &g2_num_tile_rows, tile_r); +- + } else { + tile_mem[0] = hantro_vp9_num_sbs(dst->vp9.width); + tile_mem[1] = hantro_vp9_num_sbs(dst->vp9.height); + ++ cols = 1; ++ rows = 1; + hantro_reg_write(ctx->dev, &g2_tile_e, 0); +- hantro_reg_write(ctx->dev, &g2_num_tile_cols, 1); +- hantro_reg_write(ctx->dev, &g2_num_tile_rows, 1); ++ } ++ ++ if (ctx->dev->variant->legacy_regs) { ++ hantro_reg_write(ctx->dev, &g2_num_tile_cols_old, cols); ++ hantro_reg_write(ctx->dev, &g2_num_tile_rows_old, rows); ++ } else { ++ hantro_reg_write(ctx->dev, &g2_num_tile_cols, cols); ++ hantro_reg_write(ctx->dev, &g2_num_tile_rows, rows); + } + + /* provide aux buffers even if no tiles are used */ +@@ -505,8 +514,22 @@ static void config_picture_dimensions(struct hantro_ctx *ctx, struct hantro_deco + static void + config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) + { +- hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); +- hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8); ++ if (ctx->dev->variant->legacy_regs) { ++ u8 pp_shift = 0; ++ ++ hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth); ++ hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth); ++ hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth); ++ ++ if (dec_params->bit_depth > 8) ++ pp_shift = 16 - dec_params->bit_depth; ++ ++ hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); ++ hantro_reg_write(ctx->dev, &g2_pix_shift, 0); ++ } else { ++ hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); ++ hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8); ++ } + } + + static inline bool is_lossless(const struct v4l2_vp9_quantization *quant) +@@ -784,9 +807,13 @@ config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_para + + dec_params->compressed_header_size; + + stream_base = vb2_dma_contig_plane_dma_addr(&vb2_src->vb2_buf, 0); +- hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base); + + tmp_addr = stream_base + headres_size; ++ if (ctx->dev->variant->legacy_regs) ++ hantro_write_addr(ctx->dev, G2_STREAM_ADDR, (tmp_addr & ~0xf)); ++ else ++ hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base); ++ + start_bit = (tmp_addr & 0xf) * 8; + hantro_reg_write(ctx->dev, &g2_start_bit, start_bit); + +@@ -794,10 +821,12 @@ config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_para + src_len += start_bit / 8 - headres_size; + hantro_reg_write(ctx->dev, &g2_stream_len, src_len); + +- tmp_addr &= ~0xf; +- hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base); +- src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0); +- hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len); ++ if (!ctx->dev->variant->legacy_regs) { ++ tmp_addr &= ~0xf; ++ hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base); ++ src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0); ++ hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len); ++ } + } + + static void +@@ -837,13 +866,24 @@ config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_p + + /* configure basic registers */ + hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE); +- hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf); +- hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf); +- hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf); ++ if (!ctx->dev->variant->legacy_regs) { ++ hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1); ++ } else { ++ hantro_reg_write(ctx->dev, &g2_strm_swap_old, 0x1f); ++ hantro_reg_write(ctx->dev, &g2_pic_swap, 0x10); ++ hantro_reg_write(ctx->dev, &g2_dirmv_swap_old, 0x10); ++ hantro_reg_write(ctx->dev, &g2_tab0_swap_old, 0x10); ++ hantro_reg_write(ctx->dev, &g2_tab1_swap_old, 0x10); ++ hantro_reg_write(ctx->dev, &g2_tab2_swap_old, 0x10); ++ hantro_reg_write(ctx->dev, &g2_tab3_swap_old, 0x10); ++ hantro_reg_write(ctx->dev, &g2_rscan_swap, 0x10); ++ } + hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128); + hantro_reg_write(ctx->dev, &g2_max_burst, 16); + hantro_reg_write(ctx->dev, &g2_apf_threshold, 8); +- hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1); + hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1); + hantro_reg_write(ctx->dev, &g2_max_cb_size, 6); + hantro_reg_write(ctx->dev, &g2_min_cb_size, 3); diff --git a/projects/Allwinner/patches/linux/0083-media-hantro-move-postproc-enablement-for-old-cores.patch b/projects/Allwinner/patches/linux/0083-media-hantro-move-postproc-enablement-for-old-cores.patch new file mode 100644 index 0000000000..6c5c6bf10c --- /dev/null +++ b/projects/Allwinner/patches/linux/0083-media-hantro-move-postproc-enablement-for-old-cores.patch @@ -0,0 +1,62 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Mon, 22 Nov 2021 18:33:14 +0100 +Subject: [PATCH] media: hantro: move postproc enablement for old cores + +Older G2 cores, like that in Allwinner H6, seem to have issue with +latching postproc register values if this is first thing done in job. +Moving that to the end solves the issue. + +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/hantro.h | 2 ++ + drivers/staging/media/hantro/hantro_drv.c | 9 ++++++++- + 2 files changed, 10 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index 83ed25d9657b..06d0f3597694 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -75,6 +75,7 @@ struct hantro_irq { + * @num_regs: number of register range names in the array + * @double_buffer: core needs double buffering + * @legacy_regs: core uses legacy register set ++ * @late_postproc: postproc must be set up at the end of the job + */ + struct hantro_variant { + unsigned int enc_offset; +@@ -98,6 +99,7 @@ struct hantro_variant { + int num_regs; + unsigned int double_buffer : 1; + unsigned int legacy_regs : 1; ++ unsigned int late_postproc : 1; + }; + + /** +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 770f4ce71d29..33bf78be145b 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -130,7 +130,7 @@ void hantro_start_prepare_run(struct hantro_ctx *ctx) + v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req, + &ctx->ctrl_handler); + +- if (!ctx->is_encoder) { ++ if (!ctx->is_encoder && !ctx->dev->variant->late_postproc) { + if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) + hantro_postproc_enable(ctx); + else +@@ -142,6 +142,13 @@ void hantro_end_prepare_run(struct hantro_ctx *ctx) + { + struct vb2_v4l2_buffer *src_buf; + ++ if (!ctx->is_encoder && ctx->dev->variant->late_postproc) { ++ if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) ++ hantro_postproc_enable(ctx); ++ else ++ hantro_postproc_disable(ctx); ++ } ++ + src_buf = hantro_get_src_buf(ctx); + v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req, + &ctx->ctrl_handler); diff --git a/projects/Allwinner/patches/linux/0084-media-hantro-Convert-imx8m_vpu_g2_irq-to-helper.patch b/projects/Allwinner/patches/linux/0084-media-hantro-Convert-imx8m_vpu_g2_irq-to-helper.patch new file mode 100644 index 0000000000..07bb28caac --- /dev/null +++ b/projects/Allwinner/patches/linux/0084-media-hantro-Convert-imx8m_vpu_g2_irq-to-helper.patch @@ -0,0 +1,92 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Mon, 29 Nov 2021 19:02:17 +0100 +Subject: [PATCH] media: hantro: Convert imx8m_vpu_g2_irq to helper + +It turns out that imx8m_vpu_g2_irq() doesn't depend on any platform +specifics and can be used with other G2 platform drivers too. + +Move it to common code. + +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/hantro_g2.c | 18 ++++++++++++++++++ + drivers/staging/media/hantro/hantro_hw.h | 1 + + drivers/staging/media/hantro/imx8m_vpu_hw.c | 20 +------------------- + 3 files changed, 20 insertions(+), 19 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c +index 6f3e1f797f83..ee5f14c5f8f2 100644 +--- a/drivers/staging/media/hantro/hantro_g2.c ++++ b/drivers/staging/media/hantro/hantro_g2.c +@@ -24,3 +24,21 @@ void hantro_g2_check_idle(struct hantro_dev *vpu) + } + } + } ++ ++irqreturn_t hantro_g2_irq(int irq, void *dev_id) ++{ ++ struct hantro_dev *vpu = dev_id; ++ enum vb2_buffer_state state; ++ u32 status; ++ ++ status = vdpu_read(vpu, G2_REG_INTERRUPT); ++ state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? ++ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; ++ ++ vdpu_write(vpu, 0, G2_REG_INTERRUPT); ++ vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); ++ ++ hantro_irq_done(vpu, state); ++ ++ return IRQ_HANDLED; ++} +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index dbe51303724b..c33b1f5df37b 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -413,5 +413,6 @@ void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx); + int hantro_vp9_dec_init(struct hantro_ctx *ctx); + void hantro_vp9_dec_exit(struct hantro_ctx *ctx); + void hantro_g2_check_idle(struct hantro_dev *vpu); ++irqreturn_t hantro_g2_irq(int irq, void *dev_id); + + #endif /* HANTRO_HW_H_ */ +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 1a43f6fceef9..f5991b8e553a 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -191,24 +191,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) + return IRQ_HANDLED; + } + +-static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id) +-{ +- struct hantro_dev *vpu = dev_id; +- enum vb2_buffer_state state; +- u32 status; +- +- status = vdpu_read(vpu, G2_REG_INTERRUPT); +- state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? +- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; +- +- vdpu_write(vpu, 0, G2_REG_INTERRUPT); +- vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); +- +- hantro_irq_done(vpu, state); +- +- return IRQ_HANDLED; +-} +- + static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) + { + vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; +@@ -280,7 +262,7 @@ static const struct hantro_irq imx8mq_irqs[] = { + }; + + static const struct hantro_irq imx8mq_g2_irqs[] = { +- { "g2", imx8m_vpu_g2_irq }, ++ { "g2", hantro_g2_irq }, + }; + + static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; diff --git a/projects/Allwinner/patches/linux/0085-media-hantro-Add-support-for-Allwinner-H6.patch b/projects/Allwinner/patches/linux/0085-media-hantro-Add-support-for-Allwinner-H6.patch new file mode 100644 index 0000000000..f27abb6def --- /dev/null +++ b/projects/Allwinner/patches/linux/0085-media-hantro-Add-support-for-Allwinner-H6.patch @@ -0,0 +1,172 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Thu, 5 Aug 2021 20:43:03 +0200 +Subject: [PATCH] media: hantro: Add support for Allwinner H6 + +Allwinner H6 has a Hantro G2 core used for VP9 decoding. It's not clear +at this time if HEVC is also supported or not. + +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/hantro/Kconfig | 10 ++- + drivers/staging/media/hantro/Makefile | 3 + + drivers/staging/media/hantro/hantro_drv.c | 3 + + drivers/staging/media/hantro/hantro_hw.h | 1 + + drivers/staging/media/hantro/sunxi_vpu_hw.c | 86 +++++++++++++++++++++ + 5 files changed, 102 insertions(+), 1 deletion(-) + create mode 100644 drivers/staging/media/hantro/sunxi_vpu_hw.c + +diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig +index 00a57d88c92e..3c5d833322c8 100644 +--- a/drivers/staging/media/hantro/Kconfig ++++ b/drivers/staging/media/hantro/Kconfig +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + config VIDEO_HANTRO + tristate "Hantro VPU driver" +- depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST ++ depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || COMPILE_TEST + depends on VIDEO_DEV && VIDEO_V4L2 + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API +@@ -40,3 +40,11 @@ config VIDEO_HANTRO_ROCKCHIP + default y + help + Enable support for RK3288, RK3328, and RK3399 SoCs. ++ ++config VIDEO_HANTRO_SUNXI ++ bool "Hantro VPU Allwinner support" ++ depends on VIDEO_HANTRO ++ depends on ARCH_SUNXI || COMPILE_TEST ++ default y ++ help ++ Enable support for H6 SoC. +diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile +index 28af0a1ee4bf..ebd5ede7bef7 100644 +--- a/drivers/staging/media/hantro/Makefile ++++ b/drivers/staging/media/hantro/Makefile +@@ -33,3 +33,6 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \ + + hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \ + rockchip_vpu_hw.o ++ ++hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \ ++ sunxi_vpu_hw.o +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index 33bf78be145b..6a51f39dde56 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -620,6 +620,9 @@ static const struct of_device_id of_hantro_match[] = { + #endif + #ifdef CONFIG_VIDEO_HANTRO_SAMA5D4 + { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, }, ++#endif ++#ifdef CONFIG_VIDEO_HANTRO_SUNXI ++ { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, }, + #endif + { /* sentinel */ } + }; +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index c33b1f5df37b..c92a6ec4b187 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -308,6 +308,7 @@ extern const struct hantro_variant rk3288_vpu_variant; + extern const struct hantro_variant rk3328_vpu_variant; + extern const struct hantro_variant rk3399_vpu_variant; + extern const struct hantro_variant sama5d4_vdec_variant; ++extern const struct hantro_variant sunxi_vpu_variant; + + extern const struct hantro_postproc_ops hantro_g1_postproc_ops; + extern const struct hantro_postproc_ops hantro_g2_postproc_ops; +diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c +new file mode 100644 +index 000000000000..90633406c4eb +--- /dev/null ++++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c +@@ -0,0 +1,86 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Allwinner Hantro G2 VPU codec driver ++ * ++ * Copyright (C) 2021 Jernej Skrabec ++ */ ++ ++#include ++ ++#include "hantro.h" ++ ++static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_NV12, ++ .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, ++ }, ++}; ++ ++static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_NV12_4L4, ++ .codec_mode = HANTRO_MODE_NONE, ++ }, ++ { ++ .fourcc = V4L2_PIX_FMT_VP9_FRAME, ++ .codec_mode = HANTRO_MODE_VP9_DEC, ++ .max_depth = 2, ++ .frmsize = { ++ .min_width = 48, ++ .max_width = 3840, ++ .step_width = MB_DIM, ++ .min_height = 48, ++ .max_height = 2160, ++ .step_height = MB_DIM, ++ }, ++ }, ++}; ++ ++static int sunxi_vpu_hw_init(struct hantro_dev *vpu) ++{ ++ clk_set_rate(vpu->clocks[0].clk, 300000000); ++ ++ return 0; ++} ++ ++static void sunxi_vpu_reset(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ reset_control_reset(vpu->resets); ++} ++ ++static const struct hantro_codec_ops sunxi_vpu_codec_ops[] = { ++ [HANTRO_MODE_VP9_DEC] = { ++ .run = hantro_g2_vp9_dec_run, ++ .done = hantro_g2_vp9_dec_done, ++ .reset = sunxi_vpu_reset, ++ .init = hantro_vp9_dec_init, ++ .exit = hantro_vp9_dec_exit, ++ }, ++}; ++ ++static const struct hantro_irq sunxi_irqs[] = { ++ { NULL, hantro_g2_irq }, ++}; ++ ++static const char * const sunxi_clk_names[] = { "mod", "bus" }; ++ ++const struct hantro_variant sunxi_vpu_variant = { ++ .dec_fmts = sunxi_vpu_dec_fmts, ++ .num_dec_fmts = ARRAY_SIZE(sunxi_vpu_dec_fmts), ++ .postproc_fmts = sunxi_vpu_postproc_fmts, ++ .num_postproc_fmts = ARRAY_SIZE(sunxi_vpu_postproc_fmts), ++ .postproc_ops = &hantro_g2_postproc_ops, ++ .codec = HANTRO_VP9_DECODER, ++ .codec_ops = sunxi_vpu_codec_ops, ++ .init = sunxi_vpu_hw_init, ++ .irqs = sunxi_irqs, ++ .num_irqs = ARRAY_SIZE(sunxi_irqs), ++ .clk_names = sunxi_clk_names, ++ .num_clocks = ARRAY_SIZE(sunxi_clk_names), ++ .double_buffer = 1, ++ .legacy_regs = 1, ++ .late_postproc = 1, ++}; diff --git a/projects/Allwinner/patches/linux/0086-arm64-dts-allwinner-h6-Add-Hantro-G2-node.patch b/projects/Allwinner/patches/linux/0086-arm64-dts-allwinner-h6-Add-Hantro-G2-node.patch new file mode 100644 index 0000000000..d7a5c5302b --- /dev/null +++ b/projects/Allwinner/patches/linux/0086-arm64-dts-allwinner-h6-Add-Hantro-G2-node.patch @@ -0,0 +1,33 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Thu, 5 Aug 2021 22:32:38 +0200 +Subject: [PATCH] arm64: dts: allwinner: h6: Add Hantro G2 node + +H6 SoC has a second VPU, dedicated to VP9 decoding. It's a slightly +older design, though. + +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index 4c4547f7d0c7..878061e75098 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -153,6 +153,15 @@ mixer0_out_tcon_top_mixer0: endpoint { + }; + }; + ++ video-codec-g2@1c00000 { ++ compatible = "allwinner,sun50i-h6-vpu-g2"; ++ reg = <0x01c00000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>; ++ clock-names = "bus", "mod"; ++ resets = <&ccu RST_BUS_VP9>; ++ }; ++ + video-codec@1c0e000 { + compatible = "allwinner,sun50i-h6-video-engine"; + reg = <0x01c0e000 0x2000>; diff --git a/projects/Rockchip/patches/ffmpeg/ffmpeg-0001-v4l2_request-validate-supported-framesizes.patch b/projects/Rockchip/patches/ffmpeg/ffmpeg-0001-v4l2_request-validate-supported-framesizes.patch deleted file mode 100644 index cc79cde7f4..0000000000 --- a/projects/Rockchip/patches/ffmpeg/ffmpeg-0001-v4l2_request-validate-supported-framesizes.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Alex Bee -Date: Sun, 19 Sep 2021 13:10:55 +0200 -Subject: [PATCH] v4l2_request: validate supported framesizes - -Signed-off-by: Alex Bee ---- - libavcodec/v4l2_request.c | 38 +++++++++++++++++++++++++++++++++++++- - 1 file changed, 37 insertions(+), 1 deletion(-) - -diff --git a/libavcodec/v4l2_request.c b/libavcodec/v4l2_request.c -index a8f0ee79ee..2fbe166341 100644 ---- a/libavcodec/v4l2_request.c -+++ b/libavcodec/v4l2_request.c -@@ -376,6 +376,42 @@ int ff_v4l2_request_decode_frame(AVCodecContext *avctx, AVFrame *frame, struct v - return v4l2_request_queue_decode(avctx, frame, control, count, 1, 1); - } - -+static int v4l2_request_try_framesize(AVCodecContext *avctx, uint32_t pixelformat) -+{ -+ V4L2RequestContext *ctx = avctx->internal->hwaccel_priv_data; -+ struct v4l2_frmsizeenum frmsize = { -+ .index = 0, -+ .pixel_format = pixelformat, -+ }; -+ -+ if (ioctl(ctx->video_fd, VIDIOC_ENUM_FRAMESIZES, &frmsize) < 0) -+ return 0; -+ -+ /* -+ * We only validate min/max framesize for V4L2_FRMSIZE_TYPE_STEPWISE here, since the alignment -+ * which is eventually needed will be done driver-side later in VIDIOC_S_FMT and there is no need -+ * validate step_width/step_height here -+ */ -+ -+ do { -+ -+ if (frmsize.type == V4L2_FRMSIZE_TYPE_DISCRETE && frmsize.discrete.width == avctx->coded_width && -+ frmsize.discrete.height == avctx->coded_height) -+ return 0; -+ else if ((frmsize.type == V4L2_FRMSIZE_TYPE_STEPWISE || frmsize.type == V4L2_FRMSIZE_TYPE_CONTINUOUS) && -+ avctx->coded_width >= frmsize.stepwise.min_width && avctx->coded_height >= frmsize.stepwise.min_height && -+ avctx->coded_width <= frmsize.stepwise.max_width && avctx->coded_height <= frmsize.stepwise.max_height) -+ return 0; -+ -+ frmsize.index++; -+ -+ } while (ioctl(ctx->video_fd, VIDIOC_ENUM_FRAMESIZES, &frmsize) >= 0); -+ -+ av_log(avctx, AV_LOG_INFO, "%s: pixelformat %u not supported for width %u height %u\n", __func__, pixelformat, avctx->coded_width, avctx->coded_height); -+ -+ return -1; -+} -+ - static int v4l2_request_try_format(AVCodecContext *avctx, enum v4l2_buf_type type, uint32_t pixelformat) - { - V4L2RequestContext *ctx = avctx->internal->hwaccel_priv_data; -@@ -404,7 +440,7 @@ static int v4l2_request_try_format(AVCodecContext *avctx, enum v4l2_buf_type typ - - while (ioctl(ctx->video_fd, VIDIOC_ENUM_FMT, &fmtdesc) >= 0) { - if (fmtdesc.pixelformat == pixelformat) -- return 0; -+ return v4l2_request_try_framesize(avctx, pixelformat); - - fmtdesc.index++; - } diff --git a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch index 77bf1119bb..aa65a2e741 100644 --- a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch +++ b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch @@ -270,10 +270,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c -index 95fedcf56e4a..38e75b275bb6 100644 +index 368f10405e13..238d70df6c80 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c -@@ -1355,6 +1355,14 @@ void mmc_power_off(struct mmc_host *host) +@@ -1356,6 +1356,14 @@ void mmc_power_off(struct mmc_host *host) if (host->ios.power_mode == MMC_POWER_OFF) return; @@ -305,7 +305,7 @@ Signed-off-by: Alex Bee 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 5b2020590f53..df46edbec82c 100644 +index 39db0b85b4da..d0410ae4def2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -975,6 +975,20 @@ usb_host0_ohci: usb@ff5d0000 { @@ -346,7 +346,7 @@ Signed-off-by: Alex Bee 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index df46edbec82c..cfc57be009a6 100644 +index d0410ae4def2..cc46855aba46 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -853,6 +853,8 @@ sdmmc: mmc@ff500000 { diff --git a/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.17.patch b/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.17.patch new file mode 100644 index 0000000000..a7199627bc --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-0010-v4l2-from-5.17.patch @@ -0,0 +1,7502 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:31 +0100 +Subject: [PATCH] hantro: postproc: Fix motion vector space size + +When the post-processor hardware block is enabled, the driver +allocates an internal queue of buffers for the decoder enginer, +and uses the vb2 queue for the post-processor engine. + +For instance, on a G1 core, the decoder engine produces NV12 buffers +and the post-processor engine can produce YUY2 buffers. The decoder +engine expects motion vectors to be appended to the NV12 buffers, +but this is only required for CODECs that need motion vectors, +such as H.264. + +Fix the post-processor logic accordingly. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro_postproc.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index ed8916c950a4..07842152003f 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -132,9 +132,10 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) + unsigned int num_buffers = cap_queue->num_buffers; + unsigned int i, buf_size; + +- buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage + +- hantro_h264_mv_size(ctx->dst_fmt.width, +- ctx->dst_fmt.height); ++ buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; ++ if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) ++ buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, ++ ctx->dst_fmt.height); + + for (i = 0; i < num_buffers; ++i) { + struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:32 +0100 +Subject: [PATCH] hantro: postproc: Introduce struct hantro_postproc_ops + +Turns out the post-processor block on the G2 core is substantially +different from the one on the G1 core. Introduce hantro_postproc_ops +with .enable and .disable methods, which will allow to support +the G2 post-processor cleanly. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Benjamin Gaignard +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro.h | 5 +-- + drivers/staging/media/hantro/hantro_hw.h | 13 +++++++- + .../staging/media/hantro/hantro_postproc.c | 33 ++++++++++++++----- + drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +- + .../staging/media/hantro/rockchip_vpu_hw.c | 6 ++-- + .../staging/media/hantro/sama5d4_vdec_hw.c | 2 +- + 6 files changed, 44 insertions(+), 17 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index c2e2dca38628..c2e01959dc00 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -28,6 +28,7 @@ + + struct hantro_ctx; + struct hantro_codec_ops; ++struct hantro_postproc_ops; + + #define HANTRO_JPEG_ENCODER BIT(0) + #define HANTRO_ENCODERS 0x0000ffff +@@ -59,6 +60,7 @@ struct hantro_irq { + * @num_dec_fmts: Number of decoder formats. + * @postproc_fmts: Post-processor formats. + * @num_postproc_fmts: Number of post-processor formats. ++ * @postproc_ops: Post-processor ops. + * @codec: Supported codecs + * @codec_ops: Codec ops. + * @init: Initialize hardware, optional. +@@ -69,7 +71,6 @@ struct hantro_irq { + * @num_clocks: number of clocks in the array + * @reg_names: array of register range names + * @num_regs: number of register range names in the array +- * @postproc_regs: &struct hantro_postproc_regs pointer + */ + struct hantro_variant { + unsigned int enc_offset; +@@ -80,6 +81,7 @@ struct hantro_variant { + unsigned int num_dec_fmts; + const struct hantro_fmt *postproc_fmts; + unsigned int num_postproc_fmts; ++ const struct hantro_postproc_ops *postproc_ops; + unsigned int codec; + const struct hantro_codec_ops *codec_ops; + int (*init)(struct hantro_dev *vpu); +@@ -90,7 +92,6 @@ struct hantro_variant { + int num_clocks; + const char * const *reg_names; + int num_regs; +- const struct hantro_postproc_regs *postproc_regs; + }; + + /** +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 267a6d33a47b..2f85430682d8 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -174,6 +174,17 @@ struct hantro_postproc_ctx { + struct hantro_aux_buf dec_q[VB2_MAX_FRAME]; + }; + ++/** ++ * struct hantro_postproc_ops - post-processor operations ++ * ++ * @enable: Enable the post-processor block. Optional. ++ * @disable: Disable the post-processor block. Optional. ++ */ ++struct hantro_postproc_ops { ++ void (*enable)(struct hantro_ctx *ctx); ++ void (*disable)(struct hantro_ctx *ctx); ++}; ++ + /** + * struct hantro_codec_ops - codec mode specific operations + * +@@ -221,7 +232,7 @@ extern const struct hantro_variant rk3328_vpu_variant; + extern const struct hantro_variant rk3399_vpu_variant; + extern const struct hantro_variant sama5d4_vdec_variant; + +-extern const struct hantro_postproc_regs hantro_g1_postproc_regs; ++extern const struct hantro_postproc_ops hantro_g1_postproc_ops; + + extern const u32 hantro_vp8_dec_mc_filter[8][6]; + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 07842152003f..882fb8bc5ddd 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -15,14 +15,14 @@ + #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ + { \ + hantro_reg_write(vpu, \ +- &(vpu)->variant->postproc_regs->reg_name, \ ++ &hantro_g1_postproc_regs.reg_name, \ + val); \ + } + + #define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \ + { \ + hantro_reg_write_s(vpu, \ +- &(vpu)->variant->postproc_regs->reg_name, \ ++ &hantro_g1_postproc_regs.reg_name, \ + val); \ + } + +@@ -64,16 +64,13 @@ bool hantro_needs_postproc(const struct hantro_ctx *ctx, + return fmt->fourcc != V4L2_PIX_FMT_NV12; + } + +-void hantro_postproc_enable(struct hantro_ctx *ctx) ++static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *dst_buf; + u32 src_pp_fmt, dst_pp_fmt; + dma_addr_t dst_dma; + +- if (!vpu->variant->postproc_regs) +- return; +- + /* Turn on pipeline mode. Must be done first. */ + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1); + +@@ -154,12 +151,30 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) + return 0; + } + ++static void hantro_postproc_g1_disable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); ++} ++ + void hantro_postproc_disable(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; + +- if (!vpu->variant->postproc_regs) +- return; ++ if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->disable) ++ vpu->variant->postproc_ops->disable(ctx); ++} + +- HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); ++void hantro_postproc_enable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->enable) ++ vpu->variant->postproc_ops->enable(ctx); + } ++ ++const struct hantro_postproc_ops hantro_g1_postproc_ops = { ++ .enable = hantro_postproc_g1_enable, ++ .disable = hantro_postproc_g1_disable, ++}; +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index ea919bfb9891..22fa7d2f3b64 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -262,7 +262,7 @@ const struct hantro_variant imx8mq_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), + .postproc_fmts = imx8m_vpu_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = imx8mq_vpu_codec_ops, +diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c +index d4f52957cc53..6c1ad5534ce5 100644 +--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c ++++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c +@@ -460,7 +460,7 @@ const struct hantro_variant rk3036_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), + .postproc_fmts = rockchip_vpu1_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = rk3036_vpu_codec_ops, +@@ -485,7 +485,7 @@ const struct hantro_variant rk3066_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), + .postproc_fmts = rockchip_vpu1_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | + HANTRO_VP8_DECODER | HANTRO_H264_DECODER, + .codec_ops = rk3066_vpu_codec_ops, +@@ -505,7 +505,7 @@ const struct hantro_variant rk3288_vpu_variant = { + .num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts), + .postproc_fmts = rockchip_vpu1_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | + HANTRO_VP8_DECODER | HANTRO_H264_DECODER, + .codec_ops = rk3288_vpu_codec_ops, +diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +index 9c3b8cd0b239..f3fecc7248c4 100644 +--- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c ++++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +@@ -100,7 +100,7 @@ const struct hantro_variant sama5d4_vdec_variant = { + .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts), + .postproc_fmts = sama5d4_vdec_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts), +- .postproc_regs = &hantro_g1_postproc_regs, ++ .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = sama5d4_vdec_codec_ops, + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:33 +0100 +Subject: [PATCH] hantro: Simplify postprocessor + +Add a 'postprocessed' boolean property to struct hantro_fmt +to signal that a format is produced by the post-processor. +This will allow to introduce the G2 post-processor in a simple way. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro.h | 2 ++ + drivers/staging/media/hantro/hantro_postproc.c | 8 +------- + drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 + + drivers/staging/media/hantro/rockchip_vpu_hw.c | 1 + + drivers/staging/media/hantro/sama5d4_vdec_hw.c | 1 + + 5 files changed, 6 insertions(+), 7 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index c2e01959dc00..dd5e56765d4e 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -263,6 +263,7 @@ struct hantro_ctx { + * @max_depth: Maximum depth, for bitstream formats + * @enc_fmt: Format identifier for encoder registers. + * @frmsize: Supported range of frame sizes (only for bitstream formats). ++ * @postprocessed: Indicates if this format needs the post-processor. + */ + struct hantro_fmt { + char *name; +@@ -272,6 +273,7 @@ struct hantro_fmt { + int max_depth; + enum hantro_enc_fmt enc_fmt; + struct v4l2_frmsize_stepwise frmsize; ++ bool postprocessed; + }; + + struct hantro_reg { +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 882fb8bc5ddd..4549aec08feb 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -53,15 +53,9 @@ const struct hantro_postproc_regs hantro_g1_postproc_regs = { + bool hantro_needs_postproc(const struct hantro_ctx *ctx, + const struct hantro_fmt *fmt) + { +- struct hantro_dev *vpu = ctx->dev; +- + if (ctx->is_encoder) + return false; +- +- if (!vpu->variant->postproc_fmts) +- return false; +- +- return fmt->fourcc != V4L2_PIX_FMT_NV12; ++ return fmt->postprocessed; + } + + static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 22fa7d2f3b64..02e61438220a 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -82,6 +82,7 @@ static const struct hantro_fmt imx8m_vpu_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, + }, + }; + +diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c +index 6c1ad5534ce5..f372f767d4ff 100644 +--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c ++++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c +@@ -62,6 +62,7 @@ static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, + }, + }; + +diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +index f3fecc7248c4..b2fc1c5613e1 100644 +--- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c ++++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c +@@ -15,6 +15,7 @@ static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, + }, + }; + + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Tue, 16 Nov 2021 15:38:34 +0100 +Subject: [PATCH] hantro: Add quirk for NV12/NV12_4L4 capture format + +The G2 core decoder engine produces NV12_4L4 format, +which is a simple NV12 4x4 tiled format. The driver currently +hides this format by always enabling the post-processor engine, +and therefore offering NV12 directly. + +This is done without using the logic in hantro_postproc.c +and therefore makes it difficult to add VP9 cleanly. + +Since fixing this is not easy, add a small quirk to force +NV12 if HEVC was configured, but otherwise declare NV12_4L4 +as the pixel format in imx8mq_vpu_g2_variant.dec_fmts. + +This will be used by the VP9 decoder which will be added soon. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro_v4l2.c | 14 ++++++++++++++ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +- + 2 files changed, 15 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c +index bcb0bdff4a9a..d1f060c55fed 100644 +--- a/drivers/staging/media/hantro/hantro_v4l2.c ++++ b/drivers/staging/media/hantro/hantro_v4l2.c +@@ -150,6 +150,20 @@ static int vidioc_enum_fmt(struct file *file, void *priv, + unsigned int num_fmts, i, j = 0; + bool skip_mode_none; + ++ /* ++ * The HEVC decoder on the G2 core needs a little quirk to offer NV12 ++ * only on the capture side. Once the post-processor logic is used, ++ * we will be able to expose NV12_4L4 and NV12 as the other cases, ++ * and therefore remove this quirk. ++ */ ++ if (capture && ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) { ++ if (f->index == 0) { ++ f->pixelformat = V4L2_PIX_FMT_NV12; ++ return 0; ++ } ++ return -EINVAL; ++ } ++ + /* + * When dealing with an encoder: + * - on the capture side we want to filter out all MODE_NONE formats. +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 02e61438220a..a40b161e5956 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -134,7 +134,7 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { + + static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + { +- .fourcc = V4L2_PIX_FMT_NV12, ++ .fourcc = V4L2_PIX_FMT_NV12_4L4, + .codec_mode = HANTRO_MODE_NONE, + }, + { + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:35 +0100 +Subject: [PATCH] media: uapi: Add VP9 stateless decoder controls + +Add the VP9 stateless decoder controls plus the documentation that goes +with it. + +Signed-off-by: Boris Brezillon +Co-developed-by: Ezequiel Garcia +Signed-off-by: Ezequiel Garcia +Signed-off-by: Adrian Ratiu +Signed-off-by: Andrzej Pietrasiewicz +Co-developed-by: Daniel Almeida +Signed-off-by: Daniel Almeida +Signed-off-by: Hans Verkuil +--- + .../userspace-api/media/v4l/biblio.rst | 10 + + .../media/v4l/ext-ctrls-codec-stateless.rst | 573 ++++++++++++++++++ + .../media/v4l/pixfmt-compressed.rst | 15 + + .../media/v4l/vidioc-g-ext-ctrls.rst | 8 + + .../media/v4l/vidioc-queryctrl.rst | 12 + + .../media/videodev2.h.rst.exceptions | 2 + + drivers/media/v4l2-core/v4l2-ctrls-core.c | 180 ++++++ + drivers/media/v4l2-core/v4l2-ctrls-defs.c | 8 + + drivers/media/v4l2-core/v4l2-ioctl.c | 1 + + include/media/v4l2-ctrls.h | 4 + + include/uapi/linux/v4l2-controls.h | 284 +++++++++ + include/uapi/linux/videodev2.h | 6 + + 12 files changed, 1103 insertions(+) + +diff --git a/Documentation/userspace-api/media/v4l/biblio.rst b/Documentation/userspace-api/media/v4l/biblio.rst +index 7b8e6738ff9e..9cd18c153d19 100644 +--- a/Documentation/userspace-api/media/v4l/biblio.rst ++++ b/Documentation/userspace-api/media/v4l/biblio.rst +@@ -417,3 +417,13 @@ VP8 + :title: RFC 6386: "VP8 Data Format and Decoding Guide" + + :author: J. Bankoski et al. ++ ++.. _vp9: ++ ++VP9 ++=== ++ ++ ++:title: VP9 Bitstream & Decoding Process Specification ++ ++:author: Adrian Grange (Google), Peter de Rivaz (Argon Design), Jonathan Hunt (Argon Design) +diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +index 72f5e85b4f34..cc080c4257d0 100644 +--- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst ++++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +@@ -1458,3 +1458,576 @@ FWHT Flags + .. raw:: latex + + \normalsize ++ ++.. _v4l2-codec-stateless-vp9: ++ ++``V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (struct)`` ++ Stores VP9 probabilities updates as parsed from the current compressed frame ++ header. A value of zero in an array element means no update of the relevant ++ probability. Motion vector-related updates contain a new value or zero. All ++ other updates contain values translated with inv_map_table[] (see 6.3.5 in ++ :ref:`vp9`). ++ ++.. c:type:: v4l2_ctrl_vp9_compressed_hdr ++ ++.. tabularcolumns:: |p{1cm}|p{4.8cm}|p{11.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_ctrl_vp9_compressed_hdr ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __u8 ++ - ``tx_mode`` ++ - Specifies the TX mode. See :ref:`TX Mode ` for more details. ++ * - __u8 ++ - ``tx8[2][1]`` ++ - TX 8x8 probabilities delta. ++ * - __u8 ++ - ``tx16[2][2]`` ++ - TX 16x16 probabilities delta. ++ * - __u8 ++ - ``tx32[2][3]`` ++ - TX 32x32 probabilities delta. ++ * - __u8 ++ - ``coef[4][2][2][6][6][3]`` ++ - Coefficient probabilities delta. ++ * - __u8 ++ - ``skip[3]`` ++ - Skip probabilities delta. ++ * - __u8 ++ - ``inter_mode[7][3]`` ++ - Inter prediction mode probabilities delta. ++ * - __u8 ++ - ``interp_filter[4][2]`` ++ - Interpolation filter probabilities delta. ++ * - __u8 ++ - ``is_inter[4]`` ++ - Is inter-block probabilities delta. ++ * - __u8 ++ - ``comp_mode[5]`` ++ - Compound prediction mode probabilities delta. ++ * - __u8 ++ - ``single_ref[5][2]`` ++ - Single reference probabilities delta. ++ * - __u8 ++ - ``comp_ref[5]`` ++ - Compound reference probabilities delta. ++ * - __u8 ++ - ``y_mode[4][9]`` ++ - Y prediction mode probabilities delta. ++ * - __u8 ++ - ``uv_mode[10][9]`` ++ - UV prediction mode probabilities delta. ++ * - __u8 ++ - ``partition[16][3]`` ++ - Partition probabilities delta. ++ * - __u8 ++ - ``mv.joint[3]`` ++ - Motion vector joint probabilities delta. ++ * - __u8 ++ - ``mv.sign[2]`` ++ - Motion vector sign probabilities delta. ++ * - __u8 ++ - ``mv.classes[2][10]`` ++ - Motion vector class probabilities delta. ++ * - __u8 ++ - ``mv.class0_bit[2]`` ++ - Motion vector class0 bit probabilities delta. ++ * - __u8 ++ - ``mv.bits[2][10]`` ++ - Motion vector bits probabilities delta. ++ * - __u8 ++ - ``mv.class0_fr[2][2][3]`` ++ - Motion vector class0 fractional bit probabilities delta. ++ * - __u8 ++ - ``mv.fr[2][3]`` ++ - Motion vector fractional bit probabilities delta. ++ * - __u8 ++ - ``mv.class0_hp[2]`` ++ - Motion vector class0 high precision fractional bit probabilities delta. ++ * - __u8 ++ - ``mv.hp[2]`` ++ - Motion vector high precision fractional bit probabilities delta. ++ ++.. _vp9_tx_mode: ++ ++``TX Mode`` ++ ++.. tabularcolumns:: |p{6.5cm}|p{0.5cm}|p{10.3cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_TX_MODE_ONLY_4X4`` ++ - 0 ++ - Transform size is 4x4. ++ * - ``V4L2_VP9_TX_MODE_ALLOW_8X8`` ++ - 1 ++ - Transform size can be up to 8x8. ++ * - ``V4L2_VP9_TX_MODE_ALLOW_16X16`` ++ - 2 ++ - Transform size can be up to 16x16. ++ * - ``V4L2_VP9_TX_MODE_ALLOW_32X32`` ++ - 3 ++ - transform size can be up to 32x32. ++ * - ``V4L2_VP9_TX_MODE_SELECT`` ++ - 4 ++ - Bitstream contains the transform size for each block. ++ ++See section '7.3.1 Tx mode semantics' of the :ref:`vp9` specification for more details. ++ ++``V4L2_CID_STATELESS_VP9_FRAME (struct)`` ++ Specifies the frame parameters for the associated VP9 frame decode request. ++ This includes the necessary parameters for configuring a stateless hardware ++ decoding pipeline for VP9. The bitstream parameters are defined according ++ to :ref:`vp9`. ++ ++.. c:type:: v4l2_ctrl_vp9_frame ++ ++.. raw:: latex ++ ++ \small ++ ++.. tabularcolumns:: |p{4.7cm}|p{5.5cm}|p{7.1cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_ctrl_vp9_frame ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - struct :c:type:`v4l2_vp9_loop_filter` ++ - ``lf`` ++ - Loop filter parameters. See struct :c:type:`v4l2_vp9_loop_filter` for more details. ++ * - struct :c:type:`v4l2_vp9_quantization` ++ - ``quant`` ++ - Quantization parameters. See :c:type:`v4l2_vp9_quantization` for more details. ++ * - struct :c:type:`v4l2_vp9_segmentation` ++ - ``seg`` ++ - Segmentation parameters. See :c:type:`v4l2_vp9_segmentation` for more details. ++ * - __u32 ++ - ``flags`` ++ - Combination of V4L2_VP9_FRAME_FLAG_* flags. See :ref:`Frame Flags`. ++ * - __u16 ++ - ``compressed_header_size`` ++ - Compressed header size in bytes. ++ * - __u16 ++ - ``uncompressed_header_size`` ++ - Uncompressed header size in bytes. ++ * - __u16 ++ - ``frame_width_minus_1`` ++ - Add 1 to get the frame width expressed in pixels. See section 7.2.3 in :ref:`vp9`. ++ * - __u16 ++ - ``frame_height_minus_1`` ++ - Add 1 to get the frame height expressed in pixels. See section 7.2.3 in :ref:`vp9`. ++ * - __u16 ++ - ``render_width_minus_1`` ++ - Add 1 to get the expected render width expressed in pixels. This is ++ not used during the decoding process but might be used by HW scalers to ++ prepare a frame that's ready for scanout. See section 7.2.4 in :ref:`vp9`. ++ * - __u16 ++ - render_height_minus_1 ++ - Add 1 to get the expected render height expressed in pixels. This is ++ not used during the decoding process but might be used by HW scalers to ++ prepare a frame that's ready for scanout. See section 7.2.4 in :ref:`vp9`. ++ * - __u64 ++ - ``last_frame_ts`` ++ - "last" reference buffer timestamp. ++ The timestamp refers to the ``timestamp`` field in ++ struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` ++ function to convert the struct :c:type:`timeval` in struct ++ :c:type:`v4l2_buffer` to a __u64. ++ * - __u64 ++ - ``golden_frame_ts`` ++ - "golden" reference buffer timestamp. ++ The timestamp refers to the ``timestamp`` field in ++ struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` ++ function to convert the struct :c:type:`timeval` in struct ++ :c:type:`v4l2_buffer` to a __u64. ++ * - __u64 ++ - ``alt_frame_ts`` ++ - "alt" reference buffer timestamp. ++ The timestamp refers to the ``timestamp`` field in ++ struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` ++ function to convert the struct :c:type:`timeval` in struct ++ :c:type:`v4l2_buffer` to a __u64. ++ * - __u8 ++ - ``ref_frame_sign_bias`` ++ - a bitfield specifying whether the sign bias is set for a given ++ reference frame. See :ref:`Reference Frame Sign Bias` ++ for more details. ++ * - __u8 ++ - ``reset_frame_context`` ++ - specifies whether the frame context should be reset to default values. See ++ :ref:`Reset Frame Context` for more details. ++ * - __u8 ++ - ``frame_context_idx`` ++ - Frame context that should be used/updated. ++ * - __u8 ++ - ``profile`` ++ - VP9 profile. Can be 0, 1, 2 or 3. ++ * - __u8 ++ - ``bit_depth`` ++ - Component depth in bits. Can be 8, 10 or 12. Note that not all profiles ++ support 10 and/or 12 bits depths. ++ * - __u8 ++ - ``interpolation_filter`` ++ - Specifies the filter selection used for performing inter prediction. See ++ :ref:`Interpolation Filter` for more details. ++ * - __u8 ++ - ``tile_cols_log2`` ++ - Specifies the base 2 logarithm of the width of each tile (where the ++ width is measured in units of 8x8 blocks). Shall be less than or equal ++ to 6. ++ * - __u8 ++ - ``tile_rows_log2`` ++ - Specifies the base 2 logarithm of the height of each tile (where the ++ height is measured in units of 8x8 blocks). ++ * - __u8 ++ - ``reference_mode`` ++ - Specifies the type of inter prediction to be used. See ++ :ref:`Reference Mode` for more details. ++ * - __u8 ++ - ``reserved[7]`` ++ - Applications and drivers must set this to zero. ++ ++.. raw:: latex ++ ++ \normalsize ++ ++.. _vp9_frame_flags: ++ ++``Frame Flags`` ++ ++.. tabularcolumns:: |p{10.0cm}|p{1.2cm}|p{6.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_FRAME_FLAG_KEY_FRAME`` ++ - 0x001 ++ - The frame is a key frame. ++ * - ``V4L2_VP9_FRAME_FLAG_SHOW_FRAME`` ++ - 0x002 ++ - The frame should be displayed. ++ * - ``V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT`` ++ - 0x004 ++ - The decoding should be error resilient. ++ * - ``V4L2_VP9_FRAME_FLAG_INTRA_ONLY`` ++ - 0x008 ++ - The frame does not reference other frames. ++ * - ``V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV`` ++ - 0x010 ++ - The frame can use high precision motion vectors. ++ * - ``V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX`` ++ - 0x020 ++ - Frame context should be updated after decoding. ++ * - ``V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE`` ++ - 0x040 ++ - Parallel decoding is used. ++ * - ``V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING`` ++ - 0x080 ++ - Vertical subsampling is enabled. ++ * - ``V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING`` ++ - 0x100 ++ - Horizontal subsampling is enabled. ++ * - ``V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING`` ++ - 0x200 ++ - The full UV range is used. ++ ++.. _vp9_ref_frame_sign_bias: ++ ++``Reference Frame Sign Bias`` ++ ++.. tabularcolumns:: |p{7.0cm}|p{1.2cm}|p{9.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_SIGN_BIAS_LAST`` ++ - 0x1 ++ - Sign bias is set for the last reference frame. ++ * - ``V4L2_VP9_SIGN_BIAS_GOLDEN`` ++ - 0x2 ++ - Sign bias is set for the golden reference frame. ++ * - ``V4L2_VP9_SIGN_BIAS_ALT`` ++ - 0x2 ++ - Sign bias is set for the alt reference frame. ++ ++.. _vp9_reset_frame_context: ++ ++``Reset Frame Context`` ++ ++.. tabularcolumns:: |p{7.0cm}|p{1.2cm}|p{9.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_RESET_FRAME_CTX_NONE`` ++ - 0 ++ - Do not reset any frame context. ++ * - ``V4L2_VP9_RESET_FRAME_CTX_SPEC`` ++ - 1 ++ - Reset the frame context pointed to by ++ :c:type:`v4l2_ctrl_vp9_frame`.frame_context_idx. ++ * - ``V4L2_VP9_RESET_FRAME_CTX_ALL`` ++ - 2 ++ - Reset all frame contexts. ++ ++See section '7.2 Uncompressed header semantics' of the :ref:`vp9` specification ++for more details. ++ ++.. _vp9_interpolation_filter: ++ ++``Interpolation Filter`` ++ ++.. tabularcolumns:: |p{9.0cm}|p{1.2cm}|p{7.1cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_INTERP_FILTER_EIGHTTAP`` ++ - 0 ++ - Eight tap filter. ++ * - ``V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH`` ++ - 1 ++ - Eight tap smooth filter. ++ * - ``V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP`` ++ - 2 ++ - Eeight tap sharp filter. ++ * - ``V4L2_VP9_INTERP_FILTER_BILINEAR`` ++ - 3 ++ - Bilinear filter. ++ * - ``V4L2_VP9_INTERP_FILTER_SWITCHABLE`` ++ - 4 ++ - Filter selection is signaled at the block level. ++ ++See section '7.2.7 Interpolation filter semantics' of the :ref:`vp9` specification ++for more details. ++ ++.. _vp9_reference_mode: ++ ++``Reference Mode`` ++ ++.. tabularcolumns:: |p{9.6cm}|p{0.5cm}|p{7.2cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE`` ++ - 0 ++ - Indicates that all the inter blocks use only a single reference frame ++ to generate motion compensated prediction. ++ * - ``V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE`` ++ - 1 ++ - Requires all the inter blocks to use compound mode. Single reference ++ frame prediction is not allowed. ++ * - ``V4L2_VP9_REFERENCE_MODE_SELECT`` ++ - 2 ++ - Allows each individual inter block to select between single and ++ compound prediction modes. ++ ++See section '7.3.6 Frame reference mode semantics' of the :ref:`vp9` specification for more details. ++ ++.. c:type:: v4l2_vp9_segmentation ++ ++Encodes the quantization parameters. See section '7.2.10 Segmentation ++params syntax' of the :ref:`vp9` specification for more details. ++ ++.. tabularcolumns:: |p{0.8cm}|p{5cm}|p{11.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_vp9_segmentation ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __u8 ++ - ``feature_data[8][4]`` ++ - Data attached to each feature. Data entry is only valid if the feature ++ is enabled. The array shall be indexed with segment number as the first dimension ++ (0..7) and one of V4L2_VP9_SEG_* as the second dimension. ++ See :ref:`Segment Feature IDs`. ++ * - __u8 ++ - ``feature_enabled[8]`` ++ - Bitmask defining which features are enabled in each segment. The value for each ++ segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) values where id is ++ one of V4L2_VP9_SEG_*. See :ref:`Segment Feature IDs`. ++ * - __u8 ++ - ``tree_probs[7]`` ++ - Specifies the probability values to be used when decoding a Segment-ID. ++ See '5.15. Segmentation map' section of :ref:`vp9` for more details. ++ * - __u8 ++ - ``pred_probs[3]`` ++ - Specifies the probability values to be used when decoding a ++ Predicted-Segment-ID. See '6.4.14. Get segment id syntax' ++ section of :ref:`vp9` for more details. ++ * - __u8 ++ - ``flags`` ++ - Combination of V4L2_VP9_SEGMENTATION_FLAG_* flags. See ++ :ref:`Segmentation Flags`. ++ * - __u8 ++ - ``reserved[5]`` ++ - Applications and drivers must set this to zero. ++ ++.. _vp9_segment_feature: ++ ++``Segment feature IDs`` ++ ++.. tabularcolumns:: |p{6.0cm}|p{1cm}|p{10.3cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_SEG_LVL_ALT_Q`` ++ - 0 ++ - Quantizer segment feature. ++ * - ``V4L2_VP9_SEG_LVL_ALT_L`` ++ - 1 ++ - Loop filter segment feature. ++ * - ``V4L2_VP9_SEG_LVL_REF_FRAME`` ++ - 2 ++ - Reference frame segment feature. ++ * - ``V4L2_VP9_SEG_LVL_SKIP`` ++ - 3 ++ - Skip segment feature. ++ * - ``V4L2_VP9_SEG_LVL_MAX`` ++ - 4 ++ - Number of segment features. ++ ++.. _vp9_segmentation_flags: ++ ++``Segmentation Flags`` ++ ++.. tabularcolumns:: |p{10.6cm}|p{0.8cm}|p{5.9cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_ENABLED`` ++ - 0x01 ++ - Indicates that this frame makes use of the segmentation tool. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP`` ++ - 0x02 ++ - Indicates that the segmentation map should be updated during the ++ decoding of this frame. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE`` ++ - 0x04 ++ - Indicates that the updates to the segmentation map are coded ++ relative to the existing segmentation map. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA`` ++ - 0x08 ++ - Indicates that new parameters are about to be specified for each ++ segment. ++ * - ``V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE`` ++ - 0x10 ++ - Indicates that the segmentation parameters represent the actual values ++ to be used. ++ ++.. c:type:: v4l2_vp9_quantization ++ ++Encodes the quantization parameters. See section '7.2.9 Quantization params ++syntax' of the VP9 specification for more details. ++ ++.. tabularcolumns:: |p{0.8cm}|p{4cm}|p{12.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_vp9_quantization ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __u8 ++ - ``base_q_idx`` ++ - Indicates the base frame qindex. ++ * - __s8 ++ - ``delta_q_y_dc`` ++ - Indicates the Y DC quantizer relative to base_q_idx. ++ * - __s8 ++ - ``delta_q_uv_dc`` ++ - Indicates the UV DC quantizer relative to base_q_idx. ++ * - __s8 ++ - ``delta_q_uv_ac`` ++ - Indicates the UV AC quantizer relative to base_q_idx. ++ * - __u8 ++ - ``reserved[4]`` ++ - Applications and drivers must set this to zero. ++ ++.. c:type:: v4l2_vp9_loop_filter ++ ++This structure contains all loop filter related parameters. See sections ++'7.2.8 Loop filter semantics' of the :ref:`vp9` specification for more details. ++ ++.. tabularcolumns:: |p{0.8cm}|p{4cm}|p{12.4cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct v4l2_vp9_loop_filter ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - __s8 ++ - ``ref_deltas[4]`` ++ - Contains the adjustment needed for the filter level based on the chosen ++ reference frame. ++ * - __s8 ++ - ``mode_deltas[2]`` ++ - Contains the adjustment needed for the filter level based on the chosen ++ mode. ++ * - __u8 ++ - ``level`` ++ - Indicates the loop filter strength. ++ * - __u8 ++ - ``sharpness`` ++ - Indicates the sharpness level. ++ * - __u8 ++ - ``flags`` ++ - Combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags. ++ See :ref:`Loop Filter Flags `. ++ * - __u8 ++ - ``reserved[7]`` ++ - Applications and drivers must set this to zero. ++ ++ ++.. _vp9_loop_filter_flags: ++ ++``Loop Filter Flags`` ++ ++.. tabularcolumns:: |p{9.6cm}|p{0.5cm}|p{7.2cm}| ++ ++.. flat-table:: ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 2 ++ ++ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED`` ++ - 0x1 ++ - When set, the filter level depends on the mode and reference frame used ++ to predict a block. ++ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE`` ++ - 0x2 ++ - When set, the bitstream contains additional syntax elements that ++ specify which mode and reference frame deltas are to be updated. +diff --git a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +index 0ede39907ee2..967fc803ef94 100644 +--- a/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst ++++ b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +@@ -172,6 +172,21 @@ Compressed Formats + - VP9 compressed video frame. The encoder generates one + compressed frame per buffer, and the decoder requires one + compressed frame per buffer. ++ * .. _V4L2-PIX-FMT-VP9-FRAME: ++ ++ - ``V4L2_PIX_FMT_VP9_FRAME`` ++ - 'VP9F' ++ - VP9 parsed frame, including the frame header, as extracted from the container. ++ This format is adapted for stateless video decoders that implement a ++ VP9 pipeline with the :ref:`stateless_decoder`. ++ Metadata associated with the frame to decode is required to be passed ++ through the ``V4L2_CID_STATELESS_VP9_FRAME`` and ++ the ``V4L2_CID_STATELESS_VP9_COMPRESSED_HDR`` controls. ++ See the :ref:`associated Codec Control IDs `. ++ Exactly one output and one capture buffer must be provided for use with ++ this pixel format. The output buffer must contain the appropriate number ++ of macroblocks to decode a full corresponding frame to the matching ++ capture buffer. + * .. _V4L2-PIX-FMT-HEVC: + + - ``V4L2_PIX_FMT_HEVC`` +diff --git a/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst b/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +index fdde0ae6d521..29971a45a2d4 100644 +--- a/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst ++++ b/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +@@ -233,6 +233,14 @@ still cause this situation. + - ``p_mpeg2_quantisation`` + - A pointer to a struct :c:type:`v4l2_ctrl_mpeg2_quantisation`. Valid if this control is + of type ``V4L2_CTRL_TYPE_MPEG2_QUANTISATION``. ++ * - struct :c:type:`v4l2_ctrl_vp9_compressed_hdr` * ++ - ``p_vp9_compressed_hdr_probs`` ++ - A pointer to a struct :c:type:`v4l2_ctrl_vp9_compressed_hdr`. Valid if this ++ control is of type ``V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR``. ++ * - struct :c:type:`v4l2_ctrl_vp9_frame` * ++ - ``p_vp9_frame`` ++ - A pointer to a struct :c:type:`v4l2_ctrl_vp9_frame`. Valid if this ++ control is of type ``V4L2_CTRL_TYPE_VP9_FRAME``. + * - struct :c:type:`v4l2_ctrl_hdr10_cll_info` * + - ``p_hdr10_cll`` + - A pointer to a struct :c:type:`v4l2_ctrl_hdr10_cll_info`. Valid if this control is +diff --git a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +index 2f491c17dd5d..88f630252d98 100644 +--- a/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst ++++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +@@ -513,6 +513,18 @@ See also the examples in :ref:`control`. + - n/a + - A struct :c:type:`v4l2_ctrl_hevc_decode_params`, containing HEVC + decoding parameters for stateless video decoders. ++ * - ``V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR`` ++ - n/a ++ - n/a ++ - n/a ++ - A struct :c:type:`v4l2_ctrl_vp9_compressed_hdr`, containing VP9 ++ probabilities updates for stateless video decoders. ++ * - ``V4L2_CTRL_TYPE_VP9_FRAME`` ++ - n/a ++ - n/a ++ - n/a ++ - A struct :c:type:`v4l2_ctrl_vp9_frame`, containing VP9 ++ frame decode parameters for stateless video decoders. + + .. raw:: latex + +diff --git a/Documentation/userspace-api/media/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/videodev2.h.rst.exceptions +index eb0b1cd37abd..9cbb7a0c354a 100644 +--- a/Documentation/userspace-api/media/videodev2.h.rst.exceptions ++++ b/Documentation/userspace-api/media/videodev2.h.rst.exceptions +@@ -149,6 +149,8 @@ replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_FWHT_PARAMS :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_VP8_FRAME :c:type:`v4l2_ctrl_type` ++replace symbol V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR :c:type:`v4l2_ctrl_type` ++replace symbol V4L2_CTRL_TYPE_VP9_FRAME :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_HDR10_CLL_INFO :c:type:`v4l2_ctrl_type` + replace symbol V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY :c:type:`v4l2_ctrl_type` + +diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c +index 70adfc1b9c81..54abe5245dcc 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls-core.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c +@@ -283,6 +283,12 @@ static void std_log(const struct v4l2_ctrl *ctrl) + case V4L2_CTRL_TYPE_MPEG2_PICTURE: + pr_cont("MPEG2_PICTURE"); + break; ++ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR: ++ pr_cont("VP9_COMPRESSED_HDR"); ++ break; ++ case V4L2_CTRL_TYPE_VP9_FRAME: ++ pr_cont("VP9_FRAME"); ++ break; + default: + pr_cont("unknown type %d", ctrl->type); + break; +@@ -317,6 +323,168 @@ static void std_log(const struct v4l2_ctrl *ctrl) + #define zero_reserved(s) \ + memset(&(s).reserved, 0, sizeof((s).reserved)) + ++static int ++validate_vp9_lf_params(struct v4l2_vp9_loop_filter *lf) ++{ ++ unsigned int i; ++ ++ if (lf->flags & ~(V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED | ++ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE)) ++ return -EINVAL; ++ ++ /* That all values are in the accepted range. */ ++ if (lf->level > GENMASK(5, 0)) ++ return -EINVAL; ++ ++ if (lf->sharpness > GENMASK(2, 0)) ++ return -EINVAL; ++ ++ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) ++ if (lf->ref_deltas[i] < -63 || lf->ref_deltas[i] > 63) ++ return -EINVAL; ++ ++ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) ++ if (lf->mode_deltas[i] < -63 || lf->mode_deltas[i] > 63) ++ return -EINVAL; ++ ++ zero_reserved(*lf); ++ return 0; ++} ++ ++static int ++validate_vp9_quant_params(struct v4l2_vp9_quantization *quant) ++{ ++ if (quant->delta_q_y_dc < -15 || quant->delta_q_y_dc > 15 || ++ quant->delta_q_uv_dc < -15 || quant->delta_q_uv_dc > 15 || ++ quant->delta_q_uv_ac < -15 || quant->delta_q_uv_ac > 15) ++ return -EINVAL; ++ ++ zero_reserved(*quant); ++ return 0; ++} ++ ++static int ++validate_vp9_seg_params(struct v4l2_vp9_segmentation *seg) ++{ ++ unsigned int i, j; ++ ++ if (seg->flags & ~(V4L2_VP9_SEGMENTATION_FLAG_ENABLED | ++ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP | ++ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE | ++ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA | ++ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) ++ return -EINVAL; ++ ++ for (i = 0; i < ARRAY_SIZE(seg->feature_enabled); i++) { ++ if (seg->feature_enabled[i] & ++ ~V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK) ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(seg->feature_data); i++) { ++ const int range[] = { 255, 63, 3, 0 }; ++ ++ for (j = 0; j < ARRAY_SIZE(seg->feature_data[j]); j++) { ++ if (seg->feature_data[i][j] < -range[j] || ++ seg->feature_data[i][j] > range[j]) ++ return -EINVAL; ++ } ++ } ++ ++ zero_reserved(*seg); ++ return 0; ++} ++ ++static int ++validate_vp9_compressed_hdr(struct v4l2_ctrl_vp9_compressed_hdr *hdr) ++{ ++ if (hdr->tx_mode > V4L2_VP9_TX_MODE_SELECT) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int ++validate_vp9_frame(struct v4l2_ctrl_vp9_frame *frame) ++{ ++ int ret; ++ ++ /* Make sure we're not passed invalid flags. */ ++ if (frame->flags & ~(V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_SHOW_FRAME | ++ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY | ++ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV | ++ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX | ++ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE | ++ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING | ++ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING | ++ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING)) ++ return -EINVAL; ++ ++ if (frame->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT && ++ frame->flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX) ++ return -EINVAL; ++ ++ if (frame->profile > V4L2_VP9_PROFILE_MAX) ++ return -EINVAL; ++ ++ if (frame->reset_frame_context > V4L2_VP9_RESET_FRAME_CTX_ALL) ++ return -EINVAL; ++ ++ if (frame->frame_context_idx >= V4L2_VP9_NUM_FRAME_CTX) ++ return -EINVAL; ++ ++ /* ++ * Profiles 0 and 1 only support 8-bit depth, profiles 2 and 3 only 10 ++ * and 12 bit depths. ++ */ ++ if ((frame->profile < 2 && frame->bit_depth != 8) || ++ (frame->profile >= 2 && ++ (frame->bit_depth != 10 && frame->bit_depth != 12))) ++ return -EINVAL; ++ ++ /* Profile 0 and 2 only accept YUV 4:2:0. */ ++ if ((frame->profile == 0 || frame->profile == 2) && ++ (!(frame->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) || ++ !(frame->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) ++ return -EINVAL; ++ ++ /* Profile 1 and 3 only accept YUV 4:2:2, 4:4:0 and 4:4:4. */ ++ if ((frame->profile == 1 || frame->profile == 3) && ++ ((frame->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) && ++ (frame->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) ++ return -EINVAL; ++ ++ if (frame->interpolation_filter > V4L2_VP9_INTERP_FILTER_SWITCHABLE) ++ return -EINVAL; ++ ++ /* ++ * According to the spec, tile_cols_log2 shall be less than or equal ++ * to 6. ++ */ ++ if (frame->tile_cols_log2 > 6) ++ return -EINVAL; ++ ++ if (frame->reference_mode > V4L2_VP9_REFERENCE_MODE_SELECT) ++ return -EINVAL; ++ ++ ret = validate_vp9_lf_params(&frame->lf); ++ if (ret) ++ return ret; ++ ++ ret = validate_vp9_quant_params(&frame->quant); ++ if (ret) ++ return ret; ++ ++ ret = validate_vp9_seg_params(&frame->seg); ++ if (ret) ++ return ret; ++ ++ zero_reserved(*frame); ++ return 0; ++} ++ + /* + * Compound controls validation requires setting unused fields/flags to zero + * in order to properly detect unchanged controls with std_equal's memcmp. +@@ -690,6 +858,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, + case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX: + break; + ++ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR: ++ return validate_vp9_compressed_hdr(p); ++ ++ case V4L2_CTRL_TYPE_VP9_FRAME: ++ return validate_vp9_frame(p); ++ + case V4L2_CTRL_TYPE_AREA: + area = p; + if (!area->width || !area->height) +@@ -1255,6 +1429,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, + case V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY: + elem_size = sizeof(struct v4l2_ctrl_hdr10_mastering_display); + break; ++ case V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR: ++ elem_size = sizeof(struct v4l2_ctrl_vp9_compressed_hdr); ++ break; ++ case V4L2_CTRL_TYPE_VP9_FRAME: ++ elem_size = sizeof(struct v4l2_ctrl_vp9_frame); ++ break; + case V4L2_CTRL_TYPE_AREA: + elem_size = sizeof(struct v4l2_area); + break; +diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c +index ebe82b6ba6e6..23594568b985 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c +@@ -1177,6 +1177,8 @@ const char *v4l2_ctrl_get_name(u32 id) + case V4L2_CID_STATELESS_MPEG2_SEQUENCE: return "MPEG-2 Sequence Header"; + case V4L2_CID_STATELESS_MPEG2_PICTURE: return "MPEG-2 Picture Header"; + case V4L2_CID_STATELESS_MPEG2_QUANTISATION: return "MPEG-2 Quantisation Matrices"; ++ case V4L2_CID_STATELESS_VP9_COMPRESSED_HDR: return "VP9 Probabilities Updates"; ++ case V4L2_CID_STATELESS_VP9_FRAME: return "VP9 Frame Decode Parameters"; + + /* Colorimetry controls */ + /* Keep the order of the 'case's the same as in v4l2-controls.h! */ +@@ -1498,6 +1500,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, + case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS: + *type = V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS; + break; ++ case V4L2_CID_STATELESS_VP9_COMPRESSED_HDR: ++ *type = V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR; ++ break; ++ case V4L2_CID_STATELESS_VP9_FRAME: ++ *type = V4L2_CTRL_TYPE_VP9_FRAME; ++ break; + case V4L2_CID_UNIT_CELL_SIZE: + *type = V4L2_CTRL_TYPE_AREA; + *flags |= V4L2_CTRL_FLAG_READ_ONLY; +diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c +index 31d0109ce5a8..51289d4741dc 100644 +--- a/drivers/media/v4l2-core/v4l2-ioctl.c ++++ b/drivers/media/v4l2-core/v4l2-ioctl.c +@@ -1413,6 +1413,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) + case V4L2_PIX_FMT_VP8: descr = "VP8"; break; + case V4L2_PIX_FMT_VP8_FRAME: descr = "VP8 Frame"; break; + case V4L2_PIX_FMT_VP9: descr = "VP9"; break; ++ case V4L2_PIX_FMT_VP9_FRAME: descr = "VP9 Frame"; break; + case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break; /* aka H.265 */ + case V4L2_PIX_FMT_HEVC_SLICE: descr = "HEVC Parsed Slice Data"; break; + case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */ +diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h +index 575b59fbac77..b3ce438f1329 100644 +--- a/include/media/v4l2-ctrls.h ++++ b/include/media/v4l2-ctrls.h +@@ -50,6 +50,8 @@ struct video_device; + * @p_h264_decode_params: Pointer to a struct v4l2_ctrl_h264_decode_params. + * @p_h264_pred_weights: Pointer to a struct v4l2_ctrl_h264_pred_weights. + * @p_vp8_frame: Pointer to a VP8 frame params structure. ++ * @p_vp9_compressed_hdr_probs: Pointer to a VP9 frame compressed header probs structure. ++ * @p_vp9_frame: Pointer to a VP9 frame params structure. + * @p_hevc_sps: Pointer to an HEVC sequence parameter set structure. + * @p_hevc_pps: Pointer to an HEVC picture parameter set structure. + * @p_hevc_slice_params: Pointer to an HEVC slice parameters structure. +@@ -80,6 +82,8 @@ union v4l2_ctrl_ptr { + struct v4l2_ctrl_hevc_sps *p_hevc_sps; + struct v4l2_ctrl_hevc_pps *p_hevc_pps; + struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params; ++ struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; ++ struct v4l2_ctrl_vp9_frame *p_vp9_frame; + struct v4l2_ctrl_hdr10_cll_info *p_hdr10_cll; + struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; + struct v4l2_area *p_area; +diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h +index 5fea5feb0412..f859b73f0490 100644 +--- a/include/uapi/linux/v4l2-controls.h ++++ b/include/uapi/linux/v4l2-controls.h +@@ -2016,6 +2016,290 @@ struct v4l2_ctrl_hdr10_mastering_display { + __u32 min_display_mastering_luminance; + }; + ++/* Stateless VP9 controls */ ++ ++#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 ++#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 ++ ++/** ++ * struct v4l2_vp9_loop_filter - VP9 loop filter parameters ++ * ++ * @ref_deltas: contains the adjustment needed for the filter level based on the ++ * chosen reference frame. If this syntax element is not present in the bitstream, ++ * users should pass its last value. ++ * @mode_deltas: contains the adjustment needed for the filter level based on the ++ * chosen mode. If this syntax element is not present in the bitstream, users should ++ * pass its last value. ++ * @level: indicates the loop filter strength. ++ * @sharpness: indicates the sharpness level. ++ * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. ++ * @reserved: padding field. Should be zeroed by applications. ++ * ++ * This structure contains all loop filter related parameters. See sections ++ * '7.2.8 Loop filter semantics' of the VP9 specification for more details. ++ */ ++struct v4l2_vp9_loop_filter { ++ __s8 ref_deltas[4]; ++ __s8 mode_deltas[2]; ++ __u8 level; ++ __u8 sharpness; ++ __u8 flags; ++ __u8 reserved[7]; ++}; ++ ++/** ++ * struct v4l2_vp9_quantization - VP9 quantization parameters ++ * ++ * @base_q_idx: indicates the base frame qindex. ++ * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. ++ * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. ++ * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. ++ * @reserved: padding field. Should be zeroed by applications. ++ * ++ * Encodes the quantization parameters. See section '7.2.9 Quantization params ++ * syntax' of the VP9 specification for more details. ++ */ ++struct v4l2_vp9_quantization { ++ __u8 base_q_idx; ++ __s8 delta_q_y_dc; ++ __s8 delta_q_uv_dc; ++ __s8 delta_q_uv_ac; ++ __u8 reserved[4]; ++}; ++ ++#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 ++#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 ++#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 ++#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 ++#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 ++ ++#define V4L2_VP9_SEG_LVL_ALT_Q 0 ++#define V4L2_VP9_SEG_LVL_ALT_L 1 ++#define V4L2_VP9_SEG_LVL_REF_FRAME 2 ++#define V4L2_VP9_SEG_LVL_SKIP 3 ++#define V4L2_VP9_SEG_LVL_MAX 4 ++ ++#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) ++#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf ++ ++/** ++ * struct v4l2_vp9_segmentation - VP9 segmentation parameters ++ * ++ * @feature_data: data attached to each feature. Data entry is only valid if ++ * the feature is enabled. The array shall be indexed with segment number as ++ * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. ++ * @feature_enabled: bitmask defining which features are enabled in each segment. ++ * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) ++ * values where id is one of V4L2_VP9_SEG_LVL_{}. ++ * @tree_probs: specifies the probability values to be used when decoding a ++ * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification ++ * for more details. ++ * @pred_probs: specifies the probability values to be used when decoding a ++ * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` ++ * for more details. ++ * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. ++ * @reserved: padding field. Should be zeroed by applications. ++ * ++ * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of ++ * the VP9 specification for more details. ++ */ ++struct v4l2_vp9_segmentation { ++ __s16 feature_data[8][4]; ++ __u8 feature_enabled[8]; ++ __u8 tree_probs[7]; ++ __u8 pred_probs[3]; ++ __u8 flags; ++ __u8 reserved[5]; ++}; ++ ++#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 ++#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 ++#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 ++#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 ++#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 ++#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 ++#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 ++#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 ++#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 ++#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 ++ ++#define V4L2_VP9_SIGN_BIAS_LAST 0x1 ++#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 ++#define V4L2_VP9_SIGN_BIAS_ALT 0x4 ++ ++#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 ++#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 ++#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 ++ ++#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 ++#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 ++#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 ++#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 ++#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 ++ ++#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 ++#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 ++#define V4L2_VP9_REFERENCE_MODE_SELECT 2 ++ ++#define V4L2_VP9_PROFILE_MAX 3 ++ ++#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) ++/** ++ * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control ++ * ++ * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. ++ * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. ++ * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. ++ * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. ++ * @compressed_header_size: compressed header size in bytes. ++ * @uncompressed_header_size: uncompressed header size in bytes. ++ * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. ++ * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. ++ * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in ++ * pixels. This is not used during the decoding process but might be used by HW scalers ++ * to prepare a frame that's ready for scanout. ++ * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in ++ * pixels. This is not used during the decoding process but might be used by HW scalers ++ * to prepare a frame that's ready for scanout. ++ * @last_frame_ts: "last" reference buffer timestamp. ++ * The timestamp refers to the timestamp field in struct v4l2_buffer. ++ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. ++ * @golden_frame_ts: "golden" reference buffer timestamp. ++ * The timestamp refers to the timestamp field in struct v4l2_buffer. ++ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. ++ * @alt_frame_ts: "alt" reference buffer timestamp. ++ * The timestamp refers to the timestamp field in struct v4l2_buffer. ++ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. ++ * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given ++ * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. ++ * @reset_frame_context: specifies whether the frame context should be reset to default values. ++ * Either of V4L2_VP9_RESET_FRAME_CTX_{}. ++ * @frame_context_idx: frame context that should be used/updated. ++ * @profile: VP9 profile. Can be 0, 1, 2 or 3. ++ * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support ++ * 10 and/or 12 bits depths. ++ * @interpolation_filter: specifies the filter selection used for performing inter prediction. ++ * Set to one of V4L2_VP9_INTERP_FILTER_{}. ++ * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width ++ * is measured in units of 8x8 blocks). Shall be less than or equal to 6. ++ * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height ++ * is measured in units of 8x8 blocks). ++ * @reference_mode: specifies the type of inter prediction to be used. ++ * Set to one of V4L2_VP9_REFERENCE_MODE_{}. ++ * @reserved: padding field. Should be zeroed by applications. ++ */ ++struct v4l2_ctrl_vp9_frame { ++ struct v4l2_vp9_loop_filter lf; ++ struct v4l2_vp9_quantization quant; ++ struct v4l2_vp9_segmentation seg; ++ __u32 flags; ++ __u16 compressed_header_size; ++ __u16 uncompressed_header_size; ++ __u16 frame_width_minus_1; ++ __u16 frame_height_minus_1; ++ __u16 render_width_minus_1; ++ __u16 render_height_minus_1; ++ __u64 last_frame_ts; ++ __u64 golden_frame_ts; ++ __u64 alt_frame_ts; ++ __u8 ref_frame_sign_bias; ++ __u8 reset_frame_context; ++ __u8 frame_context_idx; ++ __u8 profile; ++ __u8 bit_depth; ++ __u8 interpolation_filter; ++ __u8 tile_cols_log2; ++ __u8 tile_rows_log2; ++ __u8 reference_mode; ++ __u8 reserved[7]; ++}; ++ ++#define V4L2_VP9_NUM_FRAME_CTX 4 ++ ++/** ++ * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates ++ * @joint: motion vector joint probability updates. ++ * @sign: motion vector sign probability updates. ++ * @classes: motion vector class probability updates. ++ * @class0_bit: motion vector class0 bit probability updates. ++ * @bits: motion vector bits probability updates. ++ * @class0_fr: motion vector class0 fractional bit probability updates. ++ * @fr: motion vector fractional bit probability updates. ++ * @class0_hp: motion vector class0 high precision fractional bit probability updates. ++ * @hp: motion vector high precision fractional bit probability updates. ++ * ++ * This structure contains new values of motion vector probabilities. ++ * A value of zero in an array element means there is no update of the relevant probability. ++ * See `struct v4l2_vp9_prob_updates` for details. ++ */ ++struct v4l2_vp9_mv_probs { ++ __u8 joint[3]; ++ __u8 sign[2]; ++ __u8 classes[2][10]; ++ __u8 class0_bit[2]; ++ __u8 bits[2][10]; ++ __u8 class0_fr[2][2][3]; ++ __u8 fr[2][3]; ++ __u8 class0_hp[2]; ++ __u8 hp[2]; ++}; ++ ++#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) ++ ++#define V4L2_VP9_TX_MODE_ONLY_4X4 0 ++#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 ++#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 ++#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 ++#define V4L2_VP9_TX_MODE_SELECT 4 ++ ++/** ++ * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control ++ * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. ++ * @tx8: TX 8x8 probability updates. ++ * @tx16: TX 16x16 probability updates. ++ * @tx32: TX 32x32 probability updates. ++ * @coef: coefficient probability updates. ++ * @skip: skip probability updates. ++ * @inter_mode: inter mode probability updates. ++ * @interp_filter: interpolation filter probability updates. ++ * @is_inter: is inter-block probability updates. ++ * @comp_mode: compound prediction mode probability updates. ++ * @single_ref: single ref probability updates. ++ * @comp_ref: compound ref probability updates. ++ * @y_mode: Y prediction mode probability updates. ++ * @uv_mode: UV prediction mode probability updates. ++ * @partition: partition probability updates. ++ * @mv: motion vector probability updates. ++ * ++ * This structure holds the probabilities update as parsed in the compressed ++ * header (Spec 6.3). These values represent the value of probability update after ++ * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element ++ * means that there is no update of the relevant probability. ++ * ++ * This control is optional and needs to be used when dealing with the hardware which is ++ * not capable of parsing the compressed header itself. Only drivers which need it will ++ * implement it. ++ */ ++struct v4l2_ctrl_vp9_compressed_hdr { ++ __u8 tx_mode; ++ __u8 tx8[2][1]; ++ __u8 tx16[2][2]; ++ __u8 tx32[2][3]; ++ __u8 coef[4][2][2][6][6][3]; ++ __u8 skip[3]; ++ __u8 inter_mode[7][3]; ++ __u8 interp_filter[4][2]; ++ __u8 is_inter[4]; ++ __u8 comp_mode[5]; ++ __u8 single_ref[5][2]; ++ __u8 comp_ref[5]; ++ __u8 y_mode[4][9]; ++ __u8 uv_mode[10][9]; ++ __u8 partition[16][3]; ++ ++ struct v4l2_vp9_mv_probs mv; ++}; ++ + /* MPEG-compression definitions kept for backwards compatibility */ + #ifndef __KERNEL__ + #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC +diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h +index f118fe7a9f58..df8b9c486ba1 100644 +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -703,6 +703,7 @@ struct v4l2_pix_format { + #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ + #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ + #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ ++#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ + #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ + #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ + #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ +@@ -1759,6 +1760,8 @@ struct v4l2_ext_control { + struct v4l2_ctrl_mpeg2_sequence __user *p_mpeg2_sequence; + struct v4l2_ctrl_mpeg2_picture __user *p_mpeg2_picture; + struct v4l2_ctrl_mpeg2_quantisation __user *p_mpeg2_quantisation; ++ struct v4l2_ctrl_vp9_compressed_hdr __user *p_vp9_compressed_hdr_probs; ++ struct v4l2_ctrl_vp9_frame __user *p_vp9_frame; + void __user *ptr; + }; + } __attribute__ ((packed)); +@@ -1823,6 +1826,9 @@ enum v4l2_ctrl_type { + V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, + V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, + V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, ++ ++ V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, ++ V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, + }; + + /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:36 +0100 +Subject: [PATCH] media: Add VP9 v4l2 library + +Provide code common to vp9 drivers in one central location. + +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +--- + drivers/media/v4l2-core/Kconfig | 4 + + drivers/media/v4l2-core/Makefile | 1 + + drivers/media/v4l2-core/v4l2-vp9.c | 1850 ++++++++++++++++++++++++++++ + include/media/v4l2-vp9.h | 233 ++++ + 4 files changed, 2088 insertions(+) + create mode 100644 drivers/media/v4l2-core/v4l2-vp9.c + create mode 100644 include/media/v4l2-vp9.h + +diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig +index 02dc1787e953..6ee75c6c820e 100644 +--- a/drivers/media/v4l2-core/Kconfig ++++ b/drivers/media/v4l2-core/Kconfig +@@ -52,6 +52,10 @@ config V4L2_JPEG_HELPER + config V4L2_H264 + tristate + ++# Used by drivers that need v4l2-vp9.ko ++config V4L2_VP9 ++ tristate ++ + # Used by drivers that need v4l2-mem2mem.ko + config V4L2_MEM2MEM_DEV + tristate +diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile +index 66a78c556c98..83fac5c746f5 100644 +--- a/drivers/media/v4l2-core/Makefile ++++ b/drivers/media/v4l2-core/Makefile +@@ -24,6 +24,7 @@ obj-$(CONFIG_VIDEO_TUNER) += tuner.o + + obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o + obj-$(CONFIG_V4L2_H264) += v4l2-h264.o ++obj-$(CONFIG_V4L2_VP9) += v4l2-vp9.o + + obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o + +diff --git a/drivers/media/v4l2-core/v4l2-vp9.c b/drivers/media/v4l2-core/v4l2-vp9.c +new file mode 100644 +index 000000000000..859589f1fd35 +--- /dev/null ++++ b/drivers/media/v4l2-core/v4l2-vp9.c +@@ -0,0 +1,1850 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * V4L2 VP9 helpers. ++ * ++ * Copyright (C) 2021 Collabora, Ltd. ++ * ++ * Author: Andrzej Pietrasiewicz ++ */ ++ ++#include ++ ++#include ++ ++const u8 v4l2_vp9_kf_y_mode_prob[10][10][9] = { ++ { ++ /* above = dc */ ++ { 137, 30, 42, 148, 151, 207, 70, 52, 91 }, /*left = dc */ ++ { 92, 45, 102, 136, 116, 180, 74, 90, 100 }, /*left = v */ ++ { 73, 32, 19, 187, 222, 215, 46, 34, 100 }, /*left = h */ ++ { 91, 30, 32, 116, 121, 186, 93, 86, 94 }, /*left = d45 */ ++ { 72, 35, 36, 149, 68, 206, 68, 63, 105 }, /*left = d135*/ ++ { 73, 31, 28, 138, 57, 124, 55, 122, 151 }, /*left = d117*/ ++ { 67, 23, 21, 140, 126, 197, 40, 37, 171 }, /*left = d153*/ ++ { 86, 27, 28, 128, 154, 212, 45, 43, 53 }, /*left = d207*/ ++ { 74, 32, 27, 107, 86, 160, 63, 134, 102 }, /*left = d63 */ ++ { 59, 67, 44, 140, 161, 202, 78, 67, 119 }, /*left = tm */ ++ }, { /* above = v */ ++ { 63, 36, 126, 146, 123, 158, 60, 90, 96 }, /*left = dc */ ++ { 43, 46, 168, 134, 107, 128, 69, 142, 92 }, /*left = v */ ++ { 44, 29, 68, 159, 201, 177, 50, 57, 77 }, /*left = h */ ++ { 58, 38, 76, 114, 97, 172, 78, 133, 92 }, /*left = d45 */ ++ { 46, 41, 76, 140, 63, 184, 69, 112, 57 }, /*left = d135*/ ++ { 38, 32, 85, 140, 46, 112, 54, 151, 133 }, /*left = d117*/ ++ { 39, 27, 61, 131, 110, 175, 44, 75, 136 }, /*left = d153*/ ++ { 52, 30, 74, 113, 130, 175, 51, 64, 58 }, /*left = d207*/ ++ { 47, 35, 80, 100, 74, 143, 64, 163, 74 }, /*left = d63 */ ++ { 36, 61, 116, 114, 128, 162, 80, 125, 82 }, /*left = tm */ ++ }, { /* above = h */ ++ { 82, 26, 26, 171, 208, 204, 44, 32, 105 }, /*left = dc */ ++ { 55, 44, 68, 166, 179, 192, 57, 57, 108 }, /*left = v */ ++ { 42, 26, 11, 199, 241, 228, 23, 15, 85 }, /*left = h */ ++ { 68, 42, 19, 131, 160, 199, 55, 52, 83 }, /*left = d45 */ ++ { 58, 50, 25, 139, 115, 232, 39, 52, 118 }, /*left = d135*/ ++ { 50, 35, 33, 153, 104, 162, 64, 59, 131 }, /*left = d117*/ ++ { 44, 24, 16, 150, 177, 202, 33, 19, 156 }, /*left = d153*/ ++ { 55, 27, 12, 153, 203, 218, 26, 27, 49 }, /*left = d207*/ ++ { 53, 49, 21, 110, 116, 168, 59, 80, 76 }, /*left = d63 */ ++ { 38, 72, 19, 168, 203, 212, 50, 50, 107 }, /*left = tm */ ++ }, { /* above = d45 */ ++ { 103, 26, 36, 129, 132, 201, 83, 80, 93 }, /*left = dc */ ++ { 59, 38, 83, 112, 103, 162, 98, 136, 90 }, /*left = v */ ++ { 62, 30, 23, 158, 200, 207, 59, 57, 50 }, /*left = h */ ++ { 67, 30, 29, 84, 86, 191, 102, 91, 59 }, /*left = d45 */ ++ { 60, 32, 33, 112, 71, 220, 64, 89, 104 }, /*left = d135*/ ++ { 53, 26, 34, 130, 56, 149, 84, 120, 103 }, /*left = d117*/ ++ { 53, 21, 23, 133, 109, 210, 56, 77, 172 }, /*left = d153*/ ++ { 77, 19, 29, 112, 142, 228, 55, 66, 36 }, /*left = d207*/ ++ { 61, 29, 29, 93, 97, 165, 83, 175, 162 }, /*left = d63 */ ++ { 47, 47, 43, 114, 137, 181, 100, 99, 95 }, /*left = tm */ ++ }, { /* above = d135 */ ++ { 69, 23, 29, 128, 83, 199, 46, 44, 101 }, /*left = dc */ ++ { 53, 40, 55, 139, 69, 183, 61, 80, 110 }, /*left = v */ ++ { 40, 29, 19, 161, 180, 207, 43, 24, 91 }, /*left = h */ ++ { 60, 34, 19, 105, 61, 198, 53, 64, 89 }, /*left = d45 */ ++ { 52, 31, 22, 158, 40, 209, 58, 62, 89 }, /*left = d135*/ ++ { 44, 31, 29, 147, 46, 158, 56, 102, 198 }, /*left = d117*/ ++ { 35, 19, 12, 135, 87, 209, 41, 45, 167 }, /*left = d153*/ ++ { 55, 25, 21, 118, 95, 215, 38, 39, 66 }, /*left = d207*/ ++ { 51, 38, 25, 113, 58, 164, 70, 93, 97 }, /*left = d63 */ ++ { 47, 54, 34, 146, 108, 203, 72, 103, 151 }, /*left = tm */ ++ }, { /* above = d117 */ ++ { 64, 19, 37, 156, 66, 138, 49, 95, 133 }, /*left = dc */ ++ { 46, 27, 80, 150, 55, 124, 55, 121, 135 }, /*left = v */ ++ { 36, 23, 27, 165, 149, 166, 54, 64, 118 }, /*left = h */ ++ { 53, 21, 36, 131, 63, 163, 60, 109, 81 }, /*left = d45 */ ++ { 40, 26, 35, 154, 40, 185, 51, 97, 123 }, /*left = d135*/ ++ { 35, 19, 34, 179, 19, 97, 48, 129, 124 }, /*left = d117*/ ++ { 36, 20, 26, 136, 62, 164, 33, 77, 154 }, /*left = d153*/ ++ { 45, 18, 32, 130, 90, 157, 40, 79, 91 }, /*left = d207*/ ++ { 45, 26, 28, 129, 45, 129, 49, 147, 123 }, /*left = d63 */ ++ { 38, 44, 51, 136, 74, 162, 57, 97, 121 }, /*left = tm */ ++ }, { /* above = d153 */ ++ { 75, 17, 22, 136, 138, 185, 32, 34, 166 }, /*left = dc */ ++ { 56, 39, 58, 133, 117, 173, 48, 53, 187 }, /*left = v */ ++ { 35, 21, 12, 161, 212, 207, 20, 23, 145 }, /*left = h */ ++ { 56, 29, 19, 117, 109, 181, 55, 68, 112 }, /*left = d45 */ ++ { 47, 29, 17, 153, 64, 220, 59, 51, 114 }, /*left = d135*/ ++ { 46, 16, 24, 136, 76, 147, 41, 64, 172 }, /*left = d117*/ ++ { 34, 17, 11, 108, 152, 187, 13, 15, 209 }, /*left = d153*/ ++ { 51, 24, 14, 115, 133, 209, 32, 26, 104 }, /*left = d207*/ ++ { 55, 30, 18, 122, 79, 179, 44, 88, 116 }, /*left = d63 */ ++ { 37, 49, 25, 129, 168, 164, 41, 54, 148 }, /*left = tm */ ++ }, { /* above = d207 */ ++ { 82, 22, 32, 127, 143, 213, 39, 41, 70 }, /*left = dc */ ++ { 62, 44, 61, 123, 105, 189, 48, 57, 64 }, /*left = v */ ++ { 47, 25, 17, 175, 222, 220, 24, 30, 86 }, /*left = h */ ++ { 68, 36, 17, 106, 102, 206, 59, 74, 74 }, /*left = d45 */ ++ { 57, 39, 23, 151, 68, 216, 55, 63, 58 }, /*left = d135*/ ++ { 49, 30, 35, 141, 70, 168, 82, 40, 115 }, /*left = d117*/ ++ { 51, 25, 15, 136, 129, 202, 38, 35, 139 }, /*left = d153*/ ++ { 68, 26, 16, 111, 141, 215, 29, 28, 28 }, /*left = d207*/ ++ { 59, 39, 19, 114, 75, 180, 77, 104, 42 }, /*left = d63 */ ++ { 40, 61, 26, 126, 152, 206, 61, 59, 93 }, /*left = tm */ ++ }, { /* above = d63 */ ++ { 78, 23, 39, 111, 117, 170, 74, 124, 94 }, /*left = dc */ ++ { 48, 34, 86, 101, 92, 146, 78, 179, 134 }, /*left = v */ ++ { 47, 22, 24, 138, 187, 178, 68, 69, 59 }, /*left = h */ ++ { 56, 25, 33, 105, 112, 187, 95, 177, 129 }, /*left = d45 */ ++ { 48, 31, 27, 114, 63, 183, 82, 116, 56 }, /*left = d135*/ ++ { 43, 28, 37, 121, 63, 123, 61, 192, 169 }, /*left = d117*/ ++ { 42, 17, 24, 109, 97, 177, 56, 76, 122 }, /*left = d153*/ ++ { 58, 18, 28, 105, 139, 182, 70, 92, 63 }, /*left = d207*/ ++ { 46, 23, 32, 74, 86, 150, 67, 183, 88 }, /*left = d63 */ ++ { 36, 38, 48, 92, 122, 165, 88, 137, 91 }, /*left = tm */ ++ }, { /* above = tm */ ++ { 65, 70, 60, 155, 159, 199, 61, 60, 81 }, /*left = dc */ ++ { 44, 78, 115, 132, 119, 173, 71, 112, 93 }, /*left = v */ ++ { 39, 38, 21, 184, 227, 206, 42, 32, 64 }, /*left = h */ ++ { 58, 47, 36, 124, 137, 193, 80, 82, 78 }, /*left = d45 */ ++ { 49, 50, 35, 144, 95, 205, 63, 78, 59 }, /*left = d135*/ ++ { 41, 53, 52, 148, 71, 142, 65, 128, 51 }, /*left = d117*/ ++ { 40, 36, 28, 143, 143, 202, 40, 55, 137 }, /*left = d153*/ ++ { 52, 34, 29, 129, 183, 227, 42, 35, 43 }, /*left = d207*/ ++ { 42, 44, 44, 104, 105, 164, 64, 130, 80 }, /*left = d63 */ ++ { 43, 81, 53, 140, 169, 204, 68, 84, 72 }, /*left = tm */ ++ } ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_kf_y_mode_prob); ++ ++const u8 v4l2_vp9_kf_partition_probs[16][3] = { ++ /* 8x8 -> 4x4 */ ++ { 158, 97, 94 }, /* a/l both not split */ ++ { 93, 24, 99 }, /* a split, l not split */ ++ { 85, 119, 44 }, /* l split, a not split */ ++ { 62, 59, 67 }, /* a/l both split */ ++ /* 16x16 -> 8x8 */ ++ { 149, 53, 53 }, /* a/l both not split */ ++ { 94, 20, 48 }, /* a split, l not split */ ++ { 83, 53, 24 }, /* l split, a not split */ ++ { 52, 18, 18 }, /* a/l both split */ ++ /* 32x32 -> 16x16 */ ++ { 150, 40, 39 }, /* a/l both not split */ ++ { 78, 12, 26 }, /* a split, l not split */ ++ { 67, 33, 11 }, /* l split, a not split */ ++ { 24, 7, 5 }, /* a/l both split */ ++ /* 64x64 -> 32x32 */ ++ { 174, 35, 49 }, /* a/l both not split */ ++ { 68, 11, 27 }, /* a split, l not split */ ++ { 57, 15, 9 }, /* l split, a not split */ ++ { 12, 3, 3 }, /* a/l both split */ ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_kf_partition_probs); ++ ++const u8 v4l2_vp9_kf_uv_mode_prob[10][9] = { ++ { 144, 11, 54, 157, 195, 130, 46, 58, 108 }, /* y = dc */ ++ { 118, 15, 123, 148, 131, 101, 44, 93, 131 }, /* y = v */ ++ { 113, 12, 23, 188, 226, 142, 26, 32, 125 }, /* y = h */ ++ { 120, 11, 50, 123, 163, 135, 64, 77, 103 }, /* y = d45 */ ++ { 113, 9, 36, 155, 111, 157, 32, 44, 161 }, /* y = d135 */ ++ { 116, 9, 55, 176, 76, 96, 37, 61, 149 }, /* y = d117 */ ++ { 115, 9, 28, 141, 161, 167, 21, 25, 193 }, /* y = d153 */ ++ { 120, 12, 32, 145, 195, 142, 32, 38, 86 }, /* y = d207 */ ++ { 116, 12, 64, 120, 140, 125, 49, 115, 121 }, /* y = d63 */ ++ { 102, 19, 66, 162, 182, 122, 35, 59, 128 } /* y = tm */ ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_kf_uv_mode_prob); ++ ++const struct v4l2_vp9_frame_context v4l2_vp9_default_probs = { ++ .tx8 = { ++ { 100 }, ++ { 66 }, ++ }, ++ .tx16 = { ++ { 20, 152 }, ++ { 15, 101 }, ++ }, ++ .tx32 = { ++ { 3, 136, 37 }, ++ { 5, 52, 13 }, ++ }, ++ .coef = { ++ { /* tx = 4x4 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 195, 29, 183 }, ++ { 84, 49, 136 }, ++ { 8, 42, 71 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 31, 107, 169 }, ++ { 35, 99, 159 }, ++ { 17, 82, 140 }, ++ { 8, 66, 114 }, ++ { 2, 44, 76 }, ++ { 1, 19, 32 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 40, 132, 201 }, ++ { 29, 114, 187 }, ++ { 13, 91, 157 }, ++ { 7, 75, 127 }, ++ { 3, 58, 95 }, ++ { 1, 28, 47 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 69, 142, 221 }, ++ { 42, 122, 201 }, ++ { 15, 91, 159 }, ++ { 6, 67, 121 }, ++ { 1, 42, 77 }, ++ { 1, 17, 31 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 102, 148, 228 }, ++ { 67, 117, 204 }, ++ { 17, 82, 154 }, ++ { 6, 59, 114 }, ++ { 2, 39, 75 }, ++ { 1, 15, 29 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 156, 57, 233 }, ++ { 119, 57, 212 }, ++ { 58, 48, 163 }, ++ { 29, 40, 124 }, ++ { 12, 30, 81 }, ++ { 3, 12, 31 } ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 191, 107, 226 }, ++ { 124, 117, 204 }, ++ { 25, 99, 155 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 29, 148, 210 }, ++ { 37, 126, 194 }, ++ { 8, 93, 157 }, ++ { 2, 68, 118 }, ++ { 1, 39, 69 }, ++ { 1, 17, 33 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 41, 151, 213 }, ++ { 27, 123, 193 }, ++ { 3, 82, 144 }, ++ { 1, 58, 105 }, ++ { 1, 32, 60 }, ++ { 1, 13, 26 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 59, 159, 220 }, ++ { 23, 126, 198 }, ++ { 4, 88, 151 }, ++ { 1, 66, 114 }, ++ { 1, 38, 71 }, ++ { 1, 18, 34 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 114, 136, 232 }, ++ { 51, 114, 207 }, ++ { 11, 83, 155 }, ++ { 3, 56, 105 }, ++ { 1, 33, 65 }, ++ { 1, 17, 34 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 149, 65, 234 }, ++ { 121, 57, 215 }, ++ { 61, 49, 166 }, ++ { 28, 36, 114 }, ++ { 12, 25, 76 }, ++ { 3, 16, 42 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 214, 49, 220 }, ++ { 132, 63, 188 }, ++ { 42, 65, 137 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 85, 137, 221 }, ++ { 104, 131, 216 }, ++ { 49, 111, 192 }, ++ { 21, 87, 155 }, ++ { 2, 49, 87 }, ++ { 1, 16, 28 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 89, 163, 230 }, ++ { 90, 137, 220 }, ++ { 29, 100, 183 }, ++ { 10, 70, 135 }, ++ { 2, 42, 81 }, ++ { 1, 17, 33 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 108, 167, 237 }, ++ { 55, 133, 222 }, ++ { 15, 97, 179 }, ++ { 4, 72, 135 }, ++ { 1, 45, 85 }, ++ { 1, 19, 38 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 124, 146, 240 }, ++ { 66, 124, 224 }, ++ { 17, 88, 175 }, ++ { 4, 58, 122 }, ++ { 1, 36, 75 }, ++ { 1, 18, 37 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 141, 79, 241 }, ++ { 126, 70, 227 }, ++ { 66, 58, 182 }, ++ { 30, 44, 136 }, ++ { 12, 34, 96 }, ++ { 2, 20, 47 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 229, 99, 249 }, ++ { 143, 111, 235 }, ++ { 46, 109, 192 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 82, 158, 236 }, ++ { 94, 146, 224 }, ++ { 25, 117, 191 }, ++ { 9, 87, 149 }, ++ { 3, 56, 99 }, ++ { 1, 33, 57 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 83, 167, 237 }, ++ { 68, 145, 222 }, ++ { 10, 103, 177 }, ++ { 2, 72, 131 }, ++ { 1, 41, 79 }, ++ { 1, 20, 39 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 99, 167, 239 }, ++ { 47, 141, 224 }, ++ { 10, 104, 178 }, ++ { 2, 73, 133 }, ++ { 1, 44, 85 }, ++ { 1, 22, 47 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 127, 145, 243 }, ++ { 71, 129, 228 }, ++ { 17, 93, 177 }, ++ { 3, 61, 124 }, ++ { 1, 41, 84 }, ++ { 1, 21, 52 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 157, 78, 244 }, ++ { 140, 72, 231 }, ++ { 69, 58, 184 }, ++ { 31, 44, 137 }, ++ { 14, 38, 105 }, ++ { 8, 23, 61 }, ++ }, ++ }, ++ }, ++ }, ++ { /* tx = 8x8 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 125, 34, 187 }, ++ { 52, 41, 133 }, ++ { 6, 31, 56 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 37, 109, 153 }, ++ { 51, 102, 147 }, ++ { 23, 87, 128 }, ++ { 8, 67, 101 }, ++ { 1, 41, 63 }, ++ { 1, 19, 29 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 31, 154, 185 }, ++ { 17, 127, 175 }, ++ { 6, 96, 145 }, ++ { 2, 73, 114 }, ++ { 1, 51, 82 }, ++ { 1, 28, 45 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 23, 163, 200 }, ++ { 10, 131, 185 }, ++ { 2, 93, 148 }, ++ { 1, 67, 111 }, ++ { 1, 41, 69 }, ++ { 1, 14, 24 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 29, 176, 217 }, ++ { 12, 145, 201 }, ++ { 3, 101, 156 }, ++ { 1, 69, 111 }, ++ { 1, 39, 63 }, ++ { 1, 14, 23 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 57, 192, 233 }, ++ { 25, 154, 215 }, ++ { 6, 109, 167 }, ++ { 3, 78, 118 }, ++ { 1, 48, 69 }, ++ { 1, 21, 29 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 202, 105, 245 }, ++ { 108, 106, 216 }, ++ { 18, 90, 144 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 33, 172, 219 }, ++ { 64, 149, 206 }, ++ { 14, 117, 177 }, ++ { 5, 90, 141 }, ++ { 2, 61, 95 }, ++ { 1, 37, 57 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 33, 179, 220 }, ++ { 11, 140, 198 }, ++ { 1, 89, 148 }, ++ { 1, 60, 104 }, ++ { 1, 33, 57 }, ++ { 1, 12, 21 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 30, 181, 221 }, ++ { 8, 141, 198 }, ++ { 1, 87, 145 }, ++ { 1, 58, 100 }, ++ { 1, 31, 55 }, ++ { 1, 12, 20 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 32, 186, 224 }, ++ { 7, 142, 198 }, ++ { 1, 86, 143 }, ++ { 1, 58, 100 }, ++ { 1, 31, 55 }, ++ { 1, 12, 22 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 57, 192, 227 }, ++ { 20, 143, 204 }, ++ { 3, 96, 154 }, ++ { 1, 68, 112 }, ++ { 1, 42, 69 }, ++ { 1, 19, 32 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 212, 35, 215 }, ++ { 113, 47, 169 }, ++ { 29, 48, 105 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 74, 129, 203 }, ++ { 106, 120, 203 }, ++ { 49, 107, 178 }, ++ { 19, 84, 144 }, ++ { 4, 50, 84 }, ++ { 1, 15, 25 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 71, 172, 217 }, ++ { 44, 141, 209 }, ++ { 15, 102, 173 }, ++ { 6, 76, 133 }, ++ { 2, 51, 89 }, ++ { 1, 24, 42 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 64, 185, 231 }, ++ { 31, 148, 216 }, ++ { 8, 103, 175 }, ++ { 3, 74, 131 }, ++ { 1, 46, 81 }, ++ { 1, 18, 30 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 65, 196, 235 }, ++ { 25, 157, 221 }, ++ { 5, 105, 174 }, ++ { 1, 67, 120 }, ++ { 1, 38, 69 }, ++ { 1, 15, 30 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 65, 204, 238 }, ++ { 30, 156, 224 }, ++ { 7, 107, 177 }, ++ { 2, 70, 124 }, ++ { 1, 42, 73 }, ++ { 1, 18, 34 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 225, 86, 251 }, ++ { 144, 104, 235 }, ++ { 42, 99, 181 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 85, 175, 239 }, ++ { 112, 165, 229 }, ++ { 29, 136, 200 }, ++ { 12, 103, 162 }, ++ { 6, 77, 123 }, ++ { 2, 53, 84 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 75, 183, 239 }, ++ { 30, 155, 221 }, ++ { 3, 106, 171 }, ++ { 1, 74, 128 }, ++ { 1, 44, 76 }, ++ { 1, 17, 28 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 73, 185, 240 }, ++ { 27, 159, 222 }, ++ { 2, 107, 172 }, ++ { 1, 75, 127 }, ++ { 1, 42, 73 }, ++ { 1, 17, 29 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 62, 190, 238 }, ++ { 21, 159, 222 }, ++ { 2, 107, 172 }, ++ { 1, 72, 122 }, ++ { 1, 40, 71 }, ++ { 1, 18, 32 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 61, 199, 240 }, ++ { 27, 161, 226 }, ++ { 4, 113, 180 }, ++ { 1, 76, 129 }, ++ { 1, 46, 80 }, ++ { 1, 23, 41 }, ++ }, ++ }, ++ }, ++ }, ++ { /* tx = 16x16 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 7, 27, 153 }, ++ { 5, 30, 95 }, ++ { 1, 16, 30 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 50, 75, 127 }, ++ { 57, 75, 124 }, ++ { 27, 67, 108 }, ++ { 10, 54, 86 }, ++ { 1, 33, 52 }, ++ { 1, 12, 18 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 43, 125, 151 }, ++ { 26, 108, 148 }, ++ { 7, 83, 122 }, ++ { 2, 59, 89 }, ++ { 1, 38, 60 }, ++ { 1, 17, 27 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 23, 144, 163 }, ++ { 13, 112, 154 }, ++ { 2, 75, 117 }, ++ { 1, 50, 81 }, ++ { 1, 31, 51 }, ++ { 1, 14, 23 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 18, 162, 185 }, ++ { 6, 123, 171 }, ++ { 1, 78, 125 }, ++ { 1, 51, 86 }, ++ { 1, 31, 54 }, ++ { 1, 14, 23 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 15, 199, 227 }, ++ { 3, 150, 204 }, ++ { 1, 91, 146 }, ++ { 1, 55, 95 }, ++ { 1, 30, 53 }, ++ { 1, 11, 20 }, ++ } ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 19, 55, 240 }, ++ { 19, 59, 196 }, ++ { 3, 52, 105 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 41, 166, 207 }, ++ { 104, 153, 199 }, ++ { 31, 123, 181 }, ++ { 14, 101, 152 }, ++ { 5, 72, 106 }, ++ { 1, 36, 52 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 35, 176, 211 }, ++ { 12, 131, 190 }, ++ { 2, 88, 144 }, ++ { 1, 60, 101 }, ++ { 1, 36, 60 }, ++ { 1, 16, 28 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 28, 183, 213 }, ++ { 8, 134, 191 }, ++ { 1, 86, 142 }, ++ { 1, 56, 96 }, ++ { 1, 30, 53 }, ++ { 1, 12, 20 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 20, 190, 215 }, ++ { 4, 135, 192 }, ++ { 1, 84, 139 }, ++ { 1, 53, 91 }, ++ { 1, 28, 49 }, ++ { 1, 11, 20 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 13, 196, 216 }, ++ { 2, 137, 192 }, ++ { 1, 86, 143 }, ++ { 1, 57, 99 }, ++ { 1, 32, 56 }, ++ { 1, 13, 24 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 211, 29, 217 }, ++ { 96, 47, 156 }, ++ { 22, 43, 87 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 78, 120, 193 }, ++ { 111, 116, 186 }, ++ { 46, 102, 164 }, ++ { 15, 80, 128 }, ++ { 2, 49, 76 }, ++ { 1, 18, 28 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 71, 161, 203 }, ++ { 42, 132, 192 }, ++ { 10, 98, 150 }, ++ { 3, 69, 109 }, ++ { 1, 44, 70 }, ++ { 1, 18, 29 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 57, 186, 211 }, ++ { 30, 140, 196 }, ++ { 4, 93, 146 }, ++ { 1, 62, 102 }, ++ { 1, 38, 65 }, ++ { 1, 16, 27 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 47, 199, 217 }, ++ { 14, 145, 196 }, ++ { 1, 88, 142 }, ++ { 1, 57, 98 }, ++ { 1, 36, 62 }, ++ { 1, 15, 26 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 26, 219, 229 }, ++ { 5, 155, 207 }, ++ { 1, 94, 151 }, ++ { 1, 60, 104 }, ++ { 1, 36, 62 }, ++ { 1, 16, 28 }, ++ } ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 233, 29, 248 }, ++ { 146, 47, 220 }, ++ { 43, 52, 140 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 100, 163, 232 }, ++ { 179, 161, 222 }, ++ { 63, 142, 204 }, ++ { 37, 113, 174 }, ++ { 26, 89, 137 }, ++ { 18, 68, 97 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 85, 181, 230 }, ++ { 32, 146, 209 }, ++ { 7, 100, 164 }, ++ { 3, 71, 121 }, ++ { 1, 45, 77 }, ++ { 1, 18, 30 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 65, 187, 230 }, ++ { 20, 148, 207 }, ++ { 2, 97, 159 }, ++ { 1, 68, 116 }, ++ { 1, 40, 70 }, ++ { 1, 14, 29 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 40, 194, 227 }, ++ { 8, 147, 204 }, ++ { 1, 94, 155 }, ++ { 1, 65, 112 }, ++ { 1, 39, 66 }, ++ { 1, 14, 26 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 16, 208, 228 }, ++ { 3, 151, 207 }, ++ { 1, 98, 160 }, ++ { 1, 67, 117 }, ++ { 1, 41, 74 }, ++ { 1, 17, 31 }, ++ }, ++ }, ++ }, ++ }, ++ { /* tx = 32x32 */ ++ { /* block Type 0 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 17, 38, 140 }, ++ { 7, 34, 80 }, ++ { 1, 17, 29 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 37, 75, 128 }, ++ { 41, 76, 128 }, ++ { 26, 66, 116 }, ++ { 12, 52, 94 }, ++ { 2, 32, 55 }, ++ { 1, 10, 16 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 50, 127, 154 }, ++ { 37, 109, 152 }, ++ { 16, 82, 121 }, ++ { 5, 59, 85 }, ++ { 1, 35, 54 }, ++ { 1, 13, 20 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 40, 142, 167 }, ++ { 17, 110, 157 }, ++ { 2, 71, 112 }, ++ { 1, 44, 72 }, ++ { 1, 27, 45 }, ++ { 1, 11, 17 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 30, 175, 188 }, ++ { 9, 124, 169 }, ++ { 1, 74, 116 }, ++ { 1, 48, 78 }, ++ { 1, 30, 49 }, ++ { 1, 11, 18 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 10, 222, 223 }, ++ { 2, 150, 194 }, ++ { 1, 83, 128 }, ++ { 1, 48, 79 }, ++ { 1, 27, 45 }, ++ { 1, 11, 17 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 36, 41, 235 }, ++ { 29, 36, 193 }, ++ { 10, 27, 111 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 85, 165, 222 }, ++ { 177, 162, 215 }, ++ { 110, 135, 195 }, ++ { 57, 113, 168 }, ++ { 23, 83, 120 }, ++ { 10, 49, 61 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 85, 190, 223 }, ++ { 36, 139, 200 }, ++ { 5, 90, 146 }, ++ { 1, 60, 103 }, ++ { 1, 38, 65 }, ++ { 1, 18, 30 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 72, 202, 223 }, ++ { 23, 141, 199 }, ++ { 2, 86, 140 }, ++ { 1, 56, 97 }, ++ { 1, 36, 61 }, ++ { 1, 16, 27 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 55, 218, 225 }, ++ { 13, 145, 200 }, ++ { 1, 86, 141 }, ++ { 1, 57, 99 }, ++ { 1, 35, 61 }, ++ { 1, 13, 22 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 15, 235, 212 }, ++ { 1, 132, 184 }, ++ { 1, 84, 139 }, ++ { 1, 57, 97 }, ++ { 1, 34, 56 }, ++ { 1, 14, 23 }, ++ }, ++ }, ++ }, ++ { /* block Type 1 */ ++ { /* Intra */ ++ { /* Coeff Band 0 */ ++ { 181, 21, 201 }, ++ { 61, 37, 123 }, ++ { 10, 38, 71 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 47, 106, 172 }, ++ { 95, 104, 173 }, ++ { 42, 93, 159 }, ++ { 18, 77, 131 }, ++ { 4, 50, 81 }, ++ { 1, 17, 23 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 62, 147, 199 }, ++ { 44, 130, 189 }, ++ { 28, 102, 154 }, ++ { 18, 75, 115 }, ++ { 2, 44, 65 }, ++ { 1, 12, 19 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 55, 153, 210 }, ++ { 24, 130, 194 }, ++ { 3, 93, 146 }, ++ { 1, 61, 97 }, ++ { 1, 31, 50 }, ++ { 1, 10, 16 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 49, 186, 223 }, ++ { 17, 148, 204 }, ++ { 1, 96, 142 }, ++ { 1, 53, 83 }, ++ { 1, 26, 44 }, ++ { 1, 11, 17 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 13, 217, 212 }, ++ { 2, 136, 180 }, ++ { 1, 78, 124 }, ++ { 1, 50, 83 }, ++ { 1, 29, 49 }, ++ { 1, 14, 23 }, ++ }, ++ }, ++ { /* Inter */ ++ { /* Coeff Band 0 */ ++ { 197, 13, 247 }, ++ { 82, 17, 222 }, ++ { 25, 17, 162 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ { 0, 0, 0 }, ++ }, ++ { /* Coeff Band 1 */ ++ { 126, 186, 247 }, ++ { 234, 191, 243 }, ++ { 176, 177, 234 }, ++ { 104, 158, 220 }, ++ { 66, 128, 186 }, ++ { 55, 90, 137 }, ++ }, ++ { /* Coeff Band 2 */ ++ { 111, 197, 242 }, ++ { 46, 158, 219 }, ++ { 9, 104, 171 }, ++ { 2, 65, 125 }, ++ { 1, 44, 80 }, ++ { 1, 17, 91 }, ++ }, ++ { /* Coeff Band 3 */ ++ { 104, 208, 245 }, ++ { 39, 168, 224 }, ++ { 3, 109, 162 }, ++ { 1, 79, 124 }, ++ { 1, 50, 102 }, ++ { 1, 43, 102 }, ++ }, ++ { /* Coeff Band 4 */ ++ { 84, 220, 246 }, ++ { 31, 177, 231 }, ++ { 2, 115, 180 }, ++ { 1, 79, 134 }, ++ { 1, 55, 77 }, ++ { 1, 60, 79 }, ++ }, ++ { /* Coeff Band 5 */ ++ { 43, 243, 240 }, ++ { 8, 180, 217 }, ++ { 1, 115, 166 }, ++ { 1, 84, 121 }, ++ { 1, 51, 67 }, ++ { 1, 16, 6 }, ++ }, ++ }, ++ }, ++ }, ++ }, ++ ++ .skip = { 192, 128, 64 }, ++ .inter_mode = { ++ { 2, 173, 34 }, ++ { 7, 145, 85 }, ++ { 7, 166, 63 }, ++ { 7, 94, 66 }, ++ { 8, 64, 46 }, ++ { 17, 81, 31 }, ++ { 25, 29, 30 }, ++ }, ++ .interp_filter = { ++ { 235, 162 }, ++ { 36, 255 }, ++ { 34, 3 }, ++ { 149, 144 }, ++ }, ++ .is_inter = { 9, 102, 187, 225 }, ++ .comp_mode = { 239, 183, 119, 96, 41 }, ++ .single_ref = { ++ { 33, 16 }, ++ { 77, 74 }, ++ { 142, 142 }, ++ { 172, 170 }, ++ { 238, 247 }, ++ }, ++ .comp_ref = { 50, 126, 123, 221, 226 }, ++ .y_mode = { ++ { 65, 32, 18, 144, 162, 194, 41, 51, 98 }, ++ { 132, 68, 18, 165, 217, 196, 45, 40, 78 }, ++ { 173, 80, 19, 176, 240, 193, 64, 35, 46 }, ++ { 221, 135, 38, 194, 248, 121, 96, 85, 29 }, ++ }, ++ .uv_mode = { ++ { 120, 7, 76, 176, 208, 126, 28, 54, 103 } /* y = dc */, ++ { 48, 12, 154, 155, 139, 90, 34, 117, 119 } /* y = v */, ++ { 67, 6, 25, 204, 243, 158, 13, 21, 96 } /* y = h */, ++ { 97, 5, 44, 131, 176, 139, 48, 68, 97 } /* y = d45 */, ++ { 83, 5, 42, 156, 111, 152, 26, 49, 152 } /* y = d135 */, ++ { 80, 5, 58, 178, 74, 83, 33, 62, 145 } /* y = d117 */, ++ { 86, 5, 32, 154, 192, 168, 14, 22, 163 } /* y = d153 */, ++ { 85, 5, 32, 156, 216, 148, 19, 29, 73 } /* y = d207 */, ++ { 77, 7, 64, 116, 132, 122, 37, 126, 120 } /* y = d63 */, ++ { 101, 21, 107, 181, 192, 103, 19, 67, 125 } /* y = tm */ ++ }, ++ .partition = { ++ /* 8x8 -> 4x4 */ ++ { 199, 122, 141 } /* a/l both not split */, ++ { 147, 63, 159 } /* a split, l not split */, ++ { 148, 133, 118 } /* l split, a not split */, ++ { 121, 104, 114 } /* a/l both split */, ++ /* 16x16 -> 8x8 */ ++ { 174, 73, 87 } /* a/l both not split */, ++ { 92, 41, 83 } /* a split, l not split */, ++ { 82, 99, 50 } /* l split, a not split */, ++ { 53, 39, 39 } /* a/l both split */, ++ /* 32x32 -> 16x16 */ ++ { 177, 58, 59 } /* a/l both not split */, ++ { 68, 26, 63 } /* a split, l not split */, ++ { 52, 79, 25 } /* l split, a not split */, ++ { 17, 14, 12 } /* a/l both split */, ++ /* 64x64 -> 32x32 */ ++ { 222, 34, 30 } /* a/l both not split */, ++ { 72, 16, 44 } /* a split, l not split */, ++ { 58, 32, 12 } /* l split, a not split */, ++ { 10, 7, 6 } /* a/l both split */, ++ }, ++ ++ .mv = { ++ .joint = { 32, 64, 96 }, ++ .sign = { 128, 128 }, ++ .classes = { ++ { 224, 144, 192, 168, 192, 176, 192, 198, 198, 245 }, ++ { 216, 128, 176, 160, 176, 176, 192, 198, 198, 208 }, ++ }, ++ .class0_bit = { 216, 208 }, ++ .bits = { ++ { 136, 140, 148, 160, 176, 192, 224, 234, 234, 240}, ++ { 136, 140, 148, 160, 176, 192, 224, 234, 234, 240}, ++ }, ++ .class0_fr = { ++ { ++ { 128, 128, 64 }, ++ { 96, 112, 64 }, ++ }, ++ { ++ { 128, 128, 64 }, ++ { 96, 112, 64 }, ++ }, ++ }, ++ .fr = { ++ { 64, 96, 64 }, ++ { 64, 96, 64 }, ++ }, ++ .class0_hp = { 160, 160 }, ++ .hp = { 128, 128 }, ++ }, ++}; ++EXPORT_SYMBOL_GPL(v4l2_vp9_default_probs); ++ ++static u32 fastdiv(u32 dividend, u16 divisor) ++{ ++#define DIV_INV(d) ((u32)(((1ULL << 32) + ((d) - 1)) / (d))) ++#define DIVS_INV(d0, d1, d2, d3, d4, d5, d6, d7, d8, d9) \ ++ DIV_INV(d0), DIV_INV(d1), DIV_INV(d2), DIV_INV(d3), \ ++ DIV_INV(d4), DIV_INV(d5), DIV_INV(d6), DIV_INV(d7), \ ++ DIV_INV(d8), DIV_INV(d9) ++ ++ static const u32 inv[] = { ++ DIV_INV(2), DIV_INV(3), DIV_INV(4), DIV_INV(5), ++ DIV_INV(6), DIV_INV(7), DIV_INV(8), DIV_INV(9), ++ DIVS_INV(10, 11, 12, 13, 14, 15, 16, 17, 18, 19), ++ DIVS_INV(20, 21, 22, 23, 24, 25, 26, 27, 28, 29), ++ DIVS_INV(30, 31, 32, 33, 34, 35, 36, 37, 38, 39), ++ DIVS_INV(40, 41, 42, 43, 44, 45, 46, 47, 48, 49), ++ DIVS_INV(50, 51, 52, 53, 54, 55, 56, 57, 58, 59), ++ DIVS_INV(60, 61, 62, 63, 64, 65, 66, 67, 68, 69), ++ DIVS_INV(70, 71, 72, 73, 74, 75, 76, 77, 78, 79), ++ DIVS_INV(80, 81, 82, 83, 84, 85, 86, 87, 88, 89), ++ DIVS_INV(90, 91, 92, 93, 94, 95, 96, 97, 98, 99), ++ DIVS_INV(100, 101, 102, 103, 104, 105, 106, 107, 108, 109), ++ DIVS_INV(110, 111, 112, 113, 114, 115, 116, 117, 118, 119), ++ DIVS_INV(120, 121, 122, 123, 124, 125, 126, 127, 128, 129), ++ DIVS_INV(130, 131, 132, 133, 134, 135, 136, 137, 138, 139), ++ DIVS_INV(140, 141, 142, 143, 144, 145, 146, 147, 148, 149), ++ DIVS_INV(150, 151, 152, 153, 154, 155, 156, 157, 158, 159), ++ DIVS_INV(160, 161, 162, 163, 164, 165, 166, 167, 168, 169), ++ DIVS_INV(170, 171, 172, 173, 174, 175, 176, 177, 178, 179), ++ DIVS_INV(180, 181, 182, 183, 184, 185, 186, 187, 188, 189), ++ DIVS_INV(190, 191, 192, 193, 194, 195, 196, 197, 198, 199), ++ DIVS_INV(200, 201, 202, 203, 204, 205, 206, 207, 208, 209), ++ DIVS_INV(210, 211, 212, 213, 214, 215, 216, 217, 218, 219), ++ DIVS_INV(220, 221, 222, 223, 224, 225, 226, 227, 228, 229), ++ DIVS_INV(230, 231, 232, 233, 234, 235, 236, 237, 238, 239), ++ DIVS_INV(240, 241, 242, 243, 244, 245, 246, 247, 248, 249), ++ DIV_INV(250), DIV_INV(251), DIV_INV(252), DIV_INV(253), ++ DIV_INV(254), DIV_INV(255), DIV_INV(256), ++ }; ++ ++ if (divisor == 0) ++ return 0; ++ else if (divisor == 1) ++ return dividend; ++ ++ if (WARN_ON(divisor - 2 >= ARRAY_SIZE(inv))) ++ return dividend; ++ ++ return ((u64)dividend * inv[divisor - 2]) >> 32; ++} ++ ++/* 6.3.6 inv_recenter_nonneg(v, m) */ ++static int inv_recenter_nonneg(int v, int m) ++{ ++ if (v > 2 * m) ++ return v; ++ ++ if (v & 1) ++ return m - ((v + 1) >> 1); ++ ++ return m + (v >> 1); ++} ++ ++/* ++ * part of 6.3.5 inv_remap_prob(deltaProb, prob) ++ * delta = inv_map_table[deltaProb] done by userspace ++ */ ++static int update_prob(int delta, int prob) ++{ ++ if (!delta) ++ return prob; ++ ++ return prob <= 128 ? ++ 1 + inv_recenter_nonneg(delta, prob - 1) : ++ 255 - inv_recenter_nonneg(delta, 255 - prob); ++} ++ ++/* Counterpart to 6.3.2 tx_mode_probs() */ ++static void update_tx_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { ++ u8 *p8x8 = probs->tx8[i]; ++ u8 *p16x16 = probs->tx16[i]; ++ u8 *p32x32 = probs->tx32[i]; ++ const u8 *d8x8 = deltas->tx8[i]; ++ const u8 *d16x16 = deltas->tx16[i]; ++ const u8 *d32x32 = deltas->tx32[i]; ++ ++ p8x8[0] = update_prob(d8x8[0], p8x8[0]); ++ p16x16[0] = update_prob(d16x16[0], p16x16[0]); ++ p16x16[1] = update_prob(d16x16[1], p16x16[1]); ++ p32x32[0] = update_prob(d32x32[0], p32x32[0]); ++ p32x32[1] = update_prob(d32x32[1], p32x32[1]); ++ p32x32[2] = update_prob(d32x32[2], p32x32[2]); ++ } ++} ++ ++#define BAND_6(band) ((band) == 0 ? 3 : 6) ++ ++static void update_coeff(const u8 deltas[6][6][3], u8 probs[6][6][3]) ++{ ++ int l, m, n; ++ ++ for (l = 0; l < 6; l++) ++ for (m = 0; m < BAND_6(l); m++) { ++ u8 *p = probs[l][m]; ++ const u8 *d = deltas[l][m]; ++ ++ for (n = 0; n < 3; n++) ++ p[n] = update_prob(d[n], p[n]); ++ } ++} ++ ++/* Counterpart to 6.3.7 read_coef_probs() */ ++static void update_coef_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ int i, j, k; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) ++ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) ++ update_coeff(deltas->coef[i][j][k], probs->coef[i][j][k]); ++ ++ if (deltas->tx_mode == i) ++ break; ++ } ++} ++ ++/* Counterpart to 6.3.8 read_skip_prob() */ ++static void update_skip_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->skip); i++) ++ probs->skip[i] = update_prob(deltas->skip[i], probs->skip[i]); ++} ++ ++/* Counterpart to 6.3.9 read_inter_mode_probs() */ ++static void update_inter_mode_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->inter_mode); i++) { ++ u8 *p = probs->inter_mode[i]; ++ const u8 *d = deltas->inter_mode[i]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ p[2] = update_prob(d[2], p[2]); ++ } ++} ++ ++/* Counterpart to 6.3.10 read_interp_filter_probs() */ ++static void update_interp_filter_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->interp_filter); i++) { ++ u8 *p = probs->interp_filter[i]; ++ const u8 *d = deltas->interp_filter[i]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ } ++} ++ ++/* Counterpart to 6.3.11 read_is_inter_probs() */ ++static void update_is_inter_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->is_inter); i++) ++ probs->is_inter[i] = update_prob(deltas->is_inter[i], probs->is_inter[i]); ++} ++ ++/* 6.3.12 frame_reference_mode() done entirely in userspace */ ++ ++/* Counterpart to 6.3.13 frame_reference_mode_probs() */ ++static void ++update_frame_reference_mode_probs(unsigned int reference_mode, ++ struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i; ++ ++ if (reference_mode == V4L2_VP9_REFERENCE_MODE_SELECT) ++ for (i = 0; i < ARRAY_SIZE(probs->comp_mode); i++) ++ probs->comp_mode[i] = update_prob(deltas->comp_mode[i], ++ probs->comp_mode[i]); ++ ++ if (reference_mode != V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE) ++ for (i = 0; i < ARRAY_SIZE(probs->single_ref); i++) { ++ u8 *p = probs->single_ref[i]; ++ const u8 *d = deltas->single_ref[i]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ } ++ ++ if (reference_mode != V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE) ++ for (i = 0; i < ARRAY_SIZE(probs->comp_ref); i++) ++ probs->comp_ref[i] = update_prob(deltas->comp_ref[i], probs->comp_ref[i]); ++} ++ ++/* Counterpart to 6.3.14 read_y_mode_probs() */ ++static void update_y_mode_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i, j; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->y_mode); i++) ++ for (j = 0; j < ARRAY_SIZE(probs->y_mode[0]); ++j) ++ probs->y_mode[i][j] = ++ update_prob(deltas->y_mode[i][j], probs->y_mode[i][j]); ++} ++ ++/* Counterpart to 6.3.15 read_partition_probs() */ ++static void update_partition_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas) ++{ ++ int i, j; ++ ++ for (i = 0; i < 4; i++) ++ for (j = 0; j < 4; j++) { ++ u8 *p = probs->partition[i * 4 + j]; ++ const u8 *d = deltas->partition[i * 4 + j]; ++ ++ p[0] = update_prob(d[0], p[0]); ++ p[1] = update_prob(d[1], p[1]); ++ p[2] = update_prob(d[2], p[2]); ++ } ++} ++ ++static inline int update_mv_prob(int delta, int prob) ++{ ++ if (!delta) ++ return prob; ++ ++ return delta; ++} ++ ++/* Counterpart to 6.3.16 mv_probs() */ ++static void update_mv_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ u8 *p = probs->mv.joint; ++ const u8 *d = deltas->mv.joint; ++ unsigned int i, j; ++ ++ p[0] = update_mv_prob(d[0], p[0]); ++ p[1] = update_mv_prob(d[1], p[1]); ++ p[2] = update_mv_prob(d[2], p[2]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->mv.sign); i++) { ++ p = probs->mv.sign; ++ d = deltas->mv.sign; ++ p[i] = update_mv_prob(d[i], p[i]); ++ ++ p = probs->mv.classes[i]; ++ d = deltas->mv.classes[i]; ++ for (j = 0; j < ARRAY_SIZE(probs->mv.classes[0]); j++) ++ p[j] = update_mv_prob(d[j], p[j]); ++ ++ p = probs->mv.class0_bit; ++ d = deltas->mv.class0_bit; ++ p[i] = update_mv_prob(d[i], p[i]); ++ ++ p = probs->mv.bits[i]; ++ d = deltas->mv.bits[i]; ++ for (j = 0; j < ARRAY_SIZE(probs->mv.bits[0]); j++) ++ p[j] = update_mv_prob(d[j], p[j]); ++ ++ for (j = 0; j < ARRAY_SIZE(probs->mv.class0_fr[0]); j++) { ++ p = probs->mv.class0_fr[i][j]; ++ d = deltas->mv.class0_fr[i][j]; ++ ++ p[0] = update_mv_prob(d[0], p[0]); ++ p[1] = update_mv_prob(d[1], p[1]); ++ p[2] = update_mv_prob(d[2], p[2]); ++ } ++ ++ p = probs->mv.fr[i]; ++ d = deltas->mv.fr[i]; ++ for (j = 0; j < ARRAY_SIZE(probs->mv.fr[i]); j++) ++ p[j] = update_mv_prob(d[j], p[j]); ++ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV) { ++ p = probs->mv.class0_hp; ++ d = deltas->mv.class0_hp; ++ p[i] = update_mv_prob(d[i], p[i]); ++ ++ p = probs->mv.hp; ++ d = deltas->mv.hp; ++ p[i] = update_mv_prob(d[i], p[i]); ++ } ++ } ++} ++ ++/* Counterpart to 6.3 compressed_header(), but parsing has been done in userspace. */ ++void v4l2_vp9_fw_update_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ if (deltas->tx_mode == V4L2_VP9_TX_MODE_SELECT) ++ update_tx_probs(probs, deltas); ++ ++ update_coef_probs(probs, deltas, dec_params); ++ ++ update_skip_probs(probs, deltas); ++ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY) ++ return; ++ ++ update_inter_mode_probs(probs, deltas); ++ ++ if (dec_params->interpolation_filter == V4L2_VP9_INTERP_FILTER_SWITCHABLE) ++ update_interp_filter_probs(probs, deltas); ++ ++ update_is_inter_probs(probs, deltas); ++ ++ update_frame_reference_mode_probs(dec_params->reference_mode, probs, deltas); ++ ++ update_y_mode_probs(probs, deltas); ++ ++ update_partition_probs(probs, deltas); ++ ++ update_mv_probs(probs, deltas, dec_params); ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_fw_update_probs); ++ ++u8 v4l2_vp9_reset_frame_ctx(const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct v4l2_vp9_frame_context *frame_context) ++{ ++ int i; ++ ++ u8 fctx_idx = dec_params->frame_context_idx; ++ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) { ++ /* ++ * setup_past_independence() ++ * We do nothing here. Instead of storing default probs in some intermediate ++ * location and then copying from that location to appropriate contexts ++ * in save_probs() below, we skip that step and save default probs directly ++ * to appropriate contexts. ++ */ ++ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME || ++ dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT || ++ dec_params->reset_frame_context == V4L2_VP9_RESET_FRAME_CTX_ALL) ++ for (i = 0; i < 4; ++i) ++ /* save_probs(i) */ ++ memcpy(&frame_context[i], &v4l2_vp9_default_probs, ++ sizeof(v4l2_vp9_default_probs)); ++ else if (dec_params->reset_frame_context == V4L2_VP9_RESET_FRAME_CTX_SPEC) ++ /* save_probs(fctx_idx) */ ++ memcpy(&frame_context[fctx_idx], &v4l2_vp9_default_probs, ++ sizeof(v4l2_vp9_default_probs)); ++ fctx_idx = 0; ++ } ++ ++ return fctx_idx; ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_reset_frame_ctx); ++ ++/* 8.4.1 Merge prob process */ ++static u8 merge_prob(u8 pre_prob, u32 ct0, u32 ct1, u16 count_sat, u32 max_update_factor) ++{ ++ u32 den, prob, count, factor; ++ ++ den = ct0 + ct1; ++ if (!den) { ++ /* ++ * prob = 128, count = 0, update_factor = 0 ++ * Round2's argument: pre_prob * 256 ++ * (pre_prob * 256 + 128) >> 8 == pre_prob ++ */ ++ return pre_prob; ++ } ++ ++ prob = clamp(((ct0 << 8) + (den >> 1)) / den, (u32)1, (u32)255); ++ count = min_t(u32, den, count_sat); ++ factor = fastdiv(max_update_factor * count, count_sat); ++ ++ /* ++ * Round2(pre_prob * (256 - factor) + prob * factor, 8) ++ * Round2(pre_prob * 256 + (prob - pre_prob) * factor, 8) ++ * (pre_prob * 256 >> 8) + (((prob - pre_prob) * factor + 128) >> 8) ++ */ ++ return pre_prob + (((prob - pre_prob) * factor + 128) >> 8); ++} ++ ++static inline u8 noncoef_merge_prob(u8 pre_prob, u32 ct0, u32 ct1) ++{ ++ return merge_prob(pre_prob, ct0, ct1, 20, 128); ++} ++ ++/* 8.4.2 Merge probs process */ ++/* ++ * merge_probs() is a recursive function in the spec. We avoid recursion in the kernel. ++ * That said, the "tree" parameter of merge_probs() controls how deep the recursion goes. ++ * It turns out that in all cases the recursive calls boil down to a short-ish series ++ * of merge_prob() invocations (note no "s"). ++ * ++ * Variant A ++ * --------- ++ * merge_probs(small_token_tree, 2): ++ * merge_prob(p[1], c[0], c[1] + c[2]) ++ * merge_prob(p[2], c[1], c[2]) ++ * ++ * Variant B ++ * --------- ++ * merge_probs(binary_tree, 0) or ++ * merge_probs(tx_size_8_tree, 0): ++ * merge_prob(p[0], c[0], c[1]) ++ * ++ * Variant C ++ * --------- ++ * merge_probs(inter_mode_tree, 0): ++ * merge_prob(p[0], c[2], c[1] + c[0] + c[3]) ++ * merge_prob(p[1], c[0], c[1] + c[3]) ++ * merge_prob(p[2], c[1], c[3]) ++ * ++ * Variant D ++ * --------- ++ * merge_probs(intra_mode_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + ... + c[9]) ++ * merge_prob(p[1], c[9], c[1] + ... + c[8]) ++ * merge_prob(p[2], c[1], c[2] + ... + c[8]) ++ * merge_prob(p[3], c[2] + c[4] + c[5], c[3] + c[8] + c[6] + c[7]) ++ * merge_prob(p[4], c[2], c[4] + c[5]) ++ * merge_prob(p[5], c[4], c[5]) ++ * merge_prob(p[6], c[3], c[8] + c[6] + c[7]) ++ * merge_prob(p[7], c[8], c[6] + c[7]) ++ * merge_prob(p[8], c[6], c[7]) ++ * ++ * Variant E ++ * --------- ++ * merge_probs(partition_tree, 0) or ++ * merge_probs(tx_size_32_tree, 0) or ++ * merge_probs(mv_joint_tree, 0) or ++ * merge_probs(mv_fr_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + c[2] + c[3]) ++ * merge_prob(p[1], c[1], c[2] + c[3]) ++ * merge_prob(p[2], c[2], c[3]) ++ * ++ * Variant F ++ * --------- ++ * merge_probs(interp_filter_tree, 0) or ++ * merge_probs(tx_size_16_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + c[2]) ++ * merge_prob(p[1], c[1], c[2]) ++ * ++ * Variant G ++ * --------- ++ * merge_probs(mv_class_tree, 0): ++ * merge_prob(p[0], c[0], c[1] + ... + c[10]) ++ * merge_prob(p[1], c[1], c[2] + ... + c[10]) ++ * merge_prob(p[2], c[2] + c[3], c[4] + ... + c[10]) ++ * merge_prob(p[3], c[2], c[3]) ++ * merge_prob(p[4], c[4] + c[5], c[6] + ... + c[10]) ++ * merge_prob(p[5], c[4], c[5]) ++ * merge_prob(p[6], c[6], c[7] + ... + c[10]) ++ * merge_prob(p[7], c[7] + c[8], c[9] + c[10]) ++ * merge_prob(p[8], c[7], c[8]) ++ * merge_prob(p[9], c[9], [10]) ++ */ ++ ++static inline void merge_probs_variant_a(u8 *p, const u32 *c, u16 count_sat, u32 update_factor) ++{ ++ p[1] = merge_prob(p[1], c[0], c[1] + c[2], count_sat, update_factor); ++ p[2] = merge_prob(p[2], c[1], c[2], count_sat, update_factor); ++} ++ ++static inline void merge_probs_variant_b(u8 *p, const u32 *c, u16 count_sat, u32 update_factor) ++{ ++ p[0] = merge_prob(p[0], c[0], c[1], count_sat, update_factor); ++} ++ ++static inline void merge_probs_variant_c(u8 *p, const u32 *c) ++{ ++ p[0] = noncoef_merge_prob(p[0], c[2], c[1] + c[0] + c[3]); ++ p[1] = noncoef_merge_prob(p[1], c[0], c[1] + c[3]); ++ p[2] = noncoef_merge_prob(p[2], c[1], c[3]); ++} ++ ++static void merge_probs_variant_d(u8 *p, const u32 *c) ++{ ++ u32 sum = 0, s2; ++ ++ sum = c[1] + c[2] + c[3] + c[4] + c[5] + c[6] + c[7] + c[8] + c[9]; ++ ++ p[0] = noncoef_merge_prob(p[0], c[0], sum); ++ sum -= c[9]; ++ p[1] = noncoef_merge_prob(p[1], c[9], sum); ++ sum -= c[1]; ++ p[2] = noncoef_merge_prob(p[2], c[1], sum); ++ s2 = c[2] + c[4] + c[5]; ++ sum -= s2; ++ p[3] = noncoef_merge_prob(p[3], s2, sum); ++ s2 -= c[2]; ++ p[4] = noncoef_merge_prob(p[4], c[2], s2); ++ p[5] = noncoef_merge_prob(p[5], c[4], c[5]); ++ sum -= c[3]; ++ p[6] = noncoef_merge_prob(p[6], c[3], sum); ++ sum -= c[8]; ++ p[7] = noncoef_merge_prob(p[7], c[8], sum); ++ p[8] = noncoef_merge_prob(p[8], c[6], c[7]); ++} ++ ++static inline void merge_probs_variant_e(u8 *p, const u32 *c) ++{ ++ p[0] = noncoef_merge_prob(p[0], c[0], c[1] + c[2] + c[3]); ++ p[1] = noncoef_merge_prob(p[1], c[1], c[2] + c[3]); ++ p[2] = noncoef_merge_prob(p[2], c[2], c[3]); ++} ++ ++static inline void merge_probs_variant_f(u8 *p, const u32 *c) ++{ ++ p[0] = noncoef_merge_prob(p[0], c[0], c[1] + c[2]); ++ p[1] = noncoef_merge_prob(p[1], c[1], c[2]); ++} ++ ++static void merge_probs_variant_g(u8 *p, const u32 *c) ++{ ++ u32 sum; ++ ++ sum = c[1] + c[2] + c[3] + c[4] + c[5] + c[6] + c[7] + c[8] + c[9] + c[10]; ++ p[0] = noncoef_merge_prob(p[0], c[0], sum); ++ sum -= c[1]; ++ p[1] = noncoef_merge_prob(p[1], c[1], sum); ++ sum -= c[2] + c[3]; ++ p[2] = noncoef_merge_prob(p[2], c[2] + c[3], sum); ++ p[3] = noncoef_merge_prob(p[3], c[2], c[3]); ++ sum -= c[4] + c[5]; ++ p[4] = noncoef_merge_prob(p[4], c[4] + c[5], sum); ++ p[5] = noncoef_merge_prob(p[5], c[4], c[5]); ++ sum -= c[6]; ++ p[6] = noncoef_merge_prob(p[6], c[6], sum); ++ p[7] = noncoef_merge_prob(p[7], c[7] + c[8], c[9] + c[10]); ++ p[8] = noncoef_merge_prob(p[8], c[7], c[8]); ++ p[9] = noncoef_merge_prob(p[9], c[9], c[10]); ++} ++ ++/* 8.4.3 Coefficient probability adaptation process */ ++static inline void adapt_probs_variant_a_coef(u8 *p, const u32 *c, u32 update_factor) ++{ ++ merge_probs_variant_a(p, c, 24, update_factor); ++} ++ ++static inline void adapt_probs_variant_b_coef(u8 *p, const u32 *c, u32 update_factor) ++{ ++ merge_probs_variant_b(p, c, 24, update_factor); ++} ++ ++static void _adapt_coeff(unsigned int i, unsigned int j, unsigned int k, ++ struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_vp9_frame_symbol_counts *counts, ++ u32 uf) ++{ ++ s32 l, m; ++ ++ for (l = 0; l < ARRAY_SIZE(probs->coef[0][0][0]); l++) { ++ for (m = 0; m < BAND_6(l); m++) { ++ u8 *p = probs->coef[i][j][k][l][m]; ++ const u32 counts_more_coefs[2] = { ++ *counts->eob[i][j][k][l][m][1], ++ *counts->eob[i][j][k][l][m][0] - *counts->eob[i][j][k][l][m][1], ++ }; ++ ++ adapt_probs_variant_a_coef(p, *counts->coeff[i][j][k][l][m], uf); ++ adapt_probs_variant_b_coef(p, counts_more_coefs, uf); ++ } ++ } ++} ++ ++static void _adapt_coef_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_vp9_frame_symbol_counts *counts, ++ unsigned int uf) ++{ ++ unsigned int i, j, k; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) ++ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) ++ _adapt_coeff(i, j, k, probs, counts, uf); ++} ++ ++void v4l2_vp9_adapt_coef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ bool use_128, ++ bool frame_is_intra) ++{ ++ if (frame_is_intra) { ++ _adapt_coef_probs(probs, counts, 112); ++ } else { ++ if (use_128) ++ _adapt_coef_probs(probs, counts, 128); ++ else ++ _adapt_coef_probs(probs, counts, 112); ++ } ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_adapt_coef_probs); ++ ++/* 8.4.4 Non coefficient probability adaptation process, adapt_probs() */ ++static inline void adapt_probs_variant_b(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_b(p, c, 20, 128); ++} ++ ++static inline void adapt_probs_variant_c(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_c(p, c); ++} ++ ++static inline void adapt_probs_variant_d(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_d(p, c); ++} ++ ++static inline void adapt_probs_variant_e(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_e(p, c); ++} ++ ++static inline void adapt_probs_variant_f(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_f(p, c); ++} ++ ++static inline void adapt_probs_variant_g(u8 *p, const u32 *c) ++{ ++ merge_probs_variant_g(p, c); ++} ++ ++/* 8.4.4 Non coefficient probability adaptation process, adapt_prob() */ ++static inline u8 adapt_prob(u8 prob, const u32 counts[2]) ++{ ++ return noncoef_merge_prob(prob, counts[0], counts[1]); ++} ++ ++/* 8.4.4 Non coefficient probability adaptation process */ ++void v4l2_vp9_adapt_noncoef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ u8 reference_mode, u8 interpolation_filter, u8 tx_mode, ++ u32 flags) ++{ ++ unsigned int i, j; ++ ++ for (i = 0; i < ARRAY_SIZE(probs->is_inter); i++) ++ probs->is_inter[i] = adapt_prob(probs->is_inter[i], (*counts->intra_inter)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->comp_mode); i++) ++ probs->comp_mode[i] = adapt_prob(probs->comp_mode[i], (*counts->comp)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->comp_ref); i++) ++ probs->comp_ref[i] = adapt_prob(probs->comp_ref[i], (*counts->comp_ref)[i]); ++ ++ if (reference_mode != V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE) ++ for (i = 0; i < ARRAY_SIZE(probs->single_ref); i++) ++ for (j = 0; j < ARRAY_SIZE(probs->single_ref[0]); j++) ++ probs->single_ref[i][j] = adapt_prob(probs->single_ref[i][j], ++ (*counts->single_ref)[i][j]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->inter_mode); i++) ++ adapt_probs_variant_c(probs->inter_mode[i], (*counts->mv_mode)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->y_mode); i++) ++ adapt_probs_variant_d(probs->y_mode[i], (*counts->y_mode)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->uv_mode); i++) ++ adapt_probs_variant_d(probs->uv_mode[i], (*counts->uv_mode)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->partition); i++) ++ adapt_probs_variant_e(probs->partition[i], (*counts->partition)[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->skip); i++) ++ probs->skip[i] = adapt_prob(probs->skip[i], (*counts->skip)[i]); ++ ++ if (interpolation_filter == V4L2_VP9_INTERP_FILTER_SWITCHABLE) ++ for (i = 0; i < ARRAY_SIZE(probs->interp_filter); i++) ++ adapt_probs_variant_f(probs->interp_filter[i], (*counts->filter)[i]); ++ ++ if (tx_mode == V4L2_VP9_TX_MODE_SELECT) ++ for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { ++ adapt_probs_variant_b(probs->tx8[i], (*counts->tx8p)[i]); ++ adapt_probs_variant_f(probs->tx16[i], (*counts->tx16p)[i]); ++ adapt_probs_variant_e(probs->tx32[i], (*counts->tx32p)[i]); ++ } ++ ++ adapt_probs_variant_e(probs->mv.joint, *counts->mv_joint); ++ ++ for (i = 0; i < ARRAY_SIZE(probs->mv.sign); i++) { ++ probs->mv.sign[i] = adapt_prob(probs->mv.sign[i], (*counts->sign)[i]); ++ ++ adapt_probs_variant_g(probs->mv.classes[i], (*counts->classes)[i]); ++ ++ probs->mv.class0_bit[i] = adapt_prob(probs->mv.class0_bit[i], (*counts->class0)[i]); ++ ++ for (j = 0; j < ARRAY_SIZE(probs->mv.bits[0]); j++) ++ probs->mv.bits[i][j] = adapt_prob(probs->mv.bits[i][j], ++ (*counts->bits)[i][j]); ++ ++ for (j = 0; j < ARRAY_SIZE(probs->mv.class0_fr[0]); j++) ++ adapt_probs_variant_e(probs->mv.class0_fr[i][j], ++ (*counts->class0_fp)[i][j]); ++ ++ adapt_probs_variant_e(probs->mv.fr[i], (*counts->fp)[i]); ++ ++ if (!(flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)) ++ continue; ++ ++ probs->mv.class0_hp[i] = adapt_prob(probs->mv.class0_hp[i], ++ (*counts->class0_hp)[i]); ++ ++ probs->mv.hp[i] = adapt_prob(probs->mv.hp[i], (*counts->hp)[i]); ++ } ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_adapt_noncoef_probs); ++ ++bool ++v4l2_vp9_seg_feat_enabled(const u8 *feature_enabled, ++ unsigned int feature, ++ unsigned int segid) ++{ ++ u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); ++ ++ return !!(feature_enabled[segid] & mask); ++} ++EXPORT_SYMBOL_GPL(v4l2_vp9_seg_feat_enabled); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("V4L2 VP9 Helpers"); ++MODULE_AUTHOR("Andrzej Pietrasiewicz "); +diff --git a/include/media/v4l2-vp9.h b/include/media/v4l2-vp9.h +new file mode 100644 +index 000000000000..05478ad6d4ab +--- /dev/null ++++ b/include/media/v4l2-vp9.h +@@ -0,0 +1,233 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++/* ++ * Helper functions for vp9 codecs. ++ * ++ * Copyright (c) 2021 Collabora, Ltd. ++ * ++ * Author: Andrzej Pietrasiewicz ++ */ ++ ++#ifndef _MEDIA_V4L2_VP9_H ++#define _MEDIA_V4L2_VP9_H ++ ++#include ++ ++/** ++ * struct v4l2_vp9_frame_mv_context - motion vector-related probabilities ++ * ++ * @joint: motion vector joint probabilities. ++ * @sign: motion vector sign probabilities. ++ * @classes: motion vector class probabilities. ++ * @class0_bit: motion vector class0 bit probabilities. ++ * @bits: motion vector bits probabilities. ++ * @class0_fr: motion vector class0 fractional bit probabilities. ++ * @fr: motion vector fractional bit probabilities. ++ * @class0_hp: motion vector class0 high precision fractional bit probabilities. ++ * @hp: motion vector high precision fractional bit probabilities. ++ * ++ * A member of v4l2_vp9_frame_context. ++ */ ++struct v4l2_vp9_frame_mv_context { ++ u8 joint[3]; ++ u8 sign[2]; ++ u8 classes[2][10]; ++ u8 class0_bit[2]; ++ u8 bits[2][10]; ++ u8 class0_fr[2][2][3]; ++ u8 fr[2][3]; ++ u8 class0_hp[2]; ++ u8 hp[2]; ++}; ++ ++/** ++ * struct v4l2_vp9_frame_context - frame probabilities, including motion-vector related ++ * ++ * @tx8: TX 8x8 probabilities. ++ * @tx16: TX 16x16 probabilities. ++ * @tx32: TX 32x32 probabilities. ++ * @coef: coefficient probabilities. ++ * @skip: skip probabilities. ++ * @inter_mode: inter mode probabilities. ++ * @interp_filter: interpolation filter probabilities. ++ * @is_inter: is inter-block probabilities. ++ * @comp_mode: compound prediction mode probabilities. ++ * @single_ref: single ref probabilities. ++ * @comp_ref: compound ref probabilities. ++ * @y_mode: Y prediction mode probabilities. ++ * @uv_mode: UV prediction mode probabilities. ++ * @partition: partition probabilities. ++ * @mv: motion vector probabilities. ++ * ++ * Drivers which need to keep track of frame context(s) can use this struct. ++ * The members correspond to probability tables, which are specified only implicitly in the ++ * vp9 spec. Section 10.5 "Default probability tables" contains all the types of involved ++ * tables, i.e. the actual tables are of the same kind, and when they are reset (which is ++ * mandated by the spec sometimes) they are overwritten with values from the default tables. ++ */ ++struct v4l2_vp9_frame_context { ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 coef[4][2][2][6][6][3]; ++ u8 skip[3]; ++ u8 inter_mode[7][3]; ++ u8 interp_filter[4][2]; ++ u8 is_inter[4]; ++ u8 comp_mode[5]; ++ u8 single_ref[5][2]; ++ u8 comp_ref[5]; ++ u8 y_mode[4][9]; ++ u8 uv_mode[10][9]; ++ u8 partition[16][3]; ++ ++ struct v4l2_vp9_frame_mv_context mv; ++}; ++ ++/** ++ * struct v4l2_vp9_frame_symbol_counts - pointers to arrays of symbol counts ++ * ++ * @partition: partition counts. ++ * @skip: skip counts. ++ * @intra_inter: is inter-block counts. ++ * @tx32p: TX32 counts. ++ * @tx16p: TX16 counts. ++ * @tx8p: TX8 counts. ++ * @y_mode: Y prediction mode counts. ++ * @uv_mode: UV prediction mode counts. ++ * @comp: compound prediction mode counts. ++ * @comp_ref: compound ref counts. ++ * @single_ref: single ref counts. ++ * @mv_mode: inter mode counts. ++ * @filter: interpolation filter counts. ++ * @mv_joint: motion vector joint counts. ++ * @sign: motion vector sign counts. ++ * @classes: motion vector class counts. ++ * @class0: motion vector class0 bit counts. ++ * @bits: motion vector bits counts. ++ * @class0_fp: motion vector class0 fractional bit counts. ++ * @fp: motion vector fractional bit counts. ++ * @class0_hp: motion vector class0 high precision fractional bit counts. ++ * @hp: motion vector high precision fractional bit counts. ++ * @coeff: coefficient counts. ++ * @eob: eob counts ++ * ++ * The fields correspond to what is specified in section 8.3 "Clear counts process" of the spec. ++ * Different pieces of hardware can report the counts in different order, so we cannot rely on ++ * simply overlaying a struct on a relevant block of memory. Instead we provide pointers to ++ * arrays or array of pointers to arrays in case of coeff, or array of pointers for eob. ++ */ ++struct v4l2_vp9_frame_symbol_counts { ++ u32 (*partition)[16][4]; ++ u32 (*skip)[3][2]; ++ u32 (*intra_inter)[4][2]; ++ u32 (*tx32p)[2][4]; ++ u32 (*tx16p)[2][4]; ++ u32 (*tx8p)[2][2]; ++ u32 (*y_mode)[4][10]; ++ u32 (*uv_mode)[10][10]; ++ u32 (*comp)[5][2]; ++ u32 (*comp_ref)[5][2]; ++ u32 (*single_ref)[5][2][2]; ++ u32 (*mv_mode)[7][4]; ++ u32 (*filter)[4][3]; ++ u32 (*mv_joint)[4]; ++ u32 (*sign)[2][2]; ++ u32 (*classes)[2][11]; ++ u32 (*class0)[2][2]; ++ u32 (*bits)[2][10][2]; ++ u32 (*class0_fp)[2][2][4]; ++ u32 (*fp)[2][4]; ++ u32 (*class0_hp)[2][2]; ++ u32 (*hp)[2][2]; ++ u32 (*coeff[4][2][2][6][6])[3]; ++ u32 *eob[4][2][2][6][6][2]; ++}; ++ ++extern const u8 v4l2_vp9_kf_y_mode_prob[10][10][9]; /* Section 10.4 of the spec */ ++extern const u8 v4l2_vp9_kf_partition_probs[16][3]; /* Section 10.4 of the spec */ ++extern const u8 v4l2_vp9_kf_uv_mode_prob[10][9]; /* Section 10.4 of the spec */ ++extern const struct v4l2_vp9_frame_context v4l2_vp9_default_probs; /* Section 10.5 of the spec */ ++ ++/** ++ * v4l2_vp9_fw_update_probs() - Perform forward update of vp9 probabilities ++ * ++ * @probs: current probabilities values ++ * @deltas: delta values from compressed header ++ * @dec_params: vp9 frame decoding parameters ++ * ++ * This function performs forward updates of probabilities for the vp9 boolean decoder. ++ * The frame header can contain a directive to update the probabilities (deltas), if so, then ++ * the deltas are provided in the header, too. The userspace parses those and passes the said ++ * deltas struct to the kernel. ++ */ ++void v4l2_vp9_fw_update_probs(struct v4l2_vp9_frame_context *probs, ++ const struct v4l2_ctrl_vp9_compressed_hdr *deltas, ++ const struct v4l2_ctrl_vp9_frame *dec_params); ++ ++/** ++ * v4l2_vp9_reset_frame_ctx() - Reset appropriate frame context ++ * ++ * @dec_params: vp9 frame decoding parameters ++ * @frame_context: array of the 4 frame contexts ++ * ++ * This function resets appropriate frame contexts, based on what's in dec_params. ++ * ++ * Returns the frame context index after the update, which might be reset to zero if ++ * mandated by the spec. ++ */ ++u8 v4l2_vp9_reset_frame_ctx(const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct v4l2_vp9_frame_context *frame_context); ++ ++/** ++ * v4l2_vp9_adapt_coef_probs() - Perform backward update of vp9 coefficients probabilities ++ * ++ * @probs: current probabilities values ++ * @counts: values of symbol counts after the current frame has been decoded ++ * @use_128: flag to request that 128 is used as update factor if true, otherwise 112 is used ++ * @frame_is_intra: flag indicating that FrameIsIntra is true ++ * ++ * This function performs backward updates of coefficients probabilities for the vp9 boolean ++ * decoder. After a frame has been decoded the counts of how many times a given symbol has ++ * occurred are known and are used to update the probability of each symbol. ++ */ ++void v4l2_vp9_adapt_coef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ bool use_128, ++ bool frame_is_intra); ++ ++/** ++ * v4l2_vp9_adapt_noncoef_probs() - Perform backward update of vp9 non-coefficients probabilities ++ * ++ * @probs: current probabilities values ++ * @counts: values of symbol counts after the current frame has been decoded ++ * @reference_mode: specifies the type of inter prediction to be used. See ++ * &v4l2_vp9_reference_mode for more details ++ * @interpolation_filter: specifies the filter selection used for performing inter prediction. ++ * See &v4l2_vp9_interpolation_filter for more details ++ * @tx_mode: specifies the TX mode. See &v4l2_vp9_tx_mode for more details ++ * @flags: combination of V4L2_VP9_FRAME_FLAG_* flags ++ * ++ * This function performs backward updates of non-coefficients probabilities for the vp9 boolean ++ * decoder. After a frame has been decoded the counts of how many times a given symbol has ++ * occurred are known and are used to update the probability of each symbol. ++ */ ++void v4l2_vp9_adapt_noncoef_probs(struct v4l2_vp9_frame_context *probs, ++ struct v4l2_vp9_frame_symbol_counts *counts, ++ u8 reference_mode, u8 interpolation_filter, u8 tx_mode, ++ u32 flags); ++ ++/** ++ * v4l2_vp9_seg_feat_enabled() - Check if a segmentation feature is enabled ++ * ++ * @feature_enabled: array of 8-bit flags (for all segments) ++ * @feature: id of the feature to check ++ * @segid: id of the segment to look up ++ * ++ * This function returns true if a given feature is active in a given segment. ++ */ ++bool ++v4l2_vp9_seg_feat_enabled(const u8 *feature_enabled, ++ unsigned int feature, ++ unsigned int segid); ++ ++#endif /* _MEDIA_V4L2_VP9_H */ + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Wed, 17 Nov 2021 12:52:56 +0100 +Subject: [PATCH] media: rkvdec: Add the VP9 backend + +The Rockchip VDEC supports VP9 profile 0 up to 4096x2304@30fps. Add +a backend for this new format. + +Signed-off-by: Boris Brezillon +Signed-off-by: Ezequiel Garcia +Signed-off-by: Adrian Ratiu +Co-developed-by: Andrzej Pietrasiewicz +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/rkvdec/Kconfig | 1 + + drivers/staging/media/rkvdec/Makefile | 2 +- + drivers/staging/media/rkvdec/rkvdec-vp9.c | 1072 +++++++++++++++++++++ + drivers/staging/media/rkvdec/rkvdec.c | 41 +- + drivers/staging/media/rkvdec/rkvdec.h | 12 +- + 5 files changed, 1121 insertions(+), 7 deletions(-) + create mode 100644 drivers/staging/media/rkvdec/rkvdec-vp9.c + +diff --git a/drivers/staging/media/rkvdec/Kconfig b/drivers/staging/media/rkvdec/Kconfig +index c02199b5e0fd..dc7292f346fa 100644 +--- a/drivers/staging/media/rkvdec/Kconfig ++++ b/drivers/staging/media/rkvdec/Kconfig +@@ -9,6 +9,7 @@ config VIDEO_ROCKCHIP_VDEC + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + select V4L2_H264 ++ select V4L2_VP9 + help + Support for the Rockchip Video Decoder IP present on Rockchip SoCs, + which accelerates video decoding. +diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile +index c08fed0a39f9..cb86b429cfaa 100644 +--- a/drivers/staging/media/rkvdec/Makefile ++++ b/drivers/staging/media/rkvdec/Makefile +@@ -1,3 +1,3 @@ + obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o + +-rockchip-vdec-y += rkvdec.o rkvdec-h264.o ++rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o +diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c +new file mode 100644 +index 000000000000..311a12656072 +--- /dev/null ++++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c +@@ -0,0 +1,1072 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Rockchip Video Decoder VP9 backend ++ * ++ * Copyright (C) 2019 Collabora, Ltd. ++ * Boris Brezillon ++ * Copyright (C) 2021 Collabora, Ltd. ++ * Andrzej Pietrasiewicz ++ * ++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd. ++ * Alpha Lin ++ */ ++ ++/* ++ * For following the vp9 spec please start reading this driver ++ * code from rkvdec_vp9_run() followed by rkvdec_vp9_done(). ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "rkvdec.h" ++#include "rkvdec-regs.h" ++ ++#define RKVDEC_VP9_PROBE_SIZE 4864 ++#define RKVDEC_VP9_COUNT_SIZE 13232 ++#define RKVDEC_VP9_MAX_SEGMAP_SIZE 73728 ++ ++struct rkvdec_vp9_intra_mode_probs { ++ u8 y_mode[105]; ++ u8 uv_mode[23]; ++}; ++ ++struct rkvdec_vp9_intra_only_frame_probs { ++ u8 coef_intra[4][2][128]; ++ struct rkvdec_vp9_intra_mode_probs intra_mode[10]; ++}; ++ ++struct rkvdec_vp9_inter_frame_probs { ++ u8 y_mode[4][9]; ++ u8 comp_mode[5]; ++ u8 comp_ref[5]; ++ u8 single_ref[5][2]; ++ u8 inter_mode[7][3]; ++ u8 interp_filter[4][2]; ++ u8 padding0[11]; ++ u8 coef[2][4][2][128]; ++ u8 uv_mode_0_2[3][9]; ++ u8 padding1[5]; ++ u8 uv_mode_3_5[3][9]; ++ u8 padding2[5]; ++ u8 uv_mode_6_8[3][9]; ++ u8 padding3[5]; ++ u8 uv_mode_9[9]; ++ u8 padding4[7]; ++ u8 padding5[16]; ++ struct { ++ u8 joint[3]; ++ u8 sign[2]; ++ u8 classes[2][10]; ++ u8 class0_bit[2]; ++ u8 bits[2][10]; ++ u8 class0_fr[2][2][3]; ++ u8 fr[2][3]; ++ u8 class0_hp[2]; ++ u8 hp[2]; ++ } mv; ++}; ++ ++struct rkvdec_vp9_probs { ++ u8 partition[16][3]; ++ u8 pred[3]; ++ u8 tree[7]; ++ u8 skip[3]; ++ u8 tx32[2][3]; ++ u8 tx16[2][2]; ++ u8 tx8[2][1]; ++ u8 is_inter[4]; ++ /* 128 bit alignment */ ++ u8 padding0[3]; ++ union { ++ struct rkvdec_vp9_inter_frame_probs inter; ++ struct rkvdec_vp9_intra_only_frame_probs intra_only; ++ }; ++}; ++ ++/* Data structure describing auxiliary buffer format. */ ++struct rkvdec_vp9_priv_tbl { ++ struct rkvdec_vp9_probs probs; ++ u8 segmap[2][RKVDEC_VP9_MAX_SEGMAP_SIZE]; ++}; ++ ++struct rkvdec_vp9_refs_counts { ++ u32 eob[2]; ++ u32 coeff[3]; ++}; ++ ++struct rkvdec_vp9_inter_frame_symbol_counts { ++ u32 partition[16][4]; ++ u32 skip[3][2]; ++ u32 inter[4][2]; ++ u32 tx32p[2][4]; ++ u32 tx16p[2][4]; ++ u32 tx8p[2][2]; ++ u32 y_mode[4][10]; ++ u32 uv_mode[10][10]; ++ u32 comp[5][2]; ++ u32 comp_ref[5][2]; ++ u32 single_ref[5][2][2]; ++ u32 mv_mode[7][4]; ++ u32 filter[4][3]; ++ u32 mv_joint[4]; ++ u32 sign[2][2]; ++ /* add 1 element for align */ ++ u32 classes[2][11 + 1]; ++ u32 class0[2][2]; ++ u32 bits[2][10][2]; ++ u32 class0_fp[2][2][4]; ++ u32 fp[2][4]; ++ u32 class0_hp[2][2]; ++ u32 hp[2][2]; ++ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; ++}; ++ ++struct rkvdec_vp9_intra_frame_symbol_counts { ++ u32 partition[4][4][4]; ++ u32 skip[3][2]; ++ u32 intra[4][2]; ++ u32 tx32p[2][4]; ++ u32 tx16p[2][4]; ++ u32 tx8p[2][2]; ++ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; ++}; ++ ++struct rkvdec_vp9_run { ++ struct rkvdec_run base; ++ const struct v4l2_ctrl_vp9_frame *decode_params; ++}; ++ ++struct rkvdec_vp9_frame_info { ++ u32 valid : 1; ++ u32 segmapid : 1; ++ u32 frame_context_idx : 2; ++ u32 reference_mode : 2; ++ u32 tx_mode : 3; ++ u32 interpolation_filter : 3; ++ u32 flags; ++ u64 timestamp; ++ struct v4l2_vp9_segmentation seg; ++ struct v4l2_vp9_loop_filter lf; ++}; ++ ++struct rkvdec_vp9_ctx { ++ struct rkvdec_aux_buf priv_tbl; ++ struct rkvdec_aux_buf count_tbl; ++ struct v4l2_vp9_frame_symbol_counts inter_cnts; ++ struct v4l2_vp9_frame_symbol_counts intra_cnts; ++ struct v4l2_vp9_frame_context probability_tables; ++ struct v4l2_vp9_frame_context frame_context[4]; ++ struct rkvdec_vp9_frame_info cur; ++ struct rkvdec_vp9_frame_info last; ++}; ++ ++static void write_coeff_plane(const u8 coef[6][6][3], u8 *coeff_plane) ++{ ++ unsigned int idx = 0, byte_count = 0; ++ int k, m, n; ++ u8 p; ++ ++ for (k = 0; k < 6; k++) { ++ for (m = 0; m < 6; m++) { ++ for (n = 0; n < 3; n++) { ++ p = coef[k][m][n]; ++ coeff_plane[idx++] = p; ++ byte_count++; ++ if (byte_count == 27) { ++ idx += 5; ++ byte_count = 0; ++ } ++ } ++ } ++ } ++} ++ ++static void init_intra_only_probs(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; ++ struct rkvdec_vp9_intra_only_frame_probs *rkprobs; ++ const struct v4l2_vp9_frame_context *probs; ++ unsigned int i, j, k; ++ ++ rkprobs = &tbl->probs.intra_only; ++ probs = &vp9_ctx->probability_tables; ++ ++ /* ++ * intra only 149 x 128 bits ,aligned to 152 x 128 bits coeff related ++ * prob 64 x 128 bits ++ */ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) ++ write_coeff_plane(probs->coef[i][j][0], ++ rkprobs->coef_intra[i][j]); ++ } ++ ++ /* intra mode prob 80 x 128 bits */ ++ for (i = 0; i < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob); i++) { ++ unsigned int byte_count = 0; ++ int idx = 0; ++ ++ /* vp9_kf_y_mode_prob */ ++ for (j = 0; j < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0]); j++) { ++ for (k = 0; k < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0][0]); ++ k++) { ++ u8 val = v4l2_vp9_kf_y_mode_prob[i][j][k]; ++ ++ rkprobs->intra_mode[i].y_mode[idx++] = val; ++ byte_count++; ++ if (byte_count == 27) { ++ byte_count = 0; ++ idx += 5; ++ } ++ } ++ } ++ ++ } ++ ++ for (i = 0; i < sizeof(v4l2_vp9_kf_uv_mode_prob); ++i) { ++ const u8 *ptr = (const u8 *)v4l2_vp9_kf_uv_mode_prob; ++ ++ rkprobs->intra_mode[i / 23].uv_mode[i % 23] = ptr[i]; ++ } ++} ++ ++static void init_inter_probs(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; ++ struct rkvdec_vp9_inter_frame_probs *rkprobs; ++ const struct v4l2_vp9_frame_context *probs; ++ unsigned int i, j, k; ++ ++ rkprobs = &tbl->probs.inter; ++ probs = &vp9_ctx->probability_tables; ++ ++ /* ++ * inter probs ++ * 151 x 128 bits, aligned to 152 x 128 bits ++ * inter only ++ * intra_y_mode & inter_block info 6 x 128 bits ++ */ ++ ++ memcpy(rkprobs->y_mode, probs->y_mode, sizeof(rkprobs->y_mode)); ++ memcpy(rkprobs->comp_mode, probs->comp_mode, ++ sizeof(rkprobs->comp_mode)); ++ memcpy(rkprobs->comp_ref, probs->comp_ref, ++ sizeof(rkprobs->comp_ref)); ++ memcpy(rkprobs->single_ref, probs->single_ref, ++ sizeof(rkprobs->single_ref)); ++ memcpy(rkprobs->inter_mode, probs->inter_mode, ++ sizeof(rkprobs->inter_mode)); ++ memcpy(rkprobs->interp_filter, probs->interp_filter, ++ sizeof(rkprobs->interp_filter)); ++ ++ /* 128 x 128 bits coeff related */ ++ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { ++ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { ++ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) ++ write_coeff_plane(probs->coef[i][j][k], ++ rkprobs->coef[k][i][j]); ++ } ++ } ++ ++ /* intra uv mode 6 x 128 */ ++ memcpy(rkprobs->uv_mode_0_2, &probs->uv_mode[0], ++ sizeof(rkprobs->uv_mode_0_2)); ++ memcpy(rkprobs->uv_mode_3_5, &probs->uv_mode[3], ++ sizeof(rkprobs->uv_mode_3_5)); ++ memcpy(rkprobs->uv_mode_6_8, &probs->uv_mode[6], ++ sizeof(rkprobs->uv_mode_6_8)); ++ memcpy(rkprobs->uv_mode_9, &probs->uv_mode[9], ++ sizeof(rkprobs->uv_mode_9)); ++ ++ /* mv related 6 x 128 */ ++ memcpy(rkprobs->mv.joint, probs->mv.joint, ++ sizeof(rkprobs->mv.joint)); ++ memcpy(rkprobs->mv.sign, probs->mv.sign, ++ sizeof(rkprobs->mv.sign)); ++ memcpy(rkprobs->mv.classes, probs->mv.classes, ++ sizeof(rkprobs->mv.classes)); ++ memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, ++ sizeof(rkprobs->mv.class0_bit)); ++ memcpy(rkprobs->mv.bits, probs->mv.bits, ++ sizeof(rkprobs->mv.bits)); ++ memcpy(rkprobs->mv.class0_fr, probs->mv.class0_fr, ++ sizeof(rkprobs->mv.class0_fr)); ++ memcpy(rkprobs->mv.fr, probs->mv.fr, ++ sizeof(rkprobs->mv.fr)); ++ memcpy(rkprobs->mv.class0_hp, probs->mv.class0_hp, ++ sizeof(rkprobs->mv.class0_hp)); ++ memcpy(rkprobs->mv.hp, probs->mv.hp, ++ sizeof(rkprobs->mv.hp)); ++} ++ ++static void init_probs(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ const struct v4l2_ctrl_vp9_frame *dec_params; ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; ++ struct rkvdec_vp9_probs *rkprobs = &tbl->probs; ++ const struct v4l2_vp9_segmentation *seg; ++ const struct v4l2_vp9_frame_context *probs; ++ bool intra_only; ++ ++ dec_params = run->decode_params; ++ probs = &vp9_ctx->probability_tables; ++ seg = &dec_params->seg; ++ ++ memset(rkprobs, 0, sizeof(*rkprobs)); ++ ++ intra_only = !!(dec_params->flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); ++ ++ /* sb info 5 x 128 bit */ ++ memcpy(rkprobs->partition, ++ intra_only ? v4l2_vp9_kf_partition_probs : probs->partition, ++ sizeof(rkprobs->partition)); ++ ++ memcpy(rkprobs->pred, seg->pred_probs, sizeof(rkprobs->pred)); ++ memcpy(rkprobs->tree, seg->tree_probs, sizeof(rkprobs->tree)); ++ memcpy(rkprobs->skip, probs->skip, sizeof(rkprobs->skip)); ++ memcpy(rkprobs->tx32, probs->tx32, sizeof(rkprobs->tx32)); ++ memcpy(rkprobs->tx16, probs->tx16, sizeof(rkprobs->tx16)); ++ memcpy(rkprobs->tx8, probs->tx8, sizeof(rkprobs->tx8)); ++ memcpy(rkprobs->is_inter, probs->is_inter, sizeof(rkprobs->is_inter)); ++ ++ if (intra_only) ++ init_intra_only_probs(ctx, run); ++ else ++ init_inter_probs(ctx, run); ++} ++ ++struct rkvdec_vp9_ref_reg { ++ u32 reg_frm_size; ++ u32 reg_hor_stride; ++ u32 reg_y_stride; ++ u32 reg_yuv_stride; ++ u32 reg_ref_base; ++}; ++ ++static struct rkvdec_vp9_ref_reg ref_regs[] = { ++ { ++ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(0), ++ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(0), ++ .reg_y_stride = RKVDEC_VP9_LAST_FRAME_YSTRIDE, ++ .reg_yuv_stride = RKVDEC_VP9_LAST_FRAME_YUVSTRIDE, ++ .reg_ref_base = RKVDEC_REG_VP9_LAST_FRAME_BASE, ++ }, ++ { ++ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(1), ++ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(1), ++ .reg_y_stride = RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE, ++ .reg_yuv_stride = 0, ++ .reg_ref_base = RKVDEC_REG_VP9_GOLDEN_FRAME_BASE, ++ }, ++ { ++ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(2), ++ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(2), ++ .reg_y_stride = RKVDEC_VP9_ALTREF_FRAME_YSTRIDE, ++ .reg_yuv_stride = 0, ++ .reg_ref_base = RKVDEC_REG_VP9_ALTREF_FRAME_BASE, ++ } ++}; ++ ++static struct rkvdec_decoded_buffer * ++get_ref_buf(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) ++{ ++ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; ++ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; ++ int buf_idx; ++ ++ /* ++ * If a ref is unused or invalid, address of current destination ++ * buffer is returned. ++ */ ++ buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); ++ if (buf_idx < 0) ++ return vb2_to_rkvdec_decoded_buf(&dst->vb2_buf); ++ ++ return vb2_to_rkvdec_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); ++} ++ ++static dma_addr_t get_mv_base_addr(struct rkvdec_decoded_buffer *buf) ++{ ++ unsigned int aligned_pitch, aligned_height, yuv_len; ++ ++ aligned_height = round_up(buf->vp9.height, 64); ++ aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; ++ yuv_len = (aligned_height * aligned_pitch * 3) / 2; ++ ++ return vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0) + ++ yuv_len; ++} ++ ++static void config_ref_registers(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run, ++ struct rkvdec_decoded_buffer *ref_buf, ++ struct rkvdec_vp9_ref_reg *ref_reg) ++{ ++ unsigned int aligned_pitch, aligned_height, y_len, yuv_len; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ ++ aligned_height = round_up(ref_buf->vp9.height, 64); ++ writel_relaxed(RKVDEC_VP9_FRAMEWIDTH(ref_buf->vp9.width) | ++ RKVDEC_VP9_FRAMEHEIGHT(ref_buf->vp9.height), ++ rkvdec->regs + ref_reg->reg_frm_size); ++ ++ writel_relaxed(vb2_dma_contig_plane_dma_addr(&ref_buf->base.vb.vb2_buf, 0), ++ rkvdec->regs + ref_reg->reg_ref_base); ++ ++ if (&ref_buf->base.vb == run->base.bufs.dst) ++ return; ++ ++ aligned_pitch = round_up(ref_buf->vp9.width * ref_buf->vp9.bit_depth, 512) / 8; ++ y_len = aligned_height * aligned_pitch; ++ yuv_len = (y_len * 3) / 2; ++ ++ writel_relaxed(RKVDEC_HOR_Y_VIRSTRIDE(aligned_pitch / 16) | ++ RKVDEC_HOR_UV_VIRSTRIDE(aligned_pitch / 16), ++ rkvdec->regs + ref_reg->reg_hor_stride); ++ writel_relaxed(RKVDEC_VP9_REF_YSTRIDE(y_len / 16), ++ rkvdec->regs + ref_reg->reg_y_stride); ++ ++ if (!ref_reg->reg_yuv_stride) ++ return; ++ ++ writel_relaxed(RKVDEC_VP9_REF_YUVSTRIDE(yuv_len / 16), ++ rkvdec->regs + ref_reg->reg_yuv_stride); ++} ++ ++static void config_seg_registers(struct rkvdec_ctx *ctx, unsigned int segid) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ const struct v4l2_vp9_segmentation *seg; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ s16 feature_val; ++ int feature_id; ++ u32 val = 0; ++ ++ seg = vp9_ctx->last.valid ? &vp9_ctx->last.seg : &vp9_ctx->cur.seg; ++ feature_id = V4L2_VP9_SEG_LVL_ALT_Q; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { ++ feature_val = seg->feature_data[segid][feature_id]; ++ val |= RKVDEC_SEGID_FRAME_QP_DELTA_EN(1) | ++ RKVDEC_SEGID_FRAME_QP_DELTA(feature_val); ++ } ++ ++ feature_id = V4L2_VP9_SEG_LVL_ALT_L; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { ++ feature_val = seg->feature_data[segid][feature_id]; ++ val |= RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(1) | ++ RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(feature_val); ++ } ++ ++ feature_id = V4L2_VP9_SEG_LVL_REF_FRAME; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { ++ feature_val = seg->feature_data[segid][feature_id]; ++ val |= RKVDEC_SEGID_REFERINFO_EN(1) | ++ RKVDEC_SEGID_REFERINFO(feature_val); ++ } ++ ++ feature_id = V4L2_VP9_SEG_LVL_SKIP; ++ if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) ++ val |= RKVDEC_SEGID_FRAME_SKIP_EN(1); ++ ++ if (!segid && ++ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) ++ val |= RKVDEC_SEGID_ABS_DELTA(1); ++ ++ writel_relaxed(val, rkvdec->regs + RKVDEC_VP9_SEGID_GRP(segid)); ++} ++ ++static void update_dec_buf_info(struct rkvdec_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ buf->vp9.width = dec_params->frame_width_minus_1 + 1; ++ buf->vp9.height = dec_params->frame_height_minus_1 + 1; ++ buf->vp9.bit_depth = dec_params->bit_depth; ++} ++ ++static void update_ctx_cur_info(struct rkvdec_vp9_ctx *vp9_ctx, ++ struct rkvdec_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ vp9_ctx->cur.valid = true; ++ vp9_ctx->cur.reference_mode = dec_params->reference_mode; ++ vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; ++ vp9_ctx->cur.flags = dec_params->flags; ++ vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; ++ vp9_ctx->cur.seg = dec_params->seg; ++ vp9_ctx->cur.lf = dec_params->lf; ++} ++ ++static void update_ctx_last_info(struct rkvdec_vp9_ctx *vp9_ctx) ++{ ++ vp9_ctx->last = vp9_ctx->cur; ++} ++ ++static void config_registers(struct rkvdec_ctx *ctx, ++ const struct rkvdec_vp9_run *run) ++{ ++ unsigned int y_len, uv_len, yuv_len, bit_depth, aligned_height, aligned_pitch, stream_len; ++ const struct v4l2_ctrl_vp9_frame *dec_params; ++ struct rkvdec_decoded_buffer *ref_bufs[3]; ++ struct rkvdec_decoded_buffer *dst, *last, *mv_ref; ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ u32 val, last_frame_info = 0; ++ const struct v4l2_vp9_segmentation *seg; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ dma_addr_t addr; ++ bool intra_only; ++ unsigned int i; ++ ++ dec_params = run->decode_params; ++ dst = vb2_to_rkvdec_decoded_buf(&run->base.bufs.dst->vb2_buf); ++ ref_bufs[0] = get_ref_buf(ctx, &dst->base.vb, dec_params->last_frame_ts); ++ ref_bufs[1] = get_ref_buf(ctx, &dst->base.vb, dec_params->golden_frame_ts); ++ ref_bufs[2] = get_ref_buf(ctx, &dst->base.vb, dec_params->alt_frame_ts); ++ ++ if (vp9_ctx->last.valid) ++ last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); ++ else ++ last = dst; ++ ++ update_dec_buf_info(dst, dec_params); ++ update_ctx_cur_info(vp9_ctx, dst, dec_params); ++ seg = &dec_params->seg; ++ ++ intra_only = !!(dec_params->flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); ++ ++ writel_relaxed(RKVDEC_MODE(RKVDEC_MODE_VP9), ++ rkvdec->regs + RKVDEC_REG_SYSCTRL); ++ ++ bit_depth = dec_params->bit_depth; ++ aligned_height = round_up(ctx->decoded_fmt.fmt.pix_mp.height, 64); ++ ++ aligned_pitch = round_up(ctx->decoded_fmt.fmt.pix_mp.width * ++ bit_depth, ++ 512) / 8; ++ y_len = aligned_height * aligned_pitch; ++ uv_len = y_len / 2; ++ yuv_len = y_len + uv_len; ++ ++ writel_relaxed(RKVDEC_Y_HOR_VIRSTRIDE(aligned_pitch / 16) | ++ RKVDEC_UV_HOR_VIRSTRIDE(aligned_pitch / 16), ++ rkvdec->regs + RKVDEC_REG_PICPAR); ++ writel_relaxed(RKVDEC_Y_VIRSTRIDE(y_len / 16), ++ rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); ++ writel_relaxed(RKVDEC_YUV_VIRSTRIDE(yuv_len / 16), ++ rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); ++ ++ stream_len = vb2_get_plane_payload(&run->base.bufs.src->vb2_buf, 0); ++ writel_relaxed(RKVDEC_STRM_LEN(stream_len), ++ rkvdec->regs + RKVDEC_REG_STRM_LEN); ++ ++ /* ++ * Reset count buffer, because decoder only output intra related syntax ++ * counts when decoding intra frame, but update entropy need to update ++ * all the probabilities. ++ */ ++ if (intra_only) ++ memset(vp9_ctx->count_tbl.cpu, 0, vp9_ctx->count_tbl.size); ++ ++ vp9_ctx->cur.segmapid = vp9_ctx->last.segmapid; ++ if (!intra_only && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ (!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) || ++ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP))) ++ vp9_ctx->cur.segmapid++; ++ ++ for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) ++ config_ref_registers(ctx, run, ref_bufs[i], &ref_regs[i]); ++ ++ for (i = 0; i < 8; i++) ++ config_seg_registers(ctx, i); ++ ++ writel_relaxed(RKVDEC_VP9_TX_MODE(vp9_ctx->cur.tx_mode) | ++ RKVDEC_VP9_FRAME_REF_MODE(dec_params->reference_mode), ++ rkvdec->regs + RKVDEC_VP9_CPRHEADER_CONFIG); ++ ++ if (!intra_only) { ++ const struct v4l2_vp9_loop_filter *lf; ++ s8 delta; ++ ++ if (vp9_ctx->last.valid) ++ lf = &vp9_ctx->last.lf; ++ else ++ lf = &vp9_ctx->cur.lf; ++ ++ val = 0; ++ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { ++ delta = lf->ref_deltas[i]; ++ val |= RKVDEC_REF_DELTAS_LASTFRAME(i, delta); ++ } ++ ++ writel_relaxed(val, ++ rkvdec->regs + RKVDEC_VP9_REF_DELTAS_LASTFRAME); ++ ++ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { ++ delta = lf->mode_deltas[i]; ++ last_frame_info |= RKVDEC_MODE_DELTAS_LASTFRAME(i, ++ delta); ++ } ++ } ++ ++ if (vp9_ctx->last.valid && !intra_only && ++ vp9_ctx->last.seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) ++ last_frame_info |= RKVDEC_SEG_EN_LASTFRAME; ++ ++ if (vp9_ctx->last.valid && ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME) ++ last_frame_info |= RKVDEC_LAST_SHOW_FRAME; ++ ++ if (vp9_ctx->last.valid && ++ vp9_ctx->last.flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) ++ last_frame_info |= RKVDEC_LAST_INTRA_ONLY; ++ ++ if (vp9_ctx->last.valid && ++ last->vp9.width == dst->vp9.width && ++ last->vp9.height == dst->vp9.height) ++ last_frame_info |= RKVDEC_LAST_WIDHHEIGHT_EQCUR; ++ ++ writel_relaxed(last_frame_info, ++ rkvdec->regs + RKVDEC_VP9_INFO_LASTFRAME); ++ ++ writel_relaxed(stream_len - dec_params->compressed_header_size - ++ dec_params->uncompressed_header_size, ++ rkvdec->regs + RKVDEC_VP9_LASTTILE_SIZE); ++ ++ for (i = 0; !intra_only && i < ARRAY_SIZE(ref_bufs); i++) { ++ unsigned int refw = ref_bufs[i]->vp9.width; ++ unsigned int refh = ref_bufs[i]->vp9.height; ++ u32 hscale, vscale; ++ ++ hscale = (refw << 14) / dst->vp9.width; ++ vscale = (refh << 14) / dst->vp9.height; ++ writel_relaxed(RKVDEC_VP9_REF_HOR_SCALE(hscale) | ++ RKVDEC_VP9_REF_VER_SCALE(vscale), ++ rkvdec->regs + RKVDEC_VP9_REF_SCALE(i)); ++ } ++ ++ addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); ++ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); ++ addr = vb2_dma_contig_plane_dma_addr(&run->base.bufs.src->vb2_buf, 0); ++ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); ++ writel_relaxed(vp9_ctx->priv_tbl.dma + ++ offsetof(struct rkvdec_vp9_priv_tbl, probs), ++ rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); ++ writel_relaxed(vp9_ctx->count_tbl.dma, ++ rkvdec->regs + RKVDEC_REG_VP9COUNT_BASE); ++ ++ writel_relaxed(vp9_ctx->priv_tbl.dma + ++ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + ++ (RKVDEC_VP9_MAX_SEGMAP_SIZE * vp9_ctx->cur.segmapid), ++ rkvdec->regs + RKVDEC_REG_VP9_SEGIDCUR_BASE); ++ writel_relaxed(vp9_ctx->priv_tbl.dma + ++ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + ++ (RKVDEC_VP9_MAX_SEGMAP_SIZE * (!vp9_ctx->cur.segmapid)), ++ rkvdec->regs + RKVDEC_REG_VP9_SEGIDLAST_BASE); ++ ++ if (!intra_only && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ vp9_ctx->last.valid) ++ mv_ref = last; ++ else ++ mv_ref = dst; ++ ++ writel_relaxed(get_mv_base_addr(mv_ref), ++ rkvdec->regs + RKVDEC_VP9_REF_COLMV_BASE); ++ ++ writel_relaxed(ctx->decoded_fmt.fmt.pix_mp.width | ++ (ctx->decoded_fmt.fmt.pix_mp.height << 16), ++ rkvdec->regs + RKVDEC_REG_PERFORMANCE_CYCLE); ++} ++ ++static int validate_dec_params(struct rkvdec_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ unsigned int aligned_width, aligned_height; ++ ++ /* We only support profile 0. */ ++ if (dec_params->profile != 0) { ++ dev_err(ctx->dev->dev, "unsupported profile %d\n", ++ dec_params->profile); ++ return -EINVAL; ++ } ++ ++ aligned_width = round_up(dec_params->frame_width_minus_1 + 1, 64); ++ aligned_height = round_up(dec_params->frame_height_minus_1 + 1, 64); ++ ++ /* ++ * Userspace should update the capture/decoded format when the ++ * resolution changes. ++ */ ++ if (aligned_width != ctx->decoded_fmt.fmt.pix_mp.width || ++ aligned_height != ctx->decoded_fmt.fmt.pix_mp.height) { ++ dev_err(ctx->dev->dev, ++ "unexpected bitstream resolution %dx%d\n", ++ dec_params->frame_width_minus_1 + 1, ++ dec_params->frame_height_minus_1 + 1); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rkvdec_vp9_run_preamble(struct rkvdec_ctx *ctx, ++ struct rkvdec_vp9_run *run) ++{ ++ const struct v4l2_ctrl_vp9_frame *dec_params; ++ const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct v4l2_ctrl *ctrl; ++ unsigned int fctx_idx; ++ int ret; ++ ++ /* v4l2-specific stuff */ ++ rkvdec_run_preamble(ctx, &run->base); ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, ++ V4L2_CID_STATELESS_VP9_FRAME); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ dec_params = ctrl->p_cur.p; ++ ++ ret = validate_dec_params(ctx, dec_params); ++ if (ret) ++ return ret; ++ ++ run->decode_params = dec_params; ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ prob_updates = ctrl->p_cur.p; ++ vp9_ctx->cur.tx_mode = prob_updates->tx_mode; ++ ++ /* ++ * vp9 stuff ++ * ++ * by this point the userspace has done all parts of 6.2 uncompressed_header() ++ * except this fragment: ++ * if ( FrameIsIntra || error_resilient_mode ) { ++ * setup_past_independence ( ) ++ * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || ++ * reset_frame_context == 3 ) { ++ * for ( i = 0; i < 4; i ++ ) { ++ * save_probs( i ) ++ * } ++ * } else if ( reset_frame_context == 2 ) { ++ * save_probs( frame_context_idx ) ++ * } ++ * frame_context_idx = 0 ++ * } ++ */ ++ fctx_idx = v4l2_vp9_reset_frame_ctx(dec_params, vp9_ctx->frame_context); ++ vp9_ctx->cur.frame_context_idx = fctx_idx; ++ ++ /* 6.1 frame(sz): load_probs() and load_probs2() */ ++ vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* ++ * The userspace has also performed 6.3 compressed_header(), but handling the ++ * probs in a special way. All probs which need updating, except MV-related, ++ * have been read from the bitstream and translated through inv_map_table[], ++ * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed ++ * by userspace are either translated values (there are no 0 values in ++ * inv_map_table[]), or zero to indicate no update. All MV-related probs which need ++ * updating have been read from the bitstream and (mv_prob << 1) | 1 has been ++ * performed. The values passed by userspace are either new values ++ * to replace old ones (the above mentioned shift and bitwise or never result in ++ * a zero) or zero to indicate no update. ++ * fw_update_probs() performs actual probs updates or leaves probs as-is ++ * for values for which a zero was passed from userspace. ++ */ ++ v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, dec_params); ++ ++ return 0; ++} ++ ++static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_vp9_run run = { }; ++ int ret; ++ ++ ret = rkvdec_vp9_run_preamble(ctx, &run); ++ if (ret) { ++ rkvdec_run_postamble(ctx, &run.base); ++ return ret; ++ } ++ ++ /* Prepare probs. */ ++ init_probs(ctx, &run); ++ ++ /* Configure hardware registers. */ ++ config_registers(ctx, &run); ++ ++ rkvdec_run_postamble(ctx, &run.base); ++ ++ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); ++ ++ writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); ++ writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); ++ ++ writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); ++ /* Start decoding! */ ++ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | ++ RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, ++ rkvdec->regs + RKVDEC_REG_INTERRUPT); ++ ++ return 0; ++} ++ ++#define copy_tx_and_skip(p1, p2) \ ++do { \ ++ memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ ++ memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ ++ memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ ++ memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ ++} while (0) ++ ++static void rkvdec_vp9_done(struct rkvdec_ctx *ctx, ++ struct vb2_v4l2_buffer *src_buf, ++ struct vb2_v4l2_buffer *dst_buf, ++ enum vb2_buffer_state result) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ unsigned int fctx_idx; ++ ++ /* v4l2-specific stuff */ ++ if (result == VB2_BUF_STATE_ERROR) ++ goto out_update_last; ++ ++ /* ++ * vp9 stuff ++ * ++ * 6.1.2 refresh_probs() ++ * ++ * In the spec a complementary condition goes last in 6.1.2 refresh_probs(), ++ * but it makes no sense to perform all the activities from the first "if" ++ * there if we actually are not refreshing the frame context. On top of that, ++ * because of 6.2 uncompressed_header() whenever error_resilient_mode == 1, ++ * refresh_frame_context == 0. Consequently, if we don't jump to out_update_last ++ * it means error_resilient_mode must be 0. ++ */ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) ++ goto out_update_last; ++ ++ fctx_idx = vp9_ctx->cur.frame_context_idx; ++ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { ++ /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ ++ struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; ++ bool frame_is_intra = vp9_ctx->cur.flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); ++ struct tx_and_skip { ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 skip[3]; ++ } _tx_skip, *tx_skip = &_tx_skip; ++ struct v4l2_vp9_frame_symbol_counts *counts; ++ ++ /* buffer the forward-updated TX and skip probs */ ++ if (frame_is_intra) ++ copy_tx_and_skip(tx_skip, probs); ++ ++ /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ ++ *probs = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* if FrameIsIntra then undo the effect of load_probs2() */ ++ if (frame_is_intra) ++ copy_tx_and_skip(probs, tx_skip); ++ ++ counts = frame_is_intra ? &vp9_ctx->intra_cnts : &vp9_ctx->inter_cnts; ++ v4l2_vp9_adapt_coef_probs(probs, counts, ++ !vp9_ctx->last.valid || ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, ++ frame_is_intra); ++ if (!frame_is_intra) { ++ const struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts; ++ u32 classes[2][11]; ++ int i; ++ ++ inter_cnts = vp9_ctx->count_tbl.cpu; ++ for (i = 0; i < ARRAY_SIZE(classes); ++i) ++ memcpy(classes[i], inter_cnts->classes[i], sizeof(classes[0])); ++ counts->classes = &classes; ++ ++ /* load_probs2() already done */ ++ v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, ++ vp9_ctx->cur.reference_mode, ++ vp9_ctx->cur.interpolation_filter, ++ vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); ++ } ++ } ++ ++ /* 6.1.2 refresh_probs(): save_probs(fctx_idx) */ ++ vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; ++ ++out_update_last: ++ update_ctx_last_info(vp9_ctx); ++} ++ ++static void rkvdec_init_v4l2_vp9_count_tbl(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_vp9_intra_frame_symbol_counts *intra_cnts = vp9_ctx->count_tbl.cpu; ++ struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts = vp9_ctx->count_tbl.cpu; ++ int i, j, k, l, m; ++ ++ vp9_ctx->inter_cnts.partition = &inter_cnts->partition; ++ vp9_ctx->inter_cnts.skip = &inter_cnts->skip; ++ vp9_ctx->inter_cnts.intra_inter = &inter_cnts->inter; ++ vp9_ctx->inter_cnts.tx32p = &inter_cnts->tx32p; ++ vp9_ctx->inter_cnts.tx16p = &inter_cnts->tx16p; ++ vp9_ctx->inter_cnts.tx8p = &inter_cnts->tx8p; ++ ++ vp9_ctx->intra_cnts.partition = (u32 (*)[16][4])(&intra_cnts->partition); ++ vp9_ctx->intra_cnts.skip = &intra_cnts->skip; ++ vp9_ctx->intra_cnts.intra_inter = &intra_cnts->intra; ++ vp9_ctx->intra_cnts.tx32p = &intra_cnts->tx32p; ++ vp9_ctx->intra_cnts.tx16p = &intra_cnts->tx16p; ++ vp9_ctx->intra_cnts.tx8p = &intra_cnts->tx8p; ++ ++ vp9_ctx->inter_cnts.y_mode = &inter_cnts->y_mode; ++ vp9_ctx->inter_cnts.uv_mode = &inter_cnts->uv_mode; ++ vp9_ctx->inter_cnts.comp = &inter_cnts->comp; ++ vp9_ctx->inter_cnts.comp_ref = &inter_cnts->comp_ref; ++ vp9_ctx->inter_cnts.single_ref = &inter_cnts->single_ref; ++ vp9_ctx->inter_cnts.mv_mode = &inter_cnts->mv_mode; ++ vp9_ctx->inter_cnts.filter = &inter_cnts->filter; ++ vp9_ctx->inter_cnts.mv_joint = &inter_cnts->mv_joint; ++ vp9_ctx->inter_cnts.sign = &inter_cnts->sign; ++ /* ++ * rk hardware actually uses "u32 classes[2][11 + 1];" ++ * instead of "u32 classes[2][11];", so this must be explicitly ++ * copied into vp9_ctx->classes when passing the data to the ++ * vp9 library function ++ */ ++ vp9_ctx->inter_cnts.class0 = &inter_cnts->class0; ++ vp9_ctx->inter_cnts.bits = &inter_cnts->bits; ++ vp9_ctx->inter_cnts.class0_fp = &inter_cnts->class0_fp; ++ vp9_ctx->inter_cnts.fp = &inter_cnts->fp; ++ vp9_ctx->inter_cnts.class0_hp = &inter_cnts->class0_hp; ++ vp9_ctx->inter_cnts.hp = &inter_cnts->hp; ++ ++#define INNERMOST_LOOP \ ++ do { \ ++ for (m = 0; m < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0][0]); ++m) {\ ++ vp9_ctx->inter_cnts.coeff[i][j][k][l][m] = \ ++ &inter_cnts->ref_cnt[k][i][j][l][m].coeff; \ ++ vp9_ctx->inter_cnts.eob[i][j][k][l][m][0] = \ ++ &inter_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ ++ vp9_ctx->inter_cnts.eob[i][j][k][l][m][1] = \ ++ &inter_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ ++ \ ++ vp9_ctx->intra_cnts.coeff[i][j][k][l][m] = \ ++ &intra_cnts->ref_cnt[k][i][j][l][m].coeff; \ ++ vp9_ctx->intra_cnts.eob[i][j][k][l][m][0] = \ ++ &intra_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ ++ vp9_ctx->intra_cnts.eob[i][j][k][l][m][1] = \ ++ &intra_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ ++ } \ ++ } while (0) ++ ++ for (i = 0; i < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff); ++i) ++ for (j = 0; j < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0]); ++j) ++ for (k = 0; k < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0]); ++k) ++ for (l = 0; l < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0]); ++l) ++ INNERMOST_LOOP; ++#undef INNERMOST_LOOP ++} ++ ++static int rkvdec_vp9_start(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_vp9_priv_tbl *priv_tbl; ++ struct rkvdec_vp9_ctx *vp9_ctx; ++ unsigned char *count_tbl; ++ int ret; ++ ++ vp9_ctx = kzalloc(sizeof(*vp9_ctx), GFP_KERNEL); ++ if (!vp9_ctx) ++ return -ENOMEM; ++ ++ ctx->priv = vp9_ctx; ++ ++ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), ++ &vp9_ctx->priv_tbl.dma, GFP_KERNEL); ++ if (!priv_tbl) { ++ ret = -ENOMEM; ++ goto err_free_ctx; ++ } ++ ++ vp9_ctx->priv_tbl.size = sizeof(*priv_tbl); ++ vp9_ctx->priv_tbl.cpu = priv_tbl; ++ memset(priv_tbl, 0, sizeof(*priv_tbl)); ++ ++ count_tbl = dma_alloc_coherent(rkvdec->dev, RKVDEC_VP9_COUNT_SIZE, ++ &vp9_ctx->count_tbl.dma, GFP_KERNEL); ++ if (!count_tbl) { ++ ret = -ENOMEM; ++ goto err_free_priv_tbl; ++ } ++ ++ vp9_ctx->count_tbl.size = RKVDEC_VP9_COUNT_SIZE; ++ vp9_ctx->count_tbl.cpu = count_tbl; ++ memset(count_tbl, 0, sizeof(*count_tbl)); ++ rkvdec_init_v4l2_vp9_count_tbl(ctx); ++ ++ return 0; ++ ++err_free_priv_tbl: ++ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, ++ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); ++ ++err_free_ctx: ++ kfree(vp9_ctx); ++ return ret; ++} ++ ++static void rkvdec_vp9_stop(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ ++ dma_free_coherent(rkvdec->dev, vp9_ctx->count_tbl.size, ++ vp9_ctx->count_tbl.cpu, vp9_ctx->count_tbl.dma); ++ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, ++ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); ++ kfree(vp9_ctx); ++} ++ ++static int rkvdec_vp9_adjust_fmt(struct rkvdec_ctx *ctx, ++ struct v4l2_format *f) ++{ ++ struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; ++ ++ fmt->num_planes = 1; ++ if (!fmt->plane_fmt[0].sizeimage) ++ fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * 2; ++ return 0; ++} ++ ++const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops = { ++ .adjust_fmt = rkvdec_vp9_adjust_fmt, ++ .start = rkvdec_vp9_start, ++ .stop = rkvdec_vp9_stop, ++ .run = rkvdec_vp9_run, ++ .done = rkvdec_vp9_done, ++}; +diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c +index 4fd4a2907da7..ad2624c30843 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.c ++++ b/drivers/staging/media/rkvdec/rkvdec.c +@@ -99,10 +99,30 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { + .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), + }; + +-static const u32 rkvdec_h264_decoded_fmts[] = { ++static const u32 rkvdec_h264_vp9_decoded_fmts[] = { + V4L2_PIX_FMT_NV12, + }; + ++static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { ++ { ++ .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, ++ }, ++ { ++ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, ++ .cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, ++ .cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0, ++ .cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0, ++ }, ++}; ++ ++static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { ++ .ctrls = rkvdec_vp9_ctrl_descs, ++ .num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs), ++}; ++ + static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_H264_SLICE, +@@ -116,8 +136,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + }, + .ctrls = &rkvdec_h264_ctrls, + .ops = &rkvdec_h264_fmt_ops, +- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), +- .decoded_fmts = rkvdec_h264_decoded_fmts, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, ++ }, ++ { ++ .fourcc = V4L2_PIX_FMT_VP9_FRAME, ++ .frmsize = { ++ .min_width = 64, ++ .max_width = 4096, ++ .step_width = 64, ++ .min_height = 64, ++ .max_height = 2304, ++ .step_height = 64, ++ }, ++ .ctrls = &rkvdec_vp9_ctrls, ++ .ops = &rkvdec_vp9_fmt_ops, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, + } + }; + +diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h +index 52ac3874c5e5..2f4ea1786b93 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.h ++++ b/drivers/staging/media/rkvdec/rkvdec.h +@@ -42,14 +42,18 @@ struct rkvdec_run { + + struct rkvdec_vp9_decoded_buffer_info { + /* Info needed when the decoded frame serves as a reference frame. */ +- u16 width; +- u16 height; +- u32 bit_depth : 4; ++ unsigned short width; ++ unsigned short height; ++ unsigned int bit_depth : 4; + }; + + struct rkvdec_decoded_buffer { + /* Must be the first field in this struct. */ + struct v4l2_m2m_buffer base; ++ ++ union { ++ struct rkvdec_vp9_decoded_buffer_info vp9; ++ }; + }; + + static inline struct rkvdec_decoded_buffer * +@@ -116,4 +120,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + + extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; ++extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; ++ + #endif /* RKVDEC_H_ */ + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:38 +0100 +Subject: [PATCH] media: hantro: Rename registers + +Add more consistency in the way registers are named. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +--- + .../staging/media/hantro/hantro_g2_hevc_dec.c | 40 +++++++++---------- + drivers/staging/media/hantro/hantro_g2_regs.h | 28 ++++++------- + 2 files changed, 34 insertions(+), 34 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +index 76a921163b9a..abae36f9b418 100644 +--- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +@@ -448,9 +448,9 @@ static int set_ref(struct hantro_ctx *ctx) + if (dpb[i].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR) + dpb_longterm_e |= BIT(V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1 - i); + +- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); +- hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); +- hantro_write_addr(vpu, G2_REG_DMV_REF(i), mv_addr); ++ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); ++ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); ++ hantro_write_addr(vpu, G2_REF_MV_ADDR(i), mv_addr); + } + + luma_addr = hantro_hevc_get_ref_buf(ctx, decode_params->pic_order_cnt_val); +@@ -460,20 +460,20 @@ static int set_ref(struct hantro_ctx *ctx) + chroma_addr = luma_addr + cr_offset; + mv_addr = luma_addr + mv_offset; + +- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); +- hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); +- hantro_write_addr(vpu, G2_REG_DMV_REF(i++), mv_addr); ++ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); ++ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); ++ hantro_write_addr(vpu, G2_REF_MV_ADDR(i++), mv_addr); + +- hantro_write_addr(vpu, G2_ADDR_DST, luma_addr); +- hantro_write_addr(vpu, G2_ADDR_DST_CHR, chroma_addr); +- hantro_write_addr(vpu, G2_ADDR_DST_MV, mv_addr); ++ hantro_write_addr(vpu, G2_OUT_LUMA_ADDR, luma_addr); ++ hantro_write_addr(vpu, G2_OUT_CHROMA_ADDR, chroma_addr); ++ hantro_write_addr(vpu, G2_OUT_MV_ADDR, mv_addr); + + hantro_hevc_ref_remove_unused(ctx); + + for (; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) { +- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), 0); +- hantro_write_addr(vpu, G2_REG_CHR_REF(i), 0); +- hantro_write_addr(vpu, G2_REG_DMV_REF(i), 0); ++ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), 0); ++ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), 0); ++ hantro_write_addr(vpu, G2_REF_MV_ADDR(i), 0); + } + + hantro_reg_write(vpu, &g2_refer_lterm_e, dpb_longterm_e); +@@ -499,7 +499,7 @@ static void set_buffers(struct hantro_ctx *ctx) + src_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); + src_buf_len = vb2_plane_size(&src_buf->vb2_buf, 0); + +- hantro_write_addr(vpu, G2_ADDR_STR, src_dma); ++ hantro_write_addr(vpu, G2_STREAM_ADDR, src_dma); + hantro_reg_write(vpu, &g2_stream_len, src_len); + hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len); + hantro_reg_write(vpu, &g2_strm_start_offset, 0); +@@ -508,12 +508,12 @@ static void set_buffers(struct hantro_ctx *ctx) + /* Destination (decoded frame) buffer. */ + dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf); + +- hantro_write_addr(vpu, G2_RASTER_SCAN, dst_dma); +- hantro_write_addr(vpu, G2_RASTER_SCAN_CHR, dst_dma + cr_offset); +- hantro_write_addr(vpu, G2_ADDR_TILE_SIZE, ctx->hevc_dec.tile_sizes.dma); +- hantro_write_addr(vpu, G2_TILE_FILTER, ctx->hevc_dec.tile_filter.dma); +- hantro_write_addr(vpu, G2_TILE_SAO, ctx->hevc_dec.tile_sao.dma); +- hantro_write_addr(vpu, G2_TILE_BSD, ctx->hevc_dec.tile_bsd.dma); ++ hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); ++ hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + cr_offset); ++ hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma); ++ hantro_write_addr(vpu, G2_TILE_FILTER_ADDR, ctx->hevc_dec.tile_filter.dma); ++ hantro_write_addr(vpu, G2_TILE_SAO_ADDR, ctx->hevc_dec.tile_sao.dma); ++ hantro_write_addr(vpu, G2_TILE_BSD_ADDR, ctx->hevc_dec.tile_bsd.dma); + } + + static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) +@@ -563,7 +563,7 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) + for (k = 0; k < 8; k++) + *p++ = sc->scaling_list_32x32[i][8 * k + j]; + +- hantro_write_addr(vpu, HEVC_SCALING_LIST, ctx->hevc_dec.scaling_lists.dma); ++ hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma); + } + + static void hantro_g2_check_idle(struct hantro_dev *vpu) +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index bb22fa921914..24b18f839ff8 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -177,20 +177,20 @@ + #define G2_REG_CONFIG_DEC_CLK_GATE_E BIT(16) + #define G2_REG_CONFIG_DEC_CLK_GATE_IDLE_E BIT(17) + +-#define G2_ADDR_DST (G2_SWREG(65)) +-#define G2_REG_ADDR_REF(i) (G2_SWREG(67) + ((i) * 0x8)) +-#define G2_ADDR_DST_CHR (G2_SWREG(99)) +-#define G2_REG_CHR_REF(i) (G2_SWREG(101) + ((i) * 0x8)) +-#define G2_ADDR_DST_MV (G2_SWREG(133)) +-#define G2_REG_DMV_REF(i) (G2_SWREG(135) + ((i) * 0x8)) +-#define G2_ADDR_TILE_SIZE (G2_SWREG(167)) +-#define G2_ADDR_STR (G2_SWREG(169)) +-#define HEVC_SCALING_LIST (G2_SWREG(171)) +-#define G2_RASTER_SCAN (G2_SWREG(175)) +-#define G2_RASTER_SCAN_CHR (G2_SWREG(177)) +-#define G2_TILE_FILTER (G2_SWREG(179)) +-#define G2_TILE_SAO (G2_SWREG(181)) +-#define G2_TILE_BSD (G2_SWREG(183)) ++#define G2_OUT_LUMA_ADDR (G2_SWREG(65)) ++#define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8)) ++#define G2_OUT_CHROMA_ADDR (G2_SWREG(99)) ++#define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8)) ++#define G2_OUT_MV_ADDR (G2_SWREG(133)) ++#define G2_REF_MV_ADDR(i) (G2_SWREG(135) + ((i) * 0x8)) ++#define G2_TILE_SIZES_ADDR (G2_SWREG(167)) ++#define G2_STREAM_ADDR (G2_SWREG(169)) ++#define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171)) ++#define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175)) ++#define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177)) ++#define G2_TILE_FILTER_ADDR (G2_SWREG(179)) ++#define G2_TILE_SAO_ADDR (G2_SWREG(181)) ++#define G2_TILE_BSD_ADDR (G2_SWREG(183)) + + #define g2_strm_buffer_len G2_DEC_REG(258, 0, 0xffffffff) + #define g2_strm_start_offset G2_DEC_REG(259, 0, 0xffffffff) + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:39 +0100 +Subject: [PATCH] media: hantro: Prepare for other G2 codecs + +VeriSilicon Hantro G2 core supports other codecs besides hevc. +Factor out some common code in preparation for vp9 support. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Benjamin Gaignard +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/Makefile | 1 + + drivers/staging/media/hantro/hantro.h | 7 +++++ + drivers/staging/media/hantro/hantro_drv.c | 5 +++ + drivers/staging/media/hantro/hantro_g2.c | 26 ++++++++++++++++ + .../staging/media/hantro/hantro_g2_hevc_dec.c | 31 ------------------- + drivers/staging/media/hantro/hantro_g2_regs.h | 7 +++++ + drivers/staging/media/hantro/hantro_hw.h | 2 ++ + 7 files changed, 48 insertions(+), 31 deletions(-) + create mode 100644 drivers/staging/media/hantro/hantro_g2.c + +diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile +index 90036831fec4..fe6d84871d07 100644 +--- a/drivers/staging/media/hantro/Makefile ++++ b/drivers/staging/media/hantro/Makefile +@@ -12,6 +12,7 @@ hantro-vpu-y += \ + hantro_g1_mpeg2_dec.o \ + hantro_g2_hevc_dec.o \ + hantro_g1_vp8_dec.o \ ++ hantro_g2.o \ + rockchip_vpu2_hw_jpeg_enc.o \ + rockchip_vpu2_hw_h264_dec.o \ + rockchip_vpu2_hw_mpeg2_dec.o \ +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index dd5e56765d4e..d91eb2b1c509 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -369,6 +369,13 @@ static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg) + writel(val, vpu->dec_base + reg); + } + ++static inline void hantro_write_addr(struct hantro_dev *vpu, ++ unsigned long offset, ++ dma_addr_t addr) ++{ ++ vdpu_write(vpu, addr & 0xffffffff, offset); ++} ++ + static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg) + { + u32 val = readl(vpu->dec_base + reg); +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index fb82b9297a2b..bb72e5e208b7 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -907,6 +907,11 @@ static int hantro_probe(struct platform_device *pdev) + vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; + vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; + ++ /** ++ * TODO: Eventually allow taking advantage of full 64-bit address space. ++ * Until then we assume the MSB portion of buffers' base addresses is ++ * always 0 due to this masking operation. ++ */ + ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); +diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c +new file mode 100644 +index 000000000000..6f3e1f797f83 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_g2.c +@@ -0,0 +1,26 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Hantro VPU codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz ++ */ ++ ++#include "hantro_hw.h" ++#include "hantro_g2_regs.h" ++ ++void hantro_g2_check_idle(struct hantro_dev *vpu) ++{ ++ int i; ++ ++ for (i = 0; i < 3; i++) { ++ u32 status; ++ ++ /* Make sure the VPU is idle */ ++ status = vdpu_read(vpu, G2_REG_INTERRUPT); ++ if (status & G2_REG_INTERRUPT_DEC_E) { ++ dev_warn(vpu->dev, "device still running, aborting"); ++ status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; ++ vdpu_write(vpu, status, G2_REG_INTERRUPT); ++ } ++ } ++} +diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +index abae36f9b418..f62608b0b408 100644 +--- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +@@ -8,20 +8,6 @@ + #include "hantro_hw.h" + #include "hantro_g2_regs.h" + +-#define HEVC_DEC_MODE 0xC +- +-#define BUS_WIDTH_32 0 +-#define BUS_WIDTH_64 1 +-#define BUS_WIDTH_128 2 +-#define BUS_WIDTH_256 3 +- +-static inline void hantro_write_addr(struct hantro_dev *vpu, +- unsigned long offset, +- dma_addr_t addr) +-{ +- vdpu_write(vpu, addr & 0xffffffff, offset); +-} +- + static void prepare_tile_info_buffer(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +@@ -566,23 +552,6 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) + hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma); + } + +-static void hantro_g2_check_idle(struct hantro_dev *vpu) +-{ +- int i; +- +- for (i = 0; i < 3; i++) { +- u32 status; +- +- /* Make sure the VPU is idle */ +- status = vdpu_read(vpu, G2_REG_INTERRUPT); +- if (status & G2_REG_INTERRUPT_DEC_E) { +- dev_warn(vpu->dev, "device still running, aborting"); +- status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; +- vdpu_write(vpu, status, G2_REG_INTERRUPT); +- } +- } +-} +- + int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index 24b18f839ff8..136ba6d98a1f 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -27,6 +27,13 @@ + #define G2_REG_INTERRUPT_DEC_IRQ_DIS BIT(4) + #define G2_REG_INTERRUPT_DEC_E BIT(0) + ++#define HEVC_DEC_MODE 0xc ++ ++#define BUS_WIDTH_32 0 ++#define BUS_WIDTH_64 1 ++#define BUS_WIDTH_128 2 ++#define BUS_WIDTH_256 3 ++ + #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) + #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf) + +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 2f85430682d8..1d869abf90b2 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -312,4 +312,6 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx); + void hantro_vp8_prob_update(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp8_frame *hdr); + ++void hantro_g2_check_idle(struct hantro_dev *vpu); ++ + #endif /* HANTRO_HW_H_ */ + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:40 +0100 +Subject: [PATCH] media: hantro: Support VP9 on the G2 core + +VeriSilicon Hantro G2 core supports VP9 codec. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Benjamin Gaignard +Signed-off-by: Hans Verkuil +[hverkuil: add kerneldoc line for HANTRO_MODE_VP9_DEC] +--- + drivers/staging/media/hantro/Kconfig | 1 + + drivers/staging/media/hantro/Makefile | 6 +- + drivers/staging/media/hantro/hantro.h | 27 + + drivers/staging/media/hantro/hantro_drv.c | 18 +- + drivers/staging/media/hantro/hantro_g2_regs.h | 97 ++ + .../staging/media/hantro/hantro_g2_vp9_dec.c | 980 ++++++++++++++++++ + drivers/staging/media/hantro/hantro_hw.h | 99 ++ + drivers/staging/media/hantro/hantro_v4l2.c | 6 + + drivers/staging/media/hantro/hantro_vp9.c | 240 +++++ + drivers/staging/media/hantro/hantro_vp9.h | 102 ++ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 22 +- + 11 files changed, 1594 insertions(+), 4 deletions(-) + create mode 100644 drivers/staging/media/hantro/hantro_g2_vp9_dec.c + create mode 100644 drivers/staging/media/hantro/hantro_vp9.c + create mode 100644 drivers/staging/media/hantro/hantro_vp9.h + +diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig +index 20b1f6d7b69c..00a57d88c92e 100644 +--- a/drivers/staging/media/hantro/Kconfig ++++ b/drivers/staging/media/hantro/Kconfig +@@ -9,6 +9,7 @@ config VIDEO_HANTRO + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + select V4L2_H264 ++ select V4L2_VP9 + help + Support for the Hantro IP based Video Processing Units present on + Rockchip and NXP i.MX8M SoCs, which accelerate video and image +diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile +index fe6d84871d07..28af0a1ee4bf 100644 +--- a/drivers/staging/media/hantro/Makefile ++++ b/drivers/staging/media/hantro/Makefile +@@ -10,9 +10,10 @@ hantro-vpu-y += \ + hantro_g1.o \ + hantro_g1_h264_dec.o \ + hantro_g1_mpeg2_dec.o \ +- hantro_g2_hevc_dec.o \ + hantro_g1_vp8_dec.o \ + hantro_g2.o \ ++ hantro_g2_hevc_dec.o \ ++ hantro_g2_vp9_dec.o \ + rockchip_vpu2_hw_jpeg_enc.o \ + rockchip_vpu2_hw_h264_dec.o \ + rockchip_vpu2_hw_mpeg2_dec.o \ +@@ -21,7 +22,8 @@ hantro-vpu-y += \ + hantro_h264.o \ + hantro_hevc.o \ + hantro_mpeg2.o \ +- hantro_vp8.o ++ hantro_vp8.o \ ++ hantro_vp9.o + + hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \ + imx8m_vpu_hw.o +diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h +index d91eb2b1c509..7da23f7f207a 100644 +--- a/drivers/staging/media/hantro/hantro.h ++++ b/drivers/staging/media/hantro/hantro.h +@@ -36,6 +36,7 @@ struct hantro_postproc_ops; + #define HANTRO_VP8_DECODER BIT(17) + #define HANTRO_H264_DECODER BIT(18) + #define HANTRO_HEVC_DECODER BIT(19) ++#define HANTRO_VP9_DECODER BIT(20) + #define HANTRO_DECODERS 0xffff0000 + + /** +@@ -102,6 +103,7 @@ struct hantro_variant { + * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder. + * @HANTRO_MODE_VP8_DEC: VP8 decoder. + * @HANTRO_MODE_HEVC_DEC: HEVC decoder. ++ * @HANTRO_MODE_VP9_DEC: VP9 decoder. + */ + enum hantro_codec_mode { + HANTRO_MODE_NONE = -1, +@@ -110,6 +112,7 @@ enum hantro_codec_mode { + HANTRO_MODE_MPEG2_DEC, + HANTRO_MODE_VP8_DEC, + HANTRO_MODE_HEVC_DEC, ++ HANTRO_MODE_VP9_DEC, + }; + + /* +@@ -223,6 +226,7 @@ struct hantro_dev { + * @mpeg2_dec: MPEG-2-decoding context. + * @vp8_dec: VP8-decoding context. + * @hevc_dec: HEVC-decoding context. ++ * @vp9_dec: VP9-decoding context. + */ + struct hantro_ctx { + struct hantro_dev *dev; +@@ -250,6 +254,7 @@ struct hantro_ctx { + struct hantro_mpeg2_dec_hw_ctx mpeg2_dec; + struct hantro_vp8_dec_hw_ctx vp8_dec; + struct hantro_hevc_dec_hw_ctx hevc_dec; ++ struct hantro_vp9_dec_hw_ctx vp9_dec; + }; + }; + +@@ -299,6 +304,22 @@ struct hantro_postproc_regs { + struct hantro_reg display_width; + }; + ++struct hantro_vp9_decoded_buffer_info { ++ /* Info needed when the decoded frame serves as a reference frame. */ ++ unsigned short width; ++ unsigned short height; ++ u32 bit_depth : 4; ++}; ++ ++struct hantro_decoded_buffer { ++ /* Must be the first field in this struct. */ ++ struct v4l2_m2m_buffer base; ++ ++ union { ++ struct hantro_vp9_decoded_buffer_info vp9; ++ }; ++}; ++ + /* Logging helpers */ + + /** +@@ -436,6 +457,12 @@ hantro_get_dec_buf_addr(struct hantro_ctx *ctx, struct vb2_buffer *vb) + return vb2_dma_contig_plane_dma_addr(vb, 0); + } + ++static inline struct hantro_decoded_buffer * ++vb2_to_hantro_decoded_buf(struct vb2_buffer *buf) ++{ ++ return container_of(buf, struct hantro_decoded_buffer, base.vb.vb2_buf); ++} ++ + void hantro_postproc_disable(struct hantro_ctx *ctx); + void hantro_postproc_enable(struct hantro_ctx *ctx); + void hantro_postproc_free(struct hantro_ctx *ctx); +diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c +index bb72e5e208b7..ab2467998d29 100644 +--- a/drivers/staging/media/hantro/hantro_drv.c ++++ b/drivers/staging/media/hantro/hantro_drv.c +@@ -232,7 +232,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->ops = &hantro_queue_ops; +- dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); ++ dst_vq->buf_struct_size = sizeof(struct hantro_decoded_buffer); + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + dst_vq->lock = &ctx->dev->vpu_mutex; + dst_vq->dev = ctx->dev->v4l2_dev.dev; +@@ -263,6 +263,12 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) + if (sps->bit_depth_luma_minus8 != 0) + /* Only 8-bit is supported */ + return -EINVAL; ++ } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { ++ const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; ++ ++ /* We only support profile 0 */ ++ if (dec_params->profile != 0) ++ return -EINVAL; + } + return 0; + } +@@ -461,6 +467,16 @@ static const struct hantro_ctrl controls[] = { + .step = 1, + .ops = &hantro_hevc_ctrl_ops, + }, ++ }, { ++ .codec = HANTRO_VP9_DECODER, ++ .cfg = { ++ .id = V4L2_CID_STATELESS_VP9_FRAME, ++ }, ++ }, { ++ .codec = HANTRO_VP9_DECODER, ++ .cfg = { ++ .id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, ++ }, + }, + }; + +diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h +index 136ba6d98a1f..9c857dd1ad9b 100644 +--- a/drivers/staging/media/hantro/hantro_g2_regs.h ++++ b/drivers/staging/media/hantro/hantro_g2_regs.h +@@ -28,6 +28,7 @@ + #define G2_REG_INTERRUPT_DEC_E BIT(0) + + #define HEVC_DEC_MODE 0xc ++#define VP9_DEC_MODE 0xd + + #define BUS_WIDTH_32 0 + #define BUS_WIDTH_64 1 +@@ -49,6 +50,7 @@ + #define g2_pic_height_in_cbs G2_DEC_REG(4, 6, 0x1fff) + #define g2_num_ref_frames G2_DEC_REG(4, 0, 0x1f) + ++#define g2_start_bit G2_DEC_REG(5, 25, 0x7f) + #define g2_scaling_list_e G2_DEC_REG(5, 24, 0x1) + #define g2_cb_qp_offset G2_DEC_REG(5, 19, 0x1f) + #define g2_cr_qp_offset G2_DEC_REG(5, 14, 0x1f) +@@ -84,6 +86,7 @@ + #define g2_bit_depth_y_minus8 G2_DEC_REG(8, 6, 0x3) + #define g2_bit_depth_c_minus8 G2_DEC_REG(8, 4, 0x3) + #define g2_output_8_bits G2_DEC_REG(8, 3, 0x1) ++#define g2_output_format G2_DEC_REG(8, 0, 0x7) + + #define g2_refidx1_active G2_DEC_REG(9, 19, 0x1f) + #define g2_refidx0_active G2_DEC_REG(9, 14, 0x1f) +@@ -96,6 +99,14 @@ + #define g2_tile_e G2_DEC_REG(10, 1, 0x1) + #define g2_entropy_sync_e G2_DEC_REG(10, 0, 0x1) + ++#define vp9_transform_mode G2_DEC_REG(11, 27, 0x7) ++#define vp9_filt_sharpness G2_DEC_REG(11, 21, 0x7) ++#define vp9_mcomp_filt_type G2_DEC_REG(11, 8, 0x7) ++#define vp9_high_prec_mv_e G2_DEC_REG(11, 7, 0x1) ++#define vp9_comp_pred_mode G2_DEC_REG(11, 4, 0x3) ++#define vp9_gref_sign_bias G2_DEC_REG(11, 2, 0x1) ++#define vp9_aref_sign_bias G2_DEC_REG(11, 0, 0x1) ++ + #define g2_refer_lterm_e G2_DEC_REG(12, 16, 0xffff) + #define g2_min_cb_size G2_DEC_REG(12, 13, 0x7) + #define g2_max_cb_size G2_DEC_REG(12, 10, 0x7) +@@ -154,6 +165,50 @@ + #define g2_partial_ctb_y G2_DEC_REG(20, 30, 0x1) + #define g2_pic_width_4x4 G2_DEC_REG(20, 16, 0xfff) + #define g2_pic_height_4x4 G2_DEC_REG(20, 0, 0xfff) ++ ++#define vp9_qp_delta_y_dc G2_DEC_REG(13, 23, 0x3f) ++#define vp9_qp_delta_ch_dc G2_DEC_REG(13, 17, 0x3f) ++#define vp9_qp_delta_ch_ac G2_DEC_REG(13, 11, 0x3f) ++#define vp9_last_sign_bias G2_DEC_REG(13, 10, 0x1) ++#define vp9_lossless_e G2_DEC_REG(13, 9, 0x1) ++#define vp9_comp_pred_var_ref1 G2_DEC_REG(13, 7, 0x3) ++#define vp9_comp_pred_var_ref0 G2_DEC_REG(13, 5, 0x3) ++#define vp9_comp_pred_fixed_ref G2_DEC_REG(13, 3, 0x3) ++#define vp9_segment_temp_upd_e G2_DEC_REG(13, 2, 0x1) ++#define vp9_segment_upd_e G2_DEC_REG(13, 1, 0x1) ++#define vp9_segment_e G2_DEC_REG(13, 0, 0x1) ++ ++#define vp9_filt_level G2_DEC_REG(14, 18, 0x3f) ++#define vp9_refpic_seg0 G2_DEC_REG(14, 15, 0x7) ++#define vp9_skip_seg0 G2_DEC_REG(14, 14, 0x1) ++#define vp9_filt_level_seg0 G2_DEC_REG(14, 8, 0x3f) ++#define vp9_quant_seg0 G2_DEC_REG(14, 0, 0xff) ++ ++#define vp9_refpic_seg1 G2_DEC_REG(15, 15, 0x7) ++#define vp9_skip_seg1 G2_DEC_REG(15, 14, 0x1) ++#define vp9_filt_level_seg1 G2_DEC_REG(15, 8, 0x3f) ++#define vp9_quant_seg1 G2_DEC_REG(15, 0, 0xff) ++ ++#define vp9_refpic_seg2 G2_DEC_REG(16, 15, 0x7) ++#define vp9_skip_seg2 G2_DEC_REG(16, 14, 0x1) ++#define vp9_filt_level_seg2 G2_DEC_REG(16, 8, 0x3f) ++#define vp9_quant_seg2 G2_DEC_REG(16, 0, 0xff) ++ ++#define vp9_refpic_seg3 G2_DEC_REG(17, 15, 0x7) ++#define vp9_skip_seg3 G2_DEC_REG(17, 14, 0x1) ++#define vp9_filt_level_seg3 G2_DEC_REG(17, 8, 0x3f) ++#define vp9_quant_seg3 G2_DEC_REG(17, 0, 0xff) ++ ++#define vp9_refpic_seg4 G2_DEC_REG(18, 15, 0x7) ++#define vp9_skip_seg4 G2_DEC_REG(18, 14, 0x1) ++#define vp9_filt_level_seg4 G2_DEC_REG(18, 8, 0x3f) ++#define vp9_quant_seg4 G2_DEC_REG(18, 0, 0xff) ++ ++#define vp9_refpic_seg5 G2_DEC_REG(19, 15, 0x7) ++#define vp9_skip_seg5 G2_DEC_REG(19, 14, 0x1) ++#define vp9_filt_level_seg5 G2_DEC_REG(19, 8, 0x3f) ++#define vp9_quant_seg5 G2_DEC_REG(19, 0, 0xff) ++ + #define hevc_cur_poc_00 G2_DEC_REG(46, 24, 0xff) + #define hevc_cur_poc_01 G2_DEC_REG(46, 16, 0xff) + #define hevc_cur_poc_02 G2_DEC_REG(46, 8, 0xff) +@@ -174,6 +229,44 @@ + #define hevc_cur_poc_14 G2_DEC_REG(49, 8, 0xff) + #define hevc_cur_poc_15 G2_DEC_REG(49, 0, 0xff) + ++#define vp9_refpic_seg6 G2_DEC_REG(31, 15, 0x7) ++#define vp9_skip_seg6 G2_DEC_REG(31, 14, 0x1) ++#define vp9_filt_level_seg6 G2_DEC_REG(31, 8, 0x3f) ++#define vp9_quant_seg6 G2_DEC_REG(31, 0, 0xff) ++ ++#define vp9_refpic_seg7 G2_DEC_REG(32, 15, 0x7) ++#define vp9_skip_seg7 G2_DEC_REG(32, 14, 0x1) ++#define vp9_filt_level_seg7 G2_DEC_REG(32, 8, 0x3f) ++#define vp9_quant_seg7 G2_DEC_REG(32, 0, 0xff) ++ ++#define vp9_lref_width G2_DEC_REG(33, 16, 0xffff) ++#define vp9_lref_height G2_DEC_REG(33, 0, 0xffff) ++ ++#define vp9_gref_width G2_DEC_REG(34, 16, 0xffff) ++#define vp9_gref_height G2_DEC_REG(34, 0, 0xffff) ++ ++#define vp9_aref_width G2_DEC_REG(35, 16, 0xffff) ++#define vp9_aref_height G2_DEC_REG(35, 0, 0xffff) ++ ++#define vp9_lref_hor_scale G2_DEC_REG(36, 16, 0xffff) ++#define vp9_lref_ver_scale G2_DEC_REG(36, 0, 0xffff) ++ ++#define vp9_gref_hor_scale G2_DEC_REG(37, 16, 0xffff) ++#define vp9_gref_ver_scale G2_DEC_REG(37, 0, 0xffff) ++ ++#define vp9_aref_hor_scale G2_DEC_REG(38, 16, 0xffff) ++#define vp9_aref_ver_scale G2_DEC_REG(38, 0, 0xffff) ++ ++#define vp9_filt_ref_adj_0 G2_DEC_REG(46, 24, 0x7f) ++#define vp9_filt_ref_adj_1 G2_DEC_REG(46, 16, 0x7f) ++#define vp9_filt_ref_adj_2 G2_DEC_REG(46, 8, 0x7f) ++#define vp9_filt_ref_adj_3 G2_DEC_REG(46, 0, 0x7f) ++ ++#define vp9_filt_mb_adj_0 G2_DEC_REG(47, 24, 0x7f) ++#define vp9_filt_mb_adj_1 G2_DEC_REG(47, 16, 0x7f) ++#define vp9_filt_mb_adj_2 G2_DEC_REG(47, 8, 0x7f) ++#define vp9_filt_mb_adj_3 G2_DEC_REG(47, 0, 0x7f) ++ + #define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff) + + #define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1) +@@ -186,6 +279,8 @@ + + #define G2_OUT_LUMA_ADDR (G2_SWREG(65)) + #define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8)) ++#define G2_VP9_SEGMENT_WRITE_ADDR (G2_SWREG(79)) ++#define G2_VP9_SEGMENT_READ_ADDR (G2_SWREG(81)) + #define G2_OUT_CHROMA_ADDR (G2_SWREG(99)) + #define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8)) + #define G2_OUT_MV_ADDR (G2_SWREG(133)) +@@ -193,6 +288,8 @@ + #define G2_TILE_SIZES_ADDR (G2_SWREG(167)) + #define G2_STREAM_ADDR (G2_SWREG(169)) + #define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171)) ++#define G2_VP9_CTX_COUNT_ADDR (G2_SWREG(171)) ++#define G2_VP9_PROBS_ADDR (G2_SWREG(173)) + #define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175)) + #define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177)) + #define G2_TILE_FILTER_ADDR (G2_SWREG(179)) +diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +new file mode 100644 +index 000000000000..fc55b03a8004 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +@@ -0,0 +1,980 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Hantro VP9 codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd. ++ */ ++#include "media/videobuf2-core.h" ++#include "media/videobuf2-dma-contig.h" ++#include "media/videobuf2-v4l2.h" ++#include ++#include ++#include ++#include ++ ++#include "hantro.h" ++#include "hantro_vp9.h" ++#include "hantro_g2_regs.h" ++ ++#define G2_ALIGN 16 ++ ++enum hantro_ref_frames { ++ INTRA_FRAME = 0, ++ LAST_FRAME = 1, ++ GOLDEN_FRAME = 2, ++ ALTREF_FRAME = 3, ++ MAX_REF_FRAMES = 4 ++}; ++ ++static int start_prepare_run(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame **dec_params) ++{ ++ const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct v4l2_ctrl *ctrl; ++ unsigned int fctx_idx; ++ ++ /* v4l2-specific stuff */ ++ hantro_start_prepare_run(ctx); ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_FRAME); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ *dec_params = ctrl->p_cur.p; ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); ++ if (WARN_ON(!ctrl)) ++ return -EINVAL; ++ prob_updates = ctrl->p_cur.p; ++ vp9_ctx->cur.tx_mode = prob_updates->tx_mode; ++ ++ /* ++ * vp9 stuff ++ * ++ * by this point the userspace has done all parts of 6.2 uncompressed_header() ++ * except this fragment: ++ * if ( FrameIsIntra || error_resilient_mode ) { ++ * setup_past_independence ( ) ++ * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || ++ * reset_frame_context == 3 ) { ++ * for ( i = 0; i < 4; i ++ ) { ++ * save_probs( i ) ++ * } ++ * } else if ( reset_frame_context == 2 ) { ++ * save_probs( frame_context_idx ) ++ * } ++ * frame_context_idx = 0 ++ * } ++ */ ++ fctx_idx = v4l2_vp9_reset_frame_ctx(*dec_params, vp9_ctx->frame_context); ++ vp9_ctx->cur.frame_context_idx = fctx_idx; ++ ++ /* 6.1 frame(sz): load_probs() and load_probs2() */ ++ vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* ++ * The userspace has also performed 6.3 compressed_header(), but handling the ++ * probs in a special way. All probs which need updating, except MV-related, ++ * have been read from the bitstream and translated through inv_map_table[], ++ * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed ++ * by userspace are either translated values (there are no 0 values in ++ * inv_map_table[]), or zero to indicate no update. All MV-related probs which need ++ * updating have been read from the bitstream and (mv_prob << 1) | 1 has been ++ * performed. The values passed by userspace are either new values ++ * to replace old ones (the above mentioned shift and bitwise or never result in ++ * a zero) or zero to indicate no update. ++ * fw_update_probs() performs actual probs updates or leaves probs as-is ++ * for values for which a zero was passed from userspace. ++ */ ++ v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, *dec_params); ++ ++ return 0; ++} ++ ++static size_t chroma_offset(const struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ int bytes_per_pixel = dec_params->bit_depth == 8 ? 1 : 2; ++ ++ return ctx->src_fmt.width * ctx->src_fmt.height * bytes_per_pixel; ++} ++ ++static size_t mv_offset(const struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ size_t cr_offset = chroma_offset(ctx, dec_params); ++ ++ return ALIGN((cr_offset * 3) / 2, G2_ALIGN); ++} ++ ++static struct hantro_decoded_buffer * ++get_ref_buf(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) ++{ ++ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; ++ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; ++ int buf_idx; ++ ++ /* ++ * If a ref is unused or invalid, address of current destination ++ * buffer is returned. ++ */ ++ buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); ++ if (buf_idx < 0) ++ return vb2_to_hantro_decoded_buf(&dst->vb2_buf); ++ ++ return vb2_to_hantro_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); ++} ++ ++static void update_dec_buf_info(struct hantro_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ buf->vp9.width = dec_params->frame_width_minus_1 + 1; ++ buf->vp9.height = dec_params->frame_height_minus_1 + 1; ++ buf->vp9.bit_depth = dec_params->bit_depth; ++} ++ ++static void update_ctx_cur_info(struct hantro_vp9_dec_hw_ctx *vp9_ctx, ++ struct hantro_decoded_buffer *buf, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ vp9_ctx->cur.valid = true; ++ vp9_ctx->cur.reference_mode = dec_params->reference_mode; ++ vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; ++ vp9_ctx->cur.flags = dec_params->flags; ++ vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; ++} ++ ++static void config_output(struct hantro_ctx *ctx, ++ struct hantro_decoded_buffer *dst, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ dma_addr_t luma_addr, chroma_addr, mv_addr; ++ ++ hantro_reg_write(ctx->dev, &g2_out_dis, 0); ++ hantro_reg_write(ctx->dev, &g2_output_format, 0); ++ ++ luma_addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); ++ hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); ++ ++ chroma_addr = luma_addr + chroma_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); ++ ++ mv_addr = luma_addr + mv_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); ++} ++ ++struct hantro_vp9_ref_reg { ++ const struct hantro_reg width; ++ const struct hantro_reg height; ++ const struct hantro_reg hor_scale; ++ const struct hantro_reg ver_scale; ++ u32 y_base; ++ u32 c_base; ++}; ++ ++static void config_ref(struct hantro_ctx *ctx, ++ struct hantro_decoded_buffer *dst, ++ const struct hantro_vp9_ref_reg *ref_reg, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ u64 ref_ts) ++{ ++ struct hantro_decoded_buffer *buf; ++ dma_addr_t luma_addr, chroma_addr; ++ u32 refw, refh; ++ ++ buf = get_ref_buf(ctx, &dst->base.vb, ref_ts); ++ refw = buf->vp9.width; ++ refh = buf->vp9.height; ++ ++ hantro_reg_write(ctx->dev, &ref_reg->width, refw); ++ hantro_reg_write(ctx->dev, &ref_reg->height, refh); ++ ++ hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); ++ hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); ++ ++ luma_addr = vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0); ++ hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); ++ ++ chroma_addr = luma_addr + chroma_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); ++} ++ ++static void config_ref_registers(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct hantro_decoded_buffer *dst, ++ struct hantro_decoded_buffer *mv_ref) ++{ ++ static const struct hantro_vp9_ref_reg ref_regs[] = { ++ { ++ /* Last */ ++ .width = vp9_lref_width, ++ .height = vp9_lref_height, ++ .hor_scale = vp9_lref_hor_scale, ++ .ver_scale = vp9_lref_ver_scale, ++ .y_base = G2_REF_LUMA_ADDR(0), ++ .c_base = G2_REF_CHROMA_ADDR(0), ++ }, { ++ /* Golden */ ++ .width = vp9_gref_width, ++ .height = vp9_gref_height, ++ .hor_scale = vp9_gref_hor_scale, ++ .ver_scale = vp9_gref_ver_scale, ++ .y_base = G2_REF_LUMA_ADDR(4), ++ .c_base = G2_REF_CHROMA_ADDR(4), ++ }, { ++ /* Altref */ ++ .width = vp9_aref_width, ++ .height = vp9_aref_height, ++ .hor_scale = vp9_aref_hor_scale, ++ .ver_scale = vp9_aref_ver_scale, ++ .y_base = G2_REF_LUMA_ADDR(5), ++ .c_base = G2_REF_CHROMA_ADDR(5), ++ }, ++ }; ++ dma_addr_t mv_addr; ++ ++ config_ref(ctx, dst, &ref_regs[0], dec_params, dec_params->last_frame_ts); ++ config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts); ++ config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); ++ ++ mv_addr = vb2_dma_contig_plane_dma_addr(&mv_ref->base.vb.vb2_buf, 0) + ++ mv_offset(ctx, dec_params); ++ hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); ++ ++ hantro_reg_write(ctx->dev, &vp9_last_sign_bias, ++ dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST ? 1 : 0); ++ ++ hantro_reg_write(ctx->dev, &vp9_gref_sign_bias, ++ dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN ? 1 : 0); ++ ++ hantro_reg_write(ctx->dev, &vp9_aref_sign_bias, ++ dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT ? 1 : 0); ++} ++ ++static void recompute_tile_info(unsigned short *tile_info, unsigned int tiles, unsigned int sbs) ++{ ++ int i; ++ unsigned int accumulated = 0; ++ unsigned int next_accumulated; ++ ++ for (i = 1; i <= tiles; ++i) { ++ next_accumulated = i * sbs / tiles; ++ *tile_info++ = next_accumulated - accumulated; ++ accumulated = next_accumulated; ++ } ++} ++ ++static void ++recompute_tile_rc_info(struct hantro_ctx *ctx, ++ unsigned int tile_r, unsigned int tile_c, ++ unsigned int sbs_r, unsigned int sbs_c) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ ++ recompute_tile_info(vp9_ctx->tile_r_info, tile_r, sbs_r); ++ recompute_tile_info(vp9_ctx->tile_c_info, tile_c, sbs_c); ++ ++ vp9_ctx->last_tile_r = tile_r; ++ vp9_ctx->last_tile_c = tile_c; ++ vp9_ctx->last_sbs_r = sbs_r; ++ vp9_ctx->last_sbs_c = sbs_c; ++} ++ ++static inline unsigned int first_tile_row(unsigned int tile_r, unsigned int sbs_r) ++{ ++ if (tile_r == sbs_r + 1) ++ return 1; ++ ++ if (tile_r == sbs_r + 2) ++ return 2; ++ ++ return 0; ++} ++ ++static void ++fill_tile_info(struct hantro_ctx *ctx, ++ unsigned int tile_r, unsigned int tile_c, ++ unsigned int sbs_r, unsigned int sbs_c, ++ unsigned short *tile_mem) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ unsigned int i, j; ++ bool first = true; ++ ++ for (i = first_tile_row(tile_r, sbs_r); i < tile_r; ++i) { ++ unsigned short r_info = vp9_ctx->tile_r_info[i]; ++ ++ if (first) { ++ if (i > 0) ++ r_info += vp9_ctx->tile_r_info[0]; ++ if (i == 2) ++ r_info += vp9_ctx->tile_r_info[1]; ++ first = false; ++ } ++ for (j = 0; j < tile_c; ++j) { ++ *tile_mem++ = vp9_ctx->tile_c_info[j]; ++ *tile_mem++ = r_info; ++ } ++ } ++} ++ ++static void ++config_tiles(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct hantro_decoded_buffer *dst) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct hantro_aux_buf *misc = &vp9_ctx->misc; ++ struct hantro_aux_buf *tile_edge = &vp9_ctx->tile_edge; ++ dma_addr_t addr; ++ unsigned short *tile_mem; ++ ++ addr = misc->dma + vp9_ctx->tile_info_offset; ++ hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr); ++ ++ tile_mem = misc->cpu + vp9_ctx->tile_info_offset; ++ if (dec_params->tile_cols_log2 || dec_params->tile_rows_log2) { ++ unsigned int tile_r = (1 << dec_params->tile_rows_log2); ++ unsigned int tile_c = (1 << dec_params->tile_cols_log2); ++ unsigned int sbs_r = hantro_vp9_num_sbs(dst->vp9.height); ++ unsigned int sbs_c = hantro_vp9_num_sbs(dst->vp9.width); ++ ++ if (tile_r != vp9_ctx->last_tile_r || tile_c != vp9_ctx->last_tile_c || ++ sbs_r != vp9_ctx->last_sbs_r || sbs_c != vp9_ctx->last_sbs_c) ++ recompute_tile_rc_info(ctx, tile_r, tile_c, sbs_r, sbs_c); ++ ++ fill_tile_info(ctx, tile_r, tile_c, sbs_r, sbs_c, tile_mem); ++ ++ hantro_reg_write(ctx->dev, &g2_tile_e, 1); ++ hantro_reg_write(ctx->dev, &g2_num_tile_cols, tile_c); ++ hantro_reg_write(ctx->dev, &g2_num_tile_rows, tile_r); ++ ++ } else { ++ tile_mem[0] = hantro_vp9_num_sbs(dst->vp9.width); ++ tile_mem[1] = hantro_vp9_num_sbs(dst->vp9.height); ++ ++ hantro_reg_write(ctx->dev, &g2_tile_e, 0); ++ hantro_reg_write(ctx->dev, &g2_num_tile_cols, 1); ++ hantro_reg_write(ctx->dev, &g2_num_tile_rows, 1); ++ } ++ ++ /* provide aux buffers even if no tiles are used */ ++ addr = tile_edge->dma; ++ hantro_write_addr(ctx->dev, G2_TILE_FILTER_ADDR, addr); ++ ++ addr = tile_edge->dma + vp9_ctx->bsd_ctrl_offset; ++ hantro_write_addr(ctx->dev, G2_TILE_BSD_ADDR, addr); ++} ++ ++static void ++update_feat_and_flag(struct hantro_vp9_dec_hw_ctx *vp9_ctx, ++ const struct v4l2_vp9_segmentation *seg, ++ unsigned int feature, ++ unsigned int segid) ++{ ++ u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); ++ ++ vp9_ctx->feature_data[segid][feature] = seg->feature_data[segid][feature]; ++ vp9_ctx->feature_enabled[segid] &= ~mask; ++ vp9_ctx->feature_enabled[segid] |= (seg->feature_enabled[segid] & mask); ++} ++ ++static inline s16 clip3(s16 x, s16 y, s16 z) ++{ ++ return (z < x) ? x : (z > y) ? y : z; ++} ++ ++static s16 feat_val_clip3(s16 feat_val, s16 feature_data, bool absolute, u8 clip) ++{ ++ if (absolute) ++ return feature_data; ++ ++ return clip3(0, 255, feat_val + feature_data); ++} ++ ++static void config_segment(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ const struct v4l2_vp9_segmentation *seg; ++ s16 feat_val; ++ unsigned char feat_id; ++ unsigned int segid; ++ bool segment_enabled, absolute, update_data; ++ ++ static const struct hantro_reg seg_regs[8][V4L2_VP9_SEG_LVL_MAX] = { ++ { vp9_quant_seg0, vp9_filt_level_seg0, vp9_refpic_seg0, vp9_skip_seg0 }, ++ { vp9_quant_seg1, vp9_filt_level_seg1, vp9_refpic_seg1, vp9_skip_seg1 }, ++ { vp9_quant_seg2, vp9_filt_level_seg2, vp9_refpic_seg2, vp9_skip_seg2 }, ++ { vp9_quant_seg3, vp9_filt_level_seg3, vp9_refpic_seg3, vp9_skip_seg3 }, ++ { vp9_quant_seg4, vp9_filt_level_seg4, vp9_refpic_seg4, vp9_skip_seg4 }, ++ { vp9_quant_seg5, vp9_filt_level_seg5, vp9_refpic_seg5, vp9_skip_seg5 }, ++ { vp9_quant_seg6, vp9_filt_level_seg6, vp9_refpic_seg6, vp9_skip_seg6 }, ++ { vp9_quant_seg7, vp9_filt_level_seg7, vp9_refpic_seg7, vp9_skip_seg7 }, ++ }; ++ ++ segment_enabled = !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED); ++ hantro_reg_write(ctx->dev, &vp9_segment_e, segment_enabled); ++ hantro_reg_write(ctx->dev, &vp9_segment_upd_e, ++ !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP)); ++ hantro_reg_write(ctx->dev, &vp9_segment_temp_upd_e, ++ !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE)); ++ ++ seg = &dec_params->seg; ++ absolute = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE); ++ update_data = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA); ++ ++ for (segid = 0; segid < 8; ++segid) { ++ /* Quantizer segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_ALT_Q; ++ feat_val = dec_params->quant.base_q_idx; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) ++ feat_val = feat_val_clip3(feat_val, ++ vp9_ctx->feature_data[segid][feat_id], ++ absolute, 255); ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ ++ /* Loop filter segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_ALT_L; ++ feat_val = dec_params->lf.level; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) ++ feat_val = feat_val_clip3(feat_val, ++ vp9_ctx->feature_data[segid][feat_id], ++ absolute, 63); ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ ++ /* Reference frame segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_REF_FRAME; ++ feat_val = 0; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ if (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && ++ v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) ++ feat_val = vp9_ctx->feature_data[segid][feat_id] + 1; ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ ++ /* Skip segment feature */ ++ feat_id = V4L2_VP9_SEG_LVL_SKIP; ++ feat_val = 0; ++ if (segment_enabled) { ++ if (update_data) ++ update_feat_and_flag(vp9_ctx, seg, feat_id, segid); ++ feat_val = v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, ++ feat_id, segid) ? 1 : 0; ++ } ++ hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); ++ } ++} ++ ++static void config_loop_filter(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ bool d = dec_params->lf.flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED; ++ ++ hantro_reg_write(ctx->dev, &vp9_filt_level, dec_params->lf.level); ++ hantro_reg_write(ctx->dev, &g2_out_filtering_dis, dec_params->lf.level == 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_sharpness, dec_params->lf.sharpness); ++ ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_0, d ? dec_params->lf.ref_deltas[0] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_1, d ? dec_params->lf.ref_deltas[1] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_2, d ? dec_params->lf.ref_deltas[2] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_3, d ? dec_params->lf.ref_deltas[3] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_0, d ? dec_params->lf.mode_deltas[0] : 0); ++ hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_1, d ? dec_params->lf.mode_deltas[1] : 0); ++} ++ ++static void config_picture_dimensions(struct hantro_ctx *ctx, struct hantro_decoded_buffer *dst) ++{ ++ u32 pic_w_4x4, pic_h_4x4; ++ ++ hantro_reg_write(ctx->dev, &g2_pic_width_in_cbs, (dst->vp9.width + 7) / 8); ++ hantro_reg_write(ctx->dev, &g2_pic_height_in_cbs, (dst->vp9.height + 7) / 8); ++ pic_w_4x4 = roundup(dst->vp9.width, 8) >> 2; ++ pic_h_4x4 = roundup(dst->vp9.height, 8) >> 2; ++ hantro_reg_write(ctx->dev, &g2_pic_width_4x4, pic_w_4x4); ++ hantro_reg_write(ctx->dev, &g2_pic_height_4x4, pic_h_4x4); ++} ++ ++static void ++config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); ++ hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8); ++} ++ ++static inline bool is_lossless(const struct v4l2_vp9_quantization *quant) ++{ ++ return quant->base_q_idx == 0 && quant->delta_q_uv_ac == 0 && ++ quant->delta_q_uv_dc == 0 && quant->delta_q_y_dc == 0; ++} ++ ++static void ++config_quant(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ hantro_reg_write(ctx->dev, &vp9_qp_delta_y_dc, dec_params->quant.delta_q_y_dc); ++ hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_dc, dec_params->quant.delta_q_uv_dc); ++ hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_ac, dec_params->quant.delta_q_uv_ac); ++ hantro_reg_write(ctx->dev, &vp9_lossless_e, is_lossless(&dec_params->quant)); ++} ++ ++static u32 ++hantro_interp_filter_from_v4l2(unsigned int interpolation_filter) ++{ ++ switch (interpolation_filter) { ++ case V4L2_VP9_INTERP_FILTER_EIGHTTAP: ++ return 0x1; ++ case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH: ++ return 0; ++ case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP: ++ return 0x2; ++ case V4L2_VP9_INTERP_FILTER_BILINEAR: ++ return 0x3; ++ case V4L2_VP9_INTERP_FILTER_SWITCHABLE: ++ return 0x4; ++ } ++ ++ return 0; ++} ++ ++static void ++config_others(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, ++ bool intra_only, bool resolution_change) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ ++ hantro_reg_write(ctx->dev, &g2_idr_pic_e, intra_only); ++ ++ hantro_reg_write(ctx->dev, &vp9_transform_mode, vp9_ctx->cur.tx_mode); ++ ++ hantro_reg_write(ctx->dev, &vp9_mcomp_filt_type, intra_only ? ++ 0 : hantro_interp_filter_from_v4l2(dec_params->interpolation_filter)); ++ ++ hantro_reg_write(ctx->dev, &vp9_high_prec_mv_e, ++ !!(dec_params->flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)); ++ ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_mode, dec_params->reference_mode); ++ ++ hantro_reg_write(ctx->dev, &g2_tempor_mvp_e, ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && ++ !(vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY) && ++ !resolution_change && ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME ++ ); ++ ++ hantro_reg_write(ctx->dev, &g2_write_mvs_e, ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME)); ++} ++ ++static void ++config_compound_reference(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ u32 comp_fixed_ref, comp_var_ref[2]; ++ bool last_ref_frame_sign_bias; ++ bool golden_ref_frame_sign_bias; ++ bool alt_ref_frame_sign_bias; ++ bool comp_ref_allowed = 0; ++ ++ comp_fixed_ref = 0; ++ comp_var_ref[0] = 0; ++ comp_var_ref[1] = 0; ++ ++ last_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST; ++ golden_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN; ++ alt_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT; ++ ++ /* 6.3.12 Frame reference mode syntax */ ++ comp_ref_allowed |= golden_ref_frame_sign_bias != last_ref_frame_sign_bias; ++ comp_ref_allowed |= alt_ref_frame_sign_bias != last_ref_frame_sign_bias; ++ ++ if (comp_ref_allowed) { ++ if (last_ref_frame_sign_bias == ++ golden_ref_frame_sign_bias) { ++ comp_fixed_ref = ALTREF_FRAME; ++ comp_var_ref[0] = LAST_FRAME; ++ comp_var_ref[1] = GOLDEN_FRAME; ++ } else if (last_ref_frame_sign_bias == ++ alt_ref_frame_sign_bias) { ++ comp_fixed_ref = GOLDEN_FRAME; ++ comp_var_ref[0] = LAST_FRAME; ++ comp_var_ref[1] = ALTREF_FRAME; ++ } else { ++ comp_fixed_ref = LAST_FRAME; ++ comp_var_ref[0] = GOLDEN_FRAME; ++ comp_var_ref[1] = ALTREF_FRAME; ++ } ++ } ++ ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_fixed_ref, comp_fixed_ref); ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref0, comp_var_ref[0]); ++ hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref1, comp_var_ref[1]); ++} ++ ++#define INNER_LOOP \ ++do { \ ++ for (m = 0; m < ARRAY_SIZE(adaptive->coef[0][0][0][0]); ++m) { \ ++ memcpy(adaptive->coef[i][j][k][l][m], \ ++ probs->coef[i][j][k][l][m], \ ++ sizeof(probs->coef[i][j][k][l][m])); \ ++ \ ++ adaptive->coef[i][j][k][l][m][3] = 0; \ ++ } \ ++} while (0) ++ ++static void config_probs(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct hantro_aux_buf *misc = &vp9_ctx->misc; ++ struct hantro_g2_all_probs *all_probs = misc->cpu; ++ struct hantro_g2_probs *adaptive; ++ struct hantro_g2_mv_probs *mv; ++ const struct v4l2_vp9_segmentation *seg = &dec_params->seg; ++ const struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; ++ int i, j, k, l, m; ++ ++ for (i = 0; i < ARRAY_SIZE(all_probs->kf_y_mode_prob); ++i) ++ for (j = 0; j < ARRAY_SIZE(all_probs->kf_y_mode_prob[0]); ++j) { ++ memcpy(all_probs->kf_y_mode_prob[i][j], ++ v4l2_vp9_kf_y_mode_prob[i][j], ++ ARRAY_SIZE(all_probs->kf_y_mode_prob[i][j])); ++ ++ all_probs->kf_y_mode_prob_tail[i][j][0] = ++ v4l2_vp9_kf_y_mode_prob[i][j][8]; ++ } ++ ++ memcpy(all_probs->mb_segment_tree_probs, seg->tree_probs, ++ sizeof(all_probs->mb_segment_tree_probs)); ++ ++ memcpy(all_probs->segment_pred_probs, seg->pred_probs, ++ sizeof(all_probs->segment_pred_probs)); ++ ++ for (i = 0; i < ARRAY_SIZE(all_probs->kf_uv_mode_prob); ++i) { ++ memcpy(all_probs->kf_uv_mode_prob[i], v4l2_vp9_kf_uv_mode_prob[i], ++ ARRAY_SIZE(all_probs->kf_uv_mode_prob[i])); ++ ++ all_probs->kf_uv_mode_prob_tail[i][0] = v4l2_vp9_kf_uv_mode_prob[i][8]; ++ } ++ ++ adaptive = &all_probs->probs; ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->inter_mode); ++i) { ++ memcpy(adaptive->inter_mode[i], probs->inter_mode[i], ++ ARRAY_SIZE(probs->inter_mode[i])); ++ ++ adaptive->inter_mode[i][3] = 0; ++ } ++ ++ memcpy(adaptive->is_inter, probs->is_inter, sizeof(adaptive->is_inter)); ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->uv_mode); ++i) { ++ memcpy(adaptive->uv_mode[i], probs->uv_mode[i], ++ sizeof(adaptive->uv_mode[i])); ++ adaptive->uv_mode_tail[i][0] = probs->uv_mode[i][8]; ++ } ++ ++ memcpy(adaptive->tx8, probs->tx8, sizeof(adaptive->tx8)); ++ memcpy(adaptive->tx16, probs->tx16, sizeof(adaptive->tx16)); ++ memcpy(adaptive->tx32, probs->tx32, sizeof(adaptive->tx32)); ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->y_mode); ++i) { ++ memcpy(adaptive->y_mode[i], probs->y_mode[i], ++ ARRAY_SIZE(adaptive->y_mode[i])); ++ ++ adaptive->y_mode_tail[i][0] = probs->y_mode[i][8]; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->partition[0]); ++i) { ++ memcpy(adaptive->partition[0][i], v4l2_vp9_kf_partition_probs[i], ++ sizeof(v4l2_vp9_kf_partition_probs[i])); ++ ++ adaptive->partition[0][i][3] = 0; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->partition[1]); ++i) { ++ memcpy(adaptive->partition[1][i], probs->partition[i], ++ sizeof(probs->partition[i])); ++ ++ adaptive->partition[1][i][3] = 0; ++ } ++ ++ memcpy(adaptive->interp_filter, probs->interp_filter, ++ sizeof(adaptive->interp_filter)); ++ ++ memcpy(adaptive->comp_mode, probs->comp_mode, sizeof(adaptive->comp_mode)); ++ ++ memcpy(adaptive->skip, probs->skip, sizeof(adaptive->skip)); ++ ++ mv = &adaptive->mv; ++ ++ memcpy(mv->joint, probs->mv.joint, sizeof(mv->joint)); ++ memcpy(mv->sign, probs->mv.sign, sizeof(mv->sign)); ++ memcpy(mv->class0_bit, probs->mv.class0_bit, sizeof(mv->class0_bit)); ++ memcpy(mv->fr, probs->mv.fr, sizeof(mv->fr)); ++ memcpy(mv->class0_hp, probs->mv.class0_hp, sizeof(mv->class0_hp)); ++ memcpy(mv->hp, probs->mv.hp, sizeof(mv->hp)); ++ memcpy(mv->classes, probs->mv.classes, sizeof(mv->classes)); ++ memcpy(mv->class0_fr, probs->mv.class0_fr, sizeof(mv->class0_fr)); ++ memcpy(mv->bits, probs->mv.bits, sizeof(mv->bits)); ++ ++ memcpy(adaptive->single_ref, probs->single_ref, sizeof(adaptive->single_ref)); ++ ++ memcpy(adaptive->comp_ref, probs->comp_ref, sizeof(adaptive->comp_ref)); ++ ++ for (i = 0; i < ARRAY_SIZE(adaptive->coef); ++i) ++ for (j = 0; j < ARRAY_SIZE(adaptive->coef[0]); ++j) ++ for (k = 0; k < ARRAY_SIZE(adaptive->coef[0][0]); ++k) ++ for (l = 0; l < ARRAY_SIZE(adaptive->coef[0][0][0]); ++l) ++ INNER_LOOP; ++ ++ hantro_write_addr(ctx->dev, G2_VP9_PROBS_ADDR, misc->dma); ++} ++ ++static void config_counts(struct hantro_ctx *ctx) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; ++ struct hantro_aux_buf *misc = &vp9_dec->misc; ++ dma_addr_t addr = misc->dma + vp9_dec->ctx_counters_offset; ++ ++ hantro_write_addr(ctx->dev, G2_VP9_CTX_COUNT_ADDR, addr); ++} ++ ++static void config_seg_map(struct hantro_ctx *ctx, ++ const struct v4l2_ctrl_vp9_frame *dec_params, ++ bool intra_only, bool update_map) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct hantro_aux_buf *segment_map = &vp9_ctx->segment_map; ++ dma_addr_t addr; ++ ++ if (intra_only || ++ (dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT)) { ++ memset(segment_map->cpu, 0, segment_map->size); ++ memset(vp9_ctx->feature_data, 0, sizeof(vp9_ctx->feature_data)); ++ memset(vp9_ctx->feature_enabled, 0, sizeof(vp9_ctx->feature_enabled)); ++ } ++ ++ addr = segment_map->dma + vp9_ctx->active_segment * vp9_ctx->segment_map_size; ++ hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_READ_ADDR, addr); ++ ++ addr = segment_map->dma + (1 - vp9_ctx->active_segment) * vp9_ctx->segment_map_size; ++ hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_WRITE_ADDR, addr); ++ ++ if (update_map) ++ vp9_ctx->active_segment = 1 - vp9_ctx->active_segment; ++} ++ ++static void ++config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct vb2_v4l2_buffer *vb2_src) ++{ ++ dma_addr_t stream_base, tmp_addr; ++ unsigned int headres_size; ++ u32 src_len, start_bit, src_buf_len; ++ ++ headres_size = dec_params->uncompressed_header_size ++ + dec_params->compressed_header_size; ++ ++ stream_base = vb2_dma_contig_plane_dma_addr(&vb2_src->vb2_buf, 0); ++ hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base); ++ ++ tmp_addr = stream_base + headres_size; ++ start_bit = (tmp_addr & 0xf) * 8; ++ hantro_reg_write(ctx->dev, &g2_start_bit, start_bit); ++ ++ src_len = vb2_get_plane_payload(&vb2_src->vb2_buf, 0); ++ src_len += start_bit / 8 - headres_size; ++ hantro_reg_write(ctx->dev, &g2_stream_len, src_len); ++ ++ tmp_addr &= ~0xf; ++ hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base); ++ src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0); ++ hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len); ++} ++ ++static void ++config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, ++ struct vb2_v4l2_buffer *vb2_src, struct vb2_v4l2_buffer *vb2_dst) ++{ ++ struct hantro_decoded_buffer *dst, *last, *mv_ref; ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ const struct v4l2_vp9_segmentation *seg; ++ bool intra_only, resolution_change; ++ ++ /* vp9 stuff */ ++ dst = vb2_to_hantro_decoded_buf(&vb2_dst->vb2_buf); ++ ++ if (vp9_ctx->last.valid) ++ last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); ++ else ++ last = dst; ++ ++ update_dec_buf_info(dst, dec_params); ++ update_ctx_cur_info(vp9_ctx, dst, dec_params); ++ seg = &dec_params->seg; ++ ++ intra_only = !!(dec_params->flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | ++ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); ++ ++ if (!intra_only && ++ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && ++ vp9_ctx->last.valid) ++ mv_ref = last; ++ else ++ mv_ref = dst; ++ ++ resolution_change = dst->vp9.width != last->vp9.width || ++ dst->vp9.height != last->vp9.height; ++ ++ /* configure basic registers */ ++ hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE); ++ hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf); ++ hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128); ++ hantro_reg_write(ctx->dev, &g2_max_burst, 16); ++ hantro_reg_write(ctx->dev, &g2_apf_threshold, 8); ++ hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1); ++ hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1); ++ hantro_reg_write(ctx->dev, &g2_max_cb_size, 6); ++ hantro_reg_write(ctx->dev, &g2_min_cb_size, 3); ++ ++ config_output(ctx, dst, dec_params); ++ ++ if (!intra_only) ++ config_ref_registers(ctx, dec_params, dst, mv_ref); ++ ++ config_tiles(ctx, dec_params, dst); ++ config_segment(ctx, dec_params); ++ config_loop_filter(ctx, dec_params); ++ config_picture_dimensions(ctx, dst); ++ config_bit_depth(ctx, dec_params); ++ config_quant(ctx, dec_params); ++ config_others(ctx, dec_params, intra_only, resolution_change); ++ config_compound_reference(ctx, dec_params); ++ config_probs(ctx, dec_params); ++ config_counts(ctx); ++ config_seg_map(ctx, dec_params, intra_only, ++ seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP); ++ config_source(ctx, dec_params, vb2_src); ++} ++ ++int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx) ++{ ++ const struct v4l2_ctrl_vp9_frame *decode_params; ++ struct vb2_v4l2_buffer *src; ++ struct vb2_v4l2_buffer *dst; ++ int ret; ++ ++ hantro_g2_check_idle(ctx->dev); ++ ++ ret = start_prepare_run(ctx, &decode_params); ++ if (ret) { ++ hantro_end_prepare_run(ctx); ++ return ret; ++ } ++ ++ src = hantro_get_src_buf(ctx); ++ dst = hantro_get_dst_buf(ctx); ++ ++ config_registers(ctx, decode_params, src, dst); ++ ++ hantro_end_prepare_run(ctx); ++ ++ vdpu_write(ctx->dev, G2_REG_INTERRUPT_DEC_E, G2_REG_INTERRUPT); ++ ++ return 0; ++} ++ ++#define copy_tx_and_skip(p1, p2) \ ++do { \ ++ memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ ++ memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ ++ memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ ++ memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ ++} while (0) ++ ++void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ unsigned int fctx_idx; ++ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) ++ goto out_update_last; ++ ++ fctx_idx = vp9_ctx->cur.frame_context_idx; ++ ++ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { ++ /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ ++ struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; ++ bool frame_is_intra = vp9_ctx->cur.flags & ++ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); ++ struct tx_and_skip { ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 skip[3]; ++ } _tx_skip, *tx_skip = &_tx_skip; ++ struct v4l2_vp9_frame_symbol_counts *counts; ++ struct symbol_counts *hantro_cnts; ++ u32 tx16p[2][4]; ++ int i; ++ ++ /* buffer the forward-updated TX and skip probs */ ++ if (frame_is_intra) ++ copy_tx_and_skip(tx_skip, probs); ++ ++ /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ ++ *probs = vp9_ctx->frame_context[fctx_idx]; ++ ++ /* if FrameIsIntra then undo the effect of load_probs2() */ ++ if (frame_is_intra) ++ copy_tx_and_skip(probs, tx_skip); ++ ++ counts = &vp9_ctx->cnts; ++ hantro_cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; ++ for (i = 0; i < ARRAY_SIZE(tx16p); ++i) { ++ memcpy(tx16p[i], ++ hantro_cnts->tx16x16_count[i], ++ sizeof(hantro_cnts->tx16x16_count[0])); ++ tx16p[i][3] = 0; ++ } ++ counts->tx16p = &tx16p; ++ ++ v4l2_vp9_adapt_coef_probs(probs, counts, ++ !vp9_ctx->last.valid || ++ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, ++ frame_is_intra); ++ ++ if (!frame_is_intra) { ++ /* load_probs2() already done */ ++ u32 mv_mode[7][4]; ++ ++ for (i = 0; i < ARRAY_SIZE(mv_mode); ++i) { ++ mv_mode[i][0] = hantro_cnts->inter_mode_counts[i][1][0]; ++ mv_mode[i][1] = hantro_cnts->inter_mode_counts[i][2][0]; ++ mv_mode[i][2] = hantro_cnts->inter_mode_counts[i][0][0]; ++ mv_mode[i][3] = hantro_cnts->inter_mode_counts[i][2][1]; ++ } ++ counts->mv_mode = &mv_mode; ++ v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, ++ vp9_ctx->cur.reference_mode, ++ vp9_ctx->cur.interpolation_filter, ++ vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); ++ } ++ } ++ ++ vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; ++ ++out_update_last: ++ vp9_ctx->last = vp9_ctx->cur; ++} +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index 1d869abf90b2..fe5b51046d33 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + + #define DEC_8190_ALIGN_MASK 0x07U +@@ -165,6 +166,82 @@ struct hantro_vp8_dec_hw_ctx { + struct hantro_aux_buf prob_tbl; + }; + ++/** ++ * struct hantro_vp9_frame_info ++ * ++ * @valid: frame info valid flag ++ * @frame_context_idx: index of frame context ++ * @reference_mode: inter prediction type ++ * @tx_mode: transform mode ++ * @interpolation_filter: filter selection for inter prediction ++ * @flags: frame flags ++ * @timestamp: frame timestamp ++ */ ++struct hantro_vp9_frame_info { ++ u32 valid : 1; ++ u32 frame_context_idx : 2; ++ u32 reference_mode : 2; ++ u32 tx_mode : 3; ++ u32 interpolation_filter : 3; ++ u32 flags; ++ u64 timestamp; ++}; ++ ++#define MAX_SB_COLS 64 ++#define MAX_SB_ROWS 34 ++ ++/** ++ * struct hantro_vp9_dec_hw_ctx ++ * ++ * @tile_edge: auxiliary DMA buffer for tile edge processing ++ * @segment_map: auxiliary DMA buffer for segment map ++ * @misc: auxiliary DMA buffer for tile info, probabilities and hw counters ++ * @cnts: vp9 library struct for abstracting hw counters access ++ * @probability_tables: VP9 probability tables implied by the spec ++ * @frame_context: VP9 frame contexts ++ * @cur: current frame information ++ * @last: last frame information ++ * @bsd_ctrl_offset: bsd offset into tile_edge ++ * @segment_map_size: size of segment map ++ * @ctx_counters_offset: hw counters offset into misc ++ * @tile_info_offset: tile info offset into misc ++ * @tile_r_info: per-tile information array ++ * @tile_c_info: per-tile information array ++ * @last_tile_r: last number of tile rows ++ * @last_tile_c: last number of tile cols ++ * @last_sbs_r: last number of superblock rows ++ * @last_sbs_c: last number of superblock cols ++ * @active_segment: number of active segment (alternating between 0 and 1) ++ * @feature_enabled: segmentation feature enabled flags ++ * @feature_data: segmentation feature data ++ */ ++struct hantro_vp9_dec_hw_ctx { ++ struct hantro_aux_buf tile_edge; ++ struct hantro_aux_buf segment_map; ++ struct hantro_aux_buf misc; ++ struct v4l2_vp9_frame_symbol_counts cnts; ++ struct v4l2_vp9_frame_context probability_tables; ++ struct v4l2_vp9_frame_context frame_context[4]; ++ struct hantro_vp9_frame_info cur; ++ struct hantro_vp9_frame_info last; ++ ++ unsigned int bsd_ctrl_offset; ++ unsigned int segment_map_size; ++ unsigned int ctx_counters_offset; ++ unsigned int tile_info_offset; ++ ++ unsigned short tile_r_info[MAX_SB_ROWS]; ++ unsigned short tile_c_info[MAX_SB_COLS]; ++ unsigned int last_tile_r; ++ unsigned int last_tile_c; ++ unsigned int last_sbs_r; ++ unsigned int last_sbs_c; ++ ++ unsigned int active_segment; ++ u8 feature_enabled[8]; ++ s16 feature_data[8][4]; ++}; ++ + /** + * struct hantro_postproc_ctx + * +@@ -271,6 +348,24 @@ void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx); + size_t hantro_hevc_chroma_offset(const struct v4l2_ctrl_hevc_sps *sps); + size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps); + ++static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension) ++{ ++ return (dimension + 63) / 64; ++} ++ ++static inline size_t ++hantro_vp9_mv_size(unsigned int width, unsigned int height) ++{ ++ int num_ctbs; ++ ++ /* ++ * There can be up to (CTBs x 64) number of blocks, ++ * and the motion vector for each block needs 16 bytes. ++ */ ++ num_ctbs = hantro_vp9_num_sbs(width) * hantro_vp9_num_sbs(height); ++ return (num_ctbs * 64) * 16; ++} ++ + static inline size_t + hantro_h264_mv_size(unsigned int width, unsigned int height) + { +@@ -312,6 +407,10 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx); + void hantro_vp8_prob_update(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp8_frame *hdr); + ++int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx); ++void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx); ++int hantro_vp9_dec_init(struct hantro_ctx *ctx); ++void hantro_vp9_dec_exit(struct hantro_ctx *ctx); + void hantro_g2_check_idle(struct hantro_dev *vpu); + + #endif /* HANTRO_HW_H_ */ +diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c +index d1f060c55fed..e4b0645ba6fc 100644 +--- a/drivers/staging/media/hantro/hantro_v4l2.c ++++ b/drivers/staging/media/hantro/hantro_v4l2.c +@@ -299,6 +299,11 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, + pix_mp->plane_fmt[0].sizeimage += + hantro_h264_mv_size(pix_mp->width, + pix_mp->height); ++ else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME && ++ !hantro_needs_postproc(ctx, fmt)) ++ pix_mp->plane_fmt[0].sizeimage += ++ hantro_vp9_mv_size(pix_mp->width, ++ pix_mp->height); + } else if (!pix_mp->plane_fmt[0].sizeimage) { + /* + * For coded formats the application can specify +@@ -407,6 +412,7 @@ hantro_update_requires_request(struct hantro_ctx *ctx, u32 fourcc) + case V4L2_PIX_FMT_VP8_FRAME: + case V4L2_PIX_FMT_H264_SLICE: + case V4L2_PIX_FMT_HEVC_SLICE: ++ case V4L2_PIX_FMT_VP9_FRAME: + ctx->fh.m2m_ctx->out_q_ctx.q.requires_requests = true; + break; + default: +diff --git a/drivers/staging/media/hantro/hantro_vp9.c b/drivers/staging/media/hantro/hantro_vp9.c +new file mode 100644 +index 000000000000..566cd376c097 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_vp9.c +@@ -0,0 +1,240 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Hantro VP9 codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd. ++ */ ++ ++#include ++#include ++ ++#include "hantro.h" ++#include "hantro_hw.h" ++#include "hantro_vp9.h" ++ ++#define POW2(x) (1 << (x)) ++ ++#define MAX_LOG2_TILE_COLUMNS 6 ++#define MAX_NUM_TILE_COLS POW2(MAX_LOG2_TILE_COLUMNS) ++#define MAX_TILE_COLS 20 ++#define MAX_TILE_ROWS 22 ++ ++static size_t hantro_vp9_tile_filter_size(unsigned int height) ++{ ++ u32 h, height32, size; ++ ++ h = roundup(height, 8); ++ ++ height32 = roundup(h, 64); ++ size = 24 * height32 * (MAX_NUM_TILE_COLS - 1); /* luma: 8, chroma: 8 + 8 */ ++ ++ return size; ++} ++ ++static size_t hantro_vp9_bsd_control_size(unsigned int height) ++{ ++ u32 h, height32; ++ ++ h = roundup(height, 8); ++ height32 = roundup(h, 64); ++ ++ return 16 * (height32 / 4) * (MAX_NUM_TILE_COLS - 1); ++} ++ ++static size_t hantro_vp9_segment_map_size(unsigned int width, unsigned int height) ++{ ++ u32 w, h; ++ int num_ctbs; ++ ++ w = roundup(width, 8); ++ h = roundup(height, 8); ++ num_ctbs = ((w + 63) / 64) * ((h + 63) / 64); ++ ++ return num_ctbs * 32; ++} ++ ++static inline size_t hantro_vp9_prob_tab_size(void) ++{ ++ return roundup(sizeof(struct hantro_g2_all_probs), 16); ++} ++ ++static inline size_t hantro_vp9_count_tab_size(void) ++{ ++ return roundup(sizeof(struct symbol_counts), 16); ++} ++ ++static inline size_t hantro_vp9_tile_info_size(void) ++{ ++ return roundup((MAX_TILE_COLS * MAX_TILE_ROWS * 4 * sizeof(u16) + 15 + 16) & ~0xf, 16); ++} ++ ++static void *get_coeffs_arr(struct symbol_counts *cnts, int i, int j, int k, int l, int m) ++{ ++ if (i == 0) ++ return &cnts->count_coeffs[j][k][l][m]; ++ ++ if (i == 1) ++ return &cnts->count_coeffs8x8[j][k][l][m]; ++ ++ if (i == 2) ++ return &cnts->count_coeffs16x16[j][k][l][m]; ++ ++ if (i == 3) ++ return &cnts->count_coeffs32x32[j][k][l][m]; ++ ++ return NULL; ++} ++ ++static void *get_eobs1(struct symbol_counts *cnts, int i, int j, int k, int l, int m) ++{ ++ if (i == 0) ++ return &cnts->count_coeffs[j][k][l][m][3]; ++ ++ if (i == 1) ++ return &cnts->count_coeffs8x8[j][k][l][m][3]; ++ ++ if (i == 2) ++ return &cnts->count_coeffs16x16[j][k][l][m][3]; ++ ++ if (i == 3) ++ return &cnts->count_coeffs32x32[j][k][l][m][3]; ++ ++ return NULL; ++} ++ ++#define INNER_LOOP \ ++ do { \ ++ for (m = 0; m < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0][0]); ++m) { \ ++ vp9_ctx->cnts.coeff[i][j][k][l][m] = \ ++ get_coeffs_arr(cnts, i, j, k, l, m); \ ++ vp9_ctx->cnts.eob[i][j][k][l][m][0] = \ ++ &cnts->count_eobs[i][j][k][l][m]; \ ++ vp9_ctx->cnts.eob[i][j][k][l][m][1] = \ ++ get_eobs1(cnts, i, j, k, l, m); \ ++ } \ ++ } while (0) ++ ++static void init_v4l2_vp9_count_tbl(struct hantro_ctx *ctx) ++{ ++ struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; ++ struct symbol_counts *cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; ++ int i, j, k, l, m; ++ ++ vp9_ctx->cnts.partition = &cnts->partition_counts; ++ vp9_ctx->cnts.skip = &cnts->mbskip_count; ++ vp9_ctx->cnts.intra_inter = &cnts->intra_inter_count; ++ vp9_ctx->cnts.tx32p = &cnts->tx32x32_count; ++ /* ++ * g2 hardware uses tx16x16_count[2][3], while the api ++ * expects tx16p[2][4], so this must be explicitly copied ++ * into vp9_ctx->cnts.tx16p when passing the data to the ++ * vp9 library function ++ */ ++ vp9_ctx->cnts.tx8p = &cnts->tx8x8_count; ++ ++ vp9_ctx->cnts.y_mode = &cnts->sb_ymode_counts; ++ vp9_ctx->cnts.uv_mode = &cnts->uv_mode_counts; ++ vp9_ctx->cnts.comp = &cnts->comp_inter_count; ++ vp9_ctx->cnts.comp_ref = &cnts->comp_ref_count; ++ vp9_ctx->cnts.single_ref = &cnts->single_ref_count; ++ vp9_ctx->cnts.filter = &cnts->switchable_interp_counts; ++ vp9_ctx->cnts.mv_joint = &cnts->mv_counts.joints; ++ vp9_ctx->cnts.sign = &cnts->mv_counts.sign; ++ vp9_ctx->cnts.classes = &cnts->mv_counts.classes; ++ vp9_ctx->cnts.class0 = &cnts->mv_counts.class0; ++ vp9_ctx->cnts.bits = &cnts->mv_counts.bits; ++ vp9_ctx->cnts.class0_fp = &cnts->mv_counts.class0_fp; ++ vp9_ctx->cnts.fp = &cnts->mv_counts.fp; ++ vp9_ctx->cnts.class0_hp = &cnts->mv_counts.class0_hp; ++ vp9_ctx->cnts.hp = &cnts->mv_counts.hp; ++ ++ for (i = 0; i < ARRAY_SIZE(vp9_ctx->cnts.coeff); ++i) ++ for (j = 0; j < ARRAY_SIZE(vp9_ctx->cnts.coeff[i]); ++j) ++ for (k = 0; k < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0]); ++k) ++ for (l = 0; l < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0]); ++l) ++ INNER_LOOP; ++} ++ ++int hantro_vp9_dec_init(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ const struct hantro_variant *variant = vpu->variant; ++ struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; ++ struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; ++ struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; ++ struct hantro_aux_buf *misc = &vp9_dec->misc; ++ u32 i, max_width, max_height, size; ++ ++ if (variant->num_dec_fmts < 1) ++ return -EINVAL; ++ ++ for (i = 0; i < variant->num_dec_fmts; ++i) ++ if (variant->dec_fmts[i].fourcc == V4L2_PIX_FMT_VP9_FRAME) ++ break; ++ ++ if (i == variant->num_dec_fmts) ++ return -EINVAL; ++ ++ max_width = vpu->variant->dec_fmts[i].frmsize.max_width; ++ max_height = vpu->variant->dec_fmts[i].frmsize.max_height; ++ ++ size = hantro_vp9_tile_filter_size(max_height); ++ vp9_dec->bsd_ctrl_offset = size; ++ size += hantro_vp9_bsd_control_size(max_height); ++ ++ tile_edge->cpu = dma_alloc_coherent(vpu->dev, size, &tile_edge->dma, GFP_KERNEL); ++ if (!tile_edge->cpu) ++ return -ENOMEM; ++ ++ tile_edge->size = size; ++ memset(tile_edge->cpu, 0, size); ++ ++ size = hantro_vp9_segment_map_size(max_width, max_height); ++ vp9_dec->segment_map_size = size; ++ size *= 2; /* we need two areas of this size, used alternately */ ++ ++ segment_map->cpu = dma_alloc_coherent(vpu->dev, size, &segment_map->dma, GFP_KERNEL); ++ if (!segment_map->cpu) ++ goto err_segment_map; ++ ++ segment_map->size = size; ++ memset(segment_map->cpu, 0, size); ++ ++ size = hantro_vp9_prob_tab_size(); ++ vp9_dec->ctx_counters_offset = size; ++ size += hantro_vp9_count_tab_size(); ++ vp9_dec->tile_info_offset = size; ++ size += hantro_vp9_tile_info_size(); ++ ++ misc->cpu = dma_alloc_coherent(vpu->dev, size, &misc->dma, GFP_KERNEL); ++ if (!misc->cpu) ++ goto err_misc; ++ ++ misc->size = size; ++ memset(misc->cpu, 0, size); ++ ++ init_v4l2_vp9_count_tbl(ctx); ++ ++ return 0; ++ ++err_misc: ++ dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); ++ ++err_segment_map: ++ dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); ++ ++ return -ENOMEM; ++} ++ ++void hantro_vp9_dec_exit(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; ++ struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; ++ struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; ++ struct hantro_aux_buf *misc = &vp9_dec->misc; ++ ++ dma_free_coherent(vpu->dev, misc->size, misc->cpu, misc->dma); ++ dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); ++ dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); ++} +diff --git a/drivers/staging/media/hantro/hantro_vp9.h b/drivers/staging/media/hantro/hantro_vp9.h +new file mode 100644 +index 000000000000..26b69275f098 +--- /dev/null ++++ b/drivers/staging/media/hantro/hantro_vp9.h +@@ -0,0 +1,102 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Hantro VP9 codec driver ++ * ++ * Copyright (C) 2021 Collabora Ltd. ++ */ ++ ++struct hantro_g2_mv_probs { ++ u8 joint[3]; ++ u8 sign[2]; ++ u8 class0_bit[2][1]; ++ u8 fr[2][3]; ++ u8 class0_hp[2]; ++ u8 hp[2]; ++ u8 classes[2][10]; ++ u8 class0_fr[2][2][3]; ++ u8 bits[2][10]; ++}; ++ ++struct hantro_g2_probs { ++ u8 inter_mode[7][4]; ++ u8 is_inter[4]; ++ u8 uv_mode[10][8]; ++ u8 tx8[2][1]; ++ u8 tx16[2][2]; ++ u8 tx32[2][3]; ++ u8 y_mode_tail[4][1]; ++ u8 y_mode[4][8]; ++ u8 partition[2][16][4]; /* [keyframe][][], [inter][][] */ ++ u8 uv_mode_tail[10][1]; ++ u8 interp_filter[4][2]; ++ u8 comp_mode[5]; ++ u8 skip[3]; ++ ++ u8 pad1[1]; ++ ++ struct hantro_g2_mv_probs mv; ++ ++ u8 single_ref[5][2]; ++ u8 comp_ref[5]; ++ ++ u8 pad2[17]; ++ ++ u8 coef[4][2][2][6][6][4]; ++}; ++ ++struct hantro_g2_all_probs { ++ u8 kf_y_mode_prob[10][10][8]; ++ ++ u8 kf_y_mode_prob_tail[10][10][1]; ++ u8 ref_pred_probs[3]; ++ u8 mb_segment_tree_probs[7]; ++ u8 segment_pred_probs[3]; ++ u8 ref_scores[4]; ++ u8 prob_comppred[2]; ++ ++ u8 pad1[9]; ++ ++ u8 kf_uv_mode_prob[10][8]; ++ u8 kf_uv_mode_prob_tail[10][1]; ++ ++ u8 pad2[6]; ++ ++ struct hantro_g2_probs probs; ++}; ++ ++struct mv_counts { ++ u32 joints[4]; ++ u32 sign[2][2]; ++ u32 classes[2][11]; ++ u32 class0[2][2]; ++ u32 bits[2][10][2]; ++ u32 class0_fp[2][2][4]; ++ u32 fp[2][4]; ++ u32 class0_hp[2][2]; ++ u32 hp[2][2]; ++}; ++ ++struct symbol_counts { ++ u32 inter_mode_counts[7][3][2]; ++ u32 sb_ymode_counts[4][10]; ++ u32 uv_mode_counts[10][10]; ++ u32 partition_counts[16][4]; ++ u32 switchable_interp_counts[4][3]; ++ u32 intra_inter_count[4][2]; ++ u32 comp_inter_count[5][2]; ++ u32 single_ref_count[5][2][2]; ++ u32 comp_ref_count[5][2]; ++ u32 tx32x32_count[2][4]; ++ u32 tx16x16_count[2][3]; ++ u32 tx8x8_count[2][2]; ++ u32 mbskip_count[3][2]; ++ ++ struct mv_counts mv_counts; ++ ++ u32 count_coeffs[2][2][6][6][4]; ++ u32 count_coeffs8x8[2][2][6][6][4]; ++ u32 count_coeffs16x16[2][2][6][6][4]; ++ u32 count_coeffs32x32[2][2][6][6][4]; ++ ++ u32 count_eobs[4][2][2][6][6]; ++}; +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index a40b161e5956..455a107ffb02 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -150,6 +150,19 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + .step_height = MB_DIM, + }, + }, ++ { ++ .fourcc = V4L2_PIX_FMT_VP9_FRAME, ++ .codec_mode = HANTRO_MODE_VP9_DEC, ++ .max_depth = 2, ++ .frmsize = { ++ .min_width = 48, ++ .max_width = 3840, ++ .step_width = MB_DIM, ++ .min_height = 48, ++ .max_height = 2160, ++ .step_height = MB_DIM, ++ }, ++ }, + }; + + static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) +@@ -241,6 +254,13 @@ static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { + .init = hantro_hevc_dec_init, + .exit = hantro_hevc_dec_exit, + }, ++ [HANTRO_MODE_VP9_DEC] = { ++ .run = hantro_g2_vp9_dec_run, ++ .done = hantro_g2_vp9_dec_done, ++ .reset = imx8m_vpu_g2_reset, ++ .init = hantro_vp9_dec_init, ++ .exit = hantro_vp9_dec_exit, ++ }, + }; + + /* +@@ -281,7 +301,7 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { + .dec_offset = 0x0, + .dec_fmts = imx8m_vpu_g2_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), +- .codec = HANTRO_HEVC_DECODER, ++ .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, + .codec_ops = imx8mq_vpu_g2_codec_ops, + .init = imx8mq_vpu_hw_init, + .runtime_resume = imx8mq_runtime_resume, + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:41 +0100 +Subject: [PATCH] media: hantro: Staticize a struct in postprocessor code + +The struct is not used outside this file, so it can be static. + +Signed-off-by: Andrzej Pietrasiewicz +Reviewed-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +--- + drivers/staging/media/hantro/hantro_postproc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 4549aec08feb..89de43021779 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -33,7 +33,7 @@ + #define VPU_PP_OUT_RGB 0x0 + #define VPU_PP_OUT_YUYV 0x3 + +-const struct hantro_postproc_regs hantro_g1_postproc_regs = { ++static const struct hantro_postproc_regs hantro_g1_postproc_regs = { + .pipeline_en = {G1_REG_PP_INTERRUPT, 1, 0x1}, + .max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f}, + .clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1}, + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Andrzej Pietrasiewicz +Date: Tue, 16 Nov 2021 15:38:42 +0100 +Subject: [PATCH] media: hantro: Support NV12 on the G2 core + +The G2 decoder block produces NV12 4x4 tiled format (NV12_4L4). +Enable the G2 post-processor block, in order to produce regular NV12. + +The logic in hantro_postproc.c is leveraged to take care of allocating +the extra buffers and configure the post-processor, which is +significantly simpler than the one on the G1. + +Signed-off-by: Ezequiel Garcia +Signed-off-by: Andrzej Pietrasiewicz +Signed-off-by: Hans Verkuil +--- + .../staging/media/hantro/hantro_g2_vp9_dec.c | 6 ++-- + drivers/staging/media/hantro/hantro_hw.h | 1 + + .../staging/media/hantro/hantro_postproc.c | 31 +++++++++++++++++++ + drivers/staging/media/hantro/imx8m_vpu_hw.c | 11 +++++++ + 4 files changed, 46 insertions(+), 3 deletions(-) + +diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +index fc55b03a8004..e04242d10fa2 100644 +--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c ++++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +@@ -152,7 +152,7 @@ static void config_output(struct hantro_ctx *ctx, + hantro_reg_write(ctx->dev, &g2_out_dis, 0); + hantro_reg_write(ctx->dev, &g2_output_format, 0); + +- luma_addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); ++ luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); +@@ -191,7 +191,7 @@ static void config_ref(struct hantro_ctx *ctx, + hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); + hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); + +- luma_addr = vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0); ++ luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); +@@ -236,7 +236,7 @@ static void config_ref_registers(struct hantro_ctx *ctx, + config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts); + config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); + +- mv_addr = vb2_dma_contig_plane_dma_addr(&mv_ref->base.vb.vb2_buf, 0) + ++ mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + + mv_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); + +diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h +index fe5b51046d33..dbe51303724b 100644 +--- a/drivers/staging/media/hantro/hantro_hw.h ++++ b/drivers/staging/media/hantro/hantro_hw.h +@@ -310,6 +310,7 @@ extern const struct hantro_variant rk3399_vpu_variant; + extern const struct hantro_variant sama5d4_vdec_variant; + + extern const struct hantro_postproc_ops hantro_g1_postproc_ops; ++extern const struct hantro_postproc_ops hantro_g2_postproc_ops; + + extern const u32 hantro_vp8_dec_mc_filter[8][6]; + +diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c +index 89de43021779..a7774ad4c445 100644 +--- a/drivers/staging/media/hantro/hantro_postproc.c ++++ b/drivers/staging/media/hantro/hantro_postproc.c +@@ -11,6 +11,7 @@ + #include "hantro.h" + #include "hantro_hw.h" + #include "hantro_g1_regs.h" ++#include "hantro_g2_regs.h" + + #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ + { \ +@@ -99,6 +100,21 @@ static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) + HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width); + } + ++static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ struct vb2_v4l2_buffer *dst_buf; ++ size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height; ++ dma_addr_t dst_dma; ++ ++ dst_buf = hantro_get_dst_buf(ctx); ++ dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); ++ ++ hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); ++ hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); ++ hantro_reg_write(vpu, &g2_out_rs_e, 1); ++} ++ + void hantro_postproc_free(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +@@ -127,6 +143,9 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) + if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) + buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); ++ else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME) ++ buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width, ++ ctx->dst_fmt.height); + + for (i = 0; i < num_buffers; ++i) { + struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; +@@ -152,6 +171,13 @@ static void hantro_postproc_g1_disable(struct hantro_ctx *ctx) + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); + } + ++static void hantro_postproc_g2_disable(struct hantro_ctx *ctx) ++{ ++ struct hantro_dev *vpu = ctx->dev; ++ ++ hantro_reg_write(vpu, &g2_out_rs_e, 0); ++} ++ + void hantro_postproc_disable(struct hantro_ctx *ctx) + { + struct hantro_dev *vpu = ctx->dev; +@@ -172,3 +198,8 @@ const struct hantro_postproc_ops hantro_g1_postproc_ops = { + .enable = hantro_postproc_g1_enable, + .disable = hantro_postproc_g1_disable, + }; ++ ++const struct hantro_postproc_ops hantro_g2_postproc_ops = { ++ .enable = hantro_postproc_g2_enable, ++ .disable = hantro_postproc_g2_disable, ++}; +diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c +index 455a107ffb02..1a43f6fceef9 100644 +--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c ++++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c +@@ -132,6 +132,14 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { + }, + }; + ++static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_NV12, ++ .codec_mode = HANTRO_MODE_NONE, ++ .postprocessed = true, ++ }, ++}; ++ + static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12_4L4, +@@ -301,6 +309,9 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { + .dec_offset = 0x0, + .dec_fmts = imx8m_vpu_g2_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), ++ .postproc_fmts = imx8m_vpu_g2_postproc_fmts, ++ .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_g2_postproc_fmts), ++ .postproc_ops = &hantro_g2_postproc_ops, + .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, + .codec_ops = imx8mq_vpu_g2_codec_ops, + .init = imx8mq_vpu_hw_init, diff --git a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-list.patch b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-list.patch index 5dd82e3546..1815338b13 100644 --- a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-list.patch +++ b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-list.patch @@ -20,7 +20,7 @@ Reviewed-by: Ezequiel Garcia 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index 76e97cbe2512..af44a16c0c4a 100644 +index 951e19231da2..3becb0186062 100644 --- a/drivers/staging/media/rkvdec/rkvdec-h264.c +++ b/drivers/staging/media/rkvdec/rkvdec-h264.c @@ -752,7 +752,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx, @@ -47,10 +47,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 2 insertions(+) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 7131156c1f2c..65a8334a188b 100644 +index ad2624c30843..efd316550807 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -233,6 +233,8 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv, +@@ -268,6 +268,8 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv, pix_mp->pixelformat = coded_desc->decoded_fmts[0]; /* Always apply the frmsize constraint of the coded end. */ @@ -83,7 +83,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index af44a16c0c4a..9852c3519f56 100644 +index 3becb0186062..a379e43147fb 100644 --- a/drivers/staging/media/rkvdec/rkvdec-h264.c +++ b/drivers/staging/media/rkvdec/rkvdec-h264.c @@ -671,8 +671,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx, @@ -98,7 +98,7 @@ index af44a16c0c4a..9852c3519f56 100644 FRAME_MBS_ONLY_FLAG); WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD), diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 65a8334a188b..f4c5ee4a1e26 100644 +index efd316550807..c88e817cac0a 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -29,8 +29,11 @@ @@ -146,7 +146,7 @@ Reviewed-by: Ezequiel Garcia 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index 9852c3519f56..f3ff3e709169 100644 +index a379e43147fb..503ae683d0fd 100644 --- a/drivers/staging/media/rkvdec/rkvdec-h264.c +++ b/drivers/staging/media/rkvdec/rkvdec-h264.c @@ -661,8 +661,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx, @@ -180,10 +180,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 38 insertions(+), 39 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c -index 04af03285a20..ae585828c388 100644 +index df34b2a283bc..287488016ff2 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c -@@ -333,6 +333,33 @@ static inline unsigned int v4l2_format_block_height(const struct v4l2_format_inf +@@ -336,6 +336,33 @@ static inline unsigned int v4l2_format_block_height(const struct v4l2_format_inf return info->block_h[plane]; } @@ -217,7 +217,7 @@ index 04af03285a20..ae585828c388 100644 void v4l2_apply_frmsize_constraints(u32 *width, u32 *height, const struct v4l2_frmsize_stepwise *frmsize) { -@@ -368,37 +395,19 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt, +@@ -371,37 +398,19 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt, if (info->mem_planes == 1) { plane = &pixfmt->plane_fmt[0]; @@ -262,7 +262,7 @@ index 04af03285a20..ae585828c388 100644 } } return 0; -@@ -422,22 +431,12 @@ int v4l2_fill_pixfmt(struct v4l2_pix_format *pixfmt, u32 pixelformat, +@@ -425,22 +434,12 @@ int v4l2_fill_pixfmt(struct v4l2_pix_format *pixfmt, u32 pixelformat, pixfmt->width = width; pixfmt->height = height; pixfmt->pixelformat = pixelformat; @@ -317,7 +317,7 @@ Signed-off-by: Jonas Karlman 3 files changed, 8 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c -index ae585828c388..5bafbdbe30b0 100644 +index 287488016ff2..01f8a50586eb 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -267,6 +267,9 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) @@ -331,10 +331,10 @@ index ae585828c388..5bafbdbe30b0 100644 { .format = V4L2_PIX_FMT_YVU410, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 }, { .format = V4L2_PIX_FMT_YUV411P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 1 }, diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c -index 05d5db3d85e5..fe43d785414c 100644 +index 51289d4741dc..e6f2c65e24ca 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c -@@ -1282,6 +1282,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) +@@ -1299,6 +1299,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_NV61: descr = "Y/CrCb 4:2:2"; break; case V4L2_PIX_FMT_NV24: descr = "Y/CbCr 4:4:4"; break; case V4L2_PIX_FMT_NV42: descr = "Y/CrCb 4:4:4"; break; @@ -342,12 +342,12 @@ index 05d5db3d85e5..fe43d785414c 100644 + case V4L2_PIX_FMT_NV20: descr = "10-bit Y/CbCr 4:2:2 (Packed)"; break; case V4L2_PIX_FMT_NV12_4L4: descr = "Y/CbCr 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_NV12_16L16: descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break; - case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break; + case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h -index 9260791b8438..169f8ad6fade 100644 +index df8b9c486ba1..9845ce720b4e 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h -@@ -603,6 +603,9 @@ struct v4l2_pix_format { +@@ -602,6 +602,9 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */ #define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */ @@ -420,7 +420,7 @@ Signed-off-by: Jonas Karlman 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index f4c5ee4a1e26..d8d0eab9e25d 100644 +index c88e817cac0a..d4ae792874bb 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -27,6 +27,17 @@ @@ -441,7 +441,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644 static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl) { struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl); -@@ -177,13 +188,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx) +@@ -212,13 +223,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx) rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]); f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; @@ -458,7 +458,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644 } static int rkvdec_enum_framesizes(struct file *file, void *priv, -@@ -249,13 +256,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv, +@@ -284,13 +291,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv, &pix_mp->height, &coded_desc->frmsize); @@ -492,7 +492,7 @@ Signed-off-by: Jonas Karlman 2 files changed, 55 insertions(+), 6 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index d8d0eab9e25d..d31344c4acaa 100644 +index d4ae792874bb..3cbb1d26b972 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -38,6 +38,16 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, @@ -551,7 +551,7 @@ index d8d0eab9e25d..d31344c4acaa 100644 }; static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { -@@ -186,6 +219,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx) +@@ -221,6 +254,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx) { struct v4l2_format *f = &ctx->decoded_fmt; @@ -559,7 +559,7 @@ index d8d0eab9e25d..d31344c4acaa 100644 rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]); f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; f->fmt.pix_mp.width = ctx->coded_fmt.fmt.pix_mp.width; -@@ -241,13 +275,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv, +@@ -276,13 +310,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv, if (WARN_ON(!coded_desc)) return -EINVAL; @@ -583,7 +583,7 @@ index d8d0eab9e25d..d31344c4acaa 100644 /* Always apply the frmsize constraint of the coded end. */ pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width); -@@ -322,6 +360,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv, +@@ -346,6 +384,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv, return ret; ctx->decoded_fmt = *f; @@ -591,7 +591,7 @@ index d8d0eab9e25d..d31344c4acaa 100644 return 0; } -@@ -411,6 +450,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv, +@@ -446,6 +485,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv, if (WARN_ON(!ctx->coded_fmt_desc)) return -EINVAL; @@ -607,10 +607,10 @@ index d8d0eab9e25d..d31344c4acaa 100644 return -EINVAL; diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index 52ac3874c5e5..7b6f44ee8a1a 100644 +index 2f4ea1786b93..c26c472baa6f 100644 --- a/drivers/staging/media/rkvdec/rkvdec.h +++ b/drivers/staging/media/rkvdec/rkvdec.h -@@ -62,6 +62,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf) +@@ -66,6 +66,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf) struct rkvdec_coded_fmt_ops { int (*adjust_fmt)(struct rkvdec_ctx *ctx, struct v4l2_format *f); @@ -618,7 +618,7 @@ index 52ac3874c5e5..7b6f44ee8a1a 100644 int (*start)(struct rkvdec_ctx *ctx); void (*stop)(struct rkvdec_ctx *ctx); int (*run)(struct rkvdec_ctx *ctx); -@@ -95,6 +96,7 @@ struct rkvdec_ctx { +@@ -99,6 +100,7 @@ struct rkvdec_ctx { struct v4l2_fh fh; struct v4l2_format coded_fmt; struct v4l2_format decoded_fmt; @@ -685,7 +685,7 @@ index 88f5f4bb320b..c9a551dbd9bc 100644 .stop = rkvdec_h264_stop, .run = rkvdec_h264_run, diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index d31344c4acaa..d068383aeea8 100644 +index 3cbb1d26b972..bd106b23f4a0 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -31,7 +31,7 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, @@ -724,11 +724,11 @@ index d31344c4acaa..d068383aeea8 100644 if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl)) @@ -155,6 +151,9 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { - static const u32 rkvdec_h264_decoded_fmts[] = { + static const u32 rkvdec_h264_vp9_decoded_fmts[] = { V4L2_PIX_FMT_NV12, + V4L2_PIX_FMT_NV15, + V4L2_PIX_FMT_NV16, + V4L2_PIX_FMT_NV20, }; - static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { diff --git a/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch b/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch index a2f8d5a719..46f742fcd4 100644 --- a/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch +++ b/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch @@ -24,10 +24,10 @@ Reviewed-by: Sandy Huang 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c -index eda832f9200d..9498e9d466fb 100644 +index 25837b1d6639..f11080d63331 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c -@@ -258,6 +258,14 @@ const struct drm_format_info *__drm_format_info(u32 format) +@@ -261,6 +261,14 @@ const struct drm_format_info *__drm_format_info(u32 format) .num_planes = 2, .char_per_block = { 5, 5, 0 }, .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true }, @@ -43,10 +43,10 @@ index eda832f9200d..9498e9d466fb 100644 .num_planes = 3, .char_per_block = { 2, 2, 2 }, .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0, diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h -index f7156322aba5..a30bb7ef7632 100644 +index 7f652c96845b..37824734633c 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h -@@ -279,6 +279,8 @@ extern "C" { +@@ -285,6 +285,8 @@ extern "C" { * index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian */ #define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */ @@ -76,7 +76,7 @@ Reviewed-by: Sandy Huang 3 files changed, 54 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index f5b9028a16a3..9df4a271f3aa 100644 +index a25b98b7f5bd..91ded8a096ba 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -262,6 +262,18 @@ static bool has_rb_swapped(uint32_t format) @@ -160,7 +160,7 @@ index 857d97cdc67c..b7169010622a 100644 struct vop_reg act_info; struct vop_reg dsp_info; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index ca7cc82125cb..fff9c3387b9d 100644 +index 1f7353f0684a..474cc8807ac9 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -50,6 +50,23 @@ static const uint32_t formats_win_full[] = { @@ -257,7 +257,7 @@ Signed-off-by: Qinglang Miao 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c -index 8ab3247dbc4a..8429c6706ec5 100644 +index 16497c31d9f9..e46963577854 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-core.c +++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c @@ -100,7 +100,7 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp) @@ -294,7 +294,7 @@ Signed-off-by: Qinglang Miao 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 9df4a271f3aa..c3c0de25b8e6 100644 +index 91ded8a096ba..967f29625d7c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -603,7 +603,7 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) @@ -306,7 +306,7 @@ index 9df4a271f3aa..c3c0de25b8e6 100644 if (ret < 0) { DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); return ret; -@@ -1956,7 +1956,7 @@ static int vop_initial(struct vop *vop) +@@ -1953,7 +1953,7 @@ static int vop_initial(struct vop *vop) return PTR_ERR(vop->dclk); } @@ -340,10 +340,10 @@ Signed-off-by: Qinglang Miao 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c -index 489d63c05c0d..aaf0b6bbcb85 100644 +index be74c87a8be4..288462fd5d8e 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c -@@ -145,7 +145,7 @@ static int rk3288_lvds_poweron(struct rockchip_lvds *lvds) +@@ -146,7 +146,7 @@ static int rk3288_lvds_poweron(struct rockchip_lvds *lvds) DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret); return ret; } @@ -352,7 +352,7 @@ index 489d63c05c0d..aaf0b6bbcb85 100644 if (ret < 0) { DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret); clk_disable(lvds->pclk); -@@ -329,7 +329,7 @@ static int px30_lvds_poweron(struct rockchip_lvds *lvds) +@@ -330,7 +330,7 @@ static int px30_lvds_poweron(struct rockchip_lvds *lvds) { int ret; @@ -384,10 +384,10 @@ Tested-by: Heiko Stuebner 4 files changed, 15 insertions(+), 52 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -index b730b8d5d949..2e3ab573a817 100644 +index e4ebe60b3cc1..69c699459dce 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c -@@ -208,16 +208,7 @@ static void rockchip_drm_unbind(struct device *dev) +@@ -199,16 +199,7 @@ static void rockchip_drm_unbind(struct device *dev) drm_dev_put(drm_dev); } @@ -405,7 +405,7 @@ index b730b8d5d949..2e3ab573a817 100644 static const struct drm_driver rockchip_drm_driver = { .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, -@@ -226,7 +217,7 @@ static const struct drm_driver rockchip_drm_driver = { +@@ -217,7 +208,7 @@ static const struct drm_driver rockchip_drm_driver = { .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_import_sg_table = rockchip_gem_prime_import_sg_table, @@ -528,4 +528,3 @@ index 5a70a56cd406..47c1861eece0 100644 struct rockchip_gem_object * rockchip_gem_create_object(struct drm_device *drm, unsigned int size, bool alloc_kmap); - diff --git a/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch b/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch index 9d6d292d80..a1aa989eaf 100644 --- a/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch +++ b/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch @@ -13,10 +13,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index c3c0de25b8e6..395b7160a3c5 100644 +index 967f29625d7c..08940fecaac3 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1578,7 +1578,11 @@ static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc) +@@ -1575,7 +1575,11 @@ static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc) { struct rockchip_crtc_state *rockchip_state; @@ -47,10 +47,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 54 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 395b7160a3c5..3603bf81b58b 100644 +index 08940fecaac3..084d060051da 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1181,6 +1181,59 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) +@@ -1180,6 +1180,59 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) spin_unlock_irqrestore(&vop->irq_lock, flags); } @@ -110,7 +110,7 @@ index 395b7160a3c5..3603bf81b58b 100644 static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) -@@ -1561,6 +1614,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc, +@@ -1558,6 +1611,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc, } static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { @@ -133,10 +133,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 3603bf81b58b..91ed741d09cd 100644 +index 084d060051da..5b28c707b44c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1219,6 +1219,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, +@@ -1218,6 +1218,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, if (!vop_crtc_is_tmds(crtc)) return MODE_OK; @@ -183,7 +183,7 @@ index b7169010622a..0b1984585082 100644 #define VOP_FEATURE_OUTPUT_RGB10 BIT(0) #define VOP_FEATURE_INTERNAL_RGB BIT(1) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index fff9c3387b9d..37e623bdf287 100644 +index 474cc8807ac9..1d750cc492ec 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -734,6 +734,7 @@ static const struct vop_intr rk3288_vop_intr = { @@ -256,10 +256,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 91ed741d09cd..5badaf5a87e7 100644 +index 5b28c707b44c..f906eb758b33 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1213,6 +1213,7 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, +@@ -1212,6 +1212,7 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) { struct vop *vop = to_vop(crtc); @@ -267,7 +267,7 @@ index 91ed741d09cd..5badaf5a87e7 100644 long rounded_rate; long lowest, highest; -@@ -1234,6 +1235,10 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, +@@ -1233,6 +1234,10 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, if (rounded_rate > highest) return MODE_CLOCK_HIGH; @@ -278,7 +278,7 @@ index 91ed741d09cd..5badaf5a87e7 100644 return MODE_OK; } -@@ -1242,8 +1247,19 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, +@@ -1241,8 +1246,19 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *adjusted_mode) { struct vop *vop = to_vop(crtc); @@ -846,7 +846,7 @@ Signed-off-by: Jonas Karlman 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index 37e623bdf287..28df0bc79812 100644 +index 1d750cc492ec..91bdb85fdfd3 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -731,7 +731,7 @@ static const struct vop_intr rk3288_vop_intr = { @@ -903,10 +903,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 9c5a7791a1ab..b64b8fbe388d 100644 +index aaaa61875701..7160118864df 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -1018,7 +1018,7 @@ rga: rga@ff920000 { +@@ -1016,7 +1016,7 @@ rga: rga@ff920000 { }; vopb: vop@ff930000 { @@ -915,7 +915,7 @@ index 9c5a7791a1ab..b64b8fbe388d 100644 reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>; interrupts = ; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; -@@ -1068,7 +1068,7 @@ vopb_mmu: iommu@ff930300 { +@@ -1065,7 +1065,7 @@ vopb_mmu: iommu@ff930300 { }; vopl: vop@ff940000 { @@ -939,7 +939,7 @@ Signed-off-by: Jonas Karlman 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index e7c7c9b9c646..ee1968ecaa8f 100644 +index f08d0fded61f..0af70d3839dd 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -137,7 +137,8 @@ struct dw_hdmi_phy_data { @@ -952,7 +952,7 @@ index e7c7c9b9c646..ee1968ecaa8f 100644 }; struct dw_hdmi { -@@ -1441,7 +1442,8 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi) +@@ -1442,7 +1443,8 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi) */ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, const struct dw_hdmi_plat_data *pdata, @@ -962,7 +962,7 @@ index e7c7c9b9c646..ee1968ecaa8f 100644 { const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr; -@@ -1516,9 +1518,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, +@@ -1517,9 +1519,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, /* Write to the PHY as configured by the platform */ if (pdata->configure_phy) @@ -975,7 +975,7 @@ index e7c7c9b9c646..ee1968ecaa8f 100644 dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n", mpixelclock); diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c -index 7b8ec8310699..539d86131fd4 100644 +index 18ed14911b98..9c75095a25c5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c +++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c @@ -53,7 +53,8 @@ rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, @@ -989,10 +989,10 @@ index 7b8ec8310699..539d86131fd4 100644 const struct rcar_hdmi_phy_params *params = rcar_hdmi_phy_params; diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h -index 6a5716655619..182c8a8781df 100644 +index 2a1f85f9a8a3..85be16b9cfbf 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h -@@ -152,7 +152,8 @@ struct dw_hdmi_plat_data { +@@ -154,7 +154,8 @@ struct dw_hdmi_plat_data { const struct dw_hdmi_curr_ctrl *cur_ctr; const struct dw_hdmi_phy_config *phy_config; int (*configure_phy)(struct dw_hdmi *hdmi, void *data, @@ -1016,10 +1016,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index ee1968ecaa8f..8b3ce725b211 100644 +index 0af70d3839dd..48a343c9bcc3 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1448,6 +1448,7 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, +@@ -1449,6 +1449,7 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr; const struct dw_hdmi_phy_config *phy_config = pdata->phy_config; @@ -1027,7 +1027,7 @@ index ee1968ecaa8f..8b3ce725b211 100644 /* TOFIX Will need 420 specific PHY configuration tables */ -@@ -1457,11 +1458,11 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, +@@ -1458,11 +1459,11 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, break; for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++) @@ -1041,7 +1041,7 @@ index ee1968ecaa8f..8b3ce725b211 100644 break; if (mpll_config->mpixelclock == ~0UL || -@@ -1469,11 +1470,17 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, +@@ -1470,11 +1471,17 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, phy_config->mpixelclock == ~0UL) return -EINVAL; @@ -1075,10 +1075,10 @@ Signed-off-by: Jonas Karlman 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 8b3ce725b211..473db9629a66 100644 +index 48a343c9bcc3..90e683c65cbe 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1450,7 +1450,9 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, +@@ -1451,7 +1451,9 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, const struct dw_hdmi_phy_config *phy_config = pdata->phy_config; int depth; @@ -1090,10 +1090,10 @@ index 8b3ce725b211..473db9629a66 100644 /* PLL/MPLL Cfg - always match on final entry */ for (; mpll_config->mpixelclock != ~0UL; mpll_config++) diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h -index 182c8a8781df..5387d2cd1560 100644 +index 85be16b9cfbf..bf45a37170ea 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h -@@ -149,6 +149,7 @@ struct dw_hdmi_plat_data { +@@ -151,6 +151,7 @@ struct dw_hdmi_plat_data { /* Synopsys PHY support */ const struct dw_hdmi_mpll_config *mpll_cfg; @@ -1501,10 +1501,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 4 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 5badaf5a87e7..af9e40d7f49b 100644 +index f906eb758b33..ee6f7f653754 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1877,19 +1877,10 @@ static int vop_create_crtc(struct vop *vop) +@@ -1874,19 +1874,10 @@ static int vop_create_crtc(struct vop *vop) int ret; int i; @@ -1524,7 +1524,7 @@ index 5badaf5a87e7..af9e40d7f49b 100644 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, 0, &vop_plane_funcs, win_data->phy->data_formats, -@@ -1922,32 +1913,13 @@ static int vop_create_crtc(struct vop *vop) +@@ -1919,32 +1910,13 @@ static int vop_create_crtc(struct vop *vop) drm_crtc_enable_color_mgmt(crtc, 0, false, vop_data->lut_size); } @@ -1587,10 +1587,10 @@ index 3aa37e177667..a2b59faa9184 100644 dev->mode_config.helper_private = &rockchip_mode_config_helpers; } diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index af9e40d7f49b..ab3ae8d03231 100644 +index ee6f7f653754..350391e92c46 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1854,7 +1854,7 @@ static irqreturn_t vop_isr(int irq, void *data) +@@ -1851,7 +1851,7 @@ static irqreturn_t vop_isr(int irq, void *data) return ret; } @@ -1599,7 +1599,7 @@ index af9e40d7f49b..ab3ae8d03231 100644 const struct vop_win_data *win_data) { unsigned int flags = 0; -@@ -1864,6 +1864,8 @@ static void vop_plane_add_properties(struct drm_plane *plane, +@@ -1861,6 +1861,8 @@ static void vop_plane_add_properties(struct drm_plane *plane, if (flags) drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, DRM_MODE_ROTATE_0 | flags); @@ -1608,7 +1608,7 @@ index af9e40d7f49b..ab3ae8d03231 100644 } static int vop_create_crtc(struct vop *vop) -@@ -1895,7 +1897,7 @@ static int vop_create_crtc(struct vop *vop) +@@ -1892,7 +1894,7 @@ static int vop_create_crtc(struct vop *vop) plane = &vop_win->base; drm_plane_helper_add(plane, &plane_helper_funcs); @@ -1629,10 +1629,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index ab3ae8d03231..8c6d1881787c 100644 +index 350391e92c46..6f72c52db2d2 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1854,8 +1854,23 @@ static irqreturn_t vop_isr(int irq, void *data) +@@ -1851,8 +1851,23 @@ static irqreturn_t vop_isr(int irq, void *data) return ret; } @@ -1657,7 +1657,7 @@ index ab3ae8d03231..8c6d1881787c 100644 { unsigned int flags = 0; -@@ -1866,6 +1881,19 @@ static void vop_plane_add_properties(struct drm_plane *plane, int zpos, +@@ -1863,6 +1878,19 @@ static void vop_plane_add_properties(struct drm_plane *plane, int zpos, DRM_MODE_ROTATE_0 | flags); drm_plane_create_zpos_immutable_property(plane, zpos); @@ -1677,7 +1677,7 @@ index ab3ae8d03231..8c6d1881787c 100644 } static int vop_create_crtc(struct vop *vop) -@@ -1897,7 +1925,7 @@ static int vop_create_crtc(struct vop *vop) +@@ -1894,7 +1922,7 @@ static int vop_create_crtc(struct vop *vop) plane = &vop_win->base; drm_plane_helper_add(plane, &plane_helper_funcs); @@ -1703,10 +1703,10 @@ Signed-off-by: Jonas Karlman 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index b64b8fbe388d..38da07f42cd5 100644 +index 7160118864df..402492268dad 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -1027,6 +1027,8 @@ vopb: vop@ff930000 { +@@ -1025,6 +1025,8 @@ vopb: vop@ff930000 { resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; reset-names = "axi", "ahb", "dclk"; iommus = <&vopb_mmu>; @@ -1857,7 +1857,7 @@ Signed-off-by: Jonas Karlman 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c -index 62a4f2543960..980223c32aba 100644 +index 306910a3a0d3..1db62a3a4c67 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -105,6 +105,25 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = { @@ -1947,10 +1947,10 @@ Subject: [PATCH] HACK: dts: rockchip: do not use vopl for hdmi 2 files changed, 18 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 38da07f42cd5..831484253e27 100644 +index 402492268dad..eb9d3bdf1d5e 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -1085,11 +1085,6 @@ vopl_out: port { +@@ -1082,11 +1082,6 @@ vopl_out: port { #address-cells = <1>; #size-cells = <0>; @@ -1962,7 +1962,7 @@ index 38da07f42cd5..831484253e27 100644 vopl_out_edp: endpoint@1 { reg = <1>; remote-endpoint = <&edp_in_vopl>; -@@ -1230,10 +1225,6 @@ hdmi_in_vopb: endpoint@0 { +@@ -1226,10 +1221,6 @@ hdmi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_hdmi>; }; @@ -1974,10 +1974,10 @@ index 38da07f42cd5..831484253e27 100644 }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 44def886b391..52a748053a97 100644 +index d3cdf6f42a30..e21b93d57300 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1642,11 +1642,6 @@ vopl_out_edp: endpoint@1 { +@@ -1702,11 +1702,6 @@ vopl_out_edp: endpoint@1 { remote-endpoint = <&edp_in_vopl>; }; @@ -1989,7 +1989,7 @@ index 44def886b391..52a748053a97 100644 vopl_out_mipi1: endpoint@3 { reg = <3>; remote-endpoint = <&mipi1_in_vopl>; -@@ -1840,10 +1835,6 @@ hdmi_in_vopb: endpoint@0 { +@@ -1900,10 +1895,6 @@ hdmi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_hdmi>; }; @@ -2012,10 +2012,10 @@ Subject: [PATCH] WIP: drm/bridge: dw-hdmi: limit mode and bus format to 1 file changed, 76 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 473db9629a66..53fb6cf26137 100644 +index 90e683c65cbe..419fd9124d7b 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1859,6 +1859,21 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi, +@@ -1860,6 +1860,21 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi, HDMI_FC_PACKET_TX_EN_DRM_MASK, HDMI_FC_PACKET_TX_EN); } @@ -2037,7 +2037,7 @@ index 473db9629a66..53fb6cf26137 100644 static void hdmi_av_composer(struct dw_hdmi *hdmi, const struct drm_display_info *display, const struct drm_display_mode *mode) -@@ -1870,29 +1885,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, +@@ -1871,29 +1886,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, unsigned int vdisplay, hdisplay; vmode->mpixelclock = mode->clock * 1000; @@ -2070,7 +2070,7 @@ index 473db9629a66..53fb6cf26137 100644 dev_dbg(hdmi->dev, "final tmdsclock = %d\n", vmode->mtmdsclock); /* Set up HDMI_FC_INVIDCONF */ -@@ -2528,8 +2525,21 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) +@@ -2529,8 +2526,21 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) * - MEDIA_BUS_FMT_RGB888_1X24, */ @@ -2094,7 +2094,7 @@ index 473db9629a66..53fb6cf26137 100644 static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, -@@ -2541,8 +2551,6 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, +@@ -2542,8 +2552,6 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, struct drm_display_info *info = &conn->display_info; struct drm_display_mode *mode = &crtc_state->mode; u8 max_bpc = conn_state->max_requested_bpc; @@ -2103,7 +2103,7 @@ index 473db9629a66..53fb6cf26137 100644 u32 *output_fmts; unsigned int i = 0; -@@ -2565,29 +2573,33 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, +@@ -2566,29 +2574,33 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, * If the current mode enforces 4:2:0, force the output but format * to 4:2:0 and do not add the YUV422/444/RGB formats */ @@ -2145,7 +2145,7 @@ index 473db9629a66..53fb6cf26137 100644 } /* -@@ -2596,40 +2608,51 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, +@@ -2597,40 +2609,51 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, */ if (max_bpc >= 16 && info->bpc == 16) { @@ -2208,7 +2208,7 @@ index 473db9629a66..53fb6cf26137 100644 *num_output_fmts = i; -@@ -2809,11 +2832,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, +@@ -2811,11 +2834,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge, struct dw_hdmi *hdmi = bridge->driver_private; const struct dw_hdmi_plat_data *pdata = hdmi->plat_data; enum drm_mode_status mode_status = MODE_OK; @@ -2335,7 +2335,7 @@ index 134c2db8d0fe..cba63dd5e8c8 100644 return NULL; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h -index e33c2dcd0d4b..03944e08b6c7 100644 +index aa0909e8edf9..59716b037205 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -31,6 +31,8 @@ struct rockchip_crtc_state { @@ -2359,10 +2359,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 53fb6cf26137..df8ff6af9157 100644 +index 419fd9124d7b..21b4e5873630 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1646,6 +1646,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, +@@ -1647,6 +1647,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, const struct drm_connector *connector, const struct drm_display_mode *mode) { @@ -2370,7 +2370,7 @@ index 53fb6cf26137..df8ff6af9157 100644 struct hdmi_avi_infoframe frame; u8 val; -@@ -1703,6 +1704,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, +@@ -1704,6 +1705,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; } @@ -2379,7 +2379,7 @@ index 53fb6cf26137..df8ff6af9157 100644 /* * The Designware IP uses a different byte format from standard * AVI info frames, though generally the bits are in the correct -@@ -2416,7 +2419,8 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector, +@@ -2417,7 +2420,8 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector, if (!crtc) return 0; @@ -2389,7 +2389,7 @@ index 53fb6cf26137..df8ff6af9157 100644 crtc_state = drm_atomic_get_crtc_state(state, crtc); if (IS_ERR(crtc_state)) return PTR_ERR(crtc_state); -@@ -2484,6 +2488,8 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) +@@ -2485,6 +2489,8 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi) drm_connector_attach_max_bpc_property(connector, 8, 16); @@ -2490,7 +2490,7 @@ index cba63dd5e8c8..6429892ac4df 100644 static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = { diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 8c6d1881787c..abf3442baac0 100644 +index 6f72c52db2d2..68251bb45459 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -326,6 +326,17 @@ static int vop_convert_afbc_format(uint32_t format) @@ -2511,7 +2511,7 @@ index 8c6d1881787c..abf3442baac0 100644 static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src, uint32_t dst, bool is_horizontal, int vsu_mode, int *vskiplines) -@@ -1395,6 +1406,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -1392,6 +1403,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, u16 vact_end = vact_st + vdisplay; uint32_t pin_pol, val; int dither_bpc = s->output_bpc ? s->output_bpc : 10; @@ -2519,7 +2519,7 @@ index 8c6d1881787c..abf3442baac0 100644 int ret; if (old_state && old_state->self_refresh_active) { -@@ -1468,6 +1480,8 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -1465,6 +1477,8 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10)) s->output_mode = ROCKCHIP_OUT_MODE_P888; @@ -2528,7 +2528,7 @@ index 8c6d1881787c..abf3442baac0 100644 if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && dither_bpc <= 8) VOP_REG_SET(vop, common, pre_dither_down, 1); else -@@ -1483,6 +1497,21 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -1480,6 +1494,21 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, VOP_REG_SET(vop, common, out_mode, s->output_mode); @@ -2572,7 +2572,7 @@ index 0b1984585082..72dd670bf2a7 100644 struct vop_intr { diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index 28df0bc79812..e64cedf7c7a1 100644 +index 91bdb85fdfd3..6abf72b6a751 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -696,6 +696,11 @@ static const struct vop_common rk3288_common = { @@ -2688,7 +2688,7 @@ index 6429892ac4df..257770ea2dc7 100644 static struct rockchip_hdmi_chip_data rk3399_chip_data = { diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index abf3442baac0..5238bcbc7bae 100644 +index 68251bb45459..fb0ceda19fa4 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -327,6 +327,19 @@ static int vop_convert_afbc_format(uint32_t format) @@ -2711,7 +2711,7 @@ index abf3442baac0..5238bcbc7bae 100644 { switch (bus_format) { case MEDIA_BUS_FMT_YUV8_1X24: -@@ -1480,7 +1493,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -1477,7 +1490,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10)) s->output_mode = ROCKCHIP_OUT_MODE_P888; @@ -2720,7 +2720,7 @@ index abf3442baac0..5238bcbc7bae 100644 if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && dither_bpc <= 8) VOP_REG_SET(vop, common, pre_dither_down, 1); -@@ -1497,6 +1510,9 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, +@@ -1494,6 +1507,9 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, VOP_REG_SET(vop, common, out_mode, s->output_mode); @@ -2760,7 +2760,7 @@ index 72dd670bf2a7..a997578e174a 100644 /* output flags */ #define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index e64cedf7c7a1..a13059052124 100644 +index 6abf72b6a751..bcdfa9de3d62 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -698,6 +698,7 @@ static const struct vop_common rk3288_common = { @@ -2874,7 +2874,7 @@ Subject: [PATCH] !fixup drm/rockchip: rk3368's vop does not support 10-bit 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index a13059052124..11a80117f5bc 100644 +index bcdfa9de3d62..d70c61d64155 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -785,8 +785,8 @@ static const struct vop_intr rk3368_vop_intr = { @@ -2900,7 +2900,7 @@ Signed-off-by: Alex Bee 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index 11a80117f5bc..43541a042a81 100644 +index d70c61d64155..5b79d7911ad7 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -1103,12 +1103,36 @@ static const struct vop_intr rk3328_vop_intr = { @@ -2954,7 +2954,7 @@ Subject: [PATCH] rockchip: vop: force skip lines if image too big 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 5238bcbc7bae..20e45a23edf4 100644 +index fb0ceda19fa4..0513649886e1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -941,6 +941,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, @@ -3014,7 +3014,7 @@ Signed-off-by: Jonas Karlman 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index cfc57be009a6..9c10b6e3b9bc 100644 +index cc46855aba46..908cacb91c6a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -793,8 +793,8 @@ cru: clock-controller@ff440000 { @@ -3085,7 +3085,7 @@ Signed-off-by: Alex Bee 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index df8ff6af9157..5642a8c9bed5 100644 +index 21b4e5873630..e694655845e9 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -81,15 +81,15 @@ static const u16 csc_coeff_rgb_out_eitu709[3][4] = { @@ -3131,7 +3131,7 @@ Signed-off-by: Alex Bee 1 file changed, 28 insertions(+), 14 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c -index 980223c32aba..09c6f8020212 100644 +index 1db62a3a4c67..b4f559e2b86c 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -107,20 +107,34 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = { @@ -3445,10 +3445,10 @@ Signed-off-by: Algea Cao 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 5642a8c9bed5..84cc52858ffb 100644 +index e694655845e9..fb3ed58d0e77 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1060,7 +1060,7 @@ static void hdmi_video_csc(struct dw_hdmi *hdmi) +@@ -1061,7 +1061,7 @@ static void hdmi_video_csc(struct dw_hdmi *hdmi) if (is_color_space_interpolation(hdmi)) interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1; else if (is_color_space_decimation(hdmi)) @@ -3457,6 +3457,7 @@ index 5642a8c9bed5..84cc52858ffb 100644 switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) { case 8: + From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Tue, 1 Jun 2021 19:24:37 +0200 @@ -3474,7 +3475,7 @@ Signed-off-by: Alex Bee 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 8d1d2b8d038b..07e1327acf5e 100644 +index 976dd3c9c26f..a5929367ddbe 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -329,7 +329,7 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data, @@ -3487,7 +3488,7 @@ index 8d1d2b8d038b..07e1327acf5e 100644 static void diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 20a73cb3005e..b1473459a579 100644 +index 0513649886e1..ab2935df35c5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -402,8 +402,8 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, @@ -3502,7 +3503,6 @@ index 20a73cb3005e..b1473459a579 100644 } - From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 1 Oct 2019 20:52:42 +0000 @@ -3562,10 +3562,10 @@ Signed-off-by: Jonas Karlman 4 files changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/media/cec/core/cec-adap.c b/drivers/media/cec/core/cec-adap.c -index 79fa36de8a04..ffc934df0f4c 100644 +index cd9cb354dc2c..b9a3d7af4a0b 100644 --- a/drivers/media/cec/core/cec-adap.c +++ b/drivers/media/cec/core/cec-adap.c -@@ -1613,8 +1613,15 @@ void cec_s_phys_addr(struct cec_adapter *adap, u16 phys_addr, bool block) +@@ -1614,8 +1614,15 @@ void cec_s_phys_addr(struct cec_adapter *adap, u16 phys_addr, bool block) if (IS_ERR_OR_NULL(adap)) return; @@ -3657,6 +3657,7 @@ index 208c9613c07e..6cea463b37bd 100644 const struct cec_adap_ops *ops; void *priv; u32 capabilities; + From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 22 Oct 2021 11:17:30 +0200 @@ -3672,14 +3673,14 @@ depending on sink's implementation. Signed-off-by: Alex Bee --- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++++++++-------- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 84cc52858ffb..3c20ef3bd3c1 100644 +index fb3ed58d0e77..29ed45025745 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -3036,18 +3036,11 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) +@@ -3038,18 +3038,11 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) * ask the source to re-read the EDID. */ if (intr_stat & @@ -3699,7 +3700,7 @@ index 84cc52858ffb..3c20ef3bd3c1 100644 if (intr_stat & HDMI_IH_PHY_STAT0_HPD) { enum drm_connector_status status = phy_int_pol & HDMI_PHY_HPD ? connector_status_connected -@@ -3061,6 +3054,14 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) +@@ -3063,6 +3056,14 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) drm_helper_hpd_irq_event(hdmi->bridge.dev); drm_bridge_hpd_notify(&hdmi->bridge, status); } diff --git a/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch b/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch index c0f90d8482..a672d31142 100644 --- a/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch +++ b/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch @@ -10,10 +10,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index d068383aeea8..5c03fdbd45ec 100644 +index bd106b23f4a0..5d1d50e4fd57 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -986,7 +986,8 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv) +@@ -1021,7 +1021,8 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv) state = (status & RKVDEC_RDY_STA) ? VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; @@ -23,7 +23,7 @@ index d068383aeea8..5c03fdbd45ec 100644 if (cancel_delayed_work(&rkvdec->watchdog_work)) { struct rkvdec_ctx *ctx; -@@ -1007,7 +1008,8 @@ static void rkvdec_watchdog_func(struct work_struct *work) +@@ -1042,7 +1043,8 @@ static void rkvdec_watchdog_func(struct work_struct *work) ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); if (ctx) { dev_err(rkvdec->dev, "Frame processing timed out!\n"); @@ -46,10 +46,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 5c03fdbd45ec..ad5e02bbd8d0 100644 +index 5d1d50e4fd57..18f36e8546d9 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -1105,9 +1105,9 @@ static int rkvdec_remove(struct platform_device *pdev) +@@ -1138,9 +1138,9 @@ static int rkvdec_remove(struct platform_device *pdev) { struct rkvdec_dev *rkvdec = platform_get_drvdata(pdev); @@ -651,7 +651,7 @@ index 15b9bee92016..3acc914888f6 100644 #define RKVDEC_REG_SYSCTRL 0x008 #define RKVDEC_IN_ENDIAN BIT(0) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index ad5e02bbd8d0..6abce36eee7f 100644 +index 18f36e8546d9..8d2495bee04d 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -10,12 +10,15 @@ @@ -670,7 +670,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644 #include #include #include -@@ -687,6 +690,11 @@ static void rkvdec_job_finish(struct rkvdec_ctx *ctx, +@@ -722,6 +725,11 @@ static void rkvdec_job_finish(struct rkvdec_ctx *ctx, pm_runtime_mark_last_busy(rkvdec->dev); pm_runtime_put_autosuspend(rkvdec->dev); @@ -682,7 +682,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644 rkvdec_job_finish_no_pm(ctx, result); } -@@ -724,6 +732,33 @@ static void rkvdec_device_run(void *priv) +@@ -759,6 +767,33 @@ static void rkvdec_device_run(void *priv) if (WARN_ON(!desc)) return; @@ -716,7 +716,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644 ret = pm_runtime_resume_and_get(rkvdec->dev); if (ret < 0) { -@@ -991,6 +1026,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv) +@@ -1026,6 +1061,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv) if (cancel_delayed_work(&rkvdec->watchdog_work)) { struct rkvdec_ctx *ctx; @@ -728,7 +728,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644 ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); rkvdec_job_finish(ctx, state); } -@@ -1008,6 +1048,7 @@ static void rkvdec_watchdog_func(struct work_struct *work) +@@ -1043,6 +1083,7 @@ static void rkvdec_watchdog_func(struct work_struct *work) ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); if (ctx) { dev_err(rkvdec->dev, "Frame processing timed out!\n"); @@ -736,7 +736,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644 writel(RKVDEC_CONFIG_DEC_CLK_GATE_E | RKVDEC_IRQ_DIS, rkvdec->regs + RKVDEC_REG_INTERRUPT); writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL); -@@ -1085,6 +1126,18 @@ static int rkvdec_probe(struct platform_device *pdev) +@@ -1118,6 +1159,18 @@ static int rkvdec_probe(struct platform_device *pdev) return ret; } @@ -756,7 +756,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644 pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index 7b6f44ee8a1a..fa24bcb6ff42 100644 +index c26c472baa6f..f360f2ef799f 100644 --- a/drivers/staging/media/rkvdec/rkvdec.h +++ b/drivers/staging/media/rkvdec/rkvdec.h @@ -11,10 +11,11 @@ @@ -785,7 +785,7 @@ index 7b6f44ee8a1a..fa24bcb6ff42 100644 struct rkvdec_ctx; struct rkvdec_ctrl_desc { -@@ -90,6 +97,8 @@ struct rkvdec_dev { +@@ -94,6 +101,8 @@ struct rkvdec_dev { void __iomem *regs; struct mutex vdev_lock; /* serializes ioctls */ struct delayed_work watchdog_work; @@ -805,10 +805,10 @@ Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3399 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 52a748053a97..2c7b263a82cd 100644 +index e21b93d57300..638224b6ff70 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -993,7 +993,10 @@ power-domain@RK3399_PD_VCODEC { +@@ -1053,7 +1053,10 @@ power-domain@RK3399_PD_VCODEC { power-domain@RK3399_PD_VDU { reg = ; clocks = <&cru ACLK_VDU>, @@ -820,7 +820,7 @@ index 52a748053a97..2c7b263a82cd 100644 pm_qos = <&qos_video_m1_r>, <&qos_video_m1_w>; #power-domain-cells = <0>; -@@ -1266,6 +1269,11 @@ vdec: video-codec@ff660000 { +@@ -1326,6 +1329,11 @@ vdec: video-codec@ff660000 { clock-names = "axi", "ahb", "cabac", "core"; iommus = <&vdec_mmu>; power-domains = <&power RK3399_PD_VDU>; @@ -844,10 +844,10 @@ Signed-off-by: Alex Bee 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 2c7b263a82cd..ec3561d147d5 100644 +index 638224b6ff70..533a031c7e24 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1262,7 +1262,7 @@ vpu_mmu: iommu@ff650800 { +@@ -1322,7 +1322,7 @@ vpu_mmu: iommu@ff650800 { vdec: video-codec@ff660000 { compatible = "rockchip,rk3399-vdec"; @@ -883,7 +883,7 @@ index 3f4772c8d095..21a78372dae6 100644 reg: maxItems: 1 diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 9c10b6e3b9bc..23021373e15b 100644 +index 908cacb91c6a..d8a812a7d23b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -306,6 +306,10 @@ power-domain@RK3328_PD_HEVC { @@ -944,10 +944,10 @@ Signed-off-by: Alex Bee 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 6abce36eee7f..fbaf0303f7c2 100644 +index 8d2495bee04d..19b31bef0bb3 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -1096,10 +1096,12 @@ static int rkvdec_probe(struct platform_device *pdev) +@@ -1130,10 +1130,12 @@ static int rkvdec_probe(struct platform_device *pdev) return ret; /* @@ -961,8 +961,8 @@ index 6abce36eee7f..fbaf0303f7c2 100644 - clk_set_rate(rkvdec->clocks[0].clk, 500 * 1000 * 1000); + clk_set_rate(rkvdec->clocks[0].clk, 400 * 1000 * 1000); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - rkvdec->regs = devm_ioremap_resource(&pdev->dev, res); + rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(rkvdec->regs)) From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee @@ -977,7 +977,7 @@ Signed-off-by: Alex Bee 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c -index d4f52957cc53..3d98e2251ea5 100644 +index f372f767d4ff..f0014823a093 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -15,7 +15,8 @@ @@ -990,7 +990,7 @@ index d4f52957cc53..3d98e2251ea5 100644 /* * Supported formats. -@@ -272,13 +273,20 @@ static int rk3066_vpu_hw_init(struct hantro_dev *vpu) +@@ -273,13 +274,20 @@ static int rk3066_vpu_hw_init(struct hantro_dev *vpu) return 0; } @@ -1012,7 +1012,7 @@ index d4f52957cc53..3d98e2251ea5 100644 static void rk3066_vpu_dec_reset(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; -@@ -511,7 +519,7 @@ const struct hantro_variant rk3288_vpu_variant = { +@@ -512,7 +520,7 @@ const struct hantro_variant rk3288_vpu_variant = { .codec_ops = rk3288_vpu_codec_ops, .irqs = rockchip_vpu1_irqs, .num_irqs = ARRAY_SIZE(rockchip_vpu1_irqs), @@ -1021,3 +1021,59 @@ index d4f52957cc53..3d98e2251ea5 100644 .clk_names = rockchip_vpu_clk_names, .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) }; + +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Sun, 16 Jan 2022 18:38:23 +0100 +Subject: [PATCH] media: rkvdec: split vp9/h264 decoded_fmts + +Signed-off-by: Alex Bee +--- + drivers/staging/media/rkvdec/rkvdec.c | 14 +++++++++----- + 1 file changed, 9 insertions(+), 5 deletions(-) + +diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c +index 19b31bef0bb3..63385d92880e 100644 +--- a/drivers/staging/media/rkvdec/rkvdec.c ++++ b/drivers/staging/media/rkvdec/rkvdec.c +@@ -152,13 +152,17 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { + .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), + }; + +-static const u32 rkvdec_h264_vp9_decoded_fmts[] = { ++static const u32 rkvdec_h264_decoded_fmts[] = { + V4L2_PIX_FMT_NV12, + V4L2_PIX_FMT_NV15, + V4L2_PIX_FMT_NV16, + V4L2_PIX_FMT_NV20, + }; + ++static const u32 rkvdec_vp9_decoded_fmts[] = { ++ V4L2_PIX_FMT_NV12, ++}; ++ + static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, +@@ -192,8 +196,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + }, + .ctrls = &rkvdec_h264_ctrls, + .ops = &rkvdec_h264_fmt_ops, +- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), +- .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_decoded_fmts, + }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, +@@ -207,8 +211,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + }, + .ctrls = &rkvdec_vp9_ctrls, + .ops = &rkvdec_vp9_fmt_ops, +- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), +- .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts), ++ .decoded_fmts = rkvdec_vp9_decoded_fmts, + } + }; + diff --git a/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch b/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch index 6e8a5583d2..7b4796b7c5 100644 --- a/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch +++ b/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch @@ -1,3 +1,55 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Sun, 4 Jul 2021 15:19:44 +0200 +Subject: [PATCH] media: rkvdec: disable QoS for VP9 (corruptions on RK3328 + otherwise) + +Signed-off-by: Alex Bee +--- + drivers/staging/media/rkvdec/rkvdec-regs.h | 2 ++ + drivers/staging/media/rkvdec/rkvdec-vp9.c | 8 ++++++++ + 2 files changed, 10 insertions(+) + +diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h +index 3acc914888f6..265f5234f4eb 100644 +--- a/drivers/staging/media/rkvdec/rkvdec-regs.h ++++ b/drivers/staging/media/rkvdec/rkvdec-regs.h +@@ -222,6 +222,8 @@ + #define RKVDEC_REG_H264_ERR_E 0x134 + #define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff) + ++#define RKVDEC_QOS_CTRL 0x18C ++ + #define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410 + #define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450 + +diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c +index 311a12656072..ea270262bbed 100644 +--- a/drivers/staging/media/rkvdec/rkvdec-vp9.c ++++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c +@@ -802,6 +802,7 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_vp9_run run = { }; + int ret; ++ u32 reg; + + ret = rkvdec_vp9_run_preamble(ctx, &run); + if (ret) { +@@ -823,6 +824,13 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) + writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); + + writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); ++ ++ /* disable QOS for RK3328 - no effect on other SoCs */ ++ reg = readl(rkvdec->regs + RKVDEC_QOS_CTRL); ++ reg |= 0xFFFF; ++ reg &= (~BIT(12)); ++ writel(reg, rkvdec->regs + RKVDEC_QOS_CTRL); ++ + /* Start decoding! */ + writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | + RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, + From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 2 Sep 2020 19:52:02 +0200 @@ -11,11 +63,11 @@ is running at the same time (voltage to high) Signed-off-by: Alex Bee --- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 34 ++++++++++++++++++++++++ + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 35 ++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 23021373e15b..ca03c8ed9708 100644 +index d8a812a7d23b..e4c6a33b4b7e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -300,6 +300,11 @@ power: power-controller { @@ -150,10 +202,10 @@ index 9c1e38c54eae..ee332fc9cf1f 100644 simple-audio-card,codec { diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index ec3561d147d5..b2ed593a229c 100644 +index 533a031c7e24..c4894053b3f6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1807,7 +1807,7 @@ hdmi_sound: hdmi-sound { +@@ -1867,7 +1867,7 @@ hdmi_sound: hdmi-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <256>; @@ -174,10 +226,10 @@ Signed-off-by: Alex Bee 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c -index d62fb1a3c916..e46165bed006 100644 +index 4dcdec6487bb..6549651b9978 100644 --- a/drivers/gpu/drm/drm_gem.c +++ b/drivers/gpu/drm/drm_gem.c -@@ -1073,7 +1073,7 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size, +@@ -1051,7 +1051,7 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size, ret = obj->funcs->mmap(obj, vma); if (ret) goto err_drm_gem_object_put; @@ -517,7 +569,7 @@ Subject: [PATCH] WIP: dw-hdmi-cec: sleep 100ms on error 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c -index 70ab4fbdc23e..bf54bc70624f 100644 +index c8f44bcb298a..d4280ce4542c 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c @@ -4,6 +4,7 @@ @@ -581,10 +633,10 @@ Signed-off-by: Alex Bee 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index b2ed593a229c..27938ff0d208 100644 +index c4894053b3f6..b39a3390bd7d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1393,7 +1393,7 @@ cru: clock-controller@ff760000 { +@@ -1453,7 +1453,7 @@ cru: clock-controller@ff760000 { <1000000000>, <150000000>, <75000000>, <37500000>, @@ -632,10 +684,10 @@ Signed-off-by: Alex Bee 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c -index 3d98e2251ea5..b201700ccc8a 100644 +index f0014823a093..db4b9fe26256 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c -@@ -530,8 +530,7 @@ const struct hantro_variant rk3328_vpu_variant = { +@@ -531,8 +531,7 @@ const struct hantro_variant rk3328_vpu_variant = { .dec_offset = 0x400, .dec_fmts = rk3399_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts), @@ -646,7 +698,6 @@ index 3d98e2251ea5..b201700ccc8a 100644 .irqs = rockchip_vdpu2_irqs, .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs), - From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 30 Oct 2021 12:19:19 +0200 diff --git a/projects/Rockchip/patches/linux/default/linux-2000-v4l-wip-rkvdec-vp9.patch b/projects/Rockchip/patches/linux/default/linux-2000-v4l-wip-rkvdec-vp9.patch deleted file mode 100644 index b0bc10c98b..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-2000-v4l-wip-rkvdec-vp9.patch +++ /dev/null @@ -1,3674 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 2 Nov 2020 21:05:50 +0200 -Subject: [PATCH] media: uapi: Add VP9 stateless decoder controls - -Add the VP9 stateless decoder controls plus the documentation that goes -with it. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Signed-off-by: Adrian Ratiu ---- - .../userspace-api/media/v4l/biblio.rst | 10 + - .../media/v4l/ext-ctrls-codec.rst | 1100 +++++++++++++++++ - drivers/media/v4l2-core/v4l2-ctrls-core.c | 225 ++++ - drivers/media/v4l2-core/v4l2-ctrls-defs.c | 14 + - drivers/media/v4l2-core/v4l2-ioctl.c | 1 + - include/media/v4l2-ctrls.h | 5 + - include/media/vp9-ctrls.h | 486 ++++++++ - 7 files changed, 1841 insertions(+) - create mode 100644 include/media/vp9-ctrls.h - -diff --git a/Documentation/userspace-api/media/v4l/biblio.rst b/Documentation/userspace-api/media/v4l/biblio.rst -index 7b8e6738ff9e..9cd18c153d19 100644 ---- a/Documentation/userspace-api/media/v4l/biblio.rst -+++ b/Documentation/userspace-api/media/v4l/biblio.rst -@@ -417,3 +417,13 @@ VP8 - :title: RFC 6386: "VP8 Data Format and Decoding Guide" - - :author: J. Bankoski et al. -+ -+.. _vp9: -+ -+VP9 -+=== -+ -+ -+:title: VP9 Bitstream & Decoding Process Specification -+ -+:author: Adrian Grange (Google), Peter de Rivaz (Argon Design), Jonathan Hunt (Argon Design) -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 8c6e2a11ed95..5dd4afc5f1fe 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -3106,6 +3106,556 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - - ``padding[2]`` - - Applications and drivers must set this to zero. - -+.. _v4l2-mpeg-vp9: -+ -+``V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0..3) (struct)`` -+ Stores VP9 probabilities attached to a specific frame context. The VP9 -+ specification allows using a maximum of 4 contexts. Each frame being -+ decoded refers to one of those context. See section '7.1.2 Refresh -+ probs semantics' section of :ref:`vp9` for more details about these -+ contexts. -+ -+ This control is bi-directional: -+ -+ * all 4 contexts must be initialized by userspace just after the -+ stream is started and before the first decoding request is submitted. -+ * the referenced context might be read by the kernel when a decoding -+ request is submitted, and will be updated after the decoder is done -+ decoding the frame if the `V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX` flag -+ is set. -+ * contexts will be read back by user space before each decoding request -+ to retrieve the updated probabilities. -+ * userspace will re-initialize the context to their default values when -+ a reset context is required. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_vp9_frame_ctx -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{5.8cm}|p{4.8cm}|p{6.6cm}| -+ -+.. flat-table:: struct v4l2_ctrl_vp9_frame_ctx -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - struct :c:type:`v4l2_vp9_probabilities` -+ - ``probs`` -+ - Structure with VP9 probabilities attached to the context. -+ -+.. c:type:: v4l2_vp9_probabilities -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_probabilities -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``tx8[2][1]`` -+ - TX 8x8 probabilities. -+ * - __u8 -+ - ``tx16[2][2]`` -+ - TX 16x16 probabilities. -+ * - __u8 -+ - ``tx32[2][3]`` -+ - TX 32x32 probabilities. -+ * - __u8 -+ - ``coef[4][2][2][6][6][3]`` -+ - Coefficient probabilities. -+ * - __u8 -+ - ``skip[3]`` -+ - Skip probabilities. -+ * - __u8 -+ - ``inter_mode[7][3]`` -+ - Inter prediction mode probabilities. -+ * - __u8 -+ - ``interp_filter[4][2]`` -+ - Interpolation filter probabilities. -+ * - __u8 -+ - ``is_inter[4]`` -+ - Is inter-block probabilities. -+ * - __u8 -+ - ``comp_mode[5]`` -+ - Compound prediction mode probabilities. -+ * - __u8 -+ - ``single_ref[5][2]`` -+ - Single reference probabilities. -+ * - __u8 -+ - ``comp_mode[5]`` -+ - Compound reference probabilities. -+ * - __u8 -+ - ``y_mode[4][9]`` -+ - Y prediction mode probabilities. -+ * - __u8 -+ - ``uv_mode[10][9]`` -+ - UV prediction mode probabilities. -+ * - __u8 -+ - ``partition[16][3]`` -+ - Partition probabilities. -+ * - __u8 -+ - ``mv.joint[3]`` -+ - Motion vector joint probabilities. -+ * - __u8 -+ - ``mv.sign[2]`` -+ - Motion vector sign probabilities. -+ * - __u8 -+ - ``mv.class[2][10]`` -+ - Motion vector class probabilities. -+ * - __u8 -+ - ``mv.class0_bit[2]`` -+ - Motion vector class0 bit probabilities. -+ * - __u8 -+ - ``mv.bits[2][10]`` -+ - Motion vector bits probabilities. -+ * - __u8 -+ - ``mv.class0_fr[2][2][3]`` -+ - Motion vector class0 fractional bit probabilities. -+ * - __u8 -+ - ``mv.fr[2][3]`` -+ - Motion vector fractional bit probabilities. -+ * - __u8 -+ - ``mv.class0_hp[2]`` -+ - Motion vector class0 high precision fractional bit probabilities. -+ * - __u8 -+ - ``mv.hp[2]`` -+ - Motion vector high precision fractional bit probabilities. -+ -+``V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS (struct)`` -+ Specifies the frame parameters for the associated VP9 frame decode request. -+ This includes the necessary parameters for configuring a stateless hardware -+ decoding pipeline for VP9. The bitstream parameters are defined according -+ to :ref:`vp9`. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_vp9_frame_decode_params -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_ctrl_vp9_frame_decode_params -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u32 -+ - ``flags`` -+ - Combination of V4L2_VP9_FRAME_FLAG_* flags. See -+ :c:type:`v4l2_vp9_frame_flags`. -+ * - __u16 -+ - ``compressed_header_size`` -+ - Compressed header size in bytes. -+ * - __u16 -+ - ``uncompressed_header_size`` -+ - Uncompressed header size in bytes. -+ * - __u8 -+ - ``profile`` -+ - VP9 profile. Can be 0, 1, 2 or 3. -+ * - __u8 -+ - ``reset_frame_context`` -+ - Frame context that should be used/updated when decoding the frame. -+ * - __u8 -+ - ``bit_depth`` -+ - Component depth in bits. Must be 8 for profile 0 and 1. Must 10 or 12 -+ for profile 2 and 3. -+ * - __u8 -+ - ``interpolation_filter`` -+ - Specifies the filter selection used for performing inter prediction. See -+ :c:type:`v4l2_vp9_interpolation_filter`. -+ * - __u8 -+ - ``tile_cols_log2`` -+ - Specifies the base 2 logarithm of the width of each tile (where the -+ width is measured in units of 8x8 blocks). Shall be less than or equal -+ to 6. -+ * - __u8 -+ - ``tile_rows_log2`` -+ - Specifies the base 2 logarithm of the height of each tile (where the -+ height is measured in units of 8x8 blocks) -+ * - __u8 -+ - ``tx_mode`` -+ - Specifies the TX mode. See :c:type:`v4l2_vp9_tx_mode`. -+ * - __u8 -+ - ``reference_mode`` -+ - Specifies the type of inter prediction to be used. See -+ :c:type:`v4l2_vp9_reference_mode`. -+ * - __u8 -+ - ``padding[7]`` -+ - Needed to make this struct 64 bit aligned. Shall be filled with zeroes. -+ * - __u16 -+ - ``frame_width_minus_1`` -+ - Add 1 to get the frame width expressed in pixels. -+ * - __u16 -+ - ``frame_height_minus_1`` -+ - Add 1 to get the frame height expressed in pixels. -+ * - __u16 -+ - ``frame_width_minus_1`` -+ - Add 1 to get the expected render width expressed in pixels. This is -+ not used during the decoding process but might be used by HW scalers to -+ prepare a frame that's ready for scanout. -+ * - __u16 -+ - frame_height_minus_1 -+ - Add 1 to get the expected render height expressed in pixels. This is -+ not used during the decoding process but might be used by HW scalers to -+ prepare a frame that's ready for scanout. -+ * - __u64 -+ - ``refs[3]`` -+ - Array of reference frame timestamps. -+ * - struct :c:type:`v4l2_vp9_loop_filter` -+ - ``lf`` -+ - Loop filter parameters. See struct :c:type:`v4l2_vp9_loop_filter`. -+ * - struct :c:type:`v4l2_vp9_quantization` -+ - ``quant`` -+ - Quantization parameters. See :c:type:`v4l2_vp9_quantization`. -+ * - struct :c:type:`v4l2_vp9_segmentation` -+ - ``seg`` -+ - Segmentation parameters. See :c:type:`v4l2_vp9_segmentation`. -+ * - struct :c:type:`v4l2_vp9_probabilities` -+ - ``probs`` -+ - Probabilities. See :c:type:`v4l2_vp9_probabilities`. -+ -+.. c:type:: v4l2_vp9_frame_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_frame_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_FRAME_FLAG_KEY_FRAME`` -+ - The frame is a key frame. -+ * - ``V4L2_VP9_FRAME_FLAG_SHOW_FRAME`` -+ - The frame should be displayed. -+ * - ``V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT`` -+ - The decoding should be error resilient. -+ * - ``V4L2_VP9_FRAME_FLAG_INTRA_ONLY`` -+ - The frame does not reference other frames. -+ * - ``V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV`` -+ - the frame might can high precision motion vectors. -+ * - ``V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX`` -+ - Frame context should be updated after decoding. -+ * - ``V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE`` -+ - Parallel decoding is used. -+ * - ``V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING`` -+ - Vertical subsampling is enabled. -+ * - ``V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING`` -+ - Horizontal subsampling is enabled. -+ * - ``V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING`` -+ - The full UV range is used. -+ -+.. c:type:: v4l2_vp9_ref_id -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_ref_id -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_REF_ID_LAST`` -+ - Last reference frame. -+ * - ``V4L2_REF_ID_GOLDEN`` -+ - Golden reference frame. -+ * - ``V4L2_REF_ID_ALTREF`` -+ - Alternative reference frame. -+ * - ``V4L2_REF_ID_CNT`` -+ - Number of reference frames. -+ -+.. c:type:: v4l2_vp9_tx_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_tx_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_TX_MODE_ONLY_4X4`` -+ - Transform size is 4x4. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_8X8`` -+ - Transform size can be up to 8x8. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_16X16`` -+ - Transform size can be up to 16x16. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_32X32`` -+ - transform size can be up to 32x32. -+ * - ``V4L2_VP9_TX_MODE_SELECT`` -+ - Bitstream contains transform size for each block. -+ -+.. c:type:: v4l2_vp9_reference_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_reference_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_REF_MODE_SINGLE`` -+ - Indicates that all the inter blocks use only a single reference frame -+ to generate motion compensated prediction. -+ * - ``V4L2_VP9_REF_MODE_COMPOUND`` -+ - Requires all the inter blocks to use compound mode. Single reference -+ frame prediction is not allowed. -+ * - ``V4L2_VP9_REF_MODE_SELECT`` -+ - Allows each individual inter block to select between single and -+ compound prediction modes. -+ -+.. c:type:: v4l2_vp9_interpolation_filter -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_interpolation_filter -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP`` -+ - Height tap filter. -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH`` -+ - Height tap smooth filter. -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP_SHARP`` -+ - Height tap sharp filter. -+ * - ``V4L2_VP9_INTERP_FILTER_BILINEAR`` -+ - Bilinear filter. -+ * - ``V4L2_VP9_INTERP_FILTER_SWITCHABLE`` -+ - Filter selection is signaled at the block level. -+ -+.. c:type:: v4l2_vp9_reset_frame_context -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_reset_frame_context -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_RESET_FRAME_CTX_NONE`` -+ - Do not reset any frame context. -+ * - ``V4L2_VP9_RESET_FRAME_CTX_SPEC`` -+ - Reset the frame context pointed by -+ :c:type:`v4l2_ctrl_vp9_frame_decode_params`.frame_context_idx. -+ * - ``V4L2_VP9_RESET_FRAME_CTX_ALL`` -+ - Reset all frame contexts. -+ -+.. c:type:: v4l2_vp9_intra_prediction_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_intra_prediction_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_INTRA_PRED_DC`` -+ - DC intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_V`` -+ - Vertical intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_H`` -+ - Horizontal intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D45`` -+ - D45 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D135`` -+ - D135 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D117`` -+ - D117 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D153`` -+ - D153 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D207`` -+ - D207 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D63`` -+ - D63 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_TM`` -+ - True motion intra prediction. -+ -+.. c:type:: v4l2_vp9_segmentation -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_segmentation -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``flags`` -+ - Combination of V4L2_VP9_SEGMENTATION_FLAG_* flags. See -+ :c:type:`v4l2_vp9_segmentation_flags`. -+ * - __u8 -+ - ``tree_probs[7]`` -+ - Specifies the probability values to be used when decoding a Segment-ID. -+ See '5.15. Segmentation map' section of :ref:`vp9` for more details. -+ * - __u8 -+ - ``pred_prob[3]`` -+ - Specifies the probability values to be used when decoding a -+ Predicted-Segment-ID. See '6.4.14. Get segment id syntax' -+ section of :ref:`vp9` for more details. -+ * - __u8 -+ - ``padding[5]`` -+ - Used to align this struct on 64 bit. Shall be filled with zeroes. -+ * - __u8 -+ - ``feature_enabled[8]`` -+ - Bitmask defining which features are enabled in each segment. -+ * - __u8 -+ - ``feature_data[8][4]`` -+ - Data attached to each feature. Data entry is only valid if the feature -+ is enabled. -+ -+.. c:type:: v4l2_vp9_segment_feature -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_segment_feature -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_SEGMENT_FEATURE_QP_DELTA`` -+ - QP delta segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_LF`` -+ - Loop filter segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_REF_FRAME`` -+ - Reference frame segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_SKIP`` -+ - Skip segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_CNT`` -+ - Number of segment features. -+ -+.. c:type:: v4l2_vp9_segmentation_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_segmentation_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_ENABLED`` -+ - Indicates that this frame makes use of the segmentation tool. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP`` -+ - Indicates that the segmentation map should be updated during the -+ decoding of this frame. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE`` -+ - Indicates that the updates to the segmentation map are coded -+ relative to the existing segmentation map. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA`` -+ - Indicates that new parameters are about to be specified for each -+ segment. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE`` -+ - Indicates that the segmentation parameters represent the actual values -+ to be used. -+ -+.. c:type:: v4l2_vp9_quantization -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_quantization -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``base_q_idx`` -+ - Indicates the base frame qindex. -+ * - __s8 -+ - ``delta_q_y_dc`` -+ - Indicates the Y DC quantizer relative to base_q_idx. -+ * - __s8 -+ - ``delta_q_uv_dc`` -+ - Indicates the UV DC quantizer relative to base_q_idx. -+ * - __s8 -+ - ``delta_q_uv_ac`` -+ - Indicates the UV AC quantizer relative to base_q_idx. -+ * - __u8 -+ - ``padding[4]`` -+ - Padding bytes used to align this struct on 64 bit. Must be set to 0. -+ -+.. c:type:: v4l2_vp9_loop_filter -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_loop_filter -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``flags`` -+ - Combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags. -+ See :c:type:`v4l2_vp9_loop_filter_flags`. -+ * - __u8 -+ - ``level`` -+ - Indicates the loop filter strength. -+ * - __u8 -+ - ``sharpness`` -+ - Indicates the sharpness level. -+ * - __s8 -+ - ``ref_deltas[4]`` -+ - Contains the adjustment needed for the filter level based on the chosen -+ reference frame. -+ * - __s8 -+ - ``mode_deltas[2]`` -+ - Contains the adjustment needed for the filter level based on the chosen -+ mode -+ * - __u8 -+ - ``level_lookup[8][4][2]`` -+ - Level lookup table. -+ -+ -+.. c:type:: v4l2_vp9_loop_filter_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_loop_filter_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED`` -+ - When set, the filter level depends on the mode and reference frame used -+ to predict a block. -+ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE`` -+ - When set, the bitstream contains additional syntax elements that -+ specify which mode and reference frame deltas are to be updated. -+ - .. raw:: latex - - \normalsize -@@ -3157,6 +3707,556 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - - ``padding[6]`` - - Applications and drivers must set this to zero. - -+.. _v4l2-mpeg-vp9: -+ -+``V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0..3) (struct)`` -+ Stores VP9 probabilities attached to a specific frame context. The VP9 -+ specification allows using a maximum of 4 contexts. Each frame being -+ decoded refers to one of those context. See section '7.1.2 Refresh -+ probs semantics' section of :ref:`vp9` for more details about these -+ contexts. -+ -+ This control is bi-directional: -+ -+ * all 4 contexts must be initialized by userspace just after the -+ stream is started and before the first decoding request is submitted. -+ * the referenced context might be read by the kernel when a decoding -+ request is submitted, and will be updated after the decoder is done -+ decoding the frame if the `V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX` flag -+ is set. -+ * contexts will be read back by user space before each decoding request -+ to retrieve the updated probabilities. -+ * userspace will re-initialize the context to their default values when -+ a reset context is required. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_vp9_frame_ctx -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{5.8cm}|p{4.8cm}|p{6.6cm}| -+ -+.. flat-table:: struct v4l2_ctrl_vp9_frame_ctx -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - struct :c:type:`v4l2_vp9_probabilities` -+ - ``probs`` -+ - Structure with VP9 probabilities attached to the context. -+ -+.. c:type:: v4l2_vp9_probabilities -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_probabilities -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``tx8[2][1]`` -+ - TX 8x8 probabilities. -+ * - __u8 -+ - ``tx16[2][2]`` -+ - TX 16x16 probabilities. -+ * - __u8 -+ - ``tx32[2][3]`` -+ - TX 32x32 probabilities. -+ * - __u8 -+ - ``coef[4][2][2][6][6][3]`` -+ - Coefficient probabilities. -+ * - __u8 -+ - ``skip[3]`` -+ - Skip probabilities. -+ * - __u8 -+ - ``inter_mode[7][3]`` -+ - Inter prediction mode probabilities. -+ * - __u8 -+ - ``interp_filter[4][2]`` -+ - Interpolation filter probabilities. -+ * - __u8 -+ - ``is_inter[4]`` -+ - Is inter-block probabilities. -+ * - __u8 -+ - ``comp_mode[5]`` -+ - Compound prediction mode probabilities. -+ * - __u8 -+ - ``single_ref[5][2]`` -+ - Single reference probabilities. -+ * - __u8 -+ - ``comp_mode[5]`` -+ - Compound reference probabilities. -+ * - __u8 -+ - ``y_mode[4][9]`` -+ - Y prediction mode probabilities. -+ * - __u8 -+ - ``uv_mode[10][9]`` -+ - UV prediction mode probabilities. -+ * - __u8 -+ - ``partition[16][3]`` -+ - Partition probabilities. -+ * - __u8 -+ - ``mv.joint[3]`` -+ - Motion vector joint probabilities. -+ * - __u8 -+ - ``mv.sign[2]`` -+ - Motion vector sign probabilities. -+ * - __u8 -+ - ``mv.class[2][10]`` -+ - Motion vector class probabilities. -+ * - __u8 -+ - ``mv.class0_bit[2]`` -+ - Motion vector class0 bit probabilities. -+ * - __u8 -+ - ``mv.bits[2][10]`` -+ - Motion vector bits probabilities. -+ * - __u8 -+ - ``mv.class0_fr[2][2][3]`` -+ - Motion vector class0 fractional bit probabilities. -+ * - __u8 -+ - ``mv.fr[2][3]`` -+ - Motion vector fractional bit probabilities. -+ * - __u8 -+ - ``mv.class0_hp[2]`` -+ - Motion vector class0 high precision fractional bit probabilities. -+ * - __u8 -+ - ``mv.hp[2]`` -+ - Motion vector high precision fractional bit probabilities. -+ -+``V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS (struct)`` -+ Specifies the frame parameters for the associated VP9 frame decode request. -+ This includes the necessary parameters for configuring a stateless hardware -+ decoding pipeline for VP9. The bitstream parameters are defined according -+ to :ref:`vp9`. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_vp9_frame_decode_params -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_ctrl_vp9_frame_decode_params -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u32 -+ - ``flags`` -+ - Combination of V4L2_VP9_FRAME_FLAG_* flags. See -+ :c:type:`v4l2_vp9_frame_flags`. -+ * - __u16 -+ - ``compressed_header_size`` -+ - Compressed header size in bytes. -+ * - __u16 -+ - ``uncompressed_header_size`` -+ - Uncompressed header size in bytes. -+ * - __u8 -+ - ``profile`` -+ - VP9 profile. Can be 0, 1, 2 or 3. -+ * - __u8 -+ - ``reset_frame_context`` -+ - Frame context that should be used/updated when decoding the frame. -+ * - __u8 -+ - ``bit_depth`` -+ - Component depth in bits. Must be 8 for profile 0 and 1. Must 10 or 12 -+ for profile 2 and 3. -+ * - __u8 -+ - ``interpolation_filter`` -+ - Specifies the filter selection used for performing inter prediction. See -+ :c:type:`v4l2_vp9_interpolation_filter`. -+ * - __u8 -+ - ``tile_cols_log2`` -+ - Specifies the base 2 logarithm of the width of each tile (where the -+ width is measured in units of 8x8 blocks). Shall be less than or equal -+ to 6. -+ * - __u8 -+ - ``tile_rows_log2`` -+ - Specifies the base 2 logarithm of the height of each tile (where the -+ height is measured in units of 8x8 blocks) -+ * - __u8 -+ - ``tx_mode`` -+ - Specifies the TX mode. See :c:type:`v4l2_vp9_tx_mode`. -+ * - __u8 -+ - ``reference_mode`` -+ - Specifies the type of inter prediction to be used. See -+ :c:type:`v4l2_vp9_reference_mode`. -+ * - __u8 -+ - ``padding[7]`` -+ - Needed to make this struct 64 bit aligned. Shall be filled with zeroes. -+ * - __u16 -+ - ``frame_width_minus_1`` -+ - Add 1 to get the frame width expressed in pixels. -+ * - __u16 -+ - ``frame_height_minus_1`` -+ - Add 1 to get the frame height expressed in pixels. -+ * - __u16 -+ - ``frame_width_minus_1`` -+ - Add 1 to get the expected render width expressed in pixels. This is -+ not used during the decoding process but might be used by HW scalers to -+ prepare a frame that's ready for scanout. -+ * - __u16 -+ - frame_height_minus_1 -+ - Add 1 to get the expected render height expressed in pixels. This is -+ not used during the decoding process but might be used by HW scalers to -+ prepare a frame that's ready for scanout. -+ * - __u64 -+ - ``refs[3]`` -+ - Array of reference frame timestamps. -+ * - struct :c:type:`v4l2_vp9_loop_filter` -+ - ``lf`` -+ - Loop filter parameters. See struct :c:type:`v4l2_vp9_loop_filter`. -+ * - struct :c:type:`v4l2_vp9_quantization` -+ - ``quant`` -+ - Quantization parameters. See :c:type:`v4l2_vp9_quantization`. -+ * - struct :c:type:`v4l2_vp9_segmentation` -+ - ``seg`` -+ - Segmentation parameters. See :c:type:`v4l2_vp9_segmentation`. -+ * - struct :c:type:`v4l2_vp9_probabilities` -+ - ``probs`` -+ - Probabilities. See :c:type:`v4l2_vp9_probabilities`. -+ -+.. c:type:: v4l2_vp9_frame_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_frame_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_FRAME_FLAG_KEY_FRAME`` -+ - The frame is a key frame. -+ * - ``V4L2_VP9_FRAME_FLAG_SHOW_FRAME`` -+ - The frame should be displayed. -+ * - ``V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT`` -+ - The decoding should be error resilient. -+ * - ``V4L2_VP9_FRAME_FLAG_INTRA_ONLY`` -+ - The frame does not reference other frames. -+ * - ``V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV`` -+ - the frame might can high precision motion vectors. -+ * - ``V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX`` -+ - Frame context should be updated after decoding. -+ * - ``V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE`` -+ - Parallel decoding is used. -+ * - ``V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING`` -+ - Vertical subsampling is enabled. -+ * - ``V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING`` -+ - Horizontal subsampling is enabled. -+ * - ``V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING`` -+ - The full UV range is used. -+ -+.. c:type:: v4l2_vp9_ref_id -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_ref_id -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_REF_ID_LAST`` -+ - Last reference frame. -+ * - ``V4L2_REF_ID_GOLDEN`` -+ - Golden reference frame. -+ * - ``V4L2_REF_ID_ALTREF`` -+ - Alternative reference frame. -+ * - ``V4L2_REF_ID_CNT`` -+ - Number of reference frames. -+ -+.. c:type:: v4l2_vp9_tx_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_tx_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_TX_MODE_ONLY_4X4`` -+ - Transform size is 4x4. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_8X8`` -+ - Transform size can be up to 8x8. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_16X16`` -+ - Transform size can be up to 16x16. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_32X32`` -+ - transform size can be up to 32x32. -+ * - ``V4L2_VP9_TX_MODE_SELECT`` -+ - Bitstream contains transform size for each block. -+ -+.. c:type:: v4l2_vp9_reference_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_reference_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_REF_MODE_SINGLE`` -+ - Indicates that all the inter blocks use only a single reference frame -+ to generate motion compensated prediction. -+ * - ``V4L2_VP9_REF_MODE_COMPOUND`` -+ - Requires all the inter blocks to use compound mode. Single reference -+ frame prediction is not allowed. -+ * - ``V4L2_VP9_REF_MODE_SELECT`` -+ - Allows each individual inter block to select between single and -+ compound prediction modes. -+ -+.. c:type:: v4l2_vp9_interpolation_filter -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_interpolation_filter -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP`` -+ - Height tap filter. -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH`` -+ - Height tap smooth filter. -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP_SHARP`` -+ - Height tap sharp filter. -+ * - ``V4L2_VP9_INTERP_FILTER_BILINEAR`` -+ - Bilinear filter. -+ * - ``V4L2_VP9_INTERP_FILTER_SWITCHABLE`` -+ - Filter selection is signaled at the block level. -+ -+.. c:type:: v4l2_vp9_reset_frame_context -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_reset_frame_context -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_RESET_FRAME_CTX_NONE`` -+ - Do not reset any frame context. -+ * - ``V4L2_VP9_RESET_FRAME_CTX_SPEC`` -+ - Reset the frame context pointed by -+ :c:type:`v4l2_ctrl_vp9_frame_decode_params`.frame_context_idx. -+ * - ``V4L2_VP9_RESET_FRAME_CTX_ALL`` -+ - Reset all frame contexts. -+ -+.. c:type:: v4l2_vp9_intra_prediction_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_intra_prediction_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_INTRA_PRED_DC`` -+ - DC intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_V`` -+ - Vertical intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_H`` -+ - Horizontal intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D45`` -+ - D45 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D135`` -+ - D135 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D117`` -+ - D117 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D153`` -+ - D153 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D207`` -+ - D207 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D63`` -+ - D63 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_TM`` -+ - True motion intra prediction. -+ -+.. c:type:: v4l2_vp9_segmentation -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_segmentation -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``flags`` -+ - Combination of V4L2_VP9_SEGMENTATION_FLAG_* flags. See -+ :c:type:`v4l2_vp9_segmentation_flags`. -+ * - __u8 -+ - ``tree_probs[7]`` -+ - Specifies the probability values to be used when decoding a Segment-ID. -+ See '5.15. Segmentation map' section of :ref:`vp9` for more details. -+ * - __u8 -+ - ``pred_prob[3]`` -+ - Specifies the probability values to be used when decoding a -+ Predicted-Segment-ID. See '6.4.14. Get segment id syntax' -+ section of :ref:`vp9` for more details. -+ * - __u8 -+ - ``padding[5]`` -+ - Used to align this struct on 64 bit. Shall be filled with zeroes. -+ * - __u8 -+ - ``feature_enabled[8]`` -+ - Bitmask defining which features are enabled in each segment. -+ * - __u8 -+ - ``feature_data[8][4]`` -+ - Data attached to each feature. Data entry is only valid if the feature -+ is enabled. -+ -+.. c:type:: v4l2_vp9_segment_feature -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_segment_feature -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_SEGMENT_FEATURE_QP_DELTA`` -+ - QP delta segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_LF`` -+ - Loop filter segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_REF_FRAME`` -+ - Reference frame segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_SKIP`` -+ - Skip segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_CNT`` -+ - Number of segment features. -+ -+.. c:type:: v4l2_vp9_segmentation_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_segmentation_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_ENABLED`` -+ - Indicates that this frame makes use of the segmentation tool. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP`` -+ - Indicates that the segmentation map should be updated during the -+ decoding of this frame. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE`` -+ - Indicates that the updates to the segmentation map are coded -+ relative to the existing segmentation map. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA`` -+ - Indicates that new parameters are about to be specified for each -+ segment. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE`` -+ - Indicates that the segmentation parameters represent the actual values -+ to be used. -+ -+.. c:type:: v4l2_vp9_quantization -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_quantization -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``base_q_idx`` -+ - Indicates the base frame qindex. -+ * - __s8 -+ - ``delta_q_y_dc`` -+ - Indicates the Y DC quantizer relative to base_q_idx. -+ * - __s8 -+ - ``delta_q_uv_dc`` -+ - Indicates the UV DC quantizer relative to base_q_idx. -+ * - __s8 -+ - ``delta_q_uv_ac`` -+ - Indicates the UV AC quantizer relative to base_q_idx. -+ * - __u8 -+ - ``padding[4]`` -+ - Padding bytes used to align this struct on 64 bit. Must be set to 0. -+ -+.. c:type:: v4l2_vp9_loop_filter -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_loop_filter -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``flags`` -+ - Combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags. -+ See :c:type:`v4l2_vp9_loop_filter_flags`. -+ * - __u8 -+ - ``level`` -+ - Indicates the loop filter strength. -+ * - __u8 -+ - ``sharpness`` -+ - Indicates the sharpness level. -+ * - __s8 -+ - ``ref_deltas[4]`` -+ - Contains the adjustment needed for the filter level based on the chosen -+ reference frame. -+ * - __s8 -+ - ``mode_deltas[2]`` -+ - Contains the adjustment needed for the filter level based on the chosen -+ mode -+ * - __u8 -+ - ``level_lookup[8][4][2]`` -+ - Level lookup table. -+ -+ -+.. c:type:: v4l2_vp9_loop_filter_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_loop_filter_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED`` -+ - When set, the filter level depends on the mode and reference frame used -+ to predict a block. -+ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE`` -+ - When set, the bitstream contains additional syntax elements that -+ specify which mode and reference frame deltas are to be updated. -+ - .. raw:: latex - - \normalsize -diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c -index c4b5082849b6..b4802c9989fd 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls-core.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c -@@ -289,6 +289,219 @@ static void std_log(const struct v4l2_ctrl *ctrl) - } - } - -+static int -+validate_vp9_lf_params(struct v4l2_vp9_loop_filter *lf) -+{ -+ unsigned int i, j, k; -+ -+ if (lf->flags & -+ ~(V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED | -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED implies -+ * V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE. -+ */ -+ if (lf->flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE && -+ !(lf->flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED)) -+ return -EINVAL; -+ -+ /* That all values are in the accepted range. */ -+ if (lf->level > GENMASK(5, 0)) -+ return -EINVAL; -+ -+ if (lf->sharpness > GENMASK(2, 0)) -+ return -EINVAL; -+ -+ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { -+ if (lf->ref_deltas[i] < -63 || lf->ref_deltas[i] > 63) -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { -+ if (lf->mode_deltas[i] < -63 || lf->mode_deltas[i] > 63) -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(lf->level_lookup); i++) { -+ for (j = 0; j < ARRAY_SIZE(lf->level_lookup[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(lf->level_lookup[0][0]); k++) { -+ if (lf->level_lookup[i][j][k] > 63) -+ return -EINVAL; -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+static int -+validate_vp9_quant_params(struct v4l2_vp9_quantization *quant) -+{ -+ if (quant->delta_q_y_dc < -15 || quant->delta_q_y_dc > 15 || -+ quant->delta_q_uv_dc < -15 || quant->delta_q_uv_dc > 15 || -+ quant->delta_q_uv_ac < -15 || quant->delta_q_uv_ac > 15) -+ return -EINVAL; -+ -+ memset(quant->padding, 0, sizeof(quant->padding)); -+ return 0; -+} -+ -+static int -+validate_vp9_seg_params(struct v4l2_vp9_segmentation *seg) -+{ -+ unsigned int i, j; -+ -+ if (seg->flags & -+ ~(V4L2_VP9_SEGMENTATION_FLAG_ENABLED | -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP | -+ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE | -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA | -+ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP and -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA imply -+ * V4L2_VP9_SEGMENTATION_FLAG_ENABLED. -+ */ -+ if ((seg->flags & -+ (V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP | -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA)) && -+ !(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE implies -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP. -+ */ -+ if (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE && -+ !(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE implies -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA. -+ */ -+ if (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE && -+ !(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA)) -+ return -EINVAL; -+ -+ for (i = 0; i < ARRAY_SIZE(seg->feature_enabled); i++) { -+ if (seg->feature_enabled[i] & -+ ~(V4L2_VP9_SEGMENT_FEATURE_QP_DELTA | -+ V4L2_VP9_SEGMENT_FEATURE_LF | -+ V4L2_VP9_SEGMENT_FEATURE_REF_FRAME | -+ V4L2_VP9_SEGMENT_FEATURE_SKIP)) -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(seg->feature_data); i++) { -+ const int range[] = {255, 63, 3, 0}; -+ -+ for (j = 0; j < ARRAY_SIZE(seg->feature_data[j]); j++) { -+ if (seg->feature_data[i][j] < -range[j] || -+ seg->feature_data[i][j] > range[j]) -+ return -EINVAL; -+ } -+ } -+ -+ memset(seg->padding, 0, sizeof(seg->padding)); -+ return 0; -+} -+ -+static int -+validate_vp9_frame_decode_params(struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ int ret; -+ -+ /* Make sure we're not passed invalid flags. */ -+ if (dec_params->flags & -+ ~(V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_SHOW_FRAME | -+ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY | -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV | -+ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX | -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE | -+ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING | -+ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING | -+ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING)) -+ return -EINVAL; -+ -+ /* -+ * The refresh context and error resilient flags are mutually exclusive. -+ * Same goes for parallel decoding and error resilient modes. -+ */ -+ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT && -+ dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX | -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) -+ return -EINVAL; -+ -+ if (dec_params->profile > V4L2_VP9_PROFILE_MAX) -+ return -EINVAL; -+ -+ if (dec_params->reset_frame_context > V4L2_VP9_RESET_FRAME_CTX_ALL) -+ return -EINVAL; -+ -+ if (dec_params->frame_context_idx >= V4L2_VP9_NUM_FRAME_CTX) -+ return -EINVAL; -+ -+ /* -+ * Profiles 0 and 1 only support 8-bit depth, profiles 2 and 3 only 10 -+ * and 12 bit depths. -+ */ -+ if ((dec_params->profile < 2 && dec_params->bit_depth != 8) || -+ (dec_params->profile >= 2 && -+ (dec_params->bit_depth != 10 && dec_params->bit_depth != 12))) -+ return -EINVAL; -+ -+ /* Profile 0 and 2 only accept YUV 4:2:0. */ -+ if ((dec_params->profile == 0 || dec_params->profile == 2) && -+ (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) || -+ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) -+ return -EINVAL; -+ -+ /* Profile 1 and 3 only accept YUV 4:2:2, 4:4:0 and 4:4:4. */ -+ if ((dec_params->profile == 1 || dec_params->profile == 3) && -+ ((dec_params->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) && -+ (dec_params->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) -+ return -EINVAL; -+ -+ if (dec_params->interpolation_filter > V4L2_VP9_INTERP_FILTER_SWITCHABLE) -+ return -EINVAL; -+ -+ /* -+ * According to the spec, tile_cols_log2 shall be less than or equal -+ * to 6. -+ */ -+ if (dec_params->tile_cols_log2 > 6) -+ return -EINVAL; -+ -+ if (dec_params->tx_mode > V4L2_VP9_TX_MODE_SELECT) -+ return -EINVAL; -+ -+ if (dec_params->reference_mode > V4L2_VP9_REF_MODE_SELECT) -+ return -EINVAL; -+ -+ ret = validate_vp9_lf_params(&dec_params->lf); -+ if (ret) -+ return ret; -+ -+ ret = validate_vp9_quant_params(&dec_params->quant); -+ if (ret) -+ return ret; -+ -+ ret = validate_vp9_seg_params(&dec_params->seg); -+ if (ret) -+ return ret; -+ -+ memset(dec_params->padding, 0, sizeof(dec_params->padding)); -+ return 0; -+} -+ - /* - * Round towards the closest legal value. Be careful when we are - * close to the maximum range of the control type to prevent -@@ -574,6 +787,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - zero_padding(p_vp8_frame->coder_state); - break; - -+ case V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS: -+ return validate_vp9_frame_decode_params(p); -+ -+ case V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT: -+ break; -+ - case V4L2_CTRL_TYPE_HEVC_SPS: - p_hevc_sps = p; - -@@ -1231,6 +1450,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, - case V4L2_CTRL_TYPE_VP8_FRAME: - elem_size = sizeof(struct v4l2_ctrl_vp8_frame); - break; -+ case V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT: -+ elem_size = sizeof(struct v4l2_ctrl_vp9_frame_ctx); -+ break; -+ case V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS: -+ elem_size = sizeof(struct v4l2_ctrl_vp9_frame_decode_params); -+ break; - case V4L2_CTRL_TYPE_HEVC_SPS: - elem_size = sizeof(struct v4l2_ctrl_hevc_sps); - break; -diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c -index b6344bbf1e00..22a031e25499 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c -@@ -940,6 +940,11 @@ const char *v4l2_ctrl_get_name(u32 id) - case V4L2_CID_MPEG_VIDEO_VP8_PROFILE: return "VP8 Profile"; - case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: return "VP9 Profile"; - case V4L2_CID_MPEG_VIDEO_VP9_LEVEL: return "VP9 Level"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS: return "VP9 Frame Decode Parameters"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0): return "VP9 Frame Context 0"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(1): return "VP9 Frame Context 1"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(2): return "VP9 Frame Context 2"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(3): return "VP9 Frame Context 3"; - - /* HEVC controls */ - case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value"; -@@ -1479,6 +1484,15 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, - case V4L2_CID_STATELESS_VP8_FRAME: - *type = V4L2_CTRL_TYPE_VP8_FRAME; - break; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS: -+ *type = V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS; -+ break; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0): -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(1): -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(2): -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(3): -+ *type = V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT; -+ break; - case V4L2_CID_MPEG_VIDEO_HEVC_SPS: - *type = V4L2_CTRL_TYPE_HEVC_SPS; - break; -diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c -index fe43d785414c..47f812a081ca 100644 ---- a/drivers/media/v4l2-core/v4l2-ioctl.c -+++ b/drivers/media/v4l2-core/v4l2-ioctl.c -@@ -1394,6 +1394,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) - case V4L2_PIX_FMT_VP8: descr = "VP8"; break; - case V4L2_PIX_FMT_VP8_FRAME: descr = "VP8 Frame"; break; - case V4L2_PIX_FMT_VP9: descr = "VP9"; break; -+ case V4L2_PIX_FMT_VP9_FRAME: descr = "VP9 Frame"; break; - case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break; /* aka H.265 */ - case V4L2_PIX_FMT_HEVC_SLICE: descr = "HEVC Parsed Slice Data"; break; - case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */ -diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h -index 575b59fbac77..f62c529b6a70 100644 ---- a/include/media/v4l2-ctrls.h -+++ b/include/media/v4l2-ctrls.h -@@ -18,6 +18,7 @@ - * This will move to the public headers once this API is fully stable. - */ - #include -+#include - - /* forward references */ - struct file; -@@ -50,6 +51,8 @@ struct video_device; - * @p_h264_decode_params: Pointer to a struct v4l2_ctrl_h264_decode_params. - * @p_h264_pred_weights: Pointer to a struct v4l2_ctrl_h264_pred_weights. - * @p_vp8_frame: Pointer to a VP8 frame params structure. -+ * @p_vp9_frame_ctx: Pointer to a VP9 frame context structure. -+ * @p_vp9_frame_decode_params: Pointer to a VP9 frame params structure. - * @p_hevc_sps: Pointer to an HEVC sequence parameter set structure. - * @p_hevc_pps: Pointer to an HEVC picture parameter set structure. - * @p_hevc_slice_params: Pointer to an HEVC slice parameters structure. -@@ -82,6 +85,8 @@ union v4l2_ctrl_ptr { - struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params; - struct v4l2_ctrl_hdr10_cll_info *p_hdr10_cll; - struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; -+ struct v4l2_ctrl_vp9_frame_ctx *p_vp9_frame_ctx; -+ struct v4l2_ctrl_vp9_frame_decode_params *p_vp9_frame_decode_params; - struct v4l2_area *p_area; - void *p; - const void *p_const; -diff --git a/include/media/vp9-ctrls.h b/include/media/vp9-ctrls.h -new file mode 100644 -index 000000000000..f62f528d4b39 ---- /dev/null -+++ b/include/media/vp9-ctrls.h -@@ -0,0 +1,486 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * These are the VP9 state controls for use with stateless VP9 -+ * codec drivers. -+ * -+ * It turns out that these structs are not stable yet and will undergo -+ * more changes. So keep them private until they are stable and ready to -+ * become part of the official public API. -+ */ -+ -+#ifndef _VP9_CTRLS_H_ -+#define _VP9_CTRLS_H_ -+ -+#include -+ -+#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') -+ -+#define V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(i) (V4L2_CID_CODEC_BASE + 4000 + (i)) -+#define V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS (V4L2_CID_CODEC_BASE + 4004) -+#define V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT 0x400 -+#define V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS 0x404 -+ -+/** -+ * enum v4l2_vp9_loop_filter_flags - VP9 loop filter flags -+ * -+ * @V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED: the filter level depends on -+ * the mode and reference frame used -+ * to predict a block -+ * @V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE: the bitstream contains additional -+ * syntax elements that specify which -+ * mode and reference frame deltas -+ * are to be updated -+ * -+ * Those are the flags you should pass to &v4l2_vp9_loop_filter.flags. See -+ * section '7.2.8 Loop filter semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_loop_filter_flags { -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED = 1 << 0, -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE = 1 << 1, -+}; -+ -+/** -+ * struct v4l2_vp9_loop_filter - VP9 loop filter parameters -+ * -+ * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags -+ * @level: indicates the loop filter strength -+ * @sharpness: indicates the sharpness level -+ * @ref_deltas: contains the adjustment needed for the filter level based on -+ * the chosen reference frame -+ * @mode_deltas: contains the adjustment needed for the filter level based on -+ * the chosen mode -+ * @level_lookup: level lookup table -+ * -+ * This structure contains all loop filter related parameters. See sections -+ * '7.2.8 Loop filter semantics' and '8.8.1 Loop filter frame init process' -+ * of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_loop_filter { -+ __u8 flags; -+ __u8 level; -+ __u8 sharpness; -+ __s8 ref_deltas[4]; -+ __s8 mode_deltas[2]; -+ __u8 level_lookup[8][4][2]; -+ __u8 padding; -+}; -+ -+/** -+ * struct v4l2_vp9_quantization - VP9 quantization parameters -+ * -+ * @base_q_idx: indicates the base frame qindex -+ * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx -+ * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx -+ * @delta_q_uv_ac indicates the UV AC quantizer relative to base_q_idx -+ * @padding: padding bytes to align things on 64 bits. Must be set to 0 -+ * -+ * Encodes the quantization parameters. See section '7.2.9 Quantization params -+ * syntax' of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_quantization { -+ __u8 base_q_idx; -+ __s8 delta_q_y_dc; -+ __s8 delta_q_uv_dc; -+ __s8 delta_q_uv_ac; -+ __u8 padding[4]; -+}; -+ -+/** -+ * enum v4l2_vp9_segmentation_flags - VP9 segmentation flags -+ * -+ * @V4L2_VP9_SEGMENTATION_FLAG_ENABLED: indicates that this frame makes use of -+ * the segmentation tool -+ * @V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP: indicates that the segmentation map -+ * should be updated during the -+ * decoding of this frame -+ * @V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE: indicates that the updates to -+ * the segmentation map are coded -+ * relative to the existing -+ * segmentation map -+ * @V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA: indicates that new parameters are -+ * about to be specified for each -+ * segment -+ * @V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE: indicates that the -+ * segmentation parameters -+ * represent the actual values -+ * to be used -+ * -+ * Those are the flags you should pass to &v4l2_vp9_segmentation.flags. See -+ * section '7.2.10 Segmentation params syntax' of the VP9 specification for -+ * more details. -+ */ -+enum v4l2_vp9_segmentation_flags { -+ V4L2_VP9_SEGMENTATION_FLAG_ENABLED = 1 << 0, -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP = 1 << 1, -+ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE = 1 << 2, -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA = 1 << 3, -+ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE = 1 << 4, -+}; -+ -+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) -+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf -+ -+/** -+ * enum v4l2_vp9_segment_feature - VP9 segment feature IDs -+ * -+ * @V4L2_VP9_SEGMENT_FEATURE_QP_DELTA: QP delta segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_LF: loop filter segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_REF_FRAME: reference frame segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_SKIP: skip segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_CNT: number of segment features -+ * -+ * Segment feature IDs. See section '7.2.10 Segmentation params syntax' of the -+ * VP9 specification for more details. -+ */ -+enum v4l2_vp9_segment_feature { -+ V4L2_VP9_SEGMENT_FEATURE_QP_DELTA, -+ V4L2_VP9_SEGMENT_FEATURE_LF, -+ V4L2_VP9_SEGMENT_FEATURE_REF_FRAME, -+ V4L2_VP9_SEGMENT_FEATURE_SKIP, -+ V4L2_VP9_SEGMENT_FEATURE_CNT, -+}; -+ -+/** -+ * struct v4l2_vp9_segmentation - VP9 segmentation parameters -+ * -+ * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_* flags -+ * @tree_probs: specifies the probability values to be used when -+ * decoding a Segment-ID. See '5.15. Segmentation map' -+ * section of the VP9 specification for more details. -+ * @pred_prob: specifies the probability values to be used when decoding a -+ * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' -+ * section of :ref:`vp9` for more details.. -+ * @padding: padding used to make things aligned on 64 bits. Shall be zero -+ * filled -+ * @feature_enabled: bitmask defining which features are enabled in each -+ * segment -+ * @feature_data: data attached to each feature. Data entry is only valid if -+ * the feature is enabled -+ * -+ * Encodes the quantization parameters. See section '7.2.10 Segmentation -+ * params syntax' of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_segmentation { -+ __u8 flags; -+ __u8 tree_probs[7]; -+ __u8 pred_probs[3]; -+ __u8 padding[5]; -+ __u8 feature_enabled[8]; -+ __s16 feature_data[8][4]; -+}; -+ -+/** -+ * enum v4l2_vp9_intra_prediction_mode - VP9 Intra prediction modes -+ * -+ * @V4L2_VP9_INTRA_PRED_DC: DC intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_V: vertical intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_H: horizontal intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D45: D45 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D135: D135 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D117: D117 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D153: D153 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D207: D207 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D63: D63 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_TM: True Motion intra prediction -+ * -+ * See section '7.4.5 Intra frame mode info semantics' for more details. -+ */ -+enum v4l2_vp9_intra_prediction_mode { -+ V4L2_VP9_INTRA_PRED_MODE_DC, -+ V4L2_VP9_INTRA_PRED_MODE_V, -+ V4L2_VP9_INTRA_PRED_MODE_H, -+ V4L2_VP9_INTRA_PRED_MODE_D45, -+ V4L2_VP9_INTRA_PRED_MODE_D135, -+ V4L2_VP9_INTRA_PRED_MODE_D117, -+ V4L2_VP9_INTRA_PRED_MODE_D153, -+ V4L2_VP9_INTRA_PRED_MODE_D207, -+ V4L2_VP9_INTRA_PRED_MODE_D63, -+ V4L2_VP9_INTRA_PRED_MODE_TM, -+}; -+ -+/** -+ * struct v4l2_vp9_mv_probabilities - VP9 Motion vector probabilities -+ * @joint: motion vector joint probabilities -+ * @sign: motion vector sign probabilities -+ * @class: motion vector class probabilities -+ * @class0_bit: motion vector class0 bit probabilities -+ * @bits: motion vector bits probabilities -+ * @class0_fr: motion vector class0 fractional bit probabilities -+ * @fr: motion vector fractional bit probabilities -+ * @class0_hp: motion vector class0 high precision fractional bit probabilities -+ * @hp: motion vector high precision fractional bit probabilities -+ */ -+struct v4l2_vp9_mv_probabilities { -+ __u8 joint[3]; -+ __u8 sign[2]; -+ __u8 class[2][10]; -+ __u8 class0_bit[2]; -+ __u8 bits[2][10]; -+ __u8 class0_fr[2][2][3]; -+ __u8 fr[2][3]; -+ __u8 class0_hp[2]; -+ __u8 hp[2]; -+}; -+ -+/** -+ * struct v4l2_vp9_probabilities - VP9 Probabilities -+ * -+ * @tx8: TX 8x8 probabilities -+ * @tx16: TX 16x16 probabilities -+ * @tx32: TX 32x32 probabilities -+ * @coef: coefficient probabilities -+ * @skip: skip probabilities -+ * @inter_mode: inter mode probabilities -+ * @interp_filter: interpolation filter probabilities -+ * @is_inter: is inter-block probabilities -+ * @comp_mode: compound prediction mode probabilities -+ * @single_ref: single ref probabilities -+ * @comp_ref: compound ref probabilities -+ * @y_mode: Y prediction mode probabilities -+ * @uv_mode: UV prediction mode probabilities -+ * @partition: partition probabilities -+ * @mv: motion vector probabilities -+ * -+ * Structure containing most VP9 probabilities. See the VP9 specification -+ * for more details. -+ */ -+struct v4l2_vp9_probabilities { -+ __u8 tx8[2][1]; -+ __u8 tx16[2][2]; -+ __u8 tx32[2][3]; -+ __u8 coef[4][2][2][6][6][3]; -+ __u8 skip[3]; -+ __u8 inter_mode[7][3]; -+ __u8 interp_filter[4][2]; -+ __u8 is_inter[4]; -+ __u8 comp_mode[5]; -+ __u8 single_ref[5][2]; -+ __u8 comp_ref[5]; -+ __u8 y_mode[4][9]; -+ __u8 uv_mode[10][9]; -+ __u8 partition[16][3]; -+ -+ struct v4l2_vp9_mv_probabilities mv; -+}; -+ -+/** -+ * enum v4l2_vp9_reset_frame_context - Valid values for -+ * &v4l2_ctrl_vp9_frame_decode_params->reset_frame_context -+ * -+ * @V4L2_VP9_RESET_FRAME_CTX_NONE: don't reset any frame context -+ * @V4L2_VP9_RESET_FRAME_CTX_SPEC: reset the frame context pointed by -+ * &v4l2_ctrl_vp9_frame_decode_params.frame_context_idx -+ * @V4L2_VP9_RESET_FRAME_CTX_ALL: reset all frame contexts -+ * -+ * See section '7.2 Uncompressed header semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_reset_frame_context { -+ V4L2_VP9_RESET_FRAME_CTX_NONE, -+ V4L2_VP9_RESET_FRAME_CTX_SPEC, -+ V4L2_VP9_RESET_FRAME_CTX_ALL, -+}; -+ -+/** -+ * enum v4l2_vp9_interpolation_filter - VP9 interpolation filter types -+ * -+ * @V4L2_VP9_INTERP_FILTER_8TAP: height tap filter -+ * @V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH: height tap smooth filter -+ * @V4L2_VP9_INTERP_FILTER_8TAP_SHARP: height tap sharp filter -+ * @V4L2_VP9_INTERP_FILTER_BILINEAR: bilinear filter -+ * @V4L2_VP9_INTERP_FILTER_SWITCHABLE: filter selection is signaled at the -+ * block level -+ * -+ * See section '7.2.7 Interpolation filter semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_interpolation_filter { -+ V4L2_VP9_INTERP_FILTER_8TAP, -+ V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH, -+ V4L2_VP9_INTERP_FILTER_8TAP_SHARP, -+ V4L2_VP9_INTERP_FILTER_BILINEAR, -+ V4L2_VP9_INTERP_FILTER_SWITCHABLE, -+}; -+ -+/** -+ * enum v4l2_vp9_reference_mode - VP9 reference modes -+ * -+ * @V4L2_VP9_REF_MODE_SINGLE: indicates that all the inter blocks use only a -+ * single reference frame to generate motion -+ * compensated prediction -+ * @V4L2_VP9_REF_MODE_COMPOUND: requires all the inter blocks to use compound -+ * mode. Single reference frame prediction is not -+ * allowed -+ * @V4L2_VP9_REF_MODE_SELECT: allows each individual inter block to select -+ * between single and compound prediction modes -+ * -+ * See section '7.3.6 Frame reference mode semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_reference_mode { -+ V4L2_VP9_REF_MODE_SINGLE, -+ V4L2_VP9_REF_MODE_COMPOUND, -+ V4L2_VP9_REF_MODE_SELECT, -+}; -+ -+/** -+ * enum v4l2_vp9_tx_mode - VP9 TX modes -+ * -+ * @V4L2_VP9_TX_MODE_ONLY_4X4: transform size is 4x4 -+ * @V4L2_VP9_TX_MODE_ALLOW_8X8: transform size can be up to 8x8 -+ * @V4L2_VP9_TX_MODE_ALLOW_16X16: transform size can be up to 16x16 -+ * @V4L2_VP9_TX_MODE_ALLOW_32X32: transform size can be up to 32x32 -+ * @V4L2_VP9_TX_MODE_SELECT: bitstream contains transform size for each block -+ * -+ * See section '7.3.1 Tx mode semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_tx_mode { -+ V4L2_VP9_TX_MODE_ONLY_4X4, -+ V4L2_VP9_TX_MODE_ALLOW_8X8, -+ V4L2_VP9_TX_MODE_ALLOW_16X16, -+ V4L2_VP9_TX_MODE_ALLOW_32X32, -+ V4L2_VP9_TX_MODE_SELECT, -+}; -+ -+/** -+ * enum v4l2_vp9_ref_id - VP9 Reference frame IDs -+ * -+ * @V4L2_REF_ID_LAST: last reference frame -+ * @V4L2_REF_ID_GOLDEN: golden reference frame -+ * @V4L2_REF_ID_ALTREF: alternative reference frame -+ * @V4L2_REF_ID_CNT: number of reference frames -+ * -+ * See section '7.4.12 Ref frames semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_ref_id { -+ V4L2_REF_ID_LAST, -+ V4L2_REF_ID_GOLDEN, -+ V4L2_REF_ID_ALTREF, -+ V4L2_REF_ID_CNT, -+}; -+ -+/** -+ * enum v4l2_vp9_frame_flags - VP9 frame flags -+ * @V4L2_VP9_FRAME_FLAG_KEY_FRAME: the frame is a key frame -+ * @V4L2_VP9_FRAME_FLAG_SHOW_FRAME: the frame should be displayed -+ * @V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT: the decoding should be error resilient -+ * @V4L2_VP9_FRAME_FLAG_INTRA_ONLY: the frame does not reference other frames -+ * @V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV: the frame might can high precision -+ * motion vectors -+ * @V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX: frame context should be updated -+ * after decoding -+ * @V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE: parallel decoding is used -+ * @V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING: vertical subsampling is enabled -+ * @V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING: horizontal subsampling is enabled -+ * @V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING: full UV range is used -+ * -+ * Check the VP9 specification for more details. -+ */ -+enum v4l2_vp9_frame_flags { -+ V4L2_VP9_FRAME_FLAG_KEY_FRAME = 1 << 0, -+ V4L2_VP9_FRAME_FLAG_SHOW_FRAME = 1 << 1, -+ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT = 1 << 2, -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY = 1 << 3, -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV = 1 << 4, -+ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX = 1 << 5, -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE = 1 << 6, -+ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING = 1 << 7, -+ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING = 1 << 8, -+ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING = 1 << 9, -+}; -+ -+#define V4L2_VP9_PROFILE_MAX 3 -+ -+/** -+ * struct v4l2_ctrl_vp9_frame_decode_params - VP9 frame decoding control -+ * -+ * @flags: combination of V4L2_VP9_FRAME_FLAG_* flags -+ * @compressed_header_size: compressed header size in bytes -+ * @uncompressed_header_size: uncompressed header size in bytes -+ * @profile: VP9 profile. Can be 0, 1, 2 or 3 -+ * @reset_frame_context: specifies whether the frame context should be reset -+ * to default values. See &v4l2_vp9_reset_frame_context -+ * for more details -+ * @frame_context_idx: frame context that should be used/updated -+ * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all -+ * profiles support 10 and/or 12 bits depths -+ * @interpolation_filter: specifies the filter selection used for performing -+ * inter prediction. See &v4l2_vp9_interpolation_filter -+ * for more details -+ * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile -+ * (where the width is measured in units of 8x8 blocks). -+ * Shall be less than or equal to 6 -+ * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile -+ * (where the height is measured in units of 8x8 blocks) -+ * @tx_mode: specifies the TX mode. See &v4l2_vp9_tx_mode for more details -+ * @reference_mode: specifies the type of inter prediction to be used. See -+ * &v4l2_vp9_reference_mode for more details -+ * @padding: needed to make this struct 64 bit aligned. Shall be filled with -+ * zeros -+ * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed -+ * in pixels -+ * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed -+ * in pixels -+ * @frame_width_minus_1: add 1 to it and you'll get the expected render width -+ * expressed in pixels. This is not used during the -+ * decoding process but might be used by HW scalers to -+ * prepare a frame that's ready for scanout -+ * @frame_height_minus_1: add 1 to it and you'll get the expected render height -+ * expressed in pixels. This is not used during the -+ * decoding process but might be used by HW scalers to -+ * prepare a frame that's ready for scanout -+ * @refs: array of ref frames timestamps. See &v4l2_vp9_ref_id for more details -+ * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details -+ * @quant: quantization parameters. See &v4l2_vp9_quantization for more details -+ * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details -+ * @probs: probabilities. See &v4l2_vp9_probabilities for more details -+ */ -+struct v4l2_ctrl_vp9_frame_decode_params { -+ __u32 flags; -+ __u16 compressed_header_size; -+ __u16 uncompressed_header_size; -+ __u8 profile; -+ __u8 reset_frame_context; -+ __u8 frame_context_idx; -+ __u8 bit_depth; -+ __u8 interpolation_filter; -+ __u8 tile_cols_log2; -+ __u8 tile_rows_log2; -+ __u8 tx_mode; -+ __u8 reference_mode; -+ __u8 padding[7]; -+ __u16 frame_width_minus_1; -+ __u16 frame_height_minus_1; -+ __u16 render_width_minus_1; -+ __u16 render_height_minus_1; -+ __u64 refs[V4L2_REF_ID_CNT]; -+ struct v4l2_vp9_loop_filter lf; -+ struct v4l2_vp9_quantization quant; -+ struct v4l2_vp9_segmentation seg; -+ struct v4l2_vp9_probabilities probs; -+}; -+ -+#define V4L2_VP9_NUM_FRAME_CTX 4 -+ -+/** -+ * struct v4l2_ctrl_vp9_frame_ctx - VP9 frame context control -+ * -+ * @probs: VP9 probabilities -+ * -+ * This control is accessed in both direction. The user should initialize the -+ * 4 contexts with default values just after starting the stream. Then before -+ * decoding a frame it should query the current frame context (the one passed -+ * through &v4l2_ctrl_vp9_frame_decode_params.frame_context_idx) to initialize -+ * &v4l2_ctrl_vp9_frame_decode_params.probs. The probs are then adjusted based -+ * on the bitstream info and passed to the kernel. The codec should update -+ * the frame context after the frame has been decoded, so that next time -+ * userspace query this context it contains the updated probabilities. -+ */ -+struct v4l2_ctrl_vp9_frame_ctx { -+ struct v4l2_vp9_probabilities probs; -+}; -+ -+#endif /* _VP9_CTRLS_H_ */ - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 2 Nov 2020 21:05:51 +0200 -Subject: [PATCH] media: rkvdec: Add the VP9 backend - -The Rockchip VDEC supports VP9 profile 0 up to 4096x2304@30fps. Add -a backend for this new format. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Signed-off-by: Adrian Ratiu ---- - drivers/staging/media/rkvdec/Makefile | 2 +- - drivers/staging/media/rkvdec/rkvdec-vp9.c | 1577 +++++++++++++++++++++ - drivers/staging/media/rkvdec/rkvdec.c | 59 +- - drivers/staging/media/rkvdec/rkvdec.h | 6 + - 4 files changed, 1642 insertions(+), 2 deletions(-) - create mode 100644 drivers/staging/media/rkvdec/rkvdec-vp9.c - -diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile -index c08fed0a39f9..cb86b429cfaa 100644 ---- a/drivers/staging/media/rkvdec/Makefile -+++ b/drivers/staging/media/rkvdec/Makefile -@@ -1,3 +1,3 @@ - obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o - --rockchip-vdec-y += rkvdec.o rkvdec-h264.o -+rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o -diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c -new file mode 100644 -index 000000000000..8b443ed511c9 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c -@@ -0,0 +1,1577 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip Video Decoder VP9 backend -+ * -+ * Copyright (C) 2019 Collabora, Ltd. -+ * Boris Brezillon -+ * -+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd. -+ * Alpha Lin -+ */ -+ -+#include -+#include -+#include -+ -+#include "rkvdec.h" -+#include "rkvdec-regs.h" -+ -+#define RKVDEC_VP9_PROBE_SIZE 4864 -+#define RKVDEC_VP9_COUNT_SIZE 13232 -+#define RKVDEC_VP9_MAX_SEGMAP_SIZE 73728 -+ -+struct rkvdec_vp9_intra_mode_probs { -+ u8 y_mode[105]; -+ u8 uv_mode[23]; -+}; -+ -+struct rkvdec_vp9_intra_only_frame_probs { -+ u8 coef_intra[4][2][128]; -+ struct rkvdec_vp9_intra_mode_probs intra_mode[10]; -+}; -+ -+struct rkvdec_vp9_inter_frame_probs { -+ u8 y_mode[4][9]; -+ u8 comp_mode[5]; -+ u8 comp_ref[5]; -+ u8 single_ref[5][2]; -+ u8 inter_mode[7][3]; -+ u8 interp_filter[4][2]; -+ u8 padding0[11]; -+ u8 coef[2][4][2][128]; -+ u8 uv_mode_0_2[3][9]; -+ u8 padding1[5]; -+ u8 uv_mode_3_5[3][9]; -+ u8 padding2[5]; -+ u8 uv_mode_6_8[3][9]; -+ u8 padding3[5]; -+ u8 uv_mode_9[9]; -+ u8 padding4[7]; -+ u8 padding5[16]; -+ struct { -+ u8 joint[3]; -+ u8 sign[2]; -+ u8 class[2][10]; -+ u8 class0_bit[2]; -+ u8 bits[2][10]; -+ u8 class0_fr[2][2][3]; -+ u8 fr[2][3]; -+ u8 class0_hp[2]; -+ u8 hp[2]; -+ } mv; -+}; -+ -+struct rkvdec_vp9_probs { -+ u8 partition[16][3]; -+ u8 pred[3]; -+ u8 tree[7]; -+ u8 skip[3]; -+ u8 tx32[2][3]; -+ u8 tx16[2][2]; -+ u8 tx8[2][1]; -+ u8 is_inter[4]; -+ /* 128 bit alignment */ -+ u8 padding0[3]; -+ union { -+ struct rkvdec_vp9_inter_frame_probs inter; -+ struct rkvdec_vp9_intra_only_frame_probs intra_only; -+ }; -+}; -+ -+/* Data structure describing auxiliary buffer format. */ -+struct rkvdec_vp9_priv_tbl { -+ struct rkvdec_vp9_probs probs; -+ u8 segmap[2][RKVDEC_VP9_MAX_SEGMAP_SIZE]; -+}; -+ -+struct rkvdec_vp9_refs_counts { -+ u32 eob[2]; -+ u32 coeff[3]; -+}; -+ -+struct rkvdec_vp9_inter_frame_symbol_counts { -+ u32 partition[16][4]; -+ u32 skip[3][2]; -+ u32 inter[4][2]; -+ u32 tx32p[2][4]; -+ u32 tx16p[2][4]; -+ u32 tx8p[2][2]; -+ u32 y_mode[4][10]; -+ u32 uv_mode[10][10]; -+ u32 comp[5][2]; -+ u32 comp_ref[5][2]; -+ u32 single_ref[5][2][2]; -+ u32 mv_mode[7][4]; -+ u32 filter[4][3]; -+ u32 mv_joint[4]; -+ u32 sign[2][2]; -+ /* add 1 element for align */ -+ u32 classes[2][11 + 1]; -+ u32 class0[2][2]; -+ u32 bits[2][10][2]; -+ u32 class0_fp[2][2][4]; -+ u32 fp[2][4]; -+ u32 class0_hp[2][2]; -+ u32 hp[2][2]; -+ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; -+}; -+ -+struct rkvdec_vp9_intra_frame_symbol_counts { -+ u32 partition[4][4][4]; -+ u32 skip[3][2]; -+ u32 intra[4][2]; -+ u32 tx32p[2][4]; -+ u32 tx16p[2][4]; -+ u32 tx8p[2][2]; -+ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; -+}; -+ -+struct rkvdec_vp9_run { -+ struct rkvdec_run base; -+ const struct v4l2_ctrl_vp9_frame_decode_params *decode_params; -+}; -+ -+struct rkvdec_vp9_frame_info { -+ u32 valid : 1; -+ u32 segmapid : 1; -+ u32 frame_context_idx : 2; -+ u32 reference_mode : 2; -+ u32 tx_mode : 3; -+ u32 interpolation_filter : 3; -+ u32 flags; -+ u64 timestamp; -+ struct v4l2_vp9_segmentation seg; -+ struct v4l2_vp9_loop_filter lf; -+}; -+ -+struct rkvdec_vp9_ctx { -+ struct rkvdec_aux_buf priv_tbl; -+ struct rkvdec_aux_buf count_tbl; -+ struct v4l2_ctrl_vp9_frame_ctx frame_context; -+ struct rkvdec_vp9_frame_info cur; -+ struct rkvdec_vp9_frame_info last; -+}; -+ -+static u32 rkvdec_fastdiv(u32 dividend, u16 divisor) -+{ -+#define DIV_INV(d) ((u32)(((1ULL << 32) + ((d) - 1)) / (d))) -+#define DIVS_INV(d0, d1, d2, d3, d4, d5, d6, d7, d8, d9) \ -+ DIV_INV(d0), DIV_INV(d1), DIV_INV(d2), DIV_INV(d3), \ -+ DIV_INV(d4), DIV_INV(d5), DIV_INV(d6), DIV_INV(d7), \ -+ DIV_INV(d8), DIV_INV(d9) -+ -+ static const u32 inv[] = { -+ DIV_INV(2), DIV_INV(3), DIV_INV(4), DIV_INV(5), -+ DIV_INV(6), DIV_INV(7), DIV_INV(8), DIV_INV(9), -+ DIVS_INV(10, 11, 12, 13, 14, 15, 16, 17, 18, 19), -+ DIVS_INV(20, 21, 22, 23, 24, 25, 26, 27, 28, 29), -+ DIVS_INV(30, 31, 32, 33, 34, 35, 36, 37, 38, 39), -+ DIVS_INV(40, 41, 42, 43, 44, 45, 46, 47, 48, 49), -+ DIVS_INV(50, 51, 52, 53, 54, 55, 56, 57, 58, 59), -+ DIVS_INV(60, 61, 62, 63, 64, 65, 66, 67, 68, 69), -+ DIVS_INV(70, 71, 72, 73, 74, 75, 76, 77, 78, 79), -+ DIVS_INV(80, 81, 82, 83, 84, 85, 86, 87, 88, 89), -+ DIVS_INV(90, 91, 92, 93, 94, 95, 96, 97, 98, 99), -+ DIVS_INV(100, 101, 102, 103, 104, 105, 106, 107, 108, 109), -+ DIVS_INV(110, 111, 112, 113, 114, 115, 116, 117, 118, 119), -+ DIVS_INV(120, 121, 122, 123, 124, 125, 126, 127, 128, 129), -+ DIVS_INV(130, 131, 132, 133, 134, 135, 136, 137, 138, 139), -+ DIVS_INV(140, 141, 142, 143, 144, 145, 146, 147, 148, 149), -+ DIVS_INV(150, 151, 152, 153, 154, 155, 156, 157, 158, 159), -+ DIVS_INV(160, 161, 162, 163, 164, 165, 166, 167, 168, 169), -+ DIVS_INV(170, 171, 172, 173, 174, 175, 176, 177, 178, 179), -+ DIVS_INV(180, 181, 182, 183, 184, 185, 186, 187, 188, 189), -+ DIVS_INV(190, 191, 192, 193, 194, 195, 196, 197, 198, 199), -+ DIVS_INV(200, 201, 202, 203, 204, 205, 206, 207, 208, 209), -+ DIVS_INV(210, 211, 212, 213, 214, 215, 216, 217, 218, 219), -+ DIVS_INV(220, 221, 222, 223, 224, 225, 226, 227, 228, 229), -+ DIVS_INV(230, 231, 232, 233, 234, 235, 236, 237, 238, 239), -+ DIVS_INV(240, 241, 242, 243, 244, 245, 246, 247, 248, 249), -+ DIV_INV(250), DIV_INV(251), DIV_INV(252), DIV_INV(253), -+ DIV_INV(254), DIV_INV(255), DIV_INV(256), -+ }; -+ -+ if (divisor == 0) -+ return 0; -+ else if (divisor == 1) -+ return dividend; -+ -+ if (WARN_ON(divisor - 2 >= ARRAY_SIZE(inv))) -+ return dividend; -+ -+ return ((u64)dividend * inv[divisor - 2]) >> 32; -+} -+ -+static const u8 vp9_kf_y_mode_prob[10][10][9] = { -+ { -+ /* above = dc */ -+ { 137, 30, 42, 148, 151, 207, 70, 52, 91 },/*left = dc */ -+ { 92, 45, 102, 136, 116, 180, 74, 90, 100 },/*left = v */ -+ { 73, 32, 19, 187, 222, 215, 46, 34, 100 },/*left = h */ -+ { 91, 30, 32, 116, 121, 186, 93, 86, 94 },/*left = d45 */ -+ { 72, 35, 36, 149, 68, 206, 68, 63, 105 },/*left = d135*/ -+ { 73, 31, 28, 138, 57, 124, 55, 122, 151 },/*left = d117*/ -+ { 67, 23, 21, 140, 126, 197, 40, 37, 171 },/*left = d153*/ -+ { 86, 27, 28, 128, 154, 212, 45, 43, 53 },/*left = d207*/ -+ { 74, 32, 27, 107, 86, 160, 63, 134, 102 },/*left = d63 */ -+ { 59, 67, 44, 140, 161, 202, 78, 67, 119 } /*left = tm */ -+ }, { /* above = v */ -+ { 63, 36, 126, 146, 123, 158, 60, 90, 96 },/*left = dc */ -+ { 43, 46, 168, 134, 107, 128, 69, 142, 92 },/*left = v */ -+ { 44, 29, 68, 159, 201, 177, 50, 57, 77 },/*left = h */ -+ { 58, 38, 76, 114, 97, 172, 78, 133, 92 },/*left = d45 */ -+ { 46, 41, 76, 140, 63, 184, 69, 112, 57 },/*left = d135*/ -+ { 38, 32, 85, 140, 46, 112, 54, 151, 133 },/*left = d117*/ -+ { 39, 27, 61, 131, 110, 175, 44, 75, 136 },/*left = d153*/ -+ { 52, 30, 74, 113, 130, 175, 51, 64, 58 },/*left = d207*/ -+ { 47, 35, 80, 100, 74, 143, 64, 163, 74 },/*left = d63 */ -+ { 36, 61, 116, 114, 128, 162, 80, 125, 82 } /*left = tm */ -+ }, { /* above = h */ -+ { 82, 26, 26, 171, 208, 204, 44, 32, 105 },/*left = dc */ -+ { 55, 44, 68, 166, 179, 192, 57, 57, 108 },/*left = v */ -+ { 42, 26, 11, 199, 241, 228, 23, 15, 85 },/*left = h */ -+ { 68, 42, 19, 131, 160, 199, 55, 52, 83 },/*left = d45 */ -+ { 58, 50, 25, 139, 115, 232, 39, 52, 118 },/*left = d135*/ -+ { 50, 35, 33, 153, 104, 162, 64, 59, 131 },/*left = d117*/ -+ { 44, 24, 16, 150, 177, 202, 33, 19, 156 },/*left = d153*/ -+ { 55, 27, 12, 153, 203, 218, 26, 27, 49 },/*left = d207*/ -+ { 53, 49, 21, 110, 116, 168, 59, 80, 76 },/*left = d63 */ -+ { 38, 72, 19, 168, 203, 212, 50, 50, 107 } /*left = tm */ -+ }, { /* above = d45 */ -+ { 103, 26, 36, 129, 132, 201, 83, 80, 93 },/*left = dc */ -+ { 59, 38, 83, 112, 103, 162, 98, 136, 90 },/*left = v */ -+ { 62, 30, 23, 158, 200, 207, 59, 57, 50 },/*left = h */ -+ { 67, 30, 29, 84, 86, 191, 102, 91, 59 },/*left = d45 */ -+ { 60, 32, 33, 112, 71, 220, 64, 89, 104 },/*left = d135*/ -+ { 53, 26, 34, 130, 56, 149, 84, 120, 103 },/*left = d117*/ -+ { 53, 21, 23, 133, 109, 210, 56, 77, 172 },/*left = d153*/ -+ { 77, 19, 29, 112, 142, 228, 55, 66, 36 },/*left = d207*/ -+ { 61, 29, 29, 93, 97, 165, 83, 175, 162 },/*left = d63 */ -+ { 47, 47, 43, 114, 137, 181, 100, 99, 95 } /*left = tm */ -+ }, { /* above = d135 */ -+ { 69, 23, 29, 128, 83, 199, 46, 44, 101 },/*left = dc */ -+ { 53, 40, 55, 139, 69, 183, 61, 80, 110 },/*left = v */ -+ { 40, 29, 19, 161, 180, 207, 43, 24, 91 },/*left = h */ -+ { 60, 34, 19, 105, 61, 198, 53, 64, 89 },/*left = d45 */ -+ { 52, 31, 22, 158, 40, 209, 58, 62, 89 },/*left = d135*/ -+ { 44, 31, 29, 147, 46, 158, 56, 102, 198 },/*left = d117*/ -+ { 35, 19, 12, 135, 87, 209, 41, 45, 167 },/*left = d153*/ -+ { 55, 25, 21, 118, 95, 215, 38, 39, 66 },/*left = d207*/ -+ { 51, 38, 25, 113, 58, 164, 70, 93, 97 },/*left = d63 */ -+ { 47, 54, 34, 146, 108, 203, 72, 103, 151 } /*left = tm */ -+ }, { /* above = d117 */ -+ { 64, 19, 37, 156, 66, 138, 49, 95, 133 },/*left = dc */ -+ { 46, 27, 80, 150, 55, 124, 55, 121, 135 },/*left = v */ -+ { 36, 23, 27, 165, 149, 166, 54, 64, 118 },/*left = h */ -+ { 53, 21, 36, 131, 63, 163, 60, 109, 81 },/*left = d45 */ -+ { 40, 26, 35, 154, 40, 185, 51, 97, 123 },/*left = d135*/ -+ { 35, 19, 34, 179, 19, 97, 48, 129, 124 },/*left = d117*/ -+ { 36, 20, 26, 136, 62, 164, 33, 77, 154 },/*left = d153*/ -+ { 45, 18, 32, 130, 90, 157, 40, 79, 91 },/*left = d207*/ -+ { 45, 26, 28, 129, 45, 129, 49, 147, 123 },/*left = d63 */ -+ { 38, 44, 51, 136, 74, 162, 57, 97, 121 } /*left = tm */ -+ }, { /* above = d153 */ -+ { 75, 17, 22, 136, 138, 185, 32, 34, 166 },/*left = dc */ -+ { 56, 39, 58, 133, 117, 173, 48, 53, 187 },/*left = v */ -+ { 35, 21, 12, 161, 212, 207, 20, 23, 145 },/*left = h */ -+ { 56, 29, 19, 117, 109, 181, 55, 68, 112 },/*left = d45 */ -+ { 47, 29, 17, 153, 64, 220, 59, 51, 114 },/*left = d135*/ -+ { 46, 16, 24, 136, 76, 147, 41, 64, 172 },/*left = d117*/ -+ { 34, 17, 11, 108, 152, 187, 13, 15, 209 },/*left = d153*/ -+ { 51, 24, 14, 115, 133, 209, 32, 26, 104 },/*left = d207*/ -+ { 55, 30, 18, 122, 79, 179, 44, 88, 116 },/*left = d63 */ -+ { 37, 49, 25, 129, 168, 164, 41, 54, 148 } /*left = tm */ -+ }, { /* above = d207 */ -+ { 82, 22, 32, 127, 143, 213, 39, 41, 70 },/*left = dc */ -+ { 62, 44, 61, 123, 105, 189, 48, 57, 64 },/*left = v */ -+ { 47, 25, 17, 175, 222, 220, 24, 30, 86 },/*left = h */ -+ { 68, 36, 17, 106, 102, 206, 59, 74, 74 },/*left = d45 */ -+ { 57, 39, 23, 151, 68, 216, 55, 63, 58 },/*left = d135*/ -+ { 49, 30, 35, 141, 70, 168, 82, 40, 115 },/*left = d117*/ -+ { 51, 25, 15, 136, 129, 202, 38, 35, 139 },/*left = d153*/ -+ { 68, 26, 16, 111, 141, 215, 29, 28, 28 },/*left = d207*/ -+ { 59, 39, 19, 114, 75, 180, 77, 104, 42 },/*left = d63 */ -+ { 40, 61, 26, 126, 152, 206, 61, 59, 93 } /*left = tm */ -+ }, { /* above = d63 */ -+ { 78, 23, 39, 111, 117, 170, 74, 124, 94 },/*left = dc */ -+ { 48, 34, 86, 101, 92, 146, 78, 179, 134 },/*left = v */ -+ { 47, 22, 24, 138, 187, 178, 68, 69, 59 },/*left = h */ -+ { 56, 25, 33, 105, 112, 187, 95, 177, 129 },/*left = d45 */ -+ { 48, 31, 27, 114, 63, 183, 82, 116, 56 },/*left = d135*/ -+ { 43, 28, 37, 121, 63, 123, 61, 192, 169 },/*left = d117*/ -+ { 42, 17, 24, 109, 97, 177, 56, 76, 122 },/*left = d153*/ -+ { 58, 18, 28, 105, 139, 182, 70, 92, 63 },/*left = d207*/ -+ { 46, 23, 32, 74, 86, 150, 67, 183, 88 },/*left = d63 */ -+ { 36, 38, 48, 92, 122, 165, 88, 137, 91 } /*left = tm */ -+ }, { /* above = tm */ -+ { 65, 70, 60, 155, 159, 199, 61, 60, 81 },/*left = dc */ -+ { 44, 78, 115, 132, 119, 173, 71, 112, 93 },/*left = v */ -+ { 39, 38, 21, 184, 227, 206, 42, 32, 64 },/*left = h */ -+ { 58, 47, 36, 124, 137, 193, 80, 82, 78 },/*left = d45 */ -+ { 49, 50, 35, 144, 95, 205, 63, 78, 59 },/*left = d135*/ -+ { 41, 53, 52, 148, 71, 142, 65, 128, 51 },/*left = d117*/ -+ { 40, 36, 28, 143, 143, 202, 40, 55, 137 },/*left = d153*/ -+ { 52, 34, 29, 129, 183, 227, 42, 35, 43 },/*left = d207*/ -+ { 42, 44, 44, 104, 105, 164, 64, 130, 80 },/*left = d63 */ -+ { 43, 81, 53, 140, 169, 204, 68, 84, 72 } /*left = tm */ -+ } -+}; -+ -+static const u8 kf_partition_probs[16][3] = { -+ /* 8x8 -> 4x4 */ -+ { 158, 97, 94 }, /* a/l both not split */ -+ { 93, 24, 99 }, /* a split, l not split */ -+ { 85, 119, 44 }, /* l split, a not split */ -+ { 62, 59, 67 }, /* a/l both split */ -+ /* 16x16 -> 8x8 */ -+ { 149, 53, 53 }, /* a/l both not split */ -+ { 94, 20, 48 }, /* a split, l not split */ -+ { 83, 53, 24 }, /* l split, a not split */ -+ { 52, 18, 18 }, /* a/l both split */ -+ /* 32x32 -> 16x16 */ -+ { 150, 40, 39 }, /* a/l both not split */ -+ { 78, 12, 26 }, /* a split, l not split */ -+ { 67, 33, 11 }, /* l split, a not split */ -+ { 24, 7, 5 }, /* a/l both split */ -+ /* 64x64 -> 32x32 */ -+ { 174, 35, 49 }, /* a/l both not split */ -+ { 68, 11, 27 }, /* a split, l not split */ -+ { 57, 15, 9 }, /* l split, a not split */ -+ { 12, 3, 3 }, /* a/l both split */ -+}; -+ -+static const u8 kf_uv_mode_prob[10][9] = { -+ { 144, 11, 54, 157, 195, 130, 46, 58, 108 }, /* y = dc */ -+ { 118, 15, 123, 148, 131, 101, 44, 93, 131 }, /* y = v */ -+ { 113, 12, 23, 188, 226, 142, 26, 32, 125 }, /* y = h */ -+ { 120, 11, 50, 123, 163, 135, 64, 77, 103 }, /* y = d45 */ -+ { 113, 9, 36, 155, 111, 157, 32, 44, 161 }, /* y = d135 */ -+ { 116, 9, 55, 176, 76, 96, 37, 61, 149 }, /* y = d117 */ -+ { 115, 9, 28, 141, 161, 167, 21, 25, 193 }, /* y = d153 */ -+ { 120, 12, 32, 145, 195, 142, 32, 38, 86 }, /* y = d207 */ -+ { 116, 12, 64, 120, 140, 125, 49, 115, 121 }, /* y = d63 */ -+ { 102, 19, 66, 162, 182, 122, 35, 59, 128 } /* y = tm */ -+}; -+ -+static void write_coeff_plane(const u8 coef[6][6][3], u8 *coeff_plane) -+{ -+ unsigned int idx = 0; -+ u8 byte_count = 0, p; -+ s32 k, m, n; -+ -+ for (k = 0; k < 6; k++) { -+ for (m = 0; m < 6; m++) { -+ for (n = 0; n < 3; n++) { -+ p = coef[k][m][n]; -+ coeff_plane[idx++] = p; -+ byte_count++; -+ if (byte_count == 27) { -+ idx += 5; -+ byte_count = 0; -+ } -+ } -+ } -+ } -+} -+ -+static void init_intra_only_probs(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; -+ struct rkvdec_vp9_intra_only_frame_probs *rkprobs; -+ const struct v4l2_vp9_probabilities *probs; -+ unsigned int i, j, k, m; -+ -+ rkprobs = &tbl->probs.intra_only; -+ dec_params = run->decode_params; -+ probs = &dec_params->probs; -+ -+ /* -+ * intra only 149 x 128 bits ,aligned to 152 x 128 bits coeff related -+ * prob 64 x 128 bits -+ */ -+ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { -+ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) -+ write_coeff_plane(probs->coef[i][j][0], -+ rkprobs->coef_intra[i][j]); -+ } -+ -+ /* intra mode prob 80 x 128 bits */ -+ for (i = 0; i < ARRAY_SIZE(vp9_kf_y_mode_prob); i++) { -+ u32 byte_count = 0; -+ int idx = 0; -+ -+ /* vp9_kf_y_mode_prob */ -+ for (j = 0; j < ARRAY_SIZE(vp9_kf_y_mode_prob[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(vp9_kf_y_mode_prob[0][0]); -+ k++) { -+ u8 val = vp9_kf_y_mode_prob[i][j][k]; -+ -+ rkprobs->intra_mode[i].y_mode[idx++] = val; -+ byte_count++; -+ if (byte_count == 27) { -+ byte_count = 0; -+ idx += 5; -+ } -+ } -+ } -+ -+ idx = 0; -+ if (i < 4) { -+ for (m = 0; m < (i < 3 ? 23 : 21); m++) { -+ const u8 *ptr = (const u8 *)kf_uv_mode_prob; -+ -+ rkprobs->intra_mode[i].uv_mode[idx++] = ptr[i * 23 + m]; -+ } -+ } -+ } -+} -+ -+static void init_inter_probs(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; -+ struct rkvdec_vp9_inter_frame_probs *rkprobs; -+ const struct v4l2_vp9_probabilities *probs; -+ unsigned int i, j, k; -+ -+ rkprobs = &tbl->probs.inter; -+ dec_params = run->decode_params; -+ probs = &dec_params->probs; -+ -+ /* -+ * inter probs -+ * 151 x 128 bits, aligned to 152 x 128 bits -+ * inter only -+ * intra_y_mode & inter_block info 6 x 128 bits -+ */ -+ -+ memcpy(rkprobs->y_mode, probs->y_mode, sizeof(rkprobs->y_mode)); -+ memcpy(rkprobs->comp_mode, probs->comp_mode, -+ sizeof(rkprobs->comp_mode)); -+ memcpy(rkprobs->comp_ref, probs->comp_ref, -+ sizeof(rkprobs->comp_ref)); -+ memcpy(rkprobs->single_ref, probs->single_ref, -+ sizeof(rkprobs->single_ref)); -+ memcpy(rkprobs->inter_mode, probs->inter_mode, -+ sizeof(rkprobs->inter_mode)); -+ memcpy(rkprobs->interp_filter, probs->interp_filter, -+ sizeof(rkprobs->interp_filter)); -+ -+ /* 128 x 128 bits coeff related */ -+ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { -+ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) -+ write_coeff_plane(probs->coef[i][j][k], -+ rkprobs->coef[k][i][j]); -+ } -+ } -+ -+ /* intra uv mode 6 x 128 */ -+ memcpy(rkprobs->uv_mode_0_2, &probs->uv_mode[0], -+ sizeof(rkprobs->uv_mode_0_2)); -+ memcpy(rkprobs->uv_mode_3_5, &probs->uv_mode[3], -+ sizeof(rkprobs->uv_mode_3_5)); -+ memcpy(rkprobs->uv_mode_6_8, &probs->uv_mode[6], -+ sizeof(rkprobs->uv_mode_6_8)); -+ memcpy(rkprobs->uv_mode_9, &probs->uv_mode[9], -+ sizeof(rkprobs->uv_mode_9)); -+ -+ /* mv related 6 x 128 */ -+ memcpy(rkprobs->mv.joint, probs->mv.joint, -+ sizeof(rkprobs->mv.joint)); -+ memcpy(rkprobs->mv.sign, probs->mv.sign, -+ sizeof(rkprobs->mv.sign)); -+ memcpy(rkprobs->mv.class, probs->mv.class, -+ sizeof(rkprobs->mv.class)); -+ memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, -+ sizeof(rkprobs->mv.class0_bit)); -+ memcpy(rkprobs->mv.bits, probs->mv.bits, -+ sizeof(rkprobs->mv.bits)); -+ memcpy(rkprobs->mv.class0_fr, probs->mv.class0_fr, -+ sizeof(rkprobs->mv.class0_fr)); -+ memcpy(rkprobs->mv.fr, probs->mv.fr, -+ sizeof(rkprobs->mv.fr)); -+ memcpy(rkprobs->mv.class0_hp, probs->mv.class0_hp, -+ sizeof(rkprobs->mv.class0_hp)); -+ memcpy(rkprobs->mv.hp, probs->mv.hp, -+ sizeof(rkprobs->mv.hp)); -+} -+ -+static void init_probs(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; -+ struct rkvdec_vp9_probs *rkprobs = &tbl->probs; -+ const struct v4l2_vp9_segmentation *seg; -+ const struct v4l2_vp9_probabilities *probs; -+ bool intra_only; -+ -+ dec_params = run->decode_params; -+ probs = &dec_params->probs; -+ seg = &dec_params->seg; -+ -+ memset(rkprobs, 0, sizeof(*rkprobs)); -+ -+ intra_only = !!(dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); -+ -+ /* sb info 5 x 128 bit */ -+ memcpy(rkprobs->partition, -+ intra_only ? kf_partition_probs : probs->partition, -+ sizeof(rkprobs->partition)); -+ -+ memcpy(rkprobs->pred, seg->pred_probs, sizeof(rkprobs->pred)); -+ memcpy(rkprobs->tree, seg->tree_probs, sizeof(rkprobs->tree)); -+ memcpy(rkprobs->skip, probs->skip, sizeof(rkprobs->skip)); -+ memcpy(rkprobs->tx32, probs->tx32, sizeof(rkprobs->tx32)); -+ memcpy(rkprobs->tx16, probs->tx16, sizeof(rkprobs->tx16)); -+ memcpy(rkprobs->tx8, probs->tx8, sizeof(rkprobs->tx8)); -+ memcpy(rkprobs->is_inter, probs->is_inter, sizeof(rkprobs->is_inter)); -+ -+ if (intra_only) -+ init_intra_only_probs(ctx, run); -+ else -+ init_inter_probs(ctx, run); -+} -+ -+struct vp9d_ref_config { -+ u32 reg_frm_size; -+ u32 reg_hor_stride; -+ u32 reg_y_stride; -+ u32 reg_yuv_stride; -+ u32 reg_ref_base; -+}; -+ -+static struct vp9d_ref_config ref_config[3] = { -+ { -+ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(0), -+ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(0), -+ .reg_y_stride = RKVDEC_VP9_LAST_FRAME_YSTRIDE, -+ .reg_yuv_stride = RKVDEC_VP9_LAST_FRAME_YUVSTRIDE, -+ .reg_ref_base = RKVDEC_REG_VP9_LAST_FRAME_BASE, -+ }, -+ { -+ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(1), -+ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(1), -+ .reg_y_stride = RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE, -+ .reg_yuv_stride = 0, -+ .reg_ref_base = RKVDEC_REG_VP9_GOLDEN_FRAME_BASE, -+ }, -+ { -+ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(2), -+ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(2), -+ .reg_y_stride = RKVDEC_VP9_ALTREF_FRAME_YSTRIDE, -+ .reg_yuv_stride = 0, -+ .reg_ref_base = RKVDEC_REG_VP9_ALTREF_FRAME_BASE, -+ } -+}; -+ -+static struct rkvdec_decoded_buffer * -+get_ref_buf(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) -+{ -+ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; -+ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; -+ int buf_idx; -+ -+ /* -+ * If a ref is unused or invalid, address of current destination -+ * buffer is returned. -+ */ -+ buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); -+ if (buf_idx < 0) -+ return vb2_to_rkvdec_decoded_buf(&dst->vb2_buf); -+ -+ return vb2_to_rkvdec_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); -+} -+ -+static dma_addr_t get_mv_base_addr(struct rkvdec_decoded_buffer *buf) -+{ -+ u32 aligned_pitch, aligned_height, yuv_len; -+ -+ aligned_height = round_up(buf->vp9.height, 64); -+ aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; -+ yuv_len = (aligned_height * aligned_pitch * 3) / 2; -+ -+ return vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0) + -+ yuv_len; -+} -+ -+static void -+config_ref_registers(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run, -+ struct rkvdec_decoded_buffer **ref_bufs, -+ enum v4l2_vp9_ref_id id) -+{ -+ u32 aligned_pitch, aligned_height, y_len, yuv_len; -+ struct rkvdec_decoded_buffer *buf = ref_bufs[id]; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ aligned_height = round_up(buf->vp9.height, 64); -+ writel_relaxed(RKVDEC_VP9_FRAMEWIDTH(buf->vp9.width) | -+ RKVDEC_VP9_FRAMEHEIGHT(buf->vp9.height), -+ rkvdec->regs + ref_config[id].reg_frm_size); -+ -+ writel_relaxed(vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0), -+ rkvdec->regs + ref_config[id].reg_ref_base); -+ -+ if (&buf->base.vb == run->base.bufs.dst) -+ return; -+ -+ aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; -+ y_len = aligned_height * aligned_pitch; -+ yuv_len = (y_len * 3) / 2; -+ -+ writel_relaxed(RKVDEC_HOR_Y_VIRSTRIDE(aligned_pitch / 16) | -+ RKVDEC_HOR_UV_VIRSTRIDE(aligned_pitch / 16), -+ rkvdec->regs + ref_config[id].reg_hor_stride); -+ writel_relaxed(RKVDEC_VP9_REF_YSTRIDE(y_len / 16), -+ rkvdec->regs + ref_config[id].reg_y_stride); -+ -+ if (!ref_config[id].reg_yuv_stride) -+ return; -+ -+ writel_relaxed(RKVDEC_VP9_REF_YUVSTRIDE(yuv_len / 16), -+ rkvdec->regs + ref_config[id].reg_yuv_stride); -+} -+ -+static bool seg_featured_enabled(const struct v4l2_vp9_segmentation *seg, -+ enum v4l2_vp9_segment_feature feature, -+ unsigned int segid) -+{ -+ u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); -+ -+ return !!(seg->feature_enabled[segid] & mask); -+} -+ -+static void -+config_seg_registers(struct rkvdec_ctx *ctx, -+ unsigned int segid) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ const struct v4l2_vp9_segmentation *seg; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ s16 feature_val; -+ u8 feature_id; -+ u32 val = 0; -+ -+ seg = vp9_ctx->last.valid ? &vp9_ctx->last.seg : &vp9_ctx->cur.seg; -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_QP_DELTA; -+ if (seg_featured_enabled(seg, feature_id, segid)) { -+ feature_val = seg->feature_data[segid][feature_id]; -+ val |= RKVDEC_SEGID_FRAME_QP_DELTA_EN(1) | -+ RKVDEC_SEGID_FRAME_QP_DELTA(feature_val); -+ } -+ -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_LF; -+ if (seg_featured_enabled(seg, feature_id, segid)) { -+ feature_val = seg->feature_data[segid][feature_id]; -+ val |= RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(1) | -+ RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(feature_val); -+ } -+ -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_REF_FRAME; -+ if (seg_featured_enabled(seg, feature_id, segid)) { -+ feature_val = seg->feature_data[segid][feature_id]; -+ val |= RKVDEC_SEGID_REFERINFO_EN(1) | -+ RKVDEC_SEGID_REFERINFO(feature_val); -+ } -+ -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_SKIP; -+ if (seg_featured_enabled(seg, feature_id, segid)) -+ val |= RKVDEC_SEGID_FRAME_SKIP_EN(1); -+ -+ if (!segid && -+ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) -+ val |= RKVDEC_SEGID_ABS_DELTA(1); -+ -+ writel_relaxed(val, rkvdec->regs + RKVDEC_VP9_SEGID_GRP(segid)); -+} -+ -+static void -+update_dec_buf_info(struct rkvdec_decoded_buffer *buf, -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ buf->vp9.width = dec_params->frame_width_minus_1 + 1; -+ buf->vp9.height = dec_params->frame_height_minus_1 + 1; -+ buf->vp9.bit_depth = dec_params->bit_depth; -+} -+ -+static void -+update_ctx_cur_info(struct rkvdec_vp9_ctx *vp9_ctx, -+ struct rkvdec_decoded_buffer *buf, -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ vp9_ctx->cur.valid = true; -+ vp9_ctx->cur.frame_context_idx = dec_params->frame_context_idx; -+ vp9_ctx->cur.reference_mode = dec_params->reference_mode; -+ vp9_ctx->cur.tx_mode = dec_params->tx_mode; -+ vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; -+ vp9_ctx->cur.flags = dec_params->flags; -+ vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; -+ vp9_ctx->cur.seg = dec_params->seg; -+ vp9_ctx->cur.lf = dec_params->lf; -+} -+ -+static void -+update_ctx_last_info(struct rkvdec_vp9_ctx *vp9_ctx) -+{ -+ vp9_ctx->last = vp9_ctx->cur; -+} -+ -+static void config_registers(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ u32 y_len, uv_len, yuv_len, bit_depth, aligned_height, aligned_pitch; -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_decoded_buffer *ref_bufs[V4L2_REF_ID_CNT]; -+ struct rkvdec_decoded_buffer *dst, *last, *mv_ref; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ u32 val, stream_len, last_frame_info = 0; -+ const struct v4l2_vp9_segmentation *seg; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ dma_addr_t addr; -+ bool intra_only; -+ unsigned int i; -+ -+ dec_params = run->decode_params; -+ dst = vb2_to_rkvdec_decoded_buf(&run->base.bufs.dst->vb2_buf); -+ for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) -+ ref_bufs[i] = get_ref_buf(ctx, &dst->base.vb, -+ dec_params->refs[i]); -+ -+ if (vp9_ctx->last.valid) -+ last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); -+ else -+ last = dst; -+ -+ update_dec_buf_info(dst, dec_params); -+ update_ctx_cur_info(vp9_ctx, dst, dec_params); -+ seg = &dec_params->seg; -+ -+ intra_only = !!(dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); -+ -+ writel_relaxed(RKVDEC_MODE(RKVDEC_MODE_VP9), -+ rkvdec->regs + RKVDEC_REG_SYSCTRL); -+ -+ bit_depth = dec_params->bit_depth; -+ aligned_height = round_up(ctx->decoded_fmt.fmt.pix_mp.height, 64); -+ -+ aligned_pitch = round_up(ctx->decoded_fmt.fmt.pix_mp.width * -+ bit_depth, -+ 512) / 8; -+ y_len = aligned_height * aligned_pitch; -+ uv_len = y_len / 2; -+ yuv_len = y_len + uv_len; -+ -+ writel_relaxed(RKVDEC_Y_HOR_VIRSTRIDE(aligned_pitch / 16) | -+ RKVDEC_UV_HOR_VIRSTRIDE(aligned_pitch / 16), -+ rkvdec->regs + RKVDEC_REG_PICPAR); -+ writel_relaxed(RKVDEC_Y_VIRSTRIDE(y_len / 16), -+ rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); -+ writel_relaxed(RKVDEC_YUV_VIRSTRIDE(yuv_len / 16), -+ rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); -+ -+ stream_len = vb2_get_plane_payload(&run->base.bufs.src->vb2_buf, 0); -+ writel_relaxed(RKVDEC_STRM_LEN(stream_len), -+ rkvdec->regs + RKVDEC_REG_STRM_LEN); -+ -+ /* -+ * Reset count buffer, because decoder only output intra related syntax -+ * counts when decoding intra frame, but update entropy need to update -+ * all the probabilities. -+ */ -+ if (intra_only) -+ memset(vp9_ctx->count_tbl.cpu, 0, vp9_ctx->count_tbl.size); -+ -+ vp9_ctx->cur.segmapid = vp9_ctx->last.segmapid; -+ if (!intra_only && -+ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && -+ (!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) || -+ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP))) -+ vp9_ctx->cur.segmapid++; -+ -+ for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) -+ config_ref_registers(ctx, run, ref_bufs, i); -+ -+ for (i = 0; i < 8; i++) -+ config_seg_registers(ctx, i); -+ -+ writel_relaxed(RKVDEC_VP9_TX_MODE(dec_params->tx_mode) | -+ RKVDEC_VP9_FRAME_REF_MODE(dec_params->reference_mode), -+ rkvdec->regs + RKVDEC_VP9_CPRHEADER_CONFIG); -+ -+ if (!intra_only) { -+ const struct v4l2_vp9_loop_filter *lf; -+ s8 delta; -+ -+ if (vp9_ctx->last.valid) -+ lf = &vp9_ctx->last.lf; -+ else -+ lf = &vp9_ctx->cur.lf; -+ -+ val = 0; -+ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { -+ delta = lf->ref_deltas[i]; -+ val |= RKVDEC_REF_DELTAS_LASTFRAME(i, delta); -+ } -+ -+ writel_relaxed(val, -+ rkvdec->regs + RKVDEC_VP9_REF_DELTAS_LASTFRAME); -+ -+ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { -+ delta = lf->mode_deltas[i]; -+ last_frame_info |= RKVDEC_MODE_DELTAS_LASTFRAME(i, -+ delta); -+ } -+ } -+ -+ if (vp9_ctx->last.valid && !intra_only && -+ vp9_ctx->last.seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) -+ last_frame_info |= RKVDEC_SEG_EN_LASTFRAME; -+ -+ if (vp9_ctx->last.valid && -+ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME) -+ last_frame_info |= RKVDEC_LAST_SHOW_FRAME; -+ -+ if (vp9_ctx->last.valid && -+ vp9_ctx->last.flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) -+ last_frame_info |= RKVDEC_LAST_INTRA_ONLY; -+ -+ if (vp9_ctx->last.valid && -+ last->vp9.width == dst->vp9.width && -+ last->vp9.height == dst->vp9.height) -+ last_frame_info |= RKVDEC_LAST_WIDHHEIGHT_EQCUR; -+ -+ writel_relaxed(last_frame_info, -+ rkvdec->regs + RKVDEC_VP9_INFO_LASTFRAME); -+ -+ writel_relaxed(stream_len - dec_params->compressed_header_size - -+ dec_params->uncompressed_header_size, -+ rkvdec->regs + RKVDEC_VP9_LASTTILE_SIZE); -+ -+ for (i = 0; !intra_only && i < ARRAY_SIZE(ref_bufs); i++) { -+ u32 refw = ref_bufs[i]->vp9.width; -+ u32 refh = ref_bufs[i]->vp9.height; -+ u32 hscale, vscale; -+ -+ hscale = (refw << 14) / dst->vp9.width; -+ vscale = (refh << 14) / dst->vp9.height; -+ writel_relaxed(RKVDEC_VP9_REF_HOR_SCALE(hscale) | -+ RKVDEC_VP9_REF_VER_SCALE(vscale), -+ rkvdec->regs + RKVDEC_VP9_REF_SCALE(i)); -+ } -+ -+ addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); -+ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); -+ addr = vb2_dma_contig_plane_dma_addr(&run->base.bufs.src->vb2_buf, 0); -+ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); -+ writel_relaxed(vp9_ctx->priv_tbl.dma + -+ offsetof(struct rkvdec_vp9_priv_tbl, probs), -+ rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); -+ writel_relaxed(vp9_ctx->count_tbl.dma, -+ rkvdec->regs + RKVDEC_REG_VP9COUNT_BASE); -+ -+ writel_relaxed(vp9_ctx->priv_tbl.dma + -+ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + -+ (RKVDEC_VP9_MAX_SEGMAP_SIZE * vp9_ctx->cur.segmapid), -+ rkvdec->regs + RKVDEC_REG_VP9_SEGIDCUR_BASE); -+ writel_relaxed(vp9_ctx->priv_tbl.dma + -+ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + -+ (RKVDEC_VP9_MAX_SEGMAP_SIZE * (!vp9_ctx->cur.segmapid)), -+ rkvdec->regs + RKVDEC_REG_VP9_SEGIDLAST_BASE); -+ -+ if (!intra_only && -+ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && -+ vp9_ctx->last.valid) -+ mv_ref = last; -+ else -+ mv_ref = dst; -+ -+ writel_relaxed(get_mv_base_addr(mv_ref), -+ rkvdec->regs + RKVDEC_VP9_REF_COLMV_BASE); -+ -+ writel_relaxed(ctx->decoded_fmt.fmt.pix_mp.width | -+ (ctx->decoded_fmt.fmt.pix_mp.height << 16), -+ rkvdec->regs + RKVDEC_REG_PERFORMANCE_CYCLE); -+} -+ -+static int -+validate_dec_params(struct rkvdec_ctx *ctx, -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ unsigned int aligned_width, aligned_height; -+ -+ /* We only support profile 0. */ -+ if (dec_params->profile != 0) { -+ dev_err(ctx->dev->dev, "unsupported profile %d\n", -+ dec_params->profile); -+ return -EINVAL; -+ } -+ -+ aligned_width = round_up(dec_params->frame_width_minus_1 + 1, 64); -+ aligned_height = round_up(dec_params->frame_height_minus_1 + 1, 64); -+ -+ /* -+ * Userspace should update the capture/decoded format when the -+ * resolution changes. -+ */ -+ if (aligned_width != ctx->decoded_fmt.fmt.pix_mp.width || -+ aligned_height != ctx->decoded_fmt.fmt.pix_mp.height) { -+ dev_err(ctx->dev->dev, -+ "unexpected bitstream resolution %dx%d\n", -+ dec_params->frame_width_minus_1 + 1, -+ dec_params->frame_height_minus_1 +1); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_vp9_run_preamble(struct rkvdec_ctx *ctx, -+ struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ const struct v4l2_ctrl_vp9_frame_ctx *fctx = NULL; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_ctrl *ctrl; -+ u8 frm_ctx; -+ int ret; -+ -+ rkvdec_run_preamble(ctx, &run->base); -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS); -+ WARN_ON(!ctrl); -+ -+ dec_params = ctrl ? ctrl->p_cur.p : NULL; -+ if (WARN_ON(!dec_params)) -+ return -EINVAL; -+ -+ ret = validate_dec_params(ctx, dec_params); -+ if (ret) -+ return ret; -+ -+ run->decode_params = dec_params; -+ -+ /* No need to load the frame context if we don't need to update it. */ -+ if (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) -+ return 0; -+ -+ /* -+ * When a refresh context is requested in parallel mode, we should just -+ * update the context with the probs passed in the decode parameters. -+ */ -+ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE) { -+ vp9_ctx->frame_context.probs = dec_params->probs; -+ return 0; -+ } -+ -+ frm_ctx = run->decode_params->frame_context_idx; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(frm_ctx)); -+ if (WARN_ON(!ctrl)) -+ return 0; -+ -+ fctx = ctrl->p_cur.p; -+ vp9_ctx->frame_context = *fctx; -+ -+ /* -+ * For intra-only frames, we must update the context TX and skip probs -+ * with the value passed in the decode params. -+ */ -+ if (dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) { -+ struct v4l2_vp9_probabilities *probs; -+ -+ probs = &vp9_ctx->frame_context.probs; -+ memcpy(probs->skip, dec_params->probs.skip, -+ sizeof(probs->skip)); -+ memcpy(probs->tx8, dec_params->probs.tx8, -+ sizeof(probs->tx8)); -+ memcpy(probs->tx16, dec_params->probs.tx16, -+ sizeof(probs->tx16)); -+ memcpy(probs->tx32, dec_params->probs.tx32, -+ sizeof(probs->tx32)); -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_vp9_run run = { }; -+ int ret; -+ -+ ret = rkvdec_vp9_run_preamble(ctx, &run); -+ if (ret) { -+ rkvdec_run_postamble(ctx, &run.base); -+ return ret; -+ } -+ -+ /* Prepare probs. */ -+ init_probs(ctx, &run); -+ -+ /* Configure hardware registers. */ -+ config_registers(ctx, &run); -+ -+ rkvdec_run_postamble(ctx, &run.base); -+ -+ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); -+ -+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); -+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); -+ -+ writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); -+ /* Start decoding! */ -+ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | -+ RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, -+ rkvdec->regs + RKVDEC_REG_INTERRUPT); -+ -+ return 0; -+} -+ -+static u8 adapt_prob(u8 p1, u32 ct0, u32 ct1, u16 max_count, u32 update_factor) -+{ -+ u32 ct = ct0 + ct1, p2; -+ u32 lo = 1; -+ u32 hi = 255; -+ -+ if (!ct) -+ return p1; -+ -+ p2 = ((ct0 << 8) + (ct >> 1)) / ct; -+ p2 = clamp(p2, lo, hi); -+ ct = min_t(u32, ct, max_count); -+ -+ if (WARN_ON(max_count >= 257)) -+ return p1; -+ -+ update_factor = rkvdec_fastdiv(update_factor * ct, max_count); -+ -+ return p1 + (((p2 - p1) * update_factor + 128) >> 8); -+} -+ -+#define BAND_6(band) ((band) == 0 ? 3 : 6) -+ -+static void adapt_coeff(u8 coef[6][6][3], -+ const struct rkvdec_vp9_refs_counts ref_cnt[6][6], -+ u32 uf) -+{ -+ s32 l, m, n; -+ -+ for (l = 0; l < 6; l++) { -+ for (m = 0; m < BAND_6(l); m++) { -+ u8 *p = coef[l][m]; -+ const u32 n0 = ref_cnt[l][m].coeff[0]; -+ const u32 n1 = ref_cnt[l][m].coeff[1]; -+ const u32 n2 = ref_cnt[l][m].coeff[2]; -+ const u32 neob = ref_cnt[l][m].eob[1]; -+ const u32 eob_count = ref_cnt[l][m].eob[0]; -+ const u32 branch_ct[3][2] = { -+ { neob, eob_count - neob }, -+ { n0, n1 + n2 }, -+ { n1, n2 } -+ }; -+ -+ for (n = 0; n < 3; n++) -+ p[n] = adapt_prob(p[n], branch_ct[n][0], -+ branch_ct[n][1], 24, uf); -+ } -+ } -+} -+ -+static void -+adapt_coef_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6], -+ unsigned int uf) -+{ -+ unsigned int i, j, k; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { -+ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); -+ k++) { -+ adapt_coeff(probs->coef[i][j][k], -+ ref_cnt[k][i][j], -+ uf); -+ } -+ } -+ } -+} -+ -+static void adapt_intra_frame_probs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_vp9_probabilities *probs = &vp9_ctx->frame_context.probs; -+ const struct rkvdec_vp9_intra_frame_symbol_counts *sym_cnts; -+ -+ sym_cnts = vp9_ctx->count_tbl.cpu; -+ adapt_coef_probs(probs, sym_cnts->ref_cnt, 112); -+} -+ -+static void -+adapt_skip_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->skip); i++) -+ probs->skip[i] = adapt_prob(probs->skip[i], -+ sym_cnts->skip[i][0], -+ sym_cnts->skip[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_is_inter_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->is_inter); i++) -+ probs->is_inter[i] = adapt_prob(probs->is_inter[i], -+ sym_cnts->inter[i][0], -+ sym_cnts->inter[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_comp_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->comp_mode); i++) -+ probs->comp_mode[i] = adapt_prob(probs->comp_mode[i], -+ sym_cnts->comp[i][0], -+ sym_cnts->comp[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_comp_ref_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->comp_ref); i++) -+ probs->comp_ref[i] = adapt_prob(probs->comp_ref[i], -+ sym_cnts->comp_ref[i][0], -+ sym_cnts->comp_ref[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_single_ref_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->single_ref); i++) { -+ u8 *p = probs->single_ref[i]; -+ -+ p[0] = adapt_prob(p[0], sym_cnts->single_ref[i][0][0], -+ sym_cnts->single_ref[i][0][1], 20, 128); -+ p[1] = adapt_prob(p[1], sym_cnts->single_ref[i][1][0], -+ sym_cnts->single_ref[i][1][1], 20, 128); -+ } -+} -+ -+static void -+adapt_partition_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->partition); i++) { -+ const u32 *c = sym_cnts->partition[i]; -+ u8 *p = probs->partition[i]; -+ -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ } -+} -+ -+static void -+adapt_tx_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { -+ u8 *p16x16 = probs->tx16[i]; -+ u8 *p32x32 = probs->tx32[i]; -+ const u32 *c16 = sym_cnts->tx16p[i]; -+ const u32 *c32 = sym_cnts->tx32p[i]; -+ const u32 *c8 = sym_cnts->tx8p[i]; -+ u8 *p8x8 = probs->tx8[i]; -+ -+ p8x8[0] = adapt_prob(p8x8[0], c8[0], c8[1], 20, 128); -+ p16x16[0] = adapt_prob(p16x16[0], c16[0], c16[1] + c16[2], -+ 20, 128); -+ p16x16[1] = adapt_prob(p16x16[1], c16[1], c16[2], 20, 128); -+ p32x32[0] = adapt_prob(p32x32[0], c32[0], -+ c32[1] + c32[2] + c32[3], 20, 128); -+ p32x32[1] = adapt_prob(p32x32[1], c32[1], c32[2] + c32[3], -+ 20, 128); -+ p32x32[2] = adapt_prob(p32x32[2], c32[2], c32[3], 20, 128); -+ } -+} -+ -+static void -+adapt_interp_filter_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->interp_filter); i++) { -+ u8 *p = probs->interp_filter[i]; -+ const u32 *c = sym_cnts->filter[i]; -+ -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2], 20, 128); -+ } -+} -+ -+static void -+adapt_inter_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->inter_mode); i++) { -+ const u32 *c = sym_cnts->mv_mode[i]; -+ u8 *p = probs->inter_mode[i]; -+ -+ p[0] = adapt_prob(p[0], c[2], c[1] + c[0] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[0], c[1] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[1], c[3], 20, 128); -+ } -+} -+ -+static void -+adapt_mv_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts, -+ bool high_prec_mv) -+{ -+ const u32 *c = sym_cnts->mv_joint; -+ u8 *p = probs->mv.joint; -+ unsigned int i, j; -+ u32 sum; -+ -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ -+ for (i = 0; i < ARRAY_SIZE(probs->mv.sign); i++) { -+ p = probs->mv.sign; -+ -+ p[i] = adapt_prob(p[i], sym_cnts->sign[i][0], -+ sym_cnts->sign[i][1], 20, 128); -+ -+ p = probs->mv.class[i]; -+ c = sym_cnts->classes[i]; -+ sum = c[1] + c[2] + c[3] + c[4] + c[5] + c[6] + c[7] + c[8] + -+ c[9] + c[10]; -+ p[0] = adapt_prob(p[0], c[0], sum, 20, 128); -+ sum -= c[1]; -+ p[1] = adapt_prob(p[1], c[1], sum, 20, 128); -+ sum -= c[2] + c[3]; -+ p[2] = adapt_prob(p[2], c[2] + c[3], sum, 20, 128); -+ p[3] = adapt_prob(p[3], c[2], c[3], 20, 128); -+ sum -= c[4] + c[5]; -+ p[4] = adapt_prob(p[4], c[4] + c[5], sum, 20, 128); -+ p[5] = adapt_prob(p[5], c[4], c[5], 20, 128); -+ sum -= c[6]; -+ p[6] = adapt_prob(p[6], c[6], sum, 20, 128); -+ p[7] = adapt_prob(p[7], c[7] + c[8], c[9] + c[10], 20, 128); -+ p[8] = adapt_prob(p[8], c[7], c[8], 20, 128); -+ p[9] = adapt_prob(p[9], c[9], c[10], 20, 128); -+ -+ p = probs->mv.class0_bit; -+ p[i] = adapt_prob(p[i], -+ sym_cnts->class0[i][0], -+ sym_cnts->class0[i][1], 20, 128); -+ -+ p = probs->mv.bits[i]; -+ for (j = 0; j < 10; j++) -+ p[j] = adapt_prob(p[j], sym_cnts->bits[i][j][0], -+ sym_cnts->bits[i][j][1], 20, 128); -+ -+ for (j = 0; j < 2; j++) { -+ p = probs->mv.class0_fr[i][j]; -+ c = sym_cnts->class0_fp[i][j]; -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], -+ 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ } -+ -+ p = probs->mv.fr[i]; -+ c = sym_cnts->fp[i]; -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ -+ if (!high_prec_mv) -+ continue; -+ -+ p = probs->mv.class0_hp; -+ p[i] = adapt_prob(p[i], sym_cnts->class0_hp[i][0], -+ sym_cnts->class0_hp[i][1], 20, 128); -+ -+ p = probs->mv.hp; -+ p[i] = adapt_prob(p[i], sym_cnts->hp[i][0], -+ sym_cnts->hp[i][1], 20, 128); -+ } -+} -+ -+static void -+adapt_intra_mode_probs(u8 *p, const u32 *c) -+{ -+ u32 sum = 0, s2; -+ unsigned int i; -+ -+ for (i = V4L2_VP9_INTRA_PRED_MODE_V; i <= V4L2_VP9_INTRA_PRED_MODE_TM; -+ i++) -+ sum += c[i]; -+ -+ p[0] = adapt_prob(p[0], c[V4L2_VP9_INTRA_PRED_MODE_DC], sum, 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_TM]; -+ p[1] = adapt_prob(p[1], c[V4L2_VP9_INTRA_PRED_MODE_TM], sum, 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_V]; -+ p[2] = adapt_prob(p[2], c[V4L2_VP9_INTRA_PRED_MODE_V], sum, 20, 128); -+ s2 = c[V4L2_VP9_INTRA_PRED_MODE_H] + c[V4L2_VP9_INTRA_PRED_MODE_D135] + -+ c[V4L2_VP9_INTRA_PRED_MODE_D117]; -+ sum -= s2; -+ p[3] = adapt_prob(p[3], s2, sum, 20, 128); -+ s2 -= c[V4L2_VP9_INTRA_PRED_MODE_H]; -+ p[4] = adapt_prob(p[4], c[V4L2_VP9_INTRA_PRED_MODE_H], s2, 20, 128); -+ p[5] = adapt_prob(p[5], c[V4L2_VP9_INTRA_PRED_MODE_D135], -+ c[V4L2_VP9_INTRA_PRED_MODE_D117], 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_D45]; -+ p[6] = adapt_prob(p[6], c[V4L2_VP9_INTRA_PRED_MODE_D45], -+ sum, 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_D63]; -+ p[7] = adapt_prob(p[7], c[V4L2_VP9_INTRA_PRED_MODE_D63], sum, -+ 20, 128); -+ p[8] = adapt_prob(p[8], c[V4L2_VP9_INTRA_PRED_MODE_D153], -+ c[V4L2_VP9_INTRA_PRED_MODE_D207], 20, 128); -+} -+ -+static void -+adapt_y_intra_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->y_mode); i++) -+ adapt_intra_mode_probs(probs->y_mode[i], sym_cnts->y_mode[i]); -+} -+ -+static void -+adapt_uv_intra_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->uv_mode); i++) -+ adapt_intra_mode_probs(probs->uv_mode[i], -+ sym_cnts->uv_mode[i]); -+} -+ -+static void -+adapt_inter_frame_probs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_vp9_probabilities *probs = &vp9_ctx->frame_context.probs; -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts; -+ -+ sym_cnts = vp9_ctx->count_tbl.cpu; -+ /* coefficients */ -+ if (vp9_ctx->last.valid && -+ !(vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME)) -+ adapt_coef_probs(probs, sym_cnts->ref_cnt, 112); -+ else -+ adapt_coef_probs(probs, sym_cnts->ref_cnt, 128); -+ -+ /* skip flag */ -+ adapt_skip_probs(probs, sym_cnts); -+ -+ /* intra/inter flag */ -+ adapt_is_inter_probs(probs, sym_cnts); -+ -+ /* comppred flag */ -+ adapt_comp_mode_probs(probs, sym_cnts); -+ -+ /* reference frames */ -+ adapt_comp_ref_probs(probs, sym_cnts); -+ -+ if (vp9_ctx->cur.reference_mode != V4L2_VP9_REF_MODE_COMPOUND) -+ adapt_single_ref_probs(probs, sym_cnts); -+ -+ /* block partitioning */ -+ adapt_partition_probs(probs, sym_cnts); -+ -+ /* tx size */ -+ if (vp9_ctx->cur.tx_mode == V4L2_VP9_TX_MODE_SELECT) -+ adapt_tx_probs(probs, sym_cnts); -+ -+ /* interpolation filter */ -+ if (vp9_ctx->cur.interpolation_filter == V4L2_VP9_INTERP_FILTER_SWITCHABLE) -+ adapt_interp_filter_probs(probs, sym_cnts); -+ -+ /* inter modes */ -+ adapt_inter_mode_probs(probs, sym_cnts); -+ -+ /* mv probs */ -+ adapt_mv_probs(probs, sym_cnts, -+ !!(vp9_ctx->cur.flags & -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)); -+ -+ /* y intra modes */ -+ adapt_y_intra_mode_probs(probs, sym_cnts); -+ -+ /* uv intra modes */ -+ adapt_uv_intra_mode_probs(probs, sym_cnts); -+} -+ -+static void adapt_probs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ bool intra_only; -+ -+ intra_only = !!(vp9_ctx->cur.flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); -+ -+ if (intra_only) -+ adapt_intra_frame_probs(ctx); -+ else -+ adapt_inter_frame_probs(ctx); -+} -+ -+static void rkvdec_vp9_done(struct rkvdec_ctx *ctx, -+ struct vb2_v4l2_buffer *src_buf, -+ struct vb2_v4l2_buffer *dst_buf, -+ enum vb2_buffer_state result) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_ctrl *ctrl; -+ unsigned int fctx_idx; -+ -+ if (result == VB2_BUF_STATE_ERROR) -+ goto out_update_last; -+ -+ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) -+ goto out_update_last; -+ -+ fctx_idx = vp9_ctx->cur.frame_context_idx; -+ -+ if (!(vp9_ctx->cur.flags & -+ (V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT | -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE))) -+ adapt_probs(ctx); -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(fctx_idx)); -+ if (WARN_ON(!ctrl)) -+ goto out_update_last; -+ -+ v4l2_ctrl_s_ctrl_compound(ctrl, V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT, -+ &vp9_ctx->frame_context); -+ -+out_update_last: -+ update_ctx_last_info(vp9_ctx); -+} -+ -+static int rkvdec_vp9_start(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_vp9_priv_tbl *priv_tbl; -+ struct rkvdec_vp9_ctx *vp9_ctx; -+ u8 *count_tbl; -+ int ret; -+ -+ vp9_ctx = kzalloc(sizeof(*vp9_ctx), GFP_KERNEL); -+ if (!vp9_ctx) -+ return -ENOMEM; -+ -+ ctx->priv = vp9_ctx; -+ -+ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), -+ &vp9_ctx->priv_tbl.dma, GFP_KERNEL); -+ if (!priv_tbl) { -+ ret = -ENOMEM; -+ goto err_free_ctx; -+ } -+ -+ vp9_ctx->priv_tbl.size = sizeof(*priv_tbl); -+ vp9_ctx->priv_tbl.cpu = priv_tbl; -+ memset(priv_tbl, 0, sizeof(*priv_tbl)); -+ -+ count_tbl = dma_alloc_coherent(rkvdec->dev, RKVDEC_VP9_COUNT_SIZE, -+ &vp9_ctx->count_tbl.dma, GFP_KERNEL); -+ if (!count_tbl) { -+ ret = -ENOMEM; -+ goto err_free_priv_tbl; -+ } -+ -+ vp9_ctx->count_tbl.size = RKVDEC_VP9_COUNT_SIZE; -+ vp9_ctx->count_tbl.cpu = count_tbl; -+ memset(count_tbl, 0, sizeof(*count_tbl)); -+ -+ return 0; -+ -+err_free_priv_tbl: -+ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, -+ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); -+ -+err_free_ctx: -+ kfree(vp9_ctx); -+ return ret; -+} -+ -+static void rkvdec_vp9_stop(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ dma_free_coherent(rkvdec->dev, vp9_ctx->count_tbl.size, -+ vp9_ctx->count_tbl.cpu, vp9_ctx->count_tbl.dma); -+ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, -+ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); -+ kfree(vp9_ctx); -+} -+ -+static int rkvdec_vp9_adjust_fmt(struct rkvdec_ctx *ctx, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; -+ -+ fmt->num_planes = 1; -+ if (!fmt->plane_fmt[0].sizeimage) -+ fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * 2; -+ return 0; -+} -+ -+const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops = { -+ .adjust_fmt = rkvdec_vp9_adjust_fmt, -+ .start = rkvdec_vp9_start, -+ .stop = rkvdec_vp9_stop, -+ .run = rkvdec_vp9_run, -+ .done = rkvdec_vp9_done, -+}; -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index fbaf0303f7c2..2c0c6dcbd066 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.c -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -159,6 +159,39 @@ static const u32 rkvdec_h264_decoded_fmts[] = { - V4L2_PIX_FMT_NV20, - }; - -+static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS, -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0), -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(1), -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(2), -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(3), -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, -+ .cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, -+ .cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0, -+ .cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0, -+ }, -+}; -+ -+static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { -+ .ctrls = rkvdec_vp9_ctrl_descs, -+ .num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs), -+}; -+ -+static const u32 rkvdec_vp9_decoded_fmts[] = { -+ V4L2_PIX_FMT_NV12, -+}; -+ - static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { - { - .fourcc = V4L2_PIX_FMT_H264_SLICE, -@@ -174,6 +207,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { - .ops = &rkvdec_h264_fmt_ops, - .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), - .decoded_fmts = rkvdec_h264_decoded_fmts, -+ }, -+ { -+ .fourcc = V4L2_PIX_FMT_VP9_FRAME, -+ .frmsize = { -+ .min_width = 64, -+ .max_width = 4096, -+ .step_width = 64, -+ .min_height = 64, -+ .max_height = 2304, -+ .step_height = 64, -+ }, -+ .ctrls = &rkvdec_vp9_ctrls, -+ .ops = &rkvdec_vp9_fmt_ops, -+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts), -+ .decoded_fmts = rkvdec_vp9_decoded_fmts, - } - }; - -diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index fa24bcb6ff42..18dd721172d8 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.h -+++ b/drivers/staging/media/rkvdec/rkvdec.h -@@ -57,6 +57,10 @@ struct rkvdec_vp9_decoded_buffer_info { - struct rkvdec_decoded_buffer { - /* Must be the first field in this struct. */ - struct v4l2_m2m_buffer base; -+ -+ union { -+ struct rkvdec_vp9_decoded_buffer_info vp9; -+ }; - }; - - static inline struct rkvdec_decoded_buffer * -@@ -127,4 +131,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); - void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); - - extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; -+extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; -+ - #endif /* RKVDEC_H_ */ diff --git a/projects/Rockchip/patches/linux/default/linux-2001-v4l-wip-rkvdec-hevc.patch b/projects/Rockchip/patches/linux/default/linux-2000-v4l2-wip-rkvdec-hevc.patch similarity index 99% rename from projects/Rockchip/patches/linux/default/linux-2001-v4l-wip-rkvdec-hevc.patch rename to projects/Rockchip/patches/linux/default/linux-2000-v4l2-wip-rkvdec-hevc.patch index dcf2fd5b8b..f752cd4c36 100644 --- a/projects/Rockchip/patches/linux/default/linux-2001-v4l-wip-rkvdec-hevc.patch +++ b/projects/Rockchip/patches/linux/default/linux-2000-v4l2-wip-rkvdec-hevc.patch @@ -2653,7 +2653,7 @@ index 000000000000..c3cceba837c2 + .run = rkvdec_hevc_run, +}; diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h -index 3acc914888f6..4addfaefdfb4 100644 +index 265f5234f4eb..4319ee3ccbbc 100644 --- a/drivers/staging/media/rkvdec/rkvdec-regs.h +++ b/drivers/staging/media/rkvdec/rkvdec-regs.h @@ -48,6 +48,7 @@ @@ -2665,7 +2665,7 @@ index 3acc914888f6..4addfaefdfb4 100644 #define RKVDEC_MODE_VP9 2 #define RKVDEC_RPS_MODE BIT(24) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 2c0c6dcbd066..c269e4a21a29 100644 +index 63385d92880e..7340972faead 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -147,6 +147,58 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { @@ -2727,7 +2727,7 @@ index 2c0c6dcbd066..c269e4a21a29 100644 static const struct rkvdec_ctrls rkvdec_h264_ctrls = { .ctrls = rkvdec_h264_ctrl_descs, .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), -@@ -208,6 +260,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { +@@ -199,6 +251,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), .decoded_fmts = rkvdec_h264_decoded_fmts, }, @@ -2750,7 +2750,7 @@ index 2c0c6dcbd066..c269e4a21a29 100644 .fourcc = V4L2_PIX_FMT_VP9_FRAME, .frmsize = { diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index 18dd721172d8..d60840c179a4 100644 +index f360f2ef799f..53719e825c70 100644 --- a/drivers/staging/media/rkvdec/rkvdec.h +++ b/drivers/staging/media/rkvdec/rkvdec.h @@ -131,6 +131,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); @@ -2874,7 +2874,7 @@ index c3cceba837c2..5c341b5fa534 100644 V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS); run->slices_params = ctrl ? ctrl->p_cur.p : NULL; diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index c269e4a21a29..e91c2b3e9fd9 100644 +index 7340972faead..722d9912b332 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -163,6 +163,9 @@ static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = { @@ -2928,7 +2928,7 @@ index 5c341b5fa534..8ea2ad9f4f3a 100644 .stop = rkvdec_hevc_stop, .run = rkvdec_hevc_run, diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index e91c2b3e9fd9..da32a6350344 100644 +index 722d9912b332..62e728777cd4 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -79,6 +79,26 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl) @@ -3125,7 +3125,7 @@ Signed-off-by: Alex Bee 2 files changed, 84 insertions(+), 30 deletions(-) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index da32a6350344..4fb05e8b5a54 100644 +index 62e728777cd4..a5552ccc9460 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -14,6 +14,7 @@ @@ -3136,7 +3136,7 @@ index da32a6350344..4fb05e8b5a54 100644 #include #include #include -@@ -269,21 +270,6 @@ static const u32 rkvdec_vp9_decoded_fmts[] = { +@@ -260,21 +261,6 @@ static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { }; static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { @@ -3158,7 +3158,7 @@ index da32a6350344..4fb05e8b5a54 100644 { .fourcc = V4L2_PIX_FMT_HEVC_SLICE, .frmsize = { -@@ -298,6 +284,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { +@@ -289,6 +275,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { .ops = &rkvdec_hevc_fmt_ops, .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts), .decoded_fmts = rkvdec_hevc_decoded_fmts, @@ -3182,7 +3182,7 @@ index da32a6350344..4fb05e8b5a54 100644 }, { .fourcc = V4L2_PIX_FMT_VP9_FRAME, -@@ -313,16 +316,31 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { +@@ -304,16 +307,31 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { .ops = &rkvdec_vp9_fmt_ops, .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts), .decoded_fmts = rkvdec_vp9_decoded_fmts, @@ -3217,7 +3217,7 @@ index da32a6350344..4fb05e8b5a54 100644 return &rkvdec_coded_fmts[i]; } -@@ -345,7 +363,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx) +@@ -336,7 +354,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx) { struct v4l2_format *f = &ctx->coded_fmt; @@ -3226,7 +3226,7 @@ index da32a6350344..4fb05e8b5a54 100644 rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc); f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; -@@ -372,11 +390,13 @@ static int rkvdec_enum_framesizes(struct file *file, void *priv, +@@ -363,11 +381,13 @@ static int rkvdec_enum_framesizes(struct file *file, void *priv, struct v4l2_frmsizeenum *fsize) { const struct rkvdec_coded_fmt_desc *fmt; @@ -3241,7 +3241,7 @@ index da32a6350344..4fb05e8b5a54 100644 if (!fmt) return -EINVAL; -@@ -447,10 +467,11 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv, +@@ -438,10 +458,11 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv, struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); const struct rkvdec_coded_fmt_desc *desc; @@ -3256,7 +3256,7 @@ index da32a6350344..4fb05e8b5a54 100644 } v4l2_apply_frmsize_constraints(&pix_mp->width, -@@ -537,7 +558,8 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv, +@@ -519,7 +540,8 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv, if (ret) return ret; @@ -3266,7 +3266,7 @@ index da32a6350344..4fb05e8b5a54 100644 if (!desc) return -EINVAL; ctx->coded_fmt_desc = desc; -@@ -585,7 +607,10 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv, +@@ -567,7 +589,10 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv, static int rkvdec_enum_output_fmt(struct file *file, void *priv, struct v4l2_fmtdesc *f) { @@ -3278,7 +3278,7 @@ index da32a6350344..4fb05e8b5a54 100644 return -EINVAL; f->pixelformat = rkvdec_coded_fmts[f->index].fourcc; -@@ -993,14 +1018,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx) +@@ -975,14 +1000,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx) int ret; for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) @@ -3300,7 +3300,7 @@ index da32a6350344..4fb05e8b5a54 100644 } ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl); -@@ -1204,8 +1232,17 @@ static void rkvdec_watchdog_func(struct work_struct *work) +@@ -1186,8 +1214,17 @@ static void rkvdec_watchdog_func(struct work_struct *work) } } @@ -3319,7 +3319,7 @@ index da32a6350344..4fb05e8b5a54 100644 { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, of_rkvdec_match); -@@ -1218,6 +1255,7 @@ static int rkvdec_probe(struct platform_device *pdev) +@@ -1199,6 +1236,7 @@ static const char * const rkvdec_clk_names[] = { static int rkvdec_probe(struct platform_device *pdev) { struct rkvdec_dev *rkvdec; @@ -3327,7 +3327,7 @@ index da32a6350344..4fb05e8b5a54 100644 unsigned int i; int ret, irq; -@@ -1243,6 +1281,12 @@ static int rkvdec_probe(struct platform_device *pdev) +@@ -1224,6 +1262,12 @@ static int rkvdec_probe(struct platform_device *pdev) if (ret) return ret; @@ -3341,7 +3341,7 @@ index da32a6350344..4fb05e8b5a54 100644 * Don't bump ACLK to max. possible freq. (500 MHz) to improve performance, * since it will lead to non-recoverable decoder lockups in case of decoding diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index d60840c179a4..ac1e7d053f62 100644 +index 53719e825c70..d2096ec351e1 100644 --- a/drivers/staging/media/rkvdec/rkvdec.h +++ b/drivers/staging/media/rkvdec/rkvdec.h @@ -29,6 +29,10 @@ @@ -3397,10 +3397,10 @@ Signed-off-by: Alex Bee 1 file changed, 8 insertions(+) diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 4fb05e8b5a54..8767b1149009 100644 +index a5552ccc9460..5fc6d30fd7c4 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -1238,11 +1238,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { +@@ -1220,11 +1220,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { RKVDEC_CAPABILITY_VP9 }; @@ -3432,10 +3432,10 @@ Signed-off-by: Alex Bee 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 831484253e27..64b36cc8ef94 100644 +index eb9d3bdf1d5e..2c1f0a7e0603 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -1252,6 +1252,25 @@ vpu_mmu: iommu@ff9a0800 { +@@ -1247,6 +1247,25 @@ vpu_mmu: iommu@ff9a0800 { power-domains = <&power RK3288_PD_VIDEO>; }; @@ -3461,7 +3461,7 @@ index 831484253e27..64b36cc8ef94 100644 hevc_mmu: iommu@ff9c0440 { compatible = "rockchip,iommu"; reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; -@@ -1260,7 +1279,7 @@ hevc_mmu: iommu@ff9c0440 { +@@ -1254,7 +1273,7 @@ hevc_mmu: iommu@ff9c0440 { clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; clock-names = "aclk", "iface"; #iommu-cells = <0>; diff --git a/projects/Rockchip/patches/linux/default/linux-2002-v4l-wip-iep-driver.patch b/projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch similarity index 99% rename from projects/Rockchip/patches/linux/default/linux-2002-v4l-wip-iep-driver.patch rename to projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch index c5a382818e..a81d2bbcb7 100644 --- a/projects/Rockchip/patches/linux/default/linux-2002-v4l-wip-iep-driver.patch +++ b/projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch @@ -109,10 +109,10 @@ Signed-off-by: Alex Bee create mode 100644 drivers/media/platform/rockchip/iep/iep.h diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig -index 157c924686e4..d77056060c7f 100644 +index cf4adc64c953..79b850a71449 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig -@@ -527,6 +527,20 @@ config VIDEO_RENESAS_VSP1 +@@ -546,6 +546,20 @@ config VIDEO_RENESAS_VSP1 To compile this driver as a module, choose M here: the module will be called vsp1. @@ -134,7 +134,7 @@ index 157c924686e4..d77056060c7f 100644 tristate "Rockchip Raster 2d Graphic Acceleration Unit" depends on VIDEO_DEV && VIDEO_V4L2 diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile -index 73ce083c2fc6..d1cf1cf99027 100644 +index a148553babfc..08fcccdbbb49 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o @@ -1680,10 +1680,10 @@ Signed-off-by: Alex Bee 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index ca03c8ed9708..ef0d04afc1b1 100644 +index e4c6a33b4b7e..54a3d0022363 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -759,6 +759,28 @@ vop_mmu: iommu@ff373f00 { +@@ -760,6 +760,28 @@ vop_mmu: iommu@ff373f00 { status = "disabled"; }; @@ -1724,10 +1724,10 @@ Signed-off-by: Alex Bee 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 27938ff0d208..9adfc422ae90 100644 +index b39a3390bd7d..f9769857d147 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1286,14 +1286,25 @@ vdec_mmu: iommu@ff660480 { +@@ -1346,14 +1346,25 @@ vdec_mmu: iommu@ff660480 { #iommu-cells = <0>; }; @@ -1766,10 +1766,10 @@ Signed-off-by: Alex Bee 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 64b36cc8ef94..159c22805d03 100644 +index 2c1f0a7e0603..afcc4d9ec746 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -983,6 +983,17 @@ crypto: cypto-controller@ff8a0000 { +@@ -983,14 +983,25 @@ crypto: cypto-controller@ff8a0000 { status = "okay"; }; @@ -1787,8 +1787,7 @@ index 64b36cc8ef94..159c22805d03 100644 iep_mmu: iommu@ff900800 { compatible = "rockchip,iommu"; reg = <0x0 0xff900800 0x0 0x40>; -@@ -990,8 +1001,8 @@ iep_mmu: iommu@ff900800 { - interrupt-names = "iep_mmu"; + interrupts = ; clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; clock-names = "aclk", "iface"; + power-domains = <&power RK3288_PD_VIO>;