diff --git a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch index 462c9d831c..00e426fbab 100644 --- a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch +++ b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch @@ -1439,3 +1439,110 @@ index 05050c0a0921..d42e4ebf6cad 100644 -- 2.25.1 +From 19c227cb73d6cd040341987d25cf1ad23e1454a2 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Tue, 21 Jul 2020 21:53:27 +0200 +Subject: [PATCH] media: cedrus: add check for H264 and HEVC limitations + +Signed-off-by: Jernej Skrabec +--- + drivers/staging/media/sunxi/cedrus/cedrus.c | 49 ++++++++++++++++++++- + drivers/staging/media/sunxi/cedrus/cedrus.h | 1 + + 2 files changed, 49 insertions(+), 1 deletion(-) + +diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c +index e6b864f05364..c3101c0225d6 100644 +--- a/drivers/staging/media/sunxi/cedrus/cedrus.c ++++ b/drivers/staging/media/sunxi/cedrus/cedrus.c +@@ -28,6 +28,50 @@ + #include "cedrus_dec.h" + #include "cedrus_hw.h" + ++static int cedrus_try_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ if (ctrl->id == V4L2_CID_MPEG_VIDEO_H264_SPS) { ++ const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; ++ ++ if (sps->chroma_format_idc != 1) ++ /* Only 4:2:0 is supported */ ++ return -EINVAL; ++ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) ++ /* Luma and chroma bit depth mismatch */ ++ return -EINVAL; ++ if (sps->bit_depth_luma_minus8 != 0) ++ /* Only 8-bit is supported */ ++ return -EINVAL; ++ } else if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_SPS) { ++ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; ++ struct cedrus_ctx *ctx = container_of(ctrl->handler, struct cedrus_ctx, hdl); ++ ++ if (sps->chroma_format_idc != 1) ++ /* Only 4:2:0 is supported */ ++ return -EINVAL; ++ ++ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) ++ /* Luma and chroma bit depth mismatch */ ++ return -EINVAL; ++ ++ if (ctx->dev->capabilities & CEDRUS_CAPABILITY_H265_10_DEC) { ++ if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) ++ /* Only 8-bit and 10-bit are supported */ ++ return -EINVAL; ++ } else { ++ if (sps->bit_depth_luma_minus8 != 0) ++ /* Only 8-bit is supported */ ++ return -EINVAL; ++ } ++ } ++ ++ return 0; ++} ++ ++static const struct v4l2_ctrl_ops cedrus_ctrl_ops = { ++ .try_ctrl = cedrus_try_ctrl, ++}; ++ + static const struct cedrus_control cedrus_controls[] = { + { + .cfg = { +@@ -60,6 +104,7 @@ static const struct cedrus_control cedrus_controls[] = { + { + .cfg = { + .id = V4L2_CID_MPEG_VIDEO_H264_SPS, ++ .ops = &cedrus_ctrl_ops, + }, + .codec = CEDRUS_CODEC_H264, + .required = true, +@@ -99,6 +144,7 @@ static const struct cedrus_control cedrus_controls[] = { + { + .cfg = { + .id = V4L2_CID_MPEG_VIDEO_HEVC_SPS, ++ .ops = &cedrus_ctrl_ops, + }, + .codec = CEDRUS_CODEC_H265, + .required = true, +@@ -525,7 +571,8 @@ static const struct cedrus_variant sun50i_h5_cedrus_variant = { + + static const struct cedrus_variant sun50i_h6_cedrus_variant = { + .capabilities = CEDRUS_CAPABILITY_UNTILED | +- CEDRUS_CAPABILITY_H265_DEC, ++ CEDRUS_CAPABILITY_H265_DEC | ++ CEDRUS_CAPABILITY_H265_10_DEC, + .quirks = CEDRUS_QUIRK_NO_DMA_OFFSET, + .mod_rate = 600000000, + }; +diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h +index 353cb04b4ce5..b8d3a685b549 100644 +--- a/drivers/staging/media/sunxi/cedrus/cedrus.h ++++ b/drivers/staging/media/sunxi/cedrus/cedrus.h +@@ -28,6 +28,7 @@ + + #define CEDRUS_CAPABILITY_UNTILED BIT(0) + #define CEDRUS_CAPABILITY_H265_DEC BIT(1) ++#define CEDRUS_CAPABILITY_H265_10_DEC BIT(2) + + #define CEDRUS_QUIRK_NO_DMA_OFFSET BIT(0) + +-- +2.27.0 +