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Merge pull request #4619 from jernejsk/eth-fixes
Allwinner: Fix ethernet across the boards
This commit is contained in:
Christian Hewitt
GitHub
commit
7c39bdb60b
@ -1,98 +0,0 @@
|
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From eee4bfe0a8423922948b25a415b110985004f25c Mon Sep 17 00:00:00 2001
|
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From: Icenowy Zheng <icenowy@aosc.io>
|
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Date: Mon, 29 Jul 2019 17:29:29 +0800
|
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Subject: [PATCH] arm64: allwinner: a64: dts: apply hack for RTL8211E on
|
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Pine64+
|
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Some of the Pine64+ boards are known to use a batch of broken RTL8211E
|
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PHYs. A magic number that is in an undocumented field of a register is
|
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passed from Realtek via Pine64.
|
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|
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Add the property to apply the hack to the Pine64+ device tree.
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|
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 1 +
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1 file changed, 1 insertion(+)
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|
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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index 24f1aac366d64..4d68f850d03a1 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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@@ -61,5 +61,6 @@
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ext_rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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+ realtek,config-magic-for-pine64;
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};
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};
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From f74d56b5dc80440aef4877996a5b6df041625d2b Mon Sep 17 00:00:00 2001
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From: Icenowy Zheng <icenowy@aosc.io>
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Date: Mon, 29 Jul 2019 17:27:26 +0800
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Subject: [PATCH] net: phy: realtek: add config hack for broken RTL8211E on
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Pine64+ boards
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Some RTL8211E chips have broken GbE function, which needs a hack to
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fix.
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Currently only some Pine64+ boards are known to used this broken batch
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of RTL8211E chips.
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Enable this hack when a certain device tree property is set.
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As this hack is not documented on the datasheet at all, it contains
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magic numbers, and could not be revealed. These magic numbers are
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received from Realtek via Pine64.
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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---
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drivers/net/phy/realtek.c | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
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index a669945eb829a..ace1a6340ca9c 100644
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--- a/drivers/net/phy/realtek.c
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+++ b/drivers/net/phy/realtek.c
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@@ -9,6 +9,7 @@
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*/
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#include <linux/bitops.h>
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+#include <linux/of.h>
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#include <linux/phy.h>
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#include <linux/module.h>
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@@ -32,6 +33,13 @@
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#define RTL8211E_CTRL_DELAY BIT(13)
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#define RTL8211E_TX_DELAY BIT(12)
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#define RTL8211E_RX_DELAY BIT(11)
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+/*
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+ * The following number resides in the same register with
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+ * the delay bits and mode bit above. However, no known
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+ * document can explain this, and this value is directly
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+ * received from Realtek via Pine64.
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+ */
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+#define RTL8211E_CONF_MAGIC_PINE64 0xb400
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#define RTL8201F_ISR 0x1e
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#define RTL8201F_IER 0x13
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@@ -186,6 +194,7 @@ static int rtl8211e_config_init(struct phy_device *phydev)
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{
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int ret = 0, oldpage;
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u16 val;
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+ struct device_node *of_node = phydev->mdio.dev.of_node;
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/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
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switch (phydev->interface) {
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@@ -224,6 +233,12 @@ static int rtl8211e_config_init(struct phy_device *phydev)
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ret = __phy_modify(phydev, 0x1c, RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
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val);
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+ if (of_node &&
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+ of_property_read_bool(of_node, "realtek,config-magic-for-pine64")) {
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+ ret = __phy_modify(phydev, 0x1c, GENMASK(15, 9),
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+ RTL8211E_CONF_MAGIC_PINE64);
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+ }
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+
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err_restore_page:
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return phy_restore_page(phydev, oldpage, ret);
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}
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@ -1769,7 +1769,7 @@ CONFIG_MICROCHIP_T1_PHY=y
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# CONFIG_NXP_TJA11XX_PHY is not set
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# CONFIG_AT803X_PHY is not set
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# CONFIG_QSEMI_PHY is not set
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# CONFIG_REALTEK_PHY is not set
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CONFIG_REALTEK_PHY=y
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# CONFIG_RENESAS_PHY is not set
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# CONFIG_ROCKCHIP_PHY is not set
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CONFIG_SMSC_PHY=y
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392
projects/Allwinner/patches/linux/0008-ethernet-fixes.patch
Normal file
392
projects/Allwinner/patches/linux/0008-ethernet-fixes.patch
Normal file
@ -0,0 +1,392 @@
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From 18125f3cbf9eb37e2639e2cdf2f025c0297b7b3a Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@siol.net>
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Date: Thu, 22 Oct 2020 20:53:26 +0200
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Subject: [PATCH 1/4] arm64: dts: allwinner: a64: OrangePi Win: Fix ethernet
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node
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RX/TX delay on OrangePi Win board is set on PHY. Reflect that in
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ethernet node.
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Fixes: 93d6a27cfcc0 ("arm64: dts: allwinner: a64: Orange Pi Win: Add Ethernet node")
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
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index d894ec5fa8a1..70e31743f0ba 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
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@@ -120,7 +120,7 @@ &ehci1 {
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&emac {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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- phy-mode = "rgmii";
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+ phy-mode = "rgmii-id";
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phy-handle = <&ext_rgmii_phy>;
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phy-supply = <®_gmac_3v3>;
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status = "okay";
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--
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2.29.0
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From e72a8b0e1c6520215ae0374f83d8961d4188e472 Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@siol.net>
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Date: Thu, 22 Oct 2020 22:55:55 +0200
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Subject: [PATCH 2/4] arm64: dts: allwinner: a64: Pine64 Plus: Fix ethernet
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node
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According to board schematic, PHY provides both, RX and TX delays.
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However, according to "fix" Realtek provided for this board, only TX
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delay should be provided by PHY.
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Tests show that both variants work but TX only PHY delay works
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slightly better.
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Update ethernet node to reflect the fact that PHY provides TX delay.
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Fixes: 94f442886711 ("arm64: dts: allwinner: A64: Restore EMAC changes")
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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index b26181cf9095..b54099b654c8 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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@@ -13,7 +13,7 @@ / {
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&emac {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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- phy-mode = "rgmii";
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+ phy-mode = "rgmii-txid";
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phy-handle = <&ext_rgmii_phy>;
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status = "okay";
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};
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--
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2.29.0
|
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|
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|
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From 15df417b521f4a799668b4d49a9072d62ca40b53 Mon Sep 17 00:00:00 2001
|
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From: Jernej Skrabec <jernej.skrabec@siol.net>
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Date: Fri, 23 Oct 2020 20:46:58 +0200
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Subject: [PATCH 3/4] arm64: dts: allwinner: h5: OrangePi PC2: Fix ethernet
|
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node
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RX and TX delay are provided by ethernet PHY. Reflect that in ethernet
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node.
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Fixes: 44a94c7ef989 ("arm64: dts: allwinner: H5: Restore EMAC changes")
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
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index 7d7aad18f078..8bf2db9dcbda 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
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@@ -123,7 +123,7 @@ &emac {
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_gmac_3v3>;
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phy-handle = <&ext_rgmii_phy>;
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- phy-mode = "rgmii";
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+ phy-mode = "rgmii-id";
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status = "okay";
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};
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--
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2.29.0
|
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|
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|
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From 39b809dabfa0b585cc1b18c1365e8b156ea9c3e4 Mon Sep 17 00:00:00 2001
|
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From: Jernej Skrabec <jernej.skrabec@siol.net>
|
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Date: Fri, 23 Oct 2020 21:43:42 +0200
|
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Subject: [PATCH 4/4] arm64: dts: allwinner: h6: Pine H64: Fix ethernet node
|
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|
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Ethernet PHY provides RX and TX delay on both models, A and B. Although
|
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schematic for model A suggests only TX delay, network never worked with
|
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such configuration.
|
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|
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Fix ethernet node to reflect PHY delays.
|
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|
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Fixes: 729e1ffcf47e ("arm64: allwinner: h6: add support for the Ethernet on Pine H64")
|
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
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---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
|
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index af85b2074867..961732c52aa0 100644
|
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
|
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@@ -100,7 +100,7 @@ &ehci3 {
|
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&emac {
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&ext_rgmii_pins>;
|
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- phy-mode = "rgmii";
|
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+ phy-mode = "rgmii-id";
|
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phy-handle = <&ext_rgmii_phy>;
|
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phy-supply = <®_gmac_3v3>;
|
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allwinner,rx-delay-ps = <200>;
|
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--
|
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2.29.0
|
||||
|
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From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= <peron.clem@gmail.com>
|
||||
Subject: [PATCH] arm64: dts: allwinner: beelink-gs1: Enable both RGMII RX/TX
|
||||
delay
|
||||
Date: Sun, 18 Oct 2020 19:24:09 +0200
|
||||
|
||||
Before the commit:
|
||||
net: phy: realtek: fix rtl8211e rx/tx delay config
|
||||
|
||||
The software overwrite for RX/TX delays of the RTL8211e were not
|
||||
working properly and the Beelink GS1 had both RX/TX delay of RGMII
|
||||
interface set using pull-up on the TXDLY and RXDLY pins.
|
||||
|
||||
Now that these delays are working properly they overwrite the HW
|
||||
config and set this to 'rgmii' meaning no delay on both RX/TX.
|
||||
This makes the ethernet of this board not working anymore.
|
||||
|
||||
Set the phy-mode to 'rgmii-id' meaning RGMII with RX/TX delays
|
||||
in the device-tree to keep the correct configuration.
|
||||
|
||||
Fixes: 089bee8dd119 ("arm64: dts: allwinner: h6: Introduce Beelink GS1 board")
|
||||
Signed-off-by: Clément Péron <peron.clem@gmail.com>
|
||||
Acked-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
|
||||
index a364cb4e5b3f..6ab53860e447 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
|
||||
@@ -99,7 +99,7 @@ &ehci0 {
|
||||
&emac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ext_rgmii_pins>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "rgmii-id";
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-supply = <®_aldo2>;
|
||||
status = "okay";
|
||||
|
||||
From: Chen-Yu Tsai <wens@kernel.org>
|
||||
Subject: [PATCH 01/10] Revert "arm: sun8i: orangepi-pc-plus: Set EMAC activity
|
||||
LEDs to active high"
|
||||
Date: Sun, 25 Oct 2020 00:25:06 +0800
|
||||
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
This reverts commit 75ee680cbd2e4d0156b94f9fec50076361ab12f2.
|
||||
|
||||
Turns out the activity and link LEDs on the RJ45 port are active low,
|
||||
just like on the Orange Pi PC.
|
||||
|
||||
Revert the commit that says otherwise.
|
||||
|
||||
Fixes: 75ee680cbd2e ("arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active high")
|
||||
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
If you have this board, please help test it.
|
||||
|
||||
For me, the correct lighting of the LEDs is both LEDs should be lit
|
||||
when connected at 100 Mbps.
|
||||
---
|
||||
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 -----
|
||||
1 file changed, 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
|
||||
index 71fb73208939..babf4cf1b2f6 100644
|
||||
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
|
||||
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
|
||||
@@ -53,11 +53,6 @@ aliases {
|
||||
};
|
||||
};
|
||||
|
||||
-&emac {
|
||||
- /* LEDs changed to active high on the plus */
|
||||
- /delete-property/ allwinner,leds-active-low;
|
||||
-};
|
||||
-
|
||||
&mmc1 {
|
||||
vmmc-supply = <®_vcc3v3>;
|
||||
bus-width = <4>;
|
||||
|
||||
From: Chen-Yu Tsai <wens@kernel.org>
|
||||
Subject: [PATCH 05/10] ARM: dts: sun8i: h3: orangepi-plus2e: Enable RGMII
|
||||
RX/TX delay on Ethernet PHY
|
||||
Date: Sun, 25 Oct 2020 00:25:10 +0800
|
||||
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The Ethernet PHY on the Orange Pi Plus 2E has the RX and TX delays
|
||||
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
|
||||
|
||||
Fix the phy-mode description to correct reflect this so that the
|
||||
implementation doesn't reconfigure the delays incorrectly. This
|
||||
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
|
||||
rx/tx delay config").
|
||||
|
||||
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
|
||||
Fixes: 7a78ef92cdc5 ("ARM: sun8i: h3: Enable EMAC with external PHY on Orange Pi Plus 2E")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
|
||||
index 6dbf7b2e0c13..b6ca45d18e51 100644
|
||||
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
|
||||
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
|
||||
@@ -67,7 +67,7 @@ &emac {
|
||||
pinctrl-0 = <&emac_rgmii_pins>;
|
||||
phy-supply = <®_gmac_3v3>;
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
From: Chen-Yu Tsai <wens@kernel.org>
|
||||
Subject: [PATCH 08/10] ARM: dts: sunxi: bananapi-m2-plus: Enable RGMII RX/TX
|
||||
delay on Ethernet PHY
|
||||
Date: Sun, 25 Oct 2020 00:25:13 +0800
|
||||
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The Ethernet PHY on the Bananapi M2+ has the RX and TX delays
|
||||
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
|
||||
|
||||
Fix the phy-mode description to correct reflect this so that the
|
||||
implementation doesn't reconfigure the delays incorrectly. This
|
||||
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
|
||||
rx/tx delay config").
|
||||
|
||||
Fixes: 8c7ba536e709 ("ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i")
|
||||
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
|
||||
Fixes: aa8fee415f46 ("ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
index 39263e74fbb5..8e5cb3b3fd68 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
@@ -126,7 +126,7 @@ &emac {
|
||||
pinctrl-0 = <&emac_rgmii_pins>;
|
||||
phy-supply = <®_gmac_3v3>;
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "rgmii-id";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
From: Chen-Yu Tsai <wens@kernel.org>
|
||||
Subject: [PATCH 09/10] arm64: dts: allwinner: h5: libretech-all-h5-cc: Enable
|
||||
RGMII RX/TX delay on PHY
|
||||
Date: Sun, 25 Oct 2020 00:25:14 +0800
|
||||
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The Ethernet PHY on the Libre Computer ALL-H5-CC has the RX and TX
|
||||
delays enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
|
||||
|
||||
Fix the phy-mode description to correct reflect this so that the
|
||||
implementation doesn't reconfigure the delays incorrectly. This
|
||||
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
|
||||
rx/tx delay config").
|
||||
|
||||
Fixes: 60d0426d7603 ("arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
|
||||
index df1b9263ad0e..6e30a564c87f 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
|
||||
@@ -36,7 +36,7 @@ &emac {
|
||||
pinctrl-0 = <&emac_rgmii_pins>;
|
||||
phy-supply = <®_gmac_3v3>;
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "rgmii-id";
|
||||
/delete-property/ allwinner,leds-active-low;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
From: Chen-Yu Tsai <wens@kernel.org>
|
||||
Subject: [PATCH 10/10] arm64: dts: allwinner: a64: bananapi-m64: Enable RGMII
|
||||
RX/TX delay on PHY
|
||||
Date: Sun, 25 Oct 2020 00:25:15 +0800
|
||||
|
||||
From: Chen-Yu Tsai <wens@csie.org>
|
||||
|
||||
The Ethernet PHY on the Bananapi M64 has the RX and TX delays
|
||||
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
|
||||
|
||||
Fix the phy-mode description to correct reflect this so that the
|
||||
implementation doesn't reconfigure the delays incorrectly. This
|
||||
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
|
||||
rx/tx delay config").
|
||||
|
||||
Fixes: e7295499903d ("arm64: allwinner: bananapi-m64: Enable dwmac-sun8i")
|
||||
Fixes: 94f442886711 ("arm64: dts: allwinner: A64: Restore EMAC changes")
|
||||
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
||||
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
index 3ea5182ca489..e5e840b9fbb4 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
@@ -105,7 +105,7 @@ &ehci1 {
|
||||
&emac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii_pins>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "rgmii-id";
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
phy-supply = <®_dc1sw>;
|
||||
status = "okay";
|
||||
|
||||
From 992ea5bf6a3583bdb592b2b840a7a5e4205eea19 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sun, 25 Oct 2020 09:16:38 +0100
|
||||
Subject: [PATCH] ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix ethernet node
|
||||
|
||||
Ethernet PHY on BananaPi M2 Ultra provides RX and TX delays. Fix
|
||||
ethernet node to reflect that fact.
|
||||
|
||||
Fixes: c36fd5a48bd2 ("ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller")
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
|
||||
index 2fc62ef0cb3e..a6a1087a0c9b 100644
|
||||
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
|
||||
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
|
||||
@@ -129,7 +129,7 @@ &gmac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac_rgmii_pins>;
|
||||
phy-handle = <&phy1>;
|
||||
- phy-mode = "rgmii";
|
||||
+ phy-mode = "rgmii-id";
|
||||
phy-supply = <®_dc1sw>;
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.29.1
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user