jeans/LibreELEC.tv
jeans/LibreELEC.tv
1
0
Fork 0
mirror of https://github.com/LibreELEC/LibreELEC.tv.git synced 2025-07-24 11:16:51 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #6129 from heitbaum/u-boot

Browse Source 
u-boot and u-boot-tools: update to 2022.01
This commit is contained in:
CvH 2022-01-23 15:46:23 +01:00 committed by GitHub
commit 7d6ae621b6
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
30 changed files with 14 additions and 6695 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
packages/tools/u-boot-tools/package.mk
View File

@ -2,8 +2,8 @@
# Copyright (C) 2019-present Team LibreELEC (https://libreelec.tv)
PKG_NAME="u-boot-tools"
PKG_VERSION="2021.10"
PKG_SHA256="cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4"
PKG_VERSION="2022.01"
PKG_SHA256="81b4543227db228c03f8a1bf5ddbc813b0bb8f6555ce46064ef721a6fc680413"
PKG_LICENSE="GPL"
PKG_SITE="https://www.denx.de/wiki/U-Boot"
PKG_URL="http://ftp.denx.de/pub/u-boot/u-boot-${PKG_VERSION}.tar.bz2"

4
packages/tools/u-boot/package.mk
View File

@ -29,8 +29,8 @@ case "${PROJECT}" in
PKG_PATCH_DIRS="rockchip"
;;
*)
PKG_VERSION="2021.10"
PKG_SHA256="cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4"
PKG_VERSION="2022.01"
PKG_SHA256="81b4543227db228c03f8a1bf5ddbc813b0bb8f6555ce46064ef721a6fc680413"
PKG_URL="http://ftp.denx.de/pub/u-boot/${PKG_NAME}-${PKG_VERSION}.tar.bz2"
;;
esac

4
projects/Allwinner/patches/u-boot/0003-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch
View File

@ -34,9 +34,9 @@ index ebb19272708d..cb321b6afac3 100644
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_LOAD_FIT
imply SPL_MMC_SUPPORT if MMC
imply SPL_MMC if MMC
imply SPL_POWER
imply SPL_SERIAL_SUPPORT
imply SPL_SERIAL
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 4a6ed3a7dd5c..ad1f97632979 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi

36
projects/Allwinner/patches/u-boot/0004-sunxi-A23-A33-H3-Actually-move-the-secure-monitor.patch
View File

@ -1,36 +0,0 @@
From 0b5a16d893ed0ce5ac1126663c3eb9b1254e008c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sat, 9 Oct 2021 11:33:46 -0500
Subject: [PATCH 04/13] sunxi: A23/A33/H3: Actually move the secure monitor
commit 1ebfc0c631e3 ("sunxi: A23/A33/H3: Move sun8i secure monitor to
SRAM A2") attempted to move the secure monitor to SRAM A2. But not all
sun8i SoCs have SRAM A2, so a check was put in for SUNXI_SRAM_A2_SIZE to
avoid breaking those SoCs.
However, because the header providing SUNXI_SRAM_A2_SIZE was not
included, this unintentionally skipped the new definitions on all SoCs.
Fix this by including the right header.
Fixes: 1ebfc0c631e3 ("sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2")
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
include/configs/sun8i.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index 27c9808a494a..563635636624 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -12,6 +12,8 @@
* A23 specific configuration
*/
+#include <asm/arch/cpu.h>
+
#ifdef SUNXI_SRAM_A2_SIZE
/*
* If the SoC has enough SRAM A2, use that for the secure monitor.
--
2.33.0

4
projects/Allwinner/patches/u-boot/0011-arm-psci-Add-definitions-for-PSCI-v1.1.patch
View File

@ -84,7 +84,7 @@ diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index f75eea16b36c..02effcc6cc38 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -556,17 +556,20 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
@@ -556,17 +556,21 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
#ifdef CONFIG_ARMV7_PSCI
void psci_arch_cpu_entry(void);
void psci_arch_init(void);
@ -102,7 +102,6 @@ index f75eea16b36c..02effcc6cc38 100644
u32 psci_migrate_info_type(void);
void psci_system_off(void);
void psci_system_reset(void);
-s32 psci_features(u32 function_id, u32 psci_fid);
+s32 psci_features(u32 function_id, u32 psci_fid);
+s32 psci_cpu_default_suspend(u32 function_id, u32 pc, u32 context_id);
+s32 psci_node_hw_state(u32 function_id, u32 target_cpu, u32 power_level);
@ -111,6 +110,7 @@ index f75eea16b36c..02effcc6cc38 100644
#endif
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c
index 903b3357048a..ea9d1c8355c2 100644
--- a/arch/arm/lib/psci-dt.c

31
projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-ARM-meson-Add-S905Y2-SOC-ID.patch
View File

@ -1,31 +0,0 @@
From ad67f25d0d0fad4f0432336ade9374762a1ff279 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 20 Aug 2021 01:11:52 +0000
Subject: [PATCH 04/31] FROMGIT: ARM: meson: Add S905Y2 SOC ID
Add the SOC ID for the S905Y2 to board info, see below for before/after
tested with a Radxa Zero board:
SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2)
SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2)
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm/mach-meson/board-info.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index d16d3f194d..2421acd817 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -64,6 +64,7 @@ static const struct meson_gx_package_id {
{ "A113X", 0x25, 0x37, 0xff },
{ "A113D", 0x25, 0x22, 0xff },
{ "S905D2", 0x28, 0x10, 0xf0 },
+ { "S905Y2", 0x28, 0x30, 0xf0 },
{ "S905X2", 0x28, 0x40, 0xf0 },
{ "A311D", 0x29, 0x10, 0xf0 },
{ "S922X", 0x29, 0x40, 0xf0 },
--
2.17.1

43
projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-pci-pcie_dw_meson-fix-usb-fail-when-pci-link.patch
View File

@ -1,43 +0,0 @@
From 24bc1b456ce4879b58b8cbdf45e4d36d8feb69c4 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Wed, 8 Sep 2021 14:32:12 +0200
Subject: [PATCH 05/31] FROMGIT: pci: pcie_dw_meson: fix usb fail when pci link
fails to go up
On Amlogic A311D, when the PCIe link fails disabling the related clocks
makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC.
Mimic the Linux behavior by not considering a link failure a probe failure,
and continue even if the PCIe link is down.
Reported-by: Art Nikpal <email2tema@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
drivers/pci/pcie_dw_meson.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
index 0525ecbea6..07da9fa533 100644
--- a/drivers/pci/pcie_dw_meson.c
+++ b/drivers/pci/pcie_dw_meson.c
@@ -319,15 +319,9 @@ static int meson_pcie_init_port(struct udevice *dev)
pcie_dw_setup_host(&priv->dw);
- ret = meson_pcie_link_up(priv, LINK_SPEED_GEN_2);
- if (ret < 0)
- goto err_link_up;
+ meson_pcie_link_up(priv, LINK_SPEED_GEN_2);
return 0;
-err_link_up:
- clk_disable(&priv->clk_port);
- clk_disable(&priv->clk_general);
- clk_disable(&priv->clk_pclk);
err_deassert_bulk:
reset_assert_bulk(&priv->rsts);
err_power_off_phy:
--
2.17.1

3474
projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-ARM-meson-Sync-Amlogic-DT-from-Linux-5.14.patch
View File

File diff suppressed because it is too large Load Diff

31
projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-usb-dwc3-meson-gxl-add-AXG-compatible.patch
View File

@ -1,31 +0,0 @@
From 0115cea6009aebd6c59ad7306da59292f50dc081 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:01 +0200
Subject: [PATCH 07/31] FROMGIT: usb: dwc3: meson-gxl: add AXG compatible
Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs.
This adds it to the compatible list for this driver.
Reported-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Vyacheslav Bocharov <adeep@lexina.in>
---
drivers/usb/dwc3/dwc3-meson-gxl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c
index 08467d6210..b8f3886173 100644
--- a/drivers/usb/dwc3/dwc3-meson-gxl.c
+++ b/drivers/usb/dwc3/dwc3-meson-gxl.c
@@ -409,6 +409,7 @@ static int dwc3_meson_gxl_remove(struct udevice *dev)
}
static const struct udevice_id dwc3_meson_gxl_ids[] = {
+ { .compatible = "amlogic,meson-axg-usb-ctrl" },
{ .compatible = "amlogic,meson-gxl-usb-ctrl" },
{ .compatible = "amlogic,meson-gxm-usb-ctrl" },
{ }
--
2.17.1

55
projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-ARM-meson-keep-HW-order-for-MMC-devices.patch
View File

@ -1,55 +0,0 @@
From c1683775d6022d456e2c0930b872abd77650f5c3 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:02 +0200
Subject: [PATCH 08/31] FROMGIT: ARM: meson: keep HW order for MMC devices
Since Linux commmit [1], the order is fixed with aliases, in order to keep the
MMC device order, set it back to HW order in U-Boot dtsi files.
[1] ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/meson-g12-common-u-boot.dtsi | 7 +++++++
arch/arm/dts/meson-gx-u-boot.dtsi | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi b/arch/arm/dts/meson-g12-common-u-boot.dtsi
index 38fd3d3feb..b1f60b15c9 100644
--- a/arch/arm/dts/meson-g12-common-u-boot.dtsi
+++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi
@@ -5,6 +5,13 @@
*/
/ {
+ /* Keep HW order from U-boot */
+ aliases {
+ /delete-property/ mmc0;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi
index 17d2cb95c1..fb6952f1d8 100644
--- a/arch/arm/dts/meson-gx-u-boot.dtsi
+++ b/arch/arm/dts/meson-gx-u-boot.dtsi
@@ -5,6 +5,13 @@
*/
/ {
+ /* Keep HW order from U-boot */
+ aliases {
+ /delete-property/ mmc0;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
--
2.17.1

111
projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-ARM-meson-axg-remove-local-USB-nodes.patch
View File

@ -1,111 +0,0 @@
From a7c1806fb36b8e3fea461bb4cbb8607216dad001 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:03 +0200
Subject: [PATCH 09/31] FROMGIT: ARM: meson-axg: remove local USB nodes
Drop the local USB nodes after Linux 5.14 sync.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/meson-axg-s400-u-boot.dtsi | 8 ----
arch/arm/dts/meson-axg-u-boot.dtsi | 62 -------------------------
2 files changed, 70 deletions(-)
delete mode 100644 arch/arm/dts/meson-axg-u-boot.dtsi
diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
index 2c4b06f140..334650d610 100644
--- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi
+++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
@@ -3,8 +3,6 @@
* Copyright (c) 2017 Amlogic, Inc. All rights reserved.
*/
-#include "meson-axg-u-boot.dtsi"
-
/* wifi module */
&sd_emmc_b {
status = "disabled";
@@ -15,12 +13,6 @@
status = "okay";
};
-&usb {
- status = "okay";
- dr_mode = "otg";
- vbus-supply = <&usb_pwr>;
-};
-
&usb2_phy1 {
phy-supply = <&vcc_5v>;
};
diff --git a/arch/arm/dts/meson-axg-u-boot.dtsi b/arch/arm/dts/meson-axg-u-boot.dtsi
deleted file mode 100644
index cb1c71e78c..0000000000
--- a/arch/arm/dts/meson-axg-u-boot.dtsi
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/ {
- soc {
- usb: usb@ffe09080 {
- compatible = "amlogic,meson-gxl-usb-ctrl";
- reg = <0x0 0xffe09080 0x0 0x20>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "usb_ctrl", "ddr";
- resets = <&reset RESET_USB_OTG>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy1";
-
- dwc2: usb@ff400000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xff400000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@ff500000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xff500000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk;
- };
- };
- };
-};
-
-&apb {
- usb2_phy1: phy@9020 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x9020 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-};
--
2.17.1

42
projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-configs-meson64-add-SCSI-boot-target.patch
View File

@ -1,42 +0,0 @@
From 6d99a04473373ce9449f38d02722e4baf4d451a9 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Wed, 8 Sep 2021 16:17:23 +0200
Subject: [PATCH 10/31] FROMGIT: configs: meson64: add SCSI boot target
Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using
an on-board AHCI PCIe controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
include/configs/meson64.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index f909dbe079..c77b6917ab 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -66,6 +66,12 @@
#define BOOT_TARGET_NVME(func)
#endif
+#ifdef CONFIG_CMD_SCSI
+ #define BOOT_TARGET_SCSI(func) func(SCSI, scsi, 0)
+#else
+ #define BOOT_TARGET_SCSI(func)
+#endif
+
#ifndef BOOT_TARGET_DEVICES
#define BOOT_TARGET_DEVICES(func) \
func(ROMUSB, romusb, na) \
@@ -74,6 +80,7 @@
func(MMC, mmc, 2) \
BOOT_TARGET_DEVICES_USB(func) \
BOOT_TARGET_NVME(func) \
+ BOOT_TARGET_SCSI(func) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
#endif
--
2.17.1

29
projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-distro_bootcmd-run-pci-enum-for-scsi_boot-ju.patch
View File

@ -1,29 +0,0 @@
From a332eaf364ae643ca71974887093cc027bc4e21a Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:05 +0200
Subject: [PATCH 11/31] FROMGIT: distro_bootcmd: run pci enum for scsi_boot
just like it is done for nvme_boot
The SCSI device can be a PCIe adapter, so run pcie enum if enabled.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
include/config_distro_bootcmd.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 750e9e04e8..3f724aa10f 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -226,6 +226,7 @@
"fi\0" \
\
"scsi_boot=" \
+ BOOTENV_RUN_PCI_ENUM \
BOOTENV_RUN_SCSI_INIT \
BOOTENV_SHARED_BLKDEV_BODY(scsi)
#define BOOTENV_DEV_SCSI BOOTENV_DEV_BLKDEV
--
2.17.1

159
projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-ARM-amlogic-add-support-for-Odroid-HC4-devic.patch
View File

@ -1,159 +0,0 @@
From 1145e026ac9c4b0173c0bb44f381c9c0d23044f9 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:06 +0200
Subject: [PATCH 12/31] FROMGIT: ARM: amlogic: add support for Odroid-HC4
device
The Odroid-HC4 is a variant of the Odroid-C4 board but with a PCIe-SATA bridge
instead of the USB3 ports.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi | 23 +++++
board/amlogic/odroid-n2/MAINTAINERS | 1 +
configs/odroid-hc4_defconfig | 92 +++++++++++++++++++
3 files changed, 116 insertions(+)
create mode 100644 arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi
create mode 100644 configs/odroid-hc4_defconfig
diff --git a/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi
new file mode 100644
index 0000000000..963bf96b25
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-sm1-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
+
+/* SARADC is needed for proper board variant detection */
+&saradc {
+ status = "okay";
+ vref-supply = <&vddao_1v8>;
+};
+
+&tflash_vdd {
+ gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
+};
diff --git a/board/amlogic/odroid-n2/MAINTAINERS b/board/amlogic/odroid-n2/MAINTAINERS
index 77f7746346..43724e6fdd 100644
--- a/board/amlogic/odroid-n2/MAINTAINERS
+++ b/board/amlogic/odroid-n2/MAINTAINERS
@@ -5,5 +5,6 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/odroid-n2/
F: configs/odroid-n2_defconfig
F: configs/odroid-c4_defconfig
+F: configs/odroid-hc4_defconfig
F: doc/board/amlogic/odroid-n2.rst
F: doc/board/amlogic/odroid-c4.rst
diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig
new file mode 100644
index 0000000000..7671496218
--- /dev/null
+++ b/configs/odroid-hc4_defconfig
@@ -0,0 +1,92 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="odroid-n2"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4"
+CONFIG_MESON_G12A=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" odroid-hc4"
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_ADC=y
+CONFIG_SARADC_MESON=y
+CONFIG_SATA=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_MDIO_MUX_MESON_G12A=y
+CONFIG_PCI=y
+CONFIG_PCIE_DW_MESON=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MESON_SPIFC=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_VIDEO_BMP_RLE8=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.17.1

43
projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-doc-boards-amlogic-update-for-Odroid-HC4.patch
View File

@ -1,43 +0,0 @@
From 5d5fafb005313cfef25e2de69fd6521487047c20 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:07 +0200
Subject: [PATCH 13/31] FROMGIT: doc: boards: amlogic: update for Odroid HC4
Add documentation bits for the Odroid-HC4.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
doc/board/amlogic/index.rst | 2 +-
doc/board/amlogic/odroid-c4.rst | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index 8da7afddb4..af12f94fde 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -18,7 +18,7 @@ This matrix concerns the actual source code version.
| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
-| | P201 | LibreTech-AC v2 | | | | | |
+| | P201 | LibreTech-AC v2 | | | | | Odroid-HC4 |
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
diff --git a/doc/board/amlogic/odroid-c4.rst b/doc/board/amlogic/odroid-c4.rst
index 5a5a8688b8..f66d60a54d 100644
--- a/doc/board/amlogic/odroid-c4.rst
+++ b/doc/board/amlogic/odroid-c4.rst
@@ -17,6 +17,9 @@ Co. Ltd with the following specifications:
- UART serial
- Infrared receiver
+The ODROID-HC4 is a variant with a PCIe-SATA controller, the same commands
+applies for HC4.
+
Schematics are available on the manufacturer website.
U-Boot compilation
--
2.17.1

134
projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-ARM-meson-add-Beelink-GS-King-X-board.patch
View File

@ -1,134 +0,0 @@
From 160de51c71b384a5514394f261e3d0255ebf8454 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:08 +0200
Subject: [PATCH 14/31] FROMGIT: ARM: meson: add Beelink GS-King X board
The Beelink GS-King X is a variant of the GS King boards but with an internal
USB to SATA bridge and advanced audio features.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi | 7 ++
board/amlogic/beelink-s922x/MAINTAINERS | 1 +
configs/beelink-gsking-x_defconfig | 70 ++++++++++++++++++++
doc/board/amlogic/index.rst | 2 +-
4 files changed, 79 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi
create mode 100644 configs/beelink-gsking-x_defconfig
diff --git a/arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi b/arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi
new file mode 100644
index 0000000000..236f2468dc
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
diff --git a/board/amlogic/beelink-s922x/MAINTAINERS b/board/amlogic/beelink-s922x/MAINTAINERS
index 7f223df4ae..47b622765a 100644
--- a/board/amlogic/beelink-s922x/MAINTAINERS
+++ b/board/amlogic/beelink-s922x/MAINTAINERS
@@ -5,5 +5,6 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/beelink-s922x/
F: configs/beelink-gtking_defconfig
F: configs/beelink-gtkingpro_defconfig
+F: configs/beelink-gsking-x_defconfig
F: doc/board/amlogic/beelink-gtking.rst
F: doc/board/amlogic/beelink-gtkingpro.rst
diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig
new file mode 100644
index 0000000000..8a76e8829a
--- /dev/null
+++ b/configs/beelink-gsking-x_defconfig
@@ -0,0 +1,70 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="beelink-s922x"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gsking-x"
+CONFIG_MESON_G12A=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" beelink"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_MDIO_MUX_MESON_G12A=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index af12f94fde..de1a9ce284 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -18,7 +18,7 @@ This matrix concerns the actual source code version.
| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
-| | P201 | LibreTech-AC v2 | | | | | Odroid-HC4 |
+| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
--
2.17.1

154
projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-ARM-amlogic-add-Banana-Pi-M5.patch
View File

@ -1,154 +0,0 @@
From a29813bd3bfbe4d263b6fd9010d713383bc0fcf3 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Fri, 17 Sep 2021 09:37:09 +0200
Subject: [PATCH 15/31] FROMGIT: ARM: amlogic: add Banana Pi M5
Banana Pi BPI-M5 is a credit card format SBC with the following features:
- Amlogic S905X3 quad core Cortex-A55
- Mali-G31 GPU
- 4GB LPDDR4
- 16GB eMMC flash
- 4 USB 3.0
- 1 GbE ethernet
- HDMI output
- 2x LEDS
- SDCard
- 2.5mm Jack with Stereo Audio + CVBS
- Infrared Received
- ADC Button
- GPIO Button
- 40 pins header + 3pins debug header
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi | 13 ++++
board/amlogic/u200/MAINTAINERS | 1 +
configs/bananapi-m5_defconfig | 73 +++++++++++++++++++
doc/board/amlogic/index.rst | 1 +
4 files changed, 88 insertions(+)
create mode 100644 arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi
create mode 100644 configs/bananapi-m5_defconfig
diff --git a/arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi b/arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi
new file mode 100644
index 0000000000..a86fdb5668
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-sm1-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS
index 8c23f9a7d3..655cf64a3d 100644
--- a/board/amlogic/u200/MAINTAINERS
+++ b/board/amlogic/u200/MAINTAINERS
@@ -4,4 +4,5 @@ S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/u200/
F: configs/u200_defconfig
+F: configs/bananapi-m5_defconfig
F: doc/board/amlogic/u200.rst
diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig
new file mode 100644
index 0000000000..a088761622
--- /dev/null
+++ b/configs/bananapi-m5_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m5"
+CONFIG_MESON_G12A=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING="bpi-m5"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_ADC=y
+CONFIG_SARADC_MESON=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_MDIO_MUX_MESON_G12A=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_VIDEO_BMP_RLE8=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index de1a9ce284..2913ab281a 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -19,6 +19,7 @@ This matrix concerns the actual source code version.
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
+| | | | | | | | BananaPi-M5 |
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
--
2.17.1

63
projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-ARM-amlogic-add-JetHub-common-config-header.patch
View File

@ -1,63 +0,0 @@
From 9a68cb8d0d042b0c9ebc3546aeecdba75b320463 Mon Sep 17 00:00:00 2001
From: Vyacheslav Bocharov <adeep@lexina.in>
Date: Mon, 20 Sep 2021 11:40:14 +0300
Subject: [PATCH 16/31] FROMGIT: ARM: amlogic: add JetHub common config header
JetHub devices uses its own boot sequence with "rescue" button
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
include/configs/jethub.h | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 include/configs/jethub.h
diff --git a/include/configs/jethub.h b/include/configs/jethub.h
new file mode 100644
index 0000000000..35f85095ac
--- /dev/null
+++ b/include/configs/jethub.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration for JetHome devices
+ * Copyright (C) 2021 Vyacheslav Bocharov
+ * Author: Vyacheslav Bocharov <adeep@lexina.in>
+ */
+
+#ifndef __JETHUB_CONFIG_H
+#define __JETHUB_CONFIG_H
+
+#if defined(CONFIG_MESON_AXG)
+#define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \
+ "bootcmd_rescue=" \
+ "if gpio input 10; then " \
+ "run bootcmd_usb0;" \
+ "fi;\0"
+#else
+#define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \
+ "bootcmd_rescue=" \
+ "if test \"${userbutton}\" = \"true\"; then " \
+ "run bootcmd_mmc0; " \
+ "fi;\0"
+#endif
+
+#define BOOTENV_DEV_NAME_RESCUE(devtypeu, devtypel, instance) \
+ "rescue "
+
+#ifndef BOOT_TARGET_DEVICES
+#define BOOT_TARGET_DEVICES(func) \
+ func(RESCUE, rescue, na) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 0) \
+ BOOT_TARGET_DEVICES_USB(func) \
+ func(PXE, pxe, na) \
+ func(DHCP, dhcp, na)
+#endif
+
+#include <configs/meson64.h>
+
+#endif /* __JETHUB_CONFIG_H */
--
2.17.1

934
projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-device-support.patch
View File

@ -1,934 +0,0 @@
From a6421333d73b027884bef7dd2841861d87e3a977 Mon Sep 17 00:00:00 2001
From: Vyacheslav Bocharov <adeep@lexina.in>
Date: Mon, 20 Sep 2021 11:40:15 +0300
Subject: [PATCH 17/31] FROMGIT: ARM: amlogic: add JetHub D1/H1 device support
Add support for new home automation devices.
JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features:
- DIN Rail Mounting case
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 512Mb/1GB DDR3
- 8/16GB eMMC flash
- 1 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- 2 x gpio LEDS
- GPIO user Button
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
- 3 x relay GPIO outputs
- DC source with a voltage of 9 to 56 V / Passive POE
JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features:
- Square plastic case
- Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 1GB DDR3
- 8/16GB eMMC flash
- 2 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- MicroSD 2.x/3.x/4.x DS/HS cards.
- 1 x gpio LED
- ADC user Button
- DC source 5V microUSB with serial console
Patches from:
- JetHub H1
https://lore.kernel.org/r/20210915085715.1134940-4-adeep@lexina.in
https://git.kernel.org/amlogic/c/abfaae24ecf3e7f00508b60fa05e2b6789b8f607
- JetHub D1
https://lore.kernel.org/r/20210915085715.1134940-5-adeep@lexina.in
https://git.kernel.org/amlogic/c/8e279fb2903990cc6296ec56b3b80b2f854b6c79
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: removed unused variable value]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 2 +
.../arm/dts/meson-axg-jethome-jethub-j100.dts | 361 ++++++++++++++++++
.../meson-gxl-s905w-jethome-jethub-j80.dts | 241 ++++++++++++
board/amlogic/jethub-j80/MAINTAINERS | 9 +
board/amlogic/jethub-j80/Makefile | 6 +
board/amlogic/jethub-j80/jethub-j80.c | 67 ++++
configs/jethub_j100_defconfig | 55 +++
configs/jethub_j80_defconfig | 63 +++
8 files changed, 804 insertions(+)
create mode 100644 arch/arm/dts/meson-axg-jethome-jethub-j100.dts
create mode 100644 arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
create mode 100644 board/amlogic/jethub-j80/MAINTAINERS
create mode 100644 board/amlogic/jethub-j80/Makefile
create mode 100644 board/amlogic/jethub-j80/jethub-j80.c
create mode 100644 configs/jethub_j100_defconfig
create mode 100644 configs/jethub_j80_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f0160d2dc0..d1893a9812 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -169,10 +169,12 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxl-s905x-libretech-cc-v2.dtb \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905d-libretech-pc.dtb \
+ meson-gxl-s905w-jethome-jethub-j80.dtb \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-gxm-wetek-core2.dtb \
meson-axg-s400.dtb \
+ meson-axg-jethome-jethub-j100.dtb \
meson-g12a-u200.dtb \
meson-g12a-sei510.dtb \
meson-g12b-gtking.dtb \
diff --git a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
new file mode 100644
index 0000000000..5783732dc6
--- /dev/null
+++ b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
@@ -0,0 +1,361 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Vyacheslav Bocharov <adeep@lexina.in>
+ * Copyright (c) 2020 JetHome
+ * Author: Aleksandr Kazantsev <ak@tvip.ru>
+ * Author: Alexey Shevelkin <ash@tvip.ru>
+ * Author: Vyacheslav Bocharov <adeep@lexina.in>
+ */
+
+/dts-v1/;
+
+#include "meson-axg.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/thermal/thermal.h>
+
+/ {
+ compatible = "jethome,jethub-j100", "amlogic,a113d", "amlogic,meson-axg";
+ model = "JetHome JetHub J100";
+ aliases {
+ serial0 = &uart_AO; /* Console */
+ serial1 = &uart_AO_B; /* External UART (Wireless Module) */
+ ethernet0 = &ethmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ /* 1024MB RAM */
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ linux,cma {
+ size = <0x0 0x400000>;
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_5v: regulator-vcc_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_5v>;
+ regulator-always-on;
+ };
+
+ vddio_ao18: regulator-vddio_ao18 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ usb_pwr: regulator-usb_pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_PWR";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_5v>;
+ regulator-always-on;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&scpi_sensors 0>;
+ trips {
+ cpu_passive: cpu-passive {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+
+ cpu_hot: cpu-hot {
+ temperature = <80000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "hot";
+ };
+
+ cpu_critical: cpu-critical {
+ temperature = <100000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ cpu_cooling_maps: cooling-maps {
+ map0 {
+ trip = <&cpu_passive>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ map1 {
+ trip = <&cpu_hot>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ onewire {
+ compatible = "w1-gpio";
+ gpios = <&gpio GPIOA_14 GPIO_ACTIVE_HIGH>;
+ #gpio-cells = <1>;
+ };
+};
+
+&efuse {
+ sn: sn@32 {
+ reg = <0x32 0x20>;
+ };
+
+ eth_mac: eth_mac@0 {
+ reg = <0x0 0x6>;
+ };
+
+ bt_mac: bt_mac@6 {
+ reg = <0x6 0x6>;
+ };
+
+ wifi_mac: wifi_mac@c {
+ reg = <0xc 0x6>;
+ };
+
+ bid: bid@12 {
+ reg = <0x12 0x20>;
+ };
+};
+
+&ethmac {
+ status = "okay";
+ pinctrl-0 = <&eth_rmii_x_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&eth_phy0>;
+ phy-mode = "rmii";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* ICPlus IP101A/G Ethernet PHY (vendor_id=0x0243, model_id=0x0c54) */
+ eth_phy0: ethernet-phy@0 {
+ /* compatible = "ethernet-phy-id0243.0c54";*/
+ max-speed = <100>;
+ reg = <0>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <10000>;
+ reset-gpios = <&gpio GPIOZ_5 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+/* Internal I2C bus (on CPU module) */
+&i2c1 {
+ status = "okay";
+ pinctrl-0 = <&i2c1_z_pins>;
+ pinctrl-names = "default";
+
+ /* RTC */
+ pcf8563: pcf8563@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ status = "okay";
+ };
+};
+
+/* Peripheral I2C bus (on motherboard) */
+&i2c_AO {
+ status = "okay";
+ pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
+ pinctrl-names = "default";
+};
+
+&pwm_ab {
+ status = "okay";
+ pinctrl-0 = <&pwm_a_x20_pins>;
+ pinctrl-names = "default";
+};
+
+/* wifi module */
+&sd_emmc_b {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr104;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* emmc storage */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+/* UART Bluetooth */
+&uart_B {
+ status = "okay";
+ pinctrl-0 = <&uart_b_z_pins>, <&uart_b_z_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+/* UART Console */
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+/* UART Wireless module */
+&uart_AO_B {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_b_pins>;
+ pinctrl-names = "default";
+};
+
+&usb {
+ status = "okay";
+ phy-supply = <&usb_pwr>;
+};
+
+&spicc1 {
+ status = "okay";
+ pinctrl-0 = <&spi1_x_pins>, <&spi1_ss0_x_pins>;
+ pinctrl-names = "default";
+};
+
+&gpio {
+ gpio-line-names =
+ "", "", "", "", "", // 0 - 4
+ "", "", "", "", "", // 5 - 9
+ "UserButton", "", "", "", "", // 10 - 14
+ "", "", "", "", "", // 15 - 19
+ "", "", "", "", "", // 20 - 24
+ "", "LedRed", "LedGreen", "Output3", "Output2", // 25 - 29
+ "Output1", "", "", "", "", // 30 - 34
+ "", "ZigBeeBOOT", "", "", "", // 35 - 39
+ "", "ZigBeeRESET", "", "Input4", "Input3", // 40 - 44
+ "Input2", "Input1", "", "", "", // 45 - 49
+ "", "", "", "", "", // 50 - 54
+ "", "", "", "", "", // 55 - 59
+ "", "", "", "", "", // 60 - 64
+ "", "", "", "", "", // 65 - 69
+ "", "", "", "", "", // 70 - 74
+ "", "", "", "", "", // 75 - 79
+ "", "", "", "", "", // 80 - 84
+ "", ""; // 85-86
+};
+
+&cpu0 {
+ #cooling-cells = <2>;
+};
+
+&cpu1 {
+ #cooling-cells = <2>;
+};
+
+&cpu2 {
+ #cooling-cells = <2>;
+};
+
+&cpu3 {
+ #cooling-cells = <2>;
+};
diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
new file mode 100644
index 0000000000..6eafb90869
--- /dev/null
+++ b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
@@ -0,0 +1,241 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Vyacheslav Bocharov <adeep@lexina.in>
+ * Copyright (c) 2020 JetHome
+ * Author: Aleksandr Kazantsev <ak@tvip.ru>
+ * Author: Alexey Shevelkin <ash@tvip.ru>
+ * Author: Vyacheslav Bocharov <adeep@lexina.in>
+ */
+
+/dts-v1/;
+
+#include "meson-gxl.dtsi"
+
+/ {
+ compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl";
+ model = "JetHome JetHub J80";
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ linux,cma {
+ size = <0x0 0x1000000>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart_AO; /* Console */
+ serial1 = &uart_A; /* Bluetooth */
+ serial2 = &uart_AO_B; /* Wireless module 1 */
+ serial3 = &uart_C; /* Wireless module 2 */
+ ethernet0 = &ethmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ vddio_ao18: regulator-vddio_ao18 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+};
+
+&efuse {
+ bt_mac: bt_mac@6 {
+ reg = <0x6 0x6>;
+ };
+
+ wifi_mac: wifi_mac@C {
+ reg = <0xc 0x6>;
+ };
+};
+
+&sn {
+ reg = <0x32 0x20>;
+};
+
+&eth_mac {
+ reg = <0x0 0x6>;
+};
+
+&bid {
+ reg = <0x12 0x20>;
+};
+
+&usb {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&clkc CLKID_FCLK_DIV4>;
+ clock-names = "clkin0";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vddio_ao18>;
+};
+
+/* Wireless SDIO Module */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <50000000>;
+
+ non-removable;
+ disable-wp;
+
+ /* WiFi firmware requires power to be kept while in suspend */
+ keep-power-in-suspend;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <50000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+/* Console UART */
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+/* S905W only has access to its internal PHY */
+&ethmac {
+ status = "okay";
+ phy-mode = "rmii";
+ phy-handle = <&internal_phy>;
+};
+
+&internal_phy {
+ status = "okay";
+ pinctrl-0 = <&eth_link_led_pins>, <&eth_act_led_pins>;
+ pinctrl-names = "default";
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+};
+
+&uart_C {
+ status = "okay";
+ pinctrl-0 = <&uart_c_pins>;
+ pinctrl-names = "default";
+};
+
+&uart_AO_B {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_b_pins>, <&uart_ao_b_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+};
+
+&i2c_B {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c_b_pins>;
+
+ pcf8563: pcf8563@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ status = "okay";
+ };
+};
diff --git a/board/amlogic/jethub-j80/MAINTAINERS b/board/amlogic/jethub-j80/MAINTAINERS
new file mode 100644
index 0000000000..459e9f89da
--- /dev/null
+++ b/board/amlogic/jethub-j80/MAINTAINERS
@@ -0,0 +1,9 @@
+JetHome JetHub
+M: Vyacheslav Bocharov <adeep@lexina.in>
+S: Maintained
+L: u-boot-amlogic@groups.io
+F: board/amlogic/jethub-j80/
+F: configs/jethub_j80_defconfig
+F: configs/jethub_j100_defconfig
+F: doc/board/amlogic/jethub-j80.rst
+F: doc/board/amlogic/jethub-j100.rst
diff --git a/board/amlogic/jethub-j80/Makefile b/board/amlogic/jethub-j80/Makefile
new file mode 100644
index 0000000000..a727a4b222
--- /dev/null
+++ b/board/amlogic/jethub-j80/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2021 Vyacheslav Bocharov
+# Author: Vyacheslav Bocharov <adeep@lexina.in>
+
+obj-y := jethub-j80.o
diff --git a/board/amlogic/jethub-j80/jethub-j80.c b/board/amlogic/jethub-j80/jethub-j80.c
new file mode 100644
index 0000000000..185880de13
--- /dev/null
+++ b/board/amlogic/jethub-j80/jethub-j80.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Vyacheslav Bocharov
+ * Author: Vyacheslav Bocharov <adeep@lexina.in>
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <adc.h>
+#include <env.h>
+#include <init.h>
+#include <net.h>
+#include <asm/io.h>
+#include <asm/arch/gx.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+#include <asm/arch/mem.h>
+
+#define EFUSE_SN_OFFSET 50
+#define EFUSE_SN_SIZE 32
+#define EFUSE_MAC_OFFSET 0
+#define EFUSE_MAC_SIZE 6
+#define EFUSE_USID_OFFSET 18
+#define EFUSE_USID_SIZE 32
+
+int misc_init_r(void)
+{
+ u8 mac_addr[EFUSE_MAC_SIZE];
+ char serial[EFUSE_SN_SIZE];
+ char usid[EFUSE_USID_SIZE];
+ ssize_t len;
+ unsigned int adcval;
+ int ret;
+
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+ eth_env_set_enetaddr("ethaddr", mac_addr);
+ else
+ meson_generate_serial_ethaddr();
+ }
+
+ if (!env_get("serial")) {
+ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+ EFUSE_SN_SIZE);
+ if (len == EFUSE_SN_SIZE)
+ env_set("serial", serial);
+ }
+
+ if (!env_get("usid")) {
+ len = meson_sm_read_efuse(EFUSE_USID_OFFSET, usid,
+ EFUSE_USID_SIZE);
+ if (len == EFUSE_USID_SIZE)
+ env_set("usid", usid);
+ }
+
+ ret = adc_channel_single_shot("adc@8680", 0, &adcval);
+ if (adcval < 3000)
+ env_set("userbutton", "true");
+ else
+ env_set("userbutton", "false");
+
+ return 0;
+}
diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig
new file mode 100644
index 0000000000..290ce4db85
--- /dev/null
+++ b/configs/jethub_j100_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="jethub"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-axg-jethome-jethub-j100"
+CONFIG_MESON_AXG=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" jethubj100"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD_UBI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_MESON_GXL_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_AXG=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_GXL=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig
new file mode 100644
index 0000000000..7db05af3b0
--- /dev/null
+++ b/configs/jethub_j80_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="jethub-j80"
+CONFIG_SYS_CONFIG_NAME="jethub"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905w-jethome-jethub-j80"
+CONFIG_MESON_GXL=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" jethubj80"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_CONSOLE_MUX=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_ADC=y
+CONFIG_CMD_GPIO=y
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SARADC_MESON=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD_UBI=y
+CONFIG_PHY_MESON_GXL=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+CONFIG_ETH_DESIGNWARE_MESON8B=y
+CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MESON_GXL_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXL=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_GXL=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.17.1

391
projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-docs.patch
View File

@ -1,391 +0,0 @@
From e4e87754aff3c9e961f12ae46426ac05132c1f16 Mon Sep 17 00:00:00 2001
From: Vyacheslav Bocharov <adeep@lexina.in>
Date: Mon, 20 Sep 2021 11:40:16 +0300
Subject: [PATCH 18/31] FROMGIT: ARM: amlogic: add JetHub D1/H1 docs
Fix doc/board/amlogic/index.rst:
- Add S905W to S905X column.
- Add JetHub devices to the corresponding columns.
- Fix tabs to spaces for table alignment
Add doc/board/amlogic files:
- jethub-j100.rst
- jethub-j80.rst
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
doc/board/amlogic/index.rst | 128 +++++++++++++++---------------
doc/board/amlogic/jethub-j100.rst | 108 +++++++++++++++++++++++++
doc/board/amlogic/jethub-j80.rst | 97 ++++++++++++++++++++++
3 files changed, 270 insertions(+), 63 deletions(-)
create mode 100644 doc/board/amlogic/jethub-j100.rst
create mode 100644 doc/board/amlogic/jethub-j80.rst
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index 2913ab281a..c18f1b7e71 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -10,69 +10,69 @@ An up-do-date matrix is also available on: http://linux-meson.com
This matrix concerns the actual source code version.
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 |
-| | | S805X | S905D | | S905D2 | A311D | S905D3 |
-| | | | | | S905Y2 | | |
-+===============================+===========+=================+==============+============+============+=============+==============+
-| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
-| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
-| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
-| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
-| | | | | | | | BananaPi-M5 |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Infrared Decoder | No | No | No | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| SPI (CC) | No | No | No | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| NAND | No | No | No | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| CEC | No | No | No | *N/A* | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| Thermal Sensor | No | No | No | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| LCD/LVDS Output | No | *N/A* | No | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
-| PCIe (+NVMe) | *N/A* | *N/A* | *N/A* | **Yes** | **Yes** | **Yes** | **Yes** |
-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 |
+| | | S805X | S905D | | S905D2 | A311D | S905D3 |
+| | | S905W | | | S905Y2 | | |
++===============================+===========+=================+==============+=============+============+=============+==============+
+| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
+| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
+| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
+| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
+| | | JetHub J80 | | | | | BananaPi-M5 |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Infrared Decoder | No | No | No | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| SPI (CC) | No | No | No | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| NAND | No | No | No | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| CEC | No | No | No | *N/A* | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Thermal Sensor | No | No | No | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| LCD/LVDS Output | No | *N/A* | No | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| PCIe (+NVMe) | *N/A* | *N/A* | *N/A* | **Yes** | **Yes** | **Yes** | **Yes** |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
Board Documentation
-------------------
@@ -82,6 +82,8 @@ Board Documentation
beelink-gtking
beelink-gtkingpro
+ jethub-j100
+ jethub-j80
khadas-vim2
khadas-vim3l
khadas-vim3
diff --git a/doc/board/amlogic/jethub-j100.rst b/doc/board/amlogic/jethub-j100.rst
new file mode 100644
index 0000000000..58602787d3
--- /dev/null
+++ b/doc/board/amlogic/jethub-j100.rst
@@ -0,0 +1,108 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for JetHub J100
+=======================
+
+JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation
+controller manufactured by JetHome with the following specifications:
+
+ - Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
+ - no video out
+ - 512Mb/1GB DDR3
+ - 8/16GB eMMC flash
+ - 1 x USB 2.0
+ - 1 x 10/100Mbps ethernet
+ - WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE
+ 802.11a/b/g/n/ac, Bluetooth 4.2.
+ - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output
+ power and Zigbee 3.0 support.
+ - 2 x gpio LEDS
+ - GPIO user Button
+ - 1 x 1-Wire
+ - 2 x RS-485
+ - 4 x dry contact digital GPIO inputs
+ - 3 x relay GPIO outputs
+ - DC source with a voltage of 9 to 56 V / Passive POE
+ - DIN Rail Mounting case
+
+U-Boot compilation
+------------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-none-elf-
+ $ make jethub_j100_defconfig
+ $ make
+
+Image creation
+--------------
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain binaries
+from the git tree published by the board vendor:
+
+.. code-block:: bash
+
+ $ git clone https://github.com/jethome-ru/jethub-aml-tools jethub-u-boot
+ $ cd jethub-u-boot
+ $ export FIPDIR=$PWD
+
+Go back to mainline U-boot source tree then :
+
+.. code-block:: bash
+
+ $ mkdir fip
+
+ $ cp $FIPDIR/j100/bl2.bin fip/
+ $ cp $FIPDIR/j100/acs.bin fip/
+ $ cp $FIPDIR/j100/bl21.bin fip/
+ $ cp $FIPDIR/j100/bl30.bin fip/
+ $ cp $FIPDIR/j100/bl301.bin fip/
+ $ cp $FIPDIR/j100/bl31.img fip/
+ $ cp u-boot.bin fip/bl33.bin
+
+ $ $FIPDIR/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ $ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ $ $FIPDIR/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
+ --output fip/bl30_new.bin.enc \
+ --level v3 --type bl30
+ $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl31.img \
+ --output fip/bl31.img.enc \
+ --level v3 --type bl31
+ $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
+ --output fip/bl33.bin.enc \
+ --level v3 --type bl33
+ $ $FIPDIR/j100/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
+ --output fip/bl2.n.bin.sig
+ $ $FIPDIR/j100/aml_encrypt_axg --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc --level v3
+
+and then write the image to eMMC with:
+
+.. code-block:: bash
+
+ $ DEV=/dev/your_emmc_device
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
diff --git a/doc/board/amlogic/jethub-j80.rst b/doc/board/amlogic/jethub-j80.rst
new file mode 100644
index 0000000000..6b7bdc78b1
--- /dev/null
+++ b/doc/board/amlogic/jethub-j80.rst
@@ -0,0 +1,97 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for JetHub J80
+======================
+
+JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation
+controller manufactured by JetHome with the following specifications:
+
+ - Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz
+ - No video out
+ - 1GB DDR3
+ - 8/16GB eMMC flash
+ - 2 x USB 2.0
+ - 1 x 10/100Mbps ethernet
+ - SDIO WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0.
+ - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output
+ power and Zigbee 3.0 support.
+ - MicroSD 2.x/3.x/4.x DS/HS cards.
+ - 1 x gpio LED
+ - ADC user Button
+ - DC source 5V microUSB
+ - Square plastic case
+
+U-Boot compilation
+------------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-none-elf-
+ $ make jethub_j80_defconfig
+ $ make
+
+Image creation
+--------------
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain binaries
+from the git tree published by the board vendor:
+
+.. code-block:: bash
+
+ $ git clone https://github.com/jethome-ru/jethub-aml-tools jethub-u-boot
+ $ cd jethub-u-boot
+ $ export FIPDIR=$PWD
+
+Go back to mainline U-Boot source tree then :
+
+.. code-block:: bash
+
+ $ mkdir fip
+
+ $ cp $FIPDIR/j80/bl2.bin fip/
+ $ cp $FIPDIR/j80/acs.bin fip/
+ $ cp $FIPDIR/j80/bl21.bin fip/
+ $ cp $FIPDIR/j80/bl30.bin fip/
+ $ cp $FIPDIR/j80/bl301.bin fip/
+ $ cp $FIPDIR/j80/bl31.img fip/
+ $ cp u-boot.bin fip/bl33.bin
+
+ $ $FIPDIR/blx_fix.sh \
+ fip/bl30.bin \
+ fip/zero_tmp \
+ fip/bl30_zero.bin \
+ fip/bl301.bin \
+ fip/bl301_zero.bin \
+ fip/bl30_new.bin \
+ bl30
+
+ $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+ $ $FIPDIR/blx_fix.sh \
+ fip/bl2_acs.bin \
+ fip/zero_tmp \
+ fip/bl2_zero.bin \
+ fip/bl21.bin \
+ fip/bl21_zero.bin \
+ fip/bl2_new.bin \
+ bl2
+
+ $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+ $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+ $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl33.bin --compress lz4
+ $ $FIPDIR/j80/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+ $ $FIPDIR/j80/aml_encrypt_gxl --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc
+
+and then write the image to SD/eMMC with:
+
+.. code-block:: bash
+
+ $ DEV=/dev/your_sd_device
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
--
2.17.1

60
projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-ARM-dts-sort-Amlogic-Makefile-section.patch
View File

@ -1,60 +0,0 @@
From 4fba951d8285c969f9701ae080034cc8129dec83 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 15 Sep 2021 01:46:56 +0000
Subject: [PATCH 19/31] FROMGIT: ARM: dts: sort Amlogic Makefile section
Alpha sort the Amlogic dtb list (same as the kernel).
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1893a9812..f0ab716409 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -158,31 +158,31 @@ dtb-$(CONFIG_ARCH_S5P4418) += \
s5p4418-nanopi2.dtb
dtb-$(CONFIG_ARCH_MESON) += \
+ meson-axg-s400.dtb \
+ meson-axg-jethome-jethub-j100.dtb \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-odroidc2.dtb \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-p200.dtb \
meson-gxbb-p201.dtb \
- meson-gxl-s905x-p212.dtb \
meson-gxl-s805x-libretech-ac.dtb \
- meson-gxl-s905x-libretech-cc.dtb \
- meson-gxl-s905x-libretech-cc-v2.dtb \
- meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905w-jethome-jethub-j80.dtb \
+ meson-gxl-s905x-khadas-vim.dtb \
+ meson-gxl-s905x-libretech-cc.dtb \
+ meson-gxl-s905x-libretech-cc-v2.dtb \
+ meson-gxl-s905x-p212.dtb \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-gxm-wetek-core2.dtb \
- meson-axg-s400.dtb \
- meson-axg-jethome-jethub-j100.dtb \
- meson-g12a-u200.dtb \
meson-g12a-sei510.dtb \
+ meson-g12a-u200.dtb \
+ meson-g12b-a311d-khadas-vim3.dtb \
meson-g12b-gtking.dtb \
meson-g12b-gtking-pro.dtb \
meson-g12b-gsking-x.dtb \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2-plus.dtb \
- meson-g12b-a311d-khadas-vim3.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
--
2.17.1

456
projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-ARM-dts-add-support-for-Radxa-Zero.patch
View File

@ -1,456 +0,0 @@
From 27730602a803186eed0e319bc620c4c08dba78aa Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 15 Sep 2021 01:46:57 +0000
Subject: [PATCH 20/31] FROMGIT: ARM: dts: add support for Radxa Zero
Import the initial dts queued for Linux 5.16.y
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm/dts/Makefile | 1 +
.../arm/dts/meson-g12a-radxa-zero-u-boot.dtsi | 7 +
arch/arm/dts/meson-g12a-radxa-zero.dts | 405 ++++++++++++++++++
3 files changed, 413 insertions(+)
create mode 100644 arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-g12a-radxa-zero.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f0ab716409..742b404971 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -175,6 +175,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-gxm-wetek-core2.dtb \
+ meson-g12a-radxa-zero.dtb \
meson-g12a-sei510.dtb \
meson-g12a-u200.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
diff --git a/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
new file mode 100644
index 0000000000..236f2468dc
--- /dev/null
+++ b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts
new file mode 100644
index 0000000000..e3bb6df42f
--- /dev/null
+++ b/arch/arm/dts/meson-g12a-radxa-zero.dts
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 BayLibre SAS. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-g12a.dtsi"
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "radxa,zero", "amlogic,g12a";
+ model = "Radxa Zero";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ cvbs-connector {
+ status = "disabled";
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ ao_5v: regulator-ao_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ hdmi_pw: regulator-hdmi_pw {
+ compatible = "regulator-fixed";
+ regulator-name = "HDMI_PW";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&ao_5v>;
+ regulator-always-on;
+ };
+
+ vddao_1v8: regulator-vddao_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&ao_5v>;
+ regulator-always-on;
+ };
+
+ vddcpu: regulator-vddcpu {
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+
+ vin-supply = <&ao_5v>;
+
+ pwms = <&pwm_AO_cd 1 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "RADXA-ZERO";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&cec_AO {
+ pinctrl-0 = <&cec_ao_a_h_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cecb_AO {
+ pinctrl-0 = <&cec_ao_b_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu2 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu3 {
+ cpu-supply = <&vddcpu>;
+ operating-points-v2 = <&cpu_opp_table>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&hdmi_pw>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&ir {
+ status = "disabled";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin1";
+ status = "okay";
+};
+
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vddao_1v8>;
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr50;
+ max-frequency = <100000000>;
+
+ non-removable;
+ disable-wp;
+
+ /* WiFi firmware requires power to be kept while in suspend */
+ keep-power-in-suspend;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_1v8>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_c_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_3v3>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ max-frequency = <200000000>;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb {
+ status = "okay";
+ dr_mode = "host";
+};
--
2.17.1

105
projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-boards-amlogic-add-Radxa-Zero-defconfig.patch
View File

@ -1,105 +0,0 @@
From 029bd38e1e503ed676d2bd894e5402b62bbe26ed Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 15 Sep 2021 01:46:58 +0000
Subject: [PATCH 21/31] FROMGIT: boards: amlogic: add Radxa Zero defconfig
Add a defconfig for the Radxa Zero SBC, using an Amlogic S905Y2 chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
board/amlogic/u200/MAINTAINERS | 1 +
configs/radxa-zero_defconfig | 70 ++++++++++++++++++++++++++++++++++
2 files changed, 71 insertions(+)
create mode 100644 configs/radxa-zero_defconfig
diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS
index 655cf64a3d..73c73b1591 100644
--- a/board/amlogic/u200/MAINTAINERS
+++ b/board/amlogic/u200/MAINTAINERS
@@ -5,4 +5,5 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/u200/
F: configs/u200_defconfig
F: configs/bananapi-m5_defconfig
+F: configs/radxa-zero_defconfig
F: doc/board/amlogic/u200.rst
diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig
new file mode 100644
index 0000000000..acd13f1c6b
--- /dev/null
+++ b/configs/radxa-zero_defconfig
@@ -0,0 +1,70 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero"
+CONFIG_MESON_G12A=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" radxa-zero"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET_RANDOM_ETHADDR is not set
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_DM_ETH is not set
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+CONFIG_MDIO_MUX_MESON_G12A=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.17.1

130
projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-doc-boards-amlogic-update-for-Radxa-Zero.patch
View File

@ -1,130 +0,0 @@
From c5f9aa2256a1cae64fef4a1dbc9e7540d8805e85 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 15 Sep 2021 01:46:59 +0000
Subject: [PATCH 22/31] FROMGIT: doc: boards: amlogic: update for Radxa Zero
Add documentation bits for the Radxa Zero
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
board/amlogic/u200/MAINTAINERS | 1 +
doc/board/amlogic/index.rst | 3 +-
doc/board/amlogic/radxa-zero.rst | 74 ++++++++++++++++++++++++++++++++
3 files changed, 77 insertions(+), 1 deletion(-)
create mode 100644 doc/board/amlogic/radxa-zero.rst
diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS
index 73c73b1591..a259d12886 100644
--- a/board/amlogic/u200/MAINTAINERS
+++ b/board/amlogic/u200/MAINTAINERS
@@ -7,3 +7,4 @@ F: configs/u200_defconfig
F: configs/bananapi-m5_defconfig
F: configs/radxa-zero_defconfig
F: doc/board/amlogic/u200.rst
+F: doc/board/amlogic/radxa-zero.rst
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index c18f1b7e71..189b1efe2b 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -17,7 +17,7 @@ This matrix concerns the actual source code version.
+===============================+===========+=================+==============+=============+============+=============+==============+
| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
-| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
+| | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 |
| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
| | | JetHub J80 | | | | | BananaPi-M5 |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
@@ -98,6 +98,7 @@ Board Documentation
p201
p212
q200
+ radxa-zero
s400
sei510
sei610
diff --git a/doc/board/amlogic/radxa-zero.rst b/doc/board/amlogic/radxa-zero.rst
new file mode 100644
index 0000000000..423403f3c7
--- /dev/null
+++ b/doc/board/amlogic/radxa-zero.rst
@@ -0,0 +1,74 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Radxa Zero
+=====================
+
+Radxa Zero is a small form factor SBC based on the Amlogic S905Y2
+chipset that ships in a number of RAM/eMMC configurations:
+
+Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436
+wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB
+eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
+
+- Amlogic S905Y2 quad-core Cortex-A53
+- Mali G31-MP2 GPU
+- HDMI 2.1 output (micro)
+- 1x USB 2.0 port - Type C (OTG)
+- 1x USB 3.0 port - Type C (Host)
+- 1x micro SD Card slot
+- 40 Pin GPIO header
+
+Schematics are available on the manufacturer website:
+
+https://dl.radxa.com/zero/docs/hw/RADAX_ZERO_V13_SCH_20210309.pdf
+
+U-Boot compilation
+------------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-none-elf-
+ $ make radxa-zero_defconfig
+ $ make
+
+Image creation
+--------------
+
+Amlogic does not provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+git trees published by the board vendor:
+
+.. code-block:: bash
+
+ $ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git
+ $ git clone https://github.com/radxa/fip.git
+
+ $ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev
+ $ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools
+
+ $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz
+ $ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt
+
+ $ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf-
+ $ export ARCH=arm
+ $ cd u-boot
+ $ make radxa-zero_defconfig
+ $ make
+
+ $ cp u-boot.bin ../fip/radxa-zero/bl33.bin
+ $ cd ../fip/radxa-zero
+ $ make
+
+This will generate:
+
+.. code-block:: bash
+
+ $ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl
+
+Then write the image to SD with:
+
+.. code-block:: bash
+
+ $ DEV=/dev/your_sd_device
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
--
2.17.1

3
projects/Amlogic/patches/u-boot/u-boot-0027-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch
View File

@ -14,7 +14,7 @@ new file mode 100644
index 0000000000..75560c9fe8
--- /dev/null
+++ b/configs/wetek-hub_defconfig
@@ -0,0 +1,68 @@
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="wetek-gxbb"
+CONFIG_ARCH_MESON=y
@ -27,6 +27,7 @@ index 0000000000..75560c9fe8
+CONFIG_IDENT_STRING=" wetek-hub"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub"
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y

3
projects/Amlogic/patches/u-boot/u-boot-0028-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch
View File

@ -14,7 +14,7 @@ new file mode 100644
index 0000000000..cc17b6afdf
--- /dev/null
+++ b/configs/wetek-play2_defconfig
@@ -0,0 +1,68 @@
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="wetek-gxbb"
+CONFIG_ARCH_MESON=y
@ -27,6 +27,7 @@ index 0000000000..cc17b6afdf
+CONFIG_IDENT_STRING=" wetek-play2"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2"
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y

32
projects/Amlogic/patches/u-boot/u-boot-0030-WIP-boards-amlogic-add-CONFIG_DM_ETH-to-Radxa-Zero.patch
View File

@ -1,32 +0,0 @@
From 0c92a1152843384f45d399528762c9aa20a1aa14 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 30 Oct 2021 09:44:52 +0000
Subject: [PATCH 30/31] WIP: boards: amlogic: add CONFIG_DM_ETH to Radxa Zero
Radxa Zero does not have on-board Ethernet hardware but the common
Amlogic board/SoC files have dependencies on Ethernet code, so we
see the driver-model migration warning during u-boot compile. This
adds the required CONFIG_DM_ETH to the board config, which does no
harm and silences the warning.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
configs/radxa-zero_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig
index acd13f1c6b..88a984bb53 100644
--- a/configs/radxa-zero_defconfig
+++ b/configs/radxa-zero_defconfig
@@ -29,7 +29,7 @@ CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
# CONFIG_PHY_REALTEK is not set
-# CONFIG_DM_ETH is not set
+CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
# CONFIG_ETH_DESIGNWARE_MESON8B is not set
--
2.17.1

93
projects/Amlogic/patches/u-boot/u-boot-0031-FROMGIT-pinctrl-meson-Correct-the-driver-GPIO-declar.patch
View File

@ -1,93 +0,0 @@
From a81703836325b1a0cfe1d241ec7c5e775feccbc7 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Thu, 9 Dec 2021 09:07:48 +0000
Subject: [PATCH 31/31] FROMGIT: pinctrl: meson: Correct the driver GPIO
declaration
This should use the provided U_BOOT_DRIVER() macro so that the driver gets
added to the appropriate linker list. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7c9dcfed50f ("pinctrl: meson: rework gx pmx function")
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c | 2 +-
drivers/pinctrl/meson/pinctrl-meson-gx.h | 2 +-
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 4 ++--
drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
index 159f3406a2..99502d89c6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
@@ -145,7 +145,7 @@ static const struct dm_gpio_ops meson_gx_gpio_ops = {
.direction_output = meson_gpio_direction_output,
};
-const struct driver meson_gx_gpio_driver = {
+U_BOOT_DRIVER(meson_gx_gpio_driver) = {
.name = "meson-gx-gpio",
.id = UCLASS_GPIO,
.probe = meson_gpio_probe,
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx.h b/drivers/pinctrl/meson/pinctrl-meson-gx.h
index 4c1aa1a300..c70c1f51c6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gx.h
+++ b/drivers/pinctrl/meson/pinctrl-meson-gx.h
@@ -43,6 +43,6 @@ struct meson_gx_pmx_data {
}
extern const struct pinctrl_ops meson_gx_pinctrl_ops;
-extern const struct driver meson_gx_gpio_driver;
+extern U_BOOT_DRIVER(meson_gx_gpio_driver);
#endif /* __PINCTRL_MESON_GX_H__ */
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 8c01c73906..93a895c9fa 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -439,7 +439,7 @@ struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
.num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
.num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions),
.num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
- .gpio_driver = &meson_gx_gpio_driver,
+ .gpio_driver = DM_DRIVER_REF(meson_gx_gpio_driver),
};
struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
@@ -452,7 +452,7 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
.num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
.num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions),
.num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
- .gpio_driver = &meson_gx_gpio_driver,
+ .gpio_driver = DM_DRIVER_REF(meson_gx_gpio_driver),
};
static const struct udevice_id meson_gxbb_pinctrl_match[] = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 51a0b4c5ca..a44145e2d4 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -701,7 +701,7 @@ struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
.num_groups = ARRAY_SIZE(meson_gxl_periphs_groups),
.num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions),
.num_banks = ARRAY_SIZE(meson_gxl_periphs_banks),
- .gpio_driver = &meson_gx_gpio_driver,
+ .gpio_driver = DM_DRIVER_REF(meson_gx_gpio_driver),
};
struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
@@ -714,7 +714,7 @@ struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
.num_groups = ARRAY_SIZE(meson_gxl_aobus_groups),
.num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions),
.num_banks = ARRAY_SIZE(meson_gxl_aobus_banks),
- .gpio_driver = &meson_gx_gpio_driver,
+ .gpio_driver = DM_DRIVER_REF(meson_gx_gpio_driver),
};
static const struct udevice_id meson_gxl_pinctrl_match[] = {
--
2.17.1

78
projects/NXP/devices/iMX8/patches/u-boot/0001-fix-imx64-mkimage-fit-atf-2021-10.patch
View File

@ -1,78 +0,0 @@
diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh b/arch/arm/mach-imx/mkimage_fit_atf.sh
index 2a17968794c1..2d6c46633c72 100755
--- a/arch/arm/mach-imx/mkimage_fit_atf.sh
+++ b/arch/arm/mach-imx/mkimage_fit_atf.sh
@@ -53,7 +53,7 @@ cat << __HEADER_EOF
description = "Configuration to load ATF before U-Boot";
images {
- uboot@1 {
+ uboot_1 {
description = "U-Boot (64-bit)";
os = "u-boot";
data = /incbin/("$BL33");
@@ -68,7 +68,7 @@ cnt=1
for dtname in $*
do
cat << __FDT_IMAGE_EOF
- fdt@$cnt {
+ fdt_$cnt {
description = "$(basename $dtname .dtb)";
data = /incbin/("$dtname");
type = "flat_dt";
@@ -79,7 +79,7 @@ cnt=$((cnt+1))
done
cat << __HEADER_EOF
- atf@1 {
+ atf_1 {
description = "ARM Trusted Firmware";
os = "arm-trusted-firmware";
data = /incbin/("$BL31");
@@ -93,7 +93,7 @@ __HEADER_EOF
if [ -f $BL32 ]; then
cat << __HEADER_EOF
- tee@1 {
+ tee_1 {
description = "TEE firmware";
data = /incbin/("$BL32");
type = "firmware";
@@ -108,7 +108,7 @@ fi
cat << __CONF_HEADER_EOF
};
configurations {
- default = "config@1";
+ default = "config_1";
__CONF_HEADER_EOF
@@ -117,20 +117,20 @@ for dtname in $*
do
if [ -f $BL32 ]; then
cat << __CONF_SECTION_EOF
- config@$cnt {
+ config_$cnt {
description = "$(basename $dtname .dtb)";
- firmware = "uboot@1";
- loadables = "atf@1", "tee@1";
- fdt = "fdt@$cnt";
+ firmware = "uboot_1";
+ loadables = "atf_1", "tee_1";
+ fdt = "fdt_$cnt";
};
__CONF_SECTION_EOF
else
cat << __CONF_SECTION1_EOF
- config@$cnt {
+ config_$cnt {
description = "$(basename $dtname .dtb)";
- firmware = "uboot@1";
- loadables = "atf@1";
- fdt = "fdt@$cnt";
+ firmware = "uboot_1";
+ loadables = "atf_1";
+ fdt = "fdt_$cnt";
};
__CONF_SECTION1_EOF
fi

3
projects/Samsung/patches/u-boot/0001-add-xu4-defconfig.patch
View File

@ -13,7 +13,7 @@ new file mode 100644
index 0000000000..31d9e67805
--- /dev/null
+++ b/configs/odroid-xu4_defconfig
@@ -0,0 +1,66 @@
@@ -0,0 +1,67 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_EXYNOS=y
@ -25,6 +25,7 @@ index 0000000000..31d9e67805
+CONFIG_IDENT_STRING=" for ODROID-XU4"
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_LOAD_ADDR=0x43e00000
+CONFIG_FIT=y
+CONFIG_FIT_BEST_MATCH=y
+CONFIG_SILENT_CONSOLE=y