u-boot: update Amlogic patches for 2022.01

This commit is contained in:
Christian Hewitt 2022-01-15 06:44:01 +00:00
parent 3ccf688470
commit 807a32d2d4
13 changed files with 815 additions and 141 deletions

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@ -1,7 +1,7 @@
From 66b8aff5a485dd2c77974992b031d4298ddfee13 Mon Sep 17 00:00:00 2001
From 6cf3857ecc3ed6197c08a6d2d488deb2cd86bcec Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 13 Nov 2020 02:09:36 +0000
Subject: [PATCH 01/31] HACK: configs: meson64: prevent stdout/stderr on
Subject: [PATCH 01/11] HACK: configs: meson64: prevent stdout/stderr on
videoconsole
Several devices have CONFIG_DM_VIDEO enabled which causes stdout/stderr
@ -14,7 +14,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index f9bb0240d2..d31314412c 100644
index cb202d5555..ba095efe62 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -18,7 +18,7 @@

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@ -1,7 +1,7 @@
From d6bd0e0edae9093f43bc566daac7586aa807b6ac Mon Sep 17 00:00:00 2001
From 0e34a38e25440bcd31cb8e8ec8e237b38a8210a9 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 22 Apr 2021 06:52:50 +0000
Subject: [PATCH 02/31] HACK: configs: meson64: remove /amlogic so fdtdir finds
Subject: [PATCH 02/11] HACK: configs: meson64: remove /amlogic so fdtdir finds
LE boot files
---
@ -9,10 +9,10 @@ Subject: [PATCH 02/31] HACK: configs: meson64: remove /amlogic so fdtdir finds
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index d31314412c..f909dbe079 100644
index ba095efe62..d1eccf58b7 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -93,7 +93,7 @@
@@ -96,7 +96,7 @@
"pxefile_addr_r=0x01080000\0" \
"fdtoverlay_addr_r=0x01000000\0" \
"ramdisk_addr_r=0x13000000\0" \

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@ -1,7 +1,7 @@
From 7a6e8626ca82952d6c6b38a1a91841c1a0fe1e7f Mon Sep 17 00:00:00 2001
From 158fa27c3f736047520b7ae7ffa62a82d96254d3 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 3 Aug 2021 18:42:55 +0000
Subject: [PATCH 03/31] HACK: board: amlogic: odroid-n2: remove /amlogic/
Subject: [PATCH 03/11] HACK: board: amlogic: odroid-n2: remove /amlogic/
prefix for dtb path
Remove the /amlogic/ prefix to align with current LE dtb locations.

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@ -1,8 +1,8 @@
From 39890cba3c5eeaa63cbe999c5368a0a5862499ed Mon Sep 17 00:00:00 2001
From c3460fb372cf068a2d2285c2211ac53f0e872b74 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 20 Apr 2021 05:19:43 +0000
Subject: [PATCH 23/31] WIP: ARM: dts: import WeTek Hub/Play2 DTs from Linux
5.14
Subject: [PATCH 04/11] WIP: ARM: dts: import WeTek Hub/Play2 DTs from Linux
5.17
Import the WeTek common dtsi and Hub/Play2 device-trees.
@ -13,8 +13,8 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 ++++
.../dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 +
arch/arm/dts/meson-gxbb-wetek-play2.dts | 121 ++++++++
arch/arm/dts/meson-gxbb-wetek.dtsi | 286 ++++++++++++++++++
6 files changed, 481 insertions(+)
arch/arm/dts/meson-gxbb-wetek.dtsi | 292 ++++++++++++++++++
6 files changed, 487 insertions(+)
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts
create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
@ -22,10 +22,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 742b404971..43a1bfafbc 100644
index b3e2a9c9d7..c752d2bd18 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,6 +165,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
@@ -173,6 +173,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-p200.dtb \
meson-gxbb-p201.dtb \
@ -253,10 +253,10 @@ index 0000000000..6eae692792
+};
diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi
new file mode 100644
index 0000000000..a350fee126
index 0000000000..3c3eeb148e
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-wetek.dtsi
@@ -0,0 +1,286 @@
@@ -0,0 +1,292 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Andreas Färber
@ -265,6 +265,8 @@ index 0000000000..a350fee126
+ */
+
+#include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ aliases {
@ -284,8 +286,10 @@ index 0000000000..a350fee126
+ leds {
+ compatible = "gpio-leds";
+
+ led-system {
+ label = "wetek-play:system-status";
+ led-blue {
+ /* red in suspend or power-off */
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_POWER;
+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ panic-indicator;
@ -323,6 +327,7 @@ index 0000000000..a350fee126
+ regulator-name = "VDDIO_AO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
@ -420,6 +425,7 @@ index 0000000000..a350fee126
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&vddio_ao18>;
+};
+
+&hdmi_tx_tmds_port {
@ -486,7 +492,7 @@ index 0000000000..a350fee126
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <50000000>;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
@ -504,7 +510,7 @@ index 0000000000..a350fee126
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <200000000>;
+ max-frequency = <50000000>;
+ non-removable;
+ disable-wp;
+ mmc-ddr-1_8v;

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@ -1,7 +1,7 @@
From a4a5411bf88f1f138eb4cd1edfd9de2be5154d22 Mon Sep 17 00:00:00 2001
From 18bfa4ae63357f81e7f09d70c619e87c1f60696f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 20 Apr 2021 05:29:19 +0000
Subject: [PATCH 24/31] WIP: ARM: dts: use snps,reset on WeTek devices to fix
Subject: [PATCH 05/11] WIP: ARM: dts: use snps,reset on WeTek devices to fix
Ethernet
The sync of the device tree and dt-bindings from Linux v5.6-rc2

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@ -1,7 +1,7 @@
From 9016e83df512cf11547aeb308bc4f4d9af90d893 Mon Sep 17 00:00:00 2001
From e2f70c9256c5b79cf6b03ea5990642ab78529f10 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 22 Apr 2021 05:45:29 +0000
Subject: [PATCH 26/31] WIP: boards: amlogic: add board files for wetek-gxbb
Subject: [PATCH 06/11] WIP: boards: amlogic: add board files for wetek-gxbb
devices
These support the WeTek Hub and Play2 devices.

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@ -1,17 +1,17 @@
From ee8e14699c8eaaad66ddb9c4feaf69136c17f2ad Mon Sep 17 00:00:00 2001
From 5ce0dcc6ce0f39792d9bd330132090440eaa4133 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 27 Feb 2021 06:03:00 +0000
Subject: [PATCH 27/31] WIP: boards: amlogic: add WeTek Hub defconfig
Subject: [PATCH 07/11] WIP: boards: amlogic: add WeTek Hub defconfig
Signed-of-by: Christian Hewitt <christianshewitt@gmail.com>
---
configs/wetek-hub_defconfig | 68 +++++++++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
configs/wetek-hub_defconfig | 69 +++++++++++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
create mode 100644 configs/wetek-hub_defconfig
diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig
new file mode 100644
index 0000000000..75560c9fe8
index 0000000000..73fd7c4211
--- /dev/null
+++ b/configs/wetek-hub_defconfig
@@ -0,0 +1,69 @@
@ -19,6 +19,7 @@ index 0000000000..75560c9fe8
+CONFIG_SYS_BOARD="wetek-gxbb"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
@ -27,7 +28,6 @@ index 0000000000..75560c9fe8
+CONFIG_IDENT_STRING=" wetek-hub"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub"
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y

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@ -1,17 +1,17 @@
From b87da03bb2f7c8eb01926f8fd383c08228ff0211 Mon Sep 17 00:00:00 2001
From 6913bac2c599b089795060b402f5d2957fbef641 Mon Sep 17 00:00:00 2001
From: chewitt <christianshewitt@gmail.com>
Date: Sat, 27 Feb 2021 06:04:00 +0000
Subject: [PATCH 28/31] WIP: boards: amlogic: add WeTek Play2 defconfig
Subject: [PATCH 08/11] WIP: boards: amlogic: add WeTek Play2 defconfig
Signed-off-by: Christian Hewittt <christianshewitt@gmail.com>
---
configs/wetek-play2_defconfig | 68 +++++++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
configs/wetek-play2_defconfig | 69 +++++++++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
create mode 100644 configs/wetek-play2_defconfig
diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig
new file mode 100644
index 0000000000..cc17b6afdf
index 0000000000..f218ba0e0e
--- /dev/null
+++ b/configs/wetek-play2_defconfig
@@ -0,0 +1,69 @@
@ -19,6 +19,7 @@ index 0000000000..cc17b6afdf
+CONFIG_SYS_BOARD="wetek-gxbb"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
@ -27,7 +28,6 @@ index 0000000000..cc17b6afdf
+CONFIG_IDENT_STRING=" wetek-play2"
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2"
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y

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@ -0,0 +1,543 @@
From 2eb1f5fbbaa40bb3c54189cad4298c1d6b949608 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 15 Jan 2022 06:17:23 +0000
Subject: [PATCH 09/11] WIP: ARM: dts: add support for Radxa Zero2
Import the initial dts (WIP) from chewitt/amlogic-5.16.y
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm/dts/Makefile | 1 +
.../dts/meson-g12b-radxa-zero2-u-boot.dtsi | 7 +
arch/arm/dts/meson-g12b-radxa-zero2.dts | 493 ++++++++++++++++++
3 files changed, 501 insertions(+)
create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c752d2bd18..44241fafee 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -194,6 +194,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12b-gsking-x.dtb \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2-plus.dtb \
+ meson-g12b-radxa-zero2.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
new file mode 100644
index 0000000000..236f2468dc
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts b/arch/arm/dts/meson-g12b-radxa-zero2.dts
new file mode 100644
index 0000000000..f0c9ef8592
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-radxa-zero2.dts
@@ -0,0 +1,493 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
+ * Copyright (c) 2022 Radxa Limited
+ * Author: Yuntian Zhang <yt@radxa.com>
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-a311d.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
+ model = "Radxa Zero2";
+
+ aliases {
+ serial0 = &uart_AO;
+ serial2 = &uart_A;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+ power-button {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-green {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ cvbs-connector {
+ status = "disabled";
+ compatible = "composite-video-connector";
+
+ port {
+ cvbs_connector_in: endpoint {
+ remote-endpoint = <&cvbs_vdac_out>;
+ };
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ ao_5v: regulator-ao_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ /* FIXME: actually controlled by VDDCPU_B_EN */
+ };
+
+ vddao_1v8: regulator-vddao_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vddao_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&ao_5v>;
+ regulator-always-on;
+ };
+
+ vddcpu_a: regulator-vddcpu-a {
+ /*
+ * MP8756GD Regulator.
+ */
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU_A";
+ regulator-min-microvolt = <730000>;
+ regulator-max-microvolt = <1022000>;
+
+ pwm-supply = <&ao_5v>;
+
+ pwms = <&pwm_ab 0 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddcpu_b: regulator-vddcpu-b {
+ /*
+ * Silergy SY8120B1ABC Regulator.
+ */
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU_B";
+ regulator-min-microvolt = <730000>;
+ regulator-max-microvolt = <1022000>;
+
+ pwm-supply = <&ao_5v>;
+
+ pwms = <&pwm_AO_cd 1 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "RADXA-ZERO2";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&cec_AO {
+ pinctrl-0 = <&cec_ao_a_h_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cecb_AO {
+ pinctrl-0 = <&cec_ao_b_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu_b>;
+ operating-points-v2 = <&cpu_opp_table_0>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu_b>;
+ operating-points-v2 = <&cpu_opp_table_0>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu100 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu101 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu102 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu103 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cvbs_vdac_port {
+ cvbs_vdac_out: endpoint {
+ remote-endpoint = <&cvbs_connector_in>;
+ };
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&gpio {
+ gpio-line-names =
+ /* GPIOZ */
+ "PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
+ "", "", "", "", "", "", "", "",
+ /* GPIOH */
+ "", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
+ "",
+ /* BOOT */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "EMMC_PWRSEQ", "", "", "",
+ /* GPIOC */
+ "", "", "", "", "", "", "SD_CD", "PIN_36",
+ /* GPIOA */
+ "PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
+ "", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
+ /* GPIOX */
+ "", "", "", "", "", "", "SDIO_PWRSEQ", "",
+ "", "", "", "", "", "", "", "",
+ "", "BT_SHUTDOWN", "", "";
+};
+
+&gpio_ao {
+ gpio-line-names =
+ /* GPIOAO */
+ "PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
+ "PIN_33", "PIN_37", "FAN", "",
+ /* GPIOE */
+ "", "", "";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&ao_5v>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&ir {
+ status = "disabled";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&pwm_ab {
+ pinctrl-0 = <&pwm_a_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+ status = "okay";
+};
+
+&pwm_ef {
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin2";
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin4";
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vddao_1v8>;
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+
+ non-removable;
+ disable-wp;
+
+ /* WiFi firmware requires power to be kept while in suspend */
+ keep-power-in-suspend;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_1v8>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_c_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <50000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddao_3v3>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ max-frequency = <200000000>;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
+
+&usb {
+ status = "okay";
+};
--
2.17.1

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@ -0,0 +1,105 @@
From 2200a94ab134393483c0f154a2c98c25d3e41a08 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 15 Jan 2022 06:23:29 +0000
Subject: [PATCH 10/11] WIP: boards: amlogic: add Radxa Zero2 defconfig
Add a defconfig for the Radxa Zero2 SBC, using an Amlogic A311D chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
board/amlogic/w400/MAINTAINERS | 1 +
configs/radxa-zero2_defconfig | 72 ++++++++++++++++++++++++++++++++++
2 files changed, 73 insertions(+)
create mode 100644 configs/radxa-zero2_defconfig
diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
index 991590d9f2..8587f67b46 100644
--- a/board/amlogic/w400/MAINTAINERS
+++ b/board/amlogic/w400/MAINTAINERS
@@ -3,4 +3,5 @@ M: Neil Armstrong <narmstrong@baylibre.com>
S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/w400/
+F: configs/radxa-zero2_defconfig
F: doc/board/amlogic/w400.rst
diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig
new file mode 100644
index 0000000000..e9bd2a4f13
--- /dev/null
+++ b/configs/radxa-zero2_defconfig
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2"
+CONFIG_MESON_G12A=y
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" radxa-zero2"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET_RANDOM_ETHADDR is not set
+CONFIG_MMC_MESON_GX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_ETH=y
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_DM_ETH is not set
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+CONFIG_MDIO_MUX_MESON_G12A=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_OF_LIBFDT_OVERLAY=y
--
2.17.1

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@ -0,0 +1,123 @@
From 9d8b7974d563683553bf3277f76657e5f54dd3ea Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 15 Jan 2022 06:35:47 +0000
Subject: [PATCH 11/11] WIP: doc: boards: amlogic: update for Radxa Zero2
Add documentation bits for the Radxa Zero2
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
board/amlogic/w400/MAINTAINERS | 1 +
doc/board/amlogic/index.rst | 3 +-
.../{radxa-zero.rst => radxa-zero2.rst} | 29 ++++++++++---------
3 files changed, 18 insertions(+), 15 deletions(-)
rename doc/board/amlogic/{radxa-zero.rst => radxa-zero2.rst} (75%)
diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
index 8587f67b46..d8f9d3bded 100644
--- a/board/amlogic/w400/MAINTAINERS
+++ b/board/amlogic/w400/MAINTAINERS
@@ -5,3 +5,4 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/w400/
F: configs/radxa-zero2_defconfig
F: doc/board/amlogic/w400.rst
+F: doc/board/amlogic/radxa-zero2.rst
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index 189b1efe2b..8369f6f3d0 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -19,7 +19,7 @@ This matrix concerns the actual source code version.
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
| | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 |
| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 |
-| | | JetHub J80 | | | | | BananaPi-M5 |
+| | | JetHub J80 | | | | Radxa Zero2 | BananaPi-M5 |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
@@ -99,6 +99,7 @@ Board Documentation
p212
q200
radxa-zero
+ radxa-zero2
s400
sei510
sei610
diff --git a/doc/board/amlogic/radxa-zero.rst b/doc/board/amlogic/radxa-zero2.rst
similarity index 75%
rename from doc/board/amlogic/radxa-zero.rst
rename to doc/board/amlogic/radxa-zero2.rst
index 423403f3c7..24bc1b0767 100644
--- a/doc/board/amlogic/radxa-zero.rst
+++ b/doc/board/amlogic/radxa-zero2.rst
@@ -1,18 +1,17 @@
.. SPDX-License-Identifier: GPL-2.0+
-U-Boot for Radxa Zero
-=====================
+U-Boot for Radxa Zero2
+======================
-Radxa Zero is a small form factor SBC based on the Amlogic S905Y2
-chipset that ships in a number of RAM/eMMC configurations:
+Radxa Zero2 is a small form factor SBC based on the Amlogic A311D
+chipset that ships in a number of eMMC configurations:
-Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436
-wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB
-eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
-
-- Amlogic S905Y2 quad-core Cortex-A53
-- Mali G31-MP2 GPU
+- Amlogic A311D (Quad A73 + Dual A53) CPU
+- 4GB LPDDR4 RAM
+- 32/64/128GB eMMC
+- Mali G52-MP4 GPU
- HDMI 2.1 output (micro)
+- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0
- 1x USB 2.0 port - Type C (OTG)
- 1x USB 3.0 port - Type C (Host)
- 1x micro SD Card slot
@@ -20,6 +19,7 @@ eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
Schematics are available on the manufacturer website:
+** TO-DO ** (provide updated URL)
https://dl.radxa.com/zero/docs/hw/RADAX_ZERO_V13_SCH_20210309.pdf
U-Boot compilation
@@ -28,7 +28,7 @@ U-Boot compilation
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
- $ make radxa-zero_defconfig
+ $ make radxa-zero2_defconfig
$ make
Image creation
@@ -40,6 +40,7 @@ git trees published by the board vendor:
.. code-block:: bash
+ ** TO-DO ** UPDATE URLs
$ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git
$ git clone https://github.com/radxa/fip.git
@@ -52,11 +53,11 @@ git trees published by the board vendor:
$ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf-
$ export ARCH=arm
$ cd u-boot
- $ make radxa-zero_defconfig
+ $ make radxa-zero2_defconfig
$ make
- $ cp u-boot.bin ../fip/radxa-zero/bl33.bin
- $ cd ../fip/radxa-zero
+ $ cp u-boot.bin ../fip/radxa-zero2/bl33.bin
+ $ cd ../fip/radxa-zero2
$ make
This will generate:
--
2.17.1

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@ -1,76 +0,0 @@
From 7c50f32f91d4d80bcc73e2ca58f96a7c68765f24 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Sep 2021 16:03:42 +0000
Subject: [PATCH 25/31] WIP: ARM: dts: backport fixups patch for WeTek
Hub/Play2
---
arch/arm/dts/meson-gxbb-wetek.dtsi | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi
index a350fee126..e414f36af8 100644
--- a/arch/arm/dts/meson-gxbb-wetek.dtsi
+++ b/arch/arm/dts/meson-gxbb-wetek.dtsi
@@ -6,6 +6,8 @@
*/
#include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
/ {
aliases {
@@ -25,8 +27,10 @@
leds {
compatible = "gpio-leds";
- led-system {
- label = "wetek-play:system-status";
+ led-blue {
+ /* red in suspend or power-off */
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_POWER;
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
default-state = "on";
panic-indicator;
@@ -64,6 +68,7 @@
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
+ regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
@@ -161,6 +166,7 @@
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
+ hdmi-supply = <&vddio_ao18>;
};
&hdmi_tx_tmds_port {
@@ -199,7 +205,10 @@
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ max-frequency = <200000000>;
non-removable;
disable-wp;
@@ -227,7 +236,7 @@
bus-width = <4>;
cap-sd-highspeed;
- max-frequency = <50000000>;
+ max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
--
2.17.1

View File

@ -1,27 +0,0 @@
From 3969e7f4780855dda78ea8ffa8819f9ca3773287 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 21 Sep 2021 17:54:02 +0000
Subject: [PATCH 29/31] WIP: boards: amlogic: add CONFIG_DM_USB to Odroid-HC4
This is required for 2021.07 but can be dropped with 2021.10/2022.01
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
configs/odroid-hc4_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig
index 7671496218..e95301db61 100644
--- a/configs/odroid-hc4_defconfig
+++ b/configs/odroid-hc4_defconfig
@@ -64,6 +64,7 @@ CONFIG_MESON_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y
+CONFIG_DM_USB=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
--
2.17.1