From 973fa7d07e2987b2ecd84cfbae41ab4c1b3403ab Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 8 Nov 2020 23:25:49 +0100 Subject: [PATCH 1/3] linux: update to 5.9.6 --- packages/linux/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/linux/package.mk b/packages/linux/package.mk index d7f1d41fa4..8da0d2caa5 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -22,8 +22,8 @@ case "$LINUX" in PKG_SOURCE_NAME="linux-$LINUX-$PKG_VERSION.tar.gz" ;; *) - PKG_VERSION="5.9" - PKG_SHA256="3239a4ee1250bf2048be988cc8cb46c487b2c8a0de5b1b032d38394d5c6b1a06" + PKG_VERSION="5.9.6" + PKG_SHA256="6cc182fe19a8f3958c24d453f4ab68eb73fb5cfb8af4c95b02f3db049e655370" PKG_URL="https://www.kernel.org/pub/linux/kernel/v5.x/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_PATCH_DIRS="default" ;; From a7a9b2a0f5a1a58b16ceff97a7bdedb6e9b8bf2c Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 8 Nov 2020 23:26:38 +0100 Subject: [PATCH 2/3] Allwinner: Remove merged patches in Linux 5.9.6 --- .../linux/0001-backport-from-5.10.patch | 176 ------------------ ...pers-Fix-dma_buf_mmap-forwarding-bug.patch | 82 -------- 2 files changed, 258 deletions(-) delete mode 100644 projects/Allwinner/patches/linux/0109-drm-shme-helpers-Fix-dma_buf_mmap-forwarding-bug.patch diff --git a/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch b/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch index fcde3f7a80..42f88e59fb 100644 --- a/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch +++ b/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch @@ -1,52 +1,3 @@ -From 3658a2b7f3e16c7053eb8d70657b94bb62c5a0f4 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Mon, 24 Aug 2020 21:36:49 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix dcdc1 regulator - -DCDC1 regulator powers many different subsystems. While some of them can -work at 3.0 V, some of them can not. For example, VCC-HDMI can only work -between 3.24 V and 3.36 V. According to OS images provided by the board -manufacturer this regulator should be set to 3.3 V. - -Set DCDC1 and DCDC1SW to 3.3 V in order to fix this. - -Fixes: da7ac948fa93 ("ARM: dts: sun8i: Add board dts file for Banana Pi M2 Ultra") -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200824193649.978197-1-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts -index 42d62d1ba1dc..ea15073f0c79 100644 ---- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts -+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts -@@ -223,16 +223,16 @@ ®_aldo3 { - }; - - ®_dc1sw { -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3000000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-name = "vcc-gmac-phy"; - }; - - ®_dcdc1 { - regulator-always-on; -- regulator-min-microvolt = <3000000>; -- regulator-max-microvolt = <3000000>; -- regulator-name = "vcc-3v0"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-3v3"; - }; - - ®_dcdc2 { --- -2.28.0 - From 12bb1887be9dc8ca88fccd4da4d8d9eaae561239 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 24 Aug 2020 17:04:34 +0200 @@ -97,53 +48,6 @@ index b782041e0e04..b82031b19893 100644 -- 2.28.0 -From 2933bf3528007f834fb7f5eab033f9c5b0683f91 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Sat, 22 Aug 2020 14:27:55 +0800 -Subject: [PATCH] arm64: dts: allwinner: h5: remove Mali GPU PMU module - -H5's Mali GPU PMU is not present or working corretly although -H5 datasheet record its interrupt vector. - -Adding this module will miss lead lima driver try to shutdown -it and get waiting timeout. This problem is not exposed before -lima runtime PM support is added. - -Fixes: bb39ed07e55b ("arm64: dts: allwinner: h5: Add device node for Mali-450 GPU") -Signed-off-by: Qiang Yu -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200822062755.534761-1-yuq825@gmail.com ---- - arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi -index 6735e316a39c..6c6053a18413 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi -@@ -139,8 +139,7 @@ mali: gpu@1e80000 { - , - , - , -- , -- ; -+ ; - interrupt-names = "gp", - "gpmmu", - "pp", -@@ -151,8 +150,7 @@ mali: gpu@1e80000 { - "pp2", - "ppmmu2", - "pp3", -- "ppmmu3", -- "pmu"; -+ "ppmmu3"; - clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_BUS_GPU>; --- -2.28.0 - From a3ba99a24b36bc4eee5413a820e2c4f3d81593fa Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 25 Aug 2020 15:10:49 +0200 @@ -664,86 +568,6 @@ index 98753f00df7e..5a91b548ecc0 100644 * v4l2_m2m_reqbufs() - multi-queue-aware REQBUFS multiplexer * -From 3aa91cc1cdd3ca25c6c224cb5ccd601f44943d5f Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Mon, 27 Jul 2020 19:05:37 +0200 -Subject: [PATCH] media: hantro: h264: Get the correct fallback reference - buffer - -If the bitstream and the application are incorrectly configuring -the reference pictures, the hardware will need to fallback -to using some other reference picture. - -When the post-processor is enabled, the fallback buffer -should be a shadow buffer (postproc.dec_q), and not a -CAPTURE queue buffer, since the latter is post-processed -and not really the output of the decoder core. - -Fixes: 8c2d66b036c77 ("media: hantro: Support color conversion via post-processing") -Signed-off-by: Ezequiel Garcia -Reviewed-by: Philipp Zabel -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 6d9e8cd0553bb03e8ab9d4d2d7d17f3fb639bd86) ---- - drivers/staging/media/hantro/hantro_h264.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c -index 194d05848077..6dcd47bd9ed3 100644 ---- a/drivers/staging/media/hantro/hantro_h264.c -+++ b/drivers/staging/media/hantro/hantro_h264.c -@@ -325,7 +325,7 @@ dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx, - */ - dst_buf = hantro_get_dst_buf(ctx); - buf = &dst_buf->vb2_buf; -- dma_addr = vb2_dma_contig_plane_dma_addr(buf, 0); -+ dma_addr = hantro_get_dec_buf_addr(ctx, buf); - } - - return dma_addr; - -From 53c9bdb74ce56398ee6b17fea317a784757c642b Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Mon, 27 Jul 2020 19:05:38 +0200 -Subject: [PATCH] media: hantro: postproc: Fix motion vector space allocation - -When the post-processor is enabled, the driver allocates -"shadow buffers" which are used for the decoder core, -and exposes the post-processed buffers to userspace. - -For this reason, extra motion vector space has to -be allocated on the shadow buffers, which the driver -wasn't doing. Fix it. - -This fix should address artifacts on high profile bitstreams. - -Fixes: 8c2d66b036c77 ("media: hantro: Support color conversion via post-processing") -Signed-off-by: Ezequiel Garcia -Reviewed-by: Philipp Zabel -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 669ccf19ed2059b9d517664a2dbbf6bde87e1414) ---- - drivers/staging/media/hantro/hantro_postproc.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c -index 44062ffceaea..6d2a8f2a8f0b 100644 ---- a/drivers/staging/media/hantro/hantro_postproc.c -+++ b/drivers/staging/media/hantro/hantro_postproc.c -@@ -118,7 +118,9 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) - unsigned int num_buffers = cap_queue->num_buffers; - unsigned int i, buf_size; - -- buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; -+ buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage + -+ hantro_h264_mv_size(ctx->dst_fmt.width, -+ ctx->dst_fmt.height); - - for (i = 0; i < num_buffers; ++i) { - struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; - From ea3a9782bc2717375bf236f11738c02d5148b8a8 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 25 Aug 2020 05:52:27 +0200 diff --git a/projects/Allwinner/patches/linux/0109-drm-shme-helpers-Fix-dma_buf_mmap-forwarding-bug.patch b/projects/Allwinner/patches/linux/0109-drm-shme-helpers-Fix-dma_buf_mmap-forwarding-bug.patch deleted file mode 100644 index cb30feeae4..0000000000 --- a/projects/Allwinner/patches/linux/0109-drm-shme-helpers-Fix-dma_buf_mmap-forwarding-bug.patch +++ /dev/null @@ -1,82 +0,0 @@ -commit 7dd307db3ce5c2de23eada9b8ba2272a470b27bd -Author: Daniel Vetter -Date: Tue Oct 27 22:17:48 2020 +0100 - - drm/shme-helpers: Fix dma_buf_mmap forwarding bug - - When we forward an mmap to the dma_buf exporter, they get to own - everything. Unfortunately drm_gem_mmap_obj() overwrote - vma->vm_private_data after the driver callback, wreaking the - exporter complete. This was noticed because vb2_common_vm_close blew - up on mali gpu with panfrost. - - Unfortunately drm_gem_mmap_obj also acquires a surplus reference that - we need to drop in shmem helpers, which is a bit of a mislayer - situation. Maybe the entire dma_buf_mmap forwarding should be pulled - into core gem code. - - Note that the only two other drivers which forward mmap in their own - code (etnaviv and exynos) get this somewhat right by overwriting the - gem mmap code. But they seem to still have the leak. This might be a - good excuse to move these drivers over to shmem helpers completely. - - Cc: Christian König - Cc: Sumit Semwal - Cc: Lucas Stach - Cc: Russell King - Cc: Christian Gmeiner - Cc: Inki Dae - Cc: Joonyoung Shim - Cc: Seung-Woo Kim - Cc: Kyungmin Park - Fixes: 26d3ac3cb04d ("drm/shmem-helpers: Redirect mmap for imported dma-buf") - Cc: Boris Brezillon - Cc: Thomas Zimmermann - Cc: Gerd Hoffmann - Cc: Rob Herring - Cc: dri-devel@lists.freedesktop.org - Cc: linux-media@vger.kernel.org - Cc: linaro-mm-sig@lists.linaro.org - Cc: # v5.9+ - Signed-off-by: Daniel Vetter - -diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c -index 1da67d34e55d..d586068f5509 100644 ---- a/drivers/gpu/drm/drm_gem.c -+++ b/drivers/gpu/drm/drm_gem.c -@@ -1076,6 +1076,8 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size, - */ - drm_gem_object_get(obj); - -+ vma->vm_private_data = obj; -+ - if (obj->funcs && obj->funcs->mmap) { - ret = obj->funcs->mmap(obj, vma); - if (ret) { -@@ -1096,8 +1098,6 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size, - vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot); - } - -- vma->vm_private_data = obj; -- - return 0; - } - EXPORT_SYMBOL(drm_gem_mmap_obj); -diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c b/drivers/gpu/drm/drm_gem_shmem_helper.c -index fb11df7aced5..8233bda4692f 100644 ---- a/drivers/gpu/drm/drm_gem_shmem_helper.c -+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c -@@ -598,8 +598,13 @@ int drm_gem_shmem_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) - /* Remove the fake offset */ - vma->vm_pgoff -= drm_vma_node_start(&obj->vma_node); - -- if (obj->import_attach) -+ if (obj->import_attach) { -+ /* Drop the reference drm_gem_mmap_obj() acquired.*/ -+ drm_gem_object_put(obj); -+ vma->vm_private_data = NULL; -+ - return dma_buf_mmap(obj->dma_buf, vma, 0); -+ } - - shmem = to_drm_gem_shmem_obj(obj); From 3a7eebfdc384b5a1c29cf21df336bf7f19ddf765 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 8 Nov 2020 23:26:57 +0100 Subject: [PATCH 3/3] Rockchip: Remove merged patches in Linux 5.9.6 --- .../linux-0001-rockchip-from-5.10.patch | 2 +- .../default/linux-0011-v4l2-from-5.10.patch | 80 --- .../default/linux-0021-drm-from-5.10.patch | 542 ------------------ 3 files changed, 1 insertion(+), 623 deletions(-) diff --git a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.10.patch b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.10.patch index 60bac1412f..e1b9d3fd21 100644 --- a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.10.patch +++ b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.10.patch @@ -1697,7 +1697,7 @@ index b333fc28c94b..e97fd3dfbae7 100644 unsigned long flags, spinlock_t *lock) { -- struct clk *clk; +- struct clk *clk = ERR_PTR(-ENOMEM); + struct clk_hw *hw; struct clk_mux *mux = NULL; struct clk_gate *gate = NULL; diff --git a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.10.patch b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.10.patch index 09f59e4bd8..d9f3118030 100644 --- a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.10.patch +++ b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.10.patch @@ -140,86 +140,6 @@ index 98753f00df7e..5a91b548ecc0 100644 * v4l2_m2m_reqbufs() - multi-queue-aware REQBUFS multiplexer * -From 3aa91cc1cdd3ca25c6c224cb5ccd601f44943d5f Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Mon, 27 Jul 2020 19:05:37 +0200 -Subject: [PATCH] media: hantro: h264: Get the correct fallback reference - buffer - -If the bitstream and the application are incorrectly configuring -the reference pictures, the hardware will need to fallback -to using some other reference picture. - -When the post-processor is enabled, the fallback buffer -should be a shadow buffer (postproc.dec_q), and not a -CAPTURE queue buffer, since the latter is post-processed -and not really the output of the decoder core. - -Fixes: 8c2d66b036c77 ("media: hantro: Support color conversion via post-processing") -Signed-off-by: Ezequiel Garcia -Reviewed-by: Philipp Zabel -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 6d9e8cd0553bb03e8ab9d4d2d7d17f3fb639bd86) ---- - drivers/staging/media/hantro/hantro_h264.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c -index 194d05848077..6dcd47bd9ed3 100644 ---- a/drivers/staging/media/hantro/hantro_h264.c -+++ b/drivers/staging/media/hantro/hantro_h264.c -@@ -325,7 +325,7 @@ dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx, - */ - dst_buf = hantro_get_dst_buf(ctx); - buf = &dst_buf->vb2_buf; -- dma_addr = vb2_dma_contig_plane_dma_addr(buf, 0); -+ dma_addr = hantro_get_dec_buf_addr(ctx, buf); - } - - return dma_addr; - -From 53c9bdb74ce56398ee6b17fea317a784757c642b Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Mon, 27 Jul 2020 19:05:38 +0200 -Subject: [PATCH] media: hantro: postproc: Fix motion vector space allocation - -When the post-processor is enabled, the driver allocates -"shadow buffers" which are used for the decoder core, -and exposes the post-processed buffers to userspace. - -For this reason, extra motion vector space has to -be allocated on the shadow buffers, which the driver -wasn't doing. Fix it. - -This fix should address artifacts on high profile bitstreams. - -Fixes: 8c2d66b036c77 ("media: hantro: Support color conversion via post-processing") -Signed-off-by: Ezequiel Garcia -Reviewed-by: Philipp Zabel -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 669ccf19ed2059b9d517664a2dbbf6bde87e1414) ---- - drivers/staging/media/hantro/hantro_postproc.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c -index 44062ffceaea..6d2a8f2a8f0b 100644 ---- a/drivers/staging/media/hantro/hantro_postproc.c -+++ b/drivers/staging/media/hantro/hantro_postproc.c -@@ -118,7 +118,9 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) - unsigned int num_buffers = cap_queue->num_buffers; - unsigned int i, buf_size; - -- buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; -+ buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage + -+ hantro_h264_mv_size(ctx->dst_fmt.width, -+ ctx->dst_fmt.height); - - for (i = 0; i < num_buffers; ++i) { - struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; - From ea3a9782bc2717375bf236f11738c02d5148b8a8 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Tue, 25 Aug 2020 05:52:27 +0200 diff --git a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.10.patch b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.10.patch index 8d832159a9..85b4b22d40 100644 --- a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.10.patch +++ b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.10.patch @@ -1194,56 +1194,6 @@ index f1474b961def..e6896733838a 100644 err = panfrost_reset_init(pfdev); if (err) { -From f2725e6b47a6e544e44c9af34c07179d14ed37e0 Mon Sep 17 00:00:00 2001 -From: Navid Emamdoost -Date: Sun, 14 Jun 2020 01:36:19 -0500 -Subject: [PATCH] drm/panfrost: perfcnt: fix ref count leak in - panfrost_perfcnt_enable_locked - -in panfrost_perfcnt_enable_locked, pm_runtime_get_sync is called which -increments the counter even in case of failure, leading to incorrect -ref count. In case of failure, decrement the ref count before returning. - -Acked-by: Alyssa Rosenzweig -Signed-off-by: Navid Emamdoost -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20200614063619.44944-1-navid.emamdoost@gmail.com -(cherry picked from commit 9df0e0c1889677175037445d5ad1654d54176369) ---- - drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c -index ec4695cf3caf..fdbc8d949135 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c -+++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c -@@ -83,11 +83,13 @@ static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev, - - ret = pm_runtime_get_sync(pfdev->dev); - if (ret < 0) -- return ret; -+ goto err_put_pm; - - bo = drm_gem_shmem_create(pfdev->ddev, perfcnt->bosize); -- if (IS_ERR(bo)) -- return PTR_ERR(bo); -+ if (IS_ERR(bo)) { -+ ret = PTR_ERR(bo); -+ goto err_put_pm; -+ } - - /* Map the perfcnt buf in the address space attached to file_priv. */ - ret = panfrost_gem_open(&bo->base, file_priv); -@@ -168,6 +170,8 @@ static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev, - panfrost_gem_close(&bo->base, file_priv); - err_put_bo: - drm_gem_object_put(&bo->base); -+err_put_pm: -+ pm_runtime_put(pfdev->dev); - return ret; - } - - From d54c64a7033c7d9a55ec3a455a93ccfa09ba9549 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Wed, 8 Jul 2020 16:08:36 +0200 @@ -1353,68 +1303,6 @@ index d41ce1de1067..e9a0f42ff99f 100644 static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi) -From e1f858bdf1dbb595e520830e8b51eebc25dc2d9e Mon Sep 17 00:00:00 2001 -From: Antonio Borneo -Date: Wed, 1 Jul 2020 21:42:34 +0200 -Subject: [PATCH] drm/bridge/synopsys: dsi: add support for non-continuous HS - clock - -Current code enables the HS clock when video mode is started or to -send out a HS command, and disables the HS clock to send out a LP -command. This is not what DSI spec specify. - -Enable HS clock either in command and in video mode. -Set automatic HS clock management for panels and devices that -support non-continuous HS clock. - -Signed-off-by: Antonio Borneo -Tested-by: Philippe Cornu -Reviewed-by: Philippe Cornu -Acked-by: Neil Armstrong -Signed-off-by: Neil Armstrong -Link: https://patchwork.freedesktop.org/patch/msgid/20200701194234.18123-1-yannick.fertre@st.com -(cherry picked from commit c6d94e37bdbb6dfe7e581e937a915ab58399b8a5) ---- - drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 9 +++++++-- - 1 file changed, 7 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c -index e9a0f42ff99f..8510a84c4c63 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c -@@ -375,7 +375,6 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, - if (lpm) - val |= CMD_MODE_ALL_LP; - -- dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); - dsi_write(dsi, DSI_CMD_MODE_CFG, val); - - val = dsi_read(dsi, DSI_VID_MODE_CFG); -@@ -558,16 +557,22 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) - static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, - unsigned long mode_flags) - { -+ u32 val; -+ - dsi_write(dsi, DSI_PWR_UP, RESET); - - if (mode_flags & MIPI_DSI_MODE_VIDEO) { - dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); - dw_mipi_dsi_video_mode_config(dsi); -- dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); - } else { - dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); - } - -+ val = PHY_TXREQUESTCLKHS; -+ if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) -+ val |= AUTO_CLKLANE_CTRL; -+ dsi_write(dsi, DSI_LPCLK_CTRL, val); -+ - dsi_write(dsi, DSI_PWR_UP, POWERUP); - } - - From b3ba2bd08c57aedc749e4f3e646b4b773147866b Mon Sep 17 00:00:00 2001 From: Angelo Ribeiro Date: Mon, 6 Apr 2020 15:49:03 +0200 @@ -2232,174 +2120,6 @@ index 9d2643f2d9e7..11fe9ff76fd5 100644 kfree(sgt); } -From 7fad7e58e92e242d6c9d4039882f315a21a2769b Mon Sep 17 00:00:00 2001 -From: Marek Szyprowski -Date: Tue, 28 Apr 2020 13:09:11 +0200 -Subject: [PATCH] drm: lima: fix common struct sg_table related issues - -The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function -returns the number of the created entries in the DMA address space. -However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and -dma_unmap_sg must be called with the original number of the entries -passed to the dma_map_sg(). - -struct sg_table is a common structure used for describing a non-contiguous -memory buffer, used commonly in the DRM and graphics subsystems. It -consists of a scatterlist with memory pages and DMA addresses (sgl entry), -as well as the number of scatterlist entries: CPU pages (orig_nents entry) -and DMA mapped pages (nents entry). - -It turned out that it was a common mistake to misuse nents and orig_nents -entries, calling DMA-mapping functions with a wrong number of entries or -ignoring the number of mapped entries returned by the dma_map_sg() -function. - -To avoid such issues, lets use a common dma-mapping wrappers operating -directly on the struct sg_table objects and use scatterlist page -iterators where possible. This, almost always, hides references to the -nents and orig_nents entries, making the code robust, easier to follow -and copy/paste safe. - -Signed-off-by: Marek Szyprowski -Reviewed-by: Qiang Yu -(cherry picked from commit c3d9c17f486d5c54940487dc31a54ebfdeeb371a) ---- - drivers/gpu/drm/lima/lima_gem.c | 11 ++++++++--- - drivers/gpu/drm/lima/lima_vm.c | 5 ++--- - 2 files changed, 10 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_gem.c b/drivers/gpu/drm/lima/lima_gem.c -index 155f2b4b4030..11223fe348df 100644 ---- a/drivers/gpu/drm/lima/lima_gem.c -+++ b/drivers/gpu/drm/lima/lima_gem.c -@@ -69,8 +69,7 @@ int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm) - return ret; - - if (bo->base.sgt) { -- dma_unmap_sg(dev, bo->base.sgt->sgl, -- bo->base.sgt->nents, DMA_BIDIRECTIONAL); -+ dma_unmap_sgtable(dev, bo->base.sgt, DMA_BIDIRECTIONAL, 0); - sg_free_table(bo->base.sgt); - } else { - bo->base.sgt = kmalloc(sizeof(*bo->base.sgt), GFP_KERNEL); -@@ -80,7 +79,13 @@ int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm) - } - } - -- dma_map_sg(dev, sgt.sgl, sgt.nents, DMA_BIDIRECTIONAL); -+ ret = dma_map_sgtable(dev, &sgt, DMA_BIDIRECTIONAL, 0); -+ if (ret) { -+ sg_free_table(&sgt); -+ kfree(bo->base.sgt); -+ bo->base.sgt = NULL; -+ return ret; -+ } - - *bo->base.sgt = sgt; - -diff --git a/drivers/gpu/drm/lima/lima_vm.c b/drivers/gpu/drm/lima/lima_vm.c -index 5b92fb82674a..2b2739adc7f5 100644 ---- a/drivers/gpu/drm/lima/lima_vm.c -+++ b/drivers/gpu/drm/lima/lima_vm.c -@@ -124,7 +124,7 @@ int lima_vm_bo_add(struct lima_vm *vm, struct lima_bo *bo, bool create) - if (err) - goto err_out1; - -- for_each_sg_dma_page(bo->base.sgt->sgl, &sg_iter, bo->base.sgt->nents, 0) { -+ for_each_sgtable_dma_page(bo->base.sgt, &sg_iter, 0) { - err = lima_vm_map_page(vm, sg_page_iter_dma_address(&sg_iter), - bo_va->node.start + offset); - if (err) -@@ -298,8 +298,7 @@ int lima_vm_map_bo(struct lima_vm *vm, struct lima_bo *bo, int pageoff) - mutex_lock(&vm->lock); - - base = bo_va->node.start + (pageoff << PAGE_SHIFT); -- for_each_sg_dma_page(bo->base.sgt->sgl, &sg_iter, -- bo->base.sgt->nents, pageoff) { -+ for_each_sgtable_dma_page(bo->base.sgt, &sg_iter, pageoff) { - err = lima_vm_map_page(vm, sg_page_iter_dma_address(&sg_iter), - base + offset); - if (err) - -From 995cbafa1bebfd7a85e32332fb2840213a51d2e0 Mon Sep 17 00:00:00 2001 -From: Marek Szyprowski -Date: Tue, 28 Apr 2020 13:09:35 +0200 -Subject: [PATCH] drm: panfrost: fix common struct sg_table related issues - -The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function -returns the number of the created entries in the DMA address space. -However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and -dma_unmap_sg must be called with the original number of the entries -passed to the dma_map_sg(). - -struct sg_table is a common structure used for describing a non-contiguous -memory buffer, used commonly in the DRM and graphics subsystems. It -consists of a scatterlist with memory pages and DMA addresses (sgl entry), -as well as the number of scatterlist entries: CPU pages (orig_nents entry) -and DMA mapped pages (nents entry). - -It turned out that it was a common mistake to misuse nents and orig_nents -entries, calling DMA-mapping functions with a wrong number of entries or -ignoring the number of mapped entries returned by the dma_map_sg() -function. - -To avoid such issues, lets use a common dma-mapping wrappers operating -directly on the struct sg_table objects and use scatterlist page -iterators where possible. This, almost always, hides references to the -nents and orig_nents entries, making the code robust, easier to follow -and copy/paste safe. - -Signed-off-by: Marek Szyprowski -Reviewed-by: Steven Price -Reviewed-by: Rob Herring -(cherry picked from commit 34a4e66faf8b22c8409cbd46839ba5e488b1e6a9) ---- - drivers/gpu/drm/panfrost/panfrost_gem.c | 4 ++-- - drivers/gpu/drm/panfrost/panfrost_mmu.c | 7 +++---- - 2 files changed, 5 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c -index 33355dd302f1..1a6cea0e0bd7 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gem.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gem.c -@@ -41,8 +41,8 @@ static void panfrost_gem_free_object(struct drm_gem_object *obj) - - for (i = 0; i < n_sgt; i++) { - if (bo->sgts[i].sgl) { -- dma_unmap_sg(pfdev->dev, bo->sgts[i].sgl, -- bo->sgts[i].nents, DMA_BIDIRECTIONAL); -+ dma_unmap_sgtable(pfdev->dev, &bo->sgts[i], -+ DMA_BIDIRECTIONAL, 0); - sg_free_table(&bo->sgts[i]); - } - } -diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c -index e8f7b11352d2..776448c527ea 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_mmu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c -@@ -253,7 +253,7 @@ static int mmu_map_sg(struct panfrost_device *pfdev, struct panfrost_mmu *mmu, - struct io_pgtable_ops *ops = mmu->pgtbl_ops; - u64 start_iova = iova; - -- for_each_sg(sgt->sgl, sgl, sgt->nents, count) { -+ for_each_sgtable_dma_sg(sgt, sgl, count) { - unsigned long paddr = sg_dma_address(sgl); - size_t len = sg_dma_len(sgl); - -@@ -517,10 +517,9 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as, - if (ret) - goto err_pages; - -- if (!dma_map_sg(pfdev->dev, sgt->sgl, sgt->nents, DMA_BIDIRECTIONAL)) { -- ret = -EINVAL; -+ ret = dma_map_sgtable(pfdev->dev, sgt, DMA_BIDIRECTIONAL, 0); -+ if (ret) - goto err_map; -- } - - mmu_map_sg(pfdev, bomapping->mmu, addr, - IOMMU_WRITE | IOMMU_READ | IOMMU_NOEXEC, sgt); - From 03fcee5f1d9c78e00f2000cf87843020c5fb1634 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Thu, 30 Apr 2020 14:02:47 +0200 @@ -2580,50 +2300,6 @@ index e0f190e43813..eea049c640a6 100644 irq = platform_get_irq_byname(to_platform_device(pfdev->dev), "gpu"); if (irq <= 0) -From cba1b5eaf367a82a44b3c2ef2e98c755a229d6cd Mon Sep 17 00:00:00 2001 -From: Steven Price -Date: Wed, 9 Sep 2020 13:29:57 +0100 -Subject: [PATCH] drm/panfrost: Ensure GPU quirks are always initialised - -The GPU 'CONFIG' registers used to work around hardware issues are -cleared on reset so need to be programmed every time the GPU is reset. -However panfrost_device_reset() failed to do this. - -To avoid this in future instead move the call to -panfrost_gpu_init_quirks() to panfrost_gpu_power_on() so that the -regsiters are always programmed just before the cores are powered. - -Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver") -Signed-off-by: Steven Price -Reviewed-by: Alyssa Rosenzweig -Link: https://patchwork.freedesktop.org/patch/msgid/20200909122957.51667-1-steven.price@arm.com -(cherry picked from commit 8c3c818c23a5bbce6ff180dd2ee04415241df77c) ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index eea049c640a6..c7c5da5a31d4 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -305,6 +305,8 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev) - int ret; - u32 val; - -+ panfrost_gpu_init_quirks(pfdev); -+ - /* Just turn on everything for now */ - gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present); - ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO, -@@ -357,7 +359,6 @@ int panfrost_gpu_init(struct panfrost_device *pfdev) - return err; - } - -- panfrost_gpu_init_quirks(pfdev); - panfrost_gpu_power_on(pfdev); - - return 0; - From 99d273baa069a7838597fdd601e01248d12c2fd1 Mon Sep 17 00:00:00 2001 From: Alex Dewar Date: Wed, 9 Sep 2020 20:02:08 +0100 @@ -2733,221 +2409,3 @@ index b0e390b3288e..bda8aa7c2280 100644 }; struct dw_mipi_dsi_host_ops { - -From c8e0416624b180c61a1f76bb5fa8dc41eb99bd51 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 16 Sep 2020 17:01:45 +0200 -Subject: [PATCH] drm/panfrost: add support for vendor quirk - -The T820, G31 & G52 GPUs integrated by Amlogic in the respective GXM, -G12A/SM1 & G12B SoCs needs a quirk in the PWR registers after each reset. - -This adds a callback in the device compatible struct of permit this. - -Signed-off-by: Neil Armstrong -[Steven: Fix typo in commit log] -Reviewed-by: Steven Price -Reviewed-by: Alyssa Rosenzweig -Signed-off-by: Steven Price -Link: https://patchwork.freedesktop.org/patch/msgid/20200916150147.25753-2-narmstrong@baylibre.com -(cherry picked from commit 91e89097b86f566636ea5a7329c79d5521be46d2) ---- - drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++ - drivers/gpu/drm/panfrost/panfrost_gpu.c | 4 ++++ - 2 files changed, 7 insertions(+) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h -index 953f7536a773..2e9cbd1c4a58 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.h -+++ b/drivers/gpu/drm/panfrost/panfrost_device.h -@@ -70,6 +70,9 @@ struct panfrost_compatible { - int num_pm_domains; - /* Only required if num_pm_domains > 1. */ - const char * const *pm_domain_names; -+ -+ /* Vendor implementation quirks callback */ -+ void (*vendor_quirk)(struct panfrost_device *pfdev); - }; - - struct panfrost_device { -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index c7c5da5a31d4..a6de78bc1fa8 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -136,6 +136,10 @@ static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev) - - if (quirks) - gpu_write(pfdev, GPU_JM_CONFIG, quirks); -+ -+ /* Here goes platform specific quirks */ -+ if (pfdev->comp->vendor_quirk) -+ pfdev->comp->vendor_quirk(pfdev); - } - - #define MAX_HW_REVS 6 - -From 97e90d721491430f0af4a40236365a3a583ff4e3 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 16 Sep 2020 17:01:46 +0200 -Subject: [PATCH] drm/panfrost: add amlogic reset quirk callback - -The T820, G31 & G52 GPUs integrated by Amlogic in the respective GXM, -G12A/SM1 & G12B SoCs needs a quirk in the PWR registers at the GPU reset -time. - -Since the Amlogic's integration of the GPU cores with the SoC is not -publicly documented we do not know what does these values, but they -permit having a fully functional GPU running with Panfrost. - -Signed-off-by: Neil Armstrong -[Steven: Fix typo in commit log] -Reviewed-by: Steven Price -Reviewed-by: Alyssa Rosenzweig -Signed-off-by: Steven Price -Link: https://patchwork.freedesktop.org/patch/msgid/20200916150147.25753-3-narmstrong@baylibre.com -(cherry picked from commit 110003002291525bb209f47e6dbf121a63249a97) ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 11 +++++++++++ - drivers/gpu/drm/panfrost/panfrost_gpu.h | 2 ++ - drivers/gpu/drm/panfrost/panfrost_regs.h | 4 ++++ - 3 files changed, 17 insertions(+) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index a6de78bc1fa8..e1b2a3376624 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -76,6 +76,17 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev) - return 0; - } - -+void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev) -+{ -+ /* -+ * The Amlogic integrated Mali-T820, Mali-G31 & Mali-G52 needs -+ * these undocumented bits in GPU_PWR_OVERRIDE1 to be set in order -+ * to operate correctly. -+ */ -+ gpu_write(pfdev, GPU_PWR_KEY, GPU_PWR_KEY_UNLOCK); -+ gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16)); -+} -+ - static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev) - { - u32 quirks = 0; -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.h b/drivers/gpu/drm/panfrost/panfrost_gpu.h -index 4112412087b2..468c51e7e46d 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.h -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.h -@@ -16,4 +16,6 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev); - void panfrost_gpu_power_on(struct panfrost_device *pfdev); - void panfrost_gpu_power_off(struct panfrost_device *pfdev); - -+void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev); -+ - #endif -diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h -index ea38ac60581c..eddaa62ad8b0 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_regs.h -+++ b/drivers/gpu/drm/panfrost/panfrost_regs.h -@@ -51,6 +51,10 @@ - #define GPU_STATUS 0x34 - #define GPU_STATUS_PRFCNT_ACTIVE BIT(2) - #define GPU_LATEST_FLUSH_ID 0x38 -+#define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */ -+#define GPU_PWR_KEY_UNLOCK 0x2968A819 -+#define GPU_PWR_OVERRIDE0 0x54 /* (RW) Power manager override settings */ -+#define GPU_PWR_OVERRIDE1 0x58 /* (RW) Power manager override settings */ - #define GPU_FAULT_STATUS 0x3C - #define GPU_FAULT_ADDRESS_LO 0x40 - #define GPU_FAULT_ADDRESS_HI 0x44 - -From 30ea0948011c753827c9aad069a081b80892fbbb Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 16 Sep 2020 17:01:47 +0200 -Subject: [PATCH] drm/panfrost: add Amlogic GPU integration quirks - -This adds the required GPU quirks, including the quirk in the PWR -registers at the GPU reset time and the IOMMU quirk for shareability -issues observed on G52 in Amlogic G12B SoCs. - -Signed-off-by: Neil Armstrong -Reviewed-by: Steven Price -Reviewed-by: Alyssa Rosenzweig -Signed-off-by: Steven Price -Link: https://patchwork.freedesktop.org/patch/msgid/20200916150147.25753-4-narmstrong@baylibre.com -(cherry picked from commit afcd0c7d3d4c22afc8befcfc906db6ce3058d3ee) ---- - drivers/gpu/drm/panfrost/panfrost_drv.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c -index 36463c89e966..37d4cb7a5491 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_drv.c -+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c -@@ -656,7 +656,18 @@ static const struct panfrost_compatible default_data = { - .pm_domain_names = NULL, - }; - -+static const struct panfrost_compatible amlogic_data = { -+ .num_supplies = ARRAY_SIZE(default_supplies), -+ .supply_names = default_supplies, -+ .vendor_quirk = panfrost_gpu_amlogic_quirk, -+}; -+ - static const struct of_device_id dt_match[] = { -+ /* Set first to probe before the generic compatibles */ -+ { .compatible = "amlogic,meson-gxm-mali", -+ .data = &amlogic_data, }, -+ { .compatible = "amlogic,meson-g12a-mali", -+ .data = &amlogic_data, }, - { .compatible = "arm,mali-t604", .data = &default_data, }, - { .compatible = "arm,mali-t624", .data = &default_data, }, - { .compatible = "arm,mali-t628", .data = &default_data, }, - -From 769f4cb43c91ab3090c23986f9cb57b016887642 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Thu, 8 Oct 2020 14:17:38 +0000 -Subject: [PATCH] drm/panfrost: increase readl_relaxed_poll_timeout values - -Amlogic SoC devices report the following errors frequently causing excessive -dmesg log spam and early log rotataion, although the errors appear to be -harmless as everything works fine: - -[ 7.202702] panfrost ffe40000.gpu: error powering up gpu L2 -[ 7.203760] panfrost ffe40000.gpu: error powering up gpu shader - -ARM staff have advised increasing the timeout values to eliminate the errors -in most normal scenarios, and testing with several different G31/G52 devices -shows 20000 to be a reliable value. - -Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver") -Suggested-by: Steven Price -Signed-off-by: Christian Hewitt -Reviewed-by: Steven Price -Signed-off-by: Steven Price -Link: https://patchwork.freedesktop.org/patch/msgid/20201008141738.13560-1-christianshewitt@gmail.com -(cherry picked from commit c2df75ad2a9f205820e4bc0db936d3d9af3da1ae) ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index e1b2a3376624..2aae636f1cf5 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -325,13 +325,13 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev) - /* Just turn on everything for now */ - gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present); - ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO, -- val, val == pfdev->features.l2_present, 100, 1000); -+ val, val == pfdev->features.l2_present, 100, 20000); - if (ret) - dev_err(pfdev->dev, "error powering up gpu L2"); - - gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present); - ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO, -- val, val == pfdev->features.shader_present, 100, 1000); -+ val, val == pfdev->features.shader_present, 100, 20000); - if (ret) - dev_err(pfdev->dev, "error powering up gpu shader"); -