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Allwinner: u-boot: Fix DRAM size detection for H6

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This commit is contained in:
Jernej Skrabec 2023-10-09 22:16:25 +02:00
parent 6cddae6dee
commit 86074bd1a2
2 changed files with 46 additions and 40 deletions
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46
projects/Allwinner/patches/u-boot/0014-sunxi-dram-Fix-incorrect-ram-size-detection-for-some-H6-boards.patch Normal file
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@ -0,0 +1,46 @@
From: Gunjan Gupta <viraniac@gmail.com>
Subject: [PATCH 1/1] sunxi: dram: Fix incorrect ram size detection for some H6
boards
Date: Sun, 1 Oct 2023 21:43:32 +0530
On some H6 boards like Orange Pi 3 LTS, some times U-Boot fails to detect
ram size correctly. Instead of 2GB thats available, it detects 4GB of ram
and then SPL just hangs there making board not to boot further.
On debugging, I found that the rows value were being determined correctly,
but columns were sometimes off by one value. I found that adding some
delay after the mctl_core_init call along with making use of dsb in the
start of the mctl_mem_matches solves the issue.
Signed-off-by: Gunjan Gupta <viraniac@gmail.com>
---
arch/arm/mach-sunxi/dram_helpers.c | 1 +
arch/arm/mach-sunxi/dram_sun50i_h6.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
index cdf2750f1c..5758c58e07 100644
--- a/arch/arm/mach-sunxi/dram_helpers.c
+++ b/arch/arm/mach-sunxi/dram_helpers.c
@@ -32,6 +32,7 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
#ifndef CONFIG_MACH_SUNIV
bool mctl_mem_matches(u32 offset)
{
+ dsb();
/* Try to write different values to RAM at two addresses */
writel(0, CFG_SYS_SDRAM_BASE);
writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset);
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
index bff2e42513..a031a845f5 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
@@ -623,6 +623,8 @@ static void mctl_auto_detect_dram_size(struct dram_para *para)
para->cols = 11;
mctl_core_init(para);
+ udelay(50);
+
for (para->cols = 8; para->cols < 11; para->cols++) {
/* 8 bits per byte and 16/32 bit width */
if (mctl_mem_matches(1 << (para->cols + 1 +

40
projects/Allwinner/patches/u-boot/0014-unreliable-dram.patch
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@ -1,40 +0,0 @@
From: megous@megous.com
Date: Mon, 29 Jul 2019 01:39:42 +0200
Subject: [U-Boot] [PATCH] Fix unreliable detection of DRAM size on Orange Pi 3
From: Ondrej Jirman <megous@megous.com>
Orange Pi 3 has 2 GiB of DRAM, that sometime get misdetected
as 4 GiB, due to false negative result from mctl_mem_matches()
when detecting number of column address bits. This leads to
u-boot detecting more address bits than there are and the
boot process hangs shortly after.
In mctl_mem_matches() we need to wait for each write to finish,
separately. Without this, the check is not reliable for some
unknown reason, probably having to do with unpredictable memory
access ordering.
Patch was made with help from André Przywara, who noticed that
my original idea about detection failing due to read-back from
cache without involving DRAM was false, because data cache is
still of at the time of the DRAM size autodetection.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Cc: André Przywara <andre.przywara@arm.com>
---
arch/arm/mach-sunxi/dram_helpers.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
index 239ab421a8..6dba448638 100644
--- a/arch/arm/mach-sunxi/dram_helpers.c
+++ b/arch/arm/mach-sunxi/dram_helpers.c
@@ -30,6 +30,7 @@ bool mctl_mem_matches(u32 offset)
{
/* Try to write different values to RAM at two addresses */
writel(0, CONFIG_SYS_SDRAM_BASE);
+ dsb();
writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset);
dsb();
/* Check if the same value is actually observed when reading back */