mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
synced 2025-07-28 05:06:43 +00:00
amlogic_cec: bug fixes and clean ups
This commit is contained in:
parent
610e9bfeea
commit
8678f43f55
@ -55,10 +55,10 @@ index 7a944cd..f74ec1f 100755
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#EXTRA_CFLAGS += -O2
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#EXTRA_CFLAGS += -O2
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diff --git a/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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diff --git a/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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new file mode 100644
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new file mode 100644
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index 0000000..b749b29
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index 0000000..7d8992a
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--- /dev/null
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--- /dev/null
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+++ b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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+++ b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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@@ -0,0 +1,647 @@
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@@ -0,0 +1,603 @@
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+/* linux/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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+/* linux/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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+ *
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+ *
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+ * Copyright (c) 2016 Gerald Dachs
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+ * Copyright (c) 2016 Gerald Dachs
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@ -119,7 +119,7 @@ index 0000000..b749b29
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+#define CEC_IOC_SETLADDR _IOW(CEC_IOC_MAGIC, 0, unsigned int)
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+#define CEC_IOC_SETLADDR _IOW(CEC_IOC_MAGIC, 0, unsigned int)
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+#define CEC_IOC_GETPADDR _IO(CEC_IOC_MAGIC, 1)
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+#define CEC_IOC_GETPADDR _IO(CEC_IOC_MAGIC, 1)
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+
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+
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+#define VERSION "1.0" /* Driver version number */
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+#define VERSION "0.0.1" /* Driver version number */
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+#define CEC_MINOR 243 /* Major 10, Minor 242, /dev/cec */
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+#define CEC_MINOR 243 /* Major 10, Minor 242, /dev/cec */
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+
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+
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+/* CEC Rx buffer size */
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+/* CEC Rx buffer size */
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@ -154,7 +154,7 @@ index 0000000..b749b29
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+};
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+};
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+
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+
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+static char banner[] __initdata =
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+static char banner[] __initdata =
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+ "Amlogic CEC Driver, (c) 2016 Gerald Dachs\n";
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+ "Amlogic CEC Driver, (c) 2016 Gerald Dachs";
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+
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+
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+static struct cec_rx_struct cec_rx_struct;
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+static struct cec_rx_struct cec_rx_struct;
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+
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+
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@ -165,9 +165,6 @@ index 0000000..b749b29
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+cec_global_info_t cec_global_info;
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+cec_global_info_t cec_global_info;
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+
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+
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+static hdmitx_dev_t* hdmitx_device = NULL;
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+static hdmitx_dev_t* hdmitx_device = NULL;
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+static struct workqueue_struct *cec_workqueue = NULL;
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+
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+static int cec_init_flag = 0;
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+
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+
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+static void amlogic_cec_set_rx_state(enum cec_state state)
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+static void amlogic_cec_set_rx_state(enum cec_state state)
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+{
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+{
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@ -243,17 +240,17 @@ index 0000000..b749b29
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+ data[i]= amlogic_cec_read_reg(CEC_RX_MSG_0_HEADER + i);
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+ data[i]= amlogic_cec_read_reg(CEC_RX_MSG_0_HEADER + i);
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+ }
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+ }
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+
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+
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+ amlogic_cec_msg_dump("RX", data, *count);
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+
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+ ret = RX_DONE;
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+ ret = RX_DONE;
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+ }
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+ }
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+
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+
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+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
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+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_ACK_CURRENT);
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+ aml_write_reg32(P_AO_CEC_INTR_CLR, aml_read_reg32(P_AO_CEC_INTR_CLR) | (1 << 2));
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+#endif
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+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_ACK_NEXT);
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+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_NO_OP);
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+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_NO_OP);
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+
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+
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+ if (valid_msg)
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+ {
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+ amlogic_cec_msg_dump("RX", data, *count);
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+ }
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+
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+ return ret;
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+ return ret;
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+}
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+}
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+
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+
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@ -430,15 +427,6 @@ index 0000000..b749b29
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+
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+
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+ amlogic_cec_set_tx_state(STATE_TX);
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+ amlogic_cec_set_tx_state(STATE_TX);
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+
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+
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+ // just for the case that the first write starts
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+ // before the end of amlogic_cec_delayed_init()
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+ if (wait_event_interruptible(cec_tx_struct.waitq, hdmitx_device->cec_init_ready == 1))
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+ {
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+ amlogic_cec_log_dbg("error during wait on state change\n");
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+ printk(KERN_ERR "[amlogic] ##### cec write error! #####\n");
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+ return -ERESTARTSYS;
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+ }
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+
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+ amlogic_cec_write_hw(data, count);
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+ amlogic_cec_write_hw(data, count);
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+
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+
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+ if (wait_event_interruptible_timeout(cec_tx_struct.waitq,
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+ if (wait_event_interruptible_timeout(cec_tx_struct.waitq,
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@ -580,58 +568,12 @@ index 0000000..b749b29
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+ return IRQ_HANDLED;
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+ return IRQ_HANDLED;
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+}
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+}
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+
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+
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+static void amlogic_cec_delayed_init(struct work_struct *work)
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+{
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+ hdmitx_dev_t* hdmitx_device = (hdmitx_dev_t*)container_of(work, hdmitx_dev_t, cec_work);
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+
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+ amlogic_cec_log_dbg("amlogic_cec_delayed_init: enter\n");
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+
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+ msleep_interruptible(5000);
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+
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+ cec_init_flag = 1;
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+
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+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
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+ cec_gpi_init();
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+#endif
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+
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+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
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+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 25, 1);
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+ // Clear CEC Int. state and set CEC Int. mask
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+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR) | (1 << 23)); // Clear the interrupt
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+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) | (1 << 23)); // Enable the hdmi cec interrupt
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+
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+#endif
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+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
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+#if 1 // Please match with H/W cec config
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+// GPIOAO_12
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+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 0, 14, 1); // bit[14]: AO_PWM_C pinmux //0xc8100014
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+ aml_set_reg32_bits(P_AO_RTI_PULL_UP_REG, 1, 12, 1); // bit[12]: enable AO_12 internal pull-up //0xc810002c
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+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 1, 17, 1); // bit[17]: AO_CEC pinmux //0xc8100014
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+ ao_cec_init();
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+#else
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+// GPIOH_3
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+ aml_set_reg32_bits(P_PAD_PULL_UP_EN_REG1, 0, 19, 1); // disable gpioh_3 internal pull-up
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+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 23, 1); // gpioh_3 cec pinmux
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+#endif
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+ cec_arbit_bit_time_set(3, 0x118, 0);
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+ cec_arbit_bit_time_set(5, 0x000, 0);
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+ cec_arbit_bit_time_set(7, 0x2aa, 0);
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+#endif
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+
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+ cec_init_flag = 0;
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+
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+ hdmitx_device->cec_init_ready = 1;
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+ wake_up_interruptible(&cec_tx_struct.waitq);
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+
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+ amlogic_cec_log_dbg("amlogic_cec_delayed_init: leave\n");
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+}
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+
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+static int amlogic_cec_init(void)
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+static int amlogic_cec_init(void)
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+{
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+{
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+ extern hdmitx_dev_t * get_hdmitx_device(void);
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+ extern hdmitx_dev_t * get_hdmitx_device(void);
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+ INIT_LIST_HEAD(&cec_rx_struct.list);
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+ INIT_LIST_HEAD(&cec_rx_struct.list);
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+
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+
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+ printk(banner);
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+ printk("%s, Version: %s\n", banner, VERSION);
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+
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+
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+ hdmitx_device = get_hdmitx_device();
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+ hdmitx_device = get_hdmitx_device();
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+ amlogic_cec_log_dbg("CEC init\n");
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+ amlogic_cec_log_dbg("CEC init\n");
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@ -671,14 +613,35 @@ index 0000000..b749b29
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+ return -EBUSY;
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+ return -EBUSY;
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+ }
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+ }
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+
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+
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+ cec_workqueue = create_workqueue("cec_work");
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+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
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+ if (cec_workqueue == NULL)
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+ cec_gpi_init();
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+ {
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+#endif
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+ printk("create work queue failed\n");
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+
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+ return -EFAULT;
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+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
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+ }
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+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 25, 1);
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+ INIT_WORK(&hdmitx_device->cec_work, amlogic_cec_delayed_init);
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+ // Clear CEC Int. state and set CEC Int. mask
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+ queue_work(cec_workqueue, &hdmitx_device->cec_work); // for init
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+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR) | (1 << 23)); // Clear the interrupt
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+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) | (1 << 23)); // Enable the hdmi cec interrupt
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+
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+#endif
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+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
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+#if 1 // Please match with H/W cec config
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+// GPIOAO_12
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+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 0, 14, 1); // bit[14]: AO_PWM_C pinmux //0xc8100014
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+ aml_set_reg32_bits(P_AO_RTI_PULL_UP_REG, 1, 12, 1); // bit[12]: enable AO_12 internal pull-up //0xc810002c
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+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 1, 17, 1); // bit[17]: AO_CEC pinmux //0xc8100014
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+ ao_cec_init();
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+#else
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+// GPIOH_3
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+ aml_set_reg32_bits(P_PAD_PULL_UP_EN_REG1, 0, 19, 1); // disable gpioh_3 internal pull-up
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+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 23, 1); // gpioh_3 cec pinmux
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+#endif
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+ cec_arbit_bit_time_set(3, 0x118, 0);
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+ cec_arbit_bit_time_set(5, 0x000, 0);
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+ cec_arbit_bit_time_set(7, 0x2aa, 0);
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+#endif
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+
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+ hdmitx_device->cec_init_ready = 1;
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+
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+
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+ amlogic_cec_log_dbg("hdmitx_device->cec_init_ready:0x%x\n", hdmitx_device->cec_init_ready);
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+ amlogic_cec_log_dbg("hdmitx_device->cec_init_ready:0x%x\n", hdmitx_device->cec_init_ready);
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+
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+
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@ -687,9 +650,6 @@ index 0000000..b749b29
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+
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+
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+static void amlogic_cec_exit(void)
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+static void amlogic_cec_exit(void)
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+{
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+{
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+ if (cec_init_flag == 1)
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+ {
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+
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+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
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+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
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+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) & ~(1 << 23)); // Disable the hdmi cec interrupt
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+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) & ~(1 << 23)); // Disable the hdmi cec interrupt
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+ free_irq(INT_HDMI_CEC, (void *)hdmitx_device);
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+ free_irq(INT_HDMI_CEC, (void *)hdmitx_device);
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@ -697,15 +657,11 @@ index 0000000..b749b29
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+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
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+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
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+ free_irq(INT_AO_CEC, (void *)hdmitx_device);
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+ free_irq(INT_AO_CEC, (void *)hdmitx_device);
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+#endif
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+#endif
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+ cec_init_flag = 0;
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+ }
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+
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+ misc_deregister(&cec_misc_device);
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+ misc_deregister(&cec_misc_device);
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+}
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+}
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+
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+
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+module_init(amlogic_cec_init);
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+module_init(amlogic_cec_init);
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+module_exit(amlogic_cec_exit);
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+module_exit(amlogic_cec_exit);
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+
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diff --git a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c b/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
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diff --git a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c b/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
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index 3e043bc..2b11c72 100755
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index 3e043bc..2b11c72 100755
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--- a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
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--- a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
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@ -55,10 +55,10 @@ index 7a944cd..f74ec1f 100755
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#EXTRA_CFLAGS += -O2
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#EXTRA_CFLAGS += -O2
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diff --git a/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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diff --git a/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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new file mode 100644
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new file mode 100644
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index 0000000..b749b29
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index 0000000..7d8992a
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--- /dev/null
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--- /dev/null
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+++ b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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+++ b/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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@@ -0,0 +1,647 @@
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@@ -0,0 +1,603 @@
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+/* linux/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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+/* linux/drivers/amlogic/hdmi/hdmi_tx/amlogic_cec.c
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+ *
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+ *
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+ * Copyright (c) 2016 Gerald Dachs
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+ * Copyright (c) 2016 Gerald Dachs
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@ -119,7 +119,7 @@ index 0000000..b749b29
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+#define CEC_IOC_SETLADDR _IOW(CEC_IOC_MAGIC, 0, unsigned int)
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+#define CEC_IOC_SETLADDR _IOW(CEC_IOC_MAGIC, 0, unsigned int)
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+#define CEC_IOC_GETPADDR _IO(CEC_IOC_MAGIC, 1)
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+#define CEC_IOC_GETPADDR _IO(CEC_IOC_MAGIC, 1)
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+
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+
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+#define VERSION "1.0" /* Driver version number */
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+#define VERSION "0.0.1" /* Driver version number */
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+#define CEC_MINOR 243 /* Major 10, Minor 242, /dev/cec */
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+#define CEC_MINOR 243 /* Major 10, Minor 242, /dev/cec */
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+
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+
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+/* CEC Rx buffer size */
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+/* CEC Rx buffer size */
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@ -154,7 +154,7 @@ index 0000000..b749b29
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+};
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+};
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+
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+
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+static char banner[] __initdata =
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+static char banner[] __initdata =
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+ "Amlogic CEC Driver, (c) 2016 Gerald Dachs\n";
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+ "Amlogic CEC Driver, (c) 2016 Gerald Dachs";
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+
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+
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+static struct cec_rx_struct cec_rx_struct;
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+static struct cec_rx_struct cec_rx_struct;
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+
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+
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@ -165,9 +165,6 @@ index 0000000..b749b29
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+cec_global_info_t cec_global_info;
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+cec_global_info_t cec_global_info;
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+
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+
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+static hdmitx_dev_t* hdmitx_device = NULL;
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+static hdmitx_dev_t* hdmitx_device = NULL;
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+static struct workqueue_struct *cec_workqueue = NULL;
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+
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+static int cec_init_flag = 0;
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+
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+
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+static void amlogic_cec_set_rx_state(enum cec_state state)
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+static void amlogic_cec_set_rx_state(enum cec_state state)
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+{
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+{
|
||||||
@ -243,17 +240,17 @@ index 0000000..b749b29
|
|||||||
+ data[i]= amlogic_cec_read_reg(CEC_RX_MSG_0_HEADER + i);
|
+ data[i]= amlogic_cec_read_reg(CEC_RX_MSG_0_HEADER + i);
|
||||||
+ }
|
+ }
|
||||||
+
|
+
|
||||||
+ amlogic_cec_msg_dump("RX", data, *count);
|
|
||||||
+
|
|
||||||
+ ret = RX_DONE;
|
+ ret = RX_DONE;
|
||||||
+ }
|
+ }
|
||||||
+
|
+
|
||||||
+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
|
+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_ACK_CURRENT);
|
||||||
+ aml_write_reg32(P_AO_CEC_INTR_CLR, aml_read_reg32(P_AO_CEC_INTR_CLR) | (1 << 2));
|
|
||||||
+#endif
|
|
||||||
+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_ACK_NEXT);
|
|
||||||
+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_NO_OP);
|
+ amlogic_cec_write_reg(CEC_RX_MSG_CMD, RX_NO_OP);
|
||||||
+
|
+
|
||||||
|
+ if (valid_msg)
|
||||||
|
+ {
|
||||||
|
+ amlogic_cec_msg_dump("RX", data, *count);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
+ return ret;
|
+ return ret;
|
||||||
+}
|
+}
|
||||||
+
|
+
|
||||||
@ -430,15 +427,6 @@ index 0000000..b749b29
|
|||||||
+
|
+
|
||||||
+ amlogic_cec_set_tx_state(STATE_TX);
|
+ amlogic_cec_set_tx_state(STATE_TX);
|
||||||
+
|
+
|
||||||
+ // just for the case that the first write starts
|
|
||||||
+ // before the end of amlogic_cec_delayed_init()
|
|
||||||
+ if (wait_event_interruptible(cec_tx_struct.waitq, hdmitx_device->cec_init_ready == 1))
|
|
||||||
+ {
|
|
||||||
+ amlogic_cec_log_dbg("error during wait on state change\n");
|
|
||||||
+ printk(KERN_ERR "[amlogic] ##### cec write error! #####\n");
|
|
||||||
+ return -ERESTARTSYS;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ amlogic_cec_write_hw(data, count);
|
+ amlogic_cec_write_hw(data, count);
|
||||||
+
|
+
|
||||||
+ if (wait_event_interruptible_timeout(cec_tx_struct.waitq,
|
+ if (wait_event_interruptible_timeout(cec_tx_struct.waitq,
|
||||||
@ -580,58 +568,12 @@ index 0000000..b749b29
|
|||||||
+ return IRQ_HANDLED;
|
+ return IRQ_HANDLED;
|
||||||
+}
|
+}
|
||||||
+
|
+
|
||||||
+static void amlogic_cec_delayed_init(struct work_struct *work)
|
|
||||||
+{
|
|
||||||
+ hdmitx_dev_t* hdmitx_device = (hdmitx_dev_t*)container_of(work, hdmitx_dev_t, cec_work);
|
|
||||||
+
|
|
||||||
+ amlogic_cec_log_dbg("amlogic_cec_delayed_init: enter\n");
|
|
||||||
+
|
|
||||||
+ msleep_interruptible(5000);
|
|
||||||
+
|
|
||||||
+ cec_init_flag = 1;
|
|
||||||
+
|
|
||||||
+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
|
|
||||||
+ cec_gpi_init();
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
|
|
||||||
+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 25, 1);
|
|
||||||
+ // Clear CEC Int. state and set CEC Int. mask
|
|
||||||
+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR) | (1 << 23)); // Clear the interrupt
|
|
||||||
+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) | (1 << 23)); // Enable the hdmi cec interrupt
|
|
||||||
+
|
|
||||||
+#endif
|
|
||||||
+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
|
|
||||||
+#if 1 // Please match with H/W cec config
|
|
||||||
+// GPIOAO_12
|
|
||||||
+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 0, 14, 1); // bit[14]: AO_PWM_C pinmux //0xc8100014
|
|
||||||
+ aml_set_reg32_bits(P_AO_RTI_PULL_UP_REG, 1, 12, 1); // bit[12]: enable AO_12 internal pull-up //0xc810002c
|
|
||||||
+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 1, 17, 1); // bit[17]: AO_CEC pinmux //0xc8100014
|
|
||||||
+ ao_cec_init();
|
|
||||||
+#else
|
|
||||||
+// GPIOH_3
|
|
||||||
+ aml_set_reg32_bits(P_PAD_PULL_UP_EN_REG1, 0, 19, 1); // disable gpioh_3 internal pull-up
|
|
||||||
+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 23, 1); // gpioh_3 cec pinmux
|
|
||||||
+#endif
|
|
||||||
+ cec_arbit_bit_time_set(3, 0x118, 0);
|
|
||||||
+ cec_arbit_bit_time_set(5, 0x000, 0);
|
|
||||||
+ cec_arbit_bit_time_set(7, 0x2aa, 0);
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
+ cec_init_flag = 0;
|
|
||||||
+
|
|
||||||
+ hdmitx_device->cec_init_ready = 1;
|
|
||||||
+ wake_up_interruptible(&cec_tx_struct.waitq);
|
|
||||||
+
|
|
||||||
+ amlogic_cec_log_dbg("amlogic_cec_delayed_init: leave\n");
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+static int amlogic_cec_init(void)
|
+static int amlogic_cec_init(void)
|
||||||
+{
|
+{
|
||||||
+ extern hdmitx_dev_t * get_hdmitx_device(void);
|
+ extern hdmitx_dev_t * get_hdmitx_device(void);
|
||||||
+ INIT_LIST_HEAD(&cec_rx_struct.list);
|
+ INIT_LIST_HEAD(&cec_rx_struct.list);
|
||||||
+
|
+
|
||||||
+ printk(banner);
|
+ printk("%s, Version: %s\n", banner, VERSION);
|
||||||
+
|
+
|
||||||
+ hdmitx_device = get_hdmitx_device();
|
+ hdmitx_device = get_hdmitx_device();
|
||||||
+ amlogic_cec_log_dbg("CEC init\n");
|
+ amlogic_cec_log_dbg("CEC init\n");
|
||||||
@ -671,14 +613,35 @@ index 0000000..b749b29
|
|||||||
+ return -EBUSY;
|
+ return -EBUSY;
|
||||||
+ }
|
+ }
|
||||||
+
|
+
|
||||||
+ cec_workqueue = create_workqueue("cec_work");
|
+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
|
||||||
+ if (cec_workqueue == NULL)
|
+ cec_gpi_init();
|
||||||
+ {
|
+#endif
|
||||||
+ printk("create work queue failed\n");
|
+
|
||||||
+ return -EFAULT;
|
+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
|
||||||
+ }
|
+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 25, 1);
|
||||||
+ INIT_WORK(&hdmitx_device->cec_work, amlogic_cec_delayed_init);
|
+ // Clear CEC Int. state and set CEC Int. mask
|
||||||
+ queue_work(cec_workqueue, &hdmitx_device->cec_work); // for init
|
+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_STAT_CLR) | (1 << 23)); // Clear the interrupt
|
||||||
|
+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) | (1 << 23)); // Enable the hdmi cec interrupt
|
||||||
|
+
|
||||||
|
+#endif
|
||||||
|
+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
|
||||||
|
+#if 1 // Please match with H/W cec config
|
||||||
|
+// GPIOAO_12
|
||||||
|
+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 0, 14, 1); // bit[14]: AO_PWM_C pinmux //0xc8100014
|
||||||
|
+ aml_set_reg32_bits(P_AO_RTI_PULL_UP_REG, 1, 12, 1); // bit[12]: enable AO_12 internal pull-up //0xc810002c
|
||||||
|
+ aml_set_reg32_bits(P_AO_RTI_PIN_MUX_REG, 1, 17, 1); // bit[17]: AO_CEC pinmux //0xc8100014
|
||||||
|
+ ao_cec_init();
|
||||||
|
+#else
|
||||||
|
+// GPIOH_3
|
||||||
|
+ aml_set_reg32_bits(P_PAD_PULL_UP_EN_REG1, 0, 19, 1); // disable gpioh_3 internal pull-up
|
||||||
|
+ aml_set_reg32_bits(P_PERIPHS_PIN_MUX_1, 1, 23, 1); // gpioh_3 cec pinmux
|
||||||
|
+#endif
|
||||||
|
+ cec_arbit_bit_time_set(3, 0x118, 0);
|
||||||
|
+ cec_arbit_bit_time_set(5, 0x000, 0);
|
||||||
|
+ cec_arbit_bit_time_set(7, 0x2aa, 0);
|
||||||
|
+#endif
|
||||||
|
+
|
||||||
|
+ hdmitx_device->cec_init_ready = 1;
|
||||||
+
|
+
|
||||||
+ amlogic_cec_log_dbg("hdmitx_device->cec_init_ready:0x%x\n", hdmitx_device->cec_init_ready);
|
+ amlogic_cec_log_dbg("hdmitx_device->cec_init_ready:0x%x\n", hdmitx_device->cec_init_ready);
|
||||||
+
|
+
|
||||||
@ -687,9 +650,6 @@ index 0000000..b749b29
|
|||||||
+
|
+
|
||||||
+static void amlogic_cec_exit(void)
|
+static void amlogic_cec_exit(void)
|
||||||
+{
|
+{
|
||||||
+ if (cec_init_flag == 1)
|
|
||||||
+ {
|
|
||||||
+
|
|
||||||
+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
|
+#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
|
||||||
+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) & ~(1 << 23)); // Disable the hdmi cec interrupt
|
+ aml_write_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK, aml_read_reg32(P_SYS_CPU_0_IRQ_IN1_INTR_MASK) & ~(1 << 23)); // Disable the hdmi cec interrupt
|
||||||
+ free_irq(INT_HDMI_CEC, (void *)hdmitx_device);
|
+ free_irq(INT_HDMI_CEC, (void *)hdmitx_device);
|
||||||
@ -697,15 +657,11 @@ index 0000000..b749b29
|
|||||||
+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
|
+#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
|
||||||
+ free_irq(INT_AO_CEC, (void *)hdmitx_device);
|
+ free_irq(INT_AO_CEC, (void *)hdmitx_device);
|
||||||
+#endif
|
+#endif
|
||||||
+ cec_init_flag = 0;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ misc_deregister(&cec_misc_device);
|
+ misc_deregister(&cec_misc_device);
|
||||||
+}
|
+}
|
||||||
+
|
+
|
||||||
+module_init(amlogic_cec_init);
|
+module_init(amlogic_cec_init);
|
||||||
+module_exit(amlogic_cec_exit);
|
+module_exit(amlogic_cec_exit);
|
||||||
+
|
|
||||||
diff --git a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c b/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
|
diff --git a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c b/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
|
||||||
index 3e043bc..2b11c72 100755
|
index 3e043bc..2b11c72 100755
|
||||||
--- a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
|
--- a/drivers/amlogic/hdmi/hdmi_tx/hdmi_tx.c
|
||||||
|
Loading…
x
Reference in New Issue
Block a user