Merge pull request #10099 from chewitt/amlogic-upstream

linux: bump Amlogic kernel and patches for Linux 6.15.y

packages/linux/package.mk

@@ -16,11 +16,11 @@ PKG_PATCH_DIRS="${LINUX}"
 
 case "${LINUX}" in
   amlogic)
-    PKG_VERSION="e2d3e1fdb530198317501eb7ded4f3a5fb6c881c" # 6.14.6
+    PKG_VERSION="0ff41df1cb268fc69e703a08a57ee14ae967d0ca" # 6.15.0
-    PKG_SHA256="ba423436e51426f26ab4f82b799f92305e228db37610cdb1da9d67eb67661911"
+    PKG_SHA256="60d654050789d07f3b04f5597131eaeba2875602f966bf8da14f04bf4c3183d2"
     PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
     PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
-    PKG_PATCH_DIRS="default rtlwifi/after-6.14"
+    PKG_PATCH_DIRS="default"
     ;;
   raspberrypi)
     PKG_VERSION="2395c15b82fd78c3d2fb89d649b1792d5ec8a78b" # 6.12.28

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From a396947aad7b93cbb9af74aa05872432d2ba7077 Mon Sep 17 00:00:00 2001
+From 1dde62820210ea7b93da622a21f0a389573c2746 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:41:51 +0000
-Subject: [PATCH 01/55] LOCAL: set meson-gx cma pool to 896MB
+Subject: [PATCH 01/50] LOCAL: set meson-gx cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 
@@ -11,7 +11,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-index 2673f0dbafe7..5f9b0854c201 100644
+index 7d99ca44e660..eebd4a4d388c 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
 @@ -58,7 +58,7 @@ secmon_reserved_bl32: secmon@5300000 {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From 6391e61ed787d1ad01caf743570ade3fb08aa219 Mon Sep 17 00:00:00 2001
+From 595a077dd6a78dcf25fe646c655a3f2d2000bca3 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 14 Aug 2019 19:58:14 +0000
-Subject: [PATCH 02/55] LOCAL: set meson-g12 cma pool to 896MB
+Subject: [PATCH 02/50] LOCAL: set meson-g12 cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 
@@ -11,7 +11,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index 49b51c54013f..2a7f91b2a7cb 100644
+index 69834b49673d..4b75b4d07901 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
 @@ -117,7 +117,7 @@ secmon_reserved_bl32: secmon@5300000 {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch

@@ -1,7 +1,7 @@
-From 2d868721c40d4652d595b5150974451e7a9ac1eb Mon Sep 17 00:00:00 2001
+From 02427d51911ba4c6645a78844376c99a9b11bcba Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:45:18 +0000
-Subject: [PATCH 03/55] LOCAL: arm64: fix Kodi sysinfo CPU information
+Subject: [PATCH 03/50] LOCAL: arm64: fix Kodi sysinfo CPU information
 
 This allows the CPU information to show in the Kodi sysinfo screen, e.g.
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch

@@ -1,7 +1,7 @@
-From b97bcac935313e7876c320ea28386f1eb8878912 Mon Sep 17 00:00:00 2001
+From 8eba4d0a8717dc97ae3057964cd74d69b9b9dc85 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:23 +0100
-Subject: [PATCH 04/55] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
+Subject: [PATCH 04/50] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
 
 The Amlogic Meson GX SoCs uses a non-standard argument to the
 PSCI CPU_SUSPEND call to enter system suspend.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch

@@ -1,7 +1,7 @@
-From a943d0edc42f086d306761830e72203aec47e091 Mon Sep 17 00:00:00 2001
+From 48d789e1641771db846e43510558a7ee820cca9a Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:25 +0100
-Subject: [PATCH 05/55] LOCAL: arm64: dts: meson: add support for GX PM and
+Subject: [PATCH 05/50] LOCAL: arm64: dts: meson: add support for GX PM and
  Virtual RTC
 
 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
@@ -10,7 +10,7 @@ Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
  1 file changed, 9 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-index 5f9b0854c201..b702a7f7bcf5 100644
+index eebd4a4d388c..260628cf218e 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
 +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
 @@ -223,6 +223,10 @@ sm: secure-monitor {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From c5f0f6858c0b816bdfcb57def52f3a9a22519e59 Mon Sep 17 00:00:00 2001
+From 03d7848a403caa1c3492ba5f94f20b47035428bc Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 21 Jan 2021 01:35:36 +0000
-Subject: [PATCH 06/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 06/50] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
@@ -13,7 +13,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 2 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-index a80f0ea2773b..0741d34945bb 100644
+index 4e89d6f6bb57..e137ebd48c5e 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
 @@ -29,6 +29,8 @@ button-function {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From 3a886a0d0a14b5b6c02c05150cd8bedb0828392a Mon Sep 17 00:00:00 2001
+From fd223a84d313fc4161628cee55ba630d2f0c136f Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 6 Nov 2021 13:01:08 +0000
-Subject: [PATCH 07/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 07/50] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM2
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
@@ -13,7 +13,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
  1 file changed, 2 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-index 96a3dd2d8a99..544c757f8bb7 100644
+index 2a09b3d550e2..8a89940869b0 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
 +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
 @@ -18,6 +18,8 @@ / {

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch

@@ -1,7 +1,7 @@
-From 9029e2f01165e924c404eb75339a81528d1de39c Mon Sep 17 00:00:00 2001
+From d356073a524021d944b6a5f9bbab13daf54807cc Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Feb 2021 19:27:40 +0000
-Subject: [PATCH 08/55] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
+Subject: [PATCH 08/50] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
  NEO U9-H
 
 Add node aliases to prevent meson-vrtc from claiming /dev/rtc0

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch

@@ -1,7 +1,7 @@
-From d5b5b93b0911f8efe1f31a66eb7b215ba56e4718 Mon Sep 17 00:00:00 2001
+From e227a26c18cba4fe01be8dce8b6301d693c4ce04 Mon Sep 17 00:00:00 2001
 From: Anssi Hannula <anssi.hannula@iki.fi>
 Date: Sun, 17 Apr 2022 04:37:48 +0000
-Subject: [PATCH 09/55] LOCAL: ASoC: meson: assign internal PCM
+Subject: [PATCH 09/50] LOCAL: ASoC: meson: assign internal PCM
  chmap/ELD/IEC958 kctls to device 0
 
 On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
@@ -40,10 +40,10 @@ index 6eaa950504cf..f2f05f1c4f98 100644
  	knew.private_value = private_value;
  	info->kctl = snd_ctl_new1(&knew, info);
 diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
-index 69f98975e14a..16f2e8511727 100644
+index bc01ff65bd6f..41dc02826343 100644
 --- a/sound/soc/codecs/hdmi-codec.c
 +++ b/sound/soc/codecs/hdmi-codec.c
-@@ -816,7 +816,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
+@@ -821,7 +821,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
  		if (!kctl)
  			return -ENOMEM;
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch

@@ -1,7 +1,7 @@
-From 5f2d4a3a4724ea99fa2cdd43c1442bdc3eaa58c8 Mon Sep 17 00:00:00 2001
+From 7af076b7917e31ab222f7a0881ff43aba1fe8354 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 5 Jan 2023 15:16:46 +0000
-Subject: [PATCH 10/55] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
+Subject: [PATCH 10/50] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
  decoding
 
 The MPEG1/2 decoder is broken and nobody has volunteered to poke

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.15-arm64-dts-amlogic-gx-switch-to-the-new-.patch

@@ -1,365 +0,0 @@
-From b2963904dee44fd06600e5fa5fce3355650924b7 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Fri, 27 Dec 2024 22:25:12 +0100
-Subject: [PATCH 11/55] FROMGIT(6.15): arm64: dts: amlogic: gx: switch to the
- new PWM controller binding
-
-Use the new PWM controller binding which now relies on passing all
-clock inputs available on the SoC (instead of passing the "wanted"
-clock input for a given board).
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- .../dts/amlogic/meson-gx-libretech-pc.dtsi    |  6 -----
- .../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi  |  2 --
- arch/arm64/boot/dts/amlogic/meson-gx.dtsi     |  8 +++---
- .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts |  2 --
- .../dts/amlogic/meson-gxbb-nexbox-a95x.dts    |  2 --
- .../boot/dts/amlogic/meson-gxbb-p20x.dtsi     |  2 --
- .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi |  2 --
- .../boot/dts/amlogic/meson-gxbb-wetek.dtsi    |  2 --
- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi   | 25 +++++++++++++++++++
- .../boot/dts/amlogic/meson-gxl-s805x-p241.dts |  2 --
- .../meson-gxl-s905w-jethome-jethub-j80.dts    |  2 --
- .../meson-gxl-s905x-hwacom-amazetv.dts        |  2 --
- .../amlogic/meson-gxl-s905x-khadas-vim.dts    |  2 --
- .../amlogic/meson-gxl-s905x-nexbox-a95x.dts   |  2 --
- .../dts/amlogic/meson-gxl-s905x-p212.dtsi     |  2 --
- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    | 25 +++++++++++++++++++
- .../dts/amlogic/meson-gxm-khadas-vim2.dts     |  4 ---
- .../boot/dts/amlogic/meson-gxm-rbox-pro.dts   |  2 --
- 18 files changed, 54 insertions(+), 40 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
-index d38c3a224fbe..2da49cfbde77 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
-@@ -345,24 +345,18 @@ rtc: rtc@51 {
- &pwm_AO_ab {
- 	pinctrl-0 = <&pwm_ao_a_3_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_ab {
- 	pinctrl-0 = <&pwm_b_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_ef {
- 	pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-index 45ccddd1aaf0..6da1316d97c6 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-@@ -240,8 +240,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-index b702a7f7bcf5..260628cf218e 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-@@ -333,14 +333,14 @@ i2c_A: i2c@8500 {
- 			};
- 
- 			pwm_ab: pwm@8550 {
--				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
-+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x08550 0x0 0x10>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
- 
- 			pwm_cd: pwm@8650 {
--				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
-+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x08650 0x0 0x10>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
-@@ -355,7 +355,7 @@ saradc: adc@8680 {
- 			};
- 
- 			pwm_ef: pwm@86c0 {
--				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
-+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x086c0 0x0 0x10>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
-@@ -507,7 +507,7 @@ i2c_AO: i2c@500 {
- 			};
- 
- 			pwm_AO_ab: pwm@550 {
--				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
-+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x00550 0x0 0x10>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
-index cf2e2ef81680..2ecc6ebd5a43 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
-@@ -298,8 +298,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
-index 7d7dde93fff3..c09da40ff7b0 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
-@@ -241,8 +241,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- /* Wireless SDIO Module */
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-index 1736bd2e96e2..6f67364fd63f 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-@@ -150,8 +150,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- /* Wireless SDIO Module */
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
-index 3807a184810b..6ff567225fee 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
-@@ -222,8 +222,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
-index deb295227189..bfedfc1472ec 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
-@@ -185,8 +185,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-index ed00e67e6923..8ebce7114a60 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-@@ -739,6 +739,31 @@ mux {
- 	};
- };
- 
-+&pwm_ab {
-+	clocks = <&xtal>,
-+		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <&clkc CLKID_FCLK_DIV4>,
-+		 <&clkc CLKID_FCLK_DIV3>;
-+};
-+
-+&pwm_AO_ab {
-+	clocks = <&xtal>, <&clkc CLKID_CLK81>;
-+};
-+
-+&pwm_cd {
-+	clocks = <&xtal>,
-+		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <&clkc CLKID_FCLK_DIV4>,
-+		 <&clkc CLKID_FCLK_DIV3>;
-+};
-+
-+&pwm_ef {
-+	clocks = <&xtal>,
-+		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <&clkc CLKID_FCLK_DIV4>,
-+		 <&clkc CLKID_FCLK_DIV3>;
-+};
-+
- &pwrc {
- 	resets = <&reset RESET_VIU>,
- 		 <&reset RESET_VENC>,
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
-index c5e2306ad7a4..ca7c4e8e7cac 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
-@@ -280,8 +280,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- /* This is connected to the Bluetooth module: */
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
-index 2b94b6e5285e..4ca90ac947b7 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts
-@@ -116,8 +116,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
-index 89fe5110f7a2..62a2da766a00 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
-@@ -115,8 +115,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- /* SD card */
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-index 0741d34945bb..e137ebd48c5e 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-@@ -213,8 +213,6 @@ &pwm_AO_ab {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal> , <&xtal>;
--	clock-names = "clkin0", "clkin1" ;
- };
- 
- &pwm_ef {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
-index c79f9f2099bf..236cedec9f19 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
-@@ -145,8 +145,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- /* Wireless SDIO Module */
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-index b52a830efcce..05a0d4de3ad7 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
-@@ -101,8 +101,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-index f58d1790de1c..2dc2fdaecf9f 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-@@ -809,6 +809,31 @@ internal_phy: ethernet-phy@8 {
- 	};
- };
- 
-+&pwm_ab {
-+	clocks = <&xtal>,
-+		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <&clkc CLKID_FCLK_DIV4>,
-+		 <&clkc CLKID_FCLK_DIV3>;
-+};
-+
-+&pwm_AO_ab {
-+	clocks = <&xtal>, <&clkc CLKID_CLK81>;
-+};
-+
-+&pwm_cd {
-+	clocks = <&xtal>,
-+		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <&clkc CLKID_FCLK_DIV4>,
-+		 <&clkc CLKID_FCLK_DIV3>;
-+};
-+
-+&pwm_ef {
-+	clocks = <&xtal>,
-+		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <&clkc CLKID_FCLK_DIV4>,
-+		 <&clkc CLKID_FCLK_DIV3>;
-+};
-+
- &pwrc {
- 	resets = <&reset RESET_VIU>,
- 		 <&reset RESET_VENC>,
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-index 544c757f8bb7..8a89940869b0 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
-@@ -291,16 +291,12 @@ &pwm_AO_ab {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- &sd_emmc_a {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
-index 7356d3b628b1..ecaf678b23dd 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
-@@ -192,8 +192,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&clkc CLKID_FCLK_DIV4>;
--	clock-names = "clkin0";
- };
- 
- /* Wireless SDIO Module */
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.16-arm64-dts-amlogic-gxbb-enable-UART-RX-a.patch

@@ -1,7 +1,7 @@
-From a36ed75aaa253ce71bb995407f28d74548728b50 Mon Sep 17 00:00:00 2001
+From a47d29eae229e62c4bf6f6d694d62ab7ccf4d2fe Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 19:58:51 +0100
-Subject: [PATCH 17/55] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
+Subject: [PATCH 11/50] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
  RX and TX pull up by default
 
 Some boards have noise on the UART RX line when the UART pins are not

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.15-arm64-dts-amlogic-axg-switch-to-the-new.patch

@@ -1,76 +0,0 @@
-From 4d8253e3d57b93822f641032c17b1aab8d7c7e8b Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Fri, 27 Dec 2024 22:25:13 +0100
-Subject: [PATCH 12/55] FROMGIT(6.15): arm64: dts: amlogic: axg: switch to the
- new PWM controller binding
-
-Use the new PWM controller binding which now relies on passing all
-clock inputs available on the SoC (instead of passing the "wanted"
-clock input for a given board).
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 24 ++++++++++++++++++----
- 1 file changed, 20 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
-index e9b22868983d..a6924d246bb1 100644
---- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
-@@ -1693,8 +1693,12 @@ sec_AO: ao-secure@140 {
- 			};
- 
- 			pwm_AO_cd: pwm@2000 {
--				compatible = "amlogic,meson-axg-ao-pwm";
-+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x02000  0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <&clkc_AO CLKID_AO_CLK81>,
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV5>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
-@@ -1728,8 +1732,12 @@ i2c_AO: i2c@5000 {
- 			};
- 
- 			pwm_AO_ab: pwm@7000 {
--				compatible = "amlogic,meson-axg-ao-pwm";
-+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x07000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <&clkc_AO CLKID_AO_CLK81>,
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV5>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
-@@ -1806,15 +1814,23 @@ watchdog@f0d0 {
- 			};
- 
- 			pwm_ab: pwm@1b000 {
--				compatible = "amlogic,meson-axg-ee-pwm";
-+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x1b000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <&clkc CLKID_FCLK_DIV5>,
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
- 
- 			pwm_cd: pwm@1a000 {
--				compatible = "amlogic,meson-axg-ee-pwm";
-+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x1a000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <&clkc CLKID_FCLK_DIV5>,
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.16-arm64-dts-amlogic-gxl-enable-UART-RX-an.patch

@@ -1,7 +1,7 @@
-From dcec0de116607bba150c5d0721f0d711d9cba2f6 Mon Sep 17 00:00:00 2001
+From 0b061fe76dc6ef00ba884461dbf1b2e2c3ffa06d Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 19:58:52 +0100
-Subject: [PATCH 18/55] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
+Subject: [PATCH 12/50] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
  and TX pull up by default
 
 Some boards have noise on the UART RX line when the UART pins are not

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMGIT-6.15-arm64-dts-amlogic-g12-switch-to-the-new.patch

@@ -1,499 +0,0 @@
-From 46257346eb613ee141712a6ed6ddf97efd249832 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Fri, 27 Dec 2024 22:25:14 +0100
-Subject: [PATCH 13/55] FROMGIT(6.15): arm64: dts: amlogic: g12: switch to the
- new PWM controller binding
-
-Use the new PWM controller binding which now relies on passing all
-clock inputs available on the SoC (instead of passing the "wanted"
-clock input for a given board).
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- .../boot/dts/amlogic/meson-g12-common.dtsi    | 33 ++++++++++++++++---
- .../boot/dts/amlogic/meson-g12a-fbx8am.dts    |  4 ---
- .../dts/amlogic/meson-g12a-radxa-zero.dts     |  4 ---
- .../boot/dts/amlogic/meson-g12a-sei510.dts    |  4 ---
- .../boot/dts/amlogic/meson-g12a-u200.dts      |  2 --
- .../boot/dts/amlogic/meson-g12a-x96-max.dts   |  4 ---
- .../amlogic/meson-g12b-a311d-libretech-cc.dts |  2 --
- .../dts/amlogic/meson-g12b-bananapi-cm4.dtsi  |  4 ---
- .../boot/dts/amlogic/meson-g12b-bananapi.dtsi |  4 ---
- .../dts/amlogic/meson-g12b-khadas-vim3.dtsi   |  4 ---
- .../boot/dts/amlogic/meson-g12b-odroid.dtsi   |  4 ---
- .../dts/amlogic/meson-g12b-radxa-zero2.dts    |  8 -----
- .../boot/dts/amlogic/meson-g12b-w400.dtsi     |  6 ----
- .../amlogic/meson-libretech-cottonwood.dtsi   |  6 ----
- .../boot/dts/amlogic/meson-sm1-ac2xx.dtsi     |  6 ----
- .../boot/dts/amlogic/meson-sm1-bananapi.dtsi  |  2 --
- .../dts/amlogic/meson-sm1-khadas-vim3l.dts    |  2 --
- .../boot/dts/amlogic/meson-sm1-odroid.dtsi    |  2 --
- .../boot/dts/amlogic/meson-sm1-sei610.dts     |  6 ----
- 19 files changed, 28 insertions(+), 79 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index 2a7f91b2a7cb..9b6593555912 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-@@ -2060,8 +2060,11 @@ cecb_AO: cec@280 {
- 			};
- 
- 			pwm_AO_cd: pwm@2000 {
--				compatible = "amlogic,meson-g12a-ao-pwm-cd";
-+				compatible = "amlogic,meson-g12-pwm-v2",
-+					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x2000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <&clkc_AO CLKID_AO_CLK81>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
-@@ -2099,8 +2102,13 @@ i2c_AO: i2c@5000 {
- 			};
- 
- 			pwm_AO_ab: pwm@7000 {
--				compatible = "amlogic,meson-g12a-ao-pwm-ab";
-+				compatible = "amlogic,meson-g12-pwm-v2",
-+					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x7000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <&clkc_AO CLKID_AO_CLK81>,
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV5>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
-@@ -2301,22 +2309,37 @@ spifc: spi@14000 {
- 			};
- 
- 			pwm_ef: pwm@19000 {
--				compatible = "amlogic,meson-g12a-ee-pwm";
-+				compatible = "amlogic,meson-g12-pwm-v2",
-+					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x19000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
- 
- 			pwm_cd: pwm@1a000 {
--				compatible = "amlogic,meson-g12a-ee-pwm";
-+				compatible = "amlogic,meson-g12-pwm-v2",
-+					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x1a000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
- 
- 			pwm_ab: pwm@1b000 {
--				compatible = "amlogic,meson-g12a-ee-pwm";
-+				compatible = "amlogic,meson-g12-pwm-v2",
-+					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x1b000 0x0 0x20>;
-+				clocks = <&xtal>,
-+					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+					 <&clkc CLKID_FCLK_DIV4>,
-+					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
- 				status = "disabled";
- 			};
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
-index a457b3f4397b..9aa36f17ffa2 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
-@@ -346,8 +346,6 @@ &ir {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-@@ -355,8 +353,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &pdm {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
-index c779a5da7d1e..952b8d02e5c2 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
-@@ -284,8 +284,6 @@ &ir {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-@@ -293,8 +291,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
-index ea51341f031b..52fbc5103e45 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
-@@ -389,8 +389,6 @@ &ir {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-@@ -398,8 +396,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &pdm {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
-index f70a46967e2b..5407049d2647 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
-@@ -502,8 +502,6 @@ &i2c3 {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
-index 32f98a192494..01da83658ae3 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
-@@ -328,8 +328,6 @@ &ir {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-@@ -363,8 +361,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &uart_A {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
-index 65b963d794cd..adedc1340c78 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
-@@ -116,6 +116,4 @@ &cpu103 {
- 
- &pwm_ab {
- 	pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
--	clocks = <&xtal>, <&xtal>;
--	clock-names = "clkin0", "clkin1";
- };
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
-index 08c33ec7e9f1..92e8b26ecccc 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
-@@ -257,8 +257,6 @@ &pcie {
- &pwm_ab {
- 	pinctrl-0 = <&pwm_a_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 
- 	status = "okay";
- };
-@@ -273,8 +271,6 @@ &pwm_ef {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 
- 	status = "okay";
- };
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
-index d4e1990b5f26..54663c55a20e 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
-@@ -367,8 +367,6 @@ &pwm_ab {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_a_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &pwm_ef {
-@@ -380,8 +378,6 @@ &pwm_ef {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
-index 16dd409051b4..48650bad230d 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
-@@ -92,16 +92,12 @@ &cpu103 {
- &pwm_ab {
- 	pinctrl-0 = <&pwm_a_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
-index 09d959aefb18..7e8964bacfce 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
-@@ -327,16 +327,12 @@ hdmi_tx_tmds_out: endpoint {
- &pwm_ab {
- 	pinctrl-0 = <&pwm_a_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
-index 39feba7f2d08..fc05ecf90714 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
-@@ -379,32 +379,24 @@ &ir {
- &pwm_ab {
- 	pinctrl-0 = <&pwm_a_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_ef {
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_AO_ab {
- 	pinctrl-0 = <&pwm_ao_a_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
-index 4cb6930ffb19..a7a0fc264cdc 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
-@@ -304,24 +304,18 @@ &ir {
- &pwm_ab {
- 	pinctrl-0 = <&pwm_a_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
- &pwm_ef {
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
-index 929e4720ae76..ac9c4c2673b1 100644
---- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
-@@ -458,24 +458,18 @@ &pwm_AO_cd {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- };
- 
- &pwm_ab {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_b_x7_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- };
- 
- &pwm_cd {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_d_x3_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
-index d1fa8b8bf795..a3463149db3d 100644
---- a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
-@@ -199,15 +199,11 @@ &pwm_AO_ab {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_ao_a_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-@@ -215,8 +211,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
-diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
-index 81dce862902a..40db95f64636 100644
---- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
-@@ -367,8 +367,6 @@ &ir {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
-index 9c0b544e2209..5d75ad3f3e46 100644
---- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
-@@ -78,8 +78,6 @@ &cpu3 {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
-index 7b0e9817a615..ad8d07883760 100644
---- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
-@@ -392,8 +392,6 @@ &ir {
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
-index 2e3397e55da2..37d7f64b6d5d 100644
---- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
-@@ -435,15 +435,11 @@ &pwm_AO_ab {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_ao_a_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &pwm_AO_cd {
- 	pinctrl-0 = <&pwm_ao_d_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin1";
- 	status = "okay";
- };
- 
-@@ -451,8 +447,6 @@ &pwm_ef {
- 	status = "okay";
- 	pinctrl-0 = <&pwm_e_pins>;
- 	pinctrl-names = "default";
--	clocks = <&xtal>;
--	clock-names = "clkin0";
- };
- 
- &saradc {
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMGIT-6.16-arm64-dts-amlogic-g12-enable-UART-RX-an.patch

@@ -1,7 +1,7 @@
-From 4273cc49bc0f790016c96d7fb17ddcf7275f5ac5 Mon Sep 17 00:00:00 2001
+From dc5f13949ec415f594abc5ed7a51ad845a090fb7 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 19:58:53 +0100
-Subject: [PATCH 19/55] FROMGIT(6.16): arm64: dts: amlogic: g12: enable UART RX
+Subject: [PATCH 13/50] FROMGIT(6.16): arm64: dts: amlogic: g12: enable UART RX
  and TX pull up by default
 
 Some boards have noise on the UART RX line when the UART pins are not

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMGIT-6.15-arm64-dts-amlogic-gx-fix-reference-to-u.patch

@@ -1,82 +0,0 @@
-From bc7b1c3119fd74f4898d547849dffdfefccbcc06 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Sun, 20 Apr 2025 18:48:00 +0200
-Subject: [PATCH 14/55] FROMGIT(6.15): arm64: dts: amlogic: gx: fix reference
- to unknown/untested PWM clock
-
-Device-tree expects absent clocks to be specified as <0> (instead of
-using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
-seen at their correct index (while before they were recognized, but at
-the correct index - resulting in the hardware using a different clock
-than what the kernel sees).
-
-Fixes: a526eeef9a81 ("arm64: dts: amlogic: gx: switch to the new PWM controller binding")
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi  | 6 +++---
- 2 files changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-index 8ebce7114a60..6c134592c7bb 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-@@ -741,7 +741,7 @@ mux {
- 
- &pwm_ab {
- 	clocks = <&xtal>,
--		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 		 <&clkc CLKID_FCLK_DIV4>,
- 		 <&clkc CLKID_FCLK_DIV3>;
- };
-@@ -752,14 +752,14 @@ &pwm_AO_ab {
- 
- &pwm_cd {
- 	clocks = <&xtal>,
--		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 		 <&clkc CLKID_FCLK_DIV4>,
- 		 <&clkc CLKID_FCLK_DIV3>;
- };
- 
- &pwm_ef {
- 	clocks = <&xtal>,
--		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 		 <&clkc CLKID_FCLK_DIV4>,
- 		 <&clkc CLKID_FCLK_DIV3>;
- };
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-index 2dc2fdaecf9f..19b8a39de6a0 100644
---- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-@@ -811,7 +811,7 @@ internal_phy: ethernet-phy@8 {
- 
- &pwm_ab {
- 	clocks = <&xtal>,
--		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 		 <&clkc CLKID_FCLK_DIV4>,
- 		 <&clkc CLKID_FCLK_DIV3>;
- };
-@@ -822,14 +822,14 @@ &pwm_AO_ab {
- 
- &pwm_cd {
- 	clocks = <&xtal>,
--		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 		 <&clkc CLKID_FCLK_DIV4>,
- 		 <&clkc CLKID_FCLK_DIV3>;
- };
- 
- &pwm_ef {
- 	clocks = <&xtal>,
--		 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+		 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 		 <&clkc CLKID_FCLK_DIV4>,
- 		 <&clkc CLKID_FCLK_DIV3>;
- };
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMGIT-6.16-dt-bindings-iio-adc-amlogic-meson-sarad.patch

@@ -1,7 +1,7 @@
-From eb2fe5d0c75ebe02ccdfab1c17697ef02b24da8f Mon Sep 17 00:00:00 2001
+From fc926d1d75ffe9da12e856320e2ad0eb02a28ca2 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Tue, 31 Dec 2024 20:42:06 +0100
-Subject: [PATCH 21/55] FROMGIT(6.16): dt-bindings: iio: adc:
+Subject: [PATCH 14/50] FROMGIT(6.16): dt-bindings: iio: adc:
  amlogic,meson-saradc: Add GXLX SoC compatible
 
 Add a compatible string for the GXLX SoC. It's very similar to GXL but

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMGIT-6.15-arm64-dts-amlogic-g12-fix-reference-to-.patch

@@ -1,52 +0,0 @@
-From d9207b2496fb9ddbcf0b874af6920bcf2371752b Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Sun, 20 Apr 2025 18:48:01 +0200
-Subject: [PATCH 15/55] FROMGIT(6.15): arm64: dts: amlogic: g12: fix reference
- to unknown/untested PWM clock
-
-Device-tree expects absent clocks to be specified as <0> (instead of
-using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
-seen at their correct index (while before they were recognized, but at
-the correct index - resulting in the hardware using a different clock
-than what the kernel sees).
-
-Fixes: e6884f2e4129 ("arm64: dts: amlogic: g12: switch to the new PWM controller binding")
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index 9b6593555912..4b75b4d07901 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-@@ -2313,7 +2313,7 @@ pwm_ef: pwm@19000 {
- 					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x19000 0x0 0x20>;
- 				clocks = <&xtal>,
--					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+					 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 					 <&clkc CLKID_FCLK_DIV4>,
- 					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
-@@ -2325,7 +2325,7 @@ pwm_cd: pwm@1a000 {
- 					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x1a000 0x0 0x20>;
- 				clocks = <&xtal>,
--					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+					 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 					 <&clkc CLKID_FCLK_DIV4>,
- 					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
-@@ -2337,7 +2337,7 @@ pwm_ab: pwm@1b000 {
- 					     "amlogic,meson8-pwm-v2";
- 				reg = <0x0 0x1b000 0x0 0x20>;
- 				clocks = <&xtal>,
--					 <>, /* unknown/untested, the datasheet calls it "vid_pll" */
-+					 <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
- 					 <&clkc CLKID_FCLK_DIV4>,
- 					 <&clkc CLKID_FCLK_DIV3>;
- 				#pwm-cells = <3>;
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMGIT-6.16-arm64-dts-amlogic-gxlx-s905l-p271-add-s.patch

@@ -1,7 +1,7 @@
-From 29f555feca8c3107a5731b3ee1aaa3139bcedc41 Mon Sep 17 00:00:00 2001
+From 7145fe3d6a802243bcc43b305fe66347ed392a94 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 1 Jan 2025 07:16:49 +0000
-Subject: [PATCH 23/55] FROMGIT(6.16): arm64: dts: amlogic: gxlx-s905l-p271:
+Subject: [PATCH 15/50] FROMGIT(6.16): arm64: dts: amlogic: gxlx-s905l-p271:
  add saradc compatible
 
 Add the saradac node using the meson-gxlx-saradc compatible to ensure

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMGIT-6.15-arm64-dts-amlogic-dreambox-fix-missing-.patch

@@ -1,34 +0,0 @@
-From f7410af04d5d6099a99a033136688328699c7c75 Mon Sep 17 00:00:00 2001
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Wed, 30 Apr 2025 11:51:27 +0000
-Subject: [PATCH 16/55] FROMGIT(6.15): arm64: dts: amlogic: dreambox: fix
- missing clkc_audio node
-
-Add the clkc_audio node to fix audio support on Dreambox One/Two.
-
-Fixes: 83a6f4c62cb1 ("arm64: dts: meson: add initial support for Dreambox One/Two")
-CC: <stable@vger.kernel.org>
-Suggested-by: Emanuel Strobel <emanuel.strobel@yahoo.com>
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
-index de35fa2d7a6d..8e3e3354ed67 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
-@@ -116,6 +116,10 @@ &arb {
- 	status = "okay";
- };
- 
-+&clkc_audio {
-+	status = "okay";
-+};
-+
- &frddr_a {
- 	status = "okay";
- };
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMGIT-6.16-arm64-dts-amlogic-gxl-set-i2c-bias-to-p.patch

@@ -1,7 +1,7 @@
-From 44b80f870a2ec32f321d6b690bddd546174e1b28 Mon Sep 17 00:00:00 2001
+From f3d8ea32e25cd3bafef07e4df6aa2c8155902559 Mon Sep 17 00:00:00 2001
 From: Da Xue <da@libre.computer>
 Date: Fri, 25 Apr 2025 16:31:18 -0400
-Subject: [PATCH 24/55] FROMGIT(6.16): arm64: dts: amlogic: gxl: set i2c bias
+Subject: [PATCH 16/50] FROMGIT(6.16): arm64: dts: amlogic: gxl: set i2c bias
  to pull-up
 
 GXL I2C pins need internal pull-up enabled to operate if there

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMGIT-6.16-ASoC-meson-meson-card-utils-use-of_prop.patch

@@ -1,7 +1,7 @@
-From fd634276727deab9f2a8a3cc2132049c3568de0c Mon Sep 17 00:00:00 2001
+From 069d3f524abc88be5b335b4a1f4b108823fa0c08 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 19 Apr 2025 23:34:48 +0200
-Subject: [PATCH 25/55] FROMGIT(6.16): ASoC: meson: meson-card-utils: use
+Subject: [PATCH 17/50] FROMGIT(6.16): ASoC: meson: meson-card-utils: use
  of_property_present() for DT parsing
 
 Commit c141ecc3cecd ("of: Warn when of_property_read_bool() is used on
@@ -25,7 +25,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/sound/soc/meson/meson-card-utils.c b/sound/soc/meson/meson-card-utils.c
-index 1a4ef124e4e2..ad38c74166a4 100644
+index cfc7f6e41ab5..68531183fb60 100644
 --- a/sound/soc/meson/meson-card-utils.c
 +++ b/sound/soc/meson/meson-card-utils.c
 @@ -231,7 +231,7 @@ static int meson_card_parse_of_optional(struct snd_soc_card *card,

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v1-drm-meson-fix-resource-cleanup-in-meson_.patch

@@ -1,7 +1,7 @@
-From ded1e14e10fbc0318a75fc496df3eaab23aa9e2b Mon Sep 17 00:00:00 2001
+From cf0b38ada9872c6d303c6e0ca14b8ae6780bc203 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Wed, 9 Apr 2025 23:44:22 +0200
-Subject: [PATCH 26/55] FROMLIST(v1): drm/meson: fix resource cleanup in
+Subject: [PATCH 18/50] FROMLIST(v1): drm/meson: fix resource cleanup in
  meson_drv_bind_master() on error
 
 meson_drv_bind_master() does not free resources in the order they are

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v2-phy-amlogic-meson8b-usb2-Use-FIELD_PREP-.patch

@@ -1,7 +1,7 @@
-From b955dfd9549480c8e7e76726fadf9078b8882cbc Mon Sep 17 00:00:00 2001
+From 8f32de770111973ca8823c9eac83adfba6ad093a Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 20:07:11 +0100
-Subject: [PATCH 27/55] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use
+Subject: [PATCH 19/50] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use
  FIELD_PREP instead of _SHIFT macros
 
 This simplifies the code by re-using the FIELD_PREP helper. No

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMGIT-6.16-pinctrl-meson-define-the-pull-up-down-r.patch

@@ -1,46 +0,0 @@
-From bee8914209cb91e57f650bf8b74c915e7b7dc1c9 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Sat, 29 Mar 2025 20:01:32 +0100
-Subject: [PATCH 20/55] FROMGIT(6.16): pinctrl: meson: define the pull up/down
- resistor value as 60 kOhm
-
-The public datasheets of the following Amlogic SoCs describe a typical
-resistor value for the built-in pull up/down resistor:
-- Meson8/8b/8m2: not documented
-- GXBB (S905): 60 kOhm
-- GXL (S905X): 60 kOhm
-- GXM (S912): 60 kOhm
-- G12B (S922X): 60 kOhm
-- SM1 (S905D3): 60 kOhm
-
-The public G12B and SM1 datasheets additionally state min and max
-values:
-- min value: 50 kOhm for both, pull-up and pull-down
-- max value for the pull-up: 70 kOhm
-- max value for the pull-down: 130 kOhm
-
-Use 60 kOhm in the pinctrl-meson driver as well so it's shown in the
-debugfs output. It may not be accurate for Meson8/8b/8m2 but in reality
-60 kOhm is closer to the actual value than 1 Ohm.
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/pinctrl/meson/pinctrl-meson.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
-index 253a0cc57e39..e5a32a0532ee 100644
---- a/drivers/pinctrl/meson/pinctrl-meson.c
-+++ b/drivers/pinctrl/meson/pinctrl-meson.c
-@@ -487,7 +487,7 @@ static int meson_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
- 	case PIN_CONFIG_BIAS_PULL_DOWN:
- 	case PIN_CONFIG_BIAS_PULL_UP:
- 		if (meson_pinconf_get_pull(pc, pin) == param)
--			arg = 1;
-+			arg = 60000;
- 		else
- 			return -EINVAL;
- 		break;
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v2-phy-amlogic-meson8b-usb2-Use-the-regmap_.patch

@@ -1,7 +1,7 @@
-From 0c06d5b06e3aa54f5b3d90e2b060c85c3c671655 Mon Sep 17 00:00:00 2001
+From 967bd7dbbb6ae6392aec7c41d3243c7d635cf6d1 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 29 Mar 2025 20:07:12 +0100
-Subject: [PATCH 28/55] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use the
+Subject: [PATCH 20/50] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use the
  regmap_{clear,set}_bits helpers
 
 These require less code, reduce the chance of typos and overall make the

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch

@@ -1,7 +1,7 @@
-From 13d3f57d955e74323bb2ec16e4b78e0f722d6044 Mon Sep 17 00:00:00 2001
+From 69c265006b7fbb60bc841e71d335d5362007f193 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
 Date: Sun, 20 Feb 2022 08:23:12 +0000
-Subject: [PATCH 29/55] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
+Subject: [PATCH 21/50] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
  Micro Electronics
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
@@ -17,10 +17,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  1 file changed, 2 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-index b5979832ddce..0b1df976f17e 100644
+index 86f6a19b28ae..8af0a6426729 100644
 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
 +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-@@ -1526,6 +1526,8 @@ patternProperties:
+@@ -1534,6 +1534,8 @@ patternProperties:
      description: Texas Instruments
    "^tianma,.*":
      description: Tianma Micro-electronics Co., Ltd.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMGIT-6.16-iio-adc-meson-add-support-for-the-GXLX-.patch

@@ -1,106 +0,0 @@
-From 9e477da82afb28e19343ea8f27c5cbe8dd011b53 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Sat, 23 Mar 2024 20:44:41 +0100
-Subject: [PATCH 22/55] FROMGIT(6.16): iio: adc: meson: add support for the
- GXLX SoC
-
-The SARADC IP on the GXLX SoC itself is identical to the one found on
-GXL SoCs. However, GXLX SoCs require poking the first three bits in the
-MESON_SAR_ADC_REG12 register to get the three MPLL clocks (used as clock
-generators for the audio frequencies) to work.
-
-The reason why there are MPLL clock bits in the ADC register space is
-entirely unknown and it seems that nobody is able to comment on this.
-So clearly mark this as a workaround and add a warning so users are
-notified that this workaround can change (once we know what these bits
-actually do).
-
-Tested-by: Christian Hewitt <christianshewitt@gmail.com>
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
----
- drivers/iio/adc/meson_saradc.c | 34 ++++++++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
-diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
-index 997def4a4d2f..c0f2a2ef0c68 100644
---- a/drivers/iio/adc/meson_saradc.c
-+++ b/drivers/iio/adc/meson_saradc.c
-@@ -160,6 +160,11 @@
- 	#define MESON_SAR_ADC_REG11_EOC				BIT(1)
- 	#define MESON_SAR_ADC_REG11_VREF_SEL			BIT(0)
- 
-+#define MESON_SAR_ADC_REG12					0x30
-+	#define MESON_SAR_ADC_REG12_MPLL0_UNKNOWN		BIT(0)
-+	#define MESON_SAR_ADC_REG12_MPLL1_UNKNOWN		BIT(1)
-+	#define MESON_SAR_ADC_REG12_MPLL2_UNKNOWN		BIT(2)
-+
- #define MESON_SAR_ADC_REG13					0x34
- 	#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK	GENMASK(13, 8)
- 
-@@ -326,6 +331,7 @@ struct meson_sar_adc_param {
- 	u8					cmv_select;
- 	u8					adc_eoc;
- 	enum meson_sar_adc_vref_sel		vref_voltage;
-+	bool					enable_mpll_clock_workaround;
- };
- 
- struct meson_sar_adc_data {
-@@ -995,6 +1001,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
- 				    priv->param->cmv_select);
- 		regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
- 				   MESON_SAR_ADC_REG11_CMV_SEL, regval);
-+
-+		if (priv->param->enable_mpll_clock_workaround) {
-+			dev_warn(dev,
-+				 "Enabling unknown bits to make the MPLL clocks work. This may change so always update dtbs and kernel together\n");
-+			regmap_write(priv->regmap, MESON_SAR_ADC_REG12,
-+				     MESON_SAR_ADC_REG12_MPLL0_UNKNOWN |
-+				     MESON_SAR_ADC_REG12_MPLL1_UNKNOWN |
-+				     MESON_SAR_ADC_REG12_MPLL2_UNKNOWN);
-+		}
- 	}
- 
- 	ret = clk_set_parent(priv->adc_sel_clk, priv->clkin);
-@@ -1219,6 +1234,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
- 	.cmv_select = 1,
- };
- 
-+static const struct meson_sar_adc_param meson_sar_adc_gxlx_param = {
-+	.has_bl30_integration = true,
-+	.clock_rate = 1200000,
-+	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
-+	.resolution = 12,
-+	.disable_ring_counter = 1,
-+	.vref_voltage = 1,
-+	.cmv_select = true,
-+	.enable_mpll_clock_workaround = true,
-+};
-+
- static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
- 	.has_bl30_integration = true,
- 	.clock_rate = 1200000,
-@@ -1267,6 +1293,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
- 	.name = "meson-gxl-saradc",
- };
- 
-+static const struct meson_sar_adc_data meson_sar_adc_gxlx_data = {
-+	.param = &meson_sar_adc_gxlx_param,
-+	.name = "meson-gxlx-saradc",
-+};
-+
- static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
- 	.param = &meson_sar_adc_gxl_param,
- 	.name = "meson-gxm-saradc",
-@@ -1298,6 +1329,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
- 	}, {
- 		.compatible = "amlogic,meson-gxl-saradc",
- 		.data = &meson_sar_adc_gxl_data,
-+	}, {
-+		.compatible = "amlogic,meson-gxlx-saradc",
-+		.data = &meson_sar_adc_gxlx_data,
- 	}, {
- 		.compatible = "amlogic,meson-gxm-saradc",
- 		.data = &meson_sar_adc_gxm_data,
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch

@@ -1,7 +1,7 @@
-From 3fe5dc3d0402e5dd3e24ee7e68f51a89cba18478 Mon Sep 17 00:00:00 2001
+From 11e3f9cc355e521f9bc0c631312cf67a9a913853 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Sun, 20 Feb 2022 08:24:47 +0000
-Subject: [PATCH 30/55] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
+Subject: [PATCH 22/50] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
  Electronics TM1628
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch

@@ -1,7 +1,7 @@
-From 632f5d3157fb5db48de377adb8019f1937533e00 Mon Sep 17 00:00:00 2001
+From cbf5b50694b3f5d1abe0250bd7405721f8ce3563 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Sun, 20 Feb 2022 08:26:27 +0000
-Subject: [PATCH 31/55] FROMLIST(v5): docs: ABI: document tm1628 attribute
+Subject: [PATCH 23/50] FROMLIST(v5): docs: ABI: document tm1628 attribute
  display-text
 
 Document the attribute for reading / writing the text to be displayed on

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch

@@ -1,7 +1,7 @@
-From 146b3fb7cea3270fba30151d9b126818a69c9851 Mon Sep 17 00:00:00 2001
+From 13688c0e23b3f8f5e51a38324f7d06955a349333 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:51:20 +0000
-Subject: [PATCH 32/55] FROMLIST(v5): auxdisplay: add support for Titanmec
+Subject: [PATCH 24/50] FROMLIST(v5): auxdisplay: add support for Titanmec
  TM1628 7 segment display controller
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch

@@ -1,7 +1,7 @@
-From 2d8366ff3590284424babd86ae83545ca028216c Mon Sep 17 00:00:00 2001
+From b4adc49983f6d1536b90e7d140233617de2d1c0e Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:52:34 +0000
-Subject: [PATCH 33/55] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
+Subject: [PATCH 25/50] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
  support for the 7 segment display
 
 This patch adds support for the 7 segment display of the device.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch

@@ -1,7 +1,7 @@
-From c3fe742e133aab3173ed166c1007aec9910bf16c Mon Sep 17 00:00:00 2001
+From 4525d380781bb5203da25f6d4c67fdffc7077f1d Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:53:32 +0000
-Subject: [PATCH 34/55] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
+Subject: [PATCH 26/50] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
  auxdisplay driver
 
 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
@@ -10,10 +10,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  1 file changed, 7 insertions(+)
 
 diff --git a/MAINTAINERS b/MAINTAINERS
-index 00e94bec401e..fb9caa075ad2 100644
+index dd844ac8d910..f9cd1faa4294 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
-@@ -23959,6 +23959,13 @@ W:	http://sourceforge.net/projects/tlan/
+@@ -24590,6 +24590,13 @@ W:	http://sourceforge.net/projects/tlan/
  F:	Documentation/networking/device_drivers/ethernet/ti/tlan.rst
  F:	drivers/net/ethernet/ti/tlan.*
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v2-media-si2168-increase-cmd-execution-time.patch

@@ -1,7 +1,7 @@
-From d724db741128f511f3e867fac6ecde99e96b418e Mon Sep 17 00:00:00 2001
+From 22a5fc12e2b6655e9316774cdad643899b448f2f Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Fri, 7 Feb 2025 04:29:08 +0000
-Subject: [PATCH 35/55] FROMLIST(v2): media: si2168: increase cmd execution
+Subject: [PATCH 27/50] FROMLIST(v2): media: si2168: increase cmd execution
  timeout value
 
 Testing with a MyGica T230C v2 USB device (0572:c68a) shows occasional

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch

@@ -1,7 +1,7 @@
-From 5caea62d534d293badcc1da5c0946b5d9cf0ed3f Mon Sep 17 00:00:00 2001
+From 0e9e0d8cc1322adef5e3563fdbe4dd0fb9b56bc1 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Mon, 22 Nov 2021 09:15:21 +0000
-Subject: [PATCH 36/55] FROMLIST(v1): media: meson: vdec: esparser: check
+Subject: [PATCH 28/50] FROMLIST(v1): media: meson: vdec: esparser: check
  parsing state with hardware write pointer
 
 Also check the hardware write pointer to check if ES Parser has stalled.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch

@@ -1,7 +1,7 @@
-From fd4db8cc01ab6866be0245d12a90355dc35b8f08 Mon Sep 17 00:00:00 2001
+From 3d5f435feb3ba7db20eae928fc38722b4dceed46 Mon Sep 17 00:00:00 2001
 From: Benjamin Roszak <benjamin545@gmail.com>
 Date: Mon, 23 Jan 2023 10:56:46 +0000
-Subject: [PATCH 37/55] FROMLIST(v2): media: meson: vdec: implement 10bit
+Subject: [PATCH 29/50] FROMLIST(v2): media: meson: vdec: implement 10bit
  bitstream handling
 
 In order to support 10bit bitstream decoding, buffers and MMU

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch

@@ -1,7 +1,7 @@
-From d66c3e35d69980eae01a21acb2f1e571771d6d04 Mon Sep 17 00:00:00 2001
+From 9b45fa72a806226bd18fad472721203cc5b533c5 Mon Sep 17 00:00:00 2001
 From: Maxime Jourdan <mjourdan@baylibre.com>
 Date: Mon, 23 Jan 2023 11:07:04 +0000
-Subject: [PATCH 38/55] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
+Subject: [PATCH 30/50] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
 
 Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
 the common "HEVC" decoder driver.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v1-dt-bindings-usb-dwc2-allow-device-sub-no.patch

@@ -1,7 +1,7 @@
-From 22c4ce5ab3abb15c6e3e97ed09dd1a59f22465be Mon Sep 17 00:00:00 2001
+From d1fc3d19e2feae15199863e81f4193b6a56651c9 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <neil.armstrong@linaro.org>
 Date: Wed, 5 Jun 2024 11:15:11 +0200
-Subject: [PATCH 39/55] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
+Subject: [PATCH 31/50] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
  sub-nodes
 
 Allow the '#address-cells', '#size-cells' and subnodes as defined in

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-drm-meson-Avoid-use-after-free-issues-wi.patch

@@ -1,7 +1,7 @@
-From 1ad64efd7378da5f37072a459b9cf895ed1d4a0a Mon Sep 17 00:00:00 2001
+From 57246e21d3ecba5de0be1d95458812351d2cc7cd Mon Sep 17 00:00:00 2001
 From: Zhang Kunbo <zhangkunbo@huawei.com>
 Date: Wed, 6 Nov 2024 02:45:48 +0000
-Subject: [PATCH 40/55] FROMLIST(v1): drm/meson: Avoid use-after-free issues
+Subject: [PATCH 32/50] FROMLIST(v1): drm/meson: Avoid use-after-free issues
  with crtc
 
 It's dangerous to call drm_crtc_init_with_planes() whose second

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v1-arm64-dts-amlogic-sm1-bananapi-lower-SD-.patch

@@ -1,7 +1,7 @@
-From 1ab37c8a80866f61515a295e65ea34f9b4c478e5 Mon Sep 17 00:00:00 2001
+From 2b891462b3d231f5f3ef3e287cb2d74542bc5db1 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 3 May 2025 15:18:07 +0000
-Subject: [PATCH 41/55] FROMLIST(v1): arm64: dts: amlogic: sm1-bananapi: lower
+Subject: [PATCH 33/50] FROMLIST(v1): arm64: dts: amlogic: sm1-bananapi: lower
  SD card speed for stability
 
 Users report being able to boot (u-boot) from SD card but kernel

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-WIP-media-meson-vdec-reintroduce-wiggle-room.patch

@@ -1,7 +1,7 @@
-From 0b8f613e33f928d6d0e920cba8ea7402aa7ad224 Mon Sep 17 00:00:00 2001
+From d40cabc0cd382e18f0b7c4514de9daccdcaa1fd5 Mon Sep 17 00:00:00 2001
 From: Andreas Baierl <ichgeh@imkreisrum.de>
 Date: Tue, 2 Apr 2024 14:22:52 +0000
-Subject: [PATCH 42/55] WIP: media: meson: vdec: reintroduce wiggle room
+Subject: [PATCH 34/50] WIP: media: meson: vdec: reintroduce wiggle room
 
 Without the wiggle room, it happens that matching offsets can't be found.
 This results in non-matches and afterwards in frame drops in userspace apps.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch

@@ -1,7 +1,7 @@
-From 1ba4604fcb1fe4e10c67f0ffe886f4ddeaf6435a Mon Sep 17 00:00:00 2001
+From 21236d519a8edd59444861973cc4d6462aa973d6 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 14 Mar 2023 01:13:15 +0000
-Subject: [PATCH 43/55] WIP: media: meson: vdec: fix memory leak of 'new_frame'
+Subject: [PATCH 35/50] WIP: media: meson: vdec: fix memory leak of 'new_frame'
 
 Reported-by: kernel test robot <lkp@intel.com>
 Reported-by: Dan Carpenter <error27@gmail.com>

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-WIP-media-meson-vdec-fix-V4L2_BUF_FLAG_-KEY-P-B-FRAM.patch

@@ -1,7 +1,7 @@
-From 7814d0db70c4da0e6a82135af2d71424519177d4 Mon Sep 17 00:00:00 2001
+From 8ac44e39fb57fa3e68e0091fa3d2b5462a3cb377 Mon Sep 17 00:00:00 2001
 From: Andreas Baierl <ichgeh@imkreisrum.de>
 Date: Thu, 20 Feb 2025 23:59:14 +0000
-Subject: [PATCH 44/55] WIP: media: meson: vdec: fix
+Subject: [PATCH 36/50] WIP: media: meson: vdec: fix
  V4L2_BUF_FLAG_{KEY|P|B}FRAME
 
 ffmpeg needs the keyframe flag to be set correctly, else

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch

@@ -1,7 +1,7 @@
-From d35e1db4644b17254613befa2f72825b484bcdb9 Mon Sep 17 00:00:00 2001
+From c9d9536006b6fc6b59d918c333b4563e4be040bf Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sun, 26 May 2024 12:53:07 +0000
-Subject: [PATCH 45/55] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
+Subject: [PATCH 37/50] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
  boards
 
 Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-WIP-net-phy-meson-gxl-implement-meson_gxl_phy_resume.patch

@@ -1,7 +1,7 @@
-From 6dbcc039a4a11f3c8179f20a25f1354a28fd7ce4 Mon Sep 17 00:00:00 2001
+From 15d48d1d6f845c4c9dbcd62de7df46e17c354d40 Mon Sep 17 00:00:00 2001
 From: Da Xue <da@libre.computer>
 Date: Tue, 8 Aug 2023 01:00:15 -0400
-Subject: [PATCH 46/55] WIP: net: phy: meson-gxl: implement
+Subject: [PATCH 38/50] WIP: net: phy: meson-gxl: implement
  meson_gxl_phy_resume()
 
 While testing the suspend/resume functionality, we found the ethernet

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-drm-meson-add-support-for-2560x1440-resolution-o.patch

@@ -1,7 +1,7 @@
-From 480f01786ce23d0dc2b831856bb8b1c2434b22a2 Mon Sep 17 00:00:00 2001
+From bc2f467869be30356b75ae0b9af002b45c699db7 Mon Sep 17 00:00:00 2001
 From: Dongjin Kim <tobetter@gmail.com>
 Date: Thu, 10 Sep 2020 11:01:33 +0900
-Subject: [PATCH 47/55] WIP: drm/meson: add support for 2560x1440 resolution
+Subject: [PATCH 39/50] WIP: drm/meson: add support for 2560x1440 resolution
  output
 
 Add support for Quad HD (QHD) 2560x1440 resolution output. Timings

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-drm-meson-do-setup-after-resumption-to-fix-hdmi-.patch

@@ -1,7 +1,7 @@
-From 97e24af0fb499d312fbee2f2358e765567c64e83 Mon Sep 17 00:00:00 2001
+From 861260a7aaecf2954e35619d08f5ce7e15990f6b Mon Sep 17 00:00:00 2001
 From: Luke Lu <luke.lu@libre.computer>
 Date: Mon, 21 Aug 2023 10:50:04 +0000
-Subject: [PATCH 48/55] WIP: drm/meson: do setup after resumption to fix hdmi
+Subject: [PATCH 40/50] WIP: drm/meson: do setup after resumption to fix hdmi
  output
 
 Some HDMI displays connected to gxl-based boards go black after
@@ -18,7 +18,7 @@ Signed-off-by: Luke Lu <luke.lu@libre.computer>
  3 files changed, 9 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-index 996733ed2c00..7d6543fef353 100644
+index 0890add5f707..d00d90fc6d65 100644
 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
 +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
 @@ -2378,7 +2378,7 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-drm-meson-poweron-off-dw_hdmi-only-if-dw_hdmi-en.patch

@@ -1,7 +1,7 @@
-From eeab2711a9a6c4caa1a1e9d5f9154b7f70f8b07d Mon Sep 17 00:00:00 2001
+From ba61d298732934a2371065df7f76159499da27db Mon Sep 17 00:00:00 2001
 From: Luke Lu <luke.lu@libre.computer>
 Date: Wed, 13 Dec 2023 03:47:44 +0000
-Subject: [PATCH 49/55] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
+Subject: [PATCH 41/50] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
  enabled
 
 dw_hdmi_poweron() assumes that hdmi->curr_conn is valid. Calling
@@ -19,10 +19,10 @@ dw_hdmi is enabled.
  3 files changed, 12 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-index 7d6543fef353..8e94de2fa532 100644
+index d00d90fc6d65..7e6a63e03139 100644
 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
 +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
-@@ -3645,6 +3645,12 @@ void dw_hdmi_resume(struct dw_hdmi *hdmi)
+@@ -3644,6 +3644,12 @@ void dw_hdmi_resume(struct dw_hdmi *hdmi)
  }
  EXPORT_SYMBOL_GPL(dw_hdmi_resume);
  

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch

@@ -1,7 +1,7 @@
-From 0e4b183b4d1c53af989628ca8901c73108bb3b47 Mon Sep 17 00:00:00 2001
+From 317616c25e9c060b69329bbd6c06c9d859a3691b Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 18 Jan 2022 15:09:12 +0000
-Subject: [PATCH 50/55] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
+Subject: [PATCH 42/50] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
  100MHz
 
 Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch

@@ -1,7 +1,7 @@
-From ae6354d50055bee9eff5ae402f13087d5874073c Mon Sep 17 00:00:00 2001
+From ec86a3c23aca699c28875cb91179f312c23b3ced Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 18 Jan 2022 15:18:32 +0000
-Subject: [PATCH 51/55] WIP: arm64: dts: meson: remove SDIO node from Khadas
+Subject: [PATCH 43/50] WIP: arm64: dts: meson: remove SDIO node from Khadas
  VIM1
 
 Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch

@@ -1,7 +1,7 @@
-From c2a167bc9c453c36e2b939f44f2f9a7476109e60 Mon Sep 17 00:00:00 2001
+From f893c37745bc77586fb5bb0c40e56ec1d25f8427 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 19 Jan 2022 06:45:06 +0000
-Subject: [PATCH 52/55] WIP: arm64: dts: meson: add UHS SDIO capabilities to
+Subject: [PATCH 44/50] WIP: arm64: dts: meson: add UHS SDIO capabilities to
  p212/p23x/q20x
 
 Add UHS capabilities to the SDIO node to enable 100MHz speeds.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch

@@ -1,7 +1,7 @@
-From d3bd0c26f58273b4caf8ca7ec8a2a0fe606ec74e Mon Sep 17 00:00:00 2001
+From 8dc92185299d7a455ba1806bc2ef2165467088cd Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 9 Feb 2023 09:59:58 +0000
-Subject: [PATCH 53/55] WIP: dt-bindings: arm: amlogic: add support for Tanix
+Subject: [PATCH 45/50] WIP: dt-bindings: arm: amlogic: add support for Tanix
  TX9 Pro
 
 The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch

@@ -1,7 +1,7 @@
-From 46e1bf577e16fecf6e15716c500ea28683a2c9bc Mon Sep 17 00:00:00 2001
+From 0f82a6a67523a95d0322637707c3a936ed83355c Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 9 Feb 2023 10:01:14 +0000
-Subject: [PATCH 54/55] WIP: arm64: dts: meson: add initial device-tree for
+Subject: [PATCH 46/50] WIP: arm64: dts: meson: add initial device-tree for
  Tanix TX9 Pro
 
 Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-arm64-dts-meson-add-7-segment-display-to-Tanix-T.patch

@@ -1,7 +1,7 @@
-From 7c254b38d6481864d8348c4dca5ada8eeb0d53f1 Mon Sep 17 00:00:00 2001
+From f696526698a4ad2bc9f72031940a487911d75e95 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 9 Feb 2023 10:11:39 +0000
-Subject: [PATCH 55/55] WIP: arm64: dts: meson: add 7-segment display to Tanix
+Subject: [PATCH 47/50] WIP: arm64: dts: meson: add 7-segment display to Tanix
  TX9 Pro
 
 Add support for the 7-segment VFD display of the device

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-Revert-drm-meson-Use-1000ULL-when-operating-with-mod.patch

@@ -0,0 +1,36 @@
+From 203bf695e56bd982ec01601a105d7e2fe472ec66 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 28 May 2025 11:16:47 +0000
+Subject: [PATCH 48/50] Revert "drm/meson: Use 1000ULL when operating with
+ mode->clock"
+
+This reverts commit eb0851e14432f3b87c77b704c835ac376deda03a.
+---
+ drivers/gpu/drm/meson/meson_encoder_hdmi.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+index c08fa93e50a3..7752d8ac85f0 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
++++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+@@ -75,7 +75,7 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
+ 	unsigned long long venc_freq;
+ 	unsigned long long hdmi_freq;
+ 
+-	vclk_freq = mode->clock * 1000ULL;
++	vclk_freq = mode->clock * 1000;
+ 
+ 	/* For 420, pixel clock is half unlike venc clock */
+ 	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
+@@ -123,7 +123,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
+ 	struct meson_drm *priv = encoder_hdmi->priv;
+ 	bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
+-	unsigned long long clock = mode->clock * 1000ULL;
++	unsigned long long clock = mode->clock * 1000;
+ 	unsigned long long phy_freq;
+ 	unsigned long long vclk_freq;
+ 	unsigned long long venc_freq;
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-Revert-drm-meson-use-unsigned-long-long-Hz-for-frequ.patch

@@ -0,0 +1,603 @@
+From ce74ac8725fe2a77c80544a02ff853a7fb60604b Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 28 May 2025 11:17:28 +0000
+Subject: [PATCH 49/50] Revert "drm/meson: use unsigned long long / Hz for
+ frequency types"
+
+This reverts commit 1017560164b6bbcbc93579266926e6e96675262a.
+---
+ drivers/gpu/drm/meson/meson_drv.c          |   2 +-
+ drivers/gpu/drm/meson/meson_drv.h          |   2 +-
+ drivers/gpu/drm/meson/meson_encoder_hdmi.c |  29 ++-
+ drivers/gpu/drm/meson/meson_vclk.c         | 195 ++++++++++-----------
+ drivers/gpu/drm/meson/meson_vclk.h         |  13 +-
+ 5 files changed, 115 insertions(+), 126 deletions(-)
+
+diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
+index ea5bda297a74..031686fd4104 100644
+--- a/drivers/gpu/drm/meson/meson_drv.c
++++ b/drivers/gpu/drm/meson/meson_drv.c
+@@ -169,7 +169,7 @@ static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
+ 	/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
+ 	{
+ 		.limits = {
+-			.max_hdmi_phy_freq = 1650000000,
++			.max_hdmi_phy_freq = 1650000,
+ 		},
+ 		.attrs = (const struct soc_device_attribute []) {
+ 			{ .soc_id = "GXL (S805*)", },
+diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
+index be4b0e4df6e1..3f9345c14f31 100644
+--- a/drivers/gpu/drm/meson/meson_drv.h
++++ b/drivers/gpu/drm/meson/meson_drv.h
+@@ -37,7 +37,7 @@ struct meson_drm_match_data {
+ };
+ 
+ struct meson_drm_soc_limits {
+-	unsigned long long max_hdmi_phy_freq;
++	unsigned int max_hdmi_phy_freq;
+ };
+ 
+ struct meson_drm {
+diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+index 7752d8ac85f0..6d1c9262a2cf 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
++++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
+ {
+ 	struct meson_drm *priv = encoder_hdmi->priv;
+ 	int vic = drm_match_cea_mode(mode);
+-	unsigned long long phy_freq;
+-	unsigned long long vclk_freq;
+-	unsigned long long venc_freq;
+-	unsigned long long hdmi_freq;
++	unsigned int phy_freq;
++	unsigned int vclk_freq;
++	unsigned int venc_freq;
++	unsigned int hdmi_freq;
+ 
+-	vclk_freq = mode->clock * 1000;
++	vclk_freq = mode->clock;
+ 
+ 	/* For 420, pixel clock is half unlike venc clock */
+ 	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
+@@ -107,8 +107,7 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
+ 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+ 		venc_freq /= 2;
+ 
+-	dev_dbg(priv->dev,
+-		"vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
++	dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
+ 		phy_freq, vclk_freq, venc_freq, hdmi_freq,
+ 		priv->venc.hdmi_use_enci);
+ 
+@@ -123,11 +122,10 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
+ 	struct meson_drm *priv = encoder_hdmi->priv;
+ 	bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
+-	unsigned long long clock = mode->clock * 1000;
+-	unsigned long long phy_freq;
+-	unsigned long long vclk_freq;
+-	unsigned long long venc_freq;
+-	unsigned long long hdmi_freq;
++	unsigned int phy_freq;
++	unsigned int vclk_freq;
++	unsigned int venc_freq;
++	unsigned int hdmi_freq;
+ 	int vic = drm_match_cea_mode(mode);
+ 	enum drm_mode_status status;
+ 
+@@ -146,12 +144,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 		if (status != MODE_OK)
+ 			return status;
+ 
+-		return meson_vclk_dmt_supported_freq(priv, clock);
++		return meson_vclk_dmt_supported_freq(priv, mode->clock);
+ 	/* Check against supported VIC modes */
+ 	} else if (!meson_venc_hdmi_supported_vic(vic))
+ 		return MODE_BAD;
+ 
+-	vclk_freq = clock;
++	vclk_freq = mode->clock;
+ 
+ 	/* For 420, pixel clock is half unlike venc clock */
+ 	if (drm_mode_is_420_only(display_info, mode) ||
+@@ -181,8 +179,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+ 		venc_freq /= 2;
+ 
+-	dev_dbg(priv->dev,
+-		"%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n",
++	dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
+ 		__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
+ 
+ 	return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
+diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
+index ce165c9587d7..eb4c251d79b7 100644
+--- a/drivers/gpu/drm/meson/meson_vclk.c
++++ b/drivers/gpu/drm/meson/meson_vclk.c
+@@ -110,10 +110,7 @@
+ #define HDMI_PLL_LOCK		BIT(31)
+ #define HDMI_PLL_LOCK_G12A	(3 << 30)
+ 
+-#define PIXEL_FREQ_1000_1001(_freq)	\
+-	DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
+-#define PHY_FREQ_1000_1001(_freq)	\
+-	(PIXEL_FREQ_1000_1001(DIV_ROUND_DOWN_ULL(_freq, 10ULL)) * 10)
++#define FREQ_1000_1001(_freq)	DIV_ROUND_CLOSEST(_freq * 1000, 1001)
+ 
+ /* VID PLL Dividers */
+ enum {
+@@ -365,11 +362,11 @@ enum {
+ };
+ 
+ struct meson_vclk_params {
+-	unsigned long long pll_freq;
+-	unsigned long long phy_freq;
+-	unsigned long long vclk_freq;
+-	unsigned long long venc_freq;
+-	unsigned long long pixel_freq;
++	unsigned int pll_freq;
++	unsigned int phy_freq;
++	unsigned int vclk_freq;
++	unsigned int venc_freq;
++	unsigned int pixel_freq;
+ 	unsigned int pll_od1;
+ 	unsigned int pll_od2;
+ 	unsigned int pll_od3;
+@@ -377,11 +374,11 @@ struct meson_vclk_params {
+ 	unsigned int vclk_div;
+ } params[] = {
+ 	[MESON_VCLK_HDMI_ENCI_54000] = {
+-		.pll_freq = 4320000000,
+-		.phy_freq = 270000000,
+-		.vclk_freq = 54000000,
+-		.venc_freq = 54000000,
+-		.pixel_freq = 54000000,
++		.pll_freq = 4320000,
++		.phy_freq = 270000,
++		.vclk_freq = 54000,
++		.venc_freq = 54000,
++		.pixel_freq = 54000,
+ 		.pll_od1 = 4,
+ 		.pll_od2 = 4,
+ 		.pll_od3 = 1,
+@@ -389,11 +386,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 1,
+ 	},
+ 	[MESON_VCLK_HDMI_DDR_54000] = {
+-		.pll_freq = 4320000000,
+-		.phy_freq = 270000000,
+-		.vclk_freq = 54000000,
+-		.venc_freq = 54000000,
+-		.pixel_freq = 27000000,
++		.pll_freq = 4320000,
++		.phy_freq = 270000,
++		.vclk_freq = 54000,
++		.venc_freq = 54000,
++		.pixel_freq = 27000,
+ 		.pll_od1 = 4,
+ 		.pll_od2 = 4,
+ 		.pll_od3 = 1,
+@@ -401,11 +398,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 1,
+ 	},
+ 	[MESON_VCLK_HDMI_DDR_148500] = {
+-		.pll_freq = 2970000000,
+-		.phy_freq = 742500000,
+-		.vclk_freq = 148500000,
+-		.venc_freq = 148500000,
+-		.pixel_freq = 74250000,
++		.pll_freq = 2970000,
++		.phy_freq = 742500,
++		.vclk_freq = 148500,
++		.venc_freq = 148500,
++		.pixel_freq = 74250,
+ 		.pll_od1 = 4,
+ 		.pll_od2 = 1,
+ 		.pll_od3 = 1,
+@@ -413,11 +410,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 1,
+ 	},
+ 	[MESON_VCLK_HDMI_74250] = {
+-		.pll_freq = 2970000000,
+-		.phy_freq = 742500000,
+-		.vclk_freq = 74250000,
+-		.venc_freq = 74250000,
+-		.pixel_freq = 74250000,
++		.pll_freq = 2970000,
++		.phy_freq = 742500,
++		.vclk_freq = 74250,
++		.venc_freq = 74250,
++		.pixel_freq = 74250,
+ 		.pll_od1 = 2,
+ 		.pll_od2 = 2,
+ 		.pll_od3 = 2,
+@@ -425,11 +422,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 1,
+ 	},
+ 	[MESON_VCLK_HDMI_148500] = {
+-		.pll_freq = 2970000000,
+-		.phy_freq = 1485000000,
+-		.vclk_freq = 148500000,
+-		.venc_freq = 148500000,
+-		.pixel_freq = 148500000,
++		.pll_freq = 2970000,
++		.phy_freq = 1485000,
++		.vclk_freq = 148500,
++		.venc_freq = 148500,
++		.pixel_freq = 148500,
+ 		.pll_od1 = 1,
+ 		.pll_od2 = 2,
+ 		.pll_od3 = 2,
+@@ -437,11 +434,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 1,
+ 	},
+ 	[MESON_VCLK_HDMI_297000] = {
+-		.pll_freq = 5940000000,
+-		.phy_freq = 2970000000,
+-		.venc_freq = 297000000,
+-		.vclk_freq = 297000000,
+-		.pixel_freq = 297000000,
++		.pll_freq = 5940000,
++		.phy_freq = 2970000,
++		.venc_freq = 297000,
++		.vclk_freq = 297000,
++		.pixel_freq = 297000,
+ 		.pll_od1 = 2,
+ 		.pll_od2 = 1,
+ 		.pll_od3 = 1,
+@@ -449,11 +446,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 2,
+ 	},
+ 	[MESON_VCLK_HDMI_594000] = {
+-		.pll_freq = 5940000000,
+-		.phy_freq = 5940000000,
+-		.venc_freq = 594000000,
+-		.vclk_freq = 594000000,
+-		.pixel_freq = 594000000,
++		.pll_freq = 5940000,
++		.phy_freq = 5940000,
++		.venc_freq = 594000,
++		.vclk_freq = 594000,
++		.pixel_freq = 594000,
+ 		.pll_od1 = 1,
+ 		.pll_od2 = 1,
+ 		.pll_od3 = 2,
+@@ -461,11 +458,11 @@ struct meson_vclk_params {
+ 		.vclk_div = 1,
+ 	},
+ 	[MESON_VCLK_HDMI_594000_YUV420] = {
+-		.pll_freq = 5940000000,
+-		.phy_freq = 2970000000,
+-		.venc_freq = 594000000,
+-		.vclk_freq = 594000000,
+-		.pixel_freq = 297000000,
++		.pll_freq = 5940000,
++		.phy_freq = 2970000,
++		.venc_freq = 594000,
++		.vclk_freq = 594000,
++		.pixel_freq = 297000,
+ 		.pll_od1 = 2,
+ 		.pll_od2 = 1,
+ 		.pll_od3 = 1,
+@@ -634,16 +631,16 @@ static void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m,
+ 				3 << 20, pll_od_to_reg(od3) << 20);
+ }
+ 
+-#define XTAL_FREQ (24 * 1000 * 1000)
++#define XTAL_FREQ 24000
+ 
+ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
+-					 unsigned long long pll_freq)
++					 unsigned int pll_freq)
+ {
+ 	/* The GXBB PLL has a /2 pre-multiplier */
+ 	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB))
+-		pll_freq = DIV_ROUND_DOWN_ULL(pll_freq, 2);
++		pll_freq /= 2;
+ 
+-	return DIV_ROUND_DOWN_ULL(pll_freq, XTAL_FREQ);
++	return pll_freq / XTAL_FREQ;
+ }
+ 
+ #define HDMI_FRAC_MAX_GXBB	4096
+@@ -652,13 +649,12 @@ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
+ 
+ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
+ 					    unsigned int m,
+-					    unsigned long long pll_freq)
++					    unsigned int pll_freq)
+ {
+-	unsigned long long parent_freq = XTAL_FREQ;
++	unsigned int parent_freq = XTAL_FREQ;
+ 	unsigned int frac_max = HDMI_FRAC_MAX_GXL;
+ 	unsigned int frac_m;
+ 	unsigned int frac;
+-	u32 remainder;
+ 
+ 	/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */
+ 	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
+@@ -670,11 +666,11 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
+ 		frac_max = HDMI_FRAC_MAX_G12A;
+ 
+ 	/* We can have a perfect match !*/
+-	if (div_u64_rem(pll_freq, m, &remainder) == parent_freq &&
+-	    remainder == 0)
++	if (pll_freq / m == parent_freq &&
++	    pll_freq % m == 0)
+ 		return 0;
+ 
+-	frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
++	frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq);
+ 	frac_m = m * frac_max;
+ 	if (frac_m > frac)
+ 		return frac_max;
+@@ -684,7 +680,7 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
+ }
+ 
+ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
+-					   unsigned long long m,
++					   unsigned int m,
+ 					   unsigned int frac)
+ {
+ 	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
+@@ -712,7 +708,7 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
+ }
+ 
+ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
+-				       unsigned long long freq,
++				       unsigned int freq,
+ 				       unsigned int *m,
+ 				       unsigned int *frac,
+ 				       unsigned int *od)
+@@ -724,7 +720,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
+ 			continue;
+ 		*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);
+ 
+-		DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d\n",
++		DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n",
+ 				 freq, *m, *frac, *od);
+ 
+ 		if (meson_hdmi_pll_validate_params(priv, *m, *frac))
+@@ -736,7 +732,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
+ 
+ /* pll_freq is the frequency after the OD dividers */
+ enum drm_mode_status
+-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq)
++meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq)
+ {
+ 	unsigned int od, m, frac;
+ 
+@@ -759,7 +755,7 @@ EXPORT_SYMBOL_GPL(meson_vclk_dmt_supported_freq);
+ 
+ /* pll_freq is the frequency after the OD dividers */
+ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
+-				       unsigned long long pll_freq)
++				       unsigned int pll_freq)
+ {
+ 	unsigned int od, m, frac, od1, od2, od3;
+ 
+@@ -774,7 +770,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
+ 			od1 = od / od2;
+ 		}
+ 
+-		DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d/%d/%d\n",
++		DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n",
+ 				 pll_freq, m, frac, od1, od2, od3);
+ 
+ 		meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
+@@ -782,18 +778,17 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
+ 		return;
+ 	}
+ 
+-	DRM_ERROR("Fatal, unable to find parameters for PLL freq %lluHz\n",
++	DRM_ERROR("Fatal, unable to find parameters for PLL freq %d\n",
+ 		  pll_freq);
+ }
+ 
+ enum drm_mode_status
+-meson_vclk_vic_supported_freq(struct meson_drm *priv,
+-			      unsigned long long phy_freq,
+-			      unsigned long long vclk_freq)
++meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
++			      unsigned int vclk_freq)
+ {
+ 	int i;
+ 
+-	DRM_DEBUG_DRIVER("phy_freq = %lluHz vclk_freq = %lluHz\n",
++	DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n",
+ 			 phy_freq, vclk_freq);
+ 
+ 	/* Check against soc revision/package limits */
+@@ -804,19 +799,19 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv,
+ 	}
+ 
+ 	for (i = 0 ; params[i].pixel_freq ; ++i) {
+-		DRM_DEBUG_DRIVER("i = %d pixel_freq = %lluHz alt = %lluHz\n",
++		DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n",
+ 				 i, params[i].pixel_freq,
+-				 PIXEL_FREQ_1000_1001(params[i].pixel_freq));
+-		DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
++				 FREQ_1000_1001(params[i].pixel_freq));
++		DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
+ 				 i, params[i].phy_freq,
+-				 PHY_FREQ_1000_1001(params[i].phy_freq));
++				 FREQ_1000_1001(params[i].phy_freq/10)*10);
+ 		/* Match strict frequency */
+ 		if (phy_freq == params[i].phy_freq &&
+ 		    vclk_freq == params[i].vclk_freq)
+ 			return MODE_OK;
+ 		/* Match 1000/1001 variant */
+-		if (phy_freq == PHY_FREQ_1000_1001(params[i].phy_freq) &&
+-		    vclk_freq == PIXEL_FREQ_1000_1001(params[i].vclk_freq))
++		if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
++		    vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
+ 			return MODE_OK;
+ 	}
+ 
+@@ -824,9 +819,8 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv,
+ }
+ EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq);
+ 
+-static void meson_vclk_set(struct meson_drm *priv,
+-			   unsigned long long pll_base_freq, unsigned int od1,
+-			   unsigned int od2, unsigned int od3,
++static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
++			   unsigned int od1, unsigned int od2, unsigned int od3,
+ 			   unsigned int vid_pll_div, unsigned int vclk_div,
+ 			   unsigned int hdmi_tx_div, unsigned int venc_div,
+ 			   bool hdmi_use_enci, bool vic_alternate_clock)
+@@ -846,15 +840,15 @@ static void meson_vclk_set(struct meson_drm *priv,
+ 		meson_hdmi_pll_generic_set(priv, pll_base_freq);
+ 	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
+ 		switch (pll_base_freq) {
+-		case 2970000000:
++		case 2970000:
+ 			m = 0x3d;
+ 			frac = vic_alternate_clock ? 0xd02 : 0xe00;
+ 			break;
+-		case 4320000000:
++		case 4320000:
+ 			m = vic_alternate_clock ? 0x59 : 0x5a;
+ 			frac = vic_alternate_clock ? 0xe8f : 0;
+ 			break;
+-		case 5940000000:
++		case 5940000:
+ 			m = 0x7b;
+ 			frac = vic_alternate_clock ? 0xa05 : 0xc00;
+ 			break;
+@@ -864,15 +858,15 @@ static void meson_vclk_set(struct meson_drm *priv,
+ 	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
+ 		   meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
+ 		switch (pll_base_freq) {
+-		case 2970000000:
++		case 2970000:
+ 			m = 0x7b;
+ 			frac = vic_alternate_clock ? 0x281 : 0x300;
+ 			break;
+-		case 4320000000:
++		case 4320000:
+ 			m = vic_alternate_clock ? 0xb3 : 0xb4;
+ 			frac = vic_alternate_clock ? 0x347 : 0;
+ 			break;
+-		case 5940000000:
++		case 5940000:
+ 			m = 0xf7;
+ 			frac = vic_alternate_clock ? 0x102 : 0x200;
+ 			break;
+@@ -881,15 +875,15 @@ static void meson_vclk_set(struct meson_drm *priv,
+ 		meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
+ 	} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
+ 		switch (pll_base_freq) {
+-		case 2970000000:
++		case 2970000:
+ 			m = 0x7b;
+ 			frac = vic_alternate_clock ? 0x140b4 : 0x18000;
+ 			break;
+-		case 4320000000:
++		case 4320000:
+ 			m = vic_alternate_clock ? 0xb3 : 0xb4;
+ 			frac = vic_alternate_clock ? 0x1a3ee : 0;
+ 			break;
+-		case 5940000000:
++		case 5940000:
+ 			m = 0xf7;
+ 			frac = vic_alternate_clock ? 0x8148 : 0x10000;
+ 			break;
+@@ -1049,14 +1043,14 @@ static void meson_vclk_set(struct meson_drm *priv,
+ }
+ 
+ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
+-		      unsigned long long phy_freq, unsigned long long vclk_freq,
+-		      unsigned long long venc_freq, unsigned long long dac_freq,
++		      unsigned int phy_freq, unsigned int vclk_freq,
++		      unsigned int venc_freq, unsigned int dac_freq,
+ 		      bool hdmi_use_enci)
+ {
+ 	bool vic_alternate_clock = false;
+-	unsigned long long freq;
+-	unsigned long long hdmi_tx_div;
+-	unsigned long long venc_div;
++	unsigned int freq;
++	unsigned int hdmi_tx_div;
++	unsigned int venc_div;
+ 
+ 	if (target == MESON_VCLK_TARGET_CVBS) {
+ 		meson_venci_cvbs_clock_config(priv);
+@@ -1076,27 +1070,27 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
+ 		return;
+ 	}
+ 
+-	hdmi_tx_div = DIV_ROUND_DOWN_ULL(vclk_freq, dac_freq);
++	hdmi_tx_div = vclk_freq / dac_freq;
+ 
+ 	if (hdmi_tx_div == 0) {
+-		pr_err("Fatal Error, invalid HDMI-TX freq %lluHz\n",
++		pr_err("Fatal Error, invalid HDMI-TX freq %d\n",
+ 		       dac_freq);
+ 		return;
+ 	}
+ 
+-	venc_div = DIV_ROUND_DOWN_ULL(vclk_freq, venc_freq);
++	venc_div = vclk_freq / venc_freq;
+ 
+ 	if (venc_div == 0) {
+-		pr_err("Fatal Error, invalid HDMI venc freq %lluHz\n",
++		pr_err("Fatal Error, invalid HDMI venc freq %d\n",
+ 		       venc_freq);
+ 		return;
+ 	}
+ 
+ 	for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
+ 		if ((phy_freq == params[freq].phy_freq ||
+-		     phy_freq == PHY_FREQ_1000_1001(params[freq].phy_freq)) &&
++		     phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
+ 		    (vclk_freq == params[freq].vclk_freq ||
+-		     vclk_freq == PIXEL_FREQ_1000_1001(params[freq].vclk_freq))) {
++		     vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
+ 			if (vclk_freq != params[freq].vclk_freq)
+ 				vic_alternate_clock = true;
+ 			else
+@@ -1122,8 +1116,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
+ 	}
+ 
+ 	if (!params[freq].pixel_freq) {
+-		pr_err("Fatal Error, invalid HDMI vclk freq %lluHz\n",
+-		       vclk_freq);
++		pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq);
+ 		return;
+ 	}
+ 
+diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h
+index 7ac55744e574..60617aaf18dd 100644
+--- a/drivers/gpu/drm/meson/meson_vclk.h
++++ b/drivers/gpu/drm/meson/meson_vclk.h
+@@ -20,18 +20,17 @@ enum {
+ };
+ 
+ /* 27MHz is the CVBS Pixel Clock */
+-#define MESON_VCLK_CVBS			(27 * 1000 * 1000)
++#define MESON_VCLK_CVBS			27000
+ 
+ enum drm_mode_status
+-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq);
++meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq);
+ enum drm_mode_status
+-meson_vclk_vic_supported_freq(struct meson_drm *priv,
+-			      unsigned long long phy_freq,
+-			      unsigned long long vclk_freq);
++meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
++			      unsigned int vclk_freq);
+ 
+ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
+-		      unsigned long long phy_freq, unsigned long long vclk_freq,
+-		      unsigned long long venc_freq, unsigned long long dac_freq,
++		      unsigned int phy_freq, unsigned int vclk_freq,
++		      unsigned int venc_freq, unsigned int dac_freq,
+ 		      bool hdmi_use_enci);
+ 
+ #endif /* __MESON_VCLK_H */
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-FROMLIST-v1-drm-meson-vclk-fix-precision-in-vclk-cal.patch

@@ -0,0 +1,137 @@
+From ac9550dce453587542ea39e31882d8285bda7451 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Sat, 4 Jan 2025 23:53:19 +0000
+Subject: [PATCH 50/50] FROMLIST(v1): drm/meson: vclk: fix precision in vclk
+ calculations
+
+Playing YUV420 @ 59.94 media causes HDMI output to lose sync
+with a fatal error reported:
+
+[   89.610280] Fatal Error, invalid HDMI vclk freq 593406
+
+In meson_encoder_hdmi_set_vclk the initial vclk_freq value is
+593407 but YUV420 modes halve the value to 296703.5 and this
+is stored as int which loses precision by rounding down to
+296703. The rounded value is later doubled to 593406 and then
+meson_encoder_hdmi_set_vclk sets an invalid vclk_freq value
+and the error triggers during meson_vlkc_setup validation.
+
+Fix precision in meson_encoder_hdmi_set_vclk by switching to
+unsigned long long KHz values instead of int MHz. As values
+for phy_freq are now more accurate we also need to handle an
+additional match scenario in meson_vclk_setup.
+
+Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ drivers/gpu/drm/meson/meson_encoder_hdmi.c | 42 +++++++++++-----------
+ drivers/gpu/drm/meson/meson_vclk.c         |  3 +-
+ 2 files changed, 23 insertions(+), 22 deletions(-)
+
+diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+index 6d1c9262a2cf..183a2c73c5b7 100644
+--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
++++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
+ {
+ 	struct meson_drm *priv = encoder_hdmi->priv;
+ 	int vic = drm_match_cea_mode(mode);
+-	unsigned int phy_freq;
+-	unsigned int vclk_freq;
+-	unsigned int venc_freq;
+-	unsigned int hdmi_freq;
++	unsigned long long vclk_freq;
++	unsigned long long phy_freq;
++	unsigned long long venc_freq;
++	unsigned long long hdmi_freq;
+ 
+-	vclk_freq = mode->clock;
++	vclk_freq = mode->clock * 1000ULL;
+ 
+ 	/* For 420, pixel clock is half unlike venc clock */
+ 	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
+@@ -85,8 +85,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
+ 	phy_freq = vclk_freq * 10;
+ 
+ 	if (!vic) {
+-		meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
+-				 vclk_freq, vclk_freq, vclk_freq, false);
++		meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq / 1000ULL,
++				 vclk_freq / 1000ULL, vclk_freq / 1000ULL,
++				 vclk_freq / 1000ULL, false);
+ 		return;
+ 	}
+ 
+@@ -107,12 +108,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
+ 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+ 		venc_freq /= 2;
+ 
+-	dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
+-		phy_freq, vclk_freq, venc_freq, hdmi_freq,
+-		priv->venc.hdmi_use_enci);
+-
+-	meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
+-			 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
++	meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq / 1000ULL,
++			 vclk_freq / 1000ULL, venc_freq / 1000ULL, hdmi_freq / 1000ULL,
++			 priv->venc.hdmi_use_enci);
+ }
+ 
+ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
+@@ -122,10 +120,10 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
+ 	struct meson_drm *priv = encoder_hdmi->priv;
+ 	bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
+-	unsigned int phy_freq;
+-	unsigned int vclk_freq;
+-	unsigned int venc_freq;
+-	unsigned int hdmi_freq;
++	unsigned long long vclk_freq;
++	unsigned long long phy_freq;
++	unsigned long long venc_freq;
++	unsigned long long hdmi_freq;
+ 	int vic = drm_match_cea_mode(mode);
+ 	enum drm_mode_status status;
+ 
+@@ -149,7 +147,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 	} else if (!meson_venc_hdmi_supported_vic(vic))
+ 		return MODE_BAD;
+ 
+-	vclk_freq = mode->clock;
++	vclk_freq = mode->clock * 1000ULL;
+ 
+ 	/* For 420, pixel clock is half unlike venc clock */
+ 	if (drm_mode_is_420_only(display_info, mode) ||
+@@ -179,10 +177,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
+ 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+ 		venc_freq /= 2;
+ 
+-	dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
+-		__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
++	dev_dbg(priv->dev, "%s: phy=%lld vclk=%lld venc=%lld hdmi=%lld\n",
++		__func__, phy_freq / 1000ULL, vclk_freq / 1000ULL,
++		venc_freq / 1000ULL, hdmi_freq / 1000ULL);
+ 
+-	return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
++	return meson_vclk_vic_supported_freq(priv, phy_freq / 1000ULL,
++					     vclk_freq / 1000ULL);
+ }
+ 
+ static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
+diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
+index eb4c251d79b7..35884fd4ba1c 100644
+--- a/drivers/gpu/drm/meson/meson_vclk.c
++++ b/drivers/gpu/drm/meson/meson_vclk.c
+@@ -1088,7 +1088,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
+ 
+ 	for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
+ 		if ((phy_freq == params[freq].phy_freq ||
+-		     phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
++		     phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10 ||
++		   ((phy_freq/10)*10) == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
+ 		    (vclk_freq == params[freq].vclk_freq ||
+ 		     vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
+ 			if (vclk_freq != params[freq].vclk_freq)
+-- 
+2.34.1
+

projects/Amlogic/linux/linux.aarch64.conf

@@ -1,10 +1,10 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm64 6.14.6 Kernel Configuration
+# Linux/arm64 6.15.0 Kernel Configuration
 #
-CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-14.2.0 (GCC) 14.2.0"
+CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0"
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=140200
+CONFIG_GCC_VERSION=150100
 CONFIG_CLANG_VERSION=0
 CONFIG_AS_IS_GNU=y
 CONFIG_AS_VERSION=24400
@@ -14,12 +14,13 @@ CONFIG_LLD_VERSION=0
 CONFIG_RUSTC_VERSION=0
 CONFIG_RUSTC_LLVM_VERSION=0
 CONFIG_CC_CAN_LINK=y
-CONFIG_CC_CAN_LINK_STATIC=y
 CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
 CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y
 CONFIG_TOOLS_SUPPORT_RELR=y
 CONFIG_CC_HAS_ASM_INLINE=y
 CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
+CONFIG_CC_HAS_COUNTED_BY=y
+CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y
 CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y
 CONFIG_PAHOLE_VERSION=0
 CONFIG_IRQ_WORK=y
@@ -178,7 +179,6 @@ CONFIG_CGROUP_RDMA=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CPUSETS=y
 # CONFIG_CPUSETS_V1 is not set
-CONFIG_PROC_PID_CPUSET=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
@@ -219,11 +219,11 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn"
 CONFIG_SYSCTL=y
 CONFIG_HAVE_UID16=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYSFS_SYSCALL=y
 CONFIG_EXPERT=y
 CONFIG_UID16=y
 CONFIG_MULTIUSER=y
 CONFIG_SGETMASK_SYSCALL=y
-CONFIG_SYSFS_SYSCALL=y
 CONFIG_FHANDLE=y
 CONFIG_POSIX_TIMERS=y
 CONFIG_PRINTK=y
@@ -250,6 +250,7 @@ CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_SELFTEST is not set
 CONFIG_KALLSYMS_ALL=y
 CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y
 CONFIG_HAVE_PERF_EVENTS=y
 
 #
@@ -623,6 +624,7 @@ CONFIG_CPU_MITIGATIONS=y
 #
 # General architecture-dependent options
 #
+CONFIG_HOTPLUG_SMT=y
 CONFIG_HOTPLUG_CORE_SYNC=y
 CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
 # CONFIG_KPROBES is not set
@@ -918,6 +920,7 @@ CONFIG_SWAP=y
 # Slab allocator options
 #
 CONFIG_SLUB=y
+CONFIG_KVFREE_RCU_BATCHED=y
 # CONFIG_SLUB_TINY is not set
 CONFIG_SLAB_MERGE_DEFAULT=y
 # CONFIG_SLAB_FREELIST_RANDOM is not set
@@ -958,12 +961,15 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
 CONFIG_MEMORY_FAILURE=y
 # CONFIG_HWPOISON_INJECT is not set
 CONFIG_ARCH_WANTS_THP_SWAP=y
+CONFIG_MM_ID=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 # CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set
 CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y
 # CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set
 CONFIG_THP_SWAP=y
 # CONFIG_READ_ONLY_THP_FOR_FS is not set
+# CONFIG_NO_PAGE_MAPCOUNT is not set
+CONFIG_PAGE_MAPCOUNT=y
 CONFIG_PGTABLE_HAS_HUGE_LEAVES=y
 CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y
 CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y
@@ -1621,6 +1627,7 @@ CONFIG_PCI_MSI=y
 CONFIG_PCI_QUIRKS=y
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
+# CONFIG_PCI_DOE is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCI_NPEM is not set
 # CONFIG_PCI_PRI is not set
@@ -1657,8 +1664,10 @@ CONFIG_VGA_ARB_MAX_GPUS=16
 # DesignWare-based PCIe controllers
 #
 CONFIG_PCIE_DW=y
+# CONFIG_PCIE_DW_DEBUGFS is not set
 CONFIG_PCIE_DW_HOST=y
 # CONFIG_PCIE_AL is not set
+# CONFIG_PCIE_AMD_MDB is not set
 CONFIG_PCI_MESON=y
 # CONFIG_PCI_HISI is not set
 # CONFIG_PCIE_KIRIN is not set
@@ -1689,6 +1698,7 @@ CONFIG_PCI_MESON=y
 # CONFIG_PCI_SW_SWITCHTEC is not set
 # end of PCI switch controller drivers
 
+# CONFIG_PCI_PWRCTL_SLOT is not set
 # CONFIG_CXL_BUS is not set
 # CONFIG_PCCARD is not set
 # CONFIG_RAPIDIO is not set
@@ -1788,6 +1798,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y
 # end of Tegra firmware driver
 # end of Firmware Drivers
 
+# CONFIG_FWCTL is not set
 # CONFIG_GNSS is not set
 CONFIG_MTD=y
 # CONFIG_MTD_TESTS is not set
@@ -2695,6 +2706,8 @@ CONFIG_RTW88_8821CS=m
 CONFIG_RTW88_8821CU=m
 CONFIG_RTW88_8821AU=m
 CONFIG_RTW88_8812AU=m
+# CONFIG_RTW88_8814AE is not set
+CONFIG_RTW88_8814AU=m
 # CONFIG_RTW88_DEBUG is not set
 # CONFIG_RTW88_DEBUGFS is not set
 CONFIG_RTW88_LEDS=y
@@ -3180,6 +3193,7 @@ CONFIG_PINCTRL_MESON_AXG_PMX=y
 CONFIG_PINCTRL_MESON_G12A=y
 CONFIG_PINCTRL_MESON_A1=y
 CONFIG_PINCTRL_MESON_S4=y
+CONFIG_PINCTRL_AMLOGIC_A4=y
 CONFIG_PINCTRL_AMLOGIC_C3=y
 CONFIG_PINCTRL_AMLOGIC_T7=y
 
@@ -3394,6 +3408,7 @@ CONFIG_SENSORS_ARM_SCPI=y
 CONFIG_SENSORS_GPIO_FAN=m
 # CONFIG_SENSORS_HIH6130 is not set
 # CONFIG_SENSORS_HS3001 is not set
+# CONFIG_SENSORS_HTU31 is not set
 # CONFIG_SENSORS_IIO_HWMON is not set
 # CONFIG_SENSORS_ISL28022 is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -3657,6 +3672,7 @@ CONFIG_MFD_CORE=y
 # CONFIG_MFD_MAX77650 is not set
 # CONFIG_MFD_MAX77686 is not set
 # CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77705 is not set
 # CONFIG_MFD_MAX77714 is not set
 # CONFIG_MFD_MAX77843 is not set
 # CONFIG_MFD_MAX8907 is not set
@@ -3673,7 +3689,6 @@ CONFIG_MFD_CORE=y
 # CONFIG_MFD_VIPERBOARD is not set
 # CONFIG_MFD_NTXEC is not set
 # CONFIG_MFD_RETU is not set
-# CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_SY7636A is not set
 # CONFIG_MFD_RDC321X is not set
 # CONFIG_MFD_RT4831 is not set
@@ -3785,6 +3800,7 @@ CONFIG_REGULATOR_GPIO=y
 # CONFIG_REGULATOR_MT6311 is not set
 # CONFIG_REGULATOR_MT6315 is not set
 # CONFIG_REGULATOR_PCA9450 is not set
+# CONFIG_REGULATOR_PF9453 is not set
 # CONFIG_REGULATOR_PF8X00 is not set
 # CONFIG_REGULATOR_PFUZE100 is not set
 # CONFIG_REGULATOR_PV88060 is not set
@@ -3870,6 +3886,7 @@ CONFIG_CEC_NOTIFIER=y
 # CONFIG_MEDIA_CEC_RC is not set
 CONFIG_MEDIA_CEC_SUPPORT=y
 # CONFIG_CEC_CH7322 is not set
+# CONFIG_CEC_NXP_TDA9950 is not set
 CONFIG_CEC_MESON_AO=y
 CONFIG_CEC_MESON_G12A_AO=y
 # CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set
@@ -4602,15 +4619,6 @@ CONFIG_DRM_GEM_DMA_HELPER=y
 CONFIG_DRM_GEM_SHMEM_HELPER=m
 CONFIG_DRM_SCHED=y
 
-#
-# I2C encoder or helper chips
-#
-# CONFIG_DRM_I2C_CH7006 is not set
-# CONFIG_DRM_I2C_SIL164 is not set
-# CONFIG_DRM_I2C_NXP_TDA998X is not set
-# CONFIG_DRM_I2C_NXP_TDA9950 is not set
-# end of I2C encoder or helper chips
-
 #
 # ARM devices
 #
@@ -4692,6 +4700,7 @@ CONFIG_DRM_PANEL=y
 # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
 # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
 # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
+# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set
 # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
 # CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set
 # CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set
@@ -4727,6 +4736,7 @@ CONFIG_DRM_PANEL=y
 # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set
 # CONFIG_DRM_PANEL_EDP is not set
 # CONFIG_DRM_PANEL_SIMPLE is not set
+# CONFIG_DRM_PANEL_SUMMIT is not set
 # CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set
 # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set
 # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
@@ -4735,6 +4745,7 @@ CONFIG_DRM_PANEL=y
 # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
 # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set
 # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
+# CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set
 # CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set
 # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set
 # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set
@@ -4749,6 +4760,7 @@ CONFIG_DRM_PANEL_BRIDGE=y
 # CONFIG_DRM_CHIPONE_ICN6211 is not set
 # CONFIG_DRM_CHRONTEL_CH7033 is not set
 CONFIG_DRM_DISPLAY_CONNECTOR=y
+# CONFIG_DRM_I2C_NXP_TDA998X is not set
 # CONFIG_DRM_ITE_IT6263 is not set
 # CONFIG_DRM_ITE_IT6505 is not set
 # CONFIG_DRM_LONTIUM_LT8912B is not set
@@ -4801,6 +4813,7 @@ CONFIG_DRM_ETNAVIV_THERMAL=y
 CONFIG_DRM_MESON=y
 CONFIG_DRM_MESON_DW_HDMI=y
 CONFIG_DRM_MESON_DW_MIPI_DSI=y
+# CONFIG_DRM_APPLETBDRM is not set
 # CONFIG_DRM_ARCPGU is not set
 # CONFIG_DRM_BOCHS is not set
 # CONFIG_DRM_CIRRUS_QEMU is not set
@@ -5084,6 +5097,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set
 # CONFIG_SND_SOC_AW8738 is not set
 # CONFIG_SND_SOC_AW88395 is not set
+# CONFIG_SND_SOC_AW88166 is not set
 # CONFIG_SND_SOC_AW88261 is not set
 # CONFIG_SND_SOC_AW88081 is not set
 # CONFIG_SND_SOC_AW87390 is not set
@@ -5284,6 +5298,8 @@ CONFIG_HID_A4TECH=y
 # CONFIG_HID_ACRUX is not set
 CONFIG_HID_APPLE=y
 # CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_APPLETB_BL is not set
+# CONFIG_HID_APPLETB_KBD is not set
 CONFIG_HID_ASUS=y
 CONFIG_HID_AUREAL=y
 # CONFIG_HID_BELKIN is not set
@@ -5698,6 +5714,7 @@ CONFIG_TYPEC_UCSI=m
 # CONFIG_TYPEC_MUX_PI3USB30532 is not set
 # CONFIG_TYPEC_MUX_IT5205 is not set
 # CONFIG_TYPEC_MUX_NB7VPQ904M is not set
+# CONFIG_TYPEC_MUX_PS883X is not set
 # CONFIG_TYPEC_MUX_PTN36502 is not set
 # CONFIG_TYPEC_MUX_TUSB1046 is not set
 # CONFIG_TYPEC_MUX_WCD939X_USBSS is not set
@@ -5843,7 +5860,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 # CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set
 
 #
-# Simple LED drivers
+# Simatic LED drivers
 #
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
@@ -6009,7 +6026,6 @@ CONFIG_RTL8723BS=m
 # Accelerometers
 #
 # CONFIG_ADIS16203 is not set
-# CONFIG_ADIS16240 is not set
 # end of Accelerometers
 
 #
@@ -6367,12 +6383,15 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # Analog to digital converters
 #
 # CONFIG_AD4000 is not set
+# CONFIG_AD4030 is not set
 # CONFIG_AD4130 is not set
 # CONFIG_AD4695 is not set
+# CONFIG_AD4851 is not set
 # CONFIG_AD7091R5 is not set
 # CONFIG_AD7091R8 is not set
 # CONFIG_AD7124 is not set
 # CONFIG_AD7173 is not set
+# CONFIG_AD7191 is not set
 # CONFIG_AD7192 is not set
 # CONFIG_AD7266 is not set
 # CONFIG_AD7280 is not set
@@ -6438,6 +6457,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_TI_ADC161S626 is not set
 # CONFIG_TI_ADS1015 is not set
 # CONFIG_TI_ADS1119 is not set
+# CONFIG_TI_ADS7138 is not set
 # CONFIG_TI_ADS7924 is not set
 # CONFIG_TI_ADS1100 is not set
 # CONFIG_TI_ADS1298 is not set
@@ -6656,6 +6676,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_ADIS16460 is not set
 # CONFIG_ADIS16475 is not set
 # CONFIG_ADIS16480 is not set
+# CONFIG_ADIS16550 is not set
 # CONFIG_BMI160_I2C is not set
 # CONFIG_BMI160_SPI is not set
 # CONFIG_BMI270_I2C is not set
@@ -6681,8 +6702,10 @@ CONFIG_MESON_SARADC=y
 #
 # CONFIG_ADJD_S311 is not set
 # CONFIG_ADUX1020 is not set
+# CONFIG_AL3000A is not set
 # CONFIG_AL3010 is not set
 # CONFIG_AL3320A is not set
+# CONFIG_APDS9160 is not set
 # CONFIG_APDS9300 is not set
 # CONFIG_APDS9306 is not set
 # CONFIG_APDS9960 is not set
@@ -6755,6 +6778,7 @@ CONFIG_MESON_SARADC=y
 # CONFIG_SENSORS_HMC5843_SPI is not set
 # CONFIG_SENSORS_RM3100_I2C is not set
 # CONFIG_SENSORS_RM3100_SPI is not set
+# CONFIG_SI7210 is not set
 # CONFIG_TI_TMAG5273 is not set
 # CONFIG_YAMAHA_YAS530 is not set
 # end of Magnetometer sensors
@@ -6951,7 +6975,6 @@ CONFIG_PHY_MESON_AXG_MIPI_DPHY=y
 # CONFIG_PHY_CADENCE_SALVO is not set
 # CONFIG_PHY_PXA_28NM_HSIC is not set
 # CONFIG_PHY_PXA_28NM_USB2 is not set
-# CONFIG_PHY_LAN966X_SERDES is not set
 # CONFIG_PHY_CPCAP_USB is not set
 # CONFIG_PHY_MAPPHONE_MDM6600 is not set
 # CONFIG_PHY_OCELOT_SERDES is not set
@@ -7217,7 +7240,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
 # CONFIG_QNX6FS_FS is not set
 # CONFIG_ROMFS_FS is not set
 # CONFIG_PSTORE is not set
-# CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
 # CONFIG_EROFS_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
@@ -7343,10 +7365,9 @@ CONFIG_KEY_DH_OPERATIONS=y
 CONFIG_PROC_MEM_ALWAYS_FORCE=y
 # CONFIG_PROC_MEM_FORCE_PTRACE is not set
 # CONFIG_PROC_MEM_NO_FORCE is not set
+# CONFIG_MSEAL_SYSTEM_MAPPINGS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_HARDENED_USERCOPY is not set
-# CONFIG_FORTIFY_SOURCE is not set
 # CONFIG_STATIC_USERMODEHELPER is not set
 CONFIG_DEFAULT_SECURITY_DAC=y
 CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor"
@@ -7371,6 +7392,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y
 # CONFIG_ZERO_CALL_USED_REGS is not set
 # end of Memory initialization
 
+#
+# Bounds checking
+#
+# CONFIG_FORTIFY_SOURCE is not set
+# CONFIG_HARDENED_USERCOPY is not set
+# end of Bounds checking
+
 #
 # Hardening of kernel data structures
 #
@@ -7417,6 +7445,7 @@ CONFIG_CRYPTO_NULL2=y
 CONFIG_CRYPTO_PCRYPT=y
 CONFIG_CRYPTO_CRYPTD=y
 CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_KRB5ENC is not set
 # CONFIG_CRYPTO_TEST is not set
 CONFIG_CRYPTO_ENGINE=y
 # end of Crypto core or helper
@@ -7516,8 +7545,6 @@ CONFIG_CRYPTO_XXHASH=y
 #
 CONFIG_CRYPTO_CRC32C=y
 CONFIG_CRYPTO_CRC32=y
-CONFIG_CRYPTO_CRCT10DIF=y
-CONFIG_CRYPTO_CRC64_ROCKSOFT=y
 # end of CRCs (cyclic redundancy checks)
 
 #
@@ -7566,7 +7593,7 @@ CONFIG_CRYPTO_CHACHA20_NEON=y
 # Accelerated Cryptographic Algorithms for CPU (arm64)
 #
 CONFIG_CRYPTO_GHASH_ARM64_CE=y
-CONFIG_CRYPTO_POLY1305_NEON=y
+CONFIG_CRYPTO_POLY1305_NEON=m
 CONFIG_CRYPTO_SHA1_ARM64_CE=y
 CONFIG_CRYPTO_SHA256_ARM64=y
 CONFIG_CRYPTO_SHA2_ARM64_CE=y
@@ -7627,6 +7654,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS=""
 # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
 # end of Certificates for signature checking
 
+# CONFIG_CRYPTO_KRB5 is not set
 CONFIG_BINARY_PRINTF=y
 
 #
@@ -7660,17 +7688,17 @@ CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
 CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y
 CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y
 CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=y
-CONFIG_CRYPTO_LIB_CHACHA=y
+CONFIG_CRYPTO_LIB_CHACHA=m
-CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y
+CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m
-CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=y
+CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m
-CONFIG_CRYPTO_LIB_CURVE25519=y
+CONFIG_CRYPTO_LIB_CURVE25519=m
 CONFIG_CRYPTO_LIB_DES=y
 CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y
 CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y
-CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=y
+CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m
-CONFIG_CRYPTO_LIB_POLY1305=y
+CONFIG_CRYPTO_LIB_POLY1305=m
-CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y
+CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
 CONFIG_CRYPTO_LIB_SHA1=y
 CONFIG_CRYPTO_LIB_SHA256=y
 # end of Crypto library routines
@@ -7680,16 +7708,12 @@ CONFIG_CRC16=y
 CONFIG_CRC_T10DIF=y
 CONFIG_ARCH_HAS_CRC_T10DIF=y
 CONFIG_CRC_T10DIF_ARCH=y
-CONFIG_CRC64_ROCKSOFT=y
 CONFIG_CRC_ITU_T=y
 CONFIG_CRC32=y
 CONFIG_ARCH_HAS_CRC32=y
 CONFIG_CRC32_ARCH=y
 CONFIG_CRC64=y
-# CONFIG_CRC4 is not set
 CONFIG_CRC7=y
-CONFIG_LIBCRC32C=m
-# CONFIG_CRC8 is not set
 CONFIG_CRC_OPTIMIZATIONS=y
 CONFIG_XXHASH=y
 CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
@@ -7768,6 +7792,7 @@ CONFIG_HAVE_GENERIC_VDSO=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
 CONFIG_GENERIC_VDSO_TIME_NS=y
 CONFIG_VDSO_GETRANDOM=y
+CONFIG_GENERIC_VDSO_DATA_STORE=y
 CONFIG_FONT_SUPPORT=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
@@ -7880,7 +7905,7 @@ CONFIG_SLUB_DEBUG=y
 # CONFIG_DEBUG_RODATA_TEST is not set
 CONFIG_ARCH_HAS_DEBUG_WX=y
 # CONFIG_DEBUG_WX is not set
-CONFIG_GENERIC_PTDUMP=y
+CONFIG_ARCH_HAS_PTDUMP=y
 # CONFIG_PTDUMP_DEBUGFS is not set
 CONFIG_HAVE_DEBUG_KMEMLEAK=y
 # CONFIG_DEBUG_KMEMLEAK is not set
@@ -7890,6 +7915,7 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_SCHED_STACK_END_CHECK is not set
 CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y
+# CONFIG_DEBUG_VFS is not set
 # CONFIG_DEBUG_VM is not set
 # CONFIG_DEBUG_VM_PGTABLE is not set
 CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
@@ -7928,7 +7954,6 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y
 #
 # Scheduler Debugging
 #
-# CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 # end of Scheduler Debugging
 
@@ -7993,6 +8018,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_SAMPLES is not set
@@ -8027,3 +8053,5 @@ CONFIG_ARCH_USE_MEMTEST=y
 #
 # end of Rust hacking
 # end of Kernel hacking
+
+CONFIG_IO_URING_ZCRX=y