From 19bfc50052317a4913b164d127be5626bc752555 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 14 Dec 2020 23:33:19 +0100 Subject: [PATCH 1/2] linux: update to 5.10.1 --- packages/linux/package.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/linux/package.mk b/packages/linux/package.mk index 9f65746d25..dfac781b2d 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -22,8 +22,8 @@ case "$LINUX" in PKG_SOURCE_NAME="linux-$LINUX-$PKG_VERSION.tar.gz" ;; *) - PKG_VERSION="5.9.11" - PKG_SHA256="5eb20a65a410669928f94b3975872e493fa6d0fe441c6a78b7564affa2a5d260" + PKG_VERSION="5.10.1" + PKG_SHA256="ed1661128c9bd3e8c9f55e345f715b90fefcf6b127c77e0286773242e7a14e5c" PKG_URL="https://www.kernel.org/pub/linux/kernel/v5.x/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_PATCH_DIRS="default" ;; From 6cba285b563111ae88e88df0f87f54740f49c687 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 14 Dec 2020 23:34:08 +0100 Subject: [PATCH 2/2] Allwinner: update patches to Linux 5.10 --- projects/Allwinner/linux/linux.aarch64.conf | 186 +- projects/Allwinner/linux/linux.arm.conf | 160 +- .../linux/0001-backport-from-5.10.patch | 3060 ----------------- .../linux/0001-backport-from-5.11.patch | 45 + .../linux/0005-cedrus-improvements.patch | 30 - .../linux/0006-wip-cec-improvements.patch | 2 +- .../patches/linux/0007-drm-fixes.patch | 2 +- 7 files changed, 291 insertions(+), 3194 deletions(-) delete mode 100644 projects/Allwinner/patches/linux/0001-backport-from-5.10.patch create mode 100644 projects/Allwinner/patches/linux/0001-backport-from-5.11.patch diff --git a/projects/Allwinner/linux/linux.aarch64.conf b/projects/Allwinner/linux/linux.aarch64.conf index 4c6e67b678..aa77b96ca7 100644 --- a/projects/Allwinner/linux/linux.aarch64.conf +++ b/projects/Allwinner/linux/linux.aarch64.conf @@ -1,12 +1,13 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.9.0 Kernel Configuration +# Linux/arm64 5.10.0 Kernel Configuration # CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y @@ -49,6 +50,7 @@ CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_IRQ_MSI_IOMMU=y @@ -111,6 +113,7 @@ CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y CONFIG_TASKS_RCU=y +CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y # end of RCU Subsystem @@ -185,6 +188,7 @@ CONFIG_INITRAMFS_COMPRESSION_LZ4=y # CONFIG_BOOT_CONFIG is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y @@ -219,6 +223,7 @@ CONFIG_BPF_SYSCALL=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y # CONFIG_BPF_JIT_ALWAYS_ON is not set CONFIG_BPF_JIT_DEFAULT_ON=y +# CONFIG_BPF_PRELOAD is not set # CONFIG_USERFAULTFD is not set CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y @@ -250,7 +255,8 @@ CONFIG_ARM64=y CONFIG_64BIT=y CONFIG_MMU=y CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=33 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 @@ -313,6 +319,7 @@ CONFIG_ARCH_SUNXI=y # CONFIG_ARCH_THUNDER2 is not set # CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set # CONFIG_ARCH_XGENE is not set # CONFIG_ARCH_ZX is not set # CONFIG_ARCH_ZYNQMP is not set @@ -343,6 +350,7 @@ CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y CONFIG_CAVIUM_ERRATUM_22375=y CONFIG_CAVIUM_ERRATUM_23144=y CONFIG_CAVIUM_ERRATUM_23154=y @@ -394,7 +402,6 @@ CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_SECCOMP=y # CONFIG_PARAVIRT is not set # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_KEXEC=y @@ -403,8 +410,6 @@ CONFIG_CRASH_DUMP=y # CONFIG_XEN is not set CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_ARM64_SSBD=y CONFIG_RODATA_FULL_DEFAULT_ENABLED=y # CONFIG_ARM64_SW_TTBR0_PAN is not set CONFIG_ARM64_TAGGED_ADDR_ABI=y @@ -456,6 +461,8 @@ CONFIG_ARM64_BTI=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y CONFIG_ARM64_E0PD=y CONFIG_ARCH_RANDOM=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y # end of ARMv8.5 architectural features CONFIG_ARM64_SVE=y @@ -476,6 +483,7 @@ CONFIG_CMDLINE="" CONFIG_SYSVIPC_COMPAT=y CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_ARCH_ENABLE_THP_MIGRATION=y # # Power management options @@ -564,7 +572,6 @@ CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_GOOGLE_FIRMWARE is not set -CONFIG_EFI_EARLYCON=y CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set CONFIG_HAVE_ARM_SMCCC=y @@ -604,6 +611,7 @@ CONFIG_CRYPTO_AES_ARM64_BS=m # CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y +CONFIG_SET_FS=y # CONFIG_KPROBES is not set CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set @@ -637,7 +645,9 @@ CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y @@ -646,6 +656,7 @@ CONFIG_STACKPROTECTOR_STRONG=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y @@ -668,9 +679,9 @@ CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y # # GCOV-based kernel profiling @@ -806,6 +817,7 @@ CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_FRAME_VECTOR=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_BENCHMARK is not set # CONFIG_READ_ONLY_THP_FOR_FS is not set @@ -1488,6 +1500,11 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_ONENAND is not set # CONFIG_MTD_RAW_NAND is not set # CONFIG_MTD_SPI_NAND is not set + +# +# ECC engine support +# +# end of ECC engine support # end of NAND # @@ -1510,7 +1527,6 @@ CONFIG_OF_DYNAMIC=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_NET=y -CONFIG_OF_MDIO=y CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y CONFIG_OF_OVERLAY=y @@ -1555,6 +1571,7 @@ CONFIG_BLK_DEV_NBD=m CONFIG_SRAM=y # CONFIG_XILINX_SDFEC is not set # CONFIG_PVPANIC is not set +# CONFIG_HISI_HIKEY_USB is not set # CONFIG_C2PORT is not set # @@ -1579,13 +1596,6 @@ CONFIG_EEPROM_93CX6=m # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set - -# -# Intel MIC & related support -# -# CONFIG_VOP_BUS is not set -# end of Intel MIC & related support - # CONFIG_ECHO is not set # CONFIG_MISC_RTSX_USB is not set # CONFIG_UACCE is not set @@ -1821,6 +1831,7 @@ CONFIG_STMMAC_PLATFORM=y CONFIG_DWMAC_GENERIC=y CONFIG_DWMAC_SUNXI=m CONFIG_DWMAC_SUN8I=m +# CONFIG_DWMAC_INTEL_PLAT is not set CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_VIA=y @@ -1829,56 +1840,33 @@ CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5100 is not set # CONFIG_WIZNET_W5300 is not set # CONFIG_NET_VENDOR_XILINX is not set -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_BCM_UNIMAC is not set -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_GPIO is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=y -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_MVUSB is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_SUN4I is not set -CONFIG_MDIO_XPCS=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y # CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set # # MII PHY device drivers # -# CONFIG_SFP is not set -# CONFIG_ADIN_PHY is not set CONFIG_AC200_PHY=y # CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set # CONFIG_AQUANTIA_PHY is not set # CONFIG_AX88796B_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set # CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set # CONFIG_DAVICOM_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -CONFIG_FIXED_PHY=y # CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set # CONFIG_INTEL_XWAY_PHY is not set # CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_LXT_PHY is not set CONFIG_MARVELL_PHY=m CONFIG_MARVELL_10G_PHY=m CONFIG_MICREL_PHY=y @@ -1892,12 +1880,46 @@ CONFIG_AT803X_PHY=m CONFIG_REALTEK_PHY=y # CONFIG_RENESAS_PHY is not set CONFIG_ROCKCHIP_PHY=y -# CONFIG_SMSC_PHY is not set +CONFIG_SMSC_PHY=m # CONFIG_STE10XP is not set # CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_SUN4I is not set +CONFIG_MDIO_BITBANG=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + # CONFIG_PPP is not set # CONFIG_SLIP is not set CONFIG_USB_NET_DRIVERS=y @@ -2121,6 +2143,7 @@ CONFIG_KEYBOARD_GPIO_POLLED=y CONFIG_INPUT_JOYSTICK=y # CONFIG_JOYSTICK_ANALOG is not set # CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADC is not set # CONFIG_JOYSTICK_ADI is not set # CONFIG_JOYSTICK_COBRA is not set # CONFIG_JOYSTICK_GF2K is not set @@ -2215,6 +2238,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_TOUCHSCREEN_ZINITIX is not set CONFIG_INPUT_MISC=y # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_ATMEL_CAPTOUCH is not set @@ -2256,6 +2280,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set +# CONFIG_RMI4_F3A is not set # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set @@ -2352,15 +2377,18 @@ CONFIG_SERIAL_MCTRL_GPIO=y # CONFIG_HVC_DCC is not set CONFIG_SERIAL_DEV_BUS=y CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_VIRTIO_CONSOLE is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_IPMB_DEVICE_INTERFACE is not set -CONFIG_HW_RANDOM=m +CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_BA431 is not set # CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y # CONFIG_TCG_TIS is not set # CONFIG_TCG_TIS_SPI is not set # CONFIG_TCG_TIS_I2C_ATMEL is not set @@ -2440,6 +2468,7 @@ CONFIG_I2C_RK3X=y # CONFIG_I2C_STUB is not set CONFIG_I2C_SLAVE=y # CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_SLAVE_TESTUNIT is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set @@ -2532,6 +2561,12 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_RK805 is not set # CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + CONFIG_PINCTRL_SUNXI=y # CONFIG_PINCTRL_SUN4I_A10 is not set # CONFIG_PINCTRL_SUN5I is not set @@ -2549,6 +2584,8 @@ CONFIG_PINCTRL_SUN8I_H3_R=y # CONFIG_PINCTRL_SUN9I_A80_R is not set CONFIG_PINCTRL_SUN50I_A64=y CONFIG_PINCTRL_SUN50I_A64_R=y +# CONFIG_PINCTRL_SUN50I_A100 is not set +# CONFIG_PINCTRL_SUN50I_A100_R is not set CONFIG_PINCTRL_SUN50I_H5=y CONFIG_PINCTRL_SUN50I_H6=y CONFIG_PINCTRL_SUN50I_H6_R=y @@ -2558,6 +2595,8 @@ CONFIG_OF_GPIO=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set # CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y CONFIG_GPIO_GENERIC=y # @@ -2622,8 +2661,6 @@ CONFIG_GPIO_MAX77620=y # CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set -CONFIG_POWER_AVS=y -# CONFIG_QCOM_CPR is not set CONFIG_POWER_RESET=y CONFIG_POWER_RESET_BRCMSTB=y # CONFIG_POWER_RESET_GPIO is not set @@ -2648,7 +2685,6 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_LEGO_EV3 is not set CONFIG_BATTERY_SBS=m # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set @@ -2672,6 +2708,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ2515X is not set # CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set @@ -2749,6 +2786,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_MAX31790 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM70 is not set @@ -2944,6 +2982,7 @@ CONFIG_MFD_RK808=y # CONFIG_MFD_RN5T618 is not set CONFIG_MFD_SEC_CORE=y # CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SL28CPLD is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set # CONFIG_ABX500_CORE is not set @@ -2990,6 +3029,7 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_STMFX is not set CONFIG_MFD_VEXPRESS_SYSREG=y # CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC is not set # end of Multifunction device drivers CONFIG_REGULATOR=y @@ -3035,7 +3075,10 @@ CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set CONFIG_REGULATOR_PWM=y +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set # CONFIG_REGULATOR_S2MPA01 is not set CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_S5M8767 is not set @@ -3304,9 +3347,9 @@ CONFIG_SMS_SIANO_RC=y # CONFIG_V4L_PLATFORM_DRIVERS is not set CONFIG_V4L_MEM2MEM_DRIVERS=y # CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_SUN50I_DEINTERLACE=m CONFIG_VIDEO_SUN8I_DEINTERLACE=m CONFIG_VIDEO_SUN8I_ROTATE=m -CONFIG_VIDEO_SUN50I_DEINTERLACE=m CONFIG_DVB_PLATFORM_DRIVERS=y # @@ -3638,7 +3681,6 @@ CONFIG_DRM_I2C_SIL164=m # CONFIG_DRM_UDL is not set # CONFIG_DRM_RCAR_DW_HDMI is not set # CONFIG_DRM_RCAR_LVDS is not set -CONFIG_DRM_RCAR_WRITEBACK=y CONFIG_DRM_SUN4I=y # CONFIG_DRM_SUN4I_HDMI is not set # CONFIG_DRM_SUN4I_BACKEND is not set @@ -3683,6 +3725,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CDNS_DSI is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y +# CONFIG_DRM_LONTIUM_LT9611 is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set # CONFIG_DRM_NWL_MIPI_DSI is not set @@ -3694,9 +3737,11 @@ CONFIG_DRM_DISPLAY_CONNECTOR=y # CONFIG_DRM_SII9234 is not set CONFIG_DRM_SIMPLE_BRIDGE=y # CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set # CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI86 is not set # CONFIG_DRM_TI_TPD12S015 is not set @@ -3704,6 +3749,7 @@ CONFIG_DRM_ANALOGIX_ANX6345=m # CONFIG_DRM_ANALOGIX_ANX78XX is not set CONFIG_DRM_ANALOGIX_DP=m # CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set CONFIG_DRM_DW_HDMI_I2S_AUDIO=y @@ -3781,6 +3827,7 @@ CONFIG_LCD_CLASS_DEVICE=m # CONFIG_LCD_HX8357 is not set # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set CONFIG_BACKLIGHT_PWM=m # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set @@ -3945,6 +3992,7 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set @@ -4002,6 +4050,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_STI_SAS is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set # CONFIG_SND_SOC_TAS2770 is not set # CONFIG_SND_SOC_TAS5086 is not set # CONFIG_SND_SOC_TAS571X is not set @@ -4103,6 +4152,7 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set CONFIG_HID_GLORIOUS=m # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=m @@ -4202,6 +4252,7 @@ CONFIG_USB=y # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set # CONFIG_USB_DYNAMIC_MINORS is not set CONFIG_USB_OTG=y # CONFIG_USB_OTG_PRODUCTLIST is not set @@ -4488,6 +4539,7 @@ CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA955X is not set @@ -4591,6 +4643,7 @@ CONFIG_RTC_DRV_RK808=m # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y # CONFIG_RTC_DRV_SD3078 is not set @@ -4786,7 +4839,6 @@ CONFIG_RTL8723BS=m CONFIG_STAGING_MEDIA=y CONFIG_VIDEO_SUNXI=y CONFIG_VIDEO_SUNXI_CEDRUS=y -CONFIG_VIDEO_USBVISION=m # # Android @@ -4810,14 +4862,12 @@ CONFIG_VIDEO_USBVISION=m # CONFIG_FIELDBUS_DEV is not set # CONFIG_WFX is not set # CONFIG_GOLDFISH is not set -# CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX77686 is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_RK808 is not set @@ -4839,6 +4889,8 @@ CONFIG_COMMON_CLK_PWM=y # CONFIG_CLK_SUNXI is not set CONFIG_SUNXI_CCU=y CONFIG_SUN50I_A64_CCU=y +# CONFIG_SUN50I_A100_CCU is not set +# CONFIG_SUN50I_A100_R_CCU is not set CONFIG_SUN50I_H6_CCU=y CONFIG_SUN50I_H6_R_CCU=y # CONFIG_SUN8I_A83T_CCU is not set @@ -4988,13 +5040,17 @@ CONFIG_MEMORY=y CONFIG_IIO=y CONFIG_IIO_BUFFER=y # CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set # CONFIG_IIO_BUFFER_HW_CONSUMER is not set CONFIG_IIO_KFIFO_BUF=m +# CONFIG_IIO_TRIGGERED_BUFFER is not set # CONFIG_IIO_CONFIGFS is not set CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set +# CONFIG_IIO_TRIGGERED_EVENT is not set # # Accelerometers @@ -5202,6 +5258,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADIS16130 is not set # CONFIG_ADIS16136 is not set # CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set # CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set # CONFIG_FXAS21002C is not set @@ -5230,6 +5287,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set # CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5264,6 +5322,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -5461,6 +5520,7 @@ CONFIG_RESET_SUNXI=y # CONFIG_GENERIC_PHY=y CONFIG_PHY_XGENE=y +# CONFIG_USB_LGM_PHY is not set CONFIG_PHY_SUN4I_USB=y # CONFIG_PHY_SUN6I_MIPI_DPHY is not set # CONFIG_PHY_SUN9I_USB is not set @@ -5491,6 +5551,7 @@ CONFIG_PHY_SAMSUNG_USB2=y # # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set CONFIG_ARM_PMU=y # CONFIG_ARM_DSU_PMU is not set # CONFIG_ARM_SPE_PMU is not set @@ -5547,6 +5608,7 @@ CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m +CONFIG_XFS_SUPPORT_V4=y # CONFIG_XFS_QUOTA is not set # CONFIG_XFS_POSIX_ACL is not set # CONFIG_XFS_RT is not set @@ -5729,6 +5791,7 @@ CONFIG_ROOT_NFS=y # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set # CONFIG_NFSD is not set CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y @@ -5903,6 +5966,7 @@ CONFIG_CRYPTO_DH=y CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # @@ -6013,6 +6077,7 @@ CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_USER_API_SKCIPHER=y # CONFIG_CRYPTO_USER_API_RNG is not set CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y # @@ -6038,8 +6103,13 @@ CONFIG_CRYPTO_DEV_ALLWINNER=y # CONFIG_CRYPTO_DEV_SUN4I_SS is not set CONFIG_CRYPTO_DEV_SUN8I_CE=y # CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_CE_HASH=y +CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG=y +CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG=y CONFIG_CRYPTO_DEV_SUN8I_SS=y # CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG=y +CONFIG_CRYPTO_DEV_SUN8I_SS_HASH=y # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set # CONFIG_CRYPTO_DEV_CCP is not set @@ -6145,6 +6215,7 @@ CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_REMAP=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_CMA=y +CONFIG_DMA_PERNUMA_CMA=y # # Default contiguous memory area size: @@ -6175,6 +6246,7 @@ CONFIG_FONT_SUPPORT=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y CONFIG_SBITMAP=y # CONFIG_STRING_SELFTEST is not set # end of Library routines @@ -6314,6 +6386,8 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set +# CONFIG_CSD_LOCK_WAIT_DEBUG is not set # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_STACKTRACE is not set @@ -6336,7 +6410,7 @@ CONFIG_HAVE_DEBUG_BUGVERBOSE=y # # RCU Debugging # -# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_SCALE_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 @@ -6396,7 +6470,6 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set # CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_BITFIELD is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_OVERFLOW is not set @@ -6418,6 +6491,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set CONFIG_MEMTEST=y # end of Kernel Testing and Coverage # end of Kernel hacking diff --git a/projects/Allwinner/linux/linux.arm.conf b/projects/Allwinner/linux/linux.arm.conf index 8c5c98b464..5a244c1c83 100644 --- a/projects/Allwinner/linux/linux.arm.conf +++ b/projects/Allwinner/linux/linux.arm.conf @@ -1,12 +1,13 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 5.9.0 Kernel Configuration +# Linux/arm 5.10.0 Kernel Configuration # CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-10.2.0 (GCC) 10.2.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=100200 -CONFIG_LD_VERSION=234000000 +CONFIG_LD_VERSION=235010000 CONFIG_CLANG_VERSION=0 +CONFIG_LLD_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y @@ -57,6 +58,7 @@ CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_IRQ_IPI=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y @@ -106,6 +108,8 @@ CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y # end of RCU Subsystem @@ -174,6 +178,7 @@ CONFIG_INITRAMFS_COMPRESSION_NONE=y # CONFIG_BOOT_CONFIG is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_BPF=y @@ -204,6 +209,7 @@ CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_BPF_SYSCALL=y +# CONFIG_BPF_PRELOAD is not set # CONFIG_USERFAULTFD is not set CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y @@ -461,7 +467,6 @@ CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_ALIGNMENT_TRAP=y # CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_SECCOMP=y # CONFIG_PARAVIRT is not set # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set # CONFIG_XEN is not set @@ -603,6 +608,7 @@ CONFIG_AS_VFP_VMRS_FPINST=y # # General architecture-dependent options # +CONFIG_SET_FS=y CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set # CONFIG_JUMP_LABEL is not set @@ -628,7 +634,9 @@ CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_STACKPROTECTOR=y # CONFIG_STACKPROTECTOR is not set @@ -654,6 +662,7 @@ CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_ARCH_HAS_PHYS_TO_DMA=y # CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y # # GCOV-based kernel profiling @@ -1200,6 +1209,7 @@ CONFIG_CAN_RAW=y CONFIG_CAN_BCM=y CONFIG_CAN_GW=y # CONFIG_CAN_J1939 is not set +# CONFIG_CAN_ISOTP is not set # # CAN Device Drivers @@ -1226,6 +1236,7 @@ CONFIG_CAN_CALC_BITTIMING=y # # CONFIG_CAN_HI311X is not set # CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set # end of CAN SPI interfaces # @@ -1419,7 +1430,6 @@ CONFIG_OF_DYNAMIC=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_NET=y -CONFIG_OF_MDIO=y CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y CONFIG_OF_OVERLAY=y @@ -1490,13 +1500,6 @@ CONFIG_EEPROM_93CX6=m # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set - -# -# Intel MIC & related support -# -# CONFIG_VOP_BUS is not set -# end of Intel MIC & related support - # CONFIG_ECHO is not set # CONFIG_MISC_RTSX_USB is not set # end of Misc devices @@ -1703,59 +1706,39 @@ CONFIG_STMMAC_PLATFORM=y CONFIG_DWMAC_GENERIC=y CONFIG_DWMAC_SUNXI=y CONFIG_DWMAC_SUN8I=y +# CONFIG_DWMAC_INTEL_PLAT is not set CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_XILINX is not set -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MMIOREG is not set -# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_IPQ4019 is not set -# CONFIG_MDIO_IPQ8064 is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_MVUSB is not set -CONFIG_MDIO_SUN4I=y -CONFIG_MDIO_XPCS=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y # CONFIG_LED_TRIGGER_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set # # MII PHY device drivers # -# CONFIG_SFP is not set -# CONFIG_ADIN_PHY is not set # CONFIG_AC200_PHY is not set # CONFIG_AMD_PHY is not set +# CONFIG_ADIN_PHY is not set # CONFIG_AQUANTIA_PHY is not set # CONFIG_AX88796B_PHY is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set # CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM84881_PHY is not set +# CONFIG_BCM87XX_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set # CONFIG_DAVICOM_PHY is not set -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83869_PHY is not set -CONFIG_FIXED_PHY=y # CONFIG_ICPLUS_PHY is not set +# CONFIG_LXT_PHY is not set # CONFIG_INTEL_XWAY_PHY is not set # CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_LXT_PHY is not set # CONFIG_MARVELL_PHY is not set # CONFIG_MARVELL_10G_PHY is not set CONFIG_MICREL_PHY=y @@ -1772,9 +1755,41 @@ CONFIG_REALTEK_PHY=y CONFIG_SMSC_PHY=y # CONFIG_STE10XP is not set # CONFIG_TERANETICS_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_DP83869_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set CONFIG_MICREL_KS8995MA=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_SUN4I=y +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MVUSB is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_IPQ4019 is not set +# CONFIG_MDIO_IPQ8064 is not set + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + CONFIG_PPP=m CONFIG_PPP_BSDCOMP=m CONFIG_PPP_DEFLATE=m @@ -1844,6 +1859,7 @@ CONFIG_ATH9K_HTC=m CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y +CONFIG_CARL9170_HWRNG=y CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m @@ -1874,6 +1890,7 @@ CONFIG_B43_PHY_N=y CONFIG_B43_PHY_LP=y CONFIG_B43_PHY_HT=y CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y # CONFIG_B43_DEBUG is not set # CONFIG_B43LEGACY is not set CONFIG_BRCMUTIL=m @@ -2020,6 +2037,7 @@ CONFIG_KEYBOARD_SUN4I_LRADC=y CONFIG_INPUT_JOYSTICK=y # CONFIG_JOYSTICK_ANALOG is not set # CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADC is not set # CONFIG_JOYSTICK_ADI is not set # CONFIG_JOYSTICK_COBRA is not set # CONFIG_JOYSTICK_GF2K is not set @@ -2087,6 +2105,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set +# CONFIG_RMI4_F3A is not set # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set @@ -2178,8 +2197,13 @@ CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_DEV_BUS=y CONFIG_SERIAL_DEV_CTRL_TTYPORT=y # CONFIG_TTY_PRINTK is not set +# CONFIG_VIRTIO_CONSOLE is not set # CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_BA431 is not set +# CONFIG_HW_RANDOM_CCTRNG is not set +# CONFIG_HW_RANDOM_XIPHERA is not set CONFIG_DEVMEM=y CONFIG_DEVKMEM=y # CONFIG_RAW_DRIVER is not set @@ -2336,6 +2360,12 @@ CONFIG_PINCTRL_AXP209=y # CONFIG_PINCTRL_SX150X is not set # CONFIG_PINCTRL_STMFX is not set # CONFIG_PINCTRL_OCELOT is not set + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + CONFIG_PINCTRL_SUNXI=y CONFIG_PINCTRL_SUN4I_A10=y CONFIG_PINCTRL_SUN5I=y @@ -2353,6 +2383,8 @@ CONFIG_PINCTRL_SUN9I_A80=y CONFIG_PINCTRL_SUN9I_A80_R=y # CONFIG_PINCTRL_SUN50I_A64 is not set # CONFIG_PINCTRL_SUN50I_A64_R is not set +# CONFIG_PINCTRL_SUN50I_A100 is not set +# CONFIG_PINCTRL_SUN50I_A100_R is not set # CONFIG_PINCTRL_SUN50I_H5 is not set # CONFIG_PINCTRL_SUN50I_H6 is not set # CONFIG_PINCTRL_SUN50I_H6_R is not set @@ -2362,6 +2394,8 @@ CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y # # Memory mapped GPIO drivers @@ -2424,7 +2458,6 @@ CONFIG_GPIO_SYSFS=y # CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set -# CONFIG_POWER_AVS is not set # CONFIG_POWER_RESET is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set @@ -2437,7 +2470,6 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_LEGO_EV3 is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set @@ -2461,6 +2493,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ2515X is not set # CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set @@ -2537,6 +2570,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_MAX31790 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_MR75203 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM70 is not set @@ -2739,6 +2773,7 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_RN5T618 is not set # CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SL28CPLD is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set # CONFIG_ABX500_CORE is not set @@ -2787,6 +2822,7 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_INTEL_M10_BMC is not set # end of Multifunction device drivers CONFIG_REGULATOR=y @@ -2829,6 +2865,8 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set # CONFIG_REGULATOR_PWM is not set +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set # CONFIG_REGULATOR_SLG51000 is not set CONFIG_REGULATOR_SY8106A=y # CONFIG_REGULATOR_SY8824X is not set @@ -3092,6 +3130,7 @@ CONFIG_SMS_SIANO_RC=y # CONFIG_V4L_PLATFORM_DRIVERS is not set CONFIG_V4L_MEM2MEM_DRIVERS=y # CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SUN50I_DEINTERLACE is not set CONFIG_VIDEO_SUN8I_DEINTERLACE=m CONFIG_VIDEO_SUN8I_ROTATE=m # CONFIG_DVB_PLATFORM_DRIVERS is not set @@ -3102,6 +3141,7 @@ CONFIG_VIDEO_SUN8I_ROTATE=m # # CONFIG_SMS_SDIO_DRV is not set # CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_TEST_DRIVERS is not set # end of Media drivers # @@ -3610,6 +3650,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CDNS_DSI is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=m +# CONFIG_DRM_LONTIUM_LT9611 is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set # CONFIG_DRM_NWL_MIPI_DSI is not set @@ -3621,15 +3662,18 @@ CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_DRM_SII9234 is not set CONFIG_DRM_SIMPLE_BRIDGE=m # CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set # CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI86 is not set # CONFIG_DRM_TI_TPD12S015 is not set # CONFIG_DRM_ANALOGIX_ANX6345 is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set # CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set CONFIG_DRM_DW_HDMI_I2S_AUDIO=y @@ -3845,6 +3889,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set @@ -3902,6 +3947,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_STI_SAS is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS2562 is not set +# CONFIG_SND_SOC_TAS2764 is not set # CONFIG_SND_SOC_TAS2770 is not set # CONFIG_SND_SOC_TAS5086 is not set # CONFIG_SND_SOC_TAS571X is not set @@ -4003,6 +4049,7 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set CONFIG_HID_GLORIOUS=m # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=m @@ -4062,6 +4109,7 @@ CONFIG_HID_TOPSEED=m # CONFIG_HID_THINGM is not set # CONFIG_HID_THRUSTMASTER is not set # CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m CONFIG_HID_XINMO=m @@ -4101,6 +4149,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set # CONFIG_USB_OTG_PRODUCTLIST is not set @@ -4274,6 +4323,7 @@ CONFIG_USB_SERIAL=m # CONFIG_USB_HSIC_USB3503 is not set # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set # # USB Physical Layer drivers @@ -4385,6 +4435,7 @@ CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA955X is not set @@ -4485,6 +4536,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set # CONFIG_RTC_DRV_SD3078 is not set @@ -4669,7 +4721,6 @@ CONFIG_STAGING=y CONFIG_STAGING_MEDIA=y CONFIG_VIDEO_SUNXI=y CONFIG_VIDEO_SUNXI_CEDRUS=y -CONFIG_VIDEO_USBVISION=m # # Android @@ -4693,14 +4744,12 @@ CONFIG_VIDEO_USBVISION=m # CONFIG_FIELDBUS_DEV is not set # CONFIG_WFX is not set # CONFIG_GOLDFISH is not set -# CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set @@ -4838,12 +4887,16 @@ CONFIG_EXTCON=y CONFIG_IIO=y CONFIG_IIO_BUFFER=y # CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set # CONFIG_IIO_BUFFER_HW_CONSUMER is not set # CONFIG_IIO_KFIFO_BUF is not set +# CONFIG_IIO_TRIGGERED_BUFFER is not set CONFIG_IIO_CONFIGFS=y # CONFIG_IIO_TRIGGER is not set # CONFIG_IIO_SW_DEVICE is not set CONFIG_IIO_SW_TRIGGER=y +# CONFIG_IIO_TRIGGERED_EVENT is not set # # Accelerometers @@ -5052,6 +5105,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_ADIS16130 is not set # CONFIG_ADIS16136 is not set # CONFIG_ADIS16260 is not set +# CONFIG_ADXRS290 is not set # CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set # CONFIG_FXAS21002C is not set @@ -5080,6 +5134,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set # CONFIG_HDC100X is not set +# CONFIG_HDC2010 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5114,6 +5169,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set +# CONFIG_AS73211 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -5301,6 +5357,7 @@ CONFIG_RESET_SUNXI=y # CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y +# CONFIG_USB_LGM_PHY is not set CONFIG_PHY_SUN4I_USB=y CONFIG_PHY_SUN6I_MIPI_DPHY=y CONFIG_PHY_SUN9I_USB=y @@ -5387,6 +5444,7 @@ CONFIG_JFS_FS=m # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set CONFIG_XFS_FS=m +CONFIG_XFS_SUPPORT_V4=y # CONFIG_XFS_QUOTA is not set # CONFIG_XFS_POSIX_ACL is not set # CONFIG_XFS_RT is not set @@ -5538,6 +5596,7 @@ CONFIG_ROOT_NFS=y # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y +CONFIG_NFS_V4_2_READ_PLUS=y # CONFIG_NFSD is not set CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y @@ -5693,6 +5752,7 @@ CONFIG_CRYPTO_DH=y CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECRDSA is not set +# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # @@ -5803,6 +5863,7 @@ CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_USER_API_SKCIPHER=y # CONFIG_CRYPTO_USER_API_RNG is not set CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y # @@ -5828,8 +5889,13 @@ CONFIG_CRYPTO_DEV_SUN4I_SS=m # CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG is not set CONFIG_CRYPTO_DEV_SUN8I_CE=m # CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_CE_HASH=y +CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG=y +CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG=y CONFIG_CRYPTO_DEV_SUN8I_SS=m # CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG=y +CONFIG_CRYPTO_DEV_SUN8I_SS_HASH=y # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set # CONFIG_CRYPTO_DEV_SAFEXCEL is not set @@ -5919,6 +5985,7 @@ CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_REMAP=y CONFIG_DMA_CMA=y +# CONFIG_DMA_PERNUMA_CMA is not set # # Default contiguous memory area size: @@ -6071,6 +6138,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_STACKTRACE is not set @@ -6092,7 +6160,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # # RCU Debugging # -# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_SCALE_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 @@ -6158,7 +6226,6 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set # CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_BITFIELD is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_OVERFLOW is not set @@ -6180,6 +6247,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage # end of Kernel hacking diff --git a/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch b/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch deleted file mode 100644 index 42f88e59fb..0000000000 --- a/projects/Allwinner/patches/linux/0001-backport-from-5.10.patch +++ /dev/null @@ -1,3060 +0,0 @@ -From 12bb1887be9dc8ca88fccd4da4d8d9eaae561239 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Mon, 24 Aug 2020 17:04:34 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: Add Mali node - -R40 has Mali400 GP2 GPU. Add a node for it. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200824150434.951693-3-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40.dtsi | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi -index b782041e0e04..b82031b19893 100644 ---- a/arch/arm/boot/dts/sun8i-r40.dtsi -+++ b/arch/arm/boot/dts/sun8i-r40.dtsi -@@ -743,6 +743,28 @@ i2c4: i2c@1c2c000 { - #size-cells = <0>; - }; - -+ mali: gpu@1c40000 { -+ compatible = "allwinner,sun8i-r40-mali", "arm,mali-400"; -+ reg = <0x01c40000 0x10000>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ ; -+ interrupt-names = "gp", -+ "gpmmu", -+ "pp0", -+ "ppmmu0", -+ "pp1", -+ "ppmmu1", -+ "pmu"; -+ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; -+ clock-names = "bus", "core"; -+ resets = <&ccu RST_BUS_GPU>; -+ }; -+ - gmac: ethernet@1c50000 { - compatible = "allwinner,sun8i-r40-gmac"; - syscon = <&ccu>; --- -2.28.0 - -From a3ba99a24b36bc4eee5413a820e2c4f3d81593fa Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 15:10:49 +0200 -Subject: [PATCH] clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for - audio PLL - -Audio cores need specific clock rates which can't be simply obtained by -adjusting integer multipliers and dividers. HW for such cases supports -delta-sigma modulation which enables fractional multipliers. - -Port H3 delta-sigma table to R40. They have identical audio PLLs. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825131049.1277596-1-jernej.skrabec@siol.net ---- - drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 37 ++++++++++++++++++---------- - 1 file changed, 24 insertions(+), 13 deletions(-) - -diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c -index 23bfe1d12f21..84153418453f 100644 ---- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c -+++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c -@@ -45,18 +45,29 @@ static struct ccu_nkmp pll_cpu_clk = { - * the base (2x, 4x and 8x), and one variable divider (the one true - * pll audio). - * -- * We don't have any need for the variable divider for now, so we just -- * hardcode it to match with the clock names -+ * With sigma-delta modulation for fractional-N on the audio PLL, -+ * we have to use specific dividers. This means the variable divider -+ * can no longer be used, as the audio codec requests the exact clock -+ * rates we support through this mechanism. So we now hard code the -+ * variable divider to 1. This means the clock rates will no longer -+ * match the clock names. - */ - #define SUN8I_R40_PLL_AUDIO_REG 0x008 - --static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", -- "osc24M", 0x008, -- 8, 7, /* N */ -- 0, 5, /* M */ -- BIT(31), /* gate */ -- BIT(28), /* lock */ -- CLK_SET_RATE_UNGATE); -+static struct ccu_sdm_setting pll_audio_sdm_table[] = { -+ { .rate = 22579200, .pattern = 0xc0010d84, .m = 8, .n = 7 }, -+ { .rate = 24576000, .pattern = 0xc000ac02, .m = 14, .n = 14 }, -+}; -+ -+static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", -+ "osc24M", 0x008, -+ 8, 7, /* N */ -+ 0, 5, /* M */ -+ pll_audio_sdm_table, BIT(24), -+ 0x284, BIT(31), -+ BIT(31), /* gate */ -+ BIT(28), /* lock */ -+ CLK_SET_RATE_UNGATE); - - static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video0_clk, "pll-video0", - "osc24M", 0x0010, -@@ -952,10 +963,10 @@ static const struct clk_hw *clk_parent_pll_audio[] = { - &pll_audio_base_clk.common.hw - }; - --/* We hardcode the divider to 4 for now */ -+/* We hardcode the divider to 1 for now */ - static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio", - clk_parent_pll_audio, -- 4, 1, CLK_SET_RATE_PARENT); -+ 1, 1, CLK_SET_RATE_PARENT); - static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x", - clk_parent_pll_audio, - 2, 1, CLK_SET_RATE_PARENT); -@@ -1307,10 +1318,10 @@ static int sun8i_r40_ccu_probe(struct platform_device *pdev) - if (IS_ERR(reg)) - return PTR_ERR(reg); - -- /* Force the PLL-Audio-1x divider to 4 */ -+ /* Force the PLL-Audio-1x divider to 1 */ - val = readl(reg + SUN8I_R40_PLL_AUDIO_REG); - val &= ~GENMASK(19, 16); -- writel(val | (3 << 16), reg + SUN8I_R40_PLL_AUDIO_REG); -+ writel(val | (0 << 16), reg + SUN8I_R40_PLL_AUDIO_REG); - - /* Force PLL-MIPI to MIPI mode */ - val = readl(reg + SUN8I_R40_PLL_MIPI_REG); --- -2.28.0 - -From 5822bfed6472340f882b43d5c2f2629091191c9d Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 12:00:30 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: Add DMA node - -Allwinner R40 SoC has DMA with 16 channels and 31 request sources. - -Add a node for it. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825100030.1145356-3-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40.dtsi | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi -index b82031b19893..d481fe7989b8 100644 ---- a/arch/arm/boot/dts/sun8i-r40.dtsi -+++ b/arch/arm/boot/dts/sun8i-r40.dtsi -@@ -198,6 +198,18 @@ nmi_intc: interrupt-controller@1c00030 { - interrupts = ; - }; - -+ dma: dma-controller@1c02000 { -+ compatible = "allwinner,sun8i-r40-dma", -+ "allwinner,sun50i-a64-dma"; -+ reg = <0x01c02000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_DMA>; -+ dma-channels = <16>; -+ dma-requests = <31>; -+ resets = <&ccu RST_BUS_DMA>; -+ #dma-cells = <1>; -+ }; -+ - spi0: spi@1c05000 { - compatible = "allwinner,sun8i-r40-spi", - "allwinner,sun8i-h3-spi"; --- -2.28.0 - -From 166405e1f89acf7b24d95b90dbd1f78ec1ab3ec6 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 19:13:57 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: Add IR nodes - -Allwinner R40 has two IR cores, add nodes for them. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825171358.1286902-3-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40.dtsi | 36 ++++++++++++++++++++++++++++++++ - 1 file changed, 36 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi -index d481fe7989b8..dff9a3dc1fba 100644 ---- a/arch/arm/boot/dts/sun8i-r40.dtsi -+++ b/arch/arm/boot/dts/sun8i-r40.dtsi -@@ -513,6 +513,16 @@ i2c4_pins: i2c4-pins { - function = "i2c4"; - }; - -+ ir0_pins: ir0-pins { -+ pins = "PB4"; -+ function = "ir0"; -+ }; -+ -+ ir1_pins: ir1-pins { -+ pins = "PB23"; -+ function = "ir1"; -+ }; -+ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; -@@ -591,6 +601,32 @@ wdt: watchdog@1c20c90 { - clocks = <&osc24M>; - }; - -+ ir0: ir@1c21800 { -+ compatible = "allwinner,sun8i-r40-ir", -+ "allwinner,sun6i-a31-ir"; -+ reg = <0x01c21800 0x400>; -+ pinctrl-0 = <&ir0_pins>; -+ pinctrl-names = "default"; -+ clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>; -+ clock-names = "apb", "ir"; -+ interrupts = ; -+ resets = <&ccu RST_BUS_IR0>; -+ status = "disabled"; -+ }; -+ -+ ir1: ir@1c21c00 { -+ compatible = "allwinner,sun8i-r40-ir", -+ "allwinner,sun6i-a31-ir"; -+ reg = <0x01c21c00 0x400>; -+ pinctrl-0 = <&ir1_pins>; -+ pinctrl-names = "default"; -+ clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>; -+ clock-names = "apb", "ir"; -+ interrupts = ; -+ resets = <&ccu RST_BUS_IR1>; -+ status = "disabled"; -+ }; -+ - ths: thermal-sensor@1c24c00 { - compatible = "allwinner,sun8i-r40-ths"; - reg = <0x01c24c00 0x100>; --- -2.28.0 - -From 44406428f5764d7a71be3bafd642c8e02cdd5468 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 19:13:58 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IR - -BananaPi M2 Ultra has IR receiver connected to IR0. - -Enable it. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825171358.1286902-4-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts -index 42d62d1ba1dc..ca6088c87855 100644 ---- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts -+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts -@@ -164,6 +164,10 @@ axp22x: pmic@34 { - - #include "axp22x.dtsi" - -+&ir0 { -+ status = "okay"; -+}; -+ - &mmc0 { - vmmc-supply = <®_dcdc1>; - bus-width = <4>; --- -2.28.0 - -From 3566b0869179779d3abc4b605dcc9d2121d67672 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 19:35:20 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: Add node for system controller - -Allwinner R40 has system controller and SRAM C1 region similar to that -in A10. - -Add nodes for them. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825173523.1289379-3-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40.dtsi | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi -index dff9a3dc1fba..0c7526365896 100644 ---- a/arch/arm/boot/dts/sun8i-r40.dtsi -+++ b/arch/arm/boot/dts/sun8i-r40.dtsi -@@ -190,6 +190,29 @@ mixer1_out_tcon_top: endpoint { - }; - }; - -+ syscon: system-control@1c00000 { -+ compatible = "allwinner,sun8i-r40-system-control", -+ "allwinner,sun4i-a10-system-control"; -+ reg = <0x01c00000 0x30>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ -+ sram_c: sram@1d00000 { -+ compatible = "mmio-sram"; -+ reg = <0x01d00000 0xd0000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x01d00000 0xd0000>; -+ -+ ve_sram: sram-section@0 { -+ compatible = "allwinner,sun8i-r40-sram-c1", -+ "allwinner,sun4i-a10-sram-c1"; -+ reg = <0x000000 0x80000>; -+ }; -+ }; -+ }; -+ - nmi_intc: interrupt-controller@1c00030 { - compatible = "allwinner,sun7i-a20-sc-nmi"; - interrupt-controller; --- -2.28.0 - -From 343bbfd1652964fb52520c4cc232c5a2c679cb21 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 19:35:22 +0200 -Subject: [PATCH] media: cedrus: Add support for R40 - -Video engine in R40 is very similar to that in A33 but it runs on lower -speed, at least according to OS images released by board designer. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825173523.1289379-5-jernej.skrabec@siol.net ---- - drivers/staging/media/sunxi/cedrus/cedrus.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c -index bc27f9430eeb..83a654a618be 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -496,6 +496,11 @@ static const struct cedrus_variant sun8i_h3_cedrus_variant = { - .mod_rate = 402000000, - }; - -+static const struct cedrus_variant sun8i_r40_cedrus_variant = { -+ .capabilities = CEDRUS_CAPABILITY_UNTILED, -+ .mod_rate = 297000000, -+}; -+ - static const struct cedrus_variant sun50i_a64_cedrus_variant = { - .capabilities = CEDRUS_CAPABILITY_UNTILED | - CEDRUS_CAPABILITY_H265_DEC, -@@ -536,6 +541,10 @@ static const struct of_device_id cedrus_dt_match[] = { - .compatible = "allwinner,sun8i-h3-video-engine", - .data = &sun8i_h3_cedrus_variant, - }, -+ { -+ .compatible = "allwinner,sun8i-r40-video-engine", -+ .data = &sun8i_r40_cedrus_variant, -+ }, - { - .compatible = "allwinner,sun50i-a64-video-engine", - .data = &sun50i_a64_cedrus_variant, --- -2.28.0 - -From 2abed6778f38e2cfb90806994dff01de00ca77a6 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 19:35:23 +0200 -Subject: [PATCH] ARM: dts: sun8i: r40: Add video engine node - -Allwinner R40 SoC has a video engine. - -Add a node for it. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard -Link: https://lore.kernel.org/r/20200825173523.1289379-6-jernej.skrabec@siol.net ---- - arch/arm/boot/dts/sun8i-r40.dtsi | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi -index 0c7526365896..7907569e7b5c 100644 ---- a/arch/arm/boot/dts/sun8i-r40.dtsi -+++ b/arch/arm/boot/dts/sun8i-r40.dtsi -@@ -273,6 +273,17 @@ csi0: csi@1c09000 { - status = "disabled"; - }; - -+ video-codec@1c0e000 { -+ compatible = "allwinner,sun8i-r40-video-engine"; -+ reg = <0x01c0e000 0x1000>; -+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, -+ <&ccu CLK_DRAM_VE>; -+ clock-names = "ahb", "mod", "ram"; -+ resets = <&ccu RST_BUS_VE>; -+ interrupts = ; -+ allwinner,sram = <&ve_sram 1>; -+ }; -+ - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun8i-r40-mmc", - "allwinner,sun50i-a64-mmc"; --- -2.28.0 - -From aac4c6e6f64b7bc56f8265cba1374a01322e3262 Mon Sep 17 00:00:00 2001 -From: Pi-Hsun Shih -Date: Fri, 14 Aug 2020 09:11:40 +0200 -Subject: [PATCH] media: v4l2-mem2mem: add v4l2_m2m_suspend, v4l2_m2m_resume - -Add two functions that can be used to stop new jobs from being queued / -continue running queued job. This can be used while a driver using m2m -helper is going to suspend / wake up from resume, and can ensure that -there's no job running in suspend process. - -Signed-off-by: Pi-Hsun Shih -Signed-off-by: Jerry-ch Chen -Reviewed-by: Tomasz Figa -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 911ea8ec42dea0e28083a6e92b1b4a5a0ad5acca) ---- - drivers/media/v4l2-core/v4l2-mem2mem.c | 41 ++++++++++++++++++++++++++++++++++ - include/media/v4l2-mem2mem.h | 22 ++++++++++++++++++ - 2 files changed, 63 insertions(+) - -diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c -index 95a8f2dc5341..6a80240e9228 100644 ---- a/drivers/media/v4l2-core/v4l2-mem2mem.c -+++ b/drivers/media/v4l2-core/v4l2-mem2mem.c -@@ -43,6 +43,10 @@ module_param(debug, bool, 0644); - #define TRANS_ABORT (1 << 2) - - -+/* The job queue is not running new jobs */ -+#define QUEUE_PAUSED (1 << 0) -+ -+ - /* Offset base for buffers on the destination queue - used to distinguish - * between source and destination buffers when mmapping - they receive the same - * offsets but for different queues */ -@@ -84,6 +88,7 @@ static const char * const m2m_entity_name[] = { - * @job_queue: instances queued to run - * @job_spinlock: protects job_queue - * @job_work: worker to run queued jobs. -+ * @job_queue_flags: flags of the queue status, %QUEUE_PAUSED. - * @m2m_ops: driver callbacks - */ - struct v4l2_m2m_dev { -@@ -101,6 +106,7 @@ struct v4l2_m2m_dev { - struct list_head job_queue; - spinlock_t job_spinlock; - struct work_struct job_work; -+ unsigned long job_queue_flags; - - const struct v4l2_m2m_ops *m2m_ops; - }; -@@ -263,6 +269,12 @@ static void v4l2_m2m_try_run(struct v4l2_m2m_dev *m2m_dev) - return; - } - -+ if (m2m_dev->job_queue_flags & QUEUE_PAUSED) { -+ spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags); -+ dprintk("Running new jobs is paused\n"); -+ return; -+ } -+ - m2m_dev->curr_ctx = list_first_entry(&m2m_dev->job_queue, - struct v4l2_m2m_ctx, queue); - m2m_dev->curr_ctx->job_flags |= TRANS_RUNNING; -@@ -504,6 +516,7 @@ void v4l2_m2m_buf_done_and_job_finish(struct v4l2_m2m_dev *m2m_dev, - - if (WARN_ON(!src_buf || !dst_buf)) - goto unlock; -+ v4l2_m2m_buf_done(src_buf, state); - dst_buf->is_held = src_buf->flags & V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF; - if (!dst_buf->is_held) { - v4l2_m2m_dst_buf_remove(m2m_ctx); -@@ -528,6 +541,34 @@ void v4l2_m2m_buf_done_and_job_finish(struct v4l2_m2m_dev *m2m_dev, - } - EXPORT_SYMBOL(v4l2_m2m_buf_done_and_job_finish); - -+void v4l2_m2m_suspend(struct v4l2_m2m_dev *m2m_dev) -+{ -+ unsigned long flags; -+ struct v4l2_m2m_ctx *curr_ctx; -+ -+ spin_lock_irqsave(&m2m_dev->job_spinlock, flags); -+ m2m_dev->job_queue_flags |= QUEUE_PAUSED; -+ curr_ctx = m2m_dev->curr_ctx; -+ spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags); -+ -+ if (curr_ctx) -+ wait_event(curr_ctx->finished, -+ !(curr_ctx->job_flags & TRANS_RUNNING)); -+} -+EXPORT_SYMBOL(v4l2_m2m_suspend); -+ -+void v4l2_m2m_resume(struct v4l2_m2m_dev *m2m_dev) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&m2m_dev->job_spinlock, flags); -+ m2m_dev->job_queue_flags &= ~QUEUE_PAUSED; -+ spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags); -+ -+ v4l2_m2m_try_run(m2m_dev); -+} -+EXPORT_SYMBOL(v4l2_m2m_resume); -+ - int v4l2_m2m_reqbufs(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, - struct v4l2_requestbuffers *reqbufs) - { -diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h -index 98753f00df7e..5a91b548ecc0 100644 ---- a/include/media/v4l2-mem2mem.h -+++ b/include/media/v4l2-mem2mem.h -@@ -304,6 +304,28 @@ v4l2_m2m_is_last_draining_src_buf(struct v4l2_m2m_ctx *m2m_ctx, - void v4l2_m2m_last_buffer_done(struct v4l2_m2m_ctx *m2m_ctx, - struct vb2_v4l2_buffer *vbuf); - -+/** -+ * v4l2_m2m_suspend() - stop new jobs from being run and wait for current job -+ * to finish -+ * -+ * @m2m_dev: opaque pointer to the internal data to handle M2M context -+ * -+ * Called by a driver in the suspend hook. Stop new jobs from being run, and -+ * wait for current running job to finish. -+ */ -+void v4l2_m2m_suspend(struct v4l2_m2m_dev *m2m_dev); -+ -+/** -+ * v4l2_m2m_resume() - resume job running and try to run a queued job -+ * -+ * @m2m_dev: opaque pointer to the internal data to handle M2M context -+ * -+ * Called by a driver in the resume hook. This reverts the operation of -+ * v4l2_m2m_suspend() and allows job to be run. Also try to run a queued job if -+ * there is any. -+ */ -+void v4l2_m2m_resume(struct v4l2_m2m_dev *m2m_dev); -+ - /** - * v4l2_m2m_reqbufs() - multi-queue-aware REQBUFS multiplexer - * - -From ea3a9782bc2717375bf236f11738c02d5148b8a8 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 05:52:27 +0200 -Subject: [PATCH] media: uapi: h264: Update reference lists - -When dealing with interlaced frames, reference lists must tell if -each particular reference is meant for top or bottom field. This info -is currently not provided at all in the H264 related controls. - -Change reference lists to hold a structure, which specifies -an index into the DPB array and the field/frame specification -for the picture. - -Currently the only user of these lists is Cedrus which is just compile -fixed here. Actual usage of will come in a following commit. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit e000e1fa4bdbd783149e7f97cf3be61e1c0bab8c) ---- - .../userspace-api/media/v4l/ext-ctrls-codec.rst | 44 +++++++++++++++++++++- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 6 +-- - include/media/h264-ctrls.h | 21 ++++++++--- - 3 files changed, 60 insertions(+), 11 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index d0d506a444b1..df1c4fc5cb48 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1843,10 +1843,10 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - __u32 - - ``slice_group_change_cycle`` - - -- * - __u8 -+ * - struct :c:type:`v4l2_h264_reference` - - ``ref_pic_list0[32]`` - - Reference picture list after applying the per-slice modifications -- * - __u8 -+ * - struct :c:type:`v4l2_h264_reference` - - ``ref_pic_list1[32]`` - - Reference picture list after applying the per-slice modifications - * - __u32 -@@ -1926,6 +1926,46 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - ``chroma_offset[32][2]`` - - - -+``Picture Reference`` -+ -+.. c:type:: v4l2_h264_reference -+ -+.. cssclass:: longtable -+ -+.. flat-table:: struct v4l2_h264_reference -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``fields`` -+ - Specifies how the picture is referenced. See :ref:`Reference Fields ` -+ * - __u8 -+ - ``index`` -+ - Index into the :c:type:`v4l2_ctrl_h264_decode_params`.dpb array. -+ -+.. _h264_ref_fields: -+ -+``Reference Fields`` -+ -+.. cssclass:: longtable -+ -+.. flat-table:: -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - ``V4L2_H264_TOP_FIELD_REF`` -+ - 0x1 -+ - The top field in field pair is used for short-term reference. -+ * - ``V4L2_H264_BOTTOM_FIELD_REF`` -+ - 0x2 -+ - The bottom field in field pair is used for short-term reference. -+ * - ``V4L2_H264_FRAME_REF`` -+ - 0x3 -+ - The frame (or the top/bottom fields, if it's a field pair) -+ is used for short-term reference. -+ - ``V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS (struct)`` - Specifies the decode parameters (as extracted from the bitstream) - for the associated H264 slice data. This includes the necessary -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index 54ee2aa423e2..cce527bbdf86 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -166,8 +166,8 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx, - - static void _cedrus_write_ref_list(struct cedrus_ctx *ctx, - struct cedrus_run *run, -- const u8 *ref_list, u8 num_ref, -- enum cedrus_h264_sram_off sram) -+ const struct v4l2_h264_reference *ref_list, -+ u8 num_ref, enum cedrus_h264_sram_off sram) - { - const struct v4l2_ctrl_h264_decode_params *decode = run->h264.decode_params; - struct vb2_queue *cap_q; -@@ -188,7 +188,7 @@ static void _cedrus_write_ref_list(struct cedrus_ctx *ctx, - int buf_idx; - u8 dpb_idx; - -- dpb_idx = ref_list[i]; -+ dpb_idx = ref_list[i].index; - dpb = &decode->dpb[dpb_idx]; - - if (!(dpb->flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 080fd1293c42..3c613b84e5ae 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -19,6 +19,8 @@ - */ - #define V4L2_H264_NUM_DPB_ENTRIES 16 - -+#define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES) -+ - /* Our pixel format isn't stable at the moment */ - #define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */ - -@@ -140,6 +142,17 @@ struct v4l2_h264_pred_weight_table { - #define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x04 - #define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x08 - -+#define V4L2_H264_TOP_FIELD_REF 0x1 -+#define V4L2_H264_BOTTOM_FIELD_REF 0x2 -+#define V4L2_H264_FRAME_REF 0x3 -+ -+struct v4l2_h264_reference { -+ __u8 fields; -+ -+ /* Index into v4l2_ctrl_h264_decode_params.dpb[] */ -+ __u8 index; -+}; -+ - struct v4l2_ctrl_h264_slice_params { - /* Size in bytes, including header */ - __u32 size; -@@ -178,12 +191,8 @@ struct v4l2_ctrl_h264_slice_params { - __u8 num_ref_idx_l1_active_minus1; - __u32 slice_group_change_cycle; - -- /* -- * Entries on each list are indices into -- * v4l2_ctrl_h264_decode_params.dpb[]. -- */ -- __u8 ref_pic_list0[32]; -- __u8 ref_pic_list1[32]; -+ struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN]; -+ struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN]; - - __u32 flags; - }; - -From 2abf5d0e3f8c932002c0aa44f486f53e8225e1d3 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:28 +0200 -Subject: [PATCH] media: uapi: h264: Further clarify scaling lists order - -Commit 0b0393d59eb4a ("media: uapi: h264: clarify -expected scaling_list_4x4/8x8 order") improved the -documentation on H264 scaling lists order. - -This commit improves the documentation by clarifying -that the lists themselves are expected in raster scan order. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit cefdf805844b551e08858971e1f64e3af378d697) ---- - Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index df1c4fc5cb48..2cce412f5be1 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1725,12 +1725,14 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - ``scaling_list_4x4[6][16]`` - - Scaling matrix after applying the inverse scanning process. - Expected list order is Intra Y, Intra Cb, Intra Cr, Inter Y, -- Inter Cb, Inter Cr. -+ Inter Cb, Inter Cr. The values on each scaling list are -+ expected in raster scan order. - * - __u8 - - ``scaling_list_8x8[6][64]`` - - Scaling matrix after applying the inverse scanning process. - Expected list order is Intra Y, Inter Y, Intra Cb, Inter Cb, -- Intra Cr, Inter Cr. -+ Intra Cr, Inter Cr. The values on each scaling list are -+ expected in raster scan order. - - ``V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS (struct)`` - Specifies the slice parameters (as extracted from the bitstream) - -From 10ca864bd5385e820849556513562b879974bd95 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:29 +0200 -Subject: [PATCH] media: uapi: h264: Split prediction weight parameters - -The prediction weight parameters are only required under -certain conditions, which depend on slice header parameters. - -As specified in section 7.3.3 Slice header syntax, the prediction -weight table is present if: - -((weighted_pred_flag && (slice_type == P || slice_type == SP)) || \ -(weighted_bipred_idc == 1 && slice_type == B)) - -Given its size, it makes sense to move this table to its control, -so applications can avoid passing it if the slice doesn't specify it. - -Before this change struct v4l2_ctrl_h264_slice_params was 960 bytes. -With this change, it's 188 bytes and struct v4l2_ctrl_h264_pred_weight -is 772 bytes. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit eb44c6c9c236b1568985816254faf520fde21776) ---- - .../userspace-api/media/v4l/ext-ctrls-codec.rst | 19 ++++++++++++------- - drivers/media/v4l2-core/v4l2-ctrls.c | 8 ++++++++ - drivers/staging/media/sunxi/cedrus/cedrus.c | 7 +++++++ - drivers/staging/media/sunxi/cedrus/cedrus.h | 1 + - drivers/staging/media/sunxi/cedrus/cedrus_dec.c | 2 ++ - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 12 +++--------- - include/media/h264-ctrls.h | 12 ++++++++++-- - include/media/v4l2-ctrls.h | 2 ++ - 8 files changed, 45 insertions(+), 18 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 2cce412f5be1..9e4421a7c6a6 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1879,18 +1879,23 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - 0x00000008 - - - --``Prediction Weight Table`` -+``V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS (struct)`` -+ Prediction weight table defined according to :ref:`h264`, -+ section 7.4.3.2 "Prediction Weight Table Semantics". -+ The prediction weight table must be passed by applications -+ under the conditions explained in section 7.3.3 "Slice header -+ syntax". - -- The bitstream parameters are defined according to :ref:`h264`, -- section 7.4.3.2 "Prediction Weight Table Semantics". For further -- documentation, refer to the above specification, unless there is -- an explicit comment stating otherwise. -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. - --.. c:type:: v4l2_h264_pred_weight_table -+.. c:type:: v4l2_ctrl_h264_pred_weights - - .. cssclass:: longtable - --.. flat-table:: struct v4l2_h264_pred_weight_table -+.. flat-table:: struct v4l2_ctrl_h264_pred_weights - :header-rows: 0 - :stub-columns: 0 - :widths: 1 1 2 -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 45a2403aa039..ae0bf3f36c4a 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -897,6 +897,7 @@ const char *v4l2_ctrl_get_name(u32 id) - case V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS: return "H264 Decode Parameters"; - case V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE: return "H264 Decode Mode"; - case V4L2_CID_MPEG_VIDEO_H264_START_CODE: return "H264 Start Code"; -+ case V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS: return "H264 Prediction Weight Table"; - case V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL: return "MPEG2 Level"; - case V4L2_CID_MPEG_VIDEO_MPEG2_PROFILE: return "MPEG2 Profile"; - case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: return "MPEG4 I-Frame QP Value"; -@@ -1412,6 +1413,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, - case V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS: - *type = V4L2_CTRL_TYPE_H264_DECODE_PARAMS; - break; -+ case V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS: -+ *type = V4L2_CTRL_TYPE_H264_PRED_WEIGHTS; -+ break; - case V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER: - *type = V4L2_CTRL_TYPE_VP8_FRAME_HEADER; - break; -@@ -1790,6 +1794,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - case V4L2_CTRL_TYPE_H264_SPS: - case V4L2_CTRL_TYPE_H264_PPS: - case V4L2_CTRL_TYPE_H264_SCALING_MATRIX: -+ case V4L2_CTRL_TYPE_H264_PRED_WEIGHTS: - case V4L2_CTRL_TYPE_H264_SLICE_PARAMS: - case V4L2_CTRL_TYPE_H264_DECODE_PARAMS: - break; -@@ -2553,6 +2558,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, - case V4L2_CTRL_TYPE_H264_DECODE_PARAMS: - elem_size = sizeof(struct v4l2_ctrl_h264_decode_params); - break; -+ case V4L2_CTRL_TYPE_H264_PRED_WEIGHTS: -+ elem_size = sizeof(struct v4l2_ctrl_h264_pred_weights); -+ break; - case V4L2_CTRL_TYPE_VP8_FRAME_HEADER: - elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header); - break; -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c -index 7c6b91f0e780..5d41d3357663 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -78,6 +78,13 @@ static const struct cedrus_control cedrus_controls[] = { - .codec = CEDRUS_CODEC_H264, - .required = true, - }, -+ { -+ .cfg = { -+ .id = V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS, -+ }, -+ .codec = CEDRUS_CODEC_H264, -+ .required = false, -+ }, - { - .cfg = { - .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE, -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h -index 96765555ab8a..93c843ae14bb 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.h -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h -@@ -62,6 +62,7 @@ struct cedrus_h264_run { - const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix; - const struct v4l2_ctrl_h264_slice_params *slice_params; - const struct v4l2_ctrl_h264_sps *sps; -+ const struct v4l2_ctrl_h264_pred_weights *pred_weights; - }; - - struct cedrus_mpeg2_run { -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c -index 58c48e4fdfe9..6385026d1b6b 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c -@@ -57,6 +57,8 @@ void cedrus_device_run(void *priv) - V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS); - run.h264.sps = cedrus_find_control_data(ctx, - V4L2_CID_MPEG_VIDEO_H264_SPS); -+ run.h264.pred_weights = cedrus_find_control_data(ctx, -+ V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS); - break; - - case V4L2_PIX_FMT_HEVC_SLICE: -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index cce527bbdf86..d5636dbbb622 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -256,10 +256,8 @@ static void cedrus_write_scaling_lists(struct cedrus_ctx *ctx, - static void cedrus_write_pred_weight_table(struct cedrus_ctx *ctx, - struct cedrus_run *run) - { -- const struct v4l2_ctrl_h264_slice_params *slice = -- run->h264.slice_params; -- const struct v4l2_h264_pred_weight_table *pred_weight = -- &slice->pred_weight_table; -+ const struct v4l2_ctrl_h264_pred_weights *pred_weight = -+ run->h264.pred_weights; - struct cedrus_dev *dev = ctx->dev; - int i, j, k; - -@@ -367,11 +365,7 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, - - cedrus_skip_bits(dev, slice->header_bit_size); - -- if (((pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && -- (slice->slice_type == V4L2_H264_SLICE_TYPE_P || -- slice->slice_type == V4L2_H264_SLICE_TYPE_SP)) || -- (pps->weighted_bipred_idc == 1 && -- slice->slice_type == V4L2_H264_SLICE_TYPE_B)) -+ if (V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice)) - cedrus_write_pred_weight_table(ctx, run); - - if ((slice->slice_type == V4L2_H264_SLICE_TYPE_P) || -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 3c613b84e5ae..31c6f4c5963b 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -36,6 +36,7 @@ - #define V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS (V4L2_CID_MPEG_BASE+1004) - #define V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (V4L2_CID_MPEG_BASE+1005) - #define V4L2_CID_MPEG_VIDEO_H264_START_CODE (V4L2_CID_MPEG_BASE+1006) -+#define V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS (V4L2_CID_MPEG_BASE+1007) - - /* enum v4l2_ctrl_type type values */ - #define V4L2_CTRL_TYPE_H264_SPS 0x0110 -@@ -43,6 +44,7 @@ - #define V4L2_CTRL_TYPE_H264_SCALING_MATRIX 0x0112 - #define V4L2_CTRL_TYPE_H264_SLICE_PARAMS 0x0113 - #define V4L2_CTRL_TYPE_H264_DECODE_PARAMS 0x0114 -+#define V4L2_CTRL_TYPE_H264_PRED_WEIGHTS 0x0115 - - enum v4l2_mpeg_video_h264_decode_mode { - V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED, -@@ -125,7 +127,14 @@ struct v4l2_h264_weight_factors { - __s16 chroma_offset[32][2]; - }; - --struct v4l2_h264_pred_weight_table { -+#define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \ -+ ((((pps)->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && \ -+ ((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \ -+ (slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \ -+ ((pps)->weighted_bipred_idc == 1 && \ -+ (slice)->slice_type == V4L2_H264_SLICE_TYPE_B)) -+ -+struct v4l2_ctrl_h264_pred_weights { - __u16 luma_log2_weight_denom; - __u16 chroma_log2_weight_denom; - struct v4l2_h264_weight_factors weight_factors[2]; -@@ -175,7 +184,6 @@ struct v4l2_ctrl_h264_slice_params { - __s32 delta_pic_order_cnt0; - __s32 delta_pic_order_cnt1; - -- struct v4l2_h264_pred_weight_table pred_weight_table; - /* Size in bits of dec_ref_pic_marking() syntax element. */ - __u32 dec_ref_pic_marking_bit_size; - /* Size in bits of pic order count syntax. */ -diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h -index f40e2cbb21d3..cb25f345e9ad 100644 ---- a/include/media/v4l2-ctrls.h -+++ b/include/media/v4l2-ctrls.h -@@ -51,6 +51,7 @@ struct video_device; - * @p_h264_scaling_matrix: Pointer to a struct v4l2_ctrl_h264_scaling_matrix. - * @p_h264_slice_params: Pointer to a struct v4l2_ctrl_h264_slice_params. - * @p_h264_decode_params: Pointer to a struct v4l2_ctrl_h264_decode_params. -+ * @p_h264_pred_weights: Pointer to a struct v4l2_ctrl_h264_pred_weights. - * @p_vp8_frame_header: Pointer to a VP8 frame header structure. - * @p_hevc_sps: Pointer to an HEVC sequence parameter set structure. - * @p_hevc_pps: Pointer to an HEVC picture parameter set structure. -@@ -74,6 +75,7 @@ union v4l2_ctrl_ptr { - struct v4l2_ctrl_h264_scaling_matrix *p_h264_scaling_matrix; - struct v4l2_ctrl_h264_slice_params *p_h264_slice_params; - struct v4l2_ctrl_h264_decode_params *p_h264_decode_params; -+ struct v4l2_ctrl_h264_pred_weights *p_h264_pred_weights; - struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header; - struct v4l2_ctrl_hevc_sps *p_hevc_sps; - struct v4l2_ctrl_hevc_pps *p_hevc_pps; - -From b9ab1fbb981ac04f89e2a2a8c22a3e79d9089718 Mon Sep 17 00:00:00 2001 -From: Philipp Zabel -Date: Tue, 25 Aug 2020 05:52:30 +0200 -Subject: [PATCH] media: uapi: h264: Clarify pic_order_cnt_bit_size field - -Since pic_order_cnt_bit_size is not a syntax element itself, explicitly -state that it is the total size in bits of the pic_order_cnt_lsb, -delta_pic_order_cnt_bottom, delta_pic_order_cnt[0], and -delta_pic_order_cnt[1] syntax elements contained in the slice. - -[Ezequiel: rebase] - -Signed-off-by: Philipp Zabel -Signed-off-by: Ezequiel Garcia -Reviewed-by: Nicolas Dufresne -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit fb92c56312d4e3a5c30de963e459a040a4761665) ---- - Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 9e4421a7c6a6..591d3d35c429 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1815,7 +1815,9 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - Size in bits of the dec_ref_pic_marking() syntax element. - * - __u32 - - ``pic_order_cnt_bit_size`` -- - -+ - Combined size in bits of the picture order count related syntax -+ elements: pic_order_cnt_lsb, delta_pic_order_cnt_bottom, -+ delta_pic_order_cnt0, and delta_pic_order_cnt1. - * - __u8 - - ``cabac_init_idc`` - - - -From 49086ddc8b141ed75f1023e3ebcb87a7d0c224c0 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:31 +0200 -Subject: [PATCH] media: uapi: h264: Increase size of 'first_mb_in_slice' field - -Slice header syntax element 'first_mb_in_slice' can point -to the last macroblock, currently the field can only reference -65536 macroblocks which is insufficient for 8K videos. - -Although unlikely, a 8192x4320 video (where macroblocks are 16x16), -would contain 138240 macroblocks on a frame. - -As per the H264 specification, 'first_mb_in_slice' can be up to -PicSizeInMbs - 1, so increase the size of the field to 32-bits. - -Note that v4l2_ctrl_h264_slice_params struct will be modified -in a follow-up commit, and so we defer its 64-bit padding. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 4245232fa6ca58f79710732bd16cefe78b8b8bc4) ---- - Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 2 +- - include/media/h264-ctrls.h | 3 ++- - 2 files changed, 3 insertions(+), 2 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 591d3d35c429..a417a1ae50d5 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1774,7 +1774,7 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - __u32 - - ``header_bit_size`` - - -- * - __u16 -+ * - __u32 - - ``first_mb_in_slice`` - - - * - __u8 -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 31c6f4c5963b..9a6722edf004 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -172,7 +172,8 @@ struct v4l2_ctrl_h264_slice_params { - /* Offset in bits to slice_data() from the beginning of this slice. */ - __u32 header_bit_size; - -- __u16 first_mb_in_slice; -+ __u32 first_mb_in_slice; -+ - __u8 slice_type; - __u8 pic_parameter_set_id; - __u8 colour_plane_id; - -From d1bcf7e7272530af2327ee7c6bcbf9de3bddf697 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:32 +0200 -Subject: [PATCH] media: uapi: h264: Clean DPB entry interface - -As discussed recently, the current interface for the -Decoded Picture Buffer is not enough to properly -support field coding. - -This commit introduces enough semantics to support -frame and field coding, and to signal how DPB entries -are "used for reference". - -Reserved fields will be added by a follow-up commit. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit c02ff21952a6a19ca375b9dc4f9a5609616a82b8) ---- - .../userspace-api/media/v4l/ext-ctrls-codec.rst | 24 +++++++--------------- - drivers/media/v4l2-core/v4l2-h264.c | 4 ++-- - drivers/staging/media/rkvdec/rkvdec-h264.c | 17 +++++++-------- - include/media/h264-ctrls.h | 2 +- - 4 files changed, 19 insertions(+), 28 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index a417a1ae50d5..49febae8fd0f 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -2057,6 +2057,9 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - __u16 - - ``pic_num`` - - -+ * - __u8 -+ - ``fields`` -+ - Specifies how the DPB entry is referenced. See :ref:`Reference Fields ` - * - __s32 - - ``top_field_order_cnt`` - - -@@ -2080,29 +2083,16 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - * - ``V4L2_H264_DPB_ENTRY_FLAG_VALID`` - - 0x00000001 -- - The DPB entry is valid and should be considered -+ - The DPB entry is valid (non-empty) and should be considered. - * - ``V4L2_H264_DPB_ENTRY_FLAG_ACTIVE`` - - 0x00000002 -- - The DPB entry is currently being used as a reference frame -+ - The DPB entry is used for reference. - * - ``V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM`` - - 0x00000004 -- - The DPB entry is a long term reference frame -+ - The DPB entry is used for long-term reference. - * - ``V4L2_H264_DPB_ENTRY_FLAG_FIELD`` - - 0x00000008 -- - The DPB entry is a field reference, which means only one of the field -- will be used when decoding the new frame/field. When not set the DPB -- entry is a frame reference (both fields will be used). Note that this -- flag does not say anything about the number of fields contained in the -- reference frame, it just describes the one used to decode the new -- field/frame -- * - ``V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD`` -- - 0x00000010 -- - The DPB entry is a bottom field reference (only the bottom field of the -- reference frame is needed to decode the new frame/field). Only valid if -- V4L2_H264_DPB_ENTRY_FLAG_FIELD is set. When -- V4L2_H264_DPB_ENTRY_FLAG_FIELD is set but -- V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD is not, that means the -- DPB entry is a top field reference -+ - The DPB entry is a single field or a complementary field pair. - - ``V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (enum)`` - Specifies the decoding mode to use. Currently exposes slice-based and -diff --git a/drivers/media/v4l2-core/v4l2-h264.c b/drivers/media/v4l2-core/v4l2-h264.c -index edf6225f0522..f4742408436b 100644 ---- a/drivers/media/v4l2-core/v4l2-h264.c -+++ b/drivers/media/v4l2-core/v4l2-h264.c -@@ -66,10 +66,10 @@ v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, - else - b->refs[i].frame_num = dpb[i].frame_num; - -- if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) -+ if (dpb[i].fields == V4L2_H264_FRAME_REF) - pic_order_count = min(dpb[i].top_field_order_cnt, - dpb[i].bottom_field_order_cnt); -- else if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD) -+ else if (dpb[i].fields & V4L2_H264_BOTTOM_FIELD_REF) - pic_order_count = dpb[i].bottom_field_order_cnt; - else - pic_order_count = dpb[i].top_field_order_cnt; -diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index 7b66e2743a4f..d1f2715f30ae 100644 ---- a/drivers/staging/media/rkvdec/rkvdec-h264.c -+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c -@@ -949,16 +949,17 @@ static void config_registers(struct rkvdec_ctx *ctx, - for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { - struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i); - -- refer_addr = vb2_dma_contig_plane_dma_addr(vb_buf, 0) | -- RKVDEC_COLMV_USED_FLAG_REF; -+ refer_addr = vb2_dma_contig_plane_dma_addr(vb_buf, 0); - -- if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) -- refer_addr |= RKVDEC_TOPFIELD_USED_REF | -- RKVDEC_BOTFIELD_USED_REF; -- else if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD) -- refer_addr |= RKVDEC_BOTFIELD_USED_REF; -- else -+ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE) -+ refer_addr |= RKVDEC_COLMV_USED_FLAG_REF; -+ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD) -+ refer_addr |= RKVDEC_FIELD_REF; -+ -+ if (dpb[i].fields & V4L2_H264_TOP_FIELD_REF) - refer_addr |= RKVDEC_TOPFIELD_USED_REF; -+ if (dpb[i].fields & V4L2_H264_BOTTOM_FIELD_REF) -+ refer_addr |= RKVDEC_BOTFIELD_USED_REF; - - writel_relaxed(dpb[i].top_field_order_cnt, - rkvdec->regs + poc_reg_tbl_top_field[i]); -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 9a6722edf004..0529e75cce5f 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -210,12 +210,12 @@ struct v4l2_ctrl_h264_slice_params { - #define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE 0x02 - #define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM 0x04 - #define V4L2_H264_DPB_ENTRY_FLAG_FIELD 0x08 --#define V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD 0x10 - - struct v4l2_h264_dpb_entry { - __u64 reference_ts; - __u16 frame_num; - __u16 pic_num; -+ __u8 fields; - /* Note that field is indicated by v4l2_buffer.field */ - __s32 top_field_order_cnt; - __s32 bottom_field_order_cnt; - -From 44d417cc4d3f820149995948f9cb0d2ef02c7562 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:33 +0200 -Subject: [PATCH] media: uapi: h264: Increase size of DPB entry pic_num - -DPB entry PicNum maximum value is 2*MaxFrameNum for interlaced -content (field_pic_flag=1). - -As specified, MaxFrameNum is 2^(log2_max_frame_num_minus4 + 4) -and log2_max_frame_num_minus4 is in the range of 0 to 12, -which means pic_num should be a 32-bit field. - -The v4l2_h264_dpb_entry struct needs to be padded to avoid a hole, -which might be also useful to allow future uAPI extensions. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit f9879eb378295e8a912d2d10c872c45f3e19421b) ---- - Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 9 ++++++--- - drivers/media/v4l2-core/v4l2-ctrls.c | 13 +++++++++++++ - include/media/h264-ctrls.h | 3 ++- - include/media/v4l2-h264.h | 2 +- - 4 files changed, 22 insertions(+), 5 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 49febae8fd0f..3808c46718ad 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -2051,15 +2051,18 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the - :c:func:`v4l2_timeval_to_ns()` function to convert the struct - :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64. -- * - __u16 -- - ``frame_num`` -+ * - __u32 -+ - ``pic_num`` - - - * - __u16 -- - ``pic_num`` -+ - ``frame_num`` - - - * - __u8 - - ``fields`` - - Specifies how the DPB entry is referenced. See :ref:`Reference Fields ` -+ * - __u8 -+ - ``reserved[5]`` -+ - Applications and drivers must set this to zero. - * - __s32 - - ``top_field_order_cnt`` - - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index ae0bf3f36c4a..31dbe4222091 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -1725,6 +1725,8 @@ static void std_log(const struct v4l2_ctrl *ctrl) - - #define zero_padding(s) \ - memset(&(s).padding, 0, sizeof((s).padding)) -+#define zero_reserved(s) \ -+ memset(&(s).reserved, 0, sizeof((s).reserved)) - - /* - * Compound controls validation requires setting unused fields/flags to zero -@@ -1735,6 +1737,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - { - struct v4l2_ctrl_mpeg2_slice_params *p_mpeg2_slice_params; - struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header; -+ struct v4l2_ctrl_h264_decode_params *p_h264_dec_params; - struct v4l2_ctrl_hevc_sps *p_hevc_sps; - struct v4l2_ctrl_hevc_pps *p_hevc_pps; - struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params; -@@ -1796,7 +1799,17 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - case V4L2_CTRL_TYPE_H264_SCALING_MATRIX: - case V4L2_CTRL_TYPE_H264_PRED_WEIGHTS: - case V4L2_CTRL_TYPE_H264_SLICE_PARAMS: -+ break; -+ - case V4L2_CTRL_TYPE_H264_DECODE_PARAMS: -+ p_h264_dec_params = p; -+ -+ for (i = 0; i < V4L2_H264_NUM_DPB_ENTRIES; i++) { -+ struct v4l2_h264_dpb_entry *dpb_entry = -+ &p_h264_dec_params->dpb[i]; -+ -+ zero_reserved(*dpb_entry); -+ } - break; - - case V4L2_CTRL_TYPE_VP8_FRAME_HEADER: -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 0529e75cce5f..91f6f0d43e11 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -213,9 +213,10 @@ struct v4l2_ctrl_h264_slice_params { - - struct v4l2_h264_dpb_entry { - __u64 reference_ts; -+ __u32 pic_num; - __u16 frame_num; -- __u16 pic_num; - __u8 fields; -+ __u8 reserved[5]; - /* Note that field is indicated by v4l2_buffer.field */ - __s32 top_field_order_cnt; - __s32 bottom_field_order_cnt; -diff --git a/include/media/v4l2-h264.h b/include/media/v4l2-h264.h -index bc9ebb560ccf..1a5f26fc2a9a 100644 ---- a/include/media/v4l2-h264.h -+++ b/include/media/v4l2-h264.h -@@ -33,7 +33,7 @@ struct v4l2_h264_reflist_builder { - struct { - s32 pic_order_count; - int frame_num; -- u16 pic_num; -+ u32 pic_num; - u16 longterm : 1; - } refs[V4L2_H264_NUM_DPB_ENTRIES]; - s32 cur_pic_order_count; - -From cc7011362e4d3327874deb6d585c610558a10bc4 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:34 +0200 -Subject: [PATCH] media: uapi: h264: Drop SLICE_PARAMS 'size' field - -The SLICE_PARAMS control is intended for slice-based -devices. In this mode, the OUTPUT buffer contains -a single slice, and so the buffer's plane payload size -can be used to query the slice size. - -To reduce the API surface drop the size from the -SLICE_PARAMS control. - -A follow-up change will remove other members in SLICE_PARAMS -so we don't need to add padding fields here. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit f6f0d58edfa77d18c41777740958f467de615728) ---- - Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 3 --- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 7 +++---- - include/media/h264-ctrls.h | 3 --- - 3 files changed, 3 insertions(+), 10 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 3808c46718ad..e74a2531ab67 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1760,9 +1760,6 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - :stub-columns: 0 - :widths: 1 1 2 - -- * - __u32 -- - ``size`` -- - - * - __u32 - - ``start_byte_offset`` - Offset (in bytes) from the beginning of the OUTPUT buffer to the start -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index d5636dbbb622..7d9bd5860a1b 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -324,17 +324,16 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, - struct vb2_buffer *src_buf = &run->src->vb2_buf; - struct cedrus_dev *dev = ctx->dev; - dma_addr_t src_buf_addr; -- u32 len = slice->size * 8; -+ size_t slice_bytes = vb2_get_plane_payload(src_buf, 0); - unsigned int pic_width_in_mbs; - bool mbaff_pic; - u32 reg; - -- cedrus_write(dev, VE_H264_VLD_LEN, len); -+ cedrus_write(dev, VE_H264_VLD_LEN, slice_bytes * 8); - cedrus_write(dev, VE_H264_VLD_OFFSET, 0); - - src_buf_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); -- cedrus_write(dev, VE_H264_VLD_END, -- src_buf_addr + vb2_get_plane_payload(src_buf, 0)); -+ cedrus_write(dev, VE_H264_VLD_END, src_buf_addr + slice_bytes); - cedrus_write(dev, VE_H264_VLD_ADDR, - VE_H264_VLD_ADDR_VAL(src_buf_addr) | - VE_H264_VLD_ADDR_FIRST | VE_H264_VLD_ADDR_VALID | -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 91f6f0d43e11..77d0ec51ae43 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -163,9 +163,6 @@ struct v4l2_h264_reference { - }; - - struct v4l2_ctrl_h264_slice_params { -- /* Size in bytes, including header */ -- __u32 size; -- - /* Offset in bytes to the start of slice in the OUTPUT buffer. */ - __u32 start_byte_offset; - - -From 8a51555783ee2d5cd3471c4fc88f666399bd52e3 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:35 +0200 -Subject: [PATCH] media: uapi: h264: Clarify SLICE_BASED mode - -Currently, the SLICE_BASED and FRAME_BASED modes documentation -is misleading and not matching the intended use-cases. - -Drop non-required fields SLICE_PARAMS 'start_byte_offset' and -DECODE_PARAMS 'num_slices' and clarify the decoding modes in the -documentation. - -On SLICE_BASED mode, a single slice is expected per OUTPUT buffer, -and therefore 'start_byte_offset' is not needed (since the offset -to the slice is the start of the buffer). - -This mode requires the use of CAPTURE buffer holding, and so -the number of slices shall not be required. - -On FRAME_BASED mode, the devices are expected to take care of slice -parsing. Neither SLICE_PARAMS are required (and shouldn't be -exposed by frame-based drivers), nor the number of slices. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 2287c5e65cbcc99633c412dbfe1d39bd9f7bf1ce) ---- - .../userspace-api/media/v4l/ext-ctrls-codec.rst | 39 ++++++---------------- - include/media/h264-ctrls.h | 4 --- - 2 files changed, 10 insertions(+), 33 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index e74a2531ab67..304b6012b358 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1748,9 +1748,6 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - This compound control is not yet part of the public kernel API - and it is expected to change. - -- This structure is expected to be passed as an array, with one -- entry for each slice included in the bitstream buffer. -- - .. c:type:: v4l2_ctrl_h264_slice_params - - .. cssclass:: longtable -@@ -1760,17 +1757,9 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - :stub-columns: 0 - :widths: 1 1 2 - -- * - __u32 -- - ``start_byte_offset`` -- Offset (in bytes) from the beginning of the OUTPUT buffer to the start -- of the slice. If the slice starts with a start code, then this is the -- offset to such start code. When operating in slice-based decoding mode -- (see :c:type:`v4l2_mpeg_video_h264_decode_mode`), this field should -- be set to 0. When operating in frame-based decoding mode, this field -- should be 0 for the first slice. - * - __u32 - - ``header_bit_size`` -- - -+ - Offset in bits to slice_data() from the beginning of this slice. - * - __u32 - - ``first_mb_in_slice`` - - -@@ -1998,12 +1987,6 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - struct :c:type:`v4l2_h264_dpb_entry` - - ``dpb[16]`` - - -- * - __u16 -- - ``num_slices`` -- - Number of slices needed to decode the current frame/field. When -- operating in slice-based decoding mode (see -- :c:type:`v4l2_mpeg_video_h264_decode_mode`), this field -- should always be set to one. - * - __u16 - - ``nal_ref_idc`` - - NAL reference ID value coming from the NAL Unit header -@@ -2121,22 +2104,20 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - ``V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED`` - - 0 - - Decoding is done at the slice granularity. -- In this mode, ``num_slices`` field in struct -- :c:type:`v4l2_ctrl_h264_decode_params` should be set to 1, -- and ``start_byte_offset`` in struct -- :c:type:`v4l2_ctrl_h264_slice_params` should be set to 0. - The OUTPUT buffer must contain a single slice. -+ When this mode is selected, the ``V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS`` -+ control shall be set. When multiple slices compose a frame, -+ use of ``V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF`` flag -+ is required. - * - ``V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED`` - - 1 -- - Decoding is done at the frame granularity. -- In this mode, ``num_slices`` field in struct -- :c:type:`v4l2_ctrl_h264_decode_params` should be set to the number -- of slices in the frame, and ``start_byte_offset`` in struct -- :c:type:`v4l2_ctrl_h264_slice_params` should be set accordingly -- for each slice. For the first slice, ``start_byte_offset`` should -- be zero. -+ - Decoding is done at the frame granularity, - The OUTPUT buffer must contain all slices needed to decode the - frame. The OUTPUT buffer must also contain both fields. -+ This mode will be supported by devices that -+ parse the slice(s) header(s) in hardware. When this mode is -+ selected, the ``V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS`` -+ control shall not be set. - - ``V4L2_CID_MPEG_VIDEO_H264_START_CODE (enum)`` - Specifies the H264 slice start code expected for each slice. -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 77d0ec51ae43..e4cae02a765f 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -163,9 +163,6 @@ struct v4l2_h264_reference { - }; - - struct v4l2_ctrl_h264_slice_params { -- /* Offset in bytes to the start of slice in the OUTPUT buffer. */ -- __u32 start_byte_offset; -- - /* Offset in bits to slice_data() from the beginning of this slice. */ - __u32 header_bit_size; - -@@ -224,7 +221,6 @@ struct v4l2_h264_dpb_entry { - - struct v4l2_ctrl_h264_decode_params { - struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]; -- __u16 num_slices; - __u16 nal_ref_idc; - __s32 top_field_order_cnt; - __s32 bottom_field_order_cnt; - -From 0ed1639eb2c39ddca4a54bf6132657d3e4e6c184 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:36 +0200 -Subject: [PATCH] media: uapi: h264: Clean slice invariants syntax elements - -The H.264 specification requires in section 7.4.3 "Slice header semantics", -that the following values shall be the same in all slice headers: - - pic_parameter_set_id - frame_num - field_pic_flag - bottom_field_flag - idr_pic_id - pic_order_cnt_lsb - delta_pic_order_cnt_bottom - delta_pic_order_cnt[ 0 ] - delta_pic_order_cnt[ 1 ] - sp_for_switch_flag - slice_group_change_cycle - -These bitstream fields are part of the slice header, and therefore -passed redundantly on each slice. The purpose of the redundancy -is to make the codec fault-tolerant in network scenarios. - -This is of course not needed to be reflected in the V4L2 controls, -given the bitstream has already been parsed by applications. -Therefore, move the redundant fields to the per-frame decode -parameters control (DECODE_PARAMS). - -Field 'pic_parameter_set_id' is simply removed in this case, -because the PPS control must currently contain the active PPS. - -Syntax elements dec_ref_pic_marking() and those related -to pic order count, remain invariant as well, and therefore, -the fields dec_ref_pic_marking_bit_size and pic_order_cnt_bit_size -are also common to all slices. - -Signed-off-by: Ezequiel Garcia -Reviewed-by: Nicolas Dufresne -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit d9358563179a7f01f9020ebbe201c7e54ba3af48) ---- - .../userspace-api/media/v4l/ext-ctrls-codec.rst | 86 +++++++++++----------- - drivers/media/v4l2-core/v4l2-ctrls.c | 7 ++ - drivers/media/v4l2-core/v4l2-h264.c | 8 +- - drivers/staging/media/hantro/hantro_g1_h264_dec.c | 21 +++--- - drivers/staging/media/hantro/hantro_h264.c | 3 +- - drivers/staging/media/rkvdec/rkvdec-h264.c | 6 +- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 9 +-- - include/media/h264-ctrls.h | 39 +++++----- - include/media/v4l2-h264.h | 1 - - 9 files changed, 90 insertions(+), 90 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 304b6012b358..4cd9fd9c5a89 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1766,44 +1766,12 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - __u8 - - ``slice_type`` - - -- * - __u8 -- - ``pic_parameter_set_id`` -- - - * - __u8 - - ``colour_plane_id`` - - - * - __u8 - - ``redundant_pic_cnt`` - - -- * - __u16 -- - ``frame_num`` -- - -- * - __u16 -- - ``idr_pic_id`` -- - -- * - __u16 -- - ``pic_order_cnt_lsb`` -- - -- * - __s32 -- - ``delta_pic_order_cnt_bottom`` -- - -- * - __s32 -- - ``delta_pic_order_cnt0`` -- - -- * - __s32 -- - ``delta_pic_order_cnt1`` -- - -- * - struct :c:type:`v4l2_h264_pred_weight_table` -- - ``pred_weight_table`` -- - -- * - __u32 -- - ``dec_ref_pic_marking_bit_size`` -- - Size in bits of the dec_ref_pic_marking() syntax element. -- * - __u32 -- - ``pic_order_cnt_bit_size`` -- - Combined size in bits of the picture order count related syntax -- elements: pic_order_cnt_lsb, delta_pic_order_cnt_bottom, -- delta_pic_order_cnt0, and delta_pic_order_cnt1. - * - __u8 - - ``cabac_init_idc`` - - -@@ -1830,9 +1798,9 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - ``num_ref_idx_l1_active_minus1`` - - If num_ref_idx_active_override_flag is not set, this field must be - set to the value of num_ref_idx_l1_default_active_minus1. -- * - __u32 -- - ``slice_group_change_cycle`` -- - -+ * - __u8 -+ - ``reserved`` -+ - Applications and drivers must set this to zero. - * - struct :c:type:`v4l2_h264_reference` - - ``ref_pic_list0[32]`` - - Reference picture list after applying the per-slice modifications -@@ -1854,17 +1822,11 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - :stub-columns: 0 - :widths: 1 1 2 - -- * - ``V4L2_H264_SLICE_FLAG_FIELD_PIC`` -- - 0x00000001 -- - -- * - ``V4L2_H264_SLICE_FLAG_BOTTOM_FIELD`` -- - 0x00000002 -- - - * - ``V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED`` -- - 0x00000004 -+ - 0x00000001 - - - * - ``V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH`` -- - 0x00000008 -+ - 0x00000002 - - - - ``V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS (struct)`` -@@ -1990,12 +1952,44 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - __u16 - - ``nal_ref_idc`` - - NAL reference ID value coming from the NAL Unit header -+ * - __u16 -+ - ``frame_num`` -+ - - * - __s32 - - ``top_field_order_cnt`` - - Picture Order Count for the coded top field - * - __s32 - - ``bottom_field_order_cnt`` - - Picture Order Count for the coded bottom field -+ * - __u16 -+ - ``idr_pic_id`` -+ - -+ * - __u16 -+ - ``pic_order_cnt_lsb`` -+ - -+ * - __s32 -+ - ``delta_pic_order_cnt_bottom`` -+ - -+ * - __s32 -+ - ``delta_pic_order_cnt0`` -+ - -+ * - __s32 -+ - ``delta_pic_order_cnt1`` -+ - -+ * - __u32 -+ - ``dec_ref_pic_marking_bit_size`` -+ - Size in bits of the dec_ref_pic_marking() syntax element. -+ * - __u32 -+ - ``pic_order_cnt_bit_size`` -+ - Combined size in bits of the picture order count related syntax -+ elements: pic_order_cnt_lsb, delta_pic_order_cnt_bottom, -+ delta_pic_order_cnt0, and delta_pic_order_cnt1. -+ * - __u32 -+ - ``slice_group_change_cycle`` -+ - -+ * - __u32 -+ - ``reserved`` -+ - Applications and drivers must set this to zero. - * - __u32 - - ``flags`` - - See :ref:`Decode Parameters Flags ` -@@ -2014,6 +2008,12 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - ``V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC`` - - 0x00000001 - - That picture is an IDR picture -+ * - ``V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC`` -+ - 0x00000002 -+ - -+ * - ``V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD`` -+ - 0x00000004 -+ - - - .. c:type:: v4l2_h264_dpb_entry - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 31dbe4222091..d4a6c0346c2a 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -1737,6 +1737,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - { - struct v4l2_ctrl_mpeg2_slice_params *p_mpeg2_slice_params; - struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header; -+ struct v4l2_ctrl_h264_slice_params *p_h264_slice_params; - struct v4l2_ctrl_h264_decode_params *p_h264_dec_params; - struct v4l2_ctrl_hevc_sps *p_hevc_sps; - struct v4l2_ctrl_hevc_pps *p_hevc_pps; -@@ -1798,7 +1799,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - case V4L2_CTRL_TYPE_H264_PPS: - case V4L2_CTRL_TYPE_H264_SCALING_MATRIX: - case V4L2_CTRL_TYPE_H264_PRED_WEIGHTS: -+ break; -+ - case V4L2_CTRL_TYPE_H264_SLICE_PARAMS: -+ p_h264_slice_params = p; -+ -+ zero_reserved(*p_h264_slice_params); - break; - - case V4L2_CTRL_TYPE_H264_DECODE_PARAMS: -@@ -1810,6 +1816,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - - zero_reserved(*dpb_entry); - } -+ zero_reserved(*p_h264_dec_params); - break; - - case V4L2_CTRL_TYPE_VP8_FRAME_HEADER: -diff --git a/drivers/media/v4l2-core/v4l2-h264.c b/drivers/media/v4l2-core/v4l2-h264.c -index f4742408436b..5633a242520a 100644 ---- a/drivers/media/v4l2-core/v4l2-h264.c -+++ b/drivers/media/v4l2-core/v4l2-h264.c -@@ -18,14 +18,12 @@ - * - * @b: the builder context to initialize - * @dec_params: decode parameters control -- * @slice_params: first slice parameters control - * @sps: SPS control - * @dpb: DPB to use when creating the reference list - */ - void - v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, - const struct v4l2_ctrl_h264_decode_params *dec_params, -- const struct v4l2_ctrl_h264_slice_params *slice_params, - const struct v4l2_ctrl_h264_sps *sps, - const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]) - { -@@ -33,13 +31,13 @@ v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, - unsigned int i; - - max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); -- cur_frame_num = slice_params->frame_num; -+ cur_frame_num = dec_params->frame_num; - - memset(b, 0, sizeof(*b)); -- if (!(slice_params->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)) -+ if (!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)) - b->cur_pic_order_count = min(dec_params->bottom_field_order_cnt, - dec_params->top_field_order_cnt); -- else if (slice_params->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) -+ else if (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD) - b->cur_pic_order_count = dec_params->bottom_field_order_cnt; - else - b->cur_pic_order_count = dec_params->top_field_order_cnt; -diff --git a/drivers/staging/media/hantro/hantro_g1_h264_dec.c b/drivers/staging/media/hantro/hantro_g1_h264_dec.c -index 424c648ce9fc..f9839e9c6da5 100644 ---- a/drivers/staging/media/hantro/hantro_g1_h264_dec.c -+++ b/drivers/staging/media/hantro/hantro_g1_h264_dec.c -@@ -23,7 +23,6 @@ static void set_params(struct hantro_ctx *ctx) - { - const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; - const struct v4l2_ctrl_h264_decode_params *dec_param = ctrls->decode; -- const struct v4l2_ctrl_h264_slice_params *slices = ctrls->slices; - const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; - const struct v4l2_ctrl_h264_pps *pps = ctrls->pps; - struct vb2_v4l2_buffer *src_buf = hantro_get_src_buf(ctx); -@@ -42,11 +41,11 @@ static void set_params(struct hantro_ctx *ctx) - - if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) && - (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || -- slices[0].flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)) -+ dec_param->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)) - reg |= G1_REG_DEC_CTRL0_PIC_INTERLACE_E; -- if (slices[0].flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) -+ if (dec_param->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC) - reg |= G1_REG_DEC_CTRL0_PIC_FIELDMODE_E; -- if (!(slices[0].flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD)) -+ if (!(dec_param->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)) - reg |= G1_REG_DEC_CTRL0_PIC_TOPFIELD_E; - vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL0); - -@@ -75,7 +74,7 @@ static void set_params(struct hantro_ctx *ctx) - - /* Decoder control register 4. */ - reg = G1_REG_DEC_CTRL4_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) | -- G1_REG_DEC_CTRL4_FRAMENUM(slices[0].frame_num) | -+ G1_REG_DEC_CTRL4_FRAMENUM(dec_param->frame_num) | - G1_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(pps->weighted_bipred_idc); - if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE) - reg |= G1_REG_DEC_CTRL4_CABAC_E; -@@ -88,8 +87,8 @@ static void set_params(struct hantro_ctx *ctx) - vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL4); - - /* Decoder control register 5. */ -- reg = G1_REG_DEC_CTRL5_REFPIC_MK_LEN(slices[0].dec_ref_pic_marking_bit_size) | -- G1_REG_DEC_CTRL5_IDR_PIC_ID(slices[0].idr_pic_id); -+ reg = G1_REG_DEC_CTRL5_REFPIC_MK_LEN(dec_param->dec_ref_pic_marking_bit_size) | -+ G1_REG_DEC_CTRL5_IDR_PIC_ID(dec_param->idr_pic_id); - if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED) - reg |= G1_REG_DEC_CTRL5_CONST_INTRA_E; - if (pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT) -@@ -103,10 +102,10 @@ static void set_params(struct hantro_ctx *ctx) - vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL5); - - /* Decoder control register 6. */ -- reg = G1_REG_DEC_CTRL6_PPS_ID(slices[0].pic_parameter_set_id) | -+ reg = G1_REG_DEC_CTRL6_PPS_ID(pps->pic_parameter_set_id) | - G1_REG_DEC_CTRL6_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | - G1_REG_DEC_CTRL6_REFIDX1_ACTIVE(pps->num_ref_idx_l1_default_active_minus1 + 1) | -- G1_REG_DEC_CTRL6_POC_LENGTH(slices[0].pic_order_cnt_bit_size); -+ G1_REG_DEC_CTRL6_POC_LENGTH(dec_param->pic_order_cnt_bit_size); - vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL6); - - /* Error concealment register. */ -@@ -246,7 +245,7 @@ static void set_buffers(struct hantro_ctx *ctx) - /* Destination (decoded frame) buffer. */ - dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf); - /* Adjust dma addr to start at second line for bottom field */ -- if (ctrls->slices[0].flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) -+ if (ctrls->decode->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD) - offset = ALIGN(ctx->src_fmt.width, MB_DIM); - vdpu_write_relaxed(vpu, dst_dma + offset, G1_REG_ADDR_DST); - -@@ -265,7 +264,7 @@ static void set_buffers(struct hantro_ctx *ctx) - * DMV buffer is split in two for field encoded frames, - * adjust offset for bottom field - */ -- if (ctrls->slices[0].flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) -+ if (ctrls->decode->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD) - offset += 32 * MB_WIDTH(ctx->src_fmt.width) * - MB_HEIGHT(ctx->src_fmt.height); - vdpu_write_relaxed(vpu, dst_dma + offset, G1_REG_ADDR_DIR_MV); -diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c -index 6dcd47bd9ed3..7578a4fc1b16 100644 ---- a/drivers/staging/media/hantro/hantro_h264.c -+++ b/drivers/staging/media/hantro/hantro_h264.c -@@ -372,8 +372,7 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) - - /* Build the P/B{0,1} ref lists. */ - v4l2_h264_init_reflist_builder(&reflist_builder, ctrls->decode, -- &ctrls->slices[0], ctrls->sps, -- ctx->h264_dec.dpb); -+ ctrls->sps, ctx->h264_dec.dpb); - v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); - v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, - h264_ctx->reflists.b1); -diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index d1f2715f30ae..90f211839be2 100644 ---- a/drivers/staging/media/rkvdec/rkvdec-h264.c -+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c -@@ -730,7 +730,6 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx, - struct rkvdec_h264_run *run) - { - const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; -- const struct v4l2_ctrl_h264_slice_params *sl_params = &run->slices_params[0]; - const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; - struct rkvdec_h264_ctx *h264_ctx = ctx->priv; - const struct v4l2_ctrl_h264_sps *sps = run->sps; -@@ -754,7 +753,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx, - continue; - - if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM || -- dpb[i].frame_num < sl_params->frame_num) { -+ dpb[i].frame_num < dec_params->frame_num) { - p[i] = dpb[i].frame_num; - continue; - } -@@ -1094,8 +1093,7 @@ static int rkvdec_h264_run(struct rkvdec_ctx *ctx) - - /* Build the P/B{0,1} ref lists. */ - v4l2_h264_init_reflist_builder(&reflist_builder, run.decode_params, -- &run.slices_params[0], run.sps, -- run.decode_params->dpb); -+ run.sps, run.decode_params->dpb); - h264_ctx->reflists.num_valid = reflist_builder.num_valid; - v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); - v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index 7d9bd5860a1b..c8f626fdd3dd 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -95,7 +95,6 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx, - { - struct cedrus_h264_sram_ref_pic pic_list[CEDRUS_H264_FRAME_NUM]; - const struct v4l2_ctrl_h264_decode_params *decode = run->h264.decode_params; -- const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; - const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; - struct vb2_queue *cap_q; - struct cedrus_buffer *output_buf; -@@ -144,7 +143,7 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx, - output_buf = vb2_to_cedrus_buffer(&run->dst->vb2_buf); - output_buf->codec.h264.position = position; - -- if (slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) -+ if (decode->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC) - output_buf->codec.h264.pic_type = CEDRUS_H264_PIC_TYPE_FIELD; - else if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) - output_buf->codec.h264.pic_type = CEDRUS_H264_PIC_TYPE_MBAFF; -@@ -407,7 +406,7 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, - reg |= VE_H264_SPS_DIRECT_8X8_INFERENCE; - cedrus_write(dev, VE_H264_SPS, reg); - -- mbaff_pic = !(slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) && -+ mbaff_pic = !(decode->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC) && - (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD); - pic_width_in_mbs = sps->pic_width_in_mbs_minus1 + 1; - -@@ -421,9 +420,9 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, - reg |= slice->cabac_init_idc & 0x3; - if (ctx->fh.m2m_ctx->new_frame) - reg |= VE_H264_SHS_FIRST_SLICE_IN_PIC; -- if (slice->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC) -+ if (decode->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC) - reg |= VE_H264_SHS_FIELD_PIC; -- if (slice->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) -+ if (decode->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD) - reg |= VE_H264_SHS_BOTTOM_FIELD; - if (slice->flags & V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED) - reg |= VE_H264_SHS_DIRECT_SPATIAL_MV_PRED; -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index e4cae02a765f..0c15ff938873 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -146,10 +146,8 @@ struct v4l2_ctrl_h264_pred_weights { - #define V4L2_H264_SLICE_TYPE_SP 3 - #define V4L2_H264_SLICE_TYPE_SI 4 - --#define V4L2_H264_SLICE_FLAG_FIELD_PIC 0x01 --#define V4L2_H264_SLICE_FLAG_BOTTOM_FIELD 0x02 --#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x04 --#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x08 -+#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x01 -+#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x02 - - #define V4L2_H264_TOP_FIELD_REF 0x1 - #define V4L2_H264_BOTTOM_FIELD_REF 0x2 -@@ -169,21 +167,8 @@ struct v4l2_ctrl_h264_slice_params { - __u32 first_mb_in_slice; - - __u8 slice_type; -- __u8 pic_parameter_set_id; - __u8 colour_plane_id; - __u8 redundant_pic_cnt; -- __u16 frame_num; -- __u16 idr_pic_id; -- __u16 pic_order_cnt_lsb; -- __s32 delta_pic_order_cnt_bottom; -- __s32 delta_pic_order_cnt0; -- __s32 delta_pic_order_cnt1; -- -- /* Size in bits of dec_ref_pic_marking() syntax element. */ -- __u32 dec_ref_pic_marking_bit_size; -- /* Size in bits of pic order count syntax. */ -- __u32 pic_order_cnt_bit_size; -- - __u8 cabac_init_idc; - __s8 slice_qp_delta; - __s8 slice_qs_delta; -@@ -192,7 +177,8 @@ struct v4l2_ctrl_h264_slice_params { - __s8 slice_beta_offset_div2; - __u8 num_ref_idx_l0_active_minus1; - __u8 num_ref_idx_l1_active_minus1; -- __u32 slice_group_change_cycle; -+ -+ __u8 reserved; - - struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN]; - struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN]; -@@ -217,13 +203,28 @@ struct v4l2_h264_dpb_entry { - __u32 flags; /* V4L2_H264_DPB_ENTRY_FLAG_* */ - }; - --#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 -+#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 -+#define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 -+#define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 - - struct v4l2_ctrl_h264_decode_params { - struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]; - __u16 nal_ref_idc; -+ __u16 frame_num; - __s32 top_field_order_cnt; - __s32 bottom_field_order_cnt; -+ __u16 idr_pic_id; -+ __u16 pic_order_cnt_lsb; -+ __s32 delta_pic_order_cnt_bottom; -+ __s32 delta_pic_order_cnt0; -+ __s32 delta_pic_order_cnt1; -+ /* Size in bits of dec_ref_pic_marking() syntax element. */ -+ __u32 dec_ref_pic_marking_bit_size; -+ /* Size in bits of pic order count syntax. */ -+ __u32 pic_order_cnt_bit_size; -+ __u32 slice_group_change_cycle; -+ -+ __u32 reserved; - __u32 flags; /* V4L2_H264_DECODE_PARAM_FLAG_* */ - }; - -diff --git a/include/media/v4l2-h264.h b/include/media/v4l2-h264.h -index 1a5f26fc2a9a..f08ba181263d 100644 ---- a/include/media/v4l2-h264.h -+++ b/include/media/v4l2-h264.h -@@ -44,7 +44,6 @@ struct v4l2_h264_reflist_builder { - void - v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, - const struct v4l2_ctrl_h264_decode_params *dec_params, -- const struct v4l2_ctrl_h264_slice_params *slice_params, - const struct v4l2_ctrl_h264_sps *sps, - const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]); - - -From ca371b762ca1278521c8032a478a3ad3f9e03a18 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:37 +0200 -Subject: [PATCH] media: uapi: h264: Rename and clarify - PPS_FLAG_SCALING_MATRIX_PRESENT - -Applications are expected to fill V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX -if a non-flat scaling matrix applies to the picture. This is the case if -SPS scaling_matrix_present_flag or PPS pic_scaling_matrix_present_flag -are set, and should be handled by applications. - -On one hand, the PPS bitstream syntax element signals the presence of a -Picture scaling matrix modifying the Sequence (SPS) scaling matrix. -On the other hand, our flag should indicate if the scaling matrix -V4L2 control is applicable to this request. - -Rename the flag from PPS_FLAG_PIC_SCALING_MATRIX_PRESENT to -PPS_FLAG_SCALING_MATRIX_PRESENT, to avoid mixing this flag with -bitstream syntax element pic_scaling_matrix_present_flag, -and clarify the meaning of our flag. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 54889c51b833d236228f983be16212fbe806bb89) ---- - Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 5 +++-- - include/media/h264-ctrls.h | 2 +- - 2 files changed, 4 insertions(+), 3 deletions(-) - -diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -index 4cd9fd9c5a89..e2b94b1d0ab0 100644 ---- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst -@@ -1695,9 +1695,10 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - ``V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE`` - - 0x00000040 - - -- * - ``V4L2_H264_PPS_FLAG_PIC_SCALING_MATRIX_PRESENT`` -+ * - ``V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT`` - - 0x00000080 -- - -+ - Indicates that ``V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX`` -+ must be used for this picture. - - ``V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX (struct)`` - Specifies the scaling matrix (as extracted from the bitstream) for -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index 0c15ff938873..ec4799154438 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -99,7 +99,7 @@ struct v4l2_ctrl_h264_sps { - #define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED 0x0010 - #define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT 0x0020 - #define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE 0x0040 --#define V4L2_H264_PPS_FLAG_PIC_SCALING_MATRIX_PRESENT 0x0080 -+#define V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT 0x0080 - - struct v4l2_ctrl_h264_pps { - __u8 pic_parameter_set_id; - -From d8858326adbebde9fa273528c6d03970b6b50168 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:38 +0200 -Subject: [PATCH] media: hantro: Don't require unneeded H264_SLICE_PARAMS - -Now that slice invariant parameters have been moved, -the driver no longer needs this control, so drop it. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 057c4452894a38e4cc256858425b2c756003a92f) ---- - drivers/staging/media/hantro/hantro_drv.c | 5 ----- - drivers/staging/media/hantro/hantro_h264.c | 5 ----- - drivers/staging/media/hantro/hantro_hw.h | 2 -- - 3 files changed, 12 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index 34797507f214..3cd00cc0a364 100644 ---- a/drivers/staging/media/hantro/hantro_drv.c -+++ b/drivers/staging/media/hantro/hantro_drv.c -@@ -306,11 +306,6 @@ static const struct hantro_ctrl controls[] = { - .cfg = { - .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS, - }, -- }, { -- .codec = HANTRO_H264_DECODER, -- .cfg = { -- .id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS, -- }, - }, { - .codec = HANTRO_H264_DECODER, - .cfg = { -diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c -index 7578a4fc1b16..089bfa9c625b 100644 ---- a/drivers/staging/media/hantro/hantro_h264.c -+++ b/drivers/staging/media/hantro/hantro_h264.c -@@ -349,11 +349,6 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) - if (WARN_ON(!ctrls->decode)) - return -EINVAL; - -- ctrls->slices = -- hantro_get_ctrl(ctx, V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS); -- if (WARN_ON(!ctrls->slices)) -- return -EINVAL; -- - ctrls->sps = - hantro_get_ctrl(ctx, V4L2_CID_MPEG_VIDEO_H264_SPS); - if (WARN_ON(!ctrls->sps)) -diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h -index f066de6b592d..219283a06f52 100644 ---- a/drivers/staging/media/hantro/hantro_hw.h -+++ b/drivers/staging/media/hantro/hantro_hw.h -@@ -56,14 +56,12 @@ struct hantro_jpeg_enc_hw_ctx { - * struct hantro_h264_dec_ctrls - * @decode: Decode params - * @scaling: Scaling info -- * @slice: Slice params - * @sps: SPS info - * @pps: PPS info - */ - struct hantro_h264_dec_ctrls { - const struct v4l2_ctrl_h264_decode_params *decode; - const struct v4l2_ctrl_h264_scaling_matrix *scaling; -- const struct v4l2_ctrl_h264_slice_params *slices; - const struct v4l2_ctrl_h264_sps *sps; - const struct v4l2_ctrl_h264_pps *pps; - }; - -From a41936be0e44cd4317a6cce088eb6625aef96ac5 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:39 +0200 -Subject: [PATCH] media: rkvdec: Don't require unneeded H264_SLICE_PARAMS - -Now that slice invariant parameters have been moved, -the driver no longer needs this control, so drop it. - -Signed-off-by: Ezequiel Garcia -Reviewed-by: Jonas Karlman -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit a52b29e8d21d6c6463ff40e862107da0717a0840) ---- - drivers/staging/media/rkvdec/rkvdec-h264.c | 4 ---- - drivers/staging/media/rkvdec/rkvdec.c | 5 ----- - 2 files changed, 9 deletions(-) - -diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index 90f211839be2..c45cd1617b3b 100644 ---- a/drivers/staging/media/rkvdec/rkvdec-h264.c -+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c -@@ -109,7 +109,6 @@ struct rkvdec_h264_reflists { - struct rkvdec_h264_run { - struct rkvdec_run base; - const struct v4l2_ctrl_h264_decode_params *decode_params; -- const struct v4l2_ctrl_h264_slice_params *slices_params; - const struct v4l2_ctrl_h264_sps *sps; - const struct v4l2_ctrl_h264_pps *pps; - const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix; -@@ -1066,9 +1065,6 @@ static void rkvdec_h264_run_preamble(struct rkvdec_ctx *ctx, - ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, - V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS); - run->decode_params = ctrl ? ctrl->p_cur.p : NULL; -- ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -- V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS); -- run->slices_params = ctrl ? ctrl->p_cur.p : NULL; - ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, - V4L2_CID_MPEG_VIDEO_H264_SPS); - run->sps = ctrl ? ctrl->p_cur.p : NULL; -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index c8151328fb70..7c5129593921 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.c -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -59,11 +59,6 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { - .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS, - }, -- { -- .per_request = true, -- .mandatory = true, -- .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS, -- }, - { - .per_request = true, - .mandatory = true, - -From 46d93c497a135bbebf8a46e457cbb1ccbc65187e Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 05:52:40 +0200 -Subject: [PATCH] media: cedrus: h264: Properly configure reference field - -When interlaced H264 content is being decoded, references must indicate -which field is being referenced. Currently this was done by checking -capture buffer flags. However, that is not correct because capture -buffer may hold both fields. - -Fix this by checking newly introduced flags in reference lists. - -Signed-off-by: Jernej Skrabec -Reviewed-by: Nicolas Dufresne -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit cfc8c3ed533e650270152f293a3536f3ca0e7053) ---- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index c8f626fdd3dd..1e89a8438f36 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -182,7 +182,6 @@ static void _cedrus_write_ref_list(struct cedrus_ctx *ctx, - for (i = 0; i < num_ref; i++) { - const struct v4l2_h264_dpb_entry *dpb; - const struct cedrus_buffer *cedrus_buf; -- const struct vb2_v4l2_buffer *ref_buf; - unsigned int position; - int buf_idx; - u8 dpb_idx; -@@ -197,12 +196,11 @@ static void _cedrus_write_ref_list(struct cedrus_ctx *ctx, - if (buf_idx < 0) - continue; - -- ref_buf = to_vb2_v4l2_buffer(cap_q->bufs[buf_idx]); -- cedrus_buf = vb2_v4l2_to_cedrus_buffer(ref_buf); -+ cedrus_buf = vb2_to_cedrus_buffer(cap_q->bufs[buf_idx]); - position = cedrus_buf->codec.h264.position; - - sram_array[i] |= position << 1; -- if (ref_buf->field == V4L2_FIELD_BOTTOM) -+ if (ref_list[i].fields & V4L2_H264_BOTTOM_FIELD_REF) - sram_array[i] |= BIT(0); - } - - -From 639f50ba7ef39ae5c7e3d954c4eb45e798d807e1 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Tue, 25 Aug 2020 05:52:41 +0200 -Subject: [PATCH] media: cedrus: h264: Fix frame list construction - -Current frame list construction algorithm assumes that decoded image -will be output into its own buffer. That is true for progressive content -but not for interlaced where each field is decoded separately into same -buffer. - -Fix that by checking if capture buffer is listed in DPB. If it is, reuse -it. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 46e8893e72b43d10f5cad92355b36a7babe83724) ---- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 15 +++++++++------ - 1 file changed, 9 insertions(+), 6 deletions(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index 1e89a8438f36..fe041b444385 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -101,7 +101,7 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx, - struct cedrus_dev *dev = ctx->dev; - unsigned long used_dpbs = 0; - unsigned int position; -- unsigned int output = 0; -+ int output = -1; - unsigned int i; - - cap_q = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); -@@ -124,6 +124,11 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx, - position = cedrus_buf->codec.h264.position; - used_dpbs |= BIT(position); - -+ if (run->dst->vb2_buf.timestamp == dpb->reference_ts) { -+ output = position; -+ continue; -+ } -+ - if (!(dpb->flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) - continue; - -@@ -131,13 +136,11 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx, - dpb->top_field_order_cnt, - dpb->bottom_field_order_cnt, - &pic_list[position]); -- -- output = max(position, output); - } - -- position = find_next_zero_bit(&used_dpbs, CEDRUS_H264_FRAME_NUM, -- output); -- if (position >= CEDRUS_H264_FRAME_NUM) -+ if (output >= 0) -+ position = output; -+ else - position = find_first_zero_bit(&used_dpbs, CEDRUS_H264_FRAME_NUM); - - output_buf = vb2_to_cedrus_buffer(&run->dst->vb2_buf); - -From 8fcba25193bcdb227cd399ef8f4fff04bd296aa6 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:42 +0200 -Subject: [PATCH] media: rkvdec: Drop unneeded per_request driver-specific - control flag - -Currently, the drivers makes no distinction between per_request -and mandatory, as both are used in the same request validate check. - -The driver only cares to know if a given control is -required to be part of a request, so only one flag is needed. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit d3951cfc9bee5b1d4282c2f6b9458b4a94929eee) ---- - drivers/staging/media/rkvdec/rkvdec.c | 8 +------- - drivers/staging/media/rkvdec/rkvdec.h | 1 - - 2 files changed, 1 insertion(+), 8 deletions(-) - -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 7c5129593921..9f59dfb62d3f 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.c -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -55,35 +55,29 @@ static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = { - - static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { - { -- .per_request = true, - .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS, - }, - { -- .per_request = true, - .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SPS, - .cfg.ops = &rkvdec_ctrl_ops, - }, - { -- .per_request = true, - .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_PPS, - }, - { -- .per_request = true, - .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX, - }, - { -- .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE, - .cfg.min = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, - .cfg.max = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, - .cfg.def = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, - }, - { -- .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_START_CODE, - .cfg.min = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, - .cfg.def = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, -@@ -615,7 +609,7 @@ static int rkvdec_request_validate(struct media_request *req) - u32 id = ctrls->ctrls[i].cfg.id; - struct v4l2_ctrl *ctrl; - -- if (!ctrls->ctrls[i].per_request || !ctrls->ctrls[i].mandatory) -+ if (!ctrls->ctrls[i].mandatory) - continue; - - ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl, id); -diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index 2fc9f46b6910..77a137cca88e 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.h -+++ b/drivers/staging/media/rkvdec/rkvdec.h -@@ -25,7 +25,6 @@ - struct rkvdec_ctx; - - struct rkvdec_ctrl_desc { -- u32 per_request : 1; - u32 mandatory : 1; - struct v4l2_ctrl_config cfg; - }; - -From 6b4ad3335d579f5a867a7a320dad4e47f0a82e53 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:43 +0200 -Subject: [PATCH] media: rkvdec: Use H264_SCALING_MATRIX only when required - -Baseline, Main and Extended profiles are specified to -not support a scaling matrix. Also, High profiles -can optionally specify a scaling matrix, using -SPS and PPS NAL units. - -To meet this expectation, applications are required to -set the V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX control -and set the V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT -flag only when a scaling matrix is specified for a picture. - -Implement this on rkvdec, which has hardware support for this -case. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit fd902918e3e6c70e771e14e611950f361a78cfc5) ---- - drivers/staging/media/rkvdec/rkvdec-h264.c | 10 +++++++--- - drivers/staging/media/rkvdec/rkvdec.c | 1 - - 2 files changed, 7 insertions(+), 4 deletions(-) - -diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c -index c45cd1617b3b..7cc3b478a5f4 100644 ---- a/drivers/staging/media/rkvdec/rkvdec-h264.c -+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c -@@ -708,9 +708,9 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx, - WRITE_PPS(pps->second_chroma_qp_index_offset, - SECOND_CHROMA_QP_INDEX_OFFSET); - -- /* always use the matrix sent from userspace */ -- WRITE_PPS(1, SCALING_LIST_ENABLE_FLAG); -- -+ WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT), -+ SCALING_LIST_ENABLE_FLAG); -+ /* To be on the safe side, program the scaling matrix address */ - scaling_distance = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); - scaling_list_address = h264_ctx->priv_tbl.dma + scaling_distance; - WRITE_PPS(scaling_list_address, SCALING_LIST_ADDRESS); -@@ -792,9 +792,13 @@ static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx, - struct rkvdec_h264_run *run) - { - const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix; -+ const struct v4l2_ctrl_h264_pps *pps = run->pps; - struct rkvdec_h264_ctx *h264_ctx = ctx->priv; - struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; - -+ if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) -+ return; -+ - BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_4x4) != - sizeof(scaling->scaling_list_4x4)); - BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_8x8) != -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 9f59dfb62d3f..d25c4a37e2af 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.c -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -68,7 +68,6 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_PPS, - }, - { -- .mandatory = true, - .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX, - }, - { - -From 2d1e9d1ee8c70cc956e5d4356fa4b0db16475639 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:44 +0200 -Subject: [PATCH] media: hantro: Use H264_SCALING_MATRIX only when required - -Baseline, Main and Extended profiles are specified to -not support a scaling matrix. Also, High profiles -can optionally specify a scaling matrix, using -SPS and PPS NAL units. - -To meet this expectation, applications are required to -set the V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX control -and set the V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT -flag only when a scaling matrix is specified for a picture. - -Implement this on hantro, which has hardware support for this -case. - -Signed-off-by: Ezequiel Garcia -Tested-by: Jonas Karlman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit e6de6b3fac5f70cbf37eaa671d1bfeb2478469d9) ---- - drivers/staging/media/hantro/hantro_g1_h264_dec.c | 5 ++--- - drivers/staging/media/hantro/hantro_h264.c | 4 ++++ - 2 files changed, 6 insertions(+), 3 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_g1_h264_dec.c b/drivers/staging/media/hantro/hantro_g1_h264_dec.c -index f9839e9c6da5..845bef73d218 100644 ---- a/drivers/staging/media/hantro/hantro_g1_h264_dec.c -+++ b/drivers/staging/media/hantro/hantro_g1_h264_dec.c -@@ -59,9 +59,8 @@ static void set_params(struct hantro_ctx *ctx) - reg = G1_REG_DEC_CTRL2_CH_QP_OFFSET(pps->chroma_qp_index_offset) | - G1_REG_DEC_CTRL2_CH_QP_OFFSET2(pps->second_chroma_qp_index_offset); - -- /* always use the matrix sent from userspace */ -- reg |= G1_REG_DEC_CTRL2_TYPE1_QUANT_E; -- -+ if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT) -+ reg |= G1_REG_DEC_CTRL2_TYPE1_QUANT_E; - if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) - reg |= G1_REG_DEC_CTRL2_FIELDPIC_FLAG_E; - vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL2); -diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c -index 089bfa9c625b..b1bdc00ac262 100644 ---- a/drivers/staging/media/hantro/hantro_h264.c -+++ b/drivers/staging/media/hantro/hantro_h264.c -@@ -197,6 +197,7 @@ assemble_scaling_list(struct hantro_ctx *ctx) - { - const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; - const struct v4l2_ctrl_h264_scaling_matrix *scaling = ctrls->scaling; -+ const struct v4l2_ctrl_h264_pps *pps = ctrls->pps; - const size_t num_list_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4); - const size_t list_len_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4[0]); - const size_t list_len_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8[0]); -@@ -205,6 +206,9 @@ assemble_scaling_list(struct hantro_ctx *ctx) - const u32 *src; - int i, j; - -+ if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) -+ return; -+ - for (i = 0; i < num_list_4x4; i++) { - src = (u32 *)&scaling->scaling_list_4x4[i]; - for (j = 0; j < list_len_4x4 / 4; j++) - -From 4c2a7a45d1223e8b736fd2badd8e665cf06e3298 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 25 Aug 2020 05:52:45 +0200 -Subject: [PATCH] media: cedrus: Use H264_SCALING_MATRIX only when required - -Baseline, Main and Extended profiles are specified to -not support a scaling matrix. Also, High profiles -can optionally specify a scaling matrix, using -SPS and PPS NAL units. - -To meet this expectation, applications are required to -set the V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX control -and set the V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT -flag only when a scaling matrix is specified for a picture. - -Implement this on cedrus, which has hardware support for this -case. - -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit b3a23db0e2f89b309c40e32421c423875b5c1e65) ---- - drivers/staging/media/sunxi/cedrus/cedrus.c | 2 +- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 6 ++++++ - 2 files changed, 7 insertions(+), 1 deletion(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c -index 5d41d3357663..e0e35502e34a 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -76,7 +76,7 @@ static const struct cedrus_control cedrus_controls[] = { - .id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX, - }, - .codec = CEDRUS_CODEC_H264, -- .required = true, -+ .required = false, - }, - { - .cfg = { -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index fe041b444385..28319351e909 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -238,8 +238,12 @@ static void cedrus_write_scaling_lists(struct cedrus_ctx *ctx, - { - const struct v4l2_ctrl_h264_scaling_matrix *scaling = - run->h264.scaling_matrix; -+ const struct v4l2_ctrl_h264_pps *pps = run->h264.pps; - struct cedrus_dev *dev = ctx->dev; - -+ if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) -+ return; -+ - cedrus_h264_write_sram(dev, CEDRUS_SRAM_H264_SCALING_LIST_8x8_0, - scaling->scaling_list_8x8[0], - sizeof(scaling->scaling_list_8x8[0])); -@@ -442,6 +446,8 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, - reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16; - reg |= (pps->chroma_qp_index_offset & 0x3f) << 8; - reg |= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f; -+ if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT) -+ reg |= VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT; - cedrus_write(dev, VE_H264_SHS_QP, reg); - - // clear status flags - -From f63d65cb5f9554f96a9dfd785f775da98bf7cb69 Mon Sep 17 00:00:00 2001 -From: Mauro Carvalho Chehab -Date: Tue, 1 Sep 2020 11:09:26 +0200 -Subject: [PATCH] media: videobuf-dma-sg: number of pages should be unsigned - long - -As reported by smatch: - - drivers/media/v4l2-core/videobuf-dma-sg.c:245 videobuf_dma_init_kernel() warn: should 'nr_pages << 12' be a 64 bit type? - -The printk should not be using %d for the number of pages. - -After looking better, the real problem here is that the -number of pages should be long int. - -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 1faa39e0f3bcfe47dc7a61a72c234b24005c3a1a) ---- - drivers/media/v4l2-core/videobuf-dma-sg.c | 22 ++++++++++++---------- - include/media/videobuf-dma-sg.h | 2 +- - 2 files changed, 13 insertions(+), 11 deletions(-) - -diff --git a/drivers/media/v4l2-core/videobuf-dma-sg.c b/drivers/media/v4l2-core/videobuf-dma-sg.c -index 46ff19df9f53..8dd0562de287 100644 ---- a/drivers/media/v4l2-core/videobuf-dma-sg.c -+++ b/drivers/media/v4l2-core/videobuf-dma-sg.c -@@ -180,7 +180,7 @@ static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma, - if (rw == READ) - flags |= FOLL_WRITE; - -- dprintk(1, "init user [0x%lx+0x%lx => %d pages]\n", -+ dprintk(1, "init user [0x%lx+0x%lx => %lu pages]\n", - data, size, dma->nr_pages); - - err = pin_user_pages(data & PAGE_MASK, dma->nr_pages, -@@ -188,7 +188,7 @@ static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma, - - if (err != dma->nr_pages) { - dma->nr_pages = (err >= 0) ? err : 0; -- dprintk(1, "pin_user_pages: err=%d [%d]\n", err, -+ dprintk(1, "pin_user_pages: err=%d [%lu]\n", err, - dma->nr_pages); - return err < 0 ? err : -EINVAL; - } -@@ -208,11 +208,11 @@ static int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction, - } - - static int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction, -- int nr_pages) -+ unsigned long nr_pages) - { - int i; - -- dprintk(1, "init kernel [%d pages]\n", nr_pages); -+ dprintk(1, "init kernel [%lu pages]\n", nr_pages); - - dma->direction = direction; - dma->vaddr_pages = kcalloc(nr_pages, sizeof(*dma->vaddr_pages), -@@ -238,11 +238,11 @@ static int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction, - dma->vaddr = vmap(dma->vaddr_pages, nr_pages, VM_MAP | VM_IOREMAP, - PAGE_KERNEL); - if (NULL == dma->vaddr) { -- dprintk(1, "vmalloc_32(%d pages) failed\n", nr_pages); -+ dprintk(1, "vmalloc_32(%lu pages) failed\n", nr_pages); - goto out_free_pages; - } - -- dprintk(1, "vmalloc is at addr %p, size=%d\n", -+ dprintk(1, "vmalloc is at addr %p, size=%lu\n", - dma->vaddr, nr_pages << PAGE_SHIFT); - - memset(dma->vaddr, 0, nr_pages << PAGE_SHIFT); -@@ -267,9 +267,9 @@ static int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction, - } - - static int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction, -- dma_addr_t addr, int nr_pages) -+ dma_addr_t addr, unsigned long nr_pages) - { -- dprintk(1, "init overlay [%d pages @ bus 0x%lx]\n", -+ dprintk(1, "init overlay [%lu pages @ bus 0x%lx]\n", - nr_pages, (unsigned long)addr); - dma->direction = direction; - -@@ -500,9 +500,11 @@ static int __videobuf_iolock(struct videobuf_queue *q, - struct videobuf_buffer *vb, - struct v4l2_framebuffer *fbuf) - { -- int err, pages; -- dma_addr_t bus; - struct videobuf_dma_sg_memory *mem = vb->priv; -+ unsigned long pages; -+ dma_addr_t bus; -+ int err; -+ - BUG_ON(!mem); - - MAGIC_CHECK(mem->magic, MAGIC_SG_MEM); -diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h -index 34450f7ad510..930ff8d454fc 100644 ---- a/include/media/videobuf-dma-sg.h -+++ b/include/media/videobuf-dma-sg.h -@@ -60,7 +60,7 @@ struct videobuf_dmabuf { - /* common */ - struct scatterlist *sglist; - int sglen; -- int nr_pages; -+ unsigned long nr_pages; - int direction; - }; - - -From 613f4cb124631154bfa17e944e6809031e32fc74 Mon Sep 17 00:00:00 2001 -From: Alexandre Courbot -Date: Thu, 27 Aug 2020 14:49:45 +0200 -Subject: [PATCH] media: v4l2-mem2mem: always consider OUTPUT queue during poll - -If poll() is called on a m2m device with the EPOLLOUT event after the -last buffer of the CAPTURE queue is dequeued, any buffer available on -OUTPUT queue will never be signaled because v4l2_m2m_poll_for_data() -starts by checking whether dst_q->last_buffer_dequeued is set and -returns EPOLLIN in this case, without looking at the state of the OUTPUT -queue. - -Fix this by not early returning so we keep checking the state of the -OUTPUT queue afterwards. - -Signed-off-by: Alexandre Courbot -Reviewed-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 566463afdbc43c7744c5a1b89250fc808df03833) ---- - drivers/media/v4l2-core/v4l2-mem2mem.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c -index 6a80240e9228..121243e5bece 100644 ---- a/drivers/media/v4l2-core/v4l2-mem2mem.c -+++ b/drivers/media/v4l2-core/v4l2-mem2mem.c -@@ -909,10 +909,8 @@ static __poll_t v4l2_m2m_poll_for_data(struct file *file, - * If the last buffer was dequeued from the capture queue, - * return immediately. DQBUF will return -EPIPE. - */ -- if (dst_q->last_buffer_dequeued) { -- spin_unlock_irqrestore(&dst_q->done_lock, flags); -- return EPOLLIN | EPOLLRDNORM; -- } -+ if (dst_q->last_buffer_dequeued) -+ rc |= EPOLLIN | EPOLLRDNORM; - } - spin_unlock_irqrestore(&dst_q->done_lock, flags); - - -From 72d1b85060473b809d9450b54100a3e65331dea3 Mon Sep 17 00:00:00 2001 -From: Alexandre Courbot -Date: Thu, 27 Aug 2020 14:49:46 +0200 -Subject: [PATCH] media: v4l2-mem2mem: simplify poll logic - -Factorize redundant checks into a single code block, remove unneeded -checks (a buffer in done_list is necessarily in the DONE or ERROR -state), and we end up with a much simpler version of this function. - -Signed-off-by: Alexandre Courbot -Reviewed-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 1698a7f1511267a0d07a783dd467eab19bf498f3) ---- - drivers/media/v4l2-core/v4l2-mem2mem.c | 26 +++++--------------------- - 1 file changed, 5 insertions(+), 21 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c -index 121243e5bece..f626ba5ee3d9 100644 ---- a/drivers/media/v4l2-core/v4l2-mem2mem.c -+++ b/drivers/media/v4l2-core/v4l2-mem2mem.c -@@ -882,7 +882,6 @@ static __poll_t v4l2_m2m_poll_for_data(struct file *file, - struct poll_table_struct *wait) - { - struct vb2_queue *src_q, *dst_q; -- struct vb2_buffer *src_vb = NULL, *dst_vb = NULL; - __poll_t rc = 0; - unsigned long flags; - -@@ -903,32 +902,17 @@ static __poll_t v4l2_m2m_poll_for_data(struct file *file, - list_empty(&dst_q->queued_list))) - return EPOLLERR; - -- spin_lock_irqsave(&dst_q->done_lock, flags); -- if (list_empty(&dst_q->done_list)) { -- /* -- * If the last buffer was dequeued from the capture queue, -- * return immediately. DQBUF will return -EPIPE. -- */ -- if (dst_q->last_buffer_dequeued) -- rc |= EPOLLIN | EPOLLRDNORM; -- } -- spin_unlock_irqrestore(&dst_q->done_lock, flags); -- - spin_lock_irqsave(&src_q->done_lock, flags); - if (!list_empty(&src_q->done_list)) -- src_vb = list_first_entry(&src_q->done_list, struct vb2_buffer, -- done_entry); -- if (src_vb && (src_vb->state == VB2_BUF_STATE_DONE -- || src_vb->state == VB2_BUF_STATE_ERROR)) - rc |= EPOLLOUT | EPOLLWRNORM; - spin_unlock_irqrestore(&src_q->done_lock, flags); - - spin_lock_irqsave(&dst_q->done_lock, flags); -- if (!list_empty(&dst_q->done_list)) -- dst_vb = list_first_entry(&dst_q->done_list, struct vb2_buffer, -- done_entry); -- if (dst_vb && (dst_vb->state == VB2_BUF_STATE_DONE -- || dst_vb->state == VB2_BUF_STATE_ERROR)) -+ /* -+ * If the last buffer was dequeued from the capture queue, signal -+ * userspace. DQBUF(CAPTURE) will return -EPIPE. -+ */ -+ if (!list_empty(&dst_q->done_list) || dst_q->last_buffer_dequeued) - rc |= EPOLLIN | EPOLLRDNORM; - spin_unlock_irqrestore(&dst_q->done_lock, flags); - - -From e12ddb183c1503d7f94320fd20e4e7f2828a0976 Mon Sep 17 00:00:00 2001 -From: Nicolas Dufresne -Date: Fri, 18 Sep 2020 02:27:51 +0200 -Subject: [PATCH] media: cedrus: Propagate OUTPUT resolution to CAPTURE - -As per spec, the CAPTURE resolution should be automatically set based on -the OUTPUT resolution. This patch properly propagate width/height to the -capture when the OUTPUT format is set and override the user provided -width/height with configured OUTPUT resolution when the CAPTURE fmt is -updated. - -This also prevents userspace from selecting a CAPTURE resolution that is -too small, avoiding kernel oops. - -Signed-off-by: Nicolas Dufresne -Reviewed-by: Ezequiel Garcia -Acked-by: Paul Kocialkowski -Tested-by: Ondrej Jirman -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 8c608272ec3e6926ae2e258e74e84777d932ddd6) ---- - drivers/staging/media/sunxi/cedrus/cedrus_video.c | 29 +++++++++++++++++++++-- - 1 file changed, 27 insertions(+), 2 deletions(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -index 16d82309e7b6..667b86dde1ee 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -@@ -247,6 +247,8 @@ static int cedrus_try_fmt_vid_cap(struct file *file, void *priv, - return -EINVAL; - - pix_fmt->pixelformat = fmt->pixelformat; -+ pix_fmt->width = ctx->src_fmt.width; -+ pix_fmt->height = ctx->src_fmt.height; - cedrus_prepare_format(pix_fmt); - - return 0; -@@ -296,10 +298,30 @@ static int cedrus_s_fmt_vid_out(struct file *file, void *priv, - { - struct cedrus_ctx *ctx = cedrus_file2ctx(file); - struct vb2_queue *vq; -+ struct vb2_queue *peer_vq; - int ret; - -+ ret = cedrus_try_fmt_vid_out(file, priv, f); -+ if (ret) -+ return ret; -+ - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); -- if (vb2_is_busy(vq)) -+ /* -+ * In order to support dynamic resolution change, -+ * the decoder admits a resolution change, as long -+ * as the pixelformat remains. Can't be done if streaming. -+ */ -+ if (vb2_is_streaming(vq) || (vb2_is_busy(vq) && -+ f->fmt.pix.pixelformat != ctx->src_fmt.pixelformat)) -+ return -EBUSY; -+ /* -+ * Since format change on the OUTPUT queue will reset -+ * the CAPTURE queue, we can't allow doing so -+ * when the CAPTURE queue has buffers allocated. -+ */ -+ peer_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, -+ V4L2_BUF_TYPE_VIDEO_CAPTURE); -+ if (vb2_is_busy(peer_vq)) - return -EBUSY; - - ret = cedrus_try_fmt_vid_out(file, priv, f); -@@ -319,11 +341,14 @@ static int cedrus_s_fmt_vid_out(struct file *file, void *priv, - break; - } - -- /* Propagate colorspace information to capture. */ -+ /* Propagate format information to capture. */ - ctx->dst_fmt.colorspace = f->fmt.pix.colorspace; - ctx->dst_fmt.xfer_func = f->fmt.pix.xfer_func; - ctx->dst_fmt.ycbcr_enc = f->fmt.pix.ycbcr_enc; - ctx->dst_fmt.quantization = f->fmt.pix.quantization; -+ ctx->dst_fmt.width = ctx->src_fmt.width; -+ ctx->dst_fmt.height = ctx->src_fmt.height; -+ cedrus_prepare_format(&ctx->dst_fmt); - - return 0; - } - -From 58605ff417174bf3310b01bcc7372a29425d1bdf Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Mon, 28 Sep 2020 16:03:34 +0200 -Subject: [PATCH] media: v4l2-mem2mem: Fix spurious v4l2_m2m_buf_done - -A seemingly bad rebase introduced a spurious v4l2_m2m_buf_done, -which releases a buffer twice and therefore triggers a -noisy warning on each job: - -WARNING: CPU: 0 PID: 0 at drivers/media/common/videobuf2/videobuf2-core.c:986 vb2_buffer_done+0x208/0x2a0 - -Fix it by removing the spurious v4l2_m2m_buf_done. - -Reported-by: Adrian Ratiu -Fixes: 911ea8ec42dea ("media: v4l2-mem2mem: add v4l2_m2m_suspend, v4l2_m2m_resume") -Signed-off-by: Ezequiel Garcia -Tested-by: Adrian Ratiu -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 1efe3c28eba1306b007f4cb9303a5646b47cb11b) ---- - drivers/media/v4l2-core/v4l2-mem2mem.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c -index f626ba5ee3d9..b221b4e438a1 100644 ---- a/drivers/media/v4l2-core/v4l2-mem2mem.c -+++ b/drivers/media/v4l2-core/v4l2-mem2mem.c -@@ -516,7 +516,6 @@ void v4l2_m2m_buf_done_and_job_finish(struct v4l2_m2m_dev *m2m_dev, - - if (WARN_ON(!src_buf || !dst_buf)) - goto unlock; -- v4l2_m2m_buf_done(src_buf, state); - dst_buf->is_held = src_buf->flags & V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF; - if (!dst_buf->is_held) { - v4l2_m2m_dst_buf_remove(m2m_ctx); diff --git a/projects/Allwinner/patches/linux/0001-backport-from-5.11.patch b/projects/Allwinner/patches/linux/0001-backport-from-5.11.patch new file mode 100644 index 0000000000..49bb7c2a9c --- /dev/null +++ b/projects/Allwinner/patches/linux/0001-backport-from-5.11.patch @@ -0,0 +1,45 @@ +From 343bbfd1652964fb52520c4cc232c5a2c679cb21 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Tue, 25 Aug 2020 19:35:22 +0200 +Subject: [PATCH] media: cedrus: Add support for R40 + +Video engine in R40 is very similar to that in A33 but it runs on lower +speed, at least according to OS images released by board designer. + +Signed-off-by: Jernej Skrabec +Signed-off-by: Maxime Ripard +Link: https://lore.kernel.org/r/20200825173523.1289379-5-jernej.skrabec@siol.net +--- + drivers/staging/media/sunxi/cedrus/cedrus.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c +index bc27f9430eeb..83a654a618be 100644 +--- a/drivers/staging/media/sunxi/cedrus/cedrus.c ++++ b/drivers/staging/media/sunxi/cedrus/cedrus.c +@@ -496,6 +496,11 @@ static const struct cedrus_variant sun8i_h3_cedrus_variant = { + .mod_rate = 402000000, + }; + ++static const struct cedrus_variant sun8i_r40_cedrus_variant = { ++ .capabilities = CEDRUS_CAPABILITY_UNTILED, ++ .mod_rate = 297000000, ++}; ++ + static const struct cedrus_variant sun50i_a64_cedrus_variant = { + .capabilities = CEDRUS_CAPABILITY_UNTILED | + CEDRUS_CAPABILITY_H265_DEC, +@@ -536,6 +541,10 @@ static const struct of_device_id cedrus_dt_match[] = { + .compatible = "allwinner,sun8i-h3-video-engine", + .data = &sun8i_h3_cedrus_variant, + }, ++ { ++ .compatible = "allwinner,sun8i-r40-video-engine", ++ .data = &sun8i_r40_cedrus_variant, ++ }, + { + .compatible = "allwinner,sun50i-a64-video-engine", + .data = &sun50i_a64_cedrus_variant, +-- +2.28.0 + diff --git a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch index b4eb406f8a..80994340a5 100644 --- a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch +++ b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch @@ -2438,33 +2438,3 @@ index 000000000000..93beffd07c35 + .stop = cedrus_vp8_stop, + .trigger = cedrus_vp8_trigger, +}; -From 732934b823fb3519f3616a4493db88928a8fec3a Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Wed, 21 Oct 2020 22:26:05 +0200 -Subject: [PATCH] media: cedrus: h264: Fix check for presence of scaling matrix - -If scaling matrix control is present, VPU should not use default matrix. -Fix that. - -Fixes: b3a23db0e2f8 ("media: cedrus: Use H264_SCALING_MATRIX only when required") -Signed-off-by: Jernej Skrabec ---- - drivers/staging/media/sunxi/cedrus/cedrus_h264.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -index 28319351e909..781c84a9b1b7 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c -@@ -446,7 +446,7 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, - reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16; - reg |= (pps->chroma_qp_index_offset & 0x3f) << 8; - reg |= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f; -- if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT) -+ if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) - reg |= VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT; - cedrus_write(dev, VE_H264_SHS_QP, reg); - --- -2.29.0 - diff --git a/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch b/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch index 99eee1cc77..9cda689946 100644 --- a/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch +++ b/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch @@ -216,7 +216,7 @@ index 43643ad31730..d840bc07cba6 100644 +}; +#endif + - static struct regmap_config sun8i_hdmi_phy_regmap_config = { + static const struct regmap_config sun8i_hdmi_phy_regmap_config = { .reg_bits = 32, .val_bits = 32, @@ -549,6 +591,7 @@ static const struct sun8i_hdmi_phy_variant sun8i_a83t_hdmi_phy = { diff --git a/projects/Allwinner/patches/linux/0007-drm-fixes.patch b/projects/Allwinner/patches/linux/0007-drm-fixes.patch index 2341bafafb..65db2f9e01 100644 --- a/projects/Allwinner/patches/linux/0007-drm-fixes.patch +++ b/projects/Allwinner/patches/linux/0007-drm-fixes.patch @@ -374,7 +374,7 @@ index 8825518e06c8..006b746b0e95 100644 + return false; +} + - static struct regmap_config sun8i_mixer_regmap_config = { + static const struct regmap_config sun8i_mixer_regmap_config = { + .cache_type = REGCACHE_FLAT, .reg_bits = 32, .val_bits = 32,