From 95841bfb54c6dc0d7860aafe974b4354399b8368 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 15 Jun 2020 10:15:06 +0000 Subject: [PATCH] Rockchip: linux: update patches for 5.7 --- .../RK3288/linux/default/linux.arm.conf | 137 +- .../RK3328/linux/default/linux.aarch64.conf | 157 +- .../RK3399/linux/default/linux.aarch64.conf | 157 +- .../linux-0001-rockchip-from-5.7.patch | 5094 ----------------- .../linux-0001-rockchip-from-5.8.patch | 3409 +++++++++++ .../linux-0002-rockchip-from-next.patch | 2391 +------- .../default/linux-0011-v4l2-from-5.7.patch | 1555 ----- ...t.patch => linux-0011-v4l2-from-5.8.patch} | 701 ++- .../default/linux-0013-v4l2-from-list.patch | 3200 ----------- .../default/linux-0021-drm-from-5.7.patch | 1364 ----- ...xt.patch => linux-0021-drm-from-5.8.patch} | 294 +- 11 files changed, 4643 insertions(+), 13816 deletions(-) delete mode 100644 projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.7.patch create mode 100644 projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch delete mode 100644 projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.7.patch rename projects/Rockchip/patches/linux/default/{linux-0012-v4l2-from-next.patch => linux-0011-v4l2-from-5.8.patch} (86%) delete mode 100644 projects/Rockchip/patches/linux/default/linux-0013-v4l2-from-list.patch delete mode 100644 projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.7.patch rename projects/Rockchip/patches/linux/default/{linux-0022-drm-from-next.patch => linux-0021-drm-from-5.8.patch} (87%) diff --git a/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf b/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf index 5dcbac7e16..536bd444a2 100644 --- a/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf +++ b/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf @@ -1,15 +1,15 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 5.6.6 Kernel Configuration +# Linux/arm 5.7.2 Kernel Configuration # CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 +CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -61,7 +61,6 @@ CONFIG_SPARSE_IRQ=y # end of IRQ subsystem CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_ARCH_HAS_TICK_BROADCAST=y @@ -90,6 +89,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y +# CONFIG_SCHED_THERMAL_PRESSURE is not set CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -452,6 +452,7 @@ CONFIG_SECCOMP=y # CONFIG_PARAVIRT is not set # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set # CONFIG_XEN is not set +CONFIG_STACKPROTECTOR_PER_TASK=y # end of Kernel Features # @@ -588,7 +589,6 @@ CONFIG_CRYPTO_SHA512_ARM=m CONFIG_CRYPTO_AES_ARM=m CONFIG_CRYPTO_CHACHA20_NEON=m CONFIG_CRYPTO_POLY1305_ARM=m -# CONFIG_VIRTUALIZATION is not set # # General architecture-dependent options @@ -657,8 +657,11 @@ CONFIG_ARCH_HAS_PHYS_TO_DMA=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling -CONFIG_PLUGIN_HOSTCC="" CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +CONFIG_GCC_PLUGIN_ARM_SSP_PER_TASK=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y @@ -718,6 +721,7 @@ CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_FREEZER=y # @@ -744,6 +748,7 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_COMPACTION=y +# CONFIG_PAGE_REPORTING is not set CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_BOUNCE=y @@ -837,6 +842,7 @@ CONFIG_IPV6_MULTIPLE_TABLES=y # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_MPTCP is not set # CONFIG_NETWORK_SECMARK is not set CONFIG_NET_PTP_CLASSIFY=y @@ -936,6 +942,7 @@ CONFIG_BT_HCIUART_H4=y # CONFIG_BT_HCIUART_3WIRE is not set # CONFIG_BT_HCIUART_INTEL is not set CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_RTL is not set # CONFIG_BT_HCIUART_QCA is not set # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIUART_MRVL is not set @@ -1054,6 +1061,7 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # CONFIG_MOXTET is not set CONFIG_SIMPLE_PM_BUS=y # CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set # end of Bus devices # CONFIG_CONNECTOR is not set @@ -1139,7 +1147,6 @@ CONFIG_MTD_CFI_I2=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y # CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_MTK_QUADSPI is not set CONFIG_MTD_UBI=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 @@ -1237,11 +1244,11 @@ CONFIG_EEPROM_93CX6=y # CONFIG_VOP_BUS=y CONFIG_VOP=y -CONFIG_VHOST_RING=y # end of Intel MIC & related support # CONFIG_ECHO is not set # CONFIG_MISC_RTSX_USB is not set +# CONFIG_UACCE is not set # end of Misc devices # @@ -1259,7 +1266,6 @@ CONFIG_SCSI_PROC_FS=y CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set # CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_CONSTANTS is not set @@ -1303,6 +1309,7 @@ CONFIG_MACVTAP=m # CONFIG_IPVLAN is not set CONFIG_VXLAN=m # CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set # CONFIG_GTP is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -1397,7 +1404,10 @@ CONFIG_MDIO_BCM_UNIMAC=m # CONFIG_MDIO_BUS_MUX_MMIOREG is not set # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_MVUSB is not set +CONFIG_MDIO_XPCS=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -1791,13 +1801,7 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_NULL_TTY is not set CONFIG_LDISC_AUTOLOAD=y -CONFIG_DEVMEM=y -# CONFIG_DEVKMEM is not set # # Serial drivers @@ -1850,13 +1854,18 @@ CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set CONFIG_SERIAL_ST_ASC=m +# CONFIG_SERIAL_SPRD is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set CONFIG_HVC_DRIVER=y # CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y # CONFIG_IPMI_HANDLER is not set # CONFIG_IPMB_DEVICE_INTERFACE is not set @@ -1864,6 +1873,8 @@ CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_OPTEE=m +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set # CONFIG_XILLYBUS is not set @@ -1968,6 +1979,11 @@ CONFIG_SPI_ROCKCHIP=m CONFIG_SPI_XILINX=y # CONFIG_SPI_ZYNQMP_GQSPI is not set +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + # # SPI Protocol Masters # @@ -1999,6 +2015,7 @@ CONFIG_PTP_1588_CLOCK=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set # end of PTP clock support @@ -2166,6 +2183,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCMI=m CONFIG_SENSORS_ARM_SCPI=m # CONFIG_SENSORS_ASPEED is not set @@ -2303,6 +2321,7 @@ CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set # CONFIG_QORIQ_THERMAL is not set CONFIG_ROCKCHIP_THERMAL=y +# CONFIG_TI_SOC_THERMAL is not set # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -2381,6 +2400,7 @@ CONFIG_MFD_DA9063=m # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set +# CONFIG_MFD_IQS62X is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set @@ -2476,7 +2496,6 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_ACT8865=y CONFIG_REGULATOR_ACT8945A=y # CONFIG_REGULATOR_AD5398 is not set -CONFIG_REGULATOR_ANATOP=y CONFIG_REGULATOR_AS3711=y CONFIG_REGULATOR_AS3722=y CONFIG_REGULATOR_AXP20X=y @@ -2508,7 +2527,9 @@ CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77693=m CONFIG_REGULATOR_MAX77802=m # CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set CONFIG_REGULATOR_PALMAS=y @@ -2791,6 +2812,7 @@ CONFIG_VIDEO_ML86V7667=m # Camera sensor devices # # CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set # CONFIG_VIDEO_IMX290 is not set @@ -2934,11 +2956,6 @@ CONFIG_DRM_SCHED=y # CONFIG_DRM_KOMEDA is not set # end of ARM devices -# -# ACP (Audio CoProcessor) Configuration -# -# end of ACP (Audio CoProcessor) Configuration - # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set # CONFIG_DRM_EXYNOS is not set @@ -2969,8 +2986,11 @@ CONFIG_DRM_PANEL=y # # CONFIG_DRM_PANEL_ARM_VERSATILE is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set # CONFIG_DRM_PANEL_LVDS is not set CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set @@ -2982,6 +3002,7 @@ CONFIG_DRM_PANEL_SIMPLE=y # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m @@ -2996,6 +3017,7 @@ CONFIG_DRM_PANEL_RAYDIUM_RM68200=m # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set @@ -3019,24 +3041,27 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set -CONFIG_DRM_DUMB_VGA_DAC=m +# CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set CONFIG_DRM_NXP_PTN3460=m CONFIG_DRM_PARADE_PS8622=m +# CONFIG_DRM_PARADE_PS8640 is not set # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set CONFIG_DRM_SII9234=m +# CONFIG_DRM_SIMPLE_BRIDGE is not set # CONFIG_DRM_THINE_THC63LVD1024 is not set # CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set # CONFIG_DRM_ANALOGIX_ANX6345 is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set CONFIG_DRM_I2C_ADV7511=m CONFIG_DRM_I2C_ADV7511_AUDIO=y -CONFIG_DRM_I2C_ADV7533=y CONFIG_DRM_I2C_ADV7511_CEC=y CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set @@ -3054,6 +3079,7 @@ CONFIG_DRM_MXSFB=m # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set # CONFIG_TINYDRM_ST7586 is not set @@ -3063,6 +3089,7 @@ CONFIG_DRM_MXSFB=m # CONFIG_DRM_LIMA is not set CONFIG_DRM_PANFROST=y # CONFIG_DRM_MCDE is not set +# CONFIG_DRM_TIDSS is not set # CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y @@ -3192,6 +3219,7 @@ CONFIG_SND_SOC=y CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set # CONFIG_SND_DESIGNWARE_I2S is not set # @@ -3343,6 +3371,7 @@ CONFIG_SND_SOC_STI_SAS=m # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set @@ -3425,6 +3454,7 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_EZKEY is not set # CONFIG_HID_GEMBIRD is not set # CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set # CONFIG_HID_GOOGLE_HAMMER is not set # CONFIG_HID_GT683R is not set @@ -3485,6 +3515,7 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set # CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set # end of Special HID drivers # @@ -3651,6 +3682,7 @@ CONFIG_USB_ISP1760_DUAL_ROLE=y # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -3701,6 +3733,7 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_USB_BDC_UDC is not set # CONFIG_USB_NET2272 is not set # CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set # CONFIG_USB_DUMMY_HCD is not set # end of USB Peripheral Controller @@ -3745,6 +3778,10 @@ CONFIG_USB_CONFIGFS_F_MIDI=y CONFIG_USB_CONFIGFS_F_HID=y CONFIG_USB_CONFIGFS_F_UVC=y CONFIG_USB_CONFIGFS_F_PRINTER=y + +# +# USB Gadget precomposed configurations +# # CONFIG_USB_ZERO is not set # CONFIG_USB_AUDIO is not set CONFIG_USB_ETH=m @@ -3763,6 +3800,9 @@ CONFIG_USB_ETH_RNDIS=y # CONFIG_USB_G_HID is not set # CONFIG_USB_G_DBGP is not set # CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + # CONFIG_TYPEC is not set CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y @@ -3801,6 +3841,7 @@ CONFIG_MMC_DW_ROCKCHIP=y # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set CONFIG_MMC_SDHCI_OMAP=y @@ -3942,6 +3983,7 @@ CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_PALMAS=y CONFIG_RTC_DRV_TPS6586X=y CONFIG_RTC_DRV_TPS65910=y +# CONFIG_RTC_DRV_RC5T619 is not set CONFIG_RTC_DRV_S35390A=m # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set @@ -4010,7 +4052,6 @@ CONFIG_RTC_DRV_PL031=y # CONFIG_RTC_DRV_CADENCE is not set # CONFIG_RTC_DRV_FTRTC010 is not set # CONFIG_RTC_DRV_PM8XXX is not set -# CONFIG_RTC_DRV_SNVS is not set # CONFIG_RTC_DRV_R7301 is not set CONFIG_RTC_DRV_CPCAP=m @@ -4052,6 +4093,7 @@ CONFIG_DW_DMAC=y CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_SELFTESTS is not set CONFIG_DMABUF_HEAPS=y CONFIG_DMABUF_HEAPS_SYSTEM=y @@ -4068,6 +4110,13 @@ CONFIG_VIRTIO_MENU=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_IOTLB=y +CONFIG_VHOST_RING=y +CONFIG_VHOST_DPN=y +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set # # Microsoft Hyper-V guest support @@ -4099,7 +4148,6 @@ CONFIG_RTL8723BS=m # Analog to digital converters # # CONFIG_AD7816 is not set -# CONFIG_AD7192 is not set # CONFIG_AD7280 is not set # end of Analog to digital converters @@ -4172,7 +4220,6 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set -# CONFIG_MOST is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set @@ -4183,9 +4230,6 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_FIELDBUS_DEV is not set -# CONFIG_USB_WUSB_CBAF is not set -# CONFIG_UWB is not set -# CONFIG_STAGING_EXFAT_FS is not set # CONFIG_WFX is not set # CONFIG_GOLDFISH is not set CONFIG_MFD_CROS_EC=m @@ -4201,6 +4245,7 @@ CONFIG_CROS_EC_VBC=m CONFIG_CROS_EC_DEBUGFS=m CONFIG_CROS_EC_SENSORHUB=m CONFIG_CROS_EC_SYSFS=m +CONFIG_CROS_USBPD_NOTIFY=m # CONFIG_MELLANOX_PLATFORM is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y @@ -4425,6 +4470,7 @@ CONFIG_IIO_SW_TRIGGER=y # # CONFIG_AD7091R5 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set @@ -4467,6 +4513,7 @@ CONFIG_CPCAP_ADC=m # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set # CONFIG_QCOM_SPMI_ADC5 is not set +# CONFIG_RN5T618_ADC is not set CONFIG_ROCKCHIP_SARADC=y # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_STMPE_ADC is not set @@ -4497,6 +4544,7 @@ CONFIG_VF610_ADC=m # Amplifiers # # CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set # end of Amplifiers # @@ -4538,19 +4586,20 @@ CONFIG_VF610_ADC=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set -# CONFIG_LTC1660 is not set -# CONFIG_LTC2632 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5821 is not set @@ -4649,6 +4698,7 @@ CONFIG_MPU3050_I2C=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set @@ -4659,6 +4709,7 @@ CONFIG_MPU3050_I2C=y # CONFIG_CM3323 is not set # CONFIG_CM3605 is not set CONFIG_CM36651=m +# CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set CONFIG_SENSORS_ISL29018=y CONFIG_SENSORS_ISL29028=y @@ -4728,6 +4779,11 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_IIO_SYSFS_TRIGGER is not set # end of Triggers - standalone +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + # # Digital potentiometers # @@ -4757,6 +4813,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set @@ -4811,6 +4868,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y CONFIG_PWM=y CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set CONFIG_PWM_ATMEL_HLCDC_PWM=m # CONFIG_PWM_CROS_EC is not set CONFIG_PWM_FSL_FTM=m @@ -4840,7 +4898,7 @@ CONFIG_RESET_SCMI=y # CONFIG_GENERIC_PHY=y # CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set @@ -4914,6 +4972,7 @@ CONFIG_PM_OPP=y # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set +# CONFIG_MOST is not set # end of Device Drivers # @@ -4991,7 +5050,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # end of CD-ROM/DVD Filesystems # -# DOS/FAT/NT Filesystems +# DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=y # CONFIG_MSDOS_FS is not set @@ -4999,8 +5058,9 @@ CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set # CONFIG_NTFS_FS is not set -# end of DOS/FAT/NT Filesystems +# end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems @@ -5190,6 +5250,9 @@ CONFIG_LSM="yama,loadpin,safesetid,integrity" # Memory initialization # CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization @@ -5527,7 +5590,6 @@ CONFIG_FRAME_WARN=1024 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set -CONFIG_OPTIMIZE_INLINING=y # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set @@ -5541,7 +5603,6 @@ CONFIG_DEBUG_FS=y CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set # CONFIG_UBSAN is not set -CONFIG_UBSAN_ALIGNMENT=y # end of Generic Kernel Debugging Instruments CONFIG_DEBUG_KERNEL=y @@ -5584,6 +5645,7 @@ CONFIG_PANIC_TIMEOUT=0 # CONFIG_SOFTLOCKUP_DETECTOR is not set # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # @@ -5715,6 +5777,7 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_SORT is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_RBTREE_TEST is not set diff --git a/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf b/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf index 94dc3c74f7..cb933df4cf 100644 --- a/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf @@ -1,15 +1,15 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.6.6 Kernel Configuration +# Linux/arm64 5.7.2 Kernel Configuration # CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 +CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y @@ -55,7 +55,6 @@ CONFIG_SPARSE_IRQ=y # end of IRQ subsystem CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_ARCH_HAS_TICK_BROADCAST=y @@ -84,6 +83,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y +# CONFIG_SCHED_THERMAL_PRESSURE is not set CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -255,6 +255,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_SMP=y CONFIG_KERNEL_MODE_NEON=y CONFIG_FIX_EARLYCON_MEM=y @@ -417,8 +418,18 @@ CONFIG_ARM64_CNP=y # ARMv8.3 architectural features # CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y # end of ARMv8.3 architectural features +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +# end of ARMv8.4 architectural features + # # ARMv8.5 architectural features # @@ -627,6 +638,7 @@ CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set @@ -638,8 +650,10 @@ CONFIG_ARCH_USE_MEMREMAP_PROT=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling -CONFIG_PLUGIN_HOSTCC="" CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set # end of General architecture-dependent options CONFIG_RT_MUTEXES=y @@ -750,6 +764,7 @@ CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y @@ -784,6 +799,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PHYS_ADDR_T_64BIT=y @@ -796,7 +812,6 @@ CONFIG_MEMORY_FAILURE=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -CONFIG_TRANSPARENT_HUGE_PAGECACHE=y # CONFIG_CLEANCACHE is not set # CONFIG_FRONTSWAP is not set CONFIG_CMA=y @@ -886,6 +901,7 @@ CONFIG_IPV6_FOU=m # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_NETLABEL is not set # CONFIG_MPTCP is not set # CONFIG_NETWORK_SECMARK is not set @@ -1164,6 +1180,7 @@ CONFIG_BT_HCIUART_LL=y # CONFIG_BT_HCIUART_3WIRE is not set # CONFIG_BT_HCIUART_INTEL is not set CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_RTL is not set # CONFIG_BT_HCIUART_QCA is not set # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIUART_MRVL is not set @@ -1282,6 +1299,7 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # CONFIG_MOXTET is not set # CONFIG_SIMPLE_PM_BUS is not set # CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set # end of Bus devices # CONFIG_CONNECTOR is not set @@ -1366,7 +1384,6 @@ CONFIG_MTD_CFI_I2=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y # CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_MTK_QUADSPI is not set # CONFIG_MTD_UBI is not set # CONFIG_MTD_HYPERBUS is not set CONFIG_DTC=y @@ -1453,11 +1470,11 @@ CONFIG_EEPROM_93CX6=m # CONFIG_VOP_BUS=y CONFIG_VOP=y -CONFIG_VHOST_RING=y # end of Intel MIC & related support # CONFIG_ECHO is not set # CONFIG_MISC_RTSX_USB is not set +# CONFIG_UACCE is not set # end of Misc devices # @@ -1519,6 +1536,7 @@ CONFIG_MACVTAP=m # CONFIG_IPVLAN is not set CONFIG_VXLAN=m # CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set # CONFIG_GTP is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -1591,8 +1609,11 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MDIO_GPIO=y # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_MVUSB is not set # CONFIG_MDIO_OCTEON is not set +CONFIG_MDIO_XPCS=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -1969,12 +1990,7 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_NULL_TTY is not set CONFIG_LDISC_AUTOLOAD=y -CONFIG_DEVMEM=y # # Serial drivers @@ -2023,24 +2039,31 @@ CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set CONFIG_HVC_DRIVER=y # CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_OPTEE=m +CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set # CONFIG_XILLYBUS is not set # end of Character devices +# CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # @@ -2139,6 +2162,11 @@ CONFIG_SPI_ROCKCHIP=m # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + # # SPI Protocol Masters # @@ -2170,6 +2198,7 @@ CONFIG_PTP_1588_CLOCK=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set # end of PTP clock support @@ -2328,6 +2357,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set @@ -2539,6 +2569,7 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set +# CONFIG_MFD_IQS62X is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set @@ -2621,7 +2652,6 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_ANATOP is not set # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set CONFIG_REGULATOR_FAN53555=y @@ -2641,7 +2671,9 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set # CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PFUZE100 is not set @@ -2756,7 +2788,6 @@ CONFIG_MEDIA_USB_SUPPORT=y # # CONFIG_VIDEO_PVRUSB2 is not set # CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_USBVISION is not set # CONFIG_VIDEO_STK1160_COMMON is not set # CONFIG_VIDEO_GO7007 is not set @@ -2979,11 +3010,6 @@ CONFIG_DRM_SCHED=y # CONFIG_DRM_KOMEDA is not set # end of ARM devices -# -# ACP (Audio CoProcessor) Configuration -# -# end of ACP (Audio CoProcessor) Configuration - # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set CONFIG_DRM_ROCKCHIP=y @@ -3016,6 +3042,7 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set @@ -3033,19 +3060,23 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set # CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set # CONFIG_DRM_THINE_THC63LVD1024 is not set # CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set # CONFIG_DRM_ANALOGIX_ANX6345 is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set # CONFIG_DRM_I2C_ADV7511 is not set @@ -3063,6 +3094,7 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set # CONFIG_TINYDRM_ST7586 is not set @@ -3070,6 +3102,7 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_DRM_PL111 is not set CONFIG_DRM_LIMA=y # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_TIDSS is not set # CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y @@ -3196,6 +3229,7 @@ CONFIG_SND_SOC=y CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set # CONFIG_SND_DESIGNWARE_I2S is not set # @@ -3348,6 +3382,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set @@ -3430,6 +3465,7 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_EZKEY is not set # CONFIG_HID_GEMBIRD is not set # CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set @@ -3489,6 +3525,7 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set # CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set # end of Special HID drivers # @@ -3655,6 +3692,7 @@ CONFIG_USB_ISP1760_DUAL_ROLE=y # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -3702,10 +3740,34 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_USB_BDC_UDC is not set # CONFIG_USB_NET2272 is not set # CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set # CONFIG_USB_DUMMY_HCD is not set # end of USB Peripheral Controller # CONFIG_USB_CONFIGFS is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + # CONFIG_TYPEC is not set CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y @@ -3744,6 +3806,7 @@ CONFIG_MMC_DW_ROCKCHIP=y # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set # CONFIG_MMC_SDHCI_OMAP is not set @@ -3832,6 +3895,7 @@ CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set # CONFIG_EDAC_XGENE is not set +# CONFIG_EDAC_DMC520 is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y @@ -3940,7 +4004,6 @@ CONFIG_RTC_DRV_DS3232_HWMON=y CONFIG_RTC_DRV_PL031=y # CONFIG_RTC_DRV_CADENCE is not set # CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_SNVS is not set # CONFIG_RTC_DRV_R7301 is not set # @@ -3960,7 +4023,6 @@ CONFIG_DMA_OF=y # CONFIG_DW_AXI_DMAC is not set # CONFIG_FSL_EDMA is not set # CONFIG_FSL_QDMA is not set -# CONFIG_HISI_DMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_MV_XOR_V2 is not set CONFIG_PL330_DMA=y @@ -3983,6 +4045,7 @@ CONFIG_PL330_DMA=y CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_SELFTESTS is not set CONFIG_DMABUF_HEAPS=y CONFIG_DMABUF_HEAPS_SYSTEM=y @@ -4003,6 +4066,13 @@ CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_IOTLB=y +CONFIG_VHOST_RING=y +CONFIG_VHOST_DPN=y +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set # # Microsoft Hyper-V guest support @@ -4034,7 +4104,6 @@ CONFIG_RTL8723BS=m # Analog to digital converters # # CONFIG_AD7816 is not set -# CONFIG_AD7192 is not set # CONFIG_AD7280 is not set # end of Analog to digital converters @@ -4093,6 +4162,7 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # # CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set # CONFIG_VIDEO_ROCKCHIP_ISP1 is not set +# CONFIG_VIDEO_USBVISION is not set # # Android @@ -4107,7 +4177,6 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set -# CONFIG_MOST is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set @@ -4118,9 +4187,6 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_FIELDBUS_DEV is not set -# CONFIG_USB_WUSB_CBAF is not set -# CONFIG_UWB is not set -# CONFIG_STAGING_EXFAT_FS is not set # CONFIG_WFX is not set # CONFIG_GOLDFISH is not set # CONFIG_MFD_CROS_EC is not set @@ -4346,6 +4412,7 @@ CONFIG_IIO=y # # CONFIG_AD7091R5 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set @@ -4412,6 +4479,7 @@ CONFIG_ROCKCHIP_SARADC=y # Amplifiers # # CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set # end of Amplifiers # @@ -4451,19 +4519,20 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set -# CONFIG_LTC1660 is not set -# CONFIG_LTC2632 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5821 is not set @@ -4561,6 +4630,7 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set @@ -4571,6 +4641,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_CM3323 is not set # CONFIG_CM3605 is not set # CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set @@ -4631,6 +4702,11 @@ CONFIG_ROCKCHIP_SARADC=y # # end of Inclinometer sensors +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + # # Digital potentiometers # @@ -4660,6 +4736,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set @@ -4714,6 +4791,7 @@ CONFIG_ROCKCHIP_SARADC=y CONFIG_PWM=y CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set # CONFIG_PWM_FSL_FTM is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y @@ -4743,7 +4821,7 @@ CONFIG_RESET_CONTROLLER=y CONFIG_GENERIC_PHY=y # CONFIG_PHY_XGENE is not set # CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set @@ -4831,6 +4909,7 @@ CONFIG_PM_OPP=y # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set +# CONFIG_MOST is not set # end of Device Drivers # @@ -4911,7 +4990,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # end of CD-ROM/DVD Filesystems # -# DOS/FAT/NT Filesystems +# DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=y # CONFIG_MSDOS_FS is not set @@ -4919,8 +4998,9 @@ CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set # CONFIG_NTFS_FS is not set -# end of DOS/FAT/NT Filesystems +# end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems @@ -5122,6 +5202,10 @@ CONFIG_LSM="yama,loadpin,safesetid,integrity" # Memory initialization # CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization @@ -5468,7 +5552,6 @@ CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set -CONFIG_OPTIMIZE_INLINING=y # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_ARCH_WANT_FRAME_POINTERS=y @@ -5482,12 +5565,12 @@ CONFIG_FRAME_POINTER=y CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" CONFIG_DEBUG_FS=y CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set -CONFIG_UBSAN_ALIGNMENT=y # end of Generic Kernel Debugging Instruments CONFIG_DEBUG_KERNEL=y @@ -5533,6 +5616,7 @@ CONFIG_PANIC_TIMEOUT=0 # CONFIG_SOFTLOCKUP_DETECTOR is not set # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # @@ -5614,7 +5698,6 @@ CONFIG_STRICT_DEVMEM=y # CONFIG_PID_IN_CONTEXTIDR is not set # CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set # CONFIG_DEBUG_WX is not set -# CONFIG_DEBUG_ALIGN_RODATA is not set # CONFIG_ARM64_RELOC_TEST is not set # CONFIG_CORESIGHT is not set # end of arm64 Debugging diff --git a/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf b/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf index 53ac1da07a..f8ee70791f 100644 --- a/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf @@ -1,15 +1,15 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.6.6 Kernel Configuration +# Linux/arm64 5.7.2 Kernel Configuration # CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 +CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y -CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y @@ -55,7 +55,6 @@ CONFIG_SPARSE_IRQ=y # end of IRQ subsystem CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_ARCH_HAS_TICK_BROADCAST=y @@ -84,6 +83,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y +# CONFIG_SCHED_THERMAL_PRESSURE is not set CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -255,6 +255,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_SMP=y CONFIG_KERNEL_MODE_NEON=y CONFIG_FIX_EARLYCON_MEM=y @@ -417,8 +418,18 @@ CONFIG_ARM64_CNP=y # ARMv8.3 architectural features # CONFIG_ARM64_PTR_AUTH=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y # end of ARMv8.3 architectural features +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +# end of ARMv8.4 architectural features + # # ARMv8.5 architectural features # @@ -627,6 +638,7 @@ CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set @@ -638,8 +650,10 @@ CONFIG_ARCH_USE_MEMREMAP_PROT=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling -CONFIG_PLUGIN_HOSTCC="" CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set # end of General architecture-dependent options CONFIG_RT_MUTEXES=y @@ -750,6 +764,7 @@ CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y @@ -784,6 +799,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y +CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PHYS_ADDR_T_64BIT=y @@ -796,7 +812,6 @@ CONFIG_MEMORY_FAILURE=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -CONFIG_TRANSPARENT_HUGE_PAGECACHE=y # CONFIG_CLEANCACHE is not set # CONFIG_FRONTSWAP is not set CONFIG_CMA=y @@ -886,6 +901,7 @@ CONFIG_IPV6_FOU=m # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_IPV6_RPL_LWTUNNEL is not set # CONFIG_NETLABEL is not set # CONFIG_MPTCP is not set # CONFIG_NETWORK_SECMARK is not set @@ -1164,6 +1180,7 @@ CONFIG_BT_HCIUART_LL=y # CONFIG_BT_HCIUART_3WIRE is not set # CONFIG_BT_HCIUART_INTEL is not set CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_RTL is not set # CONFIG_BT_HCIUART_QCA is not set # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIUART_MRVL is not set @@ -1282,6 +1299,7 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # CONFIG_MOXTET is not set # CONFIG_SIMPLE_PM_BUS is not set # CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_MHI_BUS is not set # end of Bus devices # CONFIG_CONNECTOR is not set @@ -1366,7 +1384,6 @@ CONFIG_MTD_CFI_I2=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y # CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_MTK_QUADSPI is not set # CONFIG_MTD_UBI is not set # CONFIG_MTD_HYPERBUS is not set CONFIG_DTC=y @@ -1453,11 +1470,11 @@ CONFIG_EEPROM_93CX6=m # CONFIG_VOP_BUS=y CONFIG_VOP=y -CONFIG_VHOST_RING=y # end of Intel MIC & related support # CONFIG_ECHO is not set # CONFIG_MISC_RTSX_USB is not set +# CONFIG_UACCE is not set # end of Misc devices # @@ -1519,6 +1536,7 @@ CONFIG_MACVTAP=m # CONFIG_IPVLAN is not set CONFIG_VXLAN=m # CONFIG_GENEVE is not set +# CONFIG_BAREUDP is not set # CONFIG_GTP is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -1591,8 +1609,11 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MDIO_GPIO=y # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_MVUSB is not set # CONFIG_MDIO_OCTEON is not set +CONFIG_MDIO_XPCS=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -1969,12 +1990,7 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_NULL_TTY is not set CONFIG_LDISC_AUTOLOAD=y -CONFIG_DEVMEM=y # # Serial drivers @@ -2023,24 +2039,31 @@ CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_SPRD is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_NULL_TTY is not set +# CONFIG_TRACE_SINK is not set CONFIG_HVC_DRIVER=y # CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_VIRTIO_CONSOLE=y # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_OPTEE=m +CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set # CONFIG_XILLYBUS is not set # end of Character devices +# CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # @@ -2139,6 +2162,11 @@ CONFIG_SPI_ROCKCHIP=m # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# +# SPI Multiplexer support +# +# CONFIG_SPI_MUX is not set + # # SPI Protocol Masters # @@ -2170,6 +2198,7 @@ CONFIG_PTP_1588_CLOCK=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set # end of PTP clock support @@ -2328,6 +2357,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set @@ -2539,6 +2569,7 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set +# CONFIG_MFD_IQS62X is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set @@ -2621,7 +2652,6 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_ANATOP is not set # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set CONFIG_REGULATOR_FAN53555=y @@ -2641,7 +2671,9 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set # CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set +# CONFIG_REGULATOR_MP886X is not set # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PFUZE100 is not set @@ -2756,7 +2788,6 @@ CONFIG_MEDIA_USB_SUPPORT=y # # CONFIG_VIDEO_PVRUSB2 is not set # CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_USBVISION is not set # CONFIG_VIDEO_STK1160_COMMON is not set # CONFIG_VIDEO_GO7007 is not set @@ -2979,11 +3010,6 @@ CONFIG_DRM_SCHED=y # CONFIG_DRM_KOMEDA is not set # end of ARM devices -# -# ACP (Audio CoProcessor) Configuration -# -# end of ACP (Audio CoProcessor) Configuration - # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set CONFIG_DRM_ROCKCHIP=y @@ -3016,6 +3042,7 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set @@ -3033,19 +3060,23 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_PARADE_PS8640 is not set # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set # CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set # CONFIG_DRM_THINE_THC63LVD1024 is not set # CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI86 is not set +# CONFIG_DRM_TI_TPD12S015 is not set # CONFIG_DRM_ANALOGIX_ANX6345 is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set # CONFIG_DRM_I2C_ADV7511 is not set @@ -3063,6 +3094,7 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set # CONFIG_TINYDRM_ST7586 is not set @@ -3070,6 +3102,7 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_DRM_PL111 is not set # CONFIG_DRM_LIMA is not set CONFIG_DRM_PANFROST=y +# CONFIG_DRM_TIDSS is not set # CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y @@ -3196,6 +3229,7 @@ CONFIG_SND_SOC=y CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set # CONFIG_SND_DESIGNWARE_I2S is not set # @@ -3348,6 +3382,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TLV320ADCX140 is not set CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set @@ -3430,6 +3465,7 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_EZKEY is not set # CONFIG_HID_GEMBIRD is not set # CONFIG_HID_GFRM is not set +# CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set @@ -3489,6 +3525,7 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set # CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2221 is not set # end of Special HID drivers # @@ -3655,6 +3692,7 @@ CONFIG_USB_ISP1760_DUAL_ROLE=y # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_APPLE_MFI_FASTCHARGE is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -3702,10 +3740,34 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_USB_BDC_UDC is not set # CONFIG_USB_NET2272 is not set # CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_MAX3420_UDC is not set # CONFIG_USB_DUMMY_HCD is not set # end of USB Peripheral Controller # CONFIG_USB_CONFIGFS is not set + +# +# USB Gadget precomposed configurations +# +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set +# CONFIG_USB_RAW_GADGET is not set +# end of USB Gadget precomposed configurations + # CONFIG_TYPEC is not set CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y @@ -3744,6 +3806,7 @@ CONFIG_MMC_DW_ROCKCHIP=y # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=y +# CONFIG_MMC_HSQ is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set # CONFIG_MMC_SDHCI_OMAP is not set @@ -3832,6 +3895,7 @@ CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set # CONFIG_EDAC_XGENE is not set +# CONFIG_EDAC_DMC520 is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y @@ -3940,7 +4004,6 @@ CONFIG_RTC_DRV_DS3232_HWMON=y CONFIG_RTC_DRV_PL031=y # CONFIG_RTC_DRV_CADENCE is not set # CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_SNVS is not set # CONFIG_RTC_DRV_R7301 is not set # @@ -3960,7 +4023,6 @@ CONFIG_DMA_OF=y # CONFIG_DW_AXI_DMAC is not set # CONFIG_FSL_EDMA is not set # CONFIG_FSL_QDMA is not set -# CONFIG_HISI_DMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_MV_XOR_V2 is not set CONFIG_PL330_DMA=y @@ -3983,6 +4045,7 @@ CONFIG_PL330_DMA=y CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_SELFTESTS is not set CONFIG_DMABUF_HEAPS=y CONFIG_DMABUF_HEAPS_SYSTEM=y @@ -4003,6 +4066,13 @@ CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_IOTLB=y +CONFIG_VHOST_RING=y +CONFIG_VHOST_DPN=y +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set # # Microsoft Hyper-V guest support @@ -4034,7 +4104,6 @@ CONFIG_RTL8723BS=m # Analog to digital converters # # CONFIG_AD7816 is not set -# CONFIG_AD7192 is not set # CONFIG_AD7280 is not set # end of Analog to digital converters @@ -4093,6 +4162,7 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # # CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set # CONFIG_VIDEO_ROCKCHIP_ISP1 is not set +# CONFIG_VIDEO_USBVISION is not set # # Android @@ -4107,7 +4177,6 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set -# CONFIG_MOST is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set @@ -4118,9 +4187,6 @@ CONFIG_VIDEO_ROCKCHIP_VDEC=m # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_FIELDBUS_DEV is not set -# CONFIG_USB_WUSB_CBAF is not set -# CONFIG_UWB is not set -# CONFIG_STAGING_EXFAT_FS is not set # CONFIG_WFX is not set # CONFIG_GOLDFISH is not set # CONFIG_MFD_CROS_EC is not set @@ -4346,6 +4412,7 @@ CONFIG_IIO=y # # CONFIG_AD7091R5 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set @@ -4412,6 +4479,7 @@ CONFIG_ROCKCHIP_SARADC=y # Amplifiers # # CONFIG_AD8366 is not set +# CONFIG_HMC425 is not set # end of Amplifiers # @@ -4451,19 +4519,20 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set -# CONFIG_LTC1660 is not set -# CONFIG_LTC2632 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set +# CONFIG_AD5770R is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5821 is not set @@ -4561,6 +4630,7 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set @@ -4571,6 +4641,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_CM3323 is not set # CONFIG_CM3605 is not set # CONFIG_CM36651 is not set +# CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set @@ -4631,6 +4702,11 @@ CONFIG_ROCKCHIP_SARADC=y # # end of Inclinometer sensors +# +# Linear and angular position sensors +# +# end of Linear and angular position sensors + # # Digital potentiometers # @@ -4660,6 +4736,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set @@ -4714,6 +4791,7 @@ CONFIG_ROCKCHIP_SARADC=y CONFIG_PWM=y CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set # CONFIG_PWM_FSL_FTM is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y @@ -4743,7 +4821,7 @@ CONFIG_RESET_CONTROLLER=y CONFIG_GENERIC_PHY=y # CONFIG_PHY_XGENE is not set # CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set @@ -4831,6 +4909,7 @@ CONFIG_PM_OPP=y # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set +# CONFIG_MOST is not set # end of Device Drivers # @@ -4911,7 +4990,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # end of CD-ROM/DVD Filesystems # -# DOS/FAT/NT Filesystems +# DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=y # CONFIG_MSDOS_FS is not set @@ -4919,8 +4998,9 @@ CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_EXFAT_FS is not set # CONFIG_NTFS_FS is not set -# end of DOS/FAT/NT Filesystems +# end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems @@ -5122,6 +5202,10 @@ CONFIG_LSM="yama,loadpin,safesetid,integrity" # Memory initialization # CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization @@ -5468,7 +5552,6 @@ CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set -CONFIG_OPTIMIZE_INLINING=y # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_ARCH_WANT_FRAME_POINTERS=y @@ -5482,12 +5565,12 @@ CONFIG_FRAME_POINTER=y CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" CONFIG_DEBUG_FS=y CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set -CONFIG_UBSAN_ALIGNMENT=y # end of Generic Kernel Debugging Instruments CONFIG_DEBUG_KERNEL=y @@ -5533,6 +5616,7 @@ CONFIG_PANIC_TIMEOUT=0 # CONFIG_SOFTLOCKUP_DETECTOR is not set # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set +# CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # @@ -5614,7 +5698,6 @@ CONFIG_STRICT_DEVMEM=y # CONFIG_PID_IN_CONTEXTIDR is not set # CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set # CONFIG_DEBUG_WX is not set -# CONFIG_DEBUG_ALIGN_RODATA is not set # CONFIG_ARM64_RELOC_TEST is not set # CONFIG_CORESIGHT is not set # end of arm64 Debugging diff --git a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.7.patch b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.7.patch deleted file mode 100644 index 78fed45dd8..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.7.patch +++ /dev/null @@ -1,5094 +0,0 @@ -From 84d711981e6b1e37d4b1058695671f2ad86a94b6 Mon Sep 17 00:00:00 2001 -From: Wambui Karuga -Date: Thu, 9 Jan 2020 17:20:57 +0300 -Subject: [PATCH] drm/rockchip: use DIV_ROUND_UP macro for calculations. - -Replace the open coded calculation with the more concise and readable -DIV_ROUND_UP macro. - -Signed-off-by: Wambui Karuga -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200109142057.10744-1-wambui.karugax@gmail.com -(cherry picked from commit 53c902b9998aab63c048af5798cbfd33b938cbdd) ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -index 0b3d18c457b2..cc672620d6e0 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -@@ -328,7 +328,7 @@ static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h, - { - int act_height; - -- act_height = (src_h + vskiplines - 1) / vskiplines; -+ act_height = DIV_ROUND_UP(src_h, vskiplines); - - if (act_height == dst_h) - return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines; - -From c78c615e0084777d0e78c1ca0ed1cbd95365ce8b Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Tue, 31 Dec 2019 09:12:36 +0100 -Subject: [PATCH] drm/rockchip: Add missing vmalloc header -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The Rockship DRM GEM code uses vmap()/vunmap() so vmalloc header must be -included to avoid warnings like (on IA64, compile tested): - - drivers/gpu/drm/rockchip/rockchip_drm_gem.c: In function ‘rockchip_gem_alloc_iommu’: - drivers/gpu/drm/rockchip/rockchip_drm_gem.c:134:20: error: - implicit declaration of function ‘vmap’ [-Werror=implicit-function-declaration] - -Reported-by: kbuild test robot -Signed-off-by: Krzysztof Kozlowski -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/1577779956-7612-1-git-send-email-krzk@kernel.org -(cherry picked from commit 9590a99cfb3bcb472d6e0dd783c2051620c6c096) ---- - drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c -index 7582d0e6a60a..0d1884684dcb 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c -@@ -6,6 +6,7 @@ - - #include - #include -+#include - - #include - #include - -From 44a34705482f9faec6e43520cb4d709b4af86605 Mon Sep 17 00:00:00 2001 -From: Daniel Vetter -Date: Fri, 13 Dec 2019 18:26:08 +0100 -Subject: [PATCH] drm/rockchip: plane_state->fb iff plane_state->crtc -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Checking both is one too much, so wrap a WARN_ON around it to stope -the copypasta. - -Reviewed-by: Heiko Stuebner -Acked-by: Sam Ravnborg -Signed-off-by: Daniel Vetter -Cc: Sandy Huang -Cc: "Heiko Stübner" -Cc: linux-arm-kernel@lists.infradead.org -Cc: linux-rockchip@lists.infradead.org -Link: https://patchwork.freedesktop.org/patch/msgid/20191213172612.1514842-6-daniel.vetter@ffwll.ch -(cherry picked from commit fd907adeb793dc68a0353a8915abc37011bceae2) ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index d04b3492bdac..cecb2cc781f5 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -724,7 +724,7 @@ static int vop_plane_atomic_check(struct drm_plane *plane, - int max_scale = win->phy->scl ? FRAC_16_16(8, 1) : - DRM_PLANE_HELPER_NO_SCALING; - -- if (!crtc || !fb) -+ if (!crtc || WARN_ON(!fb)) - return 0; - - crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); - -From fee0fd90706f8f01002fda1984320c9d0cd687e7 Mon Sep 17 00:00:00 2001 -From: Enric Balletbo i Serra -Date: Fri, 7 Feb 2020 15:13:24 +0100 -Subject: [PATCH] arm64: dts: rk3399: Remove extcon unit address and - extcon-cells from Gru - -The cros-ec-extcon has no reg property so remove the unit address from -the DT node to make DT compiler happy. - -While here, remove the inexistent extcon-cells property from the extcon -nodes. - -Signed-off-by: Enric Balletbo i Serra -Link: https://lore.kernel.org/r/20200207141324.3188898-1-enric.balletbo@collabora.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 6f7e1c1929e0ae0d088cc1f7b5174a8faa7bd711) ---- - arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 4 +--- - arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 4 +--- - 2 files changed, 2 insertions(+), 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi -index 7cd6d470c1cb..1384dabbdf40 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi -@@ -291,11 +291,9 @@ ap_i2c_tp: &i2c5 { - #pwm-cells = <1>; - }; - -- usbc_extcon1: extcon@1 { -+ usbc_extcon1: extcon1 { - compatible = "google,extcon-usbc-cros-ec"; - google,usb-port-id = <1>; -- -- #extcon-cells = <0>; - }; - }; - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi -index dd5624975c9b..2f3997740068 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi -@@ -570,11 +570,9 @@ ap_i2c_audio: &i2c8 { - #size-cells = <0>; - }; - -- usbc_extcon0: extcon@0 { -+ usbc_extcon0: extcon0 { - compatible = "google,extcon-usbc-cros-ec"; - google,usb-port-id = <0>; -- -- #extcon-cells = <0>; - }; - }; - }; - -From 4d7f6392b3e930b23cbce61d6839622874138388 Mon Sep 17 00:00:00 2001 -From: Alexis Ballier -Date: Thu, 6 Feb 2020 16:10:24 +0100 -Subject: [PATCH] arm64: dts: rockchip: Add ethernet phy to rk3399-orangepi - -Enables INTB. -The wiring is the same as the nanopi4, so this is heavily based on: -- [1a4e6203f0c] arm64: dts: rockchip: Add nanopi4 ethernet phy -- [bc43cee88aa] arm64: dts: rockchip: Update nanopi4 phy reset properties -by Robin Murphy. - -Signed-off-by: Alexis Ballier -Cc: devicetree@vger.kernel.org -Cc: Heiko Stuebner -Cc: Robin Murphy -Cc: linux-arm-kernel@lists.infradead.org -Cc: linux-rockchip@lists.infradead.org -Cc: linux-kernel@vger.kernel.org -Link: https://lore.kernel.org/r/20200206151025.3813-1-aballier@gentoo.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit e5ab00edc3d5c4cf90aa0bc918bfe87ee47a6990) ---- - arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 31 +++++++++++++++++++++--- - 1 file changed, 27 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -index 9c659f3115c8..1767015e684c 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -@@ -202,14 +202,27 @@ - clock_in_out = "input"; - phy-supply = <&vcc3v3_s3>; - phy-mode = "rgmii"; -+ phy-handle = <&rtl8211e>; - pinctrl-names = "default"; -- pinctrl-0 = <&rgmii_pins>; -- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; -- snps,reset-active-low; -- snps,reset-delays-us = <0 10000 50000>; -+ pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; - tx_delay = <0x28>; - rx_delay = <0x11>; - status = "okay"; -+ -+ mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ rtl8211e: phy@1 { -+ reg = <1>; -+ interrupt-parent = <&gpio3>; -+ interrupts = ; -+ reset-assert-us = <10000>; -+ reset-deassert-us = <30000>; -+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; -+ }; -+ }; - }; - - &gpu { -@@ -537,6 +550,16 @@ - }; - }; - -+ phy { -+ phy_intb: phy-intb { -+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ phy_rstb: phy-rstb { -+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = - -From 50cc5b38255117b69898dc5dd2c080b32045f8aa Mon Sep 17 00:00:00 2001 -From: Alexis Ballier -Date: Thu, 6 Feb 2020 16:10:25 +0100 -Subject: [PATCH] arm64: dts: rockchip: Explicitly pinmux the regulator - configuration GPIOs on rk3399-orangepi - -Those GPIOs define which register is used by the GPU & CPUB regulators -for sleep mode. The register is defined here, so better have the GPIOs -explicitly set too. - -Signed-off-by: Alexis Ballier -Cc: devicetree@vger.kernel.org -Cc: Heiko Stuebner -Cc: linux-arm-kernel@lists.infradead.org -Cc: linux-rockchip@lists.infradead.org -Cc: linux-kernel@vger.kernel.org -Link: https://lore.kernel.org/r/20200206151025.3813-2-aballier@gentoo.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit dbb0a828e9ab5198bd0bb249f074d86910e123f6) ---- - arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -index 1767015e684c..f9f7246d4d2f 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts -@@ -432,6 +432,8 @@ - compatible = "silergy,syr827"; - reg = <0x40>; - fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&cpu_b_sleep>; - regulator-name = "vdd_cpu_b"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; -@@ -449,6 +451,8 @@ - compatible = "silergy,syr828"; - reg = <0x41>; - fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gpu_sleep>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; -@@ -561,6 +565,14 @@ - }; - - pmic { -+ cpu_b_sleep: cpu-b-sleep { -+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ gpu_sleep: gpu-sleep { -+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ - pmic_int_l: pmic-int-l { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - -From 684fc103102b9d6ca11cde60e31bb55247f42a89 Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 18 Feb 2020 21:31:58 +0000 -Subject: [PATCH] ASoC: dt-bindings: Make RK3328 codec GPIO explicit - -Existing RK3328 codec drivers have overloaded the GRF phandle to assume -implicit control of the limited-function GPIO_MUTE pin, which is usually -used to enable an external audio line driver IC. Since this pin has a -proper binding of its own (see gpio/rockchip,rk3328-grf-gpio.txt), make -a GPIO explicit in the codec binding too. This will help avoid ambiguity -on boards that use that pin for some other purpose. - -(and while touching the example, enforce the "don't include status" rule) - -Signed-off-by: Robin Murphy -Link: https://lore.kernel.org/r/5f7a399dea8a9dedef57f6f99f0f6ab1c1fdc56a.1581376744.git.robin.murphy@arm.com -Signed-off-by: Mark Brown -(cherry picked from commit e14980976534d9d94f5cddd70033707965482ede) ---- - Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt -index 2469588c7ccb..1ecd75d2032a 100644 ---- a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt -+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.txt -@@ -10,6 +10,11 @@ Required properties: - - clock-names: should be "pclk". - - spk-depop-time-ms: speak depop time msec. - -+Optional properties: -+ -+- mute-gpios: GPIO specifier for external line driver control (typically the -+ dedicated GPIO_MUTE pin) -+ - Example for rk3328 internal codec: - - codec: codec@ff410000 { -@@ -18,6 +23,6 @@ codec: codec@ff410000 { - rockchip,grf = <&grf>; - clocks = <&cru PCLK_ACODEC>; - clock-names = "pclk"; -+ mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; - spk-depop-time-ms = 100; -- status = "disabled"; - }; - -From 217cd3f65e00b5a8832f184ada29b9eb3372678c Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 18 Feb 2020 21:31:59 +0000 -Subject: [PATCH] ASoC: rockchip: Make RK3328 GPIO_MUTE control explicit - -The RK3328 reference design uses an external line driver IC as a buffer -on the analog codec output, enabled by the GPIO_MUTE pin, and such a -configuration is currently assumed in the codec driver's direct poking -of GRF_SOC_CON10 to control the GPIO_MUTE output value. However, some -boards wire up analog audio yet use that pin for some other purpose, so -that assumption doesn't always hold. Update this functionality to rely -on an explicit GPIO descriptor, such that it can be managed at the -board level. - -Signed-off-by: Robin Murphy -Link: https://lore.kernel.org/r/5bc383ed1832f0f5d1dcb3c97ad92fd68e5217e3.1581376744.git.robin.murphy@arm.com -Signed-off-by: Mark Brown -(cherry picked from commit 87d12d5545fa72d67d99d797cdb464c0c7efb9c9) ---- - sound/soc/codecs/rk3328_codec.c | 31 ++++++++++++++++--------------- - 1 file changed, 16 insertions(+), 15 deletions(-) - -diff --git a/sound/soc/codecs/rk3328_codec.c b/sound/soc/codecs/rk3328_codec.c -index 287c962ba00d..115706a55577 100644 ---- a/sound/soc/codecs/rk3328_codec.c -+++ b/sound/soc/codecs/rk3328_codec.c -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -31,7 +32,7 @@ - - struct rk3328_codec_priv { - struct regmap *regmap; -- struct regmap *grf; -+ struct gpio_desc *mute; - struct clk *mclk; - struct clk *pclk; - unsigned int sclk; -@@ -106,16 +107,6 @@ static int rk3328_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) - return 0; - } - --static void rk3328_analog_output(struct rk3328_codec_priv *rk3328, int mute) --{ -- unsigned int val = BIT(17); -- -- if (mute) -- val |= BIT(1); -- -- regmap_write(rk3328->grf, RK3328_GRF_SOC_CON10, val); --} -- - static int rk3328_digital_mute(struct snd_soc_dai *dai, int mute) - { - struct rk3328_codec_priv *rk3328 = -@@ -205,7 +196,7 @@ static int rk3328_codec_open_playback(struct rk3328_codec_priv *rk3328) - } - - msleep(rk3328->spk_depop_time); -- rk3328_analog_output(rk3328, 1); -+ gpiod_set_value(rk3328->mute, 0); - - regmap_update_bits(rk3328->regmap, HPOUTL_GAIN_CTRL, - HPOUTL_GAIN_MASK, OUT_VOLUME); -@@ -246,7 +237,7 @@ static int rk3328_codec_close_playback(struct rk3328_codec_priv *rk3328) - { - size_t i; - -- rk3328_analog_output(rk3328, 0); -+ gpiod_set_value(rk3328->mute, 1); - - regmap_update_bits(rk3328->regmap, HPOUTL_GAIN_CTRL, - HPOUTL_GAIN_MASK, 0); -@@ -446,7 +437,6 @@ static int rk3328_platform_probe(struct platform_device *pdev) - dev_err(&pdev->dev, "missing 'rockchip,grf'\n"); - return PTR_ERR(grf); - } -- rk3328->grf = grf; - /* enable i2s_acodec_en */ - regmap_write(grf, RK3328_GRF_SOC_CON2, - (BIT(14) << 16 | BIT(14))); -@@ -458,7 +448,18 @@ static int rk3328_platform_probe(struct platform_device *pdev) - rk3328->spk_depop_time = 200; - } - -- rk3328_analog_output(rk3328, 0); -+ rk3328->mute = gpiod_get_optional(&pdev->dev, "mute", GPIOD_OUT_HIGH); -+ if (IS_ERR(rk3328->mute)) -+ return PTR_ERR(rk3328->mute); -+ /* -+ * Rock64 is the only supported platform to have widely relied on -+ * this; if we do happen to come across an old DTB, just leave the -+ * external mute forced off. -+ */ -+ if (!rk3328->mute && of_machine_is_compatible("pine64,rock64")) { -+ dev_warn(&pdev->dev, "assuming implicit control of GPIO_MUTE; update devicetree if possible\n"); -+ regmap_write(grf, RK3328_GRF_SOC_CON10, BIT(17) | BIT(1)); -+ } - - rk3328->mclk = devm_clk_get(&pdev->dev, "mclk"); - if (IS_ERR(rk3328->mclk)) - -From e2b386b63a7ee4f2f1e195934e79150d41a085dc Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 18 Feb 2020 21:32:00 +0000 -Subject: [PATCH] arm64: dts: rockchip: Describe RK3328 GPIO_MUTE users - -Add explicit properties to describe existing boards' GPIO_MUTE usage -for the analog codec. - -Signed-off-by: Robin Murphy -Link: https://lore.kernel.org/r/53637c0359ad9473dc1391a8428ba21017ec467e.1581376744.git.robin.murphy@arm.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 612b25d2c0faaa34f12a112f6349dec82abe4573) ---- - arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 1 + - arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts -index 16f1656d5203..797e90a3ac92 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts -@@ -60,6 +60,7 @@ - }; - - &codec { -+ mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; - status = "okay"; - }; - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index 62936b432f9a..bf3e546f5266 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -@@ -104,6 +104,7 @@ - }; - - &codec { -+ mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; - status = "okay"; - - port@0 { - -From bd388d89e5899a5e2450858d4c3ac22a74ee16c3 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 09:48:27 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix cpu compatible property for rk3308 - -A test with the command below gives for example these errors: - -arch/arm64/boot/dts/rockchip/rk3308-evb.dt.yaml: cpu@0: compatible: -Additional items are not allowed ('arm,armv8' was unexpected) -arch/arm64/boot/dts/rockchip/rk3308-evb.dt.yaml: cpu@0: compatible: -['arm,cortex-a35', 'arm,armv8'] -is too long - -Fix these errors by removing the last argument of -the cpu compatible property in rk3308.dtsi. - -make ARCH=arm64 -dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/cpus.yaml - -Signed-off-by: Johan Jonker -Reviewed-by: Robin Murphy -Link: https://lore.kernel.org/r/20200228084827.16198-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 98faae2b4b2d575a11c82735460caae225288d7c) ---- - arch/arm64/boot/dts/rockchip/rk3308.dtsi | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi -index 116f1900effb..3bd5bc86086b 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi -@@ -40,7 +40,7 @@ - - cpu0: cpu@0 { - device_type = "cpu"; -- compatible = "arm,cortex-a35", "arm,armv8"; -+ compatible = "arm,cortex-a35"; - reg = <0x0 0x0>; - enable-method = "psci"; - clocks = <&cru ARMCLK>; -@@ -53,7 +53,7 @@ - - cpu1: cpu@1 { - device_type = "cpu"; -- compatible = "arm,cortex-a35", "arm,armv8"; -+ compatible = "arm,cortex-a35"; - reg = <0x0 0x1>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; -@@ -63,7 +63,7 @@ - - cpu2: cpu@2 { - device_type = "cpu"; -- compatible = "arm,cortex-a35", "arm,armv8"; -+ compatible = "arm,cortex-a35"; - reg = <0x0 0x2>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; -@@ -73,7 +73,7 @@ - - cpu3: cpu@3 { - device_type = "cpu"; -- compatible = "arm,cortex-a35", "arm,armv8"; -+ compatible = "arm,cortex-a35"; - reg = <0x0 0x3>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - -From 813b01629c9c1ded592fbcd7e47d234677c04f69 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 12:39:22 +0100 -Subject: [PATCH] arm64: dts: remove g-use-dma from rockchip usb nodes - -A test with the command below gives these errors: - -arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: usb@ff300000: -'g-use-dma', 'power-domains' do not match any of the regexes: -'pinctrl-[0-9]+' -arch/arm64/boot/dts/rockchip/rk3328-a1.dt.yaml: usb@ff580000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff580000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm64/boot/dts/rockchip/rk3328-rock64.dt.yaml: usb@ff580000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dt.yaml: usb@ff580000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' - -'g-use-dma' is not a valid option in dwc2.yaml, so remove it -from all Rockchip dtsi files. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/dwc2.yaml - -g-use-dma was deprecated in november 2016, see -https://patchwork.kernel.org/patch/9420553/ - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200228113922.20266-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit e9b6044dceeff4ec93a538df9bef28574a4c3673) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 1 - - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 - - 2 files changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index 75908c587511..4f484119fe3f 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -870,7 +870,6 @@ - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; -- g-use-dma; - phys = <&u2phy_otg>; - phy-names = "usb2-phy"; - power-domains = <&power PX30_PD_USB>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 1f53ead52c7f..bad41bc6f2d5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -957,7 +957,6 @@ - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; -- g-use-dma; - phys = <&u2phy_otg>; - phy-names = "usb2-phy"; - status = "disabled"; - -From cfd1861a8436d7f1642efea0e259d41ee705533c Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 12:39:21 +0100 -Subject: [PATCH] ARM: dts: remove g-use-dma from rockchip usb nodes - -A test with the command below gives these errors: - -arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: usb@30180000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30180000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm/boot/dts/rk3228-evb.dt.yaml: usb@30040000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm/boot/dts/rk3229-evb.dt.yaml: usb@30040000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm/boot/dts/rk3229-xms6.dt.yaml: usb@30040000: -'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' - -'g-use-dma' is not a valid option in dwc2.yaml, so remove it -from all Rockchip dtsi files. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/dwc2.yaml - -g-use-dma was deprecated in november 2016, see -https://patchwork.kernel.org/patch/9420553/ - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200228113922.20266-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit a0514bc16739c245714fc63d20c9facd711c6fe9) ---- - arch/arm/boot/dts/rk322x.dtsi | 1 - - arch/arm/boot/dts/rv1108.dtsi | 1 - - 2 files changed, 2 deletions(-) - -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index 4e90efdc9630..dac930be3fe0 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -718,7 +718,6 @@ - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; -- g-use-dma; - phys = <&u2phy0_otg>; - phy-names = "usb2-phy"; - status = "disabled"; -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index 1fd06e7cb983..9bb109d668fa 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -527,7 +527,6 @@ - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; -- g-use-dma; - phys = <&u2phy_otg>; - phy-names = "usb2-phy"; - status = "disabled"; - -From a22fc9a200afdfc43fa39ed45caf90e23829b2ce Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 16:53:52 +0100 -Subject: [PATCH] ARM: dts: rockchip: add sram to bus_intmem nodename for - rv1108 - -A test with the command below gives these errors: - -arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: -bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000' -does not match '^sram(@.*)?' -arch/arm/boot/dts/rv1108-evb.dt.yaml: -bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000' -does not match '^sram(@.*)?' - -Fix this error by adding sram to the bus_intmem nodename -in rv1108.dtsi. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200228155354.27206-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 048e9a44dd93b31b1cac75092cf5d81163c9c465) ---- - arch/arm/boot/dts/rv1108.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index 9bb109d668fa..c3621b3e6556 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -102,7 +102,7 @@ - }; - }; - -- bus_intmem@10080000 { -+ bus_intmem: sram@10080000 { - compatible = "mmio-sram"; - reg = <0x10080000 0x2000>; - #address-cells = <1>; - -From 0f95e2ad1b6cdd3d628129d810e3705b9223903a Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 16:53:53 +0100 -Subject: [PATCH] ARM: dts: rockchip: add sram to bus_intmem nodename for - rk3036 - -A test with the command below gives these errors: - -arch/arm/boot/dts/rk3036-evb.dt.yaml: -bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000' -does not match '^sram(@.*)?' -arch/arm/boot/dts/rk3036-kylin.dt.yaml: -bus_intmem@10080000: $nodename:0: 'bus_intmem@10080000' -does not match '^sram(@.*)?' - -Fix this error by adding sram to the bus_intmem nodename -in rk3036.dtsi. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200228155354.27206-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 449f52e8612dc557e89545b63de3e2de062bca5b) ---- - arch/arm/boot/dts/rk3036.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi -index cf36e25195b4..b621385631a3 100644 ---- a/arch/arm/boot/dts/rk3036.dtsi -+++ b/arch/arm/boot/dts/rk3036.dtsi -@@ -101,7 +101,7 @@ - #clock-cells = <0>; - }; - -- bus_intmem@10080000 { -+ bus_intmem: sram@10080000 { - compatible = "mmio-sram"; - reg = <0x10080000 0x2000>; - #address-cells = <1>; - -From 73cbdef6b9662e6e89bc5d04b0fc01fd7c89ec7e Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 16:53:54 +0100 -Subject: [PATCH] ARM: dts: rockchip: add sram to bus_intmem nodename for - rk3288 - -A test with the command below gives for example these errors: - -arch/arm/boot/dts/rk3288-evb-act8846.dt.yaml: -bus_intmem@ff700000: $nodename:0: 'bus_intmem@ff700000' -does not match '^sram(@.*)?' -arch/arm/boot/dts/rk3288-evb-rk808.dt.yaml: -bus_intmem@ff700000: $nodename:0: 'bus_intmem@ff700000' -does not match '^sram(@.*)?' - -'rockchip-pmu-sram.txt' inherit properties from 'sram.yaml'. -Fix this error by adding 'sram' to the bus_intmem nodename -in 'rk3288.dtsi'. But 'sram' is also a node name already in use. -To prevent confusion rename it to 'pmu_sram'. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200228155354.27206-3-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 2280f861cc9efb72ce1f42407ccd3645042a8e8b) ---- - arch/arm/boot/dts/rk3288.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 9beb662166aa..039e8aa70d2d 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -718,7 +718,7 @@ - status = "disabled"; - }; - -- bus_intmem@ff700000 { -+ bus_intmem: sram@ff700000 { - compatible = "mmio-sram"; - reg = <0x0 0xff700000 0x0 0x18000>; - #address-cells = <1>; -@@ -730,7 +730,7 @@ - }; - }; - -- sram@ff720000 { -+ pmu_sram: sram@ff720000 { - compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; - reg = <0x0 0xff720000 0x0 0x1000>; - }; - -From 111a45867ad306526699eadf2c95ebd793b4f1df Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 28 Feb 2020 07:14:36 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix compatible property for Radxa ROCK - Pi N10 - -A test with the command below gives this error: - -arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dt.yaml: /: compatible: -['radxa,rockpi-n10', 'rockchip,rk3399pro'] -is not valid under any of the given schemas - -During the review process the binding was changed, -but the dts file was somehow not updated. -Fix this error by adding 'vamrs,rk3399pro-vmarc-som' to -the compatible property. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200228061436.13506-4-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 4e2e8418c4c6b1f95d61ccbf5ab354f44e202315) ---- - arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts -index b42f94179538..a1783e7f769a 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts -@@ -13,5 +13,6 @@ - - / { - model = "Radxa ROCK Pi N10"; -- compatible = "radxa,rockpi-n10", "rockchip,rk3399pro"; -+ compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som", -+ "rockchip,rk3399pro"; - }; - -From f3cbefd0013ce9c3d9d7966d0444b65af4ff6b49 Mon Sep 17 00:00:00 2001 -From: Carlos de Paula -Date: Tue, 18 Feb 2020 17:10:37 -0500 -Subject: [PATCH] arm64: dts: rockchip: Add txpbl node for RK3399/RK3328 - -Some rockchip SoCs like the RK3399 and RK3328 exhibit an issue -where tx checksumming does not work with packets larger than 1498. - -The default Programmable Buffer Length for TX in these GMAC's is -not suitable for MTUs higher than 1498. The workaround is to disable -TX offloading with 'ethtool -K eth0 tx off rx off' causing performance -impacts as it disables hardware checksumming. - -This patch sets snps,txpbl to 0x4 which is a safe number tested ok for -the most popular MTU value of 1500. - -For reference, see https://lkml.org/lkml/2019/4/1/1382. - -Signed-off-by: Carlos de Paula -Link: https://lore.kernel.org/r/20200218221040.10955-1-me@carlosedp.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 8a469ee35606ba65448d54e5a2a23302f7e79e3c) ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++ - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + - 2 files changed, 3 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index bad41bc6f2d5..2aefb38f7368 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -906,6 +906,7 @@ - resets = <&cru SRST_GMAC2IO_A>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; -+ snps,txpbl = <0x4>; - status = "disabled"; - }; - -@@ -927,6 +928,7 @@ - reset-names = "stmmaceth", "mac-phy"; - phy-mode = "rmii"; - phy-handle = <&phy>; -+ snps,txpbl = <0x4>; - status = "disabled"; - - mdio { -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 33cc21fcf4c1..cd5415d7e559 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -288,6 +288,7 @@ - resets = <&cru SRST_A_GMAC>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; -+ snps,txpbl = <0x4>; - status = "disabled"; - }; - - -From 937f21744f1471abc12a056cb12f4072deef76e8 Mon Sep 17 00:00:00 2001 -From: Jagan Teki -Date: Thu, 23 Jan 2020 19:16:39 +0530 -Subject: [PATCH] ARM: dts: rockchip: Fix vcc10_lcd name and voltage for - rk3288-vyasa - -According to hardware schematics of Vyasa RK3288 the -actual name used for vcc10_lcd is vdd10_lcd. - -regulator suspend voltage can rail upto 1.0V not 1.8V. - -Fix the name and suspend voltage for vcc10_lcd regulator. - -Signed-off-by: Jagan Teki -Link: https://lore.kernel.org/r/20200123134641.30720-1-jagan@amarulasolutions.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 8dd177410c6703fc28f586c79adf5d0734c3ac8d) ---- - arch/arm/boot/dts/rk3288-vyasa.dts | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts -index ba06e9f97ddc..d2f79e5bee87 100644 ---- a/arch/arm/boot/dts/rk3288-vyasa.dts -+++ b/arch/arm/boot/dts/rk3288-vyasa.dts -@@ -286,15 +286,15 @@ - }; - }; - -- vcc10_lcd: LDO_REG6 { -- regulator-name = "vcc10_lcd"; -+ vdd10_lcd: LDO_REG6 { -+ regulator-name = "vdd10_lcd"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; -- regulator-suspend-microvolt = <1800000>; -+ regulator-suspend-microvolt = <1000000>; - }; - }; - - -From 176a6bc2b18a0dae1271a46fe479dee77140526f Mon Sep 17 00:00:00 2001 -From: Jagan Teki -Date: Thu, 23 Jan 2020 19:16:40 +0530 -Subject: [PATCH] ARM: dts: rockchip: Fix ddc-i2c-bus for rk3288-vyasa - -ddc-i2c-bus routed for HDMI is not i2c2 but i2c5 on -Vyasa RK3288 board. - -Add support for fixing the same. - -Signed-off-by: Jagan Teki -Link: https://lore.kernel.org/r/20200123134641.30720-2-jagan@amarulasolutions.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b38a9a3f44615ccd5a44bdda1025effb11b6a613) ---- - arch/arm/boot/dts/rk3288-vyasa.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts -index d2f79e5bee87..88c63946f2a3 100644 ---- a/arch/arm/boot/dts/rk3288-vyasa.dts -+++ b/arch/arm/boot/dts/rk3288-vyasa.dts -@@ -150,7 +150,7 @@ - }; - - &hdmi { -- ddc-i2c-bus = <&i2c2>; -+ ddc-i2c-bus = <&i2c5>; - status = "okay"; - }; - -@@ -347,7 +347,7 @@ - }; - }; - --&i2c2 { -+&i2c5 { - status = "okay"; - }; - - -From a1413e1d8e95537d8fe57b19d1f9ec8f26e434c9 Mon Sep 17 00:00:00 2001 -From: Jagan Teki -Date: Thu, 23 Jan 2020 19:16:41 +0530 -Subject: [PATCH] ARM: dts: rockchip: Add vcc50_hdmi for rk3288-vyasa - -Add vcc50_hdmi regulator for Vyasa RK3288 board. - -VCC50_HDMI is the real name used for this regulator as -per the schematics. - -This regulator used for HDMI connector by detecting the -cable via HDMI_EN gpio and input rails are sourced from -VSUS_5V regulator. - -Signed-off-by: Jagan Teki -Link: https://lore.kernel.org/r/20200123134641.30720-3-jagan@amarulasolutions.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 385d567c13082b3f81c4e972b22d3f263452087f) ---- - arch/arm/boot/dts/rk3288-vyasa.dts | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts -index 88c63946f2a3..385dd59393e1 100644 ---- a/arch/arm/boot/dts/rk3288-vyasa.dts -+++ b/arch/arm/boot/dts/rk3288-vyasa.dts -@@ -78,6 +78,18 @@ - vin-supply = <&vcc_io>; - }; - -+ vcc50_hdmi: vcc50-hdmi { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc50_hdmi"; -+ enable-active-high; -+ gpio = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>; /* HDMI_EN */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc50_hdmi_en>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vsus_5v>; -+ }; -+ - vusb1_5v: vusb1-5v { - compatible = "regulator-fixed"; - regulator-name = "vusb1_5v"; -@@ -446,6 +458,12 @@ - }; - }; - -+ hdmi { -+ vcc50_hdmi_en: vcc50-hdmi-en { -+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int: pmic-int { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; - -From 365d309b4040c3b1bd4809ba46c1d06789ca2040 Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 21 Jan 2020 23:20:54 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix px30 lvds ports - -The lvds controller has two ports. port@0 for the connection -to the display controller(s) and port@1 for the connection to -the panel, so should have a ports node covering the port@x nodes. - -Signed-off-by: Heiko Stuebner -Reviewed-by: Miquel Raynal -Link: https://lore.kernel.org/r/20200121222055.4068166-1-heiko@sntech.de -(cherry picked from commit 186444c146dcfa03c7a516900bbfa26f7eb47ed6) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 25 ++++++++++++++----------- - 1 file changed, 14 insertions(+), 11 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index 4f484119fe3f..495212c288cf 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -413,27 +413,30 @@ - - lvds: lvds { - compatible = "rockchip,px30-lvds"; -- #address-cells = <1>; -- #size-cells = <0>; - phys = <&dsi_dphy>; - phy-names = "dphy"; - rockchip,grf = <&grf>; - rockchip,output = "lvds"; - status = "disabled"; - -- port@0 { -- reg = <0>; -+ ports { - #address-cells = <1>; - #size-cells = <0>; - -- lvds_vopb_in: endpoint@0 { -+ port@0 { - reg = <0>; -- remote-endpoint = <&vopb_out_lvds>; -- }; -- -- lvds_vopl_in: endpoint@1 { -- reg = <1>; -- remote-endpoint = <&vopl_out_lvds>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ lvds_vopb_in: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&vopb_out_lvds>; -+ }; -+ -+ lvds_vopl_in: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&vopl_out_lvds>; -+ }; - }; - }; - }; - -From c658d7e2f94a89509514869bbb7efefa51f6ba6f Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Wed, 4 Mar 2020 08:40:49 +0100 -Subject: [PATCH] ARM: dts: rockchip: add missing model properties - -A test with the command below gives these errors: - -arch/arm/boot/dts/rk3288-evb-act8846.dt.yaml: /: 'model' -is a required property -arch/arm/boot/dts/rk3288-evb-rk808.dt.yaml: /: 'model' -is a required property -arch/arm/boot/dts/rk3288-r89.dt.yaml: /: 'model' -is a required property - -Fix this error by adding the missing model properties to -the involved dts files. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ -schemas/root-node.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200304074051.8742-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 17ec2394d5888f77c2b11d329544d1be37549682) ---- - arch/arm/boot/dts/rk3288-evb-act8846.dts | 1 + - arch/arm/boot/dts/rk3288-evb-rk808.dts | 1 + - arch/arm/boot/dts/rk3288-r89.dts | 1 + - 3 files changed, 3 insertions(+) - -diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts -index 80080767c365..be695b8c1f67 100644 ---- a/arch/arm/boot/dts/rk3288-evb-act8846.dts -+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts -@@ -4,6 +4,7 @@ - #include "rk3288-evb.dtsi" - - / { -+ model = "Rockchip RK3288 EVB ACT8846"; - compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288"; - - vcc_lcd: vcc-lcd { -diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts -index 16788209625b..42384ea4ca21 100644 ---- a/arch/arm/boot/dts/rk3288-evb-rk808.dts -+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts -@@ -4,6 +4,7 @@ - #include "rk3288-evb.dtsi" - - / { -+ model = "Rockchip RK3288 EVB RK808"; - compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288"; - }; - -diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts -index a6ffc381abaa..a258c7ae5329 100644 ---- a/arch/arm/boot/dts/rk3288-r89.dts -+++ b/arch/arm/boot/dts/rk3288-r89.dts -@@ -9,6 +9,7 @@ - #include "rk3288.dtsi" - - / { -+ model = "Netxeon R89"; - compatible = "netxeon,r89", "rockchip,rk3288"; - - memory@0 { - -From 6697ec5052af93c1044ea19decf5870c8fca95f3 Mon Sep 17 00:00:00 2001 -From: Andy Yan -Date: Thu, 5 Mar 2020 19:39:09 +0800 -Subject: [PATCH] arm64: dts: rockchip: remove dvs2 pinctrl for pmic on rk3399 - evb - -DVS2 of pmic is connected to GND, no pinctrl for it. - -Signed-off-by: Andy Yan - -Link: https://lore.kernel.org/r/20200305113912.32226-2-andy.yan@rock-chips.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit e1577157c0e2096041d87153530b32f0bcadf5c9) ---- - arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 5 ----- - 1 file changed, 5 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -index 77008dca45bc..eb501bb8f426 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -@@ -210,11 +210,6 @@ - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; - }; -- -- pmic_dvs2: pmic-dvs2 { -- rockchip,pins = -- <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; -- }; - }; - - usb2 { - -From dde1ead56bc8fa60a0ad4660d74e49de5450f4b2 Mon Sep 17 00:00:00 2001 -From: Andy Yan -Date: Thu, 5 Mar 2020 19:39:10 +0800 -Subject: [PATCH] arm64: dts: rockchip: Add pmic dt tree for rk3399 evb - -RK3399 EVB use 2 SYR837/8 and a RK808 for power supply, -Add regulator tree for it. - -Signed-off-by: Andy Yan -Link: https://lore.kernel.org/r/20200305113912.32226-3-andy.yan@rock-chips.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 2217a8519c5724fcdac0d78bc7695b28ef59d30d) ---- - arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 222 ++++++++++++++++++++++++++++ - 1 file changed, 222 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -index eb501bb8f426..7d254cbe62f2 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -@@ -134,6 +134,228 @@ - status = "okay"; - }; - -+&i2c0 { -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ #clock-cells = <1>; -+ clock-output-names = "rk808-clkout1", "rk808-clkout2"; -+ -+ vcc1-supply = <&vcc3v3_sys>; -+ vcc2-supply = <&vcc3v3_sys>; -+ vcc3-supply = <&vcc3v3_sys>; -+ vcc4-supply = <&vcc3v3_sys>; -+ vcc6-supply = <&vcc3v3_sys>; -+ vcc7-supply = <&vcc3v3_sys>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc3v3_sys>; -+ vcc10-supply = <&vcc3v3_sys>; -+ vcc11-supply = <&vcc3v3_sys>; -+ vcc12-supply = <&vcc3v3_sys>; -+ vddio-supply = <&vcc1v8_pmu>; -+ -+ regulators { -+ vdd_log: DCDC_REG1 { -+ regulator-name = "vdd_log"; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <900000>; -+ }; -+ }; -+ -+ vdd_cpu_l: DCDC_REG2 { -+ regulator-name = "vdd_cpu_l"; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: DCDC_REG4 { -+ regulator-name = "vcc_1v8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc1v8_dvp: LDO_REG1 { -+ regulator-name = "vcc1v8_dvp"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v0_tp: LDO_REG2 { -+ regulator-name = "vcc3v0_tp"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc1v8_pmu: LDO_REG3 { -+ regulator-name = "vcc1v8_pmu"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc_sd: LDO_REG4 { -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcca3v0_codec: LDO_REG5 { -+ regulator-name = "vcca3v0_codec"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-name = "vcc_1v5"; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; -+ }; -+ }; -+ -+ vcca1v8_codec: LDO_REG7 { -+ regulator-name = "vcca1v8_codec"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG8 { -+ regulator-name = "vcc_3v0"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc3v3_s3: SWITCH_REG1 { -+ regulator-name = "vcc3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG2 { -+ regulator-name = "vcc3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ }; -+ -+ vdd_cpu_b: regulator@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_cpu_b"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: regulator@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_gpu"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ - &pwm0 { - status = "okay"; - }; - -From cacfb1b12c931cbbe0c9689df92e535a9536a037 Mon Sep 17 00:00:00 2001 -From: Andy Yan -Date: Thu, 5 Mar 2020 19:39:11 +0800 -Subject: [PATCH] arm64: dts: rockchip: remove enable-gpio of backlight on - rk3399 evb - -There is no enable-gpio for backlight control on rk3399 evb, -actually GPIO1_B5 is for LCD panle enable. So remove it from backlight -dt node. - -Signed-off-by: Andy Yan -Link: https://lore.kernel.org/r/20200305113912.32226-4-andy.yan@rock-chips.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit c5d24362cb1167f9c6708e26d4cb919b9cbdd0ee) ---- - arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -index 7d254cbe62f2..6f83d947e228 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -@@ -48,7 +48,6 @@ - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255>; - default-brightness-level = <200>; -- enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pwms = <&pwm0 0 25000 0>; - }; - - -From 800083d887622068cb2afffc017fc93bf37a4bfc Mon Sep 17 00:00:00 2001 -From: Andy Yan -Date: Thu, 5 Mar 2020 19:39:12 +0800 -Subject: [PATCH] arm64: dts: rockchip: Enable eDP display on rk3399 evb - -Add eDP panle and enable relative dt node like vop/iommu -to enable eDP display on rk3399 evb. - -Signed-off-by: Andy Yan -Link: https://lore.kernel.org/r/20200305113912.32226-5-andy.yan@rock-chips.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 6b1ed0390b9dfecd499b0a332d216de50af23356) ---- - arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 39 +++++++++++++++++++++++++++++ - 1 file changed, 39 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -index 6f83d947e228..5e5d49f3c229 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -@@ -51,6 +51,19 @@ - pwms = <&pwm0 0 25000 0>; - }; - -+ edp_panel: edp-panel { -+ compatible ="lg,lp079qx1-sp0v"; -+ backlight = <&backlight>; -+ enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; -+ power-supply = <&vcc3v3_s0>; -+ -+ port { -+ panel_in_edp: endpoint { -+ remote-endpoint = <&edp_out_panel>; -+ }; -+ }; -+ }; -+ - clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; -@@ -113,6 +126,24 @@ - - }; - -+&edp { -+ status = "okay"; -+ force-hpd; -+ -+ ports { -+ edp_out: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ edp_out_panel: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&panel_in_edp>; -+ }; -+ }; -+ }; -+}; -+ - &emmc_phy { - status = "okay"; - }; -@@ -440,3 +471,11 @@ - }; - }; - }; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; - -From 0f961cb28e0bd27787855cf286d3d217ae811ec2 Mon Sep 17 00:00:00 2001 -From: Emmanuel Vadot -Date: Wed, 4 Mar 2020 22:30:22 +0100 -Subject: [PATCH] dt-bindings: Add doc for Pine64 Pinebook Pro - -Add a compatible for Pine64 Pinebook Pro - -Signed-off-by: Emmanuel Vadot -Reviewed-by: Rob Herring -Link: https://lore.kernel.org/r/20200304213023.689983-2-t.schramm@manjaro.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit e2e699bb44e0c162dee9ee7431b684c6868204a1) ---- - Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml -index 874b0eaa2a75..f4ba00d679e6 100644 ---- a/Documentation/devicetree/bindings/arm/rockchip.yaml -+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml -@@ -402,6 +402,11 @@ properties: - - const: phytec,rk3288-phycore-som - - const: rockchip,rk3288 - -+ - description: Pine64 PinebookPro -+ items: -+ - const: pine64,pinebook-pro -+ - const: rockchip,rk3399 -+ - - description: Pine64 Rock64 - items: - - const: pine64,rock64 - -From a4283798213cf347ad8bdaa7334da320b256a443 Mon Sep 17 00:00:00 2001 -From: Dafna Hirschfeld -Date: Tue, 21 Jan 2020 16:43:14 +0100 -Subject: [PATCH] dt-bindings: convert rockchip-drm.txt to rockchip-drm.yaml - -convert the binding file rockchip-drm.txt to yaml format. -This was tested and verified on ARM and ARM64 with: -make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml -make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml - -Changes since v2: -- add a missing ">" sign in maintainers list -- change the licens to GPL-2.0-only -- add "additionalProperties: false" -- change the commit message to conform that it was tested on both ARM and ARM64 -Changes since v1: -- fixed worng sign-off -- fixed the path of the $id property to be the path of the yaml file - -Signed-off-by: Dafna Hirschfeld -Reviewed-by: Rob Herring -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200121154314.3444-1-dafna.hirschfeld@collabora.com -(cherry picked from commit 7064de726ec800f230733d9d8cccf1266160aabf) ---- - .../bindings/display/rockchip/rockchip-drm.txt | 19 ---------- - .../bindings/display/rockchip/rockchip-drm.yaml | 40 ++++++++++++++++++++++ - 2 files changed, 40 insertions(+), 19 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-drm.txt - create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-drm.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-drm.txt -deleted file mode 100644 -index 5707af89319d..000000000000 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip-drm.txt -+++ /dev/null -@@ -1,19 +0,0 @@ --Rockchip DRM master device --================================ -- --The Rockchip DRM master device is a virtual device needed to list all --vop devices or other display interface nodes that comprise the --graphics subsystem. -- --Required properties: --- compatible: Should be "rockchip,display-subsystem" --- ports: Should contain a list of phandles pointing to display interface port -- of vop devices. vop definitions as defined in -- Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt -- --example: -- --display-subsystem { -- compatible = "rockchip,display-subsystem"; -- ports = <&vopl_out>, <&vopb_out>; --}; -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml -new file mode 100644 -index 000000000000..ec8ae742d4da ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-drm.yaml -@@ -0,0 +1,40 @@ -+# SPDX-License-Identifier: (GPL-2.0-only) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip DRM master device -+ -+maintainers: -+ - Sandy Huang -+ - Heiko Stuebner -+ -+description: | -+ The Rockchip DRM master device is a virtual device needed to list all -+ vop devices or other display interface nodes that comprise the -+ graphics subsystem. -+ -+properties: -+ compatible: -+ const: rockchip,display-subsystem -+ -+ ports: -+ $ref: /schemas/types.yaml#/definitions/phandle-array -+ description: | -+ Should contain a list of phandles pointing to display interface port -+ of vop devices. vop definitions as defined in -+ Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt -+ -+required: -+ - compatible -+ - ports -+ -+additionalProperties: false -+ -+examples: -+ - | -+ display-subsystem { -+ compatible = "rockchip,display-subsystem"; -+ ports = <&vopl_out>, <&vopb_out>; -+ }; - -From 8325314c57e8dbf4b1f08da3f20889e12747fdf7 Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Wed, 4 Mar 2020 22:30:23 +0100 -Subject: [PATCH] arm64: dts: rockchip: Add initial support for Pinebook Pro - -This commit adds initial dt support for the rk3399 based Pinebook Pro. - -Signed-off-by: Tobias Schramm -Link: https://lore.kernel.org/r/20200304213023.689983-3-t.schramm@manjaro.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 5a65505a6988443b211d3bf3f5bb5b79907c33b9) ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 1096 ++++++++++++++++++++ - 2 files changed, 1097 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts - -diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile -index 60d9437096c7..ae7621309e92 100644 ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -new file mode 100644 -index 000000000000..5ea281b55fe2 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -0,0 +1,1096 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. -+ * Copyright (c) 2018 Akash Gajjar -+ * Copyright (c) 2020 Tobias Schramm -+ */ -+ -+/dts-v1/; -+#include -+#include -+#include -+#include -+#include -+#include "rk3399.dtsi" -+#include "rk3399-opp.dtsi" -+ -+/ { -+ model = "Pine64 Pinebook Pro"; -+ compatible = "pine64,pinebook-pro", "rockchip,rk3399"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ backlight: edp-backlight { -+ compatible = "pwm-backlight"; -+ power-supply = <&vcc_12v>; -+ pwms = <&pwm0 0 740740 0>; -+ }; -+ -+ edp_panel: edp-panel { -+ compatible = "boe,nv140fhmn49"; -+ backlight = <&backlight>; -+ enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&panel_en_gpio>; -+ power-supply = <&vcc3v3_panel>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ panel_in_edp: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&edp_out_panel>; -+ }; -+ }; -+ }; -+ }; -+ -+ /* -+ * Use separate nodes for gpio-keys to allow for selective deactivation -+ * of wakeup sources via sysfs without disabling the whole key -+ */ -+ gpio-key-lid { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&lidbtn_gpio>; -+ -+ lid { -+ debounce-interval = <20>; -+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; -+ label = "Lid"; -+ linux,code = ; -+ linux,input-type = ; -+ wakeup-event-action = ; -+ wakeup-source; -+ }; -+ }; -+ -+ gpio-key-power { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn_gpio>; -+ -+ power { -+ debounce-interval = <20>; -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "Power"; -+ linux,code = ; -+ wakeup-source; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrled_gpio &slpled_gpio>; -+ -+ green-led { -+ color = ; -+ default-state = "on"; -+ function = LED_FUNCTION_POWER; -+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; -+ label = "green:power"; -+ }; -+ -+ red-led { -+ color = ; -+ default-state = "off"; -+ function = LED_FUNCTION_STANDBY; -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "red:standby"; -+ panic-indicator; -+ retain-state-suspended; -+ }; -+ }; -+ -+ /* Power sequence for SDIO WiFi module */ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rk808 1>; -+ clock-names = "ext_clock"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_enable_h_gpio>; -+ post-power-on-delay-ms = <100>; -+ power-off-delay-us = <500000>; -+ -+ /* WL_REG_ON on module */ -+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ /* Audio components */ -+ es8316-sound { -+ compatible = "simple-audio-card"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hp_det_gpio>; -+ simple-audio-card,name = "rockchip,es8316-codec"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,mclk-fs = <256>; -+ -+ simple-audio-card,widgets = -+ "Microphone", "Mic Jack", -+ "Headphone", "Headphones", -+ "Speaker", "Speaker"; -+ simple-audio-card,routing = -+ "MIC1", "Mic Jack", -+ "Headphones", "HPOL", -+ "Headphones", "HPOR", -+ "Speaker Amplifier INL", "HPOL", -+ "Speaker Amplifier INR", "HPOR", -+ "Speaker", "Speaker Amplifier OUTL", -+ "Speaker", "Speaker Amplifier OUTR"; -+ -+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; -+ simple-audio-card,aux-devs = <&speaker_amp>; -+ simple-audio-card,pin-switches = "Speaker"; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s1>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&es8316>; -+ }; -+ }; -+ -+ speaker_amp: speaker-amplifier { -+ compatible = "simple-audio-amplifier"; -+ enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; -+ sound-name-prefix = "Speaker Amplifier"; -+ VCC-supply = <&pa_5v>; -+ }; -+ -+ /* Power tree */ -+ /* Root power source */ -+ vcc_sysin: vcc-sysin { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sysin"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ /* Regulators supplied by vcc_sysin */ -+ /* LCD backlight supply */ -+ vcc_12v: vcc-12v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_12v"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <12000000>; -+ regulator-max-microvolt = <12000000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* Main 3.3 V supply */ -+ vcc3v3_sys: wifi_bat: vcc3v3-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ /* 5 V USB power supply */ -+ vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwr_5v_gpio>; -+ regulator-name = "vcc5v0_usb"; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* RK3399 logic supply */ -+ vdd_log: vdd-log { -+ compatible = "pwm-regulator"; -+ pwms = <&pwm2 0 25000 1>; -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1400000>; -+ vin-supply = <&vcc_sysin>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ /* Regulators supplied by vcc3v3_sys */ -+ /* 0.9 V supply, always on */ -+ vcc_0v9: vcc-0v9 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_0v9"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <900000>; -+ regulator-max-microvolt = <900000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ /* S3 1.8 V supply, switched by vcc1v8_s3 */ -+ vcca1v8_s3: vcc1v8-s3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcca1v8_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ /* micro SD card power */ -+ vcc3v0_sd: vcc3v0-sd { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0_pwr_h_gpio>; -+ regulator-name = "vcc3v0_sd"; -+ regulator-always-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ vin-supply = <&vcc3v3_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* LCD panel power, called VCC3V3_S0 in schematic */ -+ vcc3v3_panel: vcc3v3-panel { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&lcdvcc_en_gpio>; -+ regulator-name = "vcc3v3_panel"; -+ regulator-always-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-enable-ramp-delay = <100000>; -+ vin-supply = <&vcc3v3_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* M.2 adapter power, switched by vcc1v8_s3 */ -+ vcc3v3_ssd: vcc3v3-ssd { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_ssd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc3v3_sys>; -+ }; -+ -+ /* Regulators supplied by vcc5v0_usb */ -+ /* USB 3 port power supply regulator */ -+ vcc5v0_otg: vcc5v0-otg { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_host_en_gpio>; -+ regulator-name = "vcc5v0_otg"; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* Regulators supplied by vcc5v0_usb */ -+ /* Type C port power supply regulator */ -+ vbus_5vout: vbus_typec: vbus-5vout { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_typec0_en_gpio>; -+ regulator-name = "vbus_5vout"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_usb>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ /* Regulators supplied by vcc_1v8 */ -+ /* Primary 0.9 V LDO */ -+ vcca0v9_s3: vcca0v9-s3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc0v9_s3"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc_1v8>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ mains_charger: dc-charger { -+ compatible = "gpio-charger"; -+ charger-type = "mains"; -+ gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; -+ -+ /* Also triggered by USB charger */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&dc_det_gpio>; -+ }; -+}; -+ -+&cdn_dp { -+ status = "okay"; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&edp { -+ force-hpd; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&edp_hpd>; -+ status = "okay"; -+ -+ ports { -+ edp_out: port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ edp_out_panel: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&panel_in_edp>; -+ }; -+ }; -+ }; -+}; -+ -+&emmc_phy { -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <&vdd_gpu>; -+ status = "okay"; -+}; -+ -+&hdmi_sound { -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-falling-time-ns = <4>; -+ i2c-scl-rising-time-ns = <168>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ interrupt-parent = <&gpio3>; -+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l_gpio>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sysin>; -+ vcc2-supply = <&vcc_sysin>; -+ vcc3-supply = <&vcc_sysin>; -+ vcc4-supply = <&vcc_sysin>; -+ vcc6-supply = <&vcc_sysin>; -+ vcc7-supply = <&vcc_sysin>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc_sysin>; -+ vcc10-supply = <&vcc_sysin>; -+ vcc11-supply = <&vcc_sysin>; -+ vcc12-supply = <&vcc3v3_sys>; -+ vcc13-supply = <&vcc_sysin>; -+ vcc14-supply = <&vcc_sysin>; -+ -+ regulators { -+ /* rk3399 center logic supply */ -+ vdd_center: DCDC_REG1 { -+ regulator-name = "vdd_center"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_l: DCDC_REG2 { -+ regulator-name = "vdd_cpu_l"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: vcc_wl: DCDC_REG4 { -+ regulator-name = "vcc_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ /* not used */ -+ LDO_REG1 { -+ }; -+ -+ /* not used */ -+ LDO_REG2 { -+ }; -+ -+ vcc1v8_pmupll: LDO_REG3 { -+ regulator-name = "vcc1v8_pmupll"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc_sdio: LDO_REG4 { -+ regulator-name = "vcc_sdio"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcca3v0_codec: LDO_REG5 { -+ regulator-name = "vcca3v0_codec"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-name = "vcc_1v5"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; -+ }; -+ }; -+ -+ vcca1v8_codec: LDO_REG7 { -+ regulator-name = "vcca1v8_codec"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG8 { -+ regulator-name = "vcc_3v0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc3v3_s3: SWITCH_REG1 { -+ regulator-name = "vcc3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG2 { -+ regulator-name = "vcc3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ }; -+ -+ vdd_cpu_b: regulator@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vsel1_gpio>; -+ regulator-name = "vdd_cpu_b"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ vin-supply = <&vcc_1v8>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: regulator@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ fcs,suspend-voltage-selector = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vsel2_gpio>; -+ regulator-name = "vdd_gpu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ vin-supply = <&vcc_1v8>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ i2c-scl-falling-time-ns = <4>; -+ i2c-scl-rising-time-ns = <168>; -+ status = "okay"; -+ -+ es8316: es8316@11 { -+ compatible = "everest,es8316"; -+ reg = <0x11>; -+ clocks = <&cru SCLK_I2S_8CH_OUT>; -+ clock-names = "mclk"; -+ #sound-dai-cells = <0>; -+ }; -+}; -+ -+&i2c3 { -+ i2c-scl-falling-time-ns = <15>; -+ i2c-scl-rising-time-ns = <450>; -+ status = "okay"; -+}; -+ -+&i2c4 { -+ i2c-scl-falling-time-ns = <20>; -+ i2c-scl-rising-time-ns = <600>; -+ status = "okay"; -+ -+ fusb0: fusb30x@22 { -+ compatible = "fcs,fusb302"; -+ reg = <0x22>; -+ fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fusb0_int_gpio>; -+ vbus-supply = <&vbus_typec>; -+ -+ connector { -+ compatible = "usb-c-connector"; -+ data-role = "host"; -+ label = "USB-C"; -+ op-sink-microwatt = <1000000>; -+ power-role = "dual"; -+ sink-pdos = -+ ; -+ source-pdos = -+ ; -+ try-power-role = "sink"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ usbc_hs: endpoint { -+ remote-endpoint = -+ <&u2phy0_typec_hs>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ -+ usbc_ss: endpoint { -+ remote-endpoint = -+ <&tcphy0_typec_ss>; -+ }; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ -+ usbc_dp: endpoint { -+ remote-endpoint = -+ <&tcphy0_typec_dp>; -+ }; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2s1 { -+ #sound-dai-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; -+ rockchip,capture-channels = <8>; -+ rockchip,playback-channels = <8>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ audio-supply = <&vcc_3v0>; -+ gpio1830-supply = <&vcc_3v0>; -+ sdmmc-supply = <&vcc_sdio>; -+ status = "okay"; -+}; -+ -+&pcie_phy { -+ status = "okay"; -+}; -+ -+&pcie0 { -+ bus-scan-delay-ms = <1000>; -+ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; -+ max-link-speed = <2>; -+ num-lanes = <4>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_clkreqn_cpm>; -+ vpcie0v9-supply = <&vcca0v9_s3>; -+ vpcie1v8-supply = <&vcca1v8_s3>; -+ vpcie3v3-supply = <&vcc3v3_ssd>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ buttons { -+ pwrbtn_gpio: pwrbtn-gpio { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ lidbtn_gpio: lidbtn-gpio { -+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ dc-charger { -+ dc_det_gpio: dc-det-gpio { -+ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ es8316 { -+ hp_det_gpio: hp-det-gpio { -+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ fusb302x { -+ fusb0_int_gpio: fusb0-int-gpio { -+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ i2s1 { -+ i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio { -+ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; -+ }; -+ }; -+ -+ lcd-panel { -+ lcdvcc_en_gpio: lcdvcc-en-gpio { -+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ panel_en_gpio: panel-en-gpio { -+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ lcd_panel_reset_gpio: lcd-panel-reset-gpio { -+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ leds { -+ pwrled_gpio: pwrled_gpio { -+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ slpled_gpio: slpled_gpio { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l_gpio: pmic-int-l-gpio { -+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ vsel1_gpio: vsel1-gpio { -+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ vsel2_gpio: vsel2-gpio { -+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ sdcard { -+ sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio { -+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h_gpio: wifi-enable-h-gpio { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb-typec { -+ vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio { -+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ usb2 { -+ pwr_5v_gpio: pwr-5v-gpio { -+ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { -+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ wireless-bluetooth { -+ bt_wake_gpio: bt-wake-gpio { -+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_host_wake_gpio: bt-host-wake-gpio { -+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_reset_gpio: bt-reset-gpio { -+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pmu_io_domains { -+ pmu1830-supply = <&vcc_3v0>; -+ status = "okay"; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcca1v8_s3>; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; -+ disable-wp; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc3v0_sd>; -+ vqmmc-supply = <&vcc_sdio>; -+ status = "okay"; -+}; -+ -+&sdio0 { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ cap-sdio-irq; -+ keep-power-in-suspend; -+ mmc-pwrseq = <&sdio_pwrseq>; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; -+ sd-uhs-sdr104; -+ status = "okay"; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ mmc-hs200-1_8v; -+ non-removable; -+ status = "okay"; -+}; -+ -+&spi1 { -+ max-freq = <10000000>; -+ status = "okay"; -+ -+ spiflash: flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ m25p,fast-read; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&tcphy0 { -+ status = "okay"; -+}; -+ -+&tcphy0_dp { -+ port { -+ tcphy0_typec_dp: endpoint { -+ remote-endpoint = <&usbc_dp>; -+ }; -+ }; -+}; -+ -+&tcphy0_usb3 { -+ port { -+ tcphy0_typec_ss: endpoint { -+ remote-endpoint = <&usbc_ss>; -+ }; -+ }; -+}; -+ -+&tcphy1 { -+ status = "okay"; -+}; -+ -+&tsadc { -+ /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-mode = <1>; -+ /* tshut polarity 0:LOW 1:HIGH */ -+ rockchip,hw-tshut-polarity = <1>; -+ status = "okay"; -+}; -+ -+&u2phy0 { -+ status = "okay"; -+ -+ u2phy0_otg: otg-port { -+ status = "okay"; -+ }; -+ -+ u2phy0_host: host-port { -+ phy-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ }; -+ -+ port { -+ u2phy0_typec_hs: endpoint { -+ remote-endpoint = <&usbc_hs>; -+ }; -+ }; -+}; -+ -+&u2phy1 { -+ status = "okay"; -+ -+ u2phy1_otg: otg-port { -+ status = "okay"; -+ }; -+ -+ u2phy1_host: host-port { -+ phy-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rk808 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; -+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; -+ max-speed = <1500000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; -+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; -+ vbat-supply = <&wifi_bat>; -+ vddio-supply = <&vcc_wl>; -+ }; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&usbdrd3_0 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_0 { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usbdrd3_1 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_1 { -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; - -From 6dae4e418b9ff45e35ff50f0dc21e4e10798e4c1 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Tue, 3 Mar 2020 20:29:56 +0100 -Subject: [PATCH] clk: rockchip: fix mmc get phase - -If the mmc clock has no rate, it can be assumed to be constant. -In such case, there is no measurable phase shift. Just return 0 -in this case instead of returning an error. - -Fixes: 2760878662a2 ("clk: Bail out when calculating phase fails during clk registration") -Tested-by: Markus Reichl -Signed-off-by: Jerome Brunet -Link: https://lkml.kernel.org/r/20200303192956.64410-1-jbrunet@baylibre.com -Signed-off-by: Stephen Boyd -(cherry picked from commit d894992502474a6e84644012deb14a0280acbf96) ---- - drivers/clk/rockchip/clk-mmc-phase.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c -index 4abe7ff31f53..975454a3dd72 100644 ---- a/drivers/clk/rockchip/clk-mmc-phase.c -+++ b/drivers/clk/rockchip/clk-mmc-phase.c -@@ -51,9 +51,9 @@ static int rockchip_mmc_get_phase(struct clk_hw *hw) - u16 degrees; - u32 delay_num = 0; - -- /* See the comment for rockchip_mmc_set_phase below */ -+ /* Constant signal, no measurable phase shift */ - if (!rate) -- return -EINVAL; -+ return 0; - - raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); - - -From 9332f78fed7006cdf71b923cbd202454c4c9b0b0 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 2 Mar 2020 10:27:57 +0100 -Subject: [PATCH] dt-bindings: arm: fix Rockchip Kylin board bindings - -A test with the command below gives this error: - -arch/arm/boot/dts/rk3036-kylin.dt.yaml: /: compatible: -['rockchip,rk3036-kylin', 'rockchip,rk3036'] -is not valid under any of the given schemas - -Normally the dt-binding is the authoritative part, so boards should follow -the binding, but in the kylin-case the compatible from the .dts is used for -years in the field now, so fix the binding, as otherwise -we would break old users. - -Fix this error by changing 'rockchip,kylin-rk3036' to -'rockchip,rk3036-kylin' in rockchip.yaml. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Link: https://lore.kernel.org/r/20200302092759.3291-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 194153403da834700a92bc9cf1c8acf030cef62b) ---- - Documentation/devicetree/bindings/arm/rockchip.yaml | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml -index f4ba00d679e6..62371fb25360 100644 ---- a/Documentation/devicetree/bindings/arm/rockchip.yaml -+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml -@@ -448,7 +448,7 @@ properties: - - - description: Rockchip Kylin - items: -- - const: rockchip,kylin-rk3036 -+ - const: rockchip,rk3036-kylin - - const: rockchip,rk3036 - - - description: Rockchip PX3 Evaluation board - -From 5c4ed4acf8f2c8fd06d0eaff20fc6de59f81dcc5 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 2 Mar 2020 10:27:58 +0100 -Subject: [PATCH] dt-bindings: arm: add Rockchip rk3036-evb board - -A test with the command below gives this error: - -arch/arm/boot/dts/rk3036-evb.dt.yaml: /: compatible: -['rockchip,rk3036-evb', 'rockchip,rk3036'] -is not valid under any of the given schemas - -This board was somehow never added to the documentation. -Fix this error by adding the rk3036-evb board to rockchip.yaml. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Link: https://lore.kernel.org/r/20200302092759.3291-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit ee3eff7e14eb0a2e16055ad4a6c180754391a3ac) ---- - Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml -index 62371fb25360..715586dea9bb 100644 ---- a/Documentation/devicetree/bindings/arm/rockchip.yaml -+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml -@@ -473,6 +473,11 @@ properties: - - const: rockchip,r88 - - const: rockchip,rk3368 - -+ - description: Rockchip RK3036 Evaluation board -+ items: -+ - const: rockchip,rk3036-evb -+ - const: rockchip,rk3036 -+ - - description: Rockchip RK3228 Evaluation board - items: - - const: rockchip,rk3228-evb - -From 2ea151a0bc5c873ff26195701715afc8ef5e07af Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 2 Mar 2020 10:27:59 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix compatible property for rk3399-evb - -A test with the command below gives this error: - -arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: /: compatible: -['rockchip,rk3399-evb', 'rockchip,rk3399', 'google,rk3399evb-rev2'] -is not valid under any of the given schemas - -'google,rk3399evb-rev2' was a no longer used variant for Google. -The binding only mentions 'rockchip,rk3399-evb', 'rockchip,rk3399', -so fix this error by removing 'google,rk3399evb-rev2' from -the compatible property in rk3399-evb.dts and change it into -generic rk3399-evb support only. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200302092759.3291-3-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit bf14bc6169cdb94f14f9c1d69541334f1d942ef8) ---- - arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -index 5e5d49f3c229..694b0d08d644 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts -@@ -9,8 +9,7 @@ - - / { - model = "Rockchip RK3399 Evaluation Board"; -- compatible = "rockchip,rk3399-evb", "rockchip,rk3399", -- "google,rk3399evb-rev2"; -+ compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; - - backlight: backlight { - compatible = "pwm-backlight"; - -From 1b079cfe947b4a0ee293f070495aec4ba6886de9 Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 21 Jan 2020 23:48:28 +0100 -Subject: [PATCH] drm/rockchip: rgb: don't count non-existent devices when - determining subdrivers - -rockchip_drm_endpoint_is_subdriver() may also return error codes. -For example if the target-node is in the disabled state, so no -platform-device is getting created for it. - -In that case current code would count that as external rgb device, -which in turn would make probing the rockchip-drm device fail. - -So only count the target as rgb device if the function actually -returns 0. - -Signed-off-by: Heiko Stuebner -Reviewed-by: Miquel Raynal -Link: https://patchwork.freedesktop.org/patch/msgid/20200121224828.4070067-1-heiko@sntech.de -(cherry picked from commit 7cd7943dc55e0f75a8e51af2bbdb2b0415cc3eb7) ---- - drivers/gpu/drm/rockchip/rockchip_rgb.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c -index ae730275a34f..79a7e60633e0 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_rgb.c -+++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c -@@ -98,7 +98,8 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, - if (of_property_read_u32(endpoint, "reg", &endpoint_id)) - endpoint_id = 0; - -- if (rockchip_drm_endpoint_is_subdriver(endpoint) > 0) -+ /* if subdriver (> 0) or error case (< 0), ignore entry */ -+ if (rockchip_drm_endpoint_is_subdriver(endpoint) != 0) - continue; - - child_count++; - -From 13144ec1ffcde8e064025c546bbba818342b6086 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 9 Mar 2020 13:51:45 +0100 -Subject: [PATCH] arm64: dts: rockchip: remove max-freq from &spi1 node for - Hugsun X99 - -A test with the command below does not detect all errors -in combination with 'additionalProperties: false' and -allOf: - - $ref: "spi-controller.yaml#" - -'additionalProperties' applies to all properties that are not -accounted-for by 'properties' or 'patternProperties' in -the immediate schema. - -First when we combine spi-rockchip.yaml and -spi-controller.yaml it gives this error: - -arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dt.yaml: spi@ff1d0000: -'max-freq' does not match any of the regexes: -'^.*@[0-9a-f]+$', '^slave$' - -'max-freq' is not a valid property name for spi nodes, -so remove it. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/spi-rockchip.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200309125145.14455-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 91da379fa5b42211660ef20b29e8b843784755b5) ---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index d69a613fb65a..628796f3aa64 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -610,7 +610,6 @@ - - &spi1 { - status = "okay"; -- max-freq = <10000000>; - - flash@0 { - compatible = "jedec,spi-nor"; - -From 3cb796c5358625985af7a31db247c467b5ccf993 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 9 Mar 2020 09:16:00 +0100 -Subject: [PATCH] arm64: dts: rockchip: remove rockchip,grf from vop nodes for - px30 - -An experimental test with the command below without -additional properties in 'rockchip-vop.yaml' gives this error: - -arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: vop@ff470000: -'power-domains', 'rockchip,grf' -do not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: vop@ff460000: -'power-domains', 'rockchip,grf' -do not match any of the regexes: 'pinctrl-[0-9]+' - -'rockchip,grf' is not used by the Rockchip VOP driver, -so remove it from 'vop' nodes in 'px30.dtsi'. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/ -rockchip/rockchip-vop.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200309081600.3887-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 541d99d977ac6d056f67c20ee08dcac89d0deb8a) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index 495212c288cf..6aed865fb7b3 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -1033,7 +1033,6 @@ - reset-names = "axi", "ahb", "dclk"; - iommus = <&vopb_mmu>; - power-domains = <&power PX30_PD_VO>; -- rockchip,grf = <&grf>; - status = "disabled"; - - vopb_out: port { -@@ -1075,7 +1074,6 @@ - reset-names = "axi", "ahb", "dclk"; - iommus = <&vopl_mmu>; - power-domains = <&power PX30_PD_VO>; -- rockchip,grf = <&grf>; - status = "disabled"; - - vopl_out: port { - -From 71e097cb997ced86ed0a229e0b9a331f832831b8 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 7 Mar 2020 14:48:39 +0100 -Subject: [PATCH] arm64: dts: remove no-emmc from mmc node for Rockchip PX5 EVB - -A test with the command below does not detect all errors -in combination with 'additionalProperties: false' and -allOf: - - $ref: "synopsys-dw-mshc-common.yaml#" -allOf: - - $ref: "mmc-controller.yaml#" - -'additionalProperties' applies to all properties that are not -accounted-for by 'properties' or 'patternProperties' in -the immediate schema. - -First when we combine rockchip-dw-mshc.yaml, -synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives -this error: - -arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dt.yaml: mmc@ff0c0000: -'no-emmc' does not match any of the regexes: -'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)| -uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+' - -'no-emmc' is not a valid property name for mmc nodes, -so remove it. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200307134841.13803-3-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit ba58672a2d1db3299ef7303b64e18f63d90e2564) ---- - arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts -index 231db0305a03..5ffd7b4d3036 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts -@@ -239,7 +239,6 @@ - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <200>; -- no-emmc; - no-sdio; - sd-uhs-sdr12; - sd-uhs-sdr25; - -From ce6c4d988d2c03a3f5acf0ba4bb10a160dc8706a Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 7 Mar 2020 14:48:40 +0100 -Subject: [PATCH] arm64: dts: rockchip: fix vqmmc-supply property name for - rk3399 puma - -A test with the command below does not detect all errors -in combination with 'additionalProperties: false' and -allOf: - - $ref: "synopsys-dw-mshc-common.yaml#" -allOf: - - $ref: "mmc-controller.yaml#" - -'additionalProperties' applies to all properties that are not -accounted-for by 'properties' or 'patternProperties' in -the immediate schema. - -First when we combine rockchip-dw-mshc.yaml, -synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives -this error: - -arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dt.yaml: mmc@fe320000: -'vqmmc' does not match any of the regexes: -'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)| -uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+' - -'vqmmc' is not a valid property name for mmc nodes. -Fix this error by renaming it to 'vqmmc-supply'. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200307134841.13803-4-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit bfb70fa503e46dfb70ab795e6669010a1df8885b) ---- - arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi -index c1edca3872c7..07694b196fdb 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi -@@ -480,7 +480,7 @@ - }; - - &sdmmc { -- vqmmc = <&vcc_sd>; -+ vqmmc-supply = <&vcc_sd>; - }; - - &spi1 { - -From 099df661daa4ff9181f41be373666d7fb1156ac8 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 7 Mar 2020 14:48:41 +0100 -Subject: [PATCH] arm64: dts: rockchip: replace clock-freq-min-max by - max-frequency - -A test with the command below does not detect all errors -in combination with 'additionalProperties: false' and -allOf: - - $ref: "synopsys-dw-mshc-common.yaml#" -allOf: - - $ref: "mmc-controller.yaml#" - -'additionalProperties' applies to all properties that are not -accounted-for by 'properties' or 'patternProperties' in -the immediate schema. - -First when we combine rockchip-dw-mshc.yaml, -synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives -for example this error: - -arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dt.yaml: mmc@fe320000: -'clock-freq-min-max' does not match any of the regexes: -'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)| -uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+' - -'clock-freq-min-max' is deprecated, so replace it by 'max-frequency'. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200307134841.13803-5-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b6e62d37c01601c3653a86156ad7ada5fb4bc963) ---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index 628796f3aa64..ee4867fbefe8 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -555,7 +555,7 @@ - - &sdmmc { - clock-frequency = <150000000>; -- clock-freq-min-max = <200000 150000000>; -+ max-frequency = <150000000>; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi -index b69f0f2cbd67..ba7c75c9f2a1 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi -@@ -542,7 +542,7 @@ - cap-mmc-highspeed; - cap-sd-highspeed; - clock-frequency = <100000000>; -- clock-freq-min-max = <100000 100000000>; -+ max-frequency = <100000000>; - cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; - disable-wp; - sd-uhs-sdr104; - -From e3eee1378169c4db3b6468568253f099c86603d8 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 7 Mar 2020 14:48:37 +0100 -Subject: [PATCH] ARM: dts: rockchip: fix vqmmc-supply property name for - rk3188-bqedison2qc - -A test with the command below does not detect all errors -in combination with 'additionalProperties: false' and -allOf: - - $ref: "synopsys-dw-mshc-common.yaml#" -allOf: - - $ref: "mmc-controller.yaml#" - -'additionalProperties' applies to all properties that are not -accounted-for by 'properties' or 'patternProperties' in -the immediate schema. - -First when we combine rockchip-dw-mshc.yaml, -synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives -this error: - -arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: mmc@10218000: -'vmmcq-supply' does not match any of the regexes: -'^.*@[0-9]+$', -'^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)| -uhs-(sdr(12|25|50|104)|ddr50))$', -'pinctrl-[0-9]+' - -'vmmcq-supply' is not a valid property name for mmc nodes. -Fix this error by renaming it to 'vqmmc-supply'. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200307134841.13803-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 9cd568dc588c5d168615bf34f325fabe33b2c9a0) ---- - arch/arm/boot/dts/rk3188-bqedison2qc.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts -index ad1afd403052..8afb2fd5d9f1 100644 ---- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts -+++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts -@@ -465,7 +465,7 @@ - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>; -- vmmcq-supply = <&vccio_wl>; -+ vqmmc-supply = <&vccio_wl>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - -From 18daa8365c7efd3805a33153d3312aee5f2d2ad4 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 7 Mar 2020 14:48:38 +0100 -Subject: [PATCH] ARM: dts: rockchip: fix rockchip,default-sample-phase - property names - -A test with the command below does not detect all errors -in combination with 'additionalProperties: false' and -allOf: - - $ref: "synopsys-dw-mshc-common.yaml#" -allOf: - - $ref: "mmc-controller.yaml#" - -'additionalProperties' applies to all properties that are not -accounted-for by 'properties' or 'patternProperties' in -the immediate schema. - -First when we combine rockchip-dw-mshc.yaml, -synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives -for example this error: - -arch/arm/boot/dts/rk3036-evb.dt.yaml: mmc@1021c000: -'default-sample-phase' does not match any of the regexes: -'^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)| -uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+' - -'default-sample-phase' is not a valid property name for mmc nodes. -Fix this error by renaming it to 'rockchip,default-sample-phase'. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200307134841.13803-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 8a385eb57296e87d23fb12a2308e6b2fd1029713) ---- - arch/arm/boot/dts/rk3036-kylin.dts | 2 +- - arch/arm/boot/dts/rk3036.dtsi | 2 +- - arch/arm/boot/dts/rk322x.dtsi | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts -index fb3cf005cc90..2ff9f152d29b 100644 ---- a/arch/arm/boot/dts/rk3036-kylin.dts -+++ b/arch/arm/boot/dts/rk3036-kylin.dts -@@ -319,7 +319,7 @@ - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; -- default-sample-phase = <90>; -+ rockchip,default-sample-phase = <90>; - keep-power-in-suspend; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; -diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi -index b621385631a3..bc53f0ca0f25 100644 ---- a/arch/arm/boot/dts/rk3036.dtsi -+++ b/arch/arm/boot/dts/rk3036.dtsi -@@ -263,7 +263,7 @@ - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; -- default-sample-phase = <158>; -+ rockchip,default-sample-phase = <158>; - disable-wp; - dmas = <&pdma 12>; - dma-names = "rx-tx"; -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index dac930be3fe0..166f56e639a2 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -698,7 +698,7 @@ - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - bus-width = <8>; -- default-sample-phase = <158>; -+ rockchip,default-sample-phase = <158>; - fifo-depth = <0x100>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - -From e500def0aeb650255c9fe838b10f9613703d024f Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 9 Mar 2020 14:40:20 +0100 -Subject: [PATCH] ARM: dts: rockchip: remove #dma-cells from dma client nodes - for rv1108 - -When we combine spi-rockchip.yaml and -spi-controller.yaml and add 'additionalProperties: false' -it gives for example this error: - -arch/arm/boot/dts/rv1108-evb.dt.yaml: spi@10270000: -'#dma-cells' does not match any of the regexes: -'^.*@[0-9a-f]+$', '^slave$' - -'#dma-cells' are not used for dma clients, so remove them all. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/spi-rockchip.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200309134020.14935-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 79f23601fcbbdd4ea00bb0165efbd52e47a69e16) ---- - arch/arm/boot/dts/rv1108.dtsi | 4 ---- - 1 file changed, 4 deletions(-) - -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index c3621b3e6556..8f8607ed721e 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -120,7 +120,6 @@ - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&pdma 6>, <&pdma 7>; -- #dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart2m0_xfer>; - status = "disabled"; -@@ -136,7 +135,6 @@ - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&pdma 4>, <&pdma 5>; -- #dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer>; - status = "disabled"; -@@ -152,7 +150,6 @@ - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&pdma 2>, <&pdma 3>; -- #dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "disabled"; -@@ -208,7 +205,6 @@ - clock-names = "spiclk", "apb_pclk"; - dmas = <&pdma 8>, <&pdma 9>; - dma-names = "tx", "rx"; -- #dma-cells = <2>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - -From 4890a98875f5ef3a3d87452955dc8609c1f81065 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 2 Mar 2020 16:30:46 +0100 -Subject: [PATCH] ARM: dts: add bus to rockchip amba nodenames - -A test with the command below gives for example this error: - -arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: amba: $nodename:0: -'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' - -AMBA is a open standard for the connection and -management of functional blocks in a SoC. -It's compatible with 'simple-bus', so fix this error -by adding 'bus' to all Rockchip 'amba' nodes. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ -schemas/simple-bus.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200302153047.17101-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 0c1cb8b00c9fbe8671ec99e0b271fca8cc2af11d) ---- - arch/arm/boot/dts/rk3036.dtsi | 2 +- - arch/arm/boot/dts/rk322x.dtsi | 2 +- - arch/arm/boot/dts/rk3288.dtsi | 2 +- - arch/arm/boot/dts/rk3xxx.dtsi | 2 +- - arch/arm/boot/dts/rv1108.dtsi | 2 +- - 5 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi -index bc53f0ca0f25..2226f0d70604 100644 ---- a/arch/arm/boot/dts/rk3036.dtsi -+++ b/arch/arm/boot/dts/rk3036.dtsi -@@ -54,7 +54,7 @@ - }; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index 166f56e639a2..8ad44213f0dc 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -95,7 +95,7 @@ - }; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 039e8aa70d2d..8bcb4a51682e 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -155,7 +155,7 @@ - }; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; -diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi -index 241f43e29c77..9438332b8a18 100644 ---- a/arch/arm/boot/dts/rk3xxx.dtsi -+++ b/arch/arm/boot/dts/rk3xxx.dtsi -@@ -32,7 +32,7 @@ - spi1 = &spi1; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index 8f8607ed721e..fda16f97605a 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -85,7 +85,7 @@ - #clock-cells = <0>; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - -From aafce08caea2d0640b10478c188fab28ccd7eaed Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 2 Mar 2020 16:30:47 +0100 -Subject: [PATCH] arm64: dts: add bus to rockchip amba nodenames - -A test with the command below gives for example this error: - -arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: amba: $nodename:0: -'amba' does not match -'^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' - -AMBA is a open standard for the connection and -management of functional blocks in a SoC. -It's compatible with 'simple-bus', so fix this error -by adding 'bus' to all Rockchip 'amba' nodes. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ -schemas/simple-bus.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200302153047.17101-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b2411befed603011826b8783c370a086b5cee163) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3308.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- - 5 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index 6aed865fb7b3..60de8e9c421b 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -703,7 +703,7 @@ - clock-names = "pclk", "timer"; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi -index 3bd5bc86086b..ac43bc3f7031 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi -@@ -513,7 +513,7 @@ - status = "disabled"; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 2aefb38f7368..7abbc8dc1bc2 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -142,7 +142,7 @@ - }; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi -index a0df61c61925..2079e877a320 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi -@@ -136,7 +136,7 @@ - }; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index cd5415d7e559..28c7ee540439 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -197,7 +197,7 @@ - #clock-cells = <0>; - }; - -- amba { -+ amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - -From 85b6662a681e87764eb2f3ae311995f8a602125a Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 16 Mar 2020 18:46:47 +0100 -Subject: [PATCH] ARM: dts: rockchip: fix lvds-encoder ports subnode for - rk3188-bqedison2qc - -A test with the command below gives this error: - -arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: lvds-encoder: -'ports' is a required property - -Fix error by adding a ports wrapper for port@0 and port@1 -inside the 'lvds-encoder' node for rk3188-bqedison2qc. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/ -bridge/lvds-codec.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200316174647.5598-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 1a7e99599dffd836fcb720cdc0eaf3cd43d7af4a) ---- - arch/arm/boot/dts/rk3188-bqedison2qc.dts | 27 ++++++++++++++++----------- - 1 file changed, 16 insertions(+), 11 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts -index 8afb2fd5d9f1..66a0ff196eb1 100644 ---- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts -+++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts -@@ -58,20 +58,25 @@ - - lvds-encoder { - compatible = "ti,sn75lvds83", "lvds-encoder"; -- #address-cells = <1>; -- #size-cells = <0>; - -- port@0 { -- reg = <0>; -- lvds_in_vop0: endpoint { -- remote-endpoint = <&vop0_out_lvds>; -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ -+ lvds_in_vop0: endpoint { -+ remote-endpoint = <&vop0_out_lvds>; -+ }; - }; -- }; - -- port@1 { -- reg = <1>; -- lvds_out_panel: endpoint { -- remote-endpoint = <&panel_in_lvds>; -+ port@1 { -+ reg = <1>; -+ -+ lvds_out_panel: endpoint { -+ remote-endpoint = <&panel_in_lvds>; -+ }; - }; - }; - }; - -From 004fd001990a5f3cbe5496f9081704a8b1b04979 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Mon, 16 Mar 2020 17:54:53 +0100 -Subject: [PATCH] ARM: dts: rockchip: rk3xxx: fix L2 cache-controller nodename - -A test with the command below gives for example this error: - -arch/arm/boot/dts/rk3066a-bqcurie2.dt.yaml: -l2-cache-controller@10138000: $nodename:0: -'l2-cache-controller@10138000' -does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' - -Fix error by changing nodename to 'cache-controller'. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200316165453.3022-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit c0044dc7d692fc140a0e249ace632b9b8d5e3cce) ---- - arch/arm/boot/dts/rk3xxx.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi -index 9438332b8a18..f9fcb7e9657b 100644 ---- a/arch/arm/boot/dts/rk3xxx.dtsi -+++ b/arch/arm/boot/dts/rk3xxx.dtsi -@@ -91,7 +91,7 @@ - status = "disabled"; - }; - -- L2: l2-cache-controller@10138000 { -+ L2: cache-controller@10138000 { - compatible = "arm,pl310-cache"; - reg = <0x10138000 0x1000>; - cache-unified; - -From 0a8aa83a2bcd8dec9fb3b30bdff2f60103bb4426 Mon Sep 17 00:00:00 2001 -From: Katsuhiro Suzuki -Date: Sun, 15 Mar 2020 18:51:15 +0900 -Subject: [PATCH] ARM: dts: rockchip: use DMA channels for UARTs for RK3288 - -This patch enables to use DMAC for all UARTs that are connected to -dmac_peri core for Rochchip RK3288. - -Only uart2 is connected different DMAC (dmac_bus_s) so keep current -settings on this patch. - -Signed-off-by: Katsuhiro Suzuki -Link: https://lore.kernel.org/r/20200315095115.10106-1-katsuhiro@katsuster.net -Signed-off-by: Heiko Stuebner -(cherry picked from commit 3425fe335c29310f6628faf9a7947d07f32d8962) ---- - arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 8bcb4a51682e..e9f8a44f5f2a 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -420,6 +420,8 @@ - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; -+ dmas = <&dmac_peri 1>, <&dmac_peri 2>; -+ dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>; - status = "disabled"; -@@ -433,6 +435,8 @@ - reg-io-width = <4>; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; -+ dmas = <&dmac_peri 3>, <&dmac_peri 4>; -+ dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer>; - status = "disabled"; -@@ -459,6 +463,8 @@ - reg-io-width = <4>; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; -+ dmas = <&dmac_peri 7>, <&dmac_peri 8>; -+ dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer>; - status = "disabled"; -@@ -472,6 +478,8 @@ - reg-io-width = <4>; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; -+ dmas = <&dmac_peri 9>, <&dmac_peri 10>; -+ dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_xfer>; - status = "disabled"; - -From 5d9b53bab5c2e74a609ef5c12e5d803bc96b01c4 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 14 Mar 2020 15:07:55 +0100 -Subject: [PATCH] ARM: dts: rockchip: fix vref-supply for &saradc node rk3288 - firefly reload - -A test with the command below gives this error: - -arch/arm/boot/dts/rk3288-firefly-reload.dt.yaml: saradc@ff100000: -'vref-supply' is a required property - -PMIC Channel OUT11 with powername 'vcc_18' -(connected through R155 bridge with 'vccio_wl') -is used for the recovery key and ADC_AVDD_1V8. - -Fix error by adding 'vcc_18' as vref for the saradc. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/ -rockchip-saradc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200314140755.4877-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 6263806b0a5532ef775ba83b793c95e493c2bda0) ---- - arch/arm/boot/dts/rk3288-firefly-reload.dts | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts -index 1574383fd2dc..8c38bda21a7c 100644 ---- a/arch/arm/boot/dts/rk3288-firefly-reload.dts -+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts -@@ -234,6 +234,7 @@ - }; - - &saradc { -+ vref-supply = <&vcc_18>; - status = "okay"; - }; - - -From 247e192d7de24b88702aae9dddd32a3bbe0cf616 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 13 Mar 2020 14:26:46 +0100 -Subject: [PATCH] ARM: dts: rockchip: remove clock-frequency from saradc node - rv1108 - -An experimental test with the command below gives these errors: - -arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: adc@1038c000: -'clock-frequency' -does not match any of the regexes: 'pinctrl-[0-9]+' -arch/arm/boot/dts/rv1108-evb.dt.yaml: adc@1038c000: -'clock-frequency' -does not match any of the regexes: 'pinctrl-[0-9]+' - -'clock-frequency' is not a valid property for a saradc node, -so remove it. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/ -rockchip-saradc.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200313132646.10317-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 5b9870acf62fd799b843d2caa38f2a9610c71c7d) ---- - arch/arm/boot/dts/rv1108.dtsi | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index fda16f97605a..d12f035d59c2 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -366,7 +366,6 @@ - reg = <0x1038c000 0x100>; - interrupts = ; - #io-channel-cells = <1>; -- clock-frequency = <1000000>; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - status = "disabled"; - -From c582baf4bed344b72574a9cf53b00a63910f461d Mon Sep 17 00:00:00 2001 -From: Joshua Watt -Date: Wed, 19 Feb 2020 14:42:20 -0600 -Subject: [PATCH] ARM: dts: rockchip: Keep rk3288-tinker SD card IO powered - during reboot - -IO voltage regulator for the SD card must be kept on all the time, -otherwise when the board reboots the SD card can't be read by the -bootloader. - -Signed-off-by: Joshua Watt -Link: https://lore.kernel.org/r/20200219204224.34154-1-JPEWhacker@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 579f52f680b5693def943a8c7c9204228e1ad2f6) ---- - arch/arm/boot/dts/rk3288-tinker.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi -index 312582c1bd37..acfaa12ec239 100644 ---- a/arch/arm/boot/dts/rk3288-tinker.dtsi -+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi -@@ -276,6 +276,7 @@ - }; - - vccio_sd: LDO_REG5 { -+ regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - -From 82f1cf7e577fe4077c33d184faf7919322fb8826 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 12 Mar 2020 18:22:40 +0100 -Subject: [PATCH] ARM: dts: rockchip: swap clocks and clock-names values for - spdif nodes - -Current dts files with 'spdif' nodes are manually verified. -In order to automate this process rockchip-spdif.txt -has to be converted to yaml. In the new setup dtbs_check with -rockchip-spdif.yaml expect clocks and clock-names values -in the same order. Fix this for some older Rockchip models. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200312172240.21362-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 384fdcec3056e1bb25a4c53e6fa5a4794efae7e3) ---- - arch/arm/boot/dts/rk3188.dtsi | 4 ++-- - arch/arm/boot/dts/rk3288.dtsi | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi -index 10ede65d90f3..23655677983b 100644 ---- a/arch/arm/boot/dts/rk3188.dtsi -+++ b/arch/arm/boot/dts/rk3188.dtsi -@@ -184,8 +184,8 @@ - compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; - reg = <0x1011e000 0x2000>; - #sound-dai-cells = <0>; -- clock-names = "hclk", "mclk"; -- clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>; -+ clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>; -+ clock-names = "mclk", "hclk"; - dmas = <&dmac1_s 8>; - dma-names = "tx"; - interrupts = ; -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index e9f8a44f5f2a..3543eceabc1c 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -954,8 +954,8 @@ - compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif"; - reg = <0x0 0xff8b0000 0x0 0x10000>; - #sound-dai-cells = <0>; -- clock-names = "hclk", "mclk"; -- clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>; -+ clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>; -+ clock-names = "mclk", "hclk"; - dmas = <&dmac_bus_s 3>; - dma-names = "tx"; - interrupts = ; - -From 0e53029f2ab50167e8aae55daa9cdf31a780e1b4 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 12 Mar 2020 18:14:38 +0100 -Subject: [PATCH] ARM: dts: rockchip: remove clock-names property from - 'generic-ehci' nodes - -A test with the command below gives for example this error: - -arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30140000: -'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' - -'clock-names' is not a valid property name for usb_host nodes with -compatible string 'generic-ehci', so remove them. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200312171441.21144-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit d1068578ec5978c071e1d5beb02d564ab8472a3f) ---- - arch/arm/boot/dts/rk322x.dtsi | 3 --- - arch/arm/boot/dts/rk3288.dtsi | 2 -- - arch/arm/boot/dts/rv1108.dtsi | 1 - - 3 files changed, 6 deletions(-) - -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index 8ad44213f0dc..7db5b3723c88 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -728,7 +728,6 @@ - reg = <0x30080000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy0>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy0_host>; - phy-names = "usb"; - status = "disabled"; -@@ -750,7 +749,6 @@ - reg = <0x300c0000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&u2phy1>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy1_otg>; - phy-names = "usb"; - status = "disabled"; -@@ -774,7 +772,6 @@ - clocks = <&cru HCLK_HOST2>, <&u2phy1>; - phys = <&u2phy1_host>; - phy-names = "usb"; -- clock-names = "usbhost", "utmi"; - status = "disabled"; - }; - -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 3543eceabc1c..b4e6df725fbb 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -609,7 +609,6 @@ - reg = <0x0 0xff500000 0x0 0x100>; - interrupts = ; - clocks = <&cru HCLK_USBHOST0>; -- clock-names = "usbhost"; - phys = <&usbphy1>; - phy-names = "usb"; - status = "disabled"; -@@ -652,7 +651,6 @@ - reg = <0x0 0xff5c0000 0x0 0x100>; - interrupts = ; - clocks = <&cru HCLK_HSIC>; -- clock-names = "usbhost"; - status = "disabled"; - }; - -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index d12f035d59c2..e09155b0f29c 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -494,7 +494,6 @@ - reg = <0x30140000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - -From 430f78f9802860e15e0b35022d244a44bf2e9304 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 12 Mar 2020 18:14:39 +0100 -Subject: [PATCH] ARM: dts: rockchip: remove clock-names property from - 'generic-ohci' nodes - -A test with the command below gives for example this error: - -arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30160000: -'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' - -'clock-names' is not a valid property name for usb_host nodes with -compatible string 'generic-ohci', so remove them. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200312171441.21144-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit dff03873405999e9b84dc5f32370734841d6bc4e) ---- - arch/arm/boot/dts/rk322x.dtsi | 3 --- - arch/arm/boot/dts/rv1108.dtsi | 1 - - 2 files changed, 4 deletions(-) - -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index 7db5b3723c88..f44bb28c82fb 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -738,7 +738,6 @@ - reg = <0x300a0000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy0>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy0_host>; - phy-names = "usb"; - status = "disabled"; -@@ -759,7 +758,6 @@ - reg = <0x300e0000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&u2phy1>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy1_otg>; - phy-names = "usb"; - status = "disabled"; -@@ -780,7 +778,6 @@ - reg = <0x30120000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST2>, <&u2phy1>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; -diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi -index e09155b0f29c..f9cfe2c80791 100644 ---- a/arch/arm/boot/dts/rv1108.dtsi -+++ b/arch/arm/boot/dts/rv1108.dtsi -@@ -504,7 +504,6 @@ - reg = <0x30160000 0x20000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - -From 473eab4e45c5769da317207bd881f77eefeaa72d Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Wed, 11 Mar 2020 17:25:23 +0100 -Subject: [PATCH] ARM: dts: rockchip: swap clocks and clock-names values for - i2s nodes - -Current dts files with 'i2s' nodes are manually verified. -In order to automate this process rockchip-i2s.txt -has to be converted to yaml. In the new setup dtbs_check with -rockchip-i2s.yaml expect clocks and clock-names values -in the same order. Fix this for some older Rockchip models. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit d4502e6398d76b82e3d08142e956c72956642a7f) ---- - arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------ - arch/arm/boot/dts/rk3188.dtsi | 4 ++-- - arch/arm/boot/dts/rk3288.dtsi | 4 ++-- - 3 files changed, 10 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi -index 3d1b02f45ffd..f3fc92e57f11 100644 ---- a/arch/arm/boot/dts/rk3066a.dtsi -+++ b/arch/arm/boot/dts/rk3066a.dtsi -@@ -160,10 +160,10 @@ - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; -+ clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; -+ clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 4>, <&dmac1_s 5>; - dma-names = "tx", "rx"; -- clock-names = "i2s_hclk", "i2s_clk"; -- clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; - rockchip,playback-channels = <8>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; -@@ -178,10 +178,10 @@ - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1_bus>; -+ clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>; -+ clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 6>, <&dmac1_s 7>; - dma-names = "tx", "rx"; -- clock-names = "i2s_hclk", "i2s_clk"; -- clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; -@@ -196,10 +196,10 @@ - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s2_bus>; -+ clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>; -+ clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 9>, <&dmac1_s 10>; - dma-names = "tx", "rx"; -- clock-names = "i2s_hclk", "i2s_clk"; -- clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; -diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi -index 23655677983b..a59f46a4719e 100644 ---- a/arch/arm/boot/dts/rk3188.dtsi -+++ b/arch/arm/boot/dts/rk3188.dtsi -@@ -170,10 +170,10 @@ - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; -+ clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; -+ clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 6>, <&dmac1_s 7>; - dma-names = "tx", "rx"; -- clock-names = "i2s_hclk", "i2s_clk"; -- clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index b4e6df725fbb..2cfb4cc9b495 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -970,10 +970,10 @@ - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; -+ clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; -+ clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>; - dma-names = "tx", "rx"; -- clock-names = "i2s_hclk", "i2s_clk"; -- clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - rockchip,playback-channels = <8>; - -From cd7ebcc9e0adb8e06bb3425e62dceffa127aa493 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Wed, 11 Mar 2020 17:25:24 +0100 -Subject: [PATCH] ARM: dts: rockchip: remove #address-cells and #size-cells - from i2s nodes - -An experimental test with the command below gives -for example this error: - -arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000: -'#address-cells', '#size-cells' -do not match any of the regexes: 'pinctrl-[0-9]+' - -'#address-cells' and '#size-cells' are not a valid property -for i2s nodes, so remove them. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 9b505cf5499071ad4eb2b992d6b42a330b00a3ff) ---- - arch/arm/boot/dts/rk3036.dtsi | 2 -- - arch/arm/boot/dts/rk3066a.dtsi | 6 ------ - arch/arm/boot/dts/rk3188.dtsi | 2 -- - arch/arm/boot/dts/rk322x.dtsi | 6 ------ - arch/arm/boot/dts/rk3288.dtsi | 2 -- - 5 files changed, 18 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi -index 2226f0d70604..781ac7583522 100644 ---- a/arch/arm/boot/dts/rk3036.dtsi -+++ b/arch/arm/boot/dts/rk3036.dtsi -@@ -281,8 +281,6 @@ - compatible = "rockchip,rk3036-i2s", "rockchip,rk3066-i2s"; - reg = <0x10220000 0x4000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>; - dmas = <&pdma 0>, <&pdma 1>; -diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi -index f3fc92e57f11..b599394d149d 100644 ---- a/arch/arm/boot/dts/rk3066a.dtsi -+++ b/arch/arm/boot/dts/rk3066a.dtsi -@@ -156,8 +156,6 @@ - compatible = "rockchip,rk3066-i2s"; - reg = <0x10118000 0x2000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; -@@ -174,8 +172,6 @@ - compatible = "rockchip,rk3066-i2s"; - reg = <0x1011a000 0x2000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1_bus>; - clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>; -@@ -192,8 +188,6 @@ - compatible = "rockchip,rk3066-i2s"; - reg = <0x1011c000 0x2000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s2_bus>; - clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>; -diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi -index a59f46a4719e..2298a8d840ba 100644 ---- a/arch/arm/boot/dts/rk3188.dtsi -+++ b/arch/arm/boot/dts/rk3188.dtsi -@@ -166,8 +166,6 @@ - compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s"; - reg = <0x1011a000 0x2000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index f44bb28c82fb..06172ebbf0ce 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -152,8 +152,6 @@ - compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; - reg = <0x100b0000 0x4000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>; - dmas = <&pdma 14>, <&pdma 15>; -@@ -167,8 +165,6 @@ - compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; - reg = <0x100c0000 0x4000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>; - dmas = <&pdma 11>, <&pdma 12>; -@@ -193,8 +189,6 @@ - compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s"; - reg = <0x100e0000 0x4000>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - clock-names = "i2s_clk", "i2s_hclk"; - clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>; - dmas = <&pdma 0>, <&pdma 1>; -diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi -index 2cfb4cc9b495..0cd88774db95 100644 ---- a/arch/arm/boot/dts/rk3288.dtsi -+++ b/arch/arm/boot/dts/rk3288.dtsi -@@ -968,8 +968,6 @@ - reg = <0x0 0xff890000 0x0 0x10000>; - #sound-dai-cells = <0>; - interrupts = ; -- #address-cells = <1>; -- #size-cells = <0>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>; - -From 34e544dee26f8e6903bb4247e083130f946a5b05 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 12 Mar 2020 18:22:39 +0100 -Subject: [PATCH] arm64: dts: rockchip: remove properties from spdif node - RK3399 Excavator - -An expermental test with the command below gives this error: - -arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dt.yaml: -spdif@ff870000: -'i2c-scl-falling-time-ns', 'i2c-scl-rising-time-ns', 'power-domains' -do not match any of the regexes: 'pinctrl-[0-9]+' - -'i2c-scl-falling-time-ns', 'i2c-scl-rising-time-ns' -are not valid properties for 'spdif' nodes, so remove them. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200312172240.21362-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit a2712bfb1cbddc6910fb8beeed934db888c3799c) ---- - arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts -index b4d8f60b7e44..73e269a8ae0c 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts -@@ -230,7 +230,5 @@ - }; - - &spdif { -- i2c-scl-rising-time-ns = <450>; -- i2c-scl-falling-time-ns = <15>; - status = "okay"; - }; - -From 5ed00e7067b359a2e93e313a56ddfd7dc6d47ed3 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 12 Mar 2020 18:14:40 +0100 -Subject: [PATCH] arm64: dts: rockchip: remove clock-names property from - 'generic-ehci' nodes - -A test with the command below gives for example this error: - -arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5c0000: -'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' - -'clock-names' is not a valid property name for usb_host nodes with -compatible string 'generic-ehci', so remove them. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200312171441.21144-3-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 6a92e52bae81473f8ac9a06556153176e70114a9) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 1 - - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 - - arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 - - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ---- - 4 files changed, 7 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index 60de8e9c421b..baaa7e2a7ffb 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -884,7 +884,6 @@ - reg = <0x0 0xff340000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST>; -- clock-names = "usbhost"; - phys = <&u2phy_host>; - phy-names = "usb"; - power-domains = <&power PX30_PD_USB>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 7abbc8dc1bc2..39a8b19f401d 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -969,7 +969,6 @@ - reg = <0x0 0xff5c0000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; -diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi -index 2079e877a320..1ebb0eef42da 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi -@@ -513,7 +513,6 @@ - reg = <0x0 0xff500000 0x0 0x100>; - interrupts = ; - clocks = <&cru HCLK_HOST0>; -- clock-names = "usbhost"; - status = "disabled"; - }; - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 28c7ee540439..f800a6b61eca 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -350,8 +350,6 @@ - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, - <&u2phy0>; -- clock-names = "usbhost", "arbiter", -- "utmi"; - phys = <&u2phy0_host>; - phy-names = "usb"; - status = "disabled"; -@@ -376,8 +374,6 @@ - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>, - <&u2phy1>; -- clock-names = "usbhost", "arbiter", -- "utmi"; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; - -From f56a9a3307a945f4711fbeb240636b99980f1637 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 12 Mar 2020 18:14:41 +0100 -Subject: [PATCH] arm64: dts: rockchip: remove clock-names property from - 'generic-ohci' nodes - -A test with the command below gives for example this error: - -arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5d0000: -'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' - -'clock-names' is not a valid property name for usb_host nodes with -compatible string 'generic-ohci', so remove them. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200312171441.21144-4-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 77460b3d7d794fd30c010958c2346cc9ac5aadd4) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 1 - - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 - - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ---- - 3 files changed, 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index baaa7e2a7ffb..f809dd6d5dc3 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -895,7 +895,6 @@ - reg = <0x0 0xff350000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST>; -- clock-names = "usbhost"; - phys = <&u2phy_host>; - phy-names = "usb"; - power-domains = <&power PX30_PD_USB>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 39a8b19f401d..7e88d88aab98 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -979,7 +979,6 @@ - reg = <0x0 0xff5d0000 0x0 0x10000>; - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&u2phy>; -- clock-names = "usbhost", "utmi"; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index f800a6b61eca..74f2c3d49095 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -361,8 +361,6 @@ - interrupts = ; - clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, - <&u2phy0>; -- clock-names = "usbhost", "arbiter", -- "utmi"; - phys = <&u2phy0_host>; - phy-names = "usb"; - status = "disabled"; -@@ -385,8 +383,6 @@ - interrupts = ; - clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>, - <&u2phy1>; -- clock-names = "usbhost", "arbiter", -- "utmi"; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; - -From c8be277acf3cf58a78db4dbf0f7385b044057dfb Mon Sep 17 00:00:00 2001 -From: Vivek Unune -Date: Fri, 13 Mar 2020 19:05:13 -0400 -Subject: [PATCH] arm64: dts: rockchip: Add Hugsun X99 IR receiver - -Add the IR receiver and its associated pinctrl entry. - -Tested with LibreElec linux-next-20200305 - -Signed-off-by: Vivek Unune -Link: https://lore.kernel.org/r/20200313230513.123049-1-npcomplete13@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit cd2fd91e3defe7730dc68dc1c1271434e5f27f55) ---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index ee4867fbefe8..9bd14bc0e7d5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -29,6 +29,13 @@ - regulator-max-microvolt = <5000000>; - }; - -+ ir-receiver { -+ compatible = "gpio-ir-receiver"; -+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ir_rx>; -+ }; -+ - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; -@@ -483,6 +490,12 @@ - }; - }; - -+ ir { -+ ir_rx: ir-rx { -+ rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = - -From af84389ccfb5de93beeab5c06e7fd73ca24014c4 Mon Sep 17 00:00:00 2001 -From: Vivek Unune -Date: Tue, 17 Mar 2020 01:42:49 +0100 -Subject: [PATCH] arm64: dts: rockchip: Add Hugsun X99 power led - -Remove pwm0 node as it interferes with power LED gpio. - -Tested with LibreElec linux-next-20200305 - -Signed-off-by: Vivek Unune -Link: https://lore.kernel.org/r/20200313230513.123049-1-npcomplete13@gmail.com -[split out led addition into separate patch] -Signed-off-by: Heiko Stuebner -(cherry picked from commit 68c33366a95664ab6afafd9b0ed591597890ede7) ---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 23 ++++++++++++++++++---- - 1 file changed, 19 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index 9bd14bc0e7d5..aee484a05181 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -36,6 +36,19 @@ - pinctrl-0 = <&ir_rx>; - }; - -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&power_led_gpio>; -+ -+ led-0 { -+ label = "blue:power"; -+ gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ linux,default-trigger = "default-on"; -+ }; -+ }; -+ - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; -@@ -496,6 +509,12 @@ - }; - }; - -+ leds { -+ power_led_gpio: power-led-gpio { -+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = -@@ -552,10 +571,6 @@ - }; - }; - --&pwm0 { -- status = "okay"; --}; -- - &pwm2 { - status = "okay"; - pinctrl-0 = <&pwm2_pin_pull_down>; - -From b51224385e81e6af756eb32d085c503144116a63 Mon Sep 17 00:00:00 2001 -From: Christoph Muellner -Date: Thu, 19 Mar 2020 15:08:52 +0100 -Subject: [PATCH] phy: rk-inno-usb2: Decrease verbosity of repeating log. - -phy-rockchip-inno-usb2 logs the message - - "phy-ff2c0000.syscon:usb2-phy@100.2: charger = INVALID_CHARGER" - -constantly with a frequency of about 1 Hz and a verbosity level -of INFO. As this is clearly annoying, this patch decreases -the log level to DEBUG. - -Signed-off-by: Christoph Muellner -Reviewed-by: Heiko Stuebner -Signed-off-by: Kishon Vijay Abraham I -(cherry picked from commit b263bfa5a7347214127429cbb30e0e4361e64100) ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 680cc0c8825c..a84e9f027fc4 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -763,7 +763,7 @@ static void rockchip_chg_detect_work(struct work_struct *work) - /* put the controller in normal mode */ - property_enable(base, &rphy->phy_cfg->chg_det.opmode, true); - rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work); -- dev_info(&rport->phy->dev, "charger = %s\n", -+ dev_dbg(&rport->phy->dev, "charger = %s\n", - chg_to_string(rphy->chg_type)); - return; - default: - -From 9ba699bcbe7e68492dc39d755adc01775c1c96be Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Wed, 25 Mar 2020 13:13:35 +0100 -Subject: [PATCH] dt-bindings: phy: convert phy-rockchip-inno-usb2 bindings to - yaml - -Current dts files for Rockchip with 'usb2-phy' subnodes -are manually verified. In order to automate this process -phy-rockchip-inno-usb2.txt has to be converted to yaml. - -Signed-off-by: Johan Jonker -Signed-off-by: Rob Herring -(cherry picked from commit 978e9c3ba0aa2213d0f9ec421f704f867b9ed142) ---- - .../bindings/phy/phy-rockchip-inno-usb2.txt | 81 ----------- - .../bindings/phy/phy-rockchip-inno-usb2.yaml | 155 +++++++++++++++++++++ - 2 files changed, 155 insertions(+), 81 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt - create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - -diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt -deleted file mode 100644 -index 541f5298827c..000000000000 ---- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt -+++ /dev/null -@@ -1,81 +0,0 @@ --ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK -- --Required properties (phy (parent) node): -- - compatible : should be one of the listed compatibles: -- * "rockchip,px30-usb2phy" -- * "rockchip,rk3228-usb2phy" -- * "rockchip,rk3328-usb2phy" -- * "rockchip,rk3366-usb2phy" -- * "rockchip,rk3399-usb2phy" -- * "rockchip,rv1108-usb2phy" -- - reg : the address offset of grf for usb-phy configuration. -- - #clock-cells : should be 0. -- - clock-output-names : specify the 480m output clock name. -- --Optional properties: -- - clocks : phandle + phy specifier pair, for the input clock of phy. -- - clock-names : input clock name of phy, must be "phyclk". -- - assigned-clocks : phandle of usb 480m clock. -- - assigned-clock-parents : parent of usb 480m clock, select between -- usb-phy output 480m and xin24m. -- Refer to clk/clock-bindings.txt for generic clock -- consumer properties. -- - rockchip,usbgrf : phandle to the syscon managing the "usb general -- register files". When set driver will request its -- phandle as one companion-grf for some special SoCs -- (e.g RV1108). -- - extcon : phandle to the extcon device providing the cable state for -- the otg phy. -- --Required nodes : a sub-node is required for each port the phy provides. -- The sub-node name is used to identify host or otg port, -- and shall be the following entries: -- * "otg-port" : the name of otg port. -- * "host-port" : the name of host port. -- --Required properties (port (child) node): -- - #phy-cells : must be 0. See ./phy-bindings.txt for details. -- - interrupts : specify an interrupt for each entry in interrupt-names. -- - interrupt-names : a list which should be one of the following cases: -- Regular case: -- * "otg-id" : for the otg id interrupt. -- * "otg-bvalid" : for the otg vbus interrupt. -- * "linestate" : for the host/otg linestate interrupt. -- Some SoCs use one interrupt with the above muxed together, so for these -- * "otg-mux" : otg-port interrupt, which mux otg-id/otg-bvalid/linestate -- to one. -- --Optional properties: -- - phy-supply : phandle to a regulator that provides power to VBUS. -- See ./phy-bindings.txt for details. -- --Example: -- --grf: syscon@ff770000 { -- compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd"; -- #address-cells = <1>; -- #size-cells = <1>; -- --... -- -- u2phy: usb2-phy@700 { -- compatible = "rockchip,rk3366-usb2phy"; -- reg = <0x700 0x2c>; -- #clock-cells = <0>; -- clock-output-names = "sclk_otgphy0_480m"; -- -- u2phy_otg: otg-port { -- #phy-cells = <0>; -- interrupts = , -- , -- ; -- interrupt-names = "otg-id", "otg-bvalid", "linestate"; -- }; -- -- u2phy_host: host-port { -- #phy-cells = <0>; -- interrupts = ; -- interrupt-names = "linestate"; -- }; -- }; --}; -diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml -new file mode 100644 -index 000000000000..cb71561a21b4 ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml -@@ -0,0 +1,155 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip USB2.0 phy with inno IP block -+ -+maintainers: -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ enum: -+ - rockchip,px30-usb2phy -+ - rockchip,rk3228-usb2phy -+ - rockchip,rk3328-usb2phy -+ - rockchip,rk3366-usb2phy -+ - rockchip,rk3399-usb2phy -+ - rockchip,rv1108-usb2phy -+ -+ reg: -+ maxItems: 1 -+ -+ clock-output-names: -+ description: -+ The usb 480m output clock name. -+ -+ "#clock-cells": -+ const: 0 -+ -+ "#phy-cells": -+ const: 0 -+ -+ clocks: -+ maxItems: 1 -+ -+ clock-names: -+ const: phyclk -+ -+ assigned-clocks: -+ description: -+ Phandle of the usb 480m clock. -+ -+ assigned-clock-parents: -+ description: -+ Parent of the usb 480m clock. -+ Select between usb-phy output 480m and xin24m. -+ Refer to clk/clock-bindings.txt for generic clock consumer properties. -+ -+ extcon: -+ description: -+ Phandle to the extcon device providing the cable state for the otg phy. -+ -+ rockchip,usbgrf: -+ $ref: /schemas/types.yaml#/definitions/phandle -+ description: -+ Phandle to the syscon managing the 'usb general register files'. -+ When set the driver will request its phandle as one companion-grf -+ for some special SoCs (e.g rv1108). -+ -+ host-port: -+ type: object -+ additionalProperties: false -+ -+ properties: -+ "#phy-cells": -+ const: 0 -+ -+ interrupts: -+ description: host linestate interrupt -+ -+ interrupt-names: -+ const: linestate -+ -+ phy-supply: -+ description: -+ Phandle to a regulator that provides power to VBUS. -+ See ./phy-bindings.txt for details. -+ -+ required: -+ - "#phy-cells" -+ - interrupts -+ - interrupt-names -+ -+ otg-port: -+ type: object -+ additionalProperties: false -+ -+ properties: -+ "#phy-cells": -+ const: 0 -+ -+ interrupts: -+ minItems: 1 -+ maxItems: 3 -+ -+ interrupt-names: -+ oneOf: -+ - const: linestate -+ - const: otg-mux -+ - items: -+ - const: otg-bvalid -+ - const: otg-id -+ - const: linestate -+ -+ phy-supply: -+ description: -+ Phandle to a regulator that provides power to VBUS. -+ See ./phy-bindings.txt for details. -+ -+ required: -+ - "#phy-cells" -+ - interrupts -+ - interrupt-names -+ -+required: -+ - compatible -+ - reg -+ - clock-output-names -+ - "#clock-cells" -+ - "#phy-cells" -+ - host-port -+ - otg-port -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ #include -+ u2phy0: usb2-phy@e450 { -+ compatible = "rockchip,rk3399-usb2phy"; -+ reg = <0xe450 0x10>; -+ clocks = <&cru SCLK_USB2PHY0_REF>; -+ clock-names = "phyclk"; -+ clock-output-names = "clk_usbphy0_480m"; -+ #clock-cells = <0>; -+ #phy-cells = <0>; -+ -+ u2phy0_host: host-port { -+ #phy-cells = <0>; -+ interrupts = ; -+ interrupt-names = "linestate"; -+ }; -+ -+ u2phy0_otg: otg-port { -+ #phy-cells = <0>; -+ interrupts = , -+ , -+ ; -+ interrupt-names = "otg-bvalid", "otg-id", "linestate"; -+ }; -+ }; diff --git a/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch new file mode 100644 index 0000000000..6c77dc0fa0 --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-0001-rockchip-from-5.8.patch @@ -0,0 +1,3409 @@ +From 6b78e5f6a3f6af03228b5523f58d63435896cfc8 Mon Sep 17 00:00:00 2001 +From: Thomas Zimmermann +Date: Thu, 5 Mar 2020 16:59:40 +0100 +Subject: [PATCH] drm/rockchip: Use simple encoder + +The rockchip driver uses empty implementations for its encoders. Replace +the code with the generic simple encoder. + +Signed-off-by: Thomas Zimmermann +Reviewed-by: Laurent Pinchart +Acked-by: Daniel Vetter +Link: https://patchwork.freedesktop.org/patch/msgid/20200305155950.2705-13-tzimmermann@suse.de +(cherry picked from commit 0dbd735448bfdb078a429d5d63e1bd0ef2c5d0f0) +--- + drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 9 +++------ + drivers/gpu/drm/rockchip/cdn-dp-core.c | 9 +++------ + drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 ++------ + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8 ++------ + drivers/gpu/drm/rockchip/inno_hdmi.c | 8 ++------ + drivers/gpu/drm/rockchip/rk3066_hdmi.c | 8 ++------ + drivers/gpu/drm/rockchip/rockchip_lvds.c | 10 +++------- + drivers/gpu/drm/rockchip/rockchip_rgb.c | 8 ++------ + 8 files changed, 19 insertions(+), 49 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +index ce98c08aa8b4..ade2327a10e2 100644 +--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c ++++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + + #include "rockchip_drm_drv.h" + #include "rockchip_drm_vop.h" +@@ -258,10 +259,6 @@ static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = { + .atomic_check = rockchip_dp_drm_encoder_atomic_check, + }; + +-static struct drm_encoder_funcs rockchip_dp_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static int rockchip_dp_of_probe(struct rockchip_dp_device *dp) + { + struct device *dev = dp->dev; +@@ -309,8 +306,8 @@ static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp) + dev->of_node); + DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); + +- ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs, +- DRM_MODE_ENCODER_TMDS, NULL); ++ ret = drm_simple_encoder_init(drm_dev, encoder, ++ DRM_MODE_ENCODER_TMDS); + if (ret) { + DRM_ERROR("failed to initialize encoder with drm\n"); + return ret; +diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c +index eed594bd38d3..06f85138b51b 100644 +--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c ++++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + + #include "cdn-dp-core.h" + #include "cdn-dp-reg.h" +@@ -689,10 +690,6 @@ static const struct drm_encoder_helper_funcs cdn_dp_encoder_helper_funcs = { + .atomic_check = cdn_dp_encoder_atomic_check, + }; + +-static const struct drm_encoder_funcs cdn_dp_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static int cdn_dp_parse_dt(struct cdn_dp_device *dp) + { + struct device *dev = dp->dev; +@@ -1030,8 +1027,8 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data) + dev->of_node); + DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); + +- ret = drm_encoder_init(drm_dev, encoder, &cdn_dp_encoder_funcs, +- DRM_MODE_ENCODER_TMDS, NULL); ++ ret = drm_simple_encoder_init(drm_dev, encoder, ++ DRM_MODE_ENCODER_TMDS); + if (ret) { + DRM_ERROR("failed to initialize encoder with drm\n"); + return ret; +diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +index 6e1270e45f97..3feff0c45b3f 100644 +--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + + #include "rockchip_drm_drv.h" + #include "rockchip_drm_vop.h" +@@ -789,10 +790,6 @@ dw_mipi_dsi_encoder_helper_funcs = { + .disable = dw_mipi_dsi_encoder_disable, + }; + +-static const struct drm_encoder_funcs dw_mipi_dsi_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, + struct drm_device *drm_dev) + { +@@ -802,8 +799,7 @@ static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, + encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, + dsi->dev->of_node); + +- ret = drm_encoder_init(drm_dev, encoder, &dw_mipi_dsi_encoder_funcs, +- DRM_MODE_ENCODER_DSI, NULL); ++ ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_DSI); + if (ret) { + DRM_ERROR("Failed to initialize encoder with drm\n"); + return ret; +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index 7f56d8c3491d..121aa8a63a76 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + + #include "rockchip_drm_drv.h" + #include "rockchip_drm_vop.h" +@@ -237,10 +238,6 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, + return (valid) ? MODE_OK : MODE_BAD; + } + +-static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder) + { + } +@@ -546,8 +543,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, + } + + drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); +- drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs, +- DRM_MODE_ENCODER_TMDS, NULL); ++ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); + + platform_set_drvdata(pdev, hdmi); + +diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c +index e5864e823020..7afdc54eb3ec 100644 +--- a/drivers/gpu/drm/rockchip/inno_hdmi.c ++++ b/drivers/gpu/drm/rockchip/inno_hdmi.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #include "rockchip_drm_drv.h" + #include "rockchip_drm_vop.h" +@@ -532,10 +533,6 @@ static struct drm_encoder_helper_funcs inno_hdmi_encoder_helper_funcs = { + .atomic_check = inno_hdmi_encoder_atomic_check, + }; + +-static struct drm_encoder_funcs inno_hdmi_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static enum drm_connector_status + inno_hdmi_connector_detect(struct drm_connector *connector, bool force) + { +@@ -617,8 +614,7 @@ static int inno_hdmi_register(struct drm_device *drm, struct inno_hdmi *hdmi) + return -EPROBE_DEFER; + + drm_encoder_helper_add(encoder, &inno_hdmi_encoder_helper_funcs); +- drm_encoder_init(drm, encoder, &inno_hdmi_encoder_funcs, +- DRM_MODE_ENCODER_TMDS, NULL); ++ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); + + hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; + +diff --git a/drivers/gpu/drm/rockchip/rk3066_hdmi.c b/drivers/gpu/drm/rockchip/rk3066_hdmi.c +index fe203d38664e..1c546c3a8998 100644 +--- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c ++++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c +@@ -6,6 +6,7 @@ + + #include + #include ++#include + + #include + #include +@@ -451,10 +452,6 @@ struct drm_encoder_helper_funcs rk3066_hdmi_encoder_helper_funcs = { + .atomic_check = rk3066_hdmi_encoder_atomic_check, + }; + +-static const struct drm_encoder_funcs rk3066_hdmi_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static enum drm_connector_status + rk3066_hdmi_connector_detect(struct drm_connector *connector, bool force) + { +@@ -557,8 +554,7 @@ rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi) + return -EPROBE_DEFER; + + drm_encoder_helper_add(encoder, &rk3066_hdmi_encoder_helper_funcs); +- drm_encoder_init(drm, encoder, &rk3066_hdmi_encoder_funcs, +- DRM_MODE_ENCODER_TMDS, NULL); ++ drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); + + hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; + +diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c +index 449a62908d21..63f967902c2d 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_lvds.c ++++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c +@@ -16,13 +16,14 @@ + #include + #include + #include ++ + #include + #include +- + #include + #include + #include + #include ++#include + + #include "rockchip_drm_drv.h" + #include "rockchip_drm_vop.h" +@@ -435,10 +436,6 @@ struct drm_encoder_helper_funcs px30_lvds_encoder_helper_funcs = { + .atomic_check = rockchip_lvds_encoder_atomic_check, + }; + +-static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + static int rk3288_lvds_probe(struct platform_device *pdev, + struct rockchip_lvds *lvds) + { +@@ -607,8 +604,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master, + encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, + dev->of_node); + +- ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs, +- DRM_MODE_ENCODER_LVDS, NULL); ++ ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_LVDS); + if (ret < 0) { + DRM_DEV_ERROR(drm_dev->dev, + "failed to initialize encoder: %d\n", ret); +diff --git a/drivers/gpu/drm/rockchip/rockchip_rgb.c b/drivers/gpu/drm/rockchip/rockchip_rgb.c +index 90784781e515..9a771af5d0c9 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_rgb.c ++++ b/drivers/gpu/drm/rockchip/rockchip_rgb.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + + #include "rockchip_drm_drv.h" + #include "rockchip_drm_vop.h" +@@ -67,10 +68,6 @@ struct drm_encoder_helper_funcs rockchip_rgb_encoder_helper_funcs = { + .atomic_check = rockchip_rgb_encoder_atomic_check, + }; + +-static const struct drm_encoder_funcs rockchip_rgb_encoder_funcs = { +- .destroy = drm_encoder_cleanup, +-}; +- + struct rockchip_rgb *rockchip_rgb_init(struct device *dev, + struct drm_crtc *crtc, + struct drm_device *drm_dev) +@@ -126,8 +123,7 @@ struct rockchip_rgb *rockchip_rgb_init(struct device *dev, + encoder = &rgb->encoder; + encoder->possible_crtcs = drm_crtc_mask(crtc); + +- ret = drm_encoder_init(drm_dev, encoder, &rockchip_rgb_encoder_funcs, +- DRM_MODE_ENCODER_NONE, NULL); ++ ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_NONE); + if (ret < 0) { + DRM_DEV_ERROR(drm_dev->dev, + "failed to initialize encoder: %d\n", ret); + +From 6fd7de812d8d4f76b2c05cea1dc2c6159c62d473 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 3 Apr 2020 16:22:34 +0200 +Subject: [PATCH] dt-bindings: display: convert rockchip vop bindings to yaml + +Current dts files with 'vop' nodes are manually verified. +In order to automate this process rockchip-vop.txt +has to be converted to yaml. + +Signed-off-by: Johan Jonker +Reviewed-by: Rob Herring +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-1-jbx6244@gmail.com +(cherry picked from commit 4e78ba278722480fa1fa933caa6ff24a53b441c8) +--- + .../bindings/display/rockchip/rockchip-vop.txt | 74 ------------- + .../bindings/display/rockchip/rockchip-vop.yaml | 123 +++++++++++++++++++++ + 2 files changed, 123 insertions(+), 74 deletions(-) + delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt + create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml + +diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt +deleted file mode 100644 +index 8b3a5f514205..000000000000 +--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt ++++ /dev/null +@@ -1,74 +0,0 @@ +-device-tree bindings for rockchip soc display controller (vop) +- +-VOP (Visual Output Processor) is the Display Controller for the Rockchip +-series of SoCs which transfers the image data from a video memory +-buffer to an external LCD interface. +- +-Required properties: +-- compatible: value should be one of the following +- "rockchip,rk3036-vop"; +- "rockchip,rk3126-vop"; +- "rockchip,px30-vop-lit"; +- "rockchip,px30-vop-big"; +- "rockchip,rk3066-vop"; +- "rockchip,rk3188-vop"; +- "rockchip,rk3288-vop"; +- "rockchip,rk3368-vop"; +- "rockchip,rk3366-vop"; +- "rockchip,rk3399-vop-big"; +- "rockchip,rk3399-vop-lit"; +- "rockchip,rk3228-vop"; +- "rockchip,rk3328-vop"; +- +-- reg: Must contain one entry corresponding to the base address and length +- of the register space. Can optionally contain a second entry +- corresponding to the CRTC gamma LUT address. +- +-- interrupts: should contain a list of all VOP IP block interrupts in the +- order: VSYNC, LCD_SYSTEM. The interrupt specifier +- format depends on the interrupt controller used. +- +-- clocks: must include clock specifiers corresponding to entries in the +- clock-names property. +- +-- clock-names: Must contain +- aclk_vop: for ddr buffer transfer. +- hclk_vop: for ahb bus to R/W the phy regs. +- dclk_vop: pixel clock. +- +-- resets: Must contain an entry for each entry in reset-names. +- See ../reset/reset.txt for details. +-- reset-names: Must include the following entries: +- - axi +- - ahb +- - dclk +- +-- iommus: required a iommu node +- +-- port: A port node with endpoint definitions as defined in +- Documentation/devicetree/bindings/media/video-interfaces.txt. +- +-Example: +-SoC specific DT entry: +- vopb: vopb@ff930000 { +- compatible = "rockchip,rk3288-vop"; +- reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>; +- interrupts = ; +- clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; +- clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; +- resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; +- reset-names = "axi", "ahb", "dclk"; +- iommus = <&vopb_mmu>; +- vopb_out: port { +- #address-cells = <1>; +- #size-cells = <0>; +- vopb_out_edp: endpoint@0 { +- reg = <0>; +- remote-endpoint=<&edp_in_vopb>; +- }; +- vopb_out_hdmi: endpoint@1 { +- reg = <1>; +- remote-endpoint=<&hdmi_in_vopb>; +- }; +- }; +- }; +diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml +new file mode 100644 +index 000000000000..42ee2b5c31e1 +--- /dev/null ++++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml +@@ -0,0 +1,123 @@ ++# SPDX-License-Identifier: GPL-2.0 ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Rockchip SoC display controller (VOP) ++ ++description: ++ VOP (Video Output Processor) is the display controller for the Rockchip ++ series of SoCs which transfers the image data from a video memory ++ buffer to an external LCD interface. ++ ++maintainers: ++ - Sandy Huang ++ - Heiko Stuebner ++ ++properties: ++ compatible: ++ enum: ++ - rockchip,px30-vop-big ++ - rockchip,px30-vop-lit ++ - rockchip,rk3036-vop ++ - rockchip,rk3066-vop ++ - rockchip,rk3126-vop ++ - rockchip,rk3188-vop ++ - rockchip,rk3228-vop ++ - rockchip,rk3288-vop ++ - rockchip,rk3328-vop ++ - rockchip,rk3366-vop ++ - rockchip,rk3368-vop ++ - rockchip,rk3399-vop-big ++ - rockchip,rk3399-vop-lit ++ ++ reg: ++ minItems: 1 ++ items: ++ - description: ++ Must contain one entry corresponding to the base address and length ++ of the register space. ++ - description: ++ Can optionally contain a second entry corresponding to ++ the CRTC gamma LUT address. ++ ++ interrupts: ++ maxItems: 1 ++ description: ++ The VOP interrupt is shared by several interrupt sources, such as ++ frame start (VSYNC), line flag and other status interrupts. ++ ++ clocks: ++ items: ++ - description: Clock for ddr buffer transfer. ++ - description: Pixel clock. ++ - description: Clock for the ahb bus to R/W the phy regs. ++ ++ clock-names: ++ items: ++ - const: aclk_vop ++ - const: dclk_vop ++ - const: hclk_vop ++ ++ resets: ++ maxItems: 3 ++ ++ reset-names: ++ items: ++ - const: axi ++ - const: ahb ++ - const: dclk ++ ++ port: ++ type: object ++ description: ++ A port node with endpoint definitions as defined in ++ Documentation/devicetree/bindings/media/video-interfaces.txt. ++ ++ iommus: ++ maxItems: 1 ++ ++required: ++ - compatible ++ - reg ++ - interrupts ++ - clocks ++ - clock-names ++ - resets ++ - reset-names ++ - port ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ #include ++ vopb: vopb@ff930000 { ++ compatible = "rockchip,rk3288-vop"; ++ reg = <0x0 0xff930000 0x0 0x19c>, ++ <0x0 0xff931000 0x0 0x1000>; ++ interrupts = ; ++ clocks = <&cru ACLK_VOP0>, ++ <&cru DCLK_VOP0>, ++ <&cru HCLK_VOP0>; ++ clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; ++ resets = <&cru SRST_LCDC1_AXI>, ++ <&cru SRST_LCDC1_AHB>, ++ <&cru SRST_LCDC1_DCLK>; ++ reset-names = "axi", "ahb", "dclk"; ++ iommus = <&vopb_mmu>; ++ vopb_out: port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ vopb_out_edp: endpoint@0 { ++ reg = <0>; ++ remote-endpoint=<&edp_in_vopb>; ++ }; ++ vopb_out_hdmi: endpoint@1 { ++ reg = <1>; ++ remote-endpoint=<&hdmi_in_vopb>; ++ }; ++ }; ++ }; + +From be1bed307943cb2d6b871ab8cf938c26b5db62b7 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 3 Apr 2020 16:22:35 +0200 +Subject: [PATCH] dt-bindings: display: rockchip-vop: add additional properties + +In the old txt situation we add/describe only properties that are used +by the driver/hardware itself. With yaml it also filters things in a +node that are used by other drivers like 'assigned-clocks' and +'assigned-clock-rates' for rk3399 and 'power-domains' for most +Rockchip Socs in 'vop' nodes, so add them to 'rockchip-vop.yaml'. + +Signed-off-by: Johan Jonker +Reviewed-by: Rob Herring +Signed-off-by: Sam Ravnborg +Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-2-jbx6244@gmail.com +(cherry picked from commit 0706cd0f94d4d8dd71fad7f70dcbf19d514391ef) +--- + .../devicetree/bindings/display/rockchip/rockchip-vop.yaml | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml +index 42ee2b5c31e1..1695e3e4bcec 100644 +--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml ++++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml +@@ -75,9 +75,18 @@ properties: + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + ++ assigned-clocks: ++ maxItems: 2 ++ ++ assigned-clock-rates: ++ maxItems: 2 ++ + iommus: + maxItems: 1 + ++ power-domains: ++ maxItems: 1 ++ + required: + - compatible + - reg +@@ -94,6 +103,7 @@ examples: + - | + #include + #include ++ #include + vopb: vopb@ff930000 { + compatible = "rockchip,rk3288-vop"; + reg = <0x0 0xff930000 0x0 0x19c>, +@@ -103,6 +113,7 @@ examples: + <&cru DCLK_VOP0>, + <&cru HCLK_VOP0>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; ++ power-domains = <&power RK3288_PD_VIO>; + resets = <&cru SRST_LCDC1_AXI>, + <&cru SRST_LCDC1_AHB>, + <&cru SRST_LCDC1_DCLK>; + +From f272b063e0038cfea7c0ef695b5058e1cfef39df Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Wed, 12 Feb 2020 11:08:27 +0100 +Subject: [PATCH] ARM: rockchip: Replace by + + +The Rockchip platform code is not a clock provider, and just needs to +call of_clk_init(). + +Hence it can include instead of . + +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Stephen Boyd +Link: https://lore.kernel.org/r/20200212100830.446-5-geert+renesas@glider.be +Signed-off-by: Heiko Stuebner +(cherry picked from commit 37aed36cfec3b35469be3dc5fb52c8a459414cff) +--- + arch/arm/mach-rockchip/rockchip.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c +index f9797a2b5d0d..beea4564eed4 100644 +--- a/arch/arm/mach-rockchip/rockchip.c ++++ b/arch/arm/mach-rockchip/rockchip.c +@@ -9,9 +9,9 @@ + #include + #include + #include ++#include + #include + #include +-#include + #include + #include + #include + +From 2c6d20227da1c80097cd28c0bb7b6c1eb5b7d184 Mon Sep 17 00:00:00 2001 +From: Colin Ian King +Date: Thu, 23 Jan 2020 00:48:07 +0000 +Subject: [PATCH] ARM: rockchip: fix spelling mistake "to" -> "too" + +There is a spelling mistake in a pr_err message. Fix it. + +Signed-off-by: Colin Ian King +Link: https://lore.kernel.org/r/20200123004807.2833556-1-colin.king@canonical.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 0b973c65d2f2da049252bc8370e4cf037b99c7e9) +--- + arch/arm/mach-rockchip/platsmp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c +index 649e0a54784c..d60856898d97 100644 +--- a/arch/arm/mach-rockchip/platsmp.c ++++ b/arch/arm/mach-rockchip/platsmp.c +@@ -180,7 +180,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node) + + rsize = resource_size(&res); + if (rsize < trampoline_sz) { +- pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n", ++ pr_err("%s: reserved block with size 0x%x is too small for trampoline size 0x%x\n", + __func__, rsize, trampoline_sz); + return -EINVAL; + } + +From 4da52ea9970395cc4fd12e22cdde5cad0908a8b6 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 3 Apr 2020 15:36:30 +0200 +Subject: [PATCH] dt-bindings: display: convert rockchip rk3066 hdmi bindings + to yaml + +Current dts files with 'hdmi' nodes for rk3066 are manually verified. +In order to automate this process rockchip,rk3066-hdmi.txt +has to be converted to yaml. + +Signed-off-by: Johan Jonker +Reviewed-by: Rob Herring +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20200403133630.7377-1-jbx6244@gmail.com +(cherry picked from commit 8eea6e26fc2eda6922e5008ccb7f55bc1775d5b3) +--- + .../display/rockchip/rockchip,rk3066-hdmi.txt | 72 ----------- + .../display/rockchip/rockchip,rk3066-hdmi.yaml | 140 +++++++++++++++++++++ + 2 files changed, 140 insertions(+), 72 deletions(-) + delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt + create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml + +diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt +deleted file mode 100644 +index d1ad31bca8d9..000000000000 +--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt ++++ /dev/null +@@ -1,72 +0,0 @@ +-Rockchip specific extensions for rk3066 HDMI +-============================================ +- +-Required properties: +-- compatible: +- "rockchip,rk3066-hdmi"; +-- reg: +- Physical base address and length of the controller's registers. +-- clocks, clock-names: +- Phandle to HDMI controller clock, name should be "hclk". +-- interrupts: +- HDMI interrupt number. +-- power-domains: +- Phandle to the RK3066_PD_VIO power domain. +-- rockchip,grf: +- This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. +-- ports: +- Contains one port node with two endpoints, numbered 0 and 1, +- connected respectively to vop0 and vop1. +- Contains one port node with one endpoint +- connected to a hdmi-connector node. +-- pinctrl-0, pinctrl-name: +- Switch the iomux for the HPD/I2C pins to HDMI function. +- +-Example: +- hdmi: hdmi@10116000 { +- compatible = "rockchip,rk3066-hdmi"; +- reg = <0x10116000 0x2000>; +- interrupts = ; +- clocks = <&cru HCLK_HDMI>; +- clock-names = "hclk"; +- power-domains = <&power RK3066_PD_VIO>; +- rockchip,grf = <&grf>; +- pinctrl-names = "default"; +- pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; +- +- ports { +- #address-cells = <1>; +- #size-cells = <0>; +- hdmi_in: port@0 { +- reg = <0>; +- #address-cells = <1>; +- #size-cells = <0>; +- hdmi_in_vop0: endpoint@0 { +- reg = <0>; +- remote-endpoint = <&vop0_out_hdmi>; +- }; +- hdmi_in_vop1: endpoint@1 { +- reg = <1>; +- remote-endpoint = <&vop1_out_hdmi>; +- }; +- }; +- hdmi_out: port@1 { +- reg = <1>; +- hdmi_out_con: endpoint { +- remote-endpoint = <&hdmi_con_in>; +- }; +- }; +- }; +- }; +- +-&pinctrl { +- hdmi { +- hdmi_hpd: hdmi-hpd { +- rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; +- }; +- hdmii2c_xfer: hdmii2c-xfer { +- rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, +- <0 RK_PA2 1 &pcfg_pull_none>; +- }; +- }; +-}; +diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml +new file mode 100644 +index 000000000000..4110d003ce1f +--- /dev/null ++++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml +@@ -0,0 +1,140 @@ ++# SPDX-License-Identifier: GPL-2.0 ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Rockchip rk3066 HDMI controller ++ ++maintainers: ++ - Sandy Huang ++ - Heiko Stuebner ++ ++properties: ++ compatible: ++ const: rockchip,rk3066-hdmi ++ ++ reg: ++ maxItems: 1 ++ ++ interrupts: ++ maxItems: 1 ++ ++ clocks: ++ maxItems: 1 ++ ++ clock-names: ++ const: hclk ++ ++ pinctrl-0: ++ maxItems: 2 ++ ++ pinctrl-names: ++ const: default ++ description: ++ Switch the iomux for the HPD/I2C pins to HDMI function. ++ ++ power-domains: ++ maxItems: 1 ++ ++ rockchip,grf: ++ $ref: /schemas/types.yaml#/definitions/phandle ++ description: ++ This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. ++ ++ ports: ++ type: object ++ ++ properties: ++ "#address-cells": ++ const: 1 ++ ++ "#size-cells": ++ const: 0 ++ ++ port@0: ++ type: object ++ description: ++ Port node with two endpoints, numbered 0 and 1, ++ connected respectively to vop0 and vop1. ++ ++ port@1: ++ type: object ++ description: ++ Port node with one endpoint connected to a hdmi-connector node. ++ ++ required: ++ - "#address-cells" ++ - "#size-cells" ++ - port@0 ++ - port@1 ++ ++ additionalProperties: false ++ ++required: ++ - compatible ++ - reg ++ - interrupts ++ - clocks ++ - clock-names ++ - pinctrl-0 ++ - pinctrl-names ++ - power-domains ++ - rockchip,grf ++ - ports ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ #include ++ #include ++ #include ++ hdmi: hdmi@10116000 { ++ compatible = "rockchip,rk3066-hdmi"; ++ reg = <0x10116000 0x2000>; ++ interrupts = ; ++ clocks = <&cru HCLK_HDMI>; ++ clock-names = "hclk"; ++ pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; ++ pinctrl-names = "default"; ++ power-domains = <&power RK3066_PD_VIO>; ++ rockchip,grf = <&grf>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ hdmi_in: port@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ hdmi_in_vop0: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&vop0_out_hdmi>; ++ }; ++ hdmi_in_vop1: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&vop1_out_hdmi>; ++ }; ++ }; ++ hdmi_out: port@1 { ++ reg = <1>; ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++ }; ++ }; ++ }; ++ ++ pinctrl { ++ hdmi { ++ hdmi_hpd: hdmi-hpd { ++ rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; ++ }; ++ hdmii2c_xfer: hdmii2c-xfer { ++ rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, ++ <0 RK_PA2 1 &pcfg_pull_none>; ++ }; ++ }; ++ }; + +From 1d8b864057e02861a494d9c18a12328d8bea7239 Mon Sep 17 00:00:00 2001 +From: Tobias Schramm +Date: Thu, 16 Apr 2020 16:55:34 +0200 +Subject: [PATCH] arm64: dts: rockchip: add micro SD card regulator to + rockpro64 + +This patch adds the RockPro64's micro SD card regulator to the +RockPro64 dtsi. The regulator is present on all revisions of the +device. +Previously the regular was missing, resulting in unreliable boot +behaviour when booting from SD card. + +Signed-off-by: Tobias Schramm +Link: https://lore.kernel.org/r/20200416145534.1263575-1-t.schramm@manjaro.org +Signed-off-by: Heiko Stuebner +(cherry picked from commit 1f5a3e1679353fb53e955afd8801a7f4f60877ff) +--- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 27 ++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +index 9bca25801260..6788ab28f89a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +@@ -96,6 +96,24 @@ + vin-supply = <&vcc_1v8>; + }; + ++ /* micro SD card power */ ++ vcc3v0_sd: vcc3v0-sd { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_pwr_h>; ++ regulator-name = "vcc3v0_sd"; ++ regulator-always-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -603,6 +621,13 @@ + }; + }; + ++ sdcard { ++ sdmmc0_pwr_h: sdmmc0-pwr-h { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; +@@ -661,6 +686,8 @@ + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ vmmc-supply = <&vcc3v0_sd>; ++ vqmmc-supply = <&vcc_sdio>; + status = "okay"; + }; + + +From fdf2fafc9d59f980955fb1c26cd7358a5aaa27a0 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Wed, 15 Apr 2020 15:10:57 +0200 +Subject: [PATCH] arm64: dts: rockchip: remove bus-width from mmc nodes in + rk3308-roc-cc + +The 'bus-width' property for mmc nodes is defined both in +'rk3308.dtsi' and 'rk3308-roc-cc.dts'. +'bus-width' and pinctrl containing the bus-pins +should be in the same file, so remove all entries +from mmc nodes in 'rk3308-roc-cc.dts'. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200415131057.2366-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 051083dddf07a4472bc1720d5c2b1909e0865890) +--- + arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +index aa256350b18f..8011e9b12347 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +@@ -123,7 +123,6 @@ + }; + + &emmc { +- bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + mmc-hs200-1_8v; +@@ -171,7 +170,6 @@ + }; + + &sdmmc { +- bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <300>; + +From a98b1173f1af7cdf913383e7e0287475b9933a2d Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Tue, 14 Apr 2020 10:29:36 +0200 +Subject: [PATCH] arm64: dts: rockchip: add core devicetree for rk3326 + +The rk3326 is basically a px30 without the second display controller. +So add a dtsi based on that, that just removes the affected nodes. + +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20200414082938.2977572-1-heiko@sntech.de +Signed-off-by: Heiko Stuebner +(cherry picked from commit df07f7df7e5a61d06b21f89c4ab744fb4e4c2222) +--- + arch/arm64/boot/dts/rockchip/rk3326.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3326.dtsi + +diff --git a/arch/arm64/boot/dts/rockchip/rk3326.dtsi b/arch/arm64/boot/dts/rockchip/rk3326.dtsi +new file mode 100644 +index 000000000000..2ba6da125137 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3326.dtsi +@@ -0,0 +1,15 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd ++ */ ++ ++#include "px30.dtsi" ++ ++&display_subsystem { ++ ports = <&vopb_out>; ++}; ++ ++/delete-node/ &dsi_in_vopl; ++/delete-node/ &lvds_vopl_in; ++/delete-node/ &vopl; ++/delete-node/ &vopl_mmu; + +From 2b1d742b479da9dc96ccf21e92e474c99c930aa3 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Tue, 14 Apr 2020 10:29:37 +0200 +Subject: [PATCH] dt-bindings: Add binding for Hardkernel Odroid Go Advance + +Add a compatible for the Odroid Go Advance from Hardkernel. +The compatible used by the vendor already is odroid-go2, to distinguish +it from the previous (microcontroller-based) Odroid Go, so we're keeping +that, also to not cause unnecessary incompatibilites. + +Signed-off-by: Heiko Stuebner +Acked-by: Rob Herring +Link: https://lore.kernel.org/r/20200414082938.2977572-2-heiko@sntech.de +Signed-off-by: Heiko Stuebner +(cherry picked from commit 98412e1e57ea776b4581077a68fe6ed598bfba99) +--- + Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml +index 715586dea9bb..d4a4045092df 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.yaml ++++ b/Documentation/devicetree/bindings/arm/rockchip.yaml +@@ -358,6 +358,11 @@ properties: + - const: haoyu,marsboard-rk3066 + - const: rockchip,rk3066a + ++ - description: Hardkernel Odroid Go Advance ++ items: ++ - const: hardkernel,rk3326-odroid-go2 ++ - const: rockchip,rk3326 ++ + - description: Hugsun X99 TV Box + items: + - const: hugsun,x99 + +From 9ef671f45e7d27b711a82178e0fa11455428fd3c Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Tue, 14 Apr 2020 10:29:38 +0200 +Subject: [PATCH] arm64: dts: rockchip: add Odroid Advance Go + +The Odroid Advance Go is a handheld based on Rockchip's rk3326 soc +with a DSI display and some handheld controls including an analog +joystick connected to the saradc. + +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20200414082938.2977572-3-heiko@sntech.de +Signed-off-by: Heiko Stuebner +(cherry picked from commit ce33988fb69828dfcb5825f9086d9dc2b37a9282) +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 560 +++++++++++++++++++++ + 2 files changed, 561 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index ae7621309e92..b87b1f773083 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -2,6 +2,7 @@ + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +new file mode 100644 +index 000000000000..cf20aac5f2fe +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +@@ -0,0 +1,560 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 Hardkernel Co., Ltd ++ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include ++#include "rk3326.dtsi" ++ ++/ { ++ model = "ODROID-GO Advance"; ++ compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; ++ ++ chosen { ++ stdout-path = "serial2:115200n8"; ++ }; ++ ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ power-supply = <&vcc_bl>; ++ pwms = <&pwm1 0 25000 0>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&btn_pins>; ++ ++ /* ++ * *** ODROIDGO2-Advance Switch layout *** ++ * |------------------------------------------------| ++ * | sw15 sw16 | ++ * |------------------------------------------------| ++ * | sw1 |-------------------| sw8 | ++ * | sw3 sw4 | | sw7 sw5 | ++ * | sw2 | LCD Display | sw6 | ++ * | | | | ++ * | |-------------------| | ++ * | sw9 sw10 sw11 sw12 sw13 sw14 | ++ * |------------------------------------------------| ++ */ ++ ++ sw1 { ++ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; ++ label = "DPAD-UP"; ++ linux,code = ; ++ }; ++ sw2 { ++ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; ++ label = "DPAD-DOWN"; ++ linux,code = ; ++ }; ++ sw3 { ++ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; ++ label = "DPAD-LEFT"; ++ linux,code = ; ++ }; ++ sw4 { ++ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; ++ label = "DPAD-RIGHT"; ++ linux,code = ; ++ }; ++ sw5 { ++ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; ++ label = "BTN-A"; ++ linux,code = ; ++ }; ++ sw6 { ++ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "BTN-B"; ++ linux,code = ; ++ }; ++ sw7 { ++ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; ++ label = "BTN-Y"; ++ linux,code = ; ++ }; ++ sw8 { ++ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; ++ label = "BTN-X"; ++ linux,code = ; ++ }; ++ sw9 { ++ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; ++ label = "F1"; ++ linux,code = ; ++ }; ++ sw10 { ++ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; ++ label = "F2"; ++ linux,code = ; ++ }; ++ sw11 { ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ label = "F3"; ++ linux,code = ; ++ }; ++ sw12 { ++ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; ++ label = "F4"; ++ linux,code = ; ++ }; ++ sw13 { ++ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; ++ label = "F5"; ++ linux,code = ; ++ }; ++ sw14 { ++ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "F6"; ++ linux,code = ; ++ }; ++ sw15 { ++ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; ++ label = "TOP-LEFT"; ++ linux,code = ; ++ }; ++ sw16 { ++ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; ++ label = "TOP-RIGHT"; ++ linux,code = ; ++ }; ++ }; ++ ++ leds: gpio-leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "led_pins"; ++ pinctrl-0 = <&led_pins>; ++ ++ led-0 { ++ label = "blue:heartbeat"; ++ gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ vccsys: vccsys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v8_sys"; ++ regulator-always-on; ++ regulator-min-microvolt = <3800000>; ++ regulator-max-microvolt = <3800000>; ++ }; ++ ++ vcc_host: vcc_host { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_host"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ vin-supply = <&vccsys>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cru { ++ assigned-clocks = <&cru PLL_NPLL>, ++ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, ++ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, ++ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, ++ <&cru PLL_CPLL>; ++ ++ assigned-clock-rates = <1188000000>, ++ <200000000>, <200000000>, ++ <150000000>, <150000000>, ++ <100000000>, <200000000>, ++ <17000000>; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&dsi { ++ status = "okay"; ++ ++ ports { ++ mipi_out: port@1 { ++ reg = <1>; ++ ++ mipi_out_panel: endpoint { ++ remote-endpoint = <&mipi_in_panel>; ++ }; ++ }; ++ }; ++ ++ panel@0 { ++ compatible = "elida,kd35t133"; ++ reg = <0>; ++ backlight = <&backlight>; ++ iovcc-supply = <&vcc_lcd>; ++ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; ++ vdd-supply = <&vcc_lcd>; ++ ++ port { ++ mipi_in_panel: endpoint { ++ remote-endpoint = <&mipi_out_panel>; ++ }; ++ }; ++ }; ++}; ++ ++&dsi_dphy { ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-falling-time-ns = <16>; ++ i2c-scl-rising-time-ns = <280>; ++ status = "okay"; ++ ++ rk817: pmic@20 { ++ compatible = "rockchip,rk817"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "xin32k"; ++ ++ vcc1-supply = <&vccsys>; ++ vcc2-supply = <&vccsys>; ++ vcc3-supply = <&vccsys>; ++ vcc4-supply = <&vccsys>; ++ vcc5-supply = <&vccsys>; ++ vcc6-supply = <&vccsys>; ++ vcc7-supply = <&vccsys>; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <1150000>; ++ regulator-ramp-delay = <6001>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: DCDC_REG4 { ++ regulator-name = "vcc_3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_1v8: LDO_REG2 { ++ regulator-name = "vcc_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_1v0: LDO_REG3 { ++ regulator-name = "vdd_1v0"; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG4 { ++ regulator-name = "vcc3v3_pmu"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-name = "vccio_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG6 { ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_bl: LDO_REG7 { ++ regulator-name = "vcc_bl"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_lcd: LDO_REG8 { ++ regulator-name = "vcc_lcd"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <2800000>; ++ }; ++ }; ++ ++ vcc_cam: LDO_REG9 { ++ regulator-name = "vcc_cam"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ ++&i2c1 { ++ clock-frequency = <400000>; ++ status = "okay"; ++}; ++ ++/* I2S 1 Channel Used */ ++&i2s1_2ch { ++ status = "okay"; ++}; ++ ++&io_domains { ++ vccio1-supply = <&vcc_3v3>; ++ vccio2-supply = <&vccio_sd>; ++ vccio3-supply = <&vcc_3v3>; ++ vccio4-supply = <&vcc_3v3>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_3v3>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ card-detect-delay = <200>; ++ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ status = "okay"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++ u2phy_host: host-port { ++ status = "okay"; ++ }; ++ ++ u2phy_otg: otg-port { ++ status = "disabled"; ++ }; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++}; ++ ++/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_xfer &uart1_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2m1_xfer>; ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&pinctrl { ++ btns { ++ btn_pins: btn-pins { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, ++ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, ++ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ led_pins: led-pins { ++ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ dc_det: dc-det { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pmic_int: pmic-int { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++ <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++}; + +From 77b50f8cb30ce28b97f98134d6d60ed1021b398a Mon Sep 17 00:00:00 2001 +From: Enric Balletbo i Serra +Date: Sun, 26 Apr 2020 18:16:53 +0200 +Subject: [PATCH] drm/rockchip: cdn-dp-core: Make cdn_dp_core_suspend/resume + static +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This fixes the following warning detected when running make with W=1 + + drivers/gpu/drm/rockchip//cdn-dp-core.c:1112:5: warning: no previous + prototype for ‘cdn_dp_suspend’ [-Wmissing-prototypes] + + drivers/gpu/drm/rockchip//cdn-dp-core.c:1126:5: warning: no previous + prototype for ‘cdn_dp_resume’ [-Wmissing-prototypes] + +Signed-off-by: Enric Balletbo i Serra +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20200426161653.7710-1-enric.balletbo@collabora.com +(cherry picked from commit 7c49abb4c2f8853520abc05b7f7e8b751fbb3086) +--- + drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c +index 06f85138b51b..c634b95b50f7 100644 +--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c ++++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c +@@ -1106,7 +1106,7 @@ static const struct component_ops cdn_dp_component_ops = { + .unbind = cdn_dp_unbind, + }; + +-int cdn_dp_suspend(struct device *dev) ++static int cdn_dp_suspend(struct device *dev) + { + struct cdn_dp_device *dp = dev_get_drvdata(dev); + int ret = 0; +@@ -1120,7 +1120,7 @@ int cdn_dp_suspend(struct device *dev) + return ret; + } + +-int cdn_dp_resume(struct device *dev) ++static int cdn_dp_resume(struct device *dev) + { + struct cdn_dp_device *dp = dev_get_drvdata(dev); + + +From 6a83f833666332ecafaf69e5b74fece84b91acd2 Mon Sep 17 00:00:00 2001 +From: Zheng Bin +Date: Fri, 24 Apr 2020 15:44:10 +0800 +Subject: [PATCH] drm/rockchip: Remove unneeded semicolon + +Fixes coccicheck warning: + +drivers/gpu/drm/rockchip/cdn-dp-reg.c:604:2-3: Unneeded semicolon +drivers/gpu/drm/rockchip/cdn-dp-reg.c:622:2-3: Unneeded semicolon +drivers/gpu/drm/rockchip/cdn-dp-reg.c:703:2-3: Unneeded semicolon + +Reported-by: Hulk Robot +Signed-off-by: Zheng Bin +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20200424074410.1070-1-zhengbin13@huawei.com +(cherry picked from commit 611e22b1d9f61a8742c99433de9ff40795574c61) +--- + drivers/gpu/drm/rockchip/cdn-dp-reg.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c +index 7361c07cb4a7..9d2163ef4d6e 100644 +--- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c ++++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c +@@ -601,7 +601,7 @@ static int cdn_dp_get_msa_misc(struct video_info *video, + case YCBCR_4_2_0: + val[0] = 5; + break; +- }; ++ } + + switch (video->color_depth) { + case 6: +@@ -619,7 +619,7 @@ static int cdn_dp_get_msa_misc(struct video_info *video, + case 16: + val[1] = 4; + break; +- }; ++ } + + msa_misc = 2 * val[0] + 32 * val[1] + + ((video->color_fmt == Y_ONLY) ? (1 << 14) : 0); +@@ -700,7 +700,7 @@ int cdn_dp_config_video(struct cdn_dp_device *dp) + case 16: + val = BCS_16; + break; +- }; ++ } + + val += video->color_fmt << 8; + ret = cdn_dp_reg_write(dp, DP_FRAMER_PXL_REPR, val); + +From 097d9346541d9f2e4639e65a70d8a68fd8be1986 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 24 Apr 2020 17:55:59 +0200 +Subject: [PATCH] arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node + of rk3399-pinebook-pro.dts + +The '#sound-dai-cells' property is already defined in rk3399.dtsi +at the 'i2s1' node, so remove it from the '&i2s1' node in +'rk3399-pinebook-pro.dts'. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200424155600.24254-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit e565dd298c6bc9f53f0b07d96b019e000777c1fe) +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index c49982dfd8fc..d44c73521218 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -744,7 +744,6 @@ + }; + + &i2s1 { +- #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; + rockchip,capture-channels = <8>; + +From 41878dbb1271eb73d952575f29f7095e08750196 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 24 Apr 2020 17:56:00 +0200 +Subject: [PATCH] arm64: dts: rockchip: remove #sound-dai-cells from &spdif + node of rk3399-hugsun-x99.dts + +The '#sound-dai-cells' property is already defined in rk3399.dtsi +at the 'spdif' node, so remove it from the '&spdif' node in +'rk3399-hugsun-x99.dts'. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200424155600.24254-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit de70083cbaabb86c282f421b070b041236ba6f4b) +--- + arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +index aee484a05181..4b4a38e59283 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +@@ -633,7 +633,6 @@ + &spdif { + status = "okay"; + pinctrl-0 = <&spdif_bus_1>; +- #sound-dai-cells = <0>; + }; + + &spi1 { + +From 1af0d8e117e762c29ffb9a0d02b6e77aeff3165c Mon Sep 17 00:00:00 2001 +From: Boris Brezillon +Date: Fri, 3 Apr 2020 19:13:45 -0300 +Subject: [PATCH] arm64: dts: rockchip: Define the rockchip Video Decoder node + on rk3399 + +RK3399 has a Video decoder, define the node in the dtsi. We also add +the missing power-domain in mmu node and enable the block. + +Signed-off-by: Boris Brezillon +Signed-off-by: Ezequiel Garcia +Link: https://lore.kernel.org/r/20200403221345.16702-6-ezequiel@collabora.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit cbd7214402ecf7ecc59e21862ea3c901be48e831) +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 1448f358ed0a..de53f145c4fa 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -1269,6 +1269,18 @@ + power-domains = <&power RK3399_PD_VCODEC>; + }; + ++ vdec: video-codec@ff660000 { ++ compatible = "rockchip,rk3399-vdec"; ++ reg = <0x0 0xff660000 0x0 0x400>; ++ interrupts = ; ++ interrupt-names = "vdpu"; ++ clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, ++ <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; ++ clock-names = "axi", "ahb", "cabac", "core"; ++ iommus = <&vdec_mmu>; ++ power-domains = <&power RK3399_PD_VDU>; ++ }; ++ + vdec_mmu: iommu@ff660480 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; +@@ -1276,8 +1288,8 @@ + interrupt-names = "vdec_mmu"; + clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; + clock-names = "aclk", "iface"; ++ power-domains = <&power RK3399_PD_VDU>; + #iommu-cells = <0>; +- status = "disabled"; + }; + + iep_mmu: iommu@ff670800 { + +From e51cf454395eb45f7277fc33bbc6d07268281bca Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 25 Apr 2020 17:40:37 +0200 +Subject: [PATCH] dt-bindings: gpu: add power-domains #cooling-cells to + arm,mali-bifrost.yaml + +A test with the command below gives this error: + +arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: gpu@ff400000: +'#cooling-cells', 'power-domains' +do not match any of the regexes: 'pinctrl-[0-9]+' + +With the conversion to yaml it also filters things +in a node that are used by other drivers like +'#cooling-cells' and 'power-domains' +for Rockchip px30 gpu nodes, +so add them to 'arm,mali-bifrost.yaml'. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/ +arm,mali-bifrost.yaml + +Signed-off-by: Johan Jonker +Signed-off-by: Rob Herring +(cherry picked from commit 2c905f6c3334691a3d96d7dcdffdff0e0a9dadb5) +--- + Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +index 0b229a7d4a98..b1844b9c295d 100644 +--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml ++++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +@@ -43,9 +43,15 @@ properties: + + operating-points-v2: true + ++ power-domains: ++ maxItems: 1 ++ + resets: + maxItems: 2 + ++ "#cooling-cells": ++ const: 2 ++ + required: + - compatible + - reg + +From de74efa1defc4106cda6f31e011cb856a1074b59 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Tue, 12 May 2020 22:35:22 +0200 +Subject: [PATCH] arm64: dts: rockchip: replace RK_FUNC defines in + rk3326-odroid-go2 + +The defines RK_FUNC_1 and RK_FUNC_2 are deprecated, +so replace them with the preferred form. +Restyle properties in the same line. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200512203524.7317-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 213f272b754f4e27aeab9d1265c775610e612bb7) +--- + arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +index cf20aac5f2fe..bd54a37738be 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +@@ -543,18 +543,15 @@ + }; + + soc_slppin_gpio: soc_slppin_gpio { +- rockchip,pins = +- <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; + }; + + soc_slppin_rst: soc_slppin_rst { +- rockchip,pins = +- <0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>; ++ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; + }; + + soc_slppin_slp: soc_slppin_slp { +- rockchip,pins = +- <0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>; ++ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; + }; + }; + }; + +From 0b86f8e0f92794c9db7314819600507d458ef25e Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 21 Mar 2020 22:54:18 +0100 +Subject: [PATCH] arm64: dts: rockchip: fix phy nodename for rk3328 + +A test with the command below gives for example this error: + +arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: phy@0: +'#phy-cells' is a required property + +The phy nodename is normally used by a phy-handle. +This node is however compatible with +"ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22" +which is just been added to 'ethernet-phy.yaml'. +So change nodename to 'ethernet-phy' for which '#phy-cells' +is not a required property + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ +phy/phy-provider.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200321215423.12176-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 8370cc5533b3baa5e0f18075ae638b050458aabd) +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index a4d591d91533..d399883d4b75 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -934,7 +934,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- phy: phy@0 { ++ phy: ethernet-phy@0 { + compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; + reg = <0>; + clocks = <&cru SCLK_MAC2PHY_OUT>; + +From bd64674b64f3f4c70f7cef0855f8c66e1a2acdb3 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 21 Mar 2020 22:54:19 +0100 +Subject: [PATCH] arm64: dts: rockchip: fix rtl8211f nodename for rk3328 + Beelink A1 + +A test with the command below gives this error: + +arch/arm64/boot/dts/rockchip/rk3328-a1.dt.yaml: phy@0: +'#phy-cells' is a required property + +The rtl8211f node is used by a phy-handle. +The parent node is compatible with "snps,dwmac-mdio", +so change nodename to 'ethernet-phy', for which '#phy-cells' +is not a required property. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ +phy/phy-provider.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200321215423.12176-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 63834d1edb96e2016191e53444934299bbc06bb1) +--- + arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts +index 797e90a3ac92..37f307cfa4cc 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts +@@ -115,7 +115,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- rtl8211f: phy@0 { ++ rtl8211f: ethernet-phy@0 { + reg = <0>; + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + +From ba183cce2ebccac052414ee447ef615bb2ff1dc5 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 21 Mar 2020 22:54:20 +0100 +Subject: [PATCH] arm64: dts: rockchip: fix rtl8211e nodename for + rk3399-nanopi4 + +A test with the command below gives these errors: + +arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dt.yaml: phy@1: +'#phy-cells' is a required property +arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dt.yaml: phy@1: +'#phy-cells' is a required property +arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dt.yaml: phy@1: +'#phy-cells' is a required property + +The rtl8211e node is used by a phy-handle. +The parent node is compatible with "snps,dwmac-mdio", +so change nodename to 'ethernet-phy', for which '#phy-cells' +is not a required property. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ +phy/phy-provider.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200321215423.12176-3-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit b450d1c566bd726f93bc72a3cf3155cecebc1b75) +--- + arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +index c88018a0ef35..20529105c63c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +@@ -182,7 +182,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- rtl8211e: phy@1 { ++ rtl8211e: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&gpio3>; + interrupts = ; + +From e655529bad8cb4dea6495eb500a8db94cf907a89 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 21 Mar 2020 22:54:21 +0100 +Subject: [PATCH] arm64: dts: rockchip: fix &pinctrl phy sub nodename for + rk3399-nanopi4 + +A test with the command below gives for example this error: + +arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dt.yaml: phy: +'#phy-cells' is a required property +arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dt.yaml: phy: +'#phy-cells' is a required property +arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dt.yaml: phy: +'#phy-cells' is a required property + +'phy' is a reserved nodename and should not be used for pinctrl, +so change it to 'gmac'. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ +phy/phy-provider.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200321215423.12176-4-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 737157f9618b40c7147cf697aec431ce9dd178a0) +--- + arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +index 20529105c63c..1d246c2caa3c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +@@ -525,7 +525,7 @@ + }; + }; + +- phy { ++ gmac { + phy_intb: phy-intb { + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +From daa7af1392aa91d53ca050e6f92561af8d375643 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 21 Mar 2020 22:54:22 +0100 +Subject: [PATCH] arm64: dts: rockchip: fix rtl8211e nodename for + rk3399-orangepi + +A test with the command below gives this error: + +arch/arm64/boot/dts/rockchip/rk3399-orangepi.dt.yaml: phy@1: +'#phy-cells' is a required property + +The phy nodename is used by a phy-handle. +The parent node is compatible with "snps,dwmac-mdio", +so change nodename to 'ethernet-phy', for which '#phy-cells' +is not a required property + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ +phy/phy-provider.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200321215423.12176-5-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit b2bb769100d49c6acbfb2756cc4748aac09209c9) +--- + arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +index f9f7246d4d2f..afbcd213cccf 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +@@ -214,7 +214,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- rtl8211e: phy@1 { ++ rtl8211e: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&gpio3>; + interrupts = ; + +From f5eac7148efd93ba264852dfd3378881d9afa6bf Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Sat, 21 Mar 2020 22:54:23 +0100 +Subject: [PATCH] arm64: dts: rockchip: fix &pinctrl phy sub nodename for + rk3399-orangepi + +A test with the command below this error: + +arch/arm64/boot/dts/rockchip/rk3399-orangepi.dt.yaml: phy: +'#phy-cells' is a required property + +'phy' is a reserved nodename and should not be used for pinctrl, +so change it to 'gmac'. + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ +phy/phy-provider.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200321215423.12176-6-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 302a729c84b59c835f7857ec378efecbda58b9b3) +--- + arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +index afbcd213cccf..6163ae8063a7 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +@@ -554,7 +554,7 @@ + }; + }; + +- phy { ++ gmac { + phy_intb: phy-intb { + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + +From 623a0252df25c7cc22203c84c7606cdcff1ccfc2 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Tue, 28 Apr 2020 22:30:02 +0200 +Subject: [PATCH] arm64: dts: rockchip: fix defines in pd_vio node for rk3399 + +A test with the command below gives for example this error: + +arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pd_vio@15: +'pd_tcpc0@RK3399_PD_TCPC0', 'pd_tcpc1@RK3399_PD_TCPC1' +do not match any of the regexes: +'.*-names$', '.*-supply$', '^#.*-cells$', +'^#[a-zA-Z0-9,+\\-._]{0,63}$', +'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}$', +'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+(,[0-9a-fA-F]+)*$', +'^__.*__$', 'pinctrl-[0-9]+' + +Fix error by replacing the wrong defines by the ones +mentioned in 'rk3399-power.h'. + +make -k ARCH=arm64 dtbs_check + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200428203003.3318-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 84836ded76ec9a6f25d1d0acebaad44977e0ec6f) +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index de53f145c4fa..e6442d249abf 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -1088,12 +1088,12 @@ + pm_qos = <&qos_isp1_m0>, + <&qos_isp1_m1>; + }; +- pd_tcpc0@RK3399_PD_TCPC0 { ++ pd_tcpc0@RK3399_PD_TCPD0 { + reg = ; + clocks = <&cru SCLK_UPHY0_TCPDCORE>, + <&cru SCLK_UPHY0_TCPDPHY_REF>; + }; +- pd_tcpc1@RK3399_PD_TCPC1 { ++ pd_tcpc1@RK3399_PD_TCPD1 { + reg = ; + clocks = <&cru SCLK_UPHY1_TCPDCORE>, + <&cru SCLK_UPHY1_TCPDPHY_REF>; + +From 027988b4a390644acef9f4b9df0b0e30cc673309 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Tue, 28 Apr 2020 16:49:33 +0200 +Subject: [PATCH] arm64: dts: rockchip: rename and label gpio-led subnodes + +Current dts files with 'gpio-led' nodes were manually verified. +In order to automate this process leds-gpio.txt +has been converted to yaml. With this conversion a check +for pattern properties was added. A test with the command +below gives a screen full of warnings like: + +arch/arm64/boot/dts/rockchip/rk3368-r88.dt.yaml: gpio-leds: +'work' does not match any of the regexes: +'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' + +Fix these errors with help of the following rules: + +1: Add nodename in the preferred form. + +2: Always add a label that ends with '_led' to prevent conflicts + with other labels such as 'power' and 'mmc' + +3: If leds need pinctrl add a label that ends with '_led_pin' + also to prevent conflicts with other labels. + +patternProperties: + # The first form is preferred, but fall back to just 'led' + # anywhere in the node name to at least catch some child nodes. + "(^led-[0-9a-f]$|led)": + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/leds/ +leds-gpio.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200428144933.10953-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit e916d85b922fed7be861f63e388214bba6f20719) +--- + arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 4 +-- + arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 6 ++--- + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 4 +-- + arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 +-- + arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 4 +-- + .../boot/dts/rockchip/rk3368-orion-r68-meta.dts | 4 +-- + arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 2 +- + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 29 +++++++++++----------- + arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 10 ++++---- + arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 ++--- + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 10 ++++---- + arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 29 +++++++++++----------- + 12 files changed, 57 insertions(+), 55 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +index 8011e9b12347..ccb27023ccce 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +@@ -28,14 +28,14 @@ + leds { + compatible = "gpio-leds"; + +- power { ++ power_led: led-0 { + label = "firefly:red:power"; + linux,default-trigger = "ir-power-click"; + default-state = "on"; + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + +- user { ++ user_led: led-1 { + label = "firefly:blue:user"; + linux,default-trigger = "ir-user-click"; + default-state = "off"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +index bd54a37738be..46826b6e237f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +@@ -128,9 +128,9 @@ + leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "led_pins"; +- pinctrl-0 = <&led_pins>; ++ pinctrl-0 = <&blue_led_pin>; + +- led-0 { ++ blue_led: led-0 { + label = "blue:heartbeat"; + gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; +@@ -528,7 +528,7 @@ + }; + + leds { +- led_pins: led-pins { ++ blue_led_pin: blue-led-pin { + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +index 8d553c92182a..34db48c274e5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +@@ -86,7 +86,7 @@ + leds { + compatible = "gpio-leds"; + +- power { ++ power_led: led-0 { + label = "firefly:blue:power"; + linux,default-trigger = "heartbeat"; + gpios = <&rk805 1 GPIO_ACTIVE_LOW>; +@@ -94,7 +94,7 @@ + mode = <0x23>; + }; + +- user { ++ user_led: led-1 { + label = "firefly:yellow:user"; + linux,default-trigger = "mmc1"; + gpios = <&rk805 0 GPIO_ACTIVE_LOW>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +index ebf3eb222e1f..6e09c223ed57 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +@@ -73,12 +73,12 @@ + leds { + compatible = "gpio-leds"; + +- power { ++ power_led: led-0 { + gpios = <&rk805 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc0"; + }; + +- standby { ++ standby_led: led-1 { + gpios = <&rk805 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts +index 1d0778ff217c..46357d1d77cd 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts +@@ -50,13 +50,13 @@ + leds: gpio-leds { + compatible = "gpio-leds"; + +- blue { ++ blue_led: led-0 { + gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; + label = "geekbox:blue:led"; + default-state = "on"; + }; + +- red { ++ red_led: led-1 { + gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; + label = "geekbox:red:led"; + default-state = "off"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts +index 6cc310255da8..b058ce999e3b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts +@@ -50,7 +50,7 @@ + leds: gpio-leds { + compatible = "gpio-leds"; + +- red { ++ red_led: led-0 { + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; + label = "orion:red:led"; + pinctrl-names = "default"; +@@ -58,7 +58,7 @@ + default-state = "on"; + }; + +- blue { ++ blue_led: led-1 { + gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; + label = "orion:blue:led"; + pinctrl-names = "default"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts +index 006a1fb6a816..236ab0f1b206 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts +@@ -43,7 +43,7 @@ + leds: gpio-leds { + compatible = "gpio-leds"; + +- work { ++ work_led: led-0 { + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; + label = "r88:green:led"; + pinctrl-names = "default"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +index ebe2ee77ba1f..1ce85a5816e4 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +@@ -27,42 +27,43 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, +- <&user_led4>, <&wlan_led>, <&bt_led>; ++ pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, ++ <&user_led3_pin>, <&user_led4_pin>, ++ <&wlan_led_pin>, <&bt_led_pin>; + +- user_led1 { ++ user_led1: led-1 { + label = "red:user1"; + gpios = <&gpio4 25 0>; + linux,default-trigger = "heartbeat"; + }; + +- user_led2 { ++ user_led2: led-2 { + label = "red:user2"; + gpios = <&gpio4 26 0>; + linux,default-trigger = "mmc0"; + }; + +- user_led3 { ++ user_led3: led-3 { + label = "red:user3"; + gpios = <&gpio4 30 0>; + linux,default-trigger = "mmc1"; + }; + +- user_led4 { ++ user_led4: led-4 { + label = "red:user4"; + gpios = <&gpio1 0 0>; + panic-indicator; + linux,default-trigger = "none"; + }; + +- wlan_active_led { ++ wlan_active_led: led-5 { + label = "red:wlan"; + gpios = <&gpio1 1 0>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + +- bt_active_led { ++ bt_active_led: led-6 { + label = "red:bt"; + gpios = <&gpio1 4 0>; + linux,default-trigger = "hci0-power"; +@@ -114,32 +115,32 @@ + }; + + leds { +- user_led1: user_led1 { ++ user_led1_pin: user-led1-pin { + rockchip,pins = + <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led2: user_led2 { ++ user_led2_pin: user-led2-pin { + rockchip,pins = + <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led3: user_led3 { ++ user_led3_pin: user-led3-pin { + rockchip,pins = + <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led4: user_led4 { ++ user_led4_pin: user-led4-pin { + rockchip,pins = + <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- wlan_led: wlan_led { ++ wlan_led_pin: wlan-led-pin { + rockchip,pins = + <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- bt_led: bt_led { ++ bt_led_pin: bt-led-pin { + rockchip,pins = + <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +index d63faf38cc81..20b5599f5e78 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +@@ -91,15 +91,15 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; ++ pinctrl-0 = <&work_led_pin>, <&diy_led_pin>; + +- work-led { ++ work_led: led-0 { + label = "work"; + default-state = "on"; + gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + }; + +- diy-led { ++ diy_led: led-1 { + label = "diy"; + default-state = "off"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; +@@ -629,11 +629,11 @@ + }; + + leds { +- work_led_gpio: work_led-gpio { ++ work_led_pin: work-led-pin { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- diy_led_gpio: diy_led-gpio { ++ diy_led_pin: diy-led-pin { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +index 4b4a38e59283..bf87fa32d3b1 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +@@ -39,9 +39,9 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&power_led_gpio>; ++ pinctrl-0 = <&power_led_pin>; + +- led-0 { ++ power_led: led-0 { + label = "blue:power"; + gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + default-state = "on"; +@@ -510,7 +510,7 @@ + }; + + leds { +- power_led_gpio: power-led-gpio { ++ power_led_pin: power-led-pin { + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index d44c73521218..cb0245d2226d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -90,9 +90,9 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&pwrled_gpio &slpled_gpio>; ++ pinctrl-0 = <&pwr_led_pin &slp_led_pin>; + +- green-led { ++ green_led: led-0 { + color = ; + default-state = "on"; + function = LED_FUNCTION_POWER; +@@ -100,7 +100,7 @@ + label = "green:power"; + }; + +- red-led { ++ red_led: led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STANDBY; +@@ -825,11 +825,11 @@ + }; + + leds { +- pwrled_gpio: pwrled_gpio { ++ pwr_led_pin: pwr-led-pin { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- slpled_gpio: slpled_gpio { ++ slp_led_pin: slp-led-pin { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +index 437a75f31ad4..c88295782e7b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +@@ -17,42 +17,43 @@ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&user_led1>, <&user_led2>, <&user_led3>, +- <&user_led4>, <&wlan_led>, <&bt_led>; ++ pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, ++ <&user_led3_pin>, <&user_led4_pin>, ++ <&wlan_led_pin>, <&bt_led_pin>; + +- user_led1 { ++ user_led1: led-1 { + label = "green:user1"; + gpios = <&gpio4 RK_PC2 0>; + linux,default-trigger = "heartbeat"; + }; + +- user_led2 { ++ user_led2: led-2 { + label = "green:user2"; + gpios = <&gpio4 RK_PC6 0>; + linux,default-trigger = "mmc0"; + }; + +- user_led3 { ++ user_led3: led-3 { + label = "green:user3"; + gpios = <&gpio4 RK_PD0 0>; + linux,default-trigger = "mmc1"; + }; + +- user_led4 { ++ user_led4: led-4 { + label = "green:user4"; + gpios = <&gpio4 RK_PD4 0>; + panic-indicator; + linux,default-trigger = "none"; + }; + +- wlan_active_led { ++ wlan_active_led: led-5 { + label = "yellow:wlan"; + gpios = <&gpio4 RK_PD5 0>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + +- bt_active_led { ++ bt_active_led: led-6 { + label = "blue:bt"; + gpios = <&gpio4 RK_PD6 0>; + linux,default-trigger = "hci0-power"; +@@ -68,32 +69,32 @@ + + &pinctrl { + leds { +- user_led1: user_led1 { ++ user_led1_pin: user-led1-pin { + rockchip,pins = + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led2: user_led2 { ++ user_led2_pin: user-led2-pin { + rockchip,pins = + <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led3: user_led3 { ++ user_led3_pin: user-led3-pin { + rockchip,pins = + <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- user_led4: user_led4 { ++ user_led4_pin: user-led4-pin { + rockchip,pins = + <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- wlan_led: wlan_led { ++ wlan_led_pin: wlan-led-pin { + rockchip,pins = + <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- bt_led: bt_led { ++ bt_led_pin: bt-led-pin { + rockchip,pins = + <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +From 8b38d3ef602806f1b15176f8ee9829d2660d6941 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Thu, 19 Dec 2019 13:19:54 +0100 +Subject: [PATCH] arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc + emmc node + +The mmc-controller.yaml didn't explicitly say disable-wp is +for SD card slot only, but that is what it was designed for +in the first place. +Remove all disable-wp from emmc or sdio controllers. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20191219121954.2450-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 1fab4cf51e48e9525cf70a9604e90dd3dd666a2f) +--- + arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +index ccb27023ccce..7a96be10eaf0 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +@@ -124,7 +124,6 @@ + + &emmc { + cap-mmc-highspeed; +- disable-wp; + mmc-hs200-1_8v; + non-removable; + status = "okay"; + +From 6c32c9a746c3fe1a7232e38b163a4976e22d67f2 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Tue, 28 Apr 2020 16:49:32 +0200 +Subject: [PATCH] ARM: dts: rockchip: rename and label gpio-led subnodes + +Current dts files with 'gpio-led' nodes were manually verified. +In order to automate this process leds-gpio.txt +has been converted to yaml. With this conversion a check +for pattern properties was added. A test with the command +below gives a screen full of warnings like: + +arch/arm/boot/dts/rk3188-radxarock.dt.yaml: gpio-leds: +'blue', 'green', 'sleep' +do not match any of the regexes: +'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' + +Fix these errors with help of the following rules: + +1: Add nodename in the preferred form. + +2: Always add a label that ends with '_led' to prevent conflicts + with other labels such as 'power' and 'mmc' + +3: If leds need pinctrl add a label that ends with '_led_pin' + also to prevent conflicts with other labels. + +patternProperties: + # The first form is preferred, but fall back to just 'led' + # anywhere in the node name to at least catch some child nodes. + "(^led-[0-9a-f]$|led)": + +make ARCH=arm dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/leds/ +leds-gpio.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200428144933.10953-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit f0344b33546cee3ea887d41e07900226dec6a23a) +--- + arch/arm/boot/dts/rk3036-kylin.dts | 2 +- + arch/arm/boot/dts/rk3066a-mk808.dts | 2 +- + arch/arm/boot/dts/rk3188-radxarock.dts | 6 +++--- + arch/arm/boot/dts/rk3229-xms6.dts | 2 +- + arch/arm/boot/dts/rk3288-firefly-reload.dts | 12 ++++++------ + arch/arm/boot/dts/rk3288-firefly.dtsi | 12 ++++++------ + arch/arm/boot/dts/rk3288-miqi.dts | 2 +- + arch/arm/boot/dts/rk3288-phycore-som.dtsi | 6 +++--- + arch/arm/boot/dts/rk3288-rock2-square.dts | 4 ++-- + arch/arm/boot/dts/rk3288-tinker.dtsi | 6 +++--- + 10 files changed, 27 insertions(+), 27 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts +index 2ff9f152d29b..7154b827ea2f 100644 +--- a/arch/arm/boot/dts/rk3036-kylin.dts ++++ b/arch/arm/boot/dts/rk3036-kylin.dts +@@ -16,7 +16,7 @@ + leds: gpio-leds { + compatible = "gpio-leds"; + +- work { ++ work_led: led-0 { + gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + label = "kylin:red:led"; + pinctrl-names = "default"; +diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts +index 365eff621113..eed9e60cffa2 100644 +--- a/arch/arm/boot/dts/rk3066a-mk808.dts ++++ b/arch/arm/boot/dts/rk3066a-mk808.dts +@@ -22,7 +22,7 @@ + gpio-leds { + compatible = "gpio-leds"; + +- blue { ++ blue_led: led-0 { + label = "mk808:blue:power"; + gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; + default-state = "off"; +diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts +index c9a7f5409960..b0fef82c0a71 100644 +--- a/arch/arm/boot/dts/rk3188-radxarock.dts ++++ b/arch/arm/boot/dts/rk3188-radxarock.dts +@@ -33,19 +33,19 @@ + gpio-leds { + compatible = "gpio-leds"; + +- green { ++ green_led: led-0 { + label = "rock:green:user1"; + gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + +- blue { ++ blue_led: led-1 { + label = "rock:blue:user2"; + gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + +- sleep { ++ sleep_led: led-2 { + label = "rock:red:power"; + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + default-state = "off"; +diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts +index 933ef69da32a..637245324a5e 100644 +--- a/arch/arm/boot/dts/rk3229-xms6.dts ++++ b/arch/arm/boot/dts/rk3229-xms6.dts +@@ -33,7 +33,7 @@ + power-led { + compatible = "gpio-leds"; + +- blue { ++ blue_led: led-0 { + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; +diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts +index 8c38bda21a7c..9a4a9749c405 100644 +--- a/arch/arm/boot/dts/rk3288-firefly-reload.dts ++++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts +@@ -45,20 +45,20 @@ + leds { + compatible = "gpio-leds"; + +- power { ++ power_led: led-0 { + gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>; + label = "firefly:blue:power"; + pinctrl-names = "default"; +- pinctrl-0 = <&power_led>; ++ pinctrl-0 = <&power_led_pin>; + panic-indicator; + }; + +- work { ++ work_led: led-1 { + gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>; + label = "firefly:blue:user"; + linux,default-trigger = "rc-feedback"; + pinctrl-names = "default"; +- pinctrl-0 = <&work_led>; ++ pinctrl-0 = <&work_led_pin>; + }; + }; + +@@ -334,11 +334,11 @@ + }; + + leds { +- power_led: power-led { ++ power_led_pin: power-led-pin { + rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- work_led: work-led { ++ work_led_pin: work-led-pin { + rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi +index 5e0a19004e46..e5c4fd4ea67e 100644 +--- a/arch/arm/boot/dts/rk3288-firefly.dtsi ++++ b/arch/arm/boot/dts/rk3288-firefly.dtsi +@@ -62,20 +62,20 @@ + leds { + compatible = "gpio-leds"; + +- work { ++ work_led: led-0 { + gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>; + label = "firefly:blue:user"; + linux,default-trigger = "rc-feedback"; + pinctrl-names = "default"; +- pinctrl-0 = <&work_led>; ++ pinctrl-0 = <&work_led_pin>; + }; + +- power { ++ power_led: led-1 { + gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>; + label = "firefly:green:power"; + linux,default-trigger = "default-on"; + pinctrl-names = "default"; +- pinctrl-0 = <&power_led>; ++ pinctrl-0 = <&power_led_pin>; + }; + }; + +@@ -429,11 +429,11 @@ + }; + + leds { +- power_led: power-led { ++ power_led_pin: power-led-pin { + rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- work_led: work-led { ++ work_led_pin: work-led-pin { + rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts +index c41d012c8850..213c9eb84f76 100644 +--- a/arch/arm/boot/dts/rk3288-miqi.dts ++++ b/arch/arm/boot/dts/rk3288-miqi.dts +@@ -30,7 +30,7 @@ + leds { + compatible = "gpio-leds"; + +- work { ++ work_led: led-0 { + gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; + label = "miqi:green:user"; + linux,default-trigger = "timer"; +diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi +index 77a47b9b756d..e43887c9635f 100644 +--- a/arch/arm/boot/dts/rk3288-phycore-som.dtsi ++++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi +@@ -36,9 +36,9 @@ + leds: user-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +- pinctrl-0 = <&user_led>; ++ pinctrl-0 = <&user_led_pin>; + +- user { ++ user_led: led-0 { + label = "green_led"; + gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; +@@ -372,7 +372,7 @@ + }; + + leds { +- user_led: user-led { ++ user_led_pin: user-led-pin { + rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; +diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts +index cdcdc921ee09..3cca4d0f9b09 100644 +--- a/arch/arm/boot/dts/rk3288-rock2-square.dts ++++ b/arch/arm/boot/dts/rk3288-rock2-square.dts +@@ -41,13 +41,13 @@ + gpio-leds { + compatible = "gpio-leds"; + +- heartbeat { ++ heartbeat_led: led-0 { + gpios = <&gpio7 RK_PB7 GPIO_ACTIVE_LOW>; + label = "rock2:green:state1"; + linux,default-trigger = "heartbeat"; + }; + +- mmc { ++ mmc_led: led-1 { + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; + label = "rock2:blue:state2"; + linux,default-trigger = "mmc0"; +diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi +index acfaa12ec239..90e9be443fe6 100644 +--- a/arch/arm/boot/dts/rk3288-tinker.dtsi ++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi +@@ -46,17 +46,17 @@ + gpio-leds { + compatible = "gpio-leds"; + +- act-led { ++ act_led: led-0 { + gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + }; + +- heartbeat-led { ++ heartbeat_led: led-1 { + gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + +- pwr-led { ++ pwr_led: led-2 { + gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + +From d735cc7ec7128c7513fc64a292b618bacaf7b044 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Fri, 3 Apr 2020 20:01:56 +0200 +Subject: [PATCH] ARM: dts: rockchip: remove identical #include from + rk3288.dtsi + +There are 2 identical '#include' for 'rk3288-power.h', +so remove one of them. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200403180159.13387-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 439062737bc06232761196f07046872d0ce3f3d6) +--- + arch/arm/boot/dts/rk3288.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 0cd88774db95..2e1edd85f04a 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -7,7 +7,6 @@ + #include + #include + #include +-#include + #include + + / { + +From 10623149945c885081ae775a7fcc2711975ad7fa Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Thu, 16 Apr 2020 20:30:53 +0200 +Subject: [PATCH] arm64: dts: rockchip: add bus-width properties to mmc nodes + for px30 + +'bus-width' and pinctrl containing the bus-pins +should be in the same file, so add them to +all mmc nodes in 'px30.dtsi'. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200416183053.6045-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit fb0ab17f1ab750d9662ec6b9fb3aa541a8ac1f5c) +--- + arch/arm64/boot/dts/rockchip/px30.dtsi | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi +index adc9b8bf5eaa..a6b8427156d5 100644 +--- a/arch/arm64/boot/dts/rockchip/px30.dtsi ++++ b/arch/arm64/boot/dts/rockchip/px30.dtsi +@@ -931,6 +931,7 @@ + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, + <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; ++ bus-width = <4>; + fifo-depth = <0x100>; + max-frequency = <150000000>; + pinctrl-names = "default"; +@@ -946,6 +947,7 @@ + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, + <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; ++ bus-width = <4>; + fifo-depth = <0x100>; + max-frequency = <150000000>; + pinctrl-names = "default"; +@@ -961,6 +963,7 @@ + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, + <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; ++ bus-width = <8>; + fifo-depth = <0x100>; + max-frequency = <150000000>; + pinctrl-names = "default"; + +From cbed48821189566fec7fc794f847d37864b84a8b Mon Sep 17 00:00:00 2001 +From: Justin Swartz +Date: Mon, 6 Apr 2020 13:50:04 +0000 +Subject: [PATCH] ARM: dts: enable WLAN for Mecer Xtreme Mini S6 + +The Mecer Xtreme Mini S6 features a wireless module, based on a +Realtek 8723BS, which provides WLAN and Bluetooth connectivity via +SDIO and UART interfaces respectively. + +Define a simple MMC power sequence that declares the GPIO pins +connected to the module's WLAN Disable and Bluetooth Disable pins +as active low reset signals, because both signals must be deasserted +for WLAN radio operation. + +Configure the host's SDIO interface for High Speed mode with 1.8v +I/O signalling and IRQ detection over a 4-bit wide bus. + +Signed-off-by: Justin Swartz +Link: https://lore.kernel.org/r/20200406135006.23759-1-justin.swartz@risingedge.co.za +Signed-off-by: Heiko Stuebner +(cherry picked from commit 6067ec2c7ffacab4689ddfed3df74a467d112efe) +--- + arch/arm/boot/dts/rk3229-xms6.dts | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts +index 637245324a5e..17a547fe8e3c 100644 +--- a/arch/arm/boot/dts/rk3229-xms6.dts ++++ b/arch/arm/boot/dts/rk3229-xms6.dts +@@ -39,6 +39,12 @@ + }; + }; + ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, ++ <&gpio2 29 GPIO_ACTIVE_LOW>; ++ }; ++ + vcc_host: vcc-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -202,6 +208,16 @@ + status = "okay"; + }; + ++&sdio { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ vqmmc-supply = <&vccio_1v8>; ++ status = "okay"; ++}; ++ + &sdmmc { + cap-mmc-highspeed; + disable-wp; + +From 8a8225b677d45d3fd9a683447ae08fe729789593 Mon Sep 17 00:00:00 2001 +From: Justin Swartz +Date: Mon, 6 Apr 2020 13:50:05 +0000 +Subject: [PATCH] ARM: dts: remove disable-wp from rk3229-xms6 emmc + +Remove the disable-wp attribute from &emmc as it is, according to +Documentation/devicetree/bindings/mmc/mmc-controller.yaml: + + "Not used in combination with eMMC or SDIO." + +Suggested-by: Johan Jonker +Signed-off-by: Justin Swartz +Link: https://lore.kernel.org/r/20200406135006.23759-2-justin.swartz@risingedge.co.za +Signed-off-by: Heiko Stuebner +(cherry picked from commit 2dd579fc969882c0036433a74446ba5e57ffab2d) +--- + arch/arm/boot/dts/rk3229-xms6.dts | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts +index 17a547fe8e3c..263393ac4fa6 100644 +--- a/arch/arm/boot/dts/rk3229-xms6.dts ++++ b/arch/arm/boot/dts/rk3229-xms6.dts +@@ -137,7 +137,6 @@ + + &emmc { + cap-mmc-highspeed; +- disable-wp; + non-removable; + status = "okay"; + }; + +From 6d03d3fb5c5ae4760549d428ceb0ace0c6dd5b57 Mon Sep 17 00:00:00 2001 +From: Justin Swartz +Date: Sun, 19 Apr 2020 12:51:33 +0000 +Subject: [PATCH] ARM: dts: rockchip: add rga node for rk322x + +Add a node to define the presence of RGA, a 2D raster graphic +acceleration unit. + +Signed-off-by: Justin Swartz +Link: https://lore.kernel.org/r/20200419125134.29923-2-justin.swartz@risingedge.co.za +Signed-off-by: Heiko Stuebner +(cherry picked from commit 54b1a4e070330c3fba5becfb0b619bf360bc2657) +--- + arch/arm/boot/dts/rk322x.dtsi | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi +index 5485a9918da6..b0fd92befdeb 100644 +--- a/arch/arm/boot/dts/rk322x.dtsi ++++ b/arch/arm/boot/dts/rk322x.dtsi +@@ -615,6 +615,16 @@ + status = "disabled"; + }; + ++ rga: rga@20060000 { ++ compatible = "rockchip,rk3228-rga", "rockchip,rk3288-rga"; ++ reg = <0x20060000 0x1000>; ++ interrupts = ; ++ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; ++ clock-names = "aclk", "hclk", "sclk"; ++ resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>; ++ reset-names = "core", "axi", "ahb"; ++ }; ++ + iep_mmu: iommu@20070800 { + compatible = "rockchip,iommu"; + reg = <0x20070800 0x100>; + +From 895cd23b800f934da3f5d49feef3c72d3aa84f0d Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Tue, 28 Apr 2020 22:30:03 +0200 +Subject: [PATCH] arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position + on rk3399 + +The pd_tcpc0 and pd_tcpc1 nodes are currently a sub node of pd_vio. +In the rk3399 TRM figure of the 'Power Domain Partition' and in the +table of 'Power Domain and Voltage Domain Summary' these power domains +are positioned directly under VD_LOGIC, so fix that in 'rk3399.dtsi'. + +Signed-off-by: Johan Jonker +Reviewed-by: Caesar Wang +Link: https://lore.kernel.org/r/20200428203003.3318-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit 2b99e6196663199409540fb95798dba464e34343) +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index e6442d249abf..2581e9cc7a1d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -1056,6 +1056,16 @@ + clocks = <&cru HCLK_SDIO>; + pm_qos = <&qos_sdioaudio>; + }; ++ pd_tcpc0@RK3399_PD_TCPD0 { ++ reg = ; ++ clocks = <&cru SCLK_UPHY0_TCPDCORE>, ++ <&cru SCLK_UPHY0_TCPDPHY_REF>; ++ }; ++ pd_tcpc1@RK3399_PD_TCPD1 { ++ reg = ; ++ clocks = <&cru SCLK_UPHY1_TCPDCORE>, ++ <&cru SCLK_UPHY1_TCPDPHY_REF>; ++ }; + pd_usb3@RK3399_PD_USB3 { + reg = ; + clocks = <&cru ACLK_USB3>; +@@ -1088,16 +1098,6 @@ + pm_qos = <&qos_isp1_m0>, + <&qos_isp1_m1>; + }; +- pd_tcpc0@RK3399_PD_TCPD0 { +- reg = ; +- clocks = <&cru SCLK_UPHY0_TCPDCORE>, +- <&cru SCLK_UPHY0_TCPDPHY_REF>; +- }; +- pd_tcpc1@RK3399_PD_TCPD1 { +- reg = ; +- clocks = <&cru SCLK_UPHY1_TCPDCORE>, +- <&cru SCLK_UPHY1_TCPDPHY_REF>; +- }; + pd_vo@RK3399_PD_VO { + reg = ; + #address-cells = <1>; + +From 0a5518e8a60d1ba9a38b22735f092aa846699d55 Mon Sep 17 00:00:00 2001 +From: Johan Jonker +Date: Tue, 19 May 2020 13:14:44 +0200 +Subject: [PATCH] arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on + rk3326-odroid-go2 + +The 'pinctrl-names' property should contain a list of names +to the assigned states. The value 'led_pins' in the gpio-leds +node on rk3326-odroid-go2 is not a state that is normally used, +so change it the common name 'default'. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20200519111444.2208-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +(cherry picked from commit b2cb68e864222eb3cc1d7c3c06edc40469699983) +--- + arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +index 46826b6e237f..b3a8f936578f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +@@ -127,7 +127,7 @@ + + leds: gpio-leds { + compatible = "gpio-leds"; +- pinctrl-names = "led_pins"; ++ pinctrl-names = "default"; + pinctrl-0 = <&blue_led_pin>; + + blue_led: led-0 { diff --git a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch index f2cfbca2a3..96b378d8f7 100644 --- a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch +++ b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-next.patch @@ -1,371 +1,4 @@ -From 9aa9f5735d151accd75268a8de1a510e343c22ee Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 16:22:34 +0200 -Subject: [PATCH] dt-bindings: display: convert rockchip vop bindings to yaml - -Current dts files with 'vop' nodes are manually verified. -In order to automate this process rockchip-vop.txt -has to be converted to yaml. - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Signed-off-by: Sam Ravnborg -Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-1-jbx6244@gmail.com -(cherry picked from commit 4e78ba278722480fa1fa933caa6ff24a53b441c8) ---- - .../bindings/display/rockchip/rockchip-vop.txt | 74 ------------- - .../bindings/display/rockchip/rockchip-vop.yaml | 123 +++++++++++++++++++++ - 2 files changed, 123 insertions(+), 74 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt - create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt -deleted file mode 100644 -index 8b3a5f514205..000000000000 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt -+++ /dev/null -@@ -1,74 +0,0 @@ --device-tree bindings for rockchip soc display controller (vop) -- --VOP (Visual Output Processor) is the Display Controller for the Rockchip --series of SoCs which transfers the image data from a video memory --buffer to an external LCD interface. -- --Required properties: --- compatible: value should be one of the following -- "rockchip,rk3036-vop"; -- "rockchip,rk3126-vop"; -- "rockchip,px30-vop-lit"; -- "rockchip,px30-vop-big"; -- "rockchip,rk3066-vop"; -- "rockchip,rk3188-vop"; -- "rockchip,rk3288-vop"; -- "rockchip,rk3368-vop"; -- "rockchip,rk3366-vop"; -- "rockchip,rk3399-vop-big"; -- "rockchip,rk3399-vop-lit"; -- "rockchip,rk3228-vop"; -- "rockchip,rk3328-vop"; -- --- reg: Must contain one entry corresponding to the base address and length -- of the register space. Can optionally contain a second entry -- corresponding to the CRTC gamma LUT address. -- --- interrupts: should contain a list of all VOP IP block interrupts in the -- order: VSYNC, LCD_SYSTEM. The interrupt specifier -- format depends on the interrupt controller used. -- --- clocks: must include clock specifiers corresponding to entries in the -- clock-names property. -- --- clock-names: Must contain -- aclk_vop: for ddr buffer transfer. -- hclk_vop: for ahb bus to R/W the phy regs. -- dclk_vop: pixel clock. -- --- resets: Must contain an entry for each entry in reset-names. -- See ../reset/reset.txt for details. --- reset-names: Must include the following entries: -- - axi -- - ahb -- - dclk -- --- iommus: required a iommu node -- --- port: A port node with endpoint definitions as defined in -- Documentation/devicetree/bindings/media/video-interfaces.txt. -- --Example: --SoC specific DT entry: -- vopb: vopb@ff930000 { -- compatible = "rockchip,rk3288-vop"; -- reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>; -- interrupts = ; -- clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; -- clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; -- resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; -- reset-names = "axi", "ahb", "dclk"; -- iommus = <&vopb_mmu>; -- vopb_out: port { -- #address-cells = <1>; -- #size-cells = <0>; -- vopb_out_edp: endpoint@0 { -- reg = <0>; -- remote-endpoint=<&edp_in_vopb>; -- }; -- vopb_out_hdmi: endpoint@1 { -- reg = <1>; -- remote-endpoint=<&hdmi_in_vopb>; -- }; -- }; -- }; -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -new file mode 100644 -index 000000000000..42ee2b5c31e1 ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -@@ -0,0 +1,123 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip SoC display controller (VOP) -+ -+description: -+ VOP (Video Output Processor) is the display controller for the Rockchip -+ series of SoCs which transfers the image data from a video memory -+ buffer to an external LCD interface. -+ -+maintainers: -+ - Sandy Huang -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ enum: -+ - rockchip,px30-vop-big -+ - rockchip,px30-vop-lit -+ - rockchip,rk3036-vop -+ - rockchip,rk3066-vop -+ - rockchip,rk3126-vop -+ - rockchip,rk3188-vop -+ - rockchip,rk3228-vop -+ - rockchip,rk3288-vop -+ - rockchip,rk3328-vop -+ - rockchip,rk3366-vop -+ - rockchip,rk3368-vop -+ - rockchip,rk3399-vop-big -+ - rockchip,rk3399-vop-lit -+ -+ reg: -+ minItems: 1 -+ items: -+ - description: -+ Must contain one entry corresponding to the base address and length -+ of the register space. -+ - description: -+ Can optionally contain a second entry corresponding to -+ the CRTC gamma LUT address. -+ -+ interrupts: -+ maxItems: 1 -+ description: -+ The VOP interrupt is shared by several interrupt sources, such as -+ frame start (VSYNC), line flag and other status interrupts. -+ -+ clocks: -+ items: -+ - description: Clock for ddr buffer transfer. -+ - description: Pixel clock. -+ - description: Clock for the ahb bus to R/W the phy regs. -+ -+ clock-names: -+ items: -+ - const: aclk_vop -+ - const: dclk_vop -+ - const: hclk_vop -+ -+ resets: -+ maxItems: 3 -+ -+ reset-names: -+ items: -+ - const: axi -+ - const: ahb -+ - const: dclk -+ -+ port: -+ type: object -+ description: -+ A port node with endpoint definitions as defined in -+ Documentation/devicetree/bindings/media/video-interfaces.txt. -+ -+ iommus: -+ maxItems: 1 -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - resets -+ - reset-names -+ - port -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ vopb: vopb@ff930000 { -+ compatible = "rockchip,rk3288-vop"; -+ reg = <0x0 0xff930000 0x0 0x19c>, -+ <0x0 0xff931000 0x0 0x1000>; -+ interrupts = ; -+ clocks = <&cru ACLK_VOP0>, -+ <&cru DCLK_VOP0>, -+ <&cru HCLK_VOP0>; -+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; -+ resets = <&cru SRST_LCDC1_AXI>, -+ <&cru SRST_LCDC1_AHB>, -+ <&cru SRST_LCDC1_DCLK>; -+ reset-names = "axi", "ahb", "dclk"; -+ iommus = <&vopb_mmu>; -+ vopb_out: port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ vopb_out_edp: endpoint@0 { -+ reg = <0>; -+ remote-endpoint=<&edp_in_vopb>; -+ }; -+ vopb_out_hdmi: endpoint@1 { -+ reg = <1>; -+ remote-endpoint=<&hdmi_in_vopb>; -+ }; -+ }; -+ }; - -From 082ebdee06e1e5203434425e9f644a884fe6c999 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 16:22:35 +0200 -Subject: [PATCH] dt-bindings: display: rockchip-vop: add additional properties - -In the old txt situation we add/describe only properties that are used -by the driver/hardware itself. With yaml it also filters things in a -node that are used by other drivers like 'assigned-clocks' and -'assigned-clock-rates' for rk3399 and 'power-domains' for most -Rockchip Socs in 'vop' nodes, so add them to 'rockchip-vop.yaml'. - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Signed-off-by: Sam Ravnborg -Link: https://patchwork.freedesktop.org/patch/msgid/20200403142235.8870-2-jbx6244@gmail.com -(cherry picked from commit 0706cd0f94d4d8dd71fad7f70dcbf19d514391ef) ---- - .../devicetree/bindings/display/rockchip/rockchip-vop.yaml | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -index 42ee2b5c31e1..1695e3e4bcec 100644 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml -@@ -75,9 +75,18 @@ properties: - A port node with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - -+ assigned-clocks: -+ maxItems: 2 -+ -+ assigned-clock-rates: -+ maxItems: 2 -+ - iommus: - maxItems: 1 - -+ power-domains: -+ maxItems: 1 -+ - required: - - compatible - - reg -@@ -94,6 +103,7 @@ examples: - - | - #include - #include -+ #include - vopb: vopb@ff930000 { - compatible = "rockchip,rk3288-vop"; - reg = <0x0 0xff930000 0x0 0x19c>, -@@ -103,6 +113,7 @@ examples: - <&cru DCLK_VOP0>, - <&cru HCLK_VOP0>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; -+ power-domains = <&power RK3288_PD_VIO>; - resets = <&cru SRST_LCDC1_AXI>, - <&cru SRST_LCDC1_AHB>, - <&cru SRST_LCDC1_DCLK>; - -From 5aacedce61aed00aaf4064382e2e81bc9e8cbd2e Mon Sep 17 00:00:00 2001 -From: Justin Swartz -Date: Tue, 14 Jan 2020 16:25:02 +0000 -Subject: [PATCH] clk: rockchip: fix incorrect configuration of rk3228 - aclk_gpu* clocks - -The following changes prevent the unrecoverable freezes and rcu_sched -stall warnings experienced in each of my attempts to take advantage of -lima. - -Replace the COMPOSITE_NOGATE definition of aclk_gpu_pre with a -COMPOSITE that retains the selection of HDMIPHY as the PLL source, but -instead makes uses of the aclk_gpu PLL source gate and parent names -defined by mux_pll_src_4plls_p rather than mux_aclk_gpu_pre_p. - -Remove the now unused mux_aclk_gpu_pre_p and the four named but also -unused definitions (cpll_gpu, gpll_gpu, hdmiphy_gpu and usb480m_gpu) -of the aclk_gpu PLL source gate. - -Use the correct gate offset for aclk_gpu and aclk_gpu_noc. - -Fixes: 307a2e9ac524 ("clk: rockchip: add clock controller for rk3228") -Cc: stable@vger.kernel.org -Signed-off-by: Justin Swartz -[double-checked against SoC manual and added fixes tag] -Link: https://lore.kernel.org/r/20200114162503.7548-1-justin.swartz@risingedge.co.za -Signed-off-by: Heiko Stuebner -(cherry picked from commit cec9d101d70a3509da9bd2e601e0b242154ce616) ---- - drivers/clk/rockchip/clk-rk3228.c | 17 ++++------------- - 1 file changed, 4 insertions(+), 13 deletions(-) - -diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c -index d17cfb7a3ff4..d7243c09cc84 100644 ---- a/drivers/clk/rockchip/clk-rk3228.c -+++ b/drivers/clk/rockchip/clk-rk3228.c -@@ -156,8 +156,6 @@ PNAME(mux_i2s_out_p) = { "i2s1_pre", "xin12m" }; - PNAME(mux_i2s2_p) = { "i2s2_src", "i2s2_frac", "xin12m" }; - PNAME(mux_sclk_spdif_p) = { "sclk_spdif_src", "spdif_frac", "xin12m" }; - --PNAME(mux_aclk_gpu_pre_p) = { "cpll_gpu", "gpll_gpu", "hdmiphy_gpu", "usb480m_gpu" }; -- - PNAME(mux_uart0_p) = { "uart0_src", "uart0_frac", "xin24m" }; - PNAME(mux_uart1_p) = { "uart1_src", "uart1_frac", "xin24m" }; - PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" }; -@@ -468,16 +466,9 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { - RK2928_CLKSEL_CON(24), 6, 10, DFLAGS, - RK2928_CLKGATE_CON(2), 8, GFLAGS), - -- GATE(0, "cpll_gpu", "cpll", 0, -- RK2928_CLKGATE_CON(3), 13, GFLAGS), -- GATE(0, "gpll_gpu", "gpll", 0, -- RK2928_CLKGATE_CON(3), 13, GFLAGS), -- GATE(0, "hdmiphy_gpu", "hdmiphy", 0, -- RK2928_CLKGATE_CON(3), 13, GFLAGS), -- GATE(0, "usb480m_gpu", "usb480m", 0, -+ COMPOSITE(0, "aclk_gpu_pre", mux_pll_src_4plls_p, 0, -+ RK2928_CLKSEL_CON(34), 5, 2, MFLAGS, 0, 5, DFLAGS, - RK2928_CLKGATE_CON(3), 13, GFLAGS), -- COMPOSITE_NOGATE(0, "aclk_gpu_pre", mux_aclk_gpu_pre_p, 0, -- RK2928_CLKSEL_CON(34), 5, 2, MFLAGS, 0, 5, DFLAGS), - - COMPOSITE(SCLK_SPI0, "sclk_spi0", mux_pll_src_2plls_p, 0, - RK2928_CLKSEL_CON(25), 8, 1, MFLAGS, 0, 7, DFLAGS, -@@ -582,8 +573,8 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { - GATE(0, "pclk_peri_noc", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(12), 2, GFLAGS), - - /* PD_GPU */ -- GATE(ACLK_GPU, "aclk_gpu", "aclk_gpu_pre", 0, RK2928_CLKGATE_CON(13), 14, GFLAGS), -- GATE(0, "aclk_gpu_noc", "aclk_gpu_pre", 0, RK2928_CLKGATE_CON(13), 15, GFLAGS), -+ GATE(ACLK_GPU, "aclk_gpu", "aclk_gpu_pre", 0, RK2928_CLKGATE_CON(7), 14, GFLAGS), -+ GATE(0, "aclk_gpu_noc", "aclk_gpu_pre", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS), - - /* PD_BUS */ - GATE(0, "sclk_initmem_mbist", "aclk_cpu", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS), - -From f861dcc0933168fefda7e58f0dee67c2dcb1a3d4 Mon Sep 17 00:00:00 2001 +From 00d6e830dc1ff5520ddb23561916f35e848a41ea Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jan 2020 17:38:19 +0100 Subject: [PATCH] clk: rockchip: convert rk3399 pll type to use @@ -423,7 +56,7 @@ index 10560d963baf..28b04aad31ad 100644 static void rockchip_rk3399_pll_get_params(struct rockchip_clk_pll *pll, -From 35fffcf550e6df55be05d66e53268b8791a458a1 Mon Sep 17 00:00:00 2001 +From 90f7bc7cd3e82b3f6d2fa1086ab59f7fac1bc2b2 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jan 2020 17:38:20 +0100 Subject: [PATCH] clk: rockchip: convert basic pll lock_wait to use @@ -479,7 +112,7 @@ index 28b04aad31ad..945f8b2cacc1 100644 /** -From 60036f4fef0474724f8cb22f94c1b9e67ece6c6a Mon Sep 17 00:00:00 2001 +From 2cf8100576106e8461fc289613b7d7a4c521b732 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jan 2020 17:38:21 +0100 Subject: [PATCH] clk: rockchip: convert rk3036 pll type to use internal lock @@ -560,2021 +193,3 @@ index 945f8b2cacc1..4c6c9167ef50 100644 return 0; } - -From 9fbb089988034b4ff0c540a46f9fa366c4feea7c Mon Sep 17 00:00:00 2001 -From: Geert Uytterhoeven -Date: Wed, 12 Feb 2020 11:08:27 +0100 -Subject: [PATCH] ARM: rockchip: Replace by - - -The Rockchip platform code is not a clock provider, and just needs to -call of_clk_init(). - -Hence it can include instead of . - -Signed-off-by: Geert Uytterhoeven -Reviewed-by: Stephen Boyd -Link: https://lore.kernel.org/r/20200212100830.446-5-geert+renesas@glider.be -Signed-off-by: Heiko Stuebner -(cherry picked from commit 37aed36cfec3b35469be3dc5fb52c8a459414cff) ---- - arch/arm/mach-rockchip/rockchip.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c -index f9797a2b5d0d..beea4564eed4 100644 ---- a/arch/arm/mach-rockchip/rockchip.c -+++ b/arch/arm/mach-rockchip/rockchip.c -@@ -9,9 +9,9 @@ - #include - #include - #include -+#include - #include - #include --#include - #include - #include - #include - -From 0a6395e3e1484c148c398c6cf2035acfbbb6d436 Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Thu, 23 Jan 2020 00:48:07 +0000 -Subject: [PATCH] ARM: rockchip: fix spelling mistake "to" -> "too" - -There is a spelling mistake in a pr_err message. Fix it. - -Signed-off-by: Colin Ian King -Link: https://lore.kernel.org/r/20200123004807.2833556-1-colin.king@canonical.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 0b973c65d2f2da049252bc8370e4cf037b99c7e9) ---- - arch/arm/mach-rockchip/platsmp.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c -index 649e0a54784c..d60856898d97 100644 ---- a/arch/arm/mach-rockchip/platsmp.c -+++ b/arch/arm/mach-rockchip/platsmp.c -@@ -180,7 +180,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node) - - rsize = resource_size(&res); - if (rsize < trampoline_sz) { -- pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n", -+ pr_err("%s: reserved block with size 0x%x is too small for trampoline size 0x%x\n", - __func__, rsize, trampoline_sz); - return -EINVAL; - } - -From 470e05fb423f194503b492216e1d756c658af1fb Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Fri, 17 Apr 2020 13:08:34 +0100 -Subject: [PATCH] arm64: dts: rockchip: Correct PMU compatibles for PX30 and - RK3308 - -A proper binding for the Cortex-A35 PMU actually predates these DTs -being upstreamed, so use it. - -Signed-off-by: Robin Murphy -Link: https://lore.kernel.org/r/6dfed94a99780c2314b38ff2b55a7efa0be4edbc.1587125314.git.robin.murphy@arm.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 5944eb7a1ec7eb8b86233f71838535e8a8870656) ---- - arch/arm64/boot/dts/rockchip/px30.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3308.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi -index f809dd6d5dc3..adc9b8bf5eaa 100644 ---- a/arch/arm64/boot/dts/rockchip/px30.dtsi -+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi -@@ -143,7 +143,7 @@ - }; - - arm-pmu { -- compatible = "arm,cortex-a53-pmu"; -+ compatible = "arm,cortex-a35-pmu"; - interrupts = , - , - , -diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi -index ac43bc3f7031..ac7f694079d0 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi -@@ -127,7 +127,7 @@ - }; - - arm-pmu { -- compatible = "arm,cortex-a53-pmu"; -+ compatible = "arm,cortex-a35-pmu"; - interrupts = , - , - , - -From 0b78bf20d7b750d295c1a7aca5e9cc467e4cc314 Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Tue, 14 Apr 2020 18:39:51 +0200 -Subject: [PATCH] arm64: dts: rockchip: fix inverted headphone detection on - Pinebook Pro - -On the Pinebook Pro the headphone jack is dual use. It can be used either -as a normal headphone jack or as a debug serial connection. This -functionality is controlled via a small hardware switch on the mainboard. -Unfortunately flipping this switch biases the headphone detection switch -inside the headphone jack at 3.3 V if in `debug UART` position but -to GND when in `headphone out` position. -This results in an inversion of the headphone detection logic depending -on the switch position. -Since the headphone jack can only be used for audio when in -`headphone out` position this commit changes the headphone detect GPIO -logic to be correct for that case rather than for the debug UART. - -Fixes: 5a65505a6988 ("arm64: dts: rockchip: Add initial support for Pinebook Pro") -Signed-off-by: Tobias Schramm -Link: https://lore.kernel.org/r/20200414163952.1093784-2-t.schramm@manjaro.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 40df91a894e9298d0f052acb6960f12ace5bee24) ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index 5ea281b55fe2..c3f15f5bd550 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -147,7 +147,7 @@ - "Speaker", "Speaker Amplifier OUTL", - "Speaker", "Speaker Amplifier OUTR"; - -- simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; -+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; - simple-audio-card,aux-devs = <&speaker_amp>; - simple-audio-card,pin-switches = "Speaker"; - -@@ -794,7 +794,7 @@ - - es8316 { - hp_det_gpio: hp-det-gpio { -- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; -+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - -From 0343f0b706c94aee427fb9bd620b50ddd169a927 Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Tue, 14 Apr 2020 18:39:52 +0200 -Subject: [PATCH] arm64: dts: rockchip: enable DC charger detection pullup on - Pinebook Pro - -On the Pinebook Pro the DC charger is detected via an open collector -transistor attached to a GPIO. This GPIO requires its pullup to be -enabled for the detection to work reliably. - -Fixes: 5a65505a6988 ("arm64: dts: rockchip: Add initial support for Pinebook Pro") -Signed-off-by: Tobias Schramm -Link: https://lore.kernel.org/r/20200414163952.1093784-3-t.schramm@manjaro.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 7a87adbc4afe7585e27b4a4f97002e9a24f2e745) ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index c3f15f5bd550..294d21bf45f5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -788,7 +788,7 @@ - - dc-charger { - dc_det_gpio: dc-det-gpio { -- rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; -+ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - -From 39a54c483579bb29c1a75f5db4d2008b6ff46f9a Mon Sep 17 00:00:00 2001 -From: Chen-Yu Tsai -Date: Fri, 27 Mar 2020 11:04:10 +0800 -Subject: [PATCH] arm64: dts: rockchip: Replace RK805 PMIC node name with - "pmic" on rk3328 boards - -In some board device tree files, "rk805" was used for the RK805 PMIC's -node name. However the policy for device trees is that generic names -should be used. - -Replace the "rk805" node name with the generic "pmic" name. - -Fixes: 1e28037ec88e ("arm64: dts: rockchip: add rk805 node for rk3328-evb") -Fixes: 955bebde057e ("arm64: dts: rockchip: add rk3328-rock64 board") -Signed-off-by: Chen-Yu Tsai -Link: https://lore.kernel.org/r/20200327030414.5903-3-wens@kernel.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 83b994129fb4c18a8460fd395864a28740e5e7fb) ---- - arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 2 +- - arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -index 49c4b96da3d4..6abc6f4a86cf 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -@@ -92,7 +92,7 @@ - &i2c1 { - status = "okay"; - -- rk805: rk805@18 { -+ rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -index bf3e546f5266..ebf3eb222e1f 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts -@@ -170,7 +170,7 @@ - &i2c1 { - status = "okay"; - -- rk805: rk805@18 { -+ rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - -From 9c025b05e76b99f95c7468cea37d47fde7c9bc97 Mon Sep 17 00:00:00 2001 -From: Chen-Yu Tsai -Date: Fri, 27 Mar 2020 11:04:11 +0800 -Subject: [PATCH] arm64: dts: rockchip: drop non-existent gmac2phy pinmux - options from rk3328 - -When gmac2phy was added, a whole bunch of pinmux options were added. -Turns out some of these don't exist on the actual product, based on -the publicly available TRM. - -Remove them. - -Signed-off-by: Chen-Yu Tsai -Link: https://lore.kernel.org/r/20200327030414.5903-4-wens@kernel.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit e559bb846ac3770f18485ea4734c0a84c069e79e) ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 16 ---------------- - 1 file changed, 16 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 7e88d88aab98..b861b4fd75e6 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -1794,10 +1794,6 @@ - }; - - gmac2phy { -- fephyled_speed100: fephyled-speed100 { -- rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>; -- }; -- - fephyled_speed10: fephyled-speed10 { - rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>; - }; -@@ -1806,18 +1802,6 @@ - rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>; - }; - -- fephyled_rxm0: fephyled-rxm0 { -- rockchip,pins = <0 RK_PD5 1 &pcfg_pull_none>; -- }; -- -- fephyled_txm0: fephyled-txm0 { -- rockchip,pins = <0 RK_PD5 2 &pcfg_pull_none>; -- }; -- -- fephyled_linkm0: fephyled-linkm0 { -- rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>; -- }; -- - fephyled_rxm1: fephyled-rxm1 { - rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>; - }; - -From f3387e221eeb1295caa8882b00c1ba8cb515c4bf Mon Sep 17 00:00:00 2001 -From: Chen-Yu Tsai -Date: Fri, 27 Mar 2020 11:04:12 +0800 -Subject: [PATCH] arm64: dts: rockchip: drop #address-cells, #size-cells from - rk3328 grf node - -The device tree compiler gives the following warning: - - /syscon@ff100000: unnecessary #address-cells/#size-cells without - "ranges" or child "reg" property - -Since none of the grf node's direct child nodes have any reg properties, -remove the two properties from the grf node to silence the warning. - -Signed-off-by: Chen-Yu Tsai -Link: https://lore.kernel.org/r/20200327030414.5903-5-wens@kernel.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 743a646a05affe12e5545e59e7162dd14e84b425) ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index b861b4fd75e6..a4d591d91533 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -299,8 +299,6 @@ - grf: syscon@ff100000 { - compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff100000 0x0 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; - - io_domains: io-domains { - compatible = "rockchip,rk3328-io-voltage-domain"; - -From d94787f4475820546c232db618566657084c2637 Mon Sep 17 00:00:00 2001 -From: Chen-Yu Tsai -Date: Fri, 27 Mar 2020 11:04:13 +0800 -Subject: [PATCH] arm64: dts: rockchip: drop #address-cells, #size-cells from - rk3399 pmugrf node - -The device tree compiler gives the following warning: - - /syscon@ff100000: unnecessary #address-cells/#size-cells without - "ranges" or child "reg" property - -Since the pmygrf node only has an io-domains child node that has no -reg property, remove the two properties from the pmugrf node to silence -the warning. - -Signed-off-by: Chen-Yu Tsai -Link: https://lore.kernel.org/r/20200327030414.5903-6-wens@kernel.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 59782311b24d93cd6c8944ba86130744ab857429) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 74f2c3d49095..3499d1497127 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1124,8 +1124,6 @@ - pmugrf: syscon@ff320000 { - compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xff320000 0x0 0x1000>; -- #address-cells = <1>; -- #size-cells = <1>; - - pmu_io_domains: io-domains { - compatible = "rockchip,rk3399-pmu-io-voltage-domain"; - -From 9d1a7273099fab0c502d8b2292f2bcb0e7b38957 Mon Sep 17 00:00:00 2001 -From: Chen-Yu Tsai -Date: Fri, 27 Mar 2020 11:04:14 +0800 -Subject: [PATCH] arm64: dts: rockchip: Rename dwc3 device nodes on rk3399 to - make dtc happy - -The device tree compiler complains that the dwc3 nodes have regs -properties but no matching unit addresses. - -Add the unit addresses to the device node name. While at it, also rename -the nodes from "dwc3" to "usb", as guidelines require device nodes have -generic names. - -Fixes: 7144224f2c2b ("arm64: dts: rockchip: support dwc3 USB for rk3399") -Signed-off-by: Chen-Yu Tsai -Link: https://lore.kernel.org/r/20200327030414.5903-7-wens@kernel.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 190c7f6fd43a776d4a6da1dac44408104649e9b7) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 3499d1497127..90c27723cec5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -403,7 +403,7 @@ - reset-names = "usb3-otg"; - status = "disabled"; - -- usbdrd_dwc3_0: dwc3 { -+ usbdrd_dwc3_0: usb@fe800000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfe800000 0x0 0x100000>; - interrupts = ; -@@ -439,7 +439,7 @@ - reset-names = "usb3-otg"; - status = "disabled"; - -- usbdrd_dwc3_1: dwc3 { -+ usbdrd_dwc3_1: usb@fe900000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfe900000 0x0 0x100000>; - interrupts = ; - -From 96add3121829974457d3b54f3e6907c6657f72ab Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 3 Apr 2020 15:36:30 +0200 -Subject: [PATCH] dt-bindings: display: convert rockchip rk3066 hdmi bindings - to yaml - -Current dts files with 'hdmi' nodes for rk3066 are manually verified. -In order to automate this process rockchip,rk3066-hdmi.txt -has to be converted to yaml. - -Signed-off-by: Johan Jonker -Reviewed-by: Rob Herring -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200403133630.7377-1-jbx6244@gmail.com -(cherry picked from commit 8eea6e26fc2eda6922e5008ccb7f55bc1775d5b3) ---- - .../display/rockchip/rockchip,rk3066-hdmi.txt | 72 ----------- - .../display/rockchip/rockchip,rk3066-hdmi.yaml | 140 +++++++++++++++++++++ - 2 files changed, 140 insertions(+), 72 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt - create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml - -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt -deleted file mode 100644 -index d1ad31bca8d9..000000000000 ---- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.txt -+++ /dev/null -@@ -1,72 +0,0 @@ --Rockchip specific extensions for rk3066 HDMI --============================================ -- --Required properties: --- compatible: -- "rockchip,rk3066-hdmi"; --- reg: -- Physical base address and length of the controller's registers. --- clocks, clock-names: -- Phandle to HDMI controller clock, name should be "hclk". --- interrupts: -- HDMI interrupt number. --- power-domains: -- Phandle to the RK3066_PD_VIO power domain. --- rockchip,grf: -- This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. --- ports: -- Contains one port node with two endpoints, numbered 0 and 1, -- connected respectively to vop0 and vop1. -- Contains one port node with one endpoint -- connected to a hdmi-connector node. --- pinctrl-0, pinctrl-name: -- Switch the iomux for the HPD/I2C pins to HDMI function. -- --Example: -- hdmi: hdmi@10116000 { -- compatible = "rockchip,rk3066-hdmi"; -- reg = <0x10116000 0x2000>; -- interrupts = ; -- clocks = <&cru HCLK_HDMI>; -- clock-names = "hclk"; -- power-domains = <&power RK3066_PD_VIO>; -- rockchip,grf = <&grf>; -- pinctrl-names = "default"; -- pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; -- -- ports { -- #address-cells = <1>; -- #size-cells = <0>; -- hdmi_in: port@0 { -- reg = <0>; -- #address-cells = <1>; -- #size-cells = <0>; -- hdmi_in_vop0: endpoint@0 { -- reg = <0>; -- remote-endpoint = <&vop0_out_hdmi>; -- }; -- hdmi_in_vop1: endpoint@1 { -- reg = <1>; -- remote-endpoint = <&vop1_out_hdmi>; -- }; -- }; -- hdmi_out: port@1 { -- reg = <1>; -- hdmi_out_con: endpoint { -- remote-endpoint = <&hdmi_con_in>; -- }; -- }; -- }; -- }; -- --&pinctrl { -- hdmi { -- hdmi_hpd: hdmi-hpd { -- rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; -- }; -- hdmii2c_xfer: hdmii2c-xfer { -- rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, -- <0 RK_PA2 1 &pcfg_pull_none>; -- }; -- }; --}; -diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml -new file mode 100644 -index 000000000000..4110d003ce1f ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3066-hdmi.yaml -@@ -0,0 +1,140 @@ -+# SPDX-License-Identifier: GPL-2.0 -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip rk3066 HDMI controller -+ -+maintainers: -+ - Sandy Huang -+ - Heiko Stuebner -+ -+properties: -+ compatible: -+ const: rockchip,rk3066-hdmi -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ maxItems: 1 -+ -+ clocks: -+ maxItems: 1 -+ -+ clock-names: -+ const: hclk -+ -+ pinctrl-0: -+ maxItems: 2 -+ -+ pinctrl-names: -+ const: default -+ description: -+ Switch the iomux for the HPD/I2C pins to HDMI function. -+ -+ power-domains: -+ maxItems: 1 -+ -+ rockchip,grf: -+ $ref: /schemas/types.yaml#/definitions/phandle -+ description: -+ This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1. -+ -+ ports: -+ type: object -+ -+ properties: -+ "#address-cells": -+ const: 1 -+ -+ "#size-cells": -+ const: 0 -+ -+ port@0: -+ type: object -+ description: -+ Port node with two endpoints, numbered 0 and 1, -+ connected respectively to vop0 and vop1. -+ -+ port@1: -+ type: object -+ description: -+ Port node with one endpoint connected to a hdmi-connector node. -+ -+ required: -+ - "#address-cells" -+ - "#size-cells" -+ - port@0 -+ - port@1 -+ -+ additionalProperties: false -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - pinctrl-0 -+ - pinctrl-names -+ - power-domains -+ - rockchip,grf -+ - ports -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ #include -+ #include -+ hdmi: hdmi@10116000 { -+ compatible = "rockchip,rk3066-hdmi"; -+ reg = <0x10116000 0x2000>; -+ interrupts = ; -+ clocks = <&cru HCLK_HDMI>; -+ clock-names = "hclk"; -+ pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; -+ pinctrl-names = "default"; -+ power-domains = <&power RK3066_PD_VIO>; -+ rockchip,grf = <&grf>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ hdmi_in: port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ hdmi_in_vop0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&vop0_out_hdmi>; -+ }; -+ hdmi_in_vop1: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&vop1_out_hdmi>; -+ }; -+ }; -+ hdmi_out: port@1 { -+ reg = <1>; -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+ }; -+ }; -+ }; -+ -+ pinctrl { -+ hdmi { -+ hdmi_hpd: hdmi-hpd { -+ rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; -+ }; -+ hdmii2c_xfer: hdmii2c-xfer { -+ rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, -+ <0 RK_PA2 1 &pcfg_pull_none>; -+ }; -+ }; -+ }; - -From b70576a38a44178852ef9b07490d5f2dadbee92f Mon Sep 17 00:00:00 2001 -From: Tobias Schramm -Date: Thu, 16 Apr 2020 16:55:34 +0200 -Subject: [PATCH] arm64: dts: rockchip: add micro SD card regulator to - rockpro64 - -This patch adds the RockPro64's micro SD card regulator to the -RockPro64 dtsi. The regulator is present on all revisions of the -device. -Previously the regular was missing, resulting in unreliable boot -behaviour when booting from SD card. - -Signed-off-by: Tobias Schramm -Link: https://lore.kernel.org/r/20200416145534.1263575-1-t.schramm@manjaro.org -Signed-off-by: Heiko Stuebner -(cherry picked from commit 1f5a3e1679353fb53e955afd8801a7f4f60877ff) ---- - arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 27 ++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -index 9bca25801260..6788ab28f89a 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi -@@ -96,6 +96,24 @@ - vin-supply = <&vcc_1v8>; - }; - -+ /* micro SD card power */ -+ vcc3v0_sd: vcc3v0-sd { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc0_pwr_h>; -+ regulator-name = "vcc3v0_sd"; -+ regulator-always-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ vin-supply = <&vcc3v3_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - enable-active-high; -@@ -603,6 +621,13 @@ - }; - }; - -+ sdcard { -+ sdmmc0_pwr_h: sdmmc0-pwr-h { -+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ }; -+ - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -@@ -661,6 +686,8 @@ - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; -+ vmmc-supply = <&vcc3v0_sd>; -+ vqmmc-supply = <&vcc_sdio>; - status = "okay"; - }; - - -From 8b1d9481dc46be9be43ce5ef32719df881410cc5 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Wed, 15 Apr 2020 15:10:57 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove bus-width from mmc nodes in - rk3308-roc-cc - -The 'bus-width' property for mmc nodes is defined both in -'rk3308.dtsi' and 'rk3308-roc-cc.dts'. -'bus-width' and pinctrl containing the bus-pins -should be in the same file, so remove all entries -from mmc nodes in 'rk3308-roc-cc.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200415131057.2366-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 051083dddf07a4472bc1720d5c2b1909e0865890) ---- - arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -index aa256350b18f..8011e9b12347 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts -@@ -123,7 +123,6 @@ - }; - - &emmc { -- bus-width = <8>; - cap-mmc-highspeed; - disable-wp; - mmc-hs200-1_8v; -@@ -171,7 +170,6 @@ - }; - - &sdmmc { -- bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <300>; - -From 586c16668802de5aa8ad1843ba9f32c74d8f1d16 Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 14 Apr 2020 10:29:36 +0200 -Subject: [PATCH] arm64: dts: rockchip: add core devicetree for rk3326 - -The rk3326 is basically a px30 without the second display controller. -So add a dtsi based on that, that just removes the affected nodes. - -Signed-off-by: Heiko Stuebner -Link: https://lore.kernel.org/r/20200414082938.2977572-1-heiko@sntech.de -Signed-off-by: Heiko Stuebner -(cherry picked from commit df07f7df7e5a61d06b21f89c4ab744fb4e4c2222) ---- - arch/arm64/boot/dts/rockchip/rk3326.dtsi | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3326.dtsi - -diff --git a/arch/arm64/boot/dts/rockchip/rk3326.dtsi b/arch/arm64/boot/dts/rockchip/rk3326.dtsi -new file mode 100644 -index 000000000000..2ba6da125137 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3326.dtsi -@@ -0,0 +1,15 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd -+ */ -+ -+#include "px30.dtsi" -+ -+&display_subsystem { -+ ports = <&vopb_out>; -+}; -+ -+/delete-node/ &dsi_in_vopl; -+/delete-node/ &lvds_vopl_in; -+/delete-node/ &vopl; -+/delete-node/ &vopl_mmu; - -From 5902e773f0bfedb39fca3d23e1aa8608ee150a1a Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 14 Apr 2020 10:29:37 +0200 -Subject: [PATCH] dt-bindings: Add binding for Hardkernel Odroid Go Advance - -Add a compatible for the Odroid Go Advance from Hardkernel. -The compatible used by the vendor already is odroid-go2, to distinguish -it from the previous (microcontroller-based) Odroid Go, so we're keeping -that, also to not cause unnecessary incompatibilites. - -Signed-off-by: Heiko Stuebner -Acked-by: Rob Herring -Link: https://lore.kernel.org/r/20200414082938.2977572-2-heiko@sntech.de -Signed-off-by: Heiko Stuebner -(cherry picked from commit 98412e1e57ea776b4581077a68fe6ed598bfba99) ---- - Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml -index 715586dea9bb..d4a4045092df 100644 ---- a/Documentation/devicetree/bindings/arm/rockchip.yaml -+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml -@@ -358,6 +358,11 @@ properties: - - const: haoyu,marsboard-rk3066 - - const: rockchip,rk3066a - -+ - description: Hardkernel Odroid Go Advance -+ items: -+ - const: hardkernel,rk3326-odroid-go2 -+ - const: rockchip,rk3326 -+ - - description: Hugsun X99 TV Box - items: - - const: hugsun,x99 - -From f3642fbb37bd3ca1d3fb160eaf3d482f86275b32 Mon Sep 17 00:00:00 2001 -From: Heiko Stuebner -Date: Tue, 14 Apr 2020 10:29:38 +0200 -Subject: [PATCH] arm64: dts: rockchip: add Odroid Advance Go - -The Odroid Advance Go is a handheld based on Rockchip's rk3326 soc -with a DSI display and some handheld controls including an analog -joystick connected to the saradc. - -Signed-off-by: Heiko Stuebner -Link: https://lore.kernel.org/r/20200414082938.2977572-3-heiko@sntech.de -Signed-off-by: Heiko Stuebner -(cherry picked from commit ce33988fb69828dfcb5825f9086d9dc2b37a9282) ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts | 560 +++++++++++++++++++++ - 2 files changed, 561 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts - -diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile -index ae7621309e92..b87b1f773083 100644 ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -2,6 +2,7 @@ - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb -diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -new file mode 100644 -index 000000000000..cf20aac5f2fe ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts -@@ -0,0 +1,560 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 Hardkernel Co., Ltd -+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH -+ */ -+ -+/dts-v1/; -+#include -+#include -+#include -+#include "rk3326.dtsi" -+ -+/ { -+ model = "ODROID-GO Advance"; -+ compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; -+ -+ chosen { -+ stdout-path = "serial2:115200n8"; -+ }; -+ -+ backlight: backlight { -+ compatible = "pwm-backlight"; -+ power-supply = <&vcc_bl>; -+ pwms = <&pwm1 0 25000 0>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&btn_pins>; -+ -+ /* -+ * *** ODROIDGO2-Advance Switch layout *** -+ * |------------------------------------------------| -+ * | sw15 sw16 | -+ * |------------------------------------------------| -+ * | sw1 |-------------------| sw8 | -+ * | sw3 sw4 | | sw7 sw5 | -+ * | sw2 | LCD Display | sw6 | -+ * | | | | -+ * | |-------------------| | -+ * | sw9 sw10 sw11 sw12 sw13 sw14 | -+ * |------------------------------------------------| -+ */ -+ -+ sw1 { -+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; -+ label = "DPAD-UP"; -+ linux,code = ; -+ }; -+ sw2 { -+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; -+ label = "DPAD-DOWN"; -+ linux,code = ; -+ }; -+ sw3 { -+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; -+ label = "DPAD-LEFT"; -+ linux,code = ; -+ }; -+ sw4 { -+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; -+ label = "DPAD-RIGHT"; -+ linux,code = ; -+ }; -+ sw5 { -+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; -+ label = "BTN-A"; -+ linux,code = ; -+ }; -+ sw6 { -+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "BTN-B"; -+ linux,code = ; -+ }; -+ sw7 { -+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; -+ label = "BTN-Y"; -+ linux,code = ; -+ }; -+ sw8 { -+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; -+ label = "BTN-X"; -+ linux,code = ; -+ }; -+ sw9 { -+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; -+ label = "F1"; -+ linux,code = ; -+ }; -+ sw10 { -+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; -+ label = "F2"; -+ linux,code = ; -+ }; -+ sw11 { -+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; -+ label = "F3"; -+ linux,code = ; -+ }; -+ sw12 { -+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; -+ label = "F4"; -+ linux,code = ; -+ }; -+ sw13 { -+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; -+ label = "F5"; -+ linux,code = ; -+ }; -+ sw14 { -+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; -+ label = "F6"; -+ linux,code = ; -+ }; -+ sw15 { -+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; -+ label = "TOP-LEFT"; -+ linux,code = ; -+ }; -+ sw16 { -+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; -+ label = "TOP-RIGHT"; -+ linux,code = ; -+ }; -+ }; -+ -+ leds: gpio-leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "led_pins"; -+ pinctrl-0 = <&led_pins>; -+ -+ led-0 { -+ label = "blue:heartbeat"; -+ gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ vccsys: vccsys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v8_sys"; -+ regulator-always-on; -+ regulator-min-microvolt = <3800000>; -+ regulator-max-microvolt = <3800000>; -+ }; -+ -+ vcc_host: vcc_host { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_host"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ -+ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ regulator-always-on; -+ vin-supply = <&vccsys>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cru { -+ assigned-clocks = <&cru PLL_NPLL>, -+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, -+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, -+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, -+ <&cru PLL_CPLL>; -+ -+ assigned-clock-rates = <1188000000>, -+ <200000000>, <200000000>, -+ <150000000>, <150000000>, -+ <100000000>, <200000000>, -+ <17000000>; -+}; -+ -+&display_subsystem { -+ status = "okay"; -+}; -+ -+&dsi { -+ status = "okay"; -+ -+ ports { -+ mipi_out: port@1 { -+ reg = <1>; -+ -+ mipi_out_panel: endpoint { -+ remote-endpoint = <&mipi_in_panel>; -+ }; -+ }; -+ }; -+ -+ panel@0 { -+ compatible = "elida,kd35t133"; -+ reg = <0>; -+ backlight = <&backlight>; -+ iovcc-supply = <&vcc_lcd>; -+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; -+ vdd-supply = <&vcc_lcd>; -+ -+ port { -+ mipi_in_panel: endpoint { -+ remote-endpoint = <&mipi_out_panel>; -+ }; -+ }; -+ }; -+}; -+ -+&dsi_dphy { -+ status = "okay"; -+}; -+ -+&gpu { -+ mali-supply = <&vdd_logic>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-falling-time-ns = <16>; -+ i2c-scl-rising-time-ns = <280>; -+ status = "okay"; -+ -+ rk817: pmic@20 { -+ compatible = "rockchip,rk817"; -+ reg = <0x20>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ #clock-cells = <1>; -+ clock-output-names = "rk808-clkout1", "xin32k"; -+ -+ vcc1-supply = <&vccsys>; -+ vcc2-supply = <&vccsys>; -+ vcc3-supply = <&vccsys>; -+ vcc4-supply = <&vccsys>; -+ vcc5-supply = <&vccsys>; -+ vcc6-supply = <&vccsys>; -+ vcc7-supply = <&vccsys>; -+ -+ regulators { -+ vdd_logic: DCDC_REG1 { -+ regulator-name = "vdd_logic"; -+ regulator-min-microvolt = <950000>; -+ regulator-max-microvolt = <1150000>; -+ regulator-ramp-delay = <6001>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vdd_arm: DCDC_REG2 { -+ regulator-name = "vdd_arm"; -+ regulator-min-microvolt = <950000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_3v3: DCDC_REG4 { -+ regulator-name = "vcc_3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_1v8: LDO_REG2 { -+ regulator-name = "vcc_1v8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_1v0: LDO_REG3 { -+ regulator-name = "vdd_1v0"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc3v3_pmu: LDO_REG4 { -+ regulator-name = "vcc3v3_pmu"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-name = "vccio_sd"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_sd: LDO_REG6 { -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_bl: LDO_REG7 { -+ regulator-name = "vcc_bl"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_lcd: LDO_REG8 { -+ regulator-name = "vcc_lcd"; -+ regulator-min-microvolt = <2800000>; -+ regulator-max-microvolt = <2800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <2800000>; -+ }; -+ }; -+ -+ vcc_cam: LDO_REG9 { -+ regulator-name = "vcc_cam"; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ -+&i2c1 { -+ clock-frequency = <400000>; -+ status = "okay"; -+}; -+ -+/* I2S 1 Channel Used */ -+&i2s1_2ch { -+ status = "okay"; -+}; -+ -+&io_domains { -+ vccio1-supply = <&vcc_3v3>; -+ vccio2-supply = <&vccio_sd>; -+ vccio3-supply = <&vcc_3v3>; -+ vccio4-supply = <&vcc_3v3>; -+ vccio5-supply = <&vcc_3v3>; -+ vccio6-supply = <&vcc_3v3>; -+ status = "okay"; -+}; -+ -+&pmu_io_domains { -+ pmuio1-supply = <&vcc3v3_pmu>; -+ pmuio2-supply = <&vcc3v3_pmu>; -+ status = "okay"; -+}; -+ -+&pwm1 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcc_1v8>; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ card-detect-delay = <200>; -+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc_sd>; -+ vqmmc-supply = <&vccio_sd>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ status = "okay"; -+}; -+ -+&u2phy { -+ status = "okay"; -+ -+ u2phy_host: host-port { -+ status = "okay"; -+ }; -+ -+ u2phy_otg: otg-port { -+ status = "disabled"; -+ }; -+}; -+ -+&usb20_otg { -+ status = "okay"; -+}; -+ -+/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_xfer &uart1_cts>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2m1_xfer>; -+ status = "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&pinctrl { -+ btns { -+ btn_pins: btn-pins { -+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, -+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ headphone { -+ hp_det: hp-det { -+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ leds { -+ led_pins: led-pins { -+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ dc_det: dc-det { -+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pmic_int: pmic-int { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ soc_slppin_gpio: soc_slppin_gpio { -+ rockchip,pins = -+ <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; -+ }; -+ -+ soc_slppin_rst: soc_slppin_rst { -+ rockchip,pins = -+ <0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>; -+ }; -+ -+ soc_slppin_slp: soc_slppin_slp { -+ rockchip,pins = -+ <0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>; -+ }; -+ }; -+}; - -From dc025cfedd0f62ac1e134e9e9ca26fbd7908a80c Mon Sep 17 00:00:00 2001 -From: Enric Balletbo i Serra -Date: Sun, 26 Apr 2020 18:16:53 +0200 -Subject: [PATCH] drm/rockchip: cdn-dp-core: Make cdn_dp_core_suspend/resume - static -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes the following warning detected when running make with W=1 - - drivers/gpu/drm/rockchip//cdn-dp-core.c:1112:5: warning: no previous - prototype for ‘cdn_dp_suspend’ [-Wmissing-prototypes] - - drivers/gpu/drm/rockchip//cdn-dp-core.c:1126:5: warning: no previous - prototype for ‘cdn_dp_resume’ [-Wmissing-prototypes] - -Signed-off-by: Enric Balletbo i Serra -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200426161653.7710-1-enric.balletbo@collabora.com -(cherry picked from commit 7c49abb4c2f8853520abc05b7f7e8b751fbb3086) ---- - drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c -index eed594bd38d3..4fa00af89cca 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c -@@ -1109,7 +1109,7 @@ static const struct component_ops cdn_dp_component_ops = { - .unbind = cdn_dp_unbind, - }; - --int cdn_dp_suspend(struct device *dev) -+static int cdn_dp_suspend(struct device *dev) - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); - int ret = 0; -@@ -1123,7 +1123,7 @@ int cdn_dp_suspend(struct device *dev) - return ret; - } - --int cdn_dp_resume(struct device *dev) -+static int cdn_dp_resume(struct device *dev) - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); - - -From 85cdd24a6d6765fe011f037f994fce60ed8ca489 Mon Sep 17 00:00:00 2001 -From: Zheng Bin -Date: Fri, 24 Apr 2020 15:44:10 +0800 -Subject: [PATCH] drm/rockchip: Remove unneeded semicolon - -Fixes coccicheck warning: - -drivers/gpu/drm/rockchip/cdn-dp-reg.c:604:2-3: Unneeded semicolon -drivers/gpu/drm/rockchip/cdn-dp-reg.c:622:2-3: Unneeded semicolon -drivers/gpu/drm/rockchip/cdn-dp-reg.c:703:2-3: Unneeded semicolon - -Reported-by: Hulk Robot -Signed-off-by: Zheng Bin -Signed-off-by: Heiko Stuebner -Link: https://patchwork.freedesktop.org/patch/msgid/20200424074410.1070-1-zhengbin13@huawei.com -(cherry picked from commit 611e22b1d9f61a8742c99433de9ff40795574c61) ---- - drivers/gpu/drm/rockchip/cdn-dp-reg.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c -index 7361c07cb4a7..9d2163ef4d6e 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-reg.c -@@ -601,7 +601,7 @@ static int cdn_dp_get_msa_misc(struct video_info *video, - case YCBCR_4_2_0: - val[0] = 5; - break; -- }; -+ } - - switch (video->color_depth) { - case 6: -@@ -619,7 +619,7 @@ static int cdn_dp_get_msa_misc(struct video_info *video, - case 16: - val[1] = 4; - break; -- }; -+ } - - msa_misc = 2 * val[0] + 32 * val[1] + - ((video->color_fmt == Y_ONLY) ? (1 << 14) : 0); -@@ -700,7 +700,7 @@ int cdn_dp_config_video(struct cdn_dp_device *dp) - case 16: - val = BCS_16; - break; -- }; -+ } - - val += video->color_fmt << 8; - ret = cdn_dp_reg_write(dp, DP_FRAMER_PXL_REPR, val); - -From b0d2daf985816c686be9ef0a3ec2fe33d81632c1 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 16 Apr 2020 19:03:20 +0200 -Subject: [PATCH] ARM: dts: rockchip: fix phy nodename for rk3228-evb - -A test with the command below gives for example this error: - -arch/arm/boot/dts/rk3228-evb.dt.yaml: phy@0: -'#phy-cells' is a required property - -The phy nodename is normally used by a phy-handle. -This node is however compatible with -"ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22" -which is just been added to 'ethernet-phy.yaml'. -So change nodename to 'ethernet-phy' for which '#phy-cells' -is not a required property - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Signed-off-by: Heiko Stuebner -Link: https://lore.kernel.org/r/20200416170321.4216-1-jbx6244@gmail.com -(cherry picked from commit 287e0d538fcec2f6e8eb1e565bf0749f3b90186d) ---- - arch/arm/boot/dts/rk3228-evb.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3228-evb.dts b/arch/arm/boot/dts/rk3228-evb.dts -index 5670b33fd1bd..aed879db6c15 100644 ---- a/arch/arm/boot/dts/rk3228-evb.dts -+++ b/arch/arm/boot/dts/rk3228-evb.dts -@@ -46,7 +46,7 @@ - #address-cells = <1>; - #size-cells = <0>; - -- phy: phy@0 { -+ phy: ethernet-phy@0 { - compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - clocks = <&cru SCLK_MAC_PHY>; - -From 9ccfeed2365b9bc93282f2eb2b5f220a621214f4 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Thu, 16 Apr 2020 19:03:21 +0200 -Subject: [PATCH] ARM: dts: rockchip: fix phy nodename for rk3229-xms6 - -A test with the command below gives for example this error: - -arch/arm/boot/dts/rk3229-xms6.dt.yaml: phy@0: -'#phy-cells' is a required property - -The phy nodename is normally used by a phy-handle. -This node is however compatible with -"ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22" -which is just been added to 'ethernet-phy.yaml'. -So change nodename to 'ethernet-phy' for which '#phy-cells' -is not a required property - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ -phy/phy-provider.yaml - -Signed-off-by: Johan Jonker -Signed-off-by: Heiko Stuebner -Link: https://lore.kernel.org/r/20200416170321.4216-2-jbx6244@gmail.com -(cherry picked from commit 621c8d0c233e260232278a4cfd3380caa3c1da29) ---- - arch/arm/boot/dts/rk3229-xms6.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts -index 679fc2b00e5a..933ef69da32a 100644 ---- a/arch/arm/boot/dts/rk3229-xms6.dts -+++ b/arch/arm/boot/dts/rk3229-xms6.dts -@@ -150,7 +150,7 @@ - #address-cells = <1>; - #size-cells = <0>; - -- phy: phy@0 { -+ phy: ethernet-phy@0 { - compatible = "ethernet-phy-id1234.d400", - "ethernet-phy-ieee802.3-c22"; - reg = <0>; - -From 447fc29b3964aa00929572327078e0601eb20755 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 25 Apr 2020 14:23:44 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove extra assigned-clocks property - from &gmac2phy node in rk3328-evb.dts - -There are 2 'assigned-clocks' properties in the '&gmac2phy' -node in 'rk3328-evb.dts', so remove one of them. - -Info from clk-rk3328.c: - -MUXGRF(SCLK_MAC2PHY, "clk_mac2phy", mux_mac2phy_src_p, -CLK_SET_RATE_NO_REPARENT, -RK3328_GRF_MAC_CON2, 10, 1, MFLAGS), - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200425122345.12902-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit f73a28284e2a89a7ca1e10e04514aedd33290c76) ---- - arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -index 6abc6f4a86cf..6ce75f625c6b 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -@@ -82,7 +82,6 @@ - &gmac2phy { - phy-supply = <&vcc_phy>; - clock_in_out = "output"; -- assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; - assigned-clock-rate = <50000000>; - assigned-clocks = <&cru SCLK_MAC2PHY>; - assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; - -From 31b3d20b0ae56dc053a04a27ce389b845bc3c5a4 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 25 Apr 2020 14:23:45 +0200 -Subject: [PATCH] arm64: dts: rockchip: fix status for &gmac2phy in - rk3328-evb.dts - -The status was removed of the '&gmac2phy' node with the apply -of a patch long time ago, so fix status for '&gmac2phy' -in 'rk3328-evb.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200425122345.12902-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit c617ed88502d0b05149e7f32f3b3fd8a0663f7e2) ---- - arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -index 6ce75f625c6b..ac29c2744d08 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts -@@ -85,7 +85,7 @@ - assigned-clock-rate = <50000000>; - assigned-clocks = <&cru SCLK_MAC2PHY>; - assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; -- -+ status = "okay"; - }; - - &i2c1 { - -From b10a4d53c72c7d02a7e8dab19f74f7d024c92628 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 25 Apr 2020 16:38:37 +0200 -Subject: [PATCH] arm64: dts: rockchip: swap interrupts interrupt-names rk3399 - gpu node - -Dts files with Rockchip rk3399 'gpu' nodes were manually verified. -In order to automate this process arm,mali-midgard.txt -has been converted to yaml. In the new setup dtbs_check with -arm,mali-midgard.yaml expects interrupts and interrupt-names values -in the same order. Fix this for rk3399. - -make ARCH=arm64 dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/ -arm,mali-midgard.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit c604fd810bda667bdc20b2c041917baa7803e0fb) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 90c27723cec5..1448f358ed0a 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1881,10 +1881,10 @@ - gpu: gpu@ff9a0000 { - compatible = "rockchip,rk3399-mali", "arm,mali-t860"; - reg = <0x0 0xff9a0000 0x0 0x10000>; -- interrupts = , -- , -- ; -- interrupt-names = "gpu", "job", "mmu"; -+ interrupts = , -+ , -+ ; -+ interrupt-names = "job", "mmu", "gpu"; - clocks = <&cru ACLK_GPU>; - #cooling-cells = <2>; - power-domains = <&power RK3399_PD_GPU>; - -From ab682e9e28fe2cf52bf18fd3b966f8ad70d23162 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Sat, 25 Apr 2020 21:25:00 +0200 -Subject: [PATCH] ARM: dts: rockchip: swap clock-names of gpu nodes - -Dts files with Rockchip 'gpu' nodes were manually verified. -In order to automate this process arm,mali-utgard.txt -has been converted to yaml. In the new setup dtbs_check with -arm,mali-utgard.yaml expects clock-names values -in the same order, so fix that. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200425192500.1808-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit b14f3898d2c25a9b47a61fb879d0b1f3af92c59b) ---- - arch/arm/boot/dts/rk3036.dtsi | 2 +- - arch/arm/boot/dts/rk322x.dtsi | 2 +- - arch/arm/boot/dts/rk3xxx.dtsi | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi -index 781ac7583522..d9a0c9a29b68 100644 ---- a/arch/arm/boot/dts/rk3036.dtsi -+++ b/arch/arm/boot/dts/rk3036.dtsi -@@ -128,7 +128,7 @@ - assigned-clocks = <&cru SCLK_GPU>; - assigned-clock-rates = <100000000>; - clocks = <&cru SCLK_GPU>, <&cru SCLK_GPU>; -- clock-names = "core", "bus"; -+ clock-names = "bus", "core"; - resets = <&cru SRST_GPU>; - status = "disabled"; - }; -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index 06172ebbf0ce..ca95a4065aec 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -555,7 +555,7 @@ - "pp1", - "ppmmu1"; - clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; -- clock-names = "core", "bus"; -+ clock-names = "bus", "core"; - resets = <&cru SRST_GPU_A>; - status = "disabled"; - }; -diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi -index f9fcb7e9657b..d929b60517ab 100644 ---- a/arch/arm/boot/dts/rk3xxx.dtsi -+++ b/arch/arm/boot/dts/rk3xxx.dtsi -@@ -84,7 +84,7 @@ - compatible = "arm,mali-400"; - reg = <0x10090000 0x10000>; - clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; -- clock-names = "core", "bus"; -+ clock-names = "bus", "core"; - assigned-clocks = <&cru ACLK_GPU>; - assigned-clock-rates = <100000000>; - resets = <&cru SRST_GPU>; - -From fc9297440088a6a977bce327e7794cbddbecf1f7 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 24 Apr 2020 17:55:59 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node - of rk3399-pinebook-pro.dts - -The '#sound-dai-cells' property is already defined in rk3399.dtsi -at the 'i2s1' node, so remove it from the '&i2s1' node in -'rk3399-pinebook-pro.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200424155600.24254-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit e565dd298c6bc9f53f0b07d96b019e000777c1fe) ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index 294d21bf45f5..8fae334356a2 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -743,7 +743,6 @@ - }; - - &i2s1 { -- #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; - rockchip,capture-channels = <8>; - -From 515f58b5fb38d9b261df464fb336ef847c5e8a3a Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 24 Apr 2020 17:56:00 +0200 -Subject: [PATCH] arm64: dts: rockchip: remove #sound-dai-cells from &spdif - node of rk3399-hugsun-x99.dts - -The '#sound-dai-cells' property is already defined in rk3399.dtsi -at the 'spdif' node, so remove it from the '&spdif' node in -'rk3399-hugsun-x99.dts'. - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200424155600.24254-2-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit de70083cbaabb86c282f421b070b041236ba6f4b) ---- - arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -index aee484a05181..4b4a38e59283 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts -@@ -633,7 +633,6 @@ - &spdif { - status = "okay"; - pinctrl-0 = <&spdif_bus_1>; -- #sound-dai-cells = <0>; - }; - - &spi1 { - -From 1e162c08c61b06e3e747a7e1d50aed15d8626a98 Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Fri, 24 Apr 2020 14:56:19 +0100 -Subject: [PATCH] arm64: dts: rockchip: Fix Pinebook Pro FUSB302 interrupt - -Although the FUSB302 driver has apparently supported the "fcs,int_n" -property since the beginning, the DT binding has never documented it, -and in fact defines a standard "interrupts" property as required. It's -also questionable whether the GPIO specifier with GPIO_ACTIVE_HIGH is -even correct, since the FUSB302 datasheet says INT_N is an "Active-LOW -open-drain interrupt output", and the Pinebook Pro schematic shows it -wired directly to the GPIO pin. - -Just use the standard property like all the other RK3399 boards sharing -the same design. - -Signed-off-by: Robin Murphy -Link: https://lore.kernel.org/r/f731122c5ccde4e3d6d149a9d7bf01708b4279f7.1587736459.git.robin.murphy@arm.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 89ee3ace7292d94539aae156fb6fee65460b8bc0) ---- - arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -index 8fae334356a2..d44c73521218 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts -@@ -690,7 +690,8 @@ - fusb0: fusb30x@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; -- fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; -+ interrupt-parent = <&gpio1>; -+ interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&fusb0_int_gpio>; - vbus-supply = <&vbus_typec>; - -From 1badacb67758dc199cd45ffed030e6a50b1607d9 Mon Sep 17 00:00:00 2001 -From: Johan Jonker -Date: Fri, 24 Apr 2020 14:39:23 +0200 -Subject: [PATCH] ARM: dts: rockchip: fix pinctrl sub nodename for spi in - rk322x.dtsi - -A test with the command below gives these errors: - -arch/arm/boot/dts/rk3229-evb.dt.yaml: spi-0: -'#address-cells' is a required property -arch/arm/boot/dts/rk3229-evb.dt.yaml: spi-1: -'#address-cells' is a required property -arch/arm/boot/dts/rk3229-xms6.dt.yaml: spi-0: -'#address-cells' is a required property -arch/arm/boot/dts/rk3229-xms6.dt.yaml: spi-1: -'#address-cells' is a required property - -The $nodename pattern for spi nodes is -"^spi(@.*|-[0-9a-f])*$". To prevent warnings rename -'spi-0' and 'spi-1' pinctrl sub nodenames to -'spi0' and 'spi1' in 'rk322x.dtsi'. - -make ARCH=arm dtbs_check -DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/spi-controller.yaml - -Signed-off-by: Johan Jonker -Link: https://lore.kernel.org/r/20200424123923.8192-1-jbx6244@gmail.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit 855bdca1781c79eb661f89c8944c4a719ce720e8) ---- - arch/arm/boot/dts/rk322x.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi -index ca95a4065aec..5485a9918da6 100644 ---- a/arch/arm/boot/dts/rk322x.dtsi -+++ b/arch/arm/boot/dts/rk322x.dtsi -@@ -1020,7 +1020,7 @@ - }; - }; - -- spi-0 { -+ spi0 { - spi0_clk: spi0-clk { - rockchip,pins = <0 RK_PB1 2 &pcfg_pull_up>; - }; -@@ -1038,7 +1038,7 @@ - }; - }; - -- spi-1 { -+ spi1 { - spi1_clk: spi1-clk { - rockchip,pins = <0 RK_PC7 2 &pcfg_pull_up>; - }; - -From ed1080bd1bddc67ced3a01468d47b7224ab4c611 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 3 Apr 2020 19:13:45 -0300 -Subject: [PATCH] arm64: dts: rockchip: Define the rockchip Video Decoder node - on rk3399 - -RK3399 has a Video decoder, define the node in the dtsi. We also add -the missing power-domain in mmu node and enable the block. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Link: https://lore.kernel.org/r/20200403221345.16702-6-ezequiel@collabora.com -Signed-off-by: Heiko Stuebner -(cherry picked from commit cbd7214402ecf7ecc59e21862ea3c901be48e831) ---- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 +++++++++++++- - 1 file changed, 13 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -index 1448f358ed0a..de53f145c4fa 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1269,6 +1269,18 @@ - power-domains = <&power RK3399_PD_VCODEC>; - }; - -+ vdec: video-codec@ff660000 { -+ compatible = "rockchip,rk3399-vdec"; -+ reg = <0x0 0xff660000 0x0 0x400>; -+ interrupts = ; -+ interrupt-names = "vdpu"; -+ clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, -+ <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; -+ clock-names = "axi", "ahb", "cabac", "core"; -+ iommus = <&vdec_mmu>; -+ power-domains = <&power RK3399_PD_VDU>; -+ }; -+ - vdec_mmu: iommu@ff660480 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; -@@ -1276,8 +1288,8 @@ - interrupt-names = "vdec_mmu"; - clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; - clock-names = "aclk", "iface"; -+ power-domains = <&power RK3399_PD_VDU>; - #iommu-cells = <0>; -- status = "disabled"; - }; - - iep_mmu: iommu@ff670800 { diff --git a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.7.patch b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.7.patch deleted file mode 100644 index d305af6965..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.7.patch +++ /dev/null @@ -1,1555 +0,0 @@ -From 65ae268d0fe4e36470530427b6ceda4520757294 Mon Sep 17 00:00:00 2001 -From: Hirokazu Honda -Date: Fri, 22 Nov 2019 06:16:08 +0100 -Subject: [PATCH] media: hantro: Support H264 profile control - -The Hantro G1 decoder supports H.264 profiles from Baseline to High, with -the exception of the Extended profile. - -Expose the V4L2_CID_MPEG_VIDEO_H264_PROFILE control, so that the -applications can query the driver for the list of supported profiles. - -Signed-off-by: Hirokazu Honda -Reviewed-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 858eff03578c621728d219acfcc96b64938b0350) ---- - drivers/staging/media/hantro/hantro_drv.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index c98835326135..ca8b133e2e46 100644 ---- a/drivers/staging/media/hantro/hantro_drv.c -+++ b/drivers/staging/media/hantro/hantro_drv.c -@@ -361,6 +361,16 @@ static const struct hantro_ctrl controls[] = { - .def = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, - .max = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, - }, -+ }, { -+ .codec = HANTRO_H264_DECODER, -+ .cfg = { -+ .id = V4L2_CID_MPEG_VIDEO_H264_PROFILE, -+ .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, -+ .max = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, -+ .menu_skip_mask = -+ BIT(V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED), -+ .def = V4L2_MPEG_VIDEO_H264_PROFILE_MAIN, -+ } - }, { - }, - }; - -From fa5b68fc7ad885d769cc2929760efcede9ad6372 Mon Sep 17 00:00:00 2001 -From: Hans Verkuil -Date: Mon, 3 Feb 2020 12:41:09 +0100 -Subject: [PATCH] media: rename VFL_TYPE_GRABBER to _VIDEO - -We currently have the following devnode types: - -enum vfl_devnode_type { - VFL_TYPE_GRABBER = 0, - VFL_TYPE_VBI, - VFL_TYPE_RADIO, - VFL_TYPE_SUBDEV, - VFL_TYPE_SDR, - VFL_TYPE_TOUCH, - VFL_TYPE_MAX /* Shall be the last one */ -}; - -They all make sense, except for the first: GRABBER really refers to /dev/videoX -devices, which can be capture, output or m2m, so 'grabber' doesn't even refer to -their function anymore. - -Let's call a spade a spade and rename this to VFL_TYPE_VIDEO. - -Signed-off-by: Hans Verkuil -Acked-by: Sakari Ailus -Reviewed-by: Laurent Pinchart -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 238e4a5baa361256ae1641ad9455bb2bb359273f) ---- - Documentation/media/kapi/v4l2-dev.rst | 4 ++-- - .../translations/zh_CN/video4linux/v4l2-framework.txt | 4 ++-- - drivers/media/v4l2-core/v4l2-dev.c | 10 +++++----- - drivers/media/v4l2-core/v4l2-ioctl.c | 4 ++-- - include/media/v4l2-dev.h | 6 ++++-- - samples/v4l/v4l2-pci-skeleton.c | 2 +- - 6 files changed, 16 insertions(+), 14 deletions(-) - -diff --git a/Documentation/media/kapi/v4l2-dev.rst b/Documentation/media/kapi/v4l2-dev.rst -index 4c5a15c53dbf..63c064837c00 100644 ---- a/Documentation/media/kapi/v4l2-dev.rst -+++ b/Documentation/media/kapi/v4l2-dev.rst -@@ -185,7 +185,7 @@ This will create the character device for you. - - .. code-block:: c - -- err = video_register_device(vdev, VFL_TYPE_GRABBER, -1); -+ err = video_register_device(vdev, VFL_TYPE_VIDEO, -1); - if (err) { - video_device_release(vdev); /* or kfree(my_vdev); */ - return err; -@@ -201,7 +201,7 @@ types exist: - ========================== ==================== ============================== - :c:type:`vfl_devnode_type` Device name Usage - ========================== ==================== ============================== --``VFL_TYPE_GRABBER`` ``/dev/videoX`` for video input/output devices -+``VFL_TYPE_VIDEO`` ``/dev/videoX`` for video input/output devices - ``VFL_TYPE_VBI`` ``/dev/vbiX`` for vertical blank data (i.e. - closed captions, teletext) - ``VFL_TYPE_RADIO`` ``/dev/radioX`` for radio tuners -diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt -index 66c7c568bd86..9c39ee58ea50 100644 ---- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt -+++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt -@@ -649,7 +649,7 @@ video_device注册 - - 接下来你需要注册视频设备：这会为你创建一个字符设备。 - -- err = video_register_device(vdev, VFL_TYPE_GRABBER, -1); -+ err = video_register_device(vdev, VFL_TYPE_VIDEO, -1); - if (err) { - video_device_release(vdev); /* or kfree(my_vdev); */ - return err; -@@ -660,7 +660,7 @@ video_device注册 - - 注册哪种设备是根据类型（type）参数。存在以下类型： - --VFL_TYPE_GRABBER: 用于视频输入/输出设备的 videoX -+VFL_TYPE_VIDEO: 用于视频输入/输出设备的 videoX - VFL_TYPE_VBI: 用于垂直消隐数据的 vbiX (例如，隐藏式字幕，图文电视) - VFL_TYPE_RADIO: 用于广播调谐器的 radioX - -diff --git a/drivers/media/v4l2-core/v4l2-dev.c b/drivers/media/v4l2-core/v4l2-dev.c -index da42d172714a..97b6a3af1361 100644 ---- a/drivers/media/v4l2-core/v4l2-dev.c -+++ b/drivers/media/v4l2-core/v4l2-dev.c -@@ -542,13 +542,13 @@ static void determine_valid_ioctls(struct video_device *vdev) - V4L2_CAP_META_OUTPUT; - DECLARE_BITMAP(valid_ioctls, BASE_VIDIOC_PRIVATE); - const struct v4l2_ioctl_ops *ops = vdev->ioctl_ops; -- bool is_vid = vdev->vfl_type == VFL_TYPE_GRABBER && -+ bool is_vid = vdev->vfl_type == VFL_TYPE_VIDEO && - (vdev->device_caps & vid_caps); - bool is_vbi = vdev->vfl_type == VFL_TYPE_VBI; - bool is_radio = vdev->vfl_type == VFL_TYPE_RADIO; - bool is_sdr = vdev->vfl_type == VFL_TYPE_SDR; - bool is_tch = vdev->vfl_type == VFL_TYPE_TOUCH; -- bool is_meta = vdev->vfl_type == VFL_TYPE_GRABBER && -+ bool is_meta = vdev->vfl_type == VFL_TYPE_VIDEO && - (vdev->device_caps & meta_caps); - bool is_rx = vdev->vfl_dir != VFL_DIR_TX; - bool is_tx = vdev->vfl_dir != VFL_DIR_RX; -@@ -783,7 +783,7 @@ static int video_register_media_controller(struct video_device *vdev) - vdev->entity.function = MEDIA_ENT_F_UNKNOWN; - - switch (vdev->vfl_type) { -- case VFL_TYPE_GRABBER: -+ case VFL_TYPE_VIDEO: - intf_type = MEDIA_INTF_T_V4L_VIDEO; - vdev->entity.function = MEDIA_ENT_F_IO_V4L; - break; -@@ -891,7 +891,7 @@ int __video_register_device(struct video_device *vdev, - - /* Part 1: check device type */ - switch (type) { -- case VFL_TYPE_GRABBER: -+ case VFL_TYPE_VIDEO: - name_base = "video"; - break; - case VFL_TYPE_VBI: -@@ -935,7 +935,7 @@ int __video_register_device(struct video_device *vdev, - * of 128-191 and just pick the first free minor there - * (new style). */ - switch (type) { -- case VFL_TYPE_GRABBER: -+ case VFL_TYPE_VIDEO: - minor_offset = 0; - minor_cnt = 64; - break; -diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c -index aaf83e254272..fbcc7a20eedf 100644 ---- a/drivers/media/v4l2-core/v4l2-ioctl.c -+++ b/drivers/media/v4l2-core/v4l2-ioctl.c -@@ -941,12 +941,12 @@ static int check_fmt(struct file *file, enum v4l2_buf_type type) - V4L2_CAP_META_OUTPUT; - struct video_device *vfd = video_devdata(file); - const struct v4l2_ioctl_ops *ops = vfd->ioctl_ops; -- bool is_vid = vfd->vfl_type == VFL_TYPE_GRABBER && -+ bool is_vid = vfd->vfl_type == VFL_TYPE_VIDEO && - (vfd->device_caps & vid_caps); - bool is_vbi = vfd->vfl_type == VFL_TYPE_VBI; - bool is_sdr = vfd->vfl_type == VFL_TYPE_SDR; - bool is_tch = vfd->vfl_type == VFL_TYPE_TOUCH; -- bool is_meta = vfd->vfl_type == VFL_TYPE_GRABBER && -+ bool is_meta = vfd->vfl_type == VFL_TYPE_VIDEO && - (vfd->device_caps & meta_caps); - bool is_rx = vfd->vfl_dir != VFL_DIR_TX; - bool is_tx = vfd->vfl_dir != VFL_DIR_RX; -diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h -index 48531e57cc5a..5e7c0f8acd05 100644 ---- a/include/media/v4l2-dev.h -+++ b/include/media/v4l2-dev.h -@@ -24,7 +24,8 @@ - /** - * enum vfl_devnode_type - type of V4L2 device node - * -- * @VFL_TYPE_GRABBER: for video input/output devices -+ * @VFL_TYPE_VIDEO: for video input/output devices -+ * @VFL_TYPE_GRABBER: deprecated, same as VFL_TYPE_VIDEO - * @VFL_TYPE_VBI: for vertical blank data (i.e. closed captions, teletext) - * @VFL_TYPE_RADIO: for radio tuners - * @VFL_TYPE_SUBDEV: for V4L2 subdevices -@@ -33,7 +34,8 @@ - * @VFL_TYPE_MAX: number of VFL types, must always be last in the enum - */ - enum vfl_devnode_type { -- VFL_TYPE_GRABBER = 0, -+ VFL_TYPE_VIDEO, -+ VFL_TYPE_GRABBER = VFL_TYPE_VIDEO, - VFL_TYPE_VBI, - VFL_TYPE_RADIO, - VFL_TYPE_SUBDEV, -diff --git a/samples/v4l/v4l2-pci-skeleton.c b/samples/v4l/v4l2-pci-skeleton.c -index f6a551bd57ef..3fa6582b4a68 100644 ---- a/samples/v4l/v4l2-pci-skeleton.c -+++ b/samples/v4l/v4l2-pci-skeleton.c -@@ -879,7 +879,7 @@ static int skeleton_probe(struct pci_dev *pdev, const struct pci_device_id *ent) - vdev->tvnorms = SKEL_TVNORMS; - video_set_drvdata(vdev, skel); - -- ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); -+ ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); - if (ret) - goto free_hdl; - - -From cb4f585d3c48529eea7f789ff1292e9661b10423 Mon Sep 17 00:00:00 2001 -From: Andrzej Pietrasiewicz -Date: Mon, 27 Jan 2020 15:30:07 +0100 -Subject: [PATCH] media: hantro: Use standard luma quantization table - -The table is actually different in the document than in this file, so align -this file with the document. - -Signed-off-by: Andrzej Pietrasiewicz -Tested-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 801fccf48940c6733aad922f7b9e81f6d7f84cf6) ---- - drivers/staging/media/hantro/hantro_jpeg.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_jpeg.c b/drivers/staging/media/hantro/hantro_jpeg.c -index 125eb41f2ede..d3b381d00b23 100644 ---- a/drivers/staging/media/hantro/hantro_jpeg.c -+++ b/drivers/staging/media/hantro/hantro_jpeg.c -@@ -23,17 +23,17 @@ - #define HUFF_CHROMA_AC_OFF 409 - - /* Default tables from JPEG ITU-T.81 -- * (ISO/IEC 10918-1) Annex K.3, I -+ * (ISO/IEC 10918-1) Annex K, tables K.1 and K.2 - */ - static const unsigned char luma_q_table[] = { -- 0x10, 0x0b, 0x0a, 0x10, 0x7c, 0x8c, 0x97, 0xa1, -- 0x0c, 0x0c, 0x0e, 0x13, 0x7e, 0x9e, 0xa0, 0x9b, -- 0x0e, 0x0d, 0x10, 0x18, 0x8c, 0x9d, 0xa9, 0x9c, -- 0x0e, 0x11, 0x16, 0x1d, 0x97, 0xbb, 0xb4, 0xa2, -- 0x12, 0x16, 0x25, 0x38, 0xa8, 0x6d, 0x67, 0xb1, -- 0x18, 0x23, 0x37, 0x40, 0xb5, 0x68, 0x71, 0xc0, -+ 0x10, 0x0b, 0x0a, 0x10, 0x18, 0x28, 0x33, 0x3d, -+ 0x0c, 0x0c, 0x0e, 0x13, 0x1a, 0x3a, 0x3c, 0x37, -+ 0x0e, 0x0d, 0x10, 0x18, 0x28, 0x39, 0x45, 0x38, -+ 0x0e, 0x11, 0x16, 0x1d, 0x33, 0x57, 0x50, 0x3e, -+ 0x12, 0x16, 0x25, 0x38, 0x44, 0x6d, 0x67, 0x4d, -+ 0x18, 0x23, 0x37, 0x40, 0x51, 0x68, 0x71, 0x5c, - 0x31, 0x40, 0x4e, 0x57, 0x67, 0x79, 0x78, 0x65, -- 0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0xc7, -+ 0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0x63 - }; - - static const unsigned char chroma_q_table[] = { - -From c66796788e68145a9ad54d24950bc7113ab58355 Mon Sep 17 00:00:00 2001 -From: Andrzej Pietrasiewicz -Date: Mon, 27 Jan 2020 15:30:08 +0100 -Subject: [PATCH] media: hantro: Write the quantization tables in proper order - -The quantization tables as defined in the file (luma_q_table, -chroma_q_table) are in fact in linear order. The JPEG file header, which is -not generated by the hardware, but must be programatically created with the -CPU, expects the table in zigzag order. On the other hand, the hardware -doesn't expect neither linear, nor zigzag order. Instead it expects the -quantization tables in vertical groups of four quantization parameters, -and the groups are organized in blocks of two vertically adjacent groups. -On top of that the blocks must be provided to the hardware in this order: -leftmost top block, leftmost bottom block, second leftmost top block, -second leftmost bottom block and so on. So, if this is the quantization -table in linear order: - -0x10, 0x0b, 0x0a, 0x10, 0x18, 0x28, 0x33, 0x3d, -0x0c, 0x0c, 0x0e, 0x13, 0x1a, 0x3a, 0x3c, 0x37, -0x0e, 0x0d, 0x10, 0x18, 0x28, 0x39, 0x45, 0x38, -0x0e, 0x11, 0x16, 0x1d, 0x33, 0x57, 0x50, 0x3e, -0x12, 0x16, 0x25, 0x38, 0x44, 0x6d, 0x67, 0x4d, -0x18, 0x23, 0x37, 0x40, 0x51, 0x68, 0x71, 0x5c, -0x31, 0x40, 0x4e, 0x57, 0x67, 0x79, 0x78, 0x65, -0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0x63 - -then the hardware expects this in its consecutive registers: - -0x100c0e0e, -0x0b0c0d11, -0x12183148, -0x1623405c, -0x0a0e1016, -0x1013181d, -0x25374e5f, -0x38405762, - -and so on. - -Consequently, the same area of memory cannot be used both for dumping it -into the JPEG file header and writing its contents to the hardware -registers. Instead, a separate pair of arrays is added for properly -reordered quantization tables, to be read with get_unaligned_be32() -and linearly written to the registers. - -The "ctx" parameter is not needed any more for hantro_jpeg_get_qtable(). - -Signed-off-by: Andrzej Pietrasiewicz -Tested-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 85bdcb7eaae7c39dba9420de6df1cb227cf05732) ---- - drivers/staging/media/hantro/hantro_h1_jpeg_enc.c | 4 +- - drivers/staging/media/hantro/hantro_jpeg.c | 60 +++++++++++++++++----- - drivers/staging/media/hantro/hantro_jpeg.h | 2 +- - .../staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c | 9 ++-- - 4 files changed, 55 insertions(+), 20 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c -index 4f72d92cd98f..f62ab96078c6 100644 ---- a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c -+++ b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c -@@ -108,8 +108,8 @@ void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx) - hantro_h1_set_src_img_ctrl(vpu, ctx); - hantro_h1_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); - hantro_h1_jpeg_enc_set_qtable(vpu, -- hantro_jpeg_get_qtable(&jpeg_ctx, 0), -- hantro_jpeg_get_qtable(&jpeg_ctx, 1)); -+ hantro_jpeg_get_qtable(0), -+ hantro_jpeg_get_qtable(1)); - - reg = H1_REG_AXI_CTRL_OUTPUT_SWAP16 - | H1_REG_AXI_CTRL_INPUT_SWAP16 -diff --git a/drivers/staging/media/hantro/hantro_jpeg.c b/drivers/staging/media/hantro/hantro_jpeg.c -index d3b381d00b23..36c140fc6a36 100644 ---- a/drivers/staging/media/hantro/hantro_jpeg.c -+++ b/drivers/staging/media/hantro/hantro_jpeg.c -@@ -36,6 +36,8 @@ static const unsigned char luma_q_table[] = { - 0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0x63 - }; - -+static unsigned char luma_q_table_reordered[ARRAY_SIZE(luma_q_table)]; -+ - static const unsigned char chroma_q_table[] = { - 0x11, 0x12, 0x18, 0x2f, 0x63, 0x63, 0x63, 0x63, - 0x12, 0x15, 0x1a, 0x42, 0x63, 0x63, 0x63, 0x63, -@@ -47,6 +49,30 @@ static const unsigned char chroma_q_table[] = { - 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63 - }; - -+static unsigned char chroma_q_table_reordered[ARRAY_SIZE(chroma_q_table)]; -+ -+static const unsigned char zigzag[64] = { -+ 0, 1, 8, 16, 9, 2, 3, 10, -+ 17, 24, 32, 25, 18, 11, 4, 5, -+ 12, 19, 26, 33, 40, 48, 41, 34, -+ 27, 20, 13, 6, 7, 14, 21, 28, -+ 35, 42, 49, 56, 57, 50, 43, 36, -+ 29, 22, 15, 23, 30, 37, 44, 51, -+ 58, 59, 52, 45, 38, 31, 39, 46, -+ 53, 60, 61, 54, 47, 55, 62, 63 -+}; -+ -+static const u32 hw_reorder[64] = { -+ 0, 8, 16, 24, 1, 9, 17, 25, -+ 32, 40, 48, 56, 33, 41, 49, 57, -+ 2, 10, 18, 26, 3, 11, 19, 27, -+ 34, 42, 50, 58, 35, 43, 51, 59, -+ 4, 12, 20, 28, 5, 13, 21, 29, -+ 36, 44, 52, 60, 37, 45, 53, 61, -+ 6, 14, 22, 30, 7, 15, 23, 31, -+ 38, 46, 54, 62, 39, 47, 55, 63 -+}; -+ - /* Huffman tables are shared with CODA */ - static const unsigned char luma_dc_table[] = { - 0x00, 0x01, 0x05, 0x01, 0x01, 0x01, 0x01, 0x01, -@@ -225,20 +251,29 @@ static const unsigned char hantro_jpeg_header[JPEG_HEADER_SIZE] = { - 0x11, 0x03, 0x11, 0x00, 0x3f, 0x00, - }; - -+static unsigned char jpeg_scale_qp(const unsigned char qp, int scale) -+{ -+ unsigned int temp; -+ -+ temp = DIV_ROUND_CLOSEST((unsigned int)qp * scale, 100); -+ if (temp <= 0) -+ temp = 1; -+ if (temp > 255) -+ temp = 255; -+ -+ return (unsigned char)temp; -+} -+ - static void --jpeg_scale_quant_table(unsigned char *q_tab, -+jpeg_scale_quant_table(unsigned char *file_q_tab, -+ unsigned char *reordered_q_tab, - const unsigned char *tab, int scale) - { -- unsigned int temp; - int i; - - for (i = 0; i < 64; i++) { -- temp = DIV_ROUND_CLOSEST((unsigned int)tab[i] * scale, 100); -- if (temp <= 0) -- temp = 1; -- if (temp > 255) -- temp = 255; -- q_tab[i] = (unsigned char)temp; -+ file_q_tab[i] = jpeg_scale_qp(tab[zigzag[i]], scale); -+ reordered_q_tab[i] = jpeg_scale_qp(tab[hw_reorder[i]], scale); - } - } - -@@ -256,17 +291,18 @@ static void jpeg_set_quality(unsigned char *buffer, int quality) - scale = 200 - 2 * quality; - - jpeg_scale_quant_table(buffer + LUMA_QUANT_OFF, -+ luma_q_table_reordered, - luma_q_table, scale); - jpeg_scale_quant_table(buffer + CHROMA_QUANT_OFF, -+ chroma_q_table_reordered, - chroma_q_table, scale); - } - --unsigned char * --hantro_jpeg_get_qtable(struct hantro_jpeg_ctx *ctx, int index) -+unsigned char *hantro_jpeg_get_qtable(int index) - { - if (index == 0) -- return ctx->buffer + LUMA_QUANT_OFF; -- return ctx->buffer + CHROMA_QUANT_OFF; -+ return luma_q_table_reordered; -+ return chroma_q_table_reordered; - } - - void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx) -diff --git a/drivers/staging/media/hantro/hantro_jpeg.h b/drivers/staging/media/hantro/hantro_jpeg.h -index 9e8397c71388..9474a00277f8 100644 ---- a/drivers/staging/media/hantro/hantro_jpeg.h -+++ b/drivers/staging/media/hantro/hantro_jpeg.h -@@ -9,5 +9,5 @@ struct hantro_jpeg_ctx { - unsigned char *buffer; - }; - --unsigned char *hantro_jpeg_get_qtable(struct hantro_jpeg_ctx *ctx, int index); -+unsigned char *hantro_jpeg_get_qtable(int index); - void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx); -diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c b/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c -index a85c4f9fd10a..d248979908c3 100644 ---- a/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c -+++ b/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c -@@ -18,9 +18,8 @@ - * - * Quantization luma table values are written to registers - * VEPU_swreg_0-VEPU_swreg_15, and chroma table values to -- * VEPU_swreg_16-VEPU_swreg_31. -- * -- * JPEG zigzag order is expected on the quantization tables. -+ * VEPU_swreg_16-VEPU_swreg_31. A special order is needed, neither -+ * zigzag, nor linear. - */ - - #include -@@ -139,8 +138,8 @@ void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx) - rk3399_vpu_set_src_img_ctrl(vpu, ctx); - rk3399_vpu_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); - rk3399_vpu_jpeg_enc_set_qtable(vpu, -- hantro_jpeg_get_qtable(&jpeg_ctx, 0), -- hantro_jpeg_get_qtable(&jpeg_ctx, 1)); -+ hantro_jpeg_get_qtable(0), -+ hantro_jpeg_get_qtable(1)); - - reg = VEPU_REG_OUTPUT_SWAP32 - | VEPU_REG_OUTPUT_SWAP16 - -From 15aea2f74cb178f3b61d00bab1512495ba24a7df Mon Sep 17 00:00:00 2001 -From: Andrzej Pietrasiewicz -Date: Mon, 27 Jan 2020 15:30:09 +0100 -Subject: [PATCH] media: hantro: Write quantization table registers in - increasing addresses order - -Luma and chroma qtables need to be written into two 16-register blocks, -each table consisting of 64 bytes total. The blocks are contiguous and -start at offset 0 for luma and at offset 0x40 for chroma. - -The seemingly innocent optimization of writing the two blocks using one -loop causes side effects which result in improper values of quantization -tables being used by the hardware during encoding. Visually this results -in macroblocking artifacts around contrasting edges in encoded images. The -artifacts look like horizontally flipped shadows of the said edges. -Changing the write operations to non-relaxed variant doesn't help. - -This patch removes this premature optimization and after this change the -macroblocking artifacts around contrasting edges are gone. - -Signed-off-by: Andrzej Pietrasiewicz -Tested-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 1b3bb574569e5fe5aeb0a9c73848430b7e271c20) ---- - drivers/staging/media/hantro/hantro_h1_jpeg_enc.c | 6 ++++++ - drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c | 6 ++++++ - 2 files changed, 12 insertions(+) - -diff --git a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c -index f62ab96078c6..b22418436823 100644 ---- a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c -+++ b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c -@@ -73,10 +73,16 @@ hantro_h1_jpeg_enc_set_qtable(struct hantro_dev *vpu, - luma_qtable_p = (__be32 *)luma_qtable; - chroma_qtable_p = (__be32 *)chroma_qtable; - -+ /* -+ * Quantization table registers must be written in contiguous blocks. -+ * DO NOT collapse the below two "for" loops into one. -+ */ - for (i = 0; i < H1_JPEG_QUANT_TABLE_COUNT; i++) { - reg = get_unaligned_be32(&luma_qtable_p[i]); - vepu_write_relaxed(vpu, reg, H1_REG_JPEG_LUMA_QUAT(i)); -+ } - -+ for (i = 0; i < H1_JPEG_QUANT_TABLE_COUNT; i++) { - reg = get_unaligned_be32(&chroma_qtable_p[i]); - vepu_write_relaxed(vpu, reg, H1_REG_JPEG_CHROMA_QUAT(i)); - } -diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c b/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c -index d248979908c3..3498e6124acd 100644 ---- a/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c -+++ b/drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c -@@ -103,10 +103,16 @@ rk3399_vpu_jpeg_enc_set_qtable(struct hantro_dev *vpu, - luma_qtable_p = (__be32 *)luma_qtable; - chroma_qtable_p = (__be32 *)chroma_qtable; - -+ /* -+ * Quantization table registers must be written in contiguous blocks. -+ * DO NOT collapse the below two "for" loops into one. -+ */ - for (i = 0; i < VEPU_JPEG_QUANT_TABLE_COUNT; i++) { - reg = get_unaligned_be32(&luma_qtable_p[i]); - vepu_write_relaxed(vpu, reg, VEPU_REG_JPEG_LUMA_QUAT(i)); -+ } - -+ for (i = 0; i < VEPU_JPEG_QUANT_TABLE_COUNT; i++) { - reg = get_unaligned_be32(&chroma_qtable_p[i]); - vepu_write_relaxed(vpu, reg, VEPU_REG_JPEG_CHROMA_QUAT(i)); - } - -From ed202f83aba7970cd283c7d0e2b4e66984e42d0c Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Wed, 29 Jan 2020 22:06:08 +0100 -Subject: [PATCH] media: hantro: Prevent encoders from using post-processing - -The post-processing feature is meant to be used by decoding -only. Prevent encoding jobs from enabling it. - -Fixes: 8c2d66b036c77 ("media: hantro: Support color conversion via post-processing") -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 986eee3a5234fa43b94928f63b9fd8b513cd96e7) ---- - drivers/staging/media/hantro/hantro.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h -index b0faa43b3f79..327ddef45345 100644 ---- a/drivers/staging/media/hantro/hantro.h -+++ b/drivers/staging/media/hantro/hantro.h -@@ -423,7 +423,7 @@ hantro_get_dst_buf(struct hantro_ctx *ctx) - static inline bool - hantro_needs_postproc(struct hantro_ctx *ctx, const struct hantro_fmt *fmt) - { -- return fmt->fourcc != V4L2_PIX_FMT_NV12; -+ return !hantro_is_encoder_ctx(ctx) && fmt->fourcc != V4L2_PIX_FMT_NV12; - } - - static inline dma_addr_t - -From 56d94cc78751960b830cc2e3cba078b39a437d30 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Thu, 20 Feb 2020 17:30:11 +0100 -Subject: [PATCH] media: uapi: h264: Add DPB entry field reference flags - -Using the field information attached to v4l2 buffers is not enough to -determine the type of field referenced by a DPB entry: the decoded -frame might contain the full picture (both top and bottom fields) -but the reference only point to one of them. -Let's add new V4L2_H264_DPB_ENTRY_FLAG_ flags to express that. - -[Keep only 2 flags and add some details about they mean] - -Signed-off-by: Jonas Karlman -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 5e815fe05d0b3e4e4fcde2e09d5f362b3d65010f) ---- - Documentation/media/uapi/v4l/ext-ctrls-codec.rst | 16 ++++++++++++++++ - include/media/h264-ctrls.h | 2 ++ - 2 files changed, 18 insertions(+) - -diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -index 28313c0f4e7c..d4fc5f25aa14 100644 ---- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -@@ -2028,6 +2028,22 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - * - ``V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM`` - - 0x00000004 - - The DPB entry is a long term reference frame -+ * - ``V4L2_H264_DPB_ENTRY_FLAG_FIELD`` -+ - 0x00000008 -+ - The DPB entry is a field reference, which means only one of the field -+ will be used when decoding the new frame/field. When not set the DPB -+ entry is a frame reference (both fields will be used). Note that this -+ flag does not say anything about the number of fields contained in the -+ reference frame, it just describes the one used to decode the new -+ field/frame -+ * - ``V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD`` -+ - 0x00000010 -+ - The DPB entry is a bottom field reference (only the bottom field of the -+ reference frame is needed to decode the new frame/field). Only valid if -+ V4L2_H264_DPB_ENTRY_FLAG_FIELD is set. When -+ V4L2_H264_DPB_ENTRY_FLAG_FIELD is set but -+ V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD is not, that means the -+ DPB entry is a top field reference - - ``V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (enum)`` - Specifies the decoding mode to use. Currently exposes slice-based and -diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h -index e877bf1d537c..1c6ff7d63bca 100644 ---- a/include/media/h264-ctrls.h -+++ b/include/media/h264-ctrls.h -@@ -185,6 +185,8 @@ struct v4l2_ctrl_h264_slice_params { - #define V4L2_H264_DPB_ENTRY_FLAG_VALID 0x01 - #define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE 0x02 - #define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM 0x04 -+#define V4L2_H264_DPB_ENTRY_FLAG_FIELD 0x08 -+#define V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD 0x10 - - struct v4l2_h264_dpb_entry { - __u64 reference_ts; - -From 271580fc684a36422cb999561ec83cb51fcc56e5 Mon Sep 17 00:00:00 2001 -From: Hans Verkuil -Date: Tue, 3 Mar 2020 11:34:48 +0100 -Subject: [PATCH] media: v4l2-ctrls: v4l2_ctrl_request_complete() should always - set ref->req - -When the request is completed, all controls are copied to the request object. -However, when VIDIOC_G_EXT_CTRLS attempts to read control values from the -request it will read the current value instead for any control reference that -has a NULL ref->req pointer. But that's wrong: after completing the request -*all* controls should have a non-NULL ref->req pointer since they are after -all copied to the request. - -So set ref->req if it wasn't set already. - -Signed-off-by: Hans Verkuil -Reported-by: Paul Kocialkowski -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 2fae4d6aabc8fb2d49f40b12a8f82bf730216f99) ---- - drivers/media/v4l2-core/v4l2-ctrls.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 2928c5e0a73d..93d33d1db4e8 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -4296,10 +4296,17 @@ void v4l2_ctrl_request_complete(struct media_request *req, - continue; - - v4l2_ctrl_lock(ctrl); -- if (ref->req) -+ if (ref->req) { - ptr_to_ptr(ctrl, ref->req->p_req, ref->p_req); -- else -+ } else { - ptr_to_ptr(ctrl, ctrl->p_cur, ref->p_req); -+ /* -+ * Set ref->req to ensure that when userspace wants to -+ * obtain the controls of this request it will take -+ * this value and not the current value of the control. -+ */ -+ ref->req = ref; -+ } - v4l2_ctrl_unlock(ctrl); - } - - -From b23608af3428470f2e11b1bd55c10d5e7261e23d Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Tue, 3 Mar 2020 15:33:17 +0100 -Subject: [PATCH] media: v4l2-mem2mem: handle draining, stopped and - next-buf-is-last states - -Since the draining and stop phase of the HW decoder mem2mem bahaviour is -now clearly defined, we can move handling of the following states to the -common v4l2-mem2mem core code: -- draining -- stopped -- next-buf-is-last - -By introducing the following v4l2-mem2mem APIs: -- v4l2_m2m_encoder_cmd/v4l2_m2m_ioctl_encoder_cmd to handle start/stop command -- v4l2_m2m_decoder_cmd/v4l2_m2m_ioctl_decoder_cmd to handle start/stop command -- v4l2_m2m_update_start_streaming_state to update state on start of streaming -of the de/encoder queue -- v4l2_m2m_update_stop_streaming_state to update state on stop of streaming -of the de/encoder queue -- v4l2_m2m_last_buffer_done to make the current dest buffer as the last one - -And inline helpers: -- v4l2_m2m_mark_stopped to mark the de/encoding process as stopped -- v4l2_m2m_clear_state to clear the de/encoding state -- v4l2_m2m_dst_buf_is_last to detect the current dequeued dst_buf is the last -- v4l2_m2m_has_stopped to detect the de/encoding stopped state -- v4l2_m2m_is_last_draining_src_buf to detect the current source buffer should - be the last processing before stopping the de/encoding process - -The special next-buf-is-last when min_buffers != 1 case is also handled -in v4l2_m2m_qbuf() by reusing the other introduced APIs. - -This state management has been stolen from the vicodec implementation, -and is no-op for drivers not calling the v4l2_m2m_encoder_cmd or -v4l2_m2m_decoder_cmd and v4l2_m2m_update_start/stop_streaming_state. - -The vicodec will be the first one to be converted as an example. - -Signed-off-by: Neil Armstrong -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 2b48e113866a6735de3a99531183afb6217c2a60) ---- - drivers/media/v4l2-core/v4l2-mem2mem.c | 221 ++++++++++++++++++++++++++++++++- - include/media/v4l2-mem2mem.h | 133 ++++++++++++++++++++ - 2 files changed, 352 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c -index cc34c5ab7009..8986c31176e9 100644 ---- a/drivers/media/v4l2-core/v4l2-mem2mem.c -+++ b/drivers/media/v4l2-core/v4l2-mem2mem.c -@@ -340,6 +340,11 @@ static void __v4l2_m2m_try_queue(struct v4l2_m2m_dev *m2m_dev, - m2m_ctx->new_frame = !dst->vb2_buf.copied_timestamp || - dst->vb2_buf.timestamp != src->vb2_buf.timestamp; - -+ if (m2m_ctx->has_stopped) { -+ dprintk("Device has stopped\n"); -+ goto job_unlock; -+ } -+ - if (m2m_dev->m2m_ops->job_ready - && (!m2m_dev->m2m_ops->job_ready(m2m_ctx->priv))) { - dprintk("Driver not ready\n"); -@@ -556,6 +561,140 @@ int v4l2_m2m_querybuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, - } - EXPORT_SYMBOL_GPL(v4l2_m2m_querybuf); - -+/* -+ * This will add the LAST flag and mark the buffer management -+ * state as stopped. -+ * This is called when the last capture buffer must be flagged as LAST -+ * in draining mode from the encoder/decoder driver buf_queue() callback -+ * or from v4l2_update_last_buf_state() when a capture buffer is available. -+ */ -+void v4l2_m2m_last_buffer_done(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_v4l2_buffer *vbuf) -+{ -+ vbuf->flags |= V4L2_BUF_FLAG_LAST; -+ vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE); -+ -+ v4l2_m2m_mark_stopped(m2m_ctx); -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_last_buffer_done); -+ -+/* When stop command is issued, update buffer management state */ -+static int v4l2_update_last_buf_state(struct v4l2_m2m_ctx *m2m_ctx) -+{ -+ struct vb2_v4l2_buffer *next_dst_buf; -+ -+ if (m2m_ctx->is_draining) -+ return -EBUSY; -+ -+ if (m2m_ctx->has_stopped) -+ return 0; -+ -+ m2m_ctx->last_src_buf = v4l2_m2m_last_src_buf(m2m_ctx); -+ m2m_ctx->is_draining = true; -+ -+ /* -+ * The processing of the last output buffer queued before -+ * the STOP command is expected to mark the buffer management -+ * state as stopped with v4l2_m2m_mark_stopped(). -+ */ -+ if (m2m_ctx->last_src_buf) -+ return 0; -+ -+ /* -+ * In case the output queue is empty, try to mark the last capture -+ * buffer as LAST. -+ */ -+ next_dst_buf = v4l2_m2m_dst_buf_remove(m2m_ctx); -+ if (!next_dst_buf) { -+ /* -+ * Wait for the next queued one in encoder/decoder driver -+ * buf_queue() callback using the v4l2_m2m_dst_buf_is_last() -+ * helper or in v4l2_m2m_qbuf() if encoder/decoder is not yet -+ * streaming. -+ */ -+ m2m_ctx->next_buf_last = true; -+ return 0; -+ } -+ -+ v4l2_m2m_last_buffer_done(m2m_ctx, next_dst_buf); -+ -+ return 0; -+} -+ -+/* -+ * Updates the encoding/decoding buffer management state, should -+ * be called from encoder/decoder drivers start_streaming() -+ */ -+void v4l2_m2m_update_start_streaming_state(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_queue *q) -+{ -+ /* If start streaming again, untag the last output buffer */ -+ if (V4L2_TYPE_IS_OUTPUT(q->type)) -+ m2m_ctx->last_src_buf = NULL; -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_update_start_streaming_state); -+ -+/* -+ * Updates the encoding/decoding buffer management state, should -+ * be called from encoder/decoder driver stop_streaming() -+ */ -+void v4l2_m2m_update_stop_streaming_state(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_queue *q) -+{ -+ if (V4L2_TYPE_IS_OUTPUT(q->type)) { -+ /* -+ * If in draining state, either mark next dst buffer as -+ * done or flag next one to be marked as done either -+ * in encoder/decoder driver buf_queue() callback using -+ * the v4l2_m2m_dst_buf_is_last() helper or in v4l2_m2m_qbuf() -+ * if encoder/decoder is not yet streaming -+ */ -+ if (m2m_ctx->is_draining) { -+ struct vb2_v4l2_buffer *next_dst_buf; -+ -+ m2m_ctx->last_src_buf = NULL; -+ next_dst_buf = v4l2_m2m_dst_buf_remove(m2m_ctx); -+ if (!next_dst_buf) -+ m2m_ctx->next_buf_last = true; -+ else -+ v4l2_m2m_last_buffer_done(m2m_ctx, -+ next_dst_buf); -+ } -+ } else { -+ v4l2_m2m_clear_state(m2m_ctx); -+ } -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_update_stop_streaming_state); -+ -+static void v4l2_m2m_force_last_buf_done(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_queue *q) -+{ -+ struct vb2_buffer *vb; -+ struct vb2_v4l2_buffer *vbuf; -+ unsigned int i; -+ -+ if (WARN_ON(q->is_output)) -+ return; -+ if (list_empty(&q->queued_list)) -+ return; -+ -+ vb = list_first_entry(&q->queued_list, struct vb2_buffer, queued_entry); -+ for (i = 0; i < vb->num_planes; i++) -+ vb2_set_plane_payload(vb, i, 0); -+ -+ /* -+ * Since the buffer hasn't been queued to the ready queue, -+ * mark is active and owned before marking it LAST and DONE -+ */ -+ vb->state = VB2_BUF_STATE_ACTIVE; -+ atomic_inc(&q->owned_by_drv_count); -+ -+ vbuf = to_vb2_v4l2_buffer(vb); -+ vbuf->field = V4L2_FIELD_NONE; -+ -+ v4l2_m2m_last_buffer_done(m2m_ctx, vbuf); -+} -+ - int v4l2_m2m_qbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, - struct v4l2_buffer *buf) - { -@@ -570,11 +709,25 @@ int v4l2_m2m_qbuf(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, - __func__); - return -EPERM; - } -+ - ret = vb2_qbuf(vq, vdev->v4l2_dev->mdev, buf); -- if (!ret && !(buf->flags & V4L2_BUF_FLAG_IN_REQUEST)) -+ if (ret) -+ return ret; -+ -+ /* -+ * If the capture queue is streaming, but streaming hasn't started -+ * on the device, but was asked to stop, mark the previously queued -+ * buffer as DONE with LAST flag since it won't be queued on the -+ * device. -+ */ -+ if (!V4L2_TYPE_IS_OUTPUT(vq->type) && -+ vb2_is_streaming(vq) && !vb2_start_streaming_called(vq) && -+ (v4l2_m2m_has_stopped(m2m_ctx) || v4l2_m2m_dst_buf_is_last(m2m_ctx))) -+ v4l2_m2m_force_last_buf_done(m2m_ctx, vq); -+ else if (!(buf->flags & V4L2_BUF_FLAG_IN_REQUEST)) - v4l2_m2m_try_schedule(m2m_ctx); - -- return ret; -+ return 0; - } - EXPORT_SYMBOL_GPL(v4l2_m2m_qbuf); - -@@ -1225,6 +1378,70 @@ int v4l2_m2m_ioctl_try_decoder_cmd(struct file *file, void *fh, - } - EXPORT_SYMBOL_GPL(v4l2_m2m_ioctl_try_decoder_cmd); - -+/* -+ * Updates the encoding state on ENC_CMD_STOP/ENC_CMD_START -+ * Should be called from the encoder driver encoder_cmd() callback -+ */ -+int v4l2_m2m_encoder_cmd(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, -+ struct v4l2_encoder_cmd *ec) -+{ -+ if (ec->cmd != V4L2_ENC_CMD_STOP && ec->cmd != V4L2_ENC_CMD_START) -+ return -EINVAL; -+ -+ if (ec->cmd == V4L2_ENC_CMD_STOP) -+ return v4l2_update_last_buf_state(m2m_ctx); -+ -+ if (m2m_ctx->is_draining) -+ return -EBUSY; -+ -+ if (m2m_ctx->has_stopped) -+ m2m_ctx->has_stopped = false; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_encoder_cmd); -+ -+/* -+ * Updates the decoding state on DEC_CMD_STOP/DEC_CMD_START -+ * Should be called from the decoder driver decoder_cmd() callback -+ */ -+int v4l2_m2m_decoder_cmd(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, -+ struct v4l2_decoder_cmd *dc) -+{ -+ if (dc->cmd != V4L2_DEC_CMD_STOP && dc->cmd != V4L2_DEC_CMD_START) -+ return -EINVAL; -+ -+ if (dc->cmd == V4L2_DEC_CMD_STOP) -+ return v4l2_update_last_buf_state(m2m_ctx); -+ -+ if (m2m_ctx->is_draining) -+ return -EBUSY; -+ -+ if (m2m_ctx->has_stopped) -+ m2m_ctx->has_stopped = false; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_decoder_cmd); -+ -+int v4l2_m2m_ioctl_encoder_cmd(struct file *file, void *priv, -+ struct v4l2_encoder_cmd *ec) -+{ -+ struct v4l2_fh *fh = file->private_data; -+ -+ return v4l2_m2m_encoder_cmd(file, fh->m2m_ctx, ec); -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_ioctl_encoder_cmd); -+ -+int v4l2_m2m_ioctl_decoder_cmd(struct file *file, void *priv, -+ struct v4l2_decoder_cmd *dc) -+{ -+ struct v4l2_fh *fh = file->private_data; -+ -+ return v4l2_m2m_decoder_cmd(file, fh->m2m_ctx, dc); -+} -+EXPORT_SYMBOL_GPL(v4l2_m2m_ioctl_decoder_cmd); -+ - int v4l2_m2m_ioctl_stateless_try_decoder_cmd(struct file *file, void *fh, - struct v4l2_decoder_cmd *dc) - { -diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h -index 1d85e24791e4..98753f00df7e 100644 ---- a/include/media/v4l2-mem2mem.h -+++ b/include/media/v4l2-mem2mem.h -@@ -80,6 +80,10 @@ struct v4l2_m2m_queue_ctx { - * for an existing frame. This is always true unless - * V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF is set, which - * indicates slicing support. -+ * @is_draining: indicates device is in draining phase -+ * @last_src_buf: indicate the last source buffer for draining -+ * @next_buf_last: next capture queud buffer will be tagged as last -+ * @has_stopped: indicate the device has been stopped - * @m2m_dev: opaque pointer to the internal data to handle M2M context - * @cap_q_ctx: Capture (output to memory) queue context - * @out_q_ctx: Output (input from memory) queue context -@@ -98,6 +102,11 @@ struct v4l2_m2m_ctx { - - bool new_frame; - -+ bool is_draining; -+ struct vb2_v4l2_buffer *last_src_buf; -+ bool next_buf_last; -+ bool has_stopped; -+ - /* internal use only */ - struct v4l2_m2m_dev *m2m_dev; - -@@ -215,6 +224,86 @@ v4l2_m2m_buf_done(struct vb2_v4l2_buffer *buf, enum vb2_buffer_state state) - vb2_buffer_done(&buf->vb2_buf, state); - } - -+/** -+ * v4l2_m2m_clear_state() - clear encoding/decoding state -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ */ -+static inline void -+v4l2_m2m_clear_state(struct v4l2_m2m_ctx *m2m_ctx) -+{ -+ m2m_ctx->next_buf_last = false; -+ m2m_ctx->is_draining = false; -+ m2m_ctx->has_stopped = false; -+} -+ -+/** -+ * v4l2_m2m_mark_stopped() - set current encoding/decoding state as stopped -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ */ -+static inline void -+v4l2_m2m_mark_stopped(struct v4l2_m2m_ctx *m2m_ctx) -+{ -+ m2m_ctx->next_buf_last = false; -+ m2m_ctx->is_draining = false; -+ m2m_ctx->has_stopped = true; -+} -+ -+/** -+ * v4l2_m2m_dst_buf_is_last() - return the current encoding/decoding session -+ * draining management state of next queued capture buffer -+ * -+ * This last capture buffer should be tagged with V4L2_BUF_FLAG_LAST to notify -+ * the end of the capture session. -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ */ -+static inline bool -+v4l2_m2m_dst_buf_is_last(struct v4l2_m2m_ctx *m2m_ctx) -+{ -+ return m2m_ctx->is_draining && m2m_ctx->next_buf_last; -+} -+ -+/** -+ * v4l2_m2m_has_stopped() - return the current encoding/decoding session -+ * stopped state -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ */ -+static inline bool -+v4l2_m2m_has_stopped(struct v4l2_m2m_ctx *m2m_ctx) -+{ -+ return m2m_ctx->has_stopped; -+} -+ -+/** -+ * v4l2_m2m_is_last_draining_src_buf() - return the output buffer draining -+ * state in the current encoding/decoding session -+ * -+ * This will identify the last output buffer queued before a session stop -+ * was required, leading to an actual encoding/decoding session stop state -+ * in the encoding/decoding process after being processed. -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ * @vbuf: pointer to struct &v4l2_buffer -+ */ -+static inline bool -+v4l2_m2m_is_last_draining_src_buf(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_v4l2_buffer *vbuf) -+{ -+ return m2m_ctx->is_draining && vbuf == m2m_ctx->last_src_buf; -+} -+ -+/** -+ * v4l2_m2m_last_buffer_done() - marks the buffer with LAST flag and DONE -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ * @vbuf: pointer to struct &v4l2_buffer -+ */ -+void v4l2_m2m_last_buffer_done(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_v4l2_buffer *vbuf); -+ - /** - * v4l2_m2m_reqbufs() - multi-queue-aware REQBUFS multiplexer - * -@@ -312,6 +401,46 @@ int v4l2_m2m_streamon(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, - int v4l2_m2m_streamoff(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, - enum v4l2_buf_type type); - -+/** -+ * v4l2_m2m_update_start_streaming_state() - update the encoding/decoding -+ * session state when a start of streaming of a video queue is requested -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ * @q: queue -+ */ -+void v4l2_m2m_update_start_streaming_state(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_queue *q); -+ -+/** -+ * v4l2_m2m_update_stop_streaming_state() - update the encoding/decoding -+ * session state when a stop of streaming of a video queue is requested -+ * -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ * @q: queue -+ */ -+void v4l2_m2m_update_stop_streaming_state(struct v4l2_m2m_ctx *m2m_ctx, -+ struct vb2_queue *q); -+ -+/** -+ * v4l2_m2m_encoder_cmd() - execute an encoder command -+ * -+ * @file: pointer to struct &file -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ * @ec: pointer to the encoder command -+ */ -+int v4l2_m2m_encoder_cmd(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, -+ struct v4l2_encoder_cmd *ec); -+ -+/** -+ * v4l2_m2m_decoder_cmd() - execute a decoder command -+ * -+ * @file: pointer to struct &file -+ * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx -+ * @dc: pointer to the decoder command -+ */ -+int v4l2_m2m_decoder_cmd(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, -+ struct v4l2_decoder_cmd *dc); -+ - /** - * v4l2_m2m_poll() - poll replacement, for destination buffers only - * -@@ -704,6 +833,10 @@ int v4l2_m2m_ioctl_streamon(struct file *file, void *fh, - enum v4l2_buf_type type); - int v4l2_m2m_ioctl_streamoff(struct file *file, void *fh, - enum v4l2_buf_type type); -+int v4l2_m2m_ioctl_encoder_cmd(struct file *file, void *fh, -+ struct v4l2_encoder_cmd *ec); -+int v4l2_m2m_ioctl_decoder_cmd(struct file *file, void *fh, -+ struct v4l2_decoder_cmd *dc); - int v4l2_m2m_ioctl_try_encoder_cmd(struct file *file, void *fh, - struct v4l2_encoder_cmd *ec); - int v4l2_m2m_ioctl_try_decoder_cmd(struct file *file, void *fh, - -From 30bcb22538b1f7350e76ddd2c31a1ea082496c12 Mon Sep 17 00:00:00 2001 -From: Kaaira Gupta -Date: Sat, 14 Mar 2020 03:24:06 +0530 -Subject: [PATCH] staging: media: hantro: remove parentheses - -Remove unnecessary parentheses in file hantro_postproc.c. Check reported -by coccinelle. - -Signed-off-by: Kaaira Gupta -Reviewed-by: Stefano Brivio -Link: https://lore.kernel.org/r/20200313215406.2485-5-kgupta@es.iitr.ac.in -Signed-off-by: Greg Kroah-Hartman -(cherry picked from commit ba839b32d6f76a68919ed838e9375c47ca05a91a) ---- - drivers/staging/media/hantro/hantro_postproc.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c -index 28a85d301d7f..44062ffceaea 100644 ---- a/drivers/staging/media/hantro/hantro_postproc.c -+++ b/drivers/staging/media/hantro/hantro_postproc.c -@@ -14,16 +14,16 @@ - - #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ - { \ -- hantro_reg_write((vpu), \ -- &((vpu)->variant->postproc_regs->reg_name), \ -- (val)); \ -+ hantro_reg_write(vpu, \ -+ &(vpu)->variant->postproc_regs->reg_name, \ -+ val); \ - } - - #define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \ - { \ -- hantro_reg_write_s((vpu), \ -- &((vpu)->variant->postproc_regs->reg_name), \ -- (val)); \ -+ hantro_reg_write_s(vpu, \ -+ &(vpu)->variant->postproc_regs->reg_name, \ -+ val); \ - } - - #define VPU_PP_IN_YUYV 0x0 - -From 0896f591162d36f51484e51febcffb5ed6511108 Mon Sep 17 00:00:00 2001 -From: Philipp Zabel -Date: Fri, 20 Mar 2020 14:12:54 +0100 -Subject: [PATCH] media: hantro: add initial i.MX8MQ support - -This enables h.264, MPEG-2, and VP8 decoding on the Hantro G1 on -i.MX8MQ, with post-processing support. - -Signed-off-by: Philipp Zabel -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit 8e4aaa68786319ea02ad30e55c1f753bf83418ab) ---- - drivers/staging/media/hantro/Kconfig | 16 +- - drivers/staging/media/hantro/Makefile | 3 + - drivers/staging/media/hantro/hantro_drv.c | 3 + - drivers/staging/media/hantro/hantro_hw.h | 1 + - drivers/staging/media/hantro/imx8m_vpu_hw.c | 220 ++++++++++++++++++++++++++++ - 5 files changed, 239 insertions(+), 4 deletions(-) - create mode 100644 drivers/staging/media/hantro/imx8m_vpu_hw.c - -diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig -index de77fe6554e7..99aed9a5b0b9 100644 ---- a/drivers/staging/media/hantro/Kconfig -+++ b/drivers/staging/media/hantro/Kconfig -@@ -1,19 +1,27 @@ - # SPDX-License-Identifier: GPL-2.0 - config VIDEO_HANTRO - tristate "Hantro VPU driver" -- depends on ARCH_ROCKCHIP || COMPILE_TEST -+ depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST - depends on VIDEO_DEV && VIDEO_V4L2 && MEDIA_CONTROLLER - depends on MEDIA_CONTROLLER_REQUEST_API - select VIDEOBUF2_DMA_CONTIG - select VIDEOBUF2_VMALLOC - select V4L2_MEM2MEM_DEV - help -- Support for the Hantro IP based Video Processing Unit present on -- Rockchip SoC, which accelerates video and image encoding and -- decoding. -+ Support for the Hantro IP based Video Processing Units present on -+ Rockchip and NXP i.MX8M SoCs, which accelerate video and image -+ encoding and decoding. - To compile this driver as a module, choose M here: the module - will be called hantro-vpu. - -+config VIDEO_HANTRO_IMX8M -+ bool "Hantro VPU i.MX8M support" -+ depends on VIDEO_HANTRO -+ depends on ARCH_MXC || COMPILE_TEST -+ default y -+ help -+ Enable support for i.MX8M SoCs. -+ - config VIDEO_HANTRO_ROCKCHIP - bool "Hantro VPU Rockchip support" - depends on VIDEO_HANTRO -diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile -index 496b30c3c396..68c29a9c4946 100644 ---- a/drivers/staging/media/hantro/Makefile -+++ b/drivers/staging/media/hantro/Makefile -@@ -16,6 +16,9 @@ hantro-vpu-y += \ - hantro_mpeg2.o \ - hantro_vp8.o - -+hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \ -+ imx8m_vpu_hw.o -+ - hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \ - rk3288_vpu_hw.o \ - rk3399_vpu_hw.o -diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index ca8b133e2e46..e5aeb69b3536 100644 ---- a/drivers/staging/media/hantro/hantro_drv.c -+++ b/drivers/staging/media/hantro/hantro_drv.c -@@ -498,6 +498,9 @@ static const struct of_device_id of_hantro_match[] = { - { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, - { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, }, - { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, }, -+#endif -+#ifdef CONFIG_VIDEO_HANTRO_IMX8M -+ { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, - #endif - { /* sentinel */ } - }; -diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h -index 2398d4c1f207..7dfc9bad7297 100644 ---- a/drivers/staging/media/hantro/hantro_hw.h -+++ b/drivers/staging/media/hantro/hantro_hw.h -@@ -151,6 +151,7 @@ enum hantro_enc_fmt { - extern const struct hantro_variant rk3399_vpu_variant; - extern const struct hantro_variant rk3328_vpu_variant; - extern const struct hantro_variant rk3288_vpu_variant; -+extern const struct hantro_variant imx8mq_vpu_variant; - - extern const struct hantro_postproc_regs hantro_g1_postproc_regs; - -diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c -new file mode 100644 -index 000000000000..cb2420c5526e ---- /dev/null -+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c -@@ -0,0 +1,220 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Hantro VPU codec driver -+ * -+ * Copyright (C) 2019 Pengutronix, Philipp Zabel -+ */ -+ -+#include -+#include -+ -+#include "hantro.h" -+#include "hantro_jpeg.h" -+#include "hantro_g1_regs.h" -+ -+#define CTRL_SOFT_RESET 0x00 -+#define RESET_G1 BIT(1) -+#define RESET_G2 BIT(0) -+ -+#define CTRL_CLOCK_ENABLE 0x04 -+#define CLOCK_G1 BIT(1) -+#define CLOCK_G2 BIT(0) -+ -+#define CTRL_G1_DEC_FUSE 0x08 -+#define CTRL_G1_PP_FUSE 0x0c -+#define CTRL_G2_DEC_FUSE 0x10 -+ -+static void imx8m_soft_reset(struct hantro_dev *vpu, u32 reset_bits) -+{ -+ u32 val; -+ -+ /* Assert */ -+ val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); -+ val &= ~reset_bits; -+ writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); -+ -+ udelay(2); -+ -+ /* Release */ -+ val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); -+ val |= reset_bits; -+ writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); -+} -+ -+static void imx8m_clk_enable(struct hantro_dev *vpu, u32 clock_bits) -+{ -+ u32 val; -+ -+ val = readl(vpu->ctrl_base + CTRL_CLOCK_ENABLE); -+ val |= clock_bits; -+ writel(val, vpu->ctrl_base + CTRL_CLOCK_ENABLE); -+} -+ -+static int imx8mq_runtime_resume(struct hantro_dev *vpu) -+{ -+ int ret; -+ -+ ret = clk_bulk_prepare_enable(vpu->variant->num_clocks, vpu->clocks); -+ if (ret) { -+ dev_err(vpu->dev, "Failed to enable clocks\n"); -+ return ret; -+ } -+ -+ imx8m_soft_reset(vpu, RESET_G1 | RESET_G2); -+ imx8m_clk_enable(vpu, CLOCK_G1 | CLOCK_G2); -+ -+ /* Set values of the fuse registers */ -+ writel(0xffffffff, vpu->ctrl_base + CTRL_G1_DEC_FUSE); -+ writel(0xffffffff, vpu->ctrl_base + CTRL_G1_PP_FUSE); -+ writel(0xffffffff, vpu->ctrl_base + CTRL_G2_DEC_FUSE); -+ -+ clk_bulk_disable_unprepare(vpu->variant->num_clocks, vpu->clocks); -+ -+ return 0; -+} -+ -+/* -+ * Supported formats. -+ */ -+ -+static const struct hantro_fmt imx8m_vpu_postproc_fmts[] = { -+ { -+ .fourcc = V4L2_PIX_FMT_YUYV, -+ .codec_mode = HANTRO_MODE_NONE, -+ }, -+}; -+ -+static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { -+ { -+ .fourcc = V4L2_PIX_FMT_NV12, -+ .codec_mode = HANTRO_MODE_NONE, -+ }, -+ { -+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE, -+ .codec_mode = HANTRO_MODE_MPEG2_DEC, -+ .max_depth = 2, -+ .frmsize = { -+ .min_width = 48, -+ .max_width = 1920, -+ .step_width = MB_DIM, -+ .min_height = 48, -+ .max_height = 1088, -+ .step_height = MB_DIM, -+ }, -+ }, -+ { -+ .fourcc = V4L2_PIX_FMT_VP8_FRAME, -+ .codec_mode = HANTRO_MODE_VP8_DEC, -+ .max_depth = 2, -+ .frmsize = { -+ .min_width = 48, -+ .max_width = 3840, -+ .step_width = 16, -+ .min_height = 48, -+ .max_height = 2160, -+ .step_height = 16, -+ }, -+ }, -+ { -+ .fourcc = V4L2_PIX_FMT_H264_SLICE, -+ .codec_mode = HANTRO_MODE_H264_DEC, -+ .max_depth = 2, -+ .frmsize = { -+ .min_width = 48, -+ .max_width = 3840, -+ .step_width = MB_DIM, -+ .min_height = 48, -+ .max_height = 2160, -+ .step_height = MB_DIM, -+ }, -+ }, -+}; -+ -+static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) -+{ -+ struct hantro_dev *vpu = dev_id; -+ enum vb2_buffer_state state; -+ u32 status; -+ -+ status = vdpu_read(vpu, G1_REG_INTERRUPT); -+ state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ? -+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; -+ -+ vdpu_write(vpu, 0, G1_REG_INTERRUPT); -+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); -+ -+ hantro_irq_done(vpu, 0, state); -+ -+ return IRQ_HANDLED; -+} -+ -+static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) -+{ -+ vpu->dec_base = vpu->reg_bases[0]; -+ vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; -+ -+ return 0; -+} -+ -+static void imx8m_vpu_g1_reset(struct hantro_ctx *ctx) -+{ -+ struct hantro_dev *vpu = ctx->dev; -+ -+ imx8m_soft_reset(vpu, RESET_G1); -+} -+ -+/* -+ * Supported codec ops. -+ */ -+ -+static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = { -+ [HANTRO_MODE_MPEG2_DEC] = { -+ .run = hantro_g1_mpeg2_dec_run, -+ .reset = imx8m_vpu_g1_reset, -+ .init = hantro_mpeg2_dec_init, -+ .exit = hantro_mpeg2_dec_exit, -+ }, -+ [HANTRO_MODE_VP8_DEC] = { -+ .run = hantro_g1_vp8_dec_run, -+ .reset = imx8m_vpu_g1_reset, -+ .init = hantro_vp8_dec_init, -+ .exit = hantro_vp8_dec_exit, -+ }, -+ [HANTRO_MODE_H264_DEC] = { -+ .run = hantro_g1_h264_dec_run, -+ .reset = imx8m_vpu_g1_reset, -+ .init = hantro_h264_dec_init, -+ .exit = hantro_h264_dec_exit, -+ }, -+}; -+ -+/* -+ * VPU variants. -+ */ -+ -+static const struct hantro_irq imx8mq_irqs[] = { -+ { "g1", imx8m_vpu_g1_irq }, -+ { "g2", NULL /* TODO: imx8m_vpu_g2_irq */ }, -+}; -+ -+static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; -+static const char * const imx8mq_reg_names[] = { "g1", "g2", "ctrl" }; -+ -+const struct hantro_variant imx8mq_vpu_variant = { -+ .dec_fmts = imx8m_vpu_dec_fmts, -+ .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), -+ .postproc_fmts = imx8m_vpu_postproc_fmts, -+ .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), -+ .postproc_regs = &hantro_g1_postproc_regs, -+ .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | -+ HANTRO_H264_DECODER, -+ .codec_ops = imx8mq_vpu_codec_ops, -+ .init = imx8mq_vpu_hw_init, -+ .runtime_resume = imx8mq_runtime_resume, -+ .irqs = imx8mq_irqs, -+ .num_irqs = ARRAY_SIZE(imx8mq_irqs), -+ .clk_names = imx8mq_clk_names, -+ .num_clocks = ARRAY_SIZE(imx8mq_clk_names), -+ .reg_names = imx8mq_reg_names, -+ .num_regs = ARRAY_SIZE(imx8mq_reg_names) -+}; diff --git a/projects/Rockchip/patches/linux/default/linux-0012-v4l2-from-next.patch b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch similarity index 86% rename from projects/Rockchip/patches/linux/default/linux-0012-v4l2-from-next.patch rename to projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch index 3d933c856a..7aab2a7184 100644 --- a/projects/Rockchip/patches/linux/default/linux-0012-v4l2-from-next.patch +++ b/projects/Rockchip/patches/linux/default/linux-0011-v4l2-from-5.8.patch @@ -1,63 +1,4 @@ -From 886676176036ecc1b176d0374de0d97e674bdf7a Mon Sep 17 00:00:00 2001 -From: Mauro Carvalho Chehab -Date: Tue, 24 Mar 2020 10:05:18 +0100 -Subject: [PATCH] media: pci: move VIDEO_PCI_SKELETON to a different Kconfig - -The V4L2 PCI skeleton is not part of the V4L2 core. Move it -to appear together with the other PCI drivers, at the end, -as this is something that normal users don't even need to -bother. - -Signed-off-by: Mauro Carvalho Chehab -(cherry picked from commit f11175daffad2c53e6e3ea020d0a6c3839a2fba7) ---- - drivers/media/pci/Kconfig | 10 ++++++++++ - drivers/media/v4l2-core/Kconfig | 10 ---------- - 2 files changed, 10 insertions(+), 10 deletions(-) - -diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig -index dcb3719f440e..9336f8446cf0 100644 ---- a/drivers/media/pci/Kconfig -+++ b/drivers/media/pci/Kconfig -@@ -56,5 +56,15 @@ endif - - source "drivers/media/pci/intel/ipu3/Kconfig" - -+config VIDEO_PCI_SKELETON -+ tristate "Skeleton PCI V4L2 driver" -+ depends on PCI -+ depends on SAMPLES -+ depends on VIDEO_V4L2 && VIDEOBUF2_CORE -+ depends on VIDEOBUF2_MEMOPS && VIDEOBUF2_DMA_CONTIG -+ help -+ Enable build of the skeleton PCI driver, used as a reference -+ when developing new drivers. -+ - endif #MEDIA_PCI_SUPPORT - endif #PCI -diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig -index 39e3fb30ba0b..26276b257eae 100644 ---- a/drivers/media/v4l2-core/Kconfig -+++ b/drivers/media/v4l2-core/Kconfig -@@ -31,16 +31,6 @@ config VIDEO_FIXED_MINOR_RANGES - - When in doubt, say N. - --config VIDEO_PCI_SKELETON -- tristate "Skeleton PCI V4L2 driver" -- depends on PCI -- depends on SAMPLES -- depends on VIDEO_V4L2 && VIDEOBUF2_CORE -- depends on VIDEOBUF2_MEMOPS && VIDEOBUF2_DMA_CONTIG -- help -- Enable build of the skeleton PCI driver, used as a reference -- when developing new drivers. -- - # Used by drivers that need tuner.ko - config VIDEO_TUNER - tristate - -From 02aa28e1c3dbd724e7254eaa04722836700cc3ad Mon Sep 17 00:00:00 2001 +From 33f924acf6b0b4778810b2a25189b02c30b60234 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:32 +0100 Subject: [PATCH] media: v4l2-mem2mem: return CAPTURE buffer first @@ -114,7 +55,7 @@ index 8986c31176e9..62ac9424c92a 100644 unlock: spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags); -From 4cdcd83186270d7638a6a9a96864323135839d5b Mon Sep 17 00:00:00 2001 +From 7afc11962aa5f0be37913db8f510481fc365a6f3 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:33 +0100 Subject: [PATCH] media: hantro: Set buffers' zeroth plane payload in @@ -172,7 +113,7 @@ index f4ae2cee0f18..3142ab6697d5 100644 static void hantro_buf_queue(struct vb2_buffer *vb) -From 053495ed2bee4b9e3b3419ec74ab2f3f163bc19f Mon Sep 17 00:00:00 2001 +From 7c92154bc9dcdefedfdaeea0d12ca95b0b800188 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:34 +0100 Subject: [PATCH] media: hantro: Use v4l2_m2m_buf_done_and_job_finish @@ -190,7 +131,7 @@ Signed-off-by: Mauro Carvalho Chehab 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index e5aeb69b3536..7a51a4d229de 100644 +index ace13973e2d0..d0097c5fe7d9 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -101,8 +101,8 @@ static void hantro_job_finish(struct hantro_dev *vpu, @@ -227,7 +168,7 @@ index e5aeb69b3536..7a51a4d229de 100644 void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, -From 359b01efe0768bb41a6b996b4b41e1c49fc5e7ac Mon Sep 17 00:00:00 2001 +From fc2058179fcab5ab2bbaa2b654562890a8076684 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:35 +0100 Subject: [PATCH] media: hantro: Remove unneeded hantro_dec_buf_finish @@ -245,7 +186,7 @@ Signed-off-by: Mauro Carvalho Chehab 1 file changed, 10 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c -index 7a51a4d229de..dd444080d58f 100644 +index d0097c5fe7d9..0db8ad455160 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -80,15 +80,6 @@ hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf, @@ -273,7 +214,7 @@ index 7a51a4d229de..dd444080d58f 100644 ret = -ENODEV; goto err_ctx_free; -From 835548eb5a52605b9ed1a5411b08ad76875396d9 Mon Sep 17 00:00:00 2001 +From c89a32acae32073d01df707edef1551ca9052858 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:36 +0100 Subject: [PATCH] media: hantro: Move H264 motion vector calculation to a @@ -396,7 +337,7 @@ index 3142ab6697d5..458b502ff01b 100644 /* * For coded formats the application can specify -From 90a9e8787e08f8b4222c1018fd23c62326030533 Mon Sep 17 00:00:00 2001 +From b14f424b8dc02bff91351231870b95ccc91c32ec Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:37 +0100 Subject: [PATCH] media: hantro: Refactor for V4L2 API spec compliancy @@ -602,7 +543,75 @@ index 458b502ff01b..f28a94e2fa93 100644 .vidioc_querycap = vidioc_querycap, .vidioc_enum_framesizes = vidioc_enum_framesizes, -From aa8d141563c6efccacced7d0f7ab23922e46c317 Mon Sep 17 00:00:00 2001 +From 9d1f636edd321ed8a8a6bbe852d56dc01b275109 Mon Sep 17 00:00:00 2001 +From: Dafna Hirschfeld +Date: Mon, 23 Mar 2020 18:36:18 +0100 +Subject: [PATCH] media: v4l2-common: change the pixel_enc of V4L2_PIX_FMT_GREY + to YUV + +V4L2_PIX_FMT_GREY format is Ycbcr format without +the color data, therefore its pixel_enc should +set to V4L2_PIXEL_ENC_YUV. + +Signed-off-by: Dafna Hirschfeld +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 7ca02435ff25fd384dc7e02da7ea01fe2799ffce) +--- + drivers/media/v4l2-core/v4l2-common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c +index d0e5ebc736f9..054f2e607dff 100644 +--- a/drivers/media/v4l2-core/v4l2-common.c ++++ b/drivers/media/v4l2-core/v4l2-common.c +@@ -250,7 +250,6 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) + { .format = V4L2_PIX_FMT_RGBA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_ABGR32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_BGRA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, +- { .format = V4L2_PIX_FMT_GREY, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_RGB565, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_RGB555, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + +@@ -274,6 +273,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) + { .format = V4L2_PIX_FMT_YUV420, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, + { .format = V4L2_PIX_FMT_YVU420, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, + { .format = V4L2_PIX_FMT_YUV422P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 1 }, ++ { .format = V4L2_PIX_FMT_GREY, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + + /* YUV planar formats, non contiguous variant */ + { .format = V4L2_PIX_FMT_YUV420M, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 3, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, + +From 4d0508cfc89d1c462c1ecf7b8714242be9c08d94 Mon Sep 17 00:00:00 2001 +From: Dafna Hirschfeld +Date: Mon, 16 Mar 2020 08:01:23 +0100 +Subject: [PATCH] media: v4l2-common: Add BGR666 to v4l2_format_info + +Add V4L2_PIX_FMT_BGR666 to the format table. + +Signed-off-by: Dafna Hirschfeld +Reviewed-by: Laurent Pinchart +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 58d4c14ed89ca51c782cab7ae6bf2c5215109204) +--- + drivers/media/v4l2-core/v4l2-common.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c +index 054f2e607dff..9e8eb45a5b03 100644 +--- a/drivers/media/v4l2-core/v4l2-common.c ++++ b/drivers/media/v4l2-core/v4l2-common.c +@@ -252,6 +252,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) + { .format = V4L2_PIX_FMT_BGRA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_RGB565, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_RGB555, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, ++ { .format = V4L2_PIX_FMT_BGR666, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + + /* YUV packed formats */ + { .format = V4L2_PIX_FMT_YUYV, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 2, .vdiv = 1 }, + +From dbdcb1168a4a2ca7722ba274816cd5c829a640f8 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:32 +0100 Subject: [PATCH] media: add v4l2 JPEG helpers @@ -632,10 +641,10 @@ Signed-off-by: Mauro Carvalho Chehab create mode 100644 include/media/v4l2-jpeg.h diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig -index 26276b257eae..97d2369ec189 100644 +index 39e3fb30ba0b..89809ec24779 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig -@@ -35,6 +35,10 @@ config VIDEO_FIXED_MINOR_RANGES +@@ -45,6 +45,10 @@ config VIDEO_PCI_SKELETON config VIDEO_TUNER tristate @@ -1439,7 +1448,7 @@ index 000000000000..ddba2a56c321 + +#endif -From 7d8bafa282d4c034337bb842870294035fd041b2 Mon Sep 17 00:00:00 2001 +From 035031da98faeb8a01069ac2a0ba3925b72a451f Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 16 Mar 2020 23:42:30 +0100 Subject: [PATCH] media: v4l2-ctrl: Add H264 profile and levels @@ -1480,10 +1489,10 @@ index 93d33d1db4e8..0186ba85aac7 100644 }; static const char * const vui_sar_idc[] = { diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h -index 5a7bedee2b0e..fbe3f82d3bd0 100644 +index 1a58d7cc4ccc..0ba1005c9651 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h -@@ -467,6 +467,10 @@ enum v4l2_mpeg_video_h264_level { +@@ -473,6 +473,10 @@ enum v4l2_mpeg_video_h264_level { V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13, V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14, V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15, @@ -1494,7 +1503,7 @@ index 5a7bedee2b0e..fbe3f82d3bd0 100644 }; #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360) #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361) -@@ -495,6 +499,7 @@ enum v4l2_mpeg_video_h264_profile { +@@ -501,6 +505,7 @@ enum v4l2_mpeg_video_h264_profile { V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14, V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15, V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16, @@ -1503,7 +1512,7 @@ index 5a7bedee2b0e..fbe3f82d3bd0 100644 #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364) #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365) -From b5d4242fb30faa5b33e74ba0fd383e886a9090e5 Mon Sep 17 00:00:00 2001 +From 8d940ad30dccc2eba7b79e2498291afe1c6d6a59 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:41 +0200 Subject: [PATCH] media: v4l2-core: Add helpers to build the H264 P/B0/B1 @@ -1534,10 +1543,10 @@ Signed-off-by: Mauro Carvalho Chehab create mode 100644 include/media/v4l2-h264.h diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig -index 97d2369ec189..340016868105 100644 +index 89809ec24779..db09e8b643fd 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig -@@ -39,6 +39,10 @@ config VIDEO_TUNER +@@ -49,6 +49,10 @@ config VIDEO_TUNER config V4L2_JPEG_HELPER tristate @@ -1954,7 +1963,7 @@ index 000000000000..bc9ebb560ccf + +#endif /* _MEDIA_V4L2_H264_H */ -From d671927437966a34eee8dc62af28801065d8e173 Mon Sep 17 00:00:00 2001 +From c3231ffe9e7b695ae37bcc0ce9e686100d06a0e0 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:42 +0200 Subject: [PATCH] media: hantro: h264: Use the generic H264 reflist builder @@ -2254,7 +2263,7 @@ index f2d3e81fb6ce..d561f125085a 100644 } -From aca3b453e69c4402fdb8575a2bf638bd528614e3 Mon Sep 17 00:00:00 2001 +From b07a96a7a7c9018cf822c65f0bfbcab9be94798d Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:44 +0200 Subject: [PATCH] media: rkvdec: Add the rkvdec driver @@ -2291,12 +2300,12 @@ Signed-off-by: Mauro Carvalho Chehab create mode 100644 drivers/staging/media/rkvdec/rkvdec.h diff --git a/MAINTAINERS b/MAINTAINERS -index 5a5332b3591d..37bb5d26e2b4 100644 +index 50659d76976b..3c5892af3e17 100644 --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -14298,6 +14298,13 @@ F: drivers/hid/hid-roccat* +@@ -14470,6 +14470,13 @@ F: Documentation/ABI/*/sysfs-driver-hid-roccat* + F: drivers/hid/hid-roccat* F: include/linux/hid-roccat* - F: Documentation/ABI/*/sysfs-driver-hid-roccat* +ROCKCHIP VIDEO DECODER DRIVER +M: Ezequiel Garcia @@ -2309,7 +2318,7 @@ index 5a5332b3591d..37bb5d26e2b4 100644 M: Helen Koike L: linux-media@vger.kernel.org diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig -index c394abffea86..bf70de84f5cb 100644 +index e59a846bc909..c6b4fb5d48b4 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -30,6 +30,8 @@ source "drivers/staging/media/meson/vdec/Kconfig" @@ -2322,7 +2331,7 @@ index c394abffea86..bf70de84f5cb 100644 source "drivers/staging/media/tegra-vde/Kconfig" diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile -index ea9fce8014bb..7169dffe3fca 100644 +index 23c682461b62..8b24be1a7076 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_VIDEO_ALLEGRO_DVT) += allegro-dvt/ @@ -5009,7 +5018,7 @@ index 000000000000..2fc9f46b6910 +extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; +#endif /* RKVDEC_H_ */ -From a29042147bdb81109aae32e6a816998871480267 Mon Sep 17 00:00:00 2001 +From 7a27afb0d95fcf110ac1c06da08579a6a41e2ae7 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 3 Mar 2020 12:01:59 +0100 Subject: [PATCH] media: v4l2-ctrls: v4l2_ctrl_g/s_ctrl*(): don't continue when @@ -5093,7 +5102,7 @@ index 0186ba85aac7..77b0132d9f6f 100644 return set_ctrl(NULL, ctrl, 0); } -From 0bbef4658467aee91b22551e8757a918febad902 Mon Sep 17 00:00:00 2001 +From 663f227c908199937a37cea794b3387725dc953b Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 3 Mar 2020 12:02:00 +0100 Subject: [PATCH] media: v4l2-ctrls: add __v4l2_ctrl_s_ctrl_compound() @@ -5218,3 +5227,523 @@ index 7db9e719a583..75a8daacb4c4 100644 /* Internal helper functions that deal with control events. */ extern const struct v4l2_subscribed_event_ops v4l2_ctrl_sub_ev_ops; + +From 8e8bc31ca973c638d5dca39cb9f6ac2bb86e355e Mon Sep 17 00:00:00 2001 +From: Jacopo Mondi +Date: Thu, 7 May 2020 17:12:50 +0200 +Subject: [PATCH] media: v4l2-dev: Add v4l2_device_register_ro_subdev_node() + +Add to the V4L2 core a function to register device nodes for video +subdevices in read-only mode. + +Registering a device node in read-only mode is useful to expose to +userspace the current sub-device configuration, without allowing +application to change it by using the V4L2 subdevice ioctls. + +Acked-by: Sakari Ailus +Signed-off-by: Jacopo Mondi +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit f75c431e54e2e43c91fe267097b974ff2e5dc668) +--- + drivers/media/v4l2-core/v4l2-device.c | 7 +++-- + drivers/media/v4l2-core/v4l2-subdev.c | 19 +++++++++++++ + include/media/v4l2-dev.h | 7 +++++ + include/media/v4l2-device.h | 50 ++++++++++++++++++++++++++++++++--- + 4 files changed, 77 insertions(+), 6 deletions(-) + +diff --git a/drivers/media/v4l2-core/v4l2-device.c b/drivers/media/v4l2-core/v4l2-device.c +index c69941214bb2..de4287251a89 100644 +--- a/drivers/media/v4l2-core/v4l2-device.c ++++ b/drivers/media/v4l2-core/v4l2-device.c +@@ -186,7 +186,8 @@ static void v4l2_device_release_subdev_node(struct video_device *vdev) + kfree(vdev); + } + +-int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) ++int __v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev, ++ bool read_only) + { + struct video_device *vdev; + struct v4l2_subdev *sd; +@@ -215,6 +216,8 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) + vdev->fops = &v4l2_subdev_fops; + vdev->release = v4l2_device_release_subdev_node; + vdev->ctrl_handler = sd->ctrl_handler; ++ if (read_only) ++ set_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); + err = __video_register_device(vdev, VFL_TYPE_SUBDEV, -1, 1, + sd->owner); + if (err < 0) { +@@ -252,7 +255,7 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) + + return err; + } +-EXPORT_SYMBOL_GPL(v4l2_device_register_subdev_nodes); ++EXPORT_SYMBOL_GPL(__v4l2_device_register_subdev_nodes); + + void v4l2_device_unregister_subdev(struct v4l2_subdev *sd) + { +diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c +index a376b351135f..1dc263c2ca0a 100644 +--- a/drivers/media/v4l2-core/v4l2-subdev.c ++++ b/drivers/media/v4l2-core/v4l2-subdev.c +@@ -331,6 +331,7 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + struct v4l2_fh *vfh = file->private_data; + #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) + struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh); ++ bool ro_subdev = test_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); + #endif + int rval; + +@@ -477,6 +478,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + case VIDIOC_SUBDEV_S_FMT: { + struct v4l2_subdev_format *format = arg; + ++ if (format->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) ++ return -EPERM; ++ + memset(format->reserved, 0, sizeof(format->reserved)); + memset(format->format.reserved, 0, sizeof(format->format.reserved)); + return v4l2_subdev_call(sd, pad, set_fmt, subdev_fh->pad, format); +@@ -504,6 +508,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + struct v4l2_subdev_crop *crop = arg; + struct v4l2_subdev_selection sel; + ++ if (crop->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) ++ return -EPERM; ++ + memset(crop->reserved, 0, sizeof(crop->reserved)); + memset(&sel, 0, sizeof(sel)); + sel.which = crop->which; +@@ -545,6 +552,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + case VIDIOC_SUBDEV_S_FRAME_INTERVAL: { + struct v4l2_subdev_frame_interval *fi = arg; + ++ if (ro_subdev) ++ return -EPERM; ++ + memset(fi->reserved, 0, sizeof(fi->reserved)); + return v4l2_subdev_call(sd, video, s_frame_interval, arg); + } +@@ -568,6 +578,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + case VIDIOC_SUBDEV_S_SELECTION: { + struct v4l2_subdev_selection *sel = arg; + ++ if (sel->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) ++ return -EPERM; ++ + memset(sel->reserved, 0, sizeof(sel->reserved)); + return v4l2_subdev_call( + sd, pad, set_selection, subdev_fh->pad, sel); +@@ -604,6 +617,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + return v4l2_subdev_call(sd, video, g_dv_timings, arg); + + case VIDIOC_SUBDEV_S_DV_TIMINGS: ++ if (ro_subdev) ++ return -EPERM; ++ + return v4l2_subdev_call(sd, video, s_dv_timings, arg); + + case VIDIOC_SUBDEV_G_STD: +@@ -612,6 +628,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) + case VIDIOC_SUBDEV_S_STD: { + v4l2_std_id *std = arg; + ++ if (ro_subdev) ++ return -EPERM; ++ + return v4l2_subdev_call(sd, video, s_std, *std); + } + +diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h +index 4602c15ff878..ad2d41952442 100644 +--- a/include/media/v4l2-dev.h ++++ b/include/media/v4l2-dev.h +@@ -82,11 +82,18 @@ struct v4l2_ctrl_handler; + * but the old crop API will still work as expected in order to preserve + * backwards compatibility. + * Never set this flag for new drivers. ++ * @V4L2_FL_SUBDEV_RO_DEVNODE: ++ * indicates that the video device node is registered in read-only mode. ++ * The flag only applies to device nodes registered for sub-devices, it is ++ * set by the core when the sub-devices device nodes are registered with ++ * v4l2_device_register_ro_subdev_nodes() and used by the sub-device ioctl ++ * handler to restrict access to some ioctl calls. + */ + enum v4l2_video_device_flags { + V4L2_FL_REGISTERED = 0, + V4L2_FL_USES_V4L2_FH = 1, + V4L2_FL_QUIRK_INVERTED_CROP = 2, ++ V4L2_FL_SUBDEV_RO_DEVNODE = 3, + }; + + /* Priority helper functions */ +diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h +index 7c912b7d2870..64ec4de948e9 100644 +--- a/include/media/v4l2-device.h ++++ b/include/media/v4l2-device.h +@@ -174,14 +174,56 @@ int __must_check v4l2_device_register_subdev(struct v4l2_device *v4l2_dev, + void v4l2_device_unregister_subdev(struct v4l2_subdev *sd); + + /** +- * v4l2_device_register_subdev_nodes - Registers device nodes for all subdevs +- * of the v4l2 device that are marked with +- * the %V4L2_SUBDEV_FL_HAS_DEVNODE flag. ++ * __v4l2_device_register_ro_subdev_nodes - Registers device nodes for ++ * all subdevs of the v4l2 device that are marked with the ++ * %V4L2_SUBDEV_FL_HAS_DEVNODE flag. + * + * @v4l2_dev: pointer to struct v4l2_device ++ * @read_only: subdevices read-only flag. True to register the subdevices ++ * device nodes in read-only mode, false to allow full access to the ++ * subdevice userspace API. + */ + int __must_check +-v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev); ++__v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev, ++ bool read_only); ++ ++/** ++ * v4l2_device_register_subdev_nodes - Registers subdevices device nodes with ++ * unrestricted access to the subdevice userspace operations ++ * ++ * Internally calls __v4l2_device_register_subdev_nodes(). See its documentation ++ * for more details. ++ * ++ * @v4l2_dev: pointer to struct v4l2_device ++ */ ++static inline int __must_check ++v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) ++{ ++#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) ++ return __v4l2_device_register_subdev_nodes(v4l2_dev, false); ++#else ++ return 0; ++#endif ++} ++ ++/** ++ * v4l2_device_register_ro_subdev_nodes - Registers subdevices device nodes ++ * in read-only mode ++ * ++ * Internally calls __v4l2_device_register_subdev_nodes(). See its documentation ++ * for more details. ++ * ++ * @v4l2_dev: pointer to struct v4l2_device ++ */ ++static inline int __must_check ++v4l2_device_register_ro_subdev_nodes(struct v4l2_device *v4l2_dev) ++{ ++#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) ++ return __v4l2_device_register_subdev_nodes(v4l2_dev, true); ++#else ++ return 0; ++#endif ++} + + /** + * v4l2_subdev_notify - Sends a notification to v4l2_device. + +From c5a7a6073492bc86823e9078f978ce2d91dde923 Mon Sep 17 00:00:00 2001 +From: Jacopo Mondi +Date: Sat, 9 May 2020 11:04:48 +0200 +Subject: [PATCH] media: v4l2-ctrls: Add camera orientation and rotation + +Add support for the newly defined V4L2_CID_CAMERA_ORIENTATION +and V4L2_CID_CAMERA_SENSOR_ROTATION read-only controls used to report +the camera device mounting position and orientation respectively. + +Reviewed-by: Laurent Pinchart +Signed-off-by: Jacopo Mondi +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 926645d43fd43622a2b056471a2cf41cc19cbf4c) +--- + drivers/media/v4l2-core/v4l2-ctrls.c | 13 +++++++++++++ + include/uapi/linux/v4l2-controls.h | 7 +++++++ + 2 files changed, 20 insertions(+) + +diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c +index 1c617b42a944..92c3e39efc28 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls.c +@@ -583,6 +583,12 @@ const char * const *v4l2_ctrl_get_menu(u32 id) + "Annex B Start Code", + NULL, + }; ++ static const char * const camera_orientation[] = { ++ "Front", ++ "Back", ++ "External", ++ NULL, ++ }; + + switch (id) { + case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: +@@ -708,6 +714,8 @@ const char * const *v4l2_ctrl_get_menu(u32 id) + return hevc_decode_mode; + case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: + return hevc_start_code; ++ case V4L2_CID_CAMERA_ORIENTATION: ++ return camera_orientation; + default: + return NULL; + } +@@ -1020,6 +1028,8 @@ const char *v4l2_ctrl_get_name(u32 id) + case V4L2_CID_PAN_SPEED: return "Pan, Speed"; + case V4L2_CID_TILT_SPEED: return "Tilt, Speed"; + case V4L2_CID_UNIT_CELL_SIZE: return "Unit Cell Size"; ++ case V4L2_CID_CAMERA_ORIENTATION: return "Camera Orientation"; ++ case V4L2_CID_CAMERA_SENSOR_ROTATION: return "Camera Sensor Rotation"; + + /* FM Radio Modulator controls */ + /* Keep the order of the 'case's the same as in v4l2-controls.h! */ +@@ -1293,6 +1303,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, + case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: + case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: + case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: ++ case V4L2_CID_CAMERA_ORIENTATION: + *type = V4L2_CTRL_TYPE_MENU; + break; + case V4L2_CID_LINK_FREQ: +@@ -1482,6 +1493,8 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, + case V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT: + case V4L2_CID_RDS_RX_TRAFFIC_PROGRAM: + case V4L2_CID_RDS_RX_MUSIC_SPEECH: ++ case V4L2_CID_CAMERA_ORIENTATION: ++ case V4L2_CID_CAMERA_SENSOR_ROTATION: + *flags |= V4L2_CTRL_FLAG_READ_ONLY; + break; + case V4L2_CID_RF_TUNER_PLL_LOCK: +diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h +index 0ba1005c9651..62271418c1be 100644 +--- a/include/uapi/linux/v4l2-controls.h ++++ b/include/uapi/linux/v4l2-controls.h +@@ -923,6 +923,13 @@ enum v4l2_auto_focus_range { + #define V4L2_CID_PAN_SPEED (V4L2_CID_CAMERA_CLASS_BASE+32) + #define V4L2_CID_TILT_SPEED (V4L2_CID_CAMERA_CLASS_BASE+33) + ++#define V4L2_CID_CAMERA_ORIENTATION (V4L2_CID_CAMERA_CLASS_BASE+34) ++#define V4L2_CAMERA_ORIENTATION_FRONT 0 ++#define V4L2_CAMERA_ORIENTATION_BACK 1 ++#define V4L2_CAMERA_ORIENTATION_EXTERNAL 2 ++ ++#define V4L2_CID_CAMERA_SENSOR_ROTATION (V4L2_CID_CAMERA_CLASS_BASE+35) ++ + /* FM Modulator class control IDs */ + + #define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900) + +From b3c5ddc2e3fed3ed89a69a484616af9851a2f744 Mon Sep 17 00:00:00 2001 +From: Jacopo Mondi +Date: Sat, 9 May 2020 11:04:51 +0200 +Subject: [PATCH] media: v4l2-ctrls: Sort includes alphabetically + +Before adding a new include directive, sort the existing ones in +alphabetical order. + +Signed-off-by: Jacopo Mondi +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit e0837a6c08e127d8a7b765decc16abbed26589e1) +--- + drivers/media/v4l2-core/v4l2-ctrls.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c +index 92c3e39efc28..4273d56dac65 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls.c +@@ -9,14 +9,14 @@ + #define pr_fmt(fmt) "v4l2-ctrls: " fmt + + #include ++#include + #include + #include +-#include +-#include +-#include + #include +-#include + #include ++#include ++#include ++#include + + #define dprintk(vdev, fmt, arg...) do { \ + if (!WARN_ON(!(vdev)) && ((vdev)->dev_debug & V4L2_DEV_DEBUG_CTRL)) \ + +From 4b054d75be72ba60f23a1721c5aeb51030af7e27 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 27 May 2020 00:25:15 +0200 +Subject: [PATCH] media: v4l2-ctrls: Unset correct HEVC loop filter flag + +Wrong loop filter flag is unset when tiles enabled flag is not set, +this cause HEVC decoding issues with Rockchip Video Decoder. + +Fix this by unsetting the loop filter across tiles enabled flag instead of +the pps loop filter across slices enabled flag when tiles are disabled. + +Fixes: 256fa3920874 ("media: v4l: Add definitions for HEVC stateless decoding") +Signed-off-by: Jonas Karlman +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 88441917dc6cd995cb993df603e264f5b88be50c) +--- + drivers/media/v4l2-core/v4l2-ctrls.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c +index 4273d56dac65..47b195a974e6 100644 +--- a/drivers/media/v4l2-core/v4l2-ctrls.c ++++ b/drivers/media/v4l2-core/v4l2-ctrls.c +@@ -1843,7 +1843,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, + sizeof(p_hevc_pps->row_height_minus1)); + + p_hevc_pps->flags &= +- ~V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED; ++ ~V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED; + } + + if (p_hevc_pps->flags & + +From 7e2b4a7ef9b0d8f5613de16bfbbf9a28058f7444 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 22 May 2020 22:21:33 +0200 +Subject: [PATCH] media: rkvdec: Fix H264 scaling list order + +The Rockchip Video Decoder driver is expecting that the values in a +scaling list are in zig-zag order and applies the inverse scanning process +to get the values in matrix order. + +Commit 0b0393d59eb4 ("media: uapi: h264: clarify expected +scaling_list_4x4/8x8 order") clarified that the values in the scaling list +should already be in matrix order. + +Fix this by removing the reordering and change to use two memcpy. + +Fixes: cd33c830448b ("media: rkvdec: Add the rkvdec driver") +Signed-off-by: Jonas Karlman +Tested-by: Nicolas Dufresne +Reviewed-by: Ezequiel Garcia +[hverkuil-cisco@xs4all.nl: rkvdec_scaling_matrix -> rkvdec_h264_scaling_list] +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 2630e1bb0948c3134c6f22ad275ae27cc6023532) +--- + drivers/staging/media/rkvdec/rkvdec-h264.c | 70 ++++++++++-------------------- + 1 file changed, 22 insertions(+), 48 deletions(-) + +diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c +index cd4980d06be7..7b66e2743a4f 100644 +--- a/drivers/staging/media/rkvdec/rkvdec-h264.c ++++ b/drivers/staging/media/rkvdec/rkvdec-h264.c +@@ -18,11 +18,16 @@ + /* Size with u32 units. */ + #define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128) + #define RKV_RPS_SIZE ((128 + 128) / 4) +-#define RKV_SCALING_LIST_SIZE (6 * 16 + 6 * 64 + 128) + #define RKV_ERROR_INFO_SIZE (256 * 144 * 4) + + #define RKVDEC_NUM_REFLIST 3 + ++struct rkvdec_h264_scaling_list { ++ u8 scaling_list_4x4[6][16]; ++ u8 scaling_list_8x8[6][64]; ++ u8 padding[128]; ++}; ++ + struct rkvdec_sps_pps_packet { + u32 info[8]; + }; +@@ -86,7 +91,7 @@ struct rkvdec_ps_field { + /* Data structure describing auxiliary buffer format. */ + struct rkvdec_h264_priv_tbl { + s8 cabac_table[4][464][2]; +- u8 scaling_list[RKV_SCALING_LIST_SIZE]; ++ struct rkvdec_h264_scaling_list scaling_list; + u32 rps[RKV_RPS_SIZE]; + struct rkvdec_sps_pps_packet param_set[256]; + u8 err_info[RKV_ERROR_INFO_SIZE]; +@@ -785,56 +790,25 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx, + } + } + +-/* +- * NOTE: The values in a scaling list are in zig-zag order, apply inverse +- * scanning process to get the values in matrix order. +- */ +-static const u32 zig_zag_4x4[16] = { +- 0, 1, 4, 8, 5, 2, 3, 6, 9, 12, 13, 10, 7, 11, 14, 15 +-}; +- +-static const u32 zig_zag_8x8[64] = { +- 0, 1, 8, 16, 9, 2, 3, 10, 17, 24, 32, 25, 18, 11, 4, 5, +- 12, 19, 26, 33, 40, 48, 41, 34, 27, 20, 13, 6, 7, 14, 21, 28, +- 35, 42, 49, 56, 57, 50, 43, 36, 29, 22, 15, 23, 30, 37, 44, 51, +- 58, 59, 52, 45, 38, 31, 39, 46, 53, 60, 61, 54, 47, 55, 62, 63 +-}; +- +-static void reorder_scaling_list(struct rkvdec_ctx *ctx, +- struct rkvdec_h264_run *run) ++static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx, ++ struct rkvdec_h264_run *run) + { + const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix; +- const size_t num_list_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4); +- const size_t list_len_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4[0]); +- const size_t num_list_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8); +- const size_t list_len_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8[0]); + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; +- u8 *dst = tbl->scaling_list; +- const u8 *src; +- int i, j; +- +- BUILD_BUG_ON(ARRAY_SIZE(zig_zag_4x4) != list_len_4x4); +- BUILD_BUG_ON(ARRAY_SIZE(zig_zag_8x8) != list_len_8x8); +- BUILD_BUG_ON(ARRAY_SIZE(tbl->scaling_list) < +- num_list_4x4 * list_len_4x4 + +- num_list_8x8 * list_len_8x8); +- +- src = &scaling->scaling_list_4x4[0][0]; +- for (i = 0; i < num_list_4x4; ++i) { +- for (j = 0; j < list_len_4x4; ++j) +- dst[zig_zag_4x4[j]] = src[j]; +- src += list_len_4x4; +- dst += list_len_4x4; +- } + +- src = &scaling->scaling_list_8x8[0][0]; +- for (i = 0; i < num_list_8x8; ++i) { +- for (j = 0; j < list_len_8x8; ++j) +- dst[zig_zag_8x8[j]] = src[j]; +- src += list_len_8x8; +- dst += list_len_8x8; +- } ++ BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_4x4) != ++ sizeof(scaling->scaling_list_4x4)); ++ BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_8x8) != ++ sizeof(scaling->scaling_list_8x8)); ++ ++ memcpy(tbl->scaling_list.scaling_list_4x4, ++ scaling->scaling_list_4x4, ++ sizeof(scaling->scaling_list_4x4)); ++ ++ memcpy(tbl->scaling_list.scaling_list_8x8, ++ scaling->scaling_list_8x8, ++ sizeof(scaling->scaling_list_8x8)); + } + + /* +@@ -1126,7 +1100,7 @@ static int rkvdec_h264_run(struct rkvdec_ctx *ctx) + v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, + h264_ctx->reflists.b1); + +- reorder_scaling_list(ctx, &run); ++ assemble_hw_scaling_list(ctx, &run); + assemble_hw_pps(ctx, &run); + assemble_hw_rps(ctx, &run); + config_registers(ctx, &run); diff --git a/projects/Rockchip/patches/linux/default/linux-0013-v4l2-from-list.patch b/projects/Rockchip/patches/linux/default/linux-0013-v4l2-from-list.patch deleted file mode 100644 index e172aa31aa..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0013-v4l2-from-list.patch +++ /dev/null @@ -1,3200 +0,0 @@ -From b41e50d97d4800265a80c2469cfa21912e27d585 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Tue, 5 May 2020 10:41:08 -0300 -Subject: [PATCH] media: rkvdec: Fix .buf_prepare - -The driver should only set the payload on .buf_prepare -if the buffer is CAPTURE type, or if an OUTPUT buffer -has a zeroed payload. - -Fix it. - -Fixes: cd33c830448ba ("media: rkvdec: Add the rkvdec driver") -Signed-off-by: Ezequiel Garcia ---- - drivers/staging/media/rkvdec/rkvdec.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 225eeca73356..4df2a248ab96 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.c -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -456,7 +456,15 @@ static int rkvdec_buf_prepare(struct vb2_buffer *vb) - if (vb2_plane_size(vb, i) < sizeimage) - return -EINVAL; - } -- vb2_set_plane_payload(vb, 0, f->fmt.pix_mp.plane_fmt[0].sizeimage); -+ -+ /* -+ * Buffer's bytesused is written by the driver for CAPTURE buffers, -+ * or if the application passed zero bytesused on an OUTPUT buffer. -+ */ -+ if (!V4L2_TYPE_IS_OUTPUT(vq->type) || -+ (V4L2_TYPE_IS_OUTPUT(vq->type) && !vb2_get_plane_payload(vb, 0))) -+ vb2_set_plane_payload(vb, 0, -+ f->fmt.pix_mp.plane_fmt[0].sizeimage); - return 0; - } - - -From 4580f19002026f41d4ef242af8660fbc1e6b4aa3 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Tue, 5 May 2020 10:41:09 -0300 -Subject: [PATCH] media: uapi: Add VP9 stateless decoder controls - -Add the VP9 stateless decoder controls plus the documentation that goes -with it. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia ---- - Documentation/media/uapi/v4l/biblio.rst | 10 + - Documentation/media/uapi/v4l/ext-ctrls-codec.rst | 581 +++++++++++++++++++++++ - drivers/media/v4l2-core/v4l2-ctrls.c | 242 ++++++++++ - drivers/media/v4l2-core/v4l2-ioctl.c | 1 + - include/media/v4l2-ctrls.h | 1 + - include/media/vp9-ctrls.h | 510 ++++++++++++++++++++ - 6 files changed, 1345 insertions(+) - create mode 100644 include/media/vp9-ctrls.h - -diff --git a/Documentation/media/uapi/v4l/biblio.rst b/Documentation/media/uapi/v4l/biblio.rst -index 8095f57d3d75..f89341350b6d 100644 ---- a/Documentation/media/uapi/v4l/biblio.rst -+++ b/Documentation/media/uapi/v4l/biblio.rst -@@ -414,3 +414,13 @@ VP8 - :title: RFC 6386: "VP8 Data Format and Decoding Guide" - - :author: J. Bankoski et al. -+ -+.. _vp9: -+ -+VP9 -+=== -+ -+ -+:title: VP9 Bitstream & Decoding Process Specification -+ -+:author: Adrian Grange (Google), Peter de Rivaz (Argon Design), Jonathan Hunt (Argon Design) -diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -index d4fc5f25aa14..54aa68bca4a6 100644 ---- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -@@ -2658,6 +2658,587 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - - - ``padding[3]`` - - Applications and drivers must set this to zero. - -+.. _v4l2-mpeg-vp9: -+ -+``V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0..3) (struct)`` -+ Stores VP9 probabilities attached to a specific frame context. The VP9 -+ specification allows using a maximum of 4 contexts. Each frame being -+ decoded refers to one of those context. See section '7.1.2 Refresh -+ probs semantics' section of :ref:`vp9` for more details about these -+ contexts. -+ -+ This control is bi-directional: -+ -+ * all 4 contexts must be initialized by userspace just after the -+ stream is started and before the first decoding request is submitted -+ * the referenced context might be read by the kernel when a decoding -+ request is submitted, and will be updated after the decoder is done -+ decoding the frame if the `V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX` flag -+ is set. -+ * contexts will be read back by user space before each decoding request -+ to retrieve the updated probabilities. -+ * userspace will re-initialize the context to their default values when -+ a reset context is required. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_vp9_frame_ctx -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{5.8cm}|p{4.8cm}|p{6.6cm}| -+ -+.. flat-table:: struct v4l2_ctrl_vp9_frame_ctx -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - struct :c:type:`v4l2_vp9_probabilities` -+ - ``probs`` -+ - Structure with VP9 probabilities attached to the context. -+ -+.. c:type:: v4l2_vp9_probabilities -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_probabilities -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``tx8[2][1]`` -+ - TX 8x8 probabilities. -+ * - __u8 -+ - ``tx16[2][2]`` -+ - TX 16x16 probabilities. -+ * - __u8 -+ - ``tx32[2][3]`` -+ - TX 32x32 probabilities. -+ * - __u8 -+ - ``coef[4][2][2][6][6][3]`` -+ - Coefficient probabilities. -+ * - __u8 -+ - ``skip[3]`` -+ - Skip probabilities. -+ * - __u8 -+ - ``inter_mode[7][3]`` -+ - Inter prediction mode probabilities. -+ * - __u8 -+ - ``interp_filter[4][2]`` -+ - Interpolation filter probabilities. -+ * - __u8 -+ - ``is_inter[4]`` -+ - Is inter-block probabilities. -+ * - __u8 -+ - ``comp_mode[5]`` -+ - Compound prediction mode probabilities. -+ * - __u8 -+ - ``single_ref[5][2]`` -+ - Single reference probabilities. -+ * - __u8 -+ - ``comp_mode[5]`` -+ - Compound reference probabilities. -+ * - __u8 -+ - ``y_mode[4][9]`` -+ - Y prediction mode probabilities. -+ * - __u8 -+ - ``uv_mode[10][9]`` -+ - UV prediction mode probabilities. -+ * - __u8 -+ - ``partition[16][3]`` -+ - Partition probabilities. -+ * - __u8 -+ - ``mv.joint[3]`` -+ - Motion vector joint probabilities. -+ * - __u8 -+ - ``mv.sign[2]`` -+ - Motion vector sign probabilities. -+ * - __u8 -+ - ``mv.class[2][10]`` -+ - Motion vector class probabilities. -+ * - __u8 -+ - ``mv.class0_bit[2]`` -+ - Motion vector class0 bit probabilities. -+ * - __u8 -+ - ``mv.bits[2][10]`` -+ - Motion vector bits probabilities. -+ * - __u8 -+ - ``mv.class0_fr[2][2][3]`` -+ - Motion vector class0 fractional bit probabilities. -+ * - __u8 -+ - ``mv.fr[2][3]`` -+ - Motion vector fractional bit probabilities. -+ * - __u8 -+ - ``mv.class0_hp[2]`` -+ - Motion vector class0 high precision fractional bit probabilities. -+ * - __u8 -+ - ``mv.hp[2]`` -+ - Motion vector high precision fractional bit probabilities. -+ -+``V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS (struct)`` -+ Specifies the frame parameters for the associated VP9 frame decode request. -+ This includes the necessary parameters for configuring a stateless hardware -+ decoding pipeline for VP9. The bitstream parameters are defined according -+ to :ref:`vp9`. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_vp9_frame_decode_params -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_ctrl_vp9_frame_decode_params -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u32 -+ - ``flags`` -+ - Combination of V4L2_VP9_FRAME_FLAG_* flags. See -+ :c:type:`v4l2_vp9_frame_flags`. -+ * - __u16 -+ - ``compressed_header_size`` -+ - Compressed header size in bytes. -+ * - __u16 -+ - ``uncompressed_header_size`` -+ - Uncompressed header size in bytes. -+ * - __u8 -+ - ``profile`` -+ - VP9 profile. Can be 0, 1, 2 or 3. -+ * - __u8 -+ - ``reset_frame_context`` -+ - Frame context that should be used/updated when decoding the frame. -+ * - __u8 -+ - ``bit_depth`` -+ - Component depth in bits. Must be 8 for profile 0 and 1. Must 10 or 12 -+ for profile 2 and 3. -+ * - __u8 -+ - ``color_space`` -+ - Specifies the color space of the stream. See V4L2_VP9_COLOR_SPACE_* -+ values. See :c:type:`v4l2_vp9_color_space` -+ * - __u8 -+ - ``interpolation_filter`` -+ - Specifies the filter selection used for performing inter prediction. See -+ :c:type:`v4l2_vp9_interpolation_filter`. -+ * - __u8 -+ - ``tile_cols_log2`` -+ - Specifies the base 2 logarithm of the width of each tile (where the -+ width is measured in units of 8x8 blocks). Shall be less than or equal -+ to 6. -+ * - __u8 -+ - ``tile_rows_log2`` -+ - Specifies the base 2 logarithm of the height of each tile (where the -+ height is measured in units of 8x8 blocks) -+ * - __u8 -+ - ``tx_mode`` -+ - Specifies the TX mode. See :c:type:`v4l2_vp9_tx_mode`. -+ * - __u8 -+ - ``reference_mode`` -+ - Specifies the type of inter prediction to be used. See -+ :c:type:`v4l2_vp9_reference_mode`. -+ * - __u8 -+ - ``padding`` -+ - Needed to make this struct 64 bit aligned. Shall be filled with zeros. -+ * - __u16 -+ - ``frame_width_minus_1`` -+ - Add 1 to get the frame width expressed in pixels. -+ * - __u16 -+ - ``frame_height_minus_1`` -+ - Add 1 to to get the frame height expressed in pixels. -+ * - __u16 -+ - ``frame_width_minus_1`` -+ - Add 1 to to get the expected render width expressed in pixels. This is -+ not used during the decoding process but might be used by HW scalers to -+ prepare a frame that's ready for scanout. -+ * - __u16 -+ - frame_height_minus_1 -+ - Add 1 to get the expected render height expressed in pixels. This is -+ not used during the decoding process but might be used by HW scalers to -+ prepare a frame that's ready for scanout. -+ * - __u64 -+ - ``refs[3]`` -+ - Array of reference frame timestamps. -+ * - struct :c:type:`v4l2_vp9_loop_filter` -+ - ``lf`` -+ - Loop filter parameters. See struct :c:type:`v4l2_vp9_loop_filter`. -+ * - struct :c:type:`v4l2_vp9_quantization` -+ - ``quant`` -+ - Quantization parameters. See :c:type:`v4l2_vp9_quantization`. -+ * - struct :c:type:`v4l2_vp9_segmentation` -+ - ``seg`` -+ - Segmentation parameters. See :c:type:`v4l2_vp9_segmentation`. -+ * - struct :c:type:`v4l2_vp9_probabilities` -+ - ``probs`` -+ - Probabilities. See :c:type:`v4l2_vp9_probabilities`. -+ -+.. c:type:: v4l2_vp9_frame_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_frame_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_FRAME_FLAG_KEY_FRAME`` -+ - The frame is a key frame. -+ * - ``V4L2_VP9_FRAME_FLAG_SHOW_FRAME`` -+ - The frame should be displayed. -+ * - ``V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT`` -+ - The decoding should be error resilient. -+ * - ``V4L2_VP9_FRAME_FLAG_INTRA_ONLY`` -+ - The frame does not reference other frames. -+ * - ``V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV`` -+ - the frame might can high precision motion vectors. -+ * - ``V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX`` -+ - Frame context should be updated after decoding. -+ * - ``V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE`` -+ - Parallel decoding is used. -+ * - ``V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING`` -+ - Vertical subsampling is enabled. -+ * - ``V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING`` -+ - Horizontal subsampling is enabled. -+ * - ``V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING`` -+ - The full UV range is used. -+ -+.. c:type:: v4l2_vp9_ref_id -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_ref_id -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_REF_ID_LAST`` -+ - Last reference frame. -+ * - ``V4L2_REF_ID_GOLDEN`` -+ - Golden reference frame. -+ * - ``V4L2_REF_ID_ALTREF`` -+ - Alternative reference frame. -+ * - ``V4L2_REF_ID_CNT`` -+ - Number of reference frames. -+ -+.. c:type:: v4l2_vp9_tx_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_tx_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_TX_MODE_ONLY_4X4`` -+ - Transform size is 4x4. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_8X8`` -+ - Transform size can be up to 8x8. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_16X16`` -+ - Transform size can be up to 16x16. -+ * - ``V4L2_VP9_TX_MODE_ALLOW_32X32`` -+ - transform size can be up to 32x32. -+ * - ``V4L2_VP9_TX_MODE_SELECT`` -+ - Bitstream contains transform size for each block. -+ -+.. c:type:: v4l2_vp9_reference_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_reference_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_REF_MODE_SINGLE`` -+ - Indicates that all the inter blocks use only a single reference frame -+ to generate motion compensated prediction. -+ * - ``V4L2_VP9_REF_MODE_COMPOUND`` -+ - Requires all the inter blocks to use compound mode. Single reference -+ frame prediction is not allowed. -+ * - ``V4L2_VP9_REF_MODE_SELECT`` -+ - Allows each individual inter block to select between single and -+ compound prediction modes. -+ -+.. c:type:: v4l2_vp9_interpolation_filter -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_interpolation_filter -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP`` -+ - Height tap filter. -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH`` -+ - Height tap smooth filter. -+ * - ``V4L2_VP9_INTERP_FILTER_8TAP_SHARP`` -+ - Height tap sharp filter. -+ * - ``V4L2_VP9_INTERP_FILTER_BILINEAR`` -+ - Bilinear filter. -+ * - ``V4L2_VP9_INTERP_FILTER_SWITCHABLE`` -+ - Filter selection is signaled at the block level. -+ -+.. c:type:: v4l2_vp9_color_space -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_color_space -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_COLOR_SPACE_UNKNOWN`` -+ - Unknown color space. In this case the color space must be signaled -+ outside the VP9 bitstream. -+ * - ``V4L2_VP9_COLOR_SPACE_BT_601`` -+ - Rec. ITU-R BT.601-7 color space. -+ * - ``V4L2_VP9_COLOR_SPACE_BT_709`` -+ - Rec. ITU-R BT.709-6 color space. -+ * - ``V4L2_VP9_COLOR_SPACE_SMPTE_170`` -+ - SMPTE-170 color space. -+ * - ``V4L2_VP9_COLOR_SPACE_SMPTE_240`` -+ - SMPTE-240 color space. -+ * - ``V4L2_VP9_COLOR_SPACE_BT_2020`` -+ - Rec. ITU-R BT.2020-2 color space. -+ * - ``V4L2_VP9_COLOR_SPACE_RESERVED`` -+ - Reserved. This value shall never be passed. -+ * - ``V4L2_VP9_COLOR_SPACE_SRGB`` -+ - sRGB (IEC 61966-2-1) color space. -+ -+.. c:type:: v4l2_vp9_reset_frame_context -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_reset_frame_context -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_RESET_FRAME_CTX_NONE`` -+ - Do not reset any frame context. -+ * - ``V4L2_VP9_RESET_FRAME_CTX_SPEC`` -+ - Reset the frame context pointed by -+ :c:type:`v4l2_ctrl_vp9_frame_decode_params`.frame_context_idx. -+ * - ``V4L2_VP9_RESET_FRAME_CTX_ALL`` -+ - Reset all frame contexts. -+ -+.. c:type:: v4l2_vp9_intra_prediction_mode -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_intra_prediction_mode -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_INTRA_PRED_DC`` -+ - DC intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_V`` -+ - Vertical intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_H`` -+ - Horizontal intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D45`` -+ - D45 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D135`` -+ - D135 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D117`` -+ - D117 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D153`` -+ - D153 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D207`` -+ - D207 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_D63`` -+ - D63 intra prediction. -+ * - ``V4L2_VP9_INTRA_PRED_MODE_TM`` -+ - True motion intra prediction. -+ -+.. c:type:: v4l2_vp9_segmentation -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_segmentation -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``flags`` -+ - Combination of V4L2_VP9_SEGMENTATION_FLAG_* flags. See -+ :c:type:`v4l2_vp9_segmentation_flags`. -+ * - __u8 -+ - ``tree_probs[7]`` -+ - Specifies the probability values to be used when decoding segment_id. -+ * - __u8 -+ - ``pred_prob[3]`` -+ - Specifies the probability values to be used when decoding -+ seg_id_predicte. -+ * - __u8 -+ - ``padding[5]`` -+ - Used to align this struct on 64 bit. Shall be filled with zeros. -+ * - __u8 -+ - ``feature_enabled[8]`` -+ - Bitmask defining which features are enabled in each segment. -+ * - __u8 -+ - ``feature_data[8][4]`` -+ - Data attached to each feature. Data entry is only valid if the feature -+ is enabled. -+ -+.. c:type:: v4l2_vp9_segment_feature -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_segment_feature -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_SEGMENT_FEATURE_QP_DELTA`` -+ - QP delta segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_LF`` -+ - Loop filter segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_REF_FRAME`` -+ - Reference frame segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_SKIP`` -+ - Skip segment feature. -+ * - ``V4L2_VP9_SEGMENT_FEATURE_CNT`` -+ - Number of segment features. -+ -+.. c:type:: v4l2_vp9_segmentation_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_segmentation_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_ENABLED`` -+ - Indicates that this frame makes use of the segmentation tool. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP`` -+ - Indicates that the segmentation map should be updated during the -+ decoding of this frame. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE`` -+ - Indicates that the updates to the segmentation map are coded -+ relative to the existing segmentation map. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA`` -+ - Indicates that new parameters are about to be specified for each -+ segment. -+ * - ``V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE`` -+ - Indicates that the segmentation parameters represent the actual values -+ to be used. -+ -+.. c:type:: v4l2_vp9_quantization -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_quantization -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``base_q_idx`` -+ - Indicates the base frame qindex. -+ * - __s8 -+ - ``delta_q_y_dc`` -+ - Indicates the Y DC quantizer relative to base_q_idx. -+ * - __s8 -+ - ``delta_q_uv_dc`` -+ - Indicates the UV DC quantizer relative to base_q_idx. -+ * - __s8 -+ - ``delta_q_uv_ac`` -+ - Indicates the UV AC quantizer relative to base_q_idx. -+ * - __u8 -+ - ``padding[4]`` -+ - Padding bytes used to align this struct on 64 bit. Must be set to 0. -+ -+.. c:type:: v4l2_vp9_loop_filter -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: struct v4l2_vp9_loop_filter -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``flags`` -+ - Combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags. -+ See :c:type:`v4l2_vp9_loop_filter_flags`. -+ * - __u8 -+ - ``level`` -+ - Indicates the loop filter strength. -+ * - __u8 -+ - ``sharpness`` -+ - Indicates the sharpness level. -+ * - __s8 -+ - ``ref_deltas[4]`` -+ - Contains the adjustment needed for the filter level based on the chosen -+ reference frame. -+ * - __s8 -+ - ``mode_deltas[2]`` -+ - Contains the adjustment needed for the filter level based on the chosen -+ mode -+ * - __u8 -+ - ``lvl_lookup[8][4][2]`` -+ - Level lookup table. -+ -+ -+.. c:type:: v4l2_vp9_loop_filter_flags -+ -+.. cssclass:: longtable -+ -+.. tabularcolumns:: |p{1.5cm}|p{6.3cm}|p{9.4cm}| -+ -+.. flat-table:: enum v4l2_vp9_loop_filter_flags -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 2 -+ -+ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED`` -+ - When set, the filter level depends on the mode and reference frame used -+ to predict a block. -+ * - ``V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE`` -+ - When set, the bitstream contains additional syntax elements that -+ specify which mode and reference frame deltas are to be updated. -+ - .. raw:: latex - - \normalsize -diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c -index 1c617b42a944..474be1d1aaf0 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls.c -@@ -930,6 +930,11 @@ const char *v4l2_ctrl_get_name(u32 id) - case V4L2_CID_MPEG_VIDEO_VP8_PROFILE: return "VP8 Profile"; - case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: return "VP9 Profile"; - case V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER: return "VP8 Frame Header"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS: return "VP9 Frame Decode Parameters"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0): return "VP9 Frame Context 0"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(1): return "VP9 Frame Context 1"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(2): return "VP9 Frame Context 2"; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(3): return "VP9 Frame Context 3"; - - /* HEVC controls */ - case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value"; -@@ -1403,6 +1408,15 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, - case V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER: - *type = V4L2_CTRL_TYPE_VP8_FRAME_HEADER; - break; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS: -+ *type = V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS; -+ break; -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0): -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(1): -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(2): -+ case V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(3): -+ *type = V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT; -+ break; - case V4L2_CID_MPEG_VIDEO_HEVC_SPS: - *type = V4L2_CTRL_TYPE_HEVC_SPS; - break; -@@ -1703,6 +1717,222 @@ static void std_log(const struct v4l2_ctrl *ctrl) - 0; \ - }) - -+static int -+validate_vp9_lf_params(struct v4l2_vp9_loop_filter *lf) -+{ -+ unsigned int i, j, k; -+ -+ if (lf->flags & -+ ~(V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED | -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED implies -+ * V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE. -+ */ -+ if (lf->flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE && -+ !(lf->flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED)) -+ return -EINVAL; -+ -+ /* That all values are in the accepted range. */ -+ if (lf->level > GENMASK(5, 0)) -+ return -EINVAL; -+ -+ if (lf->sharpness > GENMASK(2, 0)) -+ return -EINVAL; -+ -+ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { -+ if (lf->ref_deltas[i] < -63 || lf->ref_deltas[i] > 63) -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { -+ if (lf->mode_deltas[i] < -63 || lf->mode_deltas[i] > 63) -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(lf->lvl_lookup); i++) { -+ for (j = 0; j < ARRAY_SIZE(lf->lvl_lookup[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(lf->lvl_lookup[0][0]); k++) { -+ if (lf->lvl_lookup[i][j][k] > 63) -+ return -EINVAL; -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+static int -+validate_vp9_quant_params(struct v4l2_vp9_quantization *quant) -+{ -+ if (quant->delta_q_y_dc < -15 || quant->delta_q_y_dc > 15 || -+ quant->delta_q_uv_dc < -15 || quant->delta_q_uv_dc > 15 || -+ quant->delta_q_uv_ac < -15 || quant->delta_q_uv_ac > 15) -+ return -EINVAL; -+ -+ memset(quant->padding, 0, sizeof(quant->padding)); -+ return 0; -+} -+ -+static int -+validate_vp9_seg_params(struct v4l2_vp9_segmentation *seg) -+{ -+ unsigned int i, j; -+ -+ if (seg->flags & -+ ~(V4L2_VP9_SEGMENTATION_FLAG_ENABLED | -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP | -+ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE | -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA | -+ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP and -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA imply -+ * V4L2_VP9_SEGMENTATION_FLAG_ENABLED. -+ */ -+ if ((seg->flags & -+ (V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP | -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA)) && -+ !(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE implies -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP. -+ */ -+ if (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE && -+ !(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP)) -+ return -EINVAL; -+ -+ /* -+ * V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE implies -+ * V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA. -+ */ -+ if (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE && -+ !(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA)) -+ return -EINVAL; -+ -+ for (i = 0; i < ARRAY_SIZE(seg->feature_enabled); i++) { -+ if (seg->feature_enabled[i] & -+ ~(V4L2_VP9_SEGMENT_FEATURE_QP_DELTA | -+ V4L2_VP9_SEGMENT_FEATURE_LF | -+ V4L2_VP9_SEGMENT_FEATURE_REF_FRAME | -+ V4L2_VP9_SEGMENT_FEATURE_SKIP)) -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(seg->feature_data); i++) { -+ const int range[] = {255, 63, 3, 0}; -+ -+ for (j = 0; j < ARRAY_SIZE(seg->feature_data[j]); j++) { -+ if (seg->feature_data[i][j] < -range[j] || -+ seg->feature_data[i][j] > range[j]) -+ return -EINVAL; -+ } -+ } -+ -+ memset(seg->padding, 0, sizeof(seg->padding)); -+ return 0; -+} -+ -+static int -+validate_vp9_frame_decode_params(struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ int ret; -+ -+ /* Make sure we're not passed invalid flags. */ -+ if (dec_params->flags & -+ ~(V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_SHOW_FRAME | -+ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY | -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV | -+ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX | -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE | -+ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING | -+ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING | -+ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING)) -+ return -EINVAL; -+ -+ /* -+ * The refresh context and error resilient flags are mutually exclusive. -+ * Same goes for parallel decoding and error resilient modes. -+ */ -+ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT && -+ dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX | -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) -+ return -EINVAL; -+ -+ if (dec_params->profile > V4L2_VP9_PROFILE_MAX) -+ return -EINVAL; -+ -+ if (dec_params->reset_frame_context > V4L2_VP9_RESET_FRAME_CTX_ALL) -+ return -EINVAL; -+ -+ if (dec_params->frame_context_idx >= V4L2_VP9_NUM_FRAME_CTX) -+ return -EINVAL; -+ -+ /* -+ * Profiles 0 and 1 only support 8-bit depth, profiles 2 and 3 only 10 -+ * and 12 bit depths. -+ */ -+ if ((dec_params->profile < 2 && dec_params->bit_depth != 8) || -+ (dec_params->profile >= 2 && -+ (dec_params->bit_depth != 10 && dec_params->bit_depth != 12))) -+ return -EINVAL; -+ -+ /* Profile 0 and 2 only accept YUV 4:2:0. */ -+ if ((dec_params->profile == 0 || dec_params->profile == 2) && -+ (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) || -+ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) -+ return -EINVAL; -+ -+ /* Profile 1 and 3 only accept YUV 4:2:2, 4:4:0 and 4:4:4. */ -+ if ((dec_params->profile == 1 || dec_params->profile == 3) && -+ ((dec_params->flags & V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING) && -+ (dec_params->flags & V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING))) -+ return -EINVAL; -+ -+ if (dec_params->color_space > V4L2_VP9_COLOR_SPACE_SRGB) -+ return -EINVAL; -+ -+ if (dec_params->interpolation_filter > V4L2_VP9_INTERP_FILTER_SWITCHABLE) -+ return -EINVAL; -+ -+ /* -+ * According to the spec, tile_cols_log2 shall be less than or equal -+ * to 6. -+ */ -+ if (dec_params->tile_cols_log2 > 6) -+ return -EINVAL; -+ -+ if (dec_params->tx_mode > V4L2_VP9_TX_MODE_SELECT) -+ return -EINVAL; -+ -+ if (dec_params->reference_mode > V4L2_VP9_REF_MODE_SELECT) -+ return -EINVAL; -+ -+ ret = validate_vp9_lf_params(&dec_params->lf); -+ if (ret) -+ return ret; -+ -+ ret = validate_vp9_quant_params(&dec_params->quant); -+ if (ret) -+ return ret; -+ -+ ret = validate_vp9_seg_params(&dec_params->seg); -+ if (ret) -+ return ret; -+ -+ memset(dec_params->padding, 0, sizeof(dec_params->padding)); -+ return 0; -+} -+ - /* Validate a new control */ - - #define zero_padding(s) \ -@@ -1799,6 +2029,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, - zero_padding(p_vp8_frame_header->coder_state); - break; - -+ case V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS: -+ return validate_vp9_frame_decode_params(p); -+ -+ case V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT: -+ break; -+ - case V4L2_CTRL_TYPE_HEVC_SPS: - p_hevc_sps = p; - -@@ -2542,6 +2778,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, - case V4L2_CTRL_TYPE_VP8_FRAME_HEADER: - elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header); - break; -+ case V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT: -+ elem_size = sizeof(struct v4l2_ctrl_vp9_frame_ctx); -+ break; -+ case V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS: -+ elem_size = sizeof(struct v4l2_ctrl_vp9_frame_decode_params); -+ break; - case V4L2_CTRL_TYPE_HEVC_SPS: - elem_size = sizeof(struct v4l2_ctrl_hevc_sps); - break; -diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c -index fbcc7a20eedf..66f9575f64df 100644 ---- a/drivers/media/v4l2-core/v4l2-ioctl.c -+++ b/drivers/media/v4l2-core/v4l2-ioctl.c -@@ -1366,6 +1366,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) - case V4L2_PIX_FMT_VP8: descr = "VP8"; break; - case V4L2_PIX_FMT_VP8_FRAME: descr = "VP8 Frame"; break; - case V4L2_PIX_FMT_VP9: descr = "VP9"; break; -+ case V4L2_PIX_FMT_VP9_FRAME: descr = "VP9 Frame"; break; - case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break; /* aka H.265 */ - case V4L2_PIX_FMT_HEVC_SLICE: descr = "HEVC Parsed Slice Data"; break; - case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */ -diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h -index 75a8daacb4c4..87d014b72256 100644 ---- a/include/media/v4l2-ctrls.h -+++ b/include/media/v4l2-ctrls.h -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - - /* forward references */ -diff --git a/include/media/vp9-ctrls.h b/include/media/vp9-ctrls.h -new file mode 100644 -index 000000000000..7c748f233f5e ---- /dev/null -+++ b/include/media/vp9-ctrls.h -@@ -0,0 +1,510 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * These are the VP9 state controls for use with stateless VP9 -+ * codec drivers. -+ * -+ * It turns out that these structs are not stable yet and will undergo -+ * more changes. So keep them private until they are stable and ready to -+ * become part of the official public API. -+ */ -+ -+#ifndef _VP9_CTRLS_H_ -+#define _VP9_CTRLS_H_ -+ -+#include -+ -+#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') -+ -+#define V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(i) (V4L2_CID_MPEG_BASE + 4000 + (i)) -+#define V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS (V4L2_CID_MPEG_BASE + 4004) -+#define V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT 0x400 -+#define V4L2_CTRL_TYPE_VP9_FRAME_DECODE_PARAMS 0x404 -+ -+/** -+ * enum v4l2_vp9_loop_filter_flags - VP9 loop filter flags -+ * -+ * @V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED: the filter level depends on -+ * the mode and reference frame used -+ * to predict a block -+ * @V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE: the bitstream contains additional -+ * syntax elements that specify which -+ * mode and reference frame deltas -+ * are to be updated -+ * -+ * Those are the flags you should pass to &v4l2_vp9_loop_filter.flags. See -+ * section '7.2.8 Loop filter semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_loop_filter_flags { -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED = 1 << 0, -+ V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE = 1 << 1, -+}; -+ -+/** -+ * struct v4l2_vp9_loop_filter - VP9 loop filter parameters -+ * -+ * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_* flags -+ * @level: indicates the loop filter strength -+ * @sharpness: indicates the sharpness level -+ * @ref_deltas: contains the adjustment needed for the filter level based on -+ * the chosen reference frame -+ * @mode_deltas: contains the adjustment needed for the filter level based on -+ * the chosen mode -+ * @lvl_lookup: level lookup table -+ * -+ * This structure contains all loop filter related parameters. See sections -+ * '7.2.8 Loop filter semantics' and '8.8.1 Loop filter frame init process' -+ * of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_loop_filter { -+ __u8 flags; -+ __u8 level; -+ __u8 sharpness; -+ __s8 ref_deltas[4]; -+ __s8 mode_deltas[2]; -+ __u8 lvl_lookup[8][4][2]; -+}; -+ -+/** -+ * struct v4l2_vp9_quantization - VP9 quantization parameters -+ * -+ * @base_q_idx: indicates the base frame qindex -+ * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx -+ * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx -+ * @delta_q_uv_ac indicates the UV AC quantizer relative to base_q_idx -+ * @padding: padding bytes to align things on 64 bits. Must be set to 0 -+ * -+ * Encodes the quantization parameters. See section '7.2.9 Quantization params -+ * syntax' of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_quantization { -+ __u8 base_q_idx; -+ __s8 delta_q_y_dc; -+ __s8 delta_q_uv_dc; -+ __s8 delta_q_uv_ac; -+ __u8 padding[4]; -+}; -+ -+/** -+ * enum v4l2_vp9_segmentation_flags - VP9 segmentation flags -+ * -+ * @V4L2_VP9_SEGMENTATION_FLAG_ENABLED: indicates that this frame makes use of -+ * the segmentation tool -+ * @V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP: indicates that the segmentation map -+ * should be updated during the -+ * decoding of this frame -+ * @V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE: indicates that the updates to -+ * the segmentation map are coded -+ * relative to the existing -+ * segmentation map -+ * @V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA: indicates that new parameters are -+ * about to be specified for each -+ * segment -+ * @V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE: indicates that the -+ * segmentation parameters -+ * represent the actual values -+ * to be used -+ * -+ * Those are the flags you should pass to &v4l2_vp9_segmentation.flags. See -+ * section '7.2.10 Segmentation params syntax' of the VP9 specification for -+ * more details. -+ */ -+enum v4l2_vp9_segmentation_flags { -+ V4L2_VP9_SEGMENTATION_FLAG_ENABLED = 1 << 0, -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP = 1 << 1, -+ V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE = 1 << 2, -+ V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA = 1 << 3, -+ V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE = 1 << 4, -+}; -+ -+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) -+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf -+ -+/** -+ * enum v4l2_vp9_segment_feature - VP9 segment feature IDs -+ * -+ * @V4L2_VP9_SEGMENT_FEATURE_QP_DELTA: QP delta segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_LF: loop filter segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_REF_FRAME: reference frame segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_SKIP: skip segment feature -+ * @V4L2_VP9_SEGMENT_FEATURE_CNT: number of segment features -+ * -+ * Segment feature IDs. See section '7.2.10 Segmentation params syntax' of the -+ * VP9 specification for more details. -+ */ -+enum v4l2_vp9_segment_feature { -+ V4L2_VP9_SEGMENT_FEATURE_QP_DELTA, -+ V4L2_VP9_SEGMENT_FEATURE_LF, -+ V4L2_VP9_SEGMENT_FEATURE_REF_FRAME, -+ V4L2_VP9_SEGMENT_FEATURE_SKIP, -+ V4L2_VP9_SEGMENT_FEATURE_CNT, -+}; -+ -+/** -+ * struct v4l2_vp9_segmentation - VP9 segmentation parameters -+ * -+ * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_* flags -+ * @tree_probs: specify the probability values to be used when decoding -+ * segment_id -+ * @pred_prob: specify the probability values to be used when decoding -+ * seg_id_predicte -+ * @padding: padding used to make things aligned on 64 bits. Shall be zero -+ * filled -+ * @feature_enabled: bitmask defining which features are enabled in each -+ * segment -+ * @feature_data: data attached to each feature. Data entry is only valid if -+ * the feature is enabled -+ * -+ * Encodes the quantization parameters. See section '7.2.10 Segmentation -+ * params syntax' of the VP9 specification for more details. -+ */ -+struct v4l2_vp9_segmentation { -+ __u8 flags; -+ __u8 tree_probs[7]; -+ __u8 pred_probs[3]; -+ __u8 padding[5]; -+ __u8 feature_enabled[8]; -+ __s16 feature_data[8][4]; -+}; -+ -+/** -+ * enum v4l2_vp9_intra_prediction_mode - VP9 Intra prediction modes -+ * -+ * @V4L2_VP9_INTRA_PRED_DC: DC intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_V: vertical intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_H: horizontal intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D45: D45 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D135: D135 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D117: D117 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D153: D153 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D207: D207 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_D63: D63 intra prediction -+ * @V4L2_VP9_INTRA_PRED_MODE_TM: True Motion intra prediction -+ * -+ * See section '7.4.5 Intra frame mode info semantics' for more details. -+ */ -+enum v4l2_vp9_intra_prediction_mode { -+ V4L2_VP9_INTRA_PRED_MODE_DC, -+ V4L2_VP9_INTRA_PRED_MODE_V, -+ V4L2_VP9_INTRA_PRED_MODE_H, -+ V4L2_VP9_INTRA_PRED_MODE_D45, -+ V4L2_VP9_INTRA_PRED_MODE_D135, -+ V4L2_VP9_INTRA_PRED_MODE_D117, -+ V4L2_VP9_INTRA_PRED_MODE_D153, -+ V4L2_VP9_INTRA_PRED_MODE_D207, -+ V4L2_VP9_INTRA_PRED_MODE_D63, -+ V4L2_VP9_INTRA_PRED_MODE_TM, -+}; -+ -+/** -+ * struct v4l2_vp9_probabilities - VP9 Probabilities -+ * -+ * @tx8: TX 8x8 probabilities -+ * @tx16: TX 16x16 probabilities -+ * @tx32: TX 32x32 probabilities -+ * @coef: coefficient probabilities -+ * @skip: skip probabilities -+ * @inter_mode: inter mode probabilities -+ * @interp_filter: interpolation filter probabilities -+ * @is_inter: is inter-block probabilities -+ * @comp_mode: compound prediction mode probabilities -+ * @single_ref: single ref probabilities -+ * @comp_ref: compound ref probabilities -+ * @y_mode: Y prediction mode probabilities -+ * @uv_mode: UV prediction mode probabilities -+ * @partition: partition probabilities -+ * @mv.joint: motion vector joint probabilities -+ * @mv.sign: motion vector sign probabilities -+ * @mv.class: motion vector class probabilities -+ * @mv.class0_bit: motion vector class0 bit probabilities -+ * @mv.bits: motion vector bits probabilities -+ * @mv.class0_fr: motion vector class0 fractional bit probabilities -+ * @mv.fr: motion vector fractional bit probabilities -+ * @mv.class0_hp: motion vector class0 high precision fractional bit -+ * probabilities -+ * @mv.hp: motion vector high precision fractional bit probabilities -+ * @mv: motion vector probabilities -+ * -+ * Structure containing most VP9 probabilities. See the VP9 specification -+ * for more details. -+ */ -+struct v4l2_vp9_probabilities { -+ __u8 tx8[2][1]; -+ __u8 tx16[2][2]; -+ __u8 tx32[2][3]; -+ __u8 coef[4][2][2][6][6][3]; -+ __u8 skip[3]; -+ __u8 inter_mode[7][3]; -+ __u8 interp_filter[4][2]; -+ __u8 is_inter[4]; -+ __u8 comp_mode[5]; -+ __u8 single_ref[5][2]; -+ __u8 comp_ref[5]; -+ __u8 y_mode[4][9]; -+ __u8 uv_mode[10][9]; -+ __u8 partition[16][3]; -+ struct { -+ __u8 joint[3]; -+ __u8 sign[2]; -+ __u8 class[2][10]; -+ __u8 class0_bit[2]; -+ __u8 bits[2][10]; -+ __u8 class0_fr[2][2][3]; -+ __u8 fr[2][3]; -+ __u8 class0_hp[2]; -+ __u8 hp[2]; -+ } mv; -+}; -+ -+/** -+ * enum v4l2_vp9_reset_frame_context - Valid values for -+ * &v4l2_ctrl_vp9_frame_decode_params->reset_frame_context -+ * -+ * @V4L2_VP9_RESET_FRAME_CTX_NONE: don't reset any frame context -+ * @V4L2_VP9_RESET_FRAME_CTX_SPEC: reset the frame context pointed by -+ * &v4l2_ctrl_vp9_frame_decode_params.frame_context_idx -+ * @V4L2_VP9_RESET_FRAME_CTX_ALL: reset all frame contexts -+ * -+ * See section '7.2 Uncompressed header semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_reset_frame_context { -+ V4L2_VP9_RESET_FRAME_CTX_NONE, -+ V4L2_VP9_RESET_FRAME_CTX_SPEC, -+ V4L2_VP9_RESET_FRAME_CTX_ALL, -+}; -+ -+/** -+ * enum v4l2_vp9_color_space - Valid values for -+ * &v4l2_ctrl_vp9_frame_decode_params->color_space -+ * -+ * @V4L2_VP9_COLOR_SPACE_UNKNOWN: unknown color space. In this case the color -+ * space must be signaled outside the VP9 -+ * bitstream -+ * @V4L2_VP9_COLOR_SPACE_BT_601: Rec. ITU-R BT.601-7 -+ * @V4L2_VP9_COLOR_SPACE_BT_709: Rec. ITU-R BT.709-6 -+ * @V4L2_VP9_COLOR_SPACE_SMPTE_170: SMPTE-170 -+ * @V4L2_VP9_COLOR_SPACE_SMPTE_240: SMPTE-240 -+ * @V4L2_VP9_COLOR_SPACE_BT_2020: Rec. ITU-R BT.2020-2 -+ * @V4L2_VP9_COLOR_SPACE_RESERVED: reserved. This value should never be passed -+ * @V4L2_VP9_COLOR_SPACE_SRGB: sRGB (IEC 61966-2-1) -+ * -+ * See section '7.2.2 Color config semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_color_space { -+ V4L2_VP9_COLOR_SPACE_UNKNOWN, -+ V4L2_VP9_COLOR_SPACE_BT_601, -+ V4L2_VP9_COLOR_SPACE_BT_709, -+ V4L2_VP9_COLOR_SPACE_SMPTE_170, -+ V4L2_VP9_COLOR_SPACE_SMPTE_240, -+ V4L2_VP9_COLOR_SPACE_BT_2020, -+ V4L2_VP9_COLOR_SPACE_RESERVED, -+ V4L2_VP9_COLOR_SPACE_SRGB, -+}; -+ -+/** -+ * enum v4l2_vp9_interpolation_filter - VP9 interpolation filter types -+ * -+ * @V4L2_VP9_INTERP_FILTER_8TAP: height tap filter -+ * @V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH: height tap smooth filter -+ * @V4L2_VP9_INTERP_FILTER_8TAP_SHARP: height tap sharp filter -+ * @V4L2_VP9_INTERP_FILTER_BILINEAR: bilinear filter -+ * @V4L2_VP9_INTERP_FILTER_SWITCHABLE: filter selection is signaled at the -+ * block level -+ * -+ * See section '7.2.7 Interpolation filter semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_interpolation_filter { -+ V4L2_VP9_INTERP_FILTER_8TAP, -+ V4L2_VP9_INTERP_FILTER_8TAP_SMOOTH, -+ V4L2_VP9_INTERP_FILTER_8TAP_SHARP, -+ V4L2_VP9_INTERP_FILTER_BILINEAR, -+ V4L2_VP9_INTERP_FILTER_SWITCHABLE, -+}; -+ -+/** -+ * enum v4l2_vp9_reference_mode - VP9 reference modes -+ * -+ * @V4L2_VP9_REF_MODE_SINGLE: indicates that all the inter blocks use only a -+ * single reference frame to generate motion -+ * compensated prediction -+ * @V4L2_VP9_REF_MODE_COMPOUND: requires all the inter blocks to use compound -+ * mode. Single reference frame prediction is not -+ * allowed -+ * @V4L2_VP9_REF_MODE_SELECT: allows each individual inter block to select -+ * between single and compound prediction modes -+ * -+ * See section '7.3.6 Frame reference mode semantics' of the VP9 specification -+ * for more details. -+ */ -+enum v4l2_vp9_reference_mode { -+ V4L2_VP9_REF_MODE_SINGLE, -+ V4L2_VP9_REF_MODE_COMPOUND, -+ V4L2_VP9_REF_MODE_SELECT, -+}; -+ -+/** -+ * enum v4l2_vp9_tx_mode - VP9 TX modes -+ * -+ * @V4L2_VP9_TX_MODE_ONLY_4X4: transform size is 4x4 -+ * @V4L2_VP9_TX_MODE_ALLOW_8X8: transform size can be up to 8x8 -+ * @V4L2_VP9_TX_MODE_ALLOW_16X16: transform size can be up to 16x16 -+ * @V4L2_VP9_TX_MODE_ALLOW_32X32: transform size can be up to 32x32 -+ * @V4L2_VP9_TX_MODE_SELECT: bitstream contains transform size for each block -+ * -+ * See section '7.3.1 Tx mode semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_tx_mode { -+ V4L2_VP9_TX_MODE_ONLY_4X4, -+ V4L2_VP9_TX_MODE_ALLOW_8X8, -+ V4L2_VP9_TX_MODE_ALLOW_16X16, -+ V4L2_VP9_TX_MODE_ALLOW_32X32, -+ V4L2_VP9_TX_MODE_SELECT, -+}; -+ -+/** -+ * enum v4l2_vp9_ref_id - VP9 Reference frame IDs -+ * -+ * @V4L2_REF_ID_LAST: last reference frame -+ * @V4L2_REF_ID_GOLDEN: golden reference frame -+ * @V4L2_REF_ID_ALTREF: alternative reference frame -+ * @V4L2_REF_ID_CNT: number of reference frames -+ * -+ * See section '7.4.12 Ref frames semantics' of the VP9 specification for more -+ * details. -+ */ -+enum v4l2_vp9_ref_id { -+ V4L2_REF_ID_LAST, -+ V4L2_REF_ID_GOLDEN, -+ V4L2_REF_ID_ALTREF, -+ V4L2_REF_ID_CNT, -+}; -+ -+/** -+ * enum v4l2_vp9_frame_flags - VP9 frame flags -+ * @V4L2_VP9_FRAME_FLAG_KEY_FRAME: the frame is a key frame -+ * @V4L2_VP9_FRAME_FLAG_SHOW_FRAME: the frame should be displayed -+ * @V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT: the decoding should be error resilient -+ * @V4L2_VP9_FRAME_FLAG_INTRA_ONLY: the frame does not reference other frames -+ * @V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV: the frame might can high precision -+ * motion vectors -+ * @V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX: frame context should be updated -+ * after decoding -+ * @V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE: parallel decoding is used -+ * @V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING: vertical subsampling is enabled -+ * @V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING: horizontal subsampling is enabled -+ * @V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING: full UV range is used -+ * -+ * Check the VP9 specification for more details. -+ */ -+enum v4l2_vp9_frame_flags { -+ V4L2_VP9_FRAME_FLAG_KEY_FRAME = 1 << 0, -+ V4L2_VP9_FRAME_FLAG_SHOW_FRAME = 1 << 1, -+ V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT = 1 << 2, -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY = 1 << 3, -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV = 1 << 4, -+ V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX = 1 << 5, -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE = 1 << 6, -+ V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING = 1 << 7, -+ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING = 1 << 8, -+ V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING = 1 << 9, -+}; -+ -+#define V4L2_VP9_PROFILE_MAX 3 -+ -+/** -+ * struct v4l2_ctrl_vp9_frame_decode_params - VP9 frame decoding control -+ * -+ * @flags: combination of V4L2_VP9_FRAME_FLAG_* flags -+ * @compressed_header_size: compressed header size in bytes -+ * @uncompressed_header_size: uncompressed header size in bytes -+ * @profile: VP9 profile. Can be 0, 1, 2 or 3 -+ * @reset_frame_context: specifies whether the frame context should be reset -+ * to default values. See &v4l2_vp9_reset_frame_context -+ * for more details -+ * @frame_context_idx: frame context that should be used/updated -+ * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all -+ * profiles support 10 and/or 12 bits depths -+ * @color_space: specifies the color space of the stream. See -+ * &v4l2_vp9_color_space for more details -+ * @interpolation_filter: specifies the filter selection used for performing -+ * inter prediction. See &v4l2_vp9_interpolation_filter -+ * for more details -+ * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile -+ * (where the width is measured in units of 8x8 blocks). -+ * Shall be less than or equal to 6 -+ * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile -+ * (where the height is measured in units of 8x8 blocks) -+ * @tx_mode: specifies the TX mode. See &v4l2_vp9_tx_mode for more details -+ * @reference_mode: specifies the type of inter prediction to be used. See -+ * &v4l2_vp9_reference_mode for more details -+ * @padding: needed to make this struct 64 bit aligned. Shall be filled with -+ * zeros -+ * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed -+ * in pixels -+ * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed -+ * in pixels -+ * @frame_width_minus_1: add 1 to it and you'll get the expected render width -+ * expressed in pixels. This is not used during the -+ * decoding process but might be used by HW scalers to -+ * prepare a frame that's ready for scanout -+ * @frame_height_minus_1: add 1 to it and you'll get the expected render height -+ * expressed in pixels. This is not used during the -+ * decoding process but might be used by HW scalers to -+ * prepare a frame that's ready for scanout -+ * @refs: array of reference frames. See &v4l2_vp9_ref_id for more details -+ * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details -+ * @quant: quantization parameters. See &v4l2_vp9_quantization for more details -+ * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details -+ * @probs: probabilities. See &v4l2_vp9_probabilities for more details -+ */ -+struct v4l2_ctrl_vp9_frame_decode_params { -+ __u32 flags; -+ __u16 compressed_header_size; -+ __u16 uncompressed_header_size; -+ __u8 profile; -+ __u8 reset_frame_context; -+ __u8 frame_context_idx; -+ __u8 bit_depth; -+ __u8 color_space; -+ __u8 interpolation_filter; -+ __u8 tile_cols_log2; -+ __u8 tile_rows_log2; -+ __u8 tx_mode; -+ __u8 reference_mode; -+ __u8 padding[6]; -+ __u16 frame_width_minus_1; -+ __u16 frame_height_minus_1; -+ __u16 render_width_minus_1; -+ __u16 render_height_minus_1; -+ __u64 refs[V4L2_REF_ID_CNT]; -+ struct v4l2_vp9_loop_filter lf; -+ struct v4l2_vp9_quantization quant; -+ struct v4l2_vp9_segmentation seg; -+ struct v4l2_vp9_probabilities probs; -+}; -+ -+#define V4L2_VP9_NUM_FRAME_CTX 4 -+ -+/** -+ * struct v4l2_ctrl_vp9_frame_ctx - VP9 frame context control -+ * -+ * @probs: VP9 probabilities -+ * -+ * This control is accessed in both direction. The user should initialize the -+ * 4 contexts with default values just after starting the stream. Then before -+ * decoding a frame it should query the current frame context (the one passed -+ * through &v4l2_ctrl_vp9_frame_decode_params.frame_context_idx) to initialize -+ * &v4l2_ctrl_vp9_frame_decode_params.probs. The probs are then adjusted based -+ * on the bitstream info and passed to the kernel. The codec should update -+ * the frame context after the frame has been decoded, so that next time -+ * userspace query this context it contains the updated probabilities. -+ */ -+struct v4l2_ctrl_vp9_frame_ctx { -+ struct v4l2_vp9_probabilities probs; -+}; -+ -+#endif /* _VP9_CTRLS_H_ */ - -From 364b741866de547db2cd4f164a238025e7ed3a30 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Tue, 5 May 2020 10:41:10 -0300 -Subject: [PATCH] media: rkvdec: Add the VP9 backend - -The Rockchip VDEC supports VP9 profile 0 up to 4096x2304@30fps. Add -a backend for this new format. - -Signed-off-by: Boris Brezillon -Signed-off-by: Ezequiel Garcia ---- - drivers/staging/media/rkvdec/Makefile | 2 +- - drivers/staging/media/rkvdec/rkvdec-vp9.c | 1577 +++++++++++++++++++++++++++++ - drivers/staging/media/rkvdec/rkvdec.c | 56 +- - drivers/staging/media/rkvdec/rkvdec.h | 6 + - 4 files changed, 1637 insertions(+), 4 deletions(-) - create mode 100644 drivers/staging/media/rkvdec/rkvdec-vp9.c - -diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile -index c08fed0a39f9..cb86b429cfaa 100644 ---- a/drivers/staging/media/rkvdec/Makefile -+++ b/drivers/staging/media/rkvdec/Makefile -@@ -1,3 +1,3 @@ - obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o - --rockchip-vdec-y += rkvdec.o rkvdec-h264.o -+rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o -diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c -new file mode 100644 -index 000000000000..37d0ea4e3570 ---- /dev/null -+++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c -@@ -0,0 +1,1577 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip Video Decoder VP9 backend -+ * -+ * Copyright (C) 2019 Collabora, Ltd. -+ * Boris Brezillon -+ * -+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd. -+ * Alpha Lin -+ */ -+ -+#include -+#include -+#include -+ -+#include "rkvdec.h" -+#include "rkvdec-regs.h" -+ -+#define RKVDEC_VP9_PROBE_SIZE 4864 -+#define RKVDEC_VP9_COUNT_SIZE 13232 -+#define RKVDEC_VP9_MAX_SEGMAP_SIZE 73728 -+ -+struct rkvdec_vp9_intra_mode_probs { -+ u8 y_mode[105]; -+ u8 uv_mode[23]; -+}; -+ -+struct rkvdec_vp9_intra_only_frame_probs { -+ u8 coef_intra[4][2][128]; -+ struct rkvdec_vp9_intra_mode_probs intra_mode[10]; -+}; -+ -+struct rkvdec_vp9_inter_frame_probs { -+ u8 y_mode[4][9]; -+ u8 comp_mode[5]; -+ u8 comp_ref[5]; -+ u8 single_ref[5][2]; -+ u8 inter_mode[7][3]; -+ u8 interp_filter[4][2]; -+ u8 padding0[11]; -+ u8 coef[2][4][2][128]; -+ u8 uv_mode_0_2[3][9]; -+ u8 padding1[5]; -+ u8 uv_mode_3_5[3][9]; -+ u8 padding2[5]; -+ u8 uv_mode_6_8[3][9]; -+ u8 padding3[5]; -+ u8 uv_mode_9[9]; -+ u8 padding4[7]; -+ u8 padding5[16]; -+ struct { -+ u8 joint[3]; -+ u8 sign[2]; -+ u8 class[2][10]; -+ u8 class0_bit[2]; -+ u8 bits[2][10]; -+ u8 class0_fr[2][2][3]; -+ u8 fr[2][3]; -+ u8 class0_hp[2]; -+ u8 hp[2]; -+ } mv; -+}; -+ -+struct rkvdec_vp9_probs { -+ u8 partition[16][3]; -+ u8 pred[3]; -+ u8 tree[7]; -+ u8 skip[3]; -+ u8 tx32[2][3]; -+ u8 tx16[2][2]; -+ u8 tx8[2][1]; -+ u8 is_inter[4]; -+ /* 128 bit alignment */ -+ u8 padding0[3]; -+ union { -+ struct rkvdec_vp9_inter_frame_probs inter; -+ struct rkvdec_vp9_intra_only_frame_probs intra_only; -+ }; -+}; -+ -+/* Data structure describing auxiliary buffer format. */ -+struct rkvdec_vp9_priv_tbl { -+ struct rkvdec_vp9_probs probs; -+ u8 segmap[2][RKVDEC_VP9_MAX_SEGMAP_SIZE]; -+}; -+ -+struct rkvdec_vp9_refs_counts { -+ u32 eob[2]; -+ u32 coeff[3]; -+}; -+ -+struct rkvdec_vp9_inter_frame_symbol_counts { -+ u32 partition[16][4]; -+ u32 skip[3][2]; -+ u32 inter[4][2]; -+ u32 tx32p[2][4]; -+ u32 tx16p[2][4]; -+ u32 tx8p[2][2]; -+ u32 y_mode[4][10]; -+ u32 uv_mode[10][10]; -+ u32 comp[5][2]; -+ u32 comp_ref[5][2]; -+ u32 single_ref[5][2][2]; -+ u32 mv_mode[7][4]; -+ u32 filter[4][3]; -+ u32 mv_joint[4]; -+ u32 sign[2][2]; -+ /* add 1 element for align */ -+ u32 classes[2][11 + 1]; -+ u32 class0[2][2]; -+ u32 bits[2][10][2]; -+ u32 class0_fp[2][2][4]; -+ u32 fp[2][4]; -+ u32 class0_hp[2][2]; -+ u32 hp[2][2]; -+ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; -+}; -+ -+struct rkvdec_vp9_intra_frame_symbol_counts { -+ u32 partition[4][4][4]; -+ u32 skip[3][2]; -+ u32 intra[4][2]; -+ u32 tx32p[2][4]; -+ u32 tx16p[2][4]; -+ u32 tx8p[2][2]; -+ struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; -+}; -+ -+struct rkvdec_vp9_run { -+ struct rkvdec_run base; -+ const struct v4l2_ctrl_vp9_frame_decode_params *decode_params; -+}; -+ -+struct rkvdec_vp9_frame_info { -+ u32 valid : 1; -+ u32 segmapid : 1; -+ u32 frame_context_idx : 2; -+ u32 reference_mode : 2; -+ u32 tx_mode : 3; -+ u32 interpolation_filter : 3; -+ u32 flags; -+ u64 timestamp; -+ struct v4l2_vp9_segmentation seg; -+ struct v4l2_vp9_loop_filter lf; -+}; -+ -+struct rkvdec_vp9_ctx { -+ struct rkvdec_aux_buf priv_tbl; -+ struct rkvdec_aux_buf count_tbl; -+ struct v4l2_ctrl_vp9_frame_ctx frame_context; -+ struct rkvdec_vp9_frame_info cur; -+ struct rkvdec_vp9_frame_info last; -+}; -+ -+static u32 rkvdec_fastdiv(u32 dividend, u16 divisor) -+{ -+#define DIV_INV(d) (u32)(((1ULL << 32) + ((d) - 1)) / (d)) -+#define DIVS_INV(d0, d1, d2, d3, d4, d5, d6, d7, d8, d9) \ -+ DIV_INV(d0), DIV_INV(d1), DIV_INV(d2), DIV_INV(d3), \ -+ DIV_INV(d4), DIV_INV(d5), DIV_INV(d6), DIV_INV(d7), \ -+ DIV_INV(d8), DIV_INV(d9) -+ -+ static const u32 inv[] = { -+ DIV_INV(2), DIV_INV(3), DIV_INV(4), DIV_INV(5), -+ DIV_INV(6), DIV_INV(7), DIV_INV(8), DIV_INV(9), -+ DIVS_INV(10, 11, 12, 13, 14, 15, 16, 17, 18, 19), -+ DIVS_INV(20, 21, 22, 23, 24, 25, 26, 27, 28, 29), -+ DIVS_INV(30, 31, 32, 33, 34, 35, 36, 37, 38, 39), -+ DIVS_INV(40, 41, 42, 43, 44, 45, 46, 47, 48, 49), -+ DIVS_INV(50, 51, 52, 53, 54, 55, 56, 57, 58, 59), -+ DIVS_INV(60, 61, 62, 63, 64, 65, 66, 67, 68, 69), -+ DIVS_INV(70, 71, 72, 73, 74, 75, 76, 77, 78, 79), -+ DIVS_INV(80, 81, 82, 83, 84, 85, 86, 87, 88, 89), -+ DIVS_INV(90, 91, 92, 93, 94, 95, 96, 97, 98, 99), -+ DIVS_INV(100, 101, 102, 103, 104, 105, 106, 107, 108, 109), -+ DIVS_INV(110, 111, 112, 113, 114, 115, 116, 117, 118, 119), -+ DIVS_INV(120, 121, 122, 123, 124, 125, 126, 127, 128, 129), -+ DIVS_INV(130, 131, 132, 133, 134, 135, 136, 137, 138, 139), -+ DIVS_INV(140, 141, 142, 143, 144, 145, 146, 147, 148, 149), -+ DIVS_INV(150, 151, 152, 153, 154, 155, 156, 157, 158, 159), -+ DIVS_INV(160, 161, 162, 163, 164, 165, 166, 167, 168, 169), -+ DIVS_INV(170, 171, 172, 173, 174, 175, 176, 177, 178, 179), -+ DIVS_INV(180, 181, 182, 183, 184, 185, 186, 187, 188, 189), -+ DIVS_INV(190, 191, 192, 193, 194, 195, 196, 197, 198, 199), -+ DIVS_INV(200, 201, 202, 203, 204, 205, 206, 207, 208, 209), -+ DIVS_INV(210, 211, 212, 213, 214, 215, 216, 217, 218, 219), -+ DIVS_INV(220, 221, 222, 223, 224, 225, 226, 227, 228, 229), -+ DIVS_INV(230, 231, 232, 233, 234, 235, 236, 237, 238, 239), -+ DIVS_INV(240, 241, 242, 243, 244, 245, 246, 247, 248, 249), -+ DIV_INV(250), DIV_INV(251), DIV_INV(252), DIV_INV(253), -+ DIV_INV(254), DIV_INV(255), DIV_INV(256), -+ }; -+ -+ if (divisor == 0) -+ return 0; -+ else if (divisor == 1) -+ return dividend; -+ -+ if (WARN_ON(divisor - 2 >= ARRAY_SIZE(inv))) -+ return dividend; -+ -+ return ((u64)dividend * inv[divisor - 2]) >> 32; -+} -+ -+static const u8 vp9_kf_y_mode_prob[10][10][9] = { -+ { -+ /* above = dc */ -+ { 137, 30, 42, 148, 151, 207, 70, 52, 91 },/*left = dc */ -+ { 92, 45, 102, 136, 116, 180, 74, 90, 100 },/*left = v */ -+ { 73, 32, 19, 187, 222, 215, 46, 34, 100 },/*left = h */ -+ { 91, 30, 32, 116, 121, 186, 93, 86, 94 },/*left = d45 */ -+ { 72, 35, 36, 149, 68, 206, 68, 63, 105 },/*left = d135*/ -+ { 73, 31, 28, 138, 57, 124, 55, 122, 151 },/*left = d117*/ -+ { 67, 23, 21, 140, 126, 197, 40, 37, 171 },/*left = d153*/ -+ { 86, 27, 28, 128, 154, 212, 45, 43, 53 },/*left = d207*/ -+ { 74, 32, 27, 107, 86, 160, 63, 134, 102 },/*left = d63 */ -+ { 59, 67, 44, 140, 161, 202, 78, 67, 119 } /*left = tm */ -+ }, { /* above = v */ -+ { 63, 36, 126, 146, 123, 158, 60, 90, 96 },/*left = dc */ -+ { 43, 46, 168, 134, 107, 128, 69, 142, 92 },/*left = v */ -+ { 44, 29, 68, 159, 201, 177, 50, 57, 77 },/*left = h */ -+ { 58, 38, 76, 114, 97, 172, 78, 133, 92 },/*left = d45 */ -+ { 46, 41, 76, 140, 63, 184, 69, 112, 57 },/*left = d135*/ -+ { 38, 32, 85, 140, 46, 112, 54, 151, 133 },/*left = d117*/ -+ { 39, 27, 61, 131, 110, 175, 44, 75, 136 },/*left = d153*/ -+ { 52, 30, 74, 113, 130, 175, 51, 64, 58 },/*left = d207*/ -+ { 47, 35, 80, 100, 74, 143, 64, 163, 74 },/*left = d63 */ -+ { 36, 61, 116, 114, 128, 162, 80, 125, 82 } /*left = tm */ -+ }, { /* above = h */ -+ { 82, 26, 26, 171, 208, 204, 44, 32, 105 },/*left = dc */ -+ { 55, 44, 68, 166, 179, 192, 57, 57, 108 },/*left = v */ -+ { 42, 26, 11, 199, 241, 228, 23, 15, 85 },/*left = h */ -+ { 68, 42, 19, 131, 160, 199, 55, 52, 83 },/*left = d45 */ -+ { 58, 50, 25, 139, 115, 232, 39, 52, 118 },/*left = d135*/ -+ { 50, 35, 33, 153, 104, 162, 64, 59, 131 },/*left = d117*/ -+ { 44, 24, 16, 150, 177, 202, 33, 19, 156 },/*left = d153*/ -+ { 55, 27, 12, 153, 203, 218, 26, 27, 49 },/*left = d207*/ -+ { 53, 49, 21, 110, 116, 168, 59, 80, 76 },/*left = d63 */ -+ { 38, 72, 19, 168, 203, 212, 50, 50, 107 } /*left = tm */ -+ }, { /* above = d45 */ -+ { 103, 26, 36, 129, 132, 201, 83, 80, 93 },/*left = dc */ -+ { 59, 38, 83, 112, 103, 162, 98, 136, 90 },/*left = v */ -+ { 62, 30, 23, 158, 200, 207, 59, 57, 50 },/*left = h */ -+ { 67, 30, 29, 84, 86, 191, 102, 91, 59 },/*left = d45 */ -+ { 60, 32, 33, 112, 71, 220, 64, 89, 104 },/*left = d135*/ -+ { 53, 26, 34, 130, 56, 149, 84, 120, 103 },/*left = d117*/ -+ { 53, 21, 23, 133, 109, 210, 56, 77, 172 },/*left = d153*/ -+ { 77, 19, 29, 112, 142, 228, 55, 66, 36 },/*left = d207*/ -+ { 61, 29, 29, 93, 97, 165, 83, 175, 162 },/*left = d63 */ -+ { 47, 47, 43, 114, 137, 181, 100, 99, 95 } /*left = tm */ -+ }, { /* above = d135 */ -+ { 69, 23, 29, 128, 83, 199, 46, 44, 101 },/*left = dc */ -+ { 53, 40, 55, 139, 69, 183, 61, 80, 110 },/*left = v */ -+ { 40, 29, 19, 161, 180, 207, 43, 24, 91 },/*left = h */ -+ { 60, 34, 19, 105, 61, 198, 53, 64, 89 },/*left = d45 */ -+ { 52, 31, 22, 158, 40, 209, 58, 62, 89 },/*left = d135*/ -+ { 44, 31, 29, 147, 46, 158, 56, 102, 198 },/*left = d117*/ -+ { 35, 19, 12, 135, 87, 209, 41, 45, 167 },/*left = d153*/ -+ { 55, 25, 21, 118, 95, 215, 38, 39, 66 },/*left = d207*/ -+ { 51, 38, 25, 113, 58, 164, 70, 93, 97 },/*left = d63 */ -+ { 47, 54, 34, 146, 108, 203, 72, 103, 151 } /*left = tm */ -+ }, { /* above = d117 */ -+ { 64, 19, 37, 156, 66, 138, 49, 95, 133 },/*left = dc */ -+ { 46, 27, 80, 150, 55, 124, 55, 121, 135 },/*left = v */ -+ { 36, 23, 27, 165, 149, 166, 54, 64, 118 },/*left = h */ -+ { 53, 21, 36, 131, 63, 163, 60, 109, 81 },/*left = d45 */ -+ { 40, 26, 35, 154, 40, 185, 51, 97, 123 },/*left = d135*/ -+ { 35, 19, 34, 179, 19, 97, 48, 129, 124 },/*left = d117*/ -+ { 36, 20, 26, 136, 62, 164, 33, 77, 154 },/*left = d153*/ -+ { 45, 18, 32, 130, 90, 157, 40, 79, 91 },/*left = d207*/ -+ { 45, 26, 28, 129, 45, 129, 49, 147, 123 },/*left = d63 */ -+ { 38, 44, 51, 136, 74, 162, 57, 97, 121 } /*left = tm */ -+ }, { /* above = d153 */ -+ { 75, 17, 22, 136, 138, 185, 32, 34, 166 },/*left = dc */ -+ { 56, 39, 58, 133, 117, 173, 48, 53, 187 },/*left = v */ -+ { 35, 21, 12, 161, 212, 207, 20, 23, 145 },/*left = h */ -+ { 56, 29, 19, 117, 109, 181, 55, 68, 112 },/*left = d45 */ -+ { 47, 29, 17, 153, 64, 220, 59, 51, 114 },/*left = d135*/ -+ { 46, 16, 24, 136, 76, 147, 41, 64, 172 },/*left = d117*/ -+ { 34, 17, 11, 108, 152, 187, 13, 15, 209 },/*left = d153*/ -+ { 51, 24, 14, 115, 133, 209, 32, 26, 104 },/*left = d207*/ -+ { 55, 30, 18, 122, 79, 179, 44, 88, 116 },/*left = d63 */ -+ { 37, 49, 25, 129, 168, 164, 41, 54, 148 } /*left = tm */ -+ }, { /* above = d207 */ -+ { 82, 22, 32, 127, 143, 213, 39, 41, 70 },/*left = dc */ -+ { 62, 44, 61, 123, 105, 189, 48, 57, 64 },/*left = v */ -+ { 47, 25, 17, 175, 222, 220, 24, 30, 86 },/*left = h */ -+ { 68, 36, 17, 106, 102, 206, 59, 74, 74 },/*left = d45 */ -+ { 57, 39, 23, 151, 68, 216, 55, 63, 58 },/*left = d135*/ -+ { 49, 30, 35, 141, 70, 168, 82, 40, 115 },/*left = d117*/ -+ { 51, 25, 15, 136, 129, 202, 38, 35, 139 },/*left = d153*/ -+ { 68, 26, 16, 111, 141, 215, 29, 28, 28 },/*left = d207*/ -+ { 59, 39, 19, 114, 75, 180, 77, 104, 42 },/*left = d63 */ -+ { 40, 61, 26, 126, 152, 206, 61, 59, 93 } /*left = tm */ -+ }, { /* above = d63 */ -+ { 78, 23, 39, 111, 117, 170, 74, 124, 94 },/*left = dc */ -+ { 48, 34, 86, 101, 92, 146, 78, 179, 134 },/*left = v */ -+ { 47, 22, 24, 138, 187, 178, 68, 69, 59 },/*left = h */ -+ { 56, 25, 33, 105, 112, 187, 95, 177, 129 },/*left = d45 */ -+ { 48, 31, 27, 114, 63, 183, 82, 116, 56 },/*left = d135*/ -+ { 43, 28, 37, 121, 63, 123, 61, 192, 169 },/*left = d117*/ -+ { 42, 17, 24, 109, 97, 177, 56, 76, 122 },/*left = d153*/ -+ { 58, 18, 28, 105, 139, 182, 70, 92, 63 },/*left = d207*/ -+ { 46, 23, 32, 74, 86, 150, 67, 183, 88 },/*left = d63 */ -+ { 36, 38, 48, 92, 122, 165, 88, 137, 91 } /*left = tm */ -+ }, { /* above = tm */ -+ { 65, 70, 60, 155, 159, 199, 61, 60, 81 },/*left = dc */ -+ { 44, 78, 115, 132, 119, 173, 71, 112, 93 },/*left = v */ -+ { 39, 38, 21, 184, 227, 206, 42, 32, 64 },/*left = h */ -+ { 58, 47, 36, 124, 137, 193, 80, 82, 78 },/*left = d45 */ -+ { 49, 50, 35, 144, 95, 205, 63, 78, 59 },/*left = d135*/ -+ { 41, 53, 52, 148, 71, 142, 65, 128, 51 },/*left = d117*/ -+ { 40, 36, 28, 143, 143, 202, 40, 55, 137 },/*left = d153*/ -+ { 52, 34, 29, 129, 183, 227, 42, 35, 43 },/*left = d207*/ -+ { 42, 44, 44, 104, 105, 164, 64, 130, 80 },/*left = d63 */ -+ { 43, 81, 53, 140, 169, 204, 68, 84, 72 } /*left = tm */ -+ } -+}; -+ -+static const u8 kf_partition_probs[16][3] = { -+ /* 8x8 -> 4x4 */ -+ { 158, 97, 94 }, /* a/l both not split */ -+ { 93, 24, 99 }, /* a split, l not split */ -+ { 85, 119, 44 }, /* l split, a not split */ -+ { 62, 59, 67 }, /* a/l both split */ -+ /* 16x16 -> 8x8 */ -+ { 149, 53, 53 }, /* a/l both not split */ -+ { 94, 20, 48 }, /* a split, l not split */ -+ { 83, 53, 24 }, /* l split, a not split */ -+ { 52, 18, 18 }, /* a/l both split */ -+ /* 32x32 -> 16x16 */ -+ { 150, 40, 39 }, /* a/l both not split */ -+ { 78, 12, 26 }, /* a split, l not split */ -+ { 67, 33, 11 }, /* l split, a not split */ -+ { 24, 7, 5 }, /* a/l both split */ -+ /* 64x64 -> 32x32 */ -+ { 174, 35, 49 }, /* a/l both not split */ -+ { 68, 11, 27 }, /* a split, l not split */ -+ { 57, 15, 9 }, /* l split, a not split */ -+ { 12, 3, 3 }, /* a/l both split */ -+}; -+ -+static const u8 kf_uv_mode_prob[10][9] = { -+ { 144, 11, 54, 157, 195, 130, 46, 58, 108 }, /* y = dc */ -+ { 118, 15, 123, 148, 131, 101, 44, 93, 131 }, /* y = v */ -+ { 113, 12, 23, 188, 226, 142, 26, 32, 125 }, /* y = h */ -+ { 120, 11, 50, 123, 163, 135, 64, 77, 103 }, /* y = d45 */ -+ { 113, 9, 36, 155, 111, 157, 32, 44, 161 }, /* y = d135 */ -+ { 116, 9, 55, 176, 76, 96, 37, 61, 149 }, /* y = d117 */ -+ { 115, 9, 28, 141, 161, 167, 21, 25, 193 }, /* y = d153 */ -+ { 120, 12, 32, 145, 195, 142, 32, 38, 86 }, /* y = d207 */ -+ { 116, 12, 64, 120, 140, 125, 49, 115, 121 }, /* y = d63 */ -+ { 102, 19, 66, 162, 182, 122, 35, 59, 128 } /* y = tm */ -+}; -+ -+static void write_coeff_plane(const u8 coef[6][6][3], u8 *coeff_plane) -+{ -+ unsigned int idx = 0; -+ u8 byte_count = 0, p; -+ s32 k, m, n; -+ -+ for (k = 0; k < 6; k++) { -+ for (m = 0; m < 6; m++) { -+ for (n = 0; n < 3; n++) { -+ p = coef[k][m][n]; -+ coeff_plane[idx++] = p; -+ byte_count++; -+ if (byte_count == 27) { -+ idx += 5; -+ byte_count = 0; -+ } -+ } -+ } -+ } -+} -+ -+static void init_intra_only_probs(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; -+ struct rkvdec_vp9_intra_only_frame_probs *rkprobs; -+ const struct v4l2_vp9_probabilities *probs; -+ unsigned int i, j, k, m; -+ -+ rkprobs = &tbl->probs.intra_only; -+ dec_params = run->decode_params; -+ probs = &dec_params->probs; -+ -+ /* -+ * intra only 149 x 128 bits ,aligned to 152 x 128 bits coeff related -+ * prob 64 x 128 bits -+ */ -+ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { -+ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) -+ write_coeff_plane(probs->coef[i][j][0], -+ rkprobs->coef_intra[i][j]); -+ } -+ -+ /* intra mode prob 80 x 128 bits */ -+ for (i = 0; i < ARRAY_SIZE(vp9_kf_y_mode_prob); i++) { -+ u32 byte_count = 0; -+ int idx = 0; -+ -+ /* vp9_kf_y_mode_prob */ -+ for (j = 0; j < ARRAY_SIZE(vp9_kf_y_mode_prob[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(vp9_kf_y_mode_prob[0][0]); -+ k++) { -+ u8 val = vp9_kf_y_mode_prob[i][j][k]; -+ -+ rkprobs->intra_mode[i].y_mode[idx++] = val; -+ byte_count++; -+ if (byte_count == 27) { -+ byte_count = 0; -+ idx += 5; -+ } -+ } -+ } -+ -+ idx = 0; -+ if (i < 4) { -+ for (m = 0; m < (i < 3 ? 23 : 21); m++) { -+ const u8 *ptr = (const u8 *)kf_uv_mode_prob; -+ -+ rkprobs->intra_mode[i].uv_mode[idx++] = ptr[i * 23 + m]; -+ } -+ } -+ } -+} -+ -+static void init_inter_probs(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; -+ struct rkvdec_vp9_inter_frame_probs *rkprobs; -+ const struct v4l2_vp9_probabilities *probs; -+ unsigned int i, j, k; -+ -+ rkprobs = &tbl->probs.inter; -+ dec_params = run->decode_params; -+ probs = &dec_params->probs; -+ -+ /* -+ * inter probs -+ * 151 x 128 bits, aligned to 152 x 128 bits -+ * inter only -+ * intra_y_mode & inter_block info 6 x 128 bits -+ */ -+ -+ memcpy(rkprobs->y_mode, probs->y_mode, sizeof(rkprobs->y_mode)); -+ memcpy(rkprobs->comp_mode, probs->comp_mode, -+ sizeof(rkprobs->comp_mode)); -+ memcpy(rkprobs->comp_ref, probs->comp_ref, -+ sizeof(rkprobs->comp_ref)); -+ memcpy(rkprobs->single_ref, probs->single_ref, -+ sizeof(rkprobs->single_ref)); -+ memcpy(rkprobs->inter_mode, probs->inter_mode, -+ sizeof(rkprobs->inter_mode)); -+ memcpy(rkprobs->interp_filter, probs->interp_filter, -+ sizeof(rkprobs->interp_filter)); -+ -+ /* 128 x 128 bits coeff related */ -+ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { -+ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) -+ write_coeff_plane(probs->coef[i][j][k], -+ rkprobs->coef[k][i][j]); -+ } -+ } -+ -+ /* intra uv mode 6 x 128 */ -+ memcpy(rkprobs->uv_mode_0_2, &probs->uv_mode[0], -+ sizeof(rkprobs->uv_mode_0_2)); -+ memcpy(rkprobs->uv_mode_3_5, &probs->uv_mode[3], -+ sizeof(rkprobs->uv_mode_3_5)); -+ memcpy(rkprobs->uv_mode_6_8, &probs->uv_mode[6], -+ sizeof(rkprobs->uv_mode_6_8)); -+ memcpy(rkprobs->uv_mode_9, &probs->uv_mode[9], -+ sizeof(rkprobs->uv_mode_9)); -+ -+ /* mv related 6 x 128 */ -+ memcpy(rkprobs->mv.joint, probs->mv.joint, -+ sizeof(rkprobs->mv.joint)); -+ memcpy(rkprobs->mv.sign, probs->mv.sign, -+ sizeof(rkprobs->mv.sign)); -+ memcpy(rkprobs->mv.class, probs->mv.class, -+ sizeof(rkprobs->mv.class)); -+ memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, -+ sizeof(rkprobs->mv.class0_bit)); -+ memcpy(rkprobs->mv.bits, probs->mv.bits, -+ sizeof(rkprobs->mv.bits)); -+ memcpy(rkprobs->mv.class0_fr, probs->mv.class0_fr, -+ sizeof(rkprobs->mv.class0_fr)); -+ memcpy(rkprobs->mv.fr, probs->mv.fr, -+ sizeof(rkprobs->mv.fr)); -+ memcpy(rkprobs->mv.class0_hp, probs->mv.class0_hp, -+ sizeof(rkprobs->mv.class0_hp)); -+ memcpy(rkprobs->mv.hp, probs->mv.hp, -+ sizeof(rkprobs->mv.hp)); -+} -+ -+static void init_probs(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; -+ struct rkvdec_vp9_probs *rkprobs = &tbl->probs; -+ const struct v4l2_vp9_segmentation *seg; -+ const struct v4l2_vp9_probabilities *probs; -+ bool intra_only; -+ -+ dec_params = run->decode_params; -+ probs = &dec_params->probs; -+ seg = &dec_params->seg; -+ -+ memset(rkprobs, 0, sizeof(*rkprobs)); -+ -+ intra_only = !!(dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); -+ -+ /* sb info 5 x 128 bit */ -+ memcpy(rkprobs->partition, -+ intra_only ? kf_partition_probs : probs->partition, -+ sizeof(rkprobs->partition)); -+ -+ memcpy(rkprobs->pred, seg->pred_probs, sizeof(rkprobs->pred)); -+ memcpy(rkprobs->tree, seg->tree_probs, sizeof(rkprobs->tree)); -+ memcpy(rkprobs->skip, probs->skip, sizeof(rkprobs->skip)); -+ memcpy(rkprobs->tx32, probs->tx32, sizeof(rkprobs->tx32)); -+ memcpy(rkprobs->tx16, probs->tx16, sizeof(rkprobs->tx16)); -+ memcpy(rkprobs->tx8, probs->tx8, sizeof(rkprobs->tx8)); -+ memcpy(rkprobs->is_inter, probs->is_inter, sizeof(rkprobs->is_inter)); -+ -+ if (intra_only) -+ init_intra_only_probs(ctx, run); -+ else -+ init_inter_probs(ctx, run); -+} -+ -+struct vp9d_ref_config { -+ u32 reg_frm_size; -+ u32 reg_hor_stride; -+ u32 reg_y_stride; -+ u32 reg_yuv_stride; -+ u32 reg_ref_base; -+}; -+ -+static struct vp9d_ref_config ref_config[3] = { -+ { -+ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(0), -+ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(0), -+ .reg_y_stride = RKVDEC_VP9_LAST_FRAME_YSTRIDE, -+ .reg_yuv_stride = RKVDEC_VP9_LAST_FRAME_YUVSTRIDE, -+ .reg_ref_base = RKVDEC_REG_VP9_LAST_FRAME_BASE, -+ }, -+ { -+ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(1), -+ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(1), -+ .reg_y_stride = RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE, -+ .reg_yuv_stride = 0, -+ .reg_ref_base = RKVDEC_REG_VP9_GOLDEN_FRAME_BASE, -+ }, -+ { -+ .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(2), -+ .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(2), -+ .reg_y_stride = RKVDEC_VP9_ALTREF_FRAME_YSTRIDE, -+ .reg_yuv_stride = 0, -+ .reg_ref_base = RKVDEC_REG_VP9_ALTREF_FRAME_BASE, -+ } -+}; -+ -+static struct rkvdec_decoded_buffer * -+get_ref_buf(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) -+{ -+ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; -+ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; -+ int buf_idx; -+ -+ /* -+ * If a ref is unused or invalid, address of current destination -+ * buffer is returned. -+ */ -+ buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); -+ if (buf_idx < 0) -+ return vb2_to_rkvdec_decoded_buf(&dst->vb2_buf); -+ -+ return vb2_to_rkvdec_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); -+} -+ -+static dma_addr_t get_mv_base_addr(struct rkvdec_decoded_buffer *buf) -+{ -+ u32 aligned_pitch, aligned_height, yuv_len; -+ -+ aligned_height = round_up(buf->vp9.height, 64); -+ aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; -+ yuv_len = (aligned_height * aligned_pitch * 3) / 2; -+ -+ return vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0) + -+ yuv_len; -+} -+ -+static void -+config_ref_registers(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run, -+ struct rkvdec_decoded_buffer **ref_bufs, -+ enum v4l2_vp9_ref_id id) -+{ -+ u32 aligned_pitch, aligned_height, y_len, yuv_len; -+ struct rkvdec_decoded_buffer *buf = ref_bufs[id]; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ aligned_height = round_up(buf->vp9.height, 64); -+ writel_relaxed(RKVDEC_VP9_FRAMEWIDTH(buf->vp9.width) | -+ RKVDEC_VP9_FRAMEHEIGHT(buf->vp9.height), -+ rkvdec->regs + ref_config[id].reg_frm_size); -+ -+ writel_relaxed(vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0), -+ rkvdec->regs + ref_config[id].reg_ref_base); -+ -+ if (&buf->base.vb == run->base.bufs.dst) -+ return; -+ -+ aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; -+ y_len = aligned_height * aligned_pitch; -+ yuv_len = (y_len * 3) / 2; -+ -+ writel_relaxed(RKVDEC_HOR_Y_VIRSTRIDE(aligned_pitch / 16) | -+ RKVDEC_HOR_UV_VIRSTRIDE(aligned_pitch / 16), -+ rkvdec->regs + ref_config[id].reg_hor_stride); -+ writel_relaxed(RKVDEC_VP9_REF_YSTRIDE(y_len / 16), -+ rkvdec->regs + ref_config[id].reg_y_stride); -+ -+ if (!ref_config[id].reg_yuv_stride) -+ return; -+ -+ writel_relaxed(RKVDEC_VP9_REF_YUVSTRIDE(yuv_len / 16), -+ rkvdec->regs + ref_config[id].reg_yuv_stride); -+} -+ -+static bool seg_featured_enabled(const struct v4l2_vp9_segmentation *seg, -+ enum v4l2_vp9_segment_feature feature, -+ unsigned int segid) -+{ -+ u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); -+ -+ return !!(seg->feature_enabled[segid] & mask); -+} -+ -+static void -+config_seg_registers(struct rkvdec_ctx *ctx, -+ unsigned int segid) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ const struct v4l2_vp9_segmentation *seg; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ s16 feature_val; -+ u8 feature_id; -+ u32 val = 0; -+ -+ seg = vp9_ctx->last.valid ? &vp9_ctx->last.seg : &vp9_ctx->cur.seg; -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_QP_DELTA; -+ if (seg_featured_enabled(seg, feature_id, segid)) { -+ feature_val = seg->feature_data[segid][feature_id]; -+ val |= RKVDEC_SEGID_FRAME_QP_DELTA_EN(1) | -+ RKVDEC_SEGID_FRAME_QP_DELTA(feature_val); -+ } -+ -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_LF; -+ if (seg_featured_enabled(seg, feature_id, segid)) { -+ feature_val = seg->feature_data[segid][feature_id]; -+ val |= RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(1) | -+ RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(feature_val); -+ } -+ -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_REF_FRAME; -+ if (seg_featured_enabled(seg, feature_id, segid)) { -+ feature_val = seg->feature_data[segid][feature_id]; -+ val |= RKVDEC_SEGID_REFERINFO_EN(1) | -+ RKVDEC_SEGID_REFERINFO(feature_val); -+ } -+ -+ feature_id = V4L2_VP9_SEGMENT_FEATURE_SKIP; -+ if (seg_featured_enabled(seg, feature_id, segid)) -+ val |= RKVDEC_SEGID_FRAME_SKIP_EN(1); -+ -+ if (!segid && -+ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) -+ val |= RKVDEC_SEGID_ABS_DELTA(1); -+ -+ writel_relaxed(val, rkvdec->regs + RKVDEC_VP9_SEGID_GRP(segid)); -+} -+ -+static void -+update_dec_buf_info(struct rkvdec_decoded_buffer *buf, -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ buf->vp9.width = dec_params->frame_width_minus_1 + 1; -+ buf->vp9.height = dec_params->frame_height_minus_1 + 1; -+ buf->vp9.bit_depth = dec_params->bit_depth; -+} -+ -+static void -+update_ctx_cur_info(struct rkvdec_vp9_ctx *vp9_ctx, -+ struct rkvdec_decoded_buffer *buf, -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ vp9_ctx->cur.valid = true; -+ vp9_ctx->cur.frame_context_idx = dec_params->frame_context_idx; -+ vp9_ctx->cur.reference_mode = dec_params->reference_mode; -+ vp9_ctx->cur.tx_mode = dec_params->tx_mode; -+ vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; -+ vp9_ctx->cur.flags = dec_params->flags; -+ vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; -+ vp9_ctx->cur.seg = dec_params->seg; -+ vp9_ctx->cur.lf = dec_params->lf; -+} -+ -+static void -+update_ctx_last_info(struct rkvdec_vp9_ctx *vp9_ctx) -+{ -+ vp9_ctx->last = vp9_ctx->cur; -+} -+ -+static void config_registers(struct rkvdec_ctx *ctx, -+ const struct rkvdec_vp9_run *run) -+{ -+ u32 y_len, uv_len, yuv_len, bit_depth, aligned_height, aligned_pitch; -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ struct rkvdec_decoded_buffer *ref_bufs[V4L2_REF_ID_CNT]; -+ struct rkvdec_decoded_buffer *dst, *last, *mv_ref; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ u32 val, stream_len, last_frame_info = 0; -+ const struct v4l2_vp9_segmentation *seg; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ dma_addr_t addr; -+ bool intra_only; -+ unsigned int i; -+ -+ dec_params = run->decode_params; -+ dst = vb2_to_rkvdec_decoded_buf(&run->base.bufs.dst->vb2_buf); -+ for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) -+ ref_bufs[i] = get_ref_buf(ctx, &dst->base.vb, -+ dec_params->refs[i]); -+ -+ if (vp9_ctx->last.valid) -+ last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); -+ else -+ last = dst; -+ -+ update_dec_buf_info(dst, dec_params); -+ update_ctx_cur_info(vp9_ctx, dst, dec_params); -+ seg = &dec_params->seg; -+ -+ intra_only = !!(dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); -+ -+ writel_relaxed(RKVDEC_MODE(RKVDEC_MODE_VP9), -+ rkvdec->regs + RKVDEC_REG_SYSCTRL); -+ -+ bit_depth = dec_params->bit_depth; -+ aligned_height = round_up(ctx->decoded_fmt.fmt.pix_mp.height, 64); -+ -+ aligned_pitch = round_up(ctx->decoded_fmt.fmt.pix_mp.width * -+ bit_depth, -+ 512) / 8; -+ y_len = aligned_height * aligned_pitch; -+ uv_len = y_len / 2; -+ yuv_len = y_len + uv_len; -+ -+ writel_relaxed(RKVDEC_Y_HOR_VIRSTRIDE(aligned_pitch / 16) | -+ RKVDEC_UV_HOR_VIRSTRIDE(aligned_pitch / 16), -+ rkvdec->regs + RKVDEC_REG_PICPAR); -+ writel_relaxed(RKVDEC_Y_VIRSTRIDE(y_len / 16), -+ rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); -+ writel_relaxed(RKVDEC_YUV_VIRSTRIDE(yuv_len / 16), -+ rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); -+ -+ stream_len = vb2_get_plane_payload(&run->base.bufs.src->vb2_buf, 0); -+ writel_relaxed(RKVDEC_STRM_LEN(stream_len), -+ rkvdec->regs + RKVDEC_REG_STRM_LEN); -+ -+ /* -+ * Reset count buffer, because decoder only output intra related syntax -+ * counts when decoding intra frame, but update entropy need to update -+ * all the probabilities. -+ */ -+ if (intra_only) -+ memset(vp9_ctx->count_tbl.cpu, 0, vp9_ctx->count_tbl.size); -+ -+ vp9_ctx->cur.segmapid = vp9_ctx->last.segmapid; -+ if (!intra_only && -+ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && -+ (!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) || -+ (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP))) -+ vp9_ctx->cur.segmapid++; -+ -+ for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) -+ config_ref_registers(ctx, run, ref_bufs, i); -+ -+ for (i = 0; i < 8; i++) -+ config_seg_registers(ctx, i); -+ -+ writel_relaxed(RKVDEC_VP9_TX_MODE(dec_params->tx_mode) | -+ RKVDEC_VP9_FRAME_REF_MODE(dec_params->reference_mode), -+ rkvdec->regs + RKVDEC_VP9_CPRHEADER_CONFIG); -+ -+ if (!intra_only) { -+ const struct v4l2_vp9_loop_filter *lf; -+ s8 delta; -+ -+ if (vp9_ctx->last.valid) -+ lf = &vp9_ctx->last.lf; -+ else -+ lf = &vp9_ctx->cur.lf; -+ -+ val = 0; -+ for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { -+ delta = lf->ref_deltas[i]; -+ val |= RKVDEC_REF_DELTAS_LASTFRAME(i, delta); -+ } -+ -+ writel_relaxed(val, -+ rkvdec->regs + RKVDEC_VP9_REF_DELTAS_LASTFRAME); -+ -+ for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { -+ delta = lf->mode_deltas[i]; -+ last_frame_info |= RKVDEC_MODE_DELTAS_LASTFRAME(i, -+ delta); -+ } -+ } -+ -+ if (vp9_ctx->last.valid && !intra_only && -+ vp9_ctx->last.seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) -+ last_frame_info |= RKVDEC_SEG_EN_LASTFRAME; -+ -+ if (vp9_ctx->last.valid && -+ vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME) -+ last_frame_info |= RKVDEC_LAST_SHOW_FRAME; -+ -+ if (vp9_ctx->last.valid && -+ vp9_ctx->last.flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) -+ last_frame_info |= RKVDEC_LAST_INTRA_ONLY; -+ -+ if (vp9_ctx->last.valid && -+ last->vp9.width == dst->vp9.width && -+ last->vp9.height == dst->vp9.height) -+ last_frame_info |= RKVDEC_LAST_WIDHHEIGHT_EQCUR; -+ -+ writel_relaxed(last_frame_info, -+ rkvdec->regs + RKVDEC_VP9_INFO_LASTFRAME); -+ -+ writel_relaxed(stream_len - dec_params->compressed_header_size - -+ dec_params->uncompressed_header_size, -+ rkvdec->regs + RKVDEC_VP9_LASTTILE_SIZE); -+ -+ for (i = 0; !intra_only && i < ARRAY_SIZE(ref_bufs); i++) { -+ u32 refw = ref_bufs[i]->vp9.width; -+ u32 refh = ref_bufs[i]->vp9.height; -+ u32 hscale, vscale; -+ -+ hscale = (refw << 14) / dst->vp9.width; -+ vscale = (refh << 14) / dst->vp9.height; -+ writel_relaxed(RKVDEC_VP9_REF_HOR_SCALE(hscale) | -+ RKVDEC_VP9_REF_VER_SCALE(vscale), -+ rkvdec->regs + RKVDEC_VP9_REF_SCALE(i)); -+ } -+ -+ addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); -+ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); -+ addr = vb2_dma_contig_plane_dma_addr(&run->base.bufs.src->vb2_buf, 0); -+ writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); -+ writel_relaxed(vp9_ctx->priv_tbl.dma + -+ offsetof(struct rkvdec_vp9_priv_tbl, probs), -+ rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); -+ writel_relaxed(vp9_ctx->count_tbl.dma, -+ rkvdec->regs + RKVDEC_REG_VP9COUNT_BASE); -+ -+ writel_relaxed(vp9_ctx->priv_tbl.dma + -+ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + -+ (RKVDEC_VP9_MAX_SEGMAP_SIZE * vp9_ctx->cur.segmapid), -+ rkvdec->regs + RKVDEC_REG_VP9_SEGIDCUR_BASE); -+ writel_relaxed(vp9_ctx->priv_tbl.dma + -+ offsetof(struct rkvdec_vp9_priv_tbl, segmap) + -+ (RKVDEC_VP9_MAX_SEGMAP_SIZE * (!vp9_ctx->cur.segmapid)), -+ rkvdec->regs + RKVDEC_REG_VP9_SEGIDLAST_BASE); -+ -+ if (!intra_only && -+ !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && -+ vp9_ctx->last.valid) -+ mv_ref = last; -+ else -+ mv_ref = dst; -+ -+ writel_relaxed(get_mv_base_addr(mv_ref), -+ rkvdec->regs + RKVDEC_VP9_REF_COLMV_BASE); -+ -+ writel_relaxed(ctx->decoded_fmt.fmt.pix_mp.width | -+ (ctx->decoded_fmt.fmt.pix_mp.height << 16), -+ rkvdec->regs + RKVDEC_REG_PERFORMANCE_CYCLE); -+} -+ -+static int -+validate_dec_params(struct rkvdec_ctx *ctx, -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params) -+{ -+ unsigned int aligned_width, aligned_height; -+ -+ /* We only support profile 0. */ -+ if (dec_params->profile != 0) { -+ dev_err(ctx->dev->dev, "unsupported profile %d\n", -+ dec_params->profile); -+ return -EINVAL; -+ } -+ -+ aligned_width = round_up(dec_params->frame_width_minus_1 + 1, 64); -+ aligned_height = round_up(dec_params->frame_height_minus_1 + 1, 64); -+ -+ /* -+ * Userspace should update the capture/decoded format when the -+ * resolution changes. -+ */ -+ if (aligned_width != ctx->decoded_fmt.fmt.pix_mp.width || -+ aligned_height != ctx->decoded_fmt.fmt.pix_mp.height) { -+ dev_err(ctx->dev->dev, -+ "unexpected bitstream resolution %dx%d\n", -+ dec_params->frame_width_minus_1 + 1, -+ dec_params->frame_height_minus_1 +1); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_vp9_run_preamble(struct rkvdec_ctx *ctx, -+ struct rkvdec_vp9_run *run) -+{ -+ const struct v4l2_ctrl_vp9_frame_decode_params *dec_params; -+ const struct v4l2_ctrl_vp9_frame_ctx *fctx = NULL; -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_ctrl *ctrl; -+ u8 frm_ctx; -+ int ret; -+ -+ rkvdec_run_preamble(ctx, &run->base); -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS); -+ WARN_ON(!ctrl); -+ -+ dec_params = ctrl ? ctrl->p_cur.p : NULL; -+ if (WARN_ON(!dec_params)) -+ return -EINVAL; -+ -+ ret = validate_dec_params(ctx, dec_params); -+ if (ret) -+ return ret; -+ -+ run->decode_params = dec_params; -+ -+ /* No need to load the frame context if we don't need to update it. */ -+ if (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) -+ return 0; -+ -+ /* -+ * When a refresh context is requested in parallel mode, we should just -+ * update the context with the probs passed in the decode parameters. -+ */ -+ if (dec_params->flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE) { -+ vp9_ctx->frame_context.probs = dec_params->probs; -+ return 0; -+ } -+ -+ frm_ctx = run->decode_params->frame_context_idx; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(frm_ctx)); -+ if (WARN_ON(!ctrl)) -+ return 0; -+ -+ fctx = ctrl->p_cur.p; -+ vp9_ctx->frame_context = *fctx; -+ -+ /* -+ * For intra-only frames, we must update the context TX and skip probs -+ * with the value passed in the decode params. -+ */ -+ if (dec_params->flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) { -+ struct v4l2_vp9_probabilities *probs; -+ -+ probs = &vp9_ctx->frame_context.probs; -+ memcpy(probs->skip, dec_params->probs.skip, -+ sizeof(probs->skip)); -+ memcpy(probs->tx8, dec_params->probs.tx8, -+ sizeof(probs->tx8)); -+ memcpy(probs->tx16, dec_params->probs.tx16, -+ sizeof(probs->tx16)); -+ memcpy(probs->tx32, dec_params->probs.tx32, -+ sizeof(probs->tx32)); -+ } -+ -+ return 0; -+} -+ -+static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_vp9_run run = { }; -+ int ret; -+ -+ ret = rkvdec_vp9_run_preamble(ctx, &run); -+ if (ret) { -+ rkvdec_run_postamble(ctx, &run.base); -+ return ret; -+ } -+ -+ /* Prepare probs. */ -+ init_probs(ctx, &run); -+ -+ /* Configure hardware registers. */ -+ config_registers(ctx, &run); -+ -+ rkvdec_run_postamble(ctx, &run.base); -+ -+ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); -+ -+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); -+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); -+ -+ writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); -+ /* Start decoding! */ -+ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | -+ RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, -+ rkvdec->regs + RKVDEC_REG_INTERRUPT); -+ -+ return 0; -+} -+ -+static u8 adapt_prob(u8 p1, u32 ct0, u32 ct1, u16 max_count, u32 update_factor) -+{ -+ u32 ct = ct0 + ct1, p2; -+ u32 lo = 1; -+ u32 hi = 255; -+ -+ if (!ct) -+ return p1; -+ -+ p2 = ((ct0 << 8) + (ct >> 1)) / ct; -+ p2 = clamp(p2, lo, hi); -+ ct = min_t(u32, ct, max_count); -+ -+ if (WARN_ON(max_count >= 257)) -+ return p1; -+ -+ update_factor = rkvdec_fastdiv(update_factor * ct, max_count); -+ -+ return p1 + (((p2 - p1) * update_factor + 128) >> 8); -+} -+ -+#define BAND_6(band) ((band) == 0 ? 3 : 6) -+ -+static void adapt_coeff(u8 coef[6][6][3], -+ const struct rkvdec_vp9_refs_counts ref_cnt[6][6], -+ u32 uf) -+{ -+ s32 l, m, n; -+ -+ for (l = 0; l < 6; l++) { -+ for (m = 0; m < BAND_6(l); m++) { -+ u8 *p = coef[l][m]; -+ const u32 n0 = ref_cnt[l][m].coeff[0]; -+ const u32 n1 = ref_cnt[l][m].coeff[1]; -+ const u32 n2 = ref_cnt[l][m].coeff[2]; -+ const u32 neob = ref_cnt[l][m].eob[1]; -+ const u32 eob_count = ref_cnt[l][m].eob[0]; -+ const u32 branch_ct[3][2] = { -+ { neob, eob_count - neob }, -+ { n0, n1 + n2 }, -+ { n1, n2 } -+ }; -+ -+ for (n = 0; n < 3; n++) -+ p[n] = adapt_prob(p[n], branch_ct[n][0], -+ branch_ct[n][1], 24, uf); -+ } -+ } -+} -+ -+static void -+adapt_coef_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6], -+ unsigned int uf) -+{ -+ unsigned int i, j, k; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { -+ for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { -+ for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); -+ k++) { -+ adapt_coeff(probs->coef[i][j][k], -+ ref_cnt[k][i][j], -+ uf); -+ } -+ } -+ } -+} -+ -+static void adapt_intra_frame_probs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_vp9_probabilities *probs = &vp9_ctx->frame_context.probs; -+ const struct rkvdec_vp9_intra_frame_symbol_counts *sym_cnts; -+ -+ sym_cnts = vp9_ctx->count_tbl.cpu; -+ adapt_coef_probs(probs, sym_cnts->ref_cnt, 112); -+} -+ -+static void -+adapt_skip_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->skip); i++) -+ probs->skip[i] = adapt_prob(probs->skip[i], -+ sym_cnts->skip[i][0], -+ sym_cnts->skip[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_is_inter_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->is_inter); i++) -+ probs->is_inter[i] = adapt_prob(probs->is_inter[i], -+ sym_cnts->inter[i][0], -+ sym_cnts->inter[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_comp_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->comp_mode); i++) -+ probs->comp_mode[i] = adapt_prob(probs->comp_mode[i], -+ sym_cnts->comp[i][0], -+ sym_cnts->comp[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_comp_ref_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->comp_ref); i++) -+ probs->comp_ref[i] = adapt_prob(probs->comp_ref[i], -+ sym_cnts->comp_ref[i][0], -+ sym_cnts->comp_ref[i][1], -+ 20, 128); -+} -+ -+static void -+adapt_single_ref_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->single_ref); i++) { -+ u8 *p = probs->single_ref[i]; -+ -+ p[0] = adapt_prob(p[0], sym_cnts->single_ref[i][0][0], -+ sym_cnts->single_ref[i][0][1], 20, 128); -+ p[1] = adapt_prob(p[1], sym_cnts->single_ref[i][1][0], -+ sym_cnts->single_ref[i][1][1], 20, 128); -+ } -+} -+ -+static void -+adapt_partition_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->partition); i++) { -+ const u32 *c = sym_cnts->partition[i]; -+ u8 *p = probs->partition[i]; -+ -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ } -+} -+ -+static void -+adapt_tx_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->tx8); i++) { -+ u8 *p16x16 = probs->tx16[i]; -+ u8 *p32x32 = probs->tx32[i]; -+ const u32 *c16 = sym_cnts->tx16p[i]; -+ const u32 *c32 = sym_cnts->tx32p[i]; -+ const u32 *c8 = sym_cnts->tx8p[i]; -+ u8 *p8x8 = probs->tx8[i]; -+ -+ p8x8[0] = adapt_prob(p8x8[0], c8[0], c8[1], 20, 128); -+ p16x16[0] = adapt_prob(p16x16[0], c16[0], c16[1] + c16[2], -+ 20, 128); -+ p16x16[1] = adapt_prob(p16x16[1], c16[1], c16[2], 20, 128); -+ p32x32[0] = adapt_prob(p32x32[0], c32[0], -+ c32[1] + c32[2] + c32[3], 20, 128); -+ p32x32[1] = adapt_prob(p32x32[1], c32[1], c32[2] + c32[3], -+ 20, 128); -+ p32x32[2] = adapt_prob(p32x32[2], c32[2], c32[3], 20, 128); -+ } -+} -+ -+static void -+adapt_interp_filter_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->interp_filter); i++) { -+ u8 *p = probs->interp_filter[i]; -+ const u32 *c = sym_cnts->filter[i]; -+ -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2], 20, 128); -+ } -+} -+ -+static void -+adapt_inter_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->inter_mode); i++) { -+ const u32 *c = sym_cnts->mv_mode[i]; -+ u8 *p = probs->inter_mode[i]; -+ -+ p[0] = adapt_prob(p[0], c[2], c[1] + c[0] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[0], c[1] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[1], c[3], 20, 128); -+ } -+} -+ -+static void -+adapt_mv_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts, -+ bool high_prec_mv) -+{ -+ const u32 *c = sym_cnts->mv_joint; -+ u8 *p = probs->mv.joint; -+ unsigned int i, j; -+ u32 sum; -+ -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ -+ for (i = 0; i < ARRAY_SIZE(probs->mv.sign); i++) { -+ p = probs->mv.sign; -+ -+ p[i] = adapt_prob(p[i], sym_cnts->sign[i][0], -+ sym_cnts->sign[i][1], 20, 128); -+ -+ p = probs->mv.class[i]; -+ c = sym_cnts->classes[i]; -+ sum = c[1] + c[2] + c[3] + c[4] + c[5] + c[6] + c[7] + c[8] + -+ c[9] + c[10]; -+ p[0] = adapt_prob(p[0], c[0], sum, 20, 128); -+ sum -= c[1]; -+ p[1] = adapt_prob(p[1], c[1], sum, 20, 128); -+ sum -= c[2] + c[3]; -+ p[2] = adapt_prob(p[2], c[2] + c[3], sum, 20, 128); -+ p[3] = adapt_prob(p[3], c[2], c[3], 20, 128); -+ sum -= c[4] + c[5]; -+ p[4] = adapt_prob(p[4], c[4] + c[5], sum, 20, 128); -+ p[5] = adapt_prob(p[5], c[4], c[5], 20, 128); -+ sum -= c[6]; -+ p[6] = adapt_prob(p[6], c[6], sum, 20, 128); -+ p[7] = adapt_prob(p[7], c[7] + c[8], c[9] + c[10], 20, 128); -+ p[8] = adapt_prob(p[8], c[7], c[8], 20, 128); -+ p[9] = adapt_prob(p[9], c[9], c[10], 20, 128); -+ -+ p = probs->mv.class0_bit; -+ p[i] = adapt_prob(p[i], -+ sym_cnts->class0[i][0], -+ sym_cnts->class0[i][1], 20, 128); -+ -+ p = probs->mv.bits[i]; -+ for (j = 0; j < 10; j++) -+ p[j] = adapt_prob(p[j], sym_cnts->bits[i][j][0], -+ sym_cnts->bits[i][j][1], 20, 128); -+ -+ for (j = 0; j < 2; j++) { -+ p = probs->mv.class0_fr[i][j]; -+ c = sym_cnts->class0_fp[i][j]; -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], -+ 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ } -+ -+ p = probs->mv.fr[i]; -+ c = sym_cnts->fp[i]; -+ p[0] = adapt_prob(p[0], c[0], c[1] + c[2] + c[3], 20, 128); -+ p[1] = adapt_prob(p[1], c[1], c[2] + c[3], 20, 128); -+ p[2] = adapt_prob(p[2], c[2], c[3], 20, 128); -+ -+ if (!high_prec_mv) -+ continue; -+ -+ p = probs->mv.class0_hp; -+ p[i] = adapt_prob(p[i], sym_cnts->class0_hp[i][0], -+ sym_cnts->class0_hp[i][1], 20, 128); -+ -+ p = probs->mv.hp; -+ p[i] = adapt_prob(p[i], sym_cnts->hp[i][0], -+ sym_cnts->hp[i][1], 20, 128); -+ } -+} -+ -+static void -+adapt_intra_mode_probs(u8 *p, const u32 *c) -+{ -+ u32 sum = 0, s2; -+ unsigned int i; -+ -+ for (i = V4L2_VP9_INTRA_PRED_MODE_V; i <= V4L2_VP9_INTRA_PRED_MODE_TM; -+ i++) -+ sum += c[i]; -+ -+ p[0] = adapt_prob(p[0], c[V4L2_VP9_INTRA_PRED_MODE_DC], sum, 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_TM]; -+ p[1] = adapt_prob(p[1], c[V4L2_VP9_INTRA_PRED_MODE_TM], sum, 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_V]; -+ p[2] = adapt_prob(p[2], c[V4L2_VP9_INTRA_PRED_MODE_V], sum, 20, 128); -+ s2 = c[V4L2_VP9_INTRA_PRED_MODE_H] + c[V4L2_VP9_INTRA_PRED_MODE_D135] + -+ c[V4L2_VP9_INTRA_PRED_MODE_D117]; -+ sum -= s2; -+ p[3] = adapt_prob(p[3], s2, sum, 20, 128); -+ s2 -= c[V4L2_VP9_INTRA_PRED_MODE_H]; -+ p[4] = adapt_prob(p[4], c[V4L2_VP9_INTRA_PRED_MODE_H], s2, 20, 128); -+ p[5] = adapt_prob(p[5], c[V4L2_VP9_INTRA_PRED_MODE_D135], -+ c[V4L2_VP9_INTRA_PRED_MODE_D117], 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_D45]; -+ p[6] = adapt_prob(p[6], c[V4L2_VP9_INTRA_PRED_MODE_D45], -+ sum, 20, 128); -+ sum -= c[V4L2_VP9_INTRA_PRED_MODE_D63]; -+ p[7] = adapt_prob(p[7], c[V4L2_VP9_INTRA_PRED_MODE_D63], sum, -+ 20, 128); -+ p[8] = adapt_prob(p[8], c[V4L2_VP9_INTRA_PRED_MODE_D153], -+ c[V4L2_VP9_INTRA_PRED_MODE_D207], 20, 128); -+} -+ -+static void -+adapt_y_intra_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->y_mode); i++) -+ adapt_intra_mode_probs(probs->y_mode[i], sym_cnts->y_mode[i]); -+} -+ -+static void -+adapt_uv_intra_mode_probs(struct v4l2_vp9_probabilities *probs, -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(probs->uv_mode); i++) -+ adapt_intra_mode_probs(probs->uv_mode[i], -+ sym_cnts->uv_mode[i]); -+} -+ -+static void -+adapt_inter_frame_probs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_vp9_probabilities *probs = &vp9_ctx->frame_context.probs; -+ const struct rkvdec_vp9_inter_frame_symbol_counts *sym_cnts; -+ -+ sym_cnts = vp9_ctx->count_tbl.cpu; -+ /* coefficients */ -+ if (vp9_ctx->last.valid && -+ !(vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME)) -+ adapt_coef_probs(probs, sym_cnts->ref_cnt, 112); -+ else -+ adapt_coef_probs(probs, sym_cnts->ref_cnt, 128); -+ -+ /* skip flag */ -+ adapt_skip_probs(probs, sym_cnts); -+ -+ /* intra/inter flag */ -+ adapt_is_inter_probs(probs, sym_cnts); -+ -+ /* comppred flag */ -+ adapt_comp_mode_probs(probs, sym_cnts); -+ -+ /* reference frames */ -+ adapt_comp_ref_probs(probs, sym_cnts); -+ -+ if (vp9_ctx->cur.reference_mode != V4L2_VP9_REF_MODE_COMPOUND) -+ adapt_single_ref_probs(probs, sym_cnts); -+ -+ /* block partitioning */ -+ adapt_partition_probs(probs, sym_cnts); -+ -+ /* tx size */ -+ if (vp9_ctx->cur.tx_mode == V4L2_VP9_TX_MODE_SELECT) -+ adapt_tx_probs(probs, sym_cnts); -+ -+ /* interpolation filter */ -+ if (vp9_ctx->cur.interpolation_filter == V4L2_VP9_INTERP_FILTER_SWITCHABLE) -+ adapt_interp_filter_probs(probs, sym_cnts); -+ -+ /* inter modes */ -+ adapt_inter_mode_probs(probs, sym_cnts); -+ -+ /* mv probs */ -+ adapt_mv_probs(probs, sym_cnts, -+ !!(vp9_ctx->cur.flags & -+ V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)); -+ -+ /* y intra modes */ -+ adapt_y_intra_mode_probs(probs, sym_cnts); -+ -+ /* uv intra modes */ -+ adapt_uv_intra_mode_probs(probs, sym_cnts); -+} -+ -+static void adapt_probs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ bool intra_only; -+ -+ intra_only = !!(vp9_ctx->cur.flags & -+ (V4L2_VP9_FRAME_FLAG_KEY_FRAME | -+ V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); -+ -+ if (intra_only) -+ adapt_intra_frame_probs(ctx); -+ else -+ adapt_inter_frame_probs(ctx); -+} -+ -+static void rkvdec_vp9_done(struct rkvdec_ctx *ctx, -+ struct vb2_v4l2_buffer *src_buf, -+ struct vb2_v4l2_buffer *dst_buf, -+ enum vb2_buffer_state result) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct v4l2_ctrl *ctrl; -+ unsigned int fctx_idx; -+ -+ if (result == VB2_BUF_STATE_ERROR) -+ goto out_update_last; -+ -+ if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) -+ goto out_update_last; -+ -+ fctx_idx = vp9_ctx->cur.frame_context_idx; -+ -+ if (!(vp9_ctx->cur.flags & -+ (V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT | -+ V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE))) -+ adapt_probs(ctx); -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(fctx_idx)); -+ if (WARN_ON(!ctrl)) -+ goto out_update_last; -+ -+ v4l2_ctrl_s_ctrl_compound(ctrl, V4L2_CTRL_TYPE_VP9_FRAME_CONTEXT, -+ &vp9_ctx->frame_context); -+ -+out_update_last: -+ update_ctx_last_info(vp9_ctx); -+} -+ -+static int rkvdec_vp9_start(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_vp9_priv_tbl *priv_tbl; -+ struct rkvdec_vp9_ctx *vp9_ctx; -+ u8 *count_tbl; -+ int ret; -+ -+ vp9_ctx = kzalloc(sizeof(*vp9_ctx), GFP_KERNEL); -+ if (!vp9_ctx) -+ return -ENOMEM; -+ -+ ctx->priv = vp9_ctx; -+ -+ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), -+ &vp9_ctx->priv_tbl.dma, GFP_KERNEL); -+ if (!priv_tbl) { -+ ret = -ENOMEM; -+ goto err_free_ctx; -+ } -+ -+ vp9_ctx->priv_tbl.size = sizeof(*priv_tbl); -+ vp9_ctx->priv_tbl.cpu = priv_tbl; -+ memset(priv_tbl, 0, sizeof(*priv_tbl)); -+ -+ count_tbl = dma_alloc_coherent(rkvdec->dev, RKVDEC_VP9_COUNT_SIZE, -+ &vp9_ctx->count_tbl.dma, GFP_KERNEL); -+ if (!count_tbl) { -+ ret = -ENOMEM; -+ goto err_free_priv_tbl; -+ } -+ -+ vp9_ctx->count_tbl.size = RKVDEC_VP9_COUNT_SIZE; -+ vp9_ctx->count_tbl.cpu = count_tbl; -+ memset(count_tbl, 0, sizeof(*count_tbl)); -+ -+ return 0; -+ -+err_free_priv_tbl: -+ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, -+ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); -+ -+err_free_ctx: -+ kfree(vp9_ctx); -+ return ret; -+} -+ -+static void rkvdec_vp9_stop(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ dma_free_coherent(rkvdec->dev, vp9_ctx->count_tbl.size, -+ vp9_ctx->count_tbl.cpu, vp9_ctx->count_tbl.dma); -+ dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, -+ vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); -+ kfree(vp9_ctx); -+} -+ -+static int rkvdec_vp9_adjust_fmt(struct rkvdec_ctx *ctx, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; -+ -+ fmt->num_planes = 1; -+ if (!fmt->plane_fmt[0].sizeimage) -+ fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * 2; -+ return 0; -+} -+ -+const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops = { -+ .adjust_fmt = rkvdec_vp9_adjust_fmt, -+ .start = rkvdec_vp9_start, -+ .stop = rkvdec_vp9_stop, -+ .run = rkvdec_vp9_run, -+ .done = rkvdec_vp9_done, -+}; -diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c -index 4df2a248ab96..393d649a1775 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.c -+++ b/drivers/staging/media/rkvdec/rkvdec.c -@@ -74,10 +74,45 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { - .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), - }; - --static const u32 rkvdec_h264_decoded_fmts[] = { -+static const u32 rkvdec_h264_vp9_decoded_fmts[] = { - V4L2_PIX_FMT_NV12, - }; - -+static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { -+ { -+ .per_request = true, -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_DECODE_PARAMS, -+ }, -+ { -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(0), -+ }, -+ { -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(1), -+ }, -+ { -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(2), -+ }, -+ { -+ .mandatory = true, -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_FRAME_CONTEXT(3), -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, -+ .cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, -+ .cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0, -+ .cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0, -+ }, -+}; -+ -+static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { -+ .ctrls = rkvdec_vp9_ctrl_descs, -+ .num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs), -+}; -+ - static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { - { - .fourcc = V4L2_PIX_FMT_H264_SLICE, -@@ -91,8 +126,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { - }, - .ctrls = &rkvdec_h264_ctrls, - .ops = &rkvdec_h264_fmt_ops, -- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), -- .decoded_fmts = rkvdec_h264_decoded_fmts, -+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), -+ .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, -+ }, -+ { -+ .fourcc = V4L2_PIX_FMT_VP9_FRAME, -+ .frmsize = { -+ .min_width = 64, -+ .max_width = 4096, -+ .step_width = 64, -+ .min_height = 64, -+ .max_height = 2304, -+ .step_height = 64, -+ }, -+ .ctrls = &rkvdec_vp9_ctrls, -+ .ops = &rkvdec_vp9_fmt_ops, -+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), -+ .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, - } - }; - -diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h -index 2fc9f46b6910..2a795babfccd 100644 ---- a/drivers/staging/media/rkvdec/rkvdec.h -+++ b/drivers/staging/media/rkvdec/rkvdec.h -@@ -52,6 +52,10 @@ struct rkvdec_vp9_decoded_buffer_info { - struct rkvdec_decoded_buffer { - /* Must be the first field in this struct. */ - struct v4l2_m2m_buffer base; -+ -+ union { -+ struct rkvdec_vp9_decoded_buffer_info vp9; -+ }; - }; - - static inline struct rkvdec_decoded_buffer * -@@ -118,4 +122,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); - void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); - - extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; -+extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; -+ - #endif /* RKVDEC_H_ */ diff --git a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.7.patch b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.7.patch deleted file mode 100644 index ac030aa11f..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.7.patch +++ /dev/null @@ -1,1364 +0,0 @@ -From 6c8860a9368a1308f78f4d343cc79db4ed87c1b0 Mon Sep 17 00:00:00 2001 -From: Steven Price -Date: Thu, 9 Jan 2020 13:31:04 +0000 -Subject: [PATCH] drm/panfrost: Remove core stack power management - -Explicit management of the GPU's core stacks is only necessary in the -case of a broken integration with the PDC. Since there are no known -platforms which have such a broken integration let's remove the explicit -control from the driver since this apparently causes problems on other -platforms and will have a small performance penality. - -The out of tree mali_kbase driver contains this text regarding -controlling the core stack (CONFIGMALI_CORESTACK): - - Enabling this feature on supported GPUs will let the driver powering - on/off the GPU core stack independently without involving the Power - Domain Controller. This should only be enabled on platforms which - integration of the PDC to the Mali GPU is known to be problematic. - This feature is currently only supported on t-Six and t-HEx GPUs. - - If unsure, say N. - -Signed-off-by: Steven Price -Acked-by: Alyssa Rosenzweig -Reviewed-by: Nicolas Boichat -Tested-by: Nicolas Boichat -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20200109133104.11661-1-steven.price@arm.com -(cherry picked from commit a5f768239ebda810cbb622a979301b7fe1c3b9b9) ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 5 ----- - 1 file changed, 5 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index 8822ec13a0d6..460fc190de6e 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -309,10 +309,6 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev) - ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO, - val, val == pfdev->features.l2_present, 100, 1000); - -- gpu_write(pfdev, STACK_PWRON_LO, pfdev->features.stack_present); -- ret |= readl_relaxed_poll_timeout(pfdev->iomem + STACK_READY_LO, -- val, val == pfdev->features.stack_present, 100, 1000); -- - gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present); - ret |= readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO, - val, val == pfdev->features.shader_present, 100, 1000); -@@ -329,7 +325,6 @@ void panfrost_gpu_power_off(struct panfrost_device *pfdev) - { - gpu_write(pfdev, TILER_PWROFF_LO, 0); - gpu_write(pfdev, SHADER_PWROFF_LO, 0); -- gpu_write(pfdev, STACK_PWROFF_LO, 0); - gpu_write(pfdev, L2_PWROFF_LO, 0); - } - - -From b4f944467b75aec16fae6d1ed1c8094dee360ef7 Mon Sep 17 00:00:00 2001 -From: Ezequiel Garcia -Date: Sat, 14 Dec 2019 01:59:52 -0300 -Subject: [PATCH] drm/panfrost: Prefix interrupt handlers' names - -Currently, the interrupt lines requested by Panfrost -use unmeaningful names, which adds some obscurity -to interrupt introspection (i.e. any tool based -on procfs' interrupts file). - -In order to improve this, prefix each requested -interrupt with the module name: panfrost-{gpu,job,mmu}. - -Signed-off-by: Ezequiel Garcia -Reviewed-by: Steven Price -Reviewed-by: Alyssa Rosenzweig -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20191214045952.9452-1-ezequiel@collabora.com -(cherry picked from commit 73896f60d4865657740c64821a7b18825a9bf96c) ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +- - drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- - drivers/gpu/drm/panfrost/panfrost_mmu.c | 6 ++++-- - 3 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index 460fc190de6e..1b9b79cd5804 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -346,7 +346,7 @@ int panfrost_gpu_init(struct panfrost_device *pfdev) - return -ENODEV; - - err = devm_request_irq(pfdev->dev, irq, panfrost_gpu_irq_handler, -- IRQF_SHARED, "gpu", pfdev); -+ IRQF_SHARED, KBUILD_MODNAME "-gpu", pfdev); - if (err) { - dev_err(pfdev->dev, "failed to request gpu irq"); - return err; -diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c -index 9a1a72a748e7..7914b1570841 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_job.c -+++ b/drivers/gpu/drm/panfrost/panfrost_job.c -@@ -508,7 +508,7 @@ int panfrost_job_init(struct panfrost_device *pfdev) - return -ENODEV; - - ret = devm_request_irq(pfdev->dev, irq, panfrost_job_irq_handler, -- IRQF_SHARED, "job", pfdev); -+ IRQF_SHARED, KBUILD_MODNAME "-job", pfdev); - if (ret) { - dev_err(pfdev->dev, "failed to request job irq"); - return ret; -diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c -index 5d75f8cf6477..ed28aeba6d59 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_mmu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c -@@ -640,9 +640,11 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) - if (irq <= 0) - return -ENODEV; - -- err = devm_request_threaded_irq(pfdev->dev, irq, panfrost_mmu_irq_handler, -+ err = devm_request_threaded_irq(pfdev->dev, irq, -+ panfrost_mmu_irq_handler, - panfrost_mmu_irq_handler_thread, -- IRQF_SHARED, "mmu", pfdev); -+ IRQF_SHARED, KBUILD_MODNAME "-mmu", -+ pfdev); - - if (err) { - dev_err(pfdev->dev, "failed to request mmu irq"); - -From 86df1243c1b58ace83e61b8775cf3f44b8247a7e Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Thu, 16 Jan 2020 21:11:53 +0800 -Subject: [PATCH] drm/lima: update register info - -From Mali r10p0 kernel driver source code. - -Reviewed-by: Vasily Khoruzhick -Tested-by: Andreas Baierl -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200116131157.13346-2-yuq825@gmail.com -(cherry picked from commit 500edbbd537b6f8ca10d6cfb6c8079cda6e20c3e) ---- - drivers/gpu/drm/lima/lima_regs.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/lima/lima_regs.h b/drivers/gpu/drm/lima/lima_regs.h -index ace8ecefbe90..0124c90e0153 100644 ---- a/drivers/gpu/drm/lima/lima_regs.h -+++ b/drivers/gpu/drm/lima/lima_regs.h -@@ -239,6 +239,7 @@ - #define LIMA_MMU_STATUS_REPLAY_BUFFER_EMPTY BIT(4) - #define LIMA_MMU_STATUS_PAGE_FAULT_IS_WRITE BIT(5) - #define LIMA_MMU_STATUS_BUS_ID(x) ((x >> 6) & 0x1F) -+#define LIMA_MMU_STATUS_STALL_NOT_ACTIVE BIT(31) - #define LIMA_MMU_COMMAND 0x0008 - #define LIMA_MMU_COMMAND_ENABLE_PAGING 0x00 - #define LIMA_MMU_COMMAND_DISABLE_PAGING 0x01 - -From fe3eea5578579f8ad80cd484233ccfb6331ee117 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Thu, 16 Jan 2020 21:11:54 +0800 -Subject: [PATCH] drm/lima: add lima_vm_map_bo - -For dynamically mapping added backup memory of lima_bo to vm. -This is a preparation for adding heap buffer support. - -Reviewed-by: Vasily Khoruzhick -Tested-by: Andreas Baierl -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200116131157.13346-3-yuq825@gmail.com -(cherry picked from commit dc76cb7a1fd195348100c2a87eb1d55d2a7ddd09) ---- - drivers/gpu/drm/lima/lima_vm.c | 42 ++++++++++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/lima/lima_vm.h | 1 + - 2 files changed, 43 insertions(+) - -diff --git a/drivers/gpu/drm/lima/lima_vm.c b/drivers/gpu/drm/lima/lima_vm.c -index 840e2350d872..2e513841de6c 100644 ---- a/drivers/gpu/drm/lima/lima_vm.c -+++ b/drivers/gpu/drm/lima/lima_vm.c -@@ -277,3 +277,45 @@ void lima_vm_print(struct lima_vm *vm) - } - } - } -+ -+int lima_vm_map_bo(struct lima_vm *vm, struct lima_bo *bo, int pageoff) -+{ -+ struct lima_bo_va *bo_va; -+ struct sg_dma_page_iter sg_iter; -+ int offset = 0, err; -+ u32 base; -+ -+ mutex_lock(&bo->lock); -+ -+ bo_va = lima_vm_bo_find(vm, bo); -+ if (!bo_va) { -+ err = -ENOENT; -+ goto err_out0; -+ } -+ -+ mutex_lock(&vm->lock); -+ -+ base = bo_va->node.start + (pageoff << PAGE_SHIFT); -+ for_each_sg_dma_page(bo->base.sgt->sgl, &sg_iter, -+ bo->base.sgt->nents, pageoff) { -+ err = lima_vm_map_page(vm, sg_page_iter_dma_address(&sg_iter), -+ base + offset); -+ if (err) -+ goto err_out1; -+ -+ offset += PAGE_SIZE; -+ } -+ -+ mutex_unlock(&vm->lock); -+ -+ mutex_unlock(&bo->lock); -+ return 0; -+ -+err_out1: -+ if (offset) -+ lima_vm_unmap_range(vm, base, base + offset - 1); -+ mutex_unlock(&vm->lock); -+err_out0: -+ mutex_unlock(&bo->lock); -+ return err; -+} -diff --git a/drivers/gpu/drm/lima/lima_vm.h b/drivers/gpu/drm/lima/lima_vm.h -index e0bdedcf14dd..22aeec77d84d 100644 ---- a/drivers/gpu/drm/lima/lima_vm.h -+++ b/drivers/gpu/drm/lima/lima_vm.h -@@ -58,5 +58,6 @@ static inline void lima_vm_put(struct lima_vm *vm) - } - - void lima_vm_print(struct lima_vm *vm); -+int lima_vm_map_bo(struct lima_vm *vm, struct lima_bo *bo, int pageoff); - - #endif - -From adfc5c2c97d37192c62e584b37271a31026eee6b Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Thu, 16 Jan 2020 21:11:55 +0800 -Subject: [PATCH] drm/lima: support heap buffer creation - -heap buffer is used as output of GP and input of PP for -Mali Utgard GPU. Size of heap buffer depends on the task -so is a runtime variable. - -Previously we just create a large enough buffer as heap -buffer. Now we add a heap buffer type to be able to -increase the backup memory dynamically when GP fail due -to lack of heap memory. - -Reviewed-by: Vasily Khoruzhick -Tested-by: Andreas Baierl -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200116131157.13346-4-yuq825@gmail.com -(cherry picked from commit 6aebc51d7aeff5a30d86485f320f0c871b5f23a4) ---- - drivers/gpu/drm/lima/lima_drv.c | 6 +- - drivers/gpu/drm/lima/lima_drv.h | 1 + - drivers/gpu/drm/lima/lima_gem.c | 134 +++++++++++++++++++++++++++++++++++++--- - drivers/gpu/drm/lima/lima_gem.h | 4 ++ - drivers/gpu/drm/lima/lima_vm.c | 4 +- - include/uapi/drm/lima_drm.h | 9 ++- - 6 files changed, 147 insertions(+), 11 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 124efe4fa97b..18f88aaef1a2 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -15,10 +15,14 @@ - #include "lima_vm.h" - - int lima_sched_timeout_ms; -+uint lima_heap_init_nr_pages = 8; - - MODULE_PARM_DESC(sched_timeout_ms, "task run timeout in ms"); - module_param_named(sched_timeout_ms, lima_sched_timeout_ms, int, 0444); - -+MODULE_PARM_DESC(heap_init_nr_pages, "heap buffer init number of pages"); -+module_param_named(heap_init_nr_pages, lima_heap_init_nr_pages, uint, 0444); -+ - static int lima_ioctl_get_param(struct drm_device *dev, void *data, struct drm_file *file) - { - struct drm_lima_get_param *args = data; -@@ -68,7 +72,7 @@ static int lima_ioctl_gem_create(struct drm_device *dev, void *data, struct drm_ - if (args->pad) - return -EINVAL; - -- if (args->flags) -+ if (args->flags & ~(LIMA_BO_FLAG_HEAP)) - return -EINVAL; - - if (args->size == 0) -diff --git a/drivers/gpu/drm/lima/lima_drv.h b/drivers/gpu/drm/lima/lima_drv.h -index 69c7344715c9..f492ecc6a5d9 100644 ---- a/drivers/gpu/drm/lima/lima_drv.h -+++ b/drivers/gpu/drm/lima/lima_drv.h -@@ -9,6 +9,7 @@ - #include "lima_ctx.h" - - extern int lima_sched_timeout_ms; -+extern uint lima_heap_init_nr_pages; - - struct lima_vm; - struct lima_bo; -diff --git a/drivers/gpu/drm/lima/lima_gem.c b/drivers/gpu/drm/lima/lima_gem.c -index d0059d8c97d8..5404e0d668db 100644 ---- a/drivers/gpu/drm/lima/lima_gem.c -+++ b/drivers/gpu/drm/lima/lima_gem.c -@@ -4,6 +4,8 @@ - #include - #include - #include -+#include -+#include - - #include - #include -@@ -15,6 +17,83 @@ - #include "lima_gem.h" - #include "lima_vm.h" - -+int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm) -+{ -+ struct page **pages; -+ struct address_space *mapping = bo->base.base.filp->f_mapping; -+ struct device *dev = bo->base.base.dev->dev; -+ size_t old_size = bo->heap_size; -+ size_t new_size = bo->heap_size ? bo->heap_size * 2 : -+ (lima_heap_init_nr_pages << PAGE_SHIFT); -+ struct sg_table sgt; -+ int i, ret; -+ -+ if (bo->heap_size >= bo->base.base.size) -+ return -ENOSPC; -+ -+ new_size = min(new_size, bo->base.base.size); -+ -+ mutex_lock(&bo->base.pages_lock); -+ -+ if (bo->base.pages) { -+ pages = bo->base.pages; -+ } else { -+ pages = kvmalloc_array(bo->base.base.size >> PAGE_SHIFT, -+ sizeof(*pages), GFP_KERNEL | __GFP_ZERO); -+ if (!pages) { -+ mutex_unlock(&bo->base.pages_lock); -+ return -ENOMEM; -+ } -+ -+ bo->base.pages = pages; -+ bo->base.pages_use_count = 1; -+ -+ mapping_set_unevictable(mapping); -+ } -+ -+ for (i = old_size >> PAGE_SHIFT; i < new_size >> PAGE_SHIFT; i++) { -+ struct page *page = shmem_read_mapping_page(mapping, i); -+ -+ if (IS_ERR(page)) { -+ mutex_unlock(&bo->base.pages_lock); -+ return PTR_ERR(page); -+ } -+ pages[i] = page; -+ } -+ -+ mutex_unlock(&bo->base.pages_lock); -+ -+ ret = sg_alloc_table_from_pages(&sgt, pages, i, 0, -+ new_size, GFP_KERNEL); -+ if (ret) -+ return ret; -+ -+ if (bo->base.sgt) { -+ dma_unmap_sg(dev, bo->base.sgt->sgl, -+ bo->base.sgt->nents, DMA_BIDIRECTIONAL); -+ sg_free_table(bo->base.sgt); -+ } else { -+ bo->base.sgt = kmalloc(sizeof(*bo->base.sgt), GFP_KERNEL); -+ if (!bo->base.sgt) { -+ sg_free_table(&sgt); -+ return -ENOMEM; -+ } -+ } -+ -+ dma_map_sg(dev, sgt.sgl, sgt.nents, DMA_BIDIRECTIONAL); -+ -+ *bo->base.sgt = sgt; -+ -+ if (vm) { -+ ret = lima_vm_map_bo(vm, bo, old_size >> PAGE_SHIFT); -+ if (ret) -+ return ret; -+ } -+ -+ bo->heap_size = new_size; -+ return 0; -+} -+ - int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, - u32 size, u32 flags, u32 *handle) - { -@@ -22,7 +101,8 @@ int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, - gfp_t mask; - struct drm_gem_shmem_object *shmem; - struct drm_gem_object *obj; -- struct sg_table *sgt; -+ struct lima_bo *bo; -+ bool is_heap = flags & LIMA_BO_FLAG_HEAP; - - shmem = drm_gem_shmem_create(dev, size); - if (IS_ERR(shmem)) -@@ -36,10 +116,18 @@ int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, - mask |= __GFP_DMA32; - mapping_set_gfp_mask(obj->filp->f_mapping, mask); - -- sgt = drm_gem_shmem_get_pages_sgt(obj); -- if (IS_ERR(sgt)) { -- err = PTR_ERR(sgt); -- goto out; -+ if (is_heap) { -+ bo = to_lima_bo(obj); -+ err = lima_heap_alloc(bo, NULL); -+ if (err) -+ goto out; -+ } else { -+ struct sg_table *sgt = drm_gem_shmem_get_pages_sgt(obj); -+ -+ if (IS_ERR(sgt)) { -+ err = PTR_ERR(sgt); -+ goto out; -+ } - } - - err = drm_gem_handle_create(file, obj, handle); -@@ -79,17 +167,47 @@ static void lima_gem_object_close(struct drm_gem_object *obj, struct drm_file *f - lima_vm_bo_del(vm, bo); - } - -+static int lima_gem_pin(struct drm_gem_object *obj) -+{ -+ struct lima_bo *bo = to_lima_bo(obj); -+ -+ if (bo->heap_size) -+ return -EINVAL; -+ -+ return drm_gem_shmem_pin(obj); -+} -+ -+static void *lima_gem_vmap(struct drm_gem_object *obj) -+{ -+ struct lima_bo *bo = to_lima_bo(obj); -+ -+ if (bo->heap_size) -+ return ERR_PTR(-EINVAL); -+ -+ return drm_gem_shmem_vmap(obj); -+} -+ -+static int lima_gem_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) -+{ -+ struct lima_bo *bo = to_lima_bo(obj); -+ -+ if (bo->heap_size) -+ return -EINVAL; -+ -+ return drm_gem_shmem_mmap(obj, vma); -+} -+ - static const struct drm_gem_object_funcs lima_gem_funcs = { - .free = lima_gem_free_object, - .open = lima_gem_object_open, - .close = lima_gem_object_close, - .print_info = drm_gem_shmem_print_info, -- .pin = drm_gem_shmem_pin, -+ .pin = lima_gem_pin, - .unpin = drm_gem_shmem_unpin, - .get_sg_table = drm_gem_shmem_get_sg_table, -- .vmap = drm_gem_shmem_vmap, -+ .vmap = lima_gem_vmap, - .vunmap = drm_gem_shmem_vunmap, -- .mmap = drm_gem_shmem_mmap, -+ .mmap = lima_gem_mmap, - }; - - struct drm_gem_object *lima_gem_create_object(struct drm_device *dev, size_t size) -diff --git a/drivers/gpu/drm/lima/lima_gem.h b/drivers/gpu/drm/lima/lima_gem.h -index 1800feb3e47f..ccea06142f4b 100644 ---- a/drivers/gpu/drm/lima/lima_gem.h -+++ b/drivers/gpu/drm/lima/lima_gem.h -@@ -7,12 +7,15 @@ - #include - - struct lima_submit; -+struct lima_vm; - - struct lima_bo { - struct drm_gem_shmem_object base; - - struct mutex lock; - struct list_head va; -+ -+ size_t heap_size; - }; - - static inline struct lima_bo * -@@ -31,6 +34,7 @@ static inline struct dma_resv *lima_bo_resv(struct lima_bo *bo) - return bo->base.base.resv; - } - -+int lima_heap_alloc(struct lima_bo *bo, struct lima_vm *vm); - struct drm_gem_object *lima_gem_create_object(struct drm_device *dev, size_t size); - int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, - u32 size, u32 flags, u32 *handle); -diff --git a/drivers/gpu/drm/lima/lima_vm.c b/drivers/gpu/drm/lima/lima_vm.c -index 2e513841de6c..5b92fb82674a 100644 ---- a/drivers/gpu/drm/lima/lima_vm.c -+++ b/drivers/gpu/drm/lima/lima_vm.c -@@ -155,6 +155,7 @@ int lima_vm_bo_add(struct lima_vm *vm, struct lima_bo *bo, bool create) - void lima_vm_bo_del(struct lima_vm *vm, struct lima_bo *bo) - { - struct lima_bo_va *bo_va; -+ u32 size; - - mutex_lock(&bo->lock); - -@@ -166,8 +167,9 @@ void lima_vm_bo_del(struct lima_vm *vm, struct lima_bo *bo) - - mutex_lock(&vm->lock); - -+ size = bo->heap_size ? bo->heap_size : bo_va->node.size; - lima_vm_unmap_range(vm, bo_va->node.start, -- bo_va->node.start + bo_va->node.size - 1); -+ bo_va->node.start + size - 1); - - drm_mm_remove_node(&bo_va->node); - -diff --git a/include/uapi/drm/lima_drm.h b/include/uapi/drm/lima_drm.h -index 95a00fb867e6..1ec58d652a5a 100644 ---- a/include/uapi/drm/lima_drm.h -+++ b/include/uapi/drm/lima_drm.h -@@ -32,12 +32,19 @@ struct drm_lima_get_param { - __u64 value; /* out, parameter value */ - }; - -+/* -+ * heap buffer dynamically increase backup memory size when GP task fail -+ * due to lack of heap memory. size field of heap buffer is an up bound of -+ * the backup memory which can be set to a fairly large value. -+ */ -+#define LIMA_BO_FLAG_HEAP (1 << 0) -+ - /** - * create a buffer for used by GPU - */ - struct drm_lima_gem_create { - __u32 size; /* in, buffer size */ -- __u32 flags; /* in, currently no flags, must be zero */ -+ __u32 flags; /* in, buffer flags */ - __u32 handle; /* out, GEM buffer handle */ - __u32 pad; /* pad, must be zero */ - }; - -From e7b678c673270bc8ebd85d93f034e5c4145bd106 Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Thu, 16 Jan 2020 21:11:56 +0800 -Subject: [PATCH] drm/lima: recover task by enlarging heap buffer - -Increase heap buffer backup memory when GP receive PLBU -out of memory interrupt, then resume the task. - -Reviewed-by: Vasily Khoruzhick -Tested-by: Andreas Baierl -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200116131157.13346-5-yuq825@gmail.com -(cherry picked from commit 2081e8dcf1ee7170c67c0891da5487ac7091d2df) ---- - drivers/gpu/drm/lima/lima_gp.c | 58 +++++++++++++++++++++++++++++++++++++-- - drivers/gpu/drm/lima/lima_mmu.c | 5 ++++ - drivers/gpu/drm/lima/lima_mmu.h | 1 + - drivers/gpu/drm/lima/lima_sched.c | 35 +++++++++++++++++++---- - drivers/gpu/drm/lima/lima_sched.h | 6 ++++ - 5 files changed, 98 insertions(+), 7 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_gp.c b/drivers/gpu/drm/lima/lima_gp.c -index ccf49faedebf..52b210f9a605 100644 ---- a/drivers/gpu/drm/lima/lima_gp.c -+++ b/drivers/gpu/drm/lima/lima_gp.c -@@ -11,6 +11,8 @@ - #include "lima_device.h" - #include "lima_gp.h" - #include "lima_regs.h" -+#include "lima_gem.h" -+#include "lima_vm.h" - - #define gp_write(reg, data) writel(data, ip->iomem + reg) - #define gp_read(reg) readl(ip->iomem + reg) -@@ -20,6 +22,7 @@ static irqreturn_t lima_gp_irq_handler(int irq, void *data) - struct lima_ip *ip = data; - struct lima_device *dev = ip->dev; - struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; -+ struct lima_sched_task *task = pipe->current_task; - u32 state = gp_read(LIMA_GP_INT_STAT); - u32 status = gp_read(LIMA_GP_STATUS); - bool done = false; -@@ -29,8 +32,16 @@ static irqreturn_t lima_gp_irq_handler(int irq, void *data) - return IRQ_NONE; - - if (state & LIMA_GP_IRQ_MASK_ERROR) { -- dev_err(dev->dev, "gp error irq state=%x status=%x\n", -- state, status); -+ if ((state & LIMA_GP_IRQ_MASK_ERROR) == -+ LIMA_GP_IRQ_PLBU_OUT_OF_MEM) { -+ dev_dbg(dev->dev, "gp out of heap irq status=%x\n", -+ status); -+ } else { -+ dev_err(dev->dev, "gp error irq state=%x status=%x\n", -+ state, status); -+ if (task) -+ task->recoverable = false; -+ } - - /* mask all interrupts before hard reset */ - gp_write(LIMA_GP_INT_MASK, 0); -@@ -43,6 +54,7 @@ static irqreturn_t lima_gp_irq_handler(int irq, void *data) - bool active = status & (LIMA_GP_STATUS_VS_ACTIVE | - LIMA_GP_STATUS_PLBU_ACTIVE); - done = valid && !active; -+ pipe->error = false; - } - - gp_write(LIMA_GP_INT_CLEAR, state); -@@ -121,6 +133,22 @@ static void lima_gp_task_run(struct lima_sched_pipe *pipe, - u32 cmd = 0; - int i; - -+ /* update real heap buffer size for GP */ -+ for (i = 0; i < task->num_bos; i++) { -+ struct lima_bo *bo = task->bos[i]; -+ -+ if (bo->heap_size && -+ lima_vm_get_va(task->vm, bo) == -+ f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2]) { -+ f[LIMA_GP_PLBU_ALLOC_END_ADDR >> 2] = -+ f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2] + -+ bo->heap_size; -+ task->recoverable = true; -+ task->heap = bo; -+ break; -+ } -+ } -+ - if (f[LIMA_GP_VSCL_START_ADDR >> 2] != - f[LIMA_GP_VSCL_END_ADDR >> 2]) - cmd |= LIMA_GP_CMD_START_VS; -@@ -184,6 +212,31 @@ static void lima_gp_task_mmu_error(struct lima_sched_pipe *pipe) - lima_sched_pipe_task_done(pipe); - } - -+static int lima_gp_task_recover(struct lima_sched_pipe *pipe) -+{ -+ struct lima_ip *ip = pipe->processor[0]; -+ struct lima_sched_task *task = pipe->current_task; -+ struct drm_lima_gp_frame *frame = task->frame; -+ u32 *f = frame->frame; -+ size_t fail_size = -+ f[LIMA_GP_PLBU_ALLOC_END_ADDR >> 2] - -+ f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2]; -+ -+ if (fail_size == task->heap->heap_size) { -+ int ret; -+ -+ ret = lima_heap_alloc(task->heap, task->vm); -+ if (ret < 0) -+ return ret; -+ } -+ -+ gp_write(LIMA_GP_INT_MASK, LIMA_GP_IRQ_MASK_USED); -+ gp_write(LIMA_GP_PLBU_ALLOC_END_ADDR, -+ f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2] + task->heap->heap_size); -+ gp_write(LIMA_GP_CMD, LIMA_GP_CMD_UPDATE_PLBU_ALLOC); -+ return 0; -+} -+ - static void lima_gp_print_version(struct lima_ip *ip) - { - u32 version, major, minor; -@@ -270,6 +323,7 @@ int lima_gp_pipe_init(struct lima_device *dev) - pipe->task_fini = lima_gp_task_fini; - pipe->task_error = lima_gp_task_error; - pipe->task_mmu_error = lima_gp_task_mmu_error; -+ pipe->task_recover = lima_gp_task_recover; - - return 0; - } -diff --git a/drivers/gpu/drm/lima/lima_mmu.c b/drivers/gpu/drm/lima/lima_mmu.c -index 97ec09dee572..f79d2af427e7 100644 ---- a/drivers/gpu/drm/lima/lima_mmu.c -+++ b/drivers/gpu/drm/lima/lima_mmu.c -@@ -99,6 +99,11 @@ void lima_mmu_fini(struct lima_ip *ip) - - } - -+void lima_mmu_flush_tlb(struct lima_ip *ip) -+{ -+ mmu_write(LIMA_MMU_COMMAND, LIMA_MMU_COMMAND_ZAP_CACHE); -+} -+ - void lima_mmu_switch_vm(struct lima_ip *ip, struct lima_vm *vm) - { - struct lima_device *dev = ip->dev; -diff --git a/drivers/gpu/drm/lima/lima_mmu.h b/drivers/gpu/drm/lima/lima_mmu.h -index 8c78319bcc8e..4f8ccbebcba1 100644 ---- a/drivers/gpu/drm/lima/lima_mmu.h -+++ b/drivers/gpu/drm/lima/lima_mmu.h -@@ -10,6 +10,7 @@ struct lima_vm; - int lima_mmu_init(struct lima_ip *ip); - void lima_mmu_fini(struct lima_ip *ip); - -+void lima_mmu_flush_tlb(struct lima_ip *ip); - void lima_mmu_switch_vm(struct lima_ip *ip, struct lima_vm *vm); - void lima_mmu_page_fault_resume(struct lima_ip *ip); - -diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c -index b561dd05bd62..3886999b4533 100644 ---- a/drivers/gpu/drm/lima/lima_sched.c -+++ b/drivers/gpu/drm/lima/lima_sched.c -@@ -313,6 +313,26 @@ static const struct drm_sched_backend_ops lima_sched_ops = { - .free_job = lima_sched_free_job, - }; - -+static void lima_sched_recover_work(struct work_struct *work) -+{ -+ struct lima_sched_pipe *pipe = -+ container_of(work, struct lima_sched_pipe, recover_work); -+ int i; -+ -+ for (i = 0; i < pipe->num_l2_cache; i++) -+ lima_l2_cache_flush(pipe->l2_cache[i]); -+ -+ if (pipe->bcast_mmu) { -+ lima_mmu_flush_tlb(pipe->bcast_mmu); -+ } else { -+ for (i = 0; i < pipe->num_mmu; i++) -+ lima_mmu_flush_tlb(pipe->mmu[i]); -+ } -+ -+ if (pipe->task_recover(pipe)) -+ drm_sched_fault(&pipe->base); -+} -+ - int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name) - { - unsigned int timeout = lima_sched_timeout_ms > 0 ? -@@ -321,6 +341,8 @@ int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name) - pipe->fence_context = dma_fence_context_alloc(1); - spin_lock_init(&pipe->fence_lock); - -+ INIT_WORK(&pipe->recover_work, lima_sched_recover_work); -+ - return drm_sched_init(&pipe->base, &lima_sched_ops, 1, 0, - msecs_to_jiffies(timeout), name); - } -@@ -332,11 +354,14 @@ void lima_sched_pipe_fini(struct lima_sched_pipe *pipe) - - void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe) - { -- if (pipe->error) -- drm_sched_fault(&pipe->base); -- else { -- struct lima_sched_task *task = pipe->current_task; -- -+ struct lima_sched_task *task = pipe->current_task; -+ -+ if (pipe->error) { -+ if (task && task->recoverable) -+ schedule_work(&pipe->recover_work); -+ else -+ drm_sched_fault(&pipe->base); -+ } else { - pipe->task_fini(pipe); - dma_fence_signal(task->fence); - } -diff --git a/drivers/gpu/drm/lima/lima_sched.h b/drivers/gpu/drm/lima/lima_sched.h -index 1d814fecbcc0..d64393fb50a9 100644 ---- a/drivers/gpu/drm/lima/lima_sched.h -+++ b/drivers/gpu/drm/lima/lima_sched.h -@@ -20,6 +20,9 @@ struct lima_sched_task { - struct lima_bo **bos; - int num_bos; - -+ bool recoverable; -+ struct lima_bo *heap; -+ - /* pipe fence */ - struct dma_fence *fence; - }; -@@ -68,6 +71,9 @@ struct lima_sched_pipe { - void (*task_fini)(struct lima_sched_pipe *pipe); - void (*task_error)(struct lima_sched_pipe *pipe); - void (*task_mmu_error)(struct lima_sched_pipe *pipe); -+ int (*task_recover)(struct lima_sched_pipe *pipe); -+ -+ struct work_struct recover_work; - }; - - int lima_sched_task_init(struct lima_sched_task *task, - -From dfba6f682725b1d75294c4f052d34b9f52184b0c Mon Sep 17 00:00:00 2001 -From: Qiang Yu -Date: Thu, 16 Jan 2020 21:11:57 +0800 -Subject: [PATCH] drm/lima: increase driver version to 1.1 - -Increase driver version for mesa driver to identify -the support of new heap buffer interface. - -Reviewed-by: Vasily Khoruzhick -Tested-by: Andreas Baierl -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200116131157.13346-6-yuq825@gmail.com -(cherry picked from commit d20615f8e2c6fe6fefe96bf2e6a81aec28aa15f0) ---- - drivers/gpu/drm/lima/lima_drv.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/lima/lima_drv.c b/drivers/gpu/drm/lima/lima_drv.c -index 18f88aaef1a2..2daac64d8955 100644 ---- a/drivers/gpu/drm/lima/lima_drv.c -+++ b/drivers/gpu/drm/lima/lima_drv.c -@@ -245,6 +245,12 @@ static const struct drm_ioctl_desc lima_drm_driver_ioctls[] = { - - DEFINE_DRM_GEM_FOPS(lima_drm_driver_fops); - -+/** -+ * Changelog: -+ * -+ * - 1.1.0 - add heap buffer support -+ */ -+ - static struct drm_driver lima_drm_driver = { - .driver_features = DRIVER_RENDER | DRIVER_GEM | DRIVER_SYNCOBJ, - .open = lima_drm_driver_open, -@@ -254,9 +260,9 @@ static struct drm_driver lima_drm_driver = { - .fops = &lima_drm_driver_fops, - .name = "lima", - .desc = "lima DRM", -- .date = "20190217", -+ .date = "20191231", - .major = 1, -- .minor = 0, -+ .minor = 1, - .patchlevel = 0, - - .gem_create_object = lima_gem_create_object, - -From d002f283a50bc163ff33549c1c28886a5250d3a7 Mon Sep 17 00:00:00 2001 -From: Vasily Khoruzhick -Date: Fri, 14 Feb 2020 19:50:26 -0800 -Subject: [PATCH] drm/lima: fix recovering from PLBU out of memory - -It looks like on PLBU_OUT_OF_MEM interrupt we need to resume from where we -stopped, i.e. new PLBU heap start is old end. Also update end address -in GP frame to grow heap on 2nd and subsequent out of memory interrupts. - -Fixes: 2081e8dcf1ee ("drm/lima: recover task by enlarging heap buffer") -Signed-off-by: Vasily Khoruzhick -Signed-off-by: Qiang Yu -Link: https://patchwork.freedesktop.org/patch/msgid/20200215035026.3180698-1-anarsoul@gmail.com -(cherry picked from commit 6707b755060563cb6b10d3c390fae10a600eb19d) ---- - drivers/gpu/drm/lima/lima_gp.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/lima/lima_gp.c b/drivers/gpu/drm/lima/lima_gp.c -index 52b210f9a605..d8841c870d90 100644 ---- a/drivers/gpu/drm/lima/lima_gp.c -+++ b/drivers/gpu/drm/lima/lima_gp.c -@@ -231,8 +231,13 @@ static int lima_gp_task_recover(struct lima_sched_pipe *pipe) - } - - gp_write(LIMA_GP_INT_MASK, LIMA_GP_IRQ_MASK_USED); -+ /* Resume from where we stopped, i.e. new start is old end */ -+ gp_write(LIMA_GP_PLBU_ALLOC_START_ADDR, -+ f[LIMA_GP_PLBU_ALLOC_END_ADDR >> 2]); -+ f[LIMA_GP_PLBU_ALLOC_END_ADDR >> 2] = -+ f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2] + task->heap->heap_size; - gp_write(LIMA_GP_PLBU_ALLOC_END_ADDR, -- f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2] + task->heap->heap_size); -+ f[LIMA_GP_PLBU_ALLOC_END_ADDR >> 2]); - gp_write(LIMA_GP_CMD, LIMA_GP_CMD_UPDATE_PLBU_ALLOC); - return 0; - } - -From a844e98c952ae2c65cf429f14a452893f83c82f6 Mon Sep 17 00:00:00 2001 -From: Nicolas Boichat -Date: Fri, 7 Feb 2020 13:26:23 +0800 -Subject: [PATCH] drm/panfrost: Improve error reporting in - panfrost_gpu_power_on - -It is useful to know which component cannot be powered on. - -Signed-off-by: Nicolas Boichat -Reviewed-by: Alyssa Rosenzweig -Reviewed-by: Steven Price -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20200207052627.130118-4-drinkcat@chromium.org -(cherry picked from commit a9d73b30bb46afb2da40257d680249dc029702d4) ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 11 +++++++---- - 1 file changed, 7 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index 1b9b79cd5804..f2c1ddc41a9b 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -308,17 +308,20 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev) - gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present); - ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO, - val, val == pfdev->features.l2_present, 100, 1000); -+ if (ret) -+ dev_err(pfdev->dev, "error powering up gpu L2"); - - gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present); -- ret |= readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO, -+ ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO, - val, val == pfdev->features.shader_present, 100, 1000); -+ if (ret) -+ dev_err(pfdev->dev, "error powering up gpu shader"); - - gpu_write(pfdev, TILER_PWRON_LO, pfdev->features.tiler_present); -- ret |= readl_relaxed_poll_timeout(pfdev->iomem + TILER_READY_LO, -+ ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_READY_LO, - val, val == pfdev->features.tiler_present, 100, 1000); -- - if (ret) -- dev_err(pfdev->dev, "error powering up gpu"); -+ dev_err(pfdev->dev, "error powering up gpu tiler"); - } - - void panfrost_gpu_power_off(struct panfrost_device *pfdev) - -From a01e1bf0733a1db7cb1298453af24c74b87adcad Mon Sep 17 00:00:00 2001 -From: Nicolas Boichat -Date: Fri, 7 Feb 2020 13:26:24 +0800 -Subject: [PATCH] drm/panfrost: Add support for multiple regulators - -Some GPUs, namely, the bifrost/g72 part on MT8183, have a second -regulator for their SRAM, let's add support for that. - -We extend the framework in a generic manner so that we could -support more than 2 regulators, if required. - -Signed-off-by: Nicolas Boichat -Reviewed-by: Steven Price -Reviwed-by: Mark Brown -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20200207052627.130118-5-drinkcat@chromium.org -(cherry picked from commit 3e1399bccf5163c59f41298b4faf768e199f4322) ---- - drivers/gpu/drm/panfrost/panfrost_device.c | 26 ++++++++++++++++++-------- - drivers/gpu/drm/panfrost/panfrost_device.h | 15 ++++++++++++++- - drivers/gpu/drm/panfrost/panfrost_drv.c | 28 +++++++++++++++++++--------- - 3 files changed, 51 insertions(+), 18 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c -index 238fb6d54df4..3720d50f6d9f 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.c -+++ b/drivers/gpu/drm/panfrost/panfrost_device.c -@@ -87,18 +87,27 @@ static void panfrost_clk_fini(struct panfrost_device *pfdev) - - static int panfrost_regulator_init(struct panfrost_device *pfdev) - { -- int ret; -+ int ret, i; - -- pfdev->regulator = devm_regulator_get(pfdev->dev, "mali"); -- if (IS_ERR(pfdev->regulator)) { -- ret = PTR_ERR(pfdev->regulator); -- dev_err(pfdev->dev, "failed to get regulator: %d\n", ret); -+ if (WARN(pfdev->comp->num_supplies > ARRAY_SIZE(pfdev->regulators), -+ "Too many supplies in compatible structure.\n")) -+ return -EINVAL; -+ -+ for (i = 0; i < pfdev->comp->num_supplies; i++) -+ pfdev->regulators[i].supply = pfdev->comp->supply_names[i]; -+ -+ ret = devm_regulator_bulk_get(pfdev->dev, -+ pfdev->comp->num_supplies, -+ pfdev->regulators); -+ if (ret < 0) { -+ dev_err(pfdev->dev, "failed to get regulators: %d\n", ret); - return ret; - } - -- ret = regulator_enable(pfdev->regulator); -+ ret = regulator_bulk_enable(pfdev->comp->num_supplies, -+ pfdev->regulators); - if (ret < 0) { -- dev_err(pfdev->dev, "failed to enable regulator: %d\n", ret); -+ dev_err(pfdev->dev, "failed to enable regulators: %d\n", ret); - return ret; - } - -@@ -107,7 +116,8 @@ static int panfrost_regulator_init(struct panfrost_device *pfdev) - - static void panfrost_regulator_fini(struct panfrost_device *pfdev) - { -- regulator_disable(pfdev->regulator); -+ regulator_bulk_disable(pfdev->comp->num_supplies, -+ pfdev->regulators); - } - - int panfrost_device_init(struct panfrost_device *pfdev) -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h -index 06713811b92c..c9468bc5573a 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.h -+++ b/drivers/gpu/drm/panfrost/panfrost_device.h -@@ -7,6 +7,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -19,6 +20,7 @@ struct panfrost_job; - struct panfrost_perfcnt; - - #define NUM_JOB_SLOTS 3 -+#define MAX_REGULATORS 2 - - struct panfrost_features { - u16 id; -@@ -51,6 +53,16 @@ struct panfrost_features { - unsigned long hw_issues[64 / BITS_PER_LONG]; - }; - -+/* -+ * Features that cannot be automatically detected and need matching using the -+ * compatible string, typically SoC-specific. -+ */ -+struct panfrost_compatible { -+ /* Supplies count and names. */ -+ int num_supplies; -+ const char * const *supply_names; -+}; -+ - struct panfrost_device { - struct device *dev; - struct drm_device *ddev; -@@ -59,10 +71,11 @@ struct panfrost_device { - void __iomem *iomem; - struct clk *clock; - struct clk *bus_clock; -- struct regulator *regulator; -+ struct regulator_bulk_data regulators[MAX_REGULATORS]; - struct reset_control *rstc; - - struct panfrost_features features; -+ const struct panfrost_compatible *comp; - - spinlock_t as_lock; - unsigned long as_in_use_mask; -diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c -index b7a618db3ee2..4d0850752623 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_drv.c -+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c -@@ -584,6 +584,10 @@ static int panfrost_probe(struct platform_device *pdev) - - platform_set_drvdata(pdev, pfdev); - -+ pfdev->comp = of_device_get_match_data(&pdev->dev); -+ if (!pfdev->comp) -+ return -ENODEV; -+ - /* Allocate and initialze the DRM device. */ - ddev = drm_dev_alloc(&panfrost_drm_driver, &pdev->dev); - if (IS_ERR(ddev)) -@@ -655,16 +659,22 @@ static int panfrost_remove(struct platform_device *pdev) - return 0; - } - -+const char * const default_supplies[] = { "mali" }; -+static const struct panfrost_compatible default_data = { -+ .num_supplies = ARRAY_SIZE(default_supplies), -+ .supply_names = default_supplies, -+}; -+ - static const struct of_device_id dt_match[] = { -- { .compatible = "arm,mali-t604" }, -- { .compatible = "arm,mali-t624" }, -- { .compatible = "arm,mali-t628" }, -- { .compatible = "arm,mali-t720" }, -- { .compatible = "arm,mali-t760" }, -- { .compatible = "arm,mali-t820" }, -- { .compatible = "arm,mali-t830" }, -- { .compatible = "arm,mali-t860" }, -- { .compatible = "arm,mali-t880" }, -+ { .compatible = "arm,mali-t604", .data = &default_data, }, -+ { .compatible = "arm,mali-t624", .data = &default_data, }, -+ { .compatible = "arm,mali-t628", .data = &default_data, }, -+ { .compatible = "arm,mali-t720", .data = &default_data, }, -+ { .compatible = "arm,mali-t760", .data = &default_data, }, -+ { .compatible = "arm,mali-t820", .data = &default_data, }, -+ { .compatible = "arm,mali-t830", .data = &default_data, }, -+ { .compatible = "arm,mali-t860", .data = &default_data, }, -+ { .compatible = "arm,mali-t880", .data = &default_data, }, - {} - }; - MODULE_DEVICE_TABLE(of, dt_match); - -From 9ea247ae4428e9435a1e9d85c82a94902a7908de Mon Sep 17 00:00:00 2001 -From: Nicolas Boichat -Date: Fri, 7 Feb 2020 13:26:25 +0800 -Subject: [PATCH] drm/panfrost: Add support for multiple power domains - -When there is a single power domain per device, the core will -ensure the power domain is switched on (so it is technically -equivalent to having not power domain specified at all). - -However, when there are multiple domains, as in MT8183 Bifrost -GPU, we need to handle them in driver code. - -Signed-off-by: Nicolas Boichat -Reviewed-by: Ulf Hansson -Reviewed-by: Steven Price -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20200207052627.130118-6-drinkcat@chromium.org -(cherry picked from commit 506629c868d0b1d641fc3afa491ddbd85fa1bdc3) ---- - drivers/gpu/drm/panfrost/panfrost_device.c | 97 +++++++++++++++++++++++++++--- - drivers/gpu/drm/panfrost/panfrost_device.h | 11 ++++ - drivers/gpu/drm/panfrost/panfrost_drv.c | 2 + - 3 files changed, 102 insertions(+), 8 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c -index 3720d50f6d9f..8136babd3ba9 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.c -+++ b/drivers/gpu/drm/panfrost/panfrost_device.c -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - #include - - #include "panfrost_device.h" -@@ -120,6 +121,79 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev) - pfdev->regulators); - } - -+static void panfrost_pm_domain_fini(struct panfrost_device *pfdev) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) { -+ if (!pfdev->pm_domain_devs[i]) -+ break; -+ -+ if (pfdev->pm_domain_links[i]) -+ device_link_del(pfdev->pm_domain_links[i]); -+ -+ dev_pm_domain_detach(pfdev->pm_domain_devs[i], true); -+ } -+} -+ -+static int panfrost_pm_domain_init(struct panfrost_device *pfdev) -+{ -+ int err; -+ int i, num_domains; -+ -+ num_domains = of_count_phandle_with_args(pfdev->dev->of_node, -+ "power-domains", -+ "#power-domain-cells"); -+ -+ /* -+ * Single domain is handled by the core, and, if only a single power -+ * the power domain is requested, the property is optional. -+ */ -+ if (num_domains < 2 && pfdev->comp->num_pm_domains < 2) -+ return 0; -+ -+ if (num_domains != pfdev->comp->num_pm_domains) { -+ dev_err(pfdev->dev, -+ "Incorrect number of power domains: %d provided, %d needed\n", -+ num_domains, pfdev->comp->num_pm_domains); -+ return -EINVAL; -+ } -+ -+ if (WARN(num_domains > ARRAY_SIZE(pfdev->pm_domain_devs), -+ "Too many supplies in compatible structure.\n")) -+ return -EINVAL; -+ -+ for (i = 0; i < num_domains; i++) { -+ pfdev->pm_domain_devs[i] = -+ dev_pm_domain_attach_by_name(pfdev->dev, -+ pfdev->comp->pm_domain_names[i]); -+ if (IS_ERR_OR_NULL(pfdev->pm_domain_devs[i])) { -+ err = PTR_ERR(pfdev->pm_domain_devs[i]) ? : -ENODATA; -+ pfdev->pm_domain_devs[i] = NULL; -+ dev_err(pfdev->dev, -+ "failed to get pm-domain %s(%d): %d\n", -+ pfdev->comp->pm_domain_names[i], i, err); -+ goto err; -+ } -+ -+ pfdev->pm_domain_links[i] = device_link_add(pfdev->dev, -+ pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME | -+ DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE); -+ if (!pfdev->pm_domain_links[i]) { -+ dev_err(pfdev->pm_domain_devs[i], -+ "adding device link failed!\n"); -+ err = -ENODEV; -+ goto err; -+ } -+ } -+ -+ return 0; -+ -+err: -+ panfrost_pm_domain_fini(pfdev); -+ return err; -+} -+ - int panfrost_device_init(struct panfrost_device *pfdev) - { - int err; -@@ -150,37 +224,43 @@ int panfrost_device_init(struct panfrost_device *pfdev) - goto err_out1; - } - -+ err = panfrost_pm_domain_init(pfdev); -+ if (err) -+ goto err_out2; -+ - res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0); - pfdev->iomem = devm_ioremap_resource(pfdev->dev, res); - if (IS_ERR(pfdev->iomem)) { - dev_err(pfdev->dev, "failed to ioremap iomem\n"); - err = PTR_ERR(pfdev->iomem); -- goto err_out2; -+ goto err_out3; - } - - err = panfrost_gpu_init(pfdev); - if (err) -- goto err_out2; -+ goto err_out3; - - err = panfrost_mmu_init(pfdev); - if (err) -- goto err_out3; -+ goto err_out4; - - err = panfrost_job_init(pfdev); - if (err) -- goto err_out4; -+ goto err_out5; - - err = panfrost_perfcnt_init(pfdev); - if (err) -- goto err_out5; -+ goto err_out6; - - return 0; --err_out5: -+err_out6: - panfrost_job_fini(pfdev); --err_out4: -+err_out5: - panfrost_mmu_fini(pfdev); --err_out3: -+err_out4: - panfrost_gpu_fini(pfdev); -+err_out3: -+ panfrost_pm_domain_fini(pfdev); - err_out2: - panfrost_reset_fini(pfdev); - err_out1: -@@ -196,6 +276,7 @@ void panfrost_device_fini(struct panfrost_device *pfdev) - panfrost_job_fini(pfdev); - panfrost_mmu_fini(pfdev); - panfrost_gpu_fini(pfdev); -+ panfrost_pm_domain_fini(pfdev); - panfrost_reset_fini(pfdev); - panfrost_regulator_fini(pfdev); - panfrost_clk_fini(pfdev); -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h -index c9468bc5573a..c30c719a8059 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.h -+++ b/drivers/gpu/drm/panfrost/panfrost_device.h -@@ -21,6 +21,7 @@ struct panfrost_perfcnt; - - #define NUM_JOB_SLOTS 3 - #define MAX_REGULATORS 2 -+#define MAX_PM_DOMAINS 3 - - struct panfrost_features { - u16 id; -@@ -61,6 +62,13 @@ struct panfrost_compatible { - /* Supplies count and names. */ - int num_supplies; - const char * const *supply_names; -+ /* -+ * Number of power domains required, note that values 0 and 1 are -+ * handled identically, as only values > 1 need special handling. -+ */ -+ int num_pm_domains; -+ /* Only required if num_pm_domains > 1. */ -+ const char * const *pm_domain_names; - }; - - struct panfrost_device { -@@ -73,6 +81,9 @@ struct panfrost_device { - struct clk *bus_clock; - struct regulator_bulk_data regulators[MAX_REGULATORS]; - struct reset_control *rstc; -+ /* pm_domains for devices with more than one. */ -+ struct device *pm_domain_devs[MAX_PM_DOMAINS]; -+ struct device_link *pm_domain_links[MAX_PM_DOMAINS]; - - struct panfrost_features features; - const struct panfrost_compatible *comp; -diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c -index 4d0850752623..a6e162236d67 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_drv.c -+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c -@@ -663,6 +663,8 @@ const char * const default_supplies[] = { "mali" }; - static const struct panfrost_compatible default_data = { - .num_supplies = ARRAY_SIZE(default_supplies), - .supply_names = default_supplies, -+ .num_pm_domains = 1, /* optional */ -+ .pm_domain_names = NULL, - }; - - static const struct of_device_id dt_match[] = { - -From d2763148e5519d782fb4c7e353ed2b9dcea5f209 Mon Sep 17 00:00:00 2001 -From: kbuild test robot -Date: Thu, 27 Feb 2020 09:41:46 +0800 -Subject: [PATCH] drm/panfrost: default_supplies[] can be static - -Fixes: 3e1399bccf51 ("drm/panfrost: Add support for multiple regulators") -Signed-off-by: kbuild test robot -Reviewed-by: Nicolas Boichat -Signed-off-by: Rob Herring -Link: https://patchwork.freedesktop.org/patch/msgid/20200227014100.GA61938@e50d7db646c3 -(cherry picked from commit 987b90d34f695117bf630560fd891cf0568d10c5) ---- - drivers/gpu/drm/panfrost/panfrost_drv.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c -index a6e162236d67..882fecc33fdb 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_drv.c -+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c -@@ -659,7 +659,7 @@ static int panfrost_remove(struct platform_device *pdev) - return 0; - } - --const char * const default_supplies[] = { "mali" }; -+static const char * const default_supplies[] = { "mali" }; - static const struct panfrost_compatible default_data = { - .num_supplies = ARRAY_SIZE(default_supplies), - .supply_names = default_supplies, diff --git a/projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch similarity index 87% rename from projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch rename to projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch index 26b1e4036d..595f60880b 100644 --- a/projects/Rockchip/patches/linux/default/linux-0022-drm-from-next.patch +++ b/projects/Rockchip/patches/linux/default/linux-0021-drm-from-5.8.patch @@ -1,4 +1,4 @@ -From 064ad063cb8d2542f32e2ecd1b3f5ec6924f2b0c Mon Sep 17 00:00:00 2001 +From abd39f808afe2c9a6174dc4b69d18972eb3a3ce1 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Sat, 22 Feb 2020 10:42:06 +0800 Subject: [PATCH] drm/lima: save process info for debug usage @@ -53,7 +53,7 @@ index 6154e5c9bfe4..74e2be09090f 100644 struct lima_ctx_mgr { -From 7c69866883cde01c17b0c29dae3d94fdc17b5bf9 Mon Sep 17 00:00:00 2001 +From 6bd6464811e273f2a7762e61d58de95dcb83150f Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Sat, 22 Feb 2020 10:42:07 +0800 Subject: [PATCH] drm/lima: add max_error_tasks module parameter @@ -105,7 +105,7 @@ index f492ecc6a5d9..fdbd4077c768 100644 struct lima_vm; struct lima_bo; -From 070b06f9488d12e2a5d4555476588980161c44c2 Mon Sep 17 00:00:00 2001 +From ebf8e20f3660b300f5fbd4b1731d61c2221234a6 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Sat, 7 Mar 2020 21:44:23 +0800 Subject: [PATCH] drm/lima: save task info dump when task fail @@ -449,7 +449,7 @@ index d64393fb50a9..a1496cb7bc41 100644 struct drm_sched_job base; -From 7471965e2ec9aff125024800138aea82e3861832 Mon Sep 17 00:00:00 2001 +From ac6495c5c05c06f4e84fe746ec11227b99f127ba Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Sat, 22 Feb 2020 10:42:09 +0800 Subject: [PATCH] drm/lima: add error sysfs to export error task dump @@ -586,7 +586,7 @@ index e235d4545b6c..97ed70c36340 100644 lima_device_fini(ldev); drm_dev_put(ddev); -From e90d2f007f7e6179ef8b9d15b6d9d6700329ad53 Mon Sep 17 00:00:00 2001 +From 1cccc638000e02f6dc64ad2707a9c2a2458cb283 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Sat, 7 Mar 2020 21:54:38 +0800 Subject: [PATCH] drm/lima: add trace point for tasks @@ -747,7 +747,265 @@ index 000000000000..3a430e93d384 +#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/lima +#include -From 2da1774e24feaa9de132e7e7c19d6984c893509c Mon Sep 17 00:00:00 2001 +From ab3fb4a5301fa97b5ccdb8c66906a3dd6d73488c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Thu, 5 Mar 2020 00:25:10 +0100 +Subject: [PATCH] drm/bridge: dw-hdmi: do not force "none" scan mode + +Setting scan mode to "none" confuses some TVs like LG B8, which randomly +change overscan percentage over time. Digital outputs like HDMI and DVI, +handled by this controller, don't really need overscan, so we can always +set scan mode to underscan. Actually, this is exactly what +drm_hdmi_avi_infoframe_from_display_mode() already does, so we can just +remove offending line. + +Reviewed-by: Neil Armstrong +Acked-by: Laurent Pinchart +Signed-off-by: Jonas Karlman +[updated commit message] +Signed-off-by: Jernej Skrabec +Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-3-jernej.skrabec@siol.net +(cherry picked from commit 6b633e3efbb45b574bdd803ebdddc8e010758a95) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 383b1073d7de..cb4d7bed2d9c 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1654,8 +1654,6 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; + } + +- frame.scan_mode = HDMI_SCAN_MODE_NONE; +- + /* + * The Designware IP uses a different byte format from standard + * AVI info frames, though generally the bits are in the correct + +From bf75586c3a0f9f2c4eb81150aba797a5ba4b94c8 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Thu, 5 Mar 2020 00:25:11 +0100 +Subject: [PATCH] drm/bridge: dw-hdmi: Add support for RGB limited range + +CEA 861 standard requestis that RGB quantization range is "limited" for +CEA modes. Support that by adding CSC matrix which downscales values. + +This allows proper color reproduction on TV and PC monitor at the same +time. In future, override property can be added, like "Broadcast RGB" +in i915 driver. + +Reviewed-by: Laurent Pinchart +Signed-off-by: Jernej Skrabec +Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-4-jernej.skrabec@siol.net +(cherry picked from commit 86af379ebca2ef0b01d998a49e531cd495dcf9a3) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 ++++++++++++++++++++++--------- + 1 file changed, 46 insertions(+), 17 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index cb4d7bed2d9c..164ee8c353ab 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -92,6 +92,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { + { 0x6756, 0x78ab, 0x2000, 0x0200 } + }; + ++static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { ++ { 0x1b7c, 0x0000, 0x0000, 0x0020 }, ++ { 0x0000, 0x1b7c, 0x0000, 0x0020 }, ++ { 0x0000, 0x0000, 0x1b7c, 0x0020 } ++}; ++ + struct hdmi_vmode { + bool mdataenablepolarity; + +@@ -109,6 +115,7 @@ struct hdmi_data_info { + unsigned int pix_repet_factor; + unsigned int hdcp_enable; + struct hdmi_vmode video_mode; ++ bool rgb_limited_range; + }; + + struct dw_hdmi_i2c { +@@ -956,7 +963,11 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) + + static int is_color_space_conversion(struct dw_hdmi *hdmi) + { +- return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format; ++ return (hdmi->hdmi_data.enc_in_bus_format != ++ hdmi->hdmi_data.enc_out_bus_format) || ++ (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && ++ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && ++ hdmi->hdmi_data.rgb_limited_range); + } + + static int is_color_space_decimation(struct dw_hdmi *hdmi) +@@ -986,25 +997,27 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) + static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) + { + const u16 (*csc_coeff)[3][4] = &csc_coeff_default; ++ bool is_input_rgb, is_output_rgb; + unsigned i; + u32 csc_scale = 1; + +- if (is_color_space_conversion(hdmi)) { +- if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { +- if (hdmi->hdmi_data.enc_out_encoding == +- V4L2_YCBCR_ENC_601) +- csc_coeff = &csc_coeff_rgb_out_eitu601; +- else +- csc_coeff = &csc_coeff_rgb_out_eitu709; +- } else if (hdmi_bus_fmt_is_rgb( +- hdmi->hdmi_data.enc_in_bus_format)) { +- if (hdmi->hdmi_data.enc_out_encoding == +- V4L2_YCBCR_ENC_601) +- csc_coeff = &csc_coeff_rgb_in_eitu601; +- else +- csc_coeff = &csc_coeff_rgb_in_eitu709; +- csc_scale = 0; +- } ++ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format); ++ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format); ++ ++ if (!is_input_rgb && is_output_rgb) { ++ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) ++ csc_coeff = &csc_coeff_rgb_out_eitu601; ++ else ++ csc_coeff = &csc_coeff_rgb_out_eitu709; ++ } else if (is_input_rgb && !is_output_rgb) { ++ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) ++ csc_coeff = &csc_coeff_rgb_in_eitu601; ++ else ++ csc_coeff = &csc_coeff_rgb_in_eitu709; ++ csc_scale = 0; ++ } else if (is_input_rgb && is_output_rgb && ++ hdmi->hdmi_data.rgb_limited_range) { ++ csc_coeff = &csc_coeff_rgb_full_to_rgb_limited; + } + + /* The CSC registers are sequential, alternating MSB then LSB */ +@@ -1614,6 +1627,18 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + drm_hdmi_avi_infoframe_from_display_mode(&frame, + &hdmi->connector, mode); + ++ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { ++ drm_hdmi_avi_infoframe_quant_range(&frame, &hdmi->connector, ++ mode, ++ hdmi->hdmi_data.rgb_limited_range ? ++ HDMI_QUANTIZATION_RANGE_LIMITED : ++ HDMI_QUANTIZATION_RANGE_FULL); ++ } else { ++ frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; ++ frame.ycc_quantization_range = ++ HDMI_YCC_QUANTIZATION_RANGE_LIMITED; ++ } ++ + if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) + frame.colorspace = HDMI_COLORSPACE_YUV444; + else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) +@@ -2117,6 +2142,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_FIXED) + hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; + ++ hdmi->hdmi_data.rgb_limited_range = hdmi->sink_is_hdmi && ++ drm_default_rgb_quant_range(mode) == ++ HDMI_QUANTIZATION_RANGE_LIMITED; ++ + hdmi->hdmi_data.pix_repet_factor = 0; + hdmi->hdmi_data.hdcp_enable = 0; + hdmi->hdmi_data.video_mode.mdataenablepolarity = true; + +From cc76b13e07c2e7900bf2963f23fb469517dfa1ec Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Thu, 5 Mar 2020 00:25:12 +0100 +Subject: [PATCH] drm/bridge: dw-hdmi: rework csc related functions + +is_color_space_conversion() is a misnomer. It checks not only if color +space conversion is needed, but also if format conversion is needed. +This is actually desired behaviour because result of this function +determines if CSC block should be enabled or not (CSC block can also do +format conversion). + +In order to clear misunderstandings, let's rework +is_color_space_conversion() to do exactly what is supposed to do and add +another function which will determine if CSC block must be enabled or +not. + +Reviewed-by: Laurent Pinchart +Signed-off-by: Jernej Skrabec +Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-5-jernej.skrabec@siol.net +(cherry picked from commit 0e8003076aca7b29c868e923e73f332cca12ed8b) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 31 +++++++++++++++++++++---------- + 1 file changed, 21 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 164ee8c353ab..30681398cfb0 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -963,11 +963,14 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) + + static int is_color_space_conversion(struct dw_hdmi *hdmi) + { +- return (hdmi->hdmi_data.enc_in_bus_format != +- hdmi->hdmi_data.enc_out_bus_format) || +- (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && +- hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && +- hdmi->hdmi_data.rgb_limited_range); ++ struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; ++ bool is_input_rgb, is_output_rgb; ++ ++ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_in_bus_format); ++ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_out_bus_format); ++ ++ return (is_input_rgb != is_output_rgb) || ++ (is_input_rgb && is_output_rgb && hdmi_data->rgb_limited_range); + } + + static int is_color_space_decimation(struct dw_hdmi *hdmi) +@@ -994,6 +997,13 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) + return 0; + } + ++static bool is_csc_needed(struct dw_hdmi *hdmi) ++{ ++ return is_color_space_conversion(hdmi) || ++ is_color_space_decimation(hdmi) || ++ is_color_space_interpolation(hdmi); ++} ++ + static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) + { + const u16 (*csc_coeff)[3][4] = &csc_coeff_default; +@@ -2033,18 +2043,19 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); + + /* Enable csc path */ +- if (is_color_space_conversion(hdmi)) { ++ if (is_csc_needed(hdmi)) { + hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; + hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); +- } + +- /* Enable color space conversion if needed */ +- if (is_color_space_conversion(hdmi)) + hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH, + HDMI_MC_FLOWCTRL); +- else ++ } else { ++ hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CSCCLK_DISABLE; ++ hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); ++ + hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, + HDMI_MC_FLOWCTRL); ++ } + } + + /* Workaround to clear the overflow condition */ + +From 42c7d0e07348361a6d5d12a5012c8f4845d7a740 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 19 Mar 2020 21:34:27 +0100 Subject: [PATCH] drm/lima: Add optional devfreq and cooling device support @@ -1252,7 +1510,7 @@ index 02dfa14d7083..90f03c48ef4a 100644 struct lima_vm *current_vm; -From 7821c61008707e65dd0ade8d814e315f57d103c7 Mon Sep 17 00:00:00 2001 +From a88d271097a216df71ea1e105229896993bb416d Mon Sep 17 00:00:00 2001 From: Robin Murphy Date: Tue, 21 Apr 2020 23:51:36 +0100 Subject: [PATCH] drm/lima: Clean up IRQ warnings @@ -1297,7 +1555,7 @@ index 247f51fd40a2..c334d297796a 100644 goto out; ip->irq = err; -From 0ce8a27f95b2fcf2b5c43237ba41dfa5b4511c10 Mon Sep 17 00:00:00 2001 +From 538de78c323ed1cff6e46e73756bd1fdd332a61e Mon Sep 17 00:00:00 2001 From: Robin Murphy Date: Tue, 21 Apr 2020 23:51:37 +0100 Subject: [PATCH] drm/lima: Clean up redundant pdev pointer @@ -1395,7 +1653,7 @@ index bbbdc8455e2f..4e5dd75822c0 100644 ldev->id = (enum lima_gpu_id)of_device_get_match_data(&pdev->dev); -From 530b7995611d206fb55cc53597b2f436ec504d36 Mon Sep 17 00:00:00 2001 +From 15209ebd3f2bce9a30a5261868d3400762c55693 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:42 +0800 Subject: [PATCH] drm/lima: use module_platform_driver helper @@ -1435,7 +1693,7 @@ index 4e5dd75822c0..3d63d496cfc2 100644 MODULE_AUTHOR("Lima Project Developers"); MODULE_DESCRIPTION("Lima DRM Driver"); -From cc4d56fedff585aff3d70d3a6fdbbd9311a4a25f Mon Sep 17 00:00:00 2001 +From 1a04f643449a17ec603c81f7c87587ec0dddc3d4 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:43 +0800 Subject: [PATCH] drm/lima: print process name and pid when task error @@ -1467,7 +1725,7 @@ index a2db1c937424..387f9439450a 100644 } -From 94aa1cc831365894527d060f429f988792e8a882 Mon Sep 17 00:00:00 2001 +From 2de1ecdd54cc918c60a790a42aa2ca313d388b93 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:44 +0800 Subject: [PATCH] drm/lima: check vm != NULL in lima_vm_put @@ -1524,7 +1782,7 @@ index 22aeec77d84d..3a7c74822d8b 100644 void lima_vm_print(struct lima_vm *vm); -From d0391f8e46ad6cb2f762560f7b7b27b4a7291cc8 Mon Sep 17 00:00:00 2001 +From 5ea849a4318381e84ffe009e0033259eafcd8708 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:45 +0800 Subject: [PATCH] drm/lima: always set page directory when switch vm @@ -1596,7 +1854,7 @@ index 3ac5797e31fc..eb46db0717cd 100644 pipe->error = false; -From fc8fec0f2fc8ea0b6ac307e6997218bbeb4f5835 Mon Sep 17 00:00:00 2001 +From 39ad4523b059035b59cd5082409dabbecafba62d Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:46 +0800 Subject: [PATCH] drm/lima: add lima_devfreq_resume/suspend @@ -1658,7 +1916,7 @@ index 8d71ba9fb22a..5eed2975a375 100644 + #endif -From ad078628978dec05a64d17dcd20855663a0e1f76 Mon Sep 17 00:00:00 2001 +From 588dcb54eb7b406b9cfe2aadaa813b28b46bc53c Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:47 +0800 Subject: [PATCH] drm/lima: power down ip blocks when pmu exit @@ -1769,7 +2027,7 @@ index 571f6d661581..d476569f2043 100644 + } } -From 7fede3db582de001517ab59d6782f2dc3581de1b Mon Sep 17 00:00:00 2001 +From 9bc4824a7756fcca51e1edb7324e0354889ad055 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:48 +0800 Subject: [PATCH] drm/lima: add resume/suspend callback for each ip @@ -2285,7 +2543,7 @@ index bf60c77b2633..16ec96de15a9 100644 void lima_pp_bcast_fini(struct lima_ip *ip); -From 967e2d3c43e4a5dbdf00c724a6d113483594af21 Mon Sep 17 00:00:00 2001 +From 9190b3bed7ccb96f6c8cfa25b3d058a2f9fe26d5 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:49 +0800 Subject: [PATCH] drm/lima: separate clk/regulator enable/disable function @@ -2452,7 +2710,7 @@ index a2d4ec75b3b3..1d9b7f415da1 100644 static int lima_init_ip(struct lima_device *dev, int index) -From 18ea54c4483f3b54aae9bf289c36065eef03fa8f Mon Sep 17 00:00:00 2001 +From e713efb3f1f71c0ed9feabcd70d81ef307edaf76 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:50 +0800 Subject: [PATCH] drm/lima: add pm resume/suspend ops @@ -2622,7 +2880,7 @@ index 3d63d496cfc2..f3fe0a2f764b 100644 }, }; -From 62a63e139bd7e97ae2cb1a57f5098a0add7526c0 Mon Sep 17 00:00:00 2001 +From c5775edca0fba03c638c6fb7c8aefca111b1294c Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Tue, 21 Apr 2020 21:35:51 +0800 Subject: [PATCH] drm/lima: enable runtime pm