diff --git a/config/arch.arm b/config/arch.arm index 0412da85aa..42d66b3832 100644 --- a/config/arch.arm +++ b/config/arch.arm @@ -31,7 +31,7 @@ TARGET_FPU_FLAGS="-mfloat-abi=$TARGET_FLOAT -mfpu=$TARGET_FPU" SIMD_SUPPORT="no" ;; - cortex-a7|cortex-a15|cortex-a15.cortex-a7|cortex-a17.cortex-a7) + cortex-a7|cortex-a15|cortex-a17|cortex-a15.cortex-a7|cortex-a17.cortex-a7) TARGET_SUBARCH=armv7ve TARGET_ABI=eabi TARGET_EXTRA_FLAGS="-mcpu=$TARGET_CPU" @@ -45,7 +45,7 @@ TARGET_FPU_FLAGS="-mfloat-abi=$TARGET_FLOAT -mfpu=$TARGET_FPU" SIMD_SUPPORT="yes" ;; - cortex-a53) + cortex-a53|cortex-a72.cortex-a53) TARGET_SUBARCH=armv8-a TARGET_ABI=eabi TARGET_EXTRA_FLAGS="-mcpu=${TARGET_CPU}" diff --git a/packages/graphics/mali-rockchip/package.mk b/packages/graphics/mali-rockchip/package.mk new file mode 100644 index 0000000000..67f3e3b11d --- /dev/null +++ b/packages/graphics/mali-rockchip/package.mk @@ -0,0 +1,111 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +PKG_NAME="mali-rockchip" +PKG_VERSION="12daf22" +PKG_SHA256="e6004e0f5a8a4aba098d301b3f964e2a9a961bb79f180d55ea6e9e73cd6eb874" +PKG_ARCH="arm aarch64" +PKG_LICENSE="nonfree" +PKG_SITE="https://github.com/rockchip-linux/libmali" +PKG_URL="https://github.com/rockchip-linux/libmali/archive/$PKG_VERSION.tar.gz" +PKG_SOURCE_DIR="libmali-$PKG_VERSION*" +PKG_SECTION="graphics" +PKG_SHORTDESC="mali-rockchip: OpenGL ES user-space binary for the ARM Mali GPU family" +PKG_LONGDESC="mali-rockchip: OpenGL ES user-space binary for the ARM Mali GPU family" +PKG_TOOLCHAIN="manual" + +if [ "$TARGET_ARCH" = "arm" ]; then + PKG_MALI_ARCH="arm-linux-gnueabihf" +elif [ "$TARGET_ARCH" = "aarch64" ]; then + PKG_MALI_ARCH="aarch64-linux-gnu" +fi + +if [ "$DISPLAYSERVER" = "x11" ]; then + PKG_MALI_SUFFIX="" +elif [ "$DISPLAYSERVER" = "weston" ]; then + PKG_MALI_SUFFIX="-wayland" +else + PKG_MALI_SUFFIX="-gbm" +fi + +if [ "$MALI_FAMILY" = "t760" -a "$MALI_REVISION" = "r1p0" ]; then + PKG_MALI_FILE="libmali-midgard-t76x-r14p0-r1p0$PKG_MALI_SUFFIX.so" +elif [ "$MALI_FAMILY" = "t760" ]; then + PKG_MALI_FILE="libmali-midgard-t76x-r14p0-r0p0$PKG_MALI_SUFFIX.so" +elif [ "$MALI_FAMILY" = "t860" ]; then + PKG_MALI_FILE="libmali-midgard-t86x-r14p0$PKG_MALI_SUFFIX.so" +elif [ "$MALI_FAMILY" = "450" ]; then + PKG_MALI_FILE="libmali-utgard-450-r7p0$PKG_MALI_SUFFIX.so" +elif [ "$MALI_FAMILY" = "400" ]; then + PKG_MALI_FILE="libmali-utgard-400-r7p0$PKG_MALI_SUFFIX.so" +else + echo "ERROR: Unknown MALI_FAMILY '$MALI_FAMILY', aborting." + exit 1 +fi + +configure_target() { + if [ ! -f "$PKG_BUILD/lib/$PKG_MALI_ARCH/$PKG_MALI_FILE" ]; then + echo "ERROR: $PKG_MALI_ARCH/$PKG_MALI_FILE does not exist, aborting." + exit 1 + fi +} + +makeinstall_target() { + cd $PKG_BUILD + + mkdir -p $SYSROOT_PREFIX/usr/include + cp -PRv include/EGL $SYSROOT_PREFIX/usr/include + cp -PRv include/GLES $SYSROOT_PREFIX/usr/include + cp -PRv include/GLES2 $SYSROOT_PREFIX/usr/include + if [ "$MALI_FAMILY" = "t760" -o "$MALI_FAMILY" = "t860" ]; then + cp -PRv include/GLES3 $SYSROOT_PREFIX/usr/include + fi + cp -PRv include/KHR $SYSROOT_PREFIX/usr/include + cp -PRv include/gbm.h $SYSROOT_PREFIX/usr/include + + mkdir -p $SYSROOT_PREFIX/usr/lib/pkgconfig + cp -PRv $PKG_DIR/pkgconfig/*.pc $SYSROOT_PREFIX/usr/lib/pkgconfig + if [ "$DISPLAYSERVER" != "weston" ]; then + rm -fv $SYSROOT_PREFIX/usr/lib/pkgconfig/wayland-egl.pc + fi + + mkdir -p $SYSROOT_PREFIX/usr/lib + cp -PRv lib/$PKG_MALI_ARCH/$PKG_MALI_FILE $SYSROOT_PREFIX/usr/lib + ln -sfv $PKG_MALI_FILE $SYSROOT_PREFIX/usr/lib/libmali.so + ln -sfv libmali.so $SYSROOT_PREFIX/usr/lib/libMali.so + ln -sfv libmali.so $SYSROOT_PREFIX/usr/lib/libEGL.so + ln -sfv libmali.so $SYSROOT_PREFIX/usr/lib/libGLESv2.so + ln -sfv libmali.so $SYSROOT_PREFIX/usr/lib/libgbm.so + + mkdir -p $INSTALL/usr/lib + cp -PRv lib/$PKG_MALI_ARCH/$PKG_MALI_FILE $INSTALL/usr/lib + ln -sfv $PKG_MALI_FILE $INSTALL/usr/lib/libmali.so + ln -sfv libmali.so $INSTALL/usr/lib/libMali.so + ln -sfv libmali.so $INSTALL/usr/lib/libEGL.so + ln -sfv libmali.so $INSTALL/usr/lib/libEGL.so.1 + ln -sfv libmali.so $INSTALL/usr/lib/libGLESv2.so + ln -sfv libmali.so $INSTALL/usr/lib/libGLESv2.so.2 + ln -sfv libmali.so $INSTALL/usr/lib/libgbm.so + + mkdir -p $INSTALL/usr/lib/modules-load.d + if [ "$MALI_FAMILY" = "t760" -o "$MALI_FAMILY" = "t860" ]; then + echo "midgard_kbase" > $INSTALL/usr/lib/modules-load.d/mali.conf + elif [ "$MALI_FAMILY" = "450" -o "$MALI_FAMILY" = "400" ]; then + echo "mali" > $INSTALL/usr/lib/modules-load.d/mali.conf + fi +} diff --git a/packages/graphics/mali-rockchip/pkgconfig/egl.pc b/packages/graphics/mali-rockchip/pkgconfig/egl.pc new file mode 100644 index 0000000000..14da6e3323 --- /dev/null +++ b/packages/graphics/mali-rockchip/pkgconfig/egl.pc @@ -0,0 +1,12 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${prefix}/lib +includedir=${prefix}/include + +Name: egl +Description: ARM Mali implementation of EGL +Version: 1.5 +Requires: +Libs: -L${libdir} -lEGL +Libs.private: -lm -lpthread +Cflags: -I${includedir} diff --git a/packages/graphics/mali-rockchip/pkgconfig/gbm.pc b/packages/graphics/mali-rockchip/pkgconfig/gbm.pc new file mode 100644 index 0000000000..7c99065229 --- /dev/null +++ b/packages/graphics/mali-rockchip/pkgconfig/gbm.pc @@ -0,0 +1,12 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${prefix}/lib +includedir=${prefix}/include + +Name: gbm +Description: Mali GBM library +Requires.private: +Version: 10.4.0 +Libs: -L${libdir} -lgbm +Libs.private: +Cflags: -I${includedir} diff --git a/packages/graphics/mali-rockchip/pkgconfig/glesv2.pc b/packages/graphics/mali-rockchip/pkgconfig/glesv2.pc new file mode 100644 index 0000000000..8bdbf61dc3 --- /dev/null +++ b/packages/graphics/mali-rockchip/pkgconfig/glesv2.pc @@ -0,0 +1,12 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${prefix}/lib +includedir=${prefix}/include + +Name: glesv2 +Description: ARM Mali implementation of OpenGL ESv2 +Version: 2.0 +Requires: +Libs: -L${libdir} -lGLESv2 +Libs.private: -lm -lpthread +Cflags: -I${includedir} diff --git a/packages/graphics/mali-rockchip/pkgconfig/wayland-egl.pc b/packages/graphics/mali-rockchip/pkgconfig/wayland-egl.pc new file mode 100644 index 0000000000..937fed1d09 --- /dev/null +++ b/packages/graphics/mali-rockchip/pkgconfig/wayland-egl.pc @@ -0,0 +1,12 @@ +prefix=/usr +exec_prefix=${prefix} +libdir=${prefix}/lib +includedir=${prefix}/include + +Name: wayland-egl +Description: Mali EGL library +Requires.private: +Version: 7.10 +Libs: -L${libdir} -lMali +Libs.private: -lm -lpthread +Cflags: -I${includedir} diff --git a/packages/linux-firmware/rockchip-firmware/modprobe.d/bcmdhd.conf b/packages/linux-firmware/rockchip-firmware/modprobe.d/bcmdhd.conf new file mode 100644 index 0000000000..724420a894 --- /dev/null +++ b/packages/linux-firmware/rockchip-firmware/modprobe.d/bcmdhd.conf @@ -0,0 +1 @@ +options bcmdhd firmware_path=/lib/firmware/brcm/ nvram_path=/lib/firmware/brcm/ diff --git a/packages/linux-firmware/rockchip-firmware/package.mk b/packages/linux-firmware/rockchip-firmware/package.mk new file mode 100644 index 0000000000..2eb42278a4 --- /dev/null +++ b/packages/linux-firmware/rockchip-firmware/package.mk @@ -0,0 +1,42 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +PKG_NAME="rockchip-firmware" +PKG_VERSION="firmware" +PKG_ARCH="arm aarch64" +PKG_LICENSE="nonfree" +PKG_SITE="https://github.com/rockchip-linux" +PKG_URL="" +PKG_DEPENDS_TARGET="rkbin rfkill" +PKG_SECTION="firmware" +PKG_SHORTDESC="rockchip firmware" +PKG_LONGDESC="rockchip firmware" +PKG_TOOLCHAIN="manual" + +makeinstall_target() { + mkdir -p $INSTALL/usr/bin + cp -v $(get_build_dir rkbin)/firmware/bin/rtk_hciattach $INSTALL/usr/bin + + mkdir -p $INSTALL/$(get_full_firmware_dir)/rtlbt + cp -v $(get_build_dir rkbin)/firmware/bluetooth/rtl8723b_* $INSTALL/$(get_full_firmware_dir)/rtlbt + + mkdir -p $INSTALL/$(get_full_firmware_dir)/brcm + cp -v $(get_build_dir rkbin)/firmware/bluetooth/BCM4354A2.hcd $INSTALL/$(get_full_firmware_dir)/brcm + cp -v $(get_build_dir rkbin)/firmware/wifi/fw_bcm4356a2_ag.bin $INSTALL/$(get_full_firmware_dir)/brcm + cp -v $(get_build_dir rkbin)/firmware/wifi/nvram_ap6356.txt $INSTALL/$(get_full_firmware_dir)/brcm +} diff --git a/packages/linux-firmware/rockchip-firmware/system.d/btattach@.service b/packages/linux-firmware/rockchip-firmware/system.d/btattach@.service new file mode 100644 index 0000000000..7bb104e983 --- /dev/null +++ b/packages/linux-firmware/rockchip-firmware/system.d/btattach@.service @@ -0,0 +1,11 @@ +[Unit] +Description=Attach /dev/ttyS0 to BlueZ stack using %I protocol +Wants=bluetooth.service +Before=bluetooth.service +After=dev-ttyS0.device + +[Service] +Type=simple +ExecStartPre=/usr/sbin/rfkill unblock bluetooth +ExecStart=/usr/bin/btattach -B /dev/ttyS0 -P %I +ExecStopPost=/usr/sbin/rfkill block bluetooth diff --git a/packages/linux-firmware/rockchip-firmware/system.d/hciattach-realtek.service b/packages/linux-firmware/rockchip-firmware/system.d/hciattach-realtek.service new file mode 100644 index 0000000000..9e1d88a24b --- /dev/null +++ b/packages/linux-firmware/rockchip-firmware/system.d/hciattach-realtek.service @@ -0,0 +1,11 @@ +[Unit] +Description=Attach /dev/ttyS0 to BlueZ stack +Wants=bluetooth.service +Before=bluetooth.service +After=dev-ttyS0.device + +[Service] +Type=simple +ExecStartPre=/usr/sbin/rfkill unblock bluetooth +ExecStart=/usr/bin/rtk_hciattach -n -s 115200 ttyS0 rtk_h5 +ExecStopPost=/usr/sbin/rfkill block bluetooth diff --git a/packages/linux-firmware/rockchip-firmware/system.d/hciattach@.service b/packages/linux-firmware/rockchip-firmware/system.d/hciattach@.service new file mode 100644 index 0000000000..ee8db515a3 --- /dev/null +++ b/packages/linux-firmware/rockchip-firmware/system.d/hciattach@.service @@ -0,0 +1,11 @@ +[Unit] +Description=Attach /dev/ttyS0 to BlueZ stack using %I type +Wants=bluetooth.service +Before=bluetooth.service +After=dev-ttyS0.device + +[Service] +Type=simple +ExecStartPre=/usr/sbin/rfkill unblock bluetooth +ExecStart=/usr/bin/hciattach -n -s 115200 ttyS0 %I +ExecStopPost=/usr/sbin/rfkill block bluetooth diff --git a/packages/linux-firmware/rockchip-firmware/udev.d/80-rockchip-firmware.rules b/packages/linux-firmware/rockchip-firmware/udev.d/80-rockchip-firmware.rules new file mode 100644 index 0000000000..29ad2a944b --- /dev/null +++ b/packages/linux-firmware/rockchip-firmware/udev.d/80-rockchip-firmware.rules @@ -0,0 +1,12 @@ +################################################################################ +# udev rules file for loading rockchip-firmware +################################################################################ + +ACTION!="add", GOTO="end" +SUBSYSTEMS=="sdio", ATTRS{vendor}=="0x024c", ATTRS{device}=="0xb723", \ + TAG+="systemd", ENV{SYSTEMD_WANTS}+="hciattach-realtek.service" +SUBSYSTEMS=="sdio", ATTRS{vendor}=="0x024c", ATTRS{device}=="0x0626", \ + TAG+="systemd", ENV{SYSTEMD_WANTS}+="hciattach-realtek.service" +SUBSYSTEMS=="sdio", ATTRS{vendor}=="0x02d0", ATTRS{device}=="0x4356", \ + TAG+="systemd", ENV{SYSTEMD_WANTS}+="hciattach@bcm43xx.service" +LABEL="end" diff --git a/packages/linux/package.mk b/packages/linux/package.mk index ab0d4cc422..bb31df9053 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -46,6 +46,13 @@ case "$LINUX" in PKG_PATCH_DIRS="amlogic-3.14" PKG_DEPENDS_TARGET="$PKG_DEPENDS_TARGET aml-dtbtools:host" ;; + rockchip-4.4) + PKG_VERSION="eae92ae2" + PKG_SHA256="da453ca6ecefc3719a1165bc7b08fe00fc2b50ab64f6289ef6f3670a9fc1ceca" + PKG_URL="https://github.com/rockchip-linux/kernel/archive/$PKG_VERSION.tar.gz" + PKG_SOURCE_DIR="kernel-$PKG_VERSION*" + PKG_PATCH_DIRS="rockchip-4.4" + ;; *) PKG_VERSION="4.14.20" PKG_SHA256="4ab7f42aa6af9c1e3b00cba6b1fa305a87407666aaa2fae555f7fbdaafb6d292" diff --git a/packages/mediacenter/kodi/package.mk b/packages/mediacenter/kodi/package.mk index 591c7914fc..b786710852 100644 --- a/packages/mediacenter/kodi/package.mk +++ b/packages/mediacenter/kodi/package.mk @@ -189,7 +189,7 @@ if [ ! "$KODIPLAYER_DRIVER" = default ]; then PKG_DEPENDS_TARGET="$PKG_DEPENDS_TARGET $KODIPLAYER_DRIVER" if [ "$KODIPLAYER_DRIVER" = bcm2835-driver ]; then KODI_PLAYER="-DCORE_PLATFORM_NAME=rbpi" - elif [ "$KODIPLAYER_DRIVER" = mesa ]; then + elif [ "$KODIPLAYER_DRIVER" = mesa -o "$KODIPLAYER_DRIVER" = rkmpp ]; then KODI_PLAYER="-DCORE_PLATFORM_NAME=gbm" CFLAGS="$CFLAGS -DMESA_EGL_NO_X11_HEADERS" CXXFLAGS="$CXXFLAGS -DMESA_EGL_NO_X11_HEADERS" diff --git a/packages/multimedia/ffmpeg/package.mk b/packages/multimedia/ffmpeg/package.mk index 5377b0e95d..cd762dd991 100644 --- a/packages/multimedia/ffmpeg/package.mk +++ b/packages/multimedia/ffmpeg/package.mk @@ -47,6 +47,13 @@ else FFMPEG_VDPAU="--disable-vdpau" fi +if [ "$PROJECT" = "Rockchip" ]; then + PKG_DEPENDS_TARGET="$PKG_DEPENDS_TARGET rkmpp" + FFMPEG_RKMPP="--enable-rkmpp --enable-libdrm --enable-version3" +else + FFMPEG_RKMPP="--disable-rkmpp" +fi + if build_with_debug; then FFMPEG_DEBUG="--enable-debug --disable-stripping" else @@ -149,6 +156,7 @@ configure_target() { $FFMPEG_VAAPI \ $FFMPEG_VDPAU \ $FFMPEG_RPI \ + $FFMPEG_RKMPP \ --disable-dxva2 \ --enable-runtime-cpudetect \ $FFMPEG_TABLES \ diff --git a/packages/multimedia/ffmpeg/patches/ffmpeg-99.0001-backport-rkmppdec-fixes.patch b/packages/multimedia/ffmpeg/patches/ffmpeg-99.0001-backport-rkmppdec-fixes.patch new file mode 100644 index 0000000000..b4359c08e5 --- /dev/null +++ b/packages/multimedia/ffmpeg/patches/ffmpeg-99.0001-backport-rkmppdec-fixes.patch @@ -0,0 +1,168 @@ +From ed4a91d4f4bd7ab99f2be901285b20a0cde52902 Mon Sep 17 00:00:00 2001 +From: LongChair +Date: Sat, 6 Jan 2018 09:36:58 +0100 +Subject: [PATCH] avcodec/rkmpp : Fix broken build due to missing control + operation + +This patch is taking care of https://trac.ffmpeg.org/ticket/6834. +It seems that one of the control operations that was available to get +the free decoders input slots was removed. + +There is another control operation to retrieve the used slots. Given +that the input slot count is hardcoded to 4 in mpp at this point, +replacing the old control operation by the other one. + +This was tested on Rockchip ROCK64. + +Signed-off-by: wm4 +(cherry picked from commit c6f84106366c6f243a8b07dbffcc7880009aa904) +--- + configure | 6 ++---- + libavcodec/rkmppdec.c | 10 ++++++---- + 2 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/configure b/configure +index 1797c5dd4f..4db1c9b73f 100755 +--- a/configure ++++ b/configure +@@ -6077,10 +6077,8 @@ enabled openssl && { use_pkg_config openssl openssl openssl/ssl.h OPEN + check_lib openssl openssl/ssl.h SSL_library_init -lssl32 -leay32 || + check_lib openssl openssl/ssl.h SSL_library_init -lssl -lcrypto -lws2_32 -lgdi32 || + die "ERROR: openssl not found"; } +-enabled rkmpp && { { require_pkg_config rockchip_mpp rockchip_mpp rockchip/rk_mpi.h mpp_create || +- die "ERROR : Rockchip MPP was not found."; } && +- { check_func_headers rockchip/rk_mpi_cmd.h "MPP_DEC_GET_FREE_PACKET_SLOT_COUNT" || +- die "ERROR: Rockchip MPP is outdated, please get a more recent one."; } && ++enabled rkmpp && { require_pkg_config rkmpp rockchip_mpp rockchip/rk_mpi.h mpp_create && ++ require_pkg_config rockchip_mpp "rockchip_mpp >= 1.3.7" rockchip/rk_mpi.h mpp_create && + { enabled libdrm || + die "ERROR: rkmpp requires --enable-libdrm"; } + } +diff --git a/libavcodec/rkmppdec.c b/libavcodec/rkmppdec.c +index bdf4dc4208..ebc021e3d8 100644 +--- a/libavcodec/rkmppdec.c ++++ b/libavcodec/rkmppdec.c +@@ -39,6 +39,7 @@ + + #define RECEIVE_FRAME_TIMEOUT 100 + #define FRAMEGROUP_MAX_FRAMES 16 ++#define INPUT_MAX_PACKETS 4 + + typedef struct { + MppCtx ctx; +@@ -514,16 +515,17 @@ static int rkmpp_receive_frame(AVCodecContext *avctx, AVFrame *frame) + RKMPPDecoder *decoder = (RKMPPDecoder *)rk_context->decoder_ref->data; + int ret = MPP_NOK; + AVPacket pkt = {0}; +- RK_S32 freeslots; ++ RK_S32 usedslots, freeslots; + + if (!decoder->eos_reached) { + // we get the available slots in decoder +- ret = decoder->mpi->control(decoder->ctx, MPP_DEC_GET_FREE_PACKET_SLOT_COUNT, &freeslots); ++ ret = decoder->mpi->control(decoder->ctx, MPP_DEC_GET_STREAM_COUNT, &usedslots); + if (ret != MPP_OK) { +- av_log(avctx, AV_LOG_ERROR, "Failed to get decoder free slots (code = %d).\n", ret); ++ av_log(avctx, AV_LOG_ERROR, "Failed to get decoder used slots (code = %d).\n", ret); + return ret; + } + ++ freeslots = INPUT_MAX_PACKETS - usedslots; + if (freeslots > 0) { + ret = ff_decode_get_packet(avctx, &pkt); + if (ret < 0 && ret != AVERROR_EOF) { +@@ -540,7 +542,7 @@ static int rkmpp_receive_frame(AVCodecContext *avctx, AVFrame *frame) + } + + // make sure we keep decoder full +- if (freeslots > 1 && decoder->first_frame) ++ if (freeslots > 1) + return AVERROR(EAGAIN); + } + + +From 617c895d27198bb9391a001932e288d1dfe4f728 Mon Sep 17 00:00:00 2001 +From: LongChair +Date: Tue, 2 Jan 2018 12:38:01 +0100 +Subject: [PATCH] avcodec/rkmpp : remove stream start retries before first + frame. + +those were needed because of some odd mpp behavior that seems to have +been fixed. + +Makes the code cleaner. + +Signed-off-by: wm4 +(cherry picked from commit 2ca65fc7b74444edd51d5803a2c1e05a801a6023) +--- + libavcodec/rkmppdec.c | 24 +++--------------------- + 1 file changed, 3 insertions(+), 21 deletions(-) + +diff --git a/libavcodec/rkmppdec.c b/libavcodec/rkmppdec.c +index ebc021e3d8..9dfeb742ab 100644 +--- a/libavcodec/rkmppdec.c ++++ b/libavcodec/rkmppdec.c +@@ -46,7 +46,6 @@ typedef struct { + MppApi *mpi; + MppBufferGroup frame_group; + +- char first_frame; + char first_packet; + char eos_reached; + +@@ -328,28 +327,14 @@ static int rkmpp_retrieve_frame(AVCodecContext *avctx, AVFrame *frame) + MppBuffer buffer = NULL; + AVDRMFrameDescriptor *desc = NULL; + AVDRMLayerDescriptor *layer = NULL; +- int retrycount = 0; + int mode; + MppFrameFormat mppformat; + uint32_t drmformat; + +- // on start of decoding, MPP can return -1, which is supposed to be expected +- // this is due to some internal MPP init which is not completed, that will +- // only happen in the first few frames queries, but should not be interpreted +- // as an error, Therefore we need to retry a couple times when we get -1 +- // in order to let it time to complete it's init, then we sleep a bit between retries. +-retry_get_frame: + ret = decoder->mpi->decode_get_frame(decoder->ctx, &mppframe); +- if (ret != MPP_OK && ret != MPP_ERR_TIMEOUT && !decoder->first_frame) { +- if (retrycount < 5) { +- av_log(avctx, AV_LOG_DEBUG, "Failed to get a frame, retrying (code = %d, retrycount = %d)\n", ret, retrycount); +- usleep(10000); +- retrycount++; +- goto retry_get_frame; +- } else { +- av_log(avctx, AV_LOG_ERROR, "Failed to get a frame from MPP (code = %d)\n", ret); +- goto fail; +- } ++ if (ret != MPP_OK && ret != MPP_ERR_TIMEOUT) { ++ av_log(avctx, AV_LOG_ERROR, "Failed to get a frame from MPP (code = %d)\n", ret); ++ goto fail; + } + + if (mppframe) { +@@ -365,7 +350,6 @@ retry_get_frame: + avctx->height = mpp_frame_get_height(mppframe); + + decoder->mpi->control(decoder->ctx, MPP_DEC_SET_INFO_CHANGE_READY, NULL); +- decoder->first_frame = 1; + + av_buffer_unref(&decoder->frames_ref); + +@@ -479,7 +463,6 @@ retry_get_frame: + goto fail; + } + +- decoder->first_frame = 0; + return 0; + } else { + av_log(avctx, AV_LOG_ERROR, "Failed to retrieve the frame buffer, frame is dropped (code = %d)\n", ret); +@@ -559,7 +542,6 @@ static void rkmpp_flush(AVCodecContext *avctx) + + ret = decoder->mpi->reset(decoder->ctx); + if (ret == MPP_OK) { +- decoder->first_frame = 1; + decoder->first_packet = 1; + } else + av_log(avctx, AV_LOG_ERROR, "Failed to reset MPI (code = %d)\n", ret); diff --git a/packages/multimedia/rkmpp/package.mk b/packages/multimedia/rkmpp/package.mk new file mode 100644 index 0000000000..0699242741 --- /dev/null +++ b/packages/multimedia/rkmpp/package.mk @@ -0,0 +1,48 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +PKG_NAME="rkmpp" +PKG_VERSION="c8a41a6" +PKG_SHA256="01b84eecde7cae98035ecce866b48f903f9deaa7e19b048ff9cb87edf6446659" +PKG_ARCH="arm aarch64" +PKG_LICENSE="APL" +PKG_SITE="https://github.com/rockchip-linux/mpp" +PKG_URL="https://github.com/rockchip-linux/mpp/archive/$PKG_VERSION.tar.gz" +PKG_SOURCE_DIR="mpp-$PKG_VERSION*" +PKG_DEPENDS_TARGET="toolchain libdrm" +PKG_SECTION="multimedia" +PKG_SHORTDESC="rkmpp: Rockchip Media Process Platform (MPP) module" +PKG_LONGDESC="rkmpp: Rockchip Media Process Platform (MPP) module" + +if [ "$DEVICE" = "RK3328" -o "$DEVICE" = "RK3399" ]; then + PKG_ENABLE_VP9D="ON" +else + PKG_ENABLE_VP9D="OFF" +fi + +PKG_CMAKE_OPTS_TARGET="-DRKPLATFORM=ON \ + -DENABLE_AVSD=OFF \ + -DENABLE_H263D=OFF \ + -DENABLE_H264D=ON \ + -DENABLE_H265D=ON \ + -DENABLE_MPEG2D=ON \ + -DENABLE_MPEG4D=ON \ + -DENABLE_VP8D=ON \ + -DENABLE_VP9D=$PKG_ENABLE_VP9D \ + -DENABLE_JPEGD=OFF \ + -DHAVE_DRM=ON" diff --git a/packages/multimedia/rkmpp/patches/rkmpp-0001-fix-32-bit-mmap-issue-on-64-bit-kernels.patch b/packages/multimedia/rkmpp/patches/rkmpp-0001-fix-32-bit-mmap-issue-on-64-bit-kernels.patch new file mode 100644 index 0000000000..5851923135 --- /dev/null +++ b/packages/multimedia/rkmpp/patches/rkmpp-0001-fix-32-bit-mmap-issue-on-64-bit-kernels.patch @@ -0,0 +1,30 @@ +From e9c9f2619bb2344f9947ccbbdcf15be9d0f55b1f Mon Sep 17 00:00:00 2001 +From: Jakob Unterwurzacher +Date: Mon, 29 May 2017 14:08:43 +0200 +Subject: [PATCH] fix 32-bit mmap issue on 64-bit kernels + +Running 32-bit userland on a 64-bit kernel resulted in the error: + + mpp_drm: mmap failed: Invalid argument + +Both the pagesize_mask and the mmap call truncated the offset +value to 32 bit. This patch fixes both issues. + +For details see https://github.com/rockchip-linux/kernel/issues/17 +--- + osal/allocator/allocator_drm.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/osal/allocator/allocator_drm.c b/osal/allocator/allocator_drm.c +index 48735c90..a3a16a55 100644 +--- a/osal/allocator/allocator_drm.c ++++ b/osal/allocator/allocator_drm.c +@@ -15,6 +15,8 @@ + */ + + #define MODULE_TAG "mpp_drm" ++/* Enable 64-bit mmap also when compiling for 32 bit */ ++#define _FILE_OFFSET_BITS 64 + + #include + #include diff --git a/packages/multimedia/rkmpp/patches/rkmpp-0002-mpp_dec-sleep-when-there-is-nothing-to-parse.patch b/packages/multimedia/rkmpp/patches/rkmpp-0002-mpp_dec-sleep-when-there-is-nothing-to-parse.patch new file mode 100644 index 0000000000..10ee3bae40 --- /dev/null +++ b/packages/multimedia/rkmpp/patches/rkmpp-0002-mpp_dec-sleep-when-there-is-nothing-to-parse.patch @@ -0,0 +1,25 @@ +From 322efafd1f760c73accda1a7025b007f211916f7 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 3 Mar 2018 10:10:01 +0100 +Subject: [PATCH] [mpp_dec]: sleep when there is nothing to parse + +--- + mpp/codec/mpp_dec.cpp | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/mpp/codec/mpp_dec.cpp b/mpp/codec/mpp_dec.cpp +index 424604e1..dded58c6 100644 +--- a/mpp/codec/mpp_dec.cpp ++++ b/mpp/codec/mpp_dec.cpp +@@ -600,8 +600,10 @@ void *mpp_dec_parser_thread(void *data) + } + parser->unlock(); + +- if (try_proc_dec_task(mpp, &task)) ++ if (try_proc_dec_task(mpp, &task)) { ++ msleep(1); + continue; ++ } + + } + diff --git a/packages/multimedia/rkmpp/patches/rkmpp-1000-hevc.patch b/packages/multimedia/rkmpp/patches/rkmpp-1000-hevc.patch new file mode 100644 index 0000000000..ff6a60d363 --- /dev/null +++ b/packages/multimedia/rkmpp/patches/rkmpp-1000-hevc.patch @@ -0,0 +1,25 @@ +diff --git a/mpp/hal/rkdec/h265d/hal_h265d_reg.h b/mpp/hal/rkdec/h265d/hal_h265d_reg.h +index 1bccb02..432b8db 100644 +--- a/mpp/hal/rkdec/h265d/hal_h265d_reg.h ++++ b/mpp/hal/rkdec/h265d/hal_h265d_reg.h +@@ -50,7 +50,8 @@ typedef struct { + struct swreg_int { + RK_U32 sw_dec_e : 1 ; + RK_U32 sw_dec_clkgate_e : 1 ; +- RK_U32 reserve0 : 2 ; ++ RK_U32 reserve0 : 1 ; ++ RK_U32 sw_timeout_mode : 1 ; + RK_U32 sw_dec_irq_dis : 1 ; + RK_U32 sw_dec_timeout_e : 1 ; + RK_U32 sw_buf_empty_en : 1 ; +@@ -61,8 +62,9 @@ typedef struct { + RK_U32 sw_dec_rdy_sta : 1 ; + RK_U32 sw_dec_bus_sta : 1 ; + RK_U32 sw_dec_error_sta : 1 ; ++ RK_U32 sw_dec_timeout_sta : 1 ; + RK_U32 sw_dec_empty_sta : 1 ; +- RK_U32 reserve4 : 4 ; ++ RK_U32 reserve3 : 3 ; + RK_U32 sw_softrst_en_p : 1 ; + RK_U32 sw_force_softreset_valid: 1 ; + RK_U32 sw_softreset_rdy : 1 ; diff --git a/packages/network/rfkill/package.mk b/packages/network/rfkill/package.mk new file mode 100644 index 0000000000..2f4f20661c --- /dev/null +++ b/packages/network/rfkill/package.mk @@ -0,0 +1,29 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +PKG_NAME="rfkill" +PKG_VERSION="0.5" +PKG_SHA256="e0ae3004215e39a6c5c36e0726558740728d16f67ebdb8bea621250f6091d86a" +PKG_ARCH="any" +PKG_LICENSE="GPL" +PKG_SITE="https://wireless.wiki.kernel.org/en/users/documentation/rfkill" +PKG_URL="https://www.kernel.org/pub/software/network/rfkill/$PKG_NAME-$PKG_VERSION.tar.xz" +PKG_DEPENDS_TARGET="toolchain" +PKG_SECTION="network" +PKG_SHORTDESC="rfkill: userspace tool to query the state of the rfkill switches, buttons and subsystem interfaces" +PKG_LONGDESC="rfkill is a small userspace tool to query the state of the rfkill switches, buttons and subsystem interfaces." diff --git a/packages/network/rfkill/patches/rfkill-0001-fix-version-sh.patch b/packages/network/rfkill/patches/rfkill-0001-fix-version-sh.patch new file mode 100644 index 0000000000..8d51903639 --- /dev/null +++ b/packages/network/rfkill/patches/rfkill-0001-fix-version-sh.patch @@ -0,0 +1,23 @@ +diff -Naur a/version.sh b/version.sh +--- a/version.sh ++++ b/version.sh +@@ -12,19 +12,6 @@ + + if test "x$SUFFIX" != 'x'; then + v="$VERSION$SUFFIX" +-elif head=`git rev-parse --verify HEAD 2>/dev/null`; then +- git update-index --refresh --unmerged > /dev/null +- descr=$(git describe 2>/dev/null || echo "v$VERSION") +- +- # on git builds check that the version number above +- # is correct... +- [ "${descr%%-*}" = "v$VERSION" ] || exit 2 +- +- echo -n 'const char rfkill_version[] = "' > "$OUT" +- v="${descr#v}" +- if git diff-index --name-only HEAD | read dummy ; then +- v="$v"-dirty +- fi + else + v="$VERSION" + fi diff --git a/packages/tools/rkbin/package.mk b/packages/tools/rkbin/package.mk new file mode 100644 index 0000000000..fd9ed44ab1 --- /dev/null +++ b/packages/tools/rkbin/package.mk @@ -0,0 +1,30 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +PKG_NAME="rkbin" +PKG_VERSION="f64ded6" +PKG_SHA256="7b858ac964058da83cd96314184d2c5f834a9b2cc6b805be424a661fd9836b54" +PKG_ARCH="arm aarch64" +PKG_LICENSE="nonfree" +PKG_SITE="https://github.com/rockchip-linux/rkbin" +PKG_URL="https://github.com/rockchip-linux/rkbin/archive/$PKG_VERSION.tar.gz" +PKG_SOURCE_DIR="rkbin-$PKG_VERSION*" +PKG_SECTION="tools" +PKG_SHORTDESC="rkbin: Rockchip Firmware and Tool Binaries" +PKG_LONGDESC="rkbin: Rockchip Firmware and Tool Binaries" +PKG_TOOLCHAIN="manual" diff --git a/packages/tools/rkbin/patches/rkbin-0001-rk3328-add-ddr-v1.08-and-miniloader-v2.44.patch b/packages/tools/rkbin/patches/rkbin-0001-rk3328-add-ddr-v1.08-and-miniloader-v2.44.patch new file mode 100644 index 0000000000..6259f25b75 --- /dev/null +++ b/packages/tools/rkbin/patches/rkbin-0001-rk3328-add-ddr-v1.08-and-miniloader-v2.44.patch @@ -0,0 +1,818 @@ +From 10b2468096e88f0c68ec87be8bd26a6f3af53050 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 25 Dec 2017 15:33:57 +0100 +Subject: [PATCH] rk3328: add ddr v1.08 and miniloader v2.44 + +--- + rk33/rk3328_ddr_786MHz_v1.08.bin | Bin 0 -> 23684 bytes + rk33/rk3328_miniloader_v2.44.bin | Bin 0 -> 60164 bytes + 2 files changed, 0 insertions(+), 0 deletions(-) + create mode 100644 rk33/rk3328_ddr_786MHz_v1.08.bin + create mode 100644 rk33/rk3328_miniloader_v2.44.bin + +diff --git a/rk33/rk3328_ddr_786MHz_v1.08.bin b/rk33/rk3328_ddr_786MHz_v1.08.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..0b0ffa2ab6bf1553118baac2faf9e3a903664a9e +GIT binary patch +literal 23684 +zcmdsf4Rln;mF9gv{iE&%T1|sRBh#;2vMm(ik%cf)f{&hBau(a@2T6%>l3BHWuwh^g +z0&L4;#k7Pxv14bB+9ojxK8vs+2Wc}inu)WAKF4P*Y$xkEQ&vUy7kq)x9+X?p!Ke$mFEj6nAt&ZUVKCvy;x7l +zGcG!RMxn7KUfL-siPp|XrG<0#$dhGw4%6IU{cR@Ge#WJrzxYVqDEcKQl#ZWg>bXCS +zUQ{Ug2+__oQ56wQ(#cgR33=qbRjDvh%0(2+t$&^ptuoqbkwn|6RjE2D(TaY?^I4;> +zXgg;sU$B*_(U?bVOku3an7c8hAn*1yig|hL4y5f!ZQyUj;?HliJ1oBNeAGU7&}bKP +z7um|iwz6g`mo}#MVm(v5mkGX%bu4MjURQ;!t;$xewv|`d%DS!GV6Jnexz1IMDHZD- +zYB6Z)u+C1T0i=tM=%d&lW1n*NS*)wQF%=;iU+S++%I?JBqsrW|_X}tzm(wU8Rl;Kz +z@SH||xqbHn*RYRz4-mCWyyx+yN$u_ULF`9Rqr_o59~$P9Fkfkd{_u`s3JmtU+qOSN +zy^=)j9d5bz5XR7U=`{{N1<<$kWsQ1uh1$2jk)K9q8kKrAnc8(y%L!v9h?emfgfS8l +zRc(LW>^nkJ<4b6Zqi-#bk2%xfL@UcP)>> +zz`)DG=tsav;JJqPKnJGRR|1Dr{KU(L?a%a$L~Cg#^X!CKA9W{MSymtTI`4yA&V6{z +zBeIb%0Br&?X+6)wGtV4hH#D0%c^rrkd0g-?t*Xd~95B@TBwDV6v$U+QTd6Ik*-PXMp@F}+6Y^=8ab +z#Ct_4OHR(-T{rqcM{M-sBlV*hMH2GIm~s+)Y!k9N8R=`pdQIN?8&jQrLw_*tsmRJY +zL!T3ksaid{VE}V>9((z46!-wMAeWy9Hc|BNL>*%%#vU@qe%#cPr%XK=HuYquF=rR( +zdEE)*f-lGok2%H9E(5!f%<@}>JiN+wP9D7oyJyJ)+sbX|^JDPAJpBe3ZFN#IF6%Wq +zV^v1Iov@kTvG9NH(wIzhHj}xI^@{Pj_(*It16dPu*>$yzMtPp?<t2YH0<_uze37q>$k_KcL(q1qiWkZ +z=6^N?w%$nc%unxz6NreZ|mTLpv<1uaaU+}iCG4*{*9}XDyQOL;;c|Q^XmiO-Q +z#uV=x??J@eJG+fgR|VS!s-*HrwOk%qp_E5_Y9;uXjJ;^?q^-BvQ{W21@i8a3l9q(6mM=tan +z;peTdV=eMXYd2&gQh{|=`;9feVXkq~kk_4W8EcIfQF#Ki@An%#1)!%1Sx=2n%kmK? +zt$tai-uD$MUjlhc@9c~4LCTT+_cu!dVW=dIm4Slg}LAaQDj{*aX +zeTpV1iSr;R%KIqEIE9O-cfe|Yj*?iv(H^H{IpoT|_x3$}|7)+5xO1E+!j1YN!E=*^O;_flCzoCsn@JP&TSs6ZJ(5M +zahpf4nTSq=s<`|&I71{_#&l%SO-jj&zI$8F~gn|X>zPJV!LJfzpKosUDu +z!*1$*)mnR+lE3EmMS4xK+4uiieS=c+U2a1kw(~shajR{eluUCQFtFC>Gim-e*JJIS +zSd*q}-cIl@=@BpUK*+l>9<|WwDB}ifwwwHPgNKM-;*FrKPCFD5eX-uI`Fag}rry2s +zp3q#>55ixHqi_6CS~#~~ZWEZ7O39ZnFQ0!?{I|e=gw1*XYnN=XA#@ES-`@)&#!_Ep|=(N3$sU54dx +ztPATnhO^xX*^~WxO$XMShFiuIZofZ-19)lfI|T*lbP!3PB)L$LoWry6vsR;BYg+BG+w?*gyXFT?)C +zj%YqQAGgYWI?p_7wmxw^`Xu+^diEn^edKT*#uGk8AI>YxfpwS5t0GUvRQ){LmF|;` +zsjfAVb28{7Dizi?L^mj~33fc}W$fo9y=UwL>sQ*f2YRJH%`{o(1@!PN&Y`8?FM@QB +z3ZD;t7yD)`tBn7{4%#^((~JCk2g+7`6KMGivz`M^#24(REuxw_tU&?~kyCso=&9JY +zP(b-)pf&C%59!Kkov55KWLdMHY0O^?@+hN!4A_>SFV>%m_$dj$FBwzm&8|%5$4n>2 +zKWmIHFgn+micxVT+q+K274yd~z&`gC2Rcz#XN)!3O-(qTiYpoODLNH(xpeM4biO=v +z{ycQSJak3bbWzMF)==Ce&P?XFUTYF~h4qpRd{)Q&#OFsawr*j7*Cpsnn^IvtvVmo) +zj^&EaCC0j}$yoD}CdO>CyQ0a6A*z~$KL*TGaijzi<44dRVe92Y>s};`7wSYFL#m^J +zkif6HDaHLnc|}vI9vF77D++Y`sJz~)*PFz-Eod5yvfyW>F|R1EvXxtG<#th&ZeV+OLWgor~8u&;71jA2;(%uSi_EOzCIA4Fw6INY#-MVWDV;;J)xf0 +z#cLp}-%ihTq8{tF*NbruhujX2^j +zKNe><=369uuMzC=s97fgPu9Us(Avk|`*D7sJYK0!mzP(_CNEvTRbGhk7&q39^-c;s +zUsaciwbZe$j}N`rgm{aV))o7gGENELiF`bA5VAs2Wde0VR#4VZRg6<{I +z2|s$v5h<8xMR_4TH>c3_x5ov>uR$IsEV_G-)M1WD`+SZ8#=BofJ>*+c^>Q8K$I%9! +zE8{5JF=E{k{JznYdJHuCGp^;`ILo&q4#nBgF2Tp;kt&>tye^BTyK*`W_OLuip-P@>e!3|&Aw#BkEwCG0 +z<~^Q}DOC+#F;4It{0OGK?nD#r3yi%;qunTnTe!hLg559*SdfZKV>Z?evV2(42G=>;z +z?BQayt-Y24>?8hGyiU!G*H)I(*|-C6QTxjtBMumpgRobI4|NA&y=DX7 +zJup4>T_0c?<^l0$JM+N%!sih4PzD~d#>KsqHLiWUy*cB>%`uK~tb%doW1L-B^Gy3_ +zmnGICD?a7BqI37vkAAeN0e2R+<8IlwGs@KSeyX@zmXi7QvR!RX4VwFA?bQIDBarO@ +z$O*@aEZZMIb{OAf?&j29(N2|n(QcH(@M$RZBbk;lO~ltM{3>BD{LS!37YTo=6EY&? +zC)k{dpso{pQHMG~S7g-Hp^oXSb{=neakG%$K4$`FSdmA@Idf0xL`b6r<(KrU$fF^4 +zC)hu()18Ud5cC4il*54$s|;P?@=}GCiE*$l +zjtT7RiWz6Bu)WsW2y5drHIB9D7CqKy)$6E_quzREI+mrQq%CLvgwPi8QJ~hZZ%B(+ +zf&#hweDRS6+)EpKEO;vgMjXeWZwLIa6k1X=AbRHBP7;Y(VS9Yg9p_`OQYbE_lEk_HpyMQl=m;6-*y!Gk2s{J +z6!BmQVm}SOujZht8xR)~?iV=rOM7ugjaV^(cw1dUtFeYjX~LUizYH;1`v~}pmQnI{ +z(jVThQecmM!-jYP>^{!Bm>X-seaT|OcPf{$*RhroZ$0j=2jM$(tHpu2xF;(`-^WP4 +zb3d?r4ENbXsNb%aZdeRk!sA4EoFHrp@K_ERk07Q^`*6Rus>C});ehZFq3a3Q2O_21 +zfw6z!TNKdXv*TUNlp5x48N+upo`-!rW1ED5mj!}s;ImZ_c+Hgi9p>F$;-C66ZbvGY6k;#rRFp4eQMzo +z9fi(Chyq=F|D%Bp_dLh%O9Z;GZ@8Z-AAsFBhV!GYC1Q+&xFQC5tt&kgA~)!9$HZl^ +z#+A@}%%y{G+%Xyatupxwn9nW7bN_kViD7JFo7E1RW!~lU`?dIdlNR-i0q&-ZvDTQ+ +zi_GV*o6k}6Ic`4RXg>GkJg>`n-k9^eIp=v>&U2sfoGVje4gI`^kyh*-Fukg6PJW#6LEBSogNWNFqwulWc69*@GiC`!`WEr|ZnVSyzSM5S>=F1mMmwKf#=E0w +zwn^N-NMkH38up9NZoa=NL8^jou-<+9oZ)X-ZR}@#9&PNi*C0QOGmhmd0euADlQb+F +z_p^|j0ZZ5VWb1x*k~Yi9SFo>BKL0S*Yx?}}p+-Gz4cBPY>NS>Zc!wnu22 +zlvdQ?>`fe=1HQzwUdLzbVJK{n?_u_udnHxZv0pqk^$xpCNqz4epd9+;J2#OD&fvn +zJp1G}zHjY>ec`)YQK#xpi)X+2+_$Jr3Yz6&XIrES;}zkaa9vMzEzZ|h!K3IGRE@S` +zs==CqI8$q;=`p{f0IqutyvF5IYLam+0R4!e1Bg={Nye7X9mY+<-bB-ClKm0JF9vzK +zk=wCu2iE*9FciK8V~BI+q~KT^s+!234LJ>0X8eImBos%Jao +zx)Zc9oLPLgy`6m!epY3^FA2s-u2gU~alN9Aw5suu)*ZAXq~bj5!g;{^(XE%>6{}Fn +zCEO!Nt6-;mI_#NL8G&!P2mK*KBJ==lxGs6GDWJK|@cOLK8o@EzEs +z2*zh!f*cRifoAb7MpXM*i0^E5=nv!Dp=;v(F4OVzAoStK{7x%My=9O=&JV$t!5HJT +zQAsvnUDkMP2N0vfrVbv~kVnwJ)*O%blkEXwpQ^8bkL5@Sq-yv;Uj}a>jB}~~a8`eo +z8LR(;=mTEG7~4bm)&S3SNEj~^M_z>S1~49f_5+XSQNJJjzKnZ<0nGnTpyg-ye^o^;S{+_Wy>8&a`609mJa#F` +zdthUk*DB1py%AU|5?)twspK4x-E%U~}TOIIt20Uc&-jdKa0-iNDiTfkS%wh2SeS4gLenb7} +z$6K@GL-y6-Yl(Mkolf}V@B;_o|MB}3;5#0JKd9sGQq^G35F4y?fCfGtpPMo5HSC?? +z*Ym!WK%daRrWi8jqHfaG=Pk3(+qORMn0?Z)`RLny0x>P}p_9#g +z=Q+Ipz2=mVwNu8JkO%SJ26AQC>sQ%cJMrC$gzr`yqi1fS^WgcElvpKrm(Q}#lnC(M +zWMsDZerq^#4)+hfAh1mvw%4!qipr58osT9V43AQwWcZ#BZqneaaHw-_J +z^(_cLko`M8GZvsuhfMOjm$R%N*o%2BOOqoUr~bO;CX^$tA%Y3jwM7sckCeedEx!cvp&!+MjhzKX^onE +z8_%qRXKv!}iEfA7ehJ?bnfGY;p6C-VzU_Pn-)WZMJw4Wf1@08S>O=bICtm$LeAKCL +zk8){QFODkmm;!&QTT{GUy5i-&_s%ee8*6|)U3^1P-D2F`EOr!0i%Ex1gcQ^1%?_PT +z%fO*SqtmZq@0gb9NCOR0OaqOdP9NvC2K}JYKpelnsqnZ#y;=!UbqqdLhf04vfN|KD +z67(wG2jIR1_O_ScFW70VdL1?+Uwwk-vW;D0j*~_`?%)4z?dI#-6x`kQkmD}qiP!j3 +z_+$5${v^cD_u)MGXL6Q1OhzPV1nROQ{d^PuE({X1`j@^(xxYUtkeuT407V=FM8S)fT?g +z#^bo@%@bIU4BL3h%+tsV-1?Dnq*{qi9|fiz$oF!dF!pD0*`WiUt2lI^plslPw_@Nx +zEJ1IcM?c=<7ceikb6X7i{xR2UX8n+Uu3(7H#jw|+9_thIz_P%^P}E~>BRmfFroh~H +zu4jBGz3^w8Yw0hFTp?IO{D9xo&rJ_x9!GK~9?H0BGtxFZZ_BtPBk`HvkUb>GyRV@-gtvoXcsDN;~r$dn@O +z_~pX-mlQqoU&hA964Ze9hK%IT6qX{#Kyg3jz>r}#Z2|8jPdfY=POC`Iv>@$5dJgGr +zq<4^tBt27%vDB5@`)m94UeH64C_H1tbE^ +z3M3t=A88162a#SwI)|j9t{SNUsSkt58XyuPv^EyZQGX4 +z_4lv8|2}Q)mMxpMXx5}2!qinB>h9dw{lLb~ZEHKGW;Q52)VT6bJ=C+M^FL|Z9^Smx +zs_ovi(JF4)^pH^`?KZ8VkGAw^ofw6S+ATL%RBM$Lw=A!?wX)hnx3{)>sQJt79%^e{ +zwa;wm0(|q^>`NYKSp{8>2aio&Gb#=d_Z&F +zhs5oi^E1!rdF` +zR=SB+&~0=x-9k4|h+1JT*H8(4jXG&Q6~k8F0RHA9xm+&%6~AyeOyo3wb8snFiv#yM +zG`ZcduI7(v&`132GzA5`3l@>+gKq9Q7EKYFW}pF)F&EQ#JRWNlk)sd)rpDou50hIo +zf@hN*mo*Nz=JL$U@Xw;*6=7U!9J~q?&slRZK5jP}%->bwGsUy9E`TW+KOV>6#^49{ +zh5~1gCohc{hiME9Yhe<_FKg{CV8{);Uj+sEX?X2SV~u0y$HI`uk-&yEPCgnQhiP~m +zw>x_-OMaX@7ibvg+;uU?_)V>g*OSY$9Utb|qOtR1r(u3rHgfr~uZ#JSe2PTm_k)za +zw`2VX=buB`iXd|y@)(R=2D!fVx#djBKgqAw!)K*^aJMIs{}ajd7B?V&n={b8gG{I3 +zoHRc}+u-x!=cTjw8|EEV|z#fMi=z{TNm_>j9actxBmvJ3a{q^J&u#?KJX +z1o9i{yEKHHf5Y5P4%aSzE+of@c-AL$1hIZ6IUA5mNG(V>CJ|bSsqtC2@k8xpe;_B; +zz%nGZ_e+rYSAoRZVvS?RabDXU&oK@6!TpE8@e3x7Ha%Ej?1SRuyoCo|%>c~%lWT(JUQB}s#Y2v6+A`3^E)Vw(QK4Tp5 +zJ|hc9)`@&L&b8sFaW0PEq7H%Mp-+or$S-gV{yW3bE{{udaHN0u#xxwCFmast +z)HoXQIPc#Xj!#GL*u`3S6H>s$kzcm3eN24yZ*Iz!#|Q9<2wxSQdhK>Na`oE5dM%rJ?U+%omEVhAvz@ftM?RzS>GkY?S-F!}U5a!B2A0p6 +za_gM=&1+%yulZ-4Gyjovf#c8&I1=dvY0<--7e`NEb^+r!M|KGuU8<_s?W04HRRc#w +zVf(1gfTKimUL4(@v3+EFXvdMy@q9Qw`PXH`yzB_l^Cpf_Qyw{v&&BaeIJH&5k2fHZP7(*l--o +z!BPMGFXrar_(h!TjAPr(I4Wth^DiHcPH%z0vET}ERA!XNKP(&{+gm2|n&q+8#F1Zg +zvwfsje&wCQaoF%5OW@Bij+HauD3LZh&3)lD=fhET!qI^|IxQTP%gf`{;s^)&GxZ;H +z<#8sx-eJQrnv3Jn_Z_)72FNFH49$$A?{YXoT?LNH72+sgr9A##arDTLh(aMXfB(XI +zabABOPsdCgTLGRG&k!j2=btg2`Qxm3Mp8>n`)J8yA^uq-k%qC~l8)UOP?9v_;g*wH*Q5S;v2<`Z@ey7Dd-CnS;RRyj=&+4$ImLx0gI3pBR0W1tStM; +z=l9e(W5cn%`wpSkr^hobIXDKDG{)lJ3Gw&xIL=-;+w{u~9K8;w +zh!ZUwU65b9ALR5pos6S#P0z$F~Fwuf8#hlZo{!F +z2S<))a&ep<&qS{YN7y@oW5E^TsCX6S4^bW;lP}3*We$!U&*b7bJ)W6&O*q0Uce8zT +z{2Rw{@L!C$kk6TDE{=$2a&ep<&v>s1M;Y%C7)Rv_ah&phK>x3P&e-11Ec)3K;=RHx +z0PF$l9v8V4&p5G0{<+O~ri-dYTqxr$^;@Dv5;)?UEAf7&n0A=wj3mx$C+;Ebeh&Tv +zAMt)>5k8_4?`Lpr!RIq=-Ynu5uR|_izuV=Kq$1=Fl4Xr^@KlZbK9Dkg<#fP&&ybLe +zIL4Xx{%6T7#Vg*|pwE@QuYow>ty2DYW~TQF_w0N^#DzDbUxSGw>$kY4Ks=L+W4n28 +zCgZD}EF2L)@q4Zi)o0=8pxIeC7A_15KPP0yfdy`-xHqGCT;N!s%5KKd=`?UuO&nG5 +z#5k_O9E@WrJ~kbK{wr?kO&ZBgZqjIJV&{629+|sp*Pw +zB&@eEbZz+EJ%!(&UlD$#zN^QNcZGj;dHgguR^`eg;+b3=TR#PkcD?qScrN&q^7s|3 +z(~!q+|IYCIG&p{_ZT(K(1HPx2YvO3VSKxRi7soG|_qa0jH%qUvaje%xc(a^F&TouQ +z;I9KWCw3fXo9}1l$;Q2e+vPCyx&>eNL2liu@!r+p$gkITVob(y5x&+j^xALgb^iN_ +z;%n6F+<0aty?!&WewbH%6O#3QCTiWAA)euW{IkxPYSK)-zBL<1OvpGo>D4S8RlHHR +z``3VoDbRYvqp_y6@eL&Lq}*7-gpfA>*5MUG_?MCG5E4jgY8zW%qWfF> +zoFk278OZ3i( +z_)t-U^1XQ>{q!%h_Ej!Z`{eoW!CCqpqA%*`U1K5->lhz$Rm!jbpR0oUeL&67*Pwg7 +z*{46NZ~fpO{$1Y%oo5fuea9Sl_kpDTm*)Un{~ylP{`HoX^|HAZ7W$hn4G;9Chk&^v`uZQ*zzH!0+ +z!QXs*|KMA-`v-s5uz&FA)%yqk^Y;CNb=dI#ynT4j(W{5|{H|em&s(*_dw%or;XQ9$ +zFudpW(D0rkCBu6T%^Kd5%Hj_@_fh5f{}1vf>SwLOpYerWD!Rz=0~+=jovCkUv^ESG +zozW4l_Zgi-AJ1%U=r=lTxjtxgT5|0*I!&&A{H=~aSwWLh)nPSfQNttD+e5uRzRUFm +z;C++plfd~mt|{vOoa-b0&gj!z`~01zTwm~arVem@lIu^oru?1pUt~D&cVxD-sX2=q +z?gEDr+WraGIb83e?78yn?;HwcwkrHK@lD2>)KA~PT@AkPSFuC*DUIM5RjSW_-!)0f +z6f{_sTN?2L8*{DX;f8sO+JZ)QgPPm92j3;-_a%PoSN$QSI^pMa@850>0xzcF9>@Uh +z?7{bYGGfO+T|9W~n`$(Cj_M2VS)CMr=$>vBYY3>$0esaHl`7^7+RZ6{abmNBLxq6Gc!R~CM(DL%2?{41a8H+W7_KFGIY +z4+mm$U&=jgfmb20iW2_{UT)uCIrdF!^!TSgHTeGR*A9*y$Z%-j_d$cK!S@dsvG;Dx +z930(}F?g~gFnHp6|KPC}-{4q@O4dOWp|^VQnq(?VjfTE?4nDa`F6RBt#5u_)XQ=*a +zaN5ef$-7WrPBPU(Kl2=1AEKYB63w%kBI@GW78QMSby6)2wv0kAvnihKdf`q-lAUVS5acHO7*|%4^`Q-t@^G4tKKwKmD*8OZse(ajhopJdxLsYzbn2U +zqm3{4RID2uN8sPjKc@O?kQ?AH`E#EmOXcxvlE;958s3gYKCz_@p1niaOmNlkAGszu +z7BRQTyWworDrLGT6Zg%%Q}|GHzUq(8Qw4Fx%>eIwmhfP9;t}Y7Yo^M7$rp@0*c6QI +z_J`jN|9%X)EKaN#8{2goc&Hg_iGm&>WX;M_tK9GMka6B+$MQ1zcgj=$$uODdX{^DUrdZ=d`Aq)#m| +zc|Q`OF7!-=R5Eqz1mFJAt8b_!W95A7nD}-vJQdhKQ))@7+yaJ`ETJzUE4(EIT{NC` +zmuvjG!SB0#D*+D^9w=l$`ft+zZ%F@vp9`JGX~4VLYIm8)$vg1mx-6A%g;YVPNOk&; +zjautD=83@?_` +zo?Vd_BaS^+! +zy7QD(zuP)*i-Df(2&nuB-@*YE+i96w{KTmu`{S~1FLnB~RmBQ54GR;;E)d;u<={IT +zr_ip)K!0QmzTafT()GqW&~DhJU4u)z252{sp;})+Mu+I@i_q|AQ)uyjK#L)0G0gXu +zp~X*mc4$$W_}B6KlElA^-xnvIAdEWhy2# +z7d>+r*?0im^{}G@_Nt(aC+GXUychWsx`-}Km!bD>zjAP_$I!B)VZQ8h=(WcmYp0FK +z3;x&-XSjM}&oxQ0DQ5pUNwGPN0d)9$RX+j_hNbubM#sXC@Wwcy9CbrGe +zbr|b?;l0-+CBLx|ep$$&iT)ig`@}WL#*979hWl=;N9?5mPgLw!iyAxzFRr9N1GKT# +zXOu?`yWrL@sdCXv_n@z?;9JP5-tsk(gBFXi(MbOs8)^In<8_Bo{^r&yuH7fSbMjzwM7(_RZ>iSP!lhpkjx(54T +zC0j321=4@%b0vRa{)+2zTRvT+3T`tqTSip0M)~b#n|_RZskl76V|ICAaJY=5M3IK~ +zv_n5*gDNn0WV9&kE4=B8Jj?qXz6aFl=<~{|&hY_*=ki0qh-es3l~I4M+H1sGp^Lsh +zE^;9@xCEIgP8>mQR(s!W_VcYUagFobr+(u0N;ExR|5d0Z)1(l_N7Q-2T`7#bQ +zeC3PPQ(wy&bUXg(M#fnLJ~W}D963w(f&LL1dwfavXLP?`xMo5wUUu$<_TFDQoD}+B +z*Ll^&Idx6aM27UcBWd?G9k>K0zK +zBAM#RTom;=_|2oeR8N+ER)>0<%Xn6HyxIFcTb?cFSuxHEc&1;^O&vQz*PFtsD7}AI +zVw=%b3EJJO_Ndq(&)E6?SAe1Wv5>wab72))Bzi$$d?u{rxldKE;Qd3IF1mhdxkLXt +zx6ezRzN&lwrrC07{pRn%6~3yuj3-Bz_9@Gy)v^_gQ+!p*R=D)hIHY|Sf3d;+Hg-Vt +zlMlaJ;deVaz^GRFYOBg$3>=Yx*5xabU#J)=i&hMm#eJ&EhNgC|-TY(lxR-kiz4;9H +zx}8-n9&1-%tMNIHJ#i&Ms`Oz&1ANcYP|l +zBH4s4uH?J$=qd0Ct8&e!b3FY;8Tlr(h)~b_uBc~GPjC!xD=QG*3T(A`MRKGkTf>lg +zBV)C-;I8q}Fm9$z-akARsy&d}|6IUlH#4@JadwM?tC_3vp-EqOE8}B_uf^nhs^^?V +z(w+xPf8QqfSjhok>E|8Z^H{a`ow_|6nb_RE&$l_eFPujlWvjOvu`eDR^xC*BkT^qZ +z3H}x~yeRQ2WY`y&h++O_0r3q!+$4QCjSL<0`+?z0oPZB9HiqaYaI{=%8uhM7`iR-~ +z15ZES;XI2E`F-!*UEaH*#CN=Recrpm#9r@Rzr&w_u?uQPdU7@0rEk;8ou<)!9*rpP +z(dfaCPNQ^tDLQdid5T(AfKoS6{qYp5fn7^~efzCq4$e)X#g6 +zm#;eVGAwjrTvYJQC=hyKtCW%b6n0$vXQ9s_?JpH39)dUN{XD}?rTK%$S^|T|7~^8s +zK2JT5zfX?y*NJz}gQmw?mcic%ziN_x)jo_N@{zD3i*v-5ci}^J6VLQ?2V>s_o?$w% +zrnDt-g%?XBbGv@Q-*^l>#lO+CcudC5j71UX6xl1|L>=vTLinpBR>fBAX+~Zgy`Ltx +zCp&z^73eRGpCfmIm`0z9MVsgC~KG}@vA@@1P +z^Q}HrJ;b|WtGH@kwp#bH`|ay|d(plBD)$=qCmma6^IppJ7pR!{Vc&^Z`HO!)w!~}a +zcFJqM(f2H{@wjq)wzH;pfE#KOS{ESuOMczo8#b5T#gT6H-8d* +z_wy|GtGGXj9`3&)uVtv>XJtwiW{W?saemg(`A@iI8!2mNt9*eabuZ`H`*xYY!RPJw +zEzck8CKh>r3_sd#uI9bhzC17F8Cq3&WBCjjKTH2lFdmPgf8K!(#3K$J=4Uu`cp(=$ +zi2pbn|FJmne`Z39bJWoyvoy^ +zODgbZyRU2CSBYO4nSY=Rxh-h-se0^GKD>`9>{SZhYd+NF>b!@aHpGYBNV^|6eh*}! +zm*-)dvtp-iJQqK7E`ECX;IW^n(XpP4pH9^|x(%<7xx(w&u8&-p=%p?F{jHp|n5#H( +z1@9jxZcxa=Yu$m)j(pWR7kjqf7wByBVUr7U-SVNteCTl^tI4r(dxH4d#fd+qetce_ +z2hk~3*@?W@}B(wbO2;Mvhz0=iBcb#CEZF?5{`O-~l8SS7rk&~GJ)uhW*scZb)$ +zi$w3HTIn==-v+tLk9hIlq;BTO6h%gsB(ehWKZlE|Z< +zG7jpYfs}2+F6(|D3^=k1{fg=HbTkrus>}9!JauUF;|$gR1(!yLpihs`h`ekVJcKs= +z&_?JZw2^$n^XNFCr{sNx>4S#3EHfrKi1FuxSy~RrWhCAPzQ_wQ7(4be@$IfhHa85O +zy77;&8=u9;%hK_9idZW41ACcaI(f>WViRiA)o;%hs3=c2?0 +z>0g$WZ1b7fqC@_g=k)KbJRjnF)K`(6@?!Oa0=qErpi5J1T#>-{^j*5ooUZH7X74&_ +zV+dO@$=>~BdVBZt_a@uB7kR!1S+KAJ>fnkbHZLdL=KW8;dp7T%x!2`hIMe2dy%W2a +zZu5RXd65ChX-sGH();$IcI=i3JGRE9o7l1C*s;Z)9eepqJN7r=;MuYJxfeU8{PE@@ +zt0?CTTlVT?TlQC!Pq$@X=h?GmUlmx>*s?C(r`xi>;5nVQXV|i|T+!Gp{QSjUek_#u +zA$D+NmX#zfCGSU6W@`?k(2@Jn6?y}1n8=}oOjepy+`M~P1d%;B;xFK^!$ +zRvA@S^6k+hE0SHyD|p7YFo(+G>nryO-ZB;qU|>IwM&3ZCfF)nx-|_rbLL+?Dv64vgt&Imx#s|E6K(t<*V@Hi`e}YvFuVurm_Y +z^B}k8s(#VaQSs~ETAtjAO`}}vD+LO*?!G_byl>?FO5SUjMJshYE_x-Mzhizs`Y(q( +zppQAHY;y85@JEA;(JXxF%)t{9!_88oqv+yl=Eg*?J&0}w_R(Q?!s#1TUeiR~m;Oum2UZukD< +z+-F+O`wP{mt-70suu*dwpZGh(cpS}GQ +zeiyqY?KY>iD>OJPunVnG>}Ily=MkPI{}jIU+!nE8&sKe<{X`*i3ji=L2}z^Pa=Y +zu!=W}Y^2Z8OgqolG_j7re~voX(YI3aU)2N9QGB3R@MF^R!DCILr*c_$;73p8ASc<# +z%M9cuh@Q$CWS(#I1TysnhYttC7p){GBYBt!-Sju~9XUBzw9wH_w#$cIE+4$-dw7nb +zljcBY8RsT6in_WfZLA+u)xcp+UVlel8I&JEN14ChU0_11sHeAT)u=Jg8F!+;qE4L9 +zf}I{6w+-m6@%QMz##wH8_q~RVK8q7C32f18QeM9oy@ou=d(m&>aL{j}14PG-zeC5# +zJ3IXydQO)Mq`^ezN677v`?KKveZV-YefI!2+Vs^>U*Y5}~G +z@1h^$$g}8G3m&UFc!U2gyh+uf_gwm?7Nb8seTeS%=o}{pJA&@i{VnGn{VDerIk*vY +zsN9?IWCR_m@6n?p=tH?5lK1E}{T}`ZeN5n4(#JyE&HFidCDGLiU9J1Nk$&;~j(<)f +zP9LWBv8cf5+;Pu$Rcg +z?u=A#5j!UBi0@#DfB)=E9eW=J)|0GNkhLXK=Y3Dz*aXd%K{I#mw`XFFh2+$u_`+gm +zG`tP7G`vAz?aWk{t`4eJ$+_>GsYZ8Z^Os594qa;?|IS*n!o(Hetm{59%gGJOcpx9J +z9vHkosFtow${fWZ=3^{({zl&rQ7372PFLXcNIwvN6kgUPEk#Y)J +zYno1(Q_yAWW{#KL;Fi_z;}bBhO@DvKMESMu`w#Qg$m<@IHE_T^ILBI4P{+?-=HR(89PwXYI*HcHni|!H}oc5hIwGMUdT6)`a +zY5PI9?YXY~xGJsfv^Hzg+x#cjE_`C5%^I1L7aJ%%iGxoy-vswLn}jzx`kTDJMCuSf +zN?CcX;yHy46rKpL&<&1VV(iO1v5Uf=QTXz6uIczotmVa7WkH7yvwprhDZDKvfI&f0(bPC3EC%VlgS-q@Plce +zZhxv>Tk$L4c(`w$XtTBu{6zl=e$V4uOPjAww5e^yhxzHk3$=M=QtW5f;fc9P&xexO +zN|(9W$yucQrk=ys?{1lRhfX*c-nugR5ID#hABnG7%f#BB8=fDBv29BE9n+QX(B-9$ +z{AsxM$|Sk}RdulacD2dTeBAj*4N2 +z^&I0p?~OV5q?PyVvCJ=yZke!S2KbEi1hC8btV;{9E-i2H4T+Vo0as8-FlSPDl=9fb5q~hzVXA(a*X+kfi9);30w)(5$2R>1_D|jkzrV;mvL7Q} +zSoZ?+GsjxiV#n99mM)-k3efhT>Xkel>pFt!U_|A_A^~fAI9gl~&U5C5g-(*26#JXy +zQ$_DiJKJ_H_8 +zw-KC-Xih!bAe}zlmxjlK)8jF9jbpk`>a9l-*v0TCo@s4YJAy5e|Hj{F)$7{uVd68b +z?IG5)BBRZVZM)3FS7>4Eo1^g-oWB9ix{u2nx659DflSrPyg|LhWA=5be)ktuy?vXi +z|2X(-m?kihD-WiE293ZB*Of81TA1ht-h7uQBk)?+S*|)8iT%7fLN|@aEfaWb)wC;0 +zL{A{ELUR|Nusb(t&s6miKQiA?FS%aL(|8&!ADK)`@o7C7k-i(WDOaWbq<#Ru^YH?; +zz5NPRAnR2N?R(0EZ!PdFo=r?=F1|BPnRo%TH5adpQ+8x*cQf?4Nn}iT%C)QwJWY5z +z-Mo~>Z_i3u54bn{*h*}sN-kooh^&X6uF*0d8mg%mo1x3@U5Tk<{j5@*e~&Cz>hw*NU56iavhY@?LD#5k@I~k^_sRusmpu>-@u1^#ICY?cG85 +z-3w{&UKV~2HVX}Oy;mI@tnX84_eWMHWlq%Rm3u?#xpm%3D|a;Q{sBS1N80=7Qh_nC1~m?U6*3d&opWD4 +zaUTrndt1tED=)AqqxD}}{Ojo&u^pmUhMm}GZ=tnH`|uK1y>*VZ$$N{It-{B&k`f;) +zRkFzTxi~Lh1rFpmR9&r%ov!0!yChDIe<{!sLbhccLe#A%yk+luRn)7yO8P^Ln-SD? +zKR-=f{0puB4fecP(4eq&0=L{5)8RH}8r&9Y_}5JX|E##JcW~?SJGiZ!rfw;?IpfA# +z(mRY4CQ&l3rAf!+~msPX5sNUi%g|tJ*bwW2<0L-%XjwcEmZ}Z=tHk*=IjhE+u}#3 +zM|dBZn^*7o5SJyF4@ +z$|5S>Y^_pN8m65#hI(a8TFzL$1G-U9kD*+{S{L-WIQF~a?>=M?{JQvy(}tlQYK~A>mwgbuuux?y)?QdjF-H7Vaknqh +ze*+tCvd2l{mtLPxRUzn>{{H;m>aj_&SM+TSGfk=SZ$U~kG-oF8#aJ^L@HhooL%U@+iRh7Uu*XAUn%~pNe8mqp2 +zg;n2im9v+vjdG?1-ryF!O4S=XN?Y2R<(k*hwg!Iz{G%&Wee@D*yVsZKC2IRt{PQTW +z9ev)b;>Z&A&$MUCJODC#nfSiRD0|5St{HSl`JJHoz6vD=FBe#(nI>tN4`)C-~$D`@j! +zaBZSZ&JV#KGs+uj*L2%00S1d}`ir@mYpwdqRaX7{<ZmC;hOh@AO%c2MZ0uh=8LxVyK8oJ|xsg~}gueC*3& +z4`Fk}*C_>t^Um?RFQTs!FG!w^^;WxNyo+x>b#7eOvDP@Y>5)}QS@So-x+0;CuNs-E +zV_j9Q>O8b-cbWJVA&a#|+?z^d-nvK2b<;$=;L+7sid;hD9-$*VZ#d=eTm@e%h>08e +zRp(~z8@28!i-otfpE5aT1*OAsQdQJ&+TRIZTW=wDn8~v)w}){Kyhdcr2#DW*Sxg13 +zWFzt>vSzumW+7{jPl*@a1ny~kwHf$>?{Y2XdWvf`*LS#H#Wjz17So=@&40@EC|B7- +z_dBj%;rm-$@8c@*$pNl!@ceIFU+4N3SD|lM{GrX_u~5L`X_ypKBo6?BYpcZbn_P7htNp_5|1%17>BF}wCZI% +zrpIJsXOUBbctzq%i6ve*rt@Cxb(+u{p1kL@MQ#n`R>p7yTpNSvG{&f(F&bcuW-vzEOrz>y#%P;mR0(|z#yI7Y8yVl}WtCf2 +zQC3mbBF-0@Y2Ek4nSD_7!P9~0F^#*>YykX)Uc|8_>9L(!3V0{j`;Q3tv3Y*?=vV59rmjGh{cc{52ly9@#a!~_H3Y@U4lVKbQZ@NTxiM#*Ubq)I`A02jRSx!>g2({)UWgnWfA-cm{ +z2pw6MijL}wq-tW;w&*E%G}>UYmy7YQ?7rrWr&Z@2qHlQiVVfnF8YX|{>6uWL5A5@2G1xY3IY~{lb}Tek6LkK8;83pH3q~9zJr# +zzd`ovV{MG}3V7v%uKNA*oa9r;^hc$ysp8Pr=-lkmSFJB;5!#ycRnze0iT;Ql@y3#; +z&!*~JUFX$_Iv-`c{EP4}O}4x`qI-Sl=|yOY^>?2-GCj_o{qg#Xo$iZ>ofdl2hL7hi2uMS9!=Br(^ouv*Gk^vvF0$bPe-#=zX`wnbNKBy;I|w2^0w)( +z8a6W=-<>jopScRZaf&XOIzEKPf^A&-3*WUH_!e;i>$4Ik +z(N~SKKJzW@d-aL$B|5)@K6t)K8#=ZTnv36+jzja=#^}-M>EhAEqk9B;43R(Hag_X_ +z*f;WM2Kf||Je}?{HY~k8?aNHj34dsxWn6vV>+|tHywAn-S&xTPll$n|59y=WkP75f +zY@paC`qOMW@_L3&i)#I(ef>UTZB5LF&JbO7ZmDZWPEX&?+3b{}zSxn5(;uwYM6ZOw +z%fQy_{;1Uw=V=@3jnxm*tIsnguy<9yH}^j$`2y+V!|J};u*~U`*ZyO7Err9giM0mr +z-5OvHXYxGNY;bvPCU%Ky2z+X>BV!f#FRY0w1t;~bbCOHn9@|v|P3H1W_EUiKUiDaB +z%;s6vc+}H=Id;T{AM!uoZ>j{l$DVsdBT}EB< +z(&7_0)1D0+sVDE1wK#|Dep24)`+3~+-h(UWopjNT*8Q#@EU=@a2!Fp$+gc7tY~Me*6zsLZF|p{wvUem*%Rp1EHc +z2Pdi1);_02Ef3!rpA9YPukb`@rpqG}@=o6)6W`~($1{&l=`t}OGI3o=%QD%Y0UQ|z +zAzO7m3=gH8#Ccjqi0#m)t>mBb_n!RVO7UMbpMXpJ+t +zb_KvQSYdy+0(O?>&Bc|zpMk@&Dyh$SH`5>z3SCGXKs#lN7qp1KH3ue{$(29(L_&b9c~9i +zhwn9x2IZ`*y-HmY)4KfC%u&%v%CaP9Cv(ty#TWHuiH!&){(QFT?*P8^x3Fk6`@M8- +zx=)p^hKHd=Z9bLkrvDZ?Hp(}(ZC*i?cj-2H&9N!I5%HXcH+OYXuF7=aO8&N08QD*; +z2I06eYYd*l%wZUccwFw?-1>2~K!4M;oDUxEc?8U{CAX@zY~{6^1&6I_eT`CG`o5oY +zTjoMbrMlhc%{3p>&%OG&RrS>@=ebqgS92%Vt?DRs*?$e3-K=lB8Jhe+PjqA$vstLqCd)HFy&vGF1198LMQErfsL +z&fBE<$1tsbDt~6dA3cuMpVWlOj&hw;EfloVbj* +zPwIPdnwAyuaRqngGt>QL&K@EM>72PVosHIQEM3i7beSs>ez7*r5;>ty@U@71c(GwW +zCwr|+usP+}tp~YZ&)-nR^JO;lRC>LTtTmB()L*_ji4HjWnN^G#4HJ8E)AoHM^Neiz +zK(4}uSUga_+4f +zWjgn=hUh!pDz^V2=4)e7)w|QMF-pa^R-h_X$1bLe~vG>HjD8G0(k3x3|fmRVql^ +z$i)a(k&AA|sO0fIj0_51_)6w-V|#=?M1n?(vj%9*tzJ>ea=vFVH!! +z(STm*F{&ijYDvw|1rRO-2@^f*!WV|LSa +z!(8^6l1n@UE|LB<$%c6i9of9BjQ&Oe$s>uYM;4a9g|w13#&RVH%L2JUUx8nLm`SLazRs-!QD +zPJmY1z=h{ZZ~>8G4dYhd+{cP=aVljO61W8so$mR7rJLAOw|9xc>Qi&-zKlD>u;9& +zg^7zn#w!r!S1(lf$v(tF!|jymYuM>}mh&OILLMnl<&ZHd6K-Ab3S# +z`Wn6iJ-V$_pFcTFS@~9iZp-Golnr|2?&6$H;wXjPE8&bux&aOCviOB+$?oneI-?gl +zXT9#1b@P%p2H(ay;c@5;9^EKswtY-3i8Bv8j6N{)!u413uAMqU(-%0eMEcmapqDm$ +z_^?HjWaQIQ{{pq-Hr79-w->HIi%d~IdOq!C;`8I7qqDOk+pH?JY*tI1#DTH33KxfbTOv|pl<;T=USZHv@)=Js!=Gds3@ROb>I4^d%gZh8m+Z>>N27ki0*P;83?Aa%_T_U>N{(4ir +zZ$oKIdpr8|x~BS`&osdP2y-lvsJ|-09MiSzA0NWDe3!p2L)Az>&IbRJ +zz?U2gdE4qAA#2w%-fx4>QFNX5gK4YlZzJ^$J5(of-P(PBq&^NV7GsV!oUxr-7^{`_ +zc^0@^>?REWYq`o50-y$~3*FQ6Pm}^_#Oj#qM`)TmbE@)!DP8CG) +z<gL^6ZB$tc{Hgd`xtX$g-dD5SS#-Glj-7W~rMp +z>T0`aTiWcxpDDd%SF^#N*q+jTcQzaRtwBEG;JQuZ1-ZpeFN)4|WM|}7)&=w3o(a4V +zvFx^U3&O1Xm$*-IC<3<)`bn86=lI66@f!=yt8Xkur;=N-vpG|9Cf5S4v$>XWou@QD +z@6eC7-ykFS7#aLIV|%uilm7)g;*8|}t7asnjbUV|mv+9)UwXOc1^2HvZ*Tn0*R|YB +z?n>~ymU8H;&LQ^Ugs_oe)-On(E#9Y)U4hxi{m(h8FP`Q4iSgCRxZ9qG+jMPymo`5P +zFZS2;#|u7JUn6+*`*i!#rq+?j(;@K@%-K~_w +zigS8(jO_V4zhcZALC1~^v1TVOxJ|VqzneA5j>w#-wi(1CKJK-B$;Kx9=d8{+`J@w- +z#3CQTCLH37E0gn_rO%%37r99vyFZt6usGvcaFVz~avV?dF8cei>aA03!8foWjy>?s +zRhsY-eng$24B&v9_ym^{A242%GPb7b;#-CGjO%e(c*N7iavs$L%x??+$bpCdbh>y@ +z@Rzeg>7&p;a=6*Z+Q%90ksb3| +zo`PpS@=gALmF&gN^#*;}z1y0qI|8H)tpmH(gH3Da{GAAPO>DfxEhE@}$%p%? +z-)?mm`fbjXT;R*8C{js*--NB3k8SIXpBL-d*0C>wt<%rZaI70!7un%2ugIe;^&{B1 +zii?zDMuyS(3wJ;3UuaS;mswJeVnId +z?3b%0#}{)}H~Pn0ts^Mb?TGYUGneG0w+va6ThO3F(W>13YjK1TpthS)qEHYdPE-4e_nrw@sT3H +zOP9qjQpU=3%81Uq3min=KMeNG)U#b#7h1j!ou|^XgEET!gC7R#Gn5mXmX7Dt@w`@G +zA+J(KXwnXzTJLF_=IFtw_$v}0<}hy|e8)HS_-?y=M@Jv5*u%I4=i$xppE4Qz3GZvA +z4fIhe>qB_I!{z-yTlID@SY!Wyc}irU0p6n%N$X)lxgTJCqy1OR?SikYyHCj)vn*9R +z6}Qi%0%aa&5zHFSq_GuI5TG11wW?5EC<8;+?WMjksh<8{x|H? +zW#IZ@_UTf}OtnvQdH09frx110?bFv-7jZWGB7>mEN0}@`p7|uoP>vDZXvV?{h5?^a%PH* +zJ#yKs$qp5SS>qhxTvc*edQTWWN5X+OA&VzF{KWH4&OyU`TJo0I7ho09ehXuGXC^VS +z>?eCx=VuRwe?q%_tK@I1>b@U6biW<3l3!r0tK^NYjh4ky)IThFpBY`xJ#?LVz_L{A +zu(6=V51tYB#WiiNywgWqJfG)H;NQU+I>e9by1`fa5>dW<-7j*t-B+>K4p{AeQ`h$a +z^O5U(4}7J_O8(HQT)CgQp)6n>vcFu0EwAnce(&u3QePQ)HBvS%W%HbKIpPvqGVZ)Klu*@TlQ=qP{yPBJjNY&B>0*zL1n>PhpA0b(`c@4#>J* +z=iF>3ALYnI3jT^bgwc^j@YzHL?DGSoT0RbRLkBAtMwiyfxEj3IK=$SfsL}~bX0O3#8;dTR +z$#Z}qWo4Y$D}tlDzn_=f{R954<-R#MS|@d`3yxxYpNLAk_va;-@owbLb~Ve|ePhQt +zEe$VcbOz~*ZvSO;Bzaxgw`-if>3Q)b<*a?=8~a(9_*3rXitpEN@=p9<$rT7qy>*P* +zUz;|c=g@CH<&QJIJeXmgEqFaj3?Z=R@mx%Q9!Hjh&eFFqe+2gTOCRDs);O^TH&r6} +zBvla4WM0;Xj56L7u{ZXr`kj$pk%#6Z!1TTu@{PTsUBKnMnoe>?Rd10G#y(#fCB}_+ +zBd@Z*s2h0P+vFhL*@4{y&U3&S;GJ8)#;eadbEiIb)fD~kDzW7n;#uZ$_s?X!Fb^fa +znV>d+=M9XB61#x;WZL11EQ*fN<3trN68z=?*wnJzSPxq?AgqNh4gRg2)zc-iTZtBC}z2|5m-VaiNy@Y{Q$J}#z*@3 +z-y#z_AC9c~8P6){e?Z}{n+lw1L-Ra+{gFPSStTmaFE(vS{`y(`2Ff2)(TZ5n%kBH5 +z?N?}9OM5A2OzQh1uKs>Q +z=XwrC-ddgXTbz4AKk(~izoPC>`kY02p8lBbmvip2%u%PXXI-w&kGQl6Lz~45ro(%B +znKwIXt9HoE!-bR?Q>m&bD +zVf)JIQ|BT4%>$fIyOXhg2XbHpUn&cih6?C+QG_wX+W4G?Q>ybR=D$B>vl1crVwsdN +z?b+q%v(A*>6QK%3XNW&L!m~jPg3c(YvCNzztP5 +z2uAqE{+=Yh?>g-CrFVf#$get2rHw_K9L{UVejDFpdvxZR2w7xEkp+5j0d5!r~4Ko1CrB^u5f5;8OybOdkokj*T$*UNy*ns +z?sGTiNFErU=i=6)+whC#tKRz$LBp@9 +z%{9Z|F8B>xvAlLjWCU2LPY|aeUvFMcoJM;FUST<3sfMF#V0>I{tDaIi&TR7a_mv@oVTg +zgWRClJ~`9fx20`gJ7>j&<@YXB-rHT+V#CB1(6@Eq>EV4upA#QU3~wc;t>!K2;=9w(Vc#yY8AMN{t#pqciJ`Bs3zjg?^Dg7+Gu!%` +zP3W=@Tx37-z2~cH#W^C1`Kr`a$a({KH3*J#vZKsN>HEOEg3v;I1jhO$tk;b58zLe% +z9t|6FjR#EVS10r%zlOak3NvQOr&Jy0e63CJa})F<=E#@WVh~ +zn#M$5hv=&}e$i2vzE^1_AHz@aWI<#=ct0n&20GczJ@jc9x{NU1%{0B=fZiYVPxxRW +z6T)L@JIXxMkn~&X`15MdfStQ0`A^8$5IQBQN^69Vf6n?tY41j9kGfuaT`I5EYwKp$ +z-%D>xm64mF-VpxS?W{Qwn4WG*(e@Cs;XTWoiFZGQta#tzzF^I}{u0hpbH>9cG&t$n +zy(Ym27=jPu4gWJ(Glu_plD_A<{^KvTzH<70(qC2;EuQGV=*YOTY7{=B;HZcPAAy&< +z!m9c-d3ur05ys6S#*K-NEXiYi3~}KcV!$wCbp$U(tCEhJi=%}z&o72E^nEMfbxQerNs-#}!_2h$*#~$j3 +z8ApuiCE&cS)-qQr#;o*T+LiUBzj$|S$)}OucR90{MF~Z672L-nOSc@7^~!EPrGF{E +z8ZD!b*h#J5FB1>E{C7&!{g?_w#4uDLA8N9p{rS5#Ktzvi44eK6nTo(r>MA +zl=!vamhxK~u7W3m+ex12kTC-p^8uH&3sokzQ{rmD)x+f^=e~xK18HYmw$G`97UHWH#v0$Tn}7RT +z*4B|5eH=LYy()^09OHLUeFU!*KP@cYqAGXT_h5Z&@h+ic*DTxEQzen<9`kA=S{Wf&I +zV*M;<0=cvh+Qft8MKmo+7JZiYBT~o2w$0dv4^x=fjISd7RLA)J3YQ+r)gwPvHhNS1 +zn;D7E>T-pNp|{7D{IRjHhO_#f7$S#m!-HR|x|*RH?m269=rXR%xeQ&wRs8rVx<@TQ +zzL#Zo`pLU%T*S`)M{TXXr_aN`n^h~e+4Hv#VTV3R93?o8$$Xzrje5G<0MB7)WBzt* +z$&1ia=rLq$tEng^4xx`5>xgMx-(BFy`1q}qLr$ceLzmJ;r5;@v!vpxuXKUw^Ze2wg +zr|z6ZGG`<08px&@u(CM=TEn-YiBqOb%V3J}uC`?sq+I_&*2akMU}rnN(g-pkncWb?_Pd?<{znRhsoc3cK<;b|qw;zvU2ge;u3htFf+vpN#oWmtDC$T-R&zJFeodpnvgIpe5^^+}v(@Eajc`B5TNG9hBs8 +z(Ginks%m^un=zf@yZABeV{bj-+U#rLgZFKK@h;ybR^88d=l9O^co%%dr%RFhVZ6d8 +zo8Ll_JT!3~*A(;3VQ3$|XbtN^SdW5!@n8zPKLMWLKa29m+;;0|w@dU4^`mKeW+&~E +zBbcOT6zi#Ez4_GN-Lt^M@Y~Pne9h41vB>7OZ5vH~$CR}~;go?Nkg4Y@!;~{kGe>ea +z;uDS#Z-pse8C9`1Wo>VuP6`|<~CxdCB8^%(W-z@+$8)__oMCz_fJ)Q_q1t=Feh$ +zX6iWN9c=VTeDYI_1N=YDA3b-=-1gMD+fU)s#bwMCTJ;vW^OV-_rPzdt-*);Xy5n{9 +z*b2%zc5dRgRpj?K&OF~W?Mw+bPxbG_`Vx0~H1p50pQ|R16W-x}fHPT7k$+9v5#|xk +zk(_5J@n`%_uZ&aStJa}u>)=2CF6SHUumn*Rr5RFRRTu=r`$ARrR-0LN0zb|q;5;; +z!u!fL;YZm`i*pR~l`{MKl9ryQ%sWLNie9%>!%O(e`nRv=HZ9HB-Lzy&C3-~GjL1B? +z){k>%>opl77f-!O900s+;2^)h^nZ6P`~M4cJ@~&%*T@Ia)%t&&uAEsoLD!pIx>kHt +zy80)6cjVNK*{nU8!P+9u@^4W5*0+(k2b*c*kG3I`jFp4eB5NX(73+NuG$NA??73@0 +zCfj^nWo^X$eq>V41zdn{0nhtXydtKyb)1qjy4GWhWZk*s&yHgcWSn~Q{k_a5?9P4>H#+xn?OZ>k_8s +zoImEm{Q~Por2NyAKg{|A<72G1SmMA;UvqJ;TYi5xYri@7NXibdM%RO%Ue?1|%98WY +zWkp|3S2imhF8ljZ(BwF0ZgnzV?u7=SxtueEZV#F01-Z@#W{GMQI(^SA^Boym(An%&`n=B^%dyXohf$Ip`G|+9!_4Fzi`V49Yi-{i~EPEE4&old7FHvUYNejp)cl+ +zIlzvds$Dgt*aF3Oga)c@?%`smp13afr9j0|Y6 +z@$p%sEO_e|U;R_8-}xYZf5VkM;kQ9fTzL2`_CypDJ1v&_tkseAE0&fPv_tO>6{zY7sG4vvP|!fR5x(j2_2X91Fij-0^=8Ie2MDVrr3%U$AFTuitMF +zpJ_Sz=o);3$-hHmpBk%{zRSLqVb{NY|8~XM_A2JbrXQj0UfRw;jym!(9=L(Fdyvi7 +zu<66nJ~F0wFL>-hZe;I63cEaMJ_(=QgDL%bgL+}{6XWw^;q}o|ZOo^K6}cSj-r4Gn +z09WCEG*CYmx>QgdVxBg#Dso +zcaLcN182qm17VPV`Y13e@%In8{n_c_qhl8E>3O+>pVLuKbg*_n;-=`-{-mu7eDBr_ +zat{G=5EJV;JlpNfvB_`gh>eJ1bH2y^;Hk1yW~*2^F^w8BV)*r=`(+*q`p7s9-{h=w +zcl7OS<`zoy8s^8?6UO{iVlHwP^;`8zk%u9p4qw$mj?pFPMX5i+I(w(?mZi@W3yt|ZZwANEn9+HcTzgovg&qs}4ZT)t5qO3C +z!Oj$Nwou;(I&JPR*7rWWw_or=U-ye#burd0bfRHjv966VE8q4rcH~>w{igV45x?r+ +zf|{i|54=NM2RteJFTg29N10<|)#be7{a$ryc5K71$99!?&pS$D>v=A8p8Jf2Ym(A; +zhdz_%aa-wkkaDNcRr39I;D;(*yVXSgo4%ZauQCUbK2JBgWf^&>v#&v$8ly~=6@jVc +zg;-2v<#3^1ldR8>xkC7Cr{9Vxz)m`7Y-+*yuXRdpE$hi{MwonCg5?uJEl*^gMn1 +zB7KY_H_YJ_HTVPLd5)#LhmX}l#|HR2Lf@r)4ew3#w)|c|2!1@wzC?*F&!rsn?=z~Q +zFZfSK-_tH{B?c6J%rWg|iAfuvu>oEZkH|NfKbS)vM0ha={)+D{ZFt`s;6)UCM*MRq +zuc`zOnO75=b6C&w__He+8zJSt$t+}#8}Ess$79$Jjn&9mqbJ$NyT)0c1z)63;)kXC +zNzc+BIX_a535&D#psB96l)ZekA7KqG=VE3Lzz4x!WHe;s|1f4mFHF@5Y9Z&|$l7As +z8qoVOSTjMJ-uid>y&4%C0;>Ty!V@j?b}=zCdYye+fAfZu^Gx3#KIA{!Z8 +z$JR(*!KM#8@l_h>m!1H1z%J6a^wCVbQ%V4Z_oV!=KXxo +zMZss;gYWqahu|aU5M>J;#m}(v>~a33um2e#_hI4Fg@6BVwc-z|4Q<(Smf&~(-PzB{ +zyXU0;tcyKbVYbz8MDKUdzQ|dF8Lp4>-oG#$i!QIYb3XMqt*_AY0u_9ddfuO|zjjLf +zwQhaZmrMPfUR~aM_0q31UvqFGk2GPInR{>3d}K{9bU>~p*TgwY&fb#0e{J%<)<2}~ +z_ovhqxPp&Ilc}(}Jb8L!x!(V4gNrFTmEV9A-$vi_JCVhQ9Xldp4!d)Ay6@n@mUbkr +zS5eMpo8ja#mS&Q#O6$Ae(+-Yt=)U3KojJA7@(he-59YP-G5z;k)Ax*|@RdT$HHf +z&bb((!@dO^)`JxYKV-gC+GwPWt@y0u$(T0~UB_ND$_ebP!2A?{Qm#vKkV3z;rQ_rC +zJHXx#K9WE7+LbnC@7zD~tzYxMFtJ<16I;WY5O>XL`Z}rfJ(;I&4B%r<-cLge5ZhnC +z+Azs=Lz{2WW)b}uA{G$5dGDUTR-BOEbsfMr{&U7RJUciWo+%x8lU3z=;FL`XQhg4N*RMZmB^xjza#zeJuE)G{oDy~ +zJ^3Z|fNrz5G9b|7XP?P>NgXCQcd3Ov&3EPGc@-8khO +zf&&w4G!1-jp_7(v+D1=35JqPj=(&+f@I@wx6ZAgQr|38M9__HN9u@tvjJRgFhli>AGz!t<9%_)5E^#4BB?`<^EU}Z9huB{Lvu43q`I>X!J1o +zR5@SQM(-X5m!06U)5WEWwjWYzdy09L_5k^E+8-fis0D{f?e=_d{x2|BwfvI)KZ=}W +zf%<3Nc0=zja(C^_$3}K!w`^o@$s5>_=b85wf2UR%`8##IX*Yji +zQCHb)_JF7Si>pGt>QWUT+u3)|b?@@~FU8RGJ?LVS`2x{C4QNpEIvI5~<5!t{NW5`Gb<@D^C1|{H^NYcVd@v +zCQ{SlEr*#e6?-6l|A*%AJ|qtKsI(byX;V306?pV%V?CVEM|{CL=u-?$ghtS#`L;zi +zzqK%#J}KxU^BzW1z3yX)?qe~1ls#o7iQV+`C3F!vQBA*3K)-j1#DqR`picwz@nfSW=;Q23m-T6XsNd_!2lE;U0~wNB9D8zO +zei=jLr)yaoQb#;1vcOql1&-f0I}z4nV|IeIX1gQ~P{a%=^yDG(dWv$Q7d9eqyla(p +z%3-Zvgx8_O$EiC)xiIGwIsBJB`9+EK(8faV%z2;Rb8+W3ru7S(Ce~6;Ju~gY`cp@L +z>fQca2A(OSqW2WBZeA2kQV;`E5I4jRN +z%eV{r8XOjj?X4%jS1){Qf{*RXESZz4U&a~d0pKiS4`cv1%Q)ja04zCkq@8&^Dbqw5 +zKV_OI~(kjeTD +z@jcRYr#DCEr=HHMP%ndepCfAIe;ek%s@ykBI+`;2#BVO;7Ny0dEJ#*&4@J$-zti+UVaze`Y8C +zn*KPk2y2R``K`w3cqIG@L0^$&nNt)#ePB7-^~!m^Yx@4o(JdL|U;?ZM@w1-PHz<9m +zhqo0?R#NLK=`{^-h4i!zcAZsOe#d!5KD +z7D$~abuEguc5hx-J1%3slaCp$@_E|=S>6S4q!yJ +z|IR*!Z_J#uCtH3)IeovJ;GdY1gPe{p2K-aVnCPJa{EK1e6pmgN3vZ6FZb((*^LR07 +zpIUIP_`H2#RTevSMEf>Xo=>mGXVXLsL|ZyP*d?(dJQTl5En^LoRgn{6{vExrZX+XpX<+oFgPK!Kqs86nl*7JED;lw=s|q2txdKUa4( +z^{!feUY*pFI>XedT&m=E*Q?!mB;B^alsZ>Y=V@zxPOq-NsqSj(UbTEa*U#0xZk?a= +z4DYiz>*y-*dPZff$lP36N1tOi0P{67yoFe+b<7`(2|eY!{ILUB&~hGosIy`xu0NNt +zIhWsGpYzip8CPpBi4E-h{lPGHG0a{9UxVFzfO(46pJR{NW3Yn#g2WXG#^t5|lliw> +z(2?@|4zw!4?q&ZkJ->l3SDg6tE64!)I9{O7N=&j&Zr1>39Ln0~VR&crzH2tmzo_T)g+{ +z@1wdePq^^*t&tqf!CyVOCOH5N1n$$o7^BZ>;j+=G`9Ju@ZxmiFG-Xap)=RU$FN@qn +z^|DbJx2EWJITw+*Fuq;;ddV~1Z=3R-yL{eKu=H6yr+6eij*}jmS@sIj$WC*CgY=z~`YZ?->X3JA}oF +z8NBoSvMTP6J?!MLFXR4rrQ8=Kdby8($=~7wwo|V#@fKq>gx*j2cVBnx0-5idY+H5P +zFUaq{Si--99WSp*qANxlp-G#}y>YK;|A*2tEiOsV{b*jiFgHfu_3tLnVeHG?r0CD@ +z!IKK`Rm2Iz&wI^Vg2`&G_dLh>7>p|!?+ehyq8}AHqK$JLx^7$U(C<~oD7+Y!^}AxD +zJsqTNWMSfKV)LNGzsPzWk%!WG`gfq6+*U}>GuZeeLifKzZ%eKd9j4FyWNz?M1AhJr +zUsUt#j;lvC-BN3kjmRl_VQ)2ZDl%~odsN#pWxk6xmd+z5UnFO~^$!8tCeI@>Y~y$B +z!ncFota((O7vfhSKcnrOd8_M1=f$q2jd2a;0l#(ob?3$&KZGo~4W(Go_}*-itT^z)^o`b%*979$HtW5 +z2h737u#Oa&+i@@)>me6$h_&?W)6={a8Qn@em|~ol1pV2xcTh1mTWYedrDx+Q8J}W@ +zhp_pjO)4fldo6ononSFB@DrRRC2%CiWH;3katHF~FkbDQ*4-sG`69~f=bY#P)?B|f +zoB1$)hfm%O%i5qG6{|e*#pkWfmHSL^Yy7{;yY{#!tMq^70wQXSf`~%#4u~m%0iuGJ +zc$opk051bxHfm=EW=P^bT)q5qKyoe9!pd50b4<&`b*t4(m)&K|Y`eKDnyf~bv8*h0 +zS2t5x&G~(w^S*<_NSEFHeSW_`e)IV}bKdv7=RD^*&v~BbJm>PBH&n3-eBDd?%P=0s +zJ0%FgD*?WX(x1-j7}iSqM0Aj>eWGN1oh=2lU3wkg)TK2teNssw=9ez^m)-?_7yFC& +z8ALc+kLGS%D08Tjwd`)Xch4pzzC(jHa_H{elMI@*7$ej7oF0OVk`AOewJju<-B^Dl +z{nb`x(s*|O*1<3q4QWk*kHc`5iyicSfOSN)>yQ)B3vYeB7_{;36R3Lz@NgZ2&723D +ziEG%x5wL|Jt>jO*`2NQctzY8$%5s0$zp&OzxOU3+&(Xv>P9P5N<8b?T5%!N^pGc}I +z^t1!?HhoZkM0!_ic?50X0%y{5ez*^{beBvWys_2hUAQgL0k3Tl#J< +z&U(ff*{h<&LA;;)zA**aFCDcj^lKw{Lh|g}Py6~=l*i;Rt~D|CD*B1F82|116!I@% +z?4gAZZi0`6b7J{<4h0z3;A~*558jBE%B6VPqeSPR(*0C?hu8(5JR(`KmqI?jF7}tN +zR~i&k`pfKC0$*N@ +z_{F|U3+@|+2UvUH9L62#@*o{7FuVN(5jE9^OO%$gE&Cso0 +zXK<6R)E5pj(hH;UZVmFMA`kl!9Ky~fF&XNp+bvtu`;$uxQT4^Bg0>EnM| +zddyv&)8X4uI_$~O0k;TRiI3lh|1+ewBK;QZzxfPf@=y8LT=E^@3-5BEUF^W|qxsPv +z{YUxHxBWZ$F&B7l1?WEzitmME?ZOuaeDYmR)WPusbs(Ol1IKca&g!SR390_@Np{(h +z*YpEeD7#p`m@Heb(!)L>$3kwyFl+%(_AXnA6qZLuL?=EA9e(?!DPGt4Bf}NW7UgX +zXJI$b%-mZCU(KXsd#jZJ^!@q4*cUM839Q=?Kl++iB>%y4R*J_K^;KrCa?V{Z$3x5O +zpyel*>BS?mQ(EviQh?2p+qwyS_UwTp`_ilJyz-L16e6!BytlkI^ZZz&LHnQ|hOO$2 +z!=v{MHqf`tJkPj&l=l))e)2~c+WuMW?fgD^ek|`Vee&}3$!UD;#gmt4f{m;aVUIj> +zwcM7YPa#@)I&lWS=JDuXdg7;e#mjw-Z~dr$RRol!KsS=;yEI!N=ic?<{jaGkh3D%- +zHZqa^W9+eH)ZYl>@qHHPhESVw0d4W*dW^lmbD9r9KSF(HjDUJLAd?|Te^fV-r+4b= +zd4I&vAJO%0@WmmgmvBgVc)#0M-{M7=XDx!t-`J#1Ig0wV7sREUKI(od`4iBYi0=t> +zA_NrU{$s=w?LqL(@5KG5T;|Y6G~deolud~1!g%T{q*KrypbInk{1^C@$Lj*z$bTrv +zkAEiAK2~Yd&9=ZAg?6D(8Xi7wyeRu70(#v^-SOawJYkGr^K0Tp8gx(6nn~1 +zP?ll`FZ{1?n{$Y44&?TbPMnB$ew3#-ArELdqy@hf=+m!)U!Vbd^DqYjI_*vASQcaB +z%SP>-{@KZ749&-1!)?t)THb4)lp55D$(1zP|fw47KjjnA9W +zr^82zp?la2!_&Nv4~qGwUcc>Hl-Lctd`_$3PYf!7uLomaFy=0YEW@~P6V`XIE`7cb +zp-#g(RO#ZLk$`1PT_R#0*91SU5rFqO@m&@12*#4@Q~>*D#j)rXG8Uqlka3buIYCWwKt}b`3r@{1eU#@>6`%!hXfjygJsHh7<~_ +z0R^H8>!m@hZ+s69CHM$>hky>gXZ-X1EKv#GMFG;8Usf}V3~Ubf3*3n3R9_=gl`!yB +z1b#Dsc%(3?V^Z;)cq&doJb=fGQatfgya(|B9xq7ogiqu=)pMRI!K)|$(IOxZm30DX +zyyJ<#6pwLqp2$=^YlPPzU*Fba-oKE>4ve4oS%dfDOc;wP7|tl9`eCjTGH4jDX&M0$ +z!kHA%3zWnAr~0&Q*Kp1UjXkIxXkMTIHiq7T7GYaVc%PMFp4~Ko(YYyAe&9i0`Fi<| +zK6H4>Y?RCNjJLhZW1#Pc%Ja^n#r#?%3*l{N0$*4-3nES_kh3;7RGrfqU@$by0;t1M;8!cP7`|pF>Yqck|sPi-)%~! +zHZX&xMzo8Tu`GJOu@QX5^?*k3wN@vrqWQQ-V7o|vOd(=&Bif+}?La(PrW|@2?{Gp_ +zf?Hoenm+m82kqp;=<#hM3*H6Y2pZl4JtFqIGiTH)6?mAAGoy%Z5%W5#W^oVd(|yE` +zX|ONJkorFM%wk@V^b`I~-e#0ba`P~7z?Nn0R5J}GCxSPDACWje(1>T$7D0%oI^g^e +zsVxxqxQc0#fD<-0_!;0);QF~wSxY*`RkTM|74XIgyImE=oNVyt&|@w5CmxGVrn0F_ +ztas&M&jZ$)fjBy~t5Bs#)?EnFgj(RUgy_d=LPD8!5&XKDiJKcJ@ +z-mqQW=4SD-9`#m&A9~0XrMH7-mV~(y%t@oa3D!fdeBu|;J`Ft^&f^=AUdKjo9ysK@ +zu(yvRe>eAIBwWBJ*-VC?VxaCa`P*bO!58%7VhYKnTSaFM_1pFx&H_CNdq(@LPQWe_ +z&raOV_U=RfLGw+Xe&qz-5p|)Dh{3q{1VZX(W}y%HZpn14SxILKPOnU6SAJ6yQ0J6oGK`YkjV~+M`3#bhg;FrUn@9i*LR1JgeWn(aC4OVp3?Vs*O=kpm#ZHeL+z*NTGT^R +zIA|ihfPejp3FVTk{}Z&*ULCT1VpmNv*+0@d+T+{)deZ4k$RF+7NmYfEY)ARrCbD4z +z$R<*m=*OUwz4sM)pBoPLvfxgs|Ms?%B%=>PM%!f>)k8)LA)^+wQHGa{T0Ale-Bf|z +z)b~~V+}VxjLrEV`s?_g7j<`NjyF^1D38x9qo`ddr>m$WQA}$JeNT&L^@QpBq{V?rY +z`~v3!JQ(oy`p>c7a%I4q>)&`RV8cnsUo-Ub3t2Bu9vhW>Qsvi5Wz$-&$1Z<|b9GS7 +zUOK1-ekJgeO~jn(5G(NDtfUyM>kiI17L}~Msy~tnJlG$V7uip$n?(ODoPLrUk{Ka}}JQN;a=$BoeI3e8Q|cZ61)Q+W2oOE +zo9&U6eJC>n?Xm^!vay%!N3SXbK2N`tj_c)+{dBYmeb-^9%=f-@hVprI#y20)s}8ms +z=>0y}sZw@ao6Nee)Z+~G&59P^Jvw9yX?}q0%OdE1{&2Ry +zjI|k(5dk(Mg7}U1LnH9rP&@eU@uyxvyJDW!FcI_amsMe{-g#h;_%|16oyYz9_|sn@ +z-=-$4MRu8!IX>Knu#gy9mvJg1dVG)0#kUMul*sljg6+c|J41V`{JsKww@~y4l-G{+ +zEXV6?&f<3_t`hHHd-oun09qPHpx*}njWYl3G_G`NSCLG@OXPlmT`6`e;1}4H_}&ci +zD`K(c=T%pt+YO&^6Z`{u&SJ?{v#R?s9_d^>V#simBi;e~yfie-;m-!3f1g7%_~JN= +z{)+N#f;}O8WS852hxHqTzG*v^VTm-)?#A5cD(nR?!TwWTk6%Ll045<4ol42i6~VjC +z#bHC*f2*jn6W-?({GE>WM1-KTy;Tkm%i-6GDp=|~dLQT#_~=_c^+o%D(+zwKdwLai +znm1@1LH3i!VZWh5km9J#$VXz}xtc-M1E`%QW?Q1-s!*l8jy}y@1d$X?8Puq5FGR72M{ztm3 +zU*zvaX~Z$np=o1O8aBo+R56CZ7HI)G5#vIUomZkiFbeGae$Yp0DIL+K1?U8%!I<|m +zdWNx@DxK}o(b$*pVhp7UX36LaJK(Rs(g-}{-|+NUpH<1@W(FR4r}e~Bf74gIoyzjU +z9VO#&Azmv+y=$$!1$#ef?}lF%(L{B86TB%Jd0+(H-zU5=;tS><<1f=n^hAQTZU=OT;-YX=z6}oDZEwF2L*k$i= +zEX~ulD~FYwhQ0B|Lw1Mo!~hSqp-1)^#?PV;4kvUK{^}e$8`YDRdHIgsX&m7Q={*5w5HCm*-I=qjM5L8ErXET9+ +z8TOw!!58A`H$L+xVjpn|7sg}gll$sh$v5)!t$Osc@JILP(I=0DOpz=^(%xu<#~>5` +zs$YcsL&%@{sdel8U#c6`Yh(Z$L-jiTZ`SKws#hQ5a*uySXV8F$Pbk1stvWpgy2-yG +zvFw_vDgb>DLp)nh&3ypKP~PK8mV)*?>^uG?d%)AisvZZm_6LR>B9Bz@rU(4YxIsCmG=KVayZ)O +zK3=|0_KEkT7v=asv;hJ9DTX-~hW8%Hfnx9_*{uM`HX99y10(__0`RUkn+BK-_)qf# +z1s565za4K9Qk>&SDST_~PYVzEq&wqtuX$X;Bg&yg4xf?359M&hmr^=i_PBVWbdrgW0M%_(>j;p1QzHX4M5zakrZkI-D(v8 +zVJz+mkA{UKy#x=fT)C32x3{*oE@eS(2A;A3fc`%aHf3rAJl8O!xe0(gBXO-!YM_S; +z+yX4GT7eMOGXNps(g1=10RY0U0R#gAs4ROxDB)xFfuSaZ4!Uky`GkmPnE(y&2LnO@ +zx3i%vobFMMn#!Cq&>4y_06^(UCg>T@hmi1Q0;nu16EfCJ<;UWghbD&Sd5D`0ARMgW +z(h|_r9FO=U0O4Tv%;vedx?F%>4(a-T9NeudLr*Nf`OYcN2mHNpbv~o|2-qk`b)tGE +z;oiw~=;frkf-c?`#2exZ@ru$=ojh?=U*aFtk9ZIuKPTMNFrfB85w4ltEduNS=XCiQ +zi`a@K#=WY$@uN6=SDJv*P+BLYr+CK-01F@!<&d2e2>Js8nTpa;e%R^-^gJFw;k=BQ=>*i?Y`@Mx=9U~3aF8_=-<>rj +z?$(=q!?9z>Mpp|~o2|koOcHF>=7r|!h56Bzdj;)O!D6oIxz}p7fvlpYQmD5T*I0$h +z+Je&JLZQUENHCXMgzDPDTANiUDmC9HA>+w&trR<-GR(@G9mu5n8Rf+_g3VeZOckOn +zv4RwtQ(>|4h(KmA*WVb~E34Te%+{q%65<=88vDXyDJMB1!Hp3BOL +z>Ka@p@Ob$q5jTNsn$27&P(@;eB3$ygN>E`m7nYV7d-7Av!W&{Lug3&3T}4Grf?%+g +zTFuo~A+Na1I!TDGjuq;xw(8=Fa=Hm*(`RRAbCwA?nTrEiVtm5HxcCWi35hImY*G@l +zmYWMotww6HSy^a1ulpi%aVcVmGeW7gyk?<eW-SIZD|c;B#=ph +zQczrzX0h0K!$n(g2cmeRQ~lFQZD@)`LN#x8p^S5)&|F?#LG8`uCXktt9sIQx)uLvV +zwhCEZh{b3|h(v=dVRRYDfXgUJRi7CuYPlHo&LiOlaVQ7H-&P|OSb?4w2K0nhs!e5a +zIW?{%H9VKGr#vD@!Y)6)&Q7ybPc5(cBu41EC4p?d!Dz_HHs)sJ3B}c3XBCw%TB=sn_y5wm??Blgl_~r01l0 +z9s`wxmKQ8!7z`fcYb2S-pzb3R{XnTz$VCSvx5Y)s}eZ1KL)ytx|tWLYG}(w&dArt7~-G5{D;wVujiQAd5vWV76oz +zn7L_`(!-v|a!Ha^q?)QG@gsXyT6%_o%_uY9XBEn8%LHpfq19?Z`#~Y2tBui?NqVyG +zQi5qxKVT!pE#_H37!rCB706~*2t~!{;;G9q)Rx2PNZ{Il7c@BCAaYVc>9_=A0rZ4R +ze=H<-+_>xafeiQYV+)GQ=_0{%k;pIf3yUlB7FAN`PgS7K7ksU$u%QNA#Vbm9?}P!j +z29As#z6|!|yP4?urP0rGb3Md_ORt~M^OK_=<3CLwKPdqQF*J_p<44a$(D8r$qd_&z +zOT+?bo&sw%+}9gA_%U}7c$86jjcr*ijq3x}NZ~zlxa(2rexN+>z`m01fkOIu-M=MF +z69UCGQ~r=ME4i{ull`a8j?7z~YcsYT%uW0C*uCP#7uU_Jy)xhM*6z^zm$e-) +ze__Y^!oiOG`-1J^i#D(R=)V?kc((H3I%AD%xAy7zZLVk5?AY9r;wX4>iamPOs?{eS +zHEh`0^!d7?6$`q?{PFLdr+zoVx&5`qgZJ-jJ{z}Voa@ZCuP?r|<=!jhj>pOp-oMRs +z?$EWmogd9uVmqFlKmJcw=3UqyDZcjSCv)oF!BH9i*f{9&#c5$}SI&nlc3+q<^@M)% +z)z8<*wV#R;9yn8PYD#jJ>EnklVN-uow=ZS;ycM^F=TDD1kfR=J6A#4vWzfSz8dz4y +zrjUTJkg&HSf+nv~Y?(02@4tkB0q?{e9N4dIZNtmEbC(u7G*ut(=&0>ly{@FxKELAC +zb-@M74M&UGJJW6+iG^xs|lNPMbu^RI=jf)~3F +zYM-C!bZyFVZEe4Lwx})oO7!lv7f=57j<)R&KfU|@HEE79%P;OY^^0#-zx2y=d-<<^ +zwJz?lmWkucPcbCs=Kbn;PK*!mfsUO}gUOo0Vr@HuO2M?6lyH=Pcc22h>USx|Oyt40s +zd(JjhpLXf%=j|9c>xAQAR`TvO(;jV`rF(coz&%sfy}jV1{o%Q}tFz`j8x|ZrCgiC0 +z99tJVebD^Tx;V{*Z-tJ;*a>S>H%!i*JgP2S)w1NHewk&@2D(kgoBk<=YI1Up2S1U& +zet6Wp{9A6Si$1@1$;od`Wm_-*)l_u#u&Djin&bN7_xYPo513c*_uXM}e^rE>IdY7> +z^l`^rwES#8_=rgQ3ss)JWIzSz~iHlp)^bt5jOtlV+s@*_28+Zy+~7C-n)$BKK$?wJ0w +zOKs{rarc4Q8S9#6{$qpwuG?3$>Cf2r>9q&fELrEAwQN@BK-=Z6gLU6sd3fPn7qdzq +zcLkV7o_*W;)sl6Ce_l6#=r2scq48x$!^h{WRW^ya{`vDX1J2}k+&m}b*@<6-8ONm# +z3cqtD`)JZ?Vg1NSarwe$lSAY3CLABLC}it_KZh0V8#XBVJqJ7a*7L&V&LMFHhu@v7 +z{bcC`SJ%EJFMU>5SN`Qorns*|%g+4mmYnV9TE+V>RL>jJ{YL(&@A@Bn?V&$9>sH^_ +zIo^J#>q7Ic;MsFez2azp$$!TK+dpZW`ohB9SD!0e*Y^7lHZ0zw +zTAlLhF8k$IMA;lD{b?kLpF^?}c`ry|!)7VG=Q$~SdW#e;d|nFAy(ooC<@DLD(!GT2 +z#{a8wI$^7n&LxLVPd*$5!+-xF9XFQTJLdc7@T59)R-!Lc4l&~~)AQ{AV>kzMxc?1L +CP? +Date: Thu, 8 Feb 2018 06:54:00 +0100 +Subject: [PATCH] rk3328: add ddr v1.12 and bl31 v1.39 + +--- + rk33/rk3328_bl31_v1.39.bin | Bin 0 -> 802363 bytes + rk33/rk3328_ddr_786MHz_v1.12.bin | Bin 0 -> 25196 bytes + 2 files changed, 0 insertions(+), 0 deletions(-) + create mode 100644 rk33/rk3328_bl31_v1.39.bin + create mode 100644 rk33/rk3328_ddr_786MHz_v1.12.bin + +diff --git a/rk33/rk3328_bl31_v1.39.bin b/rk33/rk3328_bl31_v1.39.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..4ca992c1fb565772da83f00c48a6b9931f36af6b +GIT binary patch +literal 802363 +zcmeFae|%NdneV^$K8FyJs38eI3`q7#Q1NIjh94%@nwd@r;GK}^c{gPBOl~(j +z8m*3gQ+m}AW2_!iI^)Po4WT22qz_zGR%-gPar2o}znM7W$f<>)Bkn}>zX6`qNIf?dIm$2dV0cU +z#~^>T)69U^5a($f3e+EnDrqaiDR>KfE)_@59wUAbZgt* +z(&|Fb*i|nmiTJV72g}CB_m4P)J#`l)?PaBEns{OwX +z_NP7?_a4%nIsbXwg=Ydh9h2(+`9)^OF~{t90GuM5#w|0(_9Ck{A2zEK`};yGUl^Na +zua1mK3;X#_Pb)Yr4J5tD`pplH<_SZ8wio%_=EM24lN+Dhb24PSx0hLa-VRw&$=JW0 +zI`vSsNi_|I%A+yoaHVaki`4gTFKgU$a^u0res${96upl*2P*&1nCF*xR-J>;iA^`l +zsH0A8a4d7|G@&t>lN%2__8-+zJz=yCi#j5?I$}ycvkqsrw~aa+<7UkI +z8D*wqTCMXjby&2cE8mXd(K;wQ+76|!IHMhXpY*;!9n~f7aCfeJhw|0cdcOz1NU7_$ +zsnjwRWBX<<7`EG^b#|Qf(RFq!{meSk^SmbNj8JEu=Yz_ZtFxT;ChnS1COp^Krgo<> +zJ5tnTliz|LL!15~m!{`(^5tbg*ysB;->*ZZ&^FnAwaA~x+@47K!ZYwlUG7~BZ#I3C +z$D>;L9>2`TLpEBl_5YfQOka4oq0qF#&vL!* +zF6aHWx!#c8`?7f8F~``$k}XJhb1yIzA19;DlPLQUGTNc^56REv-iZs$4lwfj(3C7V +z{2$3?$CQtz-L3R9X{Y9UgQ7h(M|-9z`;TZ>PycAzF{PhL+syZVF4`qo+M=7qDLZB( +zV`RPiyivN5G2`i=($AzjaJlz5be&Q&GER+IoH6Kztla#=i0&y5yP1k`s_ETwGyE<( +zXkD2pTUTHvu3Iy0S*KmzGDKevhAN`ANtF#S2kq!E6ElB2_0TYVs&ZrV3_WGl`gzLC +z#NLm|1Dz&6Ps~hwB9})p{cgECd~)MczD_y0@y8?ly_XE_dH2t3bfoEdFJ$+`7`u$6 +zdCbSr$>{M7w&P7lk4fGv$rXP|x86I5>_rCZJ>%AStzhxa-FNNp+-zDW*xB|Bgvxt5 +zsXx~?cq;Gt8{!K0p@)T)-kFw2okFE|@&1JZC2(eJU>l! +zHj+LRn&ijdrG08=zKwc+)gMny$?KjA!D=vMq7Cny(`tCPhk6=5IHxr(I{X>aUYVaO +z=1|XK{#3RKJ)!yUB6vIv3-c+@M&CqcUg??C6`n0QhK_W~yYN+Is#;vpt>_$~iw@aq +zjPZUvhOe)YcP)RaTl{{Szdzyczx#Qf+*1W6`T2J)eLW#$mLp?PwZ)i@e&<;4@hOzo +zv*u&rrnC!46F)_yfO;F5 +z*KO!kQ%3Zx)z$tyZcb+FkbX1h*fYnl<|y&5F`O!h4G$RexK-$87$R{F +z5FZ0qdS8MM@?hIApM>pU;o%H?>c~LIiRyVK@34Fy=x|HDxK@ +zggF^h|KA+Kwo#ui-qv(f{a~fn#w@kpw8GDF)$v>M&jh0{Z?&g=`P8X-!fP-Tj=ty9 +z$?7U!M`6qP`pUQG?4I9;LOqwmON=p6&b*O`nHx?}SHs?OT3-k2f$mZ-ykgynt?0CY +z(9~!>`7{=fh9>t6Wo>?q!DtFRt7e(M?L+6tR%yG+v=$<-pCG?vv45)B(P^7E7zY|l +zd%@+I)BOgKv0XE^DHa*kN?Q +zTgc?{RI!`+6m3zRD2$4iVxc21HS)*$>7~V?BX#C#Y}dLY&)Mj4@Kc+=L7RI&s?F(; +zH*|ik&G8A|@tIlup?>&7$1Jb3G8_Lg?z_3zl6-u3sNH@oUX72BN!VedE4O_jTu0d%=r><*{sLt$u8F +z$Nwely-z$29yW9sm%{_0b9-K-d_?jVn%1+9cdhUsUao>a&Q}@0eaTe-rVP87ALwe0B8+$4WgoH*ALI6`J9(eK*{)kp8)vIqIjm +zIjVP$c$NH{#pAqw_|=$ec}TBO31Spyf=`?$P5&f8BtemXQXuB=pPy~gWN^(p!7)Y5wDEVIG1 +z?RmS^<@qt{ujZZVkEKh!#uYUuROaNyzu#l}LjR;Tx*P#zf-EGcxW2#;lXmfw?1!T@bU$EASMrP0T{uNo2J_U!lzHX3R +zv7*46Og{KLWW`t4EAQvQjJ6+gkn8zo+;9atrW~6~@{Phh)Kz17JLua~fyvOWrq3Y1 +zqB}5_ZpCj~~`}O|<{q%*%(%JMY`R^rv)d$X7YR74F)Vmn~e9Sx8yw +zImK0 +zhAHjbsd1Sdn@{esKlh!cd>_06=2qW5O~`)FK|8(nz$emc<3qjuDdwZULr+S!JI-d# +zeZI&W5AC?^)>ldY)iwLIw#wqzyT{tv_JECFE&>hF7p5^|LCfk{0G(mlK%QgOs_@YnLJ3CRMw +zc@ll~FxYo956FhChW^>4h0p^FiO*bJQ->Yptu&#Q9_+vvZLA?(G$c}z^Umq<`dd+Ss(9^%X*izx3L){Z?Z-6&*H;?>zVv8pVl{s +zc6N=@gKqZgQa?OTJvNx%Lin>Y_@EIx;?yU;;*6#LC;a&SO4CyTPn|{Z1YLB1-%fP8 +z-_Eq^qF&9B_>3N!Aeo@gM*2<|UXa5O8~t7|{4@9;i{ahy{tenAeI}e9_&`3+Gq8b| +zJRjB>*tlcbdpyV2Kn{QL^*hp}$HtE{I}|RW{{JxszjpHG>;6;T=b!VkDOo{x?#Szc +z6=R;ixN$TcdoSB}&|@s@V9oFlw#Wl9ccRC5@$F(~o5h+b)g;=;+o;bL86|%DnEcms +zJbQj#?#sO^z%DP>Mq|UB?TL;xeQH@`Q^7LFIK|SX=7G+evb>M_e%?kOy@RbZBwd2O +zz}D&6%^LENDQ5U6bUT>uG{+hT4 +zeE~i3Pt4H|5N2_E3NtR%^dx%7Fc0*h|HaGLKb!gY73RQ|jCYrQ-iE!Pb)1bZ*%~kL +zOeodA@=Ej8f=%w%Q}iu*!&_8pc0H3?x&I|It|fwgQJ&-`vn$0M?0~K6)YuR`)fEbx +zf1-|_wmS2c(h3XELDcaY7~Gm#nAz=Ku)UKy7LOwxe%j#W^>8*1wEC0qF@ZXYN+#?o +zBwRAl&8)PnmIVCBPK<0S+!Z(0_Aqmz=y#fNZyco^@zseFF8q|ki-GSd>KH`VJ$+rp +zvS-Y=;#X7Q%mwhV)hwL2kbHex7mnBieOtqs7<6yL{$GWSKZt$#3iCAl`0^tDtsHM* +zcsjo%yz3Esw7tf(3?g&d6A&&=iP>e~%lu;f;c@U0fsY3GXvYqL*9Wt*@ub!T4@kDn +zccyyX=a}K=9J8aF^-zB7M*7O}sh#Wngmi~CYHVi9{{5cU!NAv{j7!;Dz1X0d`+IB5 +z@b8he-V5bp4E4MnD(Jb*n9F5*W1CjEvbEg3YpX2NVhYXjvGGFiGh^O6ydN7c98Z3* +z$d|XyGRt2ApEzxr1#M@bbL5?iju;!)y1fh; +zj?~y<&ZuyxHz%w8@d7i9KW12VKsR*^h9=_&sOVXW?ogX-`jb9yO7pHU!aBIxy!9A7 +z61J`;%+^moExxmkIil3bt#$qvI#s%F+XS;iGN9+@(SPzirRggJ&C*=@4di*B`oGQl +z6NE1nnH};ys7wp*WWPV`w_k0a3z4%Um#!MZB0|<5%)ehx(59y;^D6B< +z3SL8$!M>+lVKjmbB|RZuW8RJjkEUBTX4f*e5$5%5)mP3wa;8nxfF0FAU)C7*Ji@Lg +zd*V!+=%ey5CLcGZ;RV?Vc^x{|_bh)}IesDeyWYkxgio}m0$VG^o~X6q&i(7O_P_R_ +zrqr)`*CNL)nqS0sH&|jP-Z144rylC2{qN-XSwP+hHry8S3+tIHn)i2N8_{3OYj{?_ +z`QvQGbT86Z>HW3}oyr*VvGM(9ANDb8oV_>A4A)85!sol->)?Z7{dsIhb(xpCY0in4 +z{%h!n_?pPPq_CV&II7*UlUNsd|9rN4+<}kN=IN62ydl|tOV4A>PxCq%^TJham@~C} +z`?{FrA*WuR4&xx&a^loOFOinI>CO{c8xDk~^t?CC9q~ux{p6z4{mx%Dp{Kp>FYa5* +zT$t%1-o>*O9`nqadL$j+T_YH_gP(;Sl-@DW(R%|OzbxtE#|&)gKY-ql|J8ERYc1&0 +zzGLRGg_*pac1aOq6+H5EL|b(7^hKu=`!TEEp4>Btjo$}N>9~k{h1XC2(&zJ#-$OCz +zq|ukvkA*YOG7i${%)D+iVSl`qrH{f3e58oypG`sbIYN28%ht7Lk7YP#;HLd`>|;se +zEkUV3}5Nd98dm4&JPm;?Ug3FC)J8|&IWr>`=Coo!4w +z8s`00-leF^O|3k!Fm=-j!(5kgO*H;=)qd=vDU|KEO4ChMr+6L$BODL-rV;?7G<>)WgcwARv`HHgk1V*XkU&aXh{k@#%y;l-=!R-t3JY^&KG +z$Db4jrW_9YpYjHWL%>Y3rQPUF*325JdyP?mic=N +zrPv3^Y6loS(pTm+f>Vc$+^wFrtj2ud2D7Pqmks|fheFXLW$&R5=Ckd)@ms`7S;s9k +zZ{4$-e#F*tKKT3%gY=0x)^LOH9^7L4{gIX5tc@w%#DeTt_KX8_40-{3Ao_ds=rf#Q +zNg*Gd1*`>Wk4;_e@Z4T~xH4kwsPIzzBAkP0G?AhX@^+9bJ!X)h;|s$;*Y*4t;N%DxKzeegO2 +zkJ4$Qb5nMI(lmDTpWK+)Bi$ldQ9CEWf6DFf_k#X#u^HArz;Oy;h&=Pi3-vzfSm +zi{-6fvtj=Z=A!npz851Q>ssmDh?!h`Gwo1XBWVft{@U$GQDRNq{>*jZ-Y(tcwe6YUH7{^g6Yd8Hfi +zG1t){HhL!Y#)?DT#Hiwoai%eO0&Ed)y>^VjD +zio}V*&@}9vDLt3Mx8_XgRr$rXAoC9Ls&g5x3GEW*S(&nX?8n?poV{w7FZ +zv86KhiLFi5%-ixu51OTy$FS$S;9cX*-=|wT$14{`2g|&+$)~x75Ma#q4-@h +zmP!6XE<8FlJ2}Jo06fe_bwroPF&%$gIYtG3*gC=Gqx=4*UqS +z{G6b1f(#xS;!n0s#Id|s+VXCCq&^eT&(B##qIMcKGuYQR$ZL>wYs?(1cy>PSZnA_=F0T1$Y&?>SOU_c| +zss6~1I!ESlr5XA(g`L#SpF#F4{-g)Z`pPolo3~+nSxrqBi`>QZ!Vsv +zr!l8-rLm@QMZ3M{-<6LS9fK_SI);85M;{pKb)c&`svCJ8VC+bS%y;H_A;~cB-80@x +zcj)~erf1)ax3T3LbMN2Iy-%I-K9PI>2JctV$8*qy)YG&MT{WOOUDk`pgYcDKA06{x +z2>z^RI*(iUAd+h$`;}((W#f&UYa9$kqLC|0mqo6`wpwWRw_l&tP5AuZun&*7mayeO*}d#egW}I#>At<=ZuM8ij7HI`|+>4gog;@ +zguf&-guhToeS@L2FB3ynR(A3{NYCf%^JOYmmo@M=SsBamX1R=`cy=9-uRpQ-Yh^0q +z((diFTVq#s=5@3$3%twAg8HDHeCh*>HguRQezK?Hm%15qWvMT77IjMJ$E!&T7iQDo +z%TJ4vHZ_+9PJY@2q?KmNw$oNWZ3by2IeMhUE3uEDna`J^?yMc0wTq2;tjVP<9VPHZ +zzQ!@neme8 +zN$f|?J|ts<$e5wrY|2f4@6r-(n**4dM@F&36b}JZfKO +zX|6tIeml?Oyvz>S)7T3=gSq)F;?#O({d|vdW#{r<`to%B{KOvVR9kZ^I$3p9qYE0g +zan6;#mW|=Bud(IWXBnPL{mcPcKW6Z$s_sJuz2O`hhyBaCc;H;G5u0CgwdQGj_9M@8 +zr!psThCy{P{>oI3*;KkrGV?C{{+>VCfQ{2x8xd;Vv@cfgy-;wur~Yv91-!>R)Mig< +zIYB$(_<7Wx518vUFD39MXNk +z7(b7}J`?7$<0Aug*k)N@j%ccXvS-JhdCY9P-22fq=4WjDbK#GD_9-@N;Rw&&C%$`J +zXJDFbdwY!iu$8p=P3mFI&3;_QKd%*%zcFX~jr2?I?8$0;a@7;e<25E!+@|wx_zA0S +zHmzaiwL+dd}?7+vJOUWAA-kM?DDc7nbq@^R$z8FDg7Sm-^w|DJ%5ut +z|7uSu`=MDpUugwydL+-gtY_Z${pcn-m45r;17_mJIOiu*X5t|2O4(D3yXN3qL+?Iv +zIbqn;;!n(IJbjIR>6+sXKXN(eH$q@_YW)1T?PlDKb^E7|H(swjwZ$RbY^W+znFN12 +zclZc%kb&3t>`<-7-V}JHZA~|0Po&`Q1$(@ojyz<>NhVUJ^{JP8n{GdGYPm2NV11YG +zqY?Xk%=r*sp1>%DO{Vj92PivO-d>5XGwOnc_;I1_EHx8{s8>4JNwe0(R;f1WwSIi> +z8S%a|;)l+N515HInJ^AogObeBkoueBePFWi&Nf(o&$f`bt(IueW4o+ +z7_^mU_Z1i8-ydQe$I@4DHY9o4*%0*1UTe9PnF@yf^9n07iD!K7d*jbvovFIcw6b_x +zJ|I2NcZFvdD`)ZErd-S&=fxIt#st5M&YZ=cAD1b}(J|j^%xHb<(_Cu#x^~pw8nr#Y +z{`aY-#j^kD*S3P}{^5 +znrYVW#Ib9ayQ0~bqd8!;rYH~Z%NzQ#G}G|l({wHB;92EZ2c`Z8ItV$IPU^Gk<{RSH +zmTX!Fp~X9!KiM~9^G1lrB#(urY-Y*SW$4Z_eB({+tkWW!>}k!Vrp#qsBEAiJMq@=Z +z^3Tb->keyen99A2TtfLVarw{KJK@}+ndUl+4mT5~IMd`3I)#0e7QW#@)|Y0JHI2Vz +zSs8m`vKU9{9|*rU7WpW4!lr7IPbUdl!|o +z>gjUTfMU(TZN7m}yuh9WIuc-X{ICqIpdhdK>vOPB5>pSRp|5Cd+6PfL1CS7SV +zQ$wb#*S1;+n?zH(*1C?hF_<8~8I^JBvURGg@>DHlev4;yN5pkA)ha{WCSCd8Lr*&^ +zvSm_dbN-~j>{_jICoJ?()^B6+d>DF(Zp(|ujQ45w5ma_N`ER|#&Ad@iyenQ1%e;iV +zu5RZ%Q&B8~hcffI#scrc61RTUfdbE-gwAU(@DgR{>}TA}?MoUn>~l{{-sfgk?{qUs +z_BWI0)nxeU=$3O$CV4&YZ*0sY-3iee#$2+gG4rq+iq_y0P8@VIx11fzL?~ZFUnQP! +zGmj7wzoEz2#gR?L%NARO#gUt*E-U;J>6A-8iH|M3AR37mM%$s6c+}0*Q2y5@K0nb7 +z4=?gwG$^Bd8sC2Uznz|5IL=HAQ7%ijFuDyK+Tp1kEMBj+b|s*(KrmqfRcH)>*;q!W&Yeqv>6z6T!UT}65gJ`p|p +z^x!S&hNClgK#O;xm&6Y|^ZqRDt)}Q&r6=R09dk3Gf3*BMYhHFU_mMvHx4C>O3)WlX +zMbR~)QJAH_6<)SDq3Fy*l>I08cwY6uE8kQlKOpq^pq~_mOKVk+&-4G5tk4#GlgX{) +zYeT=I><6QKuVQa>%Tnl`$kv|>FN}tsB~L|TCQ?ct`*i*Oo9Ooe{bjvkWze-ZC|*;D +ze>nG?08i`JR%S70ZzM-+tnuD0jpM!BMFUwHm7{BXIVzZh-vU{?9eMhk9m~`-B11WO +z`l@A$Z%4+yK;Qf6^ked-#>~Id$G3mBG4nfQ$4{>yy}2<{GnEk8OCWpV`F3HA?1@L> +zH(ZSDC6T?P-%k^wwvT5l=b~R343lqFdniDblYuCB@43OP+suUg5G| +z(#8-nmcU+0z6r*@oEab6q$!3+YuSN_6;*u^6N&Fu%Q6G~x-OP1o(MIz4a;tGoyA$EYX!19s?TjF6 +zjp&KQ`_zYg>5M}SWfFfJjf<|o&W*#v3zQ|F-^WUa_hkPWX`+e#Nc7Mzf +z9(Yl`$sc6-XaSFl!`DVFFp_Wmuj!izGR)p{Ch^D7ay7_sVkwxtpDiaH(T+SMCXd0b +zYz%I0DB11W!O*L%`!BmGNTo|0UV@0VvmA3D-$5qP+Ux_r6) +zCH;?VUDRkr6JQrXXVCw}39!9r+;!0sZ1wvmWO=*aI;;48%f41}aZ#isdM`L!1a0++ +z#-QJ);>njS#>qFKp}g=ALB?+Xs%TQLRdVg;kQcqXU+<8iM)k|_QJM4UzUkxO%Xd~* +zpnjlazA^zf`d7bNy~c@+R7i*!`D=ua8E?mDXMa-FD?e{``7q^YzSE;{SW# +za1mqW8f0osQDX)?Zb>3u){rFFH9=ivQU{ +zZ~ecLslqXOG50LJD49y!+L%e4v@)kSC#E@i3-i(e=JTTkp +z43btuS~7laZ4GHpF;8h8)10QcYz=dkWfgdZ%;Vv=R@N<{%}c<9vmKd*6KBi`zg1Ni +zMh?aeuH2xxOmokdOQ+2lH(0e{RY@%Kl}+|CrM*%(Luqxlf6L9ZFn8U;e07aMA6mu5 +z;}5Lde~~q=_ZAZeBq>uIpYsh?KjMkx2Lh&*uRrab}u^AtdLxUuQlW77xEAA +zE$fAoDwTi3?YpzGa^WPSc%7jSomFnVF*9nNRi-}P=Vs2I?S4_T##Kz8bN+1e#W?e; +zA1^U;&X1e=F6>zK)1#J|7k|AmW05!ha-*NeILQ8Q8?jTZ;)U>}wuMXBhef7*dx3dd +zW6E(%)RYuOWdq3$dw)wwttp(ceNq^I+mca#S)Vm^zP@$&I(WzL=6nrnWW^JAvxeNv +z`jY*FM2D+$yl>o&4Il3?!{^d(#=(wuS*O3+dwhUD+1l0oS@CR|YdF6|obu5D%Umv+ +zJE_CnXohvJMe)Xs?D4c^>uB7Pt>YTx#NDE_RMRZ#ai-xj)H-x}s=qw_wIYbI#A1D9Vwr2i=wu%q6RrJz-I5qdQddjGW +z`hCp$P38*DN9at1{~d)nuU2P6U&7Bk5Heo;Rx>OgalHRr&-`}NgYpY&50E`V_J5~F +zKLbzkTh(^sUBUT=cP`HUzaM`zm;a2o)-|WSKO=6&o$>yR_`lQ^X5!JT +zU4IZfjr{HG`Ab&#R-(3u{!NWdV|``l>(laW;Cp8BSd??rCS=IE85vi;OFoXa`4H`@ +z>7{F-eL4^L9mdk$0qyqB*)J)wf@fe +zyYjx2lN+DOoju??Lv*TqR{6CbV}Z3F=kVEU(3!zF>pz_p8G_FtttG*l{rr~4z`tr? +zN$c(S=(?$2`&vV+0jpU9>ir(pfHrGDzYO1_eVaV_cA=Z5jrC#Yd9c7!bw5JgY4*fa +zum7DnXUDBeY|c!Kp5@Dz8Ck<}#wcyw|8KPo7sT>sBekM9Jn66OWJzHuP5G= +zjo+bo6Y(3f@y{uKqsgp?MkDtn*eT|s{s~?Ub#yYugkdLoxAU`{%jmG`9qJV3#-#dd +z3eENo+sFszpLtC_?q(Kjwd!?#K<`&U^I^(2ldqj~CVsxX=B?NG+!G1d54{)$2leZat|c>9PjqnXX;<)oKBcJG@c&iJFJW7+l!Gcv;NNy$7dJH +z|Iu_Eaddw46XdHdw6`DS3;{B?T|R!v#Y#eh97t9cgSmLtHzw_4+Eh(@+H>t`W-mj$ +zzDypS&9WGmk(52HVU}qX-;$N{X%}@@%p}aW_ki|Ap#7gJPka6Hgk#J1p@*8OyK%Z( +ze>MJ-C8cite?^vE&gOrHGw9b>xb?BAZv8=Y@&Ve_g^k%9IZ$cAC*Qx#TR9HfZ&GLF +zcr(8E6>O-VZdkSd5uUrSThfsOJ3lX7cLKe;E9FL9J!zH~9~VTZ`{0Q#=YScQ$>gF;_>Z +zF?S`QOXw16%q=9;m|IM!F?SuI#@t-)NTB@47>nB;-@Q+9m-1fpRuGEb&4i*CCltL^ +zgrc{aQ1m`WD0<5YY2OrRjL;kidu3zi63$GHoP~8#zMu3Y-#mV3|AT!g9Mn5>Mm2>E +zqCFU$<$2GTy(jp4n=xJw?voh@@5Qe4rvBJWm`DE!JIXBogI$Kr>*lF2auDbsVZAVS{wTUUpHT`lnu*VGMDqb>={jA&uD7T +zRg=t){8^zcWCDJg=JVHSPikqW&v`eIb40BgHxbe+n8zIFNaZ{JJndiyb1ultDU!X> +zSN%Na+sfA@7$eeGQ<--RXNe3xeDU=>=R;Dv`97C9q4V00IsUh)saiMljZ2|R9nYdWQj^`xL$;eag%9|>>Qtpo`xV#O +zYrb21Nb|Bi58I2jus7KA1pRQQ&7Sal?5^mz*0!Biruk7Ta}737Z>*pdocd)C_1;)0 +zpMSrfzNV-(&hxKndv8aHeE9wM>Urnctp|8c^Jiwa@6>mCz26VFZiBBr>WlxCl_@68 +z@E$pc9wl@*t2IdbBJNe5vpQa9Z3-__-zLZ#@3t~2=AiZ_+Q%M(>+_td^!FF2uYvso +z*?$eZgU0f9&ckVK;_sWVHdEV;sjR&P+c^9s>VMT_j-qqY6|A4JpH1O;%i_O5FO;O3 +z+TJvohc}0&rMash`JHnnCN4lfD7@5Ul7&xKCZdG3Ce!Ayw?RB!$@`f*ng-ZAQW@p- +z(`S(WzqT}uO%lXXZh8rMeunok?2B7(GMQ(= +z$e6As-Ib(w*ZA@7CY!V9ifb$wv%Bfw#o2hu!7h2A!*ADk>U;f;jwY9S9)&Mc_|wYx +zXVJNm4f-->OtIP^ey@SfBHn8*Y9?>B(^1*H)?~DYbnEBo4`?l>oZ3C!MUHL-8_M3c +z2LA6BUe8pnWNue`dz%Vdo9{9iVZ}IU>SApXA#a2{dHNCPCpH`3m*vY}hsjvf(M|qG +z@X5681dqZ4mA7;==W&kLkiTuVX^r0lPt+g34@}`F>7*)Cl!H$QhauIX!^B +zEcDC9ALTvwX4s6K)88|;pdIhw{Vd))XTA?--+!O?}B +zixbyAp7hr1l4t>{J#l9tT-SR4QQ-t&Z(hEr!9nFI&LXAt8Q2NOsY)AjZ-vmec +zxs7oux!6r#NjBOlO=hbvBYl;L0@-BPOhw4VW9>}|bkA1y7?poj88Va4cQ)^bwvLf6 +z%1$N?eKkm#QMn_12I=O>vX|KZyB)sUUu*aIve045Hx8bX)G6AI_A}MT)ma{uHUL(U +z!k<)1b{d%5BFt^losIarB)|E(40)7qBu^9?4%5KKPqd7fx4QW_{QR(;ro@2=5?ThfYRhnrUn@_Qu%Di4%$rz6@Zp@_}O%6CUqPG)Q(H7dM_K8=usrkk%)&?5!CY}i!pyfcTw>s3C +zOtn|CpP3Q;WIk<)$@ucj*=f{yC6a8k)e)`0;XzWiwj$F>*j^;Vw +z>#NkXRFmddmpk1)^loA{Z2@hTeih%z`)GGgf84ef{_aADU^legO?{~?mGL#KX+Dph +zD4JBAS)_9*>VFp25hD%P4W-`CRNk_&ufzKtcl +zl!k`%P=t3Q{oezix}GUzjt%*RZita&(~RZ75newXS^4^Nh;4gs`^uBymyKFI_sNfW9wvf)&b?o +z=`7{@evk>9zsUB7RlB%G0xsUqYSJs4-KK0~?F#=zOULkB9Y +zgLjfo(T<}BQ|LIQzcx0#8rg@}mkf3WI$$MX;e-Q~3wdrQ{ZuJ>-f6E~UB+0rfVC-W +z(p#g9gG(6?wI*}#ChSmjlON8`+TwgW>z{*Be??}eDnnr2FcV$2(JYVu#?3@#nH!9m +zUaP(uppHH0vIXd^2;bT~asm3Eb6~RLWS0uJ9*trCwv%@WyvZJES%iMHid&@9+{pII +z_!YEc32o2mFtsz8YiFBm7}+oAuNeCb%~xgZIOz!KNZ}*>D4ix*ixFRmZ!*T1l&uzH +zOpe-jypt{lpRB&x?b}`de{|JC_*iuhb;HA|`?C7Uf(Pj%_3kl0h^W9xR!k3(JeZUHNYB&c4sD@uc5U@E1qFy68i# +z4P)@|<(!;1{{Vj=bEnGQ^7Cw2-?l;rimuXq`TRcbkb%?Eekj{*+_Zh_Bl5|v^7B3c +zZ!d_JnHc{!laZ};=aXOp--#F5OXCbtUQgb@zKHas1&=oCKdt>fRW_<8r6a3S*pcYT +z!6}`Uz0q*%YQ}UQ`8(7ubYg@xRlJt^z@i!bBUx+v4c{3_f1y7+@U!S!Y=`{KtVKG= +zC;g$df@EB@q@!HL^K_sqIw^2UijMSPPDhD`O}c0t%+c`cri{`>%P-6K3C+-3rt&?d +zt>Ph`~nn@=^PCk9z~-gN24!CLu(_^5X})9*yE09M9=eS2)Ab8nWG_E;=|-Ha21D! +zXpYc8*Xo;>fqebQlwW_YteYz&G?o5(e7@#i1v6a9Q$U8Ki}w-ahE(j2C`8i}jEh|>M@h1qpi>PBpN +zXnZ`sl^?_J^c=s_a{Nxu@~e9XNBEsqYu?8$LnnnFc%Z3(`AK8>=}>y@t;|yzzYl|T +zcCPzrr9U<%XXiT2h0^t!{}O*hXAySs&6wt^^Ub7U>0Z&=%6e3KTC`T3jV_yEGLP`Q +z5W4XEr*hQ=(22?}{wa2G0e0&> +zmB~w`TYg$uCA*lgxrllQZ=@3}3bxWDaEK<3v(6ce@1oTM){0(xc +zzVzjF5%U%EhUTj{^2J@w%i=S#cG6heyLk!gSuh;cg9j_)P4Gi|PD{IqH1j=w?qRQP +zndYBRO{z&a3cn<_WAd~3eMp-K4zw52c0%&Dz?+L8W?!}j7Wn`1|LiZ79-ZJ0v*PP=>yJaVHD|IcIaIkXCt(;9^ +zp7YD%!_eC9DfCq$#$3VLM))MY3I5O&7V)*{m5ZbN32!VPXkq +z?|i%79$8DNF10hh$jW5b025dP+*=v{LAI~uSMYW9lUj3{X)fn7R7Nr&z7kK6k9gt* +zd|>E2;k6IGlqWk+Li-t$d5yfcy@<>;!B;c5-OAq@<}}f`5uQJ5F@GMcyz?e2a~Ed- +z|8M-Nck^xenQIVye7;|G8)M@XcOYqg9fxeJW`4aL**nFzq~{Zt9G{?g0-PPEPsWLYcN@eve_vC6VUfKK1gjR#^^jXUG;)`{77ER5aF3+Ob%X%TsvuO5y +zzqAz{*`MN1ep&fm5Aw`C+w#3W5TmY0pYdjHh;Q)yt@r@t50M_1?%j&dE@nC_S25>F +zzq;u3S=6ERgu}D)r4?>teL)y2oLXC+)4|fq(!G9&&ei%O7M@ZoKX44cr1XC*Jk{5y +zF*C*2r!h0RR<^Q9`}1-1UVNL)uVQ24V~^wCH262Q&hNy|UQPQ_GtCW!6+GV+SSLODeb5<+{x$9-RK;9EB9^j%}LSF*8W$W0#CkQcedgD#<*zw_sA39N4+w* +zwZH8+>D(36w>rMRVDddp@y%A|0_kx4w22GIw|w%l`1^$DdHE{((DCvUKRWr*UFpf` +zUC$K$eCMs`VngWri&x*Ia2uZ%B~B#cHtY@DIdxpI5&nlD~5d3RJfUo +zOI_xgpI0Vl?%RbgW@nofYDuANLiN>8i +zk^O@kS{Yr*_`?M0Stl0JLOtSkR7u$t>=M8`;yJ|^5{I6&Vgwk&(xt``F6xIF6$$6$XZ>LNu8PY +zxuQ%y-{Ak^`&z@?mdlgB%fzSUmtT?@80>1&*tEzq^3A2bFU`fx=a!6o|EY3=j6)}V +z7QZvHfVG;NvBI+5kvlz?NI#vP#|~r9!-K^*LVo=7Wy*7Mqpnkmj)$Dgi#!dC_<7|bn(f6OWc*}2I|r~Oj2rSk!#AH`+%z)Y{NFzKg+JajW+I#u +zHJmRPBERa5l)4YbIFl3tXLmzlzr{Prdz^hZb4l*|X8OW;9C=5#IFA?kvV3ymKkOMe +z)tUYFn!R($s_wT){$L5VFn8N=wl%ewb2}#O%aX>X;=Wvgsrmb?yhtVoPIWXn-+E-N +z{C+Mr%EC{6v&r0YPt(Gyl@|8zj# +z*g1Q6Mj!TDcD^m_**}4ffL4OKbZ+q|ejD*Wl%=-@J;e8Yrln71k$GpR>PVV7?bolJ +zdPp_{KL7r{XS)BYARLwXxw_ZIFsL&qWm +zO;yCx_$dY?2kCL%PfEBintIaPxnJ~t&T_y{`fF~zaH%S^TN8X^nBL{qqX){W9Q>>F +z*C3cCnB%5XuId-ryFSo&$!o{Ep5FW-XdhR1oLDIbRL +ziDDC4z_-ujDB;Tos)F$g!MruJ{GG**h6FaQE0={1Hv|$D)98%Ns-qJJj47S +zW4!s8$Is&aoBW+GqrV+x!gWXVn-J{vywyd!{Jh7;dw)*`RcDv +zJ)|=yV6;zlR_pg}uA7kk9SHQ2!JcemUn7orS_^ZkA94xAIL!*svG0o{KC4!URSZRo9w6?>7? +zrJTVj@41Asdavimz@?saz=foJi+1#j9{J7v#a=aO|7^HFw)yJeKJN7M(-)R_(@9sF +zF%2*L9b+y3oowVy|J>CfCq8aCJ172lPh{r7O7S5bGY=ee#!Y8-xKBR%Hhp{;y{o={ +zihfO3voEVV{x*kpC1Z29i?4On7klf9LfhkK*cg+a#OS&c)mh$-SG%hFfTDZ{#n8 +zO>CI=BQst0Jxo;RX0q)ZJ&&xm-HyDZx$kN!{a4KyTbDlNk2RjTVI_RbVqVgHU7}B0 +z4&fv1H`J%IN?Kpqj1%3_u6ys*x8Db2h1I!q-M1!PlJD~@5C5>|Wy<3x8~v6a%!RRK +zo5xqKpRx7;ZD%jKU$)5(aNQD4m95)s?P_1M?gTQoPkp2N{eJ;{{dNF6&-=!jIVbd8 +z`zXd)J*RWbYA1a3%l9L?I`hdoYnSkg&>qevoyhX`(fIczVrpO1+!G +zzwyvjN1PS$6Qkp@cTdBZ{(FjY$nUXy`53miU%u}g?>frIDDSR_j4A)*$Cs!7ZRrKo +zZ_e?qqE3tw+t*y^t!pmwbk`Z@?B3W0&g<++&$a!r;VsGUY4xry +z^M>Sm{?0`7+C;B}dfPUex1QzxR`v5_&M)uip6S_|2hqjS9gOK?>;8E4;X?Ahx3k7yYK4Z{lD3G*fLZ9+U4GhYR2W%x?J^^Ulf-IA5o4+;va37x&Q`bVC<+mZp*Y2>0Xa?E2ZoW{2h-)l&_PkeRyOf_}_YE{juF +zgm1t(KM-Y>EsHU}8mRYv+Ww87N9rQjFuH#fTiFvPUHq1c<|fI2SyAD=$33b)x`n%D +z#(Xo7KZ7WJST$?f+L3#7r4vI1Jqc)YzHvtlbR6AFo66pm8wca~n7GS)WyZuCiMw{H +zU-Oz@znSupchbg-AN22}O;7ATUZgs}_$BTz?BgyIjTx04{j +znA;>Pi*!c}IG-j1zn$bAWNjHKne3Uq$=-Hw*4X)L|4#kUd#SY^kqyO}R^6BH&s8Ji +z=+FeOnzdnsJBW=l-Mbqa^JP=Ve7R|Q!8T=^NVB;MejwdmW*fUGg`W+-Q`D3$Jlu%? +z$=}~7(Aogsk(ohXPV&>Z?<87{KWW*9>1BTj|IPePR*HNfH{IV34g4%+D(gTe$?qMc +z&^uw%-XE@f^tf>Prs5&uQ`5&o#KYs;`*-uq_trfR?=+IXc~16sZ(8-<;Vfho{-8$s +zSN^hY&e0E|Z#xPkhm(4`ziNiX-kSn@5HrYbw?u1HK$?y +zujhI(d3A{ +z#oFC+=O=c$!_I~RzWr%$>YDoKTGl1pt2h0~6fm@~e;P_Q98XF1&1Cu;e+GSodg{kF +zxYJCWexz~Yl}85JI-3Sg{*B5OHIf!5pBbEfqd?FAE4}l5?M1`*KZZY~i=6YknC8>n+-*EC-CGS!eIus3wqNGHRs$^)UNp=aU|$UW +zyN()c(n(S7MtU%?&01}_-9G%P3prhGpsa+xy83Rm{+*({c(fL +zDNW-ce)1H*Eu?$BCq-YQ?0UY_aj^&5C6{r_y9(J;JVHJC7NYZ0{Fd;T_e**2*EN-U +zwy}Bh_1y#yvNiMb%cyNRic{X-^LunGcS`lV%i4vp8T~tRV!ryX8C;U@oabrYnxE6* +z9ZLJwjM2Woj^6=J)p(WQHVLfKYB%i^FQzmrPd+VdjpWlaJbr^=icP-tn>QVfnNNB< +zxaVm{tuU?V3HdyiNB_PVy}g1v_W0I7`)g_DH`y@?MJq3N$wJ5L);uB}oElHRe|sl3 +z!!_{x4Z_b5=KBx1ejML`&zI(Q;V&C?1-N!n-&C+w{5w1gcj5n1j-Q8=20vA1YKvk0 +zDq8}2J}>q;wClH39{0~qQThAF(7JaFtzYD5ZOzkCyK*!-L}R_<{WUc5_~m)5nrbeS +z9QToz{BzZQn?1^8Dx$lLr|e@c$=^gCJS>?IjzW!~4q0x9_9xZ2DPuBfDTKnm-8pbbG#*rQh=n +zLdmR;A?cwgaO`P2FhTg{iJ+_=&GX*=Ly-J6>Z53F>5AX|T+ +zs_(dC%zY{B|E!*V>M@7Djr+gz_{4~>Q*B_~63xp#N@@56vajDIc#n0%>&!dCJ0&^J +z*IV%sdc&OWRqMA!mtMfUI@7xep1CWHam;<9tVyi{bw}!{|3FCV6y1wo9;Mwoeq`f2 +zA>PjOF!czR@;j`0tpVt-e)kUUTBUzZYd?BK?dSL6*vFCFPVI5%YsFo#6|d(?KfteO +zD^H#mjOZQba{uak$d2EpoSw+%TT1yhCv+sA|GVVZokZey7i(9)4DC;omLD@eCq1A4 +z3G$DXpJD%7nrCv~y^hW^`TkGI_Te{Uv>rpA{V~*0jXdwYz|;Cu?bduG`Ld}uFIVTn +z=i98k{WaUbv?J2-@q$Ie%=eE=ue*erzm%T?P&;&<0b9tYuemU}e%7eYQlF(~dcP~w +zZ}Tjo4BxyX!)l-SObAQ*MDmlLo4AJ(o2PfrSpB1UIGKui&9YlwkD>=J^8N*y%6G7{ +zw~2Mg8s!;;59z!ZZHmowhnYwBjir-Zc(HeoG40bZbG@HJ!-W?cJm8@$Z=+ez5N*+n +zKr3>IJ4_o-r!@dA$)(Q^ck4n+?aI@T-KO$d_kRLemyb*HP@7%R645##H%|NLC%$=} +z$bEmU5!V00Lg#x<6* +z8~=DC=_Y=O_h6yyno(JizVZ23-$);DuLAO5!>ie}>9BCz?PJOBk<;I-yS8sl8*c%7 +z8}c`-NBzbgCn&uR(Q5$mUTBqgvS^V+a2ZvNwlKDw> +z#dCFpG$%vj7S?vX`0ZYYhP$C=zw)NYljIvny;mKgGlI2mXPM|fF-P*dGg10+@5B5> +zpdaR2)kx_$%m#i}hIVWPj|ene>d^0|Y7agl`h1s~FxK{%zM)-xeqFH- +z#r)-m>#cf)Y7ai!e%~L!e0E8*FdqHQPOa4?1L!{PVYhnnzuoy5JXRI+En9Z%9Ad6L +zge)9Nx}WemF3b0I)SE$HGvDvkU6ftu;&c6WOxcb;*sFUZv5Wfalb3imJ&dfvXQv%{ +z=^IX+p90Hll(M~cQcJGiT#nqbGJu$&zjd8 +zM88^`QAmw9^$&ATVi)p>96itsP03IpvYFubLth1tM($1lr-_3_{07hJNZm_oYU)-p +zcRxmd@p~=Nr`IIwhW>bJUI~69VRgWE>#ZDa(!plE#r^M}^j<=aSAmE6H_f-cUFtLX +z$fiBWbiYwwgiOm(=*GzN)S7r*wXwG^pl@R2@$cjtv%Wv`_ctwk3Ju7j3)a|7{hHfWgdI4!agD=_hqMiK>JJa$Myo37< +z{=Jg)1GYuaPobOlCEMhuar0D<>KF=j_}`7{S-k4oOh3K6qf*~qp6SD5?C+J_$Zpi{ +zv*3H#p4VlX&*y;oKJxsKKm8WUTiQVWNPAJyL@~63b#Ie +zHot8U;(pU2zKw4!&+_c(Q_PT`&XEt~S_4(i)Sefr&_-!V_O +z(XO*pFZ-r_FRt64E@LmU&aF>T?{m~UR!&CkudJRgeT9CJuR(pXcl5WePmcKp7+!j$ +zQ?qLx#xgdI=Fef-G>mg=7V8eybyM(#gi7mVAW|n+{Cw+{xIjj~AGFgWn}lz*#qZ62!k~@&3*NGaPR=-uhMl +z?eL88X2%!LHp2tkb|3tcljAS13RS%!ogd*hyQ?>FW~L0-|)^IB+R=f2a|w~X_B%%!9H_2x^xgSY1Nt24)Y +z2L3cpIN^d}3p)tjAD8?$mR^TXW?F4yX$kj7`|GR6{d}aGaAmDSdVa1~`iQ;28g>xh +zP=qpFgz9e#9ofKGyaw4kjhEGzda*TmUM}(;h8Og}h#hir;}d&?V}9)Y9rZjt}x +zmd^J5z>-C+t?slf@1J?M8o+r{97Klm@GU*D(?^8NZ) +z`5V34ap2pd_*wVvk=;(JZzJ#1=tf-vwHRC5tK0jY}vOniXQuFbNGsie+Z2u5MXl78nRO?wUfWTAf?*4ur5IQ4is)ab8oT;|vaX_7sSr3&IY +z&%i#yJbpVj+U@f-DVnaaysv|a?|TYO;l8EGJxY6u`uq6iUp%YNPyaospXV?;qd(}2 +z1z-~&XXeUYR6p=7Gc?P4^qs13Oo!Pke#&^W$fq!>b~3){BY#{pbG|isqRyKDuh<7o +z%5!P1Y#zIAJp9=XqbEeSPqevv11A+VFYXo8Q{;o`jdtJ*@2dN9p@X_vZ!nxxnN><#8TJ`M+O0 +zGNbDPBx9eQ}p0eLII|{$EKJB+nSh!1W7Ns@U97t$J~caPR2FY`N7k}d2Q#zyw{t-d?n%rBt- +zB%?{^Cza1oFW(KU8Q}La&kr5DJe2yIChpg}?_m=vju7&Dnyq|ub|3fLF2`0pv^74@ +z+rnMi==zc0#kwB-r~Y~tEW`Zv)l8nhL7KiFJco5V_SueSi0d~GL#h2`qTM!^bFi!% +ze46PG)9i$ney{8^lzW5l215N#xMX=NA^Q;i?}QJN?gIRMAJUvw3EtCK*Zi39tJFJ;o_iH~y1%84_c!u)Q|Oc4 +z#x0k4-(gH{W8V@tM<(dJ{3$1Kmp!`|P}=ASJ7 +z|JZvQxG1kPZ}^;<0R}`J5ET*S9>fHRAAn!P7?}Z$lK6puiOt6j!!QbpfCDHdCJty5 +zTf5s#YHMn;E1IMcw!3SyNh58#l8-j+rf)aV;&%J&vq6)zX>3zt(ngvO-v4#Zxrdnn +zO?LOUzrN4&p4;E;xzD+-bFSBm4(fimx>S9yI(EPjvZPtnTDgJI?-X!$9 +zjtLVFxKQq*1?>9yMfe>pob4M}*Gz}5N3rkr_Z@FqWb@jUh_d_T5`y;_>LpDLxl#Tu+Qhdqu>5bT7m2ITF9~B&C!7 +zq)Ti*H|7z!6he#l*CT>cJxKjHTqgafc8 +z%rkr5JqKTlJwW&r>3{J1`M%lKVV^?nKEOhqz=PU==2p4n?@_k16YYXIqZj#c#ywaA +zKYa{o7Np@keGtCm>1^zcb<+G3{l5g?a|s&u8arX*+3@Kl2+1ea;Qez!!@krp@RzXt +z75F<)dDu^Ru!hRZj4UTz@*0t8lSP^nz7)RdX^t|TY(gRF$57|U`PcAT+8iH;e=mO{ +z#&N3K`{*|`4{<^+`h>s+eL>7^d;_*n3BAWr6^F4hKJ*UOVU&l)Dzx9z40&7>!gmw4 +z6sKo%T%q@rmc`0JT}H_1iwo7z`yM366(4#vRu1w+$w53;4%MRsHu5z!zW4?bLUblW +zbFo=!9PvGB54U#>&J&y;CqQ08=xNBa?cQ_7yQQ|>xzv3I`iZ$-7zZ29(dqn)_y^)c +z^!L`N&(>_oX{Xus-LQ>tjvc>%%&|3u|nw(|2KyY_JM*fNHF%tFexzb-KAGr8PXsD8P5bVcW(U +zgX#ucgnl(*{g4!*Ib#}p!~*npp*N)`kBP3EF*Yac+4Sx`i=9 +z|Gx|N2b}UK|Mjn9Z34V-zskzTg@!PXaU$IT%q;Mu^n8rw1n@D|oACE{a+C4<$nd{? +z`5_;EOPSiB9&-Rj?=s>H?3eg`GfKmJEaq<&MepI7e>;-?*5sd{%aa(7X{~q}bGSj+ +z&qtWge2904@X^)5G{}2$u?v5Do8={7ZfBtU6~JrA5^kRdYp{Os;dkxELvNyg?S=f% +z5Apk^3_9a`yhm7&;qNF-I6!q?guIwLgfXtccY8jTGK_IM-Yx5z5c(Qn4B3ZquFM_q +z$M`0|g7WE^%6Wy#NBBJz4k6qJxp9y=km?$IJT>l-pn?7{3HF|YFau#O!s!TSv%zm> +zvcZSb+2A+Q*x+FY8@vT&lfI<;Khp2;x{hPc#Kw4LVBa5qA4s$jy+66??jkS!&YJqW +z*rX%rbQFG{?E8h8sL#oi5Z*7GJjoG1xC8BHLAeJ}E|r0Absu3yMyO*;%}MTDo92foO@_X6=9OciIt +zMBlFXzKif4?6K`aUuj4G-eF;b^cy0?^J+{P$MAJEm2nudh+eJAcmg4t4N9@>2 +zf4`H~2jgOFp5`S-Fn??T26S%5fyac^{1Jw7+y6tX52eqbcZT8jXkVWG?i9&+8}o0| +zFLtJb{%UHptyE74;k$nE_t(tz8tLFd*%U_hz5B!&Gs~mCWPwg4=ttJw)<>ufTd)VO +z+EM6op61!r6NN4{bu}k3o~3%QhJ`NDH{krvmp*A&mxm|fy|gKzx2O-p-l=Zc3M+Fg +zz~7V0=SiPtsn4ehQ&XRi&}VpTqV-4`u)(`8 +zJ@b`r)OKmR(&$Q4srMDBm=h&lkE>=31n>u69PU@WXxpe-882eb>XJMUpp?j6isY>S=&>8PWpQLjW@<$ybFjjkG7~kpahcN#3RrIyM7n*aFY#IlF +zG408b3@7@KIhQOU+P_bZ?mq)*p^2m`Z0-&0r=uGD~7My3C +z!+0wCEHJ?D#vHE1T=QwHqpO4bk*plHy#ezS)`!1AhCJ*}o)X-WT}1OR_>9orPlukN +zGaS6*RuBYV@Sj_Xh9L7J_*H4kFGcO!(q66b<$EpSZ$o$CT;}J{tqXh5{S@xyA==CB +z!q|QAsl3oYd@%JW#_wZTPd^j5F7z1I#*br-`ov1Cv2S66Pp$*+9r$+GgE<_|EZJo2 +z#T~>qFq2qSbrSG}pR!!^6iu+P*GeAb>pdIU_O~ZuU5`1u593_T@ocQ=v(CD~$50>I +ze=J5nS&h1Iyq9wH4y<8uu5uLPbhg1#jzN|OXHS1e^rbk*y?F0KM^OhWu<63yIO}sB +zn8aLzG*`H4-q}~m8|?iCyZqfQti%3jo%G7Lfu$SgK=f|PJ)c$PRrKitHo>uM0rmz$ +z7<>=X`TkY)yFyu$Q8(m&hFeId$vwA1r%A9OD!0!v@c;wX2F}dxQ#SD5#ghFuutZ+^ +z`vT&3%+NPe_N%sqkE=R{c0G!AwOB4Ma-m(xhUiT3E1*$3^1kc?)P`N)JBRfd@pi!m +zEHO4<04D|;AUh@-pz{%DpK-u|-n5T@#e8W0E94WuyNBP-r@v(vx&=B@hza$|)gGaxuQ$!yZ=cZrfD6YjNTkOHOFtqb%imVDMq~ONY~EymWX1)@Ji*jtZaHg7+$c +z`@ptb!2sw9{?M1wpO}_9GltW{$$y*INe09}XzO +z-5+zGq=vn~j(6 +z1a5?Rw4aMSH?;Q9`&RP2Rs6>JMfzs(aqQDPhdC=@_Bi%h7;viwz7!YpHsBk?cSrPn +zi@EMQ2O5LVApe;S{V^{JJ?6u_0`H#VOy^J+d~Md!@=LIBfsffAeLtU%??TbX>lR>t +z^STh>ot0d5=_tw~OtWmaUh2TJQ#^0Hbl;(rJ6hik3D`+z?$F${KExHC2JpLfBkg^m +zonz9kLHadEk{zSvqcr2v_5JMfu7`|EQ$#ybdr~^i0p24&B=UjB$?Bfs;Gy{Y*6BU; +zUDJ4+2aiv7{o{ajd=KU}heTQI?x)PMsx6+gm%w|TXwcEVksbWhn%YC>rIh~fDjjEe +z2eWY#k5%#f5s*=4x5;3nDcAYU5ha-EEA! +zzYV^b(xE3?if`DB1>0Sy4~^+T%o$uKWPPbj+8gJYu7_A=`$I;$>j0%ypFee)_uYT` +z`8i#eEDevIegWsLEzpT%=u0D@5zq)|1T+E~0gZr0KqH_L&r_tFJLv-GVo&^DlLK-++}0c``? +z2DA-m8_+hOZ9ve`vs(*3*_zb>Q*6;~e|!6AyGSS8s8jb$b_MRmE)S_G*M4 +z!`eSIG&K1LW4->4agJl{ZI@jv>+BaTY$KJ$Q5Hj4jPahMnXcX}#JceQ8}{_XoEnb^p;bru*{d`51xMF)X?PDA$#Sk%lcQ~euDAP5R1DI;Q6oN`OST<%l!y{KQwgc60rXiW%OA+XI&`6p2ND6X7ldk1(xn{ORe2+ +zgPsLUiN>laoZioEZ15cN0Lj7Xk9afDCoz`x8GQLfPX-^=;cC3>GA}1O%1D8kCn_s=5e=F|f{H6VK%27^h +zQU5=%qW*7?{PmE9I}dzg`ilBzpTD7h4eq&b+|a)c_g@mvImoJ93R&QJzNmjc((Z)q +z+>g+~I#1_cJas9B?K@q7Fu_*T|Lca0XNGL-JvZ#<_)nMhXK~l10rac*v)r-j$3^{R +zKP~G2GSYV-e>~denxFIX+zeOmtUOn5p2gMMjPwMHJ@jTjcPu75V~$sju%!14ly^Pi +zwtwZ#1(Xi^TZnMqS)M-!;U8gR|BCP|?su%ydtU7xI%FjqhpoA|=dAZ{Z4M)o9UvQh +zAM{h87lIBOc@O=&ioL`0y$Qk7HuMz>`u?ZZ2|Xo@JxzXu^0;9W2K<4^AAFnVpGyj! +zzKl9>;U}_2@Kpbr=ex%SPye2HlF653oxKU=^nu^S*)ybPN`wvrZ-L(tJpBgv`;z(P +zPpwHkB>N)x62KRPJ{E^-Q0i5D_EW1v(9tIyZ@tSM=-;O;Xj|*2M^0M@PF*Tt)}$lo +z%YCR{$G(!wPQ;6uWvh2+s4CdSUZb+JS+L?1d>Hvq{;_BO^Fu=mExY;tqX>zf_3@GY +z6n=8gsqXhHPj#dI!sq@F?PP(T-$PgpEZ?`X9@(GyD+B0P??B&bi}BhypYaOZ<-zwW +zpFjS|J={*nLki$MpW!i>>`;o+EhP10DYYWhJ^`v$zv; +zS@(GKg?!xOUA%ieLh2VOIhJm-ZzRpOcANbpd4a9l>?7lr#&wq)Mg1YzzGHcOcNzM~ +z7Tk%s3EgASN5)kb^^YyGcaKN^$j3e2mDpVX-o(Bll%Ldn9s1;I++*^`bdN>YhJ(dn#Z-UMMjS3>Wp(0eLmuY%s-t)}wJpf}3L +zosx4i^agKVI&{4SdS^oKOz^LU-kH!l6Z~tScP8}Cgubr9l*-J0(s>|(b)O&4!{gX! +zW87zrZL%B}%5is-FMe}!3C6_I?zgX9j`4B@#><;9UarI#S%xw4W{i=yV2oUiF>(#Y +z$hF;{u3Xoh;!f|sxN=oDja~1-w#fIt_W&EbwAVFwapn5%)RgJ{4%c*yhtvDtf**JT +zJm~v_Lwosa?^m+!Kit8)KlE9;2e(?gKWedce{xS;_q%FLnoxds_r#6&bWg6{-94r5 +z-tMW*_jONe-ve1(^sTpG*T2H^^T#nRSlH7q{e(NH&%SAm>lu&m@t^SWu?Sy(uK5!A +zJQ^!+!nhiDe&6Y!{fCEb55_&h`dH|d9}FFO!v3Sf{-L2~FmXtG1ARJ}<|?X2pMD9n +zPoPgV^PHvhI6KB=2YW4;^TWd|+4WFXE_<((eAJ^XL}i@>e;mpo{(>a*?4)V>Q^Y|Aaq9GfBL1Dc>bH{r=;6Hl>2Kue~RY=&|?O>q2IT<{7ff& +zM~U&`Vb1u0QX6}Xu^C@B?i+)?XgPrS(uK$1GpG+zdtNoq-T#F=JM5#%dC|(A{+X3I +zem0RE7_cVxPJLD@kyS_gg=_L*p%E>Q1^F>GB +z?O!r}nBj2#Fr$no=3Ub;wlc-}LWZaZ&pLZ^A`9(dNf#PE8LG-c8I(@tP#s@3UdXtP +zC*<7%-G0qdw)UX@v$*5J%?N3}6Q}@m(78`~61x285uJ`RI^!S?F +z>Nk1(joz9DzsRQ2n?dl@*0;2RTHjdT8qE(vI74lqeuqEMGS3^>HVr1A(^YR*yFj@a`I|fDuea +zu@S2jbckeYY}*FpJ_pl{HyZhbn1>*!Z)!A<;I1fL<*8V4t7m0d>8*vVZ0$|!mKeC) +z6>AJ6?I<)P8V2E7?`^2R+h3bx;u{6IXb=ge*SEE?X=j7KcC&xD&Jpy@{#H-3zp=Ky +zaq}?U)4Ho!wW?WueT!#P{dU#hwN!vCUp0_y>WFetq^F5YK*4PCxA=W+0l%lE83p>9 +z8aLH%Ml>RyqBl3!ds;T*_P4e*3o-+?R9p*MA-4?=&8-1X>n!k7YQWO~n#)j3ljCJ%4n< +z+Dc(s^L$O)wly`*6G8=YrW$M-v>AuHt=8WFLu9S>+x!94iTVy*P0cNa6Xs%EbB&RU +z$ed-qhOM4$ZRn(wJS#fAwth!!GBvR*bceU0%`eGen1obGpBM2A_1b`~vDDZA0Ol8Z +z*0?ts^Ng^3$RW)4DB(&P4%0?xDM_Pi3Jfd@*#?h~HEn_;Z1Vsvi7 +z+kBonZ)0tPKOn%ueYL5RGvgkAyU*X;if&8BB+K*oTH8OP%oPnf;6n;QBXgkziAx=G}Q +zKT2X@ChBceO)3|ZCeXqjVM7bLE83#f@2@qemB{I;YB(eKYMPo_iDqo`wrpKu%!IoL +zmmlzNMvw6aC_lQO0eOZ((%9s!Z-`+BP^R8SOPv=Pw)wX;1$IU7iewLxMPDjx_QK_~ +zz)9s+u5wqb@RYk(u8{p`gS(gJkWq1;{JUgIfQJ-;A|YZNRrogsHx5vU(M_9D9!q{uzCD?F!^Ui>$wuwefc-&1a +z;NMPct#VMDXJ$8zSg7B;4Z5rHT7{RRW}rTf0jSDTS>>);!76T%ZBl+)g-pq9^#-WJ +zh|*_~wTE-9yXhvC%an&Y_%K|w26ick@bO>s>guu_cS-{geR1B +zfnS`6l?Sd@Rrsa~TPMkM+hiF&sKN#5GM=eIhYEj@CeuY>`0u5dxS4K-(q&V%V=81z +zN=X}=mWK6%xN2(y$~K~XQn<&>Y*}KoHA>U0H7eJX8oBxHGaK4xMfA$id59(4`D^`~ +zyyW~zUhSq9;RkcC!~i?>1c2og83Ijh7^$zyLQVde49dE%D2EjBwxQ3q_!~BP0{%?_ +ze@opJxn&<4#*rAWfaCJz6#~op+Ax|Upqkl|G~8WU>YF_+JACZ?%S~@DEBIB)vtz%y +z|J~Mm0z17JPh_8H0*4$ko7&VU%osW3Fge2KMCfHS!r#_!Yi{swgXJ4FyTnwGdbHDM +z_BPi0qH9rA=NF#4rBw(t>RY6zcfwOInc1GioVhLD9W+@ot}*i4H(g;^GABGxaGn@7 +zHqo%Oc3o9j=?V-tH^W%^Zbdi4 +zSo*z+Zicb+X^L)!vGfi_H^W%EJhxy>h1e;iOEjH$QVC3j7eyiq;~U&1%Qr(;44t(r +z`6|qhrB79KGmO=bVJlHwGE{1W<+E#4eie?Ok5P0Lj-a~~U49TADDGY4C1txr4@t`r5l_dXyhC +zjSOs^Us%{)H_!Cg&D+}M;fA*k7fi}vR?t3M{GY@kwe)!#uWdDGoD!4z+NPb2No-|# +z**d6)McRtBGHb+KVMl$SwawcgXHu9PVnP-(uaBN^U~C+olthXS0~85Tc$}p|nz0hW +zth22}DPBX^(?#H@shl}WZKQNmJUZFeD%Nnq42F#YTyib!tMmJ|iV=9{rg|*V!z?XL +zJ}iDPpO6-?&C?{xzcO7}1Svt6HGX0`f^cobv~#O}7wUsjjhePin`q&H5pz>R)6NKV +zMN3el=Nq)X##|wKd^gaHGuwp>{HKOyvE&pYs67NY+gh-!Ww*w?68{Pg(_V?s7PFv{Ql4X&i4Jc~T|zihRd=ncu(T(8-@5xc|wM|3(>hKHU91 +zk+1ikQS_nXKl!C#`L}l@3l5p+N=!;jOjLuJcpei@PfEmLF39}AW8n8hI{3#plE)A8Bs+$Al2ap}sobO;P0dC#N@)6504|eUu@+?>E8q~M$ +zlIgRUi2GS1=DOa7VRuFwW-V>a%}oJp+_~KWU)`bwbDA0(cFi@)aG>#1VJ%1VR0X(P62JoVdXV?lU#`Dm`YSJKLr_HW9nzMvMY +zF&Su;?rm)i%o^_OVs>nl2mH<60Bx#ZvTo33p1&PlwzUa^gR!$I(0~bY^n@CO2u~nO +zDKqzFsh~hxBRK_ZuLO3~`~085jRFdlEy+y=p^)DbQ30`*M!Ut+5iu_F{S~ny_XRxu +zhWQ?`9f2iXD{be}fY-oeYYy*oZri-A6$6ggGbQ9awf+`g%N_K1*WAdFH+px>Q?m=0 +z*ZSKT(rGcLwwtb$4*Q~grLctm4*$FiYmFY8cql6 +z+6`->i<%W->9j{Tyfr_H2?&!3_tvsT(UD^9#GvK~)Hh@3F=jSLjQ<-N!wXAn`c=|C +zkT-w_Xer~1AbQUkU%11FU(05$!Cpdsas2mjLHyZrXb +zzn|0h(XH-3o>%QIEK)U^$cJ=)LxHDdR}1#k#HK#&recXNhELI+WH0^(VWQ!KeHd-cVmNk8E7E^gORucoXbviS1jDGN6`bVff_L)~tgQsVv8? +zeLn2n*MJ@Nd9kHL<*sA71;)~)1|(u?(gFi8DoZOox4KuuHI|go1{vI=+(m~y%k#1; +z)Sp)FCO%}g;SM7WR@Adu^>V5fIUK>?+~TXpex8`=(0-nXi%C&4rZ%+yA2HD-2C5P< +ziT`K|5DlA){yoc3`*mh-h~=bHHh(j1->==Udi7@rYNT_9tLqZp%u{l`nBa(EgBrta +z?htygS14tPkqJEH%hmWoUZ%F)+-St3*k+8#yVg^V4vTp^3;4n#7g~8kY3Yi}N;-py +zN~dXY#ahoz?lM)skur0yEJC&)=JS}`hj%4KjX)7t&}1J(qy@~4qR8~{=4K?nxgb%Q +z!u)2s%5+t%74K)ZNlcm1rlN?j0wL@3KtlpC2f*?Ns|tYx8CIk&FvF7}Y{#K0)8!<_};F9cdgp1JZ;Ao%)&=d(rSQa5W<1wH7vU@|3u#3HC&% +zb6OVrT{5%SlHczAMTPIlzLV2Hd%gJ@Eka4R`D(e$H-qlYF*tzo^j9yOSl +zx}eWS>JohnWp)Np=g+Q2xj5*Ohmz&%Zd*~YeBEtpN2|yvE^io)xe?>BNWCMrbHd?8 +zjY`W`tSv)t5L!xu3OjNcowH1=&ZNVWd{K^v97c4L=0X5wv8!(LtXoTkAqp>nD5|)2 +zdC3=M#q{l%o;iXVcE)s=SvkB76+I0V-8gFMsqBr$Mb%=`+EqF%y%h(ar4#yJBUf=hlK;jAddiJ1fSLMOJdx!+t`pTnG?R3a0V! +zOKZbJ((-j{++}Mk*%mRO7QpI$Pc#bATIR`&Dxi@XyLe4?nEE%;LKI8nrACSSmK7CW@T^`}dW$%OhTpDaP9;%l +z;lcYqHU2=ZOq{b!ltb@@-LcJ&{v}?9pqC{g7Cp_i^W-}cDu7se2?s(Yw^&ibk&mNEtT37bO*`sqF;~E0Wy$J7L%cH5(B!T42WA^3cz=WzvbBEN!Z3E$x7J~ALFFWc +z#an2?W6z~S*yDf+cErX*!~n)KD}Ek_2${ +z_J9e!!gvSfJxzfY(dTGMBlk0|lC2R7R%#`=h9oa78pg!5wbq1p6Gq{v_MqyE1e168 +zv^t7UdA8w`2gM)ZA%|&{GlEWM3Xs!M7s(;$cyCbD^lCVYmprH&%N)(Zrtk(C%!SMn +zeua!o40ocT;9}{$4-6n;&+tE)t8zmnt<3%_S!qESRc~{wA6fZfzG2@-py3kwQa=zQ +z%&>=R{ifVObv!D=J0Fo@pNeAeZ)<83k-rFzp17bZx=y0 +z4nq8m@B~N`d#~6Jzj0=pkvp>9IBGE{@8t+-)e$jSmc +z{6L1@CNu7!cagDEJ+oQ1CT&``&%C?+u84(ARbZEDRr0b*UX-Nhyb)PT+X6Ibns44o +z0HPO7txc_7a<)R98$XvqhCx>Ox$=zC!V#5-w1qIPm0NM7C}E;%|0jSdqkVp5U}8YR +zdN#5_t_af#dg%;n3=Hex_MnQh9xSU2;jobh|kkpx2vU|_DHB}i?<*>*i;nfE@Gf>r0Nk{M)|gF^EQjkc#7bX@78;^;Q$o-gIKSLUKx|n&gvZhMTm))hSR*+nI5JN?ff7mo{6&vjZ*w&=o>#Ehzf%dMI>~N0xu{q{nAxGF=;o+po +zVy@aa{JyoYTT~hQaO8DZBW5=8y$3ZunstKJ$we&fF@&e$f>o|I+yjWI!q{F4TTXA`XT|Z{^HYtfPC~uJW~OTg&Fci_HeWy994qQ-%uK6<>K9u +z0QoI!Fs<9P2}>z@!=W%gA6A8MaS=v7LlTzY02`YQZT=*@l!XYqgmI$?+Vfd^0c$U0 +z?ekgt0@l8ewJ&1ri&=XSYrh^OB7+-sH&%LJ8Y^z=lsG$c?lrQmwas6YQ#9rnWQ-K<6{_l%}<{ +zCO{Y=MNu|+)%lI$El|7#OeA<~TIB;?CzTKNf$j1EFFu4dDPZ1+rt}JB3Yf12Z-vSh +zrKJrTR!S{krXKQ1Hj~mCMTMVat-#b=4|huim{0lgDbR$}d{zsII8gTE1@HPzE#@P- +zxX80DoZAbcG!c4|V$~YK6tJU4mK%A^%I{|ZTlbA&y?Rs{Q$q!{NG4g8i*)eHNlgqhvlm8clOXn +z7r2tmp7T(a +z0mj+T=Rw?up-(R8^Z^Im*|_JZ@Ek&-)1^L5kdcW0&GNQ`&n%D1fa>C==j(8rX=Zu< +zS^Yk%yg1093)N%I0G7i26QaY__z{X&I^{WuFFxox?vOQ>hE=i(1Gk+_-?V$3_@UzOdSI9yhUV<>f +zUfvFlUjCbCR4U&L&GK^;ZWPjG>Tj0+<3c1xl+W&s#^-+me>-a%qBhu%kaS9B^7}`J +z3e!}WuEIa%*zde5Ia +z%`#bKRxaCaFxKm3tg4F#E9g0B37)P#f9euruHG!$)Id<>`Q)B|>i)#aLhp}ZgYR2e +zPqoE$eUPyQzZ)7l)Dq7^9}f*pet(Q>@RNI9I8HLc{FS`>11rm8@xhAukZ}(DY<#fd +zb(wE{%XC&*$=QOA`!XwwbD&QjOR0xG&O3RE0Ui6ncd#+D@()ygrMr8${2xetQ2rn8 +zum~9k+2uuDalwiYtZBErjC=#uw7mH&SmB0TOAbr%tYX{0gtA%k^BFDo@u?r7%v(YG +z`nWS0T`#bd?;+3ArzcEp8Fx0LWoT$2$@{|{C6M`|sME#W!HbUUxgloBI?HgC?+%`D +zl-R>@$L`>Rj?_ib@kil1) +z0yP_rli7HF?1R6qcx=}*f#nWY?-6F*dK6e3fsK%zcnoX*hrr_~c#eX{jXczj%n>}z +zEnOACw@+O{xxLI5JT0GHz0mC<3)({5!FoH8-T@vb?1rbYULF?_PX|3Ro(Xz<1l@q$ +zsdCTl<%J|?IBpSf(uLB9Zt7z4aCW>x=mvdEJ=g*_bhQ*3D2wXIF7K-_cvrxrlb#){ +zd@-}J?Oxb8V=Rs8dTwuWxO^d#$^O8>51xyB74HqIv~zo{g;|8jDiaetyXEt_z2m}q +z6P>fihcQ$<9jr_0&83WUuvN1je3d&ahtkZpAf6!lC#9Kfw+C%EgtkK;J8i+uet+tc +z1-Gd)wULvtRGuSo=b%yjo$XnvZj{5>gQuM;jVGfHh#MmRe&};DK(c~X)C+Pu5Oyg4 +z06YY~K|}JB&tSH+)GWJ8U`lz2U*rqtnJ)4$7qC7sjCHWo#4Wjy7`1-w(^AQPMy&_16SRoB +zXW7yM9nzLAT7V(po=rF=18dkKVa;-Y5&Rvs6<2LV?IEyJcz$xv^TOW*iHG_au(QT@ +zRak(pL1h{owi`U{ee=|%nm13KrncmE*6XIwhQ3DmkO%$0cQ5#S;Ny1az~T$Nq=OAQ +z;Ms*|VONkr<#3ce1GG}4XM^9A0pAfWlNsn&OC7S^lYrz!OMUbC>A}=4@B=&Pqfj>KGQikDlKBw$7AjqC#PhdEN2D*o +z^RwWwB0dv0VV~`a3zgQodiU7b_8@0fdy?7q0UJX24R<2OlHjt}vK}4(ULAa?3w_g7 +z%X$suL0!^VdD?4PzfF4YZO}@0qwPRv#)}!H?S#KI&($t@EufXySc+vg>-8*U+y642 +zRawDfp|)G;#gIQgM~aU{+<&ymyNRX{u?rXXHhci +zT)j2Sl4pU;H>}xtrN-WyeVHt^l(U6a=woA6p~rI4%U}(em2By*^>HkiIsQ+X`+@%`hMjQGvk*E_21of` +zluv#3tcB;9@kOxJ6yU=dA4BChQ6BGe9&n>P(uw#;FUrf1m$6BCkQ2t^72rwsm6gV} +ze>l}OI57E0#_;^*CE-sPu!T*fa$w8K-M!hs1nswga5XVxuNJQ-Ka<_Sde5B-Rq%mR +z0g9I}p2S_jiVlpSZU(&}o7#)|2(`Hr<()$x;|(Y)raY5Z$XBvmR`BL`0{>vD^Wv#X +zRF@9K&1YUP{M-@o%nOIpUGP<8YbCG&zI(;j*#7+$?Bgc`C~FLBz3&WcN$U9E{?q*9 +zCoehETnC&V+;=7$^>HGffqWjuwhSa3$uRw(iA^=?V%UPc?*Uh$nSKUyB={J%@CAg> +zy~2hzBOix(@6duWeSL?GEhIU>9KMxb&(Vix>~mkwCn5f)CociV10^;VBAw9h +z-y?s04)!MaiMJ2D<3`~b#XM4yBJop<&;4k?B +zhQ3@{=RDc5R?g3;Uyx1=`OXiW5_1^Kau!9WF)!FjbEmO|G*(f2)7&KZAm$>7lf8Bg +zH7z3f#K(D8#Z~wgldM=BP5s<;-jhy@KRiYU(ovNE_NfZU8$|gs{Jjco`zkOm3J99w +zAzwmz%Jv;z-%RNGY6ZibY~WW?_iBD(ad6sje1N4d-V@IX2H@8Xv@g~_>yLgsbm)E9 +z${tJB)@1lZc5m=OR(nGz;gg|57To6A=%bIL*GX2)kE|H~eZc6kp@hXXusaXN7&pqW +ztWK+BSdY5I3Xs2X3kR6rp=?2WYsXX<4#f(2-L<$fkT2JNzB6pt3|9x{wccHcv~%`Z%u> +z=@#%oelOpvc+wtUmrwV$VWcXhn`8Nu&(XXQwe8kE7-|) +z1MN!nod|njs(*0kVX&#Gd}tnqfnbGcE3w!=4}UTm_Q!#BC-M=-guMf@vRv`oU&3=4 +zh|q*F~)*8GDu5$AY%tgmsal(3y|92iAF=sx8hHAFH6Y!}ycO +zp^Gb>=XHSI0XpFt#JVzw=X2&fUd1`0Nj^_;3Ud*N&4Q&(QzyMd=xz^I&L+h<9n}-j$3o1<9p}D#4+X=%=!qs +z47_b@K@j@5mt$Nf{Gcy`KJ-j!0$=D88E4QZG9H9Jk#PonBI7~m6B%dFCo(<-?bSiH +z1DVw39P-WQ4jS{!bjUTIJ0R11=8$JTcR-f;%pu2oroPsRHrk7u`ZwWQg7zz6nT0iw +zX-NV`xT9$8nW=&{0W{oEG?lLt>3d^oX1=M&hkMj~NZ%VvGxNC$N9Gl~u@gp?Dqo4(19pCZ(~usi_vwiXTtfPG$2niK`2^xzNAZ +zf+HEC-7<&q<~b41vxlFfd>-ch*lWz|!k808nH{*vE~w4KIM6D6YY^pj;2xC*IUTr1 +zr9o~7?$Ky8{@26@Q;AkZ<0q4k3q@a0X{3(@>4pvSQHK3al@5G*gL`B? +z;=u%e0ZV47Sy< +zdzF5)E~BzBe@imun)-DBe-~&hbNQJp%qv8Du#Sv#R%>1j`ilkgP^|Y3_%IJG!90{~ +zzL;6II*rbZEbI}!jd_)Gx3zKrW404()Z*P($2=I!V2fp)EZ{e6(<`0!>8T~HnW?}a +zZ+rqm4V2 +zO^r%NJ9jEO8;#Df4;%+u-jl($Tkw1ix07{dSfJltZ}9X!+%!+K;TC?~#tMZmuaW60 +zEp;!}0VTl6!}wM=u#4QY?%WB?+OsN2zPX+tylYs|q9CYbL0}KR(p*QdTI7LD +z+GnJ`L2)PbDWnPCtLTJp*HD6(W3y!RC)|Pud;)uxRbiNAteQ}nlZp0VHS4Vp@)R)! +zHCt113^g7F@tmWcnJpzJUp+hUyg)r0c*eLV^5)~&9LrpIcB%AoJY$RyJV89KR?jRx +zW#&eDcJ=Oa#HH?IadPZ*#i!)lY4RkdEX<%BhbJ!ngrFNsn_Ai5-Eam7P>;VqBQ>@T&FK3I$AJKj>*_?~bOJT4f +z7Gx=r=?3)dLcU-%{3>o!-a$)zN(u7ZfjpMJF4W7_+is1=c88p+bL0zJV82bsi;yww +z@mo+ot9)iwJfr_nd87{;I8rh2dRL&Dv7{{WRcRd=#qe#vL4PB>&s!(tb-)g&+-me= +z+E?jV6-*`l+*Y3S7%&;aT>L0_h}Ugpg#*^fd4G-c_p!F8_M`N^TiGMLxpY?_@_mDF +zoIi}!se8~LxoZ)nag`q4$8DbsS<3e*Y`ccWFBbS9Uof_y +z!j7qZ;&|GFpuJvY7h(Arn}qyGIkwEyte~`s(c~WmcB}(sv3+W7{;dGD^#J*!MM%eO +zwx`fR+0Va&{;#-)k|dtc;j}?IwmVYefxC%wIGv>k-F}8V85q}oOy!GqwiHr32Sxi^ +zMEn1cXl2po1myc%#E-GY1^xkRW?m2Y+(@VAC-Hm^Vb^IE`U-ri;APVbiMI)shv_jBmm1J;Q>aVUqv16U`JK2hfkG`@w~IAPI2$UipD1-+)^9lgOd +z_yppQ;-)?4zr-EJq1}=?rFBZ)^}zT5(!YlLi?~O{TD5lv(P3*x??L^QOa@!aFnFG6 +zn`8@Q2N@`rY-5-&L)v7dO^}~Zws#mdPiJ;wZiRfmyfxzyn(I)1`oiA$P|5pp{Ve*+ +zhgh$ne2#rhXO?RhVfZs(+L)>2w#^3TCCrc{Y=hryY|38LWkqno9@5Wg6|0yx80XWJk8N-_Q|$N0Ab=iEP*=T4ol0}elZ<-NScw2#-p +zuEw)@arV8z6G8Zc5?5Zx`}6;Zo+C%)~ +zBT>8^3DLYb7dpXRH)F3E>vohub#o%kFlL3aSKZuu6mqkX)&YCR^CgRo_KIP%T*a|R +zE#esKgGlRAWl+6Dy>0TGaO6Jbp2d)Lq7!_E;S5=5f78Caci_6}JeI>!tvIitIS1uq +zRg)?^AH*CRJT%Y4Sha=rN~sN~uCCc}gH#5UMLe7>?{%idi}|kDgQBu+%fshw=Gw@_ +z)qEer#FxfK6Jv89HxgsoBaOsZ@GG26{z#mOe;8lbxWGKA7g(Jpti{}4;GGo4*-1L! +z4AR6|#Bny+p>P**oH3hw!yNqRS0@;7;C5SY2e6>COTou%axcz|+ibmN`TI!f@sCKEudM;Z2fr>7iYk;1_*@23qc!o`G?ZfJ~@lor1iVkvDR0FIYq6#1+z7AV_Nh +zyk8^g09j+fPjt?X%6%)U8`5cA5dR_0`u&u5%!s^{PG!-13<95UJSiq_kBKLUxC=7g +z{UiJa@^SP5Dl4*_@Oio_m)m7OG39b2Chn4Pb3J3Odu~Miif}W$Q^N)(g$nRohWX6* +zasLE2@&5cn}#Uu((7#bKXw>CtABqR(ey7Jw2YJQ&~#-i#RtlH6Vt_ +zD;E(9kG~J%t#{FXg_P04?Yj}NSmN-$8G?jQ5VP6h>Kj{`btjUni?$G(E#WVrh{Yav +z*L2DXg{|xM62YFZ9|UU!rF?<3wAgJwLd0UTji-WTy&;C`ZS_#;i;BQz-G#z!E)P9c +zf#0_F%Xo~NNm*~?&r$O4@n3x6ZItjb9$CU8RA3RePC!;kC?Z1qtQnL}d00XR6_CTN +z^vZzb$rp0bHfa4k02P(9DmGR?9N}PpvQ~7m5Fvv;uwTMxMb-2eg +zGCqeQ`*A0q#(%$6*)OV)&mH>)l7ESt1YQr#`9dL3q(uBj0;hm11ui6kk3zl>xR7LA +zK#T+~rbrGrg}{gs#3L^f0(XE;0{;py@Zu{9{Bl@eF$pXJw-8uNG9EyT1iC5Ghsfvx +zON78w8<-&QIh4rDt|;)Mu)s1B_;chE0?SCo3_wi+Z=uMYh>R|9wGjCCpp!s9VBwWl +z6xaa0C8U)kuo-VN34xU);}l{fa05jyBQmZ2Vx}9Ly?1sj4rTR2>cc3B=Bbh>EhMP&ohlr8DdWz&H +zT}j{;A+Qs45_lu3z_(vf;Hj{{?Idvd7$tB!$@m&#B(Q}dKSgBp8nz07WAHr?30y-p +zyyuDn^U>6@hWC)b6UZfMcn`@KLW~67OOc|nR}y%i5cp-#N#I{l4ZnCrfk(pvzeoaC +zk5dA_NHQKlj08SFk)Ijyvx+8&1v|{YXNc}e0NP+*L +z8b8WS!I=>XJQh~qQBq(fUfLB3JW67Mh)D%RR4VW{M4^wSg#u}+taMX>BasS>Nd+$y +z*h~m~i<^S;BNWI_DxK0zsvtIC>fD$pINz!tEP +z0w)L*`Y-yTCU_#OzzI?yE=?(Lg2XICOe!FvQh}$4vJ({91kpt@{*RFg`~+;Iz%goq +z?~SU!HR$Tn2EIoM)J{|ie2>KZHDXc$5tRx&N0hUmjIO{BA{EG;1YRi6NeH|&ssc}j +z6?lmhco8{76TC!XK1NI`Afi%%9}#6C-Vz#JftMo{ctE^NG>$t6fuD`4KrS4WMBrzn +zKsKf?LV=%=m^%=Y3W%sw;8mg=1Z8vuUW-)VS70LqeoYAcf}6(YiZH_NumZmz1v)SZ +z6AJu-#C#7isep(|1%64C_dyW~6sfY7nnw7)A{8jaTfwBjGlal-ZVIl7P#`bKMBqFr +z@NMJ}3Y;e~Zy_cX5K*bXn?#vDRVlDql~ryk@K&S(&0r%1a;Y2scGM>L+pq$^B?ZQ0 +zDg}N^VwNK&6%bLWz`I1b7nISP;P;UV{0rC^-k|+|2!YF^y523*K+46KAr0X&Y4OiU +z6EIvRSys$CQ|Z@1_@5}cj-uzOMjui12}DI_$1|geUm7pBzR%0k_b8gR~n4b%w1e0{W!{l +z29|yJUnn4KfXJK%m|^9h<9gEWQzF?pH?86;swHC$+N+?am@mXlEDF7dlPt +zl0^I<#f5fbM4V?sy9QMtX?GLKi`LE*H>!41`8$NOgL9MZVO1D8(AUGtIfQaKkS3IK +z2;p}jDxpgi@oylWVdfVDU^EzMyuw}pQ0zk)IgCx^GoUY@%(n&1X9`ixh)Te(74dGwhegwHcXiQ?R*0TG +zy69KJqGt=yZ=0fL3sKIQrs%mMemmmBqG_PJy6A}n`25jD--Nl5to3{$`kN?Q)Ox-U +zbvi6sF0sa36DgX8xT}fI)S-il^5$axk9f3n@z6J_uw(k4}FZdzoLeU +z$EU(9?yKLSf@ZMzoH)cDlreieUae+vA)(I+5urZ%PxA<0W-Az2?(c@c*Cz&SF +z@vS6|jmd|+_$F@c3iC7#^E3&b#BWkL%Q!`>KM3(=b73DKtnZlBK^(r7x5POob6hO&7}2X=NOLnf +z;p4Y}`zi7liPm4JZ7Byej!k7tRw2J}7PwNHK^jUGtM>8<)Vi^J@jFsh3m!NAw>I03 +zFy^3!G|Ndd%UiY!<)s}2={G#}O9;3uFqScXdm0r8CMuDaW2iM{{tb;=ynI;mNql{x +z)ksFc;+hQMqH^gE;~|yVsrqC2TmonXH-QN%jWVxA^0PpAiU4RO0kj)w0-~3Z4v6fk +zYzNt0oyyo?R%y*LaHW2S)LcJd@+chfuGCyXRiL!0ob6@_>;H;MAW(R@1ZBNIIhHYg +zdn$nfCIQNNfMRMB2F28MG*GBI0+b2NPE{Vu#}X(Txe3NarO~ql%8j526xI+^qV=LO +zl#HJ$E|N*8ipDUh(Q>DnCGwwwnTe*M;)E8Hn4M&dzj+?v>+fYg3&PDR8=#-hi +zfwFuHHH}bc0BKODZmeu_2X*s}D$|`R%T=_QEO91bgiAH);yCYedID+N*OqM +z`_GWuo(!c#m9u#ZS>cny2b&pBDmBMn2hvwi#mqOU+TCGGe3Yu4X#KHSM{*FyRiTCKqf?vIaHlrQkFKBWPNafpyEJAe6|?zSs>t_5Ma&AM +z#X~x-6I79#6IBb{jt6MpWol0YnoV)qRme{{!8L6*NRHV``&gd%F9_||gHC>0-O{`s4tD-u@~a>{Qciev&Nib%BT3iVX_k9T33N$0!775e@``W^2+Uqgrv+nyvZf?@9Yj +zAe}X}kL8J9C$yhDS7>ii!`hqWkET7TAhe&#?4;LNzLvDVz)g)`QhNLa3g^EC#|&!8 +z3)GVTge1|Dl#F^@HtRw2p_3}#b7nm*z6h>VvCu0|-2)CZDEZ`A#`yaqhfM2s2ikR_ +z$rP@WDJ!NEUpmk@ax +z`X?mVBThpT%>~hP04)jPG}In(8k%UHhL(hR#A&GHk*A>v-v-`sa?Nh_5Fag^;^w|g +z@Fnr(zzl~_{I5(37pF~QsLzR$Ci`C_zkFoLyqehM$tph;&LWOcMHX>{Iu>Uc;`o$} +zqhez(+G3#-(eX4AzD`}?Z}BiUAKvsCJZ#28%KwhdggBo&{#^v$0v-LD=aVW|K69mh +zKSAvJi8I$*3b3Z2N{KVq!-!3Umg3Cy3?icoED{1!3#Gt+At0`N=K4`spg41V7P*8# +zapoF7UkY?nyB8xey1)`4@IKI~@6*X8&Ri)Hc@ciQ(U)cI#ChwC1xi>Mm47Ee|-Qk +zsep(|1;k-&A1I?MaBHLj^vkcLz#D|XU85>+AAEvTK%B?!TBH;Z=dn*ACKV7-sem|~ +zy#UJS3RFibkhho=7)Sjj_9FQI4Z_E71MzY2rMKgOuOHuu;C~~YLOnM2;`QnD1_rN~ +zLVHDIzt2(Kn#4|%Ipn>nhAtAZ3%yj#xAT?}qLZXm^O;P0GECwCP`4 +zkLYf)za`frdK=k}h>lx=wE%gje^*5fnEKu~4&{s|1EUf|mx$$w%NJdu8D(Gzk*1XR +z4(4cu$m_&5{1@^6ddt3QC$F$14l$!h@%#&TZja{K4W9UvU`OY^c9wmo;`<%=BFbq7 +z4~L7HCWbM7h?^CkZI=MN09E*S%%UX#hX{b28xR#WewYBbpQ8USbMFFX^|bzhueHB> +z@7a6Lo=bDDre>N;P0cjT)Kt^eq}xQ7>4G9mx(KBxgpdkF$dPk!PzWJT$WccKA%r+_ +za!v?wI)vPg%ZdJ<&%4&zvu9W5c>d4t|2+TQ)1LLd?`OU1UGKWD@A|HND;;plTOjv> +zH17E$r8Rv)u7+h=$jd+$bF-xYIx!hYPc`Fo0W05k)<_J0hza@HiBKz5?JmSiW7T_s +z0anJn2uS5SkQnQXG*-UkegLxi9g6_Gxy8bgBY64^weUhy@^EU{n`dpIZ$o#q(__P4 +zgJr40T{e0zMBiwl<8h1>29)o!(lL`NiVW<`|r_L7KS|ovjtFoRcoNMi;U%!Qc;#Vg<)UTTp{JO+O +zUyA6twsIQ3vZ|X(ew)Rxk{{I^6JN;-cUc@uVPYJPRlM*!D`ab05GNe1tB{U&g(_6- +zoiFu$(148axf`;;79xegyh~x=E;YKkgB*zn4A+{bmC@y8XSy#)|B0drjMbX0?ocTo +zqXx!lP0t-F<-9eBd21!5O<&`wo}>zdYVarc0D>LlsaxPwt(o;ET@dhbKwz5ItX@q5 +zu@X`~4huADP472JA>cuWz(_5QXcCxc9pxNGV1(9*64eJ;@~M?*?sf*d1{Ej|7S4ts +z@$&)_{jCoJe1~}$V4nc|w=;UO?eEo%L(%~~iCs=Ny*$wl(2aEvy@xvizb +z^B89_$*O_q#yKF|2N?R5RkmNrSm3Nd%~=W=>~4~#u)hwcnM#$y{(4CY`|HiFzfM|a +zqgN4=xfEYaAZsB4tyMN{%8{KF|4OqC%aL6o{~eCvE`xuSp>k!#>%YrT%zhqSt6Iux +z-hZdoKBVG!Y`6h5T&{QWn!dQ;6jHScl|z(Gn{s56&40VmtbRgNpDKcLZ1X8V$HC@P +z2Wt{Ptx&B0|6c&wCv1ESV4twPgp4#jVKbC_!gi*}+!HoNGEdmrAQYm|<2G^NMh;(S +z{)^xq_n>VPrR?qOgElHw$!^VfUQ8fsM)RP}tQnJKRd|lpcM~IvC^-@sWmj-66OG8K +za1MhiY#(@uF`HeCpe(ykN2kIfJzTp6u+~*#v~6zpraFdhKvAc$N~;FeP=3<&D~vr_ +zJJ1#z`*#Du<_24f4VE(tv0H4i1SiiK4yzY|f+32kPSTFOHO`O=p((>L9R6*#$jREV +zx5eS_C*CpiwMPF+;%8{b-X4d4mw3mJsXel`kobApu^Vtx7C+xGYtO+0nP;4P4gf60 +ziw2>gelPe(Kpq5{&GO5#adrc)FFPOKIe!5Al)(sGi@@Csa9#2h0=cXTWj02I{j1N* +zIRot6Apo9&z?BG~fgP~M{{dOM4rEFp#r +z#UlYaYl@AK4zRvP9CaCFt?4M;kWV+M^ve&5o90>UeEV0Q*P3q9qubC)__WnevN*1j +z^_w$gMVv`#Fup(@c`Rqccp53?vN<{IGN<`>`RiTE+?`C62YcoZ277P8 +zy4~FfXjQ}q@48oaa4=Go+3r8Y#EUl2Uq=@qGDNOT70Y9rz|C4u0j7jsDk;R#CPZYZ +zJZKBtg1%ZF`~_}hh!2hfe`JWy@&dPMoZR7|rX)qZ{NM +z5k0UiN~}V=%G8hy&*1Y<)F6F5!pT3fU@NF{Xg#JfEWDNAa|zyAg6DASoVF +zGUUr7f1v`A`iG&xMQsZAz}?aTJ2hy-VQ;0?iR{uorqp5~0znm~H5vLtY8!@N^ADT% +zSKuaxnfNf;(gCT(4)W>mz(I0J=p`b1c>*v?e^dzQ811sW+8Wk~czQOhOWrq#00uXM +zCt1G+1hQUh%}ia9m>VZ)mK$_gzR(G2oFRP_%U~$P_bbBh!!XG!RZCtYDts}**|TQP +zQMx^o#}j|MpPnQ8>73r={tFS!7pFE7!X^Je`_$EV7GY;F>){Vp;zE>L;^&IA-(HD- +z+i9TxxfbxtTEJg}-rPTUCJYKl)ecnbMOdnKpfmSfUDXa$vc|fq9q3{xR&7(08BMBo +zpo(Kvcr~)?i)wu@2rnNMB62=yk}8=k2m8s4=?Z(DEkD+uxqwI6?>XTbE7aXm5?QG& +z2tI~tQLVVR(>=6Pwj)mIcHq*F5joTCf+#JfoN+$jBo~3qaBw{Ug_kMYBDS2!+ +zjrqF{1my7N&^AGjzx!m!Ky17#z8Z+)|_(>~<4^ +zc4iz5y#^u}>WC6cV$kaf6Owj4$lz^2hb|lhQ8082zC-$ZusQ69KSRKLZDELCD$)i% +zM$hx!6+k2xfG|O{6BT95o4`+b5dr+_1Ir`)9(ASu0V(be?|Cv7OM_}i~zu_PFarQsDx%Tr!43N`%gJ3ywrGZt0d7Y^!UAW#2*>XJ0=Ld5jB +zaB3LGk|FYn7x>cs6o)kp@QPRYREx*SNYPOMGCs!W>TgkXEy9_bkOP(37Z&ME+!C*R +znX`cOGCM$_KXVH>fy~x)J$`&4GVx(XSuIf(OO)9hs5863N*McR5Rpk#n;HNoFERzc +zo2arURjbHUsX)abx~j-DLxi#?byJbk4Uw)=FF?Y1dTdvedGgOtrN`0p$X#+iwCUqm +zaOkR%p9fAKZ>VT;ciM4+p`hdx2n+RzS5V2vFjSvpL@Ie8qfIoFKRLo^r!+Xx +zLZt3{Not|@350p*IA3D&Dknm>zidRxZ$vK}(W6lByU&PPThV<+6hH=icNtL+E4s^w +z`ZKKujA*nKJs_f%{Pio}O6^StyA@1W$$(0tu=T5S5Dtry(Cfg@7f)X&Im%aqz`fpt +zZ$rlPa=it>{7H234H8x@hcYYoX^$t*sNUGx=8QS`5tR+vYum`=AJty#tt{V#Hm!6F +zp82A4q0xEeNRiTzg6TvqmULClt#tQO`aD|L8L{%@DatdXRqMxDr1x5#S5s#$3-Vsc +zP`=bCV6@`O`fRBl;E)6%W}nK=P;;p2GYbUP2|q#)g|(kO_8r^ +zioB#L@=^xH#D0jQsl*sZQjAMgNmN&S4c&L6ae*D4qF6rj^U|>pm4+~Pr@=Qep^n3` +zY!IVYkUWi~7=9BIe3+yd|9g@@gKRHVJ*k +zbc3!|<=ZTKEZDORyD3ryr@&988x0klG+tA|N#o6yr8@7k(V-1bFM!7rDFPScd#vwD +zrrhBkSTo+@SpItTH_Ql6VVy~{Uq#?r1~wzGj)6ZT@K*#nFaDqED+gJ~`N%-|3`;Bq +zk&A+&SxfME{kAy1>Jm(a5k*?-_W{YDI7BG=JpX|d3A3;YIOymS!4w?D7^Qj-@CDK> +zwwLx*kjB!(wmI?A36^R0f(1iZ!#hgbEa=0yolM-HsJ~ou4%BY)?DH^VGI1XyzOz)i +zf)kjo2}_0j42f!*j5fvLDj4DzCM~IIrXSVV*3Rvzrk4JDB=BvKP}yaWjvs}m)lg;sqWW{+s%s*@TMK{@haGEQi>-5UR_NOqCy`%M0dN3M +zM-h*`ZiB^-bMbE0Z!=yZzh)@Fr%1f+jTSrG{>_ir%v}z-WbQczn7O?SFmr9kpxCF| +z2sfiTsA~4?PQ_f8{O$T^YC8q86A;CqoOGT;-Jz#D)WtEBlg@Xjl`T`OZKCtcuB +zt2Ea@f_k2)9_&#TTPd4>zEhVS1>Qd)E$fEB$gybCl++vx>KsrtCm^ty0Un+FiGf)N +zj2(x-#Ry!?z*Pv`!N83OJj(z#>Gm-2AOex&5O@NCu?Tc}9s%DC^E$nOzhQ5@?KP@7 +zEIZqLCLPdoA!INb)Hk6es5K +zZ^=lHn0S0#5}zBfZz(`yyhyrFl~1?g94HT=xwEgk2H&HRnVz$)unUC7ZAh|KXL9ho +z)XWWx5wUNsID6?vc0Mm_*OxT%UI2VHp>*^V^g+GPovie$--DHZJiI3(pOC)xIqbu> +zeFo7`h}z5U-)rZAJQHMJPFc#Vw*9Q+5&b@l?#OVrcKGVYnW96~SfqZo|I_qVp6vgX +z?}>BRFDA=jZ;W$TkJhZ|_pc~g9g*r|V(#6v+BL4$qlu3t&5p}d`eGXNeZKqyu +z18=5tXUmWw-To(FYQoGsg`{0iB@y3x5KHP6E%PuP29YllzgJA*9zBgE{iYQU)R(hx +zcAE5@scX4sfX@Ngr*iG}{dY4pnn1Fv(*F?h +zW0EpS+$EF5FHS@s!1?AL>y~xtw(r=j?}24yCqVYYNeJ*XbLWW&9EHGS1iB_hshJGP +zZIE>0Qx5h~7vnElylv1jtW;V3H7=bEx(w-bP2_juu!0KlowbW~dIW%MJe;#&zT?JI +zRi1B^U4u$6H3m}U!!3U`_=^l*S4+$P5fyKWGXc_`^DXfb2-gm)SwEaZ%4{L%kM)KY +zaKm39JK +zF45(iti9}VPk<_8bLC#kW|v!jz!L0uE*1>CoN~Wa&o1Y8v8d%y%l-iD`(y0NJj>=x +z4RwX5V5%%@y#1>`)g4eP%RYx}CvsEv0|G5hVW}n{YdqA58c51(t%T!89wM7^Rh8o` +z|65prsC7C%ZC^#gNuwlo*xW*74ZUAe-BWvZc~ +zZ09#an>5+S)zDut}k)v?2L +z9hN=mIAP7&Ddr7_#(HYR`?su{CML%z2*#jaOg&m_4jCq?W8~RZ$}F>H9-%9ca5_%q +z)a%y~3N4aeUvrQUe3&KeVxE9xqC-v0Ve*JGWhUOdjbT{~s$S>9{gHD`zMrL#yF_7z +zFuCX0TCZ=1rpO%WTQysbKw$4RD9+SATC*OTR7Yw)8ce}hV(gKOsU@frK6NG9o85PR +z1pO2@LYKomiJx6i_FEqw{kDB~Kes%+<7XnJBfgNExX&5?N-lRa&3?RnJNIg8;*MsZ +z>tzTAL!aO~X)V6&=4R*?WN^F=cALWT_z#F+&C?VYtMHYidORjnD11Muo`hlRD(r`g +zg0+Tf3|~cAZz8?obvpb2$vzZ%#T#@uKx|(_F7c@d^>dRx`5pwqD$4yV-0vmPZva2V +zoM?X;QWaeWUB023alD6P!l5Ee)wxiuhv=^%b;B~Y-WgF{i@r!#Ky@0`=^@nMKNV!9 +z#34BuWV)PGs3+NC?yT8LOYk{JTHrPAVKnL&5E;pgCFG(;kb7a4A>RO*iFn7*2=9h9 +zmt@U44?8`pZ|2!(e6pF`CU_U33_SBBf{!1( +zkvD-G4E+b+NzW0$#|-{ms}KyWz~ELFcx4HqgpY@cz^mNtWg|U_)HXwf!i}U}GgNwb +zDyi2El^5pSM}apCRT!Q{YP+Gz!gEQzX{f63g{0mxRITzh!|#E=a<~ZH21zKednfJS +zS+u~1Y>2euH7tMw9~nxAHTvPe$E*atVqf@dOlt#sSp2?Xzw)LaGl5TTq`p5Njov4) +zzZ4FNOjm)gsTkTKvnQ*-H|&zJ43?gYr-v^^l)w-41UJpSD3$&6G05bHVO(Co +zr_X@4D71N)lZ(2PJ=EZraTW?wE@l1#+Gs8^?6ie&SItM +zIlyD1k;+|vR$==!u9W(tzL>Ls4a~%^lh9jbLX9577>%cam!X%EajJIls^a3$MEuO| +zFj1en5m?=T2b2{|@+|FO`z?GClAML!7&afZ>) +zE3{)bSnQWfmecsn{bh@SNf1!+V(Y#xU6L +zac6#V^*9h*@8FZGj{^}qK+}eGUk_#N#Z9Hw$8A{Ub-iIa$G7dzN?3UvbnrZpO{nb? +zjNip^8z8`^?QK+0?YK7Sw$BmU)p4y21^OVsp%OD0WF;zOZ&Ap76Zul@Wd0q-{F~LL +zkkdo+HQ9ym4y=qs(gO5Cq8Kcc5Q`lRbP2e{C3*;K2;yjCi9E(n!h4J*`U)5joWl?| +zeS>%%u0#$V2B$Oh0`eU^m!UU_!!#>qN8(GEf +z2mGKh<>U~Uj-^84rxAkRIvqXSSthv@#y4sn^r9bHf=tPD)Ymi}^-bW+wE1IqKxv45 +z=pJ`aTxOu&$k+_jFEh}9KX?=8K*2m@N(Dbcesqwta$k^Z0~K6~?@%x#(nScT2Y(U% +z_4qDy9b}T81ro=Zf*70)FxI-CL3y7(oeg;V~R +z;*~yv;K(WXN)9oY9J&a=D1#}Q`ww{V;M8xi$y@=rj0>qn)F$smrmeEVz9_Wkp&}i} +z(7UP@E{-OjJiH2&q>rOw9vEo;q5UD?P(RE^bMBxrR{=;k*M#4a)mFzDim0Ae&jwJ{4a$HqDA1K*d%^w?Gl7`Itr7n#Kv0OtubF(>Awc +zf&YJhZLr6)9^Q$jMjrW6q9fcOY!*X|9DkW`=u0qykCV&!Rbbam4Bm;X26xjvNwbh~ +zFQ|2UI4pDyavBUu7}F9J{uKzm6%~0H0iQ}gscr+Sr4+@l69dSBSBWk>ovaO`cMf~RqAI1+z{GE>$~VTg&ZF`kz}>r +zCuC!29?j^cc}I<}czS3rr9E^9A!nF$tII5?T!!O`? +zt_?~UoPc0JE}BkbFkJ^iOYt}Da(o$8cO#T?CgPW8BVQ7W$z(7?5eyy@)O9RQPf5NJ@Qcqk>fI +z&T+g2nfD?XSvUakGAWgN0Svd8+1>S+8o<9h|LeH9UJ}#{N +zik(ho1@pdNw95nguVY!}NT@FAiWtQDaIWUoS*s!ctkw +z(R`zFOq|MbaVn3CQ+d3oEW83GrO(x>oqnEPc~-k|VrSe?_BhfklFIWeE01m{Mn!p^ +zUi)MUzDnv)%nm;{8?_Oi!BYX`t7D~Hs@?;t^kf98rs3hzbOh!zFb9F37`POHJ5I-G +z177frv%p#SgHPE$Yem#*6=nYdP?Qx-KMbTJwRfcEj?|im2aB{3 +zB{s?$`}Y)#Y7)zL26B=p?MO8VDmuBSG5ekJL+#%#_TSlLe`mh-;1sO2Ht4r*f)!rS}Af!?nC6l_Osa_o01zXIEln;rXa +zU6|4qOKx@S_av2znTo2?Ijpe*O@ksQ?!##dpQu+~iSb4cTm;cZ#437}O=KXuCQM(e +z^ob<*hz3`NyKGw2@Ni7S9u6SiKtoq2mvTn6F|UVI=_IPE7gY|jCr;IVsOly?L;Xuo +zRgPY`NIHjM?0sNNjb6PxK^ys4^a6j*#;pMmOCm=BCECi+? +z@DKyD5IBH9hl>yhdyTFRV!DO2F^jc-_l2#Vt}{>#5~UrfxFeNzq{0Mcot%T +zS{uKW+W2f!ZR}oREeK)K*S*FP86;{gLI3p_WC@l_CuAD##{;Xbjg~FtMP64tMAExh +zAY+f{&Kg}re~&*Rph~Z2{W@6y&fjxwQmh@%!va&Ja(BaVaGEL7Q*4oz+yOti7zb?3 +z>j2YB@wB4!AxLwue(AW8K7D~-Z{n+G16tEK0BQ;7MXEg!rvciYs9PBz@)HDl?67(- +zhc*2X%lc%$^9lLZC#w4@%Vmw}zQz)bB-UC&N??;ESORDzKXW{oEPimg@beWueCUT) +zk*e{-WLE9a+0GABVpY2bHJouoSC?=Mbt;!w)dQeMcTRz$zJT;jQ0;$0AafQ10SrUO +zGSC8nKOoSd4FWi9ZbyrXK~~8W`*$m5)}rSx0GB07J5q5+D(y&x3CcP-C9$gQl1Z%E +zUZfk=W*8~r>UNI`YXZxhHxZix>QNWR{=u-ZqpiA6w|siF`#ekJvnkBCM0*guotJbK +z%cw>_#oB)M5j|X`S7KVO=Lo>XU2YY!5SPQzrV!__5ck7PrZUfs6=EA|xbTQclvKlY +zPGx$YsUIC@BhGcHaDE-6kAUhpoNgY^FTS?bXEwfiEkGp~#4kVy)t<0n=b(rQy_^BU +zHzLrNQTAEedu*|Rk;p)QBxK#YGmd?{VT*frTRtmR_q~>2=DRzMbZBqCwO`Zo`1I2! +zF!z_5TnWp3(RclqvwB~mwaazBjlB!j>VF{h?v6uOK-piZZ1Lfh^{4C#+&g8Jl)1m> +zf?t*fWsXD5IK}cdyQ!EuKQa0r +zn4HNdoI-s6+05(JT01QbHo3ubz~2LWok>n6o;QHmeYi!?mhKMDjHm(n8Dc)5wY3>ED-96?_g)l8;;gP>63@G#Buu8 +zSiNT=j$RM!KyDE;fStgtw&&=y%A#V8-AN8@?CVTp{~aAjyrr>4MDm3)S_09nEko~Fb-0=DFc6+eco;Zu-Qdv{+!DG +z;*!0@x%q1{c9U)j1%5cyXO0-<#hRjFH0kUn)(>zF4a2-1`5;P%ANQ*8nMKky`NuF`jl7I8_>|q>js6Yz12_E#fB#?Zar!sI8-aDQ8MO_;!oY@O;gZl!vNtlw9VH+9 +z5%|l!NQN6q^1SWIM}$fb$@8{NG=Y!EY;pVVXZ)vljZ#=PpfUM%B{;k#eXi8YC>VVw +zdalTg0PB&gW*yH5c}I*qjpWra@?nxs#K@mX?v9Z|E&w?vM*a?D@{hLG^nmLENGfV3 +z^-=TccNCAPaoK-V_DPeY)-GbX#RRNx5x)5x8pyz6wMgMOBKKL7%i^%?e1Y{}zgY!= +zwtvTjuivVI)D=d9vjlyj|-&-HTOh +zv(_#3w~X>C4hM+}#e;Z0wK_l6I4=Z}jWZo{+r&>rA;58)#lP*zyvH{OecjK7w)i&( +zeLWU{)4WTRU!L=gx`l$cHwS&kUk8r7Ip~`pLDNw(*!&Sj;)xo01<>odiqZKJp}%4> +zgWQR?zf;Gj`2MD+`2IR}X!1Uxf3PIQe!)NTL2!fqz{C-7Y?8dqmLzYpCCS@tNpWwp +z1tziA3k5J<llGhWHzMT|{ +zCBay%b6hO@dScSIL%>NluO}u2HLn6{!PgU$k~Hl?#1?!#F)5@Om9HnZ;OmJ=VNC<% +z^~4Omo|u%P=aW&y3Owjd1e0Y)I8zP?cw5OHzE{}1q$W$ZLmu0qM6-DYBK!5je7yme +zWXl(&D&!48za1LK-XpSt`i}b^Y*-kHk~-c{Ix-y%Cv<|Le39=-jb}-+z#cpr)Pxsd +z0SYX_GsU43-xCVQ9u}Z%LnqOw(67*#9`5ob(|Qu@a23sDT91;#*<(`v$TZ->IC@Mf +z7^x!F&7>TPWRa>dR5(&H22^({^c6=`D%rn+kb(~=?_8J}?sYB2X7fAeXK*n8I~zbf +z9E-bLd0p;d*3mpUef1{^j)gsX9fK{gkNGIgRIUDqEJg6^2(uASz>!+|JC9eEMrs8k +zZ#+i&X%gPGF +zx)uDbUqxLQ4@|!PkWnj5o-}5zCRQb5sWu<;JK@7lzYM^(-$VF5hB{SX&X4yL+Y-hCR>G7VdOwW_#aUU)FG6zWVypJKfUx->MS?NWi&ITzb;J<)Q +zdDw1Jgd5Fg9+D~H#%m}WMTbubH(rg51P9&*wDX-{QHKshm2+B{Nj*?A;q@H}{l`Z2eCTA|Rg-z4>kP~DV%i&Wc7 +zh^$dq1A{sNRH3|Bxr6m(VokFu%Kf5+rQ+2_(hIH3D`C1UFjV;VoF +z#!taJv|Y@OQ@Dl-zdo$O0!;UHS1dz}iC<2cLFHkb{!>g{7rl)o +zh-Y$a)~>#nv^LrwL3I5(bxQvglB(U}a?sL&8TuH|Rea$mEaF8Zr9%r#NB%l!>CxmY +zKYl30F5|25v{7=vs&EI=kY24rj%mZHI4@2tq6RCH4$o;}hj)D$+OKqYOhW2smWtBs +zF8U(68*eKycZr{*g^&%!Ttm!b;J>zyi{jI7(j^U{>vb%YRwf;N9aMD_kF^q)bQ5ox +za1A}xTG%z>rPksln7WAtF$B|dxWyH~T)t3?&*?Pvd(3(&rTZ8nh5Is?RqQ{8N}P?0 +zNTLI&7xMPSB+-Km6Y}yaNTLflM#!mGLYMR*$7=Q(M_&b6I+5W*7c2oSy~qf`drPqo +zbvE9EA0K&FCh%SKFOrS<^YqEN`<+HQd703V4^4Vp4 +z*Tk>Iohf1vTYhcG5^S~AS(ab}Y!4f43dPQJHZ8+L1;oqUsCjtZyF`!muIE@=U13w? +z|EYxOjgj=mik-*94vdW_ut9W)KpifSv^6@)d0{HoD}4Dx8c?e0w1riAV45KF +z7MW(5dJA+6av*Fwk0 +zVtbdz(4)0d`LvmYpACK4ABfW1FcY{`8O^?4B0p|&J`78C;JCD9y&y}jKwRCCSQX{O+{48DWC-My46pVr +z@KZQ3_slP=N98r>Y0(qYD(5gvK-hX>&Tdnii|{7E|X1L#$@qH)zx%CU%ZcLyf@MQ +zrS~SGCZ$cD4l&ETE8^s__#8AHRa^Jxo3|}TgS`;)R@|D#$E9Tk?u+3k#7C(f^2{e1lg*)Ma;};>aY@h`uF!(=q&A3$-Y`SkN +z*mU1kugdSqfGZ8)@OGC_`*!fat2i(+m-cVk0dayA~?t&O*4# +zt6YOPsjE>4Ds>z#MWuElljpz4k~hn>QPgQfcl!B_1ek0rpA; +z%&Ux9-3oy}*=$~MlQQR2B;lQEBHo17d7DyKMl(vx&aYdGle@5h?|6Cu3|nk +zk5iB~-1*pRr!8&bcRm!-HlOo>H3m|f7?`cXOrk)i6hQwV?WWc9?VOLjF<)&dbPT-! +zN{|>%${^OjLc|)Top5nntPJ!Fg^r?NurTZ_y2INno_&!fnmJ{_~zPOBizx)Ff~ +z5E#M0;|N^Iz-9!VL7@Cq1S)ug{EwhI^L?$bx7|9VG8yDLoBQ?lufCb@W_L+sm*)eE +zr4~Di%@(@FMY-iPM5*cqQJRv%-eDy>9b%Q_+>yH+`!313BX>LY-IYf}mm~K$_C4>@ +zvP5bR&{W&^u9JcE;P`x=sotA`PQ~V`&Zw8H?5oj(FM$fc*+S&9Owb@lq1U=`$17z +zWyu=HeuQ^-b)`yG$*$N5`Z~aR-n-T53W(ljnr+uu$MFnP{x(anZ|MV^X(#!vP}zBm +ziLpDl#7CPJg*6;o#S`o^p4P6?-ewbKtN1$5x4za6vl0LONhtopG!%*?ymWx!uZEQVp^oxeXK1^lCpbHK&j +zrD|ViyxoT#eJ+EW^sopzW4W1b_Xp7T0eD3+N(!0xdyq0xe#qf*G)WmPg}fSMY~*1H +z#E5%gbd2EO5*y4oX7oXtEPu>vnFoGY80e&B$Lc>~t;=DZ&FS+^>i{{cpyCWa_zCBP5IQSA&janTGWR2wBF)#1RH=mO}?;O9V6O7+NZS +zFmxOWyx$u%sp2vy!%3k!GdT38fqDE|0lthQp6YiGk)7`sq;kl`AoG~%Eit6vlduIr +zmvnhp@P!uN@Ag74tEoEdt+CG%B>u0l_^RJBrquOIiMhmr`klv^HD$ZI{gSuz^^f~ +z7m+Eps?(dv>!dXYX2;_d<0-fdg#E1J@kcsRah{63l&CgetX>jQ12r%ANVAuF43ayb +z(o6Nr%mE8Z6ot5jt_I7^AL)3x(lB>`hqWjAO`m$Y6i~B&v%V0;06`sMCw>AQ0sh|y +zf&3RBz5lx#Ik4!UA@Q$39&$hS;qT)Jgg!<@*|$3#wpjlyoMx$PFiad +z+w2luc8Z6gVgN)N5XEF-n-%VKpzC?gsTHlG-c~elcMQGPqV_xV@BZS@p<6Aw90Apu +zxppYdT=dN!0x7vxl54z-bkM-Qv&z;HwlW#RTo#kZ!AXM*sY|TK4_Kt%x<>zz*JCzQ +z>Yxsi?x43%Y7X^NtC*Q@A-kFWolBa-qA^&Bg~{zu_dEue)QSc8n3@q%Db`Lo#DEOc +zyTtG1sr$G}gkz5u>LBAB^u92<)i`K+4C)|_4*Eb%b7)jMtqwB7K_5J|IW#>6b&&ZE +zy7pQ?r3BKjfRM7vilH59nL|IsA2PO%Sh!$b0^GrFbMSSaIps>*>L2w6SzoNSsPzv0 +zXdbG)tqk$#{3W&`1km}`0)rvns~cQ`8G;wVUPW7{sR(k;m%6ik@uhwJxZY&7@3DU; +zqrU1tK}o?@%VEz^u+0+e844X%_b>{>-es|+1uk-HgGVae&|B4_%%6cK>9TyP9gnu^ +zbKV9A3*Yp7Gyr^pOe=aRTIy#GTBO?XIG^sIpq^`Ft33F3Ad2Loqokv7$N)m-sF+=& +zeBogYN9GVlW?EJ(yO^fUz&|?KE&w&6&195Vu5PVB?v#K$50ih?vGR +zZGjN3KIb60z?a4|ZMdz52FRJVbe?Gor0CngXfd!IDo7_erma0x+YFg!cVZCxrBCBK +z(;POb*37%B)XRzx8K39b5GqgtS@N{F`gZV&|A?Il3xRyeavKs11^6w;NtyD|!O)Jrf%i5&(2#~KE63>VF(B`UD +zb|0}XOhe-+v+XEvkhOaN_<6%EF`2|TODq7C3iDadiXzZesT?0Aean? +zKS%$W+}%+5D)nQ`oBb(OA3|fA{H#Tq{H#Tq{H#Tq{H#Tq{H#S9&l?2N%+Fe+mmr0F +z9c{NBZ83Z;I^t-NQHd+PAc__n${)@~?xH1z3WYx>^ +za1xPahRO@4$5Hv=0q~uZ6^0)q)zKhJ!jH#MW#N%b-O4J$KTu02nvBaP!Z#3E&MB@} +zyjrUWHIR}b$T#%g9UTy^UxgOJ(G}53{-~+RTNjfuX7o&}N`CFM*dN|Vs@lk+;hChm +z9*am=MT9e$ayMu3C|YHUr_3Zvpd@I`I?2&~mHH#x>yP&4jh$&-rtzf0TRY@Yj2<=jE;|*+jfJ!x~F*44aRHjsKsqc?&lZG#>1SRL{D6WJ}pv; +z7`;f|1hO6LmWz3_jj4MTC84O&Rn|d_kc0^Yvy}Qp77isJEyPfdvY)_x4QR!B)ZN-o^SOKs(TY)9wUX6mGJLwmF6Kbq10y +zqrwFXuzC=UCDhoF1~}X@L? +z{QDWK5n~*9zf*ptUU>v#1n+RlD)*M?*MYa*h&QM`ZTDLkH?qB}^-q9yU_M9Og*bGa +zWV4(tH_t*#oaSqFDIMzQD#u^0dm=Yds!dL+v(g5Ky2Usty;%vV+@Y)hQ_+5xLWgO; +zQ^g|{s96xOE~(JUb)iPPfuVnmg0SAL*!+<|S36 +z2{+r~mJ@fjZzyo4;uWewf!6t4qgiaBD_p{}d;;|=zo~d3LRIl<=Hgr*E}S-vWw-sy +zT-0OLA!X@=Yn-z4e9yzGP+cYC%_Tlo-=yl(OMt%8_oG!Q +zHo2JlT{;VWJed(^(*ky=(r_K-JBMBDE9aoOi~c~|*V*OncSi2>4t +zTw_ZwF^%q3R8@Tkx>M==2hiy9)p$Nv!OmaE3qaP$PT)XFp9fhe!_**>KT#^{s=*vP +z$KQj40UWs=hDt1?3frQd;?slmb-Zm1n^D8`u$7p*N>zTQQaGswUWWy}xfXMmOsZb1Eb<@>Y;D9mdfID~<)4RWT@4?{ +zD|&503tvdS(QdvnF-vfUf!To=KLv3Rtk`W&$F?m)cemYLz5K9k`+ +zOC_;L`o4&A3p}V@S5&<-GK&ai>L_oB3} +zFNT_j$=?UEX7(9ptH7T~7TpJFVJW0S4hGr(;hrGZy$F@K-pJ-jO3zubAEg&~>|}gP +z>4h>bKWK`#%vPx?#0@-gDFD*JUJR|O2d8RtEnpo1n;s@02kg%QIEuWw0#K=I09QSU +z-(>Nd?ccytU%EIwfEth}m-rJ*eAc%*>#srfZ{T^Zl)7-jki1ycl@xDYu=uC6l_s%z +z3mWdgFP;Rj7or!FeiVXhi~!d&_L*z>#2YMX +z4XcP*YWx{UsRy2lC=@vh!_rBVRk2yx&GEL|(lvzOTWm?1C>{RDy5f +zdeC$SYXrgpQ`l%3UFzF@wjYw$B+p~KB{_&&bB0AG0pWV(pgQstvhmtMm`S1~hVZ**x> +zt_Cx=Q>+fwAKzHX>Aze~1!Xegl3MJN?Caa@l=&}bMrhb_D_!eQbw2)Lh8X5=ZkU5A +z_}4eK0x0oalVK~YjyeH|VTEgL5m>`$ze{S9OLCxZA(e6BFdP4j>o^~hvERYAIrw1T +zBMu&$PUpwq4z|m|hx&Fq_^;lto@lR+!5wU$gAenip?-=nc+1%sGlTFUt`5t}PYoT^ +z0d;bePdoPZY%{Al0a?~htKBy{6yb@CU|^iOWFDyY`lY?;+vIiTcBTBAWKy$t%ELL(T}VLDxq!+ +zvO3lYKx}@g1BpZDnxg<@ak0t4#yG7%ZhbB4E>L^65_l=Y!zf4Gyy^u?4 +zflG3dFND$)`=y=8nqZlgHbR*<)z=LO(OCKrpj?(Twe__Yy45K>-FH9XZ0i#Nmy6>T +zARwM|=vB0G>_P(BsZ(y6`#P(Jjn_8!HPpgHUnNS_yGq6_1N^kgd8nCz540P=#@mkF +zhc(18a=)-QTs!7%R`@M6>2A5WRqUNo|0UX7-vE??4>0!E~hrWx{WQH!y|?a*k|*vX#U5nhMR_uEix3 +zpDZJ_w>_r&WKr0KITc-?r5qW9JZAio4zD4Tpcn0nto+1Wf}VK(1rXY(@sR#vUw +z{`KDNNsl{nmt+6quh=x~z{`uDhPnZX^14x0Qgm*)X0kwz&qtO +z>7LhvbUGSc8cVN57CNkgs973LUiTm*k3d=7pAq;cwLXhL*qa_d!3|k$h3H_tN&TTw +zT8&wrux*uDK!r>8G+w(b6};vVxU0`ZD~QcnI?MS$Rw^tCTw*}VYG<`YuXE~FKS^~Q +zIOqmx5?iTP&c=j}bRz8MmqeOH32UJd~vZR+l|-A3fnc|%Mg +z92U5KuUg?(eOyH%fRkmer|^m)ZC~%2I}+Vz;>sNZefC*Fa(8QqtGQATftXo1vilBJ +zXJPMiTM^JYO*`W4o!)L~N3Q+UmYH_61%A`NphcLL@)27~$zv#{m*8E$1(n&q-kz_3 +ztmJ(Ty2DO<6FDFeRrjTp)bZ-V69JK#V3t+V$Qt>~yHF%0NV$~Yr3m1>u0_$E#zElL +zE6c5f3(zm{c1-VIk{_3k?H2JTXwie(xcq$1{G_e7Eq@&NX!#4`TmA|g@n-wi+b>yn +z2{%Meg~R#{Z@tk+vE +zv)*gIC0G@DATv@iU3Lzw4qr5{4)sfH^uBbXY{Jtc(&x5QN%Y!q&Fe6|AH=uLrw44b +zr(mXj2`E!ne%b*oZ63ExdY=XDw|~9=Yy{G5&PgWgfK>IntXN8Nl;*vSp3;(>OQx)& +zshZ~?g05|g?P%%5eKNef38u_F^DHXg{`LI26R>d!ekTcrtXvXokgF2Cu+}b-#a7G_ +zcy58!?S!>Xcd}jz-DU?7M#-$g?8tJ~>|pf{9@QJ-;OPl)2OIC;Df*vHaQui9rw>iq +z9c;RTr|KLSYK_rxaM@#Xuo(`Xro~^5p6~cA^hr=Nn!V`8UnI@j_#i=)IM4zI&d{ns +zZie&rb_d2;&<1@mXF%yb?Uo_6IZd0akG8XZ +za>C6tJj1u&S<>XEU3RvqvVq9|fTN +zS(q3~qJ1rMGZSs=JBUQ3_;}$~ldq*hH(2OI``0V*RYHxx4?4KXFdM0Z?Wg8K-vkFO +zdctZJM~`t<>0`Q^0Vp&@siFVo9@RrW?WEt?G$$akz6r%E7HzfM9nPZXd`}@6()u>gz3k1=AjG +z2|nnncbTQ@;R{|}>%D?O%XS6(?BBo!_~JWgY|q1}J1w_?)nJ?NQ}B!Un!xrnc&^^X +zVGUE6&!CP3-qgB38q&BH_-Z{Bd*6TE0ht=t&e5{gQRAu|{kF)D6YM(@R>$AP{SmxC +zid#l_6S=p;Cj+oc?#FUXooX~qy`vLqH|;28gM=>Wjexc=mj+93P@zs+( +zwv$G!H1O9~Ad=3gO0_$v`nYJZWya~T39U?wPjG-btKnF*#SuA9zmrxt{X05AZuJ*I +zzl(NQ{nfDF0UE7_2dTfk)9<9io&L9Z0LJP^57@^=JFNb$(C+{XtcGMbZA4e6-$`dU +z{qKC%q`w6EU9`jM?}mD}*v5P;1>P>*5y17dmb2IX_5R`G*@`Y7K^E}}?JtO}9FT~s +z`x1ahQ0Ou|I_Y|+WvIRaT4aUzHbAEH-(jUY9cq}_noijWC?_(55TIeKwfik-x2<5_ +z`@W-Dy;xD4?0{4Br2Y=ciKm+$ek&U@>NIT9t;#G4^L{(Br(0>hLp`PI9LgU<64^Msmd2BhW(ZW|JY=3AV6J +z4*s@Y)&y6Vi6JIugge-F2Y**T8H4*UDP&bJP9@yIc02fc`d@%cSHJ5D)7OhbdQGP$lE9lX2IK9{GICidOW1&AUj$LWl-Oz^O*i?Y^b}wb?8Hb7q7TR0&S`o)S$FO-T +zMlV-A318~?)vC{4tD1ZnZP4V8pNS^yeT4os_j3%f-bjR=MI4@EYLK2*jgm|8y*;Mm +zbsg?p-p7K^e6$%op$o@SvlNxhdW)L2wZ{XlvdmZj{{r;ggtd7~>a524!HV9PpI$-tj`EWZV +zY}$7(zimon*IITr)himu9%b2GRiCUlw&`J1=^8Y>D$5^k|9YSMUPP<`iTt`h1NsIJJ +zJ5R%C4%7$8$Kzmjo{6E_(w*?KP3IpmSGDvq&~l1~5wZKW#O_Y^T4S|xX7ib`G3;I3 +zH2Xud9;5nfjYGl6uy=bCqDdLfrpRWgc^;AZZV8fqLF<7?vgPzBh?jQ2)YiPr!UQox +z=dX@>N%-Ako5F%Frl0*12J11HT9pVKkLwY2>Qgosr$K;R)Y?77QvL);eWi&x-2U}4 +zyr+@!fJFX?GXO?+TL59B#qMTT)6%;Sf%Oi9p)Z*y!U{tbw^q%w^(#c?$*tAP?JTiY|0ec^r{Fg^u8mMu6+tnRiAF9Yq<2x +zvc#h#@+`5LM7||n2Qj9>5<0eg_$a>lxLRy?gITv_H#kQnu>l<0q6~)gJRd@_`eo|S*zuhkJvJ0LQmKb9l8;*a8Z8*$wuo95n=C>jjCdg6HRy))2`^S060Kq +zmV!9u-ZT;?zRm8b+Ynfbrt6N-o%jHh1-$Xp+;nxoN%~y$U6CnT&w`?f{6d}?^(1+9 +zFcq&3(wP%?KmcA{5Umu)mv|0tq5|w>Fef0r2+j_(TQ(|A(LLIt>+UbpKh0;e6PYlu +zJadpdNb9}i@!9S~34Kp#F!Uw3NjnfcMSfHy-TaE1<^uq^tQiWpU(lkT)~s`4f%&3( +z38_=%T7mST`b@C!Bj@}9nvA(}B?VrL>kqp!+iA`15SJ<5rk7cwHTRSzK8IM)F&?Fp +zHOScCs2_oQ{kLe{sC&bUSw}N;0tz*2Fhh7*MP;19P$LQ;8=6j)3paA`0}sZA9?+KC +z#%b#em**8~t(K+YNxIsL0nonKwHu`ma}}>}Py9^m1@Lct@$&!f0)xa?xXf>v$nQ1F +zo0);SaWGV_FfjK{219=bBWW$ZLVrVc{JO`F2!{s_KNhv*6mW2}w|%t*T{1ce)S{?) +zwdG~dD#g9p!pjJapq7HDd9{UcR5BN(x{oHICjpl_dB#~_i~yZ>?o_<%-cN8T#aL(I +z2h(t8sKZPqCRH$#1(UAtr?T(m?K{`g?&lku_0xp3B(S=Zr)-|?Q!#UnuGCITcEZ$ly$IjP@8Kb~(^ibX#GV=RhVVJwXaVo|#- +z)}o;Z;M1Dc*II02J{(@EFQYb^KMRs6bqT|papsx +zp!xKg$|holmCSaCBK>7^#C$7R;1I<+-5=9IgBDxKk|snSAjI}hn+#&DUv43*9dx)} +zPblB548MTD*$7l1kei5%Nn+SGOnZe@w46RWPm*k)9=dA|0?a29USn~aUBV-DIA9b0 +zBO@^3rx6gXYaN!9ufCn;ur%)12&REeLfq^SS`(y*!WLp +z#MW_W)si-~1!hnHQ)WBKaS2zD68r0?qXy$x&UHBCA){RtTk09s)9rvM&JQ(9?+I +zM;fIGHht?U`U{tftARYkR>{S~kR0Bk!+C5F0J?5?qe%o^u~uzSwBpMo;g!-HSaFzJ7&I)^@WW4?+bk|Xw&jP5IbH5Ej3Br +z7Kf5_t4#0JPrzoWN$L#3o|ueY#q4*s=Xc?kU57<{~i +zO>yvV<+mG}8#DY(XUud9o9p1;>tCGq{g~{E?f1ms^DJz!ga4o_P;R2#@3Q)948Fv| +zRyg=i`lLhPC%om1x!J;2JNSR})rY_zjltJi*aipxMQ=O=p7K{{@5Elh!L~T~K`nNB +z$flWKpoS)QL=8>y0p9$>8ag)xH5B)*CizA{I2?)(-;+grJ)^e%JM~0{QcwvEPzsHnOR|H>( +z_TE5=F^vL0Y}cOat0$aY`x2t0IPkaGN9X!P;X0@AuY_VkF`b}zKz$I7*0n%*i+1CZfZMg3tmZ>l%~!D?YjCYQYP(N8h&?L19(@e8HxIH^u@0E=&8NEGZ(oo4dz^|$ +z&3~Iuey-F%Y90mVxB2|MUBrL7!0aDXCW>3N3Uk!Yb4mg`h*{A=|!CcYJ%Hr-=!zK{$YWK|svYMH>+z +z@-^1ux?}_`ELO>Uolln<${!g(HSG-*iX1>J-GPyO#nDJLsZK^VF>)8Faziynvf%(- +zVW=sQ0Z3GLHq`XUNkmpYBI(VD)H8)H;=JP7DoW7HNIqY5x`m +zgXyAnB4emPh+%F6GPOUI2e+f|mdrLDQ{% +zp1IX8^)x13XSDx=ILT`r^O}u2@s6ful^UcyBMeF-NrM{UP@@Eub1^NQEhu-wWlNsf +z+GCH6L(M8zayFaBpY#rzhop8c^+db|yScYAPn1-HP&R>wkA_BZHgNtZ5nhjAR}@}~)!4$%byqLX%8;QGI&JJnKvS|`fed;-avjIP?Ubf(*Q +zi(ULx1-wJ8bs|6i2Qf^g{+>=d%TznQ_?Y%3>)}~a?F#iLEc}#v3mJ7AJEp}zwv%EN@-33XnCxpTz}DE%YPT;&jwabZMqWj7J;~PzegLFd +zdx^*J||6%U^}Z~df@M596yh8uE4gAg|iLI~puT|(&6 +zb#ryy5OQw_Aq+ygx#ki=^nJhAUi-`#_w)VZ``34Rb$bB(*S*rt#Ok*5$_#f*&Pt$J?|v#&xiT>JUf958zP`*>uU3q5OF0 +z=qW>E8=RH*tFiG=Mrf?&o!|I%Ni;DK#fcVK_k3FUyTp^-Vm=~%9qJ+Nm+gz)&(0#GLl=*W-J +z7v?E~rR`p=3|oEo#maDUf_lFTGA^*{xAZmi-&?@9B;)T)Xfkg=ecvmw+y;uPj#rV` +z_j%Nm@_C=QvYgetEd9?L5%)^as +zU2_abulxt@f&+taF>p2(ryg(A>B|4X66A%fas)n_{k5tD*xreXoQTT%|J6}LJToY; +zX9n@qp?Kq|L-EE_hvJpKzMSz`D2U4#Sf&>qvk3WZ$1Wpj*i6rcga?AcG0^QZFRA|eN$XN`y5$PKYvG&}^)Q6vttTq5i+ +z5ZqA9Wra7OQWF)H%MN=IdAQ|r!_z1mX1P>Y4|9p(mdgt-><{h;%jJhBu|y*+R~YiK +zwZv%46@~9m=NQWshf|nuoaIWx3FMBnTv_Za>Zd=_L!xXD-D-209RP9 +zEbPuuUS+xRa3OozGRqAOzoyQsEms-lQ0Fz48yP;pw)Y3ijrEezj9sP}YuD@tQE?fc +z8ip|%v`1XBmm^=sXPT1Blqb;oGd|apmQ1-9wUDvfrbI%fTn4`~zOX5=fGHoLmNWKf +ziebumC|Ab6ZHi$Xc&$!EQZ(aZGX=i1p4%VCrhOuhSG1n(W$ZPqHTwEr^GC>Y&OLXo +zm+`gDAI(GloKsJ}z{~i?rUY$iV+3NJu}^KZVam%)`PQbiu~uiGh|!F%%nNC&4QZ?2 +zi7&MJliX9v&SQiQ*!+GcYFxsy{;VnVBl`oE^%qT%C~l|KgEpnTwR$Olvs)>^U!fJ5;i3&H6>OvY)Y=R +z8bc?KW<>nQ(^jKCn*k%7>C+cl&Gvb6Q1&X8wUy0pI@88trnJ@+Dg6g5S&mJ?r6Oyw +zABrE%Xz91b8pf6^nYNKDmc86t5VX9EL;P!jX>&4LLds_ggn~8$8NPPnf?p7Aa~{jp +zUNqpHxou8jgY4k531HK!%@qh^MxM|6eRySSn+%jMqoV}PFUW24HKWu?^QOGq^%%vn +zGP?NrSQNF{!@_j+?M&#kopbgAFQY(N({}b5UPd?N{I;{vvbrl5X*-u}4`rimMzD5z +zDjRFFhemrT8??C@HZzKqjknp#()E^rp*Y?l(aiiw@Fo=?-Af%r=_0A`@EJ?}jL#qy +zMS48N2bB&QuU$5}cr>%ehs-e;f$>r!@M%(m5KljK1U@6FiTI4B4j@M?^(;agq+Z5n +zJoP3%6RF7_jaqEmsx3LoK&iZf^KbjOUqmSZ-eUPv%=?xdoXE7ooIw +zTCO@Ah50n|F3T+p-((r?w%np{A!T)zTO2M&bIiPloUBZ)qlrIS7AuprWbd^sRwe<9 +zzuK}`nan{$$h_aOSeblI_5sUcWs;!PHI~K7q&3+;Sr#jk!_mnzAF?b~CQ~VW*s@re +z98Rwuu`E_5*RXj!YFVsImNV}<%VK5HiQvaAi8LX&Eq-C*7)IOO8;TmrGEGl+0B++=7;|z`@ChB +z`{5g8U$AVgAD%!jUbO5AKlE6jEtXyBhxzEinJ-y(l^;II?(?!`>-=ycRlQ=_)qdu} +z-@)gtmR;kAcQDMaT6V1;@&`1T|FrBnKfD{`P3FHWyWS6bvXO1G>;^x4n(S+q-3Yrh +z^txp?`Qf2-@(s&whLddc+bz4r51(Kay=mF4e%J+rS>{`o-R6g1G4I=!-R_4U(a;Xd +z?(oC+7>#!D^T6Q0tq#N~?-S3AxDE-*72mEj(HGg8+nn-vAoAWNqE{%i{diAMgmqo%+EbnKQ +zT^-Nkx%1&v+3-`?S%1-lIFjkdtUgCurUtatlmR^9Ql)U&qB`^L@4a-6SQ}W{fl)U&q +zB`^L@@pYDgjnGw2O`g||KexsE=GRhR8Z(^tGh~x2Fe|L4lF7WL#d0_NH(i-xWi!Kj(DKbu+=ulGs^mi298Gic9Yoq}4&vdFi-byjy+{|j4VOdNu +zPq2PZuTDHN2xfqemiI&}O!n>*YB+Fs~>W4wbR9QoqaYob7$(F^8!ylHJ +z*_OqOGZ`Jl%&{zHoY~Yom)#;#fElL+*;DS95@9r}>jw6;CxzXIjR6LQ#dRA4Q31OLo&(D!x`d;T)tU+3sh!eb!&9Z>V@?%W|mkT(aiJD#zF5jmP>>& +z$}V;KrT#CoTy}Ud!+E*oa>EkZUS_$JtY)nMxDqLaG-;IPTs=?q?gBg +z<2>>1?X;krf)4gMdFt@mXJUxJud2TV9r+r#j^~3V=jC0H5>X_hEpGIslRNWSfC!Fu +z$bYH~j(J9|hRyi^bzyr)oP@;jJ66Eg1M)k;+d$>g{#=&VkU%31?Qf9foB4< +z7+DKuJHUC~(Zg0nU^A8BRa(X}t%hYu(8`c&;0lRHw|*QVp2Fi;?GJ&fd>VSnC*6ftE@p#ISi!l#_B58f?B2sM8*FHjh*1tSSFMMJE6j|EqhP@bcK4^`ia;=whnrNNd +zsP&X4T2B?NUbp|UVcw72N2GJ#-z4_~jk(t}$^9qI-J4CmI%>@6%>56RuR1EUg!!B( +z!;IqBp-v91LOdckb|il_LK4X`wuRn|oCRo#S;BhV-)9s0SIn69e91aq{V(nKX`tAS +zAF%ECXsWu~L|#KO+wt8byf}sJ`{!diJ<(?S2FXPnLZh>6#+y5VKE*_`+M&JhfRN}Z +zRxpO0<^dBafPfmUp>9#Oonz7Lk43s|lE>O6DTO`G7W^v?htmav!g2=ab}x&u85tjA +zMv2B|BMoo~8{qSjUN9eT8xwVfajMv2Y5sm2&o{6M6iyom`ekW>P|b0#+eB9Qd#JK+ +zsal%ldrhirXJeJU-=xYu&??(70J;01%0{(!Ro16Tm6b}B6+Sc=sD4qpP{1Lef0RQ& +z0Ulf|lf)kXVPIxPy>5Hy;A7CY6#8tBdQ2c)r5H*}03NrxrB$zwN-yblOF6Q?hV1`H +zXMe3pcBLiz>rJw6*X*A$Y#~|;k23AbZ6k2fcV23wyPSM3#-A*kE<=~4z5G{7k)bFi +z#|)cGprXqh401(Hke0TCPEScMz|GlSmYQ=G?togl@CP&|QykmQN;_*1=-z@U+|78G +zSiFoeeT4RUZli2ZEX-@XXFMv;^Lk04+ex9#lwyRwg9PT1PjGXT6T>FG2f10l +zP1ooi6rto5$X*1fWD|%zAS`^Z!WtaBTeKa_2)uNc!l#1p`cQjH-O1B$Qxp~GZ4SDT +zP_O4Wmi4-raqh2fQjC(0xT%V8)k=~5PvHrt)N+N4b*fjyZl@;?Kz1lVUMU@@QfVbu +zK)1#=1JRd7tEpKmB|C{o3B+PWE_eEFk9`AlKcW-(*N=h7jpA)={m;gL;9#{5zADy- +zZaIFHOTR1Dk1j1`POs+}7W9uX;|dt<*jQg*qo8aTtEHggl!L8z+U}1n14^8tTg{wu +zuni8rCML0R{AQQ_VC)5|NjoN$wO6GL4)sV(D(e=+NP_h$gXQ%+hNIHsG2?t6+N2DV +z(16*&*T=2{v_F>!r7AAdZ?iEb5p;aHOMfQjmHohhAPkJtxn6~_&yd~;l{i4UNQ+<& +z)L)B4Dc=M|O?RrYgZtr#lrP~8I%rWdRXWe1S_NByk``k=hrWR|DrtEZevSvxAbE6m +z;7U!#BiEh}ACR08dB@!;FJGnNK@bmKwok$UdkpxeLNQ&^h!$5ay_g +zC-JplH-1*UK{aJ*4nf`vNePiJ{x67R-UA8#4&yNEYG!(;#uofy7pQn2!j@lv_yR;V +ziElyt3B<71KuCqT%$r=aTE>pc*9uGV-TBgax2v?8L2Mnn3vMr+TUdAXW#% +zm~?tU**?lYwcZN~btffgPA6++JRE2%I?9M7~2#y9Pd%Yv2wc_7!}& +zR5QS5R|gnRP-x%P!6!7rBh#bz!9ei1WxK^^gvu!QaD2JKX&GSac^0|ZD +zFWH8~5nOa57tQqBi~i2jElfwB{bL1q3G{X?LxU?zsk|Amgn|ATpc2M8{v|eA7-xrG +zm(Mu!^>EVVDYtRn;nWF0;@k&9X=0}mWvx1ESy~3u&!1TU7_DAMJgq(sLaaJ;DI+y? +z0D&BCDYsVlsnu!$h}Czgh4W0S|In(mzihR(4lvW-=W7LRO8`W$Gl}iZu2-ngvChFV +zpDzL^*#p^9!g-+Cqa?P2cmsrZ>asN;(Vy|5^OSOLB-`Q8W_tY@;=xbUL~r|jCEn5n +zXF4BIHUs^uo%tDni23CtXnq|CG4HZeA&WobB<5hCD7WV4s`+aDR`WZkiRP0HG%v%z +zLWR`mw>iw;K!xnEg8&o!4B~sUp*vWegCFjfpiP#vge#X39szMb2yxV*Yw75uIDvGO +za$BRzRLv#)@CB3kheK&k+>gU4uZ21J@Z54UFT-W +z_v+?!ag$NrpxR0a{V@{jp(Q%XL95cxEefq7^ruLvgD!N?nlyBWLTd><5IMm?Z*|a( +zY3Oc+ZX)#O$dwNIw1aL+L-#ARfzV$fk2&c34tgLBO?0)josV(H9E|LAP;b9R0Gs2w +z2umq+3ZeMXQ%{XRfrAcBLyHtzL#T=NbI{QaTA7BHD|8*9e)I%DhqC9JY0^#>r-9QI +zSWjRqdZp8OI&?}CUk<`n>pX>Kqvx6+`j~^RchI-f&_xQZBs3n~>7WN4wCfK}>oSE_ +z6Pk#|u^f?pek2g$z?o_2N`=-Dni1{ipf@|{hBS1ILbnl`89mWK>m4-mqjO+`LOt|u +z6GoRgXfGhdfk|oT7KN4)nib{Nz4&^*gWg7{jHf#lx?8_Z%jm}r{&xreG!1vKeGZfPcn7~Y4R^3C2X7TU+rjU1@R!nX2TM74>nI;G +z5oiAE;B5{#XB@21!E>UoI(P+862z0!a0e@O@Z9JD2fy0EA0}L`njLJYgSW9;9B(@4 +z4}^M$adX)XvReup2iqR~;ej~>yGB2w4}1$$@FPF(9@7GeW{NC$UB;Qt$VPuV2IPkUlZ~ZZ=}bCk +z6*W%1$(f|wnq2HkDF7+u7H3jWwv^7)I%o1(zjvQsm2#Cc>7eyehyW-lCFR!SN>@sZ +zrdrB_&ZMAhDV?dU&g3S)jwTyRxx<-s&?;)2dZ9B(xiz`ol~Mpw%7MRVT?)#U(wW-r +zO#a=^Dg9L`cRG^}S}%pz>r7H^O>T3g#F(k2JkyyJlr5z*71gG0p7XDy$;MKqFvd%Z +zbnG}>)%6*M0g;fD&Uh;eO +z!-&OttN~UodRK!O$xCgAT%bApsj_ON9FsIJxfZFUmbzZ?7gHBq-%4E^RT@CZ?#E(9 +zZfkTdg%ya5Q?)*dU}ybh3d_bwXSVtGL7`nqOc7)q8?MZFbqZXo-{v)+FBxnKu1|v< +zXoCa4?jLLh&Sw~93UHv!4*Z7SRBIK1-dNsTa07o`cRK-0MuE(n!%+0jkUk1-TrUt6 +zgYfYaxQgK*jyE7Cg1DZ<@gTk;aSDjmxFI?291x>(@!`oXz)tmIzw@SFEUOF_xVjz( +zyj+H#NrDUP8$d`eblEBqM}NkroRxUNLAkAudev7W0BN6pp%z}8!(vxE^G^~_ +z^Y4;i>3;zsrFYpjiT2sd!O~N1&6lY@4+FB6{?M439|r=Rfmc<|Y$af(GWH7;jb^>) +z%OzERxui}C)u_Xi5aF=F= +zkK`!fGSp}We+F+*HX4^rr{&GGYN=N=bAbAs;nmK8(XsoS!UGZZf1)<4beltskG=9M +zR4GwAR9epnPL6#EgjB^-46?*{uOhNBYnWqV^9E__`Va`I-e{oJ+XIADugg-2EdGq) +z%)#oV+(tTjsO>B@0+7CS6t%E*EhEYnA*HZ9{WjBM*EwbD2$O=2ROwiUs*0_5s2xN} +zF&3zF9gA^lY*4utqf=aqF@^+N=@}rT-dvVNn$@3?#at{3G4?uqnF?2=K~kKXsEx&W +zl1STd9Av#h&1tcxp>P;mtVHqyW}*v`gu39e)TOmw?_40py0AutPOmndUI2&-lZdn~ +zY*gq@=fZ**pEZ=h@_gdiUvDQtH~t1fD%54Gm-=eW9E<|xwn8_lzI;r&YW_27VFWtz +z^)uGIGkd_9KRdR;nI8q1m_MBa&0h;b%)4w=qWuPEo^orxUiH;An*TGk(EMJata)cP +zPp2buZfwvHEq!jLnlC3o^D{w+d6%tTv}ZF1OHa8q@2S3gOqp8xrPM<6eq= +z^XJ8$bml)Hp23fYYQ7f;G4HZfiT3NAdCIN%eAQRiXnrcS(EK$-*~Qy*g)MaEm&SS= +zhH;Ban}}RgWkvK>jf2)x<5V9g8LcR{CTFUSe9W6z^l&TVaafX}Qc$*QI#V^y +zPFXgU4cVllOOw62@un>YBh18m;JRBnY*!Uuz>GNnCH79r4YJoeF3afNujMZTFT}zLCS^z)h-?cXj>)5$-a^zA;n!77j8;;mv7BdF5La!CN=p1ap9D?!xIk +zn!HQDc?)vPP`yHS!g>{&d;HN1kd010iw#xXxgcEa8>b>sWQRnm+5lCuhI7JwPSpec +z&5(&YBf%DRa>L7EJXK^K^rg}Y)!=DZ6`OUwafXVT80=bsQIgYv6V|ezPxuF5Oq5jd +zCf!8t5N2t%ZA3i&>xCadC|VgtUvqiXI17b68jJRBrQ2J*TprBWg_;^A54S9pr&Bt% +z056Z5Tp{u$;3X90YImqB-c`|i;k7iqj{uU^-nk`OyTC^(Y^;M{9ev%wKLASLc}WMK +zqOfTW{)ebJT(v(7l)!&Z!)Ge2%E7OVmO6M{w!%LEVV#+$umui&eRP(CU)oCH&w{Y< +zg$i5b;5S6CbMV=%6`+3t6!|Lw1Gm$xhJQ +zdI02C3O|bcm$ZA8@E4Pp0cDx+`^n3Ib9KO{=?-?r0JA8CmlkVS=DG0P5VSY~505lY +zueb)_3HgYso#WOie!a_gOVA(rq%kffOcts2Ds6D6)xq&V$>3VbaZ?(WlOAxW`+_Tg +zYBGITEQe}`N%XX}WbO|havGzek^2uRm6kcw+Mv@2XyhJ*k!{V|sCzy`A=#)zf716( +z7v*-+&r`q@0Z8XKriygoV~2&g%~a|}(EZfLzV!)_*7`z) +z);Q}=2B(fx>s<=e`X~_gGEY&9^xL0w7{MHrh_TieH&dzB&!;w8zl}({4Yf?6wd_<+ +z2X8`|tkry3t3?q>SspsrHrC42M}U$@Q*Ntmx$4OtkY2033@fsH5R|QujSAbW-{!Bu +z_fR&B{@VqllWcQ{XM_2pnm+F{j8B9}EF5%;Lj9>DfV8^ga(Al=oGx8NehJ5PJdzs$ +zPQ25Z{Cn`luT08*Tw$SBfrD>PoBbQmQU%1=D%hbyr&CQY13;?aSt4yr9AvjM|9p@f +ztpQG?n{rhz+XENqxA`O(;7}_K8$5gBLY3A!)Mvp%KuJ?B=%$Tn90;jZhn~Vpo3xZb +zRs`j?Ru?&S0+7yl4z;imts%;mz*$@6tnLn8bIP_6CY^DOO4mEo-r##z0vStWakxpP +z+hEc(1ntIXBxG?YJExl!k&SHx^G&cE2x+oLnk;dZTthn86u|tc^MMlo_ro7)m7-8K +zSa+(z-TLiMZCsApM!CS_jR>YTTdnf-_CIUc;%5DFTqv9_>miC~I=5!d5tw +zVZ36Tw%hZ7mm&BL5K>_dyP{5=3N0F)H5z%qh5tJ|FQ+<2$)O{_N=vlX!=ZTWjxZaQYGz^PKJH^P`3 +zv)QD#D{Pm3n?vFgX^~C38vi6dV||=!DGuiLwjDQLzfHIJ7QkiPh)M@$EG0G$no_7g +z^-e0587f^fdCl~xmw$$r&1{?zb6g9&x`&ZXYQbe&tJ(Y+1<0kLz~CbD`}$_O_2O$b)yfqN +z$4PCW3axi;jEVmp3Y$zE=`n4yLK@gDr{3<&HjZgq6i|v?QjPu<&ZHgFWHWe|!m0r? +zZo@{4)9W5ncZdTIG`H02|xx@o|`OX6_g!*q9wMm +zd%WR1oTZ1wgFdNu;&ztZsDHZ;H1#s)_Ys +zEVEd4$n|N#t;|6ob)2SRN)Q!-3r_1OsQI~*_f;#kGMf+3VAefek +zu_10~rcwuwXQ+)8Tu-DOubkCv-5xP_#LqeUSL0RslG;JHu{=|c1WF3rcuBoq&1Pfw +zSxrVtw7`PWogOt+=uF-juY)of6b^NG>GQIc;b27$es}yWzz=VpK89Nv2DM&3O*b6) +zo1XIN%J3&W-Wxcw382~n{Hw4Be^m4uuWy$@_BeoYcX35E) +zm6m$t%QT&(8@N&#?(M&%psOXk*VmiCD_^B@iDjKK5~S5l)Rb>*D%sRD&*r8uH$h4) +zYjlQSoee)m!o{jT+P@rr)ix2Hq{4nqSl2{&kqY}e;pQg78=YEj;PxiTk7{zM%d=C3 +zjPHw9h(_j>?`o21;Jzlzf17K_b|V7{)ACqbn6$rzO@zHvnD)1oi>|(9Js1u-!N-wVA7f0Do8N<@1bL{P0(9t(otj +ztx#TC5s}+yh4RJ<(6&uW%{KTrmo2+VHl^h)7mmiTXDsamZ&6gd?O6m +zqBSVufU|UnE!r+3@Rz@O5VH0UY@3@21zqsgi2eboLU}jK0NI(xPxbjalA|;F0{%|S +z!jGOp?la}OuP+DJfS;~+yNc8SQ1?=e{7Uwh*c{sHzM7)%AUgUQbQyD~TFx6##&i?e +zjvPhFEHLs0CU3ksG7rpywrRR1S$>3dpQl`zvrok)?hcFE0~=={aq1iWkZW!HTk!r3 +zi;7XGhvO{NHVBL5cYcq=3H}EB0Qo)1qrwlx&ru6Mr~P%3dDt+?p6*{oY0eFGXLcg6EOW +zAHSBo2BMtAZV+=xybod(h~D{!V5-r)TL)Pk=F>=P<{ttX8`Q885W_~}qvR-jNX?g4 +zgK`->Og858$Sh{M2I)m8&9F;A47&v%CHLTC8j_A7uHs>E%fVIr1w_|@G})VP`KTRY +zt?wSHUVIT*Nrm;04TopLwu2b97at|x=5|1nIg +zm<(v;;RXlmp+ZI%CtL1h@5Q8(4jD{cvLSo37bNR*vcO##SCr;MDDC~}%gmiJWj@bpVMRVojuC)0gR^t%+ +ziI~U*%G*6eJt`S?M +z%TUyE#n;f4nZb3)a}4Qi8LQt*+7xq{aZXKmq%in{#ZLWfvN +z#E__tM@`y=*PDaiTvfW*DX$8?L{_<>=wu6>Y=7(>s^xCNTBwzFw_WtR>`nAbG+la) +zQ!zW}G7FJup58Q?%N1Me^2`m6XP)Ni63qiN@0C7`qO4bZ10!&D@HFyB{9O7br>`iu +z6*7t6F&rhN7bG-7ICfg%XnF*KxLL-L-h63JN=5k&a!#-dipukp=ZgohveJgb7ci8& +z79fl(02%mpH&kv@pSC;S-i!~gLRp)qk6ULu7T?O_usd9yx8kQEPsxjrJwtDM{}s`2 +z(%laAcD(h;(A+$|Vhg|@A={CB!~*={i62QQnWcNZbhGXb^`t&rzQfjGKE$Wx+}WKL2q`@4Qc2~g;o>#S@d29t#{A}t3@1GqtH4+cSrx}puK<) +z2PUPVqTfSDCUj5q2M0ahL2pY#x2RTcIG}r@g>y9me|OMbY3L4xmJ<4(=wt`Y!bl?y +z^x=>rcR=e(>XZA(!CY(2jjw76R#4Z9MJH8GbRW!DZxRpgY^l^H0dQwi`chTpm +zkFa~i>UUi{FJGlY9cq7c#3?{=pYj!2EGp^Kf>NhyMW$aI#SC!3IzWK&eTQy4VYdg +zK@S(0*RM3*5I2IoTWQyxSI8dEGJMJ|0WM9}X;ATLP;9PDyVW|ui=Y>gXx++9d<$N$nA#+G#pI1P-f?mj)G4uB +zwG7#=1YN?q91rA9;RYDIg6$JJz;@S!aW-ql+K?1Nli4!gg`}(4z7mPncA?s?F6DdR +z%2<>5s~QevC5d0=p@t(EoqqzpBnhJX7_9Iq9oGR|MR!fA=m%mdWYdR&$Of8!vUnY; +zD%VlvplAhEve6s_+AHOY@>VONo`@0AcZsM#dUuqdWE_a8B>I9_0-}7qwxRWi!oY3H +z@HI#`BO@#6xB9k9t&xHzcKr?`yo5?u#^l9?c01tIHjhhFc{ +z3!^6!&8hweqB+%fnE;jY3p)o(D?iWv$a)+Q0zI2hZ(vH>61&J+=wn@8iBF6!4Y*`* +zjgf7KBJQrEDyRAUk=@4}So+&{K)c?v3^m6;ZpY=H%AJ>?7GO?11G_AJ3XpQRbg9C7 +zyEf9}ia`&v>8EgmQRy3-q@Otu>6L=vOW!OtV}1;y7*rb?^IANI53=%t(~e%8R>zyG +z@&TBUkQWX*4|kyr@$Xgy!jzn8Uzs;Efw|lJ0Z9YSC`2C1kC=$w|6m{RCyIG9XTUFw +z+}|J_a6O&2(of0XGywcbg6=;FRk#PSU8Aw7RLf>|;`Ies;xhBSAa@V$38E8IkPH5h<4pCQfxd+NL=oaShDLCTNzIiyN$* +z>i4Qs4f<`yB-R0C=P79QhLowhU9}BxZaK=f1T+==iKRM4WsiWRg^7JmN97dgC||AG +z4?@SlT7|Ya8|OwM@H&1B*{JE=kZ#){&VB95Ew}l6F>FR;+i-g`_=HQD_AJimcW}8cyHr~ES^JMcGxe0i2 +zuKAJFWMjA^HLEiecyr7f@G5hWZw&kTEWQAD7T->W2&q{@y#xxlok%@puGyCjV7Uddwk>cD(E^-pj%$h6b&ZkN5}UbZ +zH;NyfVQsVGZ3s@4)3#gVv~A0K=WrDDt{j4T#II`L#NidVE(1|B3Lnk>4xI*YG=6Oc +zzU+C|P0!Ht`%wXY#XyX6BhisTMiu92RIz{C6nh#~LQbQKeQegi +zmkgdp75l_|2wyU0d$GOd04Ogr8sxtPaTq|M7s}~9p`6|m%IQ6!oZb`a={;F;dQZ^f +zG{hv7(|f`Z9OXkfy(g5@dqO$ACzR8BLOH!Bl+$}cIlU*8(|bZWy(g5@d&26$xPS@e +z^qz1ehUJ!_oZb`4={@07khTit^q%ll&^h4_eCCGs^qwp^y(c*CIXWb#_k?nKPk0Sl +zo*&BTJ>j89ZSdqO$ACzR8BLOH!Bl+$~{TY$+7<@BD=p5D`<1xmKY1dEnoAZp3Y +z{owZu9%7y3={><>%SDqsy(hTXa)~5Q?+GrkTvn2&_XJBUm!0J4Jwc7-a+5s0C%DXV +zsbrkoQp@Efd3sN9h2`>-JiRBl%5sHCp57B&ZMmYBJiRCQgXM}_^7Niyx#dce_t5&a +zmMcq^p$`PtS*{%U=6J#NmK&Pn={-TM~_+>|6w?+I?U+_WT5?+I?P-1KBy`f{t~W+r)hPq5N*RY{)S6WnIGxk;Yh6Wn3B +zc}bq$6Rfh_f|fkJC%Dsc)k&V-6WnFFg-M>?6WndNMM<9C6VzF5agwL^1ox2R={-rF +z-V^-MvP(^pr}qT+T6UR9^7NiywPlx^2nj}x}2_CTQ3Y<4gt7|N~(j<9$ +zPw*$pt};oU-V;1z**cTt={>>2mR$`gy?Vs5YfO@-_XLkxcCAVB^qydyW!IS`PwxpH +zx9ob8Sf1W#FZGgxZgVA(Auc`LzxvFuip +zAF +zN%Hib;5p0I_(`7L6a2%nOZ_BI?+G?rcA1~#={>>omR;^Ad3sOqf@N#{{>s` +z(|dw{T6UeEg?yU9=T^q$}i%Wj5~ +zZ1meLyTwoP^q$~N%Wn0PJiRA)%d*@2Bv0=N-nQ&^KgrX3f*qFK;V0i?G~Ti7PCv=h +zdxCc@Tkj`%dQb44Wq0{Wp57DewCrv_$XM_9FayY#wo776Q +z$5!h=1YT=7y(egRA4$nJY$jiG`s1L^(|dw_#N+gyBv0=Nz9S5$_au3GPq5$0vaQlD +zol@hqmeYHJpEh9fPhLf(2S`#Wk7o#ewi%0(JiRA4Xu0AXp57C9G9%;ko?JR^lq<`{ +z={-S2x$+#I-V-F09h%G2dxA`5D|2{yPmrbT$ee==Wea7;=J52MAgSzx9G>12v{80S +z4o~k1+ABNF%Vw;$z6WdYn5oEaOVGDIThdgdLcY$At^!yKt>b`IwzGhW$LE~hawLD~Eq4!LHcvPC%@ +zkj*4zOLN$;@Fojus62-a3qR|&Y-J9ITyvDNV{=;5jiZ&FlEV?$OjUMz&P4h=P1&m4 +zg^Tc>`(u=ym%~PBj#aighfUTTr|hB}PBD021?_T<$>AJhj#qw}$>AhpW+-24pd1@> +zCn&$t+qE0pV +z({QbHMz`Hj&J8h+N!XxSfr6#vB#T;-^Khx&?onou#o0Yz+w))sS)A<<4rfvbSAG<< +zbVzW_$~&Gey@E4jprWH_dxhFM%4scIncC@UDwRpE6Au|SGU0V<$&51Db(SLSm{EHZ_$8O(MUKYbdx;|6N?+ysyCcsTld*$pC*}$gDs>%#^UtvH6$J? +z4J3%u$BsuEulwyF7HOZz=YALdOlG`wD?EDiIAo^-RP+FdTXf003{4m%dsdaqI29Ap|GDzO{#eKup-h@m9T2C;1hh>JiZP5^Ngh+ZIi7i-X1fX86l6`)en|IY%HvhzB} +z^RbO%vg1oz!}&*$J_)Le{s>|zh`yBed>Y)-H2ngI=u8l=gP2I-0}y{c5yT!42T6Pf +zV!%ltu$K2~NVEhod=?yDtg)iQvtiFUT&wB-r^DUZ%~wvhk=_PX67igP{~S0y0J2k% +zR@4K;G7vqQBYO^qbVY*zeCb%BZ!_`@Ub6U&+Q;e +zP6bg9qWBCDdqG@4Vn2w7Nkq|zD;D6k44b}FJcZSZs}n|wZU0UHaE*nc^N&T_+oWi@ +zn*M(l&C7lX*}9>B%d)bKF2?)6%|WEg5Ts{BYIPsHjKe_ocHk$c@m~MM9N$l!E67TR +z9OjTq95PEZ$Gidea!C3idb4CG&BqoU{>n~w86He$@CFQ^>cZG2fmS=+w}TzHpZ;AM +z%R!&6G`tpXkB(&c@UK +z{QFym#IW}+>@}{?_WnVeUedXBXMHJXg>*&!;IsQyZX}Z1q +z>&@jT_l|?gX@Et!cN~mjj_5R!la_#tC0@m6a5p~UCYE>|-_XFFWxSnxmpL8TGq|%H +z|J2YeyR)3Zo#psvn!=ss4DKw)Ki3rQEN5_MIlkMb$j)*Gcb4N{*c91W&fv~+e2=DZ +zXE}pA%kh8P6uYyWDLc#YkIl94CFIU>{1bCOd2!7NQzXeE(4^byx +zi${@ST3j#;kJl}K)E!Y)lDha$fjXQkMa$|ltZIa{p+anNhsl~&B8>D0^P +zBh6$Ypf~4yY&e)HmWz71JZv&jAtj8Q2Xq^vBNZEg_S*8WNi@mGZD~O{1#NiPWTc!r +zyhC_&q>rN`Q#{?z$LW5#Jbu!D$vg&W}Kb$65S0t$2c=Og|n+H8}M+;LWC +zB+RlI-6?>lLD0sY0%!$11rWv}m#9W-C?#hSK4DBJIX~-0;}&-wW+49Y66Ql>X@}#p +zRy;zse1@LZp42lP4dwBOg_vQ_s*wXeeKO!y7GI>VciP|u#NtEm@T3)2cGVJ +zXIN>LL#-4QeaZSJXUO$nB|6wl2S36Tv637=&!vwvFH;R`NzRcIV+&Ne*rCRm9~zBC +zn;Ubm8V4V5jX8d~OP^>41-~-J$gff9NDYHI+H{FyE!8}|S66_CoM~)Tt<_xXobDg* +zfNH6#M}R3{8~GH3Mek75PKQ4Dl0$bqOVQIn*jVpVl;=E(nEejE94M*dN^kK&ub5Sn +zrLg)@sJ4U=AO7LA{y?p&*OhRZ(|Zhlm!7V}{N`bGu;~tdoDHkv=eqRc&2?0huEXBa +zI#pUa8eUbIr+~0cbgH=D*i@D)u-2)YZOyDuzRso3HQ)ZqOc964H7Z@}P^Xz5Xv005 +zrDqiV4R{IK>1S(f#W{)XR)y9Py1+E;WGOlJu!VJ{RKWT;`5ZPu_PkORRyxq~%}$9!wKZ=zl!RY&ZC7c%Lmgs%a43nt +z3>Ujpy3e6frU+AJUyg`1`!BC*Y;Xd1u&7pvX=kQ6_!7Zd)ofl4lW^D$W*M+Oo2P5@ +z68+hVEp&N0nWvCPhRS0j$3`06k)hJTiX6PFZU4o}m%H?C=3A;scQY|IPo;|-s>Bqc +zb%`;a?b*zjgDrOOQXMLlU+&WTo7q&8Hr8*hO2%TTeIZ2s&>c0_-~5pV5=Pb2J=c2c$1=*O;Ctyskm}0H&3u3 +zJY~#k6>it>uhS}q7UAzVoqR#w*ll3|T^z>#U^P2e+%pF$5sqj`i(X}mO +zmz!_QCP+A4E|BT6t^8gWmr3s+xug7E_h~DbOmz#5X;A$6k~}oZo8vG;QVl2(v-r5m*w*AF+dNW&CR1%BuC_iWlQqp +zIrXjLdT&N~ulCvOvA}IJ8*qU&jC8L{Abb-V2JctIQdUFaH0#EVV9IiparN34=4FyA +zQbDgeZA)3!DIBwg|(gtBJYpoq;*`Ptt?w*;n`yE8H-Z&TqmsyRo5*HDP)@>+SfiuXDl +zADSa!sb}-_k`NcD$ir)Bhi!0q>P=3v>K(8P*Ry$guU7$n +z3)%7?f7SY#=*|g{UC!)+%2#Qj +zL+v(CIn?8V;s%407CF=&^A1pz3nBA*b3iCoi8l^4{H5WZ?=aH6K7;U0C>qZB)S*g= +zy08a8GN%r}rkiw-1>AkJm)WYX%2`}|oI|g0=%=i1Lushfq2VZB7;G)^_>s|WeM%w!~;)Yn- +zp`x7*^1Ug87vgq@i`4C-L3l;n#M!H`1_%GqoCNq_$8+TJ2D`q(J)FU=R=NBb?1Ii+ +zn8C|ciNI==;p8#cm0w^RRl+4!S+>Po7;Ms+&|{l9*zd+&6#29kI0r0nKzYf2$~4ujo(2BeF1W)>$wTrPcu0Qqi;x_Nrwniz<9p8z=N{})1or`ntxvCNJU*KJeRDFvcDFuqBC0Xk +zZv+tkd*gm1RxQy1b0BZ}P)%r%umqcqG2g_bi$43JYF~yicB~Rv>%?0rE?_g&Jcu~krE4e +z7c}s)+!k~Tw~zcGvPM=wOH0{DChH~78xAFz#zY>5AR7Yvl$n=YRtZ4{1TUx{LmtTR +zTDk4-JxFgY`{Lz$psBUp{+2e8^L|G-I8HJ|;;6mc;!a2yFD7$zbDhXYA%s>*1(kTM +zsw)AUY9bXBED=Ujwt9o~bQ3w2f{%p}L7P3KPc)I7RU{r0qd2w#`|7991y4|GZzM#I +z3%TkzkWVnctxra{%zBc!V(Cc&a&JdOjF4WdiUQD|81oU0K3PddFarNn$d8#Sq<2VH +zW<6DYE8&)+3w5C5E-UZU<^G4Ena4<^o@3V2spT4s%(-7;^=H|3WoTw*J|!8E_1bsa +zGvH2bsj4++Z$MM)&^$TsCt$h7n9fk_GED5m)rDizdM0&fo|JbraQy4c8g#&_BjMRO +z@4#q&3d#8%F4nuSiA+!fbp-sb>jy|;sq)_dAt*0renLOo9ll`+z+DN +z#du_j)v!{%%~GA_>65U{+o5@KUMpbp^6*jE9UpU$U83P|+gR93K8L6)qj4qVUS~#Q +zmFo8}w3#KXpj#sH2moCfk?lmbXJFSWa+7|WO9v87bq5HN;2uz6Db@W!R25#Ls>Xo8 +zUwd|pxmuisu2@@FLs=(!^c&F}QFFFabF--FR;M}F>-SU_=Vu6HoP}VVgwJMkLl+3SZ>^N|pJg6y3*{QL$pqw8OhOgSDDTBkX$!I;<`yHK2O+H?GH +zu5NOw-@T2h`$EKu@5CYRH<)9({t?NPqmLA6PImL6nN1ikr}c0|yw6xw9}E+?#?3Q +z`7b5@4OP9^u=DVo2LCqcw~3om<0#VekUftq9hw6Qw?T3c60DBd4z_E?T~0wJURqNsCj8co&HOSOnIdT`)BAuQ*o=`xV5k +z@n7036l6r)faV?Q3Z0diZqvQlo(2M6vJOPtYj@3XG>;KX#rBQP1?^@vNnEFiz1gCw +zUCz#4yBI+uuRuyhWVf!b<5gh$nA`CgUtkPlA?psLJyV1wNu4n)aRzmHrRGmeyUh;S +z+Z|R{D`3&?=~$oiT91Xz_!dchk$ErX*UWC_Z(t2eX!CifDzBfp3=xZ;X^c&L328i* +z4t>CzKQg^ST#XWNg;MG7%7{HyzVIvE*2vL&O%Dl#bRV& +z4Kcr6EJh~ZMnRLsV&wSikP<0H;UY6g`iZ9NMnI9ql`6-`2v?2KVn$PcSSYJT`@=#m +zg7t@mT&n613q?B@kkLtXNR1`hBVfTR1oY$jZs$WF<14UxP#L`Z0Az_{aorre(itQk +zWk{SrZmZ=Ii7IlhS}r?r3b}t;E|r*1?q8P6Pn=C|o8^iU3(37^xzfaiP6e~6PF-M@I52p7o@yM +z7M1|IVnPmVJmi&+wW9KLqi@ +z&g9QG+}P3uc`UIOOwzm#_p`qoj`aJ?FQ6l@BDoco(D#w^TASC9)!b(2r^zwLk^7@D +zEm5_(IS89sJsBBtKVSF%PlHP>U{rc}EmhC!ZXrDq8GdD4GJuWl07&z98#c(;W*tUP^Vz`9g7UO0q#w+P! +zNC~JhmRq+FxX +zopbFfjdz`Xo3$mVm7?a!h5rCHyqxNL(3On}-|Vvex#xBzcj@;+=;=oL|I4=5YlFhR +zLeOtw17u|%a8W3B2BL^{udRx031)-E@UWg3W_X2}~>3V~V$^nC&dz70cYjQkR&OEcJ`VCD$vK4f8ap>hrHIlyfzXmw|V< +zpXfp4G9sIF_0Zv6CRVUB;q?r?ueMdkNT#k3B0%n36@YPpV087m?jY<9R +z%Q4IZ6-N4S|6H_F`*9X>3+0uWA+VHDY)n5{He_Oph>c6610XKO{zc|AV+NYvVJHvx +znL{C!kN)%y!#W4|L1rD)1Xto_&~WDF2Sj7=6>!+^XZFxcnK4xq^8?~jDQ5P5CZu?f +zkrk~~TxRa2!LN-eGdqW4mbj7BdEJrrjWOQMD5mdSJO<^n`&W|@60T0BOu$F8zlo;- +z{Qvf}Dc2$X09@z)Y8~PaoR5_Mu@3Pkqv^SI$gfu%|8u7*Qq1ckSzSabXOZOgRAkg5 +zkU`>K_>AAfRPISdFXVPakoXjz30ba1QEwSffVCehN%6zW{0qx$Dh>l6oH-ixayS=& +zet{Rt9?LLh!n_&E&Adv&{DLemi^=1`w74CF@gi%W#tf&KmSzj-8_gO@u0~3d>j-lr +zvm`~SklFb8x>-Sx*Q(n{04_4FmCxfw2mY>OAD@BBZ7muuqK0-$@pH}p(!yf0r;wFt +z<6^RRfz7!rAJQdc54{3x9>Kys3^q5R$`3{D=RkKG{Ql!|d>+M7DYsmuBOvXiQlz(? +zuIc6k2#^J@wmKSlqSqI#h_*3DXW{5sq$Ccu@7A|HCKwa2MDq=uaHZLzDn5Z1=07Zz +z_&uMP5m&-d3Go858^ESGiT?r^X1{qlXtZ0YIxe(cG)mwLW^{$YAuP$-a1w8v{j&Za +z_TD_cs^b0|KXY&Hz31fK>7@2et%}>*PdeLg6J$oF<)D98u`JYN8QN;UCEytC>wcb1a!UBL#Fij7N4^ +z?~cUADE=LJExbG;1)UKt6RZSQgk2F%uX)Pp$nk%tAQWyi?iAyNQ%mmxr6?B(8)7XYW&N;DctiLE<|pTs{3zyTs+M{czVz>-=4dlSn8 +z5>nMU?fWN)B(rZI0a`}w?Q`^J)O_o$ppOF8Z{=EY%WeQF-U@mGP$~Nr +zQ1WvQ{|#m!C;nFszxW?J99p>ES%Q=lry09Ao$EyCPQKcNnpJI;x4{T7w!$cLk>!Ltxj91S>K${5LD>hgl? +zO+TWm8j3bHbga~6iuGb^LxMSwzj7SdQ?W6Tx>1-oa}H*NxpQlKsq6S!ye)KUw+bI-fpegBdAR1|}P7!X%ao>S-vwPa- +zz`eJ}K+PEhnGn0danIDYXL=ViinI3%ufW?x-i&F2O>i=vf^xDlp8=qp45oN2Xz+*= +zd=0Zo?krlDfq5cQRfCji^|Z??f0fU!6i-n5Nj`>lrP2u7TrfG`-L&kM&hj +zQi5p}1?6cl|5a`Mm*DY;%d7OoDU@mipQ)l6Tdh@KUo`(lEI{S@QVK?oVsdwufd@g8 +zS&nU>qmgJRgFgIqWT&{m1S~SYs>ijE>Xd&Fmb<8PvUG7Jyt;vy{E9+EVtm9796?h>1w!BoWh{2px#4CcF}=L0Q+P8VjQf;o=j>g$|OM4NQi! +zLDL>L(Bt0&6^|(fkN3nAJf2|mOtc>NzZg>DaWV@YCzG_tXl0xd%kn+8(H!XUp-CQ# +zhh@WImGx@1u_m|(-pxnrSbjXXlYx~_0q`<_;&TCD%xawJGTQ{X!~FizhU&W5gqj4P +zbFx^Hnv!KExbKFI;6OK;#EsT&veR|B3A_ur?v&jG1Fa*@dAda23LDgPG;HPffcrg7 +zTM6J7zXI@k0B-^)eh~l$-qy3VM(b|#JIMy`fm%$0pGAPd?*-5~Sw2Z$NlUVeHl_nz +z9D9I^pC`IlsE!zdB6YgFd~mtV-%i+~x}gKm;hLi<#MiYy7T|QrJe?);E}&8}DTb11 +z!&g{CUsL>EuaG?bF3tPZ-((d +z`o^C}<0pZp-?H=gmc2++>Xq~8OP{627l!&dU$*>fUuOPWzOZb;m*7G-j7lVBq4YkD +zOLwxmm4#B6)%v##2C65KB04`VUjSC|EjR^!8t!VioQ$i0b$r{;h1Q_z%GqFdZY5}_ +z>Ql&mgFxt`TAs>Fb(~*88d-)8=xFC>GNTv7j02o+corcdY{t7w2hT$Xk1tUTnlhh_V(x5jOli +z)cw#G?X6S|8z9YhE=K(kaIQwT(M<7t0_AA?o#mWON&0*IYzQaxBm)OofJ$6-3LLOS +zDe!Y!lmcyfl5vbA0^{c(dfBZMXzf%6P9XJPbSmX;%bqtgxL%E7*Ew-DihGz+TK6!e +z43(%_m!QIK5hNmSFj(snl-m*Qv!lZAH-YJO2BJaqXPi`K;RO6gUx7?#^ge`L4NB~m +z7l&(&BuiYOd^{>PPej +zqB2PB&zDHuhWo>2_rRPW9lKDlo(5YbSiQkM5v-TNif&geqR6y)opu(lD{InzuyGeK};Cy7qa(thUsb*viCKpkWI%V+xvpI +z`ma!pWA#<2#&Z~5sE+gYsWGvC;t!K_VYd{qMwm^hZ$O?lNb$~gB3%I&{lKIhr}v*7 +z4?@RO8a<9iV=jN^Kp<#yOtUjp&JUqAgm-FX2)$vB?q||}=MI}3g7zia0V4~|T}t!` +zMkU;*fJ%})3mr(3CgW7+QAc4?4YYQ@qwG~L0Ne@L;{GsanK5Fg`NcjQ0ovv=_)`1bIgluM;8zKW6^IijnBC-gN@H-WM%T- +zxN{)u*C_s?tcij +zPHqJI;f;693I(eVvqHhvTP8PxM=uAM-1wx({s%p&5Ncr=kx7NnhwKip(&VHG2$s2AgyDRtz#rj%^-oTqdVkffMNG_Jac5?G04`@J#wdz +zKf*It+8rLX$zvYmv6)DI@ZHFhhqR8aw2toB3lT_KM|YgfXts{-c#Y}S(LGLMx^;Bh +zw2toaPs0M+I=Uxp5e)l9*gCqupi%Bm(3t7fe#E$*0okk5MaA(RCDub1qZIFS$ay_A +z7WV3h)$5pDFPB&^jd@-fhRI%UDh$L^^*y3{fk+mHoZ$Irdb~rf1f`uCg|{7(sZu4K +zhnhHFTH(R8pn#3)5T-}LY&57tHH5}=n1;}h4kwf^Ep-!9FJD^e5dumJeFO#C7s}ql +z(JX)%6Rc&FJ@n?rI}l}26AAS+p(7`GR)VG|bTLyqV)}0yO~C-2fT@OeQc0z{>>K2z6Z!U;==p0E*|D +zR^b%4I7&9xEh0>F>y5(KV#$4ypM}xzHScW +zj{^-IrQ&r)%O3OlmNou6nnB}>?*TyLk0(ImFC#$X?M@FSyzSFYa$7Cz{`zAY4M> +zB*9WE&}c2NDqw*Zoa38=j!_>Zm>0a%Ht0^52BUm3!mc!_oZ9kFr>nJ7T?&p<@%S)g +zXf=1CVs^#^kFcayEF$Ns&xF%32o(H9_%>Ind%+6dq*MvgNilu??OLImzjJ_2<*_ZU +za=J+a9mOb;)(TNS*xU)^RLh>JSTFsS(e%7#8dRyK(3abkqO4j%1|O)-Zo^N6Er9bp +z9s%bs$T8DCZ$cQh&tD@@Vq2_w)`EJ_vnr<5JxEilj+w$h2^$U7@yCNAiwEiig8yQi +z$Hjv{pE8Ew*e$@%jpzYeaOZ^p!zn4RzK7q4%yma(t~-)2*PZhES_a@;cS_6M09~2u +zPDxj6AwAA@r(`N>K>Ofvt~;fj5>MkP9_PAK+N(bcH{_(sTzBX+w$D+vGodpGB4Ctr +z-JvsoD}tF(&UJ^*zEXGv(M{yd_)>TiFdYwothB`dloNXbKZ`AH=DI_(WK>D=O3Mm5 +z>3?T_ma#L7F5Ftvg>%B$u)$e|j)xuJ57$}f91Yb;e{Y-%;e;;M!HytF7b_)kgK1*F +z>fbzq#PNMf>-b)uMv{C_`FFzSx{D?2 +zNA89Pk%qE<zk-JG_di}_KQ)7Dl$la_ly?*3w(U@L8 +za<^*CtRK1Cn6E?Owj|N3|^SoX6`k@5$Lp^3gnQor9YaT;MH_zMmt{+N3Kh$4r +zDAUdJ_B{tmy6)zAVbv40LIx*6yojP*2$;ccp64nCWj8N_lOUd_Xn=I{GTF`Z(iFEX +zW{t$#5*)9BGoUD&OAo>E>)=|>Iiw#?cXQcoXa-wR)``7=2T@6a94Eq%dFCoK$_JN& +z&<+bbuMu;y9z&?W78T^Yc0R~kgq-)cfgt}zNrX5O^l)JJ1M4JH*<&t1fbRDJl`TbM +zS?Wg-%|pec#vKdcTZyu)tMLvlzE;IH^<{622F +z5Nph@I_-W)mL!u)mqK>~$zW<`z=?lnl%D}EH<&^>Ka*8%Qx3U`$F$MyptoaY14-o+`(K{7b +zjg-shST0`x8sBeJuYjSCAux<(4mjmjtzyZC)u4{X+Jj8*tM$sVdzsjGL7D1~IRJ@n +zJ);}4!bZ1&(ft}|ZG{nk8PS#7uznO+VPO=}L9qWFW!bR{wSzB1f$D;av%9=L@9=#o +zN8_O1hK_3R1Gnem+pxXC8(wL0jnpcPV@ah!XSBDkj5@X~Y=2!h$P9psd +ztjiJ3DP}cknai!vr(vv)lq8c&*F*MUhH{Eog+6P<*V=!G<~l3% +z}Dgn-3Hlr1%lM&g5?ymzO{^|qS$6tjx9;=BD|1?)obWi5J+H2sYeqY~Xty?{66N +z?LE!Fu{FPfYFp_CQwvmE=XzT6)OS#z>te<&b#VtLLWAqod^TYnaS5i0Y_9pe0p_ab +zurj56>L@;a?)%hPd@BE)@o5tT@viPRb##1ef=}myXX~!`>;#`4){NF*$@vvbElu{x +znx~j!+9$>>K4D8P4X#%;tXHa(vcl_4r02n0bq^fYK2?cNTR`mfC>Bf*!a-3>U1jsF +zyZAT`cpqu^ag#mjr<57Zfx9Imd8HTIcAJq)5}cj_o^`t0vk6Xv*c#+OhkGPBtX*VG +z;v)9J(EfV$k70B_WrO0MB>1%-H9gYCK@TpUbouc)kZVI^P3JXybwO8!tQ{ +z({#B!7L^Ka5>z&`?l6gR1dLH>C?(p1tHguff~Y;1D;|7oE$+y&=>-dHn$Iv=Sj?VF +zusFUXAF*p&lmqb3$Gv`qDa8-&R9zMycG}&2z +z?nJ=J9*0r2KFo8|2t5;2d<-pZ`*-e42q(-09qg!a;tE@^H`C(h=lX()hk0aANAURB +z2w^q~6Z{u*eFxvj!QG50a>U2%4!$0m!tNeC^$j$7_r}e@-IVaF9gtU^Oa^)~8R#WU +z2I9amxH1_SmW{8e=i+*yU|6Z6L64q?76jWW2+Q}KGo!yCT4vCK=*L9yIU3;>N9Qwa7lT$rPsWsIxI%GW1s`UM +zw!qVHH}z*h8=}`>OdhT>Xk&Ey(Lk#e_uK~JP0=!{s!^qaj*4!iNXK;@ym47HvV +zK0w)op9s?)8>#??-9O=(O)v+Gn%rTWy$cVmDvYQy&qBCNLJ-ygzw`y@hkQd1yllW3 +z;)<2707WaJM`CH_WaxqLp+1Y=iMeee8t3!rZYv)_F90EZG4r6W6q3}xBgLC=8lVR{ +z#L>s`Vul;lVSrg;Ml&}CsxgAP(R^|T8E$6u5po9`v>^#xOC9V}8HM)IRS(^1KF +zjRU1v+tz5^Y!-NEdJK)`87>yY4yUGpET)%&)|oqF1~dGt#AIiXpd%kwPO(HZgvB_p +zcy_PkY<%z~<9l2uhT0xIVk74xjB +z+r?Om-eAdhlwdwZj7?@ChGdeBp?Zz!Y^+3bcHeD~r-7UUZTQGhYYOATS6=W;liV0K +z1l%KPI3w3&NKW^!OmKc)bG{B9xEe}EbLOpku`%=;aCy9#Ur-WmaN!QHD-1isbDWnn +zTNu^VhS3#_+WrRN*=;BgiP}+y_?;%=h+6k4hSU#%+95(eGBL%b_gHW_iNtSu^>Vr| +zGl9+ld5BN0U1`Y2YdzYk)rNQtWS!XW@nC_J7cB!XFW|Z#n$Q5R;-PPxq;?nLH?jzC +zO5JUwKXs3xKR`O?7kbDi*|Eo!Zv;+F^N2M!%Q7`HKLbra_=X6C!_6B0cmxFG9`u}zPOY+*BzW&9Y?c$1*IoqXI&g|JPjoGtZ8nb7+G-l6sY0RGO(wIHl +zr7?T9OJn}ou4=?>&vyB1bKy4Iu=J;b?KZ4%n{8O(w%f4632SpB;Gyw1n(&!6z(g)ruX7u(V_>F7q3`VHvm?C4^L +z6k&FBGdR!x1pYH$Vf6TXRUY^e#pOBwXxM%r_GlQRM!=sr8m3p_LQa}=bR)&;uc!vn +z+0l)ZsBZx?C_B25Qn?}p-lwyp8;PrKs2JdWIy<_NGJ_VRv!fd+H)wG>JGzlB2CYbE +zM>kTT>LhGkIy<_NZl-(Gkj{>7q{^U;>Fnr6s?}r>Zc1lIH&UZ67IaiPJGzltHDAyP +z>Fnr6u&G|qN$Kq9M(Wiof=*3mM>o<(eJJP*T#ZBDa_BueKJ+--EnnMerXtB?tcVcdvh*tW1y4%V}(2XEuv7;O5t5`_Vq@x=dpyr`Q +zPiIFr(x{dIX124V8yTp6E2x{!j&5X-;bx|@qZ=7)(1LV!bR$CyTAa>~Ze*x>S;AJN +zv!fdsralxD*-mu0`c%+{bar$jO$Kd5LeK)64YVv*I)608Qg8FAj6(Zp@@=)xdXFqV +z;5nJt8VDrpGLy2{(T$8y`vBW>k%yxnWX?qrL>icLk@~&2=OT|5o;?@&g1lci7r74c +zkR>lB&P6gtuD=QHpNr)8giOcU-Yc^`JgBTf*}>Prhn*o|zg;yan +z_13Kv<-w-Z+o+xvPJ@!v<;{qkHPaYkD;9~Gm=m0T6wn862bynt)iSF70h9viRTFjE +zvsaC?m=W|+(5t46g=URd#4AAOV)UybT^K_sX=K+PcRwi#IT>%@ +zK~xd}$MGrNNqq*#u+xwVY~TCyOK1pA1EJ5WzV@(P;cJ&dbaNMI#auQX!mSH+Ph#nj +zJ@R1;e;KgS*^Ga9Gtj>hts~k*b4q@Xg*|qqL#ZHn!4{4m@mD5Y@|!lANXzNqjEl7e +zkDFgLu@M$@IRvaBP}4P;Uoiw696L8E9j9`a>3F&5NK8Q3ZsVDps*wFq50(c6vqqaafh$*xN%ONW%uEGNRU +zSED+z2;He{sa$iZE*qDiAgKE>=h|6TmhWtahChPVSq6c3v8L~`#uT|HIW_AAzcb~d +zobOzJqo>jQs^@-(sB7Op2+Lj6HCeij+e}Y}e*BfEq4do&YHqOVHnc!p*JN^!PLM@W +zDl=kVLkRxMI(AisA-;k{sj4=}W+0Wl48oGi>z$coSA%ZNVloa$pieXMEasPMdaL`$ +zN-ubm8IN`25be2c9HK3@uTQnLda(|Qp;Awq?CL$JMD(~VQ)d{{Rx%7nUzi>B9MGh$ +zS`Ux|noanPe2UD-V1@ay6%OK(Cgf}C>TM!d&(TimQ$LzOLBtW^JsrK&Mu4#I*Go`n(LlzeO +z99FRM0OS54XrOUE@BuQKA)7-8`hJI>2seNARlPr!+EDf-N%S-P`0O1_e<%WIai^VrVfc>4xcgJz!-P2 +zV<-y?H&RXAQ$WRt1vKI^q8q7fA-U^;mIa9}X73{RX{-y#y2G!?JsGI15R5S0Y+8P;rC$%BOWt5}XysWwQR`Bf_lFaoGdCU<)jvIxS2Y%-$DY>=lfMyI$+AxUmV +z%vIk)W(|SQ0lWvGGC4$b46;9gQ^BkrYxGR8`hM|yn9!XA+hmrzs4|&UeHG+-JtHoO +zx`{^3B&+U}0L&A0$th5eIXRoqI-J{=+g|H-!Gx$K%nhBFTVCL2Zb5Y{H&1E5p+b&R$r%kmBrVyF34-_^6ATC~6vB9)>} +zOhv-ifp;7dpsF0eB>*auC42P)2g^@2yN$+Y5GO}6jCT%QV9&kgE5qFmZZ0(Y+~C4x +z%Bf2+@$#w)u!L9>GsM3k%s@Yk)5A9sJxN~=V?nocw;2f(f>%>)BCP=OpjOaYVquvV +zTw;oEEr$iS)^b?TXh=?tEvWS9RX={~(Ga72B$R*BhKsDMTWPr88xFH~jiK?fFK$6> +zV|(3p!>uwLgy?N^YYIZ>;Rjzk8Gc}kHDB^R>X?yu5o1c(_usi(zk+unw^TMv?<;jl +zOf^Htk0ADyS3gbh-S6|PavHul0va-e|2yJRDP;=28Ms~$gd)7|6((`&`EvC)`O|0% +zO^(XLU_f4nWFB6JWRkpH;XjDA^{+tRJfr6ZtFJ=!gTAWm;8jviV%=r9yRB3ob*+sx +znTJ@DN%keIyUc{Y6M>NvDGS#-VW)Sqp`MEr?>*Nb7XztTX%N1&TN1<6$Olc3xGZKr +zYEElPwJB!KAvSl^wGc+M{w6TRlGcehLaesf5$4Vk$l!pz2gD_g_rPLi{@PPr|ukj-Ty#BKKS*pM|1EtVgrxf2+&0z5YV;&iAVIT;9tro7Kd00c^OPZkN +zFj?!14c9L8_s6_^!wx#;?XS3`=V3{YFGxbPhs)YpgllU9WKim1P>MZLco|~@wfaUG +zm!`IkOILM5J?7+}Hn-cKnzQyo= +zb~)}L#>&fdLiNi5;wT7S$H)#+xvwg`^GSeuWiGOThec&&F7kR`fSfAkskz8Tjp>!S +z$Qv5dD|3-e8q+ItkvBD_SLPy{HKteQB3m@3SLPyHHD*@kBHIQbLcKBM^4Q} +zKKu;k(T+FJ`bR#}m_9WZ`IwU-fw;bPF|v!jKL3J*$R``9?@7EU6C!&iLLW}eMZTnB +zXyd85$X-sy*p<1+J{??-RwLiav03|JhRFAY2p4v##tl{A;SS{5nK!Z&aMLn?Q0hc! +z50Tgw06`~>GQrQvATxp|?b1`cS9uYBhU{L;klkw;3A@+4*HQm-QgxD`ZWb5yytukl(9A3@>Um`b +zEy&`co>y+r;w&!eVUkM=S7dQf&#O>ZO4zzAF6w#R0$i +zxCl38aZ%5!Q5ysumBmFpuU738bV3#v^}HVHTR|sfaZ%5!SNS2jFg1&ddR`yZQ_vaM +zZ6=Fr^d1>ZpYvo2k1po2go1iB;2brB6h1(?5I+&7eb}7>FzjB7XBt5+>MbF110Gt{ +zDnPl-2$xF;!aCrsz5xBmWnl#GX}~$+ik05%%h97;TADi@vJn2rXVE(`w@pMp`h2?E +z%16+SAY^k<50}ZakYviDo;N_f3q}?f^}I&KQ*6w3F6wy$)jtGvv$&||4Km!!EH3JK +zgAH1c#YH`Dh(U|9xTxn1RqfCd2*fM0xTxn1Q#}Pmwi6w$8U$^~;-a3{WY9(=1TC=H +zK+E#vq9Ph%sekpUj6(Zp@=bxD15}g62RtVe`xAhKU1m}?7xlamY6ukRMZMJ17J@5_ +zdZ}j+L>kDVUh0{;%Fv5?sb}9UJiVxwI)fVzv3t^qzKM9qk{44sQO5YN#m%B#>Z~Ie +zSYNxM7xkj0{63c~>P6!O5v`Nf3}v#Y7cF}MG`A~Wh0NG5k3!$w%g37>yNVLDa5k~) +zG?pSue6fWZbLF6WY_WdFW8P^8c>xVV5ATW+;;0Wr4XLowMbAjTe?fKd4xpe#krcnWaFM8xW3`~`Yc#=Usrvf3}e +zR052Ch>Rrp5|^AV}h3% +z)@IFe;T6vQN~l{5ORg7oiob%nw%1r;`u1o10e$;253>OI5Dx#q=iMbSf%&|@E)j_TTGM3(a$#t$;yn8#}CE}&hxD7qeE7*06djZM>x4&NrrInbsBV$&Ai +zCdmfslWb`3L})^VYC*qKEmPLGbtZyJG|B4dR2V5%Eu&S}fhJa+1UjrLwpOi4w#sr2 +zwCXOg>btg9QJ+}V*@-aDN;Qz>ZKYz;Sc{sjKv~7#UuoIdQLHve;ak-V+Q_xIuJR=o +zKtZPi6+dK6L%$o7gC`HD`d|*O6Dhbi0N@uJSuQtI~=+cHM0rTe22T2?pji=i^)Id7=k+KOg +z(S+oITQ0Blv;?)*mfV8*IvSXvdZNUt2A-JWSVa9(S@GRQ&*Sh;@s6o3G8OjEW>}K@ +z0uB$|g0>wj7KKT`dmqm-9*|603A~SN;??*^-u{2CmNvRnkR!@PVLtdp9 +zLj_l(do36ZY?w&i32tvzz4({~(;)pN_;@D2Svwurg}@Lg8HdW?O^wIgf{ARc`F#OG +zYDYR^m82XmdP>&Ww3{IKImE>(jo%Agr=`Z<1>Tpn+dQN72J@??s15L_A8WOvUsg^( +zR%z!0=+FABd$M>^{e}q-X2>$5><+8+Y#DA!h9vWlA;~1kked-F{zTt$qvt-W?;Ld& +z5L7Q=v!g*thD;3t0%3#WFGV-lMdtiioe<+COivEPn$pLBY8vc!A7)5 +zm!oY_UrKRR=^3`2`?49Kbvw70pfqlsz*dykjT=#UMLRkXhCIBG)mIrt)zg6uki0LG +zydEI$P`Pw(8|D4!D)jd9?r6AC-kS;uixM^qDk3b~hboTZ)zwN_^G98!%l3OnFZD3) +ztF-@{R2A;Nv?? +zgx=!D^)igvLAe|0@b!{*Qt>_yV^Hxnn|fY~@1!fWwNuQmTB2^uG{rZ4y(zwD5|HK? +zK=P;x_{}p)s{({F_)RioC*gwHR$AoXzA`@~sU3^^i#;GuQ +ztD>(Nvj!5NSr-8qM6o1O;@gc1_DTj*Qq>LS`^fD@cr`dFVMThGY{R_>M(u)%5OuPP56JvTP-`K^b5-3C@*NC6XAO@L?!{1X}s)fw8-QOn+gvT +zG5YOM0S-ggAkA6%2LscQor7OTQ68cmJsR1ZrCU53cwK^$qkSb=qU84oMkP6-WY9(^ +z8LDRT)pP~Pb1!w{7s5Ohuevdqg5K;0-RRADed0CH?a)SVw_|ub%1&3 +z>u_Bm-eBxrr!!C18V;4oP*sX#GTi;<_j;&O_s~13Axi_zNZQXq)NOQJ@P^H>Mrz7( +z!OtVkA(iSP_yfReTa3m|n43gB$$3-NE1+yd)8^{r3~xb%!_ev05%v-VQ$f@b_7?nc +z;5x#-f;(H4Gwf_e*f+qiSi{lrH%Kn_0K2ZiM8G-n2FU31!=q7T(U0Q@;Tp6+6O2#; +zjf~RQ@eq|_sZb7PGslJpB$2JbH<%!oArf^j4d=iRQXCoX1Tj9_NE`{JI@VDb-c6y@ +zRa%#-#$?ZMu5n%!I0Mbd06Ez|C&0n=fGi5m6?Kj8GRv>gaK8ljQ#hrrm9%Jo+G!SS +zOz-ZK8<$aho({T{Dz6h5UOD7EuPw3OEW27~N8UDgwG*AnCR+ErSa%U<`e6QAvG670 +zV&w~>GGjXmBe#~mB&mNT(1A>twI&@LxUaSZI9Jw>GgbFNpx;^me*jM12qSN61)zT{DF7Ufs*g{2-ug1`fGK +zXXI)`r)qKk^)PvnTcoV0$+}akvCMby7D;d9!vJUG@D@pH^SCi_jrmod25!YXnY1>^ +zJhV2+B`(No8AuqP11+~pv`HGc#12?$oR(`%)6*jP8}rqZC6%%(Dl +zBoXe=5t<&aV^Sf-{HpBWL_{kZlX=jXOcIU%&>Cx3nCN6gx!E97@NUn8M&yzgJlD2% +zwbrzY!LIwt$g;6`Ov_5uBcC9wvvG2GxTOtuVS`gwWDK7JMSnNkxrl9a0NmO#!@Yyi +zR2zgVZ@I{D795OJ;|+$++Fa8Ze6Ez50jv;u1(jb~jBKYJC^e5lNz;sTC_wOX(4+(T +z2O#J`uCLYu*Z2$*$e;MI9K?f94V!+ZT*S~PDBXfvY(k+Ay$0GMJTM@W9z)gd*xEG( +zrLJ9VG`rX8!u$!%nvP3%bzR#OnH*KB5b-Eu?cWJbRPdP@R*jHO?J`_>Zlu=re!i10m@WeUghj}0wcu9l=A +zPg54I;3RXDr^;xjBuT)D(BCK>TWN_(SV8B=Z&_mvTnaia!I-bh(otM7RukR<5n1Q( +z95w#J?)xA_8bZ*;>E69oSI{}?LuwiMkq%J7B?A0KIZ;~x2Tfc@apSTY=@bnANv4H@??t%vf49Fc6r1; +zQ!0Vz^gyK)aQ2>x*!528K4=io$T+Jp*^~VD{S^@YA6~IO7G)*adTD;}-@P>dzo$m^ +z+I0B;;ZvhHTe?+NsXMW-#U4V@Q?W@?66UH@2E%X0zwCQy +zJy6Pi((9w^NQj5zIq(h5QS1EoU+^$(P4)IU(FQU5@x +zM*Rb&BPFbVpp@63W9``6h0u=h@S}4KJ3;247hxA}7PNG!DnN`LOas15q6AC&Iu!**Jy6O*;vXoz7fqc#Q2H=nX1h61`m&(@fl|%&50q-uKTxVs|3GPrg!K=U?ibWQ +zP#Qo3&TKaaN;TSugrF9i4YW)jD5W8m%C8h^Dx=UoN_(XbjcV36Wbpyd$qc)H1`>9e +zN%lY~FEz1i!RC9LlVFxPS4xnJuDm(LJ(GSK4fG|6D0Al5M-mdIcy4*<}3$$XIx#e4+XkD~$K0r>edLr2_}Qe`2Fw#H}T& +zr5T`1N-Ok7L|pHHBq|2QoCpJUN<1!F0%q%R(avfkRblH3^{UgsES9sKo?;pnFv_U# +zO3s)1OUM!_WhJzZq_fJPz~M&IYG2dg5~O$+;~Ai6vuGVCT1C@ZYGP<@K2b3r=f|j~ +zR0XJcn1oevbvH46!qs+uXP8d#$LP-C +zT23!}G6AY~VlkFe67{?sAh>wN6P48?Isuw1^th*MlcBEweU7H{hK~yNUf1%z +zD13sC`z0$U+73DdbzsQIWgt$sm*HOWALk&e)Ejhiq@vEGLpCU(kK}kZc?7?Zu +z?S`F#Db6vP9bCAFIm-cW*ZqcF0`?V}-Re1nyx?-P=PS+yCmtTnc25Rq~zKb2XmFYU9SxxXQUkmZcJI1s7_$YbYn{5pw98 +z*(GlnzKg|z6j!Cp(=}4uY%#m+dY#Z+k!tF)7>b*`L~B^St^-ZKL~B^SegZ1x>uHv+ +zku6xqkTUa(Ei+P}p0x!^ip&krh$53&r+uz})>wWQUEZGH#s@G^T#=UxUizO)ziiimJ9c9Fxd;Ho3|Im=mrzRS{+vPWEuIIW#k(v +zBi8cIja>eR@Zc$!Q+BEdu~1wDTA7QkullwbrQ%(n)p8fW_eA@Bq@4QgCio6SQ{Q5c +zJwTjZY^JRCmGgB;JPBb`=L}p!*$dp~fc0zykoqxZXhs6S%wnJ8@aqLX;#Fwg=M +zyvY2jeAO!*yD5_C4fznp%w8`ex5WJJg|NhUIwI)$(_bm=IMTTC*@P%WJq9!V)nms%RgF^DLX}nVxsix>`leH|V0UkP08lM8;eW?%#nOay@{4pP)=E +z1uzRhpL+m!!Fi@E^c`iw&M?1M+2DVGumo=b&?8x_f%=kkRazZ>e%M$J%nuVA)BQHY +zXwrT_e?zx<(WpLPUSQ&bd13wBZlu^L*n`jmKi5LdkO}`;IfuQ=R6kyKjm97s?i~jF +z5+w<21Mj&}C)%+HpvJ(Cf%5UNOXM37e*|$5zaVz0gz5JeqWFy1WrBY78PR%2{Zi21 +zeNGe~6uVr|)4#wPjC@t>3bhUv-A!CRE!Hgf4&n}a)9Ol*&-y!F`X*xyYr^_b23dn1 +zRQ*JQ@D;D0Vvu5#2j^9WCU7#VH?(@ua-w;mZ +zc~4z!gyvJog}-{O&wEkwSh11TL!6~e)6Q$UqYj;>`W!$PGA0eClymz$bVX`67dqF9-I(m3J +zRBnXyKGL?cnb0AJwz&m@Erv~{Q#p3KUU49$SOw}U74*Enw?pe;k=rSlZJ_(feQZIXP$${EI?!! +zuFgZh*&JwLt!?fBCipMz0p_=#Qd+;MnbP|0r=Rc?l*$idA?)jP@Y9B#A6pyJ$T>jTRSAk+a +z`-Hpec%`p=_6hgY(Jlm(&pt(5IpN}e_6cA2qya&G`&vHxgs*$b&A}<|t0SNzTMpY~ +z%VC@Bgu^!O>m1d{gs0oWyvdQnHaHi48Dr*Q8b7Hf}_n3{pQH>nDaf{Wa6sY0B +z8%!7d5ir&8;Eh|V_6X``a5I4$S7{+~Gc$Pb#w{~wK?V=rxa9^d&fvitw~Ik5GI;RD +ztx!1Q7 +z!Gkw$4|ScOlQMYl#;sQm3OY4|2X9250@K{>0K$%8jIh{Dg-gk2h(IcE?k +z)70C5b1nd!>7J*u(O9&{x87zd^X_NVQtAS=6H++1=45szexce8TpwNWPMeHCGH>Xe +zK@f#U<_*0wzlP;@-q1UHrttKiT<)3x-@cLC3+PlXcl*GMz7PDKCcp8s4;zBCAwI@ +zCi=We^rpcQPM=qaF4dShuM)k54XZw{61|ltPvpEx^fp~l>+>qnNAO-HhMVblV-oI$SGGSJTfpLr8yCJr +zzji-_JM%U>$52zuuj-^)KrTKHkLMxjl76 +zi4g3FU2xaZt&V3IpuCKdLMz|i3d%0>d6X=_mQ)Q6r6LW=2Da-aLqJZA{|d?#BSit_ +zjdKyEckD$x$dTfKor_lij%QHGp-OE7QdTJl<0+FZa{UAp<^2hEE#Ec-;zKD+-K;a? +zpV6YTl*&Sff{sk18Rb2x>KxL_QwUBMP`0H{rz$7LX9@VGv{uOXP}LTxM{N4tu~=uu +zkIanc*_XZqFOAwl@Z`NXq|uv^Z)0LU1hk6NhJOSPb3hGdf}@&wILTyNGfny6?o{NQ +zXTo$RttJ=PCTOVX2%vBufGz;8C&1%HpAzT~pzbRG!vVZP;8+0huK}D0U>JbfsQ|Dw +zpa&8Lf7Q1Donqo%%ea5Dh;j2u>(?P({4jto2;2vt%Qu+f!osvu^9rz&fYsG4)cy}b +zF**t%d+0HC-9$s51o{-AbI*Ct8HRi@$Xc`qrVg)m@DaLB^PSQj-2AW`n;)3+8;x1F +zu!K7GygYET2|i(wj#Yh_fwb(EOs@GeWN(3awSNZ?SUjWl2l<^{6GC==4@S?=ji#p) +z4N*N|045Kqyq>S>8{a2`7+*5E_l=N+#WoZ92A9k-=6`?~N^FSFiOe(FegIOp +z$RH``e%}b?NEOUG)!kvp1t9-M$g;br=Vn7^x-tRh;wiiN!|uxvi?C9c_lSi|3T~=+46|U7sBEXd%%rfbG8^N?~0F1`4YUQ)dC@%IV<2h*mB$ +zGkBIM*G$XQD$H|Wl5MAqOZ4GCid>Ao(RrwoOWwMsEfbwkgFQXp^#!G$yoRasQ?9Auwt66iS?k_Y{!bnsb}`M|&Uol@}c`UX6Do$Pdm0t0zD#$T4S7k2%?`2p)Yss3G@bJi|{= +zfJ4fZoi`KYE{IUes{kW1CC?6ExFhZ$4CJ&;pme`B1q*i(U5SLtPA7 +z;j%X$s!(T3*gBWJ`A|2-0T|Y_UH0ZfRR(Qz*_#hltGk5Twt570s4`)RmXK7 +z;F!2#rJwfY=#f~OHdzaA^jY*y%xx3Vr#_$Vw(?;^1cWGi^P#@DIuqG0$LK=?)JtHv +zJVqaCRBr-iwsR{(XrTH;P}j{TcaY&`x{r`M*q{Y2kI{#Q7_`{sG5QduHsJvI0 +z9#76n(_^~{yxbOp+zBL)EtwU|V@o#9gvsM-QMWucWDSOd*YgQPMdk8(W;kKSm?iUR +z$SZ5hG-K20wCQNXA~u}_05&bMHsu;Av8l-*zD-u_K%4rBO*7isMCD>rmJ?=-?bs}a +zSIuCYDEAlQH_Ya=9cOF9Pt7y*1*CItP`+%o4Zn>>K-!)N+Mcxc;jDg4wvZz`NdwM| +zv;E5Za#MM?9HjET>RRNSuDsjU*yfWIXhiWb=g5!9?1O$J%v95D=l(!MFg5{FA@fu3 +zDgB0l5_0dsGkhH$kx&H;3=Mn%u*)k|LQPu$;+1i{MF5DTUWG@{iBd+cR0)l^A7JdF +z(@%2(t5q;<5@y{4kE&p7=4lw3J)(l?Z?LyKSe*IweQbnt|wqqkWQacqf@GIkFEIAJMW2ma+s9 +z;jhC#kZ>m=oKCpkFySr*P15QC`ur*|@%bD`!RHoZTPOD3_85!4vX(v4X&=ZI{mzmf +z?YzW*G`M)9L1=IZs~oGegjLQzeeb0ZFkbN`#|hKYQt7zigItnzasT}+yB#s>2fHHz +zVZ4Z!Bj5}_$A3RPLai_m?v& +zeMi;J0F%ES6W;j{sP>Mk2U!Tm=b+kny#yd?33Er4#_Szc8nbs)Y0TbHr7?R)mB#EH +zRT{H*RB6n=qpBJa+B>T7=GZ%`^klxhqe^3XqCfKSpJ00H9aSur33pUIPJQN%D(*s& +zJF2J{Ug`v)W0{WqN8I^=G^ZM?tUow=;>%03l`Jn{#Lw#UFnR$J8-(#Sdd40^N^EP*x +z*T?KR?Lt7A*LPi<<3cfrHwQ9OFf4LCCAVSu^ZIU@`U?c29Cy?OyqhnEB9CWCyrnu> +z^qik}3q59%ZGfP+OkS9jjY)bS@&Z*uOjmatOX{ +zpl;)bQXm`Jr^dvKA*bq`jy9nbzn`I*qv8d^EMhmVkre!&V)@=Hy_cehIY%s; +zV6NmSChl>PGgjg3o9QC1s)5aN-;_?)fj3CgCX=Qes*M7A +z$ziW}X}L*W_A;_Zz=QS%Ujc6iI7cm@%d?bqGi9lEcLrJz^(iE@yR+!-v!Lajf7&d_)8D;7#bb)WxTn`FMJ? +zA3pGyK;svXql1)Us@oX4BYC|Cq(rG-lgoDp!al85*znGpJvLW +zL~iu(nb?WbDD2AzTbJ&GjTca$7h((! +z75#diWjUzHEqY2qiyqqGx9FiZEqZ99Zhdu&9(qG#xliyqplG1H=lwzanCp%%YI54HIoT<9a+hU*qR^f61MZP7!!nD>5*9{S{Q6h_^m +zhwS&@LW$pl3$^(kTxg#Tu3Pj_+wZ}J62AwhVluOU&&z&+sxi%cUiJsTXh73Avk)Gr +zGMU?PH;pq3_`Iy^&;Z%Oko5!!X)1uQ!BU*>bcY-VFzoVD-gc6>!Sy5`IbF!J@XVCk +z=h%p6usF3QaRRiC40%Xqxxry*eB7~IPxqEk-#A^!9WO>~ye;xmak$q#&URwICN_ap +zH#=Al4FY!jk%*V;%G_V)o}jCydTyGE+%+grQ`;fc~G?wX|PV7RB<$8OGU8J!B?+?UgYplrI +zMC@XX6+6K%SbJZ>#rJI6rTl?r=`JO$rCGe)!n?)x!gZHYW424lTu$gxJ`NrEA3?Wz +zSaM5^LZevF6>+OasI)-(dXEZKdWes4t6cl@(I0%AiVNA>I~`#Zl_2A3RL&a!NtEIi +zbt2;dcTk1YdZ9#P+uOOOS8%pMuYjK+E80(?*^K0M(2B&8i)o1p1e}h!Mt%v(Wv60; +z{2ItM#L!u~1D)y&c`e9$H5vD>n?8ioX^LUL1$IZo*qQyj&T35N94ECd&?#7FR%J?^ +z;u%KtJBUI#&L=Em)xp0GYBmksioP4Z5p3lQy9}nPkI=4_$PQ8Ig5M5WDL062V~9@$ +z!~W3i#D)dQ!}id(i2X(|><)dKSPJ@9pUF%RoM}m7IGEBEcV}n+>_n>D1ql8$e#E$*u7tYrJ45V~o>j +zqLKXtWM67kF~yK)f&9l-@-#!{a^IIexuf;v4v;%F7{`7OqzJyl1?=cXw1I2DZ8Th( +zT(7z4Zg!eva~b3#TFFxrq)#zqB*#2MrggJh$%_n`)-7x$uS`&Ke=B)of|5V9lD8)) +z+3u4&+EU6doZ*e+8!vApb64I-oCwHsq+pd9gzxo3 +z(4gPzj{Oap>#UuI8032(o3#vb4g(ZJXL*uW*4oy#EIHk(#-V6Gpt#7xGF)#y~!YRo#)mO`}@vGTgxal<@p&r1~emj)SBI!ywdD +zF4b&VRR0B9w%Abdv3IEK-sX1t8Z|Q;Z_QWgY0B~;ttRpn?>a8_Z$xsYV)rnsvy67g +z!#WT-*!Lb%iWOIe9|rdh0OhL>k!5HNqg6_=aA&a1#uouOCP_166287Vrdku8VpM>wkEr5@Z$OqhJ4%Eu%()+DaEaT#mIERm5S7VAL6&t5(W#Kpt3&&qjgbxJ% +z3P1AIfqEH|d+5s}O>kLVRyzK1sw-UgjeY9iR^k1unr}lAL=O^${z(SU??*R`ja1O +zA3;CV-)$&=6toVM+_%TTW{!dyP!-0^D2R3;V9bny7?h)+m>C7pfHoVse;^?hb%r~g +zg(D)v2X_W{4!ayaxaSQ42#qd>5AOLIOK~}TaA#`Fbvb-+XK5_va`@n0ps`Gs!w2_5 +zjpe!=KDZZYtia{)!JVzKBA3Gl_hO9|J6U?n;NHxQ(=Nvh?owTT9hYMU_ZH>@ilNIf +zgS$*)nJ%ZH-CLO^{+PkNO?E;zjz_(@RjCu9u$}bMw^Ly|>0iD@s!ZX{1fVF3a>2N> +zS&@(^`HfYm$$;}-W^4GIQojYFm91@6_JXhMX|NS#wHl(L1}mBjnKza;EyZ3f)aC`3 +zQ|D4TBBPaMEaF=Ct*yFm^L4YAqNqUYCMvp1oG{hp{f+9-uAJ)Y9_#BK->Un#R^1bP +z-RDy`6=>Z=MR%bSrnX_x1H}rG6^W`iYAEc21b; +z^5Rr?zEYJK?r7cT`?_bf>b{^=_l4Bm&SkiZSQkoOa(t$!OGiUgqA7C1)ZF16x>2QU +zPja^Dit*6hH1Lb$GJz__tVTH01S;tl93bIqQEQSwVt;On0(4Ee+5vL_B +zHz6*E)v6Ia^x~_*{eaFa0-!uNb2|VpIKetI!~_{@em|r$3>9aHBx$Ft*ocWUa}7dg +z_;omO#%fM-W|5JlGyGy4Wa*5x*f{e%;ymC4*V700PGPK8OzFrIzZs1f&zjDd8& +zJ?sz+7a^Pyj)8Ejq1l{S(dq`|*WZt1uWfkmK)6kWz +zr~o%TiZrMPFr2_)02UKy0`NG1k}&|V$=VdH(j`XyedhNYrY`mT9m18#+&C4-sWeW7 +zNy=dDETcwJWxGL`Dz&grQpLuclqxMomZ>sK%Q97V8!}VnBu$o7*<SH$ +z+&C4-sWeW7Ny?Ba6-JGu$~=QGRfa;Zq>7C>DOHvjS*FTFEz4B7!;qOO91%fuAU@C3 +zCE<~%n6udj*$aj=TtTObV|I7-M-)|69ICsIuoVQt&YSyadql)tZpWYtR4oJZsJR}n +zyDSiT7y>h+({qtm`Y|2h1;R+4L*P^lfoX3#6{m9yfuS}Rgxv>a@2#TI>1=Q@uI2DG +zhHgf88N<66!>=M&9ul4{pcW3f9AtF&zplrN4$}ERJGluzVX~bQ;ab4CViuy)W7^Kx +z&?75+@GtrAKI~un&&RZFm-Q}y(t|GREg-`z>v7LcVEi0VWY13Ecmer|xxfho|ChV+ +z681(Pu&8$yRdPBiI8;=QC3y65Qn_O%rT%7s$z$4(tnWoOqH9wee&Jl?kb4t$w})S3 +zVzaw`7qOS@@b5avg?b +zBZoKXv92B?hue&i!)?aM;WlIBaN99*c-tlLMURogEyGb9WQ-jCkbOS-#W8aDBaP`X +za`-jXP8K~z4)4>!^%yz)tsYDx +zkz(11_xocJE_D?WrXU7Y!074K~-RuwdqJl%AWcMr6E9 +z6KW6v>bZmfH9rR6fIxZFhx_xLJnEbc0DtY&v9!Kg5-vF!T3e5*EWa{N8G5)C!3w6F +zc|K6Sx~L@5cTmAu`Y^|GNN4>fWL=OhL&$4fs;1%RT|XCIBUDNYuD&4$LF%uDUD67+(+Ki8k6?xB2Mz}dp<9oCKCch42=+PWJafNnW7apQp +zo8b0p2z@L<$MRAhKW*r*ujw5i9t?(#;KKC@3`*4q17o+24LW5^+WD$DQS2l9?2*%L +zHhp_Qso4md@e|E|fUaeTUn}TW#$gnBkOC;zyizC3#-vK!OZv4+Y9sL4{8beoWz*12 +zu9nc(3Vb7o)soWl{ +zZqya%;tAa)Zx$GIQg_Lmg$AA4UA$N%d5;5*-Pino)V&FumsRyY{yd*M46`%rh^V8o +z&&+3;84#6}%mrovG%G6l0>W%Ez&JA?Dk=_(TDWVPA)r~BqEVR|Vq%#~nz>+K?MsD4 +zWoG48nM?lP=iGCi=RVJT22k|Z>;F;abI;xHJ?lMp`Ox^T5O8^tv2`W)|8`W(EO9vc +z?65>?I5m%FaO9IFYKedFI9dwQc>wtXMjiydn1{eg6!s+T52$d-U-wB2ty)JYYe5*a*E_+L0HD13|4 +z5{ZR;UXD@$GO90%%^AJd$CL83(*k8ZC6aX{2>r!!>tb;bAZodxmTrm=+7IILy=n$~i&60zVkiW-^44I=Gi6v!nj +zYeH~Sfa;k@iy!-k1UiS1g|;U1ur*2S!Es06=jHODKJfFal+P!Qm`IvrB582`gB0!y7KCO$pV(X_Idn|GhDwFk7&MDOB=TGAp_d;pTTr{5Oz77d}D2V0m9}&*& +zM3@3F)BW7j10c`OJw5WSbZo=v;x}i^Y8Eh8@%H>q>383 +zllu8HBo{7Tihh1)H@da`u!J{+$Ge5b`)`0lxf9?03sQ$Igq-rX9>7}jukF(6aO(c8 +z8}SF9ZSw6uc0LLmNIQ(5IUHlZSK@i>T%r`}gg#~R?LYZlEwP+RjF5OPF=ByJ{xRe` +z2qHGG(kq%RohU+OMQsAe1oxSBFwGlH*}?uqgmaJaY0Um1^q1TaK!f-BvjQ%77}GM0 +zQoxDv&*E#4`GazSkp7-L134^}{E@yQagz+<510g>gjAn<30os6m>HSy`aBqb=Mp#@ +zri4F|$nkChe?_UIDD&R|=B}684nag;vM7ElqOq@i)vm9V(tWLz#!T?mdH#8*u7Jrb +z0by83)j?bhWwG&kIAOcd*f3-*%Q9gve3%K#A~vkso^D+ZtBz2)T0FQ9DJG@8$UkbmAoq5ERtGoKn?kgi_z?9)Q4rr +zL-RDBfXxITWdU{QUjV#*THOBzqDrkTQfh6HQcL9??k4Aa9=%@7y{4YJAL_O3;$rIJ +zapgc6re?9F3ftSo)Z25ALOp4xp8Nv|L#(m#v-lJHJPS;HJhFtO +z93FM09xE;;%WMv-fIOj7#(glRF_dFDVsbkgF_3WtJ_NAuSjkNp^Kh+bm6!KE9EtgU +z8OD>aHTwmW9m)ulmhhII6O6g$3nD*38S&5LYxil)IcH)@b0*F~@u)+VB}2}P<&G7pe4c~kkj?o51@|H^&O%FlrjX#wA)i#A6Sz3p2z~hF3Kl52Rp%o^ +zZXV&c?>&^44ixp}M=bJk@~$}+mE;c_jD-B(4Z_^#zk$Dr{B!XaH*xVdFF%h{S0P-Q +z{~pI*hQDQA&UQ>}-WCrv6g+`oS>C<$AWz}*6#YXA!tyCh(0TB!J5U`QiiPA3%Daz{ +zgY)2pbR;Nm8+CzB@nBlWiRKO1#9;{cBLGS>c<0&r+>#`35U}PJhc5yO4^# +z>zkBBziW%l#RVgS`{M&zJ5Te>y(s?zWqisvvm~Q!wwUe&nrCc}I*~-3ea2Qjib}lf +zn=ea=mu=ObIRw#XqsAAhM{oP)Hc5Zm7Q2>;{l_;CO7wqh^q(pE8Q(lF(YBF+ry<%e +z@vX5i90W0F5e%dfpMrx4AqW#j2D5jrA9K|ZLWV!Us)O7-I#68PhR*mu;c@t9qU=!4 +z^AjTOq02apusoEX?s}*JvBL^ZM2Ux~bHj?MzDFpQy^j~7yiXN+!-)(DJa7vF`CebD +zdc=0hex%QRRF+?PGpfhuPsI8s^?}ty<2aJ@Osj;$kjHWqkL6y1i#~};j^?aKB>~$< +z#du6V0?aNH+Vp`7<_?2(jsdyPJ`m`aNA~E8BjtH#2CgG(R +z)t@7(y^cVp+*u?@3MK$#!kk5fIcQ?SOB0!VfvEjQM-Wm#F^dj}%IgtB@}Vr5r|!WO}f$YC7dzOnJ}1J6l!%Ca{Yr{T6_S +zZb!DNb1Cj3>V4nI$Z`#Jfmc#%2)u<-FQF3m1H>X{w~z@<>fLC9f3i*+=3m^qOy=J^ +zeCIdqRK0?{NP^22zc-h+)?4L`ID9+2G>i%AJ7c1s*O#U<>AyT2ZQkeWM31DU4L<)t +z2mJBye$>#U-AAGS`2?IMgCzYNpb`2bjrhJK6ejp@(^yvczSgi@a&AL0{{`f;Y`KEj +za>OypmMfSkS_o#gJeSG+E`sM$jpuS%?^wW35PY8hThvt#`0$z1f@LBs0$Q%JSj6z* +zm6=Jupa_o*_zPdBPKu<3Kd3>YN&2_Y07%D1Kj%%sc!?74x|z|<&$8(<{-7eXva2I9bHdV{0NzDM<$-76{y;A +zZBM+tM-Qk7UAY*AVv*0dZOA+HIO3#-5Rl!cSy9Z7aa{F8Y2NQkK( +zA2gqR#P4JqaXF2cJZ2Ly>peb+herbkM@>gkKHlqkAD`hHyQ0zh~7LOj+io9R9#mGclC)uwHifu-*Nh^_LX^#v>OQc*`~#tNXF$h$-F%%M84Uh?m?0>S(X+x&qG08CJF@~4WfAl +z6nr9xz8E!+ibwMd{K(G0gJ|^?$^L3k>@MoilSqnFqh@(C$a=WWUqFqD%bwKuI5Zhi +z-*6(MA)sC+$^Mhc8hszXqHzov$Va`8#<3YpFI?c0nME4=6GVrI{F+2Q0@>ytLxLYq +zDT&a{e32rLCHW5{QzD0x<~&=Q8t-M+kTO2ubi{SxXXY++ +zB=JStrjq<8f@4u+6CCq0+O~fhG=xVR$=y+KgnuWZ{1U7@kD<^p9QrLnP?v)cJH?~t +ziW1(l@Surr{WItWc>*ravMPS)>&U!!uOhFC6TPj96OmOht$!0)*1s`t8LfT|uYUXF +z-9z2qh(Elz&DnWAg0hrX-VaWhFpi}!65q;y!JgAvT*o1Cd{A?i&KW4@;QWM&sw +zFANCAUq{u{*s@%K{X^Bv4yvi4YATPXYUINj&8cST7*um))@s%v7G!BZ{y{`zMgEP{ +z>{MQzXp(+6p&cK#s=ZC%PbJsF!-y;9Us0|l+`kX7gpN{7LpDdb0@3y}2Cck@cD09C +z;o1)!Zb4*t9HM}>VKudYqHuv6smtT!`d61Sm4NZQKZhkgfH>q;&=3p(NoGL +zM5mfkLUj6`SRW-srxQzvPT!I!c*pP@KI8>;zTd_8Lsge{BXEG1dk(_=8H0U*!2w@K +zto=i%;1Imp2x3`$0pV-%29$-sU(nIItg)jrHGj$C&LwS)sbp&2ypH)T6Kgak`Dr}c +zy<|~is%80tR9DB+&aTwFjzyImYFtp+)Y`G=%y}J+bE>PVmbZ8(P5(^UCqG?Qm8_~s +zragbD=%PZup9g*k41#ZLO!J +z=C?2H42C$banYRS#>I^tt@HP&0CTCzA89mO>*=~y&pQTv?Eu6gqp?q9QKaQt$yc +z+p%Q+!uc(&?b+I&)6&@14*J@^rZ42CujQtHd=o5O&oa|y`Oeyn_C-rOJLWA);d>4R +z<`C-VELpsNU9og^J9lN$H?SPWES%O>oe5^0fH{qeyE@KlUxMBF{cCLz5Bz>^ZSc*W +zw=3RS$I``Jt&1AxG%lat*xuC&Cf>gW?eKoV4G#IH=atQl4R3zOyv~+69gXcE=GMi{ +z``6lH9^Q-GT06wrcCLa1s +z4jx}0i0C~3;ajjJC9SoAV>(m7S=-W1h~Hq0o$alQDQ*A8xR6^N%B>!KD`r(%ZSS1l +z8Z9xEqvN=_zoEIZ|Jef)mn?<|+)t)x=kXoQ4OZR;7DR)cjUCHc=QnnyI@=ed +zmb7;@HtN?$Gsx4p%?57sPPDlTZN|jyg2vO9?k7Jqb1QSWl?AtZ-V|6F#1DZ=o;Sax +z@uL|~6E}4RH+AM_m~6487PWTH|7cpWOt6YuI_D0o#^&xtU4101=lAzVl?*IAu%tAX +ztW1B}Kz|^N!$ZAk1L>k#&PcDY@R&k_RcD_X&y*Zhcy!^kfyWjl3SeN3MkY*;RAEXE +zEcr}sf2;(!s<5CL5)=$8gg+C{&f5yd6ipjgR!HsU_HnZI4byEZes${DqOeGRY-UX< +zxc0arDw!XaOkgAh0P}2T2`oh49kA#iKQoYu&no;p28o~0$_%7zC2j+e>iaqMVd$k? +z0)hT+iD_Ktlw9f3fN;X7@_`q3!Hnsc^8B(8V +z+_|CB1p$Xi?E)U4wbNt_x4<>W6;W#k_Gm#TZA8`-?7}%sp^FDQ(*;ZY5E}fx;9W=n +zsLpXopwB?yy|9q5!#FPva6So*_3a0WBf847(}S11vv4bv@^6iMf~lHy>5 +zg|XQ!2}xoE2Gx(IbK1ZfrtDH@z}(0FG~^K=l>v(Qfo>LHlrx~7!HNg01syC8Rn8iw +zoOM9hK2e9DEW_+~AS%HsMesL5FwFx3YAmfDZ1WH%fDoMzs;Vr^PvD^uVmQp5kQl+@ +zRaKWuMmqHXF{9j)lbPv8_hAVzhSsuU-Q;NlC&S6};U$C8fQT4J5-1JeO(7jKm_JSf +z1#V|7SrmqYgVVxI*D8xcjIb!MA|jA55CL}POKT+1KS~1wqLoJE2VR`h?h;NwF78YZ +z4qK+wA#O#HYE%Y*6i5OOQ)|nkW;A|? +zJ1FAMGNot&4s~eyFipTsR;oj}XQa~lD5dq$5fU8ZcEu9XSW8IbqAB}ALA}Wsx271G +z=SF9{FFFTiqxsvTg0b0zC$s1mkw}EVqHt!4oeA56dWlRBw2MnD{oTnOpj8t#2I@=? +z(wQD?h31f?=W0q~#-Y&}vGWcBB2jyQn`TpnD+_*jCjPIAc~x;Gk(ur1V58I>bVTv? +zM;W0An(j~%6Bj#X1aYy0^})nBr}&@AC98ta0|jm+#!#21z_u<9!MZ`6VCms*C17Ob +zaOfy7GH8nx0Cck3dm(Tg^C3}=E>kKwRH@{!FoQMa4tHy_1TfN)#weGPh>k`_v+fU% +z?wLRadt?`aDU}lQEp10+yT#jAtqn*b-oZza%Qqz4oirf}V)_V8=v4LBsfq~oh%6R+ +zP6WarcUmIUBuWDP +zg5rIs(o!i7?2>`qUu$ +zU*V8;rA@#giI7%PA#d8*N+)Hd8muZajxJ&JRw)}+QZYL&LWBRy3tUL^|Uf-a1$wMdbEQ5QK2MCvPhIb0I(gBAC(^kDnANUeqcEi +zGKD2P_(YW6V}6ks+mL6(VGJye6ojaW5=z`5;-q4(2Neka^~bt}Z7IQ0%$8ExB~%P^ +z_$ly!#H6~SP33xY@~M`C2uos65t?g?ELIO86z*LwyS@$emyvsGPq+!ZA9377MQvdq +z*qPOF>5@eh*nk9avEWs}5?8QCRB=p?$CYu2GUBy8SUe7@31RL`Mg#NhH +z4#Gq+lgtv_i2*QN3G_fE&=FQdO8P-ghtUsb0c)+T!?a+k>M(jE}0jl{Xs;W@!iy~`Z?AZqv +zsO^3(o=P1&(Q*jx1eyHUiYP?IvEZ5*QP}w%Y-c{QCZ(+V$616-bq__kBrnPq`ASU% +zN==0>qZE<#MN$9~kLoN5t+9R+IHr_VB0XHaR!qVl7>c`r;bdSU00_z;&L~AqkZkr- +zD1dFfSeS>U4~SYp!=qME=-!2nvZW(_T^mI%T|zaRN5nCKy&turAcQ$vj8h`icvv`S +zQj+BSQR0OB7}>*QfhlEeBN$OOFh;GTv1+`Gv&PGKB|;cZ4hdF-rc9-yuvs%C9fb~E +zm~zwcuAs|PF*%rV#(|DkMd-Xb!~jXf8dn%N_29fbiix*iqV}HX=?F3eDKLqK4|~cQ +zhDX`#!c9jPaN1=0BE9zsx0ztlVKjw?VMNk~HdNfdO%{|OoGqwe9(o#E$7M-V>*-TU +zxrFKC37}PpHN#F25Hw{4?}gXC2YMwx4_OQ#H9RT+KYcDZxpxi*=z^`FbR3#iJf*lev)DFxyq8|dO +ztu7n@*+e`wY1u*;!Qp&6{aSxqQaLPa<<88ND2yovp#pmtyZT0=)jWImQy +zm6WRIL3;!lk%Gl{0HR!Z5600kR@gp?Fs=;pK{N%lPC_CX6{c9G3nzxcRCzHiQvjhz +zoy_Q{shX-#imU65)QpH}D4DP<^oopDDw^nk7}F7snqv~16!P|w;qXTwD=pWh3BtqC +zLFWUWoJp=*E|ClGI>!3RYxjmR1mZZWlKhH?P)4JW$+ +zZxPOtB@eYr>mA3yqMctpNI-o ^f}7lT1%u;jGBM<7d8Z1)X?6&5FiYIVwK8X@&i>%J#R8biAsAa?1=AO68SG_en=2G161Y +zKah!b7djK#@m1C;u6E}mCjQ~c)IO18ae`Yve41P-hD_ef(7`{+#eBd7#44dfv!~QP +zDip)SpGSv+n83->5fR0oAf$(8@G*9ocx)JJZJ;Uc(5yB5NfNa1UWRrYSv;R|Bdp{- +z-Yu&xj1%0*{WG1Fjdca>nn-!djrma%DQ*)5CXVHB<(qI7~rCwaEYB*P!w%cC>6w|F~@^yBKzJEdT{nB2+5B9M9j=0n&JXc+p^^T5|h<3X3z{RY`F8G=}0;_ +zAP_z*r=B)7oFKQ^!LJ>R=@~jdClwH-#Lv&UvIqRC0!Mce<7)-gz@jWhImMa$M?3O_ +zBgRmT)G+TMl29AxmI;?LQe(NJ)3Ie$A-(58R)!NtHDcXj6>o~$0I8=%{vbE$)QtN3 +z$oZtplhB=_%3oJ0AWW*(QOpF=N+sYWcdL;J$6cv##3ZNx=)#d|gphbU%Hg@AH314Z +zB(8`ECrzxF!{CmQ!BIB>9&0^rQ`A!Vq}n6L*_zqZqE^|-MdFF*1gbY?`kdfk3>`kv +z%62i-P6}x^(zU5J7YUMSu6_^n8eU;>g;}IbeMU(fqoXynb3aS-JKA)gP2 +zWlf|nxDk}&i$R0I;&ir^vR@(z`af>6is3o#^jh<2t{b)gmQof485NrO5Sn?!xdkdc +zony&r-q6A1K#pNkMx~Jzc_pC`vZs*)kp@dCv;tz-rzMfpNu22DN&+3X9D%eYA(@Hy +zU5kkYQFvZW83iVi6-@^?5{a3Zg!*(3C>k;HZJc{S+9DC-1E*WMPcJ!zI)O4Mm0 +zA&h}mKQuD}>gq>8J+cgtMmWk6vprND9$bq{Z1pQiB~}ch_&8tg`|kPseKq%^ +zRzsFUNFhZl#YYYPaAIgPO$4_!0I=t5ksNAuqFq5WC^xLza!YhEAEw4MyK^pyh=(kG +zfI{RdM8xqD<4`(^q-~;Ra*3+O0(f{-7mjq}`m)~z>TxhkiB=uoxtElA%n2qw53Lwo@j0CCb0`^Fw0(73jKtSoC_K_Bl6$WjId +z2Z2S=g;B8zhY}SIIGM-C>KJp*xxB){;=-ars-pi;a6*`8fN&k=3F15i!UBVWMLJhX +zXZ1u}QguVZA_NX~*ZIR#R~-;lX3pM$GBVE2C=v7ifd$lBS2LTJE!Z|t0tbIY*&KXg +zI~TIK?ila@)wRU{iFTna>(-KC@fujGvC?3)7$6X_bWCte)E?n|0;mk`-Z(XQA=Sg) +zL~J4a5~8i%atE=4L*wrLGtW5N*d$%too8r?w8P7s5j1ao7VP>WyRO>dew3(*bx3V3 +zwy#5-7u{uc_`}@-h;Sn9Ig4Wg-hZ)f)weR4g&v3l#~^oQcM4oXGQocpSn*N6;f2zl)jT(E+vEQ$)n;;3jZ5xFXYUtL-Pma5ZN5a+^{s3vl_ +z4&pql0&bG9oT>?ITG(M}RXqfHAj2ImiR;viGoJ1M15wmzK6dR|KWwX03XWY|DUHZxayz{EGstu9vFc>Zw +zH9@QJ=W4AHjyohOw96dwU|NH91CyxP#zK6(jdJck)9gB1vBqK0fS&<@4C?9ZeK09^%qHoRJgN+2hgy +zOrVcv(bMB9QdA9w>M_c8>dxXh6^B+xDsX6p^kh?MV?W?EXK%r#k{>HzK4)h^Io0uG +z!H*SXd3dpue0cZIRzxO9gvwlB0I1AWmcU-by+x?%;Sq2c4dzsfirNI7~J+WQ52S>X<8nmi-Q6MV9?kyPSrynz2%C +zn4~UVv$?WdCRQ6SLzIcVgix#Pzm4ZAv%orHE{q?Nj2dPIavH_mW3;Pu+T3K3soP;- +zdQw1S*@=WDupd=Gt!LY>4(F54ql5z{I*n~sTEdPJE{O=W*@x(S57qgOoQ$OUA}1qb +zxTR}#!ZAcnd@jYVc}W-ryJ7?!6pG}79U{Upzu3xm7)1*ys1$(18BNtYOdj#6FN7Yn8h-ANw` +z(#;TB>~h=gQp9MP%3(u{h$3<-oTz*P(SAg=DOVg3^Z_!`u8{U_-|c1DqbB@bE|LcO +z_jeyuC(V1 +zngdB27p*GsN>$=1Jvmkc-5Ct*1Ulr$Le8R>R|`?0%On-@v_19_$k+%;S>hfRlCT;V +z&Osm;0#S5Wu_AKM@rn{TMTM+m9I{}GTL?;0IBj5^UCt@Z!yKl7VGs^6(mZG^M%m#- +zo6uySGk!v&WG3(emu6|41%%mfx=+zbLkX7)PA)1Hk+GH#;r}F27_kmi=*6}GY=MkB +zqK}VqgB59&MvcpMhOk78i8hIosKulPx&(2k(V +zr;|#KD(BOwR+Y;RRu92Pn2DTLvRI3_>Xo|nBAE5=xSfos%tQ3{QuZ}1_0yGpN?D<& +zUY0?l!ogT&>WDkLE{X^|5qG3T$GKicA`|%Q-5LG(C@0XDamv|mV>0mMu}J96O&FY% +z+w;{BcQULnbGAD{Dj`e5bfj|{jt4OGe>jSs1(;GA`#;n;h5sWaYIx_9r~oY!;SdQz +zJCZ(i--U7nS-752i5IM9sIbT>kw?y+4VkQ=vSZa?sU$)VHmaNmry@=#RK06!?d$u5 +zayHUcZCS1lv5-(okwt`kz$2iez1v+bm(YOS?tZXG6{XX0(=aOHw7b11^C+2S+3F86 +z@ZiuhH^YbDGoQsTvbmfbWU($VeeA6DsjhdP$iB&u@dLXkZwCc +znme#690zzrzmlXB6Nd=hxn@ovUz=4)+*3%ZddGghUBw@+B9ev@xd7#;Sa$ryI4wLL +zsCyvSZi1)3M;K(mRa3I2!sv{ +zIOdMC$3!IH9>xWM@B&P^?l9TQFQh%v!(GQ3^O*YB;Xk7d*6{MVL(10Y;6}u^lIVC0 +z*p0eukGheUObqJ1Z6#4R^uR49-5Nj{msiP9?%^z>Vj)BEj9Fq0-3=cXu|^4IFKWW2 +z><_=@b18d(Qa0{)5M{epVl8D4u{M})f;zNIK7oLC9a6Ql>kzA2!qIc%Ar-P?Aau;Z +z_Ho5Ygmz&CxwK2SVTI<2c8ORWkZ;3^PY$VkbWurpq)W;X2LTZSc0sKY8KY_i_K{sR +z$}-OSY{xt1mU~FiY8a|1pje1}cU+NCxd&Om=b&KQIviu95n}HoV35MTmcDU{#houp +zxv`^L)Rl=Y9}pKD5kv@ehvJ__{D0dj`u`WX3+dTSFF3&%NtjqGs^J3*nFZ3>qEJ&E +zk<4ctm5L+c81(I8IzmBuN>{84dRW*I@wE5vfV4z(*n}5|$`@l?zHoOtS#U=;{UNE9 +zPr}QIQPECMtpy&Cl*29QkVS$U+o1HQ5ij%+G7C`h +zY~08!2q@PeWc_ngI7ODLvKuu)TY(J}c|gQ!mt*35b!-qJd=1dEE;lES46wVQg+)nR>cVKWo2z22Xq*BR1wf{RL}vFJNNjZ{pR$xQmXYUtEScb> +zrB;aZmZ4;b9y{P(9cRtiPm%PJlZd#oBq|r}3wE@t;jx1-O?!7@*bof^KftZ?fwPw( +zK$A1gA_nIULdk?>6^i#seBfS<8+`Zw|vA!Y#lABh6N) +z@5g|VWN~NN6Ee=lq_yEATOlzaM6b8**``nv1H>7;dq8&RSjP+qtZDK#gS!Hu1KT3# +zz9Ruers|Cek$`v+A?OQQBi~AJJu+fjQ}cY(FqDq+LIP|LwYuptgseAVTE|oZ+$r{g +zCuEs5Meytx)kalMqBuTHXl2k*ar;GXSW;fxuPDwdp^H`M(p%oEI +z8kIty4CNb1ljEYot+5#0)m(3+132?rO6WbMs-EnGC=#$$G +zmJjsWGuF#s@SrCS=Zb-VD}Dj1q62YLhALL$$UQm9n1dlhex=ZiQ5KZNgk6(o9PuJ% +z3o)g;mf+fI)GT6_#_~AIG4f=y%m+9-=r%BQWC&W0i7X#T9UmQ)rlc8hE;1DF6cKty +z9X1R7qs&f3Mv*rMso?&x6A_D^Q;rg@9_@nMA$t5+9`dx5DRP`2C{}#a`~E_VgRF=n +zyhYBd#HSr+k)ud2= +zz`@bQe9sqJ2)&Wtw{fv)6-UGZA<~B&BKqAwwC?ZOn?PTD1PUb-v`PVb0*8^l@2Cw) +zg^)+6RZJ^tmC^W_G$IpPACiE>A-67EXP}A%}bJjpEss)fw75lOG9HI`oj=WqRR41 +zLqP`C;p{)53e_{u7_iEkIaeixZp<<{(TRlMbQXLkp|FgZ_s-D-A}2z-$mZZl0UA`~ +zH9VymU^uGfenY^K&1g4seuX3v-LDgeFX@7-QR<)f~7e!AB>WS>As;Bn> +z9V#u>eIUGwK@IVar+s2Idb%JWLT(w$9-C>PdJgRlXmFs$IaOdu(~(P}a7ZeV5_2xo +z+1mlZs#on|hr%7VAL~0^_K=%h#U6;uakR(0G>*re=sP@%t!prQOb|(Y$c8BOuyCP= +ztt3)jBSWr;zI@>b%-As-bx*mTbnUSv&YtA!l9pAA*-iyUnb}fh$}RdaS&sWcf>GLY +zZn=?!jFY0fKUvaKJw^?rkk|QiwBtb_0fDnGR-fTSG$Cw|D!RdHtzb{ShYVC=a!z-# +zJ>+OuberUAAWF0Rf`VId#3ti|URF9&wRFrSAoZSyTwI$g^haBpi^-6M=spr6RJv&H +zJ+9HhNu|p5+CJFN@^I*x3H=VrHuN}_$Q2r#dS*m4vuDOSoG3LVn@ueHUB3)#ICozt +zn9Q(6#S+~K74Hb&=ofS%V`SE|ZHQV~$FEt0u4k4qmVIJJUiL+T_x2=AzyZuIxg>pQ +z5kiC0!`$dV`i5A^bFh*h +zt&s45cltjtZDd1%&Ya%+alL?9j+ilz>k%{HlC_+xifQeyH#i-urX(C^c!M(#yHRe9 +z9u1?%nR&vjUje*prLf&5B~?hC0LlSL%#KNw(jn_|ilg(y1K_SB_N?#1CL=th$2v&| +zfTz^*5-_UqFaeJCIMk{+7+&^=J$l=HRjtl1JyP3P*s==Yqnz^2Bel&71`6;4W8tlA +zd;J39)IDn!+mDE>5F!IiMcGcTYy<-q%M%A +zjNWenN93s9NSA?mhE>PM1zSWk6*w}W5Gl}qBD9L!3S$f0VrK?0QN(&o-83B{`m8^> +zG?X^(Z*bUy5?OBAiTcILCp0YWOyZ(6jdssYOPyLAs0+(mtAFpB#Fbs~=WKhM=-9l_ +zR68`d2kQf~M%IV3+$wS>k$(GxT}YT*2SfdI$>?4}3r9*)TQ2lqxL#@QXL3#6fqA3y +za6pk%>BkyFH243mwf~nR+e=%-#o=cJf(Zukt9n^J@4|LVc;_L-rtk6*fzKfR8~*vY +z;nJ`v4)xaFo3Z}oC8GTu5rehb-s;<1dRpq!{!Q7(`p0U;@;ynuPnGftuM-%o!k_D6 +zuta;B{z2iJd+D#%^8^A3Zz6_g@qe%6UmzJq7(2fTuN1gl(q9$$R)Md}vH2eocy=EP +z&ldRJ7%b6Vn*;{s+WfNwZi~U1U(*%VZ#$j~4$|>xyyEZUf|b4=lKv{bo)UPIG~C|T +zj&Ga56?qnZNjnz%UI94aeG24c@uSJa*Yp{bZ_C$M(3>i7j==g=CV~1``b>dmYR1_2 +zX21!ryIkAfB>8oGn*|;wTTn)r8o$tq-RvWd3iK{91mCz$2yH4uPk}>QT_*^ZOIE +zz7a*X{Z}PJQL%*|vR_&(;QyyeY{KP|GPj?F75`TYJj@FHpu7eu5J-62>a_jMw0Oto +z)L45Qi9c=lm++>}(EQ#&o000FPldorZ)t(IbE@aPDsY*=rGsqwDFVm8>JgFf>OQOO +z&6NCL0RAi&nDV(FZQqTf@J=+B@O}VsVfp7FDX;YNyujhl>45N^dd>$ +zDX^w%F@<+a`bC-`-`6o +ziWL|7K4GDje?s!Fl#KNUM8`WzU>)!57(6!y$J--zPk6sutnF#K$~%QCB(Om0TOjbG +z0`Cxb{czjAdMzm5@%hsE)@)@Oknax)YkeD3kB5gKU45A6CTR)dIIj +z{#OLPS>U_@w*U14Uw*Ky?;(LtJ;cIO1zsP6cMDu5>H0NA0y$;2e0;up8!z=E;Z46x +z$2&#J>-@C~TyLxOwjF8%I{(_fephgPU;V1qw_Ebxsu^P6c6~ANddT>_Vmv~Y|4@|KUXft`{LgNo_z +zRe@g>Sj(R}+UC!Z^jQLHf7T0ps?`7L7#q<3O&V+A>!kcs0@J+G=iL}QcAU*W+a`Of +z1)eGJQ-f`PTLhjo#KKbqUM}zof!`EZ>)RpqseF7z;3DDIx5{n%E9{roRcQkYq`v0` +zzE#pCI{2b?6JEck6#pwzHe-7%|D+h)CN;d8wh7M%HQIpEhepR?jo*ww!rS;8ZGYxa +zJ3n30-b2GIJX_$h;TAqsD(Dhe@v}+b<&r+^K%0N8z*7VsA@FR0mERuC*oJPF^!V2{ +zBqzMDy{!FRC*_r1Mvk!Ut(1Z{3p`igoP%uoB!MRjto?1Pvh7ci^vwd_CGcI6U;8)f +zU|XN!f5#yfzE0+=?NAHv5O~Vr7QRT}M@L%td7-CGV=P=F?d=e_RN&nLj}$m>tj%90 +z@K}N06?o)0n?ACyjhI_)8-7C4D{3rUgi{IhnRJ|mS6k5ACb0JBRe>)j7ZpA$r`r5^ +z7W6I>Sm{NggRjX5CA?pJ-WPjw_cU8x>1k4}g;yRJ6o~|=-wE${u!n8&-bR~$s^)64 +zaJ|6w0xQ0!rtN&Jx7obi84Eul@Rn)|Q$OjmTFUEu-x`Bok^J}C?B2~aw!G5w6Ow;+ +zFZ!MOnebk}P{%X2HQN6!f#*v9cARbl%LSHZgRga5-=HhCzWO$s@%SKz4dle&DKWT6 +z;LD}_qXN%bWb0cY@D71Bf2 +zTVB(*30x7&ub}Nu-A&q`mn8ob$uL#~ufi4Zdyp0pHj1Egd%FcF8fe)51#6K|u+Oz<0v?-c~IiPk)8emqP63 +zanb^*PsE0IohS+&|4xB(q@rB{R|s6R)b?krz%>Ftuj$L8{hb>j*01s)md&Gn!awq)j(5G}A8U)nvkU(EKd<>862=@W{Qk<>w%`*zO4OxukDb*hYIZyKP{Kq+c$u>XU~A-X`fQSK0h41b$awd6QP86(tw1}|DcO({@Fne +z8?fBrdF_&}{BiTeHowyMiZ5Guij?0ba9ZG31l}(2=C9cN!vuavV8!n%0$(lZE7#fl +zs!w+aJilfol3Am1}>vq7x3 +zuMsUV`$xyS`UYEYl4gv3PX?Uu7A(>JY?J(Ll5gw=TYh$oKDC+(E`NH5mS26N%^&Z- +z=BIiS-q$-d|E6B@*GPeFl3ph8PJuODq62@8!uoCdclR=FuN0OEeJDQLXFVbl-fd@U +z{>hU6_+I9B<;}LfHq}Spvartg$XhI|_+2jWqp`;C6?n?6HvhI*x`KB8wy)Lxy({?@ +z-$6CGsx*!jzRS=;lzZTmMXTV}+~#=nI3;#V~PEXhA8mcLZsHc2mvrN?1S +zu16r@ow`ozUoPcU-t7`t=UdAS(?IOo*7x(EzM9+Y_%wfg3|=6x%8yueo~56oFVX(B +zNq!yw%2<6`zDxqwN%{zZ?-IB|;9aruZwWk7(ns8G`>*Xubns>Ib8FB)P0;q@a9Zjs +zlZ2T9EB-XUey>9y;T>|Rj(@J?*Z!^UrGIgH)%vfK{E82%-G1yiJ}mQTUSoPX41+JBrA;iTs!!%E-6a|Mon+45I~<)_;Itrq{l7HR+9ctL^J +z<2&KyT(0f6__n;#Tf4wSxAfU2u+Gm8fydfp@7)+YGGXgedYUQlD>9vvb8LDXA5xvz +z;~hc&rbvFJw^Ic!(gLyX6@U}o?x6f!$zLP+t`=D7<=z;)GnT)!kL_=nlurvxc*yp# +z_&MbYo!_=t`E>&8e8=mUjfjNzXi)xY$*=g>C9sZXP_FG?d_H=cUpqfXT&evllk#^- +zM|Q;Ei~8F7mHwX+Slinv@DwROBG2a6`IYG4%g)cOLHkoAztU67Udr3~8F7{Nf1Tu? +zB`xe0Sn2g$fzy&+k#GAqCFoH!uo)oE0|fQANq(L0O)+>!49+XC_3xBwcMCj7;J0FM +zQK8MR@@Pa1*4}Bl!uq`)frR(hpuZZg?I}D$1M(fG4}~kF{VB2hivKoA*ZM9JxHo#X +z^ZB`}6<=Dd;zwa^U*ULt@pOeRm-ZFb@^M(}yLvDE9f=AO-of3mQ{xt*5!+ +z6e>kjYSFy;Ev<_ivn6$&)#-VtX^yQaIiI?-Xi@8uWDEM>&FMO;y|EKvP|_UkViy3O +zfc%7>cQfVwz`C4->7T?SR_)0|0weSCRo8iD0w+&E;@LeDkLASj9KWhZxyL+PZzt7T +z(zEEZlHN+`!+NIwTGHoG`e8lO|0L<3q4bKL>92YIAPlRn7ReKPCch)aKS{;6dp$F( +z!DA>iFZY~JIer%A(1Up9O3Cp}&apGhp-1z~ddcy1&hf`EhaT25-;x|xaE@2Q98632 +zW41_+3pvNzS#oTZ9Pgb+Jzeeh9LqzJ;|D8>sYG6k2v;Wjruy{8X-Z{!n9y7l +zOVCq==JJF;7zfvxmi1_%xz>pcdbJ^2uRLk)T;tHD}Sh +z*2ViQXt)Su4)&C6>2`>~d0mZ&!Zd`EYfc!C1KIOBI~zMlRKavz(0JO?W&~MG=O^@( +zrb+sP%Nx8zj-OkbyUKp&By#_q<6oG_u~^pwoaU!q*1Trv>p)JwBvJM0#5oW`QdG}+ +zn&%-UD(j-nP)%PqaFq|FL{0|CpT%YG&_1{PVPoC)k!osl^T4=OPb}$%r^jU +zWA6T`R~yi54kid6@UvgfH74UV=3Znw!hb2;C%2Ybx$S&v2J$Fv({s_$wAQP~Qq3)X +z_F1{=e43WmAZLVo^x&!?ITN1@YOkA1TmW{K5&>&H(n}j}oJVb3<|k_~^uL@(O!8Gf +znbGOjqp;?;y|nmiF8?jGCX{77fRevJ$zysZ!!RJ(d;j^=Ww4m?s2)%@fA@T( +z&+w59!$2rVk1LzEIraD^q&@=vT$)T)rHGGa;*TLwU>fNU#}TW?;}*u^>QtHO0ci6z +z-`_ADx%}L%x&KJjw_eD7)gFJ@Pg0s`?>2*KagT>Jm>!lk_o3|RT(&m%->v1;Ru%mT +z`eZ6|n{rKlE#(kpeK{^@$St=(CuyWx_Vazd$U5b=^KqBBi7oo +z*hN7rbF5ZiV>K{Q$y^OgR47W-9I#dc(&Uo~4rx~V4XG*>I(i=5!0>EnNLALXQq=0n +zaPu2TbEO8Na{3sMOG75GIP{db`KOatkBXBlPE|7IbCbDmRZdvVO$=r!(LbAB=Sl5Y +zGJhdV`1UNb8|c_@jy}vx_mmwyl)Wl(?Tm|reONIlIE&>9>=UQgwlOMMb5Th1q` +z^1Ro?gfX4D?I)nJUe(8f#Z(a86}X*C=6hZsQX7}gZ*1>sU9wor +zv7V?GNsGx2xDX01RD2MxP=X5@n=HoFe}m}O#a)dZ9ZTE0<}7MnBx|GjOAxu70IZIJ +zUUas$&*@w?AF=t4?gahNNQ9bjJ(wWJ1Vmn`P8-1O{?4wB*2T2?LTO!y!M}@9Bd(aZ +zIX|KIcwoW%8_cpM7<8#LjES-x)?_AbSXgJin9N(&Y({N3B~fH88olmgt}y;D +zLCV*#Pv8}wr0iwqk(_?rPmOiAklg$9up4W|(?nF1j-{KN~@RALAXHGC@)u!rF +zb@iEw42V0Eu1Kfq>*|_Q%{Q8oTGNqCoqP(GT2>R70xXlvYh3&qKUqEAJ`UFJj%p9Naxz(P$O!KvdYvW8QZ*TS_~S3i~Xo^L*1YmP{oK^ss-=C?j_(cFki$H)f;@~DL8~MwK*@)pXsdsz>#{P +z&-~W0DD_q!nVDo!R;H}eC7Dae@v+tlyg?f`Wm18IQg8nmxRL8p8OOxcdw}L@N=a>} +zl{2mKW;1@@fW+B19&BHocUt&KM)gyZzSqdAS0P~pLGX9uU(*2-Oi4H7 +zyjt)qx=DKfjHEa1Y4k@|65j9+#XngroDU({+B@gBW?>CfZAk)suD}%f%BxS!eX_kacVMfdnuHGf +zf10PAXYyaqv{Y3EGAAhhH>bE>do^!5kwMOXJCS+;);yE&+tw^h!6B +z_c$mBqlmgqu_BD{I!6Ft=WqHD7^X>`}$#PNZI)HD5vT +z=3tSdH)zc*#vj;Rue72UY0aI84m`bYa`J9;G2wlm{(j(P515T4=w7yG_b6E{4|XkS +zU(&Xu`K+EIRe2b^9phGTH5uP}>DP<_DufO6;xAU|L(((s@@^q3mv{DcoWY{XT_f$= +zczc#`MIH}h&$5nID60PV>>@;m>`Dof5mhNL5n}TtN=7d^o1c4rQ{pIV>FZ5rvI_IAIh +z6t#Nk98N=jI2Mo-v6FVejJ(m!W?46~vAgPgQ&d~kV9rXWY8p;zhOMWC^@cim5tD1l +zkV)(SKgJJO{1Pg4TB;FxwOLu%b{U=iqodw}NbGUJ4y_D_5~RG=Ys$ZRO?j`^lvRmP +zx9V+ob1`$l%JfcHwPug`euGp-kB$vL9d&x +zU*;WQ@|$K{Z1Ojlo6qmgJ0^X)8QyIc)-IeeqtzU{;h*=jQD;Ti!x-y6iRxgD+QUfB +zV$5Y@slCW`FEoOC8fE+7=3#=BEBhwHdu*%yTC>BmyFZ)Hx8HzyW$ByS&r7yc<(Pgs +zekPq`#^w0c_)9c9!)9o$&#c0JPiqt02&q*mvc?j*P58^6)SO%-b!SqkN;V-l!BA=< +zmo~8yoSjLuVmeRv0B~KxE8SOzU@+ZHt!G4L^P`zrW|&La;RsL`i`3kepkl{0%rHIQ2nd$TBkV-wnnzDHqR_54+kP?e?tu?6RIv&onrV*fc|aIy>$rM2qz)K@UfkFdPTyEAB4U&Anu +z;>ZNbHEqbrF&A+YU-LJt3XVqTD;eem3<3E*w*l3cCj$fon0e9nTQaH4bec|VR?f`m +z%2?mgFz@(&=A=yd;8bQ+U@Hg3A?DYfn4F%eN~IcFaXzBnPT~%>Bahp=VUxvAt_(|V +z1ShN}%wFVe&l1@U9%b^tR~WPv=WStY_GYt1BkT#0*XyEM*%MYw)Z#>;xPuWa9OXBd +zENZ=gElC0Bnnm7`|A6sIHwyQnT!GiBs^u-g +zq=r7E{aOgQ*v)31M&)~qxZskC(Sr0cP)hA*F4{|uW$jCYF)3lNC?(5v{=Bv}k?;X! +z5S0)$ET-)j7@&c?3{BmLeM?J{MN5$vWP$F?>1bTEq^og$R~w>07-$~>M_NOa6NT(P +z6ga`hO!B9XuNpsOd~)pzo9Y`<_4m~?L;o0}I^ng`dShP}u;Gkg&YVf#%k0n$JGpzT +z8upzE+*&YwBnzUrwUeJhi)^?>6ZZx2@$ETnu^0B&WNv5=nm+J`MtdaPRjHG`&%`m| +z%=e(hJ+-P8lUWsQIZop^N#5GEq+>6+h|bxEi$+0kAg)mA5q-`lT8L5q~)>}lfV6KSI#(qc@9dlLcAMr@q^p;6c34ZsB1iA4wT?6Kuj +zzC)3p&?lYD5fHTpKmwoLRA0q{7I%g66Z*oFc`ZSr_|bFy3t<=Bmmn$q({r1gFxd+l +zpFO-Cn|;PSoOqqQr}v!e19&>|I>O)Kgr^c@Y;3`C;~boQAusABP!N=-iMRPrLCiNe +z=ZlGM^Azv0?l^~Pxg&?V^W-_T2;ZHPH;d|jgj0T$lh*~{$DH&)P7|g42r1M;H*H_} +z=1l6;d))R_EBtZQ2ItO60wAMbh+Zf;*QYUo+Iqmscdeal#BUC~2B`d4m+L +z=RHncwW5itu*oQMWlrKSzlw~mKcAD#`!fpmOHy^5iGx&F>$oYWX*#k#cMkRG_8gjn +zXqZO0nd4tLr#8~iojFOEb2Ni@uAn)2)==p?RwQ{m3Q_qThRnRpE2xdp9nMPFc?>f8g-fIsT7a`g)H4vq{1MT3eT{$6_u8K~LM> +z?_d+xn00+<4&Rh;EzR*i7`U`g(o7}Pzs$J$8V~Xoo`~P(bT_9_OS(R7{iIBp`nH(4 +z!T3XH5_3^AzH@TTb?0_7QgX~+6I&5waxr55MiPccLG#B%H+_?>ZYs@jG+WOyb={E& +z!>=Wp)Qr)$$jpPDzi=EdNV}=a$!3u)01DNnXxDmC6B8Jj-B)7Uyd-&Fs&YC`ikbn* +z=KCtE8hEcPrw`amA2c(!^U_Py%3S`hnSm+`Szl5YAl+?{REqB>cZ+T6po70=p*sU-XI4IBEoag6m9(}Wpyky9+DA%$8{r%ZQBk!^%T+L~qW8_=K;s0>Bo5SyO +z_yP{EWG%6h!xwP)eHNeHrYT)lN1c6>Md&yCB+`CENFn-?pV>`=G8ddz3mhiRN=#eA +z?BFVH=Wad6#lOo{|ANCm;PB%d{vn4S;qd(&{t1U4G&JA`xSj`Ds@w2mCQ;?1U*`Al +z>%F{!4mtgaB&fL#jbCrN>oJ#qVazk6Iub8|C@;qG&YPae-no?Zz-`g_(A&p?np%Bta3z`i+#x_umV +z=yD&NIG;rBaU1I4H9>qG<*1?wn$980%b`h4btv(yx4}G>Q=3Yqs*rF4*Z*Q4%Dz#< +z#3DB^o{^BAit2vO&=Vdp&zp*jIQ&6n!F&z8nB9Nxm=r#RPL9Danu_a|znSEN$r-^kUY^RJ=v +zzd*Juoqs)1+v61A{l>4aNSR{Z^C6E~>yJ%KEvypOk;&Xex*MYJcGAhcA#g*Uju!qG +z!ofGUv2b{r!{6iZlN|m&3y`04SOpH{zlVj)V;rx-hvM(!_@8pT3L=Vsfa4$J_y;*m +zg2*>NfqX#RCPohh_&kH(;Ih9p!N!=yByhPN +zd5V*!GYRvmJX2ABAYm!k5<>g%e~3&P9d6%a2Doiv8Kj@Wz1b7h +zrNzE7<#S;{1-aQ+oN8k)*lr7zZ;VZ$g2RnBQo`zrf(};Q4DB20X6Rh1l^tS)o-j10 +zv%PUXUC^-y;laPwM+H}H;I#_;NTKf+E-Z09VV6xgo{r8tC+caCp&u)18}OsO@G!|E +z$mVN#{@?}>w4r0C=7(~y_-nL=rU>(=zNCl@9SsXozZ#^zoF(2^^g;*DfVj +ziktG60@`pk|CDCdEtR^=8wJTVnZYoXTTtS?rM0kS!K~|WZR<%d*^0WhbWz09g=8aq +zN5gQBR5sMLWu~UhUtmHc%w5aqHq0;bn=<4`xCOg#P+$3^`fug%@AGN#c>{-E%%|RO +zT$X$w^aNES|L^jtrVX5DH)=BfJS*9nYOYLI(#ifAZ#R0kL$*XGoc +z-2M;zJ-%6$({ysGm3o;<)nUO+R|)WcU2Dy_wW*V;$N+if9P3(RuNjJL&Dk)G7G{rP +z{efN7oUMf7pEB?WdEKb;`?>OmxcPfH>8YIVl-ZqV8j941iG0k~zF4HwOy0d53sT?Q +z-IvDkGu*V`p&{mhzBK6%a_;SYX>zx7_(2Xoz~LWr_(vT635W0J@IxHl#^IlG_&yFl +z%;BvZeuTq6ubA3V*hat|A6D4=u4z}7l(h&`M=NMCpr8*4*!C~-{tUA +z9Nxm=r#bu`4nM=;J30L8zKI&&Y+_^bqH}oZZk?EptJ0y6k2Ds;yMz~BZ(()in~T^- +zxbB?f3HBWAHJtVrW~giW(9r+F`L6GiH`(mSNjBl`3nDLF245#!uY@&mu<0MeFF8$BBrPwsWP_MDc!_=yGu%6HOh0XsWSoEh +zOrqppwHa`<`0BbhKNW!%6Xxnpi)_1pfcU=^H8q%-G?x!_(y(4DqVQ!{ +z#i)dQmt!vOYzkuD;+RW1$*x6_3yPC9(^2T{4jN>4F;#FSDrhF~Vg}#sz-^u;#K@io +zk;~fRrbYEcsV%E#tR-^&bqCS!_M#>n1*bZ8cEtMn?c%0##Q&;;I(kPjQQ5N{EY1Oc +zmmB&;N3CrLG52xI&!m=sOt*5uhdXGkeSb0Y;sadcdwc8tH|hQ7nYe}=<%(s*eGbPorwkZ{7yoay()B!6x~CY|KpV>wOuS>Mql +zyFR{og-d*m8j{KUJI7qXy?vv21JS{{4)%DwS=>~Gvu?!bt57YJDyz&3OOk1dd;1JK +zm0HndB{aeRJcG%Zh???$LpQ0g;ZV{<*2W)k-Ukw`Tj +zoc}iIzvlmSNwN<4Z$W-L&7tjrHh#xtHlSMu4t$apR{@FY$k3m^Fxw0L=Je|7%2st) +z=nr9->+zCNc_xLG6*-yuHaDXwfWasO=ewg(!6(`LaD^uQ34v*E#@O52#UTwX3`&=AGtE8G&<9_ABigaChW_%Sq91YXPWAo%hT&}*b +zBE6tyTq-jT*EcV|=k)Ou-@NheR60$^iBlJ3Dp!x6I3C9~E-0Tctug~65`W=UpEkX* +z5t~C7m`8A7_CC1ei)-OOsW(MQ(*-w567Q_k+ljY->!(ZW%_r8S$JgKxEpBF{Xa@&q +z8cGyKKFL$BL-e*O4~(=ISWYvD(ztg4(o{>!*uyLBF@AXSlG +zbr0VpA775))?F}RUUddid}8^9^%ZDs;?(k*=_l2tPfS8i9~M&l6J6Bwj|-b{ +zC5YtB|8c$t3TdHq6?f~Gw$^WRtuJt`0awG>Yuanq-dA70 +zdZ)UI^jCDum8E{w_^R~jYcxfFPsiL;>SxN=q}P~Bmv1$%^HSvMb{fIk9A3*yh{{$tK`>`iAlbQ`v-z?)CNcb!KXlIlAeh +zmJ6yH=|3D7NNytTPo=8wPfdG)|Ho+m$X3{uu)0{Izqo=df}dei@Hzau1JdZnaKf2w +z*d%)b5%(YhiPNTIhw06nCJ3ZP?8i4$RBo(4ak2d}Z=cJ^<`BkY;SbcE`5y#b~O}HgZEc7q%2Eh=GO)~($zJ#!TX=$>#?!=l^Dbu;Z +z99o;Hm_`QsLh_Qz-?O?~=+pKP%1*2|aabCD?PT4J^ek8Fs&opQ +zGjOW}|5x8wXWHojiT|xk;nk|-_|qSlKXYORG)#uk(j?g+4HcyLa1*C|Tn(HuX++m; +zyBJv}q_E6NL%q#tuBfV8eL60i;8g{>bW)KiuloPkdlxXduIfzmRF~Yejffi~z(W*h +zumIUocU5(_gh)(cBgv2MR;#)t*~-M3a;v-gVfCZjRjr3(Y@vrEz>1xV@5Binmv|(= +z#5eIIPT~P`aWYPD@{wH6jRPj=CZ1epKHqztpuqy1j3?ZGt-bzzPMv*P7RC_5H^OwS +zv-a9+uf6u#Yp?w{`&?F9-zx?6eqd0B#`6bcge>EXgN#(`))h8hQ@XSl>F@~h9tC29 +z!LJ@cT7RK?-TJqR0RkcKalcxYcwX>hv`PfcN(BLAPpw(ooH +z$71o3q73Wxo&tUfgFw4~pedrL;!yt8U(YWM9No69JPZ$mwQv-*4m1#8`sC-QaFNwz +zdYi_D12}~)T3GD4NfaQr8V%rYVX*JWwrfg-M=(ViEN;L^SzKT07QzMGQy_O>tS_$b +z#=cAeu47=MRAOpqs=IXb{l#tguTKV-*Q38rNvKzl_ya>R#4Qx_Zy3NM6okPS>}nch +zEZ`i@fIE#N(cx=*@^i8sIXqmLIx=+xmt0`=A9db{OofeDjLQ6%sQhPK<)F;j7N;rR@C|8!?VSf+YD{c*wW-NkrVfM(>v?^)Hs)-m2 +zmb2K?KY}7%#5LI4FYUk7)3;U9U=m1y0?)?`2+jVpJ^3{~`5TN_vb-KO`k9{mJ9_fF +zMXTb@r9|8)alU(pthZNML?glO();_Gu($3}1V96$I6E_`%I$V02cb7W;Pt%-#6~RVg^3<6lwg=*)u37CVLFk37#Ws`|JE1tueP=--_(1V2#6MT +zuiQHg?7bAGa?wC3Ht3r+URGS+yMBGI5Y&5cC(QcwVo5jmTqZkD4XiV*-vD6{WZ#0w +zZo_&6e|pZ#{?>c?y9+Zi>=l3+LST%G6uMosD^(uaR#-PZbWO3@Jof(L5ZY?^{l)SI +zF#$9ungVuc=T3Hwta%WOHH!3j?^5usdIpV7nkO@eKH*RncM%Yvhv9Edu>!$vma+ylpGYqJ6{_Z7Y<} +z15w?f!Hw#=hP%7-AK5>U{}x3406f`8^WV6jXYY|>>9W4dO3p9#9V=lSE%uQ|^RGFK +zN{Z=V1lK;HB8zHQVI5_5AphFWU^v`{e;`;_DouA(Wad^{C!O`ep599lr=yRp>?w;W +zTq=S7kXYe{%hr{y9{g2!PWTKQD=Cz5k<3@tZy#J=Doi7IUtgFiuK&ulIF5oTRB_$Z +z9R%`NPv|Z{+r=SlI`&@Gdvtwq@0ppKa2|F>x+Ws4C2TRgMHUWF4!92umih*(2=oh= +zxe3p(>bK|Q(8n*u=Hk!@LK;}Ab1~2@YWSf8lS9(1AM9}Vp;WMe(-z4`_`buDHhI*4 +zx$WiFZLjZk_pK1Vo}0NRc-B(0w#)Q5@=NYhFS`{M5B<=k4gH8;Y~w0?8G)ZKR5BIn$EMKZrxw`TP@lJm$Bw(toBfj>qJi*ryX|zXZCEB2vf0 +z)B5m9_wbjh_Fva}{Ds!_L9NFVsszH)1P>|=@uJ!g#z`RHA5cAgS>aDBpQjZ5IACl~ +z<=j=wAe6m-X*=2Ge_oFv{ECwQ*WBb+r>OkV#!}#$uEk^%UW*$^~3s(7B2o$So9^AfYI3bz0v#!9rds4ds}~@)W5C` +z`la~pT7GOa|Al;R77IM({8R7i$$tus2@Anu9z3nuMn3;b!UndH&)<``&D(tb*;`Ya +zxA$R>F`s|tR#}kMet^we5%90upvC;3zHd@*3=>nz<03aC6mXmi@QBzJjs@m$3$@DS<;d2G{9!$NaR>se$jezyz9adEs&989>ZhcH +zD<#h#M4zbwc8AJvz)afev#O~-R84(W#r~Zl9F60h=LSaPQ>(=W;SvllJz@W}BC +zy`&JQFJ#WjkMH8twG0iobykldp+~Fpu$48~O9?Aavd9Kdk=F>cNqi|@u*l_qyyqDE +zFTdZLe<+8QAFT3%=8oI3FSAuPp8iuLyPtcpPz&_$sgX)2$mf4k4@n%#A#yu7uwkh8 +z`J+kvNViEwy#aB9?~=8d>)i=?)PkP~&i_5$2E7#V@8GdQ{v)>^&cER> +zmS+c#+$6DT4GTn=5KST+Lj;AzupjBU3R_EhY}bue|2cPfu(-awttmTYH&0ek#>E4A +zT)L_TKb~dq!5y3#_WaUo78(h$SESDONG!J86P{^BjVL`ji0-BF8)kG>TD3I +z=nXNw{J~>FFwo>3bT~C+S7^a7lkc0^^(DM9GZ8UKmiTxNUgm7Q+yu#Dmi&e@%tc=B +zl_4D`OTVFQfn*_)e`2rU#nm6yi#sgO^Oz{oGF>KQ!$sq(xXZ)OJ?B4$n5=DjMQ&p^ +zhReM@`5zmYYAO@l*^A#5?ef;oigvuEw_=5?>$pGis?Q34(-glIEtg(l=Gny2V}$l4 +ziPzuQGleq)ddnmT1BDI*d?;K#G`|0BX;F&2G#h6g*|J~dVKcNg$;+WG%iC~W(? +z{rQ_P$Hs)r-w(jAY)gnPpRU2NQ7q!#KG2H=hGMA~*QqqGEew8?R^d(M0Yvmy%XI*@ +zvp&%N&BC$34smJ0>pvnBS?<5LpE(wj@r&I!{GHo=>11#3@KpCl2YX9g(d8Gs^Up)J +zFWr{QKY+uepH-{fq4w~z=VTAxAIFpBWfCSrYf4&}b384Lz08>ST{)of+EQg=tTBc& +ziWn8WJCXy5Egq*u5TzAM<7d(HxWb25*~>>fp4Jc?;W$l$-%H1v=PiVPp@i5daHn9w +zl3!AnyHY{g@sr+Y`Av1az@{nx+TY3V4G#mdXWx!%1${K_DgIjv#ZOMJ5BwZ1qr*t{ +zxbAcP$J={8z77}dDv^9rwk^6a%d9d6pOK=nYCVf3JyGZ3YX(go&qg~;PrcXZZDj>3_Q=zOg(?R<6m>LC9*Hn<6|(n +zJ8qNDOt|~r^ONo09L8$j>cepQ>+-96@{?FF&hNsK)3KZK{hz@)HORjShgR(> +z7lHD-u-ZB~Eg$rfOHbvS#ck1bSq+3w0PUL@uhzvW%aveR%0I_DLo(Vr2s9G?J!rSM +zxxEmSPV}ncRldtRZv7RVapR)VS{oMwi(QG9Xj&k>50J$hCk|`_4nf*^dJ)>iKe-9D +z@6t&!fu2Ohw&>5~Z~BZoJz%Vyv%F~) +zbd$5`KT7qZM8F0i= +zd$H-l_PoD=83!Q}0%C8pNEbVupamk>Jv?F_=?p>=IF0{L*AM>P?LB2I{L3B|uH3_t +zd+)~l>jnn9u|HA34RTnG5ge9>Eo{#i{sa=aoyw1vfQKV?U6iQ9totmJIGioY?xpO>KV-j1%WW7+l)TSM{%{*Ud}A8Im#S=U +z{2C_zyUgUHO#bz@+<^O}5k8&vO+SiDE6Bh6=aB9$^TqAf-z*H0|KntU`(Y=yyYdIx +zkEtA!?cdN}eE$R6Ma4k|5soF8o^Hz-&z|;gF?C|URp@ZOr9$$4+V3K%E&6f!oAx}? +zs{;R#)g@g=dd1vQ=<$3XZ3zQKw#vffq`{X6Egp9Es`0n6eujPBhWrSn^6abnp_# +z`q%+91^&sMeD@CxYxDQmw*>JOD?GQg>q_xJ`yHq9J0?rpI^MM{-zx`PZ4gIF#8~IARo^q91~vaL!=Si^KxYveQGE%ol+90kH{RhKEh)5} +z&_cZX5L;`RKZ@-<{BzcncjeT59G)(tncTgi`GNL-L_2;gu?x$_WqX>$4h^R}M3=60+?;BezWetVDXqQ7=>x`f4|DLECUFO=gOxAU{dhw}ds +zmowXUVv6rG2~Nn(7*qI~pb8+?iFpVl1$%TOWK`V&*D_7~N)OfZLLL_w?T8?%77dS|%LF_la=` +zU%klT_HS(MXWVj#6!+$E(erjCm~8)+4}2bDI@Z8&z(L~8zf#}y@!NZ@!DLl3;MSaP +zHvQKDuDRWW`5Ream3b@#xq-+-2#>%6CvfE^P^^aHa3W4|%J~fZYVl&H`E~@c@|$m{ +z_rQ`)LV>B=(U3_v5%%0mo&h`mkf$cd1^PCNHJC8p*wE?glN)!p(+WWX|7N +zfeV=Aw9CGMzU?^urCJu-ad~m~w$0mTk6Kw@SdklyKVx|((Z7FQ?vBfDx@;IyAGviv +zzT*B_eZBOL^bqbh^Vr13&K6$6Ken#aUBKb7{_?izWApj0&(Hzid(2AstMhVGGI0Nf +zW_>E(gPUgX6)t^2<8wGzmH#x}R{QeLpE +zTa@%ryMFag*Pn(4j}E$TYNA6uNQ%eX6JILcrtkJ6F8TY7?BE?gZ>&zW^Dc^uCb!B# +zu+D*@t**zp29#M@$KPv@lzp+ndK)JM-7a0J<7@IqvUGe6XA8Am-luB?6DZ^RH4_O( +zhj6}=H6mmTG~poeJ=+*di~^Z{-}`!u81(L~ZXbh(`1)1Htv!pm$-PCqq_g1&&0PrO +zpDZ=6V*A%fkB>Th5Mkp0j-%ogk!ZLaoeeRQ_f4^Ly(=*lk +zxefXnRq?Ca@_6SFpHAq7o;$9@VZ}G;fy!-o-|$HO*KpGb4m4@0U)A{kw^8mtV+Tz1 +zw_wTboI^Gcw#0dB=8+aibKDQ|07`2v*d^Ixg_xm;}XQZ8PSiNDc*-E +zj-EF!^$&4^@xo2hesb)QLsJ;XrtrV{;OeVS4A_iDK>xpkC8&-E&{C7xL-?|FRIsLv@`<7x?e;E?mf +zI2it#j@>whUZ{$J}j +z!s}l2{ED<@dX*+4;(95EpGc1)CuhrNtG)w&jh1)2D`;qTvTy<(`);(l6_~v+2sWXQ +zPENa}Tdugr8m=3|zP3@kDCoXv2?yAo|8P!D;-1EKKlTOD_`jrq)8FA4*WuwETDaKW +z?O0lAceCK9$@R;yL>G9G?SS?A``eG;eMR5#5B#qt2R=|YX*SsIKCbzt_UGjol30&> +z@B4t7&9A*2v-!@vW`;e8qiZq5gaHIb`HGxEvNnzbcJD6E;+d1HHs+q)If2-G;6Q?X +zuR~zhc~QwryFW +zlO)17&X29b9`pJk@_J!iX|RlszIFSLx83j&&kLw-8NVJWc!)VZ%gp}sM_dHf@?6WW_Yyk%q3=+Rf=cQnrL~v>~Chl +z8(ne`PgqcJ5GoFcU}=7cgfm*k05R%$s{$3RCJ3Hp7QlI7acoLH6AklA4b(6{u`>B9 +z|MHLGtoW;Q-KFl0H_hW+(cb>>4BPtLs=?w-^dv4Ha^kap_y4?_9EU(0vC`+yz_sBr +zfrUx;)|-4(>QY=#vU{NU*^ZyWfr0hgap~1i!R@Ceh56lF4)47V^z`DpOrJPXI5|vT +zHu%xsC+oUjhvIYY +z#QZn4sJU}2Dt3csIah*Pf~y(BsCQzpG%=`?lxa=w^;0wKKawW@@Kwl*ahbp%I-FhD +z{0Qms$ZEyS^|huGAFW`7u-UJ8=wZo4d6BD0)y^B=<&S7GzVp0#2tSzN)6j0JD>V +zcsn_!aOgRwmI@9grYs9gT0ZsGGQ~>>3uU1Gsi6eT?7a>&5D#b=ljvIzjB`8#Hp#K| +zcsJ<$3=XiE&*jwgBl1nw`x&kt!{YZld-B)!_C(JhR1@%+nL8TYs;ISKnuq39>0~j3-4q(O2 +zp7Q(ePdvO)mIZNeZeVEcNd6LeSw-fDDin5|rn>L=oS{B|4=3PF_CX9mBLmm=<`*5U +zIH;UXFmddq9h;PRZj+56eA`j{RxZD0;81?uVOHfinQr1={!}KVjLt +zcpr8OaRWoQTWrS?3cl+?f`5#1cqRU}HxzM50i%0&um2D7I%VR6CAt)-8MQPi@DKIv +z=^N!mur8+yyyS@^53;+wPZ0Tb_hKVH+w-=s<9P)x??$3Re}eVPyh6Q)4K+;6Ms?R% +z{1hfDWM6UxK3-!~%K1E9fyJkPgatM}br-xNKkbM*U`4UKSA5Defdi4)PyShv_mYIX +zdMnfZl)P_s^4{&`{Xe|CCEQ1-B5kL<8=Sm27a7Ydmv}0ba&D2g-8O35u@$34?T9{9 +zUfC!_+sNOv!%GCOncl_ug|qnlv?uX{Q|yO4imsHdDp9zb{Is|k??d2WVjlwMLdOBH +z)p5Yt_)r*LCHB$q9ErIVf?x3?FR}p(@r247VSffLaZJ|Jp`#CS_2!H!8=QSA-v1b+ +zllX?F{y#`-i~dmlouJtQ;Jh(aQdcR`$oUD$5CywNatRTc2;X9rBqzDPi}gt*5;QpWiOH?|CJ) +zj8EwT&uC$m)PF5#Vuh3Z!2e#!O*pY_XA)uC#H(h9d0L4gX%o +z11xnTPEQ~PiT~j$9{pb|_|v3)7EuY(+&_GzTK^S8nST*mj&fy`R_2h3y&+3%F%j%( +z)ni?bVTWU?I$vF!8SnA3_Wyg+=R1{cKXo)j{7(qJ-^(#UJPwdMw8x_${U|@YWo5cKIamWX{&$TH1{=a5hq_0qP0aba|-Mz;o#ynp(m=$)!^2~ +z#`nf*akYe%-XZ*tvL+slH(L|vBBl8h&__5OD-(+~A=dXFRK)i#Dm+c~%L4unJBsny-khkO6PY(t@lAI-an^tR|K`J3+N+CJ&Z5TtaXGQu{ +zWnn&6z%?v%jhvN|F5Hi`FxQpQO=Y3rD_ZJ!R;jW|?p4gOFs*qZs$dUo@nCI1_Q$mM +z%3`J?tjvv#FD^)%s8(dmG1ElX$?J8G2S1bV{t_(d{`?zo3EhRVrHlJq3fR{z^vlYI +zlegG*kyGTMoH6(fc~cq}V`%ml@y<{|vLXt>Or`w!H&)PYZZB +zC!l1>e-uQ|D$(EGhLonJ{1*W~E+FmbLAKpvZE`dPYA8TCh0+;qL0$CeFG+$WmWqhN +zack8Dph0BqZ0b7bsx8WN!Y!>EjW3SXr}5R}8l0efO2gNFI%l=_P8CC1jmZBy$`y5J +zK-aPXA|4kWA=QV}AGDy?w3!50CoUw&%f!RUq3j|A5E+Wa +zUVti${^58f3KYGZ>py&*z3rOUvo$V9s4f5Gn=^`=6{CvYEq~L!Rff03a=!0E@j+a# +z-7Cnps2+-??Iaqng_zp@M$5}=$#6K810$g~BvZUYh|A0FfHJ&0yoYJ>Ca|PYl82cf +zzAu?@iV2uMiAsxwqj5`io@d&^B?!=?q>^EgNe`kmasS^oNyq=3C^u^@-?N-n-5COO +z(%Gf@%)V-@S$`(RYj&39U_r_KqXc&{rDRdUZ)%|%mn&34%D5yAMFZX5L!R%3SHsCg +z=oZ~l2l9Ui`c8Xp^GgG(Sn) +zAIG>SiG$uq*KvUf_cgj32&i>XQB~a6=^$As_CEhS4|YAnY%aV85vLuo1Y}@IEh?FtsgH*mF>W#^l^U=mJle&r83|Zn4u~=5 +zAZ|THmqGie+MfLJmf#D(u75#B0{l}dPccgl@Ze6(fv2oo4fjZ-rZB`>MfS~iyM01-LfH5ba>pCpW3w|;^LU({X*6c5-FTgCW=x*P_RPFzwzjdqt9uInO`!P6 +z?%uBM?e(s1thc;p{N3;F>YkijtX47KL!Nn1O-?S&k2g@K?s`>!K|3k;oA~EwYG!<* +zGCsRlnVDK#SgI{L#A0=9qB2t-Lndg&;c#BIf=eUj$M(zuRi8$%*@a0%GEv^WOHyNx +zaA9$#aj=E!xTC66mXN!zw_+UjgRq(?bI(kpGQTvJV4oC_)Q%UIQqV*NRERT7fbn9V +zR@Aa(%4O^)XBWm=D%GL{$6y|sX{l44YSB`h_Qoft79&^7O{q$HEiTR1(b(0AF4^=+ +zR8`+%T-5JjR$P&Ny)M~mkko}WRzmqE040Z!RrZa|Cizod*Nk2a-=0E0!C;}u_&e(LVHlyZXi1Eg(J-V7~-G1$;vBc8O +z{KEd(>ckW}4{IW6mNmhOTqay?YBLjyYEE(QGXXmBN0o}v&D1M$eXeWe2}3&04ksuRma>ZyTjc^q +z+naT-Xv3dX6!rG5Mc@~g;KrfvN_`6duQrxymKW2Kx~#!Y&P)jjPLYl+%{JDs-O)j!#q@(ahq_u`|@(A$4GLN&TJPpyXI* +z>O@d0C1XjM$Qf5m9o=X-^X70ro+v>3VqAdsYR?J2TUuZBWsMjYldQU!iZVf4_=cDp +ztM82j0TzpuSv0wJ7Cu6lEil(-Jp=tmt^pg_0vYx +zmy+G#93O9k!n@K~fZ+3S&TKKzWSW^Pgi@_UzsN|`-l^R(%xE!8My}Q_>zYZdW?53} +zgHlF;!cqTxZf%1kR=QFpZtzgjq>G(hK(wNNT1KKUlU}!NUZT{TCnGDhs +zL>1n*)oWUN)yBlw%p^t>$jKPe@>Sq0RmzGESZBB2#F{a5CGkytd=Z88A;6XR9%qfz +z8}!x?**k`aZZLpO!6iZ5Mzpy+G*r2EOXNmol}ai!uVV-Hq+k&X3wvj((Vm3`t%}#+ +zLVbE-R=mVQy`|cae|`}vDv1q9QT1rYHCK*qt(334dTV9pPnWk=t{uMa${`ebr4>GG +zzuIH47lsiHO!pkb_76sRQ8xw@=*!CuYe=>>3X*cPIVfjk4la1A<^)jHC^IOhL^P`J +zbXKc7rO`O#7fmy{;47=uK?jVkHc~L +z#>AX_VKQ8LBf`YXYL--~lvZ03w^5M^pwFt!A??Ea%g9t8+b3pRsz5_-fH12!sa!{% +zI|wOVYebDH*Zk?W+_GgfLR=&Pk{G;I(ivu^6{@_>Jk=`QVB>30-!C1e#iDAnvvuJQ +z5w$;AcZ7+sme!2gxMD4?O53j7T|sl9n@O2a*~CJnHa0&q9*GC2&PQ8Pjp@b=8NQ%h +zwTV)+xHs-D@eqs2rtDQz<`&=}1N+`}<><~W@4Z^Qkj3U&Ns|_W(0at9wp7(ycy?Bw +zu?nv*VK_SYcI# +zduDsx6|L%l^sF8VKrEfDj9$5|vSTOg +z0`mvt@2ga6&clq2)yC_XjH)y;Y&$22tDTfZ9d;Pa%z5{XyuB6otPaXfSvX?d3x)55 +z@hEd}Q+k%Af>*~DXAf4S6#2rujiXwquYhgu;*fL|Vj%?7rkuw3qGN`#(HvrFI!-!? +zSWau5V$CKBtW-v~SGEpsfjUxJa!6%wI!QKBU$XK_6wh(y=9YBqOGu +z6hTv1g8AtZAH4LzXd4WByZjyAq44$cckAx0n|JNpS{as*tEB`j7QPuJ%*~C}D(JA* +zN#j6I>#Q|oa|-+I!pe{fm_eyzD#==Qcl6pH??2NS_P7^gu$;372JI +z|9oZtJEXrbd-G;dJ1{Fl%@71$6is>+Ay7!vttF52yIM;bKDkBz +zNsXjhH$lf9Y_7z!N@+L7OD_`%oD&LqXKOOmB&yBsdkBXXW*4U9Qe$6+vr}u#26kF7 +zxv$IAAKOFlMiO8n@Wzj}nE0aQax6?^X=n}sj#45*7H^J%q=Dhv-KvBJdk)m`Q9Zte +zWa9ITg&PPOSSGVU!I5CHU581JVfs03Y&m2^7N&E2P|AI7NjlI5-x3i?HT-aU+|Y~0 +z-igD}k<8sEQGE>~YtsiKi6JK@G4+sG4)%-Lu57f)McWWIQ~6%m^%+d8_Kl;QcqXpX +z9nmYNElQMFG0>P-EIYZ3AVl2TW5)S0@!c{p92>_)=$QFVSI754F<7_9yk=Yut01zw +zxiY)3Kf+uVl4va;cAPdnQ-PyYzrMH+S1Cy8aPbvg;y|NX6|m7Yp=(JM%fLlCu@+I! +z)B-T`3ohOkQ^M;gGJzIJFio=cDh1rtIm5^8UEjdMNEH_ba +zZHt73tL~sL>WNhvTf)S+UY(spZLuVU!5wo#=tMd|CEaGxcw=!kGR10P4c#YDiDXZY +z0y#xF?J6hCmPCh%7KK}!nV+a0aMf|3tjksAs8neoQ^uSNRdiWu0;_x2m{=U2MtHI$ +z^GG-M)kU;y+v6Ncf~SJ~5#y6kQ5j-;HX4_0G>398YPp9cUF1v9PD9{$Q4_O?2>YN@ +z=+~9~V{SV|4Mmo{D{iK*%2og27HVLB}s5Ur2B +zF(r1BWkoI04u~Z&DcP+Iz_)>qu1UhY;v6VPr=&2+N%%DQsM6UL1?qz3fT|GTPFC^y +zT4i!RYRvALL4U7e9SsX5QiHki<&2$WVv(mN0@kA~SM8`=y&b{t@b=Nl=JKvqgf4!m +zq%K%NE}5k`FT-LGFD_x($Qv>XaT}Vh7~&{+tO+=}3bc!M6B=I(dxbZ6jW+|W^|s2p +zZSyX-X<|dZ?8s2eiG}$plsz`(HP2?MBPOnD~)V3kZC%j-y*A<2L~ud@2LkG{`z&Z2e!!Z8EU3y@ +z6P34!mGr6ekS#_%RgG9gLYE0Feu;~gU>%F}@U~;R@MNfcGmDKSL{>UdgI-p(kP~ZH +zGgt?&=rW%Z7;BUB5Op6MOJyG61RR?sW9c8Rv9t+Y9;1fJF5MP_T0G*yKO6{9Lrva5 +zBt9w9u}7^8(;!H>h +zza{&H9(8N87rMf#qtpFVOHg1U&-mL?JLIH4XF{5n^c` +z>#eecok*E+E?O2Zm5~nvaRg=(brR!5qe1O)kPC34)k39Q*T^z9$eOLRwp3Tv9Ot3) +zS%f~ap;4Jxm|HsFG>Uah1QS?f!+I1~A8@$fY<5DsLx?V{qxxPM5Rxk4gEKXqMp<}@ +zhM!-U=UP7AEI?OC+WN@>j+N}{s6$en?q8gP{VmKn`(vwM^F|g$ +z#8wmC+onU>jgpN|lZ77>OR=_+DkUo8wxHaWkj#~w5D3}finY(cw|LirpAH@s*h&4VG+*I_ +z8z)Znq;Ejz{-3uXxGUdeCa=igs;NFg%_SkLbx`LK#VxQK*0F{YS6Q?ZItw>{)6Z$T +z#rpE*p+T8w=st+U>p%?OsZUr9)UZHkikz4^I(RYnVNTHOS;C4^oJF>4kfCnfN~Tw- +zRBca<{#(azJE6=DswEZlFFGlCU=&%<{hiq=yy!G!(+xN$F-{BajYhX^u3Wu!=awsX +zUK!QL$L5_wgr5>OSX-KvsVDZmblo5V8k_BluyObRhm!oec5EHpynV~oXtpL>9Fd&( +z6Njx`SKKO|g(DoWoX3{<%WS;DegAJj)`%-YWW+8$JUWuTZgewySVqj0hGr`Zenqt +zXNo2Iolest;uN-(WcN$>Xcw0@l7~bSwN~F8k2b>S)}ifJZV`)x)5Oe7Mm}tk>9&X{ +z0U{&KZIJuedZ~sItB_8okE)f%czt|t72}l5Blk669sAs@90`TW(&EQ(Y2lNhm6;ushse>FqBT +z%c`0Q#K6vn%JfZmf}pQb>g(&fItH(a!GTDp?vTyb5C=sxfHj59E%x?C`!I=`kg!Rm +zmZ(IA7#wV_FHT_Z9qSjj+>B`796jQHG?4l+v|2+}M5hnRPGvuu3x_B7!4fs3mvKRh +zL5!S$3QB>mK}g&fADcs|B0DTdPRC+}19P{=0{$R%FAQfE +zjzi0|7MfesGjdX<8C!jCb$>KFJ~8grL9pPwH)`xd^I_s4t)OsPPu%tXuR=Gr054n%zyu)^gAeDEPWi6r~b9E=&fM2atSW_qO6gL +zPp`lMqG!T0NRAfGkJpP>tJ@!qO(FS!oFW^WYs?|+Xw20X5!%TTXhl2$BD%)ncrr9VPXnKd@D*t;M5J{GL|pYe)jr&hc`;-+TT+LdHZvztwC=v6yc?s8LIRnMI{B;%HFU6wEwRW}P?VBq* +zuibX-@YR)_(%d+TCH_xVpBCY^A@H6hMCgdcT7e56pKYui|r+hfPl^kxIXDTyYD>Ssk`xd+8frMgA&Dvo509cgQ>X` +zbMEngljN@PzZ$h0nBeUEz!V#xOv;K_7njqsV#UJJMi%;fbW!OV)94!PxUFgxYge}k +zk3TNatX6z}p@N2uFq$@7VQdVll5tcEhCGrYQd6*%IIOe?x)ZF^hdjf5tDC;o#ZVDhxX6P +zKy0nhuWr_Y8W;OOlTKU|fW>I%QhEs>!g82?0xq-y@kU}c5qP(@D4ah$dbmcs-fp$OKNJsQK}O*cfwmYSw{A +zF*|8Vm^UI=w<>P2u0vy3m|NVB^jQgWOY)~r{`AYAjq>MRV1U;PZ2Z7ji415)%*p6A +z5UIdNi@SF<0|7J+DTQ=#M*iNS{!Dux{T%!fj4P$T#tx91Yj?ywOX)HEs@@K!s{?X*v +zew7QI1?1>mi9*b6X(w+Pja98~;1`xHt>MDRxT$nuD$!Q0&n0nZ^%)qIyZ~LDz*>Vr +za&p|^`VwaEM%q?y*_aR;fywB$?neC!8^SUJ1`nK=lK4}4oVC1Ks7^r8vTizHw(h#r +z#$u845rCYJ0A#ELa8Tz%lVb?KR68ypcGgcLh1(Xf#Lv%7L^!aDcJ5W{(QZH*|0z{KA-)O%Ku)0WyJq8quNtbRjNTIV*D2y2uqz_UL +z7!O&#p)snvxN&li%nj?Vy<2shAdcgHwepgx!-GSra|zYP$5higryWCp=LP^q$F3C2 +zj^^j#352~Gm3e(_^;& +z%z)Xq+&JNUFy054-7C&lolB)&DWPL3eWh0*#B+!&H%>+KbJMrD=aN1vQC)~oD+D34 +zmGS)u1l@o~!c9{VrolM+1VpWZfx#v8R{AlufO8VWcunS(V!eqtTgFd0%$o8*LKTmv +zy50f`FqH~cN-DBAR*O3NbyHcLqfWCB2f>NX)k^GcI&{k!MVAauq4h_&=w-$HeoBXP +z5ho#`dMWpITcQ9F1Uih>f|Em7{k4WOb)xdl5}eKy+v}975+rlCWbLg$p|E(YL%2DB +zlmv_zpb9M6*&>)1p3|IE;v3Y9{#AAZ&}6UVBD$MZZA=Mpz1Zcgqt~`% +zcsD$wBU7Pc%F)5=wrt(3&S8(9;%BvFu!JYp@?{IKj)k?<)+lx7i@gr=>U7@K+vB(G +z*nCap%JO^TVz0Y)duBu74SBbh=C!8*AWK$Vi}P)1M{8s##^p6Joe-WD#bE_Oug4;@!BPlRWn2d~a@>W+v!XbA$Kpr6j;wm}Y +z(XzdYz}RgJ$YuaHU9rXQH&u%^K;mR|P=pM1OY`!sFr1~n!hywpaZZ>5VeuAAW7s&X +zxN|y|;tGosUAD8^tBF;xU)ZgmDY=4VAV6@MtgO^tYa5foq)@IFs8OSw+AiqPZF|ky +z9pi@hiKFVeJfI1MeUb<5@ZnqC;ylACz#wCkPiBeTJCT~UGO2YOl0(mV&bSjmx^C|8H +zI9+{4FoZJdhz8|&p}f>8$F$rFGP2q2-kaA1o{bTXg*a_)YEC}UWG4=l4~}kNOAZ!~ +zc6SGFV{(<#0(R63rFv?8@-jd{tq8Xo((+c3=imCWQEO@3<(95sHP_cATJuOxZB3qo +z+n3WgIC!KxF%SqU6t%;F=sA7=`kkIj(6u>P|J9W`)siZo)TSu#P_K~Y!L}p0=hP~N +zGXpU~nM3Oyj{vewBfoN>822(nS6+3Myi9|44Den+883`r@yYd#hP*H+)~^GT9{6;1 +zLZ1*zP&4zqlYBC&@9G*>$?$q@oj5Z!2dBoQXjfguE=HZAkr(&j5)wVADV1_o7jGi( +zlS6-_c$49}&3JoZ$L1aOii~Z0Cj0@6GPVyiE>tGA&100#&h1R4K1j=<=z6*UzWic6 +z9}{-x1(K&2RcmNhoPe#r>dRC1a&eI? +zNLfwgs#Y}vIHkogIn9h&H*um}F}5nMf05UuwAq1^2Is+a=M(msRrDsah>^JDY3(>Z +zQT>h?sMM>*$-#Vi4-$uEWH5CHP{f5|HD_!d +zwkd{ya`o4aC-|fNk{Mg6xGV^brvlha08-9$DTxzkpwm_`O!wF}Rv|G>hPR9O^2Hl{Yk +zi{eaw&gYAns1|Kx5qA`u4&p7`I<$nvu{2XBkngUOIQb}Nm#}-p6HDlt%Gl+_Vc|HhWAab?-JvB2zUs1kCcGuk;*q#AoOB&5m(US +z@(|GKK@=&;X(7(0DvirjY0@+-OqvM2*J3Y>t+dsoe6eHGZfttA<1XfQ+bNR@{_f`8{bNi3)S@IhwTW8luAbtlaChUy|8ENdV^{s +z$z^ow&SBSWIS|X5vEF{cF;%-T_$MmB>ptXdJ@f7I+LD@zo)d(PnM6>y2$K+ebk{I7 +z;+*6>N=O)6rYW|192X2o3?u4HS^$=%wc8~VEUHv(IyLAE6J}P);Z}3;(L1CkzD4a +ztp<;xy%n2M`g$Br8&s>hS)i4{{34|pMzvZXC)XMvN{6=>6yyQ~>n*BzH$TuU=rD{V +zYYRA7C_^({yhax)fRc*F+zE(Qd9^g(HMn)92I^j+!)hZI_>#U^y;;id!9(d0X57^v +zgS_@@szD3H`#Q5Yl{uf*fNvdGh&yK*!C^IKu))w!T6H`2b!Gd}@BuaV-#BheSMjcp +z9aGhLox>O#FhuWM;F()>x2^z?9poLjS}px#qj&q@rxzFI7q9>+m-fiIhTGLeIW3N+ua(7e3}hvSWdn|jR@Sfx +zgx?X?B+;kbWg21(G#tw)wYSpt;Z2u?MOn_Vw8i~|AZ{w3nlKt_9w!{p>SxoF`2n4h +zVY=q(Ezy-$o^INqsj9@ZPWHm|?Kek}mDSxLOgqyqVBDp78>VA>^H= +zgbaQ}(n9bekLU&`Z{f^a)s>u@nn1dHXRa#AQ|By3!(^@yCEcIK0227yfRV_O^zUcW +zxxOWD`OHa+-%N0Vwpexo%hqT~lK4$k<1A`v9tW4P@2H>3b{>usuQW?5S{0wnz+zk& +z>~rC)tHF`Hb0b#}Ar!YOrmz4uJ|_D-g2uooZ?fSyqHMPvg%77FxvOnclV8nRbnAnrWHnkcpyoDfowN}~eQ +z=VZeq!OLY=CnP*^1Xo@ow6Z0Zk~dHFj*G~O^^!Ybb$4lE2|iZ~R+06XLoBZ=!?g`Y +za)_rG89Q~4+ttd+z0{btR7Bw-k;sm7XbVt@KFh+DWt3-8qUhi0%#|c#A_G;2sV^)o +zVm5CpNAc%)$0ONh!5gLM4pZ*B96OoL=}&$RQtv-&R~~Y>4gd%TfWHx +zYP<|<1^8>=o#(MY>+|e|K +zHzsWb*}b!l?Nu#H0|mEs@5@34H!p1Hs#K}v3CAG3kS=VId~(T=+xmb)+@!{_kdiU6 +zBoBK86H&9w>o@i%KdUH;mDdC(q{13@2zOU&S;nU~P`tEMIyt}9PuCDH`Ax-N-F1gp+5;k6XwoAUFr|nxe&)RP; +zDib_ys1;G|(Ctk=o$=V`b7lG9Q_DZHd&aXHA(+fK@{$?Pi*AlKyuHcH&&B)*l3#oD +zd~O7!Epp%?Ez0YZWAB=k-^RZ;)uOjuawzBdv(B#tQHq2~EcZuRNt(n{L9cc4B)9~+ +zdwnYj6sf|bYmk0M+oVy_Hn#;;UjhDM+obd6qLDO8GKOuFrn0t4qciv|*EZ>_8Ew-R +z)GBD3kR;tU>2fmKCQXvrHepHWY|FIG`+{2hFtklRs8!H5A<6fuZNieyv2AV*YVpI+ +zHY8WNQC +zzC97gUUH}-sKP3V7+;b~ +z=^-0hdq}QH{;XZl3b`heSZ>e?DS6Ie)=1GieXYs_R~ssOs?LlneZ~=jamFn5rZbv) +znR!*rk0ALir`|Nj4E44($)B|g)Z5l%63b1imw3u^4(cW88egk2!D2$a;cS~3yL`qG +zf^o(y^`Ls4?oP&DPeSR6o9Zs0T +zj6cXrO5toYP;W?*R&Tn>ubg_rId8hGjA%lJ&d~R!Gk#xI?7|6Upx%(=`={P;+M3qV +z54L*4IbopQkmUQP-f-smFH61Qv@TF@Nb(A(mu|Y>k0@n=S0skEaPr8En|#I*f^o(y +z=a9}Q&H>ZGbmrxziOfzZWgLs=ZMv`0(PSc-cBYAf;?$3}@ChPHR_hvH<1)dW2~~x2 +zKW5zGGma39GiIqOol#VUsT(s7#rz18pK32-mY3!z+KXpas=bRnf7ULr#EY9uV!3Hc +zB%bo9dRqz#)EoBK%x}2Ax-nQtj +zG#7m1`mU}tvMoB1feZ7d^JNBcFLPfo7mcUcpL^i3{Y`nY4Ql9e&kKsuw9@<2ngnoOeskh^RUVulBfb6k*z$1P$S} +zF|L#FtsZxxlkg#r3;EY9tzp0IQ7!5?`PL?%nK#25FzI-LJ>ffJTqoh@Jnlp%;nN-$ +zipI1v2^zvL#JDcP_pI=$?IL`y$A$cNTiRax&8Xsy0ZGvDLXu#{a>%&c?F$+w7|T~n +z_nC;jB%ZWhtBir>m+=G$A#)6|0jH{$^=gt +z$~gxioEBM6u{>2eZ~PuD9P;=@j;-!YF@@5ikS7Re}_v4JJ>Rr6+Zr +zZkRO7717PlzNMMw`YLd3zXS~Uek +zeag}vuwS$XL1tT-knxg^w1A{~G*JlQ$6{P3;g#*NWf5NGaiM@KEUm+SAs|6!JG+2s +z2KlIVaWl=Lv!#yhm%Q{|vNS~cA8?%^?nDMI%$v@a(TOuqVXnX@rAhM9&1-{^i>h3m +zXbHkyF|L#Fw8x$3Bs}YJVeM|TvE8zn% +zu9NVi9(SUX@M9hq)|31nFdEd8;KPP;K8#Ofb`EX(&th?bIc2-xWhVaTa^^c2A!T2> +z7PMS;xoP8GMvicPl+Gygql_a+I^D>?r?Y3QId=wC$U2%7Qk}!PbLP>ckW*U73>$;4 +zPmcwH{!7#K-ER)6kfG}gs+Xzj3{K~!>!<(a>-yw5={kezW$HSE)4Az7!-s?!Gu_({ +zhPMcJsM6w}gGSR?&e;Wo8GlezmC^aWkE+V(!9TdF%IG`aM^&9u2OLdnPsW~bWrbnV +z<8fR?@QIeVD$OpPQG$!kW;*YyP-yuQB&4&G`IA{mT)dO2;sw#C55GhS`u1gV95bmaCXAL0^%ZNqd6 +zU}CYt=cD5D(XkaxKCl%eHY{Hf9?)WX!>T1VL->HN|6Pwpd|2Dzj3ytQcr@a}dP8PK +z{Vd@@uedV7)s_vLa|G8IYDIJ$U6N1apKVJl;Q?R52*Jk;B^gJWeCqP$RtY9c2!~Xb +z@USmolpsaSMNQ +zOO6|ldp)lz!H;;<2*LXd1=n|LlMfGiy6Qs)p7N*(f=~ObNAW_tJ+QShy27JI@>S0& +zh&8D#mf98-n}n%v43q?E2e~MSFVdYP%SwUEShIV@*74X(7h4O82!vP1xK6@bJnlp% +z;cGlD3@X-G+Iss%CnI>dM+GYW0Z>eKcTEeHF^3tlYHjz`D-$dmDw{V`cN=>qZF +zTqoiCJnlp%;gcR0HU;_58VzJ8c*syrFg_iP2?>(_*=sQEGma1>Psupa@LW0Q> +zLQnO8Wq8njMMs1migBHUAN4q_nHv0<$Avn2!qT2h&=5Wq1fpP?KiDy5<@2EM0OsY@vlBt%|bMW4EtjnPA1EMhM<$sBEvm)Y&*A!9$6RVP{WgJTEHU9Ia`lGqv +zGAwqd@zxQ~;N3B5DN5!9O4@4YZ;p0Ve=<%N3F>@qa|jOBXPenCPoW;8-Z7kl2pKtqwc +zyy$mDgx45Or;>c=cuis|$%mDO6h)^0v4ktU5M_eQmfgHz#t~+WtUQ@Y7?|W0ws^>E +zl)PT_a!n9S@(Sl?A+H_eMPX#YB15hnfgdhg;Wv08$^`HBsA+;9@u)Jv6P^PT#O)f>VZqqg;7QUYnb! +znkBiO#HSC18Hl0?*S6bgNoAcX-H!54gqRf2CcZK2xF +z9(2_vDk)6ZQA1&Nq=k{{?`Ved?4Uf!62k6#g-LsjmwJRCOM=u-o7CxI5=rU4%O>CL +z83${ZH(FAnptD;=x(qU)SfY!tMM=eCvRiaH-f^yFRG-dBVIJ~bq&IMy4Xb%fQwnGf +z1T_5t&8-2=rhw+C(a;`Vwy9EB(Q;_2EQVCMC~)V`m?Y2Iuk4VuHEX6PW_%-}S2ugP +zptJ4G`L3UH9p-I8#ZJCNMsqM>#yc(J-S&&aT&K*y?^$udqxrWsnR1^|yrEU5B4tXq +z{XIs1ul>rg=JWqsI5>4$I_sQ^X40%y1|)maBu|+hpSItOC@bA6D~x|z@6V^t8WvM3g3lNV6?-<~!?P{9`Lxzo7o>bB8qyWS +zr*|0^1rglcLdd5ZV?u({Erfi!H6|o@yoHcYAC3tL-rGXRr~6_;f=P9UVv8iwm2NcB2GKCSiAO%SAV9U-46J2(HFglBl!(O% +z(oS;G4uUKhR0P?`pd!c?1{J|0zD_#`veiIEkgWz@1leSuBFMUeir^XHO@wh? +zsEM7SCaR$(c7~d$hML$JYN8ryVrQs{YN&~wp(d)KCU%CJsAg$mXW*}&Fae_6EDieIrqk;+M!tL^uqDF2j?%UnpNi_Bh#_YWh8mSDagda8>ly-NX4-a4D +z2V@}a;Su|l+=QdoB?!~?VX;qo;mZUcGG1^*1j$ltw%p_s3jpDA?4R=NM+lN9CesAT +zP}q-Tun)q`EhgfS{kBK=Mt$_QCZEf`3Om!1t+J%G_AA@`w;FsjfxFY-d+itYMlm0Y +zQ3THz3P-zcZ}K75PY~%+ik+6PE!xy1%o5w8D*{~zZn+xud$C3dl4U+xJmC3H$8>2{ +zr>wai@+2?c1gPLm#%pC%hjFgHBYIm$8Cw*Fy&+899bQFJG%D6>CHCQ*UjVx%v8)(U +z55%eIIR>unN#%H#S1ufw!c +zp60HI@Utjxo5T#o#01NR!r*gzlMgLIDu=X?n=ISq +zp5qRJS9p%~T$9C2c)H*q-g8!8YIa#0O3T2E)Q$uRX_|(Wd%%9hZxKEk<2ng{(c?~Z +z5`Mzt!VW2kVR&z +zdy{1t@`9C`gvqom>TMDxx3(zU4I!`1p4X8ac~R`P=tvvkiqV}XQrvwb$tk-|k6VUQzPwVCFy#{iNVg92{khL~B*%O#SsI)0 +z*SuiC)cZ+Gdd8CkzJhg#-st+CG`xW;_^T7%w3tloFe+&>!YgB37vZBGccP2%agPg| +zg8bJS4Fn^&#iPavmOZLW@Q_E16J&YW4c28D`t4VGB4L)3)nLp=@o=|Ej_^9q>qw5g +zek#TVU30yqU2eY_{g9%to**GO;d2FDlU2XdlavYGZK!OmF!dgzl6EG1Z;b0A99csx(IiATxbuJDxpro7st3x!mB+lJom=5 +zE>Ck;M0ib%>m^c1pxXut4 +z3c->#c|q@r2wxuKItiCOZh2mVafJvD8Ol|NPupWcg5;lFbEZzm841oB3P)NxkGLZT +z>H0JGjXw7XLFSfX!?g{jHY}qkobZ7d*Gc#j9(SUX@TWX3Y^;YY?NR%MB@q0gp|bVC +zj1L=?9HPD;`u3ZeL_Fd-ju0egPfG-g>X5-wxug}y;+R8keM4z{e%zN!T +z*BOgq@ObeiR?y8XB2Bn|H~3y79um~(x~7$LogUcn(W+U&6sLS +z#?YG5?3XDqG@USGaJEEB4DBS$7_5a##&ExO!mPXDt-MU|agW-SW`DOO-Rnt42|nmi +zJ03OgF^>uq&oZ9!BxQp4y@?Zspm^q5>q$lk4jIZd44>|a2?>&Yb_=qE13u#@!DPm; +z1v@Q6(Pu1Eh_a!ueU%Hm?5rhHyo|+c7W`Pun&6X$lFF2ue0nA(B=~F#VY*pa!UIMn +zD{_R%6rF(JQ$~iH=)wx6c`wt^yF$8G>{j|^x?MR?ep-ef#*QA=G3ZueJ-g09IoG9m +zp>5Y@;DS3Q(=@s0`ZP*pxc(eu2-X>#>8IJHpO>-1jG^Tf8*cumVChC^dH#WE5xU0b +zyz{#&B77#sbrJ6RQ6J}a5nkhQVN^r@r;QgP6N1c^Z7R(8ZJ%+3U@~JEhJ+bMnUMlZ +z&m~M|zy&=wWVM5=m`#L#>A>WbZf=&oHlcaKMZ+ONej?&S?Z;fR;gX&wB0e+>nI#=d +z*lpazFOR7RvM!(^cr>OW$cli9;Jq;wLDm9P1aI&a8X-9CQ4<7{ +zbqsq3>)7Q>93{w#;k*?=HW}gxf~***2p)=g5oEX^dekJr +zWF5muly$t=m$-uV4ILq$*!w_8 +zFj={9YR1Z~^Of60kkyeAc4bs~phS(V$>3@f)Qt8!sf8CLGP +zbmg$%!g{hgx#&8AtP7|JvM!(^$cli9AS(hYf~*Co2$sEdUPq9w1ylr+4R~D;wT5-P +zK3zv?!0R&_@cMK$9bs70>(e!Lgkfc`Pgm9vvc7CJgyaO1l?y}iAsY@^qYj)7ExieA +zh)rVHc;`zUT@q2OU7U#+)-aKYDAqL2L=0=2$V3!t9cLnjHBV$BiW-PB5ks9MGPOjr +zczDnh^N5c=&VMm5jg!`=SDTrwi0*nSYVv8FH@+PN*S8R+%OpEe!GXRsNpPMxz?1MqjO!wN+~e?_ +zGK25*xNx#T{U+ehv?M*(NGVFP{CvoWQK^swu2aQaQg%f_raJY5!w&o-D@N^QH +zwhGqwwC9G?AqJm`aYe#6yw>#~ENB-A-{^6n&d7g-(LiSeS9;V0!A?W1K-J&U +zu9NVy9(SUX@N*s)wi)^Vwb7u>2r^r?%ev1pJnS=$JZc~rWUNh|G?GVruF=PWT*1;i +zB{^-Rq6ETc45xcbe7N(?e&+mW#D}{LnbjODq0?xf27<>us!EWYvNc0q9hQ;TOKrWeg{}VaCy{jN$At%(x>fV>l&y(CT)v=>gF)!6A8P +zDW0bh-ZBVZWk7!mDCj7val2?nD>iD?Bb7CRSTopZ&r=re#e(FVl?0 +zknThVE)*f1FGBQY +zeybl1PPg&l5kqFR+i~M^(w9(d5`Nrp=p6)~^@ZMidy@|@#B^z8e9@9ld6F{0rw!GH +z_c_!59>NycHbF!9OpNOyeEe)jItRfg +zRuY5+Swlz2Csq=K1X)8z$ft=|MuN%uh654n+vzio5~S?twgf4-6gt}E6J-Y>K??2& +z`9#@4NRWa%LO$K-r5PcZtVZY-S&j8R;|_w99UC45DYz86BcmFlS=HFl468AkRgE1@ +zR%6ynGfMDIL%E{U{)*K&Z5jaY-!{v2myx5nxi(oQixOB~oR1FrA2~tZKn+Q@b +zpdv`6fQlfM0xE*k2&f3wy{Oj_JnB*71Svf%e>r76=aqFmLFN)IhpWA;^Li^TAD#c- +zedpboMDl?$LkfZil5}a&$eAADf@ozv%0sjfL|l{v^>DC6?|GI;MWVDa#050i-J$Bm`NCEaj&Eu`!>E?Sx?Q5;s<7 +z+sP@*aN2&eUQK=6(w_0mgB5LNKVu~4<8}sn5tFFM2--fN!!DCi;w+^1Mx>xJqMXP(Qo+wz8q*(#LW}Aok8#gpM +ztnzmn>SRyGk^5otZL|DuhF-xlud1wvtXFVD+pDe-Yx35Fpi3usQbsxqnc0vVKW6?G +z18s)Q=$leKZHCV1n^Qe)LK%H2)%(-6rlH=KjEvB_x;7-APMUhYW?rK2Q*B*OwJnpK +zYpCvpW9LV^FB4`W&FWi`tQdef*{2H`yy$dgaP=qc23Q97TV1#T!apl6bFczetf~*# +zAttjY0wIs@i5ueBa$LZDsmxDG6Y%$>E15^9m(L9T_(4n>9}PU}bdljr&NrJ%0N)!I +zisQBj%!0kR5}~~-y}7ReK9cI<{TVbEfyfugp(3{*Qpv5FQ)qJ~-&0q7ZoAcsRb-#{ +zP0XlF$FAc#Te9o7Zb@^?3A`uOE%Qn!|KEiACaqf)xMbbJYqK@=Z8$gJ!zGv=Ei6H)vY}2b; +z@VHI;P2hx77Z=eq;5Q#S01tC?e#naYzGCV7aAUwC=L5Vt<@HqZP4hLlI!#CRAS4Su +zhJvgrvX3O=E7Obr=Ju=Yx-+8#F7xNCE*sE6#sLEz%zeP%4~sur*E+DouNrG?$fht& +zNUn{#qaoXqjNP&OHrJA#iR|2xnv;$2W2Y;FJ3HKUAGpiv!tJI}ea}dmqYPNFs^Hix +zsjEZsRuVoN@@=jyl{C98>AMNI$LY%8M^-mq2Jcy2Sn7TCRVC96MR3=uf>M{RH(8U( +zw&bnk^+D%rQB<^}k|2ToT4KeoF068MSLg`;t(z7t6^8vb$Tn*@i5??Ald +zb1Xs=SGdvXO5k>@n=gSotS-#CNqsGnk(_;#Yja)}*Q(Y6Mz +znNrtmvB`qEmYfN2MXK0=)}|3?w<8h0pR!ARJ(A|08CbP$;l$$BZQZIs+@kAt}ez;&sz`yX1H&Jg%dtf~)4$oRbzL6@v!4M>>O +zu~w(`&=~^r5yJZ^BK(1M>;uA?M(DE1hB_1!wS#p+(IgIlfcwK|xfx03Lig>$m+ +zRbu9^+xxj1m7nRNyb|j*3~aO&n(yh-fcyIVPr+2%8?>QAj{VFj1Zaw(#+HnY8)B-u<^Zru8>!t%hv~8RBSAmptJNfQA +zbsF%SKdME2gSNg(9XxI83;y;N5n(cqliHsuy%)Hm_Xqz_nSN0JA^CsDRvcV>w<&un +zG^v!5mhj;jRnFKEcsBtrNO$r17>(14J?zgC8fQ|bhrR!g2;H(VJMw+ONy(?pZ#`zs +zi@Ubf-gBncv(-YjZyUC@2wU*+c9>hA&(>tPUTyzvlO5U4DLd2iPSz9V9b76C>9HN> +zN|0de=*DmVefnWfYB6qX@;QN*?GywX;SEe+Cc0UDO}8Rnyf{%+P&Ot#e=Yn|-o8~4 +z8!SXkcPoGWVAH7jV&j4hJSJXuEc<40v`L!m|4Nv>Z&k!LD;A>09s^WmGazY>CE!=2 +zx|Mu40kdMC%Z{&}_Saqv24qHlOODbXvjufsu_iEa$%j{(xUbqs!P4?gie?&$hn6b% +z2pJQXQMedz$Hu(Bz^~mmDVjasFSZk2Tt4}R7ne`IGUn~uL~dCkA6tiB!6q2_OPsz} +z>?pa3P2_R&7m~_Hr>EB^&6jqvN5a4KdGiSA`Hvgr(r*~$J$;Ag^-LYC*PDdBiA`j# +zeYYE!6fIDnD!#G#RySpfZEQZ*O{VOoi#fir`4Ml*7Tef-uD|g9R>{k)1z-H~c_RnS +zt>intRq|o8VfM6}A3mGE9DX<4GkyE_n=K!P_&k35{qo*)6y7iIP4kV6?hjhh%|i!U +zw;%c@N5l{DkdORQD9k84C;2uvpt<>h7hav4GfnX27!F2o_R1ct +zd|<=SF}QSZNTTl<3?HFH&UQEUJ=2v;>27v=Wrhg2D^+}muxfFReob&U$s|1x!0Xm6 +z7+Fl3W%8`~97EeIsY> +znYXA;R2?o;V2&7TKP?i+#SnLh7*&@e2Ih#d_K7>?g^MA+BVttd95FCQjI~ePD=%CO +zaYe+a1{^UkM~t;k+%GR&3~{H3QH?rcV2&7TpLj%GxESIt5u=)P#K0Ue);{rsyl^qZ +z-6BRc>xh9lVyu1Q8F}IIT=KPTjw^Iaju{AZ-rT2Nlp8+Ab_Z&7YmOS2qqgQg^{U+P +zG1R+IquX-SzPsPP@fqO8hJFNdQcRMU!v|izT_iy4qm-vII^WxG-!!VR>q)kgYwvE1 +zT{$sN7X3JW+t^Jf(>LO4Nj`i%pSj}y#qd!^B?%j;-rnP?1nT-^1BdXZ_xY3n; +zzVvsqp)S1Y;uGgdee!G;A#g^jM)S?7&(vuxSZ(^FFj|Yw9k^-@#}}Wg+g5A#33ql0 +z(Wq9Fq=^n}wT7uXtsSdPqx%I;C?pkJTgvIztskVSUVQTj`3(8KBAz+%nad;~)aI|7Y-${Q=E&78>*A3J +z)58S3FWtr0S!uMrkd3i<=(U~DC`%bT$i{y>bC{5P+FS#EBl%RF_Pf%XkFRzF51h&$ +zfEjhoNv3S$=E**7*gj(Px3@J8i;dx56d4r(gl5ST{*etId?qudu4!vh!)w>6{G@MS +zvLJ6vO*)Ml)RLr8`NUOuQH(L!km{l2)5&j{p?I-Q+XZ;*R3>NEble!fSf`y72R_!) +zcw*OK71%5`^EKGXI*kq~&Eg!;r1-U9!n#O*jHm<{iB#qNJ5>UBM@%Y;-6a_r$6j?2 +z@Z#M5sqh@TDmw+;pUSqx^lzdzmD`)jKUqiB +zqOOl6xBKnxB^!SUJrNx~k?q}&_>_tG=fh|}mXBuo{YV>%v@MxFegHqRI`b#tgb%Fl +z)jIgt>RzjZ&#bPq4yKyeH;Tyv8}kN$@F2yA1kEy^{;2uIAZ?N~`k7Qun?#L%Hr3N6 +zS)-pz^|VRC=oeDGKWI!3Q~U9Yv444c_V2ytzD!RiWNnvc!n5{6v}(0bFHe8>Vsrwc +zAImba{XX5G${mtSuSCEjPFDiYTHSmJJZE*`<^GiVW+WpgkzL(8Ka#w-loCF4x)ONw +zRlXZFUjmO=U6=y=`{FVw09)kNn0(``p-v03_!5Bb^YS&{8U$7>UHXkTT0_ndn2!*C +z<84J_wQ0w!?~&lKQ#}?ewPl-PWEWeL3Eq*fI%7htXOpjQ{Jrh;S1WZ?c$=>OSzZ1r +z+E*ZQiUh)h3JlxXbQTB|-lpr%)a3_CRBYK69ejBk6UN1`Z7Xe5c$=<2DyXPk0XijP +zpP_^H41Q>J;qglz_hr+VJeT~Yd3k+S@syD~pNaJn*h&FbdM;B~7DYlnYI +zHm3H&r|Ps8r8Tt!m!-O>oyMxO^9v>Twl%2&PpzsCcy3iyVDoEyYSRa7v8pO?$f|n{e$yMNhRPl2P5gywJHDKN`JXPShZyo!9=egAS>a?CXLts8a_{rXp93Y6CW_%NK +zu#{rIRz41>g6Z&03{^{vifmdnthbY<@LN~DQBhvZ5oD2T6yKyMuZr^NbSnVJFvlLT +z(>Ex$bQ=K=Ib9jN_ZhbP`7(Il>cVXV{&klYa965qVbVHqhCuk^E0_oq*0BbJGj*)h +zX&pL4U_L^))QPa7I?Yyia=T7zRa&#}y;G;LBW2`E;QI=Xzga-j!GZ4^nOWbu-4mV# +zPDOTZYpMbtOBI`S+{mGb{>;lY_GjjO8^iT5mTHrRq-2Mt3T%-omMU(!RHO7|aa1gQ +zu-{{nquPvR+AfNFlI9WE;V)#%-rvMAg);UvE8nJQu)7uRzOA4J?3XI`A`RR~p@^Pp +z#>G`iZXc_v#m25zelGmW6?njWEBU!#q53u^dTV23p^hl(gewj>eMND&kwOtYTyu`z +zpDIjpRBf?LNe8>wn)hu?TG2(hq;%kl?C-uw5fv0`qBM5Xjpjqj4YhYXyD`sufO!!8kG@j#x7|xe`Mtbc2U08kZ&kC +z3%`UAv5WGNSEqPQeix(Ct@ePY_w&9V+Le-0m`}tmx^~9ISAEIuBfy@QGnIMi)_5>} +z_zhV<^Frgy9=~jN@C(3kT!GCKiBg>gu916>DcLVbMm}?yQP-MeQ!>75{t(q`;c8lz +z#kwVX0DLG_?5*qc?O3Y(iIOu?bzh +z#U?C{32PGE5@K>F6LV;oZ>WbC;ZV#JQ(=;$+Kf>_u~2`s>d-Z +zC>|D5VUnY2Y>12%6g$OKnB=IsVpLG<7gJ%9qw0-OL4jT5agA?c7QI#Fd;arrieE4s4IZ@}f-7_R8jN>tlbdHFVmE4sFtZ@}f-7_R8zYP|uMZ)3Qk +ztE>G6T)vIriY~9p4Y+(8!xdd$oRQ|*IX~8byHdr^a|23ZNYb3rfFn}fGGFuY|4pcG +z%DDljuW(yX-;#3!E??ocuD*xP4Y+xQ+phZdoEvce3b$kRojNz**%fYy#<|H(K_9SL +zs@O=jsjuC+0Xwd6>r!8ja|8BX;nuIdY3Bx9yuxicYET4!I+7nY4gQ +zax-^^K$zn9w|9Ori(QdS&m7<$>CDHQ{o)<4X;tcA0z@uXVIQ(gRhXPta0x_xORr?P +znS0n*>om5cG{1laZd*I^UThkaANi&1h_acsSrw+hP~?YYu-NTTGjd-UMbE>5P54QU +z&tn$oYU~>6TwG7wN&qG{h47{nH_|Mke;lM5e(Dg~gyr})Cf;$ZoRV^Gl{5<**mgxZ +zxaG=;(zl2MyV&f6HeorwjVY%+c2#yq@j6{Oz^*IG!HqPF=qooUC$tI6@oh}JkyttR +zym*o4ioQt^)wrlQs3VuYbAd_lX#GGYn>rv(v?R8yPCYxbpOl01OT;J~D&NRNY>GuJ +zDWg`mRRG(hO5bAc|HCa;P?Ww!967sa;p|>);EYDZpfITv0Xl6 +zz9{_K3+5X$e)<@~c`NC@*2awBW^A#|dL>3qF1|?-)uKmbrayd=;~N>Wtyo@b9$94N +z`X)tGTcYZ<=hRn&;RdMxt;;90~R9hF@CiIKn5-n{(YcigWW +zR9%Z?J{&sAjrx1}Q)$(v*bnTN$`pUtkp1S_b58KSZ@nJ?DaIs-cO9KyVEfetTK}Q~ +zFZp{pQq7=Eu^%|(3Op((5bpu&{QyWYra-(43oKt#Cksf<_g5Su)yT%0oK3MG +zxZnz$D<}}}S?m1(m@5$P!UE5)F3|cH6?nNHBWmn)rL4kNLTJHzIT!DBO +z7I=1bf!4pMz)SvKfmE|xdImp3dDQGdOrZ>3dFmxz|*S>wEjf}Uh?+}q?(5| +z#eU$nD{!TtK)lzj_XA+AK)eeJJi59->t9shC4a9#rip59Cto{AXmG_4c~233)MHL} +z)3@~o6m&bTY+$ZzYmUx8{ZC(Aw)HP6`;xy`_LfrHwJG)kA4z4dZwTQzCwNnpdDso4 +znEZI4`@ge5s@Zo10uNk)3z{;&K)m;?_X8lsm;&)GT)5*`&!F`$n!!u{UXE0A>{0~g +zQrvFTnndT%!S??dp1@1?R^b7V3{BOR5*oLZJXAa$BVPjvBGI6b)t!9ygnV!R?hS7U6rVY`t@@IaQ)>(HR5U-tyxkFDIRfFr{Pi1*EBwq#Qxx!o6 +zkgE@_PMg=8z&uxYvkKS5=d&czk14=wR(H1!X57rko&NHoJdV6-LPLtt(+Pv(zZ2njo?c}Gk)YJD? +zqR8d%T7!1ZsJ1?L5l`EeUKqob}En84(g5_z)BrVRW$stf~*VVO7JxKennq;E`1g1OL>j`hZm}1@oCV@PSqJ +z0V{UC!@rQAVc3u~^9^J;&0%yDTlq)+kS3!d8MkCr;J2hQuRJ-(enpt`URNiP&6~XK +zLlJaama_(2)@sX}qvKflM0V`Fy#4*p{H6AnEi2s|I-kf6CEtv0R@C!4vI4tYF)6Gl +zvrfs_$A#*;FZpaTQ`R{i)tK`JQeMs)6(zM?su)gssi@^r!C28ty`Q*TuQl_^9aN(1 +znXyA18!9nF0>mv>loucwQG`i5BsJi)R84jOi=2t~{z8x5pg7;=BguEO1y?j;Qy!@~ +z?EI{KlWRF2igQ~svgjVEYu}jw52d=kaS>f;>xlsUuxjdpuE&Ni3638-fDezLd?+RL}#Pc0oP!k@ate3oN%aaGoo-tm~< +zk+#>-kVo2ME_+Rn&+$YYJvNhH@lDF=YPTj;V6RlMV}3||qt>ktICg~_eUsL$2Ar~P +z;|Z6^o6Zcll{52e8Pk>Uq~udc&tGp3e+cHAMgCIAgvS)w6GD?wKc8u_tVqT#lYASq +zwG74fyd`neB_kPOLbxKTRZ;vXkLh*Ac<9mvZb=n8yW{qwOl?!~|H!50PuzjJj+_bb +zRI1oPajd>`YjZa^B(XV>&9lkxaLtGc_sA5Vc@ZL)k)cWOewAk39)8^3CI%)g>SC`k +z_k{bgd%}Hx=#n|Tb!AKPDf5$uFTPNxxg&MtJ8nzrTD6|z$?GrFX>ME3AlnsntxJB` +zyl3A$J@{Jkb1!tYhkxi~TxR5A4wUF?3P>nt7yaq|a>y6`;X6Z<So!Oo9 +z)5%2AWL_UYyG8oQ0@;)6q2x1W^t)d%qv+4mnGBl6^^6&^zYsG#lHsXk{95wddmnkB +zj-t_K6Wr2JC<&W^j{e@5tgo{pmz-Vn2gVe4o!uR!UXe_n!h*Y`OP_`$G&+AFn~{q@ +zZ$+a^%GfhpBHXuwR0Z}+l|8Vf^%Z9bgg^ddcSH_lWnmuU`g6S^lf9qkeNJxz53Q;S +zbVP6ZM7u$(;GE~1m^U}?{d{&?5v)OMNyhw97$C`*B@TQac|C7#9J6ODO%tEKJ@|`R +z{P2ax6MsG%5U5SEJ+rqjst%Hk*e>1F_WkBF{+BrLe?8sDf?Q^l_oLS{JCk=|F23ze +zb2%6H!p~eE!?(R@jHRxO`=R7Z=G)f)N%GQfByD$J`B*lA)5-JtLnQjkY1nSb=jG%# +zlJeJ*myBPr6UGN}x|7`A(c~>QUh9q5nY_PXo>1rf+f4MStD@sq{fk+-e=)h;{oC0x +zTWq}hN}kHRxBE&eD43OB@Te-5_a#G>XD%Kb|0wro!-DWfWm$N#_C31qnWcTMX)AUn3@S$|+PA>S7p3Ka=_G#r8vc368 +z=OKc`ey-Fh_d!W>HF5DG41Ak(21M_#>xlnx`r^lk|ApT7r%G}(ar$F_Ky_6EwjpUM +z2kuB^D&JM*eiTgFU6o0L$?}fcjH`)$p(p!XRu_7o_ducZytfK?Q+c|W9`CO3CeSxCW8qijo1~vicfF_&?T$o$DjD&o +z>#;Kd=C;74f{ox@Uex;GdFON@%bW^7hLftci|x?@yOEEZE?lB4R0Q9-da*je9E6qFvu-#l;xcxfF}t$*v5Up@ZHi*T(QSt!I34&VMO6Kw7?q4Y +z_V;ayxZs!*SJ6;RsUN#oOy8y`CLBxRjGWnglOie}U3KdcB7H;#?sd8{c+=|U%it}m +z3%?=>|2^55RDo5gvZrRW-f)IM_~Vb)hUD-qNmD`VtneS?bpEvitlQ2e0q;6p8GLGW +z^JVav)rFPA|0l9Bl>>2$7jz(p6Gz_aClAB9vq`{Dq%+S&_YxXY_p&=W^IUWv~0^Zvw!`lK35&JMVoxAUjguge^{ +zdrw9F6zAsq7^{fwQPDGBY@6&TjD+(!;%B`o>n4?!zhYgJ4w`)54R|U%#EtOSKA-2n +z%O`zYfqz+x)x55#-VaF>eM7Vc8MZ8{NC$yB%? +zy!ghhC4CRJU&=$zt}*%0AN_CFS{b(17~8Bi^SRtf1H2&J#VLoz(O=8<&WlqHjbkZe +zr<@-3-Lp28I(S4n^8&3Y!9}O?D<{`6nV6b-e&HiY-FHR5EW0&F3EYzEc4A)VMdOjP +z^Fwc_Yg6*6mFZ0u-HNpGHQEepD!!FR^jH2&+7<}?L#qZE8t +zcqZ#RHdYPznoVoMd@cEfI_)m$o6Q%lW-gAYwAUX4h|d)u{f2@0RRqlr8?O%tzbuOg +zOY%(3UVWinRx|Hy)V}ww(%6$s&jsK%o69h4Oo17CX2A_&F!WcEcUtlhAOm=@ocu&d +z3M2FN>y_!ni@yhks#lbztFA7e#a}OGk+;V#AUG7yZI)GF*T0j$obv|-c0%Lfn|5E@PH1dO +z8Qa&0FeJA0>Qiu4Zf08p!W6$khHKJt)qoI~bqmaMg+CL+vHZoXpvZId&?LC>n^q<* +zmgP+##J9}m=Koul+omm~3dGIaHuzqxe?3dJBAKosaJO`3c*g|ioC>%gRVk^wI`hbU +zE3>KNa~%!I^B=F%v*?_FONCDKEITLQQK1t(mHQ0*17N3B^#i-D>H+Y+RrT))w)_pa +zYQRpb>bozvW>q!dx>fbH{LPG`P4Z*r+;#8MFaL{YzJJ&Jxu5Uf{nYo9I(_Z3G1p|k +zo-5qwyKmiUbAlU^EhgG?)3>~M^lnIVrRQ1^DJaFv5!>j!0JjvQ3c`_Iq1)-S*l4bld)w0>k=083U?18zw5 +zW67^wIwsKXS(hrXMFV6$xI9T{bVzxzB!AgkG;~(%(AI#RSNYM|E2E2*HR>-(dhc8I +zDzJK`BfU)XMeeV9xzjmn+1~_?OZAD1rQGCu`YX9tlXl?d69|)8V0V1C4w+XZf85;p +z>3d4Ad0$h)q+h0=HT%OaWc7SAx!CIp9C5g>+3s+T?2-kZcr3~@7jp8-kT{%#j$gad +z5eFtF7xC*?I^w`!f9_)1G(K0m`g5|Q0ba33M;{P&b998?Q)Zkoio7diLe#U8k*iL; +zmj*b(hZl6w#Z^+|x+nA+3B7_{aZ+o1)W&)fNcePD44HykvuQES*#oHxgvo4_AyII_ +zwDYB`>^;ebNKj( +zj(QgD-A@g;WbdQCRROO!Ga!eqiEt~p-zOqf#{N1jeS3e4br@U*g(krPzoJF7U|HS- +zLYyA({=YT3J(M)t77(|{Wze3iPb8l*=eEul>ok*pmr82D{a?;hvZQ$=wYf$DHhv|u +zGz;Rmfks(MV+U-P>f=e%bY&*}OHP$9T--fc3`g5aiPY*(Xi+q(4wOaER*9&@Abo@~rLA+YJ+&)m#m&;)Li&X^4dPFqzKxM)=m +zfU8oaIsBY=I-qaey48RiSGdu4l(X^AH1wS~YT(%wZuBK~bEpDarFz~J^7^O0o!oup +zrHi|4U0BuW@0DFzu%8uu_hb{jAg8nHasc*UVm~(6Q-45lJ*acYy;ubyi(K&0+IKf#VGzrcM +z2O6Jg%km}=;@DZCaVR@fN|NTR0K_eFR#=zyrt><6=s#dT=qm}fNS2aUE7{Ypik^Pa +zQ*lnf&O#@8x||cRyU>ZA9_Iw?Ep(#io^t};FLa`(>YRZ6g--MgIw#;tp%Xo;)~VY2 +zA7-OJAZc!2fa6y6%fLmes-6jU4KsaJV7FACF`s{A-*Wx7$%crzu%QU +zrNeMQ4u3BBTFYYN_wW9l?56KZUwj7T`xn#SY7Tw+_H6C;#c}r1%QvQiV(6xMV>nS5 +z`_4_vfMQxy=5PYe+%z2wSL9%ZvH7O)@mVb_<;GM{tlczk3^xm7x8Jmkv5{;Q&PbYJ +z1kOs;Xx?YpQ>V2kt@&2>+5hrR{jr+tfbpli^s>?EfoJeE*x%?md}i$7Qv=RPWj6Zd +z+ccJ)oliBOU31?a!e0Vz+1i6okH+NHtdTaqrvg^B{eR57N~Q6+q-my)AzO`yzFX35TSH<(mH~FDu{t&MFr9E#B@@!YQbf^dSR-D_&D)NMR +z@U3jcj7gdm100ts_S^i?yV+OgXC%$nVygEu)nen%yi!NMsD4B17oVuBMKb+#2;6RU +zckAFzt9!K$?zOtt>fmFm>kI~DUBAPBXn(3-1MW&?{)rDUi?NHwx$%{WYN26a#^UM-BVC}y3PMyY}vjdLi?WWY2mb{hxOdY)7 +ze1VI3Um8o!4!D}P^T(TkdtwKvQXhRa8=NW0^pFM5S>4?_c-iV+t%KLC?zKAD4RCnK +z62Bxrvy%YtNEJO8=WTf9o0Pi?m +z34CI8^Cj@9)rAXmM!Wcu-OVd?@T%3_t%KLBF8tC4Tnn=KSaN&xL3W+F$QzdFTa=C2 +zgn)#NxzV@msKEBAe>lmNZXEfVi0f +z@G}U#YIyC4C{_r4jyX7~vJxKWRs=ZdWNUl31YWVa`4V{5>cZ7T-&)QFyzX=*@SfF~ +zzk(#ZZ*?I*rR~`VZ|OP7AXr-4TMSF`IE^S#CG1{xhw#=hUPHJUl>NT##z&(FCc +zHNTzNnjhBzTck2CVr{6?C_6i!s$E@O)}#uoTB^vU!+<&mogZ-gD!(yx&PbY91D@Qj +z(^|A_ZvmGq+i$&7r?KqpfNOa>8mG=~R^!R|MxK5=l=Y6}C(@S^OzJ3q$?hO@KgyeN +zR68?&r1xY_A{QHR#bdv0Eqmq>#%`J1lT4415#h<44m@LZck5shj{S>_WZ$7DdJ1xu0cp}g7kOL0QxQV9CL71 +zSd{ygWMk6v^Wp0aeJeA((Qm4+d2GgRCiWfl1KAx(npp<^nN+cxE!+;RTNQ{~^n!0t +zoBpU|sSNk9m8*h +z;<#cR`+#}J@Gk}6xL_S00P~Iyf^*|T)xRxiW^ +zntnBNC`p>N(IbGh{||7CD2 +zgjTUx^R0?ztwV*7So$=;&&#(lT+yS{w~PJIxig3tzK4^UtI9T=LGYl{mB4dWH(vrT +zSY5cY!apV(Gq1pDsj|gOYsMJ@;g7F!e*|M|(CA8`-F!qBR^a=Y3Vc;Ov4|m+EapZG +zyySFcaQ}Z~&tqlqfYpV$?up~X4I;2Ax5%U96*1D8`2of8TzG?$}_St(+F&{s$n2Z@g)G) +ziApdh5MbUhyga~>$mT*6ShY!v0N=2xDvcT|}|BP(RN&zlOl`RWe>&_6kVO2FCA>&Kxp&YiY;{)K1R6k*E&&}T;%RXp& +z`RP~NZ}01Mh~_5z#X4rhshE$st@*3%Ur%0o*?eaDqE&?q{`A1~NC~6^4c>RUGWg!# +zcH0{GzSV^T4gZm?xe7d%DjO_XO(HWh0xVlq4cKEgff3uD^>gRLJY>>#>3$gwWwg?MNT4^l-<|>omX%H +z=Lbqxj{nc-%AsyPq6>X}KQjWpDn8XWHuUKt_Xv@1zTeC$O)XqGVZ@-O2)*xBFw&LK +zZa$*>|3_Nmbc2yL*DbsLs3vCkgV)WlVN`VprBehRbh-+7)9U6c;4P~QrwIPvlZ{#9 +zK-}U71CEo{u?B>|e8nEPX06@?=IO%)4LtAbO_Pj};`8!`Og^Y_3{!*3T%Kq<8Qp*>HI{9g439P588lM?wU`OWsC8y_qYL-Rvk +ze`exGq;D1ZvO($?evle5Y)Ibl>Egb=mHFmtu*cj=el5^N{DK7-8H|WqaMu|rC*oH2 +zb&)mdn>?LNM*nP&Zx^G|1zcn9LJr&{ow={xOK6OI-F_ahm(UoMGIj`av9n+!RO&~< +zXOfYlW=>ssH*lxInQxr|yKGwKTW2)-ot-}vt?I%*velIXli(Dzq$HOmpEeJKXOoxe +zw7+NTs{tQNWd?P&p;sZkXcG-CDj3=^nWRGuo^-l0xcwVkkfP~C^{m~DD)?z_xHt3!WS_7Wtva8i;HQ7{ZzzMm5MCsQ5gx=MJcvYi5Q`9QlwpMaScLvag#K8B{@_|8jPRvcgfB%R +zd?^;;OE-w{Wj}&>yvrhl)0~8WWjpi3K;|W~y@Un5;fG6??i-PU-XJ3MnW4YNceFlP +znNKJGpt0e-@Qjwt( +zPHw*fcRF1OJY;qACGd#Vg?n9>`tC`ZbulP7>{NdFFpkP3-GRYlPFDdhPS_o|0$#GZ +zFe~`yTnfMyt9ldokF2T+oD;b@9RmNpRaJqc5Z{qWV%E~vfJ8Q*MFH2H6>z~u903y9 +zywzm1P9vX2xTZHmOdXN$NN>vI+~&{+d}39@zzLgHaPl5i7qJ?XZ%^N<(<0yW*Pyq8 +z?4L=@De+~~;V+gMkMswblU8wc*cu)Hd!%|c{pECP)3$kCNv~8S9=Y6P=(g=R1%tx$ +zEQ>8&?BErrD}fKJZoULQw7PJy!~ak=<`4w#N|h~8T98Hd@Krf%Sgu;=6Pznb>Yy!-zFQA0`Rj|RRh9kCa43PV-N26 +zIz;iBr3#+F;NB&Zbne03PFDsu{aSABg`2G|ED-)*awz~Co6)rFmZ6x~-DqbX!W@VKY37&JhGI+=8=F8w+s|$;S|953$iUi^oFEVtj;Yi$c%LYScbitOr +zsMu>Rhb=+eBFBNh7o{WP|1-LBsQVE=%J&0Co<_y<3iA)Cf@{2VcEZOLp<}SCMTV5o +zex%V)hZMZ$bQSQ>uiF!21w3MPVL9-B&rLKCxAI7_i7zXgxG~9Bf4w--c7)dq`O#XG*13bZlTdQl`^)_i14Rk +zGjj(#mRm#eHV~%xLJPTSa2;8$w}5%Ba4(;d!-{pR0@tkSP2jp!Re^*thY65~k@b0^ +z@=x6`01qv9_|g8$U1{B=d9XCh8#4t(x(74XL2b?0XA +zrqzY}CH#qO(h(6{w5nksOz~NV>t*X$1LhsWDejR&uXPMY4}vY3q~ieImd>pIqlCtt +z-?Z!hD4|i2GPeGS@Go2vz;?Nrmk0o1ijPFdRfDU|at#CXT;bq^TzznrE!SJXJXd%v +z6LLL(i^9w?4$O0fA6UV)KE;Zw)WKWQH6&jJw%VZ&?~qS5fXGU~j1lS6eeHs+f2dXr!rn5IrU!tW;FE~l%2 +zpIF^|1)TgROk%i2z~3W3vqb=Liys9z{$1->18z%Y4%yv=#=ev(Tdhuu6faC^5ZD~Z +z!FM!fM6+na2D{0+x`=E_BHW)Adr@_7u?ewfWpeS5?mhGGg*vJ$(xR%y+-!hboUR1! +zu)6S$fWAA{=G_F`<#Z+Rl+~HXB*N2H7p@BU2V`T05I81Pwkl}-ZD$CaxMWCc(is9t +zB)-l_rQbT%fCSH$6fNSLTXZ17GecU$H-^A`D&b~L@2pZuPc+~;rz?TCt!};q-m$uH +z)Zt&1jTv>|rc~J&(fUJY2!uaAnDp-EvH(AFx-z);9d?fSGWed=g%uo%qenKeJuff` +z-e-LxlT%4E4*t$Lr~pH`WWXa%R{(Pvpgbal!!-Iu^!PFDtRTHSmZ +zylr*i!2tg+%EnX!+_0))AWZT39FxP8b*wE4K6EO-!d`XZZ88A(0p69) +z>^)}*jr;#;b}*VJSZ4{1s+6g>|Bnd&!X*Lhk(;@(0>Ttu8zEN>u5Qcq7BJ5ho~wKR +zURKDGq&X7-SFEZJxN23yz%{8Z{%|ghKe2Xw`-1<ZvQJIPDv-f?|q +z3(WfbgrIf_y&WbLlo5IjhhD+0)rj(Ov2NnUxNO7ka&o7po*PJ$P-{ +zSbadkUz~uUatQ<{V4`qnm}jiOtB(>K-731_q1vqDv22gazKS3bBj0w!t0dF(It1Jz +zop~`{LmjTpywYDz1R9r-S7`sMX!A +zgUKj8Ie-bC`htlbd#4o{t+`}@4=*K4YttD5w=Nmd+IEJ(olAy(`J}QWtF#30iq+k% +zgUKi@A58Gn7fke6`DC)3xXkJTPRPwXwgSQw +zKe2^eHMk}%*9b7r6`t6-yMe6{`EY!(KvT@!R&!$tcxWl8oIs5n;up2Aq+b +z8CW1pS7*CrxoW^M%k?HO&lN5Q^4hjseZT{&`YP~yR@Dbwuo1rs%ts7AxH=NYvE>T3 +z*hmJavYvL~{Dm5Ny@?lNVb0+|h|(brhb811h6~5Y85ENaB^kSt!RGU}kl>6qsxBhk +zN?s4XIth&nW!_fo`939Wt<*d;1#EPiERRViaDl?Zj4 +zL>0JhRl~rCQe_iDYu6b92^pU`g3egS8gN;;nv*Fo&lO&9z(v;Pc^Yuha=i`AbA?w} +zE6Rs*&FZAaM>f^!jA-X9eQ-8tR#%HN0hX=mO<=oKRe_E>_^Jy-d}1>iej@0+g0oz= +zV*GU%%RdBq0+ZkgYE>o!#Vm~QnoQC~2VR%XEZKzy8k4_mm+V3VjVUQ(OO^vSdXrq#`tz*|-qo}1^?w<4LYenH&Qv#|G%uI(H%c*p5V;1jDef7MR-)at^l;NO*v +zNddSgRW@U^{=^vq;g3&k7@-!6P^*U#YOx669<{HOzUNZ&Mlm79Gnu3dAAIg~74X{c +z*bA=;c-`v4VT3=CO*)f;t5!7(geg8?jdCbi$7-u!*{LdmT~4(uxZ+g)ICQFO(V7HX +z*{Hgvtx2#b$$vv8>1cuB`_^tD7%_PpvNG-&fy} +zWaPNR{VYcVK6knbcxuiq81S^!g(<*)TQ(*I;G|Uz17V6Un2@UmSKcu^a2ge<)kds# +z3l2KfxZs3S`OB&rcm>PKH%UtgGa}zv7Yn#+RW;zgRPkY<_dr(ZDg_@qT?zbf-cDf& +zylHjsCg4-6n=gUStS+2t@;I>tRDr)FH}lmC;C-pGnrMB|83G3`8PfWSGXxG@GNd)^ +z41pt;3~9aX41uGU3~BwUGX#!bGNko;&JehA$&l9XJ44{wB|}>O&=~?ZE*aAL$IcMQ +zv}OZN>kpkFaQhM?tv_~#z}-uRwEmeh1Rh;7q;>2JfoGQt{iBZsc4`+`4all8+Y68- +z^;~)Y>eub)SX;(CTu{}oD2pMLdu(?V?~*Oz|jahI@Xmj2ePR0?C4ls +z#(YJrzwh!}6J*60t8kfA!v#^@mLv0R9GT=tj{ZoHIW$&96L)4Ot`Ep;nY(TvlayB4 +zS2%ICaN=sQiGv}WxLR!DFb^lL7MnQC!-=cKCJys(;%ec<)xwFZg%ei`C$1JwT#bp_ +zvlCYfCoXvY!x49GC+-1|*)liE!2HBLD4e*yaN_!669+>$aec9g!#te0zSzWJ9!^|e +zY~nBvC$2A?xV~`W`of9p3n#8GoVY$Fj=j{3cQ|pu9X1npWGAj4c%~JQo(IA=+u?X< +z9lr$3JBBZ;!|}0o{4y}__~qb}6dYMa=AEWM7F3$*8+BT4^L_)!lFAHev8oIskj0c4 +z(qcUsLm1TsK$ck+n$|yb +zhQN(WjI_8gFgXHQk{KhdKXi=1?MsZb{@57;cP|;za*O#5;L#;RTE~tNcy`IqKh@BC +zF01rn82s4jO5mpd%v}tFo2@Rq$bBM?L^io!C87F|x*{h+m`k|`;1=mFo@&up`p>iU +z%r}G=8fYv_nbzk2BSM!;0yrl(^HCuXrgXl;H)>CbW6^Q>;g;34E17=z=aKNn0z+G= +z?+6nxwez|BaH$QU;WrQ3px?7u4FmVB>Z`zmce5lSpB9Jl?%H_NWxh?lCH;Tklta6kvt`xbCbT2IYN~@)qoZ34W1zRaTpJ7DmWw +z*~S}L6LcvAAIOH&8T{BFjQ^^gJ2&KS5uduv#{s}4<#9Vn|BQVw2yZb6vvv@IpTr)k +zPzE~k$vq}NZ3mzah}Xqeru^lD-?a4`20FiQy%QWm71?)6nm31-mpjn}dn*1`Q&XWnrk%p$&>Jo{d7bYCd_lJ*thP%=Hd!98L%OB6^T^WCO*Y}9dQ=hOS` +z*yd<-rO+U3prOwC1#;uL{)|l{w)0M$fzw7b>Pg`Ah%7XtLahU-FPRh-!3m{DK!JZb!n&a9O+;^%I +zLAWAQ)T_v&HiO_AyIWnDK9hVsc`p5VvcFV5SO$1e_>ISa>dsYVdZ2;ZZ8^ccUZSp6 +zYZ7b{XJUjc&-}y=Zy&HpOcy__pwVXOg8^kaW@M5chTvJJD}$3ox6r_iRu?Wb_j99&)9fDD +zGCG|hki;`XS_94yNaC3xEpj(MYzC5XX6Uc!X)&)z-by;_;Df#X&+3?yDUJ>g9py;E{bH&yVo(^bHY|COz%;*SnoD>jKL5I1v{ +zD)RaR>s15pNOf_5&^VAXt*2I}b(A-yLDbCD4@_^9Ey-L22{$`k89Z%u^JVai)rFH; +zR$qstnanQ1VW;x5YE{>iH3>$HptCYb=L|e2of)#TgvQxYHfa|>B&KmLW$F!noHz6{ +zBkUj9%&NeSzn=wYNPYzfReafnTs63km4mrm0+L=fkFk6(hGn$uLnXSiWr +zU&fK4G!Kt}`Mkay$t(D6aY+9L^sL!*BWR#O0HZvJtYBm5S3aiEo3W!<1+H4v@P^>7 +zRaJreRuvqS+d3-t+|dDK8JnLskTU}vdD)gv^vU!c+!rr4daiQo)3+=7PW4N5pZ=4{ +zx8sI>&_Y9hyvXv2%1*ZmaPnVsA~0_N79O{{`7(II>cSneS$$>6$cmVjOBb8T(Y`w +z+!n;KCK<_nU0qG0F(+Q&N31FsCxW)*f`eO~t_)tby7@AA#p=Su%j)Zrj3nNzt|eBVGXyT3whp{D0_D0QSnwoQ8lf#a9Phoi<*j4*pq7 +zR_zw-aVr1#+)_4=TvooxzPd=wY&gJv5kGByVmM=7*yFn%%JtN;2ah-@bVyX`u!BdO +zt^#gecEb)XSzS2n@PEUN0T8$N7~^K{#Fj02r4IgmN46>m +zS>&+qkV%*G@@Jw)UF+85P2i?fMZ(oMW*~sLU7gyXC9l-M!_pbD5y4TX@>4ia=o6QMZ*r!tG0XBMa7wD8 +zfqpF4CfUWS@dHNI!^N9Ne7l>n1rIM%$MC6;Pakonj*u;QK-!pmGxO|t0jWI$OHw+61UKZw?JZ=6S@kC@x@$DjS$1z)6_<4Ki +z7kr!Hrh^~+LNDYF%8Sf(B=e9cNHYBcj(y+0!R8jZW5K+0cXA(CBRc +zNUhTB!;?ceUXj@j4z3^Oo_{m0o9;Q04L^8l8{P1Kq*iJ6;b|cp`^a_}JZg_@hvqLS +z_*`kk@Vn5yRdn4)7C>ZE2zI8Ma^1}FM{M79`oYR%T +zn^tFDbuGMQb>Y(z_?Km41|PU#Rl`7-(pcPvI)PMv_3kuf>j(fJCN*#P+Q|JRewyI(H%QmavpreLU>s1Aw +zNoB5gt92UZ&dy(kRBxM5XQ;DqvuT!Jo&h=A$0;lg+|;vL%*YHjr_bXn3|-i!-Q +zIMtTmwo{drV8td{8xPVl|eZ$<$ +z(%$kN{P_xlRSC9kImgrIg>~A*Odnqw{mTtD3!KO +z*IIKg>wx&s2t4m%uZrvcrtlV`m5~{r6lW +z1QQw3*JAXwdPraM>EjoGVT8U|ggzU=Wg8ssVG>n8iO8QtIcJ>gF!VPHHcQ@4Cd?nw +zQNtw=+?o@u$x>B;cwc;mM8i=9CwqShM>d@J{uw$3k +zj&-GH7&)klf?G5|>4h-3)#=LME~}d_gS)LRyw`%iT{dRafSpz~41_5@kQF`29L +zdU7d&?@4Fw3ic8jQ>*r_U@xIDEoJPkfC$?*`zmnn_c?5<$Aax*GO1Psf7YqG1&Mb> +zL60nV4eqifs)gLO9`*J*t9yb~tNIn7%OH51K*3|S;6C7lRlNmVv8q0x%it{_Va=}~ +zo9Z;iZCb%2R&p4%><@qhHV;{V1U8Qlfn%0?1W3v0S_`iO7ZnKt^FR-Hq^W2!-)?&L +z`=5UKvvp>qO;KD=MH+&-9yFx!Y??+!=O4Dq%7wt@e#MVyRD_zarM?X$#*Za;3DWf5 +z3+=&X;#X)s5(@*3hJi-?Kqd2ww1yjn+Er~AzulzKYZv?QsUSmZZitCrwS@-H8JgAA +zYEAlp5IvoI_u}#kHg{MCyYsPf?6heWnz$+YQaEy73S$N5_xpvaFaBEc;zaV|ML^uveO?qt +z>M*N~aXfJs|q}poB6N<2vhu=4%eRLssWF!Y6N)yf8Y#T +z10L9jBfxyb@RYUyoxWMYPN$j#V8?@Qrv7F=9mGN825k3zspR(H1!Ubi~) +zNA`p{jAI|8bjhY$(tQgSO^O(sfDo2L$@G*l#F9%lOSjmi%ndE|-LiejW0`g>yR +zkLO@dwVyGI@8xO!HGDJQ_`JEZ32tndurnLjyq{Y5-08~T@*iZ^8Ml)8GPvF9!lxYY +zKM|L?kq4IKX7*WNi&W+vGedP6ZO+c${fXR>%K&`G=_=p}tDCQYC#^2b9{yh0nCyXH +zw5l2qru1wYejW~2k8=b)dz&Y+~NcCT;a72TwRvy0dUl+hJksm +z@Yw)dL^kJ3Aj54guy+$0u$gP=;MEKCO(}`=dK*0JbY*b&np>IR9;*xIc10WyZIM;r +zuA?u38%1T70PuCkUg{DivdOjt&Sf#~uVB9&yQ@gKLc8#T$(XP27kQ8tU#>Sc^do#M +zxjm#Su&2#U=5ysg|6;J~M0UWNxcQ-;H7D-ohNLNpMF<|~zCUX}mN_;3rlWE@JqnWMgIxI44y$y|nh6ArSufI(Q_91IgSd9!Yf)cAZKE +zcVso)mq}GJGJ2!x8Y?#O(=#l7S`lK>de0J9fyw`rZ6oo~2&X()W;b(;9jpIVj`JH- +z6q!8V>)%2-v8uTCC3gMst*Wx8mcb{#dkFPsf7^l^eFeL?bzP0vw7 +zc5IzXX00Uoe~KiprdwG?$Tqc+6}5lRyy58)AF}@g^5Zurf8>(d$kh+X@7D{@ruh7& +zgTC!{=82qE8+oQSa;Y)1M-D!fwUL`@BU_%%`m_JtdO|;@e&kMpy`R6&_oHr;*Pil2 +zjz5z{M&4=4+Q^n?$?S3kXpz|6lRfgj+Snn{SJjVPDTvqdT;|y-*(P~M@^W@bG9vw` +zOPPOYjchX)y|I7Y()UO%OP&_k4@f^EIW9Rh=B6&ldEfUnuBDU()#b{OH>X`q6i&AK6)8 +zkG`sYFf) +z&_}blK0jF^$$LuqBWKh`o~n&p_;kk5^sy{Xza;wp&t(0`WwnvVY9kxVnLT+S(f1Ve +z`}Lj4?p*S*D!Nr +zXIyeZatC5I$O3-T$oXZg2Cwo0~1wo7(M`t_i%sJ}0HcOTyTO|E>*ZH-}uj>Q)cV6Q^ +zsQwYjG0AaBKVRQ&LUxk{_6yQ4N-jw*ORh++O8W7x^IMbOdVzoUC$jnJmAo%mmGtBJ +zcKxy&D6mIAsQw|z5y?@>F-bq(b$;XWn<(&~lYT*RQF2LgMRHZrkH0SchU7!ZP020E +zZAst%I=>zH?H2eqeKy-Knk7q;Es|}LWl2ANOGoD4D%mdCA?e$%OTQtxCAnQ-Kl8ba +ze^zo%azS!Ya!JyUcb(s|{8kG5(XXn1O>$jwL-L`dAOAYPP5EsV`0r`n_9YJ_4<(Nz +zk0t&1zFpJv+40yS>D!-*=Uno!EMEq#yVJ<0n8_Jh)o +zNRCO47uX+2e_ +z$(EnW^ge%!`dcO2B+HU_BrB4>f019i>=z~1KcN5WHU8w)CA%KU-hz1O@2kIGa-hH- +z{gC=cCC3Wv(NCyz(7bF=+fBc8Okj?9u +zceoEd()|gtU)THCRdhX%eo6hvBejuS_u|KOKXUSwY`&5GKdIwi*J)>-XHu8zu$PVp~NY3-fef5)9m-b`iq}s@HwUO0NX6HG0PQ{0Oto;)? +zq5Tngpf*0Wua8CPmn4@ZR}1XdrQeWzD7jr=uUSrtq@Pcb9r_>C +zo^d-~`;F7DaaG{roz9Je&85WT#}8q;G#9{h{QMDL<3t1aEp*C_wZDi}GGJ9l?+Q>n*k#lM@&SS5}M|7wy;~kM4l^m1w$7BB| +zGW$cxBgtb)-~O@mPw4-2=HDpUB-t!kl5COm`EKghTHueqP5oubcF7LOJCc6<>-;M6 +z>n!l!m;ONVQ1VFfSn@>DkAI!tsr=3g{L!DQ|FPr~>_4OVk@VwV=hq~^<^unc^evLD +zl5LV@$#zLUKKeWAuSj+l*x!@BD%meNAUP;GF6qa+&fmA67SF8Yg5+WWzi+oByOjd_ +znQ}HivyyX?3zCbHOOk$m*ZD2WZ>7M0{KYK(q~x^ZjHDkA{haz2B-h@j{bGSVJR9nN +zD7jf+kA7SIJCeHv_UQN2zb|=EV2}Pt{l}6g1@`FA)PFAdxWL}(U(#_Z*(B+YKl+mT +zTO?Zx?9rFi-!9ovV2{3{{!YoR0(hG1jS71LN{h;KKG7NKO{mqn}p) +zjO1*AJ^BUpFG?;I*rQ)j|ElC#fj#;S^*@x{EU-tvt^OU!-2!{`d+OhpJS?#9c{y8W +zy^{AN?@LxC`z8JLcb(sW{00mB(GRJAL~>MeOmbY(kAI!tg#0E8{LxRTe_C=za#nIq +z(vN?g--7%W3;fY9sef5=MRHYgP128lo!`3rHVXXFKUDvwNni;`6cbz$0dFLM(LX*npH75(d{F}2uE?{V1l3~D8UU1 +z2uGG=TcHLNM{$KmIGRKdmwGsor6Wtpk#soc$d*$VRAP$S8mcyOq9nF)!DUSGfT#8J +zdWt(&?YQ9HF~zqvttf`;p}sSw*E6_Gpzf{bGHZR``|h75Z7K9Vb8pY{*h~A}@3+47 +z{r~K5ue~}YJn>rGUjtbOxfZe>(#F43xCVr4ObJiC1@~JaH$%2TwnN(ZmkQT`aGfdP +ziSNMuosi`v_+7Z)4Qa#oq=Y9vi2DV|wD{(5|1#ti$g7YxKduA633&^0^?klxrSWfo +z_i{@3ASHYy@M_2!$h7$KxIYd#0XYq6?K=y67V;eAdB_Wp7a?uF-gzSOrha7~=L)!S43Rgh5a!UAPz)wP+hCGwPud4UuR1H}J +zxf-$-at)-lcd2l72)8yReC=C({A(cVAlE|HLpDI#_?HUTh;S__;U|I5K%Rg+33&?g +z45W>p;Sb{e6y!9d)n~(}g`+*Ep(ic=^4om=jYIB-oPaz4ISFawUn<-|gqunUKMVXE +zr0<1!?VHDqJq0emN9 +z4`e^&AY>lW#=lg!0>YJ3!k+?u8uA+C%ReUndJ6yC+kHNshr9rJ5%Ln`9HdR(QsFKm +z+?AB@SAkcq^LA82)%zYe@KejDz0K=wfPL)!F` +z*NOXGklm1Z$O5DdKk@$cR3~e%fN3!-XgCN{RdX>6aMcJ`lM=qr?4J{sA;%&2Lry{-gtYP7a1-Di +zfSiFmoD!b#*l>)O;f|$*zX*H|@-pO=6h855xPKk;MhgE}i_f3qkS8EdLY{^^3poo} +zewPn74mkm7^RIJ*=M^Bwd7Z+)u*vgpK)wt)^$w3){b_cbf4ApfdC1GUEw3zm3&OQR +zZieiHTq^#w@a-w#&mkYqLtccOOUa)!-sKcN@vFFh4f1*lKP}xmVL$V;DkVR8|0?qR +z8srT~n}4UF_Z%ek)~4uR+vdx$0dg~B8>H3W2)q@tA965-Pdy#D-wD~3!Y951_jf|} +zr0^MU0r$(0<0*XN6S#i>ax#Tad3- +zK7~*GBJN*;oJ-*ozk>T$A+M$ITORiHrxkKDQ0eJ?p67eq;Uz(lAVduQ~p!WpiS;$#P%O`#g_s>IKfSiN840#3eD&%?O +zTV0AhCy4)p`l@-Jrn{Y#K@kT)SMpLVt)e#$c``tt)`e;IN=>bff2!H*KLdFdau)I&@@NKuG!CC +zMf;#+y`^M5VYm|rPk8~?^%j;)ikHrY{)x +zAu1uOAy-4zLau?d;i>mr%6;P3pZ4)kp80uNn$$?V@fZAk%HYEb^QV5%d%)|TgS-wo@v(*Nxdi+Q)u{kO=;6lUgd9i24x=CmVXxb>SsN_7P1b~@~LM6_bDr<7q*D_ +z72KyBKjit8mCvPw2Y$fFn=_tIS$<*R@WjV)pK=1%lr=B<@RY}JO}XUiI79<(O&*DB=l*IWVPD*}C +zkvz(zc5$EeX@7?w&9nC>aQ^`0B;*t%KYcfYYkn23>-fSk{>)m$a-VuAt$v2P +zg7B0rzrAq!sfW_)W4KO)r|icyWggemLuvJqHvvB746bdt5I>Fklvi*~c@x)^Yd-Ha +zQ8wb5c2QdUZ2b0`db*&GvgZ}*C+`6Glry-t@!4zgPKEJhkQDz#tRV2R1Cr^awCUx_ +zXfE(EO)T@0e!Llua$fijAK!sTy*!0@2ba+vhV;^gC$9iLO0xYs%hU3I+-t_0Pl=!SB<@pA;d-h3{BiABiqCkbQ|z_j$vd24Z?z;q`=Dh(X8+yQ +zZwgi;LF|utP094~n)3f|oL@8g$J)d1G%!3Rzt_NPN`AM2*OdRW^MT)Yu<7M@9%u)p +zwWomqWIg1Tm32p|jxOJF#~ZgiTeQh78Z`S_&ELh|^X +zilun`ennxPzJk-&f_V8|ixc1_%5OT8*~S9F{RV{N_b<+c;b?E>{Va36MZ5WZjGf>| +z>FZCVkKfH$iU&18exAOOgg$;}W5+yRGG2avV<{fvC2wn3PP<&ZwtThRt8QZ`S?A-= +ze=0cZCGFvNJ~SQrYmt9yKfm{JOhNf=S=o4``sfPR&a0-EZ#`7`VW}x!58L}@;b=I1 +z7v!u9rQzC+)Er$Y;kG_oJ-y=j%9+fes^^wxIwka9e0|H@UqS=J^E)EfmI&V?fkj0a +z-j;*b!>Q#^B4SObkM*`AtT)Qz_eeDT`r8tgbGPGZekqUNDXDZUU*F^L)B%seZ%c&l +ze6{c2Y-tAc>vAz}Gxx)ta5NNSV%v>ZZvl*jLs&>l^v;{0BT +z#rfS5;#zLX=l4q{!uZ^{Aok0+FrCS-V87CSyOx`?L8*+7-#dx77uCz}p434v`TYKg +zUhB`6e~VyKRYAb-phWf2)?-%{!-}l>G#r2Nd{vy^P3Z<9D(Ce6p!U^4!0)M0pT?s& +zzpJ9{GLh+cq$d=cU5Y!y|86v*OApn@09TEhpL}j +z@odfX%FHcqo71;Yew|q%?PZluXm^<2sfr{0M|Zgj+%x^bt%r6#_km1VtFiPvQ3+Um +zn%*icn%8(m4X~Fuzu&_4qv=pSzuz(oKE`FXpG>zz>|(`z%|8vt@4VE7;n=_Veuq4M +z|D|mn@395*MeV&P`uSa$dW2Jbiu3z0ok@M$?s%iu$MCovFue=qSF3>hzKe#_pXQt5 +z{Laf^hlcH7>m6^*wA=hpKEDIAa~|K1|Egbk{IRJM=XYXAA4OHEX9Kv;d;f|Lw)=n&l&`x}V;wo$+;y>bvn1LBQ|$ +zFdfACJs-|LZ1@HV-zbAUzw0w0*ZMQ_%reVP^(vp={fWn?IKTf>>9qKAR-E4fvN*p7 +zMBLh^@m-Yg{P9oCuQ;yh&>!-c@>cf&O68Ex`EL8OvTi$6`CKL+Pn}Jd=I8m>Ah3u! +z{E7M^`RM^or}Fq+rg*=tIKR(CoO=14rop6MnOFLCyrx6L^ZQN5Lmua^?K*coRF!F$ +zWQ5ap*RC`izw^|Ia9Zw)^LtO{=IL|mQk@e&UzzFpOC2oYMbC8d`%oPSPn_S0vN*pN +zRR_M7r`o|^8~#X?|NEozXMXX!Ql|cg?VkBXz2#6Z%YDnC$__1ho#{vUWy@XDGyB>g +z;CG!^Kh3=?2zuErcu-h5A=t$Lc5Tr=NQbufHfCx|}KG(f@rKkM)v%@ppQ4VL8x0ewV@N +zCx6i3^q1cToOaM}{(j(*z2gac=}(__L_8mm`sin$^FZ*VUU?q#mHzju!*Mybf0ViT +z=UnWOPyhV;!~Q7FKQ)g}|NZ@8x?=o+sGQs7zScYX_dgNp?>SO?^e(A)+n-%MednQ? +z=T<&nJ+tD4s?5O^-`M8b=~iw=w#)jsTJ*%{%bjvv_miUg0k06p@TESub}RkcHf^Wc +zb`$$5FZwRPH{0003iTm5L2J@Z8Be#Uo!efjR5R7w7ph)do|%ZNi*{-JKBn5oUmky; +zyu`k|D}Swr%A-I2Iq--xd>MZTPQUu&9u9H(*RMA?{p?Fr?x*cS +zSoK5@Pm%>1E#z8`G* +z2iGntGpEA}M?T*l#&KQA=Xk&VMSb=X=YlPk*$N?=ROmG{X5F^DW@r +zB2^FHXI?9N^7`Ada$?z$x}$e%0uI$acUQ-=Yo_1uLd}aSU#dR5qT~71Gj~=LD&n0@ +ztnbqBw1e+OUr7D +zqUUKxB#-Y~GoPdW$+ySNu#4|uPvIF~wBNjy>&NG-Do$s-MSQvyrI+t*SHT{pm+x=0 +zAA?@W-i}D`%<>m1Gc#dgzY(i2)uPY#n^X5l`M<|kP%TIOxpWB5_pK+;=SR=!I{f-d +z*FzO2@384uD4v_5kMC=89;M~0crf7O@6^cUN1X3*vOgit_c#yxU~V5+_3(Yp3&2r6 +zGA_yUrOaH|cC%GMy%|5D +z15P{m-e_7s-wwTepLA!~Kg=#W(s*>8>mVAY-`a7g{<-^}UpsSexI4kwhL3Qea+!Lw +z>_ZIs3}gPc2wic$kJ;mIOS^FEMaiEnx>#&KRGB#%pD=6sH5}jD}VD5#|hQL_f303J#M`%dOqOtRnwt7zK41shnw5UHh|@yTWOy<2N2P3|ghw}NJEA^uuI{j|HY9LCz>elkraC{$D +z)1^O~zfuIj)O|s~_hQ?WB)_P>`1(d3-U#Gg^V +zW&Fegxc0A(&-Zh~{=_|pmF}yZZLy8J>S_dewTmf?;i^r +zoaUqQ`Mxjv`^esfpI>Nxosw{T54a_?oBL+rere{QEF9P_G(HW-_l4U-`?$Zg)1^!6 +zsq*+9aV2<~zl!sHV!hU1R8BIUb%x0c7$4s^mZ0tzm49bg{;HSnA9&J!+zH1595UyLH9g+{qtJp7vG0I9P(IBGG1lc +z!wj=}=i3>zdrc4DqvkvW^(IWWt)Hsz+FOHw??=~%^@jURTXg=^?hZK}@UtgZK(Kou +zeXVbk=ieAm>%;M%`eN(YnM_3n&n7tfYdzNReE<5wLisbjyhFzGZC~$*3g6nHrf?pZ#oR`+Lx?* +zJwP7ctKO01Nk6g6WjlF%-&)hDzv%g9G(Kv)d=LA8rzP8^d7iC&zNfA2U4Lr2;(TBG +zphLBN$Lj0;F!^pgQ$FA4?f{>9_+Ix^sE6%H`iZBb@w5~1^1bh=uwL@q&Q|U%={{3O +zcyQ;p!%|Ef+|l%?U3_o64e=A_`{P>w^ruq!e2@IBL*wa2f12rvI#c0jd(v=x-+Vv9 +zb%gskc;55e@{Z>#Kj@8(mQ`WAd_O&!N3i{b;h*$@eQRXB;Ct+Kh&O8g{<)#n7qyS? +zw^xVx%JFTBj&ED_!Qs{yD%;%{7agh!TL$xo@5P@CG+gIr^OQ!Vkw*O`(v!OaI`UWN^iouPeG +z%Z{u)davs^>iWY9uk}ay{8ix(wM%in#~+Qy$Ce$bKYE|)IaK%D-5t-aoxb<^HJJnE +zNgeIrd;ih+7q=s`i-u@^X?*kx&;~oAc|$Z#D3AUE8k0ORE84G99{mW+hP+t$W}=NP +z#!o*3wIQGF+i&lYNB;vdWVv57U-08U(@(zy(;+V&e;bqU*STUZ{T6hCuk}>ZLH`A7 +z!usy&oAj%hK|hh)a=Y(2eL!0;)b5%l*(ZkogEi0}wJ$#n?F5hh1E%C`y#BVV49jiX +z^R+W~JzF<@_n|ew}PpD<K3Q3>ULg=8@rq822?_G(P%CI2eYD#V6Q8`O+$p(yziq +z7%mpyp2)^dxvzZsSty6|C606Md@7%z=vensRmI)QR(w+}mWjM{WKv&TlJy9!=CkUf +ze}?@F#b1u%xAw0V{!Ix_{|#D4^hcb29N5oke9EUkhXu#=4@dElPk#?f@kO=MPk#_+ +z)fo9j^N(m<4>PAw8{Ypkv@9Q{$83&Vx&zTLO^ +z%=UPM3+4a#Mg$hojXzh5jN|No^nM)g3fm#)3tROa1@3|FU%^`AA3(O>p4m<$(QdSy +z;(AZRj%Z(1=JAgJC@m_tiUeUtPD=bvONm8mYwJi0UxgtW78DAMK&vjMmVe +zSi95B<2r?+voyG(RRK9Q}7N9C07Y*IWIYIQ@Clfk2#oJz5No +z%YfstwWC1@H4n-^_~+1T{YB$;a-DC(YyIew@bpvB9@Y<@Z#T~cUd&XiNDPU-hG;re +z4}Yv5)K5Pb`A|RCdt3E6i+{%5uB$$&e__oJr?syCRQ>div0y!mwrfH@{bzK;u&95M +z_599151(ynzNvot*Ek>YT|L(MNPHR+>Sub-gnZ7IlkclhKmBu@ozM3Z2H>`wG=Fct +zBM9ifgZWDw!Gfjmwa`O;l#jGK+K18j_|tZ$zgIH9Irh^+gujg)E>sv!^3kuCgLS2S +z!{y#xBFjZD2l-byH(t(`ioL_Zy8hmBum7_+>aT)Qxwr4BQm}4UsT7Rod&^k~ozDe* +zql39(Zls*`;c~mic4vo11~ioWyLZ>FVs1}(RqP$vof9qoW`1ZS$G^pjU|rwn@USQ& +zmLKiopUHp&5?c;Q{C_3%@tF32^6HoW;k;*1gA(O}AiU2%ywojO4Ug_nCZztnXwZi6 +zHA#N>!XV)F2p`7pwCPO@Ts+7Meu(3`1~Exh3aaGpYSTGbQ_Y2E&>YmWn| +zBh$;a9e2k;eX)^ +zvA_#(p9N-$DR}2*UsHbYa|?%OoJUi_H_iC)eaYaVtqlJ!5#G>(LkR!m&n%w*zmpO^ +zxFRoo$*--~iSR$0f3tFjwuB`4qwOJCJjicO`_$Oarz!$g$)9K`5h#Dv{(=wx)dV^} +zE{!{xLLZ?186W=IGyYn~n~hQ>8Go&Z1AX;wq4;ZFr6XAoyiMkK@!vvejo**|U7)Lm%!DM`7u=J=*WI4!M{x=^z*H+(B2sRNQ^G&lsb+6A&E<_pxq~N&7Jwb +zion+md#57sc|ITac{v}y!$R)5BEX>*bGIV+34{2{3fn1xRS{_IO8zu=D}%rNQ4(dn +zm|tE#MWW|5$q;H`x}J*g+&@G4dRGyi`?omH{ac*p{FC^y@Em^>>Vo1n~Uj!Q_D?U%QWGQlE*} +zCHNJ=MWesn@grQ0+Pfe1pD_9#bNuB2aX)GWsLAu&Y1Z*0oc-Zbz-!R1sb@d%I<|K- +zZ*R}4V9wO5N#QS6uXui6Xzuq(`CrSIc%6sQ&n*jht{-slX~&Q7gShcU;P$*f>jTgG +zQ_q(izak)h05`q@J@!3-ZvnUO0em00eGh=~@;v~k4=N@9G`+;H;0F0T_fP)o!6!b5 +z{3oC1`pMVlm8zfkW!z|Xxcs-;&rfdve>ZS@o}c=8ZlC&z^W470c~0NrH*gN$;yiC} +zah|KUIM2~roag2(&U5p`w;{du96Zy-^X%jk=lOMu^PIZHc^=*3Ja|M@#?V*jh8sKVbGsc1e1n80Y33$ +ze^n7w-JMLAx)WCY#4W$h@b#Ra@`+o1tKqBrMdcHJok?$(;hzDYI7euopP8WUA*|=1 +z=gW>C;SInq0`CN${U^(}$HaRT@e)tw^YY-7>F2-i_z}+MHeUbo;Nr)U`TP&y6SwwE +z7<*RAkf8ZS{N6;qtqP{(or(Bwjqua^`DNjGeuilfenw)j=lt2ecn+R?=GzHlC)0b$ +zr1xFU{^bGjWO_3}mnlbGR)}x25Z85>{vHK>-jw49fnPAVw`Y~K7ayMg4-0>>{NcHM +z@=Lm0QymS2I^SnO!=fEd^ +z8aMPjyr#>ZLLwj}@{!`!+_vwt0~`jO^6Z@;u(!}s{@!Pz=8y<8(( +zRExz+f2a(_cF1KT&!1KEcB<}Q +zB7f)ylX{px^m}P>`nj|?{aRX_ek(0b|CAP|KT3*Xq +z{?p(SPxe0*!7;<11fTdlM*n%ke-3=&cHMWy@Q;H}+}eNB@P7w<;>rA66|^R^Czuuf +zV*LR9Y$93Mzmk2twrl#&v^f1@TAY3{i8H;&jQxKP`-vyhEAu+c3#sQ-a=lo2(XS@?w4Z)8 +zElxk07N;Lgi_?#$#py@W;`EPcar(!!IQ?T1XTH_{M6#ZETn0}wZ}<4BV8TBpq?(|1 +ziF~8KO$K1T(QhVk+S6$4xli=#J_B(^PkyW6w}4OF^Vp9q530;_qAiXe;mLkj>InfD +zx^;>4(yu4ewNv;ypC?|88_Wm#`y`(@{e2Sm=~y1rq}We9IgeTu)SE|I`6cY9pHRm8 +zQP@wM`@po5enH8f2A}vjbZ6w#zbE;`>Ce;R^yf*O<=&|a`PlD-#H-_J9rB00DD#at +zgHX>7qvyQSQxOnPKCh8|a>M@%@QK$U0>)c!%1a;ftDVG8p&uoGP8Z0r-!1To*Wq5Z +zGz8Ui6MUOq;#5Wb!P80ouZJGu`ut3PVgB5iZ3%&(rT~(#}=EdGiQ(bO}B5_ewpi=k)h# +zar%3;IQ_X=oc>#hvwV9#nk=thME(%pfdDMu`qw1+pLG0+fcP5{{N=$JqyI4U6Hn@w +zd4i9KW(J>IBH!p=mI0V=^e;=?t6ddbG5Sw0p`U(bsfYUMSJvY6A8T>?g|#^S!djgE +zUoB35trn-hR*TagtHtSe)#CJ{YH|8YwK)Bq690FSpE`aKx8oQ6o05MCeBzc*Kd0m~ +z|LL!k_mte#^q;{?dV>| +zk8p2a)bG`-PV(OY{lt^|oHGA0{0{JmTYi_}Gat?y{Qb~FJejUlK?e&E8QL%W#rjYB +ze`Wp)U49h-{l5}t`?VVcf7KmEX3oPJ;}PCu{~ryp42w6l#9E8O^{CG4c1 +zSL&gi^z&+Q`gyfD{heBzeoKk7e6N`D_4x9j*3{1z#2}qN5a&4o>bYU`eA@9V#E+k^ +zx5@UhJeV-gA5TF)aamEgAN3zI=U8T;pE$Fd_8&0%zXtupt^V3A$@cXv=qFy6ut&xb +zMhN`xg}+!mr(aCa!}UA;Vp^R3FNrfBPQ5N^C-EBd+}z`Qjkk6| +z{W9(wyhi3v+D{Ts&IeWnUFJFO-NIii-{|j-_K5lNlX}(28Kb|$^fq$i!Nb9QOX#P6 +zBhZ5fg|Fim@owB;y!3lSKJ&lPJcsglWiV-;ACcc?_+7|1;thy^{DR?s5Pagve3tWU +zhQAwp;x8KgjdjU-RRW**;RIjSx%V&!y!?pp7b{2l5n`xc7QW^)@lM=eKGVMt`Okq* +zya&ZkKK%-j&wRUP()C%Si}(Zrc)px}FwZr9*YP7f*>5ZlP8&lvt!!6%;N +zOFqAuDf04L!e1<(=^u%qm_PJeWO4c>vN-(@5odl*-jl2+-*xuOxgFr_ZkV65CcS@$ +z^b+^>ah_8d%$esn%VZt3Oj1ldnLlz4=gmobRylrz+j-6o!+#U_#M!NT`&R{xYncOH +zt`q)Z`A>gL4E1i|Ydt4Ei5n~z`duQQIQ=YHoc@k1PJc$kSzd!Cy^kZk#NEf%BoNE% +zyeY3<$6p>0??431pSGW3j9z|diTt5IC5B>p=|9Qh^p|9D`bQ$p^v;^}ehld)o}91B +z^AW>;7JTBCf5Y&96MW*y{RgRsYm@c!i{KMa@}<4s#}s+_2f|;hz6J1`#8AwK4ioQx +zK)l3x@|)#e^Q%cazv1|@9s%yliSSHpQ^|C_4t(M~Nl*Q=hW}IG6Sw`tj(VoZ%k{!vti0$iilN$s +zujwUDzZJ|M`iUa{3Gj)x;|BTk7ezjC`irtS{X$usexNK~4L?s7r(Y+F(~pzI>5s|c +z^ru8zk}E%X&SlEwDY>ELPTW3!yk_|Oz$c#U_vF0jeaU*l^*ixoJFN(64gcfNPn`Rl +zw7=Ex4}niSIc`=2*9`wNv>!P4H>khrElKEDXDsF7bqa9%&A8T)bmK%C1J +z@~;^FcVIv9dC!Fn{|5LsfhV8K%l^sRV#dgy|Bvt&%V+xAVkoAU{JOJg+0VQkL_BXBb$EUUpRh*C!ZtB{BV6Te}76q6d;<0mxAT@0hW`@y#O*xoqOt#TOW038X0(&`(_a~J+JDB_ +zGYfl&Tl+5>{-1(RJZZn|&lvt?@QEkuv+N5s(?T!*W{LFDj~YWUz4Vi2ar!|c&U~nE +zPS&gc8+H;;)+>2lY4}yL;MIPBxLrpK8vb426Hn@w{R)#0YlXj9JEfmCrmIQ#I^VPY +z)0jW>(?&k?Vba)1KJ{4sTuUf=_%3 +zim0D{=BWQG;1joe`k5pD8{iW^YxL8<9QpqMKJn9rPrq{H-z5uq%^%{Y44?kw$bUQd +z#LwXd>q)R7S+BMUU)vXPyPm2w{2kyEPqr`F*E0M8@QK^`ZR5tIJ!SBT^R)-szr*l9 +z3O;e$uNDk{3VhtN`{hsi( +zJ`m622J18Z(UH%5JNb@eKGU8no5=L?PnNKU{^=NsdU{%kc==~b=%K$lhNAuSOJ{NV +zr6bOGXH2|vOT7w5`@`=-roWE0vfN)S6A3*RLEPIB%^L>||Fz%~?@65JltWCXlKS7^_%XcB_s8BI +z88=NmywC9?-1ZN(Kb_Ry0zUENJYSys%q00+U_bF>dga`a(Z3z~iOcrB`_cY3!`}%$ +zaj6Cg{`q$%?RgS>;>mqid2ij=KMwneC+%MzTrvCu;1jPi_FOaeJP&(_%cc9V{sb>1 +z?f)(4C(iNO^H&8urX77z_>1+E^dpF9!*i`wKTX8TKUhK!{roW$%d7rfN&EGi$U5E; +zPwqdg3Qn1Lznv1V*IyZ2c|57V!d1xmINSRU_#>p9HI6U-B@9k}-rzpo+k;zdC{XkU +z(X&`Sj~hLV_p-qm?-heT0y`Vjp+xLQdv@}{HSTq#*t5^+neVUZqrh3e8O5&ymtsi# +zJ`J4vO}zPg!0QM={(Io{2EQn{_S-E;7xgh8h%?xC!S77r6DR*RHzASri>Zfq39j+> +zLl4u+_76w=@4wn*4u2^e +z13uS})K8rJ&kA3kI~)g}`0ql`Y2XdGK|RFD{}b@9q}WNE{Qn64P4L$m{lv+?1v}qk +z>Q%KY^t4{B`MhtZHb03|59`&nlzMf`)T_0kf1!HyxLaV#!2YkZd)N>#OpGm>B +z)Z#zt(YhG_{TsyFYVcX$jRyDmP!$X=xUVkbh{>Nn5j_i)@81co^{NB<`(YIABu-oJ +za22m2m@)R$0`D|zE=hnckB| +z&!eJ$p?v!Y;te{IjTn0pbtPH1ONrolNg< +z0_)v;1|H} +z#0{1^aq?HX4LW&G6MW)t1b*7!Zx>wcISbs*Z;4Y6{z%Z7KS@4Nm=+js6QM`v0lT+nL@TlP==ZDfpQb{BjCjb6c|9slUm1ExMxz9BmnFkvDe&FK7 +zrr6W)>ZJW|M!f9?Zv@_NaOT@BlW*@9{-W*C=y?+QCk@W@9y9nD_-74H{w0Hd1pFHY +z|7F2-Jgr*c^I<=#7xfTlt(%6P3Gj)(0Q`W#KL>n`!M_N6(BQwHqURj&NyGnB;KvRA +z4d5pXeiisRga23H=MBz$xSE3BOu?&fPu45ySz~b4pPk$wL5AKGdlsud4MxwsZsWHi +zXgB!VfbTGPGw?x!)6TrX9|XT(aPlV&&U96q_ftAV&tmDCGJ2?g+ThfG(&*RhTS&j> +zi{GjR^@zVXgYQYPGfn@;UH*u*S2)x21v%|-|9AZV!-8YV8Ha-}rr`fRMbCv4{89>j +zIR*c|!>fX0W?y9$ABZQc41&8;@MgiaKbb@7c&>xxNSx{(1^-$KpE&uu!M~ZpCrj+_v@*C;!*MuT9|-C;wl9U!TG!PW~T(-tp)hq@;prK{^%T?fZQy*byns&d`%X{PKfCQX +zv2~g3*K0n|pWa#6|3=_EKhN(VZ*usu;L=-sKC`^GfX{O*tXv +ze;PRbNLS1GC;fdKIQO^7KLVWZ1r$6z_!4lwPq72|*MZajhMP{yz3YP4NIqCUZ+{Oy +z{a~=%SI9oN<{SOqupI9JPQRV3KP`f5{h_}amg5uP^L>_!uyYhR{a{bYqYVA+2hMpu +z)Ae!S^s~hFbpkl&ODwPd1vuyDZBBa-%mSys&=bJ_3^>o#u)h73;MyMR@!Wp`{O^HJ +zf32)pIQ^NhTpkC`@7l1QJPDlZS=#?AzI3}^vOfGb!E1Ev<@aL1 +zue!(c>BnXq_`Se6zmn?eevN`_{p32A@jeKg=fCxEwY_k@O8x&DIQ>tuT)qZ9e9wsG +zdmT9a_mcl3;M^Z*gFSV!f1&xt^Y*NtjSgQH)Ytod?-uwE3-0=7%Vx19 +z0H*pnhFAI*h_;j)U +z|26o0ueJgDZvp4`T&gqv#+o<#eB*m$9pJwcIM0W41AkO-EnoWoWciMQ&+o$Q_vQwl +z1Wy0MJE7-`&_n;C)bpp{^F0FQ|F<2!ELeNLPw!eedZxb{;M0#Z^Z&NBK3)92#&J&% +z-UOWA$zpof1LrxtR`A~eoc^?XfIkYH{+d`na}F2(^B8C4()|kZhvpmCYgNFX5nRWw +zTJv1~MTg7aQLX^fi_ZzJ^_+ftSngkP__AOpzFSB9Pr&Cs3ES6Y;Pk6=0@modmwa;md-T@ABoy`j8V`^M~gIYQWzMJ@l*4 +z1^m|p*L<_*WR8Q+?=f|w9{wTqzuE)T^DXe{Z*4R5{{T4OD<{56{2*vP(9cyT_-_Ty +zeKzKQD{%TbYyo{D_9SF0yzEt9R_|>a2?-gU-I>*4frX+ +zYotG)H0#+vaJb}+`R?H*hyU%5?DtInqu`nk+;3z(`5th-Cvp(+t`NTr%IEpCLEviy +z*K+6iz)Ilj!KXh}*4y_0=RV9D@P8IK{R~h~ui$Qe*pX~UW$@_-pdEUi0Zu=SEZ?KR +zd9IKB%;$mgdnmN?kAd_3(;d+NP2lu%$oBI0!1?^B8vJT0=!NFD_Xw`}$@f?}&wnRy +zo|9y}PXOmRL+bArT<0@958r`!N5H4QeWv##!1?|%?SB?H{f@HT{Wfs=ft-Z?F9YW} +z8P=a~1J7eWmihU&!0AtE9PRqm_xpU{e!kG$@AbgxpSc_OT8A$Sj-h|1{zl;CH~4<3 +z0sKbvO>Q{kRV3{|azE +zw`F?21DyT@E`a|7;M|X8IW80b1zLajUTPcoD+ON_n+MhbuLGawrq%*)2F~x(G2gm@ +z^Z6b7&wk+CA(51E)PF1=n_QLjJ{nUv_$y1=rD!m2vYD^wX~h +z^X)%FKmE5?f`8lFP_OX3lKJ*J;Pg8>0scFH^ZO3{z_$aZzgFrg0q6G`c7i_%oPPFb +z=cjJSN?5oiJe+xd}YnyQFAowzHK5wl9{uhGl{6GADH1NN6`22D9 +z2hc;m=x4#de@51$)W +zgFgtI?=SN^ar*>U{q#%E{5eGa?LH$rpyvy~>A!;g%pU`%e+HK0Rp9i0z7~2iZ};h? +z-;a9Cw^swFzlApN-wK@Hb7XzkBDk(o_`W>(I|SGIU-NLX{tr5Qd2r)+5-$s``9MFt +z%;!UbYq`)5CqKLXTfq5zhw1%Yr)Qb$pZIbag#BLupU`dmIE_`GC(K`Xf3F{Phlxz9Y&~PkwJ}C)&|U;Cx?uHR{9N!1=!R0qAK0 +zPJeXLY~Am@)L-irOaSi(PCvlazz+cD_latNzX+V~Y +z{U5;Tw_zIkzYm<}E=~i#eZALD|GJxj*9orq#^?BYwt;_5aA&{n&B>4Ye*m2RY1v!8wn_6%xR^iGL(e^eyZur#&c4m@HMFmo +z)c-K}vwW`#_4ZNl>8~aa{X-647M!cax)}BOW5DZS56kN}poiy|>Y(Q^aGqmfzI`4z +z{SmR<{RhF_{I<)-3pK$N@cDhlov`PJ)IZ{Z9t3!8v+9x5U#X-DC+h^)dPx8Ob-3H& +z__xh_kKhr(HJ=-i&$GzTC!mM^i>6>t5jfAGF})uL&i5tHBHrg5F8d^ypGdQEzt4kD +zzXvnGzXF`+{8^vp1lRP=n05631wOyebq;#|J8=5Xp9KC|DNxNH`b(t$>iYy&{q{Wn +zgW&UfVFl>v0#5%h9KUu0=Xbt#fd33|e&>t$i@^E*?;7ww1DxkP*?;~k;QP%w=-&bF +z&iI0Ag`Tegr@v6z|2>B<3+gb=c7uQ02A@ClL*5VkZs7c0HtpF0oPN<+8y^EszYS%y +z$DH6gkFxJI{37`DXSE;keu{dK-a+7}fb;y@Y2X)t^Sj~g!2bp~&#SZne;GKxFEa(a +zcB9V+`t>5-0{p=JKA*e5?*z{8@vR1)1+g4nV}UZ`;oy?sIu7#vpjzPn34FdcokzL+P;l)Bs?2;Nv&rWJzh|)%dR_YIE%)Bz7l#opm{eZkuCU~PXeF!Z5p|3FEu^{>9dShiFiEo29KNBZ-*Vvx-ajE(eV +zv+J5Rt=|~v?f%}OfjHc}K9KO)-J^SQ#gWmX<2V(ia`bn(IJA4Ws0;O%3PE9bOk$P) +zvxU*Uxnj0|bhvkDM4}J+3;BGuG*&9)M*96lF;^NJ&INH?Q<3f8wL3f3TP%m{B#K}T +zERFVMb0cMmDDUD<#@bgd2CA%>D~yV|q2h;JWKhuGUkqc=zo~a$34dk>hKgeNuHKQS +z)-`S1BsrCTDmyl^yPO>^Jr&Qbrj4cgG&^A*Jh_|=1vzF4HgC28OqX&71TW^p$x +zLN1I*JC~XiP_BDm*Vs_L|AFFD%}q_?gAerQc8%?RU{}6*z57r5gyO!!=+H=c-Dt3T +zs86gK9v&T$Y?X^WOSRd3u;{79KTAm*~ay)@p~=tmfzSM +zZ~2W)38u8ESbQzg@SItLxqKm4)W#LNyD_0>Q;YOrz2&S65GSr*FUAx{`=06>94dsj +z`*Zo;ecAHRa88;~q;-AM`dAv*H%SjRTF@3ak}FDXB|~YubQ-ipj^(0Aa^rouLU~A9 +zrs&pO_5)1TQM?jX +z$2AUTj7KV;>%3e)sJ)_g)4b^hl%bJ<(YVrrknwwjqK$3g0_7P`EClw3R7$4P|TT$<19x<99-MtU? +zOZy*=8dqeoRKe1oJ|UF`d!?9%ha=7FH^}H!=-sV_-=7;_x4z}UP13t%OFm3?Y^XmN +z9*%Bm!x3FlDNE7`u!4gf$P9p4sZgJEZOQhtv86G{4UCm?LUVn(%s~3IKD+MU4LZZU +z5ZvN)Hzk!x)M+3Jza(>oes{%2m$;5s6WoZ|(7b+Appzt3rZvo%-lr9A$c^eQMSi>p1lFu^ +znTrsS&h-x_CU?zEo1%M7&53TiS-P(FEgLp@YB(CYdZ8)QSw?B|TAJh4u4O~q +z_?Gp_tN3`_BE2QEVys|t5P23G4Wc|~X_l@`+m_6bwBxo#*t{`O?vj7IdY{S__i0`~ +zCH>}Lt|(KLM1)Q2<7sG0%p0UF%Q#)m<@%#OH!^0ubO`aQcnX`uVJ1Q%*Kp-Jk0?}2 +zqsGn_mjy|h(*o!~udI&1aKjk>)}dEslpLO8=(KkweEf*I6kfvoDWI +zrpn|kC`&J1C}npIl}j>;_7>vdVpcV7h}VurX?sq;j)Z%9<2>p5qqH=(#@kS%bYo$t +zLa$V9SyCo!ih{0xP?o-~8&!gz`b52uCe1aY5DMdz*+Fx#$aG(N<jZ!kyP>{^d%5+pVJQj(uSK2uy$`b3tUGK}j_dV^8xj!CzS{{b6_6^~7V@_9wPyAAa<)N0LD2`yTIpgkgRr+y1`yb~(bMU5{rUf6oUV31X3m +zfii<~^Sr$y$s74GzqHmlpt&cjrBagY7KpOI9~&+#mOP0~M!;7W~WCFx<+Mp;ehmE?4^eVckHcr-Ji@#A(Ap40Sk}VZvCfOM1!ViDydJ2C^ +z|0XRgyjmdScocHnt;Af&ahat?A>}F=vbVR`Hz@sBX_)KKqV(UfE4ilzkr&N@bK^4c +zi{DaXQ)uy9Fo(>A>=6q>#rk)++D*nOw?f79Y4Ka}IE5KYp8H!i$Oea`@6YwS%dwHC +zMr3WsNwnq)tlm(54fB?as*{cV|V%4jKhp()%oh5_uxsc9Di*eBu`wRkWwl7AyI@1S{%Sd~?u< +z77J4<42|e?Q#9w-2l=MOxNZ=RBG4R(4?c43dO^2;R?dy|j`ZagQ>O(Z>%+ymuoQ`+TC#&yuuytdIRIO9tFm&Q(f7(XMGPMvlKqm%?x$U~l;=J8L!^5WBlcosA08fCOkX%2Mmkw(Wox0>t6M_Z?3Pa1 +z8GB@Vdo~*kNo|of=$;SB?xI#D%q&7EHqB9bUw%~QZlls#dizz5O5cM0PFbY-?Tymt +zSW&87R)*n@M;?1*dw2G+hu-U=eBbtmI^Xj%+aE#X{kc8R=*DB+#+06?Z=~!t)kT4t +z?;bzM(4UnOkvsBVPP(paw4d&F>mu9@tz&+JG$iZxpsu3zQC0|I>)Ow4LX=du4sy!E +zTkeWWm=KMXPF8wu8PHvq8Q#}PtE>>Bcy+kYhj)D7GXKtiOrQp{`KHu6>!Um2awUQi +z+f${{0o^^&)WalAq2{&hte0eU62L%TjA2;qJDsJz^65^C7%W>3K6$QFb3KFT>65Ls +zQt~mDG!xEaT;Yl~_xMPvv^pY}dF1i8UbzkzxG#ekc +z7pTbDz~?B}v9derwlHNMSzCr1NRho#fn_zh8xIh$t1ex>OQk%Zl1+ARp6uNZ$p9nS +ztItN{L7n7LARQHUe=wxQZu(WaWSwR#dh$S@*kt`!?jGxv+}60$A-bbEvu1`ql+-D% +zkH479=X8PSH>`CN!fk>`x$6E&Xq|s->^6sdjqwA}s4QvsWrqtx?&;=ZPh=nOe(14o +z>115#_lX9ylW6la7Ln9KDG_<@BW4ZhvsAMIE8DDt`8|H`t6z3;xG6BNV6j=?60L2_ +z?Vj|OhB5B=UD2?&iS5bq$pFTNtQ!F2A^RvM7v4NcLs{%|T4nt|ERWwgchlW(jjvy7 +zlsu@>d6$1SI#gl}bMZ=1NTqans!w#>AAA&#rv!U@b)%DgpUjkW^L2ELt8&RpXMncO +zkfl2|9(Eel?!EHZMz+kgL(@tP%a@&dbjD7%8y#eH +zkug5jF^ou$UkZ1Qd{-mm=>nzWdyaXXjEPdpLD$nhpB5RA=9hk=XNu>BZi3F6G$cBJ +zaEM79^l;D9IDl|Y5FNJAy+J)J;%l`#KjQj+KQ1`?T)m4XOtRYaqlIjb_zdzhYQ~Yx +zN{9UT`ybA>Kl1p)vWx@*90o-RX~oUzI2(G%aV$ip;g +zt6?i~R_RkdMj74-ivbTr{o_!qEL^Sea|!8&{m`O0T9hYlvTzNnB*!a1LSlf_os_U5 +zX`9swJ}ff=-6b+zMpPwDUikTN!dk6sVNKOplIo7SIGwg+%cHV>l_f${8p%huDbpHv +zsshhlWv^0IHM!@lZZ@u?m0uMN=Eh@vnr@$T^{<8Ql3VS$pj0-kt9xA2dfnOXyNEQo4ro> +zj56Hhl5WF49L(k2bJHjbd^OdI6DomC&Kx%8-Z3d(IWaRJb2>TYQ<9TW?n#p5QGAXW +z)9W7fyO~ooLvh)v8wZKX_vpO!kkjqUoznrQNgok}^$UZIc96cAFf(-y&rB~2CwrfP +z-LloAmdl(oFOP(D`XpuTIxWp*xg66mS7thL=4`>_BpR6Cb79Ob%lv{R(J2(mQCwp-MjC#<#Dq13eumH +zb@8Dy8Hph=!0Se>OG?;K)beB}peH;0NyV`dUmg3SJyoB@+J>UC=VVgOJj8Ct4~V#V +zg`Ow$*0^OFYkImR9L03ruMx`Hy&#RwwWHV|kz5)?^)H!nHNi~^eC3i;5DRWvyUmDb +zD3HAyHa+caG3NVZh(hUmWn)t|{M;!L%nSWPAGO#Oo|+t{F*fF-vT-W!$7)}Y^M-c} +zfgAyFywtZ1A5bd2)(_va*!icHu`6}gK4jADvQrAkUCVKk66>q)Q^Al{dzc>`8!AbT%LC@t +zY++a%NPMd57gz33*Zk!b1|7Gw)DnrB2FF;LOla<#C$ZA`wMc&`6A1ZFHp-=6)NKPl +zHe%x?zFyT$0-q=0h|a>2!jY~rvHQl!-u&9&DuQd*>or4C55l}hTe#+`_CN7LMqC7gQF +z^IJSmC-XWtrPKUihaRq%5{FELk+{Y_jMHxBn^fe?lP=e9ABD3R2Wy0h2}HRlYfRmp +zNX!bN6=1l5n9O$!eTn(H&laBW)A|zbA!_B;nPYZP)*yO1NmlUlH}rUj8Amf?m4`#6 +z+jr3iane9sXRLc9iIG~Pje2yc=#TlyRMu6c_*)UuOZhpZPr2^QW#xd&=vbi`V1135 +zoigRAm~45CxkoXw+2*%8?W1f=dC|YedkEA`XAWCi*p;Oeh--EjBrq>3?)Aw{PO{we +zPEHdpHl9`3)?u^B(U3`bDRng6N +z^vK7k^l5pSP=^asS2j{XWhXPfTNKrU*a|_%^yplrA9tmE!=nP&0ruM5m@U0mxcle| +zDZUKxr%FA0;n|nJH?J4Va&J^0^!g{MEKEL!@a?Bh)=_LeVbx3Pp^~-Gx29O%7_E8T +zX`nEJ=1;n#tzOM~-AMLj$Xc72>nwEIB0kyZ?fcM}ygCuzVe%V+OfjFyEZBQt)@Ax5 +znJr^l?7EEL>71O;%?-*~C|}0mn_LaST{(c)ph85@htAOVOadKd4X-F6)AAn7YBGe9 +zK!V=4&%HOfQsguc+UbneIzE5<`Ap_fnJEsdX!Qu^Hz +zI{B_b6Ze%XPn7qMtl{cgHx|rKgmhU*@9Rp2klr +zl)js2dzPq`h>p_Dk&J{mn22QRh%zNa{=)LdDHWGd*N!0S`XZSQDHTUMBfr{cE9%zS +z(i?2)&E_}*kqr7e8X1ga6vVwLgNFO=K^Q{l0)Jx`f1^gd!{Q71L-w)nvyJhfExpy2 +z-fm0ph-7wSK4*A;Oz>sQW2|6aPul99vZa4uOHbO;PutRa&3Qg+&T}e~Q8C}q{RT}3 +z=9xqoMmT-9K92P<)~R5f1*R`XGC`v0MU$mz*_AqQNU5BNduThSvq&FO>L$L5d=~Nf +z*4+bK>&mGADWYzP*Sxtjt-Y4mi}mnplsaJNL&JCy#%qY_cWtR9-^ie=Yv@7hmn7=$ +zamoGr(1*4|4?Dc%L)-Xs8ujZ6bq~E%oJMCFmHIWAx^+^U2z{oAuHrrjeWWC69eUAh +zJ4R>vmr$2L+jj0BV`l48ah7MywModeB0;W|@zXC*`gc9@`0<;hao!&g?&*hqY~W>K +zmWCA8=mu+Y{c_G +zn}SSQ`8mk*I90DiGIx$p`fp9T+1#g_Dl9sWNk^|mAb)x$3p&By>yZq%c_X5&{bfY2 +zc;83qL#K1y_AyU=WQ;*s%tcEbNIEH#x=qe(<352Uuk#e}N*vb1Vy%y0jA~vh%2;x8 +z{HBia-}OYsPv0FK&nc3SKgN`U;NvYJt4D+HL@-~Ix1*6v(rfG=(Qos0#(q8?$+YXC +zwZj-QdHA^lA>aed{G5Iq*o4qNi897c^nJqY`;@s)C~D{fHEQe=S5%C-67)Rp6k@>_ +zaI13s9i-vXmePD&?aJ*+cUjnton +z&V1Oy-+Q)Cra7L=&E*O!6M;(gta# +z|5We6tm2<|7h~(-b!oYjc{mA1*Ac#CO9Y~P?wl~!EvL)7NY1BBImzkJ!8+#&T;wWS=%KA^mxh|zo+^S$dpVfif +zhkr#h!{c8KeK_^kva$DW<}&DkEm8}|OgASH&5VKW8qj5bY|`}^yBJS*?!-)vii!Ws`=or6?P!()yDnyf-fKvHqtL +zx+*&>73cHoo2bu1uS5{@KH~BYPbz*V@(H)TO~}TExoK^6qAlsW#3zx|#PsV?Kjlcp +zTM?5QXpzt_=hq;wJ5%v1Y~`HqWqQPoq8$34>5=~i@>#^dc00Lhe3EN^3+HcQdh}O| +zSVum@rM;fU0@fZYM!*tw^Hk+*bWSjgQOT +zKw!Q7-q#Dx1KWJ8vxmoT-5$*hgI8WZjVj%mL{~j?GUelQz-?{)rT#=Sgs5UI_3AY1#=2_iAGYe-s?*SU +zM*Y~_^k<>F?E2m=lV{h9CK5h9Tu0P@wZJqLpF`ipHo+LLRi|swN1_}y2 +z-Qw@APV;%_H}kY&Ub=#5oqD((G1twq>hyVOH`lrK@Kk6ja1Ez_47(9HGM!@4t(%u7 +zq^Cl!2ChKNb*F%@;N`J->61t&0($szZjW=l&PDw%SaTn&P9Nj?`6xHr{;Sn?vO4|$ +zxDIWq&AMM(b?UtIn_LGBtU1m$Y5otFW9~`JNz*k?68uYg(8D|s;$HMe%V>FsaRW9( +zCO^I4A*k1Tf~f1z_60;+%y(rKumR4yqq&2S{tPAwa>sJ2RK-!Xp|6b5m!XA;zi17^9sR%@2*zI9R +zQu;9b3fAvex@f!A-Y&nzWJ;dY!|y86#7fK$ZJV5sNy%%>o$U}lyE|w&AeZT3Mb*Qq +zOAmJdPsXfXZ}3RfzzTWT^x+83^#<^;U3>n~cHp}Y>+Pu3!%u*=7j+M7FFY!v|M$S7 +z;@88Fht^)uuLOPfsmQ^{?@@N%h?rb@W<*ULph0;j=#NIc4QYLKVsDj36>r3;{|UA` +z;NK(=zcFIiYGOTJpPT+VFr0!N2;L814?J2&{|@xpjGMeP_&`L}Phw9`_dXWQtXvU1 +zAv29i745OmS_L+UeJ$*1@IFmrh79oD&X(-Lp4PW9O`d&f+P%ESkEpc06}&?R`gI3& +zTYlG19MG>SJk9C60u(z(k@Ov3s9&g>5v0;*6=i;2gdA=I~{RNVUBM4%DGk)(xGu)1OiyVz+qQJ0sb+xazjGCfW +z`EkSc7BnYJpM&{1WsEC$qnPj~MOw9`UAA4;V +zw$?N?*wT%*^um}im*yDD)pT!bjQ!o|(Kdso1MQOt!wBc>HS^vt(WGbKuRf9pb!4#D +zuFOL24`cuFzUm!O(<|47c;ADM4a?cD0xp>lV*Thh4<@h|g4qAuZudvI?v*&7=q=;^ +zqX+sC<8}wjVAr8dIo4fZx;T~zuB-M1VLNfTjx|6$9n@pO&gAvcP{uZ=hBWW5`@tXM +zAjM*0|MHzf1otf=)Qh%9YtupSBKlu~xvviG<^5H6l#WU48-ZTXWiL5Px70>ACFj$P +zX=mw{olEy$J_J9ixbvK*ZpIpVaKk0OAl0#aPe)d8nK3s)IiZ~A#d9Fc-%ihTq8#(L +zmy3RGHrF*_^hY=wxt|0=phc_*~%qHS&S5J22k-7A_k@**DEH +z33xJ166N;3Z~vh99YUf-KUZF!C!4&i{Jru*j7Og_Z=SCq!`EdZZP(#mh!%C!dKWQ1 +zY@e}h*#X%UZC0CD5eXR*xUo!8jmQg{b!YpHY=F!yRZ;KFm$}W5Ig-TM2$@4#!+1Xf +zCb)lW<-H-~W&m{J{$S%l$)AcNT|Xk|s5cA&s%83H=D%FlWY?(`*m^1NKV_=`6xfU-s?aaEN5Q?xEeBh1HuJnJn% +z@UGGHMfQDY8-gOk@-UN=<0|&iM+!IU( +ze_%WNCRr9~`U_9v47|qG6~tPyOeSzgG(0Z_{VBPJaWBH_oWQ*Yfi|!=meEm9G|ye9 +zhu89*E7Q}!B|fHM9&pdr%{=hBSUfa>hrE7qA8++*?{9ZOe+jdX!|(%nE>-Af2j)D} +zI*K*L8Vb3B>{$M{bwBgL`WWtLI`O7v-O=!RI&s%5r9a%{7(cmI9e=-9!CsSbmm!Vw +zdfxbKEb}zhj_*M@ADzOUfv)FtY=10sL^0AUUNr22uf7x$Z(zHCWgRdH0UuuX43BF>S#X{G-7K2SaU)Xd> +z$QSbyc^&!*Wl4opD&bpf#rUDwxZAxL> +z6zT}&z?1iG3zzA*GyBB}!#1F|41H$Nk=br1)=1;F*lQZM5oz23TWPEjrxz)770VT2 +zUhLP{=M^!|b)mPdxe?~Z=XwHj(Jgw+&nnkZow +zu&1xb+Db?Zeve}Rvpq!e+gU}KI0Rdbd7-in__bKepbQHeRAW&9>uioC`yA+1e!HG4L8{q;x0gckNNhw@bft +z?N}+!7M!UO7v_a~sRf3e*CazGBFpMMQM?O|z|QGaYkie?gJ?k8dr7`w4=}$MZ-t{M +zAJQAvuHidm^b_QM{Lov#CX6#8=+(p7vXoCmu*x`;4_f-!C> +zoA1-$XTaZ{{>@~4`ZsNqehcH3O3DojO38OW#&gY@?|VaUT>F3VuF2#5hR5qR#>knrSNM56+#5DM!SzIw6bq!U!XmyTGn2tnu}o}ra4&qibk9~g)&czauB8WdT9D6lza9?B)C&2Vj8LcH +zYeCOMAu~)Dfjtt!og3e~^uWj82c872YSC5;TI>_P2NJ%7#1X+a1M_{11-B2uXE>p$i?{Y#upc7cOQrMG%_k{uDP8_l` +zZ0$FHz`7Hkq_RMIwb=*rA6$Vsn?A-il#4zl1L+>5Exve9^4QOyjQJ`DUn8fCdcHHW +z>VJrOwp+KMj^iDCN9~54iL@Jb3&*F~hh>a!X8eJV>5sF`Z}00-i(jy-SiJ}=#jwv{ZWpdAA)3Dob~KN4p?-v)1f+>0#-Z-Tzh +zp@5nld>!gP3a9*bl +z%m!Z~-*_FL%LlM&{d|A4+gvM2yN>Pf3EpQ+NBaZmQ^1?cj)0f95MPdVjz@)v=U0uoS_)%Mew?r2 +zbM`X73jx>NCSLN^+BD-@3i>f~56EM+X~ve%9>z@qj-ga-n(Y+EF9LbGjO#IP2j=`6 +zU?|QT#t>)CTbjef&NtVK*sFzr%M8Ja*r@PS{GUyH)oPryT_!im{P;sWM#F@bB(W^InDblPoNw_}`wL({w +z>CkDgw_%U&Lc1W1@Oqhc)LEbI!%Zq|Jq0%3S$~`Fw;#e@s>I#I!`S~p^v`=q$mfPm +z@y%OEdo>W@`#I=E#$T3)w^`dz?-<9(X3g3qu7Z!~P<^Vu2E_G9g+^-|dSyl(Z_PiPRMr+!X}Pljdm@i{v!|V`r4CtcVpin2;X27ypQUadWOw4z87zm*o%`t8|cjJ(L)}_ +zp4a#LXVw=!12A6&{C|q^c%6a>bgMYN;_pS-v@3wcs1F+=|;2q&n +z`#Yfn{CAM_K#&v!6~Xa<49tRq`nGz|Z_@TX+QWMs*bwj=KKqt588qLL2>8`u-fX`! +zZ<{_CIyfI=vmdq^xG*m)Tfp_ejaav_d-QE{FxPejKjz47c15mQt66(^b4@xfWOmNP +z!-$0(-&~XavMBRUY_-bp2D=1lmOWk%?uTVCR!Q}O*q`YO?X<-~y1KgMhpW&VjxRvE_p4AMO2rqj7+_)IDM +zjzjP}XxSvb7709vvXp5jj-Is>={~dUL8A<`lfkW>#{S>liF*gbHVp2twRy~JGiGb^ +zq}k>v=zjFk`-4t?N0}U*>|{H8a?jJ986k6fjXojU;@t`IW$5h}&feV|zsWKF?&Wk+ +zBibsh#`igBFF(t+Q_9D8q8;Vpd)dk0RHx9Vz6As`oX3aHQlm0fwLOR +z+Y~>wMPOg`sPs3`1LA#O(5rZhz fZ$Clr*lDeD9lD`dd5Xuf^<8iFlSMi1{{Las +zhD*8>-2L^D<4epF&+%ul&2DM6G3u5l==>X!eJT3qagt}{Ad|`xDTcDjT;k0t@Tt%;^5z^g8?@fs4wU=N@QasTdWo*S +zO=_k~avDMdf?tW{8W6VpswVoZqUZi-Fo_2V19F~%vTZXU$;W32Q +z5MD>9mh@aL!U}|&5w^;Djz<4+uJpmT8plwdMbJ>5K!_o|1Yre20wIO)EW#ARDFgz| +zVgwyw5MdN$dlB{{oIp@f)`k#67(n2$d0ZFjrZDal(gbXFApaV|gDBgJ&`JZj9nwIq +z4RH!_DmWl;Jox36-aeF7BX|+~9Haj9)a+ACmq7k?1S<{O2DIjQ7-uiiClHt?=EtIY +z5@kma8c^1U!2F#8{W}OJxE;!#MIaetBak{^;=NH|T?XvE2!4b%gvAItLN!7yf`-t5 +z(1@@Qfl_znBu&y>hyygAn!z*6$t32WBF*FR8s`3YZt?7+d%ni?9B+lps1TMumX#8k +z?MIA=mLcv&P>_C%V`cX2Da88`UPK^NyoC5i|MQ2xdJ+9D-sAeMmr8SE_$1N`c^m%K +z{p~3PCk*Qn{JtD<(~Y;SU4Q3oT5Q!FYkF6?>DE=7dv0I3e*Na24atqk|F%iHCAnsu +zo0cw%#o~(=YDS`UA$^Ye`Zo5izwMSaw|<_YUDs0An!i|eEk$nMq}{ZpZ}aMFDYj;n +zhU{m}Y$SQx+G{DgejSLA)UMmO{`L*mQhfcL*OJzk+?>=lZ%nSaZOv`BYO6MGT)$DX +z26YpLZgo>{a$WE3>yn#S^_&^mpmfuhm;8mB`oONX`K}GCtkT}~>#XF)^>-Rc(yrB- +z2WVrTmP9X{)ULeZ$`-Aq`O3EDE1NM)XB?m1{`rmFZt9A!aMSg-xoI5&c+l=xwQy)G_s>S(mDfp{Gz&62O@vEz=BXXL**|-#J$00u#RW27aviV~g-dp^$)0CF- +zDp*9K4Vt-TTQt?Ent=vH##l__cDt=!M2t54JJS!Jwiw!?5j+cKZ2WL-A;Q3k%+urkka?ItQq6@GYFgD+~O{QB2acY +z#QLVku3<|4NnSMyJDHw@i9e0_Ur44`xB~HO9D(k2L^}CrXE~4E20I%+4;{zfI*9=z +zs;H};r6QiEl;If+xHw82Wr#~OSW6r$a)}?YqBc@`b +zoUZF1V;XJ~HF5mBi6gmw^tnPDAA}ZS9Dh0^jvHoWQO}ZU;8>c6j!qLtjZ%3y%A^*>vFuaE5$`E^IP#t-hGV4-N2LHqK8p)+ +z{5JIn9QS=v90Oi~qyIk{j&^xmRDdJ>^Ec1I@qQD>sZWffA&+zZli|26bo~zAg_k4v +zOdR>KhxKFXYd^lcP#$l`XDhs~pPUiLgeQx7XsV+7x~!_g&HLIXyTrbBIUI%i+QIu; +zHutq-#(k~)QT8?KNxOdJGpg9WF8{YB+j-Uv2nV5H`JBPWGR8Uc+x_?)&G=d8%zq_a +z;5a%1jzoHCRy1)H#nJ66FJ&BO%OwKG5>-{~`q81ts)3`Tuzpl$z)>Q(D2}dASwFHq +zwByLD33Gk>n%1MLxngVde2da +zqmRl2j)9qREIS{L*scOc8<(OO +z{*7Y#H=dG`2GEx(vhZ_sxGJM2kDr#G0~R4IhHrv*vpoIC=l7X&#)e~e@AYC|H=*9b +z@dgt|_Gb!lJlCIDR)C{l$)Yd*9T9)ek7IdFxoMXhIC>mT;U`)+mOy^(c97HKbTW>v +z8F9RLKgW(E<7q!bx%W4dL5*w^gOJdcH7JNyRoyk>u<5XW=S=$g#vSy5i{r)u9NC{K#PM8zX2C__STd_b_=)cS;5goA!*OK+j_l7A;&`q<6S^oI +zq3;Bar5A{!;!%`8MR~keJ}Zwc1vs)lQ;6fa{>+?-?7kW1O_E-8_uYQzqbWsPI-)Q0$0kTQNv^pyF|kdh2P##!|KXW=ZxBi?J! +z=0e|VAWnEyD(=tB^seyL?e`16@CvkxnK<(P7WWkJX9{ubHt)@3d?}QNBOEAx=L%3X +z4@U=;=iyjU;}>>L!1M!4T~2XtMu~*Lu~d~^jHAp%^R5V79DX;Q!S63G2)~B1 +zkB=XQ5I?&-ei9s83*{01Od*c(Pk^I+UwchF=Y2wX{0e4j$m4hZV0eBK9B=Gevz-@# +z?Qa2j$^s`J~Kx)?j>9$ +z4r5<0!xx2+TbF9QyE+`j_w^0vlX0AnuXRQd!$UClb@BU&+Kb%Rh5pP;`}$?ynyt*u +zi+{Rr_D`tb`GgK?~;go$HTd>4RkJByw()umGD#puVv_ZgPeGxuh; +z^Lo~SB@dzs-x-~KpW%PxE6y4CGle)dnfKu`KEuwFM-0d~ss-mYq%IFfm-#+3%f!)% +zhkrYcup`Agm!cHMaUsTF9DTIJ#BogE2#sA7M{g-z6plQ99+Q8~2w2XdIDUJ#fnyN$ +zBLJK4DJ&e>pDDz#9{)_uIA=onIF`(WV@V#4C7x1oAC7Av?f3`y=64GHl?;7ZS@Y9KolMNBA>ma5V2J=9upaG7!&`N9fjK@(6n* +z4@c{Lrep>j6-kzj_riR61i9GP{Jk0DSPIL>z;W4marC+**TwAX3zf(H2?NLZ;IE?) +zNBA>^IC`J~4SDqB;|PH-j-!%?Bi{FgJVNe@%A@>yaAf +Date: Thu, 8 Feb 2018 06:54:42 +0100 +Subject: [PATCH] rk3399: add ddr v1.09, bl31 v1.12 and miniloader v1.09 + +--- + rk33/rk3399_bl31_v1.12.elf | Bin 0 -> 1120465 bytes + rk33/rk3399_ddr_800MHz_v1.09.bin | Bin 0 -> 69660 bytes + rk33/rk3399_miniloader_v1.09.bin | Bin 0 -> 72452 bytes + 3 files changed, 0 insertions(+), 0 deletions(-) + create mode 100644 rk33/rk3399_bl31_v1.12.elf + create mode 100644 rk33/rk3399_ddr_800MHz_v1.09.bin + create mode 100644 rk33/rk3399_miniloader_v1.09.bin + +diff --git a/rk33/rk3399_bl31_v1.12.elf b/rk33/rk3399_bl31_v1.12.elf +new file mode 100644 +index 0000000000000000000000000000000000000000..0c58011bad68470f88e109ff98a315df7e3cf601 +GIT binary patch +literal 1120465 +zcmeFaeSBTTb?-fUpCehege@J(wvYunM>60jKy2Cg1q|9p7QroU<0C1p+tT>x1**if +z#Wqdc;^L#1B<6$LYGb9i39XN0L$IH;aRW3yw=|Ytl9GnDt^_IfDYqQiByk#U%WFXi +zM9+84o_)0a0yj_Z{oKE{KOcGTwbtyJHNRQ2X3gx`b9UXj;iI-?DgU3XzOFpV``Q-JxP?M=5{vV-Ebxdo|^qzrUnBq11P_olwJLw%Rnw-(Pc|=W0dNrlZ^+bJX+J +zN8v@P4o^nrAO3ui8vX`<8=BN``X@EzefA=qM~6JuUt6C1@fDih2>tKJRh4q1x<;>F +z?^mo?-^4AC9{T34)8(Ux$KC_yqbUb{4fOWxI*q`zKUy=h3mq=I;i1c5foUi|Tae^NP>oDOK(!?!Et^ +znKV)IU+O0AzJJ2!y?5U?4!svq?i=map*JE{qqOzEPES8vuQF|uk;=xF_(YAZ>gPxs +zywRRK^xl0Z9{-o=>4hS1i65`|AA$RqxR){~$)}}OwNu7wsl)kYsKZ&Mo*J;!P*-uL +zt^3W7xU@=DL^)FpmdEcG{?VmwA89iDB~~wW)!5DMRn2PHjyhAL=J`=cw`7_7pOkAY +zadIO{-5~j%5dOYp?yI6twKL_HcSiW-P42(JZ*5uq{9swj#Qrk%8uAW#u6`EsgH7%k +ze||5xNOCkOwA2)fHXX;(-d_H5FWt#JRzOEYy)sV93D +zIJy0*Zp+KF_SayMRRwzC{u<<3=Pr5f#T(p{JQt0wetv&h@9We@>(w#`+0j+*(~{>} +z#~nQPvD{#7tLVP9pnIu2zuJ9*G~LR{J!h#S-Q}$l-Ac6$%&~IaS2|OlwdiZ`D>G^; +zGbfqLP_|&4c^w$fL90nLPu!x0>&u;~Gd!Oto5{y6C;jk^?wiyhN&6&dpXNaOw1}Mc +zc?G#e9TWFl5u+>Tg*^$+|s +z=%VH2POib1+p0-$lRPB7lrd~uja7ki{eE$wtzU%G0uQHIU|o;B)+u`nHm}?Ggvbuw +zbiU2UZ*hACD{R=e`7@Gkag(Yti{Mx&Kc69O{Qn4`-ic +z%qnxfmVNfh=N01@_S9rCZpm0T^6jx_` +zRzH6nSzhu|yS|nuFF);j_Z@#+Y~}sx-PQ2^_3jthh4oH<#QoQs&$p9NN%sNuKBM#T +z>OF#viRiAcjiBT4XX$tE?0QIapA`O^_dhfVU+N|Ji0*e|zkYi;^ixGYt)rjP@3k$9 +z9})i{c5|XJ)297*<`(xUbab8}{T(XiW8jT%D=snSdAtuAr(U~goU$8(wkB;F^jrS; +zcJ`v@&L7|MJf|E-kDW4}`8o(s#=RutUL@n>I#pthl~FlqOOc6fcOtXZFXZZ#-Ds=J +z3bMj;$n=PRqjF_j7GIUH%B3$K0oNlM*SvD;=^KgN#4h<}cQd%^bUUt$ +zSyd|M(Esz(3s?CVi%jxMsJf@=pXj#K +zlj)!CnCSV}^u*{wH8rw`aU`P-AE;APY1RDQ(S`KgMfjvTXR1zFzHd9yUr%0Dw)i&D +z|A^LGMcrlS-T$lccUm%z`^LN1tn_@sDcv{TyYFubdR0c9TvasF_Ex2udJ7%5$5d>4 +zv8veqsYUJk?aD3qnU2Xw6?kW2dE&(3epT_c_og47q8;VAV45>0ttOo&rYerUPa5)R +z(`i~%#S;5ftb2+0Y2nUY8>}6_|nE_B;ESR`B-J5?)TTK;WvKo +z(?@sRueLr;p5HB2?o0OkA9YSocP!vpiPgmR_n@zTzk@QGuyq^xE&A%kbdv6mNtact +zpYPoE`xEL8=b`wP#5?|T4i*4(+NKJ-_uEB*f2QBcWo>7w +zQvLozW7Bo3Jf6x)-ahuUU&Rvi+10PMCeeR?aam5V_1gbpd<9#<*vD3Ieg}M~0{EU; +z=HXjv@I6l5A8tW6gYnyTc>&}4rb}R)R_-5wapip;#?o#KiSO()_ +zu6gPyb)EiHe6`?Q0#E$V`(x>id+*~%b$`(@DKTKeDRx!7$n8eYEIQb)&P#1324o)5 +zwi|t=eHUt%kr|5%ZGJNf4$sxkgd_4C1e>PpnsGw{Xc +zeY@_8f#tzs9s4!YA3o%b0Y^rK|IDlzI~Lv3CGHCH4%XF=Ur*?Knsn^9nS31Tq{wTt +zQd@{qJDQ1~Rn`6)iBsj?iSDoQb^CfmRf%6wYPS2mcg5#>n6_ib_qV9wFLB+;RnmX& +zy&3su3@;zxZ8N;fe>#)yHw}+|p~sWDooZ`>`HeqsqQ5sj5JAT(wY8EyP=emXt#aS? +z0J_(gtJHGtlRUFLF7{E?s9roazWo!XNxyvY*z3!CHVh)CW>Ym@9u+h)zt=BPuHPnH>zR$?$D^7KV7EdTq##<#oB`oUYrJP;?vzT@#$z8by+djEunrVc&4Q+sbhN6 +z2Zm0FJbgi3Z;T4ai)l=j!HdDe;TU4jAx#k>%M`WDyk~Fz(Q@PYF9g*y%LAS +z%VcbyRT$fkYh5qatzYI|AE29_vt6iLw%pzD0lMk=+4;J~K1jFV7|wij=nd>t#)`~C +z&QxCJ1|@pVzQU$XUCf`ETNUP%^)gq_RA_8v3{fQ~YIfPmk12*mMcz|6V@EH>@QoF2 +zE&9iaMTip``zS~7+J3)U6sN51bH-|(#;s8{quR_yN78|Pm8=d +zjh+c(&-9Zav8C>FmF^kw(V~Y_;r7p3g_(jbc-$cm`iK)Sr#I +z-Pqy4u$pp86muo}aI%am?eE*%qqZ8>eSH1ywzJqn-pX!kv8X?O5`8+vR%K4S7>qtU +zXfOKg^z;pa*JLEx_%?j8wX@*i=hyN`VLo}ZR90-dQk%Z+ro3 +zFju&zsF(P8-(Fkf`ArM;eDr{NXQlL|F5#VC;1ZuNbimp7(;uXVUjOj*VD9Ma(J$*F +zL)GW&k)7|3UZBUQq{~;Ir^gB5T|y5ZhdA-9*xaPpB6Y`aiA_#{>65he)J1JPyvVJe +zOB)Lo`T1^Nu#F$_+E{!?ohn)*Z7g#SH5U1&y2a`>@x|g>x!-z@HWQq><5#-r_372! +zOfu5D;}0rT_uc$1=W7maAvVSQGNv|O=?<;YYlRQpD1MaoADO47zIvS+9+~G%H7oTa +z>Y?*1*kW0od**ud%+@jH#@$~=Px4~DBQyS&JSTbF{}Jzc16R>mbtH3dF-}UFc*`O^ +z-`mfe?+VHkoBUVi^f8VaJ$-0x^SBIU6AJ=K}#d?iO-)D+kX)oe{AF1;FU-YrI +z?|!6hW=ysYTVtPV!{;16VQ04;zb?DYIeTpU8>}HdVaBI^+Oj(z*W*LlcGfV5-5NJo +zo)B3!F=KbpgsZakZWJuj#m<^6ai6r|8A(@LukEgLj-$scyOjAq`pzP4XDq-&ZyVk@ +z*06)~)H-nTZ8Ac<_!kS*@UyhVKkz4gr?-4Y{wVEmh`-O;ls!HDDsu_t_38m) +zAW6?y=VDXth_b&UZTCB@w`kmIlX^VU_Zz(X_wJjS{}~^BSmNv9{u1|(sh`B%-~E1r +z`!M(WT9mtemU^<2_&y$0|0Hw%-ePPT+?H^itZyLpOs}T@l*f%dvv@LOTbc2vx=P$m +zo|k#maqL-im|ts6T}9msXp~H)T|pSW^;L<|7LZKSh4q +zi=C-&VT-|-{k{9Vd1(~;K8s)7rR*P_K#%S>@1GbX|Eqetj~4Yd9F;kzXOG7Y^?h^K +zP(SY&610W1lh|g9vS<_Q@H)wd`7dcskCM($Q;_4|{{?yHH+Q{C9tF9yZv!$v-8gHr +zN$GP+t+Ar~l_=wTjvb0P8z=0ZO%qb?MZV0r%C)QT5xrNrD!#=1MX=aRJJNO?as1AF +z@Hl{tk201>oLEo((w`&r>sIK+y$!1wf85Q)WQQ3)iQ6g~;7cCTXB(cWUoAZ8_iC-$ +z*7@GF9;bY46mh5YZ_zD&q5par-D-?(nZ@ok=;p1%v3_CJ*u*#OibtL&F4F66{um=; +zZen9{Dqa*=vo2Lr;s+S_*T@{^qVjsKcDt@L<>eQ4HinFTzs7<0Mybq^PdxrH%J%Pl-=zH#dNAIsX_h>hFKC@gyfOs$gXC$0 +z@y~I6@q+TdO8IHZ5q;9&@L31BCgD|NjYQCe*TPig?Aza{MKIM+ADnESs!}?AOB_~a`=q+6?_BZ^x=cV +z*^jbD_jk;<`|Zl_cs{RE`<-vXJ4mb>A?>5A+2tcq-mgXvkE-Z*zJbguKkoh#{^uVU +zmp{YR!|>$eQoqOWIf}7$j4@Sokvg@&Pvje2^`FPa@28z*ZAqC5#&6@O1S=fg_GNCSz9`>8HrC4J4?QlR@Q@2;seQlzbg9CSz?uRZ|6G>?No_9DEw9( +zWlZ9ePBFLomMSX!eswhWE%X>vtre}L8+*JZcZU2(TQT;yoogZA-%$30Jw*cLI);bUNbjP=oDtd0JLQmZ7cTT0n>et(yt@d>DJLiqjUtceqOWmypTW +zcNQED9uN$QvBwg|+1ZC5BVN6kSY`xUdyJS>*62n_lSeMH`{+x;A7R~C^pG`VDO=JX +z7o3^<@_uij*!NlTo8&qAKmElUlLh~mX)7651$$xv9R~_d`@#7Q?f;AAy;T8U;j_lo +z(Pi)ydIWsW(1xGKAH>mdSFL(&H*Lao>w2zTmU^`%d#&5DzFWuaUAyZabcorT<7!ye +z0M68@;WDl-*Q;TPH5#CW{~ENS99aheubB8QssGK?Tk707*Q;~q9Iwuu#a^A|S?v1N +zG=J*!hut&89f`4P-90ObAF-#jE$vZx*c)qnERG#g>?4ph1+hh0i|FQgKcDW*^==FE +zqQt@LU6ontZd`?K^fQU!&WVpDZNjn0>7xTK7C +z&+|m~+dRkL7|$FJJZD?kw(|Fr^Q>)W+ob*%K5s{}ZMy8LTPLu?obNOJIDr4B6{ +zuX7z@(Jo?9$Hbz%FK$n$%bEoL#ND;rmokE+TDdljtJ#uqfB} +z!B&-}*V+8_e|g{VpV(qm*>g32%zQWjwu#?9!Hd@1JO)?b;Vl)Ua3JVakpjN*Inq9MYaomJ2t%C-p~6jRkfUZS?iW@;Vs?~%)A$Q`j8C0YTHn2JvruAitmMw;!s18Qdv%&=YA_zdX>z_=S+pRyyR +zC+5sAl|JobJqp$*490@F;F6ClY=lPmp +z-#$LINZW_J_YwQJBnHoX#2uAbOfVQ*>i(L>psI0%vFBaJ?@|1`_?Z^wAhLEo$v%{I +zn||kLJ@u6RJ(M$}wb +z?>C5_nBREcd3fG?l(qkg6$L!!H|_v=wb{lxWpyZxy=Hs$+7>HD&V@H@6T?d>a5jagf{(*OUH`Tw6UBgV8d;0mn5B}A2(^^_yB(_JWIQrL7vFo#G362_bEFQduj!16X^PFbQJ6^_HV}y1%0#B +zwfo5xtm~lfk{j?rH@o+Ndtu)Ju}39y-4|JxmiYam@t9{vTg|i1a`$eY-6eA}Vi6g` +zZPvLb@r^I9+Fz4c+Fv8<7lMV@lk{H){2NqcPF%(3FyGqJN1T#jyt31blRLXok21$s +zr<+sww_F$P(UOk3w{BW|w1|AJBA-WfI~L7pW*(mfM=Q=+LOQ$6BK>C4z27`m>h$Fg +zs8jvVn>yuhbXS==$=Zp9eiCb(d3b+KQpQzuOrT!_dUWqBX_t6k+S6~N1kbBeH@F|8 +zU3fmmT%|FnllU{M%(qF#9rg`GpamCcn*{kbh>ex+$H%Fu1UMy?MY~#uI;o@e`wGnT&N18GLfVd95;LMdWBJz3pH6pVc}{pFcer0}?(?KSNICjh_}3YJntL+S`Q*vx8vh>tK0iJDgyCl*nYJs+-JC#H43>O<6dGo%|{1`hveRYe=qug +z+Y0e7g4=WWJ;lA(4&J(RaBP-$Rx*yBARX&HTl37x^gJc1ZjjhWaC-n=Pra(>j;T~M +zeyT?LWfgy!dH6W|lC-iT#0v)* +zuVpWvUWSeiwby^mkcnQfbSzHZ4D@ +zig&kVroOzbld`wlsx-kn^zEO%f1=a&{HowkMIJqKRK;2FlDaVGYW#cjkY^=td7gYr +z6>(%8{pXo?r#qw^!Bfhqqa5+M_fx*Slk#x&<|dgaa{>OOJ~D>*?*|1N9Y51Q+5g-W +zCtvaN(zkwxze@5R9&K`;`ot(8+UDKhC_lE2r#<{wUijl5U5 +zux#zu>1$H9+F`|{OuyfO?`h@`r)B+y@yKn-MD)6?_>-1*TlS`Zz#0eRi~8}vxWymz +z>z({r%z^#+h+j9U*9h(Whd;r7@c-JLXyZe)k&Gku$9R9h7*GQ4+CQ@|Y8~%{8!WX# +zjQ25l+i^DEOQLUwBbzO^7r+4Yi`xN2a$5GqCZNS8QhK?l71%p5(IDYyUgnw +zuN6JcOE=>ii^$8z*5G>jMEeY`;Bh1Yt}DP}g@^0uGa~nJ)%DW2W^Q)(fU9CHIF239 +zqs{cQU<<9WO&WaOMj!DX=lhLI>;9hiUhTX(O5OgMb!H3f`oN9vDGGh+{CZwG&nqs% +z!^8E&|3;oA7v*_=Y&vnJ8eYko20pvslT@@eRyS4{vpp=c%UyMJwcCY#$h#YxHl{D1 +zzOWC{w@-V0d%62m%Nk-Q`l7OQ|3ANV~nm +zj*VO7jsJaBYdGk*Ln{1ALAZ{;l3w+i&j$bXPU9Iwuq3+p`S)w$1a=iOeN3-lhZ&INi1Idv@1!^ng5KIGK7Ab$j! +zIu__G>4Wq^Y +z%@*iW$b(%bDK9`T +zmGT1g3RzdpwEci_*Ta1GcphEO^CQ)Q`R?&aU&mU(JV3_<^8meAFb~j61oHrWtzaIY +zmx4Jue5;_t(8cY(QFK6WUxyCSAwaX=MdRSh?+_gV^0ep>pnF7z0NrabcjVn%L5DpT +z_0%C6Z;R)uS9ZLbQmn?Fm$mF?|Sx7Xba`x +zP@tn84h6cz!=XU4r&Dk!(B&Qu1-gp1z{hr@gM7B?KM+@?d +zol8^SYXX?#_s+Nf7svzKOZatukvy=y0-Z-5q+do3#s&E~LGplq-0#nilSd*ze+7Av +zK7zbHAb%2hkUomMAs~MmdTD?jBYluQg?w2+{tWUU{VejPfc!M_ApIQjKpv!bB5w-FGsuJVAoAq_`EKZVfZjv;AU%XU5s(if +z57PUP*9YW}AP>@6 +ze+GGweinH{Kz}Jc9Jg)W0(zKZiU>zk<9gAb%BkkbV<+cR>D*%EcLL_ORyY +z#act-jIaJ!b6U@n-@%VC)^z%Q;$8d(V@rWn-dIzhquy9kpi8{5ra+f@V@-iBC&ovI +zE$ATQduC>Q_sXy0dB&PPzx-;RXKX3ZwNie7j!XFgda;xrpqEJb0s2~K#+E{UOGzK3 +zS0HC>DacnN57KLqGqx1u4)P$~ikz{gAYZTNGXAf3TL<^2oRq&$i{weu_Tckw{)nHT7RxzFhKDbG>pWADq=B&r=7j$0YA$ +zg;tD_4$mY^{>kqj8+XV*t+JwDF3rAK#XDqn-MF$={e{`oh51@vbtab9^$C_yrpu7^ +zQ+X$pF=gvDsS;V^vbJVew@=90q^va~XHE2o;F8F!b!AS*`sfk1RJsS*V;}oV?;WSu +zpH4$MZ++`>y}nfr7AM)aDDQh@z0X@m^w&tu+9vM~pGN1~O307&3cM}efk}S4{w8mk +zgLcA`IL!47et%vu*w}QooG!i3|1GQ62L!xBg+IkY0gBA9aTJ2sX +z_UB-K9m4>&hz>C7muM+#ew!oVO@0nF`c-I(S +zM!m!N5wiA;eHPM{kZx?1f_FuMHyhs3Re8#&F7W2SJF;pFUS)w-1~0oR18;7Dw-Da? +zRnn(t7kJh1oK*^5w7{!?w_{Zv-t;^8XRh^JWgUd}J$)QMDgN1hG08h%{5(Dq-s^VW +zqs2#R`eh^c>2pR-+iUqNM()$E8u^<^S$i2D)8heia_V4Hz9VZ8l%Mp=zjj@re0Z=b*@>WCRlQq5Gr1$9!MvhO`@{LCB(;Y^RPuB8H +zM()#h7)J!It6QPaal?$i5>oH}dyBZj7qn$DW^ +zK7G*0siT&&H&@%ePk+V8siT%3F>;@N(#XwPrhU|-N3di2X_J;d1pT@_X3}D_nm%RZ +zKK+c5W3yWRtdaZlX(NBGMfahsu_^H(%LHH3hZBAu>M`v@`S4!1drkXLo~G|Ma-Y7( +z$SF_D?=^Ct-eKfBX`}BGv-ynX(UpM7k3jEls|LOS=)-g|eYnZp?&|%#7V_F~fAPX&iMAPg` +z)^eX_zp|DK=Au7m%xJk!bKZrPQ-3Y5HZ=WsL@=&3>3uqG0W<9|Q9zsqYNtyEW#MqI0#uOnGaMcCEq8GIZR?eR{Ex+eW^`$bI@+ +zBVQ_*`|GA)jt+az)4}s)8W+C9)3^x^q7&Z$YTTsWLT@s1pT5J$rQRY>8@W&S7)`&KtQ|yR=_6a-TkDC+`fPQA69@4h|zGjzF;S9v&iYuK~} +zK6WWOIA$E}^nJhv<3sQP@Lsn!8XtnaYr4b8eR`9TWA9pihmreq+Q_kgE$=Zjlj5WR6r1$APMh?bWK4j!RJ#6G)tmXTR +z+@~Kg@+>w6=Dv+(@UagI=H57d#EQ$esI~5K>1zi~9`H2%xXB}7=&u;LPaiSzdLw_* +z$bI^#kvACm(}rGZ=rNPtr%xIAG9!P+$bI@*BX2VD(?;&o&l&l0BY(lr#0eu}QyJq6 +ze0tFM0^$TM-)-bRy~oIj6SRED$bEX)$oF}%lJD2kV0;T0%UUL5=@HBE{JO?;wecnJ +zG`-f04M{^gM()$CM&4rN>y6x}HyF8D%d|HddZS6-Vbc5bCL>Q7`5i{?(`h4bGx8oI +z_vv0EH*1;p-G*Lj(%)m!`}Dm=zRbvX7`adHH1Z}R<H+4;r~y%d~eJI&RYMG3kAJ +z$jB2$K5XPZz0b(&jr~bljvrYSR1k +z(?*^!@-ZX#=~G5tZ{*Jyxlcc9)bghy5blk`pTeN(!k^A%#BWJA9 +z@@oyv*rMsBCcRIuFmlEgEnjWqKE2k+8C$g6F>;@7HS+b|_@1E-vi>xuSPj3x8kWPl +z$#wrW{qR3=k3Ssh>%>3Hw_fqqoT@eJP=PhX{PgGBoTtCBjkTXS!8OD${?F-$Pes-6 +zZ_Q^f7vEAV^7YSx2=1r8p`s3JMwzz1{dd``=d4K=JGt+3Z?o^rK|jSc +z`0R1>Y~DOuw@+;yVUHngH*TrN+8ndCCizIde;LU4H23mtLYg|NXVt5Ufn&(*Upzq#7V@xA}h +zX42T~EA3)WY2wJuZZfK-d>T1>ZIzoWQB$(_RQ8=NuU4FWyZU)alUS=_@|@aP-Y#o^ +z$y!+-^414stxYZR)*~%-G$w8M9CcEQi7{kTXg;xwq*26e +zLR(cc>G}fq*8BiJaBl_j-No4^@?F&~yJ|~@HkS63y{)_Hqk7+PjklIdS+bTpB=xA@ +z?XSh2cs!!?n(j~{&wj@AjqdeJymL6@8|Gcr-kB~Xe5b+v)@Rt4t?hzyE|vK{)IZZD +zOWxLzDBlyPDt*5s$~wBY*Im=;s6HP>?p2=iCU+!`@{RdIEsGZA-tzBNQSNpB{>f-g +z&a&bg<-@WLo#xp@{z_M6Z*imAE;;{;vm)f197X$0Ql4`b--D0RZHljvcO}A0@+a%D +zdJY5MqrG)%vFms`=GO0P&A~6s(8;z~{ti=KNd)eQu%iUnROR+s@ +z@417vd!LpYy?P_=XEa^z$*+yN+cj1PTG#!Edb8N= +z*0kg0m!0Kq*7SOhzPrTzHBE2y=*6?$U)J;{k3KisZP#?KM-R_&KL-7zU(eQ3x38-; +z_w(>FTr?nR^{P +z-d{-DA5pz?-A?<~+!ATCZ*sZF5 +zmuG&Dzx()Gv$x9q)#fVqz8_V(*)!#?wIzMje>Tf^E^)psPe;^>c)5zz-J!PrQ2Z*s +z+AcX>lgwC)$a_e&#@wsPmopahSv|r_l<{5RzL*;qKHt;JK7GwEf&WU(t%2{5uYBXF +z^KdHN`S6-e88RN!myFdU2bEXGaHT%)ubDC)ATP;3A6ax*zDH;#f6XKBe56Ls3aIMj +zo1c8-^22{aovSN3|KWgo&6=9-kUkqPQ7gnBO%4<{IgA0Ge`E|l(wa-tpA($%B=JOo +zZ}F^5c3Vc3thC2I4{vmve6N^R)ho};J=o^mFI}0~VaF1xqA8+kWA&=KX_uT`sTReO +z<$at@ShpoZd{D2hXcAgINf~^jk*D9r?M*9HQ6_eVv-=XnMj6H>8IvfxFb2!mTrXoZ +zJY~k=An%Oivtve19W#)HuIfxk>M*wXBkr*3#CTO)RC)8#d1r(o?4-b(%?E?xp7) +zWkOxqq{}dAB>xuP=_ZXH$H7_hPJo?GM;S@dSYzex=h1TsI!b)SIM4TXR%3DEc+E>{ +z)~DjUuN=gmU-in)iPm$+ULWo4IoeO1T6WaMx>a%GXz${q3C;u|9(zr`>r>>%7@zxB +z&fU}fdLj0q9vL41pML)2oppD%!fnAusn8P882(``ooV^4&qhum9{!2O(=`@X=vRXW4ZFo)8* +zaFw#P-nAt$$xF)1+O#KFomU>Tw7)K|Wahpva9^mS_$)u)^_78qX?yE}e4z{Z&YrpN +z3*28i-$)@}$BwV;yC7dH@cjRuyt3pa{o}m4oBpBeepx`rz`f`gr_O%+X-plfpkpSo +zWMv=i6wKF(2J#BDk5x9qzhql+_PXdIWlDKcuGow&^NwmQv*7=L@uKzLkB!S&taovh +zu^`@?K3b<{ZOIVp+KdDAg%uJzoy7jSXx}W~-15zAqr_1sDT8nMI7c8eE;2b^L+%HV +zwOo*PAdpsM3HplzuQ{t;OY(i8{#MUFhk8pZv7me-`z;;Y%G^%${XBg`=3X+_I(LEY +zd17i$_Y!?hkoY;J7_Vp3ud%`N`ZayJg}%*RiYloivF1f}%yWjPd>b67=N!MD@;&N> +z^$eyrb=B!Ftn2X~Pj~!xVtVaA-WkyTq?6x)NidHSe;wqDPf7Z+u|-F%xn8?-?)r}` +ze2e&sxb_pR+Am0-5`Wrf`mGujhxqVoOV!0nZI*piYmFRNo?kq@P{J5 +zTE+r=d%Pdtx)|Tuf^Yp>&cB~lMV}hz?K+xfT<+$#69#(g3;uNk-Nc8F;LF9g +zTdKc}dG|K$$KfAW_z(QQ{ML$$6LxiWn;vJh3|}VW56?)yXN=J@g=`Feu8=XO@%9uI +zd*85UZppNLg0+eFI5ScFs`ymS9m~mH8W|HSxlc>Xa>so4uNHfIY=m$5{OAJr2>iWX +zOgW@73*4`0TE}ris(PXOIP~@+9m5R`&$%L|jx2PC=Umn_3jac1u1c75p+h1671i!O +z(g{Bujl|yQ<#{C^lFZJYQi`=c6UhUDGfBKu6c09VO*8QZW*L(DnweFpo-ssWJ6>g`d +zH+l36SGd2f>0XcCbfx<%&|*_E=gShK{Y#^N*4T;1+c+;Q_TBSgcUgH;Cu!r*>T2)oAB*b< +z*lQmcRod1iw!$phveG8`C$>qxDq+%d29eNuZVhkJ%Cb&%?2x1t9~9I$?ra>s7r +ztipQnxmhnyp3l;czWzhjU*KEhsmp>dY5lpog)GCFAX-0vU!2in@{jmk5~D|OjjNsd +zZ|4k)?F$@N%J?(NkbPgy_I+)gS39|}C%&;w<^r;hP2S1>v5^PQRZyJG5KU*>Y|dv; +znXc42&S>bNti|+;LGWZ9Ea$x1oLYvw1J +z=?mOjzc<6zeH`1H9GKN4`T4Zvc;#Wk(kK +zi|_V$lLI9>{~5Yi)BZY()$xltm1R$$?BV1Yzy2D3_6zp&H-;^r5ZlKFMA!Vlye5Zh +zKWlBmPX_Ka|MCFe+-p8-Plfd6Uh^3x;$aoVcPpt#Al2v*(}yU``}An3HTOkpH@+Tjw27!^h>KaAYXz!NMDN_zg);~De@q_0{QHK +zd^PeQy%zbLfZRbIq+40HMfXIS^VYEA2F8A&~8Z`3>}vDUiY_|g8YUVAiiuI(gav|wzJr`Wpq +z9%&oD47vC7*Y_sxc&j=upFaGH*PhH<$V=L2RNAa+o$mYEhTv;n^$gEOcg?Gv;RW^g +zb#EaaZNZ1sUr?^Ezu1+dvTf3Sl;38jy?w#Hz3F%eo4iPFcv_AvUnDm?EvG+RBsV-Q +zr!R?IaFV^a+Gf!O``+f;veU&Fh2sDB|A27(@*Ihnyww +z2DT${)+D}Hd{veDvsfi%t0>CrRWlfwtl2b*VOsD&--^abN@|7PjR>HHa +zz}(oRpZuxkqgAn=cP1wJWelzJo8`;k2ks?LsmJ7iw+B3{GHw6lmu1hC^;^_wKW7=N +zh27Z|{>7xBLJ@8sMJ23-a*34L=OAST`Yxa}x +zfULn*s?1?MEv2I#YO4EYl7 +zrLCoXIKy*mhWm`%(^hHj73brKzCsVI?(<}U%J1>BK;)k6Qp+}{qFPA3ocRc5Ns0ES7J)RNMgzXu02C) +z(SGv3GdfW7DA*k1H@0@8ukgCz*FlyQO}d+Gh{8Mb?(L +zTW=lPrfN&tB~N}g@$_hVf!nfHe*e$Tb<3| +z*$3|Gbdmc>{DG`l$7v5Ai|NR$f9liEdGE8Pcz-4964@`YPXRpSY`oDgIk_KmUah>} +z`pNd9LpHI)0eCk1Wu)))lYasXt@XTrqHXH9I^7FgdCnT-%wyWVi!^l`c+Z7gr{!MK +zs15wKq#Pp7QMn@nw)@wd +zft%g0=f*1*a30RWicH%Vn1}FAp=|+eypX^7{7prw8*9}_TW3^NSCE$9lKKMk +z@L;-kSbML{WZOhP3wx-GSX)MKwMf3tdHgo+ADLHS(T}q8^lzD#z8sHo3|UF(x#%pGn@aez +zO2@FRyAIrv8d;Rgjfo#vTONbY8DT1SkiU`AWX^#f<-K|KZ#h>%soOIS=eL5Xyhk_= +zh9h4k#{9CD>HNgk2rYS}_co_So}f**&!VG>bJijElBeXY$X7X5qa$e#G^e@-Zb|iY +zqYrrwNc#$ZfIPnLpiTgy=w>M}Fe4*26h~mA9m_-*Iw1dv8vGM?2?sHIBSZ +zdP(ymu5qiev;CHolp*!7SToH23vI@EgepEz6HhB$pKM(+H}Zy)8*NBp*Q&Aejhj=O +z@eM8fPM18}dG==VAV1a>(M{_-I^pRiSl>$7iPkx>ESO2zqFYb*&8d<5q&<1Am*0$b +z(CME&y*qi&m;Faq)a?7B=a(-|E!Je;B+v +zigo)5UfH+BR_McjgslkX?W?`|{(!Qk(d~|EY!y9!!ae$SuJh!b2UexB1Ib*mQ{0$- +zVpWR1=k)`PPm#8%&hAy@`mqp*sfrfz$PpUo19pgx|%%hI=M1+T-uI& +zu2Myf--LJPz{-@=S$KYpm=y6x~%9QYhcaS{p +zT(>fH3jRTOgYf#mr>9bMRk{tu7JS`$CRU_IZZr6AD2s`0iO$*EvB8r~y1!e|WMlf| +zij>%E_9fcoUrd`kvBGPUb>{gy@RjEIR{B`_iKbK^V@rZHaZBo>ymjdee!9*n-l`Y} +z`j%&EitvwGzGGfY%8>Pqo`I&+oy(h2qc`#UUs7lMn6L9lB$>pePwCNSHT4*6@Yp(i9(`jAvACT7{@6M>!?>#P;B6j10spRb +z*QXBN#+iyYIa7}|bDq4HxAup8qsmX(i=VpD*bi;9-u7&2;>J|V>N?Ywo3iEi14bx2djKB^ZzsG_=pk0Cb-}O4E>t5OTE97~QdiQgd +zcnf|}_BV-K%1fK_+D&=e`}fy$?rlnKUr_DUt0xxQZmY)Sl+{jIqNm{3wbIG`I?t-w +z^7gKY>r*{XT%Xdq-BD7|ZRDi*WN-i@&sW*Te_x-{?MojL%re9Q{p4?-dY~<_lXv&+ +z*K4~|#JVGtmuGC3G2D-b?GjZXF{e|Nsp&d-t)z{`qfV)mAFX2Ea|iJYekI{V8^MvW +z0L(fT6!gjxyX-~x&KrqoGIO^|jBn943Y(SjtCu#ih}C4SWmTz^Emvag?(S<-Y4TFo +zyoJpR_MPM}F-RTxJR@z(_$+zIoI~-f#9hKuJm1N))w5K^ng*xhsd}d(f&YJ-tN60- +za!r%haehBi&ILV+jl2!cmxIX{`0YxGfqp;?w1^n!-nb)vXRnD$3_ma +zbT{k4>%2IIHp->fogc%biE|`|86`%s$UBj)h$R+R>G4q0jO_`ha)$1)8AI*HQDPU# +zFH1b4buuxG#5G#CIBAGu{IRNMxfjdG_@UD~$cbSRypxvqj}n{sX(e8f_(WnBiBTlh +z&~eLzH~x2?lq-3gc%_T@C@we$LfOxz)6S#DyMX~uJjQ+#}gZKV9phMAZ~=Ym`oSJkm*ApktgTR;GH0Wv=2G=@Wi@&`De&?W=8;JQR7vq5XI!De=tmRjEgbXAbU9 +z=I%PX(u|8z4-;!uUL0$U5XX#p`s(_Qk>_3QD^otN$d9jNW +zVg;+Q51zy?Jp;rdJFRw&`vEU5$r7iG+-_o(y(U(9$+V}L18MtRM-0?%_{6q_HX!~P +zS?9Mu{=xCuIT+g)%sUi6wqfoXUHV8(=k}(Q#32&LNE{Lu-HBx=x3P!#M(`Y& +zWy)Y);QN4{2Fi{Y{=HWgbdq=`7|Y0+vzLlx{+;tc?wYvn17n%=$s37jdH1&B%61FA +zB#!mxARet^^{w)|^y;EG=1`2^P0_JPNgx)nwVn>?f0kHeCAz;~EOIk4iG41PMNGU* +z-1C01$c;R!gk@m&^wsC_4WAknIHTwoKIc(yMX*xIi8h(#n0k@2(h +z>~*@Wex^9&iT_$0vK77kIHZ^J+9eK2&sI0g#2PAQr7w;(*3X`aHGaq$?h91kPeY*YpH4MS6h;cVd-Vz&l +z<8D!5j_x3r*uak?-X*TF;6;h^6U+r={9eiW*`?y*KgEtOjEnyY-i2}Tuk(CeAYS9Q +zY8Fbo_Lp)c-ufz6KlaLTe_>qpkgck|^wW=P+vq%7mpVwCX5V{d`_l)UoXijE(Xnfy +z&a)@!CsEICy7u}!Yz$k{wokiBOf7NoC~>!}t1e*uHy^2O`~`HE-|IL~*TQ$swah)3 +zYY>ljoey!mnCGQm5Nj3E5HBaxe2>PL +zC5S)$vSkj?CS{*pDqPNU_7W4eOfw|8u(0vhg +z`~HZT^9-20>GKI}%+Gr*dh{()sb=On=W0~P0d$!J(*t_06KTAXd=7x^2{YFbS)Shp +zm$}YW$S$;@uI-Cb(%wEs@wj4cv_QA1wAH_I-b&Z@8dFd9FrtgJx6C2>$*-$>M&|1& +zeK@;7-O$xulX{!8=ZA^yr9UXpGPS)Z3QEv(tM$eii!s+dh$b%x)EB7OJC1v;(l*Os|f=gI1nq}{*Q +z+Umqrg+18M`W}GQqqt&!H)*oOXI?t-&t5v4c&AUN<5}agdzR1SFVALpwsYNrl*RzNmN}->N$U$% +z{9Z?6x?w@;26z^ENsON8@#Yp5JeeB^U*_2f>ZWv)v0e1V>~ +zj^Ga+p7-NQhdjF~7o=qU^g_POGlUme&6!4gA0_kO4A(gCQ@}vmS~{{IHOjp1BAtjK +zG>_O?$`?I5+pALdt*bII8S%?vZyi|X*zz0a=?K3u6!GTr>06xKG{2XA_MfLa+WGxo +zSyxy521){7xqlwtJ^f(1Bg_13jNd>PUmf(d{FZ|DwYPCC_|TIxK2+_f(|)vG>iz_L +z`d?BoH8zkG{yN`}dTlN^IUnFhf5Q1fKZ_q-MW4Ock4n3FHgusMWsiTrk46fPP(R|IN{HPZbi4FbC +zel+p{el${jz8~Ftp&wmDjQg|t(K7813x0I(!k^KP+A%xr`BCwqee@NZ^$Neg^ikJN +z-GA__=+X(@UAgc)pV@gpe4fAdU84P-^gr>VIzN1;%=6@V$**T%#&0I@H8W)}2Oy33 +z%&xr)QhvXUlScfi^wT)HD8{1s4!-p4{0n?(Y{o|xd})m?*W%gq8}n161%E2-eW5?4 +zj*j8sOD(Cl@w;6U^F1H?U-hLYDf?&jrOWZ94ZbgBejEK?`_cpW((HaG_gO2`HcDJk +ziVe%UQ+9wcxQO@e<g<>y_Ex#(!>F*q(h*<&FgW +z`82;FC;oi$%#1&;y1<{y@AgUT%x|qMOuzN<)Ya)sEUHSpaa$G7d2E0-U@bt~2=m=$ +z*7B`ai&L^s?B|xVhnw$YqO8|8(7rFTUOQNFqNbtrRLxyws^XI`M;CST{=L~^4?_9p +zYKn($Om$M<&E#>C=ezGNi#70$|0K^A4>hGO<~3e|S6|>Ic=otFTRtll87fX47klBm +z5Q$%f-x;7gp*=Z%UM&d7JzC@ma6fk~)}1akWkh40%)!>dm;6Nj*nLj!B^BAyFX>K4 +zy>$1?k9Eea#z?v7V9Hf +zXiG`G>Uiw8o!lqc`|~Xox&0;P42#{tnyP!6QxBk9e(EVzwxbbr~YgNd6`Yz~?2I!AMUmc*YhAz(DnEJMIav%E5+SmhX +zcH_4d?L``&o=ut`(#AghL)zoph8`sSDd@%MJbUcMlwY4g6)7DckG`S4n$5j)wl2nZ +zbQ8A^VE+T;$9i^qH*%lX4R2k5UI*P^X!2@Y3>`gkV`@OjGf~|K2bA!dF2QTO1h2lp +zlRntTvyrjJRCKHJe?8ncNcr41 +za3Aa^BlA^9Wbts@S(V+^jX&w8pNRh~A#R=&N-pc{cI;7X6O=v7M0z(M8^!AQxFD^Q8!T*xz6dS)qp8_;`NX +zHkk5i&(^X@zGIsG>a5gR)&mAfvtP~LqJ7uKB7D_s?MH~sJEY$>M;B~6&bz*m+nuRs +z`P$TnTCaH!e=>fkV)lcwp0JEG%kJ7ZvFwu#NAbO`(7PP<+Ol6Njx7Tp_f=IPWhBr! +zf!|8-4Qc|N6YT4i{3EBYNd16)KwA>Lr^3b(YL501mZUedMfyqF*{3JPrv&KZ(4FL! +zpdTez-|eK_$m#hhb^0xfa)>;anQ9q7P!raNwDovNF*{0+vk&6%>T +zo%qh#6Vn}=56;`#$9;lz*I{G{bY?7Sm%VzE-H18rTxGmr%D;Bll|6uUoZJeyX~xPA1PKVGuUpu +zV(-^0$6g;`f4=@bPV6AVeVp|DT;(@Sr9AnjPQ}+xwCq?IQ~XA^#HluCf{0vXqtmli +z_BT-%{%p>niSQ@9mHgc{?^uuupDlhQ4I?cs-X?kIw5)T< +zUc>?6!+XEHI_aY$#U(4T%kdWKl%!7e=-5Xc5`nrT&?&K$?~j)9PQ%DFZ%3t`W6HVU +zl3sWt)ALr!S@iwrRFsy +zi8%x-zfRH?(hkgF^uBlb{Z6q>*|RD8F1NEsd6GUWdo2|{e@7SZ_P=;*PWEA1rPhNt +zu>Y}6&EJw|t^Myf8%BP=J;R=67VL-mPAqZ9?pI&Bfo~1u_kbVZ+_$%pAB#n|_U+@m +zbbiOSsM*QgMa+S|+r;kcRMD0(e9_D7btQJM=tu7s#=sWhvwn13oSmCWu;6mZ>tjKJfOjA%bOCM +zb1oR=#M`C<{@t~quw3%B9b_^1JVX +zvEXknO|FUG%brQjaFM*bOK#1{KIKRcF#>gp^m3(Mk-NE4x5zzQDLZm6*D9_%xYlyr +z$u-V3gWuc09%uaV*e|M%`VQ=Kkh5Dhaox@J4z7E+rnwGr?cqAiwU_HYu6J{NMB!iA +zOUt_g(ItPomtX!Dcn?b3i=KRkI?f!{Yi)_tGI>*{dz8wkVY|f}k(5|z&TF|q&^6f>N?43H!HNsWO +zn&jR>Z(Z)b|I6iqlP>p>|I6jlF1p<8#pTMk=YliqU>fJS;B+aR`)G#**cBreoTFSV +zXq#)FV4CIKIrxg5&O%-a?^>>N?{sp1#C6V!Zo&%3XH3(q}_)p79!f3w_}*brC%Wo04myD>$EREx)5n{}9{TZ{no=*m;tC1dF;> +z#ukV9j9|kWvQO7-RJpnimFp(2@3H4wo=NX^a_LR9%O0+Ga2?{B#=lhajggF5__&O@ +zZ`oPi-okqX3!Xzc3FriL3+vx;{`yuic9wt@&voIG6!&R-mHa0C@JBaJ+>75CLFX3U +zp%GiOOB#`X8hsuvzJKDM?S&7@Zzd1h_fI@$S3Q_7c5-*T!G5)!&fY%!=1Vcfo_T&d +zFrAI@{FkWjP=aq$#D`ms_nrJ(#VYswT*~I#Bz}jUH7~{-Ba?e8IdhIeU*KMTw<1q` +zH2Gk($s(N^`>d|N#Z~H~r~_kFO!81;Ul_Oe6MQa|Sq<1A_ytg +zB95%b|N7q)oB((Erl2Y^*tP%+tI&}+Soa|d{*QUCPWHZ*@!bu6A(6$8Zm4Q^;@%$a +zGwf^o40ZZ0?UN*b*@tB@UMDHD-!8cXuly3c>Wg`?OXL^3M1HYL`wH(8XLw3=dz5qC#maU +z#@}w<7dZ*Bn~44%BVNv)$}9h@Ey5mPvDaeKom7!I-RK#SHsdS`@reh@sY7C{MxM)3 +z*7wlAlQI8Mk1gJ=7AH%kT{C>Imd+IG`lNN7+`{)u$wToH +z^BzsfLdXId^ +zCGo$+s;6I@8876!t>8G3V4U#rl6uM9sQDhXwTpIZA-3Jk_$h7ZY)TwW|9|Ygdt6o5 +zng74`J_raVBA^l^vJYy4Y2#@w{NB&r=fDBUWq#k^U%%Jl +z^*XG**X3Eyde&z>>silQd+&qvk?8A#qq=e%-SZn37}(3buMuAr^7Iob<{6Q#j0d3? +z|9$udXf=Xgv6V&Mp%m3T9-XXa^E~3^%zdO!P!sI&p;28|^DWp=I)1{-v85Bi0DA1C +zY1DS7DCRKc>U4=?oH0)0+wgtLHBd)@a_h18L#$n@7E=fM-JqO2_ZgyH@?58v_Edry +zS+i7vGY{((#dvh%a-F#Mk#)@H@bP`_cZ&qGg3s7|C(i?m%tYRT;rIBS(HEH;L)Zrn +z4a!K{Gk9jsyL9atvK7b5k@4F}^PGRTEv;E@xkmsCZ&oT?&;=`18+$nq_(uPX>AG~AZ +znD{*^Sf4gvcVVkcs=$X*LMZ3iW3rb$e;=5vSS=WsVPBb{T0-W5o~G&0bM1m2XMC?* +zdq&P}^d+@s2NoMeyu;)e=M(KO{TsZNQNP;PV_xCt*$X1WKpA>T@*syY$p#pn}#D|8*&$e%r`0nBH3+)9GuO4vdoW?eE?3$2i +z&vNJwk593$ap(_^Pq(Kz^xgP#NijOvb}sROZ`|3X8aaonl4l3LF|jMqeh2q*#$U}2 +zv`-l5x0uhVgm>nO-)SoEd=Xiii*7#CG}9>p{I)`iHVaHb?bwj7iG~@2ah+PzS&wOL@{SNVM +zIQcV4kH60%JufajhkNztV15hiC%!e`i!977Uvk>z39LVpcMv`{{h8CYyq37OttmT` +z_szk!P5BmWW2{Nr^1_t4KX+Z;lZ1EQaYmJwpHZ~W`dd|`_!f+`RWO`)lzZA{T?@wf +z28_fx_cPH&@%M8{=X)>%>4l`n-!CFPFD~6DW9HCc{-v&e$IO>=VXD(iGn>(?=q~eo +zH@Zvw2toW8UY?Er5d9>6l3etfvJPbLWq*isE#=}{$i>!{=NSJ;9#nnFxD3xX%wcsK5)o=mNZ(ap$>iH?U +zCyajip6Q;!`5-UkJew`|_)$7v#-AcSCUYk5GJt=c+3Ea4x@u`OIiGYr&q^1J+OfCZ +z=&IafbgjZxX)R6Mfo|{Vkn1~=clfw=;y0)42yo5*Qh96Bm>nUmACc=rm+v^mb(o); +zx$ltp7Fz#4VaLPp)lGeYT?TvCDpQeumgh}gC$yC3u$T6E!!zYwX@$o93F{QLLIrsP +zUoo(cIrp}l_TlRYFBJLj%SPsN!>fsV$MwDE;_pz@FL};VSBQ6bfx`ls1LfV0GXHs1 +z_Uwu`SeHim3B2K>j~Um*RezjmyNN#t8)}ew0-j{M4=Q`63+L@P}vyOLBrkCPxF4ybg!f*lom`OK1h5YGTgt%Shte)ji#OZFK0cB%pWCQ_06y= +z;OXH#vQPZe>=(u)rkd;T*`4%%jpcc$l-kY9(f9W!ue-*2G`loMt*c!~+wRYtRLW1< +zQoCApy-B%JuJaM&CIg#HCh09(u%~~h#9n`}d +z@>AMpsE!WaqLbsQfY*r@gBvZxUB5z6I_r-qjGOhhO-s+=fnrhR8|!EYU~5Zy*g?8#c3F +z`xR-|>FnHm`q6qgyR|HNM_`xg>VPJ=FWa|=JwNiwzF&;K7yA8~V3+iYJ;;jt)|vS5 +zsKblyKfry6w7@r@y_P&p*rxCx^_$fHl$^tW=Eetkmg-Td|5SF>8q1O|C9;+v(Yrs9bv9z4JrO6$uDu; +zlKwU}s^}BZ9q2WoEqbF*^hY=PgD^lo@$cp0Hx+wU^b0zwypQ-~;)Ra*u0n(|R(*t` +zV=ThJ@5KftOhKMU_mu@$=ZJ3ECpv_&D19S1k^b46&HBOVC-lMPqF+3dM5n}bhc~J_ +zDiWbZyumqI(H&A=^oLVc{V-j|f#{j4bm9mrCa~`h-}~O&H-Jftc#(%fzYXH!`E0Q- +zN5NlEc+SHY1?@h;CiO`^FFrDmQb11gl=4(1<3U&%S8RmAZ|%mUHVeO#A<(VFF|>%nX_scDZn +z>3MjgOj%6-1Ub*Lmp$%{)+5;)7pksO?){AQQpTCOzNyTjKiJ1ftyoMuqT@W)AC-5+ +z`s2myK$*z$McOsG)`C`Ro@Ylew9nCHLO&RbTdleTdm(H|k(U8K7Ue|NKHl3rC~Iim +zML+WW1L-drSR@FN2Xuu3z5A`z$U=<9!$sw}du}u9Ch9K8nxu5VRTZ +z8|%>xyU-2T1AD(hTxfrGU^Du58+21LT|J|Cp|l{Eq%&EXCrwCH?KF{z5nT&|mpcy%peE +zbef~b&}VJj``{I0D>Jumo*VBgcHYaA+dXeb8|5tM$$Mj^O(}#S!eqh#q3Aas>7w5P +zghTWjc9`h0K%5;G)01tqRqB;;7NL|AdVvez4;?6&eUdf_hL;n*32nic=t8ltWPaU? +zZVM!GPrTS#5A8{sBzD%D{K7&j1zbmU>pt=et%uPCLMIu!MQDgVmGiQa_5$~k=ES2L +zL+C|`e=|NF-6wp$#@Ub;&=tjmQwjUAz4j5m;VSlzt$o=W3RG9}=+oI%=&()c?3v*E +zteDL?tXtV1LWema^SkI@c}KjWjnc2)nIYa$%%0Iy;@CF~yzT4q=BwM3%9$;F+D9Fa +zpz}n($$as^Rjz*Pgzsk3M8A1?H|FZm&u3#dIJRsB@qQzL=|EXux?>#La`~wd+bu3#@zO)IxU(O)oDxNBc{`;&@WYw!UsHvJ`?>UYpM-@O&sg0c%26J +zZmM=S`TCg(QBLQ`JwAJHqmcS^GyzPT-9l4DNpKj!;>oV +znGSY>gjFv{z4YpZdFLhukk4~rdJO#NQ!ejtkV +zif55IbFGxE{+U}g&`F4{6uJ`c;PdZ^0|P_izAODWYEnzoZV-FS$@`D+_o~oR;{yMs +zx>{0BXE*+k^VRTP`5&t57o69P>C@Zr!-+mMM8>TDWbL<$_sEH@Ci+x#X>JIc7=3zn +zVrzD5LBftr=!kCeH%YtDowAk+%%(nMQHc%|yzPCP{V{MYdbS?ZQb +z_%9_Cj0-K%Wj?u&(Gi^uoe*+j4V@|L$+u))jM6ZP7aFIdG@QCABk@AZDT_a-5_;>T +zd}o^TZj3;*{OM@uBXSp|bQLrt13yvTmJ%oB1hp@cp*_@2UO;th15 +z_zH}KD`z`%9z4n3o$zZU)jsK1I%4P>`;T}=VYAk$L^Q$zl?Uf +zdiW>VqK6z^d^ux$GS61iw-2BLWR7gwHF@1rq{}=ebL4WBnHo&~Nw&<9LNAy|eOw2# +z<*csg@t-(r0;xynihZt#lez+V=p`wKJcPzx=Di>~J$My1WdUi#$z13qPVDxlxIf7} +za)7WZMSK@O$=*oWr>uu~N200?$$U`i>XbHY$PMY(`gedKbc@V4706N17LlKW-{r1f +zMC@UiuL596@w{vx-LMV$IuXD$jcpUQlcFeOwb +zauZn{koEJId7gl{aqy79w>(}m6KW;jfeDx9tD5NA;!DB%a2ivYw+@&IlSU!`hnP>C +zwVO&xO`#s1?MdB7T{5SgqrK7}GM7Gr?)EZ&RcuBU+uXIjtYfB+UXl8@v?pA^x*;0t0ov-(wFWUe@tzv^%!<`LTv)HYwMY__NcDf*+!R~ +zVXnE#;A}^7ZO!#Y*VW#Kvo~fNT^sZGl^U#%PVqj=DRg}XIQffVzT{$10A@g4%`NY?<;ShZQy}$!A-s2eC0}`LGN+|4AIZMy5o_kkpYbS5jT)Sh8 +zYMFRYwfHET@e3dR-Hd{=GyPAzkG~jQ^_bMhsqR`$%yu>M0{3_4sKM~tk`*}LwU4oXi)DwyM*}YRwJNvJH +z$WW1a$U)wfEAo9`LhPb9UUuK7$=bLloY$S*ma8HSdpw7OrE{AdzDl$0h7?b;tSe}D +z!B+TDe9Q41XEWP!+3O?j4;j9Q+x{ONy^^zi4nByB$A+xSMIO`LJ~$?FmG%T*OtMeo +z^Yn%m+Da|7lj#F#L!K|2caNz8!G@1BGbQ{yi|ETSzAo=nA8Qu({EOSpA9m!TV;p(Y +zwi@sfHbd!I^j{wPMn3wKUwJ9`^}|O#`x5W7FD&!})P;T1qo_~z87yTUHo?5Smn)OK +zBk9|}cg|yG@IEp(zLR^!b*#@_9{#C=^QWChs5i!k$XsNMEpXi5IJy25ZO8A_(@32y +z$aQ~0D7|5iad_Y6hKpyxuJp|xJPDmYhra9!!}GkaZ=Q2ep1B{CvAg#x?Ui=IM~`De +zK(~)Fvac@k^U@yn6)w8Go$MGU|G{w?SY)4LF7f``B3t=xw2y+Vl9w0vTI&NB2gl{f +zj^d&HH>7+iJ|L&OwaES^HHi%(bh>Y_cR{C}u_v^8q1Dd5w9qrw=fT(M=vmtDJNr;F9^@>* +zI>zMf{GL0#&~7-r$d>cVC(VrW4NZzqr^wCwAjUH`*$6qrIMb +z_wG^e{xnII)6XyOlD=+VXq#!y-V@(P%j{er`rwmgXUfU@!Jmrl-ff=9c>1w>+mgtM +zx9>Y+sI0&7@$TL{&N!+~y9;xbS^FYqRQw~#U^^2&ZX_9qrfdMV>e +z-ckD)ZU6euyoFwT_8(!>J(s9#kx3ih&JmlHG5n6=`-w}S{SRMtza2YsXKc_f?|BkC#U={#&DbeIr?0h4g^tzd8mg8tSssYH_hFN&xcd_BeP*a< +ze60R}$2QOlr^cv=k&KQ&=XdiB*FfsyJ*W6?Yj|Ay1@ZG($oMs-B9bO!MtDE#NiI;k +zIcp66eS3Y+226#lGCE^AH8y?}bDQwK9N$0XWS)5k9rljU2=cwh)6D1IEu34nJodjs +zOUBOk5@jy{p<~o0!PXA3(%NPJIqpd&+=7MrN2m=Ic{-p +zUwB_SXUS4R?0J^*+@<0L?+3R-ar1M

ocLywJz*0C2`**IW466W9(I_{VuTpiMNwM|rqf +z8*hYrczCu}Xyo-S!aT3iZ1r~(_p+jKo}jM3=HY;rYovXPhpRQW5&jhq&(=6kaK7{l +z3WL8t<1U@!tw_^$xlvUEXA>nD#&B?g&0T87(44XE`~maMW&&D +zll<;QnOhUs_BNc;(fL*{U_-~~&IIPRIAQyNzDBlUA?ULz-E6I7WewKj0oXGnx|*52 +z#CqJKSwBE{RUX2U&-#HLJ~D94^hTuX0=@9;CQ{8r24?7)Ovrdd#ZP%+a7VuFo +zuNm^A1$ILTmYs+0Tejq&4fag;+QNt0?Fl>XwJ8+|39R&GXSVCURHfp6yHfE$u2S($ +zw^H${GB%}M8IN~D%6^<*k&Vb6`BhK*CQCh?d5kr}WOsyqcYw{T)5gNxtJGT-v#Y2e!|av +z7BCiey$Aj1O7sg#LwF1}I^^$>LS?*e#g(cJV?iHZnW_YT2r`?Y9jkQs0S0;gIr5}) +zW#Uih575)2e}^ro5B7-!_p&TsQ<;_9ZqYg4g>~yJ5~6c^yk6!kX~LPkf8%K0_nW}K +zra9HV#%;8{1|Y6=K} +z{{Y)wsgjO5KR0U6bAUZmDbCRju+uZu{isW<{U4owCctJ@Qa@jBgZ?-6T!3`D{QQ#U +z%5LbwkpA0aSbZ4%{DpaJM^~Cs@!K?}9=wO`U}Uof`=(CdfS!Igbm}DQ9x}pgL%RA+ +z_&XDoir>L@^9A@RzFowZr>m_L?@%iK#lh4W;Js4V>3PP$`?|n;JYBtu@H|SzyB?XGIcfKj8Q6f!liOnz$LoazBKh#ii2I~w~e@F5qCCC4N;s+sgO_~ +zvg0HADg904B8}IoRLF{)(ge2+FH^iJU4RDw3(RK=8VX}my{cFmJ^c=L2T +zhIo?ol&@PUO$j5u1AJtV3t`BD5aPo3uu*Qv0-0z%n5ND&$~Wjgz>Z^`WjfC$o&D$Q +ztI_9Y!IoH3i$95-C(Pq|J?zft3>JAG$dae1FIbc_I?nefvY7oE>;4wSC+e_@<)zv@;~5f`Gq3i~()`?xwiT|djq +zQWNyJe%KM6ks#C9vZjNq+)-bxIEjSVkkT^smV$Sga&up`Z1<}GJ7 +z*jc8sip_SsHdYaG;&n5%4|W4I=RV?M+lLzmXI9#9Ha2JrZ~|kX31{dhxlI6zRAL+| +zI6JSzI7D03QyW`0Njny=SX^ERyPzW2)_jL;@f1M*dupW}I3I&t1dqEb)nA+h?{Mz& +zDO`f(@U?1A79|TpFM-~Kcwja?5Lhs +zKl>n8{Q<#XCvuX<<*s|wwQObdS6}Qj=2d+#rH5qF26f*N9{VbOA8?974V#f1oDS{guBtEa2VDN4F$#MKWMLJ@GXzxSTT?D +zV_shm7{$?gi)3B_`hOK(nj9OMb8QEe!*bV#L2DzEdAe4>>Wy?V{5&0GZ53WRQ>FZN +zBcAMr*0VN`1-!^dT8Zc7T-$}b2uG%S6~LK_^Jgp4ZBArUdVtfE%@)AEyuNZ7Te~lT +z+oEsthJC8MF?5=-{NG^wY-8=v2_OykmtLh}edW%_y$b4w`DgRjet53Bb|>Y}r-n&j|+F(Ffhc +zZ>n=Xc;z?v!qetnt-c66TEo*A6|#@74~YKMnd%Fa5A1h7#oYi4?09LcHe!7AqAd!5 +z6TrT@YGc!Bl8ptBjnx>tvz$srBIvo*U8TK>HRo%vHE&OS&GY`6(XPF=YTpvKRa=sa +zy+A5c+p#|0yC%!EN4EJ|a;^NlTjWLY0j5;ImU!(h@PgnZe;4N|TD5JI>q#bYI-1uo +zwc2T|KZSC-(tHV-8`=$hhNAWP_B_l7%4Ldokm%R4; +zseWh9)B-u|@-mAGzS!Ln}QmRWCPY+Q|xxufHB|Qj4@w5WX#uKtn8P6&h4+0 +zG3Mgo%tz!mJTDnz +z{&I}@mHx};&K>(te9Zp^ZFw2SJgw>f1Uw(c`f`l8<4mM)E +zV-MbN1mnF0eS9;*Z6r_mn9N;EaW2 +zub@oyLtZ9h2aU3RXq2_*klybHaTN4DhVrNkvRz%KtO^xP*O-Md>)?2VLa%Ze%XdUFt<&_tw;DRCjA_!Gq0MOBB((#n>4u +z@QBx5vU{&CTxo^v9gU%8>>nWKwzXr7v@Z;u#`xd17we(D@ZX2^`s*9UxL(Je^*$%{ +z`?g@aQZV;ee%SSDs?E{n4)}JbGHo;Ff09YNK`ZUS82lv5NG=BqS=MKjd=}Kd4`EIx +zbXqdXkoJK7RW_G5WbsLRnAT{>^UcI3q?gA3#3enT_j9y8AIl2T(LSBZARIsTAe6Ts +zdl(6HQoYcg+nQ0QX5jMrp-!THOV0+hy(qr}aj#(?z2vM#TXGt(H3=@tllFLtN=LAZ +zwR(1;?oFq$@6E$r54cjERg+d>4-8x{ODvIAS#bYGm%nH$55wLtY-g}%#QGJy38TIW +z+KFi5^#)B|q6st*uiKGl5y~&3@(r5WH>A0W;*|+Fl@~&JlqcmKGVGiuq6>yhpZ==mIJ?=ozq6wt`=d!Xli=dRPVmhFWN?;jZ3z8LlDfxj29 +zlL+hn%*eg4FRj3O_8YKYs!YM!3u{_k&*hH1Yh~M;u}T+qV&p{tc~7-v^FQc5)bpycb@uW +zpuvi~1nv(liuNS<+CzLrI`+fNBx3I6c#wky@IA)Ly`jGl*@OnpQ5zl1YYYGWoJ +z_GGhczL%PV^2iqaM`VMHK41mE8P>WtB(hS{P0?ISX+mXE#pZ`u1*3iAZuE)oV&C`# +z-bdkodT`&E02_HPZ}-f||M+a+u`JN?9`ZHk!}CZ(S_j@lycXo)!kayq&k2lwo$ma| +zgUE;afMU==a5@JK&5$a{{~gqk+LZcb2<=2Ln}gEl`%ctXK`vB7KForgm<>I^HCQXw +zzz*8N?dk*2BUms;1~4BMVlG5ExSxoAg%|VUTZ;zxTq7sUoqgMZx;7sf80NiLv3kYSf|Mg{aPbr3&|>G%Px@@N`OI6 +z$o*FMXBqwk_^&biNt*mn4g6^(@SCL1$2E3EOTb((fH9m1_XyhMb?{~YV<`;(0QOx9 +z++%?8IVm)S&q>&GY_sp0qOz}qPB(9|?I>E-T>d2He%k9S!)tBb;<*;<^h&HT|AhJM +zvfJ`pbFklj5c#a|`{rINCHww_`Rq@a&sJbQ!~H%-Ep*GN{z-H9D&yvkYfA9FuB7^o +zVU9b7wZdg6@3ODfX&>PJ>O;6A_&V+$E=T-0DbaTfYlcM3f7c*?nk#ShkDq&tCHfLE +z2PR?;L>(($XAVaa;ID-ee0!B7UjogE*lWCmzPJnZBif$=-A6&+mhcvj4eOeAtZTM} +ztUfE&HGGc%oG##ck*+e%`iA-^=BaIgo++>mZr0Z=;8#2RG%hUR0@bESsuk%sldM92 +zNyHc?IZtckgqi*dYez@0*V++$iORzIxP3xEo0Y3*_d}PuH_ujYQ(A)qi0c`Rwn3Zu +z$KVb`G4@Jup(FQ=8^_zpZBxR*V})pkke(mSmymmITI;o6SRg~gSO7rU^~L7M}KpO?r*Vrq~GB^yZr5OI8U&4 +z?7|+lBWOn%M29V`mv2Lu=5N~bTjh@6HP!R9S8?z6SZ%87b?nDxSEp&SYvyUM*SgWB +z2-k?P&GousglqM9N>^Q*rd19Wdg;5q2q0DREHdDjBoElSntHt6E;WdwKVa6#W9o6B0zq30oJTx44Bf*<&WD6)Sm=k(}XpH1iYE6>a^47mlEbFTI05Y2HGnV&6u0qw636jt?QYs +zkvCwIPWSAnKCF9`n)eZO)>xO$fy-ewkD5a;+#P+VK+*nXoTB~Chcoe>)}Y147Wg6K +z8q3+*3E(C6H~oR0%hg%XLyJ7VZNDZT(Q@pI682Jc?fqvL9Q +z&glZ}`Hj=k)Lq(A4Z4=?j2Iea``YpTI--K7?`4m+0X2z&+pIJ4wFhy1dR@AI>~W +zdhY}*8+={^nWQjZZ#M2rW|NLVge?eHo5D7PXPd%_S}(N|=_Eo(kGAPW+YE-09&Ixi +zMtZajg=OIPcoMZ957v?!b6hmjYk@5H2%6ubbAaMull&l=liWASlj;;`xtTNCGO;y +z&-X}Ph;dVmu|nf!I^>XmwHUAx6Rh2UU2cNyF<>P7MA}yk7|A|9*2_n#c^?iu788$l +z$K9B?wkUK~7P2tcBN8ja7}f90k_^~Tr&)1V(k6EVi|{=lKk4saC*oyEC4THl9+B*^ +z_#1(byO+b^;|z_-<-V;E(^ZEnZ6Qa~g3KVb4dME6JW?U`+LknOC0@Af(^5$@}c +z>o^wN1GOw0i+Ab4z)U9}f0kwA4l-s}ac1x_>};|3gxua)$Mu(s!Johc@Bw-}k~I?e +z5VGXEdW^bdcGMxP*UgQ(ZAaanMBOY&`ku7~b))$6>IS|ITem%?`s_3LpE2roz^K~~ +zjk+EDch>Evrn+^|9y7LnLv4?!FUvH~JmXQ@P#^Gz_WB1H8>QZ3gnKZ5dZ{mk#;Zd1 +zvy*Ly0DDk;r(`%ALprmiK1p{PtzzEnpn0<;I&bE}Pvh{%mTdJP=1qM(CPW<24@Kue +zTfTY|=%M}X18_Nw%ktIh;qQR1YKwr?j#lTx-|0{^gZ_T9UzrQo2GoP#V$OnYfbUx~^vP%YC +zvF)GX@)n!xVuYjZZ{!hef1`|O`y27m_BYD7#P&bcXxTq_S5?19O*#hN78v{VEh6s6 +znmNbNF+7T~{}>LqJ{YaujP|3k|4q0YhPJ-}{xI6UU59OBZ{(>9 +z;O}rL+Ge;Yqnp~k)_{>N4d+}wG46YP=-V@4|Aq0>>qB3saVx?Yw_P;uF^|xA>_WSD +z6%59A6(CIGUc{r_yKd3rX*_n`GC1z_a`b!#%Q3=KPMRs-G=yo~i+s`UU2{zFa}cI+ +zk9hFG*J+GQz0_Bh4(8Fj6lp%gxHsz7^_iq~(K=0(fp+gIGnG+>FpYar2DLkM +zi1h8gQ;mb)?-)AnFVODYY_Q$C*#+ADAE0+N+I<__Hd_7Hzv%6rBH9@3{tjT&?ui06 +zGf#aRunw$6vrX;(rU8q#H?O0?chs?W^&k&=SEJ6<-iy#5LPmR&oL>Zd8DYqI-rgdf +z+MD_d;$_5lq8){t?=7Kxjeb>va(H_gVYF8l$$614#yM|qkuSA3$$1e!4`E7=co}p> +z+uPJ$z0tZDWl&v6&Wk)S&Ut%_GN`>t&Wm`AbKc&fjQ@-6ondb8>M?4Q(cb?E7yWx1 +zLwhfRpW1t?fVJnTH^Se6y~`7D#W)WduxNW!=0w^ov5>ec!2#7L;E@q +z=Iw3g@_@JZY*YMf#PjyHyZHDvw>R-}ronrXnd?m9bx6nC+sK#NoBD?+7yUzTZzG=C +zoBAc<`S?a#(!Acw>td7)&Ci~tod$d-;Cl@C9{4w01Dvc9X+x4Gg~<>6F#OvM|91Fy8aO-QKR|xu +ze*pfU8aO|NzuWM4!~c$f{|>&Nh4t$B=OnNvHuiQB=`kVa#hD3xqlv!l1RYc4M$9S0 +z#dRBTG{?}{iAXmGYfwrv6#nus@N(#G2p9XcXg;v>dn~k$&Q_DC*^6|30{@Hn +z7Tt?KOsN9RrezHt=y0AWkm?zSrUo>KSKEA2Y!U`$q#(m7jr-G%WxON +zmRk}k!}q~fz)yD5D-vn1guQMoZ2_W<@NvI@A%0CNC#4(=_`J&>I`Y}lI^&TX+5lQ)(hoG5ltJD9}5F7thmLm(J7LR*+s^azJ*u6ueaf_m_EL+fVlW +zcR>Fbwv?;V;kH9f7U{t@*r@#p=k{%vQ{8BNl@)m(;jqPy@74KKg7@;U6X6mb{#PE( +zMR*1e|Bi=cRdVZjS~A1I!yGn2l^Ol +zBTq;jH$WGW?UFjOwN?xGXM963Z2E>Gw5QQ;Cx+)?3>n`}#7R-~n~C9h_)ehl%|uv> +zM8B07o`>%W8sAEU^+mMJTES1!NwlIL7Ay;qzM;GMjXEuWGak~Z(H#w;JCIwuMUa;wz6dgNen*gW +zbPn3T4UI#dQC!N)o?IdwmNaQn74AsWY!hE)+c{&DYe3OL;rp# +z&Y>@8%kn<(PGFoiV_Y7AJq!9D9~*So_OrxhG9)JZoL+$C&=aYV&mj%RzS+DncEuyo3(iVfYP9@+3zGYz}ds!pCr5kI}bKSxyOiMAF!L8mA*2ER^lT +zcr9V;CGd~rWOfAKq2A7LH?TKYqxA*nXh(vzXirJkOK%!ePv4EbIdcbWTJjtc%XBre +zIb1g$LOGq#H!$dp{A1a)%}F>Hg{{nZiMhic-5+ExVVz)g`?xK*3%1;!K{qAn0!_q& +zKG?s!pQD_COmkDcEUEUgUfBAaM15`0QBj>gfqsSRJCd~psm?oX9YJ;iazxbc1mxXE +zkez5(?_tPA@PR2*&)gFB5#)?fPuN82_1vv!eY*qNk=@nW(cQBL>xw>H$wsdDhV==f +zu5Q%z+Vkq#J6f;nF4Pq^ywSSqHt(e?3t?}Gapo4Z!yX5HPB|kn=%(pj8N->R44oC( +z)XA_jlxb~2evA{jTBCWK#;FdoX*L<(!^Hg3m#Lib;_lrR;9BKG&Dw8O`yl69a4)PK +zW33%}&KBqfVOOTU1YMvXXgWtSD2K>3&phi7Z>SDF48_Uf2sAMLSVD1X7)4 +z)L*HOQlF=`ptFyjiA>8top=~~5TO${>%)6JXm3Lo-s{oz;LL7!QCb-~A<~6^Voiup +zA7)k5KNDTl&U)So`srgxdzl<1^(C0gIZofD#w?B|KD4r5*v +z{G-0CV9fV`KMeIfGLhywE6xDGL+nKfriXFA4}2O7+YrXuBO0HmSrT%~K107hLt~lq +zD$QlX*e08=M=`dDZ;Yi!`GdZH!26ET_d{8F-;eSsD>4Usk}$?0?+&ncVHX2Im9Nxr +zI}#ed-hms-Dp2oij9Ds=bleO!k<>3<3KXr}LV9J?xz{=p=WCuwAVDr8JHTmZE25{P +z;4qgzov?A{H2)T5;cSEb7Wti^woXIcLGKB)=O1xznCOj;RoDU2SpB1DS9b*8H5;V2 +z$Do(hn&`c&Y=l8C(Zu!EkTI`N+lcZ|Rxe~S^!Oj-r)q?Rl7`7mcv$bfv4Pl(EA?ydfgmFsq=eRsp&+9Cgs6`u> +zp5}gx=|bV}n4)^&zaMkZYbr3Z1LS|hx~+XJYe-5dAU;=WJx#`Fw9GhnD=dPk09??F()-*jtaxyXxJW+P0r%e +z;0N_xrD$#-#C(fSTeJe~qX?!TEU&^he!&B&)L&tNY&kN}>S`{QQkIumuqUN&t3vJ* +z-@y+n+-C6TRcko-8tA3(nqPzWxRpgxVMG4`zW+W4vUDY0FV43|z!v^l@2j3~+1Y|O +z{VcYPIR6c!2S^P2kydMW{0eY&Ak- +zaegjyp#1}!%fQZ3#vHPk(f=%f{IanUw70$|HR-=&^Y_SH%T>LEbA%5T_W6weH>|~uLzE8`;r}gulUHCpN!Ta!C+5*rZfgZXu +z`)iASzmRaVF;=IC!mdt>m|t_SU%(w|%y)fQO9`7$`mRx!uT`KcZy2SrKjQwdahLEV +z$aVVG>#+L2ErWIw=il375pE}qyCJlHn}vL{z~dMCbUW$y(%6&C|?xy|XjMxAyxjnhbLYtYEcgq(rRbJYI$3Ghu{Bf2BMMwwx>k8Ufh +z7;8s&WE*rL0_R0;3r}+QuqO+5!Uf#(=fQ6glf7;s{(pl)dky1GD#QP5cnNnR{h)Ii +z+VmyhkY7)qA8CowksnDh`U9(h9Sr<5wt7K7jV;3e3UGygJM3f#_DjHoJ?~!7%j*rk +zgpiKnom_8|&+q$z5B)4RPraJ+GVHq09nFDPsQ)M8f925q?F85W$KGAN9(C+Er{BAk +zW{#+@M47aYuSCD-h3h3*6e?2NzGyr23h2jqcscBE4$*!w8u#(NhmII=Rfr=S6Vgvr +zqTP1!dh2;C1`h4LL^^8kf?}!S2*w|5|M4wteVkGJbd*VZ@b!zN9luAqEAcME+f;bi +z<6WaTyf)nJft|h1e|N+N{*@qa8dv@tmLU~&d616_co_wG%yp+_ue +zTZD0z$SV9PG5A5uYZd-Xwt(jWyw>quo-WvH`$r9d!DhSl>w{^#vRQ>x^m`A{<}F3u +z9#%nf@DcC;Wh`Kz2{PG*T~`LarC(tIz3;&lb(n-YbUN^zQ=>g-T~zT1zQtOFyBCGh +z$6oYFR-9UoJRm#dm0ie}&bfPW_8~7~J90}UTz!BnGQoPmV+lOYM;w(iw6A==eirP( +zXXF1JN!%V>0OZPY4#MlI1_6diXBBNm +z9L+sb>AoYzUT!*5Y3=GY;yRHo3->h4xD$XI7IQ|P%)f!a#}w`3!IL&i*dy+Yj0SF} +zz-`Z0m%Tsm7}-;Juoou%3;7}7F&`>gKJFiM5Z`GGZkN@s0@n$=-+}HhWKTKnDG=R# +zN9bNQ-A~DiJO%nbzY=GDMP +z7v+inJbx-Pl86OE50eB^-RY+0(yUfyDCbRoWfwMEP=)fz6TBmWqg}}^p+z9 +zPjJnVXrT1OBO2!l=nTN^8;`XJXz0cMv>f+*EGa1a1jwn6NU_@gsV2koemQbI|jQlH&6}WU?DjV}6-J@xwzMG0~Q|D9P +z)b&Tdz&uOsa}2!b!v8R9TG3SAiFP8LVIkH&qCKQ5QtN3Q^A!5)QP9jrsQwL7)0GDEuCEu4&D1A8&+B)QeMvx9RQB%?@U% +zV>v7a5HqHN3Ct1*Km)WWc+)u2mhlr!Dq$1bj+IM`x)kH&@}C5=iEq?2P@c!m4NNOSxy_ib>F#zF|Nj=u +zr=VRR!}&UYGv;x$zmM+u(RzUTMi1!6oQ``~xJL`x_5LyVe=O)b97E^ri}eqTF|=oa +z`hz2UjBS%_^E8~PoawormB<*Yh~LKS^GLU|tu%EWY$gquQ-@7+&(k^tELVq><;}yH +zkbx)bu<1q6*$CJK9acUGx^=6LH?kP_FcckNSmJ2hNMICPKYBIy!<>7x}W?L889{ +z|Cf%_3^>uLu&0AMZ3luxQ;78OaM|O#f*}eg?xuB$rdT?HA>dzZ{lxj$fVo`8x=ZkN +zA+MXx<3&cjLPmXB^f*6o6$N(-;qrCWE9d`@OTJcjp>JURdIDo`7yNWKf-<|^IJ2TN +z6>%@K6ng{M8J%h4d&2z4JbmBQ&5jqS#o$pGaB6GsGPI3x_wy#bZ*;Q>g(~rp=E>`I +z*a56r)dCL7jLg?zTo#Nr@WlRGe23y^$Ku=nLU4A6L6;Y8wH$S5HPs;tb)dEDZi{ZW +zNp-P+Zo=RF=NmOjlV_^Oxjxhpa9)p9gY}r8)5q)a32;aT7wRxxkAA>t{u^Ve$6pM* +zq4oGSugBmX>g0`B*N$gr6x2h?Rd}0P)}U<250dYY=cK>Ep7$Em5#RL!j{_U#@pW7m +z<_b>hMmkHt+HL~om^9Yl0v!*cd}>F=3e=wq|GonCHQ}f4)<6zEg*-UkMz8uJ;(U-9 +zJPbL^FbC5)Q~>iH%IPjR3>eC1o95vjrHs31{JzDuKzN>3aM(_K>n?bw=KQ#KjJS6P +z<9I$uC%=*5=y7aeOnRdqj?bChRR +z=M`!PzKzvqq`wwPhUglW`W(4|{TIv#YT;?)YMW@B6NVAK!(ZcG4== +zGwz6$@2B07yWxsGbSvtupstxtcIIa6qp4ihK4gqOU>c(j8Dn&tF-EtaKSo2);amZm +zPUO|iaR2aT)Qi@0C&rT_N_9-F@ON{BKswJ;W!BRbMa82&~v|HOtnN#fmkB +z>W9YMPVR}jl>O(hc0pRcFSCN5mTGp;>tt`?+cqEX22Tpv=7%wdeT=#_Sc=$2^r?p{ +zMVPS)k|UKi_VFu-M|u~{cOk-cvvM!)_EzHmRO)g0gK?CPoxODw{I+1+5Z}q|ftzes +z-uB_Gl-S3;Sfe+>-9>JgeS8G@UN)g?-^AjseaRDA_oWoK?hAz3TW63C-+=k}DI=cZ +z0t&;w!2w)0;O)xk2a{3f0P4)~QMV4t$E}nnqYmij98UEl+K4VM +z=-CWh +zPlwMb@1f%@W61_e%|DEoJWqP^?40mYyod*1X;l66P +z?-;H%5n34j?Bjf8VZ)UTx5IGRka)Whe!y^t;wuKc({TTT=~J0!Aao>~DN?7^0foWi +z2)m8 +zIVDz&m+gn;eFN{{eHU*J-lKSr<8?~F*|Kloa0lY?zKgd9?@_$R@j6@g>Gckzv$yLO +zJ6RYzJt=G%IERsTZs07lc~NdL3rn3+k#xs^GXZr+x-6r9L~nZk-kXRI33%Laug$nN +zBbUNTf|3W9;h#Foa4p4_;z@AJ@lIqD*-W^dshz0`+^No~&T6;maG=H7#GgeD$sJ(x&CBmb7>s +zY!I}jY5jTtnwK@LUcF?MTs-KV;$XL}nt7=*!FIl(l_H{_J`gXacWnJ^_ +ztCucE*2`D7Op+;j_3azv^>?gUbNjjtKuW&qqK|{s1sv@9)hlnmYqeaxIOB`(4 +zl#+nFe#5%uEeK34sSC&x<&tS-gRm(j<%5CJxlvqDC6ei`yy0tWmdFN~oc2j_)9M!a +zj`hTnmL*G@?pOtic~J(MgRNWA)FR)uPOmEntob^aCbQc4)z!hNlVnyrLuOO(R@Lha +zg3sWfj#D~`UBQa=ht03~N@K9PdO>|-t-oQ`ysED>`m5($U*7=5fru(@tgrRoFsre8 +zR;~Xl2E3|vZsU!?>IL!QD7z^aNE0uP(v(~vO}sctGxY*#;>A&#(hH=C7e{HPT_8=o +zI7(A?fi&^rD9!W>q=^?tY3duP9fH@^&x(^+AWXR!LdnGtrd|x8^kN9pE{0HcF@)(C +zL8!ZM{59y}7vNEG<7|Iz?FA5~TnwS)VhB?&hERGjglQK;D7zTK^otIGvf=zXkES7#a>_80QiqG|VkPBZ +znpkNVn9i=#BL(l9nnyf{h|D-C1Q#EYXe +zvC=R$O}sctGmNCv6AOemk}?({j--r5h$AUu5#k8KScEu&Fcu+>AdEqXBM8m$=Lte{ +zB+Vx03Bp)}ID#-1A&wx7MTjE^V-eyA!dQejf-n{#jv$Ohh$9GN5aI~JXnd@+)4_2C +zp&m7yAdJSw6@<~)xPmYm8&?oUW8(_KXlz_TsK*M)6)On!IDN1T5rief2tpk$vWpdj +zgK1)gU2K|oaYRC_u!~I-FOJg03cJ`e@!}{=tgwqs6EBX^#0tCEH1XmnO{}nsO%pGU +z(!>h8*fjCtD9tc}P){rn;t0Z6ggAmQ79oxxj75ke2xAfA2*Ox|ID#++A&ww4$Dbz% +z&5>~hVJt!%K^Th=M-av$#1VwC2yp~qEJ7SX7>f``5XK_J5ri=aaRgyBK2{Lw;JAWN +zj~Y%8Mq}d&!f0$f``5XK_J5rnY_aRgy3LL5ODix5W;#v;TKgfR$l1YtBjRuJmoxPmYy +z3O&%QU7HH6-Bql9`PY|R#R7M%mv3C&vSHa(ta|wp8NthqV4!LB%BzIx^D0(#`znOi +zU&VsA-*pwM3$mM8%aYYitClyeSuT9d8&biLi!Ru<{q@+kcC61d;&o^$=jnxZ=O?G22epFpB7_Xd~ +zuhi8y#EVJ3c3wkFJwfeIP+joG7?d@)-Er%>rH!|*Z(O(J)|*SdsxxSk(8Y3gO(Grh +zdbE`uY0^0J=ww}iN_Ehg+<0A}eg@dgBaDj2i{aId6LC$$`FT02>Wk(1*UELlDWz8- +zZ-l1|36~5BPc?@rc~wJgY&NOtmf;JIHb9$@y>NimdaN} +zAuVf%Le{jjtT!Pb334<6kU|Ggd8^ixHlis?P$EWLevaWZu9)VR)~TO{=3VYCh8d2974=8e+m~(-tw`nGx`fwK-f+9jI}&3XZzy%q +z8D8|oS*H~*ohy?|XNvSVVdCZhB#Wi70Gq?Y{hx^=XC9A}G`7xo34s5B6MZR+Z&NdV +zUP!L-Tv8gM&GZmmq8xJ>i-d_3CP@|x2xIf% +z|2YBp<4$DyugxyoMrJtdP8RFf9S#^S-NtM-_+ng})q;O_q5rfnx5FVx5;*5_xopYF +zuz2N4?`~9E>Jftde!8i$th1uN38=Kaxdp +zhONv7p5VL}d7ST4a%D7_`L9SE<68NHMzUJ0Nw!!go$?ju_%W$W0g1`X#(#kw+9u4HEZ%h(kDLs)hEN4V4~;xVVt{g;-G(noX2 +z$jYUD|F=9=;((;EZ4z>@2%iatdeIL$D|#!#FH1>JA1oT*4q;X#l_az=|3h&Sb?Zxf +zsD~m26#!1#l9H0_cDu#F(!`4|*P~yeY$8=WNHbyr51@PjypXH&od1R0@PFuu+>pQ` +z5uAAM$9sJOn>r6UZ=ne+i7y+>Ao!1D`Kw&rCbp7?_S7IdL +zseH&v>MMLyr00lsB{%wT`W$YD)WY;%d~!ru!j_;0gMU3^Y!=CxkeHZ=K`)bCkN%G +zkS$9kycR|)7YIj6-pO(>tlnTtFG=dzZTR*VO}@oR3QHB`OXnikH4PkAZ4 +zITDFO*dQT)gHIkdP1rK@Cmw2;UHoTc%%Bjt1Q$$MFnDK|BpDd^$O +zzjcxnng1ub|L@!X?_Du@*bIlZe%RdQqp2?5`eBTgc)j+^_Kz|Vo-fD$m*f9Z0{)c5v+=!v#QMM{f0p{aBd6(lGE>>f)m_Ee9Dx1ILpNf~JKYGb8Kj6oL +zuo6FvT~BKXT?s&cp--^~{)1a2zq|d->A!4$GdKQg`Tw)p +zf5i`u(e{#5r(cf${~}FJx??Gw*%Zj~>xam5(h>8AcK^^_^QQ%>qRav=s-^r9EPsUl +z!-cpm&!h2r0t;U=XJAK2uL2;wBJ8Y2hZyow9KnXVNM?RoM1Ze0MBse)=pblt`EJ&| +zkIWi5+HSXz`h|^Kj0K8fB6XaL>BAVQ=kG|SR_G>nUWIYl78NuO+R)=iUj>U)N@Q?KA+E)lapiQ +zFIgXC)12ZZpq>AC82#V@CF!=oKX&#A;`KMtp6JBchHa>eeuZ8#WWOX?l#A)-4=XEV +z#>{_-fb$+Zlnm7H|JU{NzhNs`3K*Rt#q*iztddIED12OV@b9JR+07|*|D~m)vZMU| +zJLu;p;`jnBFDZHLRgjSD|$3tc_WmCwWL=MO84 +z>Eqq(#;;qv`VNKB2>5&I=dZl-O1lug6TojFBgy^G)z9nwK8DNxZvA{l20kQXx8n$n +z4$*{uUbHK@(T58T=;tjdlKxBj`BeOv{~G#v8jR=Z=QA@iA@DD#pD)FKW;68jBon!& +z{!(F3_5bZ@8LC7-c6*L{MD|Lrbh%AVPf6h+#)b{YYUcG&lwp_XA^kkMGmTm5=Vli< +zTvR{5ns;zf))4)?)sjdHvAv%3-%9$c$tHKn7 +zztqp0nDXD)J6!t@sq&Zl`5_GX?-KmaYX2|w^Z)gF$ls)&&nVD0Kf~$gMLe&rC4rEI +zK3;*JUJ)Lun~$fL7kYXmGe3j+`3tLyE~=l;a%P1s$+~`ic5{6D`QdQr9)gwZ=f(Mj +zi9%rsDL@wqbDr`O1hSc1i!UE~kSW&+WZRkk3q!?(ae0X;c|)8;8xFxk|H5nu@Wr?c +zThf$N`hm?c+0PR-5`%8unnFr_{z%qbX<@E-353sr;m5F(){)GAEi#Nfjn@p1@&9f5 +z`B2k=V${X-HzrdNfQ|?c_=6oex1WzX%yv=xd1AH1{x%-<(4C505(}hW8;3`#b38c|Ke}Pd@ZXN#UUAA6-8WPBKS4`}rsyF&n>w +z#F=8^deOOHGoP492ZMNE{)@K8-vsfJ#__zAz=eLEQe29mI-&90`QQIq_VZa;uye7~ +zI3Tv0UxM`3Ij*sTnAKvib@euoY +zLtciOaPNnYce5M6Zt?0n6h>{Y>*v#G7tJ9@MIJPJc^H|WwG1fyv$ +z*?t}aiAD=ApR%*&h;}76_JMw$Z0h+h>F0T@>93)mN0#U7=bcU`7^dszt#RzHTjO^zx<%#O&>`9%5ejZs}j|ZPq +zjSRY%lGncn=l`^K^*nMDVR*due%xx0y#o|JPU5ViAWEduZGuQafkhe$ihx9sn*4w? +zK#9{(q5xGSBvyig1`#O|4HCMVUw}ZOic+PB#1DYyd1qel*y~+;_jdP|lgDSj^WhoK +zyzk81`tkU2JoDt$;j<51mvxuo{0R5qX!OC!C`eOkOjZK6yF<5rKHlc_^Nsz*e)doY +zpKI*zDQt$f8UMX^oAHm%(ait&g|n^mza6}(6&1%gOiY4vR)o**HS6aq6uz +z{)Lkl#^;}mf521#d-w`AggwBRj%6D7a~itFdI +zDiB@KTX~@3EydptLvt9~Ew_GN)1?4#pFr-X*ddb$JHt3|FU99wyr!!}Hs7Hn>w5Fy +zqQ`n3nySqf?i#!#F8nrFKcD*R=ihf3xPHFs9OCmG;`1eRDz{h;aP}CmNOEX7YvzQd +zZc;~z13Hk));NT$S +z>PqW^@JDlbpgZF_vRQl{%a`4GDjwnk-MVSqv|J9KAD`R;bmJeVOGXS~Mp$P#e4Zr+ +zX5IL_F*oJy1OG_S3uYx~HplrntiN797VX?w@OgCDICxJAibLn~;tY6wxDkPc3HUUr +z9G{ok=t0`8wX2Xg7u~eiBR&rg$ZYs9CJfrTTYSFV;+B<#D_szL-mahLI52FUw=*vO +z2MTY)=f%@sFO9>dn%^b{!;|irf?@G4Cc177U>b&-kI%dQKL%#Wdgo<%+sfKojN`br +z_`JFIEHp#n^JAcy=Go^rVkdD)2|siaStN|lELrK|+4+u-k0YIYX%3wuDQlP +z=0n&A_&jGd@zsr+l*cD?~swrBdqvA=D5npc4f +z$xk&eB@PplAROOG&FGV_R8HZuRUDj--^SvzX=u_=H~b!H_-#CmZ_1mNUTBv6fB({$ +zzrHiZ$%XCzWK2kH*dyBWQDgs7-ETHBExp{j?4Mgd-`KxY_nV4T8_&b%1z%=`2)2~s +z^KEn3wp%4Wk75K3cBnf2+)MF!7q96m5$!uy5^i#r#ODFWC_cYDzYTc#XYtz<`R0rK +zHhXUXm--?QnCFf|P?X<>y5}lw>p(saewzWAW0im2@!Le*un*!HkAGhIZTkIRb_osv +zpYQcwyhLVt%Ri5MRPfJV=|wv)sR}LsJUJV>=2y972C;T?o +zV0RKpzXjVne4bB9*2zEL3A@7x@Vs!(ljEibUH5lT4=y*(8Z2$UApAC$UV9$XnqWsz +zuHZ~gGLBrAs3+^DJU0oSKMbbpPi~N6o67XVUf}R~=^1C`pMU-BtGJ;ZfZ_%$^r$Q6N6wRL +z;GgHzk6D`Ii!SU$(a=4`urc^|wIKg|dw<8YQ2zidU{WRyLs>sh+m`ds?~)7#6!gUB +zpCf|rSZ>Hd@7B*_s>h&@&0dUu;M~bS-+G~ve_p1*k*uH3*lO@XfO66^SyJDe@Ze-T +z^)i1ho7c2~;5OF`~Px0H3o!;Z4Uj;tT84BH*V~>59<5R~lnmZq# +z2mk!-3jTTa_cU0NfBwSpTilj0554A`$8Qsu!T*bY{`~BpQ{f5%@ys&Pm3@DpvHwgZ +zX9*cTd(v&j|JL){G~-`8ZfdHxi!=VU)n!tC%6SQKn3x3N6|J8y;h!Hg_`Ij@^Y+fN +zf1zGe`1}=|Fz@>Ve*QfFd}DuKH|OnNm;H12Jnlw)*4yHLM +zIEkG&c#mW#iPIbpI5CB^8Ue|{Q`+Mukb3uW>k%d?X>-p}upu-}%Sd(z3ABaSU=J8{ +ze(%~d(nvOe+<)$Up4QJJ@4eSvAMbj<-*>IOW=N?j#lN23$knF|x%;nw{~0l0m#g)L +zvYd=ht?yLoWlO2PjAz4hDYg1p6}0XNDD|4GV8167)P9 +zRCZ4z{REV`d2DK`FH@q{D;1d4k1|xB)C=*hxNdBoTUV|j-ouX03tgUPBgW7(s^aoz +zl`_(*V(GIlFcz?^R~h$ys@wBy#;ev(@MqF?fl_;v^ub@0zfztfTpLa4*W4Alb^ATc +zG5JrcGgY0+eEA~g>gl!)GN}tNTy%%cF+_`T743{3ojCT7^Gj2A)%X*B|IS +zU<{^SD(UOY7=yvu(!S37j6wU8T=y7*mR!GO3@W+qGzPO9OZzlq^zs2z2^OdVIbIVe{ +zXZyTfRiXSFm3npO{)lrY@PE5O`A36e^>?o8KM+#$nm@_AZ$B1s66+dywtIrXOnqv7 +z(}660jP!5NM?ZC<2O^I2)kK{bb*%NF={mMjyVYasoQbKa+QR*GyC9C>IHQ^V>fZ-2?y_jZ>`9xqin-RJYb3k(V76k<-5%angdG_={q +zpSES5nRU*NXmE2J-|wwPwWkE#s>=_!|?y7rdgN4 +zxZZtldyM4kpYZHE-fQmDK4uN$F14I*^r)m-sTSS)S(Oakc3y8IFgJMA9^21*>U=Y* +zl52QQP@eVFq{Gwq)#>)>`^xkx?z0}1?3Ob6?W|CP51Fd(bx)uf`Zn(wQpq=XKV(|Y +zA^tX4O`Eg8uVLR`pPcYir;T}PPn>t~n}3gAC7^vxZ+jP*YV!y +zzSlp|weRgOb?=+%GTeE3Oy*g-@9jfI@{J88`%c_2Z{P6?RZhjqYi0WQg;wsw4QuzkvEd5vapk@#kNK{2KTd2B +z7utXan|=k)o#0}OI55Usw}6k&&6(?;0&fgni1YsQ%+;BmQ%(B&)A!Zs?@ixVrT23W +z-kD=nI>UWGW5%JsJpXO0+C%I)h)%!ptaLmibS&HV_OO|J>-PEka+`hoP7ahp?-F=- +z-oB}YuFO?uBhIQywR=b7InF^-IjzESK^}o4sIt_Sz+Oq&eNX3$U@;omD@sn +z&2ua2lOmrRy=sr}u~n(|SM5AU!}w>b)SiFkkNRn6sq%Mrs=>R<6*ynq3{Qj;ek&Xd +zs%Evla!E~vS~O1kN$To;Q;Xr{n)FBMcWzyD+M-kNS`D}v(s0(Kf6zi~>r-v@9!tZu +z%kDXGG2;f5KZV^G +zqs+AIXR@B!^gZDHTcv8zNz<3SJ?cyDFhj3}kSWEuanXzP8?Zu~N8yE&T`Fl9c8|%Q +zv=#XuD|6vfef7y&=9b}El`B87>0q{Yq#oJyE5a1=Y!mzIwZ8OOJByl +z=@oeD(i8OC0Zduo6dC^>cn$;Kj;IRUO%X`K4{J^Inb#o{D$ +z-yPbolD`2);pgMMYvGkE;F&Aoopt-(y8R=_#Z~*J4!Lq6{BRQ6F-sr!s(m6GpQeup +zbKYVaOJauYzx@ui>i&MdB&q9f +zX-M{q-Apwk_XFoMZ+7n05IDXlt;Dwmi{U$=r5M)i6Q^lVbvm6Jx*1= +zZe7&Tcxi|_1JoY~MxA5B=d^63o{Ysi#{$MLLyw?x`%%zx8_&9*Wl=}^oJ%MDZh2J0 +zDtcQ#uZV&ti+=5%2UT5%*40&N@B{FR@Z2;GRz_W4L!H-R{FeDvwnmxLLOmzxvk#aG +zb5xT%d#=?m=3#!*?zyG_^J@D4!~gD=zBOEHqRzyN_sl$7QD^Msk(uZ2Jg(N|adl19 +zIXY~#cxcbK&qTP+oxjXwdOp{>c$ihzm+y0ZzR#QT_>V;$?H_K8I@%Z9iA&JlQphQ0zmw&v?@&)2o{ui)56iNik;V3TsY-0qny^!2SgTq(EhTpZ7uJNikF^>BU;k1${0!)HNfH*P+J?C3EM +z2oJilx`;Vx-hVWz>kJp_JP~!spSth%yYHskKbG&GeysdFDl;x03j8q>oo_7fsCpCs +z483>+zeVWwmog{b#il;gF4v4&*%1>QEMGFMpTCOE5IK;s^}BD)yc_17(z<)LUbX1^ +zubOA;s)^H6dt0Hcy!#)`*gEl(@trk(o^o-i`+piah^2Zo4t|`c`MAhlo=3j%XFb%@ +zeD`JGSHLAaJPYseobW|FZ*MA(2rfKYCWV&&O}Bek>mPY01zZ&~Tpq1_Uh0-i*WD;} +zZC73eXEC1V(p+@4;2{EDfxER>Z#yqN3cvO;3w+HI}JbW3hx!|Ec*3OFSNCO +zM(>q(Ayh304eS^SbIivK&^LQv&c%Bl!Kh1dK(Pdpu^4-S5;!?tI`vfs6FCazx|~y;(>g8bVzKfiC;~; +za)Yr?V$kCr4}F;F*R_9u|H?e+N85U6F|L+(IcCs)#)FTlpI5lg605z#7`kj_p{y#M +zE0nbs$|}<*3T3NZ`ixFp*fB9&uJJB75*avgLj+i(_-Jm-s&TZYfFtS`aAds)j*5I5 +zXf?jGyUSUNtlbGc^z*td=NErm)*{cJWUeL1+IP60=eK+Af<8Y~^U8jRU-mfo6xa$r +zj_~T#u;70l@w);3z59-X$E>F^eK&Orba-Z(4$y#iJ2V}-ncG_8@jM-heH-m}8bZgk +z9bL6RZCAYs{N|w{Z*q9Zm;5pP+4$KezO@k)U%WEireSmYzn=S_@t2RMem2)H)%3Zh +zOLXIS=-Mukjqzw-7dj6ciLYmI)pIM#5u6G +za=@ex@}g;4Pxp3UF?jC;Y8+JsI~mSa<1sCSrmk{6K};_;}p==j@HZ8E+)7YjHe%w>+;7s*8M +zKir&`=7U?2udQCK4=u(~YM$0x_T_eu!#H2kd^TGKG+eiJu@UNn!EMl+ljli!4tD488y;)gZaGJluS1?EvDHy> +zI1ggmrTn3(h3$$QDSc_Y{JX@DMY5RN?17%e{5PYo$)%-x=c(3{_ylkAcM6@HO7r?m?X}=h+O+fnHn6$2Q)m^HjV!y4aqWW;)vfZ54rh=ado00>7{(sw8FaH +zV-3kAw7-$qd_xzpx$8%ctLz0y@b{|3-j%!;7*0l87lbQSvTlLS+i5<%_pK@M*=N-k +zJyqb<+~yhCGZ=Sj*o&TBgr4=HXDjx-#5^UhSlVD;R#InQHm}OQ%v)h!<|(%?Gkx}D +zhS$FAS50Q}!o@0gLAA=AzewelouhJ1^Hr{Kp2}rC_GJ@Ss@%k|Cpozger-_BWC_tY>E6P@t?0d@(wwG-fOWB +z*I^&LZr*N=eNdI^)xg88VSP=thK1Jx>wJ#BUgL8#9F{+6R!g2l?0+ELxH4~>A3-Nx +zEV*X%@XgBE@pr|M+{}sYj`b_& +zUcbtzpxtAafj3}M)@4ciTyRAl@e!mCZ(-a=#nwNft_OG%3Xzf6yz7HU|;*B>tQ +z2~1j_?ic-GmYIp69_}Sv8k4lXrq4(9~;^exJtLRv{e~}yzHi10(?0CwAuRZXi7avdP^$Y$C +zk-0-NzM6Fs9g>qQlIy;9z0gZg7@RM?>Y*lM}@ +zddFJnYo!X$^Qg8d54iP%SH?Yx?uh$%_9`dgkA$Dh9QwOC)jvBAT-1HRKjbWgbzMt_8td9CpIu&6o$jy%-6bk-W|lFVCErEppVMpr<*=c&f_ijeRt@3%)?Z9j0r!4Dk9+l +zRqywbv)k$GT5vSa7h?Zkg*P^M8SgyS3i9n0?M=&aqFa~vO^f_Poe}N_{w~(e27o{I +zSr;z!YM;c;39bT{;35V*1=tF3eQv3hivxcg+};d-)oeFFT4_vIPToDCf{dEBsW<3jc5uy4bpK*D$yluu7T_!pAF^>kj4`uVJn}vp2$65+i4; +z!SA_2R~G6c;b66DJ=&y_(7~A^h7z7KLv~LT9E9s-}=qAb7| +z=-EE(LCz?*w#7>&Ca-UagF6$NMYossM%2<(A@C_>QE<~vyAG@AYRT#R61jefzm!tD +zmRZZM?q+T~iNAL;-y!C^%)0RED0SmyR&Ipc&|c#A$vafEj%qU;`DDz3+LyWTa$^N{u7%-&3vjLt>@EoH}1e$~xGo)16M7e51=38S! +z(Xh?6ASeCkHE)@#k0d6&1>YuKWA{YpQ|8sry!xTJp0js}|G_fVX2Q1{ma(3|y5WX8 +z*66&dkFsq|&|~1EO}n(lf-5>bdj? +zq>qA!b9w&;dPVd=BHDiS(I}Fo0xcr{{WUIpF=Sr(ep>HgtOBg!L%d2%UBKBJ8|K8H +z??w;gXQR(@=1tf=-@Z1qz`O4J10n+(y_R!lc6Ql-vK%jEJE`Ycw@lZIs+yKz+Qum} +z*M)SMS{FaiifyorYui6}x$T#AMTL*~I{pgs*yDj0Wel}x%Yoq34U+F`F2Fs@rVr2L +zdQJ{_iB;Tv6GG=L^;Ry1PxMAUZwAk|f5C4g7lS{EQ?Pjs{zonbJ*8aqy@hURM9#z> +zc8R|Mjt%4|pp084N=ND=hUyR<)%cjisQ4k^T>KW{Pw~_KC$=M1ieFPn+W#ouDR4w*|pkH+8?&QaP*pPr^e_5I3hZVZ;- +zYq|S8P7ch;p%w9z_*&Yxf-c2&c>?)*5f^pWu0yM{g(6m0<)~Aif(;3p2=>67GLUx$C* +zpr3=#Yl8Ljm=SCjJ|M2!uhy+|VvF^fG5S!)+51D+EKi2X%lrWN6nSicBZeLuxWIBY +zHiA!lthlx8>aeWCgJklhWruca=sP3y0h#2&5r%2^=~qcb@e(Yi)_T;J#}ly +zwUfaQU}qMmmogRzYwavmgY1Ftld)usLf^3p)hD_4whG$Mc{j?qLDmjq7XV|Un|t5E +z{SNN8K_?m4qHjI!k!5<^rcED^>-aMA39>g}l05=%6FbG3TR*zHU&^(QdPW-q_ +zt+4oTW(PWfJu;#{B9_rypsl46J!T@&W8uRDl_Hi^EhaIS3CyP83%C{dQUW_;7wf%A +z`0QDDDt<0DA4olwkH1XfuYUY# +z;h9W_z=;|Imxb#*cbfR0c`U|VyY4L9UMgl +zH=&ao`7?Y^)rV~Fk}<|n_|@P8d-qhmce{6q(DRr_5xbewdyLqJRXg2x%%jVX(cdr7 +zC0S%#boWu@{g`K7`jq$(MS82?KWN=0HVNPF1Z^Khk +zH4kOTSI_UC%-gf_E5Koye~XKsHj()hd{VG~kCSJTe%{^Q745gk?}btLrW1^TN(xu0 +zj%12^yF`V_4TZ^Fgq2U{g0^XUiXR-m89Lr}p1+fr7TNCWgwNyfF*s}yc!aO@Gdfn! +zNiA*BbHZ;HpJM`_T;?qPhVZKECkE2z!6O-2Q^kKPl+{rdq)c#7@GE~Lx&j=@948MA +z_cZ#%e$38)%w5|R+{-)>*(82eE`}~KeQqx6I(*Nd_C2eUadKgC@?Xp?$GmdPB^OAU +zIk#jiH)k#!vp3{dqEfg{)?3$OZVsmoQp_#wB;fehr`vb{-bbs{c=OqKG{+4J(;(pzC`7&%lb^1&6f3QRizC`Rbf!!7yO78Db +z#x&{z{z$cIQ!9ME;$NkR{R8k?guH{$$4G4n_cNyu_Q4>3YB3je>k_|(ELB14*ezR5 +z0n1~CMO~rldv{c|B_mtor-FP}C%FT6j#cSD +zAuhR{wl3YTa10-MV3J%E?PY(hkJuOd?GD9SlfkXAQ}SJ&%vm9?2J-p)(w6vK!^6BA +zw^sX2i7UZ}X%CS{G|LQm7Wr$KnS=BpIp-s9OzrKZj}Y_<5r=46oxV_LwLkjAg-MUv +zjSuU&B~qZ*`en%qXeIPT|G4)3>7b@z8Rd4dp8%~A#KeLZ>EA4`@^A23gT}v2^^FnB +zN^Vc{z<6WwE&TRNfJ6GtvgWac=V|_XB9J`J^9Ks=y{h%r;`f>Jk}vZdD!eED-dOy8 +zKzP9iU@;9TTebkwW(PRw8HtU}q# +zlx0LV*aNDF>qJ&FzFVAHs&+qk)jDlsMDIQ6(r33i)|AvdwC2L(D0ql9qaTnT{D?DrKGC-k{`_;zRl+%Q5l3;)O{oO_HcPeMN0RM_$vRnGj`;B|B6Z4AN +zshyT{3pyYMt`+0O;k6LHB>0wf6W5-Cd-1aiaqJoKcTp_+*6m(w%iJ|ZcmF|*{kO{J +zt|xAg{n^B&#CLv;EA+FLee`o%g?)b*9;lyhKXclwYkq(|y0IOqHv}$1_*gaG`Ugzj +zN$yAdpB*1idydqr+|T_+I3x5$Un^DDoLOpwU%=U8!oFdfGuU8xHtgzT0Y`E_#yj-IY}>rw%n?WJmN-i28Q)=uF4?WVwT#%NI{nL2 +z=qTVmS*8}rp5uU8wHe;m`+AGlCEvPzwjcS;*QaVFhbQX|!JulET$=J_Zj|dR-vS@X +zm`^;fHitJrC%aVjiM(y_nu8PQ{J?g6eD;%fN*;?jRg&L|UCx@}Msy-_XZx_LYC+N< +zUu}}F_S^(M)6fuxv);S4gYaZ4E?Ebb$~TIU<+ojXC<;0=8-j0Csqb8 +z(r*yk7!+N=nhSH-KgPY-*DK-QN?_~%;Z=^n7&>y56Saa1`hQsFh)QYx4szb +zjiVC#*qz}x^(FUbG!Q3Jw~c<_xjn163LMy~WYY?3+YWNtA3+C1_~vK`JVn7%#0u>y +z#V#+W?t~X#fcmnw>!H38wR;BGn=S2p25bS$STw;I;3Ok15`l^)mgQCJvjA?tGJLHP=&ITe-f$ +z^$M;PjI)aIe#7%;xW3BuPq@l{i@SLL3RnDap;Of%t}pTYzq!81^%bsy-;nS(IG&*F +zEy`ZtdOg>F;rbQ&`e&~Dxc(DYSN6qszDWGrGv+6AlQ|a8Zv%7t5pB+K^rb5Q7`06Blbe;hoD +zy$hg|MtP1Q7sw&s7+GPF$6_4M(rv7H75LO3_dvWwj8mEZlh?6hqGO+)(HjMRF@aU) +zEII`LcUpgRitf;B(Us|o^L#Ap5rXHl@v`u(0pE%YM}aj$e#SsXJ;=~2(s>i#W8tC@ylgyo~*7qfrbHwx{<7MpeDv@|CbE946>QuW$h4-G%`ib}| +zQS8D?p1~0MQre3ymijT;iEK!l5$X$%8lp?#xe#=f_TuM#g{!hEn-Th|zzO<6Hg`+e +znu^{+`)U66UKAD?m2u*X)6WdbB0o;xm`Cqx`K9zhdBGN|V^MM#=#)H6g*`rn +z9O(}v|1mr}&mg#{f~IymbVK*8fXha)p|uz_a?cnUPI7$@j+>5xJ;rQM$q +z6KXsZcxX=iulsy{rqB1opL^%RUBv(73bcL}Kj+VvWv?eWLQfQRx3@V3x3E21DJsVCF_o8otJe$~N+2a>tpH)HMRKGQcPXynh +zS6(_3zTc)-Y;8*y=v=`*;Z?Dbz#YrmP5=AB_bX?P`M&U-_h}0F{>fQ*r~r@VSL9$7 +zau7$>C0;bat1f@K%z09Br0)~IL6ri(#^9zre%1QgUcqgK*jwZ9)tUK-9x2FDL7&al +zxw_4XnKti7UjFgz*}PR~Bf8f_PZQ^*O?0&f{Y&0CP2M?esz;x}|JbE%-Kip5=XLFy +zLWlQz@e7gn9q8SMn2*L!Ud{`=Gc6~l&kl3J{uJgbb~*~a8wKBtVe*{F`*IuLmCwHU +zF1)C^r+s6YUqPRXzAWIhSU=r`ZwkD-jq$5k7kIQMWHl}r=phG<-~LJb_M7qB4Sac< +z*mo>A&-LA@1AM!KKgMsIqYGx~QRD*{@EhSD(W81=!!1s@sK^S}EVd@1&gc+*g}KS*9d&lww5Jf8Mt=8RY9|NYKcVasjPXL5 +z-lMTQz&JOMr=A+>4BvHPYA^Y&-Ri<~oT=YT?OnrM6O>6VPs4KL14)G+d4e3iuS)#g8yJs# +zrX%g7Tv@9Y*!9YhGJU_4d&&#_%08}%~AGBrI=F#xgy&`{-S7JDdr{Z +z0?K>IA>fny2Z4)ymWza+Qp{8Lo1b@>XNmENm;C|uMvW4SYuYt*I}4C!!Li_5=4R8^ +z5HJrj_5foKw~+e+rfzh_&S1AQuq?V@xKTM#;>PH9?*qN3KXq7eTOqim9)0M!jIrNw +zgnF&e_p6Mp`JfLREt=tjRoJ=KI_So}-A4S7DC0G*#P0}lzsy?D7HnS?lJ{Q5q6TmCD+rilz9|0%d<30smg|4X!lzzwk)hS?-Hu3(&y=q-( +zSBf>D6!R6D2+nkUctXnbJv{NZlox1Lpi?nVj0#WOSljz+a#T`JWFcU4mIgGGdJ@BF +z9wBZ+SN4%xT9g8>LSON{rfG}sCGh+$@P1F=1pZNA75qNksP?R8zBc_Qn41Cbh;P=3 +zEIh(|3*{msYWtEU3HlDXe%)^I>twAW0iF`fB?L|q%u(q59bj%0-Vi+q-c76VYVDK2 +ztI}_wTv0B*iKY|%65H+`px=IS1&u!T&O*ni)wV$P=p);?-Sj(RdM|lMU^9g;t98s- +z1D^;^JWpTcxO-(}y{$S8T{wS&Z?4OTcgb&z(N6Q|vTjH8QvB7ay{5@RiKE0^dJ~Us&Xa2eHFiH{0igW7IdE@;Nbq +zNf}9@Yw*63oaiHES^9eg3%x2nrkUR__vMh<^HcO>!5{j!jA7!AJ6YWIf4FF +z*k5v{;4zT?Ffg)@=(P#H<>*k~ynoVk_s7WEYE)I0O%j*3Z@2DMd}sYQXCz3j_k(#{ +zNI#uc+vcY=tt`IvQt)MES(Y_uX)ktNzV|yLPyIgOWY4XJanXCj*ftkN?|Z}8`rBYM +z*64gfPS)vW`9JwJ^B8+uBH~l6=yu3k?g`b(*_p0gN8aR2l=KPthMjsk&oSL!=W`S6 +zjg98(elTB`^#EO0^F&cy>9USFcmEDd<_Zw(_jaZR&8ppFt&S?m34%tKXo#@VxJzQ^~UyT*)OAvf?iBI62b1 +zcAfJEeIdv09QUszPvGt&J%Jw~e$)R=UE#yR`q-?qfey`l-%!|hA!oa!u0Us&sn&y6 +zko#dA#W_0O`>T+z+a{LMGo#=_m)Q5F!c?a>YrYrmNHgJUzDX9P5dO +zRq4uhnG^AaBe^&7DSfgJwU{^lI^RcCfrhJFl1tG~(%*;j{awhj^izE{dbM^td+9@X +z=*c_}eJkJRp2B>dUzMCsA2M!#z7A)QXxQ;RT)Zw{rSUq#d}aMg^TWIG$m(wAi@Lp> +z?*xD4<+_mXIm2g1Mg&hoEmm%b_4ZNi?^dNP)%l$8$*RKKSFE1am0t!9$;rxDN20Ig +z8U%JbDms9D6m#-BQ-@07!KHlTT*}!&=dsq+z&?s4>lYdpU9uwU(S5xe5;f6QTr*?7UA9&+FoP9pMmCy +z0VUs)>3!f9ZT`k@*UNs)EID_BwY1lHFEm|Wg55&4?fc;g_H6$V>k`jlGhT>xY~ID0 +zJjh-ZKHwz=>-*@V^mEt?;s4i(bstk9;qNT(n-C +ztcMmO|Dd+Xyt3b$zwM2I%H+?@JH9)DJ{BBIu-|X2g!6szapbHXkzYCAN?^R<4^&$Q +zU%~#myHCabDpx$&Zjk@E>~Cb$~oOdG*N +zNTqrbmjeg*P~d}Xm2(h%D19Y>Gl*;mF0#O$VeWzlzVYhCubhPkZysLZwR^e$X`gD7 +z{_*vk2TNER#=f$SmK}<@u)pde6|Cs&eO~D{-||%(pn!oAZuUt_0*l` +z_TNGOr=XYGVcjF~S6fr2UiQVm<*9D|sk*x(1MdhNAEcg)e<|-DKzG_v_CI@>Ll5>| +zbP4{*7<6l*-kbDi8TK=xdop}ulmKVv<;yek*%L^Ai={uGN=8bNpJ3+xQTcX*Z+`6y +z*k^SS>%uZ$%a!{brM{VG#{L=KLt4GldYkX2+tFdNe{^yBkD#Z}Mrian@CePG{VjC5 +zpY)(bR;{Nmy8$l-Q7O&VRRvQ%?^}rJ9Vfonaa;o<>gZN5k2Ar0wR}nS}tRG +zxc6EjKQ+k+_^U=4D{^A$!3H}mUlRfVFah2ze +z@1n;X#(qY|m9e(s2QGou!bf$)D0K@}>+1_WxygaLq~PTf70UT|Ie*}D0=O^D!}K@! +zi78h$$7`?Yc76|elX=&!>vpax+;?|7R~GKAZl{}j!Gi+#0dVgL<#B)I;$(>VtVTD; +z+`kDOG<{dAw(82RaCU*+lQLDAeGfbgOm(fSIf9E0U=H#}o!$rd(|gM?%A(5Kypes68&vHr{S`aw +zJ**i8JRV*DpvgA?)QKzhjNQ<_eYf(K?^AKa9Tv95%R`?SoXMcjw!l{E*wW +z*w2tLo+RfWV@NJj#yH770S(vIw&V)v^#%59xwyJ$nrGzO^REFfi^)}WzF>PXtXuN^ +zd|`!ZoAGC>(x1tf|II}%9CLkCq0?`h*JX?~t=f1+VKr +zq@VkFu3fI$wh8YQ>yyV;OwZ@z)JdVMCGTe6qMT85cZmDMXTb5Tb-m=32V>ZB+24@h +zihdpst?zc4=yNWOj@Yw|+TAYo6O;H8=xz4nXr9pcpiZY1+?>Tv +z{RT4pIDW~;kOQsD(0P-b#V6ky3lHpFivHkPZQ+}gcNX$J4fn0s-g&-uO(*235gCzv +zhMnE)$pj|?v-I&!-X?ybA>T&@aL9Rr;LZ@;sd-gtxT=`T^D3xeo}MGRM|?x6_dMS% +z>hg`uo$<)YYJX9eZ6bDOPpt5~!1Vu+>#^|pgS|a#YQY*&0psJ +zH#PV)B6qa2@O|vOz8ysej?uo@58|5y-KLg(ssclTcE%jJ)Ue*#E%}D==xyE3F!h#E +zkG$M15tXQy{p5cR?7zpH#b(r8>q%zux$C&zKs|dB8u)x2B4Z+_B6|6m5?J|$Lg`KPv7(;eKT)N;*}{|rtv{Wx>e#=a-8 +zttR=$E@VFBd-DDS`@AKO>p@@GS3s+CqhXV8)}z3rp#IYvd +zvwQf)T~XJ|^IHCN{Z}Op_e_5WurA*=f&Dg&yF0S@O9_88Jaln1tm{ABnd~g|&pZ38 +z)Vryw*Sw~pSHEvqne51{zK(_fjz5ozlDA9a_%Sb5@&FHocQTR;;2s$Pu;|R(?8(*_dn#U +zrqcYmyEETK9Gp*&9_6QdYWmc^D(uuK3sH`RZ*_t#0`9#$GDS>8x3|Od&{j{KlXK!@lG(_gXn`H +zk!O7Jk)>{a!9DNF{r2-b#?9iJ*|f>h<{Q)#_zK?|RLgr}wM_nfiW~+q<;c9G&*Hk^ +zevi!@Bv$-WX$LNk1N(^^W`BQMoGY2TAM<(qSPBdvzqN +z_b`5+7*0_y0}qmWb@aPiFHP>xmn$h>nlD!uC)1SgAg7l@j&3*AW70Or{@568weH#9 +znT*o^+HZC0Zx;KBPX?gHM)vrQs>J=e|4kPq@1q|NJXYwd1{=Y51b#Um=6-T14>gOu +zs%Gz};I}dz!#*XjlM=sn-lhh>hR-YK4_|{m2mzzEmFNtChZvwW!MJ*?o7N=T7^ia! +zYYg(uwYo=0$fS=j~9}&aq(C}^PhSybDN@Rri +zujSWMd+`Z=()P~O7m|P{3pzcOFNZyq|M)qx +zdRNu8l@Cl1i^(?>8qU?>Y1q4jzL!dU_42A!_Whj8I*n(+?T!-lT8J^?!-@KdF12l} +zhgcuIFvb{-+pCwD&_L#2%~i@ykWUa=RhHvNRw$=|azkV)FIP9hqZ#1-U*z^Dpl^sh +zuJU}6aVKdf{_M-_6Onfb;-?*DMnMbU!JWulNYXaU7m?p^Gi2faw^MBB1 +zQ|LxFZVsfMmpvz^Bwt^X{uDeRZGA2t_ABcWzWdNP*{=>zRvRzTI5>k8K{I^Wq1fjri(9=lu#gi{26XqT^oP +z)^a9&`6l+Y`0)L+X-mIn(3Ucxt +z!b!e$6q%H7<4@&n*J9S2km&!`->woT7-Yqt~oD1MFD +z9ei%N7V^@v-gN3ybM5fV-sS+Y+l1Cr@XN2zgM1GM&h|HM?-u*Gzsc@)0@wOvonU{U +zk9D~pa^4%V!<|cYs<|}-vh-q}LK<~M>?$J7XxM&X~ydiuU!vE|i=k*kH +zW4-?6Y`(t0UieP%z1m(348OH)*UVgx0pFd#_Ym+Q8|f%^if>k0ZDeHww$Z|#ZeXoK +z$#ofcfhX~ksx07?vsa!5PxuPEqt=>alyzqDb1c??n#7hKyF%;UAa;Ld?#eHFy`_JN +zZHM9a6nffRruB4ll-yP$x=8kt?jW~ft5lDw7^xTiRE*a{+P4aD)(Y!tyvvdIp-g-T +zN7}s3v-Y|2SJO=CdjG+*%v0M0;>*qW9!H^D_x3<#_pRLv?%cG*zjOP%$``@Q5Aj`} +zdV1Neowr%eTI>9)Kgr+DWk0CjN&bE(^S8a=i@gQt;Oh)@t)|N%@qtTNcaYznn8(>5 +zoDUih+PeOmf={xm(76Lj=jVdJtM{N`E3nr&e4}KLIc3gef44=h#gC4_w-i5W5*;kL +z5?MRxBSsVc6MLH#n}EF?!$*0JvL}1UTWwcM9(4T*>U3fkIA`S*d~d#;+{K)=y{6u% +zpM3&`dOTaGyRvy&KLn|tp-zf-@moH(8o3%*JIVi1j@?fZM_zZ5b0?)v<}B?is3-B~ +z@qqZf-ROt4==&>(7xL$y7U_>e%=sv`=;$!Nd4av$2wu98wVgZ3Q*1Yy{5s{yTpoP`y-kG%>( +z%jsh5fxElu-z;N~RaqPwi0yn5T|`-nJd5p9v{SU(p>3x7jqd_r03U5}Xd*l~$rw@U +zMeaNE{Pd|qXRb#+3k@Fxr{eRA50|IoxH=_!qWRqnVxidO#B1AGA6a>xKY_j&xqxqC +zv0bh#vL8PG4XNUr>qWqs_#)q9!|!p)DU%$k!Cdr +zp6X4RBRP|}jORVCh3`$brSkL^7z|+0eDUM52p +z2L2P{IQJ^`c*0NKLHGt*#-xAh4G~i{En{7Kr5cp{-1kkpKBj8Q#BUGoR>|5g+kW_c +z(HHRTWv|2Szr@DU&Y+FreTcdS=LOp(JoBxh&hgPt#_)9*>O8;bsgL<0?3oaLjWml7 +zWvG07^OTuf3+{rfH^pVo8a!j7C(tc~kqv&agNw;yttwHENlYy8suhZF^s4x#TWyP% +zSxyXI6IvR`&WF`Vz1Xl}=sHHM8u1v-A6~;=FWLpm)i!luG@L09win{MFR}0XEp$k1 +zN1)O;L|f3Ycj(qWP3K2_)B2$fm=*g@YOclC-k@>~e~<3v`#=23 +zXH3>?#Ag(LFtJ4Ksr`hNlNihf)@giumb7djW@8SVZOivrz}K(-v_2~N67oX92DR=9H5(+h=ge*S +zc9nS_;ym4D*pBnT+0Fdz=&}YkeQ#&|r@EG3y`yXS<{zm$>odspuT5iDbe?k7%~RWc +zbxUZg*s6YoenMw$$_BQ6IuqC$wU+M+1yyojCEt$I_AO6obAofTZ1kk?P0jke{@}ir +zd&{F*>Yy53%pZrD( +zXEutjQf~xYe%A_!7uzLau)LP4L$LDE&UuJho|S>fDWvx +zW4!R@%sG6!gnYzY-yn_PRK=jJ@D*!x&9a{v8Vx4k)TIDxKqq$~V~+ +zDk*ychnZ6hJ0GWyAm?deGjbwl?)rRib3ZZU=YU6WYay?n0oSc>E^Pl8;|gpV$1>-6 +zTRY@gaM$)Va?sF0=p=JjyYW-OnIeu8di}v1dOeF@A@r&Q)_VG-%{UnwZ3il3oXTi8 +zR#u_=H^7B{zkC6Cp&Igx>=}V(7JB9CLR;UA{4VF6&_Wlx2ktKxh=^lxPzPnGbA!5j==Z$~#v +z|DJsRhU7SbYZ@=lpQB;9YY|L}g5^n5d5ll@TQe+UhO{7zrw9lJ;1gCAQTHE!-D(y(&%ScT2XuiLR{}}1{md7Y-U`~ql-4Tz{bu+Tg +zg6xSdg_ir(iFqQ|`$PLV+Z&jrZ}9;qf0?HN?Mu#5_Z;dX^PJ5zbB^2D&aB9SZyhhM +zAtv0a`LHF**%zI_8iCJ@tpy*jD0XH)nY5F3vVMoxpx(zy7>*v@IF#~Nk(N_9`4`5n!uZ$u{S|ZwzpH-B1lLLS`pEiZDA-pPCr@L* +z&r!(@Jj_}wK4w2<-LfcKw-2e1pS?kktvCp06$1T9DpvijPg;;}&)8`(QX^%IG?@-- +zSByGz{c>oSmy3|E!rz&R436@5oV0)w0@kim~sYoHZ#4`B;B)w;p2qOUtu_uy4r#aDu727^*&TZ1ulP^XFz +zyMR^Rd7$4Y?=swDSNDgI>!u3q89Y9Kt!zR!#2!}RAXngSF}Rnwuvm8l@@2)gy6_#g +z^w~zAqs&j@>s3#vaEg2NgoRD5EK`hQXY;oVn?=x-S`77XBaVBEm +zL}2jK@PovrQg`}2^x^!WUin5s-W##S$iw{J2Z7P>)~^aKtH(U377KUIded;BNr@ZG<;=Dr48q2Fuxr455RaC&9}AIDOFtsMFc~N7G4=T|#orOgZ<`JYy~x3?gI@R{i-BU*zu*_Vh}=6W!6uIBAis>_T{= +zp|tni^2su`=;(yt)03!|b3x+39>;GKTPAaLpH)i}a}jtnEC+yv=O$p0b0p`&awo7L +z>uv96{9(r4z}%l^?g?Oz&~Ib8q4)AYm+=s|i1IuO7f<|lTzr!8kAjN7UM+M(caPvAi7Ws*<*vWd5oQYdad^3ads~IO%LOx^3aF6)FDaNxzFI>Aw>jjD1 +zqHjLiHkv5(}JBqv-r>#}%H1Y_+sGTnM#pU^2xNG(!jP)Wp^D(uxUC-h9MbmP5AMalG)HMGq?~8MC +z#pe}@UK8I(zSW7DE}t|$)$JVRd!mqU=Pa1+na`eP8(a7x^b`J8wiI8VJ@Nkr@9FQT +z?znvLSIDO9ODXuIn(v+_rrs(!0QMqLSKig)hl`IQbw!`)dOvpKEAek@$&rC3aA?=3 +z*k3p@bopTHBJ$!*DtVAIq<}Z4;ax2>ma{u&)A&=sn*D%kLwAKmCkJDp@LJ0HnWNzJ +z2;a2G9OKJ(GKQ=zSIy#)8>Ib(s_pZBwXJx(Q21SViu$n&7_Y?LD?T)p=!yD_vglT; +zS#>Y$ZDLQ*!{>5d_LlnIZ|^Y{eX>RA?;b_3Ti9R~JX9|_J61zHbQ9<4E#jZR(Pf52ibVUn}?qPNxeiqF=#vb?wdV)W+rs@`~u +z+GhO2-93W)kj+_e_`ZU-=j0olpyG_^ylxnGX+9SZ)yyjuaO(-ajOLv^rZt;a%c*0t +zzi^7Z#8XS?pLj0turWByZ&679ALAR2$3EMUJUT%8Pw(vU(taL)Lbn&e`={7b9%OH! +z_#^gLyTT^+puZpedSh33_z%0nJFo8w-`Ud@j^c|&W1i+H=fGUA<~3*V?Z3}of*44~ +zdAI&$FFrP?Ir#Qe>)*p`*CR)t2hTC_-)#Ip#!CEoG~BtJ^)&R^(EZVH3Ro=sN5&A{ +zuv^9a$)|pSzs@)z`EKk8KC^sp_&j)HUd6Jzit!TvD;jRB@brqmU>@O&O0My7{AtFN +zc^Z`2e)gApl|M#~>WqGWerCV27oYlV*#Y(sdRBMD{KVG4;{h-H&QWso1EO<;mkWE? +zW^~@Uf@6_c+GdT_9SO#kF%#^^th;S*kHMeVp1K3O@F#cm$Zuk&fOV_z3w$eU5;4}i +zq|Lr$oRd4qYxe+`e|Th8OpmF*hMC;vi!BPD#-@vr_^o50%Sp5Xi$T_(C;_@-EP|A{*2WDQf*_KIG~1w2JrjBl>C%&`UE#D=)`z|G|r +z_w)C($;dw4Cdma?rZ3U)9gVEeAXug~>I*S(7_-Y4)Q +z=hBzpKl(wzzxY72X#juk$sph2%f61woX6WMsf&S7v1hz(n!um#*bp>8doUxBEq-Wy5LH3Zp4|a +zUr(>`AMa)V8TNka_x1U}P8^*nxRJR2sL|4BtTVC$ap!#5y*#3g(|h26j+K;F(xuupZCY@OAe0vAg6YpQfJ> +zbtTUmM`pyw&B`9?dMljrRkXhs4u*vv(SL>cjv*&e`YYz|FH*;1zq-^Bo%uCj5PpBJ +zzHgMy0A_E^N0J!}iMAVXF`vi5_~t +zuob}+mpoB+dD-InsviPwa_% +zUc$+u--^+Fde_Rnu(XWV$3DYeWOxUAxPtJI@~w5pEnn;O^R9`%Eo$g~^w9lw)N($@ +zz98~O`>&5RCFM7jk4oNWe&U%2Z&VLhmP#HaH!N%4QTE?;ZED(O5*IJyd81-2Jf9C6 +z0$!O5=Zr4GF0f8$_Y7UZJ}mm`_XKr&lRh85(R|>pD$DtS)pYeia=WGUHEG{jk1cQI +z_g8W|*EQ|>A$=UmzyG%V$Mpm3r@NEBcQV%bGA8&LW;}r@P7WK~u$P9IjqxOBlr=K# +zdoSSn#Zte00q=q-{Z8g|fH|oEzbC^wiBg@sg3dvBz`npM`xRbQ +z6>DYBsWb9fpEL4#{#v}bk&C^#>t)XEUO7kmG3np#@j0>%zY4jD(B8P!o722kwO0RT +zv-Hb;FlU6ApR;Uo@|&=d>ma_$rM&q*%9JB(&r(<9#Jrcofl^IN5%`YLXW^Y8 +z?^x$e(C-WI4LPIcSI7rrpD&3KSnAl^`Q$?A;U1%?Db(`Qy)~Ew% +z@ihfsqv%9kzJGPn%Hu}*5*$e^W+3;Y;I<$i#raL)3G~|TD7@xDR+Z25fcWUlnYCHI +zLlGanc;9FKOrA#ci_KV)zm|Q=8b`L7ta`rxfQTz!Z&D#?{Zks;2nUeI|;4L-?w^2h8%z4AR&&!^G@VLV9eZM^cMJ=F~>u#YaRSCX9E2=cf5kk{(^Y8FrLV5VZ4Iu +z7Gz%mql?$-^tr%T&`T262#(#o12eyG^{#uJHP5@eaRL3f@kV9(SHK}WHJ2X@<~7&G +z$b5U@ffVu}crNI^Rq%l1^kY}KxV4OR+P*zX-@@0%>a~vK>m~O&5)ExWG`-Fxze7Fe +zH3$G2$n(>dV1fNwF5@h#7oM +zepi`Rml7|1m*0m(#*bIBx6ttW$>X4R@9ya|*mr|1=`d>jA5rT%vW8;sWlj1ddGC`l +z#+?5Dfc-vm`#;WJ&67(khs}MhqVMkPP^~%Q$e)q(|3M@6MES0pxTv;8@ +z`hG;{Ja2~1BI}~}4CZ@u343#~!^ilBb!b!nsd$C)z+24kP3X~HVI;4=8-G~sMDNLY +zKl7S5_^iQYoDX)_O69-VtDFm<%iphGtFJ%2X|1!>r!=mAsQ$SAX3=%lGJVcKl;179 +z&sx1;BmU{ea&SVfN6xpD-%cAKjyeHeUkAT;Da*MSo(;~g^#@elV1iuV>(r6=S&q4USGvE`#Qw1Ob60Diu$&cajange2s_LpZVnXl>D!jrgc|O7Kx7t*7?*BBkfD +z@zq+T1w@L))*VGlkJ{n|fhZ;SH|AQK?8KnQ +z()d`?!|S03c$qb7TN390CY$Vg!7ek@GlK%GA!V6>l@2|mUix0)yYMG=#)6WFZWG<< +za-`1zH_<=RU(3Fbz~zjgxl3*m^E{s+SKnT>wa|bryTFCDXan!PTuoFiaALkHJOf_m +zEQ)Zp;5ana%bb+{?Y?YKGHd5^ko7BBm)*>o8R44<4RiWCwi(bbQ|O0(P4*vnkXigG +z>F?2A<+Nux^vf0B9yBb0H_L>E&`0Qd3K=?N*VS-z)-^<3Bl3%m8uxjs+4?i=ln5^f +z4@lb&oml{#xbKuY?S(FF$h#4x_u0R>yxrBQ_k|~(dVm?xO<~Fo +z!5fixnKOy}4#6vtZ_TWU_{^1<9>KF68l18Fy*$AO7=lk&+n+I$JFq`F2O+(`Z9l%R +z^_5lkGp=FjUhX}Q)L(RDvoaaK1O^F?it*s1wB`LCHSrwxuL^&*Avf_7%yUL#7lmehmrOg%Db^>x2!AmAxPkm0)`Azq$>dq?i{%6GBnBlVQ}h1usdj5-dVzZDoFN5f;A@oQN19Hr~& +zb;jv>{sBJ)`{@__k#*o=TYF|t*`&}157UO!Tk9Job}hJt*<&kk6>TE8opCw`%G^dX +zX^llwG(8^d(_APx<(*@%C$b{C^L^HH39s*<9)h0&MicwH#nw@`JW!a!c<5Q>7=8}F +zz2N9@Y%G-e2w&;-4fsFrMV1qZm$qpEXW{u~Xys9fv3s#g_n>b-g~uH5m=n0HT}U_R +zJ7rugxJGa}!#NZl_(00Jz}o{dp#|gFX9fjxPBSk4Gwb~DjXn(=9bY^+*mg2d*dX!f +zw6EG{tnexX%6-x?Hs?lRJ@ZS_o~LWAKY;S|pDD4)JZ0$DnWPEBi-SGmEVv^;9R> +zGicL8*?Qzv70~O!PQq8;(dh=agg)t*RN=^&d@~(e2p@WYHu$T`oE)0WZ`PB9rt;)G +zvk>dN17gQ_(>-bw{GH!>xeLF$#zp$szfYN>e^ckZf4gLg^vw}_Th7#CkN;M|u|w8? +z$bDkqDZ0`Do_nE<@o~o_xu0I>5pt}WoHB%Q2z4yUWK3(@?gB^T<6}t&pGZ23E=l8) +zB6LB9cVIVPtekmvUPT%!@6howXCvi0;7!AA#{R)h6M!aGnqis;!^pc@)q7CbwjX3| +zjMxr=Sj$#wgC``tA#KAKJK2QlD*M`jrppSCY-kE8m6g +zAJC`#Wxfg?C;w7>vP-ci`l7pEMMutDXzU6AU&d@9;*S%O%~6$)(El3PDfC~1Hpb-i +z+s;{6f0aH&`#{zgJ_;N!X;a;-X`>#@Po;afYpmDEmxdM0^ki-{^xofrW$0gQ6==yi +zC)>9hJ(h}`Gb?MzWF3_FanTW7##9rrMFYrmnD1i8d;}h!+I{v7v_s_E4&+_F%UE>} +z^3ItTTHZz0#ik46`$1l5r$C{=5?w20hM5ERKzmPB0qa6okAi-Qz!Z4PfG7B0Li&?- +zxtWyPBzlJY-Y7k@j&ku4bkQ@4^;A9WuQ0*G!MPIe;-}0F^$zAP^{px~j7pQWLY}Y# +zJD|6ouk?`4FpPfUyAhkPjr1PUr+QV;r_9yaj=7^O>olH2l?!+#}TLLqva0vv&aGVpKc#Lcgx&%_qp5avFVycW(J#CCcg8q +z*6(tTVj}b3GM6r6ym-c^gIlg8t<}$UJ?Huh=MMDXr}{HveHnK~Xy&>kaBw1i9M4+U +zHgl=xEdE!{*<}8BfcQL!xl(F{=@LYaQH!yZYbj)&lP6t!?_ds$vA<1 +zn8j)xafxQ@di1Kd(tDQm<+pgy@v;~80hyy@{o4Jixez@!@to92$^*`D!x2ov7vG#a +zoip7tE0Z!F7*>uQ708>=&td#=SYT0N(S{d{O`;D)uLo52VQl4=KhP(R$eZ48d)}nV +zRP>0f84=&6A^msl5WOZt_+sAMj01qT3LIn)rTAUG>|V+LljxfJWpp+FU!d#TopfzK +zYSA_2>(bTb!cW_8=RaO_2G1^usXHcywJ1cuN7t$9oHajf-vs3g3 +zBBzo0ewj)H=b_VzzU(P&pJ=%3`3*ypQ{45k9C^7H8n7R3c{93Q_P2TEITDzO +zs#xgsyq)G*ku7NM5V>8*d=Pqy`GJXQq}dwR?VHR6gy^rOEu(-NNSXJdCw>%_eh7ZA&@GK;?|^>mdrLoR(N65K2u_hS|7xcZI*4wjFW$PB +zywaAUJ6Fhe@_DGsQ0ii=9SUsk*(nQ$Zj<{c6*iTo3H-($q2eaW^U@b6zAO0Z3}^Tc +zyh#4si0^W$k^R&3n?`4t(O$hCe^kasLp; +zP7@?QYjtEjxluJ-?`M+pZ=LGjWuK2e_cmpE(x6i4Eqg9DxYcA&jC)Wv{wO)`7C-3n +z_ptTkyAMBClS@s84<@;Rd#|iZq^!@l3rN~Y?B`FJr~JBQVYl^IRtjrkrK~o$nj&ze +z-I>6P4?rvFBa~i~J0-}v<92>OC4FEZ1wSx81X;`TgxzO$@4pFZMOXX +z1RuPVBV%gejicOSqSx=UKl#*+Gto!0IFsmF&PSQe+4L^GJ|J+mW1`gkdg#2@wyz^| +zO)mQMW9X@k=&4@tQCVECZHp;;1HAbTefnN0A0AW03m#9vH?sFZ&JOJ|pABIit>DpHb(;9g}GyPTU@+pvnW +z7Lz;r=zD*YJ6y}Fz%jYQq0e_r-oTnI^cZJj>$O_r!7JGnvpfu+W$54TwqU|Ujt4O +zI?Cwim^hp`;yJS*A^6v~IO8JnzCR)OKJSCA_op1S1+7wdi#}cFaf_*U4C&6ItK|C{ +z;3ucr{Z^jrQD%;jc9l7Z$lSH8?P#ye=e)a%uR-fRMv2(Z5nd6PnqL@;39rcdT;T@~ +zw03;hGcSw=SLvfX7y0htdjMT0e(!ABZ49uoJJ=I0Puk5VdY(GoN*$Zw8|HB0vt8~B +zevawH(~c8`j@h(t8+DiTlZiLb+j7=>GVQ?~jl?IXUrIXYzuD0MeZjvc`ku4fR>pwR +z9z%^lp^Qnhp|JzJWIQ6@Wd2|%eh_Jkp|r2q-cm;7dp2$11s~4QBfUx&JY-%?`W)$N +zlyb$UA{)udb&D~WJ#NG^hQ2U{?eUDb=&>3;YxLx1&nkO;7VRQ+5<4u~PWlb?kvrbC +zOqiUt1Wk3mwKC@)D9mLIE&GgPchC-kzwl^sfObV@L@%HdxOdL7MfLb7!(8o@wZ)XR +zL+{6svo$)`UjNLdpTNonjY`F{eA9UIa-g?g$cW1rG +zyq^=g2+nesR>Wp_mv)qMAB2u#XP9w;3+)%Z-?k0khlx$+Isf}9Vh^gDeX(-ixAV=8 +z#E`4xFmVUv$-3ChDYd?=67+r<*Lt#=iFXA&LGR3zO(V%)zA#143#9N(@w$RYeauFgH1r*5Rb +zWiCp1H|%1bo%u#+*xo@ODr=8~w@mWy#qTN4iZ?s%7aim0X|1ss+)~c(cywMd-*uf{ +zPYUMpTh^G}bfn|{(WDps^%O8Dhq(dKXUQ!e3ruZ41_ohcr%QQl5t==kctHkd0pk_c +z21MumGkK-_26SpOb5}!{^NEx#<;vcWe2!b#1_T9-tT7E%UJFuBo +zBKOjk3AClc-`CC>OAlk*OzzNi?8a{{JQ6oF*bf}DiI2buYnl$x_f<3l$4JE2ytZGF +zPJeS^u;UM$i^6{2M@n5m@q4c)z0`5JO{;sLm8?7Ppo^qW*zreTpqHHi=6lhRavp*3 +ztfX<^3l<)AUk9pvs*W^U)X*s(jA3MH)b8YQ&4x{v{1DpH;&r>$~YnumM>OlXsrGhWK +z%J@O=KYf9Er&5=)k$L+3|NKLoB~s2AiS#`od|TYTd%yQIXHL;R!h6v=uOq6=mw>b3 +z5N9({_6OAA722o|Wj}@={W0#^S%(izX!Hnv)^*S;fIfZ?T-JfhIvbZJ%6?dJrVaBg +zrEdJ_lrQHkjsu4-e-{ +zZKKJ7|h>3|yzjq1?|kzG+wj +zd&9%73F*lj)i~u20R5huK64rAL!jyB&?SIRaKt(_yj|w9%T{mk*!MacON~uU*G}K$ +zGy{cKGdH%zO97%J_BF2JWz#&fc2536<|L +zk1G9yj0e8bxAzs}gRe`Q9X4%JN2);)`uJEUC-e~;F%$X>fhIyD=ux<0e1JP6y3!{M +zePlkwk(Z_Gn5gS$oiX|zV~HP8&%@|He5IOx)1cpHjPC>2PTSN34cl(2SgEbEs&TEAF#mVJx7 +zZKU&X|ESgevR6O8r4ZVf=$)aQeHxkb=+R!x>s({mT@JpgKAF@f%dXE<@a(7in}n8+ +zsfXb5L!O4{)QO`1rQH%+o}pi)4F(!^9UVLq$t&}^*>)Y}?A_=(o(7K4#L=ye>C{pD +z+&5Cso6gDH))#%((Q6OAGAG$zWi``}BQsfso8J=0{xk&-8gbScEltqZ5wEi7le6&q +zWl1~c(T=70rp#4k<#XXzaso-=2$Kn5WEp$vQdF?;?*opru87X|Lp#`-S%O +zB~7_TzX10JYo4ZmDV}L;O3{2cMDyEow*OT0l=L~W|8Ed-r~OAgoW&E3e?;$I41dwN +zGDqWx!hhY@#D59+d%;`N6TBybw}qpe`x(#rDg2q#&qw__>yyxO5B0%b!ZyPXV$X*} +z_aQyCk+e@T^c7x~xkhQHFHJ|ek#rH8HhSM?du1>BB{%&NcZL)>cS;?yXxo%LvsLVk +z9f#%oF4Zy_{r|!*>66vO$`JeJ9_HSOlhQY0AFZ>`iTDG4IA#3oV0eA6_9OB;pSyg5T}44u-b^vZruBQwyrSP@(D9m? +z{>*F0H)Cd6rsR`6d&!eJT@88|mC{h1$_ +zm-l;x_&%J0Gy}X|QGKrMy)-qGItLd6^BsfpTCfi~Trs*0ej|Job#LpLvP+TA5y?)-^F`o^}~%q`ArODF!0d5nhr=p)X(#n|5}vb(*v8aIG5VOdA1 +z-^F$`=>Pun4Sk2Iw&}9S6GktG2C=>+!EBW~eD@AR*I*O3!BYkuw>km0}l$XJq&&_?l8~w8R%rMd>}WKGvYG)&7!OTKGYq+lQbHyt;2#3gOku& +z8FOXayu1m2s*IyseviNKOvl7mX(y`=!>NO{Ho(PrsF-|7uDF58{kW@?`?zF`C1WGn +zj=Q54(Uv!(bGzOdrQsYJ3Y_?sjpRQiJkU*^6!jW>XF;noL+D`5t9=A50^HL)c)GjY +zM;(1m`hL=R?y~%9DcA}6eKUJ%I9Hf))N1{{)!Nh6L|!d34-~Yfn(lV_rr(>{JMa*3 +zO10+*T;S;VN7+jd`TayetK9Wa4ov;+X9cauZ>#?OOo6PUI`P<31+9+&<3gTYQTcyG +z8t$9)NAicF^8cow72Ea1D=!tazDWKH<-Z=4e}94O(X`4w6qWaFJMR%I?}f6%QF)IQ +zu)fO9dps)dM>gIk^!IjMms2*pvjyVoIq{cs1;YPX0{10gbWmqCJ-@xXA5q#%jmpzB +z^{5%bSMAbP%FJ&Uy=h2az?q%~J1!H7J&DfcIi%h<$n@xBm=_7vg5Leg{98 +zm%PMlSrA+O*9WBkvFy0x{66`JZepUmO$ThsoZrDfDOCfZk|+ahy>)mJ~I +zf?Lt6GRG-rH9t?Aq=K(vT;YgOCyYB|TH|@%Gd@M@I?*h=G?Z?a6 +zaa%*c4&WCO9u8oq-H$DZys&msE&nEc2K>`r8f)i!>C)g0x>)t +zP6~UC(5;joFSf$TC?8Vv*b3fjPeEoRO)h1oAP2(lDYWa!?zWf6-pCoP^i>w#4~+<3 +zNxMYkFJec{`)zhtJsY)OtT{rP44XEiI%(s9HjMMy*W>R44~^FaoM>~wiSbl>sr_9s +zSL!641N=Sk9kiF{W)Cv#L54lp2if@BJ+=(zWHb$P07KLK&-epZb`~7s=3Xe80ehee$i7~ENC3Fk9gGq)8IyRJ? +z6+V-`n6{pnl&6CF%=g&N^@c+jGe5(bR02oria;JVf^rWWio6E6GdnTRKWLCl^0M)LjO+;aLDyDUr^fi1y(v6J-(lxCd&{{W +zi7g|+NAM6{d&jBtd|ei}oq2(?m}RalZ(?N`{;1P^tv$uBu}(>!WyBeM;_C@h=8%vI +zKDYi~cJ08gafmi*&i$8Nnc(bUOr3q!wfuYVsK`K;krEWXY-b)*=Jo188*%@Rz7QEZjs8=tH_3J-eb@}X>;Jg&4QtQW +z(3Yd5nIda6ktOQfo&@g=gP+3eEATRRFHeb+y&=y!nOBGQ9kfv;cVEE-@rKBHmGIr* +z7I)-*`taahY=N8MLC)3!_k@;?7qRuf;yz3b>(uZI`f(2V6UcueVn1ya`$=?GVoL$v +z{)>2#jg*;lTe-7-pei3WC=Z%@*A6PeU!u?53B`b)8WZG<-%Y7A2k5@;V&f3eVY$+_ +z$XGLU5uWbeS9iCyB#*bZxdmE1OJA`i#M=9JkpYA8iU+&hi=9=^S-823TS^%Von$=G +z6I>}*;#X4cS?VS4S3A*jjQf)J_i9z#&!K(tM+Vrx@8rxnt3J?{@syK0l(^Tz_8Wgy +zzG~*OCC%WC1A?WDv!!eqSId1|GA}7@F(i-`r2W{l&%Ga{HI6w&FSRS`W~l7L=;lfC +zEdjYBeswl9--|wPV!Yuocvo@D1Mr)q&&NL&hAz*h(C@)Z(uZwFKcq6A5x$Y~zk!Ts +zz21Y5;|p}BpYwi@+fF~#>KJK?-S>>(Byk>aM!s6Vvh9H3BfT+-eLCdNCXf0G7|?99 +zI+ok6(9dFnb(wp!zd6Q8UlJ(Hv2lv@As0=b@%7Sce-~xvvc4x5*e19N9WMs|J@E09 +z{!!NQyvI2HT|J(+><8@OXPRl305HBXKYh}FD?k0)|4x4KAKn4}FLPg%>;vr%1H1g0 +z5Orw&k~#>@@`16zlsiqtpJCM>yX2VwdA(nfSK8W1-kgcT^VnRP<`(aFp;`3!E6Of# +znw@g>J~o2Da{wgZXS=RlGnbEqUH@-EeYOQz11fNB2k=+Gbnd=dH^yG`| +zNf-50W|wj@I?IXR@&dSg?K1N^{afg%%^ql+V#r-ZR$H%!&XM(WqF=hST~uC?mooB} +zkLb#;8+Cr>b!Z>@Vsuqk7*RT5b@w)leAD{TUY8*G#U@d-eUNpc7sKbP^4`@guTIZc +z7d<;Ek{3O-8XdXZL?1=`yFw#_K1Fb)U)isY%+0e{Lrox^aVonO~=#6ZcjajF_@!k)d=+W%M +zgWL=8Pj%6MR-nq_U`U+cDtw#AdK_^1#7i7@Tu{cx +zu6Q$ZB!TtWdLMQ4dy}M#Q3nK$_=8zPoUZwQgF0}YG1bYHYUe*vg?_4K3-r=_xzgNu +z9$OnbN7F*=o$hJTVd>(Jca7j)2gB8`)O0b=I=JPfi@`!A~TPH2}( +z$XC5)Z&WF<8%Okt-OhKZZ;5hMDrjl~-$xJ{IlS)lY`zOk&FRDwbi8TB3r)?Ni6`iI +z!-^Mprlx70rl}KJr4j@egFI4J8)>5Bg}xHcc)HkBE}c*Mlk@P`rz@E+D3dXS(&vXZ +zu+PrRn9RX_e}bO_pCvq4IEi~fU?I-9KsG2x_faczcAn?l5MXKAihrOKy@8K7-9*25 +zC*zyIKkuE)eJAvPy`Vu)`MTJk-SCK%*<_a)8Fx#&N6J&+_hscp=kefYOHm2B?Yz)M +zjZlLHmPaM&`Zj~3njVS!LfSz+q}6df(Nlc?BFiP{6Le^C0J^e2Thq{_?Dga2o%?#> +zdxNK}V-tEMD`(|;zWZ+SW=b3Qz^RFL@hCN0_DeQFSAO?vg079ZvL`IQ$d5O{ +z%xt0^*3%9`lXcD^AIkX^lIAC*>5=|D@PgPec}bjw!QRsC;P5*5m@-BQrEYRT!~7)c +zJ|PqTj%%a2i~6*`(M!eQYcI?`#2Q@uiz1)cIK_`puJFzGfq^cY{j^)f;iQP)0XmpX7BiPaXw-Q!Ym6M>1IjeiI@4t_uUt_tQewvsisu9%mG1p=<&Dx?O! +zj~siTpLrxLQ_7YynI|h|twg%mfqI@=`l%?s{WD`h#UJaw)i((SA)k70px*23dgoAY +z_91M7ciQvpdZWAAeH+cQdDPnpJ@ViwNgn`bH4&c)zG?cL_&oTkTl{KS-;t+=>i8zo +z=c-|v2F-R}^zA+5Z`Zbr1q*nV&Q$z4`sbb%J5_WhbfGUdvxG0B?+`nNK9luXZRkaz +zS=%>N>t6Z~@jFHOl{S~VB}^ZY&e*t(r}Q)P=tKUo<{I{XSa+dIdAmNg`i~UqY*H_i +zat+FrGUa>pI==3E4MZ2qz1z(1r@z@(EtEEJK(FTBdQC{-X;&h;SB+-i8t*u|Vwd!9 +z;ZzmOLHE)R|H4FWeDH|}xygpU&CtjZnzE@B*~t#2e0ZGiXPl~^_@lg0@)aPRmo&*L +zv2q{3-*LuQavyH7qKstV?7%|b~(S9tw1aFsPaqKnL<4Vj|q+6!+u_kYHjn1Pqh;`DIc-!B#iQjB9z`}?;G2EO +zrO&b5P9G}rc+BN~4L;KHDD9GlJPJ%N-yTNxqUBNIQiw|hj__2UunNv{1P;o2#}7DX +z;P#kTAAFy6ns>&$^59FGW40ZG|286*AJ}qv?8xPr$6UQyq->c3j_Booa83`^>>`71 +z;5&gYIx#gy4e|qrvzOAD4<1->BsJ4>F7J(O;IOW$IHiwOHw*tuHU7dk!ZRLa^_wAZ +zclNe%&w!s~4n0HG%evG5MEOG7?skFbKOZ!voG$v$4V`kJvCu~J05os)8Y*Za6Jg-V +zm~T1l%6{iJy4xVX#Rv7z>X-i{59Co9@{d2Er_|M>hG?1aQnyF@sfD5=_%kEAaS6IH_gwxPB{uDZCq#ecayKw>%frBWC*;siskgx1n6H9)q+_1HWec?0 +zXyP;G{Tz5j^Q71icAuAiG1^Jr5usfUv`gjPxIjA>wBt;1Xy=4>&@o;5E$Oo&yt0=v +z3uu=|X_xJGyI8!Rwy6wwk$x$k-y7ileA-0riFn$kdrvYW`64pYJ)hv~j^`dr_y~R6 +zD)Y-O_+~rs4%u>fJR+Yi=YjLnRQu;Exp(~$N3i?a9?^xe$5-^rYUF>>P_0ZvE|) +zP3E^$>n_q6;L5|O++Ra}#~9}RqUtJm +zcVH9lz&?=gYK-V=wfq*wBZqGtHfSg?%x|He*Cq{b?ydUKzb_CRy2JRG{z~%gK%WRa +z(aU>&Y3)bqp7yYF_;~TRci=Nk*a72s`IW0Tagm#B-9X@E!e>j#0 +z1n$EQy+>rvc%I<7r^S9Aw4eXwSdOMHmiCi+vy +zu};xpSaH&3Vk0SNF7%Z2BHxNM@~t~;IfFyDS8vCH6}*ypKs}BGN8!EOUa{;m+NxOYHVJ_vXXv*o+F0mwH+9#0EG{F?wBlqAlQm+k +z^WiILYtja#t>?%)Ja8?~2>Z#?JH87*j;qALnfO5_>N-&K#YV +zlr!2Dr$+Zma*PI_pofraGA=aLCreV}@$_qK5rd{V$|!&+C72 +z(pO>c`>^c{d+gLqxnkRSRt+EI6W*pi25^&AeC0B}C8+q>5+^!SWPGnPz8~j*Ax;i$ +z>v^@E$a(+pwvY581JjvDVeM>TU-Ajx8b=#5%h78A^m6n#R(!R4oQahmqHm(%h~5!6 +zvR+x*Fv9za@w3?tMhIEOUR@w(twz$SDBCf*JY;IQ_=Y8|z@G$stK6ZsE)NuXz*})w +zrykoa%3*C&?#}jZKAE<)3j-TWtJ4{?q# +z<1zZ=+tC+$fG1~AZm^&fGe${+g@N(7! +z2k?JW-oYq%`&H<&3-ASQq#OaAF>d^XiIXNz$;`^h&C4&CVP-6hiu0A0mHQW)8LO0A +zDMU~I;m%Vkj-Q1^IkP2Z>DAVFEAo6ayX*TC)2;VWcDgb4^H=sW-%jtw*(UJZ_ItVg +z9OQ5yYRc@B5}P4qD@R|ap&Xd)zu~AbNa|F*E{RbNx-$Fk8Vl}1 +z`{}ixOYLW^{aj@~1NJlNE1q}S-#33ny03!sfSteDem-G8pR%93?C0zD^N{^~+kPIi +zpOJDt>h?Zrrd9vQ_lrF<>~!T`D}6?p^_*@$XWGwV`+2Ov`kvWnJ>6gP+22k#%6{f| +z%eT;ekHEdyQ(Bj`9}0U=;UiM4*%kv(VGFCv2*{=yMHovMPnber@4K2om``|Sm4$ah +zw`U~&sc!LA-QFYlBJqODe+QrcZhnf_;t~0O{CTT>F~72&8FE4je_!>??3S*$+xsf} +z{R#W|y8U$j(t@9FKT8rFy1d*u6EdXSrJe8NO_Z|AnzLq +zcM|R*^e0Zfq2XN98<*`8y(T#1WlWfm6rRu#PZ&W^uJKmLQSW3pR&?B@R&@MEbzBnQ +z=}gUDxsfMjyVT#DD*WEc4hbXOD>?%CD?1({JVm&Z@UXMvlDl}Sxd&s^cU8wnz)}Gf +zic{k|(p5G*OgW|sUEizYl96H3ZBW}MN*agiWAc393~&g_73dR?r(5-JQrmI#S>MzP +zANF%J4s|vC@-7F8Izy*1R7NvtrJnu4Q*d|pTG5dNej^A1xBp)1NpMWAW{J-q5|un1 +z>-s47x;_i}ey3v-c{f47O&u{jC5#{#_V10v-$hVvLT^GJLa)xW5+86{?~qV=fhqKL +ztIvS-Sx0|Iocabq-rX!y9-(gMc{@1Y-VslTvBUT7yz@@^{nM5f?hv^hoUCv1ly*~l +z1Lxhp4xB&pLdTxI^aj@#`-w+?mw2;gYMTKNj=%rn?s@1^uNRB2U4~ +zqyeP^OCiJ)1`!PK8%BsDMA8Rnx4?;rs}KK^RGpcx4!Y +zoY`}_q2CEuJJ2j8vWa5&VoyWT!mH0zq{)Y-c_90Vu9 +zO&HaFS4Rxb48l0Vc)~$lQ4^LEnyD9Agm&+CfrI`OBhA)5`2VG +zLOEe3<%o_jB=jZ3Dwm{_{OGua@;!qf&l?J^%awDmvny?`O6yX{IjYn8jQ46Mp}8SDqHF=t28S8s||l$T}@rADk{h`uHtK~ +zs@I8)rG8(zvAD{&WNOALiO!Q8MKg1Zg2KY7z#wE~t{S8N^EGGAta(PBud1T7&eu>; +zQ(fk3@EePL6;+;CHFs{FF@NT_jq9(QGcRv;tjevaX&6WT`Z2}|e_cJP`vA%S|RHL{s*BF&nJKCsk +zsHmzkYF1YJ%Z<|2#>^XI?Gy#o<+U{x)eS~o&9Y^_>T-G3R{6oVp<)`MzOkagS6bx<1D(Gc)ETp8%roXu +z@w&$9?tpw{4UN94k}7}ol7^*VGRCO$FYkPf)IjJ;tr}{K$_kpXq0U!bzZgmy{@Uus +zWl=RqtDnl((t1EFrtN`O+E~B3q`s=gdRtuQ_jkT6^I6Pc)n4+}`Ri*M>&pBk)XN|J +z(I!nAEK<`*orR3`4ZgYtKg`vczoNPIYNge8ez&kM^H;2(9hOqvT3=bEzaf%cKG#%Ntu|_F>gy|{u~t?< +z@x{Kzs)p6ZGXJugy4BHX4S$4bgn+TCd}Y~$lG-|dt*_2sQd8|Ofy!27Bq1?YtCU1Y +zpo;AnBd4qZygJ{n13x>iq(p;W;wxX`Zzz%Gy#Pqr-^!}|zUs!>l5)G;`mWeWdn=>L +zSKpv&8XMI0^`$hUAu@NR=8W2!mHxVUP?nY|s#)An=&u*LEL&DK75$?h{41&RH#AoJ +zkzO5x(9c8c^L%yXMtMa!lF%T`QCma1!-gwrsv3MtptQfrU)DgTzDOm^QCd|~RynGE +zv{AEIzpifZ*K6tQ3f5|@hQ_*TQAZ>wAAKb-&>JO%Me|Fpn|ED-ok3DUVWTL&ByVnh +zNzVNFB}FL3lA=5=Ow^c4ic&w)>hC#G-?|l3`}XattKWCVoSbVSFBPI5BW(o>lvnu1 +zUcIzp$9RFV`KLO@X#7x^kJ-1GN( +zs}P!2C@{9Z){nkfTvxNqSXw_mBO|&JUw|EzSE~Fq(;`>MV7Uk(npP9*Yv$~MuwQ~x +z59M@il+L`6(BcD#y|`v-q_eszEtP&x#Jfb(<*MlB>5?JBIGrgv8^>5#S7CRN{%%}F +zvs6?sG5o9OiKQ>K>3~G&?1uEGb@jDc2Kkfm +zjk0CJSICXX4D~e9YHfa&^j0P7d@Eu2y7H2S)wTYsq$?i7#}eNPpmoOC*&Sm~>1kQNX+pyqt#XndV+t`G6dn7qm;s;)EA +z8V!lH1iPf6h98KAm9TGGE$!D(QdVC+RTUQGOUp^;OXWt>iy+t+GrZ+?m$~qcFKrK?4B^Mrn;f7rm6~H7RWl3 +zzYl<*v$UcVWlBKzk1^;c;lT!tBleXhe56$R9x;NTc9eE4L$s{^2PPc@cz=24yNzyr +z`O>lqbSpI0)zbfUa{a5M6jVAz*^(u?X)Riv@isk+Es3kGt10uBV=7(r++t3nv6eddJyM3w +zW?^LiT;{85-ouNPY%-CtI*cr~n1@3%!uWVX>?U52`_*fSzKB|>mJ4wl7u(-E3d7EdYbw`d&Y +zuM?0`yRq``g8H}OMPktCKq#-HAryMBa&KH)mZLFLTf~oSS%Wg +zt|}=km_sj7Y*b*!VfaJmqWrv)+{XGssUl1(zsjn~+>#r0@B77XUx1D_rjSCiTE$ECuGfq##_$YU+~}U<`g(s|p0Bp3;#NOB +z|J>YIuh4!Unr~!I5MonW~eXEP +zoTcXl6~?wz6DD-N$12`4t}LynmLKCHKgR1Hc}pv5i!pF)Zv!oWWmMEqQ%4Q7pQNTz +zs!wDbj+H!oE9_mwhZ_0Ik-x}G=d+iy>)!>N$FSo!>%X`j{;UKzBE=Wk!=HRN!Q=n$ +zzX}lW5xfK@^tIn9GB38Z-tyOfWIto<`J8{4g1E$nm?HSpL6GB)*g+U^XtP0W?mNBQm}Jh +zQO?gkjxQM=esj?ar|-L=@$(xCfAd_@E$eo_RsEAEA1oW#yl6>$V8rT2?*7xi-n#9_ +zwfpWXX$U{(dEmy~;fH?kPHe!^eL) +zIrP)#oA%xE^u~|JJ~<)$(a!%m{qslv<@4(1&CA9ey25*6|M?Y9|7q5my0_*mn)K_> +zZ#ea0iuwHS?wz~hw;WmaKerD!dwRz3-JgGwaBIh@$yc@IO*{AggJbs`A8Xw9(Ms?7 +ziJ@hA8AI2otNwk(-mIVAaK{xR7G0D2@?7_ob>_?IzaQ}ZL95j4gdGVn!xM(Tnml;g +z4;+t9p4aPNjs7ve9lNi8pWRzlJ@s7C+KT45<$r$iK;zN7@2ji|+*tGMeetEvZEr5# +zbNIpU#2j68(}8_SH!cpnRa6%K@!Ufnm&_XQ`H1{qp8k`0|KUe|W*jYjqJ5v|vFk$N +z9kaua?>YDJ;@xSVr#-jj^s)c=*6yEv|AFUj`9V(e=nbczJpSF2cmMoH`GM+x`?veX +zZcg9!(bm5Vcse{^)gAj@!nnU)J^aMS)22Ot@~+7%&RlOy`t04Yr_PsncfWFc*{v^( +zTa)$sJ64>1ZNm+F-kiATwgVr}z3T0o%yUQn7IIg7d*92;0!Q!gPC0x{`S{c7*4sbd +zd)v()udn|woVW6ZC;QK9Yu-0I^SK|)_~Gt(x!>OwbMsaAy}IyN;QQAX-93B3kB7&n +zjZS#eb3)xW=9&RFj>;VyH~CZJ!1ytfw`6adRy6JM6(d~1HGk?ebJ>q$JG>>|_{>a- +zn>+Wd_^pc`9GZH=qD#NABJGpbHOD^nE_?j!AH0jt9W*`f`sao}_|>9EKJ0fx>EE9l +zKK2iegpb}hqJIA8ngP{+yk+d@m;PiN54k7*bl=m{Zh7^#Cnx>qtIelcBc_nn!w&nZIZGYnEo-N6TZ@X{U>8v}S{QT@)4Il4r +zdNF+K?LTV1<6o|P@|tg-+3hYipL=Y9fFd-FW|ez4}g(7bi? +z4)?D+dvxE5e|-M^rPrRGU3E`5#y9fgSN(robKk)4thjN=cfIjR8Oz=rF=_4==X$fK +z_o5r(`hB$Mz$FV3emv!a;UyEY2aLG-PW7j$cN-6moH}-q@!qtgvBi_$8ofH<@t1!$ +zeDU7I0co!{t7E@;%y{JRps}R~Uz_H6XYJ(h(Y}OAb#8>_2*H +Date: Wed, 28 Feb 2018 07:09:52 +0100 +Subject: [PATCH] firmware: add rtl8723b bluetooth firmware + +copied from https://github.com/rockchip-linux/rk-rootfs-build/commit/9625f4ad023b6528d6da7ec4c340c48a4074e9a2 +--- + firmware/bin/rtk_hciattach | Bin 0 -> 46965 bytes + firmware/bluetooth/rtl8723b_config | Bin 0 -> 55 bytes + firmware/bluetooth/rtl8723b_fw | Bin 0 -> 46324 bytes + 3 files changed, 0 insertions(+), 0 deletions(-) + create mode 100755 firmware/bin/rtk_hciattach + create mode 100644 firmware/bluetooth/rtl8723b_config + create mode 100644 firmware/bluetooth/rtl8723b_fw + +diff --git a/firmware/bin/rtk_hciattach b/firmware/bin/rtk_hciattach +new file mode 100755 +index 0000000000000000000000000000000000000000..4f23e8a49b2c407fd5c8a69f0db45865defa5040 +GIT binary patch +literal 46965 +zcmeIbe|%KM)jvM_0}>!WAgP2T;F5r%fe;eVkf04A1W+IdXpv|)n`FaX$d7e*1DkBL +zL9s@q6~$Vc*lPQzwSBZwgcc1JT6tRAN86y*VuC)Q)fyoDN--OV;FTu8- +z*Z1?s_w{-f?%p{wXU?2CbLPyMU)gUgSy5;*nV9^T*-S>zpLZ}e5AS17GG?~25%ZXh +zjY8T~mPG09!;dm{c#MfZ(ZHj}sy-v}ro8hS#bZMTdPb<}7QEL1Ubjs=lL6C1`4P<@ +zyclZ~PaDdjhw@V#;aDG|$Hbq7$hiG0j8VCiZpJGX>9I(s=Nw>qC>^N$af65(<}Ne%JSKjuIgIG~VTFIxHihB>Ql>K*Fd9-rOwXmaa!b|ruH;?RK|qppj+_wYD51;+X`00p$?MK0hTR(fM;kJD*#eV&%UCE=z?|b2E +z@4smEKl;#+cj1!_zh97d^=q>yjlZ?@&aD#y&ooRrxn+>*qyPK|HM;t-;r)gL@Sccg +zsxF=22My`JHo%VqKW`WM0OBXG1Qu(^pJsqb=jDg!>$*KJ|2dh6H>IyP;8Xj_52b&I +zXSJ^UR0IC?26&SJzC#kjo9HDN(myt)174;pFUOExWXMl?D?dd4Z3*B_aIFD&SdH7~sxD_` +z6;+PSPLE?Nb2~kr8V_^V`n;^7#x2}X)w~47!zxtC_{zWs=Z)8| +zMy(&%0E^&8$jNRe!IE4&K6{nJRn6S)n#xL6;c+@qUq2FjY`F1CFUyU!4o^9-H&)eD +ztEB8~>5Ap~i|v`|G}_acB>q{nkc|2N>P-WiiQNl5B;B>)iFdg$ELqqdRW~V}f>O6d +zx>-v5YNiO>Yd|K6+z-_R|~n +zZ=g4vj7EAVz<;9mc*dIOjX`<`y&=S%^iE~$NqS$!*wggJfb$H!lNo!C-Wc4Ur#GB| +zm*|ZF|7Ci^soPEO>lxci@7av)r#CwP0eZuMI7II>_!)V#Pdvlesp!TxyR4nFKeKi| +z``Nh8$2z0W{pz#3Mu6epKK9qxKkWGHU0)pdOorF#!Yg#)0$q5aE<8^co}~*<*M*aH +z;dos*Mi;i~!UGq={9HiTzw}U{{@mQzXwhP1Vn!imQnqzuxXy|0O8FL)ilc-yl_vB?9>M^mT#F1(2 +zsC#K%53?M?!_xZN5|%E8-2g_GiiH%yY>Bm;df$6zEIY#S&A>Oa>-*Ybm&Wc}-gDPH +zU|CcBNv{tD|1@MuO?AhqN>|DbDd#3(}8&^{%!D5qEsf*V}IC +zu}wVG69t;ZZGp~ZJ&h<~DxiwCa5(u`K~G-Fp`P)GzpX7CCR&a;OWN$6MHk|cZvxT_ +z+E(?HWFG3d3gJa#X)9E?XGapb^ +zThWDBL&2MdEQR}($%R9~cTQUhS=xy9peSIR1zckaBwZFkca)B9 +z`_zD|IsdO6t*(SZ8?RyGzHe&v3n)}0;_Q=dza!v!?flSJquK)C99)&uD*@O0iGdQ5 +zz?in7U=t*lgz(=GzMqG!X&<+7`LvOIgd7tzIZ`?P60#H2?~;^&V^!~d=oK?ZosYJ} +zDz_E- +z?xY_3Qg=e9#7j~V3eD4og1&BjFMnF?Z0OYp)Q@>q`k5(`NPy@+!gC`3$M%0Vd|2g)#Vpj`^y?9DZlIcAY)Z; +zJS+gU&H-KPtm?I?v2RDj&hi4+5_SG%bAl2J3!S0DyH$9e3h!0nY!%+m;Z~*C)u+^P +z-5Whf^^I;{)!U}p>pz|%eR}SAKxt7HUug6MlxApQi;{YQ@i6t}di3S)Q!;0_nsYbL +z`M`087JdGd)Pa5_u_Wqz0_+Q$wgWAGeYYv~cYV)fEbpm`qgu2&D0Q4|av?+Nk4{nU +zX9uIs$D!v=E~Fk`4j!p@L?2nzYsHvFV^KXXYvu7!!=bdUBT?s{*RWR(gI&(CZ#e$l +zzUMOzrG4H;_@*qPZvp*z!{oSy=a|BCBo=j~s?}GN*l(@X+2bTVm0V2)FMfNi+tvIl%K% +z-+G!$Ii;Q2p5I +zO8Q~v<#PSuFxdM!_9KwNaB^)LCdUtWj(d2HFO#eNGP&LnA=eGV&~|g$i!YPw3NEGS +z2)TBj^gE`jn0qyOW^0&lYb|gTnB!H<{TgNp$261VQ%843cLp#b(Wtl=@iZ#3&gGvc +z6v{sSm%a~d(ymQBd6Zk}o%bDdo6vm^Rop0*La#;@fT2J$yWSVw0 +zwCv0YDv$a@J#vo@QEqKa-uoaQOBR%{)KJMx*!B|*!i91ilZREH&!xLj^ +zao}u8&wt-`xW{UG!v#C3VXs!PH*xH1QFCZEaNp**MEQOVS5a}-aoh>OZBc91GHlIQ +zX9&KW)QA2m*{5fAmGC~@xR1SB)YG6+t>`N1*{z045Z0T^G%#cJF)T +zi%0GzpN+=C_}qjNK4Ruh*6Ci<7mwU#Iv;Nu!_#7N8Rk+^=d*!5S`Ec&aWXZ*5}iwP +zE}~{tQxhzd^9RQ%Z**>wQkpw4jrBaS&Ge%+ebA_bUtq5KUqATg&+or4a8_b5h45cc +z-13>nH1VKQbDh7=o9$BN`DrbTBZ +zDMdZmyl139LMzUQvLtm=Ce1($bk#A4MvPw`VYb0w8*(M^l?I_D)M{7Kxi8lA7_blUD +zFj=9L1g^ED;cF5_PfkE@G^JUO4Fx+cQ7M~v{S&yX7aW(lVRO*0sKg}9afy;OSN0l; +z8-dsiJ=!t69;ju^( +z>&>yCc@#Z7y0ECHWCHm$gTZvveLdn5fkA0Wcqdq67Lu<#6x=M`~_dbV@glcBL^ +z`0SB9c)>*r`3Ugw1=Q@wC!RTfEw0pvl=)vme}_i@SDgMxjlLq&_B_yWGm8qUxcZ*sUe;_9&&BYAL@PMXOh;JN%=5l!-K)-(^M9< +zAI5#myNCzkMa0En%%|2BbHl-4GO!6YrM%U*-6q1zdMEI?KJ^hw6EnrZ;J3Sp3h_kN +zv=Xy!v3^0d(#8#I!a`{6J=O&%8CIThP>)U+5nVVzNmSC{FOK3`L-OD}!XtW;%X=`m +zjMw0$?xLQT)tLLb$->-#lJ#64Qei#UV$>z934CT7&NWtr)74zddf#0`Hbd5LyqZ2$ +zO*gCXRT}=!Bk)aX`bebHs7ST=DkPn49SnZ6TUa5Ai{;X{YAum%De5^aGz&fXsZ%WV +zXV4^R+exd)rc+D;>7bOX!e@NmAm{IzOh~8`dzY8^H-F&5fd8 +zQ=27##(LiR6JRN>*PyY0QZ#5hpkxg)1B%xm6QFV3v%xD-hyD|FYcg!YdT6$w9$RRd +z#?b4VPmwIvgJ+UPO#5K)6U?oX6l>bZBSk%Lt1Z0a)JRTEV6nE5=uai;*o`>}m!alo +z@iG!ngIGm)t%JdJ>Z(Xl&j%{SYfe!=*be!IJxA%wjplMSwG9SGoeK;hlp3x%$OyNMB0Xjv1YS_QlgO3 +z-V{)ZIm9|g0#3lJE2MNZv9v#9UZ$UAQQ5TKZYd1i(_dHA6TKL^X=%AjzdFng?%b#1 +zG=`cw_RwtQQ>_0cnV;DcYDya2vPZrC_yBQhl_!tGb8b +zM@sfdb}+p6Ab41Sm91hWgzpWQr6v{xczaCvD6-TNL#ew_>Zs0eo(-IXdaT>Zl4;Iu +zMjeShQEtw+d=yY}lno_uT8(JVT&yfm*yFLNS%aaB`%VtWE75u{5i~j9B)J?-auapq +z9m(ot1I0VA3N#qZJDCe^%enDro9MNqF=_;> +zp!8!UIy}>tI_O6&#hSbcYx7CwmOXI=Qj^p*0c~$ck4JT*)%+wYg)9^rNo}Ls-_ZJ3 +zU|T?GcA>AhiWPHibXHtJ2(3xwB^IK$sigwzVSO(VYbySdL#ZLJUol~Z{2|u)`U8n> +zxqcwl-$_nIJx94juwrgbYKm(t>N%#uF)G}t!m%p+sS3w)IOLB@yS6P3`ydn2Cb!M% +zJcJ#$jYTRQyE{4Y?sc{eTxL6)HL5&OWxOg5Hg*d9o +zJ&5b~C%V}|x&AKt3f1LMYOc2f9 +zCR(?uv?wO2-f}Jv)@d|$Ejq~R;@vzY@dxOAHHcUla$y=b1(^!O0CdIn`-?ugwbS>hu) +zp3h@tvHqV>=>V0w%cyMBQTZdNykVdcS@YI_sQK-e(OImc^Hb0vz0%hyl1@maGxst& +zSL~feDs*G5)_YJ!2tJV_0~Vxp|}2*g576X>g$kIR8}#gG3dPk +zu>xnpO5Q72gBl8^4N@QOU>$oN>a%5psBUgrsh!;RUBK;okXqN6+kx>a4(s_6E2++u +zMQMrmP`c$@ltn@S`)=Pfb>AQbZYOaG?67s0ab&Nw>6~nIPVpo(M +z8Qlpxn;R<0b(wNW#<>o(Pugi%5s7mZW{tb!___(?F&>a!8x|V0;qPatq|u%At`In4 +z9keEI%0k)dw>9nj$0BWV1l@@`y8Q}!g2v9fB4`I(mx8}IBdj6DCcZaL`;qPp@J0ua +zQ&{RyuxhXmBL|J5A*ERH^O5yZaQ~S;%rRO+;l8wU-@{x!G_DHiKvLVlJ4O<+=TQTc +zLVR!Vw_yB-xoT8pXhH|H$flRWf +zy*gn3aY7&@VVarBuq9=KqwZg#|EYogh0}omOPdNmC#)5dbkYbYqq35)uQ_(^DAlWq +zz9-URd~kZ<@m#E=2rkVj?G^t@J#7XmyEz|gps5?`C9MbguCc+E*3%S*)drQ7w=$?n|4uqtcc(Vdnc9o9X#Et(-%U&>Wd$^l4Yz)~Tcq`*!_hoqx +z^vyDI*PCpL)UM|Z+#R|obCWFT6qMjSX@@B*tQm>hlljc3ao@N3yh!dY;LJu@QSWNl +zKicV6eZ$^$DlB}%qF%8^7j=HRdOo12w}h|SMV+6e#VBf?1oPyk7XO6CUGAdZN;NK7 +ziyH@jPI6d`G13kxkTpZueAm;Qaw+%{pWRN6=z#{i+`HN!l|)S{&6_!&Siy@1ty$gK +zrPpCZ5M{(`Wo+SPB!6ic<%Tl4aN0n~)&%Q9=aI}8@6h^rG4~~3Ym{Y$>yyXJnxSc7 +zB!}&%vP<>-lAZfjW5gKL+hE}1`BMR{Mpzd>O-X7on$!f3R0>*0mBUMhQZ{J4pZD0_ +zXAEU{PA%8UNY=_|=lju9zEo-l43t)AQZqwpQ_*|EcGcLbpBnO}Yk6BXldbm+kkps< +zwP<~?80V_ephHRZ{ek9u^ASqlHXz$cAc7ldp?{7N-`uOWUBFD1TD +z(UoFJTZK|uU|S`P_Hr5OsI;7G#GGRcWGd))RHmM5G)ssu!*!0=Bu}TIBt9%_uXRFX +zPv5Qa)m|wviz~50rfHIu>)~MVS3?uQ>*_4-#gGN=oo=A@$VpnA`00@B_w}2lM>TLF +zn|oAYpTm^e%J;ufUsp6=!-02;d9_#*N(2Al+Dy>Z2CYE;f3Mq6_6n?)B>Bnv>exd* +zZ$P1$hKP|6)|lOd)e%kQkS~mJ4>2@HCL3u=8`)t^GkrWh&3uITGsAZWmj|i6FZQ>> +zryJ8o{3aAyv0C@^kO&V2AG&0P9#i~aFb%P=ktOuq>=3h#-TTOo6lV}yaei&%@et-~ +zENvFf$R+s?r6obudbvJhsM{wefX}H9U>1N{z&iu=k`eF=;cN5LjF0!J-XT2EK*jrP)x^M`mwk*IR +z9bpIc8Zlc}hYrSzI<4{MIEi$pW!07)hfb&u|N~ +z)TmCJ8p0ERHh<&7lRpcp%`cU7XwA!RH=fze21*$u@4@w7jPhE570s=-nTOA=(uZDYTX!V?ho+`=JqT +zd@6RnhO#ve|9hKrT{NoaLgLtG!3yK0;JhwB(!1UI)5rRe(^R$6r=2=;y=#kqE +zW&HN6$uvH~^`#0QEJpK{^zw2?$V);bFA+A%%fjV#$Ct`$AovX0{L1o@ +zrAT=_Z>UQNmsjJ!zbdaCXD*jlGiGyo`+C$+Mmm>Qf=*uF8+yn`h*@uvkl#^`ZXe*JN}jWTcn)4g)Qp +zRys*5>)(==?@Xk$B7Ggn1NjKM4W;IwRGCgKC&Gy(7RYbUX`^>@)Q~%o*MFp1|D8DJ +zH2+>RPC3O}X*VvGnaG-$M&mo$99NP%{vbpEiTjyRfr-n4dwulrj+P +z0u*aWQrh=WEU3Vuk>!lRnp-qNh&A7qj94?@Cq{`=wR!S}%Bb_nmV9`T)U#tTKT5WU +z{n62y_qRbCPn*l5pkYF*345Y~7+!|(xQPE|luxCavH*FGpxnb$F6`z&@UPhGq%><5 +zRs*e+4r<);Qo0G2ckU${P|#;G^Na5p!gTNo$J}m3CN78>ovp7=?;a_h>8H +z#}v(1um*zbPZRxcA4!g|+@joPwEA{bGFpr1?TgTZRMh0E)7N%h(}@`%QHRuU>J~m& +zEKZ+pA0S`@1ovWd1yyA5NztE(~C*SwHG<2YoiY8j`919RvLk9$zBv`L!Ri)?3@do5IsFv83;DxR0rV> +z1WORIL3%3;dHmh2{BBFDYh>C)gOyMWxTRcXBj8`u^HtvOb&v-zU0q`kHhN59ppm== +zb6cPZXDM}_bbS+F0quPUGiJ%eI +z&3~0*+bL;}A5rHRaoF!}RY(H@j-k|$4|j81COR2CNNsMy?p7;i4c0W${&0E5@uDrF +z1{lRpseYqtMB1M}4&dATF==!w*6hXo11jSHFN39B)h@L{$fG-gT3&A>m-j%>&F>F< +z4>ZjD4g=9>z53C*a{l$$wY@{L}XEhg0)wmwBibsuIH52peMBKv1GOE +z+0V~6|6!17nB?zoz-=Pz#{?q0negZ%YT9@O+5;zZK40*;N~x|ne~M0H-f)>RC;BH8 +z_Sa$klUD6}cVB_ZQGPGL1P(3O0Tef}=nTUvU&QgTD29(k(HM&sOc`C0Qy2$(Cr^C; +zu5V#x)cJXq#KOEDQ=A-s-aZ-i#WNU_^l`u9ao7RHnDh+BCX7jV52TQFPoy)qjbv+K +zUDY$L(=E^hoM@!+L!{2+Cv)kfQc>^GGPIk8_KWrUMmrb6ZqOO37@}sPweAIlqZAXJ +zBj}CX;Y&il-EcB@3XN@}+j3!Lz?0{;DLGT*xVGm6#mceh8E-qdrEvfwBh~O8O5HGp +z)~mQ5Yoh!F@zDX)mz|_ja#JmIlPugX!h0&j=Ty{#c#C%EbrBxi$*A)g7!6`z+voAo +zU>r1g{veG88Q|ga9x*F|LSFAqwMTUEv-4FLC+1nGm)^lo$R%Ru3o!I%6^A!)xEOFD +z;CYtzIvP``UXvindFChT65aY*=;tVeGa31(Tf_`ybp$6Q=NC^9P7-#i!nGIL-4KC0 +z5ZuYRy$TjujCzJsF1;@q@ckS=e0u0FeG9d*>||He7ZcR6?A_hgS97N%l;jrb&yD}C +zFL^F`JJ7KbI#WYouBCWS;+|8iMQCZP1v7PbF2+_o94~Q7ZXwN>t?-$C&_y2e%Uya2 +z*&_529u*`SYg%3x1D%L9JzN*f-@mV8Pnvd`xqcoq)NS;M9B3C-WZ?@$qZAu%FhpM_ +z!Q^`)HRl{ZuU~^vG^}$*TU=tu^I;b>%}S+VWfrB8t_^X|L->A1>$@W&e_roPs;=$f +zWzX#-I;3mYbKOd+o0K+#hl=Y4(rghPL0BKeDa@8S>J57%=nn+H3H}l+Ep;r7_ODHy +zG*0N-Jb9Y%UqZoiXQRG&g15Ptqlz`MkU}%!+y`K5@sJ;rTN=P^2BNmNGq5SKuDFhN +z6LTL3Y#Nyrav(;zrT6x%w|i2(&H3Sx6X%k!r%N1m8#tWT#Zn*Z%z3m`8HqcxU(vOF +z?xU|OBNtH5$m_{7Vf{cmqcsprL@pmZhtU0%u)s-8Eqh|p79J6{_)>7{V0I}+4*!_6 +zaUX?T9RbTZEBu7`gQirLN~=rKUu`ebw{>`R4Xa?t72XZ&*erI#@_H&G_{iN93Vv|* +z>dwejZha3Iyj^rX%vaL#dY+5O9}52B?9k`zAn|I+3OvyNNZ?VN6}mt0Xg@r`kfZ;R +z+((=9zx{shri4PVfPDHUFSg@uM-0E)u@ks_ +zwzF1@Hlg6ovqXXVZ`ApnIK`T$YCYZkY-!rnNY+xE$fuAvFHWI&^@hYw+>OZVdD}wk +zI`M^53dg@Y{_uBjs@qm#oi`2kp7O+V>cl7J05yrYwL^R)U=|Vzeu}f$M1wG+`3jo( +zTy`Jb&PmifmSiOqyy2_`wnOA(PuQRfody}kpCzsS4f+mIYR4U$44j^%dS&pF+@ef2 +zEfoAaKR=(Lp5=~i&+AFRc}f!t1@AjUG@j!$aB>*s?#CJPM6xve^sBI3bPkqAkkp8t +zsMm5)Hfij<33`o90>wk9F_lf!&75ZieI}_#A(>NNd1%NQA5FBokrZ($V;a4s5|$)hOvdtGwMB~y>x;FZTAe< +zO=}i;F=qO9o3d{0J-(Jam|V;-W7WBMD7g3Zq|}FS_jdr_-_Nk(`v)1hN-n3-o-D_j +zP*A~aJ6uowjPtvF&*DtYbFneFll#NiXng-D_DZ8mD0mFgeny)$PA-f}F{NG#K7DC_ +zNh@?C^2B6b53SLMEmsIP1W40v!YCtVxo=>;Y_dVmPq*?JbE|gFBNRM*dMeuSd5fRV +zX$OOem*_M|w~uzS@zq!nF5>_GMH? +zcHi3jbF9c2>v0FK#}@;UykC1o-WM8pf9gwle}~VZ3WwpnLC3r4pYZbKdi?JT> +z0N$+>t_@&!tvNcccberlJ@;GwBV@L8MCaDlDUU?NwMWMlwwPKHTi72GF&puX@%Y37Gxo^dPwd$97S_u;_R!zM2-Mc!n+yEb +z+Bfc%)HYmk$2a%hzJ|Jc*-n~A!Gap(^ovuW2J)o_P`6gTP7rdu*ID0?dvA08$oB#b +zmUG{*1bhRKz6lf)1Z|9bs3N+AeBYD8#l8u^k&X6npR4cs8 +zxm3#rT05XyxVOVA2>9w7LO9`f12`9Ub3-M;>43x3!#;76Qr|#pPI)~sb0he2g@OZo +z=6*fyI-AqR@sciXVvmc`aBBeP73H1d1Xb$h_gY;8_$x4h2Auu#g|G$@a=dXbm4C2z +z=Bq@`+mUpE*6xK4Z-d;*0`4UG~|OH^OZfP06e7*tb;XRwbH~U +zV{~7Qa{&!}J)g$C1WPv7LQLm=#P3=sYu1*0rRVtH2_TQ4f=+JiB5x@#qW-z4e*>?7 +zU1y*&;K;^J>=0)2V(bdfR)|_Xr$#iC2pWV>HCo^42es+I!s$!guE^!S(PYiu5{>m5 +zjVBE>vQO?u`hA>IRww1%k5LY5puzi3m!J(Cv0_54Lw{qYD;09L^eb!oGHn6)U1Lz6t`urB +z>>RVWf@0ibpxV-n7g{?EDWlW=_7OW6zGaESX +zLcyK@A|SGf`7W_MEe*6 +z!O3D*AMrV^c1NzZ!|dnlmZ6~aL?nlP1BV}Wk?*pe&$6ZO@@bd&TQnc@Vzafi7-s6_0@=k;VqaMK?gzz%bNukpngW1LykLlcYP4~kZ7sWzu|Kp*>qAM(G+C-qUzEBb?n&+J!y +zJGoDN<+{CNsM|G~R7e-M|4X_ku}BxK4!tf?oh9G@t}aqu(nU#~bWwzbF5Yq3X@~w` +zO2j@s)&vaP`~v&fXe(_We|TN=mHjKaxPCBvR%SR|d|sOi;?$6Ks%CgyY|^BJ(@X!B +zF0ML5n$U(Ba#$DdIwN)Q74)h|d)OcR;56yt{?n1V_`;>IF3O$T{@_nf52uS?(Rx{j +zri(jI>uqCL7wAjRpM* +zWow`>P#2Kiz2DHfZ)5g81*5(g;jp5E`wduSGhppK-5)6G9rXSQcb-}j>AolZeZD0B +zP}-g&fq-^L5`W{*{HmtARjnnlkXi+1+=R{2CTL!l@B!$SLwMxw$6xnjsn;BDRazcy +z-qWfyZ`0eCh#FyD|GM(Hf>#hm+MAG>>=mZ)+L9ImZZ?6h86|-@;;Yg$DD)^+~ +z)zw{n*Jj{MdVb!y!;KPOjl*eA+S`#dh_9AC#qf5C+L!`K?;1`ICqpm8ZQ-~rI^5|Y +zc#XKjs;^miK7d(@QjAq%YJr7@I??(6utkbI;Yv4G^Lo}Ba8toAUapb +z;gf#ir5U`)8tSoPRILBzSna@)8WMo?sXU*dydQN3lnx~+=BHdCl$98NgjV+vXR +zff=lpA9Eh%J>`i#V%|eL4PgxkDgD95Zrm?!!VIQS$h*D?e|O??x><0Bo`*YGMJ)M`h(B$bL~b>J}_{S*d1`u?T&f2kB{R{Q&qr~RFznO +zS%Wj+Y5~Rm;8D=Q%^25)3Y1sPbSHb0QHL0QI)dgleFnD}yn<+xru3}bQc +zEK{U}{)pVr32-BI;poLaNI}HOmjB~Lx&t6uUG&$;77w}laVsKslW6hWP5Sl@=yK+4 +z8ospyoBD%I;N;F~S+Y3!(;xgh=0L?&OXeDd3I&q#x +z&>F#M;jSUh^y2=oYr~FZJr?XgrBN++TnsGl*&By;;`hg~HUi$Y9tT}aE{w#WvqpKn +zPezoR3XST7T!d!)2mWTy4VSVpU%>iCTds>N3+Y<1K?k4WbK|fMPCJ6r=_-wFostXE +z$HQ`--1|;Mxg-^tgWk^)(4hoeSHgGugPpOPA?^aiuL2X-e@jWOJ`nh3=h@2)>N_Uc?#|enan(ehu9O* +zkZCO1T5nHoK;4K|6i%^_p7moFn`)VeUQC=)d{Q;VZ|CtFoVk#=xh)(0qyEG!zFJND +z2#>=4i2X{wW=N}6nuim@Nt-v6=8dheK69~3gZtwl`Zi+?RBC~=Tg5x5jOORroBFKS%g4P3eyY0<>mpZU&nD#BurcH+u3>45v=)J9ftX?!@#8n} +z^GzM^gw>&3bSt50AD^?ZprznN=eqXD +zbDG%AHqa~NXAEA01=ZQQ-lGPrdEik<3hVgJkn1j#P3P(DsIN>()Ji6ONzhikgpG(? +z)9(+C)=^A!(puF$$La4P4+Vds`HC%7uYGZ-DDvD}UT^laNDUQ#>2M8dAUI6g%+jXg +z*3plb4+h8Jc1_p@Cg|Fu0qb`fKDQ>m2)blV_IFixR>1~HyoADCp!wP$=_#!W$#|Ok +z4+dTR(K=j;yA+%|w4!HqMt^XHHos1)#NP`AA8Ou8))~MZ7d@BZbz3310}*@$(61`H +z`tbKd>Jhq@|6Ro-P1a%UM>)H&{?2Rm!DSRy@Usm2HGZ*so^~U+3d_nkUa+~5Qop_{ +z7oHIQCS`suyeRtHz&Xmr;3wD#W@&RYe#FQbxxa*wotIvR(yv@zazuF-gFR=dJp7$P +zULM^ZyBK^}ZQif2 +zo!N?MC*4nZD70V8T?|WiF*xpQD{P#pz12l4hF7k`LPH&P;_nv76PfJbbNGAyyYV#c +zdr3Qsnp>i$7v8lNny@~CUS4klw_O*5cOTpq+AU8G`aLE%{V_Hq##BNp}V9% +zgTZ4L!|UiH`QKTu$KRP53eLnBoly83UlEY&nZkBUTBOC{yLCyG;;%~g2mgmo2Vhr1 +z`kk{+^ev7mj9JxG7_;*6!utv?1{a>Ww_r=sFJecxS#M&~P4jN=vwk(Za8cncg-8j^Hv}2>6=EhF~5fXk^Xrq@E;%9r0V+iX|B3x9(jQBV54Ak@(V3EQZ?G9JGe#NlxL!*WptKCH}! +zlOulN&S@)mdCOdG3WAp~Enb<5N(TfS5nt}y;wmFlrj)tx+eMBt#WvffRlnTh+T!#W +zo4(fPs&x747`xr;*yzl`@7{$o7tgM~+g3c=O<$$-<)JSh*C%Kb0bWT@Nd0cxLZ7eh +zW_&~Pwg#K4{AOD*Zx0|>RMu>5sIH+Gpwep&3KPEtC1t27 +zKO`(fRv_|1Z)@GQvYIM)r4w3>GC*W$jnB4Z`Konm(6K}tc${8ejmK%byp4pumMOPc +zFKzYsDzk6AVXnhxui!j{;j)_Q3fD&BYt6b9gtKTJ!aO}Q%R%T`SViS{nOTe0hVe>u +zc%}A8ynKn5ojF&d$HO{2z+rmeQ=>;=9UkZJ4#8h`W~Npy59{y%YvtaUk)`4BunrG! +z7%wxc%xm}iwX!9w$Ir}Kyw<*cJ;_Uz3-Xk0jLZZ0vOJ5IM&{X45t#?@WqIx>)a5DH +z;g=h53sf1~t81#ADxL_dG*=a^T0*o~W8NX#b0wXzJ6E@5>~^1vZd&&C%$Jm|gs0aZ +z&ED_tvu-aqJpK9dPvf6l_rbiqz6&usR=hLo<;w2lXYM+-@Ib?W`TqRhr2MG#uM?kG +z^Iqm2PtWK_Zu!IYKizaPv3Wy#&KvdpBfnYr+iPB|`1@5)-SOcKzu3|{?%S*WnEtcs +zGgE)?^-pg8)qR7eZHsVK5|EpFG^_p@H} +z{$tFexBhq9e{MdN)Kc7$+ZqT(J+$<9*Zz3p=aatswZGi>%dNrjj}`rC&Z{+NuYT74 +zKVLogjUmRi#hRx*FxQ&@;F^(T4|$`vKm6qA7arXg^V@HIIPUYuf-}6fC2Q6ct;w-1 +zqMv%haANarF167w%z39xn?@%4a+{5~aK8N7iV7Gu3=lRi{a)N?UD^`*J-ZyDIQ!;u +zhtFZJbXL!tQGT6mp-l}@0byFVS3628VMS_e{Db9*VElgK?d6ZsWi2$CZ!x +z*ZB0*RQ)qPHQX}ANZ2Iv-=s;CXxl^BSanY*6rMAlvWPXv3W_1sPB->@aozRvq1>-`~ +zxKeQ?B0Ai6+G;PW*qH9|+wpUgPQMM~s?;&H@5{VG#mTFH?sJ~0L8wod?!)gO-b+5| +z9M)#O_Yi+u1BWaFvCJBX<+4~KIDl8`taR~?>~-E#U1OV3YpbB9E5k1>Qo-O$E!V4% +z!>Y`;>HC(NhFGQCV=GgfWt+XVRjN*qNebsLs`bsTshC~k!B0`DG;9tJd0KEsH`e&5 +zV>INEr&l@Sp%~su){1z>JG{bljHL%Ne8ypE{WJx998#G +zVVmp+vYD8NY$*RtRUr!wS7W||SrpCL!u8}S+&Im$VLo$t8W5ncUR#yJZ$s5=)wNZn +zPER^-ZXF#tNVy#zM-`l1kJmQC4U)ASlaE?z|5l5kygBGfFc#dXk+xQ2mRIWpgJJ$= +zcyo9~!m~bgj44x1&zIwB>|g};VR{7(A%?z`zS~j98w*1pw>;sx=5TImYSA??&Xr?U +z;M{^XmyDzF9pzlYk?l&k#K1^Q+p1jfDxft^FXV$kM|5WdML{H&a-q-MxJ7EVXisIH +zjsFg<&0AYWvrI9@g*$3w{dgPGa1CyS(NSfPGaH|qp|bYnWJY;O6ooi3Y*BBDtcyq` +z^%6Bwhc_2k@YGaqjF9b3+UMp1S2@l0IVWYc9u#RK?}>=p21K2-9t~4nCOSEv=*fPX +zW5dYnH-2&UbnUrpp3KZA^@0M|Z`)P{(`*tOnn<>vY6H|d<{-D~qVU}L(#QyhONcyD +z9@Msxs}kHXf~2L4hvi6ZH?kLH@HfDa6gas-y85UF5eqZbaFbv;svH|#Woj>+Im3UQ +z4WdWSrZoccGRY0OW67$5qBZI$YG1i%>GH)O8rBJwCe(#{t||eKYomhUrM_H@DLE>Z +zwwOTF;ib*8DO+h8OiJ&mspK)5@22Ldsi5C*7URq;6tmH%0LT=B&K&&2@tg{mr)sOi +zhr4O!=krlux+y;ggiut!d*&@lGgN9Qc*6`l;Y +z-bRI2Y9dy{BH9#V#~SLDYiSrK&#k7~>r^#UPfOx07W`g@$@$HZqaW74TwcW~$Nn7G +zlIn74Dr`2_3JjyGc_mixk=N#e(~kaCQw^&w8;I=LTJk2aJj2syl}proMy;rWNGBX! +zf|jrFYZ2o$wG*WY&rcdtn+xUHT#IWxlD}E%V9KQ#AuAzIRllSr+DNl#MK9b>1Rh_V +zlUO?C0~?p&@;ROjKRjN8k&@cAV(T?RUm`OS|0~ELK;4RN&hI+LcvqZR$u>*SVj=&4*M?(dYW7)n_LBuDB{|JK6}#Qg%4Rn=t#Z +zyUKHHHE!+LgdirAx#lJpSEs-ZpHhQ@PDz+;Hi_g +z0DM6U$T!Hy#t6kR?C?}|baO;DF&fdJN#2CakHHtSHZg1&)7EaOmU5=W2F(^Ou5tQZ +zUZ1nN%$Z}$U$?ku$$EQc#*B;`%4gFAi#sNeojOkl*N1f7>8s|y5*+GQcLXo`H3iL_+@vZG$#VH(G(Ddk30j5HeGx@c +zqMSZaS>g8Lt{FyA%*GF>BCo8w%8xb$f#gH%MhB=x}u;c}jtI7Ri>9Wt_ +z?76D3*nqw#CxBtskoe5e?WK`qCH=6h)ZIYM;Z*a}BuTAnj(@;`@T(ttvUFfOD{#l|Glz+{I24arpKmo6G0q +zd~1)!J{TjK9ooe-M(kwq#Mo^^-@soy|KHF5O5lGb@P8qJ$G^o`9Ul5nKa$VA2*dzx +zdW5mDc&|9a*krt|kC|8!z40XCi3Xgk!e0yy)$HBI*a*NozRB1~yzhE|F|suWKyM7* +zaDUiW@X*IXUpwi<1kO_+Js$4~cqZXVcvytbVZJvJ@Ju{$c%tzP4h_}pM*I-ol=mFo +z%K-nopIGoNKTo2b|9^ZW|MVs~??0=LLHIYQBc55IiP9gq5%ND7nzcp;t@T72q5sSh!>9&kAxpB6u@X&PuY0^Wh=872t3W@mI`|IeYF6B1@J) +z&18$_p%91DQR-r*>k%Ar +zmhM#S73AItbUQYt9CZR+hBuXgIw(7;TxBQ~etNo~QtI`xbXsnO<11)lugT*o#r~8R +z0{hoKWXnk}NvGCr!vlcqy!=oaeNyp6;UPRX@W@`<5SAYr59l)&kHp&vJeYSjou`N| +ziB|xySGC`JfwvcUFX5rFgFb{u&ni4LZcw>2mfVFwBLfeOEkNfuv3TS73m;DikH(%I +zK%g;4eq`|Lh>+t3jTy_LaRv!-vRukf&t^O{&QO@fn%%(5Lzv2?I9ZQ+gh#1yG*+Dh +z-b}!f9^oO1fpra!#|#QNCqc)vsXcomO) +zljtkpy$>8Jm*~X+FXjq(N0Cl#L3rdZ!~*Y}8iyC>mD=|>9!ZZY{Z80rLQp?cCwl&l +zN8-JW&ha+z{DyX;EZumBE|r^yv$%P?psVB@sUJ$C&v`sVFM|Ml2=8tY1L70Q;XYM9GM(&+_>AZ2l0TXe +zl*=T%sk~p)Tb;L1{=+)htd?ifr4v5cQ}G$Y2$tlK5N=$w-f5ZvdvbAAKZ0Qom@%^;@J%*aVo`kLZg}0{ct`5kc}g54Z&B +z)bnKd1WSC%zh0BycrKsay7~?Q_2+} +z1~r}J`BDqM_-8Da=LH>1>Aq*xWaM`sxI+iO4|?(=`|pMGGDh^jpFb|!ZxZ_(@ZSb( +zLzD^ncNVZ4^>08H+1><;PXaG*)(eu}Sk@2xp8!rl6xGK9ll?B>92Fi5IQk35Y=BJ| +z!6yM8^&(@N)bwe9YXOtxqWsqb{uba870v{F8t^SDoC|otk5Ok8E&%*rfGbpZ4dB@? +zh4sk^_;$eAYPuirw*cp<@B@I~1#DB{Cjp-ZEcM|9z_0%VyrG`NAIX2&Pw~Y+LjLP@ +z@P6RG`Jar<(&2Xj*5l87ISl^}_$OXr>=Q&0{SLst|5;d{dH|1l6=RgDf1~i8_8R(= +z3RC<|zvRsoe1K6ia{}JF32T_=s{tLifq~#$)Bf7H;#`)Px>?DWo9D3giU}cU5=l$5}1c{3DbD0{}8_` +zkRBf2CbGK$%k?}HRv0S)%khiGvpT@sFUN~o{nvQYyh(gwc=^xkU`l^U2a|kOV{Rfo +zF+Be|9sC&R--P-@Jy6wh4|#V- +z4e)6LJfwqdz)yk;EBz%K%DYCmw45Z-%LYvI2>QfAUkeTCcNkz7;CDYkpGFp{&%K89 +zZvmF|NkM&{08I4J%~0P2_NoE@*9Q0~;3nv=*`kpJrjxCZcpZ$WmdJQ@t?-!{NM +zG{E}}@VkIl>-hN}L;86GY!OosUPY>3yaB$(0Otb!HTv^H;F5d_0MqzRWGBGh-D$wz +z1X$`%Ec9oqA^jl({5=Ew3j_QI9c)9HAL(G?{{&#^&rUE;V!ej+k?1J1Utp{rxWxZe +zfN6dp^lLnu0eCO^7g+}CUm1YE{~^|E)%Ga>e4-PusvqkCKlnGs?gIg$R|&Z52@_kd +z=HCKXeuzI>clpk5#9W{7cN)@vWPtY>;CCqhVa&T#em(;H=AW?6qQVydUqbujp)8_r +z9V1I87~{49z5(zw;Qv6y|EeMVHo)iMjL`T*^vVG1^;-e_XL5$r{56LBjRyEThWy_L +zJOKTX@_!w$-k$sy;3+MbNugd;{vQC#57nm~aP$QPP=C_D6M$dATFMqg5&l1P_%_5v +z#o$Z*Q2xmVc$NWP2zU{Ug|t^I0pI@LVSOkAEcqpUtI_4Rf&RmQXY6FG6Jg@#X~64s +z{qv`QPk)4U7Pb8j=<*YP?*f+d%ZXUAeBY4%sR3qlYP}wQaC2i>+3Ye;jn_NJ;i;O9 +z8;iC6*;s<6m2ahD4%XA>q^F1f4~Ij?KY>H9GLLU=dJUUi&ZhhR-xcAaA{?v?2Z`)k +zosP}+it7J&g;k?4RLkqb{jT&fX1Cw6c#VC<^0n*ic7`h*&W&_r$Yb|a*~=<%(a(!x +z1(!wHan|3yv9hKVcaO_)Gt_H$)cP6L&iOUc^7IAsGqXW?7$iHb+>51nJ3nB;_;S6y +zytb;U4q0>%ZqB%T5vbbX2hO*v#$M*Y*(RLAqHE!HToLDQa9_m(4jdY(Vss8f9B>c^ +zB>34OCN4AEE6VxJXFKi=*y&<~3-zU|&~~3!sk0MRK}1bUzcFj>d=-I?oD7SRnIUdd +z<2VK#+2GZnqB%e}uNfUwE3Lx;H5sByaEw=%xMj6;F`15Uh%3!@9N0jO#hEee!c;o> +z5e|i4F=C|j=}IZDhyE}#a&xj$&~qa +z%315ieu$H^R*TE!IM?kg$0b70CBF4hS(%iFVv&!6-b$C-Ugh0bj>||@S_EAerK^Dy +zQCrP%^ighc=-7@ExrE{2xBTq<9w3jS<0^Et6HI!X6wfc3@Y5~)gufl91aVbWy~0d~ +zUT~aji@FU2f-=dDODI|yWm|OGKmw+seRRcWxHiqq$mZ!+YV%A8hw}3#97bz0GqZTQ +zXu@F;P{3tZXhc*k4zA%cCUuTluxC%dF*AGaFxYf{CybMok?~~*ee{Ug98tTygQJS# +zI2Ds8!q90eop$V)InehWvKDAqbe>P$JRAmbzTi@=h_kX{HnmN9&00p+80c-c7p_^f +za)}*R5n%a*8I<7&%Tvzm1$VAmv~u}kVCho$kxXV^x}qq5(F%J}Vd2^(>+I_m<*!&m +z%@^vfiVe7qa$t6;-AyVNhQ;l{u5Cp`Mmx4WMJl8~C&=`v +zzOstSTCbvyl8vMjKTNpOsmI}!B$uG8o7l~Err1qYk;(VRW% +z{E(@W@6&P%N%KDC`p}dSEndNI_C(@%$|6f})s*=n +zxUS`Y1VW#QgbcoX5wuBid|0C6;!9R9TDN$aeeLq4s}`-hea#Z)cGpx!P{pvWQ>a>> +zS6_g*%A$`^dji)#46`mnMLomFZevwVwWgAExgnBXxwpoSW1!_22C?ZMA!IT#!o~{U +z!oIu+gmB}{j&rHyP=9$cTI6GT8e$4LwfdsuV6-pG*Vlg|S~U5O^vmut5}#ML!+{+9*} +ziY7Y^Lw_=4lNE=6R3i$14W^JcB)eQ4T{P$$XrO4`bC<}2+V-{LpterGL>ClPNj(@Y +zr9@Z&@*K#)ksb}2m`jY=Z`opBqxzKg(N~fWr9ZBZXI#Rq&cK-bkAaafnvsQ@ +Lo15z~BO?O01~D}=Xwu&1+!0J_l;q%mCN;JPpTU^{2je5nImz7b+QX=)?P>41 +z|MS<++UqfEuf3kX^?S3l!YZz-D6iaos&u@9FhoJFJ)HMMJ|RSU1dqS^_aEijGEL93 +zZm#)RPq=DM(Z(X__>Vo@abm;s3mO>l84uU>YVaA4)b)(#nU1hSxtJKU3%Ra!o~PaX +z>8D4Y&mfK8<>!y_{IMtUT#xj6PvrS5($9J#&z~TjeRG`c*#nFGWO&|DGCcpN>AJy2 +zh8G_#8BRjH<<4UN6S3rs9QerT!r*1PvlvF +zbcHAKd=lv=J&~t?wBU(6E0OLWE^{j6HWTH3v1oULu%xShc#hZVv7(06Q-){R$n*c} +z_bNT~tCgPBc&^4%GXC#e{NLHhYytW<*h-2cr=Jz9hG +z$^T-dJmj|^&O-cj3oHF@j6u4NJV`T1-|l6lm5Bf7VWs~-%;B3S(N>DiAXS`UrO#1! +z+<8{|+Gvmtx1tW>*_T*Jhqe!+do +z-or|j$o~Q5XXx*rp-=ecxXY}x9_1gmv62_@>&MVX#NTtXQXGCS#h5t6AAHP8_ajcj +z@9Bs)bg@!9>V5lrR@1wi|{XKyA1;j5S9zMcKM-YFE_fk-gLA(s{ +z8=b5)3GoZR#(S6}Bj!6DVLF1!-G4K~&NYjErN=bD9WQDj2d1K&*pxVVk+M0+{}V!- +zJHCT&bvCPPqCd{e-E>WVvXBwq3DgF{Vr_ufRGFp$#-?_2F4F+1AQelT;Bict|GkEx&mg!+}|M{*K +ziSFp3+M$%GafiIW`pu=TH)$?@Y7BA*FSYDxM?W;V%)(l~Va0hX?FqhV>&BjGML08_ +z_JOg{uQB+V+RW`T$Y+E*L+jCg#-rytb3AHD@)-)-MSpxw4Du}A(3$yNiV#6cX=dyS +z>}dL)g!yimiG4i5AgyXGZuRcr3ro+3Z)Vsmf#R6nlfS+O+8 +z55Lf*WJlTf;n`h`s2WKTvC_>A|HKtutF*@3k?LF}=XGo2M)GkeeXf%m{wcx+gr9Xj +z<|cM2w4pOA#M=4cvSXT?X^2-Hi@i$oPaaFS9)q~@nCd#gEb+s(W5n)7-iwrXSVX8g +z#tlC&f0IG$&v!oP=7)JXPv7J_i`~+2nVeVKk?Ne~W)Sn8((sy2ZJso2b)}=fi72yn +z-s4svF2`>*oy0c1oOgI*7cKewttH9tZ0;KU4{K`WnlFxgSFz$l +z>_B=3Lf3G%v7ZTGo)LjXNI{r{kcSYqS%xe@%V5y|!;9pGb2_=vGX4F*-V5Z0B##a| +z$(}U0BbXF?<)Udo^lNcDTIXmpv+V2rYEP1X!Fjc({B-17n^gwssaFlsD}MxBasPDT +z!_5lJT%tL~)6v4%EQ6XUIDajopU$VsOl;hd=qVu;w2v$AH%N5ncKf|o+R%xxq`gH3qtTxU!%Eulsg&ue2nl}i#;jcp`Uh|LeF;+yS_=c +zO}n*NAXn7o*BT5`1g|jSbTc(~SyK;iPNpW)IvOoK?aIh(YNKCPsmJ6zE>yN*I(JfZHv +z8>?$ClS)+)xte65@4YK9^Rem!s^!6FhdA4o*{>#-!H}}8(qZCg~~d|WqH~f +z+TIB&^GuBvl>>0a6{aZudkhewO>{=HsP=iTnLZR?H| +zc=#4wE@s|k$XwO@^X4@drh4=&vo^*`%d{h9Ii5`c1E0WV;oWCkNx65?akV65{=9ir +zv*QAArpFZ62??wz^qky_=Q?B9@qiwyT$Ix#DzL^OL8`n}yTF4m{^{+3E7rPaV5G!=!?)4PB$D +z^gKE-QyfF+ynS1)E@M5!HY9RiBzm+CI)3g8VvF}IygpidH7Fei48lr?esYZf4r$y< +zd_e_x#-CPW_LabCSlpW?gb*Qz{#+hk7Iz}H=RWr;VUv89)cV7YcKb`Fr3Nh}bX6Jb$`5%RQ@#YtD2_2$oe_l{Q^H!!kCmE50diTP*gkw*2M$43ZA_eF*(d2(6O2}94^R*bQ-eW0~9!B_6)HX5qP +zQfFukk2Ameo&g@~*&ax`Jol_OG=I0MM#Cr9sQ9fys-sJYW&14M5%KDN;vG|hpoB> +zMYUq3(zYiS;?=_y%I@0ydTEAhxYSdbJ8GR()5ZZ-eksakhnTe?yQ$ +zKl@lHNn0fC+aNeY8$W)jc${4B3_XeR2`G1lq>mHp$koRWldDf0p2Eh~=^7FmRlb-e +zeVw|mN7y9LzHQCb_?W81`tjy2;hYeig+yOsofP`+?E}I_ff(mLq^Q~|n2Z(KDjAND +ztIIyd3SE8Vu*pa!kqV|NxhZLzVe34==$P`Sa0V&NT)sWBcj$T4xl5WAH5x0ysUXG) +z_k1WQSz-jqP!TzC^xQ^a+$c8}vbw~=(({{f&(-1_&^`2ve4N;U#RH=zJ-^7dXuUrH +zFn#s8rES_3an`tZx!r1WYzHy6{2sUTVM@iRBQ(kgJl4%K$n?m|58S3nqW4>hdrlkQ +z&aD2vUj%hE|9F{@7f=Z)nZ($WjMj|5G-4kbYjbIOQyQswLwKrne!F;i+GWdS(@}=y +zx+6DKbkEXzH`=z*o#rX`PqZ3whK-)r0uyo-ZK(&xv8f$%<`xIXSiLUn;p*af#RDnU +zxfe5o2I~uZ_&rjQBNz%IN(cgh+C_%q1>t>Z|`a#;0n5wT*<-7HAfxHghP^Bw7 +zvp=-Sl@OeeXS(`^i&;0$nz(i>pRzWMPg?U7=I)=DvpM_fv? +z87r(t>+j;L#|M}yW&zI7<(Nl5u@d`OtmGJWtS3{9KM&~LmF9^*&y75days%%mD7>u +zXgM9dnP0Ld)B`^nfo}|8ix#kj?zvjPu>4__ykF^kLh063DA$!5q&x(c?&T$*36QQt +zIvsIzZ4(c0JFIhbGVT^HV;J$k-QwAeU+Gpe;sHT_h*V=V>8cab4q`lz{;qI)XVR_W?WU}`adTP9;DPwBvjC@nG&vwXm+Zc+hO +zE6eZ1Plyez0N2ayND6E@-yeFhg;~d9?tj~&5Zi;XSz6IuSR1GncLcIf!*M}u(LQ#s +zHG-4JtT=0xdjaS<)=eR2e`p?7KHEx+n%`{|V$g1?2W{<6@|T|9v~QGq!3DmJ_6N8l +zV67%od5zR0SdAg#&;h~0NcR+)&1zNbCs%Ug&+% +zS$OD2H55I$IuuBkcwp?92No5ErVk}6^>e<7}y{u)c-r0*MZV(T~Uqq8ex +zbQLU1?~`%3OVqyp&|;?ocge+@8MsRnBX@~6^b_!pM1O*r_9E6w`-{FgmIvbGKGSwK +zwdv}Zg&1u;PFx`7F#z*IG{`vGgK>GZ-r8IB_6<6_k2+l4AF&CJ_x<*cq``w1 +z&hIJP^Wh$8&$NmQdv@=!SA^}Q6`x&5s1OHBvW^LJrj~maRZP!bEgTmr3wvffcWG)x +zaK>ffi!WoUzot}#T^#ZY%14s|8@}}ZtHxR>WCoP{wDV%2j-@r0y+?nk6sDbjs_?l> +z-hYj$`rQA0PtwpI&nFR$I5c}|%=WIJo{tfC`0qP}S-9kF|F;_{i$}BS`tp(T=_BRR;{L@k +ztP15ix&E|~@&k*#-Q%)p3%PPhXS@0d74L0-e({3EEUSMa(V8shGj7B!*0F_8c-xhH +z_!?QPU^A{6@vh{|IJE835n#UE!SPvQ +zt!FD9r!7f~-={61ZErVVkXY-FtuOay+|*eUn-aFgZ>5l0SH2wkh{ELd`39*3@V6D= +zcYw(hcGG>B44CwbeV{`?;nae6yYM)@{}XX*gsX@>0dWF2%XBv>7fZ%pwf8+|U;du5@9sj1VO~^fEGA@{u +z_gP+3?)LZPI&Re2;d0`3ojMd>kyF7;WU41l$*M}I$Yd7?3oiVkLKNsZf3>1SNM?1K +ztQCtZ)cm8Dias)h-v3C;9-VVxu}%2od{GzjBixT}q08^L&KDlKfH#9#E5EQtptxqa +z$7*iKtY=q((^s=YxT}xYw0Y(RK+T2AgN+?Y{#VXT+-BY$zByjReeS5e+&=Wn*_a)i +z$;_2mr*ynV+A*}4Pl%1QA=>WFsW}a=m=VZj4iWI<9Kk{J6rJ|*FFW1}KRu2& +zg}#1E`=d0g_R&;pR+E1)g=Zg6;uWH*Zx-lF?MX^IWZz7bX@^{3@|1pJ#N2u{i?alp +zrpw=FozRap8^~JzkyV+Ovo(%oM8zVM1hO96WzE^D%F418)N@@6*~txxysXAaC$qPI +z3u?moVE>-1jt_*7FKi8Y=Q`h%hA(wGhgIO`wIdWDtnbXO`&Lj2&o6vVWGo)8G`pyWxpy}9*{bN5Ep#>Ng<2D0np-ERo1&q>4MJ1cF=x)XpI +zgEDEN+=Tpg%_bhWRbk$iY}Q~tJTG7LzQ`5_cfpmz_w@0Yw7Ig2Fy$+4tD55DpX +z#oDYa;5AzLM%Q#~`hui8#%>fM=Q?Es-}?3vdkcTN+pP-`k#Ej-_lK6Z)%us^Omk1` +z;M%12#lgvWQ#+*g*ZkQzQ$SlVHRG&#;NukMta*y>;&U{);nNwl}rU8G3W?=#vzGG01pZ +ziPw8|uD3sw=`=Kq1&rMHyLSb8Kc)B%xRZhlE{p=M)8Zt?ukSZBB-M?rk25DXFzfWz +zQFXv<#0Yj|+uqeSww})N*xneKrqFF4f=u@+XMz-$Zi-wbP&*~oiGqCOl?;YEVS*WkRu&U5;?y1k&Mp}Qd +zXlSJG&KE6%X(wsPSYL8|QtoK^SBsb`#|uTlGZxf;I(8>#w+uQ4ErX-ka?ei}t>4MY +zau1z(G`JNOk#VS5iwMe`9o>i+?U9Pq#)TuP2>*{epu4f?K7*&V$6DfvDjC2i6;4v)mX0Z=Fs<9gBn9--rJM)60>S?_QRe^f@k{gn+ +zj%@ZrkAnKRvtAwQ+_5Lvh7AILHP*J`c(yyXPiju6V;kcDcjBACCz0Wf(#C>AG7fzm +zU7uQ~IjKfp=Uz|54KThs$~8-Ah|gLjgcns7j_O!*0d(b=6vW(_&nk+6>4Byk829F{|n*loNyB9}ovf +z0as9r|Eerv>}*#1)OFv-et3GPLaYrWW|F1xJTaaaLn;=515@szaA-X4VajbT@6_4i +zASnY+L{BOd(X^K0Qjzj$$wV}bq_3;NUmr>58&Ds;iSz66wgtH&^qjV|#s!Yb4f>1P +zoKMHMn$k|V=||o?pR`Q?hZea}sGXj?P52JD12HE2%M;=R!0csmD|hWfAM6tV6)6S6 +zh;-*I5!xZqBt})T`lK4Cf$l?M2M@;hSRSxK8?!Ld=LgYGojkL2UR4dh1PACxH^=AP +zhOhqu_*nxv%x2sR#2|1(dD+}g<7Ur8(xpGSt&$CbNNa+RFnw_^JwSL|g^LC{87~6xN1A^mA^FA-$ +zp)^Z7IRBmSFhyUq&dTa6CCwGJw79XWG +zQhHN+R3mj$dT4(*Yx$0B_oDOn=K#vDzQ>>GNxEEd_SM(<9j^tZ^K6;kaE4YKhg4XWQAK#xturJ1&u_|O%VJLGd%~4j +zX!i$2?E_4WidQVxSQY3Oc7f-S<0h7#gaY&|>A)jJcoD*d94bsU3z*1ZEN26thh)!x>FE-IsLyQC=#jAjrqF1jsseDa@>` +zbb#^$6y_Lr=>Rc)R1YW$N=AvcECb{ZBhnSz|5UGo%Fqd6Npu|dze_5KaaJMuL!`&h +zcW`iR-*f8^^R8l?IIDRkV9ygdGY)y*oYB$L-aWWHn{kMPY=brfNLJ#FosE0Lx +zrb=+MqobM2LYf(zlcfR;IV+38qWd!^L&n6n)CP39lROPAmY@nUE-LGshS~b4o)Kfs +zY3^5D?XF`kQ)rPZD+jIl6xHL{aeyu3Q0GD1VeESiza9h3a9+XYqF2t9`wcu}Tkv~R +zh(lQP*6M$I^{w`|j=iO!@Afj_)P;7Ciocvo5$Brf16+VUzyQuYJ@X0#I>(g1L3zF7 +zFi$1~I!{wD1Cw%y*oqbZem(e@H506p-C`S{(qj+uc-qBdRmYO-j$_rwDEB54Hw{W5 +zsiD|>MJQ30g(TVNj@SB#@jtGSid;6$ZEcsR5g=$ +zWz9rB4XtP9$dcD;qvw$s!69bxs_L(Yq{fdmuSeE60hMl2J7oP+nwm +z7~I|YSvY|#W08(4u;#ZpMG<*5?E~GvR97Sgf#RG=kSTFCeivj)V!T-kx*GgFb1l9= +z>~RzyMw^Tn$A+=1^=9D4uJK4|aDEjz8qoMrY&P0v5PBn2e}%S9bw{YC3O#}7nHZrI +zNCmAM-SZrkF0T&T^Zeq_1Ll8n6NmG(2KzV=_5BQ*(1X{Vh6sFp!j)<57X~<9BMZ +zxtnE$;8+FFdv+3bvMMJF(okj*4;g5-n|X%syxWSBVNeZN9es{@L=!+Yq6uI&k9U(@ +z{hB!9G?qf$FMdTkABXZW%?nf=xM +z{F%tAL{0(S8x#g~K*nlqg{~50esr(U`Jr=2_kHvX&~ri8j-CSvF`ZxVv~4P3rpLOE +z5e0v3K%bdnU+*uH>9bWk6`6^)AF@$NZ0w2vAmUVyw9``PxUfmq4vOd@-Ip7!V_0zo +zbte9eI+OpR&iKDkM+JFK=q^%`eCwMA`I|pQpOR%hu@$m#1N1&5Kptf#g|FIMbyad* +z&P#djlq*H~J#?IBUN%TnCyDAKQN5%CGb3|C$4_iIf1@A8f6-U-->7ruAGZndadF@#xUaAKnS{lDtJswZVc>jXSo$Zrkq1{Y%wJH%iT +zpz&6h7;F#5=aJ#9u3DUVWhNP3=2GWK##se8@phal=uH?G>6@I$sOTPDkNrx&Nr;M=7Vlx+ACXzpyOEx&EcY#Gz6j2v891b@OE%qX@|Zff +zowa`Mi)pN?cZ0CBg#|pDoSWv6S`^SvNz2qZ%7pg7sNB?!{eF{UzyAY)-?j9^QEp2h +z5=sO7nG_EjVyKi~Zs`r7rj>=J=+Yy^_?tqNO66A7^QR-)9;AZG*C}6v%G;^j9dyDh +zDq|0apGVRQRS+dvhI~}^P30Wm_Sj!`Q#_IHjP<<)xKIL!K}20&mSA8vV}vh2qhl39 +zMf2(lniY_5ROwDlq>|Ta-Dk||pLl+XcUJAh{O4$WdS43rV|Q8eCe(itL6F~p?50Y4 +zN{_byw?**xe0sDlLYgZcAXPCwQ|MvmXmiuvh|UdD#bVV_=9RT-fUAFZZ#;Tw5B&IO +ze4W)ps<^HvprP`Nlc}z{GGW?|y()D=Z{jKXcHCzP^@-c#nzUwm@=T!{-sMM$J(2xZ +z*!yc>nc|MYr4bH(=#5qlIEad@1)zKuLVnocDs@Y3iMGU*3ZBjjQ@yaG|43{@yf2|Q +z?j*%v6Hmo7X&OLFRK_)K83+UigWj7Pi(W4J-SjPkmx`F`U{Kd26*UxX84MQbo3;!l +zZog2ZZJIKeP`_m`gwnnl>kB^t1sz}KobH597gw-eVl(M2?YK-SsI{GEZ;lZqVDNx~#d^<^j@tpw*|9>Vo&wI6eY}uF-X+7I9-#>GW$=udf)Akx}H!g%Tvj{giM#y*m5~Jo_iI2rtu~+P` +z2C>qeJC5OvPWtOh?lo;MbmO5W>6KGhx +zfZJWcJ`b(cpJAS%(S3~SjXx}FkU!^{z4N&aMGm)9&GI`VoY*8k*ZmAyNi;w0;rH3k +zd2bdMR{8DcD7Qrk9V5p6l-y!9TC8@fnw8*-GA5=H`rN}mckz%))AK`CJ1#IkST8W* +zYXQcbC9H7oZkC$2U2JWB_re|o&C2%$=II?mOY`WyjVON;WpCY4ZVDZ8jq0O1PdEjx +zl#|4fQZKubkxD@76;}#U`aGSL3oUddHN1wCdmqL;)qEFr*2#j@-qiXyV1oAm6V&!< +zPUw1a+)hA&!`DVvsc-75w_Vitxp2a_U5x3Q2>#|bj#%`y(G`d1c2_)}%UlXE0W@Ty +zkA=obLcYP5TK|EN=6-1|7kaYuAq#X(T3;$I1;^(NfeY>Fe5+(`skG+K3 +z_4J?F{I$ +z{1dY%3=A&jF~7Bdwc*~Lmc?DwSs(|ruMY~Iq~Mwh3iinkhRw_>bB%|lU0LhlR(h_z +zGaN&Ft7E9VHI~i5Xr65S@K*UMlnbro24CnHQrUIv$E}sEw7$Zwz{%?pUT{5CSl-D3 +z&ejI3ozCV66nKK21Ug}35o6m}1gVC70rp*OXBBR5>^rQ-W`v(3yom4;!pjJ+Ap8R1 +zRcQG?fcon??_)F9Dy*4e5o=gG)4IEPqpX3JZgxQrtq2+%88<1shQFEE)qHgFo0+LoLSU}23=decRO&$;!>~)ox>i))Y;p+IR-NPx>YI)acdd{TEG&%N` +zx}5D;mkMgK4 +zP2x$eT?MX`x+c+j7ILi!JbxZ{?ehl}qGQl``e$xB``+daZYos(?+x=YA&1*bu4y1e +z$Z{4tb!vJ;n2h%(Y!ftQQ%IpU8Jl(6goK>ZwexZDkm?!)|W-C?Pd7NWrRP`-{R7wN5qY^iR#!qL%*9|pU)(4$WIyX7F0*Ai> +z&u<(K|0=|rhm)!t{s%miW2yk3<38|+%AH!QrlvQl3kMAQRv%}xs!)6lPN2*oGYk22 +z2i3&$jD4CrT*Y@z?Kl96`)UE~hj8C-6DG_2s%-+DcO`mymprOi=$|2v-9yI>s&8pj +zV}VCKW^KH695iB?wR$UZsO4Nn=SZ#vK22f+=IO|YjwEORszXHYM?#2++PqL)lgeYL +z?1jQ92Lk08Q2C1mw1F&_0S-s^)SWVB6KqW)^pXh}=y=dfz$R)^tdy5wFpr~HDKvpL +zw(|1&g+=fcMTJ?FOM7^!kW`d8=`W(J2W|xZWq@VXUxqTL2{?*AN9(q_;*e71#Cu>F +zaXOqTYZ1v54W*5ZNN`W!u#tvG$?DKyWG2?|p2Tu!Bv +z>XR?@Fu>rru1JpldVtv~i1<}Uzl;2<$gj$o4ccP4tkG^XS30FzBcL^EP~!)9gHi}I +ze;xTnIb}Nz%e7XT3*4~4ay>49C)7#5sWm_8d>-)xKtRzy&zl1*gHGZEU +zzdO(SWb|8@$MI&9d$vpISO`5h;EgrO;Buru?y~D`BASd3O(hlaa?6Y;`n}iF9VX+9 +zsq?%_mVRrV7vr9}nNtG>QO*muBf@tn-f{kBEMUW{+{zK73%05`vd&%srA^L +zk3@fe=z}8~^P3)NALTru&EqX@C$#1vw-k2+P8iTOW<%WK{|`&8|2qV(YnSH@_bdn5 +zX=<)>E5TDrspgsuy_z1@r^oo4Fn+d9djkBW8w$*&-lr&73aA~^w*t@DzBxtE!s$yC +zEkScZeBYb`I#Zi&q%Ecx2CxnJ1__IdCC +zfVKs+tzzku=E^*PCl2ll3!rd@E6LsuE&Vd!J3Rv47+T-`XHl6Jg@csdrS~wUdFeTzyc7y6=YjsEG%%%oDZNY2Muh&2 +zC6o}Ru$I!sgycWHL~g@`@;`$4ZQC)@KuY@T-k@B+6WEiCP +z5vZ-)41}mHTvQ&AfZ4OQ5(jokrCGoZtBSjPd}zv0+z|amxraEiMrxc8P=Zsc+yfk> +zj@qs0n=FB1A&RVdyO~r@(RHkpk1ck^*Hc^d5gvdY%MGg@L4zYBHCU;`u{jC9}l1AZQC#U9Tuu +z2%VWufy2(Dz0vx#b!y-9`2D3K&Q=I7SeVbqe=M@sQoMbmFJ&9+BAz-Ow^v-yq>h6(LQI%xeHv>{h8GlrWdB7jbucuZW +z`D)ZH{PDS`CUr3Uq>(qwRTD>2c~#laSILGoM*0Xorse4kq%w~WDF91VY=%3$c8g!l +z>o8VDRyv@95!w>p&VU7q@smB6E#u4b^Ixg-)A$EGQ^2>1+JGg=dYMVkBWCOdoFvRM +z_L4^CofRnz(xk5f0C!aLNVV6%DL(k&sxC1Jj#k_&zLzbb0{P>}~A^NLw51{SHz9&_8+6MK%HlkN8 +zw?P~xduageKx=a3%%c46^d+KdrAY+!&%i4jRo` +ztGuJn(l(?vBXCm!y@)Vw1^u!s3Fn*!%Jc^|nQJ|B2MwJ&w{B +z;Yw1)IBGFp$~~O8Lhc>oSSgRu+G-Xs2D^9}a``IJzXGLsLsX`t+@tT+)#>Y%Ri#6a +zxDC;gm11d!WPE2P;I7e$r*4JX3fl|ExErKO#nMz7QnV(iC>g1#F;NNVjC4}@l#s#v-XPqvqz@a4#sZRH|S304dxBy +z1>;Y~G&NmfPsMM~yOPk?`z0B%CfyMvBQ~an`ozzYg6|I|4ZeFp3>siJqHl<8)NPMx +z+H>KqyT!|AFD+r?8hZrVqr~cH4SupC&Cxw8_A9SndHX#nRlU{X~f<&Y4GbSNms646bJQu +z*I+zui;EXx8fZUW=#OI!k3;$`8Y&$u?ahN&EH9fNOESxFk`Au6p*g*J<7GBB=6HisA&PbU>|Y)fkrPD8uj +z+p=Uj#WK77`+>{Fu=+aGgQfuZ_qQxmrFLTc$!pXu^m=MU*53iXM^v^)aj*!FZS(=& +zNxwTm{w_3-oQypM7$cyi@ef&>{m?LI&cfMR9-x{EuCLOom{43bwPcRLEk>YeeOuBG +zEeRPjipW?e0sd1Pm^VI(oHaVfNoWnX3oP_&F;W9kTBK6URO7+`3)Zbv$+T=9AqOeGN5@0)y{HWW-4)$_#X7c6EhK-Y^Nq7EAEAijYEmH= +zdl>oxUPxgLnae!P!s5V9p4gVkJdShFSULL@xkGQE^j&^8ota7I2v@4zxEK(P(xlzDQ1CJ&0{i*m)nQ*}we!9z<3SR?3KUeUH +zKeP~IuIl!`170!Z)Nx0$q0y=}XUo=dF|bMH4#z-O(lK@uT2t2O_{5q~);ZvZsA~-P +zdZPKZ+#(IDlLkJQ2tJo_gwK`S#5U-*6XRsl0YNg3&Vf}-T||4I>h4qemhwcLFEWIl +zBf1_@T%6+Xl-F=4FNE?_fZzWc<)=i>Tx4tt0oYKp0g?eK*=K=+$(sGA6FihZ$nC@! +z9a2%dUn&Ci0!-^-HWBHVwnG0`g*`{*wUm!h(DZEPD#ZENA5omY1RTBouVQM(SYK-2 +zSVWACu3r=-dd$M?o%~L`kNY)$P}Q5bMqQ_>XZV=Ox{lqu7Q;er_8I<+5_jGQ(9yV4 +z|A+Fdqius%2#%HNq^ZL!aJy8E%)$b57$=l!0-22ar*4JrH(E%iI&Ag;q@tZh*sW3? +zV5&!Fwzg1SOd-U_UKG_+WsQC>*Ba +zlZ?uH8BvY>9D(7{z85i!JbujO9eqs1DW!T_lJPF!&(P14A$|nz1NK8(lGtM)b0Eei +zr$((wNCo{S{Wkq3h5L^I#;!z&;(Iea_W+LnDu+Kk(>)WjIMY*u@HE0|1QDSc;Yoz& +z5Ks%_o{_iy^bF5T?1-6ol1ln6ImXy$xa|RQYzE3_fD)hKnei?(6+i`TFX9eQ$tm(c +z@A3Jt4}oFd5bA*cY!;97j_`klAOL!!Qu@Yy(cGv3!o4U_HP{Ab$ylM +zYC^R}#<8?MC5RB^y$UhIli@BqeJ3up#t%FSe9wVb;QOW%{KF6{eSC$LeuJP!xIV~A +z4=` +zYf9~WCcN4`7+uR-c7ec~73;Ev?!foJ+ts}hhZ%VA-uTbB +^C9b&o_$Hi5@cvR? +z-G(!nhF#y}Qf5K+cV0TZO^5?d7n&UZnaOx$CUW(U3z`#aj%^SWHdAOm>`F~v5!;gE +z`p@Fr8=JM;RiDMw>6+dJ_DpRVD2&+kYL{@^s*Y4dWwP@z*67)Y=__gHcQG|Htg~?H +zi@=MYb3k$`)+O+ChKU%#D5#eT#(qC`jprV|)5P9WGv0ddyOy`fjk5f*!m>h=4-5!9 +zde_@3s#&&NRj1%BAH%LbKknmvH`PFk>YqjA19{K@&T~HvEdaAQ7kfNoQxp}%{w;4YCIhTiVoF%7rRE?sxJ=5)>|%?PFrM|n3{fM*ncD196LSCIbX +z6ISNy&~rxN&mC)Dnbg-lKvvIUlj;(yr<~(jELXHY(ponORBDiSEbg-ypOGCX$fS0N +z&9pSOm-EMc7F!?VbIs;j82h-66~H*g;dCU`Ye0=$EjV}{8qQ5BUmAFyF?E{HsIAZo +zSCv(}uW72a(E6m*g$@>?6ywM~U*2!IY#H!QN_ZDM>)q62kq(ld<*-_Z&3Y&3@sRQG +zo%_QCTQg?^E4_(8_c+y?iSm<5U|Ye~e9uaCpjWvlSG~~8w`L%omV>$873ZI7PIoKv +zWAfpZB%glYGLZJ}<3irC4}>lIDbJVsh+5E)V2hi|B-wb +z@`(@NEaOIvYl!euUiiQ@Ss?ft_k&`6w^18c}dk1kq2 +zIQ~#(b>Ir^TYsp$W$dA6FZF*!pWH`d?s%rj>B!S4r;Udkm#E&y!SmdQCGD`0rE@}V0DpLW3one +zX?o7VTRV3&c5c|FU-(Sn@&N36pkI9eFyp1-MHVi!r0X5XC7j*6+qh82@i}dCx=Y^X +zuVvIop%m+0_w45H7AjUqp#+|LJypGVj>-67)>vN)IQe7iT0Gi3zD1Gi>fnzsi~hMo +z$v!O{VOxi^%Y_qhIz7FY%6wkKx#yhe^$L;7JYiQ7;`V*xaNblwubm4$vCn#AJoMVR +z(8_%j62$l}L+=&%esBZmsq)|lR^!Ui{I}4RIP>dg-RRFb?eLdPqtV;7y}FZ{Q@?Q@5n_D$laP!I#hyC8H}2HJLkljIz|#a1Qde09<4?|Y +zQV%bQzIjg8_aN-M<~x&o3t$7b(3#>}Vjp_B_r|*yWZ5g~5o(HneMLZ7_ +zSgG%pSkNKUDaMbv2fV(T2>7{pVD_X}Unj=4bWrnG6A$0Zj%lE<{NP#I|J1c=>zGDR +zBe`1zmQ9v(CgW4et%9C4uGLzTY-soJm`0Pai)d-r-p^3dX)?Z(xlNeRWZISi>cUV?;UM)bLg6)q+Y~1JbRF;>1S_90Zj$3JrYSE +z=T794Ow-*YM^`{rsS3#)u84HsHJ$X#pMiUICSle0kT~)^@|40%RNh=tO!5%$-a~)g +z#=?;{Hh*12er7-$U(Y04@xG4Gw*IR&2+^>!&?mw(B%Mq^93%G&?=Pm`$&!B~4DBoJ +z7cGOp2mdr=G@b}qknFGqFsPFt;EDDvne5z{;rQx?U{6@z$ig08U@tP23BUB>1f^Y!g1j1Ki@cS72jxZac65$nu +z0|+pf@_t3z(BWU~q}-|Ys#jn8bZBVk=FLBAw7Qts_*7$B8v1?nCLuIoy7iBaiRR^q +zU?w_|T7sELrR~uIj5iZM4l4Tl7~L2huG);mWSBuw>`vCPp@}+iS7StoXr_pa`dmg +zziLOkzlxqmj*25x_?l5s6K36gObzM{PFCX27g-emE8=$ZZFzTD7zh|X>J^OR?qY{0jK5M_m_a}S|o)zjH{uJ+{+yxrv1GL3qoR7jM?sEKgH{MxA +z<0H`7q481tj`%m=uO30$Ye0iPh5TjA(|W{vP`(cFqj>KOes>_g2l>?)>pJA$ILpem +zA8-E&?W0ex!v`<*-8=mN{MUj$*@`)DK-iDI9LBo@zx}2SZJ_QJ^sOKLegiQjlr9VpsTd{DLIeJCVw~O&E2S^CxSl{;Q=W5q@Vu>B;s4)b91;T%975({P>O9Zu1Yd~H;Ji^VAQwEHGfqOx*1wv>Lze|WIiXY`m +z9o9~rnp+n9DnL!@=kpBan%eHai8Z{_NAT~Ee_t+}U#O>6&UXHc?qCT#>+sZ53zb5` +zN^#h#aufLY1mphQb88|9Mq +ztxEKY_TzrM_a}t^7oWs*5BhMHw0H0&|I(N0R@m^q4_?71;45Kw{I`6x(mfa>ujW7Y +zbxdIjJs1BIzK*W}wo%(0733Fx&(|>>KkWYg+rEyeFYGfjVSf(Z*?-s9vBDl*IZ{FQ +zkn%6`s=vq+JFHL-cJE=TUld;Q2ZNfdhc9l~vxRzAhSVH8N`yTNER&uplKB +zD*(%k!IbQ`ikZ?;?|~}%(zTydZyHot|M?Q)1of!$b2>>Qw^EnIpND7QyF(fb63`TZ+toU*7b{F^e$|{GguxB@hwBstr>1k +zlunO#n?woL3LAxS2Q#XiZ@8xa3wR*PY>d)@URv-Bs#gwMm7vxQ9a3mVD?CsJ^;xKn +zQ!xo~E#Szn0LS$s)`42tI?xgbLz0R!o=Kp^3h%qv)ue*L92NEs1O5cF!Zfg4AQh_s +z$LX1brZZq00WX;DK2p(vb*3}j?FW4XtGWMcV()my$mz&a4=x{tS?!?FmOxgs4uSfZG9jEn`T*ip +zh-G}UC(%u17E&8A-hfx(a7`i)ACdbK{IS&bec|!}-H3NM_;-W1<^7m1 +zI&Rty*Q&0W1{v-~m(|6&a&oAL$4HA=IU9tR_t6>6bgU01b?h6Ye)%Y0hy~nr9-&X} +zNa7vO1UVgf#>?q=>Up9Id>-5Ys`6`@k?;Pa@zHyNq`v^mxjav~Uun(lC=SN*xgDGQ +z3#~awKWHuYv(|~8;y^q&Zd}`!^68m~n`0s@a;PrhzniDC8F;tAIv%yA;b}VL+-ZVl +zY4MN=oZ=%wERP*i)g2gjNGd8GIwHVkftO&pFh=&e@S-3FrDL5ljPA}E;*j?kr2Znl +zg0uK)a0_^mvG^8bD95NJf2>lhuO`Lql`;IsiI~A4+ZIZ&N}r?LC35@tU)-2bT^wZSi|+sIalTT{$E+PY;&HwLe6{g- +zTLVpW{eSX4Pc2*S^hQsA{aNR7-~|%y{Qo(B^d%St^+&IQMS?wmG(6D55B&&F2C2^b +zK>tZ7ryl94F57pv{LxQ8ps>y8m~l`VE{0{|QfO|+7sglV?P)f9z>B}7;YGQ3m`AXB +ziERpOX8*n)`3bUB?SJ-4Ps{%PTgj;5g$Ml9e^^s5*Szh0{=_ZK#}^r#?Qem91OAnm +z3{nsB`N+>lSdOp~Au3P$pY%N&U--9u&r*6U4}togEkI0t&(gj{arUvE7ly^1W8KtJ +zU<|yVr{s7;^IECD_L5fB>O6l&j?3u`eaamOUE&}u>tVza_@vJACbQIox3m*y>Dm~( +z&iB-(x~8~;J%ZjB@QJCz3bKJ55?WOzx7_LS}@J*5bY*c88zpEApX*NAbRQJe$(!486$dAa{x{WJ*&S4}>;y +zDmkYwo$HiBuW?&L?{HK62SOiV76*IgdcC2EpuGd&f8MqQ?E!z1-uIN=xFs9I-S#-; +z&Wl@*>FdTE)Y`|qE4>~UQ2DgmsSI;np*R@Vt2r5&ZE6qx!)EwffIfaIv~#$&2M21Q +zQ6A@3JE(steI0FSgRu3ucDwYt4$?75#zx+~E!_$$|0C?2AECc%fonwIRT$PJVbL<6 +zx9orq+;;z)f~JaE%RvrsgpPZuMKb;%Z>vCLO2#BVZ|io@vF*owOX*_TUMz4L)*S2h +zx=c^R@iFcfhL<;Y&j{Q9aBkk4(2xvD#%J;@BU0k%dvtE1GB&Bb)^?v~c`#hnK1BWT +zwzSb3I_O$IIMb6f_%v+)ggxrqsjkX4)nsP1f?eG<%>~akd&mve!C1HgOTm8X1wGg| +zW6RJd(8HmAm*~w>3{86l@Ks|~_kcp&GC<2}2M!3bZ=BE6r-*UoeX3p+wAu3Sc0kWF +z1KOTcj=b`|6{32(l3Fi_-OzEP@6b|(82vTlrV%u-+3uiz#q8o>S9Si#@ +zSd@=*Q&}nfn+LL;^WXiO2P^N}yN~{5fJb0;mI~~bAAa1GZ2rf8D}lZjk!5jw-P8V85zfHPt!gITG>B5&Vy?==lDNCLyG>*g?7Kfu^*aHVcYEPdr_u>3=1|g +zD4BV1;~sd)32yulc%=iDGF=*TA+?l&CxR`ol*xxg3ic|M@@$ImSMgWYGC2ox-mCTN +zMAYt*-r)W@cHpib4`Cd^Qi~q{Lf`H*0wXIl!`gBhJ^WRlic^}me`G5Vp3Q?Q#ux&zv1>BqDlcP>? +z?R39pZVlpwH<-Cl$90V@twcNl0p7vkdUa +zm$;p_JGvJdX2w5ER-X*RpJ>(-?5WZ9WjxzJ?PE244mY*d(cMUe-zCk+sMNj*jVTQn +z)&5T{bApQhQ{CBsMOEhg|I9GM>i`E-7?E_G0fhk+d9gsN!;7zhshOFp+Zh!PF9Rx8 +zTRpYSiq`goJ|>Ff+BObgglIZ|_V2mskDykDrATeLwQFWwI1KJ!X8oVd<^TPiGlv;S +zd)eCOdLFOqjLexcbKdTA-@p6!^7-;3s{*XA0Ft(YsXGHb8$YOxLz#fZh46ZaO4a6eD!eAUxT>&+PXn4w0P(B!6 +z^@+gkv$%f!wthR;gy-;WuEFY>`L=Ecx8LgG-kvoxYi=8=^@MEZ$|py&?&4}`Uu)U0 +z?Y=P;f=;_77Ww*K#E#{x#8g#A&c%^p>PefFORgWmH5Y!(8VI($urs|?INWY8Qhk6q_ +z*D7wGbgr7`#j_R9oqLoEtc5R#`b~Mh>I6LP_7?K8uDlWL|r)qEngTm>p!J!$V!9n|sO++-mEO>|p$F+&UUBTNt8XPSPB@K@M +zx`77AjyU9xmPr=YOt5wWR=!I93|xQm+0cA|(f$S5(IZ3^j$2H~vTl4`P^*ehnHsYj +zRcccwaxFj2?j-Mqhj$l%_;=9-&s|@9J7rW#j5}(lPPA9rhn&ke6Js|;|G!^nBB%Ge +zIuj3ld1IZ4;M9Mm&cy0V|2;YrbgjBE_V!#=iPwvsGm2ULkbg$DMJL%OA5sZ2A(-!f +zV$WOy>6G}PQbK)CE;!M7b@VJwXs&Tk-aT_=Ax6mCFcYcI^gX-bdCFQ*?PJPX8jv+o +zWlOiGZ|sBhQHrrFR_AK6;=5%ZqN-#6XRvB(RSBcuJyoucG6gTyl5zuP{ow|ktCF?@ +z!y;JB`jfT{61P;F0^s@bf#-`{%crnxb1I=0BIpl!hVyG9LOmfqGq@C@wb9L+YKh2L>6p<0KbaZ2K2#+Ne;eKP>=b{@4VMe+kVyv{xKXl! +zY2G9IL@5^f0v0QljA+E-5L+YO#nbpd8GbQ}gFJ-TS{nY|1kFt9E243)$iDNi?W-q? +z*<9|JlI&AhEc)#v4(%e$|5ROg1&3B;yazNUT9~3rb|KEo!=TmNltHWBO$=IzJNuU? +zreFqn=WfECJ>|unJ>|un&GzEXUR8UzvpGY!vk&0iBpfMaoFA@*=iAMlHPZPE&b)M*(Pvj$B8Y3e&zoVch=3C^~3u}H*5AeY~>-$&cqP~h}Vq#fD&Q$$*)6= +z7Hu~;P@WuD^5y*&F{)1V6VnhU)lh$dh5UUkyeGaa-Ct>5GX>Xo>{V)q`MszrfN$k- +z^aZf`4GGPOc2qxPKrv0EC(w~TuVe~LBAbD#Wd4f#YO<2|Hbk#Sl{eKID524!L!3d0 +z`cA%`(Vq9AZTt~02sA`An?&yhqithw-Lzkzme3?K6cDALJ?t0vpu=y{yCl5BJPt~4 +zObMf1nu=d^D=c`}c~{3%9r&XLs>xUeKfVC_gW^#avB>@2EzOJf#Rvn1in)v58G}k7 +zWpNX{4GQC8>BVj1+JD#%+hv`BNpo=2hggM(aMv{m8c8j+LpFpeVqc&o}c0V<}H}p +ztk}2Gi3b)wYRtzC3qgLp2V+KdV@|IH#Hsw22l4CZ2XGu)>na^%^mEa!lM%y8Hg9n} +zY4kJXHdpVP*)09eW2UTTY$s}<`RcRmkJ5Yszf@wHZeO*lFoExX*`{0`#Pj{n+WZsw +z{sNoQU}@u79;!S_J>T{#b_#l{jmSaBbIuTaVzOoo;CW3vjI-XWSmOl2g6Z$x`}T!_ +zvQCF`DaVhAWr{Jzm%i$l=;m9Us8>83WNLH0RUiIvvdQB5%l>h#R+nvmM_)WIMKc4J +zeqr*DiNt=MYSfBnTHzSOMaEcO^f#9 +zWYm4@CHrA0W0QPxWJ8eug8DzQH_6v0k4IyXO-ol)i@qlM5Dzl(s&rKsD%d|7)2!NN +z`2%m|K>Ayqx}{f&f2tB95K~m##h+twFDZ9^l%BP#5GzJ)Ud-xLqFZ>^=8+#!Wdv7N +z{Enx;rkHyt`l{>5`yt;5#bGH2fu0$QwqlC+*eTmRsFcLLh(T|CBNp?w+fmJWQx-Gr +zk9ZdJ`(s5aC-Hfc;a}rXy`m~l0J$cfkHWYx0b>j8pXQ8;HIYA((!0-#(mVGilwP|2 +zbT6onq#TDWSm=0un9)1;M=^Tk-=w&Pd@X%(&8Wtb#ufS%IR;4E(!Pg&?qT@KpMRG# +zinD{?Qo7ndoilo57-y9B^9b%gT^nR(GBRhBu91A-N5QK3XY~xT-oluBlt%iYdWK{d +zkex@*f^6%_F&7KX+Y7fsdn2G*(%s0h4wQov&>xIBK^?SjnSS_fN)=|R@83i^W;@l! +zO=#m-&i$R;*u0{aH{T6q3mu|uZC6%VOD_1c9I_SKu57|AV3l>v#i9$3w;Zk0nMuQ= +z(-{-yo?7ZiWycLyd6+`X*1=ho|=@h|%R%7?eO=G#V!Dx*sg%~@i%pvQlFE^)hB98ZYh9E4io6wD8(O)i`EAEk7sQ47AVll1)M^rSt=;tsbLC~fNjlfT`X(agefj$i1*^g@7;6;fQ0UJ{ +z#B}Jrtx=z5w5hvPT`JZek*cLNTLo{$Ez~0|M$S6=H|p2OZ%q9!J^Pd|R0n&M+B;%x +ze$>v%R-%5Ia!z)@hLtrCTFCA-4}dZfF#C03g;3c$>g=eUZ_aq7)#=5pk6 +zyYuJq2mH);;#|Xf_M9KNgVfPSzOU;K;Z+*s{9LqdK6H_BqRkcrF>@5pC_YuhDmnDm +zFCHw7c@Y^Sbyh_gPx?FN&OWn~=`XPQ#u|H7raI&gb@oLhk)O93EujiyR2{BqKsUVq +z@P|I-ibAbcAhdb?M2pb>%vWqJ?1YFeEouXA`7rVW`fVlVe@#w|qHU4YO#fEv=F5oM +zTxR-Dw?%A&)zGFW*H$S_O#c&Y|0a&L{%E74!7+Ud9MkLY93gsH7S{Dh3+Foao@IB~ +z&WBsi2;p5LxZ=@%Lg-W#d@nNz@#XecggBf +z$HT{JroGbf)d{-(wXo664vR~xN8GLW31P`Q51^JI7|OF$nHI7QwYq1d$el!_KYEHO +z*ubvDh-r5GR_|Aw=vb7ZD9!KVU3XbkXj=>HK86MM{JsG8u^PnU`c|Yq47EthRd6T! +zXb&$4OFFaN-~YAO_c>QCJd-T1(ksh3JIhm)lg01dZud#Z>$}~qVd*u1&9EZ_$PTrc +zzG-%)_?qAM2}K`^m%JOn=720RNJ)Nb~*2f0qQFbR$+eTH5+~!NIp+5|* +zff1FO(KDR&C`;Uf?|)dc2BWGiZ#b0rXncg{yv}M=T(cItcSa6JVX6a6aW7ZamENawi +zYAK64k@(u$t!^b+rMUHcY`sq0IsjWcum!!BK3i~1nr%|vlHX45Eo732c|!Ee%61gU +z0lA8z*U~$n&zRUpz0s>(V1F%DRfY2!%<46;CW7@=Yml7*E%&wbf#O8OdntVjb#)<>UJK8eQvesL@4U +za1}JVXzw@E=%Sr2hu@EQH8ZT*dY23Es4{LP& +zJ=I&I%W|)jze~SO*V=C|!`By;;zPHkJYU+*vT|U>Kh9h~O+4lQdqumF>mVOUs}Q)x>D{tx5tIv+C_ld`x1jNGp*E?=Ij +z;TBq4O8)5@<%3U}?n_hjM|Wcp<6#Z-?)}#VMDliz@AvOkm^V7`|29Rxw!6|%Xv}F? +zV8p(5BqYV9EEMZ-eeoVOjJUQ;!4@{BMyn@no4H3UFU1re6qY!BRWW7b``NSO`!#LylFElvbCrMK=8xxV +zdZJo=RSPa^#p9=OkI~LgJt)vIhZ~FjFsr7_5n{}#u?%YW_=(y*pbvl~`B<8*M)H9o +z9mRa%75j+&VM|2eJi?|mCWCmf*r68Uxg+PJx{Nq9+ldLtcSBOP13`82D}m3 +zo)&G#AxzIecyWH~W_sp*hv~T!M9wu{Oiv3o)Kp +zPYvTi!Z&eK8svD;AW5;nGdp6;#EP|u;{naBLDE2;LaxY#q`8ylZ_G3YxsYLlT*%NN +zT*%-Xav|ls0-F2LInw-x=BCN;=doDic;B7igzMYS9KI@$J)_r-QFK +zz15qrnb~~)hJ?*@(DTwo!e$y?)9@|{`M=>MlVEGDXt!u5qXj418Cx=WQIPACY*!(w +z!R=Zt1jRm;PILJK4n--nW3V6tU9W%#->>NWt_h%`BcpYf>Wp8v{|AA83VL5{jyd#S +zrN_S-4GvT|szTIfd{Mz)o2=JV#cT~Ws!H??xd6*yMDl{>{B=3AGX;@-XQ +zRMADH4TK~1{)_c{L)RSJ>+G|pFFrE4;8b5n_D2`vg^&W>o(_16iVEfxoPgd>f{^h= +zywG+u@9?AoqmVK+UeN7vUY>)$rS)+_#~#h)&cB5g#0j4Z%J|$P=U>S=bpGuVw9SKaeygBw(U(gRi +z3-}b3B^JbJJZYdt +zf#+p*OaK+cg8r%!EU^eLl2;REOdMLK^qh{s-=z0t(M|`WQ-c}0rX{b}+Nm;Fv`erC +zaYoq_|z^Fr5|_D_8f^-Z!bgz5v3G1&D8bW+wsC*?QIN`dd+So<($;G}%wZ+zCl +zl(wO#2iU3_~g{8abYe2ll@3TTWB@%*7&f~c8G)-L%d5j<5fnw8Ruyc=v` +ztv5U8ITg!lgvprk8nA7its%WKZ9a|<8E|RFRz)#)+=#wMT8bZ*@lJcOAh0IJC@aW#tvYcy@+|P!{4{zS@VvQs<5p; +z7OLB)7&bkZ^z70zEYC~Ure+gy>R@@7u-J}Bl^q9TraC(2Z2Cqm?O2dOQP4aGBlkd&35sC@;P|S+9@=eG +zy|3D#uG){RLb28LEJv%O?2MU+^^Y*AQkGI3Vq=KjU(}lPsG{UtQt%6?LW)|Uo6H%w +zF=F(5G(*VEUCxVsG_ +zx2+7%nMM2T)QM(_TcX!)kA#J{suq+kkutQh9pkkP-tl(w^AlH%DH(|?uEskB+PY`9 +zihKavSE_ZSHbd>@H7wL-XxybXK<$d!4*A5W#*u0rsU5Xoc?HYwu+0Jde-PiNb|$xx +zpzml!(DP$M|7mNLv?BH(R$C9P2u`H!`S8ru(dE-kyTw*8UjGNQ65KcRoVySQdboCj +zfL_Xwg|Vx$7rudGKKKi2(JWW8S$wZVUckCz%Y}x<0nwXyOCD1swv|iIy4%WX^kTjy +zsBYpZXS9#}KV-kpp*`eX3cTNeyhB-Ifo8sX;kUTXlE%UlqQ=7GqQ*in@*Joidrs(v +z#sdA%krGAeyuS3LhhWE5)DAqD%)__o%!nz5-?Xj2sJ*SfuzgK)TYqD_r6arqJxl4D +zlcgtpN}yBGe&A%&Nxr|Lok!&c+2=lHsx`ThRz7Pmr7JV;coaJPAkn(CF*$H6J3qkfLsH|2lGeWrK*2-&Qy$PXd^FZn3e +zB0fAH@p`gtWvz=`e`$WHI=!OKiY)%T-Vj4fOLbEW)CM=Cfj;*_r&EvmFH2e{jR~LV +z&{K@XxJ=6DW6{QfL{6BZ9DY=@(x4K3@NW#$wE*=Lda2x>y_XeM$~e#%HEx2ZpAq~+ +z*ur7W;du2{wvg%tDd(B^@H8)@IU3nmRJ%f&Fr;%q{6je>LFOaUym_Fk5>#bIo4?l+ +zUy^eas9%N0tmibw)$w@huuZ8&`@(GsFq5V4=*lEsZT?=iY?gZ+Q+7s>KFu-H);MqY +zBf+8tiM--##?7MjJ3})Nb(bfjiYf5eX-wg$X3(iWv)Dx1^k<-}GA{OEOUFqugjLZ|4J^iX#b2% +z$A6!j*TXLHRmsvA1 +z?aQR&3UeRJ?PcNS)UPAlYqjR0YZ~|8)8MI|23|aRh5nU95*o&fPandIPr)2_659Dh +z_*pHsdmju&Y#|GpTs$-cee{V?w19#Vsw-l#O^iKG>^&xm-WiLw9Xw1_7`{Z_;VzKx +z8SU6QreHkgxiVdToM@?zh0QL_YRB3I+Xw?j&RRC1&=z8-uXM;=NR5 +zjW%V`*4_q^^Ps{p^$DC3b>n|$EgH0yPW+#T|A%wvDPG-&G10sBUOz@+A<1olDLUV; +zEsVBXFqUl4IVoviQhmDe=AE+~b7)*6Q}ccA-5Sg8TeE8Maq7d}?)yP0vWdjiu^^KmRNA?W*0pc;ydB}5W=0~vJ +z@BGQE_x!y#V!czJLQzM0u7+~y@$6vzoo+5YeeTVrm-B2rjQIS$5+i;eNa_+Jeqa5~ +z81eaghcn{y_bxN%v{e(QZCG9fQn=&qr+)9ly+n +zr{ltCkN5`o@P&bxx#i+B*$Q2?1R0!#vF_hJBM|MLenFzc(_a!Dp7ua=c=|PtdQkDn +z(hC7PnGH`p1oco78(!|OplyI&H3S|!dXJJcpJhSJ~Zy-#U&s_K2sj&bJVROqer +zRys}##9|MEb>Ef|*tIw{d+N9~{%23Z%i_O1;Df+ws8V*LFLDNVSAoioxzDwVv>Ip7 +zjsUTyE3q%}Z|wVDgSu`Nsq3L1g#1JTJRQ~lJ_3CHUYP)oyY42y=kJvW@FSDsrrekS +zPc1|q%P>x(mD0VF2=M;M4$O6hiKDI>>H#$BdK2J1V=m1lzRQ2FzX|_6I+J4b9{#%) +zwpIw1P%L5}aN48E0T0wKs>!h%Y8yYS$#F-+a7_;C6UiR*vTsCQx(2-T&_5w&YFaeN +zOAka|^#Vloh?lN1%x{)>>34fk(aEM&dr{Hn(41HF-bApoPZYPoL{Fxo(xZ~2~uC-0~)sOXRV02Q5P +zbRhHZio%S}3@SR+_|uFobf;#!s+uW@zQN3?kL*#BdSnlCO)siPDoWz9 +z_fRMiPiTJDY3Z2IJfVf_n9xeGzd#UR8SRLxOaUk?Hd$Q~d5Xp3kd6PGNczpc>fhzR +zEgJ7{fwts$lYWYRO64V=c#Kg)v?Z5;b}MO1hQlH^^s5l{k+db@MLj(cHv6;iL`w57 +z5ApgF+!NWivvdBF|r` +zKbPmd!{@pbYhoA+BezRg2Vs(12jN`pzo(5JqJ!{`mkxqoe7LBC5GCp$M6y}d(2~%W +zxu9gvMnv4QYtyH?b6Hk;pPLd0-z47%zuQT=-b=pnu6$q$X5(3r`C;xpO*<-6CFC{; +z<*BAP-0wNINaH}E&upeYaIMlbP?$B_U>~?Pu5_y~=R9gqW>fB59@V{rbj|gvp%jK^ +z9KKWX$*wBrI#|Yl6iw-gWYEKq^&qj{;V;*|n8~-tfz%%7Cbg3flt}F~!o_-J)))qv>;|v3 +zW5u=OL{d96>_KX$Q4;OZrZrHt*C<02Uc>Rq6oS;=0Us(BH5NZCK^;<$NAr3HW7()F +zL)#wNH1up!Tf?>BC}w%1IwRr)((_N(W-vYjtDP0u?2}k_TWHCY3tSzt>A~M3zQKDZ +zgUfXe +zd0uQ2Ag`Z^(;PzX|1k1;R)<7h_rwv1Lr8r!cLv*bg+;sM +z-Nf~1H*tN;FygxQpCqpH8&o23{mbbRasAuZh7i|(B5VE8|McW|$ZZgjPdrhao++a0 +zI)m7@6^#RHQ@~oM_OwD6CsyAn$|pdBc5I6ktaXvJp0a^R>*mp|@aNYnl5&Z(Zm#Kx +zXbJE6-FeiBT2UQrRU>)Jf{ckehC0X>k9&pVW0Q7i1b>UbxxQ_vZq1$g +z(dXyieKR|3Uh>@Blw)|ux&F~`@8`S={{Fo4?^-&zQxaYLyek^_AlF*bFf&DoSk!Ur +zQ`XI&1BjSfQt#v9 +z7SHdtHYvXjc}Q*IP$i>$FwCT8H4lMwk9R?d54Ii$Met;r(^-DR@}?U3xt-2U$48W_ +z-Ar?KP<2DHIWLmUiEAEJ?RNvV +z`TcIT`KMn-xY_2UI`@5S^V;N5T_BsU52UjLpCZ?bZ0^g?gpJNlioXe5pt|f7MMnzXy53)Gsc%KxYHa`GacHR?I6(C)Emnij3MZ;-S%q?#u$Sfi>~2 +zWiP9jYWNCaM5&@or@c0D{2E%Pn2Xo9+ak9jUZGai3jY}yRjqyaRW}oz)-F-h3I`(% +zpswS%5#Npgm%sD^e`Q|n0N9=Um3;i~13n_wbm+7>G0zDsjj8%z)UB#ONtw~%;iA)X +zeGClr<5(ys#)YL0d9ts#pDn6A{VV>aK9_2wcjGhpnZI*b9A&y!93`_EepN(E_;Z=| +zOpME!(9Ow&ZcZk2b26culL_6NOz7rhLN_N9#Mw+_Ltc-2>_JJhZ2@}f*_NlNx|yTuD%E!W*m&47 +zWQj)^lbe$d@*gH*A7qb9YlHQ&vJTnRO0f!9A-<|v?n6?|IS6`>p*hCB;#`cKykz`I +zPmf4_AjMhEz*g@;%q1DQe7A!ceEb?~c?Qd)SiXWrVHlQmSD~MC1?=2@)^b0V(q3?Y +zVZVNk@4kia%K1ZNhtpV1zE2v5Y0M`7Ea~X**jEPlzTYB$;vnppe>Ic-=d$RBe*dR) +z=%+K|V5bO+SP~Kb;vx9C}(}hO_AZSq}ZrWzhc;{CS*9au_p>31_~&sAay% +zz$qpxeizZZM&;95Ms){{5uBodff; +Date: Sat, 2 Dec 2017 11:47:07 +0100 +Subject: [PATCH] dont build libfdt + +--- + Makefile | 2 +- + scripts/Makefile.spl | 4 ++-- + tools/Makefile | 4 ---- + tools/dtoc/fdt.py | 2 +- + 4 files changed, 4 insertions(+), 8 deletions(-) + +diff --git a/Makefile b/Makefile +index 8086f3c93e..4796b488ae 100644 +--- a/Makefile ++++ b/Makefile +@@ -1379,7 +1379,7 @@ $(timestamp_h): $(srctree)/Makefile FORCE + $(call filechk,timestamp.h) + + checkbinman: tools +- @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \ ++ @if ! ( echo 'from pylibfdt import libfdt' | ( python )); then \ + echo >&2; \ + echo >&2 '*** binman needs the Python libfdt library.'; \ + echo >&2 '*** Either install it on your system, or try:'; \ +diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl +index b86ea76bab..ea54f9098c 100644 +--- a/scripts/Makefile.spl ++++ b/scripts/Makefile.spl +@@ -246,7 +246,7 @@ quiet_cmd_fdtgrep = FDTGREP $@ + $(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE + $(call if_changed,fdtgrep) + +-pythonpath = PYTHONPATH=tools ++pythonpath = python + + quiet_cmd_dtocc = DTOC C $@ + cmd_dtocc = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o $@ platdata +@@ -370,7 +370,7 @@ ifneq ($(cmd_files),) + endif + + checkdtoc: tools +- @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \ ++ @if ! ( echo 'from pylibfdt import libfdt' | ( python )); then \ + echo '*** dtoc needs the Python libfdt library. Either '; \ + echo '*** install it on your system, or try:'; \ + echo '***'; \ +diff --git a/tools/Makefile b/tools/Makefile +index 8e1009bf6c..459c71ef1f 100644 +--- a/tools/Makefile ++++ b/tools/Makefile +@@ -232,10 +232,6 @@ clean-dirs := lib common + + always := $(hostprogs-y) + +-# Build a libfdt Python module if swig is available +-# Use 'sudo apt-get install swig libpython-dev' to enable this +-always += $(if $(shell which swig 2> /dev/null),_libfdt.so) +- + # Generated LCD/video logo + LOGO_H = $(objtree)/include/bmp_logo.h + LOGO_DATA_H = $(objtree)/include/bmp_logo_data.h +diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py +index dbc338653b..04f3c5935c 100644 +--- a/tools/dtoc/fdt.py ++++ b/tools/dtoc/fdt.py +@@ -10,7 +10,7 @@ import struct + import sys + + import fdt_util +-import libfdt ++from pylibfdt import libfdt + + # This deals with a device tree, presenting it as an assortment of Node and + # Prop objects, representing nodes and properties, respectively. This file diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch new file mode 100644 index 0000000000..b6643568e5 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch @@ -0,0 +1,25 @@ +From 39dfedae58057500912a6f933fced3edb9376b3b Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 22 Oct 2017 12:48:24 +0200 +Subject: [PATCH] rockchip: tinker: enable rockchip video driver + +--- + configs/tinker-rk3288_defconfig | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig +index 00e2d81954..62cae4f21e 100644 +--- a/configs/tinker-rk3288_defconfig ++++ b/configs/tinker-rk3288_defconfig +@@ -80,6 +80,11 @@ CONFIG_G_DNL_PRODUCT_NUM=0x320a + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y + CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_DISPLAY_ROCKCHIP_HDMI=y ++CONFIG_CONSOLE_SCROLL_LINES=10 + CONFIG_USE_TINY_PRINTF=y + CONFIG_CMD_DHRYSTONE=y + CONFIG_ERRNO_STR=y diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0003-Add-rk3328-efuse-support.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0003-Add-rk3328-efuse-support.patch new file mode 100644 index 0000000000..c08df9079c --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0003-Add-rk3328-efuse-support.patch @@ -0,0 +1,126 @@ +From dd6e1ab93a92e133c41a8665f6d8aca9450bdca8 Mon Sep 17 00:00:00 2001 +From: Kamil Trzcinski +Date: Sun, 20 Aug 2017 01:52:34 +0200 +Subject: [PATCH] Add rk3328-efuse support + +--- + arch/arm/dts/rk3328.dtsi | 25 ++++++++++++++++++++ + drivers/misc/rockchip-efuse.c | 55 +++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 80 insertions(+) + +diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi +index 2a4c4929d7..611a0d4b21 100644 +--- a/arch/arm/dts/rk3328.dtsi ++++ b/arch/arm/dts/rk3328.dtsi +@@ -342,6 +342,31 @@ + }; + }; + ++ efuse: efuse@ff260000 { ++ compatible = "rockchip,rk3328-efuse"; ++ reg = <0x0 0xff260000 0x0 0x50>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ clocks = <&cru SCLK_EFUSE>; ++ clock-names = "pclk_efuse"; ++ rockchip,efuse-size = <0x20>; ++ ++ /* Data cells */ ++ efuse_id: id@7 { ++ reg = <0x07 0x10>; ++ }; ++ cpu_leakage: cpu-leakage@17 { ++ reg = <0x17 0x1>; ++ }; ++ logic_leakage: logic-leakage@19 { ++ reg = <0x19 0x1>; ++ }; ++ efuse_cpu_version: cpu-version@1a { ++ reg = <0x1a 0x1>; ++ bits = <3 3>; ++ }; ++ }; ++ + saradc: saradc@ff280000 { + compatible = "rockchip,rk3328-saradc", "rockchip,saradc"; + reg = <0x0 0xff280000 0x0 0x100>; +diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c +index b4ad19cfe8..81b78f9b2c 100644 +--- a/drivers/misc/rockchip-efuse.c ++++ b/drivers/misc/rockchip-efuse.c +@@ -16,6 +16,14 @@ + #include + #include + ++#define RK3328_INT_CON 0x0014 ++#define RK3328_INT_STATUS 0x0018 ++#define RK3328_DOUT 0x0020 ++#define RK3328_AUTO_CTRL 0x0024 ++#define RK3328_INT_FINISH BIT(0) ++#define RK3328_AUTO_ENB BIT(0) ++#define RK3328_AUTO_RD BIT(1) ++ + #define RK3399_A_SHIFT 16 + #define RK3399_A_MASK 0x3ff + #define RK3399_NFUSES 32 +@@ -95,6 +103,49 @@ U_BOOT_CMD( + ); + #endif + ++static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset, ++ void *buf, int size) ++{ ++ struct rockchip_efuse_platdata *plat = dev_get_platdata(dev); ++ ++ unsigned int addr_start, addr_end, addr_offset; ++ u32 out_value, status; ++ u8 bytes[RK3399_NFUSES * RK3399_BYTES_PER_FUSE]; ++ int i = 0; ++ u32 addr; ++ ++ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */ ++ offset += 96; ++ ++ addr_start = offset / RK3399_BYTES_PER_FUSE; ++ addr_offset = offset % RK3399_BYTES_PER_FUSE; ++ addr_end = DIV_ROUND_UP(offset + size, RK3399_BYTES_PER_FUSE); ++ ++ /* cap to the size of the efuse block */ ++ if (addr_end > RK3399_NFUSES) ++ addr_end = RK3399_NFUSES; ++ ++ for (addr = addr_start; addr < addr_end; addr++) { ++ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | ++ ((addr & RK3399_A_MASK) << RK3399_A_SHIFT), ++ plat->base + RK3328_AUTO_CTRL); ++ udelay(10); ++ status = readl(plat->base + RK3328_INT_STATUS); ++ if (!(status & RK3328_INT_FINISH)) { ++ return -EIO; ++ } ++ out_value = readl(plat->base + RK3328_DOUT); ++ writel(RK3328_INT_FINISH, plat->base + RK3328_INT_STATUS); ++ ++ memcpy(&bytes[i], &out_value, RK3399_BYTES_PER_FUSE); ++ i += RK3399_BYTES_PER_FUSE; ++ } ++ ++ memcpy(buf, bytes + addr_offset, size); ++ ++ return 0; ++} ++ + static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset, + void *buf, int size) + { +@@ -223,6 +274,10 @@ static const struct udevice_id rockchip_efuse_ids[] = { + .compatible = "rockchip,rk322x-efuse", + .data = (ulong)&rockchip_rk3288_efuse_read, + }, ++ { ++ .compatible = "rockchip,rk3328-efuse", ++ .data = (ulong)rockchip_rk3328_efuse_read, ++ }, + { + .compatible = "rockchip,rk3399-efuse", + .data = (ulong)&rockchip_rk3399_efuse_read, diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0004-Get-serial-and-ethaddr-from-efuse.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0004-Get-serial-and-ethaddr-from-efuse.patch new file mode 100644 index 0000000000..42bd7f21c0 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0004-Get-serial-and-ethaddr-from-efuse.patch @@ -0,0 +1,184 @@ +From 77349a847b0649e8ead1dba3a297607b2a674aaa Mon Sep 17 00:00:00 2001 +From: Kamil Trzcinski +Date: Sat, 19 Aug 2017 20:38:50 +0200 +Subject: [PATCH] Get serial and ethaddr from efuse + +--- + board/rockchip/evb_rk3328/evb-rk3328.c | 124 +++++++++++++++++++++++++++++++++ + configs/evb-rk3328_defconfig | 2 + + include/configs/rk3328_common.h | 2 + + 3 files changed, 128 insertions(+) + +diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c +index d6fc57cd8e..1d0f7e9c95 100644 +--- a/board/rockchip/evb_rk3328/evb-rk3328.c ++++ b/board/rockchip/evb_rk3328/evb-rk3328.c +@@ -7,14 +7,20 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include ++#include + + DECLARE_GLOBAL_DATA_PTR; + ++#define RK3328_CPUID_OFF 0x7 ++#define RK3328_CPUID_LEN 0x10 ++ + int board_init(void) + { + int ret; +@@ -80,3 +86,121 @@ int board_usb_cleanup(int index, enum usb_init_type init) + return 0; + } + #endif ++ ++static void setup_macaddr(void) ++{ ++#if CONFIG_IS_ENABLED(CMD_NET) ++ int ret; ++ const char *cpuid = env_get("cpuid#"); ++ u8 hash[SHA256_SUM_LEN]; ++ int size = sizeof(hash); ++ u8 mac_addr[6]; ++ ++ /* Only generate a MAC address, if none is set in the environment */ ++ if (env_get("ethaddr")) ++ return; ++ ++ if (!cpuid) { ++ debug("%s: could not retrieve 'cpuid#'\n", __func__); ++ return; ++ } ++ ++ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); ++ if (ret) { ++ debug("%s: failed to calculate SHA256\n", __func__); ++ return; ++ } ++ ++ /* Copy 6 bytes of the hash to base the MAC address on */ ++ memcpy(mac_addr, hash, 6); ++ ++ /* Make this a valid MAC address and set it */ ++ mac_addr[0] &= 0xfe; /* clear multicast bit */ ++ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++ ++ /* Make a valid MAC address for eth1 */ ++ mac_addr[5] += 0x20; ++ mac_addr[5] &= 0xff; ++ eth_env_set_enetaddr("eth1addr", mac_addr); ++#endif ++ ++ return; ++} ++ ++static void setup_serial(void) ++{ ++#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) ++ struct udevice *dev; ++ int ret, i; ++ u8 cpuid[RK3328_CPUID_LEN]; ++ u8 low[RK3328_CPUID_LEN/2], high[RK3328_CPUID_LEN/2]; ++ char cpuid_str[RK3328_CPUID_LEN * 2 + 1]; ++ u64 serialno; ++ char serialno_str[16]; ++ ++ /* retrieve the device */ ++ ret = uclass_get_device_by_driver(UCLASS_MISC, ++ DM_GET_DRIVER(rockchip_efuse), &dev); ++ if (ret) { ++ debug("%s: could not find efuse device\n", __func__); ++ return; ++ } ++ ++ /* read the cpu_id range from the efuses */ ++ ret = misc_read(dev, RK3328_CPUID_OFF, &cpuid, sizeof(cpuid)); ++ if (ret) { ++ debug("%s: reading cpuid from the efuses failed\n", ++ __func__); ++ return; ++ } ++ ++ memset(cpuid_str, 0, sizeof(cpuid_str)); ++ for (i = 0; i < 16; i++) ++ sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); ++ ++ debug("cpuid: %s\n", cpuid_str); ++ ++ /* ++ * Mix the cpuid bytes using the same rules as in ++ * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c ++ */ ++ for (i = 0; i < 8; i++) { ++ low[i] = cpuid[1 + (i << 1)]; ++ high[i] = cpuid[i << 1]; ++ } ++ ++ serialno = crc32_no_comp(0, low, 8); ++ serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; ++ snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); ++ ++ env_set("cpuid#", cpuid_str); ++ env_set("serial#", serialno_str); ++#endif ++ ++ return; ++} ++ ++int misc_init_r(void) ++{ ++ setup_serial(); ++ setup_macaddr(); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_SERIAL_TAG ++void get_board_serial(struct tag_serialnr *serialnr) ++{ ++ char *serial_string; ++ u64 serial = 0; ++ ++ serial_string = env_get("serial#"); ++ ++ if (serial_string) ++ serial = simple_strtoull(serial_string, NULL, 16); ++ ++ serialnr->high = (u32)(serial >> 32); ++ serialnr->low = (u32)(serial & 0xffffffff); ++} ++#endif +diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig +index d4a00718c5..9107c020b7 100644 +--- a/configs/evb-rk3328_defconfig ++++ b/configs/evb-rk3328_defconfig +@@ -55,6 +55,8 @@ CONFIG_SPL_CLK=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_DM_KEY=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_PHY=y +diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h +index b7971782b5..a2af5a7989 100644 +--- a/include/configs/rk3328_common.h ++++ b/include/configs/rk3328_common.h +@@ -9,6 +9,8 @@ + + #include "rockchip-common.h" + ++#define CONFIG_MISC_INIT_R ++ + #define CONFIG_SYS_MALLOC_LEN (32 << 20) + #define CONFIG_SYS_CBSIZE 1024 + #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch new file mode 100644 index 0000000000..6c031af5d3 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch @@ -0,0 +1,21 @@ +From b6c47bd9f6a8965ab538f168086d4fd99fcf3066 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 10 Jan 2018 19:56:16 +0100 +Subject: [PATCH] rk3328-evb: add sdmmc vmmc-supply + +--- + arch/arm/dts/rk3328-evb.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts +index 4b13a8da64..586c58659d 100644 +--- a/arch/arm/dts/rk3328-evb.dts ++++ b/arch/arm/dts/rk3328-evb.dts +@@ -61,6 +61,7 @@ + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ vmmc-supply = <&vcc3v3_sdmmc>; + status = "okay"; + }; + diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0006-rk3399-evb-prefer-sdcard-boot.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0006-rk3399-evb-prefer-sdcard-boot.patch new file mode 100644 index 0000000000..ef4ae984c0 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0006-rk3399-evb-prefer-sdcard-boot.patch @@ -0,0 +1,38 @@ +From 0f59425a214329eda9080f186bfa82780fce75e6 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 28 Jan 2018 15:42:23 +0100 +Subject: [PATCH] rk3399-evb: prefer sdcard boot + +--- + arch/arm/dts/rk3399-evb.dts | 2 +- + arch/arm/dts/rk3399.dtsi | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts +index a0ea589015..ae28bded64 100644 +--- a/arch/arm/dts/rk3399-evb.dts ++++ b/arch/arm/dts/rk3399-evb.dts +@@ -17,7 +17,7 @@ + + chosen { + stdout-path = &uart2; +- u-boot,spl-boot-order = &sdhci, &sdmmc; ++ u-boot,spl-boot-order = &sdmmc, &sdhci; + }; + + vdd_center: vdd-center { +diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi +index 68221b47f7..cfb99c9e16 100644 +--- a/arch/arm/dts/rk3399.dtsi ++++ b/arch/arm/dts/rk3399.dtsi +@@ -35,8 +35,8 @@ + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; +- mmc0 = &sdhci; +- mmc1 = &sdmmc; ++ mmc0 = &sdmmc; ++ mmc1 = &sdhci; + }; + + cpus { diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0007-board-add-support-for-odroid-n1.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0007-board-add-support-for-odroid-n1.patch new file mode 100644 index 0000000000..a5eae75712 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0007-board-add-support-for-odroid-n1.patch @@ -0,0 +1,1069 @@ +From 018af92e85f8526dbfc7b70d5cd1a7529b79d03e Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 16 Feb 2018 22:45:25 +0000 +Subject: [PATCH] board: add support for odroid-n1 + +--- + arch/arm/dts/rk3399-odroidn1.dts | 601 ++++++++++++++++++++++++++++++++++ + arch/arm/mach-rockchip/rk3399/Kconfig | 7 + + board/rockchip/odroidn1/Kconfig | 15 + + board/rockchip/odroidn1/MAINTAINERS | 6 + + board/rockchip/odroidn1/Makefile | 7 + + board/rockchip/odroidn1/odroidn1.c | 225 +++++++++++++ + configs/odroidn1_defconfig | 97 ++++++ + include/configs/odroidn1.h | 28 ++ + 8 files changed, 986 insertions(+) + create mode 100644 arch/arm/dts/rk3399-odroidn1.dts + create mode 100644 board/rockchip/odroidn1/Kconfig + create mode 100644 board/rockchip/odroidn1/MAINTAINERS + create mode 100644 board/rockchip/odroidn1/Makefile + create mode 100644 board/rockchip/odroidn1/odroidn1.c + create mode 100644 configs/odroidn1_defconfig + create mode 100644 include/configs/odroidn1.h + +diff --git a/arch/arm/dts/rk3399-odroidn1.dts b/arch/arm/dts/rk3399-odroidn1.dts +new file mode 100644 +index 0000000000..aa653d6fc6 +--- /dev/null ++++ b/arch/arm/dts/rk3399-odroidn1.dts +@@ -0,0 +1,601 @@ ++/* ++ * Copyright (c) 2017 Hardkernel Co., Ltd. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include "rk3399.dtsi" ++#include "rk3399-sdram-ddr3-1600.dtsi" ++ ++/ { ++ model = "Hardkernel ODROID-N1"; ++ compatible = "hardkernel,odroid-n1", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = &uart2; ++ u-boot,spl-boot-order = &sdmmc, &sdhci; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc5v0_host31: vcc5v0-host31-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host31_vbus_drv>; ++ regulator-name = "vcc5v0_host31"; ++ }; ++ ++ vcc5v0_host32: vcc5v0-host32-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host32_vbus_drv>; ++ regulator-name = "vcc5v0_host32"; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_drv>; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <430000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-init-microvolt = <950000>; ++ }; ++ ++ vccadc_ref: vccadc-ref { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gmac { ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ clock_in_out = "input"; ++ phy-supply = <&vcc_phy>; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x100>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <23 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ vcc10-supply = <&vcc3v3_sys>; ++ vcc11-supply = <&vcc3v3_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc1v8_pmu>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_tp: LDO_REG2 { ++ regulator-name = "vcc3v0_tp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc1v8_pmu: LDO_REG3 { ++ regulator-name = "vcc1v8_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-name = "vcc_sd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-name = "vcca3v0_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-name = "vcca1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <0>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++ status = "okay"; ++}; ++ ++&i2s0 { ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&i2s1 { ++ rockchip,playback-channels = <2>; ++ rockchip,capture-channels = <2>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; ++ audio-supply = <&vcca1v8_codec>; ++ sdmmc-supply = <&vcc_sd>; ++ gpio1830-supply = <&vcc_3v0>; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pcie { ++ pcie_drv: pcie-drv { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host31_vbus_drv: host31-vbus-drv { ++ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host32_vbus_drv: host32-vbus-drv { ++ rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vccadc_ref>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ u-boot,dm-pre-reloc; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ keep-power-in-suspend; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ phy-supply = <&vcc5v0_host31>; ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ phy-supply = <&vcc5v0_host32>; ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&dwc3_typec0 { ++ status = "okay"; ++}; ++ ++&dwc3_typec1 { ++ status = "okay"; ++}; +diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig +index c4a6d46649..c17c839a6a 100644 +--- a/arch/arm/mach-rockchip/rk3399/Kconfig ++++ b/arch/arm/mach-rockchip/rk3399/Kconfig +@@ -11,6 +11,12 @@ config TARGET_EVB_RK3399 + with full function and phisical connectors support like type-C ports, + usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial... + ++config TARGET_ODROIDN1 ++ bool "Hardkernel ODROID-N1 board" ++ select BOARD_LATE_INIT ++ help ++ ODROID-N1 support ++ + config TARGET_PUMA_RK3399 + bool "Theobroma Systems RK3399-Q7 (Puma)" + help +@@ -38,6 +44,7 @@ config SYS_MALLOC_F_LEN + default 0x0800 + + source "board/rockchip/evb_rk3399/Kconfig" ++source "board/rockchip/odroidn1/Kconfig" + source "board/theobroma-systems/puma_rk3399/Kconfig" + + endif +diff --git a/board/rockchip/odroidn1/Kconfig b/board/rockchip/odroidn1/Kconfig +new file mode 100644 +index 0000000000..54744010d6 +--- /dev/null ++++ b/board/rockchip/odroidn1/Kconfig +@@ -0,0 +1,15 @@ ++if TARGET_ODROIDN1 ++ ++config SYS_BOARD ++ default "odroidn1" ++ ++config SYS_VENDOR ++ default "rockchip" ++ ++config SYS_CONFIG_NAME ++ default "odroidn1" ++ ++config BOARD_SPECIFIC_OPTIONS # dummy ++ def_bool y ++ ++endif +diff --git a/board/rockchip/odroidn1/MAINTAINERS b/board/rockchip/odroidn1/MAINTAINERS +new file mode 100644 +index 0000000000..a7f83c3283 +--- /dev/null ++++ b/board/rockchip/odroidn1/MAINTAINERS +@@ -0,0 +1,6 @@ ++ODROIDN1 ++M: Mauro Ribeiro ++S: Maintained ++F: board/rockchip/odroidn1 ++F: include/configs/odroidn1.h ++F: configs/odroidn1_defconfig +diff --git a/board/rockchip/odroidn1/Makefile b/board/rockchip/odroidn1/Makefile +new file mode 100644 +index 0000000000..bad5e036ac +--- /dev/null ++++ b/board/rockchip/odroidn1/Makefile +@@ -0,0 +1,7 @@ ++# ++# (C) Copyright 2017 Hardkernel Co., Ltd ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += odroidn1.o +diff --git a/board/rockchip/odroidn1/odroidn1.c b/board/rockchip/odroidn1/odroidn1.c +new file mode 100644 +index 0000000000..713d076824 +--- /dev/null ++++ b/board/rockchip/odroidn1/odroidn1.c +@@ -0,0 +1,225 @@ ++/* ++ * (C) Copyright 2017 Hardkernel Co., Ltd ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define RK3399_CPUID_OFF 0x7 ++#define RK3399_CPUID_LEN 0x10 ++ ++int board_init(void) ++{ ++ struct udevice *pinctrl, *regulator; ++ int ret; ++ ++ /* ++ * The PWM do not have decicated interrupt number in dts and can ++ * not get periph_id by pinctrl framework, so let's init them here. ++ * The PWM2 and PWM3 are for pwm regulater. ++ */ ++ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); ++ if (ret) { ++ debug("%s: Cannot find pinctrl device\n", __func__); ++ goto out; ++ } ++ ++ /* Enable pwm0 for panel backlight */ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0); ++ if (ret) { ++ debug("%s PWM0 pinctrl init fail! (ret=%d)\n", __func__, ret); ++ goto out; ++ } ++ ++ /* Enable pwm2 to control regulator vdd-log */ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); ++ if (ret) { ++ debug("%s PWM2 pinctrl init fail!\n", __func__); ++ goto out; ++ } ++ ++ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3); ++ if (ret) { ++ debug("%s PWM3 pinctrl init fail!\n", __func__); ++ goto out; ++ } ++ ++ ret = regulators_enable_boot_on(false); ++ if (ret) ++ debug("%s: Cannot enable boot on regulator\n", __func__); ++ ++ ret = regulator_get_by_platname("vcc5v0_host", ®ulator); ++ if (ret) { ++ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); ++ goto out; ++ } ++ ++ ret = regulator_set_enable(regulator, true); ++ if (ret) { ++ debug("%s vcc5v0-host-en set fail!\n", __func__); ++ goto out; ++ } ++ ++ /* Enable regulator vdd_log to supply LOGIC_VDD on ODROID-N1 HW */ ++ ret = regulator_get_by_platname("vdd_log", ®ulator); ++ if (ret) { ++ printf("%s vdd_log init fail! ret %d\n", __func__, ret); ++ goto out; ++ } ++ ++ ret = regulator_set_enable(regulator, true); ++ if (ret) { ++ printf("%s vdd_log set fail!\n", __func__); ++ goto out; ++ } ++ ++out: ++ return 0; ++} ++ ++static void setup_macaddr(void) ++{ ++#if CONFIG_IS_ENABLED(CMD_NET) ++ int ret; ++ const char *cpuid = env_get("cpuid#"); ++ u8 hash[SHA256_SUM_LEN]; ++ int size = sizeof(hash); ++ u8 mac_addr[6]; ++ ++ /* Only generate a MAC address, if none is set in the environment */ ++ if (env_get("ethaddr")) ++ return; ++ ++ if (!cpuid) { ++ debug("%s: could not retrieve 'cpuid#'\n", __func__); ++ return; ++ } ++ ++ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); ++ if (ret) { ++ debug("%s: failed to calculate SHA256\n", __func__); ++ return; ++ } ++ ++ /* Copy 6 bytes of the hash to base the MAC address on */ ++ memcpy(mac_addr, hash, 6); ++ ++ /* Make this a valid MAC address and set it */ ++ mac_addr[0] &= 0xfe; /* clear multicast bit */ ++ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++#endif ++ ++ return; ++} ++ ++static void setup_serial(void) ++{ ++#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) ++ struct udevice *dev; ++ int ret, i; ++ u8 cpuid[RK3399_CPUID_LEN]; ++ u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2]; ++ char cpuid_str[RK3399_CPUID_LEN * 2 + 1]; ++ u64 serialno; ++ char serialno_str[16]; ++ ++ /* retrieve the device */ ++ ret = uclass_get_device_by_driver(UCLASS_MISC, ++ DM_GET_DRIVER(rockchip_efuse), &dev); ++ if (ret) { ++ debug("%s: could not find efuse device\n", __func__); ++ return; ++ } ++ ++ /* read the cpu_id range from the efuses */ ++ ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid)); ++ if (ret) { ++ debug("%s: reading cpuid from the efuses failed\n", ++ __func__); ++ return; ++ } ++ ++ memset(cpuid_str, 0, sizeof(cpuid_str)); ++ for (i = 0; i < 16; i++) ++ sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); ++ ++ debug("cpuid: %s\n", cpuid_str); ++ ++ /* ++ * Mix the cpuid bytes using the same rules as in ++ * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c ++ */ ++ for (i = 0; i < 8; i++) { ++ low[i] = cpuid[1 + (i << 1)]; ++ high[i] = cpuid[i << 1]; ++ } ++ ++ serialno = crc32_no_comp(0, low, 8); ++ serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; ++ snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); ++ ++ env_set("cpuid#", cpuid_str); ++ env_set("serial#", serialno_str); ++#endif ++ ++ return; ++} ++ ++int misc_init_r(void) ++{ ++ setup_serial(); ++ setup_macaddr(); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_SERIAL_TAG ++void get_board_serial(struct tag_serialnr *serialnr) ++{ ++ char *serial_string; ++ u64 serial = 0; ++ ++ serial_string = env_get("serial#"); ++ ++ if (serial_string) ++ serial = simple_strtoull(serial_string, NULL, 16); ++ ++ serialnr->high = (u32)(serial >> 32); ++ serialnr->low = (u32)(serial & 0xffffffff); ++} ++#endif ++ ++#ifdef CONFIG_USB_DWC3 ++static struct dwc3_device dwc3_device_data = { ++ .maximum_speed = USB_SPEED_HIGH, ++ .base = 0xfe800000, ++ .dr_mode = USB_DR_MODE_HOST, ++ .index = 0, ++ .dis_u2_susphy_quirk = 1, ++}; ++ ++int usb_gadget_handle_interrupts(void) ++{ ++ dwc3_uboot_handle_interrupt(0); ++ return 0; ++} ++ ++int board_usb_init(int index, enum usb_init_type init) ++{ ++ return dwc3_uboot_init(&dwc3_device_data); ++} ++#endif +diff --git a/configs/odroidn1_defconfig b/configs/odroidn1_defconfig +new file mode 100644 +index 0000000000..ee3a345181 +--- /dev/null ++++ b/configs/odroidn1_defconfig +@@ -0,0 +1,97 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_TARGET_ODROIDN1=y ++CONFIG_SPL_STACK_R_ADDR=0x80000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-odroidn1" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 ++CONFIG_SPL_ATF_SUPPORT=y ++CONFIG_FASTBOOT_BUF_ADDR=0x00800800 ++CONFIG_FASTBOOT_BUF_SIZE=0x08000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++# CONFIG_CMD_IMLS is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_LOAD_ANDROID=y ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_PINCTRL_ROCKCHIP_RK3399=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_G_DNL_MANUFACTURER="Rockchip" ++CONFIG_G_DNL_VENDOR_NUM=0x2207 ++CONFIG_G_DNL_PRODUCT_NUM=0x330a ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_USB_ETHER_MCS7830=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200 ++CONFIG_DISPLAY_ROCKCHIP_HDMI=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_ERRNO_STR=y +diff --git a/include/configs/odroidn1.h b/include/configs/odroidn1.h +new file mode 100644 +index 0000000000..d45b673349 +--- /dev/null ++++ b/include/configs/odroidn1.h +@@ -0,0 +1,28 @@ ++/* ++ * (C) Copyright 2016 Rockchip Electronics Co., Ltd ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __ODROIDN1_H ++#define __ODROIDN1_H ++ ++#include ++ ++#define CONFIG_MMC_SDHCI_SDMA ++#define CONFIG_SYS_MMC_ENV_DEV 0 ++ ++#define SDRAM_BANK_SIZE (2UL << 30) ++#define CONFIG_MISC_INIT_R ++#define CONFIG_SERIAL_TAG ++#define CONFIG_ENV_OVERWRITE ++ ++#define CONFIG_BMP_16BPP ++#define CONFIG_BMP_24BPP ++#define CONFIG_BMP_32BPP ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#endif diff --git a/projects/Rockchip/README.md b/projects/Rockchip/README.md new file mode 100644 index 0000000000..21c2034b42 --- /dev/null +++ b/projects/Rockchip/README.md @@ -0,0 +1,40 @@ +# Rockchip + +This project is for Rockchip SoC devices + +## Devices + +**RK3288** +* [ASUS Tinker Board](devices/TinkerBoard) +* [mqmaker MiQi](devices/MiQi) + +**RK3328** +* [PINE64 ROCK64](devices/RK3328) +* [Popcorn Hour RockBox](devices/RK3328) +* [Popcorn Hour Transformer](devices/RK3328) +* [Firefly ROC-RK3328-CC](devices/RK3328) + +**RK3399** +* [96rocks ROCK960](devices/RK3399) +* [Hardkernel ODROID-N1](devices/RK3399) +* [PINE64 RockPro64](devices/RK3399) +* [Rockchip Sapphire Board](devices/RK3399) + +**My single-board computer is not listed, will it be added in the future?**
+If your single-board computer uses a current generation SoC listed on http://opensource.rock-chips.com/wiki_Main_Page the odds are in your favor. + +**My Android device is not listed, will it be added in the future?**
+You may have luck if your device vendor is open source friendly, otherwise keep using Android for best support. + +## Links + +* https://github.com/rockchip-linux +* http://opensource.rock-chips.com + +## Useful debug commands + +* `cat /sys/kernel/debug/dri/0/summary` +* `cat /sys/kernel/debug/dw-hdmi/status` +* `cat /sys/kernel/debug/clk/clk_summary` +* `hexdump -C /sys/class/drm/card0-HDMI-A-1/edid` +* `edid-decode /sys/class/drm/card0-HDMI-A-1/edid` diff --git a/projects/Rockchip/bootloader/canupdate.sh b/projects/Rockchip/bootloader/canupdate.sh new file mode 100644 index 0000000000..dc1f71f97b --- /dev/null +++ b/projects/Rockchip/bootloader/canupdate.sh @@ -0,0 +1,24 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +# Allow upgrades between arm and aarch64 +if [ "$1" = "@PROJECT@.arm" -o "$1" = "@PROJECT@.aarch64" ]; then + exit 0 +else + exit 1 +fi diff --git a/projects/Rockchip/bootloader/install b/projects/Rockchip/bootloader/install new file mode 100644 index 0000000000..a423c3d4a7 --- /dev/null +++ b/projects/Rockchip/bootloader/install @@ -0,0 +1,73 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +PKG_RKBIN="$(get_build_dir rkbin)" +PKG_SOC=$UBOOT_SYSTEM + +if [ "$DEVICE" = "RK3328" -o "$DEVICE" = "RK3399" ]; then + PKG_SOC="${DEVICE/RK/rk}" +fi + +case "$PKG_SOC" in + rk3036) + PKG_DATAFILE="spl/u-boot-spl-nodtb.bin" + PKG_LOADER="u-boot-dtb.bin" + ;; + rk3328) + PKG_DATAFILE="$PKG_RKBIN/rk33/rk3328_ddr_786MHz_v1.12.bin" + PKG_LOADER="$PKG_RKBIN/rk33/rk3328_miniloader_v2.44.bin" + PKG_BL31="$PKG_RKBIN/rk33/rk3328_bl31_v1.39.bin" + ;; + rk3399) + PKG_DATAFILE="$PKG_RKBIN/rk33/rk3399_ddr_800MHz_v1.09.bin" + PKG_LOADER="$PKG_RKBIN/rk33/rk3399_miniloader_v1.09.bin" + PKG_BL31="$PKG_RKBIN/rk33/rk3399_bl31_v1.00.elf" + ;; + *) + PKG_DATAFILE="spl/u-boot-spl-dtb.bin" + PKG_LOADER="u-boot-dtb.bin" + ;; +esac + +if [ -n "$PKG_DATAFILE" -a -n "$PKG_LOADER" ]; then + tools/mkimage -n $PKG_SOC -T rksd -d "$PKG_DATAFILE" idbloader.img + cat "$PKG_LOADER" >> idbloader.img + cp -av idbloader.img $INSTALL/usr/share/bootloader +fi + +if [ -n "$PKG_BL31" ]; then + $PKG_RKBIN/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img 0x200000 + cp -av uboot.img $INSTALL/usr/share/bootloader + + cat >trust.ini <. +################################################################################ + +if [ -f "$RELEASE_DIR/3rdparty/bootloader/idbloader.img" ]; then + echo "image: burn idbloader.img to image..." + dd if="$RELEASE_DIR/3rdparty/bootloader/idbloader.img" of="$DISK" bs=32k seek=1 conv=fsync,notrunc >"$SAVE_ERROR" 2>&1 || show_error +fi +if [ -f "$RELEASE_DIR/3rdparty/bootloader/uboot.img" ]; then + echo "image: burn uboot.img to image..." + dd if="$RELEASE_DIR/3rdparty/bootloader/uboot.img" of="$DISK" bs=64k seek=128 conv=fsync,notrunc >"$SAVE_ERROR" 2>&1 || show_error +fi +if [ -f "$RELEASE_DIR/3rdparty/bootloader/trust.img" ]; then + echo "image: burn trust.img to image..." + dd if="$RELEASE_DIR/3rdparty/bootloader/trust.img" of="$DISK" bs=64k seek=192 conv=fsync,notrunc >"$SAVE_ERROR" 2>&1 || show_error +fi diff --git a/projects/Rockchip/bootloader/release b/projects/Rockchip/bootloader/release new file mode 100644 index 0000000000..2efcf2f75c --- /dev/null +++ b/projects/Rockchip/bootloader/release @@ -0,0 +1,38 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +mkdir -p $RELEASE_DIR/3rdparty/bootloader + if [ -n "$UBOOT_SYSTEM" ]; then + BOOTLOADER_DIR=$(get_build_dir $BOOTLOADER) + if [ -f $BOOTLOADER_DIR/idbloader.img ]; then + cp -a $BOOTLOADER_DIR/idbloader.img $RELEASE_DIR/3rdparty/bootloader + fi + if [ -f $BOOTLOADER_DIR/uboot.img ]; then + cp -a $BOOTLOADER_DIR/uboot.img $RELEASE_DIR/3rdparty/bootloader + fi + if [ -f $BOOTLOADER_DIR/trust.img ]; then + cp -a $BOOTLOADER_DIR/trust.img $RELEASE_DIR/3rdparty/bootloader + fi + fi + + LINUX_DTS_DIR=$(get_build_dir linux)/arch/$TARGET_KERNEL_ARCH/boot/dts + for dtb in $LINUX_DTS_DIR/*.dtb $LINUX_DTS_DIR/*/*.dtb; do + if [ -f $dtb ]; then + cp -a $dtb $RELEASE_DIR/3rdparty/bootloader + fi + done diff --git a/projects/Rockchip/bootloader/update.sh b/projects/Rockchip/bootloader/update.sh new file mode 100644 index 0000000000..aca46993a5 --- /dev/null +++ b/projects/Rockchip/bootloader/update.sh @@ -0,0 +1,65 @@ +################################################################################ +# This file is part of LibreELEC - https://libreelec.tv +# Copyright (C) 2017-present Team LibreELEC +# +# LibreELEC is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# LibreELEC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with LibreELEC. If not, see . +################################################################################ + +[ -z "$SYSTEM_ROOT" ] && SYSTEM_ROOT="" +[ -z "$BOOT_ROOT" ] && BOOT_ROOT="/flash" +[ -z "$BOOT_PART" ] && BOOT_PART=$(df "$BOOT_ROOT" | tail -1 | awk {' print $1 '}) +if [ -z "$BOOT_DISK" ]; then + case $BOOT_PART in + /dev/sd[a-z][0-9]*) + BOOT_DISK=$(echo $BOOT_PART | sed -e "s,[0-9]*,,g") + ;; + /dev/mmcblk*) + BOOT_DISK=$(echo $BOOT_PART | sed -e "s,p[0-9]*,,g") + ;; + esac +fi + +# mount $BOOT_ROOT r/w + mount -o remount,rw $BOOT_ROOT + +# update device tree + for all_dtb in $BOOT_ROOT/*.dtb; do + dtb=$(basename $all_dtb) + if [ -f $SYSTEM_ROOT/usr/share/bootloader/$dtb ]; then + echo -n "Updating $dtb... " + cp -p $SYSTEM_ROOT/usr/share/bootloader/$dtb $BOOT_ROOT + echo "done" + fi + done + +# update bootloader + if [ -f $SYSTEM_ROOT/usr/share/bootloader/idbloader.img ]; then + echo -n "Updating idbloader.img... " + dd if=$SYSTEM_ROOT/usr/share/bootloader/idbloader.img of=$BOOT_DISK bs=32k seek=1 conv=fsync &>/dev/null + echo "done" + fi + if [ -f $SYSTEM_ROOT/usr/share/bootloader/uboot.img ]; then + echo -n "Updating uboot.img... " + dd if=$SYSTEM_ROOT/usr/share/bootloader/uboot.img of=$BOOT_DISK bs=64k seek=128 conv=fsync &>/dev/null + echo "done" + fi + if [ -f $SYSTEM_ROOT/usr/share/bootloader/trust.img ]; then + echo -n "Updating trust.img... " + dd if=$SYSTEM_ROOT/usr/share/bootloader/trust.img of=$BOOT_DISK bs=64k seek=192 conv=fsync &>/dev/null + echo "done" + fi + +# mount $BOOT_ROOT r/o + sync + mount -o remount,ro $BOOT_ROOT diff --git a/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf b/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf new file mode 100644 index 0000000000..ef452a4adb --- /dev/null +++ b/projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf @@ -0,0 +1,4518 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 4.4.114 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_ARM_DMA_USE_IOMMU=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_SCHED_WALT is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_RCU_STALL_COMMON=y +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_EXPEDITE_BOOT is not set +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +# CONFIG_MEMCG_SWAP is not set +# CONFIG_MEMCG_KMEM is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SCHED_TUNE is not set +# CONFIG_DEFAULT_USE_ENERGY_AWARE is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_MEMBARRIER=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +# CONFIG_OPROFILE is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=8 +CONFIG_ARCH_MMAP_RND_BITS_MAX=16 +CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +# CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_RK_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_CFQ_GROUP_IOSCHED=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP1 is not set + +# +# Multiple platform selection +# + +# +# CPU Core family selection +# +# CONFIG_ARCH_MULTI_V6 is not set +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MULTI_V6_V7=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +# CONFIG_ARCH_VIRT is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCM is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_DIGICOLOR is not set +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEYSTONE is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_MEDIATEK is not set + +# +# TI OMAP/AM/DM/DRA Family +# +# CONFIG_ARCH_OMAP3 is not set +# CONFIG_ARCH_OMAP4 is not set +# CONFIG_SOC_OMAP5 is not set +# CONFIG_SOC_AM33XX is not set +# CONFIG_SOC_AM43XX is not set +# CONFIG_SOC_DRA7XX is not set +# CONFIG_ARCH_QCOM is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_STI is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SHMOBILE_MULTI is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_SIRF is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_WM8850 is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQ is not set + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_LPAE is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_SWP_EMULATE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_KUSER_HELPERS=y +CONFIG_VDSO=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_CACHE_L2X0=y +# CONFIG_PL310_ERRATA_588369 is not set +# CONFIG_PL310_ERRATA_727915 is not set +# CONFIG_PL310_ERRATA_753970 is not set +# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_KERNMEM_PERMS=y +CONFIG_DEBUG_RODATA=y +CONFIG_MULTI_IRQ_HANDLER=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_643719 is not set +# CONFIG_ARM_ERRATA_720789 is not set +# CONFIG_ARM_ERRATA_754322 is not set +# CONFIG_ARM_ERRATA_754327 is not set +# CONFIG_ARM_ERRATA_764369 is not set +# CONFIG_ARM_ERRATA_775420 is not set +# CONFIG_ARM_ERRATA_798181 is not set +# CONFIG_ARM_ERRATA_773022 is not set + +# +# Bus support +# +# CONFIG_PCI is not set +# CONFIG_PCI_DOMAINS_GENERIC is not set +# CONFIG_PCI_SYSCALL is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_HAVE_SMP=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_ARM_CPU_TOPOLOGY=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_HAVE_ARM_TWD=y +# CONFIG_MCPM is not set +# CONFIG_BIG_LITTLE is not set +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_3G_OPT is not set +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM_PSCI is not set +CONFIG_ARCH_NR_GPIO=288 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_HZ_FIXED=0 +# CONFIG_HZ_100 is not set +# CONFIG_HZ_200 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y +# CONFIG_HZ_500 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=300 +CONFIG_SCHED_HRTICK=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_CPU_SW_DOMAIN_PAN=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +# CONFIG_ARM_MODULE_PLTS is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_PGTABLE_MAPPING is not set +# CONFIG_ZSMALLOC_STAT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +CONFIG_SECCOMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +# CONFIG_XEN is not set +# CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART is not set + +# +# Boot options +# +CONFIG_USE_OF=y +CONFIG_ATAGS=y +# CONFIG_DEPRECATED_PARAM_STRUCT is not set +# CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init BOOT_IMAGE=/zImage usbcore.autosuspend=-1" +# CONFIG_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_CMDLINE_EXTEND=y +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +CONFIG_AUTO_ZRELADDR=y + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +# CONFIG_QORIQ_CPUFREQ is not set + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_CPUIDLE is not set +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y +# CONFIG_KERNEL_MODE_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HAS_WAKELOCK=y +CONFIG_WAKELOCK=y +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_APM_EMULATION is not set +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +CONFIG_IP_MROUTE=y +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_ANDROID_PARANOID_NETWORK is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_INGRESS is not set +CONFIG_NETFILTER_NETLINK=m +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_FTP=m +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_REDIRECT is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_NETFILTER_XT_MATCH_OWNER=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV6 is not set +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +# CONFIG_NF_REJECT_IPV6 is not set +CONFIG_NF_LOG_IPV6=m +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +# CONFIG_BT_RFCOMM_TTY is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_SELFTEST is not set +CONFIG_BT_DEBUGFS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +# CONFIG_BT_RTKBTUSB is not set +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_INTERNAL_REGDB=y +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_MINSTREL_VHT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_PM=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_REGULATOR is not set +CONFIG_RFKILL_GPIO=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_LWTUNNEL is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +# CONFIG_TEGRA_AHB is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_FENCE_TRACE is not set + +# +# Bus devices +# +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI500_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_LZ4_COMPRESS is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_BLK_DEV_RBD is not set + +# +# Misc devices +# +# CONFIG_ROCKCHIP_SCR is not set +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_MEMORY_STATE_TIME is not set +# CONFIG_USB_CAM_GPIO is not set +# CONFIG_GPIO_DET is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_KERNEL_API is not set +# CONFIG_CXL_EEH is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=y +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=y +CONFIG_ISCSI_BOOT_SYSFS=y +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_MQ_DEFAULT is not set +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=m +# CONFIG_DM_CACHE is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_VERITY_HASH_PREFETCH_MIN_SIZE_128 is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_TARGET_CORE is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_EQUALIZER is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +# CONFIG_MACVTAP is not set +# CONFIG_IPVLAN is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +# CONFIG_NLMON is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +CONFIG_ETHERNET=y +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_NET_VENDOR_CIRRUS=y +# CONFIG_CS89x0 is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_FARADAY=y +# CONFIG_FTMAC100 is not set +# CONFIG_FTGMAC100 is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_IPQ806X is not set +# CONFIG_DWMAC_LPC18XX is not set +# CONFIG_DWMAC_MESON is not set +CONFIG_DWMAC_ROCKCHIP=y +# CONFIG_DWMAC_SOCFPGA is not set +# CONFIG_DWMAC_STI is not set +# CONFIG_DWMAC_SUNXI is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +CONFIG_LIBERTAS_THINFIRM=y +# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set +# CONFIG_LIBERTAS_THINFIRM_USB is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=y +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_ATH_CARDS is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +# CONFIG_BRCMFMAC_SDIO is not set +CONFIG_BRCMFMAC_USB=y +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +# CONFIG_HOSTAP is not set +# CONFIG_LIBERTAS is not set +# CONFIG_P54_COMMON is not set +CONFIG_RT2X00=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +# CONFIG_RT2X00_DEBUG is not set +# CONFIG_WL_MEDIATEK is not set +# CONFIG_RTL_CARDS is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set +CONFIG_AP6XXX=m +CONFIG_RTL_WIRELESS_SOLUTION=y +# CONFIG_RTL8188EU is not set +# CONFIG_RTL8188FU is not set +# CONFIG_RTL8189ES is not set +# CONFIG_RTL8189FS is not set +CONFIG_RTL8723BS=m +# CONFIG_RTL8723BU is not set +# CONFIG_RTL8723CS is not set +# CONFIG_RTL8723DS is not set +# CONFIG_WL_TI is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +# CONFIG_MWIFIEX is not set +# CONFIG_CW1200 is not set +# CONFIG_RSI_91X is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_KEYRESET is not set +# CONFIG_INPUT_KEYCOMBO is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_ROCKCHIP is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +CONFIG_JOYSTICK_IFORCE=y +CONFIG_JOYSTICK_IFORCE_USB=y +# CONFIG_JOYSTICK_IFORCE_232 is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_HANWANG is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_SERIAL_WACOM4 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8C40XX is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_FT6236 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set +# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set +# CONFIG_TOUCHSCREEN_GSLX680_VR is not set +# CONFIG_TOUCHSCREEN_GSLX680_FIREFLY is not set +# CONFIG_TOUCHSCREEN_GSL3673 is not set +# CONFIG_TOUCHSCREEN_GSL3673_800X1280 is not set +# CONFIG_TOUCHSCREEN_GT9XX is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +CONFIG_TOUCHSCREEN_ELAN=y +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_VTL_CT36X is not set +# CONFIG_TOUCHSCREEN_GT1X is not set +# CONFIG_ROCKCHIP_REMOTECTL is not set + +# +# handle all sensors +# +# CONFIG_SENSOR_DEVICE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_MPU3050 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYCHORD is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_RK8XX_PWRKEY is not set +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_GPIO=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_EM is not set +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_INGENIC is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_BCM63XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_ST_ASC is not set +# CONFIG_SERIAL_STM32 is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_TPM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_TIS_ST33ZP24 is not set +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX_PCI is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_OF_GPIO=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EM is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_ZEVIO is not set +# CONFIG_GPIO_ZX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_RK8XX is not set +# CONFIG_GPIO_TPS6586X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# SPI or I2C GPIO expanders +# +# CONFIG_GPIO_MCP23S08 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ25700 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_EC is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set +# CONFIG_BATTERY_RK818 is not set +# CONFIG_CHARGER_RK818 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_VERSATILE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_AVS=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_HTU21 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_IMX_THERMAL is not set +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_RK_VIRTUAL_THERMAL=y +# CONFIG_RK3368_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_CORE is not set +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_BCM7038_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_AXP20X is not set +CONFIG_MFD_CROS_EC=y +# CONFIG_MFD_CROS_EC_I2C is not set +CONFIG_MFD_CROS_EC_SPI=y +# CONFIG_MFD_ASIC3 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_INTEL_SOC_PMIC is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_PM8921_CORE is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK618 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_RK1000 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_FUSB_30X is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8752 is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MP8865 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RK818 is not set +# CONFIG_REGULATOR_SYR82X is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +# CONFIG_REGULATOR_XZ3216 is not set +CONFIG_CEC_CORE=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +# CONFIG_MEDIA_CAMERA_SUPPORT is not set +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_MEDIA_CEC_RC=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_RC_CORE=y +CONFIG_RC_MAP=y +CONFIG_RC_DECODERS=y +CONFIG_LIRC=y +CONFIG_IR_LIRC_CODEC=y +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +CONFIG_IR_SANYO_DECODER=y +CONFIG_IR_SHARP_DECODER=y +CONFIG_IR_MCE_KBD_DECODER=y +CONFIG_IR_XMP_DECODER=y +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y + +# +# USB HDMI CEC adapters +# +CONFIG_USB_PULSE8_CEC=y +CONFIG_USB_RAINSHADOW_CEC=y + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# CONFIG_CAMSYS_DRV is not set +# CONFIG_ROCK_CHIP_SOC_CAMERA is not set + +# +# Graphics support +# +# CONFIG_IMX_IPUV3_CORE is not set +CONFIG_DRM=y +CONFIG_DRM_IGNORE_IOTCL_PERMIT=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_SCDC_HELPER is not set +CONFIG_DRM_DMA_SYNC=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_EXYNOS is not set +CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_CDN_DP is not set +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_ANALOGIX_DP=y +CONFIG_ROCKCHIP_INNO_HDMI=y +CONFIG_ROCKCHIP_LVDS=y +# CONFIG_ROCKCHIP_DRM_TVE is not set +# CONFIG_ROCKCHIP_RGB is not set +# CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_ARMADA is not set +# CONFIG_DRM_TILCDC is not set +# CONFIG_DRM_FSL_DCU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +CONFIG_DRM_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_RK1000 is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +CONFIG_DRM_ANALOGIX_DP=y +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +# CONFIG_DRM_DW_HDMI_CEC is not set +# CONFIG_DRM_STI is not set +# CONFIG_POWERVR_ROGUE_M is not set +# CONFIG_MALI400 is not set +CONFIG_MALI_DEVFREQ=y +CONFIG_MALI_MIDGARD_FOR_ANDROID=y +# CONFIG_MALI_MIDGARD_FOR_LINUX is not set +CONFIG_MALI_MIDGARD=m +# CONFIG_MALI_GATOR_SUPPORT is not set +# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set +# CONFIG_MALI_DMA_FENCE is not set +CONFIG_MALI_EXPERT=y +# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set +# CONFIG_MALI_PLATFORM_FAKE is not set +# CONFIG_MALI_PLATFORM_DEVICETREE is not set +CONFIG_MALI_PLATFORM_THIRDPARTY=y +CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" +# CONFIG_MALI_DEBUG is not set +# CONFIG_MALI_NO_MALI is not set +# CONFIG_MALI_TRACE_TIMELINE is not set +# CONFIG_MALI_SYSTEM_TRACE is not set +# CONFIG_MALI_GPU_MMU_AARCH64 is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set + +# +# Rockchip Misc Video driver +# +# CONFIG_FB_ROCKCHIP is not set +# CONFIG_LCDC_RK3188 is not set +# CONFIG_LCDC_RK3288 is not set +# CONFIG_LCDC_RK3036 is not set +# CONFIG_LCDC_RK312X is not set +CONFIG_LCD_GENERAL=y +# CONFIG_LCD_MIPI is not set +# CONFIG_RK_TRSM is not set +# CONFIG_RK_HDMI is not set + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set + +# +# RGA2 +# +# CONFIG_ROCKCHIP_RGA2 is not set + +# +# VCODEC +# +CONFIG_RK_VCODEC=y + +# +# IEP +# +# CONFIG_IEP is not set +# CONFIG_IEP_MMU is not set + +# +# DP +# + +# +# ROCKCHIP_MPP +# +# CONFIG_ROCKCHIP_MPP_SERVICE is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y +CONFIG_HDMI_NOTIFIERS=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_SEQUENCER_OSS is not set +CONFIG_SND_HRTIMER=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_PROC_FS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# HD-Audio +# +CONFIG_SND_HDA_PREALLOC_SIZE=2048 +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +CONFIG_SND_SOC_ROCKCHIP=y +CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_PDM is not set +CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set +CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +CONFIG_SND_SOC_ROCKCHIP_RT5645=y +# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set +# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set + +# +# Allwinner SoC Audio support +# +# CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_ES8316 is not set +CONFIG_SND_SOC_ES8323=y +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES8328 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8396 is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_GVA_CODEC is not set +# CONFIG_SND_SOC_FM1288 is not set +CONFIG_SND_SOC_MAX98090=y +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1792A is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RK817 is not set +CONFIG_SND_SOC_RL6231=y +CONFIG_SND_SOC_RT5616=y +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5640=y +CONFIG_SND_SOC_RT5645=y +# CONFIG_SND_SOC_RT5651 is not set +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=y +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TC358749X is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +CONFIG_SND_SOC_TS3A227E=y +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_RKVR is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +CONFIG_I2C_HID=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_ULPI_BUS is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_USB_PHY is not set +# CONFIG_USB_OTG_WAKELOCK is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_AM335X_PHY_USB is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FUSB300 is not set +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +# CONFIG_USB_CONFIGFS_ACM is not set +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_MTP is not set +# CONFIG_USB_CONFIGFS_F_ACC is not set +CONFIG_USB_CONFIGFS_UEVENT=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set + +# +# ROCKCHIP USB Support +# +# CONFIG_USB20_HOST is not set +# CONFIG_USB20_OTG is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_EMBEDDED_SDIO is not set +# CONFIG_MMC_PARANOID_SD_INIT is not set +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y +# CONFIG_MMC_SIMULATE_MAX_SPEED is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_K3 is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_MULTI_CTRL is not set +# CONFIG_SWITCH is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +CONFIG_RTC_DRV_HYM8563=y +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RK808=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12057 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RV8803 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_MCP795 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_SNVS is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_AMBA_PL08X is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_NBPFAXI_DMA is not set +CONFIG_PL330_DMA=y +# CONFIG_DW_DMAC is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8723AU is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16204 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16220 is not set +# CONFIG_ADIS16240 is not set +# CONFIG_LIS3L02DQ is not set +# CONFIG_SCA3000 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# CONFIG_INV_MPU_IIO is not set + +# +# Light sensors +# +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +CONFIG_TSL2583=y +# CONFIG_TSL2x7x is not set + +# +# Magnetometer sensors +# +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set +# CONFIG_IIO_SIMPLE_DUMMY is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_ANDROID_TIMED_OUTPUT is not set +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set +# CONFIG_SYNC is not set +# CONFIG_ION is not set +# CONFIG_FIQ_DEBUGGER is not set +# CONFIG_FIQ_WATCHDOG is not set +# CONFIG_RK_CONSOLE_THREAD is not set +# CONFIG_STAGING_BOARD is not set +# CONFIG_WIMAX_GDM72XX is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_LUSTRE_FS is not set +# CONFIG_DGAP is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_WILC1000_DRIVER is not set +# CONFIG_MOST is not set +# CONFIG_POWERVR_ROGUE_N is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CROS_EC_CHARDEV is not set +CONFIG_CROS_EC_PROTO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_CDCE706 is not set + +# +# Hardware Spinlock drivers +# + +# +# Clock Source drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_PROBE=y +CONFIG_DW_APB_TIMER=y +CONFIG_DW_APB_TIMER_OF=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y +CONFIG_ARM_GLOBAL_TIMER=y +# CONFIG_ARM_TIMER_SP804 is not set +CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_RK_IOMMU is not set +# CONFIG_ARM_SMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# + +# +# SOC (System On Chip) specific Drivers +# +# CONFIG_SOC_BRCMSTB is not set +CONFIG_ANDROID_VERSION=0x07010000 +CONFIG_ROCKCHIP_CPUINFO=y +# CONFIG_ROCKCHIP_DEVICEINFO is not set +# CONFIG_ROCKCHIP_PM_TEST is not set +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +# CONFIG_ROCKCHIP_PVTM is not set +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y + +# +# DEVFREQ Drivers +# +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +# CONFIG_EXTCON is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 + +# +# Accelerometers +# +# CONFIG_BMA180 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_HI8435 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_VF610_ADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_VZ89X is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Humidity sensors +# +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_IIO is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y + +# +# Digital potentiometers +# +# CONFIG_MCP4531 is not set + +# +# Pressure sensors +# +# CONFIG_BMP280 is not set +# CONFIG_MPL115 is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SX9500 is not set + +# +# Temperature sensors +# +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_CROS_EC is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +CONFIG_PHY_ROCKCHIP_USB=y +# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set +# CONFIG_PHY_ROCKCHIP_INNO_USB3 is not set +# CONFIG_PHY_ROCKCHIP_EMMC is not set +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set +# CONFIG_PHY_ROCKCHIP_TYPEC is not set +# CONFIG_PHY_ROCKCHIP_PCIE is not set +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +CONFIG_RAS=y + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +CONFIG_NVMEM=y +CONFIG_ROCKCHIP_EFUSE=y +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set + +# +# FPGA Configuration Support +# +# CONFIG_FPGA is not set +# CONFIG_TEE is not set +# CONFIG_RK_NAND is not set + +# +# Headset device support +# +# CONFIG_RK_HEADSET is not set + +# +# Firmware Drivers +# +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_ROCKCHIP_SIP is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_NILFS2_FS is not set +CONFIG_F2FS_FS=y +CONFIG_F2FS_STAT_FS=y +# CONFIG_F2FS_FS_XATTR is not set +CONFIG_F2FS_CHECK_FS=y +# CONFIG_F2FS_IO_TRACE is not set +# CONFIG_F2FS_FAULT_INJECTION is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set +CONFIG_OVERLAY_FS=m + +# +# Caches +# +CONFIG_FSCACHE=y +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +# CONFIG_CACHEFILES is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_SDCARD_FS is not set +CONFIG_HFS_FS=y +CONFIG_HFSPLUS_FS=y +# CONFIG_HFSPLUS_FS_POSIX_ACL is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_DECOMP_SINGLE is not set +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=y +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG is not set +# CONFIG_CIFS_DFS_UPCALL is not set +CONFIG_CIFS_SMB2=y +CONFIG_CIFS_SMB311=y +CONFIG_CIFS_FSCACHE=y +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +CONFIG_HARDLOCKUP_DETECTOR_OTHER_CPU=y +CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_PANIC_ON_RT_THROTTLING is not set +CONFIG_SCHEDSTATS=y +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +CONFIG_TIMER_STATS=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_GPU_TRACEPOINTS=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_PREEMPTIRQ_EVENTS is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_UPROBE_EVENT is not set +# CONFIG_PROBE_EVENTS is not set +CONFIG_DYNAMIC_FTRACE=y +# CONFIG_FUNCTION_PROFILER is not set +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_TRACE_ENUM_MAP_FILE is not set +CONFIG_TRACING_EVENTS_GPIO=y + +# +# Runtime Testing +# +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_MEMTEST is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARM_PTDUMP is not set +CONFIG_STRICT_DEVMEM=y +CONFIG_ARM_UNWIND=y +CONFIG_OLD_MCOUNT=y +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_LL is not set +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +# CONFIG_DEBUG_UART_8250 is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +# CONFIG_PID_IN_CONTEXTIDR is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY_PERF_EVENTS_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_TEE_SUPPORT is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +# CONFIG_CRYPTO_RSA is not set +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=y +# CONFIG_CRYPTO_ECHAINIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_HEH is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_PUBLIC_KEY_ALGO_RSA=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_TRUSTED_KEYRING is not set +# CONFIG_ARM_CRYPTO is not set +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_ARCH_HAS_SG_CHAIN=y +# CONFIG_VIRTUALIZATION is not set diff --git a/projects/Rockchip/devices/MiQi/options b/projects/Rockchip/devices/MiQi/options new file mode 100644 index 0000000000..f4034c41fa --- /dev/null +++ b/projects/Rockchip/devices/MiQi/options @@ -0,0 +1,33 @@ +################################################################################ +# setup device defaults +################################################################################ + + # The TARGET_CPU variable controls which processor should be targeted for + # generated code. + case $TARGET_ARCH in + arm) + TARGET_FLOAT="hard" + TARGET_CPU="cortex-a17" + TARGET_FPU="neon-vfpv4" + TARGET_FEATURES="32bit neon" + ;; + esac + + # Configuration for u-boot + UBOOT_SYSTEM="rk3288" + + # Kernel target + KERNEL_TARGET="zImage" + + # Additional kernel make parameters (for example to specify the u-boot loadaddress) + KERNEL_MAKE_EXTRACMD="rk3288-miqi.dtb" + + # Mali GPU family + MALI_FAMILY="t760" + MALI_REVISION="r1p0" + + # kernel image name + KERNEL_NAME="zImage" + + # kernel serial console + EXTRA_CMDLINE="console=uart8250,mmio32,0xff690000 console=tty0" diff --git a/projects/Rockchip/devices/RK3328/README.md b/projects/Rockchip/devices/RK3328/README.md new file mode 100644 index 0000000000..685eca9b81 --- /dev/null +++ b/projects/Rockchip/devices/RK3328/README.md @@ -0,0 +1,18 @@ +# RK3328 + +This is a SoC device for RK3328 + +**Build** + +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box-trn9 make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=box-z28 make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=roc-cc make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=rock64 make image` +* `PROJECT=Rockchip DEVICE=RK3328 ARCH=arm UBOOT_SYSTEM=rockbox make image` + +**How to use on an Android device** +- Flash image to a sd-card +- Insert sd-card into the device +- Plug in power and LibreELEC should boot instead of Android +- Remove sd-card from device to boot into Android diff --git a/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf b/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf new file mode 100644 index 0000000000..674c8cf8e0 --- /dev/null +++ b/projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf @@ -0,0 +1,4777 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.4.114 Kernel Configuration +# +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_MMU=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_HAVE_GENERIC_RCU_GUP=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_SMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_SCHED_WALT is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_RCU_STALL_COMMON=y +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_EXPEDITE_BOOT is not set +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +# CONFIG_MEMCG_SWAP is not set +# CONFIG_MEMCG_KMEM is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SCHED_TUNE is not set +# CONFIG_DEFAULT_USE_ENERGY_AWARE is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_PCI_QUIRKS=y +CONFIG_MEMBARRIER=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +# CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_RK_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +CONFIG_BLOCK_COMPAT=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_CFQ_GROUP_IOSCHED=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Platform selection +# +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_EXYNOS7 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_QCOM is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZYNQMP is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set + +# +# PCI host controller drivers +# +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_IPROC is not set +# CONFIG_PCI_HISI is not set +CONFIG_PCIE_ROCKCHIP=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +# CONFIG_PCIEASPM_DEFAULT is not set +CONFIG_PCIEASPM_POWERSAVE=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_HOTPLUG_PCI is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=300 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_PGTABLE_MAPPING is not set +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_SECCOMP=y +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_LSE_ATOMICS is not set +CONFIG_ARM64_UAO=y +CONFIG_ARM64_MODULE_CMODEL_LARGE=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init BOOT_IMAGE=/Image usbcore.autosuspend=-1" +# CONFIG_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_CMDLINE_EXTEND=y +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_EFI is not set +# CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_KEYS_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HAS_WAKELOCK=y +CONFIG_WAKELOCK=y +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +CONFIG_IP_MROUTE=y +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_ANDROID_PARANOID_NETWORK is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_INGRESS is not set +CONFIG_NETFILTER_NETLINK=m +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_FTP=m +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_REDIRECT is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_NETFILTER_XT_MATCH_OWNER=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV6 is not set +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +# CONFIG_NF_REJECT_IPV6 is not set +CONFIG_NF_LOG_IPV6=m +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +# CONFIG_BT_RFCOMM_TTY is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_SELFTEST is not set +CONFIG_BT_DEBUGFS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +# CONFIG_BT_RTKBTUSB is not set +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_INTERNAL_REGDB=y +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_MINSTREL_VHT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_PM=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_REGULATOR is not set +CONFIG_RFKILL_GPIO=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_LWTUNNEL is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +# CONFIG_TEGRA_AHB is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_FENCE_TRACE is not set + +# +# Bus devices +# +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI500_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_NAND_IDS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_UBI is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_MTD=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_LZ4_COMPRESS is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set +CONFIG_BLK_DEV_NVME=y + +# +# Misc devices +# +CONFIG_ROCKCHIP_SCR=y +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +# CONFIG_MEMORY_STATE_TIME is not set +# CONFIG_USB_CAM_GPIO is not set +# CONFIG_GPIO_DET is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_KERNEL_API is not set +# CONFIG_CXL_EEH is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=y +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=y +CONFIG_ISCSI_BOOT_SYSFS=y +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_MQ_DEFAULT is not set +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=m +# CONFIG_DM_CACHE is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_VERITY_HASH_PREFETCH_MIN_SIZE_128 is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +# CONFIG_MACVTAP is not set +# CONFIG_IPVLAN is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_SFC is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_IPQ806X is not set +# CONFIG_DWMAC_LPC18XX is not set +# CONFIG_DWMAC_MESON is not set +CONFIG_DWMAC_ROCKCHIP=y +# CONFIG_DWMAC_SOCFPGA is not set +# CONFIG_DWMAC_STI is not set +# CONFIG_DWMAC_SUNXI is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_TERANETICS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +CONFIG_LIBERTAS_THINFIRM=y +# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set +# CONFIG_LIBERTAS_THINFIRM_USB is not set +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=y +# CONFIG_ADM8211 is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +# CONFIG_ATH_CARDS is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +# CONFIG_BRCMFMAC_SDIO is not set +CONFIG_BRCMFMAC_USB=y +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +# CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +CONFIG_RT2X00=m +# CONFIG_RT2400PCI is not set +# CONFIG_RT2500PCI is not set +# CONFIG_RT61PCI is not set +# CONFIG_RT2800PCI is not set +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +# CONFIG_RT2X00_DEBUG is not set +# CONFIG_WL_MEDIATEK is not set +# CONFIG_RTL_CARDS is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set +CONFIG_AP6XXX=m +CONFIG_RTL_WIRELESS_SOLUTION=y +# CONFIG_RTL8188EU is not set +# CONFIG_RTL8188FU is not set +# CONFIG_RTL8189ES is not set +CONFIG_RTL8189FS=m +CONFIG_RTL8723BS=m +# CONFIG_RTL8723BU is not set +# CONFIG_RTL8723CS is not set +# CONFIG_RTL8723DS is not set +# CONFIG_RTL8822BE is not set +# CONFIG_WL_TI is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +# CONFIG_MWIFIEX is not set +# CONFIG_CW1200 is not set +# CONFIG_RSI_91X is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_KEYRESET is not set +# CONFIG_INPUT_KEYCOMBO is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_ROCKCHIP is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +CONFIG_JOYSTICK_IFORCE=y +CONFIG_JOYSTICK_IFORCE_USB=y +# CONFIG_JOYSTICK_IFORCE_232 is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_HANWANG is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_SERIAL_WACOM4 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8C40XX is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_FT6236 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set +# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set +# CONFIG_TOUCHSCREEN_GSLX680_VR is not set +# CONFIG_TOUCHSCREEN_GSLX680_FIREFLY is not set +# CONFIG_TOUCHSCREEN_GSL3673 is not set +# CONFIG_TOUCHSCREEN_GSL3673_800X1280 is not set +# CONFIG_TOUCHSCREEN_GT9XX is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +CONFIG_TOUCHSCREEN_ELAN=y +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_VTL_CT36X is not set +# CONFIG_TOUCHSCREEN_GT1X is not set +# CONFIG_ROCKCHIP_REMOTECTL is not set + +# +# handle all sensors +# +# CONFIG_SENSOR_DEVICE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_MPU3050 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYCHORD is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_RK8XX_PWRKEY=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_GPIO=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_INGENIC is not set +# CONFIG_SERIAL_8250_MID is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_TPM=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_TIS_ST33ZP24 is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_I2C_STUB=m +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_OF_GPIO=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_DWAPB is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_VX855 is not set +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_ZX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set + +# +# MFD GPIO expanders +# +CONFIG_GPIO_RK8XX=y +# CONFIG_GPIO_TPS6586X is not set + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_AMD8111 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# SPI or I2C GPIO expanders +# +# CONFIG_GPIO_MCP23S08 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ25700 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_CHARGER_SY6982C is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_EC is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set +# CONFIG_BATTERY_RK818 is not set +# CONFIG_CHARGER_RK818 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_AVS=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_HTU21 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_IMX_THERMAL is not set +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_RK_VIRTUAL_THERMAL=y +# CONFIG_RK3368_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_CORE is not set +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_BCM7038_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_AXP20X is not set +CONFIG_MFD_CROS_EC=y +# CONFIG_MFD_CROS_EC_I2C is not set +CONFIG_MFD_CROS_EC_SPI=y +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_INTEL_SOC_PMIC is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK618 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_RK1000 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_FUSB_30X is not set +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +CONFIG_REGULATOR_LP8752=y +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +CONFIG_REGULATOR_MP8865=y +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK808=y +CONFIG_REGULATOR_RK818=y +# CONFIG_REGULATOR_SYR82X is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +CONFIG_REGULATOR_XZ3216=y +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +# CONFIG_MEDIA_CAMERA_SUPPORT is not set +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_MEDIA_CEC_RC=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_RC_CORE=y +CONFIG_RC_MAP=y +CONFIG_RC_DECODERS=y +CONFIG_LIRC=y +CONFIG_IR_LIRC_CODEC=y +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +CONFIG_IR_SANYO_DECODER=y +CONFIG_IR_SHARP_DECODER=y +CONFIG_IR_MCE_KBD_DECODER=y +CONFIG_IR_XMP_DECODER=y +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y + +# +# USB HDMI CEC adapters +# +CONFIG_USB_PULSE8_CEC=y +CONFIG_USB_RAINSHADOW_CEC=y +# CONFIG_MEDIA_PCI_SUPPORT is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# CONFIG_CAMSYS_DRV is not set +# CONFIG_ROCK_CHIP_SOC_CAMERA is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_IGNORE_IOTCL_PERMIT=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_SCDC_HELPER is not set +CONFIG_DRM_DMA_SYNC=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +# CONFIG_DRM_VGEM is not set +CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_CDN_DP is not set +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_ANALOGIX_DP=y +CONFIG_ROCKCHIP_INNO_HDMI=y +CONFIG_ROCKCHIP_LVDS=y +CONFIG_ROCKCHIP_DRM_TVE=y +# CONFIG_ROCKCHIP_RGB is not set +# CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +CONFIG_DRM_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_RK1000 is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +CONFIG_DRM_ANALOGIX_DP=y +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +CONFIG_DRM_DW_HDMI_CEC=y +# CONFIG_POWERVR_ROGUE_M is not set +CONFIG_MALI400=m +CONFIG_MALI450=y +# CONFIG_MALI470 is not set +# CONFIG_MALI400_DEBUG is not set +# CONFIG_MALI400_PROFILING is not set +# CONFIG_MALI400_UMP is not set +CONFIG_MALI_DMA_BUF_MAP_ON_ATTACH=y +# CONFIG_MALI_SHARED_INTERRUPTS is not set +# CONFIG_MALI_PMU_PARALLEL_POWER_UP is not set +CONFIG_MALI_DT=y +CONFIG_MALI_DEVFREQ=y +# CONFIG_MALI_QUIET is not set +CONFIG_MALI_MIDGARD_FOR_ANDROID=y +# CONFIG_MALI_MIDGARD_FOR_LINUX is not set +# CONFIG_MALI_MIDGARD is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set + +# +# Rockchip Misc Video driver +# +# CONFIG_FB_ROCKCHIP is not set +# CONFIG_LCDC_RK3368 is not set +CONFIG_LCD_GENERAL=y +# CONFIG_LCD_MIPI is not set +# CONFIG_RK_TRSM is not set +# CONFIG_RK_HDMI is not set + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set + +# +# RGA2 +# +# CONFIG_ROCKCHIP_RGA2 is not set + +# +# VCODEC +# +CONFIG_RK_VCODEC=y + +# +# IEP +# +# CONFIG_IEP is not set +# CONFIG_IEP_MMU is not set + +# +# DP +# + +# +# ROCKCHIP_MPP +# +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_DEVICE=y +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y +CONFIG_HDMI_NOTIFIERS=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_SEQUENCER_OSS is not set +CONFIG_SND_HRTIMER=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_PROC_FS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set + +# +# HD-Audio +# +CONFIG_SND_HDA_PREALLOC_SIZE=2048 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +CONFIG_SND_SOC_ROCKCHIP=y +CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_PDM is not set +CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set +CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +CONFIG_SND_SOC_ROCKCHIP_RT5645=y +# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set +# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set + +# +# Allwinner SoC Audio support +# +# CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_BT_SCO is not set +CONFIG_SND_SOC_ES8316=y +# CONFIG_SND_SOC_ES8323 is not set +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES8328 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8396 is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_GVA_CODEC is not set +# CONFIG_SND_SOC_FM1288 is not set +CONFIG_SND_SOC_MAX98090=y +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1792A is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set +CONFIG_SND_SOC_RK3328=y +# CONFIG_SND_SOC_RK817 is not set +CONFIG_SND_SOC_RL6231=y +CONFIG_SND_SOC_RT5616=y +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5640=y +CONFIG_SND_SOC_RT5645=y +CONFIG_SND_SOC_RT5651=y +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=y +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TC358749X is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +CONFIG_SND_SOC_TS3A227E=y +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_RKVR is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +CONFIG_I2C_HID=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_ULPI_BUS is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_HCD_PCI is not set +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +# CONFIG_USB_DWC3_PCI is not set +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC3_ROCKCHIP=y +CONFIG_USB_DWC3_ROCKCHIP_INNO=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +# CONFIG_USB_OTG_WAKELOCK is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# CONFIG_DUAL_ROLE_USB_INTF is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +CONFIG_USB_CONFIGFS_ACM=y +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_MTP is not set +# CONFIG_USB_CONFIGFS_F_ACC is not set +CONFIG_USB_CONFIGFS_UEVENT=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set + +# +# ROCKCHIP USB Support +# +# CONFIG_USB20_HOST is not set +# CONFIG_USB20_OTG is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_EMBEDDED_SDIO is not set +# CONFIG_MMC_PARANOID_SD_INIT is not set +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y +# CONFIG_MMC_SIMULATE_MAX_SPEED is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_MULTI_CTRL is not set +# CONFIG_SWITCH is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +CONFIG_RTC_DRV_HYM8563=y +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RK808=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12057 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RV8803 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_MCP795 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_SNVS is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_AMBA_PL08X is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_PL330_DMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8723AU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16204 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16220 is not set +# CONFIG_ADIS16240 is not set +# CONFIG_LIS3L02DQ is not set +# CONFIG_SCA3000 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# CONFIG_INV_MPU_IIO is not set + +# +# Light sensors +# +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +CONFIG_TSL2583=y +# CONFIG_TSL2x7x is not set + +# +# Magnetometer sensors +# +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set +# CONFIG_IIO_SIMPLE_DUMMY is not set +# CONFIG_FB_SM750 is not set +# CONFIG_FB_XGI is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_ANDROID_TIMED_OUTPUT is not set +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set +# CONFIG_SYNC is not set +# CONFIG_ION is not set +# CONFIG_FIQ_DEBUGGER is not set +# CONFIG_FIQ_WATCHDOG is not set +# CONFIG_RK_CONSOLE_THREAD is not set +# CONFIG_STAGING_BOARD is not set +# CONFIG_WIMAX_GDM72XX is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_LUSTRE_FS is not set +# CONFIG_DGNC is not set +# CONFIG_DGAP is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_FSL_MC_BUS is not set +# CONFIG_WILC1000_DRIVER is not set +# CONFIG_MOST is not set +# CONFIG_POWERVR_ROGUE_N is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CROS_EC_CHARDEV is not set +CONFIG_CROS_EC_PROTO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_VERSATILE is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_CLK_QORIQ is not set +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_CDCE706 is not set + +# +# Hardware Spinlock drivers +# + +# +# Clock Source drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_PROBE=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set +# CONFIG_ARM_TIMER_SP804 is not set +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +# CONFIG_RK3368_MBOX is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_RK_IOMMU is not set +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# + +# +# SOC (System On Chip) specific Drivers +# +CONFIG_ANDROID_VERSION=0x07010000 +CONFIG_ROCKCHIP_CPUINFO=y +# CONFIG_ROCKCHIP_DEVICEINFO is not set +# CONFIG_ROCKCHIP_PM_TEST is not set +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +# CONFIG_ROCKCHIP_PVTM is not set +CONFIG_ROCKCHIP_SUSPEND_MODE=y +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y + +# +# DEVFREQ Drivers +# +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 + +# +# Accelerometers +# +# CONFIG_BMA180 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_HI8435 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_VF610_ADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_VZ89X is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Humidity sensors +# +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_IIO is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y + +# +# Digital potentiometers +# +# CONFIG_MCP4531 is not set + +# +# Pressure sensors +# +# CONFIG_BMP280 is not set +# CONFIG_MPL115 is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SX9500 is not set + +# +# Temperature sensors +# +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_CROS_EC is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_PARTITION_PERCPU=y +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +# CONFIG_PHY_XGENE is not set +CONFIG_PHY_ROCKCHIP_USB=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_INNO_USB3=y +CONFIG_PHY_ROCKCHIP_EMMC=y +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set +CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PHY_ROCKCHIP_PCIE=y +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +CONFIG_RAS=y +# CONFIG_THUNDERBOLT is not set + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# CONFIG_LIBNVDIMM is not set +CONFIG_NVMEM=y +CONFIG_ROCKCHIP_EFUSE=y +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set + +# +# FPGA Configuration Support +# +# CONFIG_FPGA is not set +# CONFIG_TEE is not set +# CONFIG_RK_NAND is not set + +# +# Headset device support +# +# CONFIG_RK_HEADSET is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_ROCKCHIP_SIP=y +# CONFIG_ACPI is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_NILFS2_FS is not set +CONFIG_F2FS_FS=y +CONFIG_F2FS_STAT_FS=y +# CONFIG_F2FS_FS_XATTR is not set +CONFIG_F2FS_CHECK_FS=y +# CONFIG_F2FS_IO_TRACE is not set +# CONFIG_F2FS_FAULT_INJECTION is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set +CONFIG_OVERLAY_FS=m + +# +# Caches +# +CONFIG_FSCACHE=y +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +# CONFIG_CACHEFILES is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_SDCARD_FS is not set +CONFIG_HFS_FS=y +CONFIG_HFSPLUS_FS=y +# CONFIG_HFSPLUS_FS_POSIX_ACL is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_DECOMP_SINGLE is not set +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=y +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG is not set +# CONFIG_CIFS_DFS_UPCALL is not set +CONFIG_CIFS_SMB2=y +CONFIG_CIFS_SMB311=y +CONFIG_CIFS_FSCACHE=y +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +# CONFIG_VIRTUALIZATION is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +CONFIG_HARDLOCKUP_DETECTOR_OTHER_CPU=y +CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_PANIC_ON_RT_THROTTLING is not set +CONFIG_SCHEDSTATS=y +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +CONFIG_TIMER_STATS=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_PREEMPTIRQ_EVENTS is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_PROBE_EVENTS is not set +CONFIG_DYNAMIC_FTRACE=y +# CONFIG_FUNCTION_PROFILER is not set +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_TRACE_ENUM_MAP_FILE is not set +CONFIG_TRACING_EVENTS_GPIO=y + +# +# Runtime Testing +# +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_MEMTEST is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARM64_PTDUMP is not set +CONFIG_STRICT_DEVMEM=y +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY_PERF_EVENTS_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_TEE_SUPPORT is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +# CONFIG_CRYPTO_RSA is not set +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_ABLK_HELPER=y + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=y +# CONFIG_CRYPTO_ECHAINIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_HEH is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_CCP is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_PUBLIC_KEY_ALGO_RSA=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_TRUSTED_KEYRING is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +# CONFIG_CRYPTO_POLY_HASH_ARM64_CE is not set +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_CRC32_ARM64 is not set +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_ARCH_HAS_SG_CHAIN=y diff --git a/projects/Rockchip/devices/RK3328/options b/projects/Rockchip/devices/RK3328/options new file mode 100644 index 0000000000..28624f8eca --- /dev/null +++ b/projects/Rockchip/devices/RK3328/options @@ -0,0 +1,43 @@ +################################################################################ +# setup device defaults +################################################################################ + + # The TARGET_CPU variable controls which processor should be targeted for + # generated code. + case $TARGET_ARCH in + aarch64) + TARGET_CPU="cortex-a53" + TARGET_CPU_FLAGS="+crc+crypto" + TARGET_FEATURES="64bit neon" + ;; + arm) + TARGET_KERNEL_ARCH="arm64" + TARGET_PATCH_ARCH="aarch64" + TARGET_FLOAT="hard" + TARGET_CPU="cortex-a53" + TARGET_CPU_FLAGS="+crc" + TARGET_FPU="crypto-neon-fp-armv8" + TARGET_FEATURES="32bit neon" + ;; + esac + + # Kernel target + KERNEL_TARGET="Image" + + # Additional kernel make parameters (for example to specify the u-boot loadaddress) + KERNEL_MAKE_EXTRACMD="" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box-trn9.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-box-z28.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-roc-cc.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-rock64.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3328-rockbox.dtb" + + # Mali GPU family + MALI_FAMILY="450" + + # kernel image name + KERNEL_NAME="Image" + + # kernel serial console + EXTRA_CMDLINE="console=uart8250,mmio32,0xff130000 console=tty0" diff --git a/projects/Rockchip/devices/RK3399/README.md b/projects/Rockchip/devices/RK3399/README.md new file mode 100644 index 0000000000..2c9e8cbfeb --- /dev/null +++ b/projects/Rockchip/devices/RK3399/README.md @@ -0,0 +1,10 @@ +# RK3399 + +This is a SoC device for RK3399 + +**Build** + +* `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=odroidn1 make image` +* `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=rock960 make image` +* `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=rockpro64 make image` +* `PROJECT=Rockchip DEVICE=RK3399 ARCH=arm UBOOT_SYSTEM=sapphire make image` diff --git a/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf b/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf new file mode 100644 index 0000000000..9f9c512614 --- /dev/null +++ b/projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf @@ -0,0 +1,4782 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.4.114 Kernel Configuration +# +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_MMU=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_HAVE_GENERIC_RCU_GUP=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_SMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_SCHED_WALT is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_RCU_STALL_COMMON=y +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_EXPEDITE_BOOT is not set +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +# CONFIG_MEMCG_SWAP is not set +# CONFIG_MEMCG_KMEM is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SCHED_TUNE is not set +# CONFIG_DEFAULT_USE_ENERGY_AWARE is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_PCI_QUIRKS=y +CONFIG_MEMBARRIER=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +# CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_RK_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +CONFIG_BLOCK_COMPAT=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_CFQ_GROUP_IOSCHED=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Platform selection +# +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_EXYNOS7 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_QCOM is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZYNQMP is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set + +# +# PCI host controller drivers +# +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_IPROC is not set +# CONFIG_PCI_HISI is not set +CONFIG_PCIE_ROCKCHIP=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +# CONFIG_PCIEASPM_DEFAULT is not set +CONFIG_PCIEASPM_POWERSAVE=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_HOTPLUG_PCI is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=6 +CONFIG_HOTPLUG_CPU=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=300 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_PGTABLE_MAPPING is not set +# CONFIG_ZSMALLOC_STAT is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_SECCOMP=y +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_LSE_ATOMICS is not set +CONFIG_ARM64_UAO=y +CONFIG_ARM64_MODULE_CMODEL_LARGE=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init BOOT_IMAGE=/Image usbcore.autosuspend=-1" +# CONFIG_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_CMDLINE_EXTEND=y +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_EFI is not set +# CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_KEYS_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HAS_WAKELOCK=y +CONFIG_WAKELOCK=y +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +CONFIG_IP_MROUTE=y +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_ANDROID_PARANOID_NETWORK is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_INGRESS is not set +CONFIG_NETFILTER_NETLINK=m +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_FTP=m +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_REDIRECT is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_NETFILTER_XT_MATCH_OWNER=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV6 is not set +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +# CONFIG_NF_REJECT_IPV6 is not set +CONFIG_NF_LOG_IPV6=m +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +# CONFIG_BT_RFCOMM_TTY is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_SELFTEST is not set +CONFIG_BT_DEBUGFS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +# CONFIG_BT_RTKBTUSB is not set +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_INTERNAL_REGDB=y +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_MINSTREL_VHT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_PM=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_REGULATOR is not set +CONFIG_RFKILL_GPIO=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_LWTUNNEL is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +# CONFIG_TEGRA_AHB is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_FENCE_TRACE is not set + +# +# Bus devices +# +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI500_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_NAND_IDS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_UBI is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_MTD=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_LZ4_COMPRESS is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set +CONFIG_BLK_DEV_NVME=y + +# +# Misc devices +# +CONFIG_ROCKCHIP_SCR=y +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +# CONFIG_MEMORY_STATE_TIME is not set +# CONFIG_USB_CAM_GPIO is not set +# CONFIG_GPIO_DET is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_KERNEL_API is not set +# CONFIG_CXL_EEH is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=y +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=y +CONFIG_ISCSI_BOOT_SYSFS=y +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_MQ_DEFAULT is not set +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=m +# CONFIG_DM_CACHE is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_VERITY_HASH_PREFETCH_MIN_SIZE_128 is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +# CONFIG_MACVTAP is not set +# CONFIG_IPVLAN is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_SFC is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_IPQ806X is not set +# CONFIG_DWMAC_LPC18XX is not set +# CONFIG_DWMAC_MESON is not set +CONFIG_DWMAC_ROCKCHIP=y +# CONFIG_DWMAC_SOCFPGA is not set +# CONFIG_DWMAC_STI is not set +# CONFIG_DWMAC_SUNXI is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_TERANETICS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +CONFIG_LIBERTAS_THINFIRM=y +# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set +# CONFIG_LIBERTAS_THINFIRM_USB is not set +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=y +# CONFIG_ADM8211 is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +# CONFIG_ATH_CARDS is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +# CONFIG_BRCMFMAC_SDIO is not set +CONFIG_BRCMFMAC_USB=y +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +# CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +CONFIG_RT2X00=m +# CONFIG_RT2400PCI is not set +# CONFIG_RT2500PCI is not set +# CONFIG_RT61PCI is not set +# CONFIG_RT2800PCI is not set +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +# CONFIG_RT2X00_DEBUG is not set +# CONFIG_WL_MEDIATEK is not set +# CONFIG_RTL_CARDS is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set +CONFIG_AP6XXX=m +CONFIG_RTL_WIRELESS_SOLUTION=y +# CONFIG_RTL8188EU is not set +# CONFIG_RTL8188FU is not set +# CONFIG_RTL8189ES is not set +# CONFIG_RTL8189FS is not set +CONFIG_RTL8723BS=m +# CONFIG_RTL8723BU is not set +# CONFIG_RTL8723CS is not set +# CONFIG_RTL8723DS is not set +# CONFIG_RTL8822BE is not set +# CONFIG_WL_TI is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +# CONFIG_MWIFIEX is not set +# CONFIG_CW1200 is not set +# CONFIG_RSI_91X is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_KEYRESET is not set +# CONFIG_INPUT_KEYCOMBO is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_ROCKCHIP is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +CONFIG_JOYSTICK_IFORCE=y +CONFIG_JOYSTICK_IFORCE_USB=y +# CONFIG_JOYSTICK_IFORCE_232 is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_HANWANG is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_SERIAL_WACOM4 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8C40XX is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_FT6236 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set +# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set +# CONFIG_TOUCHSCREEN_GSLX680_VR is not set +# CONFIG_TOUCHSCREEN_GSLX680_FIREFLY is not set +# CONFIG_TOUCHSCREEN_GSL3673 is not set +# CONFIG_TOUCHSCREEN_GSL3673_800X1280 is not set +# CONFIG_TOUCHSCREEN_GT9XX is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +CONFIG_TOUCHSCREEN_ELAN=y +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_VTL_CT36X is not set +# CONFIG_TOUCHSCREEN_GT1X is not set +# CONFIG_ROCKCHIP_REMOTECTL is not set + +# +# handle all sensors +# +# CONFIG_SENSOR_DEVICE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_MPU3050 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYCHORD is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_RK8XX_PWRKEY=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_GPIO=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_INGENIC is not set +# CONFIG_SERIAL_8250_MID is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_TPM=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_TIS_ST33ZP24 is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_I2C_STUB=m +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_OF_GPIO=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_DWAPB is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_VX855 is not set +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_ZX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set + +# +# MFD GPIO expanders +# +CONFIG_GPIO_RK8XX=y +# CONFIG_GPIO_TPS6586X is not set + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_AMD8111 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# SPI or I2C GPIO expanders +# +# CONFIG_GPIO_MCP23S08 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ25700 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_CHARGER_SY6982C is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_EC is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set +# CONFIG_BATTERY_RK818 is not set +# CONFIG_CHARGER_RK818 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_AVS=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_HTU21 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_IMX_THERMAL is not set +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_RK_VIRTUAL_THERMAL=y +# CONFIG_RK3368_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_CORE is not set +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_BCM7038_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_AXP20X is not set +CONFIG_MFD_CROS_EC=y +# CONFIG_MFD_CROS_EC_I2C is not set +CONFIG_MFD_CROS_EC_SPI=y +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_INTEL_SOC_PMIC is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK618 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_RK1000 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_FUSB_30X=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +CONFIG_REGULATOR_LP8752=y +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +CONFIG_REGULATOR_MP8865=y +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK808=y +CONFIG_REGULATOR_RK818=y +# CONFIG_REGULATOR_SYR82X is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +CONFIG_REGULATOR_XZ3216=y +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +# CONFIG_MEDIA_CAMERA_SUPPORT is not set +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_MEDIA_CEC_RC=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_RC_CORE=y +CONFIG_RC_MAP=y +CONFIG_RC_DECODERS=y +CONFIG_LIRC=y +CONFIG_IR_LIRC_CODEC=y +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +CONFIG_IR_SANYO_DECODER=y +CONFIG_IR_SHARP_DECODER=y +CONFIG_IR_MCE_KBD_DECODER=y +CONFIG_IR_XMP_DECODER=y +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y + +# +# USB HDMI CEC adapters +# +CONFIG_USB_PULSE8_CEC=y +CONFIG_USB_RAINSHADOW_CEC=y +# CONFIG_MEDIA_PCI_SUPPORT is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# CONFIG_CAMSYS_DRV is not set +# CONFIG_ROCK_CHIP_SOC_CAMERA is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_IGNORE_IOTCL_PERMIT=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_SCDC_HELPER is not set +CONFIG_DRM_DMA_SYNC=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +# CONFIG_DRM_VGEM is not set +CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_CDN_DP is not set +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_ANALOGIX_DP=y +CONFIG_ROCKCHIP_INNO_HDMI=y +CONFIG_ROCKCHIP_LVDS=y +CONFIG_ROCKCHIP_DRM_TVE=y +# CONFIG_ROCKCHIP_RGB is not set +# CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +CONFIG_DRM_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_RK1000 is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +CONFIG_DRM_ANALOGIX_DP=y +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +CONFIG_DRM_DW_HDMI_CEC=y +# CONFIG_POWERVR_ROGUE_M is not set +# CONFIG_MALI400 is not set +CONFIG_MALI_DEVFREQ=y +CONFIG_MALI_MIDGARD_FOR_ANDROID=y +# CONFIG_MALI_MIDGARD_FOR_LINUX is not set +CONFIG_MALI_MIDGARD=m +# CONFIG_MALI_GATOR_SUPPORT is not set +# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set +# CONFIG_MALI_DMA_FENCE is not set +CONFIG_MALI_EXPERT=y +# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set +# CONFIG_MALI_PLATFORM_FAKE is not set +# CONFIG_MALI_PLATFORM_DEVICETREE is not set +CONFIG_MALI_PLATFORM_THIRDPARTY=y +CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" +# CONFIG_MALI_DEBUG is not set +# CONFIG_MALI_NO_MALI is not set +# CONFIG_MALI_TRACE_TIMELINE is not set +# CONFIG_MALI_SYSTEM_TRACE is not set +# CONFIG_MALI_GPU_MMU_AARCH64 is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set + +# +# Rockchip Misc Video driver +# +# CONFIG_FB_ROCKCHIP is not set +# CONFIG_LCDC_RK3368 is not set +CONFIG_LCD_GENERAL=y +# CONFIG_LCD_MIPI is not set +# CONFIG_RK_TRSM is not set +# CONFIG_RK_HDMI is not set + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set + +# +# RGA2 +# +# CONFIG_ROCKCHIP_RGA2 is not set + +# +# VCODEC +# +CONFIG_RK_VCODEC=y + +# +# IEP +# +# CONFIG_IEP is not set +# CONFIG_IEP_MMU is not set + +# +# DP +# + +# +# ROCKCHIP_MPP +# +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_DEVICE=y +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y +CONFIG_HDMI_NOTIFIERS=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_SEQUENCER_OSS is not set +CONFIG_SND_HRTIMER=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_PROC_FS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set + +# +# HD-Audio +# +CONFIG_SND_HDA_PREALLOC_SIZE=2048 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +CONFIG_SND_SOC_ROCKCHIP=y +CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_PDM is not set +CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set +CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +CONFIG_SND_SOC_ROCKCHIP_RT5645=y +# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set +# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set + +# +# Allwinner SoC Audio support +# +# CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_BT_SCO is not set +CONFIG_SND_SOC_ES8316=y +# CONFIG_SND_SOC_ES8323 is not set +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES8328 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8396 is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_GVA_CODEC is not set +# CONFIG_SND_SOC_FM1288 is not set +CONFIG_SND_SOC_MAX98090=y +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1792A is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set +CONFIG_SND_SOC_RK3328=y +# CONFIG_SND_SOC_RK817 is not set +CONFIG_SND_SOC_RL6231=y +CONFIG_SND_SOC_RT5616=y +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5640=y +CONFIG_SND_SOC_RT5645=y +CONFIG_SND_SOC_RT5651=y +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=y +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TC358749X is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +CONFIG_SND_SOC_TS3A227E=y +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_RKVR is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +CONFIG_I2C_HID=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_ULPI_BUS is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_HCD_PCI is not set +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +# CONFIG_USB_DWC3_PCI is not set +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC3_ROCKCHIP=y +CONFIG_USB_DWC3_ROCKCHIP_INNO=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +# CONFIG_USB_OTG_WAKELOCK is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# CONFIG_DUAL_ROLE_USB_INTF is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +CONFIG_USB_CONFIGFS_ACM=y +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_MTP is not set +# CONFIG_USB_CONFIGFS_F_ACC is not set +CONFIG_USB_CONFIGFS_UEVENT=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set + +# +# ROCKCHIP USB Support +# +# CONFIG_USB20_HOST is not set +# CONFIG_USB20_OTG is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_EMBEDDED_SDIO is not set +# CONFIG_MMC_PARANOID_SD_INIT is not set +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y +# CONFIG_MMC_SIMULATE_MAX_SPEED is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_MULTI_CTRL is not set +# CONFIG_SWITCH is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +CONFIG_RTC_DRV_HYM8563=y +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RK808=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12057 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RV8803 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_MCP795 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_SNVS is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_AMBA_PL08X is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_PL330_DMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8723AU is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16204 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16220 is not set +# CONFIG_ADIS16240 is not set +# CONFIG_LIS3L02DQ is not set +# CONFIG_SCA3000 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# CONFIG_INV_MPU_IIO is not set + +# +# Light sensors +# +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +CONFIG_TSL2583=y +# CONFIG_TSL2x7x is not set + +# +# Magnetometer sensors +# +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set +# CONFIG_IIO_SIMPLE_DUMMY is not set +# CONFIG_FB_SM750 is not set +# CONFIG_FB_XGI is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_ANDROID_TIMED_OUTPUT is not set +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set +# CONFIG_SYNC is not set +# CONFIG_ION is not set +# CONFIG_FIQ_DEBUGGER is not set +# CONFIG_FIQ_WATCHDOG is not set +# CONFIG_RK_CONSOLE_THREAD is not set +# CONFIG_STAGING_BOARD is not set +# CONFIG_WIMAX_GDM72XX is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_LUSTRE_FS is not set +# CONFIG_DGNC is not set +# CONFIG_DGAP is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_FSL_MC_BUS is not set +# CONFIG_WILC1000_DRIVER is not set +# CONFIG_MOST is not set +# CONFIG_POWERVR_ROGUE_N is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CROS_EC_CHARDEV is not set +CONFIG_CROS_EC_PROTO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_VERSATILE is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_CLK_QORIQ is not set +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_CDCE706 is not set + +# +# Hardware Spinlock drivers +# + +# +# Clock Source drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_PROBE=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set +# CONFIG_ARM_TIMER_SP804 is not set +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +# CONFIG_RK3368_MBOX is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_RK_IOMMU is not set +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# + +# +# SOC (System On Chip) specific Drivers +# +CONFIG_ANDROID_VERSION=0x07010000 +CONFIG_ROCKCHIP_CPUINFO=y +# CONFIG_ROCKCHIP_DEVICEINFO is not set +# CONFIG_ROCKCHIP_PM_TEST is not set +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +# CONFIG_ROCKCHIP_PVTM is not set +CONFIG_ROCKCHIP_SUSPEND_MODE=y +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y + +# +# DEVFREQ Drivers +# +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 + +# +# Accelerometers +# +# CONFIG_BMA180 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_HI8435 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_VF610_ADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_VZ89X is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Humidity sensors +# +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_IIO is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y + +# +# Digital potentiometers +# +# CONFIG_MCP4531 is not set + +# +# Pressure sensors +# +# CONFIG_BMP280 is not set +# CONFIG_MPL115 is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SX9500 is not set + +# +# Temperature sensors +# +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_CROS_EC is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_PARTITION_PERCPU=y +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +# CONFIG_PHY_XGENE is not set +CONFIG_PHY_ROCKCHIP_USB=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_INNO_USB3=y +CONFIG_PHY_ROCKCHIP_EMMC=y +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set +CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_PHY_ROCKCHIP_PCIE=y +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +CONFIG_RAS=y +# CONFIG_THUNDERBOLT is not set + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# CONFIG_LIBNVDIMM is not set +CONFIG_NVMEM=y +CONFIG_ROCKCHIP_EFUSE=y +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set + +# +# FPGA Configuration Support +# +# CONFIG_FPGA is not set +# CONFIG_TEE is not set +# CONFIG_RK_NAND is not set + +# +# Headset device support +# +# CONFIG_RK_HEADSET is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_ROCKCHIP_SIP=y +# CONFIG_ACPI is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_NILFS2_FS is not set +CONFIG_F2FS_FS=y +CONFIG_F2FS_STAT_FS=y +# CONFIG_F2FS_FS_XATTR is not set +CONFIG_F2FS_CHECK_FS=y +# CONFIG_F2FS_IO_TRACE is not set +# CONFIG_F2FS_FAULT_INJECTION is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set +CONFIG_OVERLAY_FS=m + +# +# Caches +# +CONFIG_FSCACHE=y +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +# CONFIG_CACHEFILES is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_SDCARD_FS is not set +CONFIG_HFS_FS=y +CONFIG_HFSPLUS_FS=y +# CONFIG_HFSPLUS_FS_POSIX_ACL is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_DECOMP_SINGLE is not set +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=y +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG is not set +# CONFIG_CIFS_DFS_UPCALL is not set +CONFIG_CIFS_SMB2=y +CONFIG_CIFS_SMB311=y +CONFIG_CIFS_FSCACHE=y +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +# CONFIG_VIRTUALIZATION is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +CONFIG_HARDLOCKUP_DETECTOR_OTHER_CPU=y +CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_PANIC_ON_RT_THROTTLING is not set +CONFIG_SCHEDSTATS=y +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +CONFIG_TIMER_STATS=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_GPU_TRACEPOINTS=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_PREEMPTIRQ_EVENTS is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_PROBE_EVENTS is not set +CONFIG_DYNAMIC_FTRACE=y +# CONFIG_FUNCTION_PROFILER is not set +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_TRACE_ENUM_MAP_FILE is not set +CONFIG_TRACING_EVENTS_GPIO=y + +# +# Runtime Testing +# +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_MEMTEST is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARM64_PTDUMP is not set +CONFIG_STRICT_DEVMEM=y +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY_PERF_EVENTS_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_TEE_SUPPORT is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +# CONFIG_CRYPTO_RSA is not set +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_ABLK_HELPER=y + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=y +# CONFIG_CRYPTO_ECHAINIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_HEH is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_CCP is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_PUBLIC_KEY_ALGO_RSA=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_TRUSTED_KEYRING is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +# CONFIG_CRYPTO_POLY_HASH_ARM64_CE is not set +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_CRC32_ARM64 is not set +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_ARCH_HAS_SG_CHAIN=y diff --git a/projects/Rockchip/devices/RK3399/options b/projects/Rockchip/devices/RK3399/options new file mode 100644 index 0000000000..7249edb0be --- /dev/null +++ b/projects/Rockchip/devices/RK3399/options @@ -0,0 +1,41 @@ +################################################################################ +# setup device defaults +################################################################################ + + # The TARGET_CPU variable controls which processor should be targeted for + # generated code. + case $TARGET_ARCH in + aarch64) + TARGET_CPU="cortex-a72.cortex-a53" + TARGET_CPU_FLAGS="+crc+crypto" + TARGET_FEATURES="64bit neon" + ;; + arm) + TARGET_KERNEL_ARCH="arm64" + TARGET_PATCH_ARCH="aarch64" + TARGET_FLOAT="hard" + TARGET_CPU="cortex-a72.cortex-a53" + TARGET_CPU_FLAGS="+crc" + TARGET_FPU="crypto-neon-fp-armv8" + TARGET_FEATURES="32bit neon" + ;; + esac + + # Kernel target + KERNEL_TARGET="Image" + + # Additional kernel make parameters (for example to specify the u-boot loadaddress) + KERNEL_MAKE_EXTRACMD="" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-odroidn1.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-rock960.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-rockpro64.dtb" + KERNEL_MAKE_EXTRACMD+=" rockchip/rk3399-sapphire.dtb" + + # Mali GPU family + MALI_FAMILY="t860" + + # kernel image name + KERNEL_NAME="Image" + + # kernel serial console + EXTRA_CMDLINE="console=uart8250,mmio32,0xff1a0000 console=tty0" diff --git a/projects/Rockchip/devices/TinkerBoard/README.md b/projects/Rockchip/devices/TinkerBoard/README.md new file mode 100644 index 0000000000..69988b45a4 --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/README.md @@ -0,0 +1,46 @@ +# ASUS Tinker Board + +This is an experimental project for the ASUS Tinker Board + +**Progress** + +* [x] LEDs +* [ ] ~~CEC~~ +* [ ] Audio + * [x] HDMI Stereo L-PCM + * [x] HDMI Multi-channel L-PCM + * [x] HDA 3.5 mm jack + * [ ] HDMI NL-PCM (AC3/E-AC3/DTS) + * [ ] HDMI HBR (TrueHD/DTS-HD) +* [ ] Video + * [x] Software decoding + * [ ] Hardware decoding + * [x] h264 / hevc / vp8 + * [ ] mpeg4 / mpeg2 +* [ ] HDMI Video Format + * [x] RGB 4:4:4 Limited Range + * [ ] RGB 4:4:4 Full Range + * [ ] YCbCr 4:4:4 + * [ ] YCbCr 4:2:0 +* [x] WiFi +* [x] Bluetooth + +**Known Issues/Limitations** + +* Video output is RGB 4:4:4 8-bit limited range +* Video aspect ratio / zoom is not working for all modes +* Generic USB-Audio do not work due to a custom alsa config +* 4K resolution is limited to 30hz due to failed compliance test +* CEC is not connected to SoC + +**Serial Console** + +* UART2 on GPIO pin 32/33 with baud rate 115200 + +**Build** + +* `PROJECT=Rockchip DEVICE=TinkerBoard ARCH=arm make image` + +## Links + +* Community Forum: https://tinkerboarding.co.uk/forum/ diff --git a/projects/Rockchip/devices/TinkerBoard/filesystem/usr/share/alsa/cards/USB-Audio.conf b/projects/Rockchip/devices/TinkerBoard/filesystem/usr/share/alsa/cards/USB-Audio.conf new file mode 100644 index 0000000000..66367c7323 --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/filesystem/usr/share/alsa/cards/USB-Audio.conf @@ -0,0 +1,21 @@ +# +# Configuration for ALC4040 +# + +USB-Audio.pcm.default { + @args [ CARD ] + @args.CARD { type string } + type hw + card $CARD + device 2 +} + + + +USB-Audio.pcm.front.0 { + @args [ CARD ] + @args.CARD { type string } + type hw + card $CARD + device 2 +} diff --git a/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf b/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf new file mode 100644 index 0000000000..b243f9c722 --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf @@ -0,0 +1,4518 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 4.4.114 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_ARM_DMA_USE_IOMMU=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +CONFIG_USELIB=y +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_SCHED_WALT is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_RCU_STALL_COMMON=y +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_EXPEDITE_BOOT is not set +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +# CONFIG_MEMCG_SWAP is not set +# CONFIG_MEMCG_KMEM is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SCHED_TUNE is not set +# CONFIG_DEFAULT_USE_ENERGY_AWARE is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_RD_XZ=y +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_MEMBARRIER=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +# CONFIG_OPROFILE is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=8 +CONFIG_ARCH_MMAP_RND_BITS_MAX=16 +CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +# CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_RK_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_CFQ_GROUP_IOSCHED=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP1 is not set + +# +# Multiple platform selection +# + +# +# CPU Core family selection +# +# CONFIG_ARCH_MULTI_V6 is not set +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MULTI_V6_V7=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +# CONFIG_ARCH_VIRT is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCM is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_DIGICOLOR is not set +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEYSTONE is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_MEDIATEK is not set + +# +# TI OMAP/AM/DM/DRA Family +# +# CONFIG_ARCH_OMAP3 is not set +# CONFIG_ARCH_OMAP4 is not set +# CONFIG_SOC_OMAP5 is not set +# CONFIG_SOC_AM33XX is not set +# CONFIG_SOC_AM43XX is not set +# CONFIG_SOC_DRA7XX is not set +# CONFIG_ARCH_QCOM is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_STI is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SHMOBILE_MULTI is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_SIRF is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_WM8850 is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQ is not set + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_LPAE is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_SWP_EMULATE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_KUSER_HELPERS=y +CONFIG_VDSO=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_CACHE_L2X0=y +# CONFIG_PL310_ERRATA_588369 is not set +# CONFIG_PL310_ERRATA_727915 is not set +# CONFIG_PL310_ERRATA_753970 is not set +# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_KERNMEM_PERMS=y +CONFIG_DEBUG_RODATA=y +CONFIG_MULTI_IRQ_HANDLER=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_643719 is not set +# CONFIG_ARM_ERRATA_720789 is not set +# CONFIG_ARM_ERRATA_754322 is not set +# CONFIG_ARM_ERRATA_754327 is not set +# CONFIG_ARM_ERRATA_764369 is not set +# CONFIG_ARM_ERRATA_775420 is not set +# CONFIG_ARM_ERRATA_798181 is not set +# CONFIG_ARM_ERRATA_773022 is not set + +# +# Bus support +# +# CONFIG_PCI is not set +# CONFIG_PCI_DOMAINS_GENERIC is not set +# CONFIG_PCI_SYSCALL is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_HAVE_SMP=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_ARM_CPU_TOPOLOGY=y +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_HAVE_ARM_TWD=y +# CONFIG_MCPM is not set +# CONFIG_BIG_LITTLE is not set +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_3G_OPT is not set +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +# CONFIG_ARM_PSCI is not set +CONFIG_ARCH_NR_GPIO=288 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_HZ_FIXED=0 +# CONFIG_HZ_100 is not set +# CONFIG_HZ_200 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y +# CONFIG_HZ_500 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=300 +CONFIG_SCHED_HRTICK=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_CPU_SW_DOMAIN_PAN=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +# CONFIG_ARM_MODULE_PLTS is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_ZSMALLOC=y +# CONFIG_PGTABLE_MAPPING is not set +# CONFIG_ZSMALLOC_STAT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +CONFIG_SECCOMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +# CONFIG_XEN is not set +# CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART is not set + +# +# Boot options +# +CONFIG_USE_OF=y +CONFIG_ATAGS=y +# CONFIG_DEPRECATED_PARAM_STRUCT is not set +# CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init BOOT_IMAGE=/zImage usbcore.autosuspend=-1" +# CONFIG_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_CMDLINE_EXTEND=y +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +CONFIG_AUTO_ZRELADDR=y + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +# CONFIG_QORIQ_CPUFREQ is not set + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARM_CPUIDLE is not set +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y +# CONFIG_KERNEL_MODE_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HAS_WAKELOCK=y +CONFIG_WAKELOCK=y +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_APM_EMULATION is not set +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +CONFIG_IP_MROUTE=y +# CONFIG_IP_PIMSM_V1 is not set +# CONFIG_IP_PIMSM_V2 is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_ANDROID_PARANOID_NETWORK is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_INGRESS is not set +CONFIG_NETFILTER_NETLINK=m +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_PROCFS is not set +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CT_PROTO_DCCP is not set +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_FTP=m +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_REDIRECT is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_NETFILTER_XT_MATCH_OWNER=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV6 is not set +# CONFIG_NF_CONNTRACK_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +# CONFIG_NF_REJECT_IPV6 is not set +CONFIG_NF_LOG_IPV6=m +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +# CONFIG_BT_RFCOMM_TTY is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_SELFTEST is not set +CONFIG_BT_DEBUGFS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +# CONFIG_BT_RTKBTUSB is not set +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIUART_3WIRE=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_INTERNAL_REGDB=y +# CONFIG_CFG80211_CRDA_SUPPORT is not set +CONFIG_CFG80211_WEXT=y +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_MINSTREL_VHT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_PM=y +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_REGULATOR is not set +CONFIG_RFKILL_GPIO=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_LWTUNNEL is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +# CONFIG_TEGRA_AHB is not set + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_FENCE_TRACE is not set + +# +# Bus devices +# +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI500_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_ZRAM=y +# CONFIG_ZRAM_LZ4_COMPRESS is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_BLK_DEV_RBD is not set + +# +# Misc devices +# +# CONFIG_ROCKCHIP_SCR is not set +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_MEMORY_STATE_TIME is not set +# CONFIG_USB_CAM_GPIO is not set +# CONFIG_GPIO_DET is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_KERNEL_API is not set +# CONFIG_CXL_EEH is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=y +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=y +CONFIG_ISCSI_BOOT_SYSFS=y +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_MQ_DEFAULT is not set +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=m +# CONFIG_DM_CACHE is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_VERITY_HASH_PREFETCH_MIN_SIZE_128 is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_TARGET_CORE is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_EQUALIZER is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +# CONFIG_MACVTAP is not set +# CONFIG_IPVLAN is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +# CONFIG_NLMON is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +CONFIG_ETHERNET=y +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_NET_VENDOR_CIRRUS=y +# CONFIG_CS89x0 is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_FARADAY=y +# CONFIG_FTMAC100 is not set +# CONFIG_FTGMAC100 is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_IPQ806X is not set +# CONFIG_DWMAC_LPC18XX is not set +# CONFIG_DWMAC_MESON is not set +CONFIG_DWMAC_ROCKCHIP=y +# CONFIG_DWMAC_SOCFPGA is not set +# CONFIG_DWMAC_STI is not set +# CONFIG_DWMAC_SUNXI is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +CONFIG_USB_NET_CDC_MBIM=y +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +CONFIG_LIBERTAS_THINFIRM=y +# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set +# CONFIG_LIBERTAS_THINFIRM_USB is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=y +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_ATH_CARDS is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +# CONFIG_BRCMFMAC_SDIO is not set +CONFIG_BRCMFMAC_USB=y +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +# CONFIG_HOSTAP is not set +# CONFIG_LIBERTAS is not set +# CONFIG_P54_COMMON is not set +CONFIG_RT2X00=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +# CONFIG_RT2X00_DEBUG is not set +# CONFIG_WL_MEDIATEK is not set +# CONFIG_RTL_CARDS is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WL_ROCKCHIP=y +# CONFIG_WIFI_BUILD_MODULE is not set +CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y +# CONFIG_AP6XXX is not set +CONFIG_RTL_WIRELESS_SOLUTION=y +# CONFIG_RTL8188EU is not set +# CONFIG_RTL8188FU is not set +# CONFIG_RTL8189ES is not set +# CONFIG_RTL8189FS is not set +CONFIG_RTL8723BS=y +# CONFIG_RTL8723BU is not set +# CONFIG_RTL8723CS is not set +# CONFIG_RTL8723DS is not set +# CONFIG_WL_TI is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +# CONFIG_MWIFIEX is not set +# CONFIG_CW1200 is not set +# CONFIG_RSI_91X is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_KEYRESET is not set +# CONFIG_INPUT_KEYCOMBO is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_ROCKCHIP is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +CONFIG_MOUSE_ELAN_I2C=y +CONFIG_MOUSE_ELAN_I2C_I2C=y +# CONFIG_MOUSE_ELAN_I2C_SMBUS is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +CONFIG_JOYSTICK_IFORCE=y +CONFIG_JOYSTICK_IFORCE_USB=y +# CONFIG_JOYSTICK_IFORCE_232 is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_HANWANG is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_SERIAL_WACOM4 is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8C40XX is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_FT6236 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set +# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set +# CONFIG_TOUCHSCREEN_GSLX680_VR is not set +# CONFIG_TOUCHSCREEN_GSLX680_FIREFLY is not set +# CONFIG_TOUCHSCREEN_GSL3673 is not set +# CONFIG_TOUCHSCREEN_GSL3673_800X1280 is not set +# CONFIG_TOUCHSCREEN_GT9XX is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +CONFIG_TOUCHSCREEN_ELAN=y +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_VTL_CT36X is not set +# CONFIG_TOUCHSCREEN_GT1X is not set +# CONFIG_ROCKCHIP_REMOTECTL is not set + +# +# handle all sensors +# +# CONFIG_SENSOR_DEVICE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_MPU3050 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYCHORD is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_RK8XX_PWRKEY is not set +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_GPIO=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=y +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_EM is not set +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_INGENIC is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_BCM63XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_ST_ASC is not set +# CONFIG_SERIAL_STM32 is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_TPM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_TIS_ST33ZP24 is not set +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX_PCI is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_OF_GPIO=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EM is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_ZEVIO is not set +# CONFIG_GPIO_ZX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_RK8XX is not set +# CONFIG_GPIO_TPS6586X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# SPI or I2C GPIO expanders +# +# CONFIG_GPIO_MCP23S08 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_SBS=y +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=y +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +CONFIG_CHARGER_BQ24735=y +# CONFIG_CHARGER_BQ25700 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_EC is not set +# CONFIG_BATTERY_CW2015 is not set +# CONFIG_BATTERY_RK816 is not set +# CONFIG_BATTERY_RK817 is not set +# CONFIG_CHARGER_RK817 is not set +# CONFIG_BATTERY_RK818 is not set +# CONFIG_CHARGER_RK818 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_VERSATILE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_AVS=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_HTU21 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_IMX_THERMAL is not set +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_RK_VIRTUAL_THERMAL=y +# CONFIG_RK3368_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_CORE is not set +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_BCM7038_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_AXP20X is not set +CONFIG_MFD_CROS_EC=y +# CONFIG_MFD_CROS_EC_I2C is not set +CONFIG_MFD_CROS_EC_SPI=y +# CONFIG_MFD_ASIC3 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_INTEL_SOC_PMIC is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_PM8921_CORE is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK618 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS65218 is not set +CONFIG_MFD_TPS6586X=y +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_RK1000 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_FUSB_30X is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +CONFIG_REGULATOR_ACT8865=y +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +# CONFIG_REGULATOR_GPIO is not set +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8752 is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MP8865 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_RK818 is not set +# CONFIG_REGULATOR_SYR82X is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_TPS6586X=y +# CONFIG_REGULATOR_XZ3216 is not set +CONFIG_CEC_CORE=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +# CONFIG_MEDIA_CAMERA_SUPPORT is not set +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_MEDIA_CEC_RC=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_RC_CORE=y +CONFIG_RC_MAP=y +CONFIG_RC_DECODERS=y +CONFIG_LIRC=y +CONFIG_IR_LIRC_CODEC=y +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +CONFIG_IR_SANYO_DECODER=y +CONFIG_IR_SHARP_DECODER=y +CONFIG_IR_MCE_KBD_DECODER=y +CONFIG_IR_XMP_DECODER=y +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +CONFIG_IR_GPIO_CIR=y +CONFIG_MEDIA_USB_SUPPORT=y + +# +# USB HDMI CEC adapters +# +CONFIG_USB_PULSE8_CEC=y +CONFIG_USB_RAINSHADOW_CEC=y + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# CONFIG_CAMSYS_DRV is not set +# CONFIG_ROCK_CHIP_SOC_CAMERA is not set + +# +# Graphics support +# +# CONFIG_IMX_IPUV3_CORE is not set +CONFIG_DRM=y +CONFIG_DRM_IGNORE_IOTCL_PERMIT=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_SCDC_HELPER is not set +CONFIG_DRM_DMA_SYNC=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_EXYNOS is not set +CONFIG_DRM_ROCKCHIP=y +# CONFIG_ROCKCHIP_CDN_DP is not set +CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_ANALOGIX_DP=y +CONFIG_ROCKCHIP_INNO_HDMI=y +CONFIG_ROCKCHIP_LVDS=y +# CONFIG_ROCKCHIP_DRM_TVE is not set +# CONFIG_ROCKCHIP_RGB is not set +# CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_ARMADA is not set +# CONFIG_DRM_TILCDC is not set +# CONFIG_DRM_FSL_DCU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +CONFIG_DRM_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_RK1000 is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +CONFIG_DRM_ANALOGIX_DP=y +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +# CONFIG_DRM_DW_HDMI_CEC is not set +# CONFIG_DRM_STI is not set +# CONFIG_POWERVR_ROGUE_M is not set +# CONFIG_MALI400 is not set +CONFIG_MALI_DEVFREQ=y +CONFIG_MALI_MIDGARD_FOR_ANDROID=y +# CONFIG_MALI_MIDGARD_FOR_LINUX is not set +CONFIG_MALI_MIDGARD=m +# CONFIG_MALI_GATOR_SUPPORT is not set +# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set +# CONFIG_MALI_DMA_FENCE is not set +CONFIG_MALI_EXPERT=y +# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set +# CONFIG_MALI_PLATFORM_FAKE is not set +# CONFIG_MALI_PLATFORM_DEVICETREE is not set +CONFIG_MALI_PLATFORM_THIRDPARTY=y +CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" +# CONFIG_MALI_DEBUG is not set +# CONFIG_MALI_NO_MALI is not set +# CONFIG_MALI_TRACE_TIMELINE is not set +# CONFIG_MALI_SYSTEM_TRACE is not set +# CONFIG_MALI_GPU_MMU_AARCH64 is not set +# CONFIG_MALI_BIFROST is not set +# CONFIG_MALI_PWRSOFT_765 is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set + +# +# Rockchip Misc Video driver +# +# CONFIG_FB_ROCKCHIP is not set +# CONFIG_LCDC_RK3188 is not set +# CONFIG_LCDC_RK3288 is not set +# CONFIG_LCDC_RK3036 is not set +# CONFIG_LCDC_RK312X is not set +CONFIG_LCD_GENERAL=y +# CONFIG_LCD_MIPI is not set +# CONFIG_RK_TRSM is not set +# CONFIG_RK_HDMI is not set + +# +# RGA +# +# CONFIG_ROCKCHIP_RGA is not set + +# +# RGA2 +# +# CONFIG_ROCKCHIP_RGA2 is not set + +# +# VCODEC +# +CONFIG_RK_VCODEC=y + +# +# IEP +# +# CONFIG_IEP is not set +# CONFIG_IEP_MMU is not set + +# +# DP +# + +# +# ROCKCHIP_MPP +# +# CONFIG_ROCKCHIP_MPP_SERVICE is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y +CONFIG_HDMI_NOTIFIERS=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_SEQUENCER_OSS is not set +CONFIG_SND_HRTIMER=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_PROC_FS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# HD-Audio +# +CONFIG_SND_HDA_PREALLOC_SIZE=2048 +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +CONFIG_SND_SOC_ROCKCHIP=y +CONFIG_SND_SOC_ROCKCHIP_I2S=y +# CONFIG_SND_SOC_ROCKCHIP_PDM is not set +CONFIG_SND_SOC_ROCKCHIP_SPDIF=y +# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set +# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set +CONFIG_SND_SOC_ROCKCHIP_MAX98090=y +CONFIG_SND_SOC_ROCKCHIP_RT5645=y +# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set +# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set + +# +# Allwinner SoC Audio support +# +# CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CX2072X is not set +# CONFIG_SND_SOC_CX20810 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_ES8316 is not set +CONFIG_SND_SOC_ES8323=y +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES8328 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8396 is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_GVA_CODEC is not set +# CONFIG_SND_SOC_FM1288 is not set +CONFIG_SND_SOC_MAX98090=y +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1792A is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK312X is not set +# CONFIG_SND_SOC_RK3228 is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RK817 is not set +CONFIG_SND_SOC_RL6231=y +CONFIG_SND_SOC_RT5616=y +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5640=y +CONFIG_SND_SOC_RT5645=y +# CONFIG_SND_SOC_RT5651 is not set +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=y +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TC358749X is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +CONFIG_SND_SOC_TS3A227E=y +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_RKVR is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +CONFIG_I2C_HID=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_ULPI_BUS is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +CONFIG_USB_WDM=y +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=y +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +CONFIG_USB_SERIAL_KEYSPAN=y +# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OTI6858=y +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=y +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=y +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_USB_PHY is not set +# CONFIG_USB_OTG_WAKELOCK is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_AM335X_PHY_USB is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +CONFIG_USB_GADGET_DEBUG_FILES=y +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FUSB300 is not set +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +# CONFIG_USB_CONFIGFS_ACM is not set +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +# CONFIG_USB_CONFIGFS_EEM is not set +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_MTP is not set +# CONFIG_USB_CONFIGFS_F_ACC is not set +CONFIG_USB_CONFIGFS_UEVENT=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set + +# +# ROCKCHIP USB Support +# +# CONFIG_USB20_HOST is not set +# CONFIG_USB20_OTG is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_EMBEDDED_SDIO is not set +# CONFIG_MMC_PARANOID_SD_INIT is not set +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y +# CONFIG_MMC_SIMULATE_MAX_SPEED is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_K3 is not set +CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_MULTI_CTRL is not set +# CONFIG_SWITCH is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +CONFIG_RTC_DRV_HYM8563=y +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RK808=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12057 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TPS6586X is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set +# CONFIG_RTC_DRV_RV8803 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_MCP795 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_SNVS is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +# CONFIG_AMBA_PL08X is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_NBPFAXI_DMA is not set +CONFIG_PL330_DMA=y +# CONFIG_DW_DMAC is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8723AU is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16204 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16220 is not set +# CONFIG_ADIS16240 is not set +# CONFIG_LIS3L02DQ is not set +# CONFIG_SCA3000 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# CONFIG_INV_MPU_IIO is not set + +# +# Light sensors +# +CONFIG_SENSORS_ISL29018=y +# CONFIG_SENSORS_ISL29028 is not set +CONFIG_TSL2583=y +# CONFIG_TSL2x7x is not set + +# +# Magnetometer sensors +# +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set +# CONFIG_IIO_SIMPLE_DUMMY is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_ANDROID_TIMED_OUTPUT is not set +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set +# CONFIG_SYNC is not set +# CONFIG_ION is not set +# CONFIG_FIQ_DEBUGGER is not set +# CONFIG_FIQ_WATCHDOG is not set +# CONFIG_RK_CONSOLE_THREAD is not set +# CONFIG_STAGING_BOARD is not set +# CONFIG_WIMAX_GDM72XX is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_LUSTRE_FS is not set +# CONFIG_DGAP is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_WILC1000_DRIVER is not set +# CONFIG_MOST is not set +# CONFIG_POWERVR_ROGUE_N is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CROS_EC_CHARDEV is not set +CONFIG_CROS_EC_PROTO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_PWM is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_CDCE706 is not set + +# +# Hardware Spinlock drivers +# + +# +# Clock Source drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_PROBE=y +CONFIG_DW_APB_TIMER=y +CONFIG_DW_APB_TIMER_OF=y +CONFIG_ROCKCHIP_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y +CONFIG_ARM_GLOBAL_TIMER=y +# CONFIG_ARM_TIMER_SP804 is not set +CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_RK_IOMMU is not set +# CONFIG_ARM_SMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# + +# +# SOC (System On Chip) specific Drivers +# +# CONFIG_SOC_BRCMSTB is not set +CONFIG_ANDROID_VERSION=0x07010000 +CONFIG_ROCKCHIP_CPUINFO=y +# CONFIG_ROCKCHIP_DEVICEINFO is not set +# CONFIG_ROCKCHIP_PM_TEST is not set +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +# CONFIG_ROCKCHIP_PVTM is not set +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y + +# +# DEVFREQ Drivers +# +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +# CONFIG_EXTCON is not set +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 + +# +# Accelerometers +# +# CONFIG_BMA180 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_HI8435 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_VF610_ADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_VZ89X is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5686 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Humidity sensors +# +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_IIO is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +CONFIG_SENSORS_TSL2563=y +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=y + +# +# Digital potentiometers +# +# CONFIG_MCP4531 is not set + +# +# Pressure sensors +# +# CONFIG_BMP280 is not set +# CONFIG_MPL115 is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SX9500 is not set + +# +# Temperature sensors +# +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_CROS_EC is not set +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_ROCKCHIP=y +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_SAMSUNG_USB2 is not set +CONFIG_PHY_ROCKCHIP_USB=y +# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set +# CONFIG_PHY_ROCKCHIP_INNO_USB3 is not set +# CONFIG_PHY_ROCKCHIP_EMMC is not set +CONFIG_PHY_ROCKCHIP_DP=y +# CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set +# CONFIG_PHY_ROCKCHIP_TYPEC is not set +# CONFIG_PHY_ROCKCHIP_PCIE is not set +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +CONFIG_RAS=y + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +CONFIG_NVMEM=y +CONFIG_ROCKCHIP_EFUSE=y +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set + +# +# FPGA Configuration Support +# +# CONFIG_FPGA is not set +# CONFIG_TEE is not set +# CONFIG_RK_NAND is not set + +# +# Headset device support +# +# CONFIG_RK_HEADSET is not set + +# +# Firmware Drivers +# +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_ROCKCHIP_SIP is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_NILFS2_FS is not set +CONFIG_F2FS_FS=y +CONFIG_F2FS_STAT_FS=y +# CONFIG_F2FS_FS_XATTR is not set +CONFIG_F2FS_CHECK_FS=y +# CONFIG_F2FS_IO_TRACE is not set +# CONFIG_F2FS_FAULT_INJECTION is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set +CONFIG_OVERLAY_FS=m + +# +# Caches +# +CONFIG_FSCACHE=y +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +# CONFIG_CACHEFILES is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_SDCARD_FS is not set +CONFIG_HFS_FS=y +CONFIG_HFSPLUS_FS=y +# CONFIG_HFSPLUS_FS_POSIX_ACL is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_DECOMP_SINGLE is not set +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=y +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG is not set +# CONFIG_CIFS_DFS_UPCALL is not set +CONFIG_CIFS_SMB2=y +CONFIG_CIFS_SMB311=y +CONFIG_CIFS_FSCACHE=y +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_PROCESS is not set +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +CONFIG_DYNAMIC_DEBUG=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +CONFIG_HARDLOCKUP_DETECTOR_OTHER_CPU=y +CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +# CONFIG_PANIC_ON_RT_THROTTLING is not set +CONFIG_SCHEDSTATS=y +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +CONFIG_TIMER_STATS=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_DEBUG_CREDENTIALS=y + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_GPU_TRACEPOINTS=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +CONFIG_FUNCTION_TRACER=y +CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_PREEMPTIRQ_EVENTS is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_TRACER_SNAPSHOT is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_UPROBE_EVENT is not set +# CONFIG_PROBE_EVENTS is not set +CONFIG_DYNAMIC_FTRACE=y +# CONFIG_FUNCTION_PROFILER is not set +CONFIG_FTRACE_MCOUNT_RECORD=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_TRACE_ENUM_MAP_FILE is not set +CONFIG_TRACING_EVENTS_GPIO=y + +# +# Runtime Testing +# +CONFIG_LKDTM=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_MEMTEST is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARM_PTDUMP is not set +CONFIG_STRICT_DEVMEM=y +CONFIG_ARM_UNWIND=y +CONFIG_OLD_MCOUNT=y +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_LL is not set +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +# CONFIG_DEBUG_UART_8250 is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +# CONFIG_PID_IN_CONTEXTIDR is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY_PERF_EVENTS_RESTRICT is not set +# CONFIG_SECURITY is not set +CONFIG_SECURITYFS=y +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_TEE_SUPPORT is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +# CONFIG_CRYPTO_RSA is not set +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=y +# CONFIG_CRYPTO_ECHAINIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_HEH is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_TWOFISH_COMMON=y + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_PUBLIC_KEY_ALGO_RSA=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_TRUSTED_KEYRING is not set +# CONFIG_ARM_CRYPTO is not set +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_ARCH_HAS_SG_CHAIN=y +# CONFIG_VIRTUALIZATION is not set diff --git a/projects/Rockchip/devices/TinkerBoard/options b/projects/Rockchip/devices/TinkerBoard/options new file mode 100644 index 0000000000..5c1164803b --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/options @@ -0,0 +1,32 @@ +################################################################################ +# setup device defaults +################################################################################ + + # The TARGET_CPU variable controls which processor should be targeted for + # generated code. + case $TARGET_ARCH in + arm) + TARGET_FLOAT="hard" + TARGET_CPU="cortex-a17" + TARGET_FPU="neon-vfpv4" + TARGET_FEATURES="32bit neon" + ;; + esac + + # Configuration for u-boot + UBOOT_SYSTEM="rk3288" + + # Kernel target + KERNEL_TARGET="zImage" + + # Additional kernel make parameters (for example to specify the u-boot loadaddress) + KERNEL_MAKE_EXTRACMD="rk3288-miniarm.dtb" + + # Mali GPU family + MALI_FAMILY="t760" + + # kernel image name + KERNEL_NAME="zImage" + + # kernel serial console + EXTRA_CMDLINE="console=uart8250,mmio32,0xff690000 console=tty0" diff --git a/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch new file mode 100644 index 0000000000..bf75e56d6b --- /dev/null +++ b/projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch @@ -0,0 +1,287 @@ +From f490b48f29fb0b976b7f3d749f14dd4bbb95705a Mon Sep 17 00:00:00 2001 +From: Ziyuan Xu +Date: Fri, 23 Sep 2016 13:43:18 +0800 +Subject: [PATCH] MINIARM: HACK: switch vccio_sd to 3.3v while shutdowning + +Change-Id: I80d6d2b61b31f16b6b42b9ffcaab077231a7a91c +Signed-off-by: Ziyuan Xu +--- + drivers/mmc/host/dw_mmc-rockchip.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c +index 29e3ae99edbc..531ad93ff912 100644 +--- a/drivers/mmc/host/dw_mmc-rockchip.c ++++ b/drivers/mmc/host/dw_mmc-rockchip.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + + #include "dw_mmc.h" +@@ -285,6 +286,15 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev) + return dw_mci_pltfm_register(pdev, drv_data); + } + ++static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) ++{ ++ struct dw_mci *host = platform_get_drvdata(pdev); ++ struct mmc_host *mmc = host->cur_slot->mmc; ++ ++ if (!IS_ERR(mmc->supply.vqmmc)) ++ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); ++} ++ + #ifdef CONFIG_PM_SLEEP + static int dw_mci_rockchip_suspend(struct device *dev) + { +@@ -308,6 +318,7 @@ static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops, + static struct platform_driver dw_mci_rockchip_pltfm_driver = { + .probe = dw_mci_rockchip_probe, + .remove = dw_mci_pltfm_remove, ++ .shutdown = dw_mci_rockchip_platfm_shutdown, + .driver = { + .name = "dwmmc_rockchip", + .of_match_table = dw_mci_rockchip_match, + +From dcd64488045c2c7b54f4257a0f5e6d56f93f28f6 Mon Sep 17 00:00:00 2001 +From: Ziyuan Xu +Date: Mon, 6 Feb 2017 08:39:46 +0800 +Subject: [PATCH] MINIARM: HACK: mmc: dw_mmc-rockchip: enable vmmc supply for + reboot + +Mmc core has already power off the vmmc since shutdown, re-enable it so +that card is active in next reboot. + +Change-Id: Id64ed02844db9d834c820ed5b8c5bf7a0afe4ed5 +Signed-off-by: Ziyuan Xu +--- + drivers/mmc/host/dw_mmc-rockchip.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c +index 531ad93ff912..eae304077e17 100644 +--- a/drivers/mmc/host/dw_mmc-rockchip.c ++++ b/drivers/mmc/host/dw_mmc-rockchip.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + + #include "dw_mmc.h" + #include "dw_mmc-pltfm.h" +@@ -290,6 +291,12 @@ static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev) + { + struct dw_mci *host = platform_get_drvdata(pdev); + struct mmc_host *mmc = host->cur_slot->mmc; ++ int ret; ++ ++ mdelay(20); ++ ++ if (!IS_ERR(mmc->supply.vmmc)) ++ ret = regulator_enable(mmc->supply.vmmc); + + if (!IS_ERR(mmc->supply.vqmmc)) + regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000); + +From 6947d06a6b9bccb4fca863cb40638b3cdf487fa8 Mon Sep 17 00:00:00 2001 +From: Jacob Chen +Date: Sat, 22 Jul 2017 19:55:09 +0800 +Subject: [PATCH] MINIARM: drm/rockchip: update phy settings + +Change-Id: I9e92a4191115e13999183a5d7656d6708adda632 +Signed-off-by: Jacob Chen +--- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index bdc96cd4253d..cea7b9d6bdb3 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -347,8 +347,7 @@ static struct dw_hdmi_phy_config rockchip_phy_config[] = { + /*pixelclk symbol term vlev*/ + { 74250000, 0x8009, 0x0004, 0x0272}, + { 165000000, 0x802b, 0x0004, 0x0209}, +- { 297000000, 0x8039, 0x0005, 0x028d}, +- { 594000000, 0x8039, 0x0000, 0x019d}, ++ { 297000000, 0x802d, 0x0001, 0x0149}, + { ~0UL, 0x0000, 0x0000, 0x0000} + }; + + +From 8b96d29710578f258442bb7975581e30c5c1a209 Mon Sep 17 00:00:00 2001 +From: Nickey Yang +Date: Mon, 17 Jul 2017 16:35:34 +0800 +Subject: [PATCH] MINIARM: set npll be used for hdmi only + +Change-Id: I8bebfb2cfb68e3dad172e5547d3886526ad5e912 +Signed-off-by: Nickey Yang +--- + arch/arm/boot/dts/rk3288.dtsi | 4 +++- + drivers/clk/rockchip/clk-rk3288.c | 6 +++--- + 2 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index b37d1954d27c..904a7955e347 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -1027,7 +1027,7 @@ + <&cru PCLK_PERI>; + assigned-clock-rates = <594000000>, + <500000000>, <300000000>, +- <150000000>, <75000000>, ++ <0>, <75000000>, + <300000000>, <150000000>, + <75000000>; + }; +@@ -1265,6 +1265,8 @@ + resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; + reset-names = "axi", "ahb", "dclk"; + iommus = <&vopb_mmu>; ++ assigned-clocks = <&cru DCLK_VOP0>; ++ assigned-clock-parents = <&cru PLL_NPLL>; + status = "disabled"; + + vopb_out: port { +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 4adbace24ff7..9df15059d584 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -211,9 +211,9 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { + [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3288_PLL_CON(8), + RK3288_MODE_CON, 8, 7, 0, rk3288_pll_rates), + [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12), +- RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), ++ RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates), + [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16), +- RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates), ++ RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates), + }; + + static struct clk_div_table div_hclk_cpu_t[] = { +@@ -428,7 +428,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { + RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS, + RK3288_CLKGATE_CON(3), 4, GFLAGS), + +- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0, ++ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, + RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS, + RK3288_CLKGATE_CON(3), 1, GFLAGS), + COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0, + +From 07d84a3e6f43def7af179d417224a610ca7aaf98 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 11 Dec 2017 23:09:54 +0100 +Subject: [PATCH] clk: rockchip: rk3288: add more pixel clock rates + +--- + drivers/clk/rockchip/clk-rk3288.c | 79 +++++++++++++++++++++++++++++++++++++-- + 1 file changed, 75 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c +index 9df15059d584..e1f3bd273a58 100644 +--- a/drivers/clk/rockchip/clk-rk3288.c ++++ b/drivers/clk/rockchip/clk-rk3288.c +@@ -84,23 +84,94 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = { + RK3066_PLL_RATE( 742500000, 8, 495, 2), + RK3066_PLL_RATE( 696000000, 1, 58, 2), + RK3066_PLL_RATE( 600000000, 1, 50, 2), +- RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1), ++ RK3066_PLL_RATE( 594000000, 2, 99, 2), ++ RK3066_PLL_RATE( 552750000, 16, 737, 2), + RK3066_PLL_RATE( 552000000, 1, 46, 2), ++ RK3066_PLL_RATE( 505250000, 24, 2021, 4), + RK3066_PLL_RATE( 504000000, 1, 84, 4), + RK3066_PLL_RATE( 500000000, 3, 125, 2), + RK3066_PLL_RATE( 456000000, 1, 76, 4), ++ RK3066_PLL_RATE( 443250000, 8, 591, 4), + RK3066_PLL_RATE( 408000000, 1, 68, 4), + RK3066_PLL_RATE( 400000000, 3, 100, 2), + RK3066_PLL_RATE( 384000000, 2, 128, 4), ++ RK3066_PLL_RATE( 380500000, 12, 761, 4), + RK3066_PLL_RATE( 360000000, 1, 60, 4), ++ RK3066_PLL_RATE( 356500000, 8, 713, 6), ++ RK3066_PLL_RATE( 348500000, 8, 697, 6), ++ RK3066_PLL_RATE( 333250000, 16, 1333, 6), ++ RK3066_PLL_RATE( 317000000, 4, 317, 6), ++ RK3066_PLL_RATE( 312250000, 16, 1249, 6), + RK3066_PLL_RATE( 312000000, 1, 52, 4), + RK3066_PLL_RATE( 300000000, 1, 50, 4), +- RK3066_PLL_RATE( 297000000, 2, 198, 8), ++ RK3066_PLL_RATE( 297000000, 4, 297, 6), ++ RK3066_PLL_RATE( 288000000, 1, 72, 6), ++ RK3066_PLL_RATE( 281250000, 16, 1125, 6), ++ RK3066_PLL_RATE( 268500000, 2, 179, 8), ++ RK3066_PLL_RATE( 268250000, 12, 1073, 8), ++ RK3066_PLL_RATE( 261000000, 1, 87, 8), + RK3066_PLL_RATE( 252000000, 1, 84, 8), ++ RK3066_PLL_RATE( 245500000, 6, 491, 8), ++ RK3066_PLL_RATE( 245250000, 4, 327, 8), ++ RK3066_PLL_RATE( 241500000, 2, 161, 8), ++ RK3066_PLL_RATE( 234000000, 1, 78, 8), ++ RK3066_PLL_RATE( 229500000, 2, 153, 8), ++ RK3066_PLL_RATE( 218250000, 16, 1455, 10), + RK3066_PLL_RATE( 216000000, 1, 72, 8), +- RK3066_PLL_RATE( 148500000, 2, 99, 8), ++ RK3066_PLL_RATE( 214750000, 12, 859, 8), ++ RK3066_PLL_RATE( 208000000, 3, 260, 10), ++ RK3066_PLL_RATE( 204750000, 16, 1365, 10), ++ RK3066_PLL_RATE( 202500000, 8, 675, 10), ++ RK3066_PLL_RATE( 193250000, 48, 3865, 10), ++ RK3066_PLL_RATE( 189000000, 4, 315, 10), ++ RK3066_PLL_RATE( 187250000, 48, 3745, 10), ++ RK3066_PLL_RATE( 187000000, 12, 935, 10), ++ RK3066_PLL_RATE( 182750000, 8, 731, 12), ++ RK3066_PLL_RATE( 179500000, 4, 359, 12), ++ RK3066_PLL_RATE( 175500000, 4, 351, 12), ++ RK3066_PLL_RATE( 162000000, 1, 81, 12), ++ RK3066_PLL_RATE( 157500000, 4, 315, 12), ++ RK3066_PLL_RATE( 157000000, 12, 1099, 14), ++ RK3066_PLL_RATE( 156750000, 16, 1463, 14), ++ RK3066_PLL_RATE( 156000000, 1, 91, 14), ++ RK3066_PLL_RATE( 154000000, 6, 539, 14), ++ RK3066_PLL_RATE( 148500000, 8, 693, 14), ++ RK3066_PLL_RATE( 148250000, 8, 593, 12), ++ RK3066_PLL_RATE( 146250000, 16, 1365, 14), ++ RK3066_PLL_RATE( 140250000, 16, 1309, 14), ++ RK3066_PLL_RATE( 136750000, 6, 547, 16), ++ RK3066_PLL_RATE( 135000000, 1, 90, 16), + RK3066_PLL_RATE( 126000000, 1, 84, 16), +- RK3066_PLL_RATE( 48000000, 1, 64, 32), ++ RK3066_PLL_RATE( 122500000, 3, 245, 16), ++ RK3066_PLL_RATE( 121750000, 6, 487, 16), ++ RK3066_PLL_RATE( 119000000, 3, 238, 16), ++ RK3066_PLL_RATE( 117500000, 3, 235, 16), ++ RK3066_PLL_RATE( 115500000, 1, 77, 16), ++ RK3066_PLL_RATE( 108000000, 1, 72, 16), ++ RK3066_PLL_RATE( 106500000, 1, 71, 16), ++ RK3066_PLL_RATE( 102250000, 6, 409, 16), ++ RK3066_PLL_RATE( 101000000, 3, 202, 16), ++ RK3066_PLL_RATE( 94500000, 1, 63, 16), ++ RK3066_PLL_RATE( 88750000, 6, 355, 16), ++ RK3066_PLL_RATE( 85500000, 1, 57, 16), ++ RK3066_PLL_RATE( 83500000, 3, 167, 16), ++ RK3066_PLL_RATE( 79500000, 1, 53, 16), ++ RK3066_PLL_RATE( 78750000, 2, 105, 16), ++ RK3066_PLL_RATE( 75000000, 1, 50, 16), ++ RK3066_PLL_RATE( 74250000, 2, 99, 16), ++ RK3066_PLL_RATE( 73250000, 6, 293, 16), ++ RK3066_PLL_RATE( 72000000, 1, 48, 16), ++ RK3066_PLL_RATE( 71000000, 3, 142, 16), ++ RK3066_PLL_RATE( 68250000, 2, 91, 16), ++ RK3066_PLL_RATE( 65000000, 3, 130, 16), ++ RK3066_PLL_RATE( 56250000, 2, 75, 16), ++ RK3066_PLL_RATE( 50000000, 3, 100, 16), ++ RK3066_PLL_RATE( 49500000, 1, 33, 16), ++ RK3066_PLL_RATE( 40000000, 3, 80, 16), ++ RK3066_PLL_RATE( 36000000, 1, 24, 16), ++ RK3066_PLL_RATE( 35500000, 3, 71, 16), ++ RK3066_PLL_RATE( 33750000, 2, 45, 16), ++ RK3066_PLL_RATE( 31500000, 1, 21, 16), + { /* sentinel */ }, + }; + diff --git a/projects/Rockchip/filesystem/usr/lib/systemd/sleep.conf.d/sleep.conf b/projects/Rockchip/filesystem/usr/lib/systemd/sleep.conf.d/sleep.conf new file mode 100644 index 0000000000..4ca7168beb --- /dev/null +++ b/projects/Rockchip/filesystem/usr/lib/systemd/sleep.conf.d/sleep.conf @@ -0,0 +1,3 @@ +[Sleep] +SuspendMode=false +HibernateMode=false diff --git a/projects/Rockchip/filesystem/usr/lib/systemd/system/serial-console.service b/projects/Rockchip/filesystem/usr/lib/systemd/system/serial-console.service new file mode 100644 index 0000000000..80d27f78c0 --- /dev/null +++ b/projects/Rockchip/filesystem/usr/lib/systemd/system/serial-console.service @@ -0,0 +1,24 @@ +[Unit] +Description=Debug Shell on /dev/ttyS2 +DefaultDependencies=no +ConditionKernelCommandLine=|console=ttyS2 +ConditionKernelCommandLine=|console=uart8250,mmio32,0xff130000 +ConditionKernelCommandLine=|console=uart8250,mmio32,0xff1a0000 +ConditionKernelCommandLine=|console=uart8250,mmio32,0xff690000 + +[Service] +WorkingDirectory=/storage +Environment="ENV=/etc/profile" +ExecStartPre=/bin/sh -c 'echo -en "\033[?25h"' +ExecStart=/bin/sh +Restart=always +RestartSec=0 +StandardInput=tty +TTYPath=/dev/ttyS2 +KillMode=process +IgnoreSIGPIPE=no +# bash ignores SIGTERM +KillSignal=SIGHUP + +[Install] +WantedBy=sysinit.target diff --git a/projects/Rockchip/filesystem/usr/share/alsa/cards/HDMI.conf b/projects/Rockchip/filesystem/usr/share/alsa/cards/HDMI.conf new file mode 100644 index 0000000000..a79abf8d3e --- /dev/null +++ b/projects/Rockchip/filesystem/usr/share/alsa/cards/HDMI.conf @@ -0,0 +1,34 @@ +# +# Configuration for HDMI +# + + + +HDMI.pcm.hdmi.0 { + @args [ CARD AES0 AES1 AES2 AES3 ] + @args.CARD { type string } + @args.AES0 { type integer } + @args.AES1 { type integer } + @args.AES2 { type integer } + @args.AES3 { type integer } + type hooks + slave.pcm { + type hw + card $CARD + device 0 + } + hooks.0 { + type ctl_elems + hook_args [ + { + interface MIXER + name "IEC958 Playback Default" + lock true + preserve true + optional true + value [ $AES0 $AES1 $AES2 $AES3 ] + } + ] + } + hint.device 0 +} diff --git a/projects/Rockchip/filesystem/usr/share/alsa/cards/I2S.conf b/projects/Rockchip/filesystem/usr/share/alsa/cards/I2S.conf new file mode 100644 index 0000000000..0a21710eaa --- /dev/null +++ b/projects/Rockchip/filesystem/usr/share/alsa/cards/I2S.conf @@ -0,0 +1,12 @@ +# +# Configuration for I2S +# + + + +I2S.pcm.front.0 { + @args [ CARD ] + @args.CARD { type string } + type hw + card $CARD +} diff --git a/projects/Rockchip/filesystem/usr/share/alsa/cards/SPDIF.conf b/projects/Rockchip/filesystem/usr/share/alsa/cards/SPDIF.conf new file mode 100644 index 0000000000..1618b55161 --- /dev/null +++ b/projects/Rockchip/filesystem/usr/share/alsa/cards/SPDIF.conf @@ -0,0 +1,34 @@ +# +# Configuration for SPDIF +# + + + +SPDIF.pcm.iec958.0 { + @args [ CARD AES0 AES1 AES2 AES3 ] + @args.CARD { type string } + @args.AES0 { type integer } + @args.AES1 { type integer } + @args.AES2 { type integer } + @args.AES3 { type integer } + type hooks + slave.pcm { + type hw + card $CARD + device 0 + } + hooks.0 { + type ctl_elems + hook_args [ + { + interface MIXER + name "IEC958 Playback Default" + lock true + preserve true + optional true + value [ $AES0 $AES1 $AES2 $AES3 ] + } + ] + } + hint.device 0 +} diff --git a/projects/Rockchip/kodi/appliance.xml b/projects/Rockchip/kodi/appliance.xml new file mode 100644 index 0000000000..5600a892b1 --- /dev/null +++ b/projects/Rockchip/kodi/appliance.xml @@ -0,0 +1,37 @@ + + +

+ + + + false + + + false + + + + + 2 + false + + + + + + + false + + + +
+
+ + + + 2 + + + +
+ diff --git a/projects/Rockchip/options b/projects/Rockchip/options new file mode 100644 index 0000000000..a22ffb56fd --- /dev/null +++ b/projects/Rockchip/options @@ -0,0 +1,76 @@ +################################################################################ +# setup system defaults +################################################################################ + + # Bootloader to use (syslinux / u-boot / bcm2835-bootloader) + BOOTLOADER="u-boot" + + # Kernel extra targets to build + KERNEL_UBOOT_EXTRA_TARGET="" + + # Kernel to use. values can be: + # default: default mainline kernel + LINUX="${LINUX:-rockchip-4.4}" + +################################################################################ +# setup build defaults +################################################################################ + + # Project CFLAGS + PROJECT_CFLAGS="" + + # SquashFS compression method (gzip / lzo / xz) + SQUASHFS_COMPRESSION="lzo" + +################################################################################ +# setup project defaults +################################################################################ + + # build and install ALSA Audio support (yes / no) + ALSA_SUPPORT="yes" + + # OpenGL(X) implementation to use (no / mesa) + OPENGL="no" + + # OpenGL-ES implementation to use (no / bcm2835-driver / gpu-viv-bin-mx6q) + OPENGLES="mali-rockchip" + + # include uvesafb support (yes / no) + UVESAFB_SUPPORT="no" + + # Displayserver to use (weston / no) + DISPLAYSERVER="no" + + # Windowmanager to use (ratpoison / fluxbox / none) + WINDOWMANAGER="none" + + # Xorg Graphic drivers to use (all / i915,i965,r200,r300,r600,nvidia) + # Space separated list is supported, + # e.g. GRAPHIC_DRIVERS="i915 i965 r300 r600 radeonsi nvidia" + GRAPHIC_DRIVERS="" + + # KODI Player implementation to use (default / bcm2835-driver / libfslvpuwrap) + KODIPLAYER_DRIVER="rkmpp" + + # Modules to install in initramfs for early boot + INITRAMFS_MODULES="" + + # additional Firmware to use (dvb-firmware, misc-firmware, wlan-firmware) + # Space separated list is supported, + # e.g. FIRMWARE="dvb-firmware misc-firmware wlan-firmware" + FIRMWARE="misc-firmware wlan-firmware dvb-firmware rockchip-firmware" + + # additional packages to install + ADDITIONAL_PACKAGES="dtc" + + # build and install ATV IR remote support (yes / no) + ATVCLIENT_SUPPORT="no" + + # build and install CEC framework support (yes / no) + CEC_FRAMEWORK_SUPPORT="yes" + + # build with installer (yes / no) + INSTALLER_SUPPORT="no" + + # Start boot partition at 16MiB, same as https://github.com/rockchip-linux/build images + SYSTEM_PART_START=32768 diff --git a/projects/Rockchip/patches/libdrm/libdrm-0001-add-rochchip-10bits-formats.patch b/projects/Rockchip/patches/libdrm/libdrm-0001-add-rochchip-10bits-formats.patch new file mode 100644 index 0000000000..a31a510622 --- /dev/null +++ b/projects/Rockchip/patches/libdrm/libdrm-0001-add-rochchip-10bits-formats.patch @@ -0,0 +1,16 @@ +--- ./include/drm/drm_fourcc.h 2017-09-04 10:45:05.812784940 -0700 ++++ ./include/drm/drm_fourcc.h 2017-09-04 10:45:27.831516420 -0700 +@@ -116,6 +116,13 @@ + #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */ + #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ + ++#define DRM_FORMAT_NV12_10 fourcc_code('N', 'A', '1', '2') /* 2x2 subsampled Cr:Cb plane */ ++#define DRM_FORMAT_NV21_10 fourcc_code('N', 'A', '2', '1') /* 2x2 subsampled Cb:Cr plane */ ++#define DRM_FORMAT_NV16_10 fourcc_code('N', 'A', '1', '6') /* 2x1 subsampled Cr:Cb plane */ ++#define DRM_FORMAT_NV61_10 fourcc_code('N', 'A', '6', '1') /* 2x1 subsampled Cb:Cr plane */ ++#define DRM_FORMAT_NV24_10 fourcc_code('N', 'A', '2', '4') /* non-subsampled Cr:Cb plane */ ++#define DRM_FORMAT_NV42_10 fourcc_code('N', 'A', '4', '2') /* non-subsampled Cb:Cr plane */ ++ + /* + * 3 plane YCbCr + * index 0: Y plane, [7:0] Y diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0000-Revert-rk-add-gcc-wrapper.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0000-Revert-rk-add-gcc-wrapper.patch new file mode 100644 index 0000000000..b5d30ff740 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0000-Revert-rk-add-gcc-wrapper.patch @@ -0,0 +1,27 @@ +From a968000cae7b5d0c3c10b4e5a94fd187c891ee08 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 27 Dec 2017 22:01:06 +0100 +Subject: [PATCH] Revert "rk: add gcc-wrapper" + +This reverts part of commit 7a51384d24fe4da183fc15b2d17aa3c153b822e7. +--- + Makefile | 6 ------ + 1 file changed, 6 deletions(-) + +diff --git a/Makefile b/Makefile +index a785aeed4674..d34c20a89fb7 100644 +--- a/Makefile ++++ b/Makefile +@@ -372,12 +372,6 @@ PERL = perl + PYTHON = python + CHECK = sparse + +-# Use the wrapper for the compiler. This wrapper scans for new +-# warnings and causes the build to stop upon encountering them. +-ifneq ($(wildcard $(srctree)/scripts/gcc-wrapper.py),) +-CC = $(srctree)/scripts/gcc-wrapper.py $(CROSS_COMPILE)gcc +-endif +- + CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ + -Wbitwise -Wno-return-void $(CF) + CFLAGS_MODULE = diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch new file mode 100644 index 0000000000..9b9eafe7d5 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch @@ -0,0 +1,735 @@ +From 3ab7c88ff74eb4f8f1eb9a8d4e27661a8e8f2103 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 29 Mar 2017 23:51:09 +0200 +Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor + +--- + drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c | 6 ++---- + drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h | 3 +-- + 2 files changed, 3 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c +index 69b13ddad95f..6f3b654cd3fd 100644 +--- a/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c ++++ b/drivers/gpu/arm/midgard_for_linux/backend/gpu/mali_kbase_devfreq.c +@@ -213,8 +213,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) + dp = &kbdev->devfreq_profile; + + dp->initial_freq = kbdev->current_freq; +- /* .KP : set devfreq_dvfs_interval_in_ms */ +- dp->polling_ms = 20; ++ dp->polling_ms = 100; + dp->target = kbase_devfreq_target; + dp->get_dev_status = kbase_devfreq_status; + dp->get_cur_freq = kbase_devfreq_cur_freq; +@@ -229,8 +228,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) + &kbdev->ondemand_data.downdifferential); + + kbdev->devfreq = devfreq_add_device(kbdev->dev, dp, +- "simple_ondemand", +- &kbdev->ondemand_data); ++ "performance", NULL); + if (IS_ERR(kbdev->devfreq)) { + kbase_devfreq_term_freq_table(kbdev); + return PTR_ERR(kbdev->devfreq); +diff --git a/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h b/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h +index 9b00cce9b2b3..739ac83b484f 100644 +--- a/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h ++++ b/drivers/gpu/arm/midgard_for_linux/mali_kbase_config_defaults.h +@@ -157,8 +157,7 @@ enum { + /* + * Default period for DVFS sampling + */ +-// #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ +-#define DEFAULT_PM_DVFS_PERIOD 20 /* 20 ms */ ++#define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ + + /* + * Power Management poweroff tick granuality. This is in nanoseconds to + +From c49efbd36cf0b4d676adee155d3c68862c93d400 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 17 Apr 2017 13:09:16 +0200 +Subject: [PATCH] sound/usb/quirks-table: add Realtek ALC4040 + +--- + sound/usb/quirks-table.h | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h +index 8a59d4782a0f..96e1e2fdc9c3 100644 +--- a/sound/usb/quirks-table.h ++++ b/sound/usb/quirks-table.h +@@ -3277,4 +3277,13 @@ AU0828_DEVICE(0x2040, 0x7270, "Hauppauge", "HVR-950Q"), + } + }, + ++{ ++ USB_DEVICE(0x0bda, 0x481a), ++ .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { ++ .vendor_name = "Realtek", ++ .product_name = "ALC4040", ++ .ifnum = QUIRK_NO_INTERFACE ++ } ++}, ++ + #undef USB_DEVICE_VENDOR_SPEC + +From 9224460a1f2208076d8b67454603db5415dcb992 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 28 May 2017 09:08:50 +0200 +Subject: [PATCH] gpu/arm/mali400: default to performance gpu governor + +--- + drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c b/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c +index 3eac07d76766..14916ea86905 100644 +--- a/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c ++++ b/drivers/gpu/arm/mali400/mali/linux/mali_devfreq.c +@@ -249,7 +249,7 @@ int mali_devfreq_init(struct mali_device *mdev) + return -EFAULT; + + mdev->devfreq = devfreq_add_device(mdev->dev, dp, +- "simple_ondemand", NULL); ++ "performance", NULL); + if (IS_ERR(mdev->devfreq)) { + mali_devfreq_term_freq_table(mdev); + return PTR_ERR(mdev->devfreq); + +From 2d2af9eb328f709fc6b8bc63c42699dd22932e3e Mon Sep 17 00:00:00 2001 +From: LongChair +Date: Fri, 21 Apr 2017 13:39:12 +0200 +Subject: [PATCH] drm/rockchip: remove unsupported 4K freqs + +--- + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +index bdc96cd4253d..b22e7a67024f 100644 +--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c ++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +@@ -508,9 +508,23 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, + return MODE_BAD; + + hdmi = to_rockchip_hdmi(encoder); +- if (hdmi->dev_type == RK3368_HDMI && mode->clock > 340000 && ++ if ((hdmi->dev_type == RK3368_HDMI || hdmi->dev_type == RK3328_HDMI) && ++ mode->clock > 340000 && + !drm_mode_is_420(&connector->display_info, mode)) + return MODE_BAD; ++ ++ /* Skip bad clocks for RK3288 */ ++ if (hdmi->dev_type == RK3288_HDMI && (mode->clock < 27500 || mode->clock > 340000)) ++ return MODE_CLOCK_RANGE; ++ ++ /* Skip 4K 50/60Hz clocks for RK3328 */ ++ if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000) ++ return MODE_CLOCK_RANGE; ++ ++ /* Skip 4K 50/60Hz clocks for RK3399 */ ++ if (hdmi->dev_type == RK3399_HDMI && mode->clock > 340000) ++ return MODE_CLOCK_RANGE; ++ + /* + * ensure all drm display mode can work, if someone want support more + * resolutions, please limit the possible_crtc, only connect to + +From 66db06144315ec2212c9724f57291acadeffe8d8 Mon Sep 17 00:00:00 2001 +From: xuhuicong +Date: Fri, 23 Jun 2017 18:56:17 +0800 +Subject: [PATCH] drm/rockchip: hdmi: fix no sound some time + +Change-Id: Ic9f931d9a5b7bca954363293a20ca242eb0bfa6f +Signed-off-by: xuhuicong +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index a7f2e381a5bd..df2f72fbf93a 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1981,10 +1981,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + HDMI_FC_INVIDCONF_IN_I_P_INTERLACED : + HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE; + +- inv_val |= hdmi->sink_is_hdmi ? +- HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE : +- HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE; +- + hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); + + hdisplay = mode->hdisplay; +@@ -2282,6 +2278,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + /* not for DVI mode */ + if (hdmi->sink_is_hdmi) { + dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__); ++ hdmi_modb(hdmi, HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE, ++ HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE, ++ HDMI_FC_INVIDCONF); + + /* HDMI Initialization Step F - Configure AVI InfoFrame */ + hdmi_config_AVI(hdmi, mode); + +From 61d75a50a3eb5c9f7894d102749c1aed2cb69db8 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 25 Aug 2017 18:29:35 +0200 +Subject: [PATCH] video: rockchip: vpu: partial revise for rk322xh feature + +--- + drivers/video/rockchip/vcodec/vcodec_service.c | 12 +++--------- + 1 file changed, 3 insertions(+), 9 deletions(-) + +diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c +index 9236c5e93215..bdc4722f4e3a 100644 +--- a/drivers/video/rockchip/vcodec/vcodec_service.c ++++ b/drivers/video/rockchip/vcodec/vcodec_service.c +@@ -3630,21 +3630,15 @@ static irqreturn_t vdpu_irq(int irq, void *dev_id) + time_record(task, 1); + vpu_debug(DEBUG_IRQ_STATUS, "vdpu_irq dec status %08x\n", + dec_status); +- if ((dec_status & 0x40001) == 0x40001) { +- do { +- dec_status = readl_relaxed(dev->regs + +- task->reg_irq); +- } while ((dec_status & 0x40001) == 0x40001); +- } +- +- if (check_irq_err(task, dec_status)) +- atomic_add(1, &pservice->reset_request); + + writel_relaxed(0, dev->regs + task->reg_irq); + + /* set clock gating to save power */ + writel(task->gating_mask, dev->regs + task->reg_en); + ++ if (check_irq_err(task, dec_status)) ++ atomic_add(1, &pservice->reset_request); ++ + atomic_add(1, &dev->irq_count_codec); + time_diff(task); + pservice->irq_status = raw_status; + +From 336b80f1b8830171de634f41d29f6153a8ccac14 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 2 Oct 2017 21:53:19 +0200 +Subject: [PATCH] drm/rockchip: use limited range + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++++++++++++++-- + 1 file changed, 14 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index df2f72fbf93a..f603eeadaa1b 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -147,6 +147,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { + { 0x6756, 0x78ab, 0x2000, 0x0200 } + }; + ++static const u16 csc_coeff_rgb_in_limited[3][4] = { ++ { 0x36f7, 0x0000, 0x0000, 0x0040 }, ++ { 0x0000, 0x36f7, 0x0000, 0x0040 }, ++ { 0x0000, 0x0000, 0x36f7, 0x0040 } ++}; ++ + struct hdmi_vmode { + bool mdataenablepolarity; + +@@ -996,7 +1002,9 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) + + static int is_color_space_conversion(struct dw_hdmi *hdmi) + { +- return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format; ++ return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format || ++ (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && ++ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)); + } + + static int is_color_space_decimation(struct dw_hdmi *hdmi) +@@ -1030,7 +1038,11 @@ static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) + u32 csc_scale = 1; + + if (is_color_space_conversion(hdmi)) { +- if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { ++ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && ++ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { ++ csc_coeff = &csc_coeff_rgb_in_limited; ++ csc_scale = 0; ++ } else if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { + if (hdmi->hdmi_data.enc_out_encoding == + V4L2_YCBCR_ENC_601) + csc_coeff = &csc_coeff_rgb_out_eitu601; + +From 63c7038ff1424b8362ccaa5c8c5907ed285284fc Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 18 Nov 2017 11:09:39 +0100 +Subject: [PATCH] rockchip: vop: force skip lines if image too big + +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +index 3e6798b4b821..23516a195261 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +@@ -1584,6 +1584,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, + int ymirror, xmirror; + uint32_t val; + bool rb_swap, global_alpha_en; ++ int skip_lines = 0; + + /* + * can't update plane when vop is disabled. +@@ -1597,8 +1598,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, + } + + mode = &crtc->state->adjusted_mode; ++ ++ /* ++ * force skip lines if image too big. ++ */ + actual_w = drm_rect_width(src) >> 16; +- actual_h = drm_rect_height(src) >> 16; ++ if (actual_w == 3840 && is_yuv_support(fb->pixel_format)) ++ skip_lines = 1; ++ actual_h = drm_rect_height(src) >> (16 + skip_lines); + act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); + + dsp_info = (drm_rect_height(dest) - 1) << 16; +@@ -1620,10 +1627,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, + VOP_WIN_SET(vop, win, xmirror, xmirror); + VOP_WIN_SET(vop, win, ymirror, ymirror); + VOP_WIN_SET(vop, win, format, vop_plane_state->format); +- VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> 2); ++ VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> (2 - skip_lines)); + VOP_WIN_SET(vop, win, yrgb_mst, vop_plane_state->yrgb_mst); + if (is_yuv_support(fb->pixel_format)) { +- VOP_WIN_SET(vop, win, uv_vir, fb->pitches[1] >> 2); ++ VOP_WIN_SET(vop, win, uv_vir, fb->pitches[1] >> (2 - skip_lines)); + VOP_WIN_SET(vop, win, uv_mst, vop_plane_state->uv_mst); + } + VOP_WIN_SET(vop, win, fmt_10, is_yuv_10bit(fb->pixel_format)); + +From 2fef240b349e8adbf74f672a2203453839a59ee2 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 18 Nov 2017 23:17:24 +0100 +Subject: [PATCH] gpu/arm/midgard: default to performance gpu governor + +--- + drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c | 5 ++--- + drivers/gpu/arm/midgard/mali_kbase_config_defaults.h | 3 +-- + 2 files changed, 3 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c +index 0bf5fcd21c03..e578bd0f92dd 100644 +--- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c ++++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c +@@ -232,8 +232,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) + dp = &kbdev->devfreq_profile; + + dp->initial_freq = kbdev->current_freq; +- /* .KP : set devfreq_dvfs_interval_in_ms */ +- dp->polling_ms = 20; ++ dp->polling_ms = 100; + dp->target = kbase_devfreq_target; + dp->get_dev_status = kbase_devfreq_status; + dp->get_cur_freq = kbase_devfreq_cur_freq; +@@ -243,7 +242,7 @@ int kbase_devfreq_init(struct kbase_device *kbdev) + return -EFAULT; + + kbdev->devfreq = devfreq_add_device(kbdev->dev, dp, +- "simple_ondemand", NULL); ++ "performance", NULL); + if (IS_ERR(kbdev->devfreq)) { + kbase_devfreq_term_freq_table(kbdev); + return PTR_ERR(kbdev->devfreq); +diff --git a/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h b/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h +index e674cc2ea183..0f11388acfd7 100644 +--- a/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h ++++ b/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h +@@ -157,8 +157,7 @@ enum { + /* + * Default period for DVFS sampling + */ +-// #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ +-#define DEFAULT_PM_DVFS_PERIOD 20 /* 20 ms */ ++#define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ + + /* + * Power Management poweroff tick granuality. This is in nanoseconds to + +From 0dbe82f20d885716f74242621fe96a914db03064 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 10 Dec 2017 14:16:09 +0100 +Subject: [PATCH] uapi: install rockchip_drm header + +--- + include/uapi/drm/Kbuild | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/uapi/drm/Kbuild b/include/uapi/drm/Kbuild +index 38d437096c35..b7ae9969d41e 100644 +--- a/include/uapi/drm/Kbuild ++++ b/include/uapi/drm/Kbuild +@@ -11,6 +11,7 @@ header-y += nouveau_drm.h + header-y += qxl_drm.h + header-y += r128_drm.h + header-y += radeon_drm.h ++header-y += rockchip_drm.h + header-y += savage_drm.h + header-y += sis_drm.h + header-y += tegra_drm.h + +From f166ba88945f1ea7ff327bb9f22f53aed728dde3 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 10 Dec 2017 18:03:53 +0100 +Subject: [PATCH] phy: rockchip-inno-hdmi-phy: add vesa dmt pixel clocks + +--- + drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c | 71 +++++++++++++++++++++++ + 1 file changed, 71 insertions(+) + +diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c +index ca50c8f58c50..2455c87ab5d8 100644 +--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c ++++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c +@@ -245,6 +245,77 @@ static const struct pre_pll_config pre_pll_cfg_table[] = { + {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0}, + {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B}, + {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0}, ++ { 25175000, 25175000, 30, 1007, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 31500000, 31500000, 1, 21, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ { 33750000, 33750000, 1, 45, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 35500000, 35500000, 3, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ { 36000000, 36000000, 1, 12, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ { 49500000, 49500000, 1, 33, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ { 50000000, 50000000, 3, 50, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ { 56250000, 56250000, 1, 75, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 65000000, 65000000, 3, 65, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ { 68250000, 68250000, 1, 91, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 71000000, 71000000, 3, 71, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ { 72000000, 72000000, 1, 24, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ { 73250000, 73250000, 3, 293, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 75000000, 75000000, 1, 25, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ { 78750000, 78750000, 1, 105, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 79500000, 79500000, 1, 53, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ { 83500000, 83500000, 3, 167, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ { 85500000, 85500000, 1, 57, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ { 88750000, 88750000, 3, 355, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ { 94500000, 94500000, 1, 63, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {101000000, 101000000, 3, 101, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {102250000, 102250000, 3, 409, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {106500000, 106500000, 1, 71, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {115500000, 115500000, 1, 77, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {117500000, 117500000, 3, 235, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {119000000, 119000000, 3, 119, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {121750000, 121750000, 3, 487, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {122500000, 122500000, 3, 245, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {136750000, 136750000, 3, 547, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {140250000, 140250000, 1, 187, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {146250000, 146250000, 1, 195, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {148250000, 148250000, 3, 593, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {154000000, 154000000, 3, 154, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {156000000, 156000000, 1, 52, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {156750000, 156750000, 1, 209, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {157000000, 157000000, 3, 157, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {157500000, 157500000, 1, 105, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {175500000, 175500000, 1, 117, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {179500000, 179500000, 3, 359, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {182750000, 182750000, 3, 731, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {187000000, 187000000, 3, 187, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {187250000, 187250000, 3, 749, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {189000000, 189000000, 1, 63, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {193250000, 193250000, 3, 773, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {202500000, 202500000, 1, 135, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {204750000, 204750000, 1, 273, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {208000000, 208000000, 3, 208, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {214750000, 214750000, 3, 859, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {218250000, 218250000, 1, 291, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {229500000, 229500000, 1, 153, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {234000000, 234000000, 1, 78, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {241500000, 241500000, 1, 161, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {245250000, 245250000, 1, 327, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {245500000, 245500000, 3, 491, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {261000000, 261000000, 1, 87, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {268250000, 268250000, 3, 1073, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {268500000, 268500000, 1, 179, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {281250000, 281250000, 1, 375, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {288000000, 288000000, 1, 96, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {312250000, 312250000, 3, 1249, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {317000000, 317000000, 3, 317, 0, 1, 1, 1, 0, 2, 2, 0, 0}, ++ {333250000, 333250000, 3, 1333, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {348500000, 348500000, 3, 697, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {356500000, 356500000, 3, 713, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {380500000, 380500000, 3, 761, 1, 1, 1, 1, 2, 2, 2, 0, 0}, ++ {443250000, 443250000, 1, 591, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {505250000, 505250000, 3, 2021, 1, 2, 2, 1, 2, 3, 4, 0, 0}, ++ {552750000, 552750000, 1, 737, 1, 2, 2, 1, 2, 3, 4, 0, 0}, + { ~0UL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }; + + +From 1a99dae778ad3402f8283aa19b27ea606fdfcd4c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 12 Dec 2017 00:37:27 +0100 +Subject: [PATCH] clk: rockchip: fix round rate + +--- + drivers/clk/rockchip/clk-pll.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c +index 80d1d4095f2e..e4f64087aa78 100644 +--- a/drivers/clk/rockchip/clk-pll.c ++++ b/drivers/clk/rockchip/clk-pll.c +@@ -299,6 +299,17 @@ static const struct rockchip_pll_rate_table *rockchip_get_pll_settings( + static long rockchip_pll_round_rate(struct clk_hw *hw, + unsigned long drate, unsigned long *prate) + { ++ struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); ++ const struct rockchip_pll_rate_table *rate; ++ ++ /* Get required rate settings from table */ ++ rate = rockchip_get_pll_settings(pll, drate); ++ if (!rate) { ++ pr_debug("%s: Invalid rate : %lu for pll clk %s\n", __func__, ++ drate, __clk_get_name(hw->clk)); ++ return -EINVAL; ++ } ++ + return drate; + } + + +From 6e9921f5c0511283de78b221cc204d6aad53e68f Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 21 Jan 2018 17:20:00 +0100 +Subject: [PATCH] drm: fix HDR metadata infoframe length + +HDR metadata infoframe length is 26 bytes (not 30) according to [1] +(CTA-861-G: 6.9 Dynamic Range and Mastering InfoFrame) + +Fixes activation of HDR mode on my LG OLED + +[1] https://standards.cta.tech/kwspub/published_docs/CTA-861-G_FINAL_revised_2017.pdf +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +- + drivers/gpu/drm/drm_edid.c | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index f603eeadaa1b..affba6ab8163 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1859,7 +1859,7 @@ static void hdmi_config_hdr_infoframe(struct dw_hdmi *hdmi) + return; + } + +- hdmi_writeb(hdmi, 1, HDMI_FC_DRM_HB0); ++ hdmi_writeb(hdmi, frame.version, HDMI_FC_DRM_HB0); + hdmi_writeb(hdmi, frame.length, HDMI_FC_DRM_HB1); + hdmi_writeb(hdmi, frame.eotf, HDMI_FC_DRM_PB0); + hdmi_writeb(hdmi, frame.metadata_type, HDMI_FC_DRM_PB1); +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index 3e3ebdf34e9f..d06786a58ca1 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -4727,10 +4727,10 @@ drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame, + + hdr_source_metadata = (struct hdr_static_metadata *)hdr_metadata; + +- frame->length = sizeof(struct hdr_static_metadata); ++ frame->length = 26; + + frame->eotf = hdr_source_metadata->eotf; +- frame->type = hdr_source_metadata->type; ++ frame->metadata_type = hdr_source_metadata->type; + + for (i = 0; i < 3; i++) { + frame->display_primaries_x[i] = + +From 83b81c3876baf020491ee497f637b01c45eef059 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 27 Jan 2018 09:39:09 +0100 +Subject: [PATCH] drm: add edid detection for Hybrid Log-Gamma EOTF + +--- + drivers/gpu/drm/drm_edid.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index d06786a58ca1..bfd64112178a 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -2737,7 +2737,7 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, + #define TRADITIONAL_GAMMA_SDR (0x1 << 0) + #define TRADITIONAL_GAMMA_HDR (0x1 << 1) + #define SMPTE_ST2084 (0x1 << 2) +-#define FUTURE_EOTF (0x1 << 3) ++#define HYBRID_LOG_GAMMA (0x1 << 3) + #define RESERVED_EOTF (0x3 << 4) + + #define STATIC_METADATA_TYPE1 (0x1 << 0) +@@ -3707,6 +3707,8 @@ static uint16_t eotf_supported(const u8 *edid_ext) + val |= TRADITIONAL_GAMMA_HDR; + if (edid_ext[2] & SMPTE_ST2084) + val |= SMPTE_ST2084; ++ if (edid_ext[2] & HYBRID_LOG_GAMMA) ++ val |= HYBRID_LOG_GAMMA; + + return val; + } + +From 9a00f6e3bc2a7d6f3c3783f98bf3b142a1445f00 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 11 Feb 2018 19:21:41 +0100 +Subject: [PATCH] drm: bridge: dw-hdmi: default to underscan mode + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index affba6ab8163..1c55ff385ce4 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1693,7 +1693,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + break; + } + +- frame.scan_mode = HDMI_SCAN_MODE_NONE; ++ frame.scan_mode = HDMI_SCAN_MODE_UNDERSCAN; + + /* + * The Designware IP uses a different byte format from standard + +From 8076bb526d8c6d19006d460e2f904afafdf019e2 Mon Sep 17 00:00:00 2001 +From: David Carrillo-Cisneros +Date: Tue, 18 Jul 2017 18:18:37 -0700 +Subject: [PATCH] UPSTREAM: perf tools: Add EXCLUDE_EXTLIBS and EXTRA_PERFLIBS + to makefile + +The goal is to allow users to override linking of libraries that +were automatically added to PERFLIBS. + +EXCLUDE_EXTLIBS contains linker flags to be removed from LIBS +while EXTRA_PERFLIBS contains linker flags to be added. + +My use case is to force certain library to be build statically, +e.g. for libelf: + + EXCLUDE_EXTLIBS=-lelf EXTRA_PERFLIBS=path/libelf.a + +Signed-off-by: David Carrillo-Cisneros +Acked-by: Jiri Olsa +Cc: Alexander Shishkin +Cc: Elena Reshetova +Cc: Kees Kook +Cc: Paul Turner +Cc: Stephane Eranian +Cc: Sudeep Holla +Cc: Wang Nan +Link: http://lkml.kernel.org/r/20170719011839.99399-3-davidcc@google.com +Signed-off-by: Arnaldo Carvalho de Melo +(cherry picked from commit cb281fea4b0a326d2a2104f8ffae2b6895c561fd) +--- + tools/perf/Makefile.perf | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf +index fb1c9ddc3478..9b3b9bd50d54 100644 +--- a/tools/perf/Makefile.perf ++++ b/tools/perf/Makefile.perf +@@ -33,6 +33,11 @@ include config/utilities.mak + # + # Define EXTRA_CFLAGS=-m64 or EXTRA_CFLAGS=-m32 as appropriate for cross-builds. + # ++# Define EXCLUDE_EXTLIBS=-lmylib to exclude libmylib from the auto-generated ++# EXTLIBS. ++# ++# Define EXTRA_PERFLIBS to pass extra libraries to PERFLIBS. ++# + # Define NO_DWARF if you do not want debug-info analysis feature at all. + # + # Define WERROR=0 to disable treating any warnings as errors. +@@ -289,7 +294,8 @@ ifdef ASCIIDOC8 + export ASCIIDOC8 + endif + +-LIBS = -Wl,--whole-archive $(PERFLIBS) -Wl,--no-whole-archive -Wl,--start-group $(EXTLIBS) -Wl,--end-group ++EXTLIBS := $(call filter-out,$(EXCLUDE_EXTLIBS),$(EXTLIBS)) ++LIBS = -Wl,--whole-archive $(PERFLIBS) $(EXTRA_PERFLIBS) -Wl,--no-whole-archive -Wl,--start-group $(EXTLIBS) -Wl,--end-group + + export INSTALL SHELL_PATH + + +From 8fb0d8531aece502c4cc3a82077ace8c09b4918a Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 27 Feb 2018 20:49:00 +0100 +Subject: [PATCH] net: wireless: rockchip_wlan: rtl8723bs: do not accept all + sdio wlan id + +--- + drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile | 2 +- + drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c | 3 +++ + 2 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +index b1403a8e22af..716f1baec373 100644 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile +@@ -1248,7 +1248,7 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFO + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT + EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE + # default setting for Power control +-EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC + #EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN + # default setting for Special function + EXTRA_CFLAGS += -DCONFIG_P2P_IPS +diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +index 0c03f775eb7f..45533aacecdc 100644 +--- a/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c ++++ b/drivers/net/wireless/rockchip_wlan/rtl8723bs/os_dep/linux/sdio_intf.c +@@ -47,6 +47,9 @@ static struct mmc_host *mmc_host = NULL; + static const struct sdio_device_id sdio_ids[] = + { + #ifdef CONFIG_RTL8723B ++ { SDIO_DEVICE(0x024c, 0x0523),.driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0623),.driver_data = RTL8723B}, ++ { SDIO_DEVICE(0x024c, 0x0626),.driver_data = RTL8723B}, + { SDIO_DEVICE(0x024c, 0xB723),.driver_data = RTL8723B}, + #endif + #ifdef CONFIG_RTL8188E + +From dced379ed8ce510bbf781704e6ff32557fa0950c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 2 Mar 2018 20:53:32 +0100 +Subject: [PATCH] net: wireless: rockchip_wlan: bcmdhd: detect broadcom sdio + device id + +--- + drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c +index 8864582b1706..b5a388cc3cbe 100755 +--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c ++++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/bcmsdh_sdmmc_linux.c +@@ -225,7 +225,7 @@ static const struct sdio_device_id bcmsdh_sdmmc_ids[] = { + { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4334) }, + { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4324) }, + { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_43239) }, +- { SDIO_DEVICE_CLASS(SDIO_CLASS_NONE) }, ++ { SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_ANY_ID) }, + { 0, 0, 0, 0 /* end: all zeroes */ + }, + }; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch new file mode 100644 index 0000000000..1e52a9776c --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch @@ -0,0 +1,455 @@ +From abd68c63a163f8cd1efb40087f6a8569fafe7d64 Mon Sep 17 00:00:00 2001 +From: Mauro Carvalho Chehab +Date: Thu, 19 Nov 2015 11:41:36 -0200 +Subject: [PATCH] UPSTREAM: smsir.h: remove a now duplicated definition + (IR_DEFAULT_TIMEOUT) + +This macro is now part of the core. Remove from Siano driver. + +Signed-off-by: Mauro Carvalho Chehab +(cherry picked from commit 850c8a7d68a761b5f11d5b443b5ece185e8068f4) +--- + drivers/media/common/siano/smsir.h | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/drivers/media/common/siano/smsir.h b/drivers/media/common/siano/smsir.h +index fc8b7925c532..d9abd96ef48b 100644 +--- a/drivers/media/common/siano/smsir.h ++++ b/drivers/media/common/siano/smsir.h +@@ -30,8 +30,6 @@ along with this program. If not, see . + #include + #include + +-#define IR_DEFAULT_TIMEOUT 100 +- + struct smscore_device_t; + + struct ir_t { + +From 8fcf408f26690b403ea41a34c419a7cf25430b4f Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 6 Sep 2017 18:39:09 +0200 +Subject: [PATCH] [media] rc/keymaps: add keytable for Pine64 IR Remote + Controller + +--- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-pine64.c | 65 ++++++++++++++++++++++++++++++++++++ + include/media/rc-map.h | 1 + + 3 files changed, 67 insertions(+) + create mode 100644 drivers/media/rc/keymaps/rc-pine64.c + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index fbbd3bbcd252..8816520600f7 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -66,6 +66,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-norwood.o \ + rc-npgtech.o \ + rc-pctv-sedna.o \ ++ rc-pine64.o \ + rc-pinnacle-color.o \ + rc-pinnacle-grey.o \ + rc-pinnacle-pctv-hd.o \ +diff --git a/drivers/media/rc/keymaps/rc-pine64.c b/drivers/media/rc/keymaps/rc-pine64.c +new file mode 100644 +index 000000000000..bdf3975e7445 +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-pine64.c +@@ -0,0 +1,65 @@ ++/* Keytable for Pine64 IR Remote Controller ++ * ++ * Copyright (c) 2017 PINE64 ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static struct rc_map_table pine64[] = { ++ { 0x404000, KEY_NUMERIC_0 }, ++ { 0x404001, KEY_NUMERIC_1 }, ++ { 0x404002, KEY_NUMERIC_2 }, ++ { 0x404003, KEY_NUMERIC_3 }, ++ { 0x404004, KEY_NUMERIC_4 }, ++ { 0x404005, KEY_NUMERIC_5 }, ++ { 0x404006, KEY_NUMERIC_6 }, ++ { 0x404007, KEY_NUMERIC_7 }, ++ { 0x404008, KEY_NUMERIC_8 }, ++ { 0x404009, KEY_NUMERIC_9 }, ++ { 0x40400a, KEY_MUTE }, ++ { 0x40400b, KEY_UP }, ++ { 0x40400c, KEY_BACKSPACE }, ++ { 0x40400d, KEY_OK }, ++ { 0x40400e, KEY_DOWN }, ++ { 0x404010, KEY_LEFT }, ++ { 0x404011, KEY_RIGHT }, ++ { 0x404017, KEY_VOLUMEDOWN }, ++ { 0x404018, KEY_VOLUMEUP }, ++ { 0x40401a, KEY_HOME }, ++ { 0x40401d, KEY_MENU }, ++ { 0x40401f, KEY_WWW }, ++ { 0x404045, KEY_BACK }, ++ { 0x404047, KEY_INFO }, ++ { 0x40404d, KEY_POWER }, ++}; ++ ++static struct rc_map_list pine64_map = { ++ .map = { ++ .scan = pine64, ++ .size = ARRAY_SIZE(pine64), ++ .rc_type = RC_TYPE_NEC, ++ .name = RC_MAP_PINE64, ++ } ++}; ++ ++static int __init init_rc_map_pine64(void) ++{ ++ return rc_map_register(&pine64_map); ++} ++ ++static void __exit exit_rc_map_pine64(void) ++{ ++ rc_map_unregister(&pine64_map); ++} ++ ++module_init(init_rc_map_pine64) ++module_exit(exit_rc_map_pine64) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("PINE64"); +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index 7c4bbc4dfab4..3a34a9631dd1 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -173,6 +173,7 @@ void rc_map_init(void); + #define RC_MAP_NORWOOD "rc-norwood" + #define RC_MAP_NPGTECH "rc-npgtech" + #define RC_MAP_PCTV_SEDNA "rc-pctv-sedna" ++#define RC_MAP_PINE64 "rc-pine64" + #define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color" + #define RC_MAP_PINNACLE_GREY "rc-pinnacle-grey" + #define RC_MAP_PINNACLE_PCTV_HD "rc-pinnacle-pctv-hd" + +From 3b5e2f781693301e6ba4b3d9dcfc23f05402251c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 6 Sep 2017 18:39:09 +0200 +Subject: [PATCH] [media] rc/keymaps: add keytable for ODROID IR Remote + Controller + +--- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-odroid.c | 52 ++++++++++++++++++++++++++++++++++++ + include/media/rc-map.h | 1 + + 3 files changed, 54 insertions(+) + create mode 100644 drivers/media/rc/keymaps/rc-odroid.c + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index 8816520600f7..f4321cfbbc79 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -65,6 +65,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-nec-terratec-cinergy-xs.o \ + rc-norwood.o \ + rc-npgtech.o \ ++ rc-odroid.o \ + rc-pctv-sedna.o \ + rc-pine64.o \ + rc-pinnacle-color.o \ +diff --git a/drivers/media/rc/keymaps/rc-odroid.c b/drivers/media/rc/keymaps/rc-odroid.c +new file mode 100644 +index 000000000000..52089f0b7c1d +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-odroid.c +@@ -0,0 +1,52 @@ ++/* Keytable for ODROID IR Remote Controller ++ * ++ * Copyright (c) 2017 Hardkernel co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static struct rc_map_table odroid[] = { ++ { 0xb2dc, KEY_POWER }, ++ { 0xb288, KEY_MUTE }, ++ { 0xb282, KEY_HOME }, ++ { 0xb2ce, KEY_OK }, ++ { 0xb2ca, KEY_UP }, ++ { 0xb299, KEY_LEFT }, ++ { 0xb2c1, KEY_RIGHT }, ++ { 0xb2d2, KEY_DOWN }, ++ { 0xb2c5, KEY_MENU }, ++ { 0xb29a, KEY_BACK }, ++ { 0xb281, KEY_VOLUMEDOWN }, ++ { 0xb280, KEY_VOLUMEUP }, ++}; ++ ++static struct rc_map_list odroid_map = { ++ .map = { ++ .scan = odroid, ++ .size = ARRAY_SIZE(odroid), ++ .rc_type = RC_TYPE_NEC, ++ .name = RC_MAP_ODROID, ++ } ++}; ++ ++static int __init init_rc_map_odroid(void) ++{ ++ return rc_map_register(&odroid_map); ++} ++ ++static void __exit exit_rc_map_odroid(void) ++{ ++ rc_map_unregister(&odroid_map); ++} ++ ++module_init(init_rc_map_odroid) ++module_exit(exit_rc_map_odroid) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Hardkernel co., Ltd."); +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index 3a34a9631dd1..f1badbfbca90 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -172,6 +172,7 @@ void rc_map_init(void); + #define RC_MAP_NEC_TERRATEC_CINERGY_XS "rc-nec-terratec-cinergy-xs" + #define RC_MAP_NORWOOD "rc-norwood" + #define RC_MAP_NPGTECH "rc-npgtech" ++#define RC_MAP_ODROID "rc-odroid" + #define RC_MAP_PCTV_SEDNA "rc-pctv-sedna" + #define RC_MAP_PINE64 "rc-pine64" + #define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color" + +From b78470cab538b641350de506371924b48c19455e Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 6 Sep 2017 18:39:09 +0200 +Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Hub Remote + Controller + +--- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-wetek-hub.c | 52 +++++++++++++++++++++++++++++++++ + include/media/rc-map.h | 1 + + 3 files changed, 54 insertions(+) + create mode 100644 drivers/media/rc/keymaps/rc-wetek-hub.c + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index f4321cfbbc79..e8e6434cbc13 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -101,6 +101,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-tt-1500.o \ + rc-twinhan-dtv-cab-ci.o \ + rc-twinhan1027.o \ ++ rc-wetek-hub.o \ + rc-videomate-m1f.o \ + rc-videomate-s350.o \ + rc-videomate-tv-pvr.o \ +diff --git a/drivers/media/rc/keymaps/rc-wetek-hub.c b/drivers/media/rc/keymaps/rc-wetek-hub.c +new file mode 100644 +index 000000000000..0955ecfcb77c +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-wetek-hub.c +@@ -0,0 +1,52 @@ ++/* Keytable for WeTek Hub Remote Controller ++ * ++ * Copyright (c) 2017 WeTek ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static struct rc_map_table wetek_hub[] = { ++ { 0x77f1, KEY_POWER }, ++ { 0x77f2, KEY_HOME }, ++ { 0x77f3, KEY_MUTE }, ++ { 0x77f4, KEY_UP }, ++ { 0x77f5, KEY_DOWN }, ++ { 0x77f6, KEY_LEFT }, ++ { 0x77f7, KEY_RIGHT }, ++ { 0x77f8, KEY_OK }, ++ { 0x77f9, KEY_BACK }, ++ { 0x77fa, KEY_MENU }, ++ { 0x77fb, KEY_VOLUMEUP }, ++ { 0x77fc, KEY_VOLUMEDOWN }, ++}; ++ ++static struct rc_map_list wetek_hub_map = { ++ .map = { ++ .scan = wetek_hub, ++ .size = ARRAY_SIZE(wetek_hub), ++ .rc_type = RC_TYPE_NEC, ++ .name = RC_MAP_WETEK_HUB, ++ } ++}; ++ ++static int __init init_rc_map_wetek_hub(void) ++{ ++ return rc_map_register(&wetek_hub_map); ++} ++ ++static void __exit exit_rc_map_wetek_hub(void) ++{ ++ rc_map_unregister(&wetek_hub_map); ++} ++ ++module_init(init_rc_map_wetek_hub) ++module_exit(exit_rc_map_wetek_hub) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("WeTek"); +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index f1badbfbca90..cd8590c99e22 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -209,6 +209,7 @@ void rc_map_init(void); + #define RC_MAP_TT_1500 "rc-tt-1500" + #define RC_MAP_TWINHAN_DTV_CAB_CI "rc-twinhan-dtv-cab-ci" + #define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027" ++#define RC_MAP_WETEK_HUB "rc-wetek-hub" + #define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100" + #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350" + #define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr" + +From 03250f10b133c09eb0d8793b89afe760572c1f9e Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 6 Sep 2017 18:39:09 +0200 +Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Play 2 Remote + Controller + +--- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-wetek-play-2.c | 83 ++++++++++++++++++++++++++++++ + include/media/rc-map.h | 1 + + 3 files changed, 85 insertions(+) + create mode 100644 drivers/media/rc/keymaps/rc-wetek-play-2.c + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index e8e6434cbc13..650481039f00 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -102,6 +102,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-twinhan-dtv-cab-ci.o \ + rc-twinhan1027.o \ + rc-wetek-hub.o \ ++ rc-wetek-play-2.o \ + rc-videomate-m1f.o \ + rc-videomate-s350.o \ + rc-videomate-tv-pvr.o \ +diff --git a/drivers/media/rc/keymaps/rc-wetek-play-2.c b/drivers/media/rc/keymaps/rc-wetek-play-2.c +new file mode 100644 +index 000000000000..37586cedbb8a +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-wetek-play-2.c +@@ -0,0 +1,83 @@ ++/* Keytable for WeTek Play 2 Remote Controller ++ * ++ * Copyright (c) 2017 WeTek ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static struct rc_map_table wetek_play_2[] = { ++ { 0x5e5f02, KEY_POWER }, ++ { 0x5e5f46, KEY_POWER2 }, ++ { 0x5e5f10, KEY_MUTE }, ++ { 0x5e5f22, KEY_NUMERIC_1 }, ++ { 0x5e5f23, KEY_NUMERIC_2 }, ++ { 0x5e5f24, KEY_NUMERIC_3 }, ++ { 0x5e5f25, KEY_NUMERIC_4 }, ++ { 0x5e5f26, KEY_NUMERIC_5 }, ++ { 0x5e5f27, KEY_NUMERIC_6 }, ++ { 0x5e5f28, KEY_NUMERIC_7 }, ++ { 0x5e5f29, KEY_NUMERIC_8 }, ++ { 0x5e5f30, KEY_NUMERIC_9 }, ++ { 0x5e5f71, KEY_BACKSPACE }, ++ { 0x5e5f21, KEY_NUMERIC_0 }, ++ { 0x5e5f72, KEY_CAPSLOCK }, ++ { 0x5e5f03, KEY_HOME }, ++ { 0x5e5f48, KEY_MENU }, ++ { 0x5e5f61, KEY_BACK }, ++ { 0x5e5f83, KEY_INFO }, ++ { 0x5e5f84, KEY_COMPOSE }, ++ { 0x5e5f77, KEY_HELP }, ++ { 0x5e5f50, KEY_UP }, ++ { 0x5e5f4b, KEY_DOWN }, ++ { 0x5e5f4c, KEY_LEFT }, ++ { 0x5e5f4d, KEY_RIGHT }, ++ { 0x5e5f47, KEY_OK }, ++ { 0x5e5f44, KEY_VOLUMEUP }, ++ { 0x5e5f43, KEY_VOLUMEDOWN }, ++ { 0x5e5f41, KEY_CHANNELUP }, ++ { 0x5e5f42, KEY_CHANNELDOWN }, ++ { 0x5e5f4f, KEY_ZENKAKUHANKAKU }, ++ { 0x5e5f82, KEY_TEXT }, ++ { 0x5e5f73, KEY_RED }, ++ { 0x5e5f74, KEY_GREEN }, ++ { 0x5e5f75, KEY_YELLOW }, ++ { 0x5e5f76, KEY_BLUE }, ++ { 0x5e5f67, KEY_PREVIOUS }, ++ { 0x5e5f79, KEY_REWIND }, ++ { 0x5e5f80, KEY_FASTFORWARD }, ++ { 0x5e5f81, KEY_NEXT }, ++ { 0x5e5f04, KEY_RECORD }, ++ { 0x5e5f2c, KEY_PLAYPAUSE }, ++ { 0x5e5f2b, KEY_STOP }, ++}; ++ ++static struct rc_map_list wetek_play_2_map = { ++ .map = { ++ .scan = wetek_play_2, ++ .size = ARRAY_SIZE(wetek_play_2), ++ .rc_type = RC_TYPE_NEC, ++ .name = RC_MAP_WETEK_PLAY_2, ++ } ++}; ++ ++static int __init init_rc_map_wetek_play_2(void) ++{ ++ return rc_map_register(&wetek_play_2_map); ++} ++ ++static void __exit exit_rc_map_wetek_play_2(void) ++{ ++ rc_map_unregister(&wetek_play_2_map); ++} ++ ++module_init(init_rc_map_wetek_play_2) ++module_exit(exit_rc_map_wetek_play_2) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("WeTek"); +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index cd8590c99e22..93cac05a5170 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -210,6 +210,7 @@ void rc_map_init(void); + #define RC_MAP_TWINHAN_DTV_CAB_CI "rc-twinhan-dtv-cab-ci" + #define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027" + #define RC_MAP_WETEK_HUB "rc-wetek-hub" ++#define RC_MAP_WETEK_PLAY_2 "rc-wetek-play-2" + #define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100" + #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350" + #define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr" diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch new file mode 100644 index 0000000000..77787f8dd8 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch @@ -0,0 +1,4509 @@ +From 830aaed8ea116ecac827f830729f1d57f96ac22e Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 4 Sep 2017 22:34:19 +0200 +Subject: [PATCH] BACKPORT: HDMI CEC support from v4.15 + +Skipped changes: +857313e51006ff51524579bcd8808b70f9a80812 "media: utilize new cdev_device_add helper function" +0f7499fddb153a333dff3c1dc4280c178b9b5a80 "[media] rc-main: assign driver type during allocation" +--- + Documentation/devicetree/bindings/media/cec.txt | 8 + + Documentation/media/kapi/cec-core.rst | 381 +++++++++++++++++++++ + Documentation/media/uapi/cec/cec-api.rst | 46 +++ + Documentation/media/uapi/cec/cec-func-close.rst | 47 +++ + Documentation/media/uapi/cec/cec-func-ioctl.rst | 66 ++++ + Documentation/media/uapi/cec/cec-func-open.rst | 78 +++++ + Documentation/media/uapi/cec/cec-func-poll.rst | 77 +++++ + Documentation/media/uapi/cec/cec-funcs.rst | 20 ++ + Documentation/media/uapi/cec/cec-header.rst | 10 + + Documentation/media/uapi/cec/cec-intro.rst | 40 +++ + .../media/uapi/cec/cec-ioc-adap-g-caps.rst | 139 ++++++++ + .../media/uapi/cec/cec-ioc-adap-g-log-addrs.rst | 371 ++++++++++++++++++++ + .../media/uapi/cec/cec-ioc-adap-g-phys-addr.rst | 93 +++++ + Documentation/media/uapi/cec/cec-ioc-dqevent.rst | 226 ++++++++++++ + Documentation/media/uapi/cec/cec-ioc-g-mode.rst | 293 ++++++++++++++++ + Documentation/media/uapi/cec/cec-ioc-receive.rst | 344 +++++++++++++++++++ + MAINTAINERS | 16 + + drivers/media/cec/cec-adap.c | 61 +++- + drivers/media/cec/cec-core.c | 15 +- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-cec.c | 182 ++++++++++ + drivers/media/rc/rc-main.c | 1 + + fs/compat_ioctl.c | 12 + + include/media/cec-notifier.h | 22 ++ + include/media/cec.h | 32 +- + include/media/rc-map.h | 5 +- + include/uapi/linux/cec-funcs.h | 1 + + include/uapi/linux/cec.h | 2 +- + include/uapi/linux/input-event-codes.h | 31 ++ + include/uapi/linux/input.h | 1 + + 30 files changed, 2606 insertions(+), 15 deletions(-) + create mode 100644 Documentation/devicetree/bindings/media/cec.txt + create mode 100644 Documentation/media/kapi/cec-core.rst + create mode 100644 Documentation/media/uapi/cec/cec-api.rst + create mode 100644 Documentation/media/uapi/cec/cec-func-close.rst + create mode 100644 Documentation/media/uapi/cec/cec-func-ioctl.rst + create mode 100644 Documentation/media/uapi/cec/cec-func-open.rst + create mode 100644 Documentation/media/uapi/cec/cec-func-poll.rst + create mode 100644 Documentation/media/uapi/cec/cec-funcs.rst + create mode 100644 Documentation/media/uapi/cec/cec-header.rst + create mode 100644 Documentation/media/uapi/cec/cec-intro.rst + create mode 100644 Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst + create mode 100644 Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst + create mode 100644 Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst + create mode 100644 Documentation/media/uapi/cec/cec-ioc-dqevent.rst + create mode 100644 Documentation/media/uapi/cec/cec-ioc-g-mode.rst + create mode 100644 Documentation/media/uapi/cec/cec-ioc-receive.rst + create mode 100644 drivers/media/rc/keymaps/rc-cec.c + +diff --git a/Documentation/devicetree/bindings/media/cec.txt b/Documentation/devicetree/bindings/media/cec.txt +new file mode 100644 +index 000000000000..22d7aae3d3d7 +--- /dev/null ++++ b/Documentation/devicetree/bindings/media/cec.txt +@@ -0,0 +1,8 @@ ++Common bindings for HDMI CEC adapters ++ ++- hdmi-phandle: phandle to the HDMI controller. ++ ++- needs-hpd: if present the CEC support is only available when the HPD ++ is high. Some boards only let the CEC pin through if the HPD is high, ++ for example if there is a level converter that uses the HPD to power ++ up or down. +diff --git a/Documentation/media/kapi/cec-core.rst b/Documentation/media/kapi/cec-core.rst +new file mode 100644 +index 000000000000..d37e107f2fde +--- /dev/null ++++ b/Documentation/media/kapi/cec-core.rst +@@ -0,0 +1,381 @@ ++CEC Kernel Support ++================== ++ ++The CEC framework provides a unified kernel interface for use with HDMI CEC ++hardware. It is designed to handle a multiple types of hardware (receivers, ++transmitters, USB dongles). The framework also gives the option to decide ++what to do in the kernel driver and what should be handled by userspace ++applications. In addition it integrates the remote control passthrough ++feature into the kernel's remote control framework. ++ ++ ++The CEC Protocol ++---------------- ++ ++The CEC protocol enables consumer electronic devices to communicate with each ++other through the HDMI connection. The protocol uses logical addresses in the ++communication. The logical address is strictly connected with the functionality ++provided by the device. The TV acting as the communication hub is always ++assigned address 0. The physical address is determined by the physical ++connection between devices. ++ ++The CEC framework described here is up to date with the CEC 2.0 specification. ++It is documented in the HDMI 1.4 specification with the new 2.0 bits documented ++in the HDMI 2.0 specification. But for most of the features the freely available ++HDMI 1.3a specification is sufficient: ++ ++http://www.microprocessor.org/HDMISpecification13a.pdf ++ ++ ++CEC Adapter Interface ++--------------------- ++ ++The struct cec_adapter represents the CEC adapter hardware. It is created by ++calling cec_allocate_adapter() and deleted by calling cec_delete_adapter(): ++ ++.. c:function:: ++ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, void *priv, ++ const char *name, u32 caps, u8 available_las); ++ ++.. c:function:: ++ void cec_delete_adapter(struct cec_adapter *adap); ++ ++To create an adapter you need to pass the following information: ++ ++ops: ++ adapter operations which are called by the CEC framework and that you ++ have to implement. ++ ++priv: ++ will be stored in adap->priv and can be used by the adapter ops. ++ Use cec_get_drvdata(adap) to get the priv pointer. ++ ++name: ++ the name of the CEC adapter. Note: this name will be copied. ++ ++caps: ++ capabilities of the CEC adapter. These capabilities determine the ++ capabilities of the hardware and which parts are to be handled ++ by userspace and which parts are handled by kernelspace. The ++ capabilities are returned by CEC_ADAP_G_CAPS. ++ ++available_las: ++ the number of simultaneous logical addresses that this ++ adapter can handle. Must be 1 <= available_las <= CEC_MAX_LOG_ADDRS. ++ ++To obtain the priv pointer use this helper function: ++ ++.. c:function:: ++ void *cec_get_drvdata(const struct cec_adapter *adap); ++ ++To register the /dev/cecX device node and the remote control device (if ++CEC_CAP_RC is set) you call: ++ ++.. c:function:: ++ int cec_register_adapter(struct cec_adapter *adap, struct device *parent); ++ ++where parent is the parent device. ++ ++To unregister the devices call: ++ ++.. c:function:: ++ void cec_unregister_adapter(struct cec_adapter *adap); ++ ++Note: if cec_register_adapter() fails, then call cec_delete_adapter() to ++clean up. But if cec_register_adapter() succeeded, then only call ++cec_unregister_adapter() to clean up, never cec_delete_adapter(). The ++unregister function will delete the adapter automatically once the last user ++of that /dev/cecX device has closed its file handle. ++ ++ ++Implementing the Low-Level CEC Adapter ++-------------------------------------- ++ ++The following low-level adapter operations have to be implemented in ++your driver: ++ ++.. c:type:: struct cec_adap_ops ++ ++.. code-block:: none ++ ++ struct cec_adap_ops ++ { ++ /* Low-level callbacks */ ++ int (*adap_enable)(struct cec_adapter *adap, bool enable); ++ int (*adap_monitor_all_enable)(struct cec_adapter *adap, bool enable); ++ int (*adap_log_addr)(struct cec_adapter *adap, u8 logical_addr); ++ int (*adap_transmit)(struct cec_adapter *adap, u8 attempts, ++ u32 signal_free_time, struct cec_msg *msg); ++ void (*adap_status)(struct cec_adapter *adap, struct seq_file *file); ++ void (*adap_free)(struct cec_adapter *adap); ++ ++ /* High-level callbacks */ ++ ... ++ }; ++ ++The five low-level ops deal with various aspects of controlling the CEC adapter ++hardware: ++ ++ ++To enable/disable the hardware: ++ ++.. c:function:: ++ int (*adap_enable)(struct cec_adapter *adap, bool enable); ++ ++This callback enables or disables the CEC hardware. Enabling the CEC hardware ++means powering it up in a state where no logical addresses are claimed. This ++op assumes that the physical address (adap->phys_addr) is valid when enable is ++true and will not change while the CEC adapter remains enabled. The initial ++state of the CEC adapter after calling cec_allocate_adapter() is disabled. ++ ++Note that adap_enable must return 0 if enable is false. ++ ++ ++To enable/disable the 'monitor all' mode: ++ ++.. c:function:: ++ int (*adap_monitor_all_enable)(struct cec_adapter *adap, bool enable); ++ ++If enabled, then the adapter should be put in a mode to also monitor messages ++that not for us. Not all hardware supports this and this function is only ++called if the CEC_CAP_MONITOR_ALL capability is set. This callback is optional ++(some hardware may always be in 'monitor all' mode). ++ ++Note that adap_monitor_all_enable must return 0 if enable is false. ++ ++ ++To program a new logical address: ++ ++.. c:function:: ++ int (*adap_log_addr)(struct cec_adapter *adap, u8 logical_addr); ++ ++If logical_addr == CEC_LOG_ADDR_INVALID then all programmed logical addresses ++are to be erased. Otherwise the given logical address should be programmed. ++If the maximum number of available logical addresses is exceeded, then it ++should return -ENXIO. Once a logical address is programmed the CEC hardware ++can receive directed messages to that address. ++ ++Note that adap_log_addr must return 0 if logical_addr is CEC_LOG_ADDR_INVALID. ++ ++ ++To transmit a new message: ++ ++.. c:function:: ++ int (*adap_transmit)(struct cec_adapter *adap, u8 attempts, ++ u32 signal_free_time, struct cec_msg *msg); ++ ++This transmits a new message. The attempts argument is the suggested number of ++attempts for the transmit. ++ ++The signal_free_time is the number of data bit periods that the adapter should ++wait when the line is free before attempting to send a message. This value ++depends on whether this transmit is a retry, a message from a new initiator or ++a new message for the same initiator. Most hardware will handle this ++automatically, but in some cases this information is needed. ++ ++The CEC_FREE_TIME_TO_USEC macro can be used to convert signal_free_time to ++microseconds (one data bit period is 2.4 ms). ++ ++ ++To log the current CEC hardware status: ++ ++.. c:function:: ++ void (*adap_status)(struct cec_adapter *adap, struct seq_file *file); ++ ++This optional callback can be used to show the status of the CEC hardware. ++The status is available through debugfs: cat /sys/kernel/debug/cec/cecX/status ++ ++To free any resources when the adapter is deleted: ++ ++.. c:function:: ++ void (*adap_free)(struct cec_adapter *adap); ++ ++This optional callback can be used to free any resources that might have been ++allocated by the driver. It's called from cec_delete_adapter. ++ ++ ++Your adapter driver will also have to react to events (typically interrupt ++driven) by calling into the framework in the following situations: ++ ++When a transmit finished (successfully or otherwise): ++ ++.. c:function:: ++ void cec_transmit_done(struct cec_adapter *adap, u8 status, u8 arb_lost_cnt, ++ u8 nack_cnt, u8 low_drive_cnt, u8 error_cnt); ++ ++or: ++ ++.. c:function:: ++ void cec_transmit_attempt_done(struct cec_adapter *adap, u8 status); ++ ++The status can be one of: ++ ++CEC_TX_STATUS_OK: ++ the transmit was successful. ++ ++CEC_TX_STATUS_ARB_LOST: ++ arbitration was lost: another CEC initiator ++ took control of the CEC line and you lost the arbitration. ++ ++CEC_TX_STATUS_NACK: ++ the message was nacked (for a directed message) or ++ acked (for a broadcast message). A retransmission is needed. ++ ++CEC_TX_STATUS_LOW_DRIVE: ++ low drive was detected on the CEC bus. This indicates that ++ a follower detected an error on the bus and requested a ++ retransmission. ++ ++CEC_TX_STATUS_ERROR: ++ some unspecified error occurred: this can be one of ARB_LOST ++ or LOW_DRIVE if the hardware cannot differentiate or something ++ else entirely. ++ ++CEC_TX_STATUS_MAX_RETRIES: ++ could not transmit the message after trying multiple times. ++ Should only be set by the driver if it has hardware support for ++ retrying messages. If set, then the framework assumes that it ++ doesn't have to make another attempt to transmit the message ++ since the hardware did that already. ++ ++The hardware must be able to differentiate between OK, NACK and 'something ++else'. ++ ++The \*_cnt arguments are the number of error conditions that were seen. ++This may be 0 if no information is available. Drivers that do not support ++hardware retry can just set the counter corresponding to the transmit error ++to 1, if the hardware does support retry then either set these counters to ++0 if the hardware provides no feedback of which errors occurred and how many ++times, or fill in the correct values as reported by the hardware. ++ ++The cec_transmit_attempt_done() function is a helper for cases where the ++hardware never retries, so the transmit is always for just a single ++attempt. It will call cec_transmit_done() in turn, filling in 1 for the ++count argument corresponding to the status. Or all 0 if the status was OK. ++ ++When a CEC message was received: ++ ++.. c:function:: ++ void cec_received_msg(struct cec_adapter *adap, struct cec_msg *msg); ++ ++Speaks for itself. ++ ++Implementing the interrupt handler ++---------------------------------- ++ ++Typically the CEC hardware provides interrupts that signal when a transmit ++finished and whether it was successful or not, and it provides and interrupt ++when a CEC message was received. ++ ++The CEC driver should always process the transmit interrupts first before ++handling the receive interrupt. The framework expects to see the cec_transmit_done ++call before the cec_received_msg call, otherwise it can get confused if the ++received message was in reply to the transmitted message. ++ ++Implementing the High-Level CEC Adapter ++--------------------------------------- ++ ++The low-level operations drive the hardware, the high-level operations are ++CEC protocol driven. The following high-level callbacks are available: ++ ++.. code-block:: none ++ ++ struct cec_adap_ops { ++ /* Low-level callbacks */ ++ ... ++ ++ /* High-level CEC message callback */ ++ int (*received)(struct cec_adapter *adap, struct cec_msg *msg); ++ }; ++ ++The received() callback allows the driver to optionally handle a newly ++received CEC message ++ ++.. c:function:: ++ int (*received)(struct cec_adapter *adap, struct cec_msg *msg); ++ ++If the driver wants to process a CEC message, then it can implement this ++callback. If it doesn't want to handle this message, then it should return ++-ENOMSG, otherwise the CEC framework assumes it processed this message and ++it will not do anything with it. ++ ++ ++CEC framework functions ++----------------------- ++ ++CEC Adapter drivers can call the following CEC framework functions: ++ ++.. c:function:: ++ int cec_transmit_msg(struct cec_adapter *adap, struct cec_msg *msg, ++ bool block); ++ ++Transmit a CEC message. If block is true, then wait until the message has been ++transmitted, otherwise just queue it and return. ++ ++.. c:function:: ++ void cec_s_phys_addr(struct cec_adapter *adap, u16 phys_addr, ++ bool block); ++ ++Change the physical address. This function will set adap->phys_addr and ++send an event if it has changed. If cec_s_log_addrs() has been called and ++the physical address has become valid, then the CEC framework will start ++claiming the logical addresses. If block is true, then this function won't ++return until this process has finished. ++ ++When the physical address is set to a valid value the CEC adapter will ++be enabled (see the adap_enable op). When it is set to CEC_PHYS_ADDR_INVALID, ++then the CEC adapter will be disabled. If you change a valid physical address ++to another valid physical address, then this function will first set the ++address to CEC_PHYS_ADDR_INVALID before enabling the new physical address. ++ ++.. c:function:: ++ void cec_s_phys_addr_from_edid(struct cec_adapter *adap, ++ const struct edid *edid); ++ ++A helper function that extracts the physical address from the edid struct ++and calls cec_s_phys_addr() with that address, or CEC_PHYS_ADDR_INVALID ++if the EDID did not contain a physical address or edid was a NULL pointer. ++ ++.. c:function:: ++ int cec_s_log_addrs(struct cec_adapter *adap, ++ struct cec_log_addrs *log_addrs, bool block); ++ ++Claim the CEC logical addresses. Should never be called if CEC_CAP_LOG_ADDRS ++is set. If block is true, then wait until the logical addresses have been ++claimed, otherwise just queue it and return. To unconfigure all logical ++addresses call this function with log_addrs set to NULL or with ++log_addrs->num_log_addrs set to 0. The block argument is ignored when ++unconfiguring. This function will just return if the physical address is ++invalid. Once the physical address becomes valid, then the framework will ++attempt to claim these logical addresses. ++ ++CEC Pin framework ++----------------- ++ ++Most CEC hardware operates on full CEC messages where the software provides ++the message and the hardware handles the low-level CEC protocol. But some ++hardware only drives the CEC pin and software has to handle the low-level ++CEC protocol. The CEC pin framework was created to handle such devices. ++ ++Note that due to the close-to-realtime requirements it can never be guaranteed ++to work 100%. This framework uses highres timers internally, but if a ++timer goes off too late by more than 300 microseconds wrong results can ++occur. In reality it appears to be fairly reliable. ++ ++One advantage of this low-level implementation is that it can be used as ++a cheap CEC analyser, especially if interrupts can be used to detect ++CEC pin transitions from low to high or vice versa. ++ ++.. kernel-doc:: include/media/cec-pin.h ++ ++CEC Notifier framework ++---------------------- ++ ++Most drm HDMI implementations have an integrated CEC implementation and no ++notifier support is needed. But some have independent CEC implementations ++that have their own driver. This could be an IP block for an SoC or a ++completely separate chip that deals with the CEC pin. For those cases a ++drm driver can install a notifier and use the notifier to inform the ++CEC driver about changes in the physical address. ++ ++.. kernel-doc:: include/media/cec-notifier.h +diff --git a/Documentation/media/uapi/cec/cec-api.rst b/Documentation/media/uapi/cec/cec-api.rst +new file mode 100644 +index 000000000000..b68ca9c1d2e0 +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-api.rst +@@ -0,0 +1,46 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. include:: ++ ++.. _cec: ++ ++######################################### ++Part V - Consumer Electronics Control API ++######################################### ++ ++This part describes the CEC: Consumer Electronics Control ++ ++ ++.. only:: html ++ ++ .. class:: toc-title ++ ++ Table of Contents ++ ++.. toctree:: ++ :maxdepth: 5 ++ :numbered: ++ ++ cec-intro ++ cec-funcs ++ cec-header ++ ++ ++********************** ++Revision and Copyright ++********************** ++Authors: ++ ++- Verkuil, Hans ++ ++ - Initial version. ++ ++**Copyright** |copy| 2016 : Hans Verkuil ++ ++**************** ++Revision History ++**************** ++ ++:revision: 1.0.0 / 2016-03-17 (*hv*) ++ ++Initial revision +diff --git a/Documentation/media/uapi/cec/cec-func-close.rst b/Documentation/media/uapi/cec/cec-func-close.rst +new file mode 100644 +index 000000000000..334358dfa72e +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-func-close.rst +@@ -0,0 +1,47 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _cec-func-close: ++ ++*********** ++cec close() ++*********** ++ ++Name ++==== ++ ++cec-close - Close a cec device ++ ++ ++Synopsis ++======== ++ ++.. code-block:: c ++ ++ #include ++ ++ ++.. c:function:: int close( int fd ) ++ :name: cec-close ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++ ++Description ++=========== ++ ++Closes the cec device. Resources associated with the file descriptor are ++freed. The device configuration remain unchanged. ++ ++ ++Return Value ++============ ++ ++:c:func:`close() ` returns 0 on success. On error, -1 is returned, and ++``errno`` is set appropriately. Possible error codes are: ++ ++``EBADF`` ++ ``fd`` is not a valid open file descriptor. +diff --git a/Documentation/media/uapi/cec/cec-func-ioctl.rst b/Documentation/media/uapi/cec/cec-func-ioctl.rst +new file mode 100644 +index 000000000000..e2b6260b0086 +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-func-ioctl.rst +@@ -0,0 +1,66 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _cec-func-ioctl: ++ ++*********** ++cec ioctl() ++*********** ++ ++Name ++==== ++ ++cec-ioctl - Control a cec device ++ ++Synopsis ++======== ++ ++.. code-block:: c ++ ++ #include ++ ++ ++.. c:function:: int ioctl( int fd, int request, void *argp ) ++ :name: cec-ioctl ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``request`` ++ CEC ioctl request code as defined in the cec.h header file, for ++ example :ref:`CEC_ADAP_G_CAPS `. ++ ++``argp`` ++ Pointer to a request-specific structure. ++ ++ ++Description ++=========== ++ ++The :c:func:`ioctl() ` function manipulates cec device parameters. The ++argument ``fd`` must be an open file descriptor. ++ ++The ioctl ``request`` code specifies the cec function to be called. It ++has encoded in it whether the argument is an input, output or read/write ++parameter, and the size of the argument ``argp`` in bytes. ++ ++Macros and structures definitions specifying cec ioctl requests and ++their parameters are located in the cec.h header file. All cec ioctl ++requests, their respective function and parameters are specified in ++:ref:`cec-user-func`. ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. ++ ++Request-specific error codes are listed in the individual requests ++descriptions. ++ ++When an ioctl that takes an output or read/write parameter fails, the ++parameter remains unmodified. +diff --git a/Documentation/media/uapi/cec/cec-func-open.rst b/Documentation/media/uapi/cec/cec-func-open.rst +new file mode 100644 +index 000000000000..5d6663a649bd +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-func-open.rst +@@ -0,0 +1,78 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _cec-func-open: ++ ++********** ++cec open() ++********** ++ ++Name ++==== ++ ++cec-open - Open a cec device ++ ++Synopsis ++======== ++ ++.. code-block:: c ++ ++ #include ++ ++ ++.. c:function:: int open( const char *device_name, int flags ) ++ :name: cec-open ++ ++ ++Arguments ++========= ++ ++``device_name`` ++ Device to be opened. ++ ++``flags`` ++ Open flags. Access mode must be ``O_RDWR``. ++ ++ When the ``O_NONBLOCK`` flag is given, the ++ :ref:`CEC_RECEIVE ` and :ref:`CEC_DQEVENT ` ioctls ++ will return the ``EAGAIN`` error code when no message or event is available, and ++ ioctls :ref:`CEC_TRANSMIT `, ++ :ref:`CEC_ADAP_S_PHYS_ADDR ` and ++ :ref:`CEC_ADAP_S_LOG_ADDRS ` ++ all return 0. ++ ++ Other flags have no effect. ++ ++ ++Description ++=========== ++ ++To open a cec device applications call :c:func:`open() ` with the ++desired device name. The function has no side effects; the device ++configuration remain unchanged. ++ ++When the device is opened in read-only mode, attempts to modify its ++configuration will result in an error, and ``errno`` will be set to ++EBADF. ++ ++ ++Return Value ++============ ++ ++:c:func:`open() ` returns the new file descriptor on success. On error, ++-1 is returned, and ``errno`` is set appropriately. Possible error codes ++include: ++ ++``EACCES`` ++ The requested access to the file is not allowed. ++ ++``EMFILE`` ++ The process already has the maximum number of files open. ++ ++``ENFILE`` ++ The system limit on the total number of open files has been reached. ++ ++``ENOMEM`` ++ Insufficient kernel memory was available. ++ ++``ENXIO`` ++ No device corresponding to this device special file exists. +diff --git a/Documentation/media/uapi/cec/cec-func-poll.rst b/Documentation/media/uapi/cec/cec-func-poll.rst +new file mode 100644 +index 000000000000..d49f1ee0742d +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-func-poll.rst +@@ -0,0 +1,77 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _cec-func-poll: ++ ++********** ++cec poll() ++********** ++ ++Name ++==== ++ ++cec-poll - Wait for some event on a file descriptor ++ ++ ++Synopsis ++======== ++ ++.. code-block:: c ++ ++ #include ++ ++ ++.. c:function:: int poll( struct pollfd *ufds, unsigned int nfds, int timeout ) ++ :name: cec-poll ++ ++Arguments ++========= ++ ++``ufds`` ++ List of FD events to be watched ++ ++``nfds`` ++ Number of FD events at the \*ufds array ++ ++``timeout`` ++ Timeout to wait for events ++ ++ ++Description ++=========== ++ ++With the :c:func:`poll() ` function applications can wait for CEC ++events. ++ ++On success :c:func:`poll() ` returns the number of file descriptors ++that have been selected (that is, file descriptors for which the ++``revents`` field of the respective struct :c:type:`pollfd` ++is non-zero). CEC devices set the ``POLLIN`` and ``POLLRDNORM`` flags in ++the ``revents`` field if there are messages in the receive queue. If the ++transmit queue has room for new messages, the ``POLLOUT`` and ++``POLLWRNORM`` flags are set. If there are events in the event queue, ++then the ``POLLPRI`` flag is set. When the function times out it returns ++a value of zero, on failure it returns -1 and the ``errno`` variable is ++set appropriately. ++ ++For more details see the :c:func:`poll() ` manual page. ++ ++ ++Return Value ++============ ++ ++On success, :c:func:`poll() ` returns the number structures which have ++non-zero ``revents`` fields, or zero if the call timed out. On error -1 ++is returned, and the ``errno`` variable is set appropriately: ++ ++``EBADF`` ++ One or more of the ``ufds`` members specify an invalid file ++ descriptor. ++ ++``EFAULT`` ++ ``ufds`` references an inaccessible memory area. ++ ++``EINTR`` ++ The call was interrupted by a signal. ++ ++``EINVAL`` ++ The ``nfds`` argument is greater than ``OPEN_MAX``. +diff --git a/Documentation/media/uapi/cec/cec-funcs.rst b/Documentation/media/uapi/cec/cec-funcs.rst +new file mode 100644 +index 000000000000..6d696cead5cb +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-funcs.rst +@@ -0,0 +1,20 @@ ++.. _cec-user-func: ++ ++****************** ++Function Reference ++****************** ++ ++ ++.. toctree:: ++ :maxdepth: 1 ++ ++ cec-func-open ++ cec-func-close ++ cec-func-ioctl ++ cec-func-poll ++ cec-ioc-adap-g-caps ++ cec-ioc-adap-g-log-addrs ++ cec-ioc-adap-g-phys-addr ++ cec-ioc-dqevent ++ cec-ioc-g-mode ++ cec-ioc-receive +diff --git a/Documentation/media/uapi/cec/cec-header.rst b/Documentation/media/uapi/cec/cec-header.rst +new file mode 100644 +index 000000000000..d5a9a2828274 +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-header.rst +@@ -0,0 +1,10 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _cec_header: ++ ++*************** ++CEC Header File ++*************** ++ ++.. kernel-include:: $BUILDDIR/cec.h.rst ++ +diff --git a/Documentation/media/uapi/cec/cec-intro.rst b/Documentation/media/uapi/cec/cec-intro.rst +new file mode 100644 +index 000000000000..07ee2b8f89d6 +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-intro.rst +@@ -0,0 +1,40 @@ ++.. _cec-intro: ++ ++Introduction ++============ ++ ++HDMI connectors provide a single pin for use by the Consumer Electronics ++Control protocol. This protocol allows different devices connected by an ++HDMI cable to communicate. The protocol for CEC version 1.4 is defined ++in supplements 1 (CEC) and 2 (HEAC or HDMI Ethernet and Audio Return ++Channel) of the HDMI 1.4a (:ref:`hdmi`) specification and the ++extensions added to CEC version 2.0 are defined in chapter 11 of the ++HDMI 2.0 (:ref:`hdmi2`) specification. ++ ++The bitrate is very slow (effectively no more than 36 bytes per second) ++and is based on the ancient AV.link protocol used in old SCART ++connectors. The protocol closely resembles a crazy Rube Goldberg ++contraption and is an unholy mix of low and high level messages. Some ++messages, especially those part of the HEAC protocol layered on top of ++CEC, need to be handled by the kernel, others can be handled either by ++the kernel or by userspace. ++ ++In addition, CEC can be implemented in HDMI receivers, transmitters and ++in USB devices that have an HDMI input and an HDMI output and that ++control just the CEC pin. ++ ++Drivers that support CEC will create a CEC device node (/dev/cecX) to ++give userspace access to the CEC adapter. The ++:ref:`CEC_ADAP_G_CAPS` ioctl will tell userspace what it is allowed to do. ++ ++In order to check the support and test it, it is suggested to download ++the `v4l-utils `_ package. It ++provides three tools to handle CEC: ++ ++- cec-ctl: the Swiss army knife of CEC. Allows you to configure, transmit ++ and monitor CEC messages. ++ ++- cec-compliance: does a CEC compliance test of a remote CEC device to ++ determine how compliant the CEC implementation is. ++ ++- cec-follower: emulates a CEC follower. +diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst b/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst +new file mode 100644 +index 000000000000..6c1f6efb822e +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst +@@ -0,0 +1,139 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _CEC_ADAP_G_CAPS: ++ ++********************* ++ioctl CEC_ADAP_G_CAPS ++********************* ++ ++Name ++==== ++ ++CEC_ADAP_G_CAPS - Query device capabilities ++ ++Synopsis ++======== ++ ++.. c:function:: int ioctl( int fd, CEC_ADAP_G_CAPS, struct cec_caps *argp ) ++ :name: CEC_ADAP_G_CAPS ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``argp`` ++ ++ ++Description ++=========== ++ ++All cec devices must support :ref:`ioctl CEC_ADAP_G_CAPS `. To query ++device information, applications call the ioctl with a pointer to a ++struct :c:type:`cec_caps`. The driver fills the structure and ++returns the information to the application. The ioctl never fails. ++ ++.. tabularcolumns:: |p{1.2cm}|p{2.5cm}|p{13.8cm}| ++ ++.. c:type:: cec_caps ++ ++.. flat-table:: struct cec_caps ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 16 ++ ++ * - char ++ - ``driver[32]`` ++ - The name of the cec adapter driver. ++ * - char ++ - ``name[32]`` ++ - The name of this CEC adapter. The combination ``driver`` and ++ ``name`` must be unique. ++ * - __u32 ++ - ``capabilities`` ++ - The capabilities of the CEC adapter, see ++ :ref:`cec-capabilities`. ++ * - __u32 ++ - ``version`` ++ - CEC Framework API version, formatted with the ``KERNEL_VERSION()`` ++ macro. ++ ++ ++.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}| ++ ++.. _cec-capabilities: ++ ++.. flat-table:: CEC Capabilities Flags ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 8 ++ ++ * .. _`CEC-CAP-PHYS-ADDR`: ++ ++ - ``CEC_CAP_PHYS_ADDR`` ++ - 0x00000001 ++ - Userspace has to configure the physical address by calling ++ :ref:`ioctl CEC_ADAP_S_PHYS_ADDR `. If ++ this capability isn't set, then setting the physical address is ++ handled by the kernel whenever the EDID is set (for an HDMI ++ receiver) or read (for an HDMI transmitter). ++ * .. _`CEC-CAP-LOG-ADDRS`: ++ ++ - ``CEC_CAP_LOG_ADDRS`` ++ - 0x00000002 ++ - Userspace has to configure the logical addresses by calling ++ :ref:`ioctl CEC_ADAP_S_LOG_ADDRS `. If ++ this capability isn't set, then the kernel will have configured ++ this. ++ * .. _`CEC-CAP-TRANSMIT`: ++ ++ - ``CEC_CAP_TRANSMIT`` ++ - 0x00000004 ++ - Userspace can transmit CEC messages by calling ++ :ref:`ioctl CEC_TRANSMIT `. This implies that ++ userspace can be a follower as well, since being able to transmit ++ messages is a prerequisite of becoming a follower. If this ++ capability isn't set, then the kernel will handle all CEC ++ transmits and process all CEC messages it receives. ++ * .. _`CEC-CAP-PASSTHROUGH`: ++ ++ - ``CEC_CAP_PASSTHROUGH`` ++ - 0x00000008 ++ - Userspace can use the passthrough mode by calling ++ :ref:`ioctl CEC_S_MODE `. ++ * .. _`CEC-CAP-RC`: ++ ++ - ``CEC_CAP_RC`` ++ - 0x00000010 ++ - This adapter supports the remote control protocol. ++ * .. _`CEC-CAP-MONITOR-ALL`: ++ ++ - ``CEC_CAP_MONITOR_ALL`` ++ - 0x00000020 ++ - The CEC hardware can monitor all messages, not just directed and ++ broadcast messages. ++ * .. _`CEC-CAP-NEEDS-HPD`: ++ ++ - ``CEC_CAP_NEEDS_HPD`` ++ - 0x00000040 ++ - The CEC hardware is only active if the HDMI Hotplug Detect pin is ++ high. This makes it impossible to use CEC to wake up displays that ++ set the HPD pin low when in standby mode, but keep the CEC bus ++ alive. ++ * .. _`CEC-CAP-MONITOR-PIN`: ++ ++ - ``CEC_CAP_MONITOR_PIN`` ++ - 0x00000080 ++ - The CEC hardware can monitor CEC pin changes from low to high voltage ++ and vice versa. When in pin monitoring mode the application will ++ receive ``CEC_EVENT_PIN_CEC_LOW`` and ``CEC_EVENT_PIN_CEC_HIGH`` events. ++ ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. +diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst b/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst +new file mode 100644 +index 000000000000..84f431a022ad +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst +@@ -0,0 +1,371 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _CEC_ADAP_LOG_ADDRS: ++.. _CEC_ADAP_G_LOG_ADDRS: ++.. _CEC_ADAP_S_LOG_ADDRS: ++ ++**************************************************** ++ioctls CEC_ADAP_G_LOG_ADDRS and CEC_ADAP_S_LOG_ADDRS ++**************************************************** ++ ++Name ++==== ++ ++CEC_ADAP_G_LOG_ADDRS, CEC_ADAP_S_LOG_ADDRS - Get or set the logical addresses ++ ++ ++Synopsis ++======== ++ ++.. c:function:: int ioctl( int fd, CEC_ADAP_G_LOG_ADDRS, struct cec_log_addrs *argp ) ++ :name: CEC_ADAP_G_LOG_ADDRS ++ ++.. c:function:: int ioctl( int fd, CEC_ADAP_S_LOG_ADDRS, struct cec_log_addrs *argp ) ++ :name: CEC_ADAP_S_LOG_ADDRS ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``argp`` ++ Pointer to struct :c:type:`cec_log_addrs`. ++ ++Description ++=========== ++ ++To query the current CEC logical addresses, applications call ++:ref:`ioctl CEC_ADAP_G_LOG_ADDRS ` with a pointer to a ++struct :c:type:`cec_log_addrs` where the driver stores the logical addresses. ++ ++To set new logical addresses, applications fill in ++struct :c:type:`cec_log_addrs` and call :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` ++with a pointer to this struct. The :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` ++is only available if ``CEC_CAP_LOG_ADDRS`` is set (the ``ENOTTY`` error code is ++returned otherwise). The :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` ++can only be called by a file descriptor in initiator mode (see :ref:`CEC_S_MODE`), if not ++the ``EBUSY`` error code will be returned. ++ ++To clear existing logical addresses set ``num_log_addrs`` to 0. All other fields ++will be ignored in that case. The adapter will go to the unconfigured state and the ++``cec_version``, ``vendor_id`` and ``osd_name`` fields are all reset to their default ++values (CEC version 2.0, no vendor ID and an empty OSD name). ++ ++If the physical address is valid (see :ref:`ioctl CEC_ADAP_S_PHYS_ADDR `), ++then this ioctl will block until all requested logical ++addresses have been claimed. If the file descriptor is in non-blocking mode then it will ++not wait for the logical addresses to be claimed, instead it just returns 0. ++ ++A :ref:`CEC_EVENT_STATE_CHANGE ` event is sent when the ++logical addresses are claimed or cleared. ++ ++Attempting to call :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` when ++logical address types are already defined will return with error ``EBUSY``. ++ ++.. c:type:: cec_log_addrs ++ ++.. tabularcolumns:: |p{1.0cm}|p{8.0cm}|p{7.5cm}| ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct cec_log_addrs ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 16 ++ ++ * - __u8 ++ - ``log_addr[CEC_MAX_LOG_ADDRS]`` ++ - The actual logical addresses that were claimed. This is set by the ++ driver. If no logical address could be claimed, then it is set to ++ ``CEC_LOG_ADDR_INVALID``. If this adapter is Unregistered, then ++ ``log_addr[0]`` is set to 0xf and all others to ++ ``CEC_LOG_ADDR_INVALID``. ++ * - __u16 ++ - ``log_addr_mask`` ++ - The bitmask of all logical addresses this adapter has claimed. If ++ this adapter is Unregistered then ``log_addr_mask`` sets bit 15 ++ and clears all other bits. If this adapter is not configured at ++ all, then ``log_addr_mask`` is set to 0. Set by the driver. ++ * - __u8 ++ - ``cec_version`` ++ - The CEC version that this adapter shall use. See ++ :ref:`cec-versions`. Used to implement the ++ ``CEC_MSG_CEC_VERSION`` and ``CEC_MSG_REPORT_FEATURES`` messages. ++ Note that :ref:`CEC_OP_CEC_VERSION_1_3A ` is not allowed by the CEC ++ framework. ++ * - __u8 ++ - ``num_log_addrs`` ++ - Number of logical addresses to set up. Must be ≤ ++ ``available_log_addrs`` as returned by ++ :ref:`CEC_ADAP_G_CAPS`. All arrays in ++ this structure are only filled up to index ++ ``available_log_addrs``-1. The remaining array elements will be ++ ignored. Note that the CEC 2.0 standard allows for a maximum of 2 ++ logical addresses, although some hardware has support for more. ++ ``CEC_MAX_LOG_ADDRS`` is 4. The driver will return the actual ++ number of logical addresses it could claim, which may be less than ++ what was requested. If this field is set to 0, then the CEC ++ adapter shall clear all claimed logical addresses and all other ++ fields will be ignored. ++ * - __u32 ++ - ``vendor_id`` ++ - The vendor ID is a 24-bit number that identifies the specific ++ vendor or entity. Based on this ID vendor specific commands may be ++ defined. If you do not want a vendor ID then set it to ++ ``CEC_VENDOR_ID_NONE``. ++ * - __u32 ++ - ``flags`` ++ - Flags. See :ref:`cec-log-addrs-flags` for a list of available flags. ++ * - char ++ - ``osd_name[15]`` ++ - The On-Screen Display name as is returned by the ++ ``CEC_MSG_SET_OSD_NAME`` message. ++ * - __u8 ++ - ``primary_device_type[CEC_MAX_LOG_ADDRS]`` ++ - Primary device type for each logical address. See ++ :ref:`cec-prim-dev-types` for possible types. ++ * - __u8 ++ - ``log_addr_type[CEC_MAX_LOG_ADDRS]`` ++ - Logical address types. See :ref:`cec-log-addr-types` for ++ possible types. The driver will update this with the actual ++ logical address type that it claimed (e.g. it may have to fallback ++ to :ref:`CEC_LOG_ADDR_TYPE_UNREGISTERED `). ++ * - __u8 ++ - ``all_device_types[CEC_MAX_LOG_ADDRS]`` ++ - CEC 2.0 specific: the bit mask of all device types. See ++ :ref:`cec-all-dev-types-flags`. It is used in the CEC 2.0 ++ ``CEC_MSG_REPORT_FEATURES`` message. For CEC 1.4 you can either leave ++ this field to 0, or fill it in according to the CEC 2.0 guidelines to ++ give the CEC framework more information about the device type, even ++ though the framework won't use it directly in the CEC message. ++ * - __u8 ++ - ``features[CEC_MAX_LOG_ADDRS][12]`` ++ - Features for each logical address. It is used in the CEC 2.0 ++ ``CEC_MSG_REPORT_FEATURES`` message. The 12 bytes include both the ++ RC Profile and the Device Features. For CEC 1.4 you can either leave ++ this field to all 0, or fill it in according to the CEC 2.0 guidelines to ++ give the CEC framework more information about the device type, even ++ though the framework won't use it directly in the CEC message. ++ ++ ++.. tabularcolumns:: |p{7.8cm}|p{1.0cm}|p{8.7cm}| ++ ++.. _cec-log-addrs-flags: ++ ++.. flat-table:: Flags for struct cec_log_addrs ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 4 ++ ++ * .. _`CEC-LOG-ADDRS-FL-ALLOW-UNREG-FALLBACK`: ++ ++ - ``CEC_LOG_ADDRS_FL_ALLOW_UNREG_FALLBACK`` ++ - 1 ++ - By default if no logical address of the requested type can be claimed, then ++ it will go back to the unconfigured state. If this flag is set, then it will ++ fallback to the Unregistered logical address. Note that if the Unregistered ++ logical address was explicitly requested, then this flag has no effect. ++ * .. _`CEC-LOG-ADDRS-FL-ALLOW-RC-PASSTHRU`: ++ ++ - ``CEC_LOG_ADDRS_FL_ALLOW_RC_PASSTHRU`` ++ - 2 ++ - By default the ``CEC_MSG_USER_CONTROL_PRESSED`` and ``CEC_MSG_USER_CONTROL_RELEASED`` ++ messages are only passed on to the follower(s), if any. If this flag is set, ++ then these messages are also passed on to the remote control input subsystem ++ and will appear as keystrokes. This features needs to be enabled explicitly. ++ If CEC is used to enter e.g. passwords, then you may not want to enable this ++ to avoid trivial snooping of the keystrokes. ++ * .. _`CEC-LOG-ADDRS-FL-CDC-ONLY`: ++ ++ - ``CEC_LOG_ADDRS_FL_CDC_ONLY`` ++ - 4 ++ - If this flag is set, then the device is CDC-Only. CDC-Only CEC devices ++ are CEC devices that can only handle CDC messages. ++ ++ All other messages are ignored. ++ ++ ++.. tabularcolumns:: |p{7.8cm}|p{1.0cm}|p{8.7cm}| ++ ++.. _cec-versions: ++ ++.. flat-table:: CEC Versions ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 4 ++ ++ * .. _`CEC-OP-CEC-VERSION-1-3A`: ++ ++ - ``CEC_OP_CEC_VERSION_1_3A`` ++ - 4 ++ - CEC version according to the HDMI 1.3a standard. ++ * .. _`CEC-OP-CEC-VERSION-1-4B`: ++ ++ - ``CEC_OP_CEC_VERSION_1_4B`` ++ - 5 ++ - CEC version according to the HDMI 1.4b standard. ++ * .. _`CEC-OP-CEC-VERSION-2-0`: ++ ++ - ``CEC_OP_CEC_VERSION_2_0`` ++ - 6 ++ - CEC version according to the HDMI 2.0 standard. ++ ++ ++.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| ++ ++.. _cec-prim-dev-types: ++ ++.. flat-table:: CEC Primary Device Types ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 4 ++ ++ * .. _`CEC-OP-PRIM-DEVTYPE-TV`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_TV`` ++ - 0 ++ - Use for a TV. ++ * .. _`CEC-OP-PRIM-DEVTYPE-RECORD`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_RECORD`` ++ - 1 ++ - Use for a recording device. ++ * .. _`CEC-OP-PRIM-DEVTYPE-TUNER`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_TUNER`` ++ - 3 ++ - Use for a device with a tuner. ++ * .. _`CEC-OP-PRIM-DEVTYPE-PLAYBACK`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_PLAYBACK`` ++ - 4 ++ - Use for a playback device. ++ * .. _`CEC-OP-PRIM-DEVTYPE-AUDIOSYSTEM`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM`` ++ - 5 ++ - Use for an audio system (e.g. an audio/video receiver). ++ * .. _`CEC-OP-PRIM-DEVTYPE-SWITCH`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_SWITCH`` ++ - 6 ++ - Use for a CEC switch. ++ * .. _`CEC-OP-PRIM-DEVTYPE-VIDEOPROC`: ++ ++ - ``CEC_OP_PRIM_DEVTYPE_VIDEOPROC`` ++ - 7 ++ - Use for a video processor device. ++ ++ ++.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| ++ ++.. _cec-log-addr-types: ++ ++.. flat-table:: CEC Logical Address Types ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 16 ++ ++ * .. _`CEC-LOG-ADDR-TYPE-TV`: ++ ++ - ``CEC_LOG_ADDR_TYPE_TV`` ++ - 0 ++ - Use for a TV. ++ * .. _`CEC-LOG-ADDR-TYPE-RECORD`: ++ ++ - ``CEC_LOG_ADDR_TYPE_RECORD`` ++ - 1 ++ - Use for a recording device. ++ * .. _`CEC-LOG-ADDR-TYPE-TUNER`: ++ ++ - ``CEC_LOG_ADDR_TYPE_TUNER`` ++ - 2 ++ - Use for a tuner device. ++ * .. _`CEC-LOG-ADDR-TYPE-PLAYBACK`: ++ ++ - ``CEC_LOG_ADDR_TYPE_PLAYBACK`` ++ - 3 ++ - Use for a playback device. ++ * .. _`CEC-LOG-ADDR-TYPE-AUDIOSYSTEM`: ++ ++ - ``CEC_LOG_ADDR_TYPE_AUDIOSYSTEM`` ++ - 4 ++ - Use for an audio system device. ++ * .. _`CEC-LOG-ADDR-TYPE-SPECIFIC`: ++ ++ - ``CEC_LOG_ADDR_TYPE_SPECIFIC`` ++ - 5 ++ - Use for a second TV or for a video processor device. ++ * .. _`CEC-LOG-ADDR-TYPE-UNREGISTERED`: ++ ++ - ``CEC_LOG_ADDR_TYPE_UNREGISTERED`` ++ - 6 ++ - Use this if you just want to remain unregistered. Used for pure ++ CEC switches or CDC-only devices (CDC: Capability Discovery and ++ Control). ++ ++ ++ ++.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| ++ ++.. _cec-all-dev-types-flags: ++ ++.. flat-table:: CEC All Device Types Flags ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 4 ++ ++ * .. _`CEC-OP-ALL-DEVTYPE-TV`: ++ ++ - ``CEC_OP_ALL_DEVTYPE_TV`` ++ - 0x80 ++ - This supports the TV type. ++ * .. _`CEC-OP-ALL-DEVTYPE-RECORD`: ++ ++ - ``CEC_OP_ALL_DEVTYPE_RECORD`` ++ - 0x40 ++ - This supports the Recording type. ++ * .. _`CEC-OP-ALL-DEVTYPE-TUNER`: ++ ++ - ``CEC_OP_ALL_DEVTYPE_TUNER`` ++ - 0x20 ++ - This supports the Tuner type. ++ * .. _`CEC-OP-ALL-DEVTYPE-PLAYBACK`: ++ ++ - ``CEC_OP_ALL_DEVTYPE_PLAYBACK`` ++ - 0x10 ++ - This supports the Playback type. ++ * .. _`CEC-OP-ALL-DEVTYPE-AUDIOSYSTEM`: ++ ++ - ``CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM`` ++ - 0x08 ++ - This supports the Audio System type. ++ * .. _`CEC-OP-ALL-DEVTYPE-SWITCH`: ++ ++ - ``CEC_OP_ALL_DEVTYPE_SWITCH`` ++ - 0x04 ++ - This supports the CEC Switch or Video Processing type. ++ ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. ++ ++The :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` can return the following ++error codes: ++ ++ENOTTY ++ The ``CEC_CAP_LOG_ADDRS`` capability wasn't set, so this ioctl is not supported. ++ ++EBUSY ++ The CEC adapter is currently configuring itself, or it is already configured and ++ ``num_log_addrs`` is non-zero, or another filehandle is in exclusive follower or ++ initiator mode, or the filehandle is in mode ``CEC_MODE_NO_INITIATOR``. ++ ++EINVAL ++ The contents of struct :c:type:`cec_log_addrs` is invalid. +diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst b/Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst +new file mode 100644 +index 000000000000..9e49d4be35d5 +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst +@@ -0,0 +1,93 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _CEC_ADAP_PHYS_ADDR: ++.. _CEC_ADAP_G_PHYS_ADDR: ++.. _CEC_ADAP_S_PHYS_ADDR: ++ ++**************************************************** ++ioctls CEC_ADAP_G_PHYS_ADDR and CEC_ADAP_S_PHYS_ADDR ++**************************************************** ++ ++Name ++==== ++ ++CEC_ADAP_G_PHYS_ADDR, CEC_ADAP_S_PHYS_ADDR - Get or set the physical address ++ ++ ++Synopsis ++======== ++ ++.. c:function:: int ioctl( int fd, CEC_ADAP_G_PHYS_ADDR, __u16 *argp ) ++ :name: CEC_ADAP_G_PHYS_ADDR ++ ++.. c:function:: int ioctl( int fd, CEC_ADAP_S_PHYS_ADDR, __u16 *argp ) ++ :name: CEC_ADAP_S_PHYS_ADDR ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``argp`` ++ Pointer to the CEC address. ++ ++Description ++=========== ++ ++To query the current physical address applications call ++:ref:`ioctl CEC_ADAP_G_PHYS_ADDR ` with a pointer to a __u16 where the ++driver stores the physical address. ++ ++To set a new physical address applications store the physical address in ++a __u16 and call :ref:`ioctl CEC_ADAP_S_PHYS_ADDR ` with a pointer to ++this integer. The :ref:`ioctl CEC_ADAP_S_PHYS_ADDR ` is only available if ++``CEC_CAP_PHYS_ADDR`` is set (the ``ENOTTY`` error code will be returned ++otherwise). The :ref:`ioctl CEC_ADAP_S_PHYS_ADDR ` can only be called ++by a file descriptor in initiator mode (see :ref:`CEC_S_MODE`), if not ++the ``EBUSY`` error code will be returned. ++ ++To clear an existing physical address use ``CEC_PHYS_ADDR_INVALID``. ++The adapter will go to the unconfigured state. ++ ++If logical address types have been defined (see :ref:`ioctl CEC_ADAP_S_LOG_ADDRS `), ++then this ioctl will block until all ++requested logical addresses have been claimed. If the file descriptor is in non-blocking mode ++then it will not wait for the logical addresses to be claimed, instead it just returns 0. ++ ++A :ref:`CEC_EVENT_STATE_CHANGE ` event is sent when the physical address ++changes. ++ ++The physical address is a 16-bit number where each group of 4 bits ++represent a digit of the physical address a.b.c.d where the most ++significant 4 bits represent 'a'. The CEC root device (usually the TV) ++has address 0.0.0.0. Every device that is hooked up to an input of the ++TV has address a.0.0.0 (where 'a' is ≥ 1), devices hooked up to those in ++turn have addresses a.b.0.0, etc. So a topology of up to 5 devices deep ++is supported. The physical address a device shall use is stored in the ++EDID of the sink. ++ ++For example, the EDID for each HDMI input of the TV will have a ++different physical address of the form a.0.0.0 that the sources will ++read out and use as their physical address. ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. ++ ++The :ref:`ioctl CEC_ADAP_S_PHYS_ADDR ` can return the following ++error codes: ++ ++ENOTTY ++ The ``CEC_CAP_PHYS_ADDR`` capability wasn't set, so this ioctl is not supported. ++ ++EBUSY ++ Another filehandle is in exclusive follower or initiator mode, or the filehandle ++ is in mode ``CEC_MODE_NO_INITIATOR``. ++ ++EINVAL ++ The physical address is malformed. +diff --git a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst b/Documentation/media/uapi/cec/cec-ioc-dqevent.rst +new file mode 100644 +index 000000000000..b6fd86424fbb +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-ioc-dqevent.rst +@@ -0,0 +1,226 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _CEC_DQEVENT: ++ ++***************** ++ioctl CEC_DQEVENT ++***************** ++ ++Name ++==== ++ ++CEC_DQEVENT - Dequeue a CEC event ++ ++ ++Synopsis ++======== ++ ++.. c:function:: int ioctl( int fd, CEC_DQEVENT, struct cec_event *argp ) ++ :name: CEC_DQEVENT ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``argp`` ++ ++ ++Description ++=========== ++ ++CEC devices can send asynchronous events. These can be retrieved by ++calling :c:func:`CEC_DQEVENT`. If the file descriptor is in ++non-blocking mode and no event is pending, then it will return -1 and ++set errno to the ``EAGAIN`` error code. ++ ++The internal event queues are per-filehandle and per-event type. If ++there is no more room in a queue then the last event is overwritten with ++the new one. This means that intermediate results can be thrown away but ++that the latest event is always available. This also means that is it ++possible to read two successive events that have the same value (e.g. ++two :ref:`CEC_EVENT_STATE_CHANGE ` events with ++the same state). In that case the intermediate state changes were lost but ++it is guaranteed that the state did change in between the two events. ++ ++.. tabularcolumns:: |p{1.2cm}|p{2.9cm}|p{13.4cm}| ++ ++.. c:type:: cec_event_state_change ++ ++.. flat-table:: struct cec_event_state_change ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 8 ++ ++ * - __u16 ++ - ``phys_addr`` ++ - The current physical address. This is ``CEC_PHYS_ADDR_INVALID`` if no ++ valid physical address is set. ++ * - __u16 ++ - ``log_addr_mask`` ++ - The current set of claimed logical addresses. This is 0 if no logical ++ addresses are claimed or if ``phys_addr`` is ``CEC_PHYS_ADDR_INVALID``. ++ If bit 15 is set (``1 << CEC_LOG_ADDR_UNREGISTERED``) then this device ++ has the unregistered logical address. In that case all other bits are 0. ++ ++ ++.. c:type:: cec_event_lost_msgs ++ ++.. tabularcolumns:: |p{1.0cm}|p{2.0cm}|p{14.5cm}| ++ ++.. flat-table:: struct cec_event_lost_msgs ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 16 ++ ++ * - __u32 ++ - ``lost_msgs`` ++ - Set to the number of lost messages since the filehandle was opened ++ or since the last time this event was dequeued for this ++ filehandle. The messages lost are the oldest messages. So when a ++ new message arrives and there is no more room, then the oldest ++ message is discarded to make room for the new one. The internal ++ size of the message queue guarantees that all messages received in ++ the last two seconds will be stored. Since messages should be ++ replied to within a second according to the CEC specification, ++ this is more than enough. ++ ++ ++.. tabularcolumns:: |p{1.0cm}|p{4.4cm}|p{2.5cm}|p{9.6cm}| ++ ++.. c:type:: cec_event ++ ++.. flat-table:: struct cec_event ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 1 8 ++ ++ * - __u64 ++ - ``ts`` ++ - :cspan:`1`\ Timestamp of the event in ns. ++ ++ The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. ++ ++ To access the same clock from userspace use :c:func:`clock_gettime`. ++ * - __u32 ++ - ``event`` ++ - :cspan:`1` The CEC event type, see :ref:`cec-events`. ++ * - __u32 ++ - ``flags`` ++ - :cspan:`1` Event flags, see :ref:`cec-event-flags`. ++ * - union ++ - (anonymous) ++ - ++ - ++ * - ++ - struct cec_event_state_change ++ - ``state_change`` ++ - The new adapter state as sent by the :ref:`CEC_EVENT_STATE_CHANGE ` ++ event. ++ * - ++ - struct cec_event_lost_msgs ++ - ``lost_msgs`` ++ - The number of lost messages as sent by the :ref:`CEC_EVENT_LOST_MSGS ` ++ event. ++ ++ ++.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| ++ ++.. _cec-events: ++ ++.. flat-table:: CEC Events Types ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 16 ++ ++ * .. _`CEC-EVENT-STATE-CHANGE`: ++ ++ - ``CEC_EVENT_STATE_CHANGE`` ++ - 1 ++ - Generated when the CEC Adapter's state changes. When open() is ++ called an initial event will be generated for that filehandle with ++ the CEC Adapter's state at that time. ++ * .. _`CEC-EVENT-LOST-MSGS`: ++ ++ - ``CEC_EVENT_LOST_MSGS`` ++ - 2 ++ - Generated if one or more CEC messages were lost because the ++ application didn't dequeue CEC messages fast enough. ++ * .. _`CEC-EVENT-PIN-CEC-LOW`: ++ ++ - ``CEC_EVENT_PIN_CEC_LOW`` ++ - 3 ++ - Generated if the CEC pin goes from a high voltage to a low voltage. ++ Only applies to adapters that have the ``CEC_CAP_MONITOR_PIN`` ++ capability set. ++ * .. _`CEC-EVENT-PIN-CEC-HIGH`: ++ ++ - ``CEC_EVENT_PIN_CEC_HIGH`` ++ - 4 ++ - Generated if the CEC pin goes from a low voltage to a high voltage. ++ Only applies to adapters that have the ``CEC_CAP_MONITOR_PIN`` ++ capability set. ++ * .. _`CEC-EVENT-PIN-HPD-LOW`: ++ ++ - ``CEC_EVENT_PIN_HPD_LOW`` ++ - 5 ++ - Generated if the HPD pin goes from a high voltage to a low voltage. ++ Only applies to adapters that have the ``CEC_CAP_MONITOR_PIN`` ++ capability set. When open() is called, the HPD pin can be read and ++ if the HPD is low, then an initial event will be generated for that ++ filehandle. ++ * .. _`CEC-EVENT-PIN-HPD-HIGH`: ++ ++ - ``CEC_EVENT_PIN_HPD_HIGH`` ++ - 6 ++ - Generated if the HPD pin goes from a low voltage to a high voltage. ++ Only applies to adapters that have the ``CEC_CAP_MONITOR_PIN`` ++ capability set. When open() is called, the HPD pin can be read and ++ if the HPD is high, then an initial event will be generated for that ++ filehandle. ++ ++ ++.. tabularcolumns:: |p{6.0cm}|p{0.6cm}|p{10.9cm}| ++ ++.. _cec-event-flags: ++ ++.. flat-table:: CEC Event Flags ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 8 ++ ++ * .. _`CEC-EVENT-FL-INITIAL-STATE`: ++ ++ - ``CEC_EVENT_FL_INITIAL_STATE`` ++ - 1 ++ - Set for the initial events that are generated when the device is ++ opened. See the table above for which events do this. This allows ++ applications to learn the initial state of the CEC adapter at ++ open() time. ++ * .. _`CEC-EVENT-FL-DROPPED-EVENTS`: ++ ++ - ``CEC_EVENT_FL_DROPPED_EVENTS`` ++ - 2 ++ - Set if one or more events of the given event type have been dropped. ++ This is an indication that the application cannot keep up. ++ ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. ++ ++The :ref:`ioctl CEC_DQEVENT ` can return the following ++error codes: ++ ++EAGAIN ++ This is returned when the filehandle is in non-blocking mode and there ++ are no pending events. ++ ++ERESTARTSYS ++ An interrupt (e.g. Ctrl-C) arrived while in blocking mode waiting for ++ events to arrive. +diff --git a/Documentation/media/uapi/cec/cec-ioc-g-mode.rst b/Documentation/media/uapi/cec/cec-ioc-g-mode.rst +new file mode 100644 +index 000000000000..508e2e325683 +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-ioc-g-mode.rst +@@ -0,0 +1,293 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _CEC_MODE: ++.. _CEC_G_MODE: ++.. _CEC_S_MODE: ++ ++******************************** ++ioctls CEC_G_MODE and CEC_S_MODE ++******************************** ++ ++CEC_G_MODE, CEC_S_MODE - Get or set exclusive use of the CEC adapter ++ ++Synopsis ++======== ++ ++.. c:function:: int ioctl( int fd, CEC_G_MODE, __u32 *argp ) ++ :name: CEC_G_MODE ++ ++.. c:function:: int ioctl( int fd, CEC_S_MODE, __u32 *argp ) ++ :name: CEC_S_MODE ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``argp`` ++ Pointer to CEC mode. ++ ++Description ++=========== ++ ++By default any filehandle can use :ref:`CEC_TRANSMIT`, but in order to prevent ++applications from stepping on each others toes it must be possible to ++obtain exclusive access to the CEC adapter. This ioctl sets the ++filehandle to initiator and/or follower mode which can be exclusive ++depending on the chosen mode. The initiator is the filehandle that is ++used to initiate messages, i.e. it commands other CEC devices. The ++follower is the filehandle that receives messages sent to the CEC ++adapter and processes them. The same filehandle can be both initiator ++and follower, or this role can be taken by two different filehandles. ++ ++When a CEC message is received, then the CEC framework will decide how ++it will be processed. If the message is a reply to an earlier ++transmitted message, then the reply is sent back to the filehandle that ++is waiting for it. In addition the CEC framework will process it. ++ ++If the message is not a reply, then the CEC framework will process it ++first. If there is no follower, then the message is just discarded and a ++feature abort is sent back to the initiator if the framework couldn't ++process it. If there is a follower, then the message is passed on to the ++follower who will use :ref:`ioctl CEC_RECEIVE ` to dequeue ++the new message. The framework expects the follower to make the right ++decisions. ++ ++The CEC framework will process core messages unless requested otherwise ++by the follower. The follower can enable the passthrough mode. In that ++case, the CEC framework will pass on most core messages without ++processing them and the follower will have to implement those messages. ++There are some messages that the core will always process, regardless of ++the passthrough mode. See :ref:`cec-core-processing` for details. ++ ++If there is no initiator, then any CEC filehandle can use ++:ref:`ioctl CEC_TRANSMIT `. If there is an exclusive ++initiator then only that initiator can call ++:ref:`CEC_TRANSMIT`. The follower can of course ++always call :ref:`ioctl CEC_TRANSMIT `. ++ ++Available initiator modes are: ++ ++.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| ++ ++.. _cec-mode-initiator_e: ++ ++.. flat-table:: Initiator Modes ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 16 ++ ++ * .. _`CEC-MODE-NO-INITIATOR`: ++ ++ - ``CEC_MODE_NO_INITIATOR`` ++ - 0x0 ++ - This is not an initiator, i.e. it cannot transmit CEC messages or ++ make any other changes to the CEC adapter. ++ * .. _`CEC-MODE-INITIATOR`: ++ ++ - ``CEC_MODE_INITIATOR`` ++ - 0x1 ++ - This is an initiator (the default when the device is opened) and ++ it can transmit CEC messages and make changes to the CEC adapter, ++ unless there is an exclusive initiator. ++ * .. _`CEC-MODE-EXCL-INITIATOR`: ++ ++ - ``CEC_MODE_EXCL_INITIATOR`` ++ - 0x2 ++ - This is an exclusive initiator and this file descriptor is the ++ only one that can transmit CEC messages and make changes to the ++ CEC adapter. If someone else is already the exclusive initiator ++ then an attempt to become one will return the ``EBUSY`` error code ++ error. ++ ++ ++Available follower modes are: ++ ++.. tabularcolumns:: |p{6.6cm}|p{0.9cm}|p{10.0cm}| ++ ++.. _cec-mode-follower_e: ++ ++.. cssclass:: longtable ++ ++.. flat-table:: Follower Modes ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 16 ++ ++ * .. _`CEC-MODE-NO-FOLLOWER`: ++ ++ - ``CEC_MODE_NO_FOLLOWER`` ++ - 0x00 ++ - This is not a follower (the default when the device is opened). ++ * .. _`CEC-MODE-FOLLOWER`: ++ ++ - ``CEC_MODE_FOLLOWER`` ++ - 0x10 ++ - This is a follower and it will receive CEC messages unless there ++ is an exclusive follower. You cannot become a follower if ++ :ref:`CEC_CAP_TRANSMIT ` is not set or if :ref:`CEC_MODE_NO_INITIATOR ` ++ was specified, the ``EINVAL`` error code is returned in that case. ++ * .. _`CEC-MODE-EXCL-FOLLOWER`: ++ ++ - ``CEC_MODE_EXCL_FOLLOWER`` ++ - 0x20 ++ - This is an exclusive follower and only this file descriptor will ++ receive CEC messages for processing. If someone else is already ++ the exclusive follower then an attempt to become one will return ++ the ``EBUSY`` error code. You cannot become a follower if ++ :ref:`CEC_CAP_TRANSMIT ` is not set or if :ref:`CEC_MODE_NO_INITIATOR ` ++ was specified, the ``EINVAL`` error code is returned in that case. ++ * .. _`CEC-MODE-EXCL-FOLLOWER-PASSTHRU`: ++ ++ - ``CEC_MODE_EXCL_FOLLOWER_PASSTHRU`` ++ - 0x30 ++ - This is an exclusive follower and only this file descriptor will ++ receive CEC messages for processing. In addition it will put the ++ CEC device into passthrough mode, allowing the exclusive follower ++ to handle most core messages instead of relying on the CEC ++ framework for that. If someone else is already the exclusive ++ follower then an attempt to become one will return the ``EBUSY`` error ++ code. You cannot become a follower if :ref:`CEC_CAP_TRANSMIT ` ++ is not set or if :ref:`CEC_MODE_NO_INITIATOR ` was specified, ++ the ``EINVAL`` error code is returned in that case. ++ * .. _`CEC-MODE-MONITOR-PIN`: ++ ++ - ``CEC_MODE_MONITOR_PIN`` ++ - 0xd0 ++ - Put the file descriptor into pin monitoring mode. Can only be used in ++ combination with :ref:`CEC_MODE_NO_INITIATOR `, ++ otherwise the ``EINVAL`` error code will be returned. ++ This mode requires that the :ref:`CEC_CAP_MONITOR_PIN ` ++ capability is set, otherwise the ``EINVAL`` error code is returned. ++ While in pin monitoring mode this file descriptor can receive the ++ ``CEC_EVENT_PIN_CEC_LOW`` and ``CEC_EVENT_PIN_CEC_HIGH`` events to see the ++ low-level CEC pin transitions. This is very useful for debugging. ++ This mode is only allowed if the process has the ``CAP_NET_ADMIN`` ++ capability. If that is not set, then the ``EPERM`` error code is returned. ++ * .. _`CEC-MODE-MONITOR`: ++ ++ - ``CEC_MODE_MONITOR`` ++ - 0xe0 ++ - Put the file descriptor into monitor mode. Can only be used in ++ combination with :ref:`CEC_MODE_NO_INITIATOR `,i ++ otherwise the ``EINVAL`` error code will be returned. ++ In monitor mode all messages this CEC ++ device transmits and all messages it receives (both broadcast ++ messages and directed messages for one its logical addresses) will ++ be reported. This is very useful for debugging. This is only ++ allowed if the process has the ``CAP_NET_ADMIN`` capability. If ++ that is not set, then the ``EPERM`` error code is returned. ++ * .. _`CEC-MODE-MONITOR-ALL`: ++ ++ - ``CEC_MODE_MONITOR_ALL`` ++ - 0xf0 ++ - Put the file descriptor into 'monitor all' mode. Can only be used ++ in combination with :ref:`CEC_MODE_NO_INITIATOR `, otherwise ++ the ``EINVAL`` error code will be returned. In 'monitor all' mode all messages ++ this CEC device transmits and all messages it receives, including ++ directed messages for other CEC devices will be reported. This is ++ very useful for debugging, but not all devices support this. This ++ mode requires that the :ref:`CEC_CAP_MONITOR_ALL ` capability is set, ++ otherwise the ``EINVAL`` error code is returned. This is only allowed if ++ the process has the ``CAP_NET_ADMIN`` capability. If that is not ++ set, then the ``EPERM`` error code is returned. ++ ++ ++Core message processing details: ++ ++.. tabularcolumns:: |p{6.6cm}|p{10.9cm}| ++ ++.. _cec-core-processing: ++ ++.. flat-table:: Core Message Processing ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 8 ++ ++ * .. _`CEC-MSG-GET-CEC-VERSION`: ++ ++ - ``CEC_MSG_GET_CEC_VERSION`` ++ - The core will return the CEC version that was set with ++ :ref:`ioctl CEC_ADAP_S_LOG_ADDRS `, ++ except when in passthrough mode. In passthrough mode the core ++ does nothing and this message has to be handled by a follower ++ instead. ++ * .. _`CEC-MSG-GIVE-DEVICE-VENDOR-ID`: ++ ++ - ``CEC_MSG_GIVE_DEVICE_VENDOR_ID`` ++ - The core will return the vendor ID that was set with ++ :ref:`ioctl CEC_ADAP_S_LOG_ADDRS `, ++ except when in passthrough mode. In passthrough mode the core ++ does nothing and this message has to be handled by a follower ++ instead. ++ * .. _`CEC-MSG-ABORT`: ++ ++ - ``CEC_MSG_ABORT`` ++ - The core will return a Feature Abort message with reason ++ 'Feature Refused' as per the specification, except when in ++ passthrough mode. In passthrough mode the core does nothing ++ and this message has to be handled by a follower instead. ++ * .. _`CEC-MSG-GIVE-PHYSICAL-ADDR`: ++ ++ - ``CEC_MSG_GIVE_PHYSICAL_ADDR`` ++ - The core will report the current physical address, except when ++ in passthrough mode. In passthrough mode the core does nothing ++ and this message has to be handled by a follower instead. ++ * .. _`CEC-MSG-GIVE-OSD-NAME`: ++ ++ - ``CEC_MSG_GIVE_OSD_NAME`` ++ - The core will report the current OSD name that was set with ++ :ref:`ioctl CEC_ADAP_S_LOG_ADDRS `, ++ except when in passthrough mode. In passthrough mode the core ++ does nothing and this message has to be handled by a follower ++ instead. ++ * .. _`CEC-MSG-GIVE-FEATURES`: ++ ++ - ``CEC_MSG_GIVE_FEATURES`` ++ - The core will do nothing if the CEC version is older than 2.0, ++ otherwise it will report the current features that were set with ++ :ref:`ioctl CEC_ADAP_S_LOG_ADDRS `, ++ except when in passthrough mode. In passthrough mode the core ++ does nothing (for any CEC version) and this message has to be handled ++ by a follower instead. ++ * .. _`CEC-MSG-USER-CONTROL-PRESSED`: ++ ++ - ``CEC_MSG_USER_CONTROL_PRESSED`` ++ - If :ref:`CEC_CAP_RC ` is set and if ++ :ref:`CEC_LOG_ADDRS_FL_ALLOW_RC_PASSTHRU ` ++ is set, then generate a remote control key ++ press. This message is always passed on to the follower(s). ++ * .. _`CEC-MSG-USER-CONTROL-RELEASED`: ++ ++ - ``CEC_MSG_USER_CONTROL_RELEASED`` ++ - If :ref:`CEC_CAP_RC ` is set and if ++ :ref:`CEC_LOG_ADDRS_FL_ALLOW_RC_PASSTHRU ` ++ is set, then generate a remote control key ++ release. This message is always passed on to the follower(s). ++ * .. _`CEC-MSG-REPORT-PHYSICAL-ADDR`: ++ ++ - ``CEC_MSG_REPORT_PHYSICAL_ADDR`` ++ - The CEC framework will make note of the reported physical address ++ and then just pass the message on to the follower(s). ++ ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. ++ ++The :ref:`ioctl CEC_S_MODE ` can return the following ++error codes: ++ ++EINVAL ++ The requested mode is invalid. ++ ++EPERM ++ Monitor mode is requested without having root permissions ++ ++EBUSY ++ Someone else is already an exclusive follower or initiator. +diff --git a/Documentation/media/uapi/cec/cec-ioc-receive.rst b/Documentation/media/uapi/cec/cec-ioc-receive.rst +new file mode 100644 +index 000000000000..bdad4b197bcd +--- /dev/null ++++ b/Documentation/media/uapi/cec/cec-ioc-receive.rst +@@ -0,0 +1,344 @@ ++.. -*- coding: utf-8; mode: rst -*- ++ ++.. _CEC_TRANSMIT: ++.. _CEC_RECEIVE: ++ ++*********************************** ++ioctls CEC_RECEIVE and CEC_TRANSMIT ++*********************************** ++ ++Name ++==== ++ ++CEC_RECEIVE, CEC_TRANSMIT - Receive or transmit a CEC message ++ ++ ++Synopsis ++======== ++ ++.. c:function:: int ioctl( int fd, CEC_RECEIVE, struct cec_msg *argp ) ++ :name: CEC_RECEIVE ++ ++.. c:function:: int ioctl( int fd, CEC_TRANSMIT, struct cec_msg *argp ) ++ :name: CEC_TRANSMIT ++ ++Arguments ++========= ++ ++``fd`` ++ File descriptor returned by :c:func:`open() `. ++ ++``argp`` ++ Pointer to struct cec_msg. ++ ++Description ++=========== ++ ++To receive a CEC message the application has to fill in the ++``timeout`` field of struct :c:type:`cec_msg` and pass it to ++:ref:`ioctl CEC_RECEIVE `. ++If the file descriptor is in non-blocking mode and there are no received ++messages pending, then it will return -1 and set errno to the ``EAGAIN`` ++error code. If the file descriptor is in blocking mode and ``timeout`` ++is non-zero and no message arrived within ``timeout`` milliseconds, then ++it will return -1 and set errno to the ``ETIMEDOUT`` error code. ++ ++A received message can be: ++ ++1. a message received from another CEC device (the ``sequence`` field will ++ be 0). ++2. the result of an earlier non-blocking transmit (the ``sequence`` field will ++ be non-zero). ++ ++To send a CEC message the application has to fill in the struct ++:c:type:`cec_msg` and pass it to :ref:`ioctl CEC_TRANSMIT `. ++The :ref:`ioctl CEC_TRANSMIT ` is only available if ++``CEC_CAP_TRANSMIT`` is set. If there is no more room in the transmit ++queue, then it will return -1 and set errno to the ``EBUSY`` error code. ++The transmit queue has enough room for 18 messages (about 1 second worth ++of 2-byte messages). Note that the CEC kernel framework will also reply ++to core messages (see :ref:`cec-core-processing`), so it is not a good ++idea to fully fill up the transmit queue. ++ ++If the file descriptor is in non-blocking mode then the transmit will ++return 0 and the result of the transmit will be available via ++:ref:`ioctl CEC_RECEIVE ` once the transmit has finished ++(including waiting for a reply, if requested). ++ ++The ``sequence`` field is filled in for every transmit and this can be ++checked against the received messages to find the corresponding transmit ++result. ++ ++Normally calling :ref:`ioctl CEC_TRANSMIT ` when the physical ++address is invalid (due to e.g. a disconnect) will return ``ENONET``. ++ ++However, the CEC specification allows sending messages from 'Unregistered' to ++'TV' when the physical address is invalid since some TVs pull the hotplug detect ++pin of the HDMI connector low when they go into standby, or when switching to ++another input. ++ ++When the hotplug detect pin goes low the EDID disappears, and thus the ++physical address, but the cable is still connected and CEC still works. ++In order to detect/wake up the device it is allowed to send poll and 'Image/Text ++View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV'). ++ ++.. tabularcolumns:: |p{1.0cm}|p{3.5cm}|p{13.0cm}| ++ ++.. c:type:: cec_msg ++ ++.. cssclass:: longtable ++ ++.. flat-table:: struct cec_msg ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 1 1 16 ++ ++ * - __u64 ++ - ``tx_ts`` ++ - Timestamp in ns of when the last byte of the message was transmitted. ++ The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access ++ the same clock from userspace use :c:func:`clock_gettime`. ++ * - __u64 ++ - ``rx_ts`` ++ - Timestamp in ns of when the last byte of the message was received. ++ The timestamp has been taken from the ``CLOCK_MONOTONIC`` clock. To access ++ the same clock from userspace use :c:func:`clock_gettime`. ++ * - __u32 ++ - ``len`` ++ - The length of the message. For :ref:`ioctl CEC_TRANSMIT ` this is filled in ++ by the application. The driver will fill this in for ++ :ref:`ioctl CEC_RECEIVE `. For :ref:`ioctl CEC_TRANSMIT ` it will be ++ filled in by the driver with the length of the reply message if ``reply`` was set. ++ * - __u32 ++ - ``timeout`` ++ - The timeout in milliseconds. This is the time the device will wait ++ for a message to be received before timing out. If it is set to 0, ++ then it will wait indefinitely when it is called by :ref:`ioctl CEC_RECEIVE `. ++ If it is 0 and it is called by :ref:`ioctl CEC_TRANSMIT `, ++ then it will be replaced by 1000 if the ``reply`` is non-zero or ++ ignored if ``reply`` is 0. ++ * - __u32 ++ - ``sequence`` ++ - A non-zero sequence number is automatically assigned by the CEC framework ++ for all transmitted messages. It is used by the CEC framework when it queues ++ the transmit result (when transmit was called in non-blocking mode). This ++ allows the application to associate the received message with the original ++ transmit. ++ * - __u32 ++ - ``flags`` ++ - Flags. See :ref:`cec-msg-flags` for a list of available flags. ++ * - __u8 ++ - ``tx_status`` ++ - The status bits of the transmitted message. See ++ :ref:`cec-tx-status` for the possible status values. It is 0 if ++ this message was received, not transmitted. ++ * - __u8 ++ - ``msg[16]`` ++ - The message payload. For :ref:`ioctl CEC_TRANSMIT ` this is filled in by the ++ application. The driver will fill this in for :ref:`ioctl CEC_RECEIVE `. ++ For :ref:`ioctl CEC_TRANSMIT ` it will be filled in by the driver with ++ the payload of the reply message if ``timeout`` was set. ++ * - __u8 ++ - ``reply`` ++ - Wait until this message is replied. If ``reply`` is 0 and the ++ ``timeout`` is 0, then don't wait for a reply but return after ++ transmitting the message. Ignored by :ref:`ioctl CEC_RECEIVE `. ++ The case where ``reply`` is 0 (this is the opcode for the Feature Abort ++ message) and ``timeout`` is non-zero is specifically allowed to make it ++ possible to send a message and wait up to ``timeout`` milliseconds for a ++ Feature Abort reply. In this case ``rx_status`` will either be set ++ to :ref:`CEC_RX_STATUS_TIMEOUT ` or ++ :ref:`CEC_RX_STATUS_FEATURE_ABORT `. ++ ++ If the transmitter message is ``CEC_MSG_INITIATE_ARC`` then the ``reply`` ++ values ``CEC_MSG_REPORT_ARC_INITIATED`` and ``CEC_MSG_REPORT_ARC_TERMINATED`` ++ are processed differently: either value will match both possible replies. ++ The reason is that the ``CEC_MSG_INITIATE_ARC`` message is the only CEC ++ message that has two possible replies other than Feature Abort. The ++ ``reply`` field will be updated with the actual reply so that it is ++ synchronized with the contents of the received message. ++ * - __u8 ++ - ``rx_status`` ++ - The status bits of the received message. See ++ :ref:`cec-rx-status` for the possible status values. It is 0 if ++ this message was transmitted, not received, unless this is the ++ reply to a transmitted message. In that case both ``rx_status`` ++ and ``tx_status`` are set. ++ * - __u8 ++ - ``tx_status`` ++ - The status bits of the transmitted message. See ++ :ref:`cec-tx-status` for the possible status values. It is 0 if ++ this message was received, not transmitted. ++ * - __u8 ++ - ``tx_arb_lost_cnt`` ++ - A counter of the number of transmit attempts that resulted in the ++ Arbitration Lost error. This is only set if the hardware supports ++ this, otherwise it is always 0. This counter is only valid if the ++ :ref:`CEC_TX_STATUS_ARB_LOST ` status bit is set. ++ * - __u8 ++ - ``tx_nack_cnt`` ++ - A counter of the number of transmit attempts that resulted in the ++ Not Acknowledged error. This is only set if the hardware supports ++ this, otherwise it is always 0. This counter is only valid if the ++ :ref:`CEC_TX_STATUS_NACK ` status bit is set. ++ * - __u8 ++ - ``tx_low_drive_cnt`` ++ - A counter of the number of transmit attempts that resulted in the ++ Arbitration Lost error. This is only set if the hardware supports ++ this, otherwise it is always 0. This counter is only valid if the ++ :ref:`CEC_TX_STATUS_LOW_DRIVE ` status bit is set. ++ * - __u8 ++ - ``tx_error_cnt`` ++ - A counter of the number of transmit errors other than Arbitration ++ Lost or Not Acknowledged. This is only set if the hardware ++ supports this, otherwise it is always 0. This counter is only ++ valid if the :ref:`CEC_TX_STATUS_ERROR ` status bit is set. ++ ++ ++.. tabularcolumns:: |p{6.2cm}|p{1.0cm}|p{10.3cm}| ++ ++.. _cec-msg-flags: ++ ++.. flat-table:: Flags for struct cec_msg ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 4 ++ ++ * .. _`CEC-MSG-FL-REPLY-TO-FOLLOWERS`: ++ ++ - ``CEC_MSG_FL_REPLY_TO_FOLLOWERS`` ++ - 1 ++ - If a CEC transmit expects a reply, then by default that reply is only sent to ++ the filehandle that called :ref:`ioctl CEC_TRANSMIT `. If this ++ flag is set, then the reply is also sent to all followers, if any. If the ++ filehandle that called :ref:`ioctl CEC_TRANSMIT ` is also a ++ follower, then that filehandle will receive the reply twice: once as the ++ result of the :ref:`ioctl CEC_TRANSMIT `, and once via ++ :ref:`ioctl CEC_RECEIVE `. ++ ++ ++.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| ++ ++.. _cec-tx-status: ++ ++.. flat-table:: CEC Transmit Status ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 16 ++ ++ * .. _`CEC-TX-STATUS-OK`: ++ ++ - ``CEC_TX_STATUS_OK`` ++ - 0x01 ++ - The message was transmitted successfully. This is mutually ++ exclusive with :ref:`CEC_TX_STATUS_MAX_RETRIES `. Other bits can still ++ be set if earlier attempts met with failure before the transmit ++ was eventually successful. ++ * .. _`CEC-TX-STATUS-ARB-LOST`: ++ ++ - ``CEC_TX_STATUS_ARB_LOST`` ++ - 0x02 ++ - CEC line arbitration was lost. ++ * .. _`CEC-TX-STATUS-NACK`: ++ ++ - ``CEC_TX_STATUS_NACK`` ++ - 0x04 ++ - Message was not acknowledged. ++ * .. _`CEC-TX-STATUS-LOW-DRIVE`: ++ ++ - ``CEC_TX_STATUS_LOW_DRIVE`` ++ - 0x08 ++ - Low drive was detected on the CEC bus. This indicates that a ++ follower detected an error on the bus and requests a ++ retransmission. ++ * .. _`CEC-TX-STATUS-ERROR`: ++ ++ - ``CEC_TX_STATUS_ERROR`` ++ - 0x10 ++ - Some error occurred. This is used for any errors that do not fit ++ ``CEC_TX_STATUS_ARB_LOST`` or ``CEC_TX_STATUS_LOW_DRIVE``, either because ++ the hardware could not tell which error occurred, or because the hardware ++ tested for other conditions besides those two. ++ * .. _`CEC-TX-STATUS-MAX-RETRIES`: ++ ++ - ``CEC_TX_STATUS_MAX_RETRIES`` ++ - 0x20 ++ - The transmit failed after one or more retries. This status bit is ++ mutually exclusive with :ref:`CEC_TX_STATUS_OK `. Other bits can still ++ be set to explain which failures were seen. ++ ++ ++.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| ++ ++.. _cec-rx-status: ++ ++.. flat-table:: CEC Receive Status ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 16 ++ ++ * .. _`CEC-RX-STATUS-OK`: ++ ++ - ``CEC_RX_STATUS_OK`` ++ - 0x01 ++ - The message was received successfully. ++ * .. _`CEC-RX-STATUS-TIMEOUT`: ++ ++ - ``CEC_RX_STATUS_TIMEOUT`` ++ - 0x02 ++ - The reply to an earlier transmitted message timed out. ++ * .. _`CEC-RX-STATUS-FEATURE-ABORT`: ++ ++ - ``CEC_RX_STATUS_FEATURE_ABORT`` ++ - 0x04 ++ - The message was received successfully but the reply was ++ ``CEC_MSG_FEATURE_ABORT``. This status is only set if this message ++ was the reply to an earlier transmitted message. ++ ++ ++ ++Return Value ++============ ++ ++On success 0 is returned, on error -1 and the ``errno`` variable is set ++appropriately. The generic error codes are described at the ++:ref:`Generic Error Codes ` chapter. ++ ++The :ref:`ioctl CEC_RECEIVE ` can return the following ++error codes: ++ ++EAGAIN ++ No messages are in the receive queue, and the filehandle is in non-blocking mode. ++ ++ETIMEDOUT ++ The ``timeout`` was reached while waiting for a message. ++ ++ERESTARTSYS ++ The wait for a message was interrupted (e.g. by Ctrl-C). ++ ++The :ref:`ioctl CEC_TRANSMIT ` can return the following ++error codes: ++ ++ENOTTY ++ The ``CEC_CAP_TRANSMIT`` capability wasn't set, so this ioctl is not supported. ++ ++EPERM ++ The CEC adapter is not configured, i.e. :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` ++ has never been called. ++ ++ENONET ++ The CEC adapter is not configured, i.e. :ref:`ioctl CEC_ADAP_S_LOG_ADDRS ` ++ was called, but the physical address is invalid so no logical address was claimed. ++ An exception is made in this case for transmits from initiator 0xf ('Unregistered') ++ to destination 0 ('TV'). In that case the transmit will proceed as usual. ++ ++EBUSY ++ Another filehandle is in exclusive follower or initiator mode, or the filehandle ++ is in mode ``CEC_MODE_NO_INITIATOR``. This is also returned if the transmit ++ queue is full. ++ ++EINVAL ++ The contents of struct :c:type:`cec_msg` is invalid. ++ ++ERESTARTSYS ++ The wait for a successful transmit was interrupted (e.g. by Ctrl-C). +diff --git a/MAINTAINERS b/MAINTAINERS +index b88e249026a1..bb1aa323019c 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -2657,6 +2657,22 @@ F: drivers/net/ieee802154/cc2520.c + F: include/linux/spi/cc2520.h + F: Documentation/devicetree/bindings/net/ieee802154/cc2520.txt + ++CEC FRAMEWORK ++M: Hans Verkuil ++L: linux-media@vger.kernel.org ++T: git git://linuxtv.org/media_tree.git ++W: http://linuxtv.org ++S: Supported ++F: Documentation/media/kapi/cec-core.rst ++F: Documentation/media/uapi/cec ++F: drivers/media/cec/ ++F: drivers/media/rc/keymaps/rc-cec.c ++F: include/media/cec.h ++F: include/media/cec-notifier.h ++F: include/uapi/linux/cec.h ++F: include/uapi/linux/cec-funcs.h ++F: Documentation/devicetree/bindings/media/cec.txt ++ + CELL BROADBAND ENGINE ARCHITECTURE + M: Arnd Bergmann + L: linuxppc-dev@lists.ozlabs.org +diff --git a/drivers/media/cec/cec-adap.c b/drivers/media/cec/cec-adap.c +index 8c75a51333b2..4f5d382268f7 100644 +--- a/drivers/media/cec/cec-adap.c ++++ b/drivers/media/cec/cec-adap.c +@@ -202,7 +202,10 @@ static void cec_queue_msg_fh(struct cec_fh *fh, const struct cec_msg *msg) + { + static const struct cec_event ev_lost_msgs = { + .event = CEC_EVENT_LOST_MSGS, +- .lost_msgs.lost_msgs = 1, ++ .flags = 0, ++ { ++ .lost_msgs = { 1 }, ++ }, + }; + struct cec_msg_entry *entry; + +@@ -1793,6 +1796,9 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, + int la_idx = cec_log_addr2idx(adap, dest_laddr); + bool from_unregistered = init_laddr == 0xf; + struct cec_msg tx_cec_msg = { }; ++#ifdef CONFIG_MEDIA_CEC_RC ++ int scancode; ++#endif + + dprintk(2, "%s: %*ph\n", __func__, msg->len, msg->msg); + +@@ -1888,11 +1894,9 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, + */ + case 0x60: + if (msg->len == 2) +- rc_keydown(adap->rc, RC_TYPE_CEC, +- msg->msg[2], 0); ++ scancode = msg->msg[2]; + else +- rc_keydown(adap->rc, RC_TYPE_CEC, +- msg->msg[2] << 8 | msg->msg[3], 0); ++ scancode = msg->msg[2] << 8 | msg->msg[3]; + break; + /* + * Other function messages that are not handled. +@@ -1905,11 +1909,54 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, + */ + case 0x56: case 0x57: + case 0x67: case 0x68: case 0x69: case 0x6a: ++ scancode = -1; + break; + default: +- rc_keydown(adap->rc, RC_TYPE_CEC, msg->msg[2], 0); ++ scancode = msg->msg[2]; ++ break; ++ } ++ ++ /* Was repeating, but keypress timed out */ ++ if (adap->rc_repeating && !adap->rc->keypressed) { ++ adap->rc_repeating = false; ++ adap->rc_last_scancode = -1; ++ } ++ /* Different keypress from last time, ends repeat mode */ ++ if (adap->rc_last_scancode != scancode) { ++ rc_keyup(adap->rc); ++ adap->rc_repeating = false; ++ } ++ /* We can't handle this scancode */ ++ if (scancode < 0) { ++ adap->rc_last_scancode = scancode; ++ break; ++ } ++ ++ /* Send key press */ ++ rc_keydown(adap->rc, RC_TYPE_CEC, scancode, 0); ++ ++ /* When in repeating mode, we're done */ ++ if (adap->rc_repeating) ++ break; ++ ++ /* ++ * We are not repeating, but the new scancode is ++ * the same as the last one, and this second key press is ++ * within 550 ms (the 'Follower Safety Timeout') from the ++ * previous key press, so we now enable the repeating mode. ++ */ ++ if (adap->rc_last_scancode == scancode && ++ msg->rx_ts - adap->rc_last_keypress < 550 * NSEC_PER_MSEC) { ++ adap->rc_repeating = true; + break; + } ++ /* ++ * Not in repeating mode, so avoid triggering repeat mode ++ * by calling keyup. ++ */ ++ rc_keyup(adap->rc); ++ adap->rc_last_scancode = scancode; ++ adap->rc_last_keypress = msg->rx_ts; + #endif + break; + +@@ -1919,6 +1966,8 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg, + break; + #ifdef CONFIG_MEDIA_CEC_RC + rc_keyup(adap->rc); ++ adap->rc_repeating = false; ++ adap->rc_last_scancode = -1; + #endif + break; + +diff --git a/drivers/media/cec/cec-core.c b/drivers/media/cec/cec-core.c +index 969f770acf77..65d763be4385 100644 +--- a/drivers/media/cec/cec-core.c ++++ b/drivers/media/cec/cec-core.c +@@ -263,7 +263,7 @@ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, + return adap; + + /* Prepare the RC input device */ +- adap->rc = rc_allocate_device(RC_DRIVER_SCANCODE); ++ adap->rc = rc_allocate_device(); + if (!adap->rc) { + pr_err("cec-%s: failed to allocate memory for rc_dev\n", + name); +@@ -283,11 +283,13 @@ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, + adap->rc->input_id.vendor = 0; + adap->rc->input_id.product = 0; + adap->rc->input_id.version = 1; ++ adap->rc->driver_type = RC_DRIVER_SCANCODE; + adap->rc->driver_name = CEC_NAME; + adap->rc->allowed_protocols = RC_BIT_CEC; + adap->rc->priv = adap; + adap->rc->map_name = RC_MAP_CEC; + adap->rc->timeout = MS_TO_NS(100); ++ adap->rc_last_scancode = -1; + #endif + return adap; + } +@@ -319,6 +321,17 @@ int cec_register_adapter(struct cec_adapter *adap, + adap->rc = NULL; + return res; + } ++ /* ++ * The REP_DELAY for CEC is really the time between the initial ++ * 'User Control Pressed' message and the second. The first ++ * keypress is always seen as non-repeating, the second ++ * (provided it has the same UI Command) will start the 'Press ++ * and Hold' (aka repeat) behavior. By setting REP_DELAY to the ++ * same value as REP_PERIOD the expected CEC behavior is ++ * reproduced. ++ */ ++ adap->rc->input_dev->rep[REP_DELAY] = ++ adap->rc->input_dev->rep[REP_PERIOD]; + } + #endif + +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index fbbd3bbcd252..9cffcc61fdca 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -18,6 +18,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-behold.o \ + rc-behold-columbus.o \ + rc-budget-ci-old.o \ ++ rc-cec.o \ + rc-cinergy-1400.o \ + rc-cinergy.o \ + rc-delock-61959.o \ +diff --git a/drivers/media/rc/keymaps/rc-cec.c b/drivers/media/rc/keymaps/rc-cec.c +new file mode 100644 +index 000000000000..354c8e724b8e +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-cec.c +@@ -0,0 +1,182 @@ ++/* Keytable for the CEC remote control ++ * ++ * Copyright (c) 2015 by Kamil Debski ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++/* ++ * CEC Spec "High-Definition Multimedia Interface Specification" can be obtained ++ * here: http://xtreamerdev.googlecode.com/files/CEC_Specs.pdf ++ * The list of control codes is listed in Table 27: User Control Codes p. 95 ++ */ ++ ++static struct rc_map_table cec[] = { ++ { 0x00, KEY_OK }, ++ { 0x01, KEY_UP }, ++ { 0x02, KEY_DOWN }, ++ { 0x03, KEY_LEFT }, ++ { 0x04, KEY_RIGHT }, ++ { 0x05, KEY_RIGHT_UP }, ++ { 0x06, KEY_RIGHT_DOWN }, ++ { 0x07, KEY_LEFT_UP }, ++ { 0x08, KEY_LEFT_DOWN }, ++ { 0x09, KEY_ROOT_MENU }, /* CEC Spec: Device Root Menu - see Note 2 */ ++ /* ++ * Note 2: This is the initial display that a device shows. It is ++ * device-dependent and can be, for example, a contents menu, setup ++ * menu, favorite menu or other menu. The actual menu displayed ++ * may also depend on the device's current state. ++ */ ++ { 0x0a, KEY_SETUP }, ++ { 0x0b, KEY_MENU }, /* CEC Spec: Contents Menu */ ++ { 0x0c, KEY_FAVORITES }, /* CEC Spec: Favorite Menu */ ++ { 0x0d, KEY_EXIT }, ++ /* 0x0e-0x0f: Reserved */ ++ { 0x10, KEY_MEDIA_TOP_MENU }, ++ { 0x11, KEY_CONTEXT_MENU }, ++ /* 0x12-0x1c: Reserved */ ++ { 0x1d, KEY_DIGITS }, /* CEC Spec: select/toggle a Number Entry Mode */ ++ { 0x1e, KEY_NUMERIC_11 }, ++ { 0x1f, KEY_NUMERIC_12 }, ++ /* 0x20-0x29: Keys 0 to 9 */ ++ { 0x20, KEY_NUMERIC_0 }, ++ { 0x21, KEY_NUMERIC_1 }, ++ { 0x22, KEY_NUMERIC_2 }, ++ { 0x23, KEY_NUMERIC_3 }, ++ { 0x24, KEY_NUMERIC_4 }, ++ { 0x25, KEY_NUMERIC_5 }, ++ { 0x26, KEY_NUMERIC_6 }, ++ { 0x27, KEY_NUMERIC_7 }, ++ { 0x28, KEY_NUMERIC_8 }, ++ { 0x29, KEY_NUMERIC_9 }, ++ { 0x2a, KEY_DOT }, ++ { 0x2b, KEY_ENTER }, ++ { 0x2c, KEY_CLEAR }, ++ /* 0x2d-0x2e: Reserved */ ++ { 0x2f, KEY_NEXT_FAVORITE }, /* CEC Spec: Next Favorite */ ++ { 0x30, KEY_CHANNELUP }, ++ { 0x31, KEY_CHANNELDOWN }, ++ { 0x32, KEY_PREVIOUS }, /* CEC Spec: Previous Channel */ ++ { 0x33, KEY_SOUND }, /* CEC Spec: Sound Select */ ++ { 0x34, KEY_VIDEO }, /* 0x34: CEC Spec: Input Select */ ++ { 0x35, KEY_INFO }, /* CEC Spec: Display Information */ ++ { 0x36, KEY_HELP }, ++ { 0x37, KEY_PAGEUP }, ++ { 0x38, KEY_PAGEDOWN }, ++ /* 0x39-0x3f: Reserved */ ++ { 0x40, KEY_POWER }, ++ { 0x41, KEY_VOLUMEUP }, ++ { 0x42, KEY_VOLUMEDOWN }, ++ { 0x43, KEY_MUTE }, ++ { 0x44, KEY_PLAYCD }, ++ { 0x45, KEY_STOPCD }, ++ { 0x46, KEY_PAUSECD }, ++ { 0x47, KEY_RECORD }, ++ { 0x48, KEY_REWIND }, ++ { 0x49, KEY_FASTFORWARD }, ++ { 0x4a, KEY_EJECTCD }, /* CEC Spec: Eject */ ++ { 0x4b, KEY_FORWARD }, ++ { 0x4c, KEY_BACK }, ++ { 0x4d, KEY_STOP_RECORD }, /* CEC Spec: Stop-Record */ ++ { 0x4e, KEY_PAUSE_RECORD }, /* CEC Spec: Pause-Record */ ++ /* 0x4f: Reserved */ ++ { 0x50, KEY_ANGLE }, ++ { 0x51, KEY_TV2 }, ++ { 0x52, KEY_VOD }, /* CEC Spec: Video on Demand */ ++ { 0x53, KEY_EPG }, ++ { 0x54, KEY_TIME }, /* CEC Spec: Timer */ ++ { 0x55, KEY_CONFIG }, ++ /* ++ * The following codes are hard to implement at this moment, as they ++ * carry an additional additional argument. Most likely changes to RC ++ * framework are necessary. ++ * For now they are interpreted by the CEC framework as non keycodes ++ * and are passed as messages enabling user application to parse them. ++ */ ++ /* 0x56: CEC Spec: Select Broadcast Type */ ++ /* 0x57: CEC Spec: Select Sound presentation */ ++ { 0x58, KEY_AUDIO_DESC }, /* CEC 2.0 and up */ ++ { 0x59, KEY_WWW }, /* CEC 2.0 and up */ ++ { 0x5a, KEY_3D_MODE }, /* CEC 2.0 and up */ ++ /* 0x5b-0x5f: Reserved */ ++ { 0x60, KEY_PLAYCD }, /* CEC Spec: Play Function */ ++ { 0x6005, KEY_FASTFORWARD }, ++ { 0x6006, KEY_FASTFORWARD }, ++ { 0x6007, KEY_FASTFORWARD }, ++ { 0x6015, KEY_SLOW }, ++ { 0x6016, KEY_SLOW }, ++ { 0x6017, KEY_SLOW }, ++ { 0x6009, KEY_FASTREVERSE }, ++ { 0x600a, KEY_FASTREVERSE }, ++ { 0x600b, KEY_FASTREVERSE }, ++ { 0x6019, KEY_SLOWREVERSE }, ++ { 0x601a, KEY_SLOWREVERSE }, ++ { 0x601b, KEY_SLOWREVERSE }, ++ { 0x6020, KEY_REWIND }, ++ { 0x6024, KEY_PLAYCD }, ++ { 0x6025, KEY_PAUSECD }, ++ { 0x61, KEY_PLAYPAUSE }, /* CEC Spec: Pause-Play Function */ ++ { 0x62, KEY_RECORD }, /* Spec: Record Function */ ++ { 0x63, KEY_PAUSE_RECORD }, /* CEC Spec: Pause-Record Function */ ++ { 0x64, KEY_STOPCD }, /* CEC Spec: Stop Function */ ++ { 0x65, KEY_MUTE }, /* CEC Spec: Mute Function */ ++ { 0x66, KEY_UNMUTE }, /* CEC Spec: Restore the volume */ ++ /* ++ * The following codes are hard to implement at this moment, as they ++ * carry an additional additional argument. Most likely changes to RC ++ * framework are necessary. ++ * For now they are interpreted by the CEC framework as non keycodes ++ * and are passed as messages enabling user application to parse them. ++ */ ++ /* 0x67: CEC Spec: Tune Function */ ++ /* 0x68: CEC Spec: Seleect Media Function */ ++ /* 0x69: CEC Spec: Select A/V Input Function */ ++ /* 0x6a: CEC Spec: Select Audio Input Function */ ++ { 0x6b, KEY_POWER }, /* CEC Spec: Power Toggle Function */ ++ { 0x6c, KEY_SLEEP }, /* CEC Spec: Power Off Function */ ++ { 0x6d, KEY_WAKEUP }, /* CEC Spec: Power On Function */ ++ /* 0x6e-0x70: Reserved */ ++ { 0x71, KEY_BLUE }, /* CEC Spec: F1 (Blue) */ ++ { 0x72, KEY_RED }, /* CEC Spec: F2 (Red) */ ++ { 0x73, KEY_GREEN }, /* CEC Spec: F3 (Green) */ ++ { 0x74, KEY_YELLOW }, /* CEC Spec: F4 (Yellow) */ ++ { 0x75, KEY_F5 }, ++ { 0x76, KEY_DATA }, /* CEC Spec: Data - see Note 3 */ ++ /* ++ * Note 3: This is used, for example, to enter or leave a digital TV ++ * data broadcast application. ++ */ ++ /* 0x77-0xff: Reserved */ ++}; ++ ++static struct rc_map_list cec_map = { ++ .map = { ++ .scan = cec, ++ .size = ARRAY_SIZE(cec), ++ .rc_type = RC_TYPE_CEC, ++ .name = RC_MAP_CEC, ++ } ++}; ++ ++static int __init init_rc_map_cec(void) ++{ ++ return rc_map_register(&cec_map); ++} ++ ++static void __exit exit_rc_map_cec(void) ++{ ++ rc_map_unregister(&cec_map); ++} ++ ++module_init(init_rc_map_cec); ++module_exit(exit_rc_map_cec); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Kamil Debski"); +diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c +index 3f0f71adabb4..a639ea653c7e 100644 +--- a/drivers/media/rc/rc-main.c ++++ b/drivers/media/rc/rc-main.c +@@ -801,6 +801,7 @@ static struct { + { RC_BIT_SHARP, "sharp" }, + { RC_BIT_MCE_KBD, "mce_kbd" }, + { RC_BIT_XMP, "xmp" }, ++ { RC_BIT_CEC, "cec" }, + }; + + /** +diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c +index dcf26537c935..1957c340878d 100644 +--- a/fs/compat_ioctl.c ++++ b/fs/compat_ioctl.c +@@ -57,6 +57,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -1381,6 +1382,17 @@ COMPATIBLE_IOCTL(VIDEO_GET_NAVI) + COMPATIBLE_IOCTL(VIDEO_SET_ATTRIBUTES) + COMPATIBLE_IOCTL(VIDEO_GET_SIZE) + COMPATIBLE_IOCTL(VIDEO_GET_FRAME_RATE) ++/* cec */ ++COMPATIBLE_IOCTL(CEC_ADAP_G_CAPS) ++COMPATIBLE_IOCTL(CEC_ADAP_G_LOG_ADDRS) ++COMPATIBLE_IOCTL(CEC_ADAP_S_LOG_ADDRS) ++COMPATIBLE_IOCTL(CEC_ADAP_G_PHYS_ADDR) ++COMPATIBLE_IOCTL(CEC_ADAP_S_PHYS_ADDR) ++COMPATIBLE_IOCTL(CEC_G_MODE) ++COMPATIBLE_IOCTL(CEC_S_MODE) ++COMPATIBLE_IOCTL(CEC_TRANSMIT) ++COMPATIBLE_IOCTL(CEC_RECEIVE) ++COMPATIBLE_IOCTL(CEC_DQEVENT) + + /* joystick */ + COMPATIBLE_IOCTL(JSIOCGVERSION) +diff --git a/include/media/cec-notifier.h b/include/media/cec-notifier.h +index ca19a9305782..8bb169ac7afd 100644 +--- a/include/media/cec-notifier.h ++++ b/include/media/cec-notifier.h +@@ -91,6 +91,14 @@ void cec_notifier_register(struct cec_notifier *n, + */ + void cec_notifier_unregister(struct cec_notifier *n); + ++/** ++ * cec_register_cec_notifier - register the notifier with the cec adapter. ++ * @adap: the CEC adapter ++ * @notifier: the CEC notifier ++ */ ++void cec_register_cec_notifier(struct cec_adapter *adap, ++ struct cec_notifier *notifier); ++ + #else + static inline struct cec_notifier *cec_notifier_get(struct device *dev) + { +@@ -111,6 +119,20 @@ static inline void cec_notifier_set_phys_addr_from_edid(struct cec_notifier *n, + { + } + ++static inline void cec_notifier_register(struct cec_notifier *n, ++ struct cec_adapter *adap, ++ void (*callback)(struct cec_adapter *adap, u16 pa)) ++{ ++} ++ ++static inline void cec_notifier_unregister(struct cec_notifier *n) ++{ ++} ++ ++static inline void cec_register_cec_notifier(struct cec_adapter *adap, ++ struct cec_notifier *notifier) ++{ ++} + #endif + + /** +diff --git a/include/media/cec.h b/include/media/cec.h +index df3c94f05aa5..f64807a78064 100644 +--- a/include/media/cec.h ++++ b/include/media/cec.h +@@ -31,6 +31,9 @@ + #include + #include + ++#define CEC_CAP_DEFAULTS (CEC_CAP_LOG_ADDRS | CEC_CAP_TRANSMIT | \ ++ CEC_CAP_PASSTHROUGH | CEC_CAP_RC) ++ + /** + * struct cec_devnode - cec device node + * @dev: cec device +@@ -188,6 +191,11 @@ struct cec_adapter { + + u32 tx_timeouts; + ++#ifdef CONFIG_MEDIA_CEC_RC ++ bool rc_repeating; ++ int rc_last_scancode; ++ u64 rc_last_keypress; ++#endif + #ifdef CONFIG_CEC_NOTIFIER + struct cec_notifier *notifier; + #endif +@@ -226,7 +234,7 @@ static inline bool cec_is_sink(const struct cec_adapter *adap) + + struct edid; + +-#if IS_ENABLED(CONFIG_CEC_CORE) ++#if IS_REACHABLE(CONFIG_CEC_CORE) + struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, + void *priv, const char *name, u32 caps, u8 available_las); + int cec_register_adapter(struct cec_adapter *adap, struct device *parent); +@@ -373,11 +381,6 @@ u16 cec_phys_addr_for_input(u16 phys_addr, u8 input); + */ + int cec_phys_addr_validate(u16 phys_addr, u16 *parent, u16 *port); + +-#ifdef CONFIG_CEC_NOTIFIER +-void cec_register_cec_notifier(struct cec_adapter *adap, +- struct cec_notifier *notifier); +-#endif +- + #else + + static inline int cec_register_adapter(struct cec_adapter *adap, +@@ -424,9 +427,26 @@ static inline u16 cec_phys_addr_for_input(u16 phys_addr, u8 input) + + static inline int cec_phys_addr_validate(u16 phys_addr, u16 *parent, u16 *port) + { ++ if (parent) ++ *parent = phys_addr; ++ if (port) ++ *port = 0; + return 0; + } + + #endif + ++/** ++ * cec_phys_addr_invalidate() - set the physical address to INVALID ++ * ++ * @adap: the CEC adapter ++ * ++ * This is a simple helper function to invalidate the physical ++ * address. ++ */ ++static inline void cec_phys_addr_invalidate(struct cec_adapter *adap) ++{ ++ cec_s_phys_addr(adap, CEC_PHYS_ADDR_INVALID, false); ++} ++ + #endif /* _MEDIA_CEC_H */ +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index 7c4bbc4dfab4..d9f87d5b4468 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -31,6 +31,7 @@ enum rc_type { + RC_TYPE_RC6_MCE = 16, /* MCE (Philips RC6-6A-32 subtype) protocol */ + RC_TYPE_SHARP = 17, /* Sharp protocol */ + RC_TYPE_XMP = 18, /* XMP protocol */ ++ RC_TYPE_CEC = 19, /* CEC protocol */ + }; + + #define RC_BIT_NONE 0 +@@ -53,6 +54,7 @@ enum rc_type { + #define RC_BIT_RC6_MCE (1 << RC_TYPE_RC6_MCE) + #define RC_BIT_SHARP (1 << RC_TYPE_SHARP) + #define RC_BIT_XMP (1 << RC_TYPE_XMP) ++#define RC_BIT_CEC (1 << RC_TYPE_CEC) + + #define RC_BIT_ALL (RC_BIT_UNKNOWN | RC_BIT_OTHER | \ + RC_BIT_RC5 | RC_BIT_RC5X | RC_BIT_RC5_SZ | \ +@@ -61,7 +63,7 @@ enum rc_type { + RC_BIT_NEC | RC_BIT_SANYO | RC_BIT_MCE_KBD | \ + RC_BIT_RC6_0 | RC_BIT_RC6_6A_20 | RC_BIT_RC6_6A_24 | \ + RC_BIT_RC6_6A_32 | RC_BIT_RC6_MCE | RC_BIT_SHARP | \ +- RC_BIT_XMP) ++ RC_BIT_XMP | RC_BIT_CEC) + + + #define RC_SCANCODE_UNKNOWN(x) (x) +@@ -123,6 +125,7 @@ void rc_map_init(void); + #define RC_MAP_BEHOLD_COLUMBUS "rc-behold-columbus" + #define RC_MAP_BEHOLD "rc-behold" + #define RC_MAP_BUDGET_CI_OLD "rc-budget-ci-old" ++#define RC_MAP_CEC "rc-cec" + #define RC_MAP_CINERGY_1400 "rc-cinergy-1400" + #define RC_MAP_CINERGY "rc-cinergy" + #define RC_MAP_DELOCK_61959 "rc-delock-61959" +diff --git a/include/uapi/linux/cec-funcs.h b/include/uapi/linux/cec-funcs.h +index c451eec42a83..270b251a3d9b 100644 +--- a/include/uapi/linux/cec-funcs.h ++++ b/include/uapi/linux/cec-funcs.h +@@ -895,6 +895,7 @@ static inline void cec_ops_report_features(const struct cec_msg *msg, + *cec_version = msg->msg[2]; + *all_device_types = msg->msg[3]; + *rc_profile = p; ++ *dev_features = NULL; + while (p < &msg->msg[14] && (*p & CEC_OP_FEAT_EXT)) + p++; + if (!(*p & CEC_OP_FEAT_EXT)) { +diff --git a/include/uapi/linux/cec.h b/include/uapi/linux/cec.h +index af6682f5ea85..b9f8df3a0477 100644 +--- a/include/uapi/linux/cec.h ++++ b/include/uapi/linux/cec.h +@@ -223,7 +223,7 @@ static inline int cec_msg_status_is_ok(const struct cec_msg *msg) + #define CEC_LOG_ADDR_BACKUP_2 13 + #define CEC_LOG_ADDR_SPECIFIC 14 + #define CEC_LOG_ADDR_UNREGISTERED 15 /* as initiator address */ +-#define CEC_LOG_ADDR_BROADCAST 15 /* ad destination address */ ++#define CEC_LOG_ADDR_BROADCAST 15 /* as destination address */ + + /* The logical address types that the CEC device wants to claim */ + #define CEC_LOG_ADDR_TYPE_TV 0 +diff --git a/include/uapi/linux/input-event-codes.h b/include/uapi/linux/input-event-codes.h +index 87cf351bab03..b0c5c4888a4b 100644 +--- a/include/uapi/linux/input-event-codes.h ++++ b/include/uapi/linux/input-event-codes.h +@@ -611,6 +611,37 @@ + #define KEY_KBDINPUTASSIST_ACCEPT 0x264 + #define KEY_KBDINPUTASSIST_CANCEL 0x265 + ++/* Diagonal movement keys */ ++#define KEY_RIGHT_UP 0x266 ++#define KEY_RIGHT_DOWN 0x267 ++#define KEY_LEFT_UP 0x268 ++#define KEY_LEFT_DOWN 0x269 ++ ++#define KEY_ROOT_MENU 0x26a /* Show Device's Root Menu */ ++/* Show Top Menu of the Media (e.g. DVD) */ ++#define KEY_MEDIA_TOP_MENU 0x26b ++#define KEY_NUMERIC_11 0x26c ++#define KEY_NUMERIC_12 0x26d ++/* ++ * Toggle Audio Description: refers to an audio service that helps blind and ++ * visually impaired consumers understand the action in a program. Note: in ++ * some countries this is referred to as "Video Description". ++ */ ++#define KEY_AUDIO_DESC 0x26e ++#define KEY_3D_MODE 0x26f ++#define KEY_NEXT_FAVORITE 0x270 ++#define KEY_STOP_RECORD 0x271 ++#define KEY_PAUSE_RECORD 0x272 ++#define KEY_VOD 0x273 /* Video on Demand */ ++#define KEY_UNMUTE 0x274 ++#define KEY_FASTREVERSE 0x275 ++#define KEY_SLOWREVERSE 0x276 ++/* ++ * Control a data application associated with the currently viewed channel, ++ * e.g. teletext or data broadcast application (MHEG, MHP, HbbTV, etc.) ++ */ ++#define KEY_DATA 0x277 ++ + #define BTN_TRIGGER_HAPPY 0x2c0 + #define BTN_TRIGGER_HAPPY1 0x2c0 + #define BTN_TRIGGER_HAPPY2 0x2c1 +diff --git a/include/uapi/linux/input.h b/include/uapi/linux/input.h +index 2758687300b4..41e8dff588e1 100644 +--- a/include/uapi/linux/input.h ++++ b/include/uapi/linux/input.h +@@ -246,6 +246,7 @@ struct input_mask { + #define BUS_GSC 0x1A + #define BUS_ATARI 0x1B + #define BUS_SPI 0x1C ++#define BUS_CEC 0x1E + + /* + * MT_TOOL types + +From d97e3abed49306c25ac724841c21c4705c55a6ea Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 4 Sep 2017 22:34:22 +0200 +Subject: [PATCH] BACKPORT: Pulse Eight HDMI CEC from v4.15 + +--- + MAINTAINERS | 7 + + drivers/input/serio/serport.c | 17 +- + drivers/media/usb/Kconfig | 5 + + drivers/media/usb/Makefile | 1 + + drivers/media/usb/pulse8-cec/Kconfig | 11 + + drivers/media/usb/pulse8-cec/Makefile | 1 + + drivers/media/usb/pulse8-cec/pulse8-cec.c | 757 ++++++++++++++++++++++++++++++ + include/uapi/linux/serio.h | 1 + + 8 files changed, 797 insertions(+), 3 deletions(-) + create mode 100644 drivers/media/usb/pulse8-cec/Kconfig + create mode 100644 drivers/media/usb/pulse8-cec/Makefile + create mode 100644 drivers/media/usb/pulse8-cec/pulse8-cec.c + +diff --git a/MAINTAINERS b/MAINTAINERS +index bb1aa323019c..3ba807edf5c6 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -8637,6 +8637,13 @@ F: include/linux/tracehook.h + F: include/uapi/linux/ptrace.h + F: kernel/ptrace.c + ++PULSE8-CEC DRIVER ++M: Hans Verkuil ++L: linux-media@vger.kernel.org ++T: git git://linuxtv.org/media_tree.git ++S: Maintained ++F: drivers/media/usb/pulse8-cec/* ++ + PVRUSB2 VIDEO4LINUX DRIVER + M: Mike Isely + L: pvrusb2@isely.net (subscribers-only) +diff --git a/drivers/input/serio/serport.c b/drivers/input/serio/serport.c +index 9c927d35c1f5..d189843f3727 100644 +--- a/drivers/input/serio/serport.c ++++ b/drivers/input/serio/serport.c +@@ -71,10 +71,7 @@ static void serport_serio_close(struct serio *serio) + + spin_lock_irqsave(&serport->lock, flags); + clear_bit(SERPORT_ACTIVE, &serport->flags); +- set_bit(SERPORT_DEAD, &serport->flags); + spin_unlock_irqrestore(&serport->lock, flags); +- +- wake_up_interruptible(&serport->wait); + } + + /* +@@ -248,6 +245,19 @@ static long serport_ldisc_compat_ioctl(struct tty_struct *tty, + } + #endif + ++static int serport_ldisc_hangup(struct tty_struct *tty) ++{ ++ struct serport *serport = (struct serport *) tty->disc_data; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&serport->lock, flags); ++ set_bit(SERPORT_DEAD, &serport->flags); ++ spin_unlock_irqrestore(&serport->lock, flags); ++ ++ wake_up_interruptible(&serport->wait); ++ return 0; ++} ++ + static void serport_ldisc_write_wakeup(struct tty_struct * tty) + { + struct serport *serport = (struct serport *) tty->disc_data; +@@ -274,6 +284,7 @@ static struct tty_ldisc_ops serport_ldisc = { + .compat_ioctl = serport_ldisc_compat_ioctl, + #endif + .receive_buf = serport_ldisc_receive, ++ .hangup = serport_ldisc_hangup, + .write_wakeup = serport_ldisc_write_wakeup + }; + +diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig +index 7496f332f3f5..c9644b62f91a 100644 +--- a/drivers/media/usb/Kconfig ++++ b/drivers/media/usb/Kconfig +@@ -60,5 +60,10 @@ source "drivers/media/usb/hackrf/Kconfig" + source "drivers/media/usb/msi2500/Kconfig" + endif + ++if MEDIA_CEC_SUPPORT ++ comment "USB HDMI CEC adapters" ++source "drivers/media/usb/pulse8-cec/Kconfig" ++endif ++ + endif #MEDIA_USB_SUPPORT + endif #USB +diff --git a/drivers/media/usb/Makefile b/drivers/media/usb/Makefile +index 8874ba774a34..0f15e3351ddc 100644 +--- a/drivers/media/usb/Makefile ++++ b/drivers/media/usb/Makefile +@@ -24,3 +24,4 @@ obj-$(CONFIG_VIDEO_EM28XX) += em28xx/ + obj-$(CONFIG_VIDEO_USBTV) += usbtv/ + obj-$(CONFIG_VIDEO_GO7007) += go7007/ + obj-$(CONFIG_DVB_AS102) += as102/ ++obj-$(CONFIG_USB_PULSE8_CEC) += pulse8-cec/ +diff --git a/drivers/media/usb/pulse8-cec/Kconfig b/drivers/media/usb/pulse8-cec/Kconfig +new file mode 100644 +index 000000000000..18ead44824ba +--- /dev/null ++++ b/drivers/media/usb/pulse8-cec/Kconfig +@@ -0,0 +1,11 @@ ++config USB_PULSE8_CEC ++ tristate "Pulse Eight HDMI CEC" ++ depends on USB_ACM ++ select CEC_CORE ++ select SERIO ++ select SERIO_SERPORT ++ ---help--- ++ This is a cec driver for the Pulse Eight HDMI CEC device. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called pulse8-cec. +diff --git a/drivers/media/usb/pulse8-cec/Makefile b/drivers/media/usb/pulse8-cec/Makefile +new file mode 100644 +index 000000000000..9800690bc25a +--- /dev/null ++++ b/drivers/media/usb/pulse8-cec/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_USB_PULSE8_CEC) += pulse8-cec.o +diff --git a/drivers/media/usb/pulse8-cec/pulse8-cec.c b/drivers/media/usb/pulse8-cec/pulse8-cec.c +new file mode 100644 +index 000000000000..50146f263d90 +--- /dev/null ++++ b/drivers/media/usb/pulse8-cec/pulse8-cec.c +@@ -0,0 +1,757 @@ ++/* ++ * Pulse Eight HDMI CEC driver ++ * ++ * Copyright 2016 Hans Verkuil ["Power On"], ["Power] or ["Power Toggle"], or if it ++ * receives with its own physical address. It also does this ++ * if it receives [0x03 0x00] from an LG TV. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++MODULE_AUTHOR("Hans Verkuil "); ++MODULE_DESCRIPTION("Pulse Eight HDMI CEC driver"); ++MODULE_LICENSE("GPL"); ++ ++static int debug; ++static int persistent_config; ++module_param(debug, int, 0644); ++module_param(persistent_config, int, 0644); ++MODULE_PARM_DESC(debug, "debug level (0-1)"); ++MODULE_PARM_DESC(persistent_config, "read config from persistent memory (0-1)"); ++ ++enum pulse8_msgcodes { ++ MSGCODE_NOTHING = 0, ++ MSGCODE_PING, ++ MSGCODE_TIMEOUT_ERROR, ++ MSGCODE_HIGH_ERROR, ++ MSGCODE_LOW_ERROR, ++ MSGCODE_FRAME_START, ++ MSGCODE_FRAME_DATA, ++ MSGCODE_RECEIVE_FAILED, ++ MSGCODE_COMMAND_ACCEPTED, /* 0x08 */ ++ MSGCODE_COMMAND_REJECTED, ++ MSGCODE_SET_ACK_MASK, ++ MSGCODE_TRANSMIT, ++ MSGCODE_TRANSMIT_EOM, ++ MSGCODE_TRANSMIT_IDLETIME, ++ MSGCODE_TRANSMIT_ACK_POLARITY, ++ MSGCODE_TRANSMIT_LINE_TIMEOUT, ++ MSGCODE_TRANSMIT_SUCCEEDED, /* 0x10 */ ++ MSGCODE_TRANSMIT_FAILED_LINE, ++ MSGCODE_TRANSMIT_FAILED_ACK, ++ MSGCODE_TRANSMIT_FAILED_TIMEOUT_DATA, ++ MSGCODE_TRANSMIT_FAILED_TIMEOUT_LINE, ++ MSGCODE_FIRMWARE_VERSION, ++ MSGCODE_START_BOOTLOADER, ++ MSGCODE_GET_BUILDDATE, ++ MSGCODE_SET_CONTROLLED, /* 0x18 */ ++ MSGCODE_GET_AUTO_ENABLED, ++ MSGCODE_SET_AUTO_ENABLED, ++ MSGCODE_GET_DEFAULT_LOGICAL_ADDRESS, ++ MSGCODE_SET_DEFAULT_LOGICAL_ADDRESS, ++ MSGCODE_GET_LOGICAL_ADDRESS_MASK, ++ MSGCODE_SET_LOGICAL_ADDRESS_MASK, ++ MSGCODE_GET_PHYSICAL_ADDRESS, ++ MSGCODE_SET_PHYSICAL_ADDRESS, /* 0x20 */ ++ MSGCODE_GET_DEVICE_TYPE, ++ MSGCODE_SET_DEVICE_TYPE, ++ MSGCODE_GET_HDMI_VERSION, ++ MSGCODE_SET_HDMI_VERSION, ++ MSGCODE_GET_OSD_NAME, ++ MSGCODE_SET_OSD_NAME, ++ MSGCODE_WRITE_EEPROM, ++ MSGCODE_GET_ADAPTER_TYPE, /* 0x28 */ ++ MSGCODE_SET_ACTIVE_SOURCE, ++ ++ MSGCODE_FRAME_EOM = 0x80, ++ MSGCODE_FRAME_ACK = 0x40, ++}; ++ ++#define MSGSTART 0xff ++#define MSGEND 0xfe ++#define MSGESC 0xfd ++#define MSGOFFSET 3 ++ ++#define DATA_SIZE 256 ++ ++#define PING_PERIOD (15 * HZ) ++ ++struct pulse8 { ++ struct device *dev; ++ struct serio *serio; ++ struct cec_adapter *adap; ++ unsigned int vers; ++ struct completion cmd_done; ++ struct work_struct work; ++ struct delayed_work ping_eeprom_work; ++ struct cec_msg rx_msg; ++ u8 data[DATA_SIZE]; ++ unsigned int len; ++ u8 buf[DATA_SIZE]; ++ unsigned int idx; ++ bool escape; ++ bool started; ++ struct mutex config_lock; ++ struct mutex write_lock; ++ bool config_pending; ++ bool restoring_config; ++ bool autonomous; ++}; ++ ++static void pulse8_ping_eeprom_work_handler(struct work_struct *work); ++ ++static void pulse8_irq_work_handler(struct work_struct *work) ++{ ++ struct pulse8 *pulse8 = ++ container_of(work, struct pulse8, work); ++ ++ switch (pulse8->data[0] & 0x3f) { ++ case MSGCODE_FRAME_DATA: ++ cec_received_msg(pulse8->adap, &pulse8->rx_msg); ++ break; ++ case MSGCODE_TRANSMIT_SUCCEEDED: ++ cec_transmit_attempt_done(pulse8->adap, CEC_TX_STATUS_OK); ++ break; ++ case MSGCODE_TRANSMIT_FAILED_ACK: ++ cec_transmit_attempt_done(pulse8->adap, CEC_TX_STATUS_NACK); ++ break; ++ case MSGCODE_TRANSMIT_FAILED_LINE: ++ case MSGCODE_TRANSMIT_FAILED_TIMEOUT_DATA: ++ case MSGCODE_TRANSMIT_FAILED_TIMEOUT_LINE: ++ cec_transmit_attempt_done(pulse8->adap, CEC_TX_STATUS_ERROR); ++ break; ++ } ++} ++ ++static irqreturn_t pulse8_interrupt(struct serio *serio, unsigned char data, ++ unsigned int flags) ++{ ++ struct pulse8 *pulse8 = serio_get_drvdata(serio); ++ ++ if (!pulse8->started && data != MSGSTART) ++ return IRQ_HANDLED; ++ if (data == MSGESC) { ++ pulse8->escape = true; ++ return IRQ_HANDLED; ++ } ++ if (pulse8->escape) { ++ data += MSGOFFSET; ++ pulse8->escape = false; ++ } else if (data == MSGEND) { ++ struct cec_msg *msg = &pulse8->rx_msg; ++ ++ if (debug) ++ dev_info(pulse8->dev, "received: %*ph\n", ++ pulse8->idx, pulse8->buf); ++ pulse8->data[0] = pulse8->buf[0]; ++ switch (pulse8->buf[0] & 0x3f) { ++ case MSGCODE_FRAME_START: ++ msg->len = 1; ++ msg->msg[0] = pulse8->buf[1]; ++ break; ++ case MSGCODE_FRAME_DATA: ++ if (msg->len == CEC_MAX_MSG_SIZE) ++ break; ++ msg->msg[msg->len++] = pulse8->buf[1]; ++ if (pulse8->buf[0] & MSGCODE_FRAME_EOM) ++ schedule_work(&pulse8->work); ++ break; ++ case MSGCODE_TRANSMIT_SUCCEEDED: ++ case MSGCODE_TRANSMIT_FAILED_LINE: ++ case MSGCODE_TRANSMIT_FAILED_ACK: ++ case MSGCODE_TRANSMIT_FAILED_TIMEOUT_DATA: ++ case MSGCODE_TRANSMIT_FAILED_TIMEOUT_LINE: ++ schedule_work(&pulse8->work); ++ break; ++ case MSGCODE_HIGH_ERROR: ++ case MSGCODE_LOW_ERROR: ++ case MSGCODE_RECEIVE_FAILED: ++ case MSGCODE_TIMEOUT_ERROR: ++ break; ++ case MSGCODE_COMMAND_ACCEPTED: ++ case MSGCODE_COMMAND_REJECTED: ++ default: ++ if (pulse8->idx == 0) ++ break; ++ memcpy(pulse8->data, pulse8->buf, pulse8->idx); ++ pulse8->len = pulse8->idx; ++ complete(&pulse8->cmd_done); ++ break; ++ } ++ pulse8->idx = 0; ++ pulse8->started = false; ++ return IRQ_HANDLED; ++ } else if (data == MSGSTART) { ++ pulse8->idx = 0; ++ pulse8->started = true; ++ return IRQ_HANDLED; ++ } ++ ++ if (pulse8->idx >= DATA_SIZE) { ++ dev_dbg(pulse8->dev, ++ "throwing away %d bytes of garbage\n", pulse8->idx); ++ pulse8->idx = 0; ++ } ++ pulse8->buf[pulse8->idx++] = data; ++ return IRQ_HANDLED; ++} ++ ++static void pulse8_disconnect(struct serio *serio) ++{ ++ struct pulse8 *pulse8 = serio_get_drvdata(serio); ++ ++ cec_unregister_adapter(pulse8->adap); ++ cancel_delayed_work_sync(&pulse8->ping_eeprom_work); ++ dev_info(&serio->dev, "disconnected\n"); ++ serio_close(serio); ++ serio_set_drvdata(serio, NULL); ++ kfree(pulse8); ++} ++ ++static int pulse8_send(struct serio *serio, const u8 *command, u8 cmd_len) ++{ ++ int err = 0; ++ ++ err = serio_write(serio, MSGSTART); ++ if (err) ++ return err; ++ for (; !err && cmd_len; command++, cmd_len--) { ++ if (*command >= MSGESC) { ++ err = serio_write(serio, MSGESC); ++ if (!err) ++ err = serio_write(serio, *command - MSGOFFSET); ++ } else { ++ err = serio_write(serio, *command); ++ } ++ } ++ if (!err) ++ err = serio_write(serio, MSGEND); ++ ++ return err; ++} ++ ++static int pulse8_send_and_wait_once(struct pulse8 *pulse8, ++ const u8 *cmd, u8 cmd_len, ++ u8 response, u8 size) ++{ ++ int err; ++ ++ /*dev_info(pulse8->dev, "transmit: %*ph\n", cmd_len, cmd);*/ ++ init_completion(&pulse8->cmd_done); ++ ++ err = pulse8_send(pulse8->serio, cmd, cmd_len); ++ if (err) ++ return err; ++ ++ if (!wait_for_completion_timeout(&pulse8->cmd_done, HZ)) ++ return -ETIMEDOUT; ++ if ((pulse8->data[0] & 0x3f) == MSGCODE_COMMAND_REJECTED && ++ cmd[0] != MSGCODE_SET_CONTROLLED && ++ cmd[0] != MSGCODE_SET_AUTO_ENABLED && ++ cmd[0] != MSGCODE_GET_BUILDDATE) ++ return -ENOTTY; ++ if (response && ++ ((pulse8->data[0] & 0x3f) != response || pulse8->len < size + 1)) { ++ dev_info(pulse8->dev, "transmit: failed %02x\n", ++ pulse8->data[0] & 0x3f); ++ return -EIO; ++ } ++ return 0; ++} ++ ++static int pulse8_send_and_wait(struct pulse8 *pulse8, ++ const u8 *cmd, u8 cmd_len, u8 response, u8 size) ++{ ++ u8 cmd_sc[2]; ++ int err; ++ ++ mutex_lock(&pulse8->write_lock); ++ err = pulse8_send_and_wait_once(pulse8, cmd, cmd_len, response, size); ++ ++ if (err == -ENOTTY) { ++ cmd_sc[0] = MSGCODE_SET_CONTROLLED; ++ cmd_sc[1] = 1; ++ err = pulse8_send_and_wait_once(pulse8, cmd_sc, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ if (err) ++ goto unlock; ++ err = pulse8_send_and_wait_once(pulse8, cmd, cmd_len, ++ response, size); ++ } ++ ++unlock: ++ mutex_unlock(&pulse8->write_lock); ++ return err == -ENOTTY ? -EIO : err; ++} ++ ++static int pulse8_setup(struct pulse8 *pulse8, struct serio *serio, ++ struct cec_log_addrs *log_addrs, u16 *pa) ++{ ++ u8 *data = pulse8->data + 1; ++ u8 cmd[2]; ++ int err; ++ struct tm tm; ++ time_t date; ++ ++ pulse8->vers = 0; ++ ++ cmd[0] = MSGCODE_FIRMWARE_VERSION; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 2); ++ if (err) ++ return err; ++ pulse8->vers = (data[0] << 8) | data[1]; ++ dev_info(pulse8->dev, "Firmware version %04x\n", pulse8->vers); ++ if (pulse8->vers < 2) { ++ *pa = CEC_PHYS_ADDR_INVALID; ++ return 0; ++ } ++ ++ cmd[0] = MSGCODE_GET_BUILDDATE; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 4); ++ if (err) ++ return err; ++ date = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]; ++ time_to_tm(date, 0, &tm); ++ dev_info(pulse8->dev, "Firmware build date %04ld.%02d.%02d %02d:%02d:%02d\n", ++ tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, ++ tm.tm_hour, tm.tm_min, tm.tm_sec); ++ ++ dev_dbg(pulse8->dev, "Persistent config:\n"); ++ cmd[0] = MSGCODE_GET_AUTO_ENABLED; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); ++ if (err) ++ return err; ++ pulse8->autonomous = data[0]; ++ dev_dbg(pulse8->dev, "Autonomous mode: %s", ++ data[0] ? "on" : "off"); ++ ++ cmd[0] = MSGCODE_GET_DEVICE_TYPE; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); ++ if (err) ++ return err; ++ log_addrs->primary_device_type[0] = data[0]; ++ dev_dbg(pulse8->dev, "Primary device type: %d\n", data[0]); ++ switch (log_addrs->primary_device_type[0]) { ++ case CEC_OP_PRIM_DEVTYPE_TV: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_TV; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_TV; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_RECORD: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_RECORD; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_RECORD; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_TUNER: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_TUNER; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_TUNER; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_PLAYBACK: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_PLAYBACK; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_PLAYBACK; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_PLAYBACK; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_SWITCH: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_UNREGISTERED; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_SWITCH; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_PROCESSOR: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_SPECIFIC; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_SWITCH; ++ break; ++ default: ++ log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_UNREGISTERED; ++ log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_SWITCH; ++ dev_info(pulse8->dev, "Unknown Primary Device Type: %d\n", ++ log_addrs->primary_device_type[0]); ++ break; ++ } ++ ++ cmd[0] = MSGCODE_GET_LOGICAL_ADDRESS_MASK; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 2); ++ if (err) ++ return err; ++ log_addrs->log_addr_mask = (data[0] << 8) | data[1]; ++ dev_dbg(pulse8->dev, "Logical address ACK mask: %x\n", ++ log_addrs->log_addr_mask); ++ if (log_addrs->log_addr_mask) ++ log_addrs->num_log_addrs = 1; ++ ++ cmd[0] = MSGCODE_GET_PHYSICAL_ADDRESS; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); ++ if (err) ++ return err; ++ *pa = (data[0] << 8) | data[1]; ++ dev_dbg(pulse8->dev, "Physical address: %x.%x.%x.%x\n", ++ cec_phys_addr_exp(*pa)); ++ ++ cmd[0] = MSGCODE_GET_HDMI_VERSION; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); ++ if (err) ++ return err; ++ log_addrs->cec_version = data[0]; ++ dev_dbg(pulse8->dev, "CEC version: %d\n", log_addrs->cec_version); ++ ++ cmd[0] = MSGCODE_GET_OSD_NAME; ++ err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 0); ++ if (err) ++ return err; ++ strncpy(log_addrs->osd_name, data, 13); ++ dev_dbg(pulse8->dev, "OSD name: %s\n", log_addrs->osd_name); ++ ++ return 0; ++} ++ ++static int pulse8_apply_persistent_config(struct pulse8 *pulse8, ++ struct cec_log_addrs *log_addrs, ++ u16 pa) ++{ ++ int err; ++ ++ err = cec_s_log_addrs(pulse8->adap, log_addrs, false); ++ if (err) ++ return err; ++ ++ cec_s_phys_addr(pulse8->adap, pa, false); ++ ++ return 0; ++} ++ ++static int pulse8_cec_adap_enable(struct cec_adapter *adap, bool enable) ++{ ++ struct pulse8 *pulse8 = cec_get_drvdata(adap); ++ u8 cmd[16]; ++ int err; ++ ++ cmd[0] = MSGCODE_SET_CONTROLLED; ++ cmd[1] = enable; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ return enable ? err : 0; ++} ++ ++static int pulse8_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr) ++{ ++ struct pulse8 *pulse8 = cec_get_drvdata(adap); ++ u16 mask = 0; ++ u16 pa = adap->phys_addr; ++ u8 cmd[16]; ++ int err = 0; ++ ++ mutex_lock(&pulse8->config_lock); ++ if (log_addr != CEC_LOG_ADDR_INVALID) ++ mask = 1 << log_addr; ++ cmd[0] = MSGCODE_SET_ACK_MASK; ++ cmd[1] = mask >> 8; ++ cmd[2] = mask & 0xff; ++ err = pulse8_send_and_wait(pulse8, cmd, 3, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if ((err && mask != 0) || pulse8->restoring_config) ++ goto unlock; ++ ++ cmd[0] = MSGCODE_SET_AUTO_ENABLED; ++ cmd[1] = log_addr == CEC_LOG_ADDR_INVALID ? 0 : 1; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ pulse8->autonomous = cmd[1]; ++ if (log_addr == CEC_LOG_ADDR_INVALID) ++ goto unlock; ++ ++ cmd[0] = MSGCODE_SET_DEVICE_TYPE; ++ cmd[1] = adap->log_addrs.primary_device_type[0]; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ ++ switch (adap->log_addrs.primary_device_type[0]) { ++ case CEC_OP_PRIM_DEVTYPE_TV: ++ mask = CEC_LOG_ADDR_MASK_TV; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_RECORD: ++ mask = CEC_LOG_ADDR_MASK_RECORD; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_TUNER: ++ mask = CEC_LOG_ADDR_MASK_TUNER; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_PLAYBACK: ++ mask = CEC_LOG_ADDR_MASK_PLAYBACK; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM: ++ mask = CEC_LOG_ADDR_MASK_AUDIOSYSTEM; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_SWITCH: ++ mask = CEC_LOG_ADDR_MASK_UNREGISTERED; ++ break; ++ case CEC_OP_PRIM_DEVTYPE_PROCESSOR: ++ mask = CEC_LOG_ADDR_MASK_SPECIFIC; ++ break; ++ default: ++ mask = 0; ++ break; ++ } ++ cmd[0] = MSGCODE_SET_LOGICAL_ADDRESS_MASK; ++ cmd[1] = mask >> 8; ++ cmd[2] = mask & 0xff; ++ err = pulse8_send_and_wait(pulse8, cmd, 3, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ ++ cmd[0] = MSGCODE_SET_DEFAULT_LOGICAL_ADDRESS; ++ cmd[1] = log_addr; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ ++ cmd[0] = MSGCODE_SET_PHYSICAL_ADDRESS; ++ cmd[1] = pa >> 8; ++ cmd[2] = pa & 0xff; ++ err = pulse8_send_and_wait(pulse8, cmd, 3, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ ++ cmd[0] = MSGCODE_SET_HDMI_VERSION; ++ cmd[1] = adap->log_addrs.cec_version; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ ++ if (adap->log_addrs.osd_name[0]) { ++ size_t osd_len = strlen(adap->log_addrs.osd_name); ++ char *osd_str = cmd + 1; ++ ++ cmd[0] = MSGCODE_SET_OSD_NAME; ++ strncpy(cmd + 1, adap->log_addrs.osd_name, 13); ++ if (osd_len < 4) { ++ memset(osd_str + osd_len, ' ', 4 - osd_len); ++ osd_len = 4; ++ osd_str[osd_len] = '\0'; ++ strcpy(adap->log_addrs.osd_name, osd_str); ++ } ++ err = pulse8_send_and_wait(pulse8, cmd, 1 + osd_len, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ if (err) ++ goto unlock; ++ } ++ ++unlock: ++ if (pulse8->restoring_config) ++ pulse8->restoring_config = false; ++ else ++ pulse8->config_pending = true; ++ mutex_unlock(&pulse8->config_lock); ++ return err; ++} ++ ++static int pulse8_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, ++ u32 signal_free_time, struct cec_msg *msg) ++{ ++ struct pulse8 *pulse8 = cec_get_drvdata(adap); ++ u8 cmd[2]; ++ unsigned int i; ++ int err; ++ ++ cmd[0] = MSGCODE_TRANSMIT_IDLETIME; ++ cmd[1] = signal_free_time; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ cmd[0] = MSGCODE_TRANSMIT_ACK_POLARITY; ++ cmd[1] = cec_msg_is_broadcast(msg); ++ if (!err) ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ cmd[0] = msg->len == 1 ? MSGCODE_TRANSMIT_EOM : MSGCODE_TRANSMIT; ++ cmd[1] = msg->msg[0]; ++ if (!err) ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ if (!err && msg->len > 1) { ++ cmd[0] = msg->len == 2 ? MSGCODE_TRANSMIT_EOM : ++ MSGCODE_TRANSMIT; ++ cmd[1] = msg->msg[1]; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ for (i = 0; !err && i + 2 < msg->len; i++) { ++ cmd[0] = (i + 2 == msg->len - 1) ? ++ MSGCODE_TRANSMIT_EOM : MSGCODE_TRANSMIT; ++ cmd[1] = msg->msg[i + 2]; ++ err = pulse8_send_and_wait(pulse8, cmd, 2, ++ MSGCODE_COMMAND_ACCEPTED, 1); ++ } ++ } ++ ++ return err; ++} ++ ++static int pulse8_received(struct cec_adapter *adap, struct cec_msg *msg) ++{ ++ return -ENOMSG; ++} ++ ++static const struct cec_adap_ops pulse8_cec_adap_ops = { ++ .adap_enable = pulse8_cec_adap_enable, ++ .adap_log_addr = pulse8_cec_adap_log_addr, ++ .adap_transmit = pulse8_cec_adap_transmit, ++ .received = pulse8_received, ++}; ++ ++static int pulse8_connect(struct serio *serio, struct serio_driver *drv) ++{ ++ u32 caps = CEC_CAP_DEFAULTS | CEC_CAP_PHYS_ADDR | CEC_CAP_MONITOR_ALL; ++ struct pulse8 *pulse8; ++ int err = -ENOMEM; ++ struct cec_log_addrs log_addrs = {}; ++ u16 pa = CEC_PHYS_ADDR_INVALID; ++ ++ pulse8 = kzalloc(sizeof(*pulse8), GFP_KERNEL); ++ ++ if (!pulse8) ++ return -ENOMEM; ++ ++ pulse8->serio = serio; ++ pulse8->adap = cec_allocate_adapter(&pulse8_cec_adap_ops, pulse8, ++ dev_name(&serio->dev), caps, 1); ++ err = PTR_ERR_OR_ZERO(pulse8->adap); ++ if (err < 0) ++ goto free_device; ++ ++ pulse8->dev = &serio->dev; ++ serio_set_drvdata(serio, pulse8); ++ INIT_WORK(&pulse8->work, pulse8_irq_work_handler); ++ mutex_init(&pulse8->write_lock); ++ mutex_init(&pulse8->config_lock); ++ pulse8->config_pending = false; ++ ++ err = serio_open(serio, drv); ++ if (err) ++ goto delete_adap; ++ ++ err = pulse8_setup(pulse8, serio, &log_addrs, &pa); ++ if (err) ++ goto close_serio; ++ ++ err = cec_register_adapter(pulse8->adap, &serio->dev); ++ if (err < 0) ++ goto close_serio; ++ ++ pulse8->dev = &pulse8->adap->devnode.dev; ++ ++ if (persistent_config && pulse8->autonomous) { ++ err = pulse8_apply_persistent_config(pulse8, &log_addrs, pa); ++ if (err) ++ goto close_serio; ++ pulse8->restoring_config = true; ++ } ++ ++ INIT_DELAYED_WORK(&pulse8->ping_eeprom_work, ++ pulse8_ping_eeprom_work_handler); ++ schedule_delayed_work(&pulse8->ping_eeprom_work, PING_PERIOD); ++ ++ return 0; ++ ++close_serio: ++ serio_close(serio); ++delete_adap: ++ cec_delete_adapter(pulse8->adap); ++ serio_set_drvdata(serio, NULL); ++free_device: ++ kfree(pulse8); ++ return err; ++} ++ ++static void pulse8_ping_eeprom_work_handler(struct work_struct *work) ++{ ++ struct pulse8 *pulse8 = ++ container_of(work, struct pulse8, ping_eeprom_work.work); ++ u8 cmd; ++ ++ schedule_delayed_work(&pulse8->ping_eeprom_work, PING_PERIOD); ++ cmd = MSGCODE_PING; ++ pulse8_send_and_wait(pulse8, &cmd, 1, ++ MSGCODE_COMMAND_ACCEPTED, 0); ++ ++ if (pulse8->vers < 2) ++ return; ++ ++ mutex_lock(&pulse8->config_lock); ++ if (pulse8->config_pending && persistent_config) { ++ dev_dbg(pulse8->dev, "writing pending config to EEPROM\n"); ++ cmd = MSGCODE_WRITE_EEPROM; ++ if (pulse8_send_and_wait(pulse8, &cmd, 1, ++ MSGCODE_COMMAND_ACCEPTED, 0)) ++ dev_info(pulse8->dev, "failed to write pending config to EEPROM\n"); ++ else ++ pulse8->config_pending = false; ++ } ++ mutex_unlock(&pulse8->config_lock); ++} ++ ++static const struct serio_device_id pulse8_serio_ids[] = { ++ { ++ .type = SERIO_RS232, ++ .proto = SERIO_PULSE8_CEC, ++ .id = SERIO_ANY, ++ .extra = SERIO_ANY, ++ }, ++ { 0 } ++}; ++ ++MODULE_DEVICE_TABLE(serio, pulse8_serio_ids); ++ ++static struct serio_driver pulse8_drv = { ++ .driver = { ++ .name = "pulse8-cec", ++ }, ++ .description = "Pulse Eight HDMI CEC driver", ++ .id_table = pulse8_serio_ids, ++ .interrupt = pulse8_interrupt, ++ .connect = pulse8_connect, ++ .disconnect = pulse8_disconnect, ++}; ++ ++module_serio_driver(pulse8_drv); +diff --git a/include/uapi/linux/serio.h b/include/uapi/linux/serio.h +index becdd78295cc..4588c66a8df0 100644 +--- a/include/uapi/linux/serio.h ++++ b/include/uapi/linux/serio.h +@@ -77,5 +77,6 @@ + #define SERIO_PS2MULT 0x3c + #define SERIO_TSC40 0x3d + #define SERIO_WACOM_IV 0x3e ++#define SERIO_PULSE8_CEC 0x40 + + #endif /* _UAPI_SERIO_H */ + +From 6af6d21e67410357403b1f99082ab2c825044657 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 4 Sep 2017 22:34:24 +0200 +Subject: [PATCH] BACKPORT: RainShadow Tech HDMI CEC from v4.15 + +--- + MAINTAINERS | 7 + + drivers/media/usb/Kconfig | 1 + + drivers/media/usb/Makefile | 1 + + drivers/media/usb/rainshadow-cec/Kconfig | 11 + + drivers/media/usb/rainshadow-cec/Makefile | 1 + + drivers/media/usb/rainshadow-cec/rainshadow-cec.c | 384 ++++++++++++++++++++++ + include/uapi/linux/serio.h | 1 + + 7 files changed, 406 insertions(+) + create mode 100644 drivers/media/usb/rainshadow-cec/Kconfig + create mode 100644 drivers/media/usb/rainshadow-cec/Makefile + create mode 100644 drivers/media/usb/rainshadow-cec/rainshadow-cec.c + +diff --git a/MAINTAINERS b/MAINTAINERS +index 3ba807edf5c6..c6413ddaa627 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -8876,6 +8876,13 @@ L: linux-fbdev@vger.kernel.org + S: Maintained + F: drivers/video/fbdev/aty/aty128fb.c + ++RAINSHADOW-CEC DRIVER ++M: Hans Verkuil ++L: linux-media@vger.kernel.org ++T: git git://linuxtv.org/media_tree.git ++S: Maintained ++F: drivers/media/usb/rainshadow-cec/* ++ + RALINK RT2X00 WIRELESS LAN DRIVER + P: rt2x00 project + M: Stanislaw Gruszka +diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig +index c9644b62f91a..b24e753c4766 100644 +--- a/drivers/media/usb/Kconfig ++++ b/drivers/media/usb/Kconfig +@@ -63,6 +63,7 @@ endif + if MEDIA_CEC_SUPPORT + comment "USB HDMI CEC adapters" + source "drivers/media/usb/pulse8-cec/Kconfig" ++source "drivers/media/usb/rainshadow-cec/Kconfig" + endif + + endif #MEDIA_USB_SUPPORT +diff --git a/drivers/media/usb/Makefile b/drivers/media/usb/Makefile +index 0f15e3351ddc..738b993ec8b0 100644 +--- a/drivers/media/usb/Makefile ++++ b/drivers/media/usb/Makefile +@@ -25,3 +25,4 @@ obj-$(CONFIG_VIDEO_USBTV) += usbtv/ + obj-$(CONFIG_VIDEO_GO7007) += go7007/ + obj-$(CONFIG_DVB_AS102) += as102/ + obj-$(CONFIG_USB_PULSE8_CEC) += pulse8-cec/ ++obj-$(CONFIG_USB_RAINSHADOW_CEC) += rainshadow-cec/ +diff --git a/drivers/media/usb/rainshadow-cec/Kconfig b/drivers/media/usb/rainshadow-cec/Kconfig +new file mode 100644 +index 000000000000..030ef01b1ff0 +--- /dev/null ++++ b/drivers/media/usb/rainshadow-cec/Kconfig +@@ -0,0 +1,11 @@ ++config USB_RAINSHADOW_CEC ++ tristate "RainShadow Tech HDMI CEC" ++ depends on USB_ACM ++ select CEC_CORE ++ select SERIO ++ select SERIO_SERPORT ++ ---help--- ++ This is a cec driver for the RainShadow Tech HDMI CEC device. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called rainshadow-cec. +diff --git a/drivers/media/usb/rainshadow-cec/Makefile b/drivers/media/usb/rainshadow-cec/Makefile +new file mode 100644 +index 000000000000..a79fbc77e1f7 +--- /dev/null ++++ b/drivers/media/usb/rainshadow-cec/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_USB_RAINSHADOW_CEC) += rainshadow-cec.o +diff --git a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c +new file mode 100644 +index 000000000000..cecdcbcd400c +--- /dev/null ++++ b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c +@@ -0,0 +1,384 @@ ++/* ++ * RainShadow Tech HDMI CEC driver ++ * ++ * Copyright 2016 Hans Verkuil ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++MODULE_AUTHOR("Hans Verkuil "); ++MODULE_DESCRIPTION("RainShadow Tech HDMI CEC driver"); ++MODULE_LICENSE("GPL"); ++ ++#define DATA_SIZE 256 ++ ++struct rain { ++ struct device *dev; ++ struct serio *serio; ++ struct cec_adapter *adap; ++ struct completion cmd_done; ++ struct work_struct work; ++ ++ /* Low-level ringbuffer, collecting incoming characters */ ++ char buf[DATA_SIZE]; ++ unsigned int buf_rd_idx; ++ unsigned int buf_wr_idx; ++ unsigned int buf_len; ++ spinlock_t buf_lock; ++ ++ /* command buffer */ ++ char cmd[DATA_SIZE]; ++ unsigned int cmd_idx; ++ bool cmd_started; ++ ++ /* reply to a command, only used to store the firmware version */ ++ char cmd_reply[DATA_SIZE]; ++ ++ struct mutex write_lock; ++}; ++ ++static void rain_process_msg(struct rain *rain) ++{ ++ struct cec_msg msg = {}; ++ const char *cmd = rain->cmd + 3; ++ int stat = -1; ++ ++ for (; *cmd; cmd++) { ++ if (!isxdigit(*cmd)) ++ continue; ++ if (isxdigit(cmd[0]) && isxdigit(cmd[1])) { ++ if (msg.len == CEC_MAX_MSG_SIZE) ++ break; ++ if (hex2bin(msg.msg + msg.len, cmd, 1)) ++ continue; ++ msg.len++; ++ cmd++; ++ continue; ++ } ++ if (!cmd[1]) ++ stat = hex_to_bin(cmd[0]); ++ break; ++ } ++ ++ if (rain->cmd[0] == 'R') { ++ if (stat == 1 || stat == 2) ++ cec_received_msg(rain->adap, &msg); ++ return; ++ } ++ ++ switch (stat) { ++ case 1: ++ cec_transmit_attempt_done(rain->adap, CEC_TX_STATUS_OK); ++ break; ++ case 2: ++ cec_transmit_attempt_done(rain->adap, CEC_TX_STATUS_NACK); ++ break; ++ default: ++ cec_transmit_attempt_done(rain->adap, CEC_TX_STATUS_LOW_DRIVE); ++ break; ++ } ++} ++ ++static void rain_irq_work_handler(struct work_struct *work) ++{ ++ struct rain *rain = ++ container_of(work, struct rain, work); ++ ++ while (true) { ++ unsigned long flags; ++ char data; ++ ++ spin_lock_irqsave(&rain->buf_lock, flags); ++ if (!rain->buf_len) { ++ spin_unlock_irqrestore(&rain->buf_lock, flags); ++ break; ++ } ++ ++ data = rain->buf[rain->buf_rd_idx]; ++ rain->buf_len--; ++ rain->buf_rd_idx = (rain->buf_rd_idx + 1) & 0xff; ++ ++ spin_unlock_irqrestore(&rain->buf_lock, flags); ++ ++ if (!rain->cmd_started && data != '?') ++ continue; ++ ++ switch (data) { ++ case '\r': ++ rain->cmd[rain->cmd_idx] = '\0'; ++ dev_dbg(rain->dev, "received: %s\n", rain->cmd); ++ if (!memcmp(rain->cmd, "REC", 3) || ++ !memcmp(rain->cmd, "STA", 3)) { ++ rain_process_msg(rain); ++ } else { ++ strcpy(rain->cmd_reply, rain->cmd); ++ complete(&rain->cmd_done); ++ } ++ rain->cmd_idx = 0; ++ rain->cmd_started = false; ++ break; ++ ++ case '\n': ++ rain->cmd_idx = 0; ++ rain->cmd_started = false; ++ break; ++ ++ case '?': ++ rain->cmd_idx = 0; ++ rain->cmd_started = true; ++ break; ++ ++ default: ++ if (rain->cmd_idx >= DATA_SIZE - 1) { ++ dev_dbg(rain->dev, ++ "throwing away %d bytes of garbage\n", rain->cmd_idx); ++ rain->cmd_idx = 0; ++ } ++ rain->cmd[rain->cmd_idx++] = data; ++ break; ++ } ++ } ++} ++ ++static irqreturn_t rain_interrupt(struct serio *serio, unsigned char data, ++ unsigned int flags) ++{ ++ struct rain *rain = serio_get_drvdata(serio); ++ ++ if (rain->buf_len == DATA_SIZE) { ++ dev_warn_once(rain->dev, "buffer overflow\n"); ++ return IRQ_HANDLED; ++ } ++ spin_lock(&rain->buf_lock); ++ rain->buf_len++; ++ rain->buf[rain->buf_wr_idx] = data; ++ rain->buf_wr_idx = (rain->buf_wr_idx + 1) & 0xff; ++ spin_unlock(&rain->buf_lock); ++ schedule_work(&rain->work); ++ return IRQ_HANDLED; ++} ++ ++static void rain_disconnect(struct serio *serio) ++{ ++ struct rain *rain = serio_get_drvdata(serio); ++ ++ cancel_work_sync(&rain->work); ++ cec_unregister_adapter(rain->adap); ++ dev_info(&serio->dev, "disconnected\n"); ++ serio_close(serio); ++ serio_set_drvdata(serio, NULL); ++ kfree(rain); ++} ++ ++static int rain_send(struct rain *rain, const char *command) ++{ ++ int err = serio_write(rain->serio, '!'); ++ ++ dev_dbg(rain->dev, "send: %s\n", command); ++ while (!err && *command) ++ err = serio_write(rain->serio, *command++); ++ if (!err) ++ err = serio_write(rain->serio, '~'); ++ ++ return err; ++} ++ ++static int rain_send_and_wait(struct rain *rain, ++ const char *cmd, const char *reply) ++{ ++ int err; ++ ++ init_completion(&rain->cmd_done); ++ ++ mutex_lock(&rain->write_lock); ++ err = rain_send(rain, cmd); ++ if (err) ++ goto err; ++ ++ if (!wait_for_completion_timeout(&rain->cmd_done, HZ)) { ++ err = -ETIMEDOUT; ++ goto err; ++ } ++ if (reply && strncmp(rain->cmd_reply, reply, strlen(reply))) { ++ dev_dbg(rain->dev, ++ "transmit of '%s': received '%s' instead of '%s'\n", ++ cmd, rain->cmd_reply, reply); ++ err = -EIO; ++ } ++err: ++ mutex_unlock(&rain->write_lock); ++ return err; ++} ++ ++static int rain_setup(struct rain *rain, struct serio *serio, ++ struct cec_log_addrs *log_addrs, u16 *pa) ++{ ++ int err; ++ ++ err = rain_send_and_wait(rain, "R", "REV"); ++ if (err) ++ return err; ++ dev_info(rain->dev, "Firmware version %s\n", rain->cmd_reply + 4); ++ ++ err = rain_send_and_wait(rain, "Q 1", "QTY"); ++ if (err) ++ return err; ++ err = rain_send_and_wait(rain, "c0000", "CFG"); ++ if (err) ++ return err; ++ return rain_send_and_wait(rain, "A F 0000", "ADR"); ++} ++ ++static int rain_cec_adap_enable(struct cec_adapter *adap, bool enable) ++{ ++ return 0; ++} ++ ++static int rain_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr) ++{ ++ struct rain *rain = cec_get_drvdata(adap); ++ u8 cmd[16]; ++ ++ if (log_addr == CEC_LOG_ADDR_INVALID) ++ log_addr = CEC_LOG_ADDR_UNREGISTERED; ++ snprintf(cmd, sizeof(cmd), "A %x", log_addr); ++ return rain_send_and_wait(rain, cmd, "ADR"); ++} ++ ++static int rain_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, ++ u32 signal_free_time, struct cec_msg *msg) ++{ ++ struct rain *rain = cec_get_drvdata(adap); ++ char cmd[2 * CEC_MAX_MSG_SIZE + 16]; ++ unsigned int i; ++ int err; ++ ++ if (msg->len == 1) { ++ snprintf(cmd, sizeof(cmd), "x%x", cec_msg_destination(msg)); ++ } else { ++ char hex[3]; ++ ++ snprintf(cmd, sizeof(cmd), "x%x %02x ", ++ cec_msg_destination(msg), msg->msg[1]); ++ for (i = 2; i < msg->len; i++) { ++ snprintf(hex, sizeof(hex), "%02x", msg->msg[i]); ++ strlcat(cmd, hex, sizeof(cmd)); ++ } ++ } ++ mutex_lock(&rain->write_lock); ++ err = rain_send(rain, cmd); ++ mutex_unlock(&rain->write_lock); ++ return err; ++} ++ ++static const struct cec_adap_ops rain_cec_adap_ops = { ++ .adap_enable = rain_cec_adap_enable, ++ .adap_log_addr = rain_cec_adap_log_addr, ++ .adap_transmit = rain_cec_adap_transmit, ++}; ++ ++static int rain_connect(struct serio *serio, struct serio_driver *drv) ++{ ++ u32 caps = CEC_CAP_DEFAULTS | CEC_CAP_PHYS_ADDR | CEC_CAP_MONITOR_ALL; ++ struct rain *rain; ++ int err = -ENOMEM; ++ struct cec_log_addrs log_addrs = {}; ++ u16 pa = CEC_PHYS_ADDR_INVALID; ++ ++ rain = kzalloc(sizeof(*rain), GFP_KERNEL); ++ ++ if (!rain) ++ return -ENOMEM; ++ ++ rain->serio = serio; ++ rain->adap = cec_allocate_adapter(&rain_cec_adap_ops, rain, ++ dev_name(&serio->dev), caps, 1); ++ err = PTR_ERR_OR_ZERO(rain->adap); ++ if (err < 0) ++ goto free_device; ++ ++ rain->dev = &serio->dev; ++ serio_set_drvdata(serio, rain); ++ INIT_WORK(&rain->work, rain_irq_work_handler); ++ mutex_init(&rain->write_lock); ++ spin_lock_init(&rain->buf_lock); ++ ++ err = serio_open(serio, drv); ++ if (err) ++ goto delete_adap; ++ ++ err = rain_setup(rain, serio, &log_addrs, &pa); ++ if (err) ++ goto close_serio; ++ ++ err = cec_register_adapter(rain->adap, &serio->dev); ++ if (err < 0) ++ goto close_serio; ++ ++ rain->dev = &rain->adap->devnode.dev; ++ return 0; ++ ++close_serio: ++ serio_close(serio); ++delete_adap: ++ cec_delete_adapter(rain->adap); ++ serio_set_drvdata(serio, NULL); ++free_device: ++ kfree(rain); ++ return err; ++} ++ ++static const struct serio_device_id rain_serio_ids[] = { ++ { ++ .type = SERIO_RS232, ++ .proto = SERIO_RAINSHADOW_CEC, ++ .id = SERIO_ANY, ++ .extra = SERIO_ANY, ++ }, ++ { 0 } ++}; ++ ++MODULE_DEVICE_TABLE(serio, rain_serio_ids); ++ ++static struct serio_driver rain_drv = { ++ .driver = { ++ .name = "rainshadow-cec", ++ }, ++ .description = "RainShadow Tech HDMI CEC driver", ++ .id_table = rain_serio_ids, ++ .interrupt = rain_interrupt, ++ .connect = rain_connect, ++ .disconnect = rain_disconnect, ++}; ++ ++module_serio_driver(rain_drv); +diff --git a/include/uapi/linux/serio.h b/include/uapi/linux/serio.h +index 4588c66a8df0..89b72003fb68 100644 +--- a/include/uapi/linux/serio.h ++++ b/include/uapi/linux/serio.h +@@ -78,5 +78,6 @@ + #define SERIO_TSC40 0x3d + #define SERIO_WACOM_IV 0x3e + #define SERIO_PULSE8_CEC 0x40 ++#define SERIO_RAINSHADOW_CEC 0x41 + + #endif /* _UAPI_SERIO_H */ + +From 4ceffb68390fda7643be488544dc25e439bc164d Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 2 Sep 2017 16:23:11 +0200 +Subject: [PATCH] [media] rc/keymaps: initialize rc-cec early + +--- + drivers/media/rc/keymaps/rc-cec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/rc/keymaps/rc-cec.c b/drivers/media/rc/keymaps/rc-cec.c +index 354c8e724b8e..fb0c2b1f3814 100644 +--- a/drivers/media/rc/keymaps/rc-cec.c ++++ b/drivers/media/rc/keymaps/rc-cec.c +@@ -175,7 +175,7 @@ static void __exit exit_rc_map_cec(void) + rc_map_unregister(&cec_map); + } + +-module_init(init_rc_map_cec); ++subsys_initcall(init_rc_map_cec); + module_exit(exit_rc_map_cec); + + MODULE_LICENSE("GPL"); + +From 3365306ff585f94071383606546cd0f0000c1bb3 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 2 Sep 2017 16:23:11 +0200 +Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 23 +++++++++++++++++++---- + 1 file changed, 19 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index a7f2e381a5bd..b98a1c828657 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2465,6 +2465,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge) + static enum drm_connector_status + dw_hdmi_connector_detect(struct drm_connector *connector, bool force) + { ++ enum drm_connector_status status; + struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, + connector); + +@@ -2474,7 +2475,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) + dw_hdmi_update_phy_mask(hdmi); + mutex_unlock(&hdmi->mutex); + +- return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data); ++ status = hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data); ++ ++ if (status == connector_status_connected && hdmi->ddc) { ++ struct edid *edid = drm_get_edid(connector, hdmi->ddc); ++ if (edid) { ++ dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n", ++ edid->width_cm, edid->height_cm); ++ ++ hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid); ++ hdmi->sink_has_audio = drm_detect_monitor_audio(edid); ++ drm_mode_connector_update_edid_property(connector, edid); ++ cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid); ++ drm_edid_to_eld(connector, edid); ++ kfree(edid); ++ } ++ } ++ ++ return status; + } + + static int dw_hdmi_connector_get_modes(struct drm_connector *connector) +@@ -2867,9 +2885,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) + dw_hdmi_update_phy_mask(hdmi); + } + mutex_unlock(&hdmi->mutex); +- if (!(phy_stat & (HDMI_PHY_RX_SENSE | HDMI_PHY_HPD))) +- cec_notifier_set_phys_addr(hdmi->cec_notifier, +- CEC_PHYS_ADDR_INVALID); + } + + check_hdmi_irq(hdmi, intr_stat, phy_int_pol); diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch new file mode 100644 index 0000000000..40c8d07dbc --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch @@ -0,0 +1,1569 @@ +From d2ee02d81c40aef4fdf0278bd0dc529a1793af79 Mon Sep 17 00:00:00 2001 +From: Chris Zhong +Date: Mon, 18 Jul 2016 22:34:34 +0800 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: correct the spdif clk + +The spdif mclk should be 128 times of sample rate, and there is a +internal divider, the real rate of spdif mclk is mclk / (div + 1). +Hence, the original driver always get the good frequency for +48000/96000/44100/192000. But for 32000, the mclk is incorrect, +it should be 32000*128, but get 48000*128. Do not use the internal +divider here, just set all mclk to 128 * sample rate directly. + +Signed-off-by: Chris Zhong +Signed-off-by: Mark Brown +(cherry picked from commit 46dd2e28a90e48fbf1b7e253933fa3b7242e9b1b) +--- + sound/soc/rockchip/rockchip_spdif.c | 17 +---------------- + 1 file changed, 1 insertion(+), 16 deletions(-) + +diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c +index 44b8c72e6a16..feaba2ad6022 100644 +--- a/sound/soc/rockchip/rockchip_spdif.c ++++ b/sound/soc/rockchip/rockchip_spdif.c +@@ -105,21 +105,7 @@ static int rk_spdif_hw_params(struct snd_pcm_substream *substream, + int ret; + + srate = params_rate(params); +- switch (srate) { +- case 32000: +- case 48000: +- case 96000: +- mclk = 96000 * 128; /* 12288000 hz */ +- break; +- case 44100: +- mclk = 44100 * 256; /* 11289600 hz */ +- break; +- case 192000: +- mclk = 192000 * 128; /* 24576000 hz */ +- break; +- default: +- return -EINVAL; +- } ++ mclk = srate * 128; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: +@@ -143,7 +129,6 @@ static int rk_spdif_hw_params(struct snd_pcm_substream *substream, + return ret; + } + +- val |= SPDIF_CFGR_CLK_DIV(mclk/(srate * 256)); + ret = regmap_update_bits(spdif->regmap, SPDIF_CFGR, + SPDIF_CFGR_CLK_DIV_MASK | SPDIF_CFGR_HALFWORD_ENABLE | + SDPIF_CFGR_VDW_MASK, + +From 2316686749dfb94a33efc7f9238319c050f2c2e2 Mon Sep 17 00:00:00 2001 +From: Sugar Zhang +Date: Wed, 7 Sep 2016 14:30:21 +0800 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: spdif: restore register during + runtime_suspend/resume cycle + +when step into runtime_suspend, spdif pd will be disabled and loss state. +so need to restore register when runtime_resume. + +Signed-off-by: Sugar Zhang +Signed-off-by: Mark Brown +(cherry picked from commit 3628c6987fb45d719cd963805bbba9f15017290e) +--- + sound/soc/rockchip/rockchip_spdif.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c +index feaba2ad6022..cac85a5538d5 100644 +--- a/sound/soc/rockchip/rockchip_spdif.c ++++ b/sound/soc/rockchip/rockchip_spdif.c +@@ -69,6 +69,7 @@ static int rk_spdif_runtime_suspend(struct device *dev) + { + struct rk_spdif_dev *spdif = dev_get_drvdata(dev); + ++ regcache_cache_only(spdif->regmap, true); + clk_disable_unprepare(spdif->mclk); + clk_disable_unprepare(spdif->hclk); + +@@ -92,7 +93,16 @@ static int rk_spdif_runtime_resume(struct device *dev) + return ret; + } + +- return 0; ++ regcache_cache_only(spdif->regmap, false); ++ regcache_mark_dirty(spdif->regmap); ++ ++ ret = regcache_sync(spdif->regmap); ++ if (ret) { ++ clk_disable_unprepare(spdif->mclk); ++ clk_disable_unprepare(spdif->hclk); ++ } ++ ++ return ret; + } + + static int rk_spdif_hw_params(struct snd_pcm_substream *substream, + +From f7d622d11eba15ed1a68b8aedfd920ee4ba5ab12 Mon Sep 17 00:00:00 2001 +From: Arnaud Pouliquen +Date: Tue, 3 Jan 2017 16:52:50 +0100 +Subject: [PATCH] UPSTREAM: DRM: add help to get ELD speaker allocation + +Add helper to allow users to retrieve the speaker allocations without +knowledge of the ELD structure. + +Signed-off-by: Arnaud Pouliquen +Reviewed-by: Jani Nikula +Signed-off-by: Mark Brown +(cherry picked from commit c82dbe5c055e4d246bd07c4d7b24801c9445c241) +--- + include/drm/drm_edid.h | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h +index 85861b63e77a..55201e7e2ede 100644 +--- a/include/drm/drm_edid.h ++++ b/include/drm/drm_edid.h +@@ -254,6 +254,7 @@ struct detailed_timing { + # define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */ + + #define DRM_ELD_SPEAKER 7 ++# define DRM_ELD_SPEAKER_MASK 0x7f + # define DRM_ELD_SPEAKER_RLRC (1 << 6) + # define DRM_ELD_SPEAKER_FLRC (1 << 5) + # define DRM_ELD_SPEAKER_RC (1 << 4) +@@ -417,6 +418,18 @@ static inline int drm_eld_size(const uint8_t *eld) + return DRM_ELD_HEADER_BLOCK_SIZE + eld[DRM_ELD_BASELINE_ELD_LEN] * 4; + } + ++/** ++ * drm_eld_get_spk_alloc - Get speaker allocation ++ * @eld: pointer to an ELD memory structure ++ * ++ * The returned value is the speakers mask. User has to use %DRM_ELD_SPEAKER ++ * field definitions to identify speakers. ++ */ ++static inline u8 drm_eld_get_spk_alloc(const uint8_t *eld) ++{ ++ return eld[DRM_ELD_SPEAKER] & DRM_ELD_SPEAKER_MASK; ++} ++ + struct edid *drm_do_get_edid(struct drm_connector *connector, + int (*get_edid_block)(void *data, u8 *buf, unsigned int block, + size_t len), + +From a0dc556877d94de213dd9522af39156f0a5bfe2b Mon Sep 17 00:00:00 2001 +From: Arnaud Pouliquen +Date: Tue, 3 Jan 2017 16:52:51 +0100 +Subject: [PATCH] UPSTREAM: ASoC: core: add optional pcm_new callback for DAI + driver + +During probe, DAIs can need to perform some actions that requests +the knowledge of the pcm runtime handle. +The callback is called during DAIs linking, after PCM device creation. +For instance this can be used to add relationship between a DAI pcm +control and the pcm device. + +Signed-off-by: Arnaud Pouliquen +Signed-off-by: Mark Brown +(cherry picked from commit 25f7b701c20db3e9ae09e28dd652949bd977e5cd) +--- + include/sound/soc-dai.h | 3 +++ + sound/soc/soc-core.c | 28 ++++++++++++++++++++++++++++ + 2 files changed, 31 insertions(+) + +diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h +index 212eaaf172ed..345e4f8ee93f 100644 +--- a/include/sound/soc-dai.h ++++ b/include/sound/soc-dai.h +@@ -230,6 +230,9 @@ struct snd_soc_dai_driver { + int (*resume)(struct snd_soc_dai *dai); + /* compress dai */ + int (*compress_new)(struct snd_soc_pcm_runtime *rtd, int num); ++ /* Optional Callback used at pcm creation*/ ++ int (*pcm_new)(struct snd_soc_pcm_runtime *rtd, ++ struct snd_soc_dai *dai); + /* DAI is also used for the control bus */ + bool bus_control; + +diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c +index 49263f3a50b0..c583022d7910 100644 +--- a/sound/soc/soc-core.c ++++ b/sound/soc/soc-core.c +@@ -1277,6 +1277,27 @@ static int soc_probe_dai(struct snd_soc_dai *dai, int order) + return 0; + } + ++static int soc_link_dai_pcm_new(struct snd_soc_dai **dais, int num_dais, ++ struct snd_soc_pcm_runtime *rtd) ++{ ++ int i, ret = 0; ++ ++ for (i = 0; i < num_dais; ++i) { ++ struct snd_soc_dai_driver *drv = dais[i]->driver; ++ ++ if (!rtd->dai_link->no_pcm && drv->pcm_new) ++ ret = drv->pcm_new(rtd, dais[i]); ++ if (ret < 0) { ++ dev_err(dais[i]->dev, ++ "ASoC: Failed to bind %s with pcm device\n", ++ dais[i]->name); ++ return ret; ++ } ++ } ++ ++ return 0; ++} ++ + static int soc_link_dai_widgets(struct snd_soc_card *card, + struct snd_soc_dai_link *dai_link, + struct snd_soc_pcm_runtime *rtd) +@@ -1388,6 +1409,13 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) + dai_link->stream_name, ret); + return ret; + } ++ ret = soc_link_dai_pcm_new(&cpu_dai, 1, rtd); ++ if (ret < 0) ++ return ret; ++ ret = soc_link_dai_pcm_new(rtd->codec_dais, ++ rtd->num_codecs, rtd); ++ if (ret < 0) ++ return ret; + } else { + INIT_DELAYED_WORK(&rtd->delayed_work, + codec2codec_close_delayed_work); + +From 5c39a02d6f966de9f9f26a98a401c90651ebeb41 Mon Sep 17 00:00:00 2001 +From: Arnaud Pouliquen +Date: Tue, 3 Jan 2017 16:52:52 +0100 +Subject: [PATCH] UPSTREAM: ASoC: hdmi-codec: add channel mapping control + +Add user interface to provide channel mapping. +In a first step this control is read only. + +As TLV type, the control provides all configuration available for +HDMI sink(ELD), and provides current channel mapping selected by codec +based on ELD and number of channels specified by user on open. +When control is called before the number of the channel is specified +(i.e. hw_params is set), it returns all channels set to UNKNOWN. + +Signed-off-by: Arnaud Pouliquen +Signed-off-by: Mark Brown +(cherry picked from commit cd6111b26280a2f38a9fb8e6630c63a96477e4bf) +--- + sound/soc/codecs/hdmi-codec.c | 377 +++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 376 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c +index 028d60c196ae..cb78d8971b41 100644 +--- a/sound/soc/codecs/hdmi-codec.c ++++ b/sound/soc/codecs/hdmi-codec.c +@@ -21,12 +21,264 @@ + #include + #include + #include ++#include + #include + #include + #include + + #include /* This is only to get MAX_ELD_BYTES */ + ++#define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1 ++ ++struct hdmi_codec_channel_map_table { ++ unsigned char map; /* ALSA API channel map position */ ++ unsigned long spk_mask; /* speaker position bit mask */ ++}; ++ ++/* ++ * CEA speaker placement for HDMI 1.4: ++ * ++ * FL FLC FC FRC FR FRW ++ * ++ * LFE ++ * ++ * RL RLC RC RRC RR ++ * ++ * Speaker placement has to be extended to support HDMI 2.0 ++ */ ++enum hdmi_codec_cea_spk_placement { ++ FL = BIT(0), /* Front Left */ ++ FC = BIT(1), /* Front Center */ ++ FR = BIT(2), /* Front Right */ ++ FLC = BIT(3), /* Front Left Center */ ++ FRC = BIT(4), /* Front Right Center */ ++ RL = BIT(5), /* Rear Left */ ++ RC = BIT(6), /* Rear Center */ ++ RR = BIT(7), /* Rear Right */ ++ RLC = BIT(8), /* Rear Left Center */ ++ RRC = BIT(9), /* Rear Right Center */ ++ LFE = BIT(10), /* Low Frequency Effect */ ++}; ++ ++/* ++ * cea Speaker allocation structure ++ */ ++struct hdmi_codec_cea_spk_alloc { ++ const int ca_id; ++ unsigned int n_ch; ++ unsigned long mask; ++}; ++ ++/* Channel maps stereo HDMI */ ++const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = { ++ { .channels = 2, ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, ++ { } ++}; ++ ++/* Channel maps for multi-channel playbacks, up to 8 n_ch */ ++const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { ++ { .channels = 2, /* CA_ID 0x00 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, ++ { .channels = 4, /* CA_ID 0x01 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA } }, ++ { .channels = 4, /* CA_ID 0x02 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC } }, ++ { .channels = 4, /* CA_ID 0x03 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC } }, ++ { .channels = 6, /* CA_ID 0x04 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 6, /* CA_ID 0x05 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 6, /* CA_ID 0x06 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 6, /* CA_ID 0x07 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 6, /* CA_ID 0x08 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, ++ { .channels = 6, /* CA_ID 0x09 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, ++ { .channels = 6, /* CA_ID 0x0A */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, ++ { .channels = 6, /* CA_ID 0x0B */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, ++ { .channels = 8, /* CA_ID 0x0C */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 8, /* CA_ID 0x0D */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 8, /* CA_ID 0x0E */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 8, /* CA_ID 0x0F */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, ++ { .channels = 8, /* CA_ID 0x10 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, ++ { .channels = 8, /* CA_ID 0x11 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, ++ { .channels = 8, /* CA_ID 0x12 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, ++ { .channels = 8, /* CA_ID 0x13 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, ++ SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, ++ { .channels = 8, /* CA_ID 0x14 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x15 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x16 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x17 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x18 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x19 */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x1A */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x1B */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x1C */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x1D */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x1E */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { .channels = 8, /* CA_ID 0x1F */ ++ .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, ++ SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, ++ SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, ++ { } ++}; ++ ++/* ++ * hdmi_codec_channel_alloc: speaker configuration available for CEA ++ * ++ * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct ++ * The preceding ones have better chances to be selected by ++ * hdmi_codec_get_ch_alloc_table_idx(). ++ */ ++static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { ++ { .ca_id = 0x00, .n_ch = 2, ++ .mask = FL | FR}, ++ /* 2.1 */ ++ { .ca_id = 0x01, .n_ch = 4, ++ .mask = FL | FR | LFE}, ++ /* Dolby Surround */ ++ { .ca_id = 0x02, .n_ch = 4, ++ .mask = FL | FR | FC }, ++ /* surround51 */ ++ { .ca_id = 0x0b, .n_ch = 6, ++ .mask = FL | FR | LFE | FC | RL | RR}, ++ /* surround40 */ ++ { .ca_id = 0x08, .n_ch = 6, ++ .mask = FL | FR | RL | RR }, ++ /* surround41 */ ++ { .ca_id = 0x09, .n_ch = 6, ++ .mask = FL | FR | LFE | RL | RR }, ++ /* surround50 */ ++ { .ca_id = 0x0a, .n_ch = 6, ++ .mask = FL | FR | FC | RL | RR }, ++ /* 6.1 */ ++ { .ca_id = 0x0f, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | RC }, ++ /* surround71 */ ++ { .ca_id = 0x13, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, ++ /* others */ ++ { .ca_id = 0x03, .n_ch = 8, ++ .mask = FL | FR | LFE | FC }, ++ { .ca_id = 0x04, .n_ch = 8, ++ .mask = FL | FR | RC}, ++ { .ca_id = 0x05, .n_ch = 8, ++ .mask = FL | FR | LFE | RC }, ++ { .ca_id = 0x06, .n_ch = 8, ++ .mask = FL | FR | FC | RC }, ++ { .ca_id = 0x07, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RC }, ++ { .ca_id = 0x0c, .n_ch = 8, ++ .mask = FL | FR | RC | RL | RR }, ++ { .ca_id = 0x0d, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | RC }, ++ { .ca_id = 0x0e, .n_ch = 8, ++ .mask = FL | FR | FC | RL | RR | RC }, ++ { .ca_id = 0x10, .n_ch = 8, ++ .mask = FL | FR | RL | RR | RLC | RRC }, ++ { .ca_id = 0x11, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | RLC | RRC }, ++ { .ca_id = 0x12, .n_ch = 8, ++ .mask = FL | FR | FC | RL | RR | RLC | RRC }, ++ { .ca_id = 0x14, .n_ch = 8, ++ .mask = FL | FR | FLC | FRC }, ++ { .ca_id = 0x15, .n_ch = 8, ++ .mask = FL | FR | LFE | FLC | FRC }, ++ { .ca_id = 0x16, .n_ch = 8, ++ .mask = FL | FR | FC | FLC | FRC }, ++ { .ca_id = 0x17, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | FLC | FRC }, ++ { .ca_id = 0x18, .n_ch = 8, ++ .mask = FL | FR | RC | FLC | FRC }, ++ { .ca_id = 0x19, .n_ch = 8, ++ .mask = FL | FR | LFE | RC | FLC | FRC }, ++ { .ca_id = 0x1a, .n_ch = 8, ++ .mask = FL | FR | RC | FC | FLC | FRC }, ++ { .ca_id = 0x1b, .n_ch = 8, ++ .mask = FL | FR | LFE | RC | FC | FLC | FRC }, ++ { .ca_id = 0x1c, .n_ch = 8, ++ .mask = FL | FR | RL | RR | FLC | FRC }, ++ { .ca_id = 0x1d, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | FLC | FRC }, ++ { .ca_id = 0x1e, .n_ch = 8, ++ .mask = FL | FR | FC | RL | RR | FLC | FRC }, ++ { .ca_id = 0x1f, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, ++}; ++ + struct hdmi_codec_priv { + struct hdmi_codec_pdata hcd; + struct snd_soc_dai_driver *daidrv; +@@ -41,6 +293,8 @@ struct hdmi_codec_priv { + struct notifier_block nb; + unsigned int jack_status; + unsigned int mode; ++ struct snd_pcm_chmap *chmap_info; ++ unsigned int chmap_idx; + }; + + static const struct snd_soc_dapm_widget hdmi_widgets[] = { +@@ -109,6 +363,83 @@ static int hdmi_audio_mode_put(struct snd_kcontrol *kcontrol, + return 0; + } + ++static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc) ++{ ++ int i; ++ const unsigned long hdmi_codec_eld_spk_alloc_bits[] = { ++ [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR, ++ [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC, ++ }; ++ unsigned long spk_mask = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) { ++ if (spk_alloc & (1 << i)) ++ spk_mask |= hdmi_codec_eld_spk_alloc_bits[i]; ++ } ++ ++ return spk_mask; ++} ++ ++void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp) ++{ ++ u8 spk_alloc; ++ unsigned long spk_mask; ++ ++ spk_alloc = drm_eld_get_spk_alloc(hcp->eld); ++ spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); ++ ++ /* Detect if only stereo supported, else return 8 channels mappings */ ++ if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2) ++ hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps; ++ else ++ hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; ++} ++ ++static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp, ++ unsigned char channels) ++{ ++ int i; ++ u8 spk_alloc; ++ unsigned long spk_mask; ++ const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc; ++ ++ spk_alloc = drm_eld_get_spk_alloc(hcp->eld); ++ spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); ++ ++ for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) { ++ /* If spk_alloc == 0, HDMI is unplugged return stereo config*/ ++ if (!spk_alloc && cap->ca_id == 0) ++ return i; ++ if (cap->n_ch != channels) ++ continue; ++ if (!(cap->mask == (spk_mask & cap->mask))) ++ continue; ++ return i; ++ } ++ ++ return -EINVAL; ++} ++static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ unsigned const char *map; ++ unsigned int i; ++ struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); ++ struct hdmi_codec_priv *hcp = info->private_data; ++ ++ map = info->chmap[hcp->chmap_idx].map; ++ ++ for (i = 0; i < info->max_channels; i++) { ++ if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN) ++ ucontrol->value.integer.value[i] = 0; ++ else ++ ucontrol->value.integer.value[i] = map[i]; ++ } ++ ++ return 0; ++} ++ ++ + static const struct snd_kcontrol_new hdmi_controls[] = { + { + .access = SNDRV_CTL_ELEM_ACCESS_READ | +@@ -184,6 +515,9 @@ static int hdmi_codec_startup(struct snd_pcm_substream *substream, + ret = snd_pcm_hw_constraint_eld(substream->runtime, + hcp->eld); + mutex_unlock(&hcp->eld_lock); ++ ++ /* Select chmap supported */ ++ hdmi_codec_eld_chmap(hcp); + } + return ret; + } +@@ -201,6 +535,7 @@ static void hdmi_codec_shutdown(struct snd_pcm_substream *substream, + + WARN_ON(hcp->current_stream != substream); + ++ hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; + hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data); + + mutex_lock(&hcp->current_stream_lock); +@@ -221,7 +556,7 @@ static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, + .dig_subframe = { 0 }, + } + }; +- int ret; ++ int ret, idx; + + dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__, + params_width(params), params_rate(params), +@@ -248,6 +583,17 @@ static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, + hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; + hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; + ++ /* Select a channel allocation that matches with ELD and pcm channels */ ++ idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels); ++ if (idx < 0) { ++ dev_err(dai->dev, "Not able to map channels to speakers (%d)\n", ++ idx); ++ hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; ++ return idx; ++ } ++ hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id; ++ hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id; ++ + hp.sample_width = params_width(params); + hp.sample_rate = params_rate(params); + hp.channels = params_channels(params); +@@ -377,6 +723,32 @@ static const struct snd_soc_dai_ops hdmi_dai_ops = { + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\ + SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE) + ++static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd, ++ struct snd_soc_dai *dai) ++{ ++ struct snd_soc_dai_driver *drv = dai->driver; ++ struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ dev_dbg(dai->dev, "%s()\n", __func__); ++ ++ ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK, ++ NULL, drv->playback.channels_max, 0, ++ &hcp->chmap_info); ++ if (ret < 0) ++ return ret; ++ ++ /* override handlers */ ++ hcp->chmap_info->private_data = hcp; ++ hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get; ++ ++ /* default chmap supported is stereo */ ++ hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; ++ hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; ++ ++ return 0; ++} ++ + static struct snd_soc_dai_driver hdmi_i2s_dai = { + .name = "i2s-hifi", + .id = DAI_ID_I2S, +@@ -389,6 +761,7 @@ static struct snd_soc_dai_driver hdmi_i2s_dai = { + .sig_bits = 24, + }, + .ops = &hdmi_dai_ops, ++ .pcm_new = hdmi_codec_pcm_new, + }; + + static const struct snd_soc_dai_driver hdmi_spdif_dai = { +@@ -402,6 +775,7 @@ static const struct snd_soc_dai_driver hdmi_spdif_dai = { + .formats = SPDIF_FORMATS, + }, + .ops = &hdmi_dai_ops, ++ .pcm_new = hdmi_codec_pcm_new, + }; + + static struct snd_soc_codec_driver hdmi_codec = { +@@ -534,6 +908,7 @@ static int hdmi_codec_remove(struct platform_device *pdev) + { + struct hdmi_codec_priv *hcp = platform_get_drvdata(pdev); + ++ kfree(hcp->chmap_info); + hdmi_unregister_notifier(&hcp->nb); + snd_soc_unregister_codec(&pdev->dev); + return 0; + +From 4eb5c7bce96c6856f0e949e598bd9f8ec21d7b56 Mon Sep 17 00:00:00 2001 +From: Christophe Jaillet +Date: Thu, 15 Jun 2017 07:53:11 +0200 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: Fix an error handling in + 'rockchip_i2s_probe' + +If this memory allocation fail, we must disable what has been enabled. +Do not return immediately but go thrue the error handling path instead. + +Also use 'devm_kmemdup' instead of 'devm_kzalloc+memcpy' to simplify code. + +Signed-off-by: Christophe JAILLET +Signed-off-by: Mark Brown +(cherry picked from commit c3a3d3c41b74b05267bab6173f2a8224a1443ba6) +--- + sound/soc/rockchip/rockchip_i2s.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c +index 7687368779db..5a3436351efb 100644 +--- a/sound/soc/rockchip/rockchip_i2s.c ++++ b/sound/soc/rockchip/rockchip_i2s.c +@@ -658,12 +658,13 @@ static int rockchip_i2s_probe(struct platform_device *pdev) + goto err_pm_disable; + } + +- soc_dai = devm_kzalloc(&pdev->dev, ++ soc_dai = devm_kmemdup(&pdev->dev, &rockchip_i2s_dai, + sizeof(*soc_dai), GFP_KERNEL); +- if (!soc_dai) +- return -ENOMEM; ++ if (!soc_dai) { ++ ret = -ENOMEM; ++ goto err_pm_disable; ++ } + +- memcpy(soc_dai, &rockchip_i2s_dai, sizeof(*soc_dai)); + if (!of_property_read_u32(node, "rockchip,playback-channels", &val)) { + if (val >= 2 && val <= 8) + soc_dai->playback.channels_max = val; + +From 3fd7ca46725a4a16a1a52530ac2421bc8e037088 Mon Sep 17 00:00:00 2001 +From: Markus Elfring +Date: Thu, 10 Aug 2017 18:38:09 +0200 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: Delete an error message for a + failed memory allocation in rockchip_i2s_probe() + +Omit an extra message for a memory allocation failure in this function. + +This issue was detected by using the Coccinelle software. + +Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf +Signed-off-by: Markus Elfring +Signed-off-by: Mark Brown +(cherry picked from commit b48b2710913d583ff93c365413532e1a7cd60d84) +--- + sound/soc/rockchip/rockchip_i2s.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c +index 5a3436351efb..1da10e79a1bb 100644 +--- a/sound/soc/rockchip/rockchip_i2s.c ++++ b/sound/soc/rockchip/rockchip_i2s.c +@@ -594,10 +594,8 @@ static int rockchip_i2s_probe(struct platform_device *pdev) + int val; + + i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); +- if (!i2s) { +- dev_err(&pdev->dev, "Can't allocate rk_i2s_dev\n"); ++ if (!i2s) + return -ENOMEM; +- } + + i2s->dev = &pdev->dev; + + +From d6adb14ce27f7ef3687c6d965e781782329c790d Mon Sep 17 00:00:00 2001 +From: John Keeping +Date: Thu, 14 Sep 2017 16:58:55 +0100 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix unbalanced clk_disable + +mclk is enabled and disabled only in i2s_runtime_{resume,suspend}() and +we ensure that the device is runtime suspended before reaching this +clk_disable_unprepare() call, so it is wrong to call it again here. + +Signed-off-by: John Keeping +Signed-off-by: Mark Brown +(cherry picked from commit 32debfcd3ff0939c93238ddde03ffcc96cca5c60) +--- + sound/soc/rockchip/rockchip_i2s.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c +index 1da10e79a1bb..f131dba7645d 100644 +--- a/sound/soc/rockchip/rockchip_i2s.c ++++ b/sound/soc/rockchip/rockchip_i2s.c +@@ -713,7 +713,6 @@ static int rockchip_i2s_remove(struct platform_device *pdev) + if (!pm_runtime_status_suspended(&pdev->dev)) + i2s_runtime_suspend(&pdev->dev); + +- clk_disable_unprepare(i2s->mclk); + clk_disable_unprepare(i2s->hclk); + + return 0; + +From 2c4899311942a4aaf098faf513ac7200cbc71f11 Mon Sep 17 00:00:00 2001 +From: Stefan Potyra +Date: Wed, 6 Dec 2017 16:03:24 +0100 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: disable clock on error + +Disable the clocks in rk_spdif_probe when an error occurs after one +of the clocks has been enabled previously. + +Found by Linux Driver Verification project (linuxtesting.org). + +Fixes: f874b80e1571 ASoC: rockchip: Add rockchip SPDIF transceiver driver +Signed-off-by: Stefan Potyra +Signed-off-by: Mark Brown +(cherry picked from commit c7b92172a61b91936be985cb9bc499a4ebc6489b) +--- + sound/soc/rockchip/rockchip_spdif.c | 18 +++++++++++++----- + 1 file changed, 13 insertions(+), 5 deletions(-) + +diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c +index cac85a5538d5..6ff8b195acf4 100644 +--- a/sound/soc/rockchip/rockchip_spdif.c ++++ b/sound/soc/rockchip/rockchip_spdif.c +@@ -322,26 +322,30 @@ static int rk_spdif_probe(struct platform_device *pdev) + spdif->mclk = devm_clk_get(&pdev->dev, "mclk"); + if (IS_ERR(spdif->mclk)) { + dev_err(&pdev->dev, "Can't retrieve rk_spdif master clock\n"); +- return PTR_ERR(spdif->mclk); ++ ret = PTR_ERR(spdif->mclk); ++ goto err_disable_hclk; + } + + ret = clk_prepare_enable(spdif->mclk); + if (ret) { + dev_err(spdif->dev, "clock enable failed %d\n", ret); +- return ret; ++ goto err_disable_clocks; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + regs = devm_ioremap_resource(&pdev->dev, res); +- if (IS_ERR(regs)) +- return PTR_ERR(regs); ++ if (IS_ERR(regs)) { ++ ret = PTR_ERR(regs); ++ goto err_disable_clocks; ++ } + + spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs, + &rk_spdif_regmap_config); + if (IS_ERR(spdif->regmap)) { + dev_err(&pdev->dev, + "Failed to initialise managed register map\n"); +- return PTR_ERR(spdif->regmap); ++ ret = PTR_ERR(spdif->regmap); ++ goto err_disable_clocks; + } + + spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR; +@@ -373,6 +377,10 @@ static int rk_spdif_probe(struct platform_device *pdev) + + err_pm_runtime: + pm_runtime_disable(&pdev->dev); ++err_disable_clocks: ++ clk_disable_unprepare(spdif->mclk); ++err_disable_hclk: ++ clk_disable_unprepare(spdif->hclk); + + return ret; + } + +From 4cc851cd3ae5216602422e85bde844f1ff0e592c Mon Sep 17 00:00:00 2001 +From: John Keeping +Date: Mon, 8 Jan 2018 16:01:04 +0000 +Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix playback after runtime + resume + +When restoring registers during runtime resume, we must not write to +I2S_TXDR which is the transmit FIFO as this queues up a sample to be +output and pushes all of the output channels down by one. + +This can be demonstrated with the speaker-test utility: + + for i in a b c; do speaker-test -c 2 -s 1; done + +which should play a test through the left speaker three times but if the +I2S hardware starts runtime suspended the first sample will be played +through the right speaker. + +Fix this by marking I2S_TXDR as volatile (which also requires marking it +as readble, even though it technically isn't). This seems to be the +most robust fix, the alternative of giving I2S_TXDR a default value is +more fragile since it does not prevent regcache writing to the register +in all circumstances. + +While here, also fix the configuration of I2S_RXDR and I2S_FIFOLR; these +are not writable so they do not suffer from the same problem as I2S_TXDR +but reading from I2S_RXDR does suffer from a similar problem. + +Fixes: f0447f6cbb20 ("ASoC: rockchip: i2s: restore register during runtime_suspend/resume cycle", 2016-09-07) +Signed-off-by: John Keeping +(cherry picked from commit c66234cfedfc3e6e3b62563a5f2c1562be09a35d) +--- + sound/soc/rockchip/rockchip_i2s.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c +index f131dba7645d..0b9bb973b5a7 100644 +--- a/sound/soc/rockchip/rockchip_i2s.c ++++ b/sound/soc/rockchip/rockchip_i2s.c +@@ -514,6 +514,7 @@ static bool rockchip_i2s_rd_reg(struct device *dev, unsigned int reg) + case I2S_INTCR: + case I2S_XFER: + case I2S_CLR: ++ case I2S_TXDR: + case I2S_RXDR: + case I2S_FIFOLR: + case I2S_INTSR: +@@ -528,6 +529,9 @@ static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg) + switch (reg) { + case I2S_INTSR: + case I2S_CLR: ++ case I2S_FIFOLR: ++ case I2S_TXDR: ++ case I2S_RXDR: + return true; + default: + return false; +@@ -537,6 +541,8 @@ static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg) + static bool rockchip_i2s_precious_reg(struct device *dev, unsigned int reg) + { + switch (reg) { ++ case I2S_RXDR: ++ return true; + default: + return false; + } + +From 4d40b158d955d27eef520c49f221cd7ed31d9ae0 Mon Sep 17 00:00:00 2001 +From: Romain Perier +Date: Fri, 14 Apr 2017 10:31:12 +0200 +Subject: [PATCH] UPSTREAM: drm: dw-hdmi: add specific I2S and AHB functions + for stream handling + +Currently, CTS+N is forced to zero as a workaround of the IP block for +i.MX platforms. This is requested in the datasheet of the corresponding +IP for AHB mode only. However, we have seen that it introduces glitches +or delays when playing a sound on HDMI for I2S mode. This proves that we +cannot keep the current functions for handling audio stream as-is if +these contain workaround that are specific to a mode. + +This commit introduces two callbacks, one for each variant. +dw_hdmi_setup defines the right function depending on the detected +variant. Then, the exported functions dw_hdmi_audio_enable and +dw_hdmi_audio_disable calls the corresponding callbacks + +Reviewed-by: Neil Armstrong +Signed-off-by: Romain Perier +Signed-off-by: Archit Taneja +Link: http://patchwork.freedesktop.org/patch/msgid/20170414083113.4255-2-romain.perier@collabora.com +(cherry picked from commit a7d555d2f2bd675d641e742a202a5e4b37d4d019) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 26 ++++++++++++++++++++++++-- + 1 file changed, 24 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index a7f2e381a5bd..da4340491fea 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -261,6 +261,8 @@ struct dw_hdmi { + + void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); + u8 (*read)(struct dw_hdmi *hdmi, int offset); ++ void (*enable_audio)(struct dw_hdmi *hdmi); ++ void (*disable_audio)(struct dw_hdmi *hdmi); + }; + + #define HDMI_IH_PHY_STAT0_RX_SENSE \ +@@ -811,13 +813,29 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) + } + EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate); + ++static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi) ++{ ++ hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); ++} ++ ++static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi) ++{ ++ hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0); ++} ++ ++static void dw_hdmi_i2s_audio_enable(struct dw_hdmi *hdmi) ++{ ++ hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); ++} ++ + void dw_hdmi_audio_enable(struct dw_hdmi *hdmi) + { + unsigned long flags; + + spin_lock_irqsave(&hdmi->audio_lock, flags); + hdmi->audio_enable = true; +- hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); ++ if (hdmi->enable_audio) ++ hdmi->enable_audio(hdmi); + spin_unlock_irqrestore(&hdmi->audio_lock, flags); + } + EXPORT_SYMBOL_GPL(dw_hdmi_audio_enable); +@@ -828,7 +846,8 @@ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi) + + spin_lock_irqsave(&hdmi->audio_lock, flags); + hdmi->audio_enable = false; +- hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0); ++ if (hdmi->disable_audio) ++ hdmi->disable_audio(hdmi); + spin_unlock_irqrestore(&hdmi->audio_lock, flags); + } + EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable); +@@ -3677,6 +3696,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, + audio.irq = irq; + audio.hdmi = hdmi; + audio.eld = hdmi->connector.eld; ++ hdmi->enable_audio = dw_hdmi_ahb_audio_enable; ++ hdmi->disable_audio = dw_hdmi_ahb_audio_disable; + + pdevinfo.name = "dw-hdmi-ahb-audio"; + pdevinfo.data = &audio; +@@ -3690,6 +3711,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, + audio.write = hdmi_writeb; + audio.read = hdmi_readb; + audio.mod = hdmi_modb; ++ hdmi->enable_audio = dw_hdmi_i2s_audio_enable; + + pdevinfo.name = "dw-hdmi-i2s-audio"; + pdevinfo.data = &audio; + +From 4ea3fd9308b3bc3b5e7699e4a52e3f7bca6e857e Mon Sep 17 00:00:00 2001 +From: Romain Perier +Date: Thu, 20 Apr 2017 14:34:34 +0530 +Subject: [PATCH] UPSTREAM: drm: dw-hdmi: gate audio clock from the I2S + enablement callbacks + +Currently, the audio sampler clock is enabled from dw_hdmi_setup() at +step E. and is kept enabled for later use. This clock should be enabled +and disabled along with the actual audio stream and not always on (that +is bad for PM). Furthermore, as described by the datasheet, the I2S +variant needs to gate/ungate the clock when the stream is +enabled/disabled. + +This commit adds a parameter to hdmi_audio_enable_clk() that controls +when the audio sample clock must be enabled or disabled. Then, it adds +the call to this function from dw_hdmi_i2s_audio_enable() and +dw_hdmi_i2s_audio_disable(). + +Reviewed-by: Neil Armstrong +Signed-off-by: Romain Perier +Link: http://patchwork.freedesktop.org/patch/msgid/20170414083113.4255-3-romain.perier@collabora.com +Signed-off-by: Archit Taneja +(cherry picked from commit 57fbc05585a9c841c910677228f1e3f8a3a62801) +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 24 +++++++++++++++++------- + 1 file changed, 17 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index da4340491fea..e1a5966ce394 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -813,6 +813,15 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) + } + EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate); + ++static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable) ++{ ++ if (enable) ++ hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE; ++ else ++ hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE; ++ hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); ++} ++ + static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi) + { + hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); +@@ -826,6 +835,12 @@ static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi) + static void dw_hdmi_i2s_audio_enable(struct dw_hdmi *hdmi) + { + hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n); ++ hdmi_enable_audio_clk(hdmi, true); ++} ++ ++static void dw_hdmi_i2s_audio_disable(struct dw_hdmi *hdmi) ++{ ++ hdmi_enable_audio_clk(hdmi, false); + } + + void dw_hdmi_audio_enable(struct dw_hdmi *hdmi) +@@ -2138,12 +2153,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) + HDMI_MC_FLOWCTRL); + } + +-static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi) +-{ +- hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE; +- hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); +-} +- + /* Workaround to clear the overflow condition */ + static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) + { +@@ -2295,7 +2304,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + + /* HDMI Initialization Step E - Configure audio */ + hdmi_clk_regenerator_update_pixel_clock(hdmi); +- hdmi_enable_audio_clk(hdmi); ++ hdmi_enable_audio_clk(hdmi, true); + } + + /* not for DVI mode */ +@@ -3712,6 +3721,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, + audio.read = hdmi_readb; + audio.mod = hdmi_modb; + hdmi->enable_audio = dw_hdmi_i2s_audio_enable; ++ hdmi->disable_audio = dw_hdmi_i2s_audio_disable; + + pdevinfo.name = "dw-hdmi-i2s-audio"; + pdevinfo.data = &audio; + +From df0540deb663a3d0b3852b88ded0817146f20e67 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 7 Aug 2017 22:24:15 +0200 +Subject: [PATCH] drm: dw-hdmi-i2s: sync with upstream + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h | 1 - + drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 20 +++++++++++++------- + 2 files changed, 13 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h +index 3930ba04977b..af7f39c85ba4 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h +@@ -14,7 +14,6 @@ struct dw_hdmi_audio_data { + + struct dw_hdmi_i2s_audio_data { + struct dw_hdmi *hdmi; +- struct platform_device *pdev; + + void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); + u8 (*read)(struct dw_hdmi *hdmi, int offset); +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +index f1f62d8c1d16..5ff993a35ab6 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +@@ -16,7 +16,8 @@ + + #define DRIVER_NAME "dw-hdmi-i2s-audio" + +-static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio, u8 val, int offset) ++static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio, ++ u8 val, int offset) + { + struct dw_hdmi *hdmi = audio->hdmi; + +@@ -220,6 +221,7 @@ static int snd_dw_hdmi_probe(struct platform_device *pdev) + struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data; + struct platform_device_info pdevinfo; + struct hdmi_codec_pdata pdata; ++ struct platform_device *platform; + + pdata.ops = &dw_hdmi_i2s_ops; + pdata.i2s = 1; +@@ -234,23 +236,27 @@ static int snd_dw_hdmi_probe(struct platform_device *pdev) + pdevinfo.size_data = sizeof(pdata); + pdevinfo.dma_mask = DMA_BIT_MASK(32); + +- audio->pdev = platform_device_register_full(&pdevinfo); +- return IS_ERR_OR_NULL(audio->pdev); ++ platform = platform_device_register_full(&pdevinfo); ++ if (IS_ERR(platform)) ++ return PTR_ERR(platform); ++ ++ dev_set_drvdata(&pdev->dev, platform); ++ ++ return 0; + } + + static int snd_dw_hdmi_remove(struct platform_device *pdev) + { +- struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data; ++ struct platform_device *platform = dev_get_drvdata(&pdev->dev); + +- if (!IS_ERR_OR_NULL(audio->pdev)) +- platform_device_unregister(audio->pdev); ++ platform_device_unregister(platform); + + return 0; + } + + static struct platform_driver snd_dw_hdmi_driver = { + .probe = snd_dw_hdmi_probe, +- .remove = snd_dw_hdmi_remove, ++ .remove = snd_dw_hdmi_remove, + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + +From 8835208cc656c44c6c1238f637a428f6f5403bf4 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 2 Apr 2017 11:33:39 +0200 +Subject: [PATCH] drm: dw-hdmi-i2s: implement get_eld + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h | 1 + + drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 12 ++++++++++++ + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 + + 3 files changed, 14 insertions(+) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h +index af7f39c85ba4..c5ace7808fdf 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h +@@ -14,6 +14,7 @@ struct dw_hdmi_audio_data { + + struct dw_hdmi_i2s_audio_data { + struct dw_hdmi *hdmi; ++ u8 *eld; + + void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); + u8 (*read)(struct dw_hdmi *hdmi, int offset); +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +index 5ff993a35ab6..e7312571e2cb 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +@@ -11,6 +11,8 @@ + + #include + ++#include /* This is only to get MAX_ELD_BYTES */ ++ + #include "dw-hdmi.h" + #include "dw-hdmi-audio.h" + +@@ -211,9 +213,19 @@ static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data) + hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0); + } + ++static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, u8 *buf, size_t len) ++{ ++ struct dw_hdmi_i2s_audio_data *audio = data; ++ ++ memcpy(buf, audio->eld, min(len, (size_t)MAX_ELD_BYTES)); ++ ++ return 0; ++} ++ + static struct hdmi_codec_ops dw_hdmi_i2s_ops = { + .hw_params = dw_hdmi_i2s_hw_params, + .audio_shutdown = dw_hdmi_i2s_audio_shutdown, ++ .get_eld = dw_hdmi_i2s_get_eld, + }; + + static int snd_dw_hdmi_probe(struct platform_device *pdev) +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index e1a5966ce394..605a55e3693d 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -3720,6 +3720,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master, + audio.write = hdmi_writeb; + audio.read = hdmi_readb; + audio.mod = hdmi_modb; ++ audio.eld = hdmi->connector.eld; + hdmi->enable_audio = dw_hdmi_i2s_audio_enable; + hdmi->disable_audio = dw_hdmi_i2s_audio_disable; + + +From 572da20ab103a328f7b3afdb78c93fb62947ff78 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 17 Apr 2017 13:09:16 +0200 +Subject: [PATCH] drm: dw-hdmi-i2s: configure channel allocation + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +index e7312571e2cb..1d4570e3fbed 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +@@ -188,7 +188,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, + hdmi_write(audio, 0x00, HDMI_FC_AUDICONF1); + + /* Set Channel Allocation */ +- hdmi_write(audio, 0x00, HDMI_FC_AUDICONF2); ++ hdmi_write(audio, hparms->cea.channel_allocation, HDMI_FC_AUDICONF2); + + /* Set LFEPBLDOWN-MIX INH and LSV */ + hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3); + +From 1f19793a9437b295d7dfca822f511e487c47ef4a Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Tue, 2 May 2017 18:57:19 +0200 +Subject: [PATCH] ASoC: hdmi-codec: fix I2S audio in Kodi + +--- + sound/soc/codecs/hdmi-codec.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c +index cb78d8971b41..9ebca57014e4 100644 +--- a/sound/soc/codecs/hdmi-codec.c ++++ b/sound/soc/codecs/hdmi-codec.c +@@ -758,7 +758,6 @@ static struct snd_soc_dai_driver hdmi_i2s_dai = { + .channels_max = 8, + .rates = HDMI_RATES, + .formats = I2S_FORMATS, +- .sig_bits = 24, + }, + .ops = &hdmi_dai_ops, + .pcm_new = hdmi_codec_pcm_new, + +From 559c23102f957335d697de310dce921f72fff040 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 14 Aug 2017 00:14:05 +0200 +Subject: [PATCH] ASoC: hdmi-codec: reorder channel map + +--- + sound/soc/codecs/hdmi-codec.c | 113 +++++++++++++++++++----------------------- + 1 file changed, 52 insertions(+), 61 deletions(-) + +diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c +index 9ebca57014e4..e65060ae8ffc 100644 +--- a/sound/soc/codecs/hdmi-codec.c ++++ b/sound/soc/codecs/hdmi-codec.c +@@ -205,78 +205,69 @@ const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { + */ + static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { + { .ca_id = 0x00, .n_ch = 2, +- .mask = FL | FR}, +- /* 2.1 */ +- { .ca_id = 0x01, .n_ch = 4, +- .mask = FL | FR | LFE}, +- /* Dolby Surround */ ++ .mask = FL | FR }, ++ { .ca_id = 0x03, .n_ch = 4, ++ .mask = FL | FR | LFE | FC }, + { .ca_id = 0x02, .n_ch = 4, + .mask = FL | FR | FC }, +- /* surround51 */ ++ { .ca_id = 0x01, .n_ch = 4, ++ .mask = FL | FR | LFE }, + { .ca_id = 0x0b, .n_ch = 6, +- .mask = FL | FR | LFE | FC | RL | RR}, +- /* surround40 */ +- { .ca_id = 0x08, .n_ch = 6, +- .mask = FL | FR | RL | RR }, +- /* surround41 */ +- { .ca_id = 0x09, .n_ch = 6, +- .mask = FL | FR | LFE | RL | RR }, +- /* surround50 */ ++ .mask = FL | FR | LFE | FC | RL | RR }, + { .ca_id = 0x0a, .n_ch = 6, + .mask = FL | FR | FC | RL | RR }, +- /* 6.1 */ +- { .ca_id = 0x0f, .n_ch = 8, +- .mask = FL | FR | LFE | FC | RL | RR | RC }, +- /* surround71 */ ++ { .ca_id = 0x09, .n_ch = 6, ++ .mask = FL | FR | LFE | RL | RR }, ++ { .ca_id = 0x08, .n_ch = 6, ++ .mask = FL | FR | RL | RR }, ++ { .ca_id = 0x07, .n_ch = 6, ++ .mask = FL | FR | LFE | FC | RC }, ++ { .ca_id = 0x06, .n_ch = 6, ++ .mask = FL | FR | FC | RC }, ++ { .ca_id = 0x05, .n_ch = 6, ++ .mask = FL | FR | LFE | RC }, ++ { .ca_id = 0x04, .n_ch = 6, ++ .mask = FL | FR | RC }, + { .ca_id = 0x13, .n_ch = 8, + .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, +- /* others */ +- { .ca_id = 0x03, .n_ch = 8, +- .mask = FL | FR | LFE | FC }, +- { .ca_id = 0x04, .n_ch = 8, +- .mask = FL | FR | RC}, +- { .ca_id = 0x05, .n_ch = 8, +- .mask = FL | FR | LFE | RC }, +- { .ca_id = 0x06, .n_ch = 8, +- .mask = FL | FR | FC | RC }, +- { .ca_id = 0x07, .n_ch = 8, +- .mask = FL | FR | LFE | FC | RC }, +- { .ca_id = 0x0c, .n_ch = 8, +- .mask = FL | FR | RC | RL | RR }, +- { .ca_id = 0x0d, .n_ch = 8, +- .mask = FL | FR | LFE | RL | RR | RC }, +- { .ca_id = 0x0e, .n_ch = 8, +- .mask = FL | FR | FC | RL | RR | RC }, +- { .ca_id = 0x10, .n_ch = 8, +- .mask = FL | FR | RL | RR | RLC | RRC }, +- { .ca_id = 0x11, .n_ch = 8, +- .mask = FL | FR | LFE | RL | RR | RLC | RRC }, ++ { .ca_id = 0x1f, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, + { .ca_id = 0x12, .n_ch = 8, + .mask = FL | FR | FC | RL | RR | RLC | RRC }, +- { .ca_id = 0x14, .n_ch = 8, +- .mask = FL | FR | FLC | FRC }, +- { .ca_id = 0x15, .n_ch = 8, +- .mask = FL | FR | LFE | FLC | FRC }, +- { .ca_id = 0x16, .n_ch = 8, +- .mask = FL | FR | FC | FLC | FRC }, +- { .ca_id = 0x17, .n_ch = 8, +- .mask = FL | FR | LFE | FC | FLC | FRC }, +- { .ca_id = 0x18, .n_ch = 8, +- .mask = FL | FR | RC | FLC | FRC }, +- { .ca_id = 0x19, .n_ch = 8, +- .mask = FL | FR | LFE | RC | FLC | FRC }, +- { .ca_id = 0x1a, .n_ch = 8, +- .mask = FL | FR | RC | FC | FLC | FRC }, +- { .ca_id = 0x1b, .n_ch = 8, +- .mask = FL | FR | LFE | RC | FC | FLC | FRC }, +- { .ca_id = 0x1c, .n_ch = 8, +- .mask = FL | FR | RL | RR | FLC | FRC }, +- { .ca_id = 0x1d, .n_ch = 8, +- .mask = FL | FR | LFE | RL | RR | FLC | FRC }, + { .ca_id = 0x1e, .n_ch = 8, + .mask = FL | FR | FC | RL | RR | FLC | FRC }, +- { .ca_id = 0x1f, .n_ch = 8, +- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, ++ { .ca_id = 0x11, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | RLC | RRC }, ++ { .ca_id = 0x1d, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | FLC | FRC }, ++ { .ca_id = 0x10, .n_ch = 8, ++ .mask = FL | FR | RL | RR | RLC | RRC }, ++ { .ca_id = 0x1c, .n_ch = 8, ++ .mask = FL | FR | RL | RR | FLC | FRC }, ++ { .ca_id = 0x0f, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | RL | RR | RC }, ++ { .ca_id = 0x1b, .n_ch = 8, ++ .mask = FL | FR | LFE | RC | FC | FLC | FRC }, ++ { .ca_id = 0x0e, .n_ch = 8, ++ .mask = FL | FR | FC | RL | RR | RC }, ++ { .ca_id = 0x1a, .n_ch = 8, ++ .mask = FL | FR | RC | FC | FLC | FRC }, ++ { .ca_id = 0x0d, .n_ch = 8, ++ .mask = FL | FR | LFE | RL | RR | RC }, ++ { .ca_id = 0x19, .n_ch = 8, ++ .mask = FL | FR | LFE | RC | FLC | FRC }, ++ { .ca_id = 0x0c, .n_ch = 8, ++ .mask = FL | FR | RC | RL | RR }, ++ { .ca_id = 0x18, .n_ch = 8, ++ .mask = FL | FR | RC | FLC | FRC }, ++ { .ca_id = 0x17, .n_ch = 8, ++ .mask = FL | FR | LFE | FC | FLC | FRC }, ++ { .ca_id = 0x16, .n_ch = 8, ++ .mask = FL | FR | FC | FLC | FRC }, ++ { .ca_id = 0x15, .n_ch = 8, ++ .mask = FL | FR | LFE | FLC | FRC }, ++ { .ca_id = 0x14, .n_ch = 8, ++ .mask = FL | FR | FLC | FRC }, + }; + + struct hdmi_codec_priv { + +From d6e589fc6c9211db345d667545f191e187640e41 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 27 Aug 2017 23:32:40 +0200 +Subject: [PATCH] ASoC: codecs: rk3328: limit to working rates + +--- + sound/soc/codecs/rk3328_codec.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/rk3328_codec.c b/sound/soc/codecs/rk3328_codec.c +index af1b7429b6d4..d0b4578ffa0e 100644 +--- a/sound/soc/codecs/rk3328_codec.c ++++ b/sound/soc/codecs/rk3328_codec.c +@@ -354,7 +354,12 @@ static struct snd_soc_dai_driver rk3328_dai[] = { + .stream_name = "HIFI Playback", + .channels_min = 1, + .channels_max = 2, +- .rates = SNDRV_PCM_RATE_8000_96000, ++ .rates = (SNDRV_PCM_RATE_8000 | ++ SNDRV_PCM_RATE_16000 | ++ SNDRV_PCM_RATE_32000 | ++ SNDRV_PCM_RATE_48000 | ++ SNDRV_PCM_RATE_64000 | ++ SNDRV_PCM_RATE_96000), + .formats = (SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S20_3LE | + SNDRV_PCM_FMTBIT_S24_LE | + +From 8f4b1d8cd40d4e052214c4abc200ab68f1a4bb78 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 14 Aug 2017 00:14:05 +0200 +Subject: [PATCH] drm: dw-hdmi: change audio config + +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 14 +++++--------- + 1 file changed, 5 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 605a55e3693d..661b1259ebe0 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -628,18 +628,14 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi) + static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts, + unsigned int n) + { +- /* Must be set/cleared first */ +- hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); +- +- /* nshift factor = 0 */ +- hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); ++ hdmi_modb(hdmi, 0x80, 0x80, HDMI_AUD_N3); + + hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | + HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); + hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); + hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); + +- hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3); ++ hdmi_writeb(hdmi, ((n >> 16) & 0x0f) | 0x80, HDMI_AUD_N3); + hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2); + hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1); + } +@@ -784,7 +780,7 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, + spin_lock_irq(&hdmi->audio_lock); + hdmi->audio_n = n; + hdmi->audio_cts = cts; +- hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0); ++ hdmi_set_cts_n(hdmi, cts, n); + spin_unlock_irq(&hdmi->audio_lock); + } + +@@ -3721,8 +3717,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master, + audio.read = hdmi_readb; + audio.mod = hdmi_modb; + audio.eld = hdmi->connector.eld; +- hdmi->enable_audio = dw_hdmi_i2s_audio_enable; +- hdmi->disable_audio = dw_hdmi_i2s_audio_disable; ++ //hdmi->enable_audio = dw_hdmi_i2s_audio_enable; ++ //hdmi->disable_audio = dw_hdmi_i2s_audio_disable; + + pdevinfo.name = "dw-hdmi-i2s-audio"; + pdevinfo.data = &audio; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch new file mode 100644 index 0000000000..72c26686c4 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch @@ -0,0 +1,6493 @@ +From 7b26b6c4eef43138c3c014ce4d185745bc9a0174 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 13 Aug 2017 10:24:19 +0200 +Subject: [PATCH] arm: dts: rk3288-miniarm: update dts + +--- + arch/arm/boot/dts/rk3288-miniarm.dts | 26 ++++++++++++++++++++------ + 1 file changed, 20 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts +index 2fbec41f0b23..3d2507b8c864 100644 +--- a/arch/arm/boot/dts/rk3288-miniarm.dts ++++ b/arch/arm/boot/dts/rk3288-miniarm.dts +@@ -66,7 +66,7 @@ + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; +- wifi_chip_type = "ap6212"; ++ wifi_chip_type = "rtl8723bs"; + sdio_vref = <1800>; + WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>; + status = "okay"; +@@ -130,14 +130,14 @@ + + led1-led { + gpios=<&gpio1 25 GPIO_ACTIVE_HIGH>; +- linux,default-trigger="default-off"; ++ linux,default-trigger="heartbeat"; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; +- simple-audio-card,name = "rockchip,miniarm-codec"; ++ simple-audio-card,name = "HDMI"; + simple-audio-card,mclk-fs = <512>; + simple-audio-card,cpu { + sound-dai = <&i2s>; +@@ -196,20 +196,33 @@ + cpu0-supply = <&vdd_cpu>; + }; + ++&cpu0_opp_table { ++ opp-1704000000 { ++ opp-hz = /bits/ 64 <1704000000>; ++ opp-microvolt = <1350000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp-1800000000 { ++ opp-hz = /bits/ 64 <1800000000>; ++ opp-microvolt = <1400000>; ++ clock-latency-ns = <40000>; ++ }; ++}; ++ + &gmac { + phy-supply = <&vcc33_lan>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio4 7 0>; + snps,reset-active-low; +- snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-delays-us = <0 10000 50000>; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x30>; + rx_delay = <0x10>; +- status = "ok"; ++ status = "okay"; + }; + + &dsi0 { +@@ -537,6 +550,7 @@ + + &i2s { + #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; + status = "okay"; + }; + +@@ -560,7 +574,7 @@ + non-removable; + num-slots = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>; + sd-uhs-sdr104; + supports-sdio; + }; + +From b550971c44a70aad2dd503c12ea90d67d65fe806 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Thu, 2 Nov 2017 23:17:46 +0100 +Subject: [PATCH] arm: dts: rk3288-miqi: update dts + +--- + arch/arm/boot/dts/rk3288-miqi.dts | 56 +++++++++++++++++++++++---------------- + 1 file changed, 33 insertions(+), 23 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts +index b90b0e5969ec..ffced204abcf 100644 +--- a/arch/arm/boot/dts/rk3288-miqi.dts ++++ b/arch/arm/boot/dts/rk3288-miqi.dts +@@ -55,29 +55,14 @@ + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; +- simple-audio-card,name = "DW-HDMI"; ++ simple-audio-card,name = "HDMI"; + simple-audio-card,mclk-fs = <512>; +- +- simple-audio-card,dai-link@0 { /* I2S - S/PDIF */ +- format = "i2s"; +- cpu { +- sound-dai = <&i2s>; +- }; +- codec { +- sound-dai = <&hdmi>; +- }; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; + }; +- +- /* +- * If you want to support more cards, +- * you can add more dai-link node, +- * such as +- * +- * simple-audio-card,dai-link@1 { +- * ...... +- * } +- */ +- + }; + + ext_gmac: external-gmac-clock { +@@ -181,9 +166,23 @@ + cpu0-supply = <&vdd_cpu>; + }; + ++&cpu0_opp_table { ++ opp-1704000000 { ++ opp-hz = /bits/ 64 <1704000000>; ++ opp-microvolt = <1350000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp-1800000000 { ++ opp-hz = /bits/ 64 <1800000000>; ++ opp-microvolt = <1400000>; ++ clock-latency-ns = <40000>; ++ }; ++}; ++ + &gpu { + status = "okay"; + mali-supply = <&vdd_gpu>; ++ power-off-delay-ms = <200>; + }; + + &emmc { +@@ -203,6 +202,12 @@ + #size-cells = <0>; + #sound-dai-cells = <0>; + status = "okay"; ++ /* Don't use vopl for HDMI */ ++ ports { ++ hdmi_in: port { ++ /delete-node/ endpoint@1; ++ }; ++ }; + }; + + &hevc_service { +@@ -234,14 +239,14 @@ + clock_in_out = "input"; + snps,reset-gpio = <&gpio4 7 0>; + snps,reset-active-low; +- snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-delays-us = <0 10000 50000>; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x30>; + rx_delay = <0x10>; +- status = "ok"; ++ status = "okay"; + }; + + /* ---------------------------------------------------------------------------------- +@@ -413,6 +418,7 @@ I2C + + &i2s { + #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; + status = "okay"; + }; + +@@ -471,6 +477,10 @@ I2C + + &vopl { + status = "okay"; ++ /* Don't use vopl for HDMI */ ++ vopl_out: port { ++ /delete-node/ endpoint@0; ++ }; + }; + + &vopl_mmu { + +From ccb6c0062630f497f3b10e3b35a33085b32da968 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 17 Jan 2018 22:17:45 +0100 +Subject: [PATCH] arm64: dts: rockchip: rk3328: update dtsi + +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 54 ++++++++++++++++++++++++-------- + 1 file changed, 41 insertions(+), 13 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index c7316fdd582f..d5ad73bc2932 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -88,6 +88,8 @@ + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; ++ clocks = <&cru ARMCLK>; ++ dynamic-power-coefficient = <120>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; +@@ -95,6 +97,8 @@ + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; ++ clocks = <&cru ARMCLK>; ++ dynamic-power-coefficient = <120>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; +@@ -102,6 +106,8 @@ + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; ++ clocks = <&cru ARMCLK>; ++ dynamic-power-coefficient = <120>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; +@@ -161,6 +167,18 @@ + opp-microvolt-L1 = <1300000>; + clock-latency-ns = <40000>; + }; ++ /* ++ opp-1392000000 { ++ opp-hz = /bits/ 64 <1392000000>; ++ opp-microvolt = <1350000>; ++ clock-latency-ns = <40000>; ++ }; ++ opp-1512000000 { ++ opp-hz = /bits/ 64 <1512000000>; ++ opp-microvolt = <1350000>; ++ clock-latency-ns = <40000>; ++ }; ++ */ + }; + + arm-pmu { +@@ -186,7 +204,7 @@ + }; + + psci { +- compatible = "arm,psci-1.0"; ++ compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + +@@ -705,6 +723,10 @@ + opp-microvolt-L0 = <1125000>; + opp-microvolt-L1 = <1100000>; + }; ++ opp-600000000 { ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt = <1150000>; ++ }; + }; + + vdpu: vpu_service@ff350000 { +@@ -828,7 +850,7 @@ + interrupts = ; + interrupt-names = "rkvdec_mmu"; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; +- clock-names = "aclk_vcodec", "hclk_vcodec"; ++ clock-names = "aclk", "hclk"; + power-domains = <&power RK3328_PD_VIDEO>; + #iommu-cells = <0>; + }; +@@ -932,6 +954,8 @@ + reg = <0x0 0xff373f00 0x0 0x100>; + interrupts = ; + interrupt-names = "vop_mmu"; ++ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; ++ clock-names = "aclk", "hclk"; + #iommu-cells = <0>; + status = "disabled"; + }; +@@ -1205,9 +1229,10 @@ + sdmmc: dwmmc@ff500000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff500000 0x0 0x4000>; +- clock-freq-min-max = <400000 150000000>; +- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; +- clock-names = "biu", "ciu"; ++ max-frequency = <150000000>; ++ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, ++ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; ++ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; +@@ -1216,10 +1241,10 @@ + sdio: dwmmc@ff510000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff510000 0x0 0x4000>; +- clock-freq-min-max = <400000 150000000>; ++ max-frequency = <150000000>; + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, + <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; +- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; ++ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; +@@ -1228,9 +1253,10 @@ + emmc: dwmmc@ff520000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff520000 0x0 0x4000>; +- clock-freq-min-max = <400000 150000000>; +- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; +- clock-names = "biu", "ciu"; ++ max-frequency = <150000000>; ++ clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, ++ <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; ++ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; +@@ -1252,6 +1278,7 @@ + "pclk_mac"; + resets = <&cru SRST_GMAC2IO_A>; + reset-names = "stmmaceth"; ++ snps,force_thresh_dma_mode; + status = "disabled"; + }; + +@@ -1322,9 +1349,10 @@ + sdmmc_ext: dwmmc@ff5f0000 { + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff5f0000 0x0 0x4000>; +- clock-freq-min-max = <400000 150000000>; +- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; +- clock-names = "biu", "ciu"; ++ max-frequency = <150000000>; ++ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, ++ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; ++ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; + +From db792f3a20ed76c42048f6c155c308b18bdb9f0d Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 17 Jan 2018 22:17:45 +0100 +Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: update dts + +--- + arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 215 +++++++++++++++---------- + 1 file changed, 134 insertions(+), 81 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +index b5bb7bf0f34c..82f257d39be3 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +@@ -52,18 +52,6 @@ + stdout-path = "serial2:1500000n8"; + }; + +- fiq-debugger { +- compatible = "rockchip,fiq-debugger"; +- rockchip,serial-id = <2>; +- rockchip,signal-irq = <159>; +- rockchip,wake-irq = <0>; +- /* If enable uart uses irq instead of fiq */ +- rockchip,irq-mode-enable = <0>; +- rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ +- interrupts = ; +- status = "okay"; +- }; +- + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; +@@ -73,7 +61,7 @@ + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; +- gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0m1_gpio>; + regulator-name = "vcc_sd"; +@@ -82,25 +70,15 @@ + vin-supply = <&vcc_io>; + }; + +- vcc_host_5v: vcc-host-5v-regulator { ++ vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { + compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; ++ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; +- pinctrl-0 = <&usb30_host_drv>; ++ pinctrl-0 = <&usb_host_drv>; + regulator-name = "vcc_host_5v"; + regulator-always-on; +- vin-supply = <&vcc_sys>; +- }; +- +- vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&usb20_host_drv>; +- regulator-name = "vcc_host1_5v"; +- regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_sys>; + }; + +@@ -113,18 +91,47 @@ + regulator-max-microvolt = <5000000>; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ standby-led { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ power-led { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ + ir-receiver { + compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ linux,rc-map-name = "rc-pine64"; + pinctrl-0 = <&ir_int>; + pinctrl-names = "default"; + status = "okay"; + }; + ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; +- simple-audio-card,name = "rockchip,rk3328"; ++ simple-audio-card,name = "I2S"; + simple-audio-card,cpu { + sound-dai = <&i2s1>; + }; +@@ -133,18 +140,21 @@ + }; + }; + +- hdmi-sound { ++ spdif-sound { + compatible = "simple-audio-card"; +- simple-audio-card,format = "i2s"; +- simple-audio-card,mclk-fs = <128>; +- simple-audio-card,name = "rockchip,hdmi"; ++ simple-audio-card,name = "SPDIF"; + simple-audio-card,cpu { +- sound-dai = <&i2s0>; ++ sound-dai = <&spdif>; + }; + simple-audio-card,codec { +- sound-dai = <&hdmi>; ++ sound-dai = <&spdif_out>; + }; + }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; + }; + + &codec { +@@ -168,6 +178,15 @@ + cpu-supply = <&vdd_arm>; + }; + ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ + &display_subsystem { + status = "okay"; + }; +@@ -175,31 +194,42 @@ + &emmc { + bus-width = <8>; + cap-mmc-highspeed; ++ mmc-hs200-1_8v; + non-removable; +- supports-emmc; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_emmc>; + status = "okay"; + }; + + &gmac2io { +- phy-supply = <&vcc_io>; +- phy-mode = "rgmii"; + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; +- snps,reset-gpio = <&gpio1 18 GPIO_ACTIVE_LOW>; +- snps,reset-active-low; +- snps,reset-delays-us = <0 10000 50000>; ++ phy-supply = <&vcc_io>; ++ phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; +- tx_delay = <0x26>; +- rx_delay = <0x11>; ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x24>; ++ rx_delay = <0x18>; + status = "okay"; + }; + ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "disabled"; ++}; ++ + &gpu { + status = "okay"; + mali-supply = <&vdd_logic>; +@@ -215,6 +245,8 @@ + + &hdmi { + #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; + status = "okay"; + }; + +@@ -231,14 +263,14 @@ + reg = <0x18>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + gpio-controller; +- clock-output-names = "xin32k", "rk805-clkout2"; + #gpio-cells = <2>; +- #clock-cells = <1>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; +@@ -248,11 +280,11 @@ + vcc6-supply = <&vcc_sys>; + + rtc { +- status = "disabled"; ++ status = "okay"; + }; + + pwrkey { +- status = "disabled"; ++ status = "okay"; + }; + + gpio { +@@ -272,8 +304,8 @@ + regulator-max-microvolt = <1450000>; + regulator-initial-mode = <0x1>; + regulator-ramp-delay = <12500>; +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; +@@ -284,12 +316,13 @@ + vdd_arm: RK805_DCDC2@1 { + regulator-compatible = "RK805_DCDC2"; + regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = <0x1>; + regulator-ramp-delay = <12500>; +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; +@@ -301,8 +334,8 @@ + regulator-compatible = "RK805_DCDC3"; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x1>; +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; +@@ -315,8 +348,8 @@ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x1>; +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-mode = <0x2>; + regulator-on-in-suspend; +@@ -324,13 +357,13 @@ + }; + }; + +- vdd_18: RK805_LDO1@4 { ++ vcc_18: RK805_LDO1@4 { + regulator-compatible = "RK805_LDO1"; +- regulator-name = "vdd_18"; ++ regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; +@@ -342,24 +375,24 @@ + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + +- vdd_10: RK805_LDO3@6 { ++ vdd_11: RK805_LDO3@6 { + regulator-compatible = "RK805_LDO3"; +- regulator-name = "vdd_10"; +- regulator-min-microvolt = <1000000>; +- regulator-max-microvolt = <1000000>; +- regulator-boot-on; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; + regulator-always-on; ++ regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; +- regulator-suspend-microvolt = <1000000>; ++ regulator-suspend-microvolt = <1100000>; + }; + }; + }; +@@ -373,6 +406,16 @@ + }; + + &i2s1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1_mclk ++ &i2s1_sclk ++ &i2s1_lrcktx ++ &i2s1_lrckrx ++ &i2s1_sdo ++ &i2s1_sdi ++ &i2s1_sdio1 ++ &i2s1_sdio2 ++ &i2s1_sdio3>; + #sound-dai-cells = <0>; + status = "okay"; + }; +@@ -383,7 +426,7 @@ + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; +- vccio4-supply = <&vdd_18>; ++ vccio4-supply = <&vcc_18>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + pmuio-supply = <&vcc_io>; +@@ -392,37 +435,26 @@ + &pinctrl { + ir { + ir_int: ir-int { +- rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { +- rockchip,pins = <2 6 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- }; +- +- sdio-pwrseq { +- wifi_enable_h: wifi-enable-h { +- rockchip,pins = <1 18 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- usb2 { +- usb20_host_drv: usb20-host-drv { +- rockchip,pins = <0 27 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + +- usb3 { +- usb30_host_drv: usb30-host-drv { +- rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_pull_none>; ++ usb { ++ usb_host_drv: usb-host-drv { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + }; + + &rkvdec { + status = "okay"; ++ vcodec-supply = <&vdd_logic>; + }; + + &rkvdec_mmu { +@@ -437,8 +469,15 @@ + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; +- vmmc-supply = <&vcc_sd>; + supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; + status = "okay"; + }; + +@@ -456,9 +495,22 @@ + }; + }; + ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ + &tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; + status = "okay"; + }; + +@@ -482,15 +534,16 @@ + }; + + &u3phy { +- phy-supply = <&vcc_host_5v>; + status = "okay"; + }; + + &u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; + status = "okay"; + }; + + &u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; + status = "okay"; + }; + + +From 5f81039a852799686e3bed6d5b5e2c0d12d849f1 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 17 Jan 2018 22:17:45 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-box board + +--- + arch/arm64/boot/dts/rockchip/rk3328-box.dts | 628 ++++++++++++++++++++++++++++ + 1 file changed, 628 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box.dts b/arch/arm64/boot/dts/rockchip/rk3328-box.dts +new file mode 100644 +index 000000000000..215e6a42c8b8 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-box.dts +@@ -0,0 +1,628 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Rockchip RK3328 BOX"; ++ compatible = "rockchip,rk3328-box", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_host_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb30_host_drv>; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb20_host_drv>; ++ regulator-name = "vcc_host1_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ uart_rts_gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart0_rts>; ++ pinctrl-1 = <&uart0_gpios>; ++ BT,power_gpio = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "rtl8723bs"; ++ WIFI,host_wake_irq = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_io>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clk_32k_out>; ++ ++ clk_32k { ++ clk_32k_out: clk-32k-out { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb2 { ++ usb20_host_drv: usb20-host-drv { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb3 { ++ usb30_host_drv: usb30-host-drv { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ uart0_gpios: uart0-gpios { ++ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdio { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ max-frequency = <150000000>; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; ++ sd-uhs-sdr104; ++ supports-sdio; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; + +From 29ab3ef6a26cc6639f3975d9e9987bbb7b0aa242 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 17 Jan 2018 22:17:45 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-rockbox board + +--- + arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts | 568 ++++++++++++++++++++++++ + 1 file changed, 568 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts b/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts +new file mode 100644 +index 000000000000..05d496fd2c20 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-rockbox.dts +@@ -0,0 +1,568 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Pine64 RockBox"; ++ compatible = "pine64,rockbox", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ linux,rc-map-name = "rc-pine64"; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "rtl8189fs"; ++ WIFI,host_wake_irq = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io>; ++ vccio4-supply = <&vcc_io>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_io>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdio { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ max-frequency = <150000000>; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; ++ sd-uhs-sdr104; ++ supports-sdio; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; + +From 72dadc98a19512cb446bd7c8501139433939e680 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 17 Jan 2018 22:17:45 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-roc-cc board + +--- + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 556 +++++++++++++++++++++++++ + 1 file changed, 556 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +new file mode 100644 +index 000000000000..f739f9b28832 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +@@ -0,0 +1,556 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Firefly ROC-RK3328-CC Board"; ++ compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clkin: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vccio_sd: sdmmcio-regulator { ++ compatible = "regulator-gpio"; ++ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x1 ++ 3300000 0x0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sd_pwr_1800_sel>; ++ regulator-name = "vccio_sd"; ++ regulator-type = "voltage"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_host_drv>; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ power { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ user { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "I2S"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&codec>; ++ }; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; ++ clock_in_out = "input"; ++ phy-supply = <&vcc_io>; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmiim1_pins>; ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x25>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_io>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_io>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ sd-pwerset { ++ sd_pwr_1800_sel: sd-pwr-1800-sel { ++ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb { ++ usb_host_drv: usb-host-drv { ++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <100000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ sd-uhs-sdr104; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; + +From 37a995d53a00f87bd07dd59db51905ec70f9456b Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 3 Sep 2017 11:19:19 +0200 +Subject: [PATCH] arm64: dts: rockchip: rk3328-rock64: use two dai-link for i2s + sound + +--- + arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 26 +++++++++++++++++++++----- + sound/soc/soc-utils.c | 10 ++++++++++ + 2 files changed, 31 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +index 82f257d39be3..995829a12ad3 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +@@ -114,6 +114,11 @@ + status = "okay"; + }; + ++ dummy_codec: dummy-codec { ++ compatible = "linux,snd-soc-dummy"; ++ #sound-dai-cells = <0>; ++ }; ++ + hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; +@@ -129,14 +134,25 @@ + + sound { + compatible = "simple-audio-card"; +- simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "I2S"; +- simple-audio-card,cpu { +- sound-dai = <&i2s1>; ++ simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s1>; ++ }; ++ codec { ++ sound-dai = <&codec>; ++ }; + }; +- simple-audio-card,codec { +- sound-dai = <&codec>; ++ simple-audio-card,dai-link@1 { ++ format = "i2s"; ++ cpu { ++ sound-dai = <&i2s1>; ++ }; ++ codec { ++ sound-dai = <&dummy_codec>; ++ }; + }; + }; + +diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c +index 53dd085d3ee2..bf7ce34084a9 100644 +--- a/sound/soc/soc-utils.c ++++ b/sound/soc/soc-utils.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots) + { +@@ -160,9 +161,18 @@ static int snd_soc_dummy_remove(struct platform_device *pdev) + return 0; + } + ++#ifdef CONFIG_OF ++static const struct of_device_id soc_dummy_ids[] = { ++ { .compatible = "linux,snd-soc-dummy", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, soc_dummy_ids); ++#endif ++ + static struct platform_driver soc_dummy_driver = { + .driver = { + .name = "snd-soc-dummy", ++ .of_match_table = of_match_ptr(soc_dummy_ids), + }, + .probe = snd_soc_dummy_probe, + .remove = snd_soc_dummy_remove, + +From 1f23d678ac0e5f1e65492a3c35653461e3b19633 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 26 Jan 2018 00:03:46 +0100 +Subject: [PATCH] arm64: dts: rockchip: rk3328-roc-cc: disable sd-card voltage + select + +Voltage select should set GRF_SOC_CON10 bit 1, +vendor kernel repurpose GPIO0_D1 to signal this, +RK kernel uses GRF_SOC_CON10 bit 1 to mute avcodec. +--- + arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 +----------- + 1 file changed, 1 insertion(+), 11 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +index f739f9b28832..5c79dfd32d87 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +@@ -75,8 +75,6 @@ + gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1 + 3300000 0x0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&sd_pwr_1800_sel>; + regulator-name = "vccio_sd"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; +@@ -411,12 +409,6 @@ + }; + }; + +- sd-pwerset { +- sd_pwr_1800_sel: sd-pwr-1800-sel { +- rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; +@@ -444,13 +436,11 @@ + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; +- max-frequency = <100000000>; ++ max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; +- sd-uhs-sdr104; + supports-sd; + vmmc-supply = <&vcc_sd>; +- vqmmc-supply = <&vccio_sd>; + status = "okay"; + }; + + +From e9dc16e71f4cbdd6069e4fa51ac80dfe124d0e42 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 28 Jan 2018 15:17:34 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3399-sapphire board + +--- + arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts | 142 +++++++++++++++++++++++ + 1 file changed, 142 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts +new file mode 100644 +index 000000000000..36613de5c68e +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts +@@ -0,0 +1,142 @@ ++/* ++ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "rk3399-sapphire.dtsi" ++#include "rk3399-linux.dtsi" ++#include ++ ++/ { ++ model = "Rockchip RK3399 Sapphire Board"; ++ compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ autorepeat; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn>; ++ ++ button@0 { ++ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ label = "GPIO Key Power"; ++ linux,input-type = <1>; ++ gpio-key,wakeup = <1>; ++ debounce-interval = <100>; ++ }; ++ }; ++ ++ vccadc_ref: vccadc-ref { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++}; ++ ++&hdmi_sound { ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ status = "okay"; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vccadc_ref>; ++}; ++ ++&vpu { ++ status = "okay"; ++ /* 0 means ion, 1 means drm */ ++ //allocator = <0>; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ /* 0 means ion, 1 means drm */ ++ //allocator = <0>; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&pinctrl { ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = ++ <0 10 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; + +From 7e61af4aa1c7c98c768aea2d7c48dcb4765227d0 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 28 Jan 2018 15:17:53 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3399-rock960 board + +--- + arch/arm64/boot/dts/rockchip/rk3399-rock960.dts | 983 ++++++++++++++++++++++++ + 1 file changed, 983 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +new file mode 100644 +index 000000000000..a5c906dd5961 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +@@ -0,0 +1,983 @@ ++/* ++ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3399.dtsi" ++#include "rk3399-linux.dtsi" ++#include "rk3399-opp.dtsi" ++ ++ ++/ { ++ model = "ROCK960"; ++ compatible = "96rocks,rock960", "rockchip,rk3399"; ++ ++ vcc1v8_s0: vcc1v8-s0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_s0"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio3 11 GPIO_ACTIVE_LOW>; ++ //gpio = <&gpio3 8 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_drv>; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_pcie"; ++ vin-supply = <&vcc3v3_sys>; ++ startup-delay-us = <70000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ /* for rockchip boot on */ ++ rockchip,pwm_id= <2>; ++ rockchip,pwm_voltage = <900000>; ++ ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s2>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ post-power-on-delay-ms = <200>; ++ power-off-delay-us = <10>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "ap6354"; ++ sdio_vref = <1800>; ++ WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ /* wifi-bt-power-toggle; */ ++ uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart0_rts>; ++ pinctrl-1 = <&uart0_gpios>; ++ /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */ ++ BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++}; ++ ++&hdmi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ clock-frequency = <100000000>; ++ clock-freq-min-max = <100000 100000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ num-slots = <1>; ++ //sd-uhs-sdr104; ++ vqmmc-supply = <&vcc_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ card-detect-delay = <800>; ++ status = "okay"; ++}; ++ ++&sdio0 { ++ clock-frequency = <100000000>; ++ clock-freq-min-max = <200000 100000000>; ++ supports-sdio; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs400-1_8v; ++ supports-emmc; ++ non-removable; ++ mmc-hs400-enhanced-strobe; ++ status = "okay"; ++}; ++ ++&i2s0 { ++ status = "okay"; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&spdif { ++ pinctrl-0 = <&spdif_bus_1>; ++ status = "okay"; ++ #sound-dai-cells = <0>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ clock-frequency = <400000>; ++ ++ vdd_cpu_b: syr827@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ regulator-compatible = "fan53555-reg"; ++ pinctrl-0 = <&vsel1_gpio>; ++ vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: syr828@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ regulator-compatible = "fan53555-reg"; ++ pinctrl-0 = <&vsel2_gpio>; ++ vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sys>; ++ vcc10-supply = <&vcc_sys>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc_1v8>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_hdmi: LDO_REG2 { ++ regulator-name = "vcca1v8_hdmi"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG3 { ++ regulator-name = "vcca_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc3v0_sd: LDO_REG5 { ++ regulator-name = "vcc3v0_sd"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca0v9_hdmi: LDO_REG7 { ++ regulator-name = "vcca0v9_hdmi"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c7 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ fusb0: fusb30x@22 { ++ compatible = "fairchild,fusb302"; ++ reg = <0x22>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int>; ++ vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; ++ int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ camera0: camera-module@10 { ++ status = "disabled"; ++ compatible = "omnivision,ov13850-v4l2-i2c-subdev"; ++ reg = < 0x10 >; ++ device_type = "v4l2-i2c-subdev"; ++ clocks = <&cru SCLK_CIF_OUT>; ++ clock-names = "clk_cif_out"; ++ pinctrl-names = "rockchip,camera_default", ++ "rockchip,camera_sleep"; ++ pinctrl-0 = <&cam0_default_pins>; ++ pinctrl-1 = <&cam0_sleep_pins>; ++ //rockchip,pd-gpio = <&gpio4 4 GPIO_ACTIVE_LOW>; ++ rockchip,pwr-gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>; ++ rockchip,rst-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>; ++ rockchip,camera-module-mclk-name = "clk_cif_out"; ++ rockchip,camera-module-facing = "back"; ++ rockchip,camera-module-name = "cmk-cb0695-fv1"; ++ rockchip,camera-module-len-name = "lg9569a2"; ++ rockchip,camera-module-fov-h = "66.0"; ++ rockchip,camera-module-fov-v = "50.1"; ++ rockchip,camera-module-orientation = <0>; ++ rockchip,camera-module-iq-flip = <0>; ++ rockchip,camera-module-iq-mirror = <0>; ++ rockchip,camera-module-flip = <1>; ++ rockchip,camera-module-mirror = <0>; ++ ++ rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>; ++ rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>; ++ rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>; ++ rockchip,camera-module-flash-support = <1>; ++ rockchip,camera-module-mipi-dphy-index = <0>; ++ }; ++ ++ camera1: camera-module@36 { ++ status = "disabled"; ++ compatible = "omnivision,ov4690-v4l2-i2c-subdev"; ++ reg = <0x36>; ++ device_type = "v4l2-i2c-subdev"; ++ clocks = <&cru SCLK_CIF_OUT>; ++ clock-names = "clk_cif_out"; ++ pinctrl-names = "rockchip,camera_default", ++ "rockchip,camera_sleep"; ++ pinctrl-0 = <&cam0_default_pins>; ++ pinctrl-1 = <&cam0_sleep_pins>; ++ rockchip,pd-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>; ++ //rockchip,pwr-gpio = <&gpio3 13 0>; ++ rockchip,rst-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; ++ rockchip,camera-module-mclk-name = "clk_cif_out"; ++ rockchip,camera-module-facing = "back"; ++ rockchip,camera-module-name = "LA6111PA"; ++ rockchip,camera-module-len-name = "YM6011P"; ++ rockchip,camera-module-fov-h = "116"; ++ rockchip,camera-module-fov-v = "61"; ++ rockchip,camera-module-orientation = <0>; ++ rockchip,camera-module-iq-flip = <0>; ++ rockchip,camera-module-iq-mirror = <0>; ++ rockchip,camera-module-flip = <0>; ++ rockchip,camera-module-mirror = <1>; ++ ++ rockchip,camera-module-defrect0 = <2688 1520 0 0 2688 1520>; ++ rockchip,camera-module-flash-support = <0>; ++ rockchip,camera-module-mipi-dphy-index = <0>; ++ }; ++ ++}; ++ ++&i2c7 { ++ status = "okay"; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_gpu>; ++}; ++ ++&threshold { ++ temperature = <85000>; ++}; ++ ++&target { ++ temperature = <100000>; ++}; ++ ++&soc_crit { ++ temperature = <105000>; ++}; ++ ++&tcphy0 { ++ extcon = <&fusb0>; ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ rockchip,hw-tshut-temp = <110000>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ extcon = <&fusb0>; ++ ++ u2phy0_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ extcon = <&fusb0>; ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&gmac { ++ phy-supply = <&vcc_phy>; ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&rgmii_pins>; ++ pinctrl-1 = <&rgmii_sleep_pins>; ++ tx_delay = <0x28>; ++ rx_delay = <0x11>; ++ status = "disabled"; ++}; ++ ++&saradc { ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ ++ audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ ++ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ ++ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ ++ sdio0 { ++ sdio0_bus1: sdio0-bus1 { ++ rockchip,pins = ++ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_bus4: sdio0-bus4 { ++ rockchip,pins = ++ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_cmd: sdio0-cmd { ++ rockchip,pins = ++ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_clk: sdio0-clk { ++ rockchip,pins = ++ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus1: sdmmc-bus1 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = ++ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = ++ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = ++ <0 9 RK_FUNC_GPIO &pcfg_pull_none>, ++ <0 10 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ uart0_gpios: uart0-gpios { ++ rockchip,pins = ++ <2 19 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = ++ <4 25 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ pcie_drv: pcie-drv { ++ rockchip,pins = ++ <3 11 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = ++ <1 21 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = ++ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = ++ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ gmac { ++ rgmii_sleep_pins: rgmii-sleep-pins { ++ rockchip,pins = ++ <3 15 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ }; ++ ++ fusb30x { ++ fusb0_int: fusb0-int { ++ rockchip,pins = ++ <1 2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pvtm { ++ status = "okay"; ++}; ++ ++&pmu_pvtm { ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmu1830-supply = <&vcc_1v8>; ++}; ++ ++&rockchip_suspend { ++ status = "okay"; ++ rockchip,sleep-debug-en = <0>; ++ rockchip,sleep-mode-config = < ++ (0 ++ | RKPM_SLP_ARMPD ++ | RKPM_SLP_PERILPPD ++ | RKPM_SLP_DDR_RET ++ | RKPM_SLP_PLLPD ++ | RKPM_SLP_CENTER_PD ++ | RKPM_SLP_AP_PWROFF ++ ) ++ >; ++ rockchip,wakeup-config = < ++ (0 ++ | RKPM_GPIO_WKUP_EN ++ | RKPM_PWM_WKUP_EN ++ ) ++ >; ++ rockchip,pwm-regulator-config = < ++ (0 ++ | PWM2_REGULATOR_EN ++ ) ++ >; ++ rockchip,power-ctrl = ++ <&gpio1 17 GPIO_ACTIVE_HIGH>, ++ <&gpio1 14 GPIO_ACTIVE_HIGH>; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&cif_isp0 { ++ rockchip,camera-modules-attached = <&camera0>; ++ status = "okay"; ++}; ++ ++&isp0_mmu { ++ status = "okay"; ++}; ++ ++&cif_isp1 { ++ rockchip,camera-modules-attached = <&camera1>; ++ status = "disabled"; ++}; ++ ++&isp1_mmu { ++ status = "okay"; ++}; ++ ++&vpu { ++ status = "okay"; ++ /* 0 means ion, 1 means drm */ ++ //allocator = <0>; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ /* 0 means ion, 1 means drm */ ++ //allocator = <0>; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; + +From eae2191351dd73db48ff927de52c2e961decfa45 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 28 Jan 2018 15:38:32 +0100 +Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl + +--- + arch/arm/boot/dts/rk3288.dtsi | 16 +++++++++++++--- + 1 file changed, 13 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index b37d1954d27c..db142a89bb7b 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -947,6 +947,8 @@ + <&cru PCLK_MIPI_DSI1>, + <&cru SCLK_EDP_24M>, + <&cru SCLK_EDP>, ++ <&cru SCLK_HDMI_CEC>, ++ <&cru SCLK_HDMI_HDCP>, + <&cru SCLK_ISP_JPE>, + <&cru SCLK_ISP>, + <&cru SCLK_RGA>; +@@ -1531,10 +1533,10 @@ + reg-io-width = <4>; + rockchip,grf = <&grf>; + interrupts = ; +- clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; +- clock-names = "iahb", "isfr"; ++ clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>; ++ clock-names = "iahb", "isfr", "cec"; + pinctrl-names = "default", "sleep"; +- pinctrl-0 = <&hdmi_ddc>; ++ pinctrl-0 = <&hdmi_ddc>, <&hdmi_cec_c0>; + pinctrl-1 = <&hdmi_gpio>; + power-domains = <&power RK3288_PD_VIO>; + status = "disabled"; +@@ -1903,6 +1905,14 @@ + &pcfg_pull_none>; + }; + ++ hdmi_cec_c0: hdmi-cec-c0 { ++ rockchip,pins = <7 16 RK_FUNC_2 &pcfg_pull_none>; ++ }; ++ ++ hdmi_cec_c7: hdmi-cec-c7 { ++ rockchip,pins = <7 23 RK_FUNC_4 &pcfg_pull_none>; ++ }; ++ + hdmi_ddc: hdmi-ddc { + rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>, + <7 20 RK_FUNC_2 &pcfg_pull_none>; + +From d3f46f176f6ea3d7f1f201875279dbf7bbcdb37c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 14 Feb 2018 08:03:12 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3399-odroidn1 board + +--- + arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts | 1005 ++++++++++++++++++++++ + 1 file changed, 1005 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts b/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts +new file mode 100644 +index 000000000000..1bff86c2bf03 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-odroidn1.dts +@@ -0,0 +1,1005 @@ ++/* ++ * Copyright (c) 2017 Hardkernel Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "dt-bindings/pwm/pwm.h" ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++#include "rk3399-linux.dtsi" ++#include ++ ++/ { ++ model = "Hardkernel ODROID-N1"; ++ compatible = "hardkernel,odroidn1", "rockchip,rk3399"; ++ ++ cpuinfo { ++ compatible = "rockchip,cpuinfo"; ++ nvmem-cells = <&efuse_id>; ++ nvmem-cell-names = "id"; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ leds: gpio_leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "led_pins"; ++ pinctrl-0 = <&led_pins>; ++ ++ heartbeat { ++ label = "blue:heartbeat"; ++ gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ autorepeat; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn>; ++ ++ button@0 { ++ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ label = "GPIO Key Power"; ++ linux,input-type = <1>; ++ gpio-key,wakeup = <1>; ++ debounce-interval = <100>; ++ }; ++ }; ++ ++ gpio-restart { ++ compatible = "gpio-restart"; ++ gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; ++ open-source; ++ priority = <255>; /* Highest priority */ ++ }; ++ ++ gpiomem { ++ compatible = "rockchip,rock-gpiomem"; ++ ++ /* gpio mmap area define */ ++ /* GPIO0 64K : 0xff720000 - 0xff72ffff */ ++ /* GPIO1 64K : 0xff730000 - 0xff73ffff */ ++ /* Reserved 64K : 0xff740000 - 0xff74ffff */ ++ /* PMUCRU 64K : 0xff750000 - 0xff75ffff */ ++ /* CRU 64K : 0xff760000 - 0xff76ffff */ ++ /* GRF 64K : 0xff770000 - 0xff77ffff */ ++ /* GPIO2 32K : 0xff780000 - 0xff777fff */ ++ /* GPIO3 32K : 0xff788000 - 0xff78ffff */ ++ /* GPIO4 32K : 0xff790000 - 0xff797fff */ ++ reg = <0 0xff720000 0 0x78000>, ++ ++ /* PMUGRF 64K : 0xff320000 - 0xff32ffff */ ++ <0 0xff320000 0 0x10000>; ++ status = "okay"; ++ }; ++ ++ fan0: pwm-fan { ++ compatible = "pwm-fan"; ++ status = "okay"; ++ pwms = <&pwm0 0 40000 PWM_POLARITY_INVERTED>; /* 25 kHz */ ++ ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <255 125 102 51>; /* PWM duty cycle */ ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s2>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ vccadc_ref: vccadc-ref { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ vcc5v0_host31: vcc5v0-host31-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host31_vbus_drv>; ++ regulator-name = "vcc5v0_host31"; ++ }; ++ ++ vcc5v0_host32: vcc5v0-host32-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host32_vbus_drv>; ++ regulator-name = "vcc5v0_host32"; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-name = "vdd_log"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ /* for rockchip boot on */ ++ rockchip,pwm_id= <2>; ++ rockchip,pwm_voltage = <1000000>; ++ }; ++ ++ odroid_sysfs: odroid-sysfs { ++ status = "okay"; ++ compatible = "odroid-sysfs"; ++ }; ++}; ++ ++&cluster0_opp { ++ opp-408000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-600000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-816000000 { ++ opp-microvolt = <850000>; ++ }; ++ opp-1008000000 { ++ opp-microvolt = <925000>; ++ }; ++ opp-1200000000 { ++ opp-microvolt = <1000000>; ++ }; ++ opp-1416000000 { ++ opp-microvolt = <1125000>; ++ }; ++ opp-1512000000 { ++ opp-hz = /bits/ 64 <1512000000>; ++ opp-microvolt = <1200000>; ++ opp-microvolt-L0 = <1200000>; ++ opp-microvolt-L1 = <1175000>; ++ opp-microvolt-L2 = <1150000>; ++ opp-microvolt-L3 = <1125000>; ++ clock-latency-ns = <40000>; ++ }; ++}; ++ ++&cluster1_opp { ++ opp-408000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-600000000 { ++ opp-microvolt = <800000>; ++ }; ++ opp-816000000 { ++ opp-microvolt = <825000>; ++ }; ++ opp-1008000000 { ++ opp-microvolt = <875000>; ++ }; ++ opp-1200000000 { ++ opp-microvolt = <950000>; ++ }; ++ opp-1416000000 { ++ opp-microvolt = <1025000>; ++ }; ++ opp-1608000000 { ++ opp-microvolt = <1100000>; ++ }; ++ opp-1800000000 { ++ opp-microvolt = <1200000>; ++ }; ++ opp-1992000000 { ++ opp-hz = /bits/ 64 <1992000000>; ++ opp-microvolt = <1300000>; ++ opp-microvolt-L0 = <1300000>; ++ opp-microvolt-L1 = <1275000>; ++ opp-microvolt-L2 = <1250000>; ++ opp-microvolt-L3 = <1225000>; ++ clock-latency-ns = <40000>; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gmac { ++ phy-supply = <&vcc_phy>; ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ tx_delay = <0x100>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_gpu>; ++}; ++ ++&hdmi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_in_vopl { ++ status = "disabled"; ++}; ++ ++&dp_in_vopl { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ clock-frequency = <400000>; ++ ++ vdd_cpu_b: syr827@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ vin-supply = <&vcc3v3_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-state = <3>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: syr828@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ vin-supply = <&vcc3v3_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-state = <3>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <23 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l &pmic_dvs2>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ vcc10-supply = <&vcc3v3_sys>; ++ vcc11-supply = <&vcc3v3_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc1v8_pmu>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-name = "vdd_center"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-name = "vdd_cpu_l"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8_dvp"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_tp: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc3v0_tp"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc1v8_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_sd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcca3v0_codec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vcc_1v5"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_codec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc_3v0"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s0"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++}; ++ ++&i2s0 { ++ status = "okay"; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <8>; ++ rockchip,capture-channels = <8>; ++ #sound-dai-cells = <0>; ++}; ++ ++&i2s1 { ++ status = "okay"; ++ rockchip,i2s-broken-burst-len; ++ rockchip,playback-channels = <2>; ++ rockchip,capture-channels = <2>; ++ #sound-dai-cells = <0>; ++}; ++ ++&i2s2 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */ ++ audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */ ++ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ ++ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ assigned-clocks = <&cru SCLK_PCIEPHY_REF>; ++ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; ++ assigned-clock-rates = <100000000>; ++ ep-gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; ++ num-lanes = <1>; ++ max-link-speed = <2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmu1830-supply = <&vcc_3v0>; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pmic { ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = ++ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = ++ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = ++ <1 23 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ pmic_dvs2: pmic-dvs2 { ++ rockchip,pins = ++ <1 18 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = ++ <4 25 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host31_vbus_drv: host31-vbus-drv { ++ rockchip,pins = ++ <0 12 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host32_vbus_drv: host32-vbus-drv { ++ rockchip,pins = ++ <0 13 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_pins: led-pins { ++ rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rockchip_suspend { ++ rockchip,power-ctrl = ++ <&gpio1 18 GPIO_ACTIVE_LOW>, ++ <&gpio1 14 GPIO_ACTIVE_HIGH>; ++}; ++ ++&route_edp { ++ status = "disabled"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vccadc_ref>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ keep-power-in-suspend; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++ supports-emmc; ++}; ++ ++&sdmmc { ++ max-frequency = <150000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ num-slots = <1>; ++ vqmmc-supply = <&vcc_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ status = "okay"; ++}; ++ ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&soc_thermal { ++ polling-delay-passive = <20>; /* milliseconds */ ++ polling-delay = <1000>; /* milliseconds */ ++ sustainable-power = <1000>; /* milliwatts */ ++ ++ thermal-sensors = <&tsadc 0>; ++ ++ trips { ++ /* fan active thermal point */ ++ cpu_alert0: trip-point@0 { ++ temperature = <50000>; /* millicelsius */ ++ hysteresis = <10000>; /* millicelsius */ ++ type = "active"; ++ }; ++ cpu_alert1: trip-point@1 { ++ temperature = <55000>; /* millicelsius */ ++ hysteresis = <10000>; /* millicelsius */ ++ type = "active"; ++ }; ++ cpu_alert2: trip-point@2 { ++ temperature = <60000>; /* millicelsius */ ++ hysteresis = <10000>; /* millicelsius */ ++ type = "active"; ++ }; ++ ++ /* big cluster thermal point */ ++ cpu_alert3: trip-point@3 { ++ temperature = <80000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert4: trip-point@4 { ++ temperature = <82000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert5: trip-point@5 { ++ temperature = <85000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert6: trip-point@6 { ++ temperature = <88000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ ++ /* little cluster thermal point */ ++ cpu_alert7: trip-point@7 { ++ temperature = <90000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert8: trip-point@8 { ++ temperature = <92000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_alert9: trip-point@9 { ++ temperature = <95000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ soc_crit: soc-crit { ++ temperature = <120000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ /* fan cooling map */ ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = ++ <&fan0 0 1>; ++ }; ++ map1 { ++ trip = <&cpu_alert1>; ++ cooling-device = ++ <&fan0 1 2>; ++ }; ++ map2 { ++ trip = <&cpu_alert2>; ++ cooling-device = ++ <&fan0 2 3>; ++ }; ++ ++ /* cpu cooling map */ ++ /* big cluster */ ++ map3 { ++ trip = <&cpu_alert3>; ++ cooling-device = ++ <&cpu_b0 0 2>; ++ contribution = <4096>; ++ }; ++ map4 { ++ trip = <&cpu_alert4>; ++ cooling-device = ++ <&cpu_b0 2 4>; ++ contribution = <4096>; ++ }; ++ map5 { ++ trip = <&cpu_alert5>; ++ cooling-device = ++ <&cpu_b0 4 7>; ++ contribution = <4096>; ++ }; ++ map6 { ++ trip = <&cpu_alert6>; ++ cooling-device = ++ <&cpu_b0 4 7>; ++ contribution = <4096>; ++ }; ++ ++ /* little cluster */ ++ map7 { ++ trip = <&cpu_alert7>; ++ cooling-device = ++ <&cpu_l0 0 2>; ++ contribution = <1024>; ++ }; ++ map8 { ++ trip = <&cpu_alert8>; ++ cooling-device = ++ <&cpu_l0 2 5>; ++ contribution = <1024>; ++ }; ++ ++ map9 { ++ trip = <&cpu_alert9>; ++ cooling-device = ++ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ contribution = <1024>; ++ }; ++ }; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ phy-supply = <&vcc5v0_host31>; ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ phy-supply = <&vcc5v0_host32>; ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++ }; ++}; ++ ++&sdio0 { ++ status = "disabled"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd_dwc3_1 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; ++ ++&vpu { ++ status = "okay"; ++}; + +From 7675bf39195d3c70ef6a0b6a123f5ce112012563 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 26 Feb 2018 23:39:15 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3399-rockpro64 board + +--- + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 171 ++++++++++++++++++++++ + 1 file changed, 171 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +new file mode 100644 +index 000000000000..0606771dbf5c +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +@@ -0,0 +1,171 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3399-box.dtsi" ++ ++/ { ++ model = "Pine64 RockPro64"; ++ compatible = "pine64,rockpro64", "rockchip,rk3399"; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&cpt_gpio>; ++ ++ sdio0 { ++ sdio0_bus1: sdio0-bus1 { ++ rockchip,pins = ++ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_bus4: sdio0-bus4 { ++ rockchip,pins = ++ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>, ++ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_cmd: sdio0-cmd { ++ rockchip,pins = ++ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>; ++ }; ++ ++ sdio0_clk: sdio0-clk { ++ rockchip,pins = ++ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus1: sdmmc-bus1 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = ++ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = ++ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ }; ++ ++ fusb30x { ++ fusb0_int: fusb0-int { ++ rockchip,pins = ++ <1 2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ compat { ++ cpt_gpio: cpt-gpio { ++ rockchip,pins = ++ <1 18 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ fusb0: fusb30x@22 { ++ compatible = "fairchild,fusb302"; ++ reg = <0x22>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int>; ++ vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; ++ int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&cdn_dp { ++ status = "okay"; ++ extcon = <&fusb0>; ++}; ++ ++&hdmi_in_vopl { ++ status = "disabled"; ++}; ++ ++&dp_in_vopb { ++ status = "disabled"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ rockchip,phy-table = ++ <74250000 0x8009 0x0004 0x0272>, ++ <165000000 0x802b 0x0004 0x0209>, ++ <297000000 0x8039 0x0005 0x028d>, ++ <594000000 0x8039 0x0000 0x019d>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio1 0x18 0x0>; ++ num-lanes = <4>; ++ max-link-speed = <2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ status = "okay"; ++}; + +From 7a0c34397e79227e3ff85e566e0b121e09b29786 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Mar 2018 09:08:35 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-trn9 board + +--- + arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts | 652 +++++++++++++++++++++++ + 1 file changed, 652 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts +new file mode 100644 +index 000000000000..a736d00d838a +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-box-trn9.dts +@@ -0,0 +1,652 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Rockchip RK3328 TRN9"; ++ compatible = "rockchip,rk3328-box-trn9", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag"; ++ }; ++ ++ gmac_clkin: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_host_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb30_host_drv>; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb20_host_drv>; ++ regulator-name = "vcc_host1_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "I2S"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ BT,power_gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "rtl8723bs"; ++ WIFI,host_wake_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; ++ clock_in_out = "input"; ++ phy-supply = <&vcc_io>; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmiim1_pins>; ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x26>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "disabled"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&i2s1 { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_18>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clk_32k_out>; ++ ++ clk_32k { ++ clk_32k_out: clk-32k-out { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb2 { ++ usb20_host_drv: usb20-host-drv { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb3 { ++ usb30_host_drv: usb30-host-drv { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdmmc_ext { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ max-frequency = <150000000>; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0ext_bus4 &sdmmc0ext_cmd &sdmmc0ext_clk>; ++ sd-uhs-sdr104; ++ supports-sdio; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; + +From 429966f1cf706834d8e35e4a8ac7230067796734 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Mar 2018 09:08:35 +0100 +Subject: [PATCH] arm64: dts: rockchip: add rk3328-box-z28 board + +--- + arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts | 583 ++++++++++++++++++++++++ + 1 file changed, 583 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts b/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts +new file mode 100644 +index 000000000000..d124195d6798 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-box-z28.dts +@@ -0,0 +1,583 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3328.dtsi" ++ ++/ { ++ model = "Rockchip RK3328 Z28"; ++ compatible = "rockchip,rk3328-box-z28", "rockchip,rk3328"; ++ ++ chosen { ++ bootargs = "rockchip_jtag earlyprintk=uart8250-32bit,0xff130000"; ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_host_5v: vcc-host-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb30_host_drv>; ++ regulator-name = "vcc_host_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb20_host_drv>; ++ regulator-name = "vcc_host1_5v"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ gpios = <&rk805 0 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led2 { ++ gpios = <&rk805 1 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&ir_int>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ }; ++ ++ hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "HDMI"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ spdif-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ BT,power_gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "rtl8188eu"; ++ WIFI,poweren_gpio = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>; ++ WIFI,reset_gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; ++ WIFI,host_wake_irq = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++}; ++ ++&codec { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&display_subsystem { ++ status = "okay"; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ supports-emmc; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; ++ ++&gmac2phy { ++ phy-supply = <&vcc_io>; ++ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; ++ assigned-clock-rate = <50000000>; ++ assigned-clocks = <&cru SCLK_MAC2PHY>; ++ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; ++ clock_in_out = "output"; ++ status = "okay"; ++}; ++ ++&gpu { ++ status = "okay"; ++ mali-supply = <&vdd_logic>; ++}; ++ ++&h265e { ++ status = "okay"; ++}; ++ ++&h265e_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ #sound-dai-cells = <0>; ++ ddc-i2c-scl-high-time-ns = <9625>; ++ ddc-i2c-scl-low-time-ns = <10000>; ++ status = "okay"; ++}; ++ ++&hdmiphy { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: rk805@18 { ++ compatible = "rockchip,rk805"; ++ status = "okay"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <6 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc5-supply = <&vcc_io>; ++ vcc6-supply = <&vcc_sys>; ++ ++ rtc { ++ status = "okay"; ++ }; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ gpio { ++ status = "okay"; ++ }; ++ ++ regulators { ++ compatible = "rk805-regulator"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ vdd_logic: RK805_DCDC1@0 { ++ regulator-compatible = "RK805_DCDC1"; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: RK805_DCDC2@1 { ++ regulator-compatible = "RK805_DCDC2"; ++ regulator-name = "vdd_arm"; ++ regulator-init-microvolt = <1225000>; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-initial-mode = <0x1>; ++ regulator-ramp-delay = <12500>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: RK805_DCDC3@2 { ++ regulator-compatible = "RK805_DCDC3"; ++ regulator-name = "vcc_ddr"; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: RK805_DCDC4@3 { ++ regulator-compatible = "RK805_DCDC4"; ++ regulator-name = "vcc_io"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <0x1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-mode = <0x2>; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: RK805_LDO1@4 { ++ regulator-compatible = "RK805_LDO1"; ++ regulator-name = "vcc_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: RK805_LDO2@5 { ++ regulator-compatible = "RK805_LDO2"; ++ regulator-name = "vcc18_emmc"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_11: RK805_LDO3@6 { ++ regulator-compatible = "RK805_LDO3"; ++ regulator-name = "vdd_11"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1100000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0 { ++ #sound-dai-cells = <0>; ++ rockchip,bclk-fs = <128>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io>; ++ vccio6-supply = <&vcc_io>; ++ pmuio-supply = <&vcc_io>; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clk_32k_out>; ++ ++ clk_32k { ++ clk_32k_out: clk-32k-out { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ usb20_host_drv: usb20-host-drv { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb3 { ++ usb30_host_drv: usb30-host-drv { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&rkvdec { ++ status = "okay"; ++ vcodec-supply = <&vdd_logic>; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; ++ supports-sd; ++ vmmc-supply = <&vcc_sd>; ++ status = "okay"; ++}; ++ ++&spdif { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ status = "okay"; ++}; ++ ++&threshold { ++ temperature = <90000>; /* millicelsius */ ++}; ++ ++&target { ++ temperature = <105000>; /* millicelsius */ ++}; ++ ++&soc_crit { ++ temperature = <110000>; /* millicelsius */ ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ rockchip,hw-tshut-temp = <120000>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++ ++}; ++ ++&u2phy_host { ++ phy-supply = <&vcc_host1_5v>; ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ phy-supply = <&vcc_otg_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ ++&u3phy_utmi { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&u3phy_pipe { ++ phy-supply = <&vcc_host_5v>; ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vpu_service { ++ status = "okay"; ++}; ++ ++&vpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&venc_srv { ++ status = "okay"; ++}; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch new file mode 100644 index 0000000000..dc6600ee86 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch @@ -0,0 +1,870 @@ +From 7894722c99f2be6806a245c2db1c0df61e890096 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Fri, 25 Nov 2016 14:12:01 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: fix enabling of the TX-delay for + RTL8211F + +The old logic always enabled the TX-delay when the phy-mode was set to +PHY_INTERFACE_MODE_RGMII. There are dedicated phy-modes which tell the +PHY driver to enable the RX and/or TX delays: +- PHY_INTERFACE_MODE_RGMII should disable the RX and TX delay in the + PHY (if required, the MAC should add the delays in this case) +- PHY_INTERFACE_MODE_RGMII_ID should enable RX and TX delay in the PHY +- PHY_INTERFACE_MODE_RGMII_TXID should enable the TX delay in the PHY +- PHY_INTERFACE_MODE_RGMII_RXID should enable the RX delay in the PHY + (currently not supported by RTL8211F) + +With this patch we enable the TX delay for PHY_INTERFACE_MODE_RGMII_ID +and PHY_INTERFACE_MODE_RGMII_TXID. +Additionally we now explicity disable the TX-delay, which seems to be +enabled automatically after a hard-reset of the PHY (by triggering it's +reset pin) to get a consistent state (as defined by the phy-mode). + +This fixes a compatibility problem with some SoCs where the TX-delay was +also added by the MAC. With the TX-delay being applied twice the TX +clock was off and TX traffic was broken or very slow (<10Mbit/s) on +1000Mbit/s links. + +Signed-off-by: Martin Blumenstingl +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +(cherry picked from commit e3230494b57ece68750e3e32d3e53d6b00917058) +--- + drivers/net/phy/realtek.c | 20 ++++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 43ab691362d4..686f3b259dc0 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -102,15 +102,19 @@ static int rtl8211f_config_init(struct phy_device *phydev) + if (ret < 0) + return ret; + +- if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { +- /* enable TXDLY */ +- phy_write(phydev, RTL8211F_PAGE_SELECT, 0xd08); +- reg = phy_read(phydev, 0x11); ++ phy_write(phydev, RTL8211F_PAGE_SELECT, 0xd08); ++ reg = phy_read(phydev, 0x11); ++ ++ /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */ ++ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || ++ phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + reg |= RTL8211F_TX_DELAY; +- phy_write(phydev, 0x11, reg); +- /* restore to default page 0 */ +- phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); +- } ++ else ++ reg &= ~RTL8211F_TX_DELAY; ++ ++ phy_write(phydev, 0x11, reg); ++ /* restore to default page 0 */ ++ phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); + + return 0; + } + +From 91f88fe0a8ae6a575e42384236ddac74a7343f33 Mon Sep 17 00:00:00 2001 +From: Kunihiko Hayashi +Date: Tue, 12 Sep 2017 18:54:35 +0900 +Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL8211F_PAGE_SELECT to + RTL821x_PAGE_SELECT + +This renames the definition of page select register from +RTL8211F_PAGE_SELECT to RTL821x_PAGE_SELECT to use it across models. + +Signed-off-by: Kunihiko Hayashi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +(cherry picked from commit 013955a6556766a76f9f2cc31e740fc6db6ecff4) +--- + drivers/net/phy/realtek.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 686f3b259dc0..d58cc8f518ac 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -22,11 +22,11 @@ + #define RTL821x_INER 0x12 + #define RTL821x_INER_INIT 0x6400 + #define RTL821x_INSR 0x13 ++#define RTL821x_PAGE_SELECT 0x1f + #define RTL8211E_INER_LINK_STATUS 0x400 + + #define RTL8211F_INER_LINK_STATUS 0x0010 + #define RTL8211F_INSR 0x1d +-#define RTL8211F_PAGE_SELECT 0x1f + #define RTL8211F_TX_DELAY 0x100 + + MODULE_DESCRIPTION("Realtek PHY driver"); +@@ -46,10 +46,10 @@ static int rtl8211f_ack_interrupt(struct phy_device *phydev) + { + int err; + +- phy_write(phydev, RTL8211F_PAGE_SELECT, 0xa43); ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0xa43); + err = phy_read(phydev, RTL8211F_INSR); + /* restore to default page 0 */ +- phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); + + return (err < 0) ? err : 0; + } +@@ -102,7 +102,7 @@ static int rtl8211f_config_init(struct phy_device *phydev) + if (ret < 0) + return ret; + +- phy_write(phydev, RTL8211F_PAGE_SELECT, 0xd08); ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0xd08); + reg = phy_read(phydev, 0x11); + + /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */ +@@ -114,7 +114,7 @@ static int rtl8211f_config_init(struct phy_device *phydev) + + phy_write(phydev, 0x11, reg); + /* restore to default page 0 */ +- phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); + + return 0; + } + +From 418a6d18802923ffc35b9d8d40ce97a7d44f4482 Mon Sep 17 00:00:00 2001 +From: Jassi Brar +Date: Tue, 12 Sep 2017 18:54:36 +0900 +Subject: [PATCH] UPSTREAM: net: phy: realtek: add RTL8201F phy-id and + functions + +Add RTL8201F phy-id and the related functions to the driver. + +The original patch is as follows: +https://patchwork.kernel.org/patch/2538341/ + +Signed-off-by: Jongsung Kim +Signed-off-by: Jassi Brar +Signed-off-by: Kunihiko Hayashi +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +(cherry picked from commit 513588dd44b09bb5fdd5066a4fbc1e7443b86d1c) +--- + drivers/net/phy/realtek.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 44 insertions(+) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index d58cc8f518ac..422cf1f6a60c 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -29,10 +29,22 @@ + #define RTL8211F_INSR 0x1d + #define RTL8211F_TX_DELAY 0x100 + ++#define RTL8201F_ISR 0x1e ++#define RTL8201F_IER 0x13 ++ + MODULE_DESCRIPTION("Realtek PHY driver"); + MODULE_AUTHOR("Johnson Leung"); + MODULE_LICENSE("GPL"); + ++static int rtl8201_ack_interrupt(struct phy_device *phydev) ++{ ++ int err; ++ ++ err = phy_read(phydev, RTL8201F_ISR); ++ ++ return (err < 0) ? err : 0; ++} ++ + static int rtl821x_ack_interrupt(struct phy_device *phydev) + { + int err; +@@ -54,6 +66,25 @@ static int rtl8211f_ack_interrupt(struct phy_device *phydev) + return (err < 0) ? err : 0; + } + ++static int rtl8201_config_intr(struct phy_device *phydev) ++{ ++ int err; ++ ++ /* switch to page 7 */ ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0x7); ++ ++ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) ++ err = phy_write(phydev, RTL8201F_IER, ++ BIT(13) | BIT(12) | BIT(11)); ++ else ++ err = phy_write(phydev, RTL8201F_IER, 0); ++ ++ /* restore to default page 0 */ ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); ++ ++ return err; ++} ++ + static int rtl8211b_config_intr(struct phy_device *phydev) + { + int err; +@@ -129,6 +160,18 @@ static struct phy_driver realtek_drvs[] = { + .config_aneg = &genphy_config_aneg, + .read_status = &genphy_read_status, + .driver = { .owner = THIS_MODULE,}, ++ }, { ++ .phy_id = 0x001cc816, ++ .name = "RTL8201F 10/100Mbps Ethernet", ++ .phy_id_mask = 0x001fffff, ++ .features = PHY_BASIC_FEATURES, ++ .flags = PHY_HAS_INTERRUPT, ++ .config_aneg = &genphy_config_aneg, ++ .read_status = &genphy_read_status, ++ .ack_interrupt = &rtl8201_ack_interrupt, ++ .config_intr = &rtl8201_config_intr, ++ .suspend = genphy_suspend, ++ .resume = genphy_resume, + }, { + .phy_id = 0x001cc912, + .name = "RTL8211B Gigabit Ethernet", +@@ -186,6 +229,7 @@ static struct phy_driver realtek_drvs[] = { + module_phy_driver(realtek_drvs); + + static struct mdio_device_id __maybe_unused realtek_tbl[] = { ++ { 0x001cc816, 0x001fffff }, + { 0x001cc912, 0x001fffff }, + { 0x001cc914, 0x001fffff }, + { 0x001cc915, 0x001fffff }, + +From 0e7b02714fa25f16aebcb917fa7017aded5bdf06 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Sun, 12 Nov 2017 16:16:04 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: fix RTL8211F interrupt mode + +After commit b94d22d94ad22 "ARM64: dts: meson-gx: add external PHY +interrupt on some platforms" ethernet stopped working on my Odroid-C2 +which has a RTL8211F phy. + +It turned out that no interrupts were triggered. Further analysis +showed the register INER can't be altered on page 0. +Because register INSR needs to be accessed via page 0xa43 I assumed +that register INER needs to be accessed via some page too. +Some brute force check resulted in page 0xa42 being the right one. + +With this patch the phy is working properly in interrupt mode. + +Fixes: 3447cf2e9a11 ("net/phy: Add support for Realtek RTL8211F") +Signed-off-by: Heiner Kallweit +Tested-by: Jerome Brunet +Signed-off-by: David S. Miller +(cherry picked from commit 3697d058b08d5b874f0253de173ef72e5d648f9a) +--- + drivers/net/phy/realtek.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 422cf1f6a60c..a30d0c08c63b 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -115,11 +115,13 @@ static int rtl8211f_config_intr(struct phy_device *phydev) + { + int err; + ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0xa42); + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) + err = phy_write(phydev, RTL821x_INER, + RTL8211F_INER_LINK_STATUS); + else + err = phy_write(phydev, RTL821x_INER, 0); ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0); + + return err; + } + +From 013120bec5f5e717baf7465e0eaafd6e5141d8c6 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 22:51:24 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: use the BIT and GENMASK macros + +This makes it easier to compare the #defines with the datasheets. +No functional changes. + +Signed-off-by: Martin Blumenstingl +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +(cherry picked from commit 8cc5baefbc0266b6d6c8e99cb8568f59be36a575) +--- + drivers/net/phy/realtek.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index a30d0c08c63b..f8dc29a75828 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -13,21 +13,22 @@ + * option) any later version. + * + */ ++#include + #include + #include + + #define RTL821x_PHYSR 0x11 +-#define RTL821x_PHYSR_DUPLEX 0x2000 +-#define RTL821x_PHYSR_SPEED 0xc000 ++#define RTL821x_PHYSR_DUPLEX BIT(13) ++#define RTL821x_PHYSR_SPEED GENMASK(15, 14) + #define RTL821x_INER 0x12 + #define RTL821x_INER_INIT 0x6400 + #define RTL821x_INSR 0x13 + #define RTL821x_PAGE_SELECT 0x1f +-#define RTL8211E_INER_LINK_STATUS 0x400 ++#define RTL8211E_INER_LINK_STATUS BIT(10) + +-#define RTL8211F_INER_LINK_STATUS 0x0010 ++#define RTL8211F_INER_LINK_STATUS BIT(4) + #define RTL8211F_INSR 0x1d +-#define RTL8211F_TX_DELAY 0x100 ++#define RTL8211F_TX_DELAY BIT(8) + + #define RTL8201F_ISR 0x1e + #define RTL8201F_IER 0x13 + +From ac2c0298c225eacc49b74a6f723b18a99a7b4b28 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 22:51:25 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL821x_INER_INIT to + RTL8211B_INER_INIT + +This macro is only used by the RTL8211B code. RTL8211E and RTL8211F both +use other bits to initialize the RTL821x_INER register. +No functional changes. + +Signed-off-by: Martin Blumenstingl +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +(cherry picked from commit 69021e32ec3ef02170482f6ed8130febaed27357) +--- + drivers/net/phy/realtek.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index f8dc29a75828..89308eac4088 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -21,7 +21,7 @@ + #define RTL821x_PHYSR_DUPLEX BIT(13) + #define RTL821x_PHYSR_SPEED GENMASK(15, 14) + #define RTL821x_INER 0x12 +-#define RTL821x_INER_INIT 0x6400 ++#define RTL8211B_INER_INIT 0x6400 + #define RTL821x_INSR 0x13 + #define RTL821x_PAGE_SELECT 0x1f + #define RTL8211E_INER_LINK_STATUS BIT(10) +@@ -92,7 +92,7 @@ static int rtl8211b_config_intr(struct phy_device *phydev) + + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) + err = phy_write(phydev, RTL821x_INER, +- RTL821x_INER_INIT); ++ RTL8211B_INER_INIT); + else + err = phy_write(phydev, RTL821x_INER, 0); + + +From 68e38ec78893a72b91255eaf56e1aa5dfcf81d1f Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 22:51:26 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: group all register bit #defines + for RTL821x_INER + +This simply moves all register bit #defines which describe the (PHY +specific) bits in the RTL821x_INER right below the RTL821x_INER register +definition. This makes it easier to spot which registers and bits belong +together. +No functional changes. + +Signed-off-by: Martin Blumenstingl +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +(cherry picked from commit a82f266d240d87e6111878bbfe287024fb6857c1) +--- + drivers/net/phy/realtek.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 89308eac4088..df97d903d2bf 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -20,13 +20,16 @@ + #define RTL821x_PHYSR 0x11 + #define RTL821x_PHYSR_DUPLEX BIT(13) + #define RTL821x_PHYSR_SPEED GENMASK(15, 14) ++ + #define RTL821x_INER 0x12 + #define RTL8211B_INER_INIT 0x6400 ++#define RTL8211E_INER_LINK_STATUS BIT(10) ++#define RTL8211F_INER_LINK_STATUS BIT(4) ++ + #define RTL821x_INSR 0x13 ++ + #define RTL821x_PAGE_SELECT 0x1f +-#define RTL8211E_INER_LINK_STATUS BIT(10) + +-#define RTL8211F_INER_LINK_STATUS BIT(4) + #define RTL8211F_INSR 0x1d + #define RTL8211F_TX_DELAY BIT(8) + + +From 89b955d9f11cc268626cdedbf75561ccc607bb90 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 22:51:27 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: use the same indentation for all + #defines + +This simply makes the code easier to read. No functional changes. + +Signed-off-by: Martin Blumenstingl +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +(cherry picked from commit f609ab0ed8e7bef2cd61d230bf9e83e1ec5b9ddb) +--- + drivers/net/phy/realtek.c | 27 ++++++++++++++------------- + 1 file changed, 14 insertions(+), 13 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index df97d903d2bf..701f34ad7d8d 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -17,24 +17,25 @@ + #include + #include + +-#define RTL821x_PHYSR 0x11 +-#define RTL821x_PHYSR_DUPLEX BIT(13) +-#define RTL821x_PHYSR_SPEED GENMASK(15, 14) ++#define RTL821x_PHYSR 0x11 ++#define RTL821x_PHYSR_DUPLEX BIT(13) ++#define RTL821x_PHYSR_SPEED GENMASK(15, 14) + +-#define RTL821x_INER 0x12 +-#define RTL8211B_INER_INIT 0x6400 +-#define RTL8211E_INER_LINK_STATUS BIT(10) +-#define RTL8211F_INER_LINK_STATUS BIT(4) ++#define RTL821x_INER 0x12 ++#define RTL8211B_INER_INIT 0x6400 ++#define RTL8211E_INER_LINK_STATUS BIT(10) ++#define RTL8211F_INER_LINK_STATUS BIT(4) + +-#define RTL821x_INSR 0x13 ++#define RTL821x_INSR 0x13 + +-#define RTL821x_PAGE_SELECT 0x1f ++#define RTL821x_PAGE_SELECT 0x1f + +-#define RTL8211F_INSR 0x1d +-#define RTL8211F_TX_DELAY BIT(8) ++#define RTL8211F_INSR 0x1d + +-#define RTL8201F_ISR 0x1e +-#define RTL8201F_IER 0x13 ++#define RTL8211F_TX_DELAY BIT(8) ++ ++#define RTL8201F_ISR 0x1e ++#define RTL8201F_IER 0x13 + + MODULE_DESCRIPTION("Realtek PHY driver"); + MODULE_AUTHOR("Johnson Leung"); + +From 304312f104de088682456d4cf7353732685fe455 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 22:51:28 +0100 +Subject: [PATCH] UPSTREAM: net: phy: realtek: add utility functions to + read/write page addresses + +Realtek PHYs implement the concept of so-called "extension pages". The +reason for this is probably because these PHYs expose more registers +than available in the standard address range. +After all read/write operations on such a page are done the driver +should switch back to page 0 where the standard MII registers (such as +MII_BMCR) are available. + +When referring to such a register the datasheets of RTL8211E and +RTL8211F always specify: +- the page / "ext. page" which has to be written to RTL821x_PAGE_SELECT +- an address (sometimes also called reg) + +These new utility functions make the existing code easier to read since +it removes some duplication (switching back to page 0 is done within the +new helpers for example). + +No functional changes are intended. + +Signed-off-by: Martin Blumenstingl +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +(cherry picked from commit 136819a6e8df374e6b9b424586ff11c9e241a1cb) +--- + drivers/net/phy/realtek.c | 83 ++++++++++++++++++++++++++++++----------------- + 1 file changed, 53 insertions(+), 30 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 701f34ad7d8d..b1d52e61d91c 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -41,6 +41,39 @@ MODULE_DESCRIPTION("Realtek PHY driver"); + MODULE_AUTHOR("Johnson Leung"); + MODULE_LICENSE("GPL"); + ++static int rtl8211x_page_read(struct phy_device *phydev, u16 page, u16 address) ++{ ++ int ret; ++ ++ ret = phy_write(phydev, RTL821x_PAGE_SELECT, page); ++ if (ret) ++ return ret; ++ ++ ret = phy_read(phydev, address); ++ ++ /* restore to default page 0 */ ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); ++ ++ return ret; ++} ++ ++static int rtl8211x_page_write(struct phy_device *phydev, u16 page, ++ u16 address, u16 val) ++{ ++ int ret; ++ ++ ret = phy_write(phydev, RTL821x_PAGE_SELECT, page); ++ if (ret) ++ return ret; ++ ++ ret = phy_write(phydev, address, val); ++ ++ /* restore to default page 0 */ ++ phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); ++ ++ return ret; ++} ++ + static int rtl8201_ack_interrupt(struct phy_device *phydev) + { + int err; +@@ -63,31 +96,21 @@ static int rtl8211f_ack_interrupt(struct phy_device *phydev) + { + int err; + +- phy_write(phydev, RTL821x_PAGE_SELECT, 0xa43); +- err = phy_read(phydev, RTL8211F_INSR); +- /* restore to default page 0 */ +- phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); ++ err = rtl8211x_page_read(phydev, 0xa43, RTL8211F_INSR); + + return (err < 0) ? err : 0; + } + + static int rtl8201_config_intr(struct phy_device *phydev) + { +- int err; +- +- /* switch to page 7 */ +- phy_write(phydev, RTL821x_PAGE_SELECT, 0x7); ++ u16 val; + + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) +- err = phy_write(phydev, RTL8201F_IER, +- BIT(13) | BIT(12) | BIT(11)); ++ val = BIT(13) | BIT(12) | BIT(11); + else +- err = phy_write(phydev, RTL8201F_IER, 0); ++ val = 0; + +- /* restore to default page 0 */ +- phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); +- +- return err; ++ return rtl8211x_page_write(phydev, 0x7, RTL8201F_IER, val); + } + + static int rtl8211b_config_intr(struct phy_device *phydev) +@@ -118,41 +141,41 @@ static int rtl8211e_config_intr(struct phy_device *phydev) + + static int rtl8211f_config_intr(struct phy_device *phydev) + { +- int err; ++ u16 val; + +- phy_write(phydev, RTL821x_PAGE_SELECT, 0xa42); + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) +- err = phy_write(phydev, RTL821x_INER, +- RTL8211F_INER_LINK_STATUS); ++ val = RTL8211F_INER_LINK_STATUS; + else +- err = phy_write(phydev, RTL821x_INER, 0); +- phy_write(phydev, RTL821x_PAGE_SELECT, 0); ++ val = 0; + +- return err; ++ return rtl8211x_page_write(phydev, 0xa42, RTL821x_INER, val); + } + + static int rtl8211f_config_init(struct phy_device *phydev) + { + int ret; +- u16 reg; ++ u16 val; + + ret = genphy_config_init(phydev); + if (ret < 0) + return ret; + +- phy_write(phydev, RTL821x_PAGE_SELECT, 0xd08); +- reg = phy_read(phydev, 0x11); ++ ret = rtl8211x_page_read(phydev, 0xd08, 0x11); ++ if (ret < 0) ++ return ret; ++ ++ val = ret & 0xffff; + + /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */ + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) +- reg |= RTL8211F_TX_DELAY; ++ val |= RTL8211F_TX_DELAY; + else +- reg &= ~RTL8211F_TX_DELAY; ++ val &= ~RTL8211F_TX_DELAY; + +- phy_write(phydev, 0x11, reg); +- /* restore to default page 0 */ +- phy_write(phydev, RTL821x_PAGE_SELECT, 0x0); ++ ret = rtl8211x_page_write(phydev, 0xd08, 0x11, val); ++ if (ret) ++ return ret; + + return 0; + } + +From aa354e4db670dda7682b1c4aed23cd6ffb51f715 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 23:06:48 +0100 +Subject: [PATCH] FROMLIST: net: phy: realtek: add support for configuring the + RX delay on RTL8211F + +On RTL8211F the RX delay can also be enabled/disabled. +The overall behavior of the RX delay is similar to the behavior of the +TX delay, which was already supported by the driver. + +The RX delay (similar to the TX delay) may be enabled using hardware pin +strapping. If the MAC already configures the RX delay (if required) then +the RX delay generated by the RTL8211F PHY has to be turned off. + +While here, update the comment regarding the TX delay why it has to be +enabled or disabled within the driver. +Also avoid code-duplication by extracting the code to mask/unmask bits +in a paged register into a new rtl8211x_page_mask_bits helper function. + +Signed-off-by: Martin Blumenstingl +--- + drivers/net/phy/realtek.c | 55 ++++++++++++++++++++++++++++++++++++++--------- + 1 file changed, 45 insertions(+), 10 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index b1d52e61d91c..890ea9d18d27 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -32,7 +32,10 @@ + + #define RTL8211F_INSR 0x1d + +-#define RTL8211F_TX_DELAY BIT(8) ++#define RTL8211F_RX_DELAY_REG 0x15 ++#define RTL8211F_RX_DELAY_EN BIT(3) ++#define RTL8211F_TX_DELAY_REG 0x11 ++#define RTL8211F_TX_DELAY_EN BIT(8) + + #define RTL8201F_ISR 0x1e + #define RTL8201F_IER 0x13 +@@ -74,6 +77,23 @@ static int rtl8211x_page_write(struct phy_device *phydev, u16 page, + return ret; + } + ++static int rtl8211x_page_mask_bits(struct phy_device *phydev, u16 page, ++ u16 address, u16 mask, u16 set) ++{ ++ int ret; ++ u16 val; ++ ++ ret = rtl8211x_page_read(phydev, page, address); ++ if (ret < 0) ++ return ret; ++ ++ val = ret & 0xffff; ++ val &= ~mask; ++ val |= (set & mask); ++ ++ return rtl8211x_page_write(phydev, page, address, val); ++} ++ + static int rtl8201_ack_interrupt(struct phy_device *phydev) + { + int err; +@@ -160,20 +180,35 @@ static int rtl8211f_config_init(struct phy_device *phydev) + if (ret < 0) + return ret; + +- ret = rtl8211x_page_read(phydev, 0xd08, 0x11); +- if (ret < 0) +- return ret; ++ /* ++ * enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it. ++ * this is needed because it can be enabled by pin strapping and ++ * conflict with the TX-delay configured by the MAC. ++ */ ++ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || ++ phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) ++ val = RTL8211F_TX_DELAY_EN; ++ else ++ val = 0; + +- val = ret & 0xffff; ++ ret = rtl8211x_page_mask_bits(phydev, 0xd08, RTL8211F_TX_DELAY_REG, ++ RTL8211F_TX_DELAY_EN, val); ++ if (ret) ++ return ret; + +- /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */ ++ /* ++ * enable RX-delay for rgmii-id and rgmii-rxid, otherwise disable it. ++ * this is needed because it can be enabled by pin strapping and ++ * conflict with the RX-delay configured by the MAC. ++ */ + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || +- phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) +- val |= RTL8211F_TX_DELAY; ++ phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ++ val = RTL8211F_RX_DELAY_EN; + else +- val &= ~RTL8211F_TX_DELAY; ++ val = 0; + +- ret = rtl8211x_page_write(phydev, 0xd08, 0x11, val); ++ ret = rtl8211x_page_mask_bits(phydev, 0xd08, RTL8211F_RX_DELAY_REG, ++ RTL8211F_RX_DELAY_EN, val); + if (ret) + return ret; + + +From 1503227b699167969f0c630a95f73e7760edefbc Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 23:06:49 +0100 +Subject: [PATCH] FROMLIST: net: phy: realtek: configure the INTB pin on + RTL8211F + +The interrupt pin on the RTL8211F PHY can be used in two different +modes: +INTB +- the default mode of the PHY +- interrupts can be configured through page 0xa42 register RTL821x_INER +- interrupts can be ACK'ed through RTL8211F_INSR +- it acts as a level-interrupt which is active low +- Wake-on-LAN "wakeup" status is available in RTL8211F_INSR bit 7 + +PMEB: +- special mode for Wake-on-LAN +- interrupts configured through page 0xa42 register RTL821x_INER are + disabled +- it supports a "pulse low" waveform for the interrupt + +For now we simply force the pin into INTB mode since the PHY driver does +not support Wake-on-LAN yet. + +Signed-off-by: Martin Blumenstingl +--- + drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++-- + 1 file changed, 25 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 890ea9d18d27..f307d220b49a 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -40,6 +40,9 @@ + #define RTL8201F_ISR 0x1e + #define RTL8201F_IER 0x13 + ++#define RTL8211F_INTBCR 0x16 ++#define RTL8211F_INTBCR_INTB_PMEB BIT(5) ++ + MODULE_DESCRIPTION("Realtek PHY driver"); + MODULE_AUTHOR("Johnson Leung"); + MODULE_LICENSE("GPL"); +@@ -161,12 +164,32 @@ static int rtl8211e_config_intr(struct phy_device *phydev) + + static int rtl8211f_config_intr(struct phy_device *phydev) + { ++ int err; + u16 val; + +- if (phydev->interrupts == PHY_INTERRUPT_ENABLED) ++ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { ++ /* ++ * The interrupt pin has two functions: ++ * 0: INTB: it acts as interrupt pin which can be configured ++ * through RTL821x_INER and the status can be read through ++ * RTL8211F_INSR ++ * 1: PMEB: a special "Power Management Event" mode for ++ * Wake-on-LAN operation (with support for a "pulse low" ++ * wave format). Interrupts configured through RTL821x_INER ++ * will not work in this mode ++ * ++ * select INTB mode in the "INTB pin control" register to ++ * ensure that the interrupt pin is in the correct mode. ++ */ ++ err = rtl8211x_page_mask_bits(phydev, 0xd40, RTL8211F_INTBCR, ++ RTL8211F_INTBCR_INTB_PMEB, 0); ++ if (err) ++ return err; ++ + val = RTL8211F_INER_LINK_STATUS; +- else ++ } else { + val = 0; ++ } + + return rtl8211x_page_write(phydev, 0xa42, RTL821x_INER, val); + } + +From 429c1855e10305c2838913a9dc074bd70831bb14 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 2 Dec 2017 23:06:50 +0100 +Subject: [PATCH] FROMLIST: net: phy: realtek: add more interrupt bits for + RTL8211E and RTL8211F + +This documents a few more bits in the RTL821x_INER register for RTL8211E +and RTL8211F. These are added only to document them (as no public +datasheets are available for these PHYs), they are currently not used. + +Signed-off-by: Martin Blumenstingl +--- + drivers/net/phy/realtek.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index f307d220b49a..15d342eefd6d 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -24,7 +24,14 @@ + #define RTL821x_INER 0x12 + #define RTL8211B_INER_INIT 0x6400 + #define RTL8211E_INER_LINK_STATUS BIT(10) ++#define RTL8211E_INER_ANEG_COMPLETED BIT(11) ++#define RTL8211E_INER_PAGE_RECEIVED BIT(12) ++#define RTL8211E_INER_ANEG_ERROR BIT(15) + #define RTL8211F_INER_LINK_STATUS BIT(4) ++#define RTL8211F_INER_PHY_REGISTER_ACCESSIBLE BIT(5) ++#define RTL8211F_INER_WOL_PME BIT(7) ++#define RTL8211F_INER_ALDPS_STATE_CHANGE BIT(9) ++#define RTL8211F_INER_JABBER BIT(10) + + #define RTL821x_INSR 0x13 + diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch new file mode 100644 index 0000000000..a0ffcf317a --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch @@ -0,0 +1,1120 @@ +From 59a82f24064c60e03af52938e5a2257038e1ee07 Mon Sep 17 00:00:00 2001 +From: Pantelis Antoniou +Date: Thu, 22 Oct 2015 23:30:04 +0300 +Subject: [PATCH] UPSTREAM: configfs: implement binary attributes + +ConfigFS lacked binary attributes up until now. This patch +introduces support for binary attributes in a somewhat similar +manner of sysfs binary attributes albeit with changes that +fit the configfs usage model. + +Problems that configfs binary attributes fix are everything that +requires a binary blob as part of the configuration of a resource, +such as bitstream loading for FPGAs, DTBs for dynamically created +devices etc. + +Look at Documentation/filesystems/configfs/configfs.txt for internals +and howto use them. + +This patch is against linux-next as of today that contains +Christoph's configfs rework. + +Signed-off-by: Pantelis Antoniou +[hch: folded a fix from Geert Uytterhoeven ] +[hch: a few tiny updates based on review feedback] +Signed-off-by: Christoph Hellwig +(cherry picked from commit 03607ace807b414eab46323c794b6fb8fcc2d48c) +--- + Documentation/filesystems/configfs/configfs.txt | 57 +++++- + fs/configfs/configfs_internal.h | 14 +- + fs/configfs/dir.c | 18 +- + fs/configfs/file.c | 255 +++++++++++++++++++++++- + fs/configfs/inode.c | 2 +- + include/linux/configfs.h | 50 +++++ + 6 files changed, 374 insertions(+), 22 deletions(-) + +diff --git a/Documentation/filesystems/configfs/configfs.txt b/Documentation/filesystems/configfs/configfs.txt +index af68efdbbfad..e5fe521eea1d 100644 +--- a/Documentation/filesystems/configfs/configfs.txt ++++ b/Documentation/filesystems/configfs/configfs.txt +@@ -51,15 +51,27 @@ configfs tree is always there, whether mounted on /config or not. + An item is created via mkdir(2). The item's attributes will also + appear at this time. readdir(3) can determine what the attributes are, + read(2) can query their default values, and write(2) can store new +-values. Like sysfs, attributes should be ASCII text files, preferably +-with only one value per file. The same efficiency caveats from sysfs +-apply. Don't mix more than one attribute in one attribute file. +- +-Like sysfs, configfs expects write(2) to store the entire buffer at +-once. When writing to configfs attributes, userspace processes should +-first read the entire file, modify the portions they wish to change, and +-then write the entire buffer back. Attribute files have a maximum size +-of one page (PAGE_SIZE, 4096 on i386). ++values. Don't mix more than one attribute in one attribute file. ++ ++There are two types of configfs attributes: ++ ++* Normal attributes, which similar to sysfs attributes, are small ASCII text ++files, with a maximum size of one page (PAGE_SIZE, 4096 on i386). Preferably ++only one value per file should be used, and the same caveats from sysfs apply. ++Configfs expects write(2) to store the entire buffer at once. When writing to ++normal configfs attributes, userspace processes should first read the entire ++file, modify the portions they wish to change, and then write the entire ++buffer back. ++ ++* Binary attributes, which are somewhat similar to sysfs binary attributes, ++but with a few slight changes to semantics. The PAGE_SIZE limitation does not ++apply, but the whole binary item must fit in single kernel vmalloc'ed buffer. ++The write(2) calls from user space are buffered, and the attributes' ++write_bin_attribute method will be invoked on the final close, therefore it is ++imperative for user-space to check the return code of close(2) in order to ++verify that the operation finished successfully. ++To avoid a malicious user OOMing the kernel, there's a per-binary attribute ++maximum buffer value. + + When an item needs to be destroyed, remove it with rmdir(2). An + item cannot be destroyed if any other item has a link to it (via +@@ -171,6 +183,7 @@ among other things. For that, it needs a type. + struct configfs_item_operations *ct_item_ops; + struct configfs_group_operations *ct_group_ops; + struct configfs_attribute **ct_attrs; ++ struct configfs_bin_attribute **ct_bin_attrs; + }; + + The most basic function of a config_item_type is to define what +@@ -201,6 +214,32 @@ be called whenever userspace asks for a read(2) on the attribute. If an + attribute is writable and provides a ->store method, that method will be + be called whenever userspace asks for a write(2) on the attribute. + ++[struct configfs_bin_attribute] ++ ++ struct configfs_attribute { ++ struct configfs_attribute cb_attr; ++ void *cb_private; ++ size_t cb_max_size; ++ }; ++ ++The binary attribute is used when the one needs to use binary blob to ++appear as the contents of a file in the item's configfs directory. ++To do so add the binary attribute to the NULL-terminated array ++config_item_type->ct_bin_attrs, and the item appears in configfs, the ++attribute file will appear with the configfs_bin_attribute->cb_attr.ca_name ++filename. configfs_bin_attribute->cb_attr.ca_mode specifies the file ++permissions. ++The cb_private member is provided for use by the driver, while the ++cb_max_size member specifies the maximum amount of vmalloc buffer ++to be used. ++ ++If binary attribute is readable and the config_item provides a ++ct_item_ops->read_bin_attribute() method, that method will be called ++whenever userspace asks for a read(2) on the attribute. The converse ++will happen for write(2). The reads/writes are bufferred so only a ++single read/write will occur; the attributes' need not concern itself ++with it. ++ + [struct config_group] + + A config_item cannot live in a vacuum. The only way one can be created +diff --git a/fs/configfs/configfs_internal.h b/fs/configfs/configfs_internal.h +index b65d1ef532d5..ccc31fa6f1a7 100644 +--- a/fs/configfs/configfs_internal.h ++++ b/fs/configfs/configfs_internal.h +@@ -53,13 +53,14 @@ struct configfs_dirent { + #define CONFIGFS_ROOT 0x0001 + #define CONFIGFS_DIR 0x0002 + #define CONFIGFS_ITEM_ATTR 0x0004 ++#define CONFIGFS_ITEM_BIN_ATTR 0x0008 + #define CONFIGFS_ITEM_LINK 0x0020 + #define CONFIGFS_USET_DIR 0x0040 + #define CONFIGFS_USET_DEFAULT 0x0080 + #define CONFIGFS_USET_DROPPING 0x0100 + #define CONFIGFS_USET_IN_MKDIR 0x0200 + #define CONFIGFS_USET_CREATING 0x0400 +-#define CONFIGFS_NOT_PINNED (CONFIGFS_ITEM_ATTR) ++#define CONFIGFS_NOT_PINNED (CONFIGFS_ITEM_ATTR | CONFIGFS_ITEM_BIN_ATTR) + + extern struct mutex configfs_symlink_mutex; + extern spinlock_t configfs_dirent_lock; +@@ -72,6 +73,8 @@ extern struct inode * configfs_new_inode(umode_t mode, struct configfs_dirent *, + extern int configfs_create(struct dentry *, umode_t mode, void (*init)(struct inode *)); + + extern int configfs_create_file(struct config_item *, const struct configfs_attribute *); ++extern int configfs_create_bin_file(struct config_item *, ++ const struct configfs_bin_attribute *); + extern int configfs_make_dirent(struct configfs_dirent *, + struct dentry *, void *, umode_t, int); + extern int configfs_dirent_is_ready(struct configfs_dirent *); +@@ -88,7 +91,7 @@ extern void configfs_release_fs(void); + extern struct rw_semaphore configfs_rename_sem; + extern const struct file_operations configfs_dir_operations; + extern const struct file_operations configfs_file_operations; +-extern const struct file_operations bin_fops; ++extern const struct file_operations configfs_bin_file_operations; + extern const struct inode_operations configfs_dir_inode_operations; + extern const struct inode_operations configfs_root_inode_operations; + extern const struct inode_operations configfs_symlink_inode_operations; +@@ -119,6 +122,13 @@ static inline struct configfs_attribute * to_attr(struct dentry * dentry) + return ((struct configfs_attribute *) sd->s_element); + } + ++static inline struct configfs_bin_attribute *to_bin_attr(struct dentry *dentry) ++{ ++ struct configfs_attribute *attr = to_attr(dentry); ++ ++ return container_of(attr, struct configfs_bin_attribute, cb_attr); ++} ++ + static inline struct config_item *configfs_get_config_item(struct dentry *dentry) + { + struct config_item * item = NULL; +diff --git a/fs/configfs/dir.c b/fs/configfs/dir.c +index a7a1b218f308..7ae97e83f121 100644 +--- a/fs/configfs/dir.c ++++ b/fs/configfs/dir.c +@@ -255,6 +255,12 @@ static void configfs_init_file(struct inode * inode) + inode->i_fop = &configfs_file_operations; + } + ++static void configfs_init_bin_file(struct inode *inode) ++{ ++ inode->i_size = 0; ++ inode->i_fop = &configfs_bin_file_operations; ++} ++ + static void init_symlink(struct inode * inode) + { + inode->i_op = &configfs_symlink_inode_operations; +@@ -423,7 +429,9 @@ static int configfs_attach_attr(struct configfs_dirent * sd, struct dentry * den + spin_unlock(&configfs_dirent_lock); + + error = configfs_create(dentry, (attr->ca_mode & S_IALLUGO) | S_IFREG, +- configfs_init_file); ++ (sd->s_type & CONFIGFS_ITEM_BIN_ATTR) ? ++ configfs_init_bin_file : ++ configfs_init_file); + if (error) { + configfs_put(sd); + return error; +@@ -583,6 +591,7 @@ static int populate_attrs(struct config_item *item) + { + struct config_item_type *t = item->ci_type; + struct configfs_attribute *attr; ++ struct configfs_bin_attribute *bin_attr; + int error = 0; + int i; + +@@ -594,6 +603,13 @@ static int populate_attrs(struct config_item *item) + break; + } + } ++ if (t->ct_bin_attrs) { ++ for (i = 0; (bin_attr = t->ct_bin_attrs[i]) != NULL; i++) { ++ error = configfs_create_bin_file(item, bin_attr); ++ if (error) ++ break; ++ } ++ } + + if (error) + detach_attrs(item); +diff --git a/fs/configfs/file.c b/fs/configfs/file.c +index d39099ea7df7..3687187c8ea5 100644 +--- a/fs/configfs/file.c ++++ b/fs/configfs/file.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -48,6 +49,10 @@ struct configfs_buffer { + struct configfs_item_operations * ops; + struct mutex mutex; + int needs_read_fill; ++ bool read_in_progress; ++ bool write_in_progress; ++ char *bin_buffer; ++ int bin_buffer_size; + }; + + +@@ -123,6 +128,87 @@ out: + return retval; + } + ++/** ++ * configfs_read_bin_file - read a binary attribute. ++ * @file: file pointer. ++ * @buf: buffer to fill. ++ * @count: number of bytes to read. ++ * @ppos: starting offset in file. ++ * ++ * Userspace wants to read a binary attribute file. The attribute ++ * descriptor is in the file's ->d_fsdata. The target item is in the ++ * directory's ->d_fsdata. ++ * ++ * We check whether we need to refill the buffer. If so we will ++ * call the attributes' attr->read() twice. The first time we ++ * will pass a NULL as a buffer pointer, which the attributes' method ++ * will use to return the size of the buffer required. If no error ++ * occurs we will allocate the buffer using vmalloc and call ++ * attr->read() again passing that buffer as an argument. ++ * Then we just copy to user-space using simple_read_from_buffer. ++ */ ++ ++static ssize_t ++configfs_read_bin_file(struct file *file, char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct configfs_buffer *buffer = file->private_data; ++ struct dentry *dentry = file->f_path.dentry; ++ struct config_item *item = to_item(dentry->d_parent); ++ struct configfs_bin_attribute *bin_attr = to_bin_attr(dentry); ++ ssize_t retval = 0; ++ ssize_t len = min_t(size_t, count, PAGE_SIZE); ++ ++ mutex_lock(&buffer->mutex); ++ ++ /* we don't support switching read/write modes */ ++ if (buffer->write_in_progress) { ++ retval = -ETXTBSY; ++ goto out; ++ } ++ buffer->read_in_progress = 1; ++ ++ if (buffer->needs_read_fill) { ++ /* perform first read with buf == NULL to get extent */ ++ len = bin_attr->read(item, NULL, 0); ++ if (len <= 0) { ++ retval = len; ++ goto out; ++ } ++ ++ /* do not exceed the maximum value */ ++ if (bin_attr->cb_max_size && len > bin_attr->cb_max_size) { ++ retval = -EFBIG; ++ goto out; ++ } ++ ++ buffer->bin_buffer = vmalloc(len); ++ if (buffer->bin_buffer == NULL) { ++ retval = -ENOMEM; ++ goto out; ++ } ++ buffer->bin_buffer_size = len; ++ ++ /* perform second read to fill buffer */ ++ len = bin_attr->read(item, buffer->bin_buffer, len); ++ if (len < 0) { ++ retval = len; ++ vfree(buffer->bin_buffer); ++ buffer->bin_buffer_size = 0; ++ buffer->bin_buffer = NULL; ++ goto out; ++ } ++ ++ buffer->needs_read_fill = 0; ++ } ++ ++ retval = simple_read_from_buffer(buf, count, ppos, buffer->bin_buffer, ++ buffer->bin_buffer_size); ++out: ++ mutex_unlock(&buffer->mutex); ++ return retval; ++} ++ + + /** + * fill_write_buffer - copy buffer from userspace. +@@ -209,10 +295,80 @@ configfs_write_file(struct file *file, const char __user *buf, size_t count, lof + return len; + } + +-static int check_perm(struct inode * inode, struct file * file) ++/** ++ * configfs_write_bin_file - write a binary attribute. ++ * @file: file pointer ++ * @buf: data to write ++ * @count: number of bytes ++ * @ppos: starting offset ++ * ++ * Writing to a binary attribute file is similar to a normal read. ++ * We buffer the consecutive writes (binary attribute files do not ++ * support lseek) in a continuously growing buffer, but we don't ++ * commit until the close of the file. ++ */ ++ ++static ssize_t ++configfs_write_bin_file(struct file *file, const char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct configfs_buffer *buffer = file->private_data; ++ struct dentry *dentry = file->f_path.dentry; ++ struct configfs_bin_attribute *bin_attr = to_bin_attr(dentry); ++ void *tbuf = NULL; ++ ssize_t len; ++ ++ mutex_lock(&buffer->mutex); ++ ++ /* we don't support switching read/write modes */ ++ if (buffer->read_in_progress) { ++ len = -ETXTBSY; ++ goto out; ++ } ++ buffer->write_in_progress = 1; ++ ++ /* buffer grows? */ ++ if (*ppos + count > buffer->bin_buffer_size) { ++ ++ if (bin_attr->cb_max_size && ++ *ppos + count > bin_attr->cb_max_size) { ++ len = -EFBIG; ++ } ++ ++ tbuf = vmalloc(*ppos + count); ++ if (tbuf == NULL) { ++ len = -ENOMEM; ++ goto out; ++ } ++ ++ /* copy old contents */ ++ if (buffer->bin_buffer) { ++ memcpy(tbuf, buffer->bin_buffer, ++ buffer->bin_buffer_size); ++ vfree(buffer->bin_buffer); ++ } ++ ++ /* clear the new area */ ++ memset(tbuf + buffer->bin_buffer_size, 0, ++ *ppos + count - buffer->bin_buffer_size); ++ buffer->bin_buffer = tbuf; ++ buffer->bin_buffer_size = *ppos + count; ++ } ++ ++ len = simple_write_to_buffer(buffer->bin_buffer, ++ buffer->bin_buffer_size, ppos, buf, count); ++ if (len > 0) ++ *ppos += len; ++out: ++ mutex_unlock(&buffer->mutex); ++ return len; ++} ++ ++static int check_perm(struct inode * inode, struct file * file, int type) + { + struct config_item *item = configfs_get_config_item(file->f_path.dentry->d_parent); + struct configfs_attribute * attr = to_attr(file->f_path.dentry); ++ struct configfs_bin_attribute *bin_attr = NULL; + struct configfs_buffer * buffer; + struct configfs_item_operations * ops = NULL; + int error = 0; +@@ -220,6 +376,9 @@ static int check_perm(struct inode * inode, struct file * file) + if (!item || !attr) + goto Einval; + ++ if (type & CONFIGFS_ITEM_BIN_ATTR) ++ bin_attr = to_bin_attr(file->f_path.dentry); ++ + /* Grab the module reference for this attribute if we have one */ + if (!try_module_get(attr->ca_owner)) { + error = -ENODEV; +@@ -236,9 +395,14 @@ static int check_perm(struct inode * inode, struct file * file) + * and we must have a store method. + */ + if (file->f_mode & FMODE_WRITE) { +- if (!(inode->i_mode & S_IWUGO) || !attr->store) ++ if (!(inode->i_mode & S_IWUGO)) ++ goto Eaccess; ++ ++ if ((type & CONFIGFS_ITEM_ATTR) && !attr->store) + goto Eaccess; + ++ if ((type & CONFIGFS_ITEM_BIN_ATTR) && !bin_attr->write) ++ goto Eaccess; + } + + /* File needs read support. +@@ -246,7 +410,13 @@ static int check_perm(struct inode * inode, struct file * file) + * must be a show method for it. + */ + if (file->f_mode & FMODE_READ) { +- if (!(inode->i_mode & S_IRUGO) || !attr->show) ++ if (!(inode->i_mode & S_IRUGO)) ++ goto Eaccess; ++ ++ if ((type & CONFIGFS_ITEM_ATTR) && !attr->show) ++ goto Eaccess; ++ ++ if ((type & CONFIGFS_ITEM_BIN_ATTR) && !bin_attr->read) + goto Eaccess; + } + +@@ -260,6 +430,8 @@ static int check_perm(struct inode * inode, struct file * file) + } + mutex_init(&buffer->mutex); + buffer->needs_read_fill = 1; ++ buffer->read_in_progress = 0; ++ buffer->write_in_progress = 0; + buffer->ops = ops; + file->private_data = buffer; + goto Done; +@@ -277,12 +449,7 @@ static int check_perm(struct inode * inode, struct file * file) + return error; + } + +-static int configfs_open_file(struct inode * inode, struct file * filp) +-{ +- return check_perm(inode,filp); +-} +- +-static int configfs_release(struct inode * inode, struct file * filp) ++static int configfs_release(struct inode *inode, struct file *filp) + { + struct config_item * item = to_item(filp->f_path.dentry->d_parent); + struct configfs_attribute * attr = to_attr(filp->f_path.dentry); +@@ -303,6 +470,47 @@ static int configfs_release(struct inode * inode, struct file * filp) + return 0; + } + ++static int configfs_open_file(struct inode *inode, struct file *filp) ++{ ++ return check_perm(inode, filp, CONFIGFS_ITEM_ATTR); ++} ++ ++static int configfs_open_bin_file(struct inode *inode, struct file *filp) ++{ ++ return check_perm(inode, filp, CONFIGFS_ITEM_BIN_ATTR); ++} ++ ++static int configfs_release_bin_file(struct inode *inode, struct file *filp) ++{ ++ struct configfs_buffer *buffer = filp->private_data; ++ struct dentry *dentry = filp->f_path.dentry; ++ struct config_item *item = to_item(dentry->d_parent); ++ struct configfs_bin_attribute *bin_attr = to_bin_attr(dentry); ++ ssize_t len = 0; ++ int ret; ++ ++ buffer->read_in_progress = 0; ++ ++ if (buffer->write_in_progress) { ++ buffer->write_in_progress = 0; ++ ++ len = bin_attr->write(item, buffer->bin_buffer, ++ buffer->bin_buffer_size); ++ ++ /* vfree on NULL is safe */ ++ vfree(buffer->bin_buffer); ++ buffer->bin_buffer = NULL; ++ buffer->bin_buffer_size = 0; ++ buffer->needs_read_fill = 1; ++ } ++ ++ ret = configfs_release(inode, filp); ++ if (len < 0) ++ return len; ++ return ret; ++} ++ ++ + const struct file_operations configfs_file_operations = { + .read = configfs_read_file, + .write = configfs_write_file, +@@ -311,6 +519,14 @@ const struct file_operations configfs_file_operations = { + .release = configfs_release, + }; + ++const struct file_operations configfs_bin_file_operations = { ++ .read = configfs_read_bin_file, ++ .write = configfs_write_bin_file, ++ .llseek = NULL, /* bin file is not seekable */ ++ .open = configfs_open_bin_file, ++ .release = configfs_release_bin_file, ++}; ++ + /** + * configfs_create_file - create an attribute file for an item. + * @item: item we're creating for. +@@ -332,3 +548,24 @@ int configfs_create_file(struct config_item * item, const struct configfs_attrib + return error; + } + ++/** ++ * configfs_create_bin_file - create a binary attribute file for an item. ++ * @item: item we're creating for. ++ * @attr: atrribute descriptor. ++ */ ++ ++int configfs_create_bin_file(struct config_item *item, ++ const struct configfs_bin_attribute *bin_attr) ++{ ++ struct dentry *dir = item->ci_dentry; ++ struct configfs_dirent *parent_sd = dir->d_fsdata; ++ umode_t mode = (bin_attr->cb_attr.ca_mode & S_IALLUGO) | S_IFREG; ++ int error = 0; ++ ++ mutex_lock_nested(&dir->d_inode->i_mutex, I_MUTEX_NORMAL); ++ error = configfs_make_dirent(parent_sd, NULL, (void *) bin_attr, mode, ++ CONFIGFS_ITEM_BIN_ATTR); ++ mutex_unlock(&dir->d_inode->i_mutex); ++ ++ return error; ++} +diff --git a/fs/configfs/inode.c b/fs/configfs/inode.c +index eae87575e681..0cc810e9dccc 100644 +--- a/fs/configfs/inode.c ++++ b/fs/configfs/inode.c +@@ -218,7 +218,7 @@ const unsigned char * configfs_get_name(struct configfs_dirent *sd) + if (sd->s_type & (CONFIGFS_DIR | CONFIGFS_ITEM_LINK)) + return sd->s_dentry->d_name.name; + +- if (sd->s_type & CONFIGFS_ITEM_ATTR) { ++ if (sd->s_type & (CONFIGFS_ITEM_ATTR | CONFIGFS_ITEM_BIN_ATTR)) { + attr = sd->s_element; + return attr->ca_name; + } +diff --git a/include/linux/configfs.h b/include/linux/configfs.h +index 758a029011b1..f7300d023dbe 100644 +--- a/include/linux/configfs.h ++++ b/include/linux/configfs.h +@@ -51,6 +51,7 @@ struct module; + struct configfs_item_operations; + struct configfs_group_operations; + struct configfs_attribute; ++struct configfs_bin_attribute; + struct configfs_subsystem; + + struct config_item { +@@ -84,6 +85,7 @@ struct config_item_type { + struct configfs_item_operations *ct_item_ops; + struct configfs_group_operations *ct_group_ops; + struct configfs_attribute **ct_attrs; ++ struct configfs_bin_attribute **ct_bin_attrs; + }; + + /** +@@ -154,6 +156,54 @@ static struct configfs_attribute _pfx##attr_##_name = { \ + .store = _pfx##_name##_store, \ + } + ++struct file; ++struct vm_area_struct; ++ ++struct configfs_bin_attribute { ++ struct configfs_attribute cb_attr; /* std. attribute */ ++ void *cb_private; /* for user */ ++ size_t cb_max_size; /* max core size */ ++ ssize_t (*read)(struct config_item *, void *, size_t); ++ ssize_t (*write)(struct config_item *, const void *, size_t); ++}; ++ ++#define CONFIGFS_BIN_ATTR(_pfx, _name, _priv, _maxsz) \ ++static struct configfs_bin_attribute _pfx##attr_##_name = { \ ++ .cb_attr = { \ ++ .ca_name = __stringify(_name), \ ++ .ca_mode = S_IRUGO | S_IWUSR, \ ++ .ca_owner = THIS_MODULE, \ ++ }, \ ++ .cb_private = _priv, \ ++ .cb_max_size = _maxsz, \ ++ .read = _pfx##_name##_read, \ ++ .write = _pfx##_name##_write, \ ++} ++ ++#define CONFIGFS_BIN_ATTR_RO(_pfx, _name, _priv, _maxsz) \ ++static struct configfs_attribute _pfx##attr_##_name = { \ ++ .cb_attr = { \ ++ .ca_name = __stringify(_name), \ ++ .ca_mode = S_IRUGO, \ ++ .ca_owner = THIS_MODULE, \ ++ }, \ ++ .cb_private = _priv, \ ++ .cb_max_size = _maxsz, \ ++ .read = _pfx##_name##_read, \ ++} ++ ++#define CONFIGFS_BIN_ATTR_WO(_pfx, _name, _priv, _maxsz) \ ++static struct configfs_attribute _pfx##attr_##_name = { \ ++ .cb_attr = { \ ++ .ca_name = __stringify(_name), \ ++ .ca_mode = S_IWUSR, \ ++ .ca_owner = THIS_MODULE, \ ++ }, \ ++ .cb_private = _priv, \ ++ .cb_max_size = _maxsz, \ ++ .write = _pfx##_name##_write, \ ++} ++ + /* + * If allow_link() exists, the item can symlink(2) out to other + * items. If the item is a group, it may support mkdir(2). + +From e35c4a7f4a74aa78fb3518e6eaccb7387600eccb Mon Sep 17 00:00:00 2001 +From: Octavian Purdila +Date: Wed, 23 Mar 2016 14:14:48 +0200 +Subject: [PATCH] UPSTREAM: configfs: fix CONFIGFS_BIN_ATTR_[RW]O definitions + +The type should be struct configfs_bin_attribute and not struct +configfs_attribute. + +Signed-off-by: Octavian Purdila +Signed-off-by: Christoph Hellwig +(cherry picked from commit 96c22a3293512ba684e73a981196430f524689da) +--- + include/linux/configfs.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/include/linux/configfs.h b/include/linux/configfs.h +index f7300d023dbe..658066d63180 100644 +--- a/include/linux/configfs.h ++++ b/include/linux/configfs.h +@@ -181,7 +181,7 @@ static struct configfs_bin_attribute _pfx##attr_##_name = { \ + } + + #define CONFIGFS_BIN_ATTR_RO(_pfx, _name, _priv, _maxsz) \ +-static struct configfs_attribute _pfx##attr_##_name = { \ ++static struct configfs_bin_attribute _pfx##attr_##_name = { \ + .cb_attr = { \ + .ca_name = __stringify(_name), \ + .ca_mode = S_IRUGO, \ +@@ -193,7 +193,7 @@ static struct configfs_attribute _pfx##attr_##_name = { \ + } + + #define CONFIGFS_BIN_ATTR_WO(_pfx, _name, _priv, _maxsz) \ +-static struct configfs_attribute _pfx##attr_##_name = { \ ++static struct configfs_bin_attribute _pfx##attr_##_name = { \ + .cb_attr = { \ + .ca_name = __stringify(_name), \ + .ca_mode = S_IWUSR, \ + +From b0f4ef7b999ed084376777763e20644dc9061ad3 Mon Sep 17 00:00:00 2001 +From: Pantelis Antoniou +Date: Wed, 4 Dec 2013 19:32:00 +0200 +Subject: [PATCH] FROMLIST: OF: DT-Overlay configfs interface (v7) + +Add a runtime interface to using configfs for generic device tree overlay +usage. With it its possible to use device tree overlays without having +to use a per-platform overlay manager. + +Please see Documentation/devicetree/configfs-overlays.txt for more info. + +Changes since v6: +- Default groups properties API changed. + +Changes since v5: +- New style configfs. + +Changes since v4: +- Loading fix for multiple overlays as found out by + Geert Uytterhoeven + +Changes since v3: +- Fixed compilation on SPARC & Xtensa + +Changes since v2: +- Removed ifdef CONFIG_OF_OVERLAY (since for now it's required) +- Created a documentation entry +- Slight rewording in Kconfig + +Changes since v1: +- of_resolve() -> of_resolve_phandles(). + +Signed-off-by: Pantelis Antoniou +[geert: Use %zu to format size_t] +[geert: Let OF_CONFIGFS select OF_FLATTREE to fix sparc all*config] +Signed-off-by: Geert Uytterhoeven +--- + Documentation/devicetree/configfs-overlays.txt | 31 +++ + drivers/of/Kconfig | 8 + + drivers/of/Makefile | 1 + + drivers/of/configfs.c | 314 +++++++++++++++++++++++++ + 4 files changed, 354 insertions(+) + create mode 100644 Documentation/devicetree/configfs-overlays.txt + create mode 100644 drivers/of/configfs.c + +diff --git a/Documentation/devicetree/configfs-overlays.txt b/Documentation/devicetree/configfs-overlays.txt +new file mode 100644 +index 000000000000..5fa43e064307 +--- /dev/null ++++ b/Documentation/devicetree/configfs-overlays.txt +@@ -0,0 +1,31 @@ ++Howto use the configfs overlay interface. ++ ++A device-tree configfs entry is created in /config/device-tree/overlays ++and and it is manipulated using standard file system I/O. ++Note that this is a debug level interface, for use by developers and ++not necessarily something accessed by normal users due to the ++security implications of having direct access to the kernel's device tree. ++ ++* To create an overlay you mkdir the directory: ++ ++ # mkdir /config/device-tree/overlays/foo ++ ++* Either you echo the overlay firmware file to the path property file. ++ ++ # echo foo.dtbo >/config/device-tree/overlays/foo/path ++ ++* Or you cat the contents of the overlay to the dtbo file ++ ++ # cat foo.dtbo >/config/device-tree/overlays/foo/dtbo ++ ++The overlay file will be applied, and devices will be created/destroyed ++as required. ++ ++To remove it simply rmdir the directory. ++ ++ # rmdir /config/device-tree/overlays/foo ++ ++The rationalle of the dual interface (firmware & direct copy) is that each is ++better suited to different use patterns. The firmware interface is what's ++intended to be used by hardware managers in the kernel, while the copy interface ++make sense for developers (since it avoids problems with namespaces). +diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig +index e2a48415d969..c112c9f2ca6b 100644 +--- a/drivers/of/Kconfig ++++ b/drivers/of/Kconfig +@@ -112,4 +112,12 @@ config OF_OVERLAY + While this option is selected automatically when needed, you can + enable it manually to improve device tree unit test coverage. + ++config OF_CONFIGFS ++ bool "Device Tree Overlay ConfigFS interface" ++ select CONFIGFS_FS ++ select OF_FLATTREE ++ depends on OF_OVERLAY ++ help ++ Enable a simple user-space driven DT overlay interface. ++ + endif # OF +diff --git a/drivers/of/Makefile b/drivers/of/Makefile +index 478d4edcd763..732fa66b5263 100644 +--- a/drivers/of/Makefile ++++ b/drivers/of/Makefile +@@ -1,4 +1,5 @@ + obj-y = base.o device.o platform.o property.o ++obj-$(CONFIG_OF_CONFIGFS) += configfs.o + obj-$(CONFIG_OF_DYNAMIC) += dynamic.o + obj-$(CONFIG_OF_FLATTREE) += fdt.o + obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o +diff --git a/drivers/of/configfs.c b/drivers/of/configfs.c +new file mode 100644 +index 000000000000..908ce4960c30 +--- /dev/null ++++ b/drivers/of/configfs.c +@@ -0,0 +1,314 @@ ++/* ++ * Configfs entries for device-tree ++ * ++ * Copyright (C) 2013 - Pantelis Antoniou ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "of_private.h" ++ ++struct cfs_overlay_item { ++ struct config_item item; ++ ++ char path[PATH_MAX]; ++ ++ const struct firmware *fw; ++ struct device_node *overlay; ++ int ov_id; ++ ++ void *dtbo; ++ int dtbo_size; ++}; ++ ++static int create_overlay(struct cfs_overlay_item *overlay, void *blob) ++{ ++ int err; ++ ++ /* unflatten the tree */ ++ of_fdt_unflatten_tree(blob, &overlay->overlay); ++ if (overlay->overlay == NULL) { ++ pr_err("%s: failed to unflatten tree\n", __func__); ++ err = -EINVAL; ++ goto out_err; ++ } ++ pr_debug("%s: unflattened OK\n", __func__); ++ ++ /* mark it as detached */ ++ of_node_set_flag(overlay->overlay, OF_DETACHED); ++ ++ /* perform resolution */ ++ err = of_resolve_phandles(overlay->overlay); ++ if (err != 0) { ++ pr_err("%s: Failed to resolve tree\n", __func__); ++ goto out_err; ++ } ++ pr_debug("%s: resolved OK\n", __func__); ++ ++ err = of_overlay_create(overlay->overlay); ++ if (err < 0) { ++ pr_err("%s: Failed to create overlay (err=%d)\n", ++ __func__, err); ++ goto out_err; ++ } ++ overlay->ov_id = err; ++ ++out_err: ++ return err; ++} ++ ++static inline struct cfs_overlay_item *to_cfs_overlay_item( ++ struct config_item *item) ++{ ++ return item ? container_of(item, struct cfs_overlay_item, item) : NULL; ++} ++ ++static ssize_t cfs_overlay_item_path_show(struct config_item *item, ++ char *page) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ return sprintf(page, "%s\n", overlay->path); ++} ++ ++static ssize_t cfs_overlay_item_path_store(struct config_item *item, ++ const char *page, size_t count) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ const char *p = page; ++ char *s; ++ int err; ++ ++ /* if it's set do not allow changes */ ++ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0) ++ return -EPERM; ++ ++ /* copy to path buffer (and make sure it's always zero terminated */ ++ count = snprintf(overlay->path, sizeof(overlay->path) - 1, "%s", p); ++ overlay->path[sizeof(overlay->path) - 1] = '\0'; ++ ++ /* strip trailing newlines */ ++ s = overlay->path + strlen(overlay->path); ++ while (s > overlay->path && *--s == '\n') ++ *s = '\0'; ++ ++ pr_debug("%s: path is '%s'\n", __func__, overlay->path); ++ ++ err = request_firmware(&overlay->fw, overlay->path, NULL); ++ if (err != 0) ++ goto out_err; ++ ++ err = create_overlay(overlay, (void *)overlay->fw->data); ++ if (err < 0) ++ goto out_err; ++ ++ return count; ++ ++out_err: ++ ++ release_firmware(overlay->fw); ++ overlay->fw = NULL; ++ ++ overlay->path[0] = '\0'; ++ return err; ++} ++ ++static ssize_t cfs_overlay_item_status_show(struct config_item *item, ++ char *page) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ ++ return sprintf(page, "%s\n", ++ overlay->ov_id >= 0 ? "applied" : "unapplied"); ++} ++ ++CONFIGFS_ATTR(cfs_overlay_item_, path); ++CONFIGFS_ATTR_RO(cfs_overlay_item_, status); ++ ++static struct configfs_attribute *cfs_overlay_attrs[] = { ++ &cfs_overlay_item_attr_path, ++ &cfs_overlay_item_attr_status, ++ NULL, ++}; ++ ++ssize_t cfs_overlay_item_dtbo_read(struct config_item *item, ++ void *buf, size_t max_count) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ ++ pr_debug("%s: buf=%p max_count=%zu\n", __func__, ++ buf, max_count); ++ ++ if (overlay->dtbo == NULL) ++ return 0; ++ ++ /* copy if buffer provided */ ++ if (buf != NULL) { ++ /* the buffer must be large enough */ ++ if (overlay->dtbo_size > max_count) ++ return -ENOSPC; ++ ++ memcpy(buf, overlay->dtbo, overlay->dtbo_size); ++ } ++ ++ return overlay->dtbo_size; ++} ++ ++ssize_t cfs_overlay_item_dtbo_write(struct config_item *item, ++ const void *buf, size_t count) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ int err; ++ ++ /* if it's set do not allow changes */ ++ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0) ++ return -EPERM; ++ ++ /* copy the contents */ ++ overlay->dtbo = kmemdup(buf, count, GFP_KERNEL); ++ if (overlay->dtbo == NULL) ++ return -ENOMEM; ++ ++ overlay->dtbo_size = count; ++ ++ err = create_overlay(overlay, overlay->dtbo); ++ if (err < 0) ++ goto out_err; ++ ++ return count; ++ ++out_err: ++ kfree(overlay->dtbo); ++ overlay->dtbo = NULL; ++ overlay->dtbo_size = 0; ++ ++ return err; ++} ++ ++CONFIGFS_BIN_ATTR(cfs_overlay_item_, dtbo, NULL, SZ_1M); ++ ++static struct configfs_bin_attribute *cfs_overlay_bin_attrs[] = { ++ &cfs_overlay_item_attr_dtbo, ++ NULL, ++}; ++ ++static void cfs_overlay_release(struct config_item *item) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ ++ if (overlay->ov_id >= 0) ++ of_overlay_destroy(overlay->ov_id); ++ if (overlay->fw) ++ release_firmware(overlay->fw); ++ /* kfree with NULL is safe */ ++ kfree(overlay->dtbo); ++ kfree(overlay); ++} ++ ++static struct configfs_item_operations cfs_overlay_item_ops = { ++ .release = cfs_overlay_release, ++}; ++ ++static struct config_item_type cfs_overlay_type = { ++ .ct_item_ops = &cfs_overlay_item_ops, ++ .ct_attrs = cfs_overlay_attrs, ++ .ct_bin_attrs = cfs_overlay_bin_attrs, ++ .ct_owner = THIS_MODULE, ++}; ++ ++static struct config_item *cfs_overlay_group_make_item( ++ struct config_group *group, const char *name) ++{ ++ struct cfs_overlay_item *overlay; ++ ++ overlay = kzalloc(sizeof(*overlay), GFP_KERNEL); ++ if (!overlay) ++ return ERR_PTR(-ENOMEM); ++ overlay->ov_id = -1; ++ ++ config_item_init_type_name(&overlay->item, name, &cfs_overlay_type); ++ return &overlay->item; ++} ++ ++static void cfs_overlay_group_drop_item(struct config_group *group, ++ struct config_item *item) ++{ ++ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); ++ ++ config_item_put(&overlay->item); ++} ++ ++static struct configfs_group_operations overlays_ops = { ++ .make_item = cfs_overlay_group_make_item, ++ .drop_item = cfs_overlay_group_drop_item, ++}; ++ ++static struct config_item_type overlays_type = { ++ .ct_group_ops = &overlays_ops, ++ .ct_owner = THIS_MODULE, ++}; ++ ++static struct configfs_group_operations of_cfs_ops = { ++ /* empty - we don't allow anything to be created */ ++}; ++ ++static struct config_item_type of_cfs_type = { ++ .ct_group_ops = &of_cfs_ops, ++ .ct_owner = THIS_MODULE, ++}; ++ ++struct config_group of_cfs_overlay_group; ++ ++struct config_group *of_cfs_def_groups[] = { ++ &of_cfs_overlay_group, ++ NULL ++}; ++ ++static struct configfs_subsystem of_cfs_subsys = { ++ .su_group = { ++ .cg_item = { ++ .ci_namebuf = "device-tree", ++ .ci_type = &of_cfs_type, ++ }, ++ .default_groups = of_cfs_def_groups, ++ }, ++ .su_mutex = __MUTEX_INITIALIZER(of_cfs_subsys.su_mutex), ++}; ++ ++static int __init of_cfs_init(void) ++{ ++ int ret; ++ ++ pr_info("%s\n", __func__); ++ ++ config_group_init(&of_cfs_subsys.su_group); ++ config_group_init_type_name(&of_cfs_overlay_group, "overlays", ++ &overlays_type); ++ ++ ret = configfs_register_subsystem(&of_cfs_subsys); ++ if (ret != 0) { ++ pr_err("%s: failed to register subsys\n", __func__); ++ goto out; ++ } ++ pr_info("%s: OK\n", __func__); ++out: ++ return ret; ++} ++late_initcall(of_cfs_init); diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch new file mode 100644 index 0000000000..ce5cc4992a --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch @@ -0,0 +1,949 @@ +From 3c894b625c24537d22213836dbc44e1973b2b1f4 Mon Sep 17 00:00:00 2001 +From: Julia Lawall +Date: Sat, 14 Nov 2015 18:05:20 +0100 +Subject: [PATCH] UPSTREAM: mmc: pwrseq: constify mmc_pwrseq_ops structures + +The mmc_pwrseq_ops structures are never modified, so declare them as const. + +Done with the help of Coccinelle. + +Signed-off-by: Julia Lawall +Signed-off-by: Ulf Hansson +(cherry picked from commit ffedbd2210f2f4cba490a9205adc11fd1b89a852) +--- + drivers/mmc/core/pwrseq.h | 2 +- + drivers/mmc/core/pwrseq_emmc.c | 2 +- + drivers/mmc/core/pwrseq_simple.c | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/core/pwrseq.h b/drivers/mmc/core/pwrseq.h +index 096da48c6a7e..133de0426687 100644 +--- a/drivers/mmc/core/pwrseq.h ++++ b/drivers/mmc/core/pwrseq.h +@@ -16,7 +16,7 @@ struct mmc_pwrseq_ops { + }; + + struct mmc_pwrseq { +- struct mmc_pwrseq_ops *ops; ++ const struct mmc_pwrseq_ops *ops; + }; + + #ifdef CONFIG_OF +diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c +index ad4f94ec7e8d..4a82bc77fe49 100644 +--- a/drivers/mmc/core/pwrseq_emmc.c ++++ b/drivers/mmc/core/pwrseq_emmc.c +@@ -51,7 +51,7 @@ static void mmc_pwrseq_emmc_free(struct mmc_host *host) + kfree(pwrseq); + } + +-static struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = { ++static const struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = { + .post_power_on = mmc_pwrseq_emmc_reset, + .free = mmc_pwrseq_emmc_free, + }; +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index d10538bb5e07..2b16263458af 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -87,7 +87,7 @@ static void mmc_pwrseq_simple_free(struct mmc_host *host) + kfree(pwrseq); + } + +-static struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = { ++static const struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = { + .pre_power_on = mmc_pwrseq_simple_pre_power_on, + .post_power_on = mmc_pwrseq_simple_post_power_on, + .power_off = mmc_pwrseq_simple_power_off, + +From 11396ee87b7a090c5807c2fc2b8a640d109c30ce Mon Sep 17 00:00:00 2001 +From: Martin Fuzzey +Date: Wed, 20 Jan 2016 16:08:03 +0100 +Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Make reset-gpios optional to + match doc + +The DT binding doc says reset-gpios is an optional property but the code +currently bails out if it is omitted. + +This is a regression since it breaks previously working device trees. +Fix it by restoring the original documented behaviour. + +Fixes: ce037275861e ("mmc: pwrseq_simple: use GPIO descriptors array API") +Tested-by: Tony Lindgren +Signed-off-by: Martin Fuzzey +Signed-off-by: Ulf Hansson +(cherry picked from commit 64a67d4762ce3ce4c9466eadd152d825fbf84967) +--- + drivers/mmc/core/pwrseq_simple.c | 22 ++++++++++++++-------- + 1 file changed, 14 insertions(+), 8 deletions(-) + +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index 2b16263458af..aba786daebca 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -29,15 +29,18 @@ struct mmc_pwrseq_simple { + static void mmc_pwrseq_simple_set_gpios_value(struct mmc_pwrseq_simple *pwrseq, + int value) + { +- int i; + struct gpio_descs *reset_gpios = pwrseq->reset_gpios; +- int values[reset_gpios->ndescs]; + +- for (i = 0; i < reset_gpios->ndescs; i++) +- values[i] = value; ++ if (!IS_ERR(reset_gpios)) { ++ int i; ++ int values[reset_gpios->ndescs]; + +- gpiod_set_array_value_cansleep(reset_gpios->ndescs, reset_gpios->desc, +- values); ++ for (i = 0; i < reset_gpios->ndescs; i++) ++ values[i] = value; ++ ++ gpiod_set_array_value_cansleep( ++ reset_gpios->ndescs, reset_gpios->desc, values); ++ } + } + + static void mmc_pwrseq_simple_pre_power_on(struct mmc_host *host) +@@ -79,7 +82,8 @@ static void mmc_pwrseq_simple_free(struct mmc_host *host) + struct mmc_pwrseq_simple *pwrseq = container_of(host->pwrseq, + struct mmc_pwrseq_simple, pwrseq); + +- gpiod_put_array(pwrseq->reset_gpios); ++ if (!IS_ERR(pwrseq->reset_gpios)) ++ gpiod_put_array(pwrseq->reset_gpios); + + if (!IS_ERR(pwrseq->ext_clk)) + clk_put(pwrseq->ext_clk); +@@ -112,7 +116,9 @@ struct mmc_pwrseq *mmc_pwrseq_simple_alloc(struct mmc_host *host, + } + + pwrseq->reset_gpios = gpiod_get_array(dev, "reset", GPIOD_OUT_HIGH); +- if (IS_ERR(pwrseq->reset_gpios)) { ++ if (IS_ERR(pwrseq->reset_gpios) && ++ PTR_ERR(pwrseq->reset_gpios) != -ENOENT && ++ PTR_ERR(pwrseq->reset_gpios) != -ENOSYS) { + ret = PTR_ERR(pwrseq->reset_gpios); + goto clk_put; + } + +From eecad6e4c48e9e82ec2f8415dec690f67c7ba12b Mon Sep 17 00:00:00 2001 +From: Peter Chen +Date: Wed, 6 Jan 2016 11:34:10 +0800 +Subject: [PATCH] UPSTREAM: mmc: core: pwrseq_simple: remove unused header file + +Signed-off-by: Peter Chen +Signed-off-by: Ulf Hansson +(cherry picked from commit 62c03ca3ffa1ddf55a66411be02f7e4678771fce) +--- + drivers/mmc/core/pwrseq_simple.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index aba786daebca..bc173e18b71c 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -12,7 +12,6 @@ + #include + #include + #include +-#include + #include + + #include + +From ea74f89b7e6bb89a2824df5bf3ae94786f6b30b3 Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Thu, 14 Apr 2016 14:02:14 +0100 +Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: add to_pwrseq_simple() macro + +This patch adds to_pwrseq_simple() macro to make the code more readable. + +Signed-off-by: Srinivas Kandagatla +Signed-off-by: Ulf Hansson +(cherry picked from commit 5b96fea730ab79bdf6f8071cadf8208296bf5e8d) +--- + drivers/mmc/core/pwrseq_simple.c | 14 ++++++-------- + 1 file changed, 6 insertions(+), 8 deletions(-) + +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index bc173e18b71c..f94271bb1f6b 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -25,6 +25,8 @@ struct mmc_pwrseq_simple { + struct gpio_descs *reset_gpios; + }; + ++#define to_pwrseq_simple(p) container_of(p, struct mmc_pwrseq_simple, pwrseq) ++ + static void mmc_pwrseq_simple_set_gpios_value(struct mmc_pwrseq_simple *pwrseq, + int value) + { +@@ -44,8 +46,7 @@ static void mmc_pwrseq_simple_set_gpios_value(struct mmc_pwrseq_simple *pwrseq, + + static void mmc_pwrseq_simple_pre_power_on(struct mmc_host *host) + { +- struct mmc_pwrseq_simple *pwrseq = container_of(host->pwrseq, +- struct mmc_pwrseq_simple, pwrseq); ++ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); + + if (!IS_ERR(pwrseq->ext_clk) && !pwrseq->clk_enabled) { + clk_prepare_enable(pwrseq->ext_clk); +@@ -57,16 +58,14 @@ static void mmc_pwrseq_simple_pre_power_on(struct mmc_host *host) + + static void mmc_pwrseq_simple_post_power_on(struct mmc_host *host) + { +- struct mmc_pwrseq_simple *pwrseq = container_of(host->pwrseq, +- struct mmc_pwrseq_simple, pwrseq); ++ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); + + mmc_pwrseq_simple_set_gpios_value(pwrseq, 0); + } + + static void mmc_pwrseq_simple_power_off(struct mmc_host *host) + { +- struct mmc_pwrseq_simple *pwrseq = container_of(host->pwrseq, +- struct mmc_pwrseq_simple, pwrseq); ++ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); + + mmc_pwrseq_simple_set_gpios_value(pwrseq, 1); + +@@ -78,8 +77,7 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host) + + static void mmc_pwrseq_simple_free(struct mmc_host *host) + { +- struct mmc_pwrseq_simple *pwrseq = container_of(host->pwrseq, +- struct mmc_pwrseq_simple, pwrseq); ++ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); + + if (!IS_ERR(pwrseq->reset_gpios)) + gpiod_put_array(pwrseq->reset_gpios); + +From 11bf8cedf08ee10e4053d8787268c69a0bd7419b Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Thu, 14 Apr 2016 14:02:15 +0100 +Subject: [PATCH] UPSTREAM: mmc: pwrseq_emmc: add to_pwrseq_emmc() macro + +This patch adds to_pwrseq_emmc() macro to make the code more readable. + +Signed-off-by: Srinivas Kandagatla +Signed-off-by: Ulf Hansson +(cherry picked from commit f01b72d0fd53b61cafd25b16d15e18b1ef8ae065) +--- + drivers/mmc/core/pwrseq_emmc.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c +index 4a82bc77fe49..c2d732aa464c 100644 +--- a/drivers/mmc/core/pwrseq_emmc.c ++++ b/drivers/mmc/core/pwrseq_emmc.c +@@ -25,6 +25,8 @@ struct mmc_pwrseq_emmc { + struct gpio_desc *reset_gpio; + }; + ++#define to_pwrseq_emmc(p) container_of(p, struct mmc_pwrseq_emmc, pwrseq) ++ + static void __mmc_pwrseq_emmc_reset(struct mmc_pwrseq_emmc *pwrseq) + { + gpiod_set_value(pwrseq->reset_gpio, 1); +@@ -35,16 +37,14 @@ static void __mmc_pwrseq_emmc_reset(struct mmc_pwrseq_emmc *pwrseq) + + static void mmc_pwrseq_emmc_reset(struct mmc_host *host) + { +- struct mmc_pwrseq_emmc *pwrseq = container_of(host->pwrseq, +- struct mmc_pwrseq_emmc, pwrseq); ++ struct mmc_pwrseq_emmc *pwrseq = to_pwrseq_emmc(host->pwrseq); + + __mmc_pwrseq_emmc_reset(pwrseq); + } + + static void mmc_pwrseq_emmc_free(struct mmc_host *host) + { +- struct mmc_pwrseq_emmc *pwrseq = container_of(host->pwrseq, +- struct mmc_pwrseq_emmc, pwrseq); ++ struct mmc_pwrseq_emmc *pwrseq = to_pwrseq_emmc(host->pwrseq); + + unregister_restart_handler(&pwrseq->reset_nb); + gpiod_put(pwrseq->reset_gpio); + +From 9a32c48a17c3a0de3bd96cc6e9289d9fb8710b91 Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Thu, 14 Apr 2016 14:02:16 +0100 +Subject: [PATCH] UPSTREAM: mmc: pwrseq: convert to proper platform device + +simple-pwrseq and emmc-pwrseq drivers rely on platform_device +structure from of_find_device_by_node(), this works mostly. But, as there +is no driver associated with this devices, cases like default/init pinctrl +setup would never be performed by pwrseq. This becomes problem when the +gpios used in pwrseq require pinctrl setup. + +Currently most of the common pinctrl setup is done in +drivers/base/pinctrl.c by pinctrl_bind_pins(). + +There are two ways to solve this issue on either convert pwrseq drivers +to a proper platform drivers or copy the exact code from +pcintrl_bind_pins(). I prefer converting pwrseq to proper drivers so that +other cases like setting up clks/parents from dt would also be possible. + +Signed-off-by: Srinivas Kandagatla +Signed-off-by: Ulf Hansson +(cherry picked from commit d97a1e5d7cd2b5b0edc02a40fe6897b710c9e10f) +--- + drivers/mmc/core/Kconfig | 22 ++++++++ + drivers/mmc/core/Makefile | 4 +- + drivers/mmc/core/pwrseq.c | 108 ++++++++++++++++++--------------------- + drivers/mmc/core/pwrseq.h | 19 ++++--- + drivers/mmc/core/pwrseq_emmc.c | 75 +++++++++++++++++---------- + drivers/mmc/core/pwrseq_simple.c | 79 +++++++++++++++------------- + 6 files changed, 178 insertions(+), 129 deletions(-) + +diff --git a/drivers/mmc/core/Kconfig b/drivers/mmc/core/Kconfig +index 87cc07dedd9f..00dfaea06003 100644 +--- a/drivers/mmc/core/Kconfig ++++ b/drivers/mmc/core/Kconfig +@@ -16,3 +16,25 @@ config MMC_PARANOID_SD_INIT + about re-trying SD init requests. This can be a useful + work-around for buggy controllers and hardware. Enable + if you are experiencing issues with SD detection. ++ ++config PWRSEQ_EMMC ++ tristate "HW reset support for eMMC" ++ default y ++ depends on OF ++ help ++ This selects Hardware reset support aka pwrseq-emmc for eMMC ++ devices. By default this option is set to y. ++ ++ This driver can also be built as a module. If so, the module ++ will be called pwrseq_emmc. ++ ++config PWRSEQ_SIMPLE ++ tristate "Simple HW reset support for MMC" ++ default y ++ depends on OF ++ help ++ This selects simple hardware reset support aka pwrseq-simple for MMC ++ devices. By default this option is set to y. ++ ++ This driver can also be built as a module. If so, the module ++ will be called pwrseq_simple. +diff --git a/drivers/mmc/core/Makefile b/drivers/mmc/core/Makefile +index 2c25138f28b7..f007151dfdc6 100644 +--- a/drivers/mmc/core/Makefile ++++ b/drivers/mmc/core/Makefile +@@ -8,5 +8,7 @@ mmc_core-y := core.o bus.o host.o \ + sdio.o sdio_ops.o sdio_bus.o \ + sdio_cis.o sdio_io.o sdio_irq.o \ + quirks.o slot-gpio.o +-mmc_core-$(CONFIG_OF) += pwrseq.o pwrseq_simple.o pwrseq_emmc.o ++mmc_core-$(CONFIG_OF) += pwrseq.o ++obj-$(CONFIG_PWRSEQ_SIMPLE) += pwrseq_simple.o ++obj-$(CONFIG_PWRSEQ_EMMC) += pwrseq_emmc.o + mmc_core-$(CONFIG_DEBUG_FS) += debugfs.o +diff --git a/drivers/mmc/core/pwrseq.c b/drivers/mmc/core/pwrseq.c +index 4c1d1757dbf9..9386c4771814 100644 +--- a/drivers/mmc/core/pwrseq.c ++++ b/drivers/mmc/core/pwrseq.c +@@ -8,88 +8,55 @@ + * MMC power sequence management + */ + #include +-#include + #include ++#include + #include +-#include + + #include + + #include "pwrseq.h" + +-struct mmc_pwrseq_match { +- const char *compatible; +- struct mmc_pwrseq *(*alloc)(struct mmc_host *host, struct device *dev); +-}; +- +-static struct mmc_pwrseq_match pwrseq_match[] = { +- { +- .compatible = "mmc-pwrseq-simple", +- .alloc = mmc_pwrseq_simple_alloc, +- }, { +- .compatible = "mmc-pwrseq-emmc", +- .alloc = mmc_pwrseq_emmc_alloc, +- }, +-}; +- +-static struct mmc_pwrseq_match *mmc_pwrseq_find(struct device_node *np) +-{ +- struct mmc_pwrseq_match *match = ERR_PTR(-ENODEV); +- int i; +- +- for (i = 0; i < ARRAY_SIZE(pwrseq_match); i++) { +- if (of_device_is_compatible(np, pwrseq_match[i].compatible)) { +- match = &pwrseq_match[i]; +- break; +- } +- } +- +- return match; +-} ++static DEFINE_MUTEX(pwrseq_list_mutex); ++static LIST_HEAD(pwrseq_list); + + int mmc_pwrseq_alloc(struct mmc_host *host) + { +- struct platform_device *pdev; + struct device_node *np; +- struct mmc_pwrseq_match *match; +- struct mmc_pwrseq *pwrseq; +- int ret = 0; ++ struct mmc_pwrseq *p; + + np = of_parse_phandle(host->parent->of_node, "mmc-pwrseq", 0); + if (!np) + return 0; + +- pdev = of_find_device_by_node(np); +- if (!pdev) { +- ret = -ENODEV; +- goto err; +- } ++ mutex_lock(&pwrseq_list_mutex); ++ list_for_each_entry(p, &pwrseq_list, pwrseq_node) { ++ if (p->dev->of_node == np) { ++ if (!try_module_get(p->owner)) ++ dev_err(host->parent, ++ "increasing module refcount failed\n"); ++ else ++ host->pwrseq = p; + +- match = mmc_pwrseq_find(np); +- if (IS_ERR(match)) { +- ret = PTR_ERR(match); +- goto err; ++ break; ++ } + } + +- pwrseq = match->alloc(host, &pdev->dev); +- if (IS_ERR(pwrseq)) { +- ret = PTR_ERR(pwrseq); +- goto err; +- } ++ of_node_put(np); ++ mutex_unlock(&pwrseq_list_mutex); ++ ++ if (!host->pwrseq) ++ return -EPROBE_DEFER; + +- host->pwrseq = pwrseq; + dev_info(host->parent, "allocated mmc-pwrseq\n"); + +-err: +- of_node_put(np); +- return ret; ++ return 0; + } + + void mmc_pwrseq_pre_power_on(struct mmc_host *host) + { + struct mmc_pwrseq *pwrseq = host->pwrseq; + +- if (pwrseq && pwrseq->ops && pwrseq->ops->pre_power_on) ++ if (pwrseq && pwrseq->ops->pre_power_on) + pwrseq->ops->pre_power_on(host); + } + +@@ -97,7 +64,7 @@ void mmc_pwrseq_post_power_on(struct mmc_host *host) + { + struct mmc_pwrseq *pwrseq = host->pwrseq; + +- if (pwrseq && pwrseq->ops && pwrseq->ops->post_power_on) ++ if (pwrseq && pwrseq->ops->post_power_on) + pwrseq->ops->post_power_on(host); + } + +@@ -105,7 +72,7 @@ void mmc_pwrseq_power_off(struct mmc_host *host) + { + struct mmc_pwrseq *pwrseq = host->pwrseq; + +- if (pwrseq && pwrseq->ops && pwrseq->ops->power_off) ++ if (pwrseq && pwrseq->ops->power_off) + pwrseq->ops->power_off(host); + } + +@@ -113,8 +80,31 @@ void mmc_pwrseq_free(struct mmc_host *host) + { + struct mmc_pwrseq *pwrseq = host->pwrseq; + +- if (pwrseq && pwrseq->ops && pwrseq->ops->free) +- pwrseq->ops->free(host); ++ if (pwrseq) { ++ module_put(pwrseq->owner); ++ host->pwrseq = NULL; ++ } ++} ++ ++int mmc_pwrseq_register(struct mmc_pwrseq *pwrseq) ++{ ++ if (!pwrseq || !pwrseq->ops || !pwrseq->dev) ++ return -EINVAL; + +- host->pwrseq = NULL; ++ mutex_lock(&pwrseq_list_mutex); ++ list_add(&pwrseq->pwrseq_node, &pwrseq_list); ++ mutex_unlock(&pwrseq_list_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(mmc_pwrseq_register); ++ ++void mmc_pwrseq_unregister(struct mmc_pwrseq *pwrseq) ++{ ++ if (pwrseq) { ++ mutex_lock(&pwrseq_list_mutex); ++ list_del(&pwrseq->pwrseq_node); ++ mutex_unlock(&pwrseq_list_mutex); ++ } + } ++EXPORT_SYMBOL_GPL(mmc_pwrseq_unregister); +diff --git a/drivers/mmc/core/pwrseq.h b/drivers/mmc/core/pwrseq.h +index 133de0426687..d69e751f148b 100644 +--- a/drivers/mmc/core/pwrseq.h ++++ b/drivers/mmc/core/pwrseq.h +@@ -8,32 +8,39 @@ + #ifndef _MMC_CORE_PWRSEQ_H + #define _MMC_CORE_PWRSEQ_H + ++#include ++ + struct mmc_pwrseq_ops { + void (*pre_power_on)(struct mmc_host *host); + void (*post_power_on)(struct mmc_host *host); + void (*power_off)(struct mmc_host *host); +- void (*free)(struct mmc_host *host); + }; + + struct mmc_pwrseq { + const struct mmc_pwrseq_ops *ops; ++ struct device *dev; ++ struct list_head pwrseq_node; ++ struct module *owner; + }; + + #ifdef CONFIG_OF + ++int mmc_pwrseq_register(struct mmc_pwrseq *pwrseq); ++void mmc_pwrseq_unregister(struct mmc_pwrseq *pwrseq); ++ + int mmc_pwrseq_alloc(struct mmc_host *host); + void mmc_pwrseq_pre_power_on(struct mmc_host *host); + void mmc_pwrseq_post_power_on(struct mmc_host *host); + void mmc_pwrseq_power_off(struct mmc_host *host); + void mmc_pwrseq_free(struct mmc_host *host); + +-struct mmc_pwrseq *mmc_pwrseq_simple_alloc(struct mmc_host *host, +- struct device *dev); +-struct mmc_pwrseq *mmc_pwrseq_emmc_alloc(struct mmc_host *host, +- struct device *dev); +- + #else + ++static inline int mmc_pwrseq_register(struct mmc_pwrseq *pwrseq) ++{ ++ return -ENOSYS; ++} ++static inline void mmc_pwrseq_unregister(struct mmc_pwrseq *pwrseq) {} + static inline int mmc_pwrseq_alloc(struct mmc_host *host) { return 0; } + static inline void mmc_pwrseq_pre_power_on(struct mmc_host *host) {} + static inline void mmc_pwrseq_post_power_on(struct mmc_host *host) {} +diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c +index c2d732aa464c..adc9c0c614fb 100644 +--- a/drivers/mmc/core/pwrseq_emmc.c ++++ b/drivers/mmc/core/pwrseq_emmc.c +@@ -9,6 +9,9 @@ + */ + #include + #include ++#include ++#include ++#include + #include + #include + #include +@@ -42,20 +45,6 @@ static void mmc_pwrseq_emmc_reset(struct mmc_host *host) + __mmc_pwrseq_emmc_reset(pwrseq); + } + +-static void mmc_pwrseq_emmc_free(struct mmc_host *host) +-{ +- struct mmc_pwrseq_emmc *pwrseq = to_pwrseq_emmc(host->pwrseq); +- +- unregister_restart_handler(&pwrseq->reset_nb); +- gpiod_put(pwrseq->reset_gpio); +- kfree(pwrseq); +-} +- +-static const struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = { +- .post_power_on = mmc_pwrseq_emmc_reset, +- .free = mmc_pwrseq_emmc_free, +-}; +- + static int mmc_pwrseq_emmc_reset_nb(struct notifier_block *this, + unsigned long mode, void *cmd) + { +@@ -66,21 +55,22 @@ static int mmc_pwrseq_emmc_reset_nb(struct notifier_block *this, + return NOTIFY_DONE; + } + +-struct mmc_pwrseq *mmc_pwrseq_emmc_alloc(struct mmc_host *host, +- struct device *dev) ++static const struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = { ++ .post_power_on = mmc_pwrseq_emmc_reset, ++}; ++ ++static int mmc_pwrseq_emmc_probe(struct platform_device *pdev) + { + struct mmc_pwrseq_emmc *pwrseq; +- int ret = 0; ++ struct device *dev = &pdev->dev; + +- pwrseq = kzalloc(sizeof(struct mmc_pwrseq_emmc), GFP_KERNEL); ++ pwrseq = devm_kzalloc(dev, sizeof(*pwrseq), GFP_KERNEL); + if (!pwrseq) +- return ERR_PTR(-ENOMEM); ++ return -ENOMEM; + +- pwrseq->reset_gpio = gpiod_get(dev, "reset", GPIOD_OUT_LOW); +- if (IS_ERR(pwrseq->reset_gpio)) { +- ret = PTR_ERR(pwrseq->reset_gpio); +- goto free; +- } ++ pwrseq->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); ++ if (IS_ERR(pwrseq->reset_gpio)) ++ return PTR_ERR(pwrseq->reset_gpio); + + /* + * register reset handler to ensure emmc reset also from +@@ -92,9 +82,38 @@ struct mmc_pwrseq *mmc_pwrseq_emmc_alloc(struct mmc_host *host, + register_restart_handler(&pwrseq->reset_nb); + + pwrseq->pwrseq.ops = &mmc_pwrseq_emmc_ops; ++ pwrseq->pwrseq.dev = dev; ++ pwrseq->pwrseq.owner = THIS_MODULE; ++ platform_set_drvdata(pdev, pwrseq); ++ ++ return mmc_pwrseq_register(&pwrseq->pwrseq); ++} ++ ++static int mmc_pwrseq_emmc_remove(struct platform_device *pdev) ++{ ++ struct mmc_pwrseq_emmc *pwrseq = platform_get_drvdata(pdev); ++ ++ unregister_restart_handler(&pwrseq->reset_nb); ++ mmc_pwrseq_unregister(&pwrseq->pwrseq); + +- return &pwrseq->pwrseq; +-free: +- kfree(pwrseq); +- return ERR_PTR(ret); ++ return 0; + } ++ ++static const struct of_device_id mmc_pwrseq_emmc_of_match[] = { ++ { .compatible = "mmc-pwrseq-emmc",}, ++ {/* sentinel */}, ++}; ++ ++MODULE_DEVICE_TABLE(of, mmc_pwrseq_emmc_of_match); ++ ++static struct platform_driver mmc_pwrseq_emmc_driver = { ++ .probe = mmc_pwrseq_emmc_probe, ++ .remove = mmc_pwrseq_emmc_remove, ++ .driver = { ++ .name = "pwrseq_emmc", ++ .of_match_table = mmc_pwrseq_emmc_of_match, ++ }, ++}; ++ ++module_platform_driver(mmc_pwrseq_emmc_driver); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index f94271bb1f6b..450d907c6e6c 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -8,7 +8,10 @@ + * Simple MMC power sequence management + */ + #include ++#include + #include ++#include ++#include + #include + #include + #include +@@ -75,58 +78,64 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host) + } + } + +-static void mmc_pwrseq_simple_free(struct mmc_host *host) +-{ +- struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); +- +- if (!IS_ERR(pwrseq->reset_gpios)) +- gpiod_put_array(pwrseq->reset_gpios); +- +- if (!IS_ERR(pwrseq->ext_clk)) +- clk_put(pwrseq->ext_clk); +- +- kfree(pwrseq); +-} +- + static const struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = { + .pre_power_on = mmc_pwrseq_simple_pre_power_on, + .post_power_on = mmc_pwrseq_simple_post_power_on, + .power_off = mmc_pwrseq_simple_power_off, +- .free = mmc_pwrseq_simple_free, + }; + +-struct mmc_pwrseq *mmc_pwrseq_simple_alloc(struct mmc_host *host, +- struct device *dev) ++static const struct of_device_id mmc_pwrseq_simple_of_match[] = { ++ { .compatible = "mmc-pwrseq-simple",}, ++ {/* sentinel */}, ++}; ++MODULE_DEVICE_TABLE(of, mmc_pwrseq_simple_of_match); ++ ++static int mmc_pwrseq_simple_probe(struct platform_device *pdev) + { + struct mmc_pwrseq_simple *pwrseq; +- int ret = 0; ++ struct device *dev = &pdev->dev; + +- pwrseq = kzalloc(sizeof(*pwrseq), GFP_KERNEL); ++ pwrseq = devm_kzalloc(dev, sizeof(*pwrseq), GFP_KERNEL); + if (!pwrseq) +- return ERR_PTR(-ENOMEM); ++ return -ENOMEM; + +- pwrseq->ext_clk = clk_get(dev, "ext_clock"); +- if (IS_ERR(pwrseq->ext_clk) && +- PTR_ERR(pwrseq->ext_clk) != -ENOENT) { +- ret = PTR_ERR(pwrseq->ext_clk); +- goto free; +- } ++ pwrseq->ext_clk = devm_clk_get(dev, "ext_clock"); ++ if (IS_ERR(pwrseq->ext_clk) && PTR_ERR(pwrseq->ext_clk) != -ENOENT) ++ return PTR_ERR(pwrseq->ext_clk); + +- pwrseq->reset_gpios = gpiod_get_array(dev, "reset", GPIOD_OUT_HIGH); ++ pwrseq->reset_gpios = devm_gpiod_get_array(dev, "reset", ++ GPIOD_OUT_HIGH); + if (IS_ERR(pwrseq->reset_gpios) && + PTR_ERR(pwrseq->reset_gpios) != -ENOENT && + PTR_ERR(pwrseq->reset_gpios) != -ENOSYS) { +- ret = PTR_ERR(pwrseq->reset_gpios); +- goto clk_put; ++ return PTR_ERR(pwrseq->reset_gpios); + } + ++ pwrseq->pwrseq.dev = dev; + pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops; ++ pwrseq->pwrseq.owner = THIS_MODULE; ++ platform_set_drvdata(pdev, pwrseq); + +- return &pwrseq->pwrseq; +-clk_put: +- if (!IS_ERR(pwrseq->ext_clk)) +- clk_put(pwrseq->ext_clk); +-free: +- kfree(pwrseq); +- return ERR_PTR(ret); ++ return mmc_pwrseq_register(&pwrseq->pwrseq); + } ++ ++static int mmc_pwrseq_simple_remove(struct platform_device *pdev) ++{ ++ struct mmc_pwrseq_simple *pwrseq = platform_get_drvdata(pdev); ++ ++ mmc_pwrseq_unregister(&pwrseq->pwrseq); ++ ++ return 0; ++} ++ ++static struct platform_driver mmc_pwrseq_simple_driver = { ++ .probe = mmc_pwrseq_simple_probe, ++ .remove = mmc_pwrseq_simple_remove, ++ .driver = { ++ .name = "pwrseq_simple", ++ .of_match_table = mmc_pwrseq_simple_of_match, ++ }, ++}; ++ ++module_platform_driver(mmc_pwrseq_simple_driver); ++MODULE_LICENSE("GPL v2"); + +From d94057e963bb557eb61324a2f05e5a0a743813c5 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Sun, 7 Aug 2016 21:02:38 +0200 +Subject: [PATCH] UPSTREAM: mmc: pwrseq-simple: Add an optional + post-power-on-delay + +Some devices need a while to boot their firmware after providing clks / +de-asserting resets before they are ready to receive sdio commands. + +This commits adds a post-power-on-delay-ms devicetree property to +mmc-pwrseq-simple for use with such devices. + +Signed-off-by: Hans de Goede +Acked-by: Rob Herring +Signed-off-by: Ulf Hansson +(cherry picked from commit 721e0497172f0fa661eed2d63367cddf479f35e8) +--- + Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt | 2 ++ + drivers/mmc/core/pwrseq_simple.c | 9 +++++++++ + 2 files changed, 11 insertions(+) + +diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt +index ce0e76749671..e25436861867 100644 +--- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt ++++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt +@@ -16,6 +16,8 @@ Optional properties: + See ../clocks/clock-bindings.txt for details. + - clock-names : Must include the following entry: + "ext_clock" (External clock provided to the card). ++- post-power-on-delay-ms : Delay in ms after powering the card and ++ de-asserting the reset-gpios (if any) + + Example: + +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index 450d907c6e6c..1304160de168 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -16,6 +16,8 @@ + #include + #include + #include ++#include ++#include + + #include + +@@ -24,6 +26,7 @@ + struct mmc_pwrseq_simple { + struct mmc_pwrseq pwrseq; + bool clk_enabled; ++ u32 post_power_on_delay_ms; + struct clk *ext_clk; + struct gpio_descs *reset_gpios; + }; +@@ -64,6 +67,9 @@ static void mmc_pwrseq_simple_post_power_on(struct mmc_host *host) + struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq); + + mmc_pwrseq_simple_set_gpios_value(pwrseq, 0); ++ ++ if (pwrseq->post_power_on_delay_ms) ++ msleep(pwrseq->post_power_on_delay_ms); + } + + static void mmc_pwrseq_simple_power_off(struct mmc_host *host) +@@ -111,6 +117,9 @@ static int mmc_pwrseq_simple_probe(struct platform_device *pdev) + return PTR_ERR(pwrseq->reset_gpios); + } + ++ device_property_read_u32(dev, "post-power-on-delay-ms", ++ &pwrseq->post_power_on_delay_ms); ++ + pwrseq->pwrseq.dev = dev; + pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops; + pwrseq->pwrseq.owner = THIS_MODULE; + +From 50e40e09e01a67684fd3b7ef2422f194a656dd93 Mon Sep 17 00:00:00 2001 +From: Ulf Hansson +Date: Sat, 6 May 2017 11:41:30 +0200 +Subject: [PATCH] UPSTREAM: mmc: dt: pwrseq-simple: Invent power-off-delay-us + +During power off, after the GPIO pin has been asserted, some devices like +the Wifi chip from TI, Wl18xx, needs a delay before the host continues with +clock gating and turning off regulators as to follow a graceful shutdown +sequence. + +Therefore invent an optional power-off-delay-us DT binding for +mmc-pwrseq-simple, to allow us to support this constraint. + +Cc: devicetree@vger.kernel.org +Cc: Rob Herring +Cc: linux-mmc@vger.kernel.org +Signed-off-by: Ulf Hansson +Acked-by: Arnd Bergmann +--- + Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt +index e25436861867..9029b45b8a22 100644 +--- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt ++++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt +@@ -18,6 +18,8 @@ Optional properties: + "ext_clock" (External clock provided to the card). + - post-power-on-delay-ms : Delay in ms after powering the card and + de-asserting the reset-gpios (if any) ++- power-off-delay-us : Delay in us after asserting the reset-gpios (if any) ++ during power off of the card. + + Example: + + +From e4960aff45ecb83728279dd1e524f4e62ec11240 Mon Sep 17 00:00:00 2001 +From: Ulf Hansson +Date: Sat, 6 May 2017 11:43:05 +0200 +Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Parse DTS for the + power-off-delay-us property + +If the optional power-off-delay-us property is found, insert the +corresponding delay after asserting the GPIO during power off. This enables +a graceful shutdown sequence for some devices. + +Cc: linux-mmc@vger.kernel.org +Signed-off-by: Ulf Hansson +Acked-by: Arnd Bergmann +(cherry picked from commit e9256e142f597edf90c68cec22db4c4aebaa27de) +--- + drivers/mmc/core/pwrseq_simple.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c +index 1304160de168..13ef162cf066 100644 +--- a/drivers/mmc/core/pwrseq_simple.c ++++ b/drivers/mmc/core/pwrseq_simple.c +@@ -27,6 +27,7 @@ struct mmc_pwrseq_simple { + struct mmc_pwrseq pwrseq; + bool clk_enabled; + u32 post_power_on_delay_ms; ++ u32 power_off_delay_us; + struct clk *ext_clk; + struct gpio_descs *reset_gpios; + }; +@@ -78,6 +79,10 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host) + + mmc_pwrseq_simple_set_gpios_value(pwrseq, 1); + ++ if (pwrseq->power_off_delay_us) ++ usleep_range(pwrseq->power_off_delay_us, ++ 2 * pwrseq->power_off_delay_us); ++ + if (!IS_ERR(pwrseq->ext_clk) && pwrseq->clk_enabled) { + clk_disable_unprepare(pwrseq->ext_clk); + pwrseq->clk_enabled = false; +@@ -119,6 +124,8 @@ static int mmc_pwrseq_simple_probe(struct platform_device *pdev) + + device_property_read_u32(dev, "post-power-on-delay-ms", + &pwrseq->post_power_on_delay_ms); ++ device_property_read_u32(dev, "power-off-delay-us", ++ &pwrseq->power_off_delay_us); + + pwrseq->pwrseq.dev = dev; + pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops; diff --git a/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch new file mode 100644 index 0000000000..0efb534c19 --- /dev/null +++ b/projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch @@ -0,0 +1,1785 @@ +From 1ed55271b88f5055f501d4c83e1702b38760ccdf Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Feb 2018 10:47:28 +0100 +Subject: [PATCH] Revert "dmaengine: pl330: fix bug that chan descdone is null" + +This reverts commit 636c30b38ae6ec499735ce7621ba474944b4e9b7. +--- + drivers/dma/pl330.c | 17 ++++++++--------- + 1 file changed, 8 insertions(+), 9 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 08179f5d0428..766ab72d119e 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1785,17 +1785,16 @@ static int pl330_update(struct pl330_dmac *pl330) + + /* Detach the req */ + descdone = thrd->req[active].desc; +- if (descdone) { +- if (!descdone->cyclic) { +- thrd->req[active].desc = NULL; +- thrd->req_running = -1; +- /* Get going again ASAP */ +- _start(thrd); +- } + +- /* For now, just make a list of callbacks to be done */ +- list_add_tail(&descdone->rqd, &pl330->req_done); ++ if (!descdone->cyclic) { ++ thrd->req[active].desc = NULL; ++ thrd->req_running = -1; ++ /* Get going again ASAP */ ++ _start(thrd); + } ++ ++ /* For now, just make a list of callbacks to be done */ ++ list_add_tail(&descdone->rqd, &pl330->req_done); + } + } + + +From 43f2eb7bd8a74147c2d9fe37d98df41c4973db63 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Feb 2018 10:47:38 +0100 +Subject: [PATCH] Revert "dmaengine: pl330: flush before first loop" + +This reverts commit 34be2cf4679cadbf910de9651d54b46930166446. +--- + drivers/dma/pl330.c | 12 ++---------- + 1 file changed, 2 insertions(+), 10 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 766ab72d119e..055e3cd8832c 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1347,11 +1347,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, + /* forever loop */ + off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); + off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); +-#ifdef CONFIG_ARCH_ROCKCHIP +- if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) +- off += _emit_FLUSHP(dry_run, &buf[off], +- pxs->desc->peri); +-#endif ++ + /* loop0 */ + off += _emit_LP(dry_run, &buf[off], 0, lcnt0); + ljmp0 = off; +@@ -1427,11 +1423,7 @@ static inline int _setup_loops(struct pl330_dmac *pl330, + u32 ccr = pxs->ccr; + unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); + int off = 0; +-#ifdef CONFIG_ARCH_ROCKCHIP +- if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) +- off += _emit_FLUSHP(dry_run, &buf[off], +- pxs->desc->peri); +-#endif ++ + while (bursts) { + c = bursts; + off += _loop(pl330, dry_run, &buf[off], &c, pxs); + +From 1bea0136096ba90fb53c056f3ce3422086361a02 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Feb 2018 10:47:51 +0100 +Subject: [PATCH] Revert "dmaengine: pl330: fix 2 bursts transfer when dma + flushes" + +This reverts commit 98753e172dc1d06cf4d61c48f5c3487df0247472. +--- + drivers/dma/pl330.c | 20 -------------------- + 1 file changed, 20 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 055e3cd8832c..ce52aa411c0b 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1169,16 +1169,6 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); + off += _emit_LDP(dry_run, &buf[off], cond, pxs->desc->peri); + off += _emit_ST(dry_run, &buf[off], ALWAYS); +-#ifdef CONFIG_ARCH_ROCKCHIP +- /* +- * Make suree dma has finish transmission, or later flush may +- * cause dma second transmission,and fifo is overrun. +- */ +- off += _emit_WMB(dry_run, &buf[off]); +- off += _emit_NOP(dry_run, &buf[off]); +- off += _emit_WMB(dry_run, &buf[off]); +- off += _emit_NOP(dry_run, &buf[off]); +-#endif + + if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) + off += _emit_FLUSHP(dry_run, &buf[off], +@@ -1199,16 +1189,6 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); + off += _emit_LD(dry_run, &buf[off], ALWAYS); + off += _emit_STP(dry_run, &buf[off], cond, pxs->desc->peri); +-#ifdef CONFIG_ARCH_ROCKCHIP +- /* +- * Make suree dma has finish transmission, or later flush may +- * cause dma second transmission,and fifo is overrun. +- */ +- off += _emit_WMB(dry_run, &buf[off]); +- off += _emit_NOP(dry_run, &buf[off]); +- off += _emit_WMB(dry_run, &buf[off]); +- off += _emit_NOP(dry_run, &buf[off]); +-#endif + + if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) + off += _emit_FLUSHP(dry_run, &buf[off], + +From b234afcd6b84fedb81f0cb14dc0002b3cefe0296 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 21 Oct 2017 19:49:27 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: _loop_cyclic fix cycles of last + loop" + +This reverts commit d7155171cbc65e45b5b0c8db03fd16fa57a181f2. +--- + drivers/dma/pl330.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index ce52aa411c0b..9fbd8d863774 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1366,7 +1366,7 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, + ccr &= ~(0xf << CC_SRCBRSTLEN_SHFT); + ccr &= ~(0xf << CC_DSTBRSTLEN_SHFT); + off += _emit_MOV(dry_run, &buf[off], CCR, ccr); +- off += _emit_LP(dry_run, &buf[off], 1, c); ++ off += _emit_LP(dry_run, &buf[off], 1, c - 1); + ljmp1 = off; + off += _bursts(pl330, dry_run, &buf[off], pxs, 1); + lpend.cond = ALWAYS; + +From a7c635636d588f97e1e9a22313029843a3f8b486 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 4 Feb 2018 11:05:44 +0100 +Subject: [PATCH] Revert "dmaengine: pl330: pl330_tasklet init power_down by + pch->active" + +This reverts commit 796b13f24a158f14d540bcf7316d843f72242c0d. +--- + drivers/dma/pl330.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 9fbd8d863774..359475bbe89f 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2163,7 +2163,7 @@ static void pl330_tasklet(unsigned long data) + spin_lock(&pch->thread->dmac->lock); + _stop(pch->thread); + spin_unlock(&pch->thread->dmac->lock); +- power_down = pch->active; ++ power_down = true; + pch->active = false; + } else { + /* Make sure the PL330 Channel thread is active */ + +From 50f85fa5c566c0d706ca264fa9327bc360255639 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 16 Jun 2017 23:14:54 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: _loop_cyclic supports unaligned + size" + +This reverts commit 13dbe2cccd5851540af8158b12499c33801b6ef6. +--- + drivers/dma/pl330.c | 38 ++++++++++---------------------------- + 1 file changed, 10 insertions(+), 28 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 359475bbe89f..3fa6a7e474de 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1356,28 +1356,6 @@ static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, + off += _emit_LPEND(dry_run, &buf[off], &lpend); + } + +- if (pl330->peripherals_req_type == BURST) { +- unsigned int ccr = pxs->ccr; +- unsigned long c = 0; +- +- c = BYTE_MOD_BURST_LEN(x->bytes, pxs->ccr); +- +- if (c) { +- ccr &= ~(0xf << CC_SRCBRSTLEN_SHFT); +- ccr &= ~(0xf << CC_DSTBRSTLEN_SHFT); +- off += _emit_MOV(dry_run, &buf[off], CCR, ccr); +- off += _emit_LP(dry_run, &buf[off], 1, c - 1); +- ljmp1 = off; +- off += _bursts(pl330, dry_run, &buf[off], pxs, 1); +- lpend.cond = ALWAYS; +- lpend.forever = false; +- lpend.loop = 1; +- lpend.bjump = off - ljmp1; +- off += _emit_LPEND(dry_run, &buf[off], &lpend); +- off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); +- } +- } +- + off += _emit_SEV(dry_run, &buf[off], ev); + + lpend.cond = ALWAYS; +@@ -1479,13 +1457,13 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + + x = &pxs->desc->px; + +- if (pl330->peripherals_req_type != BURST) { +- /* Error if xfer length is not aligned at burst size */ +- if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) +- return -EINVAL; +- } +- + if (!pxs->desc->cyclic) { ++ if (pl330->peripherals_req_type != BURST) { ++ /* Error if xfer length is not aligned at burst size */ ++ if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) ++ return -EINVAL; ++ } ++ + off += _setup_xfer(pl330, dry_run, &buf[off], pxs); + + /* DMASEV peripheral/event */ +@@ -1493,6 +1471,10 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + /* DMAEND */ + off += _emit_END(dry_run, &buf[off]); + } else { ++ /* Error if xfer length is not aligned at burst size */ ++ if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) ++ return -EINVAL; ++ + off += _setup_xfer_cyclic(pl330, dry_run, &buf[off], + pxs, thrd->ev); + } + +From f511e38f0d47ec8f8cd4db8f05fae8d496cec3a1 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 16 Jun 2017 23:14:54 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: redefine the cyclic transfer" + +This reverts commit 5f638786e66089344c9cf594b81fbf02cd794f15. +--- + drivers/dma/pl330.c | 137 +++++++++++----------------------------------------- + 1 file changed, 29 insertions(+), 108 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 3fa6a7e474de..0452a189d7fd 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1303,76 +1303,6 @@ static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], + return off; + } + +-/* Returns bytes consumed */ +-static inline int _loop_cyclic(struct pl330_dmac *pl330, unsigned dry_run, +- u8 buf[], unsigned long bursts, const struct _xfer_spec *pxs, int ev) +-{ +- int cyc, off; +- unsigned lcnt0, lcnt1, ljmp0, ljmp1, ljmpfe; +- struct _arg_LPEND lpend; +- struct pl330_xfer *x = &pxs->desc->px; +- +- off = 0; +- ljmpfe = off; +- lcnt0 = pxs->desc->num_periods; +- +- if (bursts > 256) { +- lcnt1 = 256; +- cyc = bursts / 256; +- } else { +- lcnt1 = bursts; +- cyc = 1; +- } +- +- /* forever loop */ +- off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); +- off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); +- +- /* loop0 */ +- off += _emit_LP(dry_run, &buf[off], 0, lcnt0); +- ljmp0 = off; +- +- /* loop1 */ +- off += _emit_LP(dry_run, &buf[off], 1, lcnt1); +- ljmp1 = off; +- off += _bursts(pl330, dry_run, &buf[off], pxs, cyc); +- lpend.cond = ALWAYS; +- lpend.forever = false; +- lpend.loop = 1; +- lpend.bjump = off - ljmp1; +- off += _emit_LPEND(dry_run, &buf[off], &lpend); +- +- /* remainder */ +- lcnt1 = bursts - (lcnt1 * cyc); +- +- if (lcnt1) { +- off += _emit_LP(dry_run, &buf[off], 1, lcnt1); +- ljmp1 = off; +- off += _bursts(pl330, dry_run, &buf[off], pxs, 1); +- lpend.cond = ALWAYS; +- lpend.forever = false; +- lpend.loop = 1; +- lpend.bjump = off - ljmp1; +- off += _emit_LPEND(dry_run, &buf[off], &lpend); +- } +- +- off += _emit_SEV(dry_run, &buf[off], ev); +- +- lpend.cond = ALWAYS; +- lpend.forever = false; +- lpend.loop = 0; +- lpend.bjump = off - ljmp0; +- off += _emit_LPEND(dry_run, &buf[off], &lpend); +- +- lpend.cond = ALWAYS; +- lpend.forever = true; +- lpend.loop = 1; +- lpend.bjump = off - ljmpfe; +- off += _emit_LPEND(dry_run, &buf[off], &lpend); +- +- return off; +-} +- + static inline int _setup_loops(struct pl330_dmac *pl330, + unsigned dry_run, u8 buf[], + const struct _xfer_spec *pxs) +@@ -1392,16 +1322,19 @@ static inline int _setup_loops(struct pl330_dmac *pl330, + } + + static inline int _setup_xfer(struct pl330_dmac *pl330, +- unsigned dry_run, u8 buf[], ++ unsigned dry_run, u8 buf[], u32 period, + const struct _xfer_spec *pxs) + { + struct pl330_xfer *x = &pxs->desc->px; ++ struct pl330_reqcfg *rqcfg = &pxs->desc->rqcfg; + int off = 0; + + /* DMAMOV SAR, x->src_addr */ +- off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); ++ off += _emit_MOV(dry_run, &buf[off], SAR, ++ x->src_addr + rqcfg->src_inc * period * x->bytes); + /* DMAMOV DAR, x->dst_addr */ +- off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); ++ off += _emit_MOV(dry_run, &buf[off], DAR, ++ x->dst_addr + rqcfg->dst_inc * period * x->bytes); + + /* Setup Loop(s) */ + off += _setup_loops(pl330, dry_run, &buf[off], pxs); +@@ -1423,20 +1356,6 @@ static inline int _setup_xfer(struct pl330_dmac *pl330, + return off; + } + +-static inline int _setup_xfer_cyclic(struct pl330_dmac *pl330, unsigned dry_run, +- u8 buf[], const struct _xfer_spec *pxs, int ev) +-{ +- struct pl330_xfer *x = &pxs->desc->px; +- u32 ccr = pxs->ccr; +- unsigned long bursts = BYTE_TO_BURST(x->bytes, ccr); +- int off = 0; +- +- /* Setup Loop(s) */ +- off += _loop_cyclic(pl330, dry_run, &buf[off], bursts, pxs, ev); +- +- return off; +-} +- + /* + * A req is a sequence of one or more xfer units. + * Returns the number of bytes taken to setup the MC for the req. +@@ -1449,34 +1368,42 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + struct pl330_xfer *x; + u8 *buf = req->mc_cpu; + int off = 0; ++ int period; ++ int again_off; + + PL330_DBGMC_START(req->mc_bus); + + /* DMAMOV CCR, ccr */ + off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); ++ again_off = off; + + x = &pxs->desc->px; ++ if (pl330->peripherals_req_type != BURST) { ++ /* Error if xfer length is not aligned at burst size */ ++ if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) ++ return -EINVAL; ++ } + +- if (!pxs->desc->cyclic) { +- if (pl330->peripherals_req_type != BURST) { +- /* Error if xfer length is not aligned at burst size */ +- if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) +- return -EINVAL; +- } +- +- off += _setup_xfer(pl330, dry_run, &buf[off], pxs); ++ for (period = 0; period < pxs->desc->num_periods; period++) { ++ off += _setup_xfer(pl330, dry_run, &buf[off], period, pxs); + + /* DMASEV peripheral/event */ + off += _emit_SEV(dry_run, &buf[off], thrd->ev); ++ } ++ ++ if (!pxs->desc->cyclic) { + /* DMAEND */ + off += _emit_END(dry_run, &buf[off]); + } else { +- /* Error if xfer length is not aligned at burst size */ +- if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) +- return -EINVAL; +- +- off += _setup_xfer_cyclic(pl330, dry_run, &buf[off], +- pxs, thrd->ev); ++ struct _arg_LPEND lpend; ++ /* LP */ ++ off += _emit_LP(dry_run, &buf[off], 0, 255); ++ /* LPEND */ ++ lpend.cond = ALWAYS; ++ lpend.forever = false; ++ lpend.loop = 0; ++ lpend.bjump = off - again_off; ++ off += _emit_LPEND(dry_run, &buf[off], &lpend); + } + + return off; +@@ -2649,7 +2576,6 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + { + struct dma_pl330_desc *desc = NULL; + struct dma_pl330_chan *pch = to_pchan(chan); +- struct pl330_dmac *pl330 = pch->dmac; + dma_addr_t dst; + dma_addr_t src; + +@@ -2688,12 +2614,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + + desc->rqtype = direction; + desc->rqcfg.brst_size = pch->burst_sz; +- +- if (pl330->peripherals_req_type == BURST) +- desc->rqcfg.brst_len = pch->burst_len; +- else +- desc->rqcfg.brst_len = 1; +- ++ desc->rqcfg.brst_len = pch->burst_len; + desc->bytes_requested = len; + fill_px(&desc->px, dst, src, period_len); + + +From 682a7f71bd308635045e9d49cbabb31002429d3f Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 16 Jun 2017 23:14:54 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: make transfer run infinitely + without CPU intervention" + +This reverts commit e8a6e5086cb82d59cae6ae029b1eb4432cc62288. +--- + drivers/dma/pl330.c | 199 +++++++++++++++++++++++++++------------------------- + 1 file changed, 105 insertions(+), 94 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 0452a189d7fd..47c2e67f0296 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -447,6 +447,9 @@ struct dma_pl330_chan { + int burst_len; /* the number of burst */ + dma_addr_t fifo_addr; + ++ /* for cyclic capability */ ++ bool cyclic; ++ + /* for runtime pm tracking */ + bool active; + }; +@@ -532,10 +535,6 @@ struct dma_pl330_desc { + unsigned peri:5; + /* Hook to attach to DMAC's list of reqs with due callback */ + struct list_head rqd; +- +- /* For cyclic capability */ +- bool cyclic; +- size_t num_periods; + }; + + struct _xfer_spec { +@@ -1322,19 +1321,16 @@ static inline int _setup_loops(struct pl330_dmac *pl330, + } + + static inline int _setup_xfer(struct pl330_dmac *pl330, +- unsigned dry_run, u8 buf[], u32 period, ++ unsigned dry_run, u8 buf[], + const struct _xfer_spec *pxs) + { + struct pl330_xfer *x = &pxs->desc->px; +- struct pl330_reqcfg *rqcfg = &pxs->desc->rqcfg; + int off = 0; + + /* DMAMOV SAR, x->src_addr */ +- off += _emit_MOV(dry_run, &buf[off], SAR, +- x->src_addr + rqcfg->src_inc * period * x->bytes); ++ off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); + /* DMAMOV DAR, x->dst_addr */ +- off += _emit_MOV(dry_run, &buf[off], DAR, +- x->dst_addr + rqcfg->dst_inc * period * x->bytes); ++ off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); + + /* Setup Loop(s) */ + off += _setup_loops(pl330, dry_run, &buf[off], pxs); +@@ -1368,14 +1364,11 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + struct pl330_xfer *x; + u8 *buf = req->mc_cpu; + int off = 0; +- int period; +- int again_off; + + PL330_DBGMC_START(req->mc_bus); + + /* DMAMOV CCR, ccr */ + off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); +- again_off = off; + + x = &pxs->desc->px; + if (pl330->peripherals_req_type != BURST) { +@@ -1384,27 +1377,12 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + return -EINVAL; + } + +- for (period = 0; period < pxs->desc->num_periods; period++) { +- off += _setup_xfer(pl330, dry_run, &buf[off], period, pxs); +- +- /* DMASEV peripheral/event */ +- off += _emit_SEV(dry_run, &buf[off], thrd->ev); +- } ++ off += _setup_xfer(pl330, dry_run, &buf[off], pxs); + +- if (!pxs->desc->cyclic) { +- /* DMAEND */ +- off += _emit_END(dry_run, &buf[off]); +- } else { +- struct _arg_LPEND lpend; +- /* LP */ +- off += _emit_LP(dry_run, &buf[off], 0, 255); +- /* LPEND */ +- lpend.cond = ALWAYS; +- lpend.forever = false; +- lpend.loop = 0; +- lpend.bjump = off - again_off; +- off += _emit_LPEND(dry_run, &buf[off], &lpend); +- } ++ /* DMASEV peripheral/event */ ++ off += _emit_SEV(dry_run, &buf[off], thrd->ev); ++ /* DMAEND */ ++ off += _emit_END(dry_run, &buf[off]); + + return off; + } +@@ -1666,13 +1644,12 @@ static int pl330_update(struct pl330_dmac *pl330) + + /* Detach the req */ + descdone = thrd->req[active].desc; ++ thrd->req[active].desc = NULL; + +- if (!descdone->cyclic) { +- thrd->req[active].desc = NULL; +- thrd->req_running = -1; +- /* Get going again ASAP */ +- _start(thrd); +- } ++ thrd->req_running = -1; ++ ++ /* Get going again ASAP */ ++ _start(thrd); + + /* For now, just make a list of callbacks to be done */ + list_add_tail(&descdone->rqd, &pl330->req_done); +@@ -2043,27 +2020,12 @@ static void pl330_tasklet(unsigned long data) + spin_lock_irqsave(&pch->lock, flags); + + /* Pick up ripe tomatoes */ +- list_for_each_entry_safe(desc, _dt, &pch->work_list, node) { ++ list_for_each_entry_safe(desc, _dt, &pch->work_list, node) + if (desc->status == DONE) { +- if (!desc->cyclic) { ++ if (!pch->cyclic) + dma_cookie_complete(&desc->txd); +- list_move_tail(&desc->node, &pch->completed_list); +- } else { +- dma_async_tx_callback callback; +- void *callback_param; +- +- desc->status = BUSY; +- callback = desc->txd.callback; +- callback_param = desc->txd.callback_param; +- +- if (callback) { +- spin_unlock_irqrestore(&pch->lock, flags); +- callback(callback_param); +- spin_lock_irqsave(&pch->lock, flags); +- } +- } ++ list_move_tail(&desc->node, &pch->completed_list); + } +- } + + /* Try to submit a req imm. next to the last completed cookie */ + fill_queue(pch); +@@ -2091,8 +2053,20 @@ static void pl330_tasklet(unsigned long data) + callback = desc->txd.callback; + callback_param = desc->txd.callback_param; + +- desc->status = FREE; +- list_move_tail(&desc->node, &pch->dmac->desc_pool); ++ if (pch->cyclic) { ++ desc->status = PREP; ++ list_move_tail(&desc->node, &pch->work_list); ++ if (power_down) { ++ pch->active = true; ++ spin_lock(&pch->thread->dmac->lock); ++ _start(pch->thread); ++ spin_unlock(&pch->thread->dmac->lock); ++ power_down = false; ++ } ++ } else { ++ desc->status = FREE; ++ list_move_tail(&desc->node, &pch->dmac->desc_pool); ++ } + + dma_descriptor_unmap(&desc->txd); + +@@ -2152,6 +2126,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan) + spin_lock_irqsave(&pl330->lock, flags); + + dma_cookie_init(chan); ++ pch->cyclic = false; + + pch->thread = pl330_request_channel(pl330); + if (!pch->thread) { +@@ -2275,7 +2250,8 @@ static void pl330_free_chan_resources(struct dma_chan *chan) + pl330_release_channel(pch->thread); + pch->thread = NULL; + +- list_splice_tail_init(&pch->work_list, &pch->dmac->desc_pool); ++ if (pch->cyclic) ++ list_splice_tail_init(&pch->work_list, &pch->dmac->desc_pool); + + spin_unlock_irqrestore(&pl330->lock, flags); + pm_runtime_mark_last_busy(pch->dmac->ddma.dev); +@@ -2329,7 +2305,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + + /* Check in pending list */ + list_for_each_entry(desc, &pch->work_list, node) { +- if (desc->status == DONE && !desc->cyclic) ++ if (desc->status == DONE) + transferred = desc->bytes_requested; + else if (running && desc == running) + transferred = +@@ -2401,8 +2377,12 @@ static dma_cookie_t pl330_tx_submit(struct dma_async_tx_descriptor *tx) + /* Assign cookies to all nodes */ + while (!list_empty(&last->node)) { + desc = list_entry(last->node.next, struct dma_pl330_desc, node); +- ++ if (pch->cyclic) { ++ desc->txd.callback = last->txd.callback; ++ desc->txd.callback_param = last->txd.callback_param; ++ } + desc->last = false; ++ + dma_cookie_assign(&desc->txd); + + list_move_tail(&desc->node, &pch->submitted_list); +@@ -2502,9 +2482,6 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) + desc->peri = peri_id ? pch->chan.chan_id : 0; + desc->rqcfg.pcfg = &pch->dmac->pcfg; + +- desc->cyclic = false; +- desc->num_periods = 1; +- + dma_async_tx_descriptor_init(&desc->txd, &pch->chan); + + return desc; +@@ -2574,8 +2551,10 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags) + { +- struct dma_pl330_desc *desc = NULL; ++ struct dma_pl330_desc *desc = NULL, *first = NULL; + struct dma_pl330_chan *pch = to_pchan(chan); ++ struct pl330_dmac *pl330 = pch->dmac; ++ unsigned int i; + dma_addr_t dst; + dma_addr_t src; + +@@ -2588,38 +2567,70 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + return NULL; + } + +- desc = pl330_get_desc(pch); +- if (!desc) { +- dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", +- __func__, __LINE__); +- return NULL; +- } ++ for (i = 0; i < len / period_len; i++) { ++ desc = pl330_get_desc(pch); ++ if (!desc) { ++ dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", ++ __func__, __LINE__); + +- switch (direction) { +- case DMA_MEM_TO_DEV: +- desc->rqcfg.src_inc = 1; +- desc->rqcfg.dst_inc = 0; +- src = dma_addr; +- dst = pch->fifo_addr; +- break; +- case DMA_DEV_TO_MEM: +- desc->rqcfg.src_inc = 0; +- desc->rqcfg.dst_inc = 1; +- src = pch->fifo_addr; +- dst = dma_addr; +- break; +- default: +- break; ++ if (!first) ++ return NULL; ++ ++ spin_lock_irqsave(&pl330->pool_lock, flags); ++ ++ while (!list_empty(&first->node)) { ++ desc = list_entry(first->node.next, ++ struct dma_pl330_desc, node); ++ list_move_tail(&desc->node, &pl330->desc_pool); ++ } ++ ++ list_move_tail(&first->node, &pl330->desc_pool); ++ ++ spin_unlock_irqrestore(&pl330->pool_lock, flags); ++ ++ return NULL; ++ } ++ ++ switch (direction) { ++ case DMA_MEM_TO_DEV: ++ desc->rqcfg.src_inc = 1; ++ desc->rqcfg.dst_inc = 0; ++ src = dma_addr; ++ dst = pch->fifo_addr; ++ break; ++ case DMA_DEV_TO_MEM: ++ desc->rqcfg.src_inc = 0; ++ desc->rqcfg.dst_inc = 1; ++ src = pch->fifo_addr; ++ dst = dma_addr; ++ break; ++ default: ++ break; ++ } ++ ++ desc->rqtype = direction; ++ desc->rqcfg.brst_size = pch->burst_sz; ++ ++ if (pl330->peripherals_req_type == BURST) ++ desc->rqcfg.brst_len = pch->burst_len; ++ else ++ desc->rqcfg.brst_len = 1; ++ ++ desc->bytes_requested = period_len; ++ fill_px(&desc->px, dst, src, period_len); ++ ++ if (!first) ++ first = desc; ++ else ++ list_add_tail(&desc->node, &first->node); ++ ++ dma_addr += period_len; + } + +- desc->rqtype = direction; +- desc->rqcfg.brst_size = pch->burst_sz; +- desc->rqcfg.brst_len = pch->burst_len; +- desc->bytes_requested = len; +- fill_px(&desc->px, dst, src, period_len); ++ if (!desc) ++ return NULL; + +- desc->cyclic = true; +- desc->num_periods = len / period_len; ++ pch->cyclic = true; + desc->txd.flags = flags; + + return &desc->txd; + +From bf7ad151876459f44d29cb8949a95b69b2f3c3db Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 16 Jun 2017 23:14:55 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: support transfer that doesn't align + with (burst len * burst size)" + +This reverts commit c66ecf19b98ffac86177c29859e683de39f44e73. +--- + drivers/dma/pl330.c | 23 +++-------------------- + 1 file changed, 3 insertions(+), 20 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 47c2e67f0296..b5cf3fe9e9c3 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -240,7 +240,6 @@ enum pl330_byteswap { + + #define BYTE_TO_BURST(b, ccr) ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr)) + #define BURST_TO_BYTE(c, ccr) ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr)) +-#define BYTE_MOD_BURST_LEN(b, ccr) (((b) / BRST_SIZE(ccr)) % BRST_LEN(ccr)) + + /* + * With 256 bytes, we can do more than 2.5MB and 5MB xfers per req +@@ -1335,20 +1334,6 @@ static inline int _setup_xfer(struct pl330_dmac *pl330, + /* Setup Loop(s) */ + off += _setup_loops(pl330, dry_run, &buf[off], pxs); + +- if (pl330->peripherals_req_type == BURST) { +- unsigned int ccr = pxs->ccr; +- unsigned long c = 0; +- +- c = BYTE_MOD_BURST_LEN(x->bytes, pxs->ccr); +- +- if (c) { +- ccr &= ~(0xf << CC_SRCBRSTLEN_SHFT); +- ccr &= ~(0xf << CC_DSTBRSTLEN_SHFT); +- off += _emit_MOV(dry_run, &buf[off], CCR, ccr); +- off += _loop(pl330, dry_run, &buf[off], &c, pxs); +- } +- } +- + return off; + } + +@@ -1371,11 +1356,9 @@ static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); + + x = &pxs->desc->px; +- if (pl330->peripherals_req_type != BURST) { +- /* Error if xfer length is not aligned at burst size */ +- if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) +- return -EINVAL; +- } ++ /* Error if xfer length is not aligned at burst size */ ++ if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) ++ return -EINVAL; + + off += _setup_xfer(pl330, dry_run, &buf[off], pxs); + + +From 782768f2aa48a7ec4ef509936a2ff46f481d3d3c Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Fri, 16 Jun 2017 23:14:55 +0200 +Subject: [PATCH] Revert "dmaengine: pl330: add burst mode according to dts + config" + +This reverts commit 8e770f371cc27f8828cb9ceb0516adc23fe75995. +--- + drivers/dma/pl330.c | 36 ++++++++++++++---------------------- + 1 file changed, 14 insertions(+), 22 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index b5cf3fe9e9c3..131763534a39 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -494,8 +494,6 @@ struct pl330_dmac { + /* Peripheral channels connected to this DMAC */ + unsigned int num_peripherals; + struct dma_pl330_chan *peripherals; /* keep at end */ +- /* set peripherals request type according to soc config*/ +- enum pl330_cond peripherals_req_type; + int quirks; + }; + +@@ -1161,7 +1159,12 @@ static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, + int cyc) + { + int off = 0; +- enum pl330_cond cond = pl330->peripherals_req_type; ++ enum pl330_cond cond; ++ ++ if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ++ cond = BURST; ++ else ++ cond = SINGLE; + + while (cyc--) { + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); +@@ -1181,7 +1184,12 @@ static inline int _ldst_memtodev(struct pl330_dmac *pl330, + const struct _xfer_spec *pxs, int cyc) + { + int off = 0; +- enum pl330_cond cond = pl330->peripherals_req_type; ++ enum pl330_cond cond; ++ ++ if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ++ cond = BURST; ++ else ++ cond = SINGLE; + + while (cyc--) { + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); +@@ -2593,12 +2601,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( + + desc->rqtype = direction; + desc->rqcfg.brst_size = pch->burst_sz; +- +- if (pl330->peripherals_req_type == BURST) +- desc->rqcfg.brst_len = pch->burst_len; +- else +- desc->rqcfg.brst_len = 1; +- ++ desc->rqcfg.brst_len = 1; + desc->bytes_requested = period_len; + fill_px(&desc->px, dst, src, period_len); + +@@ -2700,7 +2703,6 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, + { + struct dma_pl330_desc *first, *desc = NULL; + struct dma_pl330_chan *pch = to_pchan(chan); +- struct pl330_dmac *pl330 = pch->dmac; + struct scatterlist *sg; + int i; + dma_addr_t addr; +@@ -2744,12 +2746,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, + } + + desc->rqcfg.brst_size = pch->burst_sz; +- +- if (pl330->peripherals_req_type == BURST) +- desc->rqcfg.brst_len = pch->burst_len; +- else +- desc->rqcfg.brst_len = 1; +- ++ desc->rqcfg.brst_len = 1; + desc->rqtype = direction; + desc->bytes_requested = sg_dma_len(sg); + } +@@ -2845,11 +2842,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + + pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0; + +- if (of_find_property(np, "peripherals-req-type-burst", NULL)) +- pl330->peripherals_req_type = BURST; +- else +- pl330->peripherals_req_type = SINGLE; +- + /* get quirk */ + for (i = 0; i < ARRAY_SIZE(of_quirks); i++) + if (of_property_read_bool(np, of_quirks[i].quirk)) + +From a715ea1481fee1d4be239873f89c38a95cddc7cc Mon Sep 17 00:00:00 2001 +From: Vinod Koul +Date: Tue, 5 Jul 2016 10:02:16 +0530 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: explicitly freeup irq + +dmaengine device should explicitly call devm_free_irq() when using +devm_request_irq(). + +The irq is still ON when devices remove is executed and irq should be +quiesced before remove is completed. + +Signed-off-by: Vinod Koul +Cc: Jassi Brar +Cc: Linus Walleij +(cherry picked from commit 46cf94d6ab38420690d890d9922bfc61a7b3e2c5) +--- + drivers/dma/pl330.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 131763534a39..5b4a419673fc 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -3009,12 +3009,18 @@ static int pl330_remove(struct amba_device *adev) + { + struct pl330_dmac *pl330 = amba_get_drvdata(adev); + struct dma_pl330_chan *pch, *_p; ++ int i, irq; + + pm_runtime_get_noresume(pl330->ddma.dev); + + if (adev->dev.of_node) + of_dma_controller_free(adev->dev.of_node); + ++ for (i = 0; i < AMBA_NR_IRQS; i++) { ++ irq = adev->irq[i]; ++ devm_free_irq(&adev->dev, irq, pl330); ++ } ++ + dma_async_device_unregister(&pl330->ddma); + + /* Idle the DMAC */ + +From 5dd1aed3e2ad901aa4b3be9db31e1b2e7b270b45 Mon Sep 17 00:00:00 2001 +From: Stephen Barber +Date: Thu, 18 Aug 2016 17:59:59 -0700 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix residual for non-running BUSY + descriptors + +Only one descriptor in the work list should be running at +any given time, but it's possible to have an enqueued BUSY +descriptor that has not yet transferred any data, or for +a BUSY descriptor to linger briefly before transitioning +to DONE. These cases should be handled to keep residual +calculations consistent even with the non-running BUSY +descriptors in the work list. + +Signed-off-by: Stephen Barber +Signed-off-by: Vinod Koul +(cherry picked from commit d64e9a2c750930272492952c16f3f2c95311a6c9) +--- + drivers/dma/pl330.c | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 5b4a419673fc..aab5abab5a10 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2277,7 +2277,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + { + enum dma_status ret; + unsigned long flags; +- struct dma_pl330_desc *desc, *running = NULL; ++ struct dma_pl330_desc *desc, *running = NULL, *last_enq = NULL; + struct dma_pl330_chan *pch = to_pchan(chan); + unsigned int transferred, residual = 0; + +@@ -2294,6 +2294,8 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + if (pch->thread->req_running != -1) + running = pch->thread->req[pch->thread->req_running].desc; + ++ last_enq = pch->thread->req[pch->thread->lstenq].desc; ++ + /* Check in pending list */ + list_for_each_entry(desc, &pch->work_list, node) { + if (desc->status == DONE) +@@ -2301,6 +2303,15 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + else if (running && desc == running) + transferred = + pl330_get_current_xferred_count(pch, desc); ++ else if (desc->status == BUSY) ++ /* ++ * Busy but not running means either just enqueued, ++ * or finished and not yet marked done ++ */ ++ if (desc == last_enq) ++ transferred = 0; ++ else ++ transferred = desc->bytes_requested; + else + transferred = 0; + residual += desc->bytes_requested - transferred; + +From e2ae4ead3868a8aad8b87dcc8523e392302bc77a Mon Sep 17 00:00:00 2001 +From: Hsin-Yu Chao +Date: Tue, 23 Aug 2016 17:16:55 +0800 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: Acquire dmac's spinlock in + pl330_tx_status + +There is a racing when accessing dmac thread in pl330_tx_status that +the pl330_update is handling active request at the same time and +changing the status of descriptors. This could cause an invalid +transferred count from BUSY descriptor added up to the residual number. +Fix the bug by using the dmac's spinlock in pl330_tx_status to protect +thread resources from changing. +Note that the nested order of holding dmac's and dma_chan's spinlock is +consistent with the rest of the driver: dma_chan first and then dmac, +so it is safe from deadlock scenario. + +Signed-off-by: Hsin-Yu Chao +Reviewed-by: Guenter Roeck +Signed-off-by: Vinod Koul +(cherry picked from commit a40235a2278a315261ee007fc433ec1cfb31666f) +--- + drivers/dma/pl330.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index aab5abab5a10..1741cfbe311e 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2290,6 +2290,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + goto out; + + spin_lock_irqsave(&pch->lock, flags); ++ spin_lock(&pch->thread->dmac->lock); + + if (pch->thread->req_running != -1) + running = pch->thread->req[pch->thread->req_running].desc; +@@ -2332,6 +2333,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie, + if (desc->last) + residual = 0; + } ++ spin_unlock(&pch->thread->dmac->lock); + spin_unlock_irqrestore(&pch->lock, flags); + + out: + +From fc4fc3aa1348b018e072526781991bc837113436 Mon Sep 17 00:00:00 2001 +From: Stephen Barber +Date: Tue, 1 Nov 2016 16:44:27 -0700 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: Handle xferred count if DMAMOV + hasn't finished + +After executing DMAGO it's possible that a request can come in for the +current xferred count, but if that happens too soon then DMAMOV SAR/DAR +may not have yet completed. If that happens, we should explicitly return 0 +since nothing has been transferred yet. + +Signed-off-by: Stephen Barber +Signed-off-by: Vinod Koul +(cherry picked from commit c44da03dd517c11c2b3525937b0a241fc1c69399) +--- + drivers/dma/pl330.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 1741cfbe311e..dd58cf886fa0 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2268,6 +2268,11 @@ static int pl330_get_current_xferred_count(struct dma_pl330_chan *pch, + } + pm_runtime_mark_last_busy(pch->dmac->ddma.dev); + pm_runtime_put_autosuspend(pl330->ddma.dev); ++ ++ /* If DMAMOV hasn't finished yet, SAR/DAR can be zero */ ++ if (!val) ++ return 0; ++ + return val - addr; + } + + +From d5ad98021dc2135d0d5df3fbca7f74b97d1341af Mon Sep 17 00:00:00 2001 +From: Vladimir Murzin +Date: Wed, 7 Dec 2016 13:17:40 +0000 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: do not generate unaligned access + +When PL330 is used with !MMU the following fault is seen: + +Unhandled fault: alignment exception (0x801) at 0x8f26a002 +Internal error: : 801 [#1] ARM +Modules linked in: +CPU: 0 PID: 640 Comm: dma0chan0-copy0 Not tainted 4.8.0-6a82063-clean+ #1600 +Hardware name: ARM-Versatile Express +task: 8f1baa80 task.stack: 8e6fe000 +PC is at _setup_req+0x4c/0x350 +LR is at 0x8f2cbc00 +pc : [<801ea538>] lr : [<8f2cbc00>] psr: 60000093 +sp : 8e6ffdc0 ip : 00000000 fp : 00000000 +r10: 00000000 r9 : 8f2cba10 r8 : 8f2cbc00 +r7 : 80000013 r6 : 8f21a050 r5 : 8f21a000 r4 : 8f2ac800 +r3 : 8e6ffe18 r2 : 00944251 r1 : ffffffbc r0 : 8f26a000 +Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment none +Control: 00c5387c +Process dma0chan0-copy0 (pid: 640, stack limit = 0x8e6fe210) +Stack: (0x8e6ffdc0 to 0x8e700000) +fdc0: 00000001 60000093 00000000 8f2cba10 8f26a000 00000004 8f0ae000 8f2cbc00 +fde0: 8f0ae000 8f2ac800 8f21a000 8f21a050 80000013 8f2cbc00 8f2cba10 00000000 +fe00: 60000093 801ebca0 8e6ffe18 000013ff 40000093 00000000 00944251 8f2ac800 +fe20: a0000013 8f2b1320 00001986 00000000 00000001 000013ff 8f1e4f00 8f2cba10 +fe40: 8e6fff6c 801e9044 00000003 00000000 fef98c80 002faf07 8e6ffe7c 00000000 +fe60: 00000002 00000000 00001986 8f1f158d 8f1e4f00 80568de4 00000002 00000000 +fe80: 00001986 8f1f53ff 40000001 80580500 8f1f158d 8001e00c 00000000 cfdfdfdf +fea0: fdae2a25 00000001 00000004 8e6fe000 00000008 00000010 00000000 00000005 +fec0: 8f2b1330 8f2b1334 8e6ffe80 8e6ffe8c 00001986 00000000 8f21a014 00000001 +fee0: 8e6ffe60 8e6ffe78 00000002 00000000 000013ff 00000001 80568de4 8f1e8018 +ff00: 0000158d 8055ec30 00000001 803f6b00 00001986 8f2cba10 fdae2a25 00000001 +ff20: 8f1baca8 8e6fff24 8e6fff24 00000000 8e6fff24 ac6f3037 00000000 00000000 +ff40: 00000000 8e6fe000 8f1e4f40 00000000 8f1e4f40 8f1e4f00 801e84ec 00000000 +ff60: 00000000 00000000 00000000 80031714 dfdfdfcf 00000000 dfdfdfcf 8f1e4f00 +ff80: 00000000 8e6fff84 8e6fff84 00000000 8e6fff90 8e6fff90 8e6fffac 8f1e4f40 +ffa0: 80031640 00000000 00000000 8000f548 00000000 00000000 00000000 00000000 +ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 dfdfdfcf cfdfdfdf +[<801ea538>] (_setup_req) from [<801ebca0>] (pl330_tasklet+0x41c/0x490) +[<801ebca0>] (pl330_tasklet) from [<801e9044>] (dmatest_func+0xb58/0x149c) +[<801e9044>] (dmatest_func) from [<80031714>] (kthread+0xd4/0xec) +[<80031714>] (kthread) from [<8000f548>] (ret_from_fork+0x14/0x2c) +Code: e3a03001 e3e01043 e5c03001 e59d3048 (e5802002) + +This happens because _emit_{ADDH,MOV,GO) accessing to unaligned data +while writing to buffer. Fix it with writing to buffer byte by byte. + +Reviewed-by: Robin Murphy +Tested-by: Robin Murphy +Signed-off-by: Vladimir Murzin +Signed-off-by: Vinod Koul +(cherry picked from commit d07c9e1e212c9687f9198bfeba582e86cae3f6f9) +--- + drivers/dma/pl330.c | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index dd58cf886fa0..50a5f8e1e371 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -573,7 +573,8 @@ static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[], + + buf[0] = CMD_DMAADDH; + buf[0] |= (da << 1); +- *((__le16 *)&buf[1]) = cpu_to_le16(val); ++ buf[1] = val; ++ buf[2] = val >> 8; + + PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n", + da == 1 ? "DA" : "SA", val); +@@ -727,7 +728,10 @@ static inline u32 _emit_MOV(unsigned dry_run, u8 buf[], + + buf[0] = CMD_DMAMOV; + buf[1] = dst; +- *((__le32 *)&buf[2]) = cpu_to_le32(val); ++ buf[2] = val; ++ buf[3] = val >> 8; ++ buf[4] = val >> 16; ++ buf[5] = val >> 24; + + PL330_DBGCMD_DUMP(SZ_DMAMOV, "\tDMAMOV %s 0x%x\n", + dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); +@@ -902,10 +906,11 @@ static inline u32 _emit_GO(unsigned dry_run, u8 buf[], + + buf[0] = CMD_DMAGO; + buf[0] |= (ns << 1); +- + buf[1] = chan & 0x7; +- +- *((__le32 *)&buf[2]) = cpu_to_le32(addr); ++ buf[2] = addr; ++ buf[3] = addr >> 8; ++ buf[4] = addr >> 16; ++ buf[5] = addr >> 24; + + return SZ_DMAGO; + } + +From 8c88ea42d57ce47924c1fc8524a61ef96f8bba51 Mon Sep 17 00:00:00 2001 +From: Vinod Koul +Date: Fri, 9 Dec 2016 15:24:12 +0530 +Subject: [PATCH] =?UTF-8?q?UPSTREAM:=20dmaengine:=20pl330:=20remove=20unus?= + =?UTF-8?q?ed=20=E2=80=98regs=E2=80=99?= +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +In pl330_add(), variable ‘regs’ is initialized but never used, which +leads to warning with W=1. + +drivers/dma/pl330.c: In function 'pl330_add': +drivers/dma/pl330.c:1891:16: warning: variable 'regs' set but not used [-Wunused-but-set-variable] + +So remove it. + +Cc: Linus Walleij +Signed-off-by: Vinod Koul +(cherry picked from commit 920e00d62ef9a818a4af7b2f9e1dbca23f846fc1) +--- + drivers/dma/pl330.c | 3 --- + 1 file changed, 3 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 50a5f8e1e371..c725ceb4644d 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -1883,11 +1883,8 @@ static int dmac_alloc_resources(struct pl330_dmac *pl330) + + static int pl330_add(struct pl330_dmac *pl330) + { +- void __iomem *regs; + int i, ret; + +- regs = pl330->base; +- + /* Check if we can handle this DMAC */ + if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { + dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", + +From 7b131091273ee28bfa40e16b13f24fed7880abcb Mon Sep 17 00:00:00 2001 +From: Jean-Philippe Brucker +Date: Thu, 1 Jun 2017 19:22:01 +0100 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix warning in pl330_remove + +When removing a device with less than 9 IRQs (AMBA_NR_IRQS), we'll get a +big WARN_ON from devres.c because pl330_remove calls devm_free_irqs for +unallocated irqs. Similarly to pl330_probe, check that IRQ number is +present before calling devm_free_irq. + +Signed-off-by: Jean-Philippe Brucker +Signed-off-by: Vinod Koul +(cherry picked from commit ebcdaee4cebb3a8d0d702ab5e9392373672ec1de) +--- + drivers/dma/pl330.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index c725ceb4644d..73eaf78871f1 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -3038,7 +3038,8 @@ static int pl330_remove(struct amba_device *adev) + + for (i = 0; i < AMBA_NR_IRQS; i++) { + irq = adev->irq[i]; +- devm_free_irq(&adev->dev, irq, pl330); ++ if (irq) ++ devm_free_irq(&adev->dev, irq, pl330); + } + + dma_async_device_unregister(&pl330->ddma); + +From 69414d3c8067401efa793708cb465f3891c087b7 Mon Sep 17 00:00:00 2001 +From: Marek Szyprowski +Date: Mon, 27 Mar 2017 07:31:03 +0200 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: remove pdata based initialization + +This driver is now used only on platforms which support device tree, so +it is safe to remove legacy platform data based initialization code. + +Signed-off-by: Marek Szyprowski +Reviewed-by: Ulf Hansson +Acked-by: Arnd Bergmann +For plat-samsung: +Acked-by: Krzysztof Kozlowski +Signed-off-by: Vinod Koul +(cherry picked from commit e8bb4673596ea28fab287dbc417e8100d798cd40) +--- + arch/arm/plat-samsung/devs.c | 1 - + drivers/dma/pl330.c | 42 ++++++++---------------------------------- + include/linux/amba/pl330.h | 35 ----------------------------------- + 3 files changed, 8 insertions(+), 70 deletions(-) + delete mode 100644 include/linux/amba/pl330.h + +diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c +index e212f9d804bd..2ef19ad5cb62 100644 +--- a/arch/arm/plat-samsung/devs.c ++++ b/arch/arm/plat-samsung/devs.c +@@ -10,7 +10,6 @@ + * published by the Free Software Foundation. + */ + +-#include + #include + #include + #include +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 73eaf78871f1..23fdb826c6e8 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -22,7 +22,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -2078,18 +2077,6 @@ static void pl330_tasklet(unsigned long data) + } + } + +-bool pl330_filter(struct dma_chan *chan, void *param) +-{ +- u8 *peri_id; +- +- if (chan->device->dev->driver != &pl330_driver.drv) +- return false; +- +- peri_id = chan->private; +- return *peri_id == (unsigned long)param; +-} +-EXPORT_SYMBOL(pl330_filter); +- + static struct dma_chan *of_dma_pl330_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) + { +@@ -2834,7 +2821,6 @@ static SIMPLE_DEV_PM_OPS(pl330_pm, pl330_suspend, pl330_resume); + static int + pl330_probe(struct amba_device *adev, const struct amba_id *id) + { +- struct dma_pl330_platdata *pdat; + struct pl330_config *pcfg; + struct pl330_dmac *pl330; + struct dma_pl330_chan *pch, *_p; +@@ -2844,8 +2830,6 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + int num_chan; + struct device_node *np = adev->dev.of_node; + +- pdat = dev_get_platdata(&adev->dev); +- + ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); + if (ret) + return ret; +@@ -2860,7 +2844,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + pd = &pl330->ddma; + pd->dev = &adev->dev; + +- pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0; ++ pl330->mcbufsz = 0; + + /* get quirk */ + for (i = 0; i < ARRAY_SIZE(of_quirks); i++) +@@ -2904,10 +2888,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + INIT_LIST_HEAD(&pd->channels); + + /* Initialize channel parameters */ +- if (pdat) +- num_chan = max_t(int, pdat->nr_valid_peri, pcfg->num_chan); +- else +- num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan); ++ num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan); + + pl330->num_peripherals = num_chan; + +@@ -2920,11 +2901,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + + for (i = 0; i < num_chan; i++) { + pch = &pl330->peripherals[i]; +- if (!adev->dev.of_node) +- pch->chan.private = pdat ? &pdat->peri_id[i] : NULL; +- else +- pch->chan.private = adev->dev.of_node; + ++ pch->chan.private = adev->dev.of_node; + INIT_LIST_HEAD(&pch->submitted_list); + INIT_LIST_HEAD(&pch->work_list); + INIT_LIST_HEAD(&pch->completed_list); +@@ -2937,15 +2915,11 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + list_add_tail(&pch->chan.device_node, &pd->channels); + } + +- if (pdat) { +- pd->cap_mask = pdat->cap_mask; +- } else { +- dma_cap_set(DMA_MEMCPY, pd->cap_mask); +- if (pcfg->num_peri) { +- dma_cap_set(DMA_SLAVE, pd->cap_mask); +- dma_cap_set(DMA_CYCLIC, pd->cap_mask); +- dma_cap_set(DMA_PRIVATE, pd->cap_mask); +- } ++ dma_cap_set(DMA_MEMCPY, pd->cap_mask); ++ if (pcfg->num_peri) { ++ dma_cap_set(DMA_SLAVE, pd->cap_mask); ++ dma_cap_set(DMA_CYCLIC, pd->cap_mask); ++ dma_cap_set(DMA_PRIVATE, pd->cap_mask); + } + + pd->device_alloc_chan_resources = pl330_alloc_chan_resources; +diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h +deleted file mode 100644 +index fe93758e8403..000000000000 +--- a/include/linux/amba/pl330.h ++++ /dev/null +@@ -1,35 +0,0 @@ +-/* linux/include/linux/amba/pl330.h +- * +- * Copyright (C) 2010 Samsung Electronics Co. Ltd. +- * Jaswinder Singh +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- */ +- +-#ifndef __AMBA_PL330_H_ +-#define __AMBA_PL330_H_ +- +-#include +- +-struct dma_pl330_platdata { +- /* +- * Number of valid peripherals connected to DMAC. +- * This may be different from the value read from +- * CR0, as the PL330 implementation might have 'holes' +- * in the peri list or the peri could also be reached +- * from another DMAC which the platform prefers. +- */ +- u8 nr_valid_peri; +- /* Array of valid peripherals */ +- u8 *peri_id; +- /* Operational capabilities */ +- dma_cap_mask_t cap_mask; +- /* Bytes to allocate for MC buffer */ +- unsigned mcbuf_sz; +-}; +- +-extern bool pl330_filter(struct dma_chan *chan, void *param); +-#endif /* __AMBA_PL330_H_ */ + +From b6ec69572e0392b5aa2ded093809d2ff12efb32a Mon Sep 17 00:00:00 2001 +From: Matthias Kaehlcke +Date: Thu, 15 Jun 2017 16:55:57 -0700 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: Delete unused functions + +The functions _queue_empty(), _emit_ADDH(), _emit_NOP(), _emit_STZ() +and _emit_WFE() are not used. Delete them. + +Signed-off-by: Matthias Kaehlcke +Signed-off-by: Vinod Koul +(cherry picked from commit d43674ecc002b49926f216cb414cff2d230ca3fb) +--- + drivers/dma/pl330.c | 67 ----------------------------------------------------- + 1 file changed, 67 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 23fdb826c6e8..51aa1de88007 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -538,11 +538,6 @@ struct _xfer_spec { + struct dma_pl330_desc *desc; + }; + +-static inline bool _queue_empty(struct pl330_thread *thrd) +-{ +- return thrd->req[0].desc == NULL && thrd->req[1].desc == NULL; +-} +- + static inline bool _queue_full(struct pl330_thread *thrd) + { + return thrd->req[0].desc != NULL && thrd->req[1].desc != NULL; +@@ -564,23 +559,6 @@ static inline u32 get_revision(u32 periph_id) + return (periph_id >> PERIPH_REV_SHIFT) & PERIPH_REV_MASK; + } + +-static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[], +- enum pl330_dst da, u16 val) +-{ +- if (dry_run) +- return SZ_DMAADDH; +- +- buf[0] = CMD_DMAADDH; +- buf[0] |= (da << 1); +- buf[1] = val; +- buf[2] = val >> 8; +- +- PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n", +- da == 1 ? "DA" : "SA", val); +- +- return SZ_DMAADDH; +-} +- + static inline u32 _emit_END(unsigned dry_run, u8 buf[]) + { + if (dry_run) +@@ -738,18 +716,6 @@ static inline u32 _emit_MOV(unsigned dry_run, u8 buf[], + return SZ_DMAMOV; + } + +-static inline u32 _emit_NOP(unsigned dry_run, u8 buf[]) +-{ +- if (dry_run) +- return SZ_DMANOP; +- +- buf[0] = CMD_DMANOP; +- +- PL330_DBGCMD_DUMP(SZ_DMANOP, "\tDMANOP\n"); +- +- return SZ_DMANOP; +-} +- + static inline u32 _emit_RMB(unsigned dry_run, u8 buf[]) + { + if (dry_run) +@@ -817,39 +783,6 @@ static inline u32 _emit_STP(unsigned dry_run, u8 buf[], + return SZ_DMASTP; + } + +-static inline u32 _emit_STZ(unsigned dry_run, u8 buf[]) +-{ +- if (dry_run) +- return SZ_DMASTZ; +- +- buf[0] = CMD_DMASTZ; +- +- PL330_DBGCMD_DUMP(SZ_DMASTZ, "\tDMASTZ\n"); +- +- return SZ_DMASTZ; +-} +- +-static inline u32 _emit_WFE(unsigned dry_run, u8 buf[], u8 ev, +- unsigned invalidate) +-{ +- if (dry_run) +- return SZ_DMAWFE; +- +- buf[0] = CMD_DMAWFE; +- +- ev &= 0x1f; +- ev <<= 3; +- buf[1] = ev; +- +- if (invalidate) +- buf[1] |= (1 << 1); +- +- PL330_DBGCMD_DUMP(SZ_DMAWFE, "\tDMAWFE %u%s\n", +- ev >> 3, invalidate ? ", I" : ""); +- +- return SZ_DMAWFE; +-} +- + static inline u32 _emit_WFP(unsigned dry_run, u8 buf[], + enum pl330_cond cond, u8 peri) + { + +From e8316771f06dfd265999bfd43301329c6955fb24 Mon Sep 17 00:00:00 2001 +From: Arvind Yadav +Date: Wed, 23 Aug 2017 21:57:31 +0530 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: constify amba_id + +amba_id are not supposed to change at runtime. All functions +working with const amba_id. So mark the non-const structs as const. + +Signed-off-by: Arvind Yadav +Signed-off-by: Vinod Koul +(cherry picked from commit b753351ec8f4c6a25c6d9b5c4eccce62e448a571) +--- + drivers/dma/pl330.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index 51aa1de88007..defec1b4bc2f 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2970,7 +2970,7 @@ static int pl330_remove(struct amba_device *adev) + return 0; + } + +-static struct amba_id pl330_ids[] = { ++static const struct amba_id pl330_ids[] = { + { + .id = 0x00041330, + .mask = 0x000fffff, + +From 784e0ffe42096a6c6119668a631338c6cff43374 Mon Sep 17 00:00:00 2001 +From: Alexander Kochetkov +Date: Wed, 4 Oct 2017 14:37:23 +0300 +Subject: [PATCH] UPSTREAM: dmaengine: pl330: fix descriptor allocation fail + +If two concurrent threads call pl330_get_desc() when DMAC descriptor +pool is empty it is possible that allocation for one of threads will fail +with message: + +kernel: dma-pl330 20078000.dma-controller: pl330_get_desc:2469 ALERT! + +Here how that can happen. Thread A calls pl330_get_desc() to get +descriptor. If DMAC descriptor pool is empty pl330_get_desc() allocates +new descriptor on shared pool using add_desc() and then get newly +allocated descriptor using pluck_desc(). At the same time thread B calls +pluck_desc() and take newly allocated descriptor. In that case descriptor +allocation for thread A will fail. + +Using on-stack pool for new descriptor allow avoid the issue described. +The patch modify pl330_get_desc() to use on-stack pool for allocation +new descriptors. + +Signed-off-by: Alexander Kochetkov +Tested-by: Marek Szyprowski +Signed-off-by: Vinod Koul +(cherry picked from commit e588710311ee5bece284871d613418831d56f2bd) +--- + drivers/dma/pl330.c | 39 ++++++++++++++++++++------------------- + 1 file changed, 20 insertions(+), 19 deletions(-) + +diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c +index defec1b4bc2f..76f514efe9d0 100644 +--- a/drivers/dma/pl330.c ++++ b/drivers/dma/pl330.c +@@ -2338,7 +2338,8 @@ static inline void _init_desc(struct dma_pl330_desc *desc) + } + + /* Returns the number of descriptors added to the DMAC pool */ +-static int add_desc(struct pl330_dmac *pl330, gfp_t flg, int count) ++static int add_desc(struct list_head *pool, spinlock_t *lock, ++ gfp_t flg, int count) + { + struct dma_pl330_desc *desc; + unsigned long flags; +@@ -2348,27 +2349,28 @@ static int add_desc(struct pl330_dmac *pl330, gfp_t flg, int count) + if (!desc) + return 0; + +- spin_lock_irqsave(&pl330->pool_lock, flags); ++ spin_lock_irqsave(lock, flags); + + for (i = 0; i < count; i++) { + _init_desc(&desc[i]); +- list_add_tail(&desc[i].node, &pl330->desc_pool); ++ list_add_tail(&desc[i].node, pool); + } + +- spin_unlock_irqrestore(&pl330->pool_lock, flags); ++ spin_unlock_irqrestore(lock, flags); + + return count; + } + +-static struct dma_pl330_desc *pluck_desc(struct pl330_dmac *pl330) ++static struct dma_pl330_desc *pluck_desc(struct list_head *pool, ++ spinlock_t *lock) + { + struct dma_pl330_desc *desc = NULL; + unsigned long flags; + +- spin_lock_irqsave(&pl330->pool_lock, flags); ++ spin_lock_irqsave(lock, flags); + +- if (!list_empty(&pl330->desc_pool)) { +- desc = list_entry(pl330->desc_pool.next, ++ if (!list_empty(pool)) { ++ desc = list_entry(pool->next, + struct dma_pl330_desc, node); + + list_del_init(&desc->node); +@@ -2377,7 +2379,7 @@ static struct dma_pl330_desc *pluck_desc(struct pl330_dmac *pl330) + desc->txd.callback = NULL; + } + +- spin_unlock_irqrestore(&pl330->pool_lock, flags); ++ spin_unlock_irqrestore(lock, flags); + + return desc; + } +@@ -2389,20 +2391,18 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) + struct dma_pl330_desc *desc; + + /* Pluck one desc from the pool of DMAC */ +- desc = pluck_desc(pl330); ++ desc = pluck_desc(&pl330->desc_pool, &pl330->pool_lock); + + /* If the DMAC pool is empty, alloc new */ + if (!desc) { +- if (!add_desc(pl330, GFP_ATOMIC, 1)) +- return NULL; ++ DEFINE_SPINLOCK(lock); ++ LIST_HEAD(pool); + +- /* Try again */ +- desc = pluck_desc(pl330); +- if (!desc) { +- dev_err(pch->dmac->ddma.dev, +- "%s:%d ALERT!\n", __func__, __LINE__); ++ if (!add_desc(&pool, &lock, GFP_ATOMIC, 1)) + return NULL; +- } ++ ++ desc = pluck_desc(&pool, &lock); ++ WARN_ON(!desc || !list_empty(&pool)); + } + + /* Initialize the descriptor */ +@@ -2815,7 +2815,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) + spin_lock_init(&pl330->pool_lock); + + /* Create a descriptor pool of default size */ +- if (!add_desc(pl330, GFP_KERNEL, NR_DEFAULT_DESC)) ++ if (!add_desc(&pl330->desc_pool, &pl330->pool_lock, ++ GFP_KERNEL, NR_DEFAULT_DESC)) + dev_warn(&adev->dev, "unable to allocate desc\n"); + + INIT_LIST_HEAD(&pd->channels); diff --git a/scripts/uboot_helper b/scripts/uboot_helper index 84c5bcf051..74de5024bb 100755 --- a/scripts/uboot_helper +++ b/scripts/uboot_helper @@ -8,6 +8,25 @@ devices = { 'board_name' : { 'dtb' : 'board_name.dtb', 'config' : 'board_name_defconfig' }, }, }, + + 'Rockchip' : { + 'MiQi' : { 'rk3288' : { 'dtb' : 'rk3288-miqi.dtb', 'config' : 'miqi-rk3288_config' }, }, + 'RK3328' : { + 'box' : { 'dtb' : 'rk3328-box.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'box-trn9' : { 'dtb' : 'rk3328-box-trn9.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'box-z28' : { 'dtb' : 'rk3328-box-z28.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'roc-cc' : { 'dtb' : 'rk3328-roc-cc.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'rock64' : { 'dtb' : 'rk3328-rock64.dtb', 'config' : 'evb-rk3328_defconfig' }, + 'rockbox' : { 'dtb' : 'rk3328-rockbox.dtb', 'config' : 'evb-rk3328_defconfig' }, + }, + 'RK3399' : { + 'odroidn1' : { 'dtb' : 'rk3399-odroidn1.dtb', 'config' : 'odroidn1_config' }, + 'rock960' : { 'dtb' : 'rk3399-rock960.dtb', 'config' : 'evb-rk3399_config' }, + 'rockpro64' : { 'dtb' : 'rk3399-rockpro64.dtb', 'config' : 'evb-rk3399_config' }, + 'sapphire' : { 'dtb' : 'rk3399-sapphire.dtb', 'config' : 'evb-rk3399_config' }, + }, + 'TinkerBoard' : { 'rk3288' : { 'dtb' : 'rk3288-miniarm.dtb', 'config' : 'tinker-rk3288_config' }, }, + }, } def usage():

j}NgU7A4xH*f-v9Ci3{0$G#t#oGekjx$M86 +z^r?aGxVZiHLs#|=-i%Jh0c&}c{wrj_d!PpT_z7?=bGGbpOCJk<6!}DV`~!Jodgw2r +z`5X*8bEqolARQeqd)3mPgL;AfY{H-I^k-kP%>ncl&b{t1h0Ux +zTGsdRx20@K32_1Psk1q~m3=wAifJf@tv!R_bh7<2mBENGjkB1?qUL`VNQ{gTIiX^=hVQ4ebxbvCEq#8_oF0R&M}zu;S_9uAm86=$UBw2L`_L) +zP#FaoA#@vaP3(+T49mHnBAatFqwVTWuzyN@j=kgbhkHgs<|gd0mt}rJZxmd`KBM@v +z0%au;l?;A{<1RGXE|vK-A%!-KwvR)TG3UI8=XdgbMQEw=l89xh=Stzf?RAAsI=-O& +zbyd{#9@OM@D5bI +zDLR4o1dT6vhqCzD=J~J(_6aTnhFu8usmZHc}Zv@HkaBr=jY`;X{Yo*C-Atj8If1>aE@=S%-pB9~x!iY@cj{HWZTB<^C$ +zVBh~Oa_bvwZ$NH4DHE1<(@x<$G(9d9T{eR6FWx2Av$Bz7`t8O5#b>;)_x7zJ2}U=3Vy#%xPma& +zf6VL04dwDBbGyi2Y}NJ1^{=Qe3)#y3H@FtLi~N7-$S|Y8mN@vyRav!)Gs9v_K+oaD +zC+j3n+Ju%G4eISmPBQ7>NJBSn9#V|7Txv9Z< +zSZs2Uqu6I+qkr8TZL75}DgnxCWZO!}E~qn$ovDl~tX;Lz=S#HHW)mxO{@M~1Z9 +z8s3jjUT&Xejp_8GFU>wPdT`v)=Hu8ZE}o*}M!qHA0uK$pzyD01-}kK8`hB_G7c8Y7 +z4PpPg>x}1*TJ&vzXJ}*J?H1i2ZD8F}5W_x7DRL3)|IuSI20R7X>>Y}{LxSU2y_qBE +zjleiNF9V*Br8BRl*-yjsS!5}){x8;~#;L;IBI-Zok#&mOKj_bv@0n^Y_C@C-Tt}!! +z;wiruSlC& +zv-M5t6&)YAqa?z7e_Zssk5J|>$v+#Oa`8Q43pw;q(DGjEi_pfQ +zw0v3iX~Ct#k7X-pNxNb+;(bPb_H{C7qs&8l&CFV_tP`T+w3~iv;29bATX)EF{~`nWifiP?_<8JBXW$|PTd~=t6=+J6VE-A5U)a$ +z?EgxRv-=&J#2pu^k!LbF^D20l3$N<_`_G6R6HLyzGj~XTv+im>&~4aDSjULJ!LKrE +zlaY6jyu6#DIWW^#WUb6AEM+|wB#-#nWloVbYH>7P)@iYR7XE_NA$0|*L+T1d>+r~& +z42^1Noy2eV7Bqajr<{cdVn0gh_`*FFiR&MZDxY +zvOqqECTc!B{1A2)=$q-N|5gUn=K9ky8opZV^0q?@l;8 +zYLmC{warrs{mku0>Ce~kDgAhJu<+a`{qqv=D~SwGnZ6<;Do@eTs?o5Yqph!i^RFT& +z>Hn~)n(RL->}*XYjxSeG=~>WnWrMYU1@h2Iw5?p;lS(_wP8$~&Jo&TA!XH7ml`+4BxEJ9| +z?0w-!-YK$|Js;+Za^!xS_~+iEAFw?-e*)c@uh}F&jhiR+NFC=qP1&+HC)dJjtC?Ht +z#Ah^R_lfUsz>n(s_|Of<1WTeDGtIHJr(k^!G9PcMmnZO>OI>37V$}1ld)`rd +z+OWULIB7K}*5<=!1NNyr!+FNcXbvpIuT-9O_!+)I-;l!dMerWqZ-ch=Q2&_7>bp}6 +zJCpjPUOBTZazDo$E$>xsq3-9Xmj@hrPU3?CbI2mM_A;rTcZhcXN5hG5x@uO1)W3G( +z;h$5#=$3)Ho&AKE&&XYm=KL%DB)$phqhqbvgL;3EH~8vgd>j**{6WS%HjvD>5wU@g +ziILAb1s~Z&d?%i?!rqJK?#Cyx{`RCT>XrVGezTZURDb_m_UO{DA}*jdKE4agQ}=o5 +zE;}`$^-#c6MS(M^Ze|F}}Nvh@E%aM(_>+w5{ +zwe!QK@A2C|PFj%b$vrP~gqL^W=k3N4N#-5q>=UL?-xAqFBK=i!fA(|cq;;N!p|a;p +zPr;F^G7EzEc!J~`kdwS~#IZ|avKqwrU!y-{{yVu&-FxzHl%q2pI~5$afnmnmF_n{T +z--+Mt$B(#nY(`y4kq^Ga=e_rGwWA?D1Rk-m!E)OXS<7S;tf4POcL*(s6MIK=Sp_tw +zb7oD(#R)>myNkR+ORl#=L--!P9)=H@=fw|vOn3_ZAlp8@A*zQ%xppElWL`ODl^YQQ +zy9wTp%Xla`R*Da2((ICBCeK1U>#^fbKH^nE_H2vz7)B(1z`kJ3dlp}kmojaH(%%L; +zvzW2D3VaUX<;85fbaRZC@%HP;3cWC3w}|~MJjcdjhKxV%8^FFgmgD%11&gv4+u3B; +z_`Ulr9Y>Y>)`v!-QNG7cLUKdeiSO~Lmr>&J>7f8qb8%wBW+ +zd3hfVHsY~)QV+UX*6DZhdv5t;`X{p>=V9gz>5IhZi*GpS +z(l2PgMnyy?9GRgaVBP(4MwmIx^*v;Cj^&Jw#5sD@@tyoMYHxpcU|yHG +zyv<`c?-vohBf97V#`nqn;5^kRx)bctCv(B&EWsrDFns}-lzufCufeI;*fP!Fij4r^Hzg`IvLP#0mCfEM;;p=dIsE7O%rkyTjM`g76f> +zeh8U3zADc|bnAppiF=;PuPd>iyXHl6A>ks;30kR2je#G&I(GTa4 +zrT9O;4Ly-#nD;A$pI3Gc`6Rqb+R6B)kDPH)$=-Ev{WNhtdGv`bDqJ@=v+(Q0P9r2g8174 +z=r0d?>%7k0eanLQ!0b|5W@VLvfjB{}b)&h7XaM +zv?<=^kJ;+spt64mFN1qtu1{RzPY^F{5&t&jAD2AV!O)>@Pu%meuC3oGYnDmTHVKZ3 +z!ACM}b=n8k%|hP89&MY6w;}lObf<0fW2Y}p*FHkKWQp+uLPq(>&MwIQ14!q +zxVbM;l~41$v%nMjb{XFsd-RC%q;jtG(Y=M73n5Hq?`|sP4s?6%{VRio==!w%4^L?h +z@Z8!h=s)SNpCZcy-k&j*>#q|hXQ;-q&c{}3d4c-~_ny#+bfLYM@2GBKZQ;;Vd6&>^ +zg_b;vy@GP*32!6(Eumof03rJpPslU-5%RrGi0qG@^^7V|E!Wt$?9Wcc9E)8a>9$xmnBfb>N}U(I+{Yde +zW5^i;?K}ez3|(ilzmy4oPsp716?pp+duln%sfVaHf}VQ=dhZbyl70ujyF8=q`<|a< +zf9rYHmu6OK7ICb>YQyZgwoV@KlN>X7b}AUSeh^#9*RwY~)BbPT{Nt64h40~S3acwp +z#a=I^&zi7N|A5|^z_{C&F}~Rc-T8A>(VRk6l*d^Bi*?Rqcx}T^Cu=qzYqqCYvpvnX +zNleng-{ZboFLQTBLE(d{#l!j(`@YO%4I3bob!#9En~duK&#yAyb++?OlLmB;!9HI* +z-%FFSZQG2)%Xr80ldS)qVjcMO4ZaBW^SEC6F3U42Rp#sn`JU&V_kQdMA=lRu-FZ*e +z6%qXJ?|TvoHH!^@RmSG#*K=RBS$3|1>tG*d?2+i%-Fu$nXCq +z>;p^KnVo-n30;fN5L`RBGWmXL@Ua;~``ve)-Gn@(55%^bfXoBX_BPQk*o+mFXHPs* +ziJopJ&Locg_XxVMbhpS>?&Uf*ugJNk +z#l!2NEtk||&9*D$e2CN&o^7WMuZJ>2>fwHPJ<<-o=OSmboHhh~bDce$T%IqS9-T*m +zAI%-;?@IO`ym!x~zBx9wQcJ@9d(TvCuG;NgRB{IX99xgjU3XN?bI+woejoY4h>Y3F +z%~N+{Clv(ms@z=)#)FhCjy~(-=h=r6YzD!;hrD^bD^KzpmQj!^&-|dPtEjV*I;+iu +z=F&xK9q&`G=`R+XceLv?I#TE%dcQ19c;cIl~^w@co +z!9Et5Oc|8P!4YI~P-K!f9$DZ!Vr(3AWYRas{x&i(;4iSbVz;8+F!m=l$-z?c1~<)f +zWUzO$cei|Zz7_t4@-Vp86dvA3Mp2vQU@3c7!L0dC-$chEJ}cs0cFx+lJox5=w<7zi +z@W2?6{yf;^lv`knA41j+vR@tGjE3k(1Nr7Am?vKQBWJGCSbwrEKP7Rj%Vk{=;#%fs +zrS@e9S)Uu&`mD*ju-S{ktg%_A-;3WYQjQG}U`-uh9WCqh*qT(<@KOf{7nswc^2L8B +zZ9^^&f0fSqVSz0+V_IW!z^IWSfb04%s2Om5q +zWnNxjyZ)lgf?4Q!$-9d%!20j02iP-BVSN+lUmiF^61Bx*e4XapQE=)4$IcS{AU4_q +z)LBWLVx#$~mws^Sb@uhBcL=YXx8vEfmRQ;T58xq%bsuG8b;wu>K3wSRb3P1j12Te_ +z{rKXMQ-PF!_eItw$V+ghd^gy|?EQL)PeW!VdQ`64ky{1np5>vQ;uq1mTzh?~tgk$W +zr4QuW-bzXNZ2Mn$C!)k*k44u3u`v+0-^*IFO*wn`2T!NK=cXH-HJ&APagMPRS+sLT +zF(wBOe%(Bg|CroCIixMdCRk{{4Zl(@1K#le9{d5ac&;?nUQHWiKPBV-jKk8-Mr7M! +zj&HsO+O6hbzvju>@tce7x503L@~#D5N6~fMP@i_}o8}*0qauHTpJ%W;WKDb#TQ$Ns`4GG91I|=UhTlf&e+Iij)~QL@ +zu+px6RT`JPvq3mAD#;{b$*<)#I +z6idgvB14~H{}nQnwjW}@UE1&EUCAc&W3qT4+Wy99h~x2z1JpZ;I{VV`cc+g!9I}wb +z1jhAL!fe8P!pVf!s>omEsK__7ROB0(Dsm`IMQ($(@GHE3=N5SO9mO_Oss1Ty$4b8c +z+XX3yfcIP+;)7YnR +z@|QaEIQJ1eT5QXAwM51ivXFlGI{D&s&#}{z?^^T%`6PW>G~Z^z`|vT|i>}y>e%ocL +zh&)#*c@7Mt(aw8~ghor0MrM@8pApLX>_dD#!)=R??{j_jKR7US%wv}we1JWY24o}S +z!azyz>)heeCK?Ib)69Pll%s#){N)l=TPll=NdwS)^~`9gNTu89NwKhRt(S +zE%Eb>tkHb5Ny2#DQw0xFzvz-mXq2KyJokGJOW!uICn1`;(yFUHk=jeyduh*^j+rtnXZiJzptZz +z;^oxDK5LAxrp*nmoLJ|_=#&=#zfBTqsuK`0L +z=*c-ho^eS>$Is?m!-?1&?DlOO@91^m{X9Nk>EqAiyHs>~RGtHT$Mvr>e_tX`)7~28 +z+q+iTUykzJk4-B)f3iQyGy2)(Irj_k{KGHEa~?MFXYnj&sxQH0*sy&uo@eqN`Y6vm +zQJ!CcXU>wJkU2&4)V@n(9Q6%i-^gB=$oTQk;MZgfMQyZWd1413WARB!9bU!|<7KXl +zpHfM?f7DQ1@Q$kS@G9f+b^OVt7WpK}&_BIdXEB%eC84qN;9 +z5oHHL#^KzlYR4ArG}X;F*(js#HpYcE%bu;L6P;o2|D^vp*0Hy7CU91We4(E;6tezk +zk#`>rox5GXwfIFGUCwuzWITr1m%?^D7RCoZPs06%Exzn9b9zfzmfe>aN^fIcmv5au +zmwttP1mD1utkIuZfsf%P6?x`X@_vbTN&B&3*~3*6@kO@qd>P+x2&5oi^pyFIzc3>~ +zy;6G6xXr(w@A~oGhbGoA_{h>KkLKai$bGehe2Vsn|FxKLvWB)8oa1Tx5^H$&mD-rU +z^DH&4ox1$&z5Sh}FG5$p^XHGZ(FPB)39~n#y1mU4lrJJS#AlXe?ismksOuZ*;&;QW +zL;vWR@Y1XFUkUqQa+c@5&!hPn{B$Fm&}C{az7hKrH03Y +zUYzfvUj;+5r}`La(vN&wq*?kfOun;>X~`P~1LiOcSjb6%0l~3gK=y~c-Bz;&-?ESK +zspaVZPbufTi{uJyB*v9}6Ff`ETCHUz*8?_*vo9Rm-#F=<)3z8tGLBWw74}qj-H^#z +zyk{>ycp00 +z*v$Lo9h&<-@)sH(?!*rgrqV@-a`_<1@wgV1?ozxbguJD=Ro*nfzz-^|$mOBH#9 +zwc5$Oo+9SbLfOCSW}aeCrUf7VERmb|B*aJVteKqkV^4G~F=(ea>ov}oRN!A13s9L^Ih!MEn|43)ct)WQe37q1>u?r6 +zM#f$d^N00%jxA-w&-l9JTwog^&;H-m^*wO>n4BlUe&#(BVakJxgDP}|9Y$w5*J)SU +z;Uy|^ocb1cGH?0_xxQg$riLc^3PpGNXiK14&BeELyv@&A%q#{g=zfnX%1ToBk8(O? +zt={%M#s+6-BA!IfJ7jfEj!QIv9=_5zoy@Km#>kr^t>i?5xQo+Bg%$xqe +z^L1AfFV9(9gkk85--LJNKPUW#;p_YG&)&?u@2iUoPF*ipn$S6)aVvXG6;s&rrr-Y= +zj6WYu`;a+t7wOXO@aY?x<=#M_ct7f&AO0Hc_82$uKuMX;qtd0m|D?Xd(00pDDiFU& +z0J`6&tYGRdqO?DxUZGp#@pXL&E;Gru318Dh{5?N|24fPNB4LtXA=s^0&iRVc3H?{` +zO$KN@Mf_7>>?!0WXYQr!SyzD0xEAwrzTQ2?3 +zmwq_=({L?&2!g>}o=?9S{C!qFp)Iz8;7!h(N&Ur?`{{@M<&q})Q1)rgGA?|7>Yw|a +zXgj;%RoW?g5^^p0M3)r(6?MNznOMKw2X;jMdt>sC!>r6}19GG99J$eEk(gU;sgs{p^V@_Y#vFIc(B_k +z^~qXFFfQXqG1uPXLH22(>_y<>2Ku7nLjT--VtXvfp)Yu!lrvt^UkAY^HuAii_;I#+u8h0k +z{a1qAWG_1p+0lQI7r-U5Zfp(Ylxtx)|3YkcM +zO8X@4fAbC)p&>YszK-bxA8q=O{3dNmLMEH(dnw=NNh(MN3$IbP$W6YRl{8+>6Iw@^ +zr?wI=xX+0C=Ii}~Hflj=x6I=={;jPG%llm9G;Cq_z_aXdQzet*YUlMa;l6y|zJ5hZi +z{0TkT8;|iL^Fom)Gxa!fpN0JA5{j&)kK}!pmmwp$znXiI*9^jI;_@VuNAy#yjP&I( +zu>Ban9Z{Tbk795*Cc2%zo6tFdz7ss4+cGzQTHfef6wQ0@c=B%hVtI>F$U72tx`)zq +z_6TnzZwznJ{^YoOX`8fFa2d<lC`_&FPW?RJSm;uXZ{}Z=f1C9kIo&7eUzE}^FuE)Z-X&A)HLR>;vDmv +zlutWg+?F<3t;^l4cDyr-Q*SEmCdE7-0Q+K(m$Ux&8@cDh(ECW<8}3mr{lLiC+{d`f +z^{O45IV*#Y^4t=&qnzvaGg`7`er_>SQ=8bQxEfoa|FqiiTlGkGG0!Vq;Qa%f;q+xsK0|qc2lrfp4KarWa!QMc*j=Mp9OMN`2T42IY;Zs?Z?b +zNK!?d;qR2W?<2;2B5AE+A5eFUXQ4IRmP(Aa8@uE-nfLn9FFEL_4`}-W&&1R~?fr#s +zm^n9DwEb(*whIsOx{0!{h+dI?5qm%Uo&LEW&?i?Qf1x*o2javxBQ&0l+9g*+dH4WX +z3lE~>TBu+2=A%4!6Pn-~(34V5>|Y)ZN|pVjDXif{_OUr!be&`8v(~wfvVHI~ur3~Q +z4&asOS}%GoI#t$M%vXH(EzDXp>@k~VJ&OI@c_ZiS4E8OaWS!~dTU&DWSk4}bkN$De +zWL;k&vYEm;FYGIKeHc4y{QZu-oSBXJ&}3~V>p5A&$$a=ec6kS5K=wFJUyXeqy3($t +zJqetvUO+!wEDrVD&i+%?{Rxxg*^1|yvh4%kQsatPCw`FkqeEF!esm~{ASd} +z1qs+Ot(=W+S2^h!$n=0peCa{X<5$t90|~8%{MZo0bvC589%|=Z)L&B>of4P8dmnzC +zao|vUvZ`+|6FT=%S5r6N@JsHykVQK@jIoo-vl)5wj)`5*O5b}ze9w>c2Gi5&$N%o6 +zCGLJ!<}%jbjz8YR87YIG;ulQIwVT+J^WHz1eYh*_@3AjsmV|ncT_?WEe`sU;J;}S! +z_hTm?F?o00THa%If8&`vPeL>P%W|Pr$@}<%2XgHgO^246YRkE@{n+d45`53@!_OkR +zRs0-hOumT^X0pE#(A25o6 +z&?$IQ*ZLlRpY^hw?}hGh;qRRI_%CuUocb-&8NW`vDf_N>TSNH{O|^H)IU(}J$~*hB +z-Inw0_UX&j@%8YU<+-A{*pqes2)s)jr-fFQ*J<-S(w_r+#cKRO`Z=dAo(n@Jci?}z +zN?q~Nk4i7I_kp!G_-O)b)9@FuW_{(PIqE#?)$&%;JYUJVw3E!NS5Z&a +z8jrk3HM75TpGb8-LVMCLT)7C^po@9aS!-w%EXBLD)fr2{tgD@K +zKn7=a;AOt_U2x^q1LL%kGvE$Qz7y9B&9klYJ(%zXqkVF3?n9UNmcX0&}=~R +z^tH%N&V}QL>hY0R<}}9PJmGbq{c5`VZkNpIoF|)Z2jErw$3fOFt#Z~8zoTDq<_kMf +z{I4@D+7PHy&N@wWp7eDr&he*`UQ*|aOo9)~!+AgKt8h?TixMw& +zRxl^ZyIJUya?UPxl_pF|_lJxfZSdYsnLKDaA!UcBTXAX8_M}Vb^zp?%f82=5SmLY; +zMZN0cy^mWLu5jcoeI@an+kaQ|j8l$0UbX32gFJHoo@X*k*uvhioZTKf#`m2*&)81v +zrzad*>MPI2Xa!9Fs~5;CKJlb?%GqX#|5Y^p!~0cBI%$&UBd#USe~@SS +zUyV!4r|wn!HuH0M5uA?H26fl7hNrv7n-F+bDet2(9;A$-tWqnVRk1emE(?i|Z@Y6( +z{h^GsA#xbrCdntf{};SVyEwn?wC!i`{X4FOcdh(@^h1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS +z1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfRS1hfSHzn4JC +z>nD4@@#Fr9xt6DQq~EVHmC`>g1C0TV0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT0gVBT +z0gZwG|6?Gm3VSnhe2-`5?0&q@li9g6IW29}N6XLb-&B2~b`~YT5{%%O?fAFW|uclO-xHWkUYM5pYnATcYAh($yclv?FbP1El+QMfB(c*rMjv; +zX=&}dcV6_V+*g&MJc_?DYFEF64?t6RFyKMKgHlFkTaK?QR~fZ|I6CcFzAnE~JGzN$ +zSH1|>c3Xlk5>EC-ELHsKKBd-M(0@7i28V94VF-EWFBe{{QSU5x>*|D#w`Yv%_}zlU +zj^7t2b-c48x#QOp&5k#6JslTr9o_N%ohcoE^rv=Q+&HG=Punl+_~@R?JJL%EdoS!& +zk>7Z7JKyjqJFRj3nX&i#&!lCK?X2BmrrlCID(zou>I#2;z!&*fqj14VpXzu_;@+2+j_c?NsmKb`_nlTl*<%fLyw50p_4|g(R4SC-LHNmizKC4+ +zd0JmRS)zJ#lxp!Ap`IsB_D_6`x>vlsxOW-9r<7s$t5N4ehARJ&@)a#L)ZAZt5Nckw?7|GU5ci3{|_C(!8j_+RxwBYCRoNV(SN7&F)GxO|bP +z<1Ny2k*TDqfP|BKjRX}rOBo~?34Pg2lk^EnWqww^z?aRnl0Jrf(uU8iDmz|4G^)=?OW$$TM7jpZ3UoQjUsTwZfd)#r;ds +zxU{9JBYln0ky&nbOt{?`p!Eti`?8 +zmfp~NS^MJN%jvTj{Ju-RWa3AcE$&STEbbLriL1?-$-ctg>HG?oEb6_9-xz*d`CXn? +z*gJ#YQSz-M9IY1irj#t|O)V?z9b*;tUdQk9_QKw=M+$peB@g$HyjSWJ273xV!DC~W6%lb3@3F_SvaC7wMi+gho--SNL(+dmCw3ROw +z_OAMQVeg~F@1|TLee%XUb8UXMuWNdNudBfHb=4D}WG35BlD}B+rP5w%RVnXU(1T{n +zj|$DYB8dlgHxe!_G-u8u{3F=9it8lR)RXkblNa7XUnHpm&h>A(z8ktfBH#1;-u6uH +zOs4Nq67>1xUZ3HA^=$d5G%H6n3wGZl{euJjPs}DA?7YjkFZZo6*H$EjdJ-5zCOY90 +zPex~{QpZK#NSP9_VxcEu`MXz}YtN>HdM?sN!_gnPm*ferGS`+|7V7zL$umZDOzx}8 +zq0>!%pP`-;KF7uJV67y7TBzrB@^_ChE`H)k>6E(PAzu>tLhxgz`64b~#jk$iNpsQ< +z+-#=(=2kO}ao=Oo=blemdpvz7FO(`zN-JZ$oA&KHPS|671%H)J6SPMAz%swl`Kn_qV`L`3u|A{YHbNOM`rHLJ@7(1K!jm}T%xQwxLd7!ZOvclw!v5cFU{Koo5 +zcg!O1=Rt)oROYWImNHi^>3HkvrOczt +zm`9g0kFH?uT*chEnz{2P=FTh^S8xqB~l8P3@H4Y+=T>&SlQ3sW6W +zxYnF0WA@jcQJrHYyvD4%jPSJ|)LjsrD0Ap?=G#%{4)lbQe|#w6;Hbl@TiM_Hr~W6N +zN`B!`b$|bJ7!;YWGp0kCzQO=w`WR^+!%sl@UzPY#$)TR7($p)VsXsoX#`qr3%~$U( +zVGOHpDO+egN&ZpLk^FsQb1(Wz3wza=(lfbZ)VqC2B^LuP^q0Q@ou9)qWB+)<)#ln? +zGfsuK1JHew>rc4e4Ifj~4ZXoNYtJ;HJ4&tR4;jj6UXq|*QEJMg)}B=hF1I +z2CWdH4#m&PWaQe3>{?`bMdj_WIPj +zwWQ_VzwhWrl2@7M!BKf`rYaO13IFmFeJS?yu36X5$*-!e+_`c3!lDgDb1Eu>O8!cB +z)@*6C7Fx4rE}T`kaQ4h=t<^iXShE*cvuDm)K>Eg-;I29TVBOA|4gRW{hKkB9)lRv4 +zY8p2w`L}&%qpI6d(de(Luh~^y@2{$8tWfTC!;Fghtuvr7W7ixBAhfljX500_OA1`K +znB*#dWko~v$Z7STmR1i_jqtW@=hhKQ#!`i_zoM$DzCo>8=U;V;f7zNj`O`-zuyLlp +zW?N%*ef`e5Mt?%s;V2SgN@Zy*HiLl$#usZ%f+5mv#qAFreaIY +zSE{SHw&?JbC@dX_j@X6L*Ksf=PrT3_IHXi +zcgMPj=gyLwmX-OJlsLk1+d6_y*;Kuy4hV@_8SI-FN75bn3~B$y`Z_@v5-szuD7*Fc +zwX@bu7s-yCICHw9q{yg&(UZTEi@L^of8%soBC+-UE$AK5nMtsX +zhPs-Dcp(T4)4*I&?to@cd|ppE3W9uerhof}!Oj#K@+avtg4?%l-M(#xlh^48WF(zE +zAc*omTPxUGwq}-y;?g8W&BzJ2tWzS1hQ^A-)sLe8&l~6LIkq+OY?`bzae7WRO>PqLok|7iw +zDC^vT@~N>o++i5l@x>p86VTPCav4b-hb)YeijDZMet_25V;ULy+sXRP3ro +zwUBi~MX(wTXVo-t?}#Er-Mn*4V@=(bYHMpn16dlZiu!7+qM@N?<2E!>L&er=tKkv~ +zDe9K((E>tjAbW-7P#s<(MLE&Z2k^w?T9?lct?Jx5v#DD<21rsR%gqIZ^+EiYNJ%)jK;+ixjnETY=uGb3Y$2!B#t>^23MR;den{>F~iQP>Ma%bD%DuCRd^gwY}@M^EH9NhoN#m9;^3BA +z|5k+TM7tag#8=hq8XheJ$|Z`-c2>K|16}LX>ZZ?#yQZ6W0&2AK?TBQ~Y^JmI)(k7Y +z9>t9x-7thZiTE@Q2h%R$(oGtf)2RG5*41oBjWo)L+bMcQ?gzy*&>)GQA^&KC!>&-R +zs;OtXl(|+!>6DexGSkf=REOorAG}9*u2{S3R{zpfW&T@l2NI$?M^0XK%k;rI2c`X4xIf*7(=ldZ$Z&q{Nl0R;-ND7mn+8ZrS2CC*Qe@QCfTZnl=7gZoOrh +zOXZ><0TUFOv?)+nIsM%p{s@PVwg{Tb`HCq;1)2dRG8zXZ= +zaH})_FikgB?{3UTivD%WmfT*p%r%*3FwNEmH`Ua|CYad0zj}ADx=sKlv$6BHv!cGS +zs&b=$d&8!xEu#6iH~1U22K~|M)rR`*Tm6+=X1fzsj8Kel<(4_K{Lb`6Q+L)uG?xFm +z#hb2=%~xwn%1Unbm#&#JYe;g;t_0zCEGt{LidM{04#nz<`Yrc5bT@3T-zvjtXI*rB +zsnO|E2jnKr5oH~L28FzBd!tpoyUwvk-KliL_MPOOwguU$ +zSj%K7CDY@!s!Ft6TzuU8!PGsY|h+0UAlXq)UC^xM@tQ`E3D*7YzqNSQ8{@ur*pfD3sQxj8@2NGO#lNuWl +zF3(AqPnfJc$*D2>NP0{ZQLIG+>LMB;svtgnxN2~gON*>|!{Ah3J7-Q&(Ttdp3N=@$Y(aS_tjB>V%xS^h +zSG)cBw^zC0m}po&&Aq>NsvBlaiH60Cial!Poa^R~DNY=nKHgh2wP5nqarkRsnbvSG +zQ?raKF+m!3Ze_lVHg3a~iiS=8EwlaXZ#aL!P1Qk`E)33lHq?+WxTOJs4vxv_*jII1 +z8NR`t{z^%#+UAJUKiHY1x|8vpC1tm;ibJ!4pJ`RsIzRjh+v~k4&X{#9E*W{tZ!Npo +z9ion{_1PUn^)vV}?uS$$+*L)%Dy=QEhcUktZM?m46N_5wo=w%;EV{k1 +zdaFxkz=bfaLF9vH1%1w{g{r3QMlTQV=NL|;pDTCbyJY_os&DuIS{R3?(IsnTYGLMxk6gEAEpCmQ +z*Df6%xpvK(p^;0MmdRu_Jl~RKvI6lB&3o&*C77S<;_`~mU}v4xuzhDeE3i-HQ4r=P +z#+4ntWX`b7(f!Td$@u3P#)$$K;NkhApse6F2E +z&lk;n`?}Jl%kGH!)jnGqH_t@w8yfGCb?p~qg(CMp+`B_Ro +zElUY#T!(-*Y#*T^PU1pK0{Yc8bmN;5mp6pZhuK^F~N_M%vn2?_@YT +z+AE%QNt@+gDodOJ%{JPNTryH*=}3_!mqyMUiRMiI2sCH=Ka}R$n{W5ueCtwi +zxrp5$nl_H%vYW(Evl=&5JNn5&>q$@6Z>^B!R=h?Q^(D#fEO!Z^5!Ifn^5Uu+$Q7^a +zF3mMe!Ht|@=A}G1(jPf`_Q=t5Mvk6)Y4k8fdMQuqmJZdPm*yy6bu&O3R8yDc7^){P +zO&?h~j+k$#M!YnOtG|b;!AoWDSiQ|3UH(Xkx(YHkj96qq +zO-8c|S!V^mv*CK+D7#0lIfdStwlhv`jF7*oewTlHRil4PogaIa0`6a!-45wl*|(C7 +z54V@yG%K1`HA3325VqvKk)OytzTBZ`ni$N|2k~j^qiM58D3=yZDF9#tabfnzy +zv}@zihS&EZ`Qyt`#gIRtC2^8R{$hBF#m8_cbR|x(Dsh5oiHpaZ#Ko{0qZ7kb>^_F8 +z7+t}TU_5p|(B%zIXS?9IZZTWt{tYaDtQ#E{AqA9w)Ro3u^I>6%zuB{A&zn7K_MF-C +zuA6b)%;- +zcrY4ykCV3RAqlDImC>xrXImS;{xBfBK>p`%@@x_Z|WCw@xs +z;4>$FDHYxG&5nO0c<7s5KXc0c^go;|zkJ)x@;21@lX1nV1<+n4{u-_~I$IZV&BjTs +z<1bssM#*w^v}JSK@hHx4+=|h|4X%?_ZIj7)%iw}bHrb+svcW1TsSj?NKli%r+qT?$ +zy|vcWsjLC5O3q_cS+cBVb9g-)F|1Os2})#Voc#x^%ysm|OtlTitiNV!#YXn4WQpir +z#yp}c#Qi58+g0U%7WMiKD4P?rtLgtA_TB_Ms_Oh7KWFaDWF{L~Nk{^j +zK!6ao5OxJgg2*CbNLbtx!Xn5PLf8arRB&mnqNR#8Roum@rBXpFaQRcdzEoIq!M*^PY3hb}zLp3sL!;OJj7wZF4MY +zV*1^>lH2d=R<>|8GvVRTcXeDBV7N?mci+jVWz7mc#IX9@vUbV*g67OtMZ`gA7G91_10*KsMlp=kr$ymuk22592TuxuwJ%zxM#-nxQHwbBQ)kr +ztXE}ql4v-7QvF110na#|xE)|vK(4cUe^EG4XUsmSBdY;%LCzH}j5F-ni!N#(VHEdF +znrgO76GH?OP*moU=2kH4+Z?w}HG9R9<=9kRjxfN&d_C9E=d~bVA}cZx>qurq7)e&P +z`JxI;*bTL9+Wj@_{_vB9OFX&l9+fM50;g~NZpQpWZ%@8=@b1s%RDXQH*1JTctu&zn +z9A{v-;)rE3+1!`<#5xdcKxb#^7A}(zjpl{V!WJ(6mY&m=)8H-kzm85LjbLAmcVCkC3A}UT5R%HAl|WzwqW7VL@phu7pt;iJhB6cSiE12 +zb>B$+#JYw#)zi`C;h2i)_RL-t;@O;l_!9e9V~^bR52M006Tdu~Aa=T~oMy4F5&Y)W +z*jQe$QdVTSA0m0X>(L+^nsJM>M4(ATk{h>BP_aDQF(6|1JKWZgh{^M4SmnZw=nQNb +zevP0NY)fCQOLQ~D%AL1pk=gxVWmLO6EDcyOGqU7~0~~ha22pyG1?%078YnK?G;y>u +z8tf?{)iOW&M8Zjq*%K#Ds;}qPYzMe(=g(+3p?a#dud_^?-s-4cOoXXFEb(H!H@d6i +z?&pXvu;|D_z*zlYnI@Hw-*vXi;%vKo!u1u!f=6O8$xVZ2XU!7jdQNzUA*|HNiea`eV2PmG#0Aa(j +zwX%gR7*l7MhQ|FmV2SfxzpZXw(6D^T*)4MDhEIL#PdZO=w2~K&xAc +zgHbDF&A@O5GNm6ENmMVPnV9zKI;lg2L}Ma;r>}Fp$rBnIGHzvb!u}?nS3K`zbw=M4 +z-MMtV72Q~vjh@x+#i9YS>)C+E(xR27ju1;2o?JI;(($no7kwV7o`DT32-b+Oi=5~AEap3KfGscP-P~TVa-H;ktqaY5I$L_Q +zH;xUC+`*1{FhryQ;6y8{lw)lxC$bW!8Ks3L8?6z&3mWXh#MK3DHeQ#G+xTu{5Szc= +zj9NJ;&>&|4WeHWzzjS`AC{{y4mlt!#kj@>Rdl3Y4nt2HZ+!mQ8Z*&u;bw!fLy>qvo|hQQxbf-^LXpP_mZ>M4 +z+9193^r)hno;ssm +zog+2h)y6biMO+1_|ASd3dB#nA;D?nstq?mNV)rUrTNaw(Vi&b-oz{7*7c1!U@nnlJ +z5?_eHiHSDZ+T)o3g5-*aQ$!O_BX5us3$07$FOA|^I1e$f(8ZIyT^kjC22U!5Wvho8 +zfc;@R;z8-f82Yc^L=>~*agiDxcRm%T-zJ_Yhj`F$*Q*jM(P+Vw=Qws$W`Ki_6Fz+9 +z;`HSU(Y{tTw=Tq4(AM>Flb+@ULj~;q*r7Ls8f=+Sqa(vuSv9*ru!xR`qfBw4v7rS+ +zc$A?!D-!0YW%h^|%lgIBpb=1`c#z9Rjv}{jV2Ov5w%D>jY~~+5_<#esC)duJG%13E +z+-sLCz^t=r0~W@nir;P1bSnhE>Zmf)iapgR=0y#MU6RYlywtiLXkwbU%mT+un +zmKZHF8H72WSqxgK8mUxt**u4b2a?p}{~=ZV?0U}h{x_tYV0N(E9XoV3K86?TOX)OR +z)^8mf4P_Y8Yb2>hwSSGFzvlF+72Sq_e5<;W>$q6`b +z3qg>-vZ)oPJt2G%p91JL0Fz~0EY^+hy9Ot>mc$>?iV@D6k401*mE!8}*WvOFsTSuy5jIXw;J8m5VNez2TT_rt|7aJY|%T!4%tTM9@Ei1vRjOoH4mq~ +zP&2fk!_r>NK0cRQ@NNaC8#t?eI$vbq21K)|O|E~h?|bh0Gvg*XvsyM#4m`*n*~;r6 +zsUvM1>BKcHd-27zcEmgte}0oyU$@)EWPc6pBO`mEVY_i_nNOB0d(Peyv}M +z^IFDDvc&q$9W^yBXyoCwAo9)JG>M0RF=xS}C|ZB4lQ>V-*VfmW%Hhd6?pxhu|1+ue +zHaA{=%W*$fQgd+URk2=G*Vj*~o5fR;k#T(&9ET|{my6|cu*c=t|GHtn%)#E(6x>Iu +zF`fQ%@#24f7p0Dec24iZi&%;OO;Zo4bf1Cd>U3WraC+jekN%@RO)t|cbc=pQKP!|k +z>nz`kx&nJ*BSwxIJ!UN4v|X@p(bXxa|&lwv#M*RPiinPOW>tIPIU|ddYsM()u+ffbUokF +zZRM+btB1y=W8Ey833m#=^4BGY`XSFj_m$0@lt`Wy_ZjKF);>jzn`1#vzH3 +z41&Rts18vWI<+W1bdWb#q(`&`Mu*kh|H5No0p-H6v3&D9wVXZV>Q+4E`80yS3R^!i +zaHV_DV;Lu7Sh>P|i%fwK^@)BDlMePGumfv<><6*BUd=<0+)Hd2F{WYG$ql21i!BwM +zYRz5jkE=b-9l%LkBz)>?`Px?f)YB$KUv(}UhSS>ej^%2;j~abhw_aX9#hVjTvCAX2 +zxGzVS4Ns)N>(a6hz!z5IDX;=Mp9c_DFX37!4Qilk8nAgF`=(L9*vPZ)!a5!Uv0*um +z*<#&asTCNxnWNA4`EMqgvWhHQ1u&GCfI0lK3nCpBJ5dfc7_S;5nZa9REvv<3wX8BO +z^UV?QW*}Zy!KtH$=LKq2E8O-x-)Or;q)=aN#s5(8b`ELAmJx!Yu|txfWBIUu%V(L95yEbcIiJIny)HMN=q-n=o1B`vE=0xvy9 +zH5sPn#RbVcQD&H$zZ%m)6DyosqV9~;VanCRq)fe9t-&gqGFAbpc?sG98MvtmlWJKB +zXoXq;iP+3vh}WK$EL!a*(d`J$@+kE@6q=Y~%80eoDp$bTCQCIRZzyA)y-Wm{45G%( +zt&J~2Ca!3yA;P;;&3NC*swMVgztA=vRa-q{Do-5CfdD)M)(@|cC%u{-eKls1`|g)T +z8F99 +zArqH=`I6OW#P&t;dh`=MpP8rR6`FNw_AR_3#Rl%jN1%8;T4Bn!{@&#GK5Kp}CrGjC +zUDc7^|DjuMeh1s~_V-QREw9+yt(qJTbvGx2O7Ue6UgPX|1Zlw>Ax($&wp9I^Iw+#k9YsO@%Ov`viw{A%kqyN@4WcM +zMs>IszH#{1^G|#J)sxk~cPu(G>(vJJ@5tFlW^Mcr>*vaUfpLg$E|%bLe^Tbo1D8}C +z{*d1b!}l~B@Quj9Lylg{Z)8>Bn^CWv30!VJ-{|G7tIefIbN +zZ2NTO&-xnw-!nK?|7Uyy|1bQ8{&(e%_!{}&jgvp_8_1vZ4dveg{}$t0Utjk3b@k_! +zdmivS;CaCFfad|v1D*%|&pps`6f1uCTYprw;ZJSApLxfvD_(qe>O2(iovkwb;ybkR +z$F%!*5b0d}b#;-Rf28jX1mg0KY4`8z=qdj;yvKx3B}HXYcCGy*93s5S^ML08&jX$Z +zJP&vt@I2so!1I9T0nY=T2RsjW9`HQidBF34=K;?Ho(DV+cpmUP;CaCFfad|v1D*#w +z4|pE%Jm7i2^ML08&jX$ZJP&vt@I2so!1I9T0nY=T2RsjW9`HQidBF34=K;?Ho(DV+ +zcpmUP;CaCFfad|v1D*#w4|pE%Jm7i2^ML08&jX$ZJP&vt@I2so!1I9T0nY=T2RsjW +z9`HQidBF34=K;?Ho(DV+cpmUP;CaCFfad|v1D*#w4|pE%Jm7i2^ML08&jX$ZJP&vt +z@I2so!1I9T0nY=T2RsjW9`HQidBF34=K;?Ho(DV+cpmUP;CaCFfad|v1D*#w4|pE% +zJm7i2^ML08&jX$ZJP&vt@I2so!1I9T0nY=T2RsjW9`HQidBF34=K;?Ho(DV+cpmUP +z;CaCFfad|v1D*%|AM(Jipi;kry?gB6SD8*6_xdLIF7AKw_lvi7pAdRL9n^cb(3xNqKIzhHAs>Iy-?rX$zJkUwW9OgyPm7#b2rm7m +z^#r}P^tmVYnbu=*a#cZN_SD_Ivz(O0*)^X(*F3p+YVoumy`{?Tc29$&96=M~_Zu1nvU-WvHgf5%@ZwMj`~7CQnyu +zCu^lu2(T)oQ}KH|ey89MV8^F?p#R|L<-RMy_sYrt$++=&dmivS;CaCFfad|v1D*#w +z4|pE%Jm7iY|1}Rp_8lcPtk +z{Q&8Y@LR01mp1v-iA$84^&04UtL&8OO}T{=RL)Z8=+Rjp)K`PH>hO_`PuxkKI@GpL +zRc)`E_vT~ot8p2_BT79?IQ*Pdia$&&Gi&(U+N<6fr)KIZHM1u2M8O4-Jq3MKTV1u% +z@1xh(7CCXRch%|VV>kHfV?fK_p@4NhtZ2aZU-oU5+uQ|T*4^q@&>ii~juF`FF +zPvh5z@)G>*ce2a(Tlf{7@EPbM2Gk9$Q|JO4D*Kf|L8hfi!BWnDuV||J>LZ1TmauYInlh8;N3es6_TgTeVC?Dd_ +z!C!B*(?0k!cBNI)UpcBcYriivN}-&15tI`Tt2hrU6|StJ3?CMGR<-Z*MRwHfN4xX^ +z*7n!$?^7Q=_Wp(V_2F0WTZ36jB}HjKn^TgmMyTdQ+AWrLOP93we|~i2^Qmoh0no1w +zs#PkeX0;*z`!9}O+qMvWj+GZVT0DxpU%Mz&DSG)YsG}d+3N{OlM!p375@FG_KQ0}L +zOQ*)AGmy@KU&m!+v0u_T>fs9tptA~Hr6Idm>32(x9G#_lx9!vTqdtU-57u|fV!zcI +zR3m6Z5^PYaEvv%XvIBKUTiV5ztsQNFk2~A4?LS}(>aLS5TVadQC(#z@U&p?m{if~T +z_rj-F^+w-#z)>T7zDxJ@Nv(RAalp24A@WT3$*6jmd7oqR@Tru$`FxY_T~zh3?tSS# +z%I(d%QdMIopik9W&C=gST;h*q4qKrE{L_UF3VzVO_I>gU98*13&FWsSGJ=(ifwofUUC~yz18qi+ +z+0nu{R5!Qn+s!J0?c7uO@c3Z*rBsHo4WgBbyWo~-BZ)Veh^2`YGD)Q%oVwHE!jsV9J1?Bsl +z-13_zsKa+6?i-z|hcBur$-H?&)#1%G12R=>_pB{7!!ni1t88@C!;!`vSz-T{x(k4p +zthUs_m&pqKs%k7KZ$o*N#6Vl!V*Fl$KeZ`Te>;9d=k=<8N~w`=ZR%Bj34ZtBcY-Qj +z`dZSB1s5P6RN>@TRq|5WQH}iWBSS~AZN3cuG`?S+dBMLfk^bYfB$e5a4PPEUI;#Yk-he+wV)lUWG+K6L_jZMv^d=6u+DzSCpr0kN}C?7Zbzb@(>ex*WFNMjJ2m +zW!`dZ)!~aTOwPRI!mP|oFD%I10iMYhZmvsd+gwNcX*=|Kc>k+6irsBTA8Rpo=U1w# +zLa}=uXxi}i4E2G{?=Y`bxlc=9U9Qkqsfy{(x52jFDml49r7T5y*8W3BN0xlif7Gw= +z9CPj52peh7bAYjKXw#;fOEV`!=PLMpfv<07U(^HbqkdKJ`=^foF523J{+KkcIfdo7 +zjE1eS_g2_D479hx-iz<^W!?sRFS#!{^On(7hcCS^E0cO(c3(keO7-Tt)GFE>gw08n +z(C^_k$iq&8tz%;=pX+<@_jml&z*YqttF^vsFn&wUnDcx&^t}mo?$GKkg?usU`R}M_ +zjNL|7sg&eml`6I;|NH33n~xNay0{D5e+Sryh|M-1 +zVDsY`PsPXa$4Bri0-Y1tT*o+8t?96*TP1n04(Gw9{WqFAyZ|`ZWs&%0e2cxX$**+s +zjmlZth&pOKnm6i9=+lN6Wc*dZF9(Vu4rNKBp!44BGxF={%TbMOStCbOkG;{CyYy!C +zbr+y-Ecp=Qa21*<_N(rQ%k1(9WbAix%C{rNcOb@S^9S$)Z9@Mn&v=<1!8Uh(q?G<` +zjbF`d@T*~+8Y!Pxre@RQIbsK%f3$jX(2M;58l? +zlX=sh=MeAVdGC+O-0{~rs9W`Lqi<~H%?IYlyrOB}v6*c?)D`;KHt?!~uBMHKDyx9| +z*m2H_yHVbB_1Mh$H;>JH<04h5F!tRI-2FnQDyc)`g<~_5Kzls?7UAy>jGs5RsjM4S +zU}-gcut=%VrGUTwMbfB7-x&5m2M;8{wzh(+)G6z({wegOJ&n^=U)_{Kc<-z3r47Ci +zarYWnx!~R@@QgTkf=hq%T9-EpKAq4cI#9@c`oOeaN{WST(lMrz-he+jC9T*zAn& +z6*T&aCC@bHx<|od_vc4PL)O0S7)R`ZyidUAF`r&~05QJ163=!#)8~Od=fQ_RJ9_PY +zC$Ic9_8FfY9l7JQ{Od8t5q%){s?p&0FUY-*+o`*xHvrqHLToXQ=g>fxKVS3TStZMTo=g*ls3-jJhKHDXNs +ztAC>1FE2vdPOaRLuOE)mvhP}-oz*3+GPL11nRa}N(DW|P1D*#w4|pE%Jm7i2^ML08 +z&jX$ZJP&vt@I2so!1I9T0nY=T2RsjW9`HQidBF34=K;?Ho(DV+cpmUP;CaCFfad|v +z1D*#w4|pE%Jm7i2^ML08&jX$ZJP&vt@I3JU4-c$|nt1mQS4iVUH>L5mid?=5{0zXK +z!&^_~58*Xc;OfvyA6~=?Bdzsx+{4a8DTYI^2eLwkw+0MdwhH`7FxLv^4i|GKvZ`M< +z%EsHCuIzj8_J%8;2)xSh=hMN(5b8|kt@2obgcc#=^93TH@%fV8LeB3GELqX2oOu8_ +zqne23Pr53EpHQH5C16DkZYOVKK`7~R6gcAuIkj0J{$0rU{Qkq_Xsq=aYn`d&K8hZ3 +z=A+bKHJ8cbfbXAiA(DY^BprW0p>N_Ae119ek0Gg&wt(0-#tDPaz{e0CY@I_eNmSBO +zl9xJzq9~;?l+v9<3B83fJ&;B%)=1*QD{bb})RwzA~ +zw3p&9^*6Y+S|+CEKshAs&j9le!umjEJ(2|O6%!UjnGrUU!rCEQgbDh)$Whp6(v|{K +zgt<(j!p4ZOwJ3+M^)OyfAc1?ugsldO5jKIs#sF1>3Hl|-QCKx;@nYMT2&)lcSt2}i +zI~eMzT?@mzNmkfY3VQ(*B23Wx;7xN1JCU?!Ak(#F(?!_5D2HVy!yCH3YhforUt?K4 +zg*D^bi6TtUA4879W|Q_1GF=OsBf_Rh!wek;sy?%8VUI+Gok?M-2z?PI=%*t`VGX3+ +zhD_JO8b#QfD2HVa`5^4 +ztFde&h3x``SSIL4k)yElNINF&%Y=PPgnb+35H^LDZRuLrim0$H6gEBG3KR6}k)yCn +zNc#dZU0Zgk2xC91RQmUP5O(#ZPQAywQ9)Nz(A&TktF9(*yoac|t(~_Fl+5ZnO5Mif +zX(&l$XLo60SMvRgBZ8XtK7Q_&x=MeFmbP#0Bz!S~+qkry!YAXUO%dKs5pBpB;gU7N +zZ(zy8C=uc9iNbG;7oL&@T$Mi42jREh+DZ5uQQ@~!`0cGQk~PBbWJ!Lu +z6}~G`_|ACY=Ku}Df51*)7n8hV!PJCiYb@VI;Q^G0@Ld#f9CAjuWR39qSh5Z!VmZ=s +zNxz1a{%O4Mr$tcu<#hWa7Bf!xt5M;PQ1}A8LMp-^p@<(MXM{`E2!E6%e?Ups!haDj +zysSGVrZ1!APcq3%6vD4=KLdS;vHVF2e*)Md{7H)V962LgvPSs-uw*2L23-sPb-eIP +zWCW4^sSl!_1({qi;eUz>f0n{~=Ud^=QpD-V8R3#O!uPUd8%nws{#?B9H-QGrpQGh3 +zJ!Hc}S^&VheGYm*WBE%IegOtdV);uH@d$E8xMYp+KeOZml!)-%i2?U=yl{SK2f}Y; +zoga9rQ?x%H6@Gxi?*_IAKR^+0AZLV2)(C%{CA|u*@D~z=zY#CI8E6om<%96|nB*06 +zdo8+hWBGd&o>F9mzef?rBWHw5)(HP6OU^?{*KYq;yzt)x4c+O_X!#-1xmTG@==P_g +z3LK&W=k&A+2>LC^WnREa`;^rGV)hvyvY#GwTu+UXxX~f`9RlZ>zTfb0MEIM +zl=#nHW9+YPZ^SbvR|aNEQ|e-H>dujw(q#N=Wb;I%~ +zaNlO!MK%J%Tzp!@)Pi;xVduP!G9A*d*ouqkbttM=Nc4ITf<&*7$jyzodL>J~m3h%C +zMe?s9pZ}rdO1)n0q*sp5xT8zGUZ86;w2LDTUIkG53M7rcGDI(biPbAZ$y_$y2D +zYmx5}v6A>0>*#@OT^AY#PlS#Zl)@Wn&`9TL7e6NT^{CW5k@|ouHBY4cGb*)*WBQU|?6%8kexTO*QxiBerId~kiGRDP>U +z_w7RJ-l){RA~mm%mD*RN)FNx7_Lux+$Va8}iS?CIPjMiX@sMci2^gUmTL+2Mr(CIn +zM2bfB7^y=fe+=?bseDv@rPQOel^<|Ql=^5?>Tr>|0c^#?!$rz{QK=&(|8BfgKBK-$ +zYQeFTdW?4CAlB0vJC6~G<$aYZWP3lx*g3O%bITGpHy?#XoE46-vE;WF=y5uO(^_5E +zGuN2)5T3h!ejweQDGviKpK}LIxe($r67EbH^VUT`?l?Vm%=Fkl4>W;Mb3xN_dhF-) +zIB;?^3(WM`&*^dC)P;cf_o8_PPGiy+`tq5wpVQ-D)pSzy0&#GX5Oby+oUsnjKxi-S +z!JCP&4=j^jxsb`X5YVCb-xY*^BA(=Pri)!pE4au9)l_leMX$J!Eb$3#yjFNxy&mPC%WXAfL)fzu!#y(>Uq(k8xgz!e!E* +z%1OU}3`tbVDbP1OfUF%>V=A8$;Q?Y-+8n0GIN9K0;6k3xfp~ZfNmR;1tnS)q|3HX=k{F_p)&QYXrUsKCx)w5d+UCqMgM?_Sq<- +zohGZYy3=#T+Bx6SSa`-4gc}CV^_Irvw}bLa3_lJ)$j@X|#!%|e+mtdKs*ujFwza^hbHm@O5Z|R*lF$tVYqrQ3SUUAAyNv +z2iL6$tevezw*maI;lhTuD*;0{tRt7#QM9t%kVLzoRIr^dsDL(W|(pmZ5g(U>DyNysQSIOf^eVe6B7fh9h9 +zgX|b2iOAL`f=Hhb(fTAmk?*d))J)fkUWujQfqmJ>=vt8Xnq}R|&S5u{k#_Dj!-URZ +zx5a%PxV>Jtnb(ndT?p%Sh3e-8{Ho^%Ln(WvxK2HD~fP=J?iACFmA_kL2y +z4xzLh{R0O?`loz0T#T&r4<`XF>|E;h57ILxSgjwv3e#h$li!0(Y~PiDW9x+Fs1rUD +z-cG>Kzu+XhAQ3FROz(jt>(ypS=(7)jEIxBp>*%vyIYDEopNmeg0l1j>s$LZqo(uSZ +zD4ZUvP$jeC3at~Rm!%V=m(5Z^`Ym@P8m9hJqeVYN?QrS#doXD*PW=;|I%%Nm)R*bh +zJD7c+J>e@X{TSK)8Hh>!7iPPOzsVu&?05Z5Pd(+D0wiAg!28glAQ3E{>M@8IJvcr) +zm`L{T0T`PWB!UY$#~f$KIC4AGiEIYQiY`Y{1F?E=825Q1(g$0}I}u!X2XJX7$T-CF +zC)r9N1eZR17kU2zMc0vc*{_ibB_e&=NsB1(qtwaW$wo9d0gm!|4Qb;qU}aU*gh +znxtu81J7ow$kV4-&W}=QT)O=ZEQbz~UMo+t(fkvN4wi1Khs>F4huD7WXFv=)FWD{Q +z0c=OR6ZI_C$6~vpAQ3JN=|(Vu3)qnMC(`xSt4Ws#mzMOnp<_#WyEEN&pp&Nb2GIs^ +zrtn@ORzLk5xhKL4w*t9%sA$E=_^>nGC*;n^s3DpJ$Du^5ay=BDDM*A%aGYnjGdQqR +zKuK6PFc-dGJ{xor96N|6HSbTv8mfEUX(h7euLFtHyju?)Yko+Mr9Xi+FFh@*O?ujF +z6=YoxeU;Dj +zWiDJQKc|AA0i3M4ms_qU=;kiz?gsK`L&u4ndqwF^(06u8$Gxr7gsz`UL)VGhTtEl6 +z73(@D`8bW|Q`p(*P9Ti;Xt#K;mkQE1LpMUao+Zw4eLcl8)$OlfSz6rn9ui?^hkfRV +zyNVKPc8)$9SOtl2ao2eEo2&8RR#lJ)FQmJ67_;57sM)S2oz0%prPSBf_|(9=!x%IM;Rz^VdX$Ai&}|rcl$rF~*^+;P`OolVu=(Ojx5rs5 +zJ|`*lHgj=l%`dR+(IdN9HO#jSIC<4-{T@<52;&PDtA#Nhh2fI?RHqnuWu +zG}nYw7p31p>0l`ps%Q}22Ds&9f{XTvm-AJSKCIlvK~Nc&0$}!4CeSNa5-96ZVJBpP +z!xsUVJpLvSg?5olO^ +zns>vi$o4rVXEMp%)oORqGgk%EQKqrI9_#O6h4OVWOKZV>{QCxX#2hz +z=e8(HO$?=mTvd1$P@KO}9cK^GxCG(+%}5vo>CW5E>rwdIgr{;b)_I#GD%>6Q=lny+ +z74$LW|1jiLEPLPK%9w$_A0vNX$Wz`W%3qxmq9}ijq5RdL*dt;~h$5~jC5kb#^nOv| +zm$YFw(H%O)2-|Ix_z5Na%DFQN|5Z%FuSlZ8`$_)uCxPMcX2^do +z=Pef{JVa2!Es)^ZZb1J2rvR`mY0X0lth{=9|%v896E`CsCbM#}-9u&qY +z&r+|?o%vDt=P~lng*?3t^av|RPSG_Z*If?XNLJTTsvN1?iIQwKflY~0$K?e9kwm_P-t8EF-elXbsGF8>1ZtET%3MZRN1qp% +z{qO?2AD(+RJ$&M3t72^1c?D`)CHpb(LH5{1-_c4f|B_Az7&+bu`R +zTnt{2ixmMYw&+n?$~uf`WVXU{S1>~6x+pP~^3l&5mF7~V0}vxB&85(4;2D)pWp)R% +z;)c_hO&bf9UWilavrZ~~_!TO3`#DvbPfqTYV-vc4OH{4-RI37_L@hzT7CA=5LelO< +zM&i(A;yzXMB8kIp$FLyxMaJQBSD%<5ANo0C|8fd?8Q3CdIe8B{){R5SnmAm^l7%Rd +zI8@xg#1)m=93O|b0u6D<$E;r0wWU9dDzJ_UOc@7}Y;l6FXZDnc*g)FADs^(fjlHA- +z&Ltq59lCoVe);4UIJLx<^2vn +zf#$ZhO*fhO>nmpIDny2{^h#R#S7;!XUP)W> +zk8>@(irJaS8cVN^TIzD#MN6;l32tI3`G}=C2@zr|U@KTzOJx%r8P@>4%~(1!(b7aj +z*V36CEbYdzo4%e3x>qdTQ{e?;?e(*k +z<9;9b-*q#%iCW|%YE>jwf>Enq6&R>&1*$O#82awKJTj}xOT|xIxFsSwA0~ub!HwXV +zyN%)Y)2dFE?#IHXseqr-()m@^(w{aV_e122r4KOs2V{+<4>Bv3x*Rjm%j*X(2RE^l +ze8ke}33fQf(%fn=FqY0rz|apFOJ^opnuzFH8VxsN=^eE6u`?{!Sg7$Zld<$MT3QDU +zq)s2BEtex_EZxKGuaJ#!gy^!7)xjt7jsZx|EE$R)Y3qvcXY$SjSl5-*Nog);Q~LR4t3Yj( +zbyGUbl=ZvkY33DR*oT|QEr5reLv~4`m;={VOWaKPf0~j8oi+eW5~;gQiPk+XjmJNc +z!b-{E)&vaw$`vk`O~4W^i8zkoa=+oik@4M~xEuhNyml19Emz^^Ju>4sD-qTCwRO0R +zvr3PTYPKtp=d1nTfIQmgv@E+(G)u&B9?#=YQP*KS}54~bpY$sD(y8Y)Fa08G1=tCt?W*o$2@I;V4+=TK=nU$daltI0R +zS)L2hpM8w%r^x14FGThTC$qy(Kvq_?zaZ^7$o2}eQ#i^AP5)cj=POMT`gV^AO5%Cc_n+6(=G&zsTV~3p5?&7?zZ|EUtW81+NA% +z0x9z%6&lkw6e+z(h4+?*5B4olJ$yhJYqubh`r +zMkW$_iAdoJ=^Rq0lBn<@%VIg2&t;(H)L;wlGku#I*=WK?RpBcZ=ThMOq$AEI-~=<< +zF1T>>dQ5FnOikQknxf06893NtR4EQjaISOsa)FtsUPo(FF=};w(1cWS&e=e?o|Qj{ +zJz*gbNn;u+bK+0zM3O~0*S++3onxhb4n$tMohyFEpX0@!XTj8g;=kj>pJ~&OzkxA3 +zL33qgCG(nrS0&}IA#eO&Bl-Fhk)Dzyp6;bCjNrNok&y=ZP*dy +zvbmn~dV)~rhMemF7TPP2_^rrMg_l}9#`6`BApNJSe#e+D++}fp3EaC4Zfp)&xZ9R; +zcKn;f(#of7Dd(|;uH`R)(WeQhCQ^EQXz~AL11UOJHIYC!OC%JkAnUq(B7#LP(;2C- +z4c7v>1JwR>E^1b~qh%5aM`5_B*%eZ=O(((KTy-h3qm2PX+DAL+L%k7}BwDM_ah +z)$3p@t;&_1(5mEcJ%~7M_9aGpVW}0!$yX$?w9>VJbD$no7M0TkRz$4H$iru(*@s{+ +zAKDLj<_33~lp6Ux=pUZW9$r?JLrpB=O^xJBIpKPC>Ya-C%1n3`yM#_ftmSY68+oiq +zjpXU?@FKSB7}SUv^#V0$jDhi98G_2M-bD1+9e_$02U4{I{fK)NcZ285d(K~bdfWN3 +z)7wt`>Fuvt;FojS{wnsLa!%Vn38NXT#Qzxg;N`d_nd8MbAn81dTL`CGZ)Z-0?}7Hd +zK3aS-rZ^?KTNh7I0Eqj@CpY^%B%(bbI=0WWa}StJ(0Su3~S2 +z3eudyXK8QSqc#>|)w>#cAut%U*S$%f0I0E8iso_o|cL*9eI&_o~g? +zM@b)E2?TljDCwgY=?r=MDCuLS&D%#wpEMzD-abl_7fa3CM@ffCYTiCd`jlz&_EFMj +z#5ZprC4J5p#m(DCNk={goNpiTSay&|W|Q2hN4+I|!O5Q8l9iW`9C_);c@|)K3CS5R +z`lW0`?ddBY1G!FNZ$7_yjm@WDlLp{b_oFEN`dD%vlkyb+)s36xPK`4JgodeXn#&tZ +zj@dMq*NJ>rP(5cF(YSHyyFz4l +z-jUc$+w;)f=gKn9#En4UiGl97TCC%texBQL<~Puhv)nRd6BF}k^=^LL}im7)a&sWw9k +z@Q^0m?JjJapaIf86%}8&q-7Nf8Kw82269IW?)}KJQ%aY5y_2Oy&w_uM5Q14eT7YqXe;pl1Bg3{f6HIPCu- +zkBenkk#NQB1wwgeggjXV>%Psh;n9_N7G|iC|2QM;fgKhJ8M*Mi7BDn5{s8OrSUhmM +z-)*rtBkqD#53+j1McNc)H3J=#VI|+NxCE?B@JRL@WKHlqN +zs-LKR2ulo>-4?&p$`tIz(@-UeB@!%uM2Q4T+Uaq@Qp#X?-Etb|YQMWbgN1JI$zVAJ +z6cR93AkixkTY~2xO3D~KZYe(*q%ZH!z!5$S93n~JRG$Hxh>;L1MGTgr3^)Th46HJQj%sHHjv7WO}3p(nnQ!K%#mcyBg!hr2T?S6+gl}7 +zq@(f&P6AjDp~IHXYet^QFkjrzgYmRb;YS$$Lx`1(m;Q$`p;AI4fR)O0+BmcZJ)_Jv +zvX@wlOSh*(x%4pk%%E0%&cygfB%DkMKSwq_!qQqwsW{6Hpn8D{yN1~|#;J3&WnIfC +zKJyI_XYnP~y&%aZEGHegq6Q>-AW_FeDH6{kk-Oj0nxOB#*k*@o)sJe3LNxZ33oNc)?#lzXpw9&H)ch>?SMZ9X0JJ!EBU__3H4 +z%CV+#Y_Q4l+Dg+_ZU;i)Zvl3)cH{orM%;@2h}-2B%}@fh^%p?x`4)^hiemn)?!yQqiQRiIL-dT|oNs~>|e +z>||VJgcQF*WBb#du#@TntBF}Ak?-VNV1$Rg19MA3SHfFwM147aQ?CVWAI@Hbf +zgVQlU^$&iUngn+O?jLd~lA+*zOb=x`RV4{1M121$!YjCd5R%R_d;yZlmxGHQG{#op +zqX6;J?dPKEQ}}9@9z-62Ca~kw=-Yr}vCxJ|+PNcvF`O7PfswX|1d`?KC#^A>eH_{J +zT~-P^yl!l_E}L$Ag#XO)goV_Mf-=uVBB;VtCTkX%O$9(M_mQjHUqoTbGAX1UZ$J_{ +zcyqmhA4p2Vl2h{APA_mdyC1mJeP}hAW$`e3f=($LF=EkmO!k^@?OlpY*r~O;rH{#m +zG+a>=+>#C^bmJ&wZa0oXK8;!x3UPE4{ynJ0KynrXlU4Y1q;pm_uU5JrrDMO-hHow- +zG%&vVpFw4Aj8I7_H5sUW)zU2*p?OF$LYqUl*^3`h{lELP``Tdbyp}I<8yG|@ByIzP +zU!{5yw}BxNlM=Uqp-dxgO_&m2;x +z)@ENrHfy~l;z25Wya!#Ytx~Xkgp@Td#*`>qKA&=g?WDN?7A(NCPuNajb}_QuH(Rz7 +zfSPxw&CouTFYz;gAs-XggYh01F#^~HyrJ#$7*`>&ivA5Xg4JZLxDt#1v6^N(yYp=* +z?TQPf)AHf|ratHaeS^LQB4-urWAHXIaPDJz$X!T=oLNi{B|O8~&U6Lg`OXPU4`Vvw +z%xAiiIAzNJUHtGbz?%x1j{_xzC?rI5ft$jl&<_9z-%Rr11CUH!hNK=Wl*saGHb1B+ +z9*R%-O?MaJCvc&3W0L@nt&*o%eANseq{nZ{q_bzbG#6mGx*Z2P9+S%8ElXvF&^+Nb +z^J(5JO3S{7>WtcLtAJ+PV%=lkMg-@k+ +zV;4ae4sf+(uSZslCtBE9Z2g_KJ<)i#B++=0T}|2b;w{`_vX60G!|N&g2xXrwxXd=3 +zZDmgb+W*!Mq!mA;sVs_1K8yU%>bfF+9@R$>_P7cV{=ZN_1m?`_1A$BTT8DAQ%uBZ) +zi#RgRwWUnR91&^sgXtXCbs(!Cszj-Mg3U+KP>1@blKLTL{65(f%Ft^*8;!P!Qg>lkO}))9yr~SUKx} +zne-QONEm&Q@fpYU)= +z`rwCvbUXJPgoqET2w}AMjJ;%*gacX7C-a&NWI~#RN@p%1O;}TOM60ZqiJ7LKLpIwV +zI%5>5bN&nhmGeU&>YQ~*`*KDh?WlCVv78@TumDK8^Ml8f=N=RQKL2xmij!*b>R9 +z?n78|my~?ZmPk(ZI33#fZgh46S^()cGNF=)S@<*R{C&-|J_vA;xb6FzRux@&8lcyh +z^r96=U#sbcqIXcUdb^}mkM~7YCx{+^%#E5o?f2SxZ3n9FKBw>`l3ZrwOb2R_@Vm_L +zlbsY(Sj=;N`a2?1MQ$Kfo_>(ptpQaDcWv^FLhqv6L^{COE6gS0J%;^WvQMI222dms +za<3GYv@FE1{l}U(y;~Nx;_En?T}$z*65!t_IC9MPO(2jd+Ajk)l?|LQX@~hL=?_Sk +zIu!CPi5?X5N;N;|%KJXR5O{i!?W$u1Gto=rx6D`iw{&_x@v%wnWt2WccKu{|^LOmx +zRDZh5y+Ssj+s^}=vNKV%5)X+1i;=*GTMO4v=o;gPJAq-`yhhwCc0B|jk&H#m*`6hd +z=!N|9G+HcOqF*MxRL66sI?89T^d(a|@Ng57l&xcBk6T({1@jYIPa1Gc6&MzF-i}&{4@#`l +zl^i8JVPR_IUQ2&J==WQ;6`&*Umu%T@Q1(eo+ +z?-!_qDHfFD%KJ?3ro3lSHWAE5o#HA)nlTLfGb|(;XJ6=1i!JOp;hf5T=M%7z=JSB+ +z_h$zC490ybpOaZoOo{@k-v#WPPWAyZb}oC2nR_4yo4s~))o(Y;&mNERBtFr`UdCp& +zn2$m%y0}PX1TG3vL(QBFU!k-+m@=?{f54G#tObL}L|!%czL_5eqPhoag72bk933($H3e`9s}!qZxi +zew~jrd~WzT@_Az;`SbQe^R46>1xF3)(Bm9q3kp6_W +z<|}6d3l2YlOiCe?$q)GSv2bT9xHwwaq|GFXUkjtOcWFsL9v~Ry-N0N}hd`0i59Aer +zX_~EzWx3 +z>04PcQ*)gUA;a^`-S&f0*OKLW+j|UxoxF5AM!hOSj*ZpQcs?96+rUEC5&tP^phsc8(*nuV;_Y@Dl=RRn~PBwe(giW;gM0>Gr{(%DA1VOPPEZd^3(G+hwF2 +zy%NK5t`tv1S=hPLKCN>1T0T!85Vt{CceB-Ba8%`HAzb8EQaQ*lFyDlsC&F^#iB;1vWz$0vkR5OxD6Z@LLbI +z9~x8eQzUw*BtA^CGHCD?mn?!3UihLI3iFyRx4~eY*J?8(m|1T#$1=0YW@?Zr+-x&E +zhN7~5O!sbcVO8XfOSeygi}JQw)LJsxW;1h<$$!#j&O%0v28~d{i`kCi;SXG}(Ljs3 +z>pHGDxHx!Xt40`rtGk}X5<}2k&ql^lV+hB<){_~c_y@PFTZK9rvy{N07HH-5^pSj+i)rNc97@be3$*fkEdyq#lurZ(Oz{CEirL-DO-1-*3Xf-e +z6#s)zxe;4Zs$>$#8K}j?kc6aIxv25JfcEb5Q{V(w_2D{gQola$qB4T3`|#jZ@a#T3 +zMipG#rxGna*wSY-F&p|!Wv;Pw3G@w~QcQ)v^o9csa4{Z2c35>dY^6)w1K6%DNoNrFEK)!MnBkplyo-uPlBTE;KInX!(oczNt1T+}> +z3+_p`;ui7;P6{(TUVvXz_*UF?_*Tjc{}gv8Tuv&L`~&>xz-+Exr~C!!z?>feU+W~5 +z@;7GZnru*|yu<7%CL2&GeA^*#s>%9Q%16weX0nLd%qXeoMom44d-_6>O}aIXEXFe^ +zpHj$_$HlZ)tjG!)iA%TN3omEL<6;^e@_TU2dX?;^vm}JT%Gw0;^-1?5dmOUav+@mb +z3xc1A9dU>nFEiqdvF{?Rao6cFDtmn#3Rh9PK-pnYxLoGmEt(| +zuf!EzXW4Hy8sJ{1r>NY6aqKCb4LKNM#RWr*hwi7+#(}I6%zijE#MS*B0tXr3Ru`B{ +z^9M6N!cN2mUP9myRuq;(UEu!^IMe{QTVNi!@j;XSLr4g#?vGPOMIS&g%y%i*5m?Cz +z#MZb4_Bes;hCN6!r-F|oTm|g(f}>bf?5+!$D3sJQEDnaQ1+=Iq$Nouk3;zfZdY={G +z>sNhypgzq%$2bB}1?Gxhz;dsW2-?p#d{wBc4RHB~9(?hy3i(anv=9>HT#fIWovSfB +zpDix93dX450Ni!(7~FlqU2G}AM{y4Y=Sk^1O0~pH!Yt!Br-AK-!xC2rXERrJp`b>e|q1uEz9P%*@R2Qi|*I7|?Yc58w3N +ziDWDL-jooNDWMfWOl2}Dowx%>SP{zr;-%aF0*thcEF3~c>1S9Bp252hW!P)hl`4Hx +z9QbJqK1OBihyxRIEF@h@W2Omv+)S8I5{I{$F8CZ|RMuNS4GgA!S!cwOtC$=j(BfF~ +zaVCcf^kk@OlG$GX8r(x}@&%Th`@t)RhUCn}P37`=i*KB?WKfgI1<{Dxha@9ze_X`1 +zl|&=X;mG(u^^b7Ml+5{NNB%qidz@x*pOqZ{PjiOe1R(Z#I=i(09_E|D{q#xF9vJKd +zwdM!uLXY+YJSb^2=8sW62;k(~k?^S$A5eoyS_71HO(Et3!HBGOymf&AB0$%7| +z^60GxAQKApq@X@}5;7T~dx%ylnf%a5mh_cOB=iT;^pi|k=qD^G(>%WEx0oizib41q04Xoh&!hDiSYYRRnbQE$*O9xPhv!w+5V%NR*Mxl5 +zA$A2np!(Tw5UZV7*~{Qi{X-^m(9hh!L@uXdt3XX=cwZ7X<|K&lmKpilO@rT{$k~c~ +z4%XbCW=`cz!2<#Ra?0(1a+AS8d)Sru0=p95W8I=9%J*ZZa4y9^qyGu)tlg4k4d$$# +z-=g%hR9lq!0>#8M$}lI&c<$z@FJaXWZ)qjKr?bHKH?M9CgTiLUK~hmNor!32eWG%Ck +zfhf!_MWPeR0CFEd&I8Cbfn)jGmScGa-&4mt-jy|w3j?S1FoFki=D%Yg*PLrDh#Hjs +z5*%v_(57&mA$RzqeJ{eg?{83aHx%mkA`)-Vmi~ +zNnlaF*|LZ#?=tVK{9aLhLrnR>9KgB^jFr%R-|^6*ED_xAVrv6-IoO0Rw{oLoFD#+* +z?I@~-@@fcM^wvbA7l&~0zAX{_hanFFygd>8$Dx$8BN6-;k#Yg0sEWl5(}~i4tP`<@ +zB^OQ>BRMSg#?xb<=zWB3Vj}wt#P;6*TQF&(Z(a=5hqDePK?t$_~G0Ze84hYlk?W}h*mYYR#p_}3MBspYQQ +z{}hI+`KhUMz^)%##;Z*9MPlGuBr1?N7m5D%NQ4`2FIe>>meVCJpItyMODr8g#skQ7 +z02wAQEC0|ki$>lUE2eYgeISu{T`clO9_pEL>!o)O6)@Q$9zK9ckRXzt@QCJT^CjyWeAU153r+ROKPCM<{A8-{tdC9g +zm7WFHR9SsuHI$u#8d{2?RLl+rtfLPv;_XV@M)Uivf5qPzB8+9OA2Ch=YCmFaWrCP5 +zBQa`+WzH{TJdHo=gGb}Q)(2|jG7DsYjBK@;kC|C-Gve?|ZH5k471P_Or+CVq#+ +z;0=hlKOuo_KR0~kBg)_sv79Emd}@JQmRLG~j0ceE05VKqR$j&dFs^9$x?&Q;*GV3( +z6XSQ(L2DH2`7EemDrJ=4G9`Ge0sA(?`-3ceCg3B-*~}^M{>UnuX+Y+f={BXl3o{ntp0BgviC-cfBf@f3V^ +z4+L3vZi@r|%7De4?H0~J8hNYD(CU#cM|$v>-L`~|#x;It0Sx(;q;Z2Oa_RQt4)j35 +zdHNZP53aU^=lw^%WWn@+8sC>)3F_2baZI+7`xfnD$CzA9Ca+s2J +zqjZ>z8^6P0Tyrgs&8u-h+a-E-9DllzByo| +z$at{NM$qQ;H0^;ZjLf$gs;;UsY4YtdEOZNE%+`_FVQO`|d<|#|m`x}m#T}YuPauyO +z$azQxLKop4{0x>=UB^!MUZEIag^e@%A=W+xS~aH?OyD1Suw%dS#TGN#X5Es`ZFZMw +zv%il%b7X*CbC8M-@U;y1K-?g-ISWdw~9mO +zOsWRQ(7Z`po)0xn;w!_UrIYxka%jm3TVP}m-+AKEH^1tR_H5U=CL@^#R=eB^MEd)E +zqpJ>I^+}wL3-5MuYa!_E!n^#_rM}Zn6G;5RJIVo5_VA$mbEM8I%M2km{sK3!zv=%t +zAkEg#u6A4_ehToU3fw~6FV}-6A-T!oVeLgOEe$g)L#{#J1L$*9elqtN^pNSuj@*Ro +zwbAUY$f^|bFQC?Mvy1;f*4_m?iX!{}?w*-UCLu`= +zBtU=wLkRa`BM2ed{Z1;Z*A^nUA4CESpN#uv^_@-c7*ICd*HwFKL|Nk#<3I=MSwZU?l +z!sF{hj07tNAvB@pl)aTiD>RbiziuQkM1R>1zOe;zI7ENh4sIjk>H1?oa0+n@Zl}AH +z{Pud^`%j_RkDqw_lmn-%TJ-lNd(=wl*b)%5*`@S&chWzg!5&3H`yE}E^sPzeEJAX> +zNtRI32iIJ94<*}~Wcuw$zG>j;NG4Z`!N%zEx-f+$@^o>HwZZOxW9jduSQcz!3C6xC +zw!me5ccTV<4g~9m;}%EgHY3wP=U(ioK=ITs>w^{^Eu7&9{QIr~+oklm0 +z%MpA;JYTHS3N))0O=3{UxS>54#NamM`^EV>%cb(^1fv +zhJWJ`*jX95bZopcipptcH3^N!e+@`uQ@RTtzqaXOLMk)*(to=t^iq|cRSm6rlrmT= +zORTj?=m}Cn4alJ9JVQ@Vi`;4vdO$L?#!XnyCeY-yID#zqj~jo16`J((LFqQIwVAy5 +zR`dUEArP-G_vKy%Ez#@Cecf>N{NMjF`!E&!VNK9I$dNTcB>wS{tN*&x+~58(sxuUa +z(f_nOXf^>fE&2ztewr5jqgEp~7zj-6gviJ9YU+4iO&vc!48!s6YHELjW@yb+dPXM0e!&c~>2xhs!wNHRfq$RO|>&~FSO1y;R +zStN%NkAMlxCI`a!Ysl01Kj~c*$ny8+ASS!(*@K7auNsN8p4}C3aFdG9kn6k&LDsVe +z55J6@5U*zs9yw>~uqbts5h<=C>)C@x=;h@hUe6vp*%_s-9TueyO=w(4*0TpsrXwfp +zu4l)s`o&1qruFQ&F;6~Ob!a_%Fl19j%dSJ~*@Fo-nU2_2Dy?S^Cfg&B^be09`~#kZ +zSS$1l_Gx=i!@rMmN4&zhf5E=4A6mbKQ11ka>#aj7cDIcRct@pH=#j}V7C)XkJMm>w +zH{k%Xt;AfCCz5O@K99j4e=*6v#3qzKiTW#)*kLf_OIE;MIFXhU#b5e7WUQpRtr-%R +zkt3nsz=uPfo+ACvBRiB$u33p|N$&g=#6aScU_xC;4kq42a#ykyO6)^&4#^3LAI^lF +z%WA9?%A%W59PBvDUk(RDJ%%DjZjRS)j;i)cbdcG}R=4>LR +zT&E+|v6|4$2Hh~6c*9LhM|kmcce1BjdlBr?JL2%$gx5|p(CH2&dFga_ +z8Yj0=k`@Bmc~pH1C21|7n>>Le*0p1edk^xaWeFZ4qKp5Bpp(}0xLcMAk7HhKLAPnE +zK&7&7)i3W9FaMX*bc0cdt4LI6z^SCqh) +zt(>G1drT|z?_jFB3MH+{!|#!g@KT#x^5l)Riuu}okkYG7-7UsUD>`E|pN +zJ_FkpM}#Df2p)bXk0O^upy)o*s~ex^kg!XSkjosA`^d+{yIiLpAhWZOup;Lp;CQtr +zQoQw+|LxLk_`T6=6-DGjs!)LnnY4VK7jy>hrW97s^ODX!oa&03&*aEFPUYbJ`;>Ya +zsb>82#y%QL$0*4|Yd`@6Q~&3|Ln=5_c>e*l +zrQL7TmO(bzi8Mt#u$8#~Ay#P^mhHKE8E$^Wu+B<}kCpd`)59OqP +zDV3td!#H^u$@bjj;Wjn$;ro#0Hjm)+!26NrMvr9vXQVq`j{|5lo8I^Uk~|L-+E=0a +z@?}_;&Ii~So2CNa!!xsoL|o757^gSL;E2L;GY-d+|Do3SJ1t*ux3I?{b8HKHyzikr +zD|@=sIf-FUpOtd!i~&r=S*xX(Mh)q~6}zhk3P{g5jL>Bfgs@c`#0sz1kuFH0X*h*W +z_I;7h5l^w&zT6CC|Bg(S%UDjKX?B`IxK%Qkpcm#N2ky9A(m15Lw4;J0_9Jd}zWl>6 +zN@pnkHece!_2~4IgLOq{f4~~u92(rKv`s8?9a?+BbsAd%daN(*2t6B}$d^HJCm%6&Sd==?Y8}57pvU^+PTqnXxeSU6+DDP% +z%b>V;9@6e*5MKRA73DGrE2+seMkQYc#UO(1z02ehpovOxO_(3pUhcsfBbHY-=?j7mbDj3n$o*+ejD;nz>CL4Rw+Bl9)(|97)ihOCr4`Q9_9Ul6U|KtJ$fDtATEv(pSqf-DTF9 +zJQt14Gnz`8zoe7Z`eufPxFnbk!7MoYH|vA>gr%Rom22 +zS?@N(_?X?IYbO4?mimjFZb<^}jZ@imB$M-QW~&OyoJE-}LR9H`63I0#mzs245tu_= +zLC&=-gV2(W|CT%+Tf3|3T5dv48_S~mm;vjy7G_E-fnJ)@O2XL57HI#!pVIz!FW~!J+Jr8^S=dfP)>*DZ|E^i&IDQ-290{f+WH; +ze)9W}t>h}~?d0p4gGv4lvOoDGG0B<8iA!DpIhcGiit^fP~-4NE#3EP +zg=w$yHL`FR^*!=YabzPzU(S}8fuWe+5;?K+^HH=xxXNM*Gn#uH=wSwBdpT?-q>?9TpO8DHr)5C*JnSle$3c& +zWwu93NU5toTnEkcjq%s>BQ_k`F%-gvH{)qp-xzY(3e!lkPuldcaEDuak`y~{44`Zh +z-AMjSbR%x+X%cI5OMfAe4bMk?Qsp+3QrysFyzv2Y1A1WzRsfMc`v5ZBz`7Z3LldJK +zTFVV4`;ZjXP*-Mqq=b~Z`ZH*dY?g_NE<|awOX*pJ#$ThT*%O$EzlU%s3BN+v520xQ +z(Ms?~GB9~yi&Tn&2q*E%e&loY4QrqxwltIUWs|+^|~EaS{@MUqLtKM*`kQ_Gti( +zw?W8wl1Ne&5wa)+swUDaxmnc!21r$w0A&PR(whKMH46Z%dc>&eEo2pumrqeue>JM| +z1qf4TPo*E0ElE{N^2qgOvJiztTvetjzA`F`1Xw}9HE;hH6${l1BCh{hRV0?eMk{Ji +ziF$!)-M%r(1FN;aIkFb56JQQ%(1sWEW1O_%xnmIx=q}LJhQ~K2uS2peAMkfj>5#QJ +zMU$aJq9=)zV6&IrO5=^1yao(MZ#x95J$G4iiUO{-c@KIulSh>dk#4I4P1N=?10kkM +zg*3Mw+DC6{=a;D+Qp@{uqjQ#H$MLh~K~? +z{xco%*=16lj^LNv>a_a5`60=tV;Cy=i2$Ck$w!`BLRKw`NM}0F*}L0kxp8W3!gUtc +zoo={xQ#^OW+cy0A8BVq>)9CG`0NqDPj@}29j65UJ`;b!ok#fUDQMIl@lEXz7@Ul=1 +z7j^T17T94k;X3{hAnxi?RO3PM76dE1TpXsjeE^2zrn{{kvI@$St$NgE+djaCXPzHbp!vP|#>`K9?J70qq>dwXJ +z&ZL&e!1jmk%%Bh4Xh|8DQ{T{E#~QCgQG@m90Q%G93=(L)^i~pfK{!OhJ_y0*5yff< +zc;}UbA~HgZMMUMRwM1cWz|CSyGs!|GY0o6hnWQyFWAj;}(e#Vj^7czhPru~Q{Iggz +zX#DIp_CaHrLAf;3E~U5MH_k-SK4@&* +z0YcXo5T`r{t4Qb%!QKF26of1YP3ajZd^JWRcU)9PMCA|E6{PS|z^rf)gl4f=CRxZN +z?U|%GMr-q=R&M8;=&8Nf==nmw#t!P7ljx2CqQIPV0`_cbY9friPM)0y^bG_a&q`~k +zedB1s29IZA-0?g@R9=91JWt*Tl1}uGLO`da3r3x?1X^@FPnP^Yj^~B&M@!a82=RhR +zTxc|2j-mt5*@T`PYyKw)>mkf1;S~sLNZ1bHT?kG81_4iG>0HBap@X`JsJu%R{tmcV +zY-uK0$RzEVq&btc#%OH5P24v<#1=%^FSUr)u`jsL;`} +zBMRLTwEfs0Lq~a5ZvW;OnS*RgPJ5=KOC6k6x+F>V4M;#uf`AP6r?S2_$_OXX?u2!y<17GuKAyBXnX%6*6+T9I=QkJZ|F{m2XtAxsF +zhu@i`#Y$U7C&%Tjk?r1DEN$cd3@;pnQrYr4VaAJk5k%bo^dgA3|LH{#asShcAmaY; +zA_!XD5;yTSnDzJeL%i@#h`9glJ0XG>-U$)xHIy_>LpXx&J0a*cWsqMr#!n*!`H#MS +zdO$9|>vFKc5MAEIzf0BVO%b6(&p`}r?uPk2p`Z`S67sUJ8$y4c$9ye#6kK)$4oU*M1`c+ly3X<)F2;~=%>`S0W +zacfQe3UWYy;fLPti-RXA`xJB}-;Ae&I-fu>yy*`2x{w@7@b`k;mE>^3rfkSLq#`}x +zbQj3EBxhJDe5W9JYr3ya$B^Rbzd)0|51^_*SU*LNPn*hqJl_Qq-6X@E90bmqh9M$TU3XE@`b +zv$3-qjcMY%1Px7{5=0_`+tfe +zd3BsQ*rz(nu}^a@gS&MdKgLi!r!nf*cjmywbf*q{Xy81C05x>(McqbDTlkRSeANL> +zvQoBEq*GRmp$5DNhb-r|=4gPG@)AN3NO^1?68ZWg}4yFQwarVH!x; +z+b0gijnHt*S9EA1gE!(L} +z6Q|i{M1i*$gxBP6=Wiat^}j1c$yRpXfY?Sl4n=;armQKH`+@ +zv`2$eoaeB2oIJQ2b{0WrZRc?e&pJ*iBAV)qhK4k!3NF@jR>4+%XE-#cJ2kM_z}bg= +zLuWepM$TK%pW*xl&5fO-sN2N(3S?6&ybulrQbyWas2#ZoDW(P3v7HF?`J7zT^E-c| +z5$jx!oH*wwDg>R2;Ay-w0c{OA{m@wn&J=_t$>{)JlASe(jpH;$e%QGlOl@Zl +zkW-z{VI|F(2Ay@C8uq;nkG&U>pY9w*cQ%9OPMk9bV<71K2U_EuP1uK>u_&$WRKi*v=M7j$b(Znu)Ce)E>uklrSkKvp +zocdPy0}4gT%f2-s*!dWmEaw|U-ga_P+vnhKY_Rqk$7>wNs~zN^(;b>ZPIKfWI3YgJ +zMj|@3oY$Zs$?3);Gzq0C&Oz7-JBcW*?TkTb9VZWmPpVVIWAhw(ysmR8ysqcm&HcL` +zd;=#0D-E4vh)5&nuNYSu&SH4o*tr>zXkvwbL+}DA`+fAY-uVUnWjWvDfVQ1x@ZIMO +zhIfAFR@e_XXJIGKxg5O~bVfp7$XSe@O>k_;iB1TutmS+MYe~*9C{1=ALERK9Jd1nb +z2VZ6abf1N7%UJ`;cJ@O~bWXt6T2}3kV4}vK($?R!7FzZpGE>^IY}M(E7N@l5L`I!o +zDbaxwd3E|C3Mm~qF}}_qG(DvgCyMJ7pg&WxIkBwHvv4h?Gbc9GiAM}lx^QA=ofLAh +zD<`V!Jb~7vI*ct<#Hn3PK}W6Zk)=oQ@5abDcw0$Xs4dSa81eM)GRyo1M;s2 +zrQhP4q)M8(1C8hdvs?3*~N!AB&YMU>0C5BGQKu#U> +zr7lDtr3~WKDPL+AvM`uaVSnny7zimtIMv>t`YJj*WhkeH_)~8r&xUbox<56M$l;tS +z@uyx!5gfs(Qh#bWwRR+@D*UOBVko7I;?zFBdm+;a{mvIMK`Uhr90=GQhak&245c`p +z(4V%I7R2Doj&mNl5+w=mqxYRhNyIp!YoVJV)_oJgaG(V^-p-~tk1Z$kI*cdhaS{c6 +zO3^p{R@yF14H3Vyrh?F05m4tz5(V7_ksW*Asuysc?wN$6Jr&V&%4P!z1RGlQe}Mw$ +z8BY4rt@@{MC_2x&rFHPp5FAy`b8czasy`o*aMrn{iB|nuRJz_R4PhQZWSr+Yi6hcV +zZ_U%w+RI?I!St?Oa0NpxZE&UKyg-hTOPddoOE0xU#TU6^TqAMmB~JR`QVWXJ%Wi3^ +zxK!?zhOtoWrsbGGsNpYU+H;`7-R?IId8aXGsMGfZW10APz<+oGN?g&laqDG%1sz|IKfX#);Mfc +zD{qlyva<6C3hM_j=$&`DqQ9|Nd5@DejBcVRz3-MbkT~peOW{K%Md@#DXXleNjiIE;ya^LAW{diaidxR<;p4?kXo!ur2pEc0KcFvgo&_1ECo +zbLf4MNH($Rcfeul?01v!|66kDQ%?HOtzTgxat^pj_|JpqpbNwQa!fbQXPgXSq&1=| +zv(Mcmh8B0+7jBXq&PIO(oT}H2!yl=`ho})&=uJ49?tEFx!C}!J|qh97s4#Dt{(9F5zSc$frpTCcHx$ +z>2SoGocm0Ke1^=165ghR?pJDR64uwj|I+%-Stm?(XIjoVlB|T*1pS993`r=ZWB5EN +z8c}B`PFId)Q(|PDG775AiBXMim_EmH@LoTZjIL9gn(Vh})+$W>1bI%trg^3$F7*)g +zahy#PR2kmqL=kNYlRT~1Rz{#v^Bg3dVw|xprygc5+iE-!RuiWAN1&j|33!|^jYRx< +z9*bY5P2E2tldt~kiE#gjdMD{ +z2xkHx*#2+8WYUv5NKi>8=@FUN*Zl&3U@P%m>?pgfcbRUD +z#o5Sj?#hqSq#<%U^qa~{F|bAE7How=Qtq~ZQrv?2Ry>(%aS_fQff2sT0NBZBjca>E +zlS0{~AI6bm_aJ-^lI_Q03~4=@eQ3kG$*x3p +zy4CqS{=SujgUc?UCbyScf7JwGvrB(Z6a59Gu=Zw*)CK5ho0C(J?8JW{>`$c|k!;7| +z7(mG{sgxH!4J6%tU&N&c{k^bOT^x)4W3-?fTW9ibyx5IkwAe$>qD|~y8u{0S4$qR< +zTa}~R!m+MPP_z_!JKPF^>728WmI>`zfXc#LwQ$}2mQ{qR-RQ<9CIj}t$}N=|6#NBl +zF`j_3aw{Z%A*wy(=G%A&@~$ZSg($p6@|OeuQmusPK`d~8o&{@utLM}M&C +zen#p&je39d%pFD)G9E^0Ry_4c9?d&RZE)yf!?DPlUHTBP9(z#~{EhZc_t?QQ?Vs-X +z8TPoBOCM^*);&jRm#axFVK;{vpYeL=DjR+#_&Z1*%+vIv3ih!+8Y_AA(Iw+hvk0_JkZ>J@4lhBN5228RyCK|6!b1?YKG +zFPZ8~X8MwezNEe{sg65rbyxOSZbh;-pR;HKTxHo2`?BT +zXchX^%6k(YglPFGww1i6j+&j0x*wvbO*uN@3kY*b_y)oz66mW4A3*4N9s-^slS8$4 +zmS~EIrrN6KN5FkzOZ$@IzNEA-DU4CpeSj!415nL)J7dg$?~Li9K@ao5CBE+D5p_n| +zEAX)(LkJ2+_ob4cgOd-k8_gicfvMJUlKH3ux@~l+;D=1uhBw4qc;(!iQAqRKV3_E5 +z+98&bB}legN2lH~l-x?m!?>0XjHP7at4My+4asqoyoQq7G4BS(Q}RbjK1ijUZ1rcE +zDldaY92PoN(uu81+$yOJ`mz$7#5)W@b`hq^u9rg~LtV!~D25WAT(w3uYWOa_glbTP +zs0QAD4yjyJhEdCRDG#b0sLYcpQ?8zB!3u!|E`LV#OeZ~T=!gKc>^X47+X~DyKzciO +zBvuhH<7)uiS4UvX)sQbhI2FLm09wyL(iQ-@T1fqui6ZnNPoezn;Q=$Hs_EUQqkC6F +zD5qtLE6=B4E1r6_O+{N6JVmFe1)^tx>ne_x360Rtk98t|`YH#`@Hx;;mLS=VN5N?- +z-Gk)78|Kcj0)y>pdQ%y;+!dme&Mu#d=a}|$H%LC6#7~)gjDJ4&grzzit@PRewAb#g +zh51p19i_0J6c$uP6?RuI$OwgOG4}K#e=9G50Z}99B-7l3jS=;_D60D!gk})#htP|@ +zXhJ!?dO&ywLOxwkrFU@a6;g*K_^!)9l_kjkjq2VC;kwr?YY>(8qEWF0sa{V)I1Zub +z^APapf=v26gz`jR32N9k#*sQ2t2g}xVeCQ^@InD}0=DP3Rp?cMa%TxZXY2wLQPetH +z-PcLB86K}k4-fSL3i9dHx>@LQYF4Um6Pchh>Q6Ayl}@K~E6^+|jXAAiR;WSlLW&`U +zZU;CH=25CZMSUrdeJO}+X^U8jq`^|y*M%yQrO;Nf)E>ehDvhz!y+UfzyRCM(3i@Fkp4h6I4eDU7PSIaWz$oF{3Hnw@EdX +zkgKHWInp$gF2Ih&;thS>Ly|`afqUrUXVho-vF;n;{~fyAYx5Cjpu@d3A3?{HHEbUJ +z*0|RmA`Wh#Ol)@P6HRfWil@~3Y(fvfJYQgLL;+q&F5@bne#U9-VhZyE_Di^Y@2~;+ +z*z!B9g^-0wibtT5eev)wBQ$=3lK +zc+ftsMi!Ehd>ZB(gvv(e1|G3f&>}t%I>VBcPlxDEA&Q82%)T8&haZs7Ejj|hv`EPn +zAbq1QA@Gka+9j&080bNx!!G36-)&F#N&)2H!6E{hX)uGiSEm$jo=t08@zg29=mnvH +z*XUS7vZkj=x1^V*2DaLMjN9(%^qd^FFWmDrEmZ1t +zo_@bmXSX<-2U5O8Ga-UA0{@0R$RnZUd-N;ob64hH!(Xt>KhOxK%I=kPivu*V@8V+r +z5~Ih>V4gAwa(|7Fq?e=x=J0RX9C47A#nWb&CN#IKQS{0V5ceSG5_H!ndQBSACy;&w +z>EZ0?JpPgU52Sg>Qbqh8k&AOahBk}#0I9|nSm^6lCxWxJI@a0)6MBL?)T4SU->1 +z?@?tMM%&;IPYu-&+?nK1EPmYnS@AC01fK}Oy_C+%c7q$PhnD_gN2sNw`Cdgg5y}C} +z6VwFkS3CEhSffd&5OrnZ$vrOlG~LZM`Rz=xkE&={Q%yQ>uTn;mfcrNfw>sgp}>mt*O-pM(~S^}yLk+b5Dy|yPn%sj +z6+_7#V@r699YTN#CJDwD!bOsx^S|32 +zRF2~NN6YyhPTqF9yq0S8+Yn)`#V0!miU%@)jNUh4PkpzWsH0r~L3o8B?#)7lL)!4;JCa^;7ud)xYArP{MCxl0ZlpGHi}s>LZlpGHq=Ik4-~g%i$4Jr3-vY0* +z-a-M|n@EkuJr}oAD_Czo=;2fREOlPcz+Zg@U<>IOaSy#Kfm#KVg`-eeBk47Dfw$P! +zLMgb=h8IxZZNpn^>rp6h+fd1E*h6htE!F4;=7rv-ccBILvfgz9TxdfoCS|t`AF|%K +zx1bq??z_u=d0=EqZxDAgW +z-Tk;!`$HR=9mik~JYn09Kt)Twym<1$$>UjM65yWrD8*yLvEm6Ia~K{3M%s4Pirx@j +zwZ|->pOQWN_LwS+r@&;tJ+f632-E$SLB|=fzW|dEZFcEf;}9aYc@^LL+YL8|uNjIO +zS95w?r5qq10>mRCI*C(r!(H41q?C1`$}ImAaHmgfey;_9mqAg_#Sm~uO0JXm>O^6j +zYk3Q-weQDoSiWH3yM^x6l$gq=N%?vEEQqdjHT4d(cBQMSe?xGuri3g8=^MA7K)Uvz +za=Drkpqv4o+Ux9)k(&zvLxiq}<_Ko|+F)m*aja|#VSLrJLZ}+@YqLE-i6unj_Lfqb +ztcy{^6GX@830p&96$}uTE=;>`h^mN6QI|hfzZVe0%~C!d#{zAE>-`UmhU4WZ+ahJF +z(FiUZV}CSKe#=x!S;#H20zTZGcJW#$u=L~ep1I^p_@WB?Ko7 +zG~EOBSE%kg+PXO&Xr@Aa47At-EmvrUfmV8;R~1@rpmiSTfI_bsXiF?qaaN(j2HNR? +zXn6?_|G1snx_usKkU|{{bi@N)r_clgo$^2{6k24UKu*k1si4)8?9+M!rFo#w720c{ +z>{#fH^9ucJpdlV8tG$?O{H}&zk_Q^9&_Dyt^g!1uG}}N6JkX;GtuoM34^*Mhb_1>U +zK!+7NYM>3V&^8}V9URQ$_q25t9;lTZTt^8(i}y7Iy**G{g+>}^ga;a}&|Cve_CRwKT5F(L +z9_R^$-Zjud5A>!&Ck(XA1AVPf-Cf$c(pac6gkPRK3i=pmvj^&+&_HhZ8;6*^&{ +zZ64?jh3f9rmhJIC>lEr^phF($Zwk#Y&~Xp+y+X?kbT$_HTWXGk;57p!<;4t>zvU@( +z*gzQ`Xo^B{A86~^d!V}%>R_PW9_R&yCKzah2il|1A_GnKKtC$9-ardtp*{6-B?Nm7 +zw88`RQs`#`m3g2dg&KdTAt?7iOB5Ptph^$)CxvDksLBIO15Nip +zzbLfdKqawIRYrFS!8rr1_CN&+wfIOwu)zaerO-$NRd}EW6q;+GT^^`hp|u7&=z;bt +z^sa%9d7$4EI$@vyy($Y^67Mk`e%ur{@cC>|_haPosWrm`4N$0$f!ceZYZRJcpxz$n +zL4}qZXoLs)vqG;KXtD=7sL){p&GJC!6pH&qTenmob4{=>vxkJBgMmt8HSMDZOWbQG +z18w#|vlLonplu%LVTINkXpaYaU7@`OI^==AQ0Qj^9rr-^KDg_6<9!-}v$4?r777hC +zP*Sg$p|XFNLbDB&;el>YXqAE5d!UsHZ8uPF542UGqXrt`f&QUT@_udIWDi6SNpj!i +z8fZZ*bg;ETQw+4i1C3N@iGj*I&`k=xXrOWr^teL%4OHoYwkdSZKvf>-p9;13R6|hh +zfr7Y=${`qOptAy*1L5;_3e7c8xOdDb_`Fb|wFZiKpt%aYYoKfov__#52Fmw9Zz)vw +zfVQsC107MQkAaFjP(mLG!3+Zx$3kCpRA{+@N<7dwg6WuxdvM2fp#f0#Xws;&7-**ls*^7vc+o)nVxj8p3hg)0 +z5f3z3p>qa0<$>;0sKpnSTww(I#*C-x=M@@hpfnG(TcNoI%JM)p3avFzjt8n+AR&0y +zK!vf;*F6SLg#9%!RNGYqua1AU;-aszGfKqnP?%|I0% +zDE%S{!C?dKiiM8!Q7G=Pw(g(@x>BJI20G?}?p0`lfzEiK%?d3tko!7|sHx}3M+&Vs +zP&&N=1Dlzjj+|C#uYp>7pho>A1V0-nFBUqQuTbNEXb6UQpcx7cG|(gubiYEg4K&jO +zy{ynG11<1C`xM%4prsz@SA~umXtf7wGC)F*{H3;TLoD>K{tD$9sKNuyRA`EUc6p%X +z3N10vK@aq*LN6NVm>pg7jGEn?VYVG*D{~ +zbe%$T4V34BRw%UAKtnvxYYM$1`uTb58S~B}C@IYCEBm{j7v@{kv +zHdLV*23qZbu2*Qefi`%cM-_U_KouUSLZQP3+U0=`D-`#Yw(g(@@(q^ObuiE|57bJb +z2?jb73w=96p+yD?71*#GHT8UZqeANql^36#Cgfc^;@*p~hcp2!?o| +zxFHgPfd-o7f!ZoG+dwm8p?{B7XqAB$c%V57Z8y+T5A=jWM-8;v1HGwG@)2#_1`qVL +zLb(R2@IaxV5`rlP+U0>dD73^tM`EE9V-m>Bp>qbx@IX5h +zYH?IU(B1?6OQDel>g|DQ4U-VeHP8qTl&#QO1I-jD1pBlFewd)py9QbqtLcYZ6*^&{ +zWgh5hh3ftbn)&`ysR!DrP#*(r_CVh%G{ZpKJW$GT3Bhs$?eRce6?)A;hhm|cNeUe{ +z&~Xp6NTIlIv~_1a(6b74Fi=wen4wbhzCsfWl;MGnE40W!?LAQK5fXy+2I}pBx+%1m +zpxkY;;)T{~jzkd_@7VpY5J*-xQ1*1m9)u5z%3rc6`!>lQY~@Deua=bkh-442a!cgT +zSd_g{vWHl?mi*a*vMVKfsFk}oD*J$B_q1~7$n9;SznAP$R_>Xo?6{Gx-^1|5Ke<;* +zbcSS)hDo_EM%i5@dn8OoWe=0=i(pdjpAbD&virkiRQ3YN9&Y6xli%4yKP1_`t=tiE +z4NTe3OLi|Sw_4^C%HA&71y=XzGIl7Nx*%T`b&ZJazp?f&sC8knSwXpUV6z9X{7;us +zwLv0xmeeh3hzg^mYu&}HxeKDohDuqUlr4@bn;~UAq-;f0*_~20K*~y^%GOHRASv4r +zRkl^i220tNsIvW1HblxQqso4ivY}G8C#o!YwA;QBQg$$^tc{fQm$D;KWdo(`A}Onh +zDw`^0`BHW^s%(*z6}V*u)&Tdg?u@`&{r-kt)SN7cv;}VPw<|%kg?z-AM(Ln8>EzrkbN))fFwS2D03;6h0 +z{38GE3%F&ohvBd0i}vY)r@6|lK!5*liob2W?P{MzP3J|v3u3ho@wY*9TxU}7Iv;xa +zrr6+1WATyx3BY+h?RjQ147)m(9pztaR9m*|Nr~M>JlPP7kM{prai8UPahwp(TLmKo +z?SWC#UE@=L1Wf^*(HT3?Q5CWJZuQq4YguEd!*@zqK!bFJ-(3g{6N9+SO=E)c`@oK$u}eDKL5+4hDOjF +ziYzZiO&jPQHHGytdY1b?0>QVk+aDv}=>W+SB10Sah=0I1^b;+mE#V`C9%*-w4YWi#+2*vhD`dWA3NnRseEPB#X-5}YeZ``eGq}TGA==o@-yGHscPM=4bA0pTd +z5D#JK@@5(>OGO(*-U2WBZx}D5czdeGR1E9j+j~@N1l6*66w)z)NfOquxS4jtY +z_REYLMT_B_Z`1@(G2>>R=qhJ`9lt>xcgGDMX2)Ya-{#*$%G~L&IC=)6<=PfrE=!v^ +zLU#E-QrmOP5t1QP4MlE`|0D=LLY{{MR{lPWk$fSt8-V!Of7?XMnm`fwL;j!b@!ax~ +zl9C17dh_I)VnwL#8#NBKx%K>18y__TM1L6r-1-l+_3pE8R{ml5Q7BwB`SFRr`&~GK +z|AqXL!EQUv>h8PkT_sq*L*r+Kl!bAH61e#@7-#)ILO(we)$ZSDC6i@B<}>NPSjcez +zn4D+Gav_VE?4aaRO71XZrI2MzUaaJ|N+x}$)~kf9V)9NUa{#dQiw#*Vq}7O8v`NW3 +zlzf&*eqF~YAx;0^{F%~!SNep}8y@0DF`M+x^-q%a*F7#CjE3MwDk5YNlO2?tujCp- +zW(&E3$%~bITgjt_%onnf$vc%yJ|Wh#A-L8Hg{)z6laiB^yv>kBLPl_i2IlTp@;N2n +zGi0%lg-o7T@_Qv~f3Ma{ge)O)UYkoKN<9E@KTS5|3L(px9H-=BC0{UPnUK{?E>iMC +zC4VwxxsYKTeSvu|DB17_vEB!Q8>LDi^O^ie$r(y6HDr~L#Z3OLWVw=`5Xs}|h>%Ih +zpbhQ6RNDW$(oJemz{is{)E!S{r1zF_N)7_Rk-El^X+l;rxk$-}mE2;;EFr^mYP#hG +zB@Zci-jF#$<}>+`lC6Fe>%$3|bn7ij*F7a3 +z0C1$H8!}JG8YYJ;xlGBI4LL-}NHc2DTqO@E`I{jp30cVG(@JKZ7V85cxKWxZ +zWC@YC|4qr+O0F>E0wK$pJgH=bl3y5dsgTu7Hojci?*B!sw}jwYUoB)fldKO`a+H!c +z8ghe>^vS`%?KdjSl7bk~b;2%8+S7 +zu3++UCATYCZOAMkE1BG(Wau}s-VTC$)a40jj=DR3P+p_YzS_o&Inn;_w!l3%D*d6- +z3FlG3BXFkB`Q*htPb!HY_^ub@4Y@$bVkX~Ja-ot>8*-_TWla8{JhS+?3%M7*`<;^aDY@B@XN0U_vhH+g`#vRqF=S{Y{J<7zO*;E2 +z+0-Z2FM{AkDP71yCa+QQS|yhg$z!U$kY-HX`?%7tDSgoBm9K2z6@~EN{vAqMe(|6= +z1lNPfqPLRC@01*_s+MnOBaLME?K@_Qv~2i1C5$Py+WRk8;FclI%4 +zM96X`w=20=$rp&^NaYA=BDL&0r9V{qC!@De=xWmYVBM>w{SD*AgFX=4NKF?q(vHY} +zO3qMnsUhbGS;*uyN|r16i6IvYNuQDkJou=Rzbn}!q}EpoShIVY_Om0^)lqlBQL2#|73t7$NH%g9Ea-Jbu3mNV}EvkKu +zwEZb1cM!>u>Mdjv`@rp2`dg)wYN-d4gw7|uk6fc<4gl_}>kT&Jr?`O*)fjN&A0SvPoF2 +zFBGzn$?i%H0^rU(hFm6O36oQmd|1gXhAb7boXH22Jf!4#A~{m!LMG{v_t;jYTh$g1 +zhCy&6wMXb`(!2U=C2vx4vmp-&8SYGE@@#4UJ|%xKh}PA_%VavqBa# +zIaSGPm0WJfq%o+2t&GVBlzdIegNDoyvWm&ql(bUCdUFV__4Y#Y%ga}PspN1auQz0G +zA+x)n?N20JFKvHJ$*qPQA!HGgU6uT&l7Td}K3T{WOiodEE1A4k$@xmI +zG2}uaYnXgR$+wj}YRF|mM!HgqzECo`u2|28;Ety@w#`#^Bp9ucyH$xcenP;#juvxO`ta_uEbmMi&* +zA@hZ-X7X+&e^;_ex>_$3GMq~~UsQ4s0C(0gWRZ~hOde43VI{X1vRKGsChZ%g?T3^+ +zZ^#lM%b0AZWUB^ZeHa8cN-Kn{Vse6#Hz~QwkYz$z-O!?^?oe{OlGTPR7m~kv@zh2o +zLk-1xI|#1zN+F9_=O;>zQ*xdmtAt#^Y0s7{$0rvhRhMNh{;csteYVo +z< +z769N#O*iCXAq$yYujDc%UpC}QAxnsS_CqBPDEXTq*9lq9qmqvX7U*&M=5!uAx{Ze +z#^i1#pHOm}Ap_%~9a|NV&;6|A5hddzYCTOzdLB0LT+_MI_D%q}kH#7@OUP^{hbnoi +zl4}i_BV-YiH!JzBlE(}=K*$wLu2nMJOssc>;6`b@kd;inujFM)-fqb0Le?<(qms`n +z`8Pw(5i-&XZC}@Dp0xc(CDSt1`eGpqnH;EOZvY&nD-5|($Py-RQ1V_S|76H@LY6c6 +zgpwaC`LiLn2wBbKJ4!ZgF4prQxKY|EWVkoA=!B9pm3+XE`-IGAvi^K&`=6Ek)R0Gn +zEGBY&fs+4GvRRf|KP6-tlh-LpAA#j4%`#+Q0_xECWO9{~E0z3Aaj +zUkkOKB_w^~GO+$zCEEgE>mv=BBV-YisSBj-bCq0e$N@sGV6u;r^j&n;`L!X(3t36z +z^H(cbtEG?~A-H`sUC0_HA69arlD8Ogj*yYQr1K3WpHXtBAr}i-$mCHa>C4{ir_)NU +zuN1O`N#_=6dv^d#UTVm7LY6bxL&>|8TyMxNLRK?5P077V));c9kl}u4(F@C!Om8jL +zdqHrcv`@%HqrR~2enbAhA2PQ(I@yTSa +zk^=y6l&&^pnvhmLwde{ZA5!vFLuLt?&E$Pbey-#>L*@usMC67)E7_v0SRVqxjnV)i +zS1@^4$zmlRHRO09E18VHP1^p3lK(K|bRlb)?5t$4omg)J!L>d|$VdVCd6|-9l$>M8 +z#X=S`xkSlQCEp^FubEa0X|9xl71OCgT@M +z`xhx$X2^p=)-c&w$z4i*XUJnhMlK@jmnoUrL9BO!;700vc{0Bg{)%If4j6jJzK2zg5dVk1|h8h@bje(N={Sq9z#|Lna$+IO1`AzM~2)b +zWD%2hD*3CD8J*SoK_OQ#xk*WSowGaZ81k5ql}zqe@*yQ(HRKr~YnVK*H%T@gdpSPz +z0)3xku)P9(&0jc_I6#WaF`yol)6mB^!^u +z3>kHSPAzepgU4R>L}j;?Y&`Z-IQjxzAlZ2ACBN`O_9V&1V=p_SvTu-VJod6>%mw-$ +z$;M+Z>2iTjfn6)vctE-Jf~WTTZ8QQ3VZ8?D?El|4bSN8oXtsO(vijZQlimAzE5N7JJq +z*;Z~yh8B7Gw3MOyGorFzmu!ro?5OO$l8q5JAS(NaWMgPeipu_7vU}i3pQ!9QcexSB +z!}C{B*=;1dAHMh^M+rZx!XM+xmYm2y%o(5iuLR2raf@-R@KSE~DGvG|-vB|gEO!eW +z_S2VmI@F+yA8Vnt#~$bszx&}0daQ*OUz^8Tl++{EH|kRu=OxG&9&4E#b6EREv3D=1 +zck)MJkja)^ZTH!dBZ7tn4I~H3P|p2x7a*SWH$boo +zssxQ&1`n-E+^!-IcV6%?NwUeq?irGxe&Rm5S)Q=KgApTJ!_8>zaC}zg$kBD->4!ann{ajw`~aMv +zAvk~jd_O)I51QvHss%3`i01VSG`vSpTOTuu&{IkI)O$68mJr%IP`VUP2+$II%`d0? +z=Kd+FBENw+x0tN)0}j@uZrF@-_5Jq)pF|HhRQlPqWd;rlY#N^K|4R&9V&IHe&5itD +z1LkK*idgYV!?urQoA|@`suxoj-e%w-v0h~P`^3O23_Ly-ZsET+2Hs-eqFA`4|M3{O +z!oag)eeUFc2QarUon0<9?7~>Z+5R8?$d(y)X)N2>-v}KWrFWfSSH`kk{Dc3vG#Ezu_v^kc|aUVf*+f`1Sm46x|@QjSWY8q*M11F(y5Xrs#ODt9LMa(fAV!aFFvyb1xa#33_{81+`U8d!3KJ4ni=r8Hz4FfGIi9hh~ig +zf5u98R=D)dmdG4B(MOq+tRPPnm+ftf%;Efrj0As{pqD*Dx!w7JEPSUzawmV$3*V`D +zY#S<0PRfD!IEjfTusZ?Me1?d#CTDj*(dxsGg*ACzUwlrlbv{-5cSlsaJ~M%;<-OoG +zvZyU$k}#bATi|JdfQ&V8_N~`FjY}A=iexc4) +zK+^h97c=7SE<pA9tIC=q +zTI2lm?4R3;t25d_*9}+y70s>R@#^`xh)VmbzeZ;2_?h&|&*XtNJ-m0Nb@feXU3$+M +zMTlqeSo`Wr&?o7=W==#eB@eRcdf`fIMk=L7+B2quO&(!iO&>H5Uvu>$WY_L+bxU-1 +zz2a$SaHa|`pmS`|i|CaG-RM-v-&*FKRrDz3=FwR@DtE@3KF~S9o}2aU7EgcK!I>CDK09<3{pX9LTiiZh{5MGX +z198_}j}JCZMV7zY#i->A#6KLuf1$Xn8(<*AkAl&~R1k_^h5|e?jGRkma1NgNqZ)x< +zNn;58j{oe?4N#0{8nMeCft)}SK!Jf&BhZ(`QS%|j{hkRiZmbVn@O{Wukk*CU!Rwks +zN$@+!{@_Vsf|@5v)J>C+q{k!_X8Ld;t}L!M(5(AM_(9 +z6!f7qA@~+*B?gZ`L#^Oi?303bA}2XG4SG_7hrm0*dXU4xzo1s_;9aOyC-?!#)L!vt4Vbh0 +zkernK9p(2WIh_0}^w|AKPP0-RKO)7D{{R#_?g!|%pwJ30L545S|C`CrqkPBx06o>W +zYSZHjHeDN8I`eZ?r0voNpt?>w1~w9#Yg=_1ndFm{Y;KbKkW8iTazBY$_zrHX0II;l +zEpkHH+5+*VXMi`z*M{oSx6Kr*ixbL88%J9_4LMT512N4?Bq!?iy9oXqv@1o|I#x|C +z&W=M*aXdb^sX^%!1I6g&K=vW~CunH!J@VrlevSQ7tKoT<+av12L%>zr4dF3!Vdlcj +zQD^NFu86oV?cU%T?nZu+(R5shG9vzIUk#!WSxoL`Tda)H400|s*=FxCYIw81vL91C +zTX7f=AH#xIk>;=M9g1G7XuzNmL9L-ckJ!f*U9RW_f3pS6CiJLXA5mm~%N1p<>~FrH +zVfFW4c7Na;D4W|BA`co<+r|s47qs>_b`uJNJ?270t)|TfB4>|nH+^>igb#go(>o}q +zx6h8`_J=UiXFm%I^;c42w2#MW)7L4n4(u>GSSrB&Mz#NK+k3z^yT-DQ^8m0Sb145Q +z+x{2wGmq1u@|2YPMmm1CZMx*BA0CIqIVmZlk`z2TjuO%p=KN;-O?p?h!uOG?xpq$= +z&4J8^&p5>7%cE0}>mGU|_z*jqi6d_WyB;~1kBU2Nd#)&dM~t>2qxabMTgZ1Ey@yNc +zUrH@l>dL*NbX3Ile3d;-spj2@qVcgS +zmiowkgeV##!$CEoN`%5bgBoBfe5JppeDX)SeVnwtuTd8*qZQ=OI7 +zJF2)ui+?c1g;B*%YjGeFaBXBwk1BpsiyN5Y1yRL^wYZ}xUKUk+R*MU?IIS$In7zJK +zi>!>LXt9qM)8nDpiZVys#{Gi3%O>ufuaSGbP4o)-0t)q%NXz>bDoEKF* +zLW{SX;vrGR*J<%FQ#>iE_22eo*- +z7PkstaiRCDj7?~S=9Fq9_W4S1lF7=7A`hsdHL56UNL2A@Eq>h;PmU_C3w0cVPfc-g +zRB?_LpEkvdql(9AalI@J!Rn~uo3yx_7Ps0QRctlhf;MUn{Y8m3d%v$mY+lP902ksI +zOQ*A5wdklC3i=oOpRm&CGvw1}I$Bi~MFladGTI#GGH&WT^(O65R52Glsz(|e$)Gdo +zAyF4n@2Y+GreGF`&2M=Ua9&T_o$!xHEpzc;`|gHyo_YTah$s9nAh;J~#q`^Wwqa;c +zTi;8H`g;l58iK2Nv7l*g1O`kNh>*Mz_hoWa6 +zakdD8duGoN+=QaB-3RyurF_YqBUBNY&9rB#!lkP4C8Kaetil$2Z-o`6(<`4?;dG%^ +z@KCU~s=`lI;aQ__p`bXmxt-O){!%@}A3dent7EAyb_znk&8GKga~}3 +z`C~J&zr8|z_<Y5|Pr58kAZm9L&}h=m?{T%pzskzW1!t?96W&BW`eO-g^EwC^JFgnoY{361-9yxGr0QsMU)6txA^Xb^<45V-3V +zjts|7l2N~sTIwq*x7tyJ(?nY#1Kj#sNef+!uO-SIA=!eN5%R()GD_F(?<&sk0Oj$N +zAKRdf3zbgmFUosCaCMJ}rC6Z>F{i@QRF-^gmF0={ODu%KxVqxWy-L5tGzDv$&?ZF+LAdb`s6@)ZtNh0rEg-+w|h +z1uF@Qo;X-tA#ku1wnoy(+Dsq?i^|<#Rf@K32Dm+!kroQpBScy4>1f^;YxD;;_*X({ +zD1Qlo4Juf~`WoY^gbh-;Yw)0GD!X7X9*eTrU|R^ZWzbEqQvxpIEL{mPKzRDPZ4W>V +zx>s5uw=>%eLjLu({UGw)+nLu#-OenIx}7O9-_E=->UO3pTj8-6LDNZl9Td@>)}LVz +zc2mgiK-=CWb_a7!_a3b)Taga=V2XYA_h8)n$2al))ljee;MQ} +zMDVE15W`{c$ +z3^j=ewm%}){_XZ6Ral}5pCjD;%Yoo#)RwrTcDJJ66G~e;jjt++P(InO@f~b}{vo;b +z8Wi%(zgQIF%7{1n_p@rg9#&;?^QY4COs30Xy*<|wD!KJf0O~~Zs@twgAx)rcdxD}L +zsp3SEjmleNS@%styKv(TGf|rrzpc}1M +z728i3^wJ@eG?QhkoZ|raCtu45X5`rXmahOlhl(xVfG~6%ZsE``#~i6{2GTIQPgCjc +zt$CDOY-xYsO@!bYr +z7K=}_e^vaX;*BQ286JBZV)1L;X!ZxeeRLh6@SJ9zT>`J>EJX9PuP0`W7P0xQ_XBSE +zPwXB=ZH}ZOX6VfG-HVRk8y^eljp0n~69b02#rL98{8nM6j>l5B`9Aq0_5ZMTHegnb +zUEJUMe9!5Wsiqp!hpDCvimB;SQ>L0~N-}*=5=}Kxniw@ygozNMK`9yfM2JENQ7VLD +z5JE_WJdzNiJiY6`?zQ$lv(I_1>%HFVJ=bNdz3=~8>vymF-uK>TpM6f4BY6`IrBmix +ze7@!~DjT$Sd(k@%I#A?J>RWx;kmJaXUZ|=Puj)46AXT+@R5QJ*+kNG#8tJI!dsTCM +zi&b^Aqgw4%-QnA$swY{6&TjRp?(+Qt6{g@vq~f9c1M)1b9&WdrF+uPA?MtG5zY;S&!ls^ed(zHA;~7{Gpj?F57l{4M&ULEn +z0_6a+(-I};7_T{MS?zxAO`>xzpgk%63F7j^rq%x0){Z4`Cou^ea1akAL9zpNd +z{x2U93;eG~!~zMAhz0)d9uW(gN5t@4SdgC!lZTUn@s9`*XvjPw^aPm0`iPLTzYF$< +z;vNwS*K0|=8tiXM^);@8A&E>KUrxKZSSjuM(P@62KV?xp`u}tO=;^d=pEgJ4_I#4# +zWmj#cNnGnQGPNmlFzs$rPN8FmSW{ue_Q80A{;>sC&X*uXQ06>B%Gyvi9c~+C49Yr) +zxm1+S*{PSkoePPvw1`i9~#j=e{_(Qc&zagT)B!vgNeU7C4=3MXeT1c_@H@qt< +zZazALyHa6M)Ov^-nM4ruays5eikWFj6hVF~if1$J!X_dvW*6F1^*&7)F10qL(v-H( +z#Urp1=cKqeTyz_ +z)x%e~YUv@XIc1qQSJyh +zzx`gpv_={Vy?&eiGd*vhN-f6O^hRYNh54Q&CtDeKsyUPmp2k=a!?{iP0JqMhH%|fU +z?)J{|H-Ng*i2T;llBcg7BmciIf88lZ;KK2gfghIre_07{hVwZTCzLyl%wQnQKhYPu +znr;SJq0{KE9Xgx-`a<}}E3D84`Wp$2;no+)P7M{X{VCa*R-hKWlL)VUmz3c~WM+of +zMZ4?9J@r~o +zPHFEu`}wKYy5^Jy7puOUr|QYmdw)ApetNI2d3ukf^$y{fon_ahHK*=G>Zv`8_otP? +z&b5!okvAQ2>19_vNe54Z*{F4{jmwbDw7@rC +zRKM>LN}b8YPeySzr}^i->eKrz3R*V(ZCfq&t!3dBaTcq$Db2=;;CWjTSbKt +zZ`!Ak(?#r5bJ8%cc&j7M@`@+V@`|@P;vBE|s%O07?T$FlE57F;M5cv +zS5rHmS>)FHJx2N>Iq(u8RK2`iIZ4OZ@Xk}lzY|J-=Cn)gqmk=g_q<8 +zX0|PQ90~_=K9p87d=bh1Y`%!QIFt9H6q>wPPqfJyv(GJRO2?8C+oNc!yvcT-2@x+F +zl#vs%n$gyK)q9LGULljHMRL0fj||NSi5T3SEBVzw4RF9rbg>;rYO|L-6^%`KB$!q+QULn +zjUX{Q^D6|%Mt~YEL7OAcBsC*$A{f%xmFBReD>r`G8TO=FLK@5fsVbb}*0M990Bw-V +zpP=v%uV&(=AWoNbPB5VkHU)J;tC!qFGUQoa^2T;63d=PPF}W(7WVP%slsv@b2?`JS +zc9%Toe~^cmJfYP~ZXy}-JTG|@`x_+>Fu5w?$mc_Wng^IXLE#~v>yj7#5Apz$C$xIW +zO(d%+=JhZyc~hI~Z85dB#!(NTBZ8^TftsN3P{&;A;{QQyF?B+#m)b<4&lhkP%Wi3x +zNw_SX=T(#H&@B>lN}DpZsg>zem^-Dd&az+2K7~BFQ(+#81jXT+2W$*?AuOK$6++?B&TPzi0CpiN`#R@9a`o7(Iq)9G*2pZ^r4px2T!yy`ZUB$!K=q}hC? +z&|cCtr9Ip}8K;Qsk-W}uuH({P%+W|Q&c2m$HAb$+NOgu+!ST0I2#&9<6>;%PF6Q`c +zORqBP8QzSXiGTj|OnirKgpkvGD9NFO6KvHvBT@AoA+(*D)LlDH?)dhtJ=s>B>z+ks +z+qoY1_TKFH@~}O{R$Zx9plSiRpG6~9&gZ1SD0%~gQmXJUx;ovSLMkpNe~*bT^Q$GL +zLo(A8d;^6bUVKa0zR5l+DmtU_%dX0(YZA`lg!t|czl~C1jtXbnzffqtMy2aGe$zGV +z5(>>THoMGJ+sq5fbh}+cxf)9Pw3Kd&*mv6bqITa1J}eM(8Dc-F`E6f;2y-qVzj^l6 +zq~bR{1((_u6D%Xc5G?f)+;6k=ZtKUwuF?9iSp{%U!d%brBAE@|t%9%#QC8Agf(U#CQKRLUS&-=W +zJmLZv(%ljvlN|A~pS3TpFQfq`RmEXLdNNu;8eq~ItzJ@d>R{6Snul(gDQSR7YqWSs +z<=n$HJ+2W9sAWHA2h)T!#H6YyLXH*o79|ZaX^mDd>2|lKfve4&u81QIF=>q!52*=Y +zYT861WGdujE*{tV1fZFSD)E9}NJ!dk;heqE3B`m1d(oNA%9(TlFV(iq~araOC?S|3*z5Zv4+s`lM(bh +z;(8I5Ipcww$9x5)O%D3I_LxRAjc_q*F2fTPp3B1RJc~HkHp%16$@lDMG?;lelA!Pe +zGxMK=?eqrQZXeTN<}y1$;R!a^CEMc-w!Y2g||D=Tr&i +zTt9qd^SY8I`<*GX({6`*2rvK3Col{1(`x+_E%5f&cD9J|2?1Vq)m)nP8MtHJMVhKj +z3x0T@7PVyt>FUtjyi`RQO>q0^FQ_Ma0mGR_;N}S549%BNYax8rrpHTJIGtsg6)Gzf +z*&fKAKV4-fmY7>$S&pzogqb5q`0_9k^06GDUmD?%*#YV!-`^`0rBm@2W@%WxvzCpp +zES@W3r*a$CXlVKf!W+8EtKPI*L(h?$c5NKu)gmqe@#bJ-sepDZ#}Td*VFiS5;bBoO +zmAN6@#X;R5GN)f#FH))YtAiun=@oCAtzr{5&ynsCsZ)aO&ykd?n@S%5d#ZcXtNvh* +zs%d`4soQI5|DYN47isYJqNA0o0kGTbvO4IjT1ykVLu{&>iJd09ic;|5xqZ@tA=QDg< +z^I}JunC5|zs|K1+Omk+)@k;+&Q%t8O`IR8^+=#y)9od2Qy{IwiuM7puuMGLeP?kWa +z(;zcHFXYG13kA-EYaMJ}Uo< +zXy||fSkc1>)Dd#LdogF=f{pY}L6D=J?c0TN!XnSaS!tN0L3z}ZA +zyF^FB?hQLHIt-cu*!j^<`jg!Uc0qI{`qdY9Vf1V8^n*Px`XMxhu#2KS!QUVDu;@(W +z9RPbov=#QB3wuHP{jv4*HyGPUe?zgiAd7`*R8H9R!%>|mWH55yXXy3YbT~xr +zhe-!G0v#apB)l^|m!v)0(^q@zL>}#inKnNEPdT?)!s(yLZ&~mxGkjD +zwIS(4Fh$y(%v3~u+o~IgELlUF_3G1rM3!Py0-+46-d_|TvWz$Bi%j*7oJE_pgP@IX=yfbec3s&+w+7kXoTuYfNi>L0W5CQ>_M5rj%Hb +zXL&Oa6Qt+NX2fc6*_dfok0KASj>43ND4`>C#C#MjEA$&>+UjQ`-UwH|H +zc{F&DS54R^Lb$&a4wZKjnNTA)hrnAQeThj&eDnpN*i5WZ(x>q;HA^JZNT +z2FVOWHeW{&rVd+_a0jSC_)(P3MfLv5rZ^v)u%}q{7I&e|oo2I{Rj=(iwE2nIB>o?P +z^eJ!pXju22Nt>UUP2%Utv&)Eye=SaHpYvvfW?JLZY4Z!SNmGjl?n|=?VE(6`BGqRQ +zlL7uvfp?=5R^)X8O^hCY>55~hr(zTj^PssG_Ya+c4X57z_f8*!=)&y%^QOn +zT~$IWv5z;-Z&(*y_S;y9TgL75%Lf%b~v~#k$eo)Yui&S~qqL{jC?PpuhEFchTRp +z*g`tpG_Y!4M`upmwJ;j5q5{@Xy~ti-G%hytdvQx^P!SG>(|NGh +zM;`)DCF~8+2GHCGdsFlUFy9Y*YxF4M%!j=#+75Xaz}_C+4Eq7t)zRaKvk>;q=xf-& +z2==aM0Q(<=y*p(xO^1gtQ};wiLQ;j@hoj4Z%xB9Z(W%(K1pALhr^8+f`*_9;u$RHM +z?2MbSu^bx#JL5xatiVRZ&X@+$mDq^c8Tjdwlt;0VN;1sX$FPxRXMBc^K8}rayK(tc +z!diumCU(Z@Xn6t~nRdoZfIW$gEIZ?JOe8*IX4@G%=@?8|jg~fc#>1EzPh%s;&KL}w +zXRy)1&R7PVHQ4B4XY7E_T5ROm8Cy`^XR(oQXN<&Ld=480cE$yuejXczcE&phy$%}# +z?TlQM@&#-Z*%?0o=S6G`voi*Q`Xy|Ppq~^(wDs5+WoHaSQa%G0+ZkK2@d{c>?2P#U +zeH9xM?2M*Jx&a%dcH=RnR?6$J%k0ME$leIMoa|||u?ZW~?Z))(B;^g*Gi`HC_bQDm +zFOz;NGKRvXrffY(yP~%u^jla&t>|~?^)`3~qWh8mT}Wu1#jfKTz^0KT(xQ|dE9#Kb +zCFtq~pj8KbexAVe^uUju +zMu+@KyJBy*AWe*aM>fX4BOBx2k&W^1$j110WMlk0vN8T0*_inq*;;{GEo+@bj%B%U +zZ`hvZJ6%E2L~LT`lu`pP@^(7_SkYf-zug{oAbN=4?OfQA=t`Obb_dw8=+m$}!cL8z +zOf$&t1Urq(XLp93Zbdp%6;|4XZ%~5hLaMjj9}QOY6*_9{0T`q}bRi9-eJ=LLqJNU! +z9tb-%`Wsc&J`bap7JUK`gYf>6u2b)(L5bOee?w3VmOaD-W#^%=13VP=FxU~RNquri +zwU^tusq{{tW*&V^!yXOq1@}tc2sFYpv>)Y-NW-CnsO2%-QcJUCy3FgT}Pb|w8HX9&)wMqe45J~9`pWa71seT7;r +zES9c|Pnh8Xjx0ha$e%`!Scq=6NDE +z&y#PB?`5=z*kbd%GB(W_9A25XBgA=T)V8BcT#obNMr{y}S_{rQ*o+#_Td|o_Y>qGX +z9`sRcuFnwT`zaEN{W<`7rL3Yy_KAr +z{|ePx|am^l_t^@=tM#@mS3s$ngvZGqZe+8G&A)Gq%+_9c6#aZ{O&|dED==DXaWA +zToC6;zk9Si#dZshV{EJS>%%C{D*=0r6X%tH8|T%4bJ%SNAP{u`$IRA%?Qf_Z*c#{X +zCOa7Hx7ov_6T2U}U~Ir`lbBs`xL*^rhdVK^3Azy12Dvl5C{7Q8!o(DtV;UPVXRyL* +z{Rf8Rv=DzlY6^XtSzCB$PIuRnGx#{PTEB>n^$pou9f-bhi%~ybjF6zeIc|SK;f!sy +zz8F(B60x%yQBis!b0mUUW(pDI<<3AG8*yYWE@|vqM!}OdX6#+SsU1N?nycvb>8~R2 +zJ3RUH1AtQ6kC$CFpM+;{0Hc^N+P2!@eWxGU*_vF#kp9@3V0 +zcCg*B*hap^Bn#t=etIq@>|SnLHI>@vS9b$FbN^|f-Jr~h3^+qoOb +zcnrpSWPAn1XJl;fS?&Hq|KB9(@||>lQo4>|Itg|>M(w%v$?820bgjvhv+ +zs`kC9DfAEiE@|JHZTwx5dp`Z0LC&2nCWEe=+u=H(i^RxrV%&%rw^CE+AN*a?eg@n4 +zyCnBs`nv`(@Qj2##A?@!X6XcpvB8OPRtClBMopoA@OMf3v)IPp8g}P?v?q5c{rQf9 +zb{I{@`dVEk(f{n+Y4rEP5-Qa#WPA)`9vOeac!-R%#*^_l8JEL&o{T%m=)94PuDb-N +z19`aO`mX`(F4;bHw5W3lsu1*>5jbp18rkQb>gj4FSD)gD9SJiM1#pM`kC{b +z#+KD%Fty!Aq8@$8cm_r{GIo-24z6<5O?%-RiBC>@^rj|gtbAO?7E5eb)Z;SRJ>YVR +zb}<>ZlR^JP6fh=uF}j6bQjERO10y;?FmlLX40Ure%vB6%3`Ti!j8%vRjPIc|7&E;X +zd7&Onq#C^@3dR*MP>o757(?A$jQa3GHJ~vVbCP33t`LmAWC%v37o&UVO~qIaJ*x38 +z3}754gE7?2#aOHu&=`!WSntKi4}Gi{my(PzZi4}g)nqV+y15vu6ayMl +zjjhQs@B}?$j3q;=vE7T&Gc=NpIj+X*&|^@(hXIV(Rf3^zF2-5#LN%Z<7`u{V%q9V2 +zY=P41i6dpdNYiKsUUsh#Bb-tu2>oCHVKNz933YK1o>K&948mcFOIM%#@{Qz!bv2@4 +zKt6zy)_Gi49v5u~Bc;`+{1ocbC)D&C$=ZKQM%2Greh*?vPn=33)7anrg~b8B9>-`u +z9QcIN%d6;wlZ!pLYo>VOOh=1nh`t)w@`$fDoXtNSLW`(;pK~E$m_>A;yNC{a1DLJz +zaDjP!$gYz~@4NWCd%al-am{Yb<~=5mW+v}$&X*p>Zczs(@*8=7ix#*vy2;oFE +z!`+Xop$b-5ryoVygAp*~NJr+=n+Uw@sus`dHGom{yqXqmhB(9?D`>mmB3#k`!tc2K +z_g37{2Uo~PCDh@Is4XSs+i_I>yJ&xK3Juo^GTOmdNXCU^^ufh>=5#Xv`6J2YjX-5@ +zI*0eB{T~;RTAjhd?2jn|BMWCup~tOM$aS=u)zBaU&CKJ`u$+*NXVM52*JtV~I-3i_gP?UoYk +zLu5vSB>*UQCtv)W1U!PQF19E`fncJVXW~sEdoRToIr#l_*P& +z5WG%SFJ%;4I$2=R3=K)j9&CRP`hcqF_~G-wR*aSw*f +z;4@|m!9+3yApj@5MiIh(f8kN)ezj2x$`66>$;PA{xf+ +z5R~RvZX#0J%P;$T|2)MQahqT~3Imn+h786~H#b8Gyif^f3`TZxjQ+O^#_ePXMvfQb +z2Yz$tyuem?F%J5(=ne!=&)8jpQ3L}RbID)~ +zb#pQPRt#ti#@yr>el5i#VzyLy% +zdj&yV+)BKx2+$aWgUJzYBLO39h0>hX(|Dz!55r6$=wG7o*FS^$gz-D`KGAO{!xS!E +zZuMX}TULR|&})T_wg!Zq<^@r}F+UML(ihB`Yz#1!@B3q=tbf|29JIPP!W +zMlfE19!tRy7{JI`AQ&AIGW@9+&=`#T1QBB_CIJ_37nElF28y&8+Ksk174^EGzOt0IYN(xf>23@j9;ZkYFmMi5fJ0|kLp)1B0bNzMIv7c +z;y?gDU%+G6@IfKI3v6KWnc3(qjX7YBCIx{&XP;#bJqp(Ua +zZiWGj4P;@q)s(z1%6VD_n}8M8ayHxgUMhF +zb#ptqNim=?7)O$0yozX8iE1xl3@qa@KHIy6vug)3&Z2%{8cib^>;HhBFQeLc<*9-G +zDj&U6viL?m3NO?e8q>-A1QA1b +zUM>{ZkRcdFA|-!**$o22a|GiX=z-B`g8?0mu +z)VkCowHpO)LqOE}CX%s!FZ6uKmW#X^hwRCLly*Wq@KGUN0Rx5mmJB9V7nk^JBmglq +zhIsa^AaaLX4%u@b6M{R)kiyLsDf#ouZXBpojNhS0;qo6BjO)l?40Urc#={F3&=`zG +z$uagL8Vc89m4mU=i_s*|sJ&EUF3A{U9}HBZ`4fVnZZ5__#el|OtWJ(`7YP_+Gn8iX +zulGppW`VxI!1%R!QuOo4FypsD3g +zyxoH#<98I%P`I;JGcn$bSBsSP^2=@!D9V+>JxDUf_#Ordm-)0{sGEz?3SPi~#$fDD +zj&Uam7-Kh-W*Io{#mEYLrWk#n5sVvQ0AnQ?Tn%+|F;*)EGzKGrcNFw;MLZrKAsVWY +zy2ims6{%B=)`3eqNHuzpjH_`i3}94|!5Hf1X2^vXssW9`Xp$V`T|@&$WUYgd<;BPj +ze5V+lNX8gf!T`p6G8jYMT#Q!~0~&*olN@6+q5;Et*1_oF#W+1s+EJ=;CdnA%G8n*^ +zO9o@8n~TvCUZ@5%2BRQ3#w&;hj9;NNb7P|T!59t$7&nl?80zL?Y*P$q +z3G^cL$Sdy<*yYGc#o;Ht06CU}Dv_t5DD<*B +z1x9z4PJTiv9`ci3luq_1gFCs@lf^f(1H8~lXiO(pCx{sOc|_wOhtgoI^I~)ke6JW6 +zza$t7V4&6?lEE136EeK27|bR-b|1-lyhz4+ +zGB~@co$Nz5X?AE#_M_hHL%9gwBO0=&yo&66kA%5cNGH~gOQ&cV>$`A5-&n&W@VvBor9x)VCLCUjm*~tqYn&V+&~6bV_-st!SF&g +zpfMOD5=2~$9}o=#(rhCzctGZgv={?2AaFtv=8%Ld@d6AW{7MEREJ}#JQxTvs2&)rB +zjBxQLLAZ|$Jw8S13`kMnwr*01)rx`YfD!wZ#w#$aqp5HZFfL_;N7 +zZFVrWdNGCuYUc^YJd!cSVHl{!nOg)y-Q0PxS23V57}d!!7LkB4eudJ^iz8l)O9S&2 +z8h5M0lYZ&=?GhZZqQLintnW-xQ1zG6bVoq|Wr59BABKs_{Pb +z7?h(hfYIqK!B96h!(qjM#$c36>-zUQ?F|j+~Nnhu=gqE0_17qnMg?!TM +zvO|dPhJo?hK?W16i%Z-YULc0X5NAqUSHuLJ-xq=_$&kWjiIn{LW#1O~jsm(L?e2mT +z5Yj#n1a)zvzoH1x7=)bU2se^|i}nJPrV7JET8%0!2u#SADx6YHT8vv?7(kd!23J8{ +zT!ilMLKUDf2qno84j~%Gt;>fF!fcURmlDFmfu9s%IY}7d9T-43Oa>#Ui;J*H5uh;$ +zE0ZJSeIy8@$&jg2EmA%7?brPoJ*iKaI(MsnE%bcBx!V)je%s$)%L5f>N_dtpvIS2#wsJBzawx4ncnl^>q-8+p9k`|!1-py(FM+m#j5o>Pkx-=*bkG2Zkr^79j}lJH +z>l?(Ge@8S-hK8RYb9X#q(?z72v;!}DL|{7w-FBQ{x) +z#IgDniU5y_79|tR76G0Eoxp;@K19xwvBr~+vy7vE-ddkkh|j$6LPUClf#=upJOo}# +zF(?}Y9goqzj^PG$h+L__?9byPZ*ARr1sao0|S2=Q~(=BBxe<*#~^h2MBfN{X%^c3{bBmgQ?ZcrT$Z?p)u5j9u%4QClC$P-M<4h +z7p_R8OHsK0_*N>yOp@^8vI7PX{vd-9)Wt=Z0WTB|8iOz)IYQ6x1>q(#1fg7{dw_7r +zcj~!Ph4-Mv`t}D5AT<6#5Y)v*IIalL7=+o$5iTbISK(zS&0wq&sWTYA`JPdX-~qwN +zh5?N8$lyw-n~QM^yif^f492?T7!M*E2IDg*4aNqMI*0%7zK#Q>8ZCbmj6xW|m`ny^ +zY)Z%wg%>cOF&NtuL_9NJMl@jj1*KW>_j{!F5nl-cVkY +zImYm$pM<(28BBf9lf^f3lTt%tsE;Oym|_;9fqEm91|x7iO!}CF|I$=C>YH+&6tC7n +z!RQDB#T!KiW2l=uhW+4$;z46DQYE%4VvJRY28@58G#E|182|YGR*b$s3q~0XU_3wu +zW2l>(;eEw`#$aS8$JmQ#z&QDkgV9E$&Qva&Jk&9F-;@C|7AreCkZ1w1_KB? +z$Y2C@amVi-MS#X2EKQDZ@^6ALi43X)3Rmrs+9Ce|1VrIpQhnFoNzcT)L|z2qTK-8z +zQnXu1!Nf1X0P&Y(FtNJ0#P|oSxoFTB;)5OxIg^}vM2N?eAqYoBS_y`oU0j4MiU5s4NS%ok38&!UB;avd0Hvuyx=5>w38Ak4>cLWlZ=nT3_Md_< +zhzzcRy0{2^;f1LKjX}sxj<6WfFm-l8X=ZQ-kBTt3f4^cp13hNQ_b`AFJ1!XN=3-2M7cihP7;BSbj35D* +z`T;1-BwZ&`YYa`&=KhAmq!N3f1;Q!+3PN8pxDx8(BK)KX&=`bm64w>+c-)6*m>usx +zDT|9oYPa;`mj_ti;J>23oeVR6yF~7cUu*w%rT!RlP}e#k)a}S%YISpgmca{!gT_$r +z_n^r5-GFGIUI(SYIOxU5_7A;4ibr?)4MrCj7{5!&U<`G0F|y$W3}_6-(c~CUA{sEh +zh01<1C+pk>kZ^ +z>mPHWRO5P*@t~}S0gP|RU<`G0GjxI%ssW9`$V-k<+b(QW +zpvAm+5e5*xB7+gs#YK2o5uh;$!;&M^3JAg_WC+42k(L3Wo&WOTQiZ#q1;REMK=_3W +zMo%^TQGp|GZ~DaE-u1GMS#X2 +z%ubHbn0}p-=fe;(1YwRytAWtbKY4^yp#oYUyaodZ`^jJgb#W1T!3$M@#vm+8j!-Ww +z2>r>BBcn>BtF!mOEMTk-CT@!6ayNAu_`%6N<=W)kRcfByclQu +zufIsDF%o)UJOl$6TgYGxb#pO_;Du^HV=y))$2ciPFvgHU7&ry*@<{DG|C0!aQ}ENO +zuN@^l%MW_xJ^Y`m{325Ec)!GQoKuf@JDKk<9x0vl*OE@Qg@H~EC4)PuZf++#!V8^* +z#&puU(dO}UMGUyxGmi93v17*{_GvoCu0UN_+Wb5AyFrK-^w`0(#7|?JzI|zmdTh>gHgKT(20= +z7>rR~4D&g5k2-=;NroKwB_g%PQu)vKUp7h*c0&t +zp)?3vMOp@g;r>$kD3k}{%({Xw5(W@vk--T26QcKo7pee_K{%WsVuT%t283GmfWViz +z$3;qe`DKsv|E?IrNydY*6b3NfB7-s1&7BY16ayNA5xFVpAz81!U=)!-82I!pQ>2-O +z!m>yE2hc|;ai6|<75wR26-DUUMSN?1`o_JRAWcs1#``~{uw3LffPty@6AbjOUYhhy +z-Q3S-6Z=nZ9tpkptb7=a2i9!@o`^?#!njT;I^9~h`cDH)8RZZ5_;#el|O +zq)Kd8#8YlPq5&h?2pIgfKV76t$I`67-aocjDsdr6xDwC70KzUZ7(rd!=$+w(Nf$22q6p9!g#6?PGZ76{cpge~ +z>MZg|?OFb`G1MoVX-}wrcn0aYXtPCbjU(bY{)LcY&0awYCO!%SMayg~#OmS_m%W)sywSupScf4`-&fd>pKjk@Lo1{>nk&n6Qb6#*VFc!vf2 +zfI-)FQc^r%K#=@!0cwa}bt{s-BBNa^W!yb9i%MvJ$C>z3Mt}O?7wA-W7_u`%=ggqS +z4Ya@GHu}>SdvkY^^&M3vcMlocnv-#mjHg?Wag>aGWc0!LMMLG3P^fPL57PhKb4y?B +z<@3pzE$MtR{Vp@Yaz63R!FcoK?oN3&B7i;gvUdcwkt-jwgUOW#Y9|@yfY~i_=YXjW +zoIhTsOOGs>E;qrzba|Bwo-XR9S$re2;Ds3rjhQY7JScM9wrV959mF-*$pRAYDGlFOtT*OH7e9)y8v +zd`t#osGEz?9$u&hGzOzsV!I+9lkVAqQBH3GSb%tQ{f&mOTGKRXj)p%PmI57nkX1+ +zpvRzm2Ll*zWDIq4F+NcY4$jrsl^mn_nSwEb48b_+#rQRFyJBpH9vDBu07mLrf}w6M +z#wd898qk<(1m>E>%@y(7=s^M=lrd16Yw{){&7>W8*?$GTqJZwY*~_coHFO?D=xTnc +zfPO!b&MUO~%NmM%0K+7zGvlma$rV!L=RkqZ9fpCe +zw-RZ=Dt9-G43P*SKP#4b3`{Z9;F`2S;5gX}fflv=5Tu +z7Fp$Pk2{h_T#vUWPrDIO;(B~UWL$QtyxlGMnWp|%Q)itWpITkq)N5;|w(dzf%g;rW +zxYRL`IjOq`hg>DSewege?5}I2Ru?z*8RQYy>-6NQL)~ho&h)0v5AM*^1*GNFGvVaS +zYISi_KUOn!o8+mNds63kQ}+rMmPxNa*VGw#@u}6tP2HS4;(DEzJatb*i7R-4H+7%j +z7EOHqbjgg14+V2`V%*J<4)^*}P*f~$+0x)FKA^|~Z^ +z>M4j4*XvSm>i)r(HT7Ce{d0}f>f)xpuV(7$$y2BGsF}LLn|ffd!xZWD5YlqN?}U>x +z&D6zBU7I}OdObIJ>b0KK^S!AD1=ncmA2fB=Iq|90#Z5h@X6mKMQ=f|{rr^AitrVF> +zZ;$B7{MJ*Y$5)b$dwg$=v?_Pgo~W62UGlUqdD5;ISq{<;4L+=CztFUS{P^Cg+)aBe +zdBhcZTk^DLAWGcysuo!)&Rg`dFAS!aOOMBrmU}$6Mrw6&Q~z2s_3q@UpZBER?@fJC +z@P1AGA5ERsGrrgA;-)SokGNhRPM-Q~M2Q>YBO)tCu}1}?*GP}ACLQcY;Wo@ +zLF-!Sb(N-mt43;daZ`U@Gj)gLseg7;^8uA7vPu+td~lkk&FU>Z9zllNW0kvUi^wCc +z$0L%btw5Bx9+!A~e0lIUP5rl~ZdnkYT3y`K@6}9QmOS+UM2SmXF0wRpOj-67!O7F4 +z*t1B>Q|z%Csi!AI?n@qVy`G&Q;Onq=J*g{2=1j54!2_DQSszK=j|{iq>f-kLjhd;e +zlBd23QQ~^NN@Nl3by;xSbm{eDn);m@snx|zokt#Vy^&vNPzf5_1jekR6HhJUy +z>0J6tU#eO}U(TX0Rfzz%G@nTnoNW)0uU{1&5hd=W78b}GDZa5fS2l2C^+yxK{qEOX +zy7Rg!P93E?n>B9aLaEjnQKjlp9SiKpTRj&FG&nfYE-CV5pmm +zF&hSF4Hs~6+mV56B*jqc|QMhOgH+(`ykL)~1AgNgx-!KhA- +zu^!Q|RD21g!Pqa-7)nAfdqMCK#Yia8h5RCu8p&=`z^$uYh|G+;Ct +z>|h-BR%2nX)eTaO+epTPvK0m};K&&2=3@M#7#y5$5*|;EVGR+C9%M*00{436#^T^= +z#aIPB=EnChfRQy+Fx1V(m<2CX0~%9}REh11_;|gC1YC_bp)`Y%=EZn8n0upC$!P&XH2 +zo?<{_sxdG*#%qWMj6G1ATc#x<&7>W8*^dQNZ;D?xdwCVShSs@|*3g;aTXPM?Ez>G* +z=hg%lQdGW6(~ewusIP*7&OJ>AcTU~h&XvLoHHOA?ZdLNmH5x9R8%u`VpNiaPW?Vi_ +z2%CZ#6@suGTFkcJVF01s2tiO67vUF0fW{!COI%mPv+W@gaD6|5(#*DOky01C +zs}PL5iv(jF3}7rHgDatKZiZ{&g-SqUFghg1s5MeBdXXU*1zwD|g4weKV>R@s#(!V{ +zBl}{(P&XIjU&VmNU=$_CxQ_%}jiXSSYE1BAd=Olt7-L5X#vL$#v6c+3hPt^Jv*Cqm +zKw~hdFuOQXMMevhH+-2PQ{XU+L|e=69haB-*i**70OPLIhX2R2Gehm-ZmO7z0D)T +zyv4&<$G-)SYwAUs`jZ-|)x}NyNzK&wab~<+ +z0T=sUH#PTox~8VjQ|&*3Q*V_*cN;4`o=S$>W0kv62a-ozkLM&$`yisk^?0tPWkyQ< +zSMZRguGZAG$Hk{s7dQ3WHB&E2p1LEV#LeoZBEtvS_CLY#w@Htul8&d=+cnav+)dkq +zJmPx1HhJ1ZZd#tz>%BexH@HVrw<(d-C1kk8Ru?z*%QaJPO`iHrM2Rc*HgD<^!HaK~ +zUcaHK8;p-ntuAir4&)Kn>z&C{=OId5v3HBC48`_^KGL*PNyo*0szzFsyJ?@Qnf74v +zv>$rX9v0bBqz#1n&yn6nE|aupk>M6v;wTX +zALk-U+|=qIGH0!hg4=X#-4n)X3WyQM~2mAh$Y)l6HOJnfHeS{~dZ-!x(^v{>a7WpCz3~8ud5RTd{9k9l(>Uxx5%7>s(Gl^-O}sVH1+-( +zsnx~p_5PZv4#_>}- +zf06OfwPg4+DgQK|`7+h)#io)mouTtXXH-%~e3>dXo#NxmR5@huYM^Roat^g1#(Pg_ +z%zMwd64Dj%VR^M63#CEm;6+#w>U@7ZLe`CfP)G(3hPt>2 +zG4kLlKw}W{lOx=YXqXRALTM02co9~GUPnO8i5<}MJvtbuMB|$TL)~1A`xOHkgHe(k +z<029;MkSP1cl-m4r5>sMRA|2jd>%4ZReDv=hobYP_uoRrQyl+*3|={y;xB~mh63H` +zRw3OP4Flb|oeZw3y13mLt8t+*-C6C)E*}NGg=na1`Yi4aZoaM;sWZ1WgwhrW#&D8x +zRd0X+j1^=shPt^JKPm<^24ib-jBgPQ7=fFC!Iju9(qdF%M`)oUoJtZ#7!3mmx01mK +z>f$1l!V5kA-CT^{6$2WB +zaU?m$W<&$V-%y%qe$q!bnQyL$*PQ1O +z4H*A{(qKeHN_+WbSBKgxlxn2kDi}pDfN?DujG=CB1{+?$fW}~?CC6BaXu$XqN`sN^ +z#rQb%xMHN-CKx@*a4!(m#YLzfkGKoOtmNr0M--%&)H&YNJ3}oNNd+F))Zf%dtuAir +zV>MIfB~Kl^y=LlsZ|YA%4{Pc?((+U+hZBm=g;y6h^|j;?*Xx1FQ!kE7jpeP)!!@Uf +zy(zQ>sWF1Dk=7ip#iFXj;kqT%7uR4|xPDT&?sH^jj3|W|i5uZL +zN8e8|U$I_+Xc(F=ptO48d*;(c>Rgy@3-Nc%|AiLcF>iT?WLBki< +z3_%zr2$@$9LdWpA4@nhL?-qny7(kdx1|t+L^j0AgUZ?^zG6@nyjPMnrVG=aH$3dtT +zgkm847GWbiNIs?rHMh&zsUiiKZph)D4_A=cs0B*elSjU9-E +zi|t<#3(uXX(urk$kl~bjYc3>RBp`Y4%l<3$8-n6ky_&RKqj~p{ff~I>1`m_EInhVH +z4KEB6GzOs{`AivlKSjeZ-Ajfnr31YfM?*6n7L1eU3r6P!f-#j0#!xpGV-UP}wvfhP +zj7W}g4AFqm^#KQ?*o*OZ$a+LD-XIxQYP-Yg->2a0kH_3y@K>ugsvrnv!{6j4?U#Wp)uK;B#3w^{V$?n +z3^uRi?07FSU8J;^Uv{VPQe?+!HQ-UwV=7FBfg(Ij24kq3TZC)ig(5&>FlKu(%#}r> +z#{}a7GGs>1^?Z`F3mH<0b>2#J54T$(l~@iv +zD)A-^VEju4W2l>p5rP*mpfMPml4D%{q+mQshG1;-V)O{FSB#UM5{&jRfN=#GjG=BW +z#@&hmjltNN9AhVonS +zF?v2N7&nn2^Wv~bD=;te!kdR{Qp&Be%u7peh`!6;0QQAPsBcm_&yNm1m*=okJ%G1AuwMllRvRFT2e +zP&XH2jbcD!Fh(WE2)!T}rDVvw*ecRJm=|Nimpm?&_!L?UNa~A%FpvyJP!|`WJ-ko} +zXbi&c087|f$0?1}{_s8iP=g9HHB0L6|~@RAP=I&EZO%QicEOlO2CW&m_nRux{8B==E4%^0 +zaL?^;XmQW&lpT^;l@Sd(=w8hXjmezp{Y2ROzUX-*-~yCEX@1=_%L8f84WGSMvOfYn +zvTr4W`>krH--Awq82yIEWN(u^`)`Pb@;7+j$)4lQes_4iX75ch&OVV0&aP@V``wxy +z8k4H7ib(f2wZ_{`l-RlC`_-)N^%#Lb2RiC2bE +zygz&+V&O(Z9!dB{!&oxT!QD<(INl +z5MydUW3nGi5OJUXKr{?a`iD;T!`|%og+JEpeM!dIOUdBus&)&yO0z>_vL8*JeKDdT +z`)g2IUDu1O>u3CoQ;L7_X&Tll+%(NxfL=n&LD!?QajsF;@-JFolr7Wf>#61^^aiYN +zPP5_Z@Ea6*t9&L?LN;D@Rqb^&J$@-9a}6tgB80q^!<_BbAJO)qq0aXCv|aGD+aA8g +z%4^j*V@V%;)TQB^OQCGLVNL}4EkQDE-;x2UU_QACM9&c}^ +z?Y8BU%Pf04Z~utxiMrMNV|soG={2x3E8h>_Peo*mh`&8`6w^Fk(pLcTlkn@L;F&g= +z!thu>L55j-2P!F~UxssDASu?~A0fpG&}yg88i=5(%)gR8Wf@ctLL58eshwkPA;UTk +zki`j-JBrdIp&@DK#TIQc&T6BHGq$h?XayTj$G=*KX7s7tJm^DA%3s0U1A8FM6*HPy*@ +zAvJQwrBGS@G4=99mP0bzA7QdRs%!WabOZj2)$xhQ8)WON#9378zCt6krGcZkkbKU- +z&y9-5a%}H#x4)$Af@gJ6az+p8%Hy +z>_en){w~f~%K~6%UdOdTwu1MzD$9QDwg +z?^?4%6>YcZF@XY@?Y#71j{P>ZwVe##Q(5~jZJ&SDHRYDwCnd1lWaxterY$oYYcVA4 +zQr2&vA$gDX_x+Y;!bUPClF=8fxu4P2T-wV0mW-ds;OUev0d#onrvkYMg6Y(DuS}<5 +zFt7?=M+RSCshc~cBJjdN4~@CL8Yr<{5l@%Hh=%EM);=82J#iu!AyQ{nuMRN6oh0EI +z{WJ_9d`Jc(sEZr@E=7RGAe2a4&&*EUF9^A0;MM&TT0kpAJc4&oLC;S4>NV=sA!@sj +zgnSUFXb&p>O(X&V4%HbN@?nJJBYV9kx&3XVv&uhH`9F?)tH`xO_TI>4D)0220N+T4 +ziN4J%|30!niWSQHG5pvVjZdLY>pNCbR~<*_=w-GtxvR`pT#o +z54)=3LpnvQ!eQB)*WUqzo43Z@z75+82RQAUX&WnU0jtmcfm)v`qSijVeJi$G;Gi?x +zhiSWDJKFn3rqe`>`XjpN_ZdLjnZlD=PLlqS)*I>PIL6e}wJ+su=N!`G!vDkGyMS3a +z^?&2{+V?)(d-iT-YNndbQ%yBZ(=^pgO`2-bnPfU2gh3KQYAA$34iS$^VR!#b~ZuY27a;cj2y +zXSw6|>V`TSX?F%)1on<)nlqys>W=i@fV$Faz%RXpw|j9L%&6|GLA?bP-TwjNClJH7 +zWZ}1RjPx2n)K#kVBk=nEh})>IQB%GIaTSQcjP8B_q4fxL4?{!Rzd+On(V0YZ5EDss +z05O+DHxQ44;3cz@=J#tq{n^RU-ahy$ZT%erWv-WRP|i8^UH$?JrxdeX>m@Fycz9ju_qcR~`bAhWZ_~ +zvHR)tEmJ9tdW*5Vl$KBTKBh7@>MH>e>`G##QGaEies)av;?EoSb_@U2hwn>;pW*ek +z@YdfM?Sny>$$;_M*M6pVnuVWf;Wzs5xPik}xzt(Strq@_g?}z^W^i)@Z*Ji;y^I%3 +zCddA5GPw%~nMPXlPGm}8#8=eI{+;o9QkQ3~pG$yb*m!DT=3YmXeymbvV0qT+Ebnq_ +z^-1EnsQLheSheU1QF+WhVXRggn4gogJ@-YE)}x50)pI~d +zg|g^Gh1y{)6Qe8CT%$4pk~DuqZA^3i9^d-BRO{z?mssnU0VdX$gAnT$olrcEV5XZG +zZGA!A)?55wtWN@A(!My=`UT!!*7_5~GwmOO5bGA5u)f_|Cq`SZt=szOAC2`JKp5+f +zr&_ +z^V2hFDW#a3#OU-4G`bTYsmH^AHtCrU0_owrYsN(`__&A`;8k@NH8}RfDkvVSi+4})(v8` +z8`JA{BlxRv<8Tnhjp|f4s=`&TnB2INc;?3QBP>byK%yA +z#*Mo`7&op;b>qbFm)4EniKiPae>ZLn1|e=(v4k7ztQ*8=Hx}3J#yVurQV_>JV +zH-@LWF*AIRbt5fe+~`b#Zj1sUZdkE|8?!0J+#p7~F`;fZUZXZ?B_7?7Rx-sv_pp_m +z8*YaoT1M6>faq32f-bBCAud>vgbTk}7l_d=RM+i-7d0*n0bz2YCN(E!hgVuR?j@cD +z@-hj!@eK%Z!-^%`xP(&731YMx3+i^GAkDaO6bP)kKQaxKOK^C#5%Z7TMskjwzg+EA +zZ-xGCh?@ba!&3p>KSoR~V!D3~qA~{JClIqp`~~7>60yekEgTY!K?LHiUh52f@Zh$r +zT6p8$fGsY(iU5*A8wo;}S*3yJ&PJKF^xh|wv!PcAWoEhcOlEZiA(>@G5}CD%Qp_x3 +zbY@LSal<_PJeAs5ZPpQ~+wyel0`m)(YVB3MY1}wKymTq)#*HB$#Em(JSSY0w-5^H0 +zG0%WJt=eu~+(T`2<1-@lYITKyRxu~qd)H7IGp%)o!43qW^LU+sVo@)b>fk+X;nOXA +zu@B##3NP@!w(xZpzT1a;59tz&TkYMwoUO*0c&2ft3kdB@wt@T3^zepQ_;?GynDG9x +zy=LG@nfAS}-Vj)Bp+6D|-Q3lhoa)K~?>6dYCO54QoV5FDgIdU(yVh%h=SfnB4hKRC +zZzc&gxFsNDJ!(ZZKqN5f-&QB%O=C;3Z0gSjYGT3tLZo(bNeWb5@Aab#bh1?gz$7Va +zQ&Ee&lPzipQA1alhYEZSH?nZ0E(AWmc8>V9HBvTA9vW{j5d)b?xK!<@P$N&IHQ+2L +zE0-tGM@Gj3umWNI)Ooll*o^Sd9YzanIY)SHpl7ti1|QaTE2$fosy*^8JXGm2%ty4$ +za-C74UrVTwMR?vnR-X4KJzN`jCse3$qBQC*G|$|e_EWgAvL>j`f?EAxevN(vk0*MM +z3gwJw-VvBnqhpLO+qEn3<-pr`!X;18PZz~Y;Y%MnxYIz(EcBY_c3`_rK%5$LcxrU_ +zDd4|IVLm|FXN3I<|3q*Cgykt!n`{&~m$pMeNV~Uazxx@{nP8SSF}nI3Fe(!uY0K-W +zjn(H5BK3(-ZG67b%q1#O$Jr}qU?Msk_*G2Pdz`>;JS3#$_NkiHt|TOc;xnQ(4j92?1BfI#|>$dX4vNa{n* +z#P+oLfZ7BWdY^ogvG-W$#}?{26Y~gtRP7aLaVGj +zl)~d%48fnG<1g%tKbiL12`6!kPzb@ASBt+@&a%UJ`sEwkJ=Ftz_0w2< +zQU%1)D+trqrP#y?sPHtDSU~Xue@-9}%0*!Z0uk(xIBqa>>Y3F}@C2}eJ;p;Q5RBY_ +z{0?}bytBY-j&37(^bAILkp+kdmXkB_WZ?wYAP@)!f2BqbiN+u0odw0glfVj938e>5EP*5V%Wp2I!ty^MRri&Wyp +zX5~b~NN#Z`yeJDM(q8Eaz>OsFtIc=fmIpGv5X6yy_V0$L1nJ?M`x1IO>P`3-k_LLT +zg|2s<=%(J-6>`J3ol5BWg@E2p(m>AxS&v#@angg~yS_m%BMakIcqub27;frh`~n5x +zyCoRNaWeLGLGT_O+rY_C6wM*(kU0G98=dWW*SIpN{pM45tLa`z45saWeDs +zXycAJGPeGd?%ka5olI%{6P@sKI!2dPUW>?#Rh=OCun2~l8JAW`(1lCwdLnkUj?FSI +ztZoxK0P*VSnb~v)YQywDl5fKr1uRAq2x~Ig09h_=mOf +z94*tz#+wkC5$pgxFNvVr!dQ7(f(k|-VlKU+W1E)QMpDg(rOvU$h>+E@MADd}}cJnv7raq33O_ww04{TN#4e +zb+DzA(YYUj@8}@>|GFoF?@BO$V%=4Q;Cng<|E2Qm&|vt#27OBSeF=J~Y0U}{{6Gg$ +zwWQ!a)ImC2jPeMEx1Iu@be3+j4u8Z%I9coAXioUkbpWIlq8^5Kvhq7=BT(Yu&sgh% +zY3HI`!n;_$URso`;&YZlJgtOk8UY3>?*PDKk|`U__&{rc^uOfCP?iSf5FD6+5!Z#&5H-1Qq+4no#49SjHj64r;0A +z#F(R7VN$vk<>dU{25E|n$_m5PS3o=7R@{|$dRump-+*?#y~KEJzzKPCK!?3qpd;QI +z(4NzTi#fLseRsP+P1Co}VEA!_oo1H@K$p3re0~}EO{TOy{ +z&<=9jw5Hk*gzS(YJ15BQ2~tr^V_6r~ha&dN7?2;4E!jIg3U^8hdVlT +zo0X)x2*s?nNOfq%+6S7#E$H%_0?(a8i(3_2VeZ9*Y!e!ZW~IpM!RXJF%0cI^RevU` +zTfmXe1=%il_?f``Q`EIM^Q@Eb+M~c(F<8O#KB10KKwSeJ?P)rcR1RTX4mZ-Y7a$~e +zKJiga4U!8i1f1Pzm%GK87R=EqUCuT%o{uJ3<8F(_HkU+a=L?KItD +z>Y0u@T-Z*BA@r$|s+`OPn258j>PyvjielBl3T&g0P`T9jj;XAIlYl!5lX_g8uB6gQ +zaib6gE0?NW1%-vjq%)Eh7XjY+{89w@u?puC1dC3>^hgI)W#_4cN}Ou!I$dg*Rtbh? +z;uq%cD$X|+nDFA_q=3_DDY2(l8D5U|0BhS{m?kz>8e6c +zghN_ZQ_(M48qy+lZ!Vqh2?x8MRE-x@CHM$~Gp3z~nL12$PU*J>!NPn)Bh+C|>47A{J%eO_W}^*EXOUznqN0RRO_HtXY0t`EJ-|o#C>Zj@MEPxqcq5A_C96- +z?r=AR!qHv%aJt&`3v~AGaAvvFX)}xFh8;%L0rGI+?PkoEq-bs+?pt`+oo^sYXmnFN +z6kz|p--snCBZthkO`e=GSP-1*F2r+KK3B3`5X`C2sJiBh=4puK>yf2qA +z+IaI+4pp`K`5ri>bnQHv@_Lyu)${!@0#e|w7naCIFYS0=`>XSUNK;NwqF#vnBHfV!$>o!|=jWvwy!&2j +z@Z5t8T42K9+=C4+sM}y|iowOH2JgwnN=Z`q!9fNsFk$e!gALZ!ZP00Ra0-{D8eDd{ +zHQ1L>KT9nzVemKrld^PW-3F(m7+jlb@V=j|!G{hqXn_fXZys!LL)`|qB@E`X0&Yw- +zc)w)lzJrWeP{LR_#)PEQZ8^l)L1Pq_3@3A-8Rss9oF0G1CB~oe99Q)8e}W#0R&$c| +z;C7?6N}2|Tq9zT^Q1l>iP20Lop-i(SI2yqU4pzI39Ew~n^>Aets>wV=EdZw5c_479 +zUT1=Mg;H#+R?1K0q;`~Is~|?Vj6JCdog_`MB+v8|XM;d1qZj*Ay;$|G^*^@14fMKCL6fYe?b+0J-z0|?_qrh)o-vHEn(3MDT-1L|NenzuJzSgC{; +zT`9%9AVz!9ylyY115m=fmk=&=$b+8iuis`e&Z5g%hk +z`~;5ciYUQ?4kjBbQcS8R=Ri)f@mye>p2H1*%>vU&7deL6CjN|s?a6EePgfeqGOiD&fT%>jg2|izRh?QQFCPF$;w8VyS_mjmV`ooq$#2-;~Hk$Vt7h +zQVB15KuYq0812Q1lmxoEL>d+vFNT9KUTiQ>zbo3jE8&F`=*n)nre>~Gi#s4DPFSIY +z6VF&Dh|x}LIV3A|(;h8No6ltWa;)2KU|YFH*?J0^QGZU3R4)$WA6knRAl?E|4WgWV +zikGd&9lsx(7Pz%3bg@%e1CaD9?}F&de#N4l3o!JLo=G4(XvRB-bJZF*>M8^v{mGxy +z!oj0;7uFlGT9|6}v_M8PV|5r{V)ZN#V%4H+MCn)7D&w`)Vxw+D!s;#5LaR>`rPtoW +z4a~2t)q%dW%9ZFYi}#9wFK4k%Ht<}?^HS#qo+X@RTMSe$mhLzbEZ?~x#9J%o%tane +zx|tHpBgSiQrx?A(0ubxVsD<9XLX`IQs#I^!418<7{odjmcD3FvN%eL{;B*wKc-sdk +z@%AJV^maZ7@z#n}i8BK!L2ntayBG>M&oc08oI|ooeKfII`E~1R$FK-q4G>6-cZ+J-}Zt)qZUT< +zI~M+j56?-3Ul$l;;bq;8BUK=@_PkX1!a%i!-)`YA`tagZ_@cnQ7XGJ&w=bb~Rj9Wlnl%Qs2FlcZfggxqr6~qNG*0lL>kM=!p$`O_w=&Qg3td5| +zRGJ;BwjT-{Y2lw)c(kX5?@on395~;?2LdIIO!wh?QsJuu4_Nqe3xCsxA4r8i64+tk +zX=O%xHxRngc#U+0_bbg~f#Y+LRQ60~5YC?IMiQ(v{{SJC#)>8CLkXo=bj0XNlWlY- +zK$6+}sEx%}(F;gjX$lS0uQX2u-l0NPnhOAvN^>^|-HThNFJh%xWi2z_^x_6kDFCth +zDz(t+w?sLmwwK{U-tVA+&yT$+&Olp{$TvKv>;pV=onUlM=B6YrReM}p$0^v0sO-bA +z+W!*7APb5c&_XP12mgtf!D)DiBXw|^(X$Y~sc+Re9Bx?$tDr<2ycvXs&N0xPg#KGC +zwa|AhG~U}nuQJf$iviuEHe2X$AVlk>K6HtJ))4xm`q@HXu+aTJbftlAC3K%^jns&* +zW#vZenIN1Y9Q`*MXl4zd`<0CPs|e#WuYZA%lC!7^pxn{ZsE>7q@w((T88vGJAjS&% +z7-Ll+aOqrZtm|#=B{289dd7OT6d1juuoIgY(mZPn)Sut}ss06cH)eW`+MooUr_TAy +z>BDYxv4Q(lF%am_*5LMMQ*gVn9b|^i{Y%ng!If~somAEqYMCC!>-5wbZ8ZYWGcdE| +zK@1*Oe+T^I26ezR6;=C8F|y_lM7@Uu4Q|02l+Rmt-umKJFbuaIeK83e1L7wV$Ajq9 +z55#F8Mv#~VVk?MV4M5DPKrM}ckQHEYPRdC4#fUt3FOTJ&3SDe3LPDCm1^X>|bX$O> +z=!ntHz07D#fTZ}c`kUhG0RnSv=J65(UBlA*Yb$jzi?1M*x%>hNX7ryR!~-kgE1z_q +z^?(@d!Q-hO=;g-X!;J?QfZ!Xd>P#QCI~A3#Ub3jQ +zKI+?4REGM-q5^|xku$5}Cc0+$Pn}z;rtOhXwwK{RNjhcf8;Vajoyffiqia?DqaJ3tw$(qv*; +zj+c^PRayZ;+N>3s0TFl7x7Ix4wfQwhr|+Y#M%$^0Wf&Vm^D^gp+(7-#qCnkgUFZpz +zxNso}x^N!|$%VCtSeQjA<^nO=jV*_OqzJZA8{P1RiW{6VZ%u)!VztpKEFnx!tW!}v +z)xRvN%17-;MU|<{eB<1;K5C~y`IV%X>S0k&`>3xB%Ab`TrY2j|mqbZlp3_uUxTP$^ +zBh{5eu(D+jGbud`gfoDZtzKZ +z5zs07Fl9!kheG9r+Qx#QCR52O459+M)MQoD5ms5rs-Qzk_yf?-)dpHa7sjc-tP95iA}(A;f-XD&Lh88{*#HrD(spZ} +z@!I^dy3M~sO*9`LPV-WA)}=tziK<##Gd4>THX;!AET| +zC|fG(bajhGt@lyeQ&H2^vljIYQBuLOo9PO+=Q3p8T=f+ZtYA4unUwYgp(mpG2I|+? +zi`3LkfU}ZaNH{Cmy&$BNE!r>T5xog!DHEf!x!9;ofW-KZ)W&S?I08sLDpeV1?mRep +zh5DMxSkdMHBBgvM36}Ck5aNOr@wHD{Z(SfpyHK6#g6`4wP#az7aJ28j90RSS3-i_V +zLgT_{K*WVxNzjGoL5K@;57FMAQp^Qnv^4eS6j=(Xv=Y< +zE&-BcKTmDU$o)j>(J9kF{h@iaDlbA(Sf%nt0nY*Q2ofyM86dRO#^pgWlXkE-Xa3x5$y7Yarj7e;{)7xE6#zSz1zjCP^?5Rl}= +zMbt(Yo*+_JsfrY+dP;p^6@EsT%zUa0%I|YFsO&CCIjdE@F-B{55V~5;F>t?Hy`UBm +z&T2K2a2DQbLios_bj9AlRr6bp+39pg4*6TYCbIb}DaDA$km>Y +ztDQW9s-c&o0)3GF-s}XV_0_;t=>XP&kjheF;C^M9)BqAvRf*A+W%wZ=o$&FdvP=ho +z!kJ)Td|1N5VX+KdJQjWosWDM`EEQa;_FI_gK4lhOgdFlX7+*j|_gORX&Zz`Xn1JA! +z=bVAyort{!L2-9siYMxb=dHW11EbwtdA6=pg_p +z?4J{+hkb$eG&}{SasvbSEUVJ+*RZ*?2}~(HXls1vF{a*Gn4bfqdjToUgcx1#rli;~ +zTjMJMkUsTuBK20*Gz0Yup>5!8-*j(2N0aJqVF|M#3M!QcBvQZ|s^z)PWg_e)fuSnt#OyW;S;!jTS +z2hK?1i|&3rSi#}#i08&4$Myzny*a?n5tpjH7MZ2%#!pf=j+EmsKTEkCk8(UxUe5nT +z!Z#y4{DE;0`#n&+*i=EDMkrlr0(_nS-{O&ciL-RA;WMMdu%u^HXj_KQF}h_E|A681 +z#iJgEe;M=_=IVCCjg+G_pKsBZ7&hkvCnwYt4>x?i>R&v@1o$q(QPWI-kHno3AEMcW +zJ;gISNAvWnH@@;Y@JBk%9S8-T{>VUcPIViS-57B-^KmoRMb~2*^^D?#(2^+RsL#RBT7KMKTalBdwDKG+)5=E9q+>j38uCw?YAgOp +z(-=>hhWwMJ+KPYDG}eZ>4jq#*u$UkYS^C5B4G%hDiLodvM6WT*LX-W@Y +zr`PoGEf15C*f06e650JI9(djCrvYX(ln$`nudAOG^9_OhI!I7q)(cLdD1kbPnw2# +z)-R+_nudAOH1sQz8h1jM!2jCDp#zt~hfExo3jIOK3G<|BNS`zf^Q37=pERw{lcpg@ +z4iFwypC?U2=A>x@o;1aoKK8gr*XK#okgJ|SpfZamO+!J&ex@dr#gnF?kYWe5)N>-t +z(M2#R-HLLu<)mqN)H`4`l#`|n<)mrD)7zpKZYU>B8_G%3hHbzJHI$R44QGLlG}I?e +z8)YEZ1AW*Fx<5coW1ch(^mzbbC+CkL7}wg@njv%_8znAP%QII^UP3OZdxxHd`Ez1d3CY22e#n|Bo!-SRYVj01F8iz|CRN +zaEA|=VE`Kl7}OHh1@N&Cs4;*&1PtkC0WGSm4+{+-cRm2asx07G0& +zFg`F*AIyk+U?L(Pn25*+CL;2IiHP~YgjaI}BtvcaiSWo;>WaL8yNXJouqVk6~!dk^ZZWsoQBx?k#lfw5UIgED{>9)*^yhupou!s^I@h&g~sHga;5P@NTG4>!7V5D%uv{$ +zKsp$Ef%HVuUhGxUlSs#7TS*^7Iy3ej>B*$CW6h5SeH`hWSR>L^q?^a?LCQiWkj{;b +zBYhI-yjcHHpid^9pH@9{h7&r4bYWWc?3qqz8tLNLE~F-OD(RBg@x-4-x(xV}oY3i{ +z%VUpXQW%;}x+3-qF=vn-7`vSGnWTrtYDk|&dUz}Yc@UaGx-xb({Xd)Zn3$RXdM4=! +zu`RSai}d8!5Xx4Qu8JK^*>gxwiS0ZJ^lZ}8VvR}9Aw4~E5_^I4 +z&7`-+4p7f6q_@YOC4UL&9kC$!x03!S?F>|h+gVe0#wHO`OZJ}FJ#_g_()(hw$iIv9 +z{@5JSOGzJyUr73H(vFH>%D_Dg1XX++1NSoEsrYPqx{QIiiZ4WC4c*5;CSa_u_cM^K +z;_oq`%NfW~^{QvVtrZM3SMdVIJitJ%iqEBE4>FLa;-|18J;Xr1if>0746S6KP{r?H +z)p(eJVig}rcUCb_qT+Ycoz)DKsrc)ZS;IiNioeM0eT0Du6`#bq_$UJdReUVHevE;k +zD*h@}KhD5#74Oche1d^W75|d%JjuWq6(3HopJHHwihoXRYZ;iV;$vv^9}HBf_(lev +zW?+hnFQ%itiFh|up5%lw<=PD%<8P$(~WS{Zsh +z7vov%Sf=z1l1_}j$`g8%3UXtGoFr`{ofqQ|x`f^$ou5X}-X>X?b^_Y(J0y!^)y$#~ +zNSCC^Wa%T)WwAEY_zCIq*mKOEPf1tA){_2=^uXA=tUI5R9vX`>cfTS%+(~Dei{Y50 +zTRHUyk4N>CMzioyCK!p3JGiwx2HxODgw>5CKdy3}tS-b$V`_AQi*Jq0a+EZuqa=h0 +zii93U$Z6;?e;QR&;#2$(7Y1Tc_9>M$o`6)So#f`o@7e64gE +z-BL_FulYTx$k1VQ(3bu_iGO7h-7i5q&1N$2KtN?gtrrgj5?(wQV9K=@D+BNOUOX(c +z_F|Rhix-9#FAObS7+SnAw0NOur`fUe;tf|_=zH;ooABaIH{r!LH{r!wLTfMH)_n28 +z(Bg%m#S2Y4t@vRuRS?=~YSMPhUwEn78{??{QWOOtn%{={kt@Z~DI_kO=sK+zAtLWF +zT?wl(!xPaip>xtO*?RzSrvlXGP7n(~v`t0kJ&u^wh-vp6^}L4LKM~5~N6ng_^V9ery2ftNCbJ8;f@b7#W#2P80b7|jrJ*nB{5{~S +z)8RZfIeUWW#Mr!52%UjY-qRqSBJnZ^XF7UW*{c7 +z0>p9>!$EvZVgiV}W`URj;$0FmK-8;-tChwWU7cYn!sU3eW{Tnet*efF+wcL1NSE7C +z?qR3%7Pid1_25U{{6bx6ir7xlw;(NV`*^4Gej-o(N|5`_bL*lP5$wX}WNz90z!%Hy +zL{d-UhSrA64muAH;2Z;MYe(gy18WST_-aP$>x^5l21r@~x!thxu4@J4mS7CADOpfe+9D}HCO-ZUpNONsvUJBc|*m4J=! +zeqG1VxvByo`<&Uk7=et}XtfZT9k}mjknWve*2gEfB;+)xfbZ&7x~8&Th7NU)`T&UR +z8swQ;)`8>*Lhd7^;r1}z-v^IKrxDAMp~mY#v~a={%o#-`BUO_}_;&!)|G3#(9|#mL +zReKF;MANecFb9l5XxGhp(8^%OMBN!hx*0a7y`{q1WLjp6uZ*@+(f(U<2g$~?R3oGA +zZwA(qn}@?%;zPvlPQyY@GYiFQ>J+cDo$x}?t?&aq{-tfx&o>a2Yx(opyS45`uWz)x +z3PY&cVUTM2T#S*-spUwLcs~(*JQgum3rqOkTgIW@-z47uSl_xMj#HgDp5ugRvJH#V +zUg(MBQnjrf1be^9sZBon7gU3`PaIFm3ttBF~7SzmrQn(XrgHG7YN$_VZ}JF56B)u7NK^P7ecAinmE;<3}fJ +z;2uO5lo%}MBWG%C;4<*%8a^}lHmk!X@1RU}3YI3>`-jCoZS57TFwq;KYMU`J4<^z%CbbQDHG+-RhZr55X$5_dXfn&^ha<|SdbSZtAxEjH1t +zUb*Eaz=@U9I>Pk6VtI+G$kQmDo1e|d^B|=von{RQ?a5Hoy~=ztxY;l=`>^dq-5pgr +zQ>4ldfr28Z3&wvZe3=@JP`DhoF7J~uPff9m;;Ep#KFqhSJd&kvQ-Ko7>GlAcZnUtN +z8;NP-S&4+--RbsuM{vfJ@WTS>tT0ak!C!`0D`-eOh<;d?A4uT>X +z7!3aGv-3OtM<4QU3rX?jqz#>fK|}Q^ +zL~g~tnT$HncMJKk>%mw3DB{I_L?@#v2#Gs!vdTf$TLeNmZj`|OG>|@?d6vz;DLT2(Ev&95C^&h9e1w&0mzKT3ts&*jCwSh=qKrwJD0&F3`$>r +zA%oix%$hhBu@^Hq@mvHSqGbv0L@;}Xv9JeC>Q8vqP?~W=yzz(*C3~rfO+z(k1j~#C +zztIN6Zv{Sh_!!72hy<_CUmR?xM#b@M5OBP|nzrlO6xHP>`ga;V*lOgeK=V?yZ!taM +zu>cy)hKrJ^(}}+Z!5j{?{9V?lTVtAg6K6AA#dVmrpNN4MQFp0dX3)r_|+!%=~@Z-iXPM4jKPO~9!so401Jd#V* +zav!4kcto|rreE_DK`aN+;tUWi`9A5@Z$_OfLyEcwucDf +zEOswdW`P)g9&WkQ4H6s3a*4I2h!XoRf;a>seq=8;f~=Vl_?uh@kcX<+X|gN{k{aEW +z)*5$XF0Eu6w-=iqFZ`eZlmlG*kvT+wAN!DG(1)p8YMUq`UDR9Xq@@{eOQOH5YK +z9qNna|Bm)J5qoGISR-}dNjq4yvEr=sO>Dr_Wej3E&5qO*8kU;U(1|b^jrXzrtWQqo +zJflI?egm*h=X$2Zy}+hZf+r)Wo8Jb;zQ>@XQ-by8nyUW$-zRkgqLBOlyQIGG|2e6l +z>o+-zkupgxjZ1Q~od{FY_!=hnt)=kyaZ?2n#mZ-QI=OE#L4%Qk2GUW!&5rV72BmY` +z&e%^7Y|9Sr-K7XMMon)L+=2>+i!Dd@B9$mRb|wJ4NW*)nD9^wO1&WAd4w;$TIsx +za`iG>l1)yr(s`BA;hCS4rW%WTsAGCLgs&n&ZF1Rd4O?B`+DiRxuGX%*GWY}Ug- +z^oW`8N1iwP%j_$t$1JlwRKYYZv#HQYlV$dIpuDJFX1@nIGpd)_Osl`l=8HVBVB{59 +zRc}59uy{*OIO3Oq4mj>6^sSN2Sy1nO+Z^Q1=K-nrEF!%~y5e*-eFOrLOj(yZ>A#+g +zKqJ)~s9<^nXo@sZy?_ci-c;afypy@qiJpHN6r4iRiO#07Q|WDH)Psa~`pe+wM2{tZ +z24@`;oQy{hO?KvEAe58A9DUb@BaT}=4d80}Q-2BM0vT!-fG&TMumKkKI_PAbOr6)U +z7jwfN(b+q|QG=*n4FJ30SrTUDZ76et!6X}TA}|`!L^~O*L=1^DjhzSu8}FguNOhyH +zWTYr5KuXm}>eu>4`TB^Yke1JxiG~??MZA6#F-_pLgq)^q{;D%oRGR*%0yHmG%U2GX +ziKCra#^Lm=85ZShFD9^>C0a@ssw4M0pEarJ{3x1dbnGb6VS| +zW8iTcjtSOG8%}{rjm2pgyAPulGC~&HLc}E07+U?qmb5AmQE{%0;jc&^3!U~9Gcd{Qqn3f +z1Lb9)EVmkO(CNyB?>VDBwQGf_n~{iioZIaOky{D^D?Kw?Xus3QiuOaLzOjcF%IWe0YL|C4 +z^OeO}#A@RdF9#rPh~lt7^F>UV)0xjtVkJ+J!5hpxi$4(#*Ii2?5i2dCgpPE2p<@U- +z=N}36`dLXeayf!g^}tNj#IV;0_xh}0?sjsAw-;_9 +z?hQC~Iu1nEcZkkvf>7#h9V6t%SUi(MZOV;|c??3))l@fj7uZg;l=L{#DtbQ}SY$lu +zK(rGkw8)~M;ab?;}jgRhCqxH9fS;oIX +zbA*MG#;Q&iqyjf^B7Y&K#eBLrmUTcCBd+DG5~j;eD?VyfXHPR@-!zl+s`f%S+=xr% +zSxoq=em+RhxeD3x^2v~t;PDI&q*4i9ilF4hwa^iDt4wNgcVb=H0<6a6gkH+GqwfQ> +zbvFBF_Gh>T${o@3cYxa_4>w|*rjrf8Lmuw|7a1A268yDE{0wN63@&0ad9__!yXH! +zom7*qOf#l+cA>uk84{k@Ng5`@ot@iNARP2fz|8v(9RPeE$emtDw|%fhve-rySBb|nd1)dBvnnX{_0gYQN^^*p)$j3Zf>B)c=*&Rmh)G|UE85uPw +zV+ORy?(Zlg16pM7VZMxzM&<}`#f}-!B70kd(?Absk+9crV +zN;PRtCRtB`l*|q}?ivh=(O#p#Y5XZ#EFNDV<*EcdMUIS@18B1ehrfYLb(1+5`UYtV +z!`@&`VaOXoDo4iDq0FNk8Bd1^DP!po1T<|n6F)$vMzU&Q6X57$VXG_4Lmdl?E#9LC +z-RVI~j)!M}M~IX85^fBM*Y%tT(XC#9(_2j+y#WATs`g3rb-8aL%A4;xxgUeLki?hd +zTn*v}5T}v&9mEzAAt)=t>k+w`AQqBn2I4Oet-rM+gx2nqLV24Gh;6&a#5@2$^YmBc +z^YmBc^YGFf2HHF|8h=LTsWJF7CQk<8v3Y77p3mp0@!*ZegMq>~kyc!VM*of0`4bkv +z4LU!c1f73@1fBna1fBP;1wrRKk)Y2bNH7&=gK*l;G1_-&AEWMZW^B`*Vn*DG1-;O~ +z%8e7M_8bVb8;GdI(9`~C5O^8H$hKZ);JF4q0^l|TrvTe-G{AkXn8kn=U-0#78B7C5l+VetU!fV1AvjyNJm(`JGNrXrOPB{ +z>j-#4Kz1>F!6zEQC{GGqSh_TGuZV%m77rV)qDLZ=g#YOy}_Q8@ZG6_$i@I`d7P +zc!>)z-EGA23ZFVfB@f@O2Jf`d)um|Vz7lPAHUlTU(7jN?S;6p~JiPl7|IJ_s^1#wWp{(>eI%#P}pQ +zG~);GCphuz@rUesH-J!1{0aQI%!bXA;7~RFiIaV&jS4yG7qR~2T?bCotyryVmcw77 +z2|CNsq)eGDJWiL{!ldcXxOEqNhKyP2#unP64bpm>#Cwyp-X`(3lGfWK-Zs*Do5XvIwAm){-sW^k +zPrJOG?}L_Um-iWm96jywcFFJ~+a%uS93Azv%iGOC)l9p*FKVerwn@A_Es;IgCh>lt +zLfIzqe&m3rw@JLc6x7=!-Y-n6*(ULR-Hkv@&$pr<4}cb#J82RXjU(-7aO)+_x1t|+ +z1V_)eqPu7NGC~@eE3J%~Z$)==J*?+j(Y+7(GC~@eXRM5wZ$i`BpTlXgU{1EI8ka)>GVDY49`J2Y!X%|c&5etpevlt%u`VuG)aF%1%OnmtUPvXnc>NMsoay?Y}P +z#~X=P#NTGGQdhQeXB&xZWBW|<1IoSL@B^CPq6~aB(him-tf;tD?SAyqEl;Y(Q;3ly +zU&Hv`k`F&e{)y1h*Wo$2JjWe<2GH*^DDSe2*@fV*4E~$}En}k?0}sC*K~`opE(5_^ +z7|f;B@mB!+IfA*I!?nZzsGHjj{^4qUH1lq&c1N=yaq@96-X@jZ_IO}R_ztO)=NXYj +zsDyU_+>VbztkQOzPE6~n)wScJkcsU$omkMvSje-gABFfcB96liK)Pvo&XreXly5^U +z*UnImkK{P*oo(9Be}WGlrfiik6~eQWwmD*^f;}BuO4th`nGtpjVUH~&?6J{E)n*1r +z)oz5-*q}S4F-1o8K#;st?dOQfZ-l7vNO9ZNAnpaxu@FSm{mM*j+GHBJT#+&o?*n*9 +zOaWD-h<7SB;>{L-uK%ty)UnV}}a&Sh0? +zHKsI0vK9Ia>r;apOl4cg%623|U8E+iXH9$%!MrI(MI61$aS%4S?zFEq5v=C$6-6=9 +zJl;3x--o~J`842z{FuMy|g#>kaKcE|B*tnGjLVZ!U%r+4Ab_a|@ +z*dvik{qqcv`FI)5SHFVuUL~Hh>grJBR?97byrKv($zL|B6PQ;h{ID0Ws!-*92K{TX(5Rj3+HuWT1jHA +zvxzwtKzL=k!Mt@ziTNuzF*}nI(+@JzyIQeB6VoO&G2a?_7LiU2ElXnXiYMJId6p&9 +zNm=AT<}NN(TTss?rjsP*12|v$M+-r7UYd2YO7Us0rL9ebHgi +zgmKlT_CQiHKUBUa?lly*%?sZJaXN#gMG2Hh{Ynu+5JZu;WWUtX%V +zak@=hxg>5eoY#r#qnNnY8RqLrs*l9y++q{kPZB#4VV&5Dl*Cdqiq>3tmS8>o05187 +zwGn<|E#uI{4oFR`Zc}{84nKZfY;vvEC{VR~{KQp?^H;*zQhC97q=YvxTs;obqa^&R +zpSUrSxIx&d)`=UNNL-l=KjTE;0sy3B9n9PCij6JVp~e*^_7yncCw4(<$y$+v5^Jg` +zl}ah%WlJWd*PSfI8DiOHQliam09tn-8gVCl(`|01B<4MY%cNS)lEl=*a3#J|@NWw0 +zGDP{lTa*7qL7jU@K}jv-FWq8Obc@M^GQXfML?5Mnzf@A!9lmMb=ZWvrt*_St7rc#AXgBzOwV#TcTa6F6T?{u}e6o;rzEZ38#Dz8d_S9bs$5?DlH?F +z$b`KZxP8j`ew*8wDAupuXMm8KQ_h#r+-{6vN2itc?aIaD(dsC2c*E?O>&kv_qBccG +zD9v-?7>9#S5qbvmgr#qle!{ZmT8Nly|9w~vB|TxO>y^{wT_u-OSG%iJ$HOu=`6P!q +z*Es_c<~>uA|KVX--7g>LHx5LTe&gU$XbO8@;T~B{{rZgqrVLAqSF%tdQF)pcm8WUZ +zq^D`&&Flu{XL!ZuAzU~U69M32dnUKy^olov9qY4Nc|gu%2-P#u8aB$feEq4njp|sH9?186?=`^ +zx~nn-ro|2;j9mLJ>iOBp81ekmVlW_|fyn%5C{zRCmVQ&G* +zu(t~L1|+k>9ygd8JcgU-c^gFLiIB=91*jH#&c@Sk*`Yzyr=T_m94;}LvB?Y!kU&l>$iP4e0xAcrZw +zX=wI9v*l58h1oS%q<_+6Y!$Ex#7PiD2A= +zp{mtPyqqzB@P9KTZ>30Z=4}{r#l}EZ&A<(FTJs@JW2nIF!A$Af%%1?g^EPbPCffcA +zXQ!FKjB629^(tJ=3*oi``r47#J`x-}bi@?WeYDzdO+D!O31 +zmJ?MwQ&rt|yj7JN1y!jmtE$rvQ2A}Ds@uiFo>X@2^VULY6fC5&tcAi{qh=^_vvZ{h +zj7FdypOeTd&?bkA_(baxKY%A%M-=giR+V8nohKV{zDL!UQc41B>2bn$(t +z-rlMXAj4i~+#?fE(~1X?`;R`t9YF3-lyTRsSOKREVN>X)U$tZ&X6`~*-`FgKa=Oi~ +zf`ZqXi@HOlkkjoAs@=@YOX_C3HzxOOBA9!6aOm~{dQI=&%o%|?-S!dnCNm>hV*}U; +zEMi_{vTu+Zyd!rpQ=P;uxt!hg@yaQ|f-LB~kHvwR4;7uD=R;f3-0bz}a;W$Z^C8)B +z`oH`2i#lJp`TzC(i_{$_{rwAjFy{tTHghnCyF>P14rzNZhqOJIL)sq9A#D%lkhTYN +zNZW%sq|J^~IBCZzoY-*+f5x39doYKzJ($CKXAkCZ54*l`N~$Qidi +zm_tE(Fo$V1J5FKQaSD5UF3saPd{-v^x5sn3Al4kup@a2g8W~aQ0`Sv0jl^p>q%kew +zdo|bKf986G0#1ESBk^KR6AGXA$tyIgO08RqrE^na*isBu@f4>6}JJ+DRZcozuujdkN&Ha~c`RSD!+r +zIGxkTNP+qWfwFW?BO{$8P?64QWTa4KqK6oo&S_+%NVP+tGM&@NNEgNF#DsKCBO_f^ +zB?49HoJK~vtFsW8md=BV*;7F>5%QKSn5#fHc!Lbyz}SvI +z5oT)Gdl6*V`vUidBpZdjA4vZTH_?*@8(DK8l|>3rE%vjGr{7s-Mb-#(1Nv^U{JM^4 +zVH(86Ecym5oSI1t6QtkfO*S&lMl*?tXb7GIMtx2rBRv(1y`D@XBmGoM4EpKES0SQ8 +zbp-9Ca~c`xulge3rE?k?Ib32g(>aZd43I!hI;WA5ffC3~=QJ`hNKJrDembX-k-=&f +z0>$Z^Mn;CH^AIRY=QJ`hR00)F1DdmWO*iDNFPgQ?E|y8XIyr2|NX|eTa|UC01Cw!K +z?>Gd)9t)yAr;(9i>UN~v9!lGUSaT?iq&<|zlCX!;c7SgWrE&d$Luu=PBwHF24yDl& +zUow@je<zv2;`ZQ +zwA&hNQ)+DHs{5((0x-DQnjw$eoF@7J+?C*B +zu1e3E>YYmgF9*9Bz^^dmG<_8MRp+T7)mFqb-z8!82rW3Z+=>5$I2kYD#*m~Nr^KXFUR#tOqc=%;jF@KyI1;givcva|ctne=WAi+9K6z +z2vfa=!4Int97;$2iC|kgGZz}8?*8sUU@(J~dG3uR@=+i>yJ5n17%v720tzNSg{eyW +zrw|oIJMWMhpZ@}5+?_@xw&aEz4SeMNCS(ir%gCLsGW;vS@3_STmLsswfaZa}-SF3g +zAIEfo!j~a$%HBl=;NmB-jKYos4UgEe1h!*k62CHuKiTl#2L2S`bEejDN)r6yB>2K4 +z{w+!T+9dw!B>svd_574t0ggFB{hA~=zo%wX^pWBJXn0p5^>I@YU&F&p6qUw85oekm +zb4)DLE8j@ddDAgJiO=t$84De4xiY=ug)cMHasyAp{EARyyRMt898x#yI}ujBqD@sO +z|2xJQJST3vRBa6+cZaU^1+YX`S5s2VSt%(TVqjr(=kg$JRS%FD<#3O1A31~F +z;z$b(Io-dl0%}cv3UK9+_K#CU;0y{}j83lPLfDB9or=6-8uUO?s^0-*CM3N~PmF$< +zzO+AjooM^DjOPs=u&*uAr?}XKvi@ap2IrJEs6r>dh}Aobou}NKQa+=sSIX@sJ?N8y +z8ve3Kgs&8pR?|cWmXJ2lV+rF{ +zxsEq|xevmT|5-Qu&${7%)(z-R|7YER?&g2i4GMi@*!zEX-Eh#9z7a;AL#Om@z%^6) +z#@}IF2sD-%zdO*NbWN&HD0d3t`Rb#m7YHq$f~*>&YQffzp2u(| +z)QYq7v7DW^l=;v&&WCbaW2{vZ81J;Gp8s%gL)s=j$q8my5aJqyGUc5{Q>uQ0W +z1@P-nyl?~rvx_#gwScz1QUU0v@`? +ze3cov#)wpsgG)Wl&k1+B98pVPxD#iH&ye6e?-LLmQzZ%)B1SEB@g^aNb*U~K!;dd_ +z=E^WN%3Ihml~ovnik{GgOVn*lRd)iH1EMZ93hGi>1yqNtXsuE6DyA!3H*~=q`wH;4 +z8~!KYuM+-9Oz4XD81^O&_2xU~=xWh^6SEHjJB^~N@O;-X#gK`K4wcWR*>0@C6(+_n +zll|RULkAjmIf1xTP;eW%9|HwhWgX$6Q2L3B(-maIn%Hc5&qjf&Q=$)zyuUWWTf +z&WMX9n^>+@Z%B@HuV12^;^`)u2lpW;%%W<;JPI=FeHo`~jo}|>Qs-O2Jh0N_NHyY$ +zt}=m(5onL<3eAZc3(unNN>hEiaJqeK7f!b)7?x9HD=JeoP>Uy}Xr)np7h+F5DE0~r +zm$o6CYhu7F%1!cn@j(*Eq2h8AyCNY`YD?=0*w8C5wmO;D<5gO=@gBdip~lq`BfV9M +z53Jg&P$zmy2NG9oxJyxbJ*CmtQ*8C`BV2Yjr86YH@@|BsBg&NUEQF<@FM%Q)^Dx=c +zoy}^QvF6vJEVTeLa%l*uacBssENNE{KtHbT!=Z0as=j>nDD-ujh`24piPhmB=+4Er +z+C%+mt)|AoYAVY%zvA7-S~e1fDiOSXlM{AIzcSosk=Lc)n!rW`in5JeHrJuaGDYPk +zh83(@$0Ty7DN{!hoC5rDKvCIzRN-er-1xP$1#a&ivhjBR;{RclJ +z9`-hp%jH;a?zlwXX7RGm(9coJ^%9DGLedhdoF|;pO8Co3S-e3_41Z+xRL(t`=)YOd +zWqIY4bJr*OIvcBAZ_$EN-T-4nbR(Oi=CT?&<=x4BhmFw)bAu=PCR<>Va3AhD#pTgc +zxn3`_;ncZaEa&c0bTcb`lAXTX^@$v>`f+6!{l3o+c-t!8pN>^}o9*GcQGqR1Ph^;S{jP11U+ +zD6*Bb-YSZ0BdxcJB5#p4TSbw#4?{p7PKxaO9<&@zihQ;UX7yH4WEW|@RTTOBJJ5Qo +zD6)G$XtPxm`QlOPk;6%mJtYBD2Yk!?2P%}qNs%A<`j_4+itMGJ-YSax!nB&LqR6km +zArST`?yc;>r;GiM105~P17ql!AhCx;4@kye1%YiFBHaJQ-kXP6QC$7w-FNLf_s+fo +z!|cES!_2@8`!=!&C@PzRM#DM?3OK@`sHljbxJ1Dfb)rUN#HbOM7~CT6y8$FoBPuE? +zDn?uqjiUZOpHo%ceeYn5zVG*Wet*3EJagxqQ>RXyI(2HV>b|5WIL3_zm=TIS#VgI3 +zvd5GuN0l;tN0nmFoxupa_!ryxHbi8}9#hQ5S8=hT&OIhvJtB;>cww8bJ(sisRu1== +za2bi$q_gCxQY^#ngw`>eN0nk(HWRk8c~mK;k1A#Js8XzhO-W%ZOZJ#zW%eFM;vQ41 +z-2M`=_n2Z`1S!kr9#gEVAl2F2V~SPV +zd^J^lHusofJ#3yUACTRfwYjGtP1)RIiq+UWFg`Y$drYxfyA{ZUZ0<3|>g?4(re$-F +zDc0M*4#^}pUm(4wL`)gDt?%X=v7 +zX;%CxaFQ&Q3GYW>O8pJ4_n6XJ|BjTC_L$-ov%n;KOz}#B@DTch>@mfw#)0CzJqIZ# +zPJfDwk2WKTmE=GbnhW?m!XepjO33`mkxRUZb#&WA>~iv4Iv70ZvE12!uOOUZ1xG+= +z;>yL8|DMRdDu~&W>|rIY785F&zCEnOhGW65_plPTYy(ob8gWB*OE1LDj3O;7vkNG8 +z<}aZqUQ2lkk=6`^7U|tCZq)^+fWQ|gX4*upj@<1^yJ!Zem>SbYosNaB_*TSkKq~$i +zE@8jSd=|@q^A!QFq3BncOWEbR6P%1>#o6r;laeU5qLfjhZaYfiTY#4$@nN?Y42mAiHv_@0J%Jat2~sFlcZ{e`~l{{a%k +zK}^c+O>mc(U>J`h@Tt5^NB@#CC5E;O*}X?}e_2cOjyytPg!ptA2!hHhh3y*S2hyeE;7D +zt;Re$azLhrX9MpmXD=0gAH$b*L3q%nDDwBC&9`fjc+>#s^gyvyld|;1MEX +zJt8TSO%r?l)1qCI&9O5v5gNz_>j^LoWNY;SfI)1kdZn_b +zG+kIAU^zIiD+9SgkGH2osFXu$7|J1)B;}Bh!$?YAR;s*(_8mrEY8d3Dl0;sePhL@~ +zyhZjmMqX+d +z`i!7-S2GYyZdDnHNoDM8MHz9(6Lf?s+r9(HP$~B+Dd(Y5ZMxVTZ4Q$v(@p3dq`D}0 +zm{gT&i3`X2BSb{SojLEdSKCJM4XV)KU4PFu-nCk!O@i$jq-8!wD(JPqRfSw5;U5B5 +z-ly=Dw;1nJ_$J`P0{FT%azs&v`vBb?6B7(U2S^{)) +zis+RZrJbt}r{KIdl+{|0pnZ=$BTEZ?(g@vWg!Z`=dXX(fQ038D1jiHyFnPQF0M@#| +zxuSkEa$#6zkb=j4z+MKk3_Js2r$g?*#Q^RF&?}X*_I!kVf{@xP0Cc$xzzsT*R8_<8 +zR@EMM1d^qyriP&^q>@Zk5Lxp~MwF7shds&2N)3aoRFaWZzg){Q-p7 +zw8&Q7G+m@b>sM%G7LX?-3WiO_XHt8`VA_SKOIUlI=XQ&hmi@9+UOC~TY9hT)YGOxB +z;{cD~5}0iVSaDy`k(x|?+v;(zN>vm)z$&=}_GZf-46tf{2h19=kljMI2q=0}IZvZ2 +z;6ztIwg^~!yAqHq0=@-ijVNISc}Dt*@mj!xu7E@F!5XE(GtwxWh*OUZvf1*iRK16Q +zH_Ec>^Mc24`MmMvIgqIE;l%rT_)_9>MeqfwqMM1oP7PkPImrJPam&MNHY$bxBKoxf +ztDmQpq;Up9J&ahmMqjyE(?3z=MVi&0D}i=Jz}cxRv%<~T{mhuOd=+B5cOhDJxs`(V +zz7vW_3)n^Q492niIp|RK +zXr>ITR9JEP*l}PL|Ff+T4fLEbA~N)rvQL?-^Ig=jcIfkTgH5tr53U&cmWdl~y#NvV}hA-2!||kBU7kij7Bh +z8brCxqTG7oqTnMUZ5Qyqi*fkyF_Cw~JwajQI@i8V_A2MOu-)~ZuLKu +z<@-jUUS1N3_bQNx$8PI`Rke{)Wp|2$*t6A;RAH;3%SahiycOU|7b=bPBIC6j*AVXq +z+K{B0Ii-Z57fEH8!JfR34rZbgEzof+tjF7X1DQow!6#h%PXzY(Q_!m6kkxRxsXi|W +zrjn6hDoGMN1ajn&EUZsa)6NM_N3tR@H4G9{Ng}aDNvvzqvZR}vr;$d~=L;YavBVJt_3!0apDzI_@D5^qCG_h14bn5L)-3 +z4xP1?+ZjnP-ZNd3Q_gOX?r?$8_yl;z+scOd@gmW2!? +zcqvREL%{oi;6!hKRXCN-JF1mnXD=2oAxI$>^sSEs)A|LaqrbzLh~r-fi@q4f4_6~b +z%%d`6gY2KjYPr)~g_^Ngq8in)L9Q5n4UMFgIY=TLy-6#$l&i$S8G4L5cAgeg4Kftu +zYm6}SPSx75x7T`-()un}YgxEpBGMJ$q&5}nzlD|Z=-~BQu-A4j!CbnpoS~Q=T!ze? +z2|ZOOJ|oDH|LerpGUGFY?8L46P!*>TpA$SAadGuuFJ;v4(8B3)->U4yf;GA%tokgT +zhQ!0*e8gl)uYy+$&~z>{^zzY{`RJn!{Y%pE$Qa57Adfj$KXh1utV6if +znJHVHhw_YT+WA~KW!s+j6_~6;`PzZ>0Z#$sh&qpeY!2jgVBw9=nSsXl5{`WHf)vjm +z>##V~%d}+7$I+77GvM@7AZvV&I%I#2gL2Q~4=NTjIDTtA$juyYDDt5^!J8>3cD3~>s&6H$ef;Ew^yUv<2{%Povc!Ld#Z9K +zpqH>#ti_Lh&c6#8`@bW#|97PJzdTZl3wzsI;KYe%j)ey$j=-;-I0nDixZnG2MqdrR+qAU}RfkCJ@1^w40txAYzZ?B3FQ1&Dh~ +z?+YOAEj=RcEj=RcEj=RcExoUSxTkF+X#Lz|X!T-Lh_7SosYNR~RKFYBeD4;I|L +ztj8_fq|>&&!P5S;Ex+G|Ek$y79LoCrI?LET3FJ`qUl?NS* +zU%4`Pn;wZB4LToOuENx^N;L1q!tRH`VwKFqYdKO_NmM4{bqxIr&@RkcA0}LUKeiY- +ziErSA=-|2yXLfs9%ioHH1HLt~TFn=_?bP)5K<88ybiRwAn!~`&d@Bt;HN}H--M`R` +zVJs)9$l#IJ7Faz-BBFWR32|G`Wz5~dRLFT3I^tO7 +zhYI#`4yIUelb(cF-P$zo67WW0A}z}5c8?BNg8&}6ML;arX`r@M!zLYkHG;c2@2Nun +z4Up+Z$XBAzYWz+LUQFdCQ@QTNnwQ=vi7CEw$S3Raa(9-cB~=O^kD(t`zAzW%vk5=e +z5G~*p8XgZ8v@p|Fp0$adbuWylJZlp@tLH=7v!uc<1E##?0pl%FjUF_vB+l|rNW=kS +z?JNybbdrxSvkQC~7y~}Zgj6Tw&#g?|mTR`>5od;B+k*J3bO0@Wia%h34q&NX=>?#` +zutwi)iwKBhuF4U-GC`##Of@^IBdDQp2Y**&kyOp1-MFHI9Rj)X(!y|0S0No-5& +z-ic{OpUDXN15DTV7yyBO^YDxFvD!ZUYjmVC9qHGIGJsJAkUfRF`*_XGoQPK$IZ3&o +zJ2)Rh-&n9KkDtlYy-LS@UB$Kgz%{OCW&hV)Fig>*m?_C)w{^tkV^z8^&=+{%lw}JN}=s861 +z^C*DAhp`3x0st<&y^8<%q_M7WgDwENQOhv7vJ34?pl9z?`haV|jMa$eHUA7^c(`vV +zDK0@my;DO)g)0y;fGX@S{k^H_m)kiI**lf4(;sZ@RzA@cOeiC%#x1apk6pEN-JUB9f*h8g9?=C$w%-em6 +z=Av{;xftw2en}~{_L+!vv<|Np8I)3#X{6K}DZ|*U_LfxdgW{G?A3$%b@r6nwXHIi?V5AmETZ+0L4NYFZfU*kDVB3zFd +z%mMr)&vHSJe1a&x%X7M*IZqMA$9c{W^tq?8ryyVGIn#a+%7iexX_C+MtPp%Carsuy +zS;Bu3@P?gQB{p;oyEVdBEH!+g5mx4geH!TvpK7o^RQeAf64D4uy`fPfhoNj5hG>MX +zWy2_qu)!EHK_m3uhAA4MGc_Eokt@)_b#KuK`&*PpEcmW&^-!9!%xR5O_X%!-6(i2A +z_>KM^Ey&0*7*fY%A#9|&TJWSWJWqzJF&ZDm&8^s@C?|`3u9}RD;to;lNfJ5Q%jMlN +znZN1a%V!|?H3oACqUI{(u}1M2T5EpxdorRiGj^exJVsA5Pw(ly!DDNsf+j(sPb*Fu31Ve2SKSmU56qmGP +zuP{1&Lrv7i%tMukeKzJAkYk@)zeP(Pvf7X%y?*u$g1LT{bqPhNCw?zFho8KD=Kpxg +z|9wrKLp}4-D#H3ELgXd7*#ED-CLeJeR2}`Xl<4aXK=jAy2x2|#ZTyS`n0_|^{k7HT +z>m5KbAE!GOu>Lq5K^^C06UY5H-Jy)5KTdaz8|QO^I?k;oj{9-Cm7wU4rQoetd~K(E +zECuhtqE5JLfOa1rr(;A*eJlkZr(@D(`eP~hINiNKb3)Ej`9V|*xiOI|Hzsm@Hzu6t +zz6O`9_c=Qsfv`NeG2z(ufrypK8xu}MV5nLK(h>L*lj!w6Cu;WuDNk-pI2rbpjK&)i +zPL|DttxQfC9eraWlQ$-?h(bwWEBl0bz&hHqC_rvcIAwBQA(OW!oO1h2j>a;1d%~%} +zo(TSB^7e#NX>SCQm3ceasst&@m4TX8>uj@~M0QGm4&pml+Cw0g#y}V9fw=HQ@Z4NZ=3q5B!VLz!B$a +zfDz|G{1y@H5OJO+{0M$T&RYNq79v&wA+V}wFPL!ZEgv33(8qxDsk`9~02V3CgQ!?Q +z-N2e_LYN`ZGbxc?CYV|Df)Q~%2(tF)^tW%698lHl&!)j53+%-R&D#Yy%Q?~hJ&=z0 +zy3rE*G1?*XTJkKFYZ8u?eG##f>{Vb=Hxgpap97YKwAir()k0cqK3jivBO!Kt5M6>= +zNQ<@5oAB1uI}uE>I4je)@Vc@)|;XB{|eJg!p-c)is3p#e~&0g!np^zq*DH_gzDX`>!FyujJ52T|h7iA6+(fP+#IIK}zng({Hw*xazJ?ILG9`~t%}Pu$2k~Y +zRsL2Z>ws8QQ&6#S*75^H=<>e61WRx>>|Exg +zuAcArV!?f-3t_@KaK9155Vm}|j#5in-MPR{gn+uW03IT66@XqZ0QfC{^9kGm;3We0 +z1DKDO2i83S;7I~o0DJ(T{xtx2ojhOYho@HzIoqexUdyy^;zv!&dxE^^FL+HF-x{`# +zKt6zH0Mu@wHvNIwTQIeH`Xf|MJiM*T@5uL2Q_tRCX!_ltzbJGbG;VPAD0W^MR;+!n +zfVSGg$CgSiuqyg+4}G`v7gog_En*k_(rP>iNzT*J*N}q8e(Mxis&6W}?g;P>f_nAS +z0R+~y)E_7Rm(?xB|270PtkRM~={`m5K2RWd@mJKbku~xQ!zHO9y?1Y8da2}oQ5Y4~ +z$`m4NY(+w=-vudDm>Bg$%J|J&JcEJsuGYv1AYVc_tb%2j-i?|(8RSg33(OQ)g-Oml +zO{ZOHz*P+45pG-&16!0$wA3H^n7C}36>S7unmrHtcULJR@g{13$8O_6zy2$DI;^{$ +z8^HN8*hk#-8wA9(Z$neXk5wNe{Valzycf!146f83O)IALwEJ+i=?hJ>Dop${kR>Rr +zo~wZ{%aAT=Gfh#u%!*R61P4%ANKuGkYv3qmqYkYoRNJf1Nyydk_#f&)j5z)98=Xrt +zu)#mri#q7S*=U3B7z|2+wQ#O4XwM7;ZRDMY!JGivjSHb(EVxmhY#72z)foqnIP@RK +zBIKH3oY2J1za267SHKNdB+f6)4$qkZr@MqMUhp=k@?#C(izXvcN8_oE`A!B=q9y0E +z(}&U(3%(*%e%QhYWDS3iia%Y-a7Iu+M3Ev1L#{1>df%{(8NxFb8DmHtx`)vo8{RMr +z|NcrxQppX=?gW;9Q~p8{KL$`h2-23|A2!MG8|7GFI4{R18ZQQ3z#oKN&afBZMsmA6 +z(O>1<`UNtM50j#B^gQibfSjjI@Xgac+>|^|3-lQbj{Sb5GI4>!OqxQcTO-9V& +zGW$D5f0hQkqaxWV26WS+wjbGV=VA&?e~lkhK{Ifl)csf=F$WG2#gDq<$!L>&qI +z0asuA!v`S^ux4?64r>lV$)MXYT{7cgwT6Qe$^*{0B^c2lZVZynGd7iyXGF%K^lK +zoAp>Dca-KFjH;BkOd}(Jvsp5l2 +zA`YcN-{$3u7 +zY@cxu7&@jwi(!b;@q2`~0_eoRVrqOlu;Nkxy9o3E5Pd0Vb?yrw7Tn^xYst%qxkpQe +zr^;hrQ(B}+Q{ic)6EwmJxiT5m6O*C3(JHw-KWX1ov=`#>tdd_)+D0IXGTBWu*<9!# +zR=SzFy$hJ+b`rSoHf60<$(smUqeZzo-C6QJ$QP!P?<%d)B&u3AM(CfeTzrrLi{;b*Kus~6^+hUE1Na|GOi_9Xbbw@ +zV40Bj3Ga~i3GZ+N2SBMGREX@j5mfV*9QPDw)b|PRsP7ZrQQs%LqrOjgM}430j`}{~ +z9rb;}JGzbg&hA@ss(_fcn6z#k&qr1Im^7cBr +z7PxT))NxqFB#vH+c6Ln$MJ+`;pI`6B5m3k3XyWLlXy@~DLD5UmSPK3em@GwO;g>q8 +zrD(^o8Bs4qJ29I{qtlS@c01|vQSW#aI-dGK?DC=Tj2JK3#jbc8any2G>`La+i7f(C +zY(3$uSUTaWm|~d~d<&H&b~V3Om7|um$P;9R&E>KdF)Jq@F#_8pWVsFz%*tEC#;3ihK)L{*9E=>lLtW_$%6A +zxhPgg-lPAfTcv*>EEa4UhJScEjD;T7r}P54ihAt+H2^!Nk~>WU?*ov7Xv|nqYP8|A +z87-CEX)$;sFEd*4Zk<7%Qn(n*o!OWfT{^QdTWcD#Vk74P@ZO<#@$Ko!m1W?=+pkNO +z>EyQ}9C8pgp|VKAI&(nP#5&B=X%UAdns@@~Gw{tHz; +zk_tj3 +z!E((z0;;cZMO3tD@??-zIZ3~jHk6)Fm4WQ49}XP_vMO_t>39P@q3S_W>G4*V8_?$^ +z29Q7{Rft3i(qvuuF~)cw2GiCmP9;B?8y`#~YeHT&2qS1+Ep;n=CU!GTGlWF`z{iMJ +zK7R~&2T^au+w~BbJhq{Vf%1dZ2rROMtoR}{CTfuTIat`sma$XTPyU~OPA@CV3BkT| +zAtbrOT?Wd2Kkm4W0lt-m;F0HmqCf6PFnO5#zx!G`*0j`K_WwRxguAT~|7VL5=36p% +zqiac@J_9wP$^J87D_ws}<|QCbI_KT^mJCC(()G7wh!mykZ^;lTOV{6$`4~uby8f1o +zgXXb5U4Kg^1IU1M&b#p~86r(q2BXSnSx{b7Ba7n=CToa~8zSWj(S-1`l)@f>s7(Gq +z28TBh=W_&MK^MQ~lzKhjoVBQcmhHSg2)ufnK@j~Y2Pg*t%tP%kTi(v=+`>{@-p;N? +zZX5x1oHI-ucbsuJC@PrI;Y`Pb&xV3n~)qi}NdKr#t~L;yg!A7RUzxl!~IKtCJOc3NwlL +zB2t~d1FVX-EJQC9%P09nM#G!r2rniaiY+9(gs>A!ECAd}I1#&+^reKeVwHqXBAgey +zgYe0Oi(;n|UPib$b^+m22$x|Nj>a{9>K8zA)bK8TIr~l--o>w=ZhANKO6Elk@8atT +ztKnVzDi$;Zad;QMnlHR7ItMcCJ6LEoZ$5PRfcTx1)j>vIcL`O-YU +z;kWaBh-xom!Uy3dPiN8Y6l%8uXvuB5Z*|g9g*Is<7sw4rrcAo<(x)}K7UV}18Ix<> +z?^~t&bZ`@bx!YRC;aHhHIqPgItv*l^+@kjrDy(wnb2t~C8DNEQjPCxW2$+>V$BZ1p +zEEa37-NMU^tZ~qp&Yy$uk3qW;idV_GyhDlZAS%c94x_i_zY0`N^-Uo9N1!UxlgM0% +zb;Qn6ER$I*gMfBnDXd2d*!s|!>e>aQU0Mw|i#+zCr(w@-spRUu;DzzVYxWb7w>QB^ +zvv9Umif7f~tP*IBr|-oQCrR<<`7brUct>Q+R=%4(Cc +zdP$Scm{@n3Mp%fyjk$%mT$5Qa4|wFueB9eK8D;UHCbP)DQ)Dl_lp^1ud0B4xX{Izv +zcWE-qt;Qqo(PWm}NS9o4+doy=d;)UmW{pHKusl`q1kOb%!_!Q~D#IJ#`dFn~G$+qw +z^Mgh31e~A-C*O8b`ic&vDeiF7D*Z~6X$ro7T)9uFr7JSIU)N-Kf0-sTA76OnYE5Q7 +z;wTOZ0rx1MkP44H$0uZVceU%BiM| +zYR0c-+?04$$!~Q;@xKQ(!WOs+5|njIwrlc8&!H@jTs< +zUCyfAeLOOHv(5L5<4(_Esvbl+OsJj8pu2R?-a}PTUB?9|reDkJ$Ma}T_EV1`wwN<) +z)!%j;VjaNUdGrgqwXeT{#1S9E7_s2fhRBZJ9uk0t*!$2#Z0ACre1bn9{%v>&(U}4CD_)9)*8V8mvE8G~%~-_OQAmC}e%pg5iytaGtP0O*mV8 +z6VB{MFy8PTF5cg!wJhrf8mAyZy}_dQuW2^_gfq}@8F@lco+t`9;i?lbj46gA1rAG{ +za0a{yXW%HbLMao@{cdG*2Jhd>=59^UTi*>fEhIw;(hH8J$lx%7vc4O3a$uv#W2CCR +z?i&F{ZAfSeKYKC4oW}r%pDP4tIZqRQp0MM*K==j1Sy~XINWAm)=rxa+#urL_@%%*IIueb_-&WKsg$I}3R +z$-H88e+mQs%~!vq#bu%y87_x*6VqqFPEB$~*Gh1r89Bgy4)UD@Cz_EF5|WkRL^Co{ +zkfH=9nvqe0lqERPjEuJ5MV#scCz_E1Z3_iapWs9@GRBSo8Ia&aGcs0?CM%ssf-`6* +zY-HUEIP+P6Ox6$|G(^f3q6yh*LU>>}gFlc#QDNsJAYrE)ezPVqTjT6%z}ae|8GXGE +z6mkAK7LO60vY;K^HP?+JppJ8riQ}HFK7?`f+3Ks^IG+>L +zaei;&xM!=+0ws@cxXudTZ1u;$5}at_Y&CVV^7YwjMzrjFPBd}0nn{=0R@Q6eOt=3C +zR3>1~B9?koCSXp>>1bdaPQaWK|IO$QCt%KE!XbwfFlPy2$KeFbX(gO+I018(63%is +z0dr0woab-?=A2Bp$l(OcSw^_n;RMV%g>adbt!7=$vFE9)&*&()%G^~Uw{i`1h}1Y3T5>7S5jq-GJ&3joG5Rm +znDZDw(xfD@AGVL8E=K0;Kida@u0(D2L_Ok)nuuU>Dj~!~2zFB$v7m(dTwz}WxWiZq +zyn_16TyH(SR!P3flYF%+`BubXbS0UXNG`V`lveO3N}FQ;)0I5Mm3)LJd8#LQnkzXR +z!2v~AXJR6`qZOgFPF0lLKp8e~T6TC(a94U?PkKL3dVg2?Y{a1mr8hB=USLHit>9xy +zTWoJ~B`o%^RVkg3`etdgl@{UcM(((LGtFhv+P5vFKylJ$Eu!mM8jxsr90a!S@8*SyU7 +z9~3XL-t~D+X4aonN!Dn(G6_fj8#HC3Ym%?yFbOY6TtEYGndfl= +zbpSHn0Wb(aZvYje0pK09#w0tnBx90QM$Q5-_ec$`qTnhDt)jpbVKB*NElx~Q_O&uM +zP4W=rib+h$DJH4Wyfn#n#Y>YkYBEi-N0G%OLo{8PgjepTY0BfSNroU!_f`a5LIa!$ +z;5h>40m$D4;4%OM090HDfNu$@_&oqzNH(@vt3?{y+?3D)mmpS;)X*xXP(|rglw3ur +zDH36z7A;c@^t?uBAb#3P3}li|G0-l}`yqJ0RlI!tNH@GXVl^6oJw{i|f(pO_QSx?@ +zu3zW?TCi3Hhz0j)x>&F$XTtXGi3rC*Y~6xH66h>)IJ}q(y7W$AtA=x8XX6o|)Nm&3 +z-1!j%^x|2ZxXgNMIR%XkWx-}7;1KF(E@BB})pEv}HiY_RP*w(q +z@>U(^cg`*Bsit +z-hu@~)&)x-M@<$#ScEQ`NnC~>{rnN5s-HetOr9YwgslC}5YJ(N-jd`QpuiEQfg)#s +z0!IqSGeCj;oB>LiERMs7LLYW+H$$97k!pr0BE1=+d?zc^@GCH+P8QYPWb_KCUKV*| +zI?Uy~Q3As~N()=g2ZSF}^R3C?i9A7imh%?jCrQVAD+lI`JS~$ynRG^;eVKAN>5TX$ +zoe|%pGvb?cMqVtW9GP@Re3Q^yj2A +z@-|^L>5RO?38(iz!12XZj!jC@LgGU<$b#*C{;XXJB6RFlrg +zm&~i4bVmN&1N>>73P6bj>>Gf@Ath*wn8ZZPOCupUNA4s(qIJTyNV3weB^I+!K#Z`% +zcwvV+p!Cnh03zcGSlAx^3#4ju?JAQ+VGpN9nJfvsoC!)~zC^G|sGMNiO{8YMLh1-o +zvyO8?EBg_MH_sFe*lnBG3UJnW6`RPrd#x +zJP(nXvHnGXa%$fLK*`4fXcsA;^8SdBe9EkOA3tc?ikXWVs&1ZQ4cKk}0!v}*5r*L$ +zL@Amxe=+!xNz0ySW!%8n%(7+AM1zufH*mXi_8L{L}^?)Vr$(mHWGmtjSY1zdb5qptx$o(bUNW4Aql3STJYxQ5_^ +z(7#a1at%|Rx*MpJ=Xq4^Gon(a=P{+bKfo5jF;wOPqOBhSUB+}SBzh&#l9m&eSoW{L +zf?XA;s*dz9Wj1N<-~5~t{*-R~Bp*%iz6tMRK|*knTU(PASc +z7QAi*q{*WuGGb$9Mr<5M`vSOtb;-V$c{k5J8nD~GM(zurrE%`1HC};=)lD?rCK@)d +zZbtPC2HvNzdDRaw?0$u{REy*XC>ifq>AZ|#53(8_v7-CJq%4z_-4*R$*3MNyh=XUzqT^v8R0jwN=5i)bLucy-uUcdPzB5BFbm&4XPUO +z0`&CUvQ|Fstltg=4eRJ8<{7U6dz1YtTHl;vSmnG=Q5ASQ@HPSw09ygL1;_H?hm*x= +zPa5Tw&#II{yw)(?shN^xJY<5mnPAhbT5g?)j#lD*l3BIFm{&>iCL3^%SnwcIfm~JT +ztvwYlw#dN5PZNu~Zm>ON=&qxL3x0gP?fF%bzYfB +zDX}HETcv~uT`|O6#Ksy7ulQt`xs&D!)T2`_Woz{L3_TL6Ei8M)0wzRnlfwNI5Pt@f2S?64+Ei$~{` +z7B9_;JOsGMIjo*vB~?%4MIO9w5Z<7w=T}lazksKz>iKV}p1nRZ)$?nqP;-e(_54Pv +z=XJ!TdhV0z`3msfi?Id$og~=JsN8^BfE@FsJai*`YJzU`xjl(i$D!7)_7wb^f_|;T=s8Si2u28jBaaeFXd{tOh>HQCCL|hIxfTIog1A5R +z7r>FpfC*TUgEZts3N(}zNdOv+z@o@S8p09s{?EohImbgkK6YZ3)ryPe5p3-Ml#7l5hcacpgFV#m)FYfS}#K +z2wI7a+Tpgq#AZmI&UX1sM9$a>AlJ$~i{kp&SAvwaq!r`PJ_N07=hyg`^9q@`?Q7q< +zSxY-wkHPRdH^|MKyAWrSZ)KcTq?w<_9WDFz4-t8fnvp +zOOefNht?|DhiVWR#vGUOhXUx~-Iuu@z7fpy@SQ#nKl5o6(NFbo?bgZXf>ZpD3mbM- +zvDVj{heV-O_y(3v6~V4w2CeX|F1na#0&S9AMaR39=z4~BA@eSvkwz_&o48SqdB+^6 +zn)0Z$sS~2AO^vEHm2=Q^aK=#4tu%U6U}~JQ5_qRAtQ@j7dj@)38_2pG%=-E8=NM=| +zO@La)Xx{{+9;XiR8{NSMR?Wx_Q)!6R00*?Q!fUxZCiO$oL +z7?t_x{1xhQ3u{QE4<)D*Q&NG=^HNA_A4hGWVYX +zu_8N|@5xN0RVU)*`xZDwT|IoN5fwI1wFc}qrQITG +z*Z(_|5-hTaMQSXvh>Er#gi5qfi4TEbdITtB{r(iUdH6_s{|rXZ&#q^FM)U9!y#If* +z19Wyn>9_C~fZUN;5@!ZP3NIfsydoZM-WNmwu*-VEXrH +zv(u%Yk(z{l=8TM4OXpg4H}+}4b(_z~lxkN^aYuqXtJs1s;JF#m>Eqcl-p$6q**P;? +zN_Rpw2JjcxTRHWbbt~AgQgj3UqB967F9$Tj1KN~oozYacSO;aAO``7m8SBz3k)Ia_|x1x_SAX2-j~Oc=YB>W +ze}WtD&()*}4-bbnb{8J9TCQ{Cb%i@XjmX%eE5U5!BMKu_6FCS7x~{hY#xBH<#kKs9 +z^`V!~@)K2APFT-i_1yQ9@)?>*V;+igJ*X>kKuc#CWOwMQ`mJVA^eC2Ka?c;yL^<;& +zlV=RH3M>|OHMV^aR5iAZTHgScu`K~Lwk4#-wuJu6v8{BGeNILM8Rmu#T}kkMXb~QK +z4Z(5HB0T(e1UdMPbi0$_+hDMJ*Ax7TV4v{>`-9i+Hw>WTgixiz7a$A`G3#qgN@wD1 +zfL7YkWSkTS>|n@C0R!lQ!8<`o%+y$7mIkc!T=HMLzMb!X3I2@P^AN`9D^RMLGZ!BV +zloqfjW{qdPxt?5DmCfd;&~fJDH$IyJAEh$((P&q4)>8+;6EePiv<5*r^=#1|rRbc) +zgh6;$3rK1%-u?eLh2*0CJ-=Ks +zv!^%Euk4VOA(`02OpFR3RHhFiZ5_}I_?o?^KT>-GSeB^%Nq{Y +zIxk^$wookePqMz*8R!R0LeOJNfI7^TphuS?ZtFs%BIu+tgdTF334N64aF=;fCD89& +zQAbrV-DVW4#4YH8(7(E&zXn<`=L8JiB(xTb$Ayb2>R;4qC9eJyP9d|P6T1WbwTnL2 +z1Ly*m`42sT-sOg#flIrEzfQNBw^ +zp_A%ER?&e(bL|c<^8c&$f;82kbvT*$llF?3#y3|0|In_FE4*W?t$-rP%&d7+a=no +zjJ8JeaQ1wz&*&9vkMh$zl^D==}+#9%sS2|J}-TDo;5 +zr0=uqDV+n%L%>pcEr1KjTTzeTnFtfZT7l7seg^`I>l4a~vc6E}bCCr)z>Lzk^e&MD +z5_vl#ukc6i<%|4V9Z;o9|1}diERp}s$oKdo*L#sGWh7Of?7+-wbQ6u)a;!O)e|yrO)UUWf;BL=)xrHMG_&3J;LI>ZUiH{vRHfSc67=tybGY3 +z;}j!uHXHLQcEnv+%w5Ud%R)^qbE6<^7;iqP;E_6`V3FRYhz;{Gf)Mec5X%bx4MCl^I&L-8L)%4P}J5mKvT6mGWiN +zc`XNtPY^wx-Q-#-oQn&8qVQT#c!{OPd6#fxhxc|W^)J=x&(Ud7{WPSKto{lesx2&5 +z#nzP>X~NL_VoS26@#;FuKFe?EquqRP*<9u0Eaqc6G*$UHi}_ejRPu2a^RX4EF8{NY +zwo?A9+Lb@cPnG`!SXa4$>~=u0z{Oc8{l}=&?S7r+xH|nFIafN}PMy-4j83;xr)flG +zfGN>`M^se2ohp6?R7`!ln7UP)`i>-1Z`7vNDT=2o)ivvfJ%tXuUsH<@DX*3)cRxf) +zm8-I{Ze%`>`3oqxc{PUZII1i&Si{+&GlV%}Nq3?0Rxd7ru?9ylU +z86l^f;+`Tkm#0;DtA*mMJQ|T${;vVVtSBWH%qI6hQLs%n9iu?!W4GZTtX0SyD28DN +zV9+nQ7$mv4o%jMA1+)j-WUU(kT$CCjxw#v-9PZ(=GR_N(Q|{gIbY`K+W_G&Z_(jJc +zbr@m44E#>w?=gI&;2p6`-D%5u480|X<7{SeHHgJ!S0RIt+wm~QK28*P2LYYivXuTc +z_*a7FWED(RIx15U9Uy#^(bb@}>@*M!1C`=q&#+H}^zs`KR(>UZDlWuNZ|sh`vJ7kG +z9SE6%5cIQ;0$i`tYJrCKEW2ViXun2q#p?iGBCriW3_BB@$WqB0*~5WVax-Tl+JG(` +zKjMP0ZVtMR(mAqFvE{*=_VHf|l%|yeEwZ9G*kpBEOLL6fsiP>1gVI+09em%Ox=RNv +zQ1(E;0#vK+bbWg&z3NS*+Fc5HDm}F)&LVXeZ=LoC&|ec3Z=A;L-;5&dK?gaC9zOBl +z5N^t{@P0uwE!grqmHu@#M^me#DSsQ7YI+ephVqX;MEl5cs1Xa6X&))R9+oKusip^6 +z7m+oDi>WosiOQ&85YSG0!B%r5X=^C_YO=ga4P?i$Xadk{82T&LhY3K@hK|kFd51X< +zMiM35C^89`unE6TTi)v2#9=p{GVme@-D!zE$vMY5+bXW)+(*iQs!JJUT2WfFx-YHy +zz=T{CcYsI$rR{zM*3w)L5LyRyx-Qd91yn8KYz95bCZH~ZYA?6f=)WXxH7M@G|QrhHnn{i(vzK{4B_Hn>VC!x~ZqmxmU2KJb6qbfRN +z8r|~*J$D=qNXg7h^#&3(HYN$B(XtmJ)0M-m-jr6Rv6TR0Mz}>N?gxIW@{*Y +z2j|7Ld-VL0+6-d>Vx(e-7m+xe$>6OJnwUq^d}Na9VD;RBrq>?*nxtV=?#=DR=uj3} +zpXU)>{fst{)xa$tr~fq|aF*DIKp%k~0fbDA2DQ<;luf%8JPW+48|{gfj@{^5UpM;Z +z_W!CI4b6n!!G2Q_JNZnr^r%6u#kq^BJP!~&vRNqp^8hL9$Q=2EnrO%nJJHZ+#?VWi +zCj$&SPvAFlC4O{272Sj~2>k9AP=X)f$H6;81VjId$bl^q5{6uc2xi4TMR^5w2Rnh9 +z2I_9|Sn(%FT^@{O!X$yOf&+EvR}va~i=q31hiU3Q700~XbpDcAR$x;wwwQ6Z1eaRNVB5;Ie;7JcIoxXXIqDGHFs`S!)5{+8MdCSJBx| +z-Jz=y-HwmlmWi^-k=nMLqA;4zQFZYi!InuMT?(dHu;?IFNAjqclLx7IX2>rjo%JvX +z`P_#(9u>AAHN23EZ+PveZa>jP?AE#rfgg7WX>lWg*hsA-?}K$@Ten$Pt&VsFMDLCq +zeiwD*6fDasx?V>*6_Hf7siAGaggwK=_jo#9XZ=93l_oQEB6yuwa^ii5n=v640Gy|_m$8J!%W&?Sj+8x& +zmFt-e+8w!T#K&&?77exXvS;XJEhr=9WzQHds}e60G&i_GyLzOlDpA&V#ftLll-EhH +z&$7zvo}t%mgGli@CWQ}%m?}!I+o<(%i|HA;<(f(suj_d@x$@Z9J>M?c`Dk7WQpu&O +z!F#BRb}_&&bTrrNp1A|j%C13>@;Ww*R=#RAJeBfp2f3&n`5VNoxDP@5vx=3+X0)nZ +zB);OX;x7pD*-Cj~bvs^hhnjX|u|R!0@`aFGkV+N{oTx0o7JN#(Xn&$Y?;*{U-e`lU|eqzZGZ1QRV4uqoxHw@!HLtl_dUxjXPeeu05;^N8#b> +zt{lXLyU#;}Zfx(n2{f9}BGUK*CUn$HChU+Q>`+cM2QZPL-5v(4ek2M}oc2M>7P9ir +zMi-%mC0mhxAp*Aeh9#%GjIQR#Pj1PuB=AGSl0ee1L`~_Nkx=rKem}#KpbSgG&K+Qu +z0f+x*|xe^*FVJ9VMChMIf30c!1VW5%jNnkCFFVKm8!5Wq5%*4jBkui@qsxJnIysf|< +z%W+(XBSKdC{5i`kTMlMS0xAOt4z0b`FVo2R2IQSc&}1yj1Z1J0LG+@evAZ^*X>2eL +zPU9y53<(Y8m4KN}4u>X1R)nf0_|+DBl3({BI*Q%)5Eyc627zG;-D{0e_65*A$$6UJ +zsz+i!MZqKXryymEg85iA0i4g~J^UQYra-jJ=cpq5EG@4Hg)2v)z`GXlo0`s8Rt6fU +z;2x@#uPO^QD_})ZKjaa}>hL*)IZaY|*jR?F(^i3?>dqJxYav+cIS0^B=vBAw$P3K( +z_okcw>GuQ1A#3XDq3`|VTAZO46 +zO-KekaI|L2pa=HLpa(W-5*x62h!mmXnP=gLlCw?)(7}o<1f0#%3J=Y>6eRUC!9duN +z0vNF7t!DAOhfa;hY<^6%)y +zeTlTruUk5EajTn1?|yyz)=$?-|MaAek)$q^r24-Gqz%P6e^%Y>mZeMFG-jW$xV3rN +z^qGAder^KSN&=&HSl0FbDS`fdetH7RSQ{mQxv!%{Ft=}6FtZirU%2puMQ$cYn|s3I +zh0_NUFm;NuAbv4krMuJNg&s`6taGT(#r=aT8*OJ03JF$3?n!@6x +zi(2O|Y@Xh{Y<6=?>wHwRpPq=yM&cY++*jYiP$V^x*^6f`nKylLa|@h({-R@ldJ40| +zP$iN=!#i-o>r_>0UeGXI=fJfYN@Mz*nXNN_dMYX(^^(esNM)l=CAq>v{JiD`EohZ~ +zdJ1zTA0s4%^LC-*xnAXC0i1kE9m-(A(j{o{+`KGlnZJl(KRu=ClF}4O={uynY9#Dqje6lK6rWWd-ocBK +zZRbRrimn{dfiYuV%mDI{2Gmii5{*N1ADZZF_s(VXY4IbG#q=<~08h3Ie*#J3Gkx-q +z@hph}Alowu1>~H!l3(MK@5!H!VO*eS-3V~yxpKqZIwZ->*J_8yi2?;W8I2Zd=^8CE +z(wX573b}kl2d36>zbRmq#wQSp6#FtB#!&!f6XRgua(eBzyC!^6?rM-68I=_^0lDu1& +z>%F3*U3+_FMYNBnJ=>rLR}e~Th_nTbAX|O?^l`Z=q+crW$DQBr@un?g +zNw!Mbf0Eo^`6QiRH&SSmv<<}9liDT4oSB@Hq(%j;lSzgK%l70F&G94?&Gi*GoFUIR +z<$taPrZI)33yp_~|9fq&ZlI)f@;PxQO##AqZ^?O~O&mHqU%N7`4C^Wv{cDU$nlPgh2B~LeIo&1U?RYk9jPp*?C{urvv +zaO#34Dyy}$5u`I?;g!22G;wUo#LrW?e(osj#~ZT$SugGx4g)N&6tPg{Ig@gREK{hg +zBiW`ja!hIDBG~mb45^eq&>~4DH$y7jD;Fe{RH3ivi~MDfB!W$s?r2%i08K%AnPJ=M +zA5Mwm$$*L>CB_3wRRu0Hj#%!i=n|zuHC&adz9%(MXr3e*8d{7*5W%!*_1ZPt5c@GhT+ukzSeIb(}gB=+{$z7UH^p3(mQ**1lM8v +z_+_bRDLwbkZ=^g|P=547vk229VRY&_Qq1p?X?_=ro0^eO)10K{Danu=nED$hPdKRtroYn3*4I +zsDG$0{;8(=FZ<&5?LzAG*tBJ6y;X0TH26$1$d3#?mBqEWa(zap>3l_#@3SQQm~FUj +zj|&y3MR3UJ8;W-D7nEvbIx3rYQhrn1zG2#LX(XFEnCz7yZ=M@g(j#7xMUAIA7%N4Uj$$mebby5%R+2O+f-rk08Zn++1PPPxbd&Fl(2+a-I-ik$DHOh{I?R>=0jz$46h$>TWy#do8ub6#) +ziJ_y%tokSTq!ETTx_vdppixALKAn>nCrW@yMNw-Nrqvc!ug#XBqe={|wj?GT6}r9% +z;?9gX+^R~h8Ll^A4B{_*m(D`z>Q!0{O4`l5s!h-4jZ3uhT0Q^hL`X@}Q&$tbe6VY) +z^^N(Zi0e!%h1CNNe0qB|rjM`2G?)=pWAds-U&GFf^;3-u#q>9A-T;4smNn4JJKOp} +zej}+GGMN435I@}vp@#a2>=^!+D^qe+h$UAYF2eadIqoux6%#rX4njXq*KswP;jbu3 +zoq%b|^lEHsH{dfC%I-h(r`q#5c8B?-S1`Rd$3wEV$`UH@6{+qLSXz3*rhA7Drj_Vu +zS_v*bc%%7ZpIS)GxBQ^Sze$rcQ+Vz)%{L}c1zxU-l}$pUUWuycio&h*S1lHI)&Jx2 +z_qSj%(}Jl6)m@AAHK_4;dOQ(lakKPwFKkNR=PDWgeE14nW^&#D$rr+sN_7Q)-jnJ( +z*QIh=H0E9Cx?h?tVVzJ_P5Bop{1CUk%Qo(53gXHenQK_7IYrBPY52iJ1aUGX)&?w@3*yM|p{lC8i%&ZU-G2?%jjQNe}8`mS}3}FptuerZ*Kx%Jaq&qHI$?cHbn|Dm^ +z&6C!VRQFx%s)`;`k+8@hib^NWMN-yLL6S!UX_}1-NI&FpSbZ>=rpIwepldu`3=Ngq +z8E{uq)pi1c(D$pk0M<*@qC>UmfV-2Dya?fIt!oq;>mBZ@dm9fV)cX2lG)J;1$_k>k +z>FWKtNNHubN8oEbxL%4jLVG!uO#QiP^!u()4pvfCb)fbf0=T_Re@@M*-~bM3(D|#W +z`k+huU%$iod*E{Kjp+c|gFr89z=ixPS +z*zrdp=?r<3NZ3<%8@lm_GD#yEBNs#4l$IUiTIC%{rIS)KIhpiTMfM)P?!ui=vRSG! +zK8+cquleullK?L6w)rGf)AQK5Vlmt2gs37td?@01%i8T*#~+zE>J-sFvg+0OP{^$} +zTC*L(=9|ea-{{dtql^jGcFWhY?fi3_pC4Ek@w@ha8p``zJK?&fv{_~fr`xRmRab8B +zufEL}jE+3_z~KBpH2Cy#pIdRS&7d%}Z@GjehVv7Cm*FJNco3Ln5@)82C8=$p=j2|) +zs*h6imV+x5K3At4MCy+O3(l +zJB4E!w=^?8j;j_u5lT9qlWv+$95+z*_g1%f{z(^!ciP5nZG5Mo(D<>Mm;rLGX*u&u +z%ZXKSk>n0%&7m3@!I~pAf|yk_LCh+e)OXd$`5Yt3Eijd9*SvWRl~^d_K+o?2KF{bvzw#eOK*^K6o1dOi>PcfgtcV$N(xv^48_=GqZd>CgVBG94 +zpCq|BPvBMt-MG2CAIVLdCn8Be%D~x|AL-{BeToRdJ9~g~Ns`o$ZlH#xY8;A{G*$3s +zU^*bVQqcZC)_VTPK)^V){H4|!*$QIMro@ON1l1x)evRt|v0=Uht +zp#C8MI$?Z9++-ee2rJKJmNq(HGyuII*SGjwsN#jg`+F1&4OAJKVFPvpO`%~&&uF*d +z$!0BC;`&Afs70P5q22WBl;m$cJk?mGdU~;lrq&?V*JA9T*LoQyn;8wj+f_5qDfkWxkl +zCVKl0Jm5LWZzEg)SB>`+;l^Ii;lA8M?<1g&R1aZ-(E~dS>70Dca4q4^wPvaz$1Jc|v)hk5=J;cnVM?>hhl1c> +zWUk941iIC+E{~p~&GUHF8p4k?)jzaC;I^7lWxPdE(;7RbHIA9qJWY*O;%-cFV>Qfm +z*RxZHxt?d67UoBWFmC>k;S?|PtqiizWo^(5G4s4CobRjI-i~RivnP*m{H{j3W9X|+ +zY+!7oS|~Zg!DRhsIK%?}W5aMkImtm^!F=1auJm@y=RA~Yl*74Phi=zqyUn{hfn%I5 +zrkU~9{k&!bEi^|z{)59(xIKKi6M_tE%($t2qwHfxeri?IQb$9miJ7-^q*Yj@6s +zJx_(0!BTE=L7Vf8sm+C%Q0p$uOsO?m=yL*T6EKrjP9O~ln~jb>ClD5CP{iVD-9EJ$ +z@i&A?9@qW|ws9vc3n~Ap@FgZ@tn?FPLm{~>!hV7xu=KmSNvB#Nbzw$+?0bt0@2DiIVOHIAus(EA>~lgqaPcC)byh3Ie-% +zCzSki95YQyn&adq&vEj+X-(2W9B+<;??)RiqQaaw{eSGe3!GHNu|Ga%dRP`jKtLf0 +zNl31V!tS1#*K +z^o>(+gNGY|iqMA1R8p@Bm?*(%1dm{8vEDFwtGH!G#oX}og;bpIZ3Ukmt*_)6Y&w)g +zidY$FrXUq7w4KVECVe7Fw~La^Ha4X+l_;b3#R0)`nw>Pc`ce`O-*~nH12zMKkK=R@ +zJKmpfKeMLp&;51=BffVuj_=@vX3wfd!R#Ga_B5!V)W@N(3O8=uLsV +zYmxe6=i>7k_ANdOk*z5p07YzanU>Q+J`ICja;8%!uSj?*a+SCZ0eN9x_Cn9}mT3?BzO8Rf`{CIiHYb(6xDmu9MvqG39WW)9h9jdQbBGN6aEh$KS-OiI!{M2YWw +zQKo&Fl+5I9$*KfWzEw%f-2NmwjKpK%7?755Td+k7%`x~ZXrUdDm6Y;pPC*C$hn)wm +z2^Ppj7{d~Y_!D(sQ}*9zp?{K%4N>XMa*SJ`^AFh0E`6pW=wT(B=?K#CBpAfg_(UFY>$b1?7ch&&JLrpS;lC(w;4ayrqpy +zA&HRZaNCj>Vas+U3u&9F)p_fK`SHmg( +zjVwZ;%;6iPBIYgOq8FuojqpB{ZF{-!-4lZSlxOv@M!*_n8W7t}lU5RIxB!M!Z{TZZ +z1#fua{U$;zq*&xLbZN;>{bjkq5qPBZmo>Cn<~MVN_m&6p$29H2Slac_Ic534LT;81 +zdqofjUDl6-j&I%s4J$fyVqumusx)7}v!xvDUz!_m0gvLbf{3u^%Xe5i!aQ~igoS75 +zIMz}_&DCHMXSV5!MICmcbf4Eghrn3b3k76}t1X@W6+2#{NZ=&)&pxs@P9%XP8ca|> +z2wO%heggNj*FKX$PfL#gH%>SZ14H~tGRE{dft|$TMP6y(R_XDjlVgt|y4YG9X$!DG +zc>{|~It#I($526UOc9#?1zwvX(F@!V3UNOjCmX`VD&%J%AjXEB#l`CTePID8Fct&g +z#4L1(W1eg<%kf_PFkP^rx2o}0P_rd-BQ}7{l&A)CqhVl{YsU!RhM#fp7gX;$D6OtV +zzPeFtcdjnnTtzCex`OzUly^~ESXXDBw6kkf910AvS*hLagjxn7k#ZYf4kH2w$oqG) +zus0^p<7nu+S;4Q6YS*$SJPTK0B40rd)?0HSOsT>h5U@5ETjJFlQ0n-72v^}KLJgcG +z=mf(-d-b9rh7}IAUth>8XDxQ4B6;B?wug`<0miN~Vj(63w*J|ShkhVXpC_1!LL0*$ +z`wV7j=0v*rxSr;ZX{pwssN(`fdEx~2Qx +zFEYF~`~4o0lQ1BA@zwDczTO +zv`Cv>)v@-}GHbM%PR*SLwA3xOCLOUMJZ}8%&}<0L0TL$7)@nlcJ=J+gjcg3k*!RYv +zm2xh)pV+svi?@XHGUD5B^YW~yNFjqFDtoRkYi`tu=CQ +z`C6mTX5M)zuhvpsmTZ3Q^?p*`m_h6G4kIMfh=>*DZG}~dD4ClY!u~bzw1VKFBO&xspPTH5ZAp;b4(U8xCeW5~+DK +zJ=sVYA3_?#eRvVdMnj*eLly>i7Mit;q_XVz#8R;2o7P$qCcqq8=oAAtD7{4Sve{;T +zAMB&0a^L>;Ja8g^%$A_lI+s0VsKIu1Tl2=Csq#TB@*Yd_+;8dbIhlUB>0-k*O}Fo! +zLv|iv%g*Mf!ZyS1WvA1eS4m=eJ1OFO4-lKJrC!M80T$qSH{G7{VfhFKnf##+74;axg5-L@3<8WEZo +zUOY|QeYgesLZ2}$u5GV)-UM!$65VY*!;EOxefH?m0QZWZ` +z4CaAAK0YV|0(A4;N7rj|e=nD%X8(eYM{qICmnm9&{3;lA$fu#LKIggKz+EZEFEgF; +zOh0=@brK(U+&d-}7w0xyXrMeyWo08F*y_g|I#i{Y+BZwkqO3griXtXp;dCa +z*vT4-KB2X2TUz0^lxD3md($&?KPNDZmZC!JL6gjyb8?MgcB9iN*1mO~yt#So8SB~;zJqWHA;(};WEsHxbrRO?MTz$07 +z$b9jF$`Ow?zIZ`-d^4D=1D-XOdaaMOGq5dSJ}-Lw3h8gRE6}R&jbvHA;EzZ~lhEyn +zFn9aQfF*i;0~jK;)a_@lSH#M`Yog(8oa^~L|Nof%=dECNBSE#8-fz`M3vo*vLm2xk +z?H^Wyp&^Lv(FyPmdD~h7{NMbkMLY~!uUi}z#fSrL%Y#O=X@Ye;F? +zoA_>UwwwpY>v^Dsb=;aO=F$)mwI9?8O8qj67%$o7G6(6H+N=k@4;%(dcZ%6&!xhd} +zYrr=hQFkIYoG+?}R*nf8|B+RJ8Bln~49LYl@f+ +zwFe1wl*6^$$NePV2I=2U^2|FtBH=S!duiz^DwDkJ;V&(+rUVZw#dv7VIx!xya%8<~ +zp_dq$X6Qvdkzj3>VYIGnnl(kI_=ZVK>tS#9&<=o|Pidv#-8KbUy0sT%l>iTtgNPjV +z&}w4OwSaLZkPEkwd@&rdlD76vpKOWXT&K50aewZFukQJU2Bb@9`3X)d%t>yc*;G0C4Y!X +zRGktm<^L(SzI529a_jeGe)ZNL;{6as-Z)sY&vG&F55rgx{@5NzEeZqY8X=KEF29x# +z%Cr89?f@nU+6t{D+tYi=N{IR6%@ybYUiFy`1F{UNfn9jmGl5dYo)gf5Y1Skx>4AkQ +zDY6VNCTLk^%poKnpaffWqTCQg@Yz8=SU-S{w&A@Usv9Lj8=zdil(C9pVexZ+^7_ku +zb0P5y(>xM?D1ii!CH{UTa$$fkrAS`Dlg&o^51{#09g#bpEC{@`BeVQOyU+C;{|(LY +zlWg9gIX=*i&|>5Nrn>P@GAucPX#tt<^6QM*!FKeBLZr? +zR^nyEtd-R_TOv}=xdC>6QpSUsTeQh*=1Rp}A+A)08~-T})&<12_u2+^DZQC!wp%UT +zOSSu$x}m$>#}pB8#Qdjp6myPr6qtdgZJv(Ov%CZBs=VsaB*LC2XlC8#OC?5r^Nice +zD@C1_GiX6?~AkEMTtE2d~fOD +zDRp4SX(Ha~vbNEhLjDMWaSnSU_FtBD};MV8)(31=oiPrC117^PTWaOj2 +z_%s*!Wa>A~Al9&*W_-2?4K|f#hCBarMK;$T>`XscrqGMIf2p5`UT)nQY0B?;Qmf#6 +zM@-z=*9n5BsvZOJfaH0D$V1>_?CXO#q3up}A^KwH;Nj5P1pA)Isx7CeEM3@LR4n5? +z?XC@J`Ib`w@fPubk=ZoEd0JB&ds%#954W#Wgy@nnQCI|Y^K2$O1%5A1q*~o3Zv%@K +zybVG+J9G{$t+YiEENQ-JL{+Ezfux@pU0WPS(M@{KEH?x>g4lUq$3CJ+xyUJY=|D7Q&Mh-ct7%;jVa)Q4#cUy7}+)tw@42|pLvJM6=VfYHSHA%qz8d(gz +zMsJmeYccM;zWHb&Rt_H?HDf=VA8GdUZGQfiQCz0|i52{Mjy18!HPGMC;U2lB+DFt{ +zOSRT2skKYiyj)`IPkPrDI6l(c*n*c}$jWmti}C^UV~`Q)u$?BpVZ<Rv_) +zuylk|bV!209a?ubR%qH=bdx@Zj-?a8p0@2KuwGkNOh|}Y{w~B>o`)c9r@kw*;(IbH +z0@67^HY}TcF{lsUJqa4PJ4ABGw?b=mPJ6bXF60(ybx1Iy*Ic;(M?M0!QHOqHvNEnh +z0<16E5%EueSXStn;oF%Jxj#xsOP6##K4wwK*Xd|$K~IVDH(BrzAz$7Es*P&_BHO4} +z+WUM<-G7+R1C-jqAI`&tu{sK4b@EHlLj@-kSx4cDB2H*6f0)GxO4@Z;%kPoYd$iZE +zHvQs_!n3P~oCbpRB}ijxzx~18!f$_2GmLkvKJW{uq~7S7LE?i>8uxukCu?AA8iB5E +z6YS~&nGhHwYdY-pYfr=@hiR_rK>gB+Y8mOpUB=(6V)r-`Q$BBxPQyci=7EkC`Ey>|Zi%p%x_S!Y!mx +zINah+z#Xm50och(1@m>5VJB)wSZ(j(Pp+=gpWSrd;n`5TTeR>H+h91YRecrA+>BkV +zd01ez3e9LM%>Zv$jc6AnNc@WLzP54(1z6Q57~)WRSIVki+hF~|)965F%6{;V3>NMD +zO@+v+6Mh827mu<%r-#r@1~TsC*BhY)3lhmLx_Tw826NHnE18!7kI?*L-L`^V%2dvrD{3LTDy~Ig0!Q<@C2vVbwFi{EoSp^o6CE0!sDV2xzCm%;g8mxistKD8LtABHjx9 +z$rboqgl0}G3(`9JScD#Ns9j{}4%@vAuP`^#>gq9Io=*VUUEqxub*II~)bk!A6VNSu +zwgYKs_F=+RkbsB*E`4Up>}kAvrbPd{mSD3So@rS5mY|+N^sWhQw5);UyEQtMkoD8t +z2;gX4Kj-kHpeOE2Rxfa;}?*T2eSu}Wzc5`zY2kY +z27F(z5O6-hkT53=%<55(M`*l^wyCv!Py51JDZ(r8jb&L((f@Rc +zWCl8*fQ8hrP)`SrkYuL8@7S*U{&cgwOoTuC5uA56IM%?$ZFHdAz(WgkV7DQ7T3ZdTkpj%`>E^dvp-vwdN#Ye3DlePDg&NwNgtrmB-#6|Lns;> +z(B%ugUIrHaDG#L&2*Fa0{LVoj8mYTL%9Hrc5-`8TA$Wv=Glu@APO +z-M}4sYx>6;xZJ?f|Al>YIy#X5<{5aafhQH|^hx?Bvb|UbPBZX8R|ilb{@ZTg6AWA) +z*XcbBe#QvSUM9WHz*4`<4J`FJHmNg8dX<5Nzb1#$7l+cH4yErl@Fdz_m*kx?jj~9sWlnt}qzu3@qb4;&h#U9A3bt +zzj;|hUuih}ucm+V?}h%Xks4q6tLG>U4>cJl8(8{pv4N|?gbkcQcIo3Kf09YB +ztJCyP4ds{lzs{s@GU=C(*7(O6c%y-P8TbPOHyOBojK)9Oz?U0%i-GIL>U1e@atNMd +z;5vi9+rR@2JfL3Zm-ehQ@Dh_g^p84S`fHYf6DED7f$I%?>^O}t^1wuUKa-IhjcmbB +zA;C!$aPk#F&IT|_h)TrtINas0wC{5&R2LlT~4>fQP +zLtv7DrTh&Brg=zzM<1c-t*uc9CJVG0xBBvdt +z@r{^>tmv-cuVXsHvYr}#+T@@1eGMON;Kc^spt~vZmg%pR2Cn;|p=a>JKO|?Pksn+l +z{Wou!&bZ6u599Y|{IypK{@gn?qV(VE2HtdJIH!i^aQ+Q9Nd6V3;=&J-%QRoW$N(>- +z12Vq5O@86eb&u-$Og8xaAJeelhsZ>9eLlEN>NC*b&oYQl8+fRJ6OU_pO(8<{Az0E^ +z7<@@TdZW%?9Ksh+*XKW%OMR*g{s4n8Hv~Uz;DIK+#}k^qjEB$-_isiL%~zO}fbY5L$%l8I9ciinKSjNz*%4|Af(v{`~Mef?xc+!8h{f)E6|ou~|+X +zLG_A8zTF}Ddu`G9lT3M6y{H3Ew~(LYS~T)c*9^ODAw{+(;!(@g$t2A2LSep%x; +zne=4_?q=Zi2A*T!s;wGd=EGG6zRIL0UeW1G^iO2Vt2!{ir1yAD!{r9f7^Iedqb!9GVsv`?x3S1i8pm%sY%~z;5q{j{JTz<{#a;W$#2lSpREW*BPahr +z`giGDI{)b&h7J@OxbSVAF7u=RI~v|%(!0H@;QH*ole`Xw6qUY*oW +z(uKbS?kNHDTcyc*u~NQ7)R_JeSlZk3E1mH;NeKP+2aK#|OMOl?_;m(voqkT{!pU|=Yrr7|( +z83Xt4sOvX0lzw^$9ua~CtV19gx&KnB&pbo#1jA3Sch&*nr?(7TXVR;>>VWXqECYx6 +zS<0h&Mnmh!e5{EdQOepi~`CEYarHKB9?b^YgEFZ4zn8LY41N&RbDNSFExet!vs +zev1KP|GZert26XY3*iY!;{bc=O@hDP;CC|!TMXRUz}pPmK?s=NFf7R#1fr3x9{pV= +ze~m#n{V3fZ;qmAp1VX>_nBGY@OMRD_{8Hcb1`g-%W$0`*={*g++rZRs^mlZ3T_4Hc +z-@r%fR`&o)mG_u62--HnUECcs4IhGh$%3Eh(>F=jQ`QHk`yA3S$>)Aus +zKVj%+4BS$E_4v12BK>KyMWlbi@K8gqmr0mrV5zU*%dZ}<2_F5LUV8sL*C5O_`KA6V +zTBxtg51}jNZ7}%Ke-UWL`cD=lopYLG4E@r$M=nG2>O!JQZb{Sau +zr$bcZ%X(BEf=@TF%!gS9j%l`v%!%pz`d?j!{jYA{pS=3bHTc4Riw)et&SZrrBOHzF +z_VOtAVAz!!%Au +zL^QJA%m0?am+?px==w_iMi@BU9~vu6J;I(;(a14NrGE7${|bY8bX%QM;4KCoXwrKX +z>U1fu*uVo!dYyrfHgNby_s<-!{J92S_-W-n^6UQD<>lXM@J}-ZmABLN6MoGYSmfDc +z0}lvS%)m?W8;w-nF8#B{;7fmR55Y&b*X2q2X$IaJqTj6rxco4kU*ypVAy~3Wy1?=~ +z4}oapcCWq?A1<$_B$!`asvjxvsiyn^eiDad{3SX}uO)ug{dw3O(w~xF#z$Z&U*Isk +zaJs;koB9eY`NOc#yUO4TEco(!Gy<@{(!b7E_$-WrKLGg8iS!>oVMOhiUoz@ZC?FcS +zHXq)IakXbwj~gE!Hg0r0S35jDeC+7aW5+~l#|*EVIHEdUS9^vXj)N$o;-iNRuc;kV +zoiAzp+2bP-P#U5sxx=YCqes_{b!$+E$dCzV*H@267%SHhuHpm$+yU*P;xDO+oUZ9u +zR2|{sp~!kS3Lgh2(#{BFEP8!8xi1pWX`c8iPArN!rOom^8qsve6Wxx@vp#3iYbm`) +z^Ym9t`VdP0ar5+dP5N&sy|{V$ClRL`nw3r=xnJ|-uT1t|Q}%U{<_I(JrXcmpJ?9a| +zV?KsBa;iTWj2jtatB)bBoob%JxRx>A@iD~NQ{7}RE@h1EJ_hp={!z;e#`%o#Wgd)G +z2IHHlRMRG>d0W;SjGc^eaUP5(4aR$nag~oDZlr39<0Q}>uQ9?RA3^*|)tiRI^Ng|7 +z$MBl+fx&p3G49TTvD#S|ooq4^jX4EwK_maB3U-=bfz59$TA)6TG+^W|JI`g5 +zY{4vzihrXi4$h`vK^FhENfpfCC`yPn;GY;ryF_Oz(^+chq++T-{i-1rQ-9&v{2e#0 +zbH-u?DoZ8)*u7wIhDf|f{}jNzqQZ|Mil>_< +zP!ac?*AP<*atJlJ;ykwuz%~Z1LUj}xO$l>!!Y2S6HNs7*5h>NvjgRcpFNgntaHT;` +zg^{s9m>DO|*6OcLsFvAquT#CwN4*>c*~Sg>2FPnj9VO$nGu_;#WJPXvZt#hNr8IHn +zRxdhE_uhjUEoFMeD~~$lM52S2=`@|0n4$kp6ZBLJ6_yZ%VFHvOsLEAiUG*0C!BC3m +z<(8=H&Liwc5gAnj83A3HDM4HvMRjxg0EI}r2q|sGOWev?_7qjLT({ZW2Va;z$fCN_ +zVoq5s+B+F@%0c}cmkK(J3YzGutGS%7B5u4yWFoUUaXN$#kp3~1Dho-jTT9I!z5_8o +zaEaO_UbF)hav(#U~Lh|I+3rSBjkhVZ$g_i3I>V;5($2fnFutM=WV$)+iokgxO +zs1J2=iju*0VYT%0hy#fQB=Fu#%zM9ZYP7^@8n7Jl&@0B +zod|Ua=X;*>k*JQU+c@9zJoj(nd@uX?yz;K)d{AwX<7uwd8Z%he0Dob&yhS~G|$bw1~U%s{w-bM5hS$psCymUH!@T*C?TbDrE6 +z`jo{S +zn&)bv<0hmpnIu-v?WnO*|4og)pF3>Z6bdhhx-+94 +z^m;GXUepJuv{LVJrT^@>)JIQD;qFzPz|vHbx;;wK>q+aR8mfm_S@9dAN|1a%E2WP@ +zDK%QQ+@w(#DkoXAO0Q8;>CJ&kt2?H;>Lsq~G_LA2<<@dlUF;a~|9o=0zHZord@ALk +z71AQOTPjWOrr~Fb+6>V;B@5<|?A_b8Su{~BQA8y>cHC&KmwNgq+gh#7^Dl_Ew?#%W&6ns; +zA%am4C^nA5^YomfU}w(TP07_JHI3)uPl&RpjRiZA6WcvRVe2P#k;_jcDB~r1L3ayg +zGHF&lkD$8LOIc0od#Rl6+x|F9I3S;QRkhZZ?z+}PoxVEL#Q)@i;~v6p;1dr7 +zZwmV#+BeseSiI>xT7|GACI)7tesZZz-33#EM9R%J1w)AXof}s_b@5Z0DH#m9v1lJq +z!HN~didFa{kM1{ED2Jr>yL_+=5-@>I@g=xN>z$O1Uo9rgS2i +z9+?|i8&}=4jq#GW@DH9A;Ep5h>d4T>rlDY0PRoLV+35HbNsoTmzrY;FB0&^_zP>&n +z*9X<^eUe+wn$8muCb&Y&N};$B?84(#$>a9W-o|Z2b=|PDhfJs)T|Mp~#>lc$>SVBsI^U;U{gmn_w@niZl2G(G{MpUas4mV0y;NVGT;tX2g2i_!ZWZ5>HOdS;b{ouhAB2r;N;gKEF87OUlZlRsp{u+ +zU63sH)K$57sve9ugHI~QM!vkRgvO?KPVWrJkrX#E_tvqw`r5Hx+xNzCgs9ujAwCB1 +zSP5;WcF@1{r%IfzB{EON2BvLd(Ehw#i(GuAcC~;m#uhu9E(4{k1HZM9&&HSgv&^3@ +z;P15@I#6gapVq+b^1S-J+HyV{U+(KFs9z*C!&9Y@W@5Wk!ETu^XR&@mUcAlb3v;jN +z3ZmbL0()re7iZL!B|VNIlGSx(L&i-UL*mXekL0UI+|;9`%wBxU3zf7aFiEAkL#ihY +zudbg^J9fr~3S++3j+szBZrsHB2}4HbMw96mQ+D`RL{1_AE1g%~_}cm*3QKM)iXRb(qUU$(1@9>3cw|rQ0td_zD5NK!A$>Aq2o1uXMQ{-D5m_fh_lovM6fAJK@R9s14t1P_b}AUfkV@Rg~_w +z)N8p@uP&#Q_&Pd*Z4bM^r98g7QH$1#me!50rGD<$7#n_w)DIgsZ1ngc`!krR(1_|R +zh5@r$4KSpCxJS}U{Ei~O54 +zb>&F`oc21ZS5^&mRj*W;`X5*Q#3i*Do7fRxtdVeRMpMyItE+WsYDETBgx_I=&Ayn=@rWol)e#!$jE6k1p#F_#4D4RudR0IQh9Z4O#d9)Kxa3(1^?>6X)hHb~t>g>W^Scc><3MXafxNri&h7oBv3v<+wdLgp4O&A}#iTsquFVtJs +zKHeL1>`**RFY-w%Qr^N)AHo7$R`~lwE>W5rRQa3IX44x=VRKSj@o{c(nGe+kIsdJzZr23VP9GGaz8af5T2$`DWz-$l82lJi)5x;DoXDW9!D|&TcMIWe!763C&i_YSJL( +zkr8zahQgek%R?jB=^vFCthZt7d2RXS{t7=&!51}+#Mhw_f?9pBJCd8W&$Y+0-s;XE +zX-3>DzuN4O +zZ$BvM&9`=W_ES7)o;@XO&=Or_h`;>;&s!71->hK}&BoO1)3CTroLD;oOCBbUv6W*O +z#iVKU4Vpppr(CCNh4j9TLgevIygELpYjep5g|B<>vP3Znv_%VYjVG%1-s!TuiKAYE +zO&r=tzhqHj`ryK!=G2)DK;v!yd8$LIv_hTj#>*>C%0XQhQRfvs+i~2Pr1nHNVfuy- +zt~X-^9u%*}GMtkcFHh^JC*Vtw92w83??;ctVQsc>a^Zieb`67PyinVyIu`bt!Of(H +zBBGJveKXOxQDtSvAOEjrq96zAI>crAkFYgfZ?iz^B=O1cVRd!JD$q*C3UJeiEcu>+ +zO@w2NZsd(nZ-3R4XNlCth%>WKX`iF|xTS^1sNZD^e_4^qWXexcJyYpVS7-RJGy#5$ +zM%wRh&wH&7nC~Eq4`4`SYVKtdz1NN(KXy2#88gHX-$=M0zQV?ih)HTIpCE@WHvKA3 +zH7U%kc(PAv;g2Es#uxVLUDg|RdDV%u!at@A)SaMOfqqEP>F!{YcnpE3GB_AH;{;|% +zpCk`mb6g`2L8)&bs}rA=RMEMDcIDU<$pSo?A{Ox>!P}9nOh9=rN?i{}*5X`AJieeL +zt{wMaF|WyttUZbHY3GYwI7TSOkrW9DayKe8uPO3vu#3 +zlul-+NB#WrsFhmi=O?G-E7=v|AC6mHD)pB4uGCJ)D+;HvTS~ZUt3bV*t8&!W8?6e; +zt5~E7HHI%J+NEJE8@j4cqM{$hpqhu@qz;GuCri+>gEVNn#k#QDfYXcFPHEQTZ +zA)VDTSs?G|#E{_=>I|NBELRi3ePdZC@WnAt$f24<#n^!H%&=ZnKz#hf@%7bXNIjvF +zNQoVjtu;0(BP~JGQ-CaccTEJhbx;#-6!ITID^k0tJRPV09U9|zFayuYW=cie$vbi| +zBs-&eyJfuxWAaU+d1|)b6iUTw5IZ`HD0oQlZ__}e^~{}f0{fW?n*mUwz5w-$(M%7T?f)hTUrN=hq#-U%)#L_IPo^6H +z9hXg`Qh!qO)o)Tc^>D;ht1!%uL{fwF`mzY4LJUCl-2_)KN4*R3XH%cvtWxSfUG)p1 +zd^-=(l?t8`SXR{l7e6U=c-9{yc}q~8uV@c*&lCsiGpIbt{$=;Tfh?xrK!&8pr=)1n +zkWycVH{Dq&)sBl{w5Ouk1U29ehMwb0x5ITTrk*1wb#?octfu`6CoKWJPA=JyVhS-l +z3An@MIYV`~a#TAyJBF#~rChNcy);`LB`kvvK%b8<7WVS#qqsc@5T^ygR5^)1knnV- +zxd+S;Q->{fBKnmH)6jp#1zsZ$bz=YligsA|DKalW3rujNo^iYMb +zXPR_*I0gd@HU5CZ)c9Ap!Hb#D)>K`0&k4 +z=S8M@sKQH_<`$-TsKU1}%@>&Fp$gy1G&eKNLlwS_Y0};Gm^#QXG3ay5ly@-EX9Hm> +zK;l~wCfW216I#Zy>1h)tZlarJF+3D-;Nib=Ufj6?okJDAESgQ{>_61>wJ9(&W>qdb +z3I%=BhARB+*`#00C}^M-e#yX%1<_L4cfQP9*9Qtn*U3N-75uCsCQlQz<7=fyYy?>bU(4abBYGvn&xjk%B*`$P4YjtQHZ*~R{=>rZ@m6*bV5w0j* +z>5SpB4aMgRQza$-z{Bgg=4-gDLlyoT?|WA>&A&1I0}WH#b>2sGr>tb68@N+e;@)aZ +zZQueVo;sp6VJbl5KdKA3n+w20El9{0rUE3swPBy;0V0=ZV6Pm0}WF}b>63RMVB$rr@2@1g{d%!Z*7VCUq*@`b4YiEnL~3e$O?*M;56g>B}-@`b4YiEnL~3e$OC(1k7G +z!nSZ>OL(emVWyCHD&WAvFEX8*nf}3rsnVLx%evBValvrl6(l6&3sa>fzO`YW<}11| +zI^Bg)kqcYIJ@hKKOya440}H>#bl_YM`Ue-LN^3fA=t|FLqHl7g^M$F>5`W;~zjFiN +zkc0*ts_6N6Y$`>YPmH5_%eVRLTVc2b;1$Yt!L@#1_x072Y@l?Qpg?BNXIZXfH!c;d+ +z=doy3Jri@|e0=me?|c@vB@6iLlW?7)Q&!cHQG99JY$BQTkF?~2Uut_>r#2JM@ueC4 +zt{|UT$p^sH^g^WLWh8aSB%-sqZG*-g$*w+(D<20_*AzPCNp%*ESI=>KR3Lz}NnAH@ +zudgXiG%mo7avtw7-zjiMme5i5MO@pj+HOX828Wl&Rw4YvxikRFV$uI~Dl@|o@hl%z +zPcNia?>UPS5vDEUH)oM<3xHd8C0rb$ksr3&V+=kGw#SPd-cLuCpwmYlR}=B|2sw_3 +zUy0?}z@DDI_lM`=0lyF5#RI+{+9LywAKD`WjTXlW_Qmt>Ld#V=bN|Y?k;xa@$O#uN +zl7&AWnXVW)bL7a8tNmAF=#mZo)D}LNeq*w818wMgLZr`AB)qflotJUCU^1^WoFAQ&ZGQ@9LDx +zIORi5xlE^g?4&5qg|L7*>T4&39s+nizdQ7`<0i>33R#08fSFZXEO^M|=Uw70q(JVD~8II)vy}*dK +zOkpX%$nNhFUx@m8A1pe$nb7 +zhi3789A4+R^zy{L%p)5(VI_0Yquh1(aQF$fdM-EN6xCn_1NXGSD@V+~yQZL)j+zr? +z+5RDydr35P3Q*tUn$M3?U%tuV8>3W#mpQzY!<#s~s?B_2*vD9OtmgIPZ&*GYwI-IW +z;du>rC3PmPO<19Tx$<0Qy@zAOtE(9G5f0zW;SC&K$>B#id=G~o +zq+I!EC^k&a7;DHmF{xs2kqn&_W#UdSz&=>gj +z;gq`$!e(-~D`P>FsP^%~{xY&lONcj +zuBTcC9~JO;mfj`M&a7}<)sCkW2>7kS1y>TMp0Q@K;mV$z9&uX^i3>QFF~jzDf&* +zB>tU9{M#LuStOk*N`L0Pvn-{5-&45co3(gAm2wZI)W1dWRJmlAkJzdg_@%OU`KhLB +zSd72HRlmjAA-M8^TlKc%bff0bnVdt%TY@2X&X1I@ +z_NpD+ppD$1mE52W+#m^4gE$Ncqp)y8j&W!WzksYtW=JQ?cYoC$rnqVf;}sN6&>0HU +z#;DsQ$nsHOb%AoaqZ4oC1$Q%Zoen?G;oF!SpXYit3v)eQj6yNs(9ML)A*exKwd8Zd +zbgL8vUC0gnDjGe-8+-WxG4xr&*fW{Nwo&=QSiVTC)-uAElb!P|&20``L(Qa+PZg^T +zjQ9yC(NSi!nCOyYp%&BEs|Lv-A2U|3Du+(wNEyM+4=4Ilt_rjI<&Hij{eYn*3in6o +zFEfyxF`qh`B>d`DOZb3v{1=M&kdSWiE`;n_%?*XUN_tyWF}qwArUxb1`Benk&+;WR +z^sf=rCNuZWed91AP-&`Ek!<4tscdUsHlvW +zU|SY1sfd^Kjq?@5f#-Wy4CM>f>dk$k%EztMHJu#iWK51|;SW#tgt&a_8arot!e&7n +zTZ?3I92XAoRBCceI+L6!j4EHjR!d_}k3>lZFVd7G;w5Euf)JUAE+BzFqm9!Y2{nyz +zZ#OTW$X0)DskLVnhRij*^B)7+@c)H)f!bOkX^Xk}Rr> +zS9zr6>)L902j?ifFbMMxTIujhX{vxsOA2cuONH|%@Iw`N-GjlQA}ywO(2A5&O)X$F +zco>Z>U^IFd4J}~I@Gz#efHBj<*fTzVP0#l*zHI?xmWT1pcv`!a-CA`)2k(g@`3kvu +z7#%+2Ry6QXgS*Bnmk*|`g501bCw~P9e{-!d~Sd&#b@fk-_Yv=?E@O9)56>Z_E86f~kPptm-W~)apX6)u-oV@xTngrET1bBC5l)+=4qe^#!Q{5bord +z=a?!|NtMwJpUVl`fy#tdF!;E>Goc6Q^kccv{(MNASDu{n) +za1keI+MGm;^&%%Nl_nzQWf%$Cr?71Yg&Vm#ueNdHgJ^heU>*fE(z_R&lQn#VOm8!p +zh0^=Pq;GQ6yDKTnUV1pN&14pIZTJ!Pg8XUW}4==S9rV{HLQtEE8yo`o2;T6 +z3fxkv&bP3;<6|}Kul4oWw9w4t@E%N0nP{^m)!Tw!SilqX^RpX>lj~>*FGUo&j%`1i +z_+FQLC1<>V8=)IC8&#+_=rlqXN~5kWaChQ0ZbYG$AlFzxt$Necg6eo36WeChYaz$H +zZ54P+0X>1Eo}a??g2cQdx+*slF9m?slUB|<3f%jfPD-AXjL$^MMvKCI1*z$S5x3sL +zevr#~2wrC}6><1Ar1CJWXYc_=M(WL6>w6jVu>!os1Jf7m7x->bfxDn&B(-=Y!yC~3 +z0G?txK3hIt;HGOz66s8aOsO{t*@u|ybxii}1#Ye+Lmf4rDeYj7s7sFaUhBX!7&*uDJa*Z#vn*0sC?~pu`lRxL=#nQg%>^0XU6?ubG7a%iB +zx+~kd{pb!PzOaLT@r9kXEX3bs;HtKoA>Ny0ILS2Au<0~&5=HqIa4GL_wrezvJq&zX +zfb|1bWRTzj7q#W8z5$OuN6l}`GWc7@Y-sED1tuK-H0DjfEKZc^+k7uE{t_YSTTQT>o%1ev3@w$aIuwoC*wai$)6W@ +zq2?^qH*&@9VT32GEcbE@`Z2H+aO7i52lc;>EBO#t@`1K4Bs)pDhmagxCLZK$uLf!T +zP50dcoO`VX&@&)=6O&!V;m1HWSyaM=S8-JzXJR@PG*BQqP4kZZ!wH-vIyg&&1P65Mq=ryyUgo^FPRe>h<`s^)f%Cn_;hVVf +zFL4+x)YW@~L3>=@G#PzC_m*a_YbJ>--N2o3m4-E)_u7&qN8SExHS+@|b+r}q5y#j# +z+d1Y63ugz%TxP}W;+RXVnB8q5r%7(i=KlYZ5oR{)mTx%z24u8!hdl<_XS@bJCv8M_ +zd1Roe&`pk_IkpQ5BkOt}a+`O;0FKwU8Gkp9Yel4A!ZB1stDs8@-8BOfCxOab?)uN# +z^2cr7<9s0VSzEHiyw4=BWC9-xNniFYDkRx`fjXRcXp^KP_sxaw{WAvQbcu!av$)qP +zmAR)dHJvUqK4M|7F66cDQ7h_xF49JN0IeqBycUPVFxnQ1aK4}62Mbv^KMxX~?g_M~ +z3Q0JVQ5uZNr58`uBJINgIjq4Muykp-MDG2cMUhkR^?RL +zd@L%YCtZs7OK-#i0plUww@@9a`maNIa@3W4UHD_1e@Opc#W5dRG4tEGiQdVY>cogl +zBX!_AR@&lr?m|SpW<}l7&MiyQWO>#^^2E{;X&DoLUa);exT~Gpm`0u_B?)y~jU$=+ +z&Y5po^l+P1nL1#swJWy|T +z_Nn9u7*(G#8C~CP?Z71!=@QzR{Mo{v$qcavAA{lopXLJRa)H~qiC0+2JJBJ%6)Q&b7<^B1pyUM{^Nz%Lave!c +z?THJwPNV@_%xG^28e(qdm{%wI^Zr(jd6{v5Z~=p#O>EFh|LqKJ5qz&8U9siuS#^EN +zD&TI;@YKWJXeMd4A7S!2aK)jl{; +z?y}OJZ_g9u4lC+q)QTs{A`@v%l-HT~je_k@l(*aKi85c3P`&q2y^GJ5iSlWIo+xuI +zjL+NK6J-xB?K9tQ<1yGhfyQ9gVLVa3p5Tju3w6{NR@B_XXrhpNF4Se|ZREb{Fn^-F +zYvJF`4`n>XF+iKneh#kz4C*V350fc^G~iu-7;99zW^*{xCQeuhJJSthfbM@BR4^Bl8GN<{W89CN!AwVFxa$hCc$lWw(;U*njY +z1bOXYE-61s2|bXerFsF8|=aIu%?%pR+W*!EAK>hi{-4aqtZec`3tYwYndalxIAX1COMUuFl6X%Ts=XEph +zKD~3e+f;%*Yd>@jX%m+S?hA*z=?X;LhzK6Iuep-5IbAc#Hyks|iusmf&KDYg=kmV! +zqs8e>9cf6WTX|-1%rq-zCdcf-j+%wVdrakXK4rh4BX7gLW&pHkak>&&c^SBn^L@$r +zbj%!%`NE31h+}qJF>^r$&xOPj@yr+)m*azBSElXqW-jA4q>?=T06Dxl-E0`{V5%<& +z)nK}TFgPnZ;!qy$FMlM)xT_<*)&t`@V*bw55%~}kdN4ns=IMx8&p95D9EkZF$E>qr +z9_E;}5<{L=53w$`5m9v*9k#0ke}MBcs`ufPRE0XcA=4YRTsGcU|f6Yl6i;;isE-U|9r%YM))3Vm;9Q~O;+S{!;%LBV586FNeJ7Ol|yp93+=m +zg-ypV)q~EIUO@4tsi8# +zyF;o7hNDVg-8r6^X8Pgoi;01>Mf-+}LexjxpF766z6;tc)cwg=>iTFGeH6U@I&&U# +zdnYO}SjtD2O(G<=Y&C@jKrX +z;hlxOJBCk(=$UHkhzM3dr$8+{f@=Qy7#d6o6CWZhE(NAu5p_iur>ytrfi?8Xs=~8w +z_@E+vR#5HYpngmfr%B5en%-U91#dDAE-FqWPb|Yrygnggx)%QM|UIpXsx +ztiAOP-gRDPZOXqmf@aY9V`z5Wc*N#RF`$>Zwo8s6zq~CRzJsxzMOgb};mGL-68gDB +zrb52C*mIGo)&rfPmqRXY@93VaW+U)9di!j5G=OojRE2^q0Mz#trQr~fl6Yy)q=a=ziNcA9|XIz8dage}|Pt8_B62ub&Yf9pY +zbQ2|%{O0Hw^TvnNYlo4A$v{C?M%I~eJqXLWu4vP +z3^C^iV`*3cBK)C*bpqjC+1Uj-tcZ!a_=&T?*+AREXcu#qSI3eKcyVWToPC88Zsvp+ +z$GU}o6|abZk199;R_)I8scc0bAEIwl(vNy{tUl%Jq<`vAF^*qL1Ud9@3m6Z080%ZW +zc+kUms0ECNJd6ihz*z5LJTO+DrFQabsy1{^t-*v;og37{=VmL4lP6*6pmV?x)MvY_ +zb!suMFmG5fH*(DDR?JNt^O_a2gkxT@Vs7D>tyavf9P_dja~sFJWX0Ux!5vI&vEE9P#FdCH2phhv_!Vpej@6IRTc4y?32#--lH$?qVUOTCZ5 +z4b~!jX$Lo5Qdd!&E~$!Fm#CF0l_tCYsN!Tva$spqIl_rFzmz(!p7{6ePSnW@Is6)j +z*Kk;iQiSzt|1Kxp3$WVXyS>>dRlW$hFXtQ|cVgdg0caV!loNJ$n%^f=4e-KxnizXJ +z?I_jow0d@Ef1)!jP0Pp9682Uai +zQ;;Ghi3H9NGK+N(a*4kA0&%%+sgX;Mc5%85EbUW@Blp#^9>;DsiO+R$j!M&0t)ubj +zMLL72(wAsJ;8ekRuZx3s1xHrp$j*aDuJIafeD-LVgR(4WFNC0FJrIrfng#7_2wI7G +zwo6I`{;_wMLND%0+QhQa{7@kFB3*oE=4GR4XrAsueX({lE1ABpI<5MfyJXRHY^o=v +z`r^L?4{JGo=vBmX+{(E5RL*XA%0wgGQDWLk$-t)2IOB8l^S4PDSt$5*JW& +zhbGc_&K`ER!5td(_iFw~9li-$(Ll#UliWLA@q +z8sSgOx9S~iqq9kh!s3XlB29zTebJPI*_Y~9_&Y=wC*!#VNKYn#NNtxCFqj2qK77PghO|PmAVC6bkUGr;TT+L_G0L2uc8aaUd-zpbE6eQ +zpVkHvzU!@#NMAlt8=>D}7iGPe_c`WTD+U)hs0ds@)kyvg +zi;p61vKx~AbY6qENx`eph`AKVvTgZP=f^!j9p&!@J~#R4y+NFw0xzCC3c06&o^%Uc +z34xY^wV&uw*UjOWFRYl0IA*sMb1}!@c{a(#YbIV8qhE{^gP-!}wJjabEV6SsGg495 +zLSH6vkJA_a<2WPilhF5V_~H>pUV$?do5YcvA9G>9+J{I55!2J +z0d^?~~S_GkAa#ZaBE~q|}ql<}2VDr_@Fc-;JwXNw^v*sxS*FIjBsU)9 +zr@x5CG2*1nW^;|Ptkn(zFL)1N)MOBu& +zW;JTkH7W%UB$*Kl@xG#=wdJ@OQ)SW*ep>v_9C@BHGiT=0oU{yj9meJYVO +z?C@uH4F8hxuHYUpV$QSbfa)t;$_-vAyK$qcq>_sHk~#E!yzTk}YVtReo5|XX>8avR +zBb$*reKIr*kedM+q16M9q(0xH+|o130e*Haw__Gh_MPYQu6z#Opf073p3SB0!pqeF +zK00^4Cr#$X++ldx{-jd%;kkH=N~trmbS%@w&8T}YQLuW#PTe6z`|A$)B(;LszXR?X +z66Q@z^CdjcTZ*wI!Z+|$$X9s=F5>WO9KN2zZ*zDd8p=Xd76m+i#S6%V>=EB!u`6IrCLqev{Zh(h$^ +zvup*p@mY&t6v`pRU@Yl}EdztR5Purs`lcN1+oLlUl};Dy!&{>B-PeZv*r%UMTEw0h +z3B>6vWiM?*pQ+S_h|-gi1JOw}_-YuY2Ybm~4L35dE_++qVYqI_Yin`9I}-ops2QtQ +z-nBhC;NF?@BtunC!{8m5b}UC2@KeEEdh-vFjLSp@VnDit(8-{`5H+nW?MC +z;Fpi~+tdDpk9y%$J3F6XbPC +zzOB83o-IkMSI>k)^a~M}l-~69_?(nm+nB(P4+jn8EwBGyc70maXW`@eLP?y~Fic%+ +z@!~HJuj-df*ChM(MhxwKD~idSFbR$%{dy;Q(+-K2;gcbG`X%@hX%>Fgr^GYqL{nq& +z;9POCvQI^E0_!?u!)J?%%8H6{8V2E=Q0&oPMk&4fkk494vZ}OCqPYCTlD-iVFhc%wvIlX6i*{g{{bO^f)W{Z*bX%@)l^YYRauoDIItAfz}^X1G*JSTO*@KW +z+90M+j^{GDM7mFsRwP*Eynn~JBk47L)FEBgSTQgeUlUIkrxSf~t2P0f0U^S-A&0(6 +zgH}lrwlDNssvormBukP_(-Rf=e;LWlBVjqqkufz+t>X^EfT^Qs3Bbo;^cER51ZeAH +zAz@ScLkko>!d2Mk9_Ch7#&eCiMm*`&z)kOmO!0okVkph`eyx50x8Pj6<0>pU6%|;N +zDk>|nL%-pqlS>mg@SrBQ2P;6L(~$m=b#b(GU$%dX}7$z-ItX!81@YEOhuxks3tQIkDAPwp2%Qu +zDyJu^Xsr6d3OoU3WE6txo#i$r!OKN``j!w^CtNkyn}pwL*d +z$k5$hrHWitg^}(I0ppH_ZE1vCqLPFb$H7Y+Bdljh1(h`pMgD-ajvPEWlSLKrIt+yl +zB{AL5vP`;PA_3;8EGdCjmdcRK`%^5%#;$6J=xAg(E&Ab)1~vPz`N7{i4!wXvssVrJ +zM+`W=t`M=KtS{(!@q8am3_ko(>(Rq%$LKFZHaGcrD^hqBvJ61>2d?R975yz(tg-f& +zYRu=)@_g2uviP5|fdwu2sXe28tk_^yw1*;2*@^s>Qs{}FikXj86#7%oSf9JrQHaDU +zh}lSrBl7G-P!>WD<7(W%Wi<|q=WZ!#5nbV}i8=jBGBtF&>-(wP0w#jbap5;su!{es +z)1w%jROx@HoS66htaWsS9e?zhMa=XC>N|K`7Muqm+}+J#Mx}FAeLd{{j~VPo@YPxU +zmB$XuXllP0ZU4-I!XW`Zwb?=th^z9kki~6atH4+8o2fDWiwEGK5VH5}X7dRn40VW2 +zLQF)e%|PiQd|ZuYZ6CKXUHFq6Q~=?Hrv>AE!jLV+&XG_Xa6pt4b9CZy)7O7;aLoqx +zuScQ&+;bkJAr=;>4ZoVdU{E}Ly>NxcDoY*bNV*_V&GFNhax>UdPi$)&3(bNr}LQ|Wk;tH0N%B*It{V(Q+KkOGj +z{A&cyK3GJ!$>y*K3!cDWGv^#)0W`dR;*b%;CJe)etYCfi#F6=Om*F}{oIpjqj|NuB +zAe8vhBNi=CuRA-ixw&DgeyD=9Z9zOPi1<7s;!z>}iCkblEtn6JG>8}e(qq~lPnZ#Z +zR;T>FQTWtjsdqR9(uJfLzK>nfOp1LH!1!fNaWf2jRT-PB4H2>k-Fu#ULs5+(Lrxdb +zNT+;km1ptUr=anc8(&t$Y2zcz5E3oT4m@Omve$xUvIVu^yUu%Ao6N|90U%s#V*K?@ +zk0U@qjwv8=?5!7x9B%~rJEKhZ@2t)3oK^UH8KW8*J&eH2sii=QY7d5N!Dp4wv3fQ@ +z=ohJ;uFAshr+y2idB#Xpz6zTRC@|L-kqN_LI|hHjwS)+$-)6B@s8K(5S>c$+1N8sp +z8=&#k1XXRMnk8rFPoHg5iKdzFydQNMEahK#SCFtNV* +zx2OY4h3FR;8C$==d6UsE{KW!;i$MzxF7W&h^vcj8(i?He15+Jjhd`ile)>uDF8SI`Qd7;Xo+64fHkwEeN}yl0azCgKqq_?<(vq$!ef2 +z!lnIG*HjvJ9wB|&(e7x>$V9v*SC%NzTXO8);?=xb;P?#^?-|46nEH%S!}{8>E%1vEL?inoPWu2s&B?B`B_u{%c4$&DE^<8NGp~} +z@^yKWKak|xqE4z*XD2OBvePKg9}b+IRHaUbppT~oA@Q6k{@EzLq9_FPr+l*opK^m! +z1+(E#kw`bwFSkb>L(?tzTv9g*#Re5<5WU}WH_gq+&*W~=l$Ss%Hf_VJQzhxj3;nm +ziKwY6<2Aj4b@|4B;mGBYkkn6}1PzIFJKhc(%eNPmXHfq+CIwldAYW+(udf|rzROEG +zJuy@M0f!K^2E4r|f5jXDS|nJDpEoRkx54ITDve+w-#?PDcn=9`T?77Ase+kX)qiD^ +z6@~v^flr_^Lbf1%a^p=oQsD54OF?69A&2G{sKXi>jrAc_(3F_bxF{ojoTt8E3Y_ma +zv&qn?ua0V?V_j-g-+pwMvWeC8znn)-eDvY&FQmL!G#zu2#H?cmvFu4PLyh_W2Se?f +ziT2@-n(wG*r@EsT +z42Bf~9!_NJBn##d*%~@a$Yp?aA|c_+oMY-{WpIX?6=u5XMN@-|=p8d0lm+%7s(r%) +z{0zlV%6^RSQksv4z^^+&`40`8bh24U`=Xnokz4+S+~jM4o@i+gxR1El=RU|X+1{XJ +zV#J!43>$2AoYFH&ryeDG+FVJPtC&RP+s +ziZ7JjxJocLqZ09WWuMyk89`jNXDS(ZmC_F%(|1m^YhaW=6M_eav83a|8aqS4`48tk +z(vgW*Of_aIr|?HK4{1r*sk+REKiL^L)uI?WhQVPBF6X`p$DgdLzU!)6;T^OYu1)mI +z{u`CpW2(E5j#sJGE&NMe5v9|;JAo+CFFCvlQFC=m)y;TyFG`no95`_xR865Dx!4no +z{7r3o7QSoiJ&(NQRa4#RG3Th4`V3kuoz&wslW-{#7WFCd5;BtTn8FqWXQL(Mbd$n? +z3qJi6xWo&E1=wrg7q4ulAi*jzihU?m{jXclP@s;PFAP!mx+&&{n9~(!xw*1Id~94! +z*yQk`n?z<2Mf4SR-;l{;5ULpyYi}vni*qM +zuT>(56K|RlUd1P~X#u~3vu;stj-E=?&N%qIRzlqZC!rV4#lXT1kS`8i$gXyc_%s2y +zDV{0EyCF5g+gpX~iUNn2nRJq!nRHXSN!V`S-%Y_A3Y;UgQ3-5Up+7F3E%>OPATAWd +ztp$!g62s2wL^>bqoXVW2XPzEG+MN}C#4{7;y>7hNtQQnrK(#3RnEs(Gg&*TQm3w&# +z+YCmaGXJU_N%K`=?{}(T{ogS~ti&e2s&aKH31J8GUaQmd`3Q})+1dYx +zy?24K^SaK%{+T-*4kbu}EJ#8r+5$;PrYr#SzyN|`+5(6HiN^rA^8i6FGwX72@0|xR +zkIQ@S0H6v>FbPUj!qiNK6|o7Up<~#l8#{_ILirITsvJq~fTB#JT%FXP3mi86W^o$fsGf3egxx@pVI(C=*fDeRzc +z8u-J5r8PLyw;v}B*5VTWg9l63@5f<MsZ}BT==b8UMcXfS3I%{{YgcLnr#-D5U_dX;ay(@hc +z|KW^8bqhY`yruM;c=~-Tnc-H7(Gsp;x2%7IPfQ%>``Lq=NAV89e%w)t_iPUT&cTCo +zTR%293eT{85c{IvF842#j_ogfc=}#^pzs@mazOZV4-Sm}7x+&P;NbAi19){(hRLb~ +zb3cJ#NKR&)z*I-i*bEMja-wnh-dR6M_KBl27{}xzA&cE>-K#|6*yLa7H@a=KLjX14 +zBCL;yVJE+j+|`-)Td=z2NSJQ1lhv*-qzhMmB8qO8PDC*Xa*hDdOb1ia&^){`z`2V% +zAO2HQ|3?vKL#184aK-wIMFt;RKTfPqbj12S71X=rZ)|B$)=paeZn~1|WpBw6p{JPb +zq>+I)J720)muBnDIzExmVI|&+x;W?0PrCA>BzmqFG5W5ExaV6Y;@6X|>8(!4(uKMu +z?14ir9m318@9Mh?XM+0cayo6Jo(Q{XzoH%&Wy}m)tgA15;{D?v$4p)_N(&m_OSr0M +zmb*){`%5=WbF5i^(W?GcjEwzZ)qOWgL5z&Jt_iOWb`5C3t?JTG#8k;0w*FS5*1yzf +z*XuPed-0iXi8hO?HIazxjU0X^KS>;)(D%Z^()YhsxVnjW>bs$Jt1!Mm2zv>AbawhJ +zHuE?Yw;98}>S&8aGYG`pGaNBa8_9bf7qRV+xf?vl0x-ZZAiS7-roAuxY +z%+H$@yRE6O^nM3N>oz%$^zGiWD>8R=XGM0&gp^Z?o=ZmIUm*H;d3-^MJkWbq&d$o3 +zhI+r=Z};|nbYSzrdk>8My+el&BO3X#d{4P_UEi%V(1CtA`zxntAI1dYmrI**JX74S +z&Jqr~cwtNLLkC8Gjqn!^jBb62aq^>oW^DXJY%gx^|7!=H80NJ2JKDLPP}@KKW^Dia +zix_@TJC6jml9cHhzRP6CQg28LZnX4c<5j|t?0UGxBCxg8{ow(lWz0gou}SpnY@XXE +zu<5+1(wb3&IL#^&&2-)3yl3wY#R7&Gl%con{Mtt +zNhF-H>xi`DvQ_!Fy1E|vIQF_Xjgr=79Q!Zh4dcx-bitR1{8G~O5Z(n!albQ@$9z&g +zN`-%=tr5gwoJS(CBRt1__ +zYhq+(AGqqDTk=Mi4I(l-D#3xQT838yXJJ(rxNmcVNJMjx$^G3te4brcdOy +zpBve~0{4b@)Rv~@=r|7V-o3x{vHhD%ckN&K?Y>Xp;KHWEr49Q>``x~7mgGO~>KezI +z_?98ub#wl~{wEI6mmT=!^1*(Zi{l);|MgPWSAI>6oYVs8}|9GE*Wdeh@%e7&iIc1JoEp)?7!j=jJ_dp|Fr#X`M(bw +ztPPib98-a58JOImzBMwwy+@wkE87u2CV$>9>p1U{KkFsqdP)0`{P_t<+t7@~00|jn_Vd7h=BD*=)h-#Tyc@eC8_$N?+Dh{vUu1Ios^Ucj2o? +zD!W$L&}oluvb;w!q79RbuwmtX^dnh}pAqv&Mq)x&LQc)xs*PN^8H$(K6g_QI8Cx-ig7|#K-I)PaC`5KQqU%O!DMkX|QWO +zUMD+%4rim>B=LVY>H5Ho|F%<`$-fU*bsawICu^Le@DK+=ntzH@><4CzE#DDESWmK*8@uL*@iNcW*QE=V +zKK+e{hX!UJ8rE>Kt_|9|$_Dw5FE*Cj)!C`0i+d1_*mru(a>|gA{44z=&X*l@UvU1C +zRFO2~?^`B0Ik`7qx7lmfTR|@F5TKdOX)^TDuJ?->>uMcV8Adhmc??5bck+90DQlgS +z+FCx=gp-YU*o<1!aU6P;bp2$dgFEQk&y}skkFmu#+4BCG2WQzKzQ**|u)2>|%;fdN +zuly8#aGk@K`)B2itSS}_^+$F`f2nI4AD5l}gTgXNPwyQn$Njx$WTgAM`$`{u0B`8^ +z{nbH?wTpP0PVliP+B;|SV|f%ur!MarStsoie+Jh&y6;{9P9^FFd(iwSYQML18#ZtYmf4q}_Np+HiLSnzkW#`*@4s?r25?Pe~*=M$FDt#Ag{bxVBe-mCElB0?cNJJtB!sbVkM0YufDC^R7 +zUz8IFIHdF&kos@pvXh_RU;5Pa+fdb$pOLorm0re|LPs~3&ZAnqv9)hdPBb5QUB2{O +zx`2B<&g0q-`;~V&kIV7r-#I;9`rQ&PT*fUG|9uIU367dH)!zHsy?r-|5UkJW8-3FV +z*D}T?s_wzUdz#eMD;ntjMfoF84?5PNEZML0{@uBZlBRplp3P_fIZDZq5INk?y|QpT +z*!6e?OM8c2|JdPQ*gAE*e=wLP$jaZrj}N}?)`l_G-uiAE@*c&aGTubT%SAUH@W)~> +zwCF#4pb;mUL3Zl!LC(2--fyy`EXurYg+B+f-N`FJiVmBZZ^wRrQAh5rlQi5K`H +zQa^%$Fv`jq?f1Qjm8m9k5)kVl-eM6dij`iVp#FV=_W@qU#Yk9%*gWL_52ZPadZ739 +zprik;ewz3m*;C%&%mJtHdU1Xa2`40>B;QlPZ%=ROrf6}~wr_eu@U0#KT9M5c`5KLUdmm5|h>rBkU|(t0A@!jnk=rNN(b$#Szbf3` +zoZ&0;uCDn@+ +z66N;uVw1^rG0V&>u+eTJMstYQjt&j}Cd?GQGZPP<@~ +znFTwn4~vP`-fs%*PZxb9NB)(D)3jOQWnL+ASipm)(||Iq;UNA8r6~rpCo2N{My4=Z{e{!k%hQG`sA%W*S|c~Y^S^pZr`?T0EX$N@SejZdh+}`!x~I +z@V5SKx$IG9W39q-wgTmKu=~wF8;w#rrAj;{j7FVc6UTmVad4x*@JVy|8o9Q?BRDsfZ%hSfm4&Hl +zbE)N;B1I~*_4!74Ux~PC +z{KF-;%2?lRTk#n(G;Le|0Dg28yovnotva4I+wz3_jhnT9{ +zl$*GLBq_nSmGqNG_kX3d`5Q3gFPA=myTNdMIgZWa#0wVk`iEtO&hb0Ik9_pux^Vf2 +zyIbW#iofw$Eq(=WoA*mm#ALY0Y~2=Be>^r|BL@n?{;qB;Lsz+VxNUg=fp?rYt0m>FWgO;k7-bV)U++jPT&l3|&+fDE5U +zlRtuhw-aO^K`(tswuu;uHkB7ZwK>(Atu*Tmj8b!pGimFe=(5)1eQxhypJd|yo^%c9 +zxQUKtqh~s3ULw|CcSi4vuR%B>|4P5r)%6GIU@R{aY4U%UOTL@Q*xB#Tpg+uXj6$ee +zR;h%Cfq@}iMl!n*VPyX0pE4N%IEb~A$@fzmkMtOCuXQ^O&4bhKN(x +zUSXcxAtQO@r0*JQxA?$p#wKQ98Y!|H=s%lk@*Za5`Ygy%a!K$Evz~@F2M7BPNQ0@alg=-<=1$a8$@){&Ub4@z9&7=+f8^i-a|X?z|Djg8y;G$UYo|47 +zj2_7L71I19yc*thfo#z&HPYHHt@q6z=rwub4ytX)5|5k}PmTG%E`5e9gEjqE`bS;P +z`hHr+>8NAtY<+gx%!{bOx;}xbq~~=0Kf-9{%GA}iC^uefjls%cir_JGK%BzMr0`F% +zWLEsgYBuy)HGd>XOx?uPKMsl#Wu7Q!ODHIUMxPeme*x0$PJUYc7CUe3Xd@3b1!{kk +z6>I^0=USk4R{tz>(WxvG&RKK+kutD3#z1j^bz9qBX%|QoXYkbLNvoin{!6TO_&O68 +zW>=EoJNYOxV0&7mAG-{xKu^FhGJZc)p4CHsp8`j_0R!5 +z#|oZDlyyDSfWYV?)BcAvZR0zv0gxNyv+z|iZj2aDoQq2t(l +ze_&t#$>_th;dfe&X$9dQupfhFZcvM|@Gh7$4QhE(Fzpig#D +zY^oxkfinRCGA4ygnL1&%d10o$SZ_|vZ*JCSTAP;^ +z=kG_F>^oH3o2TaIW)|@{Ki6*0*EiP}YjacbJaugDXXYE*hc|4V*|7O=Yr|%&G5t*S +zlb_tMd3w58uVW?&%tho)PcJW4CD`5Es_QRsr{&T+|D2q_#0&_Se&TS|OfoZ9tyQY? +z&C1+Nb7{HJbP3J+RIM`CngR{ryEME@Rl&t#i&Mwuk<^++Sh)eygKTC49A~j{Xk@85 +z*SKU0GaS$dJ!6NNh)o>q*c_KN{3;4i{j$$f*sr +zVo|<~{Pg_NRIX7uAvgkykW8*kEs8~Janh?!&omR)${mG9dMPe1wxIEPZG)U&$uza) +z+9luEskkb)4!LY=K~@%~tc>uD0dfvYtDKmc&(bHqPK}-ouTQH6Zr@pea-w9xh-=jL +zVYbRumkQP8H`>h{LPlt6O5VCMt=!>wH2%qCR&{1Qxg-&EZD|>H>59*YrDi2$t%+!< +zF;{C2C0bvr+N>bPcMo&bDkk7{Bv@{mkikGDkUA#IC|0z=6I;a;Pi)0>S#Q*J3}xC^ +zZO^O9fr457+;pXe4rgsZnlwUGicVUATI$W_a-*$#ok9Z$=;6!Y5OH!#R!pboX7K2^ +z-@V+F*QWNU$^|utQ^9GZspa{0E14O{koKKTyaAbODjz1yfrMsJ75Vz6J9X76Q&ZcA +z8`I4J$YU_4iN?Z`^9$g`$w_bGbmk#xbFDT6Ft<3TJr5~OOF9OpS(&QUnk{UBEge$@ +zBU?2b6AH^MOf`=~Dv-}qYrbA@h|OXyJcEkrW|l@Kl<{0GwE@>m-y$y#ZP7pio~r7l +z%wiD`G#YbFu?Up_>cDfQH8Yp0C?kH=qX{I^c$YNT$|y-M<4f4eR62oXJj=Lc5tgL- +ztW;!ps8mEZ&59IG7Ni4IW@V*ddQsQ=vI@!@h^sp_fyRP#7}K;;bB5`x*>zsyi+u|S +zHFIdjk=sL3lO7Uh-4N%SYqHrTM42(2R6{Co-&$Z%I2jW-Id#0Ao+nN)v@A?D^4%y< +zQ%0iB5ex3+}zoKRW**@&_qRx@|^Gg`k^-s=6 +zqwkARG%NEkXes8jEY`}dW;IFEt!8Qt?oyRz7@oJ9=gkwLvgQyQpyN0O*#heWYD}bU +zE_=XXTB>n1kU%KHHXKiC2cBmo>+Dgis-r(;h*|ZrrtLLNl9@J}Fe9v{!&SBc93lp= +zkJ_$)aeZ5%sl(@7^FBr-m8t1z>7Dm;TxHdH#cGqN*G!OQ;?Zn+S|5dZ;WxGC&J`Fn +zGT9cn;WRILr=+y3uFEgn?|foosg*I^`qG^FY(>fsHkI}gj0~R@ba~Yd;}U#kc4DB& +zkn4%9*!8@6Ne!~IDEaz*X>67(E}fjO*JcnU()B0M$zn5g26I!^5*-{xKZuRnDf1Xl +z@uGI7JU2HgU{=Q@SD#OI_6Qm1SR!&$R(-w{Q}MTP6t>=OH8sDV`HV#QEY+kk$)?h| +zsn6FsSYzeb{n##on|4(@j*!Ou2uCTATou!E_xT_rY(_o^3G=12IrT8pW)+DOg9J1Y +zwsHf*LZdckP0BIZ02UPFA^~%2UbyIX0}1{NCRJST=eVh~7MGS9mD-5~_^TJ +zrsfe`NzaUwS*X?Lr|wUdVVp^OsXaB1P+-12l`Lq&+yWw#rA7-;QJb)DfR?OidVdB+ +zW2*DVD+`F`6sXOeNOXQF)-08|A|_9nct$dC!|#mQwZv68?q7xP!^HAFi+%CfsJ1cI +z4@CKiR477j$ctJM#4gVx4wWaN4mm9&isNHG6Bgm7t-c;X?3X`TiWwSCUP?~tN(ms+ +z5d%23w1nUX)(Dq@xKAeZ-r68_vFTY%o@GWW>-)}I)Q-)-wjjuMMUE#_#PN%nEVxk0 +zExJ0V(`sl4q~5mGXt^1L6cQS)@Z$86sB{`J*r{CQ61{s*CZv}e$;94W<9jOQU3cuM +zO#WPXPi16eJXvaGc~lmamXcS~)aq+fbJGc{7M9sC@GVWj96?@94yxF9=+0fE`$lX) +z$Wc-C$vapT*+ilM7D1(g6^)eSv8iQzateO7$o|1ycX^gDs6)OGg^LQLBG6A@Zn6^M +zTO@*8YR%T>W#mEATMG!PO+{#xG(V{3$gc6pk=yP_5cB&OKb5S+E;5TkWK^F|)eKIs +zULf=_*K5{WnxoBEKUqJvjPFQb49?W=r3?3z%YcZrd2EZl5euq#Q?c$v&^jr$m@8?; +zgm3BjGYvw*#G=mZRBM)z)LO?{_rvyVCR4ECiWroxsgTt=oD9}~K-f!JSTJKijn$>4 +z<8yU19@@FTrM17o7?#;lt@;jDS!f-XPL`RcQf;V&+|bLSaY=i|^-SiOHZnbOgg&WYxy~xDW_& +z!Q2AY58X%t5SzGWl+W`Hp-$>?{GM +z&2?~x5J&|!i`j=xfR&7v5Z|C(+Hu5s@=Z$xoT;!<89!Xvb7%xoDG19YDtQx4R#RKE +zjaMYUeo8NYo*kcG%;dm +z12j!7L9rEb?Jplbx@Y|G?Y9>gxkDIXvmA}a()^SxM<+r8R)N1T3;cy$;4cgVf48Y9 +z1GiyjOrKGK*TE?nJ)*<$j@t{5^N=*?nYkPvy{_JNJx- +ztT?;{gsZabCc^$cH7QpdqP2M>?`T&A`HGa@XY +zO@Nbe*y8mT<-Fp%xuibI}#Jq)MUIOBtW#)tRz?02N4fk#>R%9yPn$>ts +z5`8HIZJCIxQFBF>PA*nXPS2%n!muY7csUbC)N57hu>dt7mjHA2T!_z<(USI^K~pvs +z5o%OsPsW&^74`z&J>{T%U~73H8?`!aY1t`HQnIx)-L{4l+3#T1a$K(=?>gr=$TDdR +zIL%9tT2a!7yz^yDjN+K`M(a3%rm`h84w8MVWA`Vfv^=?-l1<@^qhrOA`6lM^!M%H20YKg`293vF-#8lh`*%_05;Z%c5w|fh@Nc>dEyakoW +zTx=T6mkpsxWA=U=OF|6zoQT=%H1g`Ic`iyhznb&l6sA4!=cT=@$-I(m!B1>A+!qlQ1UNA;n +zBSctIw_6iQo1&k}%9y0ss?^S=JF31Y$RN-_^TbjsMM)`9?2e@DrGjv) +z8BShGu#FuONUl~t<+ydAtb9W5nD*aGDMrY93kJquGFSw1I@ZZ+86D(yY>%h +zpO{h$mLUYNVj%LD(WBPJd;>iR>jzkys^d6>yg-A^RxCm4?@%J^3eqX1B;rF?j*)?8 +zQg(`wF)iKs#)3XdVNa@6!QT3v<yDjGq`)xoF(jKLQyESk;1m^6vsxq7&GIWO~>q82O@Ld5F +zt+xoxR6V%HDB~Ivj2NM^{oZzD0un$ZSw48AvU_wK^Kh(*-Bua8W8dz|-lLVH2PY1= +zAW^q7MdT1H_E9h)p7({u#`la>cJJP|ZD7C`8XcHh0>- +zx?DLX-n+J#MA1f-a(U1AzP;s2`RMq_(L-1hNEYGuQM)sdsewd$zOJ|k_eT#LDOV^r>c +z2>$ryqGHLsbNAtqJ-ahCvBd7Xc29^gf(XJ4S^w1)ednHXmQ;0ey7MrpK=j&r2tZca +z6vmOW1zq4)dxQK3D1T=V*rAw~!y{NTlTL#9$Q)L>6DLyVy?kTPw}xCt8};4g7~V#y +zVF45I1~v{VRa36CCfmDq-+o7B!n$RlrApq6N6bE33yPR9CwG@e1~U!SsWK)qU@a2}k*x(VDBHN#spV7Nm +z)yRj8ix*`ooT*-#eLTr_Ep4pL=4vhh%RWM%YrELJOVDJ)&VNj%nYy7YY$<$(-rgCv50(X2la@u5EtR-pCq +zJ(Iox;tfDykQ8792n0;-^5E$08Oai>Ve&MOZ`aMKh%-Zw8#v^|L1u_`680ersz=o0 +zBO4jwPWs_Y8bg6Xu{K6JWiaN+5pY9tb-|%v$}78Bl^VmW!xOtJBl{+_xsY}XOL3Xq +z3uRwAGpj_Gvr+Hl6fSJ5ElEi2HpoPPL&FEDA5@6+hU^ViTIed=!w@u)Cn?(aF@DD` +zrexf(MU4y?Q-hhWtMfNCc=ri^F`)iJYEj>l6_zBbF4UrNehM$Ws$i#PFgG~mhHDKm +ze0#xNtva1mmJCD1j*||Fx8+7rL@{iXHB+ir3L|?E-%X4jK3X}5K*JHt1eL|{c;BJ& +z5!mGDu7hP~nIjcQELk{-gW$5~As%DCp)my9Wo2t+SV@ktH@X;FhDMc)gi%8o*0TK) +z!9UGgs=&S%CSZC1Q$i6f@5Vh0wb^k`2H``8%UH;luo|Nx^jJvSDrxAnGSLE6owj;@ +zvKCQ;LsS>3y*#@sSTT=WVy{|Evd?Zq-c%=-}}`&8(~ +z=`03HWrvzNCOt~^V2e`fy)n+sOLGq$9zVEiG}X0)I-^togd(#_L<}=Y-H!!ktdNgP +zJVp@0=f108ZzGt9LCVP;gRRII_ApgDHjH@_1m^8t=3r?UtOL1>XJr@iW~7xjXm?Ns +z6X3=Ad@IL<&IPR#x*0^~!8t~;c!}mM!v$8DwHz9`?dK}^|Iyp`!4&E4Y=-8>PVEnF +z-Z*hI+a?JrMX)EAWK|52O}>eYDV>pItw+L>g9DY@j~s&6!^WG)6%#Eo2N825hh9%G +z1QX>na5Nn*2ZwB|AyP~P88rk2#r_0(M0R|0oAa`XrP_5H>^>59jq}Ff4l4;u>156vdX^8GYKF_)QUf|>3%41& +zu^i!~4nrb4orMrUw}B<>K7zS9j8kG4_sewGMRM~k@S>iF>mN9TB+Q1qWkNgCs6@%( +zbP3@ch6W3zX4D94sDGr)TVQ}fts7VP|j +z0I(%7BjLQuqHzdTxN;9SwBQ65SNh0f2m2!UKBuzrhKH^+Xb`FG`lT%n?myLPh +zNHjpUQgO3nZibCEfTxp9T^-OSrV}0%tsy#cD?vIq;jM#WlWmGYqjKX3c#uYCC%Su& +z20d@Y2LI?m5TA3~%sh>FS)UbL!XzVqz|CZmJT=O~N21?3_4Djtp`(2~B5S8L?)~ +z6ne=?TUL#nh@pdYrbQfy1_jO-y(!5oAepUI8-At|qPaOG?cT*TLN7NJleS@Kx3DEM +zt&$AL#lqYQj_Y!L&}K(i;#7C5vur5jAuXOaJgxn=1VjvVXC +zreiN_ZnAPQJ2#DODUH;d*#AJ+b*3jx^DEieX_q-L>8d6*^97iKE1eoNpe;cH7m75< +z)j<+;(SfW(2J;qeVs@sA+Js|Wnitik3wF1;1-mp??4QCn>193moU?jue`dPshI8FP +zlaRbFdu{_B8uXByhIYAIi<6T92F}v+5Jo5$nCT2eR|F9K6Oeci%xiES@_s$vqKGnC^Al1aqQ}Dn;mDvyda{q|1?IwqLLYTbQbwdy +z?4q*Ugg5Jre!(s?WfjgrDmPUD5r*ow!OusRd@LxirDzStb3+57Y&mc+Grx39PAjCx +zU8r`)jO)&$ZphQI+Rs>xGd13f@xgl`(8aDI7Vt#Ykfk2oCEe_J1zd*ua!NDf(a~gX +z`RJ-*cA5!_a*#&}?%qdF2zI#OgZ*r0tq6i}WXmgty9Qnm+8{sW1qEj~AZhbBXO6Bb +z%HcGe@|D*XT({0Ea#R%AaY~i$@ua?A_XnU$Sz&iCswdM^Cy#NFwdlHS&WMrL8z_2z +ze&*#ICGE*AFCt_)G~#98mmEcJZW+xjuxC7ODpYVMV$N@74Y(kXd#>DYrGh2QVSs3U +zGIy51sivQ=rNN2lk-q7ZSZQ{bEYT2JOUqawb{rf%=nTTFPK{%H0;lktQ#*Map#a?X +zuRfgd_+~m!*T$&_;&?oqleTN5ife|TYb*?h3iJz1cY%|N?c?qwhNUQvk917FZmpae;TaXpTfhtLc4|XkkF<4c*^+e}a6?-!FG2XCoB2}B#E2}bYs*j((c~zl +zV?%nnQ!v+f_ehJhRwbr94a(ZKvV9PW8kvj}tejZF3o|&i;1;qKUk-YDY+*=NmN~+B)w^ +zT>saTy{%$9crG6222bF)0)iMPJ0(0ol`BWKwmX_@vRmM`=4jp1Xu&G>No-L7HY~(# +zL094O?tOc5b%-9-3))J(YEfmYn~QTZ?gS?65;pD3(x@vvnQD1@W@%|-Euq-{$$ba0 +zeL&mN-Xd}Ba>3rcDa-O+t|z$NPZiwWeOP7ps^rduCd@4@ET7VdStx6uh_j&K|IUBw@ehIs>zg;rLQvN)vR; +z76vIFGN~*t>Pnf`gI$NiM<#VS7jtaEN56rhjYDV2=}S-u23&V_$ECr1b}iVLm+mr{ +z?Ji(IIdM}SEt;39jbs@c_kpq+i4#QDOq_t}SmdQI9RMiuOm#+Eq(E1qM`$1o9J+DR +z#(4^wgh)jXfLCw=T>7IfK4eQ;@K|q>jM6}uP#N8KXpdV}I=bt?9&7+ZAWmHJwo@8y +zr9lg8ResfB*qd$A1LPQzup>4LC3zO5De4Uio!)8L32}Z_i(>55WnSULGF+Gpc5yh` +zlT=&4DzGyfI*+tBN&dlI`>@&NyoD0a_>zq4!XP1MZKTFGbQcI9Fp-9@0H6y8wI#e5 +zj0ZK)+QKnJ=eqYO2Z$Dz+(h;2WD(5u<3G?ux2rZW51v2X!aGY4E=gh5hFu9=STW+D +z-CRJga%u9mCmd!Xf5h2Jkd-@K!SFg7IFfhtZg(O>CR2LmL>ncZSea4kW>-mTrfIiT +z)Zi!F{)Tx7&B}65DY)iwYKga0@ye>anB}UKsfBK?NlV(*RuvZ(R8cbyZQ}fL3y0kn +z6YSB{n!^=2kT+GkH(6*74(W7PUixf{&}>k~%WiY+K^zmr&yf4s>VAgZ&of*xerxU9fo91|N7pzp|Y@F+tHqlIAV_PeO +zTeoh#BL(-S;C>uD#U2a%puB*Kwln<6YBu65xs=BzGo$)bl!aH}>Lp}u=T7IPpp7}THv +z>|V92QwuooQa^=tF|j*!f(c&Sv)6^y=GwS2_c-1qG>w=HrK6v0QazR@0`#qGp8&U* +zaLZvivoU?aOG@IJkc@CdzFTo`3%=g$&J(t))!M>Iw?Hqi=HdW=9-encdLTuiA;F^^ +zmPBh+zc_~qJE}ELU}j#y&X^jY9s_~|%wUui_nn8KV^4tu!2Uohc1$-@eD}2jJ}~c!yKDlatio +zg{%T_*3^_Ge5dE6-GCiSOU2wX#sKAsbaZDChoiV$A@=Q7ParsCVx}X9Jb~dD+p!(r +zH}K$r6dX;#gPmKF?JF33HkrqMk$1zrT$*Q~AC!^(D+cT1v-dn?= +z8nm|EoR&F??zyBkjjy$#`%G71=2%7a@1x_LarB)GAs8m#;X^+=)xv!X!ZmK+I5wB+ +z(!^*slWDP@pj85DSPjiG$wKhzVc-khCM-_rx_o(2+j@m|DX9|g3Hu&r1??sy+6+1` +z4j?$(Q|ckWr(2S(-lG%`UGYxlLp;ks=g957$Np#&HP +ze!K}`&gSg6eX0RvpaE&4T+otjh`Me^*ZCg^TRVyLcO%3O0kgEC?HV@W1WhekgZyIDdas>#h>(*==lW%)*|q +z+ik*8f1)i(Z9#4BEk)(ZcUPcAjm->AfdoaELh7q-^3pMEvUW?WhU?lL03k?jx)#KA}V +zlR3kl;7vQ>HA8K>iGwU+gzO>CX4~+SS$nWxK&{&}W@ZYbRfVf;WDe*@j*RCJNid!?|K@e +zO@tziV?ewQ0+$%s2~Bq2F|>f$HZGt_MP;Qb-td5M5@v^uCUXIq9({5iR56njX3Yhd +z=g342vVtg~kDNG7#9rsfFCA3DZM175T7((6#6>vdOAq4yu*cxc!rATifdK}102$x` +ztEPQjNe&@sv_Vur8$<;>=nPpvEaemeCA5*Pabt*9TEp!| +zGB`;GotOGx1LAmGTs@o0ZCJuz5J;wvN%ZUG3777}rs|ZMf(GGJr!?+$A(nIEdcg}e +zJ7l16?h70KiP$w1BwpL%OSJI4f)Qelnkxqa7>QEdHS +zFB^Oh5^&Q2vFwaxrQut)ea^haEul#^U-lQfRETbn^1gH0on*#^g>#90C1`VDyc`0vDU~)`q9hlC%IVkyJcCD> +z>FM$~z5P{Zz`}FC%>WUJiF^k1@1Xu2(!X1E)(SqXzbMOMwdhWepgRn*gtxZj^sZf3 +zHeWwc#}!+8MLdZy9sk_1!iO5P)=)jVk1;c(mz2G6+oXXq +z5l2@EUX$Xow+g{&uYngOos&Qz8=Il#hDJv?@FYQ!v|Ofog`wL<4(-i;%3+=?pV-Dr +zEm=aD84;X_4w}%pOBIi&M26g}k)E=8#VQnj644pZ(;!048qA4#!nnb);$oUoX=77E +zn$tLD4Z`dGBAQAQ4prViL*+OtBi8`*>sVmaAECv3{mz;VDzAioy7; +z=v{Q~Mk1|5#3zk$w*%RQk=O^5wF#?U!!~~ns(&L9IGCol(kq_eh+Bxyr1nllL~Ci@ +z!puS&Mr^?!(&0uH;G$)LL7#+kr3#Ut56{7EWbba$hH(hLT5;{C`TK}GxqNcUoYpN~ +z)3u0_(F;}bWh6$+XD`TQX{s8X(8!e>5U~gb{z`W2O9%hU2^pKLknD<2t>xOk+{ +zY$&;T0ykyr>%h_|_xfk*I8MkFAmh0I;!d0--7|r6Nb>e(1!LO6!qQ@Y#x=kwQ~Q8& +zAu@d<+}`AMcAk9@&7ta6u>!~u6;{;Cz%yX=$a#tE?N-`(omWdgnc(pHJ-#?SaFu!I +z*Ro8h7$E?f5RHm +zMB%(v*7=MRW)(x(B4Q-Kj@{0sn-;Fr5PC_7)Y~QYJUDIE%vSSp%Q*vCl_$Qq1;^4Qd;gkWH+EAOm~g}(KrTu#o}F`;^7MI +zUDW1czN|FJqt^n&Eyo`8lOj30YoN&TVp=hc4^sqiDtE=$O(s~O)`=}bYPT4E94lJ# +z(wEbS&8K8kpI>n9;JOb{^l#MNHNx8PUOCm%s78&HLq@ZM50{>ASxXOhNTJins +z%F3dix=T5fas`Pd*n*$JwIdD*uZrrB?rl_QMv9ptL{nz1sXolSJ(I3sN=d?6Oc?_% +zKu)6mjN-k@<=hlrs@ID;@!H=ZgwUrzq7A!;Hz_cT9;)@I&a__0$=W8aA?E@S980&- +znw?bAVk+X4hbRs!6P2MiTdaq1n1+z$&s(eO)+Se8FzLM3EN+REskn50g1h(nZ1lSN*ZVG$>0tEffaMADT4Go$QqtEG4qj6UQqAk!rH4!P#cL|gEMA`6MT +zGS#b6T?a9(V8oDKBG-?~-XcsvWNfbs0fMPG#V8rclkqxzSWIwiO7x8%2v*+W$~7j3 +zO+K~wbRCC&P^&|iD}Xea3_1J5mV$UJpXj6|RpRvwT-U5a8$62kPF}x+6|H*R-87^O +zL)Lkn>9|MHaAK|jqI7T`8o))R8QaKuN!UFj$;J{+zDSspvp{9Q3&|}=<@wdxd{YkK(95xRI$0zUSF +z7~q-Ob68h(gQ@zLe)k5b{pgsFCePxAV0=6jYvr@`Ir-WIzC(b$V43W>6e9zIa!Wm5 +zVo^WqDgfI3$x@>&d*Iq0g~i=CD|3%>M{GJ>Y1H~%3H!158*CUM@PweD)o{;L4g96$ +zx9(r8&Ni18m*f=+c}+uB*TgdP_U5dI*_tQOiGVEMux>e2;Hy^BFa^Zj2^K5Sna~ok +z7OBj6Y!;N(TWu$>7>fg*DZ|Z^!~(m8axP|L%VZ9eE-P@BCYSq9>D^*ik)pW=oyB2> +zmr8|>+NH3j%p`DHVhWjMI*iP`k;rX#s~I|zLoq)k!E`P`7j`pM<5^xJbU1Qju!EGW +zACugZ6B<4)1^1qpV|F5I3<<|>ERiXv&L5p8%T}OM8Y^Iq&d+}nIc*D +ze>Dr%+ZnA~DjON?gC^il~t#j7%e0jzI&=lp9wRXUVWQ +zoYHa^{Hm)Gnz%+Em#VRD39aM=vR=K4I$XS->8QKF*?;gz6+NuH{>uLS&@bH +zWKkq^uM(QApBkFNV2>*{WmNsNCMsE(hhU)^M|G?b&dy*{AS!EXZ~+NM8C9|tJAT42 +z<<@E}PavnE8TaYm>huBR%iKfkb6TOnZR6ou-#S3Kd);DeB5x3Ympd6V{t3b*WT(Jtl&3kD$zN +z;b{@5A%KDh2Q95g<0iNH;w$o*>LN7!kUaTvqC1laBXYqp2&4N8XBwvo7AnL2$+B+& +zbe+O3)=#pWLkInkC}fXMbilIbal5oO@b+xEe{qC&VdnNgDT +zJ!nrouvCF)53VaO(EOSx4vc_2b^=^Oz&5vM+@+$(N8_YvWR5ext(i;4ZAS-1)cf&H +zZgQv|F?DG@*&YJ1E1KidBdpYZ9pmc +z#;9d%|Jc<&IGW7jqrCF3VZU8Tncyi)>PZ@BKD)xF(?0d}uJQ^$p~_#9oA>0#2xbe8 +zyGdYBcZ~s+EbzC;%KMb!(8e|2!@uhr$xSz(>GJg1=Jx`r +zfWj=+`|do-3ezc|_d0$uR07$(KaT=IDl_D~(=T*W%o5#vCTMyO=!d!~mhDQ$ib+y1 +z)J+k~bW==@(Ceg|V$q0hx`S2)x(QK=x+&HZ(M=I0s++K;VzCao`GuerKMJ}j1+5Bn +z6QaCbx(RDqrEX3Kt@u&UO;6COKsO=E+ohYZrd8_ZKMh*(qoA8>f>s5(2~plI-Gnu* +zQa7ItTJfWxo8F*Rfo?*Sw@Wu+O{>(+{Xr{!6m)ZK(5gT;AgH6?iXVb* +zhQh#DgR)3^u^AGS4SggN$KHIVFKEI#i5TAyOXIE_RzOJOt`x<^#9@6!COgDkvjP1d +zf~RMUCcky!4d=YYx+2kp44t9xEf)Nttk{JU%0Rp!$`4Px +z;k30VrN7+b4d;Y`cteyQo_NEV=YL${4X1U1cte!8K)iI*&-oFhOz?%w&=yV}S@3yZ +zaExGDFyDt#-=B+<1+q@X(Wqd7W3M9F4--M6?* +z@IppZ;oOe}U-SjX2&M&NqAC^?QDN%F!Y`%t2$G&kFEYz3QWWW>Gb@$edQYFN3oLQ{ +z3bR;m(GresykDid7O?KbowO@i<9No9iTEGaI{ko;Ikz8aDri;)kb)7Ok^(lq(- +zk#x-n`AFJ^%}2JRlQb_`Wqqj-idIGvA5KvSZn&zP!h&P5f}sS81+7iR!kyYgu0EbJ +zOmNdx84e4M#R`TD7YiE0#loE!E=oM&AmWx77W@H*mbbPK{{IZ;m18E6PfU^@8Ixeo +z8b~`G!JWR-HO_>AIt%Xb1;+`d1z+zP4@P0;p7I6D1RwE9Rf5m^q%y%vC5{DEf~6jp +zbX`(P{$`IVi%C6}6*ug2M(Z*Ay*6nhaQ##mJG^XsT=4u%7Hy(!G#>T*1t^bL)_IRI +zLGWoy>PC=4_?Z-q;QyFGD>6`|eofMP^?Rk2Vhw$$q4#FVDb`~Jigl$0iZvDqbR`qT +z!qT4NKkDQa(@l3WutGSwhT5(57`QG?DpERS6i(Z3B=$LHSzq-i!35xO%X-42j1hds +zlDd;dvF?P$u0ok)u7dKU)o>M*rwxV7pp^t!D#jm+5hpS}70EJ+x-RMzj1X(K9JQiaO-)F5P-S)MX37)Ye=QH@UwwIP!CU}n}#huF<%iZe> +z)(B4cr1GSJclo4X!tk{5^NeS8g5XP*)QxDI@cWEXRv<;=ea*^U^dy52gpE7z87mWf +z+LBzm`SepFIm=Qj}jPc5#<{2{iz#QSb}^+>StDuvG`7u9K6xBX@!YvJ^y0_*`yqP +zvHe6|mzIAc6bWy@IZNEox#UL6A}800uD&aWj#rp8>`Mm{+i6)Nt49%`4&AuI611d< +zP?`03N}S-6mgMY@Piy*oPbRp|lH!KiXSu{K7%G$BXJ~I^s9!U#UhoVDR``l#y}Ei7 +z(dG6VS6Jd==aS62w0e|Y5Wnub*RQb1mCi+(m3S!!tt+A^^(%kR$T{VIhV*2U1+! +z(pm&-RkVZZ!cz5OQt>%roOhebYpLo9&Rdea{xH45r-o0BEu)g$J)Ybc!EC`$wZ($s +zJ@CE>3(uzX2$G)8eIu`?6e-Fob>Se(^`1W49IR4bzrrlmTU@1PIt3Kjt7aBij=ug7 +zPV$I;$~V4D@T}K@=%%P=7Hs>1V+7NJu?|)&Xj)+5(x~k{=7nS3~k+G4i1_U$n|e)8xZP(lu%Fk+cn)k8DXNX})BY +zy_yQ4D9z$?q-P==KXWELD<#R7!!tf{sfN|8G7c#g6bVGmdaDE?>BZvfw0Q0e_`~5D +zDe;`St^2q2r1%H&N6y`8_Ifnn{*$hkm06j7?jCS%##d^O#L6{=f*e|p~aAU^SBi@Pzz0Q{$Bgm3*TQ3$g +z7hEjdsktmpHm$jQOzV#6y(p`dj@zQD1V5AWO!ZTP$eJEf((7 +zToxyr)?7ZOb;p{^+d@1@&tAV$CRDte13%3U@{Ds{9tqt+u|Wtevc6we=Ott+qZk;_InC2wu3F +zK8oeEzGBIUJYO`TL`C}uUbVhrxz*N3qRBh_B00f%pHw5*wj^h(MOz4IjgeNiU>IAn +z;AJo5ae~=`VP9jxOTOR)!EC{aAiBE28ZvCZ@5jD%--eIK)=Y9ez#Sjy+pzJ*pcv8j +zdeM~cHgGmg>LeGo32G-u`Isv)8b9f2jT2C*pEO4BSxYJ4ikq$q)d +zC{p<`#~0Z8-t}h_+_3e0xKcn(Zt`YTCOGSp>ICO4>6+xMtnl%%ZOQRYHDbAwo?eyU +zQJ*wM@GeV&&pN%r2UY|v7NuKkfJEdE_N){eaZU1&Bo`afgNBrXcG%1n_{G`=j62dn +zzb8l@zc1O``Zm*(W@FW;$fGnHcfVQXRA1*+qkG5jMsUNs7(vts-t3dg1aI+4HG&`aNo9h2eNv5J*^;hFJ}>h@KHhD~@s2@uFL-vx +z2)<@XZnWXksIRzAFk3@7+OUQveGTITpY}nY)!y3jpKD=*?ioMMO)3>HO{wHPei;W8a6BHIZ?J|g4T +zn?6qSn6>-77fqSqbC%STG$TiKW-WIB2w4tu;Lyg-I}5hEL)Nj1fM2T +zM1r$EX`EmqSC&stq=-d1l8>DpWsD$ecAl6|DXl;v?=h?@iVu$v3|na8Ep{0jJ6c +zQVn2=AgRR_9@6T_7VCI#a#m&|+6NKx|Kgv&XN6g;Q_k=dP?$w_eoU5j3phnN(g2<` +z!N3{`{(YY`M(`<1iZ_(GSA4-T!L@6h(Yu0tT5qYSl;ABn#3Hw>;YDA=7{Qk^tc|Vk +z>E#rW;5RL)l-$>|!iQ|NVF>oT6=7XaJwaCFIuM^&7Z3@urd+kJ;zAZ-n4 +zO=PEaEcZ>uJVkl}INMyx@sW +z5G0LK(&}0vp;S~87p+Lzyon-pX6-ZsMSmwaX-UpS@#&rvk>KMw#9|G^I-M3Ic-E4z +zG9TVlc*-(~{BC^I;MR@Ui|X6(QOJ6Q=_G>uB%5F4<8h;RA?1VMMN4um<HLW +z%MRYf8i=*tuw*bdaD)9uTe{9NiCk!Rr7oTh;~p?M)tnc5YbVGwTFr#R^}vBCmStL5x@|5}^`r46EJvKBq<$ +zB)G$pTtPnVO%aQgj#^f^Gs>i8HBuCUCoKu%!GH}QOgd#*@g|TavEdL2W($Uq8*|SY +zdBpoWZ+lO&@|ZpUy8S{XPa61qnpAB4!B$yRe*i9&`2fYl&2~s>_0OJv1jTeRG5JPc|$HX=6#Wn1C9w$fv +zIf{Hbnj#XUfE*&9C?g#1AxHr^L_SeQKqQzISGWg6aoy#`H9;_2Fx<*vK?)a>3xZiW +zPe$ZC8I$wmN+{>an4Bjga-NLId2%I`^JGlUlPjT|Cu4G+TnXho8Iv;_Q~1|5`BFwu +z5W%dtLIts47Aw>Su}HI{HVSMd=Zr53U;RS?>9qhS+~{I?YOJGADbP;Bf*pESvEUl( +zJnMWXDigffCj|r8Udy5#Ko3R2wEMH3N}1pzmL#37yuznPQ$&L2bBM(n&ROmgX~7~2 +z3A~u15WM??9NMY`YnJ5r>O|`~Piu@I31HouVAYc^6U>qiJ#MkORS%OFtfn>V*`PAP +zHUG)g2E>b<3tsWGf{E3wmUT8oId9;LX;QH@#W#% +zPjQ0a4W1$v%vjA%j~6()7p$F>Y)2a^^1y{oWL2$N`cGPFXN)C8{+ +ztq*!y4|b6j*~T4q-GsLq-Ze6^-`rg!x8AaEv0rGQ$VEh(FPZc%c_{{iQn8{4m3TK{ +zmSfE#WWv8~c#)pwHp~;D}GE5*)RpxIkaAnl9U~2$V4E5lb#=pXJCN?#JsQ +z{4G!G!7kD&85bhtBCU&tpLpg2iINqz6UImI7GLVEGg-=P-qS7$TLhoKDy_EVK5W0DEy9oav`||t_gRngU>D1MF-;3JbH?%>wckjef5o!C +zm7);5Xi0IoT(R8u{WuM~OmLkgxq^K9V2Vg^eGai`SIiwq3lbc*B&_>C@t^k;3+gjV +z-{MP;5oBrMFPvqZwgM0Pf@Ol|EGaG#7Cd8EvUUEB1Sgr8aMn{CBS^{~mkF#&k6$a5 +zVk=o4OZ1{TIXA`UM}2K&f+YG58GC>$`+r5U#QADkoZz~jaH@_sp9P=s1;+@I0Or61 +zv$R4Tkk(V4);PgFV*;IyV3t<6u0dK)ds-6&NdS{lf>~PO>IZ4D6_}3^Tw{FUb-L#h +zK9Cv~JJ!CjppQgoy%3|dzDR3_Req}%PT+z^ENgFPlp@uLyNIiP6$K;9AFHJmEUiev +z&}Kp=f_aD(3=JeK7;NuL!O$AQg2Ax|DHyKNg#`n3btOlNSjFdvNHH;81=gsUz}=}S +z5Zv%#dh?)qmU_yU8YB31OLB_g(|S*9j3CK7#3HM#;fk+eoM5(KsKIkq;2B@AOeS8k +zB%Bxs-*dWXnPe}ryi(+G)qP^sh{YOWbKFQAi(`LbgNn2wOhl|kv{4QQf{@n#7dm2K +z_9C1ks}RneMR~;*xRKUZ#4A2`B}a=%!o$&k2lk1*zMqu|j#`q_ET7J&hyG%qt*hn}kf^4Bfz?g*|k@>1!9*W`e&bb=t8)0O-jLAJ$}-iV_Jl1pLbNQCDjF`kdCgghUK@f?m3A6w(`g~5P}G@1OkxAlLQG*JGKHAL#-xRq +zLX~6+6^EI}t&JR=OUZRtR`!}k$QDN6nkBK)NbpxA9YGO=gux)$e9F6mGQrn<(j>vl +zmgH#h>E;_bx0ob&izPWkK7BkzBsh>mHLTBAp +zL_SfzKqN@vIz&EEzCa{M;W|Vb&l(aBg$Cpgt*Tu~9ANRV1^6!}C&0FfZI;1Kyl +zMF5c?wcrr>L`49RAhqBS`9%2wksyWZ5czb*i+YS;R@7nKMNw0j2#E-0=EBsS`H8i +z(rl!$M5;LMBE1?k`i5bz6m7OLwS`K(5NV9P~@`+jiB0;LaA@Ye@ +z03yMxT*J^SlExnlj8BBmq}DG{VlfklvF1QtQc5Lg5$Ltqi40D(o20t6O8N)K2B +zDLr5jr09S}kfH+?LCOtS1SvOQ5j^kByh@N#g$M04EK!b#4hd3@qO_wCQ$1RgszVF~ +zd$cH6hZxHCXi>HfF%<97qIex*DB+_;2|L74$VZDpc8H;zk5bMQszdA~*Rp8?(cNEo +zmvwhGkq>RJw=!#eEQ?pHf$E`G#16%dAowTJ22Xr~Aj=8=q3>fs>KG#eK`K}Z{>L@E +zvB_vmCuy>g=qd!W?ZugPlO$~#hy-cSBABs=C;rP9Vil!8n|{WdOPS#Lo3bl~#e&3o +zF)c{&o0g>42IBiLe10WGCD>zi=&C*+STW0Ys`>^iEDP;~H&_~!L~ut2jqt508o|j7 +z8sWQBG=l968sXC^8o|dhXoT6Wh*N&vL_<-DL4}hy3WzPkJ8L~%%ijxpzztS8@p_V- +zpW66_Se>Ym%B@DV6JAlasC8#pYZ0pxHP%K|0Pl3^MA+85jVtP+6W(dVqcS?-QAtl4 +zK9ogp{mobF5G?qjFE~c2>PF7p%yuzG&c~izuB;rO%qMHf>eWWfW05 +zX`fu*>PeLeZrsRKk7_Y3G^nP!`;FkTH!MZ%KbOki1|>^XD5v& +z3&_o+g?}|edE7T4IFI#B%Ua_(tFAMU93tW*NTwog>j@+Dg0HJg@DF`bpx0+C>pA;f +zmz;gz%D?;`?hJS+xrrZR37Sqe?($5R366Y(s+l1;;giY)CoL(iEs`&L@?!*F@kup; +zuUeAp(R{j`A{LaAOj_1@&sUw`221KqKCi~W=YbTJAX`UNKC_8>bO>g{XEwQ`JvEH2 +zTYX)@C9P)+<)Uv~U{B9l)=p2QOpu&J0xt4Eq^hDo`&`C_Ydj$Wl&{#ok1Y$n<+8 +z{>D`p16#0T@L&=~9mN9IB!gE&qqKh<_cXY>wuUyAl6%|%#hcFcxU?0bC1x)hoKmh* +zqS%ltCLF2}ZkHfM+l|{)ivL*b%~wpj7)Y(3;CY`^Bly%+JH#f-eb^VQ6C?qeE1yZQ +zqgmc+v{(RwDGGsgJZ`9cP}YOVM+U2;JL@MtO%XSSLuXX)k;x>vV5?WyrZa^|)m{=TU;G0tu6s4}*u;;B_-i +zfQYR2CMTGymMQ9gjcH?p{mM#>ft#+XsP%<{eaT=W+1SKAe#P?FC4-nhX;!gzRHI@{&9MYQbw8jXMfOrL?k);*-#D>vmr?k!(crH!q)Ec75N*Lj1e6c#g +zXDtaI`S|P#AHJ62bs~S!P=q|;9xtsrLAEe5QCvk^hK=AIo^Y99@>8j14D7StxMubm +zjk{A?4FjJ@lZwrK#ImkjgPT8{9{zxE2j@fQ3j;v1x!=<*TjTG^E +zlD&JvP`ilr-lUyu+qmY^_r8$a;F=z^_@x5jP7J&j;w4>4DWF%xTLlZWrw@5kD-%5D +zld1$CzpC}!V7UXnV0pyA(`iys?RQz$=RHdB+QWQ+61*j_(NI`nMBT-T-itx{4HU%o +zKI?fa6Fl|ts|~I!c-|KrBbY51`a_bx!N|j>5S+Cn=j9O*ZCqgzX+}KI3&z0?PjH+d +zOMg&@4Iwzd=_DNA2i_MUAE<`>e$%QES4lXrDz8o6@oMQlT>Hm_b!o=G(+nmIrx~sU +zS!4r2%9SWu(G{!zQ@)uK#j-evQ7lDKkNaYirw#m-G>J{Tk|{~}6TaC&Xut|Lc}i7+ +z!#-((#CtrUKs_4`o28_|#bV-Kik+AY?C^XKtPrkw4r&BXSrR@__t_ObJeA_bswCG` +zd1TVd8c9iZTBMg1i!!~~3M%BymS?$Vd`rfjHSnc0iQvnYw9bDY1q*$5CB4ekP0Xd4 +zywb+Ysrk65#$IfP&C+_M^%Mbt=`@T8%9&3-$X>2SaE +ze|Oj~ND&+za9MGMh6Tr1aIY1_xtOL6jm$g1{np723}mZI+JNEOA)rdy+=pa+pCPZ)~wv +z>udHKtMx(w=M9N&FbUpjzuifAaI1*(hD7f&Vim8R;H=-gWt~k?2%fW~xRtWt=Y7F3 +zg4u%MX#JEGc*Pei6TIk?ssu0jq%y$`gFdh*`qf)3Yo|vk6D(U&yfrMi+ZP-om@OE# +z=58x6>k9@VE}{e$SZu{_|e>1zb>+1eq;WZQnF0fe8jw1|rxu`Hrolk7aO@xuZ2A{qv+ +zjj`EHqrgRE3?vF`>_n=_e5bMU(LxJ4;XQA7!&{x8fR`lyAY6xfDa7lE;k^>#^~LZm +zg?MXXcs<5fhQGBjymcYox)|QZ5N~}9Z>QmH9L~t)zYOIv8RGRM5xiQ6*B8TUhj?pZ +zcxOYrwK2SNA>O(e-uV!3eGKoJ5bsP3?`t96*%;nSA>P9=yjMcJM`C!FLcB*~cs-`q +zjDF9>@YaQRkHzo?3~&9m)Lza+>|k$**Av6LE5z%I;mwA4Yhrk(LcFyxyoW=)buqlh +zLcH}cyeC7vGcmkpL%g#wyca^ehhumzhj@>~@Lmn^9*yB$4)M;#@cK;u89R6^hPTo1 +zPHoTF%Tu9$xi!S=ITOJf4e|P7cz1_*YhrlwA>P^;-suo;T@3G$5N~}9@9_}tObqX- +z5btaZ@3|1~;TYbFA>Jb~ybB@TqcObKLcDV^yelEzV==rnW+z#DNq#f5m-QiDPYmyt +z5U($WwyZ*2_k1{hIngZcz1_*>tcBGA>R5J-ou7Bza#a#NklG>hj=|Pyr)9Ez8KzfA>Nu8-ismL +z+8Ex25N}-!@3jzbeGKnPh?ks+_?I;%w~YLHVt6-%czrRvO(EWz7~ZWR-r5-6Xo$Bi +zhIe;}w?2k<%J44Quk@pxzaI9ZM?<`x7~T^hUSACF=@4&C4Db2>m%aCo%`?mH`yNRg +z4`-J4aBbRPC$g+b*~7JI +zn;Wwo+ND#rW%9C(5;HLq5Qu;ZD1izA5eNa1vMqrU2m=s}{$K$DB@hBD6hzeXyzlwk +zdv)%)&rn)1TNDv6^PKlQ-}Ala$9?Ye>pqt`uHVCLETl;e6m-1!{W=ix5qxPA{ep5q2Q+>IPJ=;0<6_e8gKf4T1Tm-!sm +zyPV_tJ>0b%H{juJ<+wo)H?6o^KN*js>QD3WWg*A)c(~;p*X!X{b6lT?ThDR*9&S6w +z4S2Y{95?9U4s+b3hwIb4CHb53aHn(Jw1+#F<7PbENRFHJaF=u3oQJ!X-7JNdZV^XI$!6I_pn8_03J9&RYd^?A7SIj-Ns +zUCeO<9&S9x4SKj6Id0O!-Oh1S9&RefO?$Yx95>_P?&Y{y4|hMu&3U-B95?UbHgnvh +zcfasB$4z;-gB&;Q;d-=xCjD>5!wuxPSr0dq-BKcIj+yc&F8p&54V)#20Yw@95?9U9_6@654V-$raatkj+^#yPjcLhhwFW( +zTd$;UvmS0R$IW@TvpH_w!(GU6lRxG3mrFTr%EMjFanl~|W{#WjaCdUttcRP>gE_9(!=24>eID*Yj_dbumvY>I +zhr62N20h%(99R8}a~$2taXlVxI>+^TxcMB{=i!!eT)&5VkmCkC+@l;f=;0nK?%Ges +z>z7IA`O9IB>+x`X%9HT*dbra$uFu1r%W?f4ZY0MIc(}_sZqUQsRNUpCiFv7<_s(~7 +zT#tvF$#K0NZXw6@dAQ{q*YDw0bKHQ3ThDQW9&S6wO?tS!95?0R4s+bJhwIZiB=wl_ +zaHn(JtcN?7~?mHs^X&EVPj%G;-UIe +z`++=lwd%vTmKsFZ^6Ls%72E +zpNT+RQPnH*xL>B(*<4{+T}nn7XZ9gfK1NA0SWuJUmh)}unDNk#K&*@gYLL63Ar;q%- +ztdC&1pY{=FW*u}Ru?5>lfFxAzWKAe8m#KgxRPKCED6W;MfFxAzlusybm8pOvRPL-$ +zDDIZ2fFxAz#8D__%2YrSDtB%v6bof4APJQ_{S=DjG8K@7%AKJK#cG)fNJ8aKVufP8 +zOa&yNa_6~1v0bJDl2Ex*VW9x$3>X$7N4Yy&_OW^ssj>mXLWIhlP}~0(yQhRRx^=t) +z@>n54Re5tQp%^Yx0ZFLbX}M60mZ^XwRPM}OC|YGIAPJQ_xfhD-Whx*El{^0ziit86 +zkc7&eA`Hc3nF>fk<<268Vzx{LB%yLA8bh&IrUH^sxpR@BSSeEhNvPcE%1}HkQvpe+ +z+!@VKY?P^hBvkICXDGlq$DoDOBZGGgZmBnsDjOLrq#hYOs-FL#J2DLD*6|9+#s4r~ +zS57*2uTTt?semL@?gVTo&X=ixBvkGkZ7435sRASh=uYE?V!TWRB=O3f=?%q=G8K@7 +z%AE`j#qBZ`kc7&eFAl|2nF>fk!$-pvcp{kt6 +z>Cjbr+&Nfk8NV01fk<$kaL#bTKXNJ8a)(*VUvnF>fk<$m@61vsaVSV*UjIB9>N-bAXbk61{j +zk2qA1mFl1zAdpL!;}yn3XZ|x3J&JPz1d>p>pI|^SP^JQsP`O`eKrvLN0+LXn_VfC8M8D+{SRgO~OZ^(Infoxwut&frm9SE}1FK*T$$>I@ivJ0CD~_l5r` +z_L0izBhXF77VLllB%yLYM}cClOa&yNa=%!C;$E2wNJ8a))B?r*G8K@7%Kh#IinTHo +zkc7(pGzN;zG8K@7%KdrP@7|I)jDOox!8pR;s;nfIvq7QanveI;ROJ4$D+P5-Rs=D=7N3Nheo85-RtD +zEGSNwsemL@?l)UdoGViSNvPbgGcpPsSe5k0=e|_$;jY%1x1hIoB)9&RPJ|mPz;o*fFxAz +zr*}{cm8pOvRPNV#P@FGQ0ZFLb5BQ(}=j6&l>dr9fqUIne +z@s6rGHyMAL-DF^Sp%wc`P@7|1`G=k +zD)&3kt4ejV93YTYg$PyUeL4xnoiY`Wgv$Mz6pHCG6_A9={ooXe`7#xdgv$LU6^f-Y +z6_A9={cIHqa875i5J|iHW$TK16REP!U?D=~e*C(nRJ$=i#64AY&K`e~ojtHz9!t(1 +z&Z!Q%C$R;4_5hMlxnI^o(W^~5DFl*GxgXy`F<7Pol2Ezd=R$F|Oa&yNazEjP;zF4U +zNJ8a)FW}Bf|;j +zgApk9%2YrSD)$>|C=Sb1KoTnVGixaNu5`V3(hek{a=*le;&hn`NJ8a)tPRDvG8K@7 +z%Ke@jijguEkc7(pi(XsNC<|p;#?b0ZFLbPvN0hFH-?YsNApR +zq1Y}{0ZFLb59*=VD^meUsN8Svp*Sp40ZFLb&+?%F=Z#m|3Xu9V;k|z7(E%Hr^XDHd +zq&`h}RKrR&s$0h^Aot#jrwQ-7Zzx)2Dj*4!yF>sK*UMBu5-N8U0VpQQR6r6cccB3& +zCd*Vn5-N8s0w`w7R6r6ccew&67RyvX5-N8^11MI?R6r6cchLhV9+s(qBvkIY2vBU4 +zsemL@?$QZR?3Ag1BvkI|3Q+8qsemL@?g9)@RO7`f86XLjyG8>P{bed336;By0~BY< +zR6r6ccclj?hRaky5-N8w2q;F&R6r6ccfANGT4gFA36;B~1QgfHR6r6cchw0fCdyPm +z5-N9L3MeMaR6r6cckK!&X3JDS5-N9j3n&)LR6r6ccLfY6R?1XB5-N9*3@9F!semL@ +z?m8M!Y?P^hBvkHF8&K?&semL@?rI!R?3by4BvkH#9Z*zXERR>(NbK5nF>fk +zfkja9~G8K@7%3Tfxip4S&kc7%zF$Id1G8K@7%3V|i +ziic$?APJSb?g|teWhx*EmAfdxR%T~w;^7$D+RRdrrw +zE@v+@u^iM@R-}c>TdM}T8?goZG80Hb8TZk=HovhxsM|gEj_x+Vy|_pnI#0 +zJRWp!w~?;~-51)(*MjbR8~J+B{a73MR?rQ%k#7gxTW#dN|D>C?lhxZtLKkiZ<=+^n$>p3JV2acUn2c>buQB|F)K0MLp$AT)mf6SF%OVJwf9|qMG +z#D~w=+LGhRyTAP2o}S|V0Z;FHN27~{t5nEqfcjl2e(&uoeq#Ih-XyQIpM#V +zo$!I3iIx|Fj#094dX)oB5%#oa1^t+=Cp~--O!=uC)-iRdurZ +z(8gRj^sc*`xf_+|#!ilN!#Yr0kETh^4~V_0@s|99-O3A6#0#qGtEQ_{7v_38mY+p?DH9QHvL$ee5?>TzN;Q-<_I|VlzB&amUS!ZJ${stS&%e( +z+FSc_%8&_e^xryBWqb~9#^akmBAQdye)~PD^^7XJDg=^Ho$;tv +zeyQ7I9_Y62O~{W`C%p!7S5>E~_fKS*?bDs7bt~6XKQ+`I)nAvRR<5!p^w-^}{h6Wm +zy#88@TIY()Z^tInqNG2Z-T8WcGV=YiY!+2w^W(B?7A0(h-ZkaX@?lZJR(Wh|npKMV +zDLM4d5BJIUms!mlCcQZeRja^SQ@vv$; +zrX!i@RW;rJN*ERIp8B=C2TT}TPjy-PZB{dbk}SJylR2)Zx|6p$@8BjK+>(Qe+82#R1v2ipy3lq8lk8b;DbQUIbgC5=P(daBp=vp4#!O`d} +zOz6fvx=Ks%38k +z7E+>`R;n%C7K&l=qya=E_rk-N29Yap}XwStr|MPRh3g# +z2j`Y`)9^WEwGe62rP@)dAw3-y%4%Uk=hk8WXml1PbZ#9Ek49%7(S;C79vf$ROgiHZgU+hOz7O}*O8;qS(wnB^E&XQqtRKI(B1Ut#*ap4VM2Gy +zqq}bC1Se(vC>u2$T#t9rbjR>HWwj7#(xsYGDy}vQhnIy3-DxkupW^VRMhfcI2yK=+-~tu%*tK~;TnTNt0}T~h7UXn=Ub +zHL&+h5KJgqysxSc@`Rn%{op&e4|Cj5j_au$+-7J$ +z7Io*6Zp8(}#BTK?+ulRPZw0&j0k7`ry&0ZJxtEAgfO8(cSxB8w?`D5Tn>+|!WzUL% +z&|0T9&J(5{^%|UWs)&mLhMb$~(5ihCAee8Tyciz;kv|05F--Q02 +ziu%z?o*mBU@5QL^;Ft9GYSar&{+IS`%Sf>`?iBw3-NI<%jd7`>%J$^4DqnR?BK6-oqVEO84nR}-Rkb@ +z&P}m?Vt7?i5*=b{n9nbPzDEuFs)?D&t>3602S0tYjdn!$zFvJWb6xkLga3Q0e|e(y +zV?%uhPrq56R*ZFXKzYstH^&jrs_M1sgGp_|S`R5?I9el~kJeKKYoHgRHR2^z)z<;` +z-!D(b{ly+=)TZK-V3_(ZREqC`>{6i +zt-soB|77*=W@C-@O%9nemAu7TR-RSeihiip^BccJf40{1dpqLK)p~y8pWugUJ-_iy +z^yh26P5Ghn^@SLQ+sLPb?yWZRxuAQyjXV-`UuYv=4!ZMg0G*DV$AM%AQ>(@}*O$@7yb#+!~C0*zIdA-O5=S@tUf-XK8+2k3hs*&j9%~5rK$H +z&j9UVb4T~yjfS5DsYe9hkUO^t>{^Y?h>xCeiC^mxh`99(kYC#oh&XV&n^FJb=CK;= +zMnfB-R2laT-E}uWt{~2+>Qwc?i8enXRrciJw&Le?TW0|ovy;_Z*+`Gw +zox~0qyA##8tuSUZkv6xYR8nC?n0~OjEm!rYhi`XgI6Qsx1Ks}U*%Q?dd|&3=nlc>* +z#xca|SG#@Gc}8(ocMV6#c@-~2m5u1C?z$c!H&nbCRn}@+cg+RJyNL6uI#vDZM{R!m +z9|8Bp9TlHM72@e%Be<;2i;7+fR_`J%tLnR}*B^Z9Tc4k(zV-P(^R24AqUzZ6yEJ_e +zNf7(AX_<-tepZh?#Yg|Ljx6-c=4^`z4hnIElqHe#dzVR9zYV-R^s=t&^JEP$d#nnd=^0?~c +z07TqZ)v4v?(-ZO59dp1WFCr>>7LK)RkFJ6;ZNqTdM>SplyJ;cX38WnEI +zW3S1{-zwavURV2Df%*#K9aZ%PM{Hmi5%FDCO7U{QQE# +zz1po_%`dvykc0OS(J5$QU^K%Od@1*2YBp2O!$iRDu1d+ng;aHvB;@G>U +zoEw4r3gWh^Btf`h(~C9kNO}?R;)Okfh+LaH{%v +z=_EfMM&+Xu{8)?1>EE(pZz=OmXkiQyQfXn?Yhm4MVJ2(gi83#$8?RTVmjAf>J!KZJ +z#deyuE(2Pb>}H^+`grAJn_vG>wQ~1@c;TBVkY7KkS^**+%%nhmeM_|hL>&2}6v(f4 +zR4YJ4g6{fgBf0*KF3n7E<(Cl`RduTR=0|OQ-2ZD`{E6z9E!91xdZ=5u2SnTmsutq5 +zs(P#6)ti^r?{uke>sDeI{Qa)#oNndTYFEYmplY3)?xIF?`(5%vd7}Dk`=b87s#_`L +z{7HUXSLKQ7%Y7Q?KnQr^l{P8+be^d3gUAFoqWiA~=UX?lq1&;+J1R!EG9R9+rnZk@{3vvY +zUqI~t?QRuc3mqamHrLb&Xs--Br{;Q`8)=IyOcS;+`P6!Aa`86{cfecP{7!Jbh4@5O +zC#$d9kSomay15aK3(!5)r>gwb5U3tanj9F27`|5hK2HU#O9$$06|7r`u$+`ga#`tjz;xt`NbaV@@3TnlriclB#`AJVOKsJdmRO^YnFX<@Hb +zzgH>((GJEUAP%X@n|yIb_nix7V~FQf^;-1@OV_)77}a0Z(Nc!M)ssYfL8I;{ZAoco +zR>uqJwM+5PK)aOg{hJ&(G;mKFc-Gdog!>m`M2M{z(TYZdDv4;#i)ig+sU3V5uT~l( +zTA6H$D6zFI4XfK^r=H>T*3gBawoOdf@ktEw)mrsYX5Q77Y?C;58spq)j5D#dEnU_) +z$7AIXudB+NK7!f5J_ir9`@d5CP9+C7W#DY5>QZ==v8Vd^#F)f`Co1;oc& +z-AaA@M7DXoN;sPb_^Fo6_UL?+ZtI1ps`{HjTK95ZA)ufmi1UM#BEj8*ObV+ +zv5E(UD#CdDzVE0r`_XsAN^eGGe3THF0LbF`ksIrEKh +z6M~i=AXhCj-)OonNo-3k9fmls?EY@|u8Uy4Po88*6mNC@Km6y;c4h?7+Zb(JP^mE- +z?|i=p)4g!%>3q~jLiW_n*Q-C6)!ety^@N86V~8}A!fku$KI`xkZLT*^w-5(oFTj(M +zHQvb655#ZRG27wfgk0Ym`KM~#W8H%TUtXy?-+tQssJdiLXOvF3(AY&68oOv>Yg_8q +zOrMEGKs*h#X3CTeaiene1eDCXi7aIaJ;Wr}*Shc_(`! +zf@Ko$Vq;+z8w-=zn#@*bHPG`R;1=Sjs$`5@EEERoBi^!VS@OZ +zJV#0TobD-c(C75os~rXkk7V&6iFKnf){Vwk6I<)&11;I3SWU#uSj~+>ufzKI{j~i^ +zE>!NFBAb+>qqGrXNhRvVwA}Gnv?bdlzOBYOY&F&)v9&F2XtH-=9T4|p9kvQ}!20<8 +zq*Elv#=0CE$#Y_gAxDkwv9ZFDROHBKNNkfxw;L<6-B^*t)_S?CX@3$cf;c$EYrj9( +zE>r~T)ojIdhd2fn%F8cXc{X|9meyIBRapzL=;~m+I%Hz5%*~;U(k2htTKN$EV +zyv-usC3$$(Lu?`1?I$(YLe$pv87W%7?=j26+TzJiP-k0RZb&jyH!%2mn?}`TN +zB=*VQZhBxi`P)qo3=>=H=XEW_M640wZB?DDeziiLi*=j)C4E?GC}BK)-)GdB`RF_1 +zLh$|l3VAvDKBc~+qVh6c&v#1x@gp7I*L8ef5Ov-UJ_&D9Q{i!vo2kaSPBqpwv9&Ex +zC?bV%=}7$$n!^5?kx%nkIfT +z)&y}U)?~j>6ReNlPdW%kjGT=hcxU4W+1VINDslApAXp~R9W++qps@;xt*yegrg|?{ +z0r5$!!a<=5SRcQibP1gLp6b+&PUM~Ik-uSpzDM6`y&@l^Ie*#!8cNbrjsE-jw1uwL +zrV866*p=UDI{B{rPSeRZv9&E7Xyy-NQ4lMQuYSIZ+^;%$3cvDY|Ktnf@%!GZ&J5~S +zZln;0qn`)rCn^puIo(WlFR>0wr=w@~+sx5=66Zln1#k{FEnO5v9>)gT^)U|NU-Bb{xb*x7VXiT1@h +z8%`zRFExh0)EItZYyF(kuxCT~ogj+k_|=N_z~eX-7lbrSwgWB5Cb;U~5>d}7@Uovnqq +z6FQsRJehx(9lwJc>cwGj@Y@)rA)_isAEmKO0^V(`$Zlgr5?hnmYFh(+90G13?yIW) +za}mgWzZc#M?iNOF7?0m~Mudy%l#C3B6RMI^>b>mji5;Nsn;4rJi;~%u_hSt#x>p+< +z2)?us&!|eycJ~W8!y1o{*4EX~);J;r68CZzw{69b+oHsm)pFdY)rYgemlopr824%+ +zZme;;xve23ycOCSLxe!$Ud`gh4v-(WMTswu%5e{?4H?}n%g3g +zbnc_}bL?ovkK3Zem%Vb__;5MI{YAuUsybQynmsxy%y6Z-5i&@xmJe4EA#gi5c7XhV +zElPYjCnq*6HdI_9$*bH=dG+$v=j3&7E#xoxa)gZm +zuaeW$R!j<7PTdmW*6%hw4oPfnOLH2~y%;~@N{n?|V?{-*@*rZj`ygV=jnwWhwN6A5 +z$#!F$+l_H1wzef(CF!wy-tFvOHb7%ZwvRs39?K-UoyO>P8ly{WZFI|8s?}IU#7D7; +zJ6gq(_3`^@`;Sy%$9pBVlf4qdk}A}L$x&YyW1Gac-&lwJ#yTXnHj`_b?9EsQ#GP1& +z{X!kEK7K#x6dcF$3}HhKVE=)y?y<4LK}F<~-KPlwZ}3%JvQA>%_`NXfqlH_>g^k~9 +z8sQRK+tRisemB+x@i5k8}PYkDXCbf`eLTBL}+a?go+Wj1cnF;h5|05Y}lWaeZ(V>M|TzwonjBTN_ +zH&n`cc~-N0LAUZ41o5J(q*pxF4pXwmqi5Sf`!f6-R%eofcuo#tne$XTFm=FA@5ipzn^ph@-8Q_+3b7;h?JkK +zzK|un*4ZRrmxS@8G2KrZ)1BDbmab|}Z^d*Y5}EfR471~Ra9SO^r`u1-Td&TyM-$a& +zvb+H%-`$&yyo=Xwj%_BeO+uRaW*8pO!Yl{C%s0ci$hOeg8*FV$OB%|9kn=IbHC1^x +zsF>l(vyGsA84j+f7m@4ZNy+)!Lz1^Qvku%RlP=<38?5Deo|0foY!dNC<2us#9dX@S8F=s4EKLNxsWSNMuYhHL%`2{^|x2PVeNhAP3M#i +zG8Uz?PR<>ThHIt5IyqP;5p6Y|MYiHu#5N&^USey@U+G$cy}Ff)CBz?9mA51rX2PL7T3!nG5O$M5@;Iy0}^`Xg?q_XCTi=qx>vm%{yPVE1J&LQ2sH* +zN3s0-h4N#KN5|(UeUWOv)+vAIk`5IeKrZRJ9iX$<1`H9&>t52?9?;d6Y?E-O8n3da +z;#Ib7K~k02+LqQd_v^7Nh})|2?rbnSeg{eVPH?b=_&7NDeud0>!ZLzS|FS-&(kWq- +zt$u(f$L+-*%Fb%El|(h&nD*($v?sPU?W`O;sJ_YA{)(Jt`8gcbzanaW62U7nFWosQ +zLrRa6Rm-aC>8b3jjK1Vl68>gm_?wO4C$_ewGaBDn-O2+s#Ph21u7ofkmepOBi5eTfe57&o1EIOBk$^ +zaCRHJ?QZP0wh0+56I)wZ!kE@@q}w9mdi{raEvfUk7^dU**)E}8Uqw1&2QcC&yovz! +zB7WO!E@~EOQhM(vK|19L7a$hBp@dtZJQ<;dG^~cctt^it8{(d-yyeI-1JlsLuF?Q? +z`iX@|0+!@|Ds9K0ys)~O|V(vfh +zy7ExBV&D3$uIh$vYf2Tjbo1!V;Ubj;D2P&@Xwvz>ZYzEwyr}VFX%;;ABAj2zd +zek_DP4Klu|;#N?NZL7EwRgYCXh^j%&-06_P){u%M*BPlUtA|7;kW~|rsBUUAcXZqN +zYZCk*GQr)~{d>W!Y$SWGlG!eR@mi?&dx%d|)i7>7R0vQh)l&9S$AbJD9gFI#zS-~> +zA~v<*$HDC^EkN+?XoS0ga2yc=Z%&wPMCS3?3~!qp)t@2BFkAei3l?8^GGJlOA6@AC +z_3p7Xpj)T2T1Z2!2bJYaWJ5fwD(@`}W?&jx7*ZOb&Uk7eQq+a=S#VehFGQCSF9w(M +ziGG-YX*jK%R~n#lM_Ks078Y43tA#cET?^X09HT>Qh3G!0kguz*H~ggx+f%P9;$|Qm +zL!3~R+)U5wD$=O_mJaK3?5}1gD=3F`+?0CF$9kc?obD}N)ZxqR=pN!-Rn>n40eL#Q +zyr?dtN?cycT&5YE6PFhoU0#eUdE1QMQXdGg`)4Sei*5^)i|&8*PX4eRSmN7uqi@?~ +z-=@^J8Qse0fH<$J`ZEFh53`r)!c9Ft)_)$txhbScvgl8BnNz11V?2n +z`elSg`jT$8_=?RVAcE>lkSu``uadtKf))ztsmWg$v0O`+F$8P!Xc%(Vmis?e! +zR#kmVf_xZLxLfFAFun}$4z#%{TzR(;dsI~)yvT#9lLKH+y+cJ2WDTYI4=P+5>ij{4 +zdQH9h4=U7a>eYV|BQFUaB+=|O=6bK3Ym%4vQs1P0Z}+L~`5zeQ3O{nCBMIz@r&Dq1I2=LHq=fk{G +zVob%|RR8cyMG45zZ8DsV}M7)nML2yrru8MMPndJ*;U_u6z-X(m2VR*OtD! +z`*#a241FLE_&(D{O+xE0DLTitESp~syZONlA&uAX37)=FW#ck9YA&@-{^S5!SUP*l +zmv`#?otQzy>6pRNA0)V`5Ze59JfUFZOD^i`_3ORMHf@y%<;tW1mH4*Qc)TPl)!TkH +zsV&axR<7C*7gSZBmXIH)PWoPHEqWMVhIez?+{55q_Ms6FQsy40fD)gQW#Q36A+=7H +zl(!kXufD7WpIV3;s*>!K7LCW6Hal%KUH3G2LNVx9a>ult-F^TfI5$6l60ed)+R;KG +zJ|_#j+x)C+61HQ05O-sKN=vw7O`Dyzn)1`&$&NO+A3Z@ljGjEyF%%WqY+Q#O>cq{5 +zjfddF@+pg~(6E$oF?;9*h#L40y+9>yCCi?pg+p?iESYZW_(W6G`y1WUr;H4U1FDjK +zURo3#YufCz)l|m@Pi$pm{JhtBv5=iVKoVi$x*k~K+-76-Hp|uP*IW$7G$Ec=RXuP(RDf*VAu3pmGx#k5)>iq8zKqbBIzxjroCn&jb&+{r()+_dcu;OP$a!ShCTmIjr0m@H+E +z77iKTlV#9ti+h^DCo$iM19!U@E;25b7B$D3Hal%Kol6=#v2~M!r(WXu!jP;t?B5k* +zL8P6#;-~ptF}TFbWMO8sut*HaqRuv7{hE~1x|ORs#B(uUrDdD3rp-=UP5El@g!0hr +zGfM)?1q%A}>Q-Tf7c_+LPs9L~IKC1WAVmv@gq1A*Yg2eu9l8)xhIo_`Edyb_;;+17sMj;jFI!+wJl$)|<6b$Bx7D4g +z=qciC^mJc6MTMub1o1(qPjpr+t}nFeC5v;9X(jP^ztQ9Uvd7cv)>iQNJ;ZHQ)o&A! +zcViUmx*8HHqL6&oi>%gvyTiRqq{YPhxwv2tT6(`6b8~SuG}~|CdK|p}A|md{mE(N2 +zLMf_k_VJZ&M~SCyRn<_jxKVf`{ac@jJsM@(|IkmU>? +znsWv!@ibZP6)hZ+(PXJuo3j=5a5Z?^LR^nID=h|#HEnjF>_%I>rQD`1`-W5`UK)d)spPxOk-gZiLK@A#SS5TLu)fm*D~xVl+8X9rwUO +zi;4H^jR{;YCy*>Ln#klXL<;T>EZ9+Ne_#QXc$%!~iWUy(xXF63_8`Hny-?~eA|8fP +z=S#R@Mq`~unvRYJ7k0HBh7nod4KYbpKB8bppnkGIC7vd0lA?t};z-srwaLP*Djdh- +zi2bVarutzMPdASuAu~DqAd(1z!HBSHy#O(%SQr!4uq7o5Qjp_Zdb^o +zs*{u1O?`ei?Qj6oKnw=nVOLF`NR02^0Nt_6=;h}TtBA7IE6 +zs*{X7DD)N>akIJo8%nqo+ed^zGP3Gt1Y?kej98d>v{uf@E%oG1@aT(()2fo_*9y^N +zjZ4jKkxmW)8Hf=fC?5?NgDgaEVd7E4g2XgG6QUnSTu_xaa~LyxX>No(()VQw1tJ9H +z!vJHDg|ID5JlZc8o#q!q*kg#aXB8rr6A>jz8nr+fLy)rEvvFC6OpaeD|jVRoL|y^%k+1DBkW*5itYXkihj +z*W-$ZHpGYO?4wv0#C28G4^xo0RVSmsdSRVI81bXie$(|wgLmZaaqw;oaX)&pp`M^3 +z)Ajrz$@E*F`?y}e)SEv9f8y&#VT(Y*QzM{fcc@VMJ8R$Dp +zuI7(XU{5^VZ1i-q?5WL@^vHS@NT)}Fq%X-uulzA-+lN3Uz9lO*qJ=~HL$cbV<*GDQ +zeY&l$I8{6ov&f>2=T$YD?i9T +z4c^i0Nbv3o;^pAU`?4zC>;Fntnnm>wbyr-Ltln!Qhnqb4BO<6In$5TZ9a=af*3GyA +zoo(@~`gJ};(?Yx$qWOc(!pd)0(`Kiwro1+ILK#V>d_9jy5?_E$0>2FNM5bK^#|Aef4brVfHdyAZyox3uA~2v9xnmdssk0z +z&4e$4S}IOQ)dLmRqiS2ly{LMk;=q3qxDd|;)!0=Puj}?y^}#D`e%uMTam1;J`<3>6 +z{jsXs52|lg-}?Of^538NR`nw%(jOW>?>_{RR1OUx^m&;uDGJx@0FG3`_^?UJ$6II?Wo#OaX+dM4}xk8@kvm%5D$YY`#$rI7J4Ss{;P)ysxK^&30(@cP$(3P$M3syAz;G;LK!+&UA74Br5Kh; +z7)yWHboej*VN-ugY^{&iHP1Ig3C0k=o|K?ucKi<7@%m)-^Vtw&G16m~W4f&G(;8Pi +z17xRS3uz{Vh&rFFhQs9qgK(|0j#xVxBjstO?I2xk$u=oK5;9sm>iFN(LlRrt(mhSr +za_k|94;p$1X1MZf3emny2jO~EE|NNb5W;3M>?nl@gRTK*?F&o8-PbHUj0r+qSCx!d +z%kOtD4Q$(3lab@g6D=+26;r+Dn>=mFqwJ_le#RVqdUEovW8G1gtdl4o#3K|f+>(O_ +zjRRU@Yg>AxDc^|IK-^Z9_pkypTli77$+mklYw?D$i1pkDOqoj`rL?0m_Q!`#KjEKEu{{YRmcHaR`oCT%;jJS?P{ +za3s6Kxnuz9S%@;nRu+}3i=WdYtA^TF14LhbunfKE!-07;va<* +zhi#&>x0u=MnuwdamCPdkfvV~w5z@yRwRdzvg?rC7jP_+X%^fw*Wa`p5FB*Z-WcMUZ +z2$aA-bz_U$63o5E3fzkouq`}mYimsqTcH9i#DA7lpk#LZ4%)|EdLUSbfRSzK+V!7q +zw#iU+$vO$=abvz8H|9IBwJq&wQV(Lj5x>=tZ_JM0!6)hkkBBtic_Q6`2kRFr1J+5D +zyNzYoZ7f4#Ys=894^8^R)1ooNK~>d*4Dzt*-UQH^(Rj+Z>Nv4|MfiPcFIN!L|l4}IicR))$NJuUBnqx)r)Z3f8-o`{}Pc* +z%?9!-h;s=!@}lbGkU1%L@Kb-aM1#R+P@UVrr6g>Q}Lf(iT +z&VT6Nd95nsp>FHWBku9@QB>Dg0Q}rm^{1bC^!+2XrA<8zkb*j}e2o`~x0G0(HY4`v +zErO(ZwGhOCTJg3+g7C%$V7OAaIE1A)+?!lM>{nI&eRV8UWD7Z-^_$5yw5ouW7vCL&(|iQqS$=-HZ|w5hpsh874w79RMHs1KK-dx+zzlGLr-_75W>z^$XE +z4m+IlQwQtS;9CpvrmDR6>tJT086xeuACO}Q$am_7vQ7l{F~qy7l7u}e^tD?GSq#=! +z5NTFQI`4lZi807RN$)84RA^%iaaL90;as7l1VPHAq=>ZZW)C|+e)gc655Bb!@2Sc= +z8t|K3$vBBfd*!rY46=|m2p6(}?_%3Kwxhj)igvIzaOmPUzDbv<7xZ_!j71g}GdQhno(nFv5SdmX?i>`{!Q;f8`i~ko?pS2Oo%8C( +zXmkhhnyS2;HC)9HZw81x(yfhLc|3i3BL9-;sLhE2nl)5-_x<_& +zln<-?3rYgUOlsZzGlJRSV3CExazb6Z8zLD)oDPxX$AfjhzEa9o3$>t=&cysFZDc04 +zk2sgKkG!b5PgPTsf6PNlTSXk_t;ehK*5j=q=Ry-8*(_aXE@-Rwf|D&oOzUf8`;Yd) +zoT$G1Nsv?3Yx$6|tj#v?^v`yuI}PYo&XkB3gQ|siT~*S1>Y2bY!voDs0Dl$nV^uj* +z=h(HNkZkH4J5~d2Yg5Gwf5=>|)`*I?qiSBoji{>rNJG@ET%io9cs{B|RlF8eh_{1k +zY*ED}-FBwV@nbdM#(Vy&ZkxTj?cn&)uS&@^;u%$CGt}5|Dca2aahH2Rw-V2yipx>8 +zqT<7-LR<@~F~mnf)k0hks_d2brY3h+w@fwL)8AygzVJIau35PiveTMYabCBbsb>5j +z#gd%^-B02~g-GH$Q_c7>q)9SU&F*U?F`{g$*^GKl_mQ0Ln_xs`55hw|zHWrjzJ~Z@ +zu3MzeR5O0`g_M4cB1WIG*=G;6!_)B{2RM4qgu~jl9J=C~6dl_fjHri)xZCVG^7e*Zk9MQPxOfkb4N4obF)&c)+ +z16zU-H|H8doQt!WYzxoY+7O2|#1Y-f#T?=#RY{TN3Nx3mK7K#x9_0VIN`di4GQG^tO_Y>2>;LdYGC?XmuS +z54K4#$rLfPFiWpbrkB|kI(v)nfR{AeE1?i$i2rj^2pb$`xbkcxXkUhdc0jJP?cAMM +zn7=NAMTy%D6RS2f0h=*5HV+okOb8Kqspp*8a(VO6tes3rd?z#PD6M~3QW5cQB~I%> +zi$9&cP3Moq*0!{#NjiwhLag+p?%nrchAYSKAi=)UnT3|6QPrjJu&$5Wk22$~*4iFw +zN_sU9a^684P*pv!73QB|ef$}sr31a3(D`S!hpM_1B^lBuc)7JZ|BSYiC|4Uh>S~;S +zW}A>cl-OE7`!(f*u^Na&s`5H2X8-yeJPdaqU$GH7k0SAp^w$?#r@Rj8Jn1~6ai5JT +zLHx;vlwfxJDdC>8rQQ@yxfbT1TrEnv%S?Q~ZoA86ZIY(t;Qb^>GvSmH#=D+u`Wd@6 +zl5pjmXKy$Qr$Vgh3HqoRYi@oDPoS|*ikeJ6LkqWrnoK{lO?38_FFiE672Qf^5&w5p +z)dwP^_w_!`J2;mVk9*HHjP_+X&0Y3@-jLNba2~S*qe*?9M+|8V{zCp10BanVaFPjV +zXyNYc4QFlJ#Iv@x>k`J9a5LRP{1H`o`Nj-ao^1r}%W%*>G%ECYU^J-@r)@F{&#bY= +zaS11xM1~gb&fcbcC$=`<=QXJ#G2e*qG~^pITsb}mN7V}+9BIDuM7meuSd*&fD+AU^ +zl*uGAv~Wufk_l+m!Oq^|(9_Z=uZA*=Azn|)fP6=Fa+SseG~1qcl+X&EKkF0Pml2PB +zXj=FKGr(xFa5w^LEhJ8kF~A6;93iDKe+Z`g*>R&)#BPh!8Q9P +zL3@pT4z6>#?2~Xi^US$EpaEi+KT-KkejNZY?<3?lPyI)-NTq@?!_6?wk25x9iG!Gq8^#-d2@2VFk1K +zV0HzO_Taa +zE~v_zyM^B*OS&Z@?UnO}G00NhU|b5mT|vAb^R`vU8_>;Yjkv2Sy>jO#{)p#=nO$&# +zEKE^aQU2A?^cdnJRn>!H!Es{4Eh#u6?ba{&vI7M>Kz_m3)PeQr8{(F#yaNTlNud-R +z5$B#en{eWAA)Bn28HG8G{ +zUGLs8z?7v?tnZ1JB@J?{@Ulx;<5Wc&g2hbE=fTRfjkdRPQ2Asp{Y9 +ze7$vB7b)whmmcHCsb8;GbsPS3-8J1XSXM*H-N{e4`L!9fpFPp$*W=Lc*q(~}x;+CuMcEv)#lI2At3Cwe-*KEww}u +zPgZY-g7(D1&}7WWyO!yKqOV0O3n6KQB~{ry)xKf!(bZa8=tq^lr}}XB)i%E_g+|8^ +z@uLeY(SiDOO()*SB6xb>WG8;>f%G2BYWw{WAg}77ku~Qe>%phIWQo@L;n=R8^lU|I +zZLjMAcIm(Ec27A&+i;F`2cxqgEWnlC#_@%k->T +zF&xOB7elwnz6A*L$~hhc0C@v^ECbg3td@({I&v +zTo6^sYD#lb&muxz*VDntYNU+}`#?1!E39_=;_E#p&UL$?ZP1&ObW>ZptJ@!w)4@*+ +zeJFkNgGvUhzR{n4qkHD>NTR9F7P4CD>1TGfF~`}rmFCw4eN+x?AANhSoYOR4((MaI +zWJ_Zc^}TtDvMjt&JsW?hB_Vnw)_)IUox7?j!^!S>j$agKNL>EJx@JLqMr@u9!*+!% +ztfMt_S_^bWx8n5jcenX9q*@u)5zj{8+G}lokuL!vQu?F$VUxL{$=uPcci7NZIS{=u +z&tm$j-j3I?vo+%|Da__gH;@O^)EMn{8A*;ojoQh{LK%(5No!uGgy%C+{kg?SW6U +zvEIP^CBy+$^#(sm#`q$4#)$avf^JpXHmQ~AwTs!+i3Q0>#vH5elNCB($Zvzi}N +zN$!?Px$9TP(}DR*h-XzLxl?AFJB;z=MD?=VqHg5QPYWp8mqPVu4p5y7as3h^=}FM2 +zl8jB2GB%`)7XtH_5HG4qm@&60!y0EKWr#TOf__o1b#=mfyak3P<*2%UQZt4Qd-2RV +zKdRI-G4v9of#tGV1Cc-E_%r#4V^Q6A7_Vjr5V)4Iz9yrkMuciQxSQRk-OybV0WyY& +zmG}MT8%Cu!u@)6yEr&57(cvA3X3VdF9JvV +za-o2D6jzqjmHQ!*FCjuxKf6SJq%g?^(b?VxBPP%3(2B{8j55`UtcQ81ydQ!hBJp}e +z`yncFbfWr_4P?!DB7uA|Bx9ig?#+I{yEk**%~-oS5BVxaptjZ5XL~eS+V1QvPU?EB +z9DBNzcoCnd%KIykm>sQ=U1b7&)O1)oKOGiT2mFtV0UxL@hcRHpUVYGVvYNCtuP`Ho +z=0->z=%WT~?fif(s`lld6a((jsQSWVq%p+75b#G?z?cz2b0ee<^ic!0c7DJXRr~T! +zivbU4RHtLWh-X8BQ41Tk3amWp^zc!r)nF#weB8Ec?r>%?1}d~m4yddyoa%fi0i8Iiip{F +z+WlMlVstsaAhnqWLY=!6IhnmOLSM2^LcJeHZM3jU9q<36aJX&e2UKEfTbj@y?uKCA +zL!4HXJnp++_*2$c<59y=hl=1~G5{vF&H$L~wSMgCXN3DFdcr#{cd3B<#7z+`QY~Z74jw3Nk!K5DWCNb=wx6V +zL%gWR2%LgXH5S8(of0Gi}X`$(+dCNrt|7{eE8$_(`f7U)4136)2rGUZ^V9z +zIFaE#K14 +zcqjH##Hpm8{$;8HQq_fxFD(^24Rti;hDLOHfaeh7ta8h^afM~heW6yBJ!T<xwlGeouf0^YyBX^eGOHv_7Df+6Rlk>A}udy5v9KDDiIS( +zCxoWs_m~1a)WG;SsIH~+UL6=2@4mSpP7c$q)`p6066*RtZwht&pNFSiw2;&?v2|*h +z?6rOn;$V0>Ifi&fRo;_g%)Zm^)8AqVMt^#!O@d+xYOM_&+a!j=#>43_9!|87lpwKn +zN|5Zeew@}k55*E7^7T$V@FCw;m>frkdWczXYB)ZuC1WS@qj)GnfodaxBlAcpX|WW; +zcRH6OXF2B5x(b9Y!y5vkq|=};*(agikN5XzVV5E7etdFZ+vw~KN4;%nN`sgU!MumK +z5Ie#B!m|Oa@#xvM(7p^md5zJKbRaZGa&1D;+f-nW+jTJUW)&^$oxNeWv~4_VYg?Mv +z%-)MhN4%dTy>O$8H6A_N7TTBLCq1Ac=|E_X-%gnZN!bZw@+NxRr3K`cECV**-OCB&tN +zO<7KCZMq(+^XnmqF~luZ$q>JE-M=@+8jm`j9E+cnydl{@NXt=^ja?eVT4NAvjmeI- +zHrbn+(VduV#JwchH~eH{ef)k>`G#ZzdER7Wmj>~uG1-qAlO1hsvUfG32Qk@*e4StS +z?3;eFu|9r3seD7Sfjn=ru}gzkZ%p=jW3r>IO*YQ=>(|WkIu>zARdup&`N_um`28GI +zXRZZ5#}Ih~_I=q>4bEdxc&JGC#it$G{nw$`Cec1@d>#5Qz7Dl5$bg&J+Nzwe$quK#fw%2o)@VKwrRAD*Z2?Pt1j+X>r(h=?2eV04zz< +z^ArHvG`@H{ffnXE`gkki6(HK$0`zH?2Vwybhe83qVXZ36aHZoyV*y^&LAn9sjjZ@& +zy$O(T(t4+Dv*0~9!Y&CS`R)j9lI5*F2BAyRf&d;=%;mWg( +zpnVw*QtO5+2gq|~89UsqgNT>=Xwx9#t%8^3Xlt`Ptf{;Zvy6B#WO>qBRhZ$*@i|DX +z8?qcA&zWWH(jemHJK8kM@zUSRaMX}b(7p@@sdYn^ +z1LQfgj2-UQLBz{(v}q9WQr^pQw6$5r`KuwzS@ +zM^*B8ezWj+9_!=xld?A?9LS3#9NRRIcu9;FX6aX( +zjhEA#(bgt>TeG?w6OMS0B)stC9cw)5c+%9vU)WEo-;i)1q~&>fIJRjZjTf$)jaSy2 +z(bgt>U$c4`6OPy$mJ6KNEId@l`uP2%`V9#O@*)YxHVq_RD5HhB?pKW$*_+YUCY%5U +zYoNVm;FB-yW_4A@`Wv#f8e4?gBi9Z{0l(uO( +zV>q4VxGbcZkYqMHX;C$2d2~9LIhid)Vj<0h!-mk$q(#-7T=45sVSV%MBz9IB8X;C$2`4D(wIGsbl +zLYfJ;wMXpg_Pb;`^WJyfZ1cPCZ=UG%5N8SZLpAAD$gA>~r7wK$$KT8*w(lwMiEcZ8 +zt>Nh#Z?;kNheonx2+!)SySlB{lSJNa<6F!2;t_=pD5U;k;tRQFR~6Q;u#?q=_K?bt +zgKi{?2>NI@+(wReZ?%!}wEn{&*40ttL${mYI1Hlw^ZA*`+RDt?p6ZvLwyiaK+cufR +z_xi5zM0?a^pw{+hep_2e41o2j=Q2zI? +zO5Q<7UQ6EDo&j#i;Cs@3M{n(CO|Ljv{doI^X}i{alAW|WcVg*j +zW?SpOA$n`Sr0uT6svvGBRk^FKOzBptg1Dk8?+*&Xo@Axt9dt=nT{xfypJXjD-mYV} +zjn{fF_C59eiEib1L!=z_@%B(-S=X&p7Ln?Bm4zKDyn_zgl6Te>!F4KY+phIqbd0c5 +zi{YGrxT30_>R+B{WgY&B#yPI2!kOYwVJ(H#X9`S~gDyW)Kp*Xf+sM%_Uy+FRPAhkP +zay|dKx87`{I2-((sN|f>&-1F5i$27WXOaBGi<acW$MBd}0mppj<wjD*O9H^;N6-uDaWeel82k;$E*#E$iPh%doQVu(WSQ55bLa=&)|(fJ5w2Yp09i#{V5X>s5mOVD%M5oOKT7A+?Ha +zeZ_hRWF~m{#S#S1>rRh68q8XVH&k`1n)s;Ak2?`pqF)G*cMizPucUkSP1?nq^ +zH&yj|VsCSZIqt|q8ARMj;y`sI&sy3%U}xB}5buvffx#__W=sE`QyX1uBAXIOKZ=lS +zNXa1?%Yw#2zjBVfdj{gg0%lpUa=|WFUTuEdwl_Nv +z)|7rDc+f(m#qX12V`S(9S-j&jzgB&wud3ep`e%wf7)fJ&8R$_KOEz*?i174eJk~=Q +z$7q*2y;A*tbv}RgWG#jMOh$k9?{r7&^SXUi9xsl5?nipt7gTXsx6WB=M0Z^bw(oas +zFR5ZY*k&i{Y27ui+X0#Q-yKKZ9y+z4=Znv>_fHh{gVm{d-8ZLy*(rsuE39Xkd(3P= +zzxF5HUAJ{BVIgj)>Qwc?M{RyQjyOB2to>=1YD2fLNb2OlEI&6@EiE8!sj5$|O1|~^ +z-|hbS$~M~lXkeSVr@K~kTaQ+wpR4}@K>LBJu&!^9ev^5J-JPL +zSUJ!57_t)FnuoiY^R3p;O +zKfj*ic1^ilG7GA2EQZ3zSD-! +zyCSogy3If590})@Yectlt${eIs`?MI*?*XkpA!9rBe-fYHP=6ITx}`WwdksK3rOmg +zM|Ddn=ZGM&kMXU9l;2V0DL3b}i_AVlxq;PaJC|TS3xOA3T +zP|l^m-9lVZl?09}Hf>nrj-(9{FJ9O)nkNiDZ=mk0v(nrX&d%u8LTv9MCf)@&IvSL` +zJt>}@SCw-;aJLXQ6IZaeiNhR!Byotikw${b2OJdIdW)uV{oQSot9+4!C2N|0G)krT|*r%&@gmJQXgy8BwVCvKy<9D=%nIH{}& +z8WjzGs+uZ4Tf3-~tw247cuiHk!4Vr8#yBH4yNEdPqJCY{#y5gr*$W>a#92x#I9z*O +z^1-PE-SyDS6+|LP;pk|xPVH1_Oued{Hv;z<;)JRsJGf$Vi#6^@ZV~a~g*~IP4ao&U +zq^0D7!?)U}UL8Ns-3|%3f|!N?934&8$(=4G_m*@xaCwR`&PZkvapFb&qOJ{z1wx#q#Dc>$DK-JM(XE8=uOJdZ3P(qib!v;_?UHid +z58Pvj4^<`E!4=zUvBn+AEh1jLuxC_uBY2jb%zzMSDY@YAt@eol6x~{A<_cmO0&sLR +zStqwR-mWU=qrg3exT&f-xrOl-Yuu6KBH~3F2)ZMAMr|9C3k1GWa>3zS?GxiIx_=fD +za0L-}Q#d-Btdmj63p +zpI6B&^Gdo|(>}lmZ8@R_1&nKBxZkt)G +zaYr(Xh!<%f=#J#s8Ew8Hvq0c;GYbgEYKKm1X3<>;(O*Ht*A$M9_Ug{Kzc_>8QN4!r0l`%_ +zeSmOG9GatJqJu#Ew;|Gegk)9BAsNeK%`dOgnkJ4ODz^H2-RHJ4*{)Z`gQ!C6)#)p8 +zLH=i}KU=l=J)nAdRC__i%Mtqh)%RCzeqWDJ#Jj4h-&Qg)<{;78ES*-z9s~!o6r9&x +zKdKX1oCzvqDMGH=hJftH4ojZ;L))!E6>-aXrVde35oXzDSIHwvcQ3S%O{)Vks*vQZ +zAgWfdZXw>u(Wq#v@!jTSwZEy`H>*>uNL#KMek9-mywlw6=wFY%JIR73Z +zhK=tMZ>Zg^VBbQ7r(R+hd0Jue4kbJQvRwd5Y-ANQ*xvH&{=y@klZ^~M{o<}Vz; +z5t3A0|3Fk5)l3W=k%lF4hfjY~uRd&)Q))LC?B7LPj7bXiC3D)8BLMM8&2u0>3e9H+ +zG!Tv;Nm6h9X|8o;RVkjq-N=*a;QBniP32>RlXf?%{hZIi&HM{z-i$M1+7K*6n(TZS +zV{y2YgzCEH;HEs+Ug8K1RpOc(!ZjV`6WrC$IP*ttD{fx5-;>TPb^df8c+MvNOK6Ld +zM7tAhX0+7>-AeaHWU8k((FQY|DA5yCf;;ae!Ok5Oz6&1ip`PYHR2aYR+$BNqm55A`3) +zd)Rm0{Gj?Q`q5{?;n$@|ggE{T(0Xu3_n!F&Tmxkjk+&7{Shw{&RpbNJ$xCU(er1wL +z+#j|1aW>Fr7j=6|F{lv#YYtHRicUV4Le&%6co(r(RSEk4CGY*CYD>@izJ2e-GiS!g +zLK2pVj3s6U$0)`QBh!l2up%0hn8qaDhs(@mMp#0phuEko4brj?!a@=q|~4p2j-Mq +z*2aQ&fW8hawEf0bwA-TqPrG*>p}w5|NPtTIh927W+>NYIQF +zbJiyNe3p#nqG+SUB!AZ9fk2P(|Edj5F`M3#ZwIq3n60A13yOE$2Bw%tmh!$PPt=x` +zlrf3Q%K3jn+ophVVRp1)FWF=Rn5&}Nl2`wb`8NY!e&yc6y~*U|+`hkXPu2rt^)^?( +zHBZD|k<49i`Y=<|2kaFa_Ha$+MnSom80)c>q?o6o%%+`QnOvrMUeFtVbaI*I;d}FC +z3$GDnu56hyW^JH9+oZo#pgH=F{!9KQ5HeNm?6ADAmke;Ee_wWEf92pGKL4@SSB`#9 +zc>fWe$I8xN}J~r9<5rRhm0>rz9~!*<+#qw_vDh%RcAK0vT?U{e6*H +zXjIu2p_v8DHc{CusD?WWM1RY=!^|^=@GPLJE&JkKX5sfoW}#I>?I>mev#VwnRKuMG +zqQ7O`Vdih21yr?VzvC{m@CPHa(5a#J6tjTYS2GK$;m!il-?Hv7^TjOmea!zmBUCkI +z=lIeo92sh_h`DlP7J4<*!D1FLhef@&=6oTKI~}B<59WaQ=K94FFc|Y4+`x38sxAAS +zci0qjuSKR~NMoj~IUwAjx{@2y9LvjGk~cgYS9K%x8<8%Lsmqha3Sv%+y5(damtV@UBG)|KC~AcE +zJ(<=9R +zzfh5DJHP?Vk}8yJg;+3!zsbH_st-)mH!x>}(i3w+ukfu+IB#11R(x9OH1S_s{4__@lVT;*jym-n8Uo2$Y6q;K`r$^oxd+|;!W`y%KgcL-HL9v$yV!dHn`S84jA{uf;das1l6}&6{AD +zQ=&rOWh9J}-*i95RIDc9%FfdUcH0R$sf06jV1t-*qRbx_>Wp@$nc#0(Zm(ar1y7p4}nNbV|NPxxF?`t+BR=4IN41^-sY)1Lm$ +zJS+NnwHF+o_DaE5^U&^7@5tj`s8_0=C_cLtZR$shO08! +zrbCml=w}NI(^rKi!&PM?2>r6grc*O88LlLjYFDYa4vnro`-yD#DmnFa$vyMq@psS# +zr_H_oP2HA~IRV^!=mvF8n4w};?9nkkJ>><~%Ud(BU;%VwH6O&)Ez_teG2@qLx?>4+ +zWHlv9p%SxxiPk%oKvz?uK2&1PFVS(w66k75G=xgb`z5-a65(S#pbGrnDXN-oG={pd +z;CG`>-AIMzeF99f-A~3Fu~~exTnkg~z9bi7Bf4uhM!eYw{gW}S%3L4~q2HUDbg~7` +z0#_1CHLq0MeY3M5^t1RIzAktc1a!gsiF?BCqS%8kL +z)w6&`O^Lu+aC*lQ=*U_<3ux4o2%H5McPxR9tfoZ$GL4!NfwSQHjwR5M)s$!ml?a># +zC9M>jEPNIORDrVqRZTYIHyfd| +zz*S`z@E;A_quHY}G@(?^_?^IHP;H^8O0}kVRibLDHfB``t*P1=s!FxhqAJze;#G;N +zsoIoPCA6k$Q>ZG{h&R(owXS$oH_FUpb5@nmnySsAs_Po#z8&iT)d&r&D^c_{TfcwW +zRCPl${+A5z-g$RbjrjbZO6t=vDV(!Ui#0XUI#a`q&iI)??PI65d4d>m3LDC;>PAu3 +z4UJWuQi&P6lqu${sLLT{5qP+1Y~K@BzA!Hp*-&s5Y6G!YmTI^}C6D6LUcW$Yk!KoNEe-uD(rIPi!Xd +z-#ln)%8RVn+4BC)gGot>#GfJYpq+!yjLPh=gZu2D%pP0*vwboTEcKaFnKQNr6>n%> +z4^n#2VSA9C$ZWPfDDTT;{>)n;D=N2PdysC*+$yL(b!NzRDjk+NQc!L`*+CWcxB3@r +zG>YjPrSr$O;HaCbRVgM_?c0+tU)zrzAlcXNF~4wcK7gC~tMPX~yT~UDT-8?cEh@RF +zQViTY7$x_Y89UcZ&bq@7#Xbne`acoq#=e+*dH#L+WZ11<>vQ|Css3-~=a?hVi_@~92(OkSYKAG0% +z<~h`8m^t$#hsi|UPv#PLf-=tik5t4xYnR;mCeIe%DsuZ#>vQ{a?ktqKR1Xe#OW#d& +z!+DoXhqq<2&bwqfx-FA+x|!SonCo@wW8TdN700oeuWjZMjw?R&5U-<~`$={v_!oAs +zRDD8I#9r8NWC#>Vog#rF(3f~WL@=W)+_}T&S4ia#$W@sEUA#vZm%9!ds=FmL1H?QK +zbwBx{8FKWKD3`H8_dPgp|Bw3JVC(FGD{vYtUI@7cB +z*x>ioGe&9#kJ+luhE58?=*n#+$XBDar-3^}o;1*!i+bgkxVr8l{^f5({1;>5Q_V_k +zH~w-=%)=+*@O6xeM^rOo_Bw_mL*NqY(qizO8orKE@fcIPC*jDTN1KMF$4o(cRlhkf%l) +zJp=ZgX)tHNdh`qkiKAygNE|%_4g%eXo&gQo0*o(w2B2z`+RT_e1K`LIxYlrS1)DFT +z2KEQ4nk&+-JRBKx2JHNU_!-clzIF*szc6{pdEfj>ulpZiRIJ?`aNj^LMpS)Q7=F*j +zSA~9e+Evwd%^k*s>P;1+$6OQ@8a-ij_qGy~%CjxZUvgBR4WLM4T;|BDy4;SE1!?u! +zAn>H;>P*j~N8W;Z#7NE3WA50&`!CZ7qbs+SAYY9(dM<3LCfe{d=Bi9}dyTo1My3O0 +zHWyUjcgkJWZHu|DOk@mP#jfPGbcx|x#2nGv4GM%b-kFdQ>NOnP+RyqDqrM;MyhO1SxqHhMu0t2^Wk +zUy!Iqq&6At1qnxnz~wTbFy6!rU!$nFwU{Dy5#h)X_^a+|r%0e5zQp_6a0)Cao7wok +z$N#dEtGdHmjB`pz;z0LY$sMw`e@}i*PYCZN-rK`SCauK#If)bX4QZfnXOf%?&D#T* +zbxNFl5fZy(xzD*fIq8(IA~ajhyyZ5g*7yz94JLL(s`r?S*Sxn|`;Bs3q&Jdx9En>i +zki{+BuY!X@Geww>M1?+-A&gE1D&hLp_IFyHnko8=xhTr~1XK36DKDEpFKS+fT$1x$ +zRcE<56TDKl480nPb?1uO1ev{pNqpelC8B0+j|VV|DDMvu=cT4VO|2EV%&(sKUk+N3 +z6H(xkOC+SeF<+3x*UndGv-b`lBUrbCOEJejlwZQ(kKN7`a8(3iKL5cy@V@yMJl+2q +z +zde0J)1-E|=a}|H(R#A;Hp*eOiCq&&(e#%{|gfRN^ThX;~)t@Z7hWYchYyQrx`!o5k +z8np|bGk^Y7GXL@^?GEu~$724NBXx&MN_5X>{|@i>e$@XVm5{J2BurGXUiiHEVV4)b +z{_YPfLp0l7dT)WVybIa`*{9LiLoN9w8+d#{vRD&_eQ0;sTbO4xGVDvsy}FEDQpNkp +zN0u98_t{>&h1qYZC#lR~OTC3TVkz%q@S}}uYMt^+m8=^A!*!?uYR?t-;WP|wP@OpuYO5r*pCl>Nod}WuYTQU%#RO#-Dky* +zPf|1gQ+|AM5ctXtYrG=8IWRF#M1^m(ZeX^7-N?Xm@w$?32(z#)*}F9y_L1dYUB*7P +zod0FIP`BJY%fRaYTz;LIZep(NLA`~!DJnb-r_tXFBlW^!>aGpVO~F;_R&vl~SjhIQxs_nCWeCI4crm|0w;7 +zJ@=gKc*lzDnC$9sAYL}_`^}zTsPhZBJDSUfxO<6rh2gsV1(w*mPJM}&Wkn-8wOJ~d +zBo1AtYYN*eCIpkPz;!zDpXFVh6^8a3z6EK_MT*(=pXcGBFnlx8m{*3F3zjNlc51ZW +zk^JP1%?>|kXCuX26!jqa@>xP-U1YXzOK&=x2Irs`AEe_|NMAe-&>TXHA2R3_( +zd3b9eUY5Dq_m4Pz$9ZnES1>O{eP?wmm)uBqC+}$;hl^FfB$L@-?QYn*!ZwA!&AhXr +zPf>s9{f+r+v+vJOXe39HexF&4-;IsPJ%L^NqGYD!MtT9SY< +zKTyYAq#^+McLYI~A`r!bV%Gf=T)8RP-}>@8i~O=e=zZ +znx{NWGMR(YPvkx0jQ?s(J2XAd>LQUFXk0$(tJU; +zU|cJb+)LiXEbXuyWz1$vrL!_ug<1XI?VL6E){8LAty{wIT}e~ZZEfpicUl7yceBoG +zqAu-72QgW%?6`6>2Y#}ZOoW*Q^P^sO>-VefkgY#}Ibx|YCb@%`9UWNEkjy_{fw^y~ +zGUlNuGrA7!(?W)MF3P+;`{FW<#-e8oabB0ExqV|Uh{`HpFBLLOE@o5VzW2rh6&d*b +zO)Csy5lQ5<}tP72ivljK&76J +zuXNkiOUnpH6mUQJCzr8jY~J#$%%y@_k-1t>>oPYAYE$NRLG8%gEvP-2`<6;ae>or2 +zgfMj2;hU1iJSSov-V%nd^j|S=gP6Ob%x)-QA6r?u?JwjJeL`~sz#O*J8D%@{! +zr8cmPSsUoT&qg4X&EIihZrNNF%wM!rin&wMuYqM+yH;4itnJ5uce@-`z@`m+3zJHw +zYnYUISN8js=4a&1kE4ID`6+qmy&?%F)tv};qf97r%4SG0mo4S})h5Z$tt7=v{!+fk +zS~j&Bg=Wbyn=Dnv?6?{0^tD;uHXHa5vt88pn2(;!hw%C9)K{MSNb7?o{liu-FVvYo +zc9M)b9pxKnlCSN#vya0IZ(-J^_csLT +zNnq|cn6-ia-K(TZlnHEl5_H&3rI?*J#!RcH5Mrh`gzl{39V-Gcr*8z(nk|Hw^EZTU +z1-$D;Am+}EKw1ZdFqUi0O3Ii-=T|MQBA0hA;5xUtQq1Hp-?;y(^}Num6K2y*q0?O| +zoY@Lx%-RZOOL-N_p$h)qJ5gpjZn}m^&hRxsApJ2%7G`arUy%`a7L$S5cVjYWJuHNn +zqc?=kq$O17uz_Vva^`DHi?n78m=(pEbEFNMs)j4YYIfV21DI6FY7Q*ZqL8`RG0C3` +z-3o2W%w(CB!X#&Sr3hpW%qTHy1O1gEkb#)4V%7%w=aSp?z_}Fe>Yast1@G$2D)?gx +z+*!jyzk+v{{{PSzvTf@2IJ8Y&jagEc%0}fc>79jcx;roForQjdXJ7kgpEvKHsPnt! +zZJ59t<=^BU`o}V9fse56dJR4MZZn@CxHBBysje#UHR&wyq4#PiAPoGY*Wp;VsQJSJ +z?-pVH;be~s#5K5F;L>v?rkwY*8yHR?ti|O5d(@RYmrN$+tq*SkU0op6sBU6c_V(Jb +z-1pz)&q_nWz@EMggpp#&hP{QkBI-f%m3zxHwhNux(P_De58NbXJ&CuK6G`fX&zZMD +zW|NnfY5$0LlO1zJlz9m=dv9HhpD%Q7M-SxsdsdQSUW&^0XSz)5st{s+>96qWX9#m% +zR37{EqUBK0vMt(WE0i&ZYATeMX^j^`%-XK_cW;0E1EH=A*sd@_a}8nER`Bn0euamj +z3J(Jn9)>FT$BbWLFjQeMP+>4sVbHq{{R*#zD!dk`@LH(CYj>#dx?90~@W>`4r#Zqg +zXYI;A#$;Urm%l%tM{c=n>plt$=n)l3p9|eR-md8{MbR8VgB_T{=P +zB$%ZG4yLy-zuQtN=B1_H!u-0WQq1J9-gy1(^ny-Y*iMu&schcC#B8+b%a~V|s$f#t +zd~!d!Ory3N{+?)37RC|yY`jI1VOwwjvtp^on8%j#ZcYbsQL8Tb%JltZTJ*Qh{PE9y +zulLVqx0F|m!e_5VZ&K({vv!N=EM~`z4MeNA5V~_wFISV5l>I30g-V0el#TYlE!U^O$F^LG +zIUy>1Hz#n|29`0$EcF=k3zjNl)~5IObVUKE1E)C&W^C>h^J|tWV=juyUa4U(6`c1( +zJulzS*;L-kFv9;#A;BE`Yn(w9%n4E9={#4C3!AHqS*JkrZ^tF|9i?CHc*)!Jr(SgG +zMw^ear|*-h(RMGz92Qm8xw~Xj`FCyaQp_VuJ;tOrX3a2}1amjX{6f(Ox18JeciWNc +z?+M+2l5(}%oZc1EDp!YG|t8$7`r6cyeEey%dP`fRRG +zW7g*K&ymyrE-zlPfhlH#rQX79v{Z^o8S@eclZt`elWO>b#WY~{+T7lkN=DVmIbk62 +zkrF0WGEgt`qXp%zIz1h=wNuP%OFhPHIlAq5AlJ{>z%piSpuYrb3Rt&+-h&(oeoQ?u +z6M#AQH`qO+n2VyqyT{K}CfAJ3^%%1@m)~_i*8sU@ZLUva*5>l>LVm7?iIjL-}MauoCT!Hh6QLo1nQ~N@a>dWJ= +zoBuwr40TJl=2d&A=mX}VsQf&j^(%!C^Z164)=446Ji8%uw+>y|wt;0#if3IZFVmvF +zdD9q^;<=C(^^Fj-wk!Stg}451a!RI{Eu!*Sq4i23#B9GIbO+lj@0tztu2Em&eLX!@ +z^q|e+?YmvMjtU88-!Y?mjG2ncN9T5$T)$>>l`;DjSiQPvkS%n{loZfpJMpkxCSid$ +zA&IJ&H2Vjsu-j~=0ZcMJNIw70GL0g=_sWBrIkp4z=9B0lTP?+06cwI40>^FO0Opja +zl6gb6`i1Rfn7P7pFZaMutcY<}i|jMDV2VkS>}QgyX(8sNHI8?x4hYHx&M4|kDE2|} +zg?r01h&SJHSdhO+<$aQZ>rWS5#%%dpcC%u3hzig5k#d~bT;)0iwAx(WI|b`f6K%$e +z`8#ct_t_1SV?~?&c5j)+rR_k9c~z?`DQ~^apJGz7n$KO|Yb7B*ds=y#Ch)BfYBd(+ +z-7L78;}X{5Q6a(H``fJCDCUu<@XGnQ%H-O$xjv0qo6A4R*VUg5VRm3_$!@mE9%Hsy +zY5=p{Qjak^L_J7m?k&^!xYZ2|%lyLy;pDSNgST6;Y4IqS-TVTS7>aw*4FezWX$&jk(fOnIj3LDtG?}2&yUM8?u*E?QN3+nV*(fKWz +zR1Cb+Nz|gG*`Q80*TZ9oR>fu`ew5>M}Mx$_`j;idTPBPt~ZNO_W=c9(5F*#q7S(Sz0}X5VQA& +zkXBzI#O%KzjCG|&s%!|@ZI*j=8Jiwu!^ft07K=^w(D3QelcKYj*Oqz97^ +zxys~96qxt1T@DJpxv54))U*sULW +zTX0q>wrmFm$v}AE%Yv(3)I&eY`;N?{qNat}Ho#uD^;68EOAj%(3zc8bd%&J@>Y3}G +za=&O34Up)xpxjkr<@@cXNHM1^^#pTPRQQpETn#p`j9DA#Z?JX+4B5cP<1!};%I!K) +z^f$Ytu!n6}1(S^CdE}jC8bx~VWg}hQu&GkaeM>#Ytot8syBf*0WdqBYf5}oQW^FEi +zvW^t+cZKgZe=}cdX)U$<_K&oFEqVEsNq3&;B7x?r!#r0G^Ev*#Wg3^ZN8VEkJ$tuC +zYqlL`>#Y-jx2p)mZ2lj4@_mfiAu7Dh$Tetll`-pVuD392bNQ1=t|6Oi0CU_@Z)1MR +zQUjQ6w&L5EwH5uhVkebj%I5Me?m!P_q;4w8xy$TFy+ssrVctx|BvCfS{f;DAloyOlt;Xe?Qsx2oN8 +z4O)r!I{HF=D_Kd}FLSh@+-|SS^%n{WX7WGTlOD4qDtyxWxyt0KQ=oY(btj=gHbZW_ +z^Yo4l1d{EAl5Kg(_B6VqVw9&cFA56t*Dd8;-*ow-c5YJ4UQ0d3?7uNxv_=XcX7~SG +zdo{RILD6O#SjOyBpg9IHYjgRx3UbkF^BNhm-R63NS)0qhH+HE%4A)$>jIm<7nl>wK +zt4;46NUKt>7g3m7mU;_w+fpfJk=y&&jVYeCQI8j77E#{$cPPoP+9`Y{mg>~*$nAlTl8(x +zb~nXbx0E-*t*X-{%=V7V!GdzH1Y9G91ankWel*egY$3#)xgmUdg>tAudD*W}4ps24 +zz%kYTQqeWH6LfL0kYIM7*+Ut#S5){=UQ&*=BG-n@t%BN)^8R<%B2r-9l2x)!15Mqwp5YqaILWnteLr80?5Ms{W5W0sN +z8*Ij|R2h?9Wo`nPY^fKsjjz89fMahNxxb-OcSF@?@V8a!ZmU|kzqwL(bJfZdjh}sG +z`iIG;s+GgByNtX`8Q4dL@;6WFZ=czvg8ve^@$cpV?ZQC0 +zPPs;e*@uV~*?s?89-eW-vMHExZr9y%nTFEjH!tr=KWcmR7<0^0Z)1+1GidMig$Sk_xz0vD0r}t$azy3$;+7(m&Y3eg>^A;gyhx+j# +z`Kfo7X%tKIX(pk?PJ;K9{V5HUi4J@YgXAyRIT^qts`~b~yM2gjvJ>|hvxxihJKi<4 +zr#kyW^EYqi536YXy6uJcrtXXiZ3?pw!m!UR*RhPvOg%_m__}v>S4nqBW6Cm7lMVYw +zoY|t76f&RlzGJJFbc`6Co8D~)4y*7fcV}VU-^-7Z?-H6o%!Uhl%3wB$3Kwlsj-Db{ +zDs!x$re%^V(A8r}659jsN$OA%q|cjw%=^Xc&j{Qpd$t}B#lX$lVAAjK95A{$^)EZ` +zvA4wqzAL#X*M^mNn|W3)vejl@uwet3E264j^rNv^=-hc?Sl@5wJjGnF)ML!0TQ@?x +zyr~ULD>BCl%IyI;j|&OrnWY|M*8Lys&J=UhQjameB+7jCZ*-Z)q{#3J(v2fqvy4e? +z^AR9sgRNP{q_$CE)>ic2?W5whtvGiz%s3aLWoI!av`nDLWp^NBO|Tvvcnj_ +z9J5nreqosg0}1_+#F8>^*`g0I>3G(=hjtkIg%FdD=R#T+g%FdD=R#Wa-TW~ICOyuD +z?w)JXAiIS3lg?%Aemf^AChKYbL5n)0(` +zQlxULG1QGhg1Kv{$C!JTN-;}+pKIzdW`n3~`uvA!yj?ah#ayzKcUL3oV^&he92Qmm +zl#0f<$gB_LWm=Q9QW{jvrS1f6DP%`zZaoJwf3u+6s13Oqf8EZGD`}Ri!%9-jy30H& +zJb?uMs0}P*)&}}#27z5RZ~(JMR910dnHFiy8x@!p3C(1mB{U{)MAJ$%imH?bJv4_w +zTWm%;ZT}u((xa?@4+H&sNdL&63*8Fy%DiMNc&{5>$#-QxNmKo6!xua5fAGP9zIO7m +z_s~G)k7?LuqhPLC>NA-0|KPSI_H&iVHKjoFjEy;0ldHT;iwc28EY_QA`r% +zdxKVy-h0XCr+-NL8JqrXOcLfRMyp8gz2x%K50ZYurvEG^3A6Nrfyw!-yGQ)=uaTZk +zWx4#f&HTXE31rpHx6d%QYp(IvmuZdupPUy@Fb_m!MPFa0#p0NZn6D2Zu;*^z7jqg+@evTJ7GJTb!I<%&ny3euy@|9YG$_V +z40&hSrd)Nu!LITqaa)qV9?xXA#t#Zv<$y=B!qGEHW&Ac$X*(^j`}2f!@1i!9U5)viaZr^s{;IMAaojjH*eW5#T$>uKW})m+`c3G0!Es70?FLb +zm(1IuUx<{gdc3mFnTRhYemC9Bfz2ME?iA(SZ32lxuY9t3@cMseq2D!cqXho6I&f76 +zRN)#pQE^Y1-O1g>LO7x-IObFTQGdiinQTHbZ?z3<7dL +zzVfUmiuWQXcmaBZiA;!Bf*y-F0RHhhgBH +z{zt9KdjCvMK*8aN#o;IQ=mtTA|4{+6n;-up+YzgGiCiTA!=;3&D5c&e7Q{x{=|Eyiz_j2ByQv{2whK2J8;$2c&lb$ +zU9!z_mm}UgqO!neIzzI+XMDl*j8{(h0^l`vr+s0YV)j|;G3KDC@OFn{??1Gmn0=N?G3&o>Rc^Q1m574b^!fG5)SI$h +zC~wN#DyY)`lh>&inkTD4nL`D&C3CN!67{*x_PyLAbEu#uWzH1Tmdx#fx|UheptBLV +zqdr%kuWa8xjd?AqF8QgzTM~E~sd;TUr(rNG^O~$nU0@96tT`9;>$aobEv83_n6kj@ +z&J{^kh3_(*e9-&*>Z;>=c^P`6*8RiQ4NXs-Xm^sDHGyq*_oSFVWT`S{m#FZeK(5vz +z5VJPWzq|>gjCq>ItPS)JQ9tluDA0fWAZ@qp>HucHsO)zmTRv}InL(s-WN&qR!Mre` +zJ?I9wbLB7CM +z^15uq%~g%G1n~REu^2m +z97D-^x;E_c5ZsoRObzyCX@;V;=~7{pu^^&pwJw@jnx +zfcH|7YAZHXib-_!O?VnbD(?pEZsEXz6TbWTf!;iQyE&0s%!`4S#{&m<)oC1=-#f8x +zjr1#fqhi3NDaOAqo6S9?dJLFDsUm!C7YJBTJZ%*lY+ +z{2et3XtatnFZVG!t8nn3vFuQCYzIJw>2HApN +zgz}R;3?w@YCEIlenI!5_o$%X|PycM`XPao2M3*x9E#ql`N$=-#{4PAD&;D%P&(=W? +z$^Bk)lYQap1Iu}IuE94FP60jUxyxAv=t*1Q3$+!h8hkV16wvFQyE+Ew&2WXP2H#dV +z1@xZhPO~vUAA~DZHTaIhDWJQw{hf7y?)Kc(}nZ&9FUtc%{ +zbiZ|{x{wC48Gs)4+|}gJ72AOuS4vfbZ!(+$ddj+W4&+xd^t5%;ziM*mdCy&)edtB& +zCVABjy<*)Yueza!pL1uw>V{tN+|{l@Z(8?&X12Pt(7T?y8V$WKcW7zx9fwmupLyBe9e{50+|_94j$1l_uRELqy4Q18I{-cC +zxvL$39=@dm_{PI2pl7U`{a393J!{>}Uv+~)FNWRFD{{ZrJhRu_2=gs0-&QyU^s#l{ +z=pXcnb>Fx?ps&Ji=&l!nmk;!m=dR8T^pfYU4h(ud?1tWyJ2W@=_QENkkHT)~lUpj_ +zy9}p*u6r>!LD2PbhsJ=fIh+EzJ?w_=yrlxZo^T52G0$CHMd(@UzOjR#7sGDo6}dw* +zfNwLL0(v*>hTgxW0=|=Q3h0Zl8~W;&3iwLj&PKQ~OVCYWH*|~Kp;^M$5l#WkE1BX^ +zuX?dTx9OEc;jS(+G%t3ZPky$k>Tq8R@MJ$@U!;s;&WU=E%-&n3!HYWcttQNFJ*%2G +z12KCoHHx{X2R5U^ys*?L=9Q>wO&Y^`5;HY1E26488Z(6sbFNlLW2ewz?pdmgd1$Fo +z%wtQHF?pCYeZ%~a9$m~xG21LPirH?d0nBbojbip%Y5?=tQlprsqN=k&qojuj(=*Hl +zQB@s{ofeVsc|MD$Ipae(jlDm`kFn +zBcO3y=rB)fbu?Oa=9_$&?V_srXmA@eI?Ndz6{dHXYnB?t+_2OD=AorVF^?@ZfSKqF +zFcmTDEH!}HTW{wBvtLxT|1@R`9p-$kj>cA@!`!LW(YP#hn8~~Hu2k#Ns26G8KEv#` +z)F@_eZ77Y&LWenBtD~_~=rH$cbu=yt-IdHbos?#dG3)KyFy@4#(O&4>!*X7yQ=QI% +z2g#g?Q=_4lq`{eRFBx0cMasovJ_WwkWw2p4@Mkf%L_L@MO!AZF4PV-SMSLme&0AtH +zZ2cFF=WA>CpUXbGg5wG(qRy2k(FH)Aie_t6nDKL_KJ6LtSti4quY<#!I1%pTt?G8d +z>2KbWV|GUEkyc@LQadFTuE7y|MO3JDs+uMjCM#e4H5h;GE3AEkU3>FSg3#cu8u)h5 +zq1OIL_+0YU>K``Iz7}7~c{4FE>=q)}Fpb(U@GUw`KWb0a*D*Pm&0B*z_i1o2n}4z{ +zRmflw>P|m%%mfF9II0zT$36?B?z4cowEcH_?R&WO_O_ok%4{zv%uZ1yvw;@wmCWy_ +z!1NSiOdcN!F-(6U#$5F>!>kozOx{Z?GQ(UJ;%k|0T3s{#4w;<=g~|C)q=aG9*H_=j +zeziFtH~arwJHcef!$Oa}j8e=^Pt5u+*{zad9*HV4AH(RNDm=WA +z(B*l$#Z){G4+Ol%Hp9i_DWE6-bEq^%jQQR63}gefi|Oz@F#Yn}TmX)iMf+rsVs48n +zdIYmuh%wJRG0a6F#%$F6zsL;JWS=pX(%DX}zj_GoGr?{-# +z*8^rZEy}x8s4!PV6{Bs@_F!xQlGh040S4s3&Kzh+FxvYLv@K_a~o<^6c5*iIuLazG}N_B9-9r-%3igP +zt#7*fXv*pO{iJ7kN8EwXjPdY(k9wa9?>0N81^S( +zn28v&qaJog-J&z4zc_96zj-GZKeW?wqc)P%52)Lg2H4y +z?f+8S%Iqm99#D$KF8hmJPIcf{?7?5b{HmoM@s7n>L1A*T +zn@4a=Hjo(*=CxhhGG=j-R4`K=E)SBQerK7+pgnQk#;nxpM%7pYvM_u){!j5dy#;TGuIz?ueCN_JnDx|@KzqwIka`b;}m1Ng3ZB>#vVLGbhv&_T2iDTx?CLjKklD?Kkjzd +z{F#2_&-5dIrXMlW)Amexgvre%8xVG}AdgrOUay$`vmkwX +z-Y^u8AwvZ5w*^@8UYo>NSIOg?8gE1;yiCG515veZM`bhnV|*JB35c{dhq!(af$H +zBa_;1A5n*R4K`d*JTF!XDt4{ie*gXib6T7epYSK}6aEB#!k@rTFoC1?zWIqUnZ;~< +z!k?{AFk8cRi+tkQhV!OBoHza9yy*|;O@BCVGMtJX&YKKpyr3pz@@mGsfMC}YgMQN= +z^qUNN%kGCadD+8j9+QigJ-p^I6fb*t&0{Eb4X=3&#mgRE^B9VkJ-p^I6fb*t&682i +ze|Nh$NBo%|@n?R-pZO7g=0})$=JsAPf;pw>&Q2EWVxC9*c^+Y&i?@GAoDn8>8{((@ +zA%4mq;-~x}e##%>rx;?<_fPqK{}g@aWn?yL?Bb^Psb?F{C;jn!(jU(!{qcO#AI~TK +z@qE%B&nFoVH=TRQCowC!46-3&7fbfZXB*-h46)7LAKu`WQJi>h_@jQqAN3plsNe8M +z{f0m4HyAaK;rEg^Fq?`eW6VDL1Z}=wOrziG#xMtKb+PFQJ!x?x%I@LVtU@;X*i&{z +z%+H_6=Abe6dQ9%`Svu@vdyqf6%LAGFTJwSV&B4I?7*ANuX8T0;geS7of;yAAVAuQ! +z3(RL|=Cd=F?%a0u3D4cU45@a*o!QXaVDz8aHV^Kn_j#~wvL6%~k`jDpyQ-v7)cx9_ +zTQ&*Rt#}`}yv}DYGjj3a5N*DPVLtR(kfgW}Ugtxq6FYTf%nM7sjmh^b%!}bf?>8_5 +zhGP7@abYOTQ~T~j1(Ovrzo>v&yiR!?ldICGFnO(I287vZU+}-}U$d__>JCzT{Pi|w +zzg*_Uu=$%uHP|SoCg!1BrY7dGrQXKm0}P|WFje?QM|M8qH(m$Brj(^-eOpirq&0y;-`dK4TPPGyR>0HnV3@9 +z8`e;~W$~PGWS>maF6oHLI&VUL#{8is6kn{!-kzrOa2w_T*eBwh90I0oLV +zQ@TpJ$><0pdbjze^5>H8dC>49`l$dnfbTi{nyP1i)tpV0dozJ|(6m$CmJJod%uVoaM1P +zyaibE#ObC&!kP74^7sGtPd#u|NrJ98{JqcHkQ6UW-ozZY&yne(%+-Rz+_seWfeX0@ +zCCM*hT9h$w@MDrQ7t-S69<%o_8F=_uxV`R}?eJ$Y8R>)MXWm(+K@HPCcV>}HC{=x8 +zPYLrE$FOs@karHA%5_;tFe!W62iJrb>-vV<#RlE7`LrYWy5(~nBT^9UEB`y2xA)JRqp&j&iD +zNQ>7KzEt=3Bqo{rB|3Pwh}#YvsOHaUT~+vxv|Uy9s>S&)kUspUxlUXX2>jOe%R4Q? +z{o<)=sQB6p=HudJ=s`kbNo07&$TniLl`%Z+N<12=#2%>Az}iJR`32Nn35=UvC?{rXGflJI{Z +ziN$YuH(yv!F*_P8)hlzRpyp-%TtO|#JSix5awyksC1r9?7nGm7ydv*vp<0uI=z$|+3X-vwRe^;}#Oyj_I%llze`mkpUKE$N3*$kKz +z&VJHU-PyOfE0_#9+cN$#U#b!bvLDz~t{&yezU249Z+!5T?^|X?raaHQ7>X7#Fm&UE +ztQ&bccMn{vFBCTK5V{o&MX5tO)F+tK_>SaNikRo(R_~VRj?nx$fnR9UFEr{FYB2wH +zCTT63LJf5Q&cyUUKrHEAUSm?X;H;+ZgS@sO>!EWN|C +zSKV2#-HJ+zC3?-Dx!3$!-tQZ&t45KiLL#OjaP0X}ulrHnn;CwT?Q~Hq+QV%-8?R&T +zS!xjT*iw%%PeeU${`r&_le(9dAYR5W& +z$q2s9{2Krt{eT@%mrXW+Nl7XFvIF#hwUN?2El!oY?mhNygxU8#sJAgwQQ=!UxjJpG +zGG?EpDwrFVDr0uriWSV-ivE)r6`O3X0n8RlJ;Cg-)Bq-(F()GCP@%#cvD6dHDN7At +z&RFUR=8~lbFjp=01e4*LKdHm)wKMSqvvwx@hcjlP(WZZh$?)@A7p?X}h{+7(LRy1` +z5R*yBg|sFMAtv*X3u!GDLQJM27t;FJd)a{xF&9PULRtrf5cBwkkk&;Z#Js*Cq}6N} +z;2~yP&E|i&OslI9V%Dyd|E$1Db!rw~Odh0vB7duKnK@@0)cWAg?d%O=G7aW-he=-o +zKlM!q>Xaz^fk*QLo#yYfV4AGw^VtU&#skCd$=<-vJun?!3=D%RVqk{67#Q|c5d*{3 +zmi^l*c@JP_Y&QA^!?jn$z^r;PFidw51H%Pb^bLk%GJ853$U6tcp2+_Bn1SraG0mjL +z&SEAz`|ZYjVPKf-%=6Xi!oV=uMGOr4tcZbO8M4RBJR1zlP-KH)8H#K$EJG0k!!i^x +zFf2n61H&>DF)%Dc5d*_LqZkhi3zRKPIUg!i?ZT9^9}NsF%&vCHnb7>!ntz>nk3LAY +zb--jFyI^z7WZzQ2ZqP}R>6&D78HYZySyJ8=VeyX~!K}*jLNd|toOy@R3=N8onD>s{ +z`i64L2i{>Ks;;Kj?wOd4&fVnb8SRJ6=6hwD|L%RUw()R^Dyn}z1R +zNX!mVCaeK_tdLRT=9*m-CAaEyOi4wjEbc>)e@Om#k>@iPd}}$ +z@8lsd#jJ=5uT!VIJ;It%_K8Y;*PtkJ2UdGi{oAr#_ud{mkn1omal2>c$n92O+UV93 +zb<=bYb5vA#HvA>=w!uI8z`*3*p`U@MF^zq)m=?_4Tc?G@Q)#m$$*8=kqq$SjyY^|BL+sKOFJ9{c+>nwyQ6_kSpqijlw3Ot8W$G +zChQP)M)W=6dxibNG@>6CKO!6zjz#nn;wObu!s&?q_}laGo(NBcXF_+p&E_c}`>#dV +zChQQp`u2C_`VL{IuuJIbS=Vu`FE|rfZ}@Hb!OMsqo^{T9SL`phjgED8{qU?S$hv{! +zntwMQen)=rSZ#3P#XJ&h)cSx8ntyOYZE!d;-)?`(}`2S_d6*`;mC~qlh2=RDSS6ZSY!cu<3j99)O){gX3zu>j^(4Ke!Ol +z!#92~uLriM4R)#x_NWc^tL^rOdAuu=&j&H~wjHgNhrD +z#KVusUlEQ9$AsfTxBk=OCKNXniHDz-e?~YfoEI(#-TF_9TU6XqB>wz+^Zj)pyc8zC +zJ-i>;r>n{bHocPT!S>d?4GtuEa^GAMpXI4rD0^qU{f +z^KJ=ug?mCLeX{a9a{ZccL%1p27VZl7g@?i;;fe5R`N_8v(Yy80QU7W6=*Ow@p9#-} +z7s5-S+uys!T}9%XzCWMOW?_r4RoE%)61w$!#PPynq3!8Gmen>bX +ztO&=16T(=0zx=6iQ0V4!<7093XIyz=_1ENI7j6i*gl@fE@rS}=;n`F4d-CrK4}`>@ +zMB-y{)IU{RtbS`pzE9hPox(1mJHEb;e}B0Lqk<9k}%nc~hP@y)+4U!N9XtFTSj +zF6nvQ+vV>Nc1HB@-SYPcdn0=Ie)&`3U_=i;EdPkG64Aqt$v-Zf +zi0I*` +zCA>!W`?W8HC84|j;2Y#`6gEZl@GbJU3fm%j_zw9yg`M~ +zA>54U55*q|kA)|~Q{kD=U2pgc`7ec65xwR6wU2})p_?DRLHZx*&h^zd!+ +zw+lNW`c(X&a7Z{T91&K8?s(wG8R2Y14?i#ef^adShhLF@Rk#+>!*9sH +zDcp+a;dkWU74Aj!@CWiA3XdXs_!Ie0g=Y~x{Du6N!mEhh@~QTxuq5>Mr}ze8qp&HW +zhi{R;RoE8M_lfTprouttkZ@S&_7A=y|EO>*qKBW5e^NLV(ZkQkKP#Mz=;0USUlcAy +z^zf_luL;*9`hD>S!Xx2vL=S%||C#VSqKChf|4Mir(Zko3^Zis3)(hSBf^U?+N!T3G +z!?()cCTx%B;XCE;5_U)Q@V)Z)3Hu{@_(A!Hgu@X%d`13I;aEfuKOz65a4MpQpOJr7 +zI2X~wFUY?rT#D$o#qS7rg?qw%;epUyZ}=nmkA)`@J^Y#c=faDK9{x)HYjgvV=Q;5u +zVZE>+qK9vizggH4(ZjdN-!ANk=;6EM?-uq%^zeQ1_Y2dA9)3vvVc|$b4?imZm~cFz +zho6*xN;nF{GR;#!h?t&{z(2~ +z;YmafeqKBW8e_pr{(Zesvzam_X=;7Dp-w9^zg^>p9oJQdiZnsFNBv7J^VHP +z*R=nI-u@R~FKiGtM)dH_^0x?EBYOCD`8$N25j}jj{5`_nh#tOQ{!};^(ZdhRKO(F| +z^zdWyj|(RvdiW{%r-d^SJ^Y;f^TLIQ9)3yw72#?`55F$|hHx{Yhu@ZeN4Oi&!|%&~ +zAUurd;g97%5uQf$@aOVh2rnag_-p*HYyS(q{V%>=*dT0-=;52?ZxOae^ziNScL+Np +zdiZYndxX6aJ$%3XsckWS(|Do_GqK7|`|5SJu(ZgTJe<{3*=q>+9`&3vGy8VZ5kiSvb6w!By +z?-uq7`yzVyRQ^HXP(%+uB7a3V8qvd#%ReEUjOgK~<)0DGM)dIW@-GM%BYOB1`B#N& +z5k35d{F}n9h#r1N{$1f-L=S%;|Do_GqK7|`|5SJu(ZgTJe<{3*=q<1Bzt#y$k?+HH +zi0=~i2zw*?lQ;5xe<8dUCU54vyZ_N$Il8So>bs@ui|ENqKgfF$(Ziq0egykPx@^ETM2Hdy){xgT6o8=U<9+z(!~=WVd>2lF;~p*Gn0J99tS-;uY$ +zF}1-3wZXPmb3K@<4Nj>IuBr_ls107J4UX&k>fns_7r3J~*rNRc)_*+jpSvDA;`fCI +z!o!H()g4K9EIbjO3eSY+LbpD3?wZGqC-0^5UkR@x^%{ord1w+g3tNP4e)u-|+l3tw +zJ$#q^-NK%Teop+na6z~zTotYf-To~(x(&5ABl?q1=HtH-){o@vL!q00{8PDqLO3a$ +z5xV+w@t49Y;dMmc`OoJ0yM#T$exaMcB7RgjE}V+!haTtohlL};QK6fETKueVPBRP31i|8xj$AlBY$%x+7O-VN$(Qk|2748cUB6?SMDBV#+UwSK_ +zp9W!*uvzHNkE?5ut~H_`5kD#%7fwXxF6BGx&!GBBYOBF`HzJs +z!c*ay(4DWR#hokeA`*WkzV6f7$HGaWTMzxU;`*gaBl<)<`CHU(jp&=jySg^<9m38? +ze4lu?UxVU@g(H#pRq<=W4dH?CN;vf-pD%ZQHs#-O^p&URx1{fst}CM7cJkLrSBmHp +z@vg33e3P&_65k=-?N_(>K4E_(J~nTq(eV83E6<_uNO&B{e~Z~kmP +z53RyBVY{$H*eP_c59W(J;FR>>s@mXXB;S?zYhh_D?_a&ptv@DyTsR?|is)my*@%8Y +z{E~1*xEj&Bx((^JBl`1yE+5~8@KSgsycX8|^Wpt^*SPvf{DSxu;ks~3xGmfh?hB8E +z$HFt=x$sKpuGh8r(obkzg-ya{VVkgB*d^>1_6hriLqfOSocKlIs>NDcljd@x9}D +zKl_CJ!c;gUtO&=1lfr4?qR`F1C4N`9FFc6oW4hyr9{yDRbKylqAJbh&^ze0`(|QUU +zgzk7_y5@);zE%EqVMjzC({)Gmi{e*=Yr^%2-qmeLw;9oQeLkO;9$~MrPuMR^h3XIPOSmK4 +z6T0!|;;)3)=)RoKm#eQ6-ym!hHbwNu;?IQV!i$K$e{E~1* +zxE|3@d?l|pDV!3{3f=tM;`fC6!h?vu`Kx*UHetK4L+Iw86F)Cp6s`%^g&RUQzW%54 +zdJV!RVXM&94~icVR)nJw{fzio;ev22qQ4M-iC@=EovPgznJ%bR5&J_5Kakah3hul#n)**OTzld{C11)6%GoA +zBl_5Ly1R~d-5+kgt@(U@c7*PHl>XJ+-zaPnHVa+-j`)4yf$%V*zlQ(WyiQ5jAZ!#i +z3Eg_B_(9>2uoBTvik}hA3g;sF74fUWHQ{DNe=Pn?crLt%=;5#NFXZ!3Cv?XPUy{FG +z*c8zZiysw^3CAP)S@HA272#S$AKQ0x|8_nOxBpE#x0;1r!fs)Yuuqu&TX~+tpUd%B +zm@eh*lIq0johtrHcr8qn$L-&W_*LPWa3iAM7k?n6e`gW>i26Gw92ZUs-Tw4555l>B +zJsqQeN5=)Ka%cLcqTj-y81-psuwm08zbXg5x*|n5N<~F7vit+FXr=GCv^K$FTO$8 +zBy5f7cg61s4}~WY{pi1$*B=v33TK3Fe;RbXGzpu9tz1V=K(F{d;k9#}I`U*!`+iTj +zFFX()36F(td@Sxz`fK9;cs_17p1h~hoe9s0a{}Nm<-ZczI*z_ab^C>b!XaVfa^A02 +zp%b3CaU+Tw6^;qVg%iR_;goP%*seOA!XDw^9qT_WU;31MPwPMZ>5ue>d5h&?9^G+v +zMe;E(bDAIKVI-oTmu_8Hk#71a`UUA1g-gN};i`~)qsliX92ZUqCxz~Qd0L${)uI1S +zt23oKvGI{-OL@`FMf$fZ-GOjXy48sOP`WGOnsob5(H}{FEIf7M*A>4Z+=}EoR~+?s +zq>I%@SLf)CBKfbymsav~pkCN492AZSE5Zq(yZ&xIH{R7ZC=c~UpOPP4t8{I`ZYOR^ +z?OEZRa9+3~bo&#_-!47lj^%grbtsPhEj*<@x?bt}g{c#_uC`l`yUbnDjc@#S^2iop +zt8h%{>Zipo3D<>N5q-Oz&F99);^)#Kg=_LgKC59Bk(jb-&gOM`+By9 +z*TUqzdAlTZ*Z1&!x&KIbEIbvu`ch-AuNO858--26W}zGZw73?-qlS?HxY;h1n-I3aZFJuPlhaZ{1_4e{H;9pQdNAJZL0^zHA@=dDB7 +zDeMw<3wwm__?{NmtGK>M{HXXb;ka;8crLsUUJC!;=H3RpuB*Bh-Ih;m#Zio6Od=8` +zD5(JfuA@KOG8ifx#RwyeULwFv-5kl%ktKX2ot$%I%XuzW^fOfDhSnu=q9jhPXx-L; +zDK5Chuh)R@BlH?-UJY@G07G4x7IO*36u)91z?*ZeG4{{YIZ}A<_Ir1KpS{i=d#t(U +zn(Ke^$1s&k#`jFP9P+&1^iZo8_UFh67en|>;SKS0sd+5&mcUD@EpQfgp}6_ +zd0hy*5pF}c9ig@VLg}1GI@Eumbb63Zx%>^{c@E(|gcAs@epA2?Av}!mNEyE69R=@L +z8UA#QucwC)9zl2%;W30K5L*3+pTzT12%kiF8sRKL8-M>xefpCK4SmvxdW3BV +zyAWFWUAK6CH^Lr-g9t63^XiM3Uq6TN62j*>@BTPv{7DJr;$1fJQf1Y{7bgVHfThUdBDcZ5VeL +z9!LMpkoAh;1j?7;Vcav!zRc&F<#*_qFCXHAb^f`v7kM+_A4Yft;ZcOg5Zd@{f9ccd +zM7Z)3{=NobEy6m4s}R;BwDP(jXFI~x;I)?F_kfp0xDmXLGW;BP`w(`5x2+6+0=x$h +zZU=9$4F3RlhY)7L8!yA30q-cnec(-&;j_FBlzG1DlivRI2v;NQL}=}O`M-L8`+xJ{ +z1E+mBgV6Gs?ggaJ@OT+M@hf=lrAL2nvCuu^o%(`jGTit@f6uT3_g3GQzw^9Sglz~r +z5n4XwoP|7w4d638j{Al5CvVjm&t%wzdz(J-19;BxEbbZBe96mWIEed&^s&!v`WGPQ +zS%l9ayoB%y!kPceOFD}1Btk3Crbj)`mf;gW@b^9@!!x+I@v8=mrfXc6v*5kFJrIq}pv#!TjL5O@}05#c_B6A1SsOvVlZ +z%3b|*Y5ByvpYhKb*3FjY6QBN?f6j35>!tbUzUlEpyyr8V#y!IZ*puNb^3Sm5AAEd+{ +zfIS$V$34T2fAaDf&fuQm(P#a0TVBK~|Jgq$iy`ri|KbsbE5GCK8Fu5I;eOmRY`^IF +z47cN+;eOmRtog3zGtAe_n;K8sSQWgU^+Y|GbG`2Yv&>3CdX@ +zehNIsugCq&0`Zxz!_b3a%fEVksWn5JfAS82&oK3a(lNS$A4PZ!;fXSQ%Bi{Jj +zd#exe@gI6V!|H$Y_Y4o=eolPgwLkKFhN;W`p5cLi_xB8|e(dk9JmS@O&aeje43FTR +zVe1tykKtw9Gd%JW|D55rpZa@-wLdGZ57Ba=)xR9?e-=(XyUXZH{1l!utoaBYYB} +zRiY;4vSk@{e8R`Nt8SMEER1%dcPJ`JD*65pG9l`9~`~{}{p(2%ke}`5o7I +z{vm`j2oEDXg77Fp8~<707ZE;(@KPCms>-KViLe^sAVMqu9PnomUMBBaFURuB@m7}M +z6R*MZI)q(i_|w1-Av}!mLK!~sOL(4I?)9!lX!U13eG>JR;YRS;uF8ev9eRO$oBjpF +zdlunEgqILrMtB8b@FJg|W7Vb0<5!i}4LLJqJBM6To>@34Sa-G-fD8ds6FCv^? +zf%15<4{H#%BDD4)|0Lo)|0~94xmq-9KenC_?|+GZ +zZu3Wc5YKIV;@L9KE#Jy#yeG?~|4UqqN8T*>3@_rI;pH;=P!2;YpYgU|@9n|x815I! +zkCn%GPa;0U^JU}_zk=rsSKZ+CVYm_Z40~|Tu!wu+lcCj*yh-pG9>G1sQ@Ce%7WWLF +z#XZ9-xMx^f%(w0 +z?iu#rp5X-U8J@)bLi&?;9(;z+zQFk8H7xP^GVI4a!yN8yeO*XD##^=2%V#)?dxmwD +z{yD?dxM!HfJ;MXIUnqU@PJqww{0odvUdz>9KZc#SXSfgd3{T>IA^pg^1U|!6%U~~r +z+f3MUjel;-!`_qE4nD)~GVvGE*UJA@@0spYne-Qu_aCjFO`m#Bzd(J-n*rbITP1+@ +zv5SI=eYaG-ELaHw`(xfSWPIK;{Qn!Th64X@_1TBY?ex+ewSu*UMC>4ZJ7OP!o2Xs;D@3?x}X#Qgvgz +zRLV!FFB9+mG^j?BYoq+r^j2TxBeax>H@S=v+ppQgpAuKgMdSA@@e!}cy|nodzjyb +z$E%)LCi=ENSUI)iV5(wDa`|*vUu`*Q`JI)aX*<%>d%cL~46gZBKCc(jK9s*7au%xZ +zlz;LC@~J2FvHD*&`Y*(%oLc-Kzw&BtV2hJ)(_K}D-&O|S4&2J2{2Khw`l0sBf!_rj +z^{D;Yn|oaSpx&oUdM${59{6+^zwPnrCziYZt!ipnMZ9e&h4G5Zyd7r3c&u-mw7zXV +zn0j}jzO@Ta^<8<5kN12Suj}!ZPplAqJ07l_Uh-h|)bfK>4=sBnRWTs(zxwp1*=II= +zEv&Us`qfolPJbvTk$(HZ)Q+d)x-v<@Y>-xXV(*Gs;X=@LyZ#7p3!3^T35TE#A;2KXa)l2!ufY&J~S7ethp0>A2PJ3<;e4;JRcv$HuwMrTB+lAm8fOBI!0< +z69la*e0nEC{Sxg~`i+Xtc*mjn*Lb{Cu3lQsieHAjZimL}gKu|M50!U9;&r^(>p^+M +zyMe2Gy;jRV<&OiO+ivb!=Ipe|D{0eHIrU6Le&^($UYo=5ek82l$~%R0COs|2yFbCh +z;|1k)tn~SOq4HiRZ=rmgMY`LeXw*&zTt2Lw)c#%9GFQp@s^Y6(GPk_q{7OV!4LPmg +zxA|zX_FD0fQvm!@ddy0CVJRCG(Fj;E{j +zLgV${;M1uK<8huD^?S8z_Y+nueNZU +zRehDmi{(@*om0Y_fjo_;*J}Bv_;KKe92)j3bH+c_OZi|Y4sVg?D*puJOoE?SXBC&B5^lO?6MmJG_p9PezwIV(hySSbSw5$c +z&i+#QoT?aSbNf~EQI5Y6_U)|o`I{)6ZZ4b$h>59#QmtIpOV*z=kjwIq`b(eCLh)x8 +zh|hGMeSy47FOc^kbAv0Elc>Uw)DP9L$d3urGQik7VaI2rj +z-$r5byIO_HrS^*Bnh(8DPdcu>*^d`Ce!r(Vy)=F&(m!W#+yGo&ZS?4rqrrZ5;AMu2Oa>1@{U&qC-*!1+)SVYFF +zdWDZS<6_0@H}`|uo{lHTct;WMSQwAvdAry5-HGHvJ-5Hor*}Av$MzJZw>hTgO5v$} +z0vJZiPcK`J${V~vaPaDsB$wJ(aegQDf`W3z+VR2ELlrLZik?`(c$#ZZPVTF`-u1wv +z_T&MrN6O>(R?mgJ*gCtSC#;9$^LwmQCHZY3za8@Vz1H*KZ}I(+)YGj8Q@W$_?qyGh +z_VZ&)w3#PyS|Eqtc^&uJ5_`n-lzrAu#L7UEVmy8ic3T*a<-SSFz2c9{#Oqk&BOFm- +zazSsYpPT)@<8F!gbVu0Kv|mwsUP3(0zg}1mNk8W2v($^_-!$@}_dHk+!IeE-KzqhMnuh);|fcCxk=+*HKh3$afX=)O(GtSPrDiEGD^i#JLC +z^IN_gkB8}TpQgeW5b%`}DxcraI}E%NIKQLUDtk40wJ+~^yyl7PC4Zd{uAEwNu==6p +z4_8eud!+KwC6A>R{~{&o`9;&$zqaWcu@$7+N7LbV_@2W%g(!b+-MRSNi%QQ(Z9Y}+ +zv$a9M@6b)Da&oD?73cTpdK8ok?N!FHXnmtRey5K0N$Y{)hj)4Vb-CE4yzULV!_xi# +z&9cvf_~VGL`VI=t?-+F(9Jk^8iF|(7=$zs6`$nw>=XZ|k49@Qz?Ke2Td!%;Li|O+F +zN3$LdaefDh^E~qTJtT|syGU6hhu=r)FgU-HWbMZ9B^@z*em9BbM}7GHqz1$1ca(C# +zTO`zS;rEoH`BJQXO1s;)K)cg)d*sb3{YJ&}t2q5fS)6{PHpcW+KK)5iPs*oXsW!t8 +z{Yx2~ex_&#t=}r2{-#cXzs2wGN&BeS8V-K)jOo%J73+i67nMW5RBA`PqVAedWEA&|95I}`|_F8!W5q-H +z#kajU-l?4Ty~?S@o0eaYqkGhk{;&GI_z8a7u+N{&s4aD1Yv$&CmELPrKh0 +z_Wh{lgMPkLu3k|;>Lbve^#9f6X>Pu&@#zQb9PrqD7w_F8|Vfe>4$RKo-8NIqd$Tg#3N3> +z1hj*;H%*8B3A8=vg>ld4BQ~B;4*eG#_jFgERSx|aJa2INGw3lm{TkF7oc;|C18FLMkS1b~H#0rY~(jUTh)Z0$TqhEyQQO}qM +ze_<8kZG?XG!*Dv;-bB4k52sv1>vZdhzkWtnGf_ilxzcaL3B=zL&g*2pR`Gv^w$k>a +z`qQri%P(3VyLC%!|G7UjL(JSI=Nq#xmwDAOufS#KQK}sT()ZF20PCmPL2>#6IHzk| +zxgx!`X#UY%oYTpf7~z?)3fOeizJnr<{sT1MdPVyf+gx_ET$INvg&&MhybV7PU&`6< +zv)TBnhh8o6Pvz480Q+~;V?QsK@myb)$L*@+sqyHiV4n(;D^dURQ5>dEKL$+S+C%d{ +z{z};!`l2tGNhdY5ujFUb!AiHaGPo={05EsKtaed3^lQ))%5n30k#mpBj^;yo^mnj7 +z^{2BO?6MeVEc=yyT$rI)p@+GSQIe_dz1ecO~IS5#koeIt*48QL7HJdgewIzk@p +z=j}{+^y9$x6xA1ho`pP!apSZ8j(ACV1g2w22`c +zYd5uL^{WwCf}{8u*)2H_)P6$w^aC-7erD5hcOFI3ZRc5-EqW-W;?ZRHRVw`hB9DF} +zPKD{S-bp>JxGQXMYDeYMuY~Kj1dH@7z5lND?~25uzloMmZ?hjD4IQC;8p(%&hfPdGuS6axC9Y6sO+`wYOeTIZ6IH!|b_rtMcjBf<+vaf2T{2 +z`JulH&c_pSrGMMO2JVxMyaN0Z0Ab(CH5KH +z-Bf(Puj{UWAm7$^l{X>s=(nRjoL^C1Y=3>aVsVAev!p)Cak8-7H9q}(oC)(0v(MC$ +z4mppq#dH*r%>%n-~9=NaL*E!L~j@wH0n#2yaX?dv}`VrxLESf)S +zc|{XjtB01~0f|pP8&Q3C%{ouGlIrRTA9m-)ll78ad +z(RkX4bm<@DNLYTk$7`RsQQF<+gDW3e@o@F@@&{|CuJ3rH>d|G7RUTSW@z-H}ip{G1 +zIIDWmzepR>*L*5YKO@@j=%u0J^fz+Sq49iU-Bi()7|^x;YdrcTnLxY_-=5sO!Mz`P +zXo;*%rz`Fa)%6vb@#)88Uzl#G@dtC~XqxK!KTV&0PwK+>><9e*xz-!y(H{zqUrM<$ +zolQExnM>4n`e9+a +zi0ZrVS7|r;XNmIT+Pls_bzh@XH#D@(SG+4}_$o<1zMft!_Z>|#UwGD6yzQZW2NpfP +z>WSN=0&aS+u0O2!T91^^s}es{FU9HiB^sA!7Cm17#4A+J!McZT>3DF})NK#fR_uR9 +zb}7vIOXJf|%q-+?S{~P* +zOMf>w9uezbD+c|9a?>@w2lWwcy->Y-L>T?b)IxqVU-Hw@PVne&=0Nx!AS|~n57$gz +z|6twJEeC5Ky77^fkFI#E`q1*le-RCc@eYjXBDtV#PP)EaOX*v^R{FDl_4XSKUC^f~i+EyoM0C;a1_597z` +zgY-B0YB}EDFdqHolpKF#KB=uQ9#8F}>Cvyw1Etavtdw0Q*NL9+w=)sOi`jj5l$PqJ +zeEQ?L81gx9!h8OT9nt${;dCM%{q{T%&bK&DZs9noL!^$Ck5w*y^`d3pKtCfBFR5oP +z%X(B+%SZK~-=BS<9x=U(k={1nD}_I?UhMH>U*EKD=|!CWfhs-h(o;VD1RVe#&70l4 +zAS@HrPx`>!K}Rjb@aLM}I`e%f+kM97Pfi#^TQl>w^?Sv +zPk&C^!~Q=S_jSnc)WLuA!?lb50R2AZayI={B5zjGr~fCGAI2R?-z#L}sXeM+C-oox +zofwa}kLByF{w7X8QFR~?r@yEcgX1=+#}BKA@~1@)`j0vS-lpX<6_0m3vDwY1+NU;E +zY@r1`!OB@J@CA`WKT~?ISE9d&s@0r+S@TgRg+o77w1-Vcc^$%|{~xB)4V->}#^nsS +zUNRr6c)b0IO)|mSd~oAKuYIs>>J6J8Zk=AY`LTvWYaVHNv}y75lCY)3M|K}yNY`3mH>RTPxG{~nvqMnc+o9_=q{W|%e1=~Y@*d7Pj=Jb)}_lNwL +z{Hf((`>2xV@%gs4{}Zp5@e+QF+Qatm;)_{3xbNow7VOcA#mf>?C9jQ^o64adAGUwW +zr$3);D4+WQn{|EQ&v>-!3PJjpu)LxT0nMk%ryrn_{YbQ(=j@_<`U%qdqgP`6y#1;0 +zZ+fgwAUYfCWxIZi5pcpX;g$zY%2k^h0!VF5gcqfm{95-nrk9 +zzn6f&AKIHZq6HSG-y-6xAcy?OuGBl)x6|}^vB^a9@AC8Dnl_pLL(gpx5cQusd<9xl +z*gIV8-4U!Q6!ShDfrC?3p==qe8Pu +zrVp+CzEmdug{wWYt1TJdmuiGvCqI)l#6N4;;^TikqPkyJf4z_Tu84e~%g3+#1CPB# +zf)7g5VEQ$nYAKgW|Jb*D{99#?9=~k*@n`n;VplTkPot-cRb%#(5iEL$ChY$bxVGuJ +zDK8GBjj^9e@TE6KKNN#S`qCgk|B}STD(E+oxLPOd*~3SR17Ej806!K7zRu3Yb(S&r +zS{z`qZ5}NSmK((1E)HUU*cW3gww)55Ee^DH&Ak=}E9QV|-Bj?yU)l#gr}{Kmj;eVn +z{tZsR-15Cq@QPTu(;~M6x97QJN#ywUyw(=r_Po|T!0mahcLBHOvi1YF=dvCKZqH?X +z47fd)^+n+JT-HV4_FUFaf!lLe`e(grAA9af|K3$`dw%L2!0kCGZ~s)l^G%YRyL>sW +z2r7S#h!6F+^L*t<|AmY-C4ALr%6#AEW5CZEochr3A?1AD@l(O!(2t>i;$PdRf@21! +z9QsS79OCqgXmQ)Sk*~RqU*Cj2tp@jQ&Qn2;!M*$LRItt9-p*GCXHCE1@sym?Nv7-Z +zs$lhPacx9vX+q`8B^90gmoc^JRv)pHmAGl+H1gjI`NZ+(M9@DK%ozTI;1j>qXE)@Z +zHvA8PPdurAD!5?y9|xa!QlAw;t2Fue^=aYH*Kg487UQt~(C?PT=|{`r^p|CE`oFR` +z{aIO@eyc1_zf~5e-ztmKKb6JlkILfoM`dyPo3c3lNm-o!p)5}SPsCZ@u9))u63UnO +zEr>vVO*Lz*fA9_PiNDP7gX@y~?}AU<^6L!$$KVsMO~_vnTu6!!u9EsUZ+(LwD2NGI +z-{>F8;`9eaoOWn4dajUkwVxqQwaD)<{F}fh{%eVR$+&FzuL7U=OAWtf1yl47)`L&n +z+O38i8|2(6{Q2xgzgD0J?+|{4#30VpX;1pQBA+<@U0Iy|tt?J|Ru-rKDvQ%!mBnY^ +zZ_48ILq(kB)oScXysZpAQ3gL{@ZBgE;+_uCv)C)mG0xzO(wBhb$DZ)I`%u_EsC +zwKS;uBbK0l@_wghg!3u+)rS8l_{3Sg$geT{KLww7lAj8$yqGC^eNH%jgwsqcm&%n% +z{@;R6T-SSgkza54=fEef`>=X>{)%A6|L~yv|83#V*IwxFixF5Z^xH+8`g9n5E2HiU^{+3ZKXJ}mJ%2@T+UUP-0sZNJjOkJz`Vq4@{d^H;xeUHU5{g}~ +zms=edh;zq;{BgtI0zPriV?C5{;fADq-A+{b#FPEW(xA1B-H6+AZ)HIt5B(y4zH+C3 +zGG>`}qaQNj%M4%)IR +z#FPEu(%^)V{~gFDo|G@^cVnN+3)qML*qATchyK_sPXB7enXl6(U$js42StI{wOF=d +zwSOa?tmjLE8pGGuW6CFP`E`b03qJ8=eUo-)_^$+?xRu{#`1-m{^&#GcyfMEA4FC1u +z6SwlG4Zjn7;z|Ar@k<&rru@7|`193&`mJLumM{I*5%>D92nN{^;z4Es`Se#uIh0R- +zbrz>zI*ZfaoWuEsb$lewZkPF@Uo-OG3qEnnr++i@ +zDTn^dEKdJr#GinC;#@CK4*i&sPn>?th_jv6y)@Y#KPB>YoFcC8fAk{1)$l(LK5^T= +zW=ws4%JG*5#FO%;O2QObhKK;c}4$GZ>;Ve$Sa2BUuIE&LS9C6z1 +zgt6Ot*o}Cyd}Y38^7R`FJ>`FD@Z +z?@~Ma(*l0)D%P27~_<^dX*{pR5SBvBN+DpIbm5`oE(-UlzXhx5TgD0rlxJ`mjFGFCOKP +z-(7}Je|h9zK)S?vexLH`Cy)H^f=`@(FGxQ9;*tMv;1fTA2jtTq9{JCMPkhGk=?9Pe +zC9?2zb~FC*D4+iC$X^LQ@xw+w{oavJd-fQ6-X?OipCoSA`#HmJ0H3&*8;vg$hW`fe +ziCg&x48Ie6;+!5)|LWRgJ--Kh;+9`$_=DgR=P*F|4TirPeB#Oc%3#%#)Q57~j2w^4 +ze9yG6{UU$9_D;WqEXVf?U+W3+I#cfSS4jR7;1j=K_*L*vNd6}&-}o(LJ*1yP@}B{p +z_&Fn=ehSI|0r@zkU{{A3uxJZ=c2K +zm(Sw#zh`m!+p{?R>k(%;PMUJuB;}?381dx$j-^4Z8OOUEKf>9Hy?pJZqyvv#O!tUM +zw-4zOx9{~%8UB6X6Sw`(S;PNN;1f^IV`X2_6jvaSK!Q#`_fb#4Z1<;eQ@{;ylSj`(HHtr>H-0cCX|IFH7q4kKhx(8D&g< +zo#FogeByP6-)8tf2cLLS{?&4BBw4Snk*c;Ri11|j%D8Og*E)WL-)8igH2hbCPdsU# +zrNJswe_9A7yMd+9?n;1jGpX2>DQ8c;`D22ar&nu?)6+6 +z)SG@WmI(agFfjYe)2(3VOKz +zK)SIq)#CJ*YH|8YwK)ByTAcn; +ziTiR-1(o%znf?j!$&$GA{~XXD=*P;iSMt9AK5_O-v=9BjlK)TO +z6F+I>(+@29dQ@H8De+mur+--TUkpC+7Q?5XSn?aeCrSI?)#CJvYH|8OwK)BtTAcn(iHrH=O3B~blxjyygGw_lsKZtrM~JhZ^m48WYI>4# +z?sEJHZ*%E!zI|1&&G1LSC!XY|f=ea!yegPBavp#j;z>D6g9($bk04*fljCnHXn1up +zU#A>D!k`n*Ks%s1}S|0n3~TW{KaiFe@v+Y$YOl23gumefbqcLx6r +zm#+w44MCJszdD((w}Man(FA`*Q2h#O;=|uuAiwlO%2>=7{exPZ{y!~FKcB>@|7oLt +z2Kp1X^UO(8?ghtR8W2ye3$6-gO*{G>$B%GYkNR}2A>uXt0Q4bl-+$!{|1t21S0lq- +zzKqw#{vQ$keD#ffPieRRDtxVP#3%89mU@^De_*EEP%n8RGWbdzax~2R`xS +zxGB0fCG~$9_{3{rAm+Eu@P8eA;=Uem-kSgCvM+g +zRJSDMXTc}V;~-xCir|3B@BItpmws)TFXoqiYKc?-dZW+pLm%R{p0pYM!{8H7j*lyX +znl(((hkv?&{`7~-Sf3QW_J_nd95P?@i%ULn`oXn0{oY!f{%tKz|F#yVA6tvlkFCY& +zuh!!9J8N_T&BD3 +zqWlZ%lli*I@#XImfhW%k3AZ)Le--$|lkH2+fgAoN@QEkoUoC$(UD|G~Mot&x5U(@& +z+GhCof=}Fz7c*-h06|vx^Nknuugh3$*YuZbar(ivIQ`vPoc?VsPJgx*r{7wO(@(9% +z_rou(#p!?6;`BdDob@MX>`eTC!N*~L;xfH)7x^=W|32`EC&!(X_y$bY!zu8IC)W$9 +zpx*HR7<}T%`XGOAX!ys#C!W+_&e1i|GCur_@aL;P^uxBfJM40p&MrOxp9ikWW0>&&a-33pMoNj~B=<{rEB#^GmJ~`zOFXH+?AICoHt>lj>+_0W!sK^A`19qLeu|kd=9hkmElxkf#A%1NHze!TZsN7pSWE|Oc?$L!6%-SzaqF~>@c&C9pDF<`T7gtyY>FR`}M*;JfMB(2bui8 +z0iXCq!>9ja@@cmjlP}7re`Cu(X85zP197{r*w&UTmwy4DxSc0-89vt$#BKk4$?SVv +zhJ506$iOn`sI{I~zs>6t;_ms1U|M`S$FEz3KVQA2|7OPdb>VAy5ofMxPx^Hx{|@kp +zb03L(`g+PVaC;ujVEnni^F44Mv!tm8)mGX%v+pqk6hv6>=pZJ{l +z^BY;>UeQ|cr-9q^RHqF8)!-ACTX!+PvxeUaKJjEfEbrqC-^-D8^m+(Juvz5HSI_AW +znz1OSI_48wpWU^99QuW(oO^{|At@8j;sNV3{X&yZJFMKCv@`V?d@Y$iyl(-0=qH-7 +zDCeS)bN>Qz=r@{js6YKfTb%x(i8I~0*AemI!~*HkPc&mu&JiQ$_ZN^uKhajsB_rp- +z1?13Qw3XAak%$iuEg*;fq#5hag|GF5_-Z_$o#|(q{J#R9IQ>t1`^dO&>JR16?=$6) +zU;Uo0zs=3aEB1s8gfcCK&}hPgQN +z`y~8;GnE%PekwR;aPnu%;1><<^{EQZ@I@06c&W&ruUsx0In-y{_2OVEc2S@02EPOP +zA2B%fSzQ+sB0sm5(Pzxbnd{f|-N4y?DD4Bl*)I@(0yy_EiGKok9RY-&1zvCPGlJ{* +zcntY+G~v(=#2M{hz<&~arcXX`@_!EgdGKrTfPCWQ-{fA{$$o;dbG_iI=M~^~94AgW +zZvcPQ4ZeJ>p2W$22lyMoUuE)=m<&up`v5GVg9;2#0smM?MgZ$1xRJwt`;5{5T9IE$|JMqx^=Cr<>DBME8}^gL0S8@9&y@JxP3HHvfbTc>F5pKD +zPQSi02Hy?-X@kE9_;G_j0DRWqw2##@v=28POn#p=avm4?rR;VF=>}a%J2+Tn82sDd +zPZ<3Bl=HtO{951>27e{_cPIHx|`((&pl;jsE +z-^lq-z-JBqDCN98Dd*3CZ!`FRqkMy(rJQ#p<$Q;HgZ~KltihMN1(C>5M`W?p$F!hZ%ljwq+2aG+_!1o(`7w~C=vz~AKHA?p3e&Ls@&&MF=>!x4* +z8{p3y{BywT-;%V?mw{&t{x#q`4SoUmu)%)-{0W0U5ByIJo^lI;RIsu$sn2!5?=$#q +z!2jW`N&af!R}8)m_$_8%{Z7HPd}m;P&U4uh5N9de4gL}EJMn;g;^Yq@-D9SF$ALd* +z@JYzO4BS<35k~pMDW7;%MbZxc1#%{Vr?8wLzs2y0Z!d#W4%7Vv +z$^Rno27`YC_(p?&ANZibsVCE=e72W;roAkZ4e(O!g>nv*k$>3WlwZ4wDf;jgW#s>_ +zHt%JAkC}WCf3^%>c@<06=a>A|W$>Od_=Lf?irutiP8gha-frytn`P`weNGxV?}q#* +z4gMbBrwvXy=M7GM&KrI9FQCt}M$X5O?(+u!H1J?aX*)NR!TSwPJ!`pf>x(P+$^v@k +zj2zlw)zZ@X%$C9HDogWMm%+0Jr~dnl{{Oy!{s)X4>VLxEl>fYuf2%C~OZ5+TxDA0+ +zFl@$)w*mj(4bF7Wn{d!BE8w>o{Jh{gzHbA*5BgIM +zapvwjkaO0^c@FqFgFg>EYw!xUAuRoy!TtAIWxvtjH-JBD@LPdjHu!4bR}8)$_{wXN +zc6%f68iUggEoJa_gR?#yGWFptB7eU6&~4-tp-2;O_-~z~I!U)BIi1e_lYJ +zDI-V(ungq^su-vEr5ODrIIOQJ)PJbHYp9IeHz5KhUF9GNGfN0MP!0E3WuUmtk2!5UT +z|6%>7J(t&c`*42S;l06z$vf2W^?K7R~cdmFuS?tl3fah=aE&;RcO{#D@oyNPYU +zF9E0jRjw +zX^`JBJmed0upfNRqp1HM0;fOo)sS-xILEJQ;GYG~`A-}0(}GuPA7H+#_;v7kj)nE- +z+k$KRJ@OacJ`<4hWAOQ1E!L|l*_Twi(J!%^9!Q)z;GDP9ZY_dq{p5E#SPC8B({C;1 +zzXLeGKXnrNybCzj3)KJpzKLecS=T8CuJK+3I&@}M> +z0i6C`vcUB_XPRGr$AtNPk*wRRrAKFd06kbGxbo@8cpMMj0G#8gberz#bh!AZ`g1Rt +z@_$=!Ef=mkR)IeNoae?5EcOrX1J1uwZUcV;IL{}X0scpV>$t%8=}h;-f>)RL{^kk6 +zwIAc(xv+ou9OTo_&pF8d66ABUPQ*PZgDL=Fv>Gz`t_(6wDe~!OfVY+|j*P#1f`aR(EQzWcIaFaQav22YwkizqiGFEtPen+Kqo# +zML9PC=ijHyLeA~L`FFUhfp<_&%IAxIbngL9|B&Ny?m@5nf%EUtSWg}U&hOkk>BR*f +z1I}{--Cj)aS;4h_^1DT}&p!yR{agJ96J-@XrC~xw2N^XMpp2j+FC{!0B(C_4dbttNvU^R6@=&SwHAFd(5oUZxvkg +z#qTAt{=C}pm(2MN?*{Psy*Ad*ZNTX_tQ+aR3pm%;Ex>xsHr49H7 +z;PeBt5BMFxc@ER}26A2qIQ`49T?_!{_ccU4cNKy2`xngD2Z7ViHtWwv1lRtj4eO&G +z$T=x^wa)X+I`In*mwAGjzg=+n4}W>d{2k)=1$X@h_LpiP|7XDYcQ+3Jzy8&p&vRLW +z!0QFq`oME^w9o6orymC5cM9(2)#iQiHo-N&7yisMSzfy!hyD}Vk?#G#`F%9n^B{13 +z$0Q5>G2lGs#`^zh;Qa0+@uz_E?|HXD&UbF#D6Y0Oz?urkerI^L3P;7hLBLJpbPTefELR@6s|~9{|q32dDlY0?zNJOhV45 +zDF^2um+S=a{lMvui1qD|;Mx!H`;7a*KPkA@{|oXjeti{k=y!$o`7Ut2e`LM= +z8E}5DX9B`*k$z3>!0!!_e+O{-t6Yilx(7JF4_ga4!@%jUgY(bd5nTJFW9WyOi{AtP +z5dMyj`b+`m`@TBJKPAyo@#l`4PlM0z+)aZ2EO36u@Fei> +z0jJ;BDd0Z>&i4f^z*Dz-d(v+_%jH(!e4kYX{_Dv9t~YQk?A$51)(3v~ljSl9KEE5t +z`tu&jpY;O9A!iym{ZvrSr-0M1DfRp!aDK0l?cySE`bDXip;E7(0;fNUHit@C$pEDF +zir+h9ej9+(|2*4Ehv2$yrJsQw$hlW=t^X6|Jl=@ItUDRZhsQ%*-G$tf=|D-M}UtDuJwoCpREJ_hv3tn0QGqsIQ{EZgZ~lW{JX7M;C~66 +zem)N`^AA1?oPN4af&Ub6`bBvF_+{Yq8@wO*k|u9A`gb}6{3hW14g$;fb-?*O2-@MT +z!1-OmQ;@S$@ao`)zpO(&037_D;M!l!n0@tWhev*TClKLJog5Y7*B6xYe+aJj=XaJn +z@Zc+u-->-C{qCt=-x6Hg3;hX8b#m8FfYTpiJMiVrp3m<(odfZOUj+pLmgHQj=vyi_BIQ;~!2L3_vvA&o9{$b$!ZWsH3F91KW$QJLT`X>i(%@2?kJ +z^Bd?KQ7+1PyWqM{er!pyy$nE3+s7dp_Q^vI{RL&6G-++Xc|NBO_(Q-~R{DC?0sK?I +zd46LR@V^C4zfbMJ|3z>&zwJuu`7`k8f0+IA_3M0o=|A}t`jwXhr+>~K$Zr?itwYWG +z*0+Jr@1@p(-{<(UdC?2|051xz{nc66zwTQ9;C+xo|4~Pv&xe5XTo&!{*TDIAaLm`| +zfz!XlG}8S?;3r{cj)Ok}ejMwamEfn=`~23Jb@vT|YdtA0^9s&@zZN*ZQ#lFzt-$H8 +zauE5t7xK?yd;~qX4}AW;Eyu5M;FVW<0mR=AoPK+1Am~HD`CV7`GoJy@zmKMz{|=nz +z9#=!omw}&0yQbZ~4V->ibKqA9LHiT>F+KqNI>FU${4Vo$;5UI!|I!n{UkyILLqvVH +z0_XP%nXh|+(+|c2nD5;uxSNl;whiGDd;om<6Jxp`1|*zW!rIL~#o +zf&T;G{QffaeDMZv2l`K&2LE>8JxhG~UID%dIKOk$1N%pG{UX6{1 +ze&8PlPXEv6Ug95|1kUe9O@aR{!F3$r--FZuzXU%2PB{zv2e0+*{fL>LR0*#2f!~2; +zeF$>HW9flCYx;s!{Xt=@kjsqp>&#|;?Qs=pWfY@9m{xdtUr_O-5d0c +zjtmU#9Ls0Yg`N3YOR?!(dDnS6ezKa<{* +zA1Y?j+05=tR-<~wMU!m0Q0&bY*9=L{)-(kDn!jF2c8*5PL4R+tH%vUH>slYHuxF^) +zH<&Jtrbja4MXy|p)fl+c`UZB!z@}i$?K{SXvi-N`cQrR}*l>G)X2;mh+jnG}8*k5L +zdyDD8Oja^hSTh>*4QBeBCHorEjp;%@Gmy@V6f^mf55|Xz!C>!5e^!jryS^#>E#(;W +zWedghp5FZMj?vMg$mkF7qnO_t>=_UvjgIDAmZZqbtEW1u2Kl|Y(V>x|Xt;BzPs}zv +zJUSu~>@R(j9hOq{%CD;{BC_q +z{H~=nez&dxDbsNA#G9Jd#kfr}yNwiUYDqj3n>qWtY)B67xci;mcXX^ta2nUg<2NUy +zHMa)&(Y{@MgG0GAWjKK$I-DDlRw1>eZ&VsfZnO{yYiwD!KIrQkQZtGP$K_u^N;*B% +zFZY6{ck~uA_*uyI?#`r#285G~NoZ_|8L6?cWkdX#43n<0`bHctpT?%fcsw=OXs!_K +z%#396Qo6}lwj0=)8ybxZ+t3;_$%YLv+ij2{3=NSP@5|(hL(=pma)=f(ecFjg&5{N@ +zmMdxpFqR9(q^*7zc+Dsa!(gDKC$d1*+R>5%MhJUKVICzBr?7zp^oGqq#YK2%b0TITdu +zl0))o5FR;E`+Blk&ntyL$=@49u(B3b)WXLNa{ +z1>=UTzO1xLsn0TAjAgTKLY|M=nP$L{y#u``c +z*GQEtu4(i=zppV~mLJ*Y;4)N?4QE_BJ4E7;3?ot}?{k2T!EuFxK9{K0cB-hgKFoFV +zI@!DvjvH~(Zlvjz0Y64)SsOE1b7Nzy(`a7X&?MUVVJ}^fo-Q6w`ubQh@ft7jVujM& +zB2_M8HoA(10jYUyGTw$*F*LWdip^Z_ER`I#j0sxX5?7$5b$wJaVPW+a)sE6cbXFwg +zxun7ivhoo=nFKVubWzONIb26dO+8TS(JMN#f +zgirbhhSEAIb^7^->*e7{8Xbt%cackesCaA=*SIdo-y2K_~8i#k?h +zbdn}jzB%2W->tHwLmTKF%SxtQtq8KY1)sK*i%TtiOJBTD`1S59x%xFNB1%b@YI|PA3ldDSe>8r4`rkq&h_pX +z$_^Fx`pg#dLLBJbT9FS$_g^b +z^yYUK)-*M5XbPhF!SK%EqSiqvuR>owoyj(*2lAsbm<~rZzHyyQ5hRMtyF{`ZSPEVz +zZF)Luhm@#|G_7A7#cyho9wGiL)&a;|Nvt|Hq6;GodLgs1xka9dVi?V&Ar<@G9cL+t +zdr5*!DN#p^rP?g>PMN(siVm7a^*$YGhg{`yIr1~|KwveEGcIC8G8;Fv#QI>FJ;Z0W +z&G8|vsd;VO0?kc{c+%Co@{v|3MGudJgIdOKa#yRG1pnUuGPyfAt^RVm*PgITpGSc +z6^i*aP3zXhhMT6A*0_mUTI18I7OBBb@i|SRMYc#I1zXm}m2YWG-o@q^(xuBpO`8ZS +zR!m3>Y&KHRo<}Q3JPBF9_=tWEYKyR0-Z4e8n#F!QWGKt;Ra@^8d4rj}ECv&$-qaY+ +zgS4HPfTos4Sy>b_nSP0jC1WJMF|jmj+>nSV!#85WYPfTq2Y$<*K%+DRt{t!xj-{`C +zN0eSmgK8SKISMKEmp}((Ek*_0>>X^Kka0^RQgdUnrP7<12hy^#8SOm^V>|K^ +zO9d51yiB*d5bWCR?}EY1cvG*mfgwM&8h7g!9R{`DqprCwQlH4w-j9(|JhI4@g^Da- +zVp05W9prY$cPkoXAc=C@Al;ygqr6;<*SKN*20x(b(0CH>`rff +z`_?<$ZPz>RO1HmrYx<72-F0UY=zRO#-FGt1o6_xXe`}W`yshi*^xbd1=T4o#BMq6R +z6to(o`}=xjH?7o@!f-ASZ9?XV){e}u%(rDc8I<}PP=>pS$#&bDz9Pm@`6&}&U8C9dkQ6B_7GlzmT9xA0Sw|e@t{Mza7U!*EhM+^Lbw16z0U_Irb#mB+V%^kdc-a +zrW<=axF>w9n~kt$jG#6v0qbnaEfeAoOIS%Hm9&!LWvnER5>`^`3$v284Yy}8ENif0 +zZ{IF4R)~$rW`-2A!wW(8JyP4=zO{QEn{zWqQ!hy8ufk-#u6I&zqP;W~NTw-|Lcw!s@kjAAg&E79`z^0E28X1t&&V4U +zvBTKNt`XU{q3b-`XU-zyUVS#e5Rl$EB`I@w{C9Ww1W!XE<3?x5`M +zD=tIO9(nB{Z)$SAecFm;a2OhppFWZsH>K3wvz<8)>HvxSaA9X4 +zRZDhf^_Q4X)?MMPml~!#bidSi-QXC_W@YSmPXk$@%Bn~oWrt*1I$WX=&*gWXepWgf +zZOCHv`AK{MF&g-$p~=h>rH~sM(W$h^%{B(vd0!0a*dB>jYs7~cxp!TdY{hD&9_bzF +z%gmFomWlM$^X3N=)F{pJS$AE&2=g;Ktrv~4-!iqt1OJjqHWR$%-L0=we%2DmJW8t= +zXRqZ`bc1=!9x5u`H?+IAFYrIZUk(%V^!F9^q~#r#D-w6(h<>X?e@X%9i$dAZls2P4 +zlT?{K?pJg8O9q_?41Wq5GWAz^y@!WnTRSr8{jN63UJ`ytsPE>=#}CJ?NQRDr?k#0+ +zKHsZ*^y&1bPI*mt=hpUgS~e10Q**nq@>WM{jhh+CyDp6whvZd&uw}Dc-ZROMe5SWw +z!%^u_{A^P<)`r|3jo-?YlblQ!%f_If##PqpcR=2z5mXJ<6iSPCfr3n0+W-cY&mXzy6{2OIi+vQ}x +zRQl9m=^^FC>|S{_yE9y2i|O2MXds)UdwOLsb5)8fHn-8r8tyg=3+YU6KD!rhyZqij +zZ26d$y<;gWx4Gzd;UodKwWkS4N;$uX*YZRnzQ=~R^6!Xc@589zgj{b%WT(Dk}mkVpIiSnQ;hMYp5EsP2bl}7aAbQIcOGw@mg>_JN +z!_$M=-F_dce^@sM{GxkK5fLxAN+_0*cLmaE%3DUaEcQE;VWWxdkMgx9Iy8U0p;5<2 +zKN6zF42|^dkYQB26Iovm%b5sHJM`6>yx@^au5Tma)w;mC;?i}yNwQd#?Cbkr_k(YN +z@bYnIqY7d(aUD=(GuN<0yc`LT0+YAZG@_HF`tFgJyt0QZ)8oXr<(~HrsNsrxeFbu_ +zcv(Br(Y~>30P>>CYllr2&66aWm-LE~tXpR5`zP6(&yVhqH6Y%KXnpi=RCYGZ$wpdJ +z(K8p)Kj~QMEa~hL7PhyD6tY;y9q338X9@+`!wz4W_%}S#F2WAT#c`J9?kpRHTX4rW +zAzb=CMeZ=W*Wu}O`y0F87}ZfNAYa+_^o?Xh<{T~>m#w{h(nIKWL8!SHNM0_u6B(Ya +zGQ{5fvMrK#oiyGpNL7Y4@oqjRZ&nIBb(;Z4eqvosSbfm{C0ew5Wt)-SBCjWcG(BA) +zpwDww_IxnMu&6h^kmzmL;)uoT_KzEi_vo0 +z_)b|C?q2ekoVJpRlxQn3b+SgtB-V|5{sfqRUyR!0JNLO&&ufM^iE-n~)}=2yjI-h3 +zwVT_1uKYNx%c|bllZMoNJgGKvxJjF?ju3uu!q}vh%2n=Y1|o|EMU&G`83MY~cfaF~ +zbo-rm-yu6n7!2G3N^O!>=#IDCjVV^Lw;Ar0^9`<8dJEZ1MppR#P>a4I(uIw)X{L7s +z8&XmaN2J4W9fhv#Vl`eB)3Xj7gy$96IO}{!!V<^V^WYn4CV6iPKJ5;7Vr{W+m)!=FCt+imM{7 +z{6Vc$UfCVE8tqb#h9%#C6ON5%abX~nfrxA7ezH1RHCEmt_7LE0@(L7D(DtVXinE5@hHZhpRJ@|P6|AqQ+F3|nq}yEXREivq(GDXjHmLx#1mbhT13bRsKTc6w5PwOrK* +z^BZdss99X5gcJ;*oV@r29BOw`O)V8?7S}lYq_LY>mMj6BF~s8D{Jk=fMlF>5$?iB9 +zGBfnALNN99!e|?pyua9-w@A9Cf9U29b6r6DlVYOAPwL5)v?^tsjj!;q2_`>s}QHcRP +zZguuHh9FCg7H*tttcS2uJAE24%Id +z@@jDhIySefrTKHO-$Z9=(q^|Q+Aq`>x4Pw`Q%`3TIYR079bD(XOQsp_u)7=4u(^Ti +zs|0Cc`rczy*T2}0@JkUnXs3U3pqkGanb;s@t*K|La6C&7n(?%<9L#p-lhufvhsV#r +z2%b0-gMBETv~w-SWdilb4U=hIx45lNIryoPLzVr3A|~XlAiXyJwuTcQ2Wzy%yrY +zj@;Tc>YlA{6;e4c(~^21Lz=H%*duhO|NR+MDxGNMqhmSQNR&4!GUU6h0^ePYNkjKL +z2Pgvjf*JE-3>Z!Ww$;!mWh{-cD!<2fmdW{-o8rY6S#CU*KkVVq>#KUWsa24^QmXvm +z=;$t=4W9|Oo8U^j^tLo-ZTiwwCT*^m?iYGS>2VpSY26B2D73uhXbgT3qmVshg2m#*DuE9j^!A4c4X9a&xZ +z^R{j&;$|xHDiz%++Xe-im5l4EU2Ta^Lwu>ZnUU_I$WiCypGmonLt@F^OLCJ#+L=4d +z8(*J9b8s~1wNvcrttD@@hRh@yjit{}oUM<@z+oIhHe +zghc|ubM{%II_F*(xE>)qX`Vrp!uaXiO>EE$8 +G_y%cav;3A=zv;e^>%Jn}k0uh#`cKAeytAfDsaeO;oDXY)C--%slhV%ri63JaZD9J9X;qqnUeP3w!H}Z%F&UsAB4gBzES6 +zl|>#O!?sJ-aIonfX;h}-eQ-O%`7HAu?GKAMmPn9+H74gC@|UQ5{(xa}m9$r^f60Os&S4qIC>R +zFQfQ@SBQ_6{a=7DCvTMY3tl!L&5uw=s_#bw1COmwWNOHwR45WF&7Z*5Hi4(#witOH +z7|fG!P7Vy@5Wi2}=->avHv;=n2IqN9o7J=Z)MlG~Y;6_z#A*8>+Tk8nFK=Qy+-IBL +z?y9XBF{Yzz3rVTZvd19k-U;dHzMniTI!YI{FkZ*kZY+GN?m&aQhK{2axQH`nML6C0`is$xY!Pm6H$Naenmc +z?GK);{T}EEC$a@kTG-l?R_1%-+<@M;Cu_A3%0T)9%%+^_z28zIDNHlBC-q0lqbKP} +z4`a+#34brz{$)!z7^sm`3gnkPub|uz{G7hiwVK!Yq(_!JJqlyK5NM-3zze=1jm|r3E(R +z)o%emn(fLNqHhTcAG!~HDGBsEfcKjSZv{Ms?F**L&jv5wq&)l&@~=E~Y=qQmEZC#uuO5REn=GL-0E5P +zxS|Cu8ID5(1EoLswqJW5Z>L0ja{4Aam}~yJ(XIpEmb3$^U;F58<>5EI|BSXw^QC$0 +zuJ`;CSBB7spYv8}9}XlrE-u_uL(l_8ii@Ia0^l1^ME&F%@$3WB=)a +z25MLE(ANh(f@j;B!NX?ouo*mT2M^o9L+~#+4zJ+fFXS%Ia+d7)rj?am2L4i!VwyTbcR&sNFd+lsnIQrQAW(Jwu7l9_8F>bL@MAL^A{ +z^qS`~;G@AaCL+(3$#vQ<#12R)Vd&XXwWi%@6%jXRzFy#N(-9~_E@C|)$hD`B{qJ*DnTY$_kRI-`pM0f{U_=nudSBINu;Ozns(oy +zF}YaHUf6tE-jMBLvfCHhovn3R(zMVYZqPcfPSZMP&(oTY-9U4})Xv#}{}u2c+*5FG +zfcqKTo8a!Ak92meGqFZ%dV0Pl&jfy=9q=IF4#4LC9yH(%z#9Nh1sr4N=>`Lys)Y&` +zXq|0HHxBN7aD8yM!krBFTW|~N5s&oa;NAz<2X`yn$#A~~x8QojBcE|_?}O`uyA|$a +zxZi?Xf_xrEJ|)0^82BZCKMZ&o;Ew`cR3kHlK5tc!~GC4gr`qHJp4Q!{!?{`hx_4mMtl!g?oLf+ir55pU(Kek+;X2^1fO`(*+=6l}^AHa=5$;mB +z4!A4eo(aEYuTwb7j>Xt3g3fp8-+)>yw!+r +zL-;;Z_&$WcYYKlC;ipaErxAWm56ej3`5fd(i7xZHQdq;0sgR4HYd78=YgS}tlChqu +zxl+C5i-E^_(iLqNTrL|oR;pit{|I1|rpKBYA=#gi#&5qET +z?vtDS`#)_SEH~pEt*L4LvSCdvsh>7mfuql1r!a?of;kN9#mEaN7j4M*OcrJ5p(78n +zlEP&L2Ok5h*MWW1JBk*tjVvj6hiN<AS=^c`K)R!ts{7Uaznm4 +zvwZ#!2KPd_xqw+|FO*Y8bmyXM1@XOG(n}<)+bFJQAgQbeYk$0u~DB?I?ULEhxg!7z;$5{Cm;(vp7_|(PJfdcmN +zuCoITCqV~jiTrrQoq8E9SE}v6qkYx$aKY1QJkMuls8+}j?hnmSzd?B+pY6!+J>(_v +zcFjb)>V4_c<|_23YV2zyb;lP2IbN(iyfV>+{Y6oozIT{Vr`cFr5c>zdA8Iw)RHijF +zt$ijL_{9c(X`R--R^JE5#Fv}m*UVQ^r`;&Z@f +z>-d!d4%$8?_+lM@9OyfNFsBPVni?x}?BG&CBYv22B`r0P!iypl!9Gr&n@e`zYUqdagL{}4x?<0-3AUjo2znqKwlKrnXcY0@;I2Tu7aQREDss)2oGExEu)`R +zGj$B&2hLeVx&5q$sUtb8au8O_R5xHf_c-grLiWvPYC4Cx2Vo72*S+VS+(Fnv#_Q2@ +zPu?KRmZcW+dgMgb!{zlwUzi9#^ko^jnM|#~dlO#B<^^RZ2d0VsNOR+vm4kA0s4O$< +z;&{Gj%dCa#Pt#tH^KgE;n!(G?j8wwqum{rBR1R}TX22EnB*EWNfH`qvl8c4hzK#N> +zbrfLSM8g(@t4(1W!m~}`M6KgPMUy5l7xL_9#gcjjbUz%n%vsN2%%b`T_E!^Lw?!Q* +zU;?khs>%dAWx`uyQ%4Dyz*7>`Y=V7e!gD6783HEodJ@%Cf}Jzrg)-D60c$bn+v!#< +z1he=xsmQ2DH&egB8ivCJUWcTfCRm~gZ;eGgAz%Vev8o>u%wfWF+SES@n853?sYeNx +zX2Ls=puQ(y0xz7X{+?ji<3#DRWvIUvFo8EeN$nW>9X;Js^CpC?#>39o;I`mBHnyil^bk6`0WcpK8xrvyyk +z9ZgohOE8}a?{u2_9RU+~%N*)B!AeYc%&FchU;=MViW(+Z +znF+7mseVJi1YUoNdMCkV058?(FD*=6ORx_EgJa>HEOnKDi9We6TfLQFe>LH4%uyE$ +zn82%n%p=$-6JG8}b)kR>yyGL)dV+ms!aL|u=Lwj=dtj7$Ey2#2@Y=_!)dD8!);U3~ +zB$%aYu&-^*QfCO5z^lntrx7gCgqMpokAMlh<2mX?f;mih2XobN0w(Yt7^!**mS)0R +z=uz_oOyErzrREUKWx|^F*FIYPh+qXKJa>WmX8|+tG9NF%dNDI{l;GoZTnhJyu*lCo +zM*SCp`Aqrc6{^1xFoE~b81*fJO*Y|m6sm6sn80)9t3M-Hi3zW$NPStr1m5<1_5UMS +znF()Sk$Ot5917Ow{e@ +zOm!2%EVBm3!p_Uoy97+&t@5es2$pEVn>kUvO~3?R>Lhg;!5k*McPFXM0w(aDxt!}f +zI?_ydnXiZ}@QS9WWds{z!u#Pgb&7xqynR#DNdzk};gy%E;|0vX%lv5>9}8ZBkJE8!EQ}Um +zk>8{emG{}6~R6;;W4ZFa{&{0-B$G#f}Jzry)i<4 +zQNU0)UPgJEsu9d`&EQz*yh{C{fC(OKyITD|!4ge)p-MF(U?RU_rtT$}L&xJ~FiGtY +zFoD+%Jp#efOn4m@uJhn9fw#u0s)XkG%Epn(W0%qW4_Bi-hxP{>3 +zbX*z>H;J&wZ+@am`}+=`DZiE!b-sWJyu*nq?e9A#oA8dOsIvu3;4Ms2{RAs9;jKzl +zX9}3WdpAj)POvf)UVo}uB47e9K%{e8z)6JBYi>J~78_e`dmPOxv8@QU23gJ5lQ2FvXq +zt0oZaKEOn|%f_ipz(jsMN+>bqFj__k%$Tj@#hM8Q?^|ep=9u2q5br->Ip|v;f8~yB|Om!#0 +z=3$;LH(;es^)Z4yOzRQ@cG#spOt3eBCt!~|)qfB$QSRvs^#Ot%175AM_j@Qq-2xct +zbgDro``=g}Z!+>NcdMHa$L4}2k;exa>Rkl;9Q6@p{oJLlBiJLrt2XitXQ;Ok>{C