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Merge pull request #10135 from chewitt/amlogic-upstream

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linux: update Amlogic Linux 6.15.y kernel and patches
This commit is contained in:
Rudi Heitbaum 2025-06-09 20:42:43 +10:00 committed by GitHub
commit a34f2d03df
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GPG Key ID: B5690EEEBB952194
55 changed files with 238 additions and 841 deletions
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4
packages/linux/package.mk
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@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
case "${LINUX}" in
amlogic)
PKG_VERSION="0ff41df1cb268fc69e703a08a57ee14ae967d0ca" # 6.15.0
PKG_SHA256="60d654050789d07f3b04f5597131eaeba2875602f966bf8da14f04bf4c3183d2"
PKG_VERSION="3ef49626da6dd67013fc2cf0a4e4c9e158bb59f7" # 6.15.1
PKG_SHA256="dd0c9b097906d7cbcd1281c0fbc489ffdd803495bffd2d159c5e994213362468"
PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
PKG_PATCH_DIRS="default"

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch
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@ -1,4 +1,4 @@
From 1dde62820210ea7b93da622a21f0a389573c2746 Mon Sep 17 00:00:00 2001
From 0d1897b3d18140c48625e0a8cded448d8a181d3f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:41:51 +0000
Subject: [PATCH 01/50] LOCAL: set meson-gx cma pool to 896MB

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch
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@ -1,4 +1,4 @@
From 595a077dd6a78dcf25fe646c655a3f2d2000bca3 Mon Sep 17 00:00:00 2001
From 99c6d58e2b3d289b0ccaf39c500a6875abb14780 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 14 Aug 2019 19:58:14 +0000
Subject: [PATCH 02/50] LOCAL: set meson-g12 cma pool to 896MB

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch
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@ -1,4 +1,4 @@
From 02427d51911ba4c6645a78844376c99a9b11bcba Mon Sep 17 00:00:00 2001
From 49c3682d0bf8ce8d8a77a522164da223e05bbdae Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:45:18 +0000
Subject: [PATCH 03/50] LOCAL: arm64: fix Kodi sysinfo CPU information

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch
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@ -1,4 +1,4 @@
From 8eba4d0a8717dc97ae3057964cd74d69b9b9dc85 Mon Sep 17 00:00:00 2001
From 765093b18eb098db4bfc6036eb02c99a0217dd92 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:23 +0100
Subject: [PATCH 04/50] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch
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@ -1,4 +1,4 @@
From 48d789e1641771db846e43510558a7ee820cca9a Mon Sep 17 00:00:00 2001
From 0e93f1bf987e1ca7bf6e094a7657cfa894d3c308 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:25 +0100
Subject: [PATCH 05/50] LOCAL: arm64: dts: meson: add support for GX PM and

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch
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@ -1,4 +1,4 @@
From 03d7848a403caa1c3492ba5f94f20b47035428bc Mon Sep 17 00:00:00 2001
From cae8d14554d6cbfad5ea7a14ae76e2b0312f2a4f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 21 Jan 2021 01:35:36 +0000
Subject: [PATCH 06/50] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch
View File

@ -1,4 +1,4 @@
From fd223a84d313fc4161628cee55ba630d2f0c136f Mon Sep 17 00:00:00 2001
From 5cbe1c3b07ccb36041afa878db1540977f62475f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 6 Nov 2021 13:01:08 +0000
Subject: [PATCH 07/50] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch
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@ -1,4 +1,4 @@
From d356073a524021d944b6a5f9bbab13daf54807cc Mon Sep 17 00:00:00 2001
From 0b52c619a4ca1ae1569ff3d8b33d0d1f791e8378 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Mon, 1 Feb 2021 19:27:40 +0000
Subject: [PATCH 08/50] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch
View File

@ -1,4 +1,4 @@
From e227a26c18cba4fe01be8dce8b6301d693c4ce04 Mon Sep 17 00:00:00 2001
From 74691114248dc2f00dbaada19b5506f6a78ef7bd Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@iki.fi>
Date: Sun, 17 Apr 2022 04:37:48 +0000
Subject: [PATCH 09/50] LOCAL: ASoC: meson: assign internal PCM

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch
View File

@ -1,4 +1,4 @@
From 7af076b7917e31ab222f7a0881ff43aba1fe8354 Mon Sep 17 00:00:00 2001
From 531d05b9fae9b0eadd0dc597f195bc500d492879 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 5 Jan 2023 15:16:46 +0000
Subject: [PATCH 10/50] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.16-arm64-dts-amlogic-gxbb-enable-UART-RX-a.patch
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@ -1,4 +1,4 @@
From a47d29eae229e62c4bf6f6d694d62ab7ccf4d2fe Mon Sep 17 00:00:00 2001
From 72bed39069eff09afa075b506f434ddb60beb05c Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 29 Mar 2025 19:58:51 +0100
Subject: [PATCH 11/50] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.16-arm64-dts-amlogic-gxl-enable-UART-RX-an.patch
View File

@ -1,4 +1,4 @@
From 0b061fe76dc6ef00ba884461dbf1b2e2c3ffa06d Mon Sep 17 00:00:00 2001
From 4a84dbe5beb7a386e4ef00cd72c8c70db3b57c60 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 29 Mar 2025 19:58:52 +0100
Subject: [PATCH 12/50] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMGIT-6.16-arm64-dts-amlogic-g12-enable-UART-RX-an.patch
View File

@ -1,4 +1,4 @@
From dc5f13949ec415f594abc5ed7a51ad845a090fb7 Mon Sep 17 00:00:00 2001
From 31a7decb0a9fde10cb9182f2d4bda8a07b4ec32f Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 29 Mar 2025 19:58:53 +0100
Subject: [PATCH 13/50] FROMGIT(6.16): arm64: dts: amlogic: g12: enable UART RX

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMGIT-6.16-dt-bindings-iio-adc-amlogic-meson-sarad.patch
View File

@ -1,4 +1,4 @@
From fc926d1d75ffe9da12e856320e2ad0eb02a28ca2 Mon Sep 17 00:00:00 2001
From a8b34bc50f933ff7e54d26eb89545c5e67f3387f Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Tue, 31 Dec 2024 20:42:06 +0100
Subject: [PATCH 14/50] FROMGIT(6.16): dt-bindings: iio: adc:

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMGIT-6.16-arm64-dts-amlogic-gxlx-s905l-p271-add-s.patch
View File

@ -1,4 +1,4 @@
From 7145fe3d6a802243bcc43b305fe66347ed392a94 Mon Sep 17 00:00:00 2001
From 6e59acc3aa28875709d87990ec834219a481164f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 1 Jan 2025 07:16:49 +0000
Subject: [PATCH 15/50] FROMGIT(6.16): arm64: dts: amlogic: gxlx-s905l-p271:

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMGIT-6.16-arm64-dts-amlogic-gxl-set-i2c-bias-to-p.patch
View File

@ -1,4 +1,4 @@
From f3d8ea32e25cd3bafef07e4df6aa2c8155902559 Mon Sep 17 00:00:00 2001
From 5bfaf4d45f59a3c3160b0be1021a28aa12f6c0fb Mon Sep 17 00:00:00 2001
From: Da Xue <da@libre.computer>
Date: Fri, 25 Apr 2025 16:31:18 -0400
Subject: [PATCH 16/50] FROMGIT(6.16): arm64: dts: amlogic: gxl: set i2c bias

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMGIT-6.16-ASoC-meson-meson-card-utils-use-of_prop.patch
View File

@ -1,4 +1,4 @@
From 069d3f524abc88be5b335b4a1f4b108823fa0c08 Mon Sep 17 00:00:00 2001
From a2c43a1fdf6a9ce8f5c2f39b66bbe12b143137e8 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 19 Apr 2025 23:34:48 +0200
Subject: [PATCH 17/50] FROMGIT(6.16): ASoC: meson: meson-card-utils: use

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v1-drm-meson-fix-resource-cleanup-in-meson_.patch
View File

@ -1,4 +1,4 @@
From cf0b38ada9872c6d303c6e0ca14b8ae6780bc203 Mon Sep 17 00:00:00 2001
From 71896885a3cc8e53b4a8b42edbcde5e2e12a8835 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Wed, 9 Apr 2025 23:44:22 +0200
Subject: [PATCH 18/50] FROMLIST(v1): drm/meson: fix resource cleanup in

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v2-phy-amlogic-meson8b-usb2-Use-FIELD_PREP-.patch
View File

@ -1,4 +1,4 @@
From 8f32de770111973ca8823c9eac83adfba6ad093a Mon Sep 17 00:00:00 2001
From f51e36cf49670c59f326a7b341cc4c08d6996f31 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 29 Mar 2025 20:07:11 +0100
Subject: [PATCH 19/50] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v2-phy-amlogic-meson8b-usb2-Use-the-regmap_.patch
View File

@ -1,4 +1,4 @@
From 967bd7dbbb6ae6392aec7c41d3243c7d635cf6d1 Mon Sep 17 00:00:00 2001
From e4b38fd1dcd0eb1abd14dc4bcd0517d2bcef499c Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 29 Mar 2025 20:07:12 +0100
Subject: [PATCH 20/50] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use the

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch
View File

@ -1,4 +1,4 @@
From 69c265006b7fbb60bc841e71d335d5362007f193 Mon Sep 17 00:00:00 2001
From 1eec8b4570d54d0721f7277e31e022fb71b4e5b9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Sun, 20 Feb 2022 08:23:12 +0000
Subject: [PATCH 21/50] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch
View File

@ -1,4 +1,4 @@
From 11e3f9cc355e521f9bc0c631312cf67a9a913853 Mon Sep 17 00:00:00 2001
From 8bb7fe71e8e273a69a4c77c9096144eeb6820a2a Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 20 Feb 2022 08:24:47 +0000
Subject: [PATCH 22/50] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch
View File

@ -1,4 +1,4 @@
From cbf5b50694b3f5d1abe0250bd7405721f8ce3563 Mon Sep 17 00:00:00 2001
From 4a2fbacda82c8a0878b7a84775f345ff335266c2 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 20 Feb 2022 08:26:27 +0000
Subject: [PATCH 23/50] FROMLIST(v5): docs: ABI: document tm1628 attribute

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch
View File

@ -1,4 +1,4 @@
From 13688c0e23b3f8f5e51a38324f7d06955a349333 Mon Sep 17 00:00:00 2001
From d87779682e07059aae7bc6cec9935489af2ffbb0 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:51:20 +0000
Subject: [PATCH 24/50] FROMLIST(v5): auxdisplay: add support for Titanmec

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch
View File

@ -1,4 +1,4 @@
From b4adc49983f6d1536b90e7d140233617de2d1c0e Mon Sep 17 00:00:00 2001
From 4ec049659e2b4db3282023ce74ad4a123c61d26e Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:52:34 +0000
Subject: [PATCH 25/50] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch
View File

@ -1,4 +1,4 @@
From 4525d380781bb5203da25f6d4c67fdffc7077f1d Mon Sep 17 00:00:00 2001
From a634997aa1e2dd434b95bb83f4b9c5b0f333cb8b Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:53:32 +0000
Subject: [PATCH 26/50] FROMLIST(v5): MAINTAINERS: Add entry for tm1628

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v2-media-si2168-increase-cmd-execution-time.patch
View File

@ -1,4 +1,4 @@
From 22a5fc12e2b6655e9316774cdad643899b448f2f Mon Sep 17 00:00:00 2001
From 9d2619928bd7d4c01389c2132058460f32338970 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Fri, 7 Feb 2025 04:29:08 +0000
Subject: [PATCH 27/50] FROMLIST(v2): media: si2168: increase cmd execution

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch
View File

@ -1,4 +1,4 @@
From 0e9e0d8cc1322adef5e3563fdbe4dd0fb9b56bc1 Mon Sep 17 00:00:00 2001
From c0933f4134e1ffc732358af32354e8ac26f074ce Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Mon, 22 Nov 2021 09:15:21 +0000
Subject: [PATCH 28/50] FROMLIST(v1): media: meson: vdec: esparser: check

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch
View File

@ -1,4 +1,4 @@
From 3d5f435feb3ba7db20eae928fc38722b4dceed46 Mon Sep 17 00:00:00 2001
From 43e246de0ce0168b5dd9c53bd7ff6bfa3a5a6132 Mon Sep 17 00:00:00 2001
From: Benjamin Roszak <benjamin545@gmail.com>
Date: Mon, 23 Jan 2023 10:56:46 +0000
Subject: [PATCH 29/50] FROMLIST(v2): media: meson: vdec: implement 10bit

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch
View File

@ -1,4 +1,4 @@
From 9b45fa72a806226bd18fad472721203cc5b533c5 Mon Sep 17 00:00:00 2001
From 582ec7ddd9bd5121186839cf340bab76fc1bbb28 Mon Sep 17 00:00:00 2001
From: Maxime Jourdan <mjourdan@baylibre.com>
Date: Mon, 23 Jan 2023 11:07:04 +0000
Subject: [PATCH 30/50] FROMLIST(v2): media: meson: vdec: add HEVC decode codec

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v1-dt-bindings-usb-dwc2-allow-device-sub-no.patch
View File

@ -1,4 +1,4 @@
From d1fc3d19e2feae15199863e81f4193b6a56651c9 Mon Sep 17 00:00:00 2001
From 13348b7648cef8cf6094de558fdffbd93c3b6def Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 5 Jun 2024 11:15:11 +0200
Subject: [PATCH 31/50] FROMLIST(v1): dt-bindings: usb: dwc2: allow device

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-drm-meson-Avoid-use-after-free-issues-wi.patch
View File

@ -1,4 +1,4 @@
From 57246e21d3ecba5de0be1d95458812351d2cc7cd Mon Sep 17 00:00:00 2001
From 06cfee817d6258d81dc254db20e18780f294ac2b Mon Sep 17 00:00:00 2001
From: Zhang Kunbo <zhangkunbo@huawei.com>
Date: Wed, 6 Nov 2024 02:45:48 +0000
Subject: [PATCH 32/50] FROMLIST(v1): drm/meson: Avoid use-after-free issues

2
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v1-arm64-dts-amlogic-sm1-bananapi-lower-SD-.patch
View File

@ -1,4 +1,4 @@
From 2b891462b3d231f5f3ef3e287cb2d74542bc5db1 Mon Sep 17 00:00:00 2001
From b76df09d6d4172ff6b1eff9c1fb67f502267c5c7 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 3 May 2025 15:18:07 +0000
Subject: [PATCH 33/50] FROMLIST(v1): arm64: dts: amlogic: sm1-bananapi: lower

32
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v1-drm-meson-fix-debug-log-statement-when-s.patch Normal file
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@ -0,0 +1,32 @@
From 293ed8e9e41c0559e7ee5118db82860ccf843466 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Fri, 6 Jun 2025 22:37:29 +0200
Subject: [PATCH 34/50] FROMLIST(v1): drm/meson: fix debug log statement when
setting the HDMI clocks
The "phy" and "vclk" frequency labels were swapped, making it more
difficult to debug driver errors. Swap the label order to make them
match with the actual frequencies printed to correct this.
Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
index c08fa93e50a3..2bccda1e52a1 100644
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
@@ -108,7 +108,7 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
venc_freq /= 2;
dev_dbg(priv->dev,
- "vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
+ "phy:%lluHz vclk=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
phy_freq, vclk_freq, venc_freq, hdmi_freq,
priv->venc.hdmi_use_enci);
--
2.34.1

39
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-drm-meson-use-vclk_freq-instead-of-pixel.patch Normal file
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@ -0,0 +1,39 @@
From 1f7fad2775d584811df7e77147b3e33f7b8c59d1 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 7 Jun 2025 00:10:31 +0200
Subject: [PATCH 35/50] FROMLIST(v1): drm/meson: use vclk_freq instead of
pixel_freq in debug print
meson_vclk_vic_supported_freq() has a debug print which includes the
pixel freq. However, within the whole function the pixel freq is
irrelevant, other than checking the end of the params array. Switch to
printing the vclk_freq which is being compared / matched against the
inputs to the function to avoid confusion when analyzing error reports
from users.
Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
drivers/gpu/drm/meson/meson_vclk.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index 3325580d885d..c4123bb958e4 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -790,9 +790,9 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv,
}
for (i = 0 ; params[i].pixel_freq ; ++i) {
- DRM_DEBUG_DRIVER("i = %d pixel_freq = %lluHz alt = %lluHz\n",
- i, params[i].pixel_freq,
- PIXEL_FREQ_1000_1001(params[i].pixel_freq));
+ DRM_DEBUG_DRIVER("i = %d vclk_freq = %lluHz alt = %lluHz\n",
+ i, params[i].vclk_freq,
+ PIXEL_FREQ_1000_1001(params[i].vclk_freq));
DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
i, params[i].phy_freq,
PHY_FREQ_1000_1001(params[i].phy_freq));
--
2.34.1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-WIP-media-meson-vdec-reintroduce-wiggle-room.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-WIP-media-meson-vdec-reintroduce-wiggle-room.patch
View File

@ -1,7 +1,7 @@
From d40cabc0cd382e18f0b7c4514de9daccdcaa1fd5 Mon Sep 17 00:00:00 2001
From 5e84aed6397e500e9cbcffa392fabdc1733f0645 Mon Sep 17 00:00:00 2001
From: Andreas Baierl <ichgeh@imkreisrum.de>
Date: Tue, 2 Apr 2024 14:22:52 +0000
Subject: [PATCH 34/50] WIP: media: meson: vdec: reintroduce wiggle room
Subject: [PATCH 36/50] WIP: media: meson: vdec: reintroduce wiggle room
Without the wiggle room, it happens that matching offsets can't be found.
This results in non-matches and afterwards in frame drops in userspace apps.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch
View File

@ -1,7 +1,7 @@
From 21236d519a8edd59444861973cc4d6462aa973d6 Mon Sep 17 00:00:00 2001
From cfd49ef6246760ffd07fba75691a25f9bccea9fa Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 14 Mar 2023 01:13:15 +0000
Subject: [PATCH 35/50] WIP: media: meson: vdec: fix memory leak of 'new_frame'
Subject: [PATCH 37/50] WIP: media: meson: vdec: fix memory leak of 'new_frame'
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <error27@gmail.com>

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-WIP-media-meson-vdec-fix-V4L2_BUF_FLAG_-KEY-P-B-FRAM.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-WIP-media-meson-vdec-fix-V4L2_BUF_FLAG_-KEY-P-B-FRAM.patch
View File

@ -1,7 +1,7 @@
From 8ac44e39fb57fa3e68e0091fa3d2b5462a3cb377 Mon Sep 17 00:00:00 2001
From e1d10bac2d576aaa7ad84fd67046ce93869e3652 Mon Sep 17 00:00:00 2001
From: Andreas Baierl <ichgeh@imkreisrum.de>
Date: Thu, 20 Feb 2025 23:59:14 +0000
Subject: [PATCH 36/50] WIP: media: meson: vdec: fix
Subject: [PATCH 38/50] WIP: media: meson: vdec: fix
V4L2_BUF_FLAG_{KEY|P|B}FRAME
ffmpeg needs the keyframe flag to be set correctly, else

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch
View File

@ -1,7 +1,7 @@
From c9d9536006b6fc6b59d918c333b4563e4be040bf Mon Sep 17 00:00:00 2001
From bc08bd56d8eb62b97d7028ac88eba9a2613f2617 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 26 May 2024 12:53:07 +0000
Subject: [PATCH 37/50] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
Subject: [PATCH 39/50] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
boards
Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-WIP-net-phy-meson-gxl-implement-meson_gxl_phy_resume.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-net-phy-meson-gxl-implement-meson_gxl_phy_resume.patch
View File

@ -1,7 +1,7 @@
From 15d48d1d6f845c4c9dbcd62de7df46e17c354d40 Mon Sep 17 00:00:00 2001
From df2bd03352106bc643c9a1cec468cc28b93ef3a9 Mon Sep 17 00:00:00 2001
From: Da Xue <da@libre.computer>
Date: Tue, 8 Aug 2023 01:00:15 -0400
Subject: [PATCH 38/50] WIP: net: phy: meson-gxl: implement
Subject: [PATCH 40/50] WIP: net: phy: meson-gxl: implement
meson_gxl_phy_resume()
While testing the suspend/resume functionality, we found the ethernet

6
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-drm-meson-add-support-for-2560x1440-resolution-o.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-drm-meson-add-support-for-2560x1440-resolution-o.patch
View File

@ -1,7 +1,7 @@
From bc2f467869be30356b75ae0b9af002b45c699db7 Mon Sep 17 00:00:00 2001
From e06f03271acef28eae487cfca65ec6c4870141ff Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Thu, 10 Sep 2020 11:01:33 +0900
Subject: [PATCH 39/50] WIP: drm/meson: add support for 2560x1440 resolution
Subject: [PATCH 41/50] WIP: drm/meson: add support for 2560x1440 resolution
output
Add support for Quad HD (QHD) 2560x1440 resolution output. Timings
@ -16,7 +16,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index 3325580d885d..ce165c9587d7 100644
index c4123bb958e4..13fb985ba207 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -360,6 +360,8 @@ enum {

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-drm-meson-do-setup-after-resumption-to-fix-hdmi-.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-drm-meson-do-setup-after-resumption-to-fix-hdmi-.patch
View File

@ -1,7 +1,7 @@
From 861260a7aaecf2954e35619d08f5ce7e15990f6b Mon Sep 17 00:00:00 2001
From 46d1d7f04757f7976c294d026dc57f655b8e79df Mon Sep 17 00:00:00 2001
From: Luke Lu <luke.lu@libre.computer>
Date: Mon, 21 Aug 2023 10:50:04 +0000
Subject: [PATCH 40/50] WIP: drm/meson: do setup after resumption to fix hdmi
Subject: [PATCH 42/50] WIP: drm/meson: do setup after resumption to fix hdmi
output
Some HDMI displays connected to gxl-based boards go black after

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-drm-meson-poweron-off-dw_hdmi-only-if-dw_hdmi-en.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-drm-meson-poweron-off-dw_hdmi-only-if-dw_hdmi-en.patch
View File

@ -1,7 +1,7 @@
From ba61d298732934a2371065df7f76159499da27db Mon Sep 17 00:00:00 2001
From 712bc7380ea8734a34bc7fbe8819d0877cb0de45 Mon Sep 17 00:00:00 2001
From: Luke Lu <luke.lu@libre.computer>
Date: Wed, 13 Dec 2023 03:47:44 +0000
Subject: [PATCH 41/50] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
Subject: [PATCH 43/50] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
enabled
dw_hdmi_poweron() assumes that hdmi->curr_conn is valid. Calling

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch
View File

@ -1,7 +1,7 @@
From 317616c25e9c060b69329bbd6c06c9d859a3691b Mon Sep 17 00:00:00 2001
From 856bd4d0d51f28a20544cc995e9abda9fe9c5db6 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 18 Jan 2022 15:09:12 +0000
Subject: [PATCH 42/50] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
Subject: [PATCH 44/50] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
100MHz
Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch
View File

@ -1,7 +1,7 @@
From ec86a3c23aca699c28875cb91179f312c23b3ced Mon Sep 17 00:00:00 2001
From 54348053bd1d726bcc70bbde15489784f3c1bbf7 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 18 Jan 2022 15:18:32 +0000
Subject: [PATCH 43/50] WIP: arm64: dts: meson: remove SDIO node from Khadas
Subject: [PATCH 45/50] WIP: arm64: dts: meson: remove SDIO node from Khadas
VIM1
Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch
View File

@ -1,7 +1,7 @@
From f893c37745bc77586fb5bb0c40e56ec1d25f8427 Mon Sep 17 00:00:00 2001
From 0c24a706fecc904fa816273f2f22f07837be7774 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 19 Jan 2022 06:45:06 +0000
Subject: [PATCH 44/50] WIP: arm64: dts: meson: add UHS SDIO capabilities to
Subject: [PATCH 46/50] WIP: arm64: dts: meson: add UHS SDIO capabilities to
p212/p23x/q20x
Add UHS capabilities to the SDIO node to enable 100MHz speeds.

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch
View File

@ -1,7 +1,7 @@
From 8dc92185299d7a455ba1806bc2ef2165467088cd Mon Sep 17 00:00:00 2001
From 8e208c9b8b47bde379c47c33958bbd189619eb6b Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Feb 2023 09:59:58 +0000
Subject: [PATCH 45/50] WIP: dt-bindings: arm: amlogic: add support for Tanix
Subject: [PATCH 47/50] WIP: dt-bindings: arm: amlogic: add support for Tanix
TX9 Pro
The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip

36
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-Revert-drm-meson-Use-1000ULL-when-operating-with-mod.patch
View File

@ -1,36 +0,0 @@
From 203bf695e56bd982ec01601a105d7e2fe472ec66 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 28 May 2025 11:16:47 +0000
Subject: [PATCH 48/50] Revert "drm/meson: Use 1000ULL when operating with
mode->clock"
This reverts commit eb0851e14432f3b87c77b704c835ac376deda03a.
---
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
index c08fa93e50a3..7752d8ac85f0 100644
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
@@ -75,7 +75,7 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
unsigned long long venc_freq;
unsigned long long hdmi_freq;
- vclk_freq = mode->clock * 1000ULL;
+ vclk_freq = mode->clock * 1000;
/* For 420, pixel clock is half unlike venc clock */
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
@@ -123,7 +123,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
struct meson_drm *priv = encoder_hdmi->priv;
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
- unsigned long long clock = mode->clock * 1000ULL;
+ unsigned long long clock = mode->clock * 1000;
unsigned long long phy_freq;
unsigned long long vclk_freq;
unsigned long long venc_freq;
--
2.34.1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch
View File

@ -1,7 +1,7 @@
From 0f82a6a67523a95d0322637707c3a936ed83355c Mon Sep 17 00:00:00 2001
From 90c410aa206b5e6432196595c399dce44dca511d Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Feb 2023 10:01:14 +0000
Subject: [PATCH 46/50] WIP: arm64: dts: meson: add initial device-tree for
Subject: [PATCH 48/50] WIP: arm64: dts: meson: add initial device-tree for
Tanix TX9 Pro
Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with

603
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-Revert-drm-meson-use-unsigned-long-long-Hz-for-frequ.patch
View File

@ -1,603 +0,0 @@
From ce74ac8725fe2a77c80544a02ff853a7fb60604b Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 28 May 2025 11:17:28 +0000
Subject: [PATCH 49/50] Revert "drm/meson: use unsigned long long / Hz for
frequency types"
This reverts commit 1017560164b6bbcbc93579266926e6e96675262a.
---
drivers/gpu/drm/meson/meson_drv.c | 2 +-
drivers/gpu/drm/meson/meson_drv.h | 2 +-
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 29 ++-
drivers/gpu/drm/meson/meson_vclk.c | 195 ++++++++++-----------
drivers/gpu/drm/meson/meson_vclk.h | 13 +-
5 files changed, 115 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index ea5bda297a74..031686fd4104 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -169,7 +169,7 @@ static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
{
.limits = {
- .max_hdmi_phy_freq = 1650000000,
+ .max_hdmi_phy_freq = 1650000,
},
.attrs = (const struct soc_device_attribute []) {
{ .soc_id = "GXL (S805*)", },
diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
index be4b0e4df6e1..3f9345c14f31 100644
--- a/drivers/gpu/drm/meson/meson_drv.h
+++ b/drivers/gpu/drm/meson/meson_drv.h
@@ -37,7 +37,7 @@ struct meson_drm_match_data {
};
struct meson_drm_soc_limits {
- unsigned long long max_hdmi_phy_freq;
+ unsigned int max_hdmi_phy_freq;
};
struct meson_drm {
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
index 7752d8ac85f0..6d1c9262a2cf 100644
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
{
struct meson_drm *priv = encoder_hdmi->priv;
int vic = drm_match_cea_mode(mode);
- unsigned long long phy_freq;
- unsigned long long vclk_freq;
- unsigned long long venc_freq;
- unsigned long long hdmi_freq;
+ unsigned int phy_freq;
+ unsigned int vclk_freq;
+ unsigned int venc_freq;
+ unsigned int hdmi_freq;
- vclk_freq = mode->clock * 1000;
+ vclk_freq = mode->clock;
/* For 420, pixel clock is half unlike venc clock */
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
@@ -107,8 +107,7 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2;
- dev_dbg(priv->dev,
- "vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
+ dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
phy_freq, vclk_freq, venc_freq, hdmi_freq,
priv->venc.hdmi_use_enci);
@@ -123,11 +122,10 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
struct meson_drm *priv = encoder_hdmi->priv;
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
- unsigned long long clock = mode->clock * 1000;
- unsigned long long phy_freq;
- unsigned long long vclk_freq;
- unsigned long long venc_freq;
- unsigned long long hdmi_freq;
+ unsigned int phy_freq;
+ unsigned int vclk_freq;
+ unsigned int venc_freq;
+ unsigned int hdmi_freq;
int vic = drm_match_cea_mode(mode);
enum drm_mode_status status;
@@ -146,12 +144,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
if (status != MODE_OK)
return status;
- return meson_vclk_dmt_supported_freq(priv, clock);
+ return meson_vclk_dmt_supported_freq(priv, mode->clock);
/* Check against supported VIC modes */
} else if (!meson_venc_hdmi_supported_vic(vic))
return MODE_BAD;
- vclk_freq = clock;
+ vclk_freq = mode->clock;
/* For 420, pixel clock is half unlike venc clock */
if (drm_mode_is_420_only(display_info, mode) ||
@@ -181,8 +179,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2;
- dev_dbg(priv->dev,
- "%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n",
+ dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index ce165c9587d7..eb4c251d79b7 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -110,10 +110,7 @@
#define HDMI_PLL_LOCK BIT(31)
#define HDMI_PLL_LOCK_G12A (3 << 30)
-#define PIXEL_FREQ_1000_1001(_freq) \
- DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
-#define PHY_FREQ_1000_1001(_freq) \
- (PIXEL_FREQ_1000_1001(DIV_ROUND_DOWN_ULL(_freq, 10ULL)) * 10)
+#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001)
/* VID PLL Dividers */
enum {
@@ -365,11 +362,11 @@ enum {
};
struct meson_vclk_params {
- unsigned long long pll_freq;
- unsigned long long phy_freq;
- unsigned long long vclk_freq;
- unsigned long long venc_freq;
- unsigned long long pixel_freq;
+ unsigned int pll_freq;
+ unsigned int phy_freq;
+ unsigned int vclk_freq;
+ unsigned int venc_freq;
+ unsigned int pixel_freq;
unsigned int pll_od1;
unsigned int pll_od2;
unsigned int pll_od3;
@@ -377,11 +374,11 @@ struct meson_vclk_params {
unsigned int vclk_div;
} params[] = {
[MESON_VCLK_HDMI_ENCI_54000] = {
- .pll_freq = 4320000000,
- .phy_freq = 270000000,
- .vclk_freq = 54000000,
- .venc_freq = 54000000,
- .pixel_freq = 54000000,
+ .pll_freq = 4320000,
+ .phy_freq = 270000,
+ .vclk_freq = 54000,
+ .venc_freq = 54000,
+ .pixel_freq = 54000,
.pll_od1 = 4,
.pll_od2 = 4,
.pll_od3 = 1,
@@ -389,11 +386,11 @@ struct meson_vclk_params {
.vclk_div = 1,
},
[MESON_VCLK_HDMI_DDR_54000] = {
- .pll_freq = 4320000000,
- .phy_freq = 270000000,
- .vclk_freq = 54000000,
- .venc_freq = 54000000,
- .pixel_freq = 27000000,
+ .pll_freq = 4320000,
+ .phy_freq = 270000,
+ .vclk_freq = 54000,
+ .venc_freq = 54000,
+ .pixel_freq = 27000,
.pll_od1 = 4,
.pll_od2 = 4,
.pll_od3 = 1,
@@ -401,11 +398,11 @@ struct meson_vclk_params {
.vclk_div = 1,
},
[MESON_VCLK_HDMI_DDR_148500] = {
- .pll_freq = 2970000000,
- .phy_freq = 742500000,
- .vclk_freq = 148500000,
- .venc_freq = 148500000,
- .pixel_freq = 74250000,
+ .pll_freq = 2970000,
+ .phy_freq = 742500,
+ .vclk_freq = 148500,
+ .venc_freq = 148500,
+ .pixel_freq = 74250,
.pll_od1 = 4,
.pll_od2 = 1,
.pll_od3 = 1,
@@ -413,11 +410,11 @@ struct meson_vclk_params {
.vclk_div = 1,
},
[MESON_VCLK_HDMI_74250] = {
- .pll_freq = 2970000000,
- .phy_freq = 742500000,
- .vclk_freq = 74250000,
- .venc_freq = 74250000,
- .pixel_freq = 74250000,
+ .pll_freq = 2970000,
+ .phy_freq = 742500,
+ .vclk_freq = 74250,
+ .venc_freq = 74250,
+ .pixel_freq = 74250,
.pll_od1 = 2,
.pll_od2 = 2,
.pll_od3 = 2,
@@ -425,11 +422,11 @@ struct meson_vclk_params {
.vclk_div = 1,
},
[MESON_VCLK_HDMI_148500] = {
- .pll_freq = 2970000000,
- .phy_freq = 1485000000,
- .vclk_freq = 148500000,
- .venc_freq = 148500000,
- .pixel_freq = 148500000,
+ .pll_freq = 2970000,
+ .phy_freq = 1485000,
+ .vclk_freq = 148500,
+ .venc_freq = 148500,
+ .pixel_freq = 148500,
.pll_od1 = 1,
.pll_od2 = 2,
.pll_od3 = 2,
@@ -437,11 +434,11 @@ struct meson_vclk_params {
.vclk_div = 1,
},
[MESON_VCLK_HDMI_297000] = {
- .pll_freq = 5940000000,
- .phy_freq = 2970000000,
- .venc_freq = 297000000,
- .vclk_freq = 297000000,
- .pixel_freq = 297000000,
+ .pll_freq = 5940000,
+ .phy_freq = 2970000,
+ .venc_freq = 297000,
+ .vclk_freq = 297000,
+ .pixel_freq = 297000,
.pll_od1 = 2,
.pll_od2 = 1,
.pll_od3 = 1,
@@ -449,11 +446,11 @@ struct meson_vclk_params {
.vclk_div = 2,
},
[MESON_VCLK_HDMI_594000] = {
- .pll_freq = 5940000000,
- .phy_freq = 5940000000,
- .venc_freq = 594000000,
- .vclk_freq = 594000000,
- .pixel_freq = 594000000,
+ .pll_freq = 5940000,
+ .phy_freq = 5940000,
+ .venc_freq = 594000,
+ .vclk_freq = 594000,
+ .pixel_freq = 594000,
.pll_od1 = 1,
.pll_od2 = 1,
.pll_od3 = 2,
@@ -461,11 +458,11 @@ struct meson_vclk_params {
.vclk_div = 1,
},
[MESON_VCLK_HDMI_594000_YUV420] = {
- .pll_freq = 5940000000,
- .phy_freq = 2970000000,
- .venc_freq = 594000000,
- .vclk_freq = 594000000,
- .pixel_freq = 297000000,
+ .pll_freq = 5940000,
+ .phy_freq = 2970000,
+ .venc_freq = 594000,
+ .vclk_freq = 594000,
+ .pixel_freq = 297000,
.pll_od1 = 2,
.pll_od2 = 1,
.pll_od3 = 1,
@@ -634,16 +631,16 @@ static void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m,
3 << 20, pll_od_to_reg(od3) << 20);
}
-#define XTAL_FREQ (24 * 1000 * 1000)
+#define XTAL_FREQ 24000
static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
- unsigned long long pll_freq)
+ unsigned int pll_freq)
{
/* The GXBB PLL has a /2 pre-multiplier */
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB))
- pll_freq = DIV_ROUND_DOWN_ULL(pll_freq, 2);
+ pll_freq /= 2;
- return DIV_ROUND_DOWN_ULL(pll_freq, XTAL_FREQ);
+ return pll_freq / XTAL_FREQ;
}
#define HDMI_FRAC_MAX_GXBB 4096
@@ -652,13 +649,12 @@ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
unsigned int m,
- unsigned long long pll_freq)
+ unsigned int pll_freq)
{
- unsigned long long parent_freq = XTAL_FREQ;
+ unsigned int parent_freq = XTAL_FREQ;
unsigned int frac_max = HDMI_FRAC_MAX_GXL;
unsigned int frac_m;
unsigned int frac;
- u32 remainder;
/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
@@ -670,11 +666,11 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
frac_max = HDMI_FRAC_MAX_G12A;
/* We can have a perfect match !*/
- if (div_u64_rem(pll_freq, m, &remainder) == parent_freq &&
- remainder == 0)
+ if (pll_freq / m == parent_freq &&
+ pll_freq % m == 0)
return 0;
- frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
+ frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq);
frac_m = m * frac_max;
if (frac_m > frac)
return frac_max;
@@ -684,7 +680,7 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
}
static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
- unsigned long long m,
+ unsigned int m,
unsigned int frac)
{
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
@@ -712,7 +708,7 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
}
static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
- unsigned long long freq,
+ unsigned int freq,
unsigned int *m,
unsigned int *frac,
unsigned int *od)
@@ -724,7 +720,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
continue;
*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);
- DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d\n",
+ DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n",
freq, *m, *frac, *od);
if (meson_hdmi_pll_validate_params(priv, *m, *frac))
@@ -736,7 +732,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
/* pll_freq is the frequency after the OD dividers */
enum drm_mode_status
-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq)
+meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq)
{
unsigned int od, m, frac;
@@ -759,7 +755,7 @@ EXPORT_SYMBOL_GPL(meson_vclk_dmt_supported_freq);
/* pll_freq is the frequency after the OD dividers */
static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
- unsigned long long pll_freq)
+ unsigned int pll_freq)
{
unsigned int od, m, frac, od1, od2, od3;
@@ -774,7 +770,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
od1 = od / od2;
}
- DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d/%d/%d\n",
+ DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n",
pll_freq, m, frac, od1, od2, od3);
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
@@ -782,18 +778,17 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
return;
}
- DRM_ERROR("Fatal, unable to find parameters for PLL freq %lluHz\n",
+ DRM_ERROR("Fatal, unable to find parameters for PLL freq %d\n",
pll_freq);
}
enum drm_mode_status
-meson_vclk_vic_supported_freq(struct meson_drm *priv,
- unsigned long long phy_freq,
- unsigned long long vclk_freq)
+meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
+ unsigned int vclk_freq)
{
int i;
- DRM_DEBUG_DRIVER("phy_freq = %lluHz vclk_freq = %lluHz\n",
+ DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n",
phy_freq, vclk_freq);
/* Check against soc revision/package limits */
@@ -804,19 +799,19 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv,
}
for (i = 0 ; params[i].pixel_freq ; ++i) {
- DRM_DEBUG_DRIVER("i = %d pixel_freq = %lluHz alt = %lluHz\n",
+ DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n",
i, params[i].pixel_freq,
- PIXEL_FREQ_1000_1001(params[i].pixel_freq));
- DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
+ FREQ_1000_1001(params[i].pixel_freq));
+ DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
i, params[i].phy_freq,
- PHY_FREQ_1000_1001(params[i].phy_freq));
+ FREQ_1000_1001(params[i].phy_freq/10)*10);
/* Match strict frequency */
if (phy_freq == params[i].phy_freq &&
vclk_freq == params[i].vclk_freq)
return MODE_OK;
/* Match 1000/1001 variant */
- if (phy_freq == PHY_FREQ_1000_1001(params[i].phy_freq) &&
- vclk_freq == PIXEL_FREQ_1000_1001(params[i].vclk_freq))
+ if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
+ vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
return MODE_OK;
}
@@ -824,9 +819,8 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv,
}
EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq);
-static void meson_vclk_set(struct meson_drm *priv,
- unsigned long long pll_base_freq, unsigned int od1,
- unsigned int od2, unsigned int od3,
+static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
+ unsigned int od1, unsigned int od2, unsigned int od3,
unsigned int vid_pll_div, unsigned int vclk_div,
unsigned int hdmi_tx_div, unsigned int venc_div,
bool hdmi_use_enci, bool vic_alternate_clock)
@@ -846,15 +840,15 @@ static void meson_vclk_set(struct meson_drm *priv,
meson_hdmi_pll_generic_set(priv, pll_base_freq);
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
switch (pll_base_freq) {
- case 2970000000:
+ case 2970000:
m = 0x3d;
frac = vic_alternate_clock ? 0xd02 : 0xe00;
break;
- case 4320000000:
+ case 4320000:
m = vic_alternate_clock ? 0x59 : 0x5a;
frac = vic_alternate_clock ? 0xe8f : 0;
break;
- case 5940000000:
+ case 5940000:
m = 0x7b;
frac = vic_alternate_clock ? 0xa05 : 0xc00;
break;
@@ -864,15 +858,15 @@ static void meson_vclk_set(struct meson_drm *priv,
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
switch (pll_base_freq) {
- case 2970000000:
+ case 2970000:
m = 0x7b;
frac = vic_alternate_clock ? 0x281 : 0x300;
break;
- case 4320000000:
+ case 4320000:
m = vic_alternate_clock ? 0xb3 : 0xb4;
frac = vic_alternate_clock ? 0x347 : 0;
break;
- case 5940000000:
+ case 5940000:
m = 0xf7;
frac = vic_alternate_clock ? 0x102 : 0x200;
break;
@@ -881,15 +875,15 @@ static void meson_vclk_set(struct meson_drm *priv,
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
switch (pll_base_freq) {
- case 2970000000:
+ case 2970000:
m = 0x7b;
frac = vic_alternate_clock ? 0x140b4 : 0x18000;
break;
- case 4320000000:
+ case 4320000:
m = vic_alternate_clock ? 0xb3 : 0xb4;
frac = vic_alternate_clock ? 0x1a3ee : 0;
break;
- case 5940000000:
+ case 5940000:
m = 0xf7;
frac = vic_alternate_clock ? 0x8148 : 0x10000;
break;
@@ -1049,14 +1043,14 @@ static void meson_vclk_set(struct meson_drm *priv,
}
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
- unsigned long long phy_freq, unsigned long long vclk_freq,
- unsigned long long venc_freq, unsigned long long dac_freq,
+ unsigned int phy_freq, unsigned int vclk_freq,
+ unsigned int venc_freq, unsigned int dac_freq,
bool hdmi_use_enci)
{
bool vic_alternate_clock = false;
- unsigned long long freq;
- unsigned long long hdmi_tx_div;
- unsigned long long venc_div;
+ unsigned int freq;
+ unsigned int hdmi_tx_div;
+ unsigned int venc_div;
if (target == MESON_VCLK_TARGET_CVBS) {
meson_venci_cvbs_clock_config(priv);
@@ -1076,27 +1070,27 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
return;
}
- hdmi_tx_div = DIV_ROUND_DOWN_ULL(vclk_freq, dac_freq);
+ hdmi_tx_div = vclk_freq / dac_freq;
if (hdmi_tx_div == 0) {
- pr_err("Fatal Error, invalid HDMI-TX freq %lluHz\n",
+ pr_err("Fatal Error, invalid HDMI-TX freq %d\n",
dac_freq);
return;
}
- venc_div = DIV_ROUND_DOWN_ULL(vclk_freq, venc_freq);
+ venc_div = vclk_freq / venc_freq;
if (venc_div == 0) {
- pr_err("Fatal Error, invalid HDMI venc freq %lluHz\n",
+ pr_err("Fatal Error, invalid HDMI venc freq %d\n",
venc_freq);
return;
}
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
if ((phy_freq == params[freq].phy_freq ||
- phy_freq == PHY_FREQ_1000_1001(params[freq].phy_freq)) &&
+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
(vclk_freq == params[freq].vclk_freq ||
- vclk_freq == PIXEL_FREQ_1000_1001(params[freq].vclk_freq))) {
+ vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
if (vclk_freq != params[freq].vclk_freq)
vic_alternate_clock = true;
else
@@ -1122,8 +1116,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
}
if (!params[freq].pixel_freq) {
- pr_err("Fatal Error, invalid HDMI vclk freq %lluHz\n",
- vclk_freq);
+ pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq);
return;
}
diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h
index 7ac55744e574..60617aaf18dd 100644
--- a/drivers/gpu/drm/meson/meson_vclk.h
+++ b/drivers/gpu/drm/meson/meson_vclk.h
@@ -20,18 +20,17 @@ enum {
};
/* 27MHz is the CVBS Pixel Clock */
-#define MESON_VCLK_CVBS (27 * 1000 * 1000)
+#define MESON_VCLK_CVBS 27000
enum drm_mode_status
-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq);
+meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq);
enum drm_mode_status
-meson_vclk_vic_supported_freq(struct meson_drm *priv,
- unsigned long long phy_freq,
- unsigned long long vclk_freq);
+meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
+ unsigned int vclk_freq);
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
- unsigned long long phy_freq, unsigned long long vclk_freq,
- unsigned long long venc_freq, unsigned long long dac_freq,
+ unsigned int phy_freq, unsigned int vclk_freq,
+ unsigned int venc_freq, unsigned int dac_freq,
bool hdmi_use_enci);
#endif /* __MESON_VCLK_H */
--
2.34.1

4
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-arm64-dts-meson-add-7-segment-display-to-Tanix-T.patch → projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-WIP-arm64-dts-meson-add-7-segment-display-to-Tanix-T.patch
View File

@ -1,7 +1,7 @@
From f696526698a4ad2bc9f72031940a487911d75e95 Mon Sep 17 00:00:00 2001
From 6b05081bf504b3ed1887b9de0f3335e0b0ecf688 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 9 Feb 2023 10:11:39 +0000
Subject: [PATCH 47/50] WIP: arm64: dts: meson: add 7-segment display to Tanix
Subject: [PATCH 49/50] WIP: arm64: dts: meson: add 7-segment display to Tanix
TX9 Pro
Add support for the 7-segment VFD display of the device

137
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-FROMLIST-v1-drm-meson-vclk-fix-precision-in-vclk-cal.patch
View File

@ -1,137 +0,0 @@
From ac9550dce453587542ea39e31882d8285bda7451 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 4 Jan 2025 23:53:19 +0000
Subject: [PATCH 50/50] FROMLIST(v1): drm/meson: vclk: fix precision in vclk
calculations
Playing YUV420 @ 59.94 media causes HDMI output to lose sync
with a fatal error reported:
[ 89.610280] Fatal Error, invalid HDMI vclk freq 593406
In meson_encoder_hdmi_set_vclk the initial vclk_freq value is
593407 but YUV420 modes halve the value to 296703.5 and this
is stored as int which loses precision by rounding down to
296703. The rounded value is later doubled to 593406 and then
meson_encoder_hdmi_set_vclk sets an invalid vclk_freq value
and the error triggers during meson_vlkc_setup validation.
Fix precision in meson_encoder_hdmi_set_vclk by switching to
unsigned long long KHz values instead of int MHz. As values
for phy_freq are now more accurate we also need to handle an
additional match scenario in meson_vclk_setup.
Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 42 +++++++++++-----------
drivers/gpu/drm/meson/meson_vclk.c | 3 +-
2 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
index 6d1c9262a2cf..183a2c73c5b7 100644
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
{
struct meson_drm *priv = encoder_hdmi->priv;
int vic = drm_match_cea_mode(mode);
- unsigned int phy_freq;
- unsigned int vclk_freq;
- unsigned int venc_freq;
- unsigned int hdmi_freq;
+ unsigned long long vclk_freq;
+ unsigned long long phy_freq;
+ unsigned long long venc_freq;
+ unsigned long long hdmi_freq;
- vclk_freq = mode->clock;
+ vclk_freq = mode->clock * 1000ULL;
/* For 420, pixel clock is half unlike venc clock */
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
@@ -85,8 +85,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
phy_freq = vclk_freq * 10;
if (!vic) {
- meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
- vclk_freq, vclk_freq, vclk_freq, false);
+ meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq / 1000ULL,
+ vclk_freq / 1000ULL, vclk_freq / 1000ULL,
+ vclk_freq / 1000ULL, false);
return;
}
@@ -107,12 +108,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2;
- dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
- phy_freq, vclk_freq, venc_freq, hdmi_freq,
- priv->venc.hdmi_use_enci);
-
- meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
- venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
+ meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq / 1000ULL,
+ vclk_freq / 1000ULL, venc_freq / 1000ULL, hdmi_freq / 1000ULL,
+ priv->venc.hdmi_use_enci);
}
static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
@@ -122,10 +120,10 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
struct meson_drm *priv = encoder_hdmi->priv;
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
- unsigned int phy_freq;
- unsigned int vclk_freq;
- unsigned int venc_freq;
- unsigned int hdmi_freq;
+ unsigned long long vclk_freq;
+ unsigned long long phy_freq;
+ unsigned long long venc_freq;
+ unsigned long long hdmi_freq;
int vic = drm_match_cea_mode(mode);
enum drm_mode_status status;
@@ -149,7 +147,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
} else if (!meson_venc_hdmi_supported_vic(vic))
return MODE_BAD;
- vclk_freq = mode->clock;
+ vclk_freq = mode->clock * 1000ULL;
/* For 420, pixel clock is half unlike venc clock */
if (drm_mode_is_420_only(display_info, mode) ||
@@ -179,10 +177,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
venc_freq /= 2;
- dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
- __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
+ dev_dbg(priv->dev, "%s: phy=%lld vclk=%lld venc=%lld hdmi=%lld\n",
+ __func__, phy_freq / 1000ULL, vclk_freq / 1000ULL,
+ venc_freq / 1000ULL, hdmi_freq / 1000ULL);
- return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
+ return meson_vclk_vic_supported_freq(priv, phy_freq / 1000ULL,
+ vclk_freq / 1000ULL);
}
static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index eb4c251d79b7..35884fd4ba1c 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -1088,7 +1088,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
if ((phy_freq == params[freq].phy_freq ||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10 ||
+ ((phy_freq/10)*10) == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
(vclk_freq == params[freq].vclk_freq ||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
if (vclk_freq != params[freq].vclk_freq)
--
2.34.1

101
projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-drm-meson-fix-more-rounding-issues.patch Normal file
View File

@ -0,0 +1,101 @@
From 32f902ef907e93e437ea3747b6ac07a60f6159e3 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sun, 8 Jun 2025 22:22:01 +0200
Subject: [PATCH 50/50] drm/meson: fix more rounding issues
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
drivers/gpu/drm/meson/meson_vclk.c | 56 +++++++++++++++++++-----------
1 file changed, 35 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
index 13fb985ba207..ced5165c6ea6 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/drivers/gpu/drm/meson/meson_vclk.c
@@ -110,10 +110,8 @@
#define HDMI_PLL_LOCK BIT(31)
#define HDMI_PLL_LOCK_G12A (3 << 30)
-#define PIXEL_FREQ_1000_1001(_freq) \
- DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
-#define PHY_FREQ_1000_1001(_freq) \
- (PIXEL_FREQ_1000_1001(DIV_ROUND_DOWN_ULL(_freq, 10ULL)) * 10)
+
+#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
/* VID PLL Dividers */
enum {
@@ -786,6 +784,36 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
pll_freq);
}
+static bool meson_vclk_freqs_are_matching_param(unsigned int idx,
+ unsigned long long phy_freq,
+ unsigned long long vclk_freq)
+{
+ DRM_DEBUG_DRIVER("i = %d vclk_freq = %lluHz alt = %lluHz\n",
+ idx, params[idx].vclk_freq,
+ FREQ_1000_1001(params[idx].vclk_freq));
+ DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
+ idx, params[idx].phy_freq,
+ FREQ_1000_1001(params[idx].phy_freq));
+
+ /* Match strict frequency */
+ if (phy_freq == params[idx].phy_freq &&
+ vclk_freq == params[idx].vclk_freq)
+ return true;
+
+ /* Match 1000/1001 variant: vclk deviation has to be less than 1kHz
+ * (drm EDID is defined in 1kHz steps, so everything smaller must be
+ * rounding error) and the PHY freq deviation has to be less than
+ * 10kHz (as the TMDS clock is 10 times the pixel clock, so anything
+ * smaller must be rounding error as well).
+ */
+ if (abs(vclk_freq - FREQ_1000_1001(params[idx].vclk_freq)) < 1000 &&
+ abs(phy_freq - FREQ_1000_1001(params[idx].phy_freq)) < 10000)
+ return true;
+
+ /* no match */
+ return false;
+}
+
enum drm_mode_status
meson_vclk_vic_supported_freq(struct meson_drm *priv,
unsigned long long phy_freq,
@@ -804,19 +832,7 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv,
}
for (i = 0 ; params[i].pixel_freq ; ++i) {
- DRM_DEBUG_DRIVER("i = %d vclk_freq = %lluHz alt = %lluHz\n",
- i, params[i].vclk_freq,
- PIXEL_FREQ_1000_1001(params[i].vclk_freq));
- DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
- i, params[i].phy_freq,
- PHY_FREQ_1000_1001(params[i].phy_freq));
- /* Match strict frequency */
- if (phy_freq == params[i].phy_freq &&
- vclk_freq == params[i].vclk_freq)
- return MODE_OK;
- /* Match 1000/1001 variant */
- if (phy_freq == PHY_FREQ_1000_1001(params[i].phy_freq) &&
- vclk_freq == PIXEL_FREQ_1000_1001(params[i].vclk_freq))
+ if (meson_vclk_freqs_are_matching_param(i, phy_freq, vclk_freq))
return MODE_OK;
}
@@ -1093,10 +1109,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
}
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
- if ((phy_freq == params[freq].phy_freq ||
- phy_freq == PHY_FREQ_1000_1001(params[freq].phy_freq)) &&
- (vclk_freq == params[freq].vclk_freq ||
- vclk_freq == PIXEL_FREQ_1000_1001(params[freq].vclk_freq))) {
+ if (meson_vclk_freqs_are_matching_param(freq, phy_freq,
+ vclk_freq)) {
if (vclk_freq != params[freq].vclk_freq)
vic_alternate_clock = true;
else
--
2.34.1

3
projects/Amlogic/linux/linux.aarch64.conf
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.15.0 Kernel Configuration
# Linux/arm64 6.15.1 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0"
CONFIG_CC_IS_GCC=y
@ -2691,6 +2691,7 @@ CONFIG_RTW88_8821C=m
CONFIG_RTW88_88XXA=m
CONFIG_RTW88_8821A=m
CONFIG_RTW88_8812A=m
CONFIG_RTW88_8814A=m
# CONFIG_RTW88_8822BE is not set
CONFIG_RTW88_8822BS=m
CONFIG_RTW88_8822BU=m