Merge pull request #4074 from jernejsk/a20

Allwinner: Add support for A20

packages/audio/alsa-utils/scripts/soundconfig

@@ -119,6 +119,11 @@ else
 # Allwinner H3 Analog
   mixer $card 'Line Out' 0db on
 
+# Allwinner A20 Analog
+  mixer $card 'Power Amplifier' 0db
+  mixer $card 'Power Amplifier DAC' on
+  mixer $card 'Power Amplifier Mute' on
+
 # Allwinner A64 Analog
   mixer $card Headphone 0db on
   mixer $card 'AIF1 Slot 0 Digital DAC' on

projects/Allwinner/devices/A20/bootloader/release

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (C) 2019-present Team LibreELEC (https://libreelec.tv)
+
+mkdir -p $RELEASE_DIR/3rdparty/bootloader
+  if [ -n "$UBOOT_SYSTEM" ]; then
+    cp -a $(get_build_dir $BOOTLOADER)/u-boot-sunxi-with-spl.bin $RELEASE_DIR/3rdparty/bootloader
+  fi
+
+  cp -a $(get_build_dir linux)/arch/$TARGET_KERNEL_ARCH/boot/dts/sun7i-a20-*.dtb $RELEASE_DIR/3rdparty/bootloader

projects/Allwinner/devices/A20/options

@@ -0,0 +1,51 @@
+################################################################################
+# setup system defaults
+################################################################################
+
+  # The TARGET_CPU variable controls which processor should be targeted for
+  # generated code.
+    case $TARGET_ARCH in
+      arm)
+        # TARGET_CPU:
+        # arm2 arm250 arm3 arm6 arm60 arm600 arm610 arm620 arm7 arm7m arm7d
+        # arm7dm arm7di arm7dmi arm70 arm700 arm700i arm710 arm710c
+        # arm7100 arm720 arm7500 arm7500fe arm7tdmi arm7tdmi-s arm710t
+        # arm720t arm740t strongarm strongarm110 strongarm1100
+        # strongarm1110 arm8 arm810 arm9 arm9e arm920 arm920t arm922t
+        # arm946e-s arm966e-s arm968e-s arm926ej-s arm940t arm9tdmi
+        # arm10tdmi arm1020t arm1026ej-s arm10e arm1020e arm1022e
+        # arm1136j-s arm1136jf-s mpcore mpcorenovfp arm1156t2-s
+        # arm1176jz-s arm1176jzf-s cortex-a8 cortex-a9 cortex-r4
+        # cortex-r4f cortex-m3 cortex-m1 xscale iwmmxt iwmmxt2 ep9312.
+        TARGET_CPU="cortex-a7"
+
+        # TARGET_FLOAT:
+        # Specifies which floating-point ABI to use. Permissible values are:
+        # soft hard
+        TARGET_FLOAT="hard"
+
+        # TARGET_FPU:
+        # This specifies what floating point hardware (or hardware emulation) is
+        # available on the target. Permissible names are:
+        # fpa fpe2 fpe3 maverick vfp vfpv3 vfpv3-fp16 vfpv3-d16 vfpv3-d16-fp16
+        # vfpv3xd vfpv3xd-fp16 neon neon-fp16 vfpv4 vfpv4-d16 fpv4-sp-d16
+        # neon-vfpv4.
+        TARGET_FPU="neon-vfpv4"
+        ;;
+    esac
+
+  # Kernel target
+    KERNEL_TARGET="zImage"
+
+  # OpenGL-ES implementation to use (no / bcm2835-driver / gpu-viv-bin-mx6q)
+    OPENGLES="libmali"
+
+  # Mali GPU family
+    MALI_FAMILY="400"
+
+  # KODI Player implementation to use (default / bcm2835-driver / libfslvpuwrap)
+    KODIPLAYER_DRIVER="$OPENGLES"
+
+  # set the addon dirs
+    ADDON_PATH="$ADDON_VERSION/H3/$TARGET_ARCH"
+    ADDON_URL="$ADDON_SERVER_URL/$ADDON_PATH"

projects/Allwinner/devices/A20/patches/linux/disp-fix.patch

@@ -0,0 +1,193 @@
+From ae3215d37ca2a55642bcae6c83c3612e26275711 Mon Sep 17 00:00:00 2001
+From: Luc Verhaegen <libv@skynet.be>
+Date: Thu, 8 Aug 2019 16:27:37 +0200
+Subject: [PATCH] kms:sunxi: add engine->crtc_mode_set() hook
+
+This exposes both shortcomings in universal planes, and the superfluous
+intermediate structure of _engine.
+
+Our backends are half the conceptual old-skool style CRTC, and half the
+sequencer/composer. It does not need to have any layer enabled or any
+buffer attached to do something useful, it can just show a background
+colour. Our 4 main layers are fully independent and can be ordered
+(almost) at will. There is no primary layer.
+
+Universal planes still asume that there is a primary layer. And also do
+limited checking on whether this actually true.
+
+The sun4i driver has, for some reason, an _engine struct in between,
+that serves no purpose other than to provide separation where no
+separation is needed, and it is clear in several cases that this
+separation has holes in it. It also is a psychological barrier for
+exposing things as the hardware sees it.
+
+So instead of quickly bolting up some code to set the crtc width and
+height in the backend, it was deferred to setting the primary plane.
+
+So while KMS assumes that there is a primary plane, it never enforces
+the primary plane to be the same dimensions as the CRTC.
+
+So one is able to set the faux primary plane to whatever dimensions one
+likes, which then has the backend set to those dimensions, which then
+trips up our whole setup...
+
+A very avoidable problem, on multiple fronts.
+
+Also, we set interlacing with _every_ plane format set. This while this
+conceptually belongs to the CRTC. The fact that the information comes
+from the modeline should've tipped people off that this was wrong.
+
+Let's at least get rid of this engine struct in future, and have direct
+code dependencies between modules, so that at least this psychological
+barrier disappears.
+
+Signed-off-by: Luc Verhaegen <libv@skynet.be>
+---
+ drivers/gpu/drm/sun4i/sun4i_backend.c | 43 ++++++++++++++-------------
+ drivers/gpu/drm/sun4i/sun4i_crtc.c    |  2 ++
+ drivers/gpu/drm/sun4i/sun8i_mixer.c   |  7 +++++
+ drivers/gpu/drm/sun4i/sunxi_engine.h  |  7 +++++
+ 4 files changed, 39 insertions(+), 20 deletions(-)
+
+diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
+index 606b33a28be5..4d7a33d0f77f 100644
+--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
++++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
+@@ -164,6 +164,28 @@ bool sun4i_backend_format_is_supported(uint32_t fmt, uint64_t modifier)
+ 	return 0;
+ }
+ 
++static int sun4i_backend_crtc_mode_set(struct sunxi_engine *engine,
++				       struct drm_display_mode *mode)
++{
++	DRM_DEBUG_DRIVER("%s(DEBE%d);\n", __func__, engine->id);
++
++	regmap_write(engine->regs, SUN4I_BACKEND_DISSIZE_REG,
++		     SUN4I_BACKEND_DISSIZE(mode->crtc_hdisplay,
++					   mode->crtc_vdisplay));
++
++	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
++		DRM_DEBUG_DRIVER("%s(DEBE%d): Enabling interlacing.\n",
++				 __func__, engine->id);
++		regmap_update_bits(engine->regs, SUN4I_BACKEND_MODCTL_REG,
++				   SUN4I_BACKEND_MODCTL_ITLMOD_EN,
++				   SUN4I_BACKEND_MODCTL_ITLMOD_EN);
++	} else
++		regmap_update_bits(engine->regs, SUN4I_BACKEND_MODCTL_REG,
++				   SUN4I_BACKEND_MODCTL_ITLMOD_EN, 0);
++
++	return 0;
++}
++
+ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
+ 				     int layer, struct drm_plane *plane)
+ {
+@@ -171,14 +193,6 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
+ 
+ 	DRM_DEBUG_DRIVER("Updating layer %d\n", layer);
+ 
+-	if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
+-		DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n",
+-				 state->crtc_w, state->crtc_h);
+-		regmap_write(backend->engine.regs, SUN4I_BACKEND_DISSIZE_REG,
+-			     SUN4I_BACKEND_DISSIZE(state->crtc_w,
+-						   state->crtc_h));
+-	}
+-
+ 	/* Set height and width */
+ 	DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n",
+ 			 state->crtc_w, state->crtc_h);
+@@ -325,24 +339,12 @@ int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
+ {
+ 	struct drm_plane_state *state = plane->state;
+ 	struct drm_framebuffer *fb = state->fb;
+-	bool interlaced = false;
+ 	u32 val;
+ 	int ret;
+ 
+ 	/* Clear the YUV mode */
+ 	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),
+ 			   SUN4I_BACKEND_ATTCTL_REG0_LAY_YUVEN, 0);
+-
+-	if (plane->state->crtc)
+-		interlaced = plane->state->crtc->state->adjusted_mode.flags
+-			& DRM_MODE_FLAG_INTERLACE;
+-
+-	regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,
+-			   SUN4I_BACKEND_MODCTL_ITLMOD_EN,
+-			   interlaced ? SUN4I_BACKEND_MODCTL_ITLMOD_EN : 0);
+-
+-	DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",
+-			 interlaced ? "on" : "off");
+ 
+ 	if (fb->format->is_yuv)
+ 		return sun4i_backend_update_yuv_format(backend, layer, plane);
+@@ -920,6 +922,7 @@ static const struct sunxi_engine_ops sun4i_backend_engine_ops = {
+ 	.apply_color_correction		= sun4i_backend_apply_color_correction,
+ 	.disable_color_correction	= sun4i_backend_disable_color_correction,
+ 	.vblank_quirk			= sun4i_backend_vblank_quirk,
++	.crtc_mode_set			= sun4i_backend_crtc_mode_set,
+ };
+ 
+ static struct regmap_config sun4i_backend_regmap_config = {
+diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c
+index 9d8504f813a4..cc569d0ec49c 100644
+--- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
++++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
+@@ -138,8 +138,10 @@ static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
+ 	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
+ 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
+ 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
++	struct sunxi_engine *engine = scrtc->engine;
+ 
+ 	sun4i_tcon_mode_set(scrtc->tcon, encoder, mode);
++	engine->ops->crtc_mode_set(engine, mode);
+ }
+ 
+ static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
+diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
+index c2eedf58bf4b..2d6c7c4501b8 100644
+--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
++++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
+@@ -307,9 +307,16 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm,
+ 	return planes;
+ }
+ 
++static int sun8i_mixer_crtc_mode_set(struct sunxi_engine *engine,
++				     struct drm_display_mode *mode)
++{
++	return 0;
++}
++
+ static const struct sunxi_engine_ops sun8i_engine_ops = {
+ 	.commit		= sun8i_mixer_commit,
+ 	.layers_init	= sun8i_layers_init,
++	.crtc_mode_set	= sun8i_mixer_crtc_mode_set,
+ };
+ 
+ static struct regmap_config sun8i_mixer_regmap_config = {
+diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h
+index 548710a936d5..1f3aaef2cabc 100644
+--- a/drivers/gpu/drm/sun4i/sunxi_engine.h
++++ b/drivers/gpu/drm/sun4i/sunxi_engine.h
+@@ -9,6 +9,7 @@
+ struct drm_plane;
+ struct drm_device;
+ struct drm_crtc_state;
++struct drm_display_mode;
+ 
+ struct sunxi_engine;
+ 
+@@ -108,6 +109,12 @@ struct sunxi_engine_ops {
+ 	 * This function is optional.
+ 	 */
+ 	void (*vblank_quirk)(struct sunxi_engine *engine);
++
++	/*
++	 * Sets amongst others, CRTC dimensions, and interlacing.
++	 */
++	int (*crtc_mode_set)(struct sunxi_engine *engine,
++			     struct drm_display_mode *mode);
+ };
+ 
+ /**

projects/Allwinner/linux/linux.arm.conf

@@ -329,7 +329,7 @@ CONFIG_ARCH_SUNXI=y
 # CONFIG_MACH_SUN4I is not set
 # CONFIG_MACH_SUN5I is not set
 # CONFIG_MACH_SUN6I is not set
-# CONFIG_MACH_SUN7I is not set
+CONFIG_MACH_SUN7I=y
 CONFIG_MACH_SUN8I=y
 # CONFIG_MACH_SUN9I is not set
 CONFIG_ARCH_SUNXI_MC_SMP=y
@@ -367,6 +367,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_ARM_THUMBEE is not set
 CONFIG_ARM_VIRT_EXT=y
 CONFIG_SWP_EMULATE=y
+# CONFIG_CPU_BIG_ENDIAN is not set
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
@@ -387,6 +388,7 @@ CONFIG_ARM_L1_CACHE_SHIFT_6=y
 CONFIG_ARM_L1_CACHE_SHIFT=6
 CONFIG_ARM_DMA_MEM_BUFFERABLE=y
 CONFIG_ARM_HEAVY_MB=y
+CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
 CONFIG_DEBUG_ALIGN_RODATA=y
 # CONFIG_ARM_ERRATA_430973 is not set
 CONFIG_ARM_ERRATA_643719=y
@@ -1191,6 +1193,7 @@ CONFIG_CAN_DEV=y
 CONFIG_CAN_CALC_BITTIMING=y
 # CONFIG_CAN_FLEXCAN is not set
 # CONFIG_CAN_GRCAN is not set
+# CONFIG_CAN_SUN4I is not set
 # CONFIG_CAN_TI_HECC is not set
 # CONFIG_CAN_C_CAN is not set
 # CONFIG_CAN_CC770 is not set
@@ -1754,9 +1757,9 @@ CONFIG_FIXED_PHY=y
 # CONFIG_LXT_PHY is not set
 # CONFIG_MARVELL_PHY is not set
 # CONFIG_MARVELL_10G_PHY is not set
-# CONFIG_MICREL_PHY is not set
+CONFIG_MICREL_PHY=y
-# CONFIG_MICROCHIP_PHY is not set
+CONFIG_MICROCHIP_PHY=y
-# CONFIG_MICROCHIP_T1_PHY is not set
+CONFIG_MICROCHIP_T1_PHY=y
 # CONFIG_MICROSEMI_PHY is not set
 # CONFIG_NATIONAL_PHY is not set
 # CONFIG_NXP_TJA11XX_PHY is not set
@@ -1764,12 +1767,12 @@ CONFIG_FIXED_PHY=y
 # CONFIG_REALTEK_PHY is not set
 # CONFIG_RENESAS_PHY is not set
 # CONFIG_ROCKCHIP_PHY is not set
-# CONFIG_SMSC_PHY is not set
+CONFIG_SMSC_PHY=y
 # CONFIG_STE10XP is not set
 # CONFIG_TERANETICS_PHY is not set
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_XILINX_GMII2RGMII is not set
-# CONFIG_MICREL_KS8995MA is not set
+CONFIG_MICREL_KS8995MA=y
 CONFIG_PPP=m
 CONFIG_PPP_BSDCOMP=m
 CONFIG_PPP_DEFLATE=m
@@ -2281,7 +2284,7 @@ CONFIG_PINMUX=y
 CONFIG_PINCONF=y
 CONFIG_GENERIC_PINCONF=y
 # CONFIG_DEBUG_PINCTRL is not set
-# CONFIG_PINCTRL_AXP209 is not set
+CONFIG_PINCTRL_AXP209=y
 # CONFIG_PINCTRL_AMD is not set
 # CONFIG_PINCTRL_MCP23S08 is not set
 # CONFIG_PINCTRL_SINGLE is not set
@@ -2389,7 +2392,9 @@ CONFIG_POWER_SUPPLY_HWMON=y
 # CONFIG_CHARGER_SBS is not set
 # CONFIG_MANAGER_SBS is not set
 # CONFIG_BATTERY_BQ27XXX is not set
-# CONFIG_AXP20X_POWER is not set
+# CONFIG_CHARGER_AXP20X is not set
+# CONFIG_BATTERY_AXP20X is not set
+CONFIG_AXP20X_POWER=y
 # CONFIG_AXP288_FUEL_GAUGE is not set
 # CONFIG_BATTERY_MAX17040 is not set
 # CONFIG_BATTERY_MAX17042 is not set
@@ -3418,7 +3423,7 @@ CONFIG_DRM_KMS_CMA_HELPER=y
 # CONFIG_DRM_RCAR_LVDS is not set
 CONFIG_DRM_SUN4I=y
 CONFIG_DRM_SUN4I_HDMI=y
-# CONFIG_DRM_SUN4I_HDMI_CEC is not set
+CONFIG_DRM_SUN4I_HDMI_CEC=y
 CONFIG_DRM_SUN4I_BACKEND=y
 CONFIG_DRM_SUN6I_DSI=y
 CONFIG_DRM_SUN8I_DW_HDMI=y
@@ -3725,7 +3730,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y
 # CONFIG_SND_SOC_SGTL5000 is not set
 # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
 # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
-# CONFIG_SND_SOC_SPDIF is not set
+CONFIG_SND_SOC_SPDIF=y
 # CONFIG_SND_SOC_SSM2305 is not set
 # CONFIG_SND_SOC_SSM2602_SPI is not set
 # CONFIG_SND_SOC_SSM2602_I2C is not set
@@ -4339,6 +4344,7 @@ CONFIG_RTC_I2C_AND_SPI=y
 # on-CPU RTC drivers
 #
 CONFIG_RTC_DRV_SUN6I=y
+CONFIG_RTC_DRV_SUNXI=y
 # CONFIG_RTC_DRV_CADENCE is not set
 # CONFIG_RTC_DRV_FTRTC010 is not set
 # CONFIG_RTC_DRV_SNVS is not set
@@ -4357,6 +4363,7 @@ CONFIG_DMA_ENGINE=y
 CONFIG_DMA_VIRTUAL_CHANNELS=y
 CONFIG_DMA_OF=y
 # CONFIG_ALTERA_MSGDMA is not set
+CONFIG_DMA_SUN4I=y
 CONFIG_DMA_SUN6I=y
 # CONFIG_DW_AXI_DMAC is not set
 # CONFIG_FSL_EDMA is not set
@@ -4526,13 +4533,18 @@ CONFIG_COMMON_CLK=y
 # CONFIG_COMMON_CLK_PWM is not set
 # CONFIG_COMMON_CLK_VC5 is not set
 # CONFIG_COMMON_CLK_FIXED_MMIO is not set
-# CONFIG_CLK_SUNXI is not set
+CONFIG_CLK_SUNXI=y
+CONFIG_CLK_SUNXI_CLOCKS=y
+# CONFIG_CLK_SUNXI_PRCM_SUN6I is not set
+# CONFIG_CLK_SUNXI_PRCM_SUN8I is not set
+# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set
 CONFIG_SUNXI_CCU=y
-CONFIG_SUN8I_A23_CCU=y
+CONFIG_SUN4I_A10_CCU=y
-CONFIG_SUN8I_A33_CCU=y
+# CONFIG_SUN8I_A23_CCU is not set
-CONFIG_SUN8I_A83T_CCU=y
+# CONFIG_SUN8I_A33_CCU is not set
+# CONFIG_SUN8I_A83T_CCU is not set
 CONFIG_SUN8I_H3_CCU=y
-CONFIG_SUN8I_V3S_CCU=y
+# CONFIG_SUN8I_V3S_CCU is not set
 CONFIG_SUN8I_DE2_CCU=y
 # CONFIG_SUN8I_R40_CCU is not set
 CONFIG_SUN8I_R_CCU=y
@@ -4547,6 +4559,7 @@ CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
 CONFIG_CLKSRC_MMIO=y
 CONFIG_SUN4I_TIMER=y
+CONFIG_SUN5I_HSTIMER=y
 CONFIG_ARM_ARCH_TIMER=y
 CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
 # end of Clock Source drivers
@@ -4705,7 +4718,7 @@ CONFIG_IIO_SW_TRIGGER=y
 # CONFIG_AD7923 is not set
 # CONFIG_AD7949 is not set
 # CONFIG_AD799X is not set
-# CONFIG_AXP20X_ADC is not set
+CONFIG_AXP20X_ADC=y
 # CONFIG_AXP288_ADC is not set
 # CONFIG_CC10001_ADC is not set
 # CONFIG_ENVELOPE_DETECTOR is not set

scripts/uboot_helper

@@ -21,6 +21,36 @@ import sys
 devices = \
 {
   'Allwinner': {
+    'A20' : {
+      'bananapi': {
+        'dtb': 'sun7i-a20-bananapi.dtb',
+        'config': 'Bananapi_defconfig'
+      },
+      'cubieboard2': {
+        'dtb': 'sun7i-a20-cubieboard2.dtb',
+        'config': 'Cubieboard2_defconfig'
+      },
+      'cubietruck': {
+        'dtb': 'sun7i-a20-cubietruck.dtb',
+        'config': 'Cubietruck_defconfig'
+      },
+      'lime': {
+        'dtb': 'sun7i-a20-olinuxino-lime.dtb',
+        'config': 'A20-OLinuXino-Lime_defconfig'
+      },
+      'lime2': {
+        'dtb': 'sun7i-a20-olinuxino-lime2.dtb',
+        'config': 'A20-OLinuXino-Lime2_defconfig'
+      },
+      'micro': {
+        'dtb': 'sun7i-a20-olinuxino-micro.dtb',
+        'config': 'A20-OLinuXino_MICRO_defconfig'
+      },
+      'mk808c': {
+        'dtb': 'sun7i-a20-mk808c.dtb',
+        'config': 'MK808C_defconfig'
+      },
+    },
     'A64': {
       'orangepi-win': {
         'dtb': 'sun50i-a64-orangepi-win.dtb',