jeans/LibreELEC.tv
jeans/LibreELEC.tv
1
0
Fork 0
mirror of https://github.com/LibreELEC/LibreELEC.tv.git synced 2025-07-24 11:16:51 +00:00
Code Issues Packages Projects Releases Wiki Activity

linux (RPi): update to 6.6.47-ba0f221

Browse Source 
Drop local PR6309 "no signal after modeswitch" patch which is now
in the RPi kernel.

Signed-off-by: Matthias Reichl <hias@horus.com>
This commit is contained in:
Matthias Reichl 2024-08-22 22:48:16 +02:00
parent bd771c9faf
commit a521ab9ee9
2 changed files with 2 additions and 102 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
packages/linux/package.mk
View File

@ -23,8 +23,8 @@ case "${LINUX}" in
PKG_PATCH_DIRS="default"
;;
raspberrypi)
PKG_VERSION="209e8a3e6646f25abb352fd5a8a4c2e855b1e952" # 6.6.45
PKG_SHA256="76fa23eda2d1690ac73e783fd11cabebe1f1f8ec8693f3491cda7d155df1b6d4"
PKG_VERSION="ba0f2212e0e100ee16bdde76b7efca6bb8ee9446" # 6.6.47
PKG_SHA256="cd80c9f7a53bbe74d28bcd6c7d02d8c912a481f8744395d14807bf9a82c226e1"
PKG_URL="https://github.com/raspberrypi/linux/archive/${PKG_VERSION}.tar.gz"
PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
;;

100
packages/linux/patches/raspberrypi/linux-010-pr6309-fix-no-signal-after-modeswitch.patch
View File

@ -1,100 +0,0 @@
From 733e7a51a128e950d210ef3652f5427e4179e17a Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Mon, 12 Aug 2024 13:31:58 +0100
Subject: [PATCH 1/3] drm/vc4: Add a delay after disabling hdmi phy output
There appears to be a requirement for some devices
(I'm testing with a 8K VRROOM 40Gbps HDMI switch)
for a measable delay between removing the hdmi phy output from
the old mode, to enabling the hdmi phy output for the new mode.
Without the delay, a mode switch has a small change of getting a permanent
'no signal', which requires a subsequent mode switch or a unplug/replug
to redetect.
Switching between 4kp24/25/30 modes fails about 5% of time in my testing.
Add a delay to make it impossible to switch faster than this.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 859ac51d06f3a..c85737f2b7f73 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -668,6 +668,7 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
* someone was waiting it.
*/
vc4_crtc_send_vblank(crtc);
+ msleep(20);
}
static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
From 75c37d08890881c02a5db5ef763ef7e97f4253d3 Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 13 Aug 2024 16:13:16 +0100
Subject: [PATCH 2/3] drm/vc4: Implement vc6_hdmi_phy_disable
The body of this function was missing so we don't reset the phy
when disabling it.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
index 0d55627148327..f36558932f083 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
@@ -1197,4 +1197,9 @@ void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
void vc6_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi)
{
+ unsigned long flags;
+
+ spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
+ vc6_hdmi_reset_phy(vc4_hdmi);
+ spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}
From 1360bf475f7a12392e041bb80b20e21b677dcd4c Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Tue, 13 Aug 2024 17:18:51 +0100
Subject: [PATCH 3/3] drm/vc4: Also power down the PLL core when resetting PHY
The current reset code doesn't actually stop the hdmi output.
That makes it difficult for displays to handle a mode set.
Powering down the PLL does actually remove the hdmi signal
and makes mode sets more reliable
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
index f36558932f083..83801c2684250 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
@@ -137,6 +137,7 @@
#define VC6_HDMI_TX_PHY_PLL_REFCLK_REFCLK_SEL_CMOS BIT(13)
#define VC6_HDMI_TX_PHY_PLL_REFCLK_REFFRQ_MASK VC4_MASK(9, 0)
+#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN BIT(4)
#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_CLK0_SEL_MASK VC4_MASK(3, 2)
#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_KDIV_MASK VC4_MASK(1, 0)
@@ -947,6 +948,7 @@ static void vc6_hdmi_reset_phy(struct vc4_hdmi *vc4_hdmi)
HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0);
HDMI_WRITE(HDMI_TX_PHY_POWERUP_CTL, 0);
+ HDMI_WRITE(HDMI_TX_PHY_PLL_POST_KDIV, VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN);
}
void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,