From 941532f7d86dae7f191d21d7dff6749365a44ba3 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 10 Jan 2013 22:37:35 +0100 Subject: [PATCH 001/104] xbmc-addon-settings: update to our next-gen addon Signed-off-by: Stephan Raue --- .../config/default_settings.xml | 37 -------- .../init.d/05_systemconfig | 34 -------- .../mediacenter/xbmc-addon-settings/install | 6 +- packages/mediacenter/xbmc-addon-settings/meta | 10 +-- .../xbmc-addon-settings/source/addon.xml | 23 ----- .../xbmc-addon-settings/source/icon.png | Bin 12731 -> 0 bytes .../resources/language/Danish/strings.xml | 40 --------- .../resources/language/Dutch/strings.xml | 41 --------- .../resources/language/English/strings.xml | 49 ----------- .../resources/language/Finnish/strings.xml | 40 --------- .../resources/language/French/strings.xml | 43 --------- .../resources/language/German/strings.xml | 40 --------- .../resources/language/Hungarian/strings.xml | 39 --------- .../resources/language/Norwegian/strings.xml | 40 --------- .../resources/language/Polish/strings.xml | 40 --------- .../resources/language/Spanish/strings.xml | 40 --------- .../resources/language/Turkish/strings.xml | 43 --------- .../source/resources/settings.xml | 82 ------------------ .../{source/default.py => unpack} | 23 ++--- 19 files changed, 14 insertions(+), 656 deletions(-) delete mode 100644 packages/mediacenter/xbmc-addon-settings/config/default_settings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/init.d/05_systemconfig delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/addon.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/icon.png delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Danish/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Dutch/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/English/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Finnish/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/French/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/German/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Hungarian/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Norwegian/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Polish/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Spanish/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/language/Turkish/strings.xml delete mode 100644 packages/mediacenter/xbmc-addon-settings/source/resources/settings.xml rename packages/mediacenter/xbmc-addon-settings/{source/default.py => unpack} (70%) mode change 100644 => 100755 diff --git a/packages/mediacenter/xbmc-addon-settings/config/default_settings.xml b/packages/mediacenter/xbmc-addon-settings/config/default_settings.xml deleted file mode 100644 index 67d8b9c81a..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/config/default_settings.xml +++ /dev/null @@ -1,37 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/packages/mediacenter/xbmc-addon-settings/init.d/05_systemconfig b/packages/mediacenter/xbmc-addon-settings/init.d/05_systemconfig deleted file mode 100644 index 67c1f97e66..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/init.d/05_systemconfig +++ /dev/null @@ -1,34 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# -# copy userconfig and samples -# -# runlevels: openelec, textmode - -progress "copy system config" - -if [ -f /usr/share/xbmc/addons/os.openelec.settings/default_settings.xml ]; then - if [ ! -f $HOME/.xbmc/userdata/addon_data/os.openelec.settings/settings.xml ]; then - mkdir -p $HOME/.xbmc/userdata/addon_data/os.openelec.settings - cp /usr/share/xbmc/addons/os.openelec.settings/default_settings.xml \ - $HOME/.xbmc/userdata/addon_data/os.openelec.settings/settings.xml - fi -fi diff --git a/packages/mediacenter/xbmc-addon-settings/install b/packages/mediacenter/xbmc-addon-settings/install index 8bdfac1944..2f078388e4 100755 --- a/packages/mediacenter/xbmc-addon-settings/install +++ b/packages/mediacenter/xbmc-addon-settings/install @@ -22,7 +22,5 @@ . config/options $1 -mkdir -p $INSTALL/usr/share/xbmc/addons/os.openelec.settings - cp -R $PKG_DIR/source/* $INSTALL/usr/share/xbmc/addons/os.openelec.settings - cp -R $PKG_DIR/config/* $INSTALL/usr/share/xbmc/addons/os.openelec.settings - $SED "s|@OS_VERSION@|$OS_VERSION|g" -i $INSTALL/usr/share/xbmc/addons/os.openelec.settings/addon.xml +mkdir -p $INSTALL/usr/share/xbmc/addons/xbmc-addon-settings + cp -R $PKG_BUILD/service.openelec.settings/* $INSTALL/usr/share/xbmc/addons/xbmc-addon-settings diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 3253332925..f0215df3d0 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,14 +19,14 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="1" +PKG_VERSION="0.0.5" PKG_REV="1" PKG_ARCH="any" -PKG_LICENSE="GPL" +PKG_LICENSE="prop." PKG_SITE="http://www.openelec.tv" -PKG_URL="" -PKG_DEPENDS="" -PKG_BUILD_DEPENDS="toolchain" +PKG_URL="http://www.fiebach.de/xbmc/addons/service.openelec.settings/service.openelec.settings-$PKG_VERSION.zip" +PKG_DEPENDS="connman" +PKG_BUILD_DEPENDS="toolchain python" PKG_PRIORITY="optional" PKG_SECTION="mediacenter" PKG_SHORTDESC="xbmc-addon-settings: Settings dialog for OpenELEC" diff --git a/packages/mediacenter/xbmc-addon-settings/source/addon.xml b/packages/mediacenter/xbmc-addon-settings/source/addon.xml deleted file mode 100644 index db3144d7f4..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/addon.xml +++ /dev/null @@ -1,23 +0,0 @@ - - - - - - - - - OpenELEC OS Settings Dialog - OpenELEC OS indstillinger - OpenELEC OS Ayarları İletişim Kutusu - OpenELEC OS Panel ustawień - OpenElec OS Settings Dialog - OpenElec OS indstillinger - OpenElec OS Ayarları İletişim Kutusu - OpenELEC OS Panel ustawień - all - - diff --git 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præfixlængde - Netværks gateway - DNS server 1 - DNS server 2 - DNS server 3 - WLAN indstillinger - WLAN SSID - Skjult netværk - WLAN sikkerhed - WLAN kodeord - - - Services - Samba - Start Samba ved opstart af systemet - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Dutch/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Dutch/strings.xml deleted file mode 100644 index a4d734b9a2..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Dutch/strings.xml +++ /dev/null @@ -1,41 +0,0 @@ - - - - - Systeem - Toetsenbord - Toetsenbord layout - Toetsenbord layout #2 - Systeem update - Systeem update - LCD/VFD Driver - Te gebruiken LCD Driver - - - Netwerk - Netwerk 2 - Standaard instellingen - Netwerknaam - Netwerk apparaat - Netwerk soort - Netwerk apparaat of MAC adres - IP instellingen - Statisch IP adres - Netwerkprefix lengte - Netwerk gateway - DNS server 1 - DNS server 2 - DNS server 3 - WLAN Instellingen - WLAN SSID (router naam) - Verborgen netwerk - WLAN beveiliging - WLAN wachtwoord - - - Services - Samba - Start Samba bij het opstarten - - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/English/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/English/strings.xml deleted file mode 100644 index 2b5b78f4b8..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/English/strings.xml +++ /dev/null @@ -1,49 +0,0 @@ - - - - - System - Keyboard - Keyboard layout - Alternate keyboard layout (optional) - System Update - System Update - LCD/VFD - LCD Driver to use - HDD standby - Enable HDD standby - HDD standby timeout (minutes) - - - Network - Network 2 - General - Hostname - Network Adapter - Network Technology - Network Interface - IP settings - Static IP address - Netmask Prefixlength - Network gateway - DNS server 1 - DNS server 2 - DNS server 3 - WLAN settings - WLAN SSID - Hidden Network - WLAN Security - WLAN Passphrase - - - Services - Samba - Start Samba at boot - Use Samba Passwords - Samba Username - Samba Password - - SSH - Start ssh server at boot - Disable password authentication - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Finnish/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Finnish/strings.xml deleted file mode 100644 index 2fd6d51e9a..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Finnish/strings.xml +++ /dev/null @@ -1,40 +0,0 @@ - - - - - Järjestelmä - Näppäimistö - Näppäimistön asettelu - Vaihtoehtoinen näppäimistön asettelu (valinnainen) - Järjestelmän päivitys - Järjestelmän päivitys - LCD/VFD - Käytettävä LCD-ajuri - - - Verkko - Verkko 2 - Yleinen - Tietokoneen nimi - Verkkosovitin - Verkon tyyppi - Verkkoliityntä - IP-asetukset - Staattinen IP-asetus - Verkkopeitteen pituus bitteinä - Verkon yhdyskäytävä - DNS-palvelin 1 - DNS-palvelin 2 - DNS-palvelin 3 - WLAN-asetukset - WLAN SSID - Piilotettu verkko - WLAN salaustapa - WLAN salasana - - - Services - Samba - Käynnistä Samba käynnistyksen yhteydessä - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/French/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/French/strings.xml deleted file mode 100644 index 9cd9007f61..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/French/strings.xml +++ /dev/null @@ -1,43 +0,0 @@ - - - - - Système - Clavier - Clavier - Clavier alternatif (facultatif) - Mise à jour du système - Mise à jour du système - LCD/VFD - Pilote LCD - - - Réseau - Réseau 2 - Général - Nom d'hôte - Réseau - Type de réseau - Interface réseau - Paramètres IP - Adresse IP statique - Longueur du masque sous-réseau - Passerelle Réseau - Serveur DNS 1 - Serveur DNS 2 - Serveur DNS 3 - Paramètres WIFI - SSID - Réseau masqué - Sécurité WIFI - Passphrase - - - Services - Samba - Lancer Samba au démarrage - Utiliser un mot de passe Samba - Utilisateur Samba - Mot de passe Samba - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/German/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/German/strings.xml deleted file mode 100644 index c82173b6cb..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/German/strings.xml +++ /dev/null @@ -1,40 +0,0 @@ - - - - -System -Tastatur -Tastaturlayout -Tastaturlayout #2 -System Aktualisierung -System Aktualisierung -LCD/VFD -LCD Treiber - - -Netzwerk -Netzwerk 2 -Allgemein -Gerätename -Netzwerk Adapter -Netzwerk Technologie -Netzwerk Gerät -IP Einstellungen -Statische IP Adresse -Netzmaske Präfixlänge -Netzwerk Gateway -DNS Server 1 -DNS Server 2 -DNS Server 3 -WLAN Einstellungen -WLAN SSID -Verstecktes Netzwerk -WLAN Sicherheit -WLAN Passwort - - -Services -Samba -Starte Samba beim Booten - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Hungarian/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Hungarian/strings.xml deleted file mode 100644 index d5a2c80b50..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Hungarian/strings.xml +++ /dev/null @@ -1,39 +0,0 @@ - - - - - Rendszer - Billentyűzet - Billentyű kiosztás - Alternatív billentyű kiosztás (opcionális) - Rendszer frissítés - Rendszer frissítés - LCD/VFD - LCD meghajtóprogram használata - - - Hálózat - Hálózat 2 - Általános - Hostnév - Hálózati adapter - Hálózati technológia - Hálózati eszköz - IP beállítások - Statikus IP cím - Hálózati maszk - Hálózati átjáró - DNS server 1 - DNS server 2 - DNS server 3 - WLAN beállítások - WLAN azonosító - Rejtett hálózat - WLAN biztonság - WLAN jelszó - - - Services - Samba - Samba megosztás indítása bootoláskor - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Norwegian/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Norwegian/strings.xml deleted file mode 100644 index ce7475fffb..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Norwegian/strings.xml +++ /dev/null @@ -1,40 +0,0 @@ - - - - - System - Tastatur - Språklayout - Språklayout #2 - Systemoppdateringer - Systemoppdateringer - LCD/VFD - LCD Driver - - - Nettverk - Nettverk 2 - Generelt - Vertsnavn - Nettverkskort - Overføringsteknologi - Nettverksgrensesnitt - IP instillinger - Statisk IP adresse - Nettverksprefix lengde - Standard gateway - Foretrukket DNS-server - Alternativ DNS-server - Alternativ DNS-server - WLAN instillinger - WLAN SSID - Skjult Nettverk - WLAN Sikkerhet - WLAN Passord - - - Services - Samba - Start Samba under oppstart - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Polish/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Polish/strings.xml deleted file mode 100644 index bfb09306b7..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Polish/strings.xml +++ /dev/null @@ -1,40 +0,0 @@ - - - - - System - Klawiatura - Układ klawiatury - Alternatywny układ klawiatury (opcjonalny) - Aktualizacja systemu - Aktualizacja systemu - LCD/VFD - Sterownik LC - - - Sieć - Sieć 2 - Ogólne - Nazwa hosta - Karta sieciowa - Typ sieci - Interfejs sieciowy - Ustawienia IP - Statyczny adres IP - Długość prefiksu maski sieci - Brama sieci - Serwer DNS 1 - Serwer DNS 2 - Serwer DNS 3 - Ustawienia WLAN - WLAN SSID - Śieć ukryta - Zabezpieczenia sieci WLAN - Hasło sieci WLAN - - - Services - Samba - Uruchom Sambę przy starcie systemu - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Spanish/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Spanish/strings.xml deleted file mode 100644 index 27d98faac3..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Spanish/strings.xml +++ /dev/null @@ -1,40 +0,0 @@ - - - - - Sistema - Teclado - Disposición de teclas - Disposición alternativa (opcional) - Actualización del sistema - Actualización del sistema - LCD/VFD - Controlador del LCD - - - Red - Red 2 - General - Nombre de equipo - Adaptador de red - Tecnología de red - Interfaz de red - Parámetros IP - Dirección IP fija - Longitud de máscara de red - Ruta por defecto - Servidor DNS 1 - Servidor DNS 2 - Servidor DNS 3 - Parámetros WLAN (Wi-Fi) - SSID WLAN - Red oculta - Seguridad WLAN - Clave WLAN - - - Services - Samba - Activar Samba al arranque - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Turkish/strings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/language/Turkish/strings.xml deleted file mode 100644 index df6a09fd66..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/language/Turkish/strings.xml +++ /dev/null @@ -1,43 +0,0 @@ - - - - - Sistem - Klavye - Klavye düzeni - Alternatif klavye düzeni (isteğe bağlı) - Sistem Güncelleme - Sistem Güncelleme - LCD/VFD - Kullanılacak LCD sürücüsü - - - Ağ - Ağ 2 - Genel - Ana Bilgisayar Adı - Ağ Bağdaştırıcısı - Ağ Teknolojisi - Ağ Arabirimi - IP ayarları - Statik IP adresi - Ağ Maskesi Önek Uzunluğu - Ağ geçidi - DNS sunucu 1 - DNS sunucu 2 - DNS sunucu 3 - WLAN ayarları - WLAN SSID - Gizli Ağ - WLAN Güvenliği - WLAN Parolası - - - Services - Samba - Samba'yı önyüklemede başlat - Samba İçin Parola Kullan - Samba Kullanıcı adı - Samba Parolası - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/resources/settings.xml b/packages/mediacenter/xbmc-addon-settings/source/resources/settings.xml deleted file mode 100644 index dff77a8eee..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/source/resources/settings.xml +++ /dev/null @@ -1,82 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/packages/mediacenter/xbmc-addon-settings/source/default.py b/packages/mediacenter/xbmc-addon-settings/unpack old mode 100644 new mode 100755 similarity index 70% rename from packages/mediacenter/xbmc-addon-settings/source/default.py rename to packages/mediacenter/xbmc-addon-settings/unpack index 378d6e1ba0..09ae905c23 --- a/packages/mediacenter/xbmc-addon-settings/source/default.py +++ b/packages/mediacenter/xbmc-addon-settings/unpack @@ -1,3 +1,5 @@ +#!/bin/sh + ################################################################################ # This file is part of OpenELEC - http://www.openelec.tv # Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) @@ -18,21 +20,10 @@ # http://www.gnu.org/copyleft/gpl.html ################################################################################ -import os -import sys -import xbmcaddon +. config/options $1 -__scriptname__ = "OpenELEC OS Settings Dialog" -__author__ = "OpenELEC" -__url__ = "http://www.openelec.tv" -__svn_url__ = "" -__credits__ = "" -__version__ = "0.0.13" -__XBMC_Revision__ = "22240" +ZIP_PKG="`echo $PKG_URL | sed 's%.*/\(.*\)$%\1%'`" +[ -d $PKG_BUILD ] && rm -rf $PKG_BUILD -__settings__ = xbmcaddon.Addon(id='os.openelec.settings') -__language__ = __settings__.getLocalizedString -__cwd__ = __settings__.getAddonInfo('path') - -if __name__ == "__main__": - __settings__.openSettings() +mkdir -p $BUILD/${PKG_NAME}-${PKG_VERSION} + unzip $SOURCES/$1/$ZIP_PKG -d $BUILD/${PKG_NAME}-${PKG_VERSION} >/dev/null 2>&1 From 66cbe0543010064a1a4364afad215c2eb8c28ba3 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 10 Jan 2013 22:39:25 +0100 Subject: [PATCH 002/104] connman: rework init script and change statedir/storagedir to write config persistent Signed-off-by: Stephan Raue --- packages/network/connman/build | 2 +- packages/network/connman/init.d/21_network | 263 +-------------------- 2 files changed, 12 insertions(+), 253 deletions(-) diff --git a/packages/network/connman/build b/packages/network/connman/build index 9f46026db1..be2cebbecf 100755 --- a/packages/network/connman/build +++ b/packages/network/connman/build @@ -74,4 +74,4 @@ cd $PKG_BUILD --enable-datafiles \ --disable-silent-rules \ -make +make storagedir=/storage/.cache/connman statedir=/run/connman diff --git a/packages/network/connman/init.d/21_network b/packages/network/connman/init.d/21_network index f246e474ef..3bcf620607 100644 --- a/packages/network/connman/init.d/21_network +++ b/packages/network/connman/init.d/21_network @@ -20,261 +20,20 @@ # setup networking # -# runlevels: openelec, installer, textmode +# runlevels: openelec, textmode -connman_state() { - local dbus_reply="$(mktemp)" - if [ -z "$1" ]; then - dbus-send --system --type=method_call --print-reply --dest=net.connman / net.connman.Manager.GetProperties >$dbus_reply 2>/dev/null - else - dbus-send --system --type=method_call --print-reply --dest=net.connman /net/connman/service/$1 net.connman.Service.GetProperties >$dbus_reply 2>/dev/null - fi +mkdir -p /storage/.cache/connman +mkdir -p /run/connman - ret=$(awk ' - /string *"State"/ { - getline line - if (line ~ /string "/){ - sub(/.*string "/, "", line) - sub(/"/, "", line) - print line - break - } - } -' $dbus_reply) - - rm -f $dbus_reply - echo $ret -} - -set_basic() { - # run it from here too - debugging - if [ -f /etc/init.d/06_systemconfig ]; then - . /etc/init.d/06_systemconfig - fi - - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf - fi - - [ -z "$NET_HOSTNAME" ] && NET_HOSTNAME="openelec" - - # setup hostname - progress "Setup hostname" - echo "$NET_HOSTNAME" > /proc/sys/kernel/hostname - - # create /etc/hosts file, useful for gethostbyname(localhost) - progress "creating /etc/hosts" - echo -e "127.0.0.1\tlocalhost $NET_HOSTNAME" > /etc/hosts - - # starting loopback device +# starting loopback device + progress "starting loopback device" ifconfig lo up - # add user defined hosts.conf entry's - [ -f $HOME/.config/hosts.conf ] && cat $HOME/.config/hosts.conf >> /etc/hosts - - CONNMAN_SETTINGS="/var/lib/connman/settings" - - rm -rf /var/lib/connman - mkdir -p /var/lib/connman - mkdir -p /var/run/connman - - cat > $CONNMAN_SETTINGS <> $CONNMAN_PROFILE - else - echo "IPv4.method=manual" >> $CONNMAN_PROFILE - echo "IPv4.local_address=$NET_IPADDRESS" >> $CONNMAN_PROFILE - [ -n "$NET_PREFIXLEN" ] && echo "IPv4.netmask_prefixlen=$NET_PREFIXLEN" >> $CONNMAN_PROFILE - [ -n "$NET_GATEWAY" ] && echo "IPv4.gateway=$NET_GATEWAY" >> $CONNMAN_PROFILE - fi - - [ -n "$NET_DNS1" ] && NET_NAMESERVER="$NET_DNS1;" - [ -n "$NET_DNS2" ] && NET_NAMESERVER="${NET_NAMESERVER}$NET_DNS2;" - [ -n "$NET_DNS3" ] && NET_NAMESERVER="${NET_NAMESERVER}$NET_DNS3;" - [ -n "$NET_NAMESERVER" ] && echo "Nameservers=$NET_NAMESERVER" >> $CONNMAN_PROFILE - - ( - local log_file="/var/log/${PROFILE_NAME}.log" - - for i in $(seq 1 60); do - echo "--- $i $PROFILE_NAME ------------" >>$log_file 2>&1 - dbus-send --system --dest=net.connman --print-reply /net/connman/service/${PROFILE_NAME} net.connman.Service.Connect >>$log_file 2>&1 - usleep 500000 - - state=$(connman_state $PROFILE_NAME) - echo "state: <$state>" >>$log_file 2>&1 - - if [ "$state" = "online" -o "$state" = "ready" ]; then - echo "Done." >>$log_file 2>&1 - break - else - usleep 1000000 - fi - done - )& -} - -set_wired_interface() { - local NET_MAC="" - - for i in $(seq 1 30); do - if [ ! -f /sys/class/net/$NET_IFACE/address ]; then - logger -t Connman "### [$i] cannot find /sys/class/net/$NET_IFACE/address ###" - usleep 500000 - else - logger -t Connman "### [$i] found /sys/class/net/$NET_IFACE/address, continue ###" - NET_MAC=`cat /sys/class/net/$NET_IFACE/address | sed 's/://g'` - break - fi - done - - # don't continue if interface is not found - [ -z "$NET_MAC" ] && return - - PROFILE_NAME="ethernet_${NET_MAC}_cable" - CONNMAN_PROFILE=/var/lib/connman/${PROFILE_NAME}/settings - - mkdir -p /var/lib/connman/${PROFILE_NAME} - - echo "[${PROFILE_NAME}]" > $CONNMAN_PROFILE - echo "AutoConnect=true" >> $CONNMAN_PROFILE - if [ "$1" = "1" ]; then - echo "Favorite=true" >> $CONNMAN_PROFILE - else - echo "Favorite=false" >> $CONNMAN_PROFILE - fi - - set_ip_address -} - -set_wireless_interface() { - # we need ssid - [ -z "$NET_SSID" ] && return - - local NET_SSID_HEX=`echo -n "$NET_SSID" | od -tx1 | cut -c8-| tr -d ' \n'` - local NET_MAC="" - - for i in $(seq 1 120); do - if [ ! -f /sys/class/net/$NET_IFACE/address ]; then - logger -t Connman "### [$i] cannot find /sys/class/net/$NET_IFACE/address ###" - usleep 500000 - else - logger -t Connman "### [$i] found /sys/class/net/$NET_IFACE/address, continue ###" - NET_MAC=`cat /sys/class/net/$NET_IFACE/address | sed 's/://g'` - break - fi - done - - # don't continue if interface is not found - [ -z "$NET_MAC" ] && return - - # NET_SECURITY: ( NONE / WEP / WPA/WPA2 ) - if [ "$NET_SECURITY" = "WEP" -a -n "$NET_PASSPHRASE" ]; then - MODE="managed_wep" - elif [ "$NET_SECURITY" = "WPA/WPA2" -a -n "$NET_PASSPHRASE" ]; then - MODE="managed_psk" - else - MODE="managed_none" - fi - - if [ "$NET_HIDDEN" = "true" ]; then - PROFILE_NAME="wifi_${NET_MAC}_hidden_${MODE}" - else - PROFILE_NAME="wifi_${NET_MAC}_${NET_SSID_HEX}_${MODE}" - fi - - CONNMAN_PROFILE=/var/lib/connman/${PROFILE_NAME}/settings - - mkdir -p /var/lib/connman/${PROFILE_NAME} - - echo "[${PROFILE_NAME}]" > $CONNMAN_PROFILE - echo "Name=$NET_SSID" >> $CONNMAN_PROFILE - echo "SSID=$NET_SSID_HEX" >> $CONNMAN_PROFILE - [ -n "$NET_PASSPHRASE" ] && echo "Passphrase=$NET_PASSPHRASE" >> $CONNMAN_PROFILE - echo "AutoConnect=true" >> $CONNMAN_PROFILE - if [ "$1" = "1" ]; then - echo "Favorite=true" >> $CONNMAN_PROFILE - else - echo "Favorite=false" >> $CONNMAN_PROFILE - fi - set_ip_address -} - -set_interface() { - for i in 1 2; do - if [ "$i" = "2" ]; then - if [ -n "$NET2_NETWORK" -a "$NET2_NETWORK" != "NONE" -a "$NET2_IFACE" != "$NET_IFACE" ]; then - # set second interface - NET_DNS1="$NET2_DNS1" - NET_DNS2="$NET2_DNS2" - NET_DNS3="$NET2_DNS3" - NET_GATEWAY="$NET2_GATEWAY" - NET_HIDDEN="$NET2_HIDDEN" - NET_IFACE="$NET2_IFACE" - NET_IPADDRESS="$NET2_IPADDRESS" - NET_NETWORK="$NET2_NETWORK" - NET_PASSPHRASE="$NET2_PASSPHRASE" - NET_PREFIXLEN="$NET2_PREFIXLEN" - NET_SECURITY="$NET2_SECURITY" - NET_SSID="$NET2_SSID" - else - break - fi - fi - - if [ "$NET_NETWORK" = "WLAN" ]; then - progress "Setup networking $i WLAN" - set_wireless_interface $i - elif [ "$NET_NETWORK" = "LAN" ]; then - progress "Setup networking $i LAN" - set_wired_interface $i - fi - done -} - -( - # starting Connection manager +# starting Connection manager progress "starting Connection manager" - while true; do - set_basic - set_interface - set_hwclock - - if [ -f $HOME/.config/debug.connman ]; then - /usr/sbin/connmand -nd > /dev/null 2>&1 - else - /usr/sbin/connmand -n > /dev/null 2>&1 - fi - usleep 250000 - done -)& + if [ -f $HOME/.config/debug.connman ]; then + /usr/sbin/connmand -d > /dev/null 2>&1 + else + /usr/sbin/connmand > /dev/null 2>&1 + fi From b1f39d04e05854b364ecae7d43420705d4fcfc03 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 10 Jan 2013 22:40:07 +0100 Subject: [PATCH 003/104] samba: remove init script, will be started via our new settings addon Signed-off-by: Stephan Raue --- packages/network/samba/install | 3 - packages/network/samba/scripts/52_samba | 86 ------------------------- 2 files changed, 89 deletions(-) delete mode 100644 packages/network/samba/scripts/52_samba diff --git a/packages/network/samba/install b/packages/network/samba/install index dcf78cc57d..ca9d740cf9 100755 --- a/packages/network/samba/install +++ b/packages/network/samba/install @@ -43,7 +43,4 @@ if [ "$SAMBA_SERVER" = "yes" ]; then mkdir -p $INSTALL/usr/config cp $PKG_DIR/config/smb.conf $INSTALL/usr/config/samba.conf.sample fi - - mkdir -p $INSTALL/etc/init.d - cp $PKG_DIR/scripts/* $INSTALL/etc/init.d fi diff --git a/packages/network/samba/scripts/52_samba b/packages/network/samba/scripts/52_samba deleted file mode 100644 index 4870ce39c8..0000000000 --- a/packages/network/samba/scripts/52_samba +++ /dev/null @@ -1,86 +0,0 @@ -################################################################################ -# Copyright (C) 2009-2010 OpenELEC.tv -# http://www.openelec.tv -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# start Samba Server -# -# runlevels: openelec, textmode - -( - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf - - if [ "$SAMBA_START" = "true" ]; then - - # sleep 10 sec to be ensure network is started - usleep 10000000 - - progress "Starting Samba server" - - SMB_USERCONF="/storage/.config/samba.conf" - SMB_DEFCONF="/etc/samba/smb.conf" - SMB_CONF="/var/run/smb.conf" - - mkdir -p /var/run - if [ -f $SMB_USERCONF ]; then - cp $SMB_USERCONF $SMB_CONF - else - cp $SMB_DEFCONF $SMB_CONF - fi - - # only letters & numbers permitted for username & password - SAMBA_USERNAME=`echo $SAMBA_USERNAME | sed "s/[^a-zA-Z0-9]//g;"` - SAMBA_PASSWORD=`echo $SAMBA_PASSWORD | sed "s/[^a-zA-Z0-9]//g;"` - - if [ "$SAMBA_SECURITY" == "true" -a ! "$SAMBA_USERNAME" == "" -a ! "$SAMBA_PASSWORD" == "" ] ; then - # username map: first line makes sure plain root does not work all the time - # processing continues, so if user chooses root as username, second line overrides the first - # this is done always in case user uses passwords in userconf. - # many thanks to viljoviitanen for this - echo -e "$SAMBA_PASSWORD\n$SAMBA_PASSWORD" | smbpasswd -s -a root >/dev/null 2>&1 - echo -e "nobody = root\nroot = $SAMBA_USERNAME" > /var/run/samba.map - - # set public = no - sed -e 's|^.[ \t]*.public.=.*| public = no |' $SMB_CONF > $SMB_CONF.tmp && \ - mv $SMB_CONF.tmp $SMB_CONF - # remove username map (if any in userconfig) - sed -e 's|^.[ \t]*.username map.=.*||' $SMB_CONF > $SMB_CONF.tmp && \ - mv $SMB_CONF.tmp $SMB_CONF - # set security = share, add username map - sed -e 's|^.[ \t]*.security.=.*| security = user\n username map = /var/run/samba.map|' $SMB_CONF > $SMB_CONF.tmp && \ - mv $SMB_CONF.tmp $SMB_CONF - else - # set public = yes - sed -e 's|^.[ \t]*.public.=.*| public = yes |' $SMB_CONF > $SMB_CONF.tmp && \ - mv $SMB_CONF.tmp $SMB_CONF - # remove username map (if any in userconfig) - sed -e 's|^.[ \t]*.username map.=.*||' $SMB_CONF > $SMB_CONF.tmp && \ - mv $SMB_CONF.tmp $SMB_CONF - # set security = share - sed -e 's|^.[ \t]*.security.=.*| security = share|' $SMB_CONF > $SMB_CONF.tmp && \ - mv $SMB_CONF.tmp $SMB_CONF - fi - - SMB_ARG="--configfile=$SMB_CONF" - mkdir -p /var/log/samba - nmbd --daemon $SMB_ARG > /dev/null 2>&1 - smbd --daemon $SMB_ARG > /dev/null 2>&1 - fi - fi -)& From 2a15a36a00920010774c0bd10824c8960ef16a94 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 10 Jan 2013 22:40:24 +0100 Subject: [PATCH 004/104] lcdproc: remove init script, will be started via our new settings addon Signed-off-by: Stephan Raue --- packages/sysutils/lcdproc/init.d/63_lcdproc | 49 --------------------- 1 file changed, 49 deletions(-) delete mode 100644 packages/sysutils/lcdproc/init.d/63_lcdproc diff --git a/packages/sysutils/lcdproc/init.d/63_lcdproc b/packages/sysutils/lcdproc/init.d/63_lcdproc deleted file mode 100644 index cf7095486b..0000000000 --- a/packages/sysutils/lcdproc/init.d/63_lcdproc +++ /dev/null @@ -1,49 +0,0 @@ -################################################################################ -# Copyright (C) 2009-2010 OpenELEC.tv -# http://www.openelec.tv -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# start the LCD daemon -# -# runlevels: openelec, textmode - -( - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf - - if [ ! "$LCD_DRIVER" = none ]; then - - progress "Starting LCD daemon with driver: $LCD_DRIVER" - - if [ -f /storage/.config/LCDd.conf ]; then - LCD_CONFIG="/storage/.config/LCDd.conf" - else - LCD_CONFIG="/etc/LCDd.conf" - fi - - # sleep 10sec. to for irserver loading - if [ "$LCD_DRIVER" = "irtrans" ]; then - usleep 7000000 - fi - - # sleep another 3sec. to for irserver loading - usleep 3000000 - LCDd -c $LCD_CONFIG -d $LCD_DRIVER -s true > /dev/null 2>&1 - fi - fi -)& From 743fd77ed677db9c319af42e5c1a5c27dcdf01fb Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 10 Jan 2013 22:40:43 +0100 Subject: [PATCH 005/104] setxkbmap: remove init script, will be started via our new settings addon Signed-off-by: Stephan Raue --- packages/x11/app/setxkbmap/init.d/72_keyboard | 45 ------------------- 1 file changed, 45 deletions(-) delete mode 100644 packages/x11/app/setxkbmap/init.d/72_keyboard diff --git a/packages/x11/app/setxkbmap/init.d/72_keyboard b/packages/x11/app/setxkbmap/init.d/72_keyboard deleted file mode 100644 index 32478732e2..0000000000 --- a/packages/x11/app/setxkbmap/init.d/72_keyboard +++ /dev/null @@ -1,45 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# setup keyboard layout -# -# runlevels: openelec - -( - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf - - progress "setup keyboard layout" - - if [ -z $X11_KEYMAP ]; then - X11_KEYMAP="us" - fi - - # waiting for Xorg to start - wait_for_xorg - - # setup keymap - if [ -z $X11_KEYMAP2 ]; then - setxkbmap -display $DISPLAY $X11_KEYMAP; - else - setxkbmap -display $DISPLAY -layout "$X11_KEYMAP,$X11_KEYMAP2" -option "grp:alt_shift_toggle"; - fi - fi -)& From 47f2f10d395b7d0fe9d4127f47ce148228938417 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 10 Jan 2013 23:09:28 +0100 Subject: [PATCH 006/104] hdparm: remove init script, will be started via our new settings addon Signed-off-by: Stephan Raue --- packages/tools/hdparm/init.d/32_hdd-sleep | 39 ----------------------- 1 file changed, 39 deletions(-) delete mode 100644 packages/tools/hdparm/init.d/32_hdd-sleep diff --git a/packages/tools/hdparm/init.d/32_hdd-sleep b/packages/tools/hdparm/init.d/32_hdd-sleep deleted file mode 100644 index 431aee9847..0000000000 --- a/packages/tools/hdparm/init.d/32_hdd-sleep +++ /dev/null @@ -1,39 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# -# setup hdd standby -# -# runlevels: openelec, installer, textmode - -if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf -fi - -( - if [ "$HDD_STANDBY" == "true" ] ; then - progress "Setup HDD standby" - [ -z "$HDD_STANDBY_TIME" ] && HDD_STANDBY_TIME=15 - STANDBY_TIME=$[$HDD_STANDBY_TIME * 12] - for disk in /dev/sd?; do - hdparm -S $STANDBY_TIME $disk > /dev/null 2>&1 - done - fi -)& From 378a5b8becb76e3808809350ffbf022238b60cf8 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 11 Jan 2013 00:47:38 +0100 Subject: [PATCH 007/104] openssh: temporary use /storage/.cache/openelec/sshd.conf for sshd options - to be changed Signed-off-by: Stephan Raue --- packages/network/openssh/init.d/51_sshd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/network/openssh/init.d/51_sshd b/packages/network/openssh/init.d/51_sshd index 63c5cf5518..64d0e41863 100644 --- a/packages/network/openssh/init.d/51_sshd +++ b/packages/network/openssh/init.d/51_sshd @@ -22,8 +22,8 @@ # # runlevels: openelec, textmode - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf + if [ -f /storage/.cache/openelec/sshd.conf ]; then + . /storage/.cache/openelec/sshd.conf fi RSA1_KEY="/storage/.cache/ssh/ssh_host_key" From 9adcb060cc5b1ef5fd1a3a868763576d5025c6c6 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 11 Jan 2013 00:49:58 +0100 Subject: [PATCH 008/104] autoupdate: temporary use /storage/.cache/openelec/update.conf for update options - to be changed Signed-off-by: Stephan Raue --- packages/tools/autoupdate/scripts/autoupdate.devel | 4 ++-- packages/tools/autoupdate/scripts/autoupdate.release | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/packages/tools/autoupdate/scripts/autoupdate.devel b/packages/tools/autoupdate/scripts/autoupdate.devel index b786df98c0..b1aa04590f 100755 --- a/packages/tools/autoupdate/scripts/autoupdate.devel +++ b/packages/tools/autoupdate/scripts/autoupdate.devel @@ -24,8 +24,8 @@ TMP_DIR="$HOME/.xbmc/temp" if [ -f /etc/update.conf ]; then . /etc/update.conf -elif [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf +elif [ -f /storage/.cache/openelec/update.conf ]; then + . /storage/.cache/openelec/update.conf AUTOUPDATE="$UPDATE_AUTO" else exit 0 diff --git a/packages/tools/autoupdate/scripts/autoupdate.release b/packages/tools/autoupdate/scripts/autoupdate.release index a122750dc7..af36d1a0a4 100755 --- a/packages/tools/autoupdate/scripts/autoupdate.release +++ b/packages/tools/autoupdate/scripts/autoupdate.release @@ -24,8 +24,8 @@ TMP_DIR="$HOME/.xbmc/temp" if [ -f /etc/update.conf ]; then . /etc/update.conf -elif [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf +elif [ -f /storage/.cache/openelec/update.conf ]; then + . /storage/.cache/openelec/update.conf AUTOUPDATE="$UPDATE_AUTO" else exit 0 From 442a3592ffb2ec76893c08af9e013754b8533019 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 11 Jan 2013 00:50:49 +0100 Subject: [PATCH 009/104] busybox: remove not more needed initscript to rewrite our config settings Signed-off-by: Stephan Raue --- .../sysutils/busybox/init.d/06_systemconfig | 35 ------------------- 1 file changed, 35 deletions(-) delete mode 100644 packages/sysutils/busybox/init.d/06_systemconfig diff --git a/packages/sysutils/busybox/init.d/06_systemconfig b/packages/sysutils/busybox/init.d/06_systemconfig deleted file mode 100644 index f0b0750dbe..0000000000 --- a/packages/sysutils/busybox/init.d/06_systemconfig +++ /dev/null @@ -1,35 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# -# copy system config -# -# runlevels: openelec, textmode - -OPENELEC_SETTINGS="$HOME/.xbmc/userdata/addon_data/os.openelec.settings/settings.xml" - -if [ -f "$OPENELEC_SETTINGS" ]; then - progress "creating system settings" - - mkdir -p /var/config - cat "$OPENELEC_SETTINGS" \ - | awk -F'["'\'']' '{gsub(/\"\;/, "\\\"", $4); gsub(/\&apos\;/, "\047", $4); gsub(/\&\;/, "\\&", $4); gsub(/\<\;/, "<", $4); gsub(/\>\;/, ">", $4); gsub(/\$/, "\\\$", $4); gsub(/`/, "\\`", $4); print $2"=\""$4"\"";}' \ - | sed '/^=/d' > /var/config/settings.conf -fi From c9961940b16706a1a72485475fc4f7cd46063e9b Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 11 Jan 2013 17:05:56 +0100 Subject: [PATCH 010/104] xbmc-theme-Confluence: rename settings addon to load Signed-off-by: Stephan Raue --- ...e-Confluence-acfe70f-001-add_oe_settings_to_homescreen.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-theme-Confluence/patches/xbmc-theme-Confluence-acfe70f-001-add_oe_settings_to_homescreen.patch b/packages/mediacenter/xbmc-theme-Confluence/patches/xbmc-theme-Confluence-acfe70f-001-add_oe_settings_to_homescreen.patch index b2894a4bba..79a3addf5a 100644 --- a/packages/mediacenter/xbmc-theme-Confluence/patches/xbmc-theme-Confluence-acfe70f-001-add_oe_settings_to_homescreen.patch +++ b/packages/mediacenter/xbmc-theme-Confluence/patches/xbmc-theme-Confluence-acfe70f-001-add_oe_settings_to_homescreen.patch @@ -7,7 +7,7 @@ + + ButtonHomeSubCommonValues + -+ RunAddon(os.openelec.settings) ++ RunAddon(service.openelec.settings) + ButtonHomeSubCommonValues From 4c708c441b636e91b33a2771af1afd234d596ea2 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 16 Jan 2013 11:09:02 +0100 Subject: [PATCH 011/104] xbmc: dont set frequency here, it will be handled by our settings addon Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc/init.d/93_xbmc | 6 ------ 1 file changed, 6 deletions(-) diff --git a/packages/mediacenter/xbmc/init.d/93_xbmc b/packages/mediacenter/xbmc/init.d/93_xbmc index 164310c603..2963bf6e00 100644 --- a/packages/mediacenter/xbmc/init.d/93_xbmc +++ b/packages/mediacenter/xbmc/init.d/93_xbmc @@ -52,12 +52,6 @@ fi # waiting for Xorg to start wait_for_xorg -# set cpu's to 'conservative' - ( usleep 15000000 - progress "set cpu's to 'ondemand'" - cpupower frequency-set -g ondemand > /dev/null 2>&1 - )& - # prevent restrating XBMC at reboot or shutdown LOCKDIR="/var/lock/" LOCKFILE="xbmc.disabled" From 2cd12f0db22f5573878318005f4062a2b08ffdcf Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 16 Jan 2013 11:10:07 +0100 Subject: [PATCH 012/104] avahi: remove init script, will be handled by our settings addon Signed-off-by: Stephan Raue --- packages/network/avahi/init.d/53_avahi | 33 -------------------------- 1 file changed, 33 deletions(-) delete mode 100644 packages/network/avahi/init.d/53_avahi diff --git a/packages/network/avahi/init.d/53_avahi b/packages/network/avahi/init.d/53_avahi deleted file mode 100644 index ef12e72fa0..0000000000 --- a/packages/network/avahi/init.d/53_avahi +++ /dev/null @@ -1,33 +0,0 @@ -################################################################################ -# Copyright (C) 2009-2010 OpenELEC.tv -# http://www.openelec.tv -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# start Avahi Daemon -# -# runlevels: openelec, textmode - -( - # sleep 10 sec to be ensure network is started - usleep 10000000 - - progress "Starting Avahi Daemon" - - mkdir -p /var/run/avahi-daemon - avahi-daemon -D -)& From bed39ac64602d2450079b131de34e3651a8ee1fb Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sun, 20 Jan 2013 21:52:16 +0100 Subject: [PATCH 013/104] busybox: remove crond init script, will be handled by our sttings addon Signed-off-by: Stephan Raue --- packages/sysutils/busybox/install | 9 ------ packages/sysutils/busybox/scripts/09_crond | 36 ---------------------- 2 files changed, 45 deletions(-) delete mode 100644 packages/sysutils/busybox/scripts/09_crond diff --git a/packages/sysutils/busybox/install b/packages/sysutils/busybox/install index 64b61ca2e2..135928b0b7 100755 --- a/packages/sysutils/busybox/install +++ b/packages/sysutils/busybox/install @@ -68,12 +68,3 @@ USER_PWD="`$ROOT/$TOOLCHAIN/bin/cryptpw -m sha512 $USER_PASSWORD`" mkdir -p $INSTALL/usr/www/error echo "404" > $INSTALL/usr/www/error/404.html - - # cron support - if [ "$CRON_SUPPORT" = "yes" ] ; then - mkdir -p $INSTALL/etc/init.d - cp $PKG_DIR/scripts/09_crond $INSTALL/etc/init.d/ - else - rm -f $INSTALL/sbin/crond - rm -f $INSTALL/bin/crontab - fi diff --git a/packages/sysutils/busybox/scripts/09_crond b/packages/sysutils/busybox/scripts/09_crond deleted file mode 100644 index cae21e563b..0000000000 --- a/packages/sysutils/busybox/scripts/09_crond +++ /dev/null @@ -1,36 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# -# start cron daemon -# -# runlevels: openelec, textmode - -( - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf - fi - - if [ "$CROND_START" == "true" ]; then - progress "Starting cron daemon" - mkdir -p /storage/.cache/cron/crontabs - crond -b - fi -)& From c473eeb55f06e9e3f71b0824652c871a923a33bd Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sun, 20 Jan 2013 22:00:34 +0100 Subject: [PATCH 014/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.6 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index f0215df3d0..3993e939e2 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.5" +PKG_VERSION="0.0.6" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From b6ba0427e23fb4eb032a94efb6e8faae309a5458 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 21 Jan 2013 01:28:24 +0100 Subject: [PATCH 015/104] connman install default settings file on first start Signed-off-by: Stephan Raue --- packages/network/connman/config/settings | 8 ++++++++ packages/network/connman/init.d/21_network | 7 ++++++- packages/network/connman/install | 3 +++ 3 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 packages/network/connman/config/settings diff --git a/packages/network/connman/config/settings b/packages/network/connman/config/settings new file mode 100644 index 0000000000..63660dcf8a --- /dev/null +++ b/packages/network/connman/config/settings @@ -0,0 +1,8 @@ +[global] +OfflineMode=false + +[Wired] +Enable=true + +[WiFi] +Enable=true \ No newline at end of file diff --git a/packages/network/connman/init.d/21_network b/packages/network/connman/init.d/21_network index 3bcf620607..aaf41d6e23 100644 --- a/packages/network/connman/init.d/21_network +++ b/packages/network/connman/init.d/21_network @@ -29,9 +29,14 @@ mkdir -p /run/connman progress "starting loopback device" ifconfig lo up +# creating initial settings file + progress "creating initial connman settings file" + if [ ! -f /storage/.cache/connman/settings ]; then + cp /usr/share/connman/settings /storage/.cache/connman + fi + # starting Connection manager progress "starting Connection manager" - if [ -f $HOME/.config/debug.connman ]; then /usr/sbin/connmand -d > /dev/null 2>&1 else diff --git a/packages/network/connman/install b/packages/network/connman/install index c7added2b3..4f93b2e0dc 100755 --- a/packages/network/connman/install +++ b/packages/network/connman/install @@ -52,6 +52,9 @@ mkdir -p $INSTALL/usr/sbin mkdir -p $INSTALL/usr/config cp $PKG_DIR/config/hosts.conf $INSTALL/usr/config +mkdir -p $INSTALL/usr/share/connman/ + cp $PKG_DIR/config/settings $INSTALL/usr/share/connman/ + if [ "$PPTP_SUPPORT" = yes -o "$OPENVPN_SUPPORT" = yes ]; then mkdir -p $INSTALL/etc/dbus-1/system.d cp $PKG_BUILD/vpn/connman-vpn-dbus.conf $INSTALL/etc/dbus-1/system.d From 78f45423e556f8a4cb97db322ddbdad4ae0de932 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 22 Jan 2013 21:39:40 +0100 Subject: [PATCH 016/104] connman: update default settings file Signed-off-by: Stephan Raue --- packages/network/connman/config/settings | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/packages/network/connman/config/settings b/packages/network/connman/config/settings index 63660dcf8a..0ae93384dc 100644 --- a/packages/network/connman/config/settings +++ b/packages/network/connman/config/settings @@ -1,8 +1,18 @@ [global] OfflineMode=false +Timeservers=0.pool.ntp.org;1.pool.ntp.org;2.pool.ntp.org;3.pool.ntp.org [Wired] Enable=true [WiFi] -Enable=true \ No newline at end of file +Enable=true + +[Bluetooth] +Enable=false + +[3G] +Enable=false + +[WiMAX] +Enable=false From cf371e26c8835b857525a858f3e953881ffb8587 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 23 Jan 2013 22:37:35 +0200 Subject: [PATCH 017/104] xbmc: add patch to allow plugins to set GUI language --- ...-901-add-builtin-to-set-GUI-Language.patch | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 packages/mediacenter/xbmc/patches/xbmc-966a6cc-901-add-builtin-to-set-GUI-Language.patch diff --git a/packages/mediacenter/xbmc/patches/xbmc-966a6cc-901-add-builtin-to-set-GUI-Language.patch b/packages/mediacenter/xbmc/patches/xbmc-966a6cc-901-add-builtin-to-set-GUI-Language.patch new file mode 100644 index 0000000000..884e1f31fc --- /dev/null +++ b/packages/mediacenter/xbmc/patches/xbmc-966a6cc-901-add-builtin-to-set-GUI-Language.patch @@ -0,0 +1,32 @@ +commit d1fcd3007827ddd2ab20864677a5baf64e4782a4 +Author: Stefan Saraev +Date: Mon Jan 21 17:11:21 2013 +0200 + + add builtin to set GUI Language + +diff --git a/xbmc/interfaces/Builtins.cpp b/xbmc/interfaces/Builtins.cpp +index fae2524..3f5ceab 100644 +--- a/xbmc/interfaces/Builtins.cpp ++++ b/xbmc/interfaces/Builtins.cpp +@@ -120,6 +120,7 @@ const BUILT_IN commands[] = { + { "Minimize", false, "Minimize XBMC" }, + { "Reset", false, "Reset the system (same as reboot)" }, + { "Mastermode", false, "Control master mode" }, ++ { "SetGUILanguage", true, "Set GUI Language" }, + { "ActivateWindow", true, "Activate the specified window" }, + { "ActivateWindowAndFocus", true, "Activate the specified window and sets focus to the specified id" }, + { "ReplaceWindow", true, "Replaces the current window with the new one" }, +@@ -321,6 +322,13 @@ int CBuiltins::Execute(const CStdString& execString) + CGUIMessage msg(GUI_MSG_NOTIFY_ALL, 0, 0, GUI_MSG_UPDATE); + g_windowManager.SendMessage(msg); + } ++ else if (execute.Equals("setguilanguage")) ++ { ++ if (params.size()) ++ { ++ CApplicationMessenger::Get().SetGUILanguage(params[0]); ++ } ++ } + else if (execute.Equals("takescreenshot")) + { + CScreenShot::TakeScreenshot(); From de28c2e71fa322b53f96b9c5312e54a0cf43865b Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 23 Jan 2013 23:06:54 +0100 Subject: [PATCH 018/104] openssh: rework init script Signed-off-by: Stephan Raue --- packages/network/openssh/init.d/51_sshd | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/packages/network/openssh/init.d/51_sshd b/packages/network/openssh/init.d/51_sshd index 64d0e41863..1b2c4eecfa 100644 --- a/packages/network/openssh/init.d/51_sshd +++ b/packages/network/openssh/init.d/51_sshd @@ -22,8 +22,17 @@ # # runlevels: openelec, textmode - if [ -f /storage/.cache/openelec/sshd.conf ]; then - . /storage/.cache/openelec/sshd.conf + if [ -f /etc/sshd.conf ]; then + . /etc/sshd.conf + elif [ -f /storage/.config/sshd.conf ]; then + . /storage/.config/sshd.conf + fi + +# Check if password authentication is disabled + OPTIONS="" + + if [ "$SSHD_DISABLE_PW_AUTH" == "true" ] ; then + OPTIONS="-o 'PasswordAuthentication no'" fi RSA1_KEY="/storage/.cache/ssh/ssh_host_key" @@ -36,11 +45,7 @@ HOME="/storage" ( - if [ -f /etc/ssh.conf ]; then - . /etc/ssh.conf - fi - - if [ "$SSH" = yes -o -f /storage/.config/ssh_enable -o "$SSHD_START" == "true" ]; then + if [ "$SSH" = "yes" -o "$SSHD_START" = "true" ]; then # Check for the SSH1 RSA key if [ ! -s $RSA1_KEY ] ; then @@ -81,12 +86,6 @@ cp /etc/ssh/known_hosts $HOME/.ssh fi - # Check if password authentication is disabled - OPTIONS="" - - if [ "$SSHD_DISABLE_PW_AUTH" == "true" ] ; then - OPTIONS="-o 'PasswordAuthentication no'" - fi progress "Starting SSH Server" mkdir -p /var/empty From dea3183e02ab4f2013fbbad13958bc3f7ce0b012 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 25 Jan 2013 00:46:42 +0100 Subject: [PATCH 019/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.8 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 3993e939e2..9556a56572 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.6" +PKG_VERSION="0.0.8" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From 682f755dcd7c47efb1403e5e293810bc69f72a20 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sat, 26 Jan 2013 17:52:18 +0200 Subject: [PATCH 020/104] busybox: crond & crontab symlinks still have to be removed the new settings addon checks for /sbin/crond existence to decide whether cron support is there or not, so symlinks have to be removed --- packages/sysutils/busybox/install | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/packages/sysutils/busybox/install b/packages/sysutils/busybox/install index 49449deec0..a5f7dc32e4 100755 --- a/packages/sysutils/busybox/install +++ b/packages/sysutils/busybox/install @@ -71,3 +71,9 @@ USER_PWD="`$ROOT/$TOOLCHAIN/bin/cryptpw -m sha512 $USER_PASSWORD`" mkdir -p $INSTALL/usr/www/error echo "404" > $INSTALL/usr/www/error/404.html + + # cron support + if [ ! "$CRON_SUPPORT" = "yes" ] ; then + rm -f $INSTALL/sbin/crond + rm -f $INSTALL/bin/crontab + fi From a07539b684c2a47066d6ff13d55d5aeaf9159037 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sat, 26 Jan 2013 19:13:55 +0200 Subject: [PATCH 021/104] busybox: rework cron support --- packages/sysutils/busybox/build | 5 +++++ packages/sysutils/busybox/install | 6 ------ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/packages/sysutils/busybox/build b/packages/sysutils/busybox/build index 358a683c87..fe45f90c3c 100755 --- a/packages/sysutils/busybox/build +++ b/packages/sysutils/busybox/build @@ -39,6 +39,11 @@ cd $BUILD/busybox* # Build Busybox for system make distclean cp $BUSYBOX_CFG_FILE .config + if [ ! "$CRON_SUPPORT" = "yes" ] ; then + sed -i -e "s|^CONFIG_CROND=.*$|# CONFIG_CROND is not set|" .config + sed -i -e "s|^CONFIG_FEATURE_CROND_D=.*$|# CONFIG_FEATURE_CROND_D is not set|" .config + sed -i -e "s|^CONFIG_CRONTAB=.*$|# CONFIG_CRONTAB is not set|" .config + fi make oldconfig make ARCH=$TARGET_ARCH \ diff --git a/packages/sysutils/busybox/install b/packages/sysutils/busybox/install index a5f7dc32e4..49449deec0 100755 --- a/packages/sysutils/busybox/install +++ b/packages/sysutils/busybox/install @@ -71,9 +71,3 @@ USER_PWD="`$ROOT/$TOOLCHAIN/bin/cryptpw -m sha512 $USER_PASSWORD`" mkdir -p $INSTALL/usr/www/error echo "404" > $INSTALL/usr/www/error/404.html - - # cron support - if [ ! "$CRON_SUPPORT" = "yes" ] ; then - rm -f $INSTALL/sbin/crond - rm -f $INSTALL/bin/crontab - fi From 658e51f8e521978e802f0ff5253d0948b91b0e16 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 30 Jan 2013 06:28:24 +0100 Subject: [PATCH 022/104] Revert "Revert "bluez: update to bluez-5.1"" This reverts commit b612271f7f659780d6dcbf70a2a2abd4da9ae606. --- packages/network/bluez/build | 47 ++++--------- packages/network/bluez/config/main.conf | 66 ------------------- packages/network/bluez/install | 62 ++++++----------- packages/network/bluez/meta | 2 +- .../patches/bluez-4.99-automake_1.13.patch | 12 ---- .../bluez/patches/bluez-4.99-systemd.patch | 15 ----- .../network/bluez/udev.d/09-bluetooth.rules | 6 -- 7 files changed, 33 insertions(+), 177 deletions(-) delete mode 100644 packages/network/bluez/config/main.conf delete mode 100644 packages/network/bluez/patches/bluez-4.99-automake_1.13.patch delete mode 100644 packages/network/bluez/patches/bluez-4.99-systemd.patch delete mode 100644 packages/network/bluez/udev.d/09-bluetooth.rules diff --git a/packages/network/bluez/build b/packages/network/bluez/build index 67668175df..1c9f9c300c 100755 --- a/packages/network/bluez/build +++ b/packages/network/bluez/build @@ -22,22 +22,17 @@ . config/options -if [ "$ALSA_SUPPORT" = "yes" ]; then - BLUEZ_ALSA="--enable-audio --enable-alsa" -else - BLUEZ_ALSA="--disable-audio --disable-alsa" -fi - if [ "$DEBUG" = "yes" ]; then DEBUG_CONFIG="--enable-debug" else DEBUG_CONFIG="--disable-debug" fi + if [ "$DEVTOOLS" = "yes" ]; then - DEVTOOLS_CONFIG="--enable-bccmd --enable-tools" + DEVTOOLS_CONFIG="--enable-monitor --enable-test --enable-tools" else - DEVTOOLS_CONFIG="--disable-bccmd --disable-tools" -fi + DEVTOOLS_CONFIG="--disable-monitor --disable-test --disable-tools" +fi cd $PKG_BUILD ./configure --host=$TARGET_NAME \ @@ -50,38 +45,18 @@ cd $PKG_BUILD --disable-silent-rules \ --enable-shared \ --disable-static \ - --enable-optimization \ - --enable-fortify \ - --disable-pie \ - --enable-network \ - --disable-sap \ - --disable-proximity \ - --disable-serial \ - --enable-input \ - --enable-service \ - --enable-health \ - --disable-pnat \ - --disable-gstreamer \ - $BLUEZ_ALSA \ + --enable-library \ --enable-usb \ - --enable-datafiles \ - --enable-pcmcia \ - --enable-hid2hci \ - --enable-dfutool \ - --disable-hidd \ - --disable-pand \ - --disable-dund \ + --enable-udev \ --disable-cups \ - --enable-wiimote \ - --disable-maemo6 \ - --disable-dbusoob \ - --enable-thermometer \ - --disable-hal \ - --disable-capng \ + --disable-obex \ + --enable-client \ + --disable-systemd \ + --enable-datafiles \ + --disable-experimental \ --with-gnu-ld \ $DEBUG_CONFIG \ $DEVTOOLS_CONFIG \ - --disable-test make diff --git a/packages/network/bluez/config/main.conf b/packages/network/bluez/config/main.conf deleted file mode 100644 index 0ff6b0b921..0000000000 --- a/packages/network/bluez/config/main.conf +++ /dev/null @@ -1,66 +0,0 @@ -[General] - -# List of plugins that should not be loaded on bluetoothd startup -DisablePlugins = input - -# Default adaper name -# %h - substituted for hostname -# %d - substituted for adapter id -Name = %h-%d - -# Default device class. Only the major and minor device class bits are -# considered. -Class = 0x000100 - -# How long to stay in discoverable mode before going back to non-discoverable -# The value is in seconds. Default is 180, i.e. 3 minutes. -# 0 = disable timer, i.e. stay discoverable forever -DiscoverableTimeout = 0 - -# How long to stay in pairable mode before going back to non-discoverable -# The value is in seconds. Default is 0. -# 0 = disable timer, i.e. stay pairable forever -PairableTimeout = 0 - -# Use some other page timeout than the controller default one -# which is 16384 (10 seconds). -PageTimeout = 8192 - -# Discover scheduler interval used in Adapter.DiscoverDevices -# The value is in seconds. Defaults is 30. -DiscoverSchedulerInterval = 30 - -# What value should be assumed for the adapter Powered property when -# SetProperty(Powered, ...) hasn't been called yet. Defaults to true -InitiallyPowered = true - -# Remember the previously stored Powered state when initializing adapters -RememberPowered = true - -# Use vendor, product and version information for DID profile support. -# The values are separated by ":" and VID, PID and version. -#DeviceID = 1234:5678:abcd - -# Do reverse service discovery for previously unknown devices that connect to -# us. This option is really only needed for qualification since the BITE tester -# doesn't like us doing reverse SDP for some test cases (though there could in -# theory be other useful purposes for this too). Defaults to true. -ReverseServiceDiscovery = true - -# Enable name resolving after inquiry. Set it to 'false' if you don't need -# remote devices name and want shorter discovery cycle. Defaults to 'true'. -NameResolving = true - -# Enable runtime persistency of debug link keys. Default is false which -# makes debug link keys valid only for the duration of the connection -# that they were created for. -DebugKeys = false - -# Enable Low Energy support if the dongle supports. Default is false. -# Enable/Disable interleave discovery and attribute server over LE. -EnableLE = false - -# Enable the GATT Attribute Server. Default is false, because it is only -# useful for testing. Attribute server is not enabled over LE if EnableLE -# is false. -AttributeServer = false diff --git a/packages/network/bluez/install b/packages/network/bluez/install index bf605ad081..61218f9d25 100755 --- a/packages/network/bluez/install +++ b/packages/network/bluez/install @@ -22,59 +22,39 @@ . config/options -PKG_DIR=`find $PACKAGES -type d -name $1` - -mkdir -p $INSTALL/etc/bluetooth -# cp $PKG_BUILD/src/main.conf $INSTALL/etc/bluetooth - cp $PKG_DIR/config/main.conf $INSTALL/etc/bluetooth - cp $PKG_BUILD/tools/rfcomm.conf $INSTALL/etc/bluetooth - cp $PKG_BUILD/input/input.conf $INSTALL/etc/bluetooth - - if [ "$ALSA_SUPPORT" = yes ]; then - cp $PKG_BUILD/audio/audio.conf $INSTALL/etc/bluetooth - fi - mkdir -p $INSTALL/etc/dbus-1/system.d cp $PKG_BUILD/src/bluetooth.conf $INSTALL/etc/dbus-1/system.d mkdir -p $INSTALL/lib/udev -# not needed: cp $PKG_BUILD/scripts/bluetooth_serial $INSTALL/lib/udev -# not needed: chmod +x $INSTALL/lib/udev/bluetooth_serial cp $PKG_BUILD/tools/hid2hci $INSTALL/lib/udev mkdir -p $INSTALL/lib/udev/rules.d - cp $PKG_BUILD/scripts/97-bluetooth.rules $INSTALL/lib/udev/rules.d -# todo: cp $PKG_BUILD/scripts/97-bluetooth-hid2hci.rules $INSTALL/lib/udev/rules.d -# not needed: cp $PKG_BUILD/scripts/97-bluetooth-serial.rules $INSTALL/lib/udev/rules.d + cp $PKG_BUILD/tools/97-hid2hci.rules $INSTALL/lib/udev/rules.d mkdir -p $INSTALL/usr/lib cp -P $PKG_BUILD/lib/.libs/libbluetooth.so* $INSTALL/usr/lib -if [ "$ALSA_SUPPORT" = yes ]; then - mkdir -p $INSTALL/usr/lib/alsa - cp $PKG_BUILD/audio/.libs/*.so $INSTALL/usr/lib/alsa -fi - -mkdir -p $INSTALL/usr/lib/bluetooth/plugins - -mkdir -p $INSTALL/usr/sbin - cp $PKG_BUILD/src/bluetoothd $INSTALL/usr/sbin - -mkdir -p $INSTALL/usr/share/alsa - cp $PKG_BUILD/audio/bluetooth.conf $INSTALL/usr/share/alsa +mkdir -p $INSTALL/usr/lib/bluetooth + cp $PKG_BUILD/src/bluetoothd $INSTALL/usr/lib/bluetooth + cp $PKG_BUILD/obexd/src/obexd $INSTALL/usr/lib/bluetooth if [ "$DEVTOOLS" = "yes" ]; then - mkdir -p $INSTALL/usr/bin - cp $PKG_BUILD/tools/ciptool $INSTALL/usr/bin - cp $PKG_BUILD/tools/dfutool $INSTALL/usr/bin - cp $PKG_BUILD/tools/hcitool $INSTALL/usr/bin - cp $PKG_BUILD/tools/l2ping $INSTALL/usr/bin - cp $PKG_BUILD/tools/rfcomm $INSTALL/usr/bin - cp $PKG_BUILD/tools/sdptool $INSTALL/usr/bin +mkdir -p $INSTALL/usr/bin + cp $PKG_BUILD/tools/bccmd $INSTALL/usr/bin + cp $PKG_BUILD/client/bluetoothctl $INSTALL/usr/bin + cp $PKG_BUILD/monitor/btmon $INSTALL/usr/bin + cp $PKG_BUILD/tools/ciptool $INSTALL/usr/bin + cp $PKG_BUILD/tools/hciattach $INSTALL/usr/bin + cp $PKG_BUILD/tools/hciconfig $INSTALL/usr/bin + cp $PKG_BUILD/tools/hcidump $INSTALL/usr/bin + cp $PKG_BUILD/tools/hcitool $INSTALL/usr/bin + cp $PKG_BUILD/tools/l2ping $INSTALL/usr/bin + cp $PKG_BUILD/tools/l2test $INSTALL/usr/bin + cp $PKG_BUILD/tools/rctest $INSTALL/usr/bin + cp $PKG_BUILD/tools/rfcomm $INSTALL/usr/bin + cp $PKG_BUILD/tools/sdptool $INSTALL/usr/bin -mkdir -p $INSTALL/usr/sbin - cp $PKG_BUILD/tools/bccmd $INSTALL/usr/sbin # TODO - cp $PKG_BUILD/tools/hciattach $INSTALL/usr/sbin - cp $PKG_BUILD/tools/hciconfig $INSTALL/usr/sbin + mkdir -p $INSTALL/usr/lib/bluez/test + cp -P $PKG_BUILD/test/* $INSTALL/usr/lib/bluez/test + chmod +x $INSTALL/usr/lib/bluez/test/* fi - diff --git a/packages/network/bluez/meta b/packages/network/bluez/meta index 26f83b8fc0..8558547642 100644 --- a/packages/network/bluez/meta +++ b/packages/network/bluez/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="bluez" -PKG_VERSION="4.99" +PKG_VERSION="5.1" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" diff --git a/packages/network/bluez/patches/bluez-4.99-automake_1.13.patch b/packages/network/bluez/patches/bluez-4.99-automake_1.13.patch deleted file mode 100644 index 68b48872d4..0000000000 --- a/packages/network/bluez/patches/bluez-4.99-automake_1.13.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -Naur bluez-4.101-old/configure.ac bluez-4.101-new/configure.ac ---- bluez-4.101-old/configure.ac 2012-06-22 09:36:49.000000000 -0700 -+++ bluez-4.101-new/configure.ac 2012-12-29 08:49:05.000000000 -0800 -@@ -2,7 +2,7 @@ - AC_INIT(bluez, 4.101) - - AM_INIT_AUTOMAKE([foreign subdir-objects color-tests]) --AM_CONFIG_HEADER(config.h) -+AC_CONFIG_HEADERS(config.h) - - m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])]) - diff --git a/packages/network/bluez/patches/bluez-4.99-systemd.patch b/packages/network/bluez/patches/bluez-4.99-systemd.patch deleted file mode 100644 index 56cfc6db29..0000000000 --- a/packages/network/bluez/patches/bluez-4.99-systemd.patch +++ /dev/null @@ -1,15 +0,0 @@ -X-Git-Url: http://git.kernel.org/?p=bluetooth%2Fbluez.git;a=blobdiff_plain;f=tools%2Fhid2hci.c;h=e3a5b2ef785a782bd3da4ae9c44704a32dc2f665;hp=45a3a3db8b29411ee193e480f5ce8a82a40103d1;hb=35beaaa5b39d50eabd54563804182bb01a5d7ff4;hpb=cc47dc79aac98f7b25bd2afccf1c10560e779d16 - -diff --git a/tools/hid2hci.c b/tools/hid2hci.c -index 45a3a3d..e3a5b2e 100644 ---- a/tools/hid2hci.c -+++ b/tools/hid2hci.c -@@ -291,7 +291,7 @@ int main(int argc, char *argv[]) - if (udev == NULL) - goto exit; - -- snprintf(syspath, sizeof(syspath), "%s/%s", udev_get_sys_path(udev), devpath); -+ snprintf(syspath, sizeof(syspath), "/sys/%s", devpath); - udev_dev = udev_device_new_from_syspath(udev, syspath); - if (udev_dev == NULL) { - fprintf(stderr, "error: could not find '%s'\n", devpath); diff --git a/packages/network/bluez/udev.d/09-bluetooth.rules b/packages/network/bluez/udev.d/09-bluetooth.rules deleted file mode 100644 index b5be47b242..0000000000 --- a/packages/network/bluez/udev.d/09-bluetooth.rules +++ /dev/null @@ -1,6 +0,0 @@ -ACTION!="add|change", GOTO="end" - -KERNEL=="hci[0-9]*", SUBSYSTEM=="bluetooth", RUN+="/usr/sbin/hciconfig %k up" -KERNEL=="hci[0-9]*", SUBSYSTEM=="bluetooth", RUN+="/usr/sbin/hciconfig %k lm master" - -LABEL="end" From 11a932c4ec712be8f3a36a0d458281c42f0e98a8 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 30 Jan 2013 06:28:40 +0100 Subject: [PATCH 023/104] Revert "Revert "bluez: add init script and udev rule (needs rework)"" This reverts commit bd1fe46897408d4722df18a23429245aef031e2c. --- packages/network/bluez/init.d/22_bluez | 27 +++++++++++++++++++ .../network/bluez/udev.d/09-bluetooth.rules | 6 +++++ 2 files changed, 33 insertions(+) create mode 100644 packages/network/bluez/init.d/22_bluez create mode 100644 packages/network/bluez/udev.d/09-bluetooth.rules diff --git a/packages/network/bluez/init.d/22_bluez b/packages/network/bluez/init.d/22_bluez new file mode 100644 index 0000000000..92aa14170a --- /dev/null +++ b/packages/network/bluez/init.d/22_bluez @@ -0,0 +1,27 @@ +################################################################################ +# Copyright (C) 2009-2010 OpenELEC.tv +# http://www.openelec.tv +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ + +# starting Bluetooth +# +# runlevels: openelec, textmode + +# starting Bluetooth manager + progress "starting Bluetooth manager" + /usr/lib/bluetooth/bluetoothd > /dev/null 2>&1 & diff --git a/packages/network/bluez/udev.d/09-bluetooth.rules b/packages/network/bluez/udev.d/09-bluetooth.rules new file mode 100644 index 0000000000..7aa0a38d29 --- /dev/null +++ b/packages/network/bluez/udev.d/09-bluetooth.rules @@ -0,0 +1,6 @@ +ACTION!="add|change", GOTO="end" + +KERNEL=="hci[0-9]*", SUBSYSTEM=="bluetooth", RUN+="/usr/bin/hciconfig %k up" +KERNEL=="hci[0-9]*", SUBSYSTEM=="bluetooth", RUN+="/usr/bin/hciconfig %k lm master" + +LABEL="end" From a36cfc862aeaa2573b872ad04f74b699d4e50c08 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 30 Jan 2013 06:28:51 +0100 Subject: [PATCH 024/104] Revert "Revert "bluez: build depend on 'readline'"" This reverts commit 617d5bfc45965d1a11a091486f278f45c856c425. --- packages/network/bluez/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/network/bluez/meta b/packages/network/bluez/meta index 8558547642..233586be2e 100644 --- a/packages/network/bluez/meta +++ b/packages/network/bluez/meta @@ -26,7 +26,7 @@ PKG_LICENSE="GPL" PKG_SITE="http://www.bluez.org/" PKG_URL="http://www.kernel.org/pub/linux/bluetooth/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_DEPENDS="libusb-compat dbus glib systemd" -PKG_BUILD_DEPENDS="toolchain libusb-compat dbus glib systemd" +PKG_BUILD_DEPENDS="toolchain libusb-compat dbus glib systemd readline" PKG_PRIORITY="optional" PKG_SECTION="network" PKG_SHORTDESC="bluez: Bluetooth Tools and System Daemons for Linux." From 75743a3f577564f05f383d67aa5d755d0d2c7a86 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 30 Jan 2013 06:29:03 +0100 Subject: [PATCH 025/104] Revert "Revert "bluez: rework install script, install some tools to release build"" This reverts commit 52e8b1e9c7341f22289c440e61b4752000bc95c7. --- packages/network/bluez/build | 2 +- packages/network/bluez/install | 58 ++++++++++++++++++++-------------- 2 files changed, 35 insertions(+), 25 deletions(-) diff --git a/packages/network/bluez/build b/packages/network/bluez/build index 1c9f9c300c..133e8152f3 100755 --- a/packages/network/bluez/build +++ b/packages/network/bluez/build @@ -31,7 +31,7 @@ fi if [ "$DEVTOOLS" = "yes" ]; then DEVTOOLS_CONFIG="--enable-monitor --enable-test --enable-tools" else - DEVTOOLS_CONFIG="--disable-monitor --disable-test --disable-tools" + DEVTOOLS_CONFIG="--disable-monitor --disable-test --enable-tools" fi cd $PKG_BUILD diff --git a/packages/network/bluez/install b/packages/network/bluez/install index 61218f9d25..70ab26b61c 100755 --- a/packages/network/bluez/install +++ b/packages/network/bluez/install @@ -25,35 +25,45 @@ mkdir -p $INSTALL/etc/dbus-1/system.d cp $PKG_BUILD/src/bluetooth.conf $INSTALL/etc/dbus-1/system.d -mkdir -p $INSTALL/lib/udev - cp $PKG_BUILD/tools/hid2hci $INSTALL/lib/udev - -mkdir -p $INSTALL/lib/udev/rules.d - cp $PKG_BUILD/tools/97-hid2hci.rules $INSTALL/lib/udev/rules.d - -mkdir -p $INSTALL/usr/lib - cp -P $PKG_BUILD/lib/.libs/libbluetooth.so* $INSTALL/usr/lib - mkdir -p $INSTALL/usr/lib/bluetooth cp $PKG_BUILD/src/bluetoothd $INSTALL/usr/lib/bluetooth cp $PKG_BUILD/obexd/src/obexd $INSTALL/usr/lib/bluetooth -if [ "$DEVTOOLS" = "yes" ]; then -mkdir -p $INSTALL/usr/bin - cp $PKG_BUILD/tools/bccmd $INSTALL/usr/bin - cp $PKG_BUILD/client/bluetoothctl $INSTALL/usr/bin - cp $PKG_BUILD/monitor/btmon $INSTALL/usr/bin - cp $PKG_BUILD/tools/ciptool $INSTALL/usr/bin - cp $PKG_BUILD/tools/hciattach $INSTALL/usr/bin - cp $PKG_BUILD/tools/hciconfig $INSTALL/usr/bin - cp $PKG_BUILD/tools/hcidump $INSTALL/usr/bin - cp $PKG_BUILD/tools/hcitool $INSTALL/usr/bin - cp $PKG_BUILD/tools/l2ping $INSTALL/usr/bin - cp $PKG_BUILD/tools/l2test $INSTALL/usr/bin - cp $PKG_BUILD/tools/rctest $INSTALL/usr/bin - cp $PKG_BUILD/tools/rfcomm $INSTALL/usr/bin - cp $PKG_BUILD/tools/sdptool $INSTALL/usr/bin +mkdir -p $INSTALL/usr/lib + cp -P $PKG_BUILD/lib/.libs/libbluetooth.so* $INSTALL/usr/lib +# client + mkdir -p $INSTALL/usr/bin + cp $PKG_BUILD/client/bluetoothctl $INSTALL/usr/bin + +# tools + mkdir -p $INSTALL/lib/udev + cp $PKG_BUILD/tools/hid2hci $INSTALL/lib/udev + + mkdir -p $INSTALL/lib/udev/rules.d + cp $PKG_BUILD/tools/97-hid2hci.rules $INSTALL/lib/udev/rules.d + + mkdir -p $INSTALL/usr/bin + cp $PKG_BUILD/tools/bccmd $INSTALL/usr/bin + cp $PKG_BUILD/tools/ciptool $INSTALL/usr/bin + cp $PKG_BUILD/tools/hciattach $INSTALL/usr/bin + cp $PKG_BUILD/tools/hciconfig $INSTALL/usr/bin + cp $PKG_BUILD/tools/hcidump $INSTALL/usr/bin + cp $PKG_BUILD/tools/hcitool $INSTALL/usr/bin + cp $PKG_BUILD/tools/l2ping $INSTALL/usr/bin + cp $PKG_BUILD/tools/l2test $INSTALL/usr/bin + cp $PKG_BUILD/tools/rctest $INSTALL/usr/bin + cp $PKG_BUILD/tools/rfcomm $INSTALL/usr/bin + cp $PKG_BUILD/tools/sdptool $INSTALL/usr/bin + +# test + +if [ "$DEVTOOLS" = "yes" ]; then +# monitor + mkdir -p $INSTALL/usr/bin + cp $PKG_BUILD/monitor/btmon $INSTALL/usr/bin + +# test mkdir -p $INSTALL/usr/lib/bluez/test cp -P $PKG_BUILD/test/* $INSTALL/usr/lib/bluez/test chmod +x $INSTALL/usr/lib/bluez/test/* From 13e26acd7989514cea780b71afa805ee43baea41 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 30 Jan 2013 10:58:16 +0200 Subject: [PATCH 026/104] setxkbmap: prepare for new settings addon integration --- packages/x11/app/setxkbmap/scripts/xkb-setup | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/packages/x11/app/setxkbmap/scripts/xkb-setup b/packages/x11/app/setxkbmap/scripts/xkb-setup index a2498b336a..04a8c4017e 100755 --- a/packages/x11/app/setxkbmap/scripts/xkb-setup +++ b/packages/x11/app/setxkbmap/scripts/xkb-setup @@ -20,21 +20,6 @@ # http://www.gnu.org/copyleft/gpl.html ################################################################################ -. /etc/profile -. /var/config/settings.conf - -if [ -z $X11_KEYMAP ]; then - X11_KEYMAP="us" +if [ -f /storage/.cache/xkb/layout ] ; then + cat /storage/.cache/xkb/layout fi - -if [ ! "$X11_KEYMAP2" == "-none-" ]; then - XKBLAYOUT="$X11_KEYMAP,$X11_KEYMAP2" - XKBOPTIONS="grp:alt_shift_toggle" -else - XKBLAYOUT="$X11_KEYMAP" -fi - -echo "XKBMODEL=\"pc105\"" -echo "XKBVARIANT=\"\"" -echo "XKBLAYOUT=\"$XKBLAYOUT\"" -echo "XKBOPTIONS=\"$XKBOPTIONS\"" From 2f5996981ae30a2e56ede0544303a9f656e6330e Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sat, 2 Feb 2013 06:55:28 +0100 Subject: [PATCH 027/104] bluez: add patch to use gobject instead gi.repository Signed-off-by: Stephan Raue --- .../bluez-dont_use_gi.repository.patch | 122 ++++++++++++++++++ 1 file changed, 122 insertions(+) create mode 100644 packages/network/bluez/patches/bluez-dont_use_gi.repository.patch diff --git a/packages/network/bluez/patches/bluez-dont_use_gi.repository.patch b/packages/network/bluez/patches/bluez-dont_use_gi.repository.patch new file mode 100644 index 0000000000..2ef4dd46e9 --- /dev/null +++ b/packages/network/bluez/patches/bluez-dont_use_gi.repository.patch @@ -0,0 +1,122 @@ +diff -Naur bluez-5.1/test/simple-agent bluez-5.1.patch/test/simple-agent +--- bluez-5.1/test/simple-agent 2012-12-24 18:46:55.000000000 +0100 ++++ bluez-5.1.patch/test/simple-agent 2013-02-02 05:24:47.752050167 +0100 +@@ -2,7 +2,7 @@ + + from __future__ import absolute_import, print_function, unicode_literals + +-from gi.repository import GObject ++import gobject + + import sys + import dbus +@@ -151,7 +151,7 @@ + path = "/test/agent" + agent = Agent(bus, path) + +- mainloop = GObject.MainLoop() ++ mainloop = gobject.MainLoop() + + obj = bus.get_object(BUS_NAME, "/org/bluez"); + manager = dbus.Interface(obj, "org.bluez.AgentManager1") +diff -Naur bluez-5.1/test/test-device bluez-5.1.patch/test/test-device +--- bluez-5.1/test/test-device 2012-12-24 18:46:55.000000000 +0100 ++++ bluez-5.1.patch/test/test-device 2013-02-02 05:24:47.755050146 +0100 +@@ -2,7 +2,7 @@ + + from __future__ import absolute_import, print_function, unicode_literals + +-from gi.repository import GObject ++import gobject + + import sys + import dbus +@@ -13,7 +13,7 @@ + + dbus.mainloop.glib.DBusGMainLoop(set_as_default=True) + bus = dbus.SystemBus() +-mainloop = GObject.MainLoop() ++mainloop = gobject.MainLoop() + + option_list = [ + make_option("-i", "--device", action="store", +diff -Naur bluez-5.1/test/test-discovery bluez-5.1.patch/test/test-discovery +--- bluez-5.1/test/test-discovery 2012-12-24 18:46:55.000000000 +0100 ++++ bluez-5.1.patch/test/test-discovery 2013-02-02 05:24:47.755050146 +0100 +@@ -2,7 +2,7 @@ + + from __future__ import absolute_import, print_function, unicode_literals + +-from gi.repository import GObject ++import gobject + + import dbus + import dbus.mainloop.glib +@@ -152,5 +152,5 @@ + + adapter.StartDiscovery() + +- mainloop = GObject.MainLoop() ++ mainloop = gobject.MainLoop() + mainloop.run() +diff -Naur bluez-5.1/test/test-hfp bluez-5.1.patch/test/test-hfp +--- bluez-5.1/test/test-hfp 2012-12-24 18:46:55.000000000 +0100 ++++ bluez-5.1.patch/test/test-hfp 2013-02-02 05:24:47.756050139 +0100 +@@ -2,7 +2,7 @@ + + from __future__ import absolute_import, print_function, unicode_literals + +-from gi.repository import GObject ++import gobject + + import os + import sys +@@ -217,7 +217,7 @@ + + (options, args) = parser.parse_args() + +- mainloop = GObject.MainLoop() ++ mainloop = gobject.MainLoop() + + opts = { + "Version" : dbus.UInt16(0x0106), +diff -Naur bluez-5.1/test/test-manager bluez-5.1.patch/test/test-manager +--- bluez-5.1/test/test-manager 2012-12-24 18:46:55.000000000 +0100 ++++ bluez-5.1.patch/test/test-manager 2013-02-02 05:24:47.757050132 +0100 +@@ -2,7 +2,7 @@ + + from __future__ import absolute_import, print_function, unicode_literals + +-from gi.repository import GObject ++import gobject + + import dbus + import dbus.mainloop.glib +@@ -35,5 +35,5 @@ + except: + print("No adapter found") + +- mainloop = GObject.MainLoop() ++ mainloop = gobject.MainLoop() + mainloop.run() +diff -Naur bluez-5.1/test/test-profile bluez-5.1.patch/test/test-profile +--- bluez-5.1/test/test-profile 2012-12-24 18:46:55.000000000 +0100 ++++ bluez-5.1.patch/test/test-profile 2013-02-02 05:24:47.757050132 +0100 +@@ -2,7 +2,7 @@ + + from __future__ import absolute_import, print_function, unicode_literals + +-from gi.repository import GObject ++import gobject + + import os + import sys +@@ -93,7 +93,7 @@ + + profile = Profile(bus, options.path) + +- mainloop = GObject.MainLoop() ++ mainloop = gobject.MainLoop() + + opts = { + "AutoConnect" : options.auto_connect, From d76c3b4bc266a7eb571add1e5467bb9958a80851 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sat, 2 Feb 2013 06:55:48 +0100 Subject: [PATCH 028/104] bluez: cosmetics Signed-off-by: Stephan Raue --- packages/network/bluez/build | 1 - packages/network/bluez/install | 5 ++--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/packages/network/bluez/build b/packages/network/bluez/build index 133e8152f3..ff3a7afbeb 100755 --- a/packages/network/bluez/build +++ b/packages/network/bluez/build @@ -59,5 +59,4 @@ cd $PKG_BUILD $DEVTOOLS_CONFIG \ make - $MAKEINSTALL diff --git a/packages/network/bluez/install b/packages/network/bluez/install index 70ab26b61c..3d7ee83e4c 100755 --- a/packages/network/bluez/install +++ b/packages/network/bluez/install @@ -43,6 +43,8 @@ mkdir -p $INSTALL/usr/lib mkdir -p $INSTALL/lib/udev/rules.d cp $PKG_BUILD/tools/97-hid2hci.rules $INSTALL/lib/udev/rules.d +if [ "$DEVTOOLS" = "yes" ]; then +# tools mkdir -p $INSTALL/usr/bin cp $PKG_BUILD/tools/bccmd $INSTALL/usr/bin cp $PKG_BUILD/tools/ciptool $INSTALL/usr/bin @@ -56,9 +58,6 @@ mkdir -p $INSTALL/usr/lib cp $PKG_BUILD/tools/rfcomm $INSTALL/usr/bin cp $PKG_BUILD/tools/sdptool $INSTALL/usr/bin -# test - -if [ "$DEVTOOLS" = "yes" ]; then # monitor mkdir -p $INSTALL/usr/bin cp $PKG_BUILD/monitor/btmon $INSTALL/usr/bin From 606faf739e8b3ce34f141f6d89bbcaa99852e804 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sat, 2 Feb 2013 06:56:19 +0100 Subject: [PATCH 029/104] pygobject: cosmetics Signed-off-by: Stephan Raue --- packages/python/devel/pygobject/build | 1 - 1 file changed, 1 deletion(-) diff --git a/packages/python/devel/pygobject/build b/packages/python/devel/pygobject/build index 3bd9f1a62a..42e0db53ed 100755 --- a/packages/python/devel/pygobject/build +++ b/packages/python/devel/pygobject/build @@ -35,5 +35,4 @@ cd $PKG_BUILD --disable-introspection \ make - $MAKEINSTALL From 9b69ffb3d2e8b3879cbf2783042a1bae60f28897 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sat, 2 Feb 2013 15:56:32 +0200 Subject: [PATCH 030/104] xbmc-addon-settings: initscript to reset OE to defaults --- .../xbmc-addon-settings/init.d/00_reset | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 packages/mediacenter/xbmc-addon-settings/init.d/00_reset diff --git a/packages/mediacenter/xbmc-addon-settings/init.d/00_reset b/packages/mediacenter/xbmc-addon-settings/init.d/00_reset new file mode 100644 index 0000000000..4766e0be92 --- /dev/null +++ b/packages/mediacenter/xbmc-addon-settings/init.d/00_reset @@ -0,0 +1,71 @@ +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ +# reset openelec +# +# runlevels: openelec, textmode + +get_target() { + for arg in $(cat /proc/cmdline); do + case $arg in + disk=*) + disk="${arg#*=}" + case $disk in + LABEL=*) + label="${disk#*=}" + target=`blkid -L $label` + ;; + UUID=*) + uuid="${disk#*=}" + target=`blkid -U $uuid` + ;; + /*) + target=$disk + ;; + esac + ;; + esac + done +} + +# hard reset +if [ -f /storage/.cache/reset_oe ] ; then + get_target + if [ ! -z $target ] ; then + echo "hard resetting..." + umount /storage + mke2fs -t ext4 -m 0 $target 2>&1 >/dev/null + if [ ! -z $label ] ; then + tune2fs -U random -L $label $target + fi + if [ ! -z $uuid ] ; then + tune2fs -U $uuid $target + fi + reboot + fi +fi + +# soft reset +if [ -f /storage/.cache/reset_xbmc ] ; then + get_target + if [ ! -z $target ] ; then + echo "soft resetting..." + rm -rf /storage/.??* 2>&1 >/dev/null + fi +fi From 5b5d4b613a5826f1dab9f6ae963af4d11018f77f Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 4 Feb 2013 21:54:38 +0100 Subject: [PATCH 031/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.10 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 9556a56572..c96ffd8cdb 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.8" +PKG_VERSION="0.0.10" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From e1f79f46e888f45e7536cafebb8e24f636bcc4cb Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 4 Feb 2013 22:07:09 +0100 Subject: [PATCH 032/104] remove package 'xbmc-ps3d' supersseded by our settings addon Signed-off-by: Stephan Raue --- packages/addons/driver/xbmc-ps3d/addon | 34 -------------- .../addons/driver/xbmc-ps3d/changelog.txt | 23 ---------- .../addons/driver/xbmc-ps3d/icon/icon.png | Bin 28904 -> 0 bytes packages/addons/driver/xbmc-ps3d/meta | 38 ---------------- .../driver/xbmc-ps3d/source/bin/ps3d.service | 43 ------------------ .../addons/driver/xbmc-ps3d/source/default.py | 23 ---------- 6 files changed, 161 deletions(-) delete mode 100755 packages/addons/driver/xbmc-ps3d/addon delete mode 100644 packages/addons/driver/xbmc-ps3d/changelog.txt delete mode 100644 packages/addons/driver/xbmc-ps3d/icon/icon.png delete mode 100644 packages/addons/driver/xbmc-ps3d/meta delete mode 100755 packages/addons/driver/xbmc-ps3d/source/bin/ps3d.service delete mode 100644 packages/addons/driver/xbmc-ps3d/source/default.py diff --git a/packages/addons/driver/xbmc-ps3d/addon b/packages/addons/driver/xbmc-ps3d/addon deleted file mode 100755 index 52cec8be9c..0000000000 --- a/packages/addons/driver/xbmc-ps3d/addon +++ /dev/null @@ -1,34 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -mkdir -p $ADDON_BUILD/$PKG_ADDON_ID/pixmaps - cp $BUILD/xbmc-*/tools/EventClients/icons/bluetooth.png $ADDON_BUILD/$PKG_ADDON_ID/pixmaps - -mkdir -p $ADDON_BUILD/$PKG_ADDON_ID/pylib - cp -R $BUILD/PyBluez-*/.install/usr/lib/python*/site-packages/* $ADDON_BUILD/$PKG_ADDON_ID/pylib - -mkdir -p $ADDON_BUILD/$PKG_ADDON_ID/pylib/xbmc - cp $BUILD/xbmc-*/tools/EventClients/Clients/PS3\ Sixaxis\ Controller/ps3d.py $ADDON_BUILD/$PKG_ADDON_ID/pylib/xbmc - cp $BUILD/xbmc-*/tools/EventClients/Clients/PS3\ BD\ Remote/ps3_remote.py $ADDON_BUILD/$PKG_ADDON_ID/pylib/xbmc - cp -R $BUILD/xbmc-*/tools/EventClients/lib/python/* $ADDON_BUILD/$PKG_ADDON_ID/pylib/xbmc diff --git a/packages/addons/driver/xbmc-ps3d/changelog.txt b/packages/addons/driver/xbmc-ps3d/changelog.txt deleted file mode 100644 index 1116f74437..0000000000 --- a/packages/addons/driver/xbmc-ps3d/changelog.txt +++ /dev/null @@ -1,23 +0,0 @@ -3.0.1 -- bump addon version - -2.1.1 -- update to addon version 2.1 - -2.0.3 -- fix so python dont steal xbmc's webserver port - -2.0.2 -- rebuild with latest changes - -2.0.1 -- fix so python dont steal xbmc's webserver port - -2.0.0 -- prepare for OpenELEC-2.0 release - -1.90.1 -- depends on xbmc.python API 2.0 - -1.90.0 -- initial version xbmc-ps3d diff --git a/packages/addons/driver/xbmc-ps3d/icon/icon.png b/packages/addons/driver/xbmc-ps3d/icon/icon.png deleted file mode 100644 index 6da0cbd829faeadc51a4687502af25e1e22ce735..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 28904 zcmd42g;!Kx^geuMhVEu)kS;0d8bDGc1qo>oP`aC;LApT@P*4my6^Ws{m6TRO>F)XQ z`M$q5|AKec%$j@dU2E={efECNv-h)aoQ{?%As#Ir0Dw?k?V%n3kh?<&z`?rvdgk%* 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z6*g+buKiScDv0wD_hGX4%o~@$T*S=>!>U>I&oSF_V6{Z0Q592`bwl^iFSxc z(VJEM{G%sT`zCt;nh8(~`C)?fZ=?>HVQtu*e{WGPMEl?9t|^}qngfLF)erx_KH5$l z71f_?%OL1m&i@^*7h-t+>e@SR!Ug?h5Ntl|RW;=Lm+{ufyiD0%QRAm%^fbEvXXu{c zkE*>%d&#Eh{|0ecVtr~L+|95~;;=?#mIsY~k~I4NFMdq<|1AFGp $ADDON_DIR/pylib/xbmc/defs.py - fi - -################################################################################ -# start ps3d -################################################################################ - python $ADDON_DIR/pylib/xbmc/ps3d.py & diff --git a/packages/addons/driver/xbmc-ps3d/source/default.py b/packages/addons/driver/xbmc-ps3d/source/default.py deleted file mode 100644 index c1b1d2483b..0000000000 --- a/packages/addons/driver/xbmc-ps3d/source/default.py +++ /dev/null @@ -1,23 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -import xbmc, time, os, subprocess - -subprocess.Popen("ps3d.service", shell=True, close_fds=True) \ No newline at end of file From 018ffe095afed8bebc319b566d802680c2b7cc40 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 4 Feb 2013 22:07:24 +0100 Subject: [PATCH 033/104] remove package 'xbmc-wiimote' supersseded by our settings addon Signed-off-by: Stephan Raue --- packages/addons/driver/xbmc-wiimote/addon | 29 ------------- packages/addons/driver/xbmc-wiimote/build | 28 ------------- .../addons/driver/xbmc-wiimote/changelog.txt | 14 ------- .../addons/driver/xbmc-wiimote/icon/icon.png | Bin 28904 -> 0 bytes packages/addons/driver/xbmc-wiimote/meta | 38 ------------------ .../xbmc-wiimote/source/bin/wiimote.service | 32 --------------- .../driver/xbmc-wiimote/source/default.py | 32 --------------- 7 files changed, 173 deletions(-) delete mode 100755 packages/addons/driver/xbmc-wiimote/addon delete mode 100755 packages/addons/driver/xbmc-wiimote/build delete mode 100644 packages/addons/driver/xbmc-wiimote/changelog.txt delete mode 100644 packages/addons/driver/xbmc-wiimote/icon/icon.png delete mode 100644 packages/addons/driver/xbmc-wiimote/meta delete mode 100755 packages/addons/driver/xbmc-wiimote/source/bin/wiimote.service delete mode 100644 packages/addons/driver/xbmc-wiimote/source/default.py diff --git a/packages/addons/driver/xbmc-wiimote/addon b/packages/addons/driver/xbmc-wiimote/addon deleted file mode 100755 index ffa107054a..0000000000 --- a/packages/addons/driver/xbmc-wiimote/addon +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -mkdir -p $ADDON_BUILD/$PKG_ADDON_ID/bin - cp $BUILD/xbmc-*/tools/EventClients/Clients/WiiRemote/WiiUse_WiiRemote $ADDON_BUILD/$PKG_ADDON_ID/bin/wiimote - -mkdir -p $ADDON_BUILD/$PKG_ADDON_ID/lib - cp -P $BUILD/wiiuse_v[0-9]*/src/release*/*.so $ADDON_BUILD/$PKG_ADDON_ID/lib diff --git a/packages/addons/driver/xbmc-wiimote/build b/packages/addons/driver/xbmc-wiimote/build deleted file mode 100755 index 3868729bf4..0000000000 --- a/packages/addons/driver/xbmc-wiimote/build +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -$SCRIPTS/unpack xbmc - -cd $BUILD/xbmc-*/tools/EventClients/Clients/WiiRemote - $CXX $CFLAGS -lwiiuse WiiUse_WiiRemote.cpp -o WiiUse_WiiRemote diff --git a/packages/addons/driver/xbmc-wiimote/changelog.txt b/packages/addons/driver/xbmc-wiimote/changelog.txt deleted file mode 100644 index aec327a40c..0000000000 --- a/packages/addons/driver/xbmc-wiimote/changelog.txt +++ /dev/null @@ -1,14 +0,0 @@ -3.0.1 -- bump addon version - -2.1.1 -- update to addon version 2.1 - -2.0.0 -- prepare for OpenELEC-2.0 release - -1.90.1 -- depends on xbmc.python API 2.0 - -1.90.0 -- initial version xbmc-wiimote diff --git a/packages/addons/driver/xbmc-wiimote/icon/icon.png b/packages/addons/driver/xbmc-wiimote/icon/icon.png deleted file mode 100644 index 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z?I)PH!lKbcP|RpzC|00VBc@ySJI{2PlQ+`Z*ot^hYi&fr)xN^Ev}uGMo@e(T>o~5| z63_Ux45za@NgpdJ?gS?!7T$fT^&Z%%bu1O#xkrmkoCY5sJ~h41LLCY}E9IXk=O|yX z6*g+buKiScDv0wD_hGX4%o~@$T*S=>!>U>I&oSF_V6{Z0Q592`bwl^iFSxc z(VJEM{G%sT`zCt;nh8(~`C)?fZ=?>HVQtu*e{WGPMEl?9t|^}qngfLF)erx_KH5$l z71f_?%OL1m&i@^*7h-t+>e@SR!Ug?h5Ntl|RW;=Lm+{ufyiD0%QRAm%^fbEvXXu{c zkE*>%d&#Eh{|0ecVtr~L+|95~;;=?#mIsY~k~I4NFMdq<|1AFGp Date: Mon, 4 Feb 2013 22:07:43 +0100 Subject: [PATCH 034/104] remove package 'PyBluez' Signed-off-by: Stephan Raue --- packages/python/system/PyBluez/build | 31 --------------- packages/python/system/PyBluez/install | 25 ------------ packages/python/system/PyBluez/meta | 36 ------------------ .../PyBluez/patches/PyBluez-0.18-linux3.patch | 38 ------------------- .../patches/PyBluez-0.18-setuptools.patch | 14 ------- 5 files changed, 144 deletions(-) delete mode 100755 packages/python/system/PyBluez/build delete mode 100755 packages/python/system/PyBluez/install delete mode 100644 packages/python/system/PyBluez/meta delete mode 100644 packages/python/system/PyBluez/patches/PyBluez-0.18-linux3.patch delete mode 100644 packages/python/system/PyBluez/patches/PyBluez-0.18-setuptools.patch diff --git a/packages/python/system/PyBluez/build b/packages/python/system/PyBluez/build deleted file mode 100755 index 69832db409..0000000000 --- a/packages/python/system/PyBluez/build +++ /dev/null @@ -1,31 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -export PYTHONXCPREFIX="$SYSROOT_PREFIX/usr" -export LDFLAGS="$LDFLAGS -L$SYSROOT_PREFIX/usr/lib -L$SYSROOT_PREFIX/lib" - -cd $PKG_BUILD - -python setup.py build --cross-compile -python setup.py install --root=./.install --prefix=/usr diff --git a/packages/python/system/PyBluez/install b/packages/python/system/PyBluez/install deleted file mode 100755 index 85a37ef61d..0000000000 --- a/packages/python/system/PyBluez/install +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -cp -PR $PKG_BUILD/.install/* $INSTALL diff --git a/packages/python/system/PyBluez/meta b/packages/python/system/PyBluez/meta deleted file mode 100644 index 9e2686fa2d..0000000000 --- a/packages/python/system/PyBluez/meta +++ /dev/null @@ -1,36 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -PKG_NAME="PyBluez" -PKG_VERSION="0.18" -PKG_REV="1" -PKG_ARCH="any" -PKG_LICENSE="GPL" -PKG_SITE="http://code.google.com/p/pybluez/" -PKG_URL="http://pybluez.googlecode.com/files/$PKG_NAME-$PKG_VERSION.tar.gz" -PKG_DEPENDS="Python bluez" -PKG_BUILD_DEPENDS="toolchain Python distutilscross bluez" -PKG_PRIORITY="optional" -PKG_SECTION="python/system" -PKG_SHORTDESC="PyBluez: an effort to create python wrappers around system Bluetooth resources" -PKG_LONGDESC="PyBluez is an effort to create python wrappers around system Bluetooth resources to allow Python developers to easily and quickly create Bluetooth applications." -PKG_IS_ADDON="no" - -PKG_AUTORECONF="no" diff --git a/packages/python/system/PyBluez/patches/PyBluez-0.18-linux3.patch b/packages/python/system/PyBluez/patches/PyBluez-0.18-linux3.patch deleted file mode 100644 index d0a5a95312..0000000000 --- a/packages/python/system/PyBluez/patches/PyBluez-0.18-linux3.patch +++ /dev/null @@ -1,38 +0,0 @@ -diff -Naur PyBluez-0.18/bluetooth/__init__.py PyBluez-0.18.patch/bluetooth/__init__.py ---- PyBluez-0.18/bluetooth/__init__.py 2009-11-24 09:39:49.000000000 +0100 -+++ PyBluez-0.18.patch/bluetooth/__init__.py 2011-11-30 11:41:31.652163261 +0100 -@@ -30,10 +30,12 @@ - _dbg("Widcomm not ready. falling back to MS stack") - from msbt import * - --elif sys.platform == "linux2": -+elif sys.platform.startswith("linux"): - from bluez import * - elif sys.platform == "darwin": - from osx import * -+else: -+ raise Exception("This platform (%s) is currently not supported by pybluez." % sys.platform) - - discover_devices.__doc__ = \ - """ -diff -Naur PyBluez-0.18/setup.py PyBluez-0.18.patch/setup.py ---- PyBluez-0.18/setup.py 2009-11-25 23:39:55.000000000 +0100 -+++ PyBluez-0.18.patch/setup.py 2011-11-30 11:42:45.018457088 +0100 -@@ -46,7 +46,7 @@ - ) - mods.append (mod2) - --elif sys.platform == 'linux2': -+elif sys.platform.startswith('linux'): - mod1 = Extension('bluetooth._bluetooth', - libraries = ['bluetooth'], - sources = ['bluez/btmodule.c', 'bluez/btsdp.c']) -@@ -59,6 +59,8 @@ - sources = ['osx/_osxbt.c'] - ) - mods = [ mod1 ] -+else: -+ raise Exception("This platform (%s) is currently not supported by pybluez." % sys.platform) - - - setup ( name = 'PyBluez', diff --git a/packages/python/system/PyBluez/patches/PyBluez-0.18-setuptools.patch b/packages/python/system/PyBluez/patches/PyBluez-0.18-setuptools.patch deleted file mode 100644 index db3c2be711..0000000000 --- a/packages/python/system/PyBluez/patches/PyBluez-0.18-setuptools.patch +++ /dev/null @@ -1,14 +0,0 @@ -diff -Naur PyBluez-0.18/setup.py PyBluez-0.18.patch/setup.py ---- PyBluez-0.18/setup.py 2009-11-25 23:39:55.000000000 +0100 -+++ PyBluez-0.18.patch/setup.py 2010-10-18 23:47:16.585821819 +0200 -@@ -1,7 +1,9 @@ - #!/usr/bin/env python - --from distutils.core import setup, Extension -+from setuptools import setup -+from setuptools.extension import Extension - from distutils.debug import DEBUG -+ - import sys - import os - From e9b9e137bb88defc6e6ae7f8ee15547de21b6c4d Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 4 Feb 2013 22:07:59 +0100 Subject: [PATCH 035/104] remove package 'wiiuse' Signed-off-by: Stephan Raue --- packages/sysutils/wiiuse/build | 33 ----------------- packages/sysutils/wiiuse/install | 26 -------------- packages/sysutils/wiiuse/meta | 36 ------------------- .../patches/wiiuse-v0.12-connect-0.1.patch | 11 ------ .../wiiuse-v0.12-crosscompiling-0.1.patch | 36 ------------------- 5 files changed, 142 deletions(-) delete mode 100755 packages/sysutils/wiiuse/build delete mode 100755 packages/sysutils/wiiuse/install delete mode 100644 packages/sysutils/wiiuse/meta delete mode 100644 packages/sysutils/wiiuse/patches/wiiuse-v0.12-connect-0.1.patch delete mode 100644 packages/sysutils/wiiuse/patches/wiiuse-v0.12-crosscompiling-0.1.patch diff --git a/packages/sysutils/wiiuse/build b/packages/sysutils/wiiuse/build deleted file mode 100755 index 2363e58aad..0000000000 --- a/packages/sysutils/wiiuse/build +++ /dev/null @@ -1,33 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -cd $PKG_BUILD - -make wiiuse - -mkdir -p $SYSROOT_PREFIX/usr/lib - cp src/release*/*.so $SYSROOT_PREFIX/usr/lib - -mkdir -p $SYSROOT_PREFIX/usr/include - cp src/wiiuse.h $SYSROOT_PREFIX/usr/include diff --git a/packages/sysutils/wiiuse/install b/packages/sysutils/wiiuse/install deleted file mode 100755 index d285e8a79b..0000000000 --- a/packages/sysutils/wiiuse/install +++ /dev/null @@ -1,26 +0,0 @@ -#!/bin/sh - -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -. config/options $1 - -mkdir -p $INSTALL/usr/lib - cp -PR $PKG_BUILD/src/release*/*.so $INSTALL/usr/lib diff --git a/packages/sysutils/wiiuse/meta b/packages/sysutils/wiiuse/meta deleted file mode 100644 index 1ea5653aeb..0000000000 --- a/packages/sysutils/wiiuse/meta +++ /dev/null @@ -1,36 +0,0 @@ -################################################################################ -# This file is part of OpenELEC - http://www.openelec.tv -# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -PKG_NAME="wiiuse" -PKG_VERSION="v0.12" -PKG_REV="1" -PKG_ARCH="any" -PKG_LICENSE="GPLv3" -PKG_SITE="http://www.wiiuse.net/" -PKG_URL="$SOURCEFORGE_SRC/wiiuse/wiiuse/$PKG_VERSION/${PKG_NAME}_${PKG_VERSION}_src.tar.gz" -PKG_DEPENDS="bluez" -PKG_BUILD_DEPENDS="toolchain bluez" -PKG_PRIORITY="optional" -PKG_SECTION="system" -PKG_SHORTDESC="Wiiuse is a library written in C that connects with several Nintendo Wii remotes." -PKG_LONGDESC="Wiiuse is a library written in C that connects with several Nintendo Wii remotes. Supports motion sensing, IR tracking, nunchuk, classic controller, and the Guitar Hero 3 controller. Single threaded and nonblocking makes a light weight and clean API." -PKG_IS_ADDON="yes" - -PKG_AUTORECONF="no" diff --git a/packages/sysutils/wiiuse/patches/wiiuse-v0.12-connect-0.1.patch b/packages/sysutils/wiiuse/patches/wiiuse-v0.12-connect-0.1.patch deleted file mode 100644 index 5b78b1b6d8..0000000000 --- a/packages/sysutils/wiiuse/patches/wiiuse-v0.12-connect-0.1.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -Naur wiiuse_v0.12/src/io_nix.c wiiuse_v0.12.patch/src/io_nix.c ---- wiiuse_v0.12/src/io_nix.c 2008-03-29 22:53:32.000000000 +0100 -+++ wiiuse_v0.12.patch/src/io_nix.c 2010-09-21 22:50:08.889265428 +0200 -@@ -171,6 +171,7 @@ - static int wiiuse_connect_single(struct wiimote_t* wm, char* address) { - struct sockaddr_l2 addr; - -+ memset(&addr, 0, sizeof (addr)); //is missing in the line 174 of io_nix.c - if (!wm || WIIMOTE_IS_CONNECTED(wm)) - return 0; - diff --git a/packages/sysutils/wiiuse/patches/wiiuse-v0.12-crosscompiling-0.1.patch b/packages/sysutils/wiiuse/patches/wiiuse-v0.12-crosscompiling-0.1.patch deleted file mode 100644 index 7fcfcbaf98..0000000000 --- a/packages/sysutils/wiiuse/patches/wiiuse-v0.12-crosscompiling-0.1.patch +++ /dev/null @@ -1,36 +0,0 @@ -diff -Naur wiiuse_v0.12/example/Makefile wiiuse_v0.12.patch/example/Makefile ---- wiiuse_v0.12/example/Makefile 2008-04-02 02:45:40.000000000 +0200 -+++ wiiuse_v0.12.patch/example/Makefile 2010-09-21 21:31:12.052265717 +0200 -@@ -5,7 +5,7 @@ - # - # Change this to your GCC version. - # --CC = gcc -+CC ?= gcc - - #################################################### - # -diff -Naur wiiuse_v0.12/example-sdl/Makefile wiiuse_v0.12.patch/example-sdl/Makefile ---- wiiuse_v0.12/example-sdl/Makefile 2008-04-02 02:45:53.000000000 +0200 -+++ wiiuse_v0.12.patch/example-sdl/Makefile 2010-09-21 21:31:19.907265540 +0200 -@@ -5,7 +5,7 @@ - # - # Change this to your GCC version. - # --CC = gcc -+CC ?= gcc - - #################################################### - # -diff -Naur wiiuse_v0.12/src/Makefile wiiuse_v0.12.patch/src/Makefile ---- wiiuse_v0.12/src/Makefile 2008-03-03 00:30:04.000000000 +0100 -+++ wiiuse_v0.12.patch/src/Makefile 2010-09-21 21:31:27.338390537 +0200 -@@ -5,7 +5,7 @@ - # - # Change this to your GCC version. - # --CC = gcc -+CC ?= gcc - - #################################################### - # From 1ae1cffa40a1a5269bd57fd14225b5712e5c5d61 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 6 Feb 2013 22:37:05 +0100 Subject: [PATCH 036/104] bluez: update to bluez-5.2 Signed-off-by: Stephan Raue --- packages/network/bluez/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/network/bluez/meta b/packages/network/bluez/meta index 233586be2e..4bde271d76 100644 --- a/packages/network/bluez/meta +++ b/packages/network/bluez/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="bluez" -PKG_VERSION="5.1" +PKG_VERSION="5.2" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" From f3ef3f2d510ffd3c4758680cbe151342ac260e95 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Fri, 8 Feb 2013 23:47:15 +0200 Subject: [PATCH 037/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.11 --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index c96ffd8cdb..1ddcd8b931 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.10" +PKG_VERSION="0.0.11" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From cc5511700abbceef15baa316ddaad15a058235e4 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 10 Feb 2013 00:01:32 +0200 Subject: [PATCH 038/104] syslog: new settings addon integration --- packages/sysutils/busybox/init.d/08_syslogd | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/packages/sysutils/busybox/init.d/08_syslogd b/packages/sysutils/busybox/init.d/08_syslogd index d3cf2e3242..333d4f68cc 100644 --- a/packages/sysutils/busybox/init.d/08_syslogd +++ b/packages/sysutils/busybox/init.d/08_syslogd @@ -26,7 +26,9 @@ ( progress "Starting Syslog daemon" - source /var/config/settings.conf + if [ -e /storage/.cache/syslog/remote ] ; then + source /storage/.cache/syslog/remote + fi SYSLOGD_OPTIONS="-L" From 2f359830523215ca6d9567ee7bf180bc329c8fd1 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 11 Feb 2013 15:29:08 +0100 Subject: [PATCH 039/104] bluez: remove init script Signed-off-by: Stephan Raue --- packages/network/bluez/init.d/22_bluez | 27 -------------------------- 1 file changed, 27 deletions(-) delete mode 100644 packages/network/bluez/init.d/22_bluez diff --git a/packages/network/bluez/init.d/22_bluez b/packages/network/bluez/init.d/22_bluez deleted file mode 100644 index 92aa14170a..0000000000 --- a/packages/network/bluez/init.d/22_bluez +++ /dev/null @@ -1,27 +0,0 @@ -################################################################################ -# Copyright (C) 2009-2010 OpenELEC.tv -# http://www.openelec.tv -# -# This Program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This Program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with OpenELEC.tv; see the file COPYING. If not, write to -# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. -# http://www.gnu.org/copyleft/gpl.html -################################################################################ - -# starting Bluetooth -# -# runlevels: openelec, textmode - -# starting Bluetooth manager - progress "starting Bluetooth manager" - /usr/lib/bluetooth/bluetoothd > /dev/null 2>&1 & From 027f420e68262e3e7f6628a7f719d0a97a05f34a Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 11 Feb 2013 15:29:37 +0100 Subject: [PATCH 040/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.15 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 1ddcd8b931..7417db5b61 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.11" +PKG_VERSION="0.0.15" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From 4640ed9ea7bc90580e2b15c9ef0c5397a86051e0 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 12 Feb 2013 13:45:01 +0100 Subject: [PATCH 041/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.16 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 7417db5b61..85a492d8ec 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.15" +PKG_VERSION="0.0.16" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From f2d0448fd818229b41572889aba2e45af0a7a948 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 12 Feb 2013 14:39:01 +0100 Subject: [PATCH 042/104] bluez: remove udev rules Signed-off-by: Stephan Raue --- packages/network/bluez/udev.d/09-bluetooth.rules | 6 ------ 1 file changed, 6 deletions(-) delete mode 100644 packages/network/bluez/udev.d/09-bluetooth.rules diff --git a/packages/network/bluez/udev.d/09-bluetooth.rules b/packages/network/bluez/udev.d/09-bluetooth.rules deleted file mode 100644 index 7aa0a38d29..0000000000 --- a/packages/network/bluez/udev.d/09-bluetooth.rules +++ /dev/null @@ -1,6 +0,0 @@ -ACTION!="add|change", GOTO="end" - -KERNEL=="hci[0-9]*", SUBSYSTEM=="bluetooth", RUN+="/usr/bin/hciconfig %k up" -KERNEL=="hci[0-9]*", SUBSYSTEM=="bluetooth", RUN+="/usr/bin/hciconfig %k lm master" - -LABEL="end" From 25b63d7773a90aa28d9df9ef54752e433fa03ca1 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 13 Feb 2013 17:59:29 +0100 Subject: [PATCH 043/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.20 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 85a492d8ec..65e31aa377 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.16" +PKG_VERSION="0.0.20" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From 0095fe3abc6d4adc5569841721d45a7bc12d4eaa Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 14 Feb 2013 12:56:42 +0200 Subject: [PATCH 044/104] linux: add patch to support the newest wii source: https://patchwork.kernel.org/patch/1624551/ --- .../3.7.7/linux-990.05-new-wiimote.patch | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 packages/linux/patches/3.7.7/linux-990.05-new-wiimote.patch diff --git a/packages/linux/patches/3.7.7/linux-990.05-new-wiimote.patch b/packages/linux/patches/3.7.7/linux-990.05-new-wiimote.patch new file mode 100644 index 0000000000..8c457411ff --- /dev/null +++ b/packages/linux/patches/3.7.7/linux-990.05-new-wiimote.patch @@ -0,0 +1,25 @@ +diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h +index 753f3d6..b5c2231 100644 +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -583,6 +583,7 @@ + + #define USB_VENDOR_ID_NINTENDO 0x057e + #define USB_DEVICE_ID_NINTENDO_WIIMOTE 0x0306 ++#define USB_DEVICE_ID_NINTENDO_WIIMOTE_2 0x0330 + + #define USB_VENDOR_ID_NOVATEK 0x0603 + #define USB_DEVICE_ID_NOVATEK_PCT 0x0600 +diff --git a/drivers/hid/hid-wiimote-core.c b/drivers/hid/hid-wiimote-core.c +index 84e2fbe..c8a4325 100644 +--- a/drivers/hid/hid-wiimote-core.c ++++ b/drivers/hid/hid-wiimote-core.c +@@ -1283,6 +1283,8 @@ static void wiimote_hid_remove(struct hid_device *hdev) + static const struct hid_device_id wiimote_hid_devices[] = { + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, + USB_DEVICE_ID_NINTENDO_WIIMOTE) }, ++ { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, ++ USB_DEVICE_ID_NINTENDO_WIIMOTE_2) }, + { } + }; + MODULE_DEVICE_TABLE(hid, wiimote_hid_devices); From e7d7a78a67ed8639d699d6bb66b53e0511072d9a Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 14 Feb 2013 16:55:05 +0100 Subject: [PATCH 045/104] xbmc-addon-settings: create pyo files, add patch to use pyo files Signed-off-by: Stephan Raue --- .../mediacenter/xbmc-addon-settings/build | 32 +++++++++++++++++++ .../service.openelec.settings-pyo.patch | 12 +++++++ .../mediacenter/xbmc-addon-settings/unpack | 7 ++++ 3 files changed, 51 insertions(+) create mode 100755 packages/mediacenter/xbmc-addon-settings/build create mode 100644 packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch diff --git a/packages/mediacenter/xbmc-addon-settings/build b/packages/mediacenter/xbmc-addon-settings/build new file mode 100755 index 0000000000..6c76578d6d --- /dev/null +++ b/packages/mediacenter/xbmc-addon-settings/build @@ -0,0 +1,32 @@ +#!/bin/sh + +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ + +. config/options $1 + +cd $PKG_BUILD + rm -rf `find . -name "*.pyo"` + + python -Wi -t -B $ROOT/$TOOLCHAIN/lib/python2.7/compileall.py ./service.openelec.settings/resources/lib/ -f + rm -rf `find ./service.openelec.settings/resources/lib/ -name "*.py"` + + python -Wi -t -B $ROOT/$TOOLCHAIN/lib/python2.7/compileall.py ./service.openelec.settings/oe.py -f + rm -rf ./service.openelec.settings/oe.py diff --git a/packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch b/packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch new file mode 100644 index 0000000000..e97cf5d14c --- /dev/null +++ b/packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch @@ -0,0 +1,12 @@ +diff -Naur a/service.openelec.settings/oe.py b/service.openelec.settings/oe.py +--- a/service.openelec.settings/oe.py 2013-02-12 16:37:57.000000000 +0100 ++++ b/service.openelec.settings/oe.py 2013-02-14 16:22:25.902628266 +0100 +@@ -542,7 +542,7 @@ + dictModules = {} + + for strFilename in sorted(os.listdir(__cwd__+"/resources/lib/modules")): +- if not strFilename.startswith("__") and strFilename.endswith(".py"): ++ if not strFilename.startswith("__") and strFilename.endswith(".pyo"): + + strModule, strExtension = strFilename.split(".") + try: diff --git a/packages/mediacenter/xbmc-addon-settings/unpack b/packages/mediacenter/xbmc-addon-settings/unpack index 09ae905c23..6c5b6426b7 100755 --- a/packages/mediacenter/xbmc-addon-settings/unpack +++ b/packages/mediacenter/xbmc-addon-settings/unpack @@ -27,3 +27,10 @@ ZIP_PKG="`echo $PKG_URL | sed 's%.*/\(.*\)$%\1%'`" mkdir -p $BUILD/${PKG_NAME}-${PKG_VERSION} unzip $SOURCES/$1/$ZIP_PKG -d $BUILD/${PKG_NAME}-${PKG_VERSION} >/dev/null 2>&1 + +echo "### Applying upstream patches ###" + +for patch in `ls $PKG_DIR/patches.upstream/*.patch`; do + cat $patch | patch -d \ + `echo $BUILD/$PKG_NAME-$PKG_VERSION | cut -f1 -d\ ` -p1 +done From a39ca432cd6e7f537a16e294a50f9374c1d3e573 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 15 Feb 2013 20:35:39 +0100 Subject: [PATCH 046/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.21 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- .../service.openelec.settings-pyo.patch | 12 ------------ packages/mediacenter/xbmc-addon-settings/unpack | 7 ------- 3 files changed, 1 insertion(+), 20 deletions(-) delete mode 100644 packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 65e31aa377..526f1210aa 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.20" +PKG_VERSION="0.0.21" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." diff --git a/packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch b/packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch deleted file mode 100644 index e97cf5d14c..0000000000 --- a/packages/mediacenter/xbmc-addon-settings/patches.upstream/service.openelec.settings-pyo.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -Naur a/service.openelec.settings/oe.py b/service.openelec.settings/oe.py ---- a/service.openelec.settings/oe.py 2013-02-12 16:37:57.000000000 +0100 -+++ b/service.openelec.settings/oe.py 2013-02-14 16:22:25.902628266 +0100 -@@ -542,7 +542,7 @@ - dictModules = {} - - for strFilename in sorted(os.listdir(__cwd__+"/resources/lib/modules")): -- if not strFilename.startswith("__") and strFilename.endswith(".py"): -+ if not strFilename.startswith("__") and strFilename.endswith(".pyo"): - - strModule, strExtension = strFilename.split(".") - try: diff --git a/packages/mediacenter/xbmc-addon-settings/unpack b/packages/mediacenter/xbmc-addon-settings/unpack index 6c5b6426b7..09ae905c23 100755 --- a/packages/mediacenter/xbmc-addon-settings/unpack +++ b/packages/mediacenter/xbmc-addon-settings/unpack @@ -27,10 +27,3 @@ ZIP_PKG="`echo $PKG_URL | sed 's%.*/\(.*\)$%\1%'`" mkdir -p $BUILD/${PKG_NAME}-${PKG_VERSION} unzip $SOURCES/$1/$ZIP_PKG -d $BUILD/${PKG_NAME}-${PKG_VERSION} >/dev/null 2>&1 - -echo "### Applying upstream patches ###" - -for patch in `ls $PKG_DIR/patches.upstream/*.patch`; do - cat $patch | patch -d \ - `echo $BUILD/$PKG_NAME-$PKG_VERSION | cut -f1 -d\ ` -p1 -done From 2aebdc7047f078e452010dee79b143347d1c29ff Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sat, 16 Feb 2013 19:03:48 +0200 Subject: [PATCH 047/104] linux: rename wiimote patch --- .../linux/patches/{3.7.7 => 3.7.8}/linux-990.05-new-wiimote.patch | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename packages/linux/patches/{3.7.7 => 3.7.8}/linux-990.05-new-wiimote.patch (100%) diff --git a/packages/linux/patches/3.7.7/linux-990.05-new-wiimote.patch b/packages/linux/patches/3.7.8/linux-990.05-new-wiimote.patch similarity index 100% rename from packages/linux/patches/3.7.7/linux-990.05-new-wiimote.patch rename to packages/linux/patches/3.7.8/linux-990.05-new-wiimote.patch From c6fcf1f8f8bbe1e2f081bf5b6a1d524ad9f524c2 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 20 Feb 2013 11:12:01 +0200 Subject: [PATCH 048/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.26 --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 526f1210aa..5c2a2733a3 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.21" +PKG_VERSION="0.0.26" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From b027f1e92cc80272de59be1b210be193733fa7d3 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 20 Feb 2013 20:54:21 +0200 Subject: [PATCH 049/104] tools/mkpkg: add script to get and package 'connman' --- tools/mkpkg/mkpkg_connman | 43 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100755 tools/mkpkg/mkpkg_connman diff --git a/tools/mkpkg/mkpkg_connman b/tools/mkpkg/mkpkg_connman new file mode 100755 index 0000000000..f156c17be7 --- /dev/null +++ b/tools/mkpkg/mkpkg_connman @@ -0,0 +1,43 @@ +#!/bin/sh +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ + +echo "getting sources..." + if [ ! -d connman.git ]; then + git clone git://git.kernel.org/pub/scm/network/connman/connman.git -b master connman.git + fi + + cd connman.git + git pull + GIT_REV=`git log -n1 --format=%h` + cd .. + +echo "copying sources..." + rm -rf connman-$GIT_REV + cp -R connman.git connman-$GIT_REV + +echo "cleaning sources..." + rm -rf connman-$GIT_REV/.git + +echo "packing sources..." + tar cvJf connman-$GIT_REV.tar.xz connman-$GIT_REV + +echo "remove temporary sourcedir..." + rm -rf connman-$GIT_REV From 935dacbe4055ca0319af7e058fe167ac92b9253e Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 20 Feb 2013 20:56:36 +0200 Subject: [PATCH 050/104] connman: update to connman-5668790 --- packages/network/connman/meta | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/packages/network/connman/meta b/packages/network/connman/meta index b0994f57a5..52a6c4e18b 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,12 +19,13 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="1.11" +PKG_VERSION="5668790" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" PKG_SITE="http://www.connman.net" -PKG_URL="http://www.kernel.org/pub/linux/network/connman/$PKG_NAME-$PKG_VERSION.tar.xz" +#PKG_URL="http://www.kernel.org/pub/linux/network/connman/$PKG_NAME-$PKG_VERSION.tar.xz" +PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_DEPENDS="glib readline dbus systemd iptables wpa_supplicant ntp Python pygobject dbus-python" PKG_BUILD_DEPENDS="toolchain glib readline dbus systemd iptables" PKG_PRIORITY="optional" From 16e8f0e0cfed9b44d9a8cff9040bfb26a9ed92dd Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 21 Feb 2013 00:50:06 +0100 Subject: [PATCH 051/104] busybox: add 'cryptpw' applet Signed-off-by: Stephan Raue --- packages/sysutils/busybox/config/busybox.conf | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/packages/sysutils/busybox/config/busybox.conf b/packages/sysutils/busybox/config/busybox.conf index ab0017cc50..469a920e48 100644 --- a/packages/sysutils/busybox/config/busybox.conf +++ b/packages/sysutils/busybox/config/busybox.conf @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Busybox version: 1.21.0 -# Fri Feb 8 17:06:15 2013 +# Thu Feb 21 00:46:53 2013 # CONFIG_HAVE_DOT_CONFIG=y @@ -472,9 +472,9 @@ CONFIG_LOGIN_SCRIPTS=y # CONFIG_FEATURE_SECURETTY is not set # CONFIG_PASSWD is not set # CONFIG_FEATURE_PASSWD_WEAK_CHECK is not set -# CONFIG_CRYPTPW is not set +CONFIG_CRYPTPW=y # CONFIG_CHPASSWD is not set -CONFIG_FEATURE_DEFAULT_PASSWD_ALGO="" +CONFIG_FEATURE_DEFAULT_PASSWD_ALGO="des" CONFIG_SU=y CONFIG_FEATURE_SU_SYSLOG=y CONFIG_FEATURE_SU_CHECKS_SHELLS=y From c375bea75cddeec7ccf6883b3f421938a6423cf5 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 21 Feb 2013 21:58:29 +0200 Subject: [PATCH 052/104] connman: update to connman-499d057 --- packages/network/connman/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/network/connman/meta b/packages/network/connman/meta index 52a6c4e18b..cada62878b 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="5668790" +PKG_VERSION="499d057" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" From f03322bbea3f9f46c36e0c5ea0329d9a69af34f0 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 22 Feb 2013 04:28:04 +0100 Subject: [PATCH 053/104] xbmc-addon-settings: update to xbmc-addon-settings-0.0.27 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 5c2a2733a3..cb92a3a416 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.26" +PKG_VERSION="0.0.27" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From c193a3f063e68af5dd9ecaa1b78f84e7c6b4b260 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Feb 2013 20:25:56 +0200 Subject: [PATCH 054/104] connman: update to connman-1.12 --- packages/network/connman/meta | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/packages/network/connman/meta b/packages/network/connman/meta index cada62878b..b077d63c6e 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,13 +19,13 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="499d057" +PKG_VERSION="1.12" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" PKG_SITE="http://www.connman.net" -#PKG_URL="http://www.kernel.org/pub/linux/network/connman/$PKG_NAME-$PKG_VERSION.tar.xz" -PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.xz" +PKG_URL="http://www.kernel.org/pub/linux/network/connman/$PKG_NAME-$PKG_VERSION.tar.xz" +#PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_DEPENDS="glib readline dbus systemd iptables wpa_supplicant ntp Python pygobject dbus-python" PKG_BUILD_DEPENDS="toolchain glib readline dbus systemd iptables" PKG_PRIORITY="optional" From 258d06510a7f885a45bdce77660e11532041674f Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Feb 2013 20:26:47 +0200 Subject: [PATCH 055/104] bluez: update to bluez-5.3 --- packages/network/bluez/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/network/bluez/meta b/packages/network/bluez/meta index 4bde271d76..be3819d0f3 100644 --- a/packages/network/bluez/meta +++ b/packages/network/bluez/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="bluez" -PKG_VERSION="5.2" +PKG_VERSION="5.3" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" From 2abe1366a8e58ea4cb00e35338468066a4d05fbf Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Feb 2013 22:53:41 +0200 Subject: [PATCH 056/104] connman: profile.d: changes for new openelec addon --- .../network/connman/profile.d/connman.conf | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/packages/network/connman/profile.d/connman.conf b/packages/network/connman/profile.d/connman.conf index ec281cd8e6..fdcce275e1 100644 --- a/packages/network/connman/profile.d/connman.conf +++ b/packages/network/connman/profile.d/connman.conf @@ -19,18 +19,18 @@ ################################################################################ wait_for_inet_addr () { - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf - fi + if [ -f /storage/.cache/openelec/network_wait ]; then + . /storage/.cache/openelec/network_wait - if [ "$WAIT_NETWORK" = "true" ] ; then - progress "Wait for network" - [ -z "$WAIT_NETWORK_TIME" ] && WAIT_NETWORK_TIME=10 - LOOP_COUNT=$[$WAIT_NETWORK_TIME * 5] - for i in $(seq 1 $LOOP_COUNT) ; do - cnt=$(ifconfig | sed -e '/inet addr:/!d' -e '/127.0.0.1/d' |wc -l) - [ $cnt -gt 0 ] && break - usleep 200000 - done + if [ "$WAIT_NETWORK" = "true" ] ; then + progress "Wait for network" + [ -z "$WAIT_NETWORK_TIME" ] && WAIT_NETWORK_TIME=10 + LOOP_COUNT=$[$WAIT_NETWORK_TIME * 5] + for i in $(seq 1 $LOOP_COUNT) ; do + cnt=$(ifconfig | sed -e '/inet addr:/!d' -e '/127.0.0.1/d' |wc -l) + [ $cnt -gt 0 ] && break + usleep 200000 + done + fi fi } From b4164000cb33d44f4abf69eb17fe0464ec14e551 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 28 Feb 2013 14:32:56 +0200 Subject: [PATCH 057/104] connman: add patch to fig segfault in vpnd --- ...ring-before-passing-it-to-g_strsplit.patch | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch diff --git a/packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch b/packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch new file mode 100644 index 0000000000..313747932c --- /dev/null +++ b/packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch @@ -0,0 +1,20 @@ +diff --git a/vpn/vpn-provider.c b/vpn/vpn-provider.c +index 0336636..40450eb 100644 +--- a/vpn/vpn-provider.c ++++ b/vpn/vpn-provider.c +@@ -1869,9 +1869,14 @@ static const char *get_string(GHashTable *settings, const char *key) + static GSList *parse_user_networks(const char *network_str) + { + GSList *networks = NULL; +- char **elems = g_strsplit(network_str, ",", 0); ++ char **elems; + int i = 0; + ++ if (network_str == NULL) ++ return NULL; ++ ++ elems = g_strsplit(network_str, ",", 0); ++ + if (elems == NULL) + return NULL; + From 6aa8e8f56a2dd23f696dfe731a858c5f02ea92f1 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 28 Feb 2013 14:33:23 +0200 Subject: [PATCH 058/104] linux: remove unneeded patch --- .../3.7.8/linux-990.05-new-wiimote.patch | 25 ------------------- 1 file changed, 25 deletions(-) delete mode 100644 packages/linux/patches/3.7.8/linux-990.05-new-wiimote.patch diff --git a/packages/linux/patches/3.7.8/linux-990.05-new-wiimote.patch b/packages/linux/patches/3.7.8/linux-990.05-new-wiimote.patch deleted file mode 100644 index 8c457411ff..0000000000 --- a/packages/linux/patches/3.7.8/linux-990.05-new-wiimote.patch +++ /dev/null @@ -1,25 +0,0 @@ -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index 753f3d6..b5c2231 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -583,6 +583,7 @@ - - #define USB_VENDOR_ID_NINTENDO 0x057e - #define USB_DEVICE_ID_NINTENDO_WIIMOTE 0x0306 -+#define USB_DEVICE_ID_NINTENDO_WIIMOTE_2 0x0330 - - #define USB_VENDOR_ID_NOVATEK 0x0603 - #define USB_DEVICE_ID_NOVATEK_PCT 0x0600 -diff --git a/drivers/hid/hid-wiimote-core.c b/drivers/hid/hid-wiimote-core.c -index 84e2fbe..c8a4325 100644 ---- a/drivers/hid/hid-wiimote-core.c -+++ b/drivers/hid/hid-wiimote-core.c -@@ -1283,6 +1283,8 @@ static void wiimote_hid_remove(struct hid_device *hdev) - static const struct hid_device_id wiimote_hid_devices[] = { - { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, - USB_DEVICE_ID_NINTENDO_WIIMOTE) }, -+ { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, -+ USB_DEVICE_ID_NINTENDO_WIIMOTE_2) }, - { } - }; - MODULE_DEVICE_TABLE(hid, wiimote_hid_devices); From 4952732554508e1ba1df8a79b95a8b4286d3458c Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Fri, 1 Mar 2013 22:19:46 +0200 Subject: [PATCH 059/104] connman: persistent storage dir for vpnd --- packages/network/connman/build | 2 +- packages/network/connman/init.d/21_network | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/packages/network/connman/build b/packages/network/connman/build index afdb36aea8..33892a6ff7 100755 --- a/packages/network/connman/build +++ b/packages/network/connman/build @@ -75,4 +75,4 @@ cd $PKG_BUILD --enable-datafiles \ --disable-silent-rules \ -make storagedir=/storage/.cache/connman statedir=/run/connman +make storagedir=/storage/.cache/connman vpn_storagedir=/storage/.cache/connman-vpn statedir=/run/connman diff --git a/packages/network/connman/init.d/21_network b/packages/network/connman/init.d/21_network index aaf41d6e23..fb4d5a9c4e 100644 --- a/packages/network/connman/init.d/21_network +++ b/packages/network/connman/init.d/21_network @@ -23,6 +23,7 @@ # runlevels: openelec, textmode mkdir -p /storage/.cache/connman +mkdir -p /storage/.cache/connman-vpn mkdir -p /run/connman # starting loopback device From 20e132f260f4b457d8c71fe40755a06acc6523ff Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Mon, 4 Mar 2013 16:09:28 +0100 Subject: [PATCH 060/104] connman: change VPN config dir to /storage/.config/vpn-config, so we have easy access there to upload configs Signed-off-by: Stephan Raue --- packages/network/connman/build | 2 +- packages/network/connman/init.d/21_network | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/network/connman/build b/packages/network/connman/build index 33892a6ff7..5b3d64b059 100755 --- a/packages/network/connman/build +++ b/packages/network/connman/build @@ -75,4 +75,4 @@ cd $PKG_BUILD --enable-datafiles \ --disable-silent-rules \ -make storagedir=/storage/.cache/connman vpn_storagedir=/storage/.cache/connman-vpn statedir=/run/connman +make storagedir=/storage/.cache/connman vpn_storagedir=/storage/.config/vpn-config statedir=/run/connman diff --git a/packages/network/connman/init.d/21_network b/packages/network/connman/init.d/21_network index fb4d5a9c4e..59370e7623 100644 --- a/packages/network/connman/init.d/21_network +++ b/packages/network/connman/init.d/21_network @@ -23,7 +23,7 @@ # runlevels: openelec, textmode mkdir -p /storage/.cache/connman -mkdir -p /storage/.cache/connman-vpn +mkdir -p /storage/.config/vpn-config mkdir -p /run/connman # starting loopback device From 2d2cfd8f9e35b63fa99b9f09f9ffed62aede89b8 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 6 Mar 2013 14:08:17 +0200 Subject: [PATCH 061/104] connman: add upstream patches (squashed) - connman-do-not-allow-changes-if-immutable.patch - connman-do-not-load-immutable-vpn-connections.patch - connman-function-to-set-immutable-flag.patch - connman-intoduce-immutable-flag-to-provider-data.patch - connman-provisioned-vpn-connections-are-immutable.patch - connman-rememver-the-immutable-flag.patch - connman-send-signal-only-if-immutable-changes.patch - connman-set-immutable-flag-of-the-vpn-service.patch - connman-setproperty-clearproperty-does-not-wor-on-immutable.patch --- .../connman/patches/connman-immutable.patch | 270 ++++++++++++++++++ 1 file changed, 270 insertions(+) create mode 100644 packages/network/connman/patches/connman-immutable.patch diff --git a/packages/network/connman/patches/connman-immutable.patch b/packages/network/connman/patches/connman-immutable.patch new file mode 100644 index 0000000000..f9ac362096 --- /dev/null +++ b/packages/network/connman/patches/connman-immutable.patch @@ -0,0 +1,270 @@ +diff --git a/doc/vpn-connection-api.txt b/doc/vpn-connection-api.txt +index 722d708..4367699 100644 +--- a/doc/vpn-connection-api.txt ++++ b/doc/vpn-connection-api.txt +@@ -75,6 +75,14 @@ Properties string State [readonly] + + The VPN host (server) address. + ++ boolean Immutable [readonly] ++ ++ This value will be set to true if the connection is ++ configured externally via a configuration file. ++ ++ The only valid operation are Connect(), Disconnect() ++ and GetProperties() ++ + int Index [readonly] + + The index of the VPN network tunneling interface. +diff --git a/include/provider.h b/include/provider.h +index c9a3b91..bfefaed 100644 +--- a/include/provider.h ++++ b/include/provider.h +@@ -101,6 +101,8 @@ int connman_provider_set_ipaddress(struct connman_provider *provider, + int connman_provider_set_pac(struct connman_provider *provider, + const char *pac); + int connman_provider_create_service(struct connman_provider *provider); ++int connman_provider_set_immutable(struct connman_provider *provider, ++ connman_bool_t immutable); + struct connman_provider *connman_provider_get(const char *identifier); + void connman_provider_put(struct connman_provider *provider); + int connman_provider_set_domain(struct connman_provider *provider, +diff --git a/plugins/vpn.c b/plugins/vpn.c +index d27346a..cbba396 100644 +--- a/plugins/vpn.c ++++ b/plugins/vpn.c +@@ -81,6 +81,7 @@ struct connection_data { + char **host_ip; + char *domain; + char **nameservers; ++ gboolean immutable; + + GHashTable *server_routes; + GHashTable *user_routes; +@@ -300,6 +301,7 @@ static int create_provider(struct connection_data *data, void *user_data) + + err = connman_provider_create_service(data->provider); + if (err == 0) { ++ connman_provider_set_immutable(data->provider, data->immutable); + if (g_str_equal(data->state, "ready") == TRUE) { + connman_provider_set_index(data->provider, + data->index); +@@ -599,6 +601,8 @@ static void add_connection(const char *path, DBusMessageIter *properties, + } else if (g_str_equal(key, "Type") == TRUE) { + dbus_message_iter_get_basic(&value, &str); + data->type = g_strdup(str); ++ } else if (g_str_equal(key, "Immutable") == TRUE) { ++ dbus_message_iter_get_basic(&value, &data->immutable); + } else if (g_str_equal(key, "Host") == TRUE) { + dbus_message_iter_get_basic(&value, &str); + data->host = g_strdup(str); +diff --git a/src/provider.c b/src/provider.c +index fa3bc48..ca86880 100644 +--- a/src/provider.c ++++ b/src/provider.c +@@ -334,6 +334,19 @@ int connman_provider_create_service(struct connman_provider *provider) + return 0; + } + ++int connman_provider_set_immutable(struct connman_provider *provider, ++ connman_bool_t immutable) ++{ ++ if (provider == NULL) ++ return -EINVAL; ++ ++ if (provider->vpn_service == NULL) ++ return -ESRCH; ++ ++ return __connman_service_set_immutable(provider->vpn_service, ++ immutable); ++} ++ + static struct connman_provider *provider_lookup(const char *identifier) + { + return g_hash_table_lookup(provider_hash, identifier); +diff --git a/src/service.c b/src/service.c +index 4dfc86b..a1b7b94 100644 +--- a/src/service.c ++++ b/src/service.c +@@ -4712,6 +4712,10 @@ int __connman_service_set_immutable(struct connman_service *service, + { + if (service->hidden == TRUE) + return -EOPNOTSUPP; ++ ++ if (service->immutable == immutable) ++ return 0; ++ + service->immutable = immutable; + + immutable_changed(service); +diff --git a/vpn/vpn-provider.c b/vpn/vpn-provider.c +index 40450eb..0c23188 100644 +--- a/vpn/vpn-provider.c ++++ b/vpn/vpn-provider.c +@@ -53,6 +53,7 @@ struct vpn_route { + + struct vpn_setting { + gboolean hide_value; ++ gboolean immutable; + char *value; + }; + +@@ -82,6 +83,7 @@ struct vpn_provider { + guint notify_id; + char *config_file; + char *config_entry; ++ connman_bool_t immutable; + }; + + static void append_properties(DBusMessageIter *iter, +@@ -406,6 +408,9 @@ static DBusMessage *set_property(DBusConnection *conn, DBusMessage *msg, + + DBG("conn %p", conn); + ++ if (provider->immutable == TRUE) ++ return __connman_error_not_supported(msg); ++ + if (dbus_message_iter_init(msg, &iter) == FALSE) + return __connman_error_invalid_arguments(msg); + +@@ -456,6 +461,9 @@ static DBusMessage *clear_property(DBusConnection *conn, DBusMessage *msg, + + DBG("conn %p", conn); + ++ if (provider->immutable == TRUE) ++ return __connman_error_not_supported(msg); ++ + dbus_message_get_args(msg, NULL, DBUS_TYPE_STRING, &name, + DBUS_TYPE_INVALID); + +@@ -826,7 +834,16 @@ static int vpn_provider_save(struct vpn_provider *provider) + { + GKeyFile *keyfile; + +- DBG("provider %p", provider); ++ DBG("provider %p immutable %s", provider, ++ provider->immutable ? "yes" : "no"); ++ ++ if (provider->immutable == TRUE) { ++ /* ++ * Do not save providers that are provisioned via .config ++ * file. ++ */ ++ return -EPERM; ++ } + + keyfile = g_key_file_new(); + if (keyfile == NULL) +@@ -1341,6 +1358,9 @@ static void append_properties(DBusMessageIter *iter, + connman_dbus_dict_append_basic(&dict, "Domain", + DBUS_TYPE_STRING, &provider->domain); + ++ connman_dbus_dict_append_basic(&dict, "Immutable", DBUS_TYPE_BOOLEAN, ++ &provider->immutable); ++ + if (provider->family == AF_INET) + connman_dbus_dict_append_dict(&dict, "IPv4", append_ipv4, + provider); +@@ -1582,6 +1602,7 @@ static void provider_initialize(struct vpn_provider *provider) + provider->type = NULL; + provider->domain = NULL; + provider->identifier = NULL; ++ provider->immutable = FALSE; + provider->user_networks = NULL; + provider->routes = g_hash_table_new_full(g_direct_hash, g_direct_equal, + NULL, free_route); +@@ -1995,8 +2016,7 @@ int __vpn_provider_create_from_config(GHashTable *settings, + provider->config_file = g_strdup(config_ident); + provider->config_entry = g_strdup(config_entry); + +- if (provider_register(provider) == 0) +- vpn_provider_load(provider); ++ provider_register(provider); + + provider_resolv_host_addr(provider); + } +@@ -2010,7 +2030,9 @@ int __vpn_provider_create_from_config(GHashTable *settings, + g_hash_table_iter_init(&hash, settings); + + while (g_hash_table_iter_next(&hash, &key, &value) == TRUE) +- vpn_provider_set_string(provider, key, value); ++ __vpn_provider_set_string_immutable(provider, key, value); ++ ++ provider->immutable = TRUE; + + vpn_provider_save(provider); + +@@ -2086,9 +2108,11 @@ const char * __vpn_provider_get_ident(struct vpn_provider *provider) + } + + static int set_string(struct vpn_provider *provider, +- const char *key, const char *value, gboolean hide_value) ++ const char *key, const char *value, ++ gboolean hide_value, gboolean immutable) + { +- DBG("provider %p key %s value %s", provider, key, ++ DBG("provider %p key %s immutable %s value %s", provider, key, ++ immutable ? "yes" : "no", + hide_value ? "" : value); + + if (g_str_equal(key, "Type") == TRUE) { +@@ -2111,6 +2135,13 @@ static int set_string(struct vpn_provider *provider, + } else { + struct vpn_setting *setting; + ++ setting = g_hash_table_lookup(provider->setting_strings, key); ++ if (setting != NULL && immutable == FALSE && ++ setting->immutable == TRUE) { ++ DBG("Trying to set immutable variable %s", key); ++ return -EPERM; ++ } ++ + setting = g_try_new(struct vpn_setting, 1); + if (setting == NULL) + return -ENOMEM; +@@ -2118,6 +2149,9 @@ static int set_string(struct vpn_provider *provider, + setting->value = g_strdup(value); + setting->hide_value = hide_value; + ++ if (immutable == TRUE) ++ setting->immutable = TRUE; ++ + if (hide_value == FALSE) + send_value(provider->path, key, setting->value); + +@@ -2131,13 +2165,19 @@ static int set_string(struct vpn_provider *provider, + int vpn_provider_set_string(struct vpn_provider *provider, + const char *key, const char *value) + { +- return set_string(provider, key, value, FALSE); ++ return set_string(provider, key, value, FALSE, FALSE); + } + + int vpn_provider_set_string_hide_value(struct vpn_provider *provider, + const char *key, const char *value) + { +- return set_string(provider, key, value, TRUE); ++ return set_string(provider, key, value, TRUE, FALSE); ++} ++ ++int __vpn_provider_set_string_immutable(struct vpn_provider *provider, ++ const char *key, const char *value) ++{ ++ return set_string(provider, key, value, FALSE, TRUE); + } + + const char *vpn_provider_get_string(struct vpn_provider *provider, +diff --git a/vpn/vpn.h b/vpn/vpn.h +index c57fcf7..56e7a5c 100644 +--- a/vpn/vpn.h ++++ b/vpn/vpn.h +@@ -81,6 +81,8 @@ void __vpn_provider_list(DBusMessageIter *iter, void *user_data); + int __vpn_provider_create(DBusMessage *msg); + int __vpn_provider_create_from_config(GHashTable *settings, + const char *config_ident, const char *config_entry); ++int __vpn_provider_set_string_immutable(struct vpn_provider *provider, ++ const char *key, const char *value); + DBusMessage *__vpn_provider_get_connections(DBusMessage *msg); + const char * __vpn_provider_get_ident(struct vpn_provider *provider); + struct vpn_provider *__vpn_provider_lookup(const char *identifier); From fe5019c88bf831ced989dfce1be3e573a25f2ef3 Mon Sep 17 00:00:00 2001 From: lfiebach Date: Thu, 7 Mar 2013 21:46:46 +0100 Subject: [PATCH 062/104] Some vpnd patches to prevent vpnd exit and better support for .config files --- .../patches/connman-do-not-exit-vpnd.patch | 66 ++++++ .../connman/patches/connman-misc-vpn.patch | 211 ++++++++++++++++++ 2 files changed, 277 insertions(+) create mode 100644 packages/network/connman/patches/connman-do-not-exit-vpnd.patch create mode 100644 packages/network/connman/patches/connman-misc-vpn.patch diff --git a/packages/network/connman/patches/connman-do-not-exit-vpnd.patch b/packages/network/connman/patches/connman-do-not-exit-vpnd.patch new file mode 100644 index 0000000000..c46c3aa7ff --- /dev/null +++ b/packages/network/connman/patches/connman-do-not-exit-vpnd.patch @@ -0,0 +1,66 @@ +diff --git a/vpn/vpn-manager.c b/vpn/vpn-manager.c +index 44684dd..1ba745b 100644 +--- a/vpn/vpn-manager.c ++++ b/vpn/vpn-manager.c +@@ -85,8 +85,6 @@ static DBusMessage *get_connections(DBusConnection *conn, DBusMessage *msg, + if (reply == NULL) + return __connman_error_failed(msg, -EINVAL); + +- __vpn_provider_check_connections(); +- + return reply; + } + +diff --git a/vpn/vpn-provider.c b/vpn/vpn-provider.c +index 63a00ea..d885b46 100644 +--- a/vpn/vpn-provider.c ++++ b/vpn/vpn-provider.c +@@ -1027,8 +1027,6 @@ static void configuration_count_del(void) + + if (__sync_fetch_and_sub(&configuration_count, 1) != 1) + return; +- +- raise(SIGTERM); + } + + int __vpn_provider_disconnect(struct vpn_provider *provider) +@@ -2507,28 +2505,6 @@ void vpn_provider_driver_unregister(struct vpn_provider_driver *driver) + } + } + +-static gboolean check_vpn_count(gpointer data) +-{ +- if (configuration_count == 0) { +- connman_info("No VPN configurations found, quitting."); +- raise(SIGTERM); +- } +- +- return FALSE; +-} +- +-void __vpn_provider_check_connections(void) +-{ +- /* +- * If we were started when there is no providers configured, +- * then just quit. This happens when connman starts and its +- * vpn plugin asks connman-vpnd if it has any connections +- * configured. If there are none, then we can stop the vpn +- * daemon. +- */ +- g_timeout_add(1000, check_vpn_count, NULL); +-} +- + const char *vpn_provider_get_name(struct vpn_provider *provider) + { + return provider->name; +diff --git a/vpn/vpn.h b/vpn/vpn.h +index 56e7a5c..53b117d 100644 +--- a/vpn/vpn.h ++++ b/vpn/vpn.h +@@ -95,7 +95,6 @@ int __vpn_provider_connect_path(const char *path); + int __vpn_provider_disconnect(struct vpn_provider *provider); + int __vpn_provider_remove(const char *path); + int __vpn_provider_delete(struct vpn_provider *provider); +-void __vpn_provider_check_connections(void); + void __vpn_provider_cleanup(void); + int __vpn_provider_init(gboolean handle_routes); diff --git a/packages/network/connman/patches/connman-misc-vpn.patch b/packages/network/connman/patches/connman-misc-vpn.patch new file mode 100644 index 0000000000..17f3c41279 --- /dev/null +++ b/packages/network/connman/patches/connman-misc-vpn.patch @@ -0,0 +1,211 @@ +diff --git a/plugins/vpn.c b/plugins/vpn.c +index cbba396..f60a658 100644 +--- a/plugins/vpn.c ++++ b/plugins/vpn.c +@@ -1438,6 +1438,8 @@ static void destroy_provider(struct connection_data *data) + if (data->call != NULL) + dbus_pending_call_cancel(data->call); + ++ connman_provider_set_data(data->provider, NULL); ++ + connman_provider_put(data->provider); + + data->provider = NULL; +diff --git a/vpn/vpn-config.c b/vpn/vpn-config.c +index 1ece7e9..a1a2ed5 100644 +--- a/vpn/vpn-config.c ++++ b/vpn/vpn-config.c +@@ -539,28 +539,40 @@ static void config_notify_handler(struct inotify_event *event, + } + + if (event->mask & IN_CREATE) +- create_config(ident); ++ return; ++ ++ if (event->mask & IN_DELETE) { ++ g_hash_table_remove(config_table, ident); ++ return; ++ } + + if (event->mask & IN_MODIFY) { + struct vpn_config *config; ++ char *path = get_dir(); + + config = g_hash_table_lookup(config_table, ident); + if (config != NULL) { +- char *path = get_dir(); +- + g_hash_table_remove_all(config->provider_table); + load_config(config, path, REMOVE); + + /* Re-scan the config file for any changes */ + g_hash_table_remove_all(config->provider_table); + load_config(config, path, ADD); +- +- g_free(path); ++ } else { ++ /* ++ * Inotify will send create event followed by modify ++ * event for any config file that is copied to ++ * monitored directory. So in practice we should just ++ * ignore the create event and trust only the modify ++ * one in order to avoid create/remove/create loop ++ */ ++ config = create_config(ident); ++ if (config != NULL) ++ load_config(config, path, ADD); + } +- } + +- if (event->mask & IN_DELETE) +- g_hash_table_remove(config_table, ident); ++ g_free(path); ++ } + } + + int __vpn_config_init(void) +diff --git a/src/connman.h b/src/connman.h +index fc6d528..19bca74 100644 +--- a/src/connman.h ++++ b/src/connman.h +@@ -559,7 +559,7 @@ int __connman_provider_indicate_state(struct connman_provider *provider, + int __connman_provider_indicate_error(struct connman_provider *provider, + enum connman_provider_error error); + int __connman_provider_connect(struct connman_provider *provider); +-int __connman_provider_remove(const char *path); ++int __connman_provider_remove_by_path(const char *path); + void __connman_provider_cleanup(void); + int __connman_provider_init(void); + +diff --git a/src/manager.c b/src/manager.c +index 1d09267..e56f2e1 100644 +--- a/src/manager.c ++++ b/src/manager.c +@@ -161,7 +161,7 @@ static DBusMessage *remove_provider(DBusConnection *conn, + dbus_message_get_args(msg, NULL, DBUS_TYPE_OBJECT_PATH, &path, + DBUS_TYPE_INVALID); + +- err = __connman_provider_remove(path); ++ err = __connman_provider_remove_by_path(path); + if (err < 0) + return __connman_error_failed(msg, -err); + +diff --git a/src/provider.c b/src/provider.c +index ca86880..b86e7d6 100644 +--- a/src/provider.c ++++ b/src/provider.c +@@ -174,7 +174,7 @@ int __connman_provider_connect(struct connman_provider *provider) + return 0; + } + +-int __connman_provider_remove(const char *path) ++int __connman_provider_remove_by_path(const char *path) + { + struct connman_provider *provider; + GHashTableIter iter; +diff --git a/include/provider.h b/include/provider.h +index bfefaed..fdd8ae0 100644 +--- a/include/provider.h ++++ b/include/provider.h +@@ -79,6 +79,7 @@ void connman_provider_unref_debug(struct connman_provider *provider, + const char *file, int line, const char *caller); + + int connman_provider_disconnect(struct connman_provider *provider); ++int connman_provider_remove(struct connman_provider *provider); + + int connman_provider_set_string(struct connman_provider *provider, + const char *key, const char *value); +diff --git a/src/provider.c b/src/provider.c +index b86e7d6..f7bb4e1 100644 +--- a/src/provider.c ++++ b/src/provider.c +@@ -150,6 +150,19 @@ int connman_provider_disconnect(struct connman_provider *provider) + return 0; + } + ++int connman_provider_remove(struct connman_provider *provider) ++{ ++ DBG("Removing VPN %s", provider->identifier); ++ ++ provider_remove(provider); ++ ++ connman_provider_set_state(provider, CONNMAN_PROVIDER_STATE_IDLE); ++ ++ g_hash_table_remove(provider_hash, provider->identifier); ++ ++ return 0; ++} ++ + int __connman_provider_connect(struct connman_provider *provider) + { + int err; +diff --git a/plugins/vpn.c b/plugins/vpn.c +index f60a658..cda0c1b 100644 +--- a/plugins/vpn.c ++++ b/plugins/vpn.c +@@ -1440,7 +1440,7 @@ static void destroy_provider(struct connection_data *data) + + connman_provider_set_data(data->provider, NULL); + +- connman_provider_put(data->provider); ++ connman_provider_remove(data->provider); + + data->provider = NULL; + } +diff --git a/plugins/vpn.c b/plugins/vpn.c +index cda0c1b..f15796d 100644 +--- a/plugins/vpn.c ++++ b/plugins/vpn.c +@@ -252,6 +252,8 @@ static void set_provider_state(struct connection_data *data) + enum connman_provider_state state = CONNMAN_PROVIDER_STATE_UNKNOWN; + int err = 0; + ++ DBG("provider %p new state %s", data->provider, data->state); ++ + if (g_str_equal(data->state, "ready") == TRUE) { + state = CONNMAN_PROVIDER_STATE_READY; + goto set; +diff --git a/plugins/vpn.c b/plugins/vpn.c +index f15796d..04318a9 100644 +--- a/plugins/vpn.c ++++ b/plugins/vpn.c +@@ -796,6 +796,14 @@ static int provider_remove(struct connman_provider *provider) + + DBG("provider %p data %p", provider, data); + ++ if (data == NULL) { ++ /* ++ * This means the provider is already removed, ++ * just ignore the dbus in this case. ++ */ ++ return -EALREADY; ++ } ++ + /* + * When provider.c:provider_remove() calls this function, + * it will remove the provider itself after the call. +diff --git a/plugins/vpn.c b/plugins/vpn.c +index 04318a9..038a833 100644 +--- a/plugins/vpn.c ++++ b/plugins/vpn.c +@@ -1508,6 +1508,7 @@ static gboolean connection_removed(DBusConnection *conn, DBusMessage *message, + { + const char *path; + const char *signature = DBUS_TYPE_OBJECT_PATH_AS_STRING; ++ struct connection_data *data; + + if (dbus_message_has_signature(message, signature) == FALSE) { + connman_error("vpn removed signature \"%s\" does not match " +@@ -1518,7 +1519,11 @@ static gboolean connection_removed(DBusConnection *conn, DBusMessage *message, + + dbus_message_get_args(message, NULL, DBUS_TYPE_OBJECT_PATH, &path, + DBUS_TYPE_INVALID); +- remove_connection(conn, path); ++ ++ data = g_hash_table_lookup(vpn_connections, get_ident(path)); ++ if (data != NULL) ++ remove_connection(conn, path); ++ + return TRUE; + } + From 0ceb1433bb278454706d7fd88f00503c8fdf2237 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sat, 9 Mar 2013 00:46:56 +0200 Subject: [PATCH 063/104] connman: run in a loop to restart on crash --- packages/network/connman/init.d/21_network | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/packages/network/connman/init.d/21_network b/packages/network/connman/init.d/21_network index 119bd0d178..cbd0f2518a 100644 --- a/packages/network/connman/init.d/21_network +++ b/packages/network/connman/init.d/21_network @@ -36,10 +36,15 @@ mkdir -p /run/connman cp /usr/share/connman/settings /storage/.cache/connman fi +( # starting Connection manager progress "starting Connection manager" - if [ -f $HOME/.config/debug.connman ]; then - /usr/sbin/connmand -rd > /dev/null 2>&1 - else - /usr/sbin/connmand -r > /dev/null 2>&1 - fi + while true; do + if [ -f $HOME/.config/debug.connman ]; then + /usr/sbin/connmand -nrd > /dev/null 2>&1 + else + /usr/sbin/connmand -nr > /dev/null 2>&1 + fi + usleep 250000 + done +)& From b5d64e2420b6b84ecd066ae9180ce4ddb3572c01 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sat, 9 Mar 2013 13:20:07 +0100 Subject: [PATCH 064/104] xbmc-addon-settings: update to xbmc-addon-settings.0.1.1 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index cb92a3a416..f3bc7bb1c8 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.0.27" +PKG_VERSION="0.1.1" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From c43e27d4baf4dcc1499f867f96d231355b525f6c Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 12 Mar 2013 14:45:54 +0200 Subject: [PATCH 065/104] connman: update to connman-76e97ed (git) --- packages/network/connman/meta | 6 +- ...ring-before-passing-it-to-g_strsplit.patch | 20 -- .../patches/connman-do-not-exit-vpnd.patch | 66 ----- .../connman/patches/connman-immutable.patch | 270 ------------------ .../connman/patches/connman-misc-vpn.patch | 211 -------------- 5 files changed, 3 insertions(+), 570 deletions(-) delete mode 100644 packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch delete mode 100644 packages/network/connman/patches/connman-do-not-exit-vpnd.patch delete mode 100644 packages/network/connman/patches/connman-immutable.patch delete mode 100644 packages/network/connman/patches/connman-misc-vpn.patch diff --git a/packages/network/connman/meta b/packages/network/connman/meta index b077d63c6e..56ae963f84 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,13 +19,13 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="1.12" +PKG_VERSION="76e97ed" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" PKG_SITE="http://www.connman.net" -PKG_URL="http://www.kernel.org/pub/linux/network/connman/$PKG_NAME-$PKG_VERSION.tar.xz" -#PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.xz" +#PKG_URL="http://www.kernel.org/pub/linux/network/connman/$PKG_NAME-$PKG_VERSION.tar.xz" +PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.xz" PKG_DEPENDS="glib readline dbus systemd iptables wpa_supplicant ntp Python pygobject dbus-python" PKG_BUILD_DEPENDS="toolchain glib readline dbus systemd iptables" PKG_PRIORITY="optional" diff --git a/packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch b/packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch deleted file mode 100644 index 313747932c..0000000000 --- a/packages/network/connman/patches/connman-check-null-string-before-passing-it-to-g_strsplit.patch +++ /dev/null @@ -1,20 +0,0 @@ -diff --git a/vpn/vpn-provider.c b/vpn/vpn-provider.c -index 0336636..40450eb 100644 ---- a/vpn/vpn-provider.c -+++ b/vpn/vpn-provider.c -@@ -1869,9 +1869,14 @@ static const char *get_string(GHashTable *settings, const char *key) - static GSList *parse_user_networks(const char *network_str) - { - GSList *networks = NULL; -- char **elems = g_strsplit(network_str, ",", 0); -+ char **elems; - int i = 0; - -+ if (network_str == NULL) -+ return NULL; -+ -+ elems = g_strsplit(network_str, ",", 0); -+ - if (elems == NULL) - return NULL; - diff --git a/packages/network/connman/patches/connman-do-not-exit-vpnd.patch b/packages/network/connman/patches/connman-do-not-exit-vpnd.patch deleted file mode 100644 index c46c3aa7ff..0000000000 --- a/packages/network/connman/patches/connman-do-not-exit-vpnd.patch +++ /dev/null @@ -1,66 +0,0 @@ -diff --git a/vpn/vpn-manager.c b/vpn/vpn-manager.c -index 44684dd..1ba745b 100644 ---- a/vpn/vpn-manager.c -+++ b/vpn/vpn-manager.c -@@ -85,8 +85,6 @@ static DBusMessage *get_connections(DBusConnection *conn, DBusMessage *msg, - if (reply == NULL) - return __connman_error_failed(msg, -EINVAL); - -- __vpn_provider_check_connections(); -- - return reply; - } - -diff --git a/vpn/vpn-provider.c b/vpn/vpn-provider.c -index 63a00ea..d885b46 100644 ---- a/vpn/vpn-provider.c -+++ b/vpn/vpn-provider.c -@@ -1027,8 +1027,6 @@ static void configuration_count_del(void) - - if (__sync_fetch_and_sub(&configuration_count, 1) != 1) - return; -- -- raise(SIGTERM); - } - - int __vpn_provider_disconnect(struct vpn_provider *provider) -@@ -2507,28 +2505,6 @@ void vpn_provider_driver_unregister(struct vpn_provider_driver *driver) - } - } - --static gboolean check_vpn_count(gpointer data) --{ -- if (configuration_count == 0) { -- connman_info("No VPN configurations found, quitting."); -- raise(SIGTERM); -- } -- -- return FALSE; --} -- --void __vpn_provider_check_connections(void) --{ -- /* -- * If we were started when there is no providers configured, -- * then just quit. This happens when connman starts and its -- * vpn plugin asks connman-vpnd if it has any connections -- * configured. If there are none, then we can stop the vpn -- * daemon. -- */ -- g_timeout_add(1000, check_vpn_count, NULL); --} -- - const char *vpn_provider_get_name(struct vpn_provider *provider) - { - return provider->name; -diff --git a/vpn/vpn.h b/vpn/vpn.h -index 56e7a5c..53b117d 100644 ---- a/vpn/vpn.h -+++ b/vpn/vpn.h -@@ -95,7 +95,6 @@ int __vpn_provider_connect_path(const char *path); - int __vpn_provider_disconnect(struct vpn_provider *provider); - int __vpn_provider_remove(const char *path); - int __vpn_provider_delete(struct vpn_provider *provider); --void __vpn_provider_check_connections(void); - void __vpn_provider_cleanup(void); - int __vpn_provider_init(gboolean handle_routes); diff --git a/packages/network/connman/patches/connman-immutable.patch b/packages/network/connman/patches/connman-immutable.patch deleted file mode 100644 index f9ac362096..0000000000 --- a/packages/network/connman/patches/connman-immutable.patch +++ /dev/null @@ -1,270 +0,0 @@ -diff --git a/doc/vpn-connection-api.txt b/doc/vpn-connection-api.txt -index 722d708..4367699 100644 ---- a/doc/vpn-connection-api.txt -+++ b/doc/vpn-connection-api.txt -@@ -75,6 +75,14 @@ Properties string State [readonly] - - The VPN host (server) address. - -+ boolean Immutable [readonly] -+ -+ This value will be set to true if the connection is -+ configured externally via a configuration file. -+ -+ The only valid operation are Connect(), Disconnect() -+ and GetProperties() -+ - int Index [readonly] - - The index of the VPN network tunneling interface. -diff --git a/include/provider.h b/include/provider.h -index c9a3b91..bfefaed 100644 ---- a/include/provider.h -+++ b/include/provider.h -@@ -101,6 +101,8 @@ int connman_provider_set_ipaddress(struct connman_provider *provider, - int connman_provider_set_pac(struct connman_provider *provider, - const char *pac); - int connman_provider_create_service(struct connman_provider *provider); -+int connman_provider_set_immutable(struct connman_provider *provider, -+ connman_bool_t immutable); - struct connman_provider *connman_provider_get(const char *identifier); - void connman_provider_put(struct connman_provider *provider); - int connman_provider_set_domain(struct connman_provider *provider, -diff --git a/plugins/vpn.c b/plugins/vpn.c -index d27346a..cbba396 100644 ---- a/plugins/vpn.c -+++ b/plugins/vpn.c -@@ -81,6 +81,7 @@ struct connection_data { - char **host_ip; - char *domain; - char **nameservers; -+ gboolean immutable; - - GHashTable *server_routes; - GHashTable *user_routes; -@@ -300,6 +301,7 @@ static int create_provider(struct connection_data *data, void *user_data) - - err = connman_provider_create_service(data->provider); - if (err == 0) { -+ connman_provider_set_immutable(data->provider, data->immutable); - if (g_str_equal(data->state, "ready") == TRUE) { - connman_provider_set_index(data->provider, - data->index); -@@ -599,6 +601,8 @@ static void add_connection(const char *path, DBusMessageIter *properties, - } else if (g_str_equal(key, "Type") == TRUE) { - dbus_message_iter_get_basic(&value, &str); - data->type = g_strdup(str); -+ } else if (g_str_equal(key, "Immutable") == TRUE) { -+ dbus_message_iter_get_basic(&value, &data->immutable); - } else if (g_str_equal(key, "Host") == TRUE) { - dbus_message_iter_get_basic(&value, &str); - data->host = g_strdup(str); -diff --git a/src/provider.c b/src/provider.c -index fa3bc48..ca86880 100644 ---- a/src/provider.c -+++ b/src/provider.c -@@ -334,6 +334,19 @@ int connman_provider_create_service(struct connman_provider *provider) - return 0; - } - -+int connman_provider_set_immutable(struct connman_provider *provider, -+ connman_bool_t immutable) -+{ -+ if (provider == NULL) -+ return -EINVAL; -+ -+ if (provider->vpn_service == NULL) -+ return -ESRCH; -+ -+ return __connman_service_set_immutable(provider->vpn_service, -+ immutable); -+} -+ - static struct connman_provider *provider_lookup(const char *identifier) - { - return g_hash_table_lookup(provider_hash, identifier); -diff --git a/src/service.c b/src/service.c -index 4dfc86b..a1b7b94 100644 ---- a/src/service.c -+++ b/src/service.c -@@ -4712,6 +4712,10 @@ int __connman_service_set_immutable(struct connman_service *service, - { - if (service->hidden == TRUE) - return -EOPNOTSUPP; -+ -+ if (service->immutable == immutable) -+ return 0; -+ - service->immutable = immutable; - - immutable_changed(service); -diff --git a/vpn/vpn-provider.c b/vpn/vpn-provider.c -index 40450eb..0c23188 100644 ---- a/vpn/vpn-provider.c -+++ b/vpn/vpn-provider.c -@@ -53,6 +53,7 @@ struct vpn_route { - - struct vpn_setting { - gboolean hide_value; -+ gboolean immutable; - char *value; - }; - -@@ -82,6 +83,7 @@ struct vpn_provider { - guint notify_id; - char *config_file; - char *config_entry; -+ connman_bool_t immutable; - }; - - static void append_properties(DBusMessageIter *iter, -@@ -406,6 +408,9 @@ static DBusMessage *set_property(DBusConnection *conn, DBusMessage *msg, - - DBG("conn %p", conn); - -+ if (provider->immutable == TRUE) -+ return __connman_error_not_supported(msg); -+ - if (dbus_message_iter_init(msg, &iter) == FALSE) - return __connman_error_invalid_arguments(msg); - -@@ -456,6 +461,9 @@ static DBusMessage *clear_property(DBusConnection *conn, DBusMessage *msg, - - DBG("conn %p", conn); - -+ if (provider->immutable == TRUE) -+ return __connman_error_not_supported(msg); -+ - dbus_message_get_args(msg, NULL, DBUS_TYPE_STRING, &name, - DBUS_TYPE_INVALID); - -@@ -826,7 +834,16 @@ static int vpn_provider_save(struct vpn_provider *provider) - { - GKeyFile *keyfile; - -- DBG("provider %p", provider); -+ DBG("provider %p immutable %s", provider, -+ provider->immutable ? "yes" : "no"); -+ -+ if (provider->immutable == TRUE) { -+ /* -+ * Do not save providers that are provisioned via .config -+ * file. -+ */ -+ return -EPERM; -+ } - - keyfile = g_key_file_new(); - if (keyfile == NULL) -@@ -1341,6 +1358,9 @@ static void append_properties(DBusMessageIter *iter, - connman_dbus_dict_append_basic(&dict, "Domain", - DBUS_TYPE_STRING, &provider->domain); - -+ connman_dbus_dict_append_basic(&dict, "Immutable", DBUS_TYPE_BOOLEAN, -+ &provider->immutable); -+ - if (provider->family == AF_INET) - connman_dbus_dict_append_dict(&dict, "IPv4", append_ipv4, - provider); -@@ -1582,6 +1602,7 @@ static void provider_initialize(struct vpn_provider *provider) - provider->type = NULL; - provider->domain = NULL; - provider->identifier = NULL; -+ provider->immutable = FALSE; - provider->user_networks = NULL; - provider->routes = g_hash_table_new_full(g_direct_hash, g_direct_equal, - NULL, free_route); -@@ -1995,8 +2016,7 @@ int __vpn_provider_create_from_config(GHashTable *settings, - provider->config_file = g_strdup(config_ident); - provider->config_entry = g_strdup(config_entry); - -- if (provider_register(provider) == 0) -- vpn_provider_load(provider); -+ provider_register(provider); - - provider_resolv_host_addr(provider); - } -@@ -2010,7 +2030,9 @@ int __vpn_provider_create_from_config(GHashTable *settings, - g_hash_table_iter_init(&hash, settings); - - while (g_hash_table_iter_next(&hash, &key, &value) == TRUE) -- vpn_provider_set_string(provider, key, value); -+ __vpn_provider_set_string_immutable(provider, key, value); -+ -+ provider->immutable = TRUE; - - vpn_provider_save(provider); - -@@ -2086,9 +2108,11 @@ const char * __vpn_provider_get_ident(struct vpn_provider *provider) - } - - static int set_string(struct vpn_provider *provider, -- const char *key, const char *value, gboolean hide_value) -+ const char *key, const char *value, -+ gboolean hide_value, gboolean immutable) - { -- DBG("provider %p key %s value %s", provider, key, -+ DBG("provider %p key %s immutable %s value %s", provider, key, -+ immutable ? "yes" : "no", - hide_value ? "" : value); - - if (g_str_equal(key, "Type") == TRUE) { -@@ -2111,6 +2135,13 @@ static int set_string(struct vpn_provider *provider, - } else { - struct vpn_setting *setting; - -+ setting = g_hash_table_lookup(provider->setting_strings, key); -+ if (setting != NULL && immutable == FALSE && -+ setting->immutable == TRUE) { -+ DBG("Trying to set immutable variable %s", key); -+ return -EPERM; -+ } -+ - setting = g_try_new(struct vpn_setting, 1); - if (setting == NULL) - return -ENOMEM; -@@ -2118,6 +2149,9 @@ static int set_string(struct vpn_provider *provider, - setting->value = g_strdup(value); - setting->hide_value = hide_value; - -+ if (immutable == TRUE) -+ setting->immutable = TRUE; -+ - if (hide_value == FALSE) - send_value(provider->path, key, setting->value); - -@@ -2131,13 +2165,19 @@ static int set_string(struct vpn_provider *provider, - int vpn_provider_set_string(struct vpn_provider *provider, - const char *key, const char *value) - { -- return set_string(provider, key, value, FALSE); -+ return set_string(provider, key, value, FALSE, FALSE); - } - - int vpn_provider_set_string_hide_value(struct vpn_provider *provider, - const char *key, const char *value) - { -- return set_string(provider, key, value, TRUE); -+ return set_string(provider, key, value, TRUE, FALSE); -+} -+ -+int __vpn_provider_set_string_immutable(struct vpn_provider *provider, -+ const char *key, const char *value) -+{ -+ return set_string(provider, key, value, FALSE, TRUE); - } - - const char *vpn_provider_get_string(struct vpn_provider *provider, -diff --git a/vpn/vpn.h b/vpn/vpn.h -index c57fcf7..56e7a5c 100644 ---- a/vpn/vpn.h -+++ b/vpn/vpn.h -@@ -81,6 +81,8 @@ void __vpn_provider_list(DBusMessageIter *iter, void *user_data); - int __vpn_provider_create(DBusMessage *msg); - int __vpn_provider_create_from_config(GHashTable *settings, - const char *config_ident, const char *config_entry); -+int __vpn_provider_set_string_immutable(struct vpn_provider *provider, -+ const char *key, const char *value); - DBusMessage *__vpn_provider_get_connections(DBusMessage *msg); - const char * __vpn_provider_get_ident(struct vpn_provider *provider); - struct vpn_provider *__vpn_provider_lookup(const char *identifier); diff --git a/packages/network/connman/patches/connman-misc-vpn.patch b/packages/network/connman/patches/connman-misc-vpn.patch deleted file mode 100644 index 17f3c41279..0000000000 --- a/packages/network/connman/patches/connman-misc-vpn.patch +++ /dev/null @@ -1,211 +0,0 @@ -diff --git a/plugins/vpn.c b/plugins/vpn.c -index cbba396..f60a658 100644 ---- a/plugins/vpn.c -+++ b/plugins/vpn.c -@@ -1438,6 +1438,8 @@ static void destroy_provider(struct connection_data *data) - if (data->call != NULL) - dbus_pending_call_cancel(data->call); - -+ connman_provider_set_data(data->provider, NULL); -+ - connman_provider_put(data->provider); - - data->provider = NULL; -diff --git a/vpn/vpn-config.c b/vpn/vpn-config.c -index 1ece7e9..a1a2ed5 100644 ---- a/vpn/vpn-config.c -+++ b/vpn/vpn-config.c -@@ -539,28 +539,40 @@ static void config_notify_handler(struct inotify_event *event, - } - - if (event->mask & IN_CREATE) -- create_config(ident); -+ return; -+ -+ if (event->mask & IN_DELETE) { -+ g_hash_table_remove(config_table, ident); -+ return; -+ } - - if (event->mask & IN_MODIFY) { - struct vpn_config *config; -+ char *path = get_dir(); - - config = g_hash_table_lookup(config_table, ident); - if (config != NULL) { -- char *path = get_dir(); -- - g_hash_table_remove_all(config->provider_table); - load_config(config, path, REMOVE); - - /* Re-scan the config file for any changes */ - g_hash_table_remove_all(config->provider_table); - load_config(config, path, ADD); -- -- g_free(path); -+ } else { -+ /* -+ * Inotify will send create event followed by modify -+ * event for any config file that is copied to -+ * monitored directory. So in practice we should just -+ * ignore the create event and trust only the modify -+ * one in order to avoid create/remove/create loop -+ */ -+ config = create_config(ident); -+ if (config != NULL) -+ load_config(config, path, ADD); - } -- } - -- if (event->mask & IN_DELETE) -- g_hash_table_remove(config_table, ident); -+ g_free(path); -+ } - } - - int __vpn_config_init(void) -diff --git a/src/connman.h b/src/connman.h -index fc6d528..19bca74 100644 ---- a/src/connman.h -+++ b/src/connman.h -@@ -559,7 +559,7 @@ int __connman_provider_indicate_state(struct connman_provider *provider, - int __connman_provider_indicate_error(struct connman_provider *provider, - enum connman_provider_error error); - int __connman_provider_connect(struct connman_provider *provider); --int __connman_provider_remove(const char *path); -+int __connman_provider_remove_by_path(const char *path); - void __connman_provider_cleanup(void); - int __connman_provider_init(void); - -diff --git a/src/manager.c b/src/manager.c -index 1d09267..e56f2e1 100644 ---- a/src/manager.c -+++ b/src/manager.c -@@ -161,7 +161,7 @@ static DBusMessage *remove_provider(DBusConnection *conn, - dbus_message_get_args(msg, NULL, DBUS_TYPE_OBJECT_PATH, &path, - DBUS_TYPE_INVALID); - -- err = __connman_provider_remove(path); -+ err = __connman_provider_remove_by_path(path); - if (err < 0) - return __connman_error_failed(msg, -err); - -diff --git a/src/provider.c b/src/provider.c -index ca86880..b86e7d6 100644 ---- a/src/provider.c -+++ b/src/provider.c -@@ -174,7 +174,7 @@ int __connman_provider_connect(struct connman_provider *provider) - return 0; - } - --int __connman_provider_remove(const char *path) -+int __connman_provider_remove_by_path(const char *path) - { - struct connman_provider *provider; - GHashTableIter iter; -diff --git a/include/provider.h b/include/provider.h -index bfefaed..fdd8ae0 100644 ---- a/include/provider.h -+++ b/include/provider.h -@@ -79,6 +79,7 @@ void connman_provider_unref_debug(struct connman_provider *provider, - const char *file, int line, const char *caller); - - int connman_provider_disconnect(struct connman_provider *provider); -+int connman_provider_remove(struct connman_provider *provider); - - int connman_provider_set_string(struct connman_provider *provider, - const char *key, const char *value); -diff --git a/src/provider.c b/src/provider.c -index b86e7d6..f7bb4e1 100644 ---- a/src/provider.c -+++ b/src/provider.c -@@ -150,6 +150,19 @@ int connman_provider_disconnect(struct connman_provider *provider) - return 0; - } - -+int connman_provider_remove(struct connman_provider *provider) -+{ -+ DBG("Removing VPN %s", provider->identifier); -+ -+ provider_remove(provider); -+ -+ connman_provider_set_state(provider, CONNMAN_PROVIDER_STATE_IDLE); -+ -+ g_hash_table_remove(provider_hash, provider->identifier); -+ -+ return 0; -+} -+ - int __connman_provider_connect(struct connman_provider *provider) - { - int err; -diff --git a/plugins/vpn.c b/plugins/vpn.c -index f60a658..cda0c1b 100644 ---- a/plugins/vpn.c -+++ b/plugins/vpn.c -@@ -1440,7 +1440,7 @@ static void destroy_provider(struct connection_data *data) - - connman_provider_set_data(data->provider, NULL); - -- connman_provider_put(data->provider); -+ connman_provider_remove(data->provider); - - data->provider = NULL; - } -diff --git a/plugins/vpn.c b/plugins/vpn.c -index cda0c1b..f15796d 100644 ---- a/plugins/vpn.c -+++ b/plugins/vpn.c -@@ -252,6 +252,8 @@ static void set_provider_state(struct connection_data *data) - enum connman_provider_state state = CONNMAN_PROVIDER_STATE_UNKNOWN; - int err = 0; - -+ DBG("provider %p new state %s", data->provider, data->state); -+ - if (g_str_equal(data->state, "ready") == TRUE) { - state = CONNMAN_PROVIDER_STATE_READY; - goto set; -diff --git a/plugins/vpn.c b/plugins/vpn.c -index f15796d..04318a9 100644 ---- a/plugins/vpn.c -+++ b/plugins/vpn.c -@@ -796,6 +796,14 @@ static int provider_remove(struct connman_provider *provider) - - DBG("provider %p data %p", provider, data); - -+ if (data == NULL) { -+ /* -+ * This means the provider is already removed, -+ * just ignore the dbus in this case. -+ */ -+ return -EALREADY; -+ } -+ - /* - * When provider.c:provider_remove() calls this function, - * it will remove the provider itself after the call. -diff --git a/plugins/vpn.c b/plugins/vpn.c -index 04318a9..038a833 100644 ---- a/plugins/vpn.c -+++ b/plugins/vpn.c -@@ -1508,6 +1508,7 @@ static gboolean connection_removed(DBusConnection *conn, DBusMessage *message, - { - const char *path; - const char *signature = DBUS_TYPE_OBJECT_PATH_AS_STRING; -+ struct connection_data *data; - - if (dbus_message_has_signature(message, signature) == FALSE) { - connman_error("vpn removed signature \"%s\" does not match " -@@ -1518,7 +1519,11 @@ static gboolean connection_removed(DBusConnection *conn, DBusMessage *message, - - dbus_message_get_args(message, NULL, DBUS_TYPE_OBJECT_PATH, &path, - DBUS_TYPE_INVALID); -- remove_connection(conn, path); -+ -+ data = g_hash_table_lookup(vpn_connections, get_ident(path)); -+ if (data != NULL) -+ remove_connection(conn, path); -+ - return TRUE; - } - From bf71f03803b1b322461cbee0a533823b4244d926 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Sat, 16 Mar 2013 01:23:06 +0100 Subject: [PATCH 066/104] xbmc-addon-settings: update to xbmc-addon-settings-0.1.2 Signed-off-by: Stephan Raue --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index f3bc7bb1c8..8b006fcdee 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.1.1" +PKG_VERSION="0.1.2" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From a0d481efb92af6014374f3a05411ee59ee230579 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Mon, 18 Mar 2013 16:35:13 +0200 Subject: [PATCH 067/104] setxkbmap: init: update for new settings addon --- packages/x11/app/setxkbmap/init.d/72_keyboard | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/packages/x11/app/setxkbmap/init.d/72_keyboard b/packages/x11/app/setxkbmap/init.d/72_keyboard index 32478732e2..3bbfa64500 100644 --- a/packages/x11/app/setxkbmap/init.d/72_keyboard +++ b/packages/x11/app/setxkbmap/init.d/72_keyboard @@ -23,23 +23,15 @@ # runlevels: openelec ( - if [ -f /var/config/settings.conf ]; then - . /var/config/settings.conf + if [ -f /storage/.cache/xkb/layout ]; then + . /storage/.cache/xkb/layout progress "setup keyboard layout" - if [ -z $X11_KEYMAP ]; then - X11_KEYMAP="us" - fi - # waiting for Xorg to start wait_for_xorg # setup keymap - if [ -z $X11_KEYMAP2 ]; then - setxkbmap -display $DISPLAY $X11_KEYMAP; - else - setxkbmap -display $DISPLAY -layout "$X11_KEYMAP,$X11_KEYMAP2" -option "grp:alt_shift_toggle"; - fi + setxkbmap -display $DISPLAY -layout "$XKBLAYOUT" -model "$XKBMODEL" -option "grp:alt_shift_toggle"; fi )& From 72664e1359eb422f9d554a8ca65234df09ddbaaa Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Thu, 21 Mar 2013 05:27:34 +0100 Subject: [PATCH 068/104] connman: install and setup default main.conf shipped with connman, set 'PreferredTechnologies' Signed-off-by: Stephan Raue --- packages/network/connman/config/main.conf | 7 ------- packages/network/connman/install | 5 ++++- 2 files changed, 4 insertions(+), 8 deletions(-) delete mode 100644 packages/network/connman/config/main.conf diff --git a/packages/network/connman/config/main.conf b/packages/network/connman/config/main.conf deleted file mode 100644 index b4144ddc67..0000000000 --- a/packages/network/connman/config/main.conf +++ /dev/null @@ -1,7 +0,0 @@ -[General] - -# Enable background scanning. Default is true. -# Background scanning will start every 5 minutes unless -# the scan list is empty. In that case, a simple backoff -# mechanism starting from 10s up to 5 minutes will run. -BackgroundScanning = true diff --git a/packages/network/connman/install b/packages/network/connman/install index 978318c583..e2261a48fe 100755 --- a/packages/network/connman/install +++ b/packages/network/connman/install @@ -29,7 +29,10 @@ mkdir -p $INSTALL/etc ln -sf /var/cache/resolv.conf $INSTALL/etc/resolv.conf mkdir -p $INSTALL/etc/connman - cp $PKG_DIR/config/main.conf $INSTALL/etc/connman + cp $PKG_BUILD/src/main.conf $INSTALL/etc/connman + sed -i $INSTALL/etc/connman/main.conf \ + -e "s,^# BackgroundScanning.*,BackgroundScanning = true,g" \ + -e "s,^# PreferredTechnologies.*,PreferredTechnologies = ethernet,wifi,cellular,g" mkdir -p $INSTALL/etc/dbus-1/system.d cp $PKG_BUILD/src/connman.conf $INSTALL/etc/dbus-1/system.d From ebf76e01a7b25e6cd3dc1779b1b3ffb24d99ce6d Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 21 Mar 2013 17:07:50 +0200 Subject: [PATCH 069/104] connman: fix 72664e13 --- packages/network/connman/install | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/network/connman/install b/packages/network/connman/install index e2261a48fe..ec8142f31c 100755 --- a/packages/network/connman/install +++ b/packages/network/connman/install @@ -31,8 +31,8 @@ mkdir -p $INSTALL/etc mkdir -p $INSTALL/etc/connman cp $PKG_BUILD/src/main.conf $INSTALL/etc/connman sed -i $INSTALL/etc/connman/main.conf \ - -e "s,^# BackgroundScanning.*,BackgroundScanning = true,g" \ - -e "s,^# PreferredTechnologies.*,PreferredTechnologies = ethernet,wifi,cellular,g" + -e "s|^# BackgroundScanning.*|BackgroundScanning = true|g" \ + -e "s|^# PreferredTechnologies.*|PreferredTechnologies = ethernet,wifi,cellular|g" mkdir -p $INSTALL/etc/dbus-1/system.d cp $PKG_BUILD/src/connman.conf $INSTALL/etc/dbus-1/system.d From da94034f6ee2784a9e4f466b3dde01462414ac82 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 21 Mar 2013 23:32:15 +0200 Subject: [PATCH 070/104] connman: update to connman-fd7600c --- packages/network/connman/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/network/connman/meta b/packages/network/connman/meta index 56ae963f84..027c183822 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="76e97ed" +PKG_VERSION="fd7600c" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" From 7e92c02d245bf3ba76bcdfa4944caf91343a6f61 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 14:54:44 +0200 Subject: [PATCH 071/104] connman: update to connman-9fa8782 --- packages/network/connman/meta | 2 +- ..._sure_we_are_not_accessing_null-hash.patch | 35 ------------------- 2 files changed, 1 insertion(+), 36 deletions(-) delete mode 100644 packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch diff --git a/packages/network/connman/meta b/packages/network/connman/meta index 027c183822..79109470a4 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="fd7600c" +PKG_VERSION="9fa8782" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" diff --git a/packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch b/packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch deleted file mode 100644 index 361a4f6bf0..0000000000 --- a/packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9944240ba52d19f04fb4bf468a8524f570e5fa6d Mon Sep 17 00:00:00 2001 -From: Jukka Rissanen -Date: Fri, 22 Mar 2013 14:15:19 +0000 -Subject: dnsproxy: Make sure we are not accessing null hash - -If dnsproxy is not in use, like when connman has been started -with -r option, then the listener_table will be NULL which can -cause crash in hash table lookup call. ---- -diff --git a/src/dnsproxy.c b/src/dnsproxy.c -index f698cfd..7a9ca91 100644 ---- a/src/dnsproxy.c -+++ b/src/dnsproxy.c -@@ -2916,6 +2916,9 @@ int __connman_dnsproxy_add_listener(int index) - if (index < 0) - return -EINVAL; - -+ if (listener_table == NULL) -+ return 0; -+ - if (g_hash_table_lookup(listener_table, GINT_TO_POINTER(index)) != NULL) - return 0; - -@@ -2947,6 +2950,9 @@ void __connman_dnsproxy_remove_listener(int index) - - DBG("index %d", index); - -+ if (listener_table == NULL) -+ return; -+ - ifdata = g_hash_table_lookup(listener_table, GINT_TO_POINTER(index)); - if (ifdata == NULL) - return; --- -cgit v0.9.1 From 7203bcbee23464243fae83b77bf3da6dfd1dad29 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 14:55:26 +0200 Subject: [PATCH 072/104] xbmc-addon-settings: update to xbmc-addon-settings-0.1.3 --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 8b006fcdee..1b4cf85f49 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.1.2" +PKG_VERSION="0.1.3" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From ff974e1e7d59b9c32e6a335329463dec79bb1b05 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 14:54:44 +0200 Subject: [PATCH 073/104] connman: update to connman-9fa8782 --- packages/network/connman/meta | 2 +- ..._sure_we_are_not_accessing_null-hash.patch | 35 ------------------- 2 files changed, 1 insertion(+), 36 deletions(-) delete mode 100644 packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch diff --git a/packages/network/connman/meta b/packages/network/connman/meta index 027c183822..79109470a4 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="fd7600c" +PKG_VERSION="9fa8782" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" diff --git a/packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch b/packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch deleted file mode 100644 index 361a4f6bf0..0000000000 --- a/packages/network/connman/patches/connman-dnsproxy_Make_sure_we_are_not_accessing_null-hash.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9944240ba52d19f04fb4bf468a8524f570e5fa6d Mon Sep 17 00:00:00 2001 -From: Jukka Rissanen -Date: Fri, 22 Mar 2013 14:15:19 +0000 -Subject: dnsproxy: Make sure we are not accessing null hash - -If dnsproxy is not in use, like when connman has been started -with -r option, then the listener_table will be NULL which can -cause crash in hash table lookup call. ---- -diff --git a/src/dnsproxy.c b/src/dnsproxy.c -index f698cfd..7a9ca91 100644 ---- a/src/dnsproxy.c -+++ b/src/dnsproxy.c -@@ -2916,6 +2916,9 @@ int __connman_dnsproxy_add_listener(int index) - if (index < 0) - return -EINVAL; - -+ if (listener_table == NULL) -+ return 0; -+ - if (g_hash_table_lookup(listener_table, GINT_TO_POINTER(index)) != NULL) - return 0; - -@@ -2947,6 +2950,9 @@ void __connman_dnsproxy_remove_listener(int index) - - DBG("index %d", index); - -+ if (listener_table == NULL) -+ return; -+ - ifdata = g_hash_table_lookup(listener_table, GINT_TO_POINTER(index)); - if (ifdata == NULL) - return; --- -cgit v0.9.1 From fbe839c23068748ad7733b378ad58e31a70eddbb Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 14:55:26 +0200 Subject: [PATCH 074/104] xbmc-addon-settings: update to xbmc-addon-settings-0.1.3 --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 8b006fcdee..1b4cf85f49 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.1.2" +PKG_VERSION="0.1.3" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From 136fab38f002c15582f6f7de1182fb7bcf69706e Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 19:20:55 +0200 Subject: [PATCH 075/104] linux-tbs-drivers: update to linux-tbs-drivers-130318 --- packages/linux-drivers/linux-tbs-drivers/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/linux-drivers/linux-tbs-drivers/meta b/packages/linux-drivers/linux-tbs-drivers/meta index 04f4056b9e..bf92a1873b 100644 --- a/packages/linux-drivers/linux-tbs-drivers/meta +++ b/packages/linux-drivers/linux-tbs-drivers/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="linux-tbs-drivers" -PKG_VERSION="130127" +PKG_VERSION="130318" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" From c405618532b3daf0c26a0513881f03a9f02b1128 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 21:00:13 +0200 Subject: [PATCH 076/104] linux: update to linux-3.8.4 --- packages/linux/meta | 2 +- .../linux-053-spinelplus-remote-0.1.patch | 0 .../linux-059-remove_some_xpad_pids.patch | 0 ...-ene-ir-Fix-cleanup-on-probe-failure.patch | 74 - .../patches/3.7.10/linux-210-dvbsky.patch | 5942 ------- ...-rtl28xxu_add_NOXON_USB_dongle_rev.2.patch | 44 - ...x-950-saa716x_PCIe_interface_chipset.patch | 12914 ---------------- ...ound_for_conflicting_IEC958_controls.patch | 266 - ...inux-990.03-media-ds3000_firmware-01.patch | 11 - ...inux-990.03-media-ds3000_firmware-02.patch | 87 - ...ken-workaround-for-HDMI-SPDIF-confli.patch | 139 - .../linux-010-perf_crosscompiling.patch | 0 ...x-203-stb0899_enable_low_symbol_rate.patch | 0 ...obe-cleanup-goto-labels-more-verbose.patch | 0 ...3-media-rc-Set-rdev-before-irq-setup.patch | 0 ...-rc_register_device-before-irq-setup.patch | 0 ...linux-212-mantis_stb0899_faster_lock.patch | 0 .../linux-213-cinergy_s2_usb_r2.patch | 0 ...xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch | 0 ...8xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch | 0 .../linux-221-ngene-octopus.patch | 1051 +- .../linux-222-stb0899_signal_quality.patch | 0 ...-video-artifacts-with-tt-3600-s2-usb.patch | 0 .../linux-700-jmicron_1_0_8_5.patch | 0 ...utputting-HDMI-audio-before-prepare-.patch | 0 25 files changed, 553 insertions(+), 19977 deletions(-) rename packages/linux/patches/{ => 3.6.11}/linux-053-spinelplus-remote-0.1.patch (100%) rename packages/linux/patches/{ => 3.6.11}/linux-059-remove_some_xpad_pids.patch (100%) delete mode 100644 packages/linux/patches/3.7.10/linux-206.01-media-ene-ir-Fix-cleanup-on-probe-failure.patch delete mode 100644 packages/linux/patches/3.7.10/linux-210-dvbsky.patch delete mode 100644 packages/linux/patches/3.7.10/linux-214-rtl28xxu_add_NOXON_USB_dongle_rev.2.patch delete mode 100644 packages/linux/patches/3.7.10/linux-950-saa716x_PCIe_interface_chipset.patch delete mode 100644 packages/linux/patches/3.7.10/linux-990.01-hda_Add_workaround_for_conflicting_IEC958_controls.patch delete mode 100644 packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-01.patch delete mode 100644 packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-02.patch delete mode 100644 packages/linux/patches/3.7.10/linux-990.04-hda-Fix-broken-workaround-for-HDMI-SPDIF-confli.patch rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-010-perf_crosscompiling.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-203-stb0899_enable_low_symbol_rate.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-212-mantis_stb0899_faster_lock.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-213-cinergy_s2_usb_r2.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-221-ngene-octopus.patch (96%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-222-stb0899_signal_quality.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-700-jmicron_1_0_8_5.patch (100%) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch (100%) diff --git a/packages/linux/meta b/packages/linux/meta index e6a40d7309..06b915c231 100644 --- a/packages/linux/meta +++ b/packages/linux/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="linux" -PKG_VERSION="3.7.10" +PKG_VERSION="3.8.4" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" diff --git a/packages/linux/patches/linux-053-spinelplus-remote-0.1.patch b/packages/linux/patches/3.6.11/linux-053-spinelplus-remote-0.1.patch similarity index 100% rename from packages/linux/patches/linux-053-spinelplus-remote-0.1.patch rename to packages/linux/patches/3.6.11/linux-053-spinelplus-remote-0.1.patch diff --git a/packages/linux/patches/linux-059-remove_some_xpad_pids.patch b/packages/linux/patches/3.6.11/linux-059-remove_some_xpad_pids.patch similarity index 100% rename from packages/linux/patches/linux-059-remove_some_xpad_pids.patch rename to packages/linux/patches/3.6.11/linux-059-remove_some_xpad_pids.patch diff --git a/packages/linux/patches/3.7.10/linux-206.01-media-ene-ir-Fix-cleanup-on-probe-failure.patch b/packages/linux/patches/3.7.10/linux-206.01-media-ene-ir-Fix-cleanup-on-probe-failure.patch deleted file mode 100644 index 7e017d48ad..0000000000 --- a/packages/linux/patches/3.7.10/linux-206.01-media-ene-ir-Fix-cleanup-on-probe-failure.patch +++ /dev/null @@ -1,74 +0,0 @@ -diff -Naur linux-3.7.2/drivers/media/rc/ene_ir.c linux-3.7.2.patch/drivers/media/rc/ene_ir.c ---- linux-3.7.2/drivers/media/rc/ene_ir.c 2013-01-11 18:19:28.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/rc/ene_ir.c 2013-01-16 11:32:07.124857030 +0100 -@@ -1003,7 +1003,7 @@ - dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL); - rdev = rc_allocate_device(); - if (!dev || !rdev) -- goto error1; -+ goto failure; - - /* validate resources */ - error = -ENODEV; -@@ -1014,10 +1014,10 @@ - - if (!pnp_port_valid(pnp_dev, 0) || - pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE) -- goto error; -+ goto failure; - - if (!pnp_irq_valid(pnp_dev, 0)) -- goto error; -+ goto failure; - - spin_lock_init(&dev->hw_lock); - -@@ -1033,7 +1033,7 @@ - /* detect hardware version and features */ - error = ene_hw_detect(dev); - if (error) -- goto error; -+ goto failure; - - if (!dev->hw_learning_and_tx_capable && txsim) { - dev->hw_learning_and_tx_capable = true; -@@ -1078,30 +1078,27 @@ - /* claim the resources */ - error = -EBUSY; - if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) { -- dev->hw_io = -1; -- dev->irq = -1; -- goto error; -+ goto failure; - } - - dev->irq = pnp_irq(pnp_dev, 0); - if (request_irq(dev->irq, ene_isr, - IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) { -- dev->irq = -1; -- goto error; -+ goto failure2; - } - - error = rc_register_device(rdev); - if (error < 0) -- goto error; -+ goto failure3; - - pr_notice("driver has been successfully loaded\n"); - return 0; --error: -- if (dev && dev->irq >= 0) -- free_irq(dev->irq, dev); -- if (dev && dev->hw_io >= 0) -- release_region(dev->hw_io, ENE_IO_SIZE); --error1: -+ -+failure3: -+ free_irq(dev->irq, dev); -+failure2: -+ release_region(dev->hw_io, ENE_IO_SIZE); -+failure: - rc_free_device(rdev); - kfree(dev); - return error; diff --git a/packages/linux/patches/3.7.10/linux-210-dvbsky.patch b/packages/linux/patches/3.7.10/linux-210-dvbsky.patch deleted file mode 100644 index cc85808356..0000000000 --- a/packages/linux/patches/3.7.10/linux-210-dvbsky.patch +++ /dev/null @@ -1,5942 +0,0 @@ -diff -urN a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig ---- a/drivers/media/dvb-frontends/Kconfig 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/dvb-frontends/Kconfig 2013-01-20 21:27:22.379421738 +0800 -@@ -200,6 +200,20 @@ - help - A DVB-S/S2 tuner module. Say Y when you want to support this frontend. - -+config DVB_M88DS3103 -+ tristate "Montage M88DS3103 based" -+ depends on DVB_CORE && I2C -+ default m if !MEDIA_SUBDRV_AUTOSELECT -+ help -+ A DVB-S/S2 tuner module. Say Y when you want to support this frontend. -+ -+config DVB_M88DC2800 -+ tristate "Montage M88DC2800 based" -+ depends on DVB_CORE && I2C -+ default m if !MEDIA_SUBDRV_AUTOSELECT -+ help -+ A DVB-C tuner module. Say Y when you want to support this frontend. -+ - config DVB_SI21XX - tristate "Silicon Labs SI21XX based" - depends on DVB_CORE && I2C -diff -urN a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontends/m88dc2800.c ---- a/drivers/media/dvb-frontends/m88dc2800.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88dc2800.c 2013-01-20 21:27:28.323421901 +0800 -@@ -0,0 +1,2235 @@ -+/* -+ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage -+ -+ Copyright (C) 2012 Max nibble -+ Copyright (C) 2011 Montage Technology -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+*/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "dvb_frontend.h" -+#include "m88dc2800.h" -+ -+struct m88dc2800_state { -+ struct i2c_adapter* i2c; -+ const struct m88dc2800_config *config; -+ struct dvb_frontend frontend; -+ u32 freq; -+ u32 ber; -+ u32 sym; -+ u16 qam; -+ u8 inverted; -+ u32 xtal; -+ /*tuner state*/ -+ u8 tuner_init_OK; /* Tuner initialize status */ -+ u8 tuner_dev_addr; /* Tuner device address */ -+ u32 tuner_freq; /* RF frequency to be set, unit: KHz */ -+ u16 tuner_qam; /* Reserved */ -+ u16 tuner_mode; -+ u8 tuner_bandwidth; /* Bandwidth of the channel, unit: MHz, 6/7/8 */ -+ u8 tuner_loopthrough; /* Tuner loop through switch, 0/1 */ -+ u32 tuner_crystal; /* Tuner crystal frequency, unit: KHz */ -+ u32 tuner_dac; /* Tuner DAC frequency, unit: KHz */ -+ u16 tuner_mtt; /* Tuner chip version, D1: 0x0d, E0: 0x0e, E1: 0x8e */ -+ u16 tuner_custom_cfg; -+ u32 tuner_version; /* Tuner driver version number */ -+ u32 tuner_time; -+}; -+ -+static int debug; -+module_param(debug, int, 0644); -+MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); -+ -+#define dprintk(args...) \ -+ do { \ -+ if (debug) \ -+ printk(KERN_INFO "m88dc2800: " args); \ -+ } while (0) -+ -+ -+static int m88dc2800_i2c_write(struct m88dc2800_state *state, u8 addr, u8 *p_data, u8 len) -+{ -+ struct i2c_msg msg = { .flags = 0 }; -+ -+ msg.addr = addr; -+ msg.buf = p_data; -+ msg.len = len; -+ -+ return i2c_transfer(state->i2c, &msg, 1); -+} -+ -+static int m88dc2800_i2c_read(struct m88dc2800_state *state, u8 addr, u8 *p_data, u8 len) -+{ -+ struct i2c_msg msg = { .flags = I2C_M_RD }; -+ -+ msg.addr = addr; -+ msg.buf = p_data; -+ msg.len = len; -+ -+ return i2c_transfer(state->i2c, &msg, 1); -+} -+ -+/*demod register operations.*/ -+static int WriteReg(struct m88dc2800_state *state, u8 reg, u8 data) -+{ -+ u8 buf[] = { reg, data }; -+ u8 addr = state->config->demod_address; -+ int err; -+ -+ if (debug > 1) -+ printk("m88dc2800: %s: write reg 0x%02x, value 0x%02x\n", -+ __func__, reg, data); -+ -+ err = m88dc2800_i2c_write(state, addr, buf, 2); -+ -+ if (err != 1) { -+ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); -+ return -EIO; -+ } -+ return 0; -+} -+ -+static int ReadReg(struct m88dc2800_state *state, u8 reg) -+{ -+ int ret; -+ u8 b0[] = { reg }; -+ u8 b1[] = { 0 }; -+ u8 addr = state->config->demod_address; -+ -+ ret = m88dc2800_i2c_write(state, addr, b0, 1); -+ -+ if (ret != 1) { -+ printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", -+ __func__, reg, ret); -+ return -EIO; -+ } -+ -+ ret = m88dc2800_i2c_read(state, addr, b1, 1); -+ -+ if (debug > 1) -+ printk(KERN_INFO "m88dc2800: read reg 0x%02x, value 0x%02x\n", -+ reg, b1[0]); -+ return b1[0]; -+} -+ -+static int _mt_fe_tn_set_reg(struct m88dc2800_state *state, u8 reg, u8 data) -+{ -+ int ret; -+ u8 buf[2]; -+ u8 addr = state->tuner_dev_addr; -+ -+ buf[1] = ReadReg(state, 0x86); -+ buf[1] |= 0x80; -+ ret = WriteReg(state, 0x86, buf[1]); -+ -+ buf[0] = reg; -+ buf[1] = data; -+ -+ ret = m88dc2800_i2c_write(state, addr, buf, 2); -+ if(ret != 1) -+ return -EIO; -+ return 0; -+} -+ -+static int _mt_fe_tn_get_reg(struct m88dc2800_state *state, u8 reg, u8 *p_data) -+{ -+ int ret; -+ u8 buf[2]; -+ u8 addr = state->tuner_dev_addr; -+ -+ buf[1] = ReadReg(state, 0x86); -+ buf[1] |= 0x80; -+ ret = WriteReg(state, 0x86, buf[1]); -+ -+ buf[0] = reg; -+ ret = m88dc2800_i2c_write(state, addr, buf, 1); -+ -+ msleep(1); -+ -+ buf[1] = ReadReg(state, 0x86); -+ buf[1] |= 0x80; -+ ret = WriteReg(state, 0x86, buf[1]); -+ -+ return m88dc2800_i2c_read(state, addr, p_data, 1); -+} -+ -+/* Tuner operation functions.*/ -+static int _mt_fe_tn_set_RF_front_tc2800(struct m88dc2800_state *state) -+{ -+ u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { /* D1 */ -+ if (freq_KHz <= 123000) { -+ if (freq_KHz <= 56000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x00); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x00); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x00); -+ }else if (freq_KHz <= 64000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x10); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x01); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x08); -+ }else if (freq_KHz <= 72000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x20); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x02); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x10); -+ }else if (freq_KHz <= 80000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x30); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x03); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x18); -+ }else if (freq_KHz <= 88000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x40); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x04); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x20); -+ }else if (freq_KHz <= 96000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x50); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x05); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x28); -+ }else if (freq_KHz <= 104000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x60); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x06); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x30); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x70); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x07); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x38); -+ } -+ _mt_fe_tn_set_reg(state, 0x5a, 0x75); -+ _mt_fe_tn_set_reg(state, 0x73, 0x0c); -+ } else { /* if (freq_KHz > 112000) */ -+ _mt_fe_tn_set_reg(state, 0x58, 0x7b); -+ if (freq_KHz <= 304000) { -+ if (freq_KHz <= 136000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x40); -+ }else if (freq_KHz <= 160000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x48); -+ }else if (freq_KHz <= 184000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x50); -+ }else if (freq_KHz <= 208000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x58); -+ }else if (freq_KHz <= 232000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x60); -+ }else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x68); -+ }else if (freq_KHz <= 280000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x70); -+ }else { /*if (freq_KHz <= 304000)*/ -+ _mt_fe_tn_set_reg(state, 0x5e, 0x78); -+ } -+ if (freq_KHz <= 171000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x08); -+ }else if (freq_KHz <= 211000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0a); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } -+ }else { /* if (freq_KHz > 304000) */ -+ _mt_fe_tn_set_reg(state, 0x5e, 0x88); -+ if (freq_KHz <= 400000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0c); -+ }else if (freq_KHz <= 450000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x09); -+ }else if (freq_KHz <= 550000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ }else if (freq_KHz <= 650000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0d); -+ }else { /*if (freq_KHz > 650000) */ -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } -+ } -+ } -+ -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x24); -+ else if (freq_KHz > 700000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x34); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x44); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ -+ if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x53); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x57); -+ else -+ _mt_fe_tn_set_reg(state, 0x6a, 0x59); -+ -+ if (freq_KHz < 200000) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x5d); -+ }else if (freq_KHz < 500000) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x7d); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x20, 0xfd); -+ }/* end of 0xD1 */ -+ }else if (state->tuner_mtt == 0xE1) { /* E1 */ -+ if (freq_KHz <= 112000) { /* 123MHz */ -+ if (freq_KHz <= 56000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x01); -+ }else if (freq_KHz <= 64000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x09); -+ }else if (freq_KHz <= 72000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x11); -+ }else if (freq_KHz <= 80000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x19); -+ }else if (freq_KHz <= 88000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x21); -+ }else if (freq_KHz <= 96000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x29); -+ }else if (freq_KHz <= 104000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x31); -+ }else {/* if (freq_KHz <= 112000) */ -+ _mt_fe_tn_set_reg(state, 0x5c, 0x39); -+ } -+ _mt_fe_tn_set_reg(state, 0x5b, 0x30); -+ }else { /* if (freq_KHz > 112000) */ -+ if (freq_KHz <= 304000) { -+ if (freq_KHz <= 136000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x41); -+ }else if (freq_KHz <= 160000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x49); -+ }else if (freq_KHz <= 184000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x51); -+ }else if (freq_KHz <= 208000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x59); -+ }else if (freq_KHz <= 232000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x61); -+ }else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x69); -+ }else if (freq_KHz <= 280000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x71); -+ }else { /*if (freq_KHz <= 304000)*/ -+ _mt_fe_tn_set_reg(state, 0x5c, 0x79); -+ } -+ -+ if (freq_KHz <= 150000) { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x28); -+ }else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x29); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x2a); -+ } -+ }else { /* if (freq_KHz > 304000) */ -+ if (freq_KHz <= 400000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x89); -+ }else if (freq_KHz <= 450000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x91); -+ }else if (freq_KHz <= 650000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x98); -+ }else if (freq_KHz <= 850000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0xa0); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x5c, 0xa8); -+ } -+ _mt_fe_tn_set_reg(state, 0x5b, 0x08); -+ } -+ } -+ } /* end of 0xE1 */ -+ return 0; -+} -+ -+static int _mt_fe_tn_cali_PLL_tc2800(struct m88dc2800_state *state, u32 freq_KHz, u32 cali_freq_thres_div2, u32 cali_freq_thres_div3r, u32 cali_freq_thres_div3) -+{ -+ s32 N, F, MUL; -+ u8 buf, tmp, tmp2; -+ s32 M; -+ const s32 crystal_KHz = state->tuner_crystal; -+ -+ if (state->tuner_mtt == 0xD1) { -+ M = state->tuner_crystal / 4000; -+ if (freq_KHz > cali_freq_thres_div2) { -+ MUL = 4; -+ tmp = 2; -+ }else if (freq_KHz > 300000) { -+ MUL = 8; -+ tmp = 3; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 2)) { -+ MUL = 8; -+ tmp = 4; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 4)) { -+ MUL = 16; -+ tmp = 5; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 8)) { -+ MUL = 32; -+ tmp = 6; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 16)){ -+ MUL = 64; -+ tmp = 7; -+ }else { /* invalid */ -+ MUL = 0; -+ tmp = 0; -+ return 1; -+ } -+ }else if (state->tuner_mtt == 0xE1) { -+ M = state->tuner_crystal / 1000; -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x32, 0xe0); -+ _mt_fe_tn_set_reg(state, 0x33, 0x86); -+ _mt_fe_tn_set_reg(state, 0x37, 0x70); -+ _mt_fe_tn_set_reg(state, 0x38, 0x20); -+ _mt_fe_tn_set_reg(state, 0x39, 0x18); -+ _mt_fe_tn_set_reg(state, 0x89, 0x83); -+ -+ if (freq_KHz > cali_freq_thres_div2) { -+ M = M / 4; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > cali_freq_thres_div3r) { -+ M = M / 3; -+ MUL = 6; -+ tmp = 2; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > cali_freq_thres_div3) { -+ M = M / 3; -+ MUL = 6; -+ tmp = 2; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > 304000) { -+ M = M / 4; -+ MUL = 8; -+ tmp = 3; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 2)) { -+ M = M / 4; -+ MUL = 8; -+ tmp = 4; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 2)) { -+ M = M / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 2)) { -+ M = M / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 4)) { -+ M = M / 4; -+ MUL = 16; -+ tmp = 5; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 4)) { -+ M = M / 3; -+ MUL = 24; -+ tmp = 5; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 4)) { -+ M = M / 3; -+ MUL = 24; -+ tmp = 5; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 8)) { -+ M = M / 4; -+ MUL = 32; -+ tmp = 6; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 8)) { -+ M = M / 3; -+ MUL = 48; -+ tmp = 6; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 8)) { -+ M = M / 3; -+ MUL = 48; -+ tmp = 6; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 16)) { -+ M = M / 4; -+ MUL = 64; -+ tmp = 7; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 16)) { -+ M = M / 3; -+ MUL = 96; -+ tmp = 7; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 16)) { -+ M = M / 3; -+ MUL = 96; -+ tmp = 7; -+ tmp2 = M; /*16*/ -+ }else { /* invalid */ -+ M = M / 4; -+ MUL = 0; -+ tmp = 0; -+ tmp2 = 48; -+ return 1; -+ } -+ -+ if (freq_KHz == 291000) { -+ M = state->tuner_crystal / 1000 / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M + 32; /*32*/ -+ } -+ /* -+ if (freq_KHz == 578000) { -+ M = state->tuner_crystal / 1000 / 4; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; //48 -+ } -+ */ -+ if (freq_KHz == 690000) { -+ M = state->tuner_crystal / 1000 / 3; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; /*48*/ -+ } -+ _mt_fe_tn_get_reg(state, 0x33, &buf); -+ buf &= 0xc0; -+ buf += tmp2; -+ _mt_fe_tn_set_reg(state, 0x33, buf); -+ }else { -+ return 1; -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf &= 0xf8; -+ buf += tmp; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ -+ N = (freq_KHz * MUL * M / crystal_KHz) / 2 * 2 - 256; -+ -+ buf = (N >> 8) & 0xcf; -+ if (state->tuner_mtt == 0xE1) { -+ buf |= 0x30; -+ } -+ _mt_fe_tn_set_reg(state, 0x34, buf); -+ -+ buf = N & 0xff; -+ _mt_fe_tn_set_reg(state, 0x35, buf); -+ -+ F = ((freq_KHz * MUL * M / (crystal_KHz / 1000) / 2) - (freq_KHz * MUL * M / crystal_KHz / 2 * 1000)) * 64 / 1000; -+ -+ buf = F & 0xff; -+ _mt_fe_tn_set_reg(state, 0x36, buf); -+ -+ if (F == 0) { -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x3d, 0xca); -+ }else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x3d, 0xfe); -+ } else { -+ return 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x3e, 0x9c); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x34); -+ } -+ -+ if (F > 0) { -+ if (state->tuner_mtt == 0xD1) { -+ if ((F == 32) || (F == 16) || (F == 48)) { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ } -+ }else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x7e); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ _mt_fe_tn_set_reg(state, 0x89, 0x84); -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf & 0x1f; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x02; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ }else { -+ return 1; -+ } -+ } -+ -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ if (state->tuner_mtt == 0xD1) { -+ msleep(5); -+ }else if (state->tuner_mtt == 0xE1) { -+ msleep(2); -+ }else { -+ return 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_PLL_freq_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf, buf1; -+ u32 freq_thres_div2_KHz, freq_thres_div3r_KHz, freq_thres_div3_KHz; -+ -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x32, 0xe1); -+ _mt_fe_tn_set_reg(state, 0x33, 0xa6); -+ _mt_fe_tn_set_reg(state, 0x37, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x38, 0x20); -+ _mt_fe_tn_set_reg(state, 0x39, 0x18); -+ _mt_fe_tn_set_reg(state, 0x40, 0x40); -+ -+ freq_thres_div2_KHz = 520000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); -+ -+ msleep(5); -+ _mt_fe_tn_get_reg(state, 0x3a, &buf); -+ buf1 = buf; -+ buf = buf & 0x03; -+ buf1 = buf1 & 0x01; -+ if ((buf1 == 0) || (buf == 3)) { -+ freq_thres_div2_KHz = 420000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); -+ msleep(5); -+ -+ _mt_fe_tn_get_reg(state, 0x3a, &buf); -+ buf = buf & 0x07; -+ if (buf == 5) { -+ freq_thres_div2_KHz = 520000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); -+ msleep(5); -+ } -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf & 0xdf; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x40, 0x0); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(5); -+ -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf >> 5; -+ if (buf < 5) { -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf | 0xa0; -+ buf = buf & 0xbf; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x02; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x37, &buf); -+ if (buf > 0x70) { -+ buf = 0x7f; -+ _mt_fe_tn_set_reg(state, 0x40, 0x40); -+ } -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ -+ -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ if (buf < 0x0f) { -+ buf = (buf & 0x0f) << 2; -+ buf = buf + 0x0f; -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ }else if (buf < 0x1f) { -+ buf= buf + 0x0f; -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf | 0x20) & 0xef; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ -+ }else if (state->tuner_mtt == 0xE1){ -+ freq_thres_div2_KHz = 580000; -+ freq_thres_div3r_KHz = 500000; -+ freq_thres_div3_KHz = 440000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, freq_thres_div3r_KHz, freq_thres_div3_KHz); -+ -+ msleep(3); -+ -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(3); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf & 0xdf; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(3); -+ -+ _mt_fe_tn_get_reg(state, 0x37, &buf); -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ /* -+ if ((freq_KHz == 802000) || (freq_KHz == 826000)) { -+ _mt_fe_tn_set_reg(state, 0x37, 0x5e); -+ } -+ */ -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xef) | 0x30; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(2); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ } else { -+ return 1; -+ } -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_BB_tc2800(struct m88dc2800_state *state) -+{ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_appendix_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf; -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { -+ if ((freq_KHz == 123000) || (freq_KHz == 147000) || (freq_KHz == 171000) -+ || (freq_KHz == 195000)) -+ _mt_fe_tn_set_reg(state, 0x20, 0x1b); -+ -+ if ((freq_KHz == 371000) || (freq_KHz == 419000) || (freq_KHz == 610000) -+ || (freq_KHz == 730000) || (freq_KHz == 754000) || (freq_KHz == 826000)) { -+ _mt_fe_tn_get_reg(state, 0x0d, &buf); -+ _mt_fe_tn_set_reg(state, 0x0d, (u8)(buf + 1)); -+ } -+ -+ if ((freq_KHz == 522000) || (freq_KHz == 578000) || (freq_KHz == 634000) -+ || (freq_KHz == 690000) || (freq_KHz == 834000)) { -+ _mt_fe_tn_get_reg(state, 0x0d, &buf); -+ _mt_fe_tn_set_reg(state, 0x0d, (u8)(buf - 1)); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x20, 0xfc); -+ -+ if ((freq_KHz == 123000) || (freq_KHz == 147000) || (freq_KHz == 171000) -+ || (freq_KHz == 195000) || (freq_KHz == 219000) || (freq_KHz == 267000) -+ || (freq_KHz == 291000) || (freq_KHz == 339000) || (freq_KHz == 387000) -+ || (freq_KHz == 435000) || (freq_KHz == 482000) || (freq_KHz == 530000) -+ || (freq_KHz == 722000) -+ || ((state->tuner_custom_cfg == 1) && (freq_KHz == 315000))) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x5c); -+ } -+ } -+ return 0; -+} -+ -+static int _mt_fe_tn_set_DAC_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf, tempnumber; -+ s32 N; -+ s32 f1f2number, f1, f2, delta1, Totalnum1; -+ s32 cntT, cntin, NCOI, z0, z1, z2, tmp; -+ u32 fc, fadc, fsd, f2d; -+ u32 FreqTrue108_Hz; -+ -+ s32 M = state->tuner_crystal / 4000; -+ -+/* const u8 bandwidth = state->tuner_bandwidth; */ -+ const u16 DAC_fre = 108; -+ const u32 crystal_KHz = state->tuner_crystal; -+ const u32 DACFreq_KHz = state->tuner_dac; -+ -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_get_reg(state, 0x33, &buf); -+ M = buf & 0x0f; -+ if (M == 0) -+ M = 6; -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x34, &buf); -+ N = buf & 0x07; -+ -+ _mt_fe_tn_get_reg(state, 0x35, &buf); -+ N = (N << 8) + buf; -+ -+ -+ buf = ((N + 256) * crystal_KHz / M / DAC_fre + 500) / 1000; -+ -+ if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_appendix_tc2800(state); -+ -+ if ((freq_KHz == 187000) || (freq_KHz == 195000) || (freq_KHz == 131000) -+ || (freq_KHz == 211000) || (freq_KHz == 219000) || (freq_KHz == 227000) -+ || (freq_KHz == 267000) || (freq_KHz == 299000) || (freq_KHz == 347000) -+ || (freq_KHz == 363000) || (freq_KHz == 395000) || (freq_KHz == 403000) -+ || (freq_KHz == 435000) || (freq_KHz == 482000) || (freq_KHz == 474000) -+ || (freq_KHz == 490000) || (freq_KHz == 610000) || (freq_KHz == 642000) -+ || (freq_KHz == 666000) || (freq_KHz == 722000) || (freq_KHz == 754000) -+ || (((freq_KHz == 379000) || (freq_KHz == 467000) || (freq_KHz == 762000)) -+ && (state->tuner_custom_cfg != 1))) { -+ buf = buf + 1; -+ } -+ -+ if ((freq_KHz == 123000) || (freq_KHz == 139000) || (freq_KHz == 147000) -+ || (freq_KHz == 171000) || (freq_KHz == 179000) || (freq_KHz == 203000) -+ || (freq_KHz == 235000) || (freq_KHz == 251000) || (freq_KHz == 259000) -+ || (freq_KHz == 283000) || (freq_KHz == 331000) || (freq_KHz == 363000) -+ || (freq_KHz == 371000) || (freq_KHz == 387000) || (freq_KHz == 411000) -+ || (freq_KHz == 427000) || (freq_KHz == 443000) || (freq_KHz == 451000) -+ || (freq_KHz == 459000) || (freq_KHz == 506000) || (freq_KHz == 514000) -+ || (freq_KHz == 538000) || (freq_KHz == 546000) || (freq_KHz == 554000) -+ || (freq_KHz == 562000) || (freq_KHz == 570000) || (freq_KHz == 578000) -+ || (freq_KHz == 602000) || (freq_KHz == 626000) || (freq_KHz == 658000) -+ || (freq_KHz == 690000) || (freq_KHz == 714000) || (freq_KHz == 746000) -+ || (freq_KHz == 522000) || (freq_KHz == 826000) || (freq_KHz == 155000) -+ || (freq_KHz == 530000) -+ || (((freq_KHz == 275000) || (freq_KHz == 355000)) && (state->tuner_custom_cfg != 1)) -+ || (((freq_KHz == 467000) || (freq_KHz == 762000) || (freq_KHz == 778000) -+ || (freq_KHz == 818000)) && (state->tuner_custom_cfg == 1))) { -+ buf = buf - 1; -+ } -+ } -+ -+ _mt_fe_tn_set_reg(state, 0x0e, buf); -+ _mt_fe_tn_set_reg(state, 0x0d, buf); -+ -+ f1f2number = (((DACFreq_KHz * M * buf) / crystal_KHz) << 16) / (N + 256) -+ + (((DACFreq_KHz * M * buf) % crystal_KHz) << 16) / ((N + 256) * crystal_KHz); -+ -+ -+ _mt_fe_tn_set_reg(state, 0xf1, (u8)((f1f2number & 0xff00) >> 8)); -+ _mt_fe_tn_set_reg(state, 0xf2, (u8)(f1f2number & 0x00ff)); -+ -+ FreqTrue108_Hz = (N + 256) * crystal_KHz / (M * buf) * 1000 + (((N + 256) * crystal_KHz) % (M * buf)) * 1000 / (M * buf); -+ -+ f1 = 4096; -+ fc = FreqTrue108_Hz; -+ fadc = fc / 4; -+ fsd = 27000000; -+ f2d = state->tuner_bandwidth * 1000 / 2 -150; -+ f2 = (fsd / 250) * f2d / ((fc + 500) / 1000); -+ delta1 = ((f1 - f2) << 15) / f2; -+ -+ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; -+ -+ cntT = f2; -+ cntin = Totalnum1; -+ NCOI = delta1; -+ -+ z0 = cntin; -+ z1 = cntT; -+ z2 = NCOI; -+ -+ tempnumber = (z0 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xc9, (u8)(tempnumber & 0x0f)); -+ tempnumber = (z0 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xca, tempnumber); -+ -+ tempnumber = (z1 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xcb, tempnumber); -+ tempnumber = (z1 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xcc, tempnumber); -+ -+ tempnumber = (z2 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xcd, tempnumber); -+ tempnumber = (z2 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xce, tempnumber); -+ -+ tmp = f1; -+ f1 = f2; -+ f2 = tmp / 2; -+ delta1 = ((f1 - f2) << 15) / f2; -+ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; -+ NCOI = (f1 << 15) / f2 - (1 << 15); -+ cntT = f2; -+ cntin = Totalnum1; -+ z0 = cntin; -+ z1 = cntT; -+ z2 = NCOI; -+ -+ tempnumber = (z0 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xd9, (u8)(tempnumber & 0x0f)); -+ tempnumber = (z0 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xda, tempnumber); -+ -+ tempnumber = (z1 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xdb, tempnumber); -+ tempnumber = (z1 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xdc, tempnumber); -+ -+ tempnumber = (z2 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xdd, tempnumber); -+ tempnumber = (z2 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xde, tempnumber); -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_preset_tc2800(struct m88dc2800_state *state) -+{ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x19, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x1b, 0x4b); -+ -+ _mt_fe_tn_set_reg(state, 0x04, 0x04); -+ _mt_fe_tn_set_reg(state, 0x17, 0x0d); -+ _mt_fe_tn_set_reg(state, 0x62, 0x6c); -+ _mt_fe_tn_set_reg(state, 0x63, 0xf4); -+ _mt_fe_tn_set_reg(state, 0x1f, 0x0e); -+ _mt_fe_tn_set_reg(state, 0x6b, 0xf4); -+ _mt_fe_tn_set_reg(state, 0x14, 0x01); -+ _mt_fe_tn_set_reg(state, 0x5a, 0x75); -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x72, 0xe0); -+ _mt_fe_tn_set_reg(state, 0x70, 0x07); -+ _mt_fe_tn_set_reg(state, 0x15, 0x7b); -+ _mt_fe_tn_set_reg(state, 0x55, 0x71); -+ -+ _mt_fe_tn_set_reg(state, 0x75, 0x55); -+ _mt_fe_tn_set_reg(state, 0x76, 0xac); -+ _mt_fe_tn_set_reg(state, 0x77, 0x6c); -+ _mt_fe_tn_set_reg(state, 0x78, 0x8b); -+ _mt_fe_tn_set_reg(state, 0x79, 0x42); -+ _mt_fe_tn_set_reg(state, 0x7a, 0xd2); -+ -+ _mt_fe_tn_set_reg(state, 0x81, 0x01); -+ _mt_fe_tn_set_reg(state, 0x82, 0x00); -+ _mt_fe_tn_set_reg(state, 0x82, 0x02); -+ _mt_fe_tn_set_reg(state, 0x82, 0x04); -+ _mt_fe_tn_set_reg(state, 0x82, 0x06); -+ _mt_fe_tn_set_reg(state, 0x82, 0x08); -+ _mt_fe_tn_set_reg(state, 0x82, 0x09); -+ _mt_fe_tn_set_reg(state, 0x82, 0x29); -+ _mt_fe_tn_set_reg(state, 0x82, 0x49); -+ _mt_fe_tn_set_reg(state, 0x82, 0x58); -+ _mt_fe_tn_set_reg(state, 0x82, 0x59); -+ _mt_fe_tn_set_reg(state, 0x82, 0x98); -+ _mt_fe_tn_set_reg(state, 0x82, 0x99); -+ -+ -+ _mt_fe_tn_set_reg(state, 0x10, 0x05); -+ _mt_fe_tn_set_reg(state, 0x10, 0x0d); -+ _mt_fe_tn_set_reg(state, 0x11, 0x95); -+ _mt_fe_tn_set_reg(state, 0x11, 0x9d); -+ -+ -+ if (state->tuner_loopthrough != 0) { -+ _mt_fe_tn_set_reg(state, 0x67, 0x25); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x67, 0x05); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x1b, 0x47); -+ if(state->tuner_mode == 0) // DVB-C -+ { -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x62, 0x2c); -+ _mt_fe_tn_set_reg(state, 0x63, 0x54); -+ _mt_fe_tn_set_reg(state, 0x68, 0x0b); -+ _mt_fe_tn_set_reg(state, 0x14, 0x00); -+ } -+ else // CTTB -+ { -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x62, 0x0c); -+ _mt_fe_tn_set_reg(state, 0x63, 0x54); -+ _mt_fe_tn_set_reg(state, 0x68, 0x0b); -+ _mt_fe_tn_set_reg(state, 0x14, 0x05); -+ } -+ _mt_fe_tn_set_reg(state, 0x6f, 0x00); -+ _mt_fe_tn_set_reg(state, 0x84, 0x04); -+ _mt_fe_tn_set_reg(state, 0x5e, 0xbe); -+ _mt_fe_tn_set_reg(state, 0x87, 0x07); -+ _mt_fe_tn_set_reg(state, 0x8a, 0x1f); -+ _mt_fe_tn_set_reg(state, 0x8b, 0x1f); -+ _mt_fe_tn_set_reg(state, 0x88, 0x30); -+ _mt_fe_tn_set_reg(state, 0x58, 0x34); -+ _mt_fe_tn_set_reg(state, 0x61, 0x8c); -+ _mt_fe_tn_set_reg(state, 0x6a, 0x42); -+ } -+ return 0; -+} -+ -+static int mt_fe_tn_wakeup_tc2800(struct m88dc2800_state *state) -+{ -+ _mt_fe_tn_set_reg(state, 0x16, 0xb1); -+ _mt_fe_tn_set_reg(state, 0x09, 0x7d); -+ return 0; -+} -+ -+ -+static int mt_fe_tn_sleep_tc2800(struct m88dc2800_state *state) -+{ -+ _mt_fe_tn_set_reg(state, 0x16, 0xb0); -+ _mt_fe_tn_set_reg(state, 0x09, 0x6d); -+ return 0; -+} -+ -+static int mt_fe_tn_init_tc2800(struct m88dc2800_state *state) -+{ -+ if (state->tuner_init_OK != 1) { -+ state->tuner_dev_addr = 0x61; /* TUNER_I2C_ADDR_TC2800 */ -+ state->tuner_freq = 650000; -+ state->tuner_qam = 0; -+ state->tuner_mode = 0; // 0: DVB-C, 1: CTTB -+ -+ state->tuner_bandwidth = 8; -+ state->tuner_loopthrough = 0; -+ state->tuner_crystal = 24000; -+ state->tuner_dac = 7200; -+ state->tuner_mtt = 0x00; -+ state->tuner_custom_cfg = 0; -+ state->tuner_version = 30022; /* Driver version number */ -+ state->tuner_time = 12092611; -+ state->tuner_init_OK = 1; -+ } -+ -+ _mt_fe_tn_set_reg(state, 0x2b, 0x46); -+ _mt_fe_tn_set_reg(state, 0x2c, 0x75); -+ -+ if (state->tuner_mtt == 0x00) { -+ u8 tmp = 0; -+ _mt_fe_tn_get_reg(state, 0x01, &tmp); -+ printk("m88dc2800: tuner id = 0x%02x ", tmp); -+ switch(tmp) { -+ case 0x0d: -+ state->tuner_mtt = 0xD1; -+ break; -+ case 0x8e: -+ default: -+ state->tuner_mtt = 0xE1; -+ break; -+ } -+ } -+ return 0; -+} -+ -+static int mt_fe_tn_set_freq_tc2800(struct m88dc2800_state *state, u32 freq_KHz) -+{ -+ u8 buf; -+ u8 buf1; -+ -+ mt_fe_tn_init_tc2800(state); -+ -+ state->tuner_freq = freq_KHz; -+ -+ if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x21, 0xb9); -+ else -+ _mt_fe_tn_set_reg(state, 0x21, 0x99); -+ -+ mt_fe_tn_wakeup_tc2800(state); -+ -+ _mt_fe_tn_set_reg(state, 0x05, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x06, 0xf8); -+ -+ _mt_fe_tn_set_RF_front_tc2800(state); -+ _mt_fe_tn_set_PLL_freq_tc2800(state); -+ _mt_fe_tn_set_DAC_tc2800(state); -+ _mt_fe_tn_set_BB_tc2800(state); -+ _mt_fe_tn_preset_tc2800(state); -+ -+ _mt_fe_tn_set_reg(state, 0x05, 0x00); -+ _mt_fe_tn_set_reg(state, 0x06, 0x00); -+ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x00, 0x01); -+ _mt_fe_tn_set_reg(state, 0x00, 0x00); -+ -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ -+ _mt_fe_tn_get_reg(state, 0x69, &buf1); -+ buf1 = buf1 & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x61, &buf); -+ buf = buf & 0x0f; -+ if (buf == 0x0c) -+ { -+ _mt_fe_tn_set_reg(state, 0x6a, 0x59); -+ } -+ -+ if(buf1 > 0x02) -+ { -+ if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x66, 0x44); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x66, 0x64); -+ else -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ } -+ -+ if (buf1 < 0x03) -+ { -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x64); -+ else if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ -+ msleep(5); -+ } -+ else if (buf < 0x0c) -+ { -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else if (freq_KHz >600000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x34); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ -+ msleep(5); -+ } -+ } else if ((state->tuner_mtt == 0xE1)) { -+ _mt_fe_tn_set_reg(state, 0x00, 0x01); -+ _mt_fe_tn_set_reg(state, 0x00, 0x00); -+ -+ msleep(20); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xef) | 0x28; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ msleep(50); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xf7)| 0x10 ; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ msleep(10); -+ -+ _mt_fe_tn_get_reg(state, 0x69, &buf); -+ buf = buf & 0x03; -+ _mt_fe_tn_set_reg(state, 0x2a, buf); -+ -+ if(buf > 0) -+ { -+ msleep(20); -+ _mt_fe_tn_get_reg(state, 0x84, &buf); -+ buf = buf & 0x1f; -+ _mt_fe_tn_set_reg(state, 0x68, 0x0a); -+ _mt_fe_tn_get_reg(state, 0x88, &buf1); -+ buf1 = buf1 & 0x1f; -+ if(buf <= buf1) -+ _mt_fe_tn_set_reg(state, 0x66, 0x44); -+ else -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ } -+ else -+ { -+ if (freq_KHz <= 600000) -+ { -+ _mt_fe_tn_set_reg(state, 0x68, 0x0c); -+ } -+ else -+ { -+ _mt_fe_tn_set_reg(state, 0x68, 0x0e); -+ } -+ _mt_fe_tn_set_reg(state, 0x30, 0xfb); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x04); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ } -+ if(state->tuner_loopthrough != 0) { -+ _mt_fe_tn_get_reg(state, 0x28, &buf); -+ if (buf == 0) { -+ _mt_fe_tn_set_reg(state, 0x28, 0xff); -+ _mt_fe_tn_get_reg(state, 0x61, &buf); -+ buf = buf & 0x0f; -+ if(buf > 9) -+ _mt_fe_tn_set_reg(state, 0x67, 0x74); -+ else if (buf >6) -+ _mt_fe_tn_set_reg(state, 0x67, 0x64); -+ else if (buf >3) -+ _mt_fe_tn_set_reg(state, 0x67, 0x54); -+ else -+ _mt_fe_tn_set_reg(state, 0x67, 0x44); -+ } -+ } else { -+ _mt_fe_tn_set_reg(state, 0x67, 0x34); -+ } -+ } else { -+ return 1; -+ } -+ return 0; -+} -+ -+/* -+static int mt_fe_tn_set_BB_filter_band_tc2800(struct m88dc2800_state *state, u8 bandwidth) -+{ -+ u8 buf, tmp; -+ -+ _mt_fe_tn_get_reg(state, 0x53, &tmp); -+ -+ if (bandwidth == 6) -+ buf = 0x01 << 1; -+ else if (bandwidth == 7) -+ buf = 0x02 << 1; -+ else if (bandwidth == 8) -+ buf = 0x04 << 1; -+ else -+ buf = 0x04 << 1; -+ -+ tmp &= 0xf1; -+ tmp |= buf; -+ _mt_fe_tn_set_reg(state, 0x53, tmp); -+ state->tuner_bandwidth = bandwidth; -+ return 0; -+} -+*/ -+ -+/*static s64 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state *state)*/ -+static s32 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state *state) -+{ -+ /*s64 level = -107;*/ -+ s32 level = -107; -+ s32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; -+ s32 val1, val2, val; -+ s32 result2, result3, result4, result5, result6; -+ s32 append; -+ u8 tmp; -+ s32 freq_KHz = (s32)state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_get_reg(state, 0x61, &tmp); -+ tmp1 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x69, &tmp); -+ tmp2 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x73, &tmp); -+ tmp3 = tmp & 0x07; -+ -+ _mt_fe_tn_get_reg(state, 0x7c, &tmp); -+ tmp4 = (tmp >> 4) & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7b, &tmp); -+ tmp5 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7f, &tmp); -+ tmp6 = (tmp >> 5) & 0x01; -+ -+ if (tmp1 > 6) { -+ val1 = 0; -+ if (freq_KHz <= 200000) { -+ val2 = (tmp1 - 6) * 267; -+ } else if (freq_KHz <= 600000) { -+ val2 = (tmp1 - 6) * 280; -+ } else { -+ val2 = (tmp1 - 6) * 290; -+ } -+ val = val1 + val2; -+ } else { -+ if (tmp1 == 0) { -+ val1 = -550; -+ } else { -+ val1 = 0; -+ } -+ if ((tmp1 < 4) && (freq_KHz >= 506000)) { -+ val1 = -850; -+ } -+ val2 = 0; -+ val = val1 + val2; -+ } -+ -+ if (freq_KHz <= 95000) { -+ result2 = tmp2 * 289; -+ } else if (freq_KHz <= 155000) { -+ result2 = tmp2 * 278; -+ } else if (freq_KHz <= 245000) { -+ result2 = tmp2 * 267; -+ } else if (freq_KHz <= 305000) { -+ result2 = tmp2 * 256; -+ } else if (freq_KHz <= 335000) { -+ result2 = tmp2 * 244; -+ } else if (freq_KHz <= 425000) { -+ result2 = tmp2 * 233; -+ } else if (freq_KHz <= 575000) { -+ result2 = tmp2 * 222; -+ } else if (freq_KHz <= 665000) { -+ result2 = tmp2 * 211; -+ } else { -+ result2 = tmp2 * 200; -+ } -+ result3 = (6 - tmp3) * 100; -+ result4 = 300 * tmp4; -+ result5 = 50 * tmp5; -+ result6 = 300 * tmp6; -+ if (freq_KHz < 105000) { -+ append = -450; -+ } else if (freq_KHz <= 227000) { -+ append = -4 * (freq_KHz / 1000 - 100) + 150; -+ } else if (freq_KHz <= 305000) { -+ append = -4 * (freq_KHz / 1000 - 100); -+ } else if (freq_KHz <= 419000) { -+ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17 + 130; -+ } else if (freq_KHz <= 640000) { -+ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17; -+ } else { -+ append = -500; -+ } -+ level = append - (val + result2 + result3 + result4 + result5 + result6); -+ level /= 100; -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_get_reg(state, 0x61, &tmp); -+ tmp1 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x84, &tmp); -+ tmp2 = tmp & 0x1f; -+ -+ _mt_fe_tn_get_reg(state, 0x69, &tmp); -+ tmp3 = tmp & 0x03; -+ -+ _mt_fe_tn_get_reg(state, 0x73, &tmp); -+ tmp4 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7c, &tmp); -+ tmp5 = (tmp >> 4) & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7b, &tmp); -+ tmp6 = tmp & 0x0f; -+ -+ if (freq_KHz < 151000) { -+ result2 = (1150 - freq_KHz / 100) * 163 / 33 + 4230; -+ result3 = (1150 - freq_KHz / 100) * 115 / 33 + 1850; -+ result4 = -3676 * (freq_KHz / 1000) / 100 + 6115; -+ } else if (freq_KHz < 257000) { -+ result2 = (1540 - freq_KHz / 100) * 11 / 4 + 3870; -+ result3 = (1540 - freq_KHz / 100) * 205 / 96 + 2100; -+ result4 = -21 * freq_KHz / 1000 + 5084; -+ } else if (freq_KHz < 305000) { -+ result2 = (2620 - freq_KHz / 100) * 5 / 3 + 2770; -+ result3 = (2620 - freq_KHz / 100) * 10 / 7 + 1700; -+ result4 = 650; -+ } else if (freq_KHz < 449000) { -+ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; -+ result3 = (3100 - freq_KHz / 100) * 5 / 3 + 10000; -+ result4 = 134 * freq_KHz / 10000 + 11875; -+ } else { -+ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; -+ result3 = 8400; -+ result4 = 5300; -+ } -+ -+ if (tmp1 > 6) { -+ val1 = result2; -+ val2 = 2900; -+ val = 500; -+ } else if (tmp1 > 0) { -+ val1 = result3; -+ val2 = 2700; -+ val = 500; -+ } else { -+ val1 = result4; -+ val2 = 2700; -+ val = 400; -+ } -+ level = val1 - (val2 * tmp1 + 500 * tmp2 + 3000 * tmp3 - 500 * tmp4 + 3000 * tmp5 + val * tmp6) - 1000; -+ level /= 1000; -+ } -+ return level; -+} -+ -+/* m88dc2800 operation functions */ -+u8 M88DC2000GetLock(struct m88dc2800_state *state) -+{ -+ u8 u8ret = 0; -+ -+ if (ReadReg(state, 0x80) < 0x06) { -+ if ((ReadReg(state, 0xdf)&0x80)==0x80 -+ && (ReadReg(state, 0x91)&0x23)==0x03 -+ && (ReadReg(state, 0x43)&0x08)==0x08) -+ u8ret = 1; -+ else -+ u8ret = 0; -+ } else { -+ if ((ReadReg(state, 0x85)&0x08)==0x08) -+ u8ret = 1; -+ else -+ u8ret = 0; -+ } -+ printk("%s, lock=%d\n", __func__,u8ret); -+ return u8ret; -+} -+ -+static int M88DC2000SetTsType(struct m88dc2800_state *state, u8 type) -+{ -+ u8 regC2H; -+ -+ if (type == 3) { -+ WriteReg(state, 0x84, 0x6A); -+ WriteReg(state, 0xC0, 0x43); -+ WriteReg(state, 0xE2, 0x06); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC0; -+ regC2H |= 0x1B; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x60); /* common interface */ -+ } else if (type == 1) { -+ WriteReg(state, 0x84, 0x6A); -+ WriteReg(state, 0xC0, 0x47); /* serial format */ -+ WriteReg(state, 0xE2, 0x02); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC7; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x00); -+ } else { -+ WriteReg(state, 0x84, 0x6C); -+ WriteReg(state, 0xC0, 0x43); /* parallel format */ -+ WriteReg(state, 0xE2, 0x06); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC7; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x00); -+ } -+ return 0; -+} -+ -+static int M88DC2000RegInitial_TC2800(struct m88dc2800_state *state) -+{ -+ u8 RegE3H, RegE4H; -+ -+ WriteReg(state, 0x00, 0x48); -+ WriteReg(state, 0x01, 0x09); -+ WriteReg(state, 0xFB, 0x0A); -+ WriteReg(state, 0xFC, 0x0B); -+ WriteReg(state, 0x02, 0x0B); -+ WriteReg(state, 0x03, 0x18); -+ WriteReg(state, 0x05, 0x0D); -+ WriteReg(state, 0x36, 0x80); -+ WriteReg(state, 0x43, 0x40); -+ WriteReg(state, 0x55, 0x7A); -+ WriteReg(state, 0x56, 0xD9); -+ WriteReg(state, 0x57, 0xDF); -+ WriteReg(state, 0x58, 0x39); -+ WriteReg(state, 0x5A, 0x00); -+ WriteReg(state, 0x5C, 0x71); -+ WriteReg(state, 0x5D, 0x23); -+ WriteReg(state, 0x86, 0x40); -+ WriteReg(state, 0xF9, 0x08); -+ WriteReg(state, 0x61, 0x40); -+ WriteReg(state, 0x62, 0x0A); -+ WriteReg(state, 0x90, 0x06); -+ WriteReg(state, 0xDE, 0x00); -+ WriteReg(state, 0xA0, 0x03); -+ WriteReg(state, 0xDF, 0x81); -+ WriteReg(state, 0xFA, 0x40); -+ WriteReg(state, 0x37, 0x10); -+ WriteReg(state, 0xF0, 0x40); -+ WriteReg(state, 0xF2, 0x9C); -+ WriteReg(state, 0xF3, 0x40); -+ -+ RegE3H = ReadReg(state, 0xE3); -+ RegE4H = ReadReg(state, 0xE4); -+ if (((RegE3H & 0xC0) == 0x00) && ((RegE4H & 0xC0) == 0x00)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x40, 0x00); -+ WriteReg(state, 0x41, 0x10); -+ WriteReg(state, 0xF1, 0x02); -+ WriteReg(state, 0xF4, 0x04); -+ WriteReg(state, 0xF5, 0x00); -+ WriteReg(state, 0x42, 0x14); -+ WriteReg(state, 0xE1, 0x25); -+ } else if (((RegE3H & 0xC0) == 0x80) && ((RegE4H & 0xC0) == 0x40)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0x40, 0x00); -+ WriteReg(state, 0x41, 0x10); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x14); -+ WriteReg(state, 0xE1, 0x25); -+ } else if ((RegE3H == 0x80 || RegE3H == 0x81) && (RegE4H == 0x80 || RegE4H == 0x81)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x24); -+ WriteReg(state, 0xE1, 0x25); -+ -+ WriteReg(state, 0x92, 0x7F); -+ WriteReg(state, 0x93, 0x91); -+ WriteReg(state, 0x95, 0x00); -+ WriteReg(state, 0x2B, 0x33); -+ WriteReg(state, 0x2A, 0x2A); -+ WriteReg(state, 0x2E, 0x80); -+ WriteReg(state, 0x25, 0x25); -+ WriteReg(state, 0x2D, 0xFF); -+ WriteReg(state, 0x26, 0xFF); -+ WriteReg(state, 0x27, 0x00); -+ WriteReg(state, 0x24, 0x25); -+ WriteReg(state, 0xA4, 0xFF); -+ WriteReg(state, 0xA3, 0x0D); -+ } else { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x24); -+ WriteReg(state, 0xE1, 0x27); -+ -+ WriteReg(state, 0x92, 0x7F); -+ WriteReg(state, 0x93, 0x91); -+ WriteReg(state, 0x95, 0x00); -+ WriteReg(state, 0x2B, 0x33); -+ WriteReg(state, 0x2A, 0x2A); -+ WriteReg(state, 0x2E, 0x80); -+ WriteReg(state, 0x25, 0x25); -+ WriteReg(state, 0x2D, 0xFF); -+ WriteReg(state, 0x26, 0xFF); -+ WriteReg(state, 0x27, 0x00); -+ WriteReg(state, 0x24, 0x25); -+ WriteReg(state, 0xA4, 0xFF); -+ WriteReg(state, 0xA3, 0x10); -+ } -+ -+ WriteReg(state, 0xF6, 0x4E); -+ WriteReg(state, 0xF7, 0x20); -+ WriteReg(state, 0x89, 0x02); -+ WriteReg(state, 0x14, 0x08); -+ WriteReg(state, 0x6F, 0x0D); -+ WriteReg(state, 0x10, 0xFF); -+ WriteReg(state, 0x11, 0x00); -+ WriteReg(state, 0x12, 0x30); -+ WriteReg(state, 0x13, 0x23); -+ WriteReg(state, 0x60, 0x00); -+ WriteReg(state, 0x69, 0x00); -+ WriteReg(state, 0x6A, 0x03); -+ WriteReg(state, 0xE0, 0x75); -+ WriteReg(state, 0x8D, 0x29); -+ WriteReg(state, 0x4E, 0xD8); -+ WriteReg(state, 0x88, 0x80); -+ WriteReg(state, 0x52, 0x79); -+ WriteReg(state, 0x53, 0x03); -+ WriteReg(state, 0x59, 0x30); -+ WriteReg(state, 0x5E, 0x02); -+ WriteReg(state, 0x5F, 0x0F); -+ WriteReg(state, 0x71, 0x03); -+ WriteReg(state, 0x72, 0x12); -+ WriteReg(state, 0x73, 0x12); -+ -+ return 0; -+} -+ -+static int M88DC2000AutoTSClock_P(struct m88dc2800_state *state, u32 sym, u16 qam) -+{ -+ u32 dataRate; -+ u8 clk_div, value; -+ printk("m88dc2800: M88DC2000AutoTSClock_P, symrate=%d qam=%d\n",sym,qam); -+ switch(qam) -+ { -+ case 16: -+ dataRate = 4; -+ break; -+ case 32: -+ dataRate = 5; -+ break; -+ case 128: -+ dataRate = 7; -+ break; -+ case 256: -+ dataRate = 8; -+ break; -+ case 64: -+ default: -+ dataRate = 6; -+ break; -+ } -+ dataRate *= sym * 105; -+ dataRate /= 800; -+ -+ if(dataRate <= 4115) -+ clk_div = 0x05; -+ else if(dataRate <= 4800) -+ clk_div = 0x04; -+ else if(dataRate <= 5760) -+ clk_div = 0x03; -+ else if(dataRate <= 7200) -+ clk_div = 0x02; -+ else if(dataRate <= 9600) -+ clk_div = 0x01; -+ else -+ clk_div = 0x00; -+ -+ value = ReadReg(state, 0xC2); -+ value &= 0xc0; -+ value |= clk_div; -+ WriteReg(state, 0xC2, value); -+ return 0; -+} -+ -+static int M88DC2000AutoTSClock_C(struct m88dc2800_state *state, u32 sym, u16 qam) -+{ -+ u32 dataRate; -+ u8 clk_div, value; -+ printk("m88dc2800: M88DC2000AutoTSClock_C, symrate=%d qam=%d\n",sym,qam); -+ switch(qam) -+ { -+ case 16: -+ dataRate = 4; -+ break; -+ case 32: -+ dataRate = 5; -+ break; -+ case 128: -+ dataRate = 7; -+ break; -+ case 256: -+ dataRate = 8; -+ break; -+ case 64: -+ default: -+ dataRate = 6; -+ break; -+ } -+ dataRate *= sym * 105; -+ dataRate /= 800; -+ -+ if(dataRate <= 4115) -+ clk_div = 0x3F; -+ else if(dataRate <= 4800) -+ clk_div = 0x36; -+ else if(dataRate <= 5760) -+ clk_div = 0x2D; -+ else if(dataRate <= 7200) -+ clk_div = 0x24; -+ else if(dataRate <= 9600) -+ clk_div = 0x1B; -+ else -+ clk_div = 0x12; -+ -+ value = ReadReg(state, 0xC2); -+ value &= 0xc0; -+ value |= clk_div; -+ WriteReg(state, 0xC2, value); -+ return 0; -+} -+ -+static int M88DC2000SetTxMode(struct m88dc2800_state *state, u8 inverted, u8 j83) -+{ -+ u8 value = 0; -+ if (inverted) -+ value |= 0x08; /* spectrum inverted */ -+ if (j83) -+ value |= 0x01; /* J83C */ -+ WriteReg(state, 0x83, value); -+ return 0; -+} -+ -+static int M88DC2000SoftReset(struct m88dc2800_state *state) -+{ -+ WriteReg(state, 0x80, 0x01); -+ WriteReg(state, 0x82, 0x00); -+ msleep(1); -+ WriteReg(state, 0x80, 0x00); -+ return 0; -+} -+ -+static int M88DC2000SetSym(struct m88dc2800_state *state, u32 sym, u32 xtal) -+{ -+ u8 value; -+ u8 reg6FH, reg12H; -+ u64 fValue; -+ u32 dwValue; -+ printk("%s, sym=%d, xtal=%d\n", __func__, sym, xtal); -+ -+ fValue = 4294967296 * (sym + 10); -+ do_div(fValue, xtal); -+/* fValue = 4294967296 * (sym + 10) / xtal; */ -+ -+ dwValue = (u32)fValue; -+ printk("%s, fvalue1=%x\n", __func__, dwValue); -+ -+ WriteReg(state, 0x58, (u8)((dwValue >> 24) & 0xff)); -+ WriteReg(state, 0x57, (u8)((dwValue >> 16) & 0xff)); -+ WriteReg(state, 0x56, (u8)((dwValue >> 8) & 0xff)); -+ WriteReg(state, 0x55, (u8)((dwValue >> 0) & 0xff)); -+ -+/* fValue = 2048 * xtal / sym; */ -+ fValue = 2048 * xtal; -+ do_div(fValue, sym); -+ -+ dwValue = (u32)fValue; -+ printk("%s, fvalue2=%x\n", __func__, dwValue); -+ WriteReg(state, 0x5D, (u8)((dwValue >> 8) & 0xff)); -+ WriteReg(state, 0x5C, (u8)((dwValue >> 0) & 0xff)); -+ -+ value = ReadReg(state, 0x5A); -+ if (((dwValue >> 16) & 0x0001) == 0) -+ value &= 0x7F; -+ else -+ value |= 0x80; -+ WriteReg(state, 0x5A, value); -+ -+ value = ReadReg(state, 0x89); -+ if (sym <= 1800) -+ value |= 0x01; -+ else -+ value &= 0xFE; -+ WriteReg(state, 0x89, value); -+ -+ if (sym >= 6700){ -+ reg6FH = 0x0D; -+ reg12H = 0x30; -+ } else if (sym >= 4000) { -+ fValue = 22 * 4096 / sym; -+ reg6FH = (u8)fValue; -+ reg12H = 0x30; -+ } else if (sym >= 2000) { -+ fValue = 14 * 4096 / sym; -+ reg6FH = (u8)fValue; -+ reg12H = 0x20; -+ } else { -+ fValue = 7 * 4096 / sym; -+ reg6FH = (u8)fValue; -+ reg12H = 0x10; -+ } -+ WriteReg(state, 0x6F, reg6FH); -+ WriteReg(state, 0x12, reg12H); -+ -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ if(sym < 3000) { -+ WriteReg(state, 0x6C, 0x16); -+ WriteReg(state, 0x6D, 0x10); -+ WriteReg(state, 0x6E, 0x18); -+ } else { -+ WriteReg(state, 0x6C, 0x14); -+ WriteReg(state, 0x6D, 0x0E); -+ WriteReg(state, 0x6E, 0x36); -+ } -+ } else { -+ WriteReg(state, 0x6C, 0x16); -+ WriteReg(state, 0x6D, 0x10); -+ WriteReg(state, 0x6E, 0x18); -+ } -+ return 0; -+} -+ -+static int M88DC2000SetQAM(struct m88dc2800_state *state, u16 qam) -+{ -+ u8 reg00H, reg4AH, regC2H, reg44H, reg4CH, reg4DH, reg74H, value; -+ u8 reg8BH, reg8EH; -+ printk("%s, qam=%d\n", __func__, qam); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xF8; -+ switch(qam){ -+ case 16: /* 16 QAM */ -+ reg00H = 0x08; -+ reg4AH = 0x0F; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ WriteReg(state, 0x6E, 0x18); -+ break; -+ case 32: /* 32 QAM */ -+ reg00H = 0x18; -+ reg4AH = 0xFB; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ WriteReg(state, 0x6E, 0x18); -+ break; -+ case 64: /* 64 QAM */ -+ reg00H = 0x48; -+ reg4AH = 0xCD; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ break; -+ case 128: /* 128 QAM */ -+ reg00H = 0x28; -+ reg4AH = 0xFF; -+ regC2H |= 0x02; -+ reg44H = 0xA9; -+ reg4CH = 0x08; -+ reg4DH = 0xF5; -+ reg74H = 0x0E; -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ break; -+ case 256: /* 256 QAM */ -+ reg00H = 0x38; -+ reg4AH = 0xCD; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ regC2H |= 0x02; -+ } else { -+ regC2H |= 0x01; -+ } -+ reg44H = 0xA9; -+ reg4CH = 0x08; -+ reg4DH = 0xF5; -+ reg74H = 0x0E; -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ break; -+ default: /* 64 QAM */ -+ reg00H = 0x48; -+ reg4AH = 0xCD; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ break; -+ } -+ WriteReg(state, 0x00, reg00H); -+ -+ value = ReadReg(state, 0x88); -+ value |= 0x08; -+ WriteReg(state, 0x88, value); -+ WriteReg(state, 0x4B, 0xFF); -+ WriteReg(state, 0x4A, reg4AH); -+ value &= 0xF7; -+ WriteReg(state, 0x88, value); -+ -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0x44, reg44H); -+ WriteReg(state, 0x4C, reg4CH); -+ WriteReg(state, 0x4D, reg4DH); -+ WriteReg(state, 0x74, reg74H); -+ WriteReg(state, 0x8B, reg8BH); -+ WriteReg(state, 0x8E, reg8EH); -+ return 0; -+} -+ -+static int M88DC2000WriteTuner_TC2800(struct m88dc2800_state *state, u32 freq_KHz) -+{ -+ printk("%s, freq=%d KHz\n", __func__, freq_KHz); -+ return mt_fe_tn_set_freq_tc2800(state, freq_KHz); -+} -+ -+static int m88dc2800_init(struct dvb_frontend *fe) -+{ -+ dprintk("%s()\n", __func__); -+ return 0; -+} -+ -+static int m88dc2800_set_parameters(struct dvb_frontend *fe) -+{ -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ u8 is_annex_c, is_update; -+ u16 temp_qam; -+ s32 waiting_time; -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ -+ if(c->delivery_system == SYS_DVBC_ANNEX_C) -+ is_annex_c = 1; -+ else -+ is_annex_c = 0; -+ -+ switch (c->modulation) { -+ case QAM_16: -+ temp_qam = 16; -+ break; -+ case QAM_32: -+ temp_qam = 32; -+ break; -+ case QAM_128: -+ temp_qam = 128; -+ break; -+ case QAM_256: -+ temp_qam = 256; -+ break; -+ default: /* QAM_64 */ -+ temp_qam = 64; -+ break; -+ } -+ -+ if(c->inversion == INVERSION_ON) -+ state->inverted = 1; -+ else -+ state->inverted = 0; -+ -+ printk("m88dc2800: state, freq=%d qam=%d sym=%d inverted=%d xtal=%d\n", state->freq,state->qam,state->sym,state->inverted,state->xtal); -+ printk("m88dc2800: set frequency to %d qam=%d symrate=%d annex-c=%d\n", c->frequency,temp_qam,c->symbol_rate,is_annex_c); -+ -+ is_update = 0; -+ WriteReg(state, 0x80, 0x01); -+ if(c->frequency != state->freq){ -+ M88DC2000WriteTuner_TC2800(state, c->frequency/1000); -+ state->freq = c->frequency; -+ } -+ if(c->symbol_rate != state->sym){ -+ M88DC2000SetSym(state, c->symbol_rate/1000, state->xtal); -+ state->sym = c->symbol_rate; -+ is_update = 1; -+ } -+ if(temp_qam != state->qam){ -+ M88DC2000SetQAM(state, temp_qam); -+ state->qam = temp_qam; -+ is_update = 1; -+ } -+ -+ if(is_update != 0){ -+ if(state->config->ts_mode == 3) -+ M88DC2000AutoTSClock_C(state, state->sym/1000, temp_qam); -+ else -+ M88DC2000AutoTSClock_P(state, state->sym/1000, temp_qam); -+ } -+ -+ M88DC2000SetTxMode(state, state->inverted, is_annex_c); -+ M88DC2000SoftReset(state); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) -+ waiting_time = 800; -+ else -+ waiting_time = 500; -+ while (waiting_time > 0) { -+ msleep(50); -+ waiting_time -= 50; -+ if (M88DC2000GetLock(state)) -+ return 0; -+ } -+ -+ if (state->inverted != 0) -+ state->inverted = 0; -+ else -+ state->inverted = 1; -+ M88DC2000SetTxMode(state, state->inverted, is_annex_c); -+ M88DC2000SoftReset(state); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) -+ waiting_time = 800; -+ else -+ waiting_time = 500; -+ while (waiting_time > 0) { -+ msleep(50); -+ waiting_time -= 50; -+ if (M88DC2000GetLock(state)) -+ return 0; -+ } -+ return 0; -+} -+ -+static int m88dc2800_read_status(struct dvb_frontend* fe, fe_status_t* status) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ *status = 0; -+ -+ if (M88DC2000GetLock(state)) { -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ | FE_HAS_SYNC|FE_HAS_VITERBI | FE_HAS_LOCK; -+ } -+ return 0; -+} -+ -+static int m88dc2800_read_ber(struct dvb_frontend* fe, u32* ber) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ u16 tmp; -+ -+ if (M88DC2000GetLock(state) == 0) { -+ state->ber = 0; -+ } else if ((ReadReg(state, 0xA0) & 0x80) != 0x80) { -+ tmp = ReadReg(state, 0xA2) << 8; -+ tmp += ReadReg(state, 0xA1); -+ state->ber = tmp; -+ WriteReg(state, 0xA0, 0x05); -+ WriteReg(state, 0xA0, 0x85); -+ } -+ *ber = state->ber; -+ return 0; -+} -+ -+static int m88dc2800_read_signal_strength(struct dvb_frontend* fe, u16* strength) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ -+ s16 tuner_strength; -+ tuner_strength = (s16)mt_fe_tn_get_signal_strength_tc2800(state); -+ -+ if(tuner_strength < -107) -+ *strength = 0; -+ else -+ *strength = tuner_strength + 107; -+ -+ return 0; -+} -+ -+static int m88dc2800_read_snr(struct dvb_frontend* fe, u16* snr) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ -+ const u32 mes_log[] = { -+ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, -+ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, 13010, -+ 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, 14624, 14771, -+ 14914, 15052, 15185, 15315, 15441, 15563, 15682, 15798, 15911, 16021, -+ 16128, 16232, 16335, 16435, 16532, 16628, 16721, 16812, 16902, 16990, -+ 17076, 17160, 17243, 17324, 17404, 17482, 17559, 17634, 17709, 17782, -+ 17853, 17924, 17993, 18062, 18129, 18195, 18261, 18325, 18388, 18451, -+ 18513, 18573, 18633, 18692, 18751, 18808, 18865, 18921, 18976, 19031 -+ }; -+ u8 i; -+ u32 _snr, mse; -+ -+ if ((ReadReg(state, 0x91)&0x23)!=0x03) { -+ *snr = 0; -+ return 0; -+ } -+ -+ mse = 0; -+ for (i=0; i<30; i++) { -+ mse += (ReadReg(state, 0x08) << 8) + ReadReg(state, 0x07); -+ } -+ mse /= 30; -+ if (mse > 80) -+ mse = 80; -+ -+ switch (state->qam) { -+ case 16: _snr = 34080; break; /* 16QAM */ -+ case 32: _snr = 37600; break; /* 32QAM */ -+ case 64: _snr = 40310; break; /* 64QAM */ -+ case 128: _snr = 43720; break; /* 128QAM */ -+ case 256: _snr = 46390; break; /* 256QAM */ -+ default: _snr = 40310; break; -+ } -+ _snr -= mes_log[mse-1]; /* C - 10*log10(MSE) */ -+ _snr /= 1000; -+ if (_snr > 0xff) -+ _snr = 0xff; -+ -+ *snr = _snr; -+ return 0; -+} -+ -+static int m88dc2800_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ u8 u8Value; -+ -+ u8Value = ReadReg(state, 0xdf); -+ u8Value |= 0x02; /* Hold */ -+ WriteReg(state, 0xdf, u8Value); -+ -+ *ucblocks = ReadReg(state, 0xd5); -+ *ucblocks = (*ucblocks << 8) | ReadReg(state, 0xd4); -+ -+ u8Value &= 0xfe; /* Clear */ -+ WriteReg(state, 0xdf, u8Value); -+ u8Value &= 0xfc; /* Update */ -+ u8Value |= 0x01; -+ WriteReg(state, 0xdf, u8Value); -+ -+ return 0; -+} -+ -+static int m88dc2800_sleep(struct dvb_frontend* fe) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ -+ mt_fe_tn_sleep_tc2800(state); -+ state->freq = 0; -+ -+ return 0; -+} -+ -+static void m88dc2800_release(struct dvb_frontend* fe) -+{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ kfree(state); -+} -+ -+static struct dvb_frontend_ops m88dc2800_ops; -+ -+struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, -+ struct i2c_adapter* i2c) -+{ -+ struct m88dc2800_state* state = NULL; -+ -+ /* allocate memory for the internal state */ -+ state = kzalloc(sizeof(struct m88dc2800_state), GFP_KERNEL); -+ if (state == NULL) goto error; -+ -+ /* setup the state */ -+ state->config = config; -+ state->i2c = i2c; -+ state->xtal = 28800; -+ -+ WriteReg(state, 0x80, 0x01); -+ M88DC2000RegInitial_TC2800(state); -+ M88DC2000SetTsType(state, state->config->ts_mode); -+ mt_fe_tn_init_tc2800(state); -+ -+ /* create dvb_frontend */ -+ memcpy(&state->frontend.ops, &m88dc2800_ops, sizeof(struct dvb_frontend_ops)); -+ state->frontend.demodulator_priv = state; -+ return &state->frontend; -+ -+error: -+ kfree(state); -+ return NULL; -+} -+EXPORT_SYMBOL(m88dc2800_attach); -+ -+static struct dvb_frontend_ops m88dc2800_ops = { -+ .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C }, -+ .info = { -+ .name = "Montage M88DC2800 DVB-C", -+ .frequency_stepsize = 62500, -+ .frequency_min = 48000000, -+ .frequency_max = 870000000, -+ .symbol_rate_min = 870000, -+ .symbol_rate_max = 9000000, -+ .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | -+ FE_CAN_QAM_128 | FE_CAN_QAM_256 | -+ FE_CAN_FEC_AUTO -+ }, -+ -+ .release = m88dc2800_release, -+ .init = m88dc2800_init, -+ .sleep = m88dc2800_sleep, -+ .set_frontend = m88dc2800_set_parameters, -+ .read_status = m88dc2800_read_status, -+ .read_ber = m88dc2800_read_ber, -+ .read_signal_strength = m88dc2800_read_signal_strength, -+ .read_snr = m88dc2800_read_snr, -+ .read_ucblocks = m88dc2800_read_ucblocks, -+}; -+ -+MODULE_DESCRIPTION("Montage DVB-C demodulator driver"); -+MODULE_AUTHOR("Max nibble"); -+MODULE_LICENSE("GPL"); -diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontends/m88dc2800.h ---- a/drivers/media/dvb-frontends/m88dc2800.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88dc2800.h 2013-01-20 21:27:32.871422025 +0800 -@@ -0,0 +1,43 @@ -+/* -+ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage -+ -+ Copyright (C) 2012 Max nibble -+ Copyright (C) 2011 Montage Technology -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+*/ -+ -+#ifndef M88DC2800_H -+#define M88DC2800_H -+ -+#include -+ -+struct m88dc2800_config { -+ u8 demod_address; -+ u8 ts_mode; -+}; -+ -+#if defined(CONFIG_DVB_M88DC2800) || (defined(CONFIG_DVB_M88DC2800_MODULE) && defined(MODULE)) -+extern struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, -+ struct i2c_adapter* i2c); -+#else -+static inline struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, -+ struct i2c_adapter* i2c) -+{ -+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); -+ return NULL; -+} -+#endif // CONFIG_DVB_M88DC2800 -+#endif // M88DC2800_H -diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c ---- a/drivers/media/dvb-frontends/m88ds3103.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88ds3103.c 2013-01-20 21:27:37.415422145 +0800 -@@ -0,0 +1,1710 @@ -+/* -+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver -+ -+ Copyright (C) 2011 Max nibble -+ Copyright (C) 2010 Montage Technology -+ Copyright (C) 2009 Konstantin Dimitrov. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "dvb_frontend.h" -+#include "m88ds3103.h" -+#include "m88ds3103_priv.h" -+ -+static int debug; -+module_param(debug, int, 0644); -+MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); -+ -+#define dprintk(args...) \ -+ do { \ -+ if (debug) \ -+ printk(KERN_INFO "m88ds3103: " args); \ -+ } while (0) -+ -+/*demod register operations.*/ -+static int m88ds3103_writereg(struct m88ds3103_state *state, int reg, int data) -+{ -+ u8 buf[] = { reg, data }; -+ struct i2c_msg msg = { .addr = state->config->demod_address, -+ .flags = 0, .buf = buf, .len = 2 }; -+ int err; -+ -+ if (debug > 1) -+ printk("m88ds3103: %s: write reg 0x%02x, value 0x%02x\n", -+ __func__, reg, data); -+ -+ err = i2c_transfer(state->i2c, &msg, 1); -+ if (err != 1) { -+ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); -+ return -EREMOTEIO; -+ } -+ return 0; -+} -+ -+static int m88ds3103_readreg(struct m88ds3103_state *state, u8 reg) -+{ -+ int ret; -+ u8 b0[] = { reg }; -+ u8 b1[] = { 0 }; -+ struct i2c_msg msg[] = { -+ { .addr = state->config->demod_address, .flags = 0, -+ .buf = b0, .len = 1 }, -+ { .addr = state->config->demod_address, .flags = I2C_M_RD, -+ .buf = b1, .len = 1 } -+ }; -+ ret = i2c_transfer(state->i2c, msg, 2); -+ -+ if (ret != 2) { -+ printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", -+ __func__, reg, ret); -+ return ret; -+ } -+ -+ if (debug > 1) -+ printk(KERN_INFO "m88ds3103: read reg 0x%02x, value 0x%02x\n", -+ reg, b1[0]); -+ -+ return b1[0]; -+} -+ -+/*tuner register operations.*/ -+static int m88ds3103_tuner_writereg(struct m88ds3103_state *state, int reg, int data) -+{ -+ u8 buf[] = { reg, data }; -+ struct i2c_msg msg = { .addr = 0x60, -+ .flags = 0, .buf = buf, .len = 2 }; -+ int err; -+ -+ m88ds3103_writereg(state, 0x03, 0x11); -+ err = i2c_transfer(state->i2c, &msg, 1); -+ -+ if (err != 1) { -+ printk("%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); -+ return -EREMOTEIO; -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_tuner_readreg(struct m88ds3103_state *state, u8 reg) -+{ -+ int ret; -+ u8 b0[] = { reg }; -+ u8 b1[] = { 0 }; -+ struct i2c_msg msg[] = { -+ { .addr = 0x60, .flags = 0, -+ .buf = b0, .len = 1 }, -+ { .addr = 0x60, .flags = I2C_M_RD, -+ .buf = b1, .len = 1 } -+ }; -+ -+ m88ds3103_writereg(state, 0x03, 0x11); -+ ret = i2c_transfer(state->i2c, msg, 2); -+ -+ if (ret != 2) { -+ printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret); -+ return ret; -+ } -+ -+ return b1[0]; -+} -+ -+/* Bulk demod I2C write, for firmware download. */ -+static int m88ds3103_writeregN(struct m88ds3103_state *state, int reg, -+ const u8 *data, u16 len) -+{ -+ int ret = -EREMOTEIO; -+ struct i2c_msg msg; -+ u8 *buf; -+ -+ buf = kmalloc(len + 1, GFP_KERNEL); -+ if (buf == NULL) { -+ printk("Unable to kmalloc\n"); -+ ret = -ENOMEM; -+ goto error; -+ } -+ -+ *(buf) = reg; -+ memcpy(buf + 1, data, len); -+ -+ msg.addr = state->config->demod_address; -+ msg.flags = 0; -+ msg.buf = buf; -+ msg.len = len + 1; -+ -+ if (debug > 1) -+ printk(KERN_INFO "m88ds3103: %s: write regN 0x%02x, len = %d\n", -+ __func__, reg, len); -+ -+ ret = i2c_transfer(state->i2c, &msg, 1); -+ if (ret != 1) { -+ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n", -+ __func__, ret, reg); -+ ret = -EREMOTEIO; -+ } -+ -+error: -+ kfree(buf); -+ -+ return ret; -+} -+ -+static int m88ds3103_load_firmware(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ const struct firmware *fw; -+ int i, ret = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ if (state->skip_fw_load) -+ return 0; -+ /* Load firmware */ -+ /* request the firmware, this will block until someone uploads it */ -+ if(state->demod_id == DS3000_ID){ -+ printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, -+ DS3000_DEFAULT_FIRMWARE); -+ ret = request_firmware(&fw, DS3000_DEFAULT_FIRMWARE, -+ state->i2c->dev.parent); -+ }else if(state->demod_id == DS3103_ID){ -+ printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, -+ DS3103_DEFAULT_FIRMWARE); -+ ret = request_firmware(&fw, DS3103_DEFAULT_FIRMWARE, -+ state->i2c->dev.parent); -+ } -+ -+ printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__); -+ if (ret) { -+ printk(KERN_ERR "%s: No firmware uploaded (timeout or file not " -+ "found?)\n", __func__); -+ return ret; -+ } -+ -+ /* Make sure we don't recurse back through here during loading */ -+ state->skip_fw_load = 1; -+ -+ dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n", -+ fw->size, -+ fw->data[0], -+ fw->data[1], -+ fw->data[fw->size - 2], -+ fw->data[fw->size - 1]); -+ -+ /* stop internal mcu. */ -+ m88ds3103_writereg(state, 0xb2, 0x01); -+ /* split firmware to download.*/ -+ for(i = 0; i < FW_DOWN_LOOP; i++){ -+ ret = m88ds3103_writeregN(state, 0xb0, &(fw->data[FW_DOWN_SIZE*i]), FW_DOWN_SIZE); -+ if(ret != 1) break; -+ } -+ /* start internal mcu. */ -+ if(ret == 1) -+ m88ds3103_writereg(state, 0xb2, 0x00); -+ -+ release_firmware(fw); -+ -+ dprintk("%s: Firmware upload %s\n", __func__, -+ ret == 1 ? "complete" : "failed"); -+ -+ if(ret == 1) ret = 0; -+ -+ /* Ensure firmware is always loaded if required */ -+ state->skip_fw_load = 0; -+ -+ return ret; -+} -+ -+ -+static int m88ds3103_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 data; -+ -+ dprintk("%s(%d)\n", __func__, voltage); -+ -+ dprintk("m88ds3103:pin_ctrl = (%02x)\n", state->config->pin_ctrl); -+ -+ if(state->config->set_voltage) -+ state->config->set_voltage(fe, voltage); -+ -+ data = m88ds3103_readreg(state, 0xa2); -+ -+ if(state->config->pin_ctrl & 0x80){ /*If control pin is assigned.*/ -+ data &= ~0x03; /* bit0 V/H, bit1 off/on */ -+ if(state->config->pin_ctrl & 0x02) -+ data |= 0x02; -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_18: -+ if((state->config->pin_ctrl & 0x01) == 0) -+ data |= 0x01; -+ break; -+ case SEC_VOLTAGE_13: -+ if(state->config->pin_ctrl & 0x01) -+ data |= 0x01; -+ break; -+ case SEC_VOLTAGE_OFF: -+ if(state->config->pin_ctrl & 0x02) -+ data &= ~0x02; -+ else -+ data |= 0x02; -+ break; -+ } -+ } -+ -+ m88ds3103_writereg(state, 0xa2, data); -+ -+ return 0; -+} -+ -+static int m88ds3103_read_status(struct dvb_frontend *fe, fe_status_t* status) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ int lock = 0; -+ -+ *status = 0; -+ -+ switch (state->delivery_system){ -+ case SYS_DVBS: -+ lock = m88ds3103_readreg(state, 0xd1); -+ dprintk("%s: SYS_DVBS status=%x.\n", __func__, lock); -+ -+ if ((lock & 0x07) == 0x07){ -+ /*if((m88ds3103_readreg(state, 0x0d) & 0x07) == 0x07)*/ -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; -+ -+ } -+ break; -+ case SYS_DVBS2: -+ lock = m88ds3103_readreg(state, 0x0d); -+ dprintk("%s: SYS_DVBS2 status=%x.\n", __func__, lock); -+ -+ if ((lock & 0x8f) == 0x8f) -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; -+ -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_read_ber(struct dvb_frontend *fe, u32* ber) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 tmp1, tmp2, tmp3; -+ u32 ldpc_frame_cnt, pre_err_packags, code_rate_fac = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ switch (state->delivery_system) { -+ case SYS_DVBS: -+ m88ds3103_writereg(state, 0xf9, 0x04); -+ tmp3 = m88ds3103_readreg(state, 0xf8); -+ if ((tmp3&0x10) == 0){ -+ tmp1 = m88ds3103_readreg(state, 0xf7); -+ tmp2 = m88ds3103_readreg(state, 0xf6); -+ tmp3 |= 0x10; -+ m88ds3103_writereg(state, 0xf8, tmp3); -+ state->preBer = (tmp1<<8) | tmp2; -+ } -+ break; -+ case SYS_DVBS2: -+ tmp1 = m88ds3103_readreg(state, 0x7e) & 0x0f; -+ switch(tmp1){ -+ case 0: code_rate_fac = 16008 - 80; break; -+ case 1: code_rate_fac = 21408 - 80; break; -+ case 2: code_rate_fac = 25728 - 80; break; -+ case 3: code_rate_fac = 32208 - 80; break; -+ case 4: code_rate_fac = 38688 - 80; break; -+ case 5: code_rate_fac = 43040 - 80; break; -+ case 6: code_rate_fac = 48408 - 80; break; -+ case 7: code_rate_fac = 51648 - 80; break; -+ case 8: code_rate_fac = 53840 - 80; break; -+ case 9: code_rate_fac = 57472 - 80; break; -+ case 10: code_rate_fac = 58192 - 80; break; -+ } -+ -+ tmp1 = m88ds3103_readreg(state, 0xd7) & 0xff; -+ tmp2 = m88ds3103_readreg(state, 0xd6) & 0xff; -+ tmp3 = m88ds3103_readreg(state, 0xd5) & 0xff; -+ ldpc_frame_cnt = (tmp1 << 16) | (tmp2 << 8) | tmp3; -+ -+ tmp1 = m88ds3103_readreg(state, 0xf8) & 0xff; -+ tmp2 = m88ds3103_readreg(state, 0xf7) & 0xff; -+ pre_err_packags = tmp1<<8 | tmp2; -+ -+ if (ldpc_frame_cnt > 1000){ -+ m88ds3103_writereg(state, 0xd1, 0x01); -+ m88ds3103_writereg(state, 0xf9, 0x01); -+ m88ds3103_writereg(state, 0xf9, 0x00); -+ m88ds3103_writereg(state, 0xd1, 0x00); -+ state->preBer = pre_err_packags; -+ } -+ break; -+ default: -+ break; -+ } -+ *ber = state->preBer; -+ -+ return 0; -+} -+ -+static int m88ds3103_read_signal_strength(struct dvb_frontend *fe, -+ u16 *signal_strength) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u16 gain; -+ u8 gain1, gain2, gain3 = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ gain1 = m88ds3103_tuner_readreg(state, 0x3d) & 0x1f; -+ dprintk("%s: gain1 = 0x%02x \n", __func__, gain1); -+ -+ if (gain1 > 15) gain1 = 15; -+ gain2 = m88ds3103_tuner_readreg(state, 0x21) & 0x1f; -+ dprintk("%s: gain2 = 0x%02x \n", __func__, gain2); -+ -+ if(state->tuner_id == TS2022_ID){ -+ gain3 = (m88ds3103_tuner_readreg(state, 0x66)>>3) & 0x07; -+ dprintk("%s: gain3 = 0x%02x \n", __func__, gain3); -+ -+ if (gain2 > 16) gain2 = 16; -+ if (gain2 < 2) gain2 = 2; -+ if (gain3 > 6) gain3 = 6; -+ }else{ -+ if (gain2 > 13) gain2 = 13; -+ gain3 = 0; -+ } -+ -+ gain = gain1*23 + gain2*35 + gain3*29; -+ *signal_strength = 60000 - gain*55; -+ -+ return 0; -+} -+ -+ -+static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *p_snr) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 val, npow1, npow2, spow1, cnt; -+ u16 tmp, snr; -+ u32 npow, spow, snr_total; -+ static const u16 mes_log10[] ={ -+ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, -+ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, 13010, -+ 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, 14624, 14771, -+ 14914, 15052, 15185, 15315, 15441, 15563, 15682, 15798, 15911, 16021, -+ 16128, 16232, 16335, 16435, 16532, 16628, 16721, 16812, 16902, 16990, -+ 17076, 17160, 17243, 17324, 17404, 17482, 17559, 17634, 17709, 17782, -+ 17853, 17924, 17993, 18062, 18129, 18195, 18261, 18325, 18388, 18451, -+ 18513, 18573, 18633, 18692, 18751, 18808, 18865, 18921, 18976, 19031 -+ }; -+ static const u16 mes_loge[] ={ -+ 0, 6931, 10986, 13863, 16094, 17918, 19459, 20794, 21972, 23026, -+ 23979, 24849, 25649, 26391, 27081, 27726, 28332, 28904, 29444, 29957, -+ 30445, 30910, 31355, 31781, 32189, 32581, 32958, 33322, 33673, 34012, -+ 34340, 34657, -+ }; -+ -+ dprintk("%s()\n", __func__); -+ -+ snr = 0; -+ -+ switch (state->delivery_system){ -+ case SYS_DVBS: -+ cnt = 10; snr_total = 0; -+ while(cnt > 0){ -+ val = m88ds3103_readreg(state, 0xff); -+ snr_total += val; -+ cnt--; -+ } -+ tmp = (u16)(snr_total/80); -+ if(tmp > 0){ -+ if (tmp > 32) tmp = 32; -+ snr = (mes_loge[tmp - 1] * 100) / 45; -+ }else{ -+ snr = 0; -+ } -+ break; -+ case SYS_DVBS2: -+ cnt = 10; npow = 0; spow = 0; -+ while(cnt >0){ -+ npow1 = m88ds3103_readreg(state, 0x8c) & 0xff; -+ npow2 = m88ds3103_readreg(state, 0x8d) & 0xff; -+ npow += (((npow1 & 0x3f) + (u16)(npow2 << 6)) >> 2); -+ -+ spow1 = m88ds3103_readreg(state, 0x8e) & 0xff; -+ spow += ((spow1 * spow1) >> 1); -+ cnt--; -+ } -+ npow /= 10; spow /= 10; -+ if(spow == 0){ -+ snr = 0; -+ }else if(npow == 0){ -+ snr = 19; -+ }else{ -+ if(spow > npow){ -+ tmp = (u16)(spow / npow); -+ if (tmp > 80) tmp = 80; -+ snr = mes_log10[tmp - 1]*3; -+ }else{ -+ tmp = (u16)(npow / spow); -+ if (tmp > 80) tmp = 80; -+ snr = -(mes_log10[tmp - 1] / 1000); -+ } -+ } -+ break; -+ default: -+ break; -+ } -+ *p_snr = snr; -+ -+ return 0; -+} -+ -+ -+static int m88ds3103_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 tmp1, tmp2, tmp3, data; -+ -+ dprintk("%s()\n", __func__); -+ -+ switch (state->delivery_system) { -+ case SYS_DVBS: -+ data = m88ds3103_readreg(state, 0xf8); -+ data |= 0x40; -+ m88ds3103_writereg(state, 0xf8, data); -+ tmp1 = m88ds3103_readreg(state, 0xf5); -+ tmp2 = m88ds3103_readreg(state, 0xf4); -+ *ucblocks = (tmp1 <<8) | tmp2; -+ data &= ~0x20; -+ m88ds3103_writereg(state, 0xf8, data); -+ data |= 0x20; -+ m88ds3103_writereg(state, 0xf8, data); -+ data &= ~0x40; -+ m88ds3103_writereg(state, 0xf8, data); -+ break; -+ case SYS_DVBS2: -+ tmp1 = m88ds3103_readreg(state, 0xda); -+ tmp2 = m88ds3103_readreg(state, 0xd9); -+ tmp3 = m88ds3103_readreg(state, 0xd8); -+ *ucblocks = (tmp1 <<16)|(tmp2 <<8)|tmp3; -+ data = m88ds3103_readreg(state, 0xd1); -+ data |= 0x01; -+ m88ds3103_writereg(state, 0xd1, data); -+ data &= ~0x01; -+ m88ds3103_writereg(state, 0xd1, data); -+ break; -+ default: -+ break; -+ } -+ return 0; -+} -+ -+static int m88ds3103_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 data_a1, data_a2; -+ -+ dprintk("%s(%d)\n", __func__, tone); -+ if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { -+ printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone); -+ return -EINVAL; -+ } -+ -+ data_a1 = m88ds3103_readreg(state, 0xa1); -+ data_a2 = m88ds3103_readreg(state, 0xa2); -+ if(state->demod_id == DS3103_ID) -+ data_a2 &= 0xdf; /* Normal mode */ -+ switch (tone) { -+ case SEC_TONE_ON: -+ dprintk("%s: SEC_TONE_ON\n", __func__); -+ data_a1 |= 0x04; -+ data_a1 &= ~0x03; -+ data_a1 &= ~0x40; -+ data_a2 &= ~0xc0; -+ break; -+ case SEC_TONE_OFF: -+ dprintk("%s: SEC_TONE_OFF\n", __func__); -+ data_a2 &= ~0xc0; -+ data_a2 |= 0x80; -+ break; -+ } -+ m88ds3103_writereg(state, 0xa2, data_a2); -+ m88ds3103_writereg(state, 0xa1, data_a1); -+ return 0; -+} -+ -+static int m88ds3103_send_diseqc_msg(struct dvb_frontend *fe, -+ struct dvb_diseqc_master_cmd *d) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ int i, ret = 0; -+ u8 tmp, time_out; -+ -+ /* Dump DiSEqC message */ -+ if (debug) { -+ printk(KERN_INFO "m88ds3103: %s(", __func__); -+ for (i = 0 ; i < d->msg_len ;) { -+ printk(KERN_INFO "0x%02x", d->msg[i]); -+ if (++i < d->msg_len) -+ printk(KERN_INFO ", "); -+ } -+ } -+ -+ tmp = m88ds3103_readreg(state, 0xa2); -+ tmp &= ~0xc0; -+ if(state->demod_id == DS3103_ID) -+ tmp &= ~0x20; -+ m88ds3103_writereg(state, 0xa2, tmp); -+ -+ for (i = 0; i < d->msg_len; i ++) -+ m88ds3103_writereg(state, (0xa3+i), d->msg[i]); -+ -+ tmp = m88ds3103_readreg(state, 0xa1); -+ tmp &= ~0x38; -+ tmp &= ~0x40; -+ tmp |= ((d->msg_len-1) << 3) | 0x07; -+ tmp &= ~0x80; -+ m88ds3103_writereg(state, 0xa1, tmp); -+ /* 1.5 * 9 * 8 = 108ms */ -+ time_out = 150; -+ while (time_out > 0){ -+ msleep(10); -+ time_out -= 10; -+ tmp = m88ds3103_readreg(state, 0xa1); -+ if ((tmp & 0x40) == 0) -+ break; -+ } -+ if (time_out == 0){ -+ tmp = m88ds3103_readreg(state, 0xa1); -+ tmp &= ~0x80; -+ tmp |= 0x40; -+ m88ds3103_writereg(state, 0xa1, tmp); -+ ret = 1; -+ } -+ tmp = m88ds3103_readreg(state, 0xa2); -+ tmp &= ~0xc0; -+ tmp |= 0x80; -+ m88ds3103_writereg(state, 0xa2, tmp); -+ return ret; -+} -+ -+ -+static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe, -+ fe_sec_mini_cmd_t burst) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 val, time_out; -+ -+ dprintk("%s()\n", __func__); -+ -+ val = m88ds3103_readreg(state, 0xa2); -+ val &= ~0xc0; -+ if(state->demod_id == DS3103_ID) -+ val &= 0xdf; /* Normal mode */ -+ m88ds3103_writereg(state, 0xa2, val); -+ /* DiSEqC burst */ -+ if (burst == SEC_MINI_B) -+ m88ds3103_writereg(state, 0xa1, 0x01); -+ else -+ m88ds3103_writereg(state, 0xa1, 0x02); -+ -+ msleep(13); -+ -+ time_out = 5; -+ do{ -+ val = m88ds3103_readreg(state, 0xa1); -+ if ((val & 0x40) == 0) -+ break; -+ msleep(1); -+ time_out --; -+ } while (time_out > 0); -+ -+ val = m88ds3103_readreg(state, 0xa2); -+ val &= ~0xc0; -+ val |= 0x80; -+ m88ds3103_writereg(state, 0xa2, val); -+ -+ return 0; -+} -+ -+static void m88ds3103_release(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ -+ dprintk("%s\n", __func__); -+ kfree(state); -+} -+ -+static int m88ds3103_check_id(struct m88ds3103_state *state) -+{ -+ int val_00, val_01; -+ -+ /*check demod id*/ -+ val_01 = m88ds3103_readreg(state, 0x01); -+ printk(KERN_INFO "DS3000 chip version: %x attached.\n", val_01); -+ -+ if(val_01 == 0xD0) -+ state->demod_id = DS3103_ID; -+ else if(val_01 == 0xC0) -+ state->demod_id = DS3000_ID; -+ else -+ state->demod_id = UNKNOW_ID; -+ -+ /*check tuner id*/ -+ val_00 = m88ds3103_tuner_readreg(state, 0x00); -+ printk(KERN_INFO "TS202x chip version[1]: %x attached.\n", val_00); -+ val_00 &= 0x03; -+ if(val_00 == 0) -+ { -+ m88ds3103_tuner_writereg(state, 0x00, 0x01); -+ msleep(3); -+ } -+ m88ds3103_tuner_writereg(state, 0x00, 0x03); -+ msleep(5); -+ -+ val_00 = m88ds3103_tuner_readreg(state, 0x00); -+ printk(KERN_INFO "TS202x chip version[2]: %x attached.\n", val_00); -+ val_00 &= 0xff; -+ if((val_00 == 0x01) || (val_00 == 0x41) || (val_00 == 0x81)) -+ state->tuner_id = TS2020_ID; -+ else if(((val_00 & 0xc0)== 0xc0) || (val_00 == 0x83)) -+ state->tuner_id = TS2022_ID; -+ else -+ state->tuner_id = UNKNOW_ID; -+ -+ return state->demod_id; -+} -+ -+static struct dvb_frontend_ops m88ds3103_ops; -+static int m88ds3103_initilaze(struct dvb_frontend *fe); -+ -+struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *config, -+ struct i2c_adapter *i2c) -+{ -+ struct m88ds3103_state *state = NULL; -+ -+ dprintk("%s\n", __func__); -+ -+ /* allocate memory for the internal state */ -+ state = kzalloc(sizeof(struct m88ds3103_state), GFP_KERNEL); -+ if (state == NULL) { -+ printk(KERN_ERR "Unable to kmalloc\n"); -+ goto error2; -+ } -+ -+ state->config = config; -+ state->i2c = i2c; -+ state->preBer = 0xffff; -+ state->delivery_system = SYS_DVBS; /*Default to DVB-S.*/ -+ -+ /* check demod id */ -+ if(m88ds3103_check_id(state) == UNKNOW_ID){ -+ printk(KERN_ERR "Unable to find Montage chip\n"); -+ goto error3; -+ } -+ -+ memcpy(&state->frontend.ops, &m88ds3103_ops, -+ sizeof(struct dvb_frontend_ops)); -+ state->frontend.demodulator_priv = state; -+ -+ m88ds3103_initilaze(&state->frontend); -+ -+ return &state->frontend; -+ -+error3: -+ kfree(state); -+error2: -+ return NULL; -+} -+EXPORT_SYMBOL(m88ds3103_attach); -+ -+static int m88ds3103_set_carrier_offset(struct dvb_frontend *fe, -+ s32 carrier_offset_khz) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ s32 tmp; -+ -+ tmp = carrier_offset_khz; -+ tmp *= 65536; -+ -+ tmp = (2*tmp + MT_FE_MCLK_KHZ) / (2*MT_FE_MCLK_KHZ); -+ -+ if (tmp < 0) -+ tmp += 65536; -+ -+ m88ds3103_writereg(state, 0x5f, tmp >> 8); -+ m88ds3103_writereg(state, 0x5e, tmp & 0xff); -+ -+ return 0; -+} -+ -+static int m88ds3103_set_symrate(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ u16 value; -+ -+ value = (((c->symbol_rate / 1000) << 15) + (MT_FE_MCLK_KHZ / 4)) / (MT_FE_MCLK_KHZ / 2); -+ m88ds3103_writereg(state, 0x61, value & 0x00ff); -+ m88ds3103_writereg(state, 0x62, (value & 0xff00) >> 8); -+ -+ return 0; -+} -+ -+static int m88ds3103_set_CCI(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 tmp; -+ -+ tmp = m88ds3103_readreg(state, 0x56); -+ tmp &= ~0x01; -+ m88ds3103_writereg(state, 0x56, tmp); -+ -+ tmp = m88ds3103_readreg(state, 0x76); -+ tmp &= ~0x80; -+ m88ds3103_writereg(state, 0x76, tmp); -+ -+ return 0; -+} -+ -+static int m88ds3103_init_reg(struct m88ds3103_state *state, const u8 *p_reg_tab, u32 size) -+{ -+ u32 i; -+ -+ for(i = 0; i < size; i+=2) -+ m88ds3103_writereg(state, p_reg_tab[i], p_reg_tab[i+1]); -+ -+ return 0; -+} -+ -+static int m88ds3103_get_locked_sym_rate(struct m88ds3103_state *state, u32 *sym_rate_KSs) -+{ -+ u16 tmp; -+ u32 sym_rate_tmp; -+ u8 val_0x6d, val_0x6e; -+ -+ val_0x6d = m88ds3103_readreg(state, 0x6d); -+ val_0x6e = m88ds3103_readreg(state, 0x6e); -+ -+ tmp = (u16)((val_0x6e<<8) | val_0x6d); -+ -+ sym_rate_tmp = (u32)(tmp * MT_FE_MCLK_KHZ); -+ sym_rate_tmp = (u32)(sym_rate_tmp / (1<<16)); -+ *sym_rate_KSs = sym_rate_tmp; -+ -+ return 0; -+} -+ -+static int m88ds3103_get_channel_info(struct m88ds3103_state *state, u8 *p_mode, u8 *p_coderate) -+{ -+ u8 tmp, val_0x7E; -+ -+ if(state->delivery_system == SYS_DVBS2){ -+ val_0x7E = m88ds3103_readreg(state, 0x7e); -+ tmp = (u8)((val_0x7E&0xC0) >> 6); -+ *p_mode = tmp; -+ tmp = (u8)(val_0x7E & 0x0f); -+ *p_coderate = tmp; -+ } else { -+ *p_mode = 0; -+ tmp = m88ds3103_readreg(state, 0xe6); -+ tmp = (u8)(tmp >> 5); -+ *p_coderate = tmp; -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_set_clock_ratio(struct m88ds3103_state *state) -+{ -+ u8 val, mod_fac, tmp1, tmp2; -+ u32 input_datarate, locked_sym_rate_KSs; -+ u32 MClk_KHz = 96000; -+ u8 mod_mode, code_rate, divid_ratio = 0; -+ -+ locked_sym_rate_KSs = 0; -+ m88ds3103_get_locked_sym_rate(state, &locked_sym_rate_KSs); -+ if(locked_sym_rate_KSs == 0) -+ return 0; -+ -+ m88ds3103_get_channel_info(state, &mod_mode, &code_rate); -+ -+ if (state->delivery_system == SYS_DVBS2) -+ { -+ switch(mod_mode) { -+ case 1: mod_fac = 3; break; -+ case 2: mod_fac = 4; break; -+ case 3: mod_fac = 5; break; -+ default: mod_fac = 2; break; -+ } -+ -+ switch(code_rate) { -+ case 0: input_datarate = locked_sym_rate_KSs*mod_fac/8/4; break; -+ case 1: input_datarate = locked_sym_rate_KSs*mod_fac/8/3; break; -+ case 2: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/5; break; -+ case 3: input_datarate = locked_sym_rate_KSs*mod_fac/8/2; break; -+ case 4: input_datarate = locked_sym_rate_KSs*mod_fac*3/8/5; break; -+ case 5: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/3; break; -+ case 6: input_datarate = locked_sym_rate_KSs*mod_fac*3/8/4; break; -+ case 7: input_datarate = locked_sym_rate_KSs*mod_fac*4/8/5; break; -+ case 8: input_datarate = locked_sym_rate_KSs*mod_fac*5/8/6; break; -+ case 9: input_datarate = locked_sym_rate_KSs*mod_fac*8/8/9; break; -+ case 10: input_datarate = locked_sym_rate_KSs*mod_fac*9/8/10; break; -+ default: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/3; break; -+ } -+ -+ if(state->demod_id == DS3000_ID) -+ input_datarate = input_datarate * 115 / 100; -+ -+ if(input_datarate < 4800) {tmp1 = 15;tmp2 = 15;} //4.8MHz TS clock -+ else if(input_datarate < 4966) {tmp1 = 14;tmp2 = 15;} //4.966MHz TS clock -+ else if(input_datarate < 5143) {tmp1 = 14;tmp2 = 14;} //5.143MHz TS clock -+ else if(input_datarate < 5333) {tmp1 = 13;tmp2 = 14;} //5.333MHz TS clock -+ else if(input_datarate < 5538) {tmp1 = 13;tmp2 = 13;} //5.538MHz TS clock -+ else if(input_datarate < 5760) {tmp1 = 12;tmp2 = 13;} //5.76MHz TS clock allan 0809 -+ else if(input_datarate < 6000) {tmp1 = 12;tmp2 = 12;} //6MHz TS clock -+ else if(input_datarate < 6260) {tmp1 = 11;tmp2 = 12;} //6.26MHz TS clock -+ else if(input_datarate < 6545) {tmp1 = 11;tmp2 = 11;} //6.545MHz TS clock -+ else if(input_datarate < 6857) {tmp1 = 10;tmp2 = 11;} //6.857MHz TS clock -+ else if(input_datarate < 7200) {tmp1 = 10;tmp2 = 10;} //7.2MHz TS clock -+ else if(input_datarate < 7578) {tmp1 = 9;tmp2 = 10;} //7.578MHz TS clock -+ else if(input_datarate < 8000) {tmp1 = 9;tmp2 = 9;} //8MHz TS clock -+ else if(input_datarate < 8470) {tmp1 = 8;tmp2 = 9;} //8.47MHz TS clock -+ else if(input_datarate < 9000) {tmp1 = 8;tmp2 = 8;} //9MHz TS clock -+ else if(input_datarate < 9600) {tmp1 = 7;tmp2 = 8;} //9.6MHz TS clock -+ else if(input_datarate < 10285) {tmp1 = 7;tmp2 = 7;} //10.285MHz TS clock -+ else if(input_datarate < 12000) {tmp1 = 6;tmp2 = 6;} //12MHz TS clock -+ else if(input_datarate < 14400) {tmp1 = 5;tmp2 = 5;} //14.4MHz TS clock -+ else if(input_datarate < 18000) {tmp1 = 4;tmp2 = 4;} //18MHz TS clock -+ else {tmp1 = 3;tmp2 = 3;} //24MHz TS clock -+ -+ if(state->demod_id == DS3000_ID) { -+ val = (u8)((tmp1<<4) + tmp2); -+ m88ds3103_writereg(state, 0xfe, val); -+ } else { -+ tmp1 = m88ds3103_readreg(state, 0x22); -+ tmp2 = m88ds3103_readreg(state, 0x24); -+ -+ tmp1 >>= 6; -+ tmp1 &= 0x03; -+ tmp2 >>= 6; -+ tmp2 &= 0x03; -+ -+ if((tmp1 == 0x00) && (tmp2 == 0x01)) -+ MClk_KHz = 144000; -+ else if((tmp1 == 0x00) && (tmp2 == 0x03)) -+ MClk_KHz = 72000; -+ else if((tmp1 == 0x01) && (tmp2 == 0x01)) -+ MClk_KHz = 115200; -+ else if((tmp1 == 0x02) && (tmp2 == 0x01)) -+ MClk_KHz = 96000; -+ else if((tmp1 == 0x03) && (tmp2 == 0x00)) -+ MClk_KHz = 192000; -+ else -+ return 0; -+ -+ if(input_datarate < 5200) /*Max. 2011-12-23 11:55*/ -+ input_datarate = 5200; -+ -+ if(input_datarate != 0) -+ divid_ratio = (u8)(MClk_KHz / input_datarate); -+ else -+ divid_ratio = 0xFF; -+ -+ if(divid_ratio > 128) -+ divid_ratio = 128; -+ -+ if(divid_ratio < 2) -+ divid_ratio = 2; -+ -+ tmp1 = (u8)(divid_ratio / 2); -+ tmp2 = (u8)(divid_ratio / 2); -+ -+ if((divid_ratio % 2) != 0) -+ tmp2 += 1; -+ -+ tmp1 -= 1; -+ tmp2 -= 1; -+ -+ tmp1 &= 0x3f; -+ tmp2 &= 0x3f; -+ -+ val = m88ds3103_readreg(state, 0xfe); -+ val &= 0xF0; -+ val |= (tmp2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, val); -+ -+ val = (u8)((tmp2 & 0x03) << 6); -+ val |= tmp1; -+ m88ds3103_writereg(state, 0xea, val); -+ } -+ } else { -+ mod_fac = 2; -+ -+ switch(code_rate) { -+ case 4: input_datarate = locked_sym_rate_KSs*mod_fac/2/8; break; -+ case 3: input_datarate = locked_sym_rate_KSs*mod_fac*2/3/8; break; -+ case 2: input_datarate = locked_sym_rate_KSs*mod_fac*3/4/8; break; -+ case 1: input_datarate = locked_sym_rate_KSs*mod_fac*5/6/8; break; -+ case 0: input_datarate = locked_sym_rate_KSs*mod_fac*7/8/8; break; -+ default: input_datarate = locked_sym_rate_KSs*mod_fac*3/4/8; break; -+ } -+ -+ if(state->demod_id == DS3000_ID) -+ input_datarate = input_datarate * 115 / 100; -+ -+ if(input_datarate < 6857) {tmp1 = 7;tmp2 = 7;} //6.857MHz TS clock -+ else if(input_datarate < 7384) {tmp1 = 6;tmp2 = 7;} //7.384MHz TS clock -+ else if(input_datarate < 8000) {tmp1 = 6;tmp2 = 6;} //8MHz TS clock -+ else if(input_datarate < 8727) {tmp1 = 5;tmp2 = 6;} //8.727MHz TS clock -+ else if(input_datarate < 9600) {tmp1 = 5;tmp2 = 5;} //9.6MHz TS clock -+ else if(input_datarate < 10666) {tmp1 = 4;tmp2 = 5;} //10.666MHz TS clock -+ else if(input_datarate < 12000) {tmp1 = 4;tmp2 = 4;} //12MHz TS clock -+ else if(input_datarate < 13714) {tmp1 = 3;tmp2 = 4;} //13.714MHz TS clock -+ else if(input_datarate < 16000) {tmp1 = 3;tmp2 = 3;} //16MHz TS clock -+ else if(input_datarate < 19200) {tmp1 = 2;tmp2 = 3;} //19.2MHz TS clock -+ else {tmp1 = 2;tmp2 = 2;} //24MHz TS clock -+ -+ if(state->demod_id == DS3000_ID) { -+ val = m88ds3103_readreg(state, 0xfe); -+ val &= 0xc0; -+ val |= ((u8)((tmp1<<3) + tmp2)); -+ m88ds3103_writereg(state, 0xfe, val); -+ } else { -+ if(input_datarate < 5200) /*Max. 2011-12-23 11:55*/ -+ input_datarate = 5200; -+ -+ if(input_datarate != 0) -+ divid_ratio = (u8)(MClk_KHz / input_datarate); -+ else -+ divid_ratio = 0xFF; -+ -+ if(divid_ratio > 128) -+ divid_ratio = 128; -+ -+ if(divid_ratio < 2) -+ divid_ratio = 2; -+ -+ tmp1 = (u8)(divid_ratio / 2); -+ tmp2 = (u8)(divid_ratio / 2); -+ -+ if((divid_ratio % 2) != 0) -+ tmp2 += 1; -+ -+ tmp1 -= 1; -+ tmp2 -= 1; -+ -+ tmp1 &= 0x3f; -+ tmp2 &= 0x3f; -+ -+ val = m88ds3103_readreg(state, 0xfe); -+ val &= 0xF0; -+ val |= (tmp2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, val); -+ -+ val = (u8)((tmp2 & 0x03) << 6); -+ val |= tmp1; -+ m88ds3103_writereg(state, 0xea, val); -+ } -+ } -+ return 0; -+} -+ -+static int m88ds3103_demod_connect(struct dvb_frontend *fe, s32 carrier_offset_khz) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ u16 value; -+ u8 val1,val2,data; -+ -+ dprintk("connect delivery system = %d\n", state->delivery_system); -+ -+ /* ds3000 global reset */ -+ m88ds3103_writereg(state, 0x07, 0x80); -+ m88ds3103_writereg(state, 0x07, 0x00); -+ /* ds3000 build-in uC reset */ -+ m88ds3103_writereg(state, 0xb2, 0x01); -+ /* ds3000 software reset */ -+ m88ds3103_writereg(state, 0x00, 0x01); -+ -+ switch (state->delivery_system) { -+ case SYS_DVBS: -+ /* initialise the demod in DVB-S mode */ -+ if(state->demod_id == DS3000_ID){ -+ m88ds3103_init_reg(state, ds3000_dvbs_init_tab, sizeof(ds3000_dvbs_init_tab)); -+ -+ value = m88ds3103_readreg(state, 0xfe); -+ value &= 0xc0; -+ value |= 0x1b; -+ m88ds3103_writereg(state, 0xfe, value); -+ -+ if(state->config->ci_mode) -+ val1 = 0x80; -+ else if(state->config->ts_mode) -+ val1 = 0x60; -+ else -+ val1 = 0x20; -+ m88ds3103_writereg(state, 0xfd, val1); -+ -+ }else if(state->demod_id == DS3103_ID){ -+ m88ds3103_init_reg(state, ds3103_dvbs_init_tab, sizeof(ds3103_dvbs_init_tab)); -+ -+ /* set ts clock */ -+ if(state->config->ci_mode == 2){ -+ val1 = 6; val2 = 6; -+ }else if(state->config->ts_mode == 0) { -+ val1 = 3; val2 = 3; -+ }else{ -+ val1 = 0; val2 = 0; -+ } -+ val1 -= 1; val2 -= 1; -+ val1 &= 0x3f; val2 &= 0x3f; -+ data = m88ds3103_readreg(state, 0xfe); -+ data &= 0xf0; -+ data |= (val2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, data); -+ data = (val2 & 0x03) << 6; -+ data |= val1; -+ m88ds3103_writereg(state, 0xea, data); -+ -+ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); -+ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); -+ -+ /* set master clock */ -+ val1 = m88ds3103_readreg(state, 0x22); -+ val2 = m88ds3103_readreg(state, 0x24); -+ -+ val1 &= 0x3f; -+ val2 &= 0x3f; -+ val1 |= 0x80; -+ val2 |= 0x40; -+ -+ m88ds3103_writereg(state, 0x22, val1); -+ m88ds3103_writereg(state, 0x24, val2); -+ -+ if(state->config->ci_mode) -+ val1 = 0x03; -+ else if(state->config->ts_mode) -+ val1 = 0x06; -+ else -+ val1 = 0x42; -+ m88ds3103_writereg(state, 0xfd, val1); -+ } -+ break; -+ case SYS_DVBS2: -+ /* initialise the demod in DVB-S2 mode */ -+ if(state->demod_id == DS3000_ID){ -+ m88ds3103_init_reg(state, ds3000_dvbs2_init_tab, sizeof(ds3000_dvbs2_init_tab)); -+ -+ if (c->symbol_rate >= 30000000) -+ m88ds3103_writereg(state, 0xfe, 0x54); -+ else -+ m88ds3103_writereg(state, 0xfe, 0x98); -+ -+ }else if(state->demod_id == DS3103_ID){ -+ m88ds3103_init_reg(state, ds3103_dvbs2_init_tab, sizeof(ds3103_dvbs2_init_tab)); -+ -+ /* set ts clock */ -+ if(state->config->ci_mode == 2){ -+ val1 = 6; val2 = 6; -+ }else if(state->config->ts_mode == 0){ -+ val1 = 5; val2 = 4; -+ }else{ -+ val1 = 0; val2 = 0; -+ } -+ val1 -= 1; val2 -= 1; -+ val1 &= 0x3f; val2 &= 0x3f; -+ data = m88ds3103_readreg(state, 0xfe); -+ data &= 0xf0; -+ data |= (val2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, data); -+ data = (val2 & 0x03) << 6; -+ data |= val1; -+ m88ds3103_writereg(state, 0xea, data); -+ -+ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); -+ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); -+ -+ /* set master clock */ -+ val1 = m88ds3103_readreg(state, 0x22); -+ val2 = m88ds3103_readreg(state, 0x24); -+ -+ val1 &= 0x3f; -+ val2 &= 0x3f; -+ if((state->config->ci_mode == 2) || (state->config->ts_mode == 1)){ -+ val1 |= 0x80; -+ val2 |= 0x40; -+ }else{ -+ if (c->symbol_rate >= 28000000){ -+ val1 |= 0xc0; -+ }else if (c->symbol_rate >= 18000000){ -+ val2 |= 0x40; -+ }else{ -+ val1 |= 0x80; -+ val2 |= 0x40; -+ } -+ } -+ m88ds3103_writereg(state, 0x22, val1); -+ m88ds3103_writereg(state, 0x24, val2); -+ } -+ -+ if(state->config->ci_mode) -+ val1 = 0x03; -+ else if(state->config->ts_mode) -+ val1 = 0x06; -+ else -+ val1 = 0x42; -+ m88ds3103_writereg(state, 0xfd, val1); -+ -+ break; -+ default: -+ return 1; -+ } -+ /* disable 27MHz clock output */ -+ m88ds3103_writereg(state, 0x29, 0x80); -+ /* enable ac coupling */ -+ m88ds3103_writereg(state, 0x25, 0x8a); -+ -+ if ((c->symbol_rate / 1000) <= 3000){ -+ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 32 * 100 / 64 = 400*/ -+ m88ds3103_writereg(state, 0xc8, 0x20); -+ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ -+ m88ds3103_writereg(state, 0xc7, 0x00); -+ }else if((c->symbol_rate / 1000) <= 10000){ -+ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 16 * 100 / 64 = 200*/ -+ m88ds3103_writereg(state, 0xc8, 0x10); -+ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ -+ m88ds3103_writereg(state, 0xc7, 0x00); -+ }else{ -+ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 6 * 100 / 64 = 75*/ -+ m88ds3103_writereg(state, 0xc8, 0x06); -+ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ -+ m88ds3103_writereg(state, 0xc7, 0x00); -+ } -+ -+ m88ds3103_set_symrate(fe); -+ -+ m88ds3103_set_CCI(fe); -+ -+ m88ds3103_set_carrier_offset(fe, carrier_offset_khz); -+ -+ /* ds3000 out of software reset */ -+ m88ds3103_writereg(state, 0x00, 0x00); -+ /* start ds3000 build-in uC */ -+ m88ds3103_writereg(state, 0xb2, 0x00); -+ -+ return 0; -+} -+ -+static int m88ds3103_set_frontend(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ -+ int i; -+ fe_status_t status; -+ u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf, div4, capCode, changePLL; -+ s32 offset_khz, lpf_offset_KHz; -+ u16 value, ndiv, lpf_coeff; -+ u32 f3db, gdiv28, realFreq; -+ u8 RFgain; -+ -+ dprintk("%s() ", __func__); -+ dprintk("c frequency = %d\n", c->frequency); -+ dprintk("symbol rate = %d\n", c->symbol_rate); -+ dprintk("delivery system = %d\n", c->delivery_system); -+ -+ realFreq = c->frequency; -+ lpf_offset_KHz = 0; -+ if(c->symbol_rate < 5000000){ -+ lpf_offset_KHz = FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz; -+ realFreq += FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz; -+ } -+ -+ if (state->config->set_ts_params) -+ state->config->set_ts_params(fe, 0); -+ -+ div4 = 0; -+ RFgain = 0; -+ if(state->tuner_id == TS2022_ID){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x0a); -+ m88ds3103_tuner_writereg(state, 0x11, 0x40); -+ if (realFreq < 1103000) { -+ m88ds3103_tuner_writereg(state, 0x10, 0x1b); -+ div4 = 1; -+ ndiv = (realFreq * (6 + 8) * 4)/MT_FE_CRYSTAL_KHZ; -+ }else { -+ ndiv = (realFreq * (6 + 8) * 2)/MT_FE_CRYSTAL_KHZ; -+ } -+ ndiv = ndiv + ndiv%2; -+ if(ndiv < 4095) -+ ndiv = ndiv - 1024; -+ else if (ndiv < 6143) -+ ndiv = ndiv + 1024; -+ else -+ ndiv = ndiv + 3072; -+ -+ m88ds3103_tuner_writereg(state, 0x01, (ndiv & 0x3f00) >> 8); -+ }else{ -+ m88ds3103_tuner_writereg(state, 0x10, 0x00); -+ if (realFreq < 1146000){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x11); -+ div4 = 1; -+ ndiv = (realFreq * (6 + 8) * 4) / MT_FE_CRYSTAL_KHZ; -+ }else{ -+ m88ds3103_tuner_writereg(state, 0x10, 0x01); -+ ndiv = (realFreq * (6 + 8) * 2) / MT_FE_CRYSTAL_KHZ; -+ } -+ ndiv = ndiv + ndiv%2; -+ ndiv = ndiv - 1024; -+ m88ds3103_tuner_writereg(state, 0x01, (ndiv>>8)&0x0f); -+ } -+ /* set pll */ -+ m88ds3103_tuner_writereg(state, 0x02, ndiv & 0x00ff); -+ m88ds3103_tuner_writereg(state, 0x03, 0x06); -+ m88ds3103_tuner_writereg(state, 0x51, 0x0f); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x10); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ -+ if(state->tuner_id == TS2022_ID){ -+ if(( realFreq >= 1650000 ) && (realFreq <= 1850000)){ -+ msleep(5); -+ value = m88ds3103_tuner_readreg(state, 0x14); -+ value &= 0x7f; -+ if(value < 64){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x82); -+ m88ds3103_tuner_writereg(state, 0x11, 0x6f); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x0f); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x10); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ msleep(5); -+ value = m88ds3103_tuner_readreg(state, 0x14); -+ value &= 0x1f; -+ -+ if(value > 19){ -+ value = m88ds3103_tuner_readreg(state, 0x10); -+ value &= 0x1d; -+ m88ds3103_tuner_writereg(state, 0x10, value); -+ } -+ }else{ -+ msleep(5); -+ value = m88ds3103_tuner_readreg(state, 0x66); -+ changePLL = (((value & 0x80) >> 7) != div4); -+ -+ if(changePLL){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x11); -+ div4 = 1; -+ ndiv = (realFreq * (6 + 8) * 4)/MT_FE_CRYSTAL_KHZ; -+ ndiv = ndiv + ndiv%2; -+ ndiv = ndiv - 1024; -+ -+ m88ds3103_tuner_writereg(state, 0x01, (ndiv>>8) & 0x0f); -+ m88ds3103_tuner_writereg(state, 0x02, ndiv & 0xff); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x0f); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x10); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ /*set the RF gain*/ -+ if(state->tuner_id == TS2020_ID) -+ m88ds3103_tuner_writereg(state, 0x60, 0x79); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x17); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x08); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ msleep(5); -+ -+ if(state->tuner_id == TS2020_ID){ -+ RFgain = m88ds3103_tuner_readreg(state, 0x3d); -+ RFgain &= 0x0f; -+ if(RFgain < 15){ -+ if(RFgain < 4) -+ RFgain = 0; -+ else -+ RFgain = RFgain -3; -+ value = ((RFgain << 3) | 0x01) & 0x79; -+ m88ds3103_tuner_writereg(state, 0x60, value); -+ m88ds3103_tuner_writereg(state, 0x51, 0x17); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x08); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ -+ /* set the LPF */ -+ if(state->tuner_id == TS2022_ID){ -+ m88ds3103_tuner_writereg(state, 0x25, 0x00); -+ m88ds3103_tuner_writereg(state, 0x27, 0x70); -+ m88ds3103_tuner_writereg(state, 0x41, 0x09); -+ m88ds3103_tuner_writereg(state, 0x08, 0x0b); -+ } -+ -+ f3db = ((c->symbol_rate / 1000) *135) / 200 + 2000; -+ f3db += lpf_offset_KHz; -+ if (f3db < 7000) -+ f3db = 7000; -+ if (f3db > 40000) -+ f3db = 40000; -+ -+ gdiv28 = (MT_FE_CRYSTAL_KHZ / 1000 * 1694 + 500) / 1000; -+ m88ds3103_tuner_writereg(state, 0x04, gdiv28 & 0xff); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ msleep(5); -+ -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ capCode = value & 0x3f; -+ if(state->tuner_id == TS2022_ID){ -+ m88ds3103_tuner_writereg(state, 0x41, 0x0d); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ -+ msleep(2); -+ -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ value &= 0x3f; -+ value = (capCode + value) / 2; -+ } -+ else -+ value = capCode; -+ -+ gdiv28 = gdiv28 * 207 / (value * 2 + 151); -+ mlpf_max = gdiv28 * 135 / 100; -+ mlpf_min = gdiv28 * 78 / 100; -+ if (mlpf_max > 63) -+ mlpf_max = 63; -+ -+ if(state->tuner_id == TS2022_ID) -+ lpf_coeff = 3200; -+ else -+ lpf_coeff = 2766; -+ -+ nlpf = (f3db * gdiv28 * 2 / lpf_coeff / (MT_FE_CRYSTAL_KHZ / 1000) + 1) / 2 ; -+ if (nlpf > 23) nlpf = 23; -+ if (nlpf < 1) nlpf = 1; -+ -+ lpf_mxdiv = (nlpf * (MT_FE_CRYSTAL_KHZ / 1000) * lpf_coeff * 2 / f3db + 1) / 2; -+ -+ if (lpf_mxdiv < mlpf_min){ -+ nlpf++; -+ lpf_mxdiv = (nlpf * (MT_FE_CRYSTAL_KHZ / 1000) * lpf_coeff * 2 / f3db + 1) / 2; -+ } -+ -+ if (lpf_mxdiv > mlpf_max) -+ lpf_mxdiv = mlpf_max; -+ -+ m88ds3103_tuner_writereg(state, 0x04, lpf_mxdiv); -+ m88ds3103_tuner_writereg(state, 0x06, nlpf); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ msleep(5); -+ -+ if(state->tuner_id == TS2022_ID){ -+ msleep(2); -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ capCode = value & 0x3f; -+ -+ m88ds3103_tuner_writereg(state, 0x41, 0x09); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ -+ msleep(2); -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ value &= 0x3f; -+ value = (capCode + value) / 2; -+ -+ value = value | 0x80; -+ m88ds3103_tuner_writereg(state, 0x25, value); -+ m88ds3103_tuner_writereg(state, 0x27, 0x30); -+ -+ m88ds3103_tuner_writereg(state, 0x08, 0x09); -+ } -+ -+ /* Set the BB gain */ -+ m88ds3103_tuner_writereg(state, 0x51, 0x1e); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x01); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ if(state->tuner_id == TS2020_ID){ -+ if(RFgain == 15){ -+ msleep(40); -+ value = m88ds3103_tuner_readreg(state, 0x21); -+ value &= 0x0f; -+ if(value < 3){ -+ m88ds3103_tuner_writereg(state, 0x60, 0x61); -+ m88ds3103_tuner_writereg(state, 0x51, 0x17); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x08); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ } -+ msleep(60); -+ -+ offset_khz = (ndiv - ndiv % 2 + 1024) * MT_FE_CRYSTAL_KHZ -+ / (6 + 8) / (div4 + 1) / 2 - realFreq; -+ -+ m88ds3103_demod_connect(fe, offset_khz+lpf_offset_KHz); -+ -+ for (i = 0; i < 30 ; i++) { -+ m88ds3103_read_status(fe, &status); -+ if (status & FE_HAS_LOCK){ -+ break; -+ } -+ msleep(20); -+ } -+ -+ if((status & FE_HAS_LOCK) == 0){ -+ state->delivery_system = (state->delivery_system == SYS_DVBS) ? SYS_DVBS2 : SYS_DVBS; -+ m88ds3103_demod_connect(fe, offset_khz); -+ -+ for (i = 0; i < 30 ; i++) { -+ m88ds3103_read_status(fe, &status); -+ if (status & FE_HAS_LOCK){ -+ break; -+ } -+ msleep(20); -+ } -+ } -+ -+ if (status & FE_HAS_LOCK){ -+ if(state->config->ci_mode == 2) -+ m88ds3103_set_clock_ratio(state); -+ if(state->config->start_ctrl){ -+ if(state->first_lock == 0){ -+ state->config->start_ctrl(fe); -+ state->first_lock = 1; -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_tune(struct dvb_frontend *fe, -+ bool re_tune, -+ unsigned int mode_flags, -+ unsigned int *delay, -+ fe_status_t *status) -+{ -+ *delay = HZ / 5; -+ -+ dprintk("%s() ", __func__); -+ dprintk("re_tune = %d\n", re_tune); -+ -+ if (re_tune) { -+ int ret = m88ds3103_set_frontend(fe); -+ if (ret) -+ return ret; -+ } -+ -+ return m88ds3103_read_status(fe, status); -+} -+ -+static enum dvbfe_algo m88ds3103_get_algo(struct dvb_frontend *fe) -+{ -+ return DVBFE_ALGO_HW; -+} -+ -+ /* -+ * Power config will reset and load initial firmware if required -+ */ -+static int m88ds3103_initilaze(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ int ret; -+ -+ dprintk("%s()\n", __func__); -+ /* hard reset */ -+ m88ds3103_writereg(state, 0x07, 0x80); -+ m88ds3103_writereg(state, 0x07, 0x00); -+ msleep(1); -+ -+ m88ds3103_writereg(state, 0x08, 0x01 | m88ds3103_readreg(state, 0x08)); -+ msleep(1); -+ -+ if(state->tuner_id == TS2020_ID){ -+ /* TS2020 init */ -+ m88ds3103_tuner_writereg(state, 0x42, 0x73); -+ msleep(2); -+ m88ds3103_tuner_writereg(state, 0x05, 0x01); -+ m88ds3103_tuner_writereg(state, 0x62, 0xb5); -+ m88ds3103_tuner_writereg(state, 0x07, 0x02); -+ m88ds3103_tuner_writereg(state, 0x08, 0x01); -+ } -+ else if(state->tuner_id == TS2022_ID){ -+ /* TS2022 init */ -+ m88ds3103_tuner_writereg(state, 0x62, 0x6c); -+ msleep(2); -+ m88ds3103_tuner_writereg(state, 0x42, 0x6c); -+ msleep(2); -+ m88ds3103_tuner_writereg(state, 0x7d, 0x9d); -+ m88ds3103_tuner_writereg(state, 0x7c, 0x9a); -+ m88ds3103_tuner_writereg(state, 0x7a, 0x76); -+ -+ m88ds3103_tuner_writereg(state, 0x3b, 0x01); -+ m88ds3103_tuner_writereg(state, 0x63, 0x88); -+ -+ m88ds3103_tuner_writereg(state, 0x61, 0x85); -+ m88ds3103_tuner_writereg(state, 0x22, 0x30); -+ m88ds3103_tuner_writereg(state, 0x30, 0x40); -+ m88ds3103_tuner_writereg(state, 0x20, 0x23); -+ m88ds3103_tuner_writereg(state, 0x24, 0x02); -+ m88ds3103_tuner_writereg(state, 0x12, 0xa0); -+ } -+ -+ if(state->demod_id == DS3103_ID){ -+ m88ds3103_writereg(state, 0x07, 0xe0); -+ m88ds3103_writereg(state, 0x07, 0x00); -+ msleep(1); -+ } -+ m88ds3103_writereg(state, 0xb2, 0x01); -+ -+ /* Load the firmware if required */ -+ ret = m88ds3103_load_firmware(fe); -+ if (ret != 0){ -+ printk(KERN_ERR "%s: Unable initialize firmware\n", __func__); -+ return ret; -+ } -+ if(state->demod_id == DS3103_ID){ -+ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); -+ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); -+ } -+ -+ return 0; -+} -+ -+/* -+ * Initialise or wake up device -+ */ -+static int m88ds3103_initfe(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 val; -+ -+ dprintk("%s()\n", __func__); -+ -+ /* 1st step to wake up demod */ -+ m88ds3103_writereg(state, 0x08, 0x01 | m88ds3103_readreg(state, 0x08)); -+ m88ds3103_writereg(state, 0x04, 0xfe & m88ds3103_readreg(state, 0x04)); -+ m88ds3103_writereg(state, 0x23, 0xef & m88ds3103_readreg(state, 0x23)); -+ -+ /* 2nd step to wake up tuner */ -+ val = m88ds3103_tuner_readreg(state, 0x00) & 0xff; -+ if((val & 0x01) == 0){ -+ m88ds3103_tuner_writereg(state, 0x00, 0x01); -+ msleep(50); -+ } -+ m88ds3103_tuner_writereg(state, 0x00, 0x03); -+ msleep(50); -+ -+ return 0; -+} -+ -+/* Put device to sleep */ -+static int m88ds3103_sleep(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ -+ dprintk("%s()\n", __func__); -+ -+ /* 1st step to sleep tuner */ -+ m88ds3103_tuner_writereg(state, 0x00, 0x00); -+ -+ /* 2nd step to sleep demod */ -+ m88ds3103_writereg(state, 0x08, 0xfe & m88ds3103_readreg(state, 0x08)); -+ m88ds3103_writereg(state, 0x04, 0x01 | m88ds3103_readreg(state, 0x04)); -+ m88ds3103_writereg(state, 0x23, 0x10 | m88ds3103_readreg(state, 0x23)); -+ -+ -+ return 0; -+} -+ -+static struct dvb_frontend_ops m88ds3103_ops = { -+ .delsys = { SYS_DVBS, SYS_DVBS2}, -+ .info = { -+ .name = "Montage DS3103/TS2022", -+ .type = FE_QPSK, -+ .frequency_min = 950000, -+ .frequency_max = 2150000, -+ .frequency_stepsize = 1011, /* kHz for QPSK frontends */ -+ .frequency_tolerance = 5000, -+ .symbol_rate_min = 1000000, -+ .symbol_rate_max = 45000000, -+ .caps = FE_CAN_INVERSION_AUTO | -+ FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | -+ FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | -+ FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | -+ FE_CAN_2G_MODULATION | -+ FE_CAN_QPSK | FE_CAN_RECOVER -+ }, -+ -+ .release = m88ds3103_release, -+ -+ .init = m88ds3103_initfe, -+ .sleep = m88ds3103_sleep, -+ .read_status = m88ds3103_read_status, -+ .read_ber = m88ds3103_read_ber, -+ .read_signal_strength = m88ds3103_read_signal_strength, -+ .read_snr = m88ds3103_read_snr, -+ .read_ucblocks = m88ds3103_read_ucblocks, -+ .set_tone = m88ds3103_set_tone, -+ .set_voltage = m88ds3103_set_voltage, -+ .diseqc_send_master_cmd = m88ds3103_send_diseqc_msg, -+ .diseqc_send_burst = m88ds3103_diseqc_send_burst, -+ .get_frontend_algo = m88ds3103_get_algo, -+ .tune = m88ds3103_tune, -+ .set_frontend = m88ds3103_set_frontend, -+}; -+ -+MODULE_DESCRIPTION("DVB Frontend module for Montage DS3103/TS2022 hardware"); -+MODULE_AUTHOR("Max nibble"); -+MODULE_LICENSE("GPL"); -diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h ---- a/drivers/media/dvb-frontends/m88ds3103.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88ds3103.h 2013-01-20 21:27:41.923422263 +0800 -@@ -0,0 +1,53 @@ -+/* -+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#ifndef M88DS3103_H -+#define M88DS3103_H -+ -+#include -+ -+struct m88ds3103_config { -+ /* the demodulator's i2c address */ -+ u8 demod_address; -+ u8 ci_mode; -+ u8 pin_ctrl; -+ u8 ts_mode; /* 0: Parallel, 1: Serial */ -+ -+ /* Set device param to start dma */ -+ int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured); -+ /* Start to transfer data */ -+ int (*start_ctrl)(struct dvb_frontend *fe); -+ /* Set LNB voltage */ -+ int (*set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage); -+}; -+ -+#if defined(CONFIG_DVB_M88DS3103) || \ -+ (defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE)) -+extern struct dvb_frontend *m88ds3103_attach( -+ const struct m88ds3103_config *config, -+ struct i2c_adapter *i2c); -+#else -+static inline struct dvb_frontend *m88ds3103_attach( -+ const struct m88ds3103_config *config, -+ struct i2c_adapter *i2c) -+{ -+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); -+ return NULL; -+} -+#endif /* CONFIG_DVB_M88DS3103 */ -+#endif /* M88DS3103_H */ -diff -urN a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-frontends/m88ds3103_priv.h ---- a/drivers/media/dvb-frontends/m88ds3103_priv.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88ds3103_priv.h 2013-01-20 21:27:46.223422378 +0800 -@@ -0,0 +1,403 @@ -+/* -+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#ifndef M88DS3103_PRIV_H -+#define M88DS3103_PRIV_H -+ -+#define FW_DOWN_SIZE 32 -+#define FW_DOWN_LOOP (8192/FW_DOWN_SIZE) -+#define DS3103_DEFAULT_FIRMWARE "dvb-fe-ds3103.fw" -+#define DS3000_DEFAULT_FIRMWARE "dvb-fe-ds300x.fw" -+#define MT_FE_MCLK_KHZ 96000 /* in kHz */ -+#define MT_FE_CRYSTAL_KHZ 27000 /* in kHz */ -+#define FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz 3000 -+#define DS3000_ID 0x3000 -+#define DS3103_ID 0x3103 -+#define TS2020_ID 0x2020 -+#define TS2022_ID 0x2022 -+#define UNKNOW_ID 0x0000 -+ -+struct m88ds3103_state { -+ struct i2c_adapter *i2c; -+ const struct m88ds3103_config *config; -+ -+ struct dvb_frontend frontend; -+ -+ u32 preBer; -+ u8 skip_fw_load; -+ u8 first_lock; /* The first time of signal lock */ -+ u16 demod_id; /* demod chip type */ -+ u16 tuner_id; /* tuner chip type */ -+ fe_delivery_system_t delivery_system; -+}; -+ -+/* For M88DS3103 demod dvbs mode.*/ -+static u8 ds3103_dvbs_init_tab[] = { -+ 0x23, 0x07, -+ 0x08, 0x03, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x31, 0x40, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x80, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0xc8, -+ 0x50, 0x36, -+ 0x51, 0x36, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x63, 0x0f, -+ 0x64, 0x30, -+ 0x65, 0x40, -+ 0x68, 0x26, -+ 0x69, 0x4c, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0x76, 0x38, -+ 0x77, 0xa6, -+ 0x78, 0x0c, -+ 0x79, 0x80, -+ 0x7f, 0x14, -+ 0x7c, 0x00, -+ 0xae, 0x82, -+ 0x80, 0x64, -+ 0x81, 0x66, -+ 0x82, 0x44, -+ 0x85, 0x04, -+ 0xcd, 0xf4, -+ 0x90, 0x33, -+ 0xa0, 0x44, -+ 0xc0, 0x08, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0xf0, -+ 0xc6, 0xff, -+ 0xc7, 0x00, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xe0, 0xf8, -+ 0xe6, 0x8b, -+ 0xd0, 0x40, -+ 0xf8, 0x20, -+ 0xfa, 0x0f, -+ 0x00, 0x00, -+ 0xbd, 0x01, -+ 0xb8, 0x00, -+}; -+/* For M88DS3103 demod dvbs2 mode.*/ -+static u8 ds3103_dvbs2_init_tab[] = { -+ 0x23, 0x07, -+ 0x08, 0x07, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x80, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0xc8, -+ 0x50, 0x36, -+ 0x51, 0x36, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x63, 0x0f, -+ 0x64, 0x10, -+ 0x65, 0x20, -+ 0x68, 0x46, -+ 0x69, 0xcd, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0x76, 0x38, -+ 0x77, 0xa6, -+ 0x78, 0x0c, -+ 0x79, 0x80, -+ 0x7f, 0x14, -+ 0x85, 0x08, -+ 0xcd, 0xf4, -+ 0x90, 0x33, -+ 0x86, 0x00, -+ 0x87, 0x0f, -+ 0x89, 0x00, -+ 0x8b, 0x44, -+ 0x8c, 0x66, -+ 0x9d, 0xc1, -+ 0x8a, 0x10, -+ 0xad, 0x40, -+ 0xa0, 0x44, -+ 0xc0, 0x08, -+ 0xc1, 0x10, -+ 0xc2, 0x08, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0xf0, -+ 0xc6, 0xff, -+ 0xc7, 0x00, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xca, 0x23, -+ 0xcb, 0x24, -+ 0xcc, 0xf4, -+ 0xce, 0x74, -+ 0x00, 0x00, -+ 0xbd, 0x01, -+ 0xb8, 0x00, -+}; -+ -+/* For M88DS3000 demod dvbs mode.*/ -+static u8 ds3000_dvbs_init_tab[] = { -+ 0x23, 0x05, -+ 0x08, 0x03, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x31, 0x40, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x40, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0xc8, -+ 0x50, 0x77, -+ 0x51, 0x77, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x56, 0x01, -+ 0x63, 0x47, -+ 0x64, 0x30, -+ 0x65, 0x40, -+ 0x68, 0x26, -+ 0x69, 0x4c, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0x76, 0x00, -+ 0x77, 0xd1, -+ 0x78, 0x0c, -+ 0x79, 0x80, -+ 0x7f, 0x04, -+ 0x7c, 0x00, -+ 0x80, 0x86, -+ 0x81, 0xa6, -+ 0x85, 0x04, -+ 0xcd, 0xf4, -+ 0x90, 0x33, -+ 0xa0, 0x44, -+ 0xc0, 0x18, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0x80, -+ 0xc6, 0x80, -+ 0xc7, 0x0a, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xfe, 0xb6, -+ 0xe0, 0xf8, -+ 0xe6, 0x8b, -+ 0xd0, 0x40, -+ 0xf8, 0x20, -+ 0xfa, 0x0f, -+ 0xad, 0x20, -+ 0xae, 0x07, -+ 0xb8, 0x00, -+}; -+ -+/* For M88DS3000 demod dvbs2 mode.*/ -+static u8 ds3000_dvbs2_init_tab[] = { -+ 0x23, 0x0f, -+ 0x08, 0x07, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x31, 0x32, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x80, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0x88, -+ 0x50, 0x36, -+ 0x51, 0x36, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x63, 0x60, -+ 0x64, 0x10, -+ 0x65, 0x10, -+ 0x68, 0x04, -+ 0x69, 0x29, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0xa0, 0x44, -+ 0xc0, 0x08, -+ 0xc1, 0x10, -+ 0xc2, 0x08, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0xf0, -+ 0xc6, 0xf0, -+ 0xc7, 0x0a, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xca, 0x23, -+ 0xcb, 0x24, -+ 0xce, 0x74, -+ 0x56, 0x01, -+ 0x90, 0x03, -+ 0x76, 0x80, -+ 0x77, 0x42, -+ 0x78, 0x0a, -+ 0x79, 0x80, -+ 0xad, 0x40, -+ 0xae, 0x07, -+ 0x7f, 0xd4, -+ 0x7c, 0x00, -+ 0x80, 0xa8, -+ 0x81, 0xda, -+ 0x7c, 0x01, -+ 0x80, 0xda, -+ 0x81, 0xec, -+ 0x7c, 0x02, -+ 0x80, 0xca, -+ 0x81, 0xeb, -+ 0x7c, 0x03, -+ 0x80, 0xba, -+ 0x81, 0xdb, -+ 0x85, 0x08, -+ 0x86, 0x00, -+ 0x87, 0x02, -+ 0x89, 0x80, -+ 0x8b, 0x44, -+ 0x8c, 0xaa, -+ 0x8a, 0x10, -+ 0xba, 0x00, -+ 0xf5, 0x04, -+ 0xd2, 0x32, -+ 0xb8, 0x00, -+}; -+ -+#endif /* M88DS3103_PRIV_H */ -diff -urN a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile ---- a/drivers/media/dvb-frontends/Makefile 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/dvb-frontends/Makefile 2013-01-20 21:27:52.475422546 +0800 -@@ -102,4 +102,6 @@ - obj-$(CONFIG_DVB_RTL2832) += rtl2832.o - obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o - obj-$(CONFIG_DVB_AF9033) += af9033.o -+obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o -+obj-$(CONFIG_DVB_M88DC2800) += m88dc2800.o - -diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c ---- a/drivers/media/pci/cx23885/cimax2.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cimax2.c 2013-01-20 21:28:10.223423023 +0800 -@@ -412,7 +412,7 @@ - return state->status; - } - --int netup_ci_init(struct cx23885_tsport *port) -+int netup_ci_init(struct cx23885_tsport *port, bool isDVBSky) - { - struct netup_ci_state *state; - u8 cimax_init[34] = { -@@ -461,6 +461,11 @@ - goto err; - } - -+ if(isDVBSky) { -+ cimax_init[32] = 0x22; -+ cimax_init[33] = 0x00; -+ } -+ - port->port_priv = state; - - switch (port->nr) { -@@ -534,3 +539,19 @@ - dvb_ca_en50221_release(&state->ca); - kfree(state); - } -+ -+/* CI irq handler for DVBSky board*/ -+int dvbsky_ci_slot_status(struct cx23885_dev *dev) -+{ -+ struct cx23885_tsport *port = NULL; -+ struct netup_ci_state *state = NULL; -+ -+ ci_dbg_print("%s:\n", __func__); -+ -+ port = &dev->ts1; -+ state = port->port_priv; -+ schedule_work(&state->work); -+ ci_dbg_print("%s: Wakeup CI0\n", __func__); -+ -+ return 1; -+} -diff -urN a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h ---- a/drivers/media/pci/cx23885/cimax2.h 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cimax2.h 2013-01-20 21:28:22.119423339 +0800 -@@ -41,7 +41,9 @@ - extern int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status); - extern int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, - int slot, int open); --extern int netup_ci_init(struct cx23885_tsport *port); -+extern int netup_ci_init(struct cx23885_tsport *port, bool isDVBSky); - extern void netup_ci_exit(struct cx23885_tsport *port); - -+extern int dvbsky_ci_slot_status(struct cx23885_dev *dev); -+ - #endif -diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c ---- a/drivers/media/pci/cx23885/cx23885-cards.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-cards.c 2013-01-20 21:28:34.671423677 +0800 -@@ -569,9 +569,32 @@ - .name = "TeVii S471", - .portb = CX23885_MPEG_DVB, - }, -- [CX23885_BOARD_PROF_8000] = { -- .name = "Prof Revolution DVB-S2 8000", -+ [CX23885_BOARD_BST_PS8512] = { -+ .name = "Bestunar PS8512", - .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_S950] = { -+ .name = "DVBSKY S950", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_S952] = { -+ .name = "DVBSKY S952", -+ .portb = CX23885_MPEG_DVB, -+ .portc = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_S950_CI] = { -+ .ci_type = 3, -+ .name = "DVBSKY S950CI DVB-S2 CI", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_C2800E_CI] = { -+ .ci_type = 3, -+ .name = "DVBSKY C2800E DVB-C CI", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_PROF_8000] = { -+ .name = "Prof Revolution DVB-S2 8000", -+ .portb = CX23885_MPEG_DVB, - } - }; - const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); -@@ -785,9 +808,29 @@ - .subdevice = 0x9022, - .card = CX23885_BOARD_TEVII_S471, - }, { -- .subvendor = 0x8000, -- .subdevice = 0x3034, -- .card = CX23885_BOARD_PROF_8000, -+ .subvendor = 0x14f1, -+ .subdevice = 0x8512, -+ .card = CX23885_BOARD_BST_PS8512, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x0950, -+ .card = CX23885_BOARD_DVBSKY_S950, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x0952, -+ .card = CX23885_BOARD_DVBSKY_S952, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x950C, -+ .card = CX23885_BOARD_DVBSKY_S950_CI, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x2800, -+ .card = CX23885_BOARD_DVBSKY_C2800E_CI, -+ }, { -+ .subvendor = 0x8000, -+ .subdevice = 0x3034, -+ .card = CX23885_BOARD_PROF_8000, - }, - }; - const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); -@@ -1167,7 +1210,7 @@ - cx_set(GP0_IO, 0x00040004); - break; - case CX23885_BOARD_TBS_6920: -- case CX23885_BOARD_PROF_8000: -+ case CX23885_BOARD_PROF_8000: - cx_write(MC417_CTL, 0x00000036); - cx_write(MC417_OEN, 0x00001000); - cx_set(MC417_RWD, 0x00000002); -@@ -1301,9 +1344,83 @@ - /* enable irq */ - cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ - break; -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_BST_PS8512: -+ cx23885_gpio_enable(dev, GPIO_2, 1); -+ cx23885_gpio_clear(dev, GPIO_2); -+ msleep(100); -+ cx23885_gpio_set(dev, GPIO_2); -+ break; -+ case CX23885_BOARD_DVBSKY_S952: -+ cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ -+ -+ cx23885_gpio_enable(dev, GPIO_2, 1); -+ cx23885_gpio_enable(dev, GPIO_11, 1); -+ -+ cx23885_gpio_clear(dev, GPIO_2); -+ cx23885_gpio_clear(dev, GPIO_11); -+ msleep(100); -+ cx23885_gpio_set(dev, GPIO_2); -+ cx23885_gpio_set(dev, GPIO_11); -+ break; -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ /* GPIO-0 INTA from CiMax, input -+ GPIO-1 reset CiMax, output, high active -+ GPIO-2 reset demod, output, low active -+ GPIO-3 to GPIO-10 data/addr for CAM -+ GPIO-11 ~CS0 to CiMax1 -+ GPIO-12 ~CS1 to CiMax2 -+ GPIO-13 ADL0 load LSB addr -+ GPIO-14 ADL1 load MSB addr -+ GPIO-15 ~RDY from CiMax -+ GPIO-17 ~RD to CiMax -+ GPIO-18 ~WR to CiMax -+ */ -+ cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ -+ cx_clear(GP0_IO, 0x00010004); /*GPIO 0 as input*/ -+ mdelay(100);/* reset delay */ -+ cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ -+ cx_clear(GP0_IO, 0x00010002); -+ cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ -+ /* GPIO-15 IN as ~ACK, rest as OUT */ -+ cx_write(MC417_OEN, 0x00001000); -+ /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ -+ cx_write(MC417_RWD, 0x0000c300); -+ /* enable irq */ -+ cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ -+ break; - } - } - -+static int cx23885_ir_patch(struct i2c_adapter *i2c, u8 reg, u8 mask) -+{ -+ struct i2c_msg msgs[2]; -+ u8 tx_buf[2], rx_buf[1]; -+ /* Write register address */ -+ tx_buf[0] = reg; -+ msgs[0].addr = 0x4c; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = (char *) tx_buf; -+ /* Read data from register */ -+ msgs[1].addr = 0x4c; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = 1; -+ msgs[1].buf = (char *) rx_buf; -+ -+ i2c_transfer(i2c, msgs, 2); -+ -+ tx_buf[0] = reg; -+ tx_buf[1] = rx_buf[0] | mask; -+ msgs[0].addr = 0x4c; -+ msgs[0].flags = 0; -+ msgs[0].len = 2; -+ msgs[0].buf = (char *) tx_buf; -+ -+ return i2c_transfer(i2c, msgs, 1); -+} -+ - int cx23885_ir_init(struct cx23885_dev *dev) - { - static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { -@@ -1388,6 +1505,22 @@ - v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, - ir_rx_pin_cfg_count, ir_rx_pin_cfg); - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); -+ if (dev->sd_ir == NULL) { -+ ret = -ENODEV; -+ break; -+ } -+ v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, -+ ir_rx_pin_cfg_count, ir_rx_pin_cfg); -+ -+ cx23885_ir_patch(&(dev->i2c_bus[2].i2c_adap),0x1f,0x80); -+ cx23885_ir_patch(&(dev->i2c_bus[2].i2c_adap),0x23,0x80); -+ break; - case CX23885_BOARD_HAUPPAUGE_HVR1250: - if (!enable_885_ir) - break; -@@ -1420,6 +1553,11 @@ - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - cx23885_irq_remove(dev, PCI_MSK_AV_CORE); - /* sd_ir is a duplicate pointer to the AV Core, just clear it */ - dev->sd_ir = NULL; -@@ -1464,6 +1602,11 @@ - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - if (dev->sd_ir) - cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); - break; -@@ -1549,6 +1692,10 @@ - ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ - ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_TEVII_S471: - case CX23885_BOARD_DVBWORLD_2005: -@@ -1581,6 +1728,14 @@ - ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ - ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; - break; -+ case CX23885_BOARD_DVBSKY_S952: -+ ts1->gen_ctrl_val = 0x5; /* Parallel */ -+ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ -+ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; -+ ts2->gen_ctrl_val = 0xe; /* Serial bus + punctured clock */ -+ ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ -+ ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; -+ break; - case CX23885_BOARD_HAUPPAUGE_HVR1250: - case CX23885_BOARD_HAUPPAUGE_HVR1500: - case CX23885_BOARD_HAUPPAUGE_HVR1500Q: -@@ -1636,6 +1791,11 @@ - case CX23885_BOARD_MPX885: - case CX23885_BOARD_MYGICA_X8507: - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, - &dev->i2c_bus[2].i2c_adap, - "cx25840", 0x88 >> 1, NULL); -diff -urN a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c ---- a/drivers/media/pci/cx23885/cx23885-core.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-core.c 2013-01-20 21:28:42.383423884 +0800 -@@ -1911,6 +1911,10 @@ - (pci_status & PCI_MSK_GPIO0)) - handled += altera_ci_irq(dev); - -+ if (cx23885_boards[dev->board].ci_type == 3 && -+ (pci_status & PCI_MSK_GPIO0)) -+ handled += dvbsky_ci_slot_status(dev); -+ - if (ts1_status) { - if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) - handled += cx23885_irq_ts(ts1, ts1_status); -@@ -2146,6 +2150,8 @@ - cx23885_irq_add_enable(dev, PCI_MSK_GPIO1 | PCI_MSK_GPIO0); - break; - case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - cx23885_irq_add_enable(dev, PCI_MSK_GPIO0); - break; - } -diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c ---- a/drivers/media/pci/cx23885/cx23885-dvb.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-dvb.c 2013-01-20 21:28:48.763424057 +0800 -@@ -51,6 +51,8 @@ - #include "stv6110.h" - #include "lnbh24.h" - #include "cx24116.h" -+#include "m88ds3103.h" -+#include "m88dc2800.h" - #include "cimax2.h" - #include "lgs8gxx.h" - #include "netup-eeprom.h" -@@ -63,8 +65,8 @@ - #include "stv0367.h" - #include "drxk.h" - #include "mt2063.h" --#include "stv090x.h" --#include "stb6100.h" -+#include "stv090x.h" -+#include "stb6100.h" - #include "stb6100_cfg.h" - - static unsigned int debug; -@@ -492,40 +494,76 @@ - .if_khz = 5380, - }; - --static struct stv090x_config prof_8000_stv090x_config = { -- .device = STV0903, -- .demod_mode = STV090x_SINGLE, -- .clk_mode = STV090x_CLK_EXT, -- .xtal = 27000000, -- .address = 0x6A, -- .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, -- .repeater_level = STV090x_RPTLEVEL_64, -- .adc1_range = STV090x_ADC_2Vpp, -- .diseqc_envelope_mode = false, -- -- .tuner_get_frequency = stb6100_get_frequency, -- .tuner_set_frequency = stb6100_set_frequency, -- .tuner_set_bandwidth = stb6100_set_bandwidth, -- .tuner_get_bandwidth = stb6100_get_bandwidth, --}; -- --static struct stb6100_config prof_8000_stb6100_config = { -- .tuner_address = 0x60, -- .refclock = 27000000, -+/* bestunar single dvb-s2 */ -+static struct m88ds3103_config bst_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 0, -+ .pin_ctrl = 0x82, -+ .ts_mode = 0, -+ .set_voltage = bst_set_voltage, -+}; -+/* DVBSKY dual dvb-s2 */ -+static struct m88ds3103_config dvbsky_ds3103_config_pri = { -+ .demod_address = 0x68, -+ .ci_mode = 0, -+ .pin_ctrl = 0x82, -+ .ts_mode = 0, -+ .set_voltage = bst_set_voltage, -+}; -+static struct m88ds3103_config dvbsky_ds3103_config_sec = { -+ .demod_address = 0x68, -+ .ci_mode = 0, -+ .pin_ctrl = 0x82, -+ .ts_mode = 1, -+ .set_voltage = dvbsky_set_voltage_sec, - }; - --static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) --{ -- struct cx23885_tsport *port = fe->dvb->priv; -- struct cx23885_dev *dev = port->dev; -- -- if (voltage == SEC_VOLTAGE_18) -- cx_write(MC417_RWD, 0x00001e00); -- else if (voltage == SEC_VOLTAGE_13) -- cx_write(MC417_RWD, 0x00001a00); -- else -- cx_write(MC417_RWD, 0x00001800); -- return 0; -+static struct m88ds3103_config dvbsky_ds3103_ci_config = { -+ .demod_address = 0x68, -+ .ci_mode = 2, -+ .pin_ctrl = 0x82, -+ .ts_mode = 0, -+}; -+ -+static struct m88dc2800_config dvbsky_dc2800_config = { -+ .demod_address = 0x1c, -+ .ts_mode = 3, -+}; -+ -+static struct stv090x_config prof_8000_stv090x_config = { -+ .device = STV0903, -+ .demod_mode = STV090x_SINGLE, -+ .clk_mode = STV090x_CLK_EXT, -+ .xtal = 27000000, -+ .address = 0x6A, -+ .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, -+ .repeater_level = STV090x_RPTLEVEL_64, -+ .adc1_range = STV090x_ADC_2Vpp, -+ .diseqc_envelope_mode = false, -+ -+ .tuner_get_frequency = stb6100_get_frequency, -+ .tuner_set_frequency = stb6100_set_frequency, -+ .tuner_set_bandwidth = stb6100_set_bandwidth, -+ .tuner_get_bandwidth = stb6100_get_bandwidth, -+}; -+ -+static struct stb6100_config prof_8000_stb6100_config = { -+ .tuner_address = 0x60, -+ .refclock = 27000000, -+}; -+ -+static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ if (voltage == SEC_VOLTAGE_18) -+ cx_write(MC417_RWD, 0x00001e00); -+ else if (voltage == SEC_VOLTAGE_13) -+ cx_write(MC417_RWD, 0x00001a00); -+ else -+ cx_write(MC417_RWD, 0x00001800); -+ return 0; - } - - static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) -@@ -1225,22 +1263,63 @@ - &tevii_ds3000_config, - &i2c_bus->i2c_adap); - break; -- case CX23885_BOARD_PROF_8000: -- i2c_bus = &dev->i2c_bus[0]; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &bst_ds3103_config, -+ &i2c_bus->i2c_adap); -+ break; -+ -+ case CX23885_BOARD_DVBSKY_S952: -+ switch (port->nr) { -+ /* port B */ -+ case 1: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config_pri, -+ &i2c_bus->i2c_adap); -+ break; -+ /* port C */ -+ case 2: -+ i2c_bus = &dev->i2c_bus[0]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config_sec, -+ &i2c_bus->i2c_adap); -+ break; -+ } -+ break; - -- fe0->dvb.frontend = dvb_attach(stv090x_attach, -- &prof_8000_stv090x_config, -- &i2c_bus->i2c_adap, -- STV090x_DEMODULATOR_0); -- if (fe0->dvb.frontend != NULL) { -- if (!dvb_attach(stb6100_attach, -- fe0->dvb.frontend, -- &prof_8000_stb6100_config, -- &i2c_bus->i2c_adap)) -- goto frontend_detach; -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_ci_config, -+ &i2c_bus->i2c_adap); -+ break; -+ -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88dc2800_attach, -+ &dvbsky_dc2800_config, -+ &i2c_bus->i2c_adap); -+ break; - -- fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; -- } -+ case CX23885_BOARD_PROF_8000: -+ i2c_bus = &dev->i2c_bus[0]; -+ -+ fe0->dvb.frontend = dvb_attach(stv090x_attach, -+ &prof_8000_stv090x_config, -+ &i2c_bus->i2c_adap, -+ STV090x_DEMODULATOR_0); -+ if (fe0->dvb.frontend != NULL) { -+ if (!dvb_attach(stb6100_attach, -+ fe0->dvb.frontend, -+ &prof_8000_stb6100_config, -+ &i2c_bus->i2c_adap)) -+ goto frontend_detach; -+ -+ fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; -+ } - break; - default: - printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " -@@ -1289,7 +1368,7 @@ - printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", - port->nr, port->frontends.adapter.proposed_mac); - -- netup_ci_init(port); -+ netup_ci_init(port, false); - break; - } - case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { -@@ -1316,6 +1395,40 @@ - memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); - break; - } -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952:{ -+ u8 eeprom[256]; /* 24C02 i2c eeprom */ -+ -+ if(port->nr > 2) -+ break; -+ -+ dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; -+ tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); -+ printk(KERN_INFO "DVBSKY PCIe MAC= %pM\n", eeprom + 0xc0+(port->nr-1)*8); -+ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + -+ (port->nr-1)*8, 6); -+ break; -+ } -+ case CX23885_BOARD_DVBSKY_S950_CI: { -+ u8 eeprom[256]; /* 24C02 i2c eeprom */ -+ -+ if(port->nr > 2) -+ break; -+ -+ dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; -+ tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); -+ printk(KERN_INFO "DVBSKY PCIe MAC= %pM\n", eeprom + 0xc0+(port->nr-1)*8); -+ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + -+ (port->nr-1)*8, 6); -+ -+ netup_ci_init(port, true); -+ break; -+ } -+ case CX23885_BOARD_DVBSKY_C2800E_CI: { -+ netup_ci_init(port, true); -+ break; -+ } - } - - return ret; -@@ -1398,6 +1511,8 @@ - - switch (port->dev->board) { - case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - netup_ci_exit(port); - break; - case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: -diff -urN a/drivers/media/pci/cx23885/cx23885-f300.c b/drivers/media/pci/cx23885/cx23885-f300.c ---- a/drivers/media/pci/cx23885/cx23885-f300.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-f300.c 2013-01-20 21:28:54.147424198 +0800 -@@ -175,3 +175,58 @@ - - return f300_xfer(fe, buf); - } -+ -+/* bst control */ -+int bst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ cx23885_gpio_enable(dev, GPIO_1, 1); -+ cx23885_gpio_enable(dev, GPIO_0, 1); -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx23885_gpio_set(dev, GPIO_1); -+ cx23885_gpio_clear(dev, GPIO_0); -+ break; -+ case SEC_VOLTAGE_18: -+ cx23885_gpio_set(dev, GPIO_1); -+ cx23885_gpio_set(dev, GPIO_0); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx23885_gpio_clear(dev, GPIO_1); -+ cx23885_gpio_clear(dev, GPIO_0); -+ break; -+ } -+ -+ -+ return 0; -+} -+ -+int dvbsky_set_voltage_sec(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ cx23885_gpio_enable(dev, GPIO_12, 1); -+ cx23885_gpio_enable(dev, GPIO_13, 1); -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx23885_gpio_set(dev, GPIO_13); -+ cx23885_gpio_clear(dev, GPIO_12); -+ break; -+ case SEC_VOLTAGE_18: -+ cx23885_gpio_set(dev, GPIO_13); -+ cx23885_gpio_set(dev, GPIO_12); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx23885_gpio_clear(dev, GPIO_13); -+ cx23885_gpio_clear(dev, GPIO_12); -+ break; -+ } -+ -+ -+ return 0; -+} -\ No newline at end of file -diff -urN a/drivers/media/pci/cx23885/cx23885-f300.h b/drivers/media/pci/cx23885/cx23885-f300.h ---- a/drivers/media/pci/cx23885/cx23885-f300.h 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-f300.h 2013-01-20 21:28:59.807424351 +0800 -@@ -1,2 +1,8 @@ -+extern int dvbsky_set_voltage_sec(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage); -+ -+extern int bst_set_voltage(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage); -+ - extern int f300_set_voltage(struct dvb_frontend *fe, - fe_sec_voltage_t voltage); -diff -urN a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h ---- a/drivers/media/pci/cx23885/cx23885.h 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885.h 2013-01-20 21:28:28.223423504 +0800 -@@ -90,7 +90,12 @@ - #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 - #define CX23885_BOARD_TEVII_S471 35 - #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 --#define CX23885_BOARD_PROF_8000 37 -+#define CX23885_BOARD_BST_PS8512 37 -+#define CX23885_BOARD_DVBSKY_S952 38 -+#define CX23885_BOARD_DVBSKY_S950 39 -+#define CX23885_BOARD_DVBSKY_S950_CI 40 -+#define CX23885_BOARD_DVBSKY_C2800E_CI 41 -+#define CX23885_BOARD_PROF_8000 42 - - #define GPIO_0 0x00000001 - #define GPIO_1 0x00000002 -@@ -229,7 +234,7 @@ - */ - u32 clk_freq; - struct cx23885_input input[MAX_CX23885_INPUT]; -- int ci_type; /* for NetUP */ -+ int ci_type; /* 1 and 2 for NetUP, 3 for DVBSky. */ - /* Force bottom field first during DMA (888 workaround) */ - u32 force_bff; - }; -diff -urN a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c ---- a/drivers/media/pci/cx23885/cx23885-input.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-input.c 2013-01-20 21:29:04.859424485 +0800 -@@ -88,6 +88,11 @@ - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - /* - * The only boards we handle right now. However other boards - * using the CX2388x integrated IR controller should be similar -@@ -139,6 +144,11 @@ - case CX23885_BOARD_HAUPPAUGE_HVR1850: - case CX23885_BOARD_HAUPPAUGE_HVR1290: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - /* - * The IR controller on this board only returns pulse widths. - * Any other mode setting will fail to set up the device. -@@ -274,12 +284,12 @@ - /* The grey Hauppauge RC-5 remote */ - rc_map = RC_MAP_HAUPPAUGE; - break; -- case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: -- /* Integrated CX23885 IR controller */ -- driver_type = RC_DRIVER_IR_RAW; -- allowed_protos = RC_TYPE_NEC; -- /* The grey Terratec remote with orange buttons */ -- rc_map = RC_MAP_NEC_TERRATEC_CINERGY_XS; -+ case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: -+ /* Integrated CX23885 IR controller */ -+ driver_type = RC_DRIVER_IR_RAW; -+ allowed_protos = RC_TYPE_NEC; -+ /* The grey Terratec remote with orange buttons */ -+ rc_map = RC_MAP_NEC_TERRATEC_CINERGY_XS; - break; - case CX23885_BOARD_TEVII_S470: - /* Integrated CX23885 IR controller */ -@@ -288,6 +298,17 @@ - /* A guess at the remote */ - rc_map = RC_MAP_TEVII_NEC; - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ /* Integrated CX2388[58] IR controller */ -+ driver_type = RC_DRIVER_IR_RAW; -+ allowed_protos = RC_TYPE_ALL; -+ /* A guess at the remote */ -+ rc_map = RC_MAP_DVBSKY; -+ break; - default: - return -ENODEV; - } -diff -urN a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig ---- a/drivers/media/pci/cx23885/Kconfig 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx23885/Kconfig 2013-01-20 21:29:11.111424653 +0800 -@@ -23,6 +23,8 @@ - select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DC2800 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT - select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0367 if MEDIA_SUBDRV_AUTOSELECT -diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c ---- a/drivers/media/pci/cx88/cx88-cards.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88-cards.c 2013-01-20 21:29:28.799425126 +0800 -@@ -2309,6 +2309,18 @@ - } }, - .mpeg = CX88_MPEG_DVB, - }, -+ [CX88_BOARD_BST_PS8312] = { -+ .name = "Bestunar PS8312 DVB-S/S2", -+ .tuner_type = UNSET, -+ .radio_type = UNSET, -+ .tuner_addr = ADDR_UNSET, -+ .radio_addr = ADDR_UNSET, -+ .input = {{ -+ .type = CX88_VMUX_DVB, -+ .vmux = 0, -+ } }, -+ .mpeg = CX88_MPEG_DVB, -+ }, - }; - - /* ------------------------------------------------------------------ */ -@@ -2813,6 +2825,10 @@ - .subvendor = 0x1822, - .subdevice = 0x0023, - .card = CX88_BOARD_TWINHAN_VP1027_DVBS, -+ }, { -+ .subvendor = 0x14f1, -+ .subdevice = 0x8312, -+ .card = CX88_BOARD_BST_PS8312, - }, - }; - -@@ -3547,6 +3563,12 @@ - cx_write(MO_SRST_IO, 1); - msleep(100); - break; -+ case CX88_BOARD_BST_PS8312: -+ cx_write(MO_GP1_IO, 0x808000); -+ msleep(100); -+ cx_write(MO_GP1_IO, 0x808080); -+ msleep(100); -+ break; - } /*end switch() */ - - -diff -urN a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.c ---- a/drivers/media/pci/cx88/cx88-dvb.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88-dvb.c 2013-01-20 21:29:34.271425273 +0800 -@@ -54,6 +54,7 @@ - #include "stv0288.h" - #include "stb6000.h" - #include "cx24116.h" -+#include "m88ds3103.h" - #include "stv0900.h" - #include "stb6100.h" - #include "stb6100_proc.h" -@@ -458,6 +459,56 @@ - return core->prev_set_voltage(fe, voltage); - return 0; - } -+/*CX88_BOARD_BST_PS8312*/ -+static int bst_dvbs_set_voltage(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage) -+{ -+ struct cx8802_dev *dev= fe->dvb->priv; -+ struct cx88_core *core = dev->core; -+ -+ cx_write(MO_GP1_IO, 0x111111); -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx_write(MO_GP1_IO, 0x020200); -+ break; -+ case SEC_VOLTAGE_18: -+ cx_write(MO_GP1_IO, 0x020202); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx_write(MO_GP1_IO, 0x111100); -+ break; -+ } -+ -+ if (core->prev_set_voltage) -+ return core->prev_set_voltage(fe, voltage); -+ return 0; -+} -+ -+static int bst_dvbs_set_voltage_v2(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage) -+{ -+ struct cx8802_dev *dev= fe->dvb->priv; -+ struct cx88_core *core = dev->core; -+ -+ cx_write(MO_GP1_IO, 0x111101); -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx_write(MO_GP1_IO, 0x020200); -+ break; -+ case SEC_VOLTAGE_18: -+ -+ cx_write(MO_GP1_IO, 0x020202); -+ break; -+ case SEC_VOLTAGE_OFF: -+ -+ cx_write(MO_GP1_IO, 0x111110); -+ break; -+ } -+ -+ if (core->prev_set_voltage) -+ return core->prev_set_voltage(fe, voltage); -+ return 0; -+} - - static int vp1027_set_voltage(struct dvb_frontend *fe, - fe_sec_voltage_t voltage) -@@ -700,6 +751,11 @@ - .set_ts_params = ds3000_set_ts_param, - }; - -+static struct m88ds3103_config dvbsky_ds3103_config = { -+ .demod_address = 0x68, -+ .set_ts_params = ds3000_set_ts_param, -+}; -+ - static const struct stv0900_config prof_7301_stv0900_config = { - .demod_address = 0x6a, - /* demod_mode = 0,*/ -@@ -1470,6 +1526,35 @@ - fe0->dvb.frontend->ops.set_voltage = - tevii_dvbs_set_voltage; - break; -+ case CX88_BOARD_BST_PS8312: -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config, -+ &core->i2c_adap); -+ if (fe0->dvb.frontend != NULL){ -+ int ret; -+ u8 b0[] = { 0x60 }; -+ u8 b1[2] = { 0 }; -+ struct i2c_msg msg[] = { -+ { -+ .addr = 0x50, -+ .flags = 0, -+ .buf = b0, -+ .len = 1 -+ }, { -+ .addr = 0x50, -+ .flags = I2C_M_RD, -+ .buf = b1, -+ .len = 2 -+ } -+ }; -+ ret = i2c_transfer(&core->i2c_adap, msg, 2); -+ printk("PS8312: config = %02x, %02x", b1[0],b1[1]); -+ if(b1[0] == 0xaa) -+ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage_v2; -+ else -+ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage; -+ } -+ break; - case CX88_BOARD_OMICOM_SS4_PCI: - case CX88_BOARD_TBS_8920: - case CX88_BOARD_PROF_7300: -diff -urN a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h ---- a/drivers/media/pci/cx88/cx88.h 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88.h 2013-01-20 21:29:23.279424981 +0800 -@@ -141,7 +141,7 @@ - u32 cnt1_reg; - u32 cnt2_reg; - }; --extern const struct sram_channel cx88_sram_channels[]; -+extern const struct sram_channel const cx88_sram_channels[]; - - /* ----------------------------------------------------------- */ - /* card configuration */ -@@ -238,6 +238,7 @@ - #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88 - #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89 - #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90 -+#define CX88_BOARD_BST_PS8312 91 - - enum cx88_itype { - CX88_VMUX_COMPOSITE1 = 1, -diff -urN a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c ---- a/drivers/media/pci/cx88/cx88-input.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88-input.c 2013-01-20 21:29:39.703425420 +0800 -@@ -419,6 +419,10 @@ - rc_type = RC_TYPE_NEC; - ir->sampling = 0xff00; /* address */ - break; -+ case CX88_BOARD_BST_PS8312: -+ ir_codes = RC_MAP_DVBSKY; -+ ir->sampling = 0xff00; /* address */ -+ break; - } - - if (!ir_codes) { -diff -urN a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig ---- a/drivers/media/pci/cx88/Kconfig 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/pci/cx88/Kconfig 2013-01-20 21:29:45.003425557 +0800 -@@ -57,6 +57,7 @@ - select DVB_ISL6421 if MEDIA_SUBDRV_AUTOSELECT - select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0299 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT -diff -urN a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile ---- a/drivers/media/rc/keymaps/Makefile 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/rc/keymaps/Makefile 2013-01-20 21:30:04.547426084 +0800 -@@ -27,6 +27,7 @@ - rc-dm1105-nec.o \ - rc-dntv-live-dvb-t.o \ - rc-dntv-live-dvbt-pro.o \ -+ rc-dvbsky.o \ - rc-em-terratec.o \ - rc-encore-enltv2.o \ - rc-encore-enltv.o \ -diff -urN a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c ---- a/drivers/media/rc/keymaps/rc-dvbsky.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/rc/keymaps/rc-dvbsky.c 2013-01-20 21:30:09.031426205 +0800 -@@ -0,0 +1,78 @@ -+/* rc-dvbsky.c - Keytable for Dvbsky Remote Controllers -+ * -+ * keymap imported from ir-keymaps.c -+ * -+ * -+ * Copyright (c) 2010-2012 by Nibble Max -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+/* -+ * This table contains the complete RC5 code, instead of just the data part -+ */ -+ -+static struct rc_map_table rc5_dvbsky[] = { -+ { 0x0000, KEY_0 }, -+ { 0x0001, KEY_1 }, -+ { 0x0002, KEY_2 }, -+ { 0x0003, KEY_3 }, -+ { 0x0004, KEY_4 }, -+ { 0x0005, KEY_5 }, -+ { 0x0006, KEY_6 }, -+ { 0x0007, KEY_7 }, -+ { 0x0008, KEY_8 }, -+ { 0x0009, KEY_9 }, -+ { 0x000a, KEY_MUTE }, -+ { 0x000d, KEY_OK }, -+ { 0x000b, KEY_STOP }, -+ { 0x000c, KEY_EXIT }, -+ { 0x000e, KEY_CAMERA }, /*Snap shot*/ -+ { 0x000f, KEY_SUBTITLE }, /*PIP*/ -+ { 0x0010, KEY_VOLUMEUP }, -+ { 0x0011, KEY_VOLUMEDOWN }, -+ { 0x0012, KEY_FAVORITES }, -+ { 0x0013, KEY_LIST }, /*Info*/ -+ { 0x0016, KEY_PAUSE }, -+ { 0x0017, KEY_PLAY }, -+ { 0x001f, KEY_RECORD }, -+ { 0x0020, KEY_CHANNELDOWN }, -+ { 0x0021, KEY_CHANNELUP }, -+ { 0x0025, KEY_POWER2 }, -+ { 0x0026, KEY_REWIND }, -+ { 0x0027, KEY_FASTFORWARD }, -+ { 0x0029, KEY_LAST }, -+ { 0x002b, KEY_MENU }, -+ { 0x002c, KEY_EPG }, -+ { 0x002d, KEY_ZOOM }, -+}; -+ -+static struct rc_map_list rc5_dvbsky_map = { -+ .map = { -+ .scan = rc5_dvbsky, -+ .size = ARRAY_SIZE(rc5_dvbsky), -+ .rc_type = RC_TYPE_RC5, -+ .name = RC_MAP_DVBSKY, -+ } -+}; -+ -+static int __init init_rc_map_rc5_dvbsky(void) -+{ -+ return rc_map_register(&rc5_dvbsky_map); -+} -+ -+static void __exit exit_rc_map_rc5_dvbsky(void) -+{ -+ rc_map_unregister(&rc5_dvbsky_map); -+} -+ -+module_init(init_rc_map_rc5_dvbsky) -+module_exit(exit_rc_map_rc5_dvbsky) -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Nibble Max "); -diff -urN a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c ---- a/drivers/media/usb/dvb-usb/dw2102.c 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/usb/dvb-usb/dw2102.c 2013-01-20 21:30:34.203426878 +0800 -@@ -19,6 +19,7 @@ - #include "stb6000.h" - #include "eds1547.h" - #include "cx24116.h" -+#include "m88ds3103.h" - #include "tda1002x.h" - #include "mt312.h" - #include "zl10039.h" -@@ -830,6 +831,39 @@ - return 0; - } - -+static int dvbsky_read_mac_address(struct dvb_usb_device *d, u8 mac[6]) -+{ -+ int i; -+ u8 obuf[] = { 0x1e, 0x00 }; -+ u8 ibuf[] = { 0 }; -+ struct i2c_msg msg[] = { -+ { -+ .addr = 0x51, -+ .flags = 0, -+ .buf = obuf, -+ .len = 2, -+ }, { -+ .addr = 0x51, -+ .flags = I2C_M_RD, -+ .buf = ibuf, -+ .len = 1, -+ -+ } -+ }; -+ -+ for (i = 0; i < 6; i++) { -+ obuf[1] = i; -+ if (i2c_transfer(&d->i2c_adap, msg, 2) != 2) -+ break; -+ else -+ mac[i] = ibuf[0]; -+ -+ debug_dump(mac, 6, printk); -+ } -+ -+ return 0; -+} -+ - static int su3000_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, -@@ -878,6 +912,43 @@ - return 0; - } - -+static int bstusb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ -+ struct dvb_usb_adapter *udev_adap = -+ (struct dvb_usb_adapter *)(fe->dvb->priv); -+ -+ u8 obuf[3] = { 0xe, 0x80, 0 }; -+ u8 ibuf[] = { 0 }; -+ -+ info("US6830: %s!\n", __func__); -+ -+ if (voltage == SEC_VOLTAGE_OFF) -+ obuf[2] = 0; -+ else -+ obuf[2] = 1; -+ -+ if (dvb_usb_generic_rw(udev_adap->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ return 0; -+} -+ -+static int bstusb_restart(struct dvb_frontend *fe) -+{ -+ -+ struct dvb_usb_adapter *udev_adap = -+ (struct dvb_usb_adapter *)(fe->dvb->priv); -+ -+ u8 obuf[3] = { 0x36, 3, 0 }; -+ u8 ibuf[] = { 0 }; -+ -+ if (dvb_usb_generic_rw(udev_adap->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x36 transfer failed."); -+ -+ return 0; -+} -+ - static void dw210x_led_ctrl(struct dvb_frontend *fe, int offon) - { - static u8 led_off[] = { 0 }; -@@ -983,6 +1054,24 @@ - .ci_mode = 1, - }; - -+static struct m88ds3103_config US6830_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 1, -+ .pin_ctrl = 0x83, -+ .ts_mode = 0, -+ .start_ctrl = bstusb_restart, -+ .set_voltage = bstusb_set_voltage, -+}; -+ -+static struct m88ds3103_config US6832_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 1, -+ .pin_ctrl = 0x80, -+ .ts_mode = 0, -+ .start_ctrl = bstusb_restart, -+ .set_voltage = bstusb_set_voltage, -+}; -+ - static int dw2104_frontend_attach(struct dvb_usb_adapter *d) - { - struct dvb_tuner_ops *tuner_ops = NULL; -@@ -1210,6 +1299,87 @@ - return 0; - } - -+static int US6830_frontend_attach(struct dvb_usb_adapter *d) -+{ -+ u8 obuf[3] = { 0xe, 0x04, 1 }; -+ u8 ibuf[] = { 0 }; -+ -+ info("US6830: %s!\n", __func__); -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 0; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ msleep(20); -+ -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 1; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0x51; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0) -+ err("command 0x51 transfer failed."); -+ -+ d->fe_adap[0].fe = dvb_attach(m88ds3103_attach, &US6830_ds3103_config, -+ &d->dev->i2c_adap); -+ if (d->fe_adap[0].fe == NULL) -+ return -EIO; -+ -+ info("Attached M88DS3103!\n"); -+ -+ return 0; -+} -+ -+static int US6832_frontend_attach(struct dvb_usb_adapter *d) -+{ -+ u8 obuf[3] = { 0xe, 0x04, 1 }; -+ u8 ibuf[] = { 0 }; -+ -+ info("US6832: %s!\n", __func__); -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 0; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ msleep(20); -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 1; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0x51; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0) -+ err("command 0x51 transfer failed."); -+ -+ d->fe_adap[0].fe = dvb_attach(m88ds3103_attach, &US6832_ds3103_config, -+ &d->dev->i2c_adap); -+ if (d->fe_adap[0].fe == NULL) -+ return -EIO; -+ -+ info("Attached M88DS3103!\n"); -+ -+ return 0; -+} -+ - static int dw2102_tuner_attach(struct dvb_usb_adapter *adap) - { - dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60, -@@ -1447,6 +1617,9 @@ - TEVII_S480_1, - TEVII_S480_2, - X3M_SPC1400HD, -+ BST_US6830HD, -+ BST_US6831HD, -+ BST_US6832HD, - }; - - static struct usb_device_id dw2102_table[] = { -@@ -1465,6 +1638,9 @@ - [TEVII_S480_1] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_1)}, - [TEVII_S480_2] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_2)}, - [X3M_SPC1400HD] = {USB_DEVICE(0x1f4d, 0x3100)}, -+ [BST_US6830HD] = {USB_DEVICE(0x0572, 0x6830)}, -+ [BST_US6831HD] = {USB_DEVICE(0x0572, 0x6831)}, -+ [BST_US6832HD] = {USB_DEVICE(0x0572, 0x6832)}, - { } - }; - -@@ -1870,6 +2046,106 @@ - } - }; - -+static struct dvb_usb_device_properties US6830_properties = { -+ .caps = DVB_USB_IS_AN_I2C_ADAPTER, -+ .usb_ctrl = DEVICE_SPECIFIC, -+ .size_of_priv = sizeof(struct su3000_state), -+ .power_ctrl = su3000_power_ctrl, -+ .num_adapters = 1, -+ .identify_state = su3000_identify_state, -+ .i2c_algo = &su3000_i2c_algo, -+ -+ .rc.legacy = { -+ .rc_map_table = rc_map_su3000_table, -+ .rc_map_size = ARRAY_SIZE(rc_map_su3000_table), -+ .rc_interval = 150, -+ .rc_query = dw2102_rc_query, -+ }, -+ -+ .read_mac_address = dvbsky_read_mac_address, -+ -+ .generic_bulk_ctrl_endpoint = 0x01, -+ -+ .adapter = { -+ { -+ .num_frontends = 1, -+ .fe = {{ -+ .streaming_ctrl = su3000_streaming_ctrl, -+ .frontend_attach = US6830_frontend_attach, -+ .stream = { -+ .type = USB_BULK, -+ .count = 8, -+ .endpoint = 0x82, -+ .u = { -+ .bulk = { -+ .buffersize = 4096, -+ } -+ } -+ } -+ }}, -+ } -+ }, -+ .num_device_descs = 2, -+ .devices = { -+ { "Bestunar US6830 HD", -+ { &dw2102_table[BST_US6830HD], NULL }, -+ { NULL }, -+ }, -+ { "Bestunar US6831 HD", -+ { &dw2102_table[BST_US6831HD], NULL }, -+ { NULL }, -+ }, -+ } -+}; -+ -+static struct dvb_usb_device_properties US6832_properties = { -+ .caps = DVB_USB_IS_AN_I2C_ADAPTER, -+ .usb_ctrl = DEVICE_SPECIFIC, -+ .size_of_priv = sizeof(struct su3000_state), -+ .power_ctrl = su3000_power_ctrl, -+ .num_adapters = 1, -+ .identify_state = su3000_identify_state, -+ .i2c_algo = &su3000_i2c_algo, -+ -+ .rc.legacy = { -+ .rc_map_table = rc_map_su3000_table, -+ .rc_map_size = ARRAY_SIZE(rc_map_su3000_table), -+ .rc_interval = 150, -+ .rc_query = dw2102_rc_query, -+ }, -+ -+ .read_mac_address = dvbsky_read_mac_address, -+ -+ .generic_bulk_ctrl_endpoint = 0x01, -+ -+ .adapter = { -+ { -+ .num_frontends = 1, -+ .fe = {{ -+ .streaming_ctrl = su3000_streaming_ctrl, -+ .frontend_attach = US6832_frontend_attach, -+ .stream = { -+ .type = USB_BULK, -+ .count = 8, -+ .endpoint = 0x82, -+ .u = { -+ .bulk = { -+ .buffersize = 4096, -+ } -+ } -+ } -+ }}, -+ } -+ }, -+ .num_device_descs = 1, -+ .devices = { -+ { "Bestunar US6832 HD", -+ { &dw2102_table[BST_US6832HD], NULL }, -+ { NULL }, -+ }, -+ } -+}; -+ - static int dw2102_probe(struct usb_interface *intf, - const struct usb_device_id *id) - { -@@ -1926,6 +2202,10 @@ - 0 == dvb_usb_device_init(intf, p7500, - THIS_MODULE, NULL, adapter_nr) || - 0 == dvb_usb_device_init(intf, &su3000_properties, -+ THIS_MODULE, NULL, adapter_nr) || -+ 0 == dvb_usb_device_init(intf, &US6830_properties, -+ THIS_MODULE, NULL, adapter_nr) || -+ 0 == dvb_usb_device_init(intf, &US6832_properties, - THIS_MODULE, NULL, adapter_nr)) - return 0; - -diff -urN a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig ---- a/drivers/media/usb/dvb-usb/Kconfig 2013-01-18 00:47:40.000000000 +0800 -+++ b/drivers/media/usb/dvb-usb/Kconfig 2013-01-20 21:30:41.023427062 +0800 -@@ -262,6 +262,7 @@ - select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT - select DVB_SI21XX if MEDIA_SUBDRV_AUTOSELECT - select DVB_TDA10023 if MEDIA_SUBDRV_AUTOSELECT - select DVB_MT312 if MEDIA_SUBDRV_AUTOSELECT -diff -urN a/include/media/rc-map.h b/include/media/rc-map.h ---- a/include/media/rc-map.h 2013-01-18 00:47:40.000000000 +0800 -+++ b/include/media/rc-map.h 2013-01-20 21:26:48.059420822 +0800 -@@ -86,6 +86,7 @@ - #define RC_MAP_DM1105_NEC "rc-dm1105-nec" - #define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro" - #define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t" -+#define RC_MAP_DVBSKY "rc-dvbsky" - #define RC_MAP_EMPTY "rc-empty" - #define RC_MAP_EM_TERRATEC "rc-em-terratec" - #define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2" diff --git a/packages/linux/patches/3.7.10/linux-214-rtl28xxu_add_NOXON_USB_dongle_rev.2.patch b/packages/linux/patches/3.7.10/linux-214-rtl28xxu_add_NOXON_USB_dongle_rev.2.patch deleted file mode 100644 index 2d034b10a2..0000000000 --- a/packages/linux/patches/3.7.10/linux-214-rtl28xxu_add_NOXON_USB_dongle_rev.2.patch +++ /dev/null @@ -1,44 +0,0 @@ -From e9de051666a42dc7866267f85869170bcc6b957a Mon Sep 17 00:00:00 2001 -From: Juergen Lock -Date: Tue, 13 Nov 2012 14:09:28 -0300 -Subject: [PATCH] [media] rtl28xxu: add NOXON DAB/DAB+ USB dongle rev 2 - -This just adds the usbid to the rtl28xxu driver, that's all that's -needed to make the stick work for DVB. - -Signed-off-by: Juergen Lock -Signed-off-by: Antti Palosaari -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/media/dvb-core/dvb-usb-ids.h | 1 + - drivers/media/usb/dvb-usb-v2/rtl28xxu.c | 2 ++ - 2 files changed, 3 insertions(+), 0 deletions(-) - -diff --git a/drivers/media/dvb-core/dvb-usb-ids.h b/drivers/media/dvb-core/dvb-usb-ids.h -index 58e0220..388c2eb 100644 ---- a/drivers/media/dvb-core/dvb-usb-ids.h -+++ b/drivers/media/dvb-core/dvb-usb-ids.h -@@ -250,6 +250,7 @@ - #define USB_PID_TERRATEC_T3 0x10a0 - #define USB_PID_TERRATEC_T5 0x10a1 - #define USB_PID_NOXON_DAB_STICK 0x00b3 -+#define USB_PID_NOXON_DAB_STICK_REV2 0x00e0 - #define USB_PID_PINNACLE_EXPRESSCARD_320CX 0x022e - #define USB_PID_PINNACLE_PCTV2000E 0x022c - #define USB_PID_PINNACLE_PCTV_DVB_T_FLASH 0x0228 -diff --git a/drivers/media/usb/dvb-usb-v2/rtl28xxu.c b/drivers/media/usb/dvb-usb-v2/rtl28xxu.c -index 223f0e7..a4c302d 100644 ---- a/drivers/media/usb/dvb-usb-v2/rtl28xxu.c -+++ b/drivers/media/usb/dvb-usb-v2/rtl28xxu.c -@@ -1338,6 +1338,8 @@ static const struct usb_device_id rtl28xxu_id_table[] = { - &rtl2832u_props, "G-Tek Electronics Group Lifeview LV5TDLX DVB-T", NULL) }, - { DVB_USB_DEVICE(USB_VID_TERRATEC, USB_PID_NOXON_DAB_STICK, - &rtl2832u_props, "NOXON DAB/DAB+ USB dongle", NULL) }, -+ { DVB_USB_DEVICE(USB_VID_TERRATEC, USB_PID_NOXON_DAB_STICK_REV2, -+ &rtl2832u_props, "NOXON DAB/DAB+ USB dongle (rev 2)", NULL) }, - { DVB_USB_DEVICE(USB_VID_GTEK, USB_PID_TREKSTOR_TERRES_2_0, - &rtl2832u_props, "Trekstor DVB-T Stick Terres 2.0", NULL) }, - { DVB_USB_DEVICE(USB_VID_DEXATEK, 0x1101, --- -1.7.7.6 - diff --git a/packages/linux/patches/3.7.10/linux-950-saa716x_PCIe_interface_chipset.patch b/packages/linux/patches/3.7.10/linux-950-saa716x_PCIe_interface_chipset.patch deleted file mode 100644 index e1c160e4fe..0000000000 --- a/packages/linux/patches/3.7.10/linux-950-saa716x_PCIe_interface_chipset.patch +++ /dev/null @@ -1,12914 +0,0 @@ -diff -Naur linux-3.7.2/drivers/media/common/Kconfig linux-3.7.2.patch/drivers/media/common/Kconfig ---- linux-3.7.2/drivers/media/common/Kconfig 2013-01-11 18:19:28.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/Kconfig 2013-01-16 10:52:04.586923233 +0100 -@@ -1,3 +1,4 @@ - source "drivers/media/common/b2c2/Kconfig" - source "drivers/media/common/saa7146/Kconfig" -+source "drivers/media/common/saa716x/Kconfig" - source "drivers/media/common/siano/Kconfig" -diff -Naur linux-3.7.2/drivers/media/common/Makefile linux-3.7.2.patch/drivers/media/common/Makefile ---- linux-3.7.2/drivers/media/common/Makefile 2013-01-11 18:19:28.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/Makefile 2013-01-16 10:52:15.443844483 +0100 -@@ -1 +1 @@ --obj-y += b2c2/ saa7146/ siano/ -+obj-y += b2c2/ saa7146/ saa716x/ siano/ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/Kconfig linux-3.7.2.patch/drivers/media/common/saa716x/Kconfig ---- linux-3.7.2/drivers/media/common/saa716x/Kconfig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/Kconfig 2013-01-16 10:41:10.906798319 +0100 -@@ -0,0 +1,67 @@ -+menuconfig SAA716X_SUPPORT -+ bool "Support for SAA716x family from NXP/Philips" -+ depends on PCI && I2C -+ help -+ support for saa716x -+ -+if SAA716X_SUPPORT -+config SAA716X_CORE -+ tristate "SAA7160/1/2 PCI Express bridge based devices" -+ depends on PCI && I2C -+ -+ help -+ Support for PCI cards based on the SAA7160/1/2 PCI Express bridge. -+ -+ Say Y if you own such a device and want to use it. -+ -+config DVB_SAA716X_BUDGET -+ tristate "SAA7160/1/2 based Budget PCIe cards (DVB only)" -+ depends on SAA716X_CORE && DVB_CORE -+ select DVB_DS3000 if !DVB_FE_CUSTOMISE -+ select DVB_DS3103 if !DVB_FE_CUSTOMISE -+ select DVB_TS2022 if !DVB_FE_CUSTOMISE -+ -+ help -+ Support for the SAA7160/1/2 based Budget PCIe DVB cards -+ Currently supported devices are: -+ -+ * KNC1 Dual S2 (DVB-S, DVB-S/S2) -+ * Twinhan/Azurewave VP-1028 (DVB-S) -+ * Twinhan/Azurewave VP-3071 (DVB-T x2) -+ * Twinhan/Azurewave VP-6002 (DVB-S) -+ -+ Say Y if you own such a device and want to use it. -+ -+config DVB_SAA716X_HYBRID -+ tristate "SAA7160/1/2 based Hybrid PCIe cards (DVB + Analog)" -+ depends on SAA716X_CORE && DVB_CORE -+ -+ help -+ Support for the SAA7160/1/2 based Hybrid PCIe DVB cards -+ Currently supported devices are: -+ -+ * Avermedia H-788 (DVB-T) -+ * Avermedia HC-82 (DVB-T) -+ * NXP Reference (Atlantis) (DVB-T x2) -+ * NXP Reference (Nemo) (DVB-T) -+ * Twinhan/Azurewave VP-6090 (DVB-S x2, DVB-T x2) -+ -+ Say Y if you own such a device and want to use it. -+ -+#config DVB_SAA716X_FF -+# tristate "SAA7160/1/2 based Full Fledged PCIe cards" -+# depends on SAA716X_CORE && DVB_CORE -+# depends on INPUT # IR -+# default n -+ -+# help -+# Support for the SAA7160/1/2 based Full fledged PCIe DVB cards -+# These cards do feature a hardware MPEG decoder and other -+# peripherals. Also known as Premium cards. -+# Currently supported devices are: -+ -+# * Technotrend S2 6400 Dual S2 HD (DVB-S/S2 x2) -+ -+# Say Y if you own such a device and want to use it. -+ -+endif # SAA716X_SUPPORT -diff -Naur linux-3.7.2/drivers/media/common/saa716x/Makefile linux-3.7.2.patch/drivers/media/common/saa716x/Makefile ---- linux-3.7.2/drivers/media/common/saa716x/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/Makefile 2013-01-16 10:54:20.634929700 +0100 -@@ -0,0 +1,26 @@ -+saa716x_core-objs := saa716x_pci.o \ -+ saa716x_i2c.o \ -+ saa716x_cgu.o \ -+ saa716x_msi.o \ -+ saa716x_dma.o \ -+ saa716x_vip.o \ -+ saa716x_aip.o \ -+ saa716x_phi.o \ -+ saa716x_boot.o \ -+ saa716x_fgpi.o \ -+ saa716x_adap.o \ -+ saa716x_gpio.o \ -+ saa716x_greg.o \ -+ saa716x_rom.o \ -+ saa716x_spi.o -+ -+#saa716x_ff-objs := saa716x_ff_main.o \ -+# saa716x_ff_cmd.o \ -+# saa716x_ff_ir.o -+ -+obj-$(CONFIG_SAA716X_CORE) += saa716x_core.o -+obj-$(CONFIG_DVB_SAA716X_BUDGET) += saa716x_budget.o -+obj-$(CONFIG_DVB_SAA716X_HYBRID) += saa716x_hybrid.o -+#obj-$(CONFIG_DVB_SAA716X_FF) += saa716x_ff.o -+ -+EXTRA_CFLAGS = -Idrivers/media/dvb-core/ -Idrivers/media/dvb-frontends/ -Idrivers/media/tuners/ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.c 2013-01-16 10:41:10.907798312 +0100 -@@ -0,0 +1,274 @@ -+#include -+ -+#include "dmxdev.h" -+#include "dvbdev.h" -+#include "dvb_demux.h" -+#include "dvb_frontend.h" -+ -+#include "saa716x_mod.h" -+#include "saa716x_spi.h" -+#include "saa716x_adap.h" -+#include "saa716x_i2c.h" -+#include "saa716x_gpio.h" -+#include "saa716x_priv.h" -+#include "saa716x_budget.h" -+ -+ -+DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); -+ -+ -+void saa716x_dma_start(struct saa716x_dev *saa716x, u8 adapter) -+{ -+ struct fgpi_stream_params params; -+ -+ dprintk(SAA716x_DEBUG, 1, "SAA716x Start DMA engine for Adapter:%d", adapter); -+ -+ params.bits = 8; -+ params.samples = 188; -+ params.lines = 348; -+ params.pitch = 188; -+ params.offset = 0; -+ params.page_tables = 0; -+ params.stream_type = FGPI_TRANSPORT_STREAM; -+ params.stream_flags = 0; -+ -+ saa716x_fgpi_start(saa716x, saa716x->config->adap_config[adapter].ts_port, ¶ms); -+} -+ -+void saa716x_dma_stop(struct saa716x_dev *saa716x, u8 adapter) -+{ -+ dprintk(SAA716x_DEBUG, 1, "SAA716x Stop DMA engine for Adapter:%d", adapter); -+ -+ saa716x_fgpi_stop(saa716x, saa716x->config->adap_config[adapter].ts_port); -+} -+ -+static int saa716x_dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed) -+{ -+ struct dvb_demux *dvbdmx = dvbdmxfeed->demux; -+ struct saa716x_adapter *saa716x_adap = dvbdmx->priv; -+ struct saa716x_dev *saa716x = saa716x_adap->saa716x; -+ -+ dprintk(SAA716x_DEBUG, 1, "SAA716x DVB Start feed"); -+ if (!dvbdmx->dmx.frontend) { -+ dprintk(SAA716x_DEBUG, 1, "no frontend ?"); -+ return -EINVAL; -+ } -+ saa716x_adap->feeds++; -+ dprintk(SAA716x_DEBUG, 1, "SAA716x start feed, feeds=%d", -+ saa716x_adap->feeds); -+ -+ if (saa716x_adap->feeds == 1) { -+ dprintk(SAA716x_DEBUG, 1, "SAA716x start feed & dma"); -+ saa716x_dma_start(saa716x, saa716x_adap->count); -+ } -+ -+ return saa716x_adap->feeds; -+} -+ -+static int saa716x_dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed) -+{ -+ struct dvb_demux *dvbdmx = dvbdmxfeed->demux; -+ struct saa716x_adapter *saa716x_adap = dvbdmx->priv; -+ struct saa716x_dev *saa716x = saa716x_adap->saa716x; -+ -+ dprintk(SAA716x_DEBUG, 1, "SAA716x DVB Stop feed"); -+ if (!dvbdmx->dmx.frontend) { -+ dprintk(SAA716x_DEBUG, 1, "no frontend ?"); -+ return -EINVAL; -+ } -+ saa716x_adap->feeds--; -+ if (saa716x_adap->feeds == 0) { -+ dprintk(SAA716x_DEBUG, 1, "saa716x stop feed and dma"); -+ saa716x_dma_stop(saa716x, saa716x_adap->count); -+ } -+ -+ return 0; -+} -+ -+int __devinit saa716x_dvb_init(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; -+ struct saa716x_config *config = saa716x->config; -+ int result, i; -+ -+ mutex_init(&saa716x->adap_lock); -+ -+ for (i = 0; i < config->adapters; i++) { -+ -+ dprintk(SAA716x_DEBUG, 1, "dvb_register_adapter"); -+ if (dvb_register_adapter(&saa716x_adap->dvb_adapter, -+ "SAA716x dvb adapter", -+ THIS_MODULE, -+ &saa716x->pdev->dev, -+ adapter_nr) < 0) { -+ -+ dprintk(SAA716x_ERROR, 1, "Error registering adapter"); -+ return -ENODEV; -+ } -+ -+ saa716x_adap->count = i; -+ -+ saa716x_adap->dvb_adapter.priv = saa716x_adap; -+ saa716x_adap->demux.dmx.capabilities = DMX_TS_FILTERING | -+ DMX_SECTION_FILTERING | -+ DMX_MEMORY_BASED_FILTERING; -+ -+ saa716x_adap->demux.priv = saa716x_adap; -+ saa716x_adap->demux.filternum = 256; -+ saa716x_adap->demux.feednum = 256; -+ saa716x_adap->demux.start_feed = saa716x_dvb_start_feed; -+ saa716x_adap->demux.stop_feed = saa716x_dvb_stop_feed; -+ saa716x_adap->demux.write_to_decoder = NULL; -+ switch (saa716x->pdev->subsystem_device) { -+ case TEVII_S472: { -+ struct saa716x_i2c *i2c = saa716x->i2c; -+ struct i2c_adapter *adapter = &i2c[SAA716x_I2C_BUS_B].i2c_adapter; -+ u8 mac[6]; -+ u8 b0[] = { 0, 9 }; -+ struct i2c_msg msg[] = { -+ { -+ .addr = 0x50, -+ .flags = 0, -+ .buf = b0, -+ .len = 2 -+ }, { -+ .addr = 0x50, -+ .flags = I2C_M_RD, -+ .buf = mac, -+ .len = 6 -+ } -+ }; -+ -+ i2c_transfer(adapter, msg, 2); -+ dprintk(SAA716x_INFO, 1, "TeVii S472 MAC= %pM\n", mac); -+ memcpy(saa716x_adap->dvb_adapter.proposed_mac, mac, 6); -+ } -+ } -+ -+ dprintk(SAA716x_DEBUG, 1, "dvb_dmx_init"); -+ if ((result = dvb_dmx_init(&saa716x_adap->demux)) < 0) { -+ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); -+ goto err0; -+ } -+ -+ saa716x_adap->dmxdev.filternum = 256; -+ saa716x_adap->dmxdev.demux = &saa716x_adap->demux.dmx; -+ saa716x_adap->dmxdev.capabilities = 0; -+ -+ dprintk(SAA716x_DEBUG, 1, "dvb_dmxdev_init"); -+ if ((result = dvb_dmxdev_init(&saa716x_adap->dmxdev, -+ &saa716x_adap->dvb_adapter)) < 0) { -+ -+ dprintk(SAA716x_ERROR, 1, "dvb_dmxdev_init failed, ERROR=%d", result); -+ goto err1; -+ } -+ -+ saa716x_adap->fe_hw.source = DMX_FRONTEND_0; -+ -+ if ((result = saa716x_adap->demux.dmx.add_frontend(&saa716x_adap->demux.dmx, -+ &saa716x_adap->fe_hw)) < 0) { -+ -+ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); -+ goto err2; -+ } -+ -+ saa716x_adap->fe_mem.source = DMX_MEMORY_FE; -+ -+ if ((result = saa716x_adap->demux.dmx.add_frontend(&saa716x_adap->demux.dmx, -+ &saa716x_adap->fe_mem)) < 0) { -+ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); -+ goto err3; -+ } -+ -+ if ((result = saa716x_adap->demux.dmx.connect_frontend(&saa716x_adap->demux.dmx, -+ &saa716x_adap->fe_hw)) < 0) { -+ -+ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); -+ goto err4; -+ } -+ -+ dvb_net_init(&saa716x_adap->dvb_adapter, &saa716x_adap->dvb_net, &saa716x_adap->demux.dmx); -+// tasklet_init(&saa716x_adap->tasklet, saa716x_dma_xfer, (unsigned long) saa716x); -+ dprintk(SAA716x_DEBUG, 1, "Frontend Init"); -+ saa716x_adap->saa716x = saa716x; -+ -+ if (config->frontend_attach) { -+ result = config->frontend_attach(saa716x_adap, i); -+ if (result < 0) -+ dprintk(SAA716x_ERROR, 1, "SAA716x frontend attach failed"); -+ -+ if (saa716x_adap->fe == NULL) { -+ dprintk(SAA716x_ERROR, 1, "A frontend driver was not found for [%04x:%04x] subsystem [%04x:%04x]\n", -+ saa716x->pdev->vendor, -+ saa716x->pdev->device, -+ saa716x->pdev->subsystem_vendor, -+ saa716x->pdev->subsystem_device); -+ } else { -+ result = dvb_register_frontend(&saa716x_adap->dvb_adapter, saa716x_adap->fe); -+ if (result < 0) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x register frontend failed"); -+ goto err6; -+ } -+ } -+ -+ } else { -+ dprintk(SAA716x_ERROR, 1, "Frontend attach = NULL"); -+ } -+ -+ saa716x_fgpi_init(saa716x, config->adap_config[i].ts_port, -+ config->adap_config[i].worker); -+ -+ saa716x_adap++; -+ } -+ -+ -+ return 0; -+ -+ /* Error conditions */ -+err6: -+ dvb_frontend_detach(saa716x_adap->fe); -+err4: -+ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_mem); -+err3: -+ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_hw); -+err2: -+ dvb_dmxdev_release(&saa716x_adap->dmxdev); -+err1: -+ dvb_dmx_release(&saa716x_adap->demux); -+err0: -+ dvb_unregister_adapter(&saa716x_adap->dvb_adapter); -+ -+ return result; -+} -+EXPORT_SYMBOL(saa716x_dvb_init); -+ -+void __devexit saa716x_dvb_exit(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; -+ int i; -+ -+ for (i = 0; i < saa716x->config->adapters; i++) { -+ -+ saa716x_fgpi_exit(saa716x, saa716x->config->adap_config[i].ts_port); -+ -+ if (saa716x_adap->fe) { -+ dvb_unregister_frontend(saa716x_adap->fe); -+ dvb_frontend_detach(saa716x_adap->fe); -+ } -+ -+// tasklet_kill(&saa716x->tasklet); -+ dvb_net_release(&saa716x_adap->dvb_net); -+ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_mem); -+ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_hw); -+ dvb_dmxdev_release(&saa716x_adap->dmxdev); -+ dvb_dmx_release(&saa716x_adap->demux); -+ -+ dprintk(SAA716x_DEBUG, 1, "dvb_unregister_adapter"); -+ dvb_unregister_adapter(&saa716x_adap->dvb_adapter); -+ -+ saa716x_adap++; -+ } -+ -+ return; -+} -+EXPORT_SYMBOL(saa716x_dvb_exit); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.h 2013-01-16 10:41:10.907798312 +0100 -@@ -0,0 +1,9 @@ -+#ifndef __SAA716x_ADAP_H -+#define __SAA716x_ADAP_H -+ -+struct saa716x_dev; -+ -+extern int saa716x_dvb_init(struct saa716x_dev *saa716x); -+extern void saa716x_dvb_exit(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_ADAP_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.c 2013-01-16 10:41:10.907798312 +0100 -@@ -0,0 +1,20 @@ -+#include -+ -+#include "saa716x_mod.h" -+#include "saa716x_aip_reg.h" -+#include "saa716x_spi.h" -+#include "saa716x_aip.h" -+#include "saa716x_priv.h" -+ -+int saa716x_aip_status(struct saa716x_dev *saa716x, u32 dev) -+{ -+ return SAA716x_EPRD(dev, AI_CTL) == 0 ? 0 : -1; -+} -+EXPORT_SYMBOL_GPL(saa716x_aip_status); -+ -+void saa716x_aip_disable(struct saa716x_dev *saa716x) -+{ -+ SAA716x_EPWR(AI0, AI_CTL, 0x00); -+ SAA716x_EPWR(AI1, AI_CTL, 0x00); -+} -+EXPORT_SYMBOL_GPL(saa716x_aip_disable); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.h 2013-01-16 10:41:10.907798312 +0100 -@@ -0,0 +1,9 @@ -+#ifndef __SAA716x_AIP_H -+#define __SAA716x_AIP_H -+ -+struct saa716x_dev; -+ -+extern int saa716x_aip_status(struct saa716x_dev *saa716x, u32 dev); -+extern void saa716x_aip_disable(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_AIP_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_aip_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_aip_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip_reg.h 2013-01-16 10:41:10.908798304 +0100 -@@ -0,0 +1,62 @@ -+#ifndef __SAA716x_AIP_REG_H -+#define __SAA716x_AIP_REG_H -+ -+/* -------------- AI Registers ---------------- */ -+ -+#define AI_STATUS 0x000 -+#define AI_BUF1_ACTIVE (0x00000001 << 4) -+#define AI_OVERRUN (0x00000001 << 3) -+#define AI_HBE (0x00000001 << 2) -+#define AI_BUF2_FULL (0x00000001 << 1) -+#define AI_BUF1_FULL (0x00000001 << 0) -+ -+#define AI_CTL 0x004 -+#define AI_RESET (0x00000001 << 31) -+#define AI_CAP_ENABLE (0x00000001 << 30) -+#define AI_CAP_MODE (0x00000003 << 28) -+#define AI_SIGN_CONVERT (0x00000001 << 27) -+#define AI_EARLYMODE (0x00000001 << 26) -+#define AI_DIAGMODE (0x00000001 << 25) -+#define AI_RAWMODE (0x00000001 << 24) -+#define AI_OVR_INTEN (0x00000001 << 7) -+#define AI_HBE_INTEN (0x00000001 << 6) -+#define AI_BUF2_INTEN (0x00000001 << 5) -+#define AI_BUF1_INTEN (0x00000001 << 4) -+#define AI_ACK_OVR (0x00000001 << 3) -+#define AI_ACK_HBE (0x00000001 << 2) -+#define AI_ACK2 (0x00000001 << 1) -+#define AI_ACK1 (0x00000001 << 0) -+ -+#define AI_SERIAL 0x008 -+#define AI_SER_MASTER (0x00000001 << 31) -+#define AI_DATAMODE (0x00000001 << 30) -+#define AI_FRAMEMODE (0x00000003 << 28) -+#define AI_CLOCK_EDGE (0x00000001 << 27) -+#define AI_SSPOS4 (0x00000001 << 19) -+#define AI_NR_CHAN (0x00000003 << 17) -+#define AI_WSDIV (0x000001ff << 8) -+#define AI_SCKDIV (0x000000ff << 0) -+ -+#define AI_FRAMING 0x00c -+#define AI_VALIDPOS (0x000001ff << 22) -+#define AI_LEFTPOS (0x000001ff << 13) -+#define AI_RIGHTPOS (0x000001ff << 4) -+#define AI_SSPOS_3_0 (0x0000000f << 0) -+ -+#define AI_BASE1 0x014 -+#define AI_BASE2 0x018 -+#define AI_BASE (0x03ffffff << 6) -+ -+#define AI_SIZE 0x01c -+#define AI_SAMPLE_SIZE (0x03ffffff << 6) -+ -+#define AI_INT_ACK 0x020 -+#define AI_ACK_OVR (0x00000001 << 3) -+#define AI_ACK_HBE (0x00000001 << 2) -+#define AI_ACK2 (0x00000001 << 1) -+#define AI_ACK1 (0x00000001 << 0) -+ -+#define AI_PWR_DOWN 0xff4 -+#define AI_PWR_DWN (0x00000001 << 0) -+ -+#endif /* __SAA716x_AIP_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.c 2013-01-16 10:41:10.908798304 +0100 -@@ -0,0 +1,319 @@ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_greg_reg.h" -+#include "saa716x_cgu_reg.h" -+#include "saa716x_vip_reg.h" -+#include "saa716x_aip_reg.h" -+#include "saa716x_msi_reg.h" -+#include "saa716x_dma_reg.h" -+#include "saa716x_gpio_reg.h" -+#include "saa716x_fgpi_reg.h" -+#include "saa716x_dcs_reg.h" -+ -+#include "saa716x_boot.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+static int saa716x_ext_boot(struct saa716x_dev *saa716x) -+{ -+ /* Write GREG boot_ready to 0 -+ * DW_0 = 0x0001_2018 -+ * DW_1 = 0x0000_0000 -+ */ -+ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00000000); -+ -+ /* Clear VI0 interrupt -+ * DW_2 = 0x0000_0fe8 -+ * DW_3 = 0x0000_03ff -+ */ -+ SAA716x_EPWR(VI0, INT_CLR_STATUS, 0x000003ff); -+ -+ /* Clear VI1 interrupt -+ * DW_4 = 0x0000_1fe8 -+ * DW_5 = 0x0000_03ff -+ */ -+ SAA716x_EPWR(VI1, INT_CLR_STATUS, 0x000003ff); -+ -+ /* CLear FGPI0 interrupt -+ * DW_6 = 0x0000_2fe8 -+ * DW_7 = 0x0000_007f -+ */ -+ SAA716x_EPWR(FGPI0, INT_CLR_STATUS, 0x0000007f); -+ -+ /* Clear FGPI1 interrupt -+ * DW_8 = 0x0000_3fe8 -+ * DW_9 = 0x0000_007f -+ */ -+ SAA716x_EPWR(FGPI1, INT_CLR_STATUS, 0x0000007f); -+ -+ /* Clear FGPI2 interrupt -+ * DW_10 = 0x0000_4fe8 -+ * DW_11 = 0x0000_007f -+ */ -+ SAA716x_EPWR(FGPI2, INT_CLR_STATUS, 0x0000007f); -+ -+ /* Clear FGPI3 interrupt -+ * DW_12 = 0x0000_5fe8 -+ * DW_13 = 0x0000_007f -+ */ -+ SAA716x_EPWR(FGPI3, INT_CLR_STATUS, 0x0000007f); -+ -+ /* Clear AI0 interrupt -+ * DW_14 = 0x0000_6020 -+ * DW_15 = 0x0000_000f -+ */ -+ SAA716x_EPWR(AI0, AI_INT_ACK, 0x0000000f); -+ -+ /* Clear AI1 interrupt -+ * DW_16 = 0x0000_7020 -+ * DW_17 = 0x0000_200f -+ */ -+ SAA716x_EPWR(AI1, AI_INT_ACK, 0x0000000f); -+ -+ /* Set GREG boot_ready bit to 1 -+ * DW_18 = 0x0001_2018 -+ * DW_19 = 0x0000_2000 -+ */ -+ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00002000); -+#if 0 -+ /* End of Boot script command -+ * DW_20 = 0x0000_0006 -+ * Where to write this value ?? -+ * This seems very odd an address to trigger the -+ * Boot Control State Machine ! -+ */ -+ SAA716x_EPWR(VI0, 0x00000006, 0xffffffff); -+#endif -+ return 0; -+} -+ -+/* Internal Bootscript configuration */ -+static void saa716x_int_boot(struct saa716x_dev *saa716x) -+{ -+ /* #1 Configure PCI COnfig space -+ * GREG_JETSTR_CONFIG_0 -+ */ -+ SAA716x_EPWR(GREG, GREG_SUBSYS_CONFIG, saa716x->pdev->subsystem_vendor); -+ -+ /* GREG_JETSTR_CONFIG_1 -+ * pmcsr_scale:7 = 0x00 -+ * pmcsr_scale:6 = 0x00 -+ * pmcsr_scale:5 = 0x00 -+ * pmcsr_scale:4 = 0x00 -+ * pmcsr_scale:3 = 0x00 -+ * pmcsr_scale:2 = 0x00 -+ * pmcsr_scale:1 = 0x00 -+ * pmcsr_scale:0 = 0x00 -+ * BAR mask = 20 bit -+ * BAR prefetch = no -+ * MSI capable = 32 messages -+ */ -+ SAA716x_EPWR(GREG, GREG_MSI_BAR_PMCSR, 0x00001005); -+ -+ /* GREG_JETSTR_CONFIG_2 -+ * pmcsr_data:3 = 0x0 -+ * pmcsr_data:2 = 0x0 -+ * pmcsr_data:1 = 0x0 -+ * pmcsr_data:0 = 0x0 -+ */ -+ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_1, 0x00000000); -+ -+ /* GREG_JETSTR_CONFIG_3 -+ * pmcsr_data:7 = 0x0 -+ * pmcsr_data:6 = 0x0 -+ * pmcsr_data:5 = 0x0 -+ * pmcsr_data:4 = 0x0 -+ */ -+ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_2, 0x00000000); -+ -+ /* #2 Release GREG resets -+ * ip_rst_an -+ * dpa1_rst_an -+ * jetsream_reset_an -+ */ -+ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00000e00); -+ -+ /* #3 GPIO Setup -+ * GPIO 25:24 = Output -+ * GPIO Output "0" after Reset -+ */ -+ SAA716x_EPWR(GPIO, GPIO_OEN, 0xfcffffff); -+ -+ /* #4 Custom stuff goes in here */ -+ -+ /* #5 Disable CGU Clocks -+ * except for PHY, Jetstream, DPA1, DCS, Boot, GREG -+ * CGU_PCR_0_3: pss_mmu_clk:0 = 0x0 -+ */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_3, 0x00000006); -+ -+ /* CGU_PCR_0_4: pss_dtl2mtl_mmu_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_4, 0x00000006); -+ -+ /* CGU_PCR_0_5: pss_msi_ck:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_5, 0x00000006); -+ -+ /* CGU_PCR_0_7: pss_gpio_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_7, 0x00000006); -+ -+ /* CGU_PCR_2_1: spi_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_2_1, 0x00000006); -+ -+ /* CGU_PCR_3_2: i2c_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_3_2, 0x00000006); -+ -+ /* CGU_PCR_4_1: phi_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_4_1, 0x00000006); -+ -+ /* CGU_PCR_5: vip0_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_5, 0x00000006); -+ -+ /* CGU_PCR_6: vip1_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_6, 0x00000006); -+ -+ /* CGU_PCR_7: fgpi0_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_7, 0x00000006); -+ -+ /* CGU_PCR_8: fgpi1_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_8, 0x00000006); -+ -+ /* CGU_PCR_9: fgpi2_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_9, 0x00000006); -+ -+ /* CGU_PCR_10: fgpi3_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_10, 0x00000006); -+ -+ /* CGU_PCR_11: ai0_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_11, 0x00000006); -+ -+ /* CGU_PCR_12: ai1_clk:0 = 0x0 */ -+ SAA716x_EPWR(CGU, CGU_PCR_12, 0x00000006); -+ -+ /* #6 Set GREG boot_ready = 0x1 */ -+ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00002000); -+ -+ /* #7 Disable GREG CGU Clock */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_6, 0x00000006); -+ -+ /* End of Bootscript command ?? */ -+} -+ -+int saa716x_core_boot(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_config *config = saa716x->config; -+ -+ switch (config->boot_mode) { -+ case SAA716x_EXT_BOOT: -+ dprintk(SAA716x_DEBUG, 1, "Using External Boot from config"); -+ saa716x_ext_boot(saa716x); -+ break; -+ case SAA716x_INT_BOOT: -+ dprintk(SAA716x_DEBUG, 1, "Using Internal Boot from config"); -+ saa716x_int_boot(saa716x); -+ break; -+ default: -+ dprintk(SAA716x_ERROR, 1, "Unknown configuration %d", config->boot_mode); -+ break; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_core_boot); -+ -+static void saa716x_bus_report(struct pci_dev *pdev, int enable) -+{ -+ u32 reg; -+ -+ pci_read_config_dword(pdev, 0x04, ®); -+ if (enable) -+ reg |= 0x00000100; /* enable SERR */ -+ else -+ reg &= 0xfffffeff; /* disable SERR */ -+ pci_write_config_dword(pdev, 0x04, reg); -+ -+ pci_read_config_dword(pdev, 0x58, ®); -+ reg &= 0xfffffffd; -+ pci_write_config_dword(pdev, 0x58, reg); -+} -+ -+int saa716x_jetpack_init(struct saa716x_dev *saa716x) -+{ -+ /* -+ * configure PHY through config space not to report -+ * non-fatal error messages to avoid problems with -+ * quirky BIOS'es -+ */ -+ saa716x_bus_report(saa716x->pdev, 0); -+ -+ /* -+ * create time out for blocks that have no clock -+ * helps with lower bitrates on FGPI -+ */ -+ SAA716x_EPWR(DCS, DCSC_CTRL, ENABLE_TIMEOUT); -+ -+ /* Reset all blocks */ -+ SAA716x_EPWR(MSI, MSI_SW_RST, MSI_SW_RESET); -+ SAA716x_EPWR(MMU, MMU_SW_RST, MMU_SW_RESET); -+ SAA716x_EPWR(BAM, BAM_SW_RST, BAM_SW_RESET); -+ -+ switch (saa716x->pdev->device) { -+ case SAA7162: -+ dprintk(SAA716x_DEBUG, 1, "SAA%02x Decoder disable", saa716x->pdev->device); -+ SAA716x_EPWR(GPIO, GPIO_OEN, 0xfcffffff); -+ SAA716x_EPWR(GPIO, GPIO_WR, 0x00000000); /* Disable decoders */ -+ msleep(10); -+ SAA716x_EPWR(GPIO, GPIO_WR, 0x03000000); /* Enable decoders */ -+ break; -+ case SAA7161: -+ dprintk(SAA716x_DEBUG, 1, "SAA%02x Decoder disable", saa716x->pdev->device); -+ SAA716x_EPWR(GPIO, GPIO_OEN, 0xfeffffff); -+ SAA716x_EPWR(GPIO, GPIO_WR, 0x00000000); /* Disable decoders */ -+ msleep(10); -+ SAA716x_EPWR(GPIO, GPIO_WR, 0x01000000); /* Enable decoder */ -+ break; -+ case SAA7160: -+ saa716x->i2c_rate = SAA716x_I2C_RATE_100; -+ break; -+ default: -+ dprintk(SAA716x_ERROR, 1, "Unknown device (0x%02x)", saa716x->pdev->device); -+ return -ENODEV; -+ } -+ -+ /* General setup for MMU */ -+ SAA716x_EPWR(MMU, MMU_MODE, 0x14); -+ dprintk(SAA716x_DEBUG, 1, "SAA%02x Jetpack Successfully initialized", saa716x->pdev->device); -+ -+ return 0; -+} -+EXPORT_SYMBOL(saa716x_jetpack_init); -+ -+void saa716x_core_reset(struct saa716x_dev *saa716x) -+{ -+ dprintk(SAA716x_DEBUG, 1, "RESET Modules"); -+ -+ /* VIP */ -+ SAA716x_EPWR(VI0, VI_MODE, SOFT_RESET); -+ SAA716x_EPWR(VI1, VI_MODE, SOFT_RESET); -+ -+ /* FGPI */ -+ SAA716x_EPWR(FGPI0, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); -+ SAA716x_EPWR(FGPI1, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); -+ SAA716x_EPWR(FGPI2, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); -+ SAA716x_EPWR(FGPI3, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); -+ -+ /* AIP */ -+ SAA716x_EPWR(AI0, AI_CTL, AI_RESET); -+ SAA716x_EPWR(AI1, AI_CTL, AI_RESET); -+ -+ /* BAM */ -+ SAA716x_EPWR(BAM, BAM_SW_RST, BAM_SW_RESET); -+ -+ /* MMU */ -+ SAA716x_EPWR(MMU, MMU_SW_RST, MMU_SW_RESET); -+ -+ /* MSI */ -+ SAA716x_EPWR(MSI, MSI_SW_RST, MSI_SW_RESET); -+} -+EXPORT_SYMBOL_GPL(saa716x_core_reset); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.h 2013-01-16 10:41:10.908798304 +0100 -@@ -0,0 +1,18 @@ -+#ifndef __SAA716x_BOOT_H -+#define __SAA716x_BOOT_H -+ -+#define DISABLE_TIMEOUT 0x17 -+#define ENABLE_TIMEOUT 0x16 -+ -+enum saa716x_boot_mode { -+ SAA716x_EXT_BOOT = 1, -+ SAA716x_INT_BOOT, /* GPIO[31:30] = 0x01 */ -+}; -+ -+struct saa716x_dev; -+ -+extern int saa716x_core_boot(struct saa716x_dev *saa716x); -+extern int saa716x_jetpack_init(struct saa716x_dev *saa716x); -+extern void saa716x_core_reset(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_BOOT_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.c 2013-01-16 10:41:10.909798296 +0100 -@@ -0,0 +1,717 @@ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_gpio_reg.h" -+#include "saa716x_greg_reg.h" -+#include "saa716x_msi_reg.h" -+ -+#include "saa716x_adap.h" -+#include "saa716x_i2c.h" -+#include "saa716x_msi.h" -+#include "saa716x_budget.h" -+#include "saa716x_gpio.h" -+#include "saa716x_rom.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+#include "mb86a16.h" -+#include "stv6110x.h" -+#include "stv090x.h" -+#include "ds3103.h" -+#include "ts2022.h" -+ -+unsigned int verbose; -+module_param(verbose, int, 0644); -+MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); -+ -+unsigned int int_type; -+module_param(int_type, int, 0644); -+MODULE_PARM_DESC(int_type, "force Interrupt Handler type: 0=INT-A, 1=MSI, 2=MSI-X. default INT-A mode"); -+ -+#define DRIVER_NAME "SAA716x Budget" -+ -+static int __devinit saa716x_budget_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) -+{ -+ struct saa716x_dev *saa716x; -+ int err = 0; -+ -+ saa716x = kzalloc(sizeof (struct saa716x_dev), GFP_KERNEL); -+ if (saa716x == NULL) { -+ printk(KERN_ERR "saa716x_budget_pci_probe ERROR: out of memory\n"); -+ err = -ENOMEM; -+ goto fail0; -+ } -+ -+ saa716x->verbose = verbose; -+ saa716x->int_type = int_type; -+ saa716x->pdev = pdev; -+ saa716x->config = (struct saa716x_config *) pci_id->driver_data; -+ -+ err = saa716x_pci_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x PCI Initialization failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_cgu_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x CGU Init failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_core_boot(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x Core Boot failed"); -+ goto fail2; -+ } -+ dprintk(SAA716x_DEBUG, 1, "SAA716x Core Boot Success"); -+ -+ err = saa716x_msi_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x MSI Init failed"); -+ goto fail2; -+ } -+ -+ err = saa716x_jetpack_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x Jetpack core initialization failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_i2c_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x I2C Initialization failed"); -+ goto fail3; -+ } -+ -+ saa716x_gpio_init(saa716x); -+ -+ err = saa716x_dump_eeprom(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); -+ } -+ -+ err = saa716x_eeprom_data(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM read failed"); -+ } -+ -+ /* set default port mapping */ -+ SAA716x_EPWR(GREG, GREG_VI_CTRL, 0x04080FA9); -+ /* enable FGPI3 and FGPI1 for TS input from Port 2 and 6 */ -+ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, 0x321); -+ -+ err = saa716x_dvb_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x DVB initialization failed"); -+ goto fail4; -+ } -+ -+ return 0; -+ -+fail4: -+ saa716x_dvb_exit(saa716x); -+fail3: -+ saa716x_i2c_exit(saa716x); -+fail2: -+ saa716x_pci_exit(saa716x); -+fail1: -+ kfree(saa716x); -+fail0: -+ return err; -+} -+ -+static void __devexit saa716x_budget_pci_remove(struct pci_dev *pdev) -+{ -+ struct saa716x_dev *saa716x = pci_get_drvdata(pdev); -+ -+ saa716x_dvb_exit(saa716x); -+ saa716x_i2c_exit(saa716x); -+ saa716x_pci_exit(saa716x); -+ kfree(saa716x); -+} -+ -+static irqreturn_t saa716x_budget_pci_irq(int irq, void *dev_id) -+{ -+ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; -+ -+ u32 stat_h, stat_l, mask_h, mask_l; -+ -+ if (unlikely(saa716x == NULL)) { -+ printk("%s: saa716x=NULL", __func__); -+ return IRQ_NONE; -+ } -+ -+ stat_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); -+ stat_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); -+ mask_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); -+ mask_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); -+ -+ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", -+ stat_l, stat_h, mask_l, mask_h); -+ -+ if (!((stat_l & mask_l) || (stat_h & mask_h))) -+ return IRQ_NONE; -+ -+ if (stat_l) -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, stat_l); -+ -+ if (stat_h) -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, stat_h); -+ -+ saa716x_msi_event(saa716x, stat_l, stat_h); -+#if 0 -+ dprintk(SAA716x_DEBUG, 1, "VI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", -+ SAA716x_EPRD(VI0, INT_STATUS), -+ SAA716x_EPRD(VI1, INT_STATUS), -+ SAA716x_EPRD(VI0, INT_ENABLE), -+ SAA716x_EPRD(VI1, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", -+ SAA716x_EPRD(FGPI0, INT_STATUS), -+ SAA716x_EPRD(FGPI1, INT_STATUS), -+ SAA716x_EPRD(FGPI0, INT_ENABLE), -+ SAA716x_EPRD(FGPI0, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 2=<%02x> 3=<%02x>, CTL 2=<%02x> 3=<%02x>", -+ SAA716x_EPRD(FGPI2, INT_STATUS), -+ SAA716x_EPRD(FGPI3, INT_STATUS), -+ SAA716x_EPRD(FGPI2, INT_ENABLE), -+ SAA716x_EPRD(FGPI3, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "AI STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(AI0, AI_STATUS), -+ SAA716x_EPRD(AI1, AI_STATUS), -+ SAA716x_EPRD(AI0, AI_CTL), -+ SAA716x_EPRD(AI1, AI_CTL)); -+ -+ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(I2C_A, INT_STATUS), -+ SAA716x_EPRD(I2C_B, INT_STATUS), -+ SAA716x_EPRD(I2C_A, INT_ENABLE), -+ SAA716x_EPRD(I2C_B, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "DCS STAT=<%02x>, CTL=<%02x>", -+ SAA716x_EPRD(DCS, DCSC_INT_STATUS), -+ SAA716x_EPRD(DCS, DCSC_INT_ENABLE)); -+#endif -+ -+ if (stat_l) { -+ if (stat_l & MSI_INT_TAGACK_FGPI_0) { -+ tasklet_schedule(&saa716x->fgpi[0].tasklet); -+ } -+ if (stat_l & MSI_INT_TAGACK_FGPI_1) { -+ tasklet_schedule(&saa716x->fgpi[1].tasklet); -+ } -+ if (stat_l & MSI_INT_TAGACK_FGPI_2) { -+ tasklet_schedule(&saa716x->fgpi[2].tasklet); -+ } -+ if (stat_l & MSI_INT_TAGACK_FGPI_3) { -+ tasklet_schedule(&saa716x->fgpi[3].tasklet); -+ } -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static void demux_worker(unsigned long data) -+{ -+ struct saa716x_fgpi_stream_port *fgpi_entry = (struct saa716x_fgpi_stream_port *)data; -+ struct saa716x_dev *saa716x = fgpi_entry->saa716x; -+ struct dvb_demux *demux; -+ u32 fgpi_index; -+ u32 i; -+ u32 write_index; -+ -+ fgpi_index = fgpi_entry->dma_channel - 6; -+ demux = NULL; -+ for (i = 0; i < saa716x->config->adapters; i++) { -+ if (saa716x->config->adap_config[i].ts_port == fgpi_index) { -+ demux = &saa716x->saa716x_adap[i].demux; -+ break; -+ } -+ } -+ if (demux == NULL) { -+ printk(KERN_ERR "%s: unexpected channel %u\n", -+ __func__, fgpi_entry->dma_channel); -+ return; -+ } -+ -+ write_index = saa716x_fgpi_get_write_index(saa716x, fgpi_index); -+ if (write_index < 0) -+ return; -+ -+ dprintk(SAA716x_DEBUG, 1, "dma buffer = %d", write_index); -+ -+ if (write_index == fgpi_entry->read_index) { -+ printk(KERN_DEBUG "%s: called but nothing to do\n", __func__); -+ return; -+ } -+ -+ do { -+ u8 *data = (u8 *)fgpi_entry->dma_buf[fgpi_entry->read_index].mem_virt; -+ -+ pci_dma_sync_sg_for_cpu(saa716x->pdev, -+ fgpi_entry->dma_buf[fgpi_entry->read_index].sg_list, -+ fgpi_entry->dma_buf[fgpi_entry->read_index].list_len, -+ PCI_DMA_FROMDEVICE); -+ -+ dvb_dmx_swfilter(demux, data, 348 * 188); -+ -+ fgpi_entry->read_index = (fgpi_entry->read_index + 1) & 7; -+ } while (write_index != fgpi_entry->read_index); -+} -+ -+ -+#define SAA716x_MODEL_TWINHAN_VP3071 "Twinhan/Azurewave VP-3071" -+#define SAA716x_DEV_TWINHAN_VP3071 "2x DVB-T" -+ -+static int saa716x_vp3071_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_vp3071_config = { -+ .model_name = SAA716x_MODEL_TWINHAN_VP3071, -+ .dev_type = SAA716x_DEV_TWINHAN_VP3071, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 2, -+ .frontend_attach = saa716x_vp3071_frontend_attach, -+ .irq_handler = saa716x_budget_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+ -+#define SAA716x_MODEL_TWINHAN_VP1028 "Twinhan/Azurewave VP-1028" -+#define SAA716x_DEV_TWINHAN_VP1028 "DVB-S" -+ -+static int vp1028_dvbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct saa716x_dev *saa716x = fe->dvb->priv; -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ dprintk(SAA716x_ERROR, 1, "Polarization=[13V]"); -+ break; -+ case SEC_VOLTAGE_18: -+ dprintk(SAA716x_ERROR, 1, "Polarization=[18V]"); -+ break; -+ case SEC_VOLTAGE_OFF: -+ dprintk(SAA716x_ERROR, 1, "Frontend (dummy) POWERDOWN"); -+ break; -+ default: -+ dprintk(SAA716x_ERROR, 1, "Invalid = (%d)", (u32 ) voltage); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+struct mb86a16_config vp1028_mb86a16_config = { -+ .demod_address = 0x08, -+ .set_voltage = vp1028_dvbs_set_voltage, -+}; -+ -+static int saa716x_vp1028_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *i2c = &saa716x->i2c[1]; -+ -+ if (count == 0) { -+ -+ mutex_lock(&saa716x->adap_lock); -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Power ON", count); -+ saa716x_gpio_set_output(saa716x, 10); -+ msleep(1); -+ -+ /* VP-1028 has inverted power supply control */ -+ saa716x_gpio_write(saa716x, 10, 1); /* set to standby */ -+ saa716x_gpio_write(saa716x, 10, 0); /* switch it on */ -+ msleep(100); -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Reset", count); -+ saa716x_gpio_set_output(saa716x, 12); -+ msleep(1); -+ -+ /* reset demodulator (Active LOW) */ -+ saa716x_gpio_write(saa716x, 12, 1); -+ msleep(100); -+ saa716x_gpio_write(saa716x, 12, 0); -+ msleep(100); -+ saa716x_gpio_write(saa716x, 12, 1); -+ msleep(100); -+ -+ mutex_unlock(&saa716x->adap_lock); -+ -+ dprintk(SAA716x_ERROR, 1, "Probing for MB86A16 (DVB-S/DSS)"); -+ adapter->fe = mb86a16_attach(&vp1028_mb86a16_config, &i2c->i2c_adapter); -+ if (adapter->fe) { -+ dprintk(SAA716x_ERROR, 1, "found MB86A16 DVB-S/DSS frontend @0x%02x", -+ vp1028_mb86a16_config.demod_address); -+ -+ } else { -+ goto exit; -+ } -+ dprintk(SAA716x_ERROR, 1, "Done!"); -+ } -+ -+ return 0; -+exit: -+ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_vp1028_config = { -+ .model_name = SAA716x_MODEL_TWINHAN_VP1028, -+ .dev_type = SAA716x_DEV_TWINHAN_VP1028, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_vp1028_frontend_attach, -+ .irq_handler = saa716x_budget_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+ -+#define SAA716x_MODEL_TWINHAN_VP6002 "Twinhan/Azurewave VP-6002" -+#define SAA716x_DEV_TWINHAN_VP6002 "DVB-S" -+ -+static int saa716x_vp6002_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_vp6002_config = { -+ .model_name = SAA716x_MODEL_TWINHAN_VP6002, -+ .dev_type = SAA716x_DEV_TWINHAN_VP6002, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_vp6002_frontend_attach, -+ .irq_handler = saa716x_budget_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+ -+#define SAA716x_MODEL_KNC1_DUALS2 "KNC One Dual S2" -+#define SAA716x_DEV_KNC1_DUALS2 "1xDVB-S + 1xDVB-S/S2" -+ -+static int saa716x_knc1_duals2_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_knc1_duals2_config = { -+ .model_name = SAA716x_MODEL_KNC1_DUALS2, -+ .dev_type = SAA716x_DEV_KNC1_DUALS2, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 2, -+ .frontend_attach = saa716x_knc1_duals2_frontend_attach, -+ .irq_handler = saa716x_budget_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+ -+#define SAA716x_MODEL_SKYSTAR2_EXPRESS_HD "SkyStar 2 eXpress HD" -+#define SAA716x_DEV_SKYSTAR2_EXPRESS_HD "DVB-S/S2" -+ -+static struct stv090x_config skystar2_stv090x_config = { -+ .device = STV0903, -+ .demod_mode = STV090x_SINGLE, -+ .clk_mode = STV090x_CLK_EXT, -+ -+ .xtal = 8000000, -+ .address = 0x68, -+ -+ .ts1_mode = STV090x_TSMODE_DVBCI, -+ .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, -+ -+ .repeater_level = STV090x_RPTLEVEL_16, -+ -+ .tuner_init = NULL, -+ .tuner_sleep = NULL, -+ .tuner_set_mode = NULL, -+ .tuner_set_frequency = NULL, -+ .tuner_get_frequency = NULL, -+ .tuner_set_bandwidth = NULL, -+ .tuner_get_bandwidth = NULL, -+ .tuner_set_bbgain = NULL, -+ .tuner_get_bbgain = NULL, -+ .tuner_set_refclk = NULL, -+ .tuner_get_status = NULL, -+}; -+ -+static int skystar2_set_voltage(struct dvb_frontend *fe, -+ enum fe_sec_voltage voltage) -+{ -+ int err; -+ u8 en = 0; -+ u8 sel = 0; -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_OFF: -+ en = 0; -+ break; -+ -+ case SEC_VOLTAGE_13: -+ en = 1; -+ sel = 0; -+ break; -+ -+ case SEC_VOLTAGE_18: -+ en = 1; -+ sel = 1; -+ break; -+ -+ default: -+ break; -+ } -+ -+ err = stv090x_set_gpio(fe, 2, 0, en, 0); -+ if (err < 0) -+ goto exit; -+ err = stv090x_set_gpio(fe, 3, 0, sel, 0); -+ if (err < 0) -+ goto exit; -+ -+ return 0; -+exit: -+ return err; -+} -+ -+static int skystar2_voltage_boost(struct dvb_frontend *fe, long arg) -+{ -+ int err; -+ u8 value; -+ -+ if (arg) -+ value = 1; -+ else -+ value = 0; -+ -+ err = stv090x_set_gpio(fe, 4, 0, value, 0); -+ if (err < 0) -+ goto exit; -+ -+ return 0; -+exit: -+ return err; -+} -+ -+static struct stv6110x_config skystar2_stv6110x_config = { -+ .addr = 0x60, -+ .refclk = 16000000, -+ .clk_div = 2, -+}; -+ -+static int skystar2_express_hd_frontend_attach(struct saa716x_adapter *adapter, -+ int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *i2c = &saa716x->i2c[SAA716x_I2C_BUS_B]; -+ struct stv6110x_devctl *ctl; -+ -+ if (count < saa716x->config->adapters) { -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", -+ count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, -+ saa716x->pdev->subsystem_device); -+ -+ saa716x_gpio_set_output(saa716x, 26); -+ -+ /* Reset the demodulator */ -+ saa716x_gpio_write(saa716x, 26, 1); -+ msleep(10); -+ saa716x_gpio_write(saa716x, 26, 0); -+ msleep(10); -+ saa716x_gpio_write(saa716x, 26, 1); -+ msleep(10); -+ -+ adapter->fe = dvb_attach(stv090x_attach, -+ &skystar2_stv090x_config, -+ &i2c->i2c_adapter, -+ STV090x_DEMODULATOR_0); -+ -+ if (adapter->fe) { -+ dprintk(SAA716x_NOTICE, 1, "found STV0903 @0x%02x", -+ skystar2_stv090x_config.address); -+ } else { -+ goto exit; -+ } -+ -+ adapter->fe->ops.set_voltage = skystar2_set_voltage; -+ adapter->fe->ops.enable_high_lnb_voltage = skystar2_voltage_boost; -+ -+ ctl = dvb_attach(stv6110x_attach, -+ adapter->fe, -+ &skystar2_stv6110x_config, -+ &i2c->i2c_adapter); -+ -+ if (ctl) { -+ dprintk(SAA716x_NOTICE, 1, "found STV6110(A) @0x%02x", -+ skystar2_stv6110x_config.addr); -+ -+ skystar2_stv090x_config.tuner_init = ctl->tuner_init; -+ skystar2_stv090x_config.tuner_sleep = ctl->tuner_sleep; -+ skystar2_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; -+ skystar2_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; -+ skystar2_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; -+ skystar2_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; -+ skystar2_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; -+ skystar2_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; -+ skystar2_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; -+ skystar2_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; -+ skystar2_stv090x_config.tuner_get_status = ctl->tuner_get_status; -+ -+ /* call the init function once to initialize -+ tuner's clock output divider and demod's -+ master clock */ -+ if (adapter->fe->ops.init) -+ adapter->fe->ops.init(adapter->fe); -+ } else { -+ goto exit; -+ } -+ -+ dprintk(SAA716x_ERROR, 1, "Done!"); -+ return 0; -+ } -+exit: -+ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); -+ return -ENODEV; -+} -+ -+static struct saa716x_config skystar2_express_hd_config = { -+ .model_name = SAA716x_MODEL_SKYSTAR2_EXPRESS_HD, -+ .dev_type = SAA716x_DEV_SKYSTAR2_EXPRESS_HD, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = skystar2_express_hd_frontend_attach, -+ .irq_handler = saa716x_budget_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+ .adap_config = { -+ { -+ /* Adapter 0 */ -+ .ts_port = 1, /* using FGPI 1 */ -+ .worker = demux_worker -+ } -+ } -+}; -+ -+static struct ds3103_config s472_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 1, -+}; -+ -+static int saa716x_s472_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *i2c = &saa716x->i2c[1]; -+ -+ if (count != 0) -+ return 0; -+ -+ dprintk(SAA716x_ERROR, 1, "Probing for DS3103 (DVB-S/S2)"); -+ adapter->fe = dvb_attach(ds3103_attach, &s472_ds3103_config, -+ &i2c->i2c_adapter); -+ -+ if (adapter->fe == NULL) { -+ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); -+ return -ENODEV; -+ } -+ -+ dprintk(SAA716x_ERROR, 1, "found DS3103 DVB-S/S2 frontend @0x%02x", -+ s472_ds3103_config.demod_address); -+ if (NULL == dvb_attach(ts2022_attach, adapter->fe, 0x60, &i2c->i2c_adapter)) -+ dprintk(SAA716x_ERROR, 1, "ts2022 attach failed"); -+ else -+ dprintk(SAA716x_ERROR, 1, "ts2022 attached!"); -+ -+ dprintk(SAA716x_ERROR, 1, "Done!"); -+ return 0; -+ -+} -+ -+static struct saa716x_config tevii_s472_config = { -+ .model_name = "TeVii S472 DVB-S2", -+ .dev_type = "DVB-S/S2", -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_s472_frontend_attach, -+ .irq_handler = saa716x_budget_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+ .adap_config = { -+ { -+ /* Adapter 0 */ -+ .ts_port = 1, /* using FGPI 1 */ -+ .worker = demux_worker -+ } -+ } -+}; -+ -+static struct pci_device_id saa716x_budget_pci_table[] = { -+ -+ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_1028, SAA7160, &saa716x_vp1028_config), /* VP-1028 */ -+ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_3071, SAA7160, &saa716x_vp3071_config), /* VP-3071 */ -+ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_6002, SAA7160, &saa716x_vp6002_config), /* VP-6002 */ -+ MAKE_ENTRY(KNC_One, KNC_Dual_S2, SAA7160, &saa716x_knc1_duals2_config), -+ MAKE_ENTRY(TECHNISAT, SKYSTAR2_EXPRESS_HD, SAA7160, &skystar2_express_hd_config), -+ MAKE_ENTRY(TEVII, TEVII_S472, SAA7160, &tevii_s472_config), -+ { } -+}; -+MODULE_DEVICE_TABLE(pci, saa716x_budget_pci_table); -+ -+static struct pci_driver saa716x_budget_pci_driver = { -+ .name = DRIVER_NAME, -+ .id_table = saa716x_budget_pci_table, -+ .probe = saa716x_budget_pci_probe, -+ .remove = saa716x_budget_pci_remove, -+}; -+ -+static int __devinit saa716x_budget_init(void) -+{ -+ return pci_register_driver(&saa716x_budget_pci_driver); -+} -+ -+static void __devexit saa716x_budget_exit(void) -+{ -+ return pci_unregister_driver(&saa716x_budget_pci_driver); -+} -+ -+module_init(saa716x_budget_init); -+module_exit(saa716x_budget_exit); -+ -+MODULE_DESCRIPTION("SAA716x Budget driver"); -+MODULE_AUTHOR("Manu Abraham"); -+MODULE_LICENSE("GPL"); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.h 2013-01-16 10:41:10.910798289 +0100 -@@ -0,0 +1,17 @@ -+#ifndef __SAA716x_BUDGET_H -+#define __SAA716x_BUDGET_H -+ -+#define TWINHAN_TECHNOLOGIES 0x1822 -+#define TWINHAN_VP_3071 0x0039 -+#define TWINHAN_VP_1028 0x0044 -+#define TWINHAN_VP_6002 0x0047 -+ -+#define KNC_One 0x1894 -+#define KNC_Dual_S2 0x0110 -+ -+#define TECHNISAT 0x1AE4 -+#define SKYSTAR2_EXPRESS_HD 0x0700 -+#define TEVII 0x9022 -+#define TEVII_S472 0xd472 -+ -+#endif /* __SAA716x_BUDGET_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.c 2013-01-16 10:41:10.910798289 +0100 -@@ -0,0 +1,539 @@ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_cgu_reg.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+u32 cgu_clk[14] = { -+ CGU_FDC_0, -+ CGU_FDC_1, -+ CGU_FDC_2, -+ CGU_FDC_3, -+ CGU_FDC_4, -+ CGU_FDC_5, -+ CGU_FDC_6, -+ CGU_FDC_7, -+ CGU_FDC_8, -+ CGU_FDC_9, -+ CGU_FDC_10, -+ CGU_FDC_11, -+ CGU_FDC_12, -+ CGU_FDC_13 -+}; -+ -+char *clk_desc[14] = { -+ "Clk PSS", -+ "Clk DCS", -+ "Clk SPI", -+ "Clk I2C/Boot", -+ "Clk PHI", -+ "Clk VI0", -+ "Clk VI1", -+ "Clk FGPI0", -+ "Clk FGPI1", -+ "Clk FGPI2", -+ "Clk FGPI3", -+ "Clk AI0", -+ "Clk AI1", -+ "Clk Phy" -+}; -+ -+int saa716x_getbootscript_setup(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_cgu *cgu = &saa716x->cgu; -+ -+ u8 i; -+ s8 N = 0; -+ s16 M = 0; -+ -+ SAA716x_EPWR(CGU, CGU_PCR_0_6, CGU_PCR_RUN); /* GREG */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_3, CGU_PCR_RUN); /* PSS_MMU */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_4, CGU_PCR_RUN); /* PSS_DTL2MTL */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_5, CGU_PCR_RUN); /* MSI */ -+ SAA716x_EPWR(CGU, CGU_PCR_3_2, CGU_PCR_RUN); /* I2C */ -+ SAA716x_EPWR(CGU, CGU_PCR_4_1, CGU_PCR_RUN); /* PHI */ -+ SAA716x_EPWR(CGU, CGU_PCR_0_7, CGU_PCR_RUN); /* GPIO */ -+ SAA716x_EPWR(CGU, CGU_PCR_2_1, CGU_PCR_RUN); /* SPI */ -+ SAA716x_EPWR(CGU, CGU_PCR_1_1, CGU_PCR_RUN); /* DCS */ -+ SAA716x_EPWR(CGU, CGU_PCR_3_1, CGU_PCR_RUN); /* BOOT */ -+ -+ /* get all dividers */ -+ for (i = 0; i < CGU_CLKS; i++) { -+ cgu->clk_boot_div[i] = SAA716x_EPRD(CGU, cgu_clk[i]); -+ cgu->clk_curr_div[i] = cgu->clk_boot_div[i]; -+ -+ N = (cgu->clk_boot_div[i] >> 11) & 0xff; -+ N *= -1; -+ M = ((cgu->clk_boot_div[i] >> 3) & 0xff) + N; -+ -+ if (M) -+ cgu->clk_freq[i] = (u32 ) N * PLL_FREQ / (u32 ) M; -+ else -+ cgu->clk_freq[i] = 0; -+ -+ dprintk(SAA716x_DEBUG, 1, "Domain %d: %s <0x%02x> Divider: 0x%x --> N=%d, M=%d, freq=%d", -+ i, clk_desc[i], cgu_clk[i], cgu->clk_boot_div[i], N, M, cgu->clk_freq[i]); -+ } -+ /* store clock settings */ -+ cgu->clk_vi_0[0] = cgu->clk_freq[CLK_DOMAIN_VI0]; -+ cgu->clk_vi_0[1] = cgu->clk_freq[CLK_DOMAIN_VI0]; -+ cgu->clk_vi_0[2] = cgu->clk_freq[CLK_DOMAIN_VI0]; -+ cgu->clk_vi_1[0] = cgu->clk_freq[CLK_DOMAIN_VI1]; -+ cgu->clk_vi_1[1] = cgu->clk_freq[CLK_DOMAIN_VI1]; -+ cgu->clk_vi_1[2] = cgu->clk_freq[CLK_DOMAIN_VI1]; -+ -+ return 0; -+} -+ -+int saa716x_set_clk_internal(struct saa716x_dev *saa716x, u32 port) -+{ -+ struct saa716x_cgu *cgu = &saa716x->cgu; -+ -+ u8 delay = 1; -+ -+ switch (port) { -+ case PORT_VI0_VIDEO: -+ cgu->clk_int_port[PORT_VI0_VIDEO] = 1; -+ -+ if (!cgu->clk_int_port[PORT_VI0_VBI]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_CGU_CLKRUN(5); -+ break; -+ -+ case PORT_VI0_VBI: -+ cgu->clk_int_port[PORT_VI0_VBI] = 1; -+ -+ if (!cgu->clk_int_port[PORT_VI0_VIDEO]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_CGU_CLKRUN(5); -+ break; -+ -+ case PORT_VI1_VIDEO: -+ cgu->clk_int_port[PORT_VI1_VIDEO] = 1; -+ -+ if (!cgu->clk_int_port[PORT_VI1_VBI]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_CGU_CLKRUN(6); -+ break; -+ -+ case PORT_VI1_VBI: -+ cgu->clk_int_port[PORT_VI1_VBI] = 1; -+ -+ if (!cgu->clk_int_port[PORT_VI1_VIDEO]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_CGU_CLKRUN(6); -+ break; -+ -+ case PORT_FGPI0: -+ cgu->clk_int_port[PORT_FGPI0] = 1; -+ SAA716x_CGU_CLKRUN(7); -+ break; -+ -+ case PORT_FGPI1: -+ cgu->clk_int_port[PORT_FGPI1] = 1; -+ SAA716x_CGU_CLKRUN(8); -+ break; -+ -+ case PORT_FGPI2: -+ cgu->clk_int_port[PORT_FGPI2] = 1; -+ SAA716x_CGU_CLKRUN(9); -+ break; -+ -+ case PORT_FGPI3: -+ cgu->clk_int_port[PORT_FGPI3] = 1; -+ SAA716x_CGU_CLKRUN(10); -+ break; -+ -+ case PORT_AI0: -+ cgu->clk_int_port[PORT_AI0] = 1; -+ SAA716x_CGU_CLKRUN(11); -+ break; -+ -+ case PORT_AI1: -+ cgu->clk_int_port[PORT_AI1] = 1; -+ SAA716x_CGU_CLKRUN(12); -+ break; -+ -+ case PORT_ALL: -+ SAA716x_CGU_CLKRUN(5); -+ SAA716x_CGU_CLKRUN(6); -+ SAA716x_CGU_CLKRUN(7); -+ SAA716x_CGU_CLKRUN(8); -+ SAA716x_CGU_CLKRUN(9); -+ SAA716x_CGU_CLKRUN(10); -+ SAA716x_CGU_CLKRUN(11); -+ SAA716x_CGU_CLKRUN(12); -+ -+ cgu->clk_int_port[PORT_VI0_VIDEO] = 1; -+ cgu->clk_int_port[PORT_VI0_VBI] = 1; -+ cgu->clk_int_port[PORT_VI1_VIDEO] = 1; -+ cgu->clk_int_port[PORT_VI1_VBI] = 1; -+ cgu->clk_int_port[PORT_FGPI0] = 1; -+ cgu->clk_int_port[PORT_FGPI1] = 1; -+ cgu->clk_int_port[PORT_FGPI2] = 1; -+ cgu->clk_int_port[PORT_FGPI3] = 1; -+ cgu->clk_int_port[PORT_AI0] = 1; -+ cgu->clk_int_port[PORT_AI1] = 1; -+ break; -+ -+ default: -+ dprintk(SAA716x_ERROR, 1, "Unknown port <%02x>", port); -+ delay = 0; -+ break; -+ } -+ -+ /* wait for PLL */ -+ if (delay) -+ msleep(1); -+ -+ return 0; -+} -+ -+int saa716x_set_clk_external(struct saa716x_dev *saa716x, u32 port) -+{ -+ struct saa716x_cgu *cgu = &saa716x->cgu; -+ -+ u8 delay = 1; -+ -+ switch (port) { -+ case PORT_VI0_VIDEO: -+ cgu->clk_int_port[PORT_VI0_VIDEO] = 0; -+ -+ if (!cgu->clk_int_port[PORT_VI0_VBI]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_EPWR(CGU, CGU_FS1_5, 0x2); /* VI 0 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_5, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_VI0_VBI: -+ cgu->clk_int_port[PORT_VI0_VBI] = 0; -+ -+ if (!cgu->clk_int_port[PORT_VI0_VIDEO]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_EPWR(CGU, CGU_FS1_5, 0x2); /* VI 0 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_5, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_VI1_VIDEO: -+ cgu->clk_int_port[PORT_VI1_VIDEO] = 0; -+ -+ if (!cgu->clk_int_port[PORT_VI1_VBI]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_EPWR(CGU, CGU_FS1_6, 0x3); /* VI 1 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_6, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_VI1_VBI: -+ cgu->clk_int_port[PORT_VI1_VBI] = 0; -+ -+ if (!cgu->clk_int_port[PORT_VI1_VIDEO]) { -+ delay = 0; -+ break; -+ } -+ -+ SAA716x_EPWR(CGU, CGU_FS1_6, 0x3); /* VI 1 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_6, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_FGPI0: -+ cgu->clk_int_port[PORT_FGPI0] = 0; -+ -+ SAA716x_EPWR(CGU, CGU_FS1_7, 0x4); /* FGPI 0 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_7, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_FGPI1: -+ cgu->clk_int_port[PORT_FGPI1] = 0; -+ -+ SAA716x_EPWR(CGU, CGU_FS1_8, 0x5); /* FGPI 1 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_8, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_FGPI2: -+ cgu->clk_int_port[PORT_FGPI2] = 0; -+ -+ SAA716x_EPWR(CGU, CGU_FS1_9, 0x6); /* FGPI 2 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_9, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_FGPI3: -+ cgu->clk_int_port[PORT_FGPI3] = 0; -+ -+ SAA716x_EPWR(CGU, CGU_FS1_10, 0x7); /* FGPI 3 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_10, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_AI0: -+ cgu->clk_int_port[PORT_AI0] = 1; -+ -+ SAA716x_EPWR(CGU, CGU_FS1_11, 0x8); /* AI 0 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_11, 0x0); /* disable divider */ -+ break; -+ -+ case PORT_AI1: -+ cgu->clk_int_port[PORT_AI1] = 1; -+ -+ SAA716x_EPWR(CGU, CGU_FS1_12, 0x9); /* AI 1 clk */ -+ SAA716x_EPWR(CGU, CGU_ESR_12, 0x0); /* disable divider */ -+ break; -+ -+ default: -+ dprintk(SAA716x_ERROR, 1, "Unknown port <%02x>", port); -+ delay = 0; -+ break; -+ -+ } -+ -+ if (delay) -+ msleep(1); -+ -+ return 0; -+} -+ -+int saa716x_get_clk(struct saa716x_dev *saa716x, -+ enum saa716x_clk_domain domain, -+ u32 *frequency) -+{ -+ struct saa716x_cgu *cgu = &saa716x->cgu; -+ -+ switch (domain) { -+ case CLK_DOMAIN_PSS: -+ case CLK_DOMAIN_DCS: -+ case CLK_DOMAIN_SPI: -+ case CLK_DOMAIN_I2C: -+ case CLK_DOMAIN_PHI: -+ case CLK_DOMAIN_VI0: -+ case CLK_DOMAIN_VI1: -+ case CLK_DOMAIN_FGPI0: -+ case CLK_DOMAIN_FGPI1: -+ case CLK_DOMAIN_FGPI2: -+ case CLK_DOMAIN_FGPI3: -+ case CLK_DOMAIN_AI0: -+ case CLK_DOMAIN_AI1: -+ case CLK_DOMAIN_PHY: -+ *frequency = cgu->clk_freq[domain]; -+ break; -+ -+ case CLK_DOMAIN_VI0VBI: -+ *frequency = cgu->clk_freq[CLK_DOMAIN_VI0]; -+ break; -+ -+ case CLK_DOMAIN_VI1VBI: -+ *frequency =cgu->clk_freq[CLK_DOMAIN_VI1]; -+ break; -+ default: -+ dprintk(SAA716x_ERROR, 1, "Error Clock domain <%02x>", domain); -+ break; -+ } -+ -+ return 0; -+} -+ -+int saa716x_set_clk(struct saa716x_dev *saa716x, -+ enum saa716x_clk_domain domain, -+ u32 frequency) -+{ -+ struct saa716x_cgu *cgu = &saa716x->cgu; -+ -+ u32 M = 1, N = 1, reset, i; -+ s8 N_tmp, M_tmp, sub, add, lsb; -+ -+ -+ if (cgu->clk_freq_min > frequency) -+ frequency = cgu->clk_freq_min; -+ -+ if (cgu->clk_freq_max < frequency) -+ frequency = cgu->clk_freq_max; -+ -+ switch (domain) { -+ case CLK_DOMAIN_PSS: -+ case CLK_DOMAIN_DCS: -+ case CLK_DOMAIN_SPI: -+ case CLK_DOMAIN_I2C: -+ case CLK_DOMAIN_PHI: -+ case CLK_DOMAIN_FGPI0: -+ case CLK_DOMAIN_FGPI1: -+ case CLK_DOMAIN_FGPI2: -+ case CLK_DOMAIN_FGPI3: -+ case CLK_DOMAIN_AI0: -+ case CLK_DOMAIN_AI1: -+ case CLK_DOMAIN_PHY: -+ -+ if (frequency == cgu->clk_freq[domain]) -+ return 0; /* same frequency */ -+ break; -+ -+ case CLK_DOMAIN_VI0: -+ -+ if (frequency == cgu->clk_vi_0[1]) { -+ return 0; -+ -+ } else if (frequency == cgu->clk_vi_0[0]) { -+ cgu->clk_vi_0[1] = frequency; /* store */ -+ -+ if (frequency == cgu->clk_vi_0[2]) -+ return 0; -+ -+ } else { -+ cgu->clk_vi_0[1] = frequency; -+ -+ if (frequency != cgu->clk_vi_0[2]) -+ return 0; -+ -+ } -+ break; -+ -+ case CLK_DOMAIN_VI1: -+ if (frequency == cgu->clk_vi_1[1]) { -+ return 0; -+ -+ } else if (frequency == cgu->clk_vi_1[0]) { -+ cgu->clk_vi_1[1] = frequency; /* store */ -+ -+ if (frequency == cgu->clk_vi_1[2]) -+ return 0; -+ -+ } else { -+ cgu->clk_vi_1[1] = frequency; -+ -+ if (frequency != cgu->clk_vi_1[2]) -+ return 0; -+ -+ } -+ break; -+ -+ case CLK_DOMAIN_VI0VBI: -+ if (frequency == cgu->clk_vi_0[2]) { -+ return 0; -+ -+ } else if (frequency == cgu->clk_vi_0[0]) { -+ cgu->clk_vi_0[2] = frequency; /* store */ -+ -+ if (frequency == cgu->clk_vi_0[1]) -+ return 0; -+ -+ } else { -+ cgu->clk_vi_0[2] = frequency; /* store */ -+ -+ if (frequency != cgu->clk_vi_0[1]) -+ return 0; -+ -+ } -+ domain = CLK_DOMAIN_VI0; /* change domain */ -+ break; -+ -+ case CLK_DOMAIN_VI1VBI: -+ if (frequency == cgu->clk_vi_1[2]) { -+ return 0; -+ -+ } else if (frequency == cgu->clk_vi_1[0]) { -+ cgu->clk_vi_1[2] = frequency; /* store */ -+ -+ if (frequency == cgu->clk_vi_1[1]) -+ return 0; -+ -+ } else { -+ cgu->clk_vi_1[2] = frequency; /* store */ -+ -+ if (frequency != cgu->clk_vi_1[1]) -+ return 0; -+ -+ } -+ domain = CLK_DOMAIN_VI1; /* change domain */ -+ break; -+ } -+ -+ /* calculate divider */ -+ do { -+ M = (N * PLL_FREQ) / frequency; -+ if (M == 0) -+ N++; -+ -+ } while (M == 0); -+ -+ /* calculate frequency */ -+ cgu->clk_freq[domain] = (N * PLL_FREQ) / M; -+ -+ N_tmp = N & 0xff; -+ M_tmp = M & 0xff; -+ sub = -N_tmp; -+ add = M_tmp - N_tmp; -+ lsb = 4; /* run */ -+ -+ if (((10 * N) / M) < 5) -+ lsb |= 1; /* stretch */ -+ -+ /* store new divider */ -+ cgu->clk_curr_div[domain] = sub & 0xff; -+ cgu->clk_curr_div[domain] <<= 8; -+ cgu->clk_curr_div[domain] = add & 0xff; -+ cgu->clk_curr_div[domain] <<= 3; -+ cgu->clk_curr_div[domain] |= lsb; -+ -+ dprintk(SAA716x_DEBUG, 1, "Domain <0x%02x> Frequency <%d> Set Freq <%d> N=%d M=%d Divider <0x%02x>", -+ domain, -+ frequency, -+ cgu->clk_freq[domain], -+ N, -+ M, -+ cgu->clk_curr_div[domain]); -+ -+ reset = 0; -+ -+ /* Reset */ -+ SAA716x_EPWR(CGU, cgu_clk[domain], cgu->clk_curr_div[domain] | 0x2); -+ -+ /* Reset disable */ -+ for (i = 0; i < 1000; i++) { -+ msleep(10); -+ reset = SAA716x_EPRD(CGU, cgu_clk[domain]); -+ -+ if (cgu->clk_curr_div[domain == reset]) -+ break; -+ } -+ -+ if (cgu->clk_curr_div[domain] != reset) -+ SAA716x_EPWR(CGU, cgu_clk[domain], cgu->clk_curr_div[domain]); -+ -+ return 0; -+} -+ -+int saa716x_cgu_init(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_cgu *cgu = &saa716x->cgu; -+ -+ cgu->clk_freq_min = PLL_FREQ / 255; -+ if (PLL_FREQ > (cgu->clk_freq_min * 255)) -+ cgu->clk_freq_min++; -+ -+ cgu->clk_freq_max = PLL_FREQ; -+ -+ saa716x_getbootscript_setup(saa716x); -+ saa716x_set_clk_internal(saa716x, PORT_ALL); -+ -+ return 0; -+} -+EXPORT_SYMBOL(saa716x_cgu_init); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.h 2013-01-16 10:41:10.911798282 +0100 -@@ -0,0 +1,61 @@ -+#ifndef __SAA716x_CGU_H -+#define __SAA716x_CGU_H -+ -+#define PLL_FREQ 2500 -+ -+#define SAA716x_CGU_CLKRUN(__reg) do { \ -+ SAA716x_EPWR(CGU, CGU_PCR_##__reg, CGU_PCR_RUN); /* Run */ \ -+ SAA716x_EPWR(CGU, CGU_SCR_##__reg, CGU_SCR_ENF1); /* Switch */ \ -+ SAA716x_EPWR(CGU, CGU_FS1_##__reg, 0x00000000); /* PLL Clk */ \ -+ SAA716x_EPWR(CGU, CGU_ESR_##__reg, CGU_ESR_FD_EN); /* Frac div */ \ -+} while (0) -+ -+enum saa716x_clk_domain { -+ CLK_DOMAIN_PSS = 0, -+ CLK_DOMAIN_DCS = 1, -+ CLK_DOMAIN_SPI = 2, -+ CLK_DOMAIN_I2C = 3, -+ CLK_DOMAIN_PHI = 4, -+ CLK_DOMAIN_VI0 = 5, -+ CLK_DOMAIN_VI1 = 6, -+ CLK_DOMAIN_FGPI0 = 7, -+ CLK_DOMAIN_FGPI1 = 8, -+ CLK_DOMAIN_FGPI2 = 9, -+ CLK_DOMAIN_FGPI3 = 10, -+ CLK_DOMAIN_AI0 = 11, -+ CLK_DOMAIN_AI1 = 12, -+ CLK_DOMAIN_PHY = 13, -+ CLK_DOMAIN_VI0VBI = 14, -+ CLK_DOMAIN_VI1VBI = 15 -+}; -+ -+#define PORT_VI0_VIDEO 0 -+#define PORT_VI0_VBI 2 -+#define PORT_VI1_VIDEO 3 -+#define PORT_VI1_VBI 5 -+#define PORT_FGPI0 6 -+#define PORT_FGPI1 7 -+#define PORT_FGPI2 8 -+#define PORT_FGPI3 9 -+#define PORT_AI0 10 -+#define PORT_AI1 11 -+#define PORT_ALL 12 -+ -+#define CGU_CLKS 14 -+ -+struct saa716x_cgu { -+ u8 clk_int_port[12]; -+ u32 clk_vi_0[3]; -+ u32 clk_vi_1[3]; -+ u32 clk_boot_div[CGU_CLKS]; -+ u32 clk_curr_div[CGU_CLKS]; -+ u32 clk_freq[CGU_CLKS]; -+ u32 clk_freq_min; -+ u32 clk_freq_max; -+}; -+ -+extern int saa716x_cgu_init(struct saa716x_dev *saa716x); -+extern int saa716x_set_clk_internal(struct saa716x_dev *saa716x, u32 port); -+extern int saa716x_set_clk_external(struct saa716x_dev *saa716x, u32 port); -+ -+#endif /* __SAA716x_CGU_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu_reg.h 2013-01-16 10:41:10.911798282 +0100 -@@ -0,0 +1,178 @@ -+#ifndef __SAA716x_CGU_REG_H -+#define __SAA716x_CGU_REG_H -+ -+/* -------------- CGU Registers -------------- */ -+ -+#define CGU_SCR_0 0x000 -+#define CGU_SCR_1 0x004 -+#define CGU_SCR_2 0x008 -+#define CGU_SCR_3 0x00c -+#define CGU_SCR_4 0x010 -+#define CGU_SCR_5 0x014 -+#define CGU_SCR_6 0x018 -+#define CGU_SCR_7 0x01c -+#define CGU_SCR_8 0x020 -+#define CGU_SCR_9 0x024 -+#define CGU_SCR_10 0x028 -+#define CGU_SCR_11 0x02c -+#define CGU_SCR_12 0x030 -+#define CGU_SCR_13 0x034 -+#define CGU_SCR_STOP (0x00000001 << 3) -+#define CGU_SCR_RESET (0x00000001 << 2) -+#define CGU_SCR_ENF2 (0x00000001 << 1) -+#define CGU_SCR_ENF1 (0x00000001 << 0) -+ -+#define CGU_FS1_0 0x038 -+#define CGU_FS1_1 0x03c -+#define CGU_FS1_2 0x040 -+#define CGU_FS1_3 0x044 -+#define CGU_FS1_4 0x048 -+#define CGU_FS1_5 0x04c -+#define CGU_FS1_6 0x050 -+#define CGU_FS1_7 0x054 -+#define CGU_FS1_8 0x058 -+#define CGU_FS1_9 0x05c -+#define CGU_FS1_10 0x060 -+#define CGU_FS1_11 0x064 -+#define CGU_FS1_12 0x068 -+#define CGU_FS1_13 0x06c -+#define CGU_FS1_PLL (0x00000000 << 0) -+ -+ -+#define CGU_FS2_0 0x070 -+#define CGU_FS2_1 0x074 -+#define CGU_FS2_2 0x078 -+#define CGU_FS2_3 0x07c -+#define CGU_FS2_4 0x080 -+#define CGU_FS2_5 0x084 -+#define CGU_FS2_6 0x088 -+#define CGU_FS2_7 0x08c -+#define CGU_FS2_8 0x090 -+#define CGU_FS2_9 0x094 -+#define CGU_FS2_10 0x098 -+#define CGU_FS2_11 0x09c -+#define CGU_FS2_12 0x0a0 -+#define CGU_FS2_13 0x0a4 -+ -+#define CGU_SSR_0 0x0a8 -+#define CGU_SSR_1 0x0ac -+#define CGU_SSR_2 0x0b0 -+#define CGU_SSR_3 0x0b4 -+#define CGU_SSR_4 0x0b8 -+#define CGU_SSR_5 0x0bc -+#define CGU_SSR_6 0x0c0 -+#define CGU_SSR_7 0x0c4 -+#define CGU_SSR_8 0x0c8 -+#define CGU_SSR_9 0x0cc -+#define CGU_SSR_10 0x0d0 -+#define CGU_SSR_11 0x0d4 -+#define CGU_SSR_12 0x0d8 -+#define CGU_SSR_13 0x0dc -+ -+#define CGU_PCR_0_0 0x0e0 -+#define CGU_PCR_0_1 0x0e4 -+#define CGU_PCR_0_2 0x0e8 -+#define CGU_PCR_0_3 0x0ec -+#define CGU_PCR_0_4 0x0f0 -+#define CGU_PCR_0_5 0x0f4 -+#define CGU_PCR_0_6 0x0f8 -+#define CGU_PCR_0_7 0x0fc -+#define CGU_PCR_1_0 0x100 -+#define CGU_PCR_1_1 0x104 -+#define CGU_PCR_2_0 0x108 -+#define CGU_PCR_2_1 0x10c -+#define CGU_PCR_3_0 0x110 -+#define CGU_PCR_3_1 0x114 -+#define CGU_PCR_3_2 0x118 -+#define CGU_PCR_4_0 0x11c -+#define CGU_PCR_4_1 0x120 -+#define CGU_PCR_5 0x124 -+#define CGU_PCR_6 0x128 -+#define CGU_PCR_7 0x12c -+#define CGU_PCR_8 0x130 -+#define CGU_PCR_9 0x134 -+#define CGU_PCR_10 0x138 -+#define CGU_PCR_11 0x13c -+#define CGU_PCR_12 0x140 -+#define CGU_PCR_13 0x144 -+#define CGU_PCR_WAKE_EN (0x00000001 << 2) -+#define CGU_PCR_AUTO (0x00000001 << 1) -+#define CGU_PCR_RUN (0x00000001 << 0) -+ -+ -+#define CGU_PSR_0_0 0x148 -+#define CGU_PSR_0_1 0x14c -+#define CGU_PSR_0_2 0x150 -+#define CGU_PSR_0_3 0x154 -+#define CGU_PSR_0_4 0x158 -+#define CGU_PSR_0_5 0x15c -+#define CGU_PSR_0_6 0x160 -+#define CGU_PSR_0_7 0x164 -+#define CGU_PSR_1_0 0x168 -+#define CGU_PSR_1_1 0x16c -+#define CGU_PSR_2_0 0x170 -+#define CGU_PSR_2_1 0x174 -+#define CGU_PSR_3_0 0x178 -+#define CGU_PSR_3_1 0x17c -+#define CGU_PSR_3_2 0x180 -+#define CGU_PSR_4_0 0x184 -+#define CGU_PSR_4_1 0x188 -+#define CGU_PSR_5 0x18c -+#define CGU_PSR_6 0x190 -+#define CGU_PSR_7 0x194 -+#define CGU_PSR_8 0x198 -+#define CGU_PSR_9 0x19c -+#define CGU_PSR_10 0x1a0 -+#define CGU_PSR_11 0x1a4 -+#define CGU_PSR_12 0x1a8 -+#define CGU_PSR_13 0x1ac -+ -+#define CGU_ESR_0_0 0x1b0 -+#define CGU_ESR_0_1 0x1b4 -+#define CGU_ESR_0_2 0x1b8 -+#define CGU_ESR_0_3 0x1bc -+#define CGU_ESR_0_4 0x1c0 -+#define CGU_ESR_0_5 0x1c4 -+#define CGU_ESR_0_6 0x1c8 -+#define CGU_ESR_0_7 0x1cc -+#define CGU_ESR_1_0 0x1d0 -+#define CGU_ESR_1_1 0x1d4 -+#define CGU_ESR_2_0 0x1d8 -+#define CGU_ESR_2_1 0x1dc -+#define CGU_ESR_3_0 0x1e0 -+#define CGU_ESR_3_1 0x1e4 -+#define CGU_ESR_3_2 0x1e8 -+#define CGU_ESR_4_0 0x1ec -+#define CGU_ESR_4_1 0x1f0 -+#define CGU_ESR_5 0x1f4 -+#define CGU_ESR_6 0x1f8 -+#define CGU_ESR_7 0x1fc -+#define CGU_ESR_8 0x200 -+#define CGU_ESR_9 0x204 -+#define CGU_ESR_10 0x208 -+#define CGU_ESR_11 0x20c -+#define CGU_ESR_12 0x210 -+#define CGU_ESR_13 0x214 -+#define CGU_ESR_FD_EN (0x00000001 << 0) -+ -+#define CGU_FDC_0 0x218 -+#define CGU_FDC_1 0x21c -+#define CGU_FDC_2 0x220 -+#define CGU_FDC_3 0x224 -+#define CGU_FDC_4 0x228 -+#define CGU_FDC_5 0x22c -+#define CGU_FDC_6 0x230 -+#define CGU_FDC_7 0x234 -+#define CGU_FDC_8 0x238 -+#define CGU_FDC_9 0x23c -+#define CGU_FDC_10 0x240 -+#define CGU_FDC_11 0x244 -+#define CGU_FDC_12 0x248 -+#define CGU_FDC_13 0x24c -+#define CGU_FDC_STRETCH (0x00000001 << 0) -+#define CGU_FDC_RESET (0x00000001 << 1) -+#define CGU_FDC_RUN1 (0x00000001 << 2) -+#define CGU_FDC_MADD (0x000000ff << 3) -+#define CGU_FDC_MSUB (0x000000ff << 11) -+ -+#endif /* __SAA716x_CGU_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dcs_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dcs_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_dcs_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dcs_reg.h 2013-01-16 10:41:10.912798275 +0100 -@@ -0,0 +1,56 @@ -+#ifndef __SAA716x_DCS_REG_H -+#define __SAA716x_DCS_REG_H -+ -+/* -------------- DCS Registers -------------- */ -+ -+#define DCSC_CTRL 0x000 -+#define DCSC_SEL_PLLDI (0x03ffffff << 5) -+#define DCSC_TOUT_SEL (0x0000000f << 1) -+#define DCSC_TOUT_OFF (0x00000001 << 0) -+ -+#define DCSC_ADDR 0x00c -+#define DCSC_ERR_TOUT_ADDR (0x3fffffff << 2) -+ -+#define DCSC_STAT 0x010 -+#define DCSC_ERR_TOUT_GNT (0x0000001f << 24) -+#define DCSC_ERR_TOUT_SEL (0x0000007f << 10) -+#define DCSC_ERR_TOUT_READ (0x00000001 << 8) -+#define DCSC_ERR_TOUT_MASK (0x0000000f << 4) -+#define DCSC_ERR_ACK (0x00000001 << 1) -+ -+#define DCSC_FEATURES 0x040 -+#define DCSC_UNIQUE_ID (0x00000007 << 16) -+#define DCSC_SECURITY (0x00000001 << 14) -+#define DCSC_NUM_BASE_REGS (0x00000003 << 11) -+#define DCSC_NUM_TARGETS (0x0000001f << 5) -+#define DCSC_NUM_INITIATORS (0x0000001f << 0) -+ -+#define DCSC_BASE_REG0 0x100 -+#define DCSC_BASE_N_REG (0x00000fff << 20) -+ -+#define DCSC_INT_CLR_ENABLE 0xfd8 -+#define DCSC_INT_CLR_ENABLE_TOUT (0x00000001 << 1) -+#define DCSC_INT_CLR_ENABLE_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_SET_ENABLE 0xfdc -+#define DCSC_INT_SET_ENABLE_TOUT (0x00000001 << 1) -+#define DCSC_INT_SET_ENABLE_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_STATUS 0xfe0 -+#define DCSC_INT_STATUS_TOUT (0x00000001 << 1) -+#define DCSC_INT_STATUS_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_ENABLE 0xfe4 -+#define DCSC_INT_ENABLE_TOUT (0x00000001 << 1) -+#define DCSC_INT_ENABLE_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_CLR_STATUS 0xfe8 -+#define DCSC_INT_CLEAR_TOUT (0x00000001 << 1) -+#define DCSC_INT_CLEAR_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_SET_STATUS 0xfec -+#define DCSC_INT_SET_TOUT (0x00000001 << 1) -+#define DCSC_INT_SET_ERROR (0x00000001 << 0) -+ -+ -+#endif /* __SAA716x_DCS_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.c 2013-01-16 10:41:10.912798275 +0100 -@@ -0,0 +1,306 @@ -+#include -+#include -+#include -+#include -+#include -+ -+#include "saa716x_dma.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+/* Allocates one page of memory, which is stores the data of one -+ * 716x page table. The result gets stored in the passed DMA buffer -+ * structure. -+ */ -+static int saa716x_allocate_ptable(struct saa716x_dmabuf *dmabuf) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ dprintk(SAA716x_DEBUG, 1, "SG Page table allocate"); -+ dmabuf->mem_ptab_virt = (void *) __get_free_page(GFP_KERNEL); -+ -+ if (dmabuf->mem_ptab_virt == NULL) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Out of pages !"); -+ return -ENOMEM; -+ } -+ -+ dmabuf->mem_ptab_phys = dma_map_single(&pdev->dev, -+ dmabuf->mem_ptab_virt, -+ SAA716x_PAGE_SIZE, -+ DMA_TO_DEVICE); -+ -+ if (dmabuf->mem_ptab_phys == 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: map memory failed !"); -+ return -ENOMEM; -+ } -+ -+ BUG_ON(!(((unsigned long) dmabuf->mem_ptab_phys % SAA716x_PAGE_SIZE) == 0)); -+ -+ return 0; -+} -+ -+static void saa716x_free_ptable(struct saa716x_dmabuf *dmabuf) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ BUG_ON(dmabuf == NULL); -+ dprintk(SAA716x_DEBUG, 1, "SG Page table free"); -+ -+ /* free physical PCI memory */ -+ if (dmabuf->mem_ptab_phys != 0) { -+ dma_unmap_single(&pdev->dev, -+ dmabuf->mem_ptab_phys, -+ SAA716x_PAGE_SIZE, -+ DMA_TO_DEVICE); -+ -+ dmabuf->mem_ptab_phys = 0; -+ } -+ -+ /* free kernel memory */ -+ if (dmabuf->mem_ptab_virt != NULL) { -+ free_page((unsigned long) dmabuf->mem_ptab_virt); -+ dmabuf->mem_ptab_virt = NULL; -+ } -+} -+ -+static void saa716x_dmabuf_sgfree(struct saa716x_dmabuf *dmabuf) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ -+ BUG_ON(dmabuf == NULL); -+ dprintk(SAA716x_DEBUG, 1, "SG free"); -+ -+ dmabuf->mem_virt = NULL; -+ if (dmabuf->mem_virt_noalign != NULL) { -+ if (dmabuf->dma_type == SAA716x_DMABUF_INT) -+ vfree(dmabuf->mem_virt_noalign); -+ -+ dmabuf->mem_virt_noalign = NULL; -+ } -+ -+ if (dmabuf->sg_list != NULL) { -+ kfree(dmabuf->sg_list); -+ dmabuf->sg_list = NULL; -+ } -+} -+ -+/* -+ * Create a SG, when an allocated buffer is passed to it, -+ * otherwise the needed memory gets allocated by itself -+ */ -+static int saa716x_dmabuf_sgalloc(struct saa716x_dmabuf *dmabuf, void *buf, int size) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ struct scatterlist *list; -+ struct page *pg; -+ -+ int i, pages; -+ -+ BUG_ON(!(size > 0)); -+ BUG_ON(dmabuf == NULL); -+ dprintk(SAA716x_DEBUG, 1, "SG allocate"); -+ -+ if ((size % SAA716x_PAGE_SIZE) != 0) /* calculate required pages */ -+ pages = size / SAA716x_PAGE_SIZE + 1; -+ else -+ pages = size / SAA716x_PAGE_SIZE; -+ -+ /* Allocate memory for SG list */ -+ dmabuf->sg_list = kzalloc(sizeof (struct scatterlist) * pages, GFP_KERNEL); -+ if (dmabuf->sg_list == NULL) { -+ dprintk(SAA716x_ERROR, 1, "Failed to allocate memory for scatterlist."); -+ return -ENOMEM; -+ } -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing SG table"); -+ sg_init_table(dmabuf->sg_list, pages); -+ -+ if (buf == NULL) { -+ -+ /* allocate memory, unaligned */ -+ dmabuf->mem_virt_noalign = vmalloc((pages + 1) * SAA716x_PAGE_SIZE); -+ if (dmabuf->mem_virt_noalign == NULL) { -+ dprintk(SAA716x_ERROR, 1, "Failed to allocate memory for buffer"); -+ return -ENOMEM; -+ } -+ -+ /* align memory to page */ -+ dmabuf->mem_virt = (void *) PAGE_ALIGN (((unsigned long) dmabuf->mem_virt_noalign)); -+ -+ BUG_ON(!((((unsigned long) dmabuf->mem_virt) % SAA716x_PAGE_SIZE) == 0)); -+ } else { -+ dmabuf->mem_virt = buf; -+ } -+ -+ dmabuf->list_len = pages; /* scatterlist length */ -+ list = dmabuf->sg_list; -+ -+ dprintk(SAA716x_DEBUG, 1, "Allocating SG pages"); -+ for (i = 0; i < pages; i++) { -+ if (buf == NULL) -+ pg = vmalloc_to_page(dmabuf->mem_virt + i * SAA716x_PAGE_SIZE); -+ else -+ pg = virt_to_page(dmabuf->mem_virt + i * SAA716x_PAGE_SIZE); -+ -+ BUG_ON(pg == NULL); -+ sg_set_page(&list[i], pg, SAA716x_PAGE_SIZE, 0); -+ } -+ -+ dprintk(SAA716x_DEBUG, 1, "Done!"); -+ return 0; -+} -+ -+/* Fill the "page table" page with the pointers to the specified SG buffer */ -+static void saa716x_dmabuf_sgpagefill(struct saa716x_dmabuf *dmabuf, struct scatterlist *sg_list, int pages, int offset) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ struct pci_dev *pdev = saa716x->pdev; -+ struct scatterlist *sg_cur; -+ -+ u32 *page; -+ int i, j, k = 0; -+ dma_addr_t addr = 0; -+ -+ BUG_ON(dmabuf == NULL); -+ BUG_ON(sg_list == NULL); -+ BUG_ON(pages == 0); -+ dprintk(SAA716x_DEBUG, 1, "SG page fill"); -+ -+ /* make page writable for the PC */ -+ dma_sync_single_for_cpu(&pdev->dev, dmabuf->mem_ptab_phys, SAA716x_PAGE_SIZE, DMA_TO_DEVICE); -+ page = dmabuf->mem_ptab_virt; -+ -+ /* create page table */ -+ for (i = 0; i < pages; i++) { -+ sg_cur = &sg_list[i]; -+ BUG_ON(!(((sg_cur->length + sg_cur->offset) % SAA716x_PAGE_SIZE) == 0)); -+ -+ if (i == 0) -+ dmabuf->offset = (sg_cur->length + sg_cur->offset) % SAA716x_PAGE_SIZE; -+ else -+ BUG_ON(sg_cur->offset != 0); -+ -+ for (j = 0; (j * SAA716x_PAGE_SIZE) < sg_dma_len(sg_cur); j++) { -+ -+ if ((offset + sg_cur->offset) >= SAA716x_PAGE_SIZE) { -+ offset -= SAA716x_PAGE_SIZE; -+ continue; -+ } -+ -+ addr = ((u64)sg_dma_address(sg_cur)) + (j * SAA716x_PAGE_SIZE) - sg_cur->offset; -+ -+ BUG_ON(addr == 0); -+ page[k * 2] = (u32 )addr; /* Low */ -+ page[k * 2 + 1] = (u32 )(((u64) addr) >> 32); /* High */ -+ BUG_ON(page[k * 2] % SAA716x_PAGE_SIZE); -+ k++; -+ } -+ } -+ -+ for (; k < (SAA716x_PAGE_SIZE / 8); k++) { -+ page[k * 2] = (u32 ) addr; -+ page[k * 2 + 1] = (u32 ) (((u64 ) addr) >> 32); -+ } -+ -+ /* make "page table" page writable for the PC */ -+ dma_sync_single_for_device(&pdev->dev, -+ dmabuf->mem_ptab_phys, -+ SAA716x_PAGE_SIZE, -+ DMA_TO_DEVICE); -+ -+} -+ -+void saa716x_dmabufsync_dev(struct saa716x_dmabuf *dmabuf) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ dprintk(SAA716x_DEBUG, 1, "DMABUF sync DEVICE"); -+ BUG_ON(dmabuf->sg_list == NULL); -+ -+ dma_sync_sg_for_device(&pdev->dev, -+ dmabuf->sg_list, -+ dmabuf->list_len, -+ DMA_FROM_DEVICE); -+ -+} -+ -+void saa716x_dmabufsync_cpu(struct saa716x_dmabuf *dmabuf) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ dprintk(SAA716x_DEBUG, 1, "DMABUF sync CPU"); -+ BUG_ON(dmabuf->sg_list == NULL); -+ -+ dma_sync_sg_for_cpu(&pdev->dev, -+ dmabuf->sg_list, -+ dmabuf->list_len, -+ DMA_FROM_DEVICE); -+} -+ -+/* Allocates a DMA buffer for the specified external linear buffer. */ -+int saa716x_dmabuf_alloc(struct saa716x_dev *saa716x, struct saa716x_dmabuf *dmabuf, int size) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ int ret; -+ -+ BUG_ON(saa716x == NULL); -+ BUG_ON(dmabuf == NULL); -+ BUG_ON(! (size > 0)); -+ -+ dmabuf->dma_type = SAA716x_DMABUF_INT; -+ -+ dmabuf->mem_virt_noalign = NULL; -+ dmabuf->mem_virt = NULL; -+ dmabuf->mem_ptab_phys = 0; -+ dmabuf->mem_ptab_virt = NULL; -+ -+ dmabuf->list_len = 0; -+ dmabuf->saa716x = saa716x; -+ -+ /* Allocate page table */ -+ ret = saa716x_allocate_ptable(dmabuf); -+ if (ret < 0) { -+ dprintk(SAA716x_ERROR, 1, "PT alloc failed, Out of memory"); -+ goto err1; -+ } -+ -+ /* Allocate buffer as SG */ -+ ret = saa716x_dmabuf_sgalloc(dmabuf, NULL, size); -+ if (ret < 0) { -+ dprintk(SAA716x_ERROR, 1, "SG alloc failed"); -+ goto err2; -+ } -+ -+ ret = dma_map_sg(&pdev->dev, dmabuf->sg_list, dmabuf->list_len, DMA_FROM_DEVICE); -+ if (ret < 0) { -+ dprintk(SAA716x_ERROR, 1, "SG map failed"); -+ goto err3; -+ } -+ -+ saa716x_dmabuf_sgpagefill(dmabuf, dmabuf->sg_list, ret, 0); -+ -+ return 0; -+err3: -+ saa716x_dmabuf_sgfree(dmabuf); -+err2: -+ saa716x_free_ptable(dmabuf); -+err1: -+ return ret; -+} -+ -+void saa716x_dmabuf_free(struct saa716x_dev *saa716x, struct saa716x_dmabuf *dmabuf) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ BUG_ON(saa716x == NULL); -+ BUG_ON(dmabuf == NULL); -+ -+ dma_unmap_sg(&pdev->dev, dmabuf->sg_list, dmabuf->list_len, DMA_FROM_DEVICE); -+ saa716x_dmabuf_sgfree(dmabuf); -+ saa716x_free_ptable(dmabuf); -+} -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.h 2013-01-16 10:41:10.913798268 +0100 -@@ -0,0 +1,38 @@ -+#ifndef __SAA716x_DMA_H -+#define __SAA716x_DMA_H -+ -+#define SAA716x_PAGE_SIZE 4096 -+ -+enum saa716x_dma_type { -+ SAA716x_DMABUF_EXT_LIN, /* Linear external */ -+ SAA716x_DMABUF_EXT_SG, /* SG external */ -+ SAA716x_DMABUF_INT /* Linear internal */ -+}; -+ -+struct saa716x_dev; -+ -+struct saa716x_dmabuf { -+ enum saa716x_dma_type dma_type; -+ -+ void *mem_virt_noalign; -+ void *mem_virt; /* page aligned */ -+ dma_addr_t mem_ptab_phys; -+ void *mem_ptab_virt; -+ void *sg_list; /* SG list */ -+ -+ struct saa716x_dev *saa716x; -+ -+ int list_len; /* buffer len */ -+ int offset; /* page offset */ -+}; -+ -+extern int saa716x_dmabuf_alloc(struct saa716x_dev *saa716x, -+ struct saa716x_dmabuf *dmabuf, -+ int size); -+extern void saa716x_dmabuf_free(struct saa716x_dev *saa716x, -+ struct saa716x_dmabuf *dmabuf); -+ -+extern void saa716x_dmabufsync_dev(struct saa716x_dmabuf *dmabuf); -+extern void saa716x_dmabufsync_cpu(struct saa716x_dmabuf *dmabuf); -+ -+#endif /* __SAA716x_DMA_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dma_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_dma_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma_reg.h 2013-01-16 10:41:10.913798268 +0100 -@@ -0,0 +1,200 @@ -+#ifndef __SAA716x_DMA_REG_H -+#define __SAA716x_DMA_REG_H -+ -+/* -------------- BAM Registers -------------- */ -+ -+#define BAM_VI0_0_DMA_BUF_MODE 0x000 -+ -+#define BAM_VI0_0_ADDR_OFFST_0 0x004 -+#define BAM_VI0_0_ADDR_OFFST_1 0x008 -+#define BAM_VI0_0_ADDR_OFFST_2 0x00c -+#define BAM_VI0_0_ADDR_OFFST_3 0x010 -+#define BAM_VI0_0_ADDR_OFFST_4 0x014 -+#define BAM_VI0_0_ADDR_OFFST_5 0x018 -+#define BAM_VI0_0_ADDR_OFFST_6 0x01c -+#define BAM_VI0_0_ADDR_OFFST_7 0x020 -+ -+#define BAM_VI0_1_DMA_BUF_MODE 0x024 -+#define BAM_VI0_1_ADDR_OFFST_0 0x028 -+#define BAM_VI0_1_ADDR_OFFST_1 0x02c -+#define BAM_VI0_1_ADDR_OFFST_2 0x030 -+#define BAM_VI0_1_ADDR_OFFST_3 0x034 -+#define BAM_VI0_1_ADDR_OFFST_4 0x038 -+#define BAM_VI0_1_ADDR_OFFST_5 0x03c -+#define BAM_VI0_1_ADDR_OFFST_6 0x040 -+#define BAM_VI0_1_ADDR_OFFST_7 0x044 -+ -+#define BAM_VI0_2_DMA_BUF_MODE 0x048 -+#define BAM_VI0_2_ADDR_OFFST_0 0x04c -+#define BAM_VI0_2_ADDR_OFFST_1 0x050 -+#define BAM_VI0_2_ADDR_OFFST_2 0x054 -+#define BAM_VI0_2_ADDR_OFFST_3 0x058 -+#define BAM_VI0_2_ADDR_OFFST_4 0x05c -+#define BAM_VI0_2_ADDR_OFFST_5 0x060 -+#define BAM_VI0_2_ADDR_OFFST_6 0x064 -+#define BAM_VI0_2_ADDR_OFFST_7 0x068 -+ -+ -+#define BAM_VI1_0_DMA_BUF_MODE 0x06c -+#define BAM_VI1_0_ADDR_OFFST_0 0x070 -+#define BAM_VI1_0_ADDR_OFFST_1 0x074 -+#define BAM_VI1_0_ADDR_OFFST_2 0x078 -+#define BAM_VI1_0_ADDR_OFFST_3 0x07c -+#define BAM_VI1_0_ADDR_OFFST_4 0x080 -+#define BAM_VI1_0_ADDR_OFFST_5 0x084 -+#define BAM_VI1_0_ADDR_OFFST_6 0x088 -+#define BAM_VI1_0_ADDR_OFFST_7 0x08c -+ -+#define BAM_VI1_1_DMA_BUF_MODE 0x090 -+#define BAM_VI1_1_ADDR_OFFST_0 0x094 -+#define BAM_VI1_1_ADDR_OFFST_1 0x098 -+#define BAM_VI1_1_ADDR_OFFST_2 0x09c -+#define BAM_VI1_1_ADDR_OFFST_3 0x0a0 -+#define BAM_VI1_1_ADDR_OFFST_4 0x0a4 -+#define BAM_VI1_1_ADDR_OFFST_5 0x0a8 -+#define BAM_VI1_1_ADDR_OFFST_6 0x0ac -+#define BAM_VI1_1_ADDR_OFFST_7 0x0b0 -+ -+#define BAM_VI1_2_DMA_BUF_MODE 0x0b4 -+#define BAM_VI1_2_ADDR_OFFST_0 0x0b8 -+#define BAM_VI1_2_ADDR_OFFST_1 0x0bc -+#define BAM_VI1_2_ADDR_OFFST_2 0x0c0 -+#define BAM_VI1_2_ADDR_OFFST_3 0x0c4 -+#define BAM_VI1_2_ADDR_OFFST_4 0x0c8 -+#define BAM_VI1_2_ADDR_OFFST_5 0x0cc -+#define BAM_VI1_2_ADDR_OFFST_6 0x0d0 -+#define BAM_VI1_2_ADDR_OFFST_7 0x0d4 -+ -+ -+#define BAM_FGPI0_DMA_BUF_MODE 0x0d8 -+#define BAM_FGPI0_ADDR_OFFST_0 0x0dc -+#define BAM_FGPI0_ADDR_OFFST_1 0x0e0 -+#define BAM_FGPI0_ADDR_OFFST_2 0x0e4 -+#define BAM_FGPI0_ADDR_OFFST_3 0x0e8 -+#define BAM_FGPI0_ADDR_OFFST_4 0x0ec -+#define BAM_FGPI0_ADDR_OFFST_5 0x0f0 -+#define BAM_FGPI0_ADDR_OFFST_6 0x0f4 -+#define BAM_FGPI0_ADDR_OFFST_7 0x0f8 -+ -+#define BAM_FGPI1_DMA_BUF_MODE 0x0fc -+#define BAM_FGPI1_ADDR_OFFST_0 0x100 -+#define BAM_FGPI1_ADDR_OFFST_1 0x104 -+#define BAM_FGPI1_ADDR_OFFST_2 0x108 -+#define BAM_FGPI1_ADDR_OFFST_3 0x10c -+#define BAM_FGPI1_ADDR_OFFST_4 0x110 -+#define BAM_FGPI1_ADDR_OFFST_5 0x114 -+#define BAM_FGPI1_ADDR_OFFST_6 0x118 -+#define BAM_FGPI1_ADDR_OFFST_7 0x11c -+ -+#define BAM_FGPI2_DMA_BUF_MODE 0x120 -+#define BAM_FGPI2_ADDR_OFFST_0 0x124 -+#define BAM_FGPI2_ADDR_OFFST_1 0x128 -+#define BAM_FGPI2_ADDR_OFFST_2 0x12c -+#define BAM_FGPI2_ADDR_OFFST_3 0x130 -+#define BAM_FGPI2_ADDR_OFFST_4 0x134 -+#define BAM_FGPI2_ADDR_OFFST_5 0x138 -+#define BAM_FGPI2_ADDR_OFFST_6 0x13c -+#define BAM_FGPI2_ADDR_OFFST_7 0x140 -+ -+#define BAM_FGPI3_DMA_BUF_MODE 0x144 -+#define BAM_FGPI3_ADDR_OFFST_0 0x148 -+#define BAM_FGPI3_ADDR_OFFST_1 0x14c -+#define BAM_FGPI3_ADDR_OFFST_2 0x150 -+#define BAM_FGPI3_ADDR_OFFST_3 0x154 -+#define BAM_FGPI3_ADDR_OFFST_4 0x158 -+#define BAM_FGPI3_ADDR_OFFST_5 0x15c -+#define BAM_FGPI3_ADDR_OFFST_6 0x160 -+#define BAM_FGPI3_ADDR_OFFST_7 0x164 -+ -+ -+#define BAM_AI0_DMA_BUF_MODE 0x168 -+#define BAM_AI0_ADDR_OFFST_0 0x16c -+#define BAM_AI0_ADDR_OFFST_1 0x170 -+#define BAM_AI0_ADDR_OFFST_2 0x174 -+#define BAM_AI0_ADDR_OFFST_3 0x178 -+#define BAM_AI0_ADDR_OFFST_4 0x17c -+#define BAM_AIO_ADDR_OFFST_5 0x180 -+#define BAM_AI0_ADDR_OFFST_6 0x184 -+#define BAM_AIO_ADDR_OFFST_7 0x188 -+ -+#define BAM_AI1_DMA_BUF_MODE 0x18c -+#define BAM_AI1_ADDR_OFFST_0 0x190 -+#define BAM_AI1_ADDR_OFFST_1 0x194 -+#define BAM_AI1_ADDR_OFFST_2 0x198 -+#define BAM_AI1_ADDR_OFFST_3 0x19c -+#define BAM_AI1_ADDR_OFFST_4 0x1a0 -+#define BAM_AI1_ADDR_OFFST_5 0x1a4 -+#define BAM_AI1_ADDR_OFFST_6 0x1a8 -+#define BAM_AI1_ADDR_OFFST_7 0x1ac -+ -+#define BAM_SW_RST 0xff0 -+#define BAM_SW_RESET (0x00000001 << 0) -+ -+ -+ -+ -+ -+/* -------------- MMU Registers -------------- */ -+ -+#define MMU_MODE 0x000 -+ -+#define MMU_DMA_CONFIG0 0x004 -+#define MMU_DMA_CONFIG1 0x008 -+#define MMU_DMA_CONFIG2 0x00c -+#define MMU_DMA_CONFIG3 0x010 -+#define MMU_DMA_CONFIG4 0x014 -+#define MMU_DMA_CONFIG5 0x018 -+#define MMU_DMA_CONFIG6 0x01c -+#define MMU_DMA_CONFIG7 0x020 -+#define MMU_DMA_CONFIG8 0x024 -+#define MMU_DMA_CONFIG9 0x028 -+#define MMU_DMA_CONFIG10 0x02c -+#define MMU_DMA_CONFIG11 0x030 -+#define MMU_DMA_CONFIG12 0x034 -+#define MMU_DMA_CONFIG13 0x038 -+#define MMU_DMA_CONFIG14 0x03c -+#define MMU_DMA_CONFIG15 0x040 -+ -+#define MMU_SW_RST 0xff0 -+#define MMU_SW_RESET (0x0001 << 0) -+ -+#define MMU_PTA_BASE0 0x044 /* DMA 0 */ -+#define MMU_PTA_BASE1 0x084 /* DMA 1 */ -+#define MMU_PTA_BASE2 0x0c4 /* DMA 2 */ -+#define MMU_PTA_BASE3 0x104 /* DMA 3 */ -+#define MMU_PTA_BASE4 0x144 /* DMA 4 */ -+#define MMU_PTA_BASE5 0x184 /* DMA 5 */ -+#define MMU_PTA_BASE6 0x1c4 /* DMA 6 */ -+#define MMU_PTA_BASE7 0x204 /* DMA 7 */ -+#define MMU_PTA_BASE8 0x244 /* DMA 8 */ -+#define MMU_PTA_BASE9 0x284 /* DMA 9 */ -+#define MMU_PTA_BASE10 0x2c4 /* DMA 10 */ -+#define MMU_PTA_BASE11 0x304 /* DMA 11 */ -+#define MMU_PTA_BASE12 0x344 /* DMA 12 */ -+#define MMU_PTA_BASE13 0x384 /* DMA 13 */ -+#define MMU_PTA_BASE14 0x3c4 /* DMA 14 */ -+#define MMU_PTA_BASE15 0x404 /* DMA 15 */ -+ -+#define MMU_PTA_BASE 0x044 /* DMA 0 */ -+#define MMU_PTA_OFFSET 0x40 -+ -+#define PTA_BASE(__ch) (MMU_PTA_BASE + (MMU_PTA_OFFSET * __ch)) -+ -+#define MMU_PTA0_LSB(__ch) PTA_BASE(__ch) + 0x00 -+#define MMU_PTA0_MSB(__ch) PTA_BASE(__ch) + 0x04 -+#define MMU_PTA1_LSB(__ch) PTA_BASE(__ch) + 0x08 -+#define MMU_PTA1_MSB(__ch) PTA_BASE(__ch) + 0x0c -+#define MMU_PTA2_LSB(__ch) PTA_BASE(__ch) + 0x10 -+#define MMU_PTA2_MSB(__ch) PTA_BASE(__ch) + 0x14 -+#define MMU_PTA3_LSB(__ch) PTA_BASE(__ch) + 0x18 -+#define MMU_PTA3_MSB(__ch) PTA_BASE(__ch) + 0x1c -+#define MMU_PTA4_LSB(__ch) PTA_BASE(__ch) + 0x20 -+#define MMU_PTA4_MSB(__ch) PTA_BASE(__ch) + 0x24 -+#define MMU_PTA5_LSB(__ch) PTA_BASE(__ch) + 0x28 -+#define MMU_PTA5_MSB(__ch) PTA_BASE(__ch) + 0x2c -+#define MMU_PTA6_LSB(__ch) PTA_BASE(__ch) + 0x30 -+#define MMU_PTA6_MSB(__ch) PTA_BASE(__ch) + 0x34 -+#define MMU_PTA7_LSB(__ch) PTA_BASE(__ch) + 0x38 -+#define MMU_PTA7_MSB(__ch) PTA_BASE(__ch) + 0x3c -+ -+#endif /* __SAA716x_DMA_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.c 2013-01-16 10:41:10.914798261 +0100 -@@ -0,0 +1,412 @@ -+#include -+ -+#include -+#include -+ -+#include "saa716x_phi_reg.h" -+ -+#include "saa716x_phi.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+#include "saa716x_ff.h" -+#include "saa716x_ff_cmd.h" -+ -+ -+int sti7109_cmd_init(struct sti7109_dev *sti7109) -+{ -+ mutex_init(&sti7109->cmd_lock); -+ mutex_init(&sti7109->osd_cmd_lock); -+ mutex_init(&sti7109->data_lock); -+ -+ init_waitqueue_head(&sti7109->boot_finish_wq); -+ sti7109->boot_finished = 0; -+ -+ init_waitqueue_head(&sti7109->cmd_ready_wq); -+ sti7109->cmd_ready = 0; -+ -+ init_waitqueue_head(&sti7109->result_avail_wq); -+ sti7109->result_avail = 0; -+ -+ init_waitqueue_head(&sti7109->osd_cmd_ready_wq); -+ sti7109->osd_cmd_ready = 0; -+ init_waitqueue_head(&sti7109->osd_result_avail_wq); -+ sti7109->osd_result_avail = 0; -+ -+ sti7109->data_handle = 0; -+ sti7109->data_buffer = (u8 *) (sti7109->iobuf + TSOUT_LEN + TSBUF_LEN); -+ init_waitqueue_head(&sti7109->data_ready_wq); -+ sti7109->data_ready = 0; -+ init_waitqueue_head(&sti7109->block_done_wq); -+ sti7109->block_done = 0; -+ return 0; -+} -+ -+static int sti7109_do_raw_cmd(struct sti7109_dev * sti7109) -+{ -+ struct saa716x_dev * saa716x = sti7109->dev; -+ unsigned long timeout; -+ -+ timeout = 1 * HZ; -+ timeout = wait_event_interruptible_timeout(sti7109->cmd_ready_wq, -+ sti7109->cmd_ready == 1, -+ timeout); -+ -+ if (timeout == -ERESTARTSYS || sti7109->cmd_ready == 0) { -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ dprintk(SAA716x_ERROR, 1, "cmd ERESTARTSYS"); -+ return -ERESTARTSYS; -+ } -+ dprintk(SAA716x_ERROR, 1, -+ "timed out waiting for command ready"); -+ return -EIO; -+ } -+ -+ sti7109->cmd_ready = 0; -+ sti7109->result_avail = 0; -+ saa716x_phi_write(saa716x, ADDR_CMD_DATA, sti7109->cmd_data, -+ sti7109->cmd_len); -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_PHI_ISET, ISR_CMD_MASK); -+ -+ if (sti7109->result_max_len > 0) { -+ timeout = 1 * HZ; -+ timeout = wait_event_interruptible_timeout( -+ sti7109->result_avail_wq, -+ sti7109->result_avail == 1, -+ timeout); -+ -+ if (timeout == -ERESTARTSYS || sti7109->result_avail == 0) { -+ sti7109->result_len = 0; -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ dprintk(SAA716x_ERROR, 1, "result ERESTARTSYS"); -+ return -ERESTARTSYS; -+ } -+ dprintk(SAA716x_ERROR, 1, -+ "timed out waiting for command result"); -+ return -EIO; -+ } -+ -+ if (sti7109->result_len > sti7109->result_max_len) { -+ sti7109->result_len = sti7109->result_max_len; -+ dprintk(SAA716x_NOTICE, 1, -+ "not enough space in result buffer"); -+ } -+ } -+ -+ return 0; -+} -+ -+int sti7109_raw_cmd(struct sti7109_dev * sti7109, osd_raw_cmd_t * cmd) -+{ -+ struct saa716x_dev * saa716x = sti7109->dev; -+ int err; -+ -+ if (cmd->cmd_len > SIZE_CMD_DATA) { -+ dprintk(SAA716x_ERROR, 1, "command too long"); -+ return -EFAULT; -+ } -+ -+ mutex_lock(&sti7109->cmd_lock); -+ -+ err = -EFAULT; -+ if (copy_from_user(sti7109->cmd_data, (void __user *)cmd->cmd_data, -+ cmd->cmd_len)) -+ goto out; -+ -+ sti7109->cmd_len = cmd->cmd_len; -+ sti7109->result_max_len = cmd->result_len; -+ -+ err = sti7109_do_raw_cmd(sti7109); -+ if (err) -+ goto out; -+ -+ cmd->result_len = sti7109->result_len; -+ if (sti7109->result_len > 0) { -+ if (copy_to_user((void __user *)cmd->result_data, -+ sti7109->result_data, -+ sti7109->result_len)) -+ err = -EFAULT; -+ } -+ -+out: -+ mutex_unlock(&sti7109->cmd_lock); -+ return err; -+} -+ -+static int sti7109_do_raw_osd_cmd(struct sti7109_dev * sti7109) -+{ -+ struct saa716x_dev * saa716x = sti7109->dev; -+ unsigned long timeout; -+ -+ timeout = 1 * HZ; -+ timeout = wait_event_interruptible_timeout(sti7109->osd_cmd_ready_wq, -+ sti7109->osd_cmd_ready == 1, -+ timeout); -+ -+ if (timeout == -ERESTARTSYS || sti7109->osd_cmd_ready == 0) { -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ dprintk(SAA716x_ERROR, 1, "osd cmd ERESTARTSYS"); -+ return -ERESTARTSYS; -+ } -+ dprintk(SAA716x_ERROR, 1, -+ "timed out waiting for osd command ready"); -+ return -EIO; -+ } -+ -+ sti7109->osd_cmd_ready = 0; -+ sti7109->osd_result_avail = 0; -+ saa716x_phi_write(saa716x, ADDR_OSD_CMD_DATA, sti7109->osd_cmd_data, -+ sti7109->osd_cmd_len); -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_PHI_ISET, ISR_OSD_CMD_MASK); -+ -+ if (sti7109->osd_result_max_len > 0) { -+ timeout = 1 * HZ; -+ timeout = wait_event_interruptible_timeout( -+ sti7109->osd_result_avail_wq, -+ sti7109->osd_result_avail == 1, -+ timeout); -+ -+ if (timeout == -ERESTARTSYS || sti7109->osd_result_avail == 0) { -+ sti7109->osd_result_len = 0; -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ dprintk(SAA716x_ERROR, 1, -+ "osd result ERESTARTSYS"); -+ return -ERESTARTSYS; -+ } -+ dprintk(SAA716x_ERROR, 1, -+ "timed out waiting for osd command result"); -+ return -EIO; -+ } -+ -+ if (sti7109->osd_result_len > sti7109->osd_result_max_len) { -+ sti7109->osd_result_len = sti7109->osd_result_max_len; -+ dprintk(SAA716x_NOTICE, 1, -+ "not enough space in result buffer"); -+ } -+ } -+ -+ return 0; -+} -+ -+int sti7109_raw_osd_cmd(struct sti7109_dev * sti7109, osd_raw_cmd_t * cmd) -+{ -+ struct saa716x_dev * saa716x = sti7109->dev; -+ int err; -+ -+ if (cmd->cmd_len > SIZE_OSD_CMD_DATA) { -+ dprintk(SAA716x_ERROR, 1, "command too long"); -+ return -EFAULT; -+ } -+ -+ mutex_lock(&sti7109->osd_cmd_lock); -+ -+ err = -EFAULT; -+ if (copy_from_user(sti7109->osd_cmd_data, (void __user *)cmd->cmd_data, -+ cmd->cmd_len)) -+ goto out; -+ -+ sti7109->osd_cmd_len = cmd->cmd_len; -+ sti7109->osd_result_max_len = cmd->result_len; -+ -+ err = sti7109_do_raw_osd_cmd(sti7109); -+ if (err) -+ goto out; -+ -+ cmd->result_len = sti7109->osd_result_len; -+ if (sti7109->osd_result_len > 0) { -+ if (copy_to_user((void __user *)cmd->result_data, -+ sti7109->osd_result_data, -+ sti7109->osd_result_len)) -+ err = -EFAULT; -+ } -+ -+out: -+ mutex_unlock(&sti7109->osd_cmd_lock); -+ return err; -+} -+ -+static int sti7109_do_raw_data(struct sti7109_dev * sti7109, osd_raw_data_t * data) -+{ -+ struct saa716x_dev * saa716x = sti7109->dev; -+ unsigned long timeout; -+ u16 blockSize; -+ u16 lastBlockSize; -+ u16 numBlocks; -+ u16 blockIndex; -+ u8 blockHeader[SIZE_BLOCK_HEADER]; -+ u8 * blockPtr; -+ int activeBlock; -+ -+ timeout = 1 * HZ; -+ timeout = wait_event_interruptible_timeout(sti7109->data_ready_wq, -+ sti7109->data_ready == 1, -+ timeout); -+ -+ if (timeout == -ERESTARTSYS || sti7109->data_ready == 0) { -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ dprintk(SAA716x_ERROR, 1, "data ERESTARTSYS"); -+ return -ERESTARTSYS; -+ } -+ dprintk(SAA716x_ERROR, 1, "timed out waiting for data ready"); -+ return -EIO; -+ } -+ -+ sti7109->data_ready = 0; -+ -+ /* -+ * 8 bytes is the size of the block header. Block header structure is: -+ * 16 bit - block index -+ * 16 bit - number of blocks -+ * 16 bit - current block data size -+ * 16 bit - block handle. This is used to reference the data in the -+ * command that uses it. -+ */ -+ blockSize = (SIZE_BLOCK_DATA / 2) - SIZE_BLOCK_HEADER; -+ numBlocks = data->data_length / blockSize; -+ lastBlockSize = data->data_length % blockSize; -+ if (lastBlockSize > 0) -+ numBlocks++; -+ -+ blockHeader[2] = (u8) (numBlocks >> 8); -+ blockHeader[3] = (u8) numBlocks; -+ blockHeader[6] = (u8) (sti7109->data_handle >> 8); -+ blockHeader[7] = (u8) sti7109->data_handle; -+ blockPtr = sti7109->data_buffer; -+ activeBlock = 0; -+ for (blockIndex = 0; blockIndex < numBlocks; blockIndex++) { -+ u32 addr; -+ -+ if (lastBlockSize && (blockIndex == (numBlocks - 1))) -+ blockSize = lastBlockSize; -+ -+ blockHeader[0] = (uint8_t) (blockIndex >> 8); -+ blockHeader[1] = (uint8_t) blockIndex; -+ blockHeader[4] = (uint8_t) (blockSize >> 8); -+ blockHeader[5] = (uint8_t) blockSize; -+ -+ addr = ADDR_BLOCK_DATA + activeBlock * (SIZE_BLOCK_DATA / 2); -+ saa716x_phi_write(saa716x, addr, blockHeader, -+ SIZE_BLOCK_HEADER); -+ saa716x_phi_write(saa716x, addr + SIZE_BLOCK_HEADER, blockPtr, -+ blockSize); -+ activeBlock = (activeBlock + 1) & 1; -+ if (blockIndex > 0) { -+ timeout = 1 * HZ; -+ timeout = wait_event_timeout(sti7109->block_done_wq, -+ sti7109->block_done == 1, -+ timeout); -+ -+ if (sti7109->block_done == 0) { -+ dprintk(SAA716x_ERROR, 1, -+ "timed out waiting for block done"); -+ return -EIO; -+ } -+ } -+ sti7109->block_done = 0; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_PHI_ISET, ISR_BLOCK_MASK); -+ blockPtr += blockSize; -+ } -+ timeout = 1 * HZ; -+ timeout = wait_event_timeout(sti7109->block_done_wq, -+ sti7109->block_done == 1, -+ timeout); -+ -+ if (sti7109->block_done == 0) { -+ dprintk(SAA716x_ERROR, 1, "timed out waiting for block done"); -+ return -EIO; -+ } -+ sti7109->block_done = 0; -+ -+ data->data_handle = sti7109->data_handle; -+ sti7109->data_handle++; -+ return 0; -+} -+ -+int sti7109_raw_data(struct sti7109_dev * sti7109, osd_raw_data_t * data) -+{ -+ struct saa716x_dev * saa716x = sti7109->dev; -+ int err; -+ -+ if (data->data_length > MAX_DATA_LEN) { -+ dprintk(SAA716x_ERROR, 1, "data too big"); -+ return -EFAULT; -+ } -+ -+ mutex_lock(&sti7109->data_lock); -+ -+ err = -EFAULT; -+ if (copy_from_user(sti7109->data_buffer, -+ (void __user *)data->data_buffer, -+ data->data_length)) -+ goto out; -+ -+ err = sti7109_do_raw_data(sti7109, data); -+ if (err) -+ goto out; -+ -+out: -+ mutex_unlock(&sti7109->data_lock); -+ return err; -+} -+ -+int sti7109_cmd_get_fw_version(struct sti7109_dev *sti7109, u32 *fw_version) -+{ -+ int ret_val = -EINVAL; -+ -+ mutex_lock(&sti7109->cmd_lock); -+ -+ sti7109->cmd_data[0] = 0x00; -+ sti7109->cmd_data[1] = 0x04; -+ sti7109->cmd_data[2] = 0x00; -+ sti7109->cmd_data[3] = 0x00; -+ sti7109->cmd_data[4] = 0x00; -+ sti7109->cmd_data[5] = 0x00; -+ sti7109->cmd_len = 6; -+ sti7109->result_max_len = MAX_RESULT_LEN; -+ -+ ret_val = sti7109_do_raw_cmd(sti7109); -+ if (ret_val == 0) { -+ *fw_version = (sti7109->result_data[6] << 16) -+ | (sti7109->result_data[7] << 8) -+ | sti7109->result_data[8]; -+ } -+ -+ mutex_unlock(&sti7109->cmd_lock); -+ -+ return ret_val; -+} -+ -+int sti7109_cmd_get_video_format(struct sti7109_dev *sti7109, video_size_t *vs) -+{ -+ int ret_val = -EINVAL; -+ -+ mutex_lock(&sti7109->cmd_lock); -+ -+ sti7109->cmd_data[0] = 0x00; -+ sti7109->cmd_data[1] = 0x05; /* command length */ -+ sti7109->cmd_data[2] = 0x00; -+ sti7109->cmd_data[3] = 0x01; /* A/V decoder command group */ -+ sti7109->cmd_data[4] = 0x00; -+ sti7109->cmd_data[5] = 0x10; /* get video format info command */ -+ sti7109->cmd_data[6] = 0x00; /* decoder index 0 */ -+ sti7109->cmd_len = 7; -+ sti7109->result_max_len = MAX_RESULT_LEN; -+ -+ ret_val = sti7109_do_raw_cmd(sti7109); -+ if (ret_val == 0) { -+ vs->w = (sti7109->result_data[7] << 8) -+ | sti7109->result_data[8]; -+ vs->h = (sti7109->result_data[9] << 8) -+ | sti7109->result_data[10]; -+ vs->aspect_ratio = sti7109->result_data[11] >> 4; -+ } -+ -+ mutex_unlock(&sti7109->cmd_lock); -+ -+ return ret_val; -+} -+ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.h 2013-01-16 10:41:10.914798261 +0100 -@@ -0,0 +1,16 @@ -+#ifndef __SAA716x_FF_CMD_H -+#define __SAA716x_FF_CMD_H -+ -+extern int sti7109_cmd_init(struct sti7109_dev *sti7109); -+extern int sti7109_raw_cmd(struct sti7109_dev * sti7109, -+ osd_raw_cmd_t * cmd); -+extern int sti7109_raw_osd_cmd(struct sti7109_dev * sti7109, -+ osd_raw_cmd_t * cmd); -+extern int sti7109_raw_data(struct sti7109_dev * sti7109, -+ osd_raw_data_t * data); -+extern int sti7109_cmd_get_fw_version(struct sti7109_dev *sti7109, -+ u32 *fw_version); -+extern int sti7109_cmd_get_video_format(struct sti7109_dev *sti7109, -+ video_size_t *vs); -+ -+#endif /* __SAA716x_FF_CMD_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff.h 2013-01-16 10:41:10.915798254 +0100 -@@ -0,0 +1,158 @@ -+#ifndef __SAA716x_FF_H -+#define __SAA716x_FF_H -+ -+#include "dvb_filter.h" -+#include "dvb_ringbuffer.h" -+ -+#define TECHNOTREND 0x13c2 -+#define S2_6400_DUAL_S2_PREMIUM_DEVEL 0x3009 -+#define S2_6400_DUAL_S2_PREMIUM_PROD 0x300A -+ -+#define TT_PREMIUM_GPIO_POWER_ENABLE 27 -+#define TT_PREMIUM_GPIO_RESET_BACKEND 26 -+#define TT_PREMIUM_GPIO_FPGA_CS1 17 -+#define TT_PREMIUM_GPIO_FPGA_CS0 16 -+#define TT_PREMIUM_GPIO_FPGA_PROGRAMN 15 -+#define TT_PREMIUM_GPIO_FPGA_DONE 14 -+#define TT_PREMIUM_GPIO_FPGA_INITN 13 -+ -+/* fpga interrupt register addresses */ -+#define FPGA_ADDR_PHI_ICTRL 0x8000 /* PHI General control of the PC => STB interrupt controller */ -+#define FPGA_ADDR_PHI_ISR 0x8010 /* PHI Interrupt Status Register */ -+#define FPGA_ADDR_PHI_ISET 0x8020 /* PHI Interrupt Set Register */ -+#define FPGA_ADDR_PHI_ICLR 0x8030 /* PHI Interrupt Clear Register */ -+#define FPGA_ADDR_EMI_ICTRL 0x8100 /* EMI General control of the STB => PC interrupt controller */ -+#define FPGA_ADDR_EMI_ISR 0x8110 /* EMI Interrupt Status Register */ -+#define FPGA_ADDR_EMI_ISET 0x8120 /* EMI Interrupt Set Register */ -+#define FPGA_ADDR_EMI_ICLR 0x8130 /* EMI Interrupt Clear Register */ -+ -+/* fpga TS router register addresses */ -+#define FPGA_ADDR_TSR_CTRL 0x8200 /* TS router control register */ -+#define FPGA_ADDR_TSR_MUX1 0x8210 /* TS multiplexer 1 selection register */ -+#define FPGA_ADDR_TSR_MUX2 0x8220 /* TS multiplexer 2 selection register */ -+#define FPGA_ADDR_TSR_MUX3 0x8230 /* TS multiplexer 3 selection register */ -+#define FPGA_ADDR_TSR_MUXCI1 0x8240 /* TS multiplexer CI 1 selection register */ -+#define FPGA_ADDR_TSR_MUXCI2 0x8250 /* TS multiplexer CI 2 selection register */ -+ -+#define FPGA_ADDR_TSR_BRFE1 0x8280 /* bit rate for TS coming from frontend 1 */ -+#define FPGA_ADDR_TSR_BRFE2 0x8284 /* bit rate for TS coming from frontend 2 */ -+#define FPGA_ADDR_TSR_BRFF1 0x828C /* bit rate for TS coming from FIFO 1 */ -+#define FPGA_ADDR_TSR_BRO1 0x8294 /* bit rate for TS going to output 1 */ -+#define FPGA_ADDR_TSR_BRO2 0x8298 /* bit rate for TS going to output 2 */ -+#define FPGA_ADDR_TSR_BRO3 0x829C /* bit rate for TS going to output 3 */ -+ -+/* fpga TS FIFO register addresses */ -+#define FPGA_ADDR_FIFO_CTRL 0x8300 /* FIFO control register */ -+#define FPGA_ADDR_FIFO_STAT 0x8310 /* FIFO status register */ -+ -+#define FPGA_ADDR_VERSION 0x80F0 /* FPGA bitstream version register */ -+ -+#define FPGA_ADDR_PIO_CTRL 0x8500 /* FPGA GPIO control register */ -+ -+#define ISR_CMD_MASK 0x0001 /* interrupt source for normal cmds (osd, fre, av, ...) */ -+#define ISR_READY_MASK 0x0002 /* interrupt source for command acknowledge */ -+#define ISR_BLOCK_MASK 0x0004 /* interrupt source for single block transfers and acknowledge */ -+#define ISR_DATA_MASK 0x0008 /* interrupt source for data transfer acknowledge */ -+#define ISR_BOOT_FINISH_MASK 0x0010 /* interrupt source for boot finish indication */ -+#define ISR_AUDIO_PTS_MASK 0x0020 /* interrupt source for audio PTS */ -+#define ISR_VIDEO_PTS_MASK 0x0040 /* interrupt source for video PTS */ -+#define ISR_CURRENT_STC_MASK 0x0080 /* interrupt source for current system clock */ -+#define ISR_REMOTE_EVENT_MASK 0x0100 /* interrupt source for remote events */ -+#define ISR_DVO_FORMAT_MASK 0x0200 /* interrupt source for DVO format change */ -+#define ISR_OSD_CMD_MASK 0x0400 /* interrupt source for OSD cmds */ -+#define ISR_OSD_READY_MASK 0x0800 /* interrupt source for OSD command acknowledge */ -+#define ISR_FE_CMD_MASK 0x1000 /* interrupt source for frontend cmds */ -+#define ISR_FE_READY_MASK 0x2000 /* interrupt source for frontend command acknowledge */ -+#define ISR_LOG_MESSAGE_MASK 0x4000 /* interrupt source for log messages */ -+#define ISR_FIFO1_EMPTY_MASK 0x8000 /* interrupt source for FIFO1 empty */ -+ -+#define ADDR_CMD_DATA 0x0000 /* address for cmd data in fpga dpram */ -+#define ADDR_OSD_CMD_DATA 0x01A0 /* address for OSD cmd data */ -+#define ADDR_FE_CMD_DATA 0x05C0 /* address for frontend cmd data */ -+#define ADDR_BLOCK_DATA 0x0600 /* address for block data */ -+#define ADDR_AUDIO_PTS 0x3E00 /* address for audio PTS (64 Bits) */ -+#define ADDR_VIDEO_PTS 0x3E08 /* address for video PTS (64 Bits) */ -+#define ADDR_CURRENT_STC 0x3E10 /* address for system clock (64 Bits) */ -+#define ADDR_DVO_FORMAT 0x3E18 /* address for DVO format 32 Bits) */ -+#define ADDR_REMOTE_EVENT 0x3F00 /* address for remote events (32 Bits) */ -+#define ADDR_LOG_MESSAGE 0x3F80 /* address for log messages */ -+ -+#define SIZE_CMD_DATA 0x01A0 /* maximum size for command data (416 Bytes) */ -+#define SIZE_OSD_CMD_DATA 0x0420 /* maximum size for OSD command data (1056 Bytes) */ -+#define SIZE_FE_CMD_DATA 0x0040 /* maximum size for frontend command data (64 Bytes) */ -+#define SIZE_BLOCK_DATA 0x3800 /* maximum size for block data (14 kB) */ -+#define SIZE_LOG_MESSAGE_DATA 0x0080 /* maximum size for log message data (128 Bytes) */ -+ -+#define SIZE_BLOCK_HEADER 8 /* block header size */ -+ -+#define MAX_RESULT_LEN 256 -+#define MAX_DATA_LEN (1024 * 1024) -+ -+#define TSOUT_LEN (1024 * TS_SIZE) -+#define TSBUF_LEN (8 * 1024) -+ -+/* place to store all the necessary device information */ -+struct sti7109_dev { -+ struct saa716x_dev *dev; -+ struct dvb_device *osd_dev; -+ struct dvb_device *video_dev; -+ struct dvb_device *audio_dev; -+ -+ void *iobuf; /* memory for all buffers */ -+ struct dvb_ringbuffer tsout; /* buffer for TS output */ -+ u8 *tsbuf; /* temp ts buffer */ -+ -+ struct tasklet_struct fifo_tasklet; -+ -+ wait_queue_head_t boot_finish_wq; -+ int boot_finished; -+ -+ wait_queue_head_t cmd_ready_wq; -+ int cmd_ready; -+ u8 cmd_data[SIZE_CMD_DATA]; -+ u32 cmd_len; -+ -+ wait_queue_head_t result_avail_wq; -+ int result_avail; -+ u8 result_data[MAX_RESULT_LEN]; -+ u32 result_len; -+ u32 result_max_len; -+ -+ wait_queue_head_t osd_cmd_ready_wq; -+ int osd_cmd_ready; -+ u8 osd_cmd_data[SIZE_OSD_CMD_DATA]; -+ u32 osd_cmd_len; -+ -+ wait_queue_head_t osd_result_avail_wq; -+ int osd_result_avail; -+ u8 osd_result_data[MAX_RESULT_LEN]; -+ u32 osd_result_len; -+ u32 osd_result_max_len; -+ -+ u16 data_handle; -+ u8 *data_buffer; /* raw data transfer buffer */ -+ wait_queue_head_t data_ready_wq; -+ int data_ready; -+ wait_queue_head_t block_done_wq; -+ int block_done; -+ -+ struct mutex cmd_lock; -+ struct mutex osd_cmd_lock; -+ struct mutex data_lock; -+ -+ u64 audio_pts; -+ u64 video_pts; -+ u64 current_stc; -+ -+ u32 int_count_enable; -+ u32 total_int_count; -+ u32 fgpi_int_count[2]; -+ u32 i2c_int_count[2]; -+ u32 ext_int_total_count; -+ u32 ext_int_source_count[16]; -+ u32 last_int_ticks; -+ -+ u16 fpga_version; -+}; -+ -+#endif /* __SAA716x_FF_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_ir.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_ir.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_ir.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_ir.c 2013-01-16 10:41:10.915798254 +0100 -@@ -0,0 +1,265 @@ -+/* -+ * Driver for the remote control of the TT6400 DVB-S2 card -+ * -+ * Copyright (C) 2010 Oliver Endriss -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html -+ * -+ */ -+ -+#include -+#include -+ -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+#include "saa716x_ff.h" -+ -+ -+/* infrared remote control */ -+struct infrared { -+ u16 key_map[128]; -+ struct input_dev *input_dev; -+ char input_phys[32]; -+ struct timer_list keyup_timer; -+ struct tasklet_struct tasklet; -+ u32 command; -+ u32 device_mask; -+ u8 protocol; -+ u16 last_key; -+ u16 last_toggle; -+ bool delay_timer_finished; -+}; -+ -+#define IR_RC5 0 -+#define UP_TIMEOUT (HZ*7/25) -+ -+ -+/* key-up timer */ -+static void ir_emit_keyup(unsigned long parm) -+{ -+ struct infrared *ir = (struct infrared *) parm; -+ -+ if (!ir || !test_bit(ir->last_key, ir->input_dev->key)) -+ return; -+ -+ input_report_key(ir->input_dev, ir->last_key, 0); -+ input_sync(ir->input_dev); -+} -+ -+ -+/* tasklet */ -+static void ir_emit_key(unsigned long parm) -+{ -+ struct saa716x_dev *saa716x = (struct saa716x_dev *) parm; -+ struct infrared *ir = saa716x->ir_priv; -+ u32 ircom = ir->command; -+ u8 data; -+ u8 addr; -+ u16 toggle; -+ u16 keycode; -+ -+ /* extract device address and data */ -+ if (ircom & 0x80000000) { /* CEC remote command */ -+ addr = 0; -+ data = ircom & 0x7F; -+ toggle = 0; -+ } else { -+ switch (ir->protocol) { -+ case IR_RC5: /* extended RC5: 5 bits device address, 7 bits data */ -+ addr = (ircom >> 6) & 0x1f; -+ /* data bits 1..6 */ -+ data = ircom & 0x3f; -+ /* data bit 7 (inverted) */ -+ if (!(ircom & 0x1000)) -+ data |= 0x40; -+ toggle = ircom & 0x0800; -+ break; -+ -+ default: -+ printk(KERN_ERR "%s: invalid protocol %x\n", -+ __func__, ir->protocol); -+ return; -+ } -+ } -+ -+ input_event(ir->input_dev, EV_MSC, MSC_RAW, (addr << 16) | data); -+ input_event(ir->input_dev, EV_MSC, MSC_SCAN, data); -+ -+ keycode = ir->key_map[data]; -+ -+ dprintk(SAA716x_DEBUG, 0, -+ "%s: code %08x -> addr %i data 0x%02x -> keycode %i\n", -+ __func__, ircom, addr, data, keycode); -+ -+ /* check device address */ -+ if (!(ir->device_mask & (1 << addr))) -+ return; -+ -+ if (!keycode) { -+ printk(KERN_WARNING "%s: code %08x -> addr %i data 0x%02x -> unknown key!\n", -+ __func__, ircom, addr, data); -+ return; -+ } -+ -+ if (timer_pending(&ir->keyup_timer)) { -+ del_timer(&ir->keyup_timer); -+ if (ir->last_key != keycode || toggle != ir->last_toggle) { -+ ir->delay_timer_finished = false; -+ input_event(ir->input_dev, EV_KEY, ir->last_key, 0); -+ input_event(ir->input_dev, EV_KEY, keycode, 1); -+ input_sync(ir->input_dev); -+ } else if (ir->delay_timer_finished) { -+ input_event(ir->input_dev, EV_KEY, keycode, 2); -+ input_sync(ir->input_dev); -+ } -+ } else { -+ ir->delay_timer_finished = false; -+ input_event(ir->input_dev, EV_KEY, keycode, 1); -+ input_sync(ir->input_dev); -+ } -+ -+ ir->last_key = keycode; -+ ir->last_toggle = toggle; -+ -+ ir->keyup_timer.expires = jiffies + UP_TIMEOUT; -+ add_timer(&ir->keyup_timer); -+ -+} -+ -+ -+/* register with input layer */ -+static void ir_register_keys(struct infrared *ir) -+{ -+ int i; -+ -+ set_bit(EV_KEY, ir->input_dev->evbit); -+ set_bit(EV_REP, ir->input_dev->evbit); -+ set_bit(EV_MSC, ir->input_dev->evbit); -+ -+ set_bit(MSC_RAW, ir->input_dev->mscbit); -+ set_bit(MSC_SCAN, ir->input_dev->mscbit); -+ -+ memset(ir->input_dev->keybit, 0, sizeof(ir->input_dev->keybit)); -+ -+ for (i = 0; i < ARRAY_SIZE(ir->key_map); i++) { -+ if (ir->key_map[i] > KEY_MAX) -+ ir->key_map[i] = 0; -+ else if (ir->key_map[i] > KEY_RESERVED) -+ set_bit(ir->key_map[i], ir->input_dev->keybit); -+ } -+ -+ ir->input_dev->keycode = ir->key_map; -+ ir->input_dev->keycodesize = sizeof(ir->key_map[0]); -+ ir->input_dev->keycodemax = ARRAY_SIZE(ir->key_map); -+} -+ -+ -+/* called by the input driver after rep[REP_DELAY] ms */ -+static void ir_repeat_key(unsigned long parm) -+{ -+ struct infrared *ir = (struct infrared *) parm; -+ -+ ir->delay_timer_finished = true; -+} -+ -+ -+/* interrupt handler */ -+void saa716x_ir_handler(struct saa716x_dev *saa716x, u32 ir_cmd) -+{ -+ struct infrared *ir = saa716x->ir_priv; -+ -+ if (!ir) -+ return; -+ -+ ir->command = ir_cmd; -+ tasklet_schedule(&ir->tasklet); -+} -+ -+ -+int saa716x_ir_init(struct saa716x_dev *saa716x) -+{ -+ struct input_dev *input_dev; -+ struct infrared *ir; -+ int rc; -+ int i; -+ -+ if (!saa716x) -+ return -ENOMEM; -+ -+ ir = kzalloc(sizeof(struct infrared), GFP_KERNEL); -+ if (!ir) -+ return -ENOMEM; -+ -+ init_timer(&ir->keyup_timer); -+ ir->keyup_timer.function = ir_emit_keyup; -+ ir->keyup_timer.data = (unsigned long) ir; -+ -+ input_dev = input_allocate_device(); -+ if (!input_dev) -+ goto err; -+ -+ ir->input_dev = input_dev; -+ input_dev->name = "TT6400 DVB IR receiver"; -+ snprintf(ir->input_phys, sizeof(ir->input_phys), -+ "pci-%s/ir0", pci_name(saa716x->pdev)); -+ input_dev->phys = ir->input_phys; -+ input_dev->id.bustype = BUS_PCI; -+ input_dev->id.version = 1; -+ input_dev->id.vendor = saa716x->pdev->subsystem_vendor; -+ input_dev->id.product = saa716x->pdev->subsystem_device; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22) -+ input_dev->dev.parent = &saa716x->pdev->dev; -+#else -+ input_dev->cdev.dev = &saa716x->pdev->dev; -+#endif -+ rc = input_register_device(input_dev); -+ if (rc) -+ goto err; -+ -+ /* TODO: fix setup/keymap */ -+ ir->protocol = IR_RC5; -+ ir->device_mask = 0xffffffff; -+ for (i = 0; i < ARRAY_SIZE(ir->key_map); i++) -+ ir->key_map[i] = i+1; -+ ir_register_keys(ir); -+ -+ /* override repeat timer */ -+ input_dev->timer.function = ir_repeat_key; -+ input_dev->timer.data = (unsigned long) ir; -+ -+ tasklet_init(&ir->tasklet, ir_emit_key, (unsigned long) saa716x); -+ saa716x->ir_priv = ir; -+ -+ return 0; -+ -+err: -+ if (ir->input_dev) -+ input_free_device(ir->input_dev); -+ kfree(ir); -+ return -ENOMEM; -+} -+ -+ -+void saa716x_ir_exit(struct saa716x_dev *saa716x) -+{ -+ struct infrared *ir = saa716x->ir_priv; -+ -+ saa716x->ir_priv = NULL; -+ tasklet_kill(&ir->tasklet); -+ del_timer_sync(&ir->keyup_timer); -+ input_unregister_device(ir->input_dev); -+ kfree(ir); -+} -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_main.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_main.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_main.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_main.c 2013-01-16 10:41:10.917798240 +0100 -@@ -0,0 +1,1535 @@ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_dma_reg.h" -+#include "saa716x_fgpi_reg.h" -+#include "saa716x_greg_reg.h" -+#include "saa716x_phi_reg.h" -+#include "saa716x_spi_reg.h" -+#include "saa716x_msi_reg.h" -+ -+#include "saa716x_vip.h" -+#include "saa716x_aip.h" -+#include "saa716x_msi.h" -+#include "saa716x_adap.h" -+#include "saa716x_gpio.h" -+#include "saa716x_phi.h" -+#include "saa716x_rom.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+#include "saa716x_ff.h" -+#include "saa716x_ff_cmd.h" -+ -+#include "stv6110x.h" -+#include "stv090x.h" -+#include "isl6423.h" -+ -+unsigned int verbose; -+module_param(verbose, int, 0644); -+MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); -+ -+unsigned int int_type; -+module_param(int_type, int, 0644); -+MODULE_PARM_DESC(int_type, "force Interrupt Handler type: 0=INT-A, 1=MSI, 2=MSI-X. default INT-A mode"); -+ -+unsigned int int_count_enable; -+module_param(int_count_enable, int, 0644); -+MODULE_PARM_DESC(int_count_enable, "enable counting of interrupts"); -+ -+#define DRIVER_NAME "SAA716x FF" -+ -+static int saa716x_ff_fpga_init(struct saa716x_dev *saa716x) -+{ -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ int fpgaInit; -+ int fpgaDone; -+ int rounds; -+ int ret; -+ const struct firmware *fw; -+ -+ /* request the FPGA firmware, this will block until someone uploads it */ -+ ret = request_firmware(&fw, "dvb-ttpremium-fpga-01.fw", &saa716x->pdev->dev); -+ if (ret) { -+ if (ret == -ENOENT) { -+ printk(KERN_ERR "dvb-ttpremium: could not load FPGA firmware," -+ " file not found: dvb-ttpremium-fpga-01.fw\n"); -+ printk(KERN_ERR "dvb-ttpremium: usually this should be in " -+ "/usr/lib/hotplug/firmware or /lib/firmware\n"); -+ } else -+ printk(KERN_ERR "dvb-ttpremium: cannot request firmware" -+ " (error %i)\n", ret); -+ return -EINVAL; -+ } -+ -+ /* set FPGA PROGRAMN high */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN, 1); -+ msleep(10); -+ -+ /* set FPGA PROGRAMN low to set it into configuration mode */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN, 0); -+ msleep(10); -+ -+ /* set FPGA PROGRAMN high to start configuration process */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN, 1); -+ -+ rounds = 0; -+ fpgaInit = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_INITN); -+ while (fpgaInit == 0 && rounds < 5000) { -+ //msleep(1); -+ fpgaInit = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_INITN); -+ rounds++; -+ } -+ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA INITN=%d, rounds=%d", -+ fpgaInit, rounds); -+ -+ SAA716x_EPWR(SPI, SPI_CLOCK_COUNTER, 0x08); -+ SAA716x_EPWR(SPI, SPI_CONTROL_REG, SPI_MODE_SELECT); -+ -+ msleep(10); -+ -+ fpgaDone = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_DONE); -+ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA DONE=%d", fpgaDone); -+ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA write bitstream"); -+ saa716x_spi_write(saa716x, fw->data, fw->size); -+ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA write bitstream done"); -+ fpgaDone = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_DONE); -+ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA DONE=%d", fpgaDone); -+ -+ msleep(10); -+ -+ release_firmware(fw); -+ -+ if (!fpgaDone) { -+ printk(KERN_ERR "SAA716x FF FPGA is not responding, did you " -+ "connect the power supply?\n"); -+ return -EINVAL; -+ } -+ -+ sti7109->fpga_version = SAA716x_EPRD(PHI_1, FPGA_ADDR_VERSION); -+ printk(KERN_INFO "SAA716x FF FPGA version %X.%02X\n", -+ sti7109->fpga_version >> 8, sti7109->fpga_version & 0xFF); -+ -+ return 0; -+} -+ -+static int saa716x_ff_st7109_init(struct saa716x_dev *saa716x) -+{ -+ int i; -+ int length; -+ u32 requestedBlock; -+ u32 writtenBlock; -+ u32 numBlocks; -+ u32 blockSize; -+ u32 lastBlockSize; -+ u64 startTime; -+ u64 currentTime; -+ u64 waitTime; -+ int ret; -+ const struct firmware *fw; -+ u32 loaderVersion; -+ -+ /* request the st7109 loader, this will block until someone uploads it */ -+ ret = request_firmware(&fw, "dvb-ttpremium-loader-01.fw", &saa716x->pdev->dev); -+ if (ret) { -+ if (ret == -ENOENT) { -+ printk(KERN_ERR "dvb-ttpremium: could not load ST7109 loader," -+ " file not found: dvb-ttpremium-loader-01.fw\n"); -+ printk(KERN_ERR "dvb-ttpremium: usually this should be in " -+ "/usr/lib/hotplug/firmware or /lib/firmware\n"); -+ } else -+ printk(KERN_ERR "dvb-ttpremium: cannot request firmware" -+ " (error %i)\n", ret); -+ return -EINVAL; -+ } -+ loaderVersion = (fw->data[0x1385] << 8) | fw->data[0x1384]; -+ printk(KERN_INFO "SAA716x FF loader version %X.%02X\n", -+ loaderVersion >> 8, loaderVersion & 0xFF); -+ -+ saa716x_phi_write(saa716x, 0, fw->data, fw->size); -+ msleep(10); -+ -+ release_firmware(fw); -+ -+ /* take ST out of reset */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_RESET_BACKEND, 1); -+ -+ startTime = jiffies; -+ waitTime = 0; -+ do { -+ requestedBlock = SAA716x_EPRD(PHI_1, 0x3ffc); -+ if (requestedBlock == 1) -+ break; -+ -+ currentTime = jiffies; -+ waitTime = currentTime - startTime; -+ } while (waitTime < (1 * HZ)); -+ -+ if (waitTime >= 1 * HZ) { -+ dprintk(SAA716x_ERROR, 1, "STi7109 seems to be DEAD!"); -+ return -1; -+ } -+ dprintk(SAA716x_INFO, 1, "STi7109 ready after %llu ticks", waitTime); -+ -+ /* request the st7109 firmware, this will block until someone uploads it */ -+ ret = request_firmware(&fw, "dvb-ttpremium-st7109-01.fw", &saa716x->pdev->dev); -+ if (ret) { -+ if (ret == -ENOENT) { -+ printk(KERN_ERR "dvb-ttpremium: could not load ST7109 firmware," -+ " file not found: dvb-ttpremium-st7109-01.fw\n"); -+ printk(KERN_ERR "dvb-ttpremium: usually this should be in " -+ "/usr/lib/hotplug/firmware or /lib/firmware\n"); -+ } else -+ printk(KERN_ERR "dvb-ttpremium: cannot request firmware" -+ " (error %i)\n", ret); -+ return -EINVAL; -+ } -+ -+ dprintk(SAA716x_INFO, 1, "SAA716x FF download ST7109 firmware"); -+ writtenBlock = 0; -+ blockSize = 0x3c00; -+ length = fw->size; -+ numBlocks = length / blockSize; -+ lastBlockSize = length % blockSize; -+ for (i = 0; i < length; i += blockSize) { -+ writtenBlock++; -+ /* write one block (last may differ from blockSize) */ -+ if (lastBlockSize && writtenBlock == (numBlocks + 1)) -+ saa716x_phi_write(saa716x, 0, &fw->data[i], lastBlockSize); -+ else -+ saa716x_phi_write(saa716x, 0, &fw->data[i], blockSize); -+ -+ SAA716x_EPWR(PHI_1, 0x3ff8, writtenBlock); -+ startTime = jiffies; -+ waitTime = 0; -+ do { -+ requestedBlock = SAA716x_EPRD(PHI_1, 0x3ffc); -+ if (requestedBlock == (writtenBlock + 1)) -+ break; -+ -+ currentTime = jiffies; -+ waitTime = currentTime - startTime; -+ } while (waitTime < (1 * HZ)); -+ -+ if (waitTime >= 1 * HZ) { -+ dprintk(SAA716x_ERROR, 1, "STi7109 seems to be DEAD!"); -+ release_firmware(fw); -+ return -1; -+ } -+ } -+ -+ /* disable frontend support through ST firmware */ -+ SAA716x_EPWR(PHI_1, 0x3ff4, 1); -+ -+ /* indicate end of transfer */ -+ writtenBlock++; -+ writtenBlock |= 0x80000000; -+ SAA716x_EPWR(PHI_1, 0x3ff8, writtenBlock); -+ -+ dprintk(SAA716x_INFO, 1, "SAA716x FF download ST7109 firmware done"); -+ -+ release_firmware(fw); -+ -+ return 0; -+} -+ -+static int saa716x_usercopy(struct dvb_device *dvbdev, -+ unsigned int cmd, unsigned long arg, -+ int (*func)(struct dvb_device *dvbdev, -+ unsigned int cmd, void *arg)) -+{ -+ char sbuf[128]; -+ void *mbuf = NULL; -+ void *parg = NULL; -+ int err = -EINVAL; -+ -+ /* Copy arguments into temp kernel buffer */ -+ switch (_IOC_DIR(cmd)) { -+ case _IOC_NONE: -+ /* -+ * For this command, the pointer is actually an integer -+ * argument. -+ */ -+ parg = (void *) arg; -+ break; -+ case _IOC_READ: /* some v4l ioctls are marked wrong ... */ -+ case _IOC_WRITE: -+ case (_IOC_WRITE | _IOC_READ): -+ if (_IOC_SIZE(cmd) <= sizeof(sbuf)) { -+ parg = sbuf; -+ } else { -+ /* too big to allocate from stack */ -+ mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL); -+ if (NULL == mbuf) -+ return -ENOMEM; -+ parg = mbuf; -+ } -+ -+ err = -EFAULT; -+ if (copy_from_user(parg, (void __user *)arg, _IOC_SIZE(cmd))) -+ goto out; -+ break; -+ } -+ -+ /* call driver */ -+ if ((err = func(dvbdev, cmd, parg)) == -ENOIOCTLCMD) -+ err = -EINVAL; -+ -+ if (err < 0) -+ goto out; -+ -+ /* Copy results into user buffer */ -+ switch (_IOC_DIR(cmd)) -+ { -+ case _IOC_READ: -+ case (_IOC_WRITE | _IOC_READ): -+ if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd))) -+ err = -EFAULT; -+ break; -+ } -+ -+out: -+ kfree(mbuf); -+ return err; -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) -+static int dvb_osd_ioctl(struct inode *inode, struct file *file, -+#else -+static long dvb_osd_ioctl(struct file *file, -+#endif -+ unsigned int cmd, unsigned long arg) -+{ -+ struct dvb_device *dvbdev = file->private_data; -+ struct sti7109_dev *sti7109 = dvbdev->priv; -+ int err = -EINVAL; -+ -+ if (!dvbdev) -+ return -ENODEV; -+ -+ if (cmd == OSD_RAW_CMD) { -+ osd_raw_cmd_t raw_cmd; -+ u8 hdr[4]; -+ -+ err = -EFAULT; -+ if (copy_from_user(&raw_cmd, (void __user *)arg, -+ _IOC_SIZE(cmd))) -+ goto out; -+ -+ if (copy_from_user(hdr, (void __user *)raw_cmd.cmd_data, 4)) -+ goto out; -+ -+ if (hdr[3] == 4) -+ err = sti7109_raw_osd_cmd(sti7109, &raw_cmd); -+ else -+ err = sti7109_raw_cmd(sti7109, &raw_cmd); -+ -+ if (err) -+ goto out; -+ -+ if (copy_to_user((void __user *)arg, &raw_cmd, _IOC_SIZE(cmd))) -+ err = -EFAULT; -+ } -+ else if (cmd == OSD_RAW_DATA) { -+ osd_raw_data_t raw_data; -+ -+ err = -EFAULT; -+ if (copy_from_user(&raw_data, (void __user *)arg, -+ _IOC_SIZE(cmd))) -+ goto out; -+ -+ err = sti7109_raw_data(sti7109, &raw_data); -+ if (err) -+ goto out; -+ -+ if (copy_to_user((void __user *)arg, &raw_data, _IOC_SIZE(cmd))) -+ err = -EFAULT; -+ } -+ -+out: -+ return err; -+} -+ -+static struct file_operations dvb_osd_fops = { -+ .owner = THIS_MODULE, -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) -+ .ioctl = dvb_osd_ioctl, -+#else -+ .unlocked_ioctl = dvb_osd_ioctl, -+#endif -+ .open = dvb_generic_open, -+ .release = dvb_generic_release, -+}; -+ -+static struct dvb_device dvbdev_osd = { -+ .priv = NULL, -+ .users = 2, -+ .writers = 2, -+ .fops = &dvb_osd_fops, -+ .kernel_ioctl = NULL, -+}; -+ -+static int saa716x_ff_osd_exit(struct saa716x_dev *saa716x) -+{ -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ dvb_unregister_device(sti7109->osd_dev); -+ return 0; -+} -+ -+static int saa716x_ff_osd_init(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ dvb_register_device(&saa716x_adap->dvb_adapter, -+ &sti7109->osd_dev, -+ &dvbdev_osd, -+ sti7109, -+ DVB_DEVICE_OSD); -+ -+ return 0; -+} -+ -+static int do_dvb_audio_ioctl(struct dvb_device *dvbdev, -+ unsigned int cmd, void *parg) -+{ -+ struct sti7109_dev *sti7109 = dvbdev->priv; -+ //struct saa716x_dev *saa716x = sti7109->dev; -+ int ret = 0; -+ -+ switch (cmd) { -+ case AUDIO_GET_PTS: -+ { -+ *(u64 *)parg = sti7109->audio_pts; -+ break; -+ } -+ default: -+ ret = -ENOIOCTLCMD; -+ break; -+ } -+ return ret; -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) -+static int dvb_audio_ioctl(struct inode *inode, struct file *file, -+#else -+static long dvb_audio_ioctl(struct file *file, -+#endif -+ unsigned int cmd, unsigned long arg) -+{ -+ struct dvb_device *dvbdev = file->private_data; -+ -+ if (!dvbdev) -+ return -ENODEV; -+ -+ return saa716x_usercopy (dvbdev, cmd, arg, do_dvb_audio_ioctl); -+} -+ -+static struct file_operations dvb_audio_fops = { -+ .owner = THIS_MODULE, -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) -+ .ioctl = dvb_audio_ioctl, -+#else -+ .unlocked_ioctl = dvb_audio_ioctl, -+#endif -+ .open = dvb_generic_open, -+ .release = dvb_generic_release, -+}; -+ -+static struct dvb_device dvbdev_audio = { -+ .priv = NULL, -+ .users = 1, -+ .writers = 1, -+ .fops = &dvb_audio_fops, -+ .kernel_ioctl = NULL, -+}; -+ -+static int saa716x_ff_audio_exit(struct saa716x_dev *saa716x) -+{ -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ dvb_unregister_device(sti7109->audio_dev); -+ return 0; -+} -+ -+static int saa716x_ff_audio_init(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ dvb_register_device(&saa716x_adap->dvb_adapter, -+ &sti7109->audio_dev, -+ &dvbdev_audio, -+ sti7109, -+ DVB_DEVICE_AUDIO); -+ -+ return 0; -+} -+ -+static void fifo_worker(unsigned long data) -+{ -+ struct saa716x_dev *saa716x = (struct saa716x_dev *) data; -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ u32 fifoCtrl; -+ u32 fifoStat; -+ u16 fifoSize; -+ u16 fifoUsage; -+ u16 fifoFree; -+ int len; -+ -+ fifoCtrl = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_CTRL); -+ fifoStat = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_STAT); -+ fifoSize = (u16) (fifoStat >> 16); -+ fifoUsage = (u16) fifoStat; -+ fifoFree = fifoSize - fifoUsage; -+ spin_lock(&sti7109->tsout.lock); -+ len = dvb_ringbuffer_avail(&sti7109->tsout); -+ if (len > fifoFree) -+ len = fifoFree; -+ if (len >= TS_SIZE) -+ { -+ while (len >= TS_SIZE) -+ { -+ dvb_ringbuffer_read(&sti7109->tsout, sti7109->tsbuf, (size_t) TS_SIZE); -+ saa716x_phi_write_fifo(saa716x, sti7109->tsbuf, TS_SIZE); -+ len -= TS_SIZE; -+ } -+ wake_up(&sti7109->tsout.queue); -+ fifoCtrl |= 0x4; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, fifoCtrl); -+ } -+ spin_unlock(&sti7109->tsout.lock); -+} -+ -+#define FREE_COND_TS (dvb_ringbuffer_free(&sti7109->tsout) >= TS_SIZE) -+ -+static ssize_t dvb_video_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct dvb_device *dvbdev = file->private_data; -+ struct sti7109_dev *sti7109 = dvbdev->priv; -+ struct saa716x_dev *saa716x = sti7109->dev; -+ unsigned long todo = count; -+ -+ if ((file->f_flags & O_ACCMODE) == O_RDONLY) -+ return -EPERM; -+/* -+ if (av7110->videostate.stream_source != VIDEO_SOURCE_MEMORY) -+ return -EPERM; -+*/ -+ if ((file->f_flags & O_NONBLOCK) && !FREE_COND_TS) -+ return -EWOULDBLOCK; -+ -+ while (todo >= TS_SIZE) { -+ if (!FREE_COND_TS) { -+ if (file->f_flags & O_NONBLOCK) -+ break; -+ if (wait_event_interruptible(sti7109->tsout.queue, FREE_COND_TS)) -+ break; -+ } -+ dvb_ringbuffer_write(&sti7109->tsout, buf, TS_SIZE); -+ todo -= TS_SIZE; -+ buf += TS_SIZE; -+ } -+ -+ if (count > todo) { -+ u32 fifoCtrl; -+ -+ fifoCtrl = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_CTRL); -+ fifoCtrl |= 0x4; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, fifoCtrl); -+ } -+ -+ return count - todo; -+} -+ -+static unsigned int dvb_video_poll(struct file *file, poll_table *wait) -+{ -+ struct dvb_device *dvbdev = file->private_data; -+ struct sti7109_dev *sti7109 = dvbdev->priv; -+ unsigned int mask = 0; -+ -+ if ((file->f_flags & O_ACCMODE) != O_RDONLY) -+ poll_wait(file, &sti7109->tsout.queue, wait); -+ -+ if ((file->f_flags & O_ACCMODE) != O_RDONLY) { -+ if (1/*sti7109->playing*/) { -+ if (FREE_COND_TS) -+ mask |= (POLLOUT | POLLWRNORM); -+ } else /* if not playing: may play if asked for */ -+ mask |= (POLLOUT | POLLWRNORM); -+ } -+ -+ return mask; -+} -+ -+static int do_dvb_video_ioctl(struct dvb_device *dvbdev, -+ unsigned int cmd, void *parg) -+{ -+ struct sti7109_dev *sti7109 = dvbdev->priv; -+ struct saa716x_dev *saa716x = sti7109->dev; -+ int ret = 0; -+ -+ switch (cmd) { -+ case VIDEO_SELECT_SOURCE: -+ { -+ video_stream_source_t stream_source; -+ -+ stream_source = (video_stream_source_t) parg; -+ if (stream_source == VIDEO_SOURCE_DEMUX) { -+ /* stop and reset FIFO 1 */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, 1); -+ } -+ else { -+ dvb_ringbuffer_flush_spinlock_wakeup(&sti7109->tsout); -+ /* reset FIFO 1 */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, 1); -+ /* start FIFO 1 */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, 2); -+ } -+ break; -+ } -+ case VIDEO_CLEAR_BUFFER: -+ { -+ dvb_ringbuffer_flush_spinlock_wakeup(&sti7109->tsout); -+ break; -+ } -+ case VIDEO_GET_PTS: -+ { -+ *(u64 *)parg = sti7109->video_pts; -+ break; -+ } -+ case VIDEO_GET_SIZE: -+ { -+ ret = sti7109_cmd_get_video_format(sti7109, (video_size_t *) parg); -+ break; -+ } -+ default: -+ ret = -ENOIOCTLCMD; -+ break; -+ } -+ return ret; -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) -+static int dvb_video_ioctl(struct inode *inode, struct file *file, -+#else -+static long dvb_video_ioctl(struct file *file, -+#endif -+ unsigned int cmd, unsigned long arg) -+{ -+ struct dvb_device *dvbdev = file->private_data; -+ -+ if (!dvbdev) -+ return -ENODEV; -+ -+ return saa716x_usercopy (dvbdev, cmd, arg, do_dvb_video_ioctl); -+} -+ -+static struct file_operations dvb_video_fops = { -+ .owner = THIS_MODULE, -+ .write = dvb_video_write, -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) -+ .ioctl = dvb_video_ioctl, -+#else -+ .unlocked_ioctl = dvb_video_ioctl, -+#endif -+ .open = dvb_generic_open, -+ .release = dvb_generic_release, -+ .poll = dvb_video_poll, -+}; -+ -+static struct dvb_device dvbdev_video = { -+ .priv = NULL, -+ .users = 1, -+ .writers = 1, -+ .fops = &dvb_video_fops, -+ .kernel_ioctl = NULL, -+}; -+ -+static int saa716x_ff_video_exit(struct saa716x_dev *saa716x) -+{ -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ tasklet_kill(&sti7109->fifo_tasklet); -+ dvb_unregister_device(sti7109->video_dev); -+ return 0; -+} -+ -+static int saa716x_ff_video_init(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ dvb_ringbuffer_init(&sti7109->tsout, sti7109->iobuf, TSOUT_LEN); -+ sti7109->tsbuf = (u8 *) (sti7109->iobuf + TSOUT_LEN); -+ -+ dvb_register_device(&saa716x_adap->dvb_adapter, -+ &sti7109->video_dev, -+ &dvbdev_video, -+ sti7109, -+ DVB_DEVICE_VIDEO); -+ -+ tasklet_init(&sti7109->fifo_tasklet, fifo_worker, -+ (unsigned long)saa716x); -+ -+ return 0; -+} -+ -+static int __devinit saa716x_ff_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) -+{ -+ struct saa716x_dev *saa716x; -+ struct sti7109_dev *sti7109; -+ int err = 0; -+ u32 value; -+ unsigned long timeout; -+ u32 fw_version; -+ -+ saa716x = kzalloc(sizeof (struct saa716x_dev), GFP_KERNEL); -+ if (saa716x == NULL) { -+ printk(KERN_ERR "saa716x_budget_pci_probe ERROR: out of memory\n"); -+ err = -ENOMEM; -+ goto fail0; -+ } -+ -+ saa716x->verbose = verbose; -+ saa716x->int_type = int_type; -+ saa716x->pdev = pdev; -+ saa716x->config = (struct saa716x_config *) pci_id->driver_data; -+ -+ err = saa716x_pci_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x PCI Initialization failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_cgu_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x CGU Init failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_core_boot(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x Core Boot failed"); -+ goto fail2; -+ } -+ dprintk(SAA716x_DEBUG, 1, "SAA716x Core Boot Success"); -+ -+ err = saa716x_msi_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x MSI Init failed"); -+ goto fail2; -+ } -+ -+ err = saa716x_jetpack_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x Jetpack core initialization failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_i2c_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x I2C Initialization failed"); -+ goto fail3; -+ } -+ -+ err = saa716x_phi_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x PHI Initialization failed"); -+ goto fail3; -+ } -+ -+ saa716x_gpio_init(saa716x); -+ -+ /* prepare the sti7109 device struct */ -+ sti7109 = kzalloc(sizeof(struct sti7109_dev), GFP_KERNEL); -+ if (!sti7109) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x: out of memory"); -+ goto fail3; -+ } -+ -+ sti7109->dev = saa716x; -+ -+ sti7109->iobuf = vmalloc(TSOUT_LEN + TSBUF_LEN + MAX_DATA_LEN); -+ if (!sti7109->iobuf) -+ goto fail4; -+ -+ sti7109_cmd_init(sti7109); -+ -+ sti7109->int_count_enable = int_count_enable; -+ sti7109->total_int_count = 0; -+ memset(sti7109->fgpi_int_count, 0, sizeof(sti7109->fgpi_int_count)); -+ memset(sti7109->i2c_int_count, 0, sizeof(sti7109->i2c_int_count)); -+ sti7109->ext_int_total_count = 0; -+ memset(sti7109->ext_int_source_count, 0, sizeof(sti7109->ext_int_source_count)); -+ sti7109->last_int_ticks = jiffies; -+ -+ saa716x->priv = sti7109; -+ -+ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE); -+ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_RESET_BACKEND); -+ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_FPGA_CS0); -+ saa716x_gpio_set_mode(saa716x, TT_PREMIUM_GPIO_FPGA_CS0, 1); -+ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_FPGA_CS1); -+ saa716x_gpio_set_mode(saa716x, TT_PREMIUM_GPIO_FPGA_CS1, 1); -+ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN); -+ saa716x_gpio_set_input(saa716x, TT_PREMIUM_GPIO_FPGA_DONE); -+ saa716x_gpio_set_input(saa716x, TT_PREMIUM_GPIO_FPGA_INITN); -+ -+ /* hold ST in reset */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_RESET_BACKEND, 0); -+ -+ /* enable board power */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE, 1); -+ msleep(100); -+ -+ err = saa716x_ff_fpga_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x FF FPGA Initialization failed"); -+ goto fail5; -+ } -+ -+ /* configure TS muxer */ -+ if (sti7109->fpga_version < 0x110) { -+ /* select FIFO 1 for TS mux 3 */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_TSR_MUX3, 4); -+ } else { -+ /* select FIFO 1 for TS mux 3 */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_TSR_MUX3, 1); -+ } -+ -+ /* enable interrupts from ST7109 -> PC */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICTRL, 0x3); -+ -+ value = SAA716x_EPRD(MSI, MSI_CONFIG33); -+ value &= 0xFCFFFFFF; -+ value |= MSI_INT_POL_EDGE_FALL; -+ SAA716x_EPWR(MSI, MSI_CONFIG33, value); -+ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, MSI_INT_EXTINT_0); -+ -+ /* enable tuner reset */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_PIO_CTRL, 0); -+ msleep(50); -+ /* disable tuner reset */ -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_PIO_CTRL, 1); -+ -+ err = saa716x_ff_st7109_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x FF STi7109 initialization failed"); -+ goto fail5; -+ } -+ -+ err = saa716x_dump_eeprom(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); -+ } -+ -+ err = saa716x_eeprom_data(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); -+ } -+ -+ /* enable FGPI2 and FGPI3 for TS inputs */ -+ SAA716x_EPWR(GREG, GREG_VI_CTRL, 0x0689F04); -+ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, 0x280); -+ -+ err = saa716x_dvb_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x DVB initialization failed"); -+ goto fail6; -+ } -+ -+ /* wait a maximum of 10 seconds for the STi7109 to boot */ -+ timeout = 10 * HZ; -+ timeout = wait_event_interruptible_timeout(sti7109->boot_finish_wq, -+ sti7109->boot_finished == 1, -+ timeout); -+ -+ if (timeout == -ERESTARTSYS || sti7109->boot_finished == 0) { -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ goto fail6; -+ } -+ dprintk(SAA716x_ERROR, 1, "timed out waiting for boot finish"); -+ err = -1; -+ goto fail6; -+ } -+ dprintk(SAA716x_INFO, 1, "STi7109 finished booting"); -+ -+ err = saa716x_ff_video_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x FF VIDEO initialization failed"); -+ goto fail7; -+ } -+ -+ err = saa716x_ff_audio_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x FF AUDIO initialization failed"); -+ goto fail8; -+ } -+ -+ err = saa716x_ff_osd_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x FF OSD initialization failed"); -+ goto fail9; -+ } -+ -+ err = sti7109_cmd_get_fw_version(sti7109, &fw_version); -+ if (!err) { -+ printk(KERN_INFO "SAA716x FF firmware version %X.%X.%X\n", -+ (fw_version >> 16) & 0xFF, (fw_version >> 8) & 0xFF, -+ fw_version & 0xFF); -+ } -+ -+ err = saa716x_ir_init(saa716x); -+ if (err) -+ goto fail9; -+ -+ return 0; -+ -+fail9: -+ saa716x_ff_osd_exit(saa716x); -+fail8: -+ saa716x_ff_audio_exit(saa716x); -+fail7: -+ saa716x_ff_video_exit(saa716x); -+fail6: -+ saa716x_dvb_exit(saa716x); -+fail5: -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, MSI_INT_EXTINT_0); -+ -+ /* disable board power */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE, 0); -+ -+ vfree(sti7109->iobuf); -+fail4: -+ kfree(sti7109); -+fail3: -+ saa716x_i2c_exit(saa716x); -+fail2: -+ saa716x_pci_exit(saa716x); -+fail1: -+ kfree(saa716x); -+fail0: -+ return err; -+} -+ -+static void __devexit saa716x_ff_pci_remove(struct pci_dev *pdev) -+{ -+ struct saa716x_dev *saa716x = pci_get_drvdata(pdev); -+ struct sti7109_dev *sti7109 = saa716x->priv; -+ -+ saa716x_ir_exit(saa716x); -+ -+ saa716x_ff_osd_exit(saa716x); -+ -+ saa716x_ff_audio_exit(saa716x); -+ -+ saa716x_ff_video_exit(saa716x); -+ -+ saa716x_dvb_exit(saa716x); -+ -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, MSI_INT_EXTINT_0); -+ -+ /* disable board power */ -+ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE, 0); -+ -+ vfree(sti7109->iobuf); -+ -+ saa716x->priv = NULL; -+ kfree(sti7109); -+ -+ saa716x_i2c_exit(saa716x); -+ saa716x_pci_exit(saa716x); -+ kfree(saa716x); -+} -+ -+static void demux_worker(unsigned long data) -+{ -+ struct saa716x_fgpi_stream_port *fgpi_entry = (struct saa716x_fgpi_stream_port *)data; -+ struct saa716x_dev *saa716x = fgpi_entry->saa716x; -+ struct dvb_demux *demux; -+ u32 fgpi_index; -+ u32 i; -+ u32 write_index; -+ -+ fgpi_index = fgpi_entry->dma_channel - 6; -+ demux = NULL; -+ for (i = 0; i < saa716x->config->adapters; i++) { -+ if (saa716x->config->adap_config[i].ts_port == fgpi_index) { -+ demux = &saa716x->saa716x_adap[i].demux; -+ break; -+ } -+ } -+ if (demux == NULL) { -+ printk(KERN_ERR "%s: unexpected channel %u\n", -+ __func__, fgpi_entry->dma_channel); -+ return; -+ } -+ -+ write_index = saa716x_fgpi_get_write_index(saa716x, fgpi_index); -+ if (write_index < 0) -+ return; -+ -+ dprintk(SAA716x_DEBUG, 1, "dma buffer = %d", write_index); -+ -+ if (write_index == fgpi_entry->read_index) { -+ printk(KERN_DEBUG "%s: called but nothing to do\n", __func__); -+ return; -+ } -+ -+ do { -+ u8 *data = (u8 *)fgpi_entry->dma_buf[fgpi_entry->read_index].mem_virt; -+ -+ pci_dma_sync_sg_for_cpu(saa716x->pdev, -+ fgpi_entry->dma_buf[fgpi_entry->read_index].sg_list, -+ fgpi_entry->dma_buf[fgpi_entry->read_index].list_len, -+ PCI_DMA_FROMDEVICE); -+ -+ dvb_dmx_swfilter(demux, data, 348 * 188); -+ -+ fgpi_entry->read_index = (fgpi_entry->read_index + 1) & 7; -+ } while (write_index != fgpi_entry->read_index); -+} -+ -+static irqreturn_t saa716x_ff_pci_irq(int irq, void *dev_id) -+{ -+ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; -+ struct sti7109_dev *sti7109; -+ u32 msiStatusL; -+ u32 msiStatusH; -+ u32 phiISR; -+ -+ if (unlikely(saa716x == NULL)) { -+ printk("%s: saa716x=NULL", __func__); -+ return IRQ_NONE; -+ } -+ sti7109 = saa716x->priv; -+ if (unlikely(sti7109 == NULL)) { -+ printk("%s: sti7109=NULL", __func__); -+ return IRQ_NONE; -+ } -+ if (sti7109->int_count_enable) -+ sti7109->total_int_count++; -+#if 0 -+ dprintk(SAA716x_DEBUG, 1, "VI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", -+ SAA716x_EPRD(VI0, INT_STATUS), -+ SAA716x_EPRD(VI1, INT_STATUS), -+ SAA716x_EPRD(VI0, INT_ENABLE), -+ SAA716x_EPRD(VI1, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", -+ SAA716x_EPRD(FGPI0, INT_STATUS), -+ SAA716x_EPRD(FGPI1, INT_STATUS), -+ SAA716x_EPRD(FGPI0, INT_ENABLE), -+ SAA716x_EPRD(FGPI0, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 2=<%02x> 3=<%02x>, CTL 2=<%02x> 3=<%02x>", -+ SAA716x_EPRD(FGPI2, INT_STATUS), -+ SAA716x_EPRD(FGPI3, INT_STATUS), -+ SAA716x_EPRD(FGPI2, INT_ENABLE), -+ SAA716x_EPRD(FGPI3, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "AI STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(AI0, AI_STATUS), -+ SAA716x_EPRD(AI1, AI_STATUS), -+ SAA716x_EPRD(AI0, AI_CTL), -+ SAA716x_EPRD(AI1, AI_CTL)); -+ -+ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", -+ SAA716x_EPRD(MSI, MSI_INT_STATUS_L), -+ SAA716x_EPRD(MSI, MSI_INT_STATUS_H), -+ SAA716x_EPRD(MSI, MSI_INT_ENA_L), -+ SAA716x_EPRD(MSI, MSI_INT_ENA_H)); -+ -+ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(I2C_A, INT_STATUS), -+ SAA716x_EPRD(I2C_B, INT_STATUS), -+ SAA716x_EPRD(I2C_A, INT_ENABLE), -+ SAA716x_EPRD(I2C_B, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "DCS STAT=<%02x>, CTL=<%02x>", -+ SAA716x_EPRD(DCS, DCSC_INT_STATUS), -+ SAA716x_EPRD(DCS, DCSC_INT_ENABLE)); -+#endif -+ msiStatusL = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, msiStatusL); -+ msiStatusH = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, msiStatusH); -+ -+ if (msiStatusL) { -+ if (msiStatusL & MSI_INT_TAGACK_FGPI_2) { -+ if (sti7109->int_count_enable) -+ sti7109->fgpi_int_count[0]++; -+ tasklet_schedule(&saa716x->fgpi[2].tasklet); -+ } -+ if (msiStatusL & MSI_INT_TAGACK_FGPI_3) { -+ if (sti7109->int_count_enable) -+ sti7109->fgpi_int_count[1]++; -+ tasklet_schedule(&saa716x->fgpi[3].tasklet); -+ } -+ } -+ if (msiStatusH) { -+ //dprintk(SAA716x_INFO, 1, "msiStatusH: %08X", msiStatusH); -+ } -+ -+ if (msiStatusH & MSI_INT_I2CINT_0) { -+ if (sti7109->int_count_enable) -+ sti7109->i2c_int_count[0]++; -+ saa716x->i2c[0].i2c_op = 0; -+ wake_up(&saa716x->i2c[0].i2c_wq); -+ } -+ if (msiStatusH & MSI_INT_I2CINT_1) { -+ if (sti7109->int_count_enable) -+ sti7109->i2c_int_count[1]++; -+ saa716x->i2c[1].i2c_op = 0; -+ wake_up(&saa716x->i2c[1].i2c_wq); -+ } -+ -+ if (msiStatusH & MSI_INT_EXTINT_0) { -+ -+ phiISR = SAA716x_EPRD(PHI_1, FPGA_ADDR_EMI_ISR); -+ //dprintk(SAA716x_INFO, 1, "interrupt status register: %08X", phiISR); -+ -+ if (sti7109->int_count_enable) { -+ int i; -+ sti7109->ext_int_total_count++; -+ for (i = 0; i < 16; i++) -+ if (phiISR & (1 << i)) -+ sti7109->ext_int_source_count[i]++; -+ } -+ -+ if (phiISR & ISR_CMD_MASK) { -+ -+ u32 value; -+ u32 length; -+ /*dprintk(SAA716x_INFO, 1, "CMD interrupt source");*/ -+ -+ value = SAA716x_EPRD(PHI_1, ADDR_CMD_DATA); -+ value = __cpu_to_be32(value); -+ length = (value >> 16) + 2; -+ -+ /*dprintk(SAA716x_INFO, 1, "CMD length: %d", length);*/ -+ -+ if (length > MAX_RESULT_LEN) { -+ dprintk(SAA716x_ERROR, 1, "CMD length %d > %d", length, MAX_RESULT_LEN); -+ length = MAX_RESULT_LEN; -+ } -+ -+ saa716x_phi_read(saa716x, ADDR_CMD_DATA, sti7109->result_data, length); -+ sti7109->result_len = length; -+ sti7109->result_avail = 1; -+ wake_up(&sti7109->result_avail_wq); -+ -+ phiISR &= ~ISR_CMD_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_CMD_MASK); -+ } -+ -+ if (phiISR & ISR_READY_MASK) { -+ /*dprintk(SAA716x_INFO, 1, "READY interrupt source");*/ -+ sti7109->cmd_ready = 1; -+ wake_up(&sti7109->cmd_ready_wq); -+ phiISR &= ~ISR_READY_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_READY_MASK); -+ } -+ -+ if (phiISR & ISR_OSD_CMD_MASK) { -+ -+ u32 value; -+ u32 length; -+ /*dprintk(SAA716x_INFO, 1, "OSD CMD interrupt source");*/ -+ -+ value = SAA716x_EPRD(PHI_1, ADDR_OSD_CMD_DATA); -+ value = __cpu_to_be32(value); -+ length = (value >> 16) + 2; -+ -+ /*dprintk(SAA716x_INFO, 1, "OSD CMD length: %d", length);*/ -+ -+ if (length > MAX_RESULT_LEN) { -+ dprintk(SAA716x_ERROR, 1, "OSD CMD length %d > %d", length, MAX_RESULT_LEN); -+ length = MAX_RESULT_LEN; -+ } -+ -+ saa716x_phi_read(saa716x, ADDR_OSD_CMD_DATA, sti7109->osd_result_data, length); -+ sti7109->osd_result_len = length; -+ sti7109->osd_result_avail = 1; -+ wake_up(&sti7109->osd_result_avail_wq); -+ -+ phiISR &= ~ISR_OSD_CMD_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_OSD_CMD_MASK); -+ } -+ -+ if (phiISR & ISR_OSD_READY_MASK) { -+ /*dprintk(SAA716x_INFO, 1, "OSD_READY interrupt source");*/ -+ sti7109->osd_cmd_ready = 1; -+ wake_up(&sti7109->osd_cmd_ready_wq); -+ phiISR &= ~ISR_OSD_READY_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_OSD_READY_MASK); -+ } -+ -+ if (phiISR & ISR_BLOCK_MASK) { -+ /*dprintk(SAA716x_INFO, 1, "BLOCK interrupt source");*/ -+ sti7109->block_done = 1; -+ wake_up(&sti7109->block_done_wq); -+ phiISR &= ~ISR_BLOCK_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_BLOCK_MASK); -+ } -+ -+ if (phiISR & ISR_DATA_MASK) { -+ /*dprintk(SAA716x_INFO, 1, "DATA interrupt source");*/ -+ sti7109->data_ready = 1; -+ wake_up(&sti7109->data_ready_wq); -+ phiISR &= ~ISR_DATA_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_DATA_MASK); -+ } -+ -+ if (phiISR & ISR_BOOT_FINISH_MASK) { -+ /*dprintk(SAA716x_INFO, 1, "BOOT FINISH interrupt source");*/ -+ sti7109->boot_finished = 1; -+ wake_up(&sti7109->boot_finish_wq); -+ phiISR &= ~ISR_BOOT_FINISH_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_BOOT_FINISH_MASK); -+ } -+ -+ if (phiISR & ISR_AUDIO_PTS_MASK) { -+ u8 data[8]; -+ -+ saa716x_phi_read(saa716x, ADDR_AUDIO_PTS, data, 8); -+ sti7109->audio_pts = (((u64) data[3] & 0x01) << 32) -+ | ((u64) data[4] << 24) -+ | ((u64) data[5] << 16) -+ | ((u64) data[6] << 8) -+ | ((u64) data[7]); -+ -+ phiISR &= ~ISR_AUDIO_PTS_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_AUDIO_PTS_MASK); -+ -+ /*dprintk(SAA716x_INFO, 1, "AUDIO PTS: %llX", sti7109->audio_pts);*/ -+ } -+ -+ if (phiISR & ISR_VIDEO_PTS_MASK) { -+ u8 data[8]; -+ -+ saa716x_phi_read(saa716x, ADDR_VIDEO_PTS, data, 8); -+ sti7109->video_pts = (((u64) data[3] & 0x01) << 32) -+ | ((u64) data[4] << 24) -+ | ((u64) data[5] << 16) -+ | ((u64) data[6] << 8) -+ | ((u64) data[7]); -+ -+ phiISR &= ~ISR_VIDEO_PTS_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_VIDEO_PTS_MASK); -+ -+ /*dprintk(SAA716x_INFO, 1, "VIDEO PTS: %llX", sti7109->video_pts);*/ -+ } -+ -+ if (phiISR & ISR_CURRENT_STC_MASK) { -+ u8 data[8]; -+ -+ saa716x_phi_read(saa716x, ADDR_CURRENT_STC, data, 8); -+ sti7109->current_stc = (((u64) data[3] & 0x01) << 32) -+ | ((u64) data[4] << 24) -+ | ((u64) data[5] << 16) -+ | ((u64) data[6] << 8) -+ | ((u64) data[7]); -+ -+ phiISR &= ~ISR_CURRENT_STC_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_CURRENT_STC_MASK); -+ -+ /*dprintk(SAA716x_INFO, 1, "CURRENT STC: %llu", sti7109->current_stc);*/ -+ } -+ -+ if (phiISR & ISR_REMOTE_EVENT_MASK) { -+ u8 data[4]; -+ u32 remote_event; -+ -+ saa716x_phi_read(saa716x, ADDR_REMOTE_EVENT, data, 4); -+ remote_event = (data[3] << 24) -+ | (data[2] << 16) -+ | (data[1] << 8) -+ | (data[0]); -+ memset(data, 0, sizeof(data)); -+ saa716x_phi_write(saa716x, ADDR_REMOTE_EVENT, data, 4); -+ -+ phiISR &= ~ISR_REMOTE_EVENT_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_REMOTE_EVENT_MASK); -+ -+ if (remote_event == 0) { -+ dprintk(SAA716x_ERROR, 1, "REMOTE EVENT: %X ignored", remote_event); -+ } else { -+ dprintk(SAA716x_INFO, 1, "REMOTE EVENT: %X", remote_event); -+ saa716x_ir_handler(saa716x, remote_event); -+ } -+ } -+ -+ if (phiISR & ISR_DVO_FORMAT_MASK) { -+ u8 data[4]; -+ u32 format; -+ -+ saa716x_phi_read(saa716x, ADDR_DVO_FORMAT, data, 4); -+ format = (data[0] << 24) -+ | (data[1] << 16) -+ | (data[2] << 8) -+ | (data[3]); -+ -+ phiISR &= ~ISR_DVO_FORMAT_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_DVO_FORMAT_MASK); -+ -+ dprintk(SAA716x_INFO, 1, "DVO FORMAT CHANGE: %u", format); -+ } -+ -+ if (phiISR & ISR_LOG_MESSAGE_MASK) { -+ char message[SIZE_LOG_MESSAGE_DATA]; -+ -+ saa716x_phi_read(saa716x, ADDR_LOG_MESSAGE, message, -+ SIZE_LOG_MESSAGE_DATA); -+ -+ phiISR &= ~ISR_LOG_MESSAGE_MASK; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_LOG_MESSAGE_MASK); -+ -+ dprintk(SAA716x_INFO, 1, "LOG MESSAGE: %.*s", -+ SIZE_LOG_MESSAGE_DATA, message); -+ } -+ -+ if (phiISR & ISR_FIFO1_EMPTY_MASK) { -+ u32 fifoCtrl; -+ -+ /*dprintk(SAA716x_INFO, 1, "FIFO EMPTY interrupt source");*/ -+ fifoCtrl = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_CTRL); -+ fifoCtrl &= ~0x4; -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, fifoCtrl); -+ tasklet_schedule(&sti7109->fifo_tasklet); -+ phiISR &= ~ISR_FIFO1_EMPTY_MASK; -+ } -+ -+ if (phiISR) { -+ dprintk(SAA716x_INFO, 1, "unknown interrupt source"); -+ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, phiISR); -+ } -+ } -+ -+ if (sti7109->int_count_enable) { -+ if (jiffies - sti7109->last_int_ticks >= HZ) { -+ dprintk(SAA716x_INFO, 1, "int count: t: %d, f:%d %d, i:%d %d," -+ "e: %d (%d %d %d %d %d %d %d %d %d %d %d %d %d %d %d %d)", -+ sti7109->total_int_count, -+ sti7109->fgpi_int_count[0], -+ sti7109->fgpi_int_count[1], -+ sti7109->i2c_int_count[0], -+ sti7109->i2c_int_count[1], -+ sti7109->ext_int_total_count, -+ sti7109->ext_int_source_count[0], -+ sti7109->ext_int_source_count[1], -+ sti7109->ext_int_source_count[2], -+ sti7109->ext_int_source_count[3], -+ sti7109->ext_int_source_count[4], -+ sti7109->ext_int_source_count[5], -+ sti7109->ext_int_source_count[6], -+ sti7109->ext_int_source_count[7], -+ sti7109->ext_int_source_count[8], -+ sti7109->ext_int_source_count[9], -+ sti7109->ext_int_source_count[10], -+ sti7109->ext_int_source_count[11], -+ sti7109->ext_int_source_count[12], -+ sti7109->ext_int_source_count[13], -+ sti7109->ext_int_source_count[14], -+ sti7109->ext_int_source_count[15]); -+ sti7109->total_int_count = 0; -+ memset(sti7109->fgpi_int_count, 0, sizeof(sti7109->fgpi_int_count)); -+ memset(sti7109->i2c_int_count, 0, sizeof(sti7109->i2c_int_count)); -+ sti7109->ext_int_total_count = 0; -+ memset(sti7109->ext_int_source_count, 0, sizeof(sti7109->ext_int_source_count)); -+ sti7109->last_int_ticks = jiffies; -+ } -+ } -+ return IRQ_HANDLED; -+} -+ -+#define SAA716x_MODEL_S2_6400_DUAL "Technotrend S2 6400 Dual S2 Premium" -+#define SAA716x_DEV_S2_6400_DUAL "2x DVB-S/S2 + Hardware decode" -+ -+static struct stv090x_config tt6400_stv090x_config = { -+ .device = STV0900, -+ .demod_mode = STV090x_DUAL, -+ .clk_mode = STV090x_CLK_EXT, -+ -+ .xtal = 13500000, -+ .address = 0x68, -+ -+ .ts1_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, -+ .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, -+ .ts1_clk = 135000000, -+ .ts2_clk = 135000000, -+ -+ .repeater_level = STV090x_RPTLEVEL_16, -+ -+ .tuner_init = NULL, -+ .tuner_set_mode = NULL, -+ .tuner_set_frequency = NULL, -+ .tuner_get_frequency = NULL, -+ .tuner_set_bandwidth = NULL, -+ .tuner_get_bandwidth = NULL, -+ .tuner_set_bbgain = NULL, -+ .tuner_get_bbgain = NULL, -+ .tuner_set_refclk = NULL, -+ .tuner_get_status = NULL, -+}; -+ -+static struct stv6110x_config tt6400_stv6110x_config = { -+ .addr = 0x60, -+ .refclk = 27000000, -+ .clk_div = 2, -+}; -+ -+static struct isl6423_config tt6400_isl6423_config[2] = { -+ { -+ .current_max = SEC_CURRENT_515m, -+ .curlim = SEC_CURRENT_LIM_ON, -+ .mod_extern = 1, -+ .addr = 0x09, -+ }, -+ { -+ .current_max = SEC_CURRENT_515m, -+ .curlim = SEC_CURRENT_LIM_ON, -+ .mod_extern = 1, -+ .addr = 0x08, -+ } -+}; -+ -+ -+static int saa716x_s26400_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *i2c = saa716x->i2c; -+ struct i2c_adapter *i2c_adapter = &i2c[SAA716x_I2C_BUS_A].i2c_adapter; -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+ if (count == 0 || count == 1) { -+ adapter->fe = dvb_attach(stv090x_attach, -+ &tt6400_stv090x_config, -+ i2c_adapter, -+ STV090x_DEMODULATOR_0 + count); -+ -+ if (adapter->fe) { -+ struct stv6110x_devctl *ctl; -+ ctl = dvb_attach(stv6110x_attach, -+ adapter->fe, -+ &tt6400_stv6110x_config, -+ i2c_adapter); -+ -+ tt6400_stv090x_config.tuner_init = ctl->tuner_init; -+ tt6400_stv090x_config.tuner_sleep = ctl->tuner_sleep; -+ tt6400_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; -+ tt6400_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; -+ tt6400_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; -+ tt6400_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; -+ tt6400_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; -+ tt6400_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; -+ tt6400_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; -+ tt6400_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; -+ tt6400_stv090x_config.tuner_get_status = ctl->tuner_get_status; -+ -+ if (count == 1) { -+ /* call the init function once to initialize -+ tuner's clock output divider and demod's -+ master clock */ -+ /* The second tuner drives the STV0900 so -+ call it only for adapter 1 */ -+ if (adapter->fe->ops.init) -+ adapter->fe->ops.init(adapter->fe); -+ } -+ -+ dvb_attach(isl6423_attach, -+ adapter->fe, -+ i2c_adapter, -+ &tt6400_isl6423_config[count]); -+ -+ } -+ } -+ return 0; -+} -+ -+static struct saa716x_config saa716x_s26400_config = { -+ .model_name = SAA716x_MODEL_S2_6400_DUAL, -+ .dev_type = SAA716x_DEV_S2_6400_DUAL, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 2, -+ .frontend_attach = saa716x_s26400_frontend_attach, -+ .irq_handler = saa716x_ff_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+ .i2c_mode = SAA716x_I2C_MODE_IRQ_BUFFERED, -+ -+ .adap_config = { -+ { -+ /* Adapter 0 */ -+ .ts_port = 2, -+ .worker = demux_worker -+ },{ -+ /* Adapter 1 */ -+ .ts_port = 3, -+ .worker = demux_worker -+ } -+ } -+}; -+ -+ -+static struct pci_device_id saa716x_ff_pci_table[] = { -+ -+ MAKE_ENTRY(TECHNOTREND, S2_6400_DUAL_S2_PREMIUM_DEVEL, SAA7160, &saa716x_s26400_config), /* S2 6400 Dual development version */ -+ MAKE_ENTRY(TECHNOTREND, S2_6400_DUAL_S2_PREMIUM_PROD, SAA7160, &saa716x_s26400_config), /* S2 6400 Dual production version */ -+ { } -+}; -+MODULE_DEVICE_TABLE(pci, saa716x_ff_pci_table); -+ -+static struct pci_driver saa716x_ff_pci_driver = { -+ .name = DRIVER_NAME, -+ .id_table = saa716x_ff_pci_table, -+ .probe = saa716x_ff_pci_probe, -+ .remove = saa716x_ff_pci_remove, -+}; -+ -+static int __devinit saa716x_ff_init(void) -+{ -+ return pci_register_driver(&saa716x_ff_pci_driver); -+} -+ -+static void __devexit saa716x_ff_exit(void) -+{ -+ return pci_unregister_driver(&saa716x_ff_pci_driver); -+} -+ -+module_init(saa716x_ff_init); -+module_exit(saa716x_ff_exit); -+ -+MODULE_DESCRIPTION("SAA716x FF driver"); -+MODULE_AUTHOR("Manu Abraham"); -+MODULE_LICENSE("GPL"); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.c 2013-01-16 10:41:10.917798240 +0100 -@@ -0,0 +1,389 @@ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_fgpi_reg.h" -+#include "saa716x_dma_reg.h" -+#include "saa716x_msi_reg.h" -+ -+#include "saa716x_dma.h" -+#include "saa716x_fgpi.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+static const u32 mmu_pta_base[] = { -+ MMU_PTA_BASE0, -+ MMU_PTA_BASE1, -+ MMU_PTA_BASE2, -+ MMU_PTA_BASE3, -+ MMU_PTA_BASE4, -+ MMU_PTA_BASE5, -+ MMU_PTA_BASE6, -+ MMU_PTA_BASE7, -+ MMU_PTA_BASE8, -+ MMU_PTA_BASE9, -+ MMU_PTA_BASE10, -+ MMU_PTA_BASE11, -+ MMU_PTA_BASE12, -+ MMU_PTA_BASE13, -+ MMU_PTA_BASE14, -+ MMU_PTA_BASE15, -+}; -+ -+static const u32 mmu_dma_cfg[] = { -+ MMU_DMA_CONFIG0, -+ MMU_DMA_CONFIG1, -+ MMU_DMA_CONFIG2, -+ MMU_DMA_CONFIG3, -+ MMU_DMA_CONFIG4, -+ MMU_DMA_CONFIG5, -+ MMU_DMA_CONFIG6, -+ MMU_DMA_CONFIG7, -+ MMU_DMA_CONFIG8, -+ MMU_DMA_CONFIG9, -+ MMU_DMA_CONFIG10, -+ MMU_DMA_CONFIG11, -+ MMU_DMA_CONFIG12, -+ MMU_DMA_CONFIG13, -+ MMU_DMA_CONFIG14, -+ MMU_DMA_CONFIG15, -+}; -+ -+static const u32 fgpi_ch[] = { -+ FGPI0, -+ FGPI1, -+ FGPI2, -+ FGPI3 -+}; -+ -+static const u32 bamdma_bufmode[] = { -+ BAM_FGPI0_DMA_BUF_MODE, -+ BAM_FGPI1_DMA_BUF_MODE, -+ BAM_FGPI2_DMA_BUF_MODE, -+ BAM_FGPI3_DMA_BUF_MODE -+}; -+ -+static const u32 msi_int_tagack[] = { -+ MSI_INT_TAGACK_FGPI_0, -+ MSI_INT_TAGACK_FGPI_1, -+ MSI_INT_TAGACK_FGPI_2, -+ MSI_INT_TAGACK_FGPI_3 -+}; -+ -+static const u32 msi_int_ovrflw[] = { -+ MSI_INT_OVRFLW_FGPI_0, -+ MSI_INT_OVRFLW_FGPI_1, -+ MSI_INT_OVRFLW_FGPI_2, -+ MSI_INT_OVRFLW_FGPI_3 -+}; -+ -+static const u32 msi_int_avint[] = { -+ MSI_INT_AVINT_FGPI_0, -+ MSI_INT_AVINT_FGPI_1, -+ MSI_INT_AVINT_FGPI_2, -+ MSI_INT_AVINT_FGPI_3 -+}; -+ -+void saa716x_fgpiint_disable(struct saa716x_dmabuf *dmabuf, int channel) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ -+ u32 fgpi_port; -+ -+ fgpi_port = fgpi_ch[channel]; -+ -+ SAA716x_EPWR(fgpi_port, INT_ENABLE, 0); /* disable FGPI IRQ */ -+ SAA716x_EPWR(fgpi_port, INT_CLR_STATUS, 0x7f); /* clear status */ -+} -+EXPORT_SYMBOL_GPL(saa716x_fgpiint_disable); -+ -+int saa716x_fgpi_get_write_index(struct saa716x_dev *saa716x, u32 fgpi_index) -+{ -+ u32 fgpi_base; -+ u32 buf_mode_reg; -+ u32 buf_mode; -+ -+ switch (fgpi_index) { -+ case 0: /* FGPI_0 */ -+ fgpi_base = FGPI0; -+ buf_mode_reg = BAM_FGPI0_DMA_BUF_MODE; -+ break; -+ -+ case 1: /* FGPI_1 */ -+ fgpi_base = FGPI1; -+ buf_mode_reg = BAM_FGPI1_DMA_BUF_MODE; -+ break; -+ -+ case 2: /* FGPI_2 */ -+ fgpi_base = FGPI2; -+ buf_mode_reg = BAM_FGPI2_DMA_BUF_MODE; -+ break; -+ -+ case 3: /* FGPI_3 */ -+ fgpi_base = FGPI3; -+ buf_mode_reg = BAM_FGPI3_DMA_BUF_MODE; -+ break; -+ -+ default: -+ printk(KERN_ERR "%s: unexpected fgpi %u\n", -+ __func__, fgpi_index); -+ return -1; -+ } -+ -+ buf_mode = SAA716x_EPRD(BAM, buf_mode_reg); -+ if (saa716x->revision < 2) { -+ /* workaround for revision 1: restore buffer numbers on BAM */ -+ SAA716x_EPWR(fgpi_base, INT_CLR_STATUS, 0x7F); -+ SAA716x_EPWR(BAM, buf_mode_reg, buf_mode | 7); -+ } -+ return (buf_mode >> 3) & 0x7; -+} -+EXPORT_SYMBOL_GPL(saa716x_fgpi_get_write_index); -+ -+static u32 saa716x_init_ptables(struct saa716x_dmabuf *dmabuf, int channel) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ -+ u32 config, i; -+ -+ for (i = 0; i < FGPI_BUFFERS; i++) -+ BUG_ON((dmabuf[i].mem_ptab_phys == 0)); -+ -+ config = mmu_dma_cfg[channel]; /* DMACONFIGx */ -+ -+ SAA716x_EPWR(MMU, config, (FGPI_BUFFERS - 1)); -+ SAA716x_EPWR(MMU, MMU_PTA0_LSB(channel), PTA_LSB(dmabuf[0].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA0_MSB(channel), PTA_MSB(dmabuf[0].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA1_LSB(channel), PTA_LSB(dmabuf[1].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA1_MSB(channel), PTA_MSB(dmabuf[1].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA2_LSB(channel), PTA_LSB(dmabuf[2].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA2_MSB(channel), PTA_MSB(dmabuf[2].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA3_LSB(channel), PTA_LSB(dmabuf[3].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA3_MSB(channel), PTA_MSB(dmabuf[3].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA4_LSB(channel), PTA_LSB(dmabuf[4].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA4_MSB(channel), PTA_MSB(dmabuf[4].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA5_LSB(channel), PTA_LSB(dmabuf[5].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA5_MSB(channel), PTA_MSB(dmabuf[5].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA6_LSB(channel), PTA_LSB(dmabuf[6].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA6_MSB(channel), PTA_MSB(dmabuf[6].mem_ptab_phys)); /* High */ -+ SAA716x_EPWR(MMU, MMU_PTA7_LSB(channel), PTA_LSB(dmabuf[7].mem_ptab_phys)); /* Low */ -+ SAA716x_EPWR(MMU, MMU_PTA7_MSB(channel), PTA_MSB(dmabuf[7].mem_ptab_phys)); /* High */ -+ -+ return 0; -+} -+ -+int saa716x_fgpi_setparams(struct saa716x_dmabuf *dmabuf, -+ struct fgpi_stream_params *stream_params, -+ int port) -+{ -+ struct saa716x_dev *saa716x = dmabuf->saa716x; -+ -+ u32 fgpi_port, buf_mode, val, mid; -+ u32 D1_XY_END, offst_1, offst_2; -+ int i = 0; -+ -+ fgpi_port = fgpi_ch[port]; -+ buf_mode = bamdma_bufmode[port]; -+ -+ /* Reset FGPI block */ -+ SAA716x_EPWR(fgpi_port, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); -+ -+ /* Reset DMA channel */ -+ SAA716x_EPWR(BAM, buf_mode, 0x00000040); -+ saa716x_init_ptables(dmabuf, saa716x->fgpi[port].dma_channel); -+ -+ -+ /* monitor BAM reset */ -+ val = SAA716x_EPRD(BAM, buf_mode); -+ while (val && (i < 100)) { -+ msleep(30); -+ val = SAA716x_EPRD(BAM, buf_mode); -+ i++; -+ } -+ -+ if (val) { -+ dprintk(SAA716x_ERROR, 1, "Error: BAM FGPI Reset failed!"); -+ return -EIO; -+ } -+ -+ /* set buffer count */ -+ SAA716x_EPWR(BAM, buf_mode, FGPI_BUFFERS - 1); -+ -+ /* initialize all available address offsets */ -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_0(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_1(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_2(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_3(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_4(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_5(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_6(port), 0x0); -+ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_7(port), 0x0); -+ -+ /* get module ID */ -+ mid = SAA716x_EPRD(fgpi_port, FGPI_MODULE_ID); -+ if (mid != 0x14b0100) -+ dprintk(SAA716x_ERROR, 1, "FGPI Id<%04x> is not supported", mid); -+ -+ /* Initialize FGPI block */ -+ SAA716x_EPWR(fgpi_port, FGPI_REC_SIZE, stream_params->samples * (stream_params->bits / 8)); -+ SAA716x_EPWR(fgpi_port, FGPI_STRIDE, stream_params->pitch); -+ -+ offst_1 = 0; -+ offst_2 = 0; -+ switch (stream_params->stream_type) { -+ case FGPI_TRANSPORT_STREAM: -+ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000080); -+ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines); -+ break; -+ -+ case FGPI_PROGRAM_STREAM: -+ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000088); -+ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines); -+ break; -+ -+ case FGPI_VIDEO_STREAM: -+ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000088); -+ SAA716x_EPWR(fgpi_port, FGPI_D1_XY_START, 0x00000002); -+ -+ if ((stream_params->stream_flags & FGPI_INTERLACED) && -+ (stream_params->stream_flags & FGPI_ODD_FIELD) && -+ (stream_params->stream_flags & FGPI_EVEN_FIELD)) { -+ -+ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines / 2); -+ SAA716x_EPWR(fgpi_port, FGPI_STRIDE, 768 * 4); /* interlaced stride of 2 lines */ -+ -+ D1_XY_END = (stream_params->samples << 16); -+ D1_XY_END |= (stream_params->lines / 2) + 2; -+ -+ if (stream_params->stream_flags & FGPI_PAL) -+ offst_1 = 768 * 2; -+ else -+ offst_2 = 768 * 2; -+ -+ } else { -+ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines); -+ SAA716x_EPWR(fgpi_port, FGPI_STRIDE, 768 * 2); /* stride of 1 line */ -+ -+ D1_XY_END = stream_params->samples << 16; -+ D1_XY_END |= stream_params->lines + 2; -+ } -+ -+ SAA716x_EPWR(fgpi_port, FGPI_D1_XY_END, D1_XY_END); -+ break; -+ -+ default: -+ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000080); -+ break; -+ } -+ -+ SAA716x_EPWR(fgpi_port, FGPI_BASE_1, ((saa716x->fgpi[port].dma_channel) << 21) + offst_1); -+ SAA716x_EPWR(fgpi_port, FGPI_BASE_2, ((saa716x->fgpi[port].dma_channel) << 21) + offst_2); -+ -+ return 0; -+} -+ -+int saa716x_fgpi_start(struct saa716x_dev *saa716x, int port, -+ struct fgpi_stream_params *stream_params) -+{ -+ u32 fgpi_port; -+ u32 config; -+ u32 val; -+ u32 i; -+ -+ fgpi_port = fgpi_ch[port]; -+ -+ SAA716x_EPWR(fgpi_port, FGPI_INTERFACE, 0); -+ msleep(10); -+ -+ if (saa716x_fgpi_setparams(saa716x->fgpi[port].dma_buf, stream_params, port) != 0) { -+ return -EIO; -+ } -+ -+ config = mmu_dma_cfg[saa716x->fgpi[port].dma_channel]; /* DMACONFIGx */ -+ -+ val = SAA716x_EPRD(MMU, config); -+ SAA716x_EPWR(MMU, config, val & ~0x40); -+ SAA716x_EPWR(MMU, config, val | 0x40); -+ -+ SAA716x_EPWR(fgpi_port, INT_ENABLE, 0x7F); -+ -+ val = SAA716x_EPRD(MMU, config); -+ i = 0; -+ while (i < 500) { -+ if (val & 0x80) -+ break; -+ msleep(10); -+ val = SAA716x_EPRD(MMU, config); -+ i++; -+ } -+ -+ if (!(val & 0x80)) { -+ dprintk(SAA716x_ERROR, 1, "Error: PTE pre-fetch failed!"); -+ return -EIO; -+ } -+ -+ val = SAA716x_EPRD(fgpi_port, FGPI_CONTROL); -+ val |= 0x3000; -+ -+ saa716x_set_clk_external(saa716x, saa716x->fgpi[port].dma_channel); -+ -+ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, val); -+ -+ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_L, msi_int_tagack[port]); -+ -+ return 0; -+} -+ -+int saa716x_fgpi_stop(struct saa716x_dev *saa716x, int port) -+{ -+ u32 fgpi_port; -+ u32 val; -+ -+ fgpi_port = fgpi_ch[port]; -+ -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_L, msi_int_tagack[port]); -+ -+ val = SAA716x_EPRD(fgpi_port, FGPI_CONTROL); -+ val &= ~0x3000; -+ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, val); -+ -+ saa716x_set_clk_internal(saa716x, saa716x->fgpi[port].dma_channel); -+ -+ return 0; -+} -+ -+int saa716x_fgpi_init(struct saa716x_dev *saa716x, int port, -+ void (*worker)(unsigned long)) -+{ -+ int i; -+ int ret; -+ -+ saa716x->fgpi[port].dma_channel = port + 6; -+ for (i = 0; i < FGPI_BUFFERS; i++) -+ { -+ /* TODO: what is a good size for TS DMA buffer? */ -+ ret = saa716x_dmabuf_alloc(saa716x, &saa716x->fgpi[port].dma_buf[i], 16 * SAA716x_PAGE_SIZE); -+ if (ret < 0) { -+ return ret; -+ } -+ } -+ saa716x->fgpi[port].saa716x = saa716x; -+ tasklet_init(&saa716x->fgpi[port].tasklet, worker, -+ (unsigned long)&saa716x->fgpi[port]); -+ saa716x->fgpi[port].read_index = 0; -+ -+ return 0; -+} -+ -+int saa716x_fgpi_exit(struct saa716x_dev *saa716x, int port) -+{ -+ int i; -+ -+ tasklet_kill(&saa716x->fgpi[port].tasklet); -+ for (i = 0; i < FGPI_BUFFERS; i++) -+ { -+ saa716x_dmabuf_free(saa716x, &saa716x->fgpi[port].dma_buf[i]); -+ } -+ -+ return 0; -+} -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.h 2013-01-16 10:41:10.917798240 +0100 -@@ -0,0 +1,112 @@ -+#ifndef __SAA716x_FGPI_H -+#define __SAA716x_FGPI_H -+ -+#include -+ -+#define FGPI_BUFFERS 8 -+#define PTA_LSB(__mem) ((u32 ) (__mem)) -+#define PTA_MSB(__mem) ((u32 ) ((u64)(__mem) >> 32)) -+ -+#define BAM_DMA_BUF_MODE_BASE 0x0d8 -+#define BAM_DMA_BUF_MODE_OFFSET 0x24 -+ -+#define BAM_DMA_BUF_MODE(__ch) (BAM_DMA_BUF_MODE_BASE + (BAM_DMA_BUF_MODE_OFFSET * __ch)) -+ -+#define BAM_FGPI_ADDR_OFFST_BASE 0x0dc -+#define BAM_FGPI_ADDR_OFFST_OFFSET 0x24 -+ -+#define BAM_FGPI_ADDR_OFFSET(__ch) (BAM_FGPI_ADDR_OFFST_BASE + (BAM_FGPI_ADDR_OFFST_OFFSET * __ch)) -+ -+#define BAM_FGPI_ADDR_OFFST_0(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x00 -+#define BAM_FGPI_ADDR_OFFST_1(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x04 -+#define BAM_FGPI_ADDR_OFFST_2(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x08 -+#define BAM_FGPI_ADDR_OFFST_3(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x0c -+#define BAM_FGPI_ADDR_OFFST_4(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x10 -+#define BAM_FGPI_ADDR_OFFST_5(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x14 -+#define BAM_FGPI_ADDR_OFFST_6(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x18 -+#define BAM_FGPI_ADDR_OFFST_7(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x1c -+ -+struct saa716x_dmabuf; -+ -+/* -+ * Port supported streams -+ * -+ * FGPI_AUDIO_STREAM -+ * FGPI_VIDEO_STREAM -+ * FGPI_VBI_STREAM -+ * FGPI_TRANSPORT_STREAM -+ * FGPI_PROGRAM_STREAM -+ */ -+enum fgpi_stream_type { -+ FGPI_AUDIO_STREAM = 0x01, -+ FGPI_VIDEO_STREAM = 0x02, -+ FGPI_VBI_STREAM = 0x04, -+ FGPI_TRANSPORT_STREAM = 0x08, -+ FGPI_PROGRAM_STREAM = 0x10 -+}; -+ -+/* -+ * Stream port flags -+ * -+ * FGPI_ODD_FIELD -+ * FGPI_EVEN_FIELD -+ * FGPI_HD_0 -+ * FGPI_HD_1 -+ * FGPI_PAL -+ * FGPI_NTSC -+ */ -+enum fgpi_stream_flags { -+ FGPI_ODD_FIELD = 0x0001, -+ FGPI_EVEN_FIELD = 0x0002, -+ FGPI_INTERLACED = 0x0004, -+ FGPI_HD0 = 0x0010, -+ FGPI_HD1 = 0x0020, -+ FGPI_PAL = 0x0040, -+ FGPI_NTSC = 0x0080, -+ FGPI_NO_SCALER = 0x0100, -+}; -+ -+/* -+ * Stream port parameters -+ * bits: Bits per sample -+ * samples: samples perline -+ * lines: number of lines -+ * pitch: stream pitch in bytes -+ * offset: offset to first valid line -+ */ -+struct fgpi_stream_params { -+ u32 bits; -+ u32 samples; -+ u32 lines; -+ -+ s32 pitch; -+ -+ u32 offset; -+ u32 page_tables; -+ -+ enum fgpi_stream_flags stream_flags; -+ enum fgpi_stream_type stream_type; -+}; -+ -+struct saa716x_dmabuf; -+ -+struct saa716x_fgpi_stream_port { -+ u8 dma_channel; -+ struct saa716x_dmabuf dma_buf[FGPI_BUFFERS]; -+ struct saa716x_dev *saa716x; -+ struct tasklet_struct tasklet; -+ u8 read_index; -+}; -+ -+extern void saa716x_fgpiint_disable(struct saa716x_dmabuf *dmabuf, int channel); -+extern int saa716x_fgpi_get_write_index(struct saa716x_dev *saa716x, -+ u32 fgpi_index); -+extern int saa716x_fgpi_start(struct saa716x_dev *saa716x, int port, -+ struct fgpi_stream_params *stream_params); -+extern int saa716x_fgpi_stop(struct saa716x_dev *saa716x, int port); -+ -+extern int saa716x_fgpi_init(struct saa716x_dev *saa716x, int port, -+ void (*worker)(unsigned long)); -+extern int saa716x_fgpi_exit(struct saa716x_dev *saa716x, int port); -+ -+#endif /* __SAA716x_FGPI_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi_reg.h 2013-01-16 10:41:10.918798233 +0100 -@@ -0,0 +1,74 @@ -+#ifndef __SAA716x_FGPI_REG_H -+#define __SAA716x_FGPI_REG_H -+ -+/* -------------- FGPI Registers -------------- */ -+ -+#define FGPI_CONTROL 0x000 -+#define FGPI_CAPTURE_ENABLE_2 (0x00000001 << 13) -+#define FGPI_CAPTURE_ENABLE_1 (0x00000001 << 12) -+#define FGPI_MODE (0x00000001 << 11) -+#define FGPI_SAMPLE_SIZE (0x00000003 << 8) -+#define FGPI_BUF_SYNC_MSG_STOP (0x00000003 << 5) -+#define FGPI_REC_START_MSG_START (0x00000003 << 2) -+#define FGPI_TSTAMP_SELECT (0x00000001 << 1) -+#define FGPI_VAR_LENGTH (0x00000001 << 0) -+ -+#define FGPI_BASE_1 0x004 -+#define FGPI_BASE_2 0x008 -+#define FGPI_SIZE 0x00c -+#define FGPI_REC_SIZE 0x010 -+#define FGPI_STRIDE 0x014 -+#define FGPI_NUM_RECORD_1 0x018 -+#define FGPI_NUM_RECORD_2 0x01c -+#define FGPI_THRESHOLD_1 0x020 -+#define FGPI_THRESHOLD_2 0x024 -+#define FGPI_D1_XY_START 0x028 -+#define FGPI_D1_XY_END 0x02c -+ -+#define INT_STATUS 0xfe0 -+#define FGPI_BUF1_ACTIVE (0x00000001 << 7) -+#define FGPI_OVERFLOW (0x00000001 << 6) -+#define FGPI_MBE (0x00000001 << 5) -+#define FGPI_UNDERRUN (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED (0x00000001 << 2) -+#define FGPI_BUF2_FULL (0x00000001 << 1) -+#define FGPI_BUF1_FULL (0x00000001 << 0) -+ -+#define INT_ENABLE 0xfe4 -+#define FGPI_OVERFLOW_ENA (0x00000001 << 6) -+#define FGPI_MBE_ENA (0x00000001 << 5) -+#define FGPI_UNDERRUN_ENA (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED_ENA (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED_ENA (0x00000001 << 2) -+#define FGPI_BUF2_FULL_ENA (0x00000001 << 1) -+#define FGPI_BUF1_FULL_ENA (0x00000001 << 0) -+ -+#define INT_CLR_STATUS 0xfe8 -+#define FGPI_OVERFLOW_ACK (0x00000001 << 6) -+#define FGPI_MBE_ACK (0x00000001 << 5) -+#define FGPI_UNDERRUN_ACK (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED_ACK (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED_ACK (0x00000001 << 2) -+#define FGPI_BUF2_DONE_ACK (0x00000001 << 1) -+#define FGPI_BUF1_DONE_ACK (0x00000001 << 0) -+ -+#define INT_SET_STATUS 0xfec -+#define FGPI_OVERFLOW_SET (0x00000001 << 6) -+#define FGPI_MBE_SET (0x00000001 << 5) -+#define FGPI_UNDERRUN_SET (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED_SET (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED_SET (0x00000001 << 2) -+#define FGPI_BUF2_DONE_SET (0x00000001 << 1) -+#define FGPI_BUF1_DONE_SET (0x00000001 << 0) -+ -+#define FGPI_SOFT_RESET 0xff0 -+#define FGPI_SOFTWARE_RESET (0x00000001 << 0) -+ -+#define FGPI_INTERFACE 0xff4 -+#define FGPI_DISABLE_BUS_IF (0x00000001 << 0) -+ -+#define FGPI_MOD_ID_EXT 0xff8 -+#define FGPI_MODULE_ID 0xffc -+ -+#endif /* __SAA716x_FGPI_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.c 2013-01-16 10:41:10.918798233 +0100 -@@ -0,0 +1,140 @@ -+#include -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_gpio_reg.h" -+ -+#include "saa716x_gpio.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+void saa716x_gpio_init(struct saa716x_dev *saa716x) -+{ -+ spin_lock_init(&saa716x->gpio_lock); -+} -+EXPORT_SYMBOL_GPL(saa716x_gpio_init); -+ -+int saa716x_get_gpio_mode(struct saa716x_dev *saa716x, u32 *config) -+{ -+ *config = SAA716x_EPRD(GPIO, GPIO_WR_MODE); -+ -+ return 0; -+} -+ -+int saa716x_set_gpio_mode(struct saa716x_dev *saa716x, u32 mask, u32 config) -+{ -+ unsigned long flags; -+ u32 reg; -+ -+ spin_lock_irqsave(&saa716x->gpio_lock, flags); -+ reg = SAA716x_EPRD(GPIO, GPIO_WR_MODE); -+ reg &= ~mask; -+ reg |= (config & mask); -+ SAA716x_EPWR(GPIO, GPIO_WR_MODE, reg); -+ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); -+ -+ return 0; -+} -+ -+u32 saa716x_gpio_rd(struct saa716x_dev *saa716x) -+{ -+ return SAA716x_EPRD(GPIO, GPIO_RD); -+} -+ -+void saa716x_gpio_wr(struct saa716x_dev *saa716x, u32 data) -+{ -+ SAA716x_EPWR(GPIO, GPIO_WR, data); -+} -+ -+void saa716x_gpio_ctl(struct saa716x_dev *saa716x, u32 mask, u32 bits) -+{ -+ unsigned long flags; -+ u32 reg; -+ -+ spin_lock_irqsave(&saa716x->gpio_lock, flags); -+ -+ reg = SAA716x_EPRD(GPIO, GPIO_OEN); -+ reg &= mask; -+ reg |= bits; -+ SAA716x_EPWR(GPIO, GPIO_OEN, reg); -+ -+ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); -+} -+ -+void saa716x_gpio_bits(struct saa716x_dev *saa716x, u32 bits) -+{ -+ unsigned long flags; -+ u32 reg; -+ -+ spin_lock_irqsave(&saa716x->gpio_lock, flags); -+ -+ reg = SAA716x_EPRD(GPIO, GPIO_WR); -+ reg &= ~bits; -+ /* TODO ! add maskable config bits in here */ -+ /* reg |= (config->mask & bits) */ -+ reg |= bits; -+ SAA716x_EPWR(GPIO, GPIO_WR, reg); -+ -+ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); -+} -+ -+void saa716x_gpio_set_output(struct saa716x_dev *saa716x, int gpio) -+{ -+ uint32_t value; -+ -+ value = SAA716x_EPRD(GPIO, GPIO_OEN); -+ value &= ~(1 << gpio); -+ SAA716x_EPWR(GPIO, GPIO_OEN, value); -+} -+EXPORT_SYMBOL_GPL(saa716x_gpio_set_output); -+ -+void saa716x_gpio_set_input(struct saa716x_dev *saa716x, int gpio) -+{ -+ uint32_t value; -+ -+ value = SAA716x_EPRD(GPIO, GPIO_OEN); -+ value |= 1 << gpio; -+ SAA716x_EPWR(GPIO, GPIO_OEN, value); -+} -+EXPORT_SYMBOL_GPL(saa716x_gpio_set_input); -+ -+void saa716x_gpio_set_mode(struct saa716x_dev *saa716x, int gpio, int mode) -+{ -+ uint32_t value; -+ -+ value = SAA716x_EPRD(GPIO, GPIO_WR_MODE); -+ if (mode) -+ value |= 1 << gpio; -+ else -+ value &= ~(1 << gpio); -+ SAA716x_EPWR(GPIO, GPIO_WR_MODE, value); -+} -+EXPORT_SYMBOL_GPL(saa716x_gpio_set_mode); -+ -+void saa716x_gpio_write(struct saa716x_dev *saa716x, int gpio, int set) -+{ -+ uint32_t value; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&saa716x->gpio_lock, flags); -+ value = SAA716x_EPRD(GPIO, GPIO_WR); -+ if (set) -+ value |= 1 << gpio; -+ else -+ value &= ~(1 << gpio); -+ SAA716x_EPWR(GPIO, GPIO_WR, value); -+ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); -+} -+EXPORT_SYMBOL_GPL(saa716x_gpio_write); -+ -+int saa716x_gpio_read(struct saa716x_dev *saa716x, int gpio) -+{ -+ uint32_t value; -+ -+ value = SAA716x_EPRD(GPIO, GPIO_RD); -+ if (value & (1 << gpio)) -+ return 1; -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_gpio_read); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.h 2013-01-16 10:41:10.918798233 +0100 -@@ -0,0 +1,26 @@ -+#ifndef __SAA716x_GPIO_H -+#define __SAA716x_GPIO_H -+ -+#define BOOT_MODE GPIO_31 | GPIO_30 -+#define AV_UNIT_B GPIO_25 -+#define AV_UNIT_A GPIO_24 -+#define AV_INTR_B GPIO_01 -+#define AV_INTR_A GPIO_00 -+ -+struct saa716x_dev; -+ -+extern void saa716x_gpio_init(struct saa716x_dev *saa716x); -+ -+extern u32 saa716x_gpio_rd(struct saa716x_dev *saa716x); -+extern void saa716x_gpio_wr(struct saa716x_dev *saa716x, u32 data); -+extern void saa716x_gpio_ctl(struct saa716x_dev *saa716x, u32 mask, u32 bits); -+ -+extern void saa716x_gpio_bits(struct saa716x_dev *saa716x, u32 bits); -+ -+extern void saa716x_gpio_set_output(struct saa716x_dev *saa716x, int gpio); -+extern void saa716x_gpio_set_input(struct saa716x_dev *saa716x, int gpio); -+extern void saa716x_gpio_set_mode(struct saa716x_dev *saa716x, int gpio, int mode); -+extern void saa716x_gpio_write(struct saa716x_dev *saa716x, int gpio, int set); -+extern int saa716x_gpio_read(struct saa716x_dev *saa716x, int gpio); -+ -+#endif /* __SAA716x_GPIO_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio_reg.h 2013-01-16 10:41:10.919798225 +0100 -@@ -0,0 +1,47 @@ -+#ifndef __SAA716x_GPIO_REG_H -+#define __SAA716x_GPIO_REG_H -+ -+/* -------------- GPIO Registers -------------- */ -+ -+#define GPIO_RD 0x000 -+#define GPIO_WR 0x004 -+#define GPIO_WR_MODE 0x008 -+#define GPIO_OEN 0x00c -+ -+#define GPIO_SW_RST 0xff0 -+#define GPIO_SW_RESET (0x00000001 << 0) -+ -+#define GPIO_31 (1 << 31) -+#define GPIO_30 (1 << 30) -+#define GPIO_29 (1 << 29) -+#define GPIO_28 (1 << 28) -+#define GPIO_27 (1 << 27) -+#define GPIO_26 (1 << 26) -+#define GPIO_25 (1 << 25) -+#define GPIO_24 (1 << 24) -+#define GPIO_23 (1 << 23) -+#define GPIO_22 (1 << 22) -+#define GPIO_21 (1 << 21) -+#define GPIO_20 (1 << 20) -+#define GPIO_19 (1 << 19) -+#define GPIO_18 (1 << 18) -+#define GPIO_17 (1 << 17) -+#define GPIO_16 (1 << 16) -+#define GPIO_15 (1 << 15) -+#define GPIO_14 (1 << 14) -+#define GPIO_13 (1 << 13) -+#define GPIO_12 (1 << 12) -+#define GPIO_11 (1 << 11) -+#define GPIO_10 (1 << 10) -+#define GPIO_09 (1 << 9) -+#define GPIO_08 (1 << 8) -+#define GPIO_07 (1 << 7) -+#define GPIO_06 (1 << 6) -+#define GPIO_05 (1 << 5) -+#define GPIO_04 (1 << 4) -+#define GPIO_03 (1 << 3) -+#define GPIO_02 (1 << 2) -+#define GPIO_01 (1 << 1) -+#define GPIO_00 (1 << 0) -+ -+#endif /* __SAA716x_GPIO_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.c 2013-01-16 10:41:10.919798225 +0100 -@@ -0,0 +1,42 @@ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_greg_reg.h" -+#include "saa716x_greg.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+static u32 g_save[12]; -+ -+void saa716x_greg_save(struct saa716x_dev *saa716x) -+{ -+ g_save[0] = SAA716x_EPRD(GREG, GREG_SUBSYS_CONFIG); -+ g_save[1] = SAA716x_EPRD(GREG, GREG_MSI_BAR_PMCSR); -+ g_save[2] = SAA716x_EPRD(GREG, GREG_PMCSR_DATA_1); -+ g_save[3] = SAA716x_EPRD(GREG, GREG_PMCSR_DATA_2); -+ g_save[4] = SAA716x_EPRD(GREG, GREG_VI_CTRL); -+ g_save[5] = SAA716x_EPRD(GREG, GREG_FGPI_CTRL); -+ g_save[6] = SAA716x_EPRD(GREG, GREG_RSTU_CTRL); -+ g_save[7] = SAA716x_EPRD(GREG, GREG_I2C_CTRL); -+ g_save[8] = SAA716x_EPRD(GREG, GREG_OVFLW_CTRL); -+ g_save[9] = SAA716x_EPRD(GREG, GREG_TAG_ACK_FLEN); -+ -+ g_save[10] = SAA716x_EPRD(GREG, GREG_VIDEO_IN_CTRL); -+} -+ -+void saa716x_greg_restore(struct saa716x_dev *saa716x) -+{ -+ SAA716x_EPWR(GREG, GREG_SUBSYS_CONFIG, g_save[0]); -+ SAA716x_EPWR(GREG, GREG_MSI_BAR_PMCSR, g_save[1]); -+ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_1, g_save[2]); -+ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_2, g_save[3]); -+ SAA716x_EPWR(GREG, GREG_VI_CTRL, g_save[4]); -+ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, g_save[5]); -+ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, g_save[6]); -+ SAA716x_EPWR(GREG, GREG_I2C_CTRL, g_save[7]); -+ SAA716x_EPWR(GREG, GREG_OVFLW_CTRL, g_save[8]); -+ SAA716x_EPWR(GREG, GREG_TAG_ACK_FLEN, g_save[9]); -+ -+ SAA716x_EPWR(GREG, GREG_VIDEO_IN_CTRL, g_save[10]); -+} -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.h 2013-01-16 10:41:10.919798225 +0100 -@@ -0,0 +1,9 @@ -+#ifndef __SAA716x_GREG_H -+#define __SAA716x_GREG_H -+ -+struct saa716x_dev; -+ -+extern void saa716x_greg_save(struct saa716x_dev *saa716x); -+extern void saa716x_greg_restore(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_GREG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_greg_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_greg_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg_reg.h 2013-01-16 10:41:10.919798225 +0100 -@@ -0,0 +1,91 @@ -+#ifndef __SAA716x_GREG_REG_H -+#define __SAA716x_GREG_REG_H -+ -+/* -------------- GREG Registers -------------- */ -+ -+#define GREG_SUBSYS_CONFIG 0x000 -+#define GREG_SUBSYS_ID (0x0000ffff << 16) -+#define GREG_SUBSYS_VID (0x0000ffff << 0) -+ -+#define GREG_MSI_BAR_PMCSR 0x004 -+#define GREG_PMCSR_SCALE_7 (0x00000003 << 30) -+#define GREG_PMCSR_SCALE_6 (0x00000003 << 28) -+#define GREG_PMCSR_SCALE_5 (0x00000003 << 26) -+#define GREG_PMCSR_SCALE_4 (0x00000003 << 24) -+#define GREG_PMCSR_SCALE_3 (0x00000003 << 22) -+#define GREG_PMCSR_SCALE_2 (0x00000003 << 20) -+#define GREG_PMCSR_SCALE_1 (0x00000003 << 18) -+#define GREG_PMCSR_SCALE_0 (0x00000003 << 16) -+ -+#define GREG_BAR_WIDTH_17 (0x0000001e << 8) -+#define GREG_BAR_WIDTH_18 (0x0000001c << 8) -+#define GREG_BAR_WIDTH_19 (0x00000018 << 8) -+#define GREG_BAR_WIDTH_20 (0x00000010 << 8) -+ -+#define GREG_BAR_PREFETCH (0x00000001 << 3) -+#define GREG_MSI_MM_CAP1 (0x00000000 << 0) // FIXME ! -+#define GREG_MSI_MM_CAP2 (0x00000001 << 0) -+#define GREG_MSI_MM_CAP4 (0x00000002 << 0) -+#define GREG_MSI_MM_CAP8 (0x00000003 << 0) -+#define GREG_MSI_MM_CAP16 (0x00000004 << 0) -+#define GREG_MSI_MM_CAP32 (0x00000005 << 0) -+ -+#define GREG_PMCSR_DATA_1 0x008 -+#define GREG_PMCSR_DATA_2 0x00c -+#define GREG_VI_CTRL 0x010 -+#define GREG_FGPI_CTRL 0x014 -+ -+#define GREG_RSTU_CTRL 0x018 -+#define GREG_BOOT_READY (0x00000001 << 13) -+#define GREG_RESET_REQ (0x00000001 << 12) -+#define GREG_IP_RST_RELEASE (0x00000001 << 11) -+#define GREG_ADAPTER_RST_RELEASE (0x00000001 << 10) -+#define GREG_PCIE_CORE_RST_RELEASE (0x00000001 << 9) -+#define GREG_BOOT_IP_RST_RELEASE (0x00000001 << 8) -+#define GREG_BOOT_RST_RELEASE (0x00000001 << 7) -+#define GREG_CGU_RST_RELEASE (0x00000001 << 6) -+#define GREG_IP_RST_ASSERT (0x00000001 << 5) -+#define GREG_ADAPTER_RST_ASSERT (0x00000001 << 4) -+#define GREG_RST_ASSERT (0x00000001 << 3) -+#define GREG_BOOT_IP_RST_ASSERT (0x00000001 << 2) -+#define GREG_BOOT_RST_ASSERT (0x00000001 << 1) -+#define GREG_CGU_RST_ASSERT (0x00000001 << 0) -+ -+#define GREG_I2C_CTRL 0x01c -+#define GREG_I2C_SLAVE_ADDR (0x0000007f << 0) -+ -+#define GREG_OVFLW_CTRL 0x020 -+#define GREG_OVERFLOW_ENABLE (0x00001fff << 0) -+ -+#define GREG_TAG_ACK_FLEN 0x024 -+#define GREG_TAG_ACK_FLEN_1B (0x00000000 << 0) -+#define GREG_TAG_ACK_FLEN_2B (0x00000001 << 0) -+#define GREG_TAG_ACK_FLEN_4B (0x00000002 << 0) -+#define GREG_TAG_ACK_FLEN_8B (0x00000003 << 0) -+ -+#define GREG_VIDEO_IN_CTRL 0x028 -+ -+#define GREG_SPARE_1 0x02c -+#define GREG_SPARE_2 0x030 -+#define GREG_SPARE_3 0x034 -+#define GREG_SPARE_4 0x038 -+#define GREG_SPARE_5 0x03c -+#define GREG_SPARE_6 0x040 -+#define GREG_SPARE_7 0x044 -+#define GREG_SPARE_8 0x048 -+#define GREG_SPARE_9 0x04c -+#define GREG_SPARE_10 0x050 -+#define GREG_SPARE_11 0x054 -+#define GREG_SPARE_12 0x058 -+#define GREG_SPARE_13 0x05c -+#define GREG_SPARE_14 0x060 -+#define GREG_SPARE_15 0x064 -+ -+#define GREG_FAIL_DISABLE 0x068 -+#define GREG_BOOT_FAIL_DISABLE (0x00000001 << 0) -+ -+#define GREG_SW_RST 0xff0 -+#define GREG_SW_RESET (0x00000001 << 0) -+ -+ -+#endif /* __SAA716x_GREG_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.c 2013-01-16 10:41:10.920798217 +0100 -@@ -0,0 +1,726 @@ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_gpio_reg.h" -+#include "saa716x_greg_reg.h" -+#include "saa716x_msi_reg.h" -+ -+#include "saa716x_adap.h" -+#include "saa716x_i2c.h" -+#include "saa716x_msi.h" -+#include "saa716x_hybrid.h" -+#include "saa716x_gpio.h" -+#include "saa716x_rom.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+#include "zl10353.h" -+#include "mb86a16.h" -+#include "tda1004x.h" -+#include "tda827x.h" -+ -+unsigned int verbose; -+module_param(verbose, int, 0644); -+MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); -+ -+unsigned int int_type; -+module_param(int_type, int, 0644); -+MODULE_PARM_DESC(int_type, "force Interrupt Handler type: 0=INT-A, 1=MSI, 2=MSI-X. default INT-A mode"); -+ -+#define DRIVER_NAME "SAA716x Hybrid" -+ -+static int __devinit saa716x_hybrid_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) -+{ -+ struct saa716x_dev *saa716x; -+ int err = 0; -+ -+ saa716x = kzalloc(sizeof (struct saa716x_dev), GFP_KERNEL); -+ if (saa716x == NULL) { -+ printk(KERN_ERR "saa716x_hybrid_pci_probe ERROR: out of memory\n"); -+ err = -ENOMEM; -+ goto fail0; -+ } -+ -+ saa716x->verbose = verbose; -+ saa716x->int_type = int_type; -+ saa716x->pdev = pdev; -+ saa716x->config = (struct saa716x_config *) pci_id->driver_data; -+ -+ err = saa716x_pci_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x PCI Initialization failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_cgu_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x CGU Init failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_core_boot(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x Core Boot failed"); -+ goto fail2; -+ } -+ dprintk(SAA716x_DEBUG, 1, "SAA716x Core Boot Success"); -+ -+ err = saa716x_msi_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x MSI Init failed"); -+ goto fail2; -+ } -+ -+ err = saa716x_jetpack_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x Jetpack core Initialization failed"); -+ goto fail1; -+ } -+ -+ err = saa716x_i2c_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x I2C Initialization failed"); -+ goto fail3; -+ } -+ -+ saa716x_gpio_init(saa716x); -+ -+ err = saa716x_dump_eeprom(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); -+ } -+ -+ err = saa716x_eeprom_data(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); -+ } -+ -+ /* enable decoders on 7162 */ -+ if (pdev->device == SAA7162) { -+ saa716x_gpio_set_output(saa716x, 24); -+ saa716x_gpio_set_output(saa716x, 25); -+ -+ saa716x_gpio_write(saa716x, 24, 0); -+ saa716x_gpio_write(saa716x, 25, 0); -+ -+ msleep(10); -+ -+ saa716x_gpio_write(saa716x, 24, 1); -+ saa716x_gpio_write(saa716x, 25, 1); -+ } -+ -+ /* set default port mapping */ -+ SAA716x_EPWR(GREG, GREG_VI_CTRL, 0x2C688F44); -+ /* enable FGPI3 and FGPI0 for TS input from Port 3 and 6 */ -+ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, 0x894); -+ -+ err = saa716x_dvb_init(saa716x); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x DVB initialization failed"); -+ goto fail4; -+ } -+ -+ return 0; -+ -+fail4: -+ saa716x_dvb_exit(saa716x); -+fail3: -+ saa716x_i2c_exit(saa716x); -+fail2: -+ saa716x_pci_exit(saa716x); -+fail1: -+ kfree(saa716x); -+fail0: -+ return err; -+} -+ -+static void __devexit saa716x_hybrid_pci_remove(struct pci_dev *pdev) -+{ -+ struct saa716x_dev *saa716x = pci_get_drvdata(pdev); -+ -+ saa716x_dvb_exit(saa716x); -+ saa716x_i2c_exit(saa716x); -+ saa716x_pci_exit(saa716x); -+ kfree(saa716x); -+} -+ -+static irqreturn_t saa716x_hybrid_pci_irq(int irq, void *dev_id) -+{ -+ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; -+ -+ u32 stat_h, stat_l, mask_h, mask_l; -+ -+ if (unlikely(saa716x == NULL)) { -+ printk("%s: saa716x=NULL", __func__); -+ return IRQ_NONE; -+ } -+ -+ stat_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); -+ stat_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); -+ mask_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); -+ mask_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); -+ -+ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", -+ stat_l, stat_h, mask_l, mask_h); -+ -+ if (!((stat_l & mask_l) || (stat_h & mask_h))) -+ return IRQ_NONE; -+ -+ if (stat_l) -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, stat_l); -+ -+ if (stat_h) -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, stat_h); -+ -+ saa716x_msi_event(saa716x, stat_l, stat_h); -+#if 0 -+ dprintk(SAA716x_DEBUG, 1, "VI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", -+ SAA716x_EPRD(VI0, INT_STATUS), -+ SAA716x_EPRD(VI1, INT_STATUS), -+ SAA716x_EPRD(VI0, INT_ENABLE), -+ SAA716x_EPRD(VI1, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", -+ SAA716x_EPRD(FGPI0, INT_STATUS), -+ SAA716x_EPRD(FGPI1, INT_STATUS), -+ SAA716x_EPRD(FGPI0, INT_ENABLE), -+ SAA716x_EPRD(FGPI0, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 2=<%02x> 3=<%02x>, CTL 2=<%02x> 3=<%02x>", -+ SAA716x_EPRD(FGPI2, INT_STATUS), -+ SAA716x_EPRD(FGPI3, INT_STATUS), -+ SAA716x_EPRD(FGPI2, INT_ENABLE), -+ SAA716x_EPRD(FGPI3, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "AI STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(AI0, AI_STATUS), -+ SAA716x_EPRD(AI1, AI_STATUS), -+ SAA716x_EPRD(AI0, AI_CTL), -+ SAA716x_EPRD(AI1, AI_CTL)); -+ -+ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(I2C_A, INT_STATUS), -+ SAA716x_EPRD(I2C_B, INT_STATUS), -+ SAA716x_EPRD(I2C_A, INT_ENABLE), -+ SAA716x_EPRD(I2C_B, INT_ENABLE)); -+ -+ dprintk(SAA716x_DEBUG, 1, "DCS STAT=<%02x>, CTL=<%02x>", -+ SAA716x_EPRD(DCS, DCSC_INT_STATUS), -+ SAA716x_EPRD(DCS, DCSC_INT_ENABLE)); -+#endif -+ -+ if (stat_l) { -+ if (stat_l & MSI_INT_TAGACK_FGPI_0) { -+ tasklet_schedule(&saa716x->fgpi[0].tasklet); -+ } -+ if (stat_l & MSI_INT_TAGACK_FGPI_1) { -+ tasklet_schedule(&saa716x->fgpi[1].tasklet); -+ } -+ if (stat_l & MSI_INT_TAGACK_FGPI_2) { -+ tasklet_schedule(&saa716x->fgpi[2].tasklet); -+ } -+ if (stat_l & MSI_INT_TAGACK_FGPI_3) { -+ tasklet_schedule(&saa716x->fgpi[3].tasklet); -+ } -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static void demux_worker(unsigned long data) -+{ -+ struct saa716x_fgpi_stream_port *fgpi_entry = (struct saa716x_fgpi_stream_port *)data; -+ struct saa716x_dev *saa716x = fgpi_entry->saa716x; -+ struct dvb_demux *demux; -+ u32 fgpi_index; -+ u32 i; -+ u32 write_index; -+ -+ fgpi_index = fgpi_entry->dma_channel - 6; -+ demux = NULL; -+ for (i = 0; i < saa716x->config->adapters; i++) { -+ if (saa716x->config->adap_config[i].ts_port == fgpi_index) { -+ demux = &saa716x->saa716x_adap[i].demux; -+ break; -+ } -+ } -+ if (demux == NULL) { -+ printk(KERN_ERR "%s: unexpected channel %u\n", -+ __func__, fgpi_entry->dma_channel); -+ return; -+ } -+ -+ write_index = saa716x_fgpi_get_write_index(saa716x, fgpi_index); -+ if (write_index < 0) -+ return; -+ -+ dprintk(SAA716x_DEBUG, 1, "dma buffer = %d", write_index); -+ -+ if (write_index == fgpi_entry->read_index) { -+ printk(KERN_DEBUG "%s: called but nothing to do\n", __func__); -+ return; -+ } -+ -+ do { -+ u8 *data = (u8 *)fgpi_entry->dma_buf[fgpi_entry->read_index].mem_virt; -+ -+ pci_dma_sync_sg_for_cpu(saa716x->pdev, -+ fgpi_entry->dma_buf[fgpi_entry->read_index].sg_list, -+ fgpi_entry->dma_buf[fgpi_entry->read_index].list_len, -+ PCI_DMA_FROMDEVICE); -+ -+ dvb_dmx_swfilter(demux, data, 348 * 188); -+ -+ fgpi_entry->read_index = (fgpi_entry->read_index + 1) & 7; -+ } while (write_index != fgpi_entry->read_index); -+} -+ -+/* -+ * Twinhan/Azurewave VP-6090 -+ * DVB-S Frontend: 2x MB86A16 -+ * DVB-T Frontend: 2x TDA10046 + TDA8275 -+ */ -+#define SAA716x_MODEL_TWINHAN_VP6090 "Twinhan/Azurewave VP-6090" -+#define SAA716x_DEV_TWINHAN_VP6090 "2xDVB-S + 2xDVB-T + 2xAnalog" -+ -+static int tda1004x_vp6090_request_firmware(struct dvb_frontend *fe, -+ const struct firmware **fw, -+ char *name) -+{ -+ struct saa716x_adapter *adapter = fe->dvb->priv; -+ -+ return request_firmware(fw, name, &adapter->saa716x->pdev->dev); -+} -+ -+static struct tda1004x_config tda1004x_vp6090_config = { -+ .demod_address = 0x8, -+ .invert = 0, -+ .invert_oclk = 0, -+ .xtal_freq = TDA10046_XTAL_4M, -+ .agc_config = TDA10046_AGC_DEFAULT, -+ .if_freq = TDA10046_FREQ_3617, -+ .request_firmware = tda1004x_vp6090_request_firmware, -+}; -+ -+static int vp6090_dvbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct saa716x_dev *saa716x = fe->dvb->priv; -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ dprintk(SAA716x_ERROR, 1, "Polarization=[13V]"); -+ break; -+ case SEC_VOLTAGE_18: -+ dprintk(SAA716x_ERROR, 1, "Polarization=[18V]"); -+ break; -+ case SEC_VOLTAGE_OFF: -+ dprintk(SAA716x_ERROR, 1, "Frontend (dummy) POWERDOWN"); -+ break; -+ default: -+ dprintk(SAA716x_ERROR, 1, "Invalid = (%d)", (u32 ) voltage); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+struct mb86a16_config vp6090_mb86a16_config = { -+ .demod_address = 0x08, -+ .set_voltage = vp6090_dvbs_set_voltage, -+}; -+ -+static int saa716x_vp6090_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *i2c = &saa716x->i2c[count]; -+ -+ dprintk(SAA716x_ERROR, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+ dprintk(SAA716x_ERROR, 1, "Adapter (%d) Power ON", count); -+ -+ saa716x_gpio_set_output(saa716x, 11); -+ saa716x_gpio_set_output(saa716x, 10); -+ saa716x_gpio_write(saa716x, 11, 1); -+ saa716x_gpio_write(saa716x, 10, 1); -+ msleep(100); -+#if 0 -+ dprintk(SAA716x_ERROR, 1, "Probing for MB86A16 (DVB-S/DSS)"); -+ adapter->fe = mb86a16_attach(&vp6090_mb86a16_config, &i2c->i2c_adapter); -+ if (adapter->fe) { -+ dprintk(SAA716x_ERROR, 1, "found MB86A16 DVB-S/DSS frontend @0x%02x", -+ vp6090_mb86a16_config.demod_address); -+ -+ } else { -+ goto exit; -+ } -+#endif -+ adapter->fe = tda10046_attach(&tda1004x_vp6090_config, &i2c->i2c_adapter); -+ if (adapter->fe == NULL) { -+ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); -+ return -ENODEV; -+ } else { -+ dprintk(SAA716x_ERROR, 1, "Done!"); -+ return 0; -+ } -+ -+ return 0; -+} -+ -+static struct saa716x_config saa716x_vp6090_config = { -+ .model_name = SAA716x_MODEL_TWINHAN_VP6090, -+ .dev_type = SAA716x_DEV_TWINHAN_VP6090, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_vp6090_frontend_attach, -+ .irq_handler = saa716x_hybrid_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+/* -+ * NXP Reference design (Atlantis) -+ * 2x DVB-T Frontend: 2x TDA10046 -+ * Analog Decoder: 2x Internal -+ */ -+#define SAA716x_MODEL_NXP_ATLANTIS "Atlantis reference board" -+#define SAA716x_DEV_NXP_ATLANTIS "2x DVB-T + 2x Analog" -+ -+static int tda1004x_atlantis_request_firmware(struct dvb_frontend *fe, -+ const struct firmware **fw, -+ char *name) -+{ -+ struct saa716x_adapter *adapter = fe->dvb->priv; -+ -+ return request_firmware(fw, name, &adapter->saa716x->pdev->dev); -+} -+ -+static struct tda1004x_config tda1004x_atlantis_config = { -+ .demod_address = 0x8, -+ .invert = 0, -+ .invert_oclk = 0, -+ .xtal_freq = TDA10046_XTAL_16M, -+ .agc_config = TDA10046_AGC_TDA827X, -+ .if_freq = TDA10046_FREQ_045, -+ .request_firmware = tda1004x_atlantis_request_firmware, -+ .tuner_address = 0x60, -+}; -+ -+static struct tda827x_config tda827x_atlantis_config = { -+ .init = NULL, -+ .sleep = NULL, -+ .config = 0, -+ .switch_addr = 0, -+ .agcf = NULL, -+}; -+ -+static int saa716x_atlantis_frontend_attach(struct saa716x_adapter *adapter, -+ int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *i2c; -+ u8 i2c_buf[3] = { 0x05, 0x23, 0x01 }; /* activate the silent I2C bus */ -+ struct i2c_msg msg = { -+ .addr = 0x42 >> 1, -+ .flags = 0, -+ .buf = i2c_buf, -+ .len = sizeof(i2c_buf) -+ }; -+ -+ if (count < saa716x->config->adapters) { -+ u32 reset_gpio; -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", -+ count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, -+ saa716x->pdev->subsystem_device); -+ -+ if (count == 0) { -+ reset_gpio = 14; -+ i2c = &saa716x->i2c[SAA716x_I2C_BUS_A]; -+ } else { -+ reset_gpio = 15; -+ i2c = &saa716x->i2c[SAA716x_I2C_BUS_B]; -+ } -+ -+ /* activate the silent I2C bus */ -+ i2c_transfer(&i2c->i2c_adapter, &msg, 1); -+ -+ saa716x_gpio_set_output(saa716x, reset_gpio); -+ -+ /* Reset the demodulator */ -+ saa716x_gpio_write(saa716x, reset_gpio, 1); -+ msleep(10); -+ saa716x_gpio_write(saa716x, reset_gpio, 0); -+ msleep(10); -+ saa716x_gpio_write(saa716x, reset_gpio, 1); -+ msleep(10); -+ -+ adapter->fe = tda10046_attach(&tda1004x_atlantis_config, -+ &i2c->i2c_adapter); -+ if (adapter->fe == NULL) -+ goto exit; -+ -+ dprintk(SAA716x_ERROR, 1, -+ "found TDA10046 DVB-T frontend @0x%02x", -+ tda1004x_atlantis_config.demod_address); -+ -+ if (dvb_attach(tda827x_attach, adapter->fe, -+ tda1004x_atlantis_config.tuner_address, -+ &i2c->i2c_adapter, &tda827x_atlantis_config)) { -+ dprintk(SAA716x_ERROR, 1, "found TDA8275 tuner @0x%02x", -+ tda1004x_atlantis_config.tuner_address); -+ } else { -+ goto exit; -+ } -+ -+ dprintk(SAA716x_ERROR, 1, "Done!"); -+ return 0; -+ } -+ -+exit: -+ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_atlantis_config = { -+ .model_name = SAA716x_MODEL_NXP_ATLANTIS, -+ .dev_type = SAA716x_DEV_NXP_ATLANTIS, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 2, -+ .frontend_attach = saa716x_atlantis_frontend_attach, -+ .irq_handler = saa716x_hybrid_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+ .adap_config = { -+ { -+ /* Adapter 0 */ -+ .ts_port = 3, /* using FGPI 3 */ -+ .worker = demux_worker -+ }, -+ { -+ /* Adapter 1 */ -+ .ts_port = 0, /* using FGPI 0 */ -+ .worker = demux_worker -+ } -+ } -+}; -+ -+/* -+ * NXP Reference design (NEMO) -+ * DVB-T Frontend: 1x TDA10046 + TDA8275 -+ * Analog Decoder: External SAA7136 -+ */ -+#define SAA716x_MODEL_NXP_NEMO "NEMO reference board" -+#define SAA716x_DEV_NXP_NEMO "DVB-T + Analog" -+ -+static int tda1004x_nemo_request_firmware(struct dvb_frontend *fe, -+ const struct firmware **fw, -+ char *name) -+{ -+ struct saa716x_adapter *adapter = fe->dvb->priv; -+ -+ return request_firmware(fw, name, &adapter->saa716x->pdev->dev); -+} -+ -+static struct tda1004x_config tda1004x_nemo_config = { -+ .demod_address = 0x8, -+ .invert = 0, -+ .invert_oclk = 0, -+ .xtal_freq = TDA10046_XTAL_16M, -+ .agc_config = TDA10046_AGC_TDA827X, -+ .if_freq = TDA10046_FREQ_045, -+ .request_firmware = tda1004x_nemo_request_firmware, -+ .tuner_address = 0x60, -+}; -+ -+static struct tda827x_config tda827x_nemo_config = { -+ .init = NULL, -+ .sleep = NULL, -+ .config = 0, -+ .switch_addr = 0, -+ .agcf = NULL, -+}; -+ -+static int saa716x_nemo_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ struct saa716x_i2c *demod_i2c = &saa716x->i2c[SAA716x_I2C_BUS_B]; -+ struct saa716x_i2c *tuner_i2c = &saa716x->i2c[SAA716x_I2C_BUS_A]; -+ -+ -+ if (count == 0) { -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ dprintk(SAA716x_ERROR, 1, "Adapter (%d) Power ON", count); -+ -+ /* GPIO 26 controls a +15dB gain */ -+ saa716x_gpio_set_output(saa716x, 26); -+ saa716x_gpio_write(saa716x, 26, 0); -+ -+ saa716x_gpio_set_output(saa716x, 14); -+ -+ /* Reset the demodulator */ -+ saa716x_gpio_write(saa716x, 14, 1); -+ msleep(10); -+ saa716x_gpio_write(saa716x, 14, 0); -+ msleep(10); -+ saa716x_gpio_write(saa716x, 14, 1); -+ msleep(10); -+ -+ adapter->fe = tda10046_attach(&tda1004x_nemo_config, -+ &demod_i2c->i2c_adapter); -+ if (adapter->fe) { -+ dprintk(SAA716x_ERROR, 1, "found TDA10046 DVB-T frontend @0x%02x", -+ tda1004x_nemo_config.demod_address); -+ -+ } else { -+ goto exit; -+ } -+ if (dvb_attach(tda827x_attach, adapter->fe, -+ tda1004x_nemo_config.tuner_address, -+ &tuner_i2c->i2c_adapter, &tda827x_nemo_config)) { -+ dprintk(SAA716x_ERROR, 1, "found TDA8275 tuner @0x%02x", -+ tda1004x_nemo_config.tuner_address); -+ } else { -+ goto exit; -+ } -+ dprintk(SAA716x_ERROR, 1, "Done!"); -+ } -+ -+ return 0; -+exit: -+ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_nemo_config = { -+ .model_name = SAA716x_MODEL_NXP_NEMO, -+ .dev_type = SAA716x_DEV_NXP_NEMO, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_nemo_frontend_attach, -+ .irq_handler = saa716x_hybrid_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+ -+ .adap_config = { -+ { -+ /* Adapter 0 */ -+ .ts_port = 3, /* using FGPI 3 */ -+ .worker = demux_worker -+ } -+ } -+}; -+ -+ -+#define SAA716x_MODEL_AVERMEDIA_HC82 "Avermedia HC82 Express-54" -+#define SAA716x_DEV_AVERMEDIA_HC82 "DVB-T + Analog" -+ -+#if 0 -+static struct zl10353_config saa716x_averhc82_zl10353_config = { -+ .demod_address = 0x1f, -+ .adc_clock = 450560, -+ .if2 = 361667, -+ .no_tuner = 1, -+ .parallel_ts = 1, -+}; -+#endif -+ -+static int saa716x_averhc82_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+// adapter->fe = zl10353_attach(&saa716x_averhc82_zl10353_config, &i2c->i2c_adapter); -+ -+ -+ return 0; -+} -+ -+static struct saa716x_config saa716x_averhc82_config = { -+ .model_name = SAA716x_MODEL_AVERMEDIA_HC82, -+ .dev_type = SAA716x_DEV_AVERMEDIA_HC82, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_averhc82_frontend_attach, -+ .irq_handler = saa716x_hybrid_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+#define SAA716x_MODEL_AVERMEDIA_H788 "Avermedia H788" -+#define SAA716x_DEV_AVERMEDIA_H788 "DVB-T + Analaog" -+ -+static int saa716x_averh88_frontend_attach(struct saa716x_adapter *adapter, int count) -+{ -+ struct saa716x_dev *saa716x = adapter->saa716x; -+ -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); -+ -+ return -ENODEV; -+} -+ -+static struct saa716x_config saa716x_averh788_config = { -+ .model_name = SAA716x_MODEL_AVERMEDIA_H788, -+ .dev_type = SAA716x_DEV_AVERMEDIA_H788, -+ .boot_mode = SAA716x_EXT_BOOT, -+ .adapters = 1, -+ .frontend_attach = saa716x_averh88_frontend_attach, -+ .irq_handler = saa716x_hybrid_pci_irq, -+ .i2c_rate = SAA716x_I2C_RATE_100, -+}; -+ -+static struct pci_device_id saa716x_hybrid_pci_table[] = { -+ -+ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_6090, SAA7162, &saa716x_vp6090_config), -+ MAKE_ENTRY(AVERMEDIA, AVERMEDIA_HC82, SAA7160, &saa716x_averhc82_config), -+ MAKE_ENTRY(AVERMEDIA, AVERMEDIA_H788, SAA7160, &saa716x_averh788_config), -+ MAKE_ENTRY(KWORLD, KWORLD_DVB_T_PE310, SAA7162, &saa716x_atlantis_config), -+ MAKE_ENTRY(NXP_REFERENCE_BOARD, PCI_ANY_ID, SAA7162, &saa716x_atlantis_config), -+ MAKE_ENTRY(NXP_REFERENCE_BOARD, PCI_ANY_ID, SAA7160, &saa716x_nemo_config), -+ { } -+}; -+MODULE_DEVICE_TABLE(pci, saa716x_hybrid_pci_table); -+ -+static struct pci_driver saa716x_hybrid_pci_driver = { -+ .name = DRIVER_NAME, -+ .id_table = saa716x_hybrid_pci_table, -+ .probe = saa716x_hybrid_pci_probe, -+ .remove = saa716x_hybrid_pci_remove, -+}; -+ -+static int __devinit saa716x_hybrid_init(void) -+{ -+ return pci_register_driver(&saa716x_hybrid_pci_driver); -+} -+ -+static void __devexit saa716x_hybrid_exit(void) -+{ -+ return pci_unregister_driver(&saa716x_hybrid_pci_driver); -+} -+ -+module_init(saa716x_hybrid_init); -+module_exit(saa716x_hybrid_exit); -+ -+MODULE_DESCRIPTION("SAA716x Hybrid driver"); -+MODULE_AUTHOR("Manu Abraham"); -+MODULE_LICENSE("GPL"); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.h 2013-01-16 10:41:10.920798217 +0100 -@@ -0,0 +1,13 @@ -+#ifndef __SAA716x_HYBRID_H -+#define __SAA716x_HYBRID_H -+ -+#define TWINHAN_TECHNOLOGIES 0x1822 -+#define AVERMEDIA 0x1461 -+#define KWORLD 0x17DE -+ -+#define TWINHAN_VP_6090 0x0027 -+#define AVERMEDIA_HC82 0x2355 -+#define AVERMEDIA_H788 0x1455 -+#define KWORLD_DVB_T_PE310 0x7521 -+ -+#endif /* __SAA716x_HYBRID_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.c 2013-01-16 10:41:10.921798210 +0100 -@@ -0,0 +1,738 @@ -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_i2c_reg.h" -+#include "saa716x_msi_reg.h" -+#include "saa716x_cgu_reg.h" -+ -+#include "saa716x_i2c.h" -+#include "saa716x_msi.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+#define SAA716x_I2C_TXFAIL (I2C_ERROR_IBE | \ -+ I2C_ACK_INTER_MTNA | \ -+ I2C_FAILURE_INTER_MAF) -+ -+#define SAA716x_I2C_TXBUSY (I2C_TRANSMIT | \ -+ I2C_TRANSMIT_PROG) -+ -+#define SAA716x_I2C_RXBUSY (I2C_RECEIVE | \ -+ I2C_RECEIVE_CLEAR) -+ -+static const char* state[] = { -+ "Idle", -+ "DoneStop", -+ "Busy", -+ "TOscl", -+ "TOarb", -+ "DoneWrite", -+ "DoneRead", -+ "DoneWriteTO", -+ "DoneReadTO", -+ "NoDevice", -+ "NoACK", -+ "BUSErr", -+ "ArbLost", -+ "SEQErr", -+ "STErr" -+}; -+ -+int saa716x_i2c_irqevent(struct saa716x_dev *saa716x, u8 bus) -+{ -+ u32 stat, mask; -+ u32 *I2C_DEV; -+ -+ BUG_ON(saa716x == NULL); -+ I2C_DEV = saa716x->I2C_DEV; -+ -+ stat = SAA716x_EPRD(I2C_DEV[bus], INT_STATUS); -+ mask = SAA716x_EPRD(I2C_DEV[bus], INT_ENABLE); -+ saa716x->i2c[bus].i2c_stat = stat; -+ dprintk(SAA716x_DEBUG, 0, "Bus(%d) I2C event: Status=<%s> --> Stat=<%02x> Mask=<%02x>", -+ bus, state[stat], stat, mask); -+ -+ if (!(stat & mask)) -+ return -1; -+ -+ SAA716x_EPWR(I2C_DEV[bus], INT_CLR_STATUS, stat); -+ -+ if (stat & I2C_INTERRUPT_STFNF) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_INTERRUPT_MTFNF) { -+ dprintk(SAA716x_DEBUG, 0, " "); -+ } -+ -+ if (stat & I2C_INTERRUPT_RFDA) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_INTERRUPTE_RFF) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_SLAVE_INTERRUPT_STDR) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_MASTER_INTERRUPT_MTDR) { -+ dprintk(SAA716x_DEBUG, 0, " "); -+ } -+ -+ if (stat & I2C_ERROR_IBE) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_MODE_CHANGE_INTER_MSMC) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_SLAVE_RECEIVE_INTER_SRSD) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_SLAVE_TRANSMIT_INTER_STSD) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_ACK_INTER_MTNA) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_FAILURE_INTER_MAF) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ if (stat & I2C_INTERRUPT_MTD) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ return 0; -+} -+ -+static irqreturn_t saa716x_i2c_irq(int irq, void *dev_id) -+{ -+ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; -+ -+ if (unlikely(saa716x == NULL)) { -+ printk("%s: saa716x=NULL", __func__); -+ return IRQ_NONE; -+ } -+ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", -+ SAA716x_EPRD(MSI, MSI_INT_STATUS_L), -+ SAA716x_EPRD(MSI, MSI_INT_STATUS_H), -+ SAA716x_EPRD(MSI, MSI_INT_ENA_L), -+ SAA716x_EPRD(MSI, MSI_INT_ENA_H)); -+ -+ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", -+ SAA716x_EPRD(I2C_A, INT_STATUS), -+ SAA716x_EPRD(I2C_B, INT_STATUS), -+ SAA716x_EPRD(I2C_A, INT_CLR_STATUS), -+ SAA716x_EPRD(I2C_B, INT_CLR_STATUS)); -+ -+ return IRQ_HANDLED; -+} -+ -+static void saa716x_term_xfer(struct saa716x_i2c *i2c, u32 I2C_DEV) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xc0); /* Start: SCL/SDA High */ -+ msleep(10); -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0x80); -+ msleep(10); -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0x00); -+ msleep(10); -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0x80); -+ msleep(10); -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xc0); -+ -+ return; -+} -+ -+static void saa716x_i2c_hwdeinit(struct saa716x_i2c *i2c, u32 I2C_DEV) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ -+ /* Disable all interrupts and clear status */ -+ SAA716x_EPWR(I2C_DEV, INT_CLR_ENABLE, 0x1fff); -+ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); -+} -+ -+static int saa716x_i2c_hwinit(struct saa716x_i2c *i2c, u32 I2C_DEV) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ struct i2c_adapter *adapter = &i2c->i2c_adapter; -+ -+ int i, err = 0; -+ u32 reg; -+ -+ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); -+ if (!(reg & 0xd)) { -+ dprintk(SAA716x_ERROR, 1, "Adapter (%02x) %s RESET failed, Exiting !", -+ I2C_DEV, adapter->name); -+ err = -EIO; -+ goto exit; -+ } -+ -+ /* Flush queue */ -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xcc); -+ -+ /* Disable all interrupts and clear status */ -+ SAA716x_EPWR(I2C_DEV, INT_CLR_ENABLE, 0x1fff); -+ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); -+ -+ /* Reset I2C Core and generate a delay */ -+ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xc1); -+ -+ for (i = 0; i < 100; i++) { -+ reg = SAA716x_EPRD(I2C_DEV, I2C_CONTROL); -+ if (reg == 0xc0) { -+ dprintk(SAA716x_ERROR, 1, "Adapter (%02x) %s RESET", -+ I2C_DEV, adapter->name); -+ break; -+ } -+ msleep(1); -+ -+ if (i == 99) -+ err = -EIO; -+ } -+ -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "Adapter (%02x) %s RESET failed", -+ I2C_DEV, adapter->name); -+ -+ saa716x_term_xfer(i2c, I2C_DEV); -+ err = -EIO; -+ goto exit; -+ } -+ -+ /* I2C Rate Setup */ -+ switch (i2c->i2c_rate) { -+ case SAA716x_I2C_RATE_400: -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing Adapter %s @ 400k", adapter->name); -+ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_HIGH, 0x1a); /* 0.5 * 27MHz/400kHz */ -+ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_LOW, 0x21); /* 0.5 * 27MHz/400kHz */ -+ SAA716x_EPWR(I2C_DEV, I2C_SDA_HOLD, 0x19); -+ break; -+ -+ case SAA716x_I2C_RATE_100: -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing Adapter %s @ 100k", adapter->name); -+ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_HIGH, 0x68); /* 0.5 * 27MHz/100kHz */ -+ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_LOW, 0x87); /* 0.5 * 27MHz/100kHz */ -+ SAA716x_EPWR(I2C_DEV, I2C_SDA_HOLD, 0x60); -+ break; -+ -+ default: -+ -+ dprintk(SAA716x_ERROR, 1, "Adapter %s Unknown Rate (Rate=0x%02x)", -+ adapter->name, -+ i2c->i2c_rate); -+ -+ break; -+ } -+ -+ /* Disable all interrupts and clear status */ -+ SAA716x_EPWR(I2C_DEV, INT_CLR_ENABLE, 0x1fff); -+ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); -+ -+ if (i2c->i2c_mode >= SAA716x_I2C_MODE_IRQ) { -+ /* Enabled interrupts: -+ * Master Transaction Done, -+ * Master Transaction Data Request -+ * (0x81) -+ */ -+ msleep(5); -+ -+ SAA716x_EPWR(I2C_DEV, INT_SET_ENABLE, -+ I2C_SET_ENABLE_MTDR | I2C_SET_ENABLE_MTD); -+ -+ /* Check interrupt enable status */ -+ reg = SAA716x_EPRD(I2C_DEV, INT_ENABLE); -+ if (reg != 0x81) { -+ -+ dprintk(SAA716x_ERROR, 1, -+ "Adapter (%d) %s Interrupt enable failed, Exiting !", -+ i, -+ adapter->name); -+ -+ err = -EIO; -+ goto exit; -+ } -+ } -+ -+ /* Check status */ -+ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); -+ if (!(reg & 0xd)) { -+ -+ dprintk(SAA716x_ERROR, 1, -+ "Adapter (%02x) %s has bad state, Exiting !", -+ I2C_DEV, -+ adapter->name); -+ -+ err = -EIO; -+ goto exit; -+ } -+#if 0 -+ saa716x_add_irqvector(saa716x, -+ i2c_vec[i].vector, -+ i2c_vec[i].edge, -+ i2c_vec[i].handler, -+ SAA716x_I2C_ADAPTER(i)); -+#endif -+ reg = SAA716x_EPRD(CGU, CGU_SCR_3); -+ dprintk(SAA716x_DEBUG, 1, "Adapter (%02x) Autowake <%d> Active <%d>", -+ I2C_DEV, -+ (reg >> 1) & 0x01, -+ reg & 0x01); -+ -+ return 0; -+exit: -+ return err; -+} -+ -+static int saa716x_i2c_send(struct saa716x_i2c *i2c, u32 I2C_DEV, u32 data) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ int i, err = 0; -+ u32 reg; -+ -+ if (i2c->i2c_mode >= SAA716x_I2C_MODE_IRQ) { -+ /* Write to FIFO */ -+ SAA716x_EPWR(I2C_DEV, TX_FIFO, data); -+ return 0; -+ } -+ -+ /* Check FIFO status before TX */ -+ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); -+ i2c->stat_tx_prior = reg; -+ if (reg & SAA716x_I2C_TXBUSY) { -+ for (i = 0; i < 100; i++) { -+ /* TODO! check for hotplug devices */ -+ msleep(10); -+ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); -+ -+ if (reg & SAA716x_I2C_TXBUSY) { -+ dprintk(SAA716x_ERROR, 1, "FIFO full or Blocked"); -+ -+ err = saa716x_i2c_hwinit(i2c, I2C_DEV); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Error Reinit"); -+ err = -EIO; -+ goto exit; -+ } -+ } else { -+ break; -+ } -+ } -+ } -+ -+ /* Write to FIFO */ -+ SAA716x_EPWR(I2C_DEV, TX_FIFO, data); -+ -+ /* Check for data write */ -+ for (i = 0; i < 1000; i++) { -+ /* TODO! check for hotplug devices */ -+ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); -+ if (reg & I2C_TRANSMIT_CLEAR) { -+ break; -+ } -+ } -+ i2c->stat_tx_done = reg; -+ -+ if (!(reg & I2C_TRANSMIT_CLEAR)) { -+ dprintk(SAA716x_ERROR, 1, "TXFIFO not empty after Timeout, tried %d loops!", i); -+ err = -EIO; -+ goto exit; -+ } -+ -+ return err; -+ -+exit: -+ dprintk(SAA716x_ERROR, 1, "I2C Send failed (Err=%d)", err); -+ return err; -+} -+ -+static int saa716x_i2c_recv(struct saa716x_i2c *i2c, u32 I2C_DEV, u32 *data) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ int i, err = 0; -+ u32 reg; -+ -+ /* Check FIFO status before RX */ -+ for (i = 0; i < 1000; i++) { -+ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); -+ if (!(reg & SAA716x_I2C_RXBUSY)) { -+ break; -+ } -+ } -+ if (reg & SAA716x_I2C_RXBUSY) { -+ dprintk(SAA716x_INFO, 1, "FIFO empty"); -+ err = -EIO; -+ goto exit; -+ } -+ -+ /* Read from FIFO */ -+ *data = SAA716x_EPRD(I2C_DEV, RX_FIFO); -+ -+ return 0; -+exit: -+ dprintk(SAA716x_ERROR, 1, "Error Reading data, err=%d", err); -+ return err; -+} -+ -+static void saa716x_i2c_irq_start(struct saa716x_i2c *i2c, u32 I2C_DEV) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ -+ if (i2c->i2c_mode == SAA716x_I2C_MODE_POLLING) -+ return; -+ -+ i2c->i2c_op = 1; -+ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); -+} -+ -+static int saa716x_i2c_irq_wait(struct saa716x_i2c *i2c, u32 I2C_DEV) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ unsigned long timeout; -+ int err = 0; -+ -+ if (i2c->i2c_mode == SAA716x_I2C_MODE_POLLING) -+ return 0; -+ -+ timeout = HZ/100 + 1; /* 10ms */ -+ timeout = wait_event_interruptible_timeout(i2c->i2c_wq, i2c->i2c_op == 0, timeout); -+ if (timeout == -ERESTARTSYS || i2c->i2c_op) { -+ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); -+ if (timeout == -ERESTARTSYS) { -+ /* a signal arrived */ -+ err = -ERESTARTSYS; -+ } else { -+ dprintk(SAA716x_ERROR, 1, "timed out waiting for end of xfer!"); -+ err = -EIO; -+ } -+ } -+ return err; -+} -+ -+static int saa716x_i2c_write_msg(struct saa716x_i2c *i2c, u32 I2C_DEV, -+ u16 addr, u8 *buf, u16 len, u8 add_stop) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ u32 data; -+ int err; -+ int i; -+ int bytes; -+ -+ saa716x_i2c_irq_start(i2c, I2C_DEV); -+ -+ /* first write START with I2C address */ -+ data = I2C_START_BIT | (addr << 1); -+ dprintk(SAA716x_DEBUG, 1, "length=%d Addr:0x%02x", len, data); -+ err = saa716x_i2c_send(i2c, I2C_DEV, data); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Address write failed"); -+ goto exit; -+ } -+ -+ bytes = i2c->block_size - 1; -+ -+ /* now write the data */ -+ while (len > 0) { -+ if (bytes == i2c->block_size) { -+ /* this is not the first round, so restart irq */ -+ saa716x_i2c_irq_start(i2c, I2C_DEV); -+ } -+ -+ if (bytes > len) -+ bytes = len; -+ -+ for (i = 0; i < bytes; i++) { -+ data = buf[i]; -+ dprintk(SAA716x_DEBUG, 0, " 0x%02x\n", i, data); -+ if (add_stop && i == (len - 1)) -+ data |= I2C_STOP_BIT; -+ err = saa716x_i2c_send(i2c, I2C_DEV, data); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Data send failed"); -+ goto exit; -+ } -+ } -+ -+ err = saa716x_i2c_irq_wait(i2c, I2C_DEV); -+ if (err < 0) { -+ goto exit; -+ } -+ -+ len -= bytes; -+ buf += bytes; -+ bytes = i2c->block_size; -+ } -+ -+ return 0; -+ -+exit: -+ dprintk(SAA716x_ERROR, 1, "Error writing data, err=%d", err); -+ return err; -+} -+ -+static int saa716x_i2c_read_msg(struct saa716x_i2c *i2c, u32 I2C_DEV, -+ u16 addr, u8 *buf, u16 len, u8 add_stop) -+{ -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ u32 data; -+ int err; -+ int i; -+ int bytes; -+ -+ saa716x_i2c_irq_start(i2c, I2C_DEV); -+ -+ /* first write START with I2C address */ -+ data = I2C_START_BIT | (addr << 1) | 1; -+ dprintk(SAA716x_DEBUG, 1, "length=%d Addr:0x%02x", len, data); -+ err = saa716x_i2c_send(i2c, I2C_DEV, data); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Address write failed"); -+ goto exit; -+ } -+ -+ bytes = i2c->block_size - 1; -+ -+ /* now read the data */ -+ while (len > 0) { -+ if (bytes == i2c->block_size) { -+ /* this is not the first round, so restart irq */ -+ saa716x_i2c_irq_start(i2c, I2C_DEV); -+ } -+ -+ if (bytes > len) -+ bytes = len; -+ -+ for (i = 0; i < bytes; i++) { -+ data = 0x00; /* dummy write for reading */ -+ if (add_stop && i == (len - 1)) -+ data |= I2C_STOP_BIT; -+ err = saa716x_i2c_send(i2c, I2C_DEV, data); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Data send failed"); -+ goto exit; -+ } -+ } -+ -+ err = saa716x_i2c_irq_wait(i2c, I2C_DEV); -+ if (err < 0) { -+ goto exit; -+ } -+ -+ for (i = 0; i < bytes; i++) { -+ err = saa716x_i2c_recv(i2c, I2C_DEV, &data); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Data receive failed"); -+ goto exit; -+ } -+ dprintk(SAA716x_DEBUG, 0, " 0x%02x\n\n", i, data); -+ buf[i] = data; -+ } -+ -+ len -= bytes; -+ buf += bytes; -+ bytes = i2c->block_size; -+ } -+ -+ return 0; -+ -+exit: -+ dprintk(SAA716x_ERROR, 1, "Error reading data, err=%d", err); -+ return err; -+} -+ -+static int saa716x_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) -+{ -+ struct saa716x_i2c *i2c = i2c_get_adapdata(adapter); -+ struct saa716x_dev *saa716x = i2c->saa716x; -+ -+ u32 DEV = SAA716x_I2C_BUS(i2c->i2c_dev); -+ int i, j, err = 0; -+ int t; -+ -+ dprintk(SAA716x_DEBUG, 0, "\n"); -+ dprintk(SAA716x_DEBUG, 1, "Bus(%02x) I2C transfer", DEV); -+ mutex_lock(&i2c->i2c_lock); -+ -+ for (t = 0; t < 3; t++) { -+ for (i = 0; i < num; i++) { -+ if (msgs[i].flags & I2C_M_RD) -+ err = saa716x_i2c_read_msg(i2c, DEV, -+ msgs[i].addr, msgs[i].buf, msgs[i].len, -+ i == (num - 1)); -+ else -+ err = saa716x_i2c_write_msg(i2c, DEV, -+ msgs[i].addr, msgs[i].buf, msgs[i].len, -+ i == (num - 1)); -+ if (err < 0) { -+ err = -EIO; -+ goto retry; -+ } -+ } -+ break; -+retry: -+ dprintk(SAA716x_INFO, 1, "Error in Transfer, try %d", t); -+ for (i = 0; i < num; i++) { -+ dprintk(SAA716x_INFO, 1, "msg %d, addr = 0x%02x, len=%d, flags=0x%x", -+ i, msgs[i].addr, msgs[i].len, msgs[i].flags); -+ if (!(msgs[i].flags & I2C_M_RD)) { -+ for (j = 0; j < msgs[i].len; j++) { -+ dprintk(SAA716x_INFO, 1, " 0x%02x", -+ j, msgs[i].buf[j]); -+ } -+ } -+ } -+ err = saa716x_i2c_hwinit(i2c, DEV); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Error Reinit"); -+ err = -EIO; -+ goto bail_out; -+ } -+ } -+ -+ mutex_unlock(&i2c->i2c_lock); -+ return num; -+ -+bail_out: -+ dprintk(SAA716x_ERROR, 1, "ERROR: Bailing out <%d>", err); -+ mutex_unlock(&i2c->i2c_lock); -+ return err; -+} -+ -+static u32 saa716x_i2c_func(struct i2c_adapter *adapter) -+{ -+ return I2C_FUNC_SMBUS_EMUL; -+} -+ -+static const struct i2c_algorithm saa716x_algo = { -+ .master_xfer = saa716x_i2c_xfer, -+ .functionality = saa716x_i2c_func, -+}; -+ -+struct saa716x_i2cvec { -+ u32 vector; -+ enum saa716x_edge edge; -+ irqreturn_t (*handler)(int irq, void *dev_id); -+}; -+ -+static const struct saa716x_i2cvec i2c_vec[] = { -+ { -+ .vector = I2CINT_0, -+ .edge = SAA716x_EDGE_RISING, -+ .handler = saa716x_i2c_irq -+ }, { -+ .vector = I2CINT_1, -+ .edge = SAA716x_EDGE_RISING, -+ .handler = saa716x_i2c_irq -+ } -+}; -+ -+int __devinit saa716x_i2c_init(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ struct saa716x_i2c *i2c = saa716x->i2c; -+ struct i2c_adapter *adapter = NULL; -+ -+ int i, err = 0; -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing SAA%02x I2C Core", -+ saa716x->pdev->device); -+ -+ for (i = 0; i < SAA716x_I2C_ADAPTERS; i++) { -+ -+ mutex_init(&i2c->i2c_lock); -+ -+ init_waitqueue_head(&i2c->i2c_wq); -+ i2c->i2c_op = 0; -+ -+ i2c->i2c_dev = i; -+ i2c->i2c_rate = saa716x->config->i2c_rate; -+ i2c->i2c_mode = saa716x->config->i2c_mode; -+ adapter = &i2c->i2c_adapter; -+ -+ if (i2c->i2c_mode == SAA716x_I2C_MODE_IRQ_BUFFERED) -+ i2c->block_size = 8; -+ else -+ i2c->block_size = 1; -+ -+ if (adapter != NULL) { -+ -+ i2c_set_adapdata(adapter, i2c); -+ -+ strcpy(adapter->name, SAA716x_I2C_ADAPTER(i)); -+ -+ adapter->owner = THIS_MODULE; -+ adapter->algo = &saa716x_algo; -+ adapter->algo_data = NULL; -+ adapter->timeout = 500; /* FIXME ! */ -+ adapter->retries = 3; /* FIXME ! */ -+ adapter->dev.parent = &pdev->dev; -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing adapter (%d) %s", -+ i, -+ adapter->name); -+ -+ err = i2c_add_adapter(adapter); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Adapter (%d) %s init failed", i, adapter->name); -+ goto exit; -+ } -+ -+ i2c->saa716x = saa716x; -+ saa716x_i2c_hwinit(i2c, SAA716x_I2C_BUS(i)); -+ } -+ i2c++; -+ } -+ -+ if (saa716x->config->i2c_mode >= SAA716x_I2C_MODE_IRQ) { -+ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, MSI_INT_I2CINT_0); -+ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, MSI_INT_I2CINT_1); -+ } -+ -+ dprintk(SAA716x_DEBUG, 1, "SAA%02x I2C Core succesfully initialized", -+ saa716x->pdev->device); -+ -+ return 0; -+exit: -+ return err; -+} -+EXPORT_SYMBOL_GPL(saa716x_i2c_init); -+ -+int __devexit saa716x_i2c_exit(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_i2c *i2c = saa716x->i2c; -+ struct i2c_adapter *adapter = NULL; -+ int i, err = 0; -+ -+ dprintk(SAA716x_DEBUG, 1, "Removing SAA%02x I2C Core", saa716x->pdev->device); -+ -+ for (i = 0; i < SAA716x_I2C_ADAPTERS; i++) { -+ -+ adapter = &i2c->i2c_adapter; -+#if 0 -+ saa716x_remove_irqvector(saa716x, i2c_vec[i].vector); -+#endif -+ saa716x_i2c_hwdeinit(i2c, SAA716x_I2C_BUS(i)); -+ dprintk(SAA716x_DEBUG, 1, "Removing adapter (%d) %s", i, adapter->name); -+ -+ err = i2c_del_adapter(adapter); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "Adapter (%d) %s remove failed", i, adapter->name); -+ goto exit; -+ } -+ i2c++; -+ } -+ dprintk(SAA716x_DEBUG, 1, "SAA%02x I2C Core succesfully removed", saa716x->pdev->device); -+ -+ return 0; -+ -+exit: -+ return err; -+} -+EXPORT_SYMBOL_GPL(saa716x_i2c_exit); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.h 2013-01-16 10:41:10.921798210 +0100 -@@ -0,0 +1,52 @@ -+#ifndef __SAA716x_I2C_H -+#define __SAA716x_I2C_H -+ -+#define SAA716x_I2C_ADAPTERS 2 -+ -+#define SAA716x_I2C_ADAPTER(__dev) (( \ -+ (__dev == 1) ? \ -+ "SAA716x I2C Core 1" : \ -+ "SAA716x I2C Core 0")) -+ -+#define SAA716x_I2C_BUS(__x) ((__x == 1) ? 0x0000c000 : 0x0000b000) -+ -+#define SAA716x_I2C_BUS_A 0x01 -+#define SAA716x_I2C_BUS_B 0x00 -+ -+struct saa716x_dev; -+ -+enum saa716x_i2c_rate { -+ SAA716x_I2C_RATE_400 = 1, -+ SAA716x_I2C_RATE_100, -+}; -+ -+enum saa716x_i2c_mode { -+ SAA716x_I2C_MODE_POLLING = 0, -+ SAA716x_I2C_MODE_IRQ, -+ SAA716x_I2C_MODE_IRQ_BUFFERED -+}; -+ -+struct saa716x_i2c { -+ struct i2c_adapter i2c_adapter; -+ struct mutex i2c_lock; -+ struct saa716x_dev *saa716x; -+ u8 i2c_dev; -+ -+ enum saa716x_i2c_rate i2c_rate; /* run time */ -+ enum saa716x_i2c_mode i2c_mode; -+ u32 block_size; /* block size for buffered -+ mode, 1 otherwise */ -+ u32 i2c_stat; -+ -+ u32 stat_tx_prior; -+ u32 stat_tx_done; -+ wait_queue_head_t i2c_wq; -+ int i2c_op; -+}; -+ -+extern int saa716x_i2c_init(struct saa716x_dev *saa716x); -+extern int saa716x_i2c_exit(struct saa716x_dev *saa716x); -+extern void saa716x_i2cint_disable(struct saa716x_dev *saa716x); -+extern int saa716x_i2c_irqevent(struct saa716x_dev *saa716x, u8 bus); -+ -+#endif /* __SAA716x_I2C_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c_reg.h 2013-01-16 10:41:10.922798203 +0100 -@@ -0,0 +1,145 @@ -+#ifndef __SAA716x_I2C_REG_H -+#define __SAA716x_I2C_REG_H -+ -+/* -------------- I2C Registers -------------- */ -+ -+#define RX_FIFO 0x000 -+#define I2C_RX_BYTE (0x000000ff << 0) -+ -+#define TX_FIFO 0x000 -+#define I2C_STOP_BIT (0x00000001 << 9) -+#define I2C_START_BIT (0x00000001 << 8) -+#define I2C_TX_BYTE (0x000000ff << 0) -+ -+#define I2C_STATUS 0x008 -+#define I2C_TRANSMIT (0x00000001 << 11) -+#define I2C_RECEIVE (0x00000001 << 10) -+#define I2C_TRANSMIT_S_PROG (0x00000001 << 9) -+#define I2C_TRANSMIT_S_CLEAR (0x00000001 << 8) -+#define I2C_TRANSMIT_PROG (0x00000001 << 7) -+#define I2C_TRANSMIT_CLEAR (0x00000001 << 6) -+#define I2C_RECEIVE_PROG (0x00000001 << 5) -+#define I2C_RECEIVE_CLEAR (0x00000001 << 4) -+#define I2C_SDA_LINE (0x00000001 << 3) -+#define I2C_SCL_LINE (0x00000001 << 2) -+#define I2C_START_STOP_FLAG (0x00000001 << 1) -+#define I2C_MODE_STATUS (0x00000001 << 0) -+ -+#define I2C_CONTROL 0x00c -+#define I2C_SCL_CONTROL (0x00000001 << 7) -+#define I2C_SDA_CONTROL (0x00000001 << 6) -+#define I2C_RECEIVE_PROTECT (0x00000001 << 5) -+#define I2C_RECEIVE_PRO_READ (0x00000001 << 4) -+#define I2C_TRANS_SELF_CLEAR (0x00000001 << 3) -+#define I2C_TRANS_S_SELF_CLEAR (0x00000001 << 2) -+#define I2C_SLAVE_ADDR_10BIT (0x00000001 << 1) -+#define I2C_RESET (0x00000001 << 0) -+ -+#define I2C_CLOCK_DIVISOR_HIGH 0x010 -+#define I2C_CLOCK_HIGH (0x0000ffff << 0) -+ -+#define I2C_CLOCK_DIVISOR_LOW 0x014 -+#define I2C_CLOCK_LOW (0x0000ffff << 0) -+ -+#define I2C_RX_LEVEL 0x01c -+#define I2C_RECEIVE_RANGE (0x0000007f << 0) -+ -+#define I2C_TX_LEVEL 0x020 -+#define I2C_TRANSMIT_RANGE (0x0000007f << 0) -+ -+#define I2C_SDA_HOLD 0x028 -+#define I2C_HOLD_TIME (0x0000007f << 0) -+ -+#define MODULE_CONF 0xfd4 -+#define INT_CLR_ENABLE 0xfd8 -+#define I2C_CLR_ENABLE_STFNF (0x00000001 << 12) -+#define I2C_CLR_ENABLE_MTFNF (0x00000001 << 11) -+#define I2C_CLR_ENABLE_RFDA (0x00000001 << 10) -+#define I2C_CLR_ENABLE_RFF (0x00000001 << 9) -+#define I2C_CLR_ENABLE_STDR (0x00000001 << 8) -+#define I2C_CLR_ENABLE_MTDR (0x00000001 << 7) -+#define I2C_CLR_ENABLE_IBE (0x00000001 << 6) -+#define I2C_CLR_ENABLE_MSMC (0x00000001 << 5) -+#define I2C_CLR_ENABLE_SRSD (0x00000001 << 4) -+#define I2C_CLR_ENABLE_STSD (0x00000001 << 3) -+#define I2C_CLR_ENABLE_MTNA (0x00000001 << 2) -+#define I2C_CLR_ENABLE_MAF (0x00000001 << 1) -+#define I2C_CLR_ENABLE_MTD (0x00000001 << 0) -+ -+#define INT_SET_ENABLE 0xfdc -+#define I2C_SET_ENABLE_STFNF (0x00000001 << 12) -+#define I2C_SET_ENABLE_MTFNF (0x00000001 << 11) -+#define I2C_SET_ENABLE_RFDA (0x00000001 << 10) -+#define I2C_SET_ENABLE_RFF (0x00000001 << 9) -+#define I2C_SET_ENABLE_STDR (0x00000001 << 8) -+#define I2C_SET_ENABLE_MTDR (0x00000001 << 7) -+#define I2C_SET_ENABLE_IBE (0x00000001 << 6) -+#define I2C_SET_ENABLE_MSMC (0x00000001 << 5) -+#define I2C_SET_ENABLE_SRSD (0x00000001 << 4) -+#define I2C_SET_ENABLE_STSD (0x00000001 << 3) -+#define I2C_SET_ENABLE_MTNA (0x00000001 << 2) -+#define I2C_SET_ENABLE_MAF (0x00000001 << 1) -+#define I2C_SET_ENABLE_MTD (0x00000001 << 0) -+ -+#define INT_STATUS 0xfe0 -+#define I2C_INTERRUPT_STFNF (0x00000001 << 12) -+#define I2C_INTERRUPT_MTFNF (0x00000001 << 11) -+#define I2C_INTERRUPT_RFDA (0x00000001 << 10) -+#define I2C_INTERRUPTE_RFF (0x00000001 << 9) -+#define I2C_SLAVE_INTERRUPT_STDR (0x00000001 << 8) -+#define I2C_MASTER_INTERRUPT_MTDR (0x00000001 << 7) -+#define I2C_ERROR_IBE (0x00000001 << 6) -+#define I2C_MODE_CHANGE_INTER_MSMC (0x00000001 << 5) -+#define I2C_SLAVE_RECEIVE_INTER_SRSD (0x00000001 << 4) -+#define I2C_SLAVE_TRANSMIT_INTER_STSD (0x00000001 << 3) -+#define I2C_ACK_INTER_MTNA (0x00000001 << 2) -+#define I2C_FAILURE_INTER_MAF (0x00000001 << 1) -+#define I2C_INTERRUPT_MTD (0x00000001 << 0) -+ -+#define INT_ENABLE 0xfe4 -+#define I2C_ENABLE_STFNF (0x00000001 << 12) -+#define I2C_ENABLE_MTFNF (0x00000001 << 11) -+#define I2C_ENABLE_RFDA (0x00000001 << 10) -+#define I2C_ENABLE_RFF (0x00000001 << 9) -+#define I2C_ENABLE_STDR (0x00000001 << 8) -+#define I2C_ENABLE_MTDR (0x00000001 << 7) -+#define I2C_ENABLE_IBE (0x00000001 << 6) -+#define I2C_ENABLE_MSMC (0x00000001 << 5) -+#define I2C_ENABLE_SRSD (0x00000001 << 4) -+#define I2C_ENABLE_STSD (0x00000001 << 3) -+#define I2C_ENABLE_MTNA (0x00000001 << 2) -+#define I2C_ENABLE_MAF (0x00000001 << 1) -+#define I2C_ENABLE_MTD (0x00000001 << 0) -+ -+#define INT_CLR_STATUS 0xfe8 -+#define I2C_CLR_STATUS_STFNF (0x00000001 << 12) -+#define I2C_CLR_STATUS_MTFNF (0x00000001 << 11) -+#define I2C_CLR_STATUS_RFDA (0x00000001 << 10) -+#define I2C_CLR_STATUS_RFF (0x00000001 << 9) -+#define I2C_CLR_STATUS_STDR (0x00000001 << 8) -+#define I2C_CLR_STATUS_MTDR (0x00000001 << 7) -+#define I2C_CLR_STATUS_IBE (0x00000001 << 6) -+#define I2C_CLR_STATUS_MSMC (0x00000001 << 5) -+#define I2C_CLR_STATUS_SRSD (0x00000001 << 4) -+#define I2C_CLR_STATUS_STSD (0x00000001 << 3) -+#define I2C_CLR_STATUS_MTNA (0x00000001 << 2) -+#define I2C_CLR_STATUS_MAF (0x00000001 << 1) -+#define I2C_CLR_STATIS_MTD (0x00000001 << 0) -+ -+#define INT_SET_STATUS 0xfec -+#define I2C_SET_STATUS_STFNF (0x00000001 << 12) -+#define I2C_SET_STATUS_MTFNF (0x00000001 << 11) -+#define I2C_SET_STATUS_RFDA (0x00000001 << 10) -+#define I2C_SET_STATUS_RFF (0x00000001 << 9) -+#define I2C_SET_STATUS_STDR (0x00000001 << 8) -+#define I2C_SET_STATUS_MTDR (0x00000001 << 7) -+#define I2C_SET_STATUS_IBE (0x00000001 << 6) -+#define I2C_SET_STATUS_MSMC (0x00000001 << 5) -+#define I2C_SET_STATUS_SRSD (0x00000001 << 4) -+#define I2C_SET_STATUS_STSD (0x00000001 << 3) -+#define I2C_SET_STATUS_MTNA (0x00000001 << 2) -+#define I2C_SET_STATUS_MAF (0x00000001 << 1) -+#define I2C_SET_STATIS_MTD (0x00000001 << 0) -+ -+ -+#endif /* __SAA716x_I2C_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_mod.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_mod.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_mod.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_mod.h 2013-01-16 10:41:10.922798203 +0100 -@@ -0,0 +1,50 @@ -+#ifndef __SAA716x_MOD_H -+#define __SAA716x_MOD_H -+ -+/* BAR = 17 bits */ -+/* -+ VI0 0x00000000 -+ VI1 0x00001000 -+ FGPI0 0x00002000 -+ FGPI1 0x00003000 -+ FGPI2 0x00004000 -+ FGPI3 0x00005000 -+ AI0 0x00006000 -+ AI1 0x00007000 -+ BAM 0x00008000 -+ MMU 0x00009000 -+ MSI 0x0000a000 -+ I2C_B 0x0000b000 -+ I2C_A 0x0000c000 -+ SPI 0x0000d000 -+ GPIO 0x0000e000 -+ PHI_0 0x0000f000 -+ CGU 0x00013000 -+ DCS 0x00014000 -+ GREG 0x00012000 -+ -+ PHI_1 0x00020000 -+*/ -+ -+#define VI0 0x00000000 -+#define VI1 0x00001000 -+#define FGPI0 0x00002000 -+#define FGPI1 0x00003000 -+#define FGPI2 0x00004000 -+#define FGPI3 0x00005000 -+#define AI0 0x00006000 -+#define AI1 0x00007000 -+#define BAM 0x00008000 -+#define MMU 0x00009000 -+#define MSI 0x0000a000 -+#define I2C_B 0x0000b000 -+#define I2C_A 0x0000c000 -+#define SPI 0x0000d000 -+#define GPIO 0x0000e000 -+#define PHI_0 0x0000f000 -+#define GREG 0x00012000 -+#define CGU 0x00013000 -+#define DCS 0x00014000 -+#define PHI_1 0x00020000 -+ -+#endif /* __SAA716x_MOD_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.c 2013-01-16 10:41:10.923798196 +0100 -@@ -0,0 +1,479 @@ -+#include -+ -+#include -+#include -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_msi_reg.h" -+#include "saa716x_msi.h" -+#include "saa716x_spi.h" -+ -+#include "saa716x_priv.h" -+ -+#define SAA716x_MSI_VECTORS 50 -+ -+static const char *vector_name[] = { -+ "TAGACK_VI0_0", -+ "TAGACK_VI0_1", -+ "TAGACK_VI0_2", -+ "TAGACK_VI1_0", -+ "TAGACK_VI1_1", -+ "TAGACK_VI1_2", -+ "TAGACK_FGPI_0", -+ "TAGACK_FGPI_1", -+ "TAGACK_FGPI_2", -+ "TAGACK_FGPI_3", -+ "TAGACK_AI_0", -+ "TAGACK_AI_1", -+ "OVRFLW_VI0_0", -+ "OVRFLW_VI0_1", -+ "OVRFLW_VI0_2", -+ "OVRFLW_VI1_0", -+ "OVRFLW_VI1_1", -+ "OVRFLW_VI1_2", -+ "OVRFLW_FGPI_O", -+ "OVRFLW_FGPI_1", -+ "OVRFLW_FGPI_2", -+ "OVRFLW_FGPI_3", -+ "OVRFLW_AI_0", -+ "OVRFLW_AI_1", -+ "AVINT_VI0", -+ "AVINT_VI1", -+ "AVINT_FGPI_0", -+ "AVINT_FGPI_1", -+ "AVINT_FGPI_2", -+ "AVINT_FGPI_3", -+ "AVINT_AI_0", -+ "AVINT_AI_1", -+ "UNMAPD_TC_INT", -+ "EXTINT_0", -+ "EXTINT_1", -+ "EXTINT_2", -+ "EXTINT_3", -+ "EXTINT_4", -+ "EXTINT_5", -+ "EXTINT_6", -+ "EXTINT_7", -+ "EXTINT_8", -+ "EXTINT_9", -+ "EXTINT_10", -+ "EXTINT_11", -+ "EXTINT_12", -+ "EXTINT_13", -+ "EXTINT_14", -+ "EXTINT_15", -+ "I2CINT_0", -+ "I2CINT_1" -+}; -+ -+static u32 MSI_CONFIG_REG[51] = { -+ MSI_CONFIG0, -+ MSI_CONFIG1, -+ MSI_CONFIG2, -+ MSI_CONFIG3, -+ MSI_CONFIG4, -+ MSI_CONFIG5, -+ MSI_CONFIG6, -+ MSI_CONFIG7, -+ MSI_CONFIG8, -+ MSI_CONFIG9, -+ MSI_CONFIG10, -+ MSI_CONFIG11, -+ MSI_CONFIG12, -+ MSI_CONFIG13, -+ MSI_CONFIG14, -+ MSI_CONFIG15, -+ MSI_CONFIG16, -+ MSI_CONFIG17, -+ MSI_CONFIG18, -+ MSI_CONFIG19, -+ MSI_CONFIG20, -+ MSI_CONFIG21, -+ MSI_CONFIG22, -+ MSI_CONFIG23, -+ MSI_CONFIG24, -+ MSI_CONFIG25, -+ MSI_CONFIG26, -+ MSI_CONFIG27, -+ MSI_CONFIG28, -+ MSI_CONFIG29, -+ MSI_CONFIG30, -+ MSI_CONFIG31, -+ MSI_CONFIG32, -+ MSI_CONFIG33, -+ MSI_CONFIG34, -+ MSI_CONFIG35, -+ MSI_CONFIG36, -+ MSI_CONFIG37, -+ MSI_CONFIG38, -+ MSI_CONFIG39, -+ MSI_CONFIG40, -+ MSI_CONFIG41, -+ MSI_CONFIG42, -+ MSI_CONFIG43, -+ MSI_CONFIG44, -+ MSI_CONFIG45, -+ MSI_CONFIG46, -+ MSI_CONFIG47, -+ MSI_CONFIG48, -+ MSI_CONFIG49, -+ MSI_CONFIG50 -+}; -+ -+int saa716x_msi_event(struct saa716x_dev *saa716x, u32 stat_l, u32 stat_h) -+{ -+ dprintk(SAA716x_DEBUG, 0, "%s: MSI event ", __func__); -+ -+ if (stat_l & MSI_INT_TAGACK_VI0_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[0]); -+ -+ if (stat_l & MSI_INT_TAGACK_VI0_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[1]); -+ -+ if (stat_l & MSI_INT_TAGACK_VI0_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[2]); -+ -+ if (stat_l & MSI_INT_TAGACK_VI1_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[3]); -+ -+ if (stat_l & MSI_INT_TAGACK_VI1_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[4]); -+ -+ if (stat_l & MSI_INT_TAGACK_VI1_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[5]); -+ -+ if (stat_l & MSI_INT_TAGACK_FGPI_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[6]); -+ -+ if (stat_l & MSI_INT_TAGACK_FGPI_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[7]); -+ -+ if (stat_l & MSI_INT_TAGACK_FGPI_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[8]); -+ -+ if (stat_l & MSI_INT_TAGACK_FGPI_3) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[9]); -+ -+ if (stat_l & MSI_INT_TAGACK_AI_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[10]); -+ -+ if (stat_l & MSI_INT_TAGACK_AI_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[11]); -+ -+ if (stat_l & MSI_INT_OVRFLW_VI0_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[12]); -+ -+ if (stat_l & MSI_INT_OVRFLW_VI0_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[13]); -+ -+ if (stat_l & MSI_INT_OVRFLW_VI0_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[14]); -+ -+ if (stat_l & MSI_INT_OVRFLW_VI1_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[15]); -+ -+ if (stat_l & MSI_INT_OVRFLW_VI1_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[16]); -+ -+ if (stat_l & MSI_INT_OVRFLW_VI1_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[17]); -+ -+ if (stat_l & MSI_INT_OVRFLW_FGPI_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[18]); -+ -+ if (stat_l & MSI_INT_OVRFLW_FGPI_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[19]); -+ -+ if (stat_l & MSI_INT_OVRFLW_FGPI_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[20]); -+ -+ if (stat_l & MSI_INT_OVRFLW_FGPI_3) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[21]); -+ -+ if (stat_l & MSI_INT_OVRFLW_AI_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[22]); -+ -+ if (stat_l & MSI_INT_OVRFLW_AI_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[23]); -+ -+ if (stat_l & MSI_INT_AVINT_VI0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[24]); -+ -+ if (stat_l & MSI_INT_AVINT_VI1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[25]); -+ -+ if (stat_l & MSI_INT_AVINT_FGPI_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[26]); -+ -+ if (stat_l & MSI_INT_AVINT_FGPI_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[27]); -+ -+ if (stat_l & MSI_INT_AVINT_FGPI_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[28]); -+ -+ if (stat_l & MSI_INT_AVINT_FGPI_3) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[29]); -+ -+ if (stat_l & MSI_INT_AVINT_AI_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[30]); -+ -+ if (stat_l & MSI_INT_AVINT_AI_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[31]); -+ -+ if (stat_h & MSI_INT_UNMAPD_TC_INT) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[32]); -+ -+ if (stat_h & MSI_INT_EXTINT_0) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[33]); -+ -+ if (stat_h & MSI_INT_EXTINT_1) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[34]); -+ -+ if (stat_h & MSI_INT_EXTINT_2) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[35]); -+ -+ if (stat_h & MSI_INT_EXTINT_3) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[36]); -+ -+ if (stat_h & MSI_INT_EXTINT_4) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[37]); -+ -+ if (stat_h & MSI_INT_EXTINT_5) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[38]); -+ -+ if (stat_h & MSI_INT_EXTINT_6) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[39]); -+ -+ if (stat_h & MSI_INT_EXTINT_7) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[40]); -+ -+ if (stat_h & MSI_INT_EXTINT_8) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[41]); -+ -+ if (stat_h & MSI_INT_EXTINT_9) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[42]); -+ -+ if (stat_h & MSI_INT_EXTINT_10) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[43]); -+ -+ if (stat_h & MSI_INT_EXTINT_11) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[44]); -+ -+ if (stat_h & MSI_INT_EXTINT_12) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[45]); -+ -+ if (stat_h & MSI_INT_EXTINT_13) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[46]); -+ -+ if (stat_h & MSI_INT_EXTINT_14) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[47]); -+ -+ if (stat_h & MSI_INT_EXTINT_15) -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[48]); -+ -+ if (stat_h & MSI_INT_I2CINT_0) { -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[49]); -+ saa716x_i2c_irqevent(saa716x, 0); -+ } -+ -+ if (stat_h & MSI_INT_I2CINT_1) { -+ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[50]); -+ saa716x_i2c_irqevent(saa716x, 1); -+ } -+ -+ dprintk(SAA716x_DEBUG, 0, "\n"); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_msi_event); -+ -+int saa716x_msi_init(struct saa716x_dev *saa716x) -+{ -+ u32 ena_l, ena_h, sta_l, sta_h, mid; -+ int i; -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing MSI .."); -+ saa716x->handlers = 0; -+ -+ /* get module id & version */ -+ mid = SAA716x_EPRD(MSI, MSI_MODULE_ID); -+ if (mid != 0x30100) -+ dprintk(SAA716x_ERROR, 1, "MSI Id<%04x> is not supported", mid); -+ -+ /* let HW take care of MSI race */ -+ SAA716x_EPWR(MSI, MSI_DELAY_TIMER, 0x0); -+ -+ /* INTA Polarity: Active High */ -+ SAA716x_EPWR(MSI, MSI_INTA_POLARITY, MSI_INTA_POLARITY_HIGH); -+ -+ /* -+ * IRQ Edge Rising: 25:24 = 0x01 -+ * Traffic Class: 18:16 = 0x00 -+ * MSI ID: 4:0 = 0x00 -+ */ -+ for (i = 0; i < SAA716x_MSI_VECTORS; i++) -+ SAA716x_EPWR(MSI, MSI_CONFIG_REG[i], MSI_INT_POL_EDGE_RISE); -+ -+ /* get Status */ -+ ena_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); -+ ena_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); -+ sta_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); -+ sta_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); -+ -+ /* disable and clear enabled and asserted IRQ's */ -+ if (sta_l) -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, sta_l); -+ -+ if (sta_h) -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, sta_h); -+ -+ if (ena_l) -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_L, ena_l); -+ -+ if (ena_h) -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, ena_h); -+ -+ msleep(5); -+ -+ /* Check IRQ's really disabled */ -+ ena_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); -+ ena_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); -+ sta_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); -+ sta_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); -+ -+ if ((ena_l == 0) && (ena_h == 0) && (sta_l == 0) && (sta_h == 0)) { -+ dprintk(SAA716x_DEBUG, 1, "Interrupts ena_l <%02x> ena_h <%02x> sta_l <%02x> sta_h <%02x>", -+ ena_l, ena_h, sta_l, sta_h); -+ -+ return 0; -+ } else { -+ dprintk(SAA716x_DEBUG, 1, "I/O error"); -+ return -EIO; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_msi_init); -+ -+void saa716x_msiint_disable(struct saa716x_dev *saa716x) -+{ -+ dprintk(SAA716x_DEBUG, 1, "Disabling Interrupts ..."); -+ -+ SAA716x_EPWR(MSI, MSI_INT_ENA_L, 0x0); -+ SAA716x_EPWR(MSI, MSI_INT_ENA_H, 0x0); -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, 0xffffffff); -+ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, 0x0000ffff); -+} -+EXPORT_SYMBOL_GPL(saa716x_msiint_disable); -+ -+ -+/* Map the given vector Id to the hardware bitmask. */ -+static void saa716x_map_vector(struct saa716x_dev *saa716x, int vector, u32 *mask_l, u32 *mask_h) -+{ -+ u32 tmp = 1; -+ -+ if (vector < 32) { -+ /* Bits 0 - 31 */ -+ tmp <<= vector; -+ *mask_l = tmp; -+ *mask_h = 0; -+ } else { -+ /* Bits 32 - 48 */ -+ tmp <<= vector - 32; -+ *mask_l = 0; -+ *mask_h = tmp; -+ } -+} -+ -+int saa716x_add_irqvector(struct saa716x_dev *saa716x, -+ int vector, -+ enum saa716x_edge edge, -+ irqreturn_t (*handler)(int irq, void *dev_id), -+ char *desc) -+{ -+ struct saa716x_msix_entry *msix_handler = NULL; -+ -+ u32 config, mask_l, mask_h, ena_l, ena_h; -+ -+ BUG_ON(saa716x == NULL); -+ BUG_ON(vector > SAA716x_MSI_VECTORS); -+ dprintk(SAA716x_DEBUG, 1, "Adding Vector %d <%s>", vector, vector_name[vector]); -+ -+ if ((vector > 32) && (vector < 49)) { -+ config = SAA716x_EPRD(MSI, MSI_CONFIG_REG[vector]); -+ config &= 0xfcffffff; /* clear polarity */ -+ -+ switch (edge) { -+ default: -+ case SAA716x_EDGE_RISING: -+ SAA716x_EPWR(MSI, MSI_CONFIG_REG[vector], config | 0x01000000); -+ break; -+ -+ case SAA716x_EDGE_FALLING: -+ SAA716x_EPWR(MSI, MSI_CONFIG_REG[vector], config | 0x02000000); -+ break; -+ -+ case SAA716x_EDGE_ANY: -+ SAA716x_EPWR(MSI, MSI_CONFIG_REG[vector], config | 0x03000000); -+ break; -+ } -+ } -+ -+ saa716x_map_vector(saa716x, vector, &mask_l, &mask_h); -+ -+ /* add callback */ -+ msix_handler = &saa716x->saa716x_msix_handler[saa716x->handlers]; -+ strcpy(msix_handler->desc, desc); -+ msix_handler->vector = vector; -+ msix_handler->handler = handler; -+ saa716x->handlers++; -+ -+ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_L, mask_l); -+ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, mask_h); -+ -+ ena_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); -+ ena_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); -+ dprintk(SAA716x_DEBUG, 1, "Interrupts ena_l <%02x> ena_h <%02x>", ena_l, ena_h); -+ -+ return 0; -+} -+ -+int saa716x_remove_irqvector(struct saa716x_dev *saa716x, int vector) -+{ -+ struct saa716x_msix_entry *msix_handler; -+ int i; -+ u32 mask_l, mask_h; -+ -+ msix_handler = &saa716x->saa716x_msix_handler[saa716x->handlers]; -+ BUG_ON(msix_handler == NULL); -+ dprintk(SAA716x_DEBUG, 1, "Removing Vector %d <%s>", vector, vector_name[vector]); -+ -+ /* loop through the registered handlers */ -+ for (i = 0; i < saa716x->handlers; i++) { -+ -+ /* we found our vector */ -+ if (msix_handler->vector == vector) { -+ BUG_ON(msix_handler->handler == NULL); /* no handler yet */ -+ dprintk(SAA716x_DEBUG, 1, "Vector %d <%s> removed", -+ msix_handler->vector, -+ msix_handler->desc); -+ -+ /* check whether it is already released */ -+ if (msix_handler->handler) { -+ msix_handler->vector = 0; -+ msix_handler->handler = NULL; -+ saa716x->handlers--; -+ } -+ } -+ } -+ -+ saa716x_map_vector(saa716x, vector, &mask_l, &mask_h); -+ -+ /* disable vector */ -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_L, mask_l); -+ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, mask_h); -+ -+ return 0; -+} -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.h 2013-01-16 10:41:10.923798196 +0100 -@@ -0,0 +1,87 @@ -+#ifndef __SAA716x_MSI_H -+#define __SAA716x_MSI_H -+ -+#define TAGACK_VI0_0 0x000 -+#define TAGACK_VI0_1 0x001 -+#define TAGACK_VI0_2 0x002 -+#define TAGACK_VI1_0 0x003 -+#define TAGACK_VI1_1 0x004 -+#define TAGACK_VI1_2 0x005 -+#define TAGACK_FGPI_0 0x006 -+#define TAGACK_FGPI_1 0x007 -+#define TAGACK_FGPI_2 0x008 -+#define TAGACK_FGPI_3 0x009 -+#define TAGACK_AI_0 0x00a -+#define TAGACK_AI_1 0x00b -+#define OVRFLW_VI0_0 0x00c -+#define OVRFLW_VI0_1 0x00d -+#define OVRFLW_VI0_2 0x00e -+#define OVRFLW_VI1_0 0x00f -+#define OVRFLW_VI1_1 0x010 -+#define OVRFLW_VI1_2 0x011 -+#define OVRFLW_FGPI_O 0x012 -+#define OVRFLW_FGPI_1 0x013 -+#define OVRFLW_FGPI_2 0x014 -+#define OVRFLW_FGPI_3 0x015 -+#define OVRFLW_AI_0 0x016 -+#define OVRFLW_AI_1 0x017 -+#define AVINT_VI0 0x018 -+#define AVINT_VI1 0x019 -+#define AVINT_FGPI_0 0x01a -+#define AVINT_FGPI_1 0x01b -+#define AVINT_FGPI_2 0x01c -+#define AVINT_FGPI_3 0x01d -+#define AVINT_AI_0 0x01e -+#define AVINT_AI_1 0x01f -+#define UNMAPD_TC_INT 0x020 -+#define EXTINT_0 0x021 -+#define EXTINT_1 0x022 -+#define EXTINT_2 0x023 -+#define EXTINT_3 0x024 -+#define EXTINT_4 0x025 -+#define EXTINT_5 0x026 -+#define EXTINT_6 0x027 -+#define EXTINT_7 0x028 -+#define EXTINT_8 0x029 -+#define EXTINT_9 0x02a -+#define EXTINT_10 0x02b -+#define EXTINT_11 0x02c -+#define EXTINT_12 0x02d -+#define EXTINT_13 0x02e -+#define EXTINT_14 0x02f -+#define EXTINT_15 0x030 -+#define I2CINT_0 0x031 -+#define I2CINT_1 0x032 -+ -+#define SAA716x_TC0 0x000 -+#define SAA716x_TC1 0x001 -+#define SAA716x_TC2 0x002 -+#define SAA716x_TC3 0x003 -+#define SAA716x_TC4 0x004 -+#define SAA716x_TC5 0x005 -+#define SAA716x_TC6 0x006 -+#define SAA716x_TC7 0x007 -+ -+ -+enum saa716x_edge { -+ SAA716x_EDGE_RISING = 1, -+ SAA716x_EDGE_FALLING = 2, -+ SAA716x_EDGE_ANY = 3 -+}; -+ -+struct saa716x_dev; -+ -+extern int saa716x_msi_event(struct saa716x_dev *saa716x, u32 stat_l, u32 stat_h); -+ -+extern int saa716x_msi_init(struct saa716x_dev *saa716x); -+extern void saa716x_msiint_disable(struct saa716x_dev *saa716x); -+ -+extern int saa716x_add_irqvector(struct saa716x_dev *saa716x, -+ int vector, -+ enum saa716x_edge edge, -+ irqreturn_t (*handler)(int irq, void *dev_id), -+ char *desc); -+ -+extern int saa716x_remove_irqvector(struct saa716x_dev *saa716x, int vector); -+ -+#endif /* __SAA716x_MSI_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_msi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_msi_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi_reg.h 2013-01-16 10:41:10.923798196 +0100 -@@ -0,0 +1,143 @@ -+#ifndef __SAA716x_MSI_REG_H -+#define __SAA716x_MSI_REG_H -+ -+/* -------------- MSI Registers -------------- */ -+ -+#define MSI_DELAY_TIMER 0x000 -+#define MSI_DELAY_1CLK (0x00000001 << 0) -+#define MSI_DELAY_2CLK (0x00000002 << 0) -+ -+#define MSI_INTA_POLARITY 0x004 -+#define MSI_INTA_POLARITY_HIGH (0x00000001 << 0) -+ -+#define MSI_CONFIG0 0x008 -+#define MSI_CONFIG1 0x00c -+#define MSI_CONFIG2 0x010 -+#define MSI_CONFIG3 0x014 -+#define MSI_CONFIG4 0x018 -+#define MSI_CONFIG5 0x01c -+#define MSI_CONFIG6 0x020 -+#define MSI_CONFIG7 0x024 -+#define MSI_CONFIG8 0x028 -+#define MSI_CONFIG9 0x02c -+#define MSI_CONFIG10 0x030 -+#define MSI_CONFIG11 0x034 -+#define MSI_CONFIG12 0x038 -+#define MSI_CONFIG13 0x03c -+#define MSI_CONFIG14 0x040 -+#define MSI_CONFIG15 0x044 -+#define MSI_CONFIG16 0x048 -+#define MSI_CONFIG17 0x04c -+#define MSI_CONFIG18 0x050 -+#define MSI_CONFIG19 0x054 -+#define MSI_CONFIG20 0x058 -+#define MSI_CONFIG21 0x05c -+#define MSI_CONFIG22 0x060 -+#define MSI_CONFIG23 0x064 -+#define MSI_CONFIG24 0x068 -+#define MSI_CONFIG25 0x06c -+#define MSI_CONFIG26 0x070 -+#define MSI_CONFIG27 0x074 -+#define MSI_CONFIG28 0x078 -+#define MSI_CONFIG29 0x07c -+#define MSI_CONFIG30 0x080 -+#define MSI_CONFIG31 0x084 -+#define MSI_CONFIG32 0x088 -+#define MSI_CONFIG33 0x08c -+#define MSI_CONFIG34 0x090 -+#define MSI_CONFIG35 0x094 -+#define MSI_CONFIG36 0x098 -+#define MSI_CONFIG37 0x09c -+#define MSI_CONFIG38 0x0a0 -+#define MSI_CONFIG39 0x0a4 -+#define MSI_CONFIG40 0x0a8 -+#define MSI_CONFIG41 0x0ac -+#define MSI_CONFIG42 0x0b0 -+#define MSI_CONFIG43 0x0b4 -+#define MSI_CONFIG44 0x0b8 -+#define MSI_CONFIG45 0x0bc -+#define MSI_CONFIG46 0x0c0 -+#define MSI_CONFIG47 0x0c4 -+#define MSI_CONFIG48 0x0c8 -+#define MSI_CONFIG49 0x0cc -+#define MSI_CONFIG50 0x0d0 -+ -+#define MSI_INT_POL_EDGE_RISE (0x00000001 << 24) -+#define MSI_INT_POL_EDGE_FALL (0x00000002 << 24) -+#define MSI_INT_POL_EDGE_ANY (0x00000003 << 24) -+#define MSI_TC (0x00000007 << 16) -+#define MSI_ID (0x0000000f << 0) -+ -+#define MSI_INT_STATUS_L 0xfc0 -+#define MSI_INT_TAGACK_VI0_0 (0x00000001 << 0) -+#define MSI_INT_TAGACK_VI0_1 (0x00000001 << 1) -+#define MSI_INT_TAGACK_VI0_2 (0x00000001 << 2) -+#define MSI_INT_TAGACK_VI1_0 (0x00000001 << 3) -+#define MSI_INT_TAGACK_VI1_1 (0x00000001 << 4) -+#define MSI_INT_TAGACK_VI1_2 (0x00000001 << 5) -+#define MSI_INT_TAGACK_FGPI_0 (0x00000001 << 6) -+#define MSI_INT_TAGACK_FGPI_1 (0x00000001 << 7) -+#define MSI_INT_TAGACK_FGPI_2 (0x00000001 << 8) -+#define MSI_INT_TAGACK_FGPI_3 (0x00000001 << 9) -+#define MSI_INT_TAGACK_AI_0 (0x00000001 << 10) -+#define MSI_INT_TAGACK_AI_1 (0x00000001 << 11) -+#define MSI_INT_OVRFLW_VI0_0 (0x00000001 << 12) -+#define MSI_INT_OVRFLW_VI0_1 (0x00000001 << 13) -+#define MSI_INT_OVRFLW_VI0_2 (0x00000001 << 14) -+#define MSI_INT_OVRFLW_VI1_0 (0x00000001 << 15) -+#define MSI_INT_OVRFLW_VI1_1 (0x00000001 << 16) -+#define MSI_INT_OVRFLW_VI1_2 (0x00000001 << 17) -+#define MSI_INT_OVRFLW_FGPI_0 (0x00000001 << 18) -+#define MSI_INT_OVRFLW_FGPI_1 (0x00000001 << 19) -+#define MSI_INT_OVRFLW_FGPI_2 (0x00000001 << 20) -+#define MSI_INT_OVRFLW_FGPI_3 (0x00000001 << 21) -+#define MSI_INT_OVRFLW_AI_0 (0x00000001 << 22) -+#define MSI_INT_OVRFLW_AI_1 (0x00000001 << 23) -+#define MSI_INT_AVINT_VI0 (0x00000001 << 24) -+#define MSI_INT_AVINT_VI1 (0x00000001 << 25) -+#define MSI_INT_AVINT_FGPI_0 (0x00000001 << 26) -+#define MSI_INT_AVINT_FGPI_1 (0x00000001 << 27) -+#define MSI_INT_AVINT_FGPI_2 (0x00000001 << 28) -+#define MSI_INT_AVINT_FGPI_3 (0x00000001 << 29) -+#define MSI_INT_AVINT_AI_0 (0x00000001 << 30) -+#define MSI_INT_AVINT_AI_1 (0x00000001 << 31) -+ -+#define MSI_INT_STATUS_H 0xfc4 -+#define MSI_INT_UNMAPD_TC_INT (0x00000001 << 0) -+#define MSI_INT_EXTINT_0 (0x00000001 << 1) -+#define MSI_INT_EXTINT_1 (0x00000001 << 2) -+#define MSI_INT_EXTINT_2 (0x00000001 << 3) -+#define MSI_INT_EXTINT_3 (0x00000001 << 4) -+#define MSI_INT_EXTINT_4 (0x00000001 << 5) -+#define MSI_INT_EXTINT_5 (0x00000001 << 6) -+#define MSI_INT_EXTINT_6 (0x00000001 << 7) -+#define MSI_INT_EXTINT_7 (0x00000001 << 8) -+#define MSI_INT_EXTINT_8 (0x00000001 << 9) -+#define MSI_INT_EXTINT_9 (0x00000001 << 10) -+#define MSI_INT_EXTINT_10 (0x00000001 << 11) -+#define MSI_INT_EXTINT_11 (0x00000001 << 12) -+#define MSI_INT_EXTINT_12 (0x00000001 << 13) -+#define MSI_INT_EXTINT_13 (0x00000001 << 14) -+#define MSI_INT_EXTINT_14 (0x00000001 << 15) -+#define MSI_INT_EXTINT_15 (0x00000001 << 16) -+#define MSI_INT_I2CINT_0 (0x00000001 << 17) -+#define MSI_INT_I2CINT_1 (0x00000001 << 18) -+ -+#define MSI_INT_STATUS_CLR_L 0xfc8 -+#define MSI_INT_STATUS_CLR_H 0xfcc -+#define MSI_INT_STATUS_SET_L 0xfd0 -+#define MSI_INT_STATUS_SET_H 0xfd4 -+#define MSI_INT_ENA_L 0xfd8 -+#define MSI_INT_ENA_H 0xfdc -+#define MSI_INT_ENA_CLR_L 0xfe0 -+#define MSI_INT_ENA_CLR_H 0xfe4 -+#define MSI_INT_ENA_SET_L 0xfe8 -+#define MSI_INT_ENA_SET_H 0xfec -+ -+#define MSI_SW_RST 0xff0 -+#define MSI_SW_RESET (0x0001 << 0) -+ -+#define MSI_MODULE_ID 0xffc -+ -+ -+#endif /* __SAA716x_MSI_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_pci.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_pci.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_pci.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_pci.c 2013-01-16 10:41:10.924798189 +0100 -@@ -0,0 +1,275 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "saa716x_spi.h" -+#include "saa716x_msi.h" -+#include "saa716x_priv.h" -+ -+#define DRIVER_NAME "SAA716x Core" -+ -+static irqreturn_t saa716x_msi_handler(int irq, void *dev_id) -+{ -+ return IRQ_HANDLED; -+} -+ -+static int saa716x_enable_msi(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ int err; -+ -+ err = pci_enable_msi(pdev); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "MSI enable failed <%d>", err); -+ return err; -+ } -+ -+ return err; -+} -+ -+static int saa716x_enable_msix(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ int i, ret = 0; -+ -+ for (i = 0; i < SAA716x_MSI_MAX_VECTORS; i++) -+ saa716x->msix_entries[i].entry = i; -+ -+ ret = pci_enable_msix(pdev, saa716x->msix_entries, SAA716x_MSI_MAX_VECTORS); -+ if (ret < 0) -+ dprintk(SAA716x_ERROR, 1, "MSI-X request failed <%d>", ret); -+ if (ret > 0) -+ dprintk(SAA716x_ERROR, 1, "Request exceeds available IRQ's <%d>", ret); -+ -+ return ret; -+} -+ -+static int saa716x_request_irq(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ struct saa716x_config *config = saa716x->config; -+ int i, ret = 0; -+ -+ if (saa716x->int_type == MODE_MSI) { -+ dprintk(SAA716x_DEBUG, 1, "Using MSI mode"); -+ ret = saa716x_enable_msi(saa716x); -+ } else if (saa716x->int_type == MODE_MSI_X) { -+ dprintk(SAA716x_DEBUG, 1, "Using MSI-X mode"); -+ ret = saa716x_enable_msix(saa716x); -+ } -+ -+ if (ret) { -+ dprintk(SAA716x_ERROR, 1, "INT-A Mode"); -+ saa716x->int_type = MODE_INTA; -+ } -+ -+ if (saa716x->int_type == MODE_MSI) { -+ ret = request_irq(pdev->irq, -+ config->irq_handler, -+ 0, -+ DRIVER_NAME, -+ saa716x); -+ -+ if (ret) { -+ pci_disable_msi(pdev); -+ dprintk(SAA716x_ERROR, 1, "MSI registration failed"); -+ ret = -EIO; -+ } -+ } -+ -+ if (saa716x->int_type == MODE_MSI_X) { -+ for (i = 0; SAA716x_MSI_MAX_VECTORS; i++) { -+ ret = request_irq(saa716x->msix_entries[i].vector, -+ saa716x->saa716x_msix_handler[i].handler, -+ IRQF_SHARED, -+ saa716x->saa716x_msix_handler[i].desc, -+ saa716x); -+ -+ dprintk(SAA716x_ERROR, 1, "%s @ 0x%p", saa716x->saa716x_msix_handler[i].desc, saa716x->saa716x_msix_handler[i].handler); -+ if (ret) { -+ dprintk(SAA716x_ERROR, 1, "%s MSI-X-%d registration failed <%d>", saa716x->saa716x_msix_handler[i].desc, i, ret); -+ return -1; -+ } -+ } -+ } -+ -+ if (saa716x->int_type == MODE_INTA) { -+ ret = request_irq(pdev->irq, -+ config->irq_handler, -+ IRQF_SHARED, -+ DRIVER_NAME, -+ saa716x); -+ if (ret < 0) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x IRQ registration failed <%d>", ret); -+ ret = -ENODEV; -+ } -+ } -+ -+ return ret; -+} -+ -+static void saa716x_free_irq(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ int i, vector; -+ -+ if (saa716x->int_type == MODE_MSI_X) { -+ -+ for (i = 0; i < SAA716x_MSI_MAX_VECTORS; i++) { -+ vector = saa716x->msix_entries[i].vector; -+ free_irq(vector, saa716x); -+ } -+ -+ pci_disable_msix(pdev); -+ -+ } else { -+ free_irq(pdev->irq, saa716x); -+ if (saa716x->int_type == MODE_MSI) -+ pci_disable_msi(pdev); -+ } -+} -+ -+int __devinit saa716x_pci_init(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ int err = 0, ret = -ENODEV, i, use_dac, pm_cap; -+ u32 msi_cap; -+ u8 revision; -+ -+ dprintk(SAA716x_ERROR, 1, "found a %s PCIe card", saa716x->config->model_name); -+ -+ err = pci_enable_device(pdev); -+ if (err != 0) { -+ ret = -ENODEV; -+ dprintk(SAA716x_ERROR, 1, "ERROR: PCI enable failed (%i)", err); -+ goto fail0; -+ } -+ -+ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { -+ use_dac = 1; -+ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); -+ if (err) { -+ dprintk(SAA716x_ERROR, 1, "Unable to obtain 64bit DMA"); -+ goto fail1; -+ } -+ } else if ((err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) { -+ dprintk(SAA716x_ERROR, 1, "Unable to obtain 32bit DMA"); -+ goto fail1; -+ } -+ -+ pci_set_master(pdev); -+ -+ pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); -+ if (pm_cap == 0) { -+ dprintk(SAA716x_ERROR, 1, "Cannot find Power Management Capability"); -+ err = -EIO; -+ goto fail1; -+ } -+ -+ if (!request_mem_region(pci_resource_start(pdev, 0), -+ pci_resource_len(pdev, 0), -+ DRIVER_NAME)) { -+ -+ dprintk(SAA716x_ERROR, 1, "BAR0 Request failed"); -+ ret = -ENODEV; -+ goto fail1; -+ } -+ saa716x->mmio = ioremap(pci_resource_start(pdev, 0), -+ pci_resource_len(pdev, 0)); -+ -+ if (!saa716x->mmio) { -+ dprintk(SAA716x_ERROR, 1, "Mem 0 remap failed"); -+ ret = -ENODEV; -+ goto fail2; -+ } -+ -+ for (i = 0; i < SAA716x_MSI_MAX_VECTORS; i++) -+ saa716x->msix_entries[i].entry = i; -+ -+ err = saa716x_request_irq(saa716x); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "SAA716x IRQ registration failed, err=%d", err); -+ ret = -ENODEV; -+ goto fail3; -+ } -+ -+ pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision); -+ pci_read_config_dword(pdev, 0x40, &msi_cap); -+ -+ saa716x->revision = revision; -+ -+ dprintk(SAA716x_ERROR, 0, " SAA%02x Rev %d [%04x:%04x], ", -+ saa716x->pdev->device, -+ revision, -+ saa716x->pdev->subsystem_vendor, -+ saa716x->pdev->subsystem_device); -+ -+ dprintk(SAA716x_ERROR, 0, -+ "irq: %d,\n mmio: 0x%p\n", -+ saa716x->pdev->irq, -+ saa716x->mmio); -+ -+ dprintk(SAA716x_ERROR, 0, " SAA%02x %sBit, MSI %s, MSI-X=%d msgs", -+ saa716x->pdev->device, -+ (((msi_cap >> 23) & 0x01) == 1 ? "64":"32"), -+ (((msi_cap >> 16) & 0x01) == 1 ? "Enabled" : "Disabled"), -+ (1 << ((msi_cap >> 17) & 0x07))); -+ -+ dprintk(SAA716x_ERROR, 0, "\n"); -+ -+ pci_set_drvdata(pdev, saa716x); -+ -+ return 0; -+ -+fail3: -+ dprintk(SAA716x_ERROR, 1, "Err: IO Unmap"); -+ if (saa716x->mmio) -+ iounmap(saa716x->mmio); -+fail2: -+ dprintk(SAA716x_ERROR, 1, "Err: Release regions"); -+ release_mem_region(pci_resource_start(pdev, 0), -+ pci_resource_len(pdev, 0)); -+ -+fail1: -+ dprintk(SAA716x_ERROR, 1, "Err: Disabling device"); -+ pci_disable_device(pdev); -+ -+fail0: -+ pci_set_drvdata(pdev, NULL); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(saa716x_pci_init); -+ -+void __devexit saa716x_pci_exit(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ -+ saa716x_free_irq(saa716x); -+ -+ dprintk(SAA716x_NOTICE, 1, "SAA%02x mem0: 0x%p", -+ saa716x->pdev->device, -+ saa716x->mmio); -+ -+ if (saa716x->mmio) { -+ iounmap(saa716x->mmio); -+ release_mem_region(pci_resource_start(pdev, 0), -+ pci_resource_len(pdev, 0)); -+ } -+ -+ pci_disable_device(pdev); -+ pci_set_drvdata(pdev, NULL); -+} -+EXPORT_SYMBOL_GPL(saa716x_pci_exit); -+ -+MODULE_DESCRIPTION("SAA716x bridge driver"); -+MODULE_AUTHOR("Manu Abraham"); -+MODULE_LICENSE("GPL"); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.c 2013-01-16 10:41:10.924798189 +0100 -@@ -0,0 +1,152 @@ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_phi_reg.h" -+ -+#include "saa716x_spi.h" -+#include "saa716x_phi.h" -+#include "saa716x_priv.h" -+ -+u32 PHI_0_REGS[] = { -+ PHI_0_MODE, -+ PHI_0_0_CONFIG, -+ PHI_0_1_CONFIG, -+ PHI_0_2_CONFIG, -+ PHI_0_3_CONFIG -+}; -+ -+u32 PHI_1_REGS[] = { -+ PHI_1_MODE, -+ PHI_1_0_CONFIG, -+ PHI_1_1_CONFIG, -+ PHI_1_2_CONFIG, -+ PHI_1_3_CONFIG, -+ PHI_1_4_CONFIG, -+ PHI_1_5_CONFIG, -+ PHI_1_6_CONFIG, -+ PHI_1_7_CONFIG -+}; -+ -+#define PHI_BASE(__port) (( \ -+ (__port == PHI_1) ? \ -+ PHI_1_BASE : \ -+ PHI_0_BASE \ -+)) -+ -+#define PHI_APERTURE(_port) (( \ -+ (__port == PHI_1) ? \ -+ PHI_1_APERTURE: \ -+ PHI_0_APERTURE \ -+)) -+ -+#define PHI_REG(__port, __reg) (( \ -+ (__port == PHI_1) ? \ -+ PHI_1_REGS[__reg] : \ -+ PHI_0_REGS[__reg] \ -+)) -+ -+#define PHI_SLAVE(__port, __slave) (( \ -+ PHI_BASE(__port) + (__slave * (PHI_APERTURE(__port))) \ -+)) -+ -+/* // Read SAA716x registers -+ * SAA716x_EPRD(PHI_0, PHI_REG(__port, __reg)) -+ * SAA716x_EPWR(PHI_1, PHI_REG(__port, __reg), __data) -+ * -+ * // Read slave registers -+ * SAA716x_EPRD(PHI_0, PHI_SLAVE(__port, __slave, __offset)) -+ * SAA716x_EPWR(PHI_1, PHI_SLAVE(__port, __slave, _offset), __data) -+ */ -+ -+int saa716x_init_phi(struct saa716x_dev *saa716x, u32 port, u8 slave) -+{ -+ int i; -+ -+ /* Reset */ -+ SAA716x_EPWR(PHI_0, PHI_SW_RST, 0x1); -+ -+ for (i = 0; i < 20; i++) { -+ msleep(1); -+ if (!(SAA716x_EPRD(PHI_0, PHI_SW_RST))) -+ break; -+ } -+ -+ return 0; -+} -+ -+int saa716x_phi_init(struct saa716x_dev *saa716x) -+{ -+ uint32_t value; -+ -+ /* init PHI 0 to FIFO mode */ -+ value = 0; -+ value |= PHI_FIFO_MODE; -+ SAA716x_EPWR(PHI_0, PHI_0_MODE, value); -+ -+ value = 0; -+ value |= 0x02; /* chip select 1 */ -+ value |= 0x00 << 8; /* ready mask */ -+ value |= 0x03 << 12; /* strobe time */ -+ value |= 0x06 << 20; /* cycle time */ -+ SAA716x_EPWR(PHI_0, PHI_0_0_CONFIG, value); -+ -+ /* init PHI 1 to SRAM mode, auto increment on */ -+ value = 0; -+ value |= PHI_AUTO_INCREMENT; -+ SAA716x_EPWR(PHI_0, PHI_1_MODE, value); -+ -+ value = 0; -+ value |= 0x01; /* chip select 0 */ -+ value |= 0x00 << 8; /* ready mask */ -+ value |= 0x03 << 12; /* strobe time */ -+ value |= 0x05 << 20; /* cycle time */ -+ SAA716x_EPWR(PHI_0, PHI_1_0_CONFIG, value); -+ -+ value = 0; -+ value |= PHI_ALE_POL; /* ALE is active high */ -+ SAA716x_EPWR(PHI_0, PHI_POLARITY, value); -+ -+ SAA716x_EPWR(PHI_0, PHI_TIMEOUT, 0x2a); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_phi_init); -+ -+int saa716x_phi_write(struct saa716x_dev *saa716x, u32 address, const u8 * data, int length) -+{ -+ int i; -+ -+ for (i = 0; i < length; i += 4) { -+ SAA716x_EPWR(PHI_1, address, *((u32 *) &data[i])); -+ address += 4; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_phi_write); -+ -+int saa716x_phi_read(struct saa716x_dev *saa716x, u32 address, u8 * data, int length) -+{ -+ int i; -+ -+ for (i = 0; i < length; i += 4) { -+ *((u32 *) &data[i]) = SAA716x_EPRD(PHI_1, address); -+ address += 4; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_phi_read); -+ -+int saa716x_phi_write_fifo(struct saa716x_dev *saa716x, const u8 * data, int length) -+{ -+ int i; -+ -+ for (i = 0; i < length; i += 4) { -+ SAA716x_EPWR(PHI_0, PHI_0_0_RW_0, *((u32 *) &data[i])); -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_phi_write_fifo); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.h 2013-01-16 10:41:10.924798189 +0100 -@@ -0,0 +1,39 @@ -+#ifndef __SAA716x_PHI_H -+#define __SAA716x_PHI_H -+ -+/* PHI SLAVE */ -+#define PHI_SLAVE_0 0 -+#define PHI_SLAVE_1 1 -+#define PHI_SLAVE_2 2 -+#define PHI_SLAVE_3 3 -+#define PHI_SLAVE_4 4 -+#define PHI_SLAVE_5 5 -+#define PHI_SLAVE_6 6 -+#define PHI_SLAVE_7 7 -+ -+/* PHI_REG */ -+#define PHI_MODE 0 -+#define PHI_CONFIG_0 1 -+#define PHI_CONFIG_1 2 -+#define PHI_CONFIG_2 3 -+#define PHI_CONFIG_3 4 -+#define PHI_CONFIG_4 5 -+#define PHI_CONFIG_5 6 -+#define PHI_CONFIG_6 7 -+#define PHI_CONFIG_7 8 -+ -+#define PHI_0_BASE 0x1000 -+#define PHI_0_APERTURE 0x0800 -+ -+#define PHI_1_BASE 0x0000 -+#define PHI_1_APERTURE 0xfffc -+ -+struct saa716x_dev; -+ -+extern int saa716x_init_phi(struct saa716x_dev *saa716x, u32 port, u8 slave); -+extern int saa716x_phi_init(struct saa716x_dev *saa716x); -+extern int saa716x_phi_write(struct saa716x_dev *saa716x, u32 address, const u8 *data, int length); -+extern int saa716x_phi_read(struct saa716x_dev *saa716x, u32 address, u8 *data, int length); -+extern int saa716x_phi_write_fifo(struct saa716x_dev *saa716x, const u8 * data, int length); -+ -+#endif /* __SAA716x_PHI_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_phi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_phi_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi_reg.h 2013-01-16 10:41:10.925798182 +0100 -@@ -0,0 +1,100 @@ -+#ifndef __SAA716x_PHI_REG_H -+#define __SAA716x_PHI_REG_H -+ -+/* -------------- PHI_0 Registers -------------- */ -+ -+#define PHI_0_MODE 0x0000 -+#define PHI_0_0_CONFIG 0x0008 -+#define PHI_0_1_CONFIG 0x000c -+#define PHI_0_2_CONFIG 0x0010 -+#define PHI_0_3_CONFIG 0x0014 -+ -+#define PHI_POLARITY 0x0038 -+#define PHI_TIMEOUT 0x003c -+#define PHI_SW_RST 0x0ff0 -+ -+#define PHI_0_0_RW_0 0x1000 -+#define PHI_0_0_RW_511 0x17fc -+ -+#define PHI_0_1_RW_0 0x1800 -+#define PHI_0_1_RW_511 0x1ffc -+ -+#define PHI_0_2_RW_0 0x2000 -+#define PHI_0_2_RW_511 0x27fc -+ -+#define PHI_0_3_RW_0 0x2800 -+#define PHI_0_3_RW_511 0x2ffc -+ -+#define PHI_CSN_DEASSERT (0x00000001 << 2) -+#define PHI_AUTO_INCREMENT (0x00000001 << 1) -+#define PHI_FIFO_MODE (0x00000001 << 0) -+ -+#define PHI_DELAY_RD_WR (0x0000001f << 27) -+#define PHI_EXTEND_RDY3 (0x00000003 << 25) -+#define PHI_EXTEND_RDY2 (0x00000003 << 23) -+#define PHI_EXTEND_RDY1 (0x00000003 << 21) -+#define PHI_EXTEND_RDY0 (0x00000003 << 19) -+#define PHI_RDY3_OD (0x00000001 << 18) -+#define PHI_RDY2_OD (0x00000001 << 17) -+#define PHI_RDY1_OD (0x00000001 << 16) -+#define PHI_RDY0_OD (0x00000001 << 15) -+#define PHI_ALE_POL (0x00000001 << 14) -+#define PHI_WRN_POL (0x00000001 << 13) -+#define PHI_RDN_POL (0x00000001 << 12) -+#define PHI_RDY3_POL (0x00000001 << 11) -+#define PHI_RDY2_POL (0x00000001 << 10) -+#define PHI_RDY1_POL (0x00000001 << 9) -+#define PHI_RDY0_POL (0x00000001 << 8) -+#define PHI_CSN7_POL (0x00000001 << 7) -+#define PHI_CSN6_POL (0x00000001 << 6) -+#define PHI_CSN5_POL (0x00000001 << 5) -+#define PHI_CSN4_POL (0x00000001 << 4) -+#define PHI_CSN3_POL (0x00000001 << 3) -+#define PHI_CSN2_POL (0x00000001 << 2) -+#define PHI_CSN1_POL (0x00000001 << 1) -+#define PHI_CSN0_POL (0x00000001 << 0) -+ -+/* -------------- PHI_1 Registers -------------- */ -+ -+#define PHI_1 0x00020000 -+ -+#define PHI_1_MODE 0x00004 -+#define PHI_1_0_CONFIG 0x00018 -+#define PHI_1_1_CONFIG 0x0001c -+#define PHI_1_2_CONFIG 0x00020 -+#define PHI_1_3_CONFIG 0x00024 -+#define PHI_1_4_CONFIG 0x00028 -+#define PHI_1_5_CONFIG 0x0002c -+#define PHI_1_6_CONFIG 0x00030 -+#define PHI_1_7_CONFIG 0x00034 -+ -+#define PHI_1_0_RW_0 0x00000 -+#define PHI_1_0_RW_16383 0x0fffc -+ -+#define PHI_1_1_RW_0 0x1000 -+#define PHI_1_1_RW_16383 0x1ffc -+ -+#define PHI_1_2_RW_0 0x2000 -+#define PHI_1_2_RW_16383 0x2ffc -+ -+#define PHI_1_3_RW_0 0x3000 -+#define PHI_1_3_RW_16383 0x3ffc -+ -+#define PHI_1_4_RW_0 0x4000 -+#define PHI_1_4_RW_16383 0x4ffc -+ -+#define PHI_1_5_RW_0 0x5000 -+#define PHI_1_5_RW_16383 0x5ffc -+ -+#define PHI_1_6_RW_0 0x6000 -+#define PHI_1_6_RW_16383 0x6ffc -+ -+#define PHI_1_7_RW_0 0x7000 -+#define PHI_1_7_RW_16383 0x7ffc -+ -+ -+/* BAR = 20 bits */ -+/* -------------- PHI1 Registers -------------- */ -+ -+ -+#endif /* __SAA716x_PHI_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_priv.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_priv.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_priv.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_priv.h 2013-01-16 10:41:10.925798182 +0100 -@@ -0,0 +1,194 @@ -+#ifndef __SAA716x_PRIV_H -+#define __SAA716x_PRIV_H -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include "saa716x_i2c.h" -+#include "saa716x_boot.h" -+#include "saa716x_cgu.h" -+#include "saa716x_dma.h" -+#include "saa716x_fgpi.h" -+ -+#include "dvbdev.h" -+#include "dvb_demux.h" -+#include "dmxdev.h" -+#include "dvb_frontend.h" -+#include "dvb_net.h" -+ -+#define SAA716x_ERROR 0 -+#define SAA716x_NOTICE 1 -+#define SAA716x_INFO 2 -+#define SAA716x_DEBUG 3 -+ -+#define SAA716x_DEV (saa716x)->num -+#define SAA716x_VERBOSE (saa716x)->verbose -+#define SAA716x_MAX_ADAPTERS 4 -+ -+#define dprintk(__x, __y, __fmt, __arg...) do { \ -+ if (__y) { \ -+ if ((SAA716x_VERBOSE > SAA716x_ERROR) && (SAA716x_VERBOSE > __x)) \ -+ printk(KERN_ERR "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ -+ else if ((SAA716x_VERBOSE > SAA716x_NOTICE) && (SAA716x_VERBOSE > __x)) \ -+ printk(KERN_NOTICE "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ -+ else if ((SAA716x_VERBOSE > SAA716x_INFO) && (SAA716x_VERBOSE > __x)) \ -+ printk(KERN_INFO "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ -+ else if ((SAA716x_VERBOSE > SAA716x_DEBUG) && (SAA716x_VERBOSE > __x)) \ -+ printk(KERN_DEBUG "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ -+ } else { \ -+ if (SAA716x_VERBOSE > __x) \ -+ printk(__fmt , ##__arg); \ -+ } \ -+} while(0) -+ -+ -+#define NXP_SEMICONDUCTOR 0x1131 -+#define SAA7160 0x7160 -+#define SAA7161 0x7161 -+#define SAA7162 0x7162 -+ -+#define NXP_REFERENCE_BOARD 0x1131 -+ -+#define MAKE_ENTRY(__subven, __subdev, __chip, __configptr) { \ -+ .vendor = NXP_SEMICONDUCTOR, \ -+ .device = (__chip), \ -+ .subvendor = (__subven), \ -+ .subdevice = (__subdev), \ -+ .driver_data = (unsigned long) (__configptr) \ -+} -+ -+#define SAA716x_EPWR(__offst, __addr, __data) writel((__data), (saa716x->mmio + (__offst + __addr))) -+#define SAA716x_EPRD(__offst, __addr) readl((saa716x->mmio + (__offst + __addr))) -+ -+#define SAA716x_RCWR(__offst, __addr, __data) writel((__data), (saa716x->mmio + (__offst + __addr))) -+#define SAA716x_RCRD(__offst, __addr) readl((saa716x->mmio + (__offst + __addr))) -+ -+ -+#define SAA716x_MSI_MAX_VECTORS 16 -+ -+struct saa716x_msix_entry { -+ int vector; -+ u8 desc[32]; -+ irqreturn_t (*handler)(int irq, void *dev_id); -+}; -+ -+struct saa716x_dev; -+struct saa716x_adapter; -+struct saa716x_spi_config; -+ -+struct saa716x_adap_config { -+ u32 ts_port; -+ void (*worker)(unsigned long); -+}; -+ -+struct saa716x_config { -+ char *model_name; -+ char *dev_type; -+ -+ enum saa716x_boot_mode boot_mode; -+ -+ int adapters; -+ int frontends; -+ -+ int (*frontend_attach)(struct saa716x_adapter *adapter, int count); -+ irqreturn_t (*irq_handler)(int irq, void *dev_id); -+ -+ struct saa716x_adap_config adap_config[SAA716x_MAX_ADAPTERS]; -+ enum saa716x_i2c_rate i2c_rate; -+ enum saa716x_i2c_mode i2c_mode; -+}; -+ -+struct saa716x_adapter { -+ struct dvb_adapter dvb_adapter; -+ struct dvb_frontend *fe; -+ struct dvb_demux demux; -+ struct dmxdev dmxdev; -+ struct dmx_frontend fe_hw; -+ struct dmx_frontend fe_mem; -+ struct dvb_net dvb_net; -+ -+ struct saa716x_dev *saa716x; -+ -+ u8 feeds; -+ u8 count; -+}; -+ -+struct saa716x_dev { -+ struct saa716x_config *config; -+ struct pci_dev *pdev; -+ -+ int num; /* device count */ -+ int verbose; -+ -+ u8 revision; -+ -+ /* PCI */ -+ void __iomem *mmio; -+ -+#define MODE_INTA 0 -+#define MODE_MSI 1 -+#define MODE_MSI_X 2 -+ u8 int_type; -+ -+ struct msix_entry msix_entries[SAA716x_MSI_MAX_VECTORS]; -+ struct saa716x_msix_entry saa716x_msix_handler[56]; -+ u8 handlers; /* no. of active handlers */ -+ -+ /* I2C */ -+ struct saa716x_i2c i2c[2]; -+ u32 i2c_rate; /* init time */ -+ u32 I2C_DEV[2]; -+ -+ struct saa716x_spi_state *saa716x_spi; -+ struct saa716x_spi_config spi_config; -+ -+ struct saa716x_adapter saa716x_adap[SAA716x_MAX_ADAPTERS]; -+ struct mutex adap_lock; -+ struct saa716x_cgu cgu; -+ -+ spinlock_t gpio_lock; -+ /* DMA */ -+ -+ struct saa716x_fgpi_stream_port fgpi[4]; -+ -+ u32 id_offst; -+ u32 id_len; -+ void *priv; -+ -+ /* remote control */ -+ void *ir_priv; -+}; -+ -+/* PCI */ -+extern int saa716x_pci_init(struct saa716x_dev *saa716x); -+extern void saa716x_pci_exit(struct saa716x_dev *saa716x); -+ -+/* MSI */ -+extern int saa716x_msi_init(struct saa716x_dev *saa716x); -+extern void saa716x_msi_exit(struct saa716x_dev *saa716x); -+extern void saa716x_msiint_disable(struct saa716x_dev *saa716x); -+ -+/* DMA */ -+extern int saa716x_dma_init(struct saa716x_dev *saa716x); -+extern void saa716x_dma_exit(struct saa716x_dev *saa716x); -+ -+/* AUDIO */ -+extern int saa716x_audio_init(struct saa716x_dev *saa716x); -+extern void saa716x_audio_exit(struct saa716x_dev *saa716x); -+ -+/* Boot */ -+extern int saa716x_core_boot(struct saa716x_dev *saa716x); -+extern int saa716x_jetpack_init(struct saa716x_dev *saa716x); -+ -+/* Remote control */ -+extern int saa716x_ir_init(struct saa716x_dev *saa716x); -+extern void saa716x_ir_exit(struct saa716x_dev *saa716x); -+extern void saa716x_ir_handler(struct saa716x_dev *saa716x, u32 ir_cmd); -+ -+#endif /* __SAA716x_PRIV_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_reg.h 2013-01-16 10:41:10.925798182 +0100 -@@ -0,0 +1,1279 @@ -+#ifndef __SAA716x_REG_H -+#define __SAA716x_REG_H -+ -+/* BAR = 17 bits */ -+/* -+ VI0 0x00000000 -+ VI1 0x00001000 -+ FGPI0 0x00002000 -+ FGPI1 0x00003000 -+ FGPI2 0x00004000 -+ FGPI3 0x00005000 -+ AI0 0x00006000 -+ AI1 0x00007000 -+ BAM 0x00008000 -+ MMU 0x00009000 -+ MSI 0x0000a000 -+ I2C_B 0x0000b000 -+ I2C_A 0x0000c000 -+ SPI 0x0000d000 -+ GPIO 0x0000e000 -+ PHI_0 0x0000f000 -+ CGU 0x00013000 -+ DCS 0x00014000 -+ GREG 0x00012000 -+ -+ PHI_1 0x00020000 -+*/ -+ -+/* -------------- VIP Registers -------------- */ -+ -+#define VI0 0x00000000 -+#define VI1 0x00001000 -+ -+#define VI_MODE 0x000 -+#define VID_CFEN (0x00000003 << 30) -+#define VID_OSM (0x00000001 << 29) -+#define VID_FSEQ (0x00000001 << 28) -+#define AUX_CFEN (0x00000003 << 26) -+#define AUX_OSM (0x00000001 << 25) -+#define AUX_FSEQ (0x00000001 << 24) -+#define AUX_ANC_DATA (0x00000003 << 22) -+#define AUX_ANC_RAW (0x00000001 << 21) -+#define RST_ON_ERR (0x00000001 << 17) -+#define SOFT_RESET (0x00000001 << 16) -+#define IFF_CLAMP (0x00000001 << 14) -+#define IFF_MODE (0x00000003 << 12) -+#define DFF_CLAMP (0x00000001 << 10) -+#define DFF_MODE (0x00000003 << 8) -+#define HSP_CLAMP (0x00000001 << 3) -+#define HSP_RGB (0x00000001 << 2) -+#define HSP_MODE (0x00000003 << 0) -+ -+#define RCRB_CTRL 0x004 -+#define RCRB_CFG_ADDR 0x008 -+#define RCRB_CFG_EXT_ADDR 0x00c -+#define RCRB_IO_ADDR 0x010 -+#define RCRB_MEM_LADDR 0x014 -+#define RCRB_MEM_UADDR 0x018 -+#define RCRB_DATA 0x01c -+#define RCRB_MASK 0x020 -+#define RCRB_MSG_HDR 0x040 -+#define RCRB_MSG_PL0 0x044 -+#define RCRB_MSG_PL1 0x048 -+ -+#define ID_MASK0 0x020 -+#define VI_ID_MASK_0 (0x000000ff << 8) -+#define VI_DATA_ID_0 (0x000000ff << 0) -+ -+#define ID_MASK1 0x024 -+#define VI_ID_MASK_1 (0x000000ff << 8) -+#define VI_DATA_ID_1 (0x000000ff << 0) -+ -+#define VIP_LINE_THRESH 0x040 -+#define VI_LCTHR (0x000007ff << 0) -+ -+#define VIN_FORMAT 0x100 -+#define VI_VSRA (0x00000003 << 30) -+#define VI_SYNCHD (0x00000001 << 25) -+#define VI_DUAL_STREAM (0x00000001 << 24) -+#define VI_NHDAUX (0x00000001 << 20) -+#define VI_NPAR (0x00000001 << 19) -+#define VI_VSEL (0x00000003 << 14) -+#define VI_TWOS (0x00000001 << 13) -+#define VI_TPG (0x00000001 << 12) -+#define VI_FREF (0x00000001 << 10) -+#define VI_FTGL (0x00000001 << 9) -+#define VI_SF (0x00000001 << 3) -+#define VI_FZERO (0x00000001 << 2) -+#define VI_REVS (0x00000001 << 1) -+#define VI_REHS (0x00000001 << 0) -+ -+#define TC76543210 0x800 -+#define TCFEDCBA98 0x804 -+#define PHYCFG 0x900 -+#define CONFIG 0xfd4 -+#define INT_ENABLE_CLR 0xfd8 -+#define INT_ENABLE_SET 0xfdc -+ -+ -+#define INT_STATUS 0xfe0 -+#define VI_STAT_FID_AUX (0x00000001 << 31) -+#define VI_STAT_FID_VID (0x00000001 << 30) -+#define VI_STAT_FID_VPI (0x00000001 << 29) -+#define VI_STAT_LINE_COUNT (0x00000fff << 16) -+#define VI_STAT_AUX_OVRFLW (0x00000001 << 9) -+#define VI_STAT_VID_OVRFLW (0x00000001 << 8) -+#define VI_STAT_WIN_SEQBRK (0x00000001 << 7) -+#define VI_STAT_FID_SEQBRK (0x00000001 << 6) -+#define VI_STAT_LINE_THRESH (0x00000001 << 5) -+#define VI_STAT_AUX_WRAP (0x00000001 << 4) -+#define VI_STAT_AUX_START_IN (0x00000001 << 3) -+#define VI_STAT_AUX_END_OUT (0x00000001 << 2) -+#define VI_STAT_VID_START_IN (0x00000001 << 1) -+#define VI_STAT_VID_END_OUT (0x00000001 << 0) -+ -+#define INT_ENABLE 0xfe4 -+#define VI_ENABLE_AUX_OVRFLW (0x00000001 << 9) -+#define VI_ENABLE_VID_OVRFLW (0x00000001 << 8) -+#define VI_ENABLE_WIN_SEQBRK (0x00000001 << 7) -+#define VI_ENABLE_FID_SEQBRK (0x00000001 << 6) -+#define VI_ENABLE_LINE_THRESH (0x00000001 << 5) -+#define VI_ENABLE_AUX_WRAP (0x00000001 << 4) -+#define VI_ENABLE_AUX_START_IN (0x00000001 << 3) -+#define VI_ENABLE_AUX_END_OUT (0x00000001 << 2) -+#define VI_ENABLE_VID_START_IN (0x00000001 << 1) -+#define VI_ENABLE_VID_END_OUT (0x00000001 << 0) -+ -+#define INT_CLR_STATUS 0xfe8 -+#define VI_CLR_STATUS_AUX_OVRFLW (0x00000001 << 9) -+#define VI_CLR_STATUS_VID_OVRFLW (0x00000001 << 8) -+#define VI_CLR_STATUS_WIN_SEQBRK (0x00000001 << 7) -+#define VI_CLR_STATUS_FID_SEQBRK (0x00000001 << 6) -+#define VI_CLR_STATUS_LINE_THRESH (0x00000001 << 5) -+#define VI_CLR_STATUS_AUX_WRAP (0x00000001 << 4) -+#define VI_CLR_STATUS_AUX_START_IN (0x00000001 << 3) -+#define VI_CLR_STATUS_AUX_END_OUT (0x00000001 << 2) -+#define VI_CLR_STATUS_VID_START_IN (0x00000001 << 1) -+#define VI_CLR_STATUS_VID_END_OUT (0x00000001 << 0) -+ -+#define INT_SET_STATUS 0xfec -+#define VI_SET_STATUS_AUX_OVRFLW (0x00000001 << 9) -+#define VI_SET_STATUS_VID_OVRFLW (0x00000001 << 8) -+#define VI_SET_STATUS_WIN_SEQBRK (0x00000001 << 7) -+#define VI_SET_STATUS_FID_SEQBRK (0x00000001 << 6) -+#define VI_SET_STATUS_LINE_THRESH (0x00000001 << 5) -+#define VI_SET_STATUS_AUX_WRAP (0x00000001 << 4) -+#define VI_SET_STATUS_AUX_START_IN (0x00000001 << 3) -+#define VI_SET_STATUS_AUX_END_OUT (0x00000001 << 2) -+#define VI_SET_STATUS_VID_START_IN (0x00000001 << 1) -+#define VI_SET_STATUS_VID_END_OUT (0x00000001 << 0) -+ -+#define VIP_POWER_DOWN 0xff4 -+#define VI_PWR_DWN (0x00000001 << 31) -+ -+ -+ -+ -+/* -------------- FGPI Registers -------------- */ -+ -+#define FGPI0 0x00002000 -+#define FGPI1 0x00003000 -+#define FGPI2 0x00004000 -+#define FGPI3 0x00005000 -+ -+#define FGPI_CONTROL 0x000 -+#define FGPI_CAPTURE_ENABLE_2 (0x00000001 << 13) -+#define FGPI_CAPTURE_ENABLE_1 (0x00000001 << 12) -+#define FGPI_MODE (0x00000001 << 11) -+#define FGPI_SAMPLE_SIZE (0x00000003 << 8) -+#define FGPI_BUF_SYNC_MSG_STOP (0x00000003 << 5) -+#define FGPI_REC_START_MSG_START (0x00000003 << 2) -+#define FGPI_TSTAMP_SELECT (0x00000001 << 1) -+#define FGPI_VAR_LENGTH (0x00000001 << 0) -+ -+#define FGPI_BASE_1 0x004 -+#define FGPI_BASE_2 0x008 -+#define FGPI_SIZE 0x00c -+#define FGPI_REC_SIZE 0x010 -+#define FGPI_STRIDE 0x014 -+#define FGPI_NUM_RECORD_1 0x018 -+#define FGPI_NUM_RECORD_2 0x01c -+#define FGPI_THRESHOLD_1 0x020 -+#define FGPI_THRESHOLD_2 0x024 -+#define FGPI_D1_XY_START 0x028 -+#define FGPI_D1_XY_END 0x02c -+ -+#define INT_STATUS 0xfe0 -+#define FGPI_BUF1_ACTIVE (0x00000001 << 7) -+#define FGPI_OVERFLOW (0x00000001 << 6) -+#define FGPI_MBE (0x00000001 << 5) -+#define FGPI_UNDERRUN (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED (0x00000001 << 2) -+#define FGPI_BUF2_FULL (0x00000001 << 1) -+#define FGPI_BUF1_FULL (0x00000001 << 0) -+ -+#define INT_ENABLE 0xfe4 -+#define FGPI_OVERFLOW_ENA (0x00000001 << 6) -+#define FGPI_MBE_ENA (0x00000001 << 5) -+#define FGPI_UNDERRUN_ENA (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED_ENA (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED_ENA (0x00000001 << 2) -+#define FGPI_BUF2_FULL_ENA (0x00000001 << 1) -+#define FGPI_BUF1_FULL_ENA (0x00000001 << 0) -+ -+#define INT_CLR_STATUS 0xfe8 -+#define FGPI_OVERFLOW_ACK (0x00000001 << 6) -+#define FGPI_MBE_ACK (0x00000001 << 5) -+#define FGPI_UNDERRUN_ACK (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED_ACK (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED_ACK (0x00000001 << 2) -+#define FGPI_BUF2_DONE_ACK (0x00000001 << 1) -+#define FGPI_BUF1_DONE_ACK (0x00000001 << 0) -+ -+#define INT_SET_STATUS 0xfec -+#define FGPI_OVERFLOW_SET (0x00000001 << 6) -+#define FGPI_MBE_SET (0x00000001 << 5) -+#define FGPI_UNDERRUN_SET (0x00000001 << 4) -+#define FGPI_THRESH2_REACHED_SET (0x00000001 << 3) -+#define FGPI_THRESH1_REACHED_SET (0x00000001 << 2) -+#define FGPI_BUF2_DONE_SET (0x00000001 << 1) -+#define FGPI_BUF1_DONE_SET (0x00000001 << 0) -+ -+#define FGPI_SOFT_RESET 0xff0 -+#define FGPI_SOFTWARE_RESET (0x00000001 << 0) -+ -+#define FGPI_INTERFACE 0xff4 -+#define FGPI_DISABLE_BUS_IF (0x00000001 << 0) -+ -+#define FGPI_MOD_ID_EXT 0xff8 -+#define FGPI_MODULE_ID 0xffc -+ -+ -+/* -------------- AI Registers ---------------- */ -+ -+#define AI0 0x00006000 -+#define AI1 0x00007000 -+ -+#define AI_STATUS 0x000 -+#define AI_BUF1_ACTIVE (0x00000001 << 4) -+#define AI_OVERRUN (0x00000001 << 3) -+#define AI_HBE (0x00000001 << 2) -+#define AI_BUF2_FULL (0x00000001 << 1) -+#define AI_BUF1_FULL (0x00000001 << 0) -+ -+#define AI_CTL 0x004 -+#define AI_RESET (0x00000001 << 31) -+#define AI_CAP_ENABLE (0x00000001 << 30) -+#define AI_CAP_MODE (0x00000003 << 28) -+#define AI_SIGN_CONVERT (0x00000001 << 27) -+#define AI_EARLYMODE (0x00000001 << 26) -+#define AI_DIAGMODE (0x00000001 << 25) -+#define AI_RAWMODE (0x00000001 << 24) -+#define AI_OVR_INTEN (0x00000001 << 7) -+#define AI_HBE_INTEN (0x00000001 << 6) -+#define AI_BUF2_INTEN (0x00000001 << 5) -+#define AI_BUF1_INTEN (0x00000001 << 4) -+#define AI_ACK_OVR (0x00000001 << 3) -+#define AI_ACK_HBE (0x00000001 << 2) -+#define AI_ACK2 (0x00000001 << 1) -+#define AI_ACK1 (0x00000001 << 0) -+ -+#define AI_SERIAL 0x008 -+#define AI_SER_MASTER (0x00000001 << 31) -+#define AI_DATAMODE (0x00000001 << 30) -+#define AI_FRAMEMODE (0x00000003 << 28) -+#define AI_CLOCK_EDGE (0x00000001 << 27) -+#define AI_SSPOS4 (0x00000001 << 19) -+#define AI_NR_CHAN (0x00000003 << 17) -+#define AI_WSDIV (0x000001ff << 8) -+#define AI_SCKDIV (0x000000ff << 0) -+ -+#define AI_FRAMING 0x00c -+#define AI_VALIDPOS (0x000001ff << 22) -+#define AI_LEFTPOS (0x000001ff << 13) -+#define AI_RIGHTPOS (0x000001ff << 4) -+#define AI_SSPOS_3_0 (0x0000000f << 0) -+ -+#define AI_BASE1 0x014 -+#define AI_BASE2 0x018 -+#define AI_BASE (0x03ffffff << 6) -+ -+#define AI_SIZE 0x01c -+#define AI_SAMPLE_SIZE (0x03ffffff << 6) -+ -+#define AI_INT_ACK 0x020 -+#define AI_ACK_OVR (0x00000001 << 3) -+#define AI_ACK_HBE (0x00000001 << 2) -+#define AI_ACK2 (0x00000001 << 1) -+#define AI_ACK1 (0x00000001 << 0) -+ -+#define AI_PWR_DOWN 0xff4 -+#define AI_PWR_DWN (0x00000001 << 0) -+ -+/* -------------- BAM Registers -------------- */ -+ -+#define BAM 0x00008000 -+ -+#define BAM_VI0_0_DMA_BUF_MODE 0x000 -+ -+#define BAM_VI0_0_ADDR_OFFST_0 0x004 -+#define BAM_VI0_0_ADDR_OFFST_1 0x008 -+#define BAM_VI0_0_ADDR_OFFST_2 0x00c -+#define BAM_VI0_0_ADDR_OFFST_3 0x010 -+#define BAM_VI0_0_ADDR_OFFST_4 0x014 -+#define BAM_VI0_0_ADDR_OFFST_5 0x018 -+#define BAM_VI0_0_ADDR_OFFST_6 0x01c -+#define BAM_VI0_0_ADDR_OFFST_7 0x020 -+ -+#define BAM_VI0_1_DMA_BUF_MODE 0x024 -+#define BAM_VI0_1_ADDR_OFFST_0 0x028 -+#define BAM_VI0_1_ADDR_OFFST_1 0x02c -+#define BAM_VI0_1_ADDR_OFFST_2 0x030 -+#define BAM_VI0_1_ADDR_OFFST_3 0x034 -+#define BAM_VI0_1_ADDR_OFFST_4 0x038 -+#define BAM_VI0_1_ADDR_OFFST_5 0x03c -+#define BAM_VI0_1_ADDR_OFFST_6 0x040 -+#define BAM_VI0_1_ADDR_OFFST_7 0x044 -+ -+#define BAM_VI0_2_DMA_BUF_MODE 0x048 -+#define BAM_VI0_2_ADDR_OFFST_0 0x04c -+#define BAM_VI0_2_ADDR_OFFST_1 0x050 -+#define BAM_VI0_2_ADDR_OFFST_2 0x054 -+#define BAM_VI0_2_ADDR_OFFST_3 0x058 -+#define BAM_VI0_2_ADDR_OFFST_4 0x05c -+#define BAM_VI0_2_ADDR_OFFST_5 0x060 -+#define BAM_VI0_2_ADDR_OFFST_6 0x064 -+#define BAM_VI0_2_ADDR_OFFST_7 0x068 -+ -+ -+#define BAM_VI1_0_DMA_BUF_MODE 0x06c -+#define BAM_VI1_0_ADDR_OFFST_0 0x070 -+#define BAM_VI1_0_ADDR_OFFST_1 0x074 -+#define BAM_VI1_0_ADDR_OFFST_2 0x078 -+#define BAM_VI1_0_ADDR_OFFST_3 0x07c -+#define BAM_VI1_0_ADDR_OFFST_4 0x080 -+#define BAM_VI1_0_ADDR_OFFST_5 0x084 -+#define BAM_VI1_0_ADDR_OFFST_6 0x088 -+#define BAM_VI1_0_ADDR_OFFST_7 0x08c -+ -+#define BAM_VI1_1_DMA_BUF_MODE 0x090 -+#define BAM_VI1_1_ADDR_OFFST_0 0x094 -+#define BAM_VI1_1_ADDR_OFFST_1 0x098 -+#define BAM_VI1_1_ADDR_OFFST_2 0x09c -+#define BAM_VI1_1_ADDR_OFFST_3 0x0a0 -+#define BAM_VI1_1_ADDR_OFFST_4 0x0a4 -+#define BAM_VI1_1_ADDR_OFFST_5 0x0a8 -+#define BAM_VI1_1_ADDR_OFFST_6 0x0ac -+#define BAM_VI1_1_ADDR_OFFST_7 0x0b0 -+ -+#define BAM_VI1_2_DMA_BUF_MODE 0x0b4 -+#define BAM_VI1_2_ADDR_OFFST_0 0x0b8 -+#define BAM_VI1_2_ADDR_OFFST_1 0x0bc -+#define BAM_VI1_2_ADDR_OFFST_2 0x0c0 -+#define BAM_VI1_2_ADDR_OFFST_3 0x0c4 -+#define BAM_VI1_2_ADDR_OFFST_4 0x0c8 -+#define BAM_VI1_2_ADDR_OFFST_5 0x0cc -+#define BAM_VI1_2_ADDR_OFFST_6 0x0d0 -+#define BAM_VI1_2_ADDR_OFFST_7 0x0d4 -+ -+ -+#define BAM_FGPI0_DMA_BUF_MODE 0x0d8 -+#define BAM_FGPI0_ADDR_OFFST_0 0x0dc -+#define BAM_FGPI0_ADDR_OFFST_1 0x0e0 -+#define BAM_FGPI0_ADDR_OFFST_2 0x0e4 -+#define BAM_FGPI0_ADDR_OFFST_3 0x0e8 -+#define BAM_FGPI0_ADDR_OFFST_4 0x0ec -+#define BAM_FGPI0_ADDR_OFFST_5 0x0f0 -+#define BAM_FGPI0_ADDR_OFFST_6 0x0f4 -+#define BAM_FGPI0_ADDR_OFFST_7 0x0f8 -+ -+#define BAM_FGPI1_DMA_BUF_MODE 0x0fc -+#define BAM_FGPI1_ADDR_OFFST_0 0x100 -+#define BAM_FGPI1_ADDR_OFFST_1 0x104 -+#define BAM_FGPI1_ADDR_OFFST_2 0x108 -+#define BAM_FGPI1_ADDR_OFFST_3 0x10c -+#define BAM_FGPI1_ADDR_OFFST_4 0x110 -+#define BAM_FGPI1_ADDR_OFFST_5 0x114 -+#define BAM_FGPI1_ADDR_OFFST_6 0x118 -+#define BAM_FGPI1_ADDR_OFFST_7 0x11c -+ -+#define BAM_FGPI2_DMA_BUF_MODE 0x120 -+#define BAM_FGPI2_ADDR_OFFST_0 0x124 -+#define BAM_FGPI2_ADDR_OFFST_1 0x128 -+#define BAM_FGPI2_ADDR_OFFST_2 0x12c -+#define BAM_FGPI2_ADDR_OFFST_3 0x130 -+#define BAM_FGPI2_ADDR_OFFST_4 0x134 -+#define BAM_FGPI2_ADDR_OFFST_5 0x138 -+#define BAM_FGPI2_ADDR_OFFST_6 0x13c -+#define BAM_FGPI2_ADDR_OFFST_7 0x140 -+ -+#define BAM_FGPI3_DMA_BUF_MODE 0x144 -+#define BAM_FGPI3_ADDR_OFFST_0 0x148 -+#define BAM_FGPI3_ADDR_OFFST_1 0x14c -+#define BAM_FGPI3_ADDR_OFFST_2 0x150 -+#define BAM_FGPI3_ADDR_OFFST_3 0x154 -+#define BAM_FGPI3_ADDR_OFFST_4 0x158 -+#define BAM_FGPI3_ADDR_OFFST_5 0x15c -+#define BAM_FGPI3_ADDR_OFFST_6 0x160 -+#define BAM_FGPI3_ADDR_OFFST_7 0x164 -+ -+ -+#define BAM_AI0_DMA_BUF_MODE 0x168 -+#define BAM_AI0_ADDR_OFFST_0 0x16c -+#define BAM_AI0_ADDR_OFFST_1 0x170 -+#define BAM_AI0_ADDR_OFFST_2 0x174 -+#define BAM_AI0_ADDR_OFFST_3 0x178 -+#define BAM_AI0_ADDR_OFFST_4 0x17c -+#define BAM_AIO_ADDR_OFFST_5 0x180 -+#define BAM_AI0_ADDR_OFFST_6 0x184 -+#define BAM_AIO_ADDR_OFFST_7 0x188 -+ -+#define BAM_AI1_DMA_BUF_MODE 0x18c -+#define BAM_AI1_ADDR_OFFST_0 0x190 -+#define BAM_AI1_ADDR_OFFST_1 0x194 -+#define BAM_AI1_ADDR_OFFST_2 0x198 -+#define BAM_AI1_ADDR_OFFST_3 0x19c -+#define BAM_AI1_ADDR_OFFST_4 0x1a0 -+#define BAM_AI1_ADDR_OFFST_5 0x1a4 -+#define BAM_AI1_ADDR_OFFST_6 0x1a8 -+#define BAM_AI1_ADDR_OFFST_7 0x1ac -+ -+#define BAM_SW_RST 0xff0 -+#define BAM_SW_RESET (0x00000001 << 0) -+ -+ -+ -+ -+ -+/* -------------- MMU Registers -------------- */ -+ -+#define MMU 0x00009000 -+ -+#define MMU_MODE 0x000 -+ -+#define MMU_DMA_CONFIG0 0x004 -+#define MMU_DMA_CONFIG1 0x008 -+#define MMU_DMA_CONFIG2 0x00c -+#define MMU_DMA_CONFIG3 0x010 -+#define MMU_DMA_CONFIG4 0x014 -+#define MMU_DMA_CONFIG5 0x018 -+#define MMU_DMA_CONFIG6 0x01c -+#define MMU_DMA_CONFIG7 0x020 -+#define MMU_DMA_CONFIG8 0x024 -+#define MMU_DMA_CONFIG9 0x028 -+#define MMU_DMA_CONFIG10 0x02c -+#define MMU_DMA_CONFIG11 0x030 -+#define MMU_DMA_CONFIG12 0x034 -+#define MMU_DMA_CONFIG13 0x038 -+#define MMU_DMA_CONFIG14 0x03c -+#define MMU_DMA_CONFIG15 0x040 -+ -+#define MMU_SW_RST 0xff0 -+#define MMU_SW_RESET (0x0001 << 0) -+ -+#define MMU_PTA_BASE0 0x044 /* DMA 0 */ -+#define MMU_PTA_BASE1 0x084 /* DMA 1 */ -+#define MMU_PTA_BASE2 0x0c4 /* DMA 2 */ -+#define MMU_PTA_BASE3 0x104 /* DMA 3 */ -+#define MMU_PTA_BASE4 0x144 /* DMA 4 */ -+#define MMU_PTA_BASE5 0x184 /* DMA 5 */ -+#define MMU_PTA_BASE6 0x1c4 /* DMA 6 */ -+#define MMU_PTA_BASE7 0x204 /* DMA 7 */ -+#define MMU_PTA_BASE8 0x244 /* DMA 8 */ -+#define MMU_PTA_BASE9 0x284 /* DMA 9 */ -+#define MMU_PTA_BASE10 0x2c4 /* DMA 10 */ -+#define MMU_PTA_BASE11 0x304 /* DMA 11 */ -+#define MMU_PTA_BASE12 0x344 /* DMA 12 */ -+#define MMU_PTA_BASE13 0x384 /* DMA 13 */ -+#define MMU_PTA_BASE14 0x3c4 /* DMA 14 */ -+#define MMU_PTA_BASE15 0x404 /* DMA 15 */ -+ -+#define MMU_PTA_BASE 0x044 /* DMA 0 */ -+#define MMU_PTA_OFFSET 0x40 -+ -+#define PTA_BASE(__ch) (MMU_PTA_BASE + (MMU_PTA_OFFSET * __ch)) -+ -+#define MMU_PTA0_LSB(__ch) PTA_BASE(__ch) + 0x00 -+#define MMU_PTA0_MSB(__ch) PTA_BASE(__ch) + 0x04 -+#define MMU_PTA1_LSB(__ch) PTA_BASE(__ch) + 0x08 -+#define MMU_PTA1_MSB(__ch) PTA_BASE(__ch) + 0x0c -+#define MMU_PTA2_LSB(__ch) PTA_BASE(__ch) + 0x10 -+#define MMU_PTA2_MSB(__ch) PTA_BASE(__ch) + 0x14 -+#define MMU_PTA3_LSB(__ch) PTA_BASE(__ch) + 0x18 -+#define MMU_PTA3_MSB(__ch) PTA_BASE(__ch) + 0x1c -+#define MMU_PTA4_LSB(__ch) PTA_BASE(__ch) + 0x20 -+#define MMU_PTA4_MSB(__ch) PTA_BASE(__ch) + 0x24 -+#define MMU_PTA5_LSB(__ch) PTA_BASE(__ch) + 0x28 -+#define MMU_PTA5_MSB(__ch) PTA_BASE(__ch) + 0x2c -+#define MMU_PTA6_LSB(__ch) PTA_BASE(__ch) + 0x30 -+#define MMU_PTA6_MSB(__ch) PTA_BASE(__ch) + 0x34 -+#define MMU_PTA7_LSB(__ch) PTA_BASE(__ch) + 0x38 -+#define MMU_PTA7_MSB(__ch) PTA_BASE(__ch) + 0x3c -+ -+ -+/* -------------- MSI Registers -------------- */ -+ -+#define MSI 0x0000a000 -+ -+#define MSI_DELAY_TIMER 0x000 -+#define MSI_DELAY_1CLK (0x00000001 << 0) -+#define MSI_DELAY_2CLK (0x00000002 << 0) -+ -+#define MSI_INTA_POLARITY 0x004 -+#define MSI_INTA_POLARITY_HIGH (0x00000001 << 0) -+ -+#define MSI_CONFIG0 0x008 -+#define MSI_CONFIG1 0x00c -+#define MSI_CONFIG2 0x010 -+#define MSI_CONFIG3 0x014 -+#define MSI_CONFIG4 0x018 -+#define MSI_CONFIG5 0x01c -+#define MSI_CONFIG6 0x020 -+#define MSI_CONFIG7 0x024 -+#define MSI_CONFIG8 0x028 -+#define MSI_CONFIG9 0x02c -+#define MSI_CONFIG10 0x030 -+#define MSI_CONFIG11 0x034 -+#define MSI_CONFIG12 0x038 -+#define MSI_CONFIG13 0x03c -+#define MSI_CONFIG14 0x040 -+#define MSI_CONFIG15 0x044 -+#define MSI_CONFIG16 0x048 -+#define MSI_CONFIG17 0x04c -+#define MSI_CONFIG18 0x050 -+#define MSI_CONFIG19 0x054 -+#define MSI_CONFIG20 0x058 -+#define MSI_CONFIG21 0x05c -+#define MSI_CONFIG22 0x060 -+#define MSI_CONFIG23 0x064 -+#define MSI_CONFIG24 0x068 -+#define MSI_CONFIG25 0x06c -+#define MSI_CONFIG26 0x070 -+#define MSI_CONFIG27 0x074 -+#define MSI_CONFIG28 0x078 -+#define MSI_CONFIG29 0x07c -+#define MSI_CONFIG30 0x080 -+#define MSI_CONFIG31 0x084 -+#define MSI_CONFIG32 0x088 -+#define MSI_CONFIG33 0x08c -+#define MSI_CONFIG34 0x090 -+#define MSI_CONFIG35 0x094 -+#define MSI_CONFIG36 0x098 -+#define MSI_CONFIG37 0x09c -+#define MSI_CONFIG38 0x0a0 -+#define MSI_CONFIG39 0x0a4 -+#define MSI_CONFIG40 0x0a8 -+#define MSI_CONFIG41 0x0ac -+#define MSI_CONFIG42 0x0b0 -+#define MSI_CONFIG43 0x0b4 -+#define MSI_CONFIG44 0x0b8 -+#define MSI_CONFIG45 0x0bc -+#define MSI_CONFIG46 0x0c0 -+#define MSI_CONFIG47 0x0c4 -+#define MSI_CONFIG48 0x0c8 -+#define MSI_CONFIG49 0x0cc -+#define MSI_CONFIG50 0x0d0 -+ -+#define MSI_INT_POL_EDGE_RISE (0x00000001 << 24) -+#define MSI_INT_POL_EDGE_FALL (0x00000002 << 24) -+#define MSI_INT_POL_EDGE_ANY (0x00000003 << 24) -+#define MSI_TC (0x00000007 << 16) -+#define MSI_ID (0x0000000f << 0) -+ -+#define MSI_INT_STATUS_L 0xfc0 -+#define MSI_INT_TAGACK_VI0_0 (0x00000001 << 0) -+#define MSI_INT_TAGACK_VI0_1 (0x00000001 << 1) -+#define MSI_INT_TAGACK_VI0_2 (0x00000001 << 2) -+#define MSI_INT_TAGACK_VI1_0 (0x00000001 << 3) -+#define MSI_INT_TAGACK_VI1_1 (0x00000001 << 4) -+#define MSI_INT_TAGACK_VI1_2 (0x00000001 << 5) -+#define MSI_INT_TAGACK_FGPI_0 (0x00000001 << 6) -+#define MSI_INT_TAGACK_FGPI_1 (0x00000001 << 7) -+#define MSI_INT_TAGACK_FGPI_2 (0x00000001 << 8) -+#define MSI_INT_TAGACK_FGPI_3 (0x00000001 << 9) -+#define MSI_INT_TAGACK_AI_0 (0x00000001 << 10) -+#define MSI_INT_TAGACK_AI_1 (0x00000001 << 11) -+#define MSI_INT_OVRFLW_VI0_0 (0x00000001 << 12) -+#define MSI_INT_OVRFLW_VI0_1 (0x00000001 << 13) -+#define MSI_INT_OVRFLW_VI0_2 (0x00000001 << 14) -+#define MSI_INT_OVRFLW_VI1_0 (0x00000001 << 15) -+#define MSI_INT_OVRFLW_VI1_1 (0x00000001 << 16) -+#define MSI_INT_OVRFLW_VI1_2 (0x00000001 << 17) -+#define MSI_INT_OVRFLW_FGPI_O (0x00000001 << 18) -+#define MSI_INT_OVRFLW_FGPI_1 (0x00000001 << 19) -+#define MSI_INT_OVRFLW_FGPI_2 (0x00000001 << 20) -+#define MSI_INT_OVRFLW_FGPI_3 (0x00000001 << 21) -+#define MSI_INT_OVRFLW_AI_0 (0x00000001 << 22) -+#define MSI_INT_OVRFLW_AI_1 (0x00000001 << 23) -+#define MSI_INT_AVINT_VI0 (0x00000001 << 24) -+#define MSI_INT_AVINT_VI1 (0x00000001 << 25) -+#define MSI_INT_AVINT_FGPI_0 (0x00000001 << 26) -+#define MSI_INT_AVINT_FGPI_1 (0x00000001 << 27) -+#define MSI_INT_AVINT_FGPI_2 (0x00000001 << 28) -+#define MSI_INT_AVINT_FGPI_3 (0x00000001 << 29) -+#define MSI_INT_AVINT_AI_0 (0x00000001 << 30) -+#define MSI_INT_AVINT_AI_1 (0x00000001 << 31) -+ -+#define MSI_INT_STATUS_H 0xfc4 -+#define MSI_INT_UNMAPD_TC_INT (0x00000001 << 0) -+#define MSI_INT_EXTINT_0 (0x00000001 << 1) -+#define MSI_INT_EXTINT_1 (0x00000001 << 2) -+#define MSI_INT_EXTINT_2 (0x00000001 << 3) -+#define MSI_INT_EXTINT_3 (0x00000001 << 4) -+#define MSI_INT_EXTINT_4 (0x00000001 << 5) -+#define MSI_INT_EXTINT_5 (0x00000001 << 6) -+#define MSI_INT_EXTINT_6 (0x00000001 << 7) -+#define MSI_INT_EXTINT_7 (0x00000001 << 8) -+#define MSI_INT_EXTINT_8 (0x00000001 << 9) -+#define MSI_INT_EXTINT_9 (0x00000001 << 10) -+#define MSI_INT_EXTINT_10 (0x00000001 << 11) -+#define MSI_INT_EXTINT_11 (0x00000001 << 12) -+#define MSI_INT_EXTINT_12 (0x00000001 << 13) -+#define MSI_INT_EXTINT_13 (0x00000001 << 14) -+#define MSI_INT_EXTINT_14 (0x00000001 << 15) -+#define MSI_INT_EXTINT_15 (0x00000001 << 16) -+#define MSI_INT_I2CINT_0 (0x00000001 << 17) -+#define MSI_INT_I2CINT_1 (0x00000001 << 18) -+ -+#define MSI_INT_STATUS_CLR_L 0xfc8 -+#define MSI_INT_STATUS_CLR_H 0xfcc -+#define MSI_INT_STATUS_SET_L 0xfd0 -+#define MSI_INT_STATUS_SET_H 0xfd4 -+#define MSI_INT_ENA_L 0xfd8 -+#define MSI_INT_ENA_H 0xfdc -+#define MSI_INT_ENA_CLR_L 0xfe0 -+#define MSI_INT_ENA_CLR_H 0xfe4 -+#define MSI_INT_ENA_SET_L 0xfe8 -+#define MSI_INT_ENA_SET_H 0xfec -+ -+#define MSI_SW_RST 0xff0 -+#define MSI_SW_RESET (0x0001 << 0) -+ -+#define MSI_MODULE_ID 0xffc -+ -+ -+/* -------------- I2C Registers -------------- */ -+ -+#define I2C_B 0x0000b000 -+#define I2C_A 0x0000c000 -+ -+#define RX_FIFO 0x000 -+#define I2C_RX_BYTE (0x000000ff << 0) -+ -+#define TX_FIFO 0x000 -+#define I2C_STOP_BIT (0x00000001 << 9) -+#define I2C_START_BIT (0x00000001 << 8) -+#define I2C_TX_BYTE (0x000000ff << 0) -+ -+#define I2C_STATUS 0x008 -+#define I2C_TRANSMIT (0x00000001 << 11) -+#define I2C_RECEIVE (0x00000001 << 10) -+#define I2C_TRANSMIT_S_PROG (0x00000001 << 9) -+#define I2C_TRANSMIT_S_CLEAR (0x00000001 << 8) -+#define I2C_TRANSMIT_PROG (0x00000001 << 7) -+#define I2C_TRANSMIT_CLEAR (0x00000001 << 6) -+#define I2C_RECEIVE_PROG (0x00000001 << 5) -+#define I2C_RECEIVE_CLEAR (0x00000001 << 4) -+#define I2C_SDA_LINE (0x00000001 << 3) -+#define I2C_SCL_LINE (0x00000001 << 2) -+#define I2C_START_STOP_FLAG (0x00000001 << 1) -+#define I2C_MODE_STATUS (0x00000001 << 0) -+ -+#define I2C_CONTROL 0x00c -+#define I2C_SCL_CONTROL (0x00000001 << 7) -+#define I2C_SDA_CONTROL (0x00000001 << 6) -+#define I2C_RECEIVE_PROTECT (0x00000001 << 5) -+#define I2C_RECEIVE_PRO_READ (0x00000001 << 4) -+#define I2C_TRANS_SELF_CLEAR (0x00000001 << 3) -+#define I2C_TRANS_S_SELF_CLEAR (0x00000001 << 2) -+#define I2C_SLAVE_ADDR_10BIT (0x00000001 << 1) -+#define I2C_RESET (0x00000001 << 0) -+ -+#define I2C_CLOCK_DIVISOR_HIGH 0x010 -+#define I2C_CLOCK_HIGH (0x0000ffff << 0) -+ -+#define I2C_CLOCK_DIVISOR_LOW 0x014 -+#define I2C_CLOCK_LOW (0x0000ffff << 0) -+ -+#define I2C_RX_LEVEL 0x01c -+#define I2C_RECEIVE_RANGE (0x0000007f << 0) -+ -+#define I2C_TX_LEVEL 0x020 -+#define I2C_TRANSMIT_RANGE (0x0000007f << 0) -+ -+#define I2C_SDA_HOLD 0x028 -+#define I2C_HOLD_TIME (0x0000007f << 0) -+ -+#define MODULE_CONF 0xfd4 -+#define INT_CLR_ENABLE 0xfd8 -+#define I2C_CLR_ENABLE_STFNF (0x00000001 << 12) -+#define I2C_CLR_ENABLE_MTFNF (0x00000001 << 11) -+#define I2C_CLR_ENABLE_RFDA (0x00000001 << 10) -+#define I2C_CLR_ENABLE_RFF (0x00000001 << 9) -+#define I2C_CLR_ENABLE_STDR (0x00000001 << 8) -+#define I2C_CLR_ENABLE_MTDR (0x00000001 << 7) -+#define I2C_CLR_ENABLE_IBE (0x00000001 << 6) -+#define I2C_CLR_ENABLE_MSMC (0x00000001 << 5) -+#define I2C_CLR_ENABLE_SRSD (0x00000001 << 4) -+#define I2C_CLR_ENABLE_STSD (0x00000001 << 3) -+#define I2C_CLR_ENABLE_MTNA (0x00000001 << 2) -+#define I2C_CLR_ENABLE_MAF (0x00000001 << 1) -+#define I2C_CLR_ENABLE_MTD (0x00000001 << 0) -+ -+#define INT_SET_ENABLE 0xfdc -+#define I2C_SET_ENABLE_STFNF (0x00000001 << 12) -+#define I2C_SET_ENABLE_MTFNF (0x00000001 << 11) -+#define I2C_SET_ENABLE_RFDA (0x00000001 << 10) -+#define I2C_SET_ENABLE_RFF (0x00000001 << 9) -+#define I2C_SET_ENABLE_STDR (0x00000001 << 8) -+#define I2C_SET_ENABLE_MTDR (0x00000001 << 7) -+#define I2C_SET_ENABLE_IBE (0x00000001 << 6) -+#define I2C_SET_ENABLE_MSMC (0x00000001 << 5) -+#define I2C_SET_ENABLE_SRSD (0x00000001 << 4) -+#define I2C_SET_ENABLE_STSD (0x00000001 << 3) -+#define I2C_SET_ENABLE_MTNA (0x00000001 << 2) -+#define I2C_SET_ENABLE_MAF (0x00000001 << 1) -+#define I2C_SET_ENABLE_MTD (0x00000001 << 0) -+ -+#define INT_STATUS 0xfe0 -+#define I2C_INTERRUPT_STFNF (0x00000001 << 12) -+#define I2C_INTERRUPT_MTFNF (0x00000001 << 11) -+#define I2C_INTERRUPT_RFDA (0x00000001 << 10) -+#define I2C_INTERRUPTE_RFF (0x00000001 << 9) -+#define I2C_SLAVE_INTERRUPT_STDR (0x00000001 << 8) -+#define I2C_MASTER_INTERRUPT_MTDR (0x00000001 << 7) -+#define I2C_ERROR_IBE (0x00000001 << 6) -+#define I2C_MODE_CHANGE_INTER_MSMC (0x00000001 << 5) -+#define I2C_SLAVE_RECEIVE_INTER_SRSD (0x00000001 << 4) -+#define I2C_SLAVE_TRANSMIT_INTER_STSD (0x00000001 << 3) -+#define I2C_ACK_INTER_MTNA (0x00000001 << 2) -+#define I2C_FAILURE_INTER_MAF (0x00000001 << 1) -+#define I2C_INTERRUPT_MTD (0x00000001 << 0) -+ -+#define INT_ENABLE 0xfe4 -+#define I2C_ENABLE_STFNF (0x00000001 << 12) -+#define I2C_ENABLE_MTFNF (0x00000001 << 11) -+#define I2C_ENABLE_RFDA (0x00000001 << 10) -+#define I2C_ENABLE_RFF (0x00000001 << 9) -+#define I2C_ENABLE_STDR (0x00000001 << 8) -+#define I2C_ENABLE_MTDR (0x00000001 << 7) -+#define I2C_ENABLE_IBE (0x00000001 << 6) -+#define I2C_ENABLE_MSMC (0x00000001 << 5) -+#define I2C_ENABLE_SRSD (0x00000001 << 4) -+#define I2C_ENABLE_STSD (0x00000001 << 3) -+#define I2C_ENABLE_MTNA (0x00000001 << 2) -+#define I2C_ENABLE_MAF (0x00000001 << 1) -+#define I2C_ENABLE_MTD (0x00000001 << 0) -+ -+#define INT_CLR_STATUS 0xfe8 -+#define I2C_CLR_STATUS_STFNF (0x00000001 << 12) -+#define I2C_CLR_STATUS_MTFNF (0x00000001 << 11) -+#define I2C_CLR_STATUS_RFDA (0x00000001 << 10) -+#define I2C_CLR_STATUS_RFF (0x00000001 << 9) -+#define I2C_CLR_STATUS_STDR (0x00000001 << 8) -+#define I2C_CLR_STATUS_MTDR (0x00000001 << 7) -+#define I2C_CLR_STATUS_IBE (0x00000001 << 6) -+#define I2C_CLR_STATUS_MSMC (0x00000001 << 5) -+#define I2C_CLR_STATUS_SRSD (0x00000001 << 4) -+#define I2C_CLR_STATUS_STSD (0x00000001 << 3) -+#define I2C_CLR_STATUS_MTNA (0x00000001 << 2) -+#define I2C_CLR_STATUS_MAF (0x00000001 << 1) -+#define I2C_CLR_STATIS_MTD (0x00000001 << 0) -+ -+#define INT_SET_STATUS 0xfec -+#define I2C_SET_STATUS_STFNF (0x00000001 << 12) -+#define I2C_SET_STATUS_MTFNF (0x00000001 << 11) -+#define I2C_SET_STATUS_RFDA (0x00000001 << 10) -+#define I2C_SET_STATUS_RFF (0x00000001 << 9) -+#define I2C_SET_STATUS_STDR (0x00000001 << 8) -+#define I2C_SET_STATUS_MTDR (0x00000001 << 7) -+#define I2C_SET_STATUS_IBE (0x00000001 << 6) -+#define I2C_SET_STATUS_MSMC (0x00000001 << 5) -+#define I2C_SET_STATUS_SRSD (0x00000001 << 4) -+#define I2C_SET_STATUS_STSD (0x00000001 << 3) -+#define I2C_SET_STATUS_MTNA (0x00000001 << 2) -+#define I2C_SET_STATUS_MAF (0x00000001 << 1) -+#define I2C_SET_STATIS_MTD (0x00000001 << 0) -+ -+ -+ -+ -+/* -------------- SPI Registers -------------- */ -+ -+#define SPI 0x0000d000 -+ -+#define SPI_CONTROL_REG 0x000 -+#define SPI_SERIAL_INTER_ENABLE (0x00000001 << 7) -+#define SPI_LSB_FIRST_ENABLE (0x00000001 << 6) -+#define SPI_MODE_SELECT (0x00000001 << 5) -+#define SPI_CLOCK_POLARITY (0x00000001 << 4) -+#define SPI_CLOCK_PHASE (0x00000001 << 3) -+ -+#define SPI_STATUS 0x004 -+#define SPI_TRANSFER_FLAG (0x00000001 << 7) -+#define SPI_WRITE_COLLISSION (0x00000001 << 6) -+#define SPI_READ_OVERRUN (0x00000001 << 5) -+#define SPI_MODE_FAULT (0x00000001 << 4) -+#define SPI_SLAVE_ABORT (0x00000001 << 3) -+ -+#define SPI_DATA 0x008 -+#define SPI_BIDI_DATA (0x000000ff << 0) -+ -+#define SPI_CLOCK_COUNTER 0x00c -+#define SPI_CLOCK (0x00000001 << 0) -+ -+ -+ -+ -+/* -------------- GPIO Registers -------------- */ -+ -+#define GPIO 0x0000e000 -+ -+#define GPIO_RD 0x000 -+#define GPIO_WR 0x004 -+#define GPIO_WR_MODE 0x008 -+#define GPIO_OEN 0x00c -+ -+#define GPIO_SW_RST 0xff0 -+#define GPIO_SW_RESET (0x00000001 << 0) -+ -+#define GPIO_31 (1 << 31) -+#define GPIO_30 (1 << 30) -+#define GPIO_29 (1 << 29) -+#define GPIO_28 (1 << 28) -+#define GPIO_27 (1 << 27) -+#define GPIO_26 (1 << 26) -+#define GPIO_25 (1 << 25) -+#define GPIO_24 (1 << 24) -+#define GPIO_23 (1 << 23) -+#define GPIO_22 (1 << 22) -+#define GPIO_21 (1 << 21) -+#define GPIO_20 (1 << 20) -+#define GPIO_19 (1 << 19) -+#define GPIO_18 (1 << 18) -+#define GPIO_17 (1 << 17) -+#define GPIO_16 (1 << 16) -+#define GPIO_15 (1 << 15) -+#define GPIO_14 (1 << 14) -+#define GPIO_13 (1 << 13) -+#define GPIO_12 (1 << 12) -+#define GPIO_11 (1 << 11) -+#define GPIO_10 (1 << 10) -+#define GPIO_09 (1 << 9) -+#define GPIO_08 (1 << 8) -+#define GPIO_07 (1 << 7) -+#define GPIO_06 (1 << 6) -+#define GPIO_05 (1 << 5) -+#define GPIO_04 (1 << 4) -+#define GPIO_03 (1 << 3) -+#define GPIO_02 (1 << 2) -+#define GPIO_01 (1 << 1) -+#define GPIO_00 (1 << 0) -+ -+/* -------------- PHI_0 Registers -------------- */ -+ -+#define PHI_0 0x0000f000 -+ -+#define PHI_0_MODE 0x0000 -+#define PHI_0_0_CONFIG 0x0008 -+#define PHI_0_1_CONFIG 0x000c -+#define PHI_0_2_CONFIG 0x0010 -+#define PHI_0_3_CONFIG 0x0014 -+ -+#define PHI_POLARITY 0x0038 -+#define PHI_TIMEOUT 0x003c -+#define PHI_SW_RST 0x0ff0 -+ -+#define PHI_0_0_RW_0 0x1000 -+#define PHI_0_0_RW_511 0x17fc -+ -+#define PHI_0_1_RW_0 0x1800 -+#define PHI_0_1_RW_511 0x1ffc -+ -+#define PHI_0_2_RW_0 0x2000 -+#define PHI_0_2_RW_511 0x27fc -+ -+#define PHI_0_3_RW_0 0x2800 -+#define PHI_0_3_RW_511 0x2ffc -+ -+#define PHI_CSN_DEASSERT (0x00000001 << 2) -+#define PHI_AUTO_INCREMENT (0x00000001 << 1) -+#define PHI_FIFO_MODE (0x00000001 << 0) -+ -+#define PHI_DELAY_RD_WR (0x0000001f << 27) -+#define PHI_EXTEND_RDY3 (0x00000003 << 25) -+#define PHI_EXTEND_RDY2 (0x00000003 << 23) -+#define PHI_EXTEND_RDY1 (0x00000003 << 21) -+#define PHI_EXTEND_RDY0 (0x00000003 << 19) -+#define PHI_RDY3_OD (0x00000001 << 18) -+#define PHI_RDY2_OD (0x00000001 << 17) -+#define PHI_RDY1_OD (0x00000001 << 16) -+#define PHI_RDY0_OD (0x00000001 << 15) -+#define PHI_ALE_POL (0x00000001 << 14) -+#define PHI_WRN_POL (0x00000001 << 13) -+#define PHI_RDN_POL (0x00000001 << 12) -+#define PHI_RDY3_POL (0x00000001 << 11) -+#define PHI_RDY2_POL (0x00000001 << 10) -+#define PHI_RDY1_POL (0x00000001 << 9) -+#define PHI_RDY0_POL (0x00000001 << 8) -+#define PHI_CSN7_POL (0x00000001 << 7) -+#define PHI_CSN6_POL (0x00000001 << 6) -+#define PHI_CSN5_POL (0x00000001 << 5) -+#define PHI_CSN4_POL (0x00000001 << 4) -+#define PHI_CSN3_POL (0x00000001 << 3) -+#define PHI_CSN2_POL (0x00000001 << 2) -+#define PHI_CSN1_POL (0x00000001 << 1) -+#define PHI_CSN0_POL (0x00000001 << 0) -+ -+/* -------------- PHI_1 Registers -------------- */ -+ -+#define PHI_1 0x00020000 -+ -+#define PHI_1_MODE 0x00004 -+#define PHI_1_0_CONFIG 0x00018 -+#define PHI_1_1_CONFIG 0x0001c -+#define PHI_1_2_CONFIG 0x00020 -+#define PHI_1_3_CONFIG 0x00024 -+#define PHI_1_4_CONFIG 0x00028 -+#define PHI_1_5_CONFIG 0x0002c -+#define PHI_1_6_CONFIG 0x00030 -+#define PHI_1_7_CONFIG 0x00034 -+ -+#define PHI_1_0_RW_0 0x00000 -+#define PHI_1_0_RW_16383 0x0fffc -+ -+#define PHI_1_1_RW_0 0x1000 -+#define PHI_1_1_RW_16383 0x1ffc -+ -+#define PHI_1_2_RW_0 0x2000 -+#define PHI_1_2_RW_16383 0x2ffc -+ -+#define PHI_1_3_RW_0 0x3000 -+#define PHI_1_3_RW_16383 0x3ffc -+ -+#define PHI_1_4_RW_0 0x4000 -+#define PHI_1_4_RW_16383 0x4ffc -+ -+#define PHI_1_5_RW_0 0x5000 -+#define PHI_1_5_RW_16383 0x5ffc -+ -+#define PHI_1_6_RW_0 0x6000 -+#define PHI_1_6_RW_16383 0x6ffc -+ -+#define PHI_1_7_RW_0 0x7000 -+#define PHI_1_7_RW_16383 0x7ffc -+ -+/* -------------- CGU Registers -------------- */ -+ -+#define CGU 0x00013000 -+ -+#define CGU_SCR_0 0x000 -+#define CGU_SCR_1 0x004 -+#define CGU_SCR_2 0x008 -+#define CGU_SCR_3 0x00c -+#define CGU_SCR_4 0x010 -+#define CGU_SCR_5 0x014 -+#define CGU_SCR_6 0x018 -+#define CGU_SCR_7 0x01c -+#define CGU_SCR_8 0x020 -+#define CGU_SCR_9 0x024 -+#define CGU_SCR_10 0x028 -+#define CGU_SCR_11 0x02c -+#define CGU_SCR_12 0x030 -+#define CGU_SCR_13 0x034 -+#define CGU_SCR_STOP (0x00000001 << 3) -+#define CGU_SCR_RESET (0x00000001 << 2) -+#define CGU_SCR_ENF2 (0x00000001 << 1) -+#define CGU_SCR_ENF1 (0x00000001 << 0) -+ -+#define CGU_FS1_0 0x038 -+#define CGU_FS1_1 0x03c -+#define CGU_FS1_2 0x040 -+#define CGU_FS1_3 0x044 -+#define CGU_FS1_4 0x048 -+#define CGU_FS1_5 0x04c -+#define CGU_FS1_6 0x050 -+#define CGU_FS1_7 0x054 -+#define CGU_FS1_8 0x058 -+#define CGU_FS1_9 0x05c -+#define CGU_FS1_10 0x060 -+#define CGU_FS1_11 0x064 -+#define CGU_FS1_12 0x068 -+#define CGU_FS1_13 0x06c -+#define CGU_FS1_PLL (0x00000000 << 0) -+ -+ -+#define CGU_FS2_0 0x070 -+#define CGU_FS2_1 0x074 -+#define CGU_FS2_2 0x078 -+#define CGU_FS2_3 0x07c -+#define CGU_FS2_4 0x080 -+#define CGU_FS2_5 0x084 -+#define CGU_FS2_6 0x088 -+#define CGU_FS2_7 0x08c -+#define CGU_FS2_8 0x090 -+#define CGU_FS2_9 0x094 -+#define CGU_FS2_10 0x098 -+#define CGU_FS2_11 0x09c -+#define CGU_FS2_12 0x0a0 -+#define CGU_FS2_13 0x0a4 -+ -+#define CGU_SSR_0 0x0a8 -+#define CGU_SSR_1 0x0ac -+#define CGU_SSR_2 0x0b0 -+#define CGU_SSR_3 0x0b4 -+#define CGU_SSR_4 0x0b8 -+#define CGU_SSR_5 0x0bc -+#define CGU_SSR_6 0x0c0 -+#define CGU_SSR_7 0x0c4 -+#define CGU_SSR_8 0x0c8 -+#define CGU_SSR_9 0x0cc -+#define CGU_SSR_10 0x0d0 -+#define CGU_SSR_11 0x0d4 -+#define CGU_SSR_12 0x0d8 -+#define CGU_SSR_13 0x0dc -+ -+#define CGU_PCR_0_0 0x0e0 -+#define CGU_PCR_0_1 0x0e4 -+#define CGU_PCR_0_2 0x0e8 -+#define CGU_PCR_0_3 0x0ec -+#define CGU_PCR_0_4 0x0f0 -+#define CGU_PCR_0_5 0x0f4 -+#define CGU_PCR_0_6 0x0f8 -+#define CGU_PCR_0_7 0x0fc -+#define CGU_PCR_1_0 0x100 -+#define CGU_PCR_1_1 0x104 -+#define CGU_PCR_2_0 0x108 -+#define CGU_PCR_2_1 0x10c -+#define CGU_PCR_3_0 0x110 -+#define CGU_PCR_3_1 0x114 -+#define CGU_PCR_3_2 0x118 -+#define CGU_PCR_4_0 0x11c -+#define CGU_PCR_4_1 0x120 -+#define CGU_PCR_5 0x124 -+#define CGU_PCR_6 0x128 -+#define CGU_PCR_7 0x12c -+#define CGU_PCR_8 0x130 -+#define CGU_PCR_9 0x134 -+#define CGU_PCR_10 0x138 -+#define CGU_PCR_11 0x13c -+#define CGU_PCR_12 0x140 -+#define CGU_PCR_13 0x144 -+#define CGU_PCR_WAKE_EN (0x00000001 << 2) -+#define CGU_PCR_AUTO (0x00000001 << 1) -+#define CGU_PCR_RUN (0x00000001 << 0) -+ -+ -+#define CGU_PSR_0_0 0x148 -+#define CGU_PSR_0_1 0x14c -+#define CGU_PSR_0_2 0x150 -+#define CGU_PSR_0_3 0x154 -+#define CGU_PSR_0_4 0x158 -+#define CGU_PSR_0_5 0x15c -+#define CGU_PSR_0_6 0x160 -+#define CGU_PSR_0_7 0x164 -+#define CGU_PSR_1_0 0x168 -+#define CGU_PSR_1_1 0x16c -+#define CGU_PSR_2_0 0x170 -+#define CGU_PSR_2_1 0x174 -+#define CGU_PSR_3_0 0x178 -+#define CGU_PSR_3_1 0x17c -+#define CGU_PSR_3_2 0x180 -+#define CGU_PSR_4_0 0x184 -+#define CGU_PSR_4_1 0x188 -+#define CGU_PSR_5 0x18c -+#define CGU_PSR_6 0x190 -+#define CGU_PSR_7 0x194 -+#define CGU_PSR_8 0x198 -+#define CGU_PSR_9 0x19c -+#define CGU_PSR_10 0x1a0 -+#define CGU_PSR_11 0x1a4 -+#define CGU_PSR_12 0x1a8 -+#define CGU_PSR_13 0x1ac -+ -+#define CGU_ESR_0_0 0x1b0 -+#define CGU_ESR_0_1 0x1b4 -+#define CGU_ESR_0_2 0x1b8 -+#define CGU_ESR_0_3 0x1bc -+#define CGU_ESR_0_4 0x1c0 -+#define CGU_ESR_0_5 0x1c4 -+#define CGU_ESR_0_6 0x1c8 -+#define CGU_ESR_0_7 0x1cc -+#define CGU_ESR_1_0 0x1d0 -+#define CGU_ESR_1_1 0x1d4 -+#define CGU_ESR_2_0 0x1d8 -+#define CGU_ESR_2_1 0x1dc -+#define CGU_ESR_3_0 0x1e0 -+#define CGU_ESR_3_1 0x1e4 -+#define CGU_ESR_3_2 0x1e8 -+#define CGU_ESR_4_0 0x1ec -+#define CGU_ESR_4_1 0x1f0 -+#define CGU_ESR_5 0x1f4 -+#define CGU_ESR_6 0x1f8 -+#define CGU_ESR_7 0x1fc -+#define CGU_ESR_8 0x200 -+#define CGU_ESR_9 0x204 -+#define CGU_ESR_10 0x208 -+#define CGU_ESR_11 0x20c -+#define CGU_ESR_12 0x210 -+#define CGU_ESR_13 0x214 -+#define CGU_ESR_FD_EN (0x00000001 << 0) -+ -+#define CGU_FDC_0 0x218 -+#define CGU_FDC_1 0x21c -+#define CGU_FDC_2 0x220 -+#define CGU_FDC_3 0x224 -+#define CGU_FDC_4 0x228 -+#define CGU_FDC_5 0x22c -+#define CGU_FDC_6 0x230 -+#define CGU_FDC_7 0x234 -+#define CGU_FDC_8 0x238 -+#define CGU_FDC_9 0x23c -+#define CGU_FDC_10 0x240 -+#define CGU_FDC_11 0x244 -+#define CGU_FDC_12 0x248 -+#define CGU_FDC_13 0x24c -+#define CGU_FDC_STRETCH (0x00000001 << 0) -+#define CGU_FDC_RESET (0x00000001 << 1) -+#define CGU_FDC_RUN1 (0x00000001 << 2) -+#define CGU_FDC_MADD (0x000000ff << 3) -+#define CGU_FDC_MSUB (0x000000ff << 11) -+ -+/* -------------- DCS Registers -------------- */ -+ -+#define DCS 0x00014000 -+ -+#define DCSC_CTRL 0x000 -+#define DCSC_SEL_PLLDI (0x03ffffff << 5) -+#define DCSC_TOUT_SEL (0x0000000f << 1) -+#define DCSC_TOUT_OFF (0x00000001 << 0) -+ -+#define DCSC_ADDR 0x00c -+#define DCSC_ERR_TOUT_ADDR (0x3fffffff << 2) -+ -+#define DCSC_STAT 0x010 -+#define DCSC_ERR_TOUT_GNT (0x0000001f << 24) -+#define DCSC_ERR_TOUT_SEL (0x0000007f << 10) -+#define DCSC_ERR_TOUT_READ (0x00000001 << 8) -+#define DCSC_ERR_TOUT_MASK (0x0000000f << 4) -+#define DCSC_ERR_ACK (0x00000001 << 1) -+ -+#define DCSC_FEATURES 0x040 -+#define DCSC_UNIQUE_ID (0x00000007 << 16) -+#define DCSC_SECURITY (0x00000001 << 14) -+#define DCSC_NUM_BASE_REGS (0x00000003 << 11) -+#define DCSC_NUM_TARGETS (0x0000001f << 5) -+#define DCSC_NUM_INITIATORS (0x0000001f << 0) -+ -+#define DCSC_BASE_REG0 0x100 -+#define DCSC_BASE_N_REG (0x00000fff << 20) -+ -+#define DCSC_INT_CLR_ENABLE 0xfd8 -+#define DCSC_INT_CLR_ENABLE_TOUT (0x00000001 << 1) -+#define DCSC_INT_CLR_ENABLE_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_SET_ENABLE 0xfdc -+#define DCSC_INT_SET_ENABLE_TOUT (0x00000001 << 1) -+#define DCSC_INT_SET_ENABLE_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_STATUS 0xfe0 -+#define DCSC_INT_STATUS_TOUT (0x00000001 << 1) -+#define DCSC_INT_STATUS_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_ENABLE 0xfe4 -+#define DCSC_INT_ENABLE_TOUT (0x00000001 << 1) -+#define DCSC_INT_ENABLE_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_CLR_STATUS 0xfe8 -+#define DCSC_INT_CLEAR_TOUT (0x00000001 << 1) -+#define DCSC_INT_CLEAR_ERROR (0x00000001 << 0) -+ -+#define DCSC_INT_SET_STATUS 0xfec -+#define DCSC_INT_SET_TOUT (0x00000001 << 1) -+#define DCSC_INT_SET_ERROR (0x00000001 << 0) -+ -+ -+ -+ -+/* -------------- GREG Registers -------------- */ -+ -+#define GREG 0x00012000 -+ -+#define GREG_SUBSYS_CONFIG 0x000 -+#define GREG_SUBSYS_ID (0x0000ffff << 16) -+#define GREG_SUBSYS_VID (0x0000ffff << 0) -+ -+#define GREG_MSI_BAR_PMCSR 0x004 -+#define GREG_PMCSR_SCALE_7 (0x00000003 << 30) -+#define GREG_PMCSR_SCALE_6 (0x00000003 << 28) -+#define GREG_PMCSR_SCALE_5 (0x00000003 << 26) -+#define GREG_PMCSR_SCALE_4 (0x00000003 << 24) -+#define GREG_PMCSR_SCALE_3 (0x00000003 << 22) -+#define GREG_PMCSR_SCALE_2 (0x00000003 << 20) -+#define GREG_PMCSR_SCALE_1 (0x00000003 << 18) -+#define GREG_PMCSR_SCALE_0 (0x00000003 << 16) -+ -+#define GREG_BAR_WIDTH_17 (0x0000001e << 8) -+#define GREG_BAR_WIDTH_18 (0x0000001c << 8) -+#define GREG_BAR_WIDTH_19 (0x00000018 << 8) -+#define GREG_BAR_WIDTH_20 (0x00000010 << 8) -+ -+#define GREG_BAR_PREFETCH (0x00000001 << 3) -+#define GREG_MSI_MM_CAP1 (0x00000000 << 0) // FIXME ! -+#define GREG_MSI_MM_CAP2 (0x00000001 << 0) -+#define GREG_MSI_MM_CAP4 (0x00000002 << 0) -+#define GREG_MSI_MM_CAP8 (0x00000003 << 0) -+#define GREG_MSI_MM_CAP16 (0x00000004 << 0) -+#define GREG_MSI_MM_CAP32 (0x00000005 << 0) -+ -+#define GREG_PMCSR_DATA_1 0x008 -+#define GREG_PMCSR_DATA_2 0x00c -+#define GREG_VI_CTRL 0x010 -+#define GREG_FGPI_CTRL 0x014 -+ -+#define GREG_RSTU_CTRL 0x018 -+#define GREG_BOOT_READY (0x00000001 << 13) -+#define GREG_RESET_REQ (0x00000001 << 12) -+#define GREG_IP_RST_RELEASE (0x00000001 << 11) -+#define GREG_ADAPTER_RST_RELEASE (0x00000001 << 10) -+#define GREG_PCIE_CORE_RST_RELEASE (0x00000001 << 9) -+#define GREG_BOOT_IP_RST_RELEASE (0x00000001 << 8) -+#define GREG_BOOT_RST_RELEASE (0x00000001 << 7) -+#define GREG_CGU_RST_RELEASE (0x00000001 << 6) -+#define GREG_IP_RST_ASSERT (0x00000001 << 5) -+#define GREG_ADAPTER_RST_ASSERT (0x00000001 << 4) -+#define GREG_RST_ASSERT (0x00000001 << 3) -+#define GREG_BOOT_IP_RST_ASSERT (0x00000001 << 2) -+#define GREG_BOOT_RST_ASSERT (0x00000001 << 1) -+#define GREG_CGU_RST_ASSERT (0x00000001 << 0) -+ -+#define GREG_I2C_CTRL 0x01c -+#define GREG_I2C_SLAVE_ADDR (0x0000007f << 0) -+ -+#define GREG_OVFLW_CTRL 0x020 -+#define GREG_OVERFLOW_ENABLE (0x00001fff << 0) -+ -+#define GREG_TAG_ACK_FLEN 0x024 -+#define GREG_TAG_ACK_FLEN_1B (0x00000000 << 0) -+#define GREG_TAG_ACK_FLEN_2B (0x00000001 << 0) -+#define GREG_TAG_ACK_FLEN_4B (0x00000002 << 0) -+#define GREG_TAG_ACK_FLEN_8B (0x00000003 << 0) -+ -+#define GREG_VIDEO_IN_CTRL 0x028 -+ -+#define GREG_SPARE_1 0x02c -+#define GREG_SPARE_2 0x030 -+#define GREG_SPARE_3 0x034 -+#define GREG_SPARE_4 0x038 -+#define GREG_SPARE_5 0x03c -+#define GREG_SPARE_6 0x040 -+#define GREG_SPARE_7 0x044 -+#define GREG_SPARE_8 0x048 -+#define GREG_SPARE_9 0x04c -+#define GREG_SPARE_10 0x050 -+#define GREG_SPARE_11 0x054 -+#define GREG_SPARE_12 0x058 -+#define GREG_SPARE_13 0x05c -+#define GREG_SPARE_14 0x060 -+#define GREG_SPARE_15 0x064 -+ -+#define GREG_FAIL_DISABLE 0x068 -+#define GREG_BOOT_FAIL_DISABLE (0x00000001 << 0) -+ -+#define GREG_SW_RST 0xff0 -+#define GREG_SW_RESET (0x00000001 << 0) -+ -+ -+ -+ -+/* BAR = 20 bits */ -+ -+/* -------------- PHI1 Registers -------------- */ -+ -+#define PHI_1 0x00020000 -+ -+ -+ -+#endif /* __SAA716x_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.c 2013-01-16 10:41:10.926798175 +0100 -@@ -0,0 +1,1071 @@ -+#include -+#include -+ -+#include "saa716x_rom.h" -+#include "saa716x_adap.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+int i; -+ -+static int eeprom_read_bytes(struct saa716x_dev *saa716x, u16 reg, u16 len, u8 *val) -+{ -+ struct saa716x_i2c *i2c = saa716x->i2c; -+ struct i2c_adapter *adapter = &i2c[SAA716x_I2C_BUS_B].i2c_adapter; -+ -+ u8 b0[] = { MSB(reg), LSB(reg) }; -+ int ret; -+ -+ struct i2c_msg msg[] = { -+ { .addr = 0x50, .flags = 0, .buf = b0, .len = sizeof (b0) }, -+ { .addr = 0x50, .flags = I2C_M_RD, .buf = val, .len = len } -+ }; -+ -+ ret = i2c_transfer(adapter, msg, 2); -+ if (ret != 2) { -+ dprintk(SAA716x_ERROR, 1, "read error ", reg, ret); -+ return -EREMOTEIO; -+ } -+ -+ return ret; -+} -+ -+static int saa716x_read_rombytes(struct saa716x_dev *saa716x, u16 reg, u16 len, u8 *val) -+{ -+ struct saa716x_i2c *i2c = saa716x->i2c; -+ struct i2c_adapter *adapter = &i2c[SAA716x_I2C_BUS_B].i2c_adapter; -+ struct i2c_msg msg[2]; -+ -+ u8 b0[2]; -+ int ret, count; -+ -+ count = len / DUMP_BYTES; -+ if (len % DUMP_BYTES) -+ count++; -+ -+ count *= 2; -+ -+ for (i = 0; i < count; i += 2) { -+ dprintk(SAA716x_DEBUG, 1, "Length=%d, Count=%d, Reg=0x%02x", -+ len, -+ count, -+ reg); -+ -+ b0[0] = MSB(reg); -+ b0[1] = LSB(reg); -+ -+ /* Write */ -+ msg[0].addr = 0x50; -+ msg[0].flags = 0; -+ msg[0].buf = b0; -+ msg[0].len = 2; -+ -+ /* Read */ -+ msg[1].addr = 0x50; -+ msg[1].flags = I2C_M_RD; -+ msg[1].buf = val; -+ -+ if (i == (count - 2)) { -+ /* last message */ -+ if (len % DUMP_BYTES) { -+ msg[1].len = len % DUMP_BYTES; -+ dprintk(SAA716x_DEBUG, 1, "Last Message length=%d", len % DUMP_BYTES); -+ } else { -+ msg[1].len = DUMP_BYTES; -+ } -+ } else { -+ msg[1].len = DUMP_BYTES; -+ } -+ -+ ret = i2c_transfer(adapter, msg, 2); -+ if (ret != 2) { -+ dprintk(SAA716x_ERROR, 1, "read error ", reg, ret); -+ return -EREMOTEIO; -+ } -+ -+ reg += DUMP_BYTES; -+ val += DUMP_BYTES; -+ } -+ -+ return 0; -+} -+ -+static int saa716x_get_offset(struct saa716x_dev *saa716x, u8 *buf, u32 *offset) -+{ -+ int i; -+ -+ *offset = 0; -+ for (i = 0; i < 256; i++) { -+ if (!(strncmp("START", buf + i, 5))) -+ break; -+ } -+ dprintk(SAA716x_INFO, 1, "Offset @ %d", i); -+ *offset = i; -+ -+ return 0; -+} -+ -+static int saa716x_eeprom_header(struct saa716x_dev *saa716x, -+ struct saa716x_romhdr *rom_header, -+ u8 *buf, -+ u32 *offset) -+{ -+ memcpy(rom_header, &buf[*offset], sizeof (struct saa716x_romhdr)); -+ if (rom_header->header_size != sizeof (struct saa716x_romhdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ (int)sizeof (struct saa716x_romhdr), -+ rom_header->header_size); -+ -+ return -1; -+ } -+ *offset += sizeof (struct saa716x_romhdr); -+ -+ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Data=%d bytes\n", -+ saa716x->pdev->device, -+ rom_header->data_size); -+ -+ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Version=%d\n", -+ saa716x->pdev->device, -+ rom_header->version); -+ -+ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Devices=%d\n", -+ saa716x->pdev->device, -+ rom_header->devices); -+ -+ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Compressed=%d\n\n", -+ saa716x->pdev->device, -+ rom_header->compression); -+ -+ return 0; -+} -+ -+int saa716x_dump_eeprom(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_romhdr rom_header; -+ u8 buf[DUMP_BYTES]; -+ int i, err = 0; -+ u32 offset = 0; -+ -+ err = eeprom_read_bytes(saa716x, DUMP_OFFST, DUMP_BYTES, buf); -+ if (err < 0) { -+ dprintk(SAA716x_ERROR, 1, "EEPROM Read error"); -+ return err; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, " Card: %s\n", -+ saa716x->config->model_name); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " ---------------- SAA%02x ROM @ Offset 0x%02x ----------------", -+ saa716x->pdev->device, -+ DUMP_OFFST); -+ -+ for (i = 0; i < DUMP_BYTES; i++) { -+ if ((i % 16) == 0) { -+ dprintk(SAA716x_NOTICE, 0, "\n "); -+ dprintk(SAA716x_NOTICE, 0, "%04x: ", i); -+ } -+ -+ if ((i % 8) == 0) -+ dprintk(SAA716x_NOTICE, 0, " "); -+ if ((i % 4) == 0) -+ dprintk(SAA716x_NOTICE, 0, " "); -+ dprintk(SAA716x_NOTICE, 0, "%02x ", buf[i]); -+ } -+ dprintk(SAA716x_NOTICE, 0, "\n"); -+ dprintk(SAA716x_NOTICE, 0, -+ " ---------------- SAA%02x ROM Dump end ---------------------\n\n", -+ saa716x->pdev->device); -+ -+ err = saa716x_get_offset(saa716x, buf, &offset); -+ if (err != 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Descriptor not found <%d>", err); -+ return err; -+ } -+ offset += 5; -+ saa716x->id_offst = offset; -+ /* Get header */ -+ err = saa716x_eeprom_header(saa716x, &rom_header, buf, &offset); -+ if (err != 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Header Read failed <%d>", err); -+ return -1; -+ } -+ saa716x->id_len = rom_header.data_size; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(saa716x_dump_eeprom); -+ -+static void saa716x_descriptor_dbg(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset, -+ u8 size, -+ u8 ext_size) -+{ -+ int i; -+ -+ dprintk(SAA716x_INFO, 0, " "); -+ for (i = 0; i < 49; i++) -+ dprintk(SAA716x_INFO, 0, "-"); -+ -+ for (i = 0; i < size + ext_size; i++) { -+ if ((i % 16) == 0) -+ dprintk(SAA716x_INFO, 0, "\n "); -+ if ((i % 8) == 0) -+ dprintk(SAA716x_INFO, 0, " "); -+ if ((i % 4) == 0) -+ dprintk(SAA716x_INFO, 0, " "); -+ -+ dprintk(SAA716x_INFO, 0, "%02x ", buf[*offset + i]); -+ } -+ -+ dprintk(SAA716x_INFO, 0, "\n "); -+ for (i = 0; i < 49; i++) -+ dprintk(SAA716x_INFO, 0, "-"); -+ dprintk(SAA716x_INFO, 0, "\n"); -+ -+} -+ -+static int saa716x_decoder_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_decoder_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_decoder_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_decoder_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_decoder_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext Data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_gpio_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_gpio_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_gpio_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_gpio_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_gpio_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Pins=%d\n", -+ saa716x->pdev->device, -+ header.pins); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ -+ return 0; -+} -+ -+static int saa716x_video_decoder_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_video_decoder_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_video_decoder_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_video_decoder_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_video_decoder_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: PORT 0=0x%02x\n", -+ saa716x->pdev->device, -+ header.video_port0); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: PORT 1=0x%02x\n", -+ saa716x->pdev->device, -+ header.video_port1); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: PORT 2=0x%02x\n", -+ saa716x->pdev->device, -+ header.video_port2); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: VBI PORT ID=0x%02x\n", -+ saa716x->pdev->device, -+ header.vbi_port_id); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Video PORT Type=0x%02x\n", -+ saa716x->pdev->device, -+ header.video_port_type); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: VBI PORT Type=0x%02x\n", -+ saa716x->pdev->device, -+ header.vbi_port_type); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Encoder PORT Type=0x%02x\n", -+ saa716x->pdev->device, -+ header.encoder_port_type); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Video Output=0x%02x\n", -+ saa716x->pdev->device, -+ header.video_output); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: VBI Output=0x%02x\n", -+ saa716x->pdev->device, -+ header.vbi_output); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Encoder Output=0x%02x\n", -+ saa716x->pdev->device, -+ header.encoder_output); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_audio_decoder_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_audio_decoder_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_audio_decoder_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_audio_decoder_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_audio_decoder_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_event_source_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_evsrc_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_evsrc_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_evsrc_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_evsrc_hdr)); -+ -+ return -1; -+ } -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_crossbar_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_xbar_hdr header; -+ struct saa716x_xbar_pair_info pair_info; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_xbar_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_xbar_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_xbar_hdr)); -+ -+ return -1; -+ } -+ -+ memcpy(&pair_info, &buf[*offset], sizeof (struct saa716x_xbar_pair_info)); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Pairs=%d\n", -+ saa716x->pdev->device, -+ header.pair_inputs); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data + (sizeof (struct saa716x_xbar_pair_info) * header.pair_inputs); -+ return 0; -+} -+ -+static int saa716x_tuner_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_tuner_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_tuner_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_tuner_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_tuner_hdr)); -+ -+ return -1; -+ } -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_pll_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_pll_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_pll_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_pll_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_pll_hdr)); -+ -+ return -1; -+ } -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_channel_decoder_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_channel_decoder_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_channel_decoder_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_channel_decoder_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_channel_decoder_hdr)); -+ -+ return -1; -+ } -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_encoder_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_encoder_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_encoder_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_encoder_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_encoder_hdr)); -+ -+ return -1; -+ } -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_ir_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_ir_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_ir_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_ir_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_ir_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_eeprom_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_eeprom_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_eeprom_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_eeprom_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof (struct saa716x_eeprom_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_filter_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_filter_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_filter_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_filter_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof(struct saa716x_filter_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_streamdev_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ struct saa716x_streamdev_hdr header; -+ -+ memcpy(&header, &buf[*offset], sizeof (struct saa716x_streamdev_hdr)); -+ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); -+ if (header.size != sizeof (struct saa716x_streamdev_hdr)) { -+ dprintk(SAA716x_ERROR, 1, -+ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", -+ header.size, -+ (int)sizeof(struct saa716x_streamdev_hdr)); -+ -+ return -1; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ header.size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n", -+ saa716x->pdev->device, -+ header.ext_data); -+ -+ *offset += header.size + header.ext_data; -+ return 0; -+} -+ -+static int saa716x_unknown_device_info(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset) -+{ -+ u8 size; -+ u8 ext_size = 0; -+ -+ size = buf[*offset]; -+ if (size > 1) -+ ext_size = buf[*offset + size -1]; -+ -+ saa716x_descriptor_dbg(saa716x, buf, offset, size, ext_size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ size); -+ -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Ext data=%d bytes\n\n", -+ saa716x->pdev->device, -+ ext_size); -+ -+ *offset += size + ext_size; -+ return 0; -+} -+ -+ -+static void saa716x_device_dbg(struct saa716x_dev *saa716x, -+ u8 *buf, -+ u32 *offset, -+ u8 size, -+ u8 ext_size, -+ u8 addr_size) -+{ -+ int i; -+ -+ dprintk(SAA716x_INFO, 0, " "); -+ for (i = 0; i < 53; i++) -+ dprintk(SAA716x_INFO, 0, "-"); -+ -+ for (i = 0; i < size + ext_size + addr_size; i++) { -+ if ((i % 16) == 0) -+ dprintk(SAA716x_INFO, 0, "\n "); -+ if ((i % 8) == 0) -+ dprintk(SAA716x_INFO, 0, " "); -+ if ((i % 4) == 0) -+ dprintk(SAA716x_INFO, 0, " "); -+ -+ dprintk(SAA716x_INFO, 0, "%02x ", buf[*offset + i]); -+ } -+ -+ dprintk(SAA716x_INFO, 0, "\n "); -+ for (i = 0; i < 53; i++) -+ dprintk(SAA716x_INFO, 0, "-"); -+ dprintk(SAA716x_INFO, 0, "\n"); -+ -+} -+ -+ -+static int saa716x_device_info(struct saa716x_dev *saa716x, -+ struct saa716x_devinfo *device, -+ u8 *buf, -+ u32 *offset) -+{ -+ u8 address = 0; -+ -+ memcpy(device, &buf[*offset], sizeof(struct saa716x_devinfo)); -+ if (device->struct_size != sizeof(struct saa716x_devinfo)) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Device size mismatch! Read=%d bytes, expected=%d bytes", -+ device->struct_size, -+ (int)sizeof(struct saa716x_devinfo)); -+ -+ return -1; -+ } -+ -+ saa716x_device_dbg(saa716x, -+ buf, -+ offset, -+ device->struct_size, -+ device->extd_data_size, -+ device->addr_size); -+ -+ *offset += device->struct_size; -+ -+ if (device->addr_size) { -+ address = buf[*offset]; -+ address >>= 1; -+ *offset += device->addr_size; -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Device @ 0x%02x\n", -+ saa716x->pdev->device, -+ address); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Size=%d bytes\n", -+ saa716x->pdev->device, -+ device->struct_size); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Device ID=0x%02x\n", -+ saa716x->pdev->device, -+ device->device_id); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Master ID=0x%02x\n", -+ saa716x->pdev->device, -+ device->master_devid); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Bus ID=0x%02x\n", -+ saa716x->pdev->device, -+ device->master_busid); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Device type=0x%02x\n", -+ saa716x->pdev->device, -+ device->device_type); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Implementation ID=0x%02x\n", -+ saa716x->pdev->device, -+ device->implem_id); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Path ID=0x%02x\n", -+ saa716x->pdev->device, -+ device->path_id); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: GPIO ID=0x%02x\n", -+ saa716x->pdev->device, -+ device->gpio_id); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Address=%d bytes\n", -+ saa716x->pdev->device, -+ device->addr_size); -+ -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Extended data=%d bytes\n\n", -+ saa716x->pdev->device, -+ device->extd_data_size); -+ -+ if (device->extd_data_size) { -+ u32 mask; -+ -+ mask = 0x00000001; -+ while (mask) { -+ if (device->device_type & mask) { -+ switch (mask) { -+ case DECODER_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found decoder device\n", -+ saa716x->pdev->device); -+ -+ saa716x_decoder_info(saa716x, buf, offset); -+ break; -+ -+ case GPIO_SOURCE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found GPIO device\n", -+ saa716x->pdev->device); -+ -+ saa716x_gpio_info(saa716x, buf, offset); -+ break; -+ -+ case VIDEO_DECODER: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Video Decoder device\n", -+ saa716x->pdev->device); -+ -+ saa716x_video_decoder_info(saa716x, buf, offset); -+ break; -+ -+ case AUDIO_DECODER: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Audio Decoder device\n", -+ saa716x->pdev->device); -+ -+ saa716x_audio_decoder_info(saa716x, buf, offset); -+ break; -+ -+ case EVENT_SOURCE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Event source\n", -+ saa716x->pdev->device); -+ -+ saa716x_event_source_info(saa716x, buf, offset); -+ break; -+ -+ case CROSSBAR: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Crossbar device\n", -+ saa716x->pdev->device); -+ -+ saa716x_crossbar_info(saa716x, buf, offset); -+ break; -+ -+ case TUNER_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Tuner device\n", -+ saa716x->pdev->device); -+ -+ saa716x_tuner_info(saa716x, buf, offset); -+ break; -+ -+ case PLL_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found PLL device\n", -+ saa716x->pdev->device); -+ -+ saa716x_pll_info(saa716x, buf, offset); -+ break; -+ -+ case CHANNEL_DECODER: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Channel Demodulator device\n", -+ saa716x->pdev->device); -+ -+ saa716x_channel_decoder_info(saa716x, buf, offset); -+ break; -+ -+ case RDS_DECODER: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found RDS Decoder device\n", -+ saa716x->pdev->device); -+ -+ saa716x_unknown_device_info(saa716x, buf, offset); -+ break; -+ -+ case ENCODER_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Encoder device\n", -+ saa716x->pdev->device); -+ -+ saa716x_encoder_info(saa716x, buf, offset); -+ break; -+ -+ case IR_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found IR device\n", -+ saa716x->pdev->device); -+ -+ saa716x_ir_info(saa716x, buf, offset); -+ break; -+ -+ case EEPROM_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found EEPROM device\n", -+ saa716x->pdev->device); -+ -+ saa716x_eeprom_info(saa716x, buf, offset); -+ break; -+ -+ case NOISE_FILTER: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Noise filter device\n", -+ saa716x->pdev->device); -+ -+ saa716x_filter_info(saa716x, buf, offset); -+ break; -+ -+ case LNx_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found LNx device\n", -+ saa716x->pdev->device); -+ -+ saa716x_unknown_device_info(saa716x, buf, offset); -+ break; -+ -+ case STREAM_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found streaming device\n", -+ saa716x->pdev->device); -+ -+ saa716x_streamdev_info(saa716x, buf, offset); -+ break; -+ -+ case CONFIGSPACE_DEVICE: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found Configspace device\n", -+ saa716x->pdev->device); -+ -+ saa716x_unknown_device_info(saa716x, buf, offset); -+ break; -+ -+ default: -+ dprintk(SAA716x_NOTICE, 0, -+ " SAA%02x ROM: Found unknown device\n", -+ saa716x->pdev->device); -+ -+ saa716x_unknown_device_info(saa716x, buf, offset); -+ break; -+ } -+ } -+ mask <<= 1; -+ } -+ } -+ -+ dprintk(SAA716x_NOTICE, 0, "\n"); -+ -+ return 0; -+} -+ -+int saa716x_eeprom_data(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_romhdr rom_header; -+ struct saa716x_devinfo *device; -+ -+ u8 buf[1024]; -+ int i, ret = 0; -+ u32 offset = 0; -+ -+ /* dump */ -+ ret = saa716x_read_rombytes(saa716x, saa716x->id_offst, saa716x->id_len + 8, buf); -+ if (ret < 0) { -+ dprintk(SAA716x_ERROR, 1, "EEPROM Read error <%d>", ret); -+ goto err0; -+ } -+ -+ /* Get header */ -+ ret = saa716x_eeprom_header(saa716x, &rom_header, buf, &offset); -+ if (ret != 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Header Read failed <%d>", ret); -+ goto err0; -+ } -+ -+ /* allocate for device info */ -+ device = kzalloc(sizeof (struct saa716x_devinfo) * rom_header.devices, GFP_KERNEL); -+ if (device == NULL) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: out of memory"); -+ goto err0; -+ } -+ -+ for (i = 0; i < rom_header.devices; i++) { -+ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: ===== Device %d =====\n", -+ saa716x->pdev->device, -+ i); -+ -+ ret = saa716x_device_info(saa716x, &device[i], buf, &offset); -+ if (ret != 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Device info read failed <%d>", ret); -+ goto err1; -+ } -+ } -+ -+ kfree(device); -+ -+ return 0; -+ -+err1: -+ kfree(device); -+ -+err0: -+ return ret; -+} -+EXPORT_SYMBOL_GPL(saa716x_eeprom_data); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.h 2013-01-16 10:41:10.926798175 +0100 -@@ -0,0 +1,253 @@ -+#ifndef __SAA716x_ROM_H -+#define __SAA716x_ROM_H -+ -+ -+#define MSB(__x) ((__x >> 8) & 0xff) -+#define LSB(__x) (__x & 0xff) -+ -+#define DUMP_BYTES 0xf0 -+#define DUMP_OFFST 0x000 -+ -+struct saa716x_dev; -+ -+struct saa716x_romhdr { -+ u16 header_size; -+ u8 compression; -+ u8 version; -+ u16 data_size; -+ u8 devices; -+ u8 checksum; -+} __attribute__((packed)); -+ -+struct saa716x_devinfo { -+ u8 struct_size; -+ u8 device_id; -+ u8 master_devid; -+ u8 master_busid; -+ u32 device_type; -+ u16 implem_id; -+ u8 path_id; -+ u8 gpio_id; -+ u16 addr_size; -+ u16 extd_data_size; -+} __attribute__((packed)); -+ -+enum saa716x_device_types { -+ DECODER_DEVICE = 0x00000001, -+ GPIO_SOURCE = 0x00000002, -+ VIDEO_DECODER = 0x00000004, -+ AUDIO_DECODER = 0x00000008, -+ EVENT_SOURCE = 0x00000010, -+ CROSSBAR = 0x00000020, -+ TUNER_DEVICE = 0x00000040, -+ PLL_DEVICE = 0x00000080, -+ CHANNEL_DECODER = 0x00000100, -+ RDS_DECODER = 0x00000200, -+ ENCODER_DEVICE = 0x00000400, -+ IR_DEVICE = 0x00000800, -+ EEPROM_DEVICE = 0x00001000, -+ NOISE_FILTER = 0x00002000, -+ LNx_DEVICE = 0x00004000, -+ STREAM_DEVICE = 0x00010000, -+ CONFIGSPACE_DEVICE = 0x80000000 -+}; -+ -+struct saa716x_decoder_hdr { -+ u8 size; -+ u8 ext_data; -+}; -+ -+struct saa716x_decoder_info { -+ struct saa716x_decoder_hdr decoder_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_gpio_hdr { -+ u8 size; -+ u8 pins; -+ u8 rsvd; -+ u8 ext_data; -+}; -+ -+struct saa716x_gpio_info { -+ struct saa716x_gpio_hdr gpio_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_video_decoder_hdr { -+ u8 size; -+ u8 video_port0; -+ u8 video_port1; -+ u8 video_port2; -+ u8 vbi_port_id; -+ u8 video_port_type; -+ u8 vbi_port_type; -+ u8 encoder_port_type; -+ u8 video_output; -+ u8 vbi_output; -+ u8 encoder_output; -+ u8 ext_data; -+}; -+ -+struct saa716x_video_decoder_info { -+ struct saa716x_video_decoder_hdr decoder_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_audio_decoder_hdr { -+ u8 size; -+ u8 port; -+ u8 output; -+ u8 ext_data; -+}; -+ -+struct saa716x_audio_decoder_info { -+ struct saa716x_audio_decoder_hdr decoder_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_evsrc_hdr { -+ u8 size; -+ u8 master_devid; -+ u16 condition_id; -+ u8 rsvd; -+ u8 ext_data; -+}; -+ -+struct saa716x_evsrc_info { -+ struct saa716x_evsrc_hdr evsrc_hdr; -+ u8 *ext_data; -+}; -+ -+enum saa716x_input_pair_type { -+ TUNER_SIF = 0x00, -+ TUNER_LINE = 0x01, -+ TUNER_SPDIF = 0x02, -+ TUNER_NONE = 0x03, -+ CVBS_LINE = 0x04, -+ CVBS_SPDIF = 0x05, -+ CVBS_NONE = 0x06, -+ YC_LINE = 0x07, -+ YC_SPDIF = 0x08, -+ YC_NONE = 0x09, -+ YPbPr_LINE = 0x0a, -+ YPbPr_SPDIF = 0x0b, -+ YPbPr_NONE = 0x0c, -+ NO_LINE = 0x0d, -+ NO_SPDIF = 0x0e, -+ RGB_LINE = 0x0f, -+ RGB_SPDIF = 0x10, -+ RGB_NONE = 0x11 -+}; -+ -+struct saa716x_xbar_pair_info { -+ u8 pair_input_type; -+ u8 video_input_id; -+ u8 audio_input_id; -+}; -+ -+struct saa716x_xbar_hdr { -+ u8 size; -+ u8 pair_inputs; -+ u8 pair_route_default; -+ u8 ext_data; -+}; -+ -+struct saa716x_xbar_info { -+ struct saa716x_xbar_hdr xbar_hdr; -+ struct saa716x_xbar_pair_info *pair_info; -+ u8 *ext_data; -+}; -+ -+struct saa716x_tuner_hdr { -+ u8 size; -+ u8 ext_data; -+}; -+ -+struct saa716x_tuner_info { -+ struct saa716x_tuner_hdr tuner_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_pll_hdr { -+ u8 size; -+ u8 ext_data; -+}; -+ -+struct saa716x_pll_info { -+ struct saa716x_pll_hdr pll_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_channel_decoder_hdr { -+ u8 size; -+ u8 port; -+ u8 ext_data; -+}; -+ -+struct saa716x_channel_decoder_info { -+ struct saa716x_channel_decoder_hdr channel_dec_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_encoder_hdr { -+ u8 size; -+ u8 stream_port0; -+ u8 stream_port1; -+ u8 ext_data; -+}; -+ -+struct saa716x_encoder_info { -+ struct saa716x_encoder_hdr encoder_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_ir_hdr { -+ u8 size; -+ u8 ir_caps; -+ u8 ext_data; -+}; -+ -+struct saa716x_ir_info { -+ struct saa716x_ir_hdr ir_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_eeprom_hdr { -+ u8 size; -+ u8 rel_device; -+ u8 ext_data; -+}; -+ -+struct saa716x_eeprom_info { -+ struct saa716x_eeprom_hdr eeprom_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_filter_hdr { -+ u8 size; -+ u8 video_decoder; -+ u8 audio_decoder; -+ u8 event_source; -+ u8 ext_data; -+}; -+ -+struct saa716x_filter_info { -+ struct saa716x_filter_hdr filter_hdr; -+ u8 *ext_data; -+}; -+ -+struct saa716x_streamdev_hdr { -+ u8 size; -+ u8 ext_data; -+}; -+ -+struct saa716x_streamdev_info { -+ struct saa716x_streamdev_hdr streamdev_hdr; -+ u8 *ext_data; -+}; -+ -+extern int saa716x_dump_eeprom(struct saa716x_dev *saa716x); -+extern int saa716x_eeprom_data(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_ROM_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.c 2013-01-16 10:41:10.926798175 +0100 -@@ -0,0 +1,313 @@ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_spi_reg.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+#if 0 // not needed atm -+int saa716x_spi_irqevent(struct saa716x_dev *saa716x) -+{ -+ u32 stat, mask; -+ -+ BUG_ON(saa716x == NULL); -+ -+ stat = SAA716x_EPRD(SPI, SPI_STATUS); -+ mask = SAA716x_EPRD(SPI, SPI_CONTROL_REG) & SPI_SERIAL_INTER_ENABLE; -+ if ((!stat && !mask)) -+ return -1; -+ -+ dprintk(SAA716x_DEBUG, 0, "SPI event: Stat=<%02x>", stat); -+ -+ if (stat & SPI_TRANSFER_FLAG) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ if (stat & SPI_WRITE_COLLISSION) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ if (stat & SPI_READ_OVERRUN) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ if (stat & SPI_MODE_FAULT) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ if (stat & SPI_SLAVE_ABORT) -+ dprintk(SAA716x_DEBUG, 0, " "); -+ -+ return 0; -+} -+#endif -+ -+void saa716x_spi_write(struct saa716x_dev *saa716x, const u8 *data, int length) -+{ -+ int i; -+ u32 value; -+ int rounds; -+ -+ for (i = 0; i < length; i++) { -+ SAA716x_EPWR(SPI, SPI_DATA, data[i]); -+ rounds = 0; -+ value = SAA716x_EPRD(SPI, SPI_STATUS); -+ -+ while ((value & SPI_TRANSFER_FLAG) == 0 && rounds < 5000) { -+ value = SAA716x_EPRD(SPI, SPI_STATUS); -+ rounds++; -+ } -+ } -+} -+EXPORT_SYMBOL_GPL(saa716x_spi_write); -+ -+#if 0 // not needed atm -+static int saa716x_spi_status(struct saa716x_dev *saa716x, u32 *status) -+{ -+ u32 stat; -+ -+ stat = SAA716x_EPRD(SPI, SPI_STATUS); -+ -+ if (stat & SPI_TRANSFER_FLAG) -+ dprintk(SAA716x_DEBUG, 1, "Transfer complete <%02x>", stat); -+ -+ if (stat & SPI_WRITE_COLLISSION) -+ dprintk(SAA716x_DEBUG, 1, "Write collission <%02x>", stat); -+ -+ if (stat & SPI_READ_OVERRUN) -+ dprintk(SAA716x_DEBUG, 1, "Read Overrun <%02x>", stat); -+ -+ if (stat & SPI_MODE_FAULT) -+ dprintk(SAA716x_DEBUG, 1, "MODE fault <%02x>", stat); -+ -+ if (stat & SPI_SLAVE_ABORT) -+ dprintk(SAA716x_DEBUG, 1, "SLAVE abort <%02x>", stat); -+ -+ *status = stat; -+ -+ return 0; -+} -+ -+#define SPI_CYCLE_TIMEOUT 100 -+ -+static int saa716x_spi_xfer(struct saa716x_dev *saa716x, u32 *data) -+{ -+ u32 i, status = 0; -+ -+ /* write data and wait for completion */ -+ SAA716x_EPWR(SPI, SPI_DATA, data[i]); -+ for (i = 0; i < SPI_CYCLE_TIMEOUT; i++) { -+ msleep(10); -+ saa716x_spi_status(saa716x, &status); -+#if 0 -+ if (status & SPI_TRANSFER_FLAG) { -+ data = SAA716x_EPRD(SPI, SPI_DATA); -+ return 0; -+ } -+#endif -+ if (status & (SPI_WRITE_COLLISSION | -+ SPI_READ_OVERRUN | -+ SPI_MODE_FAULT | -+ SPI_SLAVE_ABORT)) -+ -+ return -EIO; -+ } -+ -+ return -EIO; -+} -+ -+#if 0 -+static int saa716x_spi_wr(struct saa716x_dev *saa716x, const u8 *data, int length) -+{ -+ struct saa716x_spi_config *config = saa716x->spi_config; -+ u32 gpio_mask; -+ int ret = 0; -+ -+ // protect against multiple access -+ spin_lock(&saa716x->gpio_lock); -+ -+ // configure the module -+ saa716x_spi_config(saa716x); -+ -+ // check input -+ -+ // change polarity of GPIO if active high -+ if (config->active_hi) { -+ select = 1; -+ release = 0; -+ } -+ -+ // configure GPIO, first set output register to low selected level -+ saa716x_gpio_write(saa716x, gpio, select); -+ -+ // set mode register to register controlled (0) -+ gpio_mask = (1 << gpio); -+ saa716x_set_gpio_mode(saa716x, gpio_mask, 0); -+ -+ // configure bit as output (0) -+ saa716x_gpio_ctl(saa716x, gpio_mask, 0); -+ -+ // wait at least 500ns before sending a byte -+ msleep(1); -+ -+ // send command -+ for (i = 0; i < dwCommandSize; i++) { -+ ucData = 0; -+// dwStatus = TransferData(pucCommand[i], &ucData); -+ ret = saa716x_spi_xfer(saa716x); -+ //tmDBGPRINTEx(4,("Info: Command 0x%x ", pucCommand[i] )); -+ -+ /* If command length > 1, disable CS at the end of each command. -+ * But after the last command byte CS must be left active! -+ */ -+ if ((dwCommandSize > 1) && (i < dwCommandSize - 1)) { -+ -+ saa716x_gpio_write(saa716x, gpio, release); -+ msleep(1); /* 500 nS minimum */ -+ saa716x_gpio_write(saa716x, gpio, select); -+ } -+ -+ if (ret != 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Command transfer failed"); -+ msleep(1); /* 500 nS minimum */ -+ saa716x_gpio_write(saa716x, gpio, release); /* release GPIO */ -+ spin_unlock(&saa716x->spi_lock); -+ return ret; -+ } -+ -+ if (config->LSB_first) -+ dwTransferByte++; -+ else -+ dwTransferByte--; -+ } -+ -+// assume that the byte order is the same as the bit order -+ -+// send read address -+ -+// send data -+ -+// wait at least 500ns before releasing slave -+ -+// release GPIO pin -+ -+ // release spinlock -+ spin_unlock(&saa716x->gpio_lock); -+} -+#endif -+ -+#define MODEBITS (SPI_CPOL | SPI_CPHA) -+ -+static int saa716x_spi_setup(struct spi_device *spi) -+{ -+ struct spi_master *master = spi->master; -+ struct saa716x_spi_state *saa716x_spi = spi_master_get_devdata(master); -+ struct saa716x_dev *saa716x = saa716x_spi->saa716x; -+ struct saa716x_spi_config *config = &saa716x->spi_config; -+ -+ u8 control = 0; -+ -+ if (spi->mode & ~MODEBITS) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Unsupported MODE bits <%x>", -+ spi->mode & ~MODEBITS); -+ -+ return -EINVAL; -+ } -+ -+ SAA716x_EPWR(SPI, SPI_CLOCK_COUNTER, config->clk_count); -+ -+ control |= SPI_MODE_SELECT; /* SPI Master */ -+ -+ if (config->LSB_first) -+ control |= SPI_LSB_FIRST_ENABLE; -+ -+ if (config->clk_pol) -+ control |= SPI_CLOCK_POLARITY; -+ -+ if (config->clk_pha) -+ control |= SPI_CLOCK_PHASE; -+ -+ SAA716x_EPWR(SPI, SPI_CONTROL_REG, control); -+ -+ return 0; -+} -+ -+static void saa716x_spi_cleanup(struct spi_device *spi) -+{ -+ -+} -+ -+static int saa716x_spi_transfer(struct spi_device *spi, struct spi_message *msg) -+{ -+ struct spi_master *master = spi->master; -+ struct saa716x_spi_state *saa716x_spi = spi_master_get_devdata(master); -+ struct saa716x_dev *saa716x = saa716x_spi->saa716x; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&saa716x->gpio_lock, flags); -+#if 0 -+ if (saa716x_spi->run == QUEUE_STOPPED) { -+ spin_unlock_irqrestore(&saa716x_spi->lock, flags); -+ return -ESHUTDOWN; -+ } -+ -+ msg->actual_length = 0; -+ msg->status = -EINPROGRESS; -+ msg->state = START_STATE; -+ -+ list_add_tail(&msg->queue, &saa716x_spi->queue); -+ -+ if (saa716x_spi->run == QUEUE_RUNNING && !saa716x_spi->busy) -+ queue_work(saa716x_spi->workqueue, &saa716x_spi->pump_messages); -+#endif -+ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); -+ -+ return 0; -+} -+ -+int __devinit saa716x_spi_init(struct saa716x_dev *saa716x) -+{ -+ struct pci_dev *pdev = saa716x->pdev; -+ struct spi_master *master; -+ struct saa716x_spi_state *saa716x_spi; -+ int ret; -+ -+ dprintk(SAA716x_DEBUG, 1, "Initializing SAA%02x I2C Core", -+ saa716x->pdev->device); -+ -+ master = spi_alloc_master(&pdev->dev, sizeof (struct saa716x_spi_state)); -+ if (master == NULL) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: Cannot allocate SPI Master!"); -+ return -ENOMEM; -+ } -+ -+ saa716x_spi = spi_master_get_devdata(master); -+ saa716x_spi->master = master; -+ saa716x_spi->saa716x = saa716x; -+ saa716x->saa716x_spi = saa716x_spi; -+ -+ master->bus_num = pdev->bus->number; -+ master->num_chipselect = 1; /* TODO! use config */ -+ master->cleanup = saa716x_spi_cleanup; -+ master->setup = saa716x_spi_setup; -+ master->transfer = saa716x_spi_transfer; -+ -+ ret = spi_register_master(master); -+ if (ret != 0) { -+ dprintk(SAA716x_ERROR, 1, "ERROR: registering SPI Master!"); -+ goto err; -+ } -+err: -+ spi_master_put(master); -+ return ret; -+} -+EXPORT_SYMBOL(saa716x_spi_init); -+ -+void __devexit saa716x_spi_exit(struct saa716x_dev *saa716x) -+{ -+ struct saa716x_spi_state *saa716x_spi = saa716x->saa716x_spi; -+ -+ spi_unregister_master(saa716x_spi->master); -+ dprintk(SAA716x_DEBUG, 1, "SAA%02x SPI succesfully removed", saa716x->pdev->device); -+} -+EXPORT_SYMBOL(saa716x_spi_exit); -+#endif -+ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.h 2013-01-16 10:41:10.926798175 +0100 -@@ -0,0 +1,23 @@ -+#ifndef __SAA716x_SPI_H -+#define __SAA716x_SPI_H -+ -+struct saa716x_dev; -+ -+struct saa716x_spi_config { -+ u8 clk_count; -+ u8 clk_pol:1; -+ u8 clk_pha:1; -+ u8 LSB_first:1; -+}; -+ -+struct saa716x_spi_state { -+ struct spi_master *master; -+ struct saa716x_dev *saa716x; -+}; -+ -+extern void saa716x_spi_write(struct saa716x_dev *saa716x, const u8 *data, int length); -+ -+extern int saa716x_spi_init(struct saa716x_dev *saa716x); -+extern void saa716x_spi_exit(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_SPI_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_spi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_spi_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi_reg.h 2013-01-16 10:41:10.926798175 +0100 -@@ -0,0 +1,27 @@ -+#ifndef __SAA716x_SPI_REG_H -+#define __SAA716x_SPI_REG_H -+ -+/* -------------- SPI Registers -------------- */ -+ -+#define SPI_CONTROL_REG 0x000 -+#define SPI_SERIAL_INTER_ENABLE (0x00000001 << 7) -+#define SPI_LSB_FIRST_ENABLE (0x00000001 << 6) -+#define SPI_MODE_SELECT (0x00000001 << 5) -+#define SPI_CLOCK_POLARITY (0x00000001 << 4) -+#define SPI_CLOCK_PHASE (0x00000001 << 3) -+ -+#define SPI_STATUS 0x004 -+#define SPI_TRANSFER_FLAG (0x00000001 << 7) -+#define SPI_WRITE_COLLISSION (0x00000001 << 6) -+#define SPI_READ_OVERRUN (0x00000001 << 5) -+#define SPI_MODE_FAULT (0x00000001 << 4) -+#define SPI_SLAVE_ABORT (0x00000001 << 3) -+ -+#define SPI_DATA 0x008 -+#define SPI_BIDI_DATA (0x000000ff << 0) -+ -+#define SPI_CLOCK_COUNTER 0x00c -+#define SPI_CLOCK (0x00000001 << 0) -+ -+ -+#endif /* __SAA716x_SPI_REG_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.c ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.c 2013-01-16 10:41:10.926798175 +0100 -@@ -0,0 +1,23 @@ -+#include -+ -+#include "saa716x_mod.h" -+ -+#include "saa716x_vip_reg.h" -+#include "saa716x_spi.h" -+#include "saa716x_priv.h" -+ -+void saa716x_vipint_disable(struct saa716x_dev *saa716x) -+{ -+ SAA716x_EPWR(VI0, INT_ENABLE, 0); /* disable VI 0 IRQ */ -+ SAA716x_EPWR(VI1, INT_ENABLE, 0); /* disable VI 1 IRQ */ -+ SAA716x_EPWR(VI0, INT_CLR_STATUS, 0x3ff); /* clear IRQ */ -+ SAA716x_EPWR(VI1, INT_CLR_STATUS, 0x3ff); /* clear IRQ */ -+} -+EXPORT_SYMBOL_GPL(saa716x_vipint_disable); -+ -+void saa716x_vip_disable(struct saa716x_dev *saa716x) -+{ -+ SAA716x_EPWR(VI0, VIP_POWER_DOWN, VI_PWR_DWN); -+ SAA716x_EPWR(VI1, VIP_POWER_DOWN, VI_PWR_DWN); -+} -+EXPORT_SYMBOL_GPL(saa716x_vip_disable); -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.h 2013-01-16 10:41:10.927798168 +0100 -@@ -0,0 +1,9 @@ -+#ifndef __SAA716x_VIP_H -+#define __SAA716x_VIP_H -+ -+struct saa716x_dev; -+ -+extern void saa716x_vipint_disable(struct saa716x_dev *saa716x); -+extern void saa716x_vip_disable(struct saa716x_dev *saa716x); -+ -+#endif /* __SAA716x_VIP_H */ -diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_vip_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip_reg.h ---- linux-3.7.2/drivers/media/common/saa716x/saa716x_vip_reg.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip_reg.h 2013-01-16 10:41:10.927798168 +0100 -@@ -0,0 +1,127 @@ -+#ifndef __SAA716x_VIP_REG_H -+#define __SAA716x_VIP_REG_H -+ -+/* -------------- VIP Registers -------------- */ -+ -+#define VI_MODE 0x000 -+#define VID_CFEN (0x00000003 << 30) -+#define VID_OSM (0x00000001 << 29) -+#define VID_FSEQ (0x00000001 << 28) -+#define AUX_CFEN (0x00000003 << 26) -+#define AUX_OSM (0x00000001 << 25) -+#define AUX_FSEQ (0x00000001 << 24) -+#define AUX_ANC_DATA (0x00000003 << 22) -+#define AUX_ANC_RAW (0x00000001 << 21) -+#define RST_ON_ERR (0x00000001 << 17) -+#define SOFT_RESET (0x00000001 << 16) -+#define IFF_CLAMP (0x00000001 << 14) -+#define IFF_MODE (0x00000003 << 12) -+#define DFF_CLAMP (0x00000001 << 10) -+#define DFF_MODE (0x00000003 << 8) -+#define HSP_CLAMP (0x00000001 << 3) -+#define HSP_RGB (0x00000001 << 2) -+#define HSP_MODE (0x00000003 << 0) -+ -+#define RCRB_CTRL 0x004 -+#define RCRB_CFG_ADDR 0x008 -+#define RCRB_CFG_EXT_ADDR 0x00c -+#define RCRB_IO_ADDR 0x010 -+#define RCRB_MEM_LADDR 0x014 -+#define RCRB_MEM_UADDR 0x018 -+#define RCRB_DATA 0x01c -+#define RCRB_MASK 0x020 -+#define RCRB_MSG_HDR 0x040 -+#define RCRB_MSG_PL0 0x044 -+#define RCRB_MSG_PL1 0x048 -+ -+#define ID_MASK0 0x020 -+#define VI_ID_MASK_0 (0x000000ff << 8) -+#define VI_DATA_ID_0 (0x000000ff << 0) -+ -+#define ID_MASK1 0x024 -+#define VI_ID_MASK_1 (0x000000ff << 8) -+#define VI_DATA_ID_1 (0x000000ff << 0) -+ -+#define VIP_LINE_THRESH 0x040 -+#define VI_LCTHR (0x000007ff << 0) -+ -+#define VIN_FORMAT 0x100 -+#define VI_VSRA (0x00000003 << 30) -+#define VI_SYNCHD (0x00000001 << 25) -+#define VI_DUAL_STREAM (0x00000001 << 24) -+#define VI_NHDAUX (0x00000001 << 20) -+#define VI_NPAR (0x00000001 << 19) -+#define VI_VSEL (0x00000003 << 14) -+#define VI_TWOS (0x00000001 << 13) -+#define VI_TPG (0x00000001 << 12) -+#define VI_FREF (0x00000001 << 10) -+#define VI_FTGL (0x00000001 << 9) -+#define VI_SF (0x00000001 << 3) -+#define VI_FZERO (0x00000001 << 2) -+#define VI_REVS (0x00000001 << 1) -+#define VI_REHS (0x00000001 << 0) -+ -+#define TC76543210 0x800 -+#define TCFEDCBA98 0x804 -+#define PHYCFG 0x900 -+#define CONFIG 0xfd4 -+#define INT_ENABLE_CLR 0xfd8 -+#define INT_ENABLE_SET 0xfdc -+ -+ -+#define INT_STATUS 0xfe0 -+#define VI_STAT_FID_AUX (0x00000001 << 31) -+#define VI_STAT_FID_VID (0x00000001 << 30) -+#define VI_STAT_FID_VPI (0x00000001 << 29) -+#define VI_STAT_LINE_COUNT (0x00000fff << 16) -+#define VI_STAT_AUX_OVRFLW (0x00000001 << 9) -+#define VI_STAT_VID_OVRFLW (0x00000001 << 8) -+#define VI_STAT_WIN_SEQBRK (0x00000001 << 7) -+#define VI_STAT_FID_SEQBRK (0x00000001 << 6) -+#define VI_STAT_LINE_THRESH (0x00000001 << 5) -+#define VI_STAT_AUX_WRAP (0x00000001 << 4) -+#define VI_STAT_AUX_START_IN (0x00000001 << 3) -+#define VI_STAT_AUX_END_OUT (0x00000001 << 2) -+#define VI_STAT_VID_START_IN (0x00000001 << 1) -+#define VI_STAT_VID_END_OUT (0x00000001 << 0) -+ -+#define INT_ENABLE 0xfe4 -+#define VI_ENABLE_AUX_OVRFLW (0x00000001 << 9) -+#define VI_ENABLE_VID_OVRFLW (0x00000001 << 8) -+#define VI_ENABLE_WIN_SEQBRK (0x00000001 << 7) -+#define VI_ENABLE_FID_SEQBRK (0x00000001 << 6) -+#define VI_ENABLE_LINE_THRESH (0x00000001 << 5) -+#define VI_ENABLE_AUX_WRAP (0x00000001 << 4) -+#define VI_ENABLE_AUX_START_IN (0x00000001 << 3) -+#define VI_ENABLE_AUX_END_OUT (0x00000001 << 2) -+#define VI_ENABLE_VID_START_IN (0x00000001 << 1) -+#define VI_ENABLE_VID_END_OUT (0x00000001 << 0) -+ -+#define INT_CLR_STATUS 0xfe8 -+#define VI_CLR_STATUS_AUX_OVRFLW (0x00000001 << 9) -+#define VI_CLR_STATUS_VID_OVRFLW (0x00000001 << 8) -+#define VI_CLR_STATUS_WIN_SEQBRK (0x00000001 << 7) -+#define VI_CLR_STATUS_FID_SEQBRK (0x00000001 << 6) -+#define VI_CLR_STATUS_LINE_THRESH (0x00000001 << 5) -+#define VI_CLR_STATUS_AUX_WRAP (0x00000001 << 4) -+#define VI_CLR_STATUS_AUX_START_IN (0x00000001 << 3) -+#define VI_CLR_STATUS_AUX_END_OUT (0x00000001 << 2) -+#define VI_CLR_STATUS_VID_START_IN (0x00000001 << 1) -+#define VI_CLR_STATUS_VID_END_OUT (0x00000001 << 0) -+ -+#define INT_SET_STATUS 0xfec -+#define VI_SET_STATUS_AUX_OVRFLW (0x00000001 << 9) -+#define VI_SET_STATUS_VID_OVRFLW (0x00000001 << 8) -+#define VI_SET_STATUS_WIN_SEQBRK (0x00000001 << 7) -+#define VI_SET_STATUS_FID_SEQBRK (0x00000001 << 6) -+#define VI_SET_STATUS_LINE_THRESH (0x00000001 << 5) -+#define VI_SET_STATUS_AUX_WRAP (0x00000001 << 4) -+#define VI_SET_STATUS_AUX_START_IN (0x00000001 << 3) -+#define VI_SET_STATUS_AUX_END_OUT (0x00000001 << 2) -+#define VI_SET_STATUS_VID_START_IN (0x00000001 << 1) -+#define VI_SET_STATUS_VID_END_OUT (0x00000001 << 0) -+ -+#define VIP_POWER_DOWN 0xff4 -+#define VI_PWR_DWN (0x00000001 << 31) -+ -+#endif /* __SAA716x_VIP_REG_H */ -diff -Naur linux-3.7.2/drivers/media/dvb-frontends/ds3103.h linux-3.7.2.patch/drivers/media/dvb-frontends/ds3103.h ---- linux-3.7.2/drivers/media/dvb-frontends/ds3103.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/dvb-frontends/ds3103.h 2013-01-16 10:41:10.927798168 +0100 -@@ -0,0 +1,47 @@ -+/* -+ Montage Technology DS3103 - DVBS/S2 Demodulator driver -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+*/ -+ -+#ifndef DS3103_H -+#define DS3103_H -+ -+#include -+ -+struct ds3103_config { -+ /* the demodulator's i2c address */ -+ u8 demod_address; -+ u8 ci_mode; -+ /* Set device param to start dma */ -+ int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured); -+ /* Hook for Lock LED */ -+ void (*set_lock_led)(struct dvb_frontend *fe, int offon); -+}; -+ -+#if defined(CONFIG_DVB_DS3103) || \ -+ (defined(CONFIG_DVB_DS3103_MODULE) && defined(MODULE)) -+extern struct dvb_frontend *ds3103_attach(const struct ds3103_config *config, -+ struct i2c_adapter *i2c); -+#else -+static inline -+struct dvb_frontend *ds3103_attach(const struct ds3103_config *config, -+ struct i2c_adapter *i2c) -+{ -+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); -+ return NULL; -+} -+#endif /* CONFIG_DVB_DS3103 */ -+#endif /* DS3103_H */ -diff -Naur linux-3.7.2/drivers/media/dvb-frontends/ts2022.h linux-3.7.2.patch/drivers/media/dvb-frontends/ts2022.h ---- linux-3.7.2/drivers/media/dvb-frontends/ts2022.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.2.patch/drivers/media/dvb-frontends/ts2022.h 2013-01-16 10:41:10.927798168 +0100 -@@ -0,0 +1,51 @@ -+ /* -+ Driver for Montage TS2022 DVBS/S2 Silicon tuner -+ -+ Copyright (C) 2012 Tomazzo Muzumici -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ -+ */ -+ -+#ifndef __DVB_TS2022_H__ -+#define __DVB_TS2022_H__ -+ -+#include -+#include "dvb_frontend.h" -+ -+/** -+ * Attach a ts2022 tuner to the supplied frontend structure. -+ * -+ * @param fe Frontend to attach to. -+ * @param addr i2c address of the tuner. -+ * @param i2c i2c adapter to use. -+ * @return FE pointer on success, NULL on failure. -+ */ -+#if defined(CONFIG_DVB_TS2022) || (defined(CONFIG_DVB_TS2022_MODULE) \ -+ && defined(MODULE)) -+extern struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe, int addr, -+ struct i2c_adapter *i2c); -+#else -+static inline struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe, -+ int addr, -+ struct i2c_adapter *i2c) -+{ -+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); -+ return NULL; -+} -+#endif /* CONFIG_DVB_TS2022 */ -+ -+#endif /* __DVB_TS2022_H__ */ -diff -Naur linux-3.7.2/include/uapi/linux/dvb/osd.h linux-3.7.2.patch/include/uapi/linux/dvb/osd.h ---- linux-3.7.2/include/uapi/linux/dvb/osd.h 2013-01-11 18:19:28.000000000 +0100 -+++ linux-3.7.2.patch/include/uapi/linux/dvb/osd.h 2013-01-16 10:41:21.992712972 +0100 -@@ -141,4 +141,20 @@ - #define OSD_SEND_CMD _IOW('o', 160, osd_cmd_t) - #define OSD_GET_CAPABILITY _IOR('o', 161, osd_cap_t) - -+typedef struct osd_raw_cmd_s { -+ const void __user *cmd_data; -+ int cmd_len; -+ void __user *result_data; -+ int result_len; -+} osd_raw_cmd_t; -+ -+typedef struct osd_raw_data_s { -+ const void __user *data_buffer; -+ int data_length; -+ int data_handle; -+} osd_raw_data_t; -+ -+#define OSD_RAW_CMD _IOWR('o', 162, osd_raw_cmd_t) -+#define OSD_RAW_DATA _IOWR('o', 163, osd_raw_data_t) -+ - #endif diff --git a/packages/linux/patches/3.7.10/linux-990.01-hda_Add_workaround_for_conflicting_IEC958_controls.patch b/packages/linux/patches/3.7.10/linux-990.01-hda_Add_workaround_for_conflicting_IEC958_controls.patch deleted file mode 100644 index a17d219332..0000000000 --- a/packages/linux/patches/3.7.10/linux-990.01-hda_Add_workaround_for_conflicting_IEC958_controls.patch +++ /dev/null @@ -1,266 +0,0 @@ -From dcda5806165c155d90b9aa466a1602cf4726012b Mon Sep 17 00:00:00 2001 -From: Takashi Iwai -Date: Fri, 12 Oct 2012 17:24:51 +0200 -Subject: [PATCH] ALSA: hda - Add workaround for conflicting IEC958 controls - -When both an SPDIF and an HDMI device are created on the same card -instance, multiple IEC958 controls are created with indices=0, 1, ... -But the alsa-lib configuration can't know which index corresponds -actually to which PCM device, and both the SPDIF and the HDMI -configurations point to the first IEC958 control wrongly. - -This patch introduces a (hackish and ugly) workaround: the IEC958 -controls for the SPDIF device are re-labeled with device=1 when HDMI -coexists. The device=1 corresponds to the actual PCM device for -SPDIF, so it's anyway a better representation. In future, HDMI -controls should be moved with the corresponding PCM device number, -too. - -Signed-off-by: Takashi Iwai ---- - sound/pci/hda/hda_codec.c | 60 ++++++++++++++++++++++++++++------------ - sound/pci/hda/hda_codec.h | 1 + - sound/pci/hda/hda_local.h | 8 +++-- - sound/pci/hda/patch_cirrus.c | 5 ++- - sound/pci/hda/patch_hdmi.c | 7 ++-- - sound/pci/hda/patch_realtek.c | 7 ++-- - sound/pci/hda/patch_sigmatel.c | 7 ++-- - 7 files changed, 63 insertions(+), 32 deletions(-) - -diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c -index ee958a7..2da7875 100644 ---- a/sound/pci/hda/hda_codec.c -+++ b/sound/pci/hda/hda_codec.c -@@ -2166,12 +2166,12 @@ EXPORT_SYMBOL_HDA(snd_hda_set_vmaster_tlv); - - /* find a mixer control element with the given name */ - static struct snd_kcontrol * --_snd_hda_find_mixer_ctl(struct hda_codec *codec, -- const char *name, int idx) -+find_mixer_ctl(struct hda_codec *codec, const char *name, int dev, int idx) - { - struct snd_ctl_elem_id id; - memset(&id, 0, sizeof(id)); - id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; -+ id.device = dev; - id.index = idx; - if (snd_BUG_ON(strlen(name) >= sizeof(id.name))) - return NULL; -@@ -2189,15 +2189,16 @@ _snd_hda_find_mixer_ctl(struct hda_codec *codec, - struct snd_kcontrol *snd_hda_find_mixer_ctl(struct hda_codec *codec, - const char *name) - { -- return _snd_hda_find_mixer_ctl(codec, name, 0); -+ return find_mixer_ctl(codec, name, 0, 0); - } - EXPORT_SYMBOL_HDA(snd_hda_find_mixer_ctl); - --static int find_empty_mixer_ctl_idx(struct hda_codec *codec, const char *name) -+static int find_empty_mixer_ctl_idx(struct hda_codec *codec, const char *name, -+ int dev) - { - int idx; - for (idx = 0; idx < 16; idx++) { /* 16 ctlrs should be large enough */ -- if (!_snd_hda_find_mixer_ctl(codec, name, idx)) -+ if (!find_mixer_ctl(codec, name, dev, idx)) - return idx; - } - return -EBUSY; -@@ -3148,26 +3149,48 @@ static struct snd_kcontrol_new dig_mixes[] = { - }; - - /** -- * snd_hda_create_spdif_out_ctls - create Output SPDIF-related controls -+ * snd_hda_create_dig_out_ctls - create Output SPDIF-related controls - * @codec: the HDA codec -- * @nid: audio out widget NID -- * -- * Creates controls related with the SPDIF output. -- * Called from each patch supporting the SPDIF out. -+ * @associated_nid: NID that new ctls associated with -+ * @cvt_nid: converter NID -+ * @type: HDA_PCM_TYPE_* -+ * Creates controls related with the digital output. -+ * Called from each patch supporting the digital out. - * - * Returns 0 if successful, or a negative error code. - */ --int snd_hda_create_spdif_out_ctls(struct hda_codec *codec, -- hda_nid_t associated_nid, -- hda_nid_t cvt_nid) -+int snd_hda_create_dig_out_ctls(struct hda_codec *codec, -+ hda_nid_t associated_nid, -+ hda_nid_t cvt_nid, -+ int type) - { - int err; - struct snd_kcontrol *kctl; - struct snd_kcontrol_new *dig_mix; -- int idx; -+ int idx, dev = 0; -+ const int spdif_pcm_dev = 1; - struct hda_spdif_out *spdif; - -- idx = find_empty_mixer_ctl_idx(codec, "IEC958 Playback Switch"); -+ if (codec->primary_dig_out_type == HDA_PCM_TYPE_HDMI && -+ type == HDA_PCM_TYPE_SPDIF) { -+ dev = spdif_pcm_dev; -+ } else if (codec->primary_dig_out_type == HDA_PCM_TYPE_SPDIF && -+ type == HDA_PCM_TYPE_HDMI) { -+ for (idx = 0; idx < codec->spdif_out.used; idx++) { -+ spdif = snd_array_elem(&codec->spdif_out, idx); -+ for (dig_mix = dig_mixes; dig_mix->name; dig_mix++) { -+ kctl = find_mixer_ctl(codec, dig_mix->name, 0, idx); -+ if (!kctl) -+ break; -+ kctl->id.device = spdif_pcm_dev; -+ } -+ } -+ codec->primary_dig_out_type = HDA_PCM_TYPE_HDMI; -+ } -+ if (!codec->primary_dig_out_type) -+ codec->primary_dig_out_type = type; -+ -+ idx = find_empty_mixer_ctl_idx(codec, "IEC958 Playback Switch", dev); - if (idx < 0) { - printk(KERN_ERR "hda_codec: too many IEC958 outputs\n"); - return -EBUSY; -@@ -3177,6 +3200,7 @@ int snd_hda_create_spdif_out_ctls(struct hda_codec *codec, - kctl = snd_ctl_new1(dig_mix, codec); - if (!kctl) - return -ENOMEM; -+ kctl->id.device = dev; - kctl->id.index = idx; - kctl->private_value = codec->spdif_out.used - 1; - err = snd_hda_ctl_add(codec, associated_nid, kctl); -@@ -3189,7 +3213,7 @@ int snd_hda_create_spdif_out_ctls(struct hda_codec *codec, - spdif->status = convert_to_spdif_status(spdif->ctls); - return 0; - } --EXPORT_SYMBOL_HDA(snd_hda_create_spdif_out_ctls); -+EXPORT_SYMBOL_HDA(snd_hda_create_dig_out_ctls); - - /* get the hda_spdif_out entry from the given NID - * call within spdif_mutex lock -@@ -3364,7 +3388,7 @@ int snd_hda_create_spdif_in_ctls(struct hda_codec *codec, hda_nid_t nid) - struct snd_kcontrol_new *dig_mix; - int idx; - -- idx = find_empty_mixer_ctl_idx(codec, "IEC958 Capture Switch"); -+ idx = find_empty_mixer_ctl_idx(codec, "IEC958 Capture Switch", 0); - if (idx < 0) { - printk(KERN_ERR "hda_codec: too many IEC958 inputs\n"); - return -EBUSY; -@@ -4472,7 +4496,7 @@ int snd_hda_add_new_ctls(struct hda_codec *codec, - addr = codec->addr; - else if (!idx && !knew->index) { - idx = find_empty_mixer_ctl_idx(codec, -- knew->name); -+ knew->name, 0); - if (idx <= 0) - return err; - } else -diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h -index 10a03b0..62d4229 100644 ---- a/sound/pci/hda/hda_codec.h -+++ b/sound/pci/hda/hda_codec.h -@@ -836,6 +836,7 @@ struct hda_codec { - struct mutex hash_mutex; - struct snd_array spdif_out; - unsigned int spdif_in_enable; /* SPDIF input enable? */ -+ int primary_dig_out_type; /* primary digital out PCM type */ - const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */ - struct snd_array init_pins; /* initial (BIOS) pin configurations */ - struct snd_array driver_pins; /* pin configs set by codec parser */ -diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h -index 09dbdc3..8c43198 100644 ---- a/sound/pci/hda/hda_local.h -+++ b/sound/pci/hda/hda_local.h -@@ -240,9 +240,11 @@ int snd_hda_mixer_bind_tlv(struct snd_kcontrol *kcontrol, int op_flag, - /* - * SPDIF I/O - */ --int snd_hda_create_spdif_out_ctls(struct hda_codec *codec, -- hda_nid_t associated_nid, -- hda_nid_t cvt_nid); -+int snd_hda_create_dig_out_ctls(struct hda_codec *codec, -+ hda_nid_t associated_nid, -+ hda_nid_t cvt_nid, int type); -+#define snd_hda_create_spdif_out_ctls(codec, anid, cnid) \ -+ snd_hda_create_dig_out_ctls(codec, anid, cnid, HDA_PCM_TYPE_SPDIF) - int snd_hda_create_spdif_in_ctls(struct hda_codec *codec, hda_nid_t nid); - - /* -diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c -index 61a7113..a7f8790 100644 ---- a/sound/pci/hda/patch_cirrus.c -+++ b/sound/pci/hda/patch_cirrus.c -@@ -873,8 +873,9 @@ static int build_digital_output(struct hda_codec *codec) - if (!spec->multiout.dig_out_nid) - return 0; - -- err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid, -- spec->multiout.dig_out_nid); -+ err = snd_hda_create_dig_out_ctls(codec, spec->multiout.dig_out_nid, -+ spec->multiout.dig_out_nid, -+ spec->pcm_rec[1].pcm_type); - if (err < 0) - return err; - err = snd_hda_create_spdif_share_sw(codec, &spec->multiout); -diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c -index 71555cc..39ca100 100644 ---- a/sound/pci/hda/patch_hdmi.c -+++ b/sound/pci/hda/patch_hdmi.c -@@ -1589,9 +1589,10 @@ static int generic_hdmi_build_controls(struct hda_codec *codec) - if (err < 0) - return err; - -- err = snd_hda_create_spdif_out_ctls(codec, -- per_pin->pin_nid, -- per_pin->mux_nids[0]); -+ err = snd_hda_create_dig_out_ctls(codec, -+ per_pin->pin_nid, -+ per_pin->mux_nids[0], -+ HDA_PCM_TYPE_HDMI); - if (err < 0) - return err; - snd_hda_spdif_ctls_unassign(codec, pin_idx); -diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c -index 8253b4e..2d2bb66 100644 ---- a/sound/pci/hda/patch_realtek.c -+++ b/sound/pci/hda/patch_realtek.c -@@ -1836,9 +1836,10 @@ static int __alc_build_controls(struct hda_codec *codec) - return err; - } - if (spec->multiout.dig_out_nid) { -- err = snd_hda_create_spdif_out_ctls(codec, -- spec->multiout.dig_out_nid, -- spec->multiout.dig_out_nid); -+ err = snd_hda_create_dig_out_ctls(codec, -+ spec->multiout.dig_out_nid, -+ spec->multiout.dig_out_nid, -+ spec->pcm_rec[1].pcm_type); - if (err < 0) - return err; - if (!spec->no_analog) { -diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c -index 770013f..6214165 100644 ---- a/sound/pci/hda/patch_sigmatel.c -+++ b/sound/pci/hda/patch_sigmatel.c -@@ -1136,9 +1136,10 @@ static int stac92xx_build_controls(struct hda_codec *codec) - } - - if (spec->multiout.dig_out_nid) { -- err = snd_hda_create_spdif_out_ctls(codec, -- spec->multiout.dig_out_nid, -- spec->multiout.dig_out_nid); -+ err = snd_hda_create_dig_out_ctls(codec, -+ spec->multiout.dig_out_nid, -+ spec->multiout.dig_out_nid, -+ spec->autocfg.dig_out_type[0]); - if (err < 0) - return err; - err = snd_hda_create_spdif_share_sw(codec, --- -1.7.7.6 - diff --git a/packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-01.patch b/packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-01.patch deleted file mode 100644 index a09ddf98e7..0000000000 --- a/packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-01.patch +++ /dev/null @@ -1,11 +0,0 @@ -X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git;a=blobdiff_plain;f=drivers%2Fmedia%2Fdvb-frontends%2Fds3000.c;h=c84cd98a91504dcf2995a75a1e8d6e5013cf4f2d;hp=5b639087ce45623f7a2f1be7e1b6216c1bc686a8;hb=feadd7d3eca4da531b35b2af3623dd992f2d988d;hpb=6c17c24d384ce69893e191c94b500c97bd263c27 - -diff --git a/drivers/media/dvb-frontends/ds3000.c b/drivers/media/dvb-frontends/ds3000.c -index 5b63908..c84cd98 100644 ---- a/drivers/media/dvb-frontends/ds3000.c -+++ b/drivers/media/dvb-frontends/ds3000.c -@@ -1316,3 +1316,4 @@ MODULE_DESCRIPTION("DVB Frontend module for Montage Technology " - "DS3000/TS2020 hardware"); - MODULE_AUTHOR("Konstantin Dimitrov"); - MODULE_LICENSE("GPL"); -+MODULE_FIRMWARE(DS3000_DEFAULT_FIRMWARE); diff --git a/packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-02.patch b/packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-02.patch deleted file mode 100644 index 23785d5832..0000000000 --- a/packages/linux/patches/3.7.10/linux-990.03-media-ds3000_firmware-02.patch +++ /dev/null @@ -1,87 +0,0 @@ -From b41a536cf9806c3478b2fa68d59edafd0787e8aa Mon Sep 17 00:00:00 2001 -From: =?utf8?q?R=C3=A9mi=20Cardona?= -Date: Fri, 28 Sep 2012 08:59:27 -0300 -Subject: [PATCH] [media] ds3000: remove useless 'locking' -MIME-Version: 1.0 -Content-Type: text/plain; charset=utf8 -Content-Transfer-Encoding: 8bit - -Since b9bf2eafaad9c1ef02fb3db38c74568be601a43a, the function -ds3000_firmware_ondemand() is called only once during init. This -locking scheme may have been useful when the firmware was loaded at -each tune. -Furthermore, it looks like this 'lock' was put in to prevent concurrent -access (and not recursion as the comments suggest). However, this open- -coded mechanism is anything but race-free and should have used a proper -mutex. - -Signed-off-by: Rémi Cardona -Reviewed-by: Antti Palosaari -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/media/dvb-frontends/ds3000.c | 14 -------------- - 1 files changed, 0 insertions(+), 14 deletions(-) - -diff --git a/drivers/media/dvb-frontends/ds3000.c b/drivers/media/dvb-frontends/ds3000.c -index c84cd98..60a529e 100644 ---- a/drivers/media/dvb-frontends/ds3000.c -+++ b/drivers/media/dvb-frontends/ds3000.c -@@ -30,7 +30,6 @@ - #include "ds3000.h" - - static int debug; --static int force_fw_upload; - - #define dprintk(args...) \ - do { \ -@@ -234,7 +233,6 @@ struct ds3000_state { - struct i2c_adapter *i2c; - const struct ds3000_config *config; - struct dvb_frontend frontend; -- u8 skip_fw_load; - /* previous uncorrected block counter for DVB-S2 */ - u16 prevUCBS2; - }; -@@ -397,9 +395,6 @@ static int ds3000_firmware_ondemand(struct dvb_frontend *fe) - if (ret < 0) - return ret; - -- if (state->skip_fw_load || !force_fw_upload) -- return 0; /* Firmware already uploaded, skipping */ -- - /* Load firmware */ - /* request the firmware, this will block until someone uploads it */ - printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, -@@ -413,9 +408,6 @@ static int ds3000_firmware_ondemand(struct dvb_frontend *fe) - return ret; - } - -- /* Make sure we don't recurse back through here during loading */ -- state->skip_fw_load = 1; -- - ret = ds3000_load_firmware(fe, fw); - if (ret) - printk("%s: Writing firmware to device failed\n", __func__); -@@ -425,9 +417,6 @@ static int ds3000_firmware_ondemand(struct dvb_frontend *fe) - dprintk("%s: Firmware upload %s\n", __func__, - ret == 0 ? "complete" : "failed"); - -- /* Ensure firmware is always loaded if required */ -- state->skip_fw_load = 0; -- - return ret; - } - -@@ -1309,9 +1298,6 @@ static struct dvb_frontend_ops ds3000_ops = { - module_param(debug, int, 0644); - MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); - --module_param(force_fw_upload, int, 0644); --MODULE_PARM_DESC(force_fw_upload, "Force firmware upload (default:0)"); -- - MODULE_DESCRIPTION("DVB Frontend module for Montage Technology " - "DS3000/TS2020 hardware"); - MODULE_AUTHOR("Konstantin Dimitrov"); --- -1.7.6.5 - diff --git a/packages/linux/patches/3.7.10/linux-990.04-hda-Fix-broken-workaround-for-HDMI-SPDIF-confli.patch b/packages/linux/patches/3.7.10/linux-990.04-hda-Fix-broken-workaround-for-HDMI-SPDIF-confli.patch deleted file mode 100644 index 4261a2d877..0000000000 --- a/packages/linux/patches/3.7.10/linux-990.04-hda-Fix-broken-workaround-for-HDMI-SPDIF-confli.patch +++ /dev/null @@ -1,139 +0,0 @@ -From ea9b43addc4d90ca5b029f47f85ca152320a1e8d Mon Sep 17 00:00:00 2001 -From: Takashi Iwai -Date: Tue, 12 Feb 2013 17:02:41 +0100 -Subject: [PATCH] ALSA: hda - Fix broken workaround for HDMI/SPDIF conflicts - -The commit [dcda58061: ALSA: hda - Add workaround for conflicting -IEC958 controls] introduced a workaround for cards that have both -SPDIF and HDMI devices for giving device=1 to SPDIF control elements. -It turned out, however, that this workaround doesn't work well - - -- The workaround checks only conflicts in a single codec, but SPDIF - and HDMI are provided by multiple codecs in many cases, and - -- ALSA mixer abstraction doesn't care about the device number in ctl - elements, thus you'll get errors from amixer such as - % amixer scontrols -c 0 - ALSA lib simple_none.c:1551:(simple_add1) helem (MIXER,'IEC958 - Playback Switch',0,1,0) appears twice or more - amixer: Mixer hw:0 load error: Invalid argument - -This patch fixes the previous broken workaround. Instead of changing -the device number of SPDIF ctl elements, shift the element indices of -such controls up to 16. Also, the conflict check is performed over -all codecs found on the bus. - -HDMI devices will be put to dev=0,index=0 as before. Only the -conflicting SPDIF device is moved to a different place. The new place -of SPDIF device is supposed by the updated alsa-lib HDA-Intel.conf, -respectively. - -Reported-by: Stephan Raue -Reported-by: Anssi Hannula -Cc: [v3.8] -Signed-off-by: Takashi Iwai ---- - sound/pci/hda/hda_codec.c | 43 +++++++++++++++++++++---------------------- - sound/pci/hda/hda_codec.h | 3 ++- - 2 files changed, 23 insertions(+), 23 deletions(-) - -diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c -index e80f835..04b5738 100644 ---- a/sound/pci/hda/hda_codec.c -+++ b/sound/pci/hda/hda_codec.c -@@ -2332,11 +2332,12 @@ struct snd_kcontrol *snd_hda_find_mixer_ctl(struct hda_codec *codec, - EXPORT_SYMBOL_HDA(snd_hda_find_mixer_ctl); - - static int find_empty_mixer_ctl_idx(struct hda_codec *codec, const char *name, -- int dev) -+ int start_idx) - { -- int idx; -- for (idx = 0; idx < 16; idx++) { /* 16 ctlrs should be large enough */ -- if (!find_mixer_ctl(codec, name, dev, idx)) -+ int i, idx; -+ /* 16 ctlrs should be large enough */ -+ for (i = 0, idx = start_idx; i < 16; i++, idx++) { -+ if (!find_mixer_ctl(codec, name, 0, idx)) - return idx; - } - return -EBUSY; -@@ -3305,30 +3306,29 @@ int snd_hda_create_dig_out_ctls(struct hda_codec *codec, - int err; - struct snd_kcontrol *kctl; - struct snd_kcontrol_new *dig_mix; -- int idx, dev = 0; -- const int spdif_pcm_dev = 1; -+ int idx = 0; -+ const int spdif_index = 16; - struct hda_spdif_out *spdif; -+ struct hda_bus *bus = codec->bus; - -- if (codec->primary_dig_out_type == HDA_PCM_TYPE_HDMI && -+ if (bus->primary_dig_out_type == HDA_PCM_TYPE_HDMI && - type == HDA_PCM_TYPE_SPDIF) { -- dev = spdif_pcm_dev; -- } else if (codec->primary_dig_out_type == HDA_PCM_TYPE_SPDIF && -+ idx = spdif_index; -+ } else if (bus->primary_dig_out_type == HDA_PCM_TYPE_SPDIF && - type == HDA_PCM_TYPE_HDMI) { -- for (idx = 0; idx < codec->spdif_out.used; idx++) { -- spdif = snd_array_elem(&codec->spdif_out, idx); -- for (dig_mix = dig_mixes; dig_mix->name; dig_mix++) { -- kctl = find_mixer_ctl(codec, dig_mix->name, 0, idx); -- if (!kctl) -- break; -- kctl->id.device = spdif_pcm_dev; -- } -+ /* suppose a single SPDIF device */ -+ for (dig_mix = dig_mixes; dig_mix->name; dig_mix++) { -+ kctl = find_mixer_ctl(codec, dig_mix->name, 0, 0); -+ if (!kctl) -+ break; -+ kctl->id.index = spdif_index; - } -- codec->primary_dig_out_type = HDA_PCM_TYPE_HDMI; -+ bus->primary_dig_out_type = HDA_PCM_TYPE_HDMI; - } -- if (!codec->primary_dig_out_type) -- codec->primary_dig_out_type = type; -+ if (!bus->primary_dig_out_type) -+ bus->primary_dig_out_type = type; - -- idx = find_empty_mixer_ctl_idx(codec, "IEC958 Playback Switch", dev); -+ idx = find_empty_mixer_ctl_idx(codec, "IEC958 Playback Switch", idx); - if (idx < 0) { - printk(KERN_ERR "hda_codec: too many IEC958 outputs\n"); - return -EBUSY; -@@ -3338,7 +3338,6 @@ int snd_hda_create_dig_out_ctls(struct hda_codec *codec, - kctl = snd_ctl_new1(dig_mix, codec); - if (!kctl) - return -ENOMEM; -- kctl->id.device = dev; - kctl->id.index = idx; - kctl->private_value = codec->spdif_out.used - 1; - err = snd_hda_ctl_add(codec, associated_nid, kctl); -diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h -index e8c9442..23ca172 100644 ---- a/sound/pci/hda/hda_codec.h -+++ b/sound/pci/hda/hda_codec.h -@@ -679,6 +679,8 @@ struct hda_bus { - unsigned int response_reset:1; /* controller was reset */ - unsigned int in_reset:1; /* during reset operation */ - unsigned int power_keep_link_on:1; /* don't power off HDA link */ -+ -+ int primary_dig_out_type; /* primary digital out PCM type */ - }; - - /* -@@ -846,7 +848,6 @@ struct hda_codec { - struct mutex hash_mutex; - struct snd_array spdif_out; - unsigned int spdif_in_enable; /* SPDIF input enable? */ -- int primary_dig_out_type; /* primary digital out PCM type */ - const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */ - struct snd_array init_pins; /* initial (BIOS) pin configurations */ - struct snd_array driver_pins; /* pin configs set by codec parser */ --- -1.7.10 - diff --git a/packages/linux/patches/3.7.10/linux-010-perf_crosscompiling.patch b/packages/linux/patches/3.8.4/linux-010-perf_crosscompiling.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-010-perf_crosscompiling.patch rename to packages/linux/patches/3.8.4/linux-010-perf_crosscompiling.patch diff --git a/packages/linux/patches/3.7.10/linux-203-stb0899_enable_low_symbol_rate.patch b/packages/linux/patches/3.8.4/linux-203-stb0899_enable_low_symbol_rate.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-203-stb0899_enable_low_symbol_rate.patch rename to packages/linux/patches/3.8.4/linux-203-stb0899_enable_low_symbol_rate.patch diff --git a/packages/linux/patches/3.7.10/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch b/packages/linux/patches/3.8.4/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch rename to packages/linux/patches/3.8.4/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch diff --git a/packages/linux/patches/3.7.10/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch b/packages/linux/patches/3.8.4/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch rename to packages/linux/patches/3.8.4/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch diff --git a/packages/linux/patches/3.7.10/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch b/packages/linux/patches/3.8.4/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch rename to packages/linux/patches/3.8.4/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch diff --git a/packages/linux/patches/3.7.10/linux-212-mantis_stb0899_faster_lock.patch b/packages/linux/patches/3.8.4/linux-212-mantis_stb0899_faster_lock.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-212-mantis_stb0899_faster_lock.patch rename to packages/linux/patches/3.8.4/linux-212-mantis_stb0899_faster_lock.patch diff --git a/packages/linux/patches/3.7.10/linux-213-cinergy_s2_usb_r2.patch b/packages/linux/patches/3.8.4/linux-213-cinergy_s2_usb_r2.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-213-cinergy_s2_usb_r2.patch rename to packages/linux/patches/3.8.4/linux-213-cinergy_s2_usb_r2.patch diff --git a/packages/linux/patches/3.7.10/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch b/packages/linux/patches/3.8.4/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch rename to packages/linux/patches/3.8.4/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch diff --git a/packages/linux/patches/3.7.10/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch b/packages/linux/patches/3.8.4/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch rename to packages/linux/patches/3.8.4/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch diff --git a/packages/linux/patches/3.7.10/linux-221-ngene-octopus.patch b/packages/linux/patches/3.8.4/linux-221-ngene-octopus.patch similarity index 96% rename from packages/linux/patches/3.7.10/linux-221-ngene-octopus.patch rename to packages/linux/patches/3.8.4/linux-221-ngene-octopus.patch index 7da71241c9..f4cdbbb151 100644 --- a/packages/linux/patches/3.7.10/linux-221-ngene-octopus.patch +++ b/packages/linux/patches/3.8.4/linux-221-ngene-octopus.patch @@ -1,7 +1,47 @@ -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/Kconfig linux-3.7.3.patch/drivers/media/dvb-frontends/Kconfig ---- linux-3.7.3/drivers/media/dvb-frontends/Kconfig 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/Kconfig 2013-01-20 01:04:02.687340217 +0100 -@@ -56,6 +56,24 @@ +From 592b8fbe08cff1b44c656633563b0e5c811545e5 Mon Sep 17 00:00:00 2001 +From: Stefan Saraev +Date: Tue, 26 Mar 2013 12:48:13 +0200 +Subject: [PATCH] dvb: ngene/octopus + +--- + drivers/media/dvb-frontends/Kconfig | 18 + + drivers/media/dvb-frontends/Makefile | 2 + + drivers/media/dvb-frontends/stv0367dd.c | 2269 +++++++++++++++++ + drivers/media/dvb-frontends/stv0367dd.h | 17 + + drivers/media/dvb-frontends/stv0367dd_regs.h | 3431 ++++++++++++++++++++++++++ + drivers/media/dvb-frontends/tda18212dd.c | 906 +++++++ + drivers/media/dvb-frontends/tda18212dd.h | 5 + + drivers/media/pci/ddbridge/Kconfig | 4 + + drivers/media/pci/ddbridge/ddbridge-core.c | 1837 +++++++++++---- + drivers/media/pci/ddbridge/ddbridge-regs.h | 56 +- + drivers/media/pci/ddbridge/ddbridge.h | 97 +- + drivers/media/pci/ngene/Kconfig | 3 + + drivers/media/pci/ngene/Makefile | 3 +- + drivers/media/pci/ngene/ngene-av.c | 348 +++ + drivers/media/pci/ngene/ngene-cards.c | 627 +++++- + drivers/media/pci/ngene/ngene-core.c | 357 +++- + drivers/media/pci/ngene/ngene-dvb.c | 372 +++ + drivers/media/pci/ngene/ngene-eeprom.c | 284 +++ + drivers/media/pci/ngene/ngene-i2c.c | 113 + + drivers/media/pci/ngene/ngene.h | 40 + + drivers/staging/media/cxd2099/Makefile | 6 +- + drivers/staging/media/cxd2099/TODO | 12 - + drivers/staging/media/cxd2099/cxd2099.c | 5 +- + 23 files changed, 10328 insertions(+), 484 deletions(-) + create mode 100644 drivers/media/dvb-frontends/stv0367dd.c + create mode 100644 drivers/media/dvb-frontends/stv0367dd.h + create mode 100644 drivers/media/dvb-frontends/stv0367dd_regs.h + create mode 100644 drivers/media/dvb-frontends/tda18212dd.c + create mode 100644 drivers/media/dvb-frontends/tda18212dd.h + create mode 100644 drivers/media/pci/ngene/ngene-av.c + create mode 100644 drivers/media/pci/ngene/ngene-eeprom.c + delete mode 100644 drivers/staging/media/cxd2099/TODO + +diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig +index 5efec73..e2483f9 100644 +--- a/drivers/media/dvb-frontends/Kconfig ++++ b/drivers/media/dvb-frontends/Kconfig +@@ -56,6 +56,24 @@ config DVB_TDA18271C2DD Say Y when you want to support this tuner. @@ -26,10 +66,11 @@ diff -Naur linux-3.7.3/drivers/media/dvb-frontends/Kconfig linux-3.7.3.patch/dri comment "DVB-S (satellite) frontends" depends on DVB_CORE -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/Makefile linux-3.7.3.patch/drivers/media/dvb-frontends/Makefile ---- linux-3.7.3/drivers/media/dvb-frontends/Makefile 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/Makefile 2013-01-20 01:04:17.874233780 +0100 -@@ -95,6 +95,8 @@ +diff --git a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile +index 7eb73bb..b8820aa 100644 +--- a/drivers/media/dvb-frontends/Makefile ++++ b/drivers/media/dvb-frontends/Makefile +@@ -95,6 +95,8 @@ obj-$(CONFIG_DVB_STV0367) += stv0367.o obj-$(CONFIG_DVB_CXD2820R) += cxd2820r.o obj-$(CONFIG_DVB_DRXK) += drxk.o obj-$(CONFIG_DVB_TDA18271C2DD) += tda18271c2dd.o @@ -38,9 +79,11 @@ diff -Naur linux-3.7.3/drivers/media/dvb-frontends/Makefile linux-3.7.3.patch/dr obj-$(CONFIG_DVB_IT913X_FE) += it913x-fe.o obj-$(CONFIG_DVB_A8293) += a8293.o obj-$(CONFIG_DVB_TDA10071) += tda10071.o -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/stv0367dd.c linux-3.7.3.patch/drivers/media/dvb-frontends/stv0367dd.c ---- linux-3.7.3/drivers/media/dvb-frontends/stv0367dd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/stv0367dd.c 2013-01-20 01:04:17.876233766 +0100 +diff --git a/drivers/media/dvb-frontends/stv0367dd.c b/drivers/media/dvb-frontends/stv0367dd.c +new file mode 100644 +index 0000000..34a38cf +--- /dev/null ++++ b/drivers/media/dvb-frontends/stv0367dd.c @@ -0,0 +1,2269 @@ +/* + * stv0367dd: STV0367 DVB-C/T demodulator driver @@ -2311,9 +2354,11 @@ diff -Naur linux-3.7.3/drivers/media/dvb-frontends/stv0367dd.c linux-3.7.3.patch + + + -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/stv0367dd.h linux-3.7.3.patch/drivers/media/dvb-frontends/stv0367dd.h ---- linux-3.7.3/drivers/media/dvb-frontends/stv0367dd.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/stv0367dd.h 2013-01-20 01:04:17.877233760 +0100 +diff --git a/drivers/media/dvb-frontends/stv0367dd.h b/drivers/media/dvb-frontends/stv0367dd.h +new file mode 100644 +index 0000000..665d4c8 +--- /dev/null ++++ b/drivers/media/dvb-frontends/stv0367dd.h @@ -0,0 +1,17 @@ +#ifndef _STV0367DD_H_ +#define _STV0367DD_H_ @@ -2332,9 +2377,11 @@ diff -Naur linux-3.7.3/drivers/media/dvb-frontends/stv0367dd.h linux-3.7.3.patch + struct stv0367_cfg *cfg, + struct dvb_frontend **fe_t); +#endif -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/stv0367dd_regs.h linux-3.7.3.patch/drivers/media/dvb-frontends/stv0367dd_regs.h ---- linux-3.7.3/drivers/media/dvb-frontends/stv0367dd_regs.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/stv0367dd_regs.h 2013-01-20 01:04:17.880233740 +0100 +diff --git a/drivers/media/dvb-frontends/stv0367dd_regs.h b/drivers/media/dvb-frontends/stv0367dd_regs.h +new file mode 100644 +index 0000000..f33e787 +--- /dev/null ++++ b/drivers/media/dvb-frontends/stv0367dd_regs.h @@ -0,0 +1,3431 @@ +// @DVB-C/DVB-T STMicroelectronics STV0367 register defintions +// Author Manfred Vlkel, Februar 2011 @@ -5767,9 +5814,11 @@ diff -Naur linux-3.7.3/drivers/media/dvb-frontends/stv0367dd_regs.h linux-3.7.3. +#define R367_QAM_T_O_ID_3 0xF4D3 +#define F367_QAM_TS_ID_I_H 0xF4D300FF + -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/tda18212dd.c linux-3.7.3.patch/drivers/media/dvb-frontends/tda18212dd.c ---- linux-3.7.3/drivers/media/dvb-frontends/tda18212dd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/tda18212dd.c 2013-01-20 01:04:17.881233733 +0100 +diff --git a/drivers/media/dvb-frontends/tda18212dd.c b/drivers/media/dvb-frontends/tda18212dd.c +new file mode 100644 +index 0000000..de2350b +--- /dev/null ++++ b/drivers/media/dvb-frontends/tda18212dd.c @@ -0,0 +1,906 @@ +/* + * tda18212: Driver for the TDA18212 tuner @@ -6677,18 +6726,47 @@ diff -Naur linux-3.7.3/drivers/media/dvb-frontends/tda18212dd.c linux-3.7.3.patc + * c-basic-offset: 8 + * End: + */ -diff -Naur linux-3.7.3/drivers/media/dvb-frontends/tda18212dd.h linux-3.7.3.patch/drivers/media/dvb-frontends/tda18212dd.h ---- linux-3.7.3/drivers/media/dvb-frontends/tda18212dd.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/dvb-frontends/tda18212dd.h 2013-01-20 01:04:17.881233733 +0100 +diff --git a/drivers/media/dvb-frontends/tda18212dd.h b/drivers/media/dvb-frontends/tda18212dd.h +new file mode 100644 +index 0000000..687fab4 +--- /dev/null ++++ b/drivers/media/dvb-frontends/tda18212dd.h @@ -0,0 +1,5 @@ +#ifndef _TDA18212DD_H_ +#define _TDA18212DD_H_ +struct dvb_frontend *tda18212dd_attach(struct dvb_frontend *fe, + struct i2c_adapter *i2c, u8 adr); +#endif -diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.patch/drivers/media/pci/ddbridge/ddbridge-core.c ---- linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ddbridge/ddbridge-core.c 2013-01-20 01:27:14.359676005 +0100 +diff --git a/drivers/media/pci/ddbridge/Kconfig b/drivers/media/pci/ddbridge/Kconfig +index 44e5dc1..bd3c922 100644 +--- a/drivers/media/pci/ddbridge/Kconfig ++++ b/drivers/media/pci/ddbridge/Kconfig +@@ -1,11 +1,14 @@ + config DVB_DDBRIDGE + tristate "Digital Devices bridge support" + depends on DVB_CORE && PCI && I2C ++ select DVB_CXD2099 + select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV6110x if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT + select DVB_DRXK if MEDIA_SUBDRV_AUTOSELECT + select DVB_TDA18271C2DD if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_STV0367DD if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_TDA18212DD if MEDIA_SUBDRV_AUTOSELECT + ---help--- + Support for cards with the Digital Devices PCI express bridge: + - Octopus PCIe Bridge +@@ -14,5 +17,6 @@ config DVB_DDBRIDGE + - DuoFlex S2 Octopus + - DuoFlex CT Octopus + - cineS2(v6) ++ - cineCT(v6) + + Say Y if you own such a card and want to use it. +diff --git a/drivers/media/pci/ddbridge/ddbridge-core.c b/drivers/media/pci/ddbridge/ddbridge-core.c +index 36e3452..624a822 100644 +--- a/drivers/media/pci/ddbridge/ddbridge-core.c ++++ b/drivers/media/pci/ddbridge/ddbridge-core.c @@ -31,11 +31,11 @@ #include #include @@ -6764,7 +6842,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val) { struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD, -@@ -58,10 +104,31 @@ +@@ -58,10 +104,31 @@ static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val) return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1; } @@ -6797,7 +6875,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa {.addr = adr, .flags = I2C_M_RD, .buf = val, .len = 1 } }; return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1; -@@ -70,14 +137,22 @@ +@@ -70,14 +137,22 @@ static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val) static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr, u16 reg, u8 *val) { @@ -6822,7 +6900,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd) { struct ddb *dev = i2c->dev; -@@ -85,18 +160,18 @@ +@@ -85,18 +160,18 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd) u32 val; i2c->done = 0; @@ -6845,7 +6923,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (val & 0x70000) return -EIO; return 0; -@@ -105,7 +180,7 @@ +@@ -105,7 +180,7 @@ static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd) static int ddb_i2c_master_xfer(struct i2c_adapter *adapter, struct i2c_msg msg[], int num) { @@ -6854,7 +6932,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa struct ddb *dev = i2c->dev; u8 addr = 0; -@@ -116,8 +191,8 @@ +@@ -116,8 +191,8 @@ static int ddb_i2c_master_xfer(struct i2c_adapter *adapter, !(msg[0].flags & I2C_M_RD)) { memcpy_toio(dev->regs + I2C_TASKMEM_BASE + i2c->wbuf, msg[0].buf, msg[0].len); @@ -6865,7 +6943,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (!ddb_i2c_cmd(i2c, addr, 1)) { memcpy_fromio(msg[1].buf, dev->regs + I2C_TASKMEM_BASE + i2c->rbuf, -@@ -125,17 +200,16 @@ +@@ -125,17 +200,16 @@ static int ddb_i2c_master_xfer(struct i2c_adapter *adapter, return num; } } @@ -6887,7 +6965,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa I2C_TASKMEM_BASE + i2c->rbuf, msg[0].len); return num; } -@@ -160,7 +234,7 @@ +@@ -160,7 +234,7 @@ static void ddb_i2c_release(struct ddb *dev) struct ddb_i2c *i2c; struct i2c_adapter *adap; @@ -6896,7 +6974,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa i2c = &dev->i2c[i]; adap = &i2c->adap; i2c_del_adapter(adap); -@@ -173,15 +247,15 @@ +@@ -173,15 +247,15 @@ static int ddb_i2c_init(struct ddb *dev) struct ddb_i2c *i2c; struct i2c_adapter *adap; @@ -6915,7 +6993,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa i2c->regs + I2C_TASKADDRESS); init_waitqueue_head(&i2c->wq); -@@ -216,69 +290,94 @@ +@@ -216,69 +290,94 @@ static int ddb_i2c_init(struct ddb *dev) /******************************************************************************/ /******************************************************************************/ @@ -7052,7 +7130,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa return -ENOMEM; } return 0; -@@ -293,34 +392,23 @@ +@@ -293,34 +392,23 @@ static int ddb_buffers_alloc(struct ddb *dev) port = &dev->port[i]; switch (port->class) { case DDB_PORT_TUNER: @@ -7093,7 +7171,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa return 0; } -@@ -331,18 +419,11 @@ +@@ -331,18 +419,11 @@ static void ddb_buffers_free(struct ddb *dev) for (i = 0; i < dev->info->port_num; i++) { port = &dev->port[i]; @@ -7117,7 +7195,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } } -@@ -350,90 +431,116 @@ +@@ -350,90 +431,116 @@ static void ddb_input_start(struct ddb_input *input) { struct ddb *dev = input->port->dev; @@ -7132,25 +7210,23 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa - ddbwritel(0, TS_INPUT_CONTROL(input->nr)); - ddbwritel(2, TS_INPUT_CONTROL(input->nr)); - ddbwritel(0, TS_INPUT_CONTROL(input->nr)); -- ++ ddbwritel(dev, 0, TS_INPUT_CONTROL(input->nr)); ++ ddbwritel(dev, 2, TS_INPUT_CONTROL(input->nr)); ++ ddbwritel(dev, 0, TS_INPUT_CONTROL(input->nr)); + - ddbwritel((1 << 16) | - (input->dma_buf_num << 11) | - (input->dma_buf_size >> 7), - DMA_BUFFER_SIZE(input->nr)); - ddbwritel(0, DMA_BUFFER_ACK(input->nr)); -- ++ ddbwritel(dev, input->dma->bufreg, DMA_BUFFER_SIZE(input->dma->nr)); ++ ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma->nr)); + - ddbwritel(1, DMA_BASE_WRITE); - ddbwritel(3, DMA_BUFFER_CONTROL(input->nr)); - ddbwritel(9, TS_INPUT_CONTROL(input->nr)); - input->running = 1; - spin_unlock_irq(&input->lock); -+ ddbwritel(dev, 0, TS_INPUT_CONTROL(input->nr)); -+ ddbwritel(dev, 2, TS_INPUT_CONTROL(input->nr)); -+ ddbwritel(dev, 0, TS_INPUT_CONTROL(input->nr)); -+ -+ ddbwritel(dev, input->dma->bufreg, DMA_BUFFER_SIZE(input->dma->nr)); -+ ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma->nr)); -+ + ddbwritel(dev, 1, DMA_BASE_WRITE); + ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma->nr)); + ddbwritel(dev, 9, TS_INPUT_CONTROL(input->nr)); @@ -7286,7 +7362,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (diff <= 0 || diff > 188) return 188; return 0; -@@ -443,24 +550,24 @@ +@@ -443,24 +550,24 @@ static ssize_t ddb_output_write(struct ddb_output *output, const u8 *buf, size_t count) { struct ddb *dev = output->port->dev; @@ -7317,7 +7393,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa len -= (len % 188); if (len <= 188) -@@ -471,68 +578,146 @@ +@@ -471,68 +578,146 @@ static ssize_t ddb_output_write(struct ddb_output *output, } if (len > left) len = left; @@ -7487,7 +7563,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } return count; } -@@ -554,7 +739,7 @@ +@@ -554,7 +739,7 @@ static struct ddb_input *fe2input(struct ddb *dev, struct dvb_frontend *fe) } #endif @@ -7496,7 +7572,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa { struct ddb_input *input = fe->sec_priv; struct ddb_port *port = input->port; -@@ -562,9 +747,9 @@ +@@ -562,9 +747,9 @@ static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) if (enable) { mutex_lock(&port->i2c_gate_lock); @@ -7508,7 +7584,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa mutex_unlock(&port->i2c_gate_lock); } return status; -@@ -577,18 +762,88 @@ +@@ -577,18 +762,88 @@ static int demod_attach_drxk(struct ddb_input *input) struct drxk_config config; memset(&config, 0, sizeof(config)); @@ -7603,7 +7679,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa return 0; } -@@ -597,18 +852,57 @@ +@@ -597,18 +852,57 @@ static int tuner_attach_tda18271(struct ddb_input *input) struct i2c_adapter *i2c = &input->port->i2c->adap; struct dvb_frontend *fe; @@ -7666,7 +7742,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa /******************************************************************************/ /******************************************************************************/ /******************************************************************************/ -@@ -668,14 +962,14 @@ +@@ -668,14 +962,14 @@ static int demod_attach_stv0900(struct ddb_input *input, int type) struct i2c_adapter *i2c = &input->port->i2c->adap; struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; @@ -7684,7 +7760,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa 0, (input->nr & 1) ? (0x09 - type) : (0x0b - type))) { printk(KERN_ERR "No LNBH24 found!\n"); -@@ -692,7 +986,7 @@ +@@ -692,7 +986,7 @@ static int tuner_attach_stv6110(struct ddb_input *input, int type) &stv6110b : &stv6110a; struct stv6110x_devctl *ctl; @@ -7693,7 +7769,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (!ctl) { printk(KERN_ERR "No STV6110X found!\n"); return -ENODEV; -@@ -760,10 +1054,10 @@ +@@ -760,10 +1054,10 @@ static int start_feed(struct dvb_demux_feed *dvbdmxfeed) struct dvb_demux *dvbdmx = dvbdmxfeed->demux; struct ddb_input *input = dvbdmx->priv; @@ -7706,7 +7782,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) -@@ -771,8 +1065,8 @@ +@@ -771,8 +1065,8 @@ static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) struct dvb_demux *dvbdmx = dvbdmxfeed->demux; struct ddb_input *input = dvbdmx->priv; @@ -7717,7 +7793,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa ddb_input_stop(input); return 0; -@@ -781,116 +1075,200 @@ +@@ -781,116 +1075,200 @@ static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) static void dvb_input_detach(struct ddb_input *input) { @@ -7764,10 +7840,11 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa case 1: - dvb_unregister_adapter(adap); + break; -+ } + } +- input->attached = 0; + input->dvb.attached = 0; -+} -+ + } + +static int dvb_register_adapters(struct ddb *dev) +{ + int i, ret = 0; @@ -7860,10 +7937,9 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + if (input->dvb.adap_registered) + dvb_unregister_adapter(input->dvb.adap); + input->dvb.adap_registered = 0; - } -- input->attached = 0; - } - ++ } ++} ++ + static int dvb_input_attach(struct ddb_input *input) { @@ -7872,9 +7948,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa struct ddb_port *port = input->port; - struct dvb_adapter *adap = &input->adap; - struct dvb_demux *dvbdemux = &input->demux; -+ struct dvb_adapter *adap = input->dvb.adap; -+ struct dvb_demux *dvbdemux = &input->dvb.demux; - +- - ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, - &input->port->dev->pdev->dev, - adapter_nr); @@ -7884,6 +7958,9 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa - return ret; - } - input->attached = 1; ++ struct dvb_adapter *adap = input->dvb.adap; ++ struct dvb_demux *dvbdemux = &input->dvb.demux; ++ + input->dvb.attached = 1; ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux", @@ -7965,7 +8042,8 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + if (input->dvb.fe) { + if (dvb_register_frontend(adap, input->dvb.fe) < 0) + return -ENODEV; -+ } + } +- input->attached = 5; + if (input->dvb.fe2) { + if (dvb_register_frontend(adap, input->dvb.fe2) < 0) + return -ENODEV; @@ -7973,13 +8051,12 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + memcpy(&input->dvb.fe2->ops.tuner_ops, + &input->dvb.fe->ops.tuner_ops, + sizeof(struct dvb_tuner_ops)); - } -- input->attached = 5; ++ } + input->dvb.attached = 6; return 0; } -@@ -910,7 +1288,8 @@ +@@ -910,7 +1288,8 @@ static ssize_t ts_write(struct file *file, const char *buf, if (file->f_flags & O_NONBLOCK) break; if (wait_event_interruptible( @@ -7989,7 +8066,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa break; } stat = ddb_output_write(output, buf, left); -@@ -937,7 +1316,7 @@ +@@ -937,7 +1316,7 @@ static ssize_t ts_read(struct file *file, char *buf, if (file->f_flags & O_NONBLOCK) break; if (wait_event_interruptible( @@ -7998,7 +8075,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa break; } read = ddb_input_read(input, buf, left); -@@ -970,21 +1349,53 @@ +@@ -970,21 +1349,53 @@ static unsigned int ts_poll(struct file *file, poll_table *wait) return mask; } @@ -8012,7 +8089,6 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa - .mmap = 0, -}; - --static struct dvb_device dvbdev_ci = { +#if 0 +static int ts_release(struct inode *inode, struct file *file) +{ @@ -8055,7 +8131,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + .mmap = 0, +}; + -+static struct dvb_device dvbdev_ci = { + static struct dvb_device dvbdev_ci = { .priv = 0, - .readers = -1, - .writers = -1, @@ -8066,7 +8142,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa .fops = &ci_fops, }; -@@ -992,53 +1403,297 @@ +@@ -992,53 +1403,297 @@ static struct dvb_device dvbdev_ci = { /****************************************************************************/ /****************************************************************************/ @@ -8162,10 +8238,6 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa - DMA_BUFFER_ACK(input->nr)); - input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr)); - } -- } -- if (input->port->class == DDB_PORT_CI) -- wake_up(&input->wq); -- spin_unlock(&input->lock); + if (input->redirect) + input_write_output(input, + input->redirect->port->output); @@ -8182,7 +8254,10 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + input->redirect->port->output); + } else + wake_up(&dma->wq); -+ } + } +- if (input->port->class == DDB_PORT_CI) +- wake_up(&input->wq); +- spin_unlock(&input->lock); + spin_unlock(&dma->lock); } @@ -8391,7 +8466,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa struct cxd2099_cfg cxd_cfg = { .bitrate = 62000, -@@ -1049,28 +1704,22 @@ +@@ -1049,28 +1704,22 @@ struct cxd2099_cfg cxd_cfg = { static int ddb_ci_attach(struct ddb_port *port) { @@ -8435,7 +8510,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } static int ddb_port_attach(struct ddb_port *port) -@@ -1086,6 +1735,15 @@ +@@ -1086,6 +1735,15 @@ static int ddb_port_attach(struct ddb_port *port) break; case DDB_PORT_CI: ret = ddb_ci_attach(port); @@ -8451,7 +8526,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa break; default: break; -@@ -1100,6 +1758,10 @@ +@@ -1100,6 +1758,10 @@ static int ddb_ports_attach(struct ddb *dev) int i, ret = 0; struct ddb_port *port; @@ -8462,7 +8537,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa for (i = 0; i < dev->info->port_num; i++) { port = &dev->port[i]; ret = ddb_port_attach(port); -@@ -1122,25 +1784,26 @@ +@@ -1122,25 +1784,26 @@ static void ddb_ports_detach(struct ddb *dev) dvb_input_detach(port->input[1]); break; case DDB_PORT_CI: @@ -8495,7 +8570,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa { u8 val; return i2c_read_reg(&port->i2c->adap, 0x40, 0, &val) ? 0 : 1; -@@ -1172,6 +1835,21 @@ +@@ -1172,6 +1835,21 @@ static int port_has_drxks(struct ddb_port *port) return 1; } @@ -8517,7 +8592,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa static void ddb_port_probe(struct ddb_port *port) { struct ddb *dev = port->dev; -@@ -1179,62 +1857,92 @@ +@@ -1179,62 +1857,92 @@ static void ddb_port_probe(struct ddb_port *port) port->class = DDB_PORT_NONE; @@ -8558,10 +8633,13 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + } else if (port->nr == ts_loop) { + modname = "TS LOOP"; + port->class = DDB_PORT_LOOP; -+ } + } +- printk(KERN_INFO "Port %d (TAB %d): %s\n", +- port->nr, port->nr+1, modname); + printk(KERN_INFO "Port %d (TAB %d): %s\n", port->nr, port->nr+1, modname); -+} -+ + } + +-static void ddb_input_init(struct ddb_port *port, int nr) +static void ddb_dma_init(struct ddb_dma *dma, int nr, void *io) +{ + unsigned long priv = (unsigned long) io; @@ -8580,12 +8658,9 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa + dma->num = INPUT_DMA_BUFS; + dma->size = INPUT_DMA_SIZE; + dma->div = INPUT_DMA_IRQ_DIV; - } -- printk(KERN_INFO "Port %d (TAB %d): %s\n", -- port->nr, port->nr+1, modname); - } - --static void ddb_input_init(struct ddb_port *port, int nr) ++ } ++} ++ +static void ddb_input_init(struct ddb_port *port, int nr, int pnr) { struct ddb *dev = port->dev; @@ -8635,7 +8710,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } static void ddb_ports_init(struct ddb *dev) -@@ -1247,14 +1955,16 @@ +@@ -1247,14 +1955,16 @@ static void ddb_ports_init(struct ddb *dev) port->dev = dev; port->nr = i; port->i2c = &dev->i2c[i]; @@ -8657,7 +8732,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa ddb_output_init(port, i); } } -@@ -1267,9 +1977,12 @@ +@@ -1267,9 +1977,12 @@ static void ddb_ports_release(struct ddb *dev) for (i = 0; i < dev->info->port_num; i++) { port = &dev->port[i]; port->dev = dev; @@ -8673,7 +8748,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } } -@@ -1288,13 +2001,18 @@ +@@ -1288,13 +2001,18 @@ static void irq_handle_i2c(struct ddb *dev, int n) static irqreturn_t irq_handler(int irq, void *dev_id) { struct ddb *dev = (struct ddb *) dev_id; @@ -8694,7 +8769,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (s & 0x00000001) irq_handle_i2c(dev, 0); -@@ -1306,33 +2024,32 @@ +@@ -1306,33 +2024,32 @@ static irqreturn_t irq_handler(int irq, void *dev_id) irq_handle_i2c(dev, 3); if (s & 0x00000100) @@ -8742,7 +8817,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa return IRQ_HANDLED; } -@@ -1346,21 +2063,21 @@ +@@ -1346,21 +2063,21 @@ static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen) u32 data, shift; if (wlen > 4) @@ -8769,7 +8844,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa data = 0; shift = ((4 - wlen) * 8); -@@ -1372,33 +2089,33 @@ +@@ -1372,33 +2089,33 @@ static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen) } if (shift) data <<= shift; @@ -8815,7 +8890,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (rlen < 4) data <<= ((4 - rlen) * 8); -@@ -1421,14 +2138,21 @@ +@@ -1421,14 +2138,21 @@ struct ddb_flashio { __u32 read_len; }; @@ -8839,7 +8914,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa static int ddb_open(struct inode *inode, struct file *file) { -@@ -1470,6 +2194,16 @@ +@@ -1470,6 +2194,16 @@ static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) return -EFAULT; break; } @@ -8856,7 +8931,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa default: return -ENOTTY; } -@@ -1481,41 +2215,249 @@ +@@ -1481,41 +2215,249 @@ static const struct file_operations ddb_fops = { .open = ddb_open, }; @@ -9116,7 +9191,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (IS_ERR(dev->ddb_dev)) return -1; return 0; -@@ -1523,10 +2465,9 @@ +@@ -1523,10 +2465,9 @@ static int ddb_device_create(struct ddb *dev) static void ddb_device_destroy(struct ddb *dev) { @@ -9128,7 +9203,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa } -@@ -1549,7 +2490,7 @@ +@@ -1549,7 +2490,7 @@ static void ddb_remove(struct pci_dev *pdev) ddb_ports_detach(dev); ddb_i2c_release(dev); @@ -9137,15 +9212,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa free_irq(dev->pdev->irq, dev); #ifdef CONFIG_PCI_MSI if (dev->msi) -@@ -1564,7 +2505,6 @@ - pci_disable_device(pdev); - } - -- - static int __devinit ddb_probe(struct pci_dev *pdev, - const struct pci_device_id *id) - { -@@ -1575,10 +2515,9 @@ +@@ -1574,10 +2515,9 @@ static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (pci_enable_device(pdev) < 0) return -ENODEV; @@ -9157,7 +9224,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa dev->pdev = pdev; pci_set_drvdata(pdev, dev); -@@ -1591,7 +2530,8 @@ +@@ -1590,7 +2530,8 @@ static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) stat = -ENOMEM; goto fail; } @@ -9167,7 +9234,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa #ifdef CONFIG_PCI_MSI if (pci_msi_enabled()) -@@ -1607,11 +2547,11 @@ +@@ -1606,11 +2547,11 @@ static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) irq_flag, "DDBridge", (void *) dev); if (stat < 0) goto fail1; @@ -9184,7 +9251,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa if (ddb_i2c_init(dev) < 0) goto fail1; -@@ -1622,7 +2562,13 @@ +@@ -1621,7 +2562,13 @@ static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) } if (ddb_ports_attach(dev) < 0) goto fail3; @@ -9198,7 +9265,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa return 0; fail3: -@@ -1632,11 +2578,14 @@ +@@ -1631,11 +2578,14 @@ fail3: fail2: printk(KERN_ERR "fail2\n"); ddb_buffers_free(dev); @@ -9214,7 +9281,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa fail: printk(KERN_ERR "fail\n"); ddb_unmap(dev); -@@ -1658,23 +2607,71 @@ +@@ -1657,23 +2607,71 @@ static struct ddb_info ddb_octopus = { .type = DDB_OCTOPUS, .name = "Digital Devices Octopus DVB adapter", .port_num = 4, @@ -9287,7 +9354,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa .vendor = _vend, .device = _dev, \ .subvendor = _subvend, .subdevice = _subdev, \ .driver_data = (unsigned long)&_driverdata } -@@ -1683,8 +2680,13 @@ +@@ -1682,8 +2680,13 @@ static const struct pci_device_id ddb_id_tbl[] = { DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus), DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus), DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le), @@ -9302,207 +9369,16 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-core.c linux-3.7.3.pa /* in case sub-ids got deleted in flash */ DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none), {0} -@@ -1696,7 +2698,7 @@ - .name = "DDBridge", - .id_table = ddb_id_tbl, - .probe = ddb_probe, -- .remove = __devexit_p(ddb_remove), -+ .remove = ddb_remove, - }; - - static __init int module_init_ddbridge(void) -@@ -1727,4 +2729,4 @@ +@@ -1726,4 +2729,4 @@ module_exit(module_exit_ddbridge); MODULE_DESCRIPTION("Digital Devices PCIe Bridge"); MODULE_AUTHOR("Ralph Metzler"); MODULE_LICENSE("GPL"); -MODULE_VERSION("0.5"); +MODULE_VERSION("0.8"); -diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge.h linux-3.7.3.patch/drivers/media/pci/ddbridge/ddbridge.h ---- linux-3.7.3/drivers/media/pci/ddbridge/ddbridge.h 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ddbridge/ddbridge.h 2013-01-20 01:02:21.440090976 +0100 -@@ -32,7 +32,10 @@ - #include - #include - #include -+#include -+#include - #include -+#include - - #include "dmxdev.h" - #include "dvbdev.h" -@@ -52,43 +55,53 @@ - int type; - #define DDB_NONE 0 - #define DDB_OCTOPUS 1 -+#define DDB_OCTOPUS_CI 2 - char *name; - int port_num; -- u32 port_type[DDB_MAX_PORT]; -+ int i2c_num; -+ int led_num; -+ int fan_num; -+ int temp_num; - }; - - /* DMA_SIZE MUST be divisible by 188 and 128 !!! */ - --#define INPUT_DMA_MAX_BUFS 32 /* hardware table limit */ -+#define DMA_MAX_BUFS 32 /* hardware table limit */ -+ - #define INPUT_DMA_BUFS 8 - #define INPUT_DMA_SIZE (128*47*21) -+#define INPUT_DMA_IRQ_DIV 1 - --#define OUTPUT_DMA_MAX_BUFS 32 - #define OUTPUT_DMA_BUFS 8 - #define OUTPUT_DMA_SIZE (128*47*21) -+#define OUTPUT_DMA_IRQ_DIV 1 - - struct ddb; - struct ddb_port; - --struct ddb_input { -- struct ddb_port *port; -+struct ddb_dma { -+ void *io; - u32 nr; -- int attached; -- -- dma_addr_t pbuf[INPUT_DMA_MAX_BUFS]; -- u8 *vbuf[INPUT_DMA_MAX_BUFS]; -- u32 dma_buf_num; -- u32 dma_buf_size; -+ dma_addr_t pbuf[DMA_MAX_BUFS]; -+ u8 *vbuf[DMA_MAX_BUFS]; -+ u32 num; -+ u32 size; -+ u32 div; -+ u32 bufreg; - - struct tasklet_struct tasklet; - spinlock_t lock; - wait_queue_head_t wq; - int running; - u32 stat; -+ u32 ctrl; - u32 cbuf; - u32 coff; -+}; - -- struct dvb_adapter adap; -+struct ddb_dvb { -+ struct dvb_adapter *adap; -+ int adap_registered; - struct dvb_device *dev; - struct dvb_frontend *fe; - struct dvb_frontend *fe2; -@@ -99,32 +112,36 @@ - struct dmx_frontend mem_frontend; - int users; - int (*gate_ctrl)(struct dvb_frontend *, int); -+ int attached; - }; - --struct ddb_output { -+struct ddb_ci { -+ struct dvb_ca_en50221 en; - struct ddb_port *port; - u32 nr; -- dma_addr_t pbuf[OUTPUT_DMA_MAX_BUFS]; -- u8 *vbuf[OUTPUT_DMA_MAX_BUFS]; -- u32 dma_buf_num; -- u32 dma_buf_size; -- struct tasklet_struct tasklet; -- spinlock_t lock; -- wait_queue_head_t wq; -- int running; -- u32 stat; -- u32 cbuf; -- u32 coff; -+}; - -- struct dvb_adapter adap; -- struct dvb_device *dev; -+ -+struct ddb_input { -+ struct ddb_port *port; -+ u32 nr; -+ struct ddb_dma *dma; -+ struct ddb_input *redirect; -+ -+ struct ddb_dvb dvb; -+}; -+ -+struct ddb_output { -+ struct ddb_port *port; -+ u32 nr; -+ struct ddb_dma *dma; -+ struct ddb_input *redirect; - }; - - struct ddb_i2c { - struct ddb *dev; - u32 nr; - struct i2c_adapter adap; -- struct i2c_adapter adap2; - u32 regs; - u32 rbuf; - u32 wbuf; -@@ -141,12 +158,15 @@ - #define DDB_PORT_NONE 0 - #define DDB_PORT_CI 1 - #define DDB_PORT_TUNER 2 -+#define DDB_PORT_LOOP 3 - u32 type; - #define DDB_TUNER_NONE 0 - #define DDB_TUNER_DVBS_ST 1 - #define DDB_TUNER_DVBS_ST_AA 2 --#define DDB_TUNER_DVBCT_TR 16 --#define DDB_TUNER_DVBCT_ST 17 -+#define DDB_TUNER_DVBCT_TR 3 -+#define DDB_TUNER_DVBCT_ST 4 -+#define DDB_CI_INTERNAL 5 -+#define DDB_CI_EXTERNAL_SONY 6 - u32 adr; - - struct ddb_input *input[2]; -@@ -161,25 +181,20 @@ - struct ddb_i2c i2c[DDB_MAX_I2C]; - struct ddb_input input[DDB_MAX_INPUT]; - struct ddb_output output[DDB_MAX_OUTPUT]; -+ struct dvb_adapter adap[DDB_MAX_INPUT]; -+ struct ddb_dma dma[DDB_MAX_INPUT + DDB_MAX_OUTPUT]; - - struct device *ddb_dev; -- int nr; -+ u32 nr; - u8 iobuf[1028]; - - struct ddb_info *info; - int msi; --}; -- --/****************************************************************************/ - --#define ddbwritel(_val, _adr) writel((_val), \ -- (char *) (dev->regs+(_adr))) --#define ddbreadl(_adr) readl((char *) (dev->regs+(_adr))) --#define ddbcpyto(_adr, _src, _count) memcpy_toio((char *) \ -- (dev->regs+(_adr)), (_src), (_count)) --#define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), (char *) \ -- (dev->regs+(_adr)), (_count)) -+ u8 leds; - --/****************************************************************************/ -+ u32 ts_irq; -+ u32 i2c_irq; -+}; - - #endif -diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-regs.h linux-3.7.3.patch/drivers/media/pci/ddbridge/ddbridge-regs.h ---- linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-regs.h 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ddbridge/ddbridge-regs.h 2013-01-20 01:02:55.302829622 +0100 +diff --git a/drivers/media/pci/ddbridge/ddbridge-regs.h b/drivers/media/pci/ddbridge/ddbridge-regs.h +index a3ccb31..46e8a21 100644 +--- a/drivers/media/pci/ddbridge/ddbridge-regs.h ++++ b/drivers/media/pci/ddbridge/ddbridge-regs.h @@ -21,11 +21,12 @@ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html */ @@ -9581,34 +9457,194 @@ diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/ddbridge-regs.h linux-3.7.3.pa +#define CI_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE) +#define CI_BLOCKIO_RECEIVE_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE) +#define CI_BLOCKIO_SEND_BUFFER(i) (CI_BUFFER_BASE + (i) * CI_BUFFER_SIZE + CI_BLOCKIO_BUFFER_SIZE) -diff -Naur linux-3.7.3/drivers/media/pci/ddbridge/Kconfig linux-3.7.3.patch/drivers/media/pci/ddbridge/Kconfig ---- linux-3.7.3/drivers/media/pci/ddbridge/Kconfig 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ddbridge/Kconfig 2013-01-20 01:10:50.653800176 +0100 -@@ -1,11 +1,14 @@ - config DVB_DDBRIDGE - tristate "Digital Devices bridge support" - depends on DVB_CORE && PCI && I2C -+ select DVB_CXD2099 - select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV6110x if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT - select DVB_DRXK if MEDIA_SUBDRV_AUTOSELECT - select DVB_TDA18271C2DD if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_STV0367DD if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_TDA18212DD if MEDIA_SUBDRV_AUTOSELECT - ---help--- - Support for cards with the Digital Devices PCI express bridge: - - Octopus PCIe Bridge -@@ -14,5 +17,6 @@ - - DuoFlex S2 Octopus - - DuoFlex CT Octopus - - cineS2(v6) -+ - cineCT(v6) +diff --git a/drivers/media/pci/ddbridge/ddbridge.h b/drivers/media/pci/ddbridge/ddbridge.h +index 8b1b41d..ce2df00 100644 +--- a/drivers/media/pci/ddbridge/ddbridge.h ++++ b/drivers/media/pci/ddbridge/ddbridge.h +@@ -32,7 +32,10 @@ + #include + #include + #include ++#include ++#include + #include ++#include - Say Y if you own such a card and want to use it. -diff -Naur linux-3.7.3/drivers/media/pci/ngene/Kconfig linux-3.7.3.patch/drivers/media/pci/ngene/Kconfig ---- linux-3.7.3/drivers/media/pci/ngene/Kconfig 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/Kconfig 2013-01-20 01:12:11.930340800 +0100 + #include "dmxdev.h" + #include "dvbdev.h" +@@ -52,43 +55,53 @@ struct ddb_info { + int type; + #define DDB_NONE 0 + #define DDB_OCTOPUS 1 ++#define DDB_OCTOPUS_CI 2 + char *name; + int port_num; +- u32 port_type[DDB_MAX_PORT]; ++ int i2c_num; ++ int led_num; ++ int fan_num; ++ int temp_num; + }; + + /* DMA_SIZE MUST be divisible by 188 and 128 !!! */ + +-#define INPUT_DMA_MAX_BUFS 32 /* hardware table limit */ ++#define DMA_MAX_BUFS 32 /* hardware table limit */ ++ + #define INPUT_DMA_BUFS 8 + #define INPUT_DMA_SIZE (128*47*21) ++#define INPUT_DMA_IRQ_DIV 1 + +-#define OUTPUT_DMA_MAX_BUFS 32 + #define OUTPUT_DMA_BUFS 8 + #define OUTPUT_DMA_SIZE (128*47*21) ++#define OUTPUT_DMA_IRQ_DIV 1 + + struct ddb; + struct ddb_port; + +-struct ddb_input { +- struct ddb_port *port; ++struct ddb_dma { ++ void *io; + u32 nr; +- int attached; +- +- dma_addr_t pbuf[INPUT_DMA_MAX_BUFS]; +- u8 *vbuf[INPUT_DMA_MAX_BUFS]; +- u32 dma_buf_num; +- u32 dma_buf_size; ++ dma_addr_t pbuf[DMA_MAX_BUFS]; ++ u8 *vbuf[DMA_MAX_BUFS]; ++ u32 num; ++ u32 size; ++ u32 div; ++ u32 bufreg; + + struct tasklet_struct tasklet; + spinlock_t lock; + wait_queue_head_t wq; + int running; + u32 stat; ++ u32 ctrl; + u32 cbuf; + u32 coff; ++}; + +- struct dvb_adapter adap; ++struct ddb_dvb { ++ struct dvb_adapter *adap; ++ int adap_registered; + struct dvb_device *dev; + struct dvb_frontend *fe; + struct dvb_frontend *fe2; +@@ -99,32 +112,36 @@ struct ddb_input { + struct dmx_frontend mem_frontend; + int users; + int (*gate_ctrl)(struct dvb_frontend *, int); ++ int attached; + }; + +-struct ddb_output { ++struct ddb_ci { ++ struct dvb_ca_en50221 en; + struct ddb_port *port; + u32 nr; +- dma_addr_t pbuf[OUTPUT_DMA_MAX_BUFS]; +- u8 *vbuf[OUTPUT_DMA_MAX_BUFS]; +- u32 dma_buf_num; +- u32 dma_buf_size; +- struct tasklet_struct tasklet; +- spinlock_t lock; +- wait_queue_head_t wq; +- int running; +- u32 stat; +- u32 cbuf; +- u32 coff; ++}; + +- struct dvb_adapter adap; +- struct dvb_device *dev; ++ ++struct ddb_input { ++ struct ddb_port *port; ++ u32 nr; ++ struct ddb_dma *dma; ++ struct ddb_input *redirect; ++ ++ struct ddb_dvb dvb; ++}; ++ ++struct ddb_output { ++ struct ddb_port *port; ++ u32 nr; ++ struct ddb_dma *dma; ++ struct ddb_input *redirect; + }; + + struct ddb_i2c { + struct ddb *dev; + u32 nr; + struct i2c_adapter adap; +- struct i2c_adapter adap2; + u32 regs; + u32 rbuf; + u32 wbuf; +@@ -141,12 +158,15 @@ struct ddb_port { + #define DDB_PORT_NONE 0 + #define DDB_PORT_CI 1 + #define DDB_PORT_TUNER 2 ++#define DDB_PORT_LOOP 3 + u32 type; + #define DDB_TUNER_NONE 0 + #define DDB_TUNER_DVBS_ST 1 + #define DDB_TUNER_DVBS_ST_AA 2 +-#define DDB_TUNER_DVBCT_TR 16 +-#define DDB_TUNER_DVBCT_ST 17 ++#define DDB_TUNER_DVBCT_TR 3 ++#define DDB_TUNER_DVBCT_ST 4 ++#define DDB_CI_INTERNAL 5 ++#define DDB_CI_EXTERNAL_SONY 6 + u32 adr; + + struct ddb_input *input[2]; +@@ -161,25 +181,20 @@ struct ddb { + struct ddb_i2c i2c[DDB_MAX_I2C]; + struct ddb_input input[DDB_MAX_INPUT]; + struct ddb_output output[DDB_MAX_OUTPUT]; ++ struct dvb_adapter adap[DDB_MAX_INPUT]; ++ struct ddb_dma dma[DDB_MAX_INPUT + DDB_MAX_OUTPUT]; + + struct device *ddb_dev; +- int nr; ++ u32 nr; + u8 iobuf[1028]; + + struct ddb_info *info; + int msi; +-}; +- +-/****************************************************************************/ + +-#define ddbwritel(_val, _adr) writel((_val), \ +- (char *) (dev->regs+(_adr))) +-#define ddbreadl(_adr) readl((char *) (dev->regs+(_adr))) +-#define ddbcpyto(_adr, _src, _count) memcpy_toio((char *) \ +- (dev->regs+(_adr)), (_src), (_count)) +-#define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), (char *) \ +- (dev->regs+(_adr)), (_count)) ++ u8 leds; + +-/****************************************************************************/ ++ u32 ts_irq; ++ u32 i2c_irq; ++}; + + #endif +diff --git a/drivers/media/pci/ngene/Kconfig b/drivers/media/pci/ngene/Kconfig +index 637d506..515d04f 100644 +--- a/drivers/media/pci/ngene/Kconfig ++++ b/drivers/media/pci/ngene/Kconfig @@ -1,6 +1,7 @@ config DVB_NGENE tristate "Micronas nGene support" @@ -9617,7 +9653,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/Kconfig linux-3.7.3.patch/drivers select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT select DVB_STV6110x if MEDIA_SUBDRV_AUTOSELECT select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT -@@ -8,6 +9,8 @@ +@@ -8,6 +9,8 @@ config DVB_NGENE select DVB_DRXK if MEDIA_SUBDRV_AUTOSELECT select DVB_TDA18271C2DD if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_MT2131 if MEDIA_SUBDRV_AUTOSELECT @@ -9626,9 +9662,10 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/Kconfig linux-3.7.3.patch/drivers ---help--- Support for Micronas PCI express cards with nGene bridge. -diff -Naur linux-3.7.3/drivers/media/pci/ngene/Makefile linux-3.7.3.patch/drivers/media/pci/ngene/Makefile ---- linux-3.7.3/drivers/media/pci/ngene/Makefile 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/Makefile 2013-01-20 01:05:04.979910075 +0100 +diff --git a/drivers/media/pci/ngene/Makefile b/drivers/media/pci/ngene/Makefile +index 5c0b5d6..42c036a 100644 +--- a/drivers/media/pci/ngene/Makefile ++++ b/drivers/media/pci/ngene/Makefile @@ -2,7 +2,8 @@ # Makefile for the nGene device driver # @@ -9639,9 +9676,11 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/Makefile linux-3.7.3.patch/driver obj-$(CONFIG_DVB_NGENE) += ngene.o -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-av.c linux-3.7.3.patch/drivers/media/pci/ngene/ngene-av.c ---- linux-3.7.3/drivers/media/pci/ngene/ngene-av.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene-av.c 2013-01-20 01:05:04.980910068 +0100 +diff --git a/drivers/media/pci/ngene/ngene-av.c b/drivers/media/pci/ngene/ngene-av.c +new file mode 100644 +index 0000000..a86459e +--- /dev/null ++++ b/drivers/media/pci/ngene/ngene-av.c @@ -0,0 +1,348 @@ +/* + * ngene-av.c: nGene PCIe bridge driver - DVB video/audio support @@ -9991,9 +10030,10 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-av.c linux-3.7.3.patch/driv + .fops = &video_fops, +}; +#endif -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/drivers/media/pci/ngene/ngene-cards.c ---- linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene-cards.c 2013-01-20 01:15:24.833266247 +0100 +diff --git a/drivers/media/pci/ngene/ngene-cards.c b/drivers/media/pci/ngene/ngene-cards.c +index fad2141..56635e7 100644 +--- a/drivers/media/pci/ngene/ngene-cards.c ++++ b/drivers/media/pci/ngene/ngene-cards.c @@ -44,6 +44,8 @@ #include "drxk.h" #include "drxd.h" @@ -10003,7 +10043,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d /****************************************************************************/ -@@ -86,8 +88,98 @@ +@@ -86,8 +88,98 @@ static int tuner_attach_stv6110(struct ngene_channel *chan) return 0; } @@ -10074,7 +10114,8 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d + &chan->i2c_adapter, &chan->dev->pci_dev->dev); + return (chan->fe) ? 0 : -ENODEV; +} -+ + +-static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) +static int demod_attach_stb0899(struct ngene_channel *chan) +{ + void *feconf = chan->dev->card_info->fe_config[chan->number]; @@ -10097,13 +10138,12 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d + return (chan->fe) ? 0 : -ENODEV; +} +#endif - --static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) ++ +static int locked_gate_ctrl(struct dvb_frontend *fe, int enable) { struct ngene_channel *chan = fe->sec_priv; int status; -@@ -121,12 +213,29 @@ +@@ -121,12 +213,29 @@ static int tuner_attach_tda18271(struct ngene_channel *chan) return 0; } @@ -10133,7 +10173,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d return -EINVAL; } -@@ -218,18 +327,51 @@ +@@ -218,18 +327,51 @@ static int demod_attach_drxk(struct ngene_channel *chan, struct drxk_config config; memset(&config, 0, sizeof(config)); @@ -10188,7 +10228,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d return 0; } -@@ -279,6 +421,9 @@ +@@ -279,6 +421,9 @@ static int cineS2_probe(struct ngene_channel *chan) } else if (port_has_drxk(i2c, chan->number^2)) { chan->demod_type = 1; demod_attach_drxk(chan, i2c); @@ -10198,7 +10238,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d } else { printk(KERN_ERR "No demod found on chan %d\n", chan->number); return -ENODEV; -@@ -548,6 +693,136 @@ +@@ -550,6 +695,136 @@ static s16 osc_deviation(void *priv, s16 deviation, int flag) /* Switch control (I2C gates, etc.) *****************************************/ /****************************************************************************/ @@ -10335,7 +10375,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d static struct stv090x_config fe_cineS2 = { .device = STV0900, -@@ -728,6 +1003,323 @@ +@@ -730,6 +1005,323 @@ static struct ngene_info ngene_info_terratec = { /****************************************************************************/ @@ -10659,16 +10699,16 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d /****************************************************************************/ -@@ -742,6 +1334,8 @@ +@@ -744,6 +1336,8 @@ static struct ngene_info ngene_info_terratec = { /****************************************************************************/ - static const struct pci_device_id ngene_id_tbl[] __devinitdata = { + static const struct pci_device_id ngene_id_tbl[] = { + NGENE_ID(0x18c3, 0xab04, ngene_info_cineS2), + NGENE_ID(0x18c3, 0xab05, ngene_info_cineS2v5), NGENE_ID(0x18c3, 0xabc3, ngene_info_cineS2), NGENE_ID(0x18c3, 0xabc4, ngene_info_cineS2), NGENE_ID(0x18c3, 0xdb01, ngene_info_satixS2), -@@ -751,6 +1345,31 @@ +@@ -753,6 +1347,31 @@ static const struct pci_device_id ngene_id_tbl[] = { NGENE_ID(0x18c3, 0xdd20, ngene_info_duoFlex), NGENE_ID(0x1461, 0x062e, ngene_info_m780), NGENE_ID(0x153b, 0x1167, ngene_info_terratec), @@ -10700,10 +10740,11 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-cards.c linux-3.7.3.patch/d {0} }; MODULE_DEVICE_TABLE(pci, ngene_id_tbl); -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/drivers/media/pci/ngene/ngene-core.c ---- linux-3.7.3/drivers/media/pci/ngene/ngene-core.c 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene-core.c 2013-01-20 01:05:31.105738963 +0100 -@@ -86,6 +86,14 @@ +diff --git a/drivers/media/pci/ngene/ngene-core.c b/drivers/media/pci/ngene/ngene-core.c +index 37ebc42..34411f1 100644 +--- a/drivers/media/pci/ngene/ngene-core.c ++++ b/drivers/media/pci/ngene/ngene-core.c +@@ -86,6 +86,14 @@ static void event_tasklet(unsigned long data) if ((Event.UARTStatus & 0x02) && (dev->RxEventNotify)) dev->RxEventNotify(dev, Event.TimeStamp, Event.RXCharacter); @@ -10718,7 +10759,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr } } -@@ -214,6 +222,13 @@ +@@ -214,6 +222,13 @@ static irqreturn_t irq_handler(int irq, void *dev_id) u8 nextWriteIndex = (dev->EventQueueWriteIndex + 1) & (EVENT_QUEUE_SIZE - 1); @@ -10732,7 +10773,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr if (nextWriteIndex != dev->EventQueueReadIndex) { dev->EventQueue[dev->EventQueueWriteIndex] = *(dev->EventBuffer); -@@ -316,12 +331,24 @@ +@@ -316,12 +331,24 @@ static int ngene_command_mutex(struct ngene *dev, struct ngene_command *com) ngwritel(1, FORCE_INT); ret = wait_event_timeout(dev->cmd_wq, dev->cmd_done == 1, 2 * HZ); @@ -10757,7 +10798,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr dump_command_io(dev); return -1; } -@@ -348,6 +375,19 @@ +@@ -348,6 +375,19 @@ int ngene_command(struct ngene *dev, struct ngene_command *com) return result; } @@ -10777,7 +10818,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr static int ngene_command_load_firmware(struct ngene *dev, u8 *ngene_fw, u32 size) -@@ -382,6 +422,83 @@ +@@ -382,6 +422,83 @@ static int ngene_command_load_firmware(struct ngene *dev, return ngene_command(dev, &com); } @@ -10861,7 +10902,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr static int ngene_command_config_buf(struct ngene *dev, u8 config) { -@@ -427,6 +544,18 @@ +@@ -427,6 +544,18 @@ int ngene_command_gpio_set(struct ngene *dev, u8 select, u8 level) return ngene_command(dev, &com); } @@ -10880,7 +10921,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr /* 02000640 is sample on rising edge. -@@ -512,6 +641,17 @@ +@@ -512,6 +641,17 @@ void FillTSBuffer(void *Buffer, int Length, u32 Flags) } } @@ -10898,7 +10939,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr static void flush_buffers(struct ngene_channel *chan) { -@@ -732,6 +872,14 @@ +@@ -732,6 +872,14 @@ void set_transfer(struct ngene_channel *chan, int state) if (dev->card_info->switch_ctrl) dev->card_info->switch_ctrl(chan, 1, state ^ 1); @@ -10913,7 +10954,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr if (state) { spin_lock_irq(&chan->state_lock); -@@ -771,6 +919,89 @@ +@@ -771,6 +919,89 @@ void set_transfer(struct ngene_channel *chan, int state) } } @@ -11003,7 +11044,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr /****************************************************************************/ /* nGene hardware init and release functions ********************************/ -@@ -1065,6 +1296,85 @@ +@@ -1065,6 +1296,85 @@ static u32 Buffer2Sizes[MAX_STREAM] = { 0 }; @@ -11089,7 +11130,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr static int AllocCommonBuffers(struct ngene *dev) { -@@ -1318,6 +1628,10 @@ +@@ -1318,6 +1628,10 @@ static int ngene_buffer_config(struct ngene *dev) u8 tsin12_config[6] = { 0x60, 0x60, 0x00, 0x00, 0x00, 0x00 }; u8 tsin1234_config[6] = { 0x30, 0x30, 0x00, 0x30, 0x30, 0x00 }; u8 tsio1235_config[6] = { 0x30, 0x30, 0x00, 0x28, 0x00, 0x38 }; @@ -11100,7 +11141,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr u8 *bconf = tsin12_config; if (dev->card_info->io_type[2]&NGENE_IO_TSIN && -@@ -1327,10 +1641,22 @@ +@@ -1327,10 +1641,22 @@ static int ngene_buffer_config(struct ngene *dev) dev->ci.en) bconf = tsio1235_config; } @@ -11123,7 +11164,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr if (dev->card_info->io_type[3] == NGENE_IO_TSIN) bconf = BUFFER_CONFIG_3333; stat = ngene_command_config_buf(dev, bconf); -@@ -1403,8 +1729,10 @@ +@@ -1403,8 +1729,10 @@ static int ngene_start(struct ngene *dev) if (stat < 0) goto fail; @@ -11135,7 +11176,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr fail: ngwritel(0, NGENE_INT_ENABLE); free_irq(dev->pci_dev->irq, dev); -@@ -1689,6 +2017,33 @@ +@@ -1688,6 +2016,33 @@ int ngene_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) dev->i2c_current_bus = -1; @@ -11168,10 +11209,11 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-core.c linux-3.7.3.patch/dr +#endif /* Register DVB adapters and devices for both channels */ - if (init_channels(dev) < 0) -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-dvb.c linux-3.7.3.patch/drivers/media/pci/ngene/ngene-dvb.c ---- linux-3.7.3/drivers/media/pci/ngene/ngene-dvb.c 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene-dvb.c 2013-01-20 01:05:46.293640625 +0100 + stat = init_channels(dev); +diff --git a/drivers/media/pci/ngene/ngene-dvb.c b/drivers/media/pci/ngene/ngene-dvb.c +index fcb16a6..8049e2b 100644 +--- a/drivers/media/pci/ngene/ngene-dvb.c ++++ b/drivers/media/pci/ngene/ngene-dvb.c @@ -42,10 +42,319 @@ #include "ngene.h" @@ -11492,7 +11534,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-dvb.c linux-3.7.3.patch/dri static ssize_t ts_write(struct file *file, const char *buf, size_t count, loff_t *ppos) -@@ -133,6 +442,11 @@ +@@ -133,6 +442,11 @@ void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) struct ngene_channel *chan = priv; struct ngene *dev = chan->dev; @@ -11504,7 +11546,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-dvb.c linux-3.7.3.patch/dri if (flags & DF_SWAP32) swap_buffer(buf, len); -@@ -191,12 +505,49 @@ +@@ -191,12 +505,49 @@ void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) return buf; } @@ -11554,7 +11596,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-dvb.c linux-3.7.3.patch/dri if (chan->users == 0) { if (!chan->dev->cmd_timeout_workaround || !chan->running) -@@ -210,6 +561,27 @@ +@@ -210,6 +561,27 @@ int ngene_stop_feed(struct dvb_demux_feed *dvbdmxfeed) { struct dvb_demux *dvbdmx = dvbdmxfeed->demux; struct ngene_channel *chan = dvbdmx->priv; @@ -11582,9 +11624,11 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-dvb.c linux-3.7.3.patch/dri if (--chan->users) return chan->users; -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-eeprom.c linux-3.7.3.patch/drivers/media/pci/ngene/ngene-eeprom.c ---- linux-3.7.3/drivers/media/pci/ngene/ngene-eeprom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene-eeprom.c 2013-01-20 01:05:46.293640625 +0100 +diff --git a/drivers/media/pci/ngene/ngene-eeprom.c b/drivers/media/pci/ngene/ngene-eeprom.c +new file mode 100644 +index 0000000..281d9f9 +--- /dev/null ++++ b/drivers/media/pci/ngene/ngene-eeprom.c @@ -0,0 +1,284 @@ +/* + * ngene-eeprom.c: nGene PCIe bridge driver - eeprom support @@ -11870,88 +11914,11 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-eeprom.c linux-3.7.3.patch/ +} + +#endif -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene.h linux-3.7.3.patch/drivers/media/pci/ngene/ngene.h ---- linux-3.7.3/drivers/media/pci/ngene/ngene.h 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene.h 2013-01-20 01:05:59.311556814 +0100 -@@ -653,6 +653,11 @@ - struct dmx_frontend mem_frontend; - int users; - struct video_device *v4l_dev; -+#if 0 -+ struct dvb_device *command_dev; -+ struct dvb_device *audio_dev; -+ struct dvb_device *video_dev; -+#endif - struct dvb_device *ci_dev; - struct tasklet_struct demux_tasklet; - -@@ -691,6 +696,9 @@ - struct mychip *mychip; - struct snd_card *soundcard; - u8 *evenbuffer; -+#if 0 -+ u8 *soundbuffer; -+#endif - u8 dma_on; - int soundstreamon; - int audiomute; -@@ -849,6 +857,10 @@ - u8 lnb[4]; - int i2c_access; - u8 ntsc; -+#if 0 -+ u8 exp; -+ u8 exp_init; -+#endif - u8 tsf[4]; - u8 i2s[4]; - -@@ -885,6 +897,25 @@ - }; - #endif - -+#if 0 -+int ngene_command_stream_control(struct ngene *dev, -+ u8 stream, u8 control, u8 mode, u8 flags); -+int ngene_command_nop(struct ngene *dev); -+int ngene_command_i2c_read(struct ngene *dev, u8 adr, -+ u8 *out, u8 outlen, u8 *in, u8 inlen, int flag); -+int ngene_command_i2c_write(struct ngene *dev, u8 adr, u8 *out, u8 outlen); -+int ngene_command_imem_read(struct ngene *dev, u8 adr, u8 *data, int type); -+int ngene_command_imem_write(struct ngene *dev, u8 adr, u8 data, int type); -+int ngene_stream_control(struct ngene *dev, u8 stream, u8 control, u8 mode, -+ u16 lines, u16 bpl, u16 vblines, u16 vbibpl); -+ -+int ngene_v4l2_init(struct ngene_channel *chan); -+void ngene_v4l2_remove(struct ngene_channel *chan); -+int ngene_snd_exit(struct ngene_channel *chan); -+int ngene_snd_init(struct ngene_channel *chan); -+ -+struct i2c_client *avf4910a_attach(struct i2c_adapter *adap, int addr); -+#endif - - /* Provided by ngene-core.c */ - int __devinit ngene_probe(struct pci_dev *pci_dev, -@@ -915,6 +946,15 @@ - struct dmx_frontend *mem_frontend, - struct dvb_adapter *dvb_adapter); - -+/* Provided by ngene-eeprom.c */ -+#if 0 -+int i2c_copy_eeprom(struct i2c_adapter *adapter, u8 adr, u8 adr2); -+int i2c_dump_eeprom(struct i2c_adapter *adapter, u8 adr); -+int i2c_check_eeprom(struct i2c_adapter *adapter); -+int eeprom_write_ushort(struct i2c_adapter *adapter, u16 tag, u16 data); -+int eeprom_read_ushort(struct i2c_adapter *adapter, u16 tag, u16 *data); -+#endif -+ - #endif - - /* LocalWords: Endif -diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-i2c.c linux-3.7.3.patch/drivers/media/pci/ngene/ngene-i2c.c ---- linux-3.7.3/drivers/media/pci/ngene/ngene-i2c.c 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/media/pci/ngene/ngene-i2c.c 2013-01-20 01:06:08.210499977 +0100 -@@ -77,6 +77,11 @@ +diff --git a/drivers/media/pci/ngene/ngene-i2c.c b/drivers/media/pci/ngene/ngene-i2c.c +index d28554f..601bea4 100644 +--- a/drivers/media/pci/ngene/ngene-i2c.c ++++ b/drivers/media/pci/ngene/ngene-i2c.c +@@ -77,6 +77,11 @@ static int ngene_command_i2c_write(struct ngene *dev, u8 adr, { struct ngene_command com; @@ -11963,7 +11930,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-i2c.c linux-3.7.3.patch/dri com.cmd.hdr.Opcode = CMD_I2C_WRITE; com.cmd.hdr.Length = outlen + 1; -@@ -148,6 +153,39 @@ +@@ -148,6 +153,39 @@ done: return num; } @@ -12003,7 +11970,7 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-i2c.c linux-3.7.3.patch/dri static u32 ngene_i2c_functionality(struct i2c_adapter *adap) { -@@ -174,3 +212,78 @@ +@@ -174,3 +212,78 @@ int ngene_i2c_init(struct ngene *dev, int dev_nr) return i2c_add_adapter(adap); } @@ -12082,25 +12049,89 @@ diff -Naur linux-3.7.3/drivers/media/pci/ngene/ngene-i2c.c linux-3.7.3.patch/dri +} + +#endif -diff -Naur linux-3.7.3/drivers/staging/media/cxd2099/cxd2099.c linux-3.7.3.patch/drivers/staging/media/cxd2099/cxd2099.c ---- linux-3.7.3/drivers/staging/media/cxd2099/cxd2099.c 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/staging/media/cxd2099/cxd2099.c 2013-01-20 01:06:08.210499977 +0100 -@@ -117,9 +117,10 @@ +diff --git a/drivers/media/pci/ngene/ngene.h b/drivers/media/pci/ngene/ngene.h +index 22c39ff..e3ae00c 100644 +--- a/drivers/media/pci/ngene/ngene.h ++++ b/drivers/media/pci/ngene/ngene.h +@@ -653,6 +653,11 @@ struct ngene_channel { + struct dmx_frontend mem_frontend; + int users; + struct video_device *v4l_dev; ++#if 0 ++ struct dvb_device *command_dev; ++ struct dvb_device *audio_dev; ++ struct dvb_device *video_dev; ++#endif + struct dvb_device *ci_dev; + struct tasklet_struct demux_tasklet; - static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n) - { -- int status; -+ int status = 0; +@@ -691,6 +696,9 @@ struct ngene_channel { + struct mychip *mychip; + struct snd_card *soundcard; + u8 *evenbuffer; ++#if 0 ++ u8 *soundbuffer; ++#endif + u8 dma_on; + int soundstreamon; + int audiomute; +@@ -849,6 +857,10 @@ struct ngene_info { + u8 lnb[4]; + int i2c_access; + u8 ntsc; ++#if 0 ++ u8 exp; ++ u8 exp_init; ++#endif + u8 tsf[4]; + u8 i2s[4]; -- status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); -+ if (ci->lastaddress != adr) -+ status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); - if (!status) { - ci->lastaddress = adr; - status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n); -diff -Naur linux-3.7.3/drivers/staging/media/cxd2099/Makefile linux-3.7.3.patch/drivers/staging/media/cxd2099/Makefile ---- linux-3.7.3/drivers/staging/media/cxd2099/Makefile 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/staging/media/cxd2099/Makefile 2013-01-20 01:08:53.879482088 +0100 +@@ -885,6 +897,25 @@ struct ngene_buffer { + }; + #endif + ++#if 0 ++int ngene_command_stream_control(struct ngene *dev, ++ u8 stream, u8 control, u8 mode, u8 flags); ++int ngene_command_nop(struct ngene *dev); ++int ngene_command_i2c_read(struct ngene *dev, u8 adr, ++ u8 *out, u8 outlen, u8 *in, u8 inlen, int flag); ++int ngene_command_i2c_write(struct ngene *dev, u8 adr, u8 *out, u8 outlen); ++int ngene_command_imem_read(struct ngene *dev, u8 adr, u8 *data, int type); ++int ngene_command_imem_write(struct ngene *dev, u8 adr, u8 data, int type); ++int ngene_stream_control(struct ngene *dev, u8 stream, u8 control, u8 mode, ++ u16 lines, u16 bpl, u16 vblines, u16 vbibpl); ++ ++int ngene_v4l2_init(struct ngene_channel *chan); ++void ngene_v4l2_remove(struct ngene_channel *chan); ++int ngene_snd_exit(struct ngene_channel *chan); ++int ngene_snd_init(struct ngene_channel *chan); ++ ++struct i2c_client *avf4910a_attach(struct i2c_adapter *adap, int addr); ++#endif + + /* Provided by ngene-core.c */ + int ngene_probe(struct pci_dev *pci_dev, const struct pci_device_id *id); +@@ -914,6 +945,15 @@ int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev, + struct dmx_frontend *mem_frontend, + struct dvb_adapter *dvb_adapter); + ++/* Provided by ngene-eeprom.c */ ++#if 0 ++int i2c_copy_eeprom(struct i2c_adapter *adapter, u8 adr, u8 adr2); ++int i2c_dump_eeprom(struct i2c_adapter *adapter, u8 adr); ++int i2c_check_eeprom(struct i2c_adapter *adapter); ++int eeprom_write_ushort(struct i2c_adapter *adapter, u16 tag, u16 data); ++int eeprom_read_ushort(struct i2c_adapter *adapter, u16 tag, u16 *data); ++#endif ++ + #endif + + /* LocalWords: Endif +diff --git a/drivers/staging/media/cxd2099/Makefile b/drivers/staging/media/cxd2099/Makefile +index b2905e6..e509dd7 100644 +--- a/drivers/staging/media/cxd2099/Makefile ++++ b/drivers/staging/media/cxd2099/Makefile @@ -1,5 +1,5 @@ obj-$(CONFIG_DVB_CXD2099) += cxd2099.o @@ -12110,9 +12141,11 @@ diff -Naur linux-3.7.3/drivers/staging/media/cxd2099/Makefile linux-3.7.3.patch/ +EXTRA_CFLAGS += -Idrivers/media/dvb-core/ +EXTRA_CFLAGS += -Idrivers/media/dvb-frontends/ +EXTRA_CFLAGS += -Idrivers/media/tuners/ -diff -Naur linux-3.7.3/drivers/staging/media/cxd2099/TODO linux-3.7.3.patch/drivers/staging/media/cxd2099/TODO ---- linux-3.7.3/drivers/staging/media/cxd2099/TODO 2013-01-17 17:47:40.000000000 +0100 -+++ linux-3.7.3.patch/drivers/staging/media/cxd2099/TODO 1970-01-01 01:00:00.000000000 +0100 +diff --git a/drivers/staging/media/cxd2099/TODO b/drivers/staging/media/cxd2099/TODO +deleted file mode 100644 +index 375bb6f..0000000 +--- a/drivers/staging/media/cxd2099/TODO ++++ /dev/null @@ -1,12 +0,0 @@ -For now, data is passed through '/dev/dvb/adapterX/sec0': - - Encrypted data must be written to 'sec0'. @@ -12126,3 +12159,23 @@ diff -Naur linux-3.7.3/drivers/staging/media/cxd2099/TODO linux-3.7.3.patch/driv -While there's no proper fix for it, the driver should be kept in staging. - -Patches should be submitted to: linux-media@vger.kernel.org. +diff --git a/drivers/staging/media/cxd2099/cxd2099.c b/drivers/staging/media/cxd2099/cxd2099.c +index 0ff1972..ce49e2d 100644 +--- a/drivers/staging/media/cxd2099/cxd2099.c ++++ b/drivers/staging/media/cxd2099/cxd2099.c +@@ -117,9 +117,10 @@ static int i2c_read(struct i2c_adapter *adapter, u8 adr, + + static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n) + { +- int status; ++ int status = 0; + +- status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); ++ if (ci->lastaddress != adr) ++ status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); + if (!status) { + ci->lastaddress = adr; + status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n); +-- +1.7.2.5 + diff --git a/packages/linux/patches/3.7.10/linux-222-stb0899_signal_quality.patch b/packages/linux/patches/3.8.4/linux-222-stb0899_signal_quality.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-222-stb0899_signal_quality.patch rename to packages/linux/patches/3.8.4/linux-222-stb0899_signal_quality.patch diff --git a/packages/linux/patches/3.7.10/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch b/packages/linux/patches/3.8.4/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch rename to packages/linux/patches/3.8.4/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch diff --git a/packages/linux/patches/3.7.10/linux-700-jmicron_1_0_8_5.patch b/packages/linux/patches/3.8.4/linux-700-jmicron_1_0_8_5.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-700-jmicron_1_0_8_5.patch rename to packages/linux/patches/3.8.4/linux-700-jmicron_1_0_8_5.patch diff --git a/packages/linux/patches/3.7.10/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch b/packages/linux/patches/3.8.4/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch rename to packages/linux/patches/3.8.4/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch From 65c0bec129a92041cd2e997436e8f2afa8316e16 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 26 Mar 2013 20:02:30 +0100 Subject: [PATCH 077/104] xf86-video-fglrx-legacy: add patch to build with kernel-3.8 Signed-off-by: Stephan Raue --- .../xf86-video-fglrx-12.10-kernel-3.8.patch | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 packages/x11/driver/xf86-video-fglrx-legacy/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch diff --git a/packages/x11/driver/xf86-video-fglrx-legacy/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch b/packages/x11/driver/xf86-video-fglrx-legacy/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch new file mode 100644 index 0000000000..ad2f3f18cf --- /dev/null +++ b/packages/x11/driver/xf86-video-fglrx-legacy/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch @@ -0,0 +1,13 @@ +--- 12.11/common/lib/modules/fglrx/build_mod/kcl_acpi.c 2012-10-23 22:44:52.000000000 +0200 ++++ 12.11/common/lib/modules/fglrx/build_mod/kcl_acpi.c 2012-12-22 22:11:30.289750331 +0100 +@@ -775,7 +775,9 @@ + unsigned int ATI_API_CALL KCL_ACPI_GetHandles(kcl_match_info_t *pInfo) + { + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12) +- #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19) ++ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0) ++ pInfo->video_handle = pInfo->pcidev->dev.acpi_node.handle; ++ #elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19) + pInfo->video_handle = pInfo->pcidev->dev.archdata.acpi_handle; + #else + pInfo->video_handle = pInfo->pcidev->dev.firmware_data; From 22899c4b5be4a408020cedac4c629599ded9a737 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 26 Mar 2013 20:02:40 +0100 Subject: [PATCH 078/104] xf86-video-fglrx: add patch to build with kernel-3.8 Signed-off-by: Stephan Raue --- .../xf86-video-fglrx-12.10-kernel-3.8.patch | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 packages/x11/driver/xf86-video-fglrx/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch diff --git a/packages/x11/driver/xf86-video-fglrx/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch b/packages/x11/driver/xf86-video-fglrx/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch new file mode 100644 index 0000000000..ad2f3f18cf --- /dev/null +++ b/packages/x11/driver/xf86-video-fglrx/patches.upstream/xf86-video-fglrx-12.10-kernel-3.8.patch @@ -0,0 +1,13 @@ +--- 12.11/common/lib/modules/fglrx/build_mod/kcl_acpi.c 2012-10-23 22:44:52.000000000 +0200 ++++ 12.11/common/lib/modules/fglrx/build_mod/kcl_acpi.c 2012-12-22 22:11:30.289750331 +0100 +@@ -775,7 +775,9 @@ + unsigned int ATI_API_CALL KCL_ACPI_GetHandles(kcl_match_info_t *pInfo) + { + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12) +- #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19) ++ #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0) ++ pInfo->video_handle = pInfo->pcidev->dev.acpi_node.handle; ++ #elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19) + pInfo->video_handle = pInfo->pcidev->dev.archdata.acpi_handle; + #else + pInfo->video_handle = pInfo->pcidev->dev.firmware_data; From f0fb9a87bccfbe9a8c3666210271ef2080acdec9 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 21:10:21 +0200 Subject: [PATCH 079/104] ups. forgot configs for 3.8.4 kernel --- projects/ARCTIC_MC/linux/linux.x86_64.conf | 98 ++++++++++++----- projects/ATV/linux/linux.i386.conf | 98 ++++++++++++----- projects/Fusion/linux/linux.i386.conf | 116 ++++++++++++++------ projects/Fusion/linux/linux.x86_64.conf | 113 ++++++++++++++----- projects/Generic/linux/linux.i386.conf | 120 +++++++++++++++------ projects/Generic_OSS/linux/linux.i386.conf | 120 +++++++++++++++------ projects/ION/linux/linux.i386.conf | 105 +++++++++++++----- projects/ION/linux/linux.x86_64.conf | 102 +++++++++++++----- projects/Intel/linux/linux.i386.conf | 116 +++++++++++++++----- projects/Intel/linux/linux.x86_64.conf | 113 ++++++++++++++----- projects/Ultra/linux/linux.x86_64.conf | 98 +++++++++++++---- projects/Virtual/linux/linux.i386.conf | 116 +++++++++++++++----- projects/Virtual/linux/linux.x86_64.conf | 113 ++++++++++++++----- 13 files changed, 1078 insertions(+), 350 deletions(-) diff --git a/projects/ARCTIC_MC/linux/linux.x86_64.conf b/projects/ARCTIC_MC/linux/linux.x86_64.conf index b0830889c2..014bd40b07 100644 --- a/projects/ARCTIC_MC/linux/linux.x86_64.conf +++ b/projects/ARCTIC_MC/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.7.10 Kernel Configuration +# Linux/x86_64 3.8.4 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -117,10 +117,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -199,14 +202,13 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_RCU_USER_QS=y +CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_GENERIC_SIGALTSTACK=y # # GCOV-based kernel profiling @@ -286,10 +288,7 @@ CONFIG_NO_BOOTMEM=y CONFIG_MATOM=y # CONFIG_GENERIC_CPU is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y @@ -360,7 +359,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -387,6 +385,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" # CONFIG_CMDLINE_OVERRIDE is not set @@ -397,7 +397,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -416,11 +415,13 @@ CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -438,6 +439,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -464,6 +466,7 @@ CONFIG_X86_P4_CLOCKMOD=y # CONFIG_X86_SPEEDSTEP_LIB=y CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -668,7 +671,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -734,8 +737,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y -# CONFIG_LIB80211_DEBUG is not set +# CONFIG_LIB80211 is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y # CONFIG_MAC80211_RC_PID is not set @@ -783,7 +785,6 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -932,6 +933,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_VMWARE_PVSCSI is not set @@ -959,6 +961,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1088,12 +1091,22 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set # CONFIG_NET_VENDOR_ALTEON is not set # CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_CALXEDA_XGMAC is not set @@ -1186,6 +1199,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1217,7 +1231,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_ADM8211 is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set -# CONFIG_ATH_COMMON is not set +# CONFIG_ATH_CARDS is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMFMAC is not set @@ -1252,6 +1266,7 @@ CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RTL8192CE is not set # CONFIG_RTL8192SE is not set # CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m @@ -1306,7 +1321,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1381,6 +1395,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1424,7 +1439,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1516,10 +1531,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +# CONFIG_PTP_1588_CLOCK is not set # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1536,7 +1553,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1655,6 +1674,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1740,11 +1765,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1781,6 +1810,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -1923,12 +1955,18 @@ CONFIG_TTPCI_EEPROM=m # Supported MMC/SDIO adapters # CONFIG_SMS_SDIO_DRV=m +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_SAA716X_SUPPORT=y CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2369,6 +2407,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2395,7 +2434,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2415,6 +2453,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2445,6 +2488,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2584,8 +2628,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2613,6 +2657,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_CB710 is not set @@ -2701,6 +2746,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2764,7 +2810,6 @@ CONFIG_STAGING=y CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -# CONFIG_RTS_PSTOR is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -2810,9 +2855,7 @@ CONFIG_LIRC_IGORPLUGUSB=m # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -2820,6 +2863,7 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -2844,6 +2888,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -2867,10 +2912,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -2970,6 +3017,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -2999,7 +3047,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3271,6 +3319,7 @@ CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6 is not set @@ -3319,6 +3368,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/ATV/linux/linux.i386.conf b/projects/ATV/linux/linux.i386.conf index 05e8f901ee..b14c315a2b 100644 --- a/projects/ATV/linux/linux.i386.conf +++ b/projects/ATV/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -110,6 +110,8 @@ CONFIG_TINY_RCU=y # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -191,13 +193,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -272,7 +274,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set @@ -299,13 +300,7 @@ CONFIG_MPENTIUMM=y # CONFIG_MATOM is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y @@ -438,10 +433,12 @@ CONFIG_ACPI=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -459,6 +456,7 @@ CONFIG_X86_PM_TIMER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -494,6 +492,7 @@ CONFIG_X86_ACPI_CPUFREQ=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -701,7 +700,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -762,8 +761,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y -# CONFIG_LIB80211_DEBUG is not set +# CONFIG_LIB80211 is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y # CONFIG_MAC80211_RC_PID is not set @@ -810,7 +808,6 @@ CONFIG_EXTRA_FIRMWARE="" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -958,6 +955,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -989,6 +987,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1119,12 +1118,24 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set # CONFIG_NET_VENDOR_ALTEON is not set # CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_CADENCE=y +# CONFIG_ARM_AT91_ETHER is not set +# CONFIG_MACB is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_CALXEDA_XGMAC is not set @@ -1221,6 +1232,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1254,6 +1266,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1272,6 +1285,8 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMFMAC is not set @@ -1306,6 +1321,7 @@ CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RTL8192CE is not set # CONFIG_RTL8192SE is not set # CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m @@ -1360,7 +1376,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_JOYSTICK=y @@ -1421,6 +1436,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1463,7 +1479,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1558,10 +1574,12 @@ CONFIG_I2C_I801=y # # PTP clock support # +# CONFIG_PTP_1588_CLOCK is not set # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1578,10 +1596,18 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set # CONFIG_HWMON is not set CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1666,11 +1692,15 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1707,6 +1737,9 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -1848,9 +1881,15 @@ CONFIG_TTPCI_EEPROM=m # # Supported MMC/SDIO adapters # +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m # CONFIG_SAA716X_SUPPORT is not set CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2308,6 +2347,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2334,7 +2374,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2354,6 +2393,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2381,6 +2425,7 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2516,8 +2561,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2594,6 +2639,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2657,7 +2703,6 @@ CONFIG_STAGING=y # CONFIG_RTL8192U is not set # CONFIG_RTLLIB is not set CONFIG_R8712U=m -# CONFIG_RTS_PSTOR is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -2703,15 +2748,14 @@ CONFIG_LIRC_IGORPLUGUSB=m # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set CONFIG_NET_VENDOR_SILICOM=y # CONFIG_SBYPASS is not set # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -2737,6 +2781,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -2760,10 +2805,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -2863,6 +2910,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -2892,7 +2940,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3049,7 +3097,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3200,6 +3247,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Fusion/linux/linux.i386.conf b/projects/Fusion/linux/linux.i386.conf index d773092ffc..04ca909dda 100644 --- a/projects/Fusion/linux/linux.i386.conf +++ b/projects/Fusion/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -113,10 +113,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -199,13 +202,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -282,7 +285,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set @@ -309,13 +311,7 @@ CONFIG_MK8=y # CONFIG_MATOM is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y @@ -390,7 +386,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_HIGHPTE is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 @@ -419,6 +414,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -430,7 +427,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -449,11 +445,13 @@ CONFIG_ACPI_SLEEP=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -472,6 +470,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -508,6 +507,7 @@ CONFIG_X86_ACPI_CPUFREQ_CPB=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -718,7 +718,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -782,8 +782,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y -# CONFIG_LIB80211_DEBUG is not set +# CONFIG_LIB80211 is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y # CONFIG_MAC80211_RC_PID is not set @@ -831,7 +830,6 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -983,6 +981,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -1014,6 +1013,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1147,6 +1147,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1157,6 +1166,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BNX2 is not set @@ -1177,6 +1187,7 @@ CONFIG_TIGON3=y CONFIG_IP1000=y # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set # CONFIG_SKGE is not set CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set @@ -1257,6 +1268,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1290,6 +1302,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1308,6 +1321,8 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1340,7 +1355,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m # CONFIG_IWL3945 is not set @@ -1379,6 +1393,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1436,7 +1451,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1512,6 +1526,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1555,7 +1570,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1641,7 +1656,15 @@ CONFIG_I2C_PIIX4=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1650,10 +1673,12 @@ CONFIG_I2C_PIIX4=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1670,7 +1695,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1789,6 +1816,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1874,11 +1907,15 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1915,6 +1952,9 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2115,6 +2155,11 @@ CONFIG_DVB_DDBRIDGE=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2123,6 +2168,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2572,6 +2618,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2607,6 +2654,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2633,7 +2681,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2653,6 +2700,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2683,6 +2735,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2822,8 +2875,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2901,6 +2954,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2964,8 +3018,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3012,15 +3064,15 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set CONFIG_NET_VENDOR_SILICOM=y # CONFIG_SBYPASS is not set # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_ACERHDF is not set # CONFIG_ASUS_LAPTOP is not set @@ -3069,6 +3121,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3092,10 +3145,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3195,6 +3250,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3224,7 +3280,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3385,7 +3441,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3537,6 +3592,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Fusion/linux/linux.x86_64.conf b/projects/Fusion/linux/linux.x86_64.conf index 1f67676900..a173a8efcd 100644 --- a/projects/Fusion/linux/linux.x86_64.conf +++ b/projects/Fusion/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.7.10 Kernel Configuration +# Linux/x86_64 3.8.4 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -115,10 +115,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -201,14 +204,13 @@ CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_RCU_USER_QS=y +CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_GENERIC_SIGALTSTACK=y # # GCOV-based kernel profiling @@ -289,10 +291,7 @@ CONFIG_MK8=y # CONFIG_MATOM is not set # CONFIG_GENERIC_CPU is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y @@ -365,7 +364,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -392,6 +390,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -403,7 +403,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -422,11 +421,13 @@ CONFIG_ACPI_SLEEP=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -444,6 +445,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -471,6 +473,7 @@ CONFIG_X86_ACPI_CPUFREQ_CPB=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -683,7 +686,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -748,8 +751,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y -# CONFIG_LIB80211_DEBUG is not set +# CONFIG_LIB80211 is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y # CONFIG_MAC80211_RC_PID is not set @@ -797,7 +799,6 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -948,6 +949,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_VMWARE_PVSCSI is not set @@ -975,6 +977,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1107,6 +1110,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1117,6 +1129,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BNX2 is not set @@ -1137,6 +1150,7 @@ CONFIG_TIGON3=y CONFIG_IP1000=y # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set # CONFIG_SKGE is not set CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set @@ -1217,6 +1231,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1249,6 +1264,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1267,6 +1283,8 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1299,7 +1317,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m # CONFIG_IWL3945 is not set @@ -1338,6 +1355,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1395,7 +1413,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1470,6 +1487,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1513,7 +1531,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1595,7 +1613,15 @@ CONFIG_I2C_PIIX4=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1604,10 +1630,12 @@ CONFIG_I2C_PIIX4=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1624,7 +1652,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1743,6 +1773,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1827,11 +1863,15 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1868,6 +1908,9 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2068,6 +2111,11 @@ CONFIG_DVB_DDBRIDGE=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2076,6 +2124,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2516,6 +2565,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2551,6 +2601,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2577,7 +2628,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2597,6 +2647,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2627,6 +2682,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2766,8 +2822,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2845,6 +2901,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2908,8 +2965,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -2956,15 +3011,15 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set CONFIG_NET_VENDOR_SILICOM=y # CONFIG_SBYPASS is not set # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_ACERHDF is not set # CONFIG_ASUS_LAPTOP is not set @@ -3011,6 +3066,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3034,10 +3090,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3137,6 +3195,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3166,7 +3225,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3440,6 +3499,7 @@ CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6 is not set @@ -3488,6 +3548,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Generic/linux/linux.i386.conf b/projects/Generic/linux/linux.i386.conf index 4b65ef1df5..4f13619217 100644 --- a/projects/Generic/linux/linux.i386.conf +++ b/projects/Generic/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -115,10 +115,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -201,13 +204,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -284,7 +287,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set @@ -311,14 +313,8 @@ CONFIG_M686=y # CONFIG_MATOM is not set CONFIG_X86_GENERIC=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y # CONFIG_X86_PPRO_FENCE is not set -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y @@ -394,7 +390,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_HIGHPTE is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 @@ -423,6 +418,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -434,7 +431,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -454,11 +450,13 @@ CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -477,6 +475,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -513,6 +512,7 @@ CONFIG_X86_P4_CLOCKMOD=y # CONFIG_X86_SPEEDSTEP_LIB=y CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -724,7 +724,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -790,7 +790,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -842,7 +842,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -994,6 +993,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -1025,6 +1025,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1158,6 +1159,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y CONFIG_NET_VENDOR_3COM=y CONFIG_VORTEX=y @@ -1172,6 +1182,7 @@ CONFIG_ATL2=y CONFIG_ATL1=y CONFIG_ATL1E=y CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B44=y CONFIG_B44_PCI_AUTOSELECT=y @@ -1203,7 +1214,6 @@ CONFIG_E100=y CONFIG_E1000=y CONFIG_E1000E=y CONFIG_IGB=y -# CONFIG_IGB_PTP is not set # CONFIG_IGBVF is not set # CONFIG_IXGB is not set # CONFIG_IXGBE is not set @@ -1213,6 +1223,7 @@ CONFIG_ZNET=y CONFIG_IP1000=y CONFIG_JME=y CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set CONFIG_SKGE=y # CONFIG_SKGE_DEBUG is not set CONFIG_SKGE_GENESIS=y @@ -1311,6 +1322,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1347,6 +1359,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1368,6 +1381,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1393,7 +1408,7 @@ CONFIG_BRCMFMAC=m CONFIG_BRCMFMAC_SDIO=y # CONFIG_BRCMFMAC_SDIO_OOB is not set CONFIG_BRCMFMAC_USB=y -# CONFIG_BRCMISCAN is not set +# CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y @@ -1419,7 +1434,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1462,6 +1476,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1519,7 +1534,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1595,6 +1609,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1638,7 +1653,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1725,7 +1740,15 @@ CONFIG_I2C_INTEL_MID=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1734,10 +1757,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1754,7 +1779,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1873,6 +1900,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1958,11 +1991,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1999,6 +2036,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2200,6 +2240,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2208,6 +2253,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2695,6 +2741,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2730,6 +2777,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2756,7 +2804,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2776,6 +2823,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2806,6 +2858,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2946,8 +2999,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2975,6 +3028,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set @@ -3065,6 +3119,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -3107,6 +3162,7 @@ CONFIG_UIO=y # CONFIG_UIO_CIF is not set # CONFIG_UIO_PDRV is not set # CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set # CONFIG_UIO_AEC is not set # CONFIG_UIO_SERCOS3 is not set # CONFIG_UIO_PCI_GENERIC is not set @@ -3135,8 +3191,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3183,9 +3237,7 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3193,6 +3245,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_ACER_WMI is not set # CONFIG_ACERHDF is not set @@ -3251,6 +3305,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3274,10 +3329,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3377,6 +3434,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3406,7 +3464,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3567,7 +3625,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3720,6 +3777,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Generic_OSS/linux/linux.i386.conf b/projects/Generic_OSS/linux/linux.i386.conf index c71addab24..e849c1e75d 100644 --- a/projects/Generic_OSS/linux/linux.i386.conf +++ b/projects/Generic_OSS/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -115,10 +115,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -201,13 +204,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -284,7 +287,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set @@ -311,14 +313,8 @@ CONFIG_M686=y # CONFIG_MATOM is not set CONFIG_X86_GENERIC=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y # CONFIG_X86_PPRO_FENCE is not set -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y @@ -394,7 +390,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_HIGHPTE is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 @@ -423,6 +418,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -434,7 +431,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -454,11 +450,13 @@ CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -477,6 +475,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -513,6 +512,7 @@ CONFIG_X86_P4_CLOCKMOD=y # CONFIG_X86_SPEEDSTEP_LIB=y CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -724,7 +724,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -790,7 +790,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -842,7 +842,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -994,6 +993,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -1025,6 +1025,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1158,6 +1159,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y CONFIG_NET_VENDOR_3COM=y CONFIG_VORTEX=y @@ -1172,6 +1182,7 @@ CONFIG_ATL2=y CONFIG_ATL1=y CONFIG_ATL1E=y CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B44=y CONFIG_B44_PCI_AUTOSELECT=y @@ -1203,7 +1214,6 @@ CONFIG_E100=y CONFIG_E1000=y CONFIG_E1000E=y CONFIG_IGB=y -# CONFIG_IGB_PTP is not set # CONFIG_IGBVF is not set # CONFIG_IXGB is not set # CONFIG_IXGBE is not set @@ -1213,6 +1223,7 @@ CONFIG_ZNET=y CONFIG_IP1000=y CONFIG_JME=y CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set CONFIG_SKGE=y # CONFIG_SKGE_DEBUG is not set CONFIG_SKGE_GENESIS=y @@ -1309,6 +1320,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1345,6 +1357,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1366,6 +1379,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1391,7 +1406,7 @@ CONFIG_BRCMFMAC=m CONFIG_BRCMFMAC_SDIO=y # CONFIG_BRCMFMAC_SDIO_OOB is not set CONFIG_BRCMFMAC_USB=y -# CONFIG_BRCMISCAN is not set +# CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y @@ -1417,7 +1432,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1460,6 +1474,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1517,7 +1532,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1593,6 +1607,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1636,7 +1651,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1723,7 +1738,15 @@ CONFIG_I2C_INTEL_MID=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1732,10 +1755,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1752,7 +1777,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1871,6 +1898,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1956,11 +1989,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1997,6 +2034,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2198,6 +2238,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2206,6 +2251,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2698,6 +2744,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2733,6 +2780,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2759,7 +2807,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2779,6 +2826,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2809,6 +2861,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2949,8 +3002,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2978,6 +3031,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set @@ -3068,6 +3122,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -3110,6 +3165,7 @@ CONFIG_UIO=y # CONFIG_UIO_CIF is not set # CONFIG_UIO_PDRV is not set # CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set # CONFIG_UIO_AEC is not set # CONFIG_UIO_SERCOS3 is not set # CONFIG_UIO_PCI_GENERIC is not set @@ -3138,8 +3194,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3186,9 +3240,7 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3196,6 +3248,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_ACER_WMI is not set # CONFIG_ACERHDF is not set @@ -3254,6 +3308,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3277,10 +3332,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3380,6 +3437,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3409,7 +3467,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3570,7 +3628,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3723,6 +3780,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index bd37918dd9..d534054b32 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -115,10 +115,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -201,13 +204,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -284,7 +287,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set @@ -311,13 +313,7 @@ CONFIG_NO_BOOTMEM=y CONFIG_MATOM=y # CONFIG_X86_GENERIC is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y @@ -392,7 +388,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_HIGHPTE is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 @@ -421,6 +416,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -432,7 +429,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -451,11 +447,13 @@ CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -474,6 +472,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -509,6 +508,7 @@ CONFIG_X86_P4_CLOCKMOD=y # CONFIG_X86_SPEEDSTEP_LIB=y CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -719,7 +719,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -785,7 +785,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -837,7 +837,6 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -989,6 +988,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -1020,6 +1020,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1153,6 +1154,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1163,6 +1173,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_CALXEDA_XGMAC is not set @@ -1266,6 +1277,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1299,6 +1311,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1320,6 +1333,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1347,7 +1362,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1386,6 +1400,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1443,7 +1458,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1519,6 +1533,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1562,7 +1577,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1658,10 +1673,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +# CONFIG_PTP_1588_CLOCK is not set # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1678,7 +1695,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1797,6 +1816,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1884,11 +1909,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1925,6 +1954,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2126,6 +2158,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2134,6 +2171,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2585,6 +2623,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2620,6 +2659,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2646,7 +2686,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2666,6 +2705,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2696,6 +2740,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2835,8 +2880,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2864,6 +2909,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set @@ -2953,6 +2999,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -3016,8 +3063,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3064,9 +3109,7 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3074,6 +3117,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -3099,6 +3144,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3122,10 +3168,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3225,6 +3273,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3254,7 +3303,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3415,7 +3464,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3567,6 +3615,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/ION/linux/linux.x86_64.conf b/projects/ION/linux/linux.x86_64.conf index 8d1c533cc6..2dff04edad 100644 --- a/projects/ION/linux/linux.x86_64.conf +++ b/projects/ION/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.7.10 Kernel Configuration +# Linux/x86_64 3.8.4 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -117,10 +117,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -199,14 +202,13 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_RCU_USER_QS=y +CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_GENERIC_SIGALTSTACK=y # # GCOV-based kernel profiling @@ -286,10 +288,7 @@ CONFIG_NO_BOOTMEM=y CONFIG_MATOM=y # CONFIG_GENERIC_CPU is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y @@ -360,7 +359,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -387,6 +385,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" # CONFIG_CMDLINE_OVERRIDE is not set @@ -397,7 +397,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -416,11 +415,13 @@ CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -438,6 +439,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -464,6 +466,7 @@ CONFIG_X86_P4_CLOCKMOD=y # CONFIG_X86_SPEEDSTEP_LIB=y CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -668,7 +671,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -735,7 +738,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -787,7 +790,6 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -938,6 +940,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_VMWARE_PVSCSI is not set @@ -965,6 +968,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1097,6 +1101,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1107,6 +1120,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_CALXEDA_XGMAC is not set @@ -1209,6 +1223,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1241,6 +1256,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1262,6 +1278,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1289,7 +1307,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1328,6 +1345,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1385,7 +1403,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1460,6 +1477,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1503,7 +1521,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1595,10 +1613,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +# CONFIG_PTP_1588_CLOCK is not set # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1615,7 +1635,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1734,6 +1756,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1820,11 +1848,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1861,6 +1893,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2062,6 +2097,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2070,6 +2110,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2511,6 +2552,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2546,6 +2588,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2572,7 +2615,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2592,6 +2634,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2622,6 +2669,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2761,8 +2809,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2790,6 +2838,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_CB710 is not set @@ -2878,6 +2927,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2941,8 +2991,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -2989,9 +3037,7 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -2999,6 +3045,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -3023,6 +3071,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3046,10 +3095,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3149,6 +3200,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3178,7 +3230,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3451,6 +3503,7 @@ CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6 is not set @@ -3499,6 +3552,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Intel/linux/linux.i386.conf b/projects/Intel/linux/linux.i386.conf index c300edde03..a09944a939 100644 --- a/projects/Intel/linux/linux.i386.conf +++ b/projects/Intel/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -115,10 +115,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -201,13 +204,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -284,7 +287,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set @@ -311,13 +313,7 @@ CONFIG_MCORE2=y # CONFIG_MATOM is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y @@ -393,7 +389,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_HIGHPTE is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 @@ -422,6 +417,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -433,7 +430,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -453,11 +449,13 @@ CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -476,6 +474,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -511,6 +510,7 @@ CONFIG_X86_ACPI_CPUFREQ=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -721,7 +721,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -787,7 +787,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -839,7 +839,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -991,6 +990,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -1022,6 +1022,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1155,6 +1156,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1165,6 +1175,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set CONFIG_ATL1E=y CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BNX2 is not set @@ -1195,6 +1206,7 @@ CONFIG_ZNET=y CONFIG_IP1000=y # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set # CONFIG_SKGE is not set CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set @@ -1275,6 +1287,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1308,6 +1321,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1329,6 +1343,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1365,7 +1381,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1404,6 +1419,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1461,7 +1477,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1537,6 +1552,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1580,7 +1596,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1666,7 +1682,15 @@ CONFIG_I2C_INTEL_MID=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1675,10 +1699,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1695,7 +1721,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1814,6 +1842,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1901,11 +1935,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1942,6 +1980,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2143,6 +2184,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2151,6 +2197,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2636,6 +2683,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2671,6 +2719,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2697,7 +2746,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2717,6 +2765,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2747,6 +2800,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2882,8 +2936,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2911,6 +2965,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set @@ -3000,6 +3055,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -3063,8 +3119,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3111,9 +3165,7 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3121,6 +3173,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -3146,6 +3200,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3169,10 +3224,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3272,6 +3329,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3301,7 +3359,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3462,7 +3520,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3614,6 +3671,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Intel/linux/linux.x86_64.conf b/projects/Intel/linux/linux.x86_64.conf index c21f3eeec4..b00bde33ee 100644 --- a/projects/Intel/linux/linux.x86_64.conf +++ b/projects/Intel/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.7.10 Kernel Configuration +# Linux/x86_64 3.8.4 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -117,10 +117,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -199,14 +202,13 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_RCU_USER_QS=y +CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_GENERIC_SIGALTSTACK=y # # GCOV-based kernel profiling @@ -286,10 +288,7 @@ CONFIG_MCORE2=y # CONFIG_MATOM is not set # CONFIG_GENERIC_CPU is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_P6_NOP=y @@ -362,7 +361,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -389,6 +387,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" # CONFIG_CMDLINE_OVERRIDE is not set @@ -399,7 +399,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -419,11 +418,13 @@ CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -441,6 +442,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -467,6 +469,7 @@ CONFIG_X86_ACPI_CPUFREQ=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -671,7 +674,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -738,7 +741,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -790,7 +793,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -941,6 +943,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_VMWARE_PVSCSI is not set @@ -968,6 +971,7 @@ CONFIG_SCSI_MVSAS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1100,6 +1104,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1110,6 +1123,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set CONFIG_ATL1E=y CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BNX2 is not set @@ -1139,6 +1153,7 @@ CONFIG_NET_VENDOR_I825XX=y CONFIG_IP1000=y # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set # CONFIG_SKGE is not set CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set @@ -1219,6 +1234,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1251,6 +1267,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1272,6 +1289,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1308,7 +1327,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1347,6 +1365,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1404,7 +1423,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1479,6 +1497,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1522,7 +1541,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1604,7 +1623,15 @@ CONFIG_I2C_INTEL_MID=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1613,10 +1640,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1633,7 +1662,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1752,6 +1783,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1838,11 +1875,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1879,6 +1920,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2080,6 +2124,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2088,6 +2137,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2563,6 +2613,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2598,6 +2649,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2624,7 +2676,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2644,6 +2695,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2674,6 +2730,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2809,8 +2866,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2838,6 +2895,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_CB710 is not set @@ -2926,6 +2984,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2989,8 +3048,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3037,9 +3094,7 @@ CONFIG_LIRC_SERIAL_TRANSMITTER=y # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3047,6 +3102,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -3071,6 +3128,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3094,10 +3152,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3197,6 +3257,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3226,7 +3287,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3499,6 +3560,7 @@ CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6 is not set @@ -3547,6 +3609,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Ultra/linux/linux.x86_64.conf b/projects/Ultra/linux/linux.x86_64.conf index 8bb1fd3d15..10b1adae87 100644 --- a/projects/Ultra/linux/linux.x86_64.conf +++ b/projects/Ultra/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.7.10 Kernel Configuration +# Linux/x86_64 3.8.4 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -117,10 +117,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -199,14 +202,13 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_RCU_USER_QS=y +CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_GENERIC_SIGALTSTACK=y # # GCOV-based kernel profiling @@ -286,10 +288,7 @@ CONFIG_NO_BOOTMEM=y CONFIG_MATOM=y # CONFIG_GENERIC_CPU is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y @@ -360,7 +359,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -387,6 +385,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" # CONFIG_CMDLINE_OVERRIDE is not set @@ -397,7 +397,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -416,11 +415,13 @@ CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -438,6 +439,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -464,6 +466,7 @@ CONFIG_X86_ACPI_CPUFREQ=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -668,7 +671,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -733,8 +736,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y -# CONFIG_LIB80211_DEBUG is not set +# CONFIG_LIB80211 is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y # CONFIG_MAC80211_RC_PID is not set @@ -782,7 +784,6 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -929,6 +930,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_VMWARE_PVSCSI is not set @@ -956,6 +958,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1085,12 +1088,22 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set # CONFIG_NET_VENDOR_ALTEON is not set # CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_CALXEDA_XGMAC is not set @@ -1183,6 +1196,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1215,6 +1229,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set # CONFIG_ATH5K is not set # CONFIG_ATH5K_PCI is not set @@ -1232,6 +1247,8 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMFMAC is not set @@ -1266,6 +1283,7 @@ CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RTL8192CE is not set # CONFIG_RTL8192SE is not set # CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set # CONFIG_WL_TI is not set CONFIG_ZD1211RW=m @@ -1320,7 +1338,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_JOYSTICK=y @@ -1380,6 +1397,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1423,7 +1441,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1515,10 +1533,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +# CONFIG_PTP_1588_CLOCK is not set # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1535,7 +1555,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1654,6 +1676,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1737,11 +1765,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1778,6 +1810,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -1919,12 +1954,18 @@ CONFIG_TTPCI_EEPROM=m # # Supported MMC/SDIO adapters # +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_SAA716X_SUPPORT=y CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2365,6 +2406,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2391,7 +2433,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2411,6 +2452,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2441,6 +2487,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2580,8 +2627,8 @@ CONFIG_USB_SERIAL_PL2303=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2658,6 +2705,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2721,7 +2769,6 @@ CONFIG_STAGING=y # CONFIG_RTL8192U is not set # CONFIG_RTLLIB is not set CONFIG_R8712U=m -# CONFIG_RTS_PSTOR is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -2767,15 +2814,14 @@ CONFIG_LIRC_IGORPLUGUSB=m # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set CONFIG_NET_VENDOR_SILICOM=y # CONFIG_SBYPASS is not set # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -2800,6 +2846,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -2823,10 +2870,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -2926,6 +2975,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -2955,7 +3005,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3227,6 +3277,7 @@ CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6 is not set @@ -3275,6 +3326,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Virtual/linux/linux.i386.conf b/projects/Virtual/linux/linux.i386.conf index 39bba34193..7166659b28 100644 --- a/projects/Virtual/linux/linux.i386.conf +++ b/projects/Virtual/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.7.10 Kernel Configuration +# Linux/i386 3.8.4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -115,10 +115,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -201,13 +204,13 @@ CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y # # GCOV-based kernel profiling @@ -284,7 +287,6 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_PARAVIRT_GUEST is not set CONFIG_NO_BOOTMEM=y # CONFIG_MEMTEST is not set -# CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set CONFIG_M586TSC=y @@ -311,15 +313,9 @@ CONFIG_M586TSC=y # CONFIG_MATOM is not set # CONFIG_X86_GENERIC is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=5 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=5 -CONFIG_X86_XADD=y # CONFIG_X86_PPRO_FENCE is not set CONFIG_X86_F00F_BUG=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_INVLPG=y -CONFIG_X86_BSWAP=y -CONFIG_X86_POPAD_OK=y CONFIG_X86_ALIGNMENT_16=y CONFIG_X86_TSC=y CONFIG_X86_MINIMUM_CPU_FAMILY=4 @@ -391,7 +387,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_HIGHPTE is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 @@ -420,6 +415,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" @@ -431,7 +428,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -451,11 +447,13 @@ CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -474,6 +472,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -509,6 +508,7 @@ CONFIG_X86_ACPI_CPUFREQ=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -719,7 +719,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -785,7 +785,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -837,7 +837,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -985,6 +984,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set @@ -1016,6 +1016,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1155,6 +1156,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1167,6 +1177,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BNX2 is not set @@ -1197,6 +1208,7 @@ CONFIG_ZNET=y CONFIG_IP1000=y # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set # CONFIG_SKGE is not set CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set @@ -1277,6 +1289,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1310,6 +1323,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1331,6 +1345,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1367,7 +1383,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1406,6 +1421,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1463,7 +1479,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1539,6 +1554,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1582,7 +1598,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1668,7 +1684,15 @@ CONFIG_I2C_INTEL_MID=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1677,10 +1701,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1697,7 +1723,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1816,6 +1844,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1903,11 +1937,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1944,6 +1982,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2144,6 +2185,11 @@ CONFIG_SMS_SDIO_DRV=m # Supported FireWire (IEEE 1394) Adapters # CONFIG_DVB_FIREDTV=m +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_FIREDTV_INPUT=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m @@ -2153,6 +2199,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2641,6 +2688,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2676,6 +2724,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2702,7 +2751,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2722,6 +2770,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2752,6 +2805,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2887,8 +2941,8 @@ CONFIG_USB_SERIAL_IUU=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2916,6 +2970,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set @@ -3005,6 +3060,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -3068,8 +3124,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3108,9 +3162,7 @@ CONFIG_DVB_CXD2099=m # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3118,6 +3170,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -3143,6 +3197,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3166,10 +3221,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3269,6 +3326,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3298,7 +3356,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3459,7 +3517,6 @@ CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_SET_MODULE_RONX is not set # CONFIG_DEBUG_NX_TEST is not set CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_STRESS is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_TYPE_0X80=0 @@ -3611,6 +3668,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/projects/Virtual/linux/linux.x86_64.conf b/projects/Virtual/linux/linux.x86_64.conf index 16cc7a4893..963d605d08 100644 --- a/projects/Virtual/linux/linux.x86_64.conf +++ b/projects/Virtual/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.7.10 Kernel Configuration +# Linux/x86_64 3.8.4 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -117,10 +117,13 @@ CONFIG_RCU_FANOUT_LEAF=16 # CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y # CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_NAMESPACES is not set @@ -199,14 +202,13 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_GENERIC_KERNEL_THREAD=y -CONFIG_GENERIC_KERNEL_EXECVE=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_RCU_USER_QS=y +CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_GENERIC_SIGALTSTACK=y # # GCOV-based kernel profiling @@ -286,10 +288,7 @@ CONFIG_NO_BOOTMEM=y # CONFIG_MATOM is not set CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_CMPXCHG=y CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_XADD=y -CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y @@ -359,7 +358,6 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -386,6 +384,8 @@ CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x1000000 CONFIG_HOTPLUG_CPU=y +# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set +# CONFIG_DEBUG_HOTPLUG_CPU0 is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init" # CONFIG_CMDLINE_OVERRIDE is not set @@ -396,7 +396,6 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -416,11 +415,13 @@ CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set # CONFIG_ACPI_PCI_SLOT is not set @@ -438,6 +439,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set @@ -464,6 +466,7 @@ CONFIG_X86_ACPI_CPUFREQ=y # # CONFIG_X86_SPEEDSTEP_LIB is not set CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set @@ -668,7 +671,7 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_NET_DSA is not set +CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set @@ -735,7 +738,7 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=y +CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m CONFIG_LIB80211_CRYPT_TKIP=m @@ -787,7 +790,6 @@ CONFIG_DMA_SHARED_BUFFER=y # # Bus devices # -# CONFIG_OMAP_OCP2SCP is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set @@ -934,6 +936,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_VMWARE_PVSCSI is not set @@ -961,6 +964,7 @@ CONFIG_ISCSI_BOOT_SYSFS=y # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set # CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_CHELSIO_FCOE is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y @@ -1099,6 +1103,15 @@ CONFIG_TUN=y # # CAIF transport drivers # + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set @@ -1111,6 +1124,7 @@ CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set CONFIG_ATL1C=y +# CONFIG_NET_CADENCE is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BNX2 is not set @@ -1140,6 +1154,7 @@ CONFIG_NET_VENDOR_I825XX=y CONFIG_IP1000=y # CONFIG_JME is not set CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set # CONFIG_SKGE is not set CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set @@ -1220,6 +1235,7 @@ CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m # CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SMSC75XX=m # CONFIG_USB_NET_SMSC95XX is not set @@ -1252,6 +1268,7 @@ CONFIG_RTL8187_LEDS=y # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m # CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m # CONFIG_ATH5K_DEBUG is not set @@ -1273,6 +1290,8 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y CONFIG_B43_PCI_AUTOSELECT=y @@ -1309,7 +1328,6 @@ CONFIG_IWLDVM=m # # CONFIG_IWLWIFI_DEBUG is not set # CONFIG_IWLWIFI_P2P is not set -# CONFIG_IWLWIFI_EXPERIMENTAL_MFP is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m @@ -1348,6 +1366,7 @@ CONFIG_RT2X00_LIB_LEDS=y CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m CONFIG_RTL8192DE=m +# CONFIG_RTL8723AE is not set # CONFIG_RTL8192CU is not set CONFIG_RTLWIFI=m # CONFIG_RTLWIFI_DEBUG is not set @@ -1405,7 +1424,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y @@ -1480,6 +1498,7 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -1523,7 +1542,7 @@ CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -1605,7 +1624,15 @@ CONFIG_I2C_INTEL_MID=y # # PPS support # -# CONFIG_PPS is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1614,10 +1641,12 @@ CONFIG_I2C_INTEL_MID=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y # -# Enable Device Drivers -> PPS to see the PTP clock options. +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_PCH is not set CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set @@ -1634,7 +1663,9 @@ CONFIG_POWER_SUPPLY=y # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y @@ -1753,6 +1784,12 @@ CONFIG_SENSORS_W83627EHF=y # CONFIG_SENSORS_ATK0110 is not set CONFIG_THERMAL=y CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y @@ -1839,11 +1876,15 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_LM3533 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_STMPE is not set @@ -1880,6 +1921,9 @@ CONFIG_LPC_SCH=y # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_PALMAS is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_AS3711 is not set # CONFIG_REGULATOR is not set CONFIG_MEDIA_SUPPORT=m @@ -2081,6 +2125,11 @@ CONFIG_SMS_SDIO_DRV=m # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -2089,6 +2138,7 @@ CONFIG_SAA716X_CORE=m CONFIG_DVB_SAA716X_BUDGET=m CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # @@ -2567,6 +2617,7 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_FIREWIRE=y # CONFIG_SND_FIREWIRE_SPEAKERS is not set # CONFIG_SND_ISIGHT is not set +# CONFIG_SND_SCS1X is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -2602,6 +2653,7 @@ CONFIG_HID_KYE=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set CONFIG_HID_GYRATION=y +# CONFIG_HID_ICADE is not set CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y @@ -2628,7 +2680,6 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set -CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -2648,6 +2699,11 @@ CONFIG_HID_ZYDACRON=y CONFIG_USB_HID=y # CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_XHCI=y @@ -2678,6 +2734,7 @@ CONFIG_USB_XHCI_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set @@ -2813,8 +2870,8 @@ CONFIG_USB_SERIAL_IUU=m # # USB Physical Layer drivers # -# CONFIG_OMAP_USB2 is not set # CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set # CONFIG_USB_GADGET is not set # @@ -2842,6 +2899,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set # CONFIG_MMC_SDHCI_PLTFM is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_CB710 is not set @@ -2930,6 +2988,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -2993,8 +3052,6 @@ CONFIG_R8187SE=m CONFIG_RTL8192U=m # CONFIG_RTLLIB is not set CONFIG_R8712U=m -CONFIG_RTS_PSTOR=m -# CONFIG_RTS_PSTOR_DEBUG is not set CONFIG_RTS5139=m # CONFIG_RTS5139_DEBUG is not set # CONFIG_TRANZPORT is not set @@ -3033,9 +3090,7 @@ CONFIG_DVB_CXD2099=m # Android # # CONFIG_ANDROID is not set -# CONFIG_PHONE is not set # CONFIG_USB_WPAN_HCD is not set -# CONFIG_IPACK_BUS is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set CONFIG_NET_VENDOR_SILICOM=y @@ -3043,6 +3098,8 @@ CONFIG_NET_VENDOR_SILICOM=y # CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DGRP is not set +# CONFIG_SB105X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_X86_PLATFORM_DEVICES is not set # @@ -3067,6 +3124,7 @@ CONFIG_CLKBLD_I8253=y # CONFIG_IIO is not set # CONFIG_VME_BUS is not set # CONFIG_PWM is not set +# CONFIG_IPACK_BUS is not set # # Firmware Drivers @@ -3090,10 +3148,12 @@ CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT23=y -# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -3193,6 +3253,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y @@ -3222,7 +3283,7 @@ CONFIG_CIFS_STATS2=y # CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG is not set # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SMB2 is not set # CONFIG_NCP_FS is not set @@ -3495,6 +3556,7 @@ CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6 is not set @@ -3543,6 +3605,7 @@ CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set From e1073e3a10a76bdd7e8d41b5e737f9c4459376b2 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 26 Mar 2013 20:26:29 +0100 Subject: [PATCH 080/104] linux: readd some needed patches for kernel 3.8 Signed-off-by: Stephan Raue --- .../linux-053-spinelplus-remote-0.2.patch | 161 ++++++++++++++++++ .../linux-059-remove_some_xpad_pids-0.2.patch | 11 ++ 2 files changed, 172 insertions(+) create mode 100644 packages/linux/patches/3.8.4/linux-053-spinelplus-remote-0.2.patch create mode 100644 packages/linux/patches/3.8.4/linux-059-remove_some_xpad_pids-0.2.patch diff --git a/packages/linux/patches/3.8.4/linux-053-spinelplus-remote-0.2.patch b/packages/linux/patches/3.8.4/linux-053-spinelplus-remote-0.2.patch new file mode 100644 index 0000000000..5cabc368ac --- /dev/null +++ b/packages/linux/patches/3.8.4/linux-053-spinelplus-remote-0.2.patch @@ -0,0 +1,161 @@ +diff -Naur linux-3.8.4/drivers/hid/hid-core.c linux-3.8.4.patch/drivers/hid/hid-core.c +--- linux-3.8.4/drivers/hid/hid-core.c 2013-03-20 21:11:19.000000000 +0100 ++++ linux-3.8.4.patch/drivers/hid/hid-core.c 2013-03-26 20:16:01.134847253 +0100 +@@ -1676,6 +1676,9 @@ + { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_PKB1700) }, + { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) }, + { HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_1) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_2) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_3) }, + { HID_USB_DEVICE(USB_VENDOR_ID_PRIMAX, USB_DEVICE_ID_PRIMAX_KEYBOARD) }, + #if IS_ENABLED(CONFIG_HID_ROCCAT) + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONE) }, +diff -Naur linux-3.8.4/drivers/hid/hid-ids.h linux-3.8.4.patch/drivers/hid/hid-ids.h +--- linux-3.8.4/drivers/hid/hid-ids.h 2013-03-20 21:11:19.000000000 +0100 ++++ linux-3.8.4.patch/drivers/hid/hid-ids.h 2013-03-26 20:11:51.442654398 +0100 +@@ -655,6 +655,9 @@ + + #define USB_VENDOR_ID_PHILIPS 0x0471 + #define USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE 0x0617 ++#define USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_1 0x206c ++#define USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_2 0x20cc ++#define USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_3 0x0613 + + #define USB_VENDOR_ID_PI_ENGINEERING 0x05f3 + #define USB_DEVICE_ID_PI_ENGINEERING_VEC_USB_FOOTPEDAL 0xff +diff -Naur linux-3.8.4/drivers/hid/hid-spinelplus.c linux-3.8.4.patch/drivers/hid/hid-spinelplus.c +--- linux-3.8.4/drivers/hid/hid-spinelplus.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.8.4.patch/drivers/hid/hid-spinelplus.c 2013-03-26 20:11:51.442654398 +0100 +@@ -0,0 +1,104 @@ ++/* ++ * HID driver for "PHILIPS MCE USB IR Receiver- Spinel plus" remotes ++ * ++ * Copyright (c) 2010 Panagiotis Skintzos ++ * ++ * Renamed to Spinel, cleanup and modified to also support ++ * Spinel Plus 0471:20CC by Stephan Raue 2012. ++ */ ++ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the Free ++ * Software Foundation; either version 2 of the License, or (at your option) ++ * any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "hid-ids.h" ++ ++#define spinelplus_map_key(c) set_bit(EV_REP, hi->input->evbit); \ ++ hid_map_usage_clear(hi, usage, bit, max, EV_KEY, (c)) ++ ++static int spinelplus_input_mapping(struct hid_device *hdev, ++ struct hid_input *hi, struct hid_field *field, struct hid_usage *usage, ++ unsigned long **bit, int *max) ++{ ++ switch (usage->hid) { ++ case 0xffbc000d: spinelplus_map_key(KEY_MEDIA); break; ++ case 0xffbc0024: spinelplus_map_key(KEY_MEDIA); break; ++ case 0xffbc0027: spinelplus_map_key(KEY_ZOOM); break; ++ case 0xffbc0033: spinelplus_map_key(KEY_HOME); break; ++ case 0xffbc0035: spinelplus_map_key(KEY_CAMERA); break; ++ case 0xffbc0036: spinelplus_map_key(KEY_EPG); break; ++ case 0xffbc0037: spinelplus_map_key(KEY_DVD); break; ++ case 0xffbc0038: spinelplus_map_key(KEY_HOME); break; ++ case 0xffbc0039: spinelplus_map_key(KEY_MP3); break; ++ case 0xffbc003a: spinelplus_map_key(KEY_VIDEO); break; ++ case 0xffbc005a: spinelplus_map_key(KEY_TEXT); break; ++ case 0xffbc005b: spinelplus_map_key(KEY_RED); break; ++ case 0xffbc005c: spinelplus_map_key(KEY_GREEN); break; ++ case 0xffbc005d: spinelplus_map_key(KEY_YELLOW); break; ++ case 0xffbc005e: spinelplus_map_key(KEY_BLUE); break; ++ default: ++ return 0; ++ } ++ return 1; ++} ++ ++static int spinelplus_probe(struct hid_device *hdev, ++ const struct hid_device_id *id) ++{ ++ int ret; ++ /* Connect only to hid input (not hiddev & hidraw)*/ ++ unsigned int cmask = HID_CONNECT_HIDINPUT; ++ ++ ret = hid_parse(hdev); ++ if (ret) { ++ dev_err(&hdev->dev, "parse failed\n"); ++ goto err_free; ++ } ++ ++ ret = hid_hw_start(hdev, cmask); ++ if (ret) { ++ dev_err(&hdev->dev, "hw start failed\n"); ++ goto err_free; ++ } ++ ++ return 0; ++err_free: ++ return ret; ++} ++ ++static const struct hid_device_id spinelplus_devices[] = { ++ { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS,USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_1) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS,USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_2) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS,USB_DEVICE_ID_PHILIPS_SPINEL_PLUS_3) }, ++ { } ++}; ++MODULE_DEVICE_TABLE(hid, spinelplus_devices); ++ ++static struct hid_driver spinelplus_driver = { ++ .name = "SpinelPlus", ++ .id_table = spinelplus_devices, ++ .input_mapping = spinelplus_input_mapping, ++ .probe = spinelplus_probe, ++}; ++ ++static int __init spinelplus_init(void) ++{ ++ return hid_register_driver(&spinelplus_driver); ++} ++ ++static void __exit spinelplus_exit(void) ++{ ++ hid_unregister_driver(&spinelplus_driver); ++} ++ ++module_init(spinelplus_init); ++module_exit(spinelplus_exit); ++MODULE_LICENSE("GPL"); +diff -Naur linux-3.8.4/drivers/hid/Kconfig linux-3.8.4.patch/drivers/hid/Kconfig +--- linux-3.8.4/drivers/hid/Kconfig 2013-03-20 21:11:19.000000000 +0100 ++++ linux-3.8.4.patch/drivers/hid/Kconfig 2013-03-26 20:11:51.443654394 +0100 +@@ -596,6 +596,12 @@ + ---help--- + Support for Speedlink Vicious and Divine Cezanne mouse. + ++config HID_SPINELPLUS ++ tristate "Spinel Plus remote control" ++ depends on USB_HID ++ ---help--- ++ Say Y here if you have a Spinel Plus (0471:206c/20cc/0613) remote ++ + config HID_SUNPLUS + tristate "Sunplus wireless desktop" + depends on USB_HID +diff -Naur linux-3.8.4/drivers/hid/Makefile linux-3.8.4.patch/drivers/hid/Makefile +--- linux-3.8.4/drivers/hid/Makefile 2013-03-20 21:11:19.000000000 +0100 ++++ linux-3.8.4.patch/drivers/hid/Makefile 2013-03-26 20:11:51.443654394 +0100 +@@ -101,6 +101,7 @@ + obj-$(CONFIG_HID_SMARTJOYPLUS) += hid-sjoy.o + obj-$(CONFIG_HID_SONY) += hid-sony.o + obj-$(CONFIG_HID_SPEEDLINK) += hid-speedlink.o ++obj-$(CONFIG_HID_SPINELPLUS) += hid-spinelplus.o + obj-$(CONFIG_HID_SUNPLUS) += hid-sunplus.o + obj-$(CONFIG_HID_GREENASIA) += hid-gaff.o + obj-$(CONFIG_HID_THRUSTMASTER) += hid-tmff.o diff --git a/packages/linux/patches/3.8.4/linux-059-remove_some_xpad_pids-0.2.patch b/packages/linux/patches/3.8.4/linux-059-remove_some_xpad_pids-0.2.patch new file mode 100644 index 0000000000..4a6d1c7a08 --- /dev/null +++ b/packages/linux/patches/3.8.4/linux-059-remove_some_xpad_pids-0.2.patch @@ -0,0 +1,11 @@ +diff -Naur linux-3.8.4/drivers/input/joystick/xpad.c linux-3.8.4.patch/drivers/input/joystick/xpad.c +--- linux-3.8.4/drivers/input/joystick/xpad.c 2013-03-20 21:11:19.000000000 +0100 ++++ linux-3.8.4.patch/drivers/input/joystick/xpad.c 2013-03-26 20:24:29.273978355 +0100 +@@ -174,7 +174,6 @@ + { 0x1bad, 0xf901, "Gamestop Xbox 360 Controller", 0, XTYPE_XBOX360 }, + { 0x1bad, 0xf903, "Tron Xbox 360 controller", 0, XTYPE_XBOX360 }, + { 0x24c6, 0x5300, "PowerA MINI PROEX Controller", 0, XTYPE_XBOX360 }, +- { 0xffff, 0xffff, "Chinese-made Xbox Controller", 0, XTYPE_XBOX }, + { 0x0000, 0x0000, "Generic X-Box pad", 0, XTYPE_UNKNOWN } + }; + From f01ab13b34d0175f35c6c927e98855019563c635 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 21:35:05 +0200 Subject: [PATCH 081/104] dvbhdhomerun: add linux-3.8.4 compat patch --- .../patches/dvbhdhomerun-linux-3.8.4.patch | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 packages/linux-drivers/dvbhdhomerun/patches/dvbhdhomerun-linux-3.8.4.patch diff --git a/packages/linux-drivers/dvbhdhomerun/patches/dvbhdhomerun-linux-3.8.4.patch b/packages/linux-drivers/dvbhdhomerun/patches/dvbhdhomerun-linux-3.8.4.patch new file mode 100644 index 0000000000..ccde5f0e40 --- /dev/null +++ b/packages/linux-drivers/dvbhdhomerun/patches/dvbhdhomerun-linux-3.8.4.patch @@ -0,0 +1,22 @@ +diff --git a/kernel/dvb_hdhomerun_init.c b/kernel/dvb_hdhomerun_init.c +index d02a322..bd97d5e 100644 +--- a/kernel/dvb_hdhomerun_init.c ++++ b/kernel/dvb_hdhomerun_init.c +@@ -143,7 +143,7 @@ static int dvb_hdhomerun_stop_feed(struct dvb_demux_feed *feed) + return ret; + } + +-static int __devinit dvb_hdhomerun_register(struct dvb_hdhomerun *hdhomerun) ++static int dvb_hdhomerun_register(struct dvb_hdhomerun *hdhomerun) + { + struct dvb_adapter *dvb_adapter; + struct dvb_demux *dvbdemux; +@@ -284,7 +284,7 @@ static void dvb_hdhomerun_unregister(struct dvb_hdhomerun *hdhomerun) + } + + +-static int __devinit dvb_hdhomerun_probe(struct platform_device *plat_dev) ++static int dvb_hdhomerun_probe(struct platform_device *plat_dev) + { + int ret; + struct dvb_hdhomerun *hdhomerun; From c2aff396e6691a363f6f23c38a5ae455cac14174 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Tue, 26 Mar 2013 22:03:45 +0200 Subject: [PATCH 082/104] linux: sync configs --- projects/ARCTIC_MC/linux/linux.x86_64.conf | 1 + projects/ATV/linux/linux.i386.conf | 1 + projects/Fusion/linux/linux.i386.conf | 1 + projects/Fusion/linux/linux.x86_64.conf | 1 + projects/Generic/linux/linux.i386.conf | 1 + projects/Generic_OSS/linux/linux.i386.conf | 1 + projects/ION/linux/linux.i386.conf | 1 + projects/ION/linux/linux.x86_64.conf | 1 + projects/Intel/linux/linux.i386.conf | 1 + projects/Intel/linux/linux.x86_64.conf | 1 + projects/Ultra/linux/linux.x86_64.conf | 1 + projects/Virtual/linux/linux.i386.conf | 1 + projects/Virtual/linux/linux.x86_64.conf | 1 + 13 files changed, 13 insertions(+) diff --git a/projects/ARCTIC_MC/linux/linux.x86_64.conf b/projects/ARCTIC_MC/linux/linux.x86_64.conf index 014bd40b07..ca0ac2ff73 100644 --- a/projects/ARCTIC_MC/linux/linux.x86_64.conf +++ b/projects/ARCTIC_MC/linux/linux.x86_64.conf @@ -2434,6 +2434,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/ATV/linux/linux.i386.conf b/projects/ATV/linux/linux.i386.conf index b14c315a2b..75905dbf0c 100644 --- a/projects/ATV/linux/linux.i386.conf +++ b/projects/ATV/linux/linux.i386.conf @@ -2374,6 +2374,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Fusion/linux/linux.i386.conf b/projects/Fusion/linux/linux.i386.conf index 04ca909dda..f293c97f5a 100644 --- a/projects/Fusion/linux/linux.i386.conf +++ b/projects/Fusion/linux/linux.i386.conf @@ -2681,6 +2681,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Fusion/linux/linux.x86_64.conf b/projects/Fusion/linux/linux.x86_64.conf index a173a8efcd..f86e564e03 100644 --- a/projects/Fusion/linux/linux.x86_64.conf +++ b/projects/Fusion/linux/linux.x86_64.conf @@ -2628,6 +2628,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Generic/linux/linux.i386.conf b/projects/Generic/linux/linux.i386.conf index 4f13619217..b44ced7699 100644 --- a/projects/Generic/linux/linux.i386.conf +++ b/projects/Generic/linux/linux.i386.conf @@ -2804,6 +2804,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Generic_OSS/linux/linux.i386.conf b/projects/Generic_OSS/linux/linux.i386.conf index e849c1e75d..4b8936f376 100644 --- a/projects/Generic_OSS/linux/linux.i386.conf +++ b/projects/Generic_OSS/linux/linux.i386.conf @@ -2807,6 +2807,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index d534054b32..ba3578a677 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -2686,6 +2686,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/ION/linux/linux.x86_64.conf b/projects/ION/linux/linux.x86_64.conf index 2dff04edad..f04b0ad27a 100644 --- a/projects/ION/linux/linux.x86_64.conf +++ b/projects/ION/linux/linux.x86_64.conf @@ -2615,6 +2615,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Intel/linux/linux.i386.conf b/projects/Intel/linux/linux.i386.conf index a09944a939..752e15c6dd 100644 --- a/projects/Intel/linux/linux.i386.conf +++ b/projects/Intel/linux/linux.i386.conf @@ -2746,6 +2746,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Intel/linux/linux.x86_64.conf b/projects/Intel/linux/linux.x86_64.conf index b00bde33ee..7440befc33 100644 --- a/projects/Intel/linux/linux.x86_64.conf +++ b/projects/Intel/linux/linux.x86_64.conf @@ -2676,6 +2676,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Ultra/linux/linux.x86_64.conf b/projects/Ultra/linux/linux.x86_64.conf index 10b1adae87..156b5cb0c8 100644 --- a/projects/Ultra/linux/linux.x86_64.conf +++ b/projects/Ultra/linux/linux.x86_64.conf @@ -2433,6 +2433,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Virtual/linux/linux.i386.conf b/projects/Virtual/linux/linux.i386.conf index 7166659b28..5411d7d8f5 100644 --- a/projects/Virtual/linux/linux.i386.conf +++ b/projects/Virtual/linux/linux.i386.conf @@ -2751,6 +2751,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set diff --git a/projects/Virtual/linux/linux.x86_64.conf b/projects/Virtual/linux/linux.x86_64.conf index 963d605d08..a30d91621a 100644 --- a/projects/Virtual/linux/linux.x86_64.conf +++ b/projects/Virtual/linux/linux.x86_64.conf @@ -2680,6 +2680,7 @@ CONFIG_HID_PS3REMOTE=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y # CONFIG_HID_SPEEDLINK is not set +CONFIG_HID_SPINELPLUS=y CONFIG_HID_SUNPLUS=y # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set From 01c7f6d41c7f7b9454011116d4cee6a0b74f974d Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 26 Mar 2013 21:16:01 +0100 Subject: [PATCH 083/104] RTL8192CU: update kernel patch to build with kernel 3.8 Signed-off-by: Stephan Raue --- ...tch => RTL8192CU-use_kthread_run_v2.patch} | 48 ++++++++++++++----- 1 file changed, 36 insertions(+), 12 deletions(-) rename packages/linux-drivers/RTL8192CU/patches/{RTL8192CU-use_kthread_run.patch => RTL8192CU-use_kthread_run_v2.patch} (62%) diff --git a/packages/linux-drivers/RTL8192CU/patches/RTL8192CU-use_kthread_run.patch b/packages/linux-drivers/RTL8192CU/patches/RTL8192CU-use_kthread_run_v2.patch similarity index 62% rename from packages/linux-drivers/RTL8192CU/patches/RTL8192CU-use_kthread_run.patch rename to packages/linux-drivers/RTL8192CU/patches/RTL8192CU-use_kthread_run_v2.patch index a40a21421a..7a246b86b1 100644 --- a/packages/linux-drivers/RTL8192CU/patches/RTL8192CU-use_kthread_run.patch +++ b/packages/linux-drivers/RTL8192CU/patches/RTL8192CU-use_kthread_run_v2.patch @@ -1,6 +1,6 @@ -diff -ur _/core/rtw_mp.c rt8192cu-master/core/rtw_mp.c ---- _/core/rtw_mp.c 2012-07-09 10:32:18.000000000 +0200 -+++ rt8192cu-master/core/rtw_mp.c 2012-12-21 03:13:45.358137142 +0100 +diff -ruN a/core/rtw_mp.c b/core/rtw_mp.c +--- a/core/rtw_mp.c 2012-07-30 12:51:05.000000000 +0000 ++++ b/core/rtw_mp.c 2013-03-17 19:00:28.393782000 +0000 @@ -1140,8 +1140,7 @@ _rtw_memset(ptr, payload, pkt_end - ptr); @@ -11,9 +11,9 @@ diff -ur _/core/rtw_mp.c rt8192cu-master/core/rtw_mp.c DBG_871X("Create PktTx Thread Fail !!!!!\n"); } -diff -ur _/include/osdep_service.h rt8192cu-master/include/osdep_service.h ---- _/include/osdep_service.h 2012-07-09 10:32:18.000000000 +0200 -+++ rt8192cu-master/include/osdep_service.h 2012-12-21 03:09:05.314123589 +0100 +diff -ruN a/include/osdep_service.h b/include/osdep_service.h +--- a/include/osdep_service.h 2012-07-30 12:51:05.000000000 +0000 ++++ b/include/osdep_service.h 2013-03-17 17:37:39.105483734 +0000 @@ -100,6 +100,9 @@ #include #endif @@ -38,6 +38,15 @@ diff -ur _/include/osdep_service.h rt8192cu-master/include/osdep_service.h typedef int thread_return; typedef void* thread_context; +@@ -572,7 +579,7 @@ + #ifdef PLATFORM_LINUX + //struct net_device *pnetdev = (struct net_device *)context; + //daemonize("%s", pnetdev->name); +- daemonize("%s", "RTKTHREAD"); ++ //daemonize("%s", "RTKTHREAD"); + allow_signal(SIGTERM); + #endif + } @@ -827,4 +834,8 @@ #endif @@ -47,9 +56,24 @@ diff -ur _/include/osdep_service.h rt8192cu-master/include/osdep_service.h + void *data, const char *name); +#endif -diff -ur _/os_dep/linux/os_intfs.c rt8192cu-master/os_dep/linux/os_intfs.c ---- _/os_dep/linux/os_intfs.c 2012-12-21 03:17:25.618147802 +0100 -+++ rt8192cu-master/os_dep/linux/os_intfs.c 2012-12-21 03:14:14.554138555 +0100 +diff -ruN a/include/rtw_recv.h b/include/rtw_recv.h +--- a/include/rtw_recv.h 2012-07-30 12:51:05.000000000 +0000 ++++ b/include/rtw_recv.h 2013-03-17 17:35:36.136873966 +0000 +@@ -623,8 +623,9 @@ + //from any given member of recv_frame. + // rxmem indicates the any member/address in recv_frame + +- return (union recv_frame*)(((uint)rxmem>>RXFRAME_ALIGN) <>RXFRAME_ALIGN) <> RXFRAME_ALIGN) << RXFRAME_ALIGN); ++ return (union recv_frame*)(((ulong)rxmem>>RXFRAME_ALIGN) < Date: Tue, 26 Mar 2013 21:54:30 +0100 Subject: [PATCH 084/104] projects/*/linux: add support for more Aetheros cards Signed-off-by: Stephan Raue --- projects/ARCTIC_MC/linux/linux.x86_64.conf | 21 +++++++++++++++------ projects/ATV/linux/linux.i386.conf | 2 +- projects/Fusion/linux/linux.i386.conf | 2 +- projects/Fusion/linux/linux.x86_64.conf | 2 +- projects/Generic/linux/linux.i386.conf | 2 +- projects/Generic_OSS/linux/linux.i386.conf | 2 +- projects/ION/linux/linux.i386.conf | 2 +- projects/ION/linux/linux.x86_64.conf | 2 +- projects/Intel/linux/linux.i386.conf | 2 +- projects/Intel/linux/linux.x86_64.conf | 2 +- projects/Ultra/linux/linux.x86_64.conf | 2 +- projects/Virtual/linux/linux.i386.conf | 2 +- projects/Virtual/linux/linux.x86_64.conf | 2 +- 13 files changed, 27 insertions(+), 18 deletions(-) diff --git a/projects/ARCTIC_MC/linux/linux.x86_64.conf b/projects/ARCTIC_MC/linux/linux.x86_64.conf index ca0ac2ff73..7d16bb0a50 100644 --- a/projects/ARCTIC_MC/linux/linux.x86_64.conf +++ b/projects/ARCTIC_MC/linux/linux.x86_64.conf @@ -359,6 +359,7 @@ CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CLEANCACHE=y +# CONFIG_FRONTSWAP is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y @@ -397,6 +398,7 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y +# CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set @@ -1231,7 +1233,19 @@ CONFIG_RTL8187_LEDS=y # CONFIG_ADM8211 is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_MWL8K is not set -# CONFIG_ATH_CARDS is not set +CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +CONFIG_CARL9170=m +CONFIG_CARL9170_LEDS=y +CONFIG_CARL9170_WPC=y +# CONFIG_ATH6KL is not set +CONFIG_AR5523=m +# CONFIG_WIL6210 is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMFMAC is not set @@ -1961,10 +1975,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # common driver options # CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2084,7 +2094,6 @@ CONFIG_DVB_TUNER_ITD1000=m CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_CX24116=m -CONFIG_DVB_M88DS3103=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_TDA10071=m diff --git a/projects/ATV/linux/linux.i386.conf b/projects/ATV/linux/linux.i386.conf index 75905dbf0c..efb523afcd 100644 --- a/projects/ATV/linux/linux.i386.conf +++ b/projects/ATV/linux/linux.i386.conf @@ -1285,7 +1285,7 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set diff --git a/projects/Fusion/linux/linux.i386.conf b/projects/Fusion/linux/linux.i386.conf index f293c97f5a..30d981e05e 100644 --- a/projects/Fusion/linux/linux.i386.conf +++ b/projects/Fusion/linux/linux.i386.conf @@ -1321,7 +1321,7 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Fusion/linux/linux.x86_64.conf b/projects/Fusion/linux/linux.x86_64.conf index f86e564e03..e6ce4557e7 100644 --- a/projects/Fusion/linux/linux.x86_64.conf +++ b/projects/Fusion/linux/linux.x86_64.conf @@ -1283,7 +1283,7 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Generic/linux/linux.i386.conf b/projects/Generic/linux/linux.i386.conf index b44ced7699..b246263bb4 100644 --- a/projects/Generic/linux/linux.i386.conf +++ b/projects/Generic/linux/linux.i386.conf @@ -1381,7 +1381,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Generic_OSS/linux/linux.i386.conf b/projects/Generic_OSS/linux/linux.i386.conf index 4b8936f376..325931b68a 100644 --- a/projects/Generic_OSS/linux/linux.i386.conf +++ b/projects/Generic_OSS/linux/linux.i386.conf @@ -1379,7 +1379,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index ba3578a677..e6440e0061 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -1333,7 +1333,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/ION/linux/linux.x86_64.conf b/projects/ION/linux/linux.x86_64.conf index f04b0ad27a..ff520056b6 100644 --- a/projects/ION/linux/linux.x86_64.conf +++ b/projects/ION/linux/linux.x86_64.conf @@ -1278,7 +1278,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Intel/linux/linux.i386.conf b/projects/Intel/linux/linux.i386.conf index 752e15c6dd..d99d376bf5 100644 --- a/projects/Intel/linux/linux.i386.conf +++ b/projects/Intel/linux/linux.i386.conf @@ -1343,7 +1343,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Intel/linux/linux.x86_64.conf b/projects/Intel/linux/linux.x86_64.conf index 7440befc33..681c013e7e 100644 --- a/projects/Intel/linux/linux.x86_64.conf +++ b/projects/Intel/linux/linux.x86_64.conf @@ -1289,7 +1289,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Ultra/linux/linux.x86_64.conf b/projects/Ultra/linux/linux.x86_64.conf index 156b5cb0c8..59058a8bdc 100644 --- a/projects/Ultra/linux/linux.x86_64.conf +++ b/projects/Ultra/linux/linux.x86_64.conf @@ -1247,7 +1247,7 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y # CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set diff --git a/projects/Virtual/linux/linux.i386.conf b/projects/Virtual/linux/linux.i386.conf index 5411d7d8f5..c99eae2921 100644 --- a/projects/Virtual/linux/linux.i386.conf +++ b/projects/Virtual/linux/linux.i386.conf @@ -1345,7 +1345,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y diff --git a/projects/Virtual/linux/linux.x86_64.conf b/projects/Virtual/linux/linux.x86_64.conf index a30d91621a..5e62b8b376 100644 --- a/projects/Virtual/linux/linux.x86_64.conf +++ b/projects/Virtual/linux/linux.x86_64.conf @@ -1290,7 +1290,7 @@ CONFIG_ATH6KL=m # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set -# CONFIG_AR5523 is not set +CONFIG_AR5523=m # CONFIG_WIL6210 is not set CONFIG_B43=m CONFIG_B43_SSB=y From 28ff7abd081bae74b120cff7d8cd50e5b8d03c7a Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Tue, 26 Mar 2013 22:24:14 +0100 Subject: [PATCH 085/104] bcm_sta: add patch to support kernel 3.8 Signed-off-by: Stephan Raue --- .../bcm_sta-005-linux-3.8-support.patch | 158 ++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 packages/linux-drivers/bcm_sta/patches/bcm_sta-005-linux-3.8-support.patch diff --git a/packages/linux-drivers/bcm_sta/patches/bcm_sta-005-linux-3.8-support.patch b/packages/linux-drivers/bcm_sta/patches/bcm_sta-005-linux-3.8-support.patch new file mode 100644 index 0000000000..2f8caf7e8a --- /dev/null +++ b/packages/linux-drivers/bcm_sta/patches/bcm_sta-005-linux-3.8-support.patch @@ -0,0 +1,158 @@ +From 00da4982e9175921cfb26d1377bf49ece3bb41cb Mon Sep 17 00:00:00 2001 +From: Stefan Saraev +Date: Tue, 26 Mar 2013 23:10:17 +0200 +Subject: [PATCH] linux 3.8 support + +--- + x86-32/src/include/bcmutils.h | 5 +++++ + x86-32/src/wl/sys/wl_cfg80211.c | 25 ++++++++++++++++++++++++- + x86-64/src/include/bcmutils.h | 4 ++++ + x86-64/src/wl/sys/wl_cfg80211.c | 25 ++++++++++++++++++++++++- + 4 files changed, 57 insertions(+), 2 deletions(-) + +diff --git a/x86-32/src/include/bcmutils.h b/x86-32/src/include/bcmutils.h +index fa6df04..9a8cab4 100644 +--- a/x86-32/src/include/bcmutils.h ++++ b/x86-32/src/include/bcmutils.h +@@ -555,7 +555,12 @@ extern void printbig(char *buf); + extern void prhex(const char *msg, uchar *buf, uint len); + + extern bcm_tlv_t *BCMROMFN(bcm_next_tlv)(bcm_tlv_t *elt, int *buflen); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(void *buf, int buflen, uint key); ++#else ++extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(const void *buf, int buflen, uint key); ++#endif ++ + extern bcm_tlv_t *BCMROMFN(bcm_parse_ordered_tlvs)(void *buf, int buflen, uint key); + + extern const char *bcmerrorstr(int bcmerror); +diff --git a/x86-32/src/wl/sys/wl_cfg80211.c b/x86-32/src/wl/sys/wl_cfg80211.c +index 09d04ed..698b004 100644 +--- a/x86-32/src/wl/sys/wl_cfg80211.c ++++ b/x86-32/src/wl/sys/wl_cfg80211.c +@@ -744,7 +744,11 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, + else + memset(&join_params.params.bssid, 0, ETHER_ADDR_LEN); + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + wl_ch_to_chanspec(params->channel, &join_params, &join_params_size); ++#else ++ wl_ch_to_chanspec(params->chandef.chan, &join_params, &join_params_size); ++#endif + + err = wl_dev_ioctl(dev, WLC_SET_SSID, &join_params, join_params_size); + if (err) { +@@ -2047,9 +2051,14 @@ static s32 wl_update_bss_info(struct wl_priv *wl) + struct bcm_tlv *tim; + u16 beacon_interval; + s32 dtim_period; ++ s32 err = 0; + size_t ie_len; ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + u8 *ie; +- s32 err = 0; ++#else ++ const u8 *ie; ++ const struct cfg80211_bss_ies *ies; ++#endif + + ssid = &wl->profile->ssid; + bss = cfg80211_get_bss(wl_to_wiphy(wl), NULL, (s8 *)&wl->bssid, +@@ -2079,8 +2088,22 @@ static s32 wl_update_bss_info(struct wl_priv *wl) + beacon_interval = cpu_to_le16(bi->beacon_period); + } else { + WL_DBG(("Found the AP in the list - BSSID %pM\n", bss->bssid)); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + ie = bss->information_elements; + ie_len = bss->len_information_elements; ++#else ++ rcu_read_lock(); ++ ies = (const struct cfg80211_bss_ies*)rcu_dereference(bss->ies); ++ if (!ies) { ++ /* This should never happen */ ++ rcu_read_unlock(); ++ err = -EIO; ++ goto update_bss_info_out; ++ } ++ ie = ies->data; ++ ie_len = (size_t)(ies->len); ++ rcu_read_unlock(); ++#endif + beacon_interval = bss->beacon_interval; + cfg80211_put_bss(bss); + } +diff --git a/x86-64/src/include/bcmutils.h b/x86-64/src/include/bcmutils.h +index fa6df04..1200bf0 100644 +--- a/x86-64/src/include/bcmutils.h ++++ b/x86-64/src/include/bcmutils.h +@@ -555,7 +555,11 @@ extern void printbig(char *buf); + extern void prhex(const char *msg, uchar *buf, uint len); + + extern bcm_tlv_t *BCMROMFN(bcm_next_tlv)(bcm_tlv_t *elt, int *buflen); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(void *buf, int buflen, uint key); ++#else ++extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(const void *buf, int buflen, uint key); ++#endif + extern bcm_tlv_t *BCMROMFN(bcm_parse_ordered_tlvs)(void *buf, int buflen, uint key); + + extern const char *bcmerrorstr(int bcmerror); +diff --git a/x86-64/src/wl/sys/wl_cfg80211.c b/x86-64/src/wl/sys/wl_cfg80211.c +index 94aac25..244243f 100644 +--- a/x86-64/src/wl/sys/wl_cfg80211.c ++++ b/x86-64/src/wl/sys/wl_cfg80211.c +@@ -744,7 +744,11 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, + else + memset(&join_params.params.bssid, 0, ETHER_ADDR_LEN); + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + wl_ch_to_chanspec(params->channel, &join_params, &join_params_size); ++#else ++ wl_ch_to_chanspec(params->chandef.chan, &join_params, &join_params_size); ++#endif + + err = wl_dev_ioctl(dev, WLC_SET_SSID, &join_params, join_params_size); + if (err) { +@@ -2047,9 +2051,14 @@ static s32 wl_update_bss_info(struct wl_priv *wl) + struct bcm_tlv *tim; + u16 beacon_interval; + s32 dtim_period; ++ s32 err = 0; + size_t ie_len; ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + u8 *ie; +- s32 err = 0; ++#else ++ const u8 *ie; ++ const struct cfg80211_bss_ies *ies; ++#endif + + ssid = &wl->profile->ssid; + bss = cfg80211_get_bss(wl_to_wiphy(wl), NULL, (s8 *)&wl->bssid, +@@ -2079,8 +2088,22 @@ static s32 wl_update_bss_info(struct wl_priv *wl) + beacon_interval = cpu_to_le16(bi->beacon_period); + } else { + WL_DBG(("Found the AP in the list - BSSID %pM\n", bss->bssid)); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + ie = bss->information_elements; + ie_len = bss->len_information_elements; ++#else ++ rcu_read_lock(); ++ ies = (const struct cfg80211_bss_ies*)rcu_dereference(bss->ies); ++ if (!ies) { ++ /* This should never happen */ ++ rcu_read_unlock(); ++ err = -EIO; ++ goto update_bss_info_out; ++ } ++ ie = ies->data; ++ ie_len = (size_t)(ies->len); ++ rcu_read_unlock(); ++#endif + beacon_interval = bss->beacon_interval; + cfg80211_put_bss(bss); + } +-- +1.7.2.5 + From ec111e33a5c5a6612d259acae3612a618c577b24 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 27 Mar 2013 03:07:47 +0100 Subject: [PATCH 086/104] crystalhd: add kernel 3.8 patch Signed-off-by: Stephan Raue --- .../patches/crystalhd-kernel-3.8.patch | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 packages/multimedia/crystalhd/patches/crystalhd-kernel-3.8.patch diff --git a/packages/multimedia/crystalhd/patches/crystalhd-kernel-3.8.patch b/packages/multimedia/crystalhd/patches/crystalhd-kernel-3.8.patch new file mode 100644 index 0000000000..639d81a3cd --- /dev/null +++ b/packages/multimedia/crystalhd/patches/crystalhd-kernel-3.8.patch @@ -0,0 +1,87 @@ +diff -Naur crystalhd-3cb6786/driver/linux/crystalhd_cmds.c crystalhd-3cb6786.patch/driver/linux/crystalhd_cmds.c +--- crystalhd-3cb6786/driver/linux/crystalhd_cmds.c 2012-12-08 03:31:38.000000000 +0100 ++++ crystalhd-3cb6786.patch/driver/linux/crystalhd_cmds.c 2013-03-27 01:52:06.093400949 +0100 +@@ -1093,7 +1093,7 @@ + * + * Called at the time of driver load. + */ +-BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, ++BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, + struct crystalhd_adp *adp) + { + struct device *dev = &adp->pdev->dev; +@@ -1136,7 +1136,7 @@ + * + * Called at the time of driver un-load. + */ +-BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) ++BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) + { + dev_dbg(chddev(), "Deleting Command context..\n"); + +diff -Naur crystalhd-3cb6786/driver/linux/crystalhd_lnx.c crystalhd-3cb6786.patch/driver/linux/crystalhd_lnx.c +--- crystalhd-3cb6786/driver/linux/crystalhd_lnx.c 2012-12-08 03:31:38.000000000 +0100 ++++ crystalhd-3cb6786.patch/driver/linux/crystalhd_lnx.c 2013-03-27 01:51:47.768460170 +0100 +@@ -431,7 +431,7 @@ + .llseek = noop_llseek, + }; + +-static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) ++static int chd_dec_init_chdev(struct crystalhd_adp *adp) + { + struct device *xdev = &adp->pdev->dev; + struct device *dev; +@@ -498,7 +498,7 @@ + return rc; + } + +-static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp) ++static void chd_dec_release_chdev(struct crystalhd_adp *adp) + { + crystalhd_ioctl_data *temp = NULL; + if (!adp) +@@ -523,7 +523,7 @@ + /*crystalhd_delete_elem_pool(adp); */ + } + +-static int __devinit chd_pci_reserve_mem(struct crystalhd_adp *pinfo) ++static int chd_pci_reserve_mem(struct crystalhd_adp *pinfo) + { + struct device *dev = &pinfo->pdev->dev; + int rc; +@@ -582,7 +582,7 @@ + return 0; + } + +-static void __devexit chd_pci_release_mem(struct crystalhd_adp *pinfo) ++static void chd_pci_release_mem(struct crystalhd_adp *pinfo) + { + if (!pinfo) + return; +@@ -597,7 +597,7 @@ + } + + +-static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) ++static void chd_dec_pci_remove(struct pci_dev *pdev) + { + struct crystalhd_adp *pinfo; + BC_STATUS sts = BC_STS_SUCCESS; +@@ -625,7 +625,7 @@ + g_adp_info = NULL; + } + +-static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, ++static int chd_dec_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *entry) + { + struct device *dev = &pdev->dev; +@@ -815,7 +815,7 @@ + static struct pci_driver bc_chd_driver = { + .name = "crystalhd", + .probe = chd_dec_pci_probe, +- .remove = __devexit_p(chd_dec_pci_remove), ++ .remove = chd_dec_pci_remove, + .id_table = chd_dec_pci_id_table, + .suspend = chd_dec_pci_suspend, + .resume = chd_dec_pci_resume From bac68f04212373649e2b4ac12e74bf3d7e262c2d Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 27 Mar 2013 05:24:39 +0100 Subject: [PATCH 087/104] busybox: add applet 'mkfs.vfat' Signed-off-by: Stephan Raue --- packages/sysutils/busybox/config/busybox.conf | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/packages/sysutils/busybox/config/busybox.conf b/packages/sysutils/busybox/config/busybox.conf index 469a920e48..f651dc60d6 100644 --- a/packages/sysutils/busybox/config/busybox.conf +++ b/packages/sysutils/busybox/config/busybox.conf @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Busybox version: 1.21.0 -# Thu Feb 21 00:46:53 2013 +# Wed Mar 27 04:33:31 2013 # CONFIG_HAVE_DOT_CONFIG=y @@ -559,7 +559,7 @@ CONFIG_FLOCK=y # CONFIG_MKFS_MINIX is not set # CONFIG_FEATURE_MINIX2 is not set # CONFIG_MKFS_REISER is not set -# CONFIG_MKFS_VFAT is not set +CONFIG_MKFS_VFAT=y CONFIG_GETOPT=y CONFIG_FEATURE_GETOPT_LONG=y # CONFIG_HEXDUMP is not set From fd8ba93bf44c2e4a8fab2be5acc822bafd8f7560 Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Wed, 27 Mar 2013 05:25:02 +0100 Subject: [PATCH 088/104] RTL8192CU: disable powersave mode Signed-off-by: Stephan Raue --- packages/linux-drivers/RTL8192CU/build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/linux-drivers/RTL8192CU/build b/packages/linux-drivers/RTL8192CU/build index 359f51bad6..5068993796 100755 --- a/packages/linux-drivers/RTL8192CU/build +++ b/packages/linux-drivers/RTL8192CU/build @@ -23,4 +23,4 @@ . config/options $1 cd $PKG_BUILD - LDFLAGS="" make V=1 ARCH=$TARGET_ARCH KSRC=$(kernel_path) CROSS_COMPILE=$TARGET_PREFIX + LDFLAGS="" make V=1 ARCH=$TARGET_ARCH KSRC=$(kernel_path) CROSS_COMPILE=$TARGET_PREFIX CONFIG_POWER_SAVING=n From 4a49e524455e7287fa12c0e198741b708d991c7f Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 27 Mar 2013 12:51:34 +0200 Subject: [PATCH 089/104] xbmc-addon-settings: update to xbmc-addon-settings-0.1.4 --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 1b4cf85f49..47e9da9a6f 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.1.3" +PKG_VERSION="0.1.4" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From 086467a33bc2205a6ae9a41e787edb3cdabfaa0e Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Wed, 27 Mar 2013 19:02:45 +0200 Subject: [PATCH 090/104] linux: re-add dvbsky patch, need testing --- .../patches/3.8.4/linux-210-dvbsky.patch | 5997 +++++++++++++++++ 1 file changed, 5997 insertions(+) create mode 100644 packages/linux/patches/3.8.4/linux-210-dvbsky.patch diff --git a/packages/linux/patches/3.8.4/linux-210-dvbsky.patch b/packages/linux/patches/3.8.4/linux-210-dvbsky.patch new file mode 100644 index 0000000000..9e2bdf416b --- /dev/null +++ b/packages/linux/patches/3.8.4/linux-210-dvbsky.patch @@ -0,0 +1,5997 @@ +From 8d189966ad4d494c9630d2b1c41a0ff9ccaa3d0a Mon Sep 17 00:00:00 2001 +From: Stefan Saraev +Date: Tue, 26 Mar 2013 12:52:27 +0200 +Subject: [PATCH] dvbsky + +--- + drivers/media/dvb-frontends/Kconfig | 14 + + drivers/media/dvb-frontends/Makefile | 2 + + drivers/media/dvb-frontends/m88dc2800.c | 2235 ++++++++++++++++++++++++++ + drivers/media/dvb-frontends/m88dc2800.h | 43 + + drivers/media/dvb-frontends/m88ds3103.c | 1710 ++++++++++++++++++++ + drivers/media/dvb-frontends/m88ds3103.h | 53 + + drivers/media/dvb-frontends/m88ds3103_priv.h | 403 +++++ + drivers/media/pci/cx23885/Kconfig | 2 + + drivers/media/pci/cx23885/cimax2.c | 23 +- + drivers/media/pci/cx23885/cimax2.h | 4 +- + drivers/media/pci/cx23885/cx23885-cards.c | 172 ++- + drivers/media/pci/cx23885/cx23885-core.c | 6 + + drivers/media/pci/cx23885/cx23885-dvb.c | 207 ++- + drivers/media/pci/cx23885/cx23885-f300.c | 55 + + drivers/media/pci/cx23885/cx23885-f300.h | 6 + + drivers/media/pci/cx23885/cx23885-input.c | 21 + + drivers/media/pci/cx23885/cx23885.h | 9 +- + drivers/media/pci/cx88/Kconfig | 1 + + drivers/media/pci/cx88/cx88-cards.c | 22 + + drivers/media/pci/cx88/cx88-dvb.c | 85 + + drivers/media/pci/cx88/cx88-input.c | 4 + + drivers/media/pci/cx88/cx88.h | 3 +- + drivers/media/rc/keymaps/Makefile | 1 + + drivers/media/rc/keymaps/rc-dvbsky.c | 78 + + drivers/media/usb/dvb-usb/Kconfig | 1 + + drivers/media/usb/dvb-usb/dw2102.c | 280 ++++ + include/media/rc-map.h | 1 + + 27 files changed, 5384 insertions(+), 57 deletions(-) + create mode 100644 drivers/media/dvb-frontends/m88dc2800.c + create mode 100644 drivers/media/dvb-frontends/m88dc2800.h + create mode 100644 drivers/media/dvb-frontends/m88ds3103.c + create mode 100644 drivers/media/dvb-frontends/m88ds3103.h + create mode 100644 drivers/media/dvb-frontends/m88ds3103_priv.h + create mode 100644 drivers/media/rc/keymaps/rc-dvbsky.c + +diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig +index e2483f9..743b4d0 100644 +--- a/drivers/media/dvb-frontends/Kconfig ++++ b/drivers/media/dvb-frontends/Kconfig +@@ -218,6 +218,20 @@ config DVB_CX24116 + help + A DVB-S/S2 tuner module. Say Y when you want to support this frontend. + ++config DVB_M88DS3103 ++ tristate "Montage M88DS3103 based" ++ depends on DVB_CORE && I2C ++ default m if !MEDIA_SUBDRV_AUTOSELECT ++ help ++ A DVB-S/S2 tuner module. Say Y when you want to support this frontend. ++ ++config DVB_M88DC2800 ++ tristate "Montage M88DC2800 based" ++ depends on DVB_CORE && I2C ++ default m if !MEDIA_SUBDRV_AUTOSELECT ++ help ++ A DVB-C tuner module. Say Y when you want to support this frontend. ++ + config DVB_SI21XX + tristate "Silicon Labs SI21XX based" + depends on DVB_CORE && I2C +diff --git a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile +index b8820aa..8528900 100644 +--- a/drivers/media/dvb-frontends/Makefile ++++ b/drivers/media/dvb-frontends/Makefile +@@ -104,4 +104,6 @@ obj-$(CONFIG_DVB_RTL2830) += rtl2830.o + obj-$(CONFIG_DVB_RTL2832) += rtl2832.o + obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o + obj-$(CONFIG_DVB_AF9033) += af9033.o ++obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o ++obj-$(CONFIG_DVB_M88DC2800) += m88dc2800.o + +diff --git a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontends/m88dc2800.c +new file mode 100644 +index 0000000..f48a356 +--- /dev/null ++++ b/drivers/media/dvb-frontends/m88dc2800.c +@@ -0,0 +1,2235 @@ ++/* ++ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage ++ ++ Copyright (C) 2012 Max nibble ++ Copyright (C) 2011 Montage Technology ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "dvb_frontend.h" ++#include "m88dc2800.h" ++ ++struct m88dc2800_state { ++ struct i2c_adapter* i2c; ++ const struct m88dc2800_config *config; ++ struct dvb_frontend frontend; ++ u32 freq; ++ u32 ber; ++ u32 sym; ++ u16 qam; ++ u8 inverted; ++ u32 xtal; ++ /*tuner state*/ ++ u8 tuner_init_OK; /* Tuner initialize status */ ++ u8 tuner_dev_addr; /* Tuner device address */ ++ u32 tuner_freq; /* RF frequency to be set, unit: KHz */ ++ u16 tuner_qam; /* Reserved */ ++ u16 tuner_mode; ++ u8 tuner_bandwidth; /* Bandwidth of the channel, unit: MHz, 6/7/8 */ ++ u8 tuner_loopthrough; /* Tuner loop through switch, 0/1 */ ++ u32 tuner_crystal; /* Tuner crystal frequency, unit: KHz */ ++ u32 tuner_dac; /* Tuner DAC frequency, unit: KHz */ ++ u16 tuner_mtt; /* Tuner chip version, D1: 0x0d, E0: 0x0e, E1: 0x8e */ ++ u16 tuner_custom_cfg; ++ u32 tuner_version; /* Tuner driver version number */ ++ u32 tuner_time; ++}; ++ ++static int debug; ++module_param(debug, int, 0644); ++MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); ++ ++#define dprintk(args...) \ ++ do { \ ++ if (debug) \ ++ printk(KERN_INFO "m88dc2800: " args); \ ++ } while (0) ++ ++ ++static int m88dc2800_i2c_write(struct m88dc2800_state *state, u8 addr, u8 *p_data, u8 len) ++{ ++ struct i2c_msg msg = { .flags = 0 }; ++ ++ msg.addr = addr; ++ msg.buf = p_data; ++ msg.len = len; ++ ++ return i2c_transfer(state->i2c, &msg, 1); ++} ++ ++static int m88dc2800_i2c_read(struct m88dc2800_state *state, u8 addr, u8 *p_data, u8 len) ++{ ++ struct i2c_msg msg = { .flags = I2C_M_RD }; ++ ++ msg.addr = addr; ++ msg.buf = p_data; ++ msg.len = len; ++ ++ return i2c_transfer(state->i2c, &msg, 1); ++} ++ ++/*demod register operations.*/ ++static int WriteReg(struct m88dc2800_state *state, u8 reg, u8 data) ++{ ++ u8 buf[] = { reg, data }; ++ u8 addr = state->config->demod_address; ++ int err; ++ ++ if (debug > 1) ++ printk("m88dc2800: %s: write reg 0x%02x, value 0x%02x\n", ++ __func__, reg, data); ++ ++ err = m88dc2800_i2c_write(state, addr, buf, 2); ++ ++ if (err != 1) { ++ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x," ++ " value == 0x%02x)\n", __func__, err, reg, data); ++ return -EIO; ++ } ++ return 0; ++} ++ ++static int ReadReg(struct m88dc2800_state *state, u8 reg) ++{ ++ int ret; ++ u8 b0[] = { reg }; ++ u8 b1[] = { 0 }; ++ u8 addr = state->config->demod_address; ++ ++ ret = m88dc2800_i2c_write(state, addr, b0, 1); ++ ++ if (ret != 1) { ++ printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", ++ __func__, reg, ret); ++ return -EIO; ++ } ++ ++ ret = m88dc2800_i2c_read(state, addr, b1, 1); ++ ++ if (debug > 1) ++ printk(KERN_INFO "m88dc2800: read reg 0x%02x, value 0x%02x\n", ++ reg, b1[0]); ++ return b1[0]; ++} ++ ++static int _mt_fe_tn_set_reg(struct m88dc2800_state *state, u8 reg, u8 data) ++{ ++ int ret; ++ u8 buf[2]; ++ u8 addr = state->tuner_dev_addr; ++ ++ buf[1] = ReadReg(state, 0x86); ++ buf[1] |= 0x80; ++ ret = WriteReg(state, 0x86, buf[1]); ++ ++ buf[0] = reg; ++ buf[1] = data; ++ ++ ret = m88dc2800_i2c_write(state, addr, buf, 2); ++ if(ret != 1) ++ return -EIO; ++ return 0; ++} ++ ++static int _mt_fe_tn_get_reg(struct m88dc2800_state *state, u8 reg, u8 *p_data) ++{ ++ int ret; ++ u8 buf[2]; ++ u8 addr = state->tuner_dev_addr; ++ ++ buf[1] = ReadReg(state, 0x86); ++ buf[1] |= 0x80; ++ ret = WriteReg(state, 0x86, buf[1]); ++ ++ buf[0] = reg; ++ ret = m88dc2800_i2c_write(state, addr, buf, 1); ++ ++ msleep(1); ++ ++ buf[1] = ReadReg(state, 0x86); ++ buf[1] |= 0x80; ++ ret = WriteReg(state, 0x86, buf[1]); ++ ++ return m88dc2800_i2c_read(state, addr, p_data, 1); ++} ++ ++/* Tuner operation functions.*/ ++static int _mt_fe_tn_set_RF_front_tc2800(struct m88dc2800_state *state) ++{ ++ u32 freq_KHz = state->tuner_freq; ++ ++ if (state->tuner_mtt == 0xD1) { /* D1 */ ++ if (freq_KHz <= 123000) { ++ if (freq_KHz <= 56000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x00); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x00); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x00); ++ }else if (freq_KHz <= 64000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x10); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x01); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x08); ++ }else if (freq_KHz <= 72000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x20); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x02); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x10); ++ }else if (freq_KHz <= 80000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x30); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x03); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x18); ++ }else if (freq_KHz <= 88000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x40); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x04); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x20); ++ }else if (freq_KHz <= 96000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x50); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x05); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x28); ++ }else if (freq_KHz <= 104000) { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x60); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x06); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x30); ++ }else { ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, 0x70); ++ _mt_fe_tn_set_reg(state, 0x5d, 0x07); ++ _mt_fe_tn_set_reg(state, 0x5e, 0x38); ++ } ++ _mt_fe_tn_set_reg(state, 0x5a, 0x75); ++ _mt_fe_tn_set_reg(state, 0x73, 0x0c); ++ } else { /* if (freq_KHz > 112000) */ ++ _mt_fe_tn_set_reg(state, 0x58, 0x7b); ++ if (freq_KHz <= 304000) { ++ if (freq_KHz <= 136000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x40); ++ }else if (freq_KHz <= 160000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x48); ++ }else if (freq_KHz <= 184000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x50); ++ }else if (freq_KHz <= 208000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x58); ++ }else if (freq_KHz <= 232000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x60); ++ }else if (freq_KHz <= 256000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x68); ++ }else if (freq_KHz <= 280000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x70); ++ }else { /*if (freq_KHz <= 304000)*/ ++ _mt_fe_tn_set_reg(state, 0x5e, 0x78); ++ } ++ if (freq_KHz <= 171000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x08); ++ }else if (freq_KHz <= 211000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0a); ++ }else { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0e); ++ } ++ }else { /* if (freq_KHz > 304000) */ ++ _mt_fe_tn_set_reg(state, 0x5e, 0x88); ++ if (freq_KHz <= 400000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0c); ++ }else if (freq_KHz <= 450000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x09); ++ }else if (freq_KHz <= 550000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0e); ++ }else if (freq_KHz <= 650000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0d); ++ }else { /*if (freq_KHz > 650000) */ ++ _mt_fe_tn_set_reg(state, 0x73, 0x0e); ++ } ++ } ++ } ++ ++ if (freq_KHz > 800000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x24); ++ else if (freq_KHz > 700000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x34); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x44); ++ else if (freq_KHz > 300000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x43); ++ else if (freq_KHz > 220000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 110000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ ++ if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x6a, 0x53); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x6a, 0x57); ++ else ++ _mt_fe_tn_set_reg(state, 0x6a, 0x59); ++ ++ if (freq_KHz < 200000) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x5d); ++ }else if (freq_KHz < 500000) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x7d); ++ }else { ++ _mt_fe_tn_set_reg(state, 0x20, 0xfd); ++ }/* end of 0xD1 */ ++ }else if (state->tuner_mtt == 0xE1) { /* E1 */ ++ if (freq_KHz <= 112000) { /* 123MHz */ ++ if (freq_KHz <= 56000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x01); ++ }else if (freq_KHz <= 64000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x09); ++ }else if (freq_KHz <= 72000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x11); ++ }else if (freq_KHz <= 80000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x19); ++ }else if (freq_KHz <= 88000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x21); ++ }else if (freq_KHz <= 96000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x29); ++ }else if (freq_KHz <= 104000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x31); ++ }else {/* if (freq_KHz <= 112000) */ ++ _mt_fe_tn_set_reg(state, 0x5c, 0x39); ++ } ++ _mt_fe_tn_set_reg(state, 0x5b, 0x30); ++ }else { /* if (freq_KHz > 112000) */ ++ if (freq_KHz <= 304000) { ++ if (freq_KHz <= 136000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x41); ++ }else if (freq_KHz <= 160000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x49); ++ }else if (freq_KHz <= 184000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x51); ++ }else if (freq_KHz <= 208000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x59); ++ }else if (freq_KHz <= 232000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x61); ++ }else if (freq_KHz <= 256000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x69); ++ }else if (freq_KHz <= 280000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x71); ++ }else { /*if (freq_KHz <= 304000)*/ ++ _mt_fe_tn_set_reg(state, 0x5c, 0x79); ++ } ++ ++ if (freq_KHz <= 150000) { ++ _mt_fe_tn_set_reg(state, 0x5b, 0x28); ++ }else if (freq_KHz <= 256000) { ++ _mt_fe_tn_set_reg(state, 0x5b, 0x29); ++ }else { ++ _mt_fe_tn_set_reg(state, 0x5b, 0x2a); ++ } ++ }else { /* if (freq_KHz > 304000) */ ++ if (freq_KHz <= 400000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x89); ++ }else if (freq_KHz <= 450000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x91); ++ }else if (freq_KHz <= 650000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x98); ++ }else if (freq_KHz <= 850000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0xa0); ++ }else { ++ _mt_fe_tn_set_reg(state, 0x5c, 0xa8); ++ } ++ _mt_fe_tn_set_reg(state, 0x5b, 0x08); ++ } ++ } ++ } /* end of 0xE1 */ ++ return 0; ++} ++ ++static int _mt_fe_tn_cali_PLL_tc2800(struct m88dc2800_state *state, u32 freq_KHz, u32 cali_freq_thres_div2, u32 cali_freq_thres_div3r, u32 cali_freq_thres_div3) ++{ ++ s32 N, F, MUL; ++ u8 buf, tmp, tmp2; ++ s32 M; ++ const s32 crystal_KHz = state->tuner_crystal; ++ ++ if (state->tuner_mtt == 0xD1) { ++ M = state->tuner_crystal / 4000; ++ if (freq_KHz > cali_freq_thres_div2) { ++ MUL = 4; ++ tmp = 2; ++ }else if (freq_KHz > 300000) { ++ MUL = 8; ++ tmp = 3; ++ }else if (freq_KHz > (cali_freq_thres_div2 / 2)) { ++ MUL = 8; ++ tmp = 4; ++ }else if (freq_KHz > (cali_freq_thres_div2 / 4)) { ++ MUL = 16; ++ tmp = 5; ++ }else if (freq_KHz > (cali_freq_thres_div2 / 8)) { ++ MUL = 32; ++ tmp = 6; ++ }else if (freq_KHz > (cali_freq_thres_div2 / 16)){ ++ MUL = 64; ++ tmp = 7; ++ }else { /* invalid */ ++ MUL = 0; ++ tmp = 0; ++ return 1; ++ } ++ }else if (state->tuner_mtt == 0xE1) { ++ M = state->tuner_crystal / 1000; ++ ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x32, 0xe0); ++ _mt_fe_tn_set_reg(state, 0x33, 0x86); ++ _mt_fe_tn_set_reg(state, 0x37, 0x70); ++ _mt_fe_tn_set_reg(state, 0x38, 0x20); ++ _mt_fe_tn_set_reg(state, 0x39, 0x18); ++ _mt_fe_tn_set_reg(state, 0x89, 0x83); ++ ++ if (freq_KHz > cali_freq_thres_div2) { ++ M = M / 4; ++ MUL = 4; ++ tmp = 2; ++ tmp2 = M + 16; /*48*/ ++ }else if (freq_KHz > cali_freq_thres_div3r) { ++ M = M / 3; ++ MUL = 6; ++ tmp = 2; ++ tmp2 = M + 32; /*32*/ ++ }else if (freq_KHz > cali_freq_thres_div3) { ++ M = M / 3; ++ MUL = 6; ++ tmp = 2; ++ tmp2 = M; /*16*/ ++ }else if (freq_KHz > 304000) { ++ M = M / 4; ++ MUL = 8; ++ tmp = 3; ++ tmp2 = M + 16; /*48*/ ++ }else if (freq_KHz > (cali_freq_thres_div2 / 2)) { ++ M = M / 4; ++ MUL = 8; ++ tmp = 4; ++ tmp2 = M + 16; /*48*/ ++ }else if (freq_KHz > (cali_freq_thres_div3r / 2)) { ++ M = M / 3; ++ MUL = 12; ++ tmp = 4; ++ tmp2 = M + 32; /*32*/ ++ }else if (freq_KHz > (cali_freq_thres_div3 / 2)) { ++ M = M / 3; ++ MUL = 12; ++ tmp = 4; ++ tmp2 = M; /*16*/ ++ }else if (freq_KHz > (cali_freq_thres_div2 / 4)) { ++ M = M / 4; ++ MUL = 16; ++ tmp = 5; ++ tmp2 = M + 16; /*48*/ ++ }else if (freq_KHz > (cali_freq_thres_div3r / 4)) { ++ M = M / 3; ++ MUL = 24; ++ tmp = 5; ++ tmp2 = M + 32; /*32*/ ++ }else if (freq_KHz > (cali_freq_thres_div3 / 4)) { ++ M = M / 3; ++ MUL = 24; ++ tmp = 5; ++ tmp2 = M; /*16*/ ++ }else if (freq_KHz > (cali_freq_thres_div2 / 8)) { ++ M = M / 4; ++ MUL = 32; ++ tmp = 6; ++ tmp2 = M + 16; /*48*/ ++ }else if (freq_KHz > (cali_freq_thres_div3r / 8)) { ++ M = M / 3; ++ MUL = 48; ++ tmp = 6; ++ tmp2 = M + 32; /*32*/ ++ }else if (freq_KHz > (cali_freq_thres_div3 / 8)) { ++ M = M / 3; ++ MUL = 48; ++ tmp = 6; ++ tmp2 = M; /*16*/ ++ }else if (freq_KHz > (cali_freq_thres_div2 / 16)) { ++ M = M / 4; ++ MUL = 64; ++ tmp = 7; ++ tmp2 = M + 16; /*48*/ ++ }else if (freq_KHz > (cali_freq_thres_div3r / 16)) { ++ M = M / 3; ++ MUL = 96; ++ tmp = 7; ++ tmp2 = M + 32; /*32*/ ++ }else if (freq_KHz > (cali_freq_thres_div3 / 16)) { ++ M = M / 3; ++ MUL = 96; ++ tmp = 7; ++ tmp2 = M; /*16*/ ++ }else { /* invalid */ ++ M = M / 4; ++ MUL = 0; ++ tmp = 0; ++ tmp2 = 48; ++ return 1; ++ } ++ ++ if (freq_KHz == 291000) { ++ M = state->tuner_crystal / 1000 / 3; ++ MUL = 12; ++ tmp = 4; ++ tmp2 = M + 32; /*32*/ ++ } ++ /* ++ if (freq_KHz == 578000) { ++ M = state->tuner_crystal / 1000 / 4; ++ MUL = 4; ++ tmp = 2; ++ tmp2 = M + 16; //48 ++ } ++ */ ++ if (freq_KHz == 690000) { ++ M = state->tuner_crystal / 1000 / 3; ++ MUL = 4; ++ tmp = 2; ++ tmp2 = M + 16; /*48*/ ++ } ++ _mt_fe_tn_get_reg(state, 0x33, &buf); ++ buf &= 0xc0; ++ buf += tmp2; ++ _mt_fe_tn_set_reg(state, 0x33, buf); ++ }else { ++ return 1; ++ } ++ ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf &= 0xf8; ++ buf += tmp; ++ _mt_fe_tn_set_reg(state, 0x39, buf); ++ ++ N = (freq_KHz * MUL * M / crystal_KHz) / 2 * 2 - 256; ++ ++ buf = (N >> 8) & 0xcf; ++ if (state->tuner_mtt == 0xE1) { ++ buf |= 0x30; ++ } ++ _mt_fe_tn_set_reg(state, 0x34, buf); ++ ++ buf = N & 0xff; ++ _mt_fe_tn_set_reg(state, 0x35, buf); ++ ++ F = ((freq_KHz * MUL * M / (crystal_KHz / 1000) / 2) - (freq_KHz * MUL * M / crystal_KHz / 2 * 1000)) * 64 / 1000; ++ ++ buf = F & 0xff; ++ _mt_fe_tn_set_reg(state, 0x36, buf); ++ ++ if (F == 0) { ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x3d, 0xca); ++ }else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x3d, 0xfe); ++ } else { ++ return 1; ++ } ++ _mt_fe_tn_set_reg(state, 0x3e, 0x9c); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x34); ++ } ++ ++ if (F > 0) { ++ if (state->tuner_mtt == 0xD1) { ++ if ((F == 32) || (F == 16) || (F == 48)) { ++ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); ++ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x36); ++ }else { ++ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); ++ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x36); ++ } ++ }else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); ++ _mt_fe_tn_set_reg(state, 0x3d, 0x7e); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x36); ++ _mt_fe_tn_set_reg(state, 0x89, 0x84); ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf = buf & 0x1f; ++ _mt_fe_tn_set_reg(state, 0x39, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x02; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ }else { ++ return 1; ++ } ++ } ++ ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ if (state->tuner_mtt == 0xD1) { ++ msleep(5); ++ }else if (state->tuner_mtt == 0xE1) { ++ msleep(2); ++ }else { ++ return 1; ++ } ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ ++ return 0; ++} ++ ++static int _mt_fe_tn_set_PLL_freq_tc2800(struct m88dc2800_state *state) ++{ ++ u8 buf, buf1; ++ u32 freq_thres_div2_KHz, freq_thres_div3r_KHz, freq_thres_div3_KHz; ++ ++ const u32 freq_KHz = state->tuner_freq; ++ ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x32, 0xe1); ++ _mt_fe_tn_set_reg(state, 0x33, 0xa6); ++ _mt_fe_tn_set_reg(state, 0x37, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x38, 0x20); ++ _mt_fe_tn_set_reg(state, 0x39, 0x18); ++ _mt_fe_tn_set_reg(state, 0x40, 0x40); ++ ++ freq_thres_div2_KHz = 520000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); ++ ++ msleep(5); ++ _mt_fe_tn_get_reg(state, 0x3a, &buf); ++ buf1 = buf; ++ buf = buf & 0x03; ++ buf1 = buf1 & 0x01; ++ if ((buf1 == 0) || (buf == 3)) { ++ freq_thres_div2_KHz = 420000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); ++ msleep(5); ++ ++ _mt_fe_tn_get_reg(state, 0x3a, &buf); ++ buf = buf & 0x07; ++ if (buf == 5) { ++ freq_thres_div2_KHz = 520000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); ++ msleep(5); ++ } ++ } ++ ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x10; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf & 0xdf; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x40, 0x0); ++ ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ msleep(5); ++ ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf = buf >> 5; ++ if (buf < 5) { ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf = buf | 0xa0; ++ buf = buf & 0xbf; ++ _mt_fe_tn_set_reg(state, 0x39, buf); ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x02; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ } ++ ++ _mt_fe_tn_get_reg(state, 0x37, &buf); ++ if (buf > 0x70) { ++ buf = 0x7f; ++ _mt_fe_tn_set_reg(state, 0x40, 0x40); ++ } ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ ++ ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ if (buf < 0x0f) { ++ buf = (buf & 0x0f) << 2; ++ buf = buf + 0x0f; ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ }else if (buf < 0x1f) { ++ buf= buf + 0x0f; ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ } ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf | 0x20) & 0xef; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ msleep(5); ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ ++ }else if (state->tuner_mtt == 0xE1){ ++ freq_thres_div2_KHz = 580000; ++ freq_thres_div3r_KHz = 500000; ++ freq_thres_div3_KHz = 440000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, freq_thres_div3r_KHz, freq_thres_div3_KHz); ++ ++ msleep(3); ++ ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ msleep(3); ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x10; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf & 0xdf; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ msleep(3); ++ ++ _mt_fe_tn_get_reg(state, 0x37, &buf); ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ /* ++ if ((freq_KHz == 802000) || (freq_KHz == 826000)) { ++ _mt_fe_tn_set_reg(state, 0x37, 0x5e); ++ } ++ */ ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf & 0xef) | 0x30; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ msleep(2); ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ } else { ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static int _mt_fe_tn_set_BB_tc2800(struct m88dc2800_state *state) ++{ ++ return 0; ++} ++ ++static int _mt_fe_tn_set_appendix_tc2800(struct m88dc2800_state *state) ++{ ++ u8 buf; ++ const u32 freq_KHz = state->tuner_freq; ++ ++ if (state->tuner_mtt == 0xD1) { ++ if ((freq_KHz == 123000) || (freq_KHz == 147000) || (freq_KHz == 171000) ++ || (freq_KHz == 195000)) ++ _mt_fe_tn_set_reg(state, 0x20, 0x1b); ++ ++ if ((freq_KHz == 371000) || (freq_KHz == 419000) || (freq_KHz == 610000) ++ || (freq_KHz == 730000) || (freq_KHz == 754000) || (freq_KHz == 826000)) { ++ _mt_fe_tn_get_reg(state, 0x0d, &buf); ++ _mt_fe_tn_set_reg(state, 0x0d, (u8)(buf + 1)); ++ } ++ ++ if ((freq_KHz == 522000) || (freq_KHz == 578000) || (freq_KHz == 634000) ++ || (freq_KHz == 690000) || (freq_KHz == 834000)) { ++ _mt_fe_tn_get_reg(state, 0x0d, &buf); ++ _mt_fe_tn_set_reg(state, 0x0d, (u8)(buf - 1)); ++ } ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x20, 0xfc); ++ ++ if ((freq_KHz == 123000) || (freq_KHz == 147000) || (freq_KHz == 171000) ++ || (freq_KHz == 195000) || (freq_KHz == 219000) || (freq_KHz == 267000) ++ || (freq_KHz == 291000) || (freq_KHz == 339000) || (freq_KHz == 387000) ++ || (freq_KHz == 435000) || (freq_KHz == 482000) || (freq_KHz == 530000) ++ || (freq_KHz == 722000) ++ || ((state->tuner_custom_cfg == 1) && (freq_KHz == 315000))) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x5c); ++ } ++ } ++ return 0; ++} ++ ++static int _mt_fe_tn_set_DAC_tc2800(struct m88dc2800_state *state) ++{ ++ u8 buf, tempnumber; ++ s32 N; ++ s32 f1f2number, f1, f2, delta1, Totalnum1; ++ s32 cntT, cntin, NCOI, z0, z1, z2, tmp; ++ u32 fc, fadc, fsd, f2d; ++ u32 FreqTrue108_Hz; ++ ++ s32 M = state->tuner_crystal / 4000; ++ ++/* const u8 bandwidth = state->tuner_bandwidth; */ ++ const u16 DAC_fre = 108; ++ const u32 crystal_KHz = state->tuner_crystal; ++ const u32 DACFreq_KHz = state->tuner_dac; ++ ++ const u32 freq_KHz = state->tuner_freq; ++ ++ if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_get_reg(state, 0x33, &buf); ++ M = buf & 0x0f; ++ if (M == 0) ++ M = 6; ++ } ++ ++ _mt_fe_tn_get_reg(state, 0x34, &buf); ++ N = buf & 0x07; ++ ++ _mt_fe_tn_get_reg(state, 0x35, &buf); ++ N = (N << 8) + buf; ++ ++ ++ buf = ((N + 256) * crystal_KHz / M / DAC_fre + 500) / 1000; ++ ++ if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_appendix_tc2800(state); ++ ++ if ((freq_KHz == 187000) || (freq_KHz == 195000) || (freq_KHz == 131000) ++ || (freq_KHz == 211000) || (freq_KHz == 219000) || (freq_KHz == 227000) ++ || (freq_KHz == 267000) || (freq_KHz == 299000) || (freq_KHz == 347000) ++ || (freq_KHz == 363000) || (freq_KHz == 395000) || (freq_KHz == 403000) ++ || (freq_KHz == 435000) || (freq_KHz == 482000) || (freq_KHz == 474000) ++ || (freq_KHz == 490000) || (freq_KHz == 610000) || (freq_KHz == 642000) ++ || (freq_KHz == 666000) || (freq_KHz == 722000) || (freq_KHz == 754000) ++ || (((freq_KHz == 379000) || (freq_KHz == 467000) || (freq_KHz == 762000)) ++ && (state->tuner_custom_cfg != 1))) { ++ buf = buf + 1; ++ } ++ ++ if ((freq_KHz == 123000) || (freq_KHz == 139000) || (freq_KHz == 147000) ++ || (freq_KHz == 171000) || (freq_KHz == 179000) || (freq_KHz == 203000) ++ || (freq_KHz == 235000) || (freq_KHz == 251000) || (freq_KHz == 259000) ++ || (freq_KHz == 283000) || (freq_KHz == 331000) || (freq_KHz == 363000) ++ || (freq_KHz == 371000) || (freq_KHz == 387000) || (freq_KHz == 411000) ++ || (freq_KHz == 427000) || (freq_KHz == 443000) || (freq_KHz == 451000) ++ || (freq_KHz == 459000) || (freq_KHz == 506000) || (freq_KHz == 514000) ++ || (freq_KHz == 538000) || (freq_KHz == 546000) || (freq_KHz == 554000) ++ || (freq_KHz == 562000) || (freq_KHz == 570000) || (freq_KHz == 578000) ++ || (freq_KHz == 602000) || (freq_KHz == 626000) || (freq_KHz == 658000) ++ || (freq_KHz == 690000) || (freq_KHz == 714000) || (freq_KHz == 746000) ++ || (freq_KHz == 522000) || (freq_KHz == 826000) || (freq_KHz == 155000) ++ || (freq_KHz == 530000) ++ || (((freq_KHz == 275000) || (freq_KHz == 355000)) && (state->tuner_custom_cfg != 1)) ++ || (((freq_KHz == 467000) || (freq_KHz == 762000) || (freq_KHz == 778000) ++ || (freq_KHz == 818000)) && (state->tuner_custom_cfg == 1))) { ++ buf = buf - 1; ++ } ++ } ++ ++ _mt_fe_tn_set_reg(state, 0x0e, buf); ++ _mt_fe_tn_set_reg(state, 0x0d, buf); ++ ++ f1f2number = (((DACFreq_KHz * M * buf) / crystal_KHz) << 16) / (N + 256) ++ + (((DACFreq_KHz * M * buf) % crystal_KHz) << 16) / ((N + 256) * crystal_KHz); ++ ++ ++ _mt_fe_tn_set_reg(state, 0xf1, (u8)((f1f2number & 0xff00) >> 8)); ++ _mt_fe_tn_set_reg(state, 0xf2, (u8)(f1f2number & 0x00ff)); ++ ++ FreqTrue108_Hz = (N + 256) * crystal_KHz / (M * buf) * 1000 + (((N + 256) * crystal_KHz) % (M * buf)) * 1000 / (M * buf); ++ ++ f1 = 4096; ++ fc = FreqTrue108_Hz; ++ fadc = fc / 4; ++ fsd = 27000000; ++ f2d = state->tuner_bandwidth * 1000 / 2 -150; ++ f2 = (fsd / 250) * f2d / ((fc + 500) / 1000); ++ delta1 = ((f1 - f2) << 15) / f2; ++ ++ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; ++ ++ cntT = f2; ++ cntin = Totalnum1; ++ NCOI = delta1; ++ ++ z0 = cntin; ++ z1 = cntT; ++ z2 = NCOI; ++ ++ tempnumber = (z0 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xc9, (u8)(tempnumber & 0x0f)); ++ tempnumber = (z0 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xca, tempnumber); ++ ++ tempnumber = (z1 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xcb, tempnumber); ++ tempnumber = (z1 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xcc, tempnumber); ++ ++ tempnumber = (z2 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xcd, tempnumber); ++ tempnumber = (z2 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xce, tempnumber); ++ ++ tmp = f1; ++ f1 = f2; ++ f2 = tmp / 2; ++ delta1 = ((f1 - f2) << 15) / f2; ++ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; ++ NCOI = (f1 << 15) / f2 - (1 << 15); ++ cntT = f2; ++ cntin = Totalnum1; ++ z0 = cntin; ++ z1 = cntT; ++ z2 = NCOI; ++ ++ tempnumber = (z0 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xd9, (u8)(tempnumber & 0x0f)); ++ tempnumber = (z0 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xda, tempnumber); ++ ++ tempnumber = (z1 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xdb, tempnumber); ++ tempnumber = (z1 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xdc, tempnumber); ++ ++ tempnumber = (z2 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xdd, tempnumber); ++ tempnumber = (z2 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xde, tempnumber); ++ ++ return 0; ++} ++ ++static int _mt_fe_tn_preset_tc2800(struct m88dc2800_state *state) ++{ ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x19, 0x4a); ++ _mt_fe_tn_set_reg(state, 0x1b, 0x4b); ++ ++ _mt_fe_tn_set_reg(state, 0x04, 0x04); ++ _mt_fe_tn_set_reg(state, 0x17, 0x0d); ++ _mt_fe_tn_set_reg(state, 0x62, 0x6c); ++ _mt_fe_tn_set_reg(state, 0x63, 0xf4); ++ _mt_fe_tn_set_reg(state, 0x1f, 0x0e); ++ _mt_fe_tn_set_reg(state, 0x6b, 0xf4); ++ _mt_fe_tn_set_reg(state, 0x14, 0x01); ++ _mt_fe_tn_set_reg(state, 0x5a, 0x75); ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ _mt_fe_tn_set_reg(state, 0x72, 0xe0); ++ _mt_fe_tn_set_reg(state, 0x70, 0x07); ++ _mt_fe_tn_set_reg(state, 0x15, 0x7b); ++ _mt_fe_tn_set_reg(state, 0x55, 0x71); ++ ++ _mt_fe_tn_set_reg(state, 0x75, 0x55); ++ _mt_fe_tn_set_reg(state, 0x76, 0xac); ++ _mt_fe_tn_set_reg(state, 0x77, 0x6c); ++ _mt_fe_tn_set_reg(state, 0x78, 0x8b); ++ _mt_fe_tn_set_reg(state, 0x79, 0x42); ++ _mt_fe_tn_set_reg(state, 0x7a, 0xd2); ++ ++ _mt_fe_tn_set_reg(state, 0x81, 0x01); ++ _mt_fe_tn_set_reg(state, 0x82, 0x00); ++ _mt_fe_tn_set_reg(state, 0x82, 0x02); ++ _mt_fe_tn_set_reg(state, 0x82, 0x04); ++ _mt_fe_tn_set_reg(state, 0x82, 0x06); ++ _mt_fe_tn_set_reg(state, 0x82, 0x08); ++ _mt_fe_tn_set_reg(state, 0x82, 0x09); ++ _mt_fe_tn_set_reg(state, 0x82, 0x29); ++ _mt_fe_tn_set_reg(state, 0x82, 0x49); ++ _mt_fe_tn_set_reg(state, 0x82, 0x58); ++ _mt_fe_tn_set_reg(state, 0x82, 0x59); ++ _mt_fe_tn_set_reg(state, 0x82, 0x98); ++ _mt_fe_tn_set_reg(state, 0x82, 0x99); ++ ++ ++ _mt_fe_tn_set_reg(state, 0x10, 0x05); ++ _mt_fe_tn_set_reg(state, 0x10, 0x0d); ++ _mt_fe_tn_set_reg(state, 0x11, 0x95); ++ _mt_fe_tn_set_reg(state, 0x11, 0x9d); ++ ++ ++ if (state->tuner_loopthrough != 0) { ++ _mt_fe_tn_set_reg(state, 0x67, 0x25); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x67, 0x05); ++ } ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x1b, 0x47); ++ if(state->tuner_mode == 0) // DVB-C ++ { ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ _mt_fe_tn_set_reg(state, 0x62, 0x2c); ++ _mt_fe_tn_set_reg(state, 0x63, 0x54); ++ _mt_fe_tn_set_reg(state, 0x68, 0x0b); ++ _mt_fe_tn_set_reg(state, 0x14, 0x00); ++ } ++ else // CTTB ++ { ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ _mt_fe_tn_set_reg(state, 0x62, 0x0c); ++ _mt_fe_tn_set_reg(state, 0x63, 0x54); ++ _mt_fe_tn_set_reg(state, 0x68, 0x0b); ++ _mt_fe_tn_set_reg(state, 0x14, 0x05); ++ } ++ _mt_fe_tn_set_reg(state, 0x6f, 0x00); ++ _mt_fe_tn_set_reg(state, 0x84, 0x04); ++ _mt_fe_tn_set_reg(state, 0x5e, 0xbe); ++ _mt_fe_tn_set_reg(state, 0x87, 0x07); ++ _mt_fe_tn_set_reg(state, 0x8a, 0x1f); ++ _mt_fe_tn_set_reg(state, 0x8b, 0x1f); ++ _mt_fe_tn_set_reg(state, 0x88, 0x30); ++ _mt_fe_tn_set_reg(state, 0x58, 0x34); ++ _mt_fe_tn_set_reg(state, 0x61, 0x8c); ++ _mt_fe_tn_set_reg(state, 0x6a, 0x42); ++ } ++ return 0; ++} ++ ++static int mt_fe_tn_wakeup_tc2800(struct m88dc2800_state *state) ++{ ++ _mt_fe_tn_set_reg(state, 0x16, 0xb1); ++ _mt_fe_tn_set_reg(state, 0x09, 0x7d); ++ return 0; ++} ++ ++ ++static int mt_fe_tn_sleep_tc2800(struct m88dc2800_state *state) ++{ ++ _mt_fe_tn_set_reg(state, 0x16, 0xb0); ++ _mt_fe_tn_set_reg(state, 0x09, 0x6d); ++ return 0; ++} ++ ++static int mt_fe_tn_init_tc2800(struct m88dc2800_state *state) ++{ ++ if (state->tuner_init_OK != 1) { ++ state->tuner_dev_addr = 0x61; /* TUNER_I2C_ADDR_TC2800 */ ++ state->tuner_freq = 650000; ++ state->tuner_qam = 0; ++ state->tuner_mode = 0; // 0: DVB-C, 1: CTTB ++ ++ state->tuner_bandwidth = 8; ++ state->tuner_loopthrough = 0; ++ state->tuner_crystal = 24000; ++ state->tuner_dac = 7200; ++ state->tuner_mtt = 0x00; ++ state->tuner_custom_cfg = 0; ++ state->tuner_version = 30022; /* Driver version number */ ++ state->tuner_time = 12092611; ++ state->tuner_init_OK = 1; ++ } ++ ++ _mt_fe_tn_set_reg(state, 0x2b, 0x46); ++ _mt_fe_tn_set_reg(state, 0x2c, 0x75); ++ ++ if (state->tuner_mtt == 0x00) { ++ u8 tmp = 0; ++ _mt_fe_tn_get_reg(state, 0x01, &tmp); ++ printk("m88dc2800: tuner id = 0x%02x ", tmp); ++ switch(tmp) { ++ case 0x0d: ++ state->tuner_mtt = 0xD1; ++ break; ++ case 0x8e: ++ default: ++ state->tuner_mtt = 0xE1; ++ break; ++ } ++ } ++ return 0; ++} ++ ++static int mt_fe_tn_set_freq_tc2800(struct m88dc2800_state *state, u32 freq_KHz) ++{ ++ u8 buf; ++ u8 buf1; ++ ++ mt_fe_tn_init_tc2800(state); ++ ++ state->tuner_freq = freq_KHz; ++ ++ if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x21, 0xb9); ++ else ++ _mt_fe_tn_set_reg(state, 0x21, 0x99); ++ ++ mt_fe_tn_wakeup_tc2800(state); ++ ++ _mt_fe_tn_set_reg(state, 0x05, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x06, 0xf8); ++ ++ _mt_fe_tn_set_RF_front_tc2800(state); ++ _mt_fe_tn_set_PLL_freq_tc2800(state); ++ _mt_fe_tn_set_DAC_tc2800(state); ++ _mt_fe_tn_set_BB_tc2800(state); ++ _mt_fe_tn_preset_tc2800(state); ++ ++ _mt_fe_tn_set_reg(state, 0x05, 0x00); ++ _mt_fe_tn_set_reg(state, 0x06, 0x00); ++ ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x00, 0x01); ++ _mt_fe_tn_set_reg(state, 0x00, 0x00); ++ ++ msleep(5); ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ msleep(5); ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ ++ _mt_fe_tn_get_reg(state, 0x69, &buf1); ++ buf1 = buf1 & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x61, &buf); ++ buf = buf & 0x0f; ++ if (buf == 0x0c) ++ { ++ _mt_fe_tn_set_reg(state, 0x6a, 0x59); ++ } ++ ++ if(buf1 > 0x02) ++ { ++ if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x66, 0x44); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x66, 0x64); ++ else ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ } ++ ++ if (buf1 < 0x03) ++ { ++ if (freq_KHz > 800000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x64); ++ else if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 300000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x43); ++ else if (freq_KHz > 220000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 110000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ ++ msleep(5); ++ } ++ else if (buf < 0x0c) ++ { ++ if (freq_KHz > 800000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else if (freq_KHz >600000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x34); ++ else if (freq_KHz > 300000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x43); ++ else if (freq_KHz > 220000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 110000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ ++ msleep(5); ++ } ++ } else if ((state->tuner_mtt == 0xE1)) { ++ _mt_fe_tn_set_reg(state, 0x00, 0x01); ++ _mt_fe_tn_set_reg(state, 0x00, 0x00); ++ ++ msleep(20); ++ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf & 0xef) | 0x28; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ ++ msleep(50); ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf & 0xf7)| 0x10 ; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ ++ msleep(10); ++ ++ _mt_fe_tn_get_reg(state, 0x69, &buf); ++ buf = buf & 0x03; ++ _mt_fe_tn_set_reg(state, 0x2a, buf); ++ ++ if(buf > 0) ++ { ++ msleep(20); ++ _mt_fe_tn_get_reg(state, 0x84, &buf); ++ buf = buf & 0x1f; ++ _mt_fe_tn_set_reg(state, 0x68, 0x0a); ++ _mt_fe_tn_get_reg(state, 0x88, &buf1); ++ buf1 = buf1 & 0x1f; ++ if(buf <= buf1) ++ _mt_fe_tn_set_reg(state, 0x66, 0x44); ++ else ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ } ++ else ++ { ++ if (freq_KHz <= 600000) ++ { ++ _mt_fe_tn_set_reg(state, 0x68, 0x0c); ++ } ++ else ++ { ++ _mt_fe_tn_set_reg(state, 0x68, 0x0e); ++ } ++ _mt_fe_tn_set_reg(state, 0x30, 0xfb); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x04); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ } ++ if(state->tuner_loopthrough != 0) { ++ _mt_fe_tn_get_reg(state, 0x28, &buf); ++ if (buf == 0) { ++ _mt_fe_tn_set_reg(state, 0x28, 0xff); ++ _mt_fe_tn_get_reg(state, 0x61, &buf); ++ buf = buf & 0x0f; ++ if(buf > 9) ++ _mt_fe_tn_set_reg(state, 0x67, 0x74); ++ else if (buf >6) ++ _mt_fe_tn_set_reg(state, 0x67, 0x64); ++ else if (buf >3) ++ _mt_fe_tn_set_reg(state, 0x67, 0x54); ++ else ++ _mt_fe_tn_set_reg(state, 0x67, 0x44); ++ } ++ } else { ++ _mt_fe_tn_set_reg(state, 0x67, 0x34); ++ } ++ } else { ++ return 1; ++ } ++ return 0; ++} ++ ++/* ++static int mt_fe_tn_set_BB_filter_band_tc2800(struct m88dc2800_state *state, u8 bandwidth) ++{ ++ u8 buf, tmp; ++ ++ _mt_fe_tn_get_reg(state, 0x53, &tmp); ++ ++ if (bandwidth == 6) ++ buf = 0x01 << 1; ++ else if (bandwidth == 7) ++ buf = 0x02 << 1; ++ else if (bandwidth == 8) ++ buf = 0x04 << 1; ++ else ++ buf = 0x04 << 1; ++ ++ tmp &= 0xf1; ++ tmp |= buf; ++ _mt_fe_tn_set_reg(state, 0x53, tmp); ++ state->tuner_bandwidth = bandwidth; ++ return 0; ++} ++*/ ++ ++/*static s64 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state *state)*/ ++static s32 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state *state) ++{ ++ /*s64 level = -107;*/ ++ s32 level = -107; ++ s32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; ++ s32 val1, val2, val; ++ s32 result2, result3, result4, result5, result6; ++ s32 append; ++ u8 tmp; ++ s32 freq_KHz = (s32)state->tuner_freq; ++ ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_get_reg(state, 0x61, &tmp); ++ tmp1 = tmp & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x69, &tmp); ++ tmp2 = tmp & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x73, &tmp); ++ tmp3 = tmp & 0x07; ++ ++ _mt_fe_tn_get_reg(state, 0x7c, &tmp); ++ tmp4 = (tmp >> 4) & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x7b, &tmp); ++ tmp5 = tmp & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x7f, &tmp); ++ tmp6 = (tmp >> 5) & 0x01; ++ ++ if (tmp1 > 6) { ++ val1 = 0; ++ if (freq_KHz <= 200000) { ++ val2 = (tmp1 - 6) * 267; ++ } else if (freq_KHz <= 600000) { ++ val2 = (tmp1 - 6) * 280; ++ } else { ++ val2 = (tmp1 - 6) * 290; ++ } ++ val = val1 + val2; ++ } else { ++ if (tmp1 == 0) { ++ val1 = -550; ++ } else { ++ val1 = 0; ++ } ++ if ((tmp1 < 4) && (freq_KHz >= 506000)) { ++ val1 = -850; ++ } ++ val2 = 0; ++ val = val1 + val2; ++ } ++ ++ if (freq_KHz <= 95000) { ++ result2 = tmp2 * 289; ++ } else if (freq_KHz <= 155000) { ++ result2 = tmp2 * 278; ++ } else if (freq_KHz <= 245000) { ++ result2 = tmp2 * 267; ++ } else if (freq_KHz <= 305000) { ++ result2 = tmp2 * 256; ++ } else if (freq_KHz <= 335000) { ++ result2 = tmp2 * 244; ++ } else if (freq_KHz <= 425000) { ++ result2 = tmp2 * 233; ++ } else if (freq_KHz <= 575000) { ++ result2 = tmp2 * 222; ++ } else if (freq_KHz <= 665000) { ++ result2 = tmp2 * 211; ++ } else { ++ result2 = tmp2 * 200; ++ } ++ result3 = (6 - tmp3) * 100; ++ result4 = 300 * tmp4; ++ result5 = 50 * tmp5; ++ result6 = 300 * tmp6; ++ if (freq_KHz < 105000) { ++ append = -450; ++ } else if (freq_KHz <= 227000) { ++ append = -4 * (freq_KHz / 1000 - 100) + 150; ++ } else if (freq_KHz <= 305000) { ++ append = -4 * (freq_KHz / 1000 - 100); ++ } else if (freq_KHz <= 419000) { ++ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17 + 130; ++ } else if (freq_KHz <= 640000) { ++ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17; ++ } else { ++ append = -500; ++ } ++ level = append - (val + result2 + result3 + result4 + result5 + result6); ++ level /= 100; ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_get_reg(state, 0x61, &tmp); ++ tmp1 = tmp & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x84, &tmp); ++ tmp2 = tmp & 0x1f; ++ ++ _mt_fe_tn_get_reg(state, 0x69, &tmp); ++ tmp3 = tmp & 0x03; ++ ++ _mt_fe_tn_get_reg(state, 0x73, &tmp); ++ tmp4 = tmp & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x7c, &tmp); ++ tmp5 = (tmp >> 4) & 0x0f; ++ ++ _mt_fe_tn_get_reg(state, 0x7b, &tmp); ++ tmp6 = tmp & 0x0f; ++ ++ if (freq_KHz < 151000) { ++ result2 = (1150 - freq_KHz / 100) * 163 / 33 + 4230; ++ result3 = (1150 - freq_KHz / 100) * 115 / 33 + 1850; ++ result4 = -3676 * (freq_KHz / 1000) / 100 + 6115; ++ } else if (freq_KHz < 257000) { ++ result2 = (1540 - freq_KHz / 100) * 11 / 4 + 3870; ++ result3 = (1540 - freq_KHz / 100) * 205 / 96 + 2100; ++ result4 = -21 * freq_KHz / 1000 + 5084; ++ } else if (freq_KHz < 305000) { ++ result2 = (2620 - freq_KHz / 100) * 5 / 3 + 2770; ++ result3 = (2620 - freq_KHz / 100) * 10 / 7 + 1700; ++ result4 = 650; ++ } else if (freq_KHz < 449000) { ++ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; ++ result3 = (3100 - freq_KHz / 100) * 5 / 3 + 10000; ++ result4 = 134 * freq_KHz / 10000 + 11875; ++ } else { ++ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; ++ result3 = 8400; ++ result4 = 5300; ++ } ++ ++ if (tmp1 > 6) { ++ val1 = result2; ++ val2 = 2900; ++ val = 500; ++ } else if (tmp1 > 0) { ++ val1 = result3; ++ val2 = 2700; ++ val = 500; ++ } else { ++ val1 = result4; ++ val2 = 2700; ++ val = 400; ++ } ++ level = val1 - (val2 * tmp1 + 500 * tmp2 + 3000 * tmp3 - 500 * tmp4 + 3000 * tmp5 + val * tmp6) - 1000; ++ level /= 1000; ++ } ++ return level; ++} ++ ++/* m88dc2800 operation functions */ ++u8 M88DC2000GetLock(struct m88dc2800_state *state) ++{ ++ u8 u8ret = 0; ++ ++ if (ReadReg(state, 0x80) < 0x06) { ++ if ((ReadReg(state, 0xdf)&0x80)==0x80 ++ && (ReadReg(state, 0x91)&0x23)==0x03 ++ && (ReadReg(state, 0x43)&0x08)==0x08) ++ u8ret = 1; ++ else ++ u8ret = 0; ++ } else { ++ if ((ReadReg(state, 0x85)&0x08)==0x08) ++ u8ret = 1; ++ else ++ u8ret = 0; ++ } ++ printk("%s, lock=%d\n", __func__,u8ret); ++ return u8ret; ++} ++ ++static int M88DC2000SetTsType(struct m88dc2800_state *state, u8 type) ++{ ++ u8 regC2H; ++ ++ if (type == 3) { ++ WriteReg(state, 0x84, 0x6A); ++ WriteReg(state, 0xC0, 0x43); ++ WriteReg(state, 0xE2, 0x06); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xC0; ++ regC2H |= 0x1B; ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0xC1, 0x60); /* common interface */ ++ } else if (type == 1) { ++ WriteReg(state, 0x84, 0x6A); ++ WriteReg(state, 0xC0, 0x47); /* serial format */ ++ WriteReg(state, 0xE2, 0x02); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xC7; ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0xC1, 0x00); ++ } else { ++ WriteReg(state, 0x84, 0x6C); ++ WriteReg(state, 0xC0, 0x43); /* parallel format */ ++ WriteReg(state, 0xE2, 0x06); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xC7; ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0xC1, 0x00); ++ } ++ return 0; ++} ++ ++static int M88DC2000RegInitial_TC2800(struct m88dc2800_state *state) ++{ ++ u8 RegE3H, RegE4H; ++ ++ WriteReg(state, 0x00, 0x48); ++ WriteReg(state, 0x01, 0x09); ++ WriteReg(state, 0xFB, 0x0A); ++ WriteReg(state, 0xFC, 0x0B); ++ WriteReg(state, 0x02, 0x0B); ++ WriteReg(state, 0x03, 0x18); ++ WriteReg(state, 0x05, 0x0D); ++ WriteReg(state, 0x36, 0x80); ++ WriteReg(state, 0x43, 0x40); ++ WriteReg(state, 0x55, 0x7A); ++ WriteReg(state, 0x56, 0xD9); ++ WriteReg(state, 0x57, 0xDF); ++ WriteReg(state, 0x58, 0x39); ++ WriteReg(state, 0x5A, 0x00); ++ WriteReg(state, 0x5C, 0x71); ++ WriteReg(state, 0x5D, 0x23); ++ WriteReg(state, 0x86, 0x40); ++ WriteReg(state, 0xF9, 0x08); ++ WriteReg(state, 0x61, 0x40); ++ WriteReg(state, 0x62, 0x0A); ++ WriteReg(state, 0x90, 0x06); ++ WriteReg(state, 0xDE, 0x00); ++ WriteReg(state, 0xA0, 0x03); ++ WriteReg(state, 0xDF, 0x81); ++ WriteReg(state, 0xFA, 0x40); ++ WriteReg(state, 0x37, 0x10); ++ WriteReg(state, 0xF0, 0x40); ++ WriteReg(state, 0xF2, 0x9C); ++ WriteReg(state, 0xF3, 0x40); ++ ++ RegE3H = ReadReg(state, 0xE3); ++ RegE4H = ReadReg(state, 0xE4); ++ if (((RegE3H & 0xC0) == 0x00) && ((RegE4H & 0xC0) == 0x00)) { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x40, 0x00); ++ WriteReg(state, 0x41, 0x10); ++ WriteReg(state, 0xF1, 0x02); ++ WriteReg(state, 0xF4, 0x04); ++ WriteReg(state, 0xF5, 0x00); ++ WriteReg(state, 0x42, 0x14); ++ WriteReg(state, 0xE1, 0x25); ++ } else if (((RegE3H & 0xC0) == 0x80) && ((RegE4H & 0xC0) == 0x40)) { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x39, 0x00); ++ WriteReg(state, 0x3A, 0x00); ++ WriteReg(state, 0x40, 0x00); ++ WriteReg(state, 0x41, 0x10); ++ WriteReg(state, 0xF1, 0x00); ++ WriteReg(state, 0xF4, 0x00); ++ WriteReg(state, 0xF5, 0x40); ++ WriteReg(state, 0x42, 0x14); ++ WriteReg(state, 0xE1, 0x25); ++ } else if ((RegE3H == 0x80 || RegE3H == 0x81) && (RegE4H == 0x80 || RegE4H == 0x81)) { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x39, 0x00); ++ WriteReg(state, 0x3A, 0x00); ++ WriteReg(state, 0xF1, 0x00); ++ WriteReg(state, 0xF4, 0x00); ++ WriteReg(state, 0xF5, 0x40); ++ WriteReg(state, 0x42, 0x24); ++ WriteReg(state, 0xE1, 0x25); ++ ++ WriteReg(state, 0x92, 0x7F); ++ WriteReg(state, 0x93, 0x91); ++ WriteReg(state, 0x95, 0x00); ++ WriteReg(state, 0x2B, 0x33); ++ WriteReg(state, 0x2A, 0x2A); ++ WriteReg(state, 0x2E, 0x80); ++ WriteReg(state, 0x25, 0x25); ++ WriteReg(state, 0x2D, 0xFF); ++ WriteReg(state, 0x26, 0xFF); ++ WriteReg(state, 0x27, 0x00); ++ WriteReg(state, 0x24, 0x25); ++ WriteReg(state, 0xA4, 0xFF); ++ WriteReg(state, 0xA3, 0x0D); ++ } else { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x39, 0x00); ++ WriteReg(state, 0x3A, 0x00); ++ WriteReg(state, 0xF1, 0x00); ++ WriteReg(state, 0xF4, 0x00); ++ WriteReg(state, 0xF5, 0x40); ++ WriteReg(state, 0x42, 0x24); ++ WriteReg(state, 0xE1, 0x27); ++ ++ WriteReg(state, 0x92, 0x7F); ++ WriteReg(state, 0x93, 0x91); ++ WriteReg(state, 0x95, 0x00); ++ WriteReg(state, 0x2B, 0x33); ++ WriteReg(state, 0x2A, 0x2A); ++ WriteReg(state, 0x2E, 0x80); ++ WriteReg(state, 0x25, 0x25); ++ WriteReg(state, 0x2D, 0xFF); ++ WriteReg(state, 0x26, 0xFF); ++ WriteReg(state, 0x27, 0x00); ++ WriteReg(state, 0x24, 0x25); ++ WriteReg(state, 0xA4, 0xFF); ++ WriteReg(state, 0xA3, 0x10); ++ } ++ ++ WriteReg(state, 0xF6, 0x4E); ++ WriteReg(state, 0xF7, 0x20); ++ WriteReg(state, 0x89, 0x02); ++ WriteReg(state, 0x14, 0x08); ++ WriteReg(state, 0x6F, 0x0D); ++ WriteReg(state, 0x10, 0xFF); ++ WriteReg(state, 0x11, 0x00); ++ WriteReg(state, 0x12, 0x30); ++ WriteReg(state, 0x13, 0x23); ++ WriteReg(state, 0x60, 0x00); ++ WriteReg(state, 0x69, 0x00); ++ WriteReg(state, 0x6A, 0x03); ++ WriteReg(state, 0xE0, 0x75); ++ WriteReg(state, 0x8D, 0x29); ++ WriteReg(state, 0x4E, 0xD8); ++ WriteReg(state, 0x88, 0x80); ++ WriteReg(state, 0x52, 0x79); ++ WriteReg(state, 0x53, 0x03); ++ WriteReg(state, 0x59, 0x30); ++ WriteReg(state, 0x5E, 0x02); ++ WriteReg(state, 0x5F, 0x0F); ++ WriteReg(state, 0x71, 0x03); ++ WriteReg(state, 0x72, 0x12); ++ WriteReg(state, 0x73, 0x12); ++ ++ return 0; ++} ++ ++static int M88DC2000AutoTSClock_P(struct m88dc2800_state *state, u32 sym, u16 qam) ++{ ++ u32 dataRate; ++ u8 clk_div, value; ++ printk("m88dc2800: M88DC2000AutoTSClock_P, symrate=%d qam=%d\n",sym,qam); ++ switch(qam) ++ { ++ case 16: ++ dataRate = 4; ++ break; ++ case 32: ++ dataRate = 5; ++ break; ++ case 128: ++ dataRate = 7; ++ break; ++ case 256: ++ dataRate = 8; ++ break; ++ case 64: ++ default: ++ dataRate = 6; ++ break; ++ } ++ dataRate *= sym * 105; ++ dataRate /= 800; ++ ++ if(dataRate <= 4115) ++ clk_div = 0x05; ++ else if(dataRate <= 4800) ++ clk_div = 0x04; ++ else if(dataRate <= 5760) ++ clk_div = 0x03; ++ else if(dataRate <= 7200) ++ clk_div = 0x02; ++ else if(dataRate <= 9600) ++ clk_div = 0x01; ++ else ++ clk_div = 0x00; ++ ++ value = ReadReg(state, 0xC2); ++ value &= 0xc0; ++ value |= clk_div; ++ WriteReg(state, 0xC2, value); ++ return 0; ++} ++ ++static int M88DC2000AutoTSClock_C(struct m88dc2800_state *state, u32 sym, u16 qam) ++{ ++ u32 dataRate; ++ u8 clk_div, value; ++ printk("m88dc2800: M88DC2000AutoTSClock_C, symrate=%d qam=%d\n",sym,qam); ++ switch(qam) ++ { ++ case 16: ++ dataRate = 4; ++ break; ++ case 32: ++ dataRate = 5; ++ break; ++ case 128: ++ dataRate = 7; ++ break; ++ case 256: ++ dataRate = 8; ++ break; ++ case 64: ++ default: ++ dataRate = 6; ++ break; ++ } ++ dataRate *= sym * 105; ++ dataRate /= 800; ++ ++ if(dataRate <= 4115) ++ clk_div = 0x3F; ++ else if(dataRate <= 4800) ++ clk_div = 0x36; ++ else if(dataRate <= 5760) ++ clk_div = 0x2D; ++ else if(dataRate <= 7200) ++ clk_div = 0x24; ++ else if(dataRate <= 9600) ++ clk_div = 0x1B; ++ else ++ clk_div = 0x12; ++ ++ value = ReadReg(state, 0xC2); ++ value &= 0xc0; ++ value |= clk_div; ++ WriteReg(state, 0xC2, value); ++ return 0; ++} ++ ++static int M88DC2000SetTxMode(struct m88dc2800_state *state, u8 inverted, u8 j83) ++{ ++ u8 value = 0; ++ if (inverted) ++ value |= 0x08; /* spectrum inverted */ ++ if (j83) ++ value |= 0x01; /* J83C */ ++ WriteReg(state, 0x83, value); ++ return 0; ++} ++ ++static int M88DC2000SoftReset(struct m88dc2800_state *state) ++{ ++ WriteReg(state, 0x80, 0x01); ++ WriteReg(state, 0x82, 0x00); ++ msleep(1); ++ WriteReg(state, 0x80, 0x00); ++ return 0; ++} ++ ++static int M88DC2000SetSym(struct m88dc2800_state *state, u32 sym, u32 xtal) ++{ ++ u8 value; ++ u8 reg6FH, reg12H; ++ u64 fValue; ++ u32 dwValue; ++ printk("%s, sym=%d, xtal=%d\n", __func__, sym, xtal); ++ ++ fValue = 4294967296 * (sym + 10); ++ do_div(fValue, xtal); ++/* fValue = 4294967296 * (sym + 10) / xtal; */ ++ ++ dwValue = (u32)fValue; ++ printk("%s, fvalue1=%x\n", __func__, dwValue); ++ ++ WriteReg(state, 0x58, (u8)((dwValue >> 24) & 0xff)); ++ WriteReg(state, 0x57, (u8)((dwValue >> 16) & 0xff)); ++ WriteReg(state, 0x56, (u8)((dwValue >> 8) & 0xff)); ++ WriteReg(state, 0x55, (u8)((dwValue >> 0) & 0xff)); ++ ++/* fValue = 2048 * xtal / sym; */ ++ fValue = 2048 * xtal; ++ do_div(fValue, sym); ++ ++ dwValue = (u32)fValue; ++ printk("%s, fvalue2=%x\n", __func__, dwValue); ++ WriteReg(state, 0x5D, (u8)((dwValue >> 8) & 0xff)); ++ WriteReg(state, 0x5C, (u8)((dwValue >> 0) & 0xff)); ++ ++ value = ReadReg(state, 0x5A); ++ if (((dwValue >> 16) & 0x0001) == 0) ++ value &= 0x7F; ++ else ++ value |= 0x80; ++ WriteReg(state, 0x5A, value); ++ ++ value = ReadReg(state, 0x89); ++ if (sym <= 1800) ++ value |= 0x01; ++ else ++ value &= 0xFE; ++ WriteReg(state, 0x89, value); ++ ++ if (sym >= 6700){ ++ reg6FH = 0x0D; ++ reg12H = 0x30; ++ } else if (sym >= 4000) { ++ fValue = 22 * 4096 / sym; ++ reg6FH = (u8)fValue; ++ reg12H = 0x30; ++ } else if (sym >= 2000) { ++ fValue = 14 * 4096 / sym; ++ reg6FH = (u8)fValue; ++ reg12H = 0x20; ++ } else { ++ fValue = 7 * 4096 / sym; ++ reg6FH = (u8)fValue; ++ reg12H = 0x10; ++ } ++ WriteReg(state, 0x6F, reg6FH); ++ WriteReg(state, 0x12, reg12H); ++ ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ if(sym < 3000) { ++ WriteReg(state, 0x6C, 0x16); ++ WriteReg(state, 0x6D, 0x10); ++ WriteReg(state, 0x6E, 0x18); ++ } else { ++ WriteReg(state, 0x6C, 0x14); ++ WriteReg(state, 0x6D, 0x0E); ++ WriteReg(state, 0x6E, 0x36); ++ } ++ } else { ++ WriteReg(state, 0x6C, 0x16); ++ WriteReg(state, 0x6D, 0x10); ++ WriteReg(state, 0x6E, 0x18); ++ } ++ return 0; ++} ++ ++static int M88DC2000SetQAM(struct m88dc2800_state *state, u16 qam) ++{ ++ u8 reg00H, reg4AH, regC2H, reg44H, reg4CH, reg4DH, reg74H, value; ++ u8 reg8BH, reg8EH; ++ printk("%s, qam=%d\n", __func__, qam); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xF8; ++ switch(qam){ ++ case 16: /* 16 QAM */ ++ reg00H = 0x08; ++ reg4AH = 0x0F; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ WriteReg(state, 0x6E, 0x18); ++ break; ++ case 32: /* 32 QAM */ ++ reg00H = 0x18; ++ reg4AH = 0xFB; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ WriteReg(state, 0x6E, 0x18); ++ break; ++ case 64: /* 64 QAM */ ++ reg00H = 0x48; ++ reg4AH = 0xCD; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ break; ++ case 128: /* 128 QAM */ ++ reg00H = 0x28; ++ reg4AH = 0xFF; ++ regC2H |= 0x02; ++ reg44H = 0xA9; ++ reg4CH = 0x08; ++ reg4DH = 0xF5; ++ reg74H = 0x0E; ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ break; ++ case 256: /* 256 QAM */ ++ reg00H = 0x38; ++ reg4AH = 0xCD; ++ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ regC2H |= 0x02; ++ } else { ++ regC2H |= 0x01; ++ } ++ reg44H = 0xA9; ++ reg4CH = 0x08; ++ reg4DH = 0xF5; ++ reg74H = 0x0E; ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ break; ++ default: /* 64 QAM */ ++ reg00H = 0x48; ++ reg4AH = 0xCD; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ break; ++ } ++ WriteReg(state, 0x00, reg00H); ++ ++ value = ReadReg(state, 0x88); ++ value |= 0x08; ++ WriteReg(state, 0x88, value); ++ WriteReg(state, 0x4B, 0xFF); ++ WriteReg(state, 0x4A, reg4AH); ++ value &= 0xF7; ++ WriteReg(state, 0x88, value); ++ ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0x44, reg44H); ++ WriteReg(state, 0x4C, reg4CH); ++ WriteReg(state, 0x4D, reg4DH); ++ WriteReg(state, 0x74, reg74H); ++ WriteReg(state, 0x8B, reg8BH); ++ WriteReg(state, 0x8E, reg8EH); ++ return 0; ++} ++ ++static int M88DC2000WriteTuner_TC2800(struct m88dc2800_state *state, u32 freq_KHz) ++{ ++ printk("%s, freq=%d KHz\n", __func__, freq_KHz); ++ return mt_fe_tn_set_freq_tc2800(state, freq_KHz); ++} ++ ++static int m88dc2800_init(struct dvb_frontend *fe) ++{ ++ dprintk("%s()\n", __func__); ++ return 0; ++} ++ ++static int m88dc2800_set_parameters(struct dvb_frontend *fe) ++{ ++ struct dtv_frontend_properties *c = &fe->dtv_property_cache; ++ u8 is_annex_c, is_update; ++ u16 temp_qam; ++ s32 waiting_time; ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ ++ if(c->delivery_system == SYS_DVBC_ANNEX_C) ++ is_annex_c = 1; ++ else ++ is_annex_c = 0; ++ ++ switch (c->modulation) { ++ case QAM_16: ++ temp_qam = 16; ++ break; ++ case QAM_32: ++ temp_qam = 32; ++ break; ++ case QAM_128: ++ temp_qam = 128; ++ break; ++ case QAM_256: ++ temp_qam = 256; ++ break; ++ default: /* QAM_64 */ ++ temp_qam = 64; ++ break; ++ } ++ ++ if(c->inversion == INVERSION_ON) ++ state->inverted = 1; ++ else ++ state->inverted = 0; ++ ++ printk("m88dc2800: state, freq=%d qam=%d sym=%d inverted=%d xtal=%d\n", state->freq,state->qam,state->sym,state->inverted,state->xtal); ++ printk("m88dc2800: set frequency to %d qam=%d symrate=%d annex-c=%d\n", c->frequency,temp_qam,c->symbol_rate,is_annex_c); ++ ++ is_update = 0; ++ WriteReg(state, 0x80, 0x01); ++ if(c->frequency != state->freq){ ++ M88DC2000WriteTuner_TC2800(state, c->frequency/1000); ++ state->freq = c->frequency; ++ } ++ if(c->symbol_rate != state->sym){ ++ M88DC2000SetSym(state, c->symbol_rate/1000, state->xtal); ++ state->sym = c->symbol_rate; ++ is_update = 1; ++ } ++ if(temp_qam != state->qam){ ++ M88DC2000SetQAM(state, temp_qam); ++ state->qam = temp_qam; ++ is_update = 1; ++ } ++ ++ if(is_update != 0){ ++ if(state->config->ts_mode == 3) ++ M88DC2000AutoTSClock_C(state, state->sym/1000, temp_qam); ++ else ++ M88DC2000AutoTSClock_P(state, state->sym/1000, temp_qam); ++ } ++ ++ M88DC2000SetTxMode(state, state->inverted, is_annex_c); ++ M88DC2000SoftReset(state); ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) ++ waiting_time = 800; ++ else ++ waiting_time = 500; ++ while (waiting_time > 0) { ++ msleep(50); ++ waiting_time -= 50; ++ if (M88DC2000GetLock(state)) ++ return 0; ++ } ++ ++ if (state->inverted != 0) ++ state->inverted = 0; ++ else ++ state->inverted = 1; ++ M88DC2000SetTxMode(state, state->inverted, is_annex_c); ++ M88DC2000SoftReset(state); ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) ++ waiting_time = 800; ++ else ++ waiting_time = 500; ++ while (waiting_time > 0) { ++ msleep(50); ++ waiting_time -= 50; ++ if (M88DC2000GetLock(state)) ++ return 0; ++ } ++ return 0; ++} ++ ++static int m88dc2800_read_status(struct dvb_frontend* fe, fe_status_t* status) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ *status = 0; ++ ++ if (M88DC2000GetLock(state)) { ++ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER ++ | FE_HAS_SYNC|FE_HAS_VITERBI | FE_HAS_LOCK; ++ } ++ return 0; ++} ++ ++static int m88dc2800_read_ber(struct dvb_frontend* fe, u32* ber) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ u16 tmp; ++ ++ if (M88DC2000GetLock(state) == 0) { ++ state->ber = 0; ++ } else if ((ReadReg(state, 0xA0) & 0x80) != 0x80) { ++ tmp = ReadReg(state, 0xA2) << 8; ++ tmp += ReadReg(state, 0xA1); ++ state->ber = tmp; ++ WriteReg(state, 0xA0, 0x05); ++ WriteReg(state, 0xA0, 0x85); ++ } ++ *ber = state->ber; ++ return 0; ++} ++ ++static int m88dc2800_read_signal_strength(struct dvb_frontend* fe, u16* strength) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ ++ s16 tuner_strength; ++ tuner_strength = (s16)mt_fe_tn_get_signal_strength_tc2800(state); ++ ++ if(tuner_strength < -107) ++ *strength = 0; ++ else ++ *strength = tuner_strength + 107; ++ ++ return 0; ++} ++ ++static int m88dc2800_read_snr(struct dvb_frontend* fe, u16* snr) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ ++ const u32 mes_log[] = { ++ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, ++ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, 13010, ++ 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, 14624, 14771, ++ 14914, 15052, 15185, 15315, 15441, 15563, 15682, 15798, 15911, 16021, ++ 16128, 16232, 16335, 16435, 16532, 16628, 16721, 16812, 16902, 16990, ++ 17076, 17160, 17243, 17324, 17404, 17482, 17559, 17634, 17709, 17782, ++ 17853, 17924, 17993, 18062, 18129, 18195, 18261, 18325, 18388, 18451, ++ 18513, 18573, 18633, 18692, 18751, 18808, 18865, 18921, 18976, 19031 ++ }; ++ u8 i; ++ u32 _snr, mse; ++ ++ if ((ReadReg(state, 0x91)&0x23)!=0x03) { ++ *snr = 0; ++ return 0; ++ } ++ ++ mse = 0; ++ for (i=0; i<30; i++) { ++ mse += (ReadReg(state, 0x08) << 8) + ReadReg(state, 0x07); ++ } ++ mse /= 30; ++ if (mse > 80) ++ mse = 80; ++ ++ switch (state->qam) { ++ case 16: _snr = 34080; break; /* 16QAM */ ++ case 32: _snr = 37600; break; /* 32QAM */ ++ case 64: _snr = 40310; break; /* 64QAM */ ++ case 128: _snr = 43720; break; /* 128QAM */ ++ case 256: _snr = 46390; break; /* 256QAM */ ++ default: _snr = 40310; break; ++ } ++ _snr -= mes_log[mse-1]; /* C - 10*log10(MSE) */ ++ _snr /= 1000; ++ if (_snr > 0xff) ++ _snr = 0xff; ++ ++ *snr = _snr; ++ return 0; ++} ++ ++static int m88dc2800_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ u8 u8Value; ++ ++ u8Value = ReadReg(state, 0xdf); ++ u8Value |= 0x02; /* Hold */ ++ WriteReg(state, 0xdf, u8Value); ++ ++ *ucblocks = ReadReg(state, 0xd5); ++ *ucblocks = (*ucblocks << 8) | ReadReg(state, 0xd4); ++ ++ u8Value &= 0xfe; /* Clear */ ++ WriteReg(state, 0xdf, u8Value); ++ u8Value &= 0xfc; /* Update */ ++ u8Value |= 0x01; ++ WriteReg(state, 0xdf, u8Value); ++ ++ return 0; ++} ++ ++static int m88dc2800_sleep(struct dvb_frontend* fe) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ ++ mt_fe_tn_sleep_tc2800(state); ++ state->freq = 0; ++ ++ return 0; ++} ++ ++static void m88dc2800_release(struct dvb_frontend* fe) ++{ ++ struct m88dc2800_state* state = fe->demodulator_priv; ++ kfree(state); ++} ++ ++static struct dvb_frontend_ops m88dc2800_ops; ++ ++struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, ++ struct i2c_adapter* i2c) ++{ ++ struct m88dc2800_state* state = NULL; ++ ++ /* allocate memory for the internal state */ ++ state = kzalloc(sizeof(struct m88dc2800_state), GFP_KERNEL); ++ if (state == NULL) goto error; ++ ++ /* setup the state */ ++ state->config = config; ++ state->i2c = i2c; ++ state->xtal = 28800; ++ ++ WriteReg(state, 0x80, 0x01); ++ M88DC2000RegInitial_TC2800(state); ++ M88DC2000SetTsType(state, state->config->ts_mode); ++ mt_fe_tn_init_tc2800(state); ++ ++ /* create dvb_frontend */ ++ memcpy(&state->frontend.ops, &m88dc2800_ops, sizeof(struct dvb_frontend_ops)); ++ state->frontend.demodulator_priv = state; ++ return &state->frontend; ++ ++error: ++ kfree(state); ++ return NULL; ++} ++EXPORT_SYMBOL(m88dc2800_attach); ++ ++static struct dvb_frontend_ops m88dc2800_ops = { ++ .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C }, ++ .info = { ++ .name = "Montage M88DC2800 DVB-C", ++ .frequency_stepsize = 62500, ++ .frequency_min = 48000000, ++ .frequency_max = 870000000, ++ .symbol_rate_min = 870000, ++ .symbol_rate_max = 9000000, ++ .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | ++ FE_CAN_QAM_128 | FE_CAN_QAM_256 | ++ FE_CAN_FEC_AUTO ++ }, ++ ++ .release = m88dc2800_release, ++ .init = m88dc2800_init, ++ .sleep = m88dc2800_sleep, ++ .set_frontend = m88dc2800_set_parameters, ++ .read_status = m88dc2800_read_status, ++ .read_ber = m88dc2800_read_ber, ++ .read_signal_strength = m88dc2800_read_signal_strength, ++ .read_snr = m88dc2800_read_snr, ++ .read_ucblocks = m88dc2800_read_ucblocks, ++}; ++ ++MODULE_DESCRIPTION("Montage DVB-C demodulator driver"); ++MODULE_AUTHOR("Max nibble"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontends/m88dc2800.h +new file mode 100644 +index 0000000..a0a93c4 +--- /dev/null ++++ b/drivers/media/dvb-frontends/m88dc2800.h +@@ -0,0 +1,43 @@ ++/* ++ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage ++ ++ Copyright (C) 2012 Max nibble ++ Copyright (C) 2011 Montage Technology ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++*/ ++ ++#ifndef M88DC2800_H ++#define M88DC2800_H ++ ++#include ++ ++struct m88dc2800_config { ++ u8 demod_address; ++ u8 ts_mode; ++}; ++ ++#if defined(CONFIG_DVB_M88DC2800) || (defined(CONFIG_DVB_M88DC2800_MODULE) && defined(MODULE)) ++extern struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, ++ struct i2c_adapter* i2c); ++#else ++static inline struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, ++ struct i2c_adapter* i2c) ++{ ++ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); ++ return NULL; ++} ++#endif // CONFIG_DVB_M88DC2800 ++#endif // M88DC2800_H +diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c +new file mode 100644 +index 0000000..315809d +--- /dev/null ++++ b/drivers/media/dvb-frontends/m88ds3103.c +@@ -0,0 +1,1710 @@ ++/* ++ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver ++ ++ Copyright (C) 2011 Max nibble ++ Copyright (C) 2010 Montage Technology ++ Copyright (C) 2009 Konstantin Dimitrov. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "dvb_frontend.h" ++#include "m88ds3103.h" ++#include "m88ds3103_priv.h" ++ ++static int debug; ++module_param(debug, int, 0644); ++MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); ++ ++#define dprintk(args...) \ ++ do { \ ++ if (debug) \ ++ printk(KERN_INFO "m88ds3103: " args); \ ++ } while (0) ++ ++/*demod register operations.*/ ++static int m88ds3103_writereg(struct m88ds3103_state *state, int reg, int data) ++{ ++ u8 buf[] = { reg, data }; ++ struct i2c_msg msg = { .addr = state->config->demod_address, ++ .flags = 0, .buf = buf, .len = 2 }; ++ int err; ++ ++ if (debug > 1) ++ printk("m88ds3103: %s: write reg 0x%02x, value 0x%02x\n", ++ __func__, reg, data); ++ ++ err = i2c_transfer(state->i2c, &msg, 1); ++ if (err != 1) { ++ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x," ++ " value == 0x%02x)\n", __func__, err, reg, data); ++ return -EREMOTEIO; ++ } ++ return 0; ++} ++ ++static int m88ds3103_readreg(struct m88ds3103_state *state, u8 reg) ++{ ++ int ret; ++ u8 b0[] = { reg }; ++ u8 b1[] = { 0 }; ++ struct i2c_msg msg[] = { ++ { .addr = state->config->demod_address, .flags = 0, ++ .buf = b0, .len = 1 }, ++ { .addr = state->config->demod_address, .flags = I2C_M_RD, ++ .buf = b1, .len = 1 } ++ }; ++ ret = i2c_transfer(state->i2c, msg, 2); ++ ++ if (ret != 2) { ++ printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", ++ __func__, reg, ret); ++ return ret; ++ } ++ ++ if (debug > 1) ++ printk(KERN_INFO "m88ds3103: read reg 0x%02x, value 0x%02x\n", ++ reg, b1[0]); ++ ++ return b1[0]; ++} ++ ++/*tuner register operations.*/ ++static int m88ds3103_tuner_writereg(struct m88ds3103_state *state, int reg, int data) ++{ ++ u8 buf[] = { reg, data }; ++ struct i2c_msg msg = { .addr = 0x60, ++ .flags = 0, .buf = buf, .len = 2 }; ++ int err; ++ ++ m88ds3103_writereg(state, 0x03, 0x11); ++ err = i2c_transfer(state->i2c, &msg, 1); ++ ++ if (err != 1) { ++ printk("%s: writereg error(err == %i, reg == 0x%02x," ++ " value == 0x%02x)\n", __func__, err, reg, data); ++ return -EREMOTEIO; ++ } ++ ++ return 0; ++} ++ ++static int m88ds3103_tuner_readreg(struct m88ds3103_state *state, u8 reg) ++{ ++ int ret; ++ u8 b0[] = { reg }; ++ u8 b1[] = { 0 }; ++ struct i2c_msg msg[] = { ++ { .addr = 0x60, .flags = 0, ++ .buf = b0, .len = 1 }, ++ { .addr = 0x60, .flags = I2C_M_RD, ++ .buf = b1, .len = 1 } ++ }; ++ ++ m88ds3103_writereg(state, 0x03, 0x11); ++ ret = i2c_transfer(state->i2c, msg, 2); ++ ++ if (ret != 2) { ++ printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret); ++ return ret; ++ } ++ ++ return b1[0]; ++} ++ ++/* Bulk demod I2C write, for firmware download. */ ++static int m88ds3103_writeregN(struct m88ds3103_state *state, int reg, ++ const u8 *data, u16 len) ++{ ++ int ret = -EREMOTEIO; ++ struct i2c_msg msg; ++ u8 *buf; ++ ++ buf = kmalloc(len + 1, GFP_KERNEL); ++ if (buf == NULL) { ++ printk("Unable to kmalloc\n"); ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ *(buf) = reg; ++ memcpy(buf + 1, data, len); ++ ++ msg.addr = state->config->demod_address; ++ msg.flags = 0; ++ msg.buf = buf; ++ msg.len = len + 1; ++ ++ if (debug > 1) ++ printk(KERN_INFO "m88ds3103: %s: write regN 0x%02x, len = %d\n", ++ __func__, reg, len); ++ ++ ret = i2c_transfer(state->i2c, &msg, 1); ++ if (ret != 1) { ++ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n", ++ __func__, ret, reg); ++ ret = -EREMOTEIO; ++ } ++ ++error: ++ kfree(buf); ++ ++ return ret; ++} ++ ++static int m88ds3103_load_firmware(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ const struct firmware *fw; ++ int i, ret = 0; ++ ++ dprintk("%s()\n", __func__); ++ ++ if (state->skip_fw_load) ++ return 0; ++ /* Load firmware */ ++ /* request the firmware, this will block until someone uploads it */ ++ if(state->demod_id == DS3000_ID){ ++ printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, ++ DS3000_DEFAULT_FIRMWARE); ++ ret = request_firmware(&fw, DS3000_DEFAULT_FIRMWARE, ++ state->i2c->dev.parent); ++ }else if(state->demod_id == DS3103_ID){ ++ printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, ++ DS3103_DEFAULT_FIRMWARE); ++ ret = request_firmware(&fw, DS3103_DEFAULT_FIRMWARE, ++ state->i2c->dev.parent); ++ } ++ ++ printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__); ++ if (ret) { ++ printk(KERN_ERR "%s: No firmware uploaded (timeout or file not " ++ "found?)\n", __func__); ++ return ret; ++ } ++ ++ /* Make sure we don't recurse back through here during loading */ ++ state->skip_fw_load = 1; ++ ++ dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n", ++ fw->size, ++ fw->data[0], ++ fw->data[1], ++ fw->data[fw->size - 2], ++ fw->data[fw->size - 1]); ++ ++ /* stop internal mcu. */ ++ m88ds3103_writereg(state, 0xb2, 0x01); ++ /* split firmware to download.*/ ++ for(i = 0; i < FW_DOWN_LOOP; i++){ ++ ret = m88ds3103_writeregN(state, 0xb0, &(fw->data[FW_DOWN_SIZE*i]), FW_DOWN_SIZE); ++ if(ret != 1) break; ++ } ++ /* start internal mcu. */ ++ if(ret == 1) ++ m88ds3103_writereg(state, 0xb2, 0x00); ++ ++ release_firmware(fw); ++ ++ dprintk("%s: Firmware upload %s\n", __func__, ++ ret == 1 ? "complete" : "failed"); ++ ++ if(ret == 1) ret = 0; ++ ++ /* Ensure firmware is always loaded if required */ ++ state->skip_fw_load = 0; ++ ++ return ret; ++} ++ ++ ++static int m88ds3103_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 data; ++ ++ dprintk("%s(%d)\n", __func__, voltage); ++ ++ dprintk("m88ds3103:pin_ctrl = (%02x)\n", state->config->pin_ctrl); ++ ++ if(state->config->set_voltage) ++ state->config->set_voltage(fe, voltage); ++ ++ data = m88ds3103_readreg(state, 0xa2); ++ ++ if(state->config->pin_ctrl & 0x80){ /*If control pin is assigned.*/ ++ data &= ~0x03; /* bit0 V/H, bit1 off/on */ ++ if(state->config->pin_ctrl & 0x02) ++ data |= 0x02; ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_18: ++ if((state->config->pin_ctrl & 0x01) == 0) ++ data |= 0x01; ++ break; ++ case SEC_VOLTAGE_13: ++ if(state->config->pin_ctrl & 0x01) ++ data |= 0x01; ++ break; ++ case SEC_VOLTAGE_OFF: ++ if(state->config->pin_ctrl & 0x02) ++ data &= ~0x02; ++ else ++ data |= 0x02; ++ break; ++ } ++ } ++ ++ m88ds3103_writereg(state, 0xa2, data); ++ ++ return 0; ++} ++ ++static int m88ds3103_read_status(struct dvb_frontend *fe, fe_status_t* status) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ int lock = 0; ++ ++ *status = 0; ++ ++ switch (state->delivery_system){ ++ case SYS_DVBS: ++ lock = m88ds3103_readreg(state, 0xd1); ++ dprintk("%s: SYS_DVBS status=%x.\n", __func__, lock); ++ ++ if ((lock & 0x07) == 0x07){ ++ /*if((m88ds3103_readreg(state, 0x0d) & 0x07) == 0x07)*/ ++ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER ++ | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; ++ ++ } ++ break; ++ case SYS_DVBS2: ++ lock = m88ds3103_readreg(state, 0x0d); ++ dprintk("%s: SYS_DVBS2 status=%x.\n", __func__, lock); ++ ++ if ((lock & 0x8f) == 0x8f) ++ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER ++ | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; ++ ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static int m88ds3103_read_ber(struct dvb_frontend *fe, u32* ber) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 tmp1, tmp2, tmp3; ++ u32 ldpc_frame_cnt, pre_err_packags, code_rate_fac = 0; ++ ++ dprintk("%s()\n", __func__); ++ ++ switch (state->delivery_system) { ++ case SYS_DVBS: ++ m88ds3103_writereg(state, 0xf9, 0x04); ++ tmp3 = m88ds3103_readreg(state, 0xf8); ++ if ((tmp3&0x10) == 0){ ++ tmp1 = m88ds3103_readreg(state, 0xf7); ++ tmp2 = m88ds3103_readreg(state, 0xf6); ++ tmp3 |= 0x10; ++ m88ds3103_writereg(state, 0xf8, tmp3); ++ state->preBer = (tmp1<<8) | tmp2; ++ } ++ break; ++ case SYS_DVBS2: ++ tmp1 = m88ds3103_readreg(state, 0x7e) & 0x0f; ++ switch(tmp1){ ++ case 0: code_rate_fac = 16008 - 80; break; ++ case 1: code_rate_fac = 21408 - 80; break; ++ case 2: code_rate_fac = 25728 - 80; break; ++ case 3: code_rate_fac = 32208 - 80; break; ++ case 4: code_rate_fac = 38688 - 80; break; ++ case 5: code_rate_fac = 43040 - 80; break; ++ case 6: code_rate_fac = 48408 - 80; break; ++ case 7: code_rate_fac = 51648 - 80; break; ++ case 8: code_rate_fac = 53840 - 80; break; ++ case 9: code_rate_fac = 57472 - 80; break; ++ case 10: code_rate_fac = 58192 - 80; break; ++ } ++ ++ tmp1 = m88ds3103_readreg(state, 0xd7) & 0xff; ++ tmp2 = m88ds3103_readreg(state, 0xd6) & 0xff; ++ tmp3 = m88ds3103_readreg(state, 0xd5) & 0xff; ++ ldpc_frame_cnt = (tmp1 << 16) | (tmp2 << 8) | tmp3; ++ ++ tmp1 = m88ds3103_readreg(state, 0xf8) & 0xff; ++ tmp2 = m88ds3103_readreg(state, 0xf7) & 0xff; ++ pre_err_packags = tmp1<<8 | tmp2; ++ ++ if (ldpc_frame_cnt > 1000){ ++ m88ds3103_writereg(state, 0xd1, 0x01); ++ m88ds3103_writereg(state, 0xf9, 0x01); ++ m88ds3103_writereg(state, 0xf9, 0x00); ++ m88ds3103_writereg(state, 0xd1, 0x00); ++ state->preBer = pre_err_packags; ++ } ++ break; ++ default: ++ break; ++ } ++ *ber = state->preBer; ++ ++ return 0; ++} ++ ++static int m88ds3103_read_signal_strength(struct dvb_frontend *fe, ++ u16 *signal_strength) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u16 gain; ++ u8 gain1, gain2, gain3 = 0; ++ ++ dprintk("%s()\n", __func__); ++ ++ gain1 = m88ds3103_tuner_readreg(state, 0x3d) & 0x1f; ++ dprintk("%s: gain1 = 0x%02x \n", __func__, gain1); ++ ++ if (gain1 > 15) gain1 = 15; ++ gain2 = m88ds3103_tuner_readreg(state, 0x21) & 0x1f; ++ dprintk("%s: gain2 = 0x%02x \n", __func__, gain2); ++ ++ if(state->tuner_id == TS2022_ID){ ++ gain3 = (m88ds3103_tuner_readreg(state, 0x66)>>3) & 0x07; ++ dprintk("%s: gain3 = 0x%02x \n", __func__, gain3); ++ ++ if (gain2 > 16) gain2 = 16; ++ if (gain2 < 2) gain2 = 2; ++ if (gain3 > 6) gain3 = 6; ++ }else{ ++ if (gain2 > 13) gain2 = 13; ++ gain3 = 0; ++ } ++ ++ gain = gain1*23 + gain2*35 + gain3*29; ++ *signal_strength = 60000 - gain*55; ++ ++ return 0; ++} ++ ++ ++static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *p_snr) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 val, npow1, npow2, spow1, cnt; ++ u16 tmp, snr; ++ u32 npow, spow, snr_total; ++ static const u16 mes_log10[] ={ ++ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, ++ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, 13010, ++ 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, 14624, 14771, ++ 14914, 15052, 15185, 15315, 15441, 15563, 15682, 15798, 15911, 16021, ++ 16128, 16232, 16335, 16435, 16532, 16628, 16721, 16812, 16902, 16990, ++ 17076, 17160, 17243, 17324, 17404, 17482, 17559, 17634, 17709, 17782, ++ 17853, 17924, 17993, 18062, 18129, 18195, 18261, 18325, 18388, 18451, ++ 18513, 18573, 18633, 18692, 18751, 18808, 18865, 18921, 18976, 19031 ++ }; ++ static const u16 mes_loge[] ={ ++ 0, 6931, 10986, 13863, 16094, 17918, 19459, 20794, 21972, 23026, ++ 23979, 24849, 25649, 26391, 27081, 27726, 28332, 28904, 29444, 29957, ++ 30445, 30910, 31355, 31781, 32189, 32581, 32958, 33322, 33673, 34012, ++ 34340, 34657, ++ }; ++ ++ dprintk("%s()\n", __func__); ++ ++ snr = 0; ++ ++ switch (state->delivery_system){ ++ case SYS_DVBS: ++ cnt = 10; snr_total = 0; ++ while(cnt > 0){ ++ val = m88ds3103_readreg(state, 0xff); ++ snr_total += val; ++ cnt--; ++ } ++ tmp = (u16)(snr_total/80); ++ if(tmp > 0){ ++ if (tmp > 32) tmp = 32; ++ snr = (mes_loge[tmp - 1] * 100) / 45; ++ }else{ ++ snr = 0; ++ } ++ break; ++ case SYS_DVBS2: ++ cnt = 10; npow = 0; spow = 0; ++ while(cnt >0){ ++ npow1 = m88ds3103_readreg(state, 0x8c) & 0xff; ++ npow2 = m88ds3103_readreg(state, 0x8d) & 0xff; ++ npow += (((npow1 & 0x3f) + (u16)(npow2 << 6)) >> 2); ++ ++ spow1 = m88ds3103_readreg(state, 0x8e) & 0xff; ++ spow += ((spow1 * spow1) >> 1); ++ cnt--; ++ } ++ npow /= 10; spow /= 10; ++ if(spow == 0){ ++ snr = 0; ++ }else if(npow == 0){ ++ snr = 19; ++ }else{ ++ if(spow > npow){ ++ tmp = (u16)(spow / npow); ++ if (tmp > 80) tmp = 80; ++ snr = mes_log10[tmp - 1]*3; ++ }else{ ++ tmp = (u16)(npow / spow); ++ if (tmp > 80) tmp = 80; ++ snr = -(mes_log10[tmp - 1] / 1000); ++ } ++ } ++ break; ++ default: ++ break; ++ } ++ *p_snr = snr; ++ ++ return 0; ++} ++ ++ ++static int m88ds3103_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 tmp1, tmp2, tmp3, data; ++ ++ dprintk("%s()\n", __func__); ++ ++ switch (state->delivery_system) { ++ case SYS_DVBS: ++ data = m88ds3103_readreg(state, 0xf8); ++ data |= 0x40; ++ m88ds3103_writereg(state, 0xf8, data); ++ tmp1 = m88ds3103_readreg(state, 0xf5); ++ tmp2 = m88ds3103_readreg(state, 0xf4); ++ *ucblocks = (tmp1 <<8) | tmp2; ++ data &= ~0x20; ++ m88ds3103_writereg(state, 0xf8, data); ++ data |= 0x20; ++ m88ds3103_writereg(state, 0xf8, data); ++ data &= ~0x40; ++ m88ds3103_writereg(state, 0xf8, data); ++ break; ++ case SYS_DVBS2: ++ tmp1 = m88ds3103_readreg(state, 0xda); ++ tmp2 = m88ds3103_readreg(state, 0xd9); ++ tmp3 = m88ds3103_readreg(state, 0xd8); ++ *ucblocks = (tmp1 <<16)|(tmp2 <<8)|tmp3; ++ data = m88ds3103_readreg(state, 0xd1); ++ data |= 0x01; ++ m88ds3103_writereg(state, 0xd1, data); ++ data &= ~0x01; ++ m88ds3103_writereg(state, 0xd1, data); ++ break; ++ default: ++ break; ++ } ++ return 0; ++} ++ ++static int m88ds3103_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 data_a1, data_a2; ++ ++ dprintk("%s(%d)\n", __func__, tone); ++ if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { ++ printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone); ++ return -EINVAL; ++ } ++ ++ data_a1 = m88ds3103_readreg(state, 0xa1); ++ data_a2 = m88ds3103_readreg(state, 0xa2); ++ if(state->demod_id == DS3103_ID) ++ data_a2 &= 0xdf; /* Normal mode */ ++ switch (tone) { ++ case SEC_TONE_ON: ++ dprintk("%s: SEC_TONE_ON\n", __func__); ++ data_a1 |= 0x04; ++ data_a1 &= ~0x03; ++ data_a1 &= ~0x40; ++ data_a2 &= ~0xc0; ++ break; ++ case SEC_TONE_OFF: ++ dprintk("%s: SEC_TONE_OFF\n", __func__); ++ data_a2 &= ~0xc0; ++ data_a2 |= 0x80; ++ break; ++ } ++ m88ds3103_writereg(state, 0xa2, data_a2); ++ m88ds3103_writereg(state, 0xa1, data_a1); ++ return 0; ++} ++ ++static int m88ds3103_send_diseqc_msg(struct dvb_frontend *fe, ++ struct dvb_diseqc_master_cmd *d) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ int i, ret = 0; ++ u8 tmp, time_out; ++ ++ /* Dump DiSEqC message */ ++ if (debug) { ++ printk(KERN_INFO "m88ds3103: %s(", __func__); ++ for (i = 0 ; i < d->msg_len ;) { ++ printk(KERN_INFO "0x%02x", d->msg[i]); ++ if (++i < d->msg_len) ++ printk(KERN_INFO ", "); ++ } ++ } ++ ++ tmp = m88ds3103_readreg(state, 0xa2); ++ tmp &= ~0xc0; ++ if(state->demod_id == DS3103_ID) ++ tmp &= ~0x20; ++ m88ds3103_writereg(state, 0xa2, tmp); ++ ++ for (i = 0; i < d->msg_len; i ++) ++ m88ds3103_writereg(state, (0xa3+i), d->msg[i]); ++ ++ tmp = m88ds3103_readreg(state, 0xa1); ++ tmp &= ~0x38; ++ tmp &= ~0x40; ++ tmp |= ((d->msg_len-1) << 3) | 0x07; ++ tmp &= ~0x80; ++ m88ds3103_writereg(state, 0xa1, tmp); ++ /* 1.5 * 9 * 8 = 108ms */ ++ time_out = 150; ++ while (time_out > 0){ ++ msleep(10); ++ time_out -= 10; ++ tmp = m88ds3103_readreg(state, 0xa1); ++ if ((tmp & 0x40) == 0) ++ break; ++ } ++ if (time_out == 0){ ++ tmp = m88ds3103_readreg(state, 0xa1); ++ tmp &= ~0x80; ++ tmp |= 0x40; ++ m88ds3103_writereg(state, 0xa1, tmp); ++ ret = 1; ++ } ++ tmp = m88ds3103_readreg(state, 0xa2); ++ tmp &= ~0xc0; ++ tmp |= 0x80; ++ m88ds3103_writereg(state, 0xa2, tmp); ++ return ret; ++} ++ ++ ++static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe, ++ fe_sec_mini_cmd_t burst) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 val, time_out; ++ ++ dprintk("%s()\n", __func__); ++ ++ val = m88ds3103_readreg(state, 0xa2); ++ val &= ~0xc0; ++ if(state->demod_id == DS3103_ID) ++ val &= 0xdf; /* Normal mode */ ++ m88ds3103_writereg(state, 0xa2, val); ++ /* DiSEqC burst */ ++ if (burst == SEC_MINI_B) ++ m88ds3103_writereg(state, 0xa1, 0x01); ++ else ++ m88ds3103_writereg(state, 0xa1, 0x02); ++ ++ msleep(13); ++ ++ time_out = 5; ++ do{ ++ val = m88ds3103_readreg(state, 0xa1); ++ if ((val & 0x40) == 0) ++ break; ++ msleep(1); ++ time_out --; ++ } while (time_out > 0); ++ ++ val = m88ds3103_readreg(state, 0xa2); ++ val &= ~0xc0; ++ val |= 0x80; ++ m88ds3103_writereg(state, 0xa2, val); ++ ++ return 0; ++} ++ ++static void m88ds3103_release(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ ++ dprintk("%s\n", __func__); ++ kfree(state); ++} ++ ++static int m88ds3103_check_id(struct m88ds3103_state *state) ++{ ++ int val_00, val_01; ++ ++ /*check demod id*/ ++ val_01 = m88ds3103_readreg(state, 0x01); ++ printk(KERN_INFO "DS3000 chip version: %x attached.\n", val_01); ++ ++ if(val_01 == 0xD0) ++ state->demod_id = DS3103_ID; ++ else if(val_01 == 0xC0) ++ state->demod_id = DS3000_ID; ++ else ++ state->demod_id = UNKNOW_ID; ++ ++ /*check tuner id*/ ++ val_00 = m88ds3103_tuner_readreg(state, 0x00); ++ printk(KERN_INFO "TS202x chip version[1]: %x attached.\n", val_00); ++ val_00 &= 0x03; ++ if(val_00 == 0) ++ { ++ m88ds3103_tuner_writereg(state, 0x00, 0x01); ++ msleep(3); ++ } ++ m88ds3103_tuner_writereg(state, 0x00, 0x03); ++ msleep(5); ++ ++ val_00 = m88ds3103_tuner_readreg(state, 0x00); ++ printk(KERN_INFO "TS202x chip version[2]: %x attached.\n", val_00); ++ val_00 &= 0xff; ++ if((val_00 == 0x01) || (val_00 == 0x41) || (val_00 == 0x81)) ++ state->tuner_id = TS2020_ID; ++ else if(((val_00 & 0xc0)== 0xc0) || (val_00 == 0x83)) ++ state->tuner_id = TS2022_ID; ++ else ++ state->tuner_id = UNKNOW_ID; ++ ++ return state->demod_id; ++} ++ ++static struct dvb_frontend_ops m88ds3103_ops; ++static int m88ds3103_initilaze(struct dvb_frontend *fe); ++ ++struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *config, ++ struct i2c_adapter *i2c) ++{ ++ struct m88ds3103_state *state = NULL; ++ ++ dprintk("%s\n", __func__); ++ ++ /* allocate memory for the internal state */ ++ state = kzalloc(sizeof(struct m88ds3103_state), GFP_KERNEL); ++ if (state == NULL) { ++ printk(KERN_ERR "Unable to kmalloc\n"); ++ goto error2; ++ } ++ ++ state->config = config; ++ state->i2c = i2c; ++ state->preBer = 0xffff; ++ state->delivery_system = SYS_DVBS; /*Default to DVB-S.*/ ++ ++ /* check demod id */ ++ if(m88ds3103_check_id(state) == UNKNOW_ID){ ++ printk(KERN_ERR "Unable to find Montage chip\n"); ++ goto error3; ++ } ++ ++ memcpy(&state->frontend.ops, &m88ds3103_ops, ++ sizeof(struct dvb_frontend_ops)); ++ state->frontend.demodulator_priv = state; ++ ++ m88ds3103_initilaze(&state->frontend); ++ ++ return &state->frontend; ++ ++error3: ++ kfree(state); ++error2: ++ return NULL; ++} ++EXPORT_SYMBOL(m88ds3103_attach); ++ ++static int m88ds3103_set_carrier_offset(struct dvb_frontend *fe, ++ s32 carrier_offset_khz) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ s32 tmp; ++ ++ tmp = carrier_offset_khz; ++ tmp *= 65536; ++ ++ tmp = (2*tmp + MT_FE_MCLK_KHZ) / (2*MT_FE_MCLK_KHZ); ++ ++ if (tmp < 0) ++ tmp += 65536; ++ ++ m88ds3103_writereg(state, 0x5f, tmp >> 8); ++ m88ds3103_writereg(state, 0x5e, tmp & 0xff); ++ ++ return 0; ++} ++ ++static int m88ds3103_set_symrate(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ struct dtv_frontend_properties *c = &fe->dtv_property_cache; ++ u16 value; ++ ++ value = (((c->symbol_rate / 1000) << 15) + (MT_FE_MCLK_KHZ / 4)) / (MT_FE_MCLK_KHZ / 2); ++ m88ds3103_writereg(state, 0x61, value & 0x00ff); ++ m88ds3103_writereg(state, 0x62, (value & 0xff00) >> 8); ++ ++ return 0; ++} ++ ++static int m88ds3103_set_CCI(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 tmp; ++ ++ tmp = m88ds3103_readreg(state, 0x56); ++ tmp &= ~0x01; ++ m88ds3103_writereg(state, 0x56, tmp); ++ ++ tmp = m88ds3103_readreg(state, 0x76); ++ tmp &= ~0x80; ++ m88ds3103_writereg(state, 0x76, tmp); ++ ++ return 0; ++} ++ ++static int m88ds3103_init_reg(struct m88ds3103_state *state, const u8 *p_reg_tab, u32 size) ++{ ++ u32 i; ++ ++ for(i = 0; i < size; i+=2) ++ m88ds3103_writereg(state, p_reg_tab[i], p_reg_tab[i+1]); ++ ++ return 0; ++} ++ ++static int m88ds3103_get_locked_sym_rate(struct m88ds3103_state *state, u32 *sym_rate_KSs) ++{ ++ u16 tmp; ++ u32 sym_rate_tmp; ++ u8 val_0x6d, val_0x6e; ++ ++ val_0x6d = m88ds3103_readreg(state, 0x6d); ++ val_0x6e = m88ds3103_readreg(state, 0x6e); ++ ++ tmp = (u16)((val_0x6e<<8) | val_0x6d); ++ ++ sym_rate_tmp = (u32)(tmp * MT_FE_MCLK_KHZ); ++ sym_rate_tmp = (u32)(sym_rate_tmp / (1<<16)); ++ *sym_rate_KSs = sym_rate_tmp; ++ ++ return 0; ++} ++ ++static int m88ds3103_get_channel_info(struct m88ds3103_state *state, u8 *p_mode, u8 *p_coderate) ++{ ++ u8 tmp, val_0x7E; ++ ++ if(state->delivery_system == SYS_DVBS2){ ++ val_0x7E = m88ds3103_readreg(state, 0x7e); ++ tmp = (u8)((val_0x7E&0xC0) >> 6); ++ *p_mode = tmp; ++ tmp = (u8)(val_0x7E & 0x0f); ++ *p_coderate = tmp; ++ } else { ++ *p_mode = 0; ++ tmp = m88ds3103_readreg(state, 0xe6); ++ tmp = (u8)(tmp >> 5); ++ *p_coderate = tmp; ++ } ++ ++ return 0; ++} ++ ++static int m88ds3103_set_clock_ratio(struct m88ds3103_state *state) ++{ ++ u8 val, mod_fac, tmp1, tmp2; ++ u32 input_datarate, locked_sym_rate_KSs; ++ u32 MClk_KHz = 96000; ++ u8 mod_mode, code_rate, divid_ratio = 0; ++ ++ locked_sym_rate_KSs = 0; ++ m88ds3103_get_locked_sym_rate(state, &locked_sym_rate_KSs); ++ if(locked_sym_rate_KSs == 0) ++ return 0; ++ ++ m88ds3103_get_channel_info(state, &mod_mode, &code_rate); ++ ++ if (state->delivery_system == SYS_DVBS2) ++ { ++ switch(mod_mode) { ++ case 1: mod_fac = 3; break; ++ case 2: mod_fac = 4; break; ++ case 3: mod_fac = 5; break; ++ default: mod_fac = 2; break; ++ } ++ ++ switch(code_rate) { ++ case 0: input_datarate = locked_sym_rate_KSs*mod_fac/8/4; break; ++ case 1: input_datarate = locked_sym_rate_KSs*mod_fac/8/3; break; ++ case 2: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/5; break; ++ case 3: input_datarate = locked_sym_rate_KSs*mod_fac/8/2; break; ++ case 4: input_datarate = locked_sym_rate_KSs*mod_fac*3/8/5; break; ++ case 5: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/3; break; ++ case 6: input_datarate = locked_sym_rate_KSs*mod_fac*3/8/4; break; ++ case 7: input_datarate = locked_sym_rate_KSs*mod_fac*4/8/5; break; ++ case 8: input_datarate = locked_sym_rate_KSs*mod_fac*5/8/6; break; ++ case 9: input_datarate = locked_sym_rate_KSs*mod_fac*8/8/9; break; ++ case 10: input_datarate = locked_sym_rate_KSs*mod_fac*9/8/10; break; ++ default: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/3; break; ++ } ++ ++ if(state->demod_id == DS3000_ID) ++ input_datarate = input_datarate * 115 / 100; ++ ++ if(input_datarate < 4800) {tmp1 = 15;tmp2 = 15;} //4.8MHz TS clock ++ else if(input_datarate < 4966) {tmp1 = 14;tmp2 = 15;} //4.966MHz TS clock ++ else if(input_datarate < 5143) {tmp1 = 14;tmp2 = 14;} //5.143MHz TS clock ++ else if(input_datarate < 5333) {tmp1 = 13;tmp2 = 14;} //5.333MHz TS clock ++ else if(input_datarate < 5538) {tmp1 = 13;tmp2 = 13;} //5.538MHz TS clock ++ else if(input_datarate < 5760) {tmp1 = 12;tmp2 = 13;} //5.76MHz TS clock allan 0809 ++ else if(input_datarate < 6000) {tmp1 = 12;tmp2 = 12;} //6MHz TS clock ++ else if(input_datarate < 6260) {tmp1 = 11;tmp2 = 12;} //6.26MHz TS clock ++ else if(input_datarate < 6545) {tmp1 = 11;tmp2 = 11;} //6.545MHz TS clock ++ else if(input_datarate < 6857) {tmp1 = 10;tmp2 = 11;} //6.857MHz TS clock ++ else if(input_datarate < 7200) {tmp1 = 10;tmp2 = 10;} //7.2MHz TS clock ++ else if(input_datarate < 7578) {tmp1 = 9;tmp2 = 10;} //7.578MHz TS clock ++ else if(input_datarate < 8000) {tmp1 = 9;tmp2 = 9;} //8MHz TS clock ++ else if(input_datarate < 8470) {tmp1 = 8;tmp2 = 9;} //8.47MHz TS clock ++ else if(input_datarate < 9000) {tmp1 = 8;tmp2 = 8;} //9MHz TS clock ++ else if(input_datarate < 9600) {tmp1 = 7;tmp2 = 8;} //9.6MHz TS clock ++ else if(input_datarate < 10285) {tmp1 = 7;tmp2 = 7;} //10.285MHz TS clock ++ else if(input_datarate < 12000) {tmp1 = 6;tmp2 = 6;} //12MHz TS clock ++ else if(input_datarate < 14400) {tmp1 = 5;tmp2 = 5;} //14.4MHz TS clock ++ else if(input_datarate < 18000) {tmp1 = 4;tmp2 = 4;} //18MHz TS clock ++ else {tmp1 = 3;tmp2 = 3;} //24MHz TS clock ++ ++ if(state->demod_id == DS3000_ID) { ++ val = (u8)((tmp1<<4) + tmp2); ++ m88ds3103_writereg(state, 0xfe, val); ++ } else { ++ tmp1 = m88ds3103_readreg(state, 0x22); ++ tmp2 = m88ds3103_readreg(state, 0x24); ++ ++ tmp1 >>= 6; ++ tmp1 &= 0x03; ++ tmp2 >>= 6; ++ tmp2 &= 0x03; ++ ++ if((tmp1 == 0x00) && (tmp2 == 0x01)) ++ MClk_KHz = 144000; ++ else if((tmp1 == 0x00) && (tmp2 == 0x03)) ++ MClk_KHz = 72000; ++ else if((tmp1 == 0x01) && (tmp2 == 0x01)) ++ MClk_KHz = 115200; ++ else if((tmp1 == 0x02) && (tmp2 == 0x01)) ++ MClk_KHz = 96000; ++ else if((tmp1 == 0x03) && (tmp2 == 0x00)) ++ MClk_KHz = 192000; ++ else ++ return 0; ++ ++ if(input_datarate < 5200) /*Max. 2011-12-23 11:55*/ ++ input_datarate = 5200; ++ ++ if(input_datarate != 0) ++ divid_ratio = (u8)(MClk_KHz / input_datarate); ++ else ++ divid_ratio = 0xFF; ++ ++ if(divid_ratio > 128) ++ divid_ratio = 128; ++ ++ if(divid_ratio < 2) ++ divid_ratio = 2; ++ ++ tmp1 = (u8)(divid_ratio / 2); ++ tmp2 = (u8)(divid_ratio / 2); ++ ++ if((divid_ratio % 2) != 0) ++ tmp2 += 1; ++ ++ tmp1 -= 1; ++ tmp2 -= 1; ++ ++ tmp1 &= 0x3f; ++ tmp2 &= 0x3f; ++ ++ val = m88ds3103_readreg(state, 0xfe); ++ val &= 0xF0; ++ val |= (tmp2 >> 2) & 0x0f; ++ m88ds3103_writereg(state, 0xfe, val); ++ ++ val = (u8)((tmp2 & 0x03) << 6); ++ val |= tmp1; ++ m88ds3103_writereg(state, 0xea, val); ++ } ++ } else { ++ mod_fac = 2; ++ ++ switch(code_rate) { ++ case 4: input_datarate = locked_sym_rate_KSs*mod_fac/2/8; break; ++ case 3: input_datarate = locked_sym_rate_KSs*mod_fac*2/3/8; break; ++ case 2: input_datarate = locked_sym_rate_KSs*mod_fac*3/4/8; break; ++ case 1: input_datarate = locked_sym_rate_KSs*mod_fac*5/6/8; break; ++ case 0: input_datarate = locked_sym_rate_KSs*mod_fac*7/8/8; break; ++ default: input_datarate = locked_sym_rate_KSs*mod_fac*3/4/8; break; ++ } ++ ++ if(state->demod_id == DS3000_ID) ++ input_datarate = input_datarate * 115 / 100; ++ ++ if(input_datarate < 6857) {tmp1 = 7;tmp2 = 7;} //6.857MHz TS clock ++ else if(input_datarate < 7384) {tmp1 = 6;tmp2 = 7;} //7.384MHz TS clock ++ else if(input_datarate < 8000) {tmp1 = 6;tmp2 = 6;} //8MHz TS clock ++ else if(input_datarate < 8727) {tmp1 = 5;tmp2 = 6;} //8.727MHz TS clock ++ else if(input_datarate < 9600) {tmp1 = 5;tmp2 = 5;} //9.6MHz TS clock ++ else if(input_datarate < 10666) {tmp1 = 4;tmp2 = 5;} //10.666MHz TS clock ++ else if(input_datarate < 12000) {tmp1 = 4;tmp2 = 4;} //12MHz TS clock ++ else if(input_datarate < 13714) {tmp1 = 3;tmp2 = 4;} //13.714MHz TS clock ++ else if(input_datarate < 16000) {tmp1 = 3;tmp2 = 3;} //16MHz TS clock ++ else if(input_datarate < 19200) {tmp1 = 2;tmp2 = 3;} //19.2MHz TS clock ++ else {tmp1 = 2;tmp2 = 2;} //24MHz TS clock ++ ++ if(state->demod_id == DS3000_ID) { ++ val = m88ds3103_readreg(state, 0xfe); ++ val &= 0xc0; ++ val |= ((u8)((tmp1<<3) + tmp2)); ++ m88ds3103_writereg(state, 0xfe, val); ++ } else { ++ if(input_datarate < 5200) /*Max. 2011-12-23 11:55*/ ++ input_datarate = 5200; ++ ++ if(input_datarate != 0) ++ divid_ratio = (u8)(MClk_KHz / input_datarate); ++ else ++ divid_ratio = 0xFF; ++ ++ if(divid_ratio > 128) ++ divid_ratio = 128; ++ ++ if(divid_ratio < 2) ++ divid_ratio = 2; ++ ++ tmp1 = (u8)(divid_ratio / 2); ++ tmp2 = (u8)(divid_ratio / 2); ++ ++ if((divid_ratio % 2) != 0) ++ tmp2 += 1; ++ ++ tmp1 -= 1; ++ tmp2 -= 1; ++ ++ tmp1 &= 0x3f; ++ tmp2 &= 0x3f; ++ ++ val = m88ds3103_readreg(state, 0xfe); ++ val &= 0xF0; ++ val |= (tmp2 >> 2) & 0x0f; ++ m88ds3103_writereg(state, 0xfe, val); ++ ++ val = (u8)((tmp2 & 0x03) << 6); ++ val |= tmp1; ++ m88ds3103_writereg(state, 0xea, val); ++ } ++ } ++ return 0; ++} ++ ++static int m88ds3103_demod_connect(struct dvb_frontend *fe, s32 carrier_offset_khz) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ struct dtv_frontend_properties *c = &fe->dtv_property_cache; ++ u16 value; ++ u8 val1,val2,data; ++ ++ dprintk("connect delivery system = %d\n", state->delivery_system); ++ ++ /* ds3000 global reset */ ++ m88ds3103_writereg(state, 0x07, 0x80); ++ m88ds3103_writereg(state, 0x07, 0x00); ++ /* ds3000 build-in uC reset */ ++ m88ds3103_writereg(state, 0xb2, 0x01); ++ /* ds3000 software reset */ ++ m88ds3103_writereg(state, 0x00, 0x01); ++ ++ switch (state->delivery_system) { ++ case SYS_DVBS: ++ /* initialise the demod in DVB-S mode */ ++ if(state->demod_id == DS3000_ID){ ++ m88ds3103_init_reg(state, ds3000_dvbs_init_tab, sizeof(ds3000_dvbs_init_tab)); ++ ++ value = m88ds3103_readreg(state, 0xfe); ++ value &= 0xc0; ++ value |= 0x1b; ++ m88ds3103_writereg(state, 0xfe, value); ++ ++ if(state->config->ci_mode) ++ val1 = 0x80; ++ else if(state->config->ts_mode) ++ val1 = 0x60; ++ else ++ val1 = 0x20; ++ m88ds3103_writereg(state, 0xfd, val1); ++ ++ }else if(state->demod_id == DS3103_ID){ ++ m88ds3103_init_reg(state, ds3103_dvbs_init_tab, sizeof(ds3103_dvbs_init_tab)); ++ ++ /* set ts clock */ ++ if(state->config->ci_mode == 2){ ++ val1 = 6; val2 = 6; ++ }else if(state->config->ts_mode == 0) { ++ val1 = 3; val2 = 3; ++ }else{ ++ val1 = 0; val2 = 0; ++ } ++ val1 -= 1; val2 -= 1; ++ val1 &= 0x3f; val2 &= 0x3f; ++ data = m88ds3103_readreg(state, 0xfe); ++ data &= 0xf0; ++ data |= (val2 >> 2) & 0x0f; ++ m88ds3103_writereg(state, 0xfe, data); ++ data = (val2 & 0x03) << 6; ++ data |= val1; ++ m88ds3103_writereg(state, 0xea, data); ++ ++ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); ++ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); ++ ++ /* set master clock */ ++ val1 = m88ds3103_readreg(state, 0x22); ++ val2 = m88ds3103_readreg(state, 0x24); ++ ++ val1 &= 0x3f; ++ val2 &= 0x3f; ++ val1 |= 0x80; ++ val2 |= 0x40; ++ ++ m88ds3103_writereg(state, 0x22, val1); ++ m88ds3103_writereg(state, 0x24, val2); ++ ++ if(state->config->ci_mode) ++ val1 = 0x03; ++ else if(state->config->ts_mode) ++ val1 = 0x06; ++ else ++ val1 = 0x42; ++ m88ds3103_writereg(state, 0xfd, val1); ++ } ++ break; ++ case SYS_DVBS2: ++ /* initialise the demod in DVB-S2 mode */ ++ if(state->demod_id == DS3000_ID){ ++ m88ds3103_init_reg(state, ds3000_dvbs2_init_tab, sizeof(ds3000_dvbs2_init_tab)); ++ ++ if (c->symbol_rate >= 30000000) ++ m88ds3103_writereg(state, 0xfe, 0x54); ++ else ++ m88ds3103_writereg(state, 0xfe, 0x98); ++ ++ }else if(state->demod_id == DS3103_ID){ ++ m88ds3103_init_reg(state, ds3103_dvbs2_init_tab, sizeof(ds3103_dvbs2_init_tab)); ++ ++ /* set ts clock */ ++ if(state->config->ci_mode == 2){ ++ val1 = 6; val2 = 6; ++ }else if(state->config->ts_mode == 0){ ++ val1 = 5; val2 = 4; ++ }else{ ++ val1 = 0; val2 = 0; ++ } ++ val1 -= 1; val2 -= 1; ++ val1 &= 0x3f; val2 &= 0x3f; ++ data = m88ds3103_readreg(state, 0xfe); ++ data &= 0xf0; ++ data |= (val2 >> 2) & 0x0f; ++ m88ds3103_writereg(state, 0xfe, data); ++ data = (val2 & 0x03) << 6; ++ data |= val1; ++ m88ds3103_writereg(state, 0xea, data); ++ ++ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); ++ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); ++ ++ /* set master clock */ ++ val1 = m88ds3103_readreg(state, 0x22); ++ val2 = m88ds3103_readreg(state, 0x24); ++ ++ val1 &= 0x3f; ++ val2 &= 0x3f; ++ if((state->config->ci_mode == 2) || (state->config->ts_mode == 1)){ ++ val1 |= 0x80; ++ val2 |= 0x40; ++ }else{ ++ if (c->symbol_rate >= 28000000){ ++ val1 |= 0xc0; ++ }else if (c->symbol_rate >= 18000000){ ++ val2 |= 0x40; ++ }else{ ++ val1 |= 0x80; ++ val2 |= 0x40; ++ } ++ } ++ m88ds3103_writereg(state, 0x22, val1); ++ m88ds3103_writereg(state, 0x24, val2); ++ } ++ ++ if(state->config->ci_mode) ++ val1 = 0x03; ++ else if(state->config->ts_mode) ++ val1 = 0x06; ++ else ++ val1 = 0x42; ++ m88ds3103_writereg(state, 0xfd, val1); ++ ++ break; ++ default: ++ return 1; ++ } ++ /* disable 27MHz clock output */ ++ m88ds3103_writereg(state, 0x29, 0x80); ++ /* enable ac coupling */ ++ m88ds3103_writereg(state, 0x25, 0x8a); ++ ++ if ((c->symbol_rate / 1000) <= 3000){ ++ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 32 * 100 / 64 = 400*/ ++ m88ds3103_writereg(state, 0xc8, 0x20); ++ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ ++ m88ds3103_writereg(state, 0xc7, 0x00); ++ }else if((c->symbol_rate / 1000) <= 10000){ ++ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 16 * 100 / 64 = 200*/ ++ m88ds3103_writereg(state, 0xc8, 0x10); ++ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ ++ m88ds3103_writereg(state, 0xc7, 0x00); ++ }else{ ++ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 6 * 100 / 64 = 75*/ ++ m88ds3103_writereg(state, 0xc8, 0x06); ++ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ ++ m88ds3103_writereg(state, 0xc7, 0x00); ++ } ++ ++ m88ds3103_set_symrate(fe); ++ ++ m88ds3103_set_CCI(fe); ++ ++ m88ds3103_set_carrier_offset(fe, carrier_offset_khz); ++ ++ /* ds3000 out of software reset */ ++ m88ds3103_writereg(state, 0x00, 0x00); ++ /* start ds3000 build-in uC */ ++ m88ds3103_writereg(state, 0xb2, 0x00); ++ ++ return 0; ++} ++ ++static int m88ds3103_set_frontend(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ struct dtv_frontend_properties *c = &fe->dtv_property_cache; ++ ++ int i; ++ fe_status_t status; ++ u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf, div4, capCode, changePLL; ++ s32 offset_khz, lpf_offset_KHz; ++ u16 value, ndiv, lpf_coeff; ++ u32 f3db, gdiv28, realFreq; ++ u8 RFgain; ++ ++ dprintk("%s() ", __func__); ++ dprintk("c frequency = %d\n", c->frequency); ++ dprintk("symbol rate = %d\n", c->symbol_rate); ++ dprintk("delivery system = %d\n", c->delivery_system); ++ ++ realFreq = c->frequency; ++ lpf_offset_KHz = 0; ++ if(c->symbol_rate < 5000000){ ++ lpf_offset_KHz = FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz; ++ realFreq += FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz; ++ } ++ ++ if (state->config->set_ts_params) ++ state->config->set_ts_params(fe, 0); ++ ++ div4 = 0; ++ RFgain = 0; ++ if(state->tuner_id == TS2022_ID){ ++ m88ds3103_tuner_writereg(state, 0x10, 0x0a); ++ m88ds3103_tuner_writereg(state, 0x11, 0x40); ++ if (realFreq < 1103000) { ++ m88ds3103_tuner_writereg(state, 0x10, 0x1b); ++ div4 = 1; ++ ndiv = (realFreq * (6 + 8) * 4)/MT_FE_CRYSTAL_KHZ; ++ }else { ++ ndiv = (realFreq * (6 + 8) * 2)/MT_FE_CRYSTAL_KHZ; ++ } ++ ndiv = ndiv + ndiv%2; ++ if(ndiv < 4095) ++ ndiv = ndiv - 1024; ++ else if (ndiv < 6143) ++ ndiv = ndiv + 1024; ++ else ++ ndiv = ndiv + 3072; ++ ++ m88ds3103_tuner_writereg(state, 0x01, (ndiv & 0x3f00) >> 8); ++ }else{ ++ m88ds3103_tuner_writereg(state, 0x10, 0x00); ++ if (realFreq < 1146000){ ++ m88ds3103_tuner_writereg(state, 0x10, 0x11); ++ div4 = 1; ++ ndiv = (realFreq * (6 + 8) * 4) / MT_FE_CRYSTAL_KHZ; ++ }else{ ++ m88ds3103_tuner_writereg(state, 0x10, 0x01); ++ ndiv = (realFreq * (6 + 8) * 2) / MT_FE_CRYSTAL_KHZ; ++ } ++ ndiv = ndiv + ndiv%2; ++ ndiv = ndiv - 1024; ++ m88ds3103_tuner_writereg(state, 0x01, (ndiv>>8)&0x0f); ++ } ++ /* set pll */ ++ m88ds3103_tuner_writereg(state, 0x02, ndiv & 0x00ff); ++ m88ds3103_tuner_writereg(state, 0x03, 0x06); ++ m88ds3103_tuner_writereg(state, 0x51, 0x0f); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x10); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ ++ if(state->tuner_id == TS2022_ID){ ++ if(( realFreq >= 1650000 ) && (realFreq <= 1850000)){ ++ msleep(5); ++ value = m88ds3103_tuner_readreg(state, 0x14); ++ value &= 0x7f; ++ if(value < 64){ ++ m88ds3103_tuner_writereg(state, 0x10, 0x82); ++ m88ds3103_tuner_writereg(state, 0x11, 0x6f); ++ ++ m88ds3103_tuner_writereg(state, 0x51, 0x0f); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x10); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ } ++ } ++ msleep(5); ++ value = m88ds3103_tuner_readreg(state, 0x14); ++ value &= 0x1f; ++ ++ if(value > 19){ ++ value = m88ds3103_tuner_readreg(state, 0x10); ++ value &= 0x1d; ++ m88ds3103_tuner_writereg(state, 0x10, value); ++ } ++ }else{ ++ msleep(5); ++ value = m88ds3103_tuner_readreg(state, 0x66); ++ changePLL = (((value & 0x80) >> 7) != div4); ++ ++ if(changePLL){ ++ m88ds3103_tuner_writereg(state, 0x10, 0x11); ++ div4 = 1; ++ ndiv = (realFreq * (6 + 8) * 4)/MT_FE_CRYSTAL_KHZ; ++ ndiv = ndiv + ndiv%2; ++ ndiv = ndiv - 1024; ++ ++ m88ds3103_tuner_writereg(state, 0x01, (ndiv>>8) & 0x0f); ++ m88ds3103_tuner_writereg(state, 0x02, ndiv & 0xff); ++ ++ m88ds3103_tuner_writereg(state, 0x51, 0x0f); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x10); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ } ++ } ++ /*set the RF gain*/ ++ if(state->tuner_id == TS2020_ID) ++ m88ds3103_tuner_writereg(state, 0x60, 0x79); ++ ++ m88ds3103_tuner_writereg(state, 0x51, 0x17); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x08); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ msleep(5); ++ ++ if(state->tuner_id == TS2020_ID){ ++ RFgain = m88ds3103_tuner_readreg(state, 0x3d); ++ RFgain &= 0x0f; ++ if(RFgain < 15){ ++ if(RFgain < 4) ++ RFgain = 0; ++ else ++ RFgain = RFgain -3; ++ value = ((RFgain << 3) | 0x01) & 0x79; ++ m88ds3103_tuner_writereg(state, 0x60, value); ++ m88ds3103_tuner_writereg(state, 0x51, 0x17); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x08); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ } ++ } ++ ++ /* set the LPF */ ++ if(state->tuner_id == TS2022_ID){ ++ m88ds3103_tuner_writereg(state, 0x25, 0x00); ++ m88ds3103_tuner_writereg(state, 0x27, 0x70); ++ m88ds3103_tuner_writereg(state, 0x41, 0x09); ++ m88ds3103_tuner_writereg(state, 0x08, 0x0b); ++ } ++ ++ f3db = ((c->symbol_rate / 1000) *135) / 200 + 2000; ++ f3db += lpf_offset_KHz; ++ if (f3db < 7000) ++ f3db = 7000; ++ if (f3db > 40000) ++ f3db = 40000; ++ ++ gdiv28 = (MT_FE_CRYSTAL_KHZ / 1000 * 1694 + 500) / 1000; ++ m88ds3103_tuner_writereg(state, 0x04, gdiv28 & 0xff); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1b); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x04); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ msleep(5); ++ ++ value = m88ds3103_tuner_readreg(state, 0x26); ++ capCode = value & 0x3f; ++ if(state->tuner_id == TS2022_ID){ ++ m88ds3103_tuner_writereg(state, 0x41, 0x0d); ++ ++ m88ds3103_tuner_writereg(state, 0x51, 0x1b); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x04); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ ++ msleep(2); ++ ++ value = m88ds3103_tuner_readreg(state, 0x26); ++ value &= 0x3f; ++ value = (capCode + value) / 2; ++ } ++ else ++ value = capCode; ++ ++ gdiv28 = gdiv28 * 207 / (value * 2 + 151); ++ mlpf_max = gdiv28 * 135 / 100; ++ mlpf_min = gdiv28 * 78 / 100; ++ if (mlpf_max > 63) ++ mlpf_max = 63; ++ ++ if(state->tuner_id == TS2022_ID) ++ lpf_coeff = 3200; ++ else ++ lpf_coeff = 2766; ++ ++ nlpf = (f3db * gdiv28 * 2 / lpf_coeff / (MT_FE_CRYSTAL_KHZ / 1000) + 1) / 2 ; ++ if (nlpf > 23) nlpf = 23; ++ if (nlpf < 1) nlpf = 1; ++ ++ lpf_mxdiv = (nlpf * (MT_FE_CRYSTAL_KHZ / 1000) * lpf_coeff * 2 / f3db + 1) / 2; ++ ++ if (lpf_mxdiv < mlpf_min){ ++ nlpf++; ++ lpf_mxdiv = (nlpf * (MT_FE_CRYSTAL_KHZ / 1000) * lpf_coeff * 2 / f3db + 1) / 2; ++ } ++ ++ if (lpf_mxdiv > mlpf_max) ++ lpf_mxdiv = mlpf_max; ++ ++ m88ds3103_tuner_writereg(state, 0x04, lpf_mxdiv); ++ m88ds3103_tuner_writereg(state, 0x06, nlpf); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1b); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x04); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ msleep(5); ++ ++ if(state->tuner_id == TS2022_ID){ ++ msleep(2); ++ value = m88ds3103_tuner_readreg(state, 0x26); ++ capCode = value & 0x3f; ++ ++ m88ds3103_tuner_writereg(state, 0x41, 0x09); ++ ++ m88ds3103_tuner_writereg(state, 0x51, 0x1b); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x04); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ ++ msleep(2); ++ value = m88ds3103_tuner_readreg(state, 0x26); ++ value &= 0x3f; ++ value = (capCode + value) / 2; ++ ++ value = value | 0x80; ++ m88ds3103_tuner_writereg(state, 0x25, value); ++ m88ds3103_tuner_writereg(state, 0x27, 0x30); ++ ++ m88ds3103_tuner_writereg(state, 0x08, 0x09); ++ } ++ ++ /* Set the BB gain */ ++ m88ds3103_tuner_writereg(state, 0x51, 0x1e); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x01); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ if(state->tuner_id == TS2020_ID){ ++ if(RFgain == 15){ ++ msleep(40); ++ value = m88ds3103_tuner_readreg(state, 0x21); ++ value &= 0x0f; ++ if(value < 3){ ++ m88ds3103_tuner_writereg(state, 0x60, 0x61); ++ m88ds3103_tuner_writereg(state, 0x51, 0x17); ++ m88ds3103_tuner_writereg(state, 0x51, 0x1f); ++ m88ds3103_tuner_writereg(state, 0x50, 0x08); ++ m88ds3103_tuner_writereg(state, 0x50, 0x00); ++ } ++ } ++ } ++ msleep(60); ++ ++ offset_khz = (ndiv - ndiv % 2 + 1024) * MT_FE_CRYSTAL_KHZ ++ / (6 + 8) / (div4 + 1) / 2 - realFreq; ++ ++ m88ds3103_demod_connect(fe, offset_khz+lpf_offset_KHz); ++ ++ for (i = 0; i < 30 ; i++) { ++ m88ds3103_read_status(fe, &status); ++ if (status & FE_HAS_LOCK){ ++ break; ++ } ++ msleep(20); ++ } ++ ++ if((status & FE_HAS_LOCK) == 0){ ++ state->delivery_system = (state->delivery_system == SYS_DVBS) ? SYS_DVBS2 : SYS_DVBS; ++ m88ds3103_demod_connect(fe, offset_khz); ++ ++ for (i = 0; i < 30 ; i++) { ++ m88ds3103_read_status(fe, &status); ++ if (status & FE_HAS_LOCK){ ++ break; ++ } ++ msleep(20); ++ } ++ } ++ ++ if (status & FE_HAS_LOCK){ ++ if(state->config->ci_mode == 2) ++ m88ds3103_set_clock_ratio(state); ++ if(state->config->start_ctrl){ ++ if(state->first_lock == 0){ ++ state->config->start_ctrl(fe); ++ state->first_lock = 1; ++ } ++ } ++ } ++ ++ return 0; ++} ++ ++static int m88ds3103_tune(struct dvb_frontend *fe, ++ bool re_tune, ++ unsigned int mode_flags, ++ unsigned int *delay, ++ fe_status_t *status) ++{ ++ *delay = HZ / 5; ++ ++ dprintk("%s() ", __func__); ++ dprintk("re_tune = %d\n", re_tune); ++ ++ if (re_tune) { ++ int ret = m88ds3103_set_frontend(fe); ++ if (ret) ++ return ret; ++ } ++ ++ return m88ds3103_read_status(fe, status); ++} ++ ++static enum dvbfe_algo m88ds3103_get_algo(struct dvb_frontend *fe) ++{ ++ return DVBFE_ALGO_HW; ++} ++ ++ /* ++ * Power config will reset and load initial firmware if required ++ */ ++static int m88ds3103_initilaze(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ int ret; ++ ++ dprintk("%s()\n", __func__); ++ /* hard reset */ ++ m88ds3103_writereg(state, 0x07, 0x80); ++ m88ds3103_writereg(state, 0x07, 0x00); ++ msleep(1); ++ ++ m88ds3103_writereg(state, 0x08, 0x01 | m88ds3103_readreg(state, 0x08)); ++ msleep(1); ++ ++ if(state->tuner_id == TS2020_ID){ ++ /* TS2020 init */ ++ m88ds3103_tuner_writereg(state, 0x42, 0x73); ++ msleep(2); ++ m88ds3103_tuner_writereg(state, 0x05, 0x01); ++ m88ds3103_tuner_writereg(state, 0x62, 0xb5); ++ m88ds3103_tuner_writereg(state, 0x07, 0x02); ++ m88ds3103_tuner_writereg(state, 0x08, 0x01); ++ } ++ else if(state->tuner_id == TS2022_ID){ ++ /* TS2022 init */ ++ m88ds3103_tuner_writereg(state, 0x62, 0x6c); ++ msleep(2); ++ m88ds3103_tuner_writereg(state, 0x42, 0x6c); ++ msleep(2); ++ m88ds3103_tuner_writereg(state, 0x7d, 0x9d); ++ m88ds3103_tuner_writereg(state, 0x7c, 0x9a); ++ m88ds3103_tuner_writereg(state, 0x7a, 0x76); ++ ++ m88ds3103_tuner_writereg(state, 0x3b, 0x01); ++ m88ds3103_tuner_writereg(state, 0x63, 0x88); ++ ++ m88ds3103_tuner_writereg(state, 0x61, 0x85); ++ m88ds3103_tuner_writereg(state, 0x22, 0x30); ++ m88ds3103_tuner_writereg(state, 0x30, 0x40); ++ m88ds3103_tuner_writereg(state, 0x20, 0x23); ++ m88ds3103_tuner_writereg(state, 0x24, 0x02); ++ m88ds3103_tuner_writereg(state, 0x12, 0xa0); ++ } ++ ++ if(state->demod_id == DS3103_ID){ ++ m88ds3103_writereg(state, 0x07, 0xe0); ++ m88ds3103_writereg(state, 0x07, 0x00); ++ msleep(1); ++ } ++ m88ds3103_writereg(state, 0xb2, 0x01); ++ ++ /* Load the firmware if required */ ++ ret = m88ds3103_load_firmware(fe); ++ if (ret != 0){ ++ printk(KERN_ERR "%s: Unable initialize firmware\n", __func__); ++ return ret; ++ } ++ if(state->demod_id == DS3103_ID){ ++ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); ++ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); ++ } ++ ++ return 0; ++} ++ ++/* ++ * Initialise or wake up device ++ */ ++static int m88ds3103_initfe(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ u8 val; ++ ++ dprintk("%s()\n", __func__); ++ ++ /* 1st step to wake up demod */ ++ m88ds3103_writereg(state, 0x08, 0x01 | m88ds3103_readreg(state, 0x08)); ++ m88ds3103_writereg(state, 0x04, 0xfe & m88ds3103_readreg(state, 0x04)); ++ m88ds3103_writereg(state, 0x23, 0xef & m88ds3103_readreg(state, 0x23)); ++ ++ /* 2nd step to wake up tuner */ ++ val = m88ds3103_tuner_readreg(state, 0x00) & 0xff; ++ if((val & 0x01) == 0){ ++ m88ds3103_tuner_writereg(state, 0x00, 0x01); ++ msleep(50); ++ } ++ m88ds3103_tuner_writereg(state, 0x00, 0x03); ++ msleep(50); ++ ++ return 0; ++} ++ ++/* Put device to sleep */ ++static int m88ds3103_sleep(struct dvb_frontend *fe) ++{ ++ struct m88ds3103_state *state = fe->demodulator_priv; ++ ++ dprintk("%s()\n", __func__); ++ ++ /* 1st step to sleep tuner */ ++ m88ds3103_tuner_writereg(state, 0x00, 0x00); ++ ++ /* 2nd step to sleep demod */ ++ m88ds3103_writereg(state, 0x08, 0xfe & m88ds3103_readreg(state, 0x08)); ++ m88ds3103_writereg(state, 0x04, 0x01 | m88ds3103_readreg(state, 0x04)); ++ m88ds3103_writereg(state, 0x23, 0x10 | m88ds3103_readreg(state, 0x23)); ++ ++ ++ return 0; ++} ++ ++static struct dvb_frontend_ops m88ds3103_ops = { ++ .delsys = { SYS_DVBS, SYS_DVBS2}, ++ .info = { ++ .name = "Montage DS3103/TS2022", ++ .type = FE_QPSK, ++ .frequency_min = 950000, ++ .frequency_max = 2150000, ++ .frequency_stepsize = 1011, /* kHz for QPSK frontends */ ++ .frequency_tolerance = 5000, ++ .symbol_rate_min = 1000000, ++ .symbol_rate_max = 45000000, ++ .caps = FE_CAN_INVERSION_AUTO | ++ FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | ++ FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | ++ FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | ++ FE_CAN_2G_MODULATION | ++ FE_CAN_QPSK | FE_CAN_RECOVER ++ }, ++ ++ .release = m88ds3103_release, ++ ++ .init = m88ds3103_initfe, ++ .sleep = m88ds3103_sleep, ++ .read_status = m88ds3103_read_status, ++ .read_ber = m88ds3103_read_ber, ++ .read_signal_strength = m88ds3103_read_signal_strength, ++ .read_snr = m88ds3103_read_snr, ++ .read_ucblocks = m88ds3103_read_ucblocks, ++ .set_tone = m88ds3103_set_tone, ++ .set_voltage = m88ds3103_set_voltage, ++ .diseqc_send_master_cmd = m88ds3103_send_diseqc_msg, ++ .diseqc_send_burst = m88ds3103_diseqc_send_burst, ++ .get_frontend_algo = m88ds3103_get_algo, ++ .tune = m88ds3103_tune, ++ .set_frontend = m88ds3103_set_frontend, ++}; ++ ++MODULE_DESCRIPTION("DVB Frontend module for Montage DS3103/TS2022 hardware"); ++MODULE_AUTHOR("Max nibble"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h +new file mode 100644 +index 0000000..c7b690e +--- /dev/null ++++ b/drivers/media/dvb-frontends/m88ds3103.h +@@ -0,0 +1,53 @@ ++/* ++ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#ifndef M88DS3103_H ++#define M88DS3103_H ++ ++#include ++ ++struct m88ds3103_config { ++ /* the demodulator's i2c address */ ++ u8 demod_address; ++ u8 ci_mode; ++ u8 pin_ctrl; ++ u8 ts_mode; /* 0: Parallel, 1: Serial */ ++ ++ /* Set device param to start dma */ ++ int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured); ++ /* Start to transfer data */ ++ int (*start_ctrl)(struct dvb_frontend *fe); ++ /* Set LNB voltage */ ++ int (*set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage); ++}; ++ ++#if defined(CONFIG_DVB_M88DS3103) || \ ++ (defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE)) ++extern struct dvb_frontend *m88ds3103_attach( ++ const struct m88ds3103_config *config, ++ struct i2c_adapter *i2c); ++#else ++static inline struct dvb_frontend *m88ds3103_attach( ++ const struct m88ds3103_config *config, ++ struct i2c_adapter *i2c) ++{ ++ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); ++ return NULL; ++} ++#endif /* CONFIG_DVB_M88DS3103 */ ++#endif /* M88DS3103_H */ +diff --git a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-frontends/m88ds3103_priv.h +new file mode 100644 +index 0000000..2838514 +--- /dev/null ++++ b/drivers/media/dvb-frontends/m88ds3103_priv.h +@@ -0,0 +1,403 @@ ++/* ++ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#ifndef M88DS3103_PRIV_H ++#define M88DS3103_PRIV_H ++ ++#define FW_DOWN_SIZE 32 ++#define FW_DOWN_LOOP (8192/FW_DOWN_SIZE) ++#define DS3103_DEFAULT_FIRMWARE "dvb-fe-ds3103.fw" ++#define DS3000_DEFAULT_FIRMWARE "dvb-fe-ds300x.fw" ++#define MT_FE_MCLK_KHZ 96000 /* in kHz */ ++#define MT_FE_CRYSTAL_KHZ 27000 /* in kHz */ ++#define FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz 3000 ++#define DS3000_ID 0x3000 ++#define DS3103_ID 0x3103 ++#define TS2020_ID 0x2020 ++#define TS2022_ID 0x2022 ++#define UNKNOW_ID 0x0000 ++ ++struct m88ds3103_state { ++ struct i2c_adapter *i2c; ++ const struct m88ds3103_config *config; ++ ++ struct dvb_frontend frontend; ++ ++ u32 preBer; ++ u8 skip_fw_load; ++ u8 first_lock; /* The first time of signal lock */ ++ u16 demod_id; /* demod chip type */ ++ u16 tuner_id; /* tuner chip type */ ++ fe_delivery_system_t delivery_system; ++}; ++ ++/* For M88DS3103 demod dvbs mode.*/ ++static u8 ds3103_dvbs_init_tab[] = { ++ 0x23, 0x07, ++ 0x08, 0x03, ++ 0x0c, 0x02, ++ 0x21, 0x54, ++ 0x25, 0x82, ++ 0x27, 0x31, ++ 0x30, 0x08, ++ 0x31, 0x40, ++ 0x32, 0x32, ++ 0x33, 0x35, ++ 0x35, 0xff, ++ 0x3a, 0x00, ++ 0x37, 0x10, ++ 0x38, 0x10, ++ 0x39, 0x02, ++ 0x42, 0x60, ++ 0x4a, 0x80, ++ 0x4b, 0x04, ++ 0x4d, 0x91, ++ 0x5d, 0xc8, ++ 0x50, 0x36, ++ 0x51, 0x36, ++ 0x52, 0x36, ++ 0x53, 0x36, ++ 0x63, 0x0f, ++ 0x64, 0x30, ++ 0x65, 0x40, ++ 0x68, 0x26, ++ 0x69, 0x4c, ++ 0x70, 0x20, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x40, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x60, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x80, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0xa0, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x1f, ++ 0x76, 0x38, ++ 0x77, 0xa6, ++ 0x78, 0x0c, ++ 0x79, 0x80, ++ 0x7f, 0x14, ++ 0x7c, 0x00, ++ 0xae, 0x82, ++ 0x80, 0x64, ++ 0x81, 0x66, ++ 0x82, 0x44, ++ 0x85, 0x04, ++ 0xcd, 0xf4, ++ 0x90, 0x33, ++ 0xa0, 0x44, ++ 0xc0, 0x08, ++ 0xc3, 0x10, ++ 0xc4, 0x08, ++ 0xc5, 0xf0, ++ 0xc6, 0xff, ++ 0xc7, 0x00, ++ 0xc8, 0x1a, ++ 0xc9, 0x80, ++ 0xe0, 0xf8, ++ 0xe6, 0x8b, ++ 0xd0, 0x40, ++ 0xf8, 0x20, ++ 0xfa, 0x0f, ++ 0x00, 0x00, ++ 0xbd, 0x01, ++ 0xb8, 0x00, ++}; ++/* For M88DS3103 demod dvbs2 mode.*/ ++static u8 ds3103_dvbs2_init_tab[] = { ++ 0x23, 0x07, ++ 0x08, 0x07, ++ 0x0c, 0x02, ++ 0x21, 0x54, ++ 0x25, 0x82, ++ 0x27, 0x31, ++ 0x30, 0x08, ++ 0x32, 0x32, ++ 0x33, 0x35, ++ 0x35, 0xff, ++ 0x3a, 0x00, ++ 0x37, 0x10, ++ 0x38, 0x10, ++ 0x39, 0x02, ++ 0x42, 0x60, ++ 0x4a, 0x80, ++ 0x4b, 0x04, ++ 0x4d, 0x91, ++ 0x5d, 0xc8, ++ 0x50, 0x36, ++ 0x51, 0x36, ++ 0x52, 0x36, ++ 0x53, 0x36, ++ 0x63, 0x0f, ++ 0x64, 0x10, ++ 0x65, 0x20, ++ 0x68, 0x46, ++ 0x69, 0xcd, ++ 0x70, 0x20, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x40, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x60, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x80, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0xa0, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x1f, ++ 0x76, 0x38, ++ 0x77, 0xa6, ++ 0x78, 0x0c, ++ 0x79, 0x80, ++ 0x7f, 0x14, ++ 0x85, 0x08, ++ 0xcd, 0xf4, ++ 0x90, 0x33, ++ 0x86, 0x00, ++ 0x87, 0x0f, ++ 0x89, 0x00, ++ 0x8b, 0x44, ++ 0x8c, 0x66, ++ 0x9d, 0xc1, ++ 0x8a, 0x10, ++ 0xad, 0x40, ++ 0xa0, 0x44, ++ 0xc0, 0x08, ++ 0xc1, 0x10, ++ 0xc2, 0x08, ++ 0xc3, 0x10, ++ 0xc4, 0x08, ++ 0xc5, 0xf0, ++ 0xc6, 0xff, ++ 0xc7, 0x00, ++ 0xc8, 0x1a, ++ 0xc9, 0x80, ++ 0xca, 0x23, ++ 0xcb, 0x24, ++ 0xcc, 0xf4, ++ 0xce, 0x74, ++ 0x00, 0x00, ++ 0xbd, 0x01, ++ 0xb8, 0x00, ++}; ++ ++/* For M88DS3000 demod dvbs mode.*/ ++static u8 ds3000_dvbs_init_tab[] = { ++ 0x23, 0x05, ++ 0x08, 0x03, ++ 0x0c, 0x02, ++ 0x21, 0x54, ++ 0x25, 0x82, ++ 0x27, 0x31, ++ 0x30, 0x08, ++ 0x31, 0x40, ++ 0x32, 0x32, ++ 0x33, 0x35, ++ 0x35, 0xff, ++ 0x3a, 0x00, ++ 0x37, 0x10, ++ 0x38, 0x10, ++ 0x39, 0x02, ++ 0x42, 0x60, ++ 0x4a, 0x40, ++ 0x4b, 0x04, ++ 0x4d, 0x91, ++ 0x5d, 0xc8, ++ 0x50, 0x77, ++ 0x51, 0x77, ++ 0x52, 0x36, ++ 0x53, 0x36, ++ 0x56, 0x01, ++ 0x63, 0x47, ++ 0x64, 0x30, ++ 0x65, 0x40, ++ 0x68, 0x26, ++ 0x69, 0x4c, ++ 0x70, 0x20, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x40, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x60, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x80, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0xa0, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x1f, ++ 0x76, 0x00, ++ 0x77, 0xd1, ++ 0x78, 0x0c, ++ 0x79, 0x80, ++ 0x7f, 0x04, ++ 0x7c, 0x00, ++ 0x80, 0x86, ++ 0x81, 0xa6, ++ 0x85, 0x04, ++ 0xcd, 0xf4, ++ 0x90, 0x33, ++ 0xa0, 0x44, ++ 0xc0, 0x18, ++ 0xc3, 0x10, ++ 0xc4, 0x08, ++ 0xc5, 0x80, ++ 0xc6, 0x80, ++ 0xc7, 0x0a, ++ 0xc8, 0x1a, ++ 0xc9, 0x80, ++ 0xfe, 0xb6, ++ 0xe0, 0xf8, ++ 0xe6, 0x8b, ++ 0xd0, 0x40, ++ 0xf8, 0x20, ++ 0xfa, 0x0f, ++ 0xad, 0x20, ++ 0xae, 0x07, ++ 0xb8, 0x00, ++}; ++ ++/* For M88DS3000 demod dvbs2 mode.*/ ++static u8 ds3000_dvbs2_init_tab[] = { ++ 0x23, 0x0f, ++ 0x08, 0x07, ++ 0x0c, 0x02, ++ 0x21, 0x54, ++ 0x25, 0x82, ++ 0x27, 0x31, ++ 0x30, 0x08, ++ 0x31, 0x32, ++ 0x32, 0x32, ++ 0x33, 0x35, ++ 0x35, 0xff, ++ 0x3a, 0x00, ++ 0x37, 0x10, ++ 0x38, 0x10, ++ 0x39, 0x02, ++ 0x42, 0x60, ++ 0x4a, 0x80, ++ 0x4b, 0x04, ++ 0x4d, 0x91, ++ 0x5d, 0x88, ++ 0x50, 0x36, ++ 0x51, 0x36, ++ 0x52, 0x36, ++ 0x53, 0x36, ++ 0x63, 0x60, ++ 0x64, 0x10, ++ 0x65, 0x10, ++ 0x68, 0x04, ++ 0x69, 0x29, ++ 0x70, 0x20, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x40, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x60, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x80, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0xa0, ++ 0x71, 0x70, ++ 0x72, 0x04, ++ 0x73, 0x00, ++ 0x70, 0x1f, ++ 0xa0, 0x44, ++ 0xc0, 0x08, ++ 0xc1, 0x10, ++ 0xc2, 0x08, ++ 0xc3, 0x10, ++ 0xc4, 0x08, ++ 0xc5, 0xf0, ++ 0xc6, 0xf0, ++ 0xc7, 0x0a, ++ 0xc8, 0x1a, ++ 0xc9, 0x80, ++ 0xca, 0x23, ++ 0xcb, 0x24, ++ 0xce, 0x74, ++ 0x56, 0x01, ++ 0x90, 0x03, ++ 0x76, 0x80, ++ 0x77, 0x42, ++ 0x78, 0x0a, ++ 0x79, 0x80, ++ 0xad, 0x40, ++ 0xae, 0x07, ++ 0x7f, 0xd4, ++ 0x7c, 0x00, ++ 0x80, 0xa8, ++ 0x81, 0xda, ++ 0x7c, 0x01, ++ 0x80, 0xda, ++ 0x81, 0xec, ++ 0x7c, 0x02, ++ 0x80, 0xca, ++ 0x81, 0xeb, ++ 0x7c, 0x03, ++ 0x80, 0xba, ++ 0x81, 0xdb, ++ 0x85, 0x08, ++ 0x86, 0x00, ++ 0x87, 0x02, ++ 0x89, 0x80, ++ 0x8b, 0x44, ++ 0x8c, 0xaa, ++ 0x8a, 0x10, ++ 0xba, 0x00, ++ 0xf5, 0x04, ++ 0xd2, 0x32, ++ 0xb8, 0x00, ++}; ++ ++#endif /* M88DS3103_PRIV_H */ +diff --git a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig +index eafa114..37690f0 100644 +--- a/drivers/media/pci/cx23885/Kconfig ++++ b/drivers/media/pci/cx23885/Kconfig +@@ -23,6 +23,8 @@ config VIDEO_CX23885 + select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT + select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_M88DC2800 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT + select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0367 if MEDIA_SUBDRV_AUTOSELECT +diff --git a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c +index 7344849..369ae7c 100644 +--- a/drivers/media/pci/cx23885/cimax2.c ++++ b/drivers/media/pci/cx23885/cimax2.c +@@ -415,7 +415,7 @@ int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, + return state->status; + } + +-int netup_ci_init(struct cx23885_tsport *port) ++int netup_ci_init(struct cx23885_tsport *port, bool isDVBSky) + { + struct netup_ci_state *state; + u8 cimax_init[34] = { +@@ -464,6 +464,11 @@ int netup_ci_init(struct cx23885_tsport *port) + goto err; + } + ++ if(isDVBSky) { ++ cimax_init[32] = 0x22; ++ cimax_init[33] = 0x00; ++ } ++ + port->port_priv = state; + + switch (port->nr) { +@@ -537,3 +542,19 @@ void netup_ci_exit(struct cx23885_tsport *port) + dvb_ca_en50221_release(&state->ca); + kfree(state); + } ++ ++/* CI irq handler for DVBSky board*/ ++int dvbsky_ci_slot_status(struct cx23885_dev *dev) ++{ ++ struct cx23885_tsport *port = NULL; ++ struct netup_ci_state *state = NULL; ++ ++ ci_dbg_print("%s:\n", __func__); ++ ++ port = &dev->ts1; ++ state = port->port_priv; ++ schedule_work(&state->work); ++ ci_dbg_print("%s: Wakeup CI0\n", __func__); ++ ++ return 1; ++} +diff --git a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h +index 518744a..39f3db7 100644 +--- a/drivers/media/pci/cx23885/cimax2.h ++++ b/drivers/media/pci/cx23885/cimax2.h +@@ -41,7 +41,9 @@ extern int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot); + extern int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status); + extern int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, + int slot, int open); +-extern int netup_ci_init(struct cx23885_tsport *port); ++extern int netup_ci_init(struct cx23885_tsport *port, bool isDVBSky); + extern void netup_ci_exit(struct cx23885_tsport *port); + ++extern int dvbsky_ci_slot_status(struct cx23885_dev *dev); ++ + #endif +diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c +index 6277e14..d163c41 100644 +--- a/drivers/media/pci/cx23885/cx23885-cards.c ++++ b/drivers/media/pci/cx23885/cx23885-cards.c +@@ -569,9 +569,32 @@ struct cx23885_board cx23885_boards[] = { + .name = "TeVii S471", + .portb = CX23885_MPEG_DVB, + }, +- [CX23885_BOARD_PROF_8000] = { +- .name = "Prof Revolution DVB-S2 8000", ++ [CX23885_BOARD_BST_PS8512] = { ++ .name = "Bestunar PS8512", + .portb = CX23885_MPEG_DVB, ++ }, ++ [CX23885_BOARD_DVBSKY_S950] = { ++ .name = "DVBSKY S950", ++ .portb = CX23885_MPEG_DVB, ++ }, ++ [CX23885_BOARD_DVBSKY_S952] = { ++ .name = "DVBSKY S952", ++ .portb = CX23885_MPEG_DVB, ++ .portc = CX23885_MPEG_DVB, ++ }, ++ [CX23885_BOARD_DVBSKY_S950_CI] = { ++ .ci_type = 3, ++ .name = "DVBSKY S950CI DVB-S2 CI", ++ .portb = CX23885_MPEG_DVB, ++ }, ++ [CX23885_BOARD_DVBSKY_C2800E_CI] = { ++ .ci_type = 3, ++ .name = "DVBSKY C2800E DVB-C CI", ++ .portb = CX23885_MPEG_DVB, ++ }, ++ [CX23885_BOARD_PROF_8000] = { ++ .name = "Prof Revolution DVB-S2 8000", ++ .portb = CX23885_MPEG_DVB, + } + }; + const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); +@@ -785,9 +808,29 @@ struct cx23885_subid cx23885_subids[] = { + .subdevice = 0x9022, + .card = CX23885_BOARD_TEVII_S471, + }, { +- .subvendor = 0x8000, +- .subdevice = 0x3034, +- .card = CX23885_BOARD_PROF_8000, ++ .subvendor = 0x14f1, ++ .subdevice = 0x8512, ++ .card = CX23885_BOARD_BST_PS8512, ++ }, { ++ .subvendor = 0x4254, ++ .subdevice = 0x0950, ++ .card = CX23885_BOARD_DVBSKY_S950, ++ }, { ++ .subvendor = 0x4254, ++ .subdevice = 0x0952, ++ .card = CX23885_BOARD_DVBSKY_S952, ++ }, { ++ .subvendor = 0x4254, ++ .subdevice = 0x950C, ++ .card = CX23885_BOARD_DVBSKY_S950_CI, ++ }, { ++ .subvendor = 0x4254, ++ .subdevice = 0x2800, ++ .card = CX23885_BOARD_DVBSKY_C2800E_CI, ++ }, { ++ .subvendor = 0x8000, ++ .subdevice = 0x3034, ++ .card = CX23885_BOARD_PROF_8000, + }, + }; + const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); +@@ -1167,7 +1210,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) + cx_set(GP0_IO, 0x00040004); + break; + case CX23885_BOARD_TBS_6920: +- case CX23885_BOARD_PROF_8000: ++ case CX23885_BOARD_PROF_8000: + cx_write(MC417_CTL, 0x00000036); + cx_write(MC417_OEN, 0x00001000); + cx_set(MC417_RWD, 0x00000002); +@@ -1301,9 +1344,83 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) + /* enable irq */ + cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ + break; ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_BST_PS8512: ++ cx23885_gpio_enable(dev, GPIO_2, 1); ++ cx23885_gpio_clear(dev, GPIO_2); ++ msleep(100); ++ cx23885_gpio_set(dev, GPIO_2); ++ break; ++ case CX23885_BOARD_DVBSKY_S952: ++ cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ ++ ++ cx23885_gpio_enable(dev, GPIO_2, 1); ++ cx23885_gpio_enable(dev, GPIO_11, 1); ++ ++ cx23885_gpio_clear(dev, GPIO_2); ++ cx23885_gpio_clear(dev, GPIO_11); ++ msleep(100); ++ cx23885_gpio_set(dev, GPIO_2); ++ cx23885_gpio_set(dev, GPIO_11); ++ break; ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ /* GPIO-0 INTA from CiMax, input ++ GPIO-1 reset CiMax, output, high active ++ GPIO-2 reset demod, output, low active ++ GPIO-3 to GPIO-10 data/addr for CAM ++ GPIO-11 ~CS0 to CiMax1 ++ GPIO-12 ~CS1 to CiMax2 ++ GPIO-13 ADL0 load LSB addr ++ GPIO-14 ADL1 load MSB addr ++ GPIO-15 ~RDY from CiMax ++ GPIO-17 ~RD to CiMax ++ GPIO-18 ~WR to CiMax ++ */ ++ cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ ++ cx_clear(GP0_IO, 0x00010004); /*GPIO 0 as input*/ ++ mdelay(100);/* reset delay */ ++ cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ ++ cx_clear(GP0_IO, 0x00010002); ++ cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ ++ /* GPIO-15 IN as ~ACK, rest as OUT */ ++ cx_write(MC417_OEN, 0x00001000); ++ /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ ++ cx_write(MC417_RWD, 0x0000c300); ++ /* enable irq */ ++ cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ ++ break; + } + } + ++static int cx23885_ir_patch(struct i2c_adapter *i2c, u8 reg, u8 mask) ++{ ++ struct i2c_msg msgs[2]; ++ u8 tx_buf[2], rx_buf[1]; ++ /* Write register address */ ++ tx_buf[0] = reg; ++ msgs[0].addr = 0x4c; ++ msgs[0].flags = 0; ++ msgs[0].len = 1; ++ msgs[0].buf = (char *) tx_buf; ++ /* Read data from register */ ++ msgs[1].addr = 0x4c; ++ msgs[1].flags = I2C_M_RD; ++ msgs[1].len = 1; ++ msgs[1].buf = (char *) rx_buf; ++ ++ i2c_transfer(i2c, msgs, 2); ++ ++ tx_buf[0] = reg; ++ tx_buf[1] = rx_buf[0] | mask; ++ msgs[0].addr = 0x4c; ++ msgs[0].flags = 0; ++ msgs[0].len = 2; ++ msgs[0].buf = (char *) tx_buf; ++ ++ return i2c_transfer(i2c, msgs, 1); ++} ++ + int cx23885_ir_init(struct cx23885_dev *dev) + { + static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { +@@ -1388,6 +1505,22 @@ int cx23885_ir_init(struct cx23885_dev *dev) + v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, + ir_rx_pin_cfg_count, ir_rx_pin_cfg); + break; ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); ++ if (dev->sd_ir == NULL) { ++ ret = -ENODEV; ++ break; ++ } ++ v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, ++ ir_rx_pin_cfg_count, ir_rx_pin_cfg); ++ ++ cx23885_ir_patch(&(dev->i2c_bus[2].i2c_adap),0x1f,0x80); ++ cx23885_ir_patch(&(dev->i2c_bus[2].i2c_adap),0x23,0x80); ++ break; + case CX23885_BOARD_HAUPPAUGE_HVR1250: + if (!enable_885_ir) + break; +@@ -1420,6 +1553,11 @@ void cx23885_ir_fini(struct cx23885_dev *dev) + case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: + case CX23885_BOARD_TEVII_S470: + case CX23885_BOARD_HAUPPAUGE_HVR1250: ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + cx23885_irq_remove(dev, PCI_MSK_AV_CORE); + /* sd_ir is a duplicate pointer to the AV Core, just clear it */ + dev->sd_ir = NULL; +@@ -1464,6 +1602,11 @@ void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) + case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: + case CX23885_BOARD_TEVII_S470: + case CX23885_BOARD_HAUPPAUGE_HVR1250: ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + if (dev->sd_ir) + cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); + break; +@@ -1549,6 +1692,10 @@ void cx23885_card_setup(struct cx23885_dev *dev) + ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ + ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; + break; ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + case CX23885_BOARD_TEVII_S470: + case CX23885_BOARD_TEVII_S471: + case CX23885_BOARD_DVBWORLD_2005: +@@ -1581,6 +1728,14 @@ void cx23885_card_setup(struct cx23885_dev *dev) + ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ + ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; + break; ++ case CX23885_BOARD_DVBSKY_S952: ++ ts1->gen_ctrl_val = 0x5; /* Parallel */ ++ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ++ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; ++ ts2->gen_ctrl_val = 0xe; /* Serial bus + punctured clock */ ++ ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ++ ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; ++ break; + case CX23885_BOARD_HAUPPAUGE_HVR1250: + case CX23885_BOARD_HAUPPAUGE_HVR1500: + case CX23885_BOARD_HAUPPAUGE_HVR1500Q: +@@ -1636,6 +1791,11 @@ void cx23885_card_setup(struct cx23885_dev *dev) + case CX23885_BOARD_MPX885: + case CX23885_BOARD_MYGICA_X8507: + case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, + &dev->i2c_bus[2].i2c_adap, + "cx25840", 0x88 >> 1, NULL); +diff --git a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c +index f0416a6..bb8130a 100644 +--- a/drivers/media/pci/cx23885/cx23885-core.c ++++ b/drivers/media/pci/cx23885/cx23885-core.c +@@ -1909,6 +1909,10 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id) + (pci_status & PCI_MSK_GPIO0)) + handled += altera_ci_irq(dev); + ++ if (cx23885_boards[dev->board].ci_type == 3 && ++ (pci_status & PCI_MSK_GPIO0)) ++ handled += dvbsky_ci_slot_status(dev); ++ + if (ts1_status) { + if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) + handled += cx23885_irq_ts(ts1, ts1_status); +@@ -2144,6 +2148,8 @@ static int cx23885_initdev(struct pci_dev *pci_dev, + cx23885_irq_add_enable(dev, PCI_MSK_GPIO1 | PCI_MSK_GPIO0); + break; + case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + cx23885_irq_add_enable(dev, PCI_MSK_GPIO0); + break; + } +diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c +index 2f5b902..4319f35 100644 +--- a/drivers/media/pci/cx23885/cx23885-dvb.c ++++ b/drivers/media/pci/cx23885/cx23885-dvb.c +@@ -51,6 +51,8 @@ + #include "stv6110.h" + #include "lnbh24.h" + #include "cx24116.h" ++#include "m88ds3103.h" ++#include "m88dc2800.h" + #include "cimax2.h" + #include "lgs8gxx.h" + #include "netup-eeprom.h" +@@ -63,8 +65,8 @@ + #include "stv0367.h" + #include "drxk.h" + #include "mt2063.h" +-#include "stv090x.h" +-#include "stb6100.h" ++#include "stv090x.h" ++#include "stb6100.h" + #include "stb6100_cfg.h" + + static unsigned int debug; +@@ -492,40 +494,76 @@ static struct xc5000_config mygica_x8506_xc5000_config = { + .if_khz = 5380, + }; + +-static struct stv090x_config prof_8000_stv090x_config = { +- .device = STV0903, +- .demod_mode = STV090x_SINGLE, +- .clk_mode = STV090x_CLK_EXT, +- .xtal = 27000000, +- .address = 0x6A, +- .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, +- .repeater_level = STV090x_RPTLEVEL_64, +- .adc1_range = STV090x_ADC_2Vpp, +- .diseqc_envelope_mode = false, +- +- .tuner_get_frequency = stb6100_get_frequency, +- .tuner_set_frequency = stb6100_set_frequency, +- .tuner_set_bandwidth = stb6100_set_bandwidth, +- .tuner_get_bandwidth = stb6100_get_bandwidth, ++/* bestunar single dvb-s2 */ ++static struct m88ds3103_config bst_ds3103_config = { ++ .demod_address = 0x68, ++ .ci_mode = 0, ++ .pin_ctrl = 0x82, ++ .ts_mode = 0, ++ .set_voltage = bst_set_voltage, ++}; ++/* DVBSKY dual dvb-s2 */ ++static struct m88ds3103_config dvbsky_ds3103_config_pri = { ++ .demod_address = 0x68, ++ .ci_mode = 0, ++ .pin_ctrl = 0x82, ++ .ts_mode = 0, ++ .set_voltage = bst_set_voltage, ++}; ++static struct m88ds3103_config dvbsky_ds3103_config_sec = { ++ .demod_address = 0x68, ++ .ci_mode = 0, ++ .pin_ctrl = 0x82, ++ .ts_mode = 1, ++ .set_voltage = dvbsky_set_voltage_sec, + }; + +-static struct stb6100_config prof_8000_stb6100_config = { +- .tuner_address = 0x60, +- .refclock = 27000000, ++static struct m88ds3103_config dvbsky_ds3103_ci_config = { ++ .demod_address = 0x68, ++ .ci_mode = 2, ++ .pin_ctrl = 0x82, ++ .ts_mode = 0, + }; + +-static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) +-{ +- struct cx23885_tsport *port = fe->dvb->priv; +- struct cx23885_dev *dev = port->dev; ++static struct m88dc2800_config dvbsky_dc2800_config = { ++ .demod_address = 0x1c, ++ .ts_mode = 3, ++}; + +- if (voltage == SEC_VOLTAGE_18) +- cx_write(MC417_RWD, 0x00001e00); +- else if (voltage == SEC_VOLTAGE_13) +- cx_write(MC417_RWD, 0x00001a00); +- else +- cx_write(MC417_RWD, 0x00001800); +- return 0; ++static struct stv090x_config prof_8000_stv090x_config = { ++ .device = STV0903, ++ .demod_mode = STV090x_SINGLE, ++ .clk_mode = STV090x_CLK_EXT, ++ .xtal = 27000000, ++ .address = 0x6A, ++ .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, ++ .repeater_level = STV090x_RPTLEVEL_64, ++ .adc1_range = STV090x_ADC_2Vpp, ++ .diseqc_envelope_mode = false, ++ ++ .tuner_get_frequency = stb6100_get_frequency, ++ .tuner_set_frequency = stb6100_set_frequency, ++ .tuner_set_bandwidth = stb6100_set_bandwidth, ++ .tuner_get_bandwidth = stb6100_get_bandwidth, ++}; ++ ++static struct stb6100_config prof_8000_stb6100_config = { ++ .tuner_address = 0x60, ++ .refclock = 27000000, ++}; ++ ++static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct cx23885_tsport *port = fe->dvb->priv; ++ struct cx23885_dev *dev = port->dev; ++ ++ if (voltage == SEC_VOLTAGE_18) ++ cx_write(MC417_RWD, 0x00001e00); ++ else if (voltage == SEC_VOLTAGE_13) ++ cx_write(MC417_RWD, 0x00001a00); ++ else ++ cx_write(MC417_RWD, 0x00001800); ++ return 0; + } + + static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) +@@ -1225,22 +1263,63 @@ static int dvb_register(struct cx23885_tsport *port) + &tevii_ds3000_config, + &i2c_bus->i2c_adap); + break; +- case CX23885_BOARD_PROF_8000: +- i2c_bus = &dev->i2c_bus[0]; ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ i2c_bus = &dev->i2c_bus[1]; ++ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, ++ &bst_ds3103_config, ++ &i2c_bus->i2c_adap); ++ break; ++ ++ case CX23885_BOARD_DVBSKY_S952: ++ switch (port->nr) { ++ /* port B */ ++ case 1: ++ i2c_bus = &dev->i2c_bus[1]; ++ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, ++ &dvbsky_ds3103_config_pri, ++ &i2c_bus->i2c_adap); ++ break; ++ /* port C */ ++ case 2: ++ i2c_bus = &dev->i2c_bus[0]; ++ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, ++ &dvbsky_ds3103_config_sec, ++ &i2c_bus->i2c_adap); ++ break; ++ } ++ break; + +- fe0->dvb.frontend = dvb_attach(stv090x_attach, +- &prof_8000_stv090x_config, +- &i2c_bus->i2c_adap, +- STV090x_DEMODULATOR_0); +- if (fe0->dvb.frontend != NULL) { +- if (!dvb_attach(stb6100_attach, +- fe0->dvb.frontend, +- &prof_8000_stb6100_config, +- &i2c_bus->i2c_adap)) +- goto frontend_detach; ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ i2c_bus = &dev->i2c_bus[1]; ++ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, ++ &dvbsky_ds3103_ci_config, ++ &i2c_bus->i2c_adap); ++ break; ++ ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ i2c_bus = &dev->i2c_bus[1]; ++ fe0->dvb.frontend = dvb_attach(m88dc2800_attach, ++ &dvbsky_dc2800_config, ++ &i2c_bus->i2c_adap); ++ break; + +- fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; +- } ++ case CX23885_BOARD_PROF_8000: ++ i2c_bus = &dev->i2c_bus[0]; ++ ++ fe0->dvb.frontend = dvb_attach(stv090x_attach, ++ &prof_8000_stv090x_config, ++ &i2c_bus->i2c_adap, ++ STV090x_DEMODULATOR_0); ++ if (fe0->dvb.frontend != NULL) { ++ if (!dvb_attach(stb6100_attach, ++ fe0->dvb.frontend, ++ &prof_8000_stb6100_config, ++ &i2c_bus->i2c_adap)) ++ goto frontend_detach; ++ ++ fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; ++ } + break; + default: + printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " +@@ -1289,7 +1368,7 @@ static int dvb_register(struct cx23885_tsport *port) + printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", + port->nr, port->frontends.adapter.proposed_mac); + +- netup_ci_init(port); ++ netup_ci_init(port, false); + break; + } + case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { +@@ -1316,6 +1395,40 @@ static int dvb_register(struct cx23885_tsport *port) + memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); + break; + } ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952:{ ++ u8 eeprom[256]; /* 24C02 i2c eeprom */ ++ ++ if(port->nr > 2) ++ break; ++ ++ dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; ++ tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); ++ printk(KERN_INFO "DVBSKY PCIe MAC= %pM\n", eeprom + 0xc0+(port->nr-1)*8); ++ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + ++ (port->nr-1)*8, 6); ++ break; ++ } ++ case CX23885_BOARD_DVBSKY_S950_CI: { ++ u8 eeprom[256]; /* 24C02 i2c eeprom */ ++ ++ if(port->nr > 2) ++ break; ++ ++ dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; ++ tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); ++ printk(KERN_INFO "DVBSKY PCIe MAC= %pM\n", eeprom + 0xc0+(port->nr-1)*8); ++ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + ++ (port->nr-1)*8, 6); ++ ++ netup_ci_init(port, true); ++ break; ++ } ++ case CX23885_BOARD_DVBSKY_C2800E_CI: { ++ netup_ci_init(port, true); ++ break; ++ } + } + + return ret; +@@ -1398,6 +1511,8 @@ int cx23885_dvb_unregister(struct cx23885_tsport *port) + + switch (port->dev->board) { + case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + netup_ci_exit(port); + break; + case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: +diff --git a/drivers/media/pci/cx23885/cx23885-f300.c b/drivers/media/pci/cx23885/cx23885-f300.c +index 5444cc5..1f4bf10 100644 +--- a/drivers/media/pci/cx23885/cx23885-f300.c ++++ b/drivers/media/pci/cx23885/cx23885-f300.c +@@ -176,3 +176,58 @@ int f300_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) + + return f300_xfer(fe, buf); + } ++ ++/* bst control */ ++int bst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct cx23885_tsport *port = fe->dvb->priv; ++ struct cx23885_dev *dev = port->dev; ++ ++ cx23885_gpio_enable(dev, GPIO_1, 1); ++ cx23885_gpio_enable(dev, GPIO_0, 1); ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ cx23885_gpio_set(dev, GPIO_1); ++ cx23885_gpio_clear(dev, GPIO_0); ++ break; ++ case SEC_VOLTAGE_18: ++ cx23885_gpio_set(dev, GPIO_1); ++ cx23885_gpio_set(dev, GPIO_0); ++ break; ++ case SEC_VOLTAGE_OFF: ++ cx23885_gpio_clear(dev, GPIO_1); ++ cx23885_gpio_clear(dev, GPIO_0); ++ break; ++ } ++ ++ ++ return 0; ++} ++ ++int dvbsky_set_voltage_sec(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct cx23885_tsport *port = fe->dvb->priv; ++ struct cx23885_dev *dev = port->dev; ++ ++ cx23885_gpio_enable(dev, GPIO_12, 1); ++ cx23885_gpio_enable(dev, GPIO_13, 1); ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ cx23885_gpio_set(dev, GPIO_13); ++ cx23885_gpio_clear(dev, GPIO_12); ++ break; ++ case SEC_VOLTAGE_18: ++ cx23885_gpio_set(dev, GPIO_13); ++ cx23885_gpio_set(dev, GPIO_12); ++ break; ++ case SEC_VOLTAGE_OFF: ++ cx23885_gpio_clear(dev, GPIO_13); ++ cx23885_gpio_clear(dev, GPIO_12); ++ break; ++ } ++ ++ ++ return 0; ++} +\ No newline at end of file +diff --git a/drivers/media/pci/cx23885/cx23885-f300.h b/drivers/media/pci/cx23885/cx23885-f300.h +index e73344c..f93f37d 100644 +--- a/drivers/media/pci/cx23885/cx23885-f300.h ++++ b/drivers/media/pci/cx23885/cx23885-f300.h +@@ -1,2 +1,8 @@ ++extern int dvbsky_set_voltage_sec(struct dvb_frontend *fe, ++ fe_sec_voltage_t voltage); ++ ++extern int bst_set_voltage(struct dvb_frontend *fe, ++ fe_sec_voltage_t voltage); ++ + extern int f300_set_voltage(struct dvb_frontend *fe, + fe_sec_voltage_t voltage); +diff --git a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c +index 4f1055a..db3366b 100644 +--- a/drivers/media/pci/cx23885/cx23885-input.c ++++ b/drivers/media/pci/cx23885/cx23885-input.c +@@ -89,6 +89,11 @@ void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events) + case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: + case CX23885_BOARD_TEVII_S470: + case CX23885_BOARD_HAUPPAUGE_HVR1250: ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + /* + * The only boards we handle right now. However other boards + * using the CX2388x integrated IR controller should be similar +@@ -140,6 +145,11 @@ static int cx23885_input_ir_start(struct cx23885_dev *dev) + case CX23885_BOARD_HAUPPAUGE_HVR1850: + case CX23885_BOARD_HAUPPAUGE_HVR1290: + case CX23885_BOARD_HAUPPAUGE_HVR1250: ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: + /* + * The IR controller on this board only returns pulse widths. + * Any other mode setting will fail to set up the device. +@@ -289,6 +299,17 @@ int cx23885_input_init(struct cx23885_dev *dev) + /* A guess at the remote */ + rc_map = RC_MAP_TEVII_NEC; + break; ++ case CX23885_BOARD_BST_PS8512: ++ case CX23885_BOARD_DVBSKY_S950: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S950_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ /* Integrated CX2388[58] IR controller */ ++ driver_type = RC_DRIVER_IR_RAW; ++ allowed_protos = RC_BIT_ALL; ++ /* A guess at the remote */ ++ rc_map = RC_MAP_DVBSKY; ++ break; + default: + return -ENODEV; + } +diff --git a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h +index 67f40d3..272dcab 100644 +--- a/drivers/media/pci/cx23885/cx23885.h ++++ b/drivers/media/pci/cx23885/cx23885.h +@@ -90,7 +90,12 @@ + #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 + #define CX23885_BOARD_TEVII_S471 35 + #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 +-#define CX23885_BOARD_PROF_8000 37 ++#define CX23885_BOARD_BST_PS8512 37 ++#define CX23885_BOARD_DVBSKY_S952 38 ++#define CX23885_BOARD_DVBSKY_S950 39 ++#define CX23885_BOARD_DVBSKY_S950_CI 40 ++#define CX23885_BOARD_DVBSKY_C2800E_CI 41 ++#define CX23885_BOARD_PROF_8000 42 + + #define GPIO_0 0x00000001 + #define GPIO_1 0x00000002 +@@ -229,7 +234,7 @@ struct cx23885_board { + */ + u32 clk_freq; + struct cx23885_input input[MAX_CX23885_INPUT]; +- int ci_type; /* for NetUP */ ++ int ci_type; /* 1 and 2 for NetUP, 3 for DVBSky. */ + /* Force bottom field first during DMA (888 workaround) */ + u32 force_bff; + }; +diff --git a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig +index d27fccb..04d2099 100644 +--- a/drivers/media/pci/cx88/Kconfig ++++ b/drivers/media/pci/cx88/Kconfig +@@ -57,6 +57,7 @@ config VIDEO_CX88_DVB + select DVB_ISL6421 if MEDIA_SUBDRV_AUTOSELECT + select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT + select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0299 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT +diff --git a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c +index 0c25524..4989f52 100644 +--- a/drivers/media/pci/cx88/cx88-cards.c ++++ b/drivers/media/pci/cx88/cx88-cards.c +@@ -2309,6 +2309,18 @@ static const struct cx88_board cx88_boards[] = { + } }, + .mpeg = CX88_MPEG_DVB, + }, ++ [CX88_BOARD_BST_PS8312] = { ++ .name = "Bestunar PS8312 DVB-S/S2", ++ .tuner_type = UNSET, ++ .radio_type = UNSET, ++ .tuner_addr = ADDR_UNSET, ++ .radio_addr = ADDR_UNSET, ++ .input = {{ ++ .type = CX88_VMUX_DVB, ++ .vmux = 0, ++ } }, ++ .mpeg = CX88_MPEG_DVB, ++ }, + }; + + /* ------------------------------------------------------------------ */ +@@ -2813,6 +2825,10 @@ static const struct cx88_subid cx88_subids[] = { + .subvendor = 0x1822, + .subdevice = 0x0023, + .card = CX88_BOARD_TWINHAN_VP1027_DVBS, ++ }, { ++ .subvendor = 0x14f1, ++ .subdevice = 0x8312, ++ .card = CX88_BOARD_BST_PS8312, + }, + }; + +@@ -3547,6 +3563,12 @@ static void cx88_card_setup(struct cx88_core *core) + cx_write(MO_SRST_IO, 1); + msleep(100); + break; ++ case CX88_BOARD_BST_PS8312: ++ cx_write(MO_GP1_IO, 0x808000); ++ msleep(100); ++ cx_write(MO_GP1_IO, 0x808080); ++ msleep(100); ++ break; + } /*end switch() */ + + +diff --git a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.c +index 666f83b..db48d51 100644 +--- a/drivers/media/pci/cx88/cx88-dvb.c ++++ b/drivers/media/pci/cx88/cx88-dvb.c +@@ -54,6 +54,7 @@ + #include "stv0288.h" + #include "stb6000.h" + #include "cx24116.h" ++#include "m88ds3103.h" + #include "stv0900.h" + #include "stb6100.h" + #include "stb6100_proc.h" +@@ -458,6 +459,56 @@ static int tevii_dvbs_set_voltage(struct dvb_frontend *fe, + return core->prev_set_voltage(fe, voltage); + return 0; + } ++/*CX88_BOARD_BST_PS8312*/ ++static int bst_dvbs_set_voltage(struct dvb_frontend *fe, ++ fe_sec_voltage_t voltage) ++{ ++ struct cx8802_dev *dev= fe->dvb->priv; ++ struct cx88_core *core = dev->core; ++ ++ cx_write(MO_GP1_IO, 0x111111); ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ cx_write(MO_GP1_IO, 0x020200); ++ break; ++ case SEC_VOLTAGE_18: ++ cx_write(MO_GP1_IO, 0x020202); ++ break; ++ case SEC_VOLTAGE_OFF: ++ cx_write(MO_GP1_IO, 0x111100); ++ break; ++ } ++ ++ if (core->prev_set_voltage) ++ return core->prev_set_voltage(fe, voltage); ++ return 0; ++} ++ ++static int bst_dvbs_set_voltage_v2(struct dvb_frontend *fe, ++ fe_sec_voltage_t voltage) ++{ ++ struct cx8802_dev *dev= fe->dvb->priv; ++ struct cx88_core *core = dev->core; ++ ++ cx_write(MO_GP1_IO, 0x111101); ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ cx_write(MO_GP1_IO, 0x020200); ++ break; ++ case SEC_VOLTAGE_18: ++ ++ cx_write(MO_GP1_IO, 0x020202); ++ break; ++ case SEC_VOLTAGE_OFF: ++ ++ cx_write(MO_GP1_IO, 0x111110); ++ break; ++ } ++ ++ if (core->prev_set_voltage) ++ return core->prev_set_voltage(fe, voltage); ++ return 0; ++} + + static int vp1027_set_voltage(struct dvb_frontend *fe, + fe_sec_voltage_t voltage) +@@ -700,6 +751,11 @@ static struct ds3000_config tevii_ds3000_config = { + .set_ts_params = ds3000_set_ts_param, + }; + ++static struct m88ds3103_config dvbsky_ds3103_config = { ++ .demod_address = 0x68, ++ .set_ts_params = ds3000_set_ts_param, ++}; ++ + static const struct stv0900_config prof_7301_stv0900_config = { + .demod_address = 0x6a, + /* demod_mode = 0,*/ +@@ -1470,6 +1526,35 @@ static int dvb_register(struct cx8802_dev *dev) + fe0->dvb.frontend->ops.set_voltage = + tevii_dvbs_set_voltage; + break; ++ case CX88_BOARD_BST_PS8312: ++ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, ++ &dvbsky_ds3103_config, ++ &core->i2c_adap); ++ if (fe0->dvb.frontend != NULL){ ++ int ret; ++ u8 b0[] = { 0x60 }; ++ u8 b1[2] = { 0 }; ++ struct i2c_msg msg[] = { ++ { ++ .addr = 0x50, ++ .flags = 0, ++ .buf = b0, ++ .len = 1 ++ }, { ++ .addr = 0x50, ++ .flags = I2C_M_RD, ++ .buf = b1, ++ .len = 2 ++ } ++ }; ++ ret = i2c_transfer(&core->i2c_adap, msg, 2); ++ printk("PS8312: config = %02x, %02x", b1[0],b1[1]); ++ if(b1[0] == 0xaa) ++ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage_v2; ++ else ++ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage; ++ } ++ break; + case CX88_BOARD_OMICOM_SS4_PCI: + case CX88_BOARD_TBS_8920: + case CX88_BOARD_PROF_7300: +diff --git a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c +index f29e18c..4de31ea 100644 +--- a/drivers/media/pci/cx88/cx88-input.c ++++ b/drivers/media/pci/cx88/cx88-input.c +@@ -419,6 +419,10 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) + rc_type = RC_BIT_NEC; + ir->sampling = 0xff00; /* address */ + break; ++ case CX88_BOARD_BST_PS8312: ++ ir_codes = RC_MAP_DVBSKY; ++ ir->sampling = 0xff00; /* address */ ++ break; + } + + if (!ir_codes) { +diff --git a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h +index ba0dba4..58f0c11 100644 +--- a/drivers/media/pci/cx88/cx88.h ++++ b/drivers/media/pci/cx88/cx88.h +@@ -141,7 +141,7 @@ struct sram_channel { + u32 cnt1_reg; + u32 cnt2_reg; + }; +-extern const struct sram_channel cx88_sram_channels[]; ++extern const struct sram_channel const cx88_sram_channels[]; + + /* ----------------------------------------------------------- */ + /* card configuration */ +@@ -238,6 +238,7 @@ extern const struct sram_channel cx88_sram_channels[]; + #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88 + #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89 + #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90 ++#define CX88_BOARD_BST_PS8312 91 + + enum cx88_itype { + CX88_VMUX_COMPOSITE1 = 1, +diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +index ab84d66..d536fd8 100644 +--- a/drivers/media/rc/keymaps/Makefile ++++ b/drivers/media/rc/keymaps/Makefile +@@ -27,6 +27,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ + rc-dm1105-nec.o \ + rc-dntv-live-dvb-t.o \ + rc-dntv-live-dvbt-pro.o \ ++ rc-dvbsky.o \ + rc-em-terratec.o \ + rc-encore-enltv2.o \ + rc-encore-enltv.o \ +diff --git a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c +new file mode 100644 +index 0000000..9a75cdc +--- /dev/null ++++ b/drivers/media/rc/keymaps/rc-dvbsky.c +@@ -0,0 +1,78 @@ ++/* rc-dvbsky.c - Keytable for Dvbsky Remote Controllers ++ * ++ * keymap imported from ir-keymaps.c ++ * ++ * ++ * Copyright (c) 2010-2012 by Nibble Max ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++/* ++ * This table contains the complete RC5 code, instead of just the data part ++ */ ++ ++static struct rc_map_table rc5_dvbsky[] = { ++ { 0x0000, KEY_0 }, ++ { 0x0001, KEY_1 }, ++ { 0x0002, KEY_2 }, ++ { 0x0003, KEY_3 }, ++ { 0x0004, KEY_4 }, ++ { 0x0005, KEY_5 }, ++ { 0x0006, KEY_6 }, ++ { 0x0007, KEY_7 }, ++ { 0x0008, KEY_8 }, ++ { 0x0009, KEY_9 }, ++ { 0x000a, KEY_MUTE }, ++ { 0x000d, KEY_OK }, ++ { 0x000b, KEY_STOP }, ++ { 0x000c, KEY_EXIT }, ++ { 0x000e, KEY_CAMERA }, /*Snap shot*/ ++ { 0x000f, KEY_SUBTITLE }, /*PIP*/ ++ { 0x0010, KEY_VOLUMEUP }, ++ { 0x0011, KEY_VOLUMEDOWN }, ++ { 0x0012, KEY_FAVORITES }, ++ { 0x0013, KEY_LIST }, /*Info*/ ++ { 0x0016, KEY_PAUSE }, ++ { 0x0017, KEY_PLAY }, ++ { 0x001f, KEY_RECORD }, ++ { 0x0020, KEY_CHANNELDOWN }, ++ { 0x0021, KEY_CHANNELUP }, ++ { 0x0025, KEY_POWER2 }, ++ { 0x0026, KEY_REWIND }, ++ { 0x0027, KEY_FASTFORWARD }, ++ { 0x0029, KEY_LAST }, ++ { 0x002b, KEY_MENU }, ++ { 0x002c, KEY_EPG }, ++ { 0x002d, KEY_ZOOM }, ++}; ++ ++static struct rc_map_list rc5_dvbsky_map = { ++ .map = { ++ .scan = rc5_dvbsky, ++ .size = ARRAY_SIZE(rc5_dvbsky), ++ .rc_type = RC_TYPE_RC5, ++ .name = RC_MAP_DVBSKY, ++ } ++}; ++ ++static int __init init_rc_map_rc5_dvbsky(void) ++{ ++ return rc_map_register(&rc5_dvbsky_map); ++} ++ ++static void __exit exit_rc_map_rc5_dvbsky(void) ++{ ++ rc_map_unregister(&rc5_dvbsky_map); ++} ++ ++module_init(init_rc_map_rc5_dvbsky) ++module_exit(exit_rc_map_rc5_dvbsky) ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Nibble Max "); +diff --git a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig +index fa0b293..60673c2 100644 +--- a/drivers/media/usb/dvb-usb/Kconfig ++++ b/drivers/media/usb/dvb-usb/Kconfig +@@ -262,6 +262,7 @@ config DVB_USB_DW2102 + select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT + select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT + select DVB_SI21XX if MEDIA_SUBDRV_AUTOSELECT + select DVB_TDA10023 if MEDIA_SUBDRV_AUTOSELECT + select DVB_MT312 if MEDIA_SUBDRV_AUTOSELECT +diff --git a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c +index 097c186..a028166 100644 +--- a/drivers/media/usb/dvb-usb/dw2102.c ++++ b/drivers/media/usb/dvb-usb/dw2102.c +@@ -19,6 +19,7 @@ + #include "stb6000.h" + #include "eds1547.h" + #include "cx24116.h" ++#include "m88ds3103.h" + #include "tda1002x.h" + #include "mt312.h" + #include "zl10039.h" +@@ -830,6 +831,39 @@ static int su3000_read_mac_address(struct dvb_usb_device *d, u8 mac[6]) + return 0; + } + ++static int dvbsky_read_mac_address(struct dvb_usb_device *d, u8 mac[6]) ++{ ++ int i; ++ u8 obuf[] = { 0x1e, 0x00 }; ++ u8 ibuf[] = { 0 }; ++ struct i2c_msg msg[] = { ++ { ++ .addr = 0x51, ++ .flags = 0, ++ .buf = obuf, ++ .len = 2, ++ }, { ++ .addr = 0x51, ++ .flags = I2C_M_RD, ++ .buf = ibuf, ++ .len = 1, ++ ++ } ++ }; ++ ++ for (i = 0; i < 6; i++) { ++ obuf[1] = i; ++ if (i2c_transfer(&d->i2c_adap, msg, 2) != 2) ++ break; ++ else ++ mac[i] = ibuf[0]; ++ ++ debug_dump(mac, 6, printk); ++ } ++ ++ return 0; ++} ++ + static int su3000_identify_state(struct usb_device *udev, + struct dvb_usb_device_properties *props, + struct dvb_usb_device_description **desc, +@@ -878,6 +912,43 @@ static int s660_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) + return 0; + } + ++static int bstusb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ ++ struct dvb_usb_adapter *udev_adap = ++ (struct dvb_usb_adapter *)(fe->dvb->priv); ++ ++ u8 obuf[3] = { 0xe, 0x80, 0 }; ++ u8 ibuf[] = { 0 }; ++ ++ info("US6830: %s!\n", __func__); ++ ++ if (voltage == SEC_VOLTAGE_OFF) ++ obuf[2] = 0; ++ else ++ obuf[2] = 1; ++ ++ if (dvb_usb_generic_rw(udev_adap->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ return 0; ++} ++ ++static int bstusb_restart(struct dvb_frontend *fe) ++{ ++ ++ struct dvb_usb_adapter *udev_adap = ++ (struct dvb_usb_adapter *)(fe->dvb->priv); ++ ++ u8 obuf[3] = { 0x36, 3, 0 }; ++ u8 ibuf[] = { 0 }; ++ ++ if (dvb_usb_generic_rw(udev_adap->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x36 transfer failed."); ++ ++ return 0; ++} ++ + static void dw210x_led_ctrl(struct dvb_frontend *fe, int offon) + { + static u8 led_off[] = { 0 }; +@@ -983,6 +1054,24 @@ static struct ds3000_config su3000_ds3000_config = { + .ci_mode = 1, + }; + ++static struct m88ds3103_config US6830_ds3103_config = { ++ .demod_address = 0x68, ++ .ci_mode = 1, ++ .pin_ctrl = 0x83, ++ .ts_mode = 0, ++ .start_ctrl = bstusb_restart, ++ .set_voltage = bstusb_set_voltage, ++}; ++ ++static struct m88ds3103_config US6832_ds3103_config = { ++ .demod_address = 0x68, ++ .ci_mode = 1, ++ .pin_ctrl = 0x80, ++ .ts_mode = 0, ++ .start_ctrl = bstusb_restart, ++ .set_voltage = bstusb_set_voltage, ++}; ++ + static int dw2104_frontend_attach(struct dvb_usb_adapter *d) + { + struct dvb_tuner_ops *tuner_ops = NULL; +@@ -1217,6 +1306,87 @@ static int su3000_frontend_attach(struct dvb_usb_adapter *d) + return 0; + } + ++static int US6830_frontend_attach(struct dvb_usb_adapter *d) ++{ ++ u8 obuf[3] = { 0xe, 0x04, 1 }; ++ u8 ibuf[] = { 0 }; ++ ++ info("US6830: %s!\n", __func__); ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ obuf[0] = 0xe; ++ obuf[1] = 0x83; ++ obuf[2] = 0; ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ msleep(20); ++ ++ obuf[0] = 0xe; ++ obuf[1] = 0x83; ++ obuf[2] = 1; ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ obuf[0] = 0x51; ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0) ++ err("command 0x51 transfer failed."); ++ ++ d->fe_adap[0].fe = dvb_attach(m88ds3103_attach, &US6830_ds3103_config, ++ &d->dev->i2c_adap); ++ if (d->fe_adap[0].fe == NULL) ++ return -EIO; ++ ++ info("Attached M88DS3103!\n"); ++ ++ return 0; ++} ++ ++static int US6832_frontend_attach(struct dvb_usb_adapter *d) ++{ ++ u8 obuf[3] = { 0xe, 0x04, 1 }; ++ u8 ibuf[] = { 0 }; ++ ++ info("US6832: %s!\n", __func__); ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ obuf[0] = 0xe; ++ obuf[1] = 0x83; ++ obuf[2] = 0; ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ msleep(20); ++ obuf[0] = 0xe; ++ obuf[1] = 0x83; ++ obuf[2] = 1; ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) ++ err("command 0x0e transfer failed."); ++ ++ obuf[0] = 0x51; ++ ++ if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0) ++ err("command 0x51 transfer failed."); ++ ++ d->fe_adap[0].fe = dvb_attach(m88ds3103_attach, &US6832_ds3103_config, ++ &d->dev->i2c_adap); ++ if (d->fe_adap[0].fe == NULL) ++ return -EIO; ++ ++ info("Attached M88DS3103!\n"); ++ ++ return 0; ++} ++ + static int dw2102_tuner_attach(struct dvb_usb_adapter *adap) + { + dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60, +@@ -1455,6 +1625,9 @@ enum dw2102_table_entry { + TEVII_S480_1, + TEVII_S480_2, + X3M_SPC1400HD, ++ BST_US6830HD, ++ BST_US6831HD, ++ BST_US6832HD, + }; + + static struct usb_device_id dw2102_table[] = { +@@ -1474,6 +1647,9 @@ static struct usb_device_id dw2102_table[] = { + [TEVII_S480_1] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_1)}, + [TEVII_S480_2] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_2)}, + [X3M_SPC1400HD] = {USB_DEVICE(0x1f4d, 0x3100)}, ++ [BST_US6830HD] = {USB_DEVICE(0x0572, 0x6830)}, ++ [BST_US6831HD] = {USB_DEVICE(0x0572, 0x6831)}, ++ [BST_US6832HD] = {USB_DEVICE(0x0572, 0x6832)}, + { } + }; + +@@ -1883,6 +2059,106 @@ static struct dvb_usb_device_properties su3000_properties = { + } + }; + ++static struct dvb_usb_device_properties US6830_properties = { ++ .caps = DVB_USB_IS_AN_I2C_ADAPTER, ++ .usb_ctrl = DEVICE_SPECIFIC, ++ .size_of_priv = sizeof(struct su3000_state), ++ .power_ctrl = su3000_power_ctrl, ++ .num_adapters = 1, ++ .identify_state = su3000_identify_state, ++ .i2c_algo = &su3000_i2c_algo, ++ ++ .rc.legacy = { ++ .rc_map_table = rc_map_su3000_table, ++ .rc_map_size = ARRAY_SIZE(rc_map_su3000_table), ++ .rc_interval = 150, ++ .rc_query = dw2102_rc_query, ++ }, ++ ++ .read_mac_address = dvbsky_read_mac_address, ++ ++ .generic_bulk_ctrl_endpoint = 0x01, ++ ++ .adapter = { ++ { ++ .num_frontends = 1, ++ .fe = {{ ++ .streaming_ctrl = su3000_streaming_ctrl, ++ .frontend_attach = US6830_frontend_attach, ++ .stream = { ++ .type = USB_BULK, ++ .count = 8, ++ .endpoint = 0x82, ++ .u = { ++ .bulk = { ++ .buffersize = 4096, ++ } ++ } ++ } ++ }}, ++ } ++ }, ++ .num_device_descs = 2, ++ .devices = { ++ { "Bestunar US6830 HD", ++ { &dw2102_table[BST_US6830HD], NULL }, ++ { NULL }, ++ }, ++ { "Bestunar US6831 HD", ++ { &dw2102_table[BST_US6831HD], NULL }, ++ { NULL }, ++ }, ++ } ++}; ++ ++static struct dvb_usb_device_properties US6832_properties = { ++ .caps = DVB_USB_IS_AN_I2C_ADAPTER, ++ .usb_ctrl = DEVICE_SPECIFIC, ++ .size_of_priv = sizeof(struct su3000_state), ++ .power_ctrl = su3000_power_ctrl, ++ .num_adapters = 1, ++ .identify_state = su3000_identify_state, ++ .i2c_algo = &su3000_i2c_algo, ++ ++ .rc.legacy = { ++ .rc_map_table = rc_map_su3000_table, ++ .rc_map_size = ARRAY_SIZE(rc_map_su3000_table), ++ .rc_interval = 150, ++ .rc_query = dw2102_rc_query, ++ }, ++ ++ .read_mac_address = dvbsky_read_mac_address, ++ ++ .generic_bulk_ctrl_endpoint = 0x01, ++ ++ .adapter = { ++ { ++ .num_frontends = 1, ++ .fe = {{ ++ .streaming_ctrl = su3000_streaming_ctrl, ++ .frontend_attach = US6832_frontend_attach, ++ .stream = { ++ .type = USB_BULK, ++ .count = 8, ++ .endpoint = 0x82, ++ .u = { ++ .bulk = { ++ .buffersize = 4096, ++ } ++ } ++ } ++ }}, ++ } ++ }, ++ .num_device_descs = 1, ++ .devices = { ++ { "Bestunar US6832 HD", ++ { &dw2102_table[BST_US6832HD], NULL }, ++ { NULL }, ++ }, ++ } ++}; ++ + static int dw2102_probe(struct usb_interface *intf, + const struct usb_device_id *id) + { +@@ -1939,6 +2215,10 @@ static int dw2102_probe(struct usb_interface *intf, + 0 == dvb_usb_device_init(intf, p7500, + THIS_MODULE, NULL, adapter_nr) || + 0 == dvb_usb_device_init(intf, &su3000_properties, ++ THIS_MODULE, NULL, adapter_nr) || ++ 0 == dvb_usb_device_init(intf, &US6830_properties, ++ THIS_MODULE, NULL, adapter_nr) || ++ 0 == dvb_usb_device_init(intf, &US6832_properties, + THIS_MODULE, NULL, adapter_nr)) + return 0; + +diff --git a/include/media/rc-map.h b/include/media/rc-map.h +index 74f55a3..1817662 100644 +--- a/include/media/rc-map.h ++++ b/include/media/rc-map.h +@@ -118,6 +118,7 @@ void rc_map_init(void); + #define RC_MAP_DM1105_NEC "rc-dm1105-nec" + #define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro" + #define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t" ++#define RC_MAP_DVBSKY "rc-dvbsky" + #define RC_MAP_EMPTY "rc-empty" + #define RC_MAP_EM_TERRATEC "rc-em-terratec" + #define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2" +-- +1.7.2.5 + From 4ff34e5ba29d0f958c3483f0a58687a7d48a62b7 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Thu, 28 Mar 2013 11:54:22 +0200 Subject: [PATCH 091/104] linux: rename -CX24120-13Z_frontend.patch --- .../{3.7.10 => 3.8.4}/linux-995-CX24120-13Z_frontend.patch | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename packages/linux/patches/{3.7.10 => 3.8.4}/linux-995-CX24120-13Z_frontend.patch (100%) diff --git a/packages/linux/patches/3.7.10/linux-995-CX24120-13Z_frontend.patch b/packages/linux/patches/3.8.4/linux-995-CX24120-13Z_frontend.patch similarity index 100% rename from packages/linux/patches/3.7.10/linux-995-CX24120-13Z_frontend.patch rename to packages/linux/patches/3.8.4/linux-995-CX24120-13Z_frontend.patch From 4de608f49c69fb9d5399fe51a69d9bddbc8fcf5b Mon Sep 17 00:00:00 2001 From: Stephan Raue Date: Fri, 29 Mar 2013 10:15:07 +0100 Subject: [PATCH 092/104] linux: update to linux-3.8.5 Signed-off-by: Stephan Raue --- packages/linux/meta | 2 +- .../{3.8.4 => 3.8.5}/linux-010-perf_crosscompiling.patch | 0 .../{3.8.4 => 3.8.5}/linux-053-spinelplus-remote-0.2.patch | 0 .../{3.8.4 => 3.8.5}/linux-059-remove_some_xpad_pids-0.2.patch | 0 .../linux-203-stb0899_enable_low_symbol_rate.patch | 0 ...2-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch | 0 .../linux-206.03-media-rc-Set-rdev-before-irq-setup.patch | 0 ...6.04-media-rc-Call-rc_register_device-before-irq-setup.patch | 0 packages/linux/patches/{3.8.4 => 3.8.5}/linux-210-dvbsky.patch | 0 .../{3.8.4 => 3.8.5}/linux-212-mantis_stb0899_faster_lock.patch | 0 .../patches/{3.8.4 => 3.8.5}/linux-213-cinergy_s2_usb_r2.patch | 0 .../linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch | 0 .../linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch | 0 .../patches/{3.8.4 => 3.8.5}/linux-221-ngene-octopus.patch | 0 .../{3.8.4 => 3.8.5}/linux-222-stb0899_signal_quality.patch | 0 .../linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch | 0 .../patches/{3.8.4 => 3.8.5}/linux-700-jmicron_1_0_8_5.patch | 0 ...990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch | 0 .../{3.8.4 => 3.8.5}/linux-995-CX24120-13Z_frontend.patch | 0 19 files changed, 1 insertion(+), 1 deletion(-) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-010-perf_crosscompiling.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-053-spinelplus-remote-0.2.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-059-remove_some_xpad_pids-0.2.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-203-stb0899_enable_low_symbol_rate.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-210-dvbsky.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-212-mantis_stb0899_faster_lock.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-213-cinergy_s2_usb_r2.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-221-ngene-octopus.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-222-stb0899_signal_quality.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-700-jmicron_1_0_8_5.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch (100%) rename packages/linux/patches/{3.8.4 => 3.8.5}/linux-995-CX24120-13Z_frontend.patch (100%) diff --git a/packages/linux/meta b/packages/linux/meta index 06b915c231..2ae75d634d 100644 --- a/packages/linux/meta +++ b/packages/linux/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="linux" -PKG_VERSION="3.8.4" +PKG_VERSION="3.8.5" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" diff --git a/packages/linux/patches/3.8.4/linux-010-perf_crosscompiling.patch b/packages/linux/patches/3.8.5/linux-010-perf_crosscompiling.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-010-perf_crosscompiling.patch rename to packages/linux/patches/3.8.5/linux-010-perf_crosscompiling.patch diff --git a/packages/linux/patches/3.8.4/linux-053-spinelplus-remote-0.2.patch b/packages/linux/patches/3.8.5/linux-053-spinelplus-remote-0.2.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-053-spinelplus-remote-0.2.patch rename to packages/linux/patches/3.8.5/linux-053-spinelplus-remote-0.2.patch diff --git a/packages/linux/patches/3.8.4/linux-059-remove_some_xpad_pids-0.2.patch b/packages/linux/patches/3.8.5/linux-059-remove_some_xpad_pids-0.2.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-059-remove_some_xpad_pids-0.2.patch rename to packages/linux/patches/3.8.5/linux-059-remove_some_xpad_pids-0.2.patch diff --git a/packages/linux/patches/3.8.4/linux-203-stb0899_enable_low_symbol_rate.patch b/packages/linux/patches/3.8.5/linux-203-stb0899_enable_low_symbol_rate.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-203-stb0899_enable_low_symbol_rate.patch rename to packages/linux/patches/3.8.5/linux-203-stb0899_enable_low_symbol_rate.patch diff --git a/packages/linux/patches/3.8.4/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch b/packages/linux/patches/3.8.5/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch rename to packages/linux/patches/3.8.5/linux-206.02-media-rc-Make-probe-cleanup-goto-labels-more-verbose.patch diff --git a/packages/linux/patches/3.8.4/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch b/packages/linux/patches/3.8.5/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch rename to packages/linux/patches/3.8.5/linux-206.03-media-rc-Set-rdev-before-irq-setup.patch diff --git a/packages/linux/patches/3.8.4/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch b/packages/linux/patches/3.8.5/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch rename to packages/linux/patches/3.8.5/linux-206.04-media-rc-Call-rc_register_device-before-irq-setup.patch diff --git a/packages/linux/patches/3.8.4/linux-210-dvbsky.patch b/packages/linux/patches/3.8.5/linux-210-dvbsky.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-210-dvbsky.patch rename to packages/linux/patches/3.8.5/linux-210-dvbsky.patch diff --git a/packages/linux/patches/3.8.4/linux-212-mantis_stb0899_faster_lock.patch b/packages/linux/patches/3.8.5/linux-212-mantis_stb0899_faster_lock.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-212-mantis_stb0899_faster_lock.patch rename to packages/linux/patches/3.8.5/linux-212-mantis_stb0899_faster_lock.patch diff --git a/packages/linux/patches/3.8.4/linux-213-cinergy_s2_usb_r2.patch b/packages/linux/patches/3.8.5/linux-213-cinergy_s2_usb_r2.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-213-cinergy_s2_usb_r2.patch rename to packages/linux/patches/3.8.5/linux-213-cinergy_s2_usb_r2.patch diff --git a/packages/linux/patches/3.8.4/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch b/packages/linux/patches/3.8.5/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch rename to packages/linux/patches/3.8.5/linux-215-rtl28xxu_ASUS_My_Cinema-U3100Mini_Plus_V2.patch diff --git a/packages/linux/patches/3.8.4/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch b/packages/linux/patches/3.8.5/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch rename to packages/linux/patches/3.8.5/linux-216-rtl28xxu_add_Gigabyte_U7300_DVB-T_Dongle.patch diff --git a/packages/linux/patches/3.8.4/linux-221-ngene-octopus.patch b/packages/linux/patches/3.8.5/linux-221-ngene-octopus.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-221-ngene-octopus.patch rename to packages/linux/patches/3.8.5/linux-221-ngene-octopus.patch diff --git a/packages/linux/patches/3.8.4/linux-222-stb0899_signal_quality.patch b/packages/linux/patches/3.8.5/linux-222-stb0899_signal_quality.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-222-stb0899_signal_quality.patch rename to packages/linux/patches/3.8.5/linux-222-stb0899_signal_quality.patch diff --git a/packages/linux/patches/3.8.4/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch b/packages/linux/patches/3.8.5/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch rename to packages/linux/patches/3.8.5/linux-223-Fix-video-artifacts-with-tt-3600-s2-usb.patch diff --git a/packages/linux/patches/3.8.4/linux-700-jmicron_1_0_8_5.patch b/packages/linux/patches/3.8.5/linux-700-jmicron_1_0_8_5.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-700-jmicron_1_0_8_5.patch rename to packages/linux/patches/3.8.5/linux-700-jmicron_1_0_8_5.patch diff --git a/packages/linux/patches/3.8.4/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch b/packages/linux/patches/3.8.5/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch rename to packages/linux/patches/3.8.5/linux-990.06-hda-Avoid-outputting-HDMI-audio-before-prepare-.patch diff --git a/packages/linux/patches/3.8.4/linux-995-CX24120-13Z_frontend.patch b/packages/linux/patches/3.8.5/linux-995-CX24120-13Z_frontend.patch similarity index 100% rename from packages/linux/patches/3.8.4/linux-995-CX24120-13Z_frontend.patch rename to packages/linux/patches/3.8.5/linux-995-CX24120-13Z_frontend.patch From 0a58a715df37a98ad952dcbf1b23c628067521ce Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sat, 30 Mar 2013 19:42:28 +0200 Subject: [PATCH 093/104] xbmc-addon-settings: update to xbmc-addon-settings-0.1.6 --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 47e9da9a6f..07c4957c84 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.1.4" +PKG_VERSION="0.1.6" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." From 5343e0866d2d417b9fbd3cad3cf0917086cd2ec1 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 12:03:30 +0300 Subject: [PATCH 094/104] xf86-video-nvidia: upadte to xf86-video-nvidia-310.40 --- packages/x11/driver/xf86-video-nvidia/meta | 2 +- .../make-use-of-the-new-uapi-framework.patch | 46 ------------------- ...VED-with-VM_DONTEXPAND-and-VM_DONTDU.patch | 28 ----------- 3 files changed, 1 insertion(+), 75 deletions(-) delete mode 100644 packages/x11/driver/xf86-video-nvidia/patches.upstream/make-use-of-the-new-uapi-framework.patch delete mode 100644 packages/x11/driver/xf86-video-nvidia/patches.upstream/replace-VM_RESERVED-with-VM_DONTEXPAND-and-VM_DONTDU.patch diff --git a/packages/x11/driver/xf86-video-nvidia/meta b/packages/x11/driver/xf86-video-nvidia/meta index 52bea1e52e..70f7be7fe4 100644 --- a/packages/x11/driver/xf86-video-nvidia/meta +++ b/packages/x11/driver/xf86-video-nvidia/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="xf86-video-nvidia" -PKG_VERSION="304.64" +PKG_VERSION="310.40" PKG_REV="1" PKG_ARCH="i386 x86_64" PKG_LICENSE="nonfree" diff --git a/packages/x11/driver/xf86-video-nvidia/patches.upstream/make-use-of-the-new-uapi-framework.patch b/packages/x11/driver/xf86-video-nvidia/patches.upstream/make-use-of-the-new-uapi-framework.patch deleted file mode 100644 index 852021d657..0000000000 --- a/packages/x11/driver/xf86-video-nvidia/patches.upstream/make-use-of-the-new-uapi-framework.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 1e3d34ce7d8c4912c08386589843fcc4ba4d38bf Mon Sep 17 00:00:00 2001 -From: Alberto Milone -Date: Wed, 7 Nov 2012 12:03:46 +0100 -Subject: [PATCH 1/2] Make use of the new uapi framework - ---- - conftest.sh | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/kernel/conftest.sh b/kernel/conftest.sh -index 388e268..8eff4d7 100755 ---- a/kernel/conftest.sh -+++ b/kernel/conftest.sh -@@ -20,6 +20,7 @@ ARCH=$3 - ISYSTEM=`$CC -print-file-name=include 2> /dev/null` - SOURCES=$4 - HEADERS=$SOURCES/include -+HEADERSA=$SOURCES/include/uapi - OUTPUT=$5 - XEN_PRESENT=1 - -@@ -118,7 +119,7 @@ build_cflags() { - fi - fi - -- CFLAGS="$CFLAGS $OUTPUT_CFLAGS -I$HEADERS $AUTOCONF_CFLAGS" -+ CFLAGS="$CFLAGS $OUTPUT_CFLAGS -I$HEADERS -I$HEADERSA $AUTOCONF_CFLAGS" - - test_xen - -@@ -146,10 +147,10 @@ build_cflags() { - fi - fi - -- CFLAGS="$BASE_CFLAGS $MACH_CFLAGS $OUTPUT_CFLAGS -I$HEADERS $AUTOCONF_CFLAGS" -+ CFLAGS="$BASE_CFLAGS $MACH_CFLAGS $OUTPUT_CFLAGS -I$HEADERS -I$HEADERSA $AUTOCONF_CFLAGS" - - if [ "$ARCH" = "i386" -o "$ARCH" = "x86_64" ]; then -- CFLAGS="$CFLAGS -I$SOURCES/arch/x86/include -I$OUTPUT/arch/x86/include/generated" -+ CFLAGS="$CFLAGS -I$SOURCES/arch/x86/include -I$SOURCES/arch/x86/include/uapi -I$OUTPUT/arch/x86/include/generated -I$OUTPUT/arch/x86/include/generated/uapi" - elif [ "$ARCH" = "arm" ]; then - CFLAGS="$CFLAGS -I$SOURCES/arch/arm/include -I$OUTPUT/arch/arm/include/generated" - fi --- -1.7.9.5 - diff --git a/packages/x11/driver/xf86-video-nvidia/patches.upstream/replace-VM_RESERVED-with-VM_DONTEXPAND-and-VM_DONTDU.patch b/packages/x11/driver/xf86-video-nvidia/patches.upstream/replace-VM_RESERVED-with-VM_DONTEXPAND-and-VM_DONTDU.patch deleted file mode 100644 index 84bd164e76..0000000000 --- a/packages/x11/driver/xf86-video-nvidia/patches.upstream/replace-VM_RESERVED-with-VM_DONTEXPAND-and-VM_DONTDU.patch +++ /dev/null @@ -1,28 +0,0 @@ -From fed1fa17202cf13bf80bbbad3bf0ffdfd192df42 Mon Sep 17 00:00:00 2001 -From: Alberto Milone -Date: Wed, 7 Nov 2012 12:11:02 +0100 -Subject: [PATCH 1/1] Replace VM_RESERVED with VM_DONTEXPAND and VM_DONTDUMP - ---- - nv-mmap.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/kernel/nv-mmap.c b/kernel/nv-mmap.c -index acc02ec..b2d5cdb 100644 ---- a/kernel/nv-mmap.c -+++ b/kernel/nv-mmap.c -@@ -463,7 +463,11 @@ int nv_kern_mmap( - NV_PRINT_AT(NV_DBG_MEMINFO, at); - nv_vm_list_page_count(&at->page_table[i], pages); - -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ vma->vm_flags |= (VM_IO | VM_LOCKED | (VM_DONTEXPAND | VM_DONTDUMP)); -+#else - vma->vm_flags |= (VM_IO | VM_LOCKED | VM_RESERVED); -+#endif - - #if defined(VM_DRIVER_PAGES) - vma->vm_flags |= VM_DRIVER_PAGES; --- -1.7.9.5 - From 1e1c6f10c4996d0cae0661143f47a46b912298c4 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 12:26:07 +0300 Subject: [PATCH 095/104] connman: update to connman-baa5515 --- packages/network/connman/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/network/connman/meta b/packages/network/connman/meta index 79109470a4..b3f29af26b 100644 --- a/packages/network/connman/meta +++ b/packages/network/connman/meta @@ -19,7 +19,7 @@ ################################################################################ PKG_NAME="connman" -PKG_VERSION="9fa8782" +PKG_VERSION="baa5515" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="GPL" From 4835beacc0ec172f3a0622a490c65bd0a79cee9f Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 19:04:44 +0300 Subject: [PATCH 096/104] open-vm-tools: add linux-3.8 support patch --- ...open-vm-tools-9.2.2-893683-linux-3.8.patch | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 packages/sysutils/open-vm-tools/patches/open-vm-tools-9.2.2-893683-linux-3.8.patch diff --git a/packages/sysutils/open-vm-tools/patches/open-vm-tools-9.2.2-893683-linux-3.8.patch b/packages/sysutils/open-vm-tools/patches/open-vm-tools-9.2.2-893683-linux-3.8.patch new file mode 100644 index 0000000000..bc087218d8 --- /dev/null +++ b/packages/sysutils/open-vm-tools/patches/open-vm-tools-9.2.2-893683-linux-3.8.patch @@ -0,0 +1,60 @@ +--- open-vm-tools-2012.05.21-724730/modules/linux/vmci/linux/driver.c~ 2012-05-22 22:12:52.000000000 +0200 ++++ open-vm-tools-2012.05.21-724730/modules/linux/vmci/linux/driver.c 2013-02-21 01:22:04.836684885 +0100 +@@ -128,7 +128,11 @@ static struct pci_driver vmci_driver = { + .name = VMCI_DEVICE_NAME, + .id_table = vmci_ids, + .probe = vmci_probe_device, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + .remove = __devexit_p(vmci_remove_device), ++#else ++ .remove = vmci_remove_device, ++#endif + }; + + #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +@@ -1747,7 +1751,10 @@ vmci_enable_msix(struct pci_dev *pdev) / + *----------------------------------------------------------------------------- + */ + +-static int __devinit ++static int ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) ++__devinit ++#endif + vmci_probe_device(struct pci_dev *pdev, // IN: vmci PCI device + const struct pci_device_id *id) // IN: matching device ID + { +@@ -1975,7 +1982,10 @@ vmci_probe_device(struct pci_dev *pdev, + *----------------------------------------------------------------------------- + */ + +-static void __devexit ++static void ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) ++__devexit ++#endif + vmci_remove_device(struct pci_dev* pdev) + { + struct vmci_device *dev = pci_get_drvdata(pdev); +--- open-vm-tools-2012.05.21-724730/modules/linux/shared/compat_mm.h 2013-01-17 17:58:53.090333002 +0100 ++++ open-vm-tools-2012.05.21-724730/modules/linux/shared/compat_mm.h 2013-01-17 18:18:25.274280444 +0100 +@@ -99,8 +99,18 @@ static inline struct page * alloc_pages( + vmtruncate(inode, size); \ + result; \ + }) +-#else ++#elif LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0) + #define compat_vmtruncate(inode, size) vmtruncate(inode, size) ++#else ++#define compat_vmtruncate(inode, size) \ ++({ \ ++ result = inode_newsize_ok(inode, size); \ ++ if (!result) \ ++ { \ ++ truncate_setsize(inode, size); \ ++ } \ ++ result; \ ++}) + #endif + + From 792f7748ecd0eddba01c4d59ea03db2916e048ee Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 19:32:02 +0300 Subject: [PATCH 097/104] linux: update dvbsky patch --- .../patches/3.8.5/linux-210-dvbsky.patch | 23412 ++++++++++++++-- 1 file changed, 20799 insertions(+), 2613 deletions(-) diff --git a/packages/linux/patches/3.8.5/linux-210-dvbsky.patch b/packages/linux/patches/3.8.5/linux-210-dvbsky.patch index 9e2bdf416b..ef64f1c9fb 100644 --- a/packages/linux/patches/3.8.5/linux-210-dvbsky.patch +++ b/packages/linux/patches/3.8.5/linux-210-dvbsky.patch @@ -1,49 +1,7 @@ -From 8d189966ad4d494c9630d2b1c41a0ff9ccaa3d0a Mon Sep 17 00:00:00 2001 -From: Stefan Saraev -Date: Tue, 26 Mar 2013 12:52:27 +0200 -Subject: [PATCH] dvbsky - ---- - drivers/media/dvb-frontends/Kconfig | 14 + - drivers/media/dvb-frontends/Makefile | 2 + - drivers/media/dvb-frontends/m88dc2800.c | 2235 ++++++++++++++++++++++++++ - drivers/media/dvb-frontends/m88dc2800.h | 43 + - drivers/media/dvb-frontends/m88ds3103.c | 1710 ++++++++++++++++++++ - drivers/media/dvb-frontends/m88ds3103.h | 53 + - drivers/media/dvb-frontends/m88ds3103_priv.h | 403 +++++ - drivers/media/pci/cx23885/Kconfig | 2 + - drivers/media/pci/cx23885/cimax2.c | 23 +- - drivers/media/pci/cx23885/cimax2.h | 4 +- - drivers/media/pci/cx23885/cx23885-cards.c | 172 ++- - drivers/media/pci/cx23885/cx23885-core.c | 6 + - drivers/media/pci/cx23885/cx23885-dvb.c | 207 ++- - drivers/media/pci/cx23885/cx23885-f300.c | 55 + - drivers/media/pci/cx23885/cx23885-f300.h | 6 + - drivers/media/pci/cx23885/cx23885-input.c | 21 + - drivers/media/pci/cx23885/cx23885.h | 9 +- - drivers/media/pci/cx88/Kconfig | 1 + - drivers/media/pci/cx88/cx88-cards.c | 22 + - drivers/media/pci/cx88/cx88-dvb.c | 85 + - drivers/media/pci/cx88/cx88-input.c | 4 + - drivers/media/pci/cx88/cx88.h | 3 +- - drivers/media/rc/keymaps/Makefile | 1 + - drivers/media/rc/keymaps/rc-dvbsky.c | 78 + - drivers/media/usb/dvb-usb/Kconfig | 1 + - drivers/media/usb/dvb-usb/dw2102.c | 280 ++++ - include/media/rc-map.h | 1 + - 27 files changed, 5384 insertions(+), 57 deletions(-) - create mode 100644 drivers/media/dvb-frontends/m88dc2800.c - create mode 100644 drivers/media/dvb-frontends/m88dc2800.h - create mode 100644 drivers/media/dvb-frontends/m88ds3103.c - create mode 100644 drivers/media/dvb-frontends/m88ds3103.h - create mode 100644 drivers/media/dvb-frontends/m88ds3103_priv.h - create mode 100644 drivers/media/rc/keymaps/rc-dvbsky.c - -diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig -index e2483f9..743b4d0 100644 ---- a/drivers/media/dvb-frontends/Kconfig -+++ b/drivers/media/dvb-frontends/Kconfig -@@ -218,6 +218,20 @@ config DVB_CX24116 +diff -urN a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig +--- a/drivers/media/dvb-frontends/Kconfig 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/dvb-frontends/Kconfig 2013-02-14 22:57:20.000000000 +0800 +@@ -200,6 +200,27 @@ help A DVB-S/S2 tuner module. Say Y when you want to support this frontend. @@ -60,33 +18,27 @@ index e2483f9..743b4d0 100644 + default m if !MEDIA_SUBDRV_AUTOSELECT + help + A DVB-C tuner module. Say Y when you want to support this frontend. -+ ++ ++config DVB_SI2168 ++ tristate "Si2168 based" ++ depends on DVB_CORE && I2C ++ default m if !MEDIA_SUBDRV_AUTOSELECT ++ help ++ A DVB-T2/T/C tuner module. Say Y when you want to support this frontend. ++ config DVB_SI21XX tristate "Silicon Labs SI21XX based" depends on DVB_CORE && I2C -diff --git a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile -index b8820aa..8528900 100644 ---- a/drivers/media/dvb-frontends/Makefile -+++ b/drivers/media/dvb-frontends/Makefile -@@ -104,4 +104,6 @@ obj-$(CONFIG_DVB_RTL2830) += rtl2830.o - obj-$(CONFIG_DVB_RTL2832) += rtl2832.o - obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o - obj-$(CONFIG_DVB_AF9033) += af9033.o -+obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o -+obj-$(CONFIG_DVB_M88DC2800) += m88dc2800.o - -diff --git a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontends/m88dc2800.c -new file mode 100644 -index 0000000..f48a356 ---- /dev/null -+++ b/drivers/media/dvb-frontends/m88dc2800.c -@@ -0,0 +1,2235 @@ +diff -urN a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontends/m88dc2800.c +--- a/drivers/media/dvb-frontends/m88dc2800.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/m88dc2800.c 2013-01-26 16:03:21.000000000 +0800 +@@ -0,0 +1,2124 @@ +/* + M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage + + Copyright (C) 2012 Max nibble -+ Copyright (C) 2011 Montage Technology -+ ++ Copyright (C) 2011 Montage Technology / www.montage-tech.com ++ + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or @@ -114,28 +66,28 @@ index 0000000..f48a356 +#include "m88dc2800.h" + +struct m88dc2800_state { -+ struct i2c_adapter* i2c; -+ const struct m88dc2800_config *config; -+ struct dvb_frontend frontend; ++ struct i2c_adapter *i2c; ++ const struct m88dc2800_config *config; ++ struct dvb_frontend frontend; + u32 freq; + u32 ber; + u32 sym; + u16 qam; + u8 inverted; + u32 xtal; -+ /*tuner state*/ -+ u8 tuner_init_OK; /* Tuner initialize status */ -+ u8 tuner_dev_addr; /* Tuner device address */ -+ u32 tuner_freq; /* RF frequency to be set, unit: KHz */ -+ u16 tuner_qam; /* Reserved */ -+ u16 tuner_mode; -+ u8 tuner_bandwidth; /* Bandwidth of the channel, unit: MHz, 6/7/8 */ -+ u8 tuner_loopthrough; /* Tuner loop through switch, 0/1 */ -+ u32 tuner_crystal; /* Tuner crystal frequency, unit: KHz */ -+ u32 tuner_dac; /* Tuner DAC frequency, unit: KHz */ -+ u16 tuner_mtt; /* Tuner chip version, D1: 0x0d, E0: 0x0e, E1: 0x8e */ -+ u16 tuner_custom_cfg; -+ u32 tuner_version; /* Tuner driver version number */ ++ /* tuner state */ ++ u8 tuner_init_OK; /* Tuner initialize status */ ++ u8 tuner_dev_addr; /* Tuner device address */ ++ u32 tuner_freq; /* RF frequency to be set, unit: KHz */ ++ u16 tuner_qam; /* Reserved */ ++ u16 tuner_mode; ++ u8 tuner_bandwidth; /* Bandwidth of the channel, unit: MHz, 6/7/8 */ ++ u8 tuner_loopthrough; /* Tuner loop through switch, 0/1 */ ++ u32 tuner_crystal; /* Tuner crystal frequency, unit: KHz */ ++ u32 tuner_dac; /* Tuner DAC frequency, unit: KHz */ ++ u16 tuner_mtt; /* Tuner chip version, D1: 0x0d, E0: 0x0e, E1: 0x8e */ ++ u16 tuner_custom_cfg; ++ u32 tuner_version; /* Tuner driver version number */ + u32 tuner_time; +}; + @@ -150,25 +102,27 @@ index 0000000..f48a356 + } while (0) + + -+static int m88dc2800_i2c_write(struct m88dc2800_state *state, u8 addr, u8 *p_data, u8 len) ++static int m88dc2800_i2c_write(struct m88dc2800_state *state, u8 addr, ++ u8 * p_data, u8 len) +{ + struct i2c_msg msg = { .flags = 0 }; -+ ++ + msg.addr = addr; + msg.buf = p_data; + msg.len = len; -+ ++ + return i2c_transfer(state->i2c, &msg, 1); +} + -+static int m88dc2800_i2c_read(struct m88dc2800_state *state, u8 addr, u8 *p_data, u8 len) ++static int m88dc2800_i2c_read(struct m88dc2800_state *state, u8 addr, ++ u8 * p_data, u8 len) +{ + struct i2c_msg msg = { .flags = I2C_M_RD }; -+ ++ + msg.addr = addr; + msg.buf = p_data; + msg.len = len; -+ ++ + return i2c_transfer(state->i2c, &msg, 1); +} + @@ -179,15 +133,14 @@ index 0000000..f48a356 + u8 addr = state->config->demod_address; + int err; + -+ if (debug > 1) -+ printk("m88dc2800: %s: write reg 0x%02x, value 0x%02x\n", -+ __func__, reg, data); ++ dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data); + + err = m88dc2800_i2c_write(state, addr, buf, 2); + + if (err != 1) { -+ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); ++ printk(KERN_ERR ++ "%s: writereg error(err == %i, reg == 0x%02x," ++ " value == 0x%02x)\n", __func__, err, reg, data); + return -EIO; + } + return 0; @@ -199,1831 +152,1710 @@ index 0000000..f48a356 + u8 b0[] = { reg }; + u8 b1[] = { 0 }; + u8 addr = state->config->demod_address; -+ ++ + ret = m88dc2800_i2c_write(state, addr, b0, 1); -+ ++ + if (ret != 1) { + printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", -+ __func__, reg, ret); ++ __func__, reg, ret); + return -EIO; + } -+ ++ + ret = m88dc2800_i2c_read(state, addr, b1, 1); + -+ if (debug > 1) -+ printk(KERN_INFO "m88dc2800: read reg 0x%02x, value 0x%02x\n", -+ reg, b1[0]); ++ dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]); + return b1[0]; +} + -+static int _mt_fe_tn_set_reg(struct m88dc2800_state *state, u8 reg, u8 data) ++static int _mt_fe_tn_set_reg(struct m88dc2800_state *state, u8 reg, ++ u8 data) +{ + int ret; -+ u8 buf[2]; ++ u8 buf[2]; + u8 addr = state->tuner_dev_addr; -+ ++ + buf[1] = ReadReg(state, 0x86); + buf[1] |= 0x80; + ret = WriteReg(state, 0x86, buf[1]); -+ ++ + buf[0] = reg; + buf[1] = data; -+ ++ + ret = m88dc2800_i2c_write(state, addr, buf, 2); -+ if(ret != 1) -+ return -EIO; -+ return 0; ++ if (ret != 1) ++ return -EIO; ++ return 0; +} + -+static int _mt_fe_tn_get_reg(struct m88dc2800_state *state, u8 reg, u8 *p_data) ++static int _mt_fe_tn_get_reg(struct m88dc2800_state *state, u8 reg, ++ u8 * p_data) +{ + int ret; -+ u8 buf[2]; ++ u8 buf[2]; + u8 addr = state->tuner_dev_addr; -+ ++ + buf[1] = ReadReg(state, 0x86); + buf[1] |= 0x80; + ret = WriteReg(state, 0x86, buf[1]); -+ ++ + buf[0] = reg; + ret = m88dc2800_i2c_write(state, addr, buf, 1); -+ ++ + msleep(1); -+ ++ + buf[1] = ReadReg(state, 0x86); + buf[1] |= 0x80; + ret = WriteReg(state, 0x86, buf[1]); -+ -+ return m88dc2800_i2c_read(state, addr, p_data, 1); ++ ++ return m88dc2800_i2c_read(state, addr, p_data, 1); +} + +/* Tuner operation functions.*/ -+static int _mt_fe_tn_set_RF_front_tc2800(struct m88dc2800_state *state) -+{ -+ u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { /* D1 */ -+ if (freq_KHz <= 123000) { -+ if (freq_KHz <= 56000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x00); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x00); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x00); -+ }else if (freq_KHz <= 64000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x10); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x01); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x08); -+ }else if (freq_KHz <= 72000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x20); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x02); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x10); -+ }else if (freq_KHz <= 80000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x30); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x03); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x18); -+ }else if (freq_KHz <= 88000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x40); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x04); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x20); -+ }else if (freq_KHz <= 96000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x50); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x05); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x28); -+ }else if (freq_KHz <= 104000) { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x60); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x06); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x30); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, 0x70); -+ _mt_fe_tn_set_reg(state, 0x5d, 0x07); -+ _mt_fe_tn_set_reg(state, 0x5e, 0x38); -+ } -+ _mt_fe_tn_set_reg(state, 0x5a, 0x75); -+ _mt_fe_tn_set_reg(state, 0x73, 0x0c); -+ } else { /* if (freq_KHz > 112000) */ -+ _mt_fe_tn_set_reg(state, 0x58, 0x7b); -+ if (freq_KHz <= 304000) { -+ if (freq_KHz <= 136000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x40); -+ }else if (freq_KHz <= 160000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x48); -+ }else if (freq_KHz <= 184000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x50); -+ }else if (freq_KHz <= 208000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x58); -+ }else if (freq_KHz <= 232000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x60); -+ }else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x68); -+ }else if (freq_KHz <= 280000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x70); -+ }else { /*if (freq_KHz <= 304000)*/ -+ _mt_fe_tn_set_reg(state, 0x5e, 0x78); -+ } -+ if (freq_KHz <= 171000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x08); -+ }else if (freq_KHz <= 211000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0a); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } -+ }else { /* if (freq_KHz > 304000) */ -+ _mt_fe_tn_set_reg(state, 0x5e, 0x88); -+ if (freq_KHz <= 400000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0c); -+ }else if (freq_KHz <= 450000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x09); -+ }else if (freq_KHz <= 550000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ }else if (freq_KHz <= 650000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0d); -+ }else { /*if (freq_KHz > 650000) */ -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } -+ } -+ } -+ -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x24); -+ else if (freq_KHz > 700000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x34); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x44); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ -+ if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x53); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x57); -+ else -+ _mt_fe_tn_set_reg(state, 0x6a, 0x59); -+ -+ if (freq_KHz < 200000) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x5d); -+ }else if (freq_KHz < 500000) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x7d); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x20, 0xfd); -+ }/* end of 0xD1 */ -+ }else if (state->tuner_mtt == 0xE1) { /* E1 */ -+ if (freq_KHz <= 112000) { /* 123MHz */ -+ if (freq_KHz <= 56000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x01); -+ }else if (freq_KHz <= 64000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x09); -+ }else if (freq_KHz <= 72000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x11); -+ }else if (freq_KHz <= 80000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x19); -+ }else if (freq_KHz <= 88000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x21); -+ }else if (freq_KHz <= 96000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x29); -+ }else if (freq_KHz <= 104000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x31); -+ }else {/* if (freq_KHz <= 112000) */ -+ _mt_fe_tn_set_reg(state, 0x5c, 0x39); -+ } -+ _mt_fe_tn_set_reg(state, 0x5b, 0x30); -+ }else { /* if (freq_KHz > 112000) */ -+ if (freq_KHz <= 304000) { -+ if (freq_KHz <= 136000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x41); -+ }else if (freq_KHz <= 160000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x49); -+ }else if (freq_KHz <= 184000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x51); -+ }else if (freq_KHz <= 208000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x59); -+ }else if (freq_KHz <= 232000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x61); -+ }else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x69); -+ }else if (freq_KHz <= 280000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x71); -+ }else { /*if (freq_KHz <= 304000)*/ -+ _mt_fe_tn_set_reg(state, 0x5c, 0x79); -+ } -+ -+ if (freq_KHz <= 150000) { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x28); -+ }else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x29); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x2a); -+ } -+ }else { /* if (freq_KHz > 304000) */ -+ if (freq_KHz <= 400000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x89); -+ }else if (freq_KHz <= 450000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x91); -+ }else if (freq_KHz <= 650000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x98); -+ }else if (freq_KHz <= 850000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0xa0); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x5c, 0xa8); -+ } -+ _mt_fe_tn_set_reg(state, 0x5b, 0x08); -+ } -+ } -+ } /* end of 0xE1 */ -+ return 0; -+} -+ -+static int _mt_fe_tn_cali_PLL_tc2800(struct m88dc2800_state *state, u32 freq_KHz, u32 cali_freq_thres_div2, u32 cali_freq_thres_div3r, u32 cali_freq_thres_div3) -+{ -+ s32 N, F, MUL; -+ u8 buf, tmp, tmp2; -+ s32 M; -+ const s32 crystal_KHz = state->tuner_crystal; -+ -+ if (state->tuner_mtt == 0xD1) { -+ M = state->tuner_crystal / 4000; -+ if (freq_KHz > cali_freq_thres_div2) { -+ MUL = 4; -+ tmp = 2; -+ }else if (freq_KHz > 300000) { -+ MUL = 8; -+ tmp = 3; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 2)) { -+ MUL = 8; -+ tmp = 4; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 4)) { -+ MUL = 16; -+ tmp = 5; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 8)) { -+ MUL = 32; -+ tmp = 6; -+ }else if (freq_KHz > (cali_freq_thres_div2 / 16)){ -+ MUL = 64; -+ tmp = 7; -+ }else { /* invalid */ -+ MUL = 0; -+ tmp = 0; -+ return 1; -+ } -+ }else if (state->tuner_mtt == 0xE1) { -+ M = state->tuner_crystal / 1000; -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x32, 0xe0); -+ _mt_fe_tn_set_reg(state, 0x33, 0x86); -+ _mt_fe_tn_set_reg(state, 0x37, 0x70); -+ _mt_fe_tn_set_reg(state, 0x38, 0x20); -+ _mt_fe_tn_set_reg(state, 0x39, 0x18); -+ _mt_fe_tn_set_reg(state, 0x89, 0x83); -+ -+ if (freq_KHz > cali_freq_thres_div2) { -+ M = M / 4; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > cali_freq_thres_div3r) { -+ M = M / 3; -+ MUL = 6; -+ tmp = 2; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > cali_freq_thres_div3) { -+ M = M / 3; -+ MUL = 6; -+ tmp = 2; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > 304000) { -+ M = M / 4; -+ MUL = 8; -+ tmp = 3; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 2)) { -+ M = M / 4; -+ MUL = 8; -+ tmp = 4; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 2)) { -+ M = M / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 2)) { -+ M = M / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 4)) { -+ M = M / 4; -+ MUL = 16; -+ tmp = 5; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 4)) { -+ M = M / 3; -+ MUL = 24; -+ tmp = 5; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 4)) { -+ M = M / 3; -+ MUL = 24; -+ tmp = 5; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 8)) { -+ M = M / 4; -+ MUL = 32; -+ tmp = 6; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 8)) { -+ M = M / 3; -+ MUL = 48; -+ tmp = 6; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 8)) { -+ M = M / 3; -+ MUL = 48; -+ tmp = 6; -+ tmp2 = M; /*16*/ -+ }else if (freq_KHz > (cali_freq_thres_div2 / 16)) { -+ M = M / 4; -+ MUL = 64; -+ tmp = 7; -+ tmp2 = M + 16; /*48*/ -+ }else if (freq_KHz > (cali_freq_thres_div3r / 16)) { -+ M = M / 3; -+ MUL = 96; -+ tmp = 7; -+ tmp2 = M + 32; /*32*/ -+ }else if (freq_KHz > (cali_freq_thres_div3 / 16)) { -+ M = M / 3; -+ MUL = 96; -+ tmp = 7; -+ tmp2 = M; /*16*/ -+ }else { /* invalid */ -+ M = M / 4; -+ MUL = 0; -+ tmp = 0; -+ tmp2 = 48; -+ return 1; -+ } -+ -+ if (freq_KHz == 291000) { -+ M = state->tuner_crystal / 1000 / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M + 32; /*32*/ -+ } -+ /* -+ if (freq_KHz == 578000) { -+ M = state->tuner_crystal / 1000 / 4; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; //48 -+ } -+ */ -+ if (freq_KHz == 690000) { -+ M = state->tuner_crystal / 1000 / 3; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; /*48*/ -+ } -+ _mt_fe_tn_get_reg(state, 0x33, &buf); -+ buf &= 0xc0; -+ buf += tmp2; -+ _mt_fe_tn_set_reg(state, 0x33, buf); -+ }else { -+ return 1; -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf &= 0xf8; -+ buf += tmp; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ -+ N = (freq_KHz * MUL * M / crystal_KHz) / 2 * 2 - 256; -+ -+ buf = (N >> 8) & 0xcf; -+ if (state->tuner_mtt == 0xE1) { -+ buf |= 0x30; -+ } -+ _mt_fe_tn_set_reg(state, 0x34, buf); -+ -+ buf = N & 0xff; -+ _mt_fe_tn_set_reg(state, 0x35, buf); -+ -+ F = ((freq_KHz * MUL * M / (crystal_KHz / 1000) / 2) - (freq_KHz * MUL * M / crystal_KHz / 2 * 1000)) * 64 / 1000; -+ -+ buf = F & 0xff; -+ _mt_fe_tn_set_reg(state, 0x36, buf); -+ -+ if (F == 0) { -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x3d, 0xca); -+ }else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x3d, 0xfe); -+ } else { -+ return 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x3e, 0x9c); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x34); -+ } -+ -+ if (F > 0) { -+ if (state->tuner_mtt == 0xD1) { -+ if ((F == 32) || (F == 16) || (F == 48)) { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ }else { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ } -+ }else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x7e); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ _mt_fe_tn_set_reg(state, 0x89, 0x84); -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf & 0x1f; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x02; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ }else { -+ return 1; -+ } -+ } -+ -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ if (state->tuner_mtt == 0xD1) { -+ msleep(5); -+ }else if (state->tuner_mtt == 0xE1) { -+ msleep(2); -+ }else { -+ return 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_PLL_freq_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf, buf1; -+ u32 freq_thres_div2_KHz, freq_thres_div3r_KHz, freq_thres_div3_KHz; -+ -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x32, 0xe1); -+ _mt_fe_tn_set_reg(state, 0x33, 0xa6); -+ _mt_fe_tn_set_reg(state, 0x37, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x38, 0x20); -+ _mt_fe_tn_set_reg(state, 0x39, 0x18); -+ _mt_fe_tn_set_reg(state, 0x40, 0x40); -+ -+ freq_thres_div2_KHz = 520000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); -+ -+ msleep(5); -+ _mt_fe_tn_get_reg(state, 0x3a, &buf); -+ buf1 = buf; -+ buf = buf & 0x03; -+ buf1 = buf1 & 0x01; -+ if ((buf1 == 0) || (buf == 3)) { -+ freq_thres_div2_KHz = 420000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); -+ msleep(5); -+ -+ _mt_fe_tn_get_reg(state, 0x3a, &buf); -+ buf = buf & 0x07; -+ if (buf == 5) { -+ freq_thres_div2_KHz = 520000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, 0, 0); -+ msleep(5); -+ } -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf & 0xdf; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x40, 0x0); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(5); -+ -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf >> 5; -+ if (buf < 5) { -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf | 0xa0; -+ buf = buf & 0xbf; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x02; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x37, &buf); -+ if (buf > 0x70) { -+ buf = 0x7f; -+ _mt_fe_tn_set_reg(state, 0x40, 0x40); -+ } -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ -+ -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ if (buf < 0x0f) { -+ buf = (buf & 0x0f) << 2; -+ buf = buf + 0x0f; -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ }else if (buf < 0x1f) { -+ buf= buf + 0x0f; -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf | 0x20) & 0xef; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ -+ }else if (state->tuner_mtt == 0xE1){ -+ freq_thres_div2_KHz = 580000; -+ freq_thres_div3r_KHz = 500000; -+ freq_thres_div3_KHz = 440000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, freq_thres_div2_KHz, freq_thres_div3r_KHz, freq_thres_div3_KHz); -+ -+ msleep(3); -+ -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(3); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf & 0xdf; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(3); -+ -+ _mt_fe_tn_get_reg(state, 0x37, &buf); -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ /* -+ if ((freq_KHz == 802000) || (freq_KHz == 826000)) { -+ _mt_fe_tn_set_reg(state, 0x37, 0x5e); -+ } -+ */ -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xef) | 0x30; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(2); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ } else { -+ return 1; -+ } -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_BB_tc2800(struct m88dc2800_state *state) ++static int _mt_fe_tn_set_RF_front_tc2800(struct m88dc2800_state *state) +{ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_appendix_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf; -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { -+ if ((freq_KHz == 123000) || (freq_KHz == 147000) || (freq_KHz == 171000) -+ || (freq_KHz == 195000)) -+ _mt_fe_tn_set_reg(state, 0x20, 0x1b); -+ -+ if ((freq_KHz == 371000) || (freq_KHz == 419000) || (freq_KHz == 610000) -+ || (freq_KHz == 730000) || (freq_KHz == 754000) || (freq_KHz == 826000)) { -+ _mt_fe_tn_get_reg(state, 0x0d, &buf); -+ _mt_fe_tn_set_reg(state, 0x0d, (u8)(buf + 1)); -+ } -+ -+ if ((freq_KHz == 522000) || (freq_KHz == 578000) || (freq_KHz == 634000) -+ || (freq_KHz == 690000) || (freq_KHz == 834000)) { -+ _mt_fe_tn_get_reg(state, 0x0d, &buf); -+ _mt_fe_tn_set_reg(state, 0x0d, (u8)(buf - 1)); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x20, 0xfc); -+ -+ if ((freq_KHz == 123000) || (freq_KHz == 147000) || (freq_KHz == 171000) -+ || (freq_KHz == 195000) || (freq_KHz == 219000) || (freq_KHz == 267000) -+ || (freq_KHz == 291000) || (freq_KHz == 339000) || (freq_KHz == 387000) -+ || (freq_KHz == 435000) || (freq_KHz == 482000) || (freq_KHz == 530000) -+ || (freq_KHz == 722000) -+ || ((state->tuner_custom_cfg == 1) && (freq_KHz == 315000))) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x5c); -+ } -+ } -+ return 0; -+} -+ -+static int _mt_fe_tn_set_DAC_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf, tempnumber; -+ s32 N; -+ s32 f1f2number, f1, f2, delta1, Totalnum1; -+ s32 cntT, cntin, NCOI, z0, z1, z2, tmp; -+ u32 fc, fadc, fsd, f2d; -+ u32 FreqTrue108_Hz; -+ -+ s32 M = state->tuner_crystal / 4000; -+ -+/* const u8 bandwidth = state->tuner_bandwidth; */ -+ const u16 DAC_fre = 108; -+ const u32 crystal_KHz = state->tuner_crystal; -+ const u32 DACFreq_KHz = state->tuner_dac; -+ -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_get_reg(state, 0x33, &buf); -+ M = buf & 0x0f; -+ if (M == 0) -+ M = 6; -+ } -+ -+ _mt_fe_tn_get_reg(state, 0x34, &buf); -+ N = buf & 0x07; -+ -+ _mt_fe_tn_get_reg(state, 0x35, &buf); -+ N = (N << 8) + buf; -+ -+ -+ buf = ((N + 256) * crystal_KHz / M / DAC_fre + 500) / 1000; -+ -+ if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_appendix_tc2800(state); -+ -+ if ((freq_KHz == 187000) || (freq_KHz == 195000) || (freq_KHz == 131000) -+ || (freq_KHz == 211000) || (freq_KHz == 219000) || (freq_KHz == 227000) -+ || (freq_KHz == 267000) || (freq_KHz == 299000) || (freq_KHz == 347000) -+ || (freq_KHz == 363000) || (freq_KHz == 395000) || (freq_KHz == 403000) -+ || (freq_KHz == 435000) || (freq_KHz == 482000) || (freq_KHz == 474000) -+ || (freq_KHz == 490000) || (freq_KHz == 610000) || (freq_KHz == 642000) -+ || (freq_KHz == 666000) || (freq_KHz == 722000) || (freq_KHz == 754000) -+ || (((freq_KHz == 379000) || (freq_KHz == 467000) || (freq_KHz == 762000)) -+ && (state->tuner_custom_cfg != 1))) { -+ buf = buf + 1; -+ } -+ -+ if ((freq_KHz == 123000) || (freq_KHz == 139000) || (freq_KHz == 147000) -+ || (freq_KHz == 171000) || (freq_KHz == 179000) || (freq_KHz == 203000) -+ || (freq_KHz == 235000) || (freq_KHz == 251000) || (freq_KHz == 259000) -+ || (freq_KHz == 283000) || (freq_KHz == 331000) || (freq_KHz == 363000) -+ || (freq_KHz == 371000) || (freq_KHz == 387000) || (freq_KHz == 411000) -+ || (freq_KHz == 427000) || (freq_KHz == 443000) || (freq_KHz == 451000) -+ || (freq_KHz == 459000) || (freq_KHz == 506000) || (freq_KHz == 514000) -+ || (freq_KHz == 538000) || (freq_KHz == 546000) || (freq_KHz == 554000) -+ || (freq_KHz == 562000) || (freq_KHz == 570000) || (freq_KHz == 578000) -+ || (freq_KHz == 602000) || (freq_KHz == 626000) || (freq_KHz == 658000) -+ || (freq_KHz == 690000) || (freq_KHz == 714000) || (freq_KHz == 746000) -+ || (freq_KHz == 522000) || (freq_KHz == 826000) || (freq_KHz == 155000) -+ || (freq_KHz == 530000) -+ || (((freq_KHz == 275000) || (freq_KHz == 355000)) && (state->tuner_custom_cfg != 1)) -+ || (((freq_KHz == 467000) || (freq_KHz == 762000) || (freq_KHz == 778000) -+ || (freq_KHz == 818000)) && (state->tuner_custom_cfg == 1))) { -+ buf = buf - 1; -+ } -+ } -+ -+ _mt_fe_tn_set_reg(state, 0x0e, buf); -+ _mt_fe_tn_set_reg(state, 0x0d, buf); -+ -+ f1f2number = (((DACFreq_KHz * M * buf) / crystal_KHz) << 16) / (N + 256) -+ + (((DACFreq_KHz * M * buf) % crystal_KHz) << 16) / ((N + 256) * crystal_KHz); -+ -+ -+ _mt_fe_tn_set_reg(state, 0xf1, (u8)((f1f2number & 0xff00) >> 8)); -+ _mt_fe_tn_set_reg(state, 0xf2, (u8)(f1f2number & 0x00ff)); -+ -+ FreqTrue108_Hz = (N + 256) * crystal_KHz / (M * buf) * 1000 + (((N + 256) * crystal_KHz) % (M * buf)) * 1000 / (M * buf); -+ -+ f1 = 4096; -+ fc = FreqTrue108_Hz; -+ fadc = fc / 4; -+ fsd = 27000000; -+ f2d = state->tuner_bandwidth * 1000 / 2 -150; -+ f2 = (fsd / 250) * f2d / ((fc + 500) / 1000); -+ delta1 = ((f1 - f2) << 15) / f2; -+ -+ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; -+ -+ cntT = f2; -+ cntin = Totalnum1; -+ NCOI = delta1; -+ -+ z0 = cntin; -+ z1 = cntT; -+ z2 = NCOI; -+ -+ tempnumber = (z0 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xc9, (u8)(tempnumber & 0x0f)); -+ tempnumber = (z0 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xca, tempnumber); -+ -+ tempnumber = (z1 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xcb, tempnumber); -+ tempnumber = (z1 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xcc, tempnumber); -+ -+ tempnumber = (z2 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xcd, tempnumber); -+ tempnumber = (z2 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xce, tempnumber); -+ -+ tmp = f1; -+ f1 = f2; -+ f2 = tmp / 2; -+ delta1 = ((f1 - f2) << 15) / f2; -+ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; -+ NCOI = (f1 << 15) / f2 - (1 << 15); -+ cntT = f2; -+ cntin = Totalnum1; -+ z0 = cntin; -+ z1 = cntT; -+ z2 = NCOI; -+ -+ tempnumber = (z0 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xd9, (u8)(tempnumber & 0x0f)); -+ tempnumber = (z0 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xda, tempnumber); -+ -+ tempnumber = (z1 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xdb, tempnumber); -+ tempnumber = (z1 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xdc, tempnumber); -+ -+ tempnumber = (z2 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xdd, tempnumber); -+ tempnumber = (z2 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xde, tempnumber); -+ -+ return 0; ++ u32 freq_KHz = state->tuner_freq; ++ u8 a, b, c; ++ if (state->tuner_mtt == 0xD1) { /* D1 */ ++ if (freq_KHz <= 123000) { ++ if (freq_KHz <= 56000) { ++ a = 0x00; b = 0x00; c = 0x00; ++ } else if (freq_KHz <= 64000) { ++ a = 0x10; b = 0x01; c = 0x08; ++ } else if (freq_KHz <= 72000) { ++ a = 0x20; b = 0x02; c = 0x10; ++ } else if (freq_KHz <= 80000) { ++ a = 0x30; b = 0x03; c = 0x18; ++ } else if (freq_KHz <= 88000) { ++ a = 0x40; b = 0x04; c = 0x20; ++ } else if (freq_KHz <= 96000) { ++ a = 0x50; b = 0x05; c = 0x28; ++ } else if (freq_KHz <= 104000) { ++ a = 0x60; b = 0x06; c = 0x30; ++ } else { ++ a = 0x70; b = 0x07; c = 0x38; ++ } ++ _mt_fe_tn_set_reg(state, 0x58, 0x9b); ++ _mt_fe_tn_set_reg(state, 0x59, a); ++ _mt_fe_tn_set_reg(state, 0x5d, b); ++ _mt_fe_tn_set_reg(state, 0x5e, c); ++ _mt_fe_tn_set_reg(state, 0x5a, 0x75); ++ _mt_fe_tn_set_reg(state, 0x73, 0x0c); ++ } else { /* if (freq_KHz > 112000) */ ++ _mt_fe_tn_set_reg(state, 0x58, 0x7b); ++ if (freq_KHz <= 304000) { ++ if (freq_KHz <= 136000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x40); ++ } else if (freq_KHz <= 160000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x48); ++ } else if (freq_KHz <= 184000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x50); ++ } else if (freq_KHz <= 208000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x58); ++ } else if (freq_KHz <= 232000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x60); ++ } else if (freq_KHz <= 256000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x68); ++ } else if (freq_KHz <= 280000) { ++ _mt_fe_tn_set_reg(state, 0x5e, 0x70); ++ } else { /* if (freq_KHz <= 304000) */ ++ _mt_fe_tn_set_reg(state, 0x5e, 0x78); ++ } ++ if (freq_KHz <= 171000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x08); ++ } else if (freq_KHz <= 211000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0a); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0e); ++ } ++ } else { /* if (freq_KHz > 304000) */ ++ _mt_fe_tn_set_reg(state, 0x5e, 0x88); ++ if (freq_KHz <= 400000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0c); ++ } else if (freq_KHz <= 450000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x09); ++ } else if (freq_KHz <= 550000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0e); ++ } else if (freq_KHz <= 650000) { ++ _mt_fe_tn_set_reg(state, 0x73, 0x0d); ++ } else { /*if (freq_KHz > 650000) */ ++ _mt_fe_tn_set_reg(state, 0x73, 0x0e); ++ } ++ } ++ } ++ if (freq_KHz > 800000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x24); ++ else if (freq_KHz > 700000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x34); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x44); ++ else if (freq_KHz > 300000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x43); ++ else if (freq_KHz > 220000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 110000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x6a, 0x53); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x6a, 0x57); ++ else ++ _mt_fe_tn_set_reg(state, 0x6a, 0x59); ++ if (freq_KHz < 200000) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x5d); ++ } else if (freq_KHz < 500000) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x7d); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x20, 0xfd); ++ } /* end of 0xD1 */ ++ } else if (state->tuner_mtt == 0xE1) { /* E1 */ ++ if (freq_KHz <= 112000) { /* 123MHz */ ++ if (freq_KHz <= 56000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x01); ++ } else if (freq_KHz <= 64000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x09); ++ } else if (freq_KHz <= 72000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x11); ++ } else if (freq_KHz <= 80000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x19); ++ } else if (freq_KHz <= 88000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x21); ++ } else if (freq_KHz <= 96000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x29); ++ } else if (freq_KHz <= 104000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x31); ++ } else { /* if (freq_KHz <= 112000) */ ++ _mt_fe_tn_set_reg(state, 0x5c, 0x39); ++ } ++ _mt_fe_tn_set_reg(state, 0x5b, 0x30); ++ } else { /* if (freq_KHz > 112000) */ ++ if (freq_KHz <= 304000) { ++ if (freq_KHz <= 136000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x41); ++ } else if (freq_KHz <= 160000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x49); ++ } else if (freq_KHz <= 184000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x51); ++ } else if (freq_KHz <= 208000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x59); ++ } else if (freq_KHz <= 232000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x61); ++ } else if (freq_KHz <= 256000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x69); ++ } else if (freq_KHz <= 280000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x71); ++ } else { /* if (freq_KHz <= 304000) */ ++ _mt_fe_tn_set_reg(state, 0x5c, 0x79); ++ } ++ if (freq_KHz <= 150000) { ++ _mt_fe_tn_set_reg(state, 0x5b, 0x28); ++ } else if (freq_KHz <= 256000) { ++ _mt_fe_tn_set_reg(state, 0x5b, 0x29); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x5b, 0x2a); ++ } ++ } else { /* if (freq_KHz > 304000) */ ++ if (freq_KHz <= 400000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x89); ++ } else if (freq_KHz <= 450000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x91); ++ } else if (freq_KHz <= 650000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0x98); ++ } else if (freq_KHz <= 850000) { ++ _mt_fe_tn_set_reg(state, 0x5c, 0xa0); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x5c, 0xa8); ++ } ++ _mt_fe_tn_set_reg(state, 0x5b, 0x08); ++ } ++ } ++ } /* end of 0xE1 */ ++ return 0; +} + -+static int _mt_fe_tn_preset_tc2800(struct m88dc2800_state *state) -+{ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x19, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x1b, 0x4b); -+ -+ _mt_fe_tn_set_reg(state, 0x04, 0x04); -+ _mt_fe_tn_set_reg(state, 0x17, 0x0d); -+ _mt_fe_tn_set_reg(state, 0x62, 0x6c); -+ _mt_fe_tn_set_reg(state, 0x63, 0xf4); -+ _mt_fe_tn_set_reg(state, 0x1f, 0x0e); -+ _mt_fe_tn_set_reg(state, 0x6b, 0xf4); -+ _mt_fe_tn_set_reg(state, 0x14, 0x01); -+ _mt_fe_tn_set_reg(state, 0x5a, 0x75); -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x72, 0xe0); -+ _mt_fe_tn_set_reg(state, 0x70, 0x07); -+ _mt_fe_tn_set_reg(state, 0x15, 0x7b); -+ _mt_fe_tn_set_reg(state, 0x55, 0x71); -+ -+ _mt_fe_tn_set_reg(state, 0x75, 0x55); -+ _mt_fe_tn_set_reg(state, 0x76, 0xac); -+ _mt_fe_tn_set_reg(state, 0x77, 0x6c); -+ _mt_fe_tn_set_reg(state, 0x78, 0x8b); -+ _mt_fe_tn_set_reg(state, 0x79, 0x42); -+ _mt_fe_tn_set_reg(state, 0x7a, 0xd2); -+ -+ _mt_fe_tn_set_reg(state, 0x81, 0x01); -+ _mt_fe_tn_set_reg(state, 0x82, 0x00); -+ _mt_fe_tn_set_reg(state, 0x82, 0x02); -+ _mt_fe_tn_set_reg(state, 0x82, 0x04); -+ _mt_fe_tn_set_reg(state, 0x82, 0x06); -+ _mt_fe_tn_set_reg(state, 0x82, 0x08); -+ _mt_fe_tn_set_reg(state, 0x82, 0x09); -+ _mt_fe_tn_set_reg(state, 0x82, 0x29); -+ _mt_fe_tn_set_reg(state, 0x82, 0x49); -+ _mt_fe_tn_set_reg(state, 0x82, 0x58); -+ _mt_fe_tn_set_reg(state, 0x82, 0x59); -+ _mt_fe_tn_set_reg(state, 0x82, 0x98); -+ _mt_fe_tn_set_reg(state, 0x82, 0x99); -+ -+ -+ _mt_fe_tn_set_reg(state, 0x10, 0x05); -+ _mt_fe_tn_set_reg(state, 0x10, 0x0d); -+ _mt_fe_tn_set_reg(state, 0x11, 0x95); -+ _mt_fe_tn_set_reg(state, 0x11, 0x9d); -+ -+ -+ if (state->tuner_loopthrough != 0) { -+ _mt_fe_tn_set_reg(state, 0x67, 0x25); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x67, 0x05); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x1b, 0x47); -+ if(state->tuner_mode == 0) // DVB-C -+ { -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x62, 0x2c); -+ _mt_fe_tn_set_reg(state, 0x63, 0x54); -+ _mt_fe_tn_set_reg(state, 0x68, 0x0b); -+ _mt_fe_tn_set_reg(state, 0x14, 0x00); -+ } -+ else // CTTB -+ { -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x62, 0x0c); -+ _mt_fe_tn_set_reg(state, 0x63, 0x54); -+ _mt_fe_tn_set_reg(state, 0x68, 0x0b); -+ _mt_fe_tn_set_reg(state, 0x14, 0x05); -+ } -+ _mt_fe_tn_set_reg(state, 0x6f, 0x00); -+ _mt_fe_tn_set_reg(state, 0x84, 0x04); -+ _mt_fe_tn_set_reg(state, 0x5e, 0xbe); -+ _mt_fe_tn_set_reg(state, 0x87, 0x07); -+ _mt_fe_tn_set_reg(state, 0x8a, 0x1f); -+ _mt_fe_tn_set_reg(state, 0x8b, 0x1f); -+ _mt_fe_tn_set_reg(state, 0x88, 0x30); -+ _mt_fe_tn_set_reg(state, 0x58, 0x34); -+ _mt_fe_tn_set_reg(state, 0x61, 0x8c); -+ _mt_fe_tn_set_reg(state, 0x6a, 0x42); -+ } -+ return 0; ++static int _mt_fe_tn_cali_PLL_tc2800(struct m88dc2800_state *state, ++ u32 freq_KHz, ++ u32 cali_freq_thres_div2, ++ u32 cali_freq_thres_div3r, ++ u32 cali_freq_thres_div3) ++{ ++ s32 N, F, MUL; ++ u8 buf, tmp, tmp2; ++ s32 M; ++ const s32 crystal_KHz = state->tuner_crystal; ++ if (state->tuner_mtt == 0xD1) { ++ M = state->tuner_crystal / 4000; ++ if (freq_KHz > cali_freq_thres_div2) { ++ MUL = 4; ++ tmp = 2; ++ } else if (freq_KHz > 300000) { ++ MUL = 8; ++ tmp = 3; ++ } else if (freq_KHz > (cali_freq_thres_div2 / 2)) { ++ MUL = 8; ++ tmp = 4; ++ } else if (freq_KHz > (cali_freq_thres_div2 / 4)) { ++ MUL = 16; ++ tmp = 5; ++ } else if (freq_KHz > (cali_freq_thres_div2 / 8)) { ++ MUL = 32; ++ tmp = 6; ++ } else if (freq_KHz > (cali_freq_thres_div2 / 16)) { ++ MUL = 64; ++ tmp = 7; ++ } else { /* invalid */ ++ MUL = 0; ++ tmp = 0; ++ return 1; ++ } ++ } else if (state->tuner_mtt == 0xE1) { ++ M = state->tuner_crystal / 1000; ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x32, 0xe0); ++ _mt_fe_tn_set_reg(state, 0x33, 0x86); ++ _mt_fe_tn_set_reg(state, 0x37, 0x70); ++ _mt_fe_tn_set_reg(state, 0x38, 0x20); ++ _mt_fe_tn_set_reg(state, 0x39, 0x18); ++ _mt_fe_tn_set_reg(state, 0x89, 0x83); ++ if (freq_KHz > cali_freq_thres_div2) { ++ M = M / 4; ++ MUL = 4; ++ tmp = 2; ++ tmp2 = M + 16; /* 48 */ ++ } else if (freq_KHz > cali_freq_thres_div3r) { ++ M = M / 3; ++ MUL = 6; ++ tmp = 2; ++ tmp2 = M + 32; /* 32 */ ++ } else if (freq_KHz > cali_freq_thres_div3) { ++ M = M / 3; ++ MUL = 6; ++ tmp = 2; ++ tmp2 = M; /* 16 */ ++ } else if (freq_KHz > 304000) { ++ M = M / 4; ++ MUL = 8; ++ tmp = 3; ++ tmp2 = M + 16; /* 48 */ ++ } else if (freq_KHz > (cali_freq_thres_div2 / 2)) { ++ M = M / 4; ++ MUL = 8; ++ tmp = 4; ++ tmp2 = M + 16; /* 48 */ ++ } else if (freq_KHz > (cali_freq_thres_div3r / 2)) { ++ M = M / 3; ++ MUL = 12; ++ tmp = 4; ++ tmp2 = M + 32; /* 32 */ ++ } else if (freq_KHz > (cali_freq_thres_div3 / 2)) { ++ M = M / 3; ++ MUL = 12; ++ tmp = 4; ++ tmp2 = M; /* 16 */ ++ } else if (freq_KHz > (cali_freq_thres_div2 / 4)) { ++ M = M / 4; ++ MUL = 16; ++ tmp = 5; ++ tmp2 = M + 16; /* 48 */ ++ } else if (freq_KHz > (cali_freq_thres_div3r / 4)) { ++ M = M / 3; ++ MUL = 24; ++ tmp = 5; ++ tmp2 = M + 32; /* 32 */ ++ } else if (freq_KHz > (cali_freq_thres_div3 / 4)) { ++ M = M / 3; ++ MUL = 24; ++ tmp = 5; ++ tmp2 = M; /* 16 */ ++ } else if (freq_KHz > (cali_freq_thres_div2 / 8)) { ++ M = M / 4; ++ MUL = 32; ++ tmp = 6; ++ tmp2 = M + 16; /* 48 */ ++ } else if (freq_KHz > (cali_freq_thres_div3r / 8)) { ++ M = M / 3; ++ MUL = 48; ++ tmp = 6; ++ tmp2 = M + 32; /* 32 */ ++ } else if (freq_KHz > (cali_freq_thres_div3 / 8)) { ++ M = M / 3; ++ MUL = 48; ++ tmp = 6; ++ tmp2 = M; /* 16 */ ++ } else if (freq_KHz > (cali_freq_thres_div2 / 16)) { ++ M = M / 4; ++ MUL = 64; ++ tmp = 7; ++ tmp2 = M + 16; /* 48 */ ++ } else if (freq_KHz > (cali_freq_thres_div3r / 16)) { ++ M = M / 3; ++ MUL = 96; ++ tmp = 7; ++ tmp2 = M + 32; /* 32 */ ++ } else if (freq_KHz > (cali_freq_thres_div3 / 16)) { ++ M = M / 3; ++ MUL = 96; ++ tmp = 7; ++ tmp2 = M; /* 16 */ ++ } else { /* invalid */ ++ M = M / 4; ++ MUL = 0; ++ tmp = 0; ++ tmp2 = 48; ++ return 1; ++ } ++ if (freq_KHz == 291000) { ++ M = state->tuner_crystal / 1000 / 3; ++ MUL = 12; ++ tmp = 4; ++ tmp2 = M + 32; /* 32 */ ++ } ++ /* ++ if (freq_KHz == 578000) { ++ M = state->tuner_crystal / 1000 / 4; ++ MUL = 4; ++ tmp = 2; ++ tmp2 = M + 16; // 48 ++ } ++ */ ++ if (freq_KHz == 690000) { ++ M = state->tuner_crystal / 1000 / 3; ++ MUL = 4; ++ tmp = 2; ++ tmp2 = M + 16; /* 48 */ ++ } ++ _mt_fe_tn_get_reg(state, 0x33, &buf); ++ buf &= 0xc0; ++ buf += tmp2; ++ _mt_fe_tn_set_reg(state, 0x33, buf); ++ } else { ++ return 1; ++ } ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf &= 0xf8; ++ buf += tmp; ++ _mt_fe_tn_set_reg(state, 0x39, buf); ++ N = (freq_KHz * MUL * M / crystal_KHz) / 2 * 2 - 256; ++ buf = (N >> 8) & 0xcf; ++ if (state->tuner_mtt == 0xE1) { ++ buf |= 0x30; ++ } ++ _mt_fe_tn_set_reg(state, 0x34, buf); ++ buf = N & 0xff; ++ _mt_fe_tn_set_reg(state, 0x35, buf); ++ F = ((freq_KHz * MUL * M / (crystal_KHz / 1000) / 2) - ++ (freq_KHz * MUL * M / crystal_KHz / 2 * 1000)) * 64 / 1000; ++ buf = F & 0xff; ++ _mt_fe_tn_set_reg(state, 0x36, buf); ++ if (F == 0) { ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x3d, 0xca); ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x3d, 0xfe); ++ } else { ++ return 1; ++ } ++ _mt_fe_tn_set_reg(state, 0x3e, 0x9c); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x34); ++ } ++ if (F > 0) { ++ if (state->tuner_mtt == 0xD1) { ++ if ((F == 32) || (F == 16) || (F == 48)) { ++ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); ++ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x36); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); ++ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x36); ++ } ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); ++ _mt_fe_tn_set_reg(state, 0x3d, 0x7e); ++ _mt_fe_tn_set_reg(state, 0x3f, 0x36); ++ _mt_fe_tn_set_reg(state, 0x89, 0x84); ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf = buf & 0x1f; ++ _mt_fe_tn_set_reg(state, 0x39, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x02; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ } else { ++ return 1; ++ } ++ } ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ if (state->tuner_mtt == 0xD1) { ++ msleep(5); ++ } else if (state->tuner_mtt == 0xE1) { ++ msleep(2); ++ } else { ++ return 1; ++ } ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ ++ return 0; +} + -+static int mt_fe_tn_wakeup_tc2800(struct m88dc2800_state *state) -+{ -+ _mt_fe_tn_set_reg(state, 0x16, 0xb1); -+ _mt_fe_tn_set_reg(state, 0x09, 0x7d); -+ return 0; -+} -+ -+ -+static int mt_fe_tn_sleep_tc2800(struct m88dc2800_state *state) -+{ -+ _mt_fe_tn_set_reg(state, 0x16, 0xb0); -+ _mt_fe_tn_set_reg(state, 0x09, 0x6d); -+ return 0; -+} -+ -+static int mt_fe_tn_init_tc2800(struct m88dc2800_state *state) -+{ -+ if (state->tuner_init_OK != 1) { -+ state->tuner_dev_addr = 0x61; /* TUNER_I2C_ADDR_TC2800 */ -+ state->tuner_freq = 650000; -+ state->tuner_qam = 0; -+ state->tuner_mode = 0; // 0: DVB-C, 1: CTTB -+ -+ state->tuner_bandwidth = 8; -+ state->tuner_loopthrough = 0; -+ state->tuner_crystal = 24000; -+ state->tuner_dac = 7200; -+ state->tuner_mtt = 0x00; -+ state->tuner_custom_cfg = 0; -+ state->tuner_version = 30022; /* Driver version number */ -+ state->tuner_time = 12092611; -+ state->tuner_init_OK = 1; -+ } ++static int _mt_fe_tn_set_PLL_freq_tc2800(struct m88dc2800_state *state) ++{ ++ u8 buf, buf1; ++ u32 freq_thres_div2_KHz, freq_thres_div3r_KHz, ++ freq_thres_div3_KHz; ++ const u32 freq_KHz = state->tuner_freq; ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x32, 0xe1); ++ _mt_fe_tn_set_reg(state, 0x33, 0xa6); ++ _mt_fe_tn_set_reg(state, 0x37, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x38, 0x20); ++ _mt_fe_tn_set_reg(state, 0x39, 0x18); ++ _mt_fe_tn_set_reg(state, 0x40, 0x40); ++ freq_thres_div2_KHz = 520000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, ++ freq_thres_div2_KHz, 0, 0); ++ msleep(5); ++ _mt_fe_tn_get_reg(state, 0x3a, &buf); ++ buf1 = buf; ++ buf = buf & 0x03; ++ buf1 = buf1 & 0x01; ++ if ((buf1 == 0) || (buf == 3)) { ++ freq_thres_div2_KHz = 420000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, ++ freq_thres_div2_KHz, 0, ++ 0); ++ msleep(5); ++ _mt_fe_tn_get_reg(state, 0x3a, &buf); ++ buf = buf & 0x07; ++ if (buf == 5) { ++ freq_thres_div2_KHz = 520000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, ++ freq_thres_div2_KHz, ++ 0, 0); ++ msleep(5); ++ } ++ } ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x10; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf & 0xdf; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x40, 0x0); ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ msleep(5); ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf = buf >> 5; ++ if (buf < 5) { ++ _mt_fe_tn_get_reg(state, 0x39, &buf); ++ buf = buf | 0xa0; ++ buf = buf & 0xbf; ++ _mt_fe_tn_set_reg(state, 0x39, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x02; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ } ++ _mt_fe_tn_get_reg(state, 0x37, &buf); ++ if (buf > 0x70) { ++ buf = 0x7f; ++ _mt_fe_tn_set_reg(state, 0x40, 0x40); ++ } ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ if (buf < 0x0f) { ++ buf = (buf & 0x0f) << 2; ++ buf = buf + 0x0f; ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ } else if (buf < 0x1f) { ++ buf = buf + 0x0f; ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ } ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf | 0x20) & 0xef; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ msleep(5); ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ } else if (state->tuner_mtt == 0xE1) { ++ freq_thres_div2_KHz = 580000; ++ freq_thres_div3r_KHz = 500000; ++ freq_thres_div3_KHz = 440000; ++ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, ++ freq_thres_div2_KHz, ++ freq_thres_div3r_KHz, ++ freq_thres_div3_KHz); ++ msleep(3); ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ msleep(3); ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf | 0x10; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x30, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = buf & 0xdf; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x31, 0x80); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ msleep(3); ++ _mt_fe_tn_get_reg(state, 0x37, &buf); ++ _mt_fe_tn_set_reg(state, 0x37, buf); ++ /* ++ if ((freq_KHz == 802000) || (freq_KHz == 826000)) { ++ _mt_fe_tn_set_reg(state, 0x37, 0x5e); ++ } ++ */ ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf & 0xef) | 0x30; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ msleep(2); ++ _mt_fe_tn_set_reg(state, 0x41, 0x02); ++ } else { ++ return 1; ++ } ++ return 0; ++} + -+ _mt_fe_tn_set_reg(state, 0x2b, 0x46); -+ _mt_fe_tn_set_reg(state, 0x2c, 0x75); -+ -+ if (state->tuner_mtt == 0x00) { -+ u8 tmp = 0; -+ _mt_fe_tn_get_reg(state, 0x01, &tmp); -+ printk("m88dc2800: tuner id = 0x%02x ", tmp); -+ switch(tmp) { -+ case 0x0d: -+ state->tuner_mtt = 0xD1; -+ break; -+ case 0x8e: -+ default: -+ state->tuner_mtt = 0xE1; -+ break; -+ } -+ } -+ return 0; -+} -+ -+static int mt_fe_tn_set_freq_tc2800(struct m88dc2800_state *state, u32 freq_KHz) -+{ ++static int _mt_fe_tn_set_BB_tc2800(struct m88dc2800_state *state) ++{ ++ return 0; ++} ++ ++ static int _mt_fe_tn_set_appendix_tc2800(struct m88dc2800_state *state) ++ ++{ + u8 buf; -+ u8 buf1; -+ -+ mt_fe_tn_init_tc2800(state); -+ -+ state->tuner_freq = freq_KHz; ++ const u32 freq_KHz = state->tuner_freq; ++ if (state->tuner_mtt == 0xD1) { ++ if ((freq_KHz == 123000) || (freq_KHz == 147000) || ++ (freq_KHz == 171000) || (freq_KHz == 195000)) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x1b); ++ } ++ if ((freq_KHz == 371000) || (freq_KHz == 419000) || ++ (freq_KHz == 610000) || (freq_KHz == 730000) || ++ (freq_KHz == 754000) || (freq_KHz == 826000)) { ++ _mt_fe_tn_get_reg(state, 0x0d, &buf); ++ _mt_fe_tn_set_reg(state, 0x0d, (u8) (buf + 1)); ++ } ++ if ((freq_KHz == 522000) || (freq_KHz == 578000) || ++ (freq_KHz == 634000) || (freq_KHz == 690000) || ++ (freq_KHz == 834000)) { ++ _mt_fe_tn_get_reg(state, 0x0d, &buf); ++ _mt_fe_tn_set_reg(state, 0x0d, (u8) (buf - 1)); ++ } ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x20, 0xfc); ++ if (freq_KHz == 123000 || freq_KHz == 147000 || ++ freq_KHz == 171000 || freq_KHz == 195000 || ++ freq_KHz == 219000 || freq_KHz == 267000 || ++ freq_KHz == 291000 || freq_KHz == 339000 || ++ freq_KHz == 387000 || freq_KHz == 435000 || ++ freq_KHz == 482000 || freq_KHz == 530000 || ++ freq_KHz == 722000 || ++ (state->tuner_custom_cfg == 1 && freq_KHz == 315000)) { ++ _mt_fe_tn_set_reg(state, 0x20, 0x5c); ++ } ++ } ++ return 0; ++} + -+ if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x21, 0xb9); -+ else -+ _mt_fe_tn_set_reg(state, 0x21, 0x99); -+ -+ mt_fe_tn_wakeup_tc2800(state); -+ -+ _mt_fe_tn_set_reg(state, 0x05, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x06, 0xf8); -+ -+ _mt_fe_tn_set_RF_front_tc2800(state); -+ _mt_fe_tn_set_PLL_freq_tc2800(state); -+ _mt_fe_tn_set_DAC_tc2800(state); -+ _mt_fe_tn_set_BB_tc2800(state); -+ _mt_fe_tn_preset_tc2800(state); -+ -+ _mt_fe_tn_set_reg(state, 0x05, 0x00); -+ _mt_fe_tn_set_reg(state, 0x06, 0x00); -+ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x00, 0x01); -+ _mt_fe_tn_set_reg(state, 0x00, 0x00); -+ -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(5); ++ static int _mt_fe_tn_set_DAC_tc2800(struct m88dc2800_state *state) ++{ ++ u8 buf, tempnumber; ++ s32 N; ++ s32 f1f2number, f1, f2, delta1, Totalnum1; ++ s32 cntT, cntin, NCOI, z0, z1, z2, tmp; ++ u32 fc, fadc, fsd, f2d; ++ u32 FreqTrue108_Hz; ++ s32 M = state->tuner_crystal / 4000; ++ /* const u8 bandwidth = state->tuner_bandwidth; */ ++ const u16 DAC_fre = 108; ++ const u32 crystal_KHz = state->tuner_crystal; ++ const u32 DACFreq_KHz = state->tuner_dac; ++ const u32 freq_KHz = state->tuner_freq; ++ ++ if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_get_reg(state, 0x33, &buf); ++ M = buf & 0x0f; ++ if (M == 0) ++ M = 6; ++ } ++ _mt_fe_tn_get_reg(state, 0x34, &buf); ++ N = buf & 0x07; ++ _mt_fe_tn_get_reg(state, 0x35, &buf); ++ N = (N << 8) + buf; ++ buf = ((N + 256) * crystal_KHz / M / DAC_fre + 500) / 1000; ++ if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_appendix_tc2800(state); ++ if (freq_KHz == 187000 || freq_KHz == 195000 || ++ freq_KHz == 131000 || freq_KHz == 211000 || ++ freq_KHz == 219000 || freq_KHz == 227000 || ++ freq_KHz == 267000 || freq_KHz == 299000 || ++ freq_KHz == 347000 || freq_KHz == 363000 || ++ freq_KHz == 395000 || freq_KHz == 403000 || ++ freq_KHz == 435000 || freq_KHz == 482000 || ++ freq_KHz == 474000 || freq_KHz == 490000 || ++ freq_KHz == 610000 || freq_KHz == 642000 || ++ freq_KHz == 666000 || freq_KHz == 722000 || ++ freq_KHz == 754000 || ++ ((freq_KHz == 379000 || freq_KHz == 467000 || ++ freq_KHz == 762000) && state->tuner_custom_cfg != 1)) { ++ buf = buf + 1; ++ } ++ if (freq_KHz == 123000 || freq_KHz == 139000 || ++ freq_KHz == 147000 || freq_KHz == 171000 || ++ freq_KHz == 179000 || freq_KHz == 203000 || ++ freq_KHz == 235000 || freq_KHz == 251000 || ++ freq_KHz == 259000 || freq_KHz == 283000 || ++ freq_KHz == 331000 || freq_KHz == 363000 || ++ freq_KHz == 371000 || freq_KHz == 387000 || ++ freq_KHz == 411000 || freq_KHz == 427000 || ++ freq_KHz == 443000 || freq_KHz == 451000 || ++ freq_KHz == 459000 || freq_KHz == 506000 || ++ freq_KHz == 514000 || freq_KHz == 538000 || ++ freq_KHz == 546000 || freq_KHz == 554000 || ++ freq_KHz == 562000 || freq_KHz == 570000 || ++ freq_KHz == 578000 || freq_KHz == 602000 || ++ freq_KHz == 626000 || freq_KHz == 658000 || ++ freq_KHz == 690000 || freq_KHz == 714000 || ++ freq_KHz == 746000 || freq_KHz == 522000 || ++ freq_KHz == 826000 || freq_KHz == 155000 || ++ freq_KHz == 530000 || ++ ((freq_KHz == 275000 || freq_KHz == 355000) && ++ state->tuner_custom_cfg != 1) || ++ ((freq_KHz == 467000 || freq_KHz == 762000 || ++ freq_KHz == 778000 || freq_KHz == 818000) && ++ state->tuner_custom_cfg == 1)) { ++ buf = buf - 1; ++ } ++ } ++ _mt_fe_tn_set_reg(state, 0x0e, buf); ++ _mt_fe_tn_set_reg(state, 0x0d, buf); ++ f1f2number = ++ (((DACFreq_KHz * M * buf) / crystal_KHz) << 16) / (N + 256) + ++ (((DACFreq_KHz * M * buf) % crystal_KHz) << 16) / ((N + 256) * ++ crystal_KHz); ++ _mt_fe_tn_set_reg(state, 0xf1, (f1f2number & 0xff00) >> 8); ++ _mt_fe_tn_set_reg(state, 0xf2, f1f2number & 0x00ff); ++ FreqTrue108_Hz = ++ (N + 256) * crystal_KHz / (M * buf) * 1000 + ++ (((N + 256) * crystal_KHz) % (M * buf)) * 1000 / (M * buf); ++ f1 = 4096; ++ fc = FreqTrue108_Hz; ++ fadc = fc / 4; ++ fsd = 27000000; ++ f2d = state->tuner_bandwidth * 1000 / 2 - 150; ++ f2 = (fsd / 250) * f2d / ((fc + 500) / 1000); ++ delta1 = ((f1 - f2) << 15) / f2; ++ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; ++ cntT = f2; ++ cntin = Totalnum1; ++ NCOI = delta1; ++ z0 = cntin; ++ z1 = cntT; ++ z2 = NCOI; ++ tempnumber = (z0 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xc9, (u8) (tempnumber & 0x0f)); ++ tempnumber = (z0 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xca, tempnumber); ++ tempnumber = (z1 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xcb, tempnumber); ++ tempnumber = (z1 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xcc, tempnumber); ++ tempnumber = (z2 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xcd, tempnumber); ++ tempnumber = (z2 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xce, tempnumber); ++ tmp = f1; ++ f1 = f2; ++ f2 = tmp / 2; ++ delta1 = ((f1 - f2) << 15) / f2; ++ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; ++ NCOI = (f1 << 15) / f2 - (1 << 15); ++ cntT = f2; ++ cntin = Totalnum1; ++ z0 = cntin; ++ z1 = cntT; ++ z2 = NCOI; ++ tempnumber = (z0 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xd9, (u8) (tempnumber & 0x0f)); ++ tempnumber = (z0 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xda, tempnumber); ++ tempnumber = (z1 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xdb, tempnumber); ++ tempnumber = (z1 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xdc, tempnumber); ++ tempnumber = (z2 & 0xff00) >> 8; ++ _mt_fe_tn_set_reg(state, 0xdd, tempnumber); ++ tempnumber = (z2 & 0xff); ++ _mt_fe_tn_set_reg(state, 0xde, tempnumber); ++ ++ return 0; ++} ++ ++static int _mt_fe_tn_preset_tc2800(struct m88dc2800_state *state) ++{ ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x19, 0x4a); ++ _mt_fe_tn_set_reg(state, 0x1b, 0x4b); ++ _mt_fe_tn_set_reg(state, 0x04, 0x04); ++ _mt_fe_tn_set_reg(state, 0x17, 0x0d); ++ _mt_fe_tn_set_reg(state, 0x62, 0x6c); ++ _mt_fe_tn_set_reg(state, 0x63, 0xf4); ++ _mt_fe_tn_set_reg(state, 0x1f, 0x0e); ++ _mt_fe_tn_set_reg(state, 0x6b, 0xf4); ++ _mt_fe_tn_set_reg(state, 0x14, 0x01); ++ _mt_fe_tn_set_reg(state, 0x5a, 0x75); ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ _mt_fe_tn_set_reg(state, 0x72, 0xe0); ++ _mt_fe_tn_set_reg(state, 0x70, 0x07); ++ _mt_fe_tn_set_reg(state, 0x15, 0x7b); ++ _mt_fe_tn_set_reg(state, 0x55, 0x71); ++ _mt_fe_tn_set_reg(state, 0x75, 0x55); ++ _mt_fe_tn_set_reg(state, 0x76, 0xac); ++ _mt_fe_tn_set_reg(state, 0x77, 0x6c); ++ _mt_fe_tn_set_reg(state, 0x78, 0x8b); ++ _mt_fe_tn_set_reg(state, 0x79, 0x42); ++ _mt_fe_tn_set_reg(state, 0x7a, 0xd2); ++ _mt_fe_tn_set_reg(state, 0x81, 0x01); ++ _mt_fe_tn_set_reg(state, 0x82, 0x00); ++ _mt_fe_tn_set_reg(state, 0x82, 0x02); ++ _mt_fe_tn_set_reg(state, 0x82, 0x04); ++ _mt_fe_tn_set_reg(state, 0x82, 0x06); ++ _mt_fe_tn_set_reg(state, 0x82, 0x08); ++ _mt_fe_tn_set_reg(state, 0x82, 0x09); ++ _mt_fe_tn_set_reg(state, 0x82, 0x29); ++ _mt_fe_tn_set_reg(state, 0x82, 0x49); ++ _mt_fe_tn_set_reg(state, 0x82, 0x58); ++ _mt_fe_tn_set_reg(state, 0x82, 0x59); ++ _mt_fe_tn_set_reg(state, 0x82, 0x98); ++ _mt_fe_tn_set_reg(state, 0x82, 0x99); ++ _mt_fe_tn_set_reg(state, 0x10, 0x05); ++ _mt_fe_tn_set_reg(state, 0x10, 0x0d); ++ _mt_fe_tn_set_reg(state, 0x11, 0x95); ++ _mt_fe_tn_set_reg(state, 0x11, 0x9d); ++ if (state->tuner_loopthrough != 0) { ++ _mt_fe_tn_set_reg(state, 0x67, 0x25); ++ } else { ++ _mt_fe_tn_set_reg(state, 0x67, 0x05); ++ } ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_set_reg(state, 0x1b, 0x47); ++ if (state->tuner_mode == 0) { /* DVB-C */ ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ _mt_fe_tn_set_reg(state, 0x62, 0x2c); ++ _mt_fe_tn_set_reg(state, 0x63, 0x54); ++ _mt_fe_tn_set_reg(state, 0x68, 0x0b); ++ _mt_fe_tn_set_reg(state, 0x14, 0x00); ++ } else { /* CTTB */ ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ _mt_fe_tn_set_reg(state, 0x62, 0x0c); ++ _mt_fe_tn_set_reg(state, 0x63, 0x54); ++ _mt_fe_tn_set_reg(state, 0x68, 0x0b); ++ _mt_fe_tn_set_reg(state, 0x14, 0x05); ++ } ++ _mt_fe_tn_set_reg(state, 0x6f, 0x00); ++ _mt_fe_tn_set_reg(state, 0x84, 0x04); ++ _mt_fe_tn_set_reg(state, 0x5e, 0xbe); ++ _mt_fe_tn_set_reg(state, 0x87, 0x07); ++ _mt_fe_tn_set_reg(state, 0x8a, 0x1f); ++ _mt_fe_tn_set_reg(state, 0x8b, 0x1f); ++ _mt_fe_tn_set_reg(state, 0x88, 0x30); ++ _mt_fe_tn_set_reg(state, 0x58, 0x34); ++ _mt_fe_tn_set_reg(state, 0x61, 0x8c); ++ _mt_fe_tn_set_reg(state, 0x6a, 0x42); ++ } ++ return 0; ++} ++ ++static int mt_fe_tn_wakeup_tc2800(struct m88dc2800_state *state) ++{ ++ _mt_fe_tn_set_reg(state, 0x16, 0xb1); ++ _mt_fe_tn_set_reg(state, 0x09, 0x7d); ++ return 0; ++} ++ ++ static int mt_fe_tn_sleep_tc2800(struct m88dc2800_state *state) ++{ ++ _mt_fe_tn_set_reg(state, 0x16, 0xb0); ++ _mt_fe_tn_set_reg(state, 0x09, 0x6d); ++ return 0; ++} ++ ++ static int mt_fe_tn_init_tc2800(struct m88dc2800_state *state) ++{ ++ if (state->tuner_init_OK != 1) { ++ state->tuner_dev_addr = 0x61; /* TUNER_I2C_ADDR_TC2800 */ ++ state->tuner_freq = 650000; ++ state->tuner_qam = 0; ++ state->tuner_mode = 0; // 0: DVB-C, 1: CTTB ++ state->tuner_bandwidth = 8; ++ state->tuner_loopthrough = 0; ++ state->tuner_crystal = 24000; ++ state->tuner_dac = 7200; ++ state->tuner_mtt = 0x00; ++ state->tuner_custom_cfg = 0; ++ state->tuner_version = 30022; /* Driver version number */ ++ state->tuner_time = 12092611; ++ state->tuner_init_OK = 1; ++ } ++ _mt_fe_tn_set_reg(state, 0x2b, 0x46); ++ _mt_fe_tn_set_reg(state, 0x2c, 0x75); ++ if (state->tuner_mtt == 0x00) { ++ u8 tmp = 0; ++ _mt_fe_tn_get_reg(state, 0x01, &tmp); ++ printk(KERN_INFO "m88dc2800: tuner id = 0x%02x ", tmp); ++ switch (tmp) { ++ case 0x0d: ++ state->tuner_mtt = 0xD1; ++ break; ++ case 0x8e: ++ default: ++ state->tuner_mtt = 0xE1; ++ break; ++ } ++ } ++ return 0; ++} ++ ++ static int mt_fe_tn_set_freq_tc2800(struct m88dc2800_state *state, ++ u32 freq_KHz) ++{ ++ u8 buf; ++ u8 buf1; ++ ++ mt_fe_tn_init_tc2800(state); ++ state->tuner_freq = freq_KHz; ++ _mt_fe_tn_set_reg(state, 0x21, freq_KHz > 500000 ? 0xb9 : 0x99); ++ mt_fe_tn_wakeup_tc2800(state); ++ _mt_fe_tn_set_reg(state, 0x05, 0x7f); ++ _mt_fe_tn_set_reg(state, 0x06, 0xf8); ++ _mt_fe_tn_set_RF_front_tc2800(state); ++ _mt_fe_tn_set_PLL_freq_tc2800(state); ++ _mt_fe_tn_set_DAC_tc2800(state); ++ _mt_fe_tn_set_BB_tc2800(state); ++ _mt_fe_tn_preset_tc2800(state); ++ _mt_fe_tn_set_reg(state, 0x05, 0x00); ++ _mt_fe_tn_set_reg(state, 0x06, 0x00); ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_set_reg(state, 0x00, 0x01); ++ _mt_fe_tn_set_reg(state, 0x00, 0x00); ++ msleep(5); ++ _mt_fe_tn_set_reg(state, 0x41, 0x00); ++ msleep(5); + _mt_fe_tn_set_reg(state, 0x41, 0x02); + -+ _mt_fe_tn_get_reg(state, 0x69, &buf1); -+ buf1 = buf1 & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x61, &buf); -+ buf = buf & 0x0f; -+ if (buf == 0x0c) -+ { -+ _mt_fe_tn_set_reg(state, 0x6a, 0x59); -+ } -+ -+ if(buf1 > 0x02) -+ { -+ if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x66, 0x44); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x66, 0x64); -+ else -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ } -+ -+ if (buf1 < 0x03) -+ { -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x64); -+ else if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ -+ msleep(5); -+ } -+ else if (buf < 0x0c) -+ { -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else if (freq_KHz >600000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x34); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ -+ msleep(5); -+ } -+ } else if ((state->tuner_mtt == 0xE1)) { -+ _mt_fe_tn_set_reg(state, 0x00, 0x01); -+ _mt_fe_tn_set_reg(state, 0x00, 0x00); -+ -+ msleep(20); -+ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xef) | 0x28; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ msleep(50); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xf7)| 0x10 ; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ -+ msleep(10); -+ -+ _mt_fe_tn_get_reg(state, 0x69, &buf); -+ buf = buf & 0x03; -+ _mt_fe_tn_set_reg(state, 0x2a, buf); -+ -+ if(buf > 0) -+ { -+ msleep(20); -+ _mt_fe_tn_get_reg(state, 0x84, &buf); -+ buf = buf & 0x1f; -+ _mt_fe_tn_set_reg(state, 0x68, 0x0a); -+ _mt_fe_tn_get_reg(state, 0x88, &buf1); -+ buf1 = buf1 & 0x1f; -+ if(buf <= buf1) -+ _mt_fe_tn_set_reg(state, 0x66, 0x44); -+ else -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ } -+ else -+ { -+ if (freq_KHz <= 600000) -+ { -+ _mt_fe_tn_set_reg(state, 0x68, 0x0c); -+ } -+ else -+ { -+ _mt_fe_tn_set_reg(state, 0x68, 0x0e); -+ } -+ _mt_fe_tn_set_reg(state, 0x30, 0xfb); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x04); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ } -+ if(state->tuner_loopthrough != 0) { -+ _mt_fe_tn_get_reg(state, 0x28, &buf); -+ if (buf == 0) { -+ _mt_fe_tn_set_reg(state, 0x28, 0xff); -+ _mt_fe_tn_get_reg(state, 0x61, &buf); -+ buf = buf & 0x0f; -+ if(buf > 9) -+ _mt_fe_tn_set_reg(state, 0x67, 0x74); -+ else if (buf >6) -+ _mt_fe_tn_set_reg(state, 0x67, 0x64); -+ else if (buf >3) -+ _mt_fe_tn_set_reg(state, 0x67, 0x54); -+ else -+ _mt_fe_tn_set_reg(state, 0x67, 0x44); -+ } -+ } else { -+ _mt_fe_tn_set_reg(state, 0x67, 0x34); -+ } -+ } else { -+ return 1; -+ } -+ return 0; -+} -+ -+/* -+static int mt_fe_tn_set_BB_filter_band_tc2800(struct m88dc2800_state *state, u8 bandwidth) -+{ -+ u8 buf, tmp; -+ -+ _mt_fe_tn_get_reg(state, 0x53, &tmp); -+ ++ _mt_fe_tn_get_reg(state, 0x69, &buf1); ++ buf1 = buf1 & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x61, &buf); ++ buf = buf & 0x0f; ++ if (buf == 0x0c) ++ _mt_fe_tn_set_reg(state, 0x6a, 0x59); ++ if (buf1 > 0x02) { ++ if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x66, 0x44); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x66, 0x64); ++ else ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ } ++ if (buf1 < 0x03) { ++ if (freq_KHz > 800000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x64); ++ else if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 300000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x43); ++ else if (freq_KHz > 220000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 110000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ msleep(5); ++ } else if (buf < 0x0c) { ++ if (freq_KHz > 800000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else if (freq_KHz > 600000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else if (freq_KHz > 500000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x34); ++ else if (freq_KHz > 300000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x43); ++ else if (freq_KHz > 220000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ else if (freq_KHz > 110000) ++ _mt_fe_tn_set_reg(state, 0x87, 0x14); ++ else ++ _mt_fe_tn_set_reg(state, 0x87, 0x54); ++ msleep(5); ++ } ++ } else if ((state->tuner_mtt == 0xE1)) { ++ _mt_fe_tn_set_reg(state, 0x00, 0x01); ++ _mt_fe_tn_set_reg(state, 0x00, 0x00); ++ msleep(20); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf & 0xef) | 0x28; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ msleep(50); ++ _mt_fe_tn_get_reg(state, 0x38, &buf); ++ _mt_fe_tn_set_reg(state, 0x38, buf); ++ _mt_fe_tn_get_reg(state, 0x32, &buf); ++ buf = (buf & 0xf7) | 0x10; ++ _mt_fe_tn_set_reg(state, 0x32, buf); ++ msleep(10); ++ _mt_fe_tn_get_reg(state, 0x69, &buf); ++ buf = buf & 0x03; ++ _mt_fe_tn_set_reg(state, 0x2a, buf); ++ if (buf > 0) { ++ msleep(20); ++ _mt_fe_tn_get_reg(state, 0x84, &buf); ++ buf = buf & 0x1f; ++ _mt_fe_tn_set_reg(state, 0x68, 0x0a); ++ _mt_fe_tn_get_reg(state, 0x88, &buf1); ++ buf1 = buf1 & 0x1f; ++ if (buf <= buf1) ++ _mt_fe_tn_set_reg(state, 0x66, 0x44); ++ else ++ _mt_fe_tn_set_reg(state, 0x66, 0x74); ++ } else { ++ if (freq_KHz <= 600000) ++ _mt_fe_tn_set_reg(state, 0x68, 0x0c); ++ else ++ _mt_fe_tn_set_reg(state, 0x68, 0x0e); ++ _mt_fe_tn_set_reg(state, 0x30, 0xfb); ++ _mt_fe_tn_set_reg(state, 0x30, 0xff); ++ _mt_fe_tn_set_reg(state, 0x31, 0x04); ++ _mt_fe_tn_set_reg(state, 0x31, 0x00); ++ } ++ if (state->tuner_loopthrough != 0) { ++ _mt_fe_tn_get_reg(state, 0x28, &buf); ++ if (buf == 0) { ++ _mt_fe_tn_set_reg(state, 0x28, 0xff); ++ _mt_fe_tn_get_reg(state, 0x61, &buf); ++ buf = buf & 0x0f; ++ if (buf > 9) ++ _mt_fe_tn_set_reg(state, 0x67, 0x74); ++ else if (buf > 6) ++ _mt_fe_tn_set_reg(state, 0x67, 0x64); ++ else if (buf > 3) ++ _mt_fe_tn_set_reg(state, 0x67, 0x54); ++ else ++ _mt_fe_tn_set_reg(state, 0x67, 0x44); ++ } ++ } else { ++ _mt_fe_tn_set_reg(state, 0x67, 0x34); ++ } ++ } else { ++ return 1; ++ } ++ return 0; ++} ++ ++ ++/* ++static int mt_fe_tn_set_BB_filter_band_tc2800(struct m88dc2800_state *state, ++ u8 bandwidth) ++{ ++ u8 buf, tmp; ++ ++ _mt_fe_tn_get_reg(state, 0x53, &tmp); ++ + if (bandwidth == 6) -+ buf = 0x01 << 1; ++ buf = 0x01 << 1; + else if (bandwidth == 7) -+ buf = 0x02 << 1; ++ buf = 0x02 << 1; + else if (bandwidth == 8) -+ buf = 0x04 << 1; ++ buf = 0x04 << 1; + else -+ buf = 0x04 << 1; -+ -+ tmp &= 0xf1; -+ tmp |= buf; -+ _mt_fe_tn_set_reg(state, 0x53, tmp); ++ buf = 0x04 << 1; ++ ++ tmp &= 0xf1; ++ tmp |= buf; ++ _mt_fe_tn_set_reg(state, 0x53, tmp); + state->tuner_bandwidth = bandwidth; -+ return 0; -+} -+*/ -+ -+/*static s64 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state *state)*/ -+static s32 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state *state) -+{ -+ /*s64 level = -107;*/ -+ s32 level = -107; -+ s32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; -+ s32 val1, val2, val; -+ s32 result2, result3, result4, result5, result6; -+ s32 append; -+ u8 tmp; -+ s32 freq_KHz = (s32)state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_get_reg(state, 0x61, &tmp); -+ tmp1 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x69, &tmp); -+ tmp2 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x73, &tmp); -+ tmp3 = tmp & 0x07; -+ -+ _mt_fe_tn_get_reg(state, 0x7c, &tmp); -+ tmp4 = (tmp >> 4) & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7b, &tmp); -+ tmp5 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7f, &tmp); -+ tmp6 = (tmp >> 5) & 0x01; -+ -+ if (tmp1 > 6) { -+ val1 = 0; -+ if (freq_KHz <= 200000) { -+ val2 = (tmp1 - 6) * 267; -+ } else if (freq_KHz <= 600000) { -+ val2 = (tmp1 - 6) * 280; -+ } else { -+ val2 = (tmp1 - 6) * 290; -+ } -+ val = val1 + val2; -+ } else { -+ if (tmp1 == 0) { -+ val1 = -550; -+ } else { -+ val1 = 0; -+ } -+ if ((tmp1 < 4) && (freq_KHz >= 506000)) { -+ val1 = -850; -+ } -+ val2 = 0; -+ val = val1 + val2; -+ } -+ -+ if (freq_KHz <= 95000) { -+ result2 = tmp2 * 289; -+ } else if (freq_KHz <= 155000) { -+ result2 = tmp2 * 278; -+ } else if (freq_KHz <= 245000) { -+ result2 = tmp2 * 267; -+ } else if (freq_KHz <= 305000) { -+ result2 = tmp2 * 256; -+ } else if (freq_KHz <= 335000) { -+ result2 = tmp2 * 244; -+ } else if (freq_KHz <= 425000) { -+ result2 = tmp2 * 233; -+ } else if (freq_KHz <= 575000) { -+ result2 = tmp2 * 222; -+ } else if (freq_KHz <= 665000) { -+ result2 = tmp2 * 211; -+ } else { -+ result2 = tmp2 * 200; -+ } -+ result3 = (6 - tmp3) * 100; -+ result4 = 300 * tmp4; -+ result5 = 50 * tmp5; -+ result6 = 300 * tmp6; -+ if (freq_KHz < 105000) { -+ append = -450; -+ } else if (freq_KHz <= 227000) { -+ append = -4 * (freq_KHz / 1000 - 100) + 150; -+ } else if (freq_KHz <= 305000) { -+ append = -4 * (freq_KHz / 1000 - 100); -+ } else if (freq_KHz <= 419000) { -+ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17 + 130; -+ } else if (freq_KHz <= 640000) { -+ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17; -+ } else { -+ append = -500; -+ } -+ level = append - (val + result2 + result3 + result4 + result5 + result6); -+ level /= 100; -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_get_reg(state, 0x61, &tmp); -+ tmp1 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x84, &tmp); -+ tmp2 = tmp & 0x1f; -+ -+ _mt_fe_tn_get_reg(state, 0x69, &tmp); -+ tmp3 = tmp & 0x03; -+ -+ _mt_fe_tn_get_reg(state, 0x73, &tmp); -+ tmp4 = tmp & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7c, &tmp); -+ tmp5 = (tmp >> 4) & 0x0f; -+ -+ _mt_fe_tn_get_reg(state, 0x7b, &tmp); -+ tmp6 = tmp & 0x0f; -+ -+ if (freq_KHz < 151000) { -+ result2 = (1150 - freq_KHz / 100) * 163 / 33 + 4230; -+ result3 = (1150 - freq_KHz / 100) * 115 / 33 + 1850; -+ result4 = -3676 * (freq_KHz / 1000) / 100 + 6115; -+ } else if (freq_KHz < 257000) { -+ result2 = (1540 - freq_KHz / 100) * 11 / 4 + 3870; -+ result3 = (1540 - freq_KHz / 100) * 205 / 96 + 2100; -+ result4 = -21 * freq_KHz / 1000 + 5084; -+ } else if (freq_KHz < 305000) { -+ result2 = (2620 - freq_KHz / 100) * 5 / 3 + 2770; -+ result3 = (2620 - freq_KHz / 100) * 10 / 7 + 1700; -+ result4 = 650; -+ } else if (freq_KHz < 449000) { -+ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; -+ result3 = (3100 - freq_KHz / 100) * 5 / 3 + 10000; -+ result4 = 134 * freq_KHz / 10000 + 11875; -+ } else { -+ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; -+ result3 = 8400; -+ result4 = 5300; -+ } -+ -+ if (tmp1 > 6) { -+ val1 = result2; -+ val2 = 2900; -+ val = 500; -+ } else if (tmp1 > 0) { -+ val1 = result3; -+ val2 = 2700; -+ val = 500; -+ } else { -+ val1 = result4; -+ val2 = 2700; -+ val = 400; -+ } -+ level = val1 - (val2 * tmp1 + 500 * tmp2 + 3000 * tmp3 - 500 * tmp4 + 3000 * tmp5 + val * tmp6) - 1000; -+ level /= 1000; -+ } -+ return level; -+} ++ return 0; ++} ++*/ ++ ++static s32 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state ++ *state) ++{ ++ s32 level = -107; ++ s32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; ++ s32 val1, val2, val; ++ s32 result2, result3, result4, result5, result6; ++ s32 append; ++ u8 tmp; ++ s32 freq_KHz = (s32) state->tuner_freq; ++ if (state->tuner_mtt == 0xD1) { ++ _mt_fe_tn_get_reg(state, 0x61, &tmp); ++ tmp1 = tmp & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x69, &tmp); ++ tmp2 = tmp & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x73, &tmp); ++ tmp3 = tmp & 0x07; ++ _mt_fe_tn_get_reg(state, 0x7c, &tmp); ++ tmp4 = (tmp >> 4) & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x7b, &tmp); ++ tmp5 = tmp & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x7f, &tmp); ++ tmp6 = (tmp >> 5) & 0x01; ++ if (tmp1 > 6) { ++ val1 = 0; ++ if (freq_KHz <= 200000) { ++ val2 = (tmp1 - 6) * 267; ++ } else if (freq_KHz <= 600000) { ++ val2 = (tmp1 - 6) * 280; ++ } else { ++ val2 = (tmp1 - 6) * 290; ++ } ++ val = val1 + val2; ++ } else { ++ if (tmp1 == 0) { ++ val1 = -550; ++ } else { ++ val1 = 0; ++ } ++ if ((tmp1 < 4) && (freq_KHz >= 506000)) { ++ val1 = -850; ++ } ++ val2 = 0; ++ val = val1 + val2; ++ } ++ if (freq_KHz <= 95000) { ++ result2 = tmp2 * 289; ++ } else if (freq_KHz <= 155000) { ++ result2 = tmp2 * 278; ++ } else if (freq_KHz <= 245000) { ++ result2 = tmp2 * 267; ++ } else if (freq_KHz <= 305000) { ++ result2 = tmp2 * 256; ++ } else if (freq_KHz <= 335000) { ++ result2 = tmp2 * 244; ++ } else if (freq_KHz <= 425000) { ++ result2 = tmp2 * 233; ++ } else if (freq_KHz <= 575000) { ++ result2 = tmp2 * 222; ++ } else if (freq_KHz <= 665000) { ++ result2 = tmp2 * 211; ++ } else { ++ result2 = tmp2 * 200; ++ } ++ result3 = (6 - tmp3) * 100; ++ result4 = 300 * tmp4; ++ result5 = 50 * tmp5; ++ result6 = 300 * tmp6; ++ if (freq_KHz < 105000) { ++ append = -450; ++ } else if (freq_KHz <= 227000) { ++ append = -4 * (freq_KHz / 1000 - 100) + 150; ++ } else if (freq_KHz <= 305000) { ++ append = -4 * (freq_KHz / 1000 - 100); ++ } else if (freq_KHz <= 419000) { ++ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17 + 130; ++ } else if (freq_KHz <= 640000) { ++ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17; ++ } else { ++ append = -500; ++ } ++ level = append - (val + result2 + result3 + result4 + ++ result5 + result6); ++ level /= 100; ++ } else if (state->tuner_mtt == 0xE1) { ++ _mt_fe_tn_get_reg(state, 0x61, &tmp); ++ tmp1 = tmp & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x84, &tmp); ++ tmp2 = tmp & 0x1f; ++ _mt_fe_tn_get_reg(state, 0x69, &tmp); ++ tmp3 = tmp & 0x03; ++ _mt_fe_tn_get_reg(state, 0x73, &tmp); ++ tmp4 = tmp & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x7c, &tmp); ++ tmp5 = (tmp >> 4) & 0x0f; ++ _mt_fe_tn_get_reg(state, 0x7b, &tmp); ++ tmp6 = tmp & 0x0f; ++ if (freq_KHz < 151000) { ++ result2 = (1150 - freq_KHz / 100) * 163 / 33 + 4230; ++ result3 = (1150 - freq_KHz / 100) * 115 / 33 + 1850; ++ result4 = -3676 * (freq_KHz / 1000) / 100 + 6115; ++ } else if (freq_KHz < 257000) { ++ result2 = (1540 - freq_KHz / 100) * 11 / 4 + 3870; ++ result3 = (1540 - freq_KHz / 100) * 205 / 96 + 2100; ++ result4 = -21 * freq_KHz / 1000 + 5084; ++ } else if (freq_KHz < 305000) { ++ result2 = (2620 - freq_KHz / 100) * 5 / 3 + 2770; ++ result3 = (2620 - freq_KHz / 100) * 10 / 7 + 1700; ++ result4 = 650; ++ } else if (freq_KHz < 449000) { ++ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; ++ result3 = (3100 - freq_KHz / 100) * 5 / 3 + 10000; ++ result4 = 134 * freq_KHz / 10000 + 11875; ++ } else { ++ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; ++ result3 = 8400; ++ result4 = 5300; ++ } ++ if (tmp1 > 6) { ++ val1 = result2; ++ val2 = 2900; ++ val = 500; ++ } else if (tmp1 > 0) { ++ val1 = result3; ++ val2 = 2700; ++ val = 500; ++ } else { ++ val1 = result4; ++ val2 = 2700; ++ val = 400; ++ } ++ level = val1 - (val2 * tmp1 + 500 * tmp2 + 3000 * tmp3 - ++ 500 * tmp4 + 3000 * tmp5 + val * tmp6) - 1000; ++ level /= 1000; ++ } ++ return level; ++} ++ + +/* m88dc2800 operation functions */ -+u8 M88DC2000GetLock(struct m88dc2800_state *state) -+{ -+ u8 u8ret = 0; -+ -+ if (ReadReg(state, 0x80) < 0x06) { -+ if ((ReadReg(state, 0xdf)&0x80)==0x80 -+ && (ReadReg(state, 0x91)&0x23)==0x03 -+ && (ReadReg(state, 0x43)&0x08)==0x08) -+ u8ret = 1; -+ else -+ u8ret = 0; -+ } else { -+ if ((ReadReg(state, 0x85)&0x08)==0x08) -+ u8ret = 1; -+ else -+ u8ret = 0; -+ } -+ printk("%s, lock=%d\n", __func__,u8ret); -+ return u8ret; -+} -+ -+static int M88DC2000SetTsType(struct m88dc2800_state *state, u8 type) -+{ -+ u8 regC2H; -+ -+ if (type == 3) { -+ WriteReg(state, 0x84, 0x6A); -+ WriteReg(state, 0xC0, 0x43); -+ WriteReg(state, 0xE2, 0x06); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC0; -+ regC2H |= 0x1B; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x60); /* common interface */ -+ } else if (type == 1) { -+ WriteReg(state, 0x84, 0x6A); -+ WriteReg(state, 0xC0, 0x47); /* serial format */ -+ WriteReg(state, 0xE2, 0x02); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC7; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x00); -+ } else { -+ WriteReg(state, 0x84, 0x6C); -+ WriteReg(state, 0xC0, 0x43); /* parallel format */ -+ WriteReg(state, 0xE2, 0x06); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC7; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x00); ++u8 M88DC2000GetLock(struct m88dc2800_state * state) ++{ ++ u8 u8ret = 0; ++ if (ReadReg(state, 0x80) < 0x06) { ++ if ((ReadReg(state, 0xdf) & 0x80) == 0x80 ++ &&(ReadReg(state, 0x91) & 0x23) == 0x03 ++ &&(ReadReg(state, 0x43) & 0x08) == 0x08) ++ u8ret = 1; ++ else ++ u8ret = 0; ++ } else { ++ if ((ReadReg(state, 0x85) & 0x08) == 0x08) ++ u8ret = 1; ++ else ++ u8ret = 0; + } -+ return 0; ++ dprintk("%s, lock=%d\n", __func__, u8ret); ++ return u8ret; +} + -+static int M88DC2000RegInitial_TC2800(struct m88dc2800_state *state) -+{ -+ u8 RegE3H, RegE4H; -+ -+ WriteReg(state, 0x00, 0x48); -+ WriteReg(state, 0x01, 0x09); -+ WriteReg(state, 0xFB, 0x0A); -+ WriteReg(state, 0xFC, 0x0B); -+ WriteReg(state, 0x02, 0x0B); -+ WriteReg(state, 0x03, 0x18); -+ WriteReg(state, 0x05, 0x0D); -+ WriteReg(state, 0x36, 0x80); -+ WriteReg(state, 0x43, 0x40); -+ WriteReg(state, 0x55, 0x7A); -+ WriteReg(state, 0x56, 0xD9); -+ WriteReg(state, 0x57, 0xDF); -+ WriteReg(state, 0x58, 0x39); -+ WriteReg(state, 0x5A, 0x00); -+ WriteReg(state, 0x5C, 0x71); -+ WriteReg(state, 0x5D, 0x23); -+ WriteReg(state, 0x86, 0x40); -+ WriteReg(state, 0xF9, 0x08); -+ WriteReg(state, 0x61, 0x40); -+ WriteReg(state, 0x62, 0x0A); -+ WriteReg(state, 0x90, 0x06); -+ WriteReg(state, 0xDE, 0x00); -+ WriteReg(state, 0xA0, 0x03); -+ WriteReg(state, 0xDF, 0x81); -+ WriteReg(state, 0xFA, 0x40); -+ WriteReg(state, 0x37, 0x10); -+ WriteReg(state, 0xF0, 0x40); -+ WriteReg(state, 0xF2, 0x9C); -+ WriteReg(state, 0xF3, 0x40); -+ -+ RegE3H = ReadReg(state, 0xE3); -+ RegE4H = ReadReg(state, 0xE4); -+ if (((RegE3H & 0xC0) == 0x00) && ((RegE4H & 0xC0) == 0x00)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x40, 0x00); -+ WriteReg(state, 0x41, 0x10); -+ WriteReg(state, 0xF1, 0x02); -+ WriteReg(state, 0xF4, 0x04); -+ WriteReg(state, 0xF5, 0x00); -+ WriteReg(state, 0x42, 0x14); -+ WriteReg(state, 0xE1, 0x25); -+ } else if (((RegE3H & 0xC0) == 0x80) && ((RegE4H & 0xC0) == 0x40)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0x40, 0x00); -+ WriteReg(state, 0x41, 0x10); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x14); -+ WriteReg(state, 0xE1, 0x25); -+ } else if ((RegE3H == 0x80 || RegE3H == 0x81) && (RegE4H == 0x80 || RegE4H == 0x81)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x24); -+ WriteReg(state, 0xE1, 0x25); -+ -+ WriteReg(state, 0x92, 0x7F); -+ WriteReg(state, 0x93, 0x91); -+ WriteReg(state, 0x95, 0x00); -+ WriteReg(state, 0x2B, 0x33); -+ WriteReg(state, 0x2A, 0x2A); -+ WriteReg(state, 0x2E, 0x80); -+ WriteReg(state, 0x25, 0x25); -+ WriteReg(state, 0x2D, 0xFF); -+ WriteReg(state, 0x26, 0xFF); -+ WriteReg(state, 0x27, 0x00); -+ WriteReg(state, 0x24, 0x25); -+ WriteReg(state, 0xA4, 0xFF); -+ WriteReg(state, 0xA3, 0x0D); -+ } else { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x24); -+ WriteReg(state, 0xE1, 0x27); -+ -+ WriteReg(state, 0x92, 0x7F); -+ WriteReg(state, 0x93, 0x91); -+ WriteReg(state, 0x95, 0x00); -+ WriteReg(state, 0x2B, 0x33); -+ WriteReg(state, 0x2A, 0x2A); -+ WriteReg(state, 0x2E, 0x80); -+ WriteReg(state, 0x25, 0x25); -+ WriteReg(state, 0x2D, 0xFF); -+ WriteReg(state, 0x26, 0xFF); -+ WriteReg(state, 0x27, 0x00); -+ WriteReg(state, 0x24, 0x25); -+ WriteReg(state, 0xA4, 0xFF); -+ WriteReg(state, 0xA3, 0x10); -+ } -+ -+ WriteReg(state, 0xF6, 0x4E); -+ WriteReg(state, 0xF7, 0x20); -+ WriteReg(state, 0x89, 0x02); -+ WriteReg(state, 0x14, 0x08); -+ WriteReg(state, 0x6F, 0x0D); -+ WriteReg(state, 0x10, 0xFF); -+ WriteReg(state, 0x11, 0x00); -+ WriteReg(state, 0x12, 0x30); -+ WriteReg(state, 0x13, 0x23); -+ WriteReg(state, 0x60, 0x00); -+ WriteReg(state, 0x69, 0x00); -+ WriteReg(state, 0x6A, 0x03); -+ WriteReg(state, 0xE0, 0x75); -+ WriteReg(state, 0x8D, 0x29); -+ WriteReg(state, 0x4E, 0xD8); -+ WriteReg(state, 0x88, 0x80); -+ WriteReg(state, 0x52, 0x79); -+ WriteReg(state, 0x53, 0x03); -+ WriteReg(state, 0x59, 0x30); -+ WriteReg(state, 0x5E, 0x02); -+ WriteReg(state, 0x5F, 0x0F); -+ WriteReg(state, 0x71, 0x03); -+ WriteReg(state, 0x72, 0x12); ++static int M88DC2000SetTsType(struct m88dc2800_state *state, u8 type) ++{ ++ u8 regC2H; ++ ++ if (type == 3) { ++ WriteReg(state, 0x84, 0x6A); ++ WriteReg(state, 0xC0, 0x43); ++ WriteReg(state, 0xE2, 0x06); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xC0; ++ regC2H |= 0x1B; ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0xC1, 0x60); /* common interface */ ++ } else if (type == 1) { ++ WriteReg(state, 0x84, 0x6A); ++ WriteReg(state, 0xC0, 0x47); /* serial format */ ++ WriteReg(state, 0xE2, 0x02); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xC7; ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0xC1, 0x00); ++ } else { ++ WriteReg(state, 0x84, 0x6C); ++ WriteReg(state, 0xC0, 0x43); /* parallel format */ ++ WriteReg(state, 0xE2, 0x06); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xC7; ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0xC1, 0x00); ++ } ++ return 0; ++} ++ ++static int M88DC2000RegInitial_TC2800(struct m88dc2800_state *state) ++{ ++ u8 RegE3H, RegE4H; ++ ++ WriteReg(state, 0x00, 0x48); ++ WriteReg(state, 0x01, 0x09); ++ WriteReg(state, 0xFB, 0x0A); ++ WriteReg(state, 0xFC, 0x0B); ++ WriteReg(state, 0x02, 0x0B); ++ WriteReg(state, 0x03, 0x18); ++ WriteReg(state, 0x05, 0x0D); ++ WriteReg(state, 0x36, 0x80); ++ WriteReg(state, 0x43, 0x40); ++ WriteReg(state, 0x55, 0x7A); ++ WriteReg(state, 0x56, 0xD9); ++ WriteReg(state, 0x57, 0xDF); ++ WriteReg(state, 0x58, 0x39); ++ WriteReg(state, 0x5A, 0x00); ++ WriteReg(state, 0x5C, 0x71); ++ WriteReg(state, 0x5D, 0x23); ++ WriteReg(state, 0x86, 0x40); ++ WriteReg(state, 0xF9, 0x08); ++ WriteReg(state, 0x61, 0x40); ++ WriteReg(state, 0x62, 0x0A); ++ WriteReg(state, 0x90, 0x06); ++ WriteReg(state, 0xDE, 0x00); ++ WriteReg(state, 0xA0, 0x03); ++ WriteReg(state, 0xDF, 0x81); ++ WriteReg(state, 0xFA, 0x40); ++ WriteReg(state, 0x37, 0x10); ++ WriteReg(state, 0xF0, 0x40); ++ WriteReg(state, 0xF2, 0x9C); ++ WriteReg(state, 0xF3, 0x40); ++ RegE3H = ReadReg(state, 0xE3); ++ RegE4H = ReadReg(state, 0xE4); ++ if (((RegE3H & 0xC0) == 0x00) && ((RegE4H & 0xC0) == 0x00)) { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x40, 0x00); ++ WriteReg(state, 0x41, 0x10); ++ WriteReg(state, 0xF1, 0x02); ++ WriteReg(state, 0xF4, 0x04); ++ WriteReg(state, 0xF5, 0x00); ++ WriteReg(state, 0x42, 0x14); ++ WriteReg(state, 0xE1, 0x25); ++ } else if (((RegE3H & 0xC0) == 0x80) && ((RegE4H & 0xC0) == 0x40)) { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x39, 0x00); ++ WriteReg(state, 0x3A, 0x00); ++ WriteReg(state, 0x40, 0x00); ++ WriteReg(state, 0x41, 0x10); ++ WriteReg(state, 0xF1, 0x00); ++ WriteReg(state, 0xF4, 0x00); ++ WriteReg(state, 0xF5, 0x40); ++ WriteReg(state, 0x42, 0x14); ++ WriteReg(state, 0xE1, 0x25); ++ } else if ((RegE3H == 0x80 || RegE3H == 0x81) ++ && (RegE4H == 0x80 || RegE4H == 0x81)) { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x39, 0x00); ++ WriteReg(state, 0x3A, 0x00); ++ WriteReg(state, 0xF1, 0x00); ++ WriteReg(state, 0xF4, 0x00); ++ WriteReg(state, 0xF5, 0x40); ++ WriteReg(state, 0x42, 0x24); ++ WriteReg(state, 0xE1, 0x25); ++ WriteReg(state, 0x92, 0x7F); ++ WriteReg(state, 0x93, 0x91); ++ WriteReg(state, 0x95, 0x00); ++ WriteReg(state, 0x2B, 0x33); ++ WriteReg(state, 0x2A, 0x2A); ++ WriteReg(state, 0x2E, 0x80); ++ WriteReg(state, 0x25, 0x25); ++ WriteReg(state, 0x2D, 0xFF); ++ WriteReg(state, 0x26, 0xFF); ++ WriteReg(state, 0x27, 0x00); ++ WriteReg(state, 0x24, 0x25); ++ WriteReg(state, 0xA4, 0xFF); ++ WriteReg(state, 0xA3, 0x0D); ++ } else { ++ WriteReg(state, 0x30, 0xFF); ++ WriteReg(state, 0x31, 0x00); ++ WriteReg(state, 0x32, 0x00); ++ WriteReg(state, 0x33, 0x00); ++ WriteReg(state, 0x35, 0x32); ++ WriteReg(state, 0x39, 0x00); ++ WriteReg(state, 0x3A, 0x00); ++ WriteReg(state, 0xF1, 0x00); ++ WriteReg(state, 0xF4, 0x00); ++ WriteReg(state, 0xF5, 0x40); ++ WriteReg(state, 0x42, 0x24); ++ WriteReg(state, 0xE1, 0x27); ++ WriteReg(state, 0x92, 0x7F); ++ WriteReg(state, 0x93, 0x91); ++ WriteReg(state, 0x95, 0x00); ++ WriteReg(state, 0x2B, 0x33); ++ WriteReg(state, 0x2A, 0x2A); ++ WriteReg(state, 0x2E, 0x80); ++ WriteReg(state, 0x25, 0x25); ++ WriteReg(state, 0x2D, 0xFF); ++ WriteReg(state, 0x26, 0xFF); ++ WriteReg(state, 0x27, 0x00); ++ WriteReg(state, 0x24, 0x25); ++ WriteReg(state, 0xA4, 0xFF); ++ WriteReg(state, 0xA3, 0x10); ++ } ++ WriteReg(state, 0xF6, 0x4E); ++ WriteReg(state, 0xF7, 0x20); ++ WriteReg(state, 0x89, 0x02); ++ WriteReg(state, 0x14, 0x08); ++ WriteReg(state, 0x6F, 0x0D); ++ WriteReg(state, 0x10, 0xFF); ++ WriteReg(state, 0x11, 0x00); ++ WriteReg(state, 0x12, 0x30); ++ WriteReg(state, 0x13, 0x23); ++ WriteReg(state, 0x60, 0x00); ++ WriteReg(state, 0x69, 0x00); ++ WriteReg(state, 0x6A, 0x03); ++ WriteReg(state, 0xE0, 0x75); ++ WriteReg(state, 0x8D, 0x29); ++ WriteReg(state, 0x4E, 0xD8); ++ WriteReg(state, 0x88, 0x80); ++ WriteReg(state, 0x52, 0x79); ++ WriteReg(state, 0x53, 0x03); ++ WriteReg(state, 0x59, 0x30); ++ WriteReg(state, 0x5E, 0x02); ++ WriteReg(state, 0x5F, 0x0F); ++ WriteReg(state, 0x71, 0x03); ++ WriteReg(state, 0x72, 0x12); + WriteReg(state, 0x73, 0x12); -+ -+ return 0; ++ ++ return 0; +} + -+static int M88DC2000AutoTSClock_P(struct m88dc2800_state *state, u32 sym, u16 qam) -+{ -+ u32 dataRate; ++static int M88DC2000AutoTSClock_P(struct m88dc2800_state *state, u32 sym, ++ u16 qam) ++{ ++ u32 dataRate; + u8 clk_div, value; -+ printk("m88dc2800: M88DC2000AutoTSClock_P, symrate=%d qam=%d\n",sym,qam); -+ switch(qam) -+ { -+ case 16: -+ dataRate = 4; -+ break; -+ case 32: -+ dataRate = 5; -+ break; -+ case 128: -+ dataRate = 7; -+ break; -+ case 256: -+ dataRate = 8; -+ break; -+ case 64: -+ default: -+ dataRate = 6; -+ break; -+ } -+ dataRate *= sym * 105; -+ dataRate /= 800; -+ -+ if(dataRate <= 4115) -+ clk_div = 0x05; -+ else if(dataRate <= 4800) -+ clk_div = 0x04; -+ else if(dataRate <= 5760) -+ clk_div = 0x03; -+ else if(dataRate <= 7200) -+ clk_div = 0x02; -+ else if(dataRate <= 9600) -+ clk_div = 0x01; -+ else -+ clk_div = 0x00; -+ -+ value = ReadReg(state, 0xC2); -+ value &= 0xc0; -+ value |= clk_div; -+ WriteReg(state, 0xC2, value); -+ return 0; -+} -+ -+static int M88DC2000AutoTSClock_C(struct m88dc2800_state *state, u32 sym, u16 qam) -+{ -+ u32 dataRate; -+ u8 clk_div, value; -+ printk("m88dc2800: M88DC2000AutoTSClock_C, symrate=%d qam=%d\n",sym,qam); -+ switch(qam) -+ { -+ case 16: -+ dataRate = 4; -+ break; -+ case 32: -+ dataRate = 5; -+ break; -+ case 128: -+ dataRate = 7; -+ break; -+ case 256: -+ dataRate = 8; -+ break; -+ case 64: -+ default: -+ dataRate = 6; -+ break; -+ } -+ dataRate *= sym * 105; -+ dataRate /= 800; -+ -+ if(dataRate <= 4115) -+ clk_div = 0x3F; -+ else if(dataRate <= 4800) -+ clk_div = 0x36; -+ else if(dataRate <= 5760) -+ clk_div = 0x2D; -+ else if(dataRate <= 7200) -+ clk_div = 0x24; -+ else if(dataRate <= 9600) -+ clk_div = 0x1B; -+ else -+ clk_div = 0x12; -+ -+ value = ReadReg(state, 0xC2); -+ value &= 0xc0; -+ value |= clk_div; -+ WriteReg(state, 0xC2, value); -+ return 0; -+} -+ -+static int M88DC2000SetTxMode(struct m88dc2800_state *state, u8 inverted, u8 j83) -+{ -+ u8 value = 0; -+ if (inverted) -+ value |= 0x08; /* spectrum inverted */ -+ if (j83) -+ value |= 0x01; /* J83C */ -+ WriteReg(state, 0x83, value); -+ return 0; -+} -+ -+static int M88DC2000SoftReset(struct m88dc2800_state *state) -+{ -+ WriteReg(state, 0x80, 0x01); -+ WriteReg(state, 0x82, 0x00); -+ msleep(1); -+ WriteReg(state, 0x80, 0x00); -+ return 0; -+} -+ -+static int M88DC2000SetSym(struct m88dc2800_state *state, u32 sym, u32 xtal) -+{ -+ u8 value; -+ u8 reg6FH, reg12H; -+ u64 fValue; -+ u32 dwValue; -+ printk("%s, sym=%d, xtal=%d\n", __func__, sym, xtal); -+ -+ fValue = 4294967296 * (sym + 10); -+ do_div(fValue, xtal); -+/* fValue = 4294967296 * (sym + 10) / xtal; */ -+ -+ dwValue = (u32)fValue; -+ printk("%s, fvalue1=%x\n", __func__, dwValue); -+ -+ WriteReg(state, 0x58, (u8)((dwValue >> 24) & 0xff)); -+ WriteReg(state, 0x57, (u8)((dwValue >> 16) & 0xff)); -+ WriteReg(state, 0x56, (u8)((dwValue >> 8) & 0xff)); -+ WriteReg(state, 0x55, (u8)((dwValue >> 0) & 0xff)); -+ -+/* fValue = 2048 * xtal / sym; */ -+ fValue = 2048 * xtal; -+ do_div(fValue, sym); -+ -+ dwValue = (u32)fValue; -+ printk("%s, fvalue2=%x\n", __func__, dwValue); -+ WriteReg(state, 0x5D, (u8)((dwValue >> 8) & 0xff)); -+ WriteReg(state, 0x5C, (u8)((dwValue >> 0) & 0xff)); -+ -+ value = ReadReg(state, 0x5A); -+ if (((dwValue >> 16) & 0x0001) == 0) -+ value &= 0x7F; -+ else -+ value |= 0x80; -+ WriteReg(state, 0x5A, value); -+ -+ value = ReadReg(state, 0x89); -+ if (sym <= 1800) -+ value |= 0x01; -+ else -+ value &= 0xFE; -+ WriteReg(state, 0x89, value); -+ -+ if (sym >= 6700){ -+ reg6FH = 0x0D; -+ reg12H = 0x30; -+ } else if (sym >= 4000) { -+ fValue = 22 * 4096 / sym; -+ reg6FH = (u8)fValue; -+ reg12H = 0x30; -+ } else if (sym >= 2000) { -+ fValue = 14 * 4096 / sym; -+ reg6FH = (u8)fValue; -+ reg12H = 0x20; -+ } else { -+ fValue = 7 * 4096 / sym; -+ reg6FH = (u8)fValue; -+ reg12H = 0x10; -+ } -+ WriteReg(state, 0x6F, reg6FH); -+ WriteReg(state, 0x12, reg12H); -+ -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ if(sym < 3000) { -+ WriteReg(state, 0x6C, 0x16); -+ WriteReg(state, 0x6D, 0x10); -+ WriteReg(state, 0x6E, 0x18); -+ } else { -+ WriteReg(state, 0x6C, 0x14); -+ WriteReg(state, 0x6D, 0x0E); -+ WriteReg(state, 0x6E, 0x36); -+ } -+ } else { -+ WriteReg(state, 0x6C, 0x16); -+ WriteReg(state, 0x6D, 0x10); -+ WriteReg(state, 0x6E, 0x18); ++ printk(KERN_INFO ++ "m88dc2800: M88DC2000AutoTSClock_P, symrate=%d qam=%d\n", ++ sym, qam); ++ switch (qam) { ++ case 16: ++ dataRate = 4; ++ break; ++ case 32: ++ dataRate = 5; ++ break; ++ case 128: ++ dataRate = 7; ++ break; ++ case 256: ++ dataRate = 8; ++ break; ++ case 64: ++ default: ++ dataRate = 6; ++ break; + } -+ return 0; ++ dataRate *= sym * 105; ++ dataRate /= 800; ++ if (dataRate <= 4115) ++ clk_div = 0x05; ++ else if (dataRate <= 4800) ++ clk_div = 0x04; ++ else if (dataRate <= 5760) ++ clk_div = 0x03; ++ else if (dataRate <= 7200) ++ clk_div = 0x02; ++ else if (dataRate <= 9600) ++ clk_div = 0x01; ++ else ++ clk_div = 0x00; ++ value = ReadReg(state, 0xC2); ++ value &= 0xc0; ++ value |= clk_div; ++ WriteReg(state, 0xC2, value); ++ return 0; +} + -+static int M88DC2000SetQAM(struct m88dc2800_state *state, u16 qam) -+{ -+ u8 reg00H, reg4AH, regC2H, reg44H, reg4CH, reg4DH, reg74H, value; -+ u8 reg8BH, reg8EH; -+ printk("%s, qam=%d\n", __func__, qam); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xF8; -+ switch(qam){ -+ case 16: /* 16 QAM */ -+ reg00H = 0x08; -+ reg4AH = 0x0F; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ WriteReg(state, 0x6E, 0x18); -+ break; -+ case 32: /* 32 QAM */ -+ reg00H = 0x18; -+ reg4AH = 0xFB; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ WriteReg(state, 0x6E, 0x18); -+ break; -+ case 64: /* 64 QAM */ -+ reg00H = 0x48; -+ reg4AH = 0xCD; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ break; -+ case 128: /* 128 QAM */ -+ reg00H = 0x28; -+ reg4AH = 0xFF; -+ regC2H |= 0x02; -+ reg44H = 0xA9; -+ reg4CH = 0x08; -+ reg4DH = 0xF5; -+ reg74H = 0x0E; -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ break; -+ case 256: /* 256 QAM */ -+ reg00H = 0x38; -+ reg4AH = 0xCD; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ regC2H |= 0x02; -+ } else { -+ regC2H |= 0x01; -+ } -+ reg44H = 0xA9; -+ reg4CH = 0x08; -+ reg4DH = 0xF5; -+ reg74H = 0x0E; -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ break; -+ default: /* 64 QAM */ -+ reg00H = 0x48; -+ reg4AH = 0xCD; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if(((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ break; -+ } -+ WriteReg(state, 0x00, reg00H); -+ -+ value = ReadReg(state, 0x88); -+ value |= 0x08; -+ WriteReg(state, 0x88, value); -+ WriteReg(state, 0x4B, 0xFF); -+ WriteReg(state, 0x4A, reg4AH); -+ value &= 0xF7; -+ WriteReg(state, 0x88, value); -+ -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0x44, reg44H); -+ WriteReg(state, 0x4C, reg4CH); -+ WriteReg(state, 0x4D, reg4DH); -+ WriteReg(state, 0x74, reg74H); -+ WriteReg(state, 0x8B, reg8BH); ++static int M88DC2000AutoTSClock_C(struct m88dc2800_state *state, u32 sym, ++ u16 qam) ++{ ++ u32 dataRate; ++ u8 clk_div, value; ++ printk(KERN_INFO ++ "m88dc2800: M88DC2000AutoTSClock_C, symrate=%d qam=%d\n", ++ sym, qam); ++ switch (qam) { ++ case 16: ++ dataRate = 4; ++ break; ++ case 32: ++ dataRate = 5; ++ break; ++ case 128: ++ dataRate = 7; ++ break; ++ case 256: ++ dataRate = 8; ++ break; ++ case 64: ++ default: ++ dataRate = 6; ++ break; ++ } ++ dataRate *= sym * 105; ++ dataRate /= 800; ++ if (dataRate <= 4115) ++ clk_div = 0x3F; ++ else if (dataRate <= 4800) ++ clk_div = 0x36; ++ else if (dataRate <= 5760) ++ clk_div = 0x2D; ++ else if (dataRate <= 7200) ++ clk_div = 0x24; ++ else if (dataRate <= 9600) ++ clk_div = 0x1B; ++ else ++ clk_div = 0x12; ++ value = ReadReg(state, 0xC2); ++ value &= 0xc0; ++ value |= clk_div; ++ WriteReg(state, 0xC2, value); ++ return 0; ++} ++ ++static int M88DC2000SetTxMode(struct m88dc2800_state *state, u8 inverted, ++ u8 j83) ++{ ++ u8 value = 0; ++ if (inverted) ++ value |= 0x08; /* spectrum inverted */ ++ if (j83) ++ value |= 0x01; /* J83C */ ++ WriteReg(state, 0x83, value); ++ return 0; ++} ++ ++static int M88DC2000SoftReset(struct m88dc2800_state *state) ++{ ++ WriteReg(state, 0x80, 0x01); ++ WriteReg(state, 0x82, 0x00); ++ msleep(1); ++ WriteReg(state, 0x80, 0x00); ++ return 0; ++} ++ ++static int M88DC2000SetSym(struct m88dc2800_state *state, u32 sym, u32 xtal) ++{ ++ u8 value; ++ u8 reg6FH, reg12H; ++ u64 fValue; ++ u32 dwValue; ++ ++ printk(KERN_INFO "%s, sym=%d, xtal=%d\n", __func__, sym, xtal); ++ fValue = 4294967296 * (sym + 10); ++ do_div(fValue, xtal); ++ ++ /* fValue = 4294967296 * (sym + 10) / xtal; */ ++ dwValue = (u32) fValue; ++ printk(KERN_INFO "%s, fvalue1=%x\n", __func__, dwValue); ++ WriteReg(state, 0x58, (u8) ((dwValue >> 24) & 0xff)); ++ WriteReg(state, 0x57, (u8) ((dwValue >> 16) & 0xff)); ++ WriteReg(state, 0x56, (u8) ((dwValue >> 8) & 0xff)); ++ WriteReg(state, 0x55, (u8) ((dwValue >> 0) & 0xff)); ++ ++ /* fValue = 2048 * xtal / sym; */ ++ fValue = 2048 * xtal; ++ do_div(fValue, sym); ++ dwValue = (u32) fValue; ++ printk(KERN_INFO "%s, fvalue2=%x\n", __func__, dwValue); ++ WriteReg(state, 0x5D, (u8) ((dwValue >> 8) & 0xff)); ++ WriteReg(state, 0x5C, (u8) ((dwValue >> 0) & 0xff)); ++ value = ReadReg(state, 0x5A); ++ if (((dwValue >> 16) & 0x0001) == 0) ++ value &= 0x7F; ++ else ++ value |= 0x80; ++ WriteReg(state, 0x5A, value); ++ value = ReadReg(state, 0x89); ++ if (sym <= 1800) ++ value |= 0x01; ++ else ++ value &= 0xFE; ++ WriteReg(state, 0x89, value); ++ if (sym >= 6700) { ++ reg6FH = 0x0D; ++ reg12H = 0x30; ++ } else if (sym >= 4000) { ++ fValue = 22 * 4096 / sym; ++ reg6FH = (u8) fValue; ++ reg12H = 0x30; ++ } else if (sym >= 2000) { ++ fValue = 14 * 4096 / sym; ++ reg6FH = (u8) fValue; ++ reg12H = 0x20; ++ } else { ++ fValue = 7 * 4096 / sym; ++ reg6FH = (u8) fValue; ++ reg12H = 0x10; ++ } ++ WriteReg(state, 0x6F, reg6FH); ++ WriteReg(state, 0x12, reg12H); ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ if (sym < 3000) { ++ WriteReg(state, 0x6C, 0x16); ++ WriteReg(state, 0x6D, 0x10); ++ WriteReg(state, 0x6E, 0x18); ++ } else { ++ WriteReg(state, 0x6C, 0x14); ++ WriteReg(state, 0x6D, 0x0E); ++ WriteReg(state, 0x6E, 0x36); ++ } ++ } else { ++ WriteReg(state, 0x6C, 0x16); ++ WriteReg(state, 0x6D, 0x10); ++ WriteReg(state, 0x6E, 0x18); ++ } ++ return 0; ++} ++ ++static int M88DC2000SetQAM(struct m88dc2800_state *state, u16 qam) ++{ ++ u8 reg00H, reg4AH, regC2H, reg44H, reg4CH, reg4DH, reg74H, value; ++ u8 reg8BH, reg8EH; ++ printk(KERN_INFO "%s, qam=%d\n", __func__, qam); ++ regC2H = ReadReg(state, 0xC2); ++ regC2H &= 0xF8; ++ switch (qam) { ++ case 16: /* 16 QAM */ ++ reg00H = 0x08; ++ reg4AH = 0x0F; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ WriteReg(state, 0x6E, 0x18); ++ break; ++ case 32: /* 32 QAM */ ++ reg00H = 0x18; ++ reg4AH = 0xFB; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ WriteReg(state, 0x6E, 0x18); ++ break; ++ case 64: /* 64 QAM */ ++ reg00H = 0x48; ++ reg4AH = 0xCD; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ break; ++ case 128: /* 128 QAM */ ++ reg00H = 0x28; ++ reg4AH = 0xFF; ++ regC2H |= 0x02; ++ reg44H = 0xA9; ++ reg4CH = 0x08; ++ reg4DH = 0xF5; ++ reg74H = 0x0E; ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ break; ++ case 256: /* 256 QAM */ ++ reg00H = 0x38; ++ reg4AH = 0xCD; ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ regC2H |= 0x02; ++ } else { ++ regC2H |= 0x01; ++ } ++ reg44H = 0xA9; ++ reg4CH = 0x08; ++ reg4DH = 0xF5; ++ reg74H = 0x0E; ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ break; ++ default: /* 64 QAM */ ++ reg00H = 0x48; ++ reg4AH = 0xCD; ++ regC2H |= 0x02; ++ reg44H = 0xAA; ++ reg4CH = 0x0C; ++ reg4DH = 0xF7; ++ reg74H = 0x0E; ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { ++ reg8BH = 0x5A; ++ reg8EH = 0xBD; ++ } else { ++ reg8BH = 0x5B; ++ reg8EH = 0x9D; ++ } ++ break; ++ } ++ WriteReg(state, 0x00, reg00H); ++ value = ReadReg(state, 0x88); ++ value |= 0x08; ++ WriteReg(state, 0x88, value); ++ WriteReg(state, 0x4B, 0xFF); ++ WriteReg(state, 0x4A, reg4AH); ++ value &= 0xF7; ++ WriteReg(state, 0x88, value); ++ WriteReg(state, 0xC2, regC2H); ++ WriteReg(state, 0x44, reg44H); ++ WriteReg(state, 0x4C, reg4CH); ++ WriteReg(state, 0x4D, reg4DH); ++ WriteReg(state, 0x74, reg74H); ++ WriteReg(state, 0x8B, reg8BH); + WriteReg(state, 0x8E, reg8EH); -+ return 0; ++ return 0; +} + -+static int M88DC2000WriteTuner_TC2800(struct m88dc2800_state *state, u32 freq_KHz) -+{ -+ printk("%s, freq=%d KHz\n", __func__, freq_KHz); -+ return mt_fe_tn_set_freq_tc2800(state, freq_KHz); ++static int M88DC2000WriteTuner_TC2800(struct m88dc2800_state *state, ++ u32 freq_KHz) ++{ ++ printk(KERN_INFO "%s, freq=%d KHz\n", __func__, freq_KHz); ++ return mt_fe_tn_set_freq_tc2800(state, freq_KHz); +} + +static int m88dc2800_init(struct dvb_frontend *fe) @@ -2038,12 +1870,9 @@ index 0000000..f48a356 + u8 is_annex_c, is_update; + u16 temp_qam; + s32 waiting_time; -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ -+ if(c->delivery_system == SYS_DVBC_ANNEX_C) -+ is_annex_c = 1; -+ else -+ is_annex_c = 0; ++ struct m88dc2800_state *state = fe->demodulator_priv; ++ ++ is_annex_c = c->delivery_system == SYS_DVBC_ANNEX_C ? 1 : 0; + + switch (c->modulation) { + case QAM_16: @@ -2054,280 +1883,290 @@ index 0000000..f48a356 + break; + case QAM_128: + temp_qam = 128; -+ break; ++ break; + case QAM_256: + temp_qam = 256; -+ break; -+ default: /* QAM_64 */ ++ break; ++ default: /* QAM_64 */ + temp_qam = 64; + break; + } -+ -+ if(c->inversion == INVERSION_ON) -+ state->inverted = 1; -+ else -+ state->inverted = 0; + -+ printk("m88dc2800: state, freq=%d qam=%d sym=%d inverted=%d xtal=%d\n", state->freq,state->qam,state->sym,state->inverted,state->xtal); -+ printk("m88dc2800: set frequency to %d qam=%d symrate=%d annex-c=%d\n", c->frequency,temp_qam,c->symbol_rate,is_annex_c); -+ ++ state->inverted = c->inversion == INVERSION_ON ? 1 : 0; ++ ++ printk(KERN_INFO ++ "m88dc2800: state, freq=%d qam=%d sym=%d inverted=%d xtal=%d\n", ++ state->freq, state->qam, state->sym, state->inverted, ++ state->xtal); ++ printk(KERN_INFO ++ "m88dc2800: set frequency to %d qam=%d symrate=%d annex-c=%d\n", ++ c->frequency, temp_qam, c->symbol_rate, is_annex_c); ++ + is_update = 0; + WriteReg(state, 0x80, 0x01); -+ if(c->frequency != state->freq){ -+ M88DC2000WriteTuner_TC2800(state, c->frequency/1000); -+ state->freq = c->frequency; ++ if (c->frequency != state->freq) { ++ M88DC2000WriteTuner_TC2800(state, c->frequency / 1000); ++ state->freq = c->frequency; + } -+ if(c->symbol_rate != state->sym){ -+ M88DC2000SetSym(state, c->symbol_rate/1000, state->xtal); ++ if (c->symbol_rate != state->sym) { ++ M88DC2000SetSym(state, c->symbol_rate / 1000, state->xtal); + state->sym = c->symbol_rate; + is_update = 1; + } -+ if(temp_qam != state->qam){ -+ M88DC2000SetQAM(state, temp_qam); ++ if (temp_qam != state->qam) { ++ M88DC2000SetQAM(state, temp_qam); + state->qam = temp_qam; -+ is_update = 1; ++ is_update = 1; + } -+ -+ if(is_update != 0){ -+ if(state->config->ts_mode == 3) -+ M88DC2000AutoTSClock_C(state, state->sym/1000, temp_qam); ++ ++ if (is_update != 0) { ++ if (state->config->ts_mode == 3) ++ M88DC2000AutoTSClock_C(state, state->sym / 1000, ++ temp_qam); + else -+ M88DC2000AutoTSClock_P(state, state->sym/1000, temp_qam); ++ M88DC2000AutoTSClock_P(state, state->sym / 1000, ++ temp_qam); + } -+ ++ + M88DC2000SetTxMode(state, state->inverted, is_annex_c); + M88DC2000SoftReset(state); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) -+ waiting_time = 800; -+ else -+ waiting_time = 500; -+ while (waiting_time > 0) { -+ msleep(50); -+ waiting_time -= 50; -+ if (M88DC2000GetLock(state)) -+ return 0; ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) ++ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) ++ waiting_time = 800; ++ else ++ waiting_time = 500; ++ while (waiting_time > 0) { ++ msleep(50); ++ waiting_time -= 50; ++ if (M88DC2000GetLock(state)) ++ return 0; + } -+ -+ if (state->inverted != 0) -+ state->inverted = 0; -+ else -+ state->inverted = 1; -+ M88DC2000SetTxMode(state, state->inverted, is_annex_c); -+ M88DC2000SoftReset(state); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) -+ waiting_time = 800; -+ else -+ waiting_time = 500; -+ while (waiting_time > 0) { -+ msleep(50); -+ waiting_time -= 50; -+ if (M88DC2000GetLock(state)) -+ return 0; ++ ++ state->inverted = (state->inverted != 0) ? 0 : 1; ++ M88DC2000SetTxMode(state, state->inverted, is_annex_c); ++ M88DC2000SoftReset(state); ++ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && ++ ((ReadReg(state, 0xE4) & 0x80) == 0x80)) ++ waiting_time = 800; ++ else ++ waiting_time = 500; ++ while (waiting_time > 0) { ++ msleep(50); ++ waiting_time -= 50; ++ if (M88DC2000GetLock(state)) ++ return 0; + } + return 0; +} + -+static int m88dc2800_read_status(struct dvb_frontend* fe, fe_status_t* status) ++static int m88dc2800_read_status(struct dvb_frontend *fe, ++ fe_status_t * status) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; ++ struct m88dc2800_state *state = fe->demodulator_priv; + *status = 0; -+ ++ + if (M88DC2000GetLock(state)) { -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ | FE_HAS_SYNC|FE_HAS_VITERBI | FE_HAS_LOCK; ++ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER ++ |FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_LOCK; + } + return 0; +} + -+static int m88dc2800_read_ber(struct dvb_frontend* fe, u32* ber) ++static int m88dc2800_read_ber(struct dvb_frontend *fe, u32 * ber) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; ++ struct m88dc2800_state *state = fe->demodulator_priv; + u16 tmp; + -+ if (M88DC2000GetLock(state) == 0) { ++ if (M88DC2000GetLock(state) == 0) { + state->ber = 0; -+ } else if ((ReadReg(state, 0xA0) & 0x80) != 0x80) { -+ tmp = ReadReg(state, 0xA2) << 8; -+ tmp += ReadReg(state, 0xA1); -+ state->ber = tmp; -+ WriteReg(state, 0xA0, 0x05); -+ WriteReg(state, 0xA0, 0x85); -+ } ++ } else if ((ReadReg(state, 0xA0) & 0x80) != 0x80) { ++ tmp = ReadReg(state, 0xA2) << 8; ++ tmp += ReadReg(state, 0xA1); ++ state->ber = tmp; ++ WriteReg(state, 0xA0, 0x05); ++ WriteReg(state, 0xA0, 0x85); ++ } + *ber = state->ber; + return 0; +} + -+static int m88dc2800_read_signal_strength(struct dvb_frontend* fe, u16* strength) ++static int m88dc2800_read_signal_strength(struct dvb_frontend *fe, ++ u16 * strength) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ ++ struct m88dc2800_state *state = fe->demodulator_priv; + s16 tuner_strength; -+ tuner_strength = (s16)mt_fe_tn_get_signal_strength_tc2800(state); -+ -+ if(tuner_strength < -107) -+ *strength = 0; -+ else -+ *strength = tuner_strength + 107; -+ ++ ++ tuner_strength = mt_fe_tn_get_signal_strength_tc2800(state); ++ *strength = tuner_strength < -107 ? 0 : tuner_strength + 107; ++ + return 0; +} + -+static int m88dc2800_read_snr(struct dvb_frontend* fe, u16* snr) ++static int m88dc2800_read_snr(struct dvb_frontend *fe, u16 * snr) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; ++ static const u32 mes_log[] = { ++ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, ++ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, ++ 13010, 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, ++ 14624, 14771, 14914, 15052, 15185, 15315, 15441, 15563, 15682, ++ 15798, 15911, 16021, 16128, 16232, 16335, 16435, 16532, 16628, ++ 16721, 16812, 16902, 16990, 17076, 17160, 17243, 17324, 17404, ++ 17482, 17559, 17634, 17709, 17782, 17853, 17924, 17993, 18062, ++ 18129, 18195, 18261, 18325, 18388, 18451, 18513, 18573, 18633, ++ 18692, 18751, 18808, 18865, 18921, 18976, 19031 ++ }; ++ struct m88dc2800_state *state = fe->demodulator_priv; ++ u8 i; ++ u32 _snr, mse; + -+ const u32 mes_log[] = { -+ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, -+ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, 13010, -+ 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, 14624, 14771, -+ 14914, 15052, 15185, 15315, 15441, 15563, 15682, 15798, 15911, 16021, -+ 16128, 16232, 16335, 16435, 16532, 16628, 16721, 16812, 16902, 16990, -+ 17076, 17160, 17243, 17324, 17404, 17482, 17559, 17634, 17709, 17782, -+ 17853, 17924, 17993, 18062, 18129, 18195, 18261, 18325, 18388, 18451, -+ 18513, 18573, 18633, 18692, 18751, 18808, 18865, 18921, 18976, 19031 -+ }; -+ u8 i; -+ u32 _snr, mse; -+ -+ if ((ReadReg(state, 0x91)&0x23)!=0x03) { -+ *snr = 0; ++ if ((ReadReg(state, 0x91) & 0x23) != 0x03) { ++ *snr = 0; + return 0; -+ } -+ -+ mse = 0; -+ for (i=0; i<30; i++) { -+ mse += (ReadReg(state, 0x08) << 8) + ReadReg(state, 0x07); -+ } -+ mse /= 30; -+ if (mse > 80) -+ mse = 80; -+ -+ switch (state->qam) { -+ case 16: _snr = 34080; break; /* 16QAM */ -+ case 32: _snr = 37600; break; /* 32QAM */ -+ case 64: _snr = 40310; break; /* 64QAM */ -+ case 128: _snr = 43720; break; /* 128QAM */ -+ case 256: _snr = 46390; break; /* 256QAM */ -+ default: _snr = 40310; break; -+ } -+ _snr -= mes_log[mse-1]; /* C - 10*log10(MSE) */ -+ _snr /= 1000; -+ if (_snr > 0xff) -+ _snr = 0xff; -+ -+ *snr = _snr; ++ } ++ mse = 0; ++ for (i = 0; i < 30; i++) { ++ mse += (ReadReg(state, 0x08) << 8) + ReadReg(state, 0x07); ++ } ++ mse /= 30; ++ if (mse > 80) ++ mse = 80; ++ switch (state->qam) { ++ case 16: ++ _snr = 34080; ++ break; /* 16QAM */ ++ case 32: ++ _snr = 37600; ++ break; /* 32QAM */ ++ case 64: ++ _snr = 40310; ++ break; /* 64QAM */ ++ case 128: ++ _snr = 43720; ++ break; /* 128QAM */ ++ case 256: ++ _snr = 46390; ++ break; /* 256QAM */ ++ default: ++ _snr = 40310; ++ break; ++ } ++ _snr -= mes_log[mse - 1]; /* C - 10*log10(MSE) */ ++ _snr /= 1000; ++ if (_snr > 0xff) ++ _snr = 0xff; ++ *snr = _snr; + return 0; +} + -+static int m88dc2800_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) ++static int m88dc2800_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; ++ struct m88dc2800_state *state = fe->demodulator_priv; + u8 u8Value; -+ ++ + u8Value = ReadReg(state, 0xdf); -+ u8Value |= 0x02; /* Hold */ ++ u8Value |= 0x02; /* Hold */ + WriteReg(state, 0xdf, u8Value); -+ ++ + *ucblocks = ReadReg(state, 0xd5); + *ucblocks = (*ucblocks << 8) | ReadReg(state, 0xd4); -+ -+ u8Value &= 0xfe; /* Clear */ ++ ++ u8Value &= 0xfe; /* Clear */ + WriteReg(state, 0xdf, u8Value); -+ u8Value &= 0xfc; /* Update */ ++ u8Value &= 0xfc; /* Update */ + u8Value |= 0x01; -+ WriteReg(state, 0xdf, u8Value); -+ ++ WriteReg(state, 0xdf, u8Value); ++ + return 0; +} + -+static int m88dc2800_sleep(struct dvb_frontend* fe) ++static int m88dc2800_sleep(struct dvb_frontend *fe) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; -+ ++ struct m88dc2800_state *state = fe->demodulator_priv; ++ + mt_fe_tn_sleep_tc2800(state); + state->freq = 0; + + return 0; +} + -+static void m88dc2800_release(struct dvb_frontend* fe) ++static void m88dc2800_release(struct dvb_frontend *fe) +{ -+ struct m88dc2800_state* state = fe->demodulator_priv; ++ struct m88dc2800_state *state = fe->demodulator_priv; + kfree(state); +} + +static struct dvb_frontend_ops m88dc2800_ops; + -+struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, -+ struct i2c_adapter* i2c) ++struct dvb_frontend *m88dc2800_attach(const struct m88dc2800_config ++ *config, struct i2c_adapter *i2c) +{ -+ struct m88dc2800_state* state = NULL; ++ struct m88dc2800_state *state = NULL; + + /* allocate memory for the internal state */ + state = kzalloc(sizeof(struct m88dc2800_state), GFP_KERNEL); -+ if (state == NULL) goto error; ++ if (state == NULL) ++ goto error; + + /* setup the state */ + state->config = config; + state->i2c = i2c; + state->xtal = 28800; -+ ++ + WriteReg(state, 0x80, 0x01); -+ M88DC2000RegInitial_TC2800(state); ++ M88DC2000RegInitial_TC2800(state); + M88DC2000SetTsType(state, state->config->ts_mode); + mt_fe_tn_init_tc2800(state); -+ ++ + /* create dvb_frontend */ -+ memcpy(&state->frontend.ops, &m88dc2800_ops, sizeof(struct dvb_frontend_ops)); ++ memcpy(&state->frontend.ops, &m88dc2800_ops, ++ sizeof(struct dvb_frontend_ops)); + state->frontend.demodulator_priv = state; + return &state->frontend; + -+error: ++ error: + kfree(state); + return NULL; +} ++ +EXPORT_SYMBOL(m88dc2800_attach); + +static struct dvb_frontend_ops m88dc2800_ops = { -+ .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C }, ++ .delsys = {SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C}, + .info = { -+ .name = "Montage M88DC2800 DVB-C", -+ .frequency_stepsize = 62500, -+ .frequency_min = 48000000, -+ .frequency_max = 870000000, -+ .symbol_rate_min = 870000, -+ .symbol_rate_max = 9000000, -+ .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | -+ FE_CAN_QAM_128 | FE_CAN_QAM_256 | -+ FE_CAN_FEC_AUTO ++ .name = "Montage M88DC2800 DVB-C", ++ .frequency_stepsize = 62500, ++ .frequency_min = 48000000, ++ .frequency_max = 870000000, ++ .symbol_rate_min = 870000, ++ .symbol_rate_max = 9000000, ++ .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | ++ FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_FEC_AUTO + }, -+ + .release = m88dc2800_release, + .init = m88dc2800_init, + .sleep = m88dc2800_sleep, + .set_frontend = m88dc2800_set_parameters, -+ .read_status = m88dc2800_read_status, -+ .read_ber = m88dc2800_read_ber, -+ .read_signal_strength = m88dc2800_read_signal_strength, ++ .read_status = m88dc2800_read_status, ++ .read_ber = m88dc2800_read_ber, ++ .read_signal_strength = m88dc2800_read_signal_strength, + .read_snr = m88dc2800_read_snr, + .read_ucblocks = m88dc2800_read_ucblocks, +}; + +MODULE_DESCRIPTION("Montage DVB-C demodulator driver"); -+MODULE_AUTHOR("Max nibble"); ++MODULE_AUTHOR("Max Nibble "); +MODULE_LICENSE("GPL"); -diff --git a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontends/m88dc2800.h -new file mode 100644 -index 0000000..a0a93c4 ---- /dev/null -+++ b/drivers/media/dvb-frontends/m88dc2800.h ++MODULE_VERSION("1.00"); +diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontends/m88dc2800.h +--- a/drivers/media/dvb-frontends/m88dc2800.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/m88dc2800.h 2013-01-26 14:57:32.000000000 +0800 @@ -0,0 +1,43 @@ +/* + M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage + -+ Copyright (C) 2012 Max nibble -+ Copyright (C) 2011 Montage Technology -+ ++ Copyright (C) 2012 Max Nibble ++ Copyright (C) 2011 Montage Technology - www.montage-tech.com ++ + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or @@ -2363,13 +2202,11 @@ index 0000000..a0a93c4 + printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); + return NULL; +} -+#endif // CONFIG_DVB_M88DC2800 -+#endif // M88DC2800_H -diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c -new file mode 100644 -index 0000000..315809d ---- /dev/null -+++ b/drivers/media/dvb-frontends/m88ds3103.c ++#endif /* CONFIG_DVB_M88DC2800 */ ++#endif /* M88DC2800_H */ +diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c +--- a/drivers/media/dvb-frontends/m88ds3103.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/m88ds3103.c 2013-01-30 12:33:47.000000000 +0800 @@ -0,0 +1,1710 @@ +/* + Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver @@ -4081,11 +3918,9 @@ index 0000000..315809d +MODULE_DESCRIPTION("DVB Frontend module for Montage DS3103/TS2022 hardware"); +MODULE_AUTHOR("Max nibble"); +MODULE_LICENSE("GPL"); -diff --git a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h -new file mode 100644 -index 0000000..c7b690e ---- /dev/null -+++ b/drivers/media/dvb-frontends/m88ds3103.h +diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h +--- a/drivers/media/dvb-frontends/m88ds3103.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/m88ds3103.h 2013-01-30 12:33:51.000000000 +0800 @@ -0,0 +1,53 @@ +/* + Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver @@ -4140,11 +3975,9 @@ index 0000000..c7b690e +} +#endif /* CONFIG_DVB_M88DS3103 */ +#endif /* M88DS3103_H */ -diff --git a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-frontends/m88ds3103_priv.h -new file mode 100644 -index 0000000..2838514 ---- /dev/null -+++ b/drivers/media/dvb-frontends/m88ds3103_priv.h +diff -urN a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-frontends/m88ds3103_priv.h +--- a/drivers/media/dvb-frontends/m88ds3103_priv.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/m88ds3103_priv.h 2013-01-30 12:33:56.000000000 +0800 @@ -0,0 +1,403 @@ +/* + Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver @@ -4549,24 +4382,17935 @@ index 0000000..2838514 +}; + +#endif /* M88DS3103_PRIV_H */ -diff --git a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig -index eafa114..37690f0 100644 ---- a/drivers/media/pci/cx23885/Kconfig -+++ b/drivers/media/pci/cx23885/Kconfig -@@ -23,6 +23,8 @@ config VIDEO_CX23885 - select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DC2800 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT - select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0367 if MEDIA_SUBDRV_AUTOSELECT -diff --git a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c -index 7344849..369ae7c 100644 ---- a/drivers/media/pci/cx23885/cimax2.c -+++ b/drivers/media/pci/cx23885/cimax2.c -@@ -415,7 +415,7 @@ int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, +diff -urN a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile +--- a/drivers/media/dvb-frontends/Makefile 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/dvb-frontends/Makefile 2013-02-14 22:57:10.000000000 +0800 +@@ -10,6 +10,7 @@ + drxd-objs := drxd_firm.o drxd_hard.o + cxd2820r-objs := cxd2820r_core.o cxd2820r_c.o cxd2820r_t.o cxd2820r_t2.o + drxk-objs := drxk_hard.o ++si2168-objs := si2168_demod.o si2168_si2158.o si2168_drv.o + + obj-$(CONFIG_DVB_PLL) += dvb-pll.o + obj-$(CONFIG_DVB_STV0299) += stv0299.o +@@ -102,4 +103,6 @@ + obj-$(CONFIG_DVB_RTL2832) += rtl2832.o + obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o + obj-$(CONFIG_DVB_AF9033) += af9033.o +- ++obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o ++obj-$(CONFIG_DVB_M88DC2800) += m88dc2800.o ++obj-$(CONFIG_DVB_SI2168) += si2168.o +diff -urN a/drivers/media/dvb-frontends/si2158_commands.h b/drivers/media/dvb-frontends/si2158_commands.h +--- a/drivers/media/dvb-frontends/si2158_commands.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2158_commands.h 2013-02-17 18:04:35.000000000 +0800 +@@ -0,0 +1,1223 @@ ++/************************************************************************************/ ++#ifndef Si2158_COMMANDS_H ++#define Si2158_COMMANDS_H ++ ++/* STATUS structure definition */ ++ typedef struct { /* Si2158_COMMON_REPLY_struct */ ++ unsigned char tunint; ++ unsigned char atvint; ++ unsigned char dtvint; ++ unsigned char err; ++ unsigned char cts; ++ } Si2158_COMMON_REPLY_struct; ++ ++/* STATUS fields definition */ ++ /* STATUS, TUNINT field definition (address 0, size 1, lsb 0, unsigned)*/ ++ #define Si2158_STATUS_TUNINT_LSB 0 ++ #define Si2158_STATUS_TUNINT_MASK 0x01 ++ #define Si2158_STATUS_TUNINT_NOT_TRIGGERED 0 ++ #define Si2158_STATUS_TUNINT_TRIGGERED 1 ++ /* STATUS, ATVINT field definition (address 0, size 1, lsb 1, unsigned)*/ ++ #define Si2158_STATUS_ATVINT_LSB 1 ++ #define Si2158_STATUS_ATVINT_MASK 0x01 ++ #define Si2158_STATUS_ATVINT_NOT_TRIGGERED 0 ++ #define Si2158_STATUS_ATVINT_TRIGGERED 1 ++ /* STATUS, DTVINT field definition (address 0, size 1, lsb 2, unsigned)*/ ++ #define Si2158_STATUS_DTVINT_LSB 2 ++ #define Si2158_STATUS_DTVINT_MASK 0x01 ++ #define Si2158_STATUS_DTVINT_NOT_TRIGGERED 0 ++ #define Si2158_STATUS_DTVINT_TRIGGERED 1 ++ /* STATUS, ERR field definition (address 0, size 1, lsb 6, unsigned)*/ ++ #define Si2158_STATUS_ERR_LSB 6 ++ #define Si2158_STATUS_ERR_MASK 0x01 ++ #define Si2158_STATUS_ERR_ERROR 1 ++ #define Si2158_STATUS_ERR_NO_ERROR 0 ++ /* STATUS, CTS field definition (address 0, size 1, lsb 7, unsigned)*/ ++ #define Si2158_STATUS_CTS_LSB 7 ++ #define Si2158_STATUS_CTS_MASK 0x01 ++ #define Si2158_STATUS_CTS_COMPLETED 1 ++ #define Si2158_STATUS_CTS_WAIT 0 ++ ++/* _status_defines_insertion_point */ ++ ++/* _commands_defines_insertion_start */ ++/* Si2158_AGC_OVERRIDE command definition */ ++#define Si2158_AGC_OVERRIDE_CMD 0x44 ++ ++#ifdef Si2158_AGC_OVERRIDE_CMD ++ #define Si2158_AGC_OVERRIDE_CMD_CODE 0x010044 ++ ++ typedef struct { /* Si2158_AGC_OVERRIDE_CMD_struct */ ++ unsigned char force_max_gain; ++ unsigned char force_top_gain; ++ } Si2158_AGC_OVERRIDE_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_AGC_OVERRIDE_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_AGC_OVERRIDE_CMD_REPLY_struct; ++ ++ /* AGC_OVERRIDE command, FORCE_MAX_GAIN field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_LSB 0 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_MASK 0x01 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_MIN 0 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_MAX 1 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_DISABLE 0 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_ENABLE 1 ++ /* AGC_OVERRIDE command, FORCE_TOP_GAIN field definition (address 1,size 1, lsb 1, unsigned) */ ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_LSB 1 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_MASK 0x01 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_MIN 0 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_MAX 1 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_DISABLE 0 ++ #define Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_ENABLE 1 ++#endif /* Si2158_AGC_OVERRIDE_CMD */ ++ ++/* Si2158_ATV_CW_TEST command definition */ ++#define Si2158_ATV_CW_TEST_CMD 0x53 ++ ++#ifdef Si2158_ATV_CW_TEST_CMD ++ #define Si2158_ATV_CW_TEST_CMD_CODE 0x010053 ++ ++ typedef struct { /* Si2158_ATV_CW_TEST_CMD_struct */ ++ unsigned char pc_lock; ++ } Si2158_ATV_CW_TEST_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_ATV_CW_TEST_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_ATV_CW_TEST_CMD_REPLY_struct; ++ ++ /* ATV_CW_TEST command, PC_LOCK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_ATV_CW_TEST_CMD_PC_LOCK_LSB 0 ++ #define Si2158_ATV_CW_TEST_CMD_PC_LOCK_MASK 0x01 ++ #define Si2158_ATV_CW_TEST_CMD_PC_LOCK_MIN 0 ++ #define Si2158_ATV_CW_TEST_CMD_PC_LOCK_MAX 1 ++ #define Si2158_ATV_CW_TEST_CMD_PC_LOCK_LOCK 1 ++ #define Si2158_ATV_CW_TEST_CMD_PC_LOCK_UNLOCK 0 ++#endif /* Si2158_ATV_CW_TEST_CMD */ ++ ++/* Si2158_ATV_RESTART command definition */ ++#define Si2158_ATV_RESTART_CMD 0x51 ++ ++#ifdef Si2158_ATV_RESTART_CMD ++ #define Si2158_ATV_RESTART_CMD_CODE 0x010051 ++ ++ typedef struct { /* Si2158_ATV_RESTART_CMD_struct */ ++ unsigned char nothing; } Si2158_ATV_RESTART_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_ATV_RESTART_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_ATV_RESTART_CMD_REPLY_struct; ++ ++#endif /* Si2158_ATV_RESTART_CMD */ ++ ++/* Si2158_ATV_STATUS command definition */ ++#define Si2158_ATV_STATUS_CMD 0x52 ++ ++#ifdef Si2158_ATV_STATUS_CMD ++ #define Si2158_ATV_STATUS_CMD_CODE 0x010052 ++ ++ typedef struct { /* Si2158_ATV_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2158_ATV_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_ATV_STATUS_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char chlint; ++ unsigned char pclint; ++ unsigned char chl; ++ unsigned char pcl; ++ int afc_freq; ++ unsigned char video_sys; ++ unsigned char color; ++ } Si2158_ATV_STATUS_CMD_REPLY_struct; ++ ++ /* ATV_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_ATV_STATUS_CMD_INTACK_LSB 0 ++ #define Si2158_ATV_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2158_ATV_STATUS_CMD_INTACK_MIN 0 ++ #define Si2158_ATV_STATUS_CMD_INTACK_MAX 1 ++ #define Si2158_ATV_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2158_ATV_STATUS_CMD_INTACK_OK 0 ++ /* ATV_STATUS command, CHLINT field definition (address 1, size 1, lsb 0, unsigned)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_CHLINT_LSB 0 ++ #define Si2158_ATV_STATUS_RESPONSE_CHLINT_MASK 0x01 ++ #define Si2158_ATV_STATUS_RESPONSE_CHLINT_CHANGED 1 ++ #define Si2158_ATV_STATUS_RESPONSE_CHLINT_NO_CHANGE 0 ++ /* ATV_STATUS command, PCLINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_PCLINT_LSB 1 ++ #define Si2158_ATV_STATUS_RESPONSE_PCLINT_MASK 0x01 ++ #define Si2158_ATV_STATUS_RESPONSE_PCLINT_CHANGED 1 ++ #define Si2158_ATV_STATUS_RESPONSE_PCLINT_NO_CHANGE 0 ++ /* ATV_STATUS command, CHL field definition (address 2, size 1, lsb 0, unsigned)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_CHL_LSB 0 ++ #define Si2158_ATV_STATUS_RESPONSE_CHL_MASK 0x01 ++ #define Si2158_ATV_STATUS_RESPONSE_CHL_CHANNEL 1 ++ #define Si2158_ATV_STATUS_RESPONSE_CHL_NO_CHANNEL 0 ++ /* ATV_STATUS command, PCL field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_PCL_LSB 1 ++ #define Si2158_ATV_STATUS_RESPONSE_PCL_MASK 0x01 ++ #define Si2158_ATV_STATUS_RESPONSE_PCL_LOCKED 1 ++ #define Si2158_ATV_STATUS_RESPONSE_PCL_NO_LOCK 0 ++ /* ATV_STATUS command, AFC_FREQ field definition (address 4, size 16, lsb 0, signed)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_AFC_FREQ_LSB 0 ++ #define Si2158_ATV_STATUS_RESPONSE_AFC_FREQ_MASK 0xffff ++ #define Si2158_ATV_STATUS_RESPONSE_AFC_FREQ_SHIFT 16 ++ /* ATV_STATUS command, VIDEO_SYS field definition (address 8, size 3, lsb 0, unsigned)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_LSB 0 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_MASK 0x07 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_B 0 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_DK 5 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_GH 1 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_I 4 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_L 6 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_LP 7 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_M 2 ++ #define Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_N 3 ++ /* ATV_STATUS command, COLOR field definition (address 8, size 1, lsb 4, unsigned)*/ ++ #define Si2158_ATV_STATUS_RESPONSE_COLOR_LSB 4 ++ #define Si2158_ATV_STATUS_RESPONSE_COLOR_MASK 0x01 ++ #define Si2158_ATV_STATUS_RESPONSE_COLOR_PAL_NTSC 0 ++ #define Si2158_ATV_STATUS_RESPONSE_COLOR_SECAM 1 ++ ++#endif /* Si2158_ATV_STATUS_CMD */ ++ ++/* Si2158_CONFIG_CLOCKS command definition */ ++#define Si2158_CONFIG_CLOCKS_CMD 0xc0 ++ ++#ifdef Si2158_CONFIG_CLOCKS_CMD ++ #define Si2158_CONFIG_CLOCKS_CMD_CODE 0x0100c0 ++ ++ typedef struct { /* Si2158_CONFIG_CLOCKS_CMD_struct */ ++ unsigned char subcode; ++ unsigned char clock_mode; ++ unsigned char en_xout; ++ } Si2158_CONFIG_CLOCKS_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_CONFIG_CLOCKS_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_CONFIG_CLOCKS_CMD_REPLY_struct; ++ ++ /* CONFIG_CLOCKS command, SUBCODE field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_CLOCKS_CMD_SUBCODE_LSB 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_SUBCODE_MASK 0xff ++ #define Si2158_CONFIG_CLOCKS_CMD_SUBCODE_MIN 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_SUBCODE_MAX 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_SUBCODE_CODE 0 ++ /* CONFIG_CLOCKS command, CLOCK_MODE field definition (address 2,size 2, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_LSB 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_MASK 0x03 ++ #define Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_MIN 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_MAX 2 ++ #define Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_EXTCLK 2 ++ #define Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_XTAL 0 ++ /* CONFIG_CLOCKS command, EN_XOUT field definition (address 2,size 3, lsb 2, unsigned) */ ++ #define Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_LSB 2 ++ #define Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_MASK 0x07 ++ #define Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_MIN 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_MAX 3 ++ #define Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_DIS_XOUT 0 ++ #define Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_EN_XOUT 3 ++#endif /* Si2158_CONFIG_CLOCKS_CMD */ ++ ++/* Si2158_CONFIG_PINS command definition */ ++#define Si2158_CONFIG_PINS_CMD 0x12 ++ ++#ifdef Si2158_CONFIG_PINS_CMD ++ #define Si2158_CONFIG_PINS_CMD_CODE 0x010012 ++ ++ typedef struct { /* Si2158_CONFIG_PINS_CMD_struct */ ++ unsigned char gpio1_mode; ++ unsigned char gpio1_read; ++ unsigned char gpio2_mode; ++ unsigned char gpio2_read; ++ unsigned char reserved1; ++ unsigned char reserved2; ++ unsigned char reserved3; ++ } Si2158_CONFIG_PINS_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_CONFIG_PINS_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char gpio1_mode; ++ unsigned char gpio1_state; ++ unsigned char gpio2_mode; ++ unsigned char gpio2_state; ++ unsigned char reserved1; ++ unsigned char reserved2; ++ unsigned char reserved3; ++ } Si2158_CONFIG_PINS_CMD_REPLY_struct; ++ ++ /* CONFIG_PINS command, GPIO1_MODE field definition (address 1,size 7, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_LSB 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_MASK 0x7f ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_MIN 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_MAX 3 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_DISABLE 1 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_DRIVE_0 2 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_DRIVE_1 3 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_MODE_NO_CHANGE 0 ++ /* CONFIG_PINS command, GPIO1_READ field definition (address 1,size 1, lsb 7, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_READ_LSB 7 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_READ_MASK 0x01 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_READ_MIN 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_READ_MAX 1 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_READ_DO_NOT_READ 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO1_READ_READ 1 ++ /* CONFIG_PINS command, GPIO2_MODE field definition (address 2,size 7, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_LSB 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_MASK 0x7f ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_MIN 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_MAX 3 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_DISABLE 1 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_DRIVE_0 2 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_DRIVE_1 3 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_MODE_NO_CHANGE 0 ++ /* CONFIG_PINS command, GPIO2_READ field definition (address 2,size 1, lsb 7, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_READ_LSB 7 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_READ_MASK 0x01 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_READ_MIN 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_READ_MAX 1 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_READ_DO_NOT_READ 0 ++ #define Si2158_CONFIG_PINS_CMD_GPIO2_READ_READ 1 ++ /* CONFIG_PINS command, RESERVED1 field definition (address 3,size 8, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_RESERVED1_LSB 0 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED1_MASK 0xff ++ #define Si2158_CONFIG_PINS_CMD_RESERVED1_MIN 1 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED1_MAX 1 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED1_RESERVED 1 ++ /* CONFIG_PINS command, RESERVED2 field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_RESERVED2_LSB 0 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED2_MASK 0xff ++ #define Si2158_CONFIG_PINS_CMD_RESERVED2_MIN 1 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED2_MAX 1 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED2_RESERVED 1 ++ /* CONFIG_PINS command, RESERVED3 field definition (address 5,size 8, lsb 0, unsigned) */ ++ #define Si2158_CONFIG_PINS_CMD_RESERVED3_LSB 0 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED3_MASK 0xff ++ #define Si2158_CONFIG_PINS_CMD_RESERVED3_MIN 1 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED3_MAX 1 ++ #define Si2158_CONFIG_PINS_CMD_RESERVED3_RESERVED 1 ++ /* CONFIG_PINS command, GPIO1_MODE field definition (address 1, size 7, lsb 0, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_LSB 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_MASK 0x7f ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_DISABLE 1 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_DRIVE_0 2 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_DRIVE_1 3 ++ /* CONFIG_PINS command, GPIO1_STATE field definition (address 1, size 1, lsb 7, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_STATE_LSB 7 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_STATE_MASK 0x01 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_STATE_READ_0 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO1_STATE_READ_1 1 ++ /* CONFIG_PINS command, GPIO2_MODE field definition (address 2, size 7, lsb 0, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_LSB 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_MASK 0x7f ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_DISABLE 1 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_DRIVE_0 2 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_DRIVE_1 3 ++ /* CONFIG_PINS command, GPIO2_STATE field definition (address 2, size 1, lsb 7, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_STATE_LSB 7 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_STATE_MASK 0x01 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_STATE_READ_0 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_GPIO2_STATE_READ_1 1 ++ /* CONFIG_PINS command, RESERVED1 field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED1_LSB 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED1_MASK 0xff ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED1_RESERVED1_MIN 1 ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED1_RESERVED1_MAX 1 ++ /* CONFIG_PINS command, RESERVED2 field definition (address 4, size 8, lsb 0, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED2_LSB 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED2_MASK 0xff ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED2_RESERVED2_MIN 1 ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED2_RESERVED2_MAX 1 ++ /* CONFIG_PINS command, RESERVED3 field definition (address 5, size 8, lsb 0, unsigned)*/ ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED3_LSB 0 ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED3_MASK 0xff ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED3_RESERVED3_MIN 1 ++ #define Si2158_CONFIG_PINS_RESPONSE_RESERVED3_RESERVED3_MAX 1 ++ ++#endif /* Si2158_CONFIG_PINS_CMD */ ++ ++/* Si2158_DTV_RESTART command definition */ ++#define Si2158_DTV_RESTART_CMD 0x61 ++ ++#ifdef Si2158_DTV_RESTART_CMD ++ #define Si2158_DTV_RESTART_CMD_CODE 0x010061 ++ ++ typedef struct { /* Si2158_DTV_RESTART_CMD_struct */ ++ unsigned char nothing; } Si2158_DTV_RESTART_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_DTV_RESTART_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_DTV_RESTART_CMD_REPLY_struct; ++ ++#endif /* Si2158_DTV_RESTART_CMD */ ++ ++/* Si2158_DTV_STATUS command definition */ ++#define Si2158_DTV_STATUS_CMD 0x62 ++ ++#ifdef Si2158_DTV_STATUS_CMD ++ #define Si2158_DTV_STATUS_CMD_CODE 0x010062 ++ ++ typedef struct { /* Si2158_DTV_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2158_DTV_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_DTV_STATUS_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char chlint; ++ unsigned char chl; ++ unsigned char bw; ++ unsigned char modulation; ++ } Si2158_DTV_STATUS_CMD_REPLY_struct; ++ ++ /* DTV_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_DTV_STATUS_CMD_INTACK_LSB 0 ++ #define Si2158_DTV_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2158_DTV_STATUS_CMD_INTACK_MIN 0 ++ #define Si2158_DTV_STATUS_CMD_INTACK_MAX 1 ++ #define Si2158_DTV_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2158_DTV_STATUS_CMD_INTACK_OK 0 ++ /* DTV_STATUS command, CHLINT field definition (address 1, size 1, lsb 0, unsigned)*/ ++ #define Si2158_DTV_STATUS_RESPONSE_CHLINT_LSB 0 ++ #define Si2158_DTV_STATUS_RESPONSE_CHLINT_MASK 0x01 ++ #define Si2158_DTV_STATUS_RESPONSE_CHLINT_CHANGED 1 ++ #define Si2158_DTV_STATUS_RESPONSE_CHLINT_NO_CHANGE 0 ++ /* DTV_STATUS command, CHL field definition (address 2, size 1, lsb 0, unsigned)*/ ++ #define Si2158_DTV_STATUS_RESPONSE_CHL_LSB 0 ++ #define Si2158_DTV_STATUS_RESPONSE_CHL_MASK 0x01 ++ #define Si2158_DTV_STATUS_RESPONSE_CHL_CHANNEL 1 ++ #define Si2158_DTV_STATUS_RESPONSE_CHL_NO_CHANNEL 0 ++ /* DTV_STATUS command, BW field definition (address 3, size 4, lsb 0, unsigned)*/ ++ #define Si2158_DTV_STATUS_RESPONSE_BW_LSB 0 ++ #define Si2158_DTV_STATUS_RESPONSE_BW_MASK 0x0f ++ #define Si2158_DTV_STATUS_RESPONSE_BW_BW_6MHZ 6 ++ #define Si2158_DTV_STATUS_RESPONSE_BW_BW_7MHZ 7 ++ #define Si2158_DTV_STATUS_RESPONSE_BW_BW_8MHZ 8 ++ /* DTV_STATUS command, MODULATION field definition (address 3, size 4, lsb 4, unsigned)*/ ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_LSB 4 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_MASK 0x0f ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_ATSC 0 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_DTMB 6 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_DVBC 3 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_DVBT 2 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_ISDBC 5 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_ISDBT 4 ++ #define Si2158_DTV_STATUS_RESPONSE_MODULATION_QAM_US 1 ++ ++#endif /* Si2158_DTV_STATUS_CMD */ ++ ++/* Si2158_EXIT_BOOTLOADER command definition */ ++#define Si2158_EXIT_BOOTLOADER_CMD 0x01 ++ ++#ifdef Si2158_EXIT_BOOTLOADER_CMD ++ #define Si2158_EXIT_BOOTLOADER_CMD_CODE 0x010001 ++ ++ typedef struct { /* Si2158_EXIT_BOOTLOADER_CMD_struct */ ++ unsigned char func; ++ unsigned char ctsien; ++ } Si2158_EXIT_BOOTLOADER_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_EXIT_BOOTLOADER_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_EXIT_BOOTLOADER_CMD_REPLY_struct; ++ ++ /* EXIT_BOOTLOADER command, FUNC field definition (address 1,size 4, lsb 0, unsigned) */ ++ #define Si2158_EXIT_BOOTLOADER_CMD_FUNC_LSB 0 ++ #define Si2158_EXIT_BOOTLOADER_CMD_FUNC_MASK 0x0f ++ #define Si2158_EXIT_BOOTLOADER_CMD_FUNC_MIN 0 ++ #define Si2158_EXIT_BOOTLOADER_CMD_FUNC_MAX 1 ++ #define Si2158_EXIT_BOOTLOADER_CMD_FUNC_BOOTLOADER 0 ++ #define Si2158_EXIT_BOOTLOADER_CMD_FUNC_TUNER 1 ++ /* EXIT_BOOTLOADER command, CTSIEN field definition (address 1,size 1, lsb 7, unsigned) */ ++ #define Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_LSB 7 ++ #define Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_MASK 0x01 ++ #define Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_MIN 0 ++ #define Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_MAX 1 ++ #define Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_OFF 0 ++ #define Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_ON 1 ++#endif /* Si2158_EXIT_BOOTLOADER_CMD */ ++ ++/* Si2158_FINE_TUNE command definition */ ++#define Si2158_FINE_TUNE_CMD 0x45 ++ ++#ifdef Si2158_FINE_TUNE_CMD ++ #define Si2158_FINE_TUNE_CMD_CODE 0x010045 ++ ++ typedef struct { /* Si2158_FINE_TUNE_CMD_struct */ ++ unsigned char persistence; ++ unsigned char apply_to_lif; ++ int offset_500hz; ++ } Si2158_FINE_TUNE_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_FINE_TUNE_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_FINE_TUNE_CMD_REPLY_struct; ++ ++ /* FINE_TUNE command, PERSISTENCE field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_FINE_TUNE_CMD_PERSISTENCE_LSB 0 ++ #define Si2158_FINE_TUNE_CMD_PERSISTENCE_MASK 0x01 ++ #define Si2158_FINE_TUNE_CMD_PERSISTENCE_MIN 0 ++ #define Si2158_FINE_TUNE_CMD_PERSISTENCE_MAX 1 ++ #define Si2158_FINE_TUNE_CMD_PERSISTENCE_NON_PERSISTENT 0 ++ #define Si2158_FINE_TUNE_CMD_PERSISTENCE_PERSISTENT 1 ++ /* FINE_TUNE command, APPLY_TO_LIF field definition (address 1,size 1, lsb 1, unsigned) */ ++ #define Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_LSB 1 ++ #define Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_MASK 0x01 ++ #define Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_MIN 0 ++ #define Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_MAX 1 ++ #define Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_APPLY_TO_LIF 1 ++ #define Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_DO_NOT_APPLY_TO_LIF 0 ++ /* FINE_TUNE command, OFFSET_500HZ field definition (address 2,size 16, lsb 0, signed) */ ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_LSB 0 ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MASK 0xffff ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_SHIFT 16 ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MIN -4000 ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MAX 4000 ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_OFFSET_500HZ_MIN -4000 ++ #define Si2158_FINE_TUNE_CMD_OFFSET_500HZ_OFFSET_500HZ_MAX 4000 ++#endif /* Si2158_FINE_TUNE_CMD */ ++ ++/* Si2158_GET_PROPERTY command definition */ ++#define Si2158_GET_PROPERTY_CMD 0x15 ++ ++#ifdef Si2158_GET_PROPERTY_CMD ++ #define Si2158_GET_PROPERTY_CMD_CODE 0x010015 ++ ++ typedef struct { /* Si2158_GET_PROPERTY_CMD_struct */ ++ unsigned char reserved; ++ unsigned int prop; ++ } Si2158_GET_PROPERTY_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_GET_PROPERTY_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char reserved; ++ unsigned int data; ++ } Si2158_GET_PROPERTY_CMD_REPLY_struct; ++ ++ /* GET_PROPERTY command, RESERVED field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2158_GET_PROPERTY_CMD_RESERVED_LSB 0 ++ #define Si2158_GET_PROPERTY_CMD_RESERVED_MASK 0xff ++ #define Si2158_GET_PROPERTY_CMD_RESERVED_MIN 0 ++ #define Si2158_GET_PROPERTY_CMD_RESERVED_MAX 0 ++ #define Si2158_GET_PROPERTY_CMD_RESERVED_RESERVED_MIN 0 ++ #define Si2158_GET_PROPERTY_CMD_RESERVED_RESERVED_MAX 0 ++ /* GET_PROPERTY command, PROP field definition (address 2,size 16, lsb 0, unsigned) */ ++ #define Si2158_GET_PROPERTY_CMD_PROP_LSB 0 ++ #define Si2158_GET_PROPERTY_CMD_PROP_MASK 0xffff ++ #define Si2158_GET_PROPERTY_CMD_PROP_MIN 0 ++ #define Si2158_GET_PROPERTY_CMD_PROP_MAX 65535 ++ #define Si2158_GET_PROPERTY_CMD_PROP_PROP_MIN 0 ++ #define Si2158_GET_PROPERTY_CMD_PROP_PROP_MAX 65535 ++ /* GET_PROPERTY command, RESERVED field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_PROPERTY_RESPONSE_RESERVED_LSB 0 ++ #define Si2158_GET_PROPERTY_RESPONSE_RESERVED_MASK 0xff ++ /* GET_PROPERTY command, DATA field definition (address 2, size 16, lsb 0, unsigned)*/ ++ #define Si2158_GET_PROPERTY_RESPONSE_DATA_LSB 0 ++ #define Si2158_GET_PROPERTY_RESPONSE_DATA_MASK 0xffff ++ ++#endif /* Si2158_GET_PROPERTY_CMD */ ++ ++/* Si2158_GET_REV command definition */ ++#define Si2158_GET_REV_CMD 0x11 ++ ++#ifdef Si2158_GET_REV_CMD ++ #define Si2158_GET_REV_CMD_CODE 0x010011 ++ ++ typedef struct { /* Si2158_GET_REV_CMD_struct */ ++ unsigned char nothing; } Si2158_GET_REV_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_GET_REV_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char pn; ++ unsigned char fwmajor; ++ unsigned char fwminor; ++ unsigned int patch; ++ unsigned char cmpmajor; ++ unsigned char cmpminor; ++ unsigned char cmpbuild; ++ unsigned char chiprev; ++ } Si2158_GET_REV_CMD_REPLY_struct; ++ ++ /* GET_REV command, PN field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_PN_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_PN_MASK 0xff ++ /* GET_REV command, FWMAJOR field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_FWMAJOR_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_FWMAJOR_MASK 0xff ++ /* GET_REV command, FWMINOR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_FWMINOR_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_FWMINOR_MASK 0xff ++ /* GET_REV command, PATCH field definition (address 4, size 16, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_PATCH_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_PATCH_MASK 0xffff ++ /* GET_REV command, CMPMAJOR field definition (address 6, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_CMPMAJOR_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_CMPMAJOR_MASK 0xff ++ /* GET_REV command, CMPMINOR field definition (address 7, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_CMPMINOR_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_CMPMINOR_MASK 0xff ++ /* GET_REV command, CMPBUILD field definition (address 8, size 8, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_CMPBUILD_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_CMPBUILD_MASK 0xff ++ #define Si2158_GET_REV_RESPONSE_CMPBUILD_CMPBUILD_MIN 0 ++ #define Si2158_GET_REV_RESPONSE_CMPBUILD_CMPBUILD_MAX 255 ++ /* GET_REV command, CHIPREV field definition (address 9, size 4, lsb 0, unsigned)*/ ++ #define Si2158_GET_REV_RESPONSE_CHIPREV_LSB 0 ++ #define Si2158_GET_REV_RESPONSE_CHIPREV_MASK 0x0f ++ #define Si2158_GET_REV_RESPONSE_CHIPREV_A 1 ++ #define Si2158_GET_REV_RESPONSE_CHIPREV_B 2 ++ ++#endif /* Si2158_GET_REV_CMD */ ++ ++/* Si2158_PART_INFO command definition */ ++#define Si2158_PART_INFO_CMD 0x02 ++ ++#ifdef Si2158_PART_INFO_CMD ++ #define Si2158_PART_INFO_CMD_CODE 0x010002 ++ ++ typedef struct { /* Si2158_PART_INFO_CMD_struct */ ++ unsigned char nothing; } Si2158_PART_INFO_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_PART_INFO_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char chiprev; ++ unsigned char romid; ++ unsigned char part; ++ unsigned char pmajor; ++ unsigned char pminor; ++ unsigned char pbuild; ++ unsigned int reserved; ++ unsigned long serial; ++ } Si2158_PART_INFO_CMD_REPLY_struct; ++ ++ /* PART_INFO command, CHIPREV field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_CHIPREV_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_CHIPREV_MASK 0x0f ++ #define Si2158_PART_INFO_RESPONSE_CHIPREV_A 1 ++ #define Si2158_PART_INFO_RESPONSE_CHIPREV_B 2 ++ /* PART_INFO command, ROMID field definition (address 12, size 8, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_ROMID_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_ROMID_MASK 0xff ++ /* PART_INFO command, PART field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_PART_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_PART_MASK 0xff ++ /* PART_INFO command, PMAJOR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_PMAJOR_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_PMAJOR_MASK 0xff ++ /* PART_INFO command, PMINOR field definition (address 4, size 8, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_PMINOR_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_PMINOR_MASK 0xff ++ /* PART_INFO command, PBUILD field definition (address 5, size 8, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_PBUILD_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_PBUILD_MASK 0xff ++ /* PART_INFO command, RESERVED field definition (address 6, size 16, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_RESERVED_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_RESERVED_MASK 0xffff ++ /* PART_INFO command, SERIAL field definition (address 8, size 32, lsb 0, unsigned)*/ ++ #define Si2158_PART_INFO_RESPONSE_SERIAL_LSB 0 ++ #define Si2158_PART_INFO_RESPONSE_SERIAL_MASK 0xffffffff ++ ++#endif /* Si2158_PART_INFO_CMD */ ++ ++/* Si2158_POWER_DOWN command definition */ ++#define Si2158_POWER_DOWN_CMD 0x13 ++ ++#ifdef Si2158_POWER_DOWN_CMD ++ #define Si2158_POWER_DOWN_CMD_CODE 0x010013 ++ ++ typedef struct { /* Si2158_POWER_DOWN_CMD_struct */ ++ unsigned char nothing; } Si2158_POWER_DOWN_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_POWER_DOWN_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_POWER_DOWN_CMD_REPLY_struct; ++ ++#endif /* Si2158_POWER_DOWN_CMD */ ++ ++/* Si2158_POWER_DOWN_HW command definition */ ++#define Si2158_POWER_DOWN_HW_CMD 0xc0 ++ ++#ifdef Si2158_POWER_DOWN_HW_CMD ++ #define Si2158_POWER_DOWN_HW_CMD_CODE 0x0200c0 ++ ++ typedef struct { /* Si2158_POWER_DOWN_HW_CMD_struct */ ++ unsigned char subcode; ++ unsigned char pd_xo_osc; ++ unsigned char reserved1; ++ unsigned char en_xout; ++ unsigned char reserved2; ++ unsigned char pd_ldo; ++ unsigned char reserved3; ++ unsigned char reserved4; ++ unsigned char reserved5; ++ unsigned char reserved6; ++ unsigned char reserved7; ++ unsigned char reserved8; ++ } Si2158_POWER_DOWN_HW_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_POWER_DOWN_HW_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_POWER_DOWN_HW_CMD_REPLY_struct; ++ ++ /* POWER_DOWN_HW command, SUBCODE field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_SUBCODE_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_SUBCODE_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_SUBCODE_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_SUBCODE_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_SUBCODE_CODE 0 ++ /* POWER_DOWN_HW command, PD_XO_OSC field definition (address 2,size 1, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_MASK 0x01 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_MAX 1 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_XO_OSC_POWER_DOWN 1 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_XO_OSC_POWER_UP 0 ++ /* POWER_DOWN_HW command, RESERVED1 field definition (address 2,size 1, lsb 1, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED1_LSB 1 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED1_MASK 0x01 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED1_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED1_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED1_RESERVED 0 ++ /* POWER_DOWN_HW command, EN_XOUT field definition (address 2,size 3, lsb 2, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_EN_XOUT_LSB 2 ++ #define Si2158_POWER_DOWN_HW_CMD_EN_XOUT_MASK 0x07 ++ #define Si2158_POWER_DOWN_HW_CMD_EN_XOUT_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_EN_XOUT_MAX 3 ++ #define Si2158_POWER_DOWN_HW_CMD_EN_XOUT_DIS_XOUT 0 ++ #define Si2158_POWER_DOWN_HW_CMD_EN_XOUT_EN_XOUT 3 ++ /* POWER_DOWN_HW command, RESERVED2 field definition (address 2,size 4, lsb 4, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED2_LSB 4 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED2_MASK 0x0f ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED2_MIN 1 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED2_MAX 1 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED2_RESERVED 1 ++ /* POWER_DOWN_HW command, PD_LDO field definition (address 3,size 1, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_PD_LDO_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_LDO_MASK 0x01 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_LDO_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_LDO_MAX 1 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_LDO_LDO_POWER_DOWN 1 ++ #define Si2158_POWER_DOWN_HW_CMD_PD_LDO_LDO_POWER_UP 0 ++ /* POWER_DOWN_HW command, RESERVED3 field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED3_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED3_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED3_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED3_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED3_RESERVED 0 ++ /* POWER_DOWN_HW command, RESERVED4 field definition (address 5,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED4_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED4_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED4_MIN 1 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED4_MAX 1 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED4_RESERVED 1 ++ /* POWER_DOWN_HW command, RESERVED5 field definition (address 6,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED5_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED5_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED5_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED5_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED5_RESERVED 0 ++ /* POWER_DOWN_HW command, RESERVED6 field definition (address 7,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED6_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED6_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED6_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED6_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED6_RESERVED 0 ++ /* POWER_DOWN_HW command, RESERVED7 field definition (address 8,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED7_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED7_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED7_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED7_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED7_RESERVED 0 ++ /* POWER_DOWN_HW command, RESERVED8 field definition (address 9,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED8_LSB 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED8_MASK 0xff ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED8_MIN 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED8_MAX 0 ++ #define Si2158_POWER_DOWN_HW_CMD_RESERVED8_RESERVED 0 ++#endif /* Si2158_POWER_DOWN_HW_CMD */ ++ ++/* Si2158_POWER_UP command definition */ ++#define Si2158_POWER_UP_CMD 0xc0 ++ ++#ifdef Si2158_POWER_UP_CMD ++ #define Si2158_POWER_UP_CMD_CODE 0x0300c0 ++ ++ typedef struct { /* Si2158_POWER_UP_CMD_struct */ ++ unsigned char subcode; ++ unsigned char clock_mode; ++ unsigned char en_xout; ++ unsigned char pd_ldo; ++ unsigned char reserved2; ++ unsigned char reserved3; ++ unsigned char reserved4; ++ unsigned char reserved5; ++ unsigned char reserved6; ++ unsigned char reserved7; ++ unsigned char reset; ++ unsigned char clock_freq; ++ unsigned char reserved8; ++ unsigned char func; ++ unsigned char ctsien; ++ unsigned char wake_up; ++ } Si2158_POWER_UP_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_POWER_UP_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_POWER_UP_CMD_REPLY_struct; ++ ++ /* POWER_UP command, SUBCODE field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_SUBCODE_LSB 0 ++ #define Si2158_POWER_UP_CMD_SUBCODE_MASK 0xff ++ #define Si2158_POWER_UP_CMD_SUBCODE_MIN 0 ++ #define Si2158_POWER_UP_CMD_SUBCODE_MAX 0 ++ #define Si2158_POWER_UP_CMD_SUBCODE_CODE 0 ++ /* POWER_UP command, CLOCK_MODE field definition (address 2,size 2, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_CLOCK_MODE_LSB 0 ++ #define Si2158_POWER_UP_CMD_CLOCK_MODE_MASK 0x03 ++ #define Si2158_POWER_UP_CMD_CLOCK_MODE_MIN 0 ++ #define Si2158_POWER_UP_CMD_CLOCK_MODE_MAX 2 ++ #define Si2158_POWER_UP_CMD_CLOCK_MODE_EXTCLK 2 ++ #define Si2158_POWER_UP_CMD_CLOCK_MODE_XTAL 0 ++ /* POWER_UP command, EN_XOUT field definition (address 2,size 3, lsb 2, unsigned) */ ++ #define Si2158_POWER_UP_CMD_EN_XOUT_LSB 2 ++ #define Si2158_POWER_UP_CMD_EN_XOUT_MASK 0x07 ++ #define Si2158_POWER_UP_CMD_EN_XOUT_MIN 0 ++ #define Si2158_POWER_UP_CMD_EN_XOUT_MAX 3 ++ #define Si2158_POWER_UP_CMD_EN_XOUT_DIS_XOUT 0 ++ #define Si2158_POWER_UP_CMD_EN_XOUT_EN_XOUT 3 ++ /* POWER_UP command, PD_LDO field definition (address 3,size 1, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_PD_LDO_LSB 0 ++ #define Si2158_POWER_UP_CMD_PD_LDO_MASK 0x01 ++ #define Si2158_POWER_UP_CMD_PD_LDO_MIN 0 ++ #define Si2158_POWER_UP_CMD_PD_LDO_MAX 1 ++ #define Si2158_POWER_UP_CMD_PD_LDO_LDO_POWER_DOWN 1 ++ #define Si2158_POWER_UP_CMD_PD_LDO_LDO_POWER_UP 0 ++ /* POWER_UP command, RESERVED2 field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED2_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED2_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED2_MIN 0 ++ #define Si2158_POWER_UP_CMD_RESERVED2_MAX 0 ++ #define Si2158_POWER_UP_CMD_RESERVED2_RESERVED 0 ++ /* POWER_UP command, RESERVED3 field definition (address 5,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED3_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED3_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED3_MIN 1 ++ #define Si2158_POWER_UP_CMD_RESERVED3_MAX 1 ++ #define Si2158_POWER_UP_CMD_RESERVED3_RESERVED 1 ++ /* POWER_UP command, RESERVED4 field definition (address 6,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED4_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED4_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED4_MIN 1 ++ #define Si2158_POWER_UP_CMD_RESERVED4_MAX 1 ++ #define Si2158_POWER_UP_CMD_RESERVED4_RESERVED 1 ++ /* POWER_UP command, RESERVED5 field definition (address 7,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED5_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED5_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED5_MIN 1 ++ #define Si2158_POWER_UP_CMD_RESERVED5_MAX 1 ++ #define Si2158_POWER_UP_CMD_RESERVED5_RESERVED 1 ++ /* POWER_UP command, RESERVED6 field definition (address 8,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED6_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED6_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED6_MIN 1 ++ #define Si2158_POWER_UP_CMD_RESERVED6_MAX 1 ++ #define Si2158_POWER_UP_CMD_RESERVED6_RESERVED 1 ++ /* POWER_UP command, RESERVED7 field definition (address 9,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED7_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED7_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED7_MIN 1 ++ #define Si2158_POWER_UP_CMD_RESERVED7_MAX 1 ++ #define Si2158_POWER_UP_CMD_RESERVED7_RESERVED 1 ++ /* POWER_UP command, RESET field definition (address 10,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESET_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESET_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESET_MIN 1 ++ #define Si2158_POWER_UP_CMD_RESET_MAX 1 ++ #define Si2158_POWER_UP_CMD_RESET_RESET 1 ++ /* POWER_UP command, CLOCK_FREQ field definition (address 11,size 2, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_CLOCK_FREQ_LSB 0 ++ #define Si2158_POWER_UP_CMD_CLOCK_FREQ_MASK 0x03 ++ #define Si2158_POWER_UP_CMD_CLOCK_FREQ_MIN 0 ++ #define Si2158_POWER_UP_CMD_CLOCK_FREQ_MAX 3 ++ #define Si2158_POWER_UP_CMD_CLOCK_FREQ_CLK_24MHZ 2 ++ /* POWER_UP command, RESERVED8 field definition (address 12,size 8, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_RESERVED8_LSB 0 ++ #define Si2158_POWER_UP_CMD_RESERVED8_MASK 0xff ++ #define Si2158_POWER_UP_CMD_RESERVED8_MIN 0 ++ #define Si2158_POWER_UP_CMD_RESERVED8_MAX 0 ++ #define Si2158_POWER_UP_CMD_RESERVED8_RESERVED 0 ++ /* POWER_UP command, FUNC field definition (address 13,size 4, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_FUNC_LSB 0 ++ #define Si2158_POWER_UP_CMD_FUNC_MASK 0x0f ++ #define Si2158_POWER_UP_CMD_FUNC_MIN 0 ++ #define Si2158_POWER_UP_CMD_FUNC_MAX 1 ++ #define Si2158_POWER_UP_CMD_FUNC_BOOTLOADER 0 ++ #define Si2158_POWER_UP_CMD_FUNC_NORMAL 1 ++ /* POWER_UP command, CTSIEN field definition (address 13,size 1, lsb 7, unsigned) */ ++ #define Si2158_POWER_UP_CMD_CTSIEN_LSB 7 ++ #define Si2158_POWER_UP_CMD_CTSIEN_MASK 0x01 ++ #define Si2158_POWER_UP_CMD_CTSIEN_MIN 0 ++ #define Si2158_POWER_UP_CMD_CTSIEN_MAX 1 ++ #define Si2158_POWER_UP_CMD_CTSIEN_DISABLE 0 ++ #define Si2158_POWER_UP_CMD_CTSIEN_ENABLE 1 ++ /* POWER_UP command, WAKE_UP field definition (address 14,size 1, lsb 0, unsigned) */ ++ #define Si2158_POWER_UP_CMD_WAKE_UP_LSB 0 ++ #define Si2158_POWER_UP_CMD_WAKE_UP_MASK 0x01 ++ #define Si2158_POWER_UP_CMD_WAKE_UP_MIN 1 ++ #define Si2158_POWER_UP_CMD_WAKE_UP_MAX 1 ++ #define Si2158_POWER_UP_CMD_WAKE_UP_WAKE_UP 1 ++#endif /* Si2158_POWER_UP_CMD */ ++ ++/* Si2158_SET_PROPERTY command definition */ ++#define Si2158_SET_PROPERTY_CMD 0x14 ++ ++#ifdef Si2158_SET_PROPERTY_CMD ++ #define Si2158_SET_PROPERTY_CMD_CODE 0x010014 ++ ++ typedef struct { /* Si2158_SET_PROPERTY_CMD_struct */ ++ unsigned char reserved; ++ unsigned int prop; ++ unsigned int data; ++ } Si2158_SET_PROPERTY_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_SET_PROPERTY_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char reserved; ++ unsigned int data; ++ } Si2158_SET_PROPERTY_CMD_REPLY_struct; ++ ++ /* SET_PROPERTY command, RESERVED field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2158_SET_PROPERTY_CMD_RESERVED_LSB 0 ++ #define Si2158_SET_PROPERTY_CMD_RESERVED_MASK 0xff ++ #define Si2158_SET_PROPERTY_CMD_RESERVED_MIN 0 ++ #define Si2158_SET_PROPERTY_CMD_RESERVED_MAX 255.0 ++ /* SET_PROPERTY command, PROP field definition (address 2,size 16, lsb 0, unsigned) */ ++ #define Si2158_SET_PROPERTY_CMD_PROP_LSB 0 ++ #define Si2158_SET_PROPERTY_CMD_PROP_MASK 0xffff ++ #define Si2158_SET_PROPERTY_CMD_PROP_MIN 0 ++ #define Si2158_SET_PROPERTY_CMD_PROP_MAX 65535 ++ #define Si2158_SET_PROPERTY_CMD_PROP_PROP_MIN 0 ++ #define Si2158_SET_PROPERTY_CMD_PROP_PROP_MAX 65535 ++ /* SET_PROPERTY command, DATA field definition (address 4,size 16, lsb 0, unsigned) */ ++ #define Si2158_SET_PROPERTY_CMD_DATA_LSB 0 ++ #define Si2158_SET_PROPERTY_CMD_DATA_MASK 0xffff ++ #define Si2158_SET_PROPERTY_CMD_DATA_MIN 0 ++ #define Si2158_SET_PROPERTY_CMD_DATA_MAX 65535 ++ #define Si2158_SET_PROPERTY_CMD_DATA_DATA_MIN 0 ++ #define Si2158_SET_PROPERTY_CMD_DATA_DATA_MAX 65535 ++ /* SET_PROPERTY command, RESERVED field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2158_SET_PROPERTY_RESPONSE_RESERVED_LSB 0 ++ #define Si2158_SET_PROPERTY_RESPONSE_RESERVED_MASK 0xff ++ #define Si2158_SET_PROPERTY_RESPONSE_RESERVED_RESERVED_MIN 0 ++ #define Si2158_SET_PROPERTY_RESPONSE_RESERVED_RESERVED_MAX 0 ++ /* SET_PROPERTY command, DATA field definition (address 2, size 16, lsb 0, unsigned)*/ ++ #define Si2158_SET_PROPERTY_RESPONSE_DATA_LSB 0 ++ #define Si2158_SET_PROPERTY_RESPONSE_DATA_MASK 0xffff ++ ++#endif /* Si2158_SET_PROPERTY_CMD */ ++ ++/* Si2158_STANDBY command definition */ ++#define Si2158_STANDBY_CMD 0x16 ++ ++#ifdef Si2158_STANDBY_CMD ++ #define Si2158_STANDBY_CMD_CODE 0x010016 ++ ++ typedef struct { /* Si2158_STANDBY_CMD_struct */ ++ unsigned char type; ++ } Si2158_STANDBY_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_STANDBY_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_STANDBY_CMD_REPLY_struct; ++ ++ /* STANDBY command, TYPE field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_STANDBY_CMD_TYPE_LSB 0 ++ #define Si2158_STANDBY_CMD_TYPE_MASK 0x01 ++ #define Si2158_STANDBY_CMD_TYPE_MIN 0 ++ #define Si2158_STANDBY_CMD_TYPE_MAX 1 ++ #define Si2158_STANDBY_CMD_TYPE_LNA_OFF 1 ++ #define Si2158_STANDBY_CMD_TYPE_LNA_ON 0 ++#endif /* Si2158_STANDBY_CMD */ ++ ++/* Si2158_TUNER_STATUS command definition */ ++#define Si2158_TUNER_STATUS_CMD 0x42 ++ ++#ifdef Si2158_TUNER_STATUS_CMD ++ #define Si2158_TUNER_STATUS_CMD_CODE 0x010042 ++ ++ typedef struct { /* Si2158_TUNER_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2158_TUNER_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_TUNER_STATUS_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ unsigned char tcint; ++ unsigned char rssilint; ++ unsigned char rssihint; ++ int vco_code; ++ unsigned char tc; ++ unsigned char rssil; ++ unsigned char rssih; ++ char rssi; ++ unsigned long freq; ++ unsigned char mode; ++ } Si2158_TUNER_STATUS_CMD_REPLY_struct; ++ ++ /* TUNER_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_TUNER_STATUS_CMD_INTACK_LSB 0 ++ #define Si2158_TUNER_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2158_TUNER_STATUS_CMD_INTACK_MIN 0 ++ #define Si2158_TUNER_STATUS_CMD_INTACK_MAX 1 ++ #define Si2158_TUNER_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2158_TUNER_STATUS_CMD_INTACK_OK 0 ++ /* TUNER_STATUS command, TCINT field definition (address 1, size 1, lsb 0, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_TCINT_LSB 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_TCINT_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_TCINT_CHANGED 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_TCINT_NO_CHANGE 0 ++ /* TUNER_STATUS command, RSSILINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSILINT_LSB 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSILINT_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSILINT_CHANGED 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSILINT_NO_CHANGE 0 ++ /* TUNER_STATUS command, RSSIHINT field definition (address 1, size 1, lsb 2, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIHINT_LSB 2 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIHINT_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIHINT_CHANGED 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIHINT_NO_CHANGE 0 ++ /* TUNER_STATUS command, VCO_CODE field definition (address 10, size 16, lsb 0, signed)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_VCO_CODE_LSB 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_VCO_CODE_MASK 0xffff ++ #define Si2158_TUNER_STATUS_RESPONSE_VCO_CODE_SHIFT 16 ++ /* TUNER_STATUS command, TC field definition (address 2, size 1, lsb 0, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_TC_LSB 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_TC_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_TC_BUSY 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_TC_DONE 1 ++ /* TUNER_STATUS command, RSSIL field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIL_LSB 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIL_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIL_LOW 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIL_OK 0 ++ /* TUNER_STATUS command, RSSIH field definition (address 2, size 1, lsb 2, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIH_LSB 2 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIH_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIH_HIGH 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSIH_OK 0 ++ /* TUNER_STATUS command, RSSI field definition (address 3, size 8, lsb 0, signed)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSI_LSB 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSI_MASK 0xff ++ #define Si2158_TUNER_STATUS_RESPONSE_RSSI_SHIFT 24 ++ /* TUNER_STATUS command, FREQ field definition (address 4, size 32, lsb 0, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_FREQ_LSB 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_FREQ_MASK 0xffffffff ++ /* TUNER_STATUS command, MODE field definition (address 8, size 1, lsb 0, unsigned)*/ ++ #define Si2158_TUNER_STATUS_RESPONSE_MODE_LSB 0 ++ #define Si2158_TUNER_STATUS_RESPONSE_MODE_MASK 0x01 ++ #define Si2158_TUNER_STATUS_RESPONSE_MODE_ATV 1 ++ #define Si2158_TUNER_STATUS_RESPONSE_MODE_DTV 0 ++ ++#endif /* Si2158_TUNER_STATUS_CMD */ ++ ++/* Si2158_TUNER_TUNE_FREQ command definition */ ++#define Si2158_TUNER_TUNE_FREQ_CMD 0x41 ++ ++#ifdef Si2158_TUNER_TUNE_FREQ_CMD ++ #define Si2158_TUNER_TUNE_FREQ_CMD_CODE 0x010041 ++ ++ typedef struct { /* Si2158_TUNER_TUNE_FREQ_CMD_struct */ ++ unsigned char mode; ++ unsigned long freq; ++ } Si2158_TUNER_TUNE_FREQ_CMD_struct; ++ ++ ++ typedef struct { /* Si2158_TUNER_TUNE_FREQ_CMD_REPLY_struct */ ++ Si2158_COMMON_REPLY_struct * STATUS; ++ } Si2158_TUNER_TUNE_FREQ_CMD_REPLY_struct; ++ ++ /* TUNER_TUNE_FREQ command, MODE field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2158_TUNER_TUNE_FREQ_CMD_MODE_LSB 0 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_MODE_MASK 0x01 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_MODE_MIN 0 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_MODE_MAX 1 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_MODE_ATV 1 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_MODE_DTV 0 ++ /* TUNER_TUNE_FREQ command, FREQ field definition (address 4,size 32, lsb 0, unsigned) */ ++ #define Si2158_TUNER_TUNE_FREQ_CMD_FREQ_LSB 0 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MASK 0xffffffff ++ #define Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MIN 40000000 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MAX 1002000000 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_FREQ_FREQ_MIN 40000000 ++ #define Si2158_TUNER_TUNE_FREQ_CMD_FREQ_FREQ_MAX 1002000000 ++#endif /* Si2158_TUNER_TUNE_FREQ_CMD */ ++ ++/* _commands_defines_insertion_point */ ++ ++/* _commands_struct_insertion_start */ ++ ++ /* --------------------------------------------*/ ++ /* COMMANDS STRUCT */ ++ /* This is used to store all command fields */ ++ /* --------------------------------------------*/ ++ typedef struct { /* Si2158_CmdObj struct */ ++ #ifdef Si2158_AGC_OVERRIDE_CMD ++ Si2158_AGC_OVERRIDE_CMD_struct agc_override; ++ #endif /* Si2158_AGC_OVERRIDE_CMD */ ++ #ifdef Si2158_ATV_CW_TEST_CMD ++ Si2158_ATV_CW_TEST_CMD_struct atv_cw_test; ++ #endif /* Si2158_ATV_CW_TEST_CMD */ ++ #ifdef Si2158_ATV_RESTART_CMD ++ Si2158_ATV_RESTART_CMD_struct atv_restart; ++ #endif /* Si2158_ATV_RESTART_CMD */ ++ #ifdef Si2158_ATV_STATUS_CMD ++ Si2158_ATV_STATUS_CMD_struct atv_status; ++ #endif /* Si2158_ATV_STATUS_CMD */ ++ #ifdef Si2158_CONFIG_CLOCKS_CMD ++ Si2158_CONFIG_CLOCKS_CMD_struct config_clocks; ++ #endif /* Si2158_CONFIG_CLOCKS_CMD */ ++ #ifdef Si2158_CONFIG_PINS_CMD ++ Si2158_CONFIG_PINS_CMD_struct config_pins; ++ #endif /* Si2158_CONFIG_PINS_CMD */ ++ #ifdef Si2158_DTV_RESTART_CMD ++ Si2158_DTV_RESTART_CMD_struct dtv_restart; ++ #endif /* Si2158_DTV_RESTART_CMD */ ++ #ifdef Si2158_DTV_STATUS_CMD ++ Si2158_DTV_STATUS_CMD_struct dtv_status; ++ #endif /* Si2158_DTV_STATUS_CMD */ ++ #ifdef Si2158_EXIT_BOOTLOADER_CMD ++ Si2158_EXIT_BOOTLOADER_CMD_struct exit_bootloader; ++ #endif /* Si2158_EXIT_BOOTLOADER_CMD */ ++ #ifdef Si2158_FINE_TUNE_CMD ++ Si2158_FINE_TUNE_CMD_struct fine_tune; ++ #endif /* Si2158_FINE_TUNE_CMD */ ++ #ifdef Si2158_GET_PROPERTY_CMD ++ Si2158_GET_PROPERTY_CMD_struct get_property; ++ #endif /* Si2158_GET_PROPERTY_CMD */ ++ #ifdef Si2158_GET_REV_CMD ++ Si2158_GET_REV_CMD_struct get_rev; ++ #endif /* Si2158_GET_REV_CMD */ ++ #ifdef Si2158_PART_INFO_CMD ++ Si2158_PART_INFO_CMD_struct part_info; ++ #endif /* Si2158_PART_INFO_CMD */ ++ #ifdef Si2158_POWER_DOWN_CMD ++ Si2158_POWER_DOWN_CMD_struct power_down; ++ #endif /* Si2158_POWER_DOWN_CMD */ ++ #ifdef Si2158_POWER_DOWN_HW_CMD ++ Si2158_POWER_DOWN_HW_CMD_struct power_down_hw; ++ #endif /* Si2158_POWER_DOWN_HW_CMD */ ++ #ifdef Si2158_POWER_UP_CMD ++ Si2158_POWER_UP_CMD_struct power_up; ++ #endif /* Si2158_POWER_UP_CMD */ ++ #ifdef Si2158_SET_PROPERTY_CMD ++ Si2158_SET_PROPERTY_CMD_struct set_property; ++ #endif /* Si2158_SET_PROPERTY_CMD */ ++ #ifdef Si2158_STANDBY_CMD ++ Si2158_STANDBY_CMD_struct standby; ++ #endif /* Si2158_STANDBY_CMD */ ++ #ifdef Si2158_TUNER_STATUS_CMD ++ Si2158_TUNER_STATUS_CMD_struct tuner_status; ++ #endif /* Si2158_TUNER_STATUS_CMD */ ++ #ifdef Si2158_TUNER_TUNE_FREQ_CMD ++ Si2158_TUNER_TUNE_FREQ_CMD_struct tuner_tune_freq; ++ #endif /* Si2158_TUNER_TUNE_FREQ_CMD */ ++ } Si2158_CmdObj; ++/* _commands_struct_insertion_point */ ++ ++/* _commands_reply_struct_insertion_start */ ++ ++ /* --------------------------------------------*/ ++ /* COMMANDS REPLY STRUCT */ ++ /* This stores all command reply fields */ ++ /* --------------------------------------------*/ ++ typedef struct { /* Si2158_CmdReplyObj struct */ ++ #ifdef Si2158_AGC_OVERRIDE_CMD ++ Si2158_AGC_OVERRIDE_CMD_REPLY_struct agc_override; ++ #endif /* Si2158_AGC_OVERRIDE_CMD */ ++ #ifdef Si2158_ATV_CW_TEST_CMD ++ Si2158_ATV_CW_TEST_CMD_REPLY_struct atv_cw_test; ++ #endif /* Si2158_ATV_CW_TEST_CMD */ ++ #ifdef Si2158_ATV_RESTART_CMD ++ Si2158_ATV_RESTART_CMD_REPLY_struct atv_restart; ++ #endif /* Si2158_ATV_RESTART_CMD */ ++ #ifdef Si2158_ATV_STATUS_CMD ++ Si2158_ATV_STATUS_CMD_REPLY_struct atv_status; ++ #endif /* Si2158_ATV_STATUS_CMD */ ++ #ifdef Si2158_CONFIG_CLOCKS_CMD ++ Si2158_CONFIG_CLOCKS_CMD_REPLY_struct config_clocks; ++ #endif /* Si2158_CONFIG_CLOCKS_CMD */ ++ #ifdef Si2158_CONFIG_PINS_CMD ++ Si2158_CONFIG_PINS_CMD_REPLY_struct config_pins; ++ #endif /* Si2158_CONFIG_PINS_CMD */ ++ #ifdef Si2158_DTV_RESTART_CMD ++ Si2158_DTV_RESTART_CMD_REPLY_struct dtv_restart; ++ #endif /* Si2158_DTV_RESTART_CMD */ ++ #ifdef Si2158_DTV_STATUS_CMD ++ Si2158_DTV_STATUS_CMD_REPLY_struct dtv_status; ++ #endif /* Si2158_DTV_STATUS_CMD */ ++ #ifdef Si2158_EXIT_BOOTLOADER_CMD ++ Si2158_EXIT_BOOTLOADER_CMD_REPLY_struct exit_bootloader; ++ #endif /* Si2158_EXIT_BOOTLOADER_CMD */ ++ #ifdef Si2158_FINE_TUNE_CMD ++ Si2158_FINE_TUNE_CMD_REPLY_struct fine_tune; ++ #endif /* Si2158_FINE_TUNE_CMD */ ++ #ifdef Si2158_GET_PROPERTY_CMD ++ Si2158_GET_PROPERTY_CMD_REPLY_struct get_property; ++ #endif /* Si2158_GET_PROPERTY_CMD */ ++ #ifdef Si2158_GET_REV_CMD ++ Si2158_GET_REV_CMD_REPLY_struct get_rev; ++ #endif /* Si2158_GET_REV_CMD */ ++ #ifdef Si2158_PART_INFO_CMD ++ Si2158_PART_INFO_CMD_REPLY_struct part_info; ++ #endif /* Si2158_PART_INFO_CMD */ ++ #ifdef Si2158_POWER_DOWN_CMD ++ Si2158_POWER_DOWN_CMD_REPLY_struct power_down; ++ #endif /* Si2158_POWER_DOWN_CMD */ ++ #ifdef Si2158_POWER_DOWN_HW_CMD ++ Si2158_POWER_DOWN_HW_CMD_REPLY_struct power_down_hw; ++ #endif /* Si2158_POWER_DOWN_HW_CMD */ ++ #ifdef Si2158_POWER_UP_CMD ++ Si2158_POWER_UP_CMD_REPLY_struct power_up; ++ #endif /* Si2158_POWER_UP_CMD */ ++ #ifdef Si2158_SET_PROPERTY_CMD ++ Si2158_SET_PROPERTY_CMD_REPLY_struct set_property; ++ #endif /* Si2158_SET_PROPERTY_CMD */ ++ #ifdef Si2158_STANDBY_CMD ++ Si2158_STANDBY_CMD_REPLY_struct standby; ++ #endif /* Si2158_STANDBY_CMD */ ++ #ifdef Si2158_TUNER_STATUS_CMD ++ Si2158_TUNER_STATUS_CMD_REPLY_struct tuner_status; ++ #endif /* Si2158_TUNER_STATUS_CMD */ ++ #ifdef Si2158_TUNER_TUNE_FREQ_CMD ++ Si2158_TUNER_TUNE_FREQ_CMD_REPLY_struct tuner_tune_freq; ++ #endif /* Si2158_TUNER_TUNE_FREQ_CMD */ ++ } Si2158_CmdReplyObj; ++/* _commands_reply_struct_insertion_point */ ++ ++#ifdef Si2158_COMMAND_PROTOTYPES ++#define Si2158_GET_COMMAND_STRINGS ++#endif /* Si2158_COMMAND_PROTOTYPES */ ++ ++#endif /* Si2158_COMMANDS_H */ ++ ++ ++ ++ ++ +diff -urN a/drivers/media/dvb-frontends/si2158_firmware_0_E_build_15.h b/drivers/media/dvb-frontends/si2158_firmware_0_E_build_15.h +--- a/drivers/media/dvb-frontends/si2158_firmware_0_E_build_15.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2158_firmware_0_E_build_15.h 2013-02-14 22:56:01.000000000 +0800 +@@ -0,0 +1,1549 @@ ++#ifndef _SI2158_FIRMWARE_0_E_BUILD_15_H_ ++#define _SI2158_FIRMWARE_0_E_BUILD_15_H_ ++ ++#define FIRMWARE_MAJOR 0 ++#define FIRMWARE_MINOR E ++#define BUILD_VERSION 15 ++ ++unsigned char Si2158_FW_0_Eb15[] = { ++0x04,0x01,0x80,0x00,0xCC,0x58,0x98,0xD7, ++0x05,0xD3,0x99,0xC6,0xB2,0xBD,0x68,0x8B, ++0x05,0xDF,0xB3,0x1B,0x73,0x9E,0xAA,0x51, ++0x27,0xCF,0xF6,0x6C,0xCD,0xDD,0x5E,0x64, ++0x22,0xEB,0x8D,0x75,0xC2,0x4A,0xA8,0xFB, ++0x0F,0x04,0x3A,0x48,0x7C,0xCF,0x5A,0x5A, ++0x27,0x4B,0x3E,0x35,0x0D,0xBA,0xE9,0x2A, ++0x29,0x50,0x14,0x34,0xC1,0xD7,0x08,0x8B, ++0x07,0x1F,0xA0,0x69,0xFB,0xBD,0xA5,0x46, ++0x2E,0xF3,0xF8,0xBB,0xFD,0xC9,0x64,0xCB, ++0x0F,0x7E,0x43,0xA7,0xAA,0x87,0x5E,0x3B, ++0x2F,0x41,0xAB,0xE6,0xB5,0x5D,0xF0,0x86, ++0x2B,0x16,0x7D,0x1A,0x4C,0x72,0x68,0xFB, ++0x07,0x17,0x87,0x60,0x3C,0x6D,0x0C,0x60, ++0x26,0x8C,0xCD,0xE5,0x90,0x80,0x5C,0x53, ++0x07,0x6E,0xA1,0x0F,0x6A,0xBE,0x0D,0x3B, ++0x2F,0x15,0xB8,0x23,0xED,0x6D,0x1A,0xDE, ++0x24,0x6F,0xE7,0x95,0x1E,0x6F,0x9A,0x85, ++0x0F,0xE4,0x4F,0x35,0xA8,0xE6,0x37,0xBF, ++0x22,0x76,0xD4,0x39,0x4C,0xFA,0x73,0x59, ++0x0F,0xD6,0xB4,0xF1,0x43,0x6B,0xCE,0xF1, ++0x2A,0xE2,0xF6,0xC6,0x39,0x39,0x82,0x2A, ++0x0F,0xB9,0xF6,0x5D,0xD6,0x3C,0x25,0x17, ++0x2F,0x0C,0x63,0x24,0xC6,0xF1,0xB1,0x37, ++0x2F,0xF9,0xA4,0xED,0x41,0xD0,0xCA,0xED, ++0x23,0xD4,0x9D,0x4A,0xAB,0xF1,0x81,0x3C, ++0x07,0x79,0xF8,0xA4,0xB4,0x71,0x25,0xCE, ++0x2F,0xCC,0x0A,0x0C,0x1D,0x0F,0x79,0x1F, ++0x2F,0x2A,0xB8,0x84,0xE2,0x43,0x4E,0x1B, ++0x26,0xAA,0x6B,0x06,0x2B,0xB1,0x6F,0xB2, ++0x0F,0x12,0x4F,0xCB,0x29,0x04,0xFB,0xD0, ++0x25,0x3E,0xE7,0x17,0x64,0xF1,0x47,0xC0, ++0x0F,0x8F,0x43,0x9F,0x23,0x2A,0x50,0x36, ++0x2A,0x6C,0x03,0xD7,0x29,0x87,0xA5,0x99, ++0x07,0xC3,0x49,0x0D,0x73,0x77,0x0C,0xC6, ++0x07,0x3A,0x8E,0x3D,0x75,0xB8,0x48,0x55, ++0x0F,0xAB,0x62,0x72,0x46,0x0D,0xD6,0x80, ++0x27,0x75,0x1F,0x93,0x37,0x7A,0x0D,0x41, ++0x21,0xCB,0xD3,0x31,0x0E,0x28,0x7B,0x26, ++0x0F,0xBA,0x8F,0x86,0xC0,0xE7,0xE1,0x26, ++0x22,0xCD,0xE0,0x65,0x94,0x2F,0xBC,0x19, ++0x07,0x6E,0xDA,0xCB,0x11,0xFE,0x04,0x3B, ++0x22,0xE6,0x08,0x94,0xBC,0x66,0x71,0x25, ++0x07,0x1B,0x30,0xE8,0x18,0xA4,0xAD,0x50, ++0x2D,0xA7,0x33,0x7F,0xD8,0x5B,0xC1,0xFD, ++0x0F,0x5E,0xC5,0x85,0x19,0x54,0xE3,0x7F, ++0x22,0xEA,0x90,0xBB,0xB7,0x7C,0xFB,0xFF, ++0x07,0xE4,0x01,0x5A,0x01,0x51,0x1A,0x47, ++0x27,0xEC,0x3C,0x1D,0x21,0x79,0x16,0x9A, ++0x2C,0xE6,0x0B,0x70,0xDD,0xCC,0x12,0x8A, ++0x0F,0x1D,0x5C,0x4D,0x07,0x1A,0x95,0xE2, ++0x25,0x3C,0x22,0x25,0x82,0xC4,0x59,0xB7, ++0x07,0xDE,0xB8,0xE2,0xF4,0x47,0x47,0xFF, ++0x25,0xDD,0x02,0x19,0x2A,0x45,0xD2,0x31, ++0x0F,0xE3,0xF4,0xAA,0x14,0xEB,0x9D,0xF2, ++0x2F,0x74,0xF7,0x2B,0xD1,0xB6,0x18,0xFF, ++0x2F,0xDD,0x9C,0x99,0x0A,0x21,0x99,0x8E, ++0x23,0x3C,0x04,0x20,0xAC,0x1A,0xC5,0xCD, ++0x07,0x73,0xF1,0x31,0x2C,0x44,0x58,0x74, ++0x2F,0xEC,0x1B,0xB1,0x7B,0xAD,0x76,0x32, ++0x29,0x35,0xAF,0xE2,0x21,0x09,0xB4,0x79, ++0x07,0x66,0xC5,0xA6,0x16,0xCB,0xE9,0x5C, ++0x27,0xB5,0x4F,0xE6,0xE9,0x19,0x5E,0x25, ++0x27,0x72,0x69,0x1C,0xFB,0x30,0xE6,0xB3, ++0x0F,0xFB,0xA9,0x53,0x94,0x2A,0x75,0x61, ++0x25,0x66,0x1E,0xE7,0xC9,0x9D,0x79,0xF5, ++0x0F,0x73,0x01,0x7F,0xE9,0x0C,0x7E,0xED, ++0x2A,0xDF,0x41,0x2E,0x2D,0x50,0x72,0xC3, ++0x0F,0x49,0xDE,0xAB,0xBC,0xF8,0x8D,0x55, ++0x27,0xE6,0x18,0xE6,0x07,0xF1,0x84,0xE2, ++0x29,0x7B,0xA1,0x1E,0x13,0x4E,0xE7,0x3C, ++0x07,0xA3,0x01,0xEB,0x93,0xB2,0x36,0x16, ++0x0F,0xD3,0x86,0x31,0x67,0x4A,0xB0,0x79, ++0x07,0x01,0xD4,0x98,0x17,0x16,0xF3,0xB4, ++0x25,0xFD,0x6F,0xF1,0xDA,0x9A,0xBA,0x06, ++0x07,0x8D,0xD3,0xD6,0xFC,0xD9,0xD6,0x02, ++0x2A,0xF1,0x24,0x79,0xC5,0x25,0xBD,0xE1, ++0x07,0xB5,0xA7,0x60,0xBB,0xD5,0x39,0x5A, ++0x0F,0x08,0xA1,0x96,0xCB,0x4F,0x93,0x52, ++0x0F,0x6C,0x82,0xC2,0xE0,0x02,0x04,0x70, ++0x2A,0xB5,0x75,0x46,0x6E,0xDF,0x04,0x40, ++0x0F,0xF3,0xF7,0xD4,0xFB,0x54,0x68,0x5C, ++0x27,0x97,0xCB,0x54,0x5C,0x63,0x88,0xDF, ++0x27,0xF0,0x16,0x41,0x54,0xE0,0xF6,0xFC, ++0x27,0x1B,0x1D,0x50,0xE8,0x99,0x3C,0x0E, ++0x22,0x48,0xCB,0x3F,0xC2,0x7B,0x1E,0xF7, ++0x07,0x78,0xDA,0x29,0x4D,0xB9,0xBE,0x4C, ++0x2F,0x62,0x65,0x80,0x4B,0x86,0x44,0xC4, ++0x29,0x38,0x47,0x9D,0xEF,0x1D,0xC7,0x7C, ++0x07,0xB6,0x36,0x2D,0x07,0x57,0x4F,0x32, ++0x07,0x1F,0xB4,0xC3,0x7E,0xC3,0xD3,0xB0, ++0x0F,0x8E,0x90,0x8D,0xC1,0x1E,0x05,0x05, ++0x2F,0xFC,0x8C,0x2A,0x7E,0x9B,0x7E,0x72, ++0x2C,0xAB,0xE9,0xEF,0x08,0xF6,0x5B,0x24, ++0x07,0x48,0x19,0xA9,0x76,0x95,0x8A,0x75, ++0x2A,0x1F,0x74,0x4C,0xE6,0x81,0x61,0x4B, ++0x0F,0xA5,0xFF,0x5F,0x77,0x1C,0x7A,0x05, ++0x2A,0x47,0xAF,0x53,0x84,0x9B,0xDA,0x3D, ++0x0F,0xC9,0x90,0x35,0xDE,0xE3,0xFB,0xCA, ++0x27,0x99,0x88,0x5F,0xF6,0x47,0x3F,0x26, ++0x2F,0x32,0x4B,0x93,0x94,0x9C,0x6D,0x9A, ++0x0F,0x3E,0xE0,0x43,0x9B,0x46,0x55,0x0C, ++0x2A,0x57,0xF5,0x67,0x7B,0x16,0xC7,0x91, ++0x0F,0x2D,0xA7,0x3A,0x1F,0xE5,0x9C,0x84, ++0x25,0xE9,0x7F,0xC0,0xD4,0xE6,0xAA,0xA2, ++0x07,0x51,0xC0,0x9F,0x11,0xD9,0x05,0x50, ++0x07,0x58,0xC8,0x3A,0x83,0xFB,0x65,0x7D, ++0x07,0x8B,0xB2,0xE4,0x8B,0x39,0xFB,0xA4, ++0x2D,0x4B,0x48,0xC4,0x6B,0xF6,0xAC,0x0E, ++0x0F,0x46,0x87,0x58,0x0F,0xFB,0xA1,0x3A, ++0x27,0x8D,0xFF,0x73,0xBF,0xE9,0x1D,0x16, ++0x24,0x18,0xDD,0x33,0x35,0x60,0x5E,0x94, ++0x0F,0xF9,0xC4,0x00,0x32,0xBB,0x04,0x17, ++0x27,0xB6,0x18,0x19,0x23,0xB6,0xA8,0xBB, ++0x27,0xFF,0x27,0x44,0xBC,0x42,0x1B,0x78, ++0x07,0x6B,0x39,0x5D,0x45,0xB4,0x99,0xDC, ++0x22,0x02,0xF2,0x0C,0x5B,0x86,0x2E,0x0B, ++0x0F,0x82,0xB4,0xE3,0x91,0x47,0xE0,0x47, ++0x2A,0x02,0x13,0x80,0x76,0x73,0x28,0x9F, ++0x0F,0x87,0x3E,0xC7,0x4A,0x1D,0x7F,0x21, ++0x27,0xD7,0x2F,0xA5,0x7B,0xDF,0xFD,0x46, ++0x2C,0x5C,0x60,0xE9,0x8B,0x8B,0x1E,0xF4, ++0x07,0xDB,0x26,0x02,0x2F,0x35,0x81,0x69, ++0x22,0x56,0x17,0x3C,0xCB,0x13,0xAF,0x71, ++0x0F,0x9E,0x4A,0xAB,0x85,0x80,0x02,0x3B, ++0x2A,0xFC,0xE2,0x0D,0x2F,0x81,0xC3,0xD9, ++0x07,0x2A,0x59,0xF2,0x81,0x2C,0x6B,0xED, ++0x2F,0x17,0x1F,0x1B,0xE3,0x8A,0x3A,0x8D, ++0x2C,0xE8,0x24,0x30,0x5D,0x2E,0x79,0xFE, ++0x0F,0x8C,0x0E,0xC7,0xB7,0x8D,0x24,0xC0, ++0x07,0xEB,0xB0,0x26,0xE6,0xF0,0x46,0xB5, ++0x0F,0x4F,0xD0,0xF8,0x1F,0xBD,0x70,0x55, ++0x2A,0xF3,0x7E,0xD6,0x1B,0x12,0x69,0x5D, ++0x0F,0x8F,0x1A,0x10,0x2B,0x88,0x30,0xA9, ++0x2F,0xB8,0xF3,0xA4,0x06,0x07,0x29,0xFF, ++0x2F,0x01,0x43,0xD6,0xB0,0xC4,0x3B,0xEC, ++0x0F,0x27,0x05,0x37,0x3A,0x70,0x03,0x61, ++0x22,0xF4,0xBE,0xC4,0x2C,0x24,0xEC,0xF7, ++0x0F,0xA6,0x55,0x01,0x56,0x83,0xA9,0x0C, ++0x2F,0x6D,0x58,0xF4,0xCE,0x3F,0xEE,0xEB, ++0x27,0x36,0xDB,0x2E,0xDB,0xA1,0x19,0x15, ++0x2B,0xF0,0xC1,0x61,0xEB,0x69,0x33,0xFC, ++0x0F,0xF2,0x3F,0xCF,0xE7,0xB8,0x7A,0x36, ++0x27,0x8D,0x3C,0xF0,0x2B,0x96,0x53,0x87, ++0x27,0xC4,0x34,0xD0,0x97,0xCF,0x09,0x6D, ++0x27,0x80,0x27,0xF4,0x16,0x02,0xC6,0x68, ++0x22,0x59,0x26,0x8B,0xCD,0x33,0x5B,0x33, ++0x07,0x7F,0x1A,0x77,0x2E,0xAD,0xA6,0x73, ++0x2F,0xF4,0x63,0x96,0xD2,0xC7,0x82,0x50, ++0x2F,0x2D,0xA5,0x04,0xF7,0xD3,0x95,0x52, ++0x2F,0x72,0x8D,0x25,0xCC,0xDA,0x7D,0x15, ++0x27,0xD3,0xA9,0x03,0x1A,0xAC,0xE1,0x1B, ++0x2F,0xD4,0x0B,0x66,0x6A,0xBB,0xD1,0xDB, ++0x27,0xDE,0x79,0xC3,0x56,0x99,0x90,0x74, ++0x27,0xF1,0x5E,0x6B,0xFD,0x9A,0x55,0xD0, ++0x27,0xD0,0x78,0xF9,0x49,0x29,0x87,0xCD, ++0x2F,0x02,0x98,0xC9,0x89,0x58,0x3B,0x6C, ++0x27,0xC7,0x35,0x07,0x08,0x8B,0x12,0xE4, ++0x2F,0x41,0x54,0x4A,0xBB,0x0D,0x53,0x13, ++0x2F,0x37,0xC7,0x6D,0x6C,0x0A,0xE6,0xE0, ++0x2F,0x68,0x30,0x30,0xD6,0x96,0x51,0x09, ++0x2F,0x31,0x8A,0x38,0x0D,0xA6,0xFE,0x4C, ++0x2F,0x6E,0x44,0x89,0x42,0x4C,0x2D,0x62, ++0x27,0xED,0x16,0x32,0x0F,0x43,0x91,0xF2, ++0x2F,0x06,0x9B,0xBC,0x98,0x0F,0xA4,0xFC, ++0x2F,0x81,0x46,0x60,0x37,0x7F,0xBA,0xB2, ++0x21,0x64,0x93,0x15,0xFE,0x15,0x6B,0x4D, ++0x0F,0xC8,0x53,0xAF,0x7D,0x4A,0x0F,0xAE, ++0x2F,0x03,0xFD,0x13,0x13,0xFD,0xB9,0xB5, ++0x27,0xB5,0x5C,0x7E,0x14,0xD4,0x31,0xB1, ++0x2F,0x56,0xF3,0x70,0xA0,0xE3,0x20,0xD2, ++0x2F,0xB8,0xA8,0x39,0x36,0x23,0x9F,0x8E, ++0x27,0x01,0x83,0xB8,0x38,0x6B,0x54,0x59, ++0x2F,0xFC,0x27,0xF8,0xB6,0x5C,0xF5,0x1C, ++0x2F,0x6D,0xD1,0x4D,0x3D,0x57,0x1F,0x63, ++0x27,0xBA,0xDD,0x2E,0x43,0xA6,0xB3,0x8F, ++0x2F,0x8B,0x7A,0x9E,0xF6,0xFD,0x69,0xC2, ++0x26,0x5B,0x45,0x2F,0xA2,0xDA,0x5B,0x5B, ++0x07,0xDE,0xD3,0xDA,0xCB,0x6B,0xD3,0xB3, ++0x07,0xA6,0x63,0xC2,0x67,0x78,0xAC,0xC4, ++0x2F,0xE3,0x75,0xB2,0xC9,0x88,0xB2,0x8E, ++0x27,0x3C,0x34,0x26,0xDE,0x91,0x2C,0xD5, ++0x2F,0xC0,0x91,0x75,0x7D,0xBF,0xEF,0xDF, ++0x27,0x4A,0x25,0x4B,0xB1,0x59,0x2C,0xF7, ++0x27,0xF5,0xFB,0xFD,0x95,0xAD,0x12,0xF2, ++0x27,0xA1,0x6D,0xD6,0xFD,0x80,0x91,0xF6, ++0x27,0x03,0x6F,0xE0,0x8B,0x36,0x58,0xBC, ++0x2F,0x98,0xF2,0x0B,0xE1,0xD1,0x65,0x11, ++0x2F,0x77,0xA5,0x32,0x8E,0x29,0x3D,0x76, ++0x2F,0x90,0x17,0xDA,0x3A,0x62,0xFC,0x57, ++0x27,0x80,0xD9,0x58,0x03,0xAF,0x1A,0xDE, ++0x2F,0xBC,0x01,0xD2,0x74,0xB0,0x3C,0x5A, ++0x2F,0x8A,0x13,0x1D,0x29,0x77,0xBB,0x59, ++0x2F,0x28,0xD9,0xA2,0x28,0xDA,0xBC,0x14, ++0x2F,0xFD,0x1D,0x3B,0xA1,0x58,0xF5,0xCA, ++0x2F,0xE1,0xEA,0x52,0x38,0x8F,0xF0,0x5F, ++0x2F,0xD6,0x2F,0xD2,0x0E,0xB4,0xDF,0x33, ++0x27,0xC8,0x6E,0x63,0x64,0x42,0x28,0x32, ++0x27,0x96,0x44,0xF9,0x47,0x6B,0xC7,0xC7, ++0x22,0xA4,0xF9,0x54,0x66,0x87,0x6A,0xCF, ++0x07,0x8C,0xFF,0x74,0xC5,0x29,0xFF,0xB9, ++0x0F,0x14,0x12,0xD0,0x19,0x2B,0xCF,0x6F, ++0x07,0x8D,0xA1,0x1A,0x4E,0xCC,0xF9,0x79, ++0x0F,0x69,0x19,0x4B,0x70,0x95,0xE0,0x38, ++0x07,0x70,0x85,0x50,0x32,0x42,0xA6,0x38, ++0x07,0xF4,0xE6,0xE4,0x2E,0x17,0xF0,0x51, ++0x0F,0x5B,0x0E,0xE6,0x51,0x3A,0x5E,0x8B, ++0x27,0x0A,0xC1,0x97,0x47,0x25,0x9C,0x11, ++0x27,0x43,0x28,0xCC,0xFD,0xBB,0xD2,0xD9, ++0x27,0xA9,0x84,0x32,0x5A,0x74,0xBA,0xA6, ++0x27,0x65,0x77,0xAD,0x35,0x2D,0xE4,0xCC, ++0x2D,0x1F,0x3F,0xB8,0x31,0x18,0x42,0x99, ++0x0F,0xA7,0x88,0x12,0x1E,0x68,0x48,0x70, ++0x2F,0x12,0x22,0x4F,0x63,0x39,0x19,0x25, ++0x27,0x07,0xCE,0xBF,0x8D,0x8A,0x58,0x55, ++0x27,0x93,0xCF,0x3E,0xB2,0xF1,0xC5,0x0C, ++0x26,0x62,0xD0,0x69,0x81,0x07,0xE1,0xFD, ++0x07,0x21,0x5A,0x26,0x9F,0xCA,0x93,0x31, ++0x2F,0x34,0xFB,0xEB,0xBF,0x07,0xBD,0xF3, ++0x27,0x8C,0x0D,0xE9,0xE4,0xF3,0xAD,0xBB, ++0x25,0xC7,0x5A,0xA0,0xB3,0x09,0xCC,0x9F, ++0x0F,0xDA,0xC1,0xE3,0xCD,0xED,0x60,0xC5, ++0x2E,0xF4,0xC5,0x03,0x26,0xAC,0x7E,0xE0, ++0x0F,0x50,0x8B,0x90,0xF1,0xFB,0x6E,0x58, ++0x0F,0x3C,0x53,0x76,0xFB,0xAA,0x44,0xAD, ++0x0F,0x4B,0xA4,0x5D,0x17,0xC8,0x88,0xE9, ++0x2F,0x9F,0x61,0x47,0x83,0xC9,0x5D,0x95, ++0x2F,0x18,0xA7,0x74,0x2D,0x5D,0x09,0xC4, ++0x27,0x83,0xB7,0xC1,0x23,0xE5,0x9D,0x0B, ++0x2F,0xF2,0x68,0xAF,0xA2,0x10,0xEF,0xC2, ++0x2F,0x96,0xFB,0x85,0x89,0x3D,0xAD,0x09, ++0x27,0xBA,0xF3,0x7B,0xEA,0x0E,0xB7,0xC4, ++0x27,0x36,0xBD,0xC2,0x05,0x47,0xDD,0x23, ++0x2F,0x17,0x09,0x79,0x6E,0xB0,0x69,0x58, ++0x2F,0x13,0xB1,0xFC,0x4D,0x12,0x57,0x30, ++0x2F,0xA8,0x02,0x53,0x7A,0xD8,0x05,0x60, ++0x25,0x98,0xC5,0xAD,0xAF,0x2B,0x9B,0x0E, ++0x07,0x07,0xEB,0xC9,0x7B,0x20,0x62,0xB4, ++0x27,0x68,0xB4,0x0C,0x3C,0x6C,0xB8,0xEC, ++0x0F,0xCF,0x24,0xBF,0xDA,0xC7,0xBE,0x93, ++0x27,0x8D,0xAE,0xA3,0xD0,0x58,0x99,0x3D, ++0x2F,0x50,0x54,0x87,0xFC,0xC5,0xB4,0xF8, ++0x2F,0x68,0xE4,0xD4,0xF3,0x5A,0x3C,0x93, ++0x2F,0xAA,0xE2,0xCD,0xC7,0xCB,0x5D,0xCC, ++0x2F,0x6D,0x0F,0xFA,0xA6,0x26,0xDF,0xBD, ++0x2F,0x55,0x0E,0xAC,0xDF,0x8E,0x4A,0xFF, ++0x27,0xB2,0x31,0xA5,0xEB,0x9E,0x7F,0x5C, ++0x27,0x38,0x96,0x01,0xFE,0x95,0xF2,0xBA, ++0x2D,0xC3,0x24,0xCE,0x2E,0xE6,0xB9,0x9D, ++0x07,0xDF,0xB6,0x66,0xC7,0xC7,0xF0,0xBA, ++0x2F,0x30,0x29,0x65,0xDE,0x39,0x22,0x22, ++0x27,0x6F,0xA4,0x35,0xA1,0x0C,0x80,0x5D, ++0x27,0x8F,0x21,0x3C,0xC1,0x21,0x83,0x0E, ++0x27,0xE1,0x4B,0xC3,0x70,0xA0,0x34,0x0D, ++0x27,0x62,0xF1,0x80,0x17,0x8B,0x88,0xE7, ++0x2F,0x96,0x84,0x5E,0x1A,0xFA,0x32,0x7A, ++0x2F,0xBA,0xF8,0x30,0x2E,0x28,0x29,0x93, ++0x27,0xD8,0x01,0x42,0x89,0x1E,0x59,0xC8, ++0x2F,0xC4,0x8B,0x8D,0x0C,0x2B,0x63,0x6C, ++0x27,0x9F,0xC0,0xFC,0xB3,0xB6,0x6D,0xFF, ++0x2F,0x69,0xC4,0xD7,0xA2,0xD6,0xB6,0x58, ++0x27,0x3E,0x7E,0x81,0x59,0xD9,0x39,0x03, ++0x2F,0x0D,0xFD,0x6C,0x1F,0x69,0x9A,0x4F, ++0x27,0xBB,0x4B,0xD3,0x27,0x83,0x9A,0x82, ++0x2F,0x6C,0x35,0x3E,0xAA,0x42,0xE0,0x83, ++0x27,0xD7,0xE3,0x9C,0x3A,0xBD,0x63,0x1B, ++0x27,0x5F,0x62,0xE9,0x97,0x06,0x7C,0xAF, ++0x2F,0xB1,0x6A,0xAB,0x56,0x8F,0xF5,0x37, ++0x2F,0xD8,0xC2,0x84,0x22,0x37,0xC3,0x68, ++0x2F,0xCE,0x69,0x3E,0x93,0x92,0x25,0x0A, ++0x2F,0x82,0x9B,0x04,0x16,0x62,0x38,0x0D, ++0x2F,0xA5,0x9B,0x08,0xD6,0xD5,0x1A,0xE2, ++0x27,0x58,0x2F,0x61,0xE0,0x3F,0xB3,0x5F, ++0x2F,0x44,0x1F,0x53,0x54,0xB3,0xF0,0x0B, ++0x27,0xC5,0x61,0xD4,0x10,0x23,0x8E,0x53, ++0x27,0x6D,0x70,0xB6,0x8F,0xAB,0xF7,0xF0, ++0x2F,0xF5,0x44,0x86,0x10,0x72,0xB5,0x41, ++0x27,0x86,0xE6,0x0E,0x07,0x44,0xAF,0x42, ++0x27,0x25,0x29,0x60,0x59,0x78,0x39,0xB6, ++0x27,0xC2,0xE2,0x16,0xDD,0xC5,0x4C,0x0E, ++0x27,0x5D,0x77,0x9C,0xA4,0x77,0xC6,0xD3, ++0x27,0x56,0x7A,0xB0,0x94,0x36,0x94,0x71, ++0x27,0xA1,0x00,0x37,0x28,0x8C,0x7E,0x5A, ++0x27,0xFB,0x7B,0x7A,0x2E,0x0C,0x74,0x94, ++0x27,0x98,0x96,0xC0,0x93,0x44,0xC0,0x0E, ++0x2F,0xA2,0x9E,0x73,0xDB,0x28,0x30,0x67, ++0x2B,0x54,0x99,0xA0,0x36,0xFA,0xE0,0x0E, ++0x27,0xA6,0xC7,0x09,0x05,0xF3,0xF6,0x79, ++0x2F,0xE6,0x31,0xFB,0x3B,0xFD,0xC7,0x19, ++0x2F,0x74,0x34,0x09,0x0B,0xCB,0x23,0x0D, ++0x27,0xA1,0xD1,0xE5,0x15,0x2C,0x28,0x1A, ++0x27,0xFF,0x6D,0xF4,0x8A,0xD1,0xBB,0x2F, ++0x2F,0x7C,0x9F,0x73,0x05,0x5A,0xBD,0x6F, ++0x27,0x70,0xFF,0xAA,0xA9,0x5F,0xD8,0xBF, ++0x23,0x11,0xF8,0xEC,0x09,0x7B,0xA3,0xB4, ++0x0F,0x2B,0xCC,0x07,0x26,0x3E,0xAA,0x85, ++0x0F,0x0C,0xD6,0x7F,0x56,0x59,0xA4,0x80, ++0x07,0xD3,0xDB,0x8A,0x83,0x71,0x0B,0xC6, ++0x07,0x9C,0xA8,0x42,0x7C,0x52,0xF7,0x7A, ++0x0F,0x3F,0xC6,0xF6,0x2C,0x76,0xD6,0xF7, ++0x27,0x26,0x93,0x83,0x9F,0xA8,0x19,0x9D, ++0x22,0x4A,0x2E,0x56,0x0C,0x05,0x6A,0xDD, ++0x0F,0x67,0xAC,0xCF,0x70,0x7A,0x99,0x70, ++0x27,0x6A,0x5C,0x33,0xE2,0xFF,0x69,0x1A, ++0x27,0x0A,0xC6,0xED,0x2A,0xEE,0x1E,0xA9, ++0x2F,0x3E,0x76,0xB1,0x0D,0x1F,0xC1,0x09, ++0x27,0x98,0xA7,0xC3,0xB4,0x73,0xD3,0x8C, ++0x2F,0x8D,0x61,0xA8,0xFC,0x20,0x9C,0x71, ++0x2F,0x1E,0xDA,0xC7,0xFD,0x83,0x75,0x34, ++0x27,0x17,0x6F,0x90,0x8C,0x18,0x25,0x1A, ++0x2F,0xCF,0xC6,0x8E,0x96,0xF2,0xDC,0xEA, ++0x2F,0x05,0xC9,0x10,0x99,0xD6,0x99,0x59, ++0x2F,0x1A,0x2D,0x82,0xCF,0xCA,0xE2,0x65, ++0x27,0x3B,0xC2,0x9F,0x09,0x3B,0x8F,0xF4, ++0x27,0x7B,0x26,0x24,0x46,0xDE,0x7B,0x7F, ++0x27,0x6E,0xF2,0xF8,0x68,0xFC,0x68,0xAB, ++0x27,0x1C,0x74,0xA7,0x48,0xB4,0xDE,0x59, ++0x27,0xC2,0xE7,0x18,0x14,0x33,0xAB,0x02, ++0x07,0x01,0x89,0xE7,0x85,0xAB,0xD1,0x19, ++0x2F,0x5A,0x73,0x10,0x0A,0xE1,0x9F,0xF8, ++0x2F,0x33,0x2D,0xC4,0x51,0x73,0x07,0xFC, ++0x2F,0x78,0xFA,0x10,0x5E,0xDA,0x83,0xB8, ++0x27,0x29,0x53,0xC3,0x9B,0x02,0x3B,0x07, ++0x27,0x09,0x7A,0xF4,0xB6,0xFF,0xEC,0x9F, ++0x2F,0x21,0x49,0x40,0x49,0x74,0x99,0xA9, ++0x2F,0x42,0x51,0xFC,0x11,0x11,0x58,0x17, ++0x27,0x5A,0xD1,0x69,0xE9,0xC7,0xC0,0x32, ++0x07,0x70,0x28,0x7C,0x89,0x1F,0x74,0x9E, ++0x2F,0x06,0x06,0x08,0x49,0xD7,0x13,0x4F, ++0x2F,0xD5,0x71,0x5D,0x6F,0x66,0xB4,0x70, ++0x27,0x52,0x6E,0x78,0xB6,0x0C,0x59,0xB8, ++0x2F,0x94,0x84,0x3F,0xEC,0xAE,0x59,0xEC, ++0x2F,0x00,0x66,0x02,0x64,0x73,0xD1,0x86, ++0x27,0x30,0x52,0x96,0x42,0x9E,0x9A,0xD7, ++0x2F,0xDC,0x52,0x87,0x6E,0x56,0x3D,0x9C, ++0x27,0x8F,0x4D,0x09,0xC6,0x80,0xB9,0x70, ++0x26,0x3F,0x89,0x6A,0xCA,0xCC,0x8E,0x15, ++0x0F,0xC3,0x42,0xEF,0x5D,0x46,0xBA,0xC0, ++0x2F,0xAB,0xE2,0x2C,0x22,0xE8,0xAA,0x77, ++0x2F,0x9F,0xF2,0x5A,0x22,0x7C,0x5F,0x59, ++0x2B,0xDC,0x4A,0x8B,0x8D,0x9E,0xCC,0xA5, ++0x0F,0xB6,0x22,0xC3,0xC7,0xE1,0x44,0x93, ++0x27,0x38,0xE4,0x24,0x4B,0x1C,0x32,0xB0, ++0x2F,0xCB,0x77,0xD9,0x75,0x98,0xFE,0x93, ++0x2A,0x19,0xC5,0x04,0x48,0x26,0x97,0x86, ++0x07,0x3F,0x57,0xCA,0xDE,0xB6,0xB6,0xFC, ++0x27,0x12,0x36,0x5A,0xC7,0xE2,0xA5,0x83, ++0x2F,0x3F,0x91,0x6D,0xCF,0x8E,0x8D,0x30, ++0x27,0x3B,0x20,0x62,0x2B,0x38,0xC0,0x19, ++0x27,0xBA,0x2D,0x92,0xE4,0xD7,0x21,0x54, ++0x2F,0x62,0x09,0x70,0x89,0x4A,0xEE,0x40, ++0x07,0xBE,0x30,0xF1,0x4F,0x56,0xA8,0x6E, ++0x2F,0x5D,0x82,0xC5,0x24,0x87,0xA5,0xA2, ++0x2F,0x96,0xF0,0xD2,0x74,0x43,0x26,0x34, ++0x2F,0xAA,0x22,0x1F,0x93,0x87,0x56,0x2C, ++0x07,0x1F,0xBD,0x7B,0x6C,0xE6,0x19,0x82, ++0x27,0x36,0x85,0x50,0x38,0xCC,0x2C,0x39, ++0x2F,0xE2,0xE7,0xB3,0x67,0x08,0x07,0xE2, ++0x27,0xE6,0xF0,0xED,0x6D,0x23,0x1F,0xA9, ++0x27,0x85,0xA5,0xF6,0x20,0x3B,0xC7,0x18, ++0x27,0xC6,0x1D,0xB2,0xAC,0x2C,0xB1,0x53, ++0x2B,0x06,0xB8,0x47,0xC8,0x3A,0xDA,0xFF, ++0x0F,0x5A,0x6E,0x4A,0xD9,0x87,0xA6,0xAC, ++0x27,0x44,0xF4,0x69,0xC9,0x45,0x1B,0xF3, ++0x2F,0x95,0x35,0x58,0xB8,0x21,0x34,0x8D, ++0x27,0x7A,0x8B,0xCD,0x94,0xD3,0x6B,0x0A, ++0x2F,0x47,0x55,0x74,0x10,0x7D,0x91,0xF8, ++0x2F,0xC0,0xAA,0x3A,0xD1,0x4C,0xA6,0xE2, ++0x22,0x87,0xCA,0xBF,0xE2,0xFA,0x5C,0xFF, ++0x0F,0x76,0xBA,0xAD,0x5F,0xBC,0x79,0x55, ++0x27,0xF8,0xC1,0x39,0x8E,0x04,0x66,0x48, ++0x27,0xC8,0x9D,0xC4,0x74,0xC3,0x30,0x72, ++0x2F,0x6D,0xCB,0x9A,0xBF,0x91,0x44,0x16, ++0x27,0xF3,0x10,0x5A,0xCC,0x2B,0x09,0x40, ++0x27,0x60,0xFA,0x25,0xFF,0x71,0x02,0xC9, ++0x2F,0x69,0x9D,0xA7,0x08,0xA1,0x4B,0xA0, ++0x27,0x8D,0x5C,0x1B,0x7C,0xBD,0xC7,0x2A, ++0x27,0xD9,0x2F,0x58,0xE3,0x27,0xCA,0x59, ++0x27,0x12,0x5C,0x91,0x96,0x14,0xC3,0x50, ++0x2F,0x6C,0x6F,0x83,0xA7,0x0A,0x8E,0x8E, ++0x2F,0x4E,0x37,0x7F,0xB8,0x1A,0x8E,0x83, ++0x27,0x5A,0x40,0xA0,0xFE,0xC3,0xDE,0xE9, ++0x27,0xD0,0xE5,0xA6,0xE5,0x28,0x11,0x46, ++0x27,0xE0,0x6B,0x3E,0xBC,0x5A,0x8C,0xDB, ++0x27,0xAA,0x8F,0x45,0x4E,0x7E,0xC4,0xEC, ++0x24,0x2E,0x5E,0x4B,0x44,0xB6,0x45,0x0C, ++0x07,0x78,0x54,0xB3,0x24,0xEE,0xB9,0x6A, ++0x27,0x5C,0xDF,0xEC,0x63,0x54,0x69,0x24, ++0x2F,0x89,0x9A,0x4D,0x80,0x3F,0x8F,0xB1, ++0x27,0x86,0x4C,0x02,0x07,0x7E,0x13,0x7E, ++0x2F,0x4D,0x0E,0xFA,0x6B,0xEE,0xE3,0x4E, ++0x2F,0x9A,0x51,0x1D,0x18,0x1D,0xA2,0x5B, ++0x27,0x47,0xF9,0x76,0x79,0x17,0x81,0x3F, ++0x2F,0x7E,0x24,0xD7,0xA6,0x14,0xA5,0x3B, ++0x2F,0x53,0xAA,0x09,0xF7,0x65,0xC8,0xEE, ++0x27,0x4A,0xFC,0x61,0x5F,0x7B,0xAB,0xFB, ++0x26,0x49,0xA5,0x7C,0xC8,0xAA,0x4B,0xDD, ++0x07,0x15,0x2E,0x15,0x14,0xA7,0xE7,0xC4, ++0x07,0x1C,0x68,0xD8,0x61,0x8D,0xB6,0x9B, ++0x27,0x07,0x18,0x32,0xBA,0x4E,0x93,0xD1, ++0x27,0x53,0xF0,0xD1,0x94,0xA3,0x80,0x06, ++0x22,0x95,0x51,0x30,0x4D,0x6F,0x16,0x52, ++0x07,0xDD,0xDC,0x2D,0xF5,0x6A,0x0A,0xFE, ++0x2F,0xFD,0x00,0x06,0x6E,0xC2,0x7F,0x31, ++0x2F,0x96,0x74,0xB6,0xDE,0x9C,0xD3,0xDD, ++0x2F,0x16,0x59,0xB0,0x6D,0xFC,0xA6,0x76, ++0x29,0xF4,0xDD,0x3D,0xE6,0x68,0x21,0xC4, ++0x07,0x10,0x8E,0x65,0x84,0x3F,0xC8,0x6E, ++0x2F,0xB5,0x9B,0x84,0x0B,0x86,0xD6,0x5E, ++0x2F,0x25,0x80,0xF3,0xC4,0xF5,0x21,0x66, ++0x27,0x12,0xCF,0x43,0x77,0xB8,0xED,0x45, ++0x27,0x55,0x48,0xD3,0x7D,0x1F,0x95,0x6C, ++0x2D,0x34,0xD7,0x8B,0x3F,0x10,0xA3,0x47, ++0x0F,0x96,0xD4,0x5C,0x81,0xB2,0x84,0x25, ++0x2F,0xBA,0x9B,0xB2,0x8D,0x79,0xB8,0x3E, ++0x27,0x04,0xA7,0x4C,0x7A,0x45,0x92,0x66, ++0x27,0x3F,0x7B,0x39,0xA5,0x67,0x21,0xC2, ++0x27,0xA1,0x3E,0x67,0x17,0x7B,0x0F,0x11, ++0x27,0xB1,0x55,0x7B,0x24,0x80,0x1C,0x36, ++0x2F,0xAE,0x40,0x86,0xCA,0xA8,0xA6,0x13, ++0x27,0xC7,0xE0,0x9A,0x79,0x9C,0xF2,0xC8, ++0x2F,0x96,0x66,0x20,0xCF,0x41,0x82,0x09, ++0x2F,0x3F,0xC4,0x25,0x41,0xEC,0x7B,0xEA, ++0x2F,0x3B,0xE6,0xB4,0x99,0xED,0x42,0xCF, ++0x2F,0x0A,0x9F,0x49,0x5A,0xD9,0x0A,0xC6, ++0x07,0xEF,0x47,0xE4,0x0E,0x69,0xF7,0xF6, ++0x0F,0x57,0xEE,0x7E,0xD5,0x18,0xCD,0x17, ++0x0F,0x5E,0x2E,0x58,0xF1,0x14,0x0D,0x99, ++0x0F,0x2B,0xD2,0x01,0x16,0x81,0x7E,0xFF, ++0x2F,0x42,0x0F,0xC4,0x97,0xFF,0x94,0x91, ++0x2F,0x2F,0x1E,0x65,0xD4,0xCA,0x10,0x4B, ++0x25,0x96,0x7F,0xC3,0x25,0xFD,0xE0,0x9E, ++0x0F,0x77,0x27,0xE4,0x13,0xC0,0xBB,0x3C, ++0x27,0x0E,0xBB,0x60,0xFF,0xC0,0x88,0xA4, ++0x27,0x42,0xCC,0x24,0x2A,0xCB,0xA5,0xFF, ++0x27,0x74,0xD9,0xE9,0xFD,0x6D,0x30,0xFC, ++0x27,0x3B,0x39,0xCC,0x41,0x8D,0x01,0xCA, ++0x2F,0x70,0xBD,0xF1,0x38,0xEF,0x22,0x63, ++0x24,0x5E,0x54,0xB3,0x79,0xBA,0x7B,0xBA, ++0x07,0x3A,0xC5,0xBA,0x83,0x85,0x61,0xB9, ++0x0F,0x8A,0x97,0x6A,0x93,0x08,0x72,0x4A, ++0x07,0xAF,0x46,0x26,0x27,0xBE,0x5F,0x30, ++0x0F,0x79,0x53,0xFA,0xEC,0xDD,0xF5,0xDF, ++0x2F,0xA1,0xBF,0x3B,0x6B,0xF6,0x65,0xF5, ++0x2F,0xC3,0xC3,0xC3,0x63,0xD0,0x2E,0x56, ++0x2F,0xD2,0xE0,0x1C,0xAC,0xA9,0x37,0x5F, ++0x27,0x9B,0xC5,0x5C,0x8F,0xC7,0x7A,0x3C, ++0x2B,0x9E,0x00,0x31,0x2F,0x62,0x83,0x17, ++0x0F,0x66,0x40,0x34,0xAE,0x82,0x56,0x07, ++0x27,0x09,0xA8,0x95,0x20,0x26,0x09,0xFC, ++0x2A,0x16,0xA0,0xED,0x5C,0xE6,0xB9,0x80, ++0x0F,0x5A,0x6C,0x1A,0x09,0x2F,0x35,0xCD, ++0x27,0x50,0x2E,0xBB,0x6C,0x51,0x14,0xB5, ++0x27,0x70,0x54,0x56,0x07,0x7C,0x1B,0x61, ++0x2F,0x29,0x81,0x08,0x41,0xCA,0x3D,0xCD, ++0x2F,0xC5,0x37,0x1E,0xCA,0x96,0x0A,0x82, ++0x27,0x21,0x0D,0xD8,0xD7,0x4C,0xF7,0x4B, ++0x2F,0xD3,0x35,0xF0,0x84,0xFD,0xCF,0xB4, ++0x27,0xD1,0x5C,0xD3,0x8A,0xB4,0x1E,0xD6, ++0x2F,0x04,0xFA,0x28,0x48,0x05,0xC2,0x94, ++0x2F,0xC9,0x66,0xCD,0x2D,0x77,0xBC,0x58, ++0x2F,0x63,0x20,0x0F,0x8E,0x18,0x99,0x74, ++0x27,0xF2,0x78,0x1A,0x5E,0x17,0x43,0x61, ++0x2F,0x26,0xA5,0x5B,0x14,0x9B,0x6C,0x4C, ++0x2F,0xBA,0xC4,0x03,0x3E,0xE5,0xAC,0xEC, ++0x27,0x5E,0x8D,0x0D,0xAF,0x0F,0x44,0x77, ++0x27,0x29,0x3C,0xC4,0xFC,0x64,0x6B,0x4C, ++0x2F,0x4B,0x8C,0xE0,0x06,0x31,0x93,0xCB, ++0x27,0xF4,0x4D,0x38,0x7F,0x98,0x3D,0xB4, ++0x27,0xEB,0x1A,0xB4,0x2F,0x15,0x1E,0xEA, ++0x27,0x6B,0xED,0xE0,0xA3,0x13,0x4C,0xC5, ++0x2F,0x77,0xAA,0x58,0x31,0x0C,0xAB,0xF5, ++0x23,0x05,0xA1,0x61,0x4A,0xEC,0xDB,0xE1, ++0x0F,0x67,0x02,0xC2,0xAA,0x83,0x51,0x5F, ++0x2F,0x02,0xE4,0x30,0x84,0x05,0x10,0xEB, ++0x2A,0xCF,0x84,0x1A,0xD0,0x10,0x6D,0x7B, ++0x07,0x09,0x53,0xAB,0xBE,0xC4,0x91,0x33, ++0x2F,0x7D,0xF4,0xED,0x7F,0xBC,0x84,0x7F, ++0x27,0x49,0xB2,0xCE,0xB1,0xF2,0xFD,0x27, ++0x27,0x9C,0xB5,0xB8,0x91,0xDF,0xD1,0xE7, ++0x27,0x5E,0x32,0x21,0xC4,0x4B,0x64,0x91, ++0x27,0x42,0xD5,0x8A,0x5C,0xC5,0xC7,0x42, ++0x27,0xAD,0x05,0x97,0xAF,0xDB,0x74,0x5A, ++0x27,0x8D,0xB8,0x82,0x0D,0xFD,0x57,0x82, ++0x27,0x66,0x4E,0xC5,0x0E,0x7B,0xFE,0xED, ++0x0F,0xAC,0x4C,0x29,0x56,0xCB,0x36,0xA6, ++0x0F,0xDB,0x09,0x8B,0x3D,0x71,0x85,0x45, ++0x0F,0x32,0xC5,0x4B,0x1D,0x3B,0x08,0xB7, ++0x07,0x49,0xF4,0x32,0x1C,0x0E,0x75,0xC1, ++0x27,0x5F,0x11,0xDC,0x0B,0x76,0x9D,0xB4, ++0x2E,0xB0,0x17,0xAD,0x6E,0x6A,0x89,0x9B, ++0x0F,0xAF,0x1B,0x5C,0x92,0xE3,0xCE,0x17, ++0x0F,0x85,0x55,0x70,0x25,0xE7,0xF5,0x33, ++0x25,0x42,0xF3,0x1F,0xF7,0x69,0xAF,0xEE, ++0x0F,0xD5,0x85,0xBE,0x6C,0xD9,0x60,0xBD, ++0x07,0xE4,0xA0,0x9C,0x20,0x2E,0xAD,0xE6, ++0x07,0x09,0x04,0x83,0xD1,0xF5,0xA9,0xFF, ++0x27,0x72,0x86,0xBD,0xFE,0x36,0xF6,0xC2, ++0x2F,0x99,0x79,0xD4,0x09,0xDE,0x0E,0x9E, ++0x2F,0xD0,0x57,0x2E,0x51,0x89,0x0A,0xA7, ++0x27,0x91,0x76,0x58,0x66,0xA2,0x6B,0x6F, ++0x24,0x4F,0x09,0x68,0xAA,0x8C,0xAA,0x40, ++0x07,0x70,0x93,0x6B,0x23,0x8B,0xEC,0x2A, ++0x0F,0x20,0xE4,0x4A,0xC8,0x26,0x78,0x28, ++0x2A,0x92,0x35,0x37,0xD5,0xB4,0xC1,0xE3, ++0x07,0xBC,0x34,0x5C,0xA0,0x5B,0x6F,0x52, ++0x25,0xC3,0x39,0xD8,0x7E,0x44,0xBD,0x7C, ++0x0F,0xC4,0x52,0x72,0xB9,0xC0,0x99,0xF6, ++0x27,0xEB,0xFC,0x6B,0x09,0x5F,0xE5,0x06, ++0x27,0xE0,0x05,0xA2,0x27,0x32,0x7F,0xB7, ++0x27,0xB1,0xCF,0x4D,0x11,0x0A,0xCA,0xBB, ++0x23,0x12,0xA5,0x18,0x01,0xBE,0x6C,0x8D, ++0x0F,0xF0,0x14,0xA9,0xF2,0x94,0xFD,0x5A, ++0x2F,0xD1,0x32,0x70,0xCC,0xA0,0x99,0xD6, ++0x27,0x4A,0xD8,0x57,0xD0,0x49,0x99,0x2A, ++0x2F,0x4F,0x93,0xC1,0xDB,0x54,0xEE,0x29, ++0x2F,0x4B,0x25,0x9A,0xFC,0xED,0x87,0x52, ++0x27,0x64,0x9F,0x82,0xE0,0xC3,0x8C,0x84, ++0x2F,0x90,0x91,0xAB,0x03,0x42,0x74,0x12, ++0x2F,0x60,0x53,0x89,0xF5,0xAF,0xC9,0x89, ++0x2F,0x47,0xBE,0xEF,0x42,0xE8,0xA4,0x51, ++0x27,0x39,0x05,0x38,0xE5,0x79,0x78,0xE5, ++0x27,0x5D,0x2C,0x62,0x28,0xDF,0xB4,0x5F, ++0x27,0xE2,0x9A,0x7E,0x28,0xEB,0x21,0xC3, ++0x2D,0xDB,0x43,0x0D,0x55,0x18,0x74,0x46, ++0x0F,0xCF,0x0F,0x90,0x21,0xC5,0x32,0x0C, ++0x2F,0x13,0xB4,0x48,0x3B,0x35,0xFD,0x66, ++0x2F,0x27,0x92,0x64,0xE8,0xC0,0xF1,0xB1, ++0x2F,0x38,0xCD,0xCA,0xDF,0x48,0x66,0x7D, ++0x2F,0x36,0x80,0x2F,0x2A,0xDA,0x68,0xDC, ++0x27,0xB4,0x9C,0xF3,0xAC,0xC7,0x70,0x64, ++0x2F,0x16,0x69,0xF0,0x33,0xF3,0x42,0x7A, ++0x27,0x90,0x0C,0xB5,0x6E,0xDB,0xD3,0x6B, ++0x2F,0xEE,0x4E,0xD5,0xEB,0x22,0x69,0xD2, ++0x2F,0x44,0x9F,0xF2,0x60,0xA9,0xC2,0xB6, ++0x2F,0x4D,0x44,0xB6,0x86,0x1D,0x6E,0xD1, ++0x27,0xD3,0x19,0x67,0x29,0x8C,0xC5,0x74, ++0x2F,0x7D,0x4C,0x0C,0x7F,0x3F,0x9E,0xE8, ++0x27,0x0A,0x7C,0x47,0xE0,0x58,0x46,0xF5, ++0x23,0x67,0x71,0x1B,0x71,0xF5,0x2B,0x63, ++0x07,0x9C,0x65,0x3C,0xB9,0x3F,0x9C,0x98, ++0x2F,0x22,0x40,0xAB,0x08,0xB6,0xAE,0xED, ++0x2F,0xC0,0xAE,0x06,0x5B,0x2D,0x19,0x43, ++0x27,0xD1,0xE4,0xAA,0x4C,0xAD,0xD5,0x80, ++0x27,0xE1,0x7F,0x7C,0xFC,0x8A,0xC6,0xCC, ++0x27,0x84,0x4C,0x37,0xB5,0x32,0x60,0x67, ++0x27,0xCC,0xE7,0x44,0x99,0xE0,0x25,0x92, ++0x2F,0x34,0x5E,0xBA,0x0F,0x90,0x1C,0xC0, ++0x27,0x0C,0x07,0xF8,0x47,0xA6,0xF1,0x95, ++0x2F,0x52,0xF9,0x84,0x82,0x4D,0xB4,0x6B, ++0x2F,0x91,0x3A,0xA3,0xB4,0x8E,0xD3,0x1D, ++0x2F,0x5D,0xC7,0x5B,0x3D,0x3E,0x4F,0x11, ++0x2E,0x23,0x91,0xA8,0x4D,0x31,0xDC,0x06, ++0x07,0x45,0xB3,0x91,0x45,0x24,0x65,0x0F, ++0x27,0x74,0xCF,0x30,0xAE,0x89,0xE1,0xAB, ++0x0F,0x0F,0xC2,0xB5,0xD4,0xCA,0xB4,0x98, ++0x2F,0x4A,0xB0,0x1D,0x7C,0xBF,0x1F,0x76, ++0x2F,0xB4,0x14,0xFC,0x16,0x85,0x5A,0xC5, ++0x2F,0x82,0xAA,0xE4,0xF4,0x12,0x0F,0x64, ++0x27,0x1F,0x40,0xAC,0x00,0x89,0xF4,0x9D, ++0x0F,0x00,0x73,0xF2,0xC6,0x20,0xBF,0xEF, ++0x2F,0x07,0x1A,0x8C,0x7C,0x49,0x84,0x1C, ++0x21,0x13,0x08,0x30,0x44,0xDB,0xB5,0xED, ++0x07,0x1B,0x88,0xDE,0xB1,0x8E,0xA0,0xED, ++0x2F,0x60,0x10,0x40,0x40,0xE7,0x7F,0x8B, ++0x2F,0x27,0x51,0x4F,0xC3,0x18,0xB2,0x14, ++0x2D,0x0E,0xBD,0x51,0x11,0x20,0x2D,0x20, ++0x0F,0xB6,0x74,0xB4,0xB8,0x33,0x7B,0xA1, ++0x2A,0x21,0xC7,0x3C,0x7A,0xCD,0x07,0x09, ++0x07,0xA2,0x85,0x93,0xE5,0x07,0x00,0x9A, ++0x25,0xAB,0x10,0x72,0xEE,0x95,0xD4,0xD4, ++0x0F,0xA1,0x3E,0x1E,0xF3,0x09,0x3D,0x15, ++0x2F,0x08,0xB4,0x2D,0xD6,0x95,0xD9,0x14, ++0x27,0xA2,0x3E,0xAA,0x79,0x4E,0x78,0x5F, ++0x2F,0x53,0xD2,0x3D,0xE6,0x6B,0x93,0x27, ++0x27,0x7B,0xD9,0xC1,0xE5,0x08,0x9C,0xF1, ++0x2F,0xAA,0x20,0x6B,0x6C,0xBD,0x1E,0x9D, ++0x2F,0x7B,0x3A,0x39,0x52,0x51,0x83,0xED, ++0x27,0x92,0xB7,0x38,0x75,0x0E,0xB1,0x2B, ++0x27,0x9A,0x40,0x11,0xDC,0x06,0x2B,0x1E, ++0x27,0xFE,0x34,0xBC,0x59,0x6E,0x31,0xF3, ++0x2F,0x8D,0xFC,0xB5,0x4F,0x4C,0xB5,0x52, ++0x27,0xA0,0x4A,0x70,0x02,0xFB,0xD7,0xD1, ++0x27,0xEA,0x01,0x87,0xBE,0x8D,0x29,0xC6, ++0x2F,0x39,0xC3,0x8B,0xB7,0x96,0xC2,0x56, ++0x2F,0x50,0xE6,0xF4,0x50,0x03,0xBA,0x61, ++0x27,0x02,0xCC,0x03,0xAF,0x2F,0x3F,0xAC, ++0x27,0xAB,0x69,0xD0,0xCF,0xA7,0x4B,0x76, ++0x27,0xDF,0x31,0x4B,0xDE,0x55,0x54,0x19, ++0x2F,0x98,0xCB,0x8A,0x7F,0x1F,0xE3,0x62, ++0x2F,0x45,0x33,0x58,0xAD,0x03,0x57,0x81, ++0x2F,0x6D,0xC9,0xAA,0xDF,0x20,0x6E,0xF0, ++0x27,0xBC,0x1F,0x99,0xF3,0xDC,0x86,0xB5, ++0x27,0x19,0xE3,0x17,0x86,0x74,0xB8,0xFE, ++0x2F,0xED,0xCC,0x7F,0x97,0x47,0xFA,0xBB, ++0x27,0xB5,0xD9,0xC0,0xD1,0x7B,0x5E,0x9C, ++0x27,0xDA,0x1F,0x04,0xD9,0x0B,0xE2,0xB4, ++0x27,0xFF,0x8B,0xEF,0x7E,0x3A,0x4E,0xB9, ++0x2B,0xB0,0x49,0x12,0xA0,0x7E,0x02,0x5B, ++0x07,0x7D,0xAF,0x99,0x07,0xCC,0x75,0xF7, ++0x26,0x7C,0x3B,0xDC,0xBC,0xFC,0x49,0xCA, ++0x0F,0x8A,0x20,0x87,0x5D,0x14,0xF8,0xA6, ++0x27,0xB0,0xD5,0x65,0xFA,0xD1,0x0A,0xD7, ++0x27,0x3C,0x1A,0x67,0xE4,0x22,0x02,0xC8, ++0x27,0xA9,0x1B,0x72,0x33,0x88,0xAA,0x85, ++0x27,0x0E,0xCD,0x9D,0x2B,0x7F,0x2D,0xD7, ++0x27,0x78,0xA1,0xA1,0xF3,0x7C,0x03,0x6F, ++0x2F,0x1B,0x8D,0x6C,0xD7,0xF4,0xB1,0x05, ++0x2F,0x70,0x87,0x41,0xA8,0x8C,0x10,0xA6, ++0x2C,0x35,0x20,0x16,0x97,0x0B,0x8A,0xED, ++0x0F,0x15,0x1D,0xA2,0x5E,0x45,0xD3,0xC5, ++0x27,0x2C,0x0F,0xBD,0x38,0x35,0xC6,0x5F, ++0x2F,0x57,0x2A,0x4E,0x04,0xEB,0x1D,0x7C, ++0x27,0xBE,0x8B,0x7C,0x95,0x61,0xE8,0xCB, ++0x2F,0xBC,0xD4,0xC3,0xE3,0x0D,0x7A,0x30, ++0x27,0xC4,0x21,0x3B,0x73,0x01,0x99,0xDE, ++0x25,0x34,0x18,0xBB,0x31,0xC5,0x15,0x08, ++0x0F,0x50,0x89,0x4D,0x52,0x71,0x92,0xE3, ++0x2B,0x74,0xF0,0x5D,0xE7,0x28,0x74,0x47, ++0x0F,0x9B,0x52,0x53,0x3D,0x32,0x1F,0x7E, ++0x27,0x38,0x66,0xA1,0x48,0x1E,0x0E,0xD0, ++0x2F,0x13,0xF7,0x78,0x24,0xE7,0x4C,0xB6, ++0x29,0x11,0x9F,0xBA,0xA8,0x82,0x76,0x88, ++0x0F,0xC5,0x68,0x52,0xA8,0x98,0x41,0x7B, ++0x27,0xF4,0x5D,0x97,0x5B,0x2A,0xB5,0x9E, ++0x2F,0xF4,0x8A,0xE9,0x82,0xED,0x88,0x0F, ++0x27,0xC0,0x5B,0xB8,0xF8,0x53,0xC0,0x78, ++0x22,0x96,0x2E,0x0C,0x35,0xD3,0x60,0xB6, ++0x07,0x8F,0xDD,0x53,0xEE,0x41,0x75,0xC7, ++0x23,0xFB,0xC4,0xEB,0x71,0x45,0x70,0xCA, ++0x07,0x55,0x30,0xCF,0xEB,0xD0,0x69,0x85, ++0x2F,0x19,0xB4,0xB2,0xE0,0x96,0x3D,0x7D, ++0x2F,0xD4,0xDE,0x25,0xFF,0xCD,0x9B,0xAD, ++0x29,0xD9,0x0F,0x39,0xF5,0xCF,0x6C,0xF5, ++0x07,0x16,0xAA,0x3E,0x5D,0xE8,0xDC,0xE5, ++0x0F,0xFA,0x0B,0xA3,0xA6,0xC1,0x28,0x24, ++0x07,0x4E,0x25,0xA6,0x64,0x41,0xE4,0xDD, ++0x2C,0xED,0x9B,0x2D,0x69,0x43,0x68,0x8B, ++0x0F,0x2C,0xB0,0x8D,0x2F,0x87,0x58,0x82, ++0x2F,0xCF,0xA3,0xA6,0x34,0x85,0x77,0x3F, ++0x2F,0x9F,0x74,0x2E,0x81,0x54,0x64,0x40, ++0x2A,0xA6,0xEA,0xC1,0xDE,0xF0,0x4F,0xFC, ++0x07,0x09,0x4E,0x1E,0xD1,0x2D,0x91,0x04, ++0x07,0x81,0x03,0xE9,0x60,0x92,0x34,0xC8, ++0x07,0x56,0xD8,0x69,0xCA,0xD0,0x9C,0x50, ++0x2F,0x24,0x86,0x22,0x65,0xC2,0x00,0xB6, ++0x27,0xA9,0x07,0x54,0x03,0x61,0x4D,0x31, ++0x2F,0x26,0x00,0x6F,0x75,0x5E,0x60,0x5D, ++0x27,0xB2,0xA8,0xD5,0x5A,0xEE,0xE7,0xC5, ++0x22,0x43,0x1E,0x8E,0xB1,0x9A,0x9F,0x5C, ++0x0F,0x0B,0xD5,0x21,0x6A,0x6B,0xA2,0xF7, ++0x27,0x84,0xC6,0x1F,0x77,0xCF,0x40,0xBF, ++0x2F,0x1D,0xAA,0x6E,0x17,0x04,0x91,0x12, ++0x25,0xE6,0x94,0xB8,0x4B,0x56,0xAC,0xAB, ++0x07,0x43,0x87,0xC3,0xA1,0xE1,0xF5,0x35, ++0x2F,0x82,0xEC,0x75,0xEE,0x18,0x86,0xC8, ++0x2F,0xD4,0x89,0xB1,0x05,0x1C,0x87,0x1E, ++0x2F,0xA0,0xC9,0x6D,0x82,0x88,0x91,0xBE, ++0x2F,0x11,0xB4,0x4D,0x77,0xC0,0x1B,0x51, ++0x27,0x94,0x19,0xBE,0xB9,0x4B,0xAF,0x8A, ++0x27,0x20,0x2B,0xA5,0xB0,0xCB,0x00,0x53, ++0x2F,0x3F,0x77,0xD8,0xF1,0x9F,0xE3,0x5A, ++0x27,0xF6,0x3D,0x86,0xCA,0x8C,0x1A,0xD0, ++0x2D,0xD4,0x5E,0x18,0xAE,0x72,0x4D,0x60, ++0x0F,0xC4,0x8F,0xFB,0x7B,0xBB,0xDC,0x6B, ++0x2F,0x66,0x6D,0x58,0x1B,0x72,0xD1,0x84, ++0x27,0x31,0x44,0x6C,0x2A,0x18,0xDB,0x48, ++0x24,0x52,0xE5,0x00,0x0A,0x04,0xA7,0xDD, ++0x0F,0xA9,0xCC,0x71,0x35,0x7B,0xC0,0xDB, ++0x22,0x05,0xB3,0x25,0xAE,0x4F,0x1D,0x7C, ++0x07,0x23,0x9A,0x73,0x0F,0x3A,0xE6,0x6C, ++0x07,0xA3,0x4D,0xE1,0x80,0x1F,0xBF,0xC8, ++0x07,0x40,0x8D,0x7C,0x63,0xB9,0x6A,0x67, ++0x27,0x94,0x3C,0xB2,0x77,0x08,0x74,0x7B, ++0x27,0xD0,0xB6,0x69,0x26,0xAE,0x0F,0x80, ++0x2F,0x08,0x05,0x93,0xF3,0xB5,0x72,0x58, ++0x2F,0x90,0x96,0x7B,0xFD,0x27,0x09,0x6C, ++0x2F,0xEC,0xE4,0x48,0x31,0x65,0x93,0x1B, ++0x27,0x4F,0xB0,0xA9,0xD7,0xF6,0xC0,0xB2, ++0x27,0x62,0x89,0x87,0xD8,0xFA,0x05,0x02, ++0x27,0x65,0xAE,0xDE,0xBB,0x4D,0x24,0x8D, ++0x2B,0xD7,0x1A,0xE7,0x6E,0x85,0x07,0xF1, ++0x0F,0x32,0x40,0xA9,0x86,0xB4,0x46,0x81, ++0x2F,0x6D,0x19,0x7C,0xC8,0x15,0x81,0xC2, ++0x2C,0xC6,0x93,0x32,0x55,0xA0,0x4F,0xBC, ++0x07,0x63,0x01,0x3A,0xF7,0x3B,0x3A,0x59, ++0x26,0x66,0xBC,0xDB,0xD5,0xFE,0xBE,0x4B, ++0x07,0xCF,0xC8,0x2C,0x5D,0x60,0xF5,0x97, ++0x26,0xDF,0xF9,0x7C,0x9E,0xCC,0xB1,0xAA, ++0x07,0x3D,0xAA,0x99,0x80,0x8D,0x52,0xA5, ++0x27,0x12,0x8D,0x24,0xE8,0xAB,0xC8,0xA0, ++0x22,0xD1,0x1D,0xD7,0x21,0xC5,0xAB,0x4E, ++0x0F,0x61,0x23,0x71,0xB5,0xEF,0x60,0x59, ++0x2F,0xFC,0xF7,0x8A,0xE8,0x40,0x06,0x44, ++0x27,0xC2,0x4F,0x73,0xAE,0xC4,0x91,0x8E, ++0x2F,0xD7,0xC3,0x42,0x62,0x20,0x89,0x66, ++0x27,0xAE,0xEB,0x79,0x23,0x35,0xC3,0x6B, ++0x2A,0xB0,0x72,0x3E,0x71,0xA8,0xC8,0x30, ++0x07,0x44,0x80,0xE0,0xD8,0x3D,0x79,0x93, ++0x2F,0xA1,0x23,0x1E,0xCB,0x35,0x35,0x66, ++0x2F,0xA6,0xC1,0xC4,0x31,0x10,0x17,0xAD, ++0x27,0x8A,0xC1,0x1E,0xD6,0xA2,0x9B,0x31, ++0x27,0xA8,0x78,0xC6,0x36,0xEF,0x7A,0x2A, ++0x2F,0x48,0xCF,0xBB,0x3D,0xFF,0x05,0x5F, ++0x27,0xBB,0x68,0x9A,0xB2,0xDD,0xA4,0x64, ++0x27,0x82,0x2C,0x7D,0x2F,0x8D,0x51,0xBF, ++0x2F,0xEA,0x36,0xA6,0xEE,0x18,0x66,0x2F, ++0x2F,0x44,0xBA,0xB1,0xBD,0x2A,0x2B,0x45, ++0x25,0xD8,0xCB,0x36,0x86,0xF6,0x09,0xFC, ++0x07,0x20,0xAE,0x4B,0xD2,0xB5,0x1D,0x79, ++0x27,0xE7,0x9D,0xB3,0xA1,0xB5,0x5D,0xBE, ++0x2F,0xB3,0x64,0xFC,0xC5,0x56,0xE7,0xED, ++0x2F,0x1C,0x4C,0xBA,0x51,0x70,0x0A,0xEB, ++0x2F,0x3E,0x68,0xA5,0x6E,0xF0,0x2A,0xCF, ++0x22,0xB7,0x97,0x9B,0x8C,0x1B,0x51,0x79, ++0x07,0x76,0x72,0x71,0xA3,0xA4,0xFD,0x7C, ++0x27,0x02,0xC8,0x5F,0x35,0x96,0xDF,0xAA, ++0x2F,0xF8,0x13,0x5D,0x35,0x2D,0x44,0x88, ++0x27,0x6D,0x1C,0xBE,0x74,0xC5,0x3D,0xF8, ++0x27,0x84,0xBF,0x3D,0x01,0x88,0xC4,0x6A, ++0x27,0x47,0xE1,0x6D,0x99,0x9E,0x7A,0x93, ++0x27,0x83,0xCA,0xF0,0x90,0x88,0xEC,0xEB, ++0x2F,0x22,0x89,0x70,0x18,0xF1,0x01,0x9E, ++0x27,0x8A,0x3B,0x8D,0x03,0xC0,0x4E,0x6B, ++0x27,0xF0,0x3B,0x24,0x67,0xB8,0x0A,0xCD, ++0x27,0x7D,0x85,0x3C,0x2F,0x18,0xB9,0x83, ++0x27,0xB1,0x41,0xDD,0x7D,0x11,0xD4,0x27, ++0x2F,0xE3,0xBE,0x5E,0x32,0x71,0xDB,0x59, ++0x27,0x73,0xDD,0xE1,0xB0,0x9A,0xA2,0x0A, ++0x27,0xB3,0x05,0xE9,0x25,0x74,0xB2,0x54, ++0x27,0x5B,0xAD,0xF4,0x3C,0x36,0xA4,0xF7, ++0x2F,0x5C,0xA3,0x0C,0x91,0xC6,0x8F,0x9D, ++0x27,0xB7,0x23,0x4B,0x3F,0xBC,0x54,0xD2, ++0x27,0x6D,0x77,0x19,0x5B,0x7A,0x58,0x36, ++0x2F,0x66,0x04,0xDE,0x62,0xCE,0xFB,0xFF, ++0x2F,0xA9,0xD2,0x06,0xBC,0x93,0xE9,0xA3, ++0x27,0x94,0x2A,0xA5,0xF9,0x38,0x21,0xEA, ++0x2F,0x87,0x8E,0x3E,0x7C,0x87,0x96,0xAB, ++0x27,0xAB,0x89,0x5F,0x6F,0xA7,0xB1,0x1C, ++0x2F,0x71,0xB5,0x90,0x2E,0xD6,0xA2,0xC4, ++0x2F,0x0B,0x1F,0xFC,0x60,0x4B,0x20,0xC3, ++0x2F,0x6A,0x36,0xA5,0xC4,0xE0,0x6C,0xD7, ++0x23,0x18,0xC1,0x26,0x30,0x42,0xEA,0x7C, ++0x07,0x26,0x5F,0x0B,0xA2,0xA2,0x5E,0x0F, ++0x2F,0xA4,0x1D,0x41,0x4C,0xA8,0xFF,0x60, ++0x22,0xB3,0x40,0x69,0x6B,0x2D,0x6A,0x0C, ++0x07,0x85,0x63,0xF2,0x37,0x0E,0xE1,0xAD, ++0x07,0x65,0x0F,0x17,0xAF,0x05,0x10,0xF4, ++0x2D,0x1C,0xFE,0xFE,0xCB,0x8A,0xD0,0x41, ++0x0F,0xB5,0x42,0x10,0x22,0x74,0x40,0x48, ++0x27,0x2F,0x6A,0x9F,0x55,0xBE,0x0D,0x2D, ++0x2F,0xB5,0xDE,0xD6,0x02,0x3A,0x28,0x49, ++0x2F,0xFD,0x1D,0x5D,0x69,0xB6,0xEC,0x23, ++0x2F,0xC9,0x5F,0x89,0x13,0xC3,0x14,0xDB, ++0x27,0xE2,0xC9,0x07,0x8C,0xA2,0x40,0xA7, ++0x27,0x53,0x06,0xCB,0xEB,0xCE,0x1E,0x40, ++0x2A,0xA6,0x21,0x81,0x1A,0xD4,0x7E,0x39, ++0x0F,0xCE,0x0A,0xCD,0x7F,0x2B,0x83,0x36, ++0x27,0xBE,0xB8,0x80,0x33,0x67,0x55,0x33, ++0x27,0xB6,0xC8,0x4C,0x25,0x1B,0x5F,0xCA, ++0x2F,0x65,0x1B,0x22,0xF6,0x29,0x9D,0xF1, ++0x27,0x7A,0xE7,0x46,0x25,0x2E,0xC1,0x6D, ++0x0F,0x50,0x4E,0x47,0x9F,0x3F,0x99,0xE7, ++0x07,0xDE,0xA2,0x39,0xF7,0x48,0x24,0x2B, ++0x25,0x77,0x68,0x1A,0xF6,0xF7,0x5C,0x55, ++0x0F,0x04,0xA0,0x1F,0x15,0xD8,0xDF,0x26, ++0x27,0x7B,0x6E,0xBA,0x24,0x7B,0xB9,0xE0, ++0x27,0x11,0x99,0xAD,0xF8,0xB3,0x6E,0x04, ++0x2F,0xE5,0x26,0x2B,0x70,0xE3,0xDF,0xF7, ++0x27,0xF8,0x7A,0xCB,0x99,0x91,0x4B,0x54, ++0x27,0xA9,0x68,0x25,0x0D,0xEE,0x28,0x3B, ++0x27,0xFD,0xE4,0xB8,0x1C,0x74,0x88,0x0A, ++0x2F,0x57,0x01,0xCE,0xB1,0xEE,0x36,0xCF, ++0x21,0x41,0xDA,0x5B,0x24,0x66,0x8F,0x19, ++0x0F,0x93,0xD7,0x88,0x22,0x93,0xAC,0x34, ++0x2F,0xD1,0x30,0x86,0x0F,0x5F,0xF1,0x1D, ++0x27,0x28,0x4A,0xF0,0x44,0xBE,0xC7,0xBE, ++0x26,0x98,0xC4,0x0E,0xDB,0x11,0x39,0xCA, ++0x07,0x3A,0x15,0x01,0x3E,0xA0,0x4E,0x1B, ++0x0F,0xFF,0xE0,0xC5,0xA0,0x22,0x66,0xF5, ++0x2F,0x04,0xEF,0x2B,0x6A,0xFE,0xE7,0xB8, ++0x2E,0x1D,0x61,0xEC,0xDD,0x66,0x22,0xB5, ++0x07,0x0E,0x87,0x8D,0x6B,0x70,0xBA,0x75, ++0x2F,0x55,0xDB,0x50,0xEA,0x37,0xD0,0xD2, ++0x21,0x96,0xFC,0x00,0xC2,0x5A,0x07,0xBB, ++0x07,0xC5,0x30,0xD6,0x7B,0x9F,0xC7,0x46, ++0x2E,0x5C,0x6F,0x0B,0x2C,0x9D,0x97,0x86, ++0x0F,0xC3,0xB6,0x94,0x98,0x38,0x67,0x4E, ++0x27,0xDC,0x9A,0x2B,0x74,0x50,0x37,0x8F, ++0x27,0x40,0xF8,0x7F,0x38,0xA1,0x88,0x22, ++0x21,0xEF,0x32,0x74,0x59,0xAB,0x3E,0xB7, ++0x07,0xEF,0x73,0xA1,0xE5,0x52,0x6F,0xD9, ++0x2F,0x3B,0x5C,0xA2,0xFE,0x57,0x71,0x3D, ++0x27,0x71,0xD6,0xD2,0x6F,0xA1,0x57,0xAF, ++0x29,0x80,0x58,0xA6,0xC2,0x3B,0x79,0x07, ++0x07,0x87,0x89,0xB8,0x58,0xC4,0xE1,0xEF, ++0x2F,0x42,0xC8,0x29,0x21,0x3B,0xA5,0x4D, ++0x27,0x70,0xBE,0xCB,0x27,0xFF,0xA8,0x32, ++0x27,0x15,0x20,0x00,0xBE,0x53,0x17,0x3C, ++0x24,0x74,0x9F,0xCC,0xB8,0x3C,0x0B,0xC0, ++0x07,0xC3,0x7B,0x30,0x31,0xBD,0xCC,0x71, ++0x27,0x54,0x84,0x7F,0x44,0x70,0x5C,0xDF, ++0x2E,0x3C,0x44,0x61,0x84,0x31,0x45,0x33, ++0x07,0x89,0xF4,0x7C,0xFD,0x29,0xDF,0x6B, ++0x0F,0xB7,0xC6,0x9A,0xAE,0xA0,0x7F,0xA7, ++0x07,0xB3,0x2B,0x76,0x10,0x6C,0x4D,0xB5, ++0x0F,0x4E,0x2D,0xA4,0xBD,0x9B,0x28,0x11, ++0x27,0xDC,0xE5,0xCA,0xD1,0x38,0x9C,0xED, ++0x21,0xD0,0x50,0x3E,0xD6,0xEE,0x51,0xD6, ++0x07,0xC9,0x09,0xEB,0x81,0x08,0xCD,0xD5, ++0x0F,0x3D,0x95,0xCA,0xD0,0xCB,0xB7,0x1D, ++0x24,0x85,0x36,0xFE,0x13,0xE2,0xA3,0xB0, ++0x0F,0x7A,0xEE,0xF6,0x31,0xB3,0xED,0x5A, ++0x2F,0x08,0xE6,0x8D,0x1A,0x33,0x46,0x6A, ++0x2A,0x28,0x7C,0x3A,0x09,0x17,0xB9,0xF6, ++0x0F,0xF6,0x76,0x59,0xB4,0x34,0x85,0x04, ++0x0F,0x8F,0xF4,0x4D,0x53,0xFE,0xB0,0xAC, ++0x07,0xB8,0x8B,0x7A,0xFC,0xDA,0xB9,0xB3, ++0x2F,0xCB,0x49,0x90,0x3E,0x4F,0xB7,0xC2, ++0x2F,0x96,0x4D,0x2B,0xD0,0xD5,0x0C,0xCD, ++0x24,0x6C,0x76,0xCB,0xFE,0xAA,0xE8,0x19, ++0x07,0xC5,0xFA,0x8E,0x11,0x27,0x44,0x7E, ++0x07,0x23,0x6A,0x88,0x96,0x3C,0x0E,0x99, ++0x2F,0x88,0xFE,0xD8,0xC3,0xA9,0xFE,0xBF, ++0x2F,0x1B,0xC0,0xA6,0xAC,0x46,0x26,0xA5, ++0x27,0x04,0x76,0x3B,0xAD,0x58,0x86,0x97, ++0x27,0x90,0x32,0xA1,0x0C,0x71,0x6A,0x71, ++0x2F,0x15,0xC0,0x9F,0xAC,0xF8,0x1D,0x7A, ++0x2F,0x55,0x31,0x69,0x4F,0x65,0x84,0xC2, ++0x27,0x71,0x7E,0xBF,0x94,0x3D,0xD9,0x2E, ++0x27,0x9C,0x0A,0xD7,0x84,0x50,0x49,0x47, ++0x2A,0xE6,0xB1,0xE9,0x90,0xEA,0xCF,0xE0, ++0x0F,0xDD,0x1F,0x02,0x0D,0x4D,0x52,0x96, ++0x2F,0x50,0x33,0x58,0x7F,0xAB,0x25,0xF7, ++0x2A,0xD6,0x8B,0x4B,0x18,0xEB,0xF0,0x73, ++0x07,0xC2,0x19,0x96,0x72,0x18,0x83,0xA9, ++0x27,0x34,0x62,0x63,0x13,0x17,0x0E,0xBA, ++0x2F,0x23,0x22,0x98,0xC3,0xBB,0x1D,0x7E, ++0x2F,0x55,0x82,0xC1,0x7A,0x77,0x1F,0xBB, ++0x2D,0xA2,0x0A,0xF7,0xDF,0xE6,0x39,0xEC, ++0x07,0xC2,0x9B,0xD4,0x8F,0xFF,0x76,0x3A, ++0x27,0xDF,0xDC,0xB1,0xAE,0xD2,0x9C,0x8D, ++0x2F,0x38,0x4E,0x60,0x4B,0xDC,0x4A,0x47, ++0x27,0x1C,0xDE,0x42,0x96,0x3F,0xD1,0x78, ++0x2F,0x64,0x3B,0x73,0xCC,0x59,0x5D,0xD6, ++0x2F,0xB1,0x49,0x96,0xA2,0xC8,0x07,0xE6, ++0x23,0x42,0x4A,0x75,0x20,0x70,0xBA,0x34, ++0x07,0x07,0xA9,0xF7,0x72,0xE4,0xF9,0x3B, ++0x2F,0x8A,0xB3,0x65,0xC7,0x1D,0x21,0xF2, ++0x27,0xBF,0x6B,0x3F,0x40,0x34,0x35,0x9D, ++0x27,0xAD,0x1D,0x70,0x70,0xB0,0x4B,0xBD, ++0x27,0xC8,0xED,0x1A,0x70,0xD9,0x88,0x2E, ++0x2A,0xC8,0xE2,0x87,0x53,0xD0,0xB3,0xC6, ++0x07,0x47,0x08,0xAE,0xEE,0x6D,0x5A,0x4F, ++0x2F,0x34,0x6C,0xF2,0x4E,0x54,0x08,0x05, ++0x25,0xAC,0xEB,0x95,0x91,0xF4,0x7E,0x30, ++0x0F,0x41,0xD9,0xB5,0xD3,0x6C,0xAB,0x40, ++0x2F,0x0C,0xCF,0x3F,0xD8,0x2A,0xEA,0x62, ++0x2F,0x83,0xC8,0x69,0xF8,0xF4,0x7A,0x3F, ++0x2F,0x5D,0xBA,0xF4,0x05,0xFD,0x64,0x85, ++0x22,0x7E,0x70,0x08,0xDF,0xE2,0x65,0x68, ++0x07,0x3B,0xC2,0xA4,0xDF,0x52,0xFA,0xAD, ++0x2F,0xE4,0x44,0xDD,0x33,0x8D,0x2C,0x65, ++0x27,0x9B,0x7A,0xF9,0x6C,0xBF,0x3E,0x6A, ++0x27,0xE7,0xF2,0xBD,0xC4,0xD7,0x7D,0x72, ++0x2F,0x06,0x22,0x2F,0x8C,0x99,0x74,0x76, ++0x27,0x8F,0x7E,0xFE,0x72,0x85,0xCC,0xF2, ++0x27,0xA7,0x8D,0xFD,0x42,0x8F,0x7A,0xC4, ++0x21,0x08,0x47,0x9B,0x35,0x0B,0xCB,0x6F, ++0x0F,0x79,0xC5,0xFD,0x27,0xE5,0xAE,0x6F, ++0x27,0x75,0x1E,0x56,0x9E,0xB7,0x03,0x35, ++0x2C,0x6A,0x8B,0x09,0x76,0xA5,0x32,0xF1, ++0x07,0x58,0xD3,0x55,0x9D,0x35,0x7A,0x2E, ++0x2F,0x74,0x2B,0xE0,0xFA,0x4C,0xF0,0x94, ++0x27,0xB9,0xAD,0xA5,0x57,0x6B,0x73,0x85, ++0x27,0xDF,0xE2,0x48,0x95,0x82,0x06,0x9E, ++0x21,0x09,0x8F,0x08,0x33,0xD2,0x44,0xAE, ++0x0F,0x01,0x09,0x0E,0xE8,0xCE,0x55,0xAF, ++0x2F,0x06,0xC3,0x3C,0x45,0x3D,0x6F,0x47, ++0x2B,0x78,0x42,0xB5,0xCB,0xFB,0xE9,0xB4, ++0x0F,0xDC,0x5D,0xCD,0x54,0x5E,0x2A,0x87, ++0x07,0xDD,0x50,0x14,0xC4,0x10,0x65,0xF9, ++0x0F,0xCA,0x75,0x48,0xFA,0x62,0x1B,0x5A, ++0x07,0x46,0x26,0xB8,0x91,0x94,0xC4,0x4D, ++0x07,0xDB,0xB4,0x18,0x8B,0x72,0xD9,0x29, ++0x0F,0xBC,0x66,0x4D,0x47,0xD6,0x49,0xEE, ++0x0F,0x0A,0xA3,0x8C,0x98,0xA7,0xE3,0x53, ++0x27,0xB5,0x26,0xD7,0x2E,0x6E,0xB4,0x74, ++0x22,0x3A,0x81,0xF3,0xF2,0xBF,0x01,0x7D, ++0x07,0xCB,0xF6,0x19,0xDA,0xC8,0x29,0xF0, ++0x26,0x0C,0x37,0x76,0xA6,0x20,0x6E,0x11, ++0x07,0x7E,0xE4,0x92,0x02,0x37,0x81,0xB4, ++0x27,0x02,0x82,0x4D,0xD6,0x53,0x10,0x6C, ++0x26,0xB7,0x93,0x39,0x03,0x73,0x2D,0xC9, ++0x0F,0x61,0xA8,0x64,0x31,0xFF,0xA6,0x3B, ++0x27,0xEF,0x92,0x83,0xB0,0xC9,0x91,0x8A, ++0x27,0x36,0x10,0x8C,0x0F,0x7B,0xA2,0x6F, ++0x2C,0x2B,0xBB,0xAC,0xA2,0x2F,0x41,0x7D, ++0x0F,0x96,0x06,0x2F,0x0E,0x9C,0xE5,0xC4, ++0x07,0xC7,0x0D,0xA3,0x73,0x83,0x5B,0xFE, ++0x07,0xCC,0x4A,0x0E,0x31,0x2F,0xA4,0x5E, ++0x2F,0xBC,0xAA,0x4F,0x6C,0x86,0x20,0x5C, ++0x27,0xF3,0x9B,0x22,0xFF,0x0C,0x5C,0x77, ++0x2F,0xA1,0x3E,0x50,0xB8,0x06,0xE3,0x50, ++0x2F,0x5E,0x79,0xDA,0xA3,0x7B,0xAB,0x3B, ++0x2F,0xD7,0x17,0x68,0xCD,0x39,0xF4,0x4D, ++0x2F,0x2C,0xE1,0xF9,0x0B,0x1F,0x77,0xD4, ++0x2F,0xD0,0x4C,0x8A,0x1F,0x90,0x56,0x31, ++0x2F,0x60,0x11,0xE1,0x0F,0xD5,0x91,0x8D, ++0x2F,0x78,0xCF,0xCA,0x9E,0xFF,0x68,0x5C, ++0x27,0xE5,0x03,0xC2,0x8B,0x5B,0xBE,0xC2, ++0x27,0xBC,0x12,0x48,0x79,0xDE,0x24,0x2E, ++0x27,0x6F,0x36,0xA9,0x5E,0xCC,0x2F,0xEE, ++0x2F,0x57,0x89,0xD4,0x7C,0xCB,0xC2,0xCF, ++0x27,0x1B,0xCF,0x7E,0x10,0xF0,0xDB,0x1D, ++0x27,0xC8,0x14,0x51,0x41,0x22,0xCD,0xCE, ++0x27,0x86,0x90,0xBB,0xA4,0x60,0xB5,0x38, ++0x2F,0xFC,0x26,0x6D,0x26,0x4F,0x07,0xA5, ++0x26,0x8B,0xBE,0x3A,0x86,0x4C,0x1E,0xFD, ++0x07,0xC2,0xA7,0xDE,0x06,0x63,0x17,0xCF, ++0x27,0x97,0x06,0x66,0x20,0x78,0xBE,0x49, ++0x2F,0x92,0x39,0x99,0x02,0x45,0x50,0x43, ++0x22,0x6A,0xAC,0x8E,0x09,0x48,0x5E,0xDE, ++0x0F,0x4F,0xC4,0xF8,0xAF,0x1E,0x68,0x3D, ++0x27,0x82,0x99,0x89,0x6F,0x92,0x52,0xFD, ++0x22,0xEE,0xBD,0xE7,0xBE,0x1B,0x3D,0x93, ++0x0F,0x11,0x2C,0x9F,0xC0,0x70,0x29,0xD9, ++0x0F,0xD7,0x2C,0x5C,0x0E,0x47,0xDF,0xFF, ++0x2F,0x14,0xA3,0xCA,0xE5,0x12,0xFB,0xEA, ++0x29,0x26,0x89,0x15,0xAE,0xCE,0xD0,0x68, ++0x0F,0xCF,0x38,0x06,0x11,0xD6,0x88,0x9C, ++0x2F,0x4A,0x16,0xF0,0xAB,0xF8,0x24,0x6C, ++0x27,0xD1,0xF4,0xEA,0x80,0x49,0xA5,0x2B, ++0x27,0x5F,0x4A,0x55,0xB8,0x43,0x5B,0xF5, ++0x23,0xFE,0x16,0x7A,0x7A,0x8E,0x22,0x9A, ++0x0F,0xE3,0xE5,0xA4,0xD9,0x3D,0xE5,0xF1, ++0x2F,0x02,0x3D,0xC8,0x77,0xC0,0xD9,0x36, ++0x2F,0x36,0x25,0x73,0xBF,0xA0,0x18,0x1C, ++0x2E,0x10,0x99,0x23,0x6A,0x34,0x59,0xB6, ++0x07,0x94,0x68,0xA5,0xEB,0xE8,0xFB,0x57, ++0x26,0x20,0x37,0x97,0x5B,0xF3,0xAD,0x91, ++0x07,0x34,0xD2,0x2C,0xAC,0xB4,0xF1,0x2D, ++0x2A,0xC0,0xEF,0x25,0x8C,0xF4,0xBA,0x35, ++0x0F,0x9B,0x27,0xD8,0x42,0x16,0x2F,0xB3, ++0x27,0x84,0x62,0x19,0x07,0xB8,0x4A,0xC4, ++0x27,0x2E,0x24,0x74,0x74,0x5C,0xF6,0xA2, ++0x2F,0xA8,0x2C,0x00,0x99,0xA9,0xAE,0xB8, ++0x27,0x51,0x5F,0x89,0x1F,0xC5,0xEB,0xF2, ++0x2F,0x9F,0x6E,0xFF,0x1C,0xE8,0xD5,0x12, ++0x2A,0xB5,0xCE,0x4F,0xEE,0x62,0x6B,0x01, ++0x07,0xF4,0x0E,0x27,0xD7,0xFE,0x60,0x50, ++0x27,0x6B,0x5F,0x4C,0x13,0x17,0xDB,0x4E, ++0x07,0x6B,0xA6,0xD6,0x64,0xE6,0x40,0xB4, ++0x27,0xAB,0xC3,0x98,0xB5,0x90,0x35,0xDA, ++0x27,0x1D,0xAA,0x49,0x00,0x9D,0x13,0xD4, ++0x2E,0x48,0x6E,0xFA,0x0A,0xC6,0xF3,0x49, ++0x07,0xCD,0x91,0x26,0x0E,0x77,0x69,0xEC, ++0x2F,0x31,0x38,0xCA,0x7F,0x0D,0xB3,0x60, ++0x27,0xF0,0x6E,0x1B,0xBF,0x2E,0x81,0x8C, ++0x27,0x49,0xAB,0xBB,0x8E,0x42,0x55,0x44, ++0x2F,0xB1,0x03,0x87,0x75,0xBC,0x77,0xD5, ++0x2F,0x5F,0x8F,0x62,0x5E,0xE3,0x89,0xB6, ++0x2F,0x99,0xFD,0xC3,0x01,0x2D,0xE7,0xB9, ++0x27,0x7C,0xBF,0xE9,0xBA,0x81,0x97,0xC4, ++0x2F,0x5A,0x5E,0xB2,0xBD,0x2E,0x82,0xC0, ++0x27,0xB7,0xC3,0x11,0xAA,0xFB,0x86,0xE4, ++0x2F,0x60,0x28,0x66,0xA8,0x87,0x56,0xE3, ++0x27,0xCC,0x5A,0x8F,0x5E,0xF3,0x83,0x1B, ++0x2F,0xC1,0x82,0x20,0x82,0x1D,0x4C,0x36, ++0x27,0x00,0x03,0x04,0xC5,0x86,0x5B,0x30, ++0x2F,0xFA,0xBD,0x6B,0xB8,0xAB,0xDB,0x0C, ++0x27,0x09,0x03,0xBC,0xED,0xBC,0xBD,0xF7, ++0x2F,0xE2,0xBA,0xD1,0x90,0x52,0xFB,0xD3, ++0x2F,0x5F,0x84,0x71,0x32,0x2C,0xDC,0xE4, ++0x27,0xA1,0x2A,0x6E,0xEF,0x09,0x67,0xC7, ++0x2F,0x64,0x7E,0xCC,0x3B,0xDF,0x85,0xCC, ++0x2F,0x2C,0x9C,0xC8,0xEE,0x7E,0xB9,0x16, ++0x2F,0x20,0xFF,0x70,0x65,0xC5,0x2E,0x72, ++0x2F,0x86,0x13,0x7B,0xCB,0x99,0xE2,0x21, ++0x2B,0xF8,0x5A,0x7E,0x9B,0x61,0xCF,0x56, ++0x07,0x2C,0x23,0xE2,0x86,0x26,0x20,0x6C, ++0x2F,0x5A,0x6B,0x8E,0xA6,0x99,0x79,0xAC, ++0x2F,0x6B,0x5D,0x84,0x10,0xF8,0x1A,0x10, ++0x27,0x6D,0xA8,0x8D,0x49,0x1B,0x71,0x06, ++0x27,0x2E,0x4C,0xA2,0xAC,0x10,0xD5,0x44, ++0x2F,0xF0,0xFF,0x21,0x4B,0x36,0x47,0xAE, ++0x2F,0xFF,0x33,0x5F,0x59,0xF4,0xB9,0x00, ++0x27,0x1F,0x4D,0x9B,0x07,0x13,0x85,0x73, ++0x27,0x95,0x8E,0xA3,0x6E,0x1E,0x83,0x78, ++0x27,0xB7,0xF7,0x33,0x2E,0xE0,0x0E,0x8A, ++0x27,0xB9,0xBB,0xA8,0xE3,0x9F,0xE4,0xB8, ++0x2F,0x1D,0x2A,0xFF,0x63,0x32,0x54,0xDA, ++0x2F,0x3B,0x50,0x74,0x42,0x35,0x60,0x9A, ++0x2F,0xEC,0xF8,0x4D,0xC2,0x9B,0x46,0x77, ++0x2F,0x68,0x74,0xF7,0xD6,0x10,0x92,0x27, ++0x2F,0x18,0x72,0xBF,0x52,0x4C,0x6E,0xB4, ++0x2F,0x1C,0xE9,0x82,0x82,0x56,0x48,0xAE, ++0x27,0xE2,0xC1,0xB4,0x76,0x9E,0x0F,0x16, ++0x2F,0x61,0x36,0x92,0x14,0x1E,0x8B,0x4E, ++0x2F,0xE9,0x70,0xBA,0xB2,0x9D,0x93,0x4F, ++0x29,0x5D,0xD7,0x3C,0x6C,0xF1,0xDF,0x3E, ++0x07,0xEC,0xAE,0xF0,0x46,0x07,0x9D,0xF8, ++0x27,0x84,0xE6,0x80,0x83,0xCA,0x1D,0x73, ++0x2D,0x22,0x93,0x89,0x54,0xCE,0xF0,0xC8, ++0x0F,0x46,0x7B,0x6A,0x3C,0x40,0xCE,0x1E, ++0x27,0x8C,0x25,0xE5,0x9B,0x12,0x2C,0x07, ++0x2F,0xE6,0x74,0xBE,0xD2,0x28,0xAE,0xD3, ++0x2F,0xB2,0xEB,0xDF,0xC9,0x59,0xC0,0x03, ++0x27,0x1D,0x1F,0x95,0x1F,0x5E,0xA6,0x15, ++0x2B,0x32,0x13,0xCD,0x8F,0xC8,0x77,0x61, ++0x0F,0xD6,0x5B,0x3A,0x6E,0xF3,0x60,0xDA, ++0x2F,0x0C,0x9A,0x06,0x4B,0x4B,0x1F,0x87, ++0x22,0xD1,0x0B,0x11,0x16,0x8C,0xA4,0xFD, ++0x07,0x8F,0x8A,0xFB,0x7D,0x94,0xAC,0xFE, ++0x2A,0xC1,0x1C,0x44,0xEB,0xE6,0x1F,0x60, ++0x0F,0xBB,0xB0,0xB4,0x83,0x61,0x4D,0xE6, ++0x27,0x28,0xA9,0xB8,0xF6,0xA8,0xCD,0x43, ++0x27,0x89,0xAA,0x8B,0x29,0x8A,0x7A,0x4D, ++0x2F,0xB1,0x0B,0x76,0xA1,0x33,0x87,0x99, ++0x27,0x0B,0xD9,0x56,0x14,0x2E,0x10,0xEC, ++0x27,0xED,0x2E,0x28,0xD1,0x51,0x67,0x38, ++0x27,0xEB,0xA2,0xBF,0xC8,0x6C,0x2B,0xAD, ++0x2F,0x68,0x26,0x16,0xFE,0xDD,0x74,0xFA, ++0x27,0x88,0xC5,0x35,0x9E,0x2D,0x1D,0x30, ++0x2F,0xAC,0xED,0x64,0x43,0x23,0x05,0x79, ++0x27,0x57,0x0B,0x26,0x32,0xFC,0x83,0x2D, ++0x2F,0xBC,0x7F,0x66,0x05,0xCB,0x6C,0xCC, ++0x2F,0xEC,0xDD,0x1E,0x44,0x3E,0x20,0x1E, ++0x2F,0x21,0x64,0x7D,0xEC,0xDB,0xA4,0x76, ++0x2F,0x58,0x18,0xA2,0xB6,0xA8,0x2B,0x33, ++0x24,0xB2,0x6A,0x10,0xA7,0xDD,0x6F,0xB4, ++0x07,0x0B,0x54,0xE7,0x88,0xCC,0x20,0x6B, ++0x2F,0x65,0x91,0xAD,0xD9,0xB3,0x19,0x51, ++0x29,0xE1,0x74,0x79,0xE1,0xF7,0xB2,0x98, ++0x0F,0x16,0xAD,0x9C,0xBC,0x51,0x5B,0xDE, ++0x2F,0x43,0x4C,0x92,0x39,0x2D,0x33,0x55, ++0x2B,0x7A,0x65,0xF8,0x5E,0x67,0x86,0x32, ++0x07,0x9F,0x96,0xFC,0x28,0xD1,0x20,0xA5, ++0x0F,0x7B,0xFD,0x4C,0x75,0xD8,0x69,0x9F, ++0x27,0x38,0x8A,0x4D,0xD6,0x50,0xBB,0xA5, ++0x2C,0xD6,0x5F,0x8E,0xEA,0xB3,0x67,0x68, ++0x07,0x86,0x77,0xD3,0x65,0xF9,0x3A,0xD9, ++0x27,0x00,0x0E,0x3F,0x45,0x48,0x20,0xFD, ++0x29,0x9C,0x6A,0xEC,0x96,0xAE,0x32,0x51, ++0x07,0x3B,0xF0,0x38,0xE7,0xBB,0x06,0x07, ++0x2F,0x16,0x10,0x2F,0x3F,0x5B,0xA5,0x82, ++0x2E,0x5D,0xDF,0x02,0x7C,0x30,0x5B,0xFD, ++0x0F,0x41,0x93,0xA5,0xD2,0xD8,0x32,0x28, ++0x2F,0xA0,0xBC,0x6D,0x47,0x12,0x41,0x53, ++0x0F,0x59,0x00,0xB0,0xF8,0xE0,0x59,0x2B, ++0x2F,0x95,0x18,0xBF,0xDA,0xFF,0xBF,0x26, ++0x24,0x94,0x29,0xA6,0x5C,0xA9,0x6E,0x85, ++0x0F,0xC6,0xD5,0x71,0x62,0xAE,0xF4,0xF8, ++0x07,0xF2,0x12,0x15,0xB3,0x84,0x5B,0x53, ++0x0F,0x8D,0xF3,0x42,0xE8,0xEE,0xB4,0xB1, ++0x27,0x62,0x1A,0x8C,0xF2,0xD0,0xF9,0x35, ++0x27,0xC3,0x49,0x39,0xBA,0xEF,0x7D,0xD5, ++0x2F,0x96,0x8F,0x22,0xCB,0x19,0x08,0x76, ++0x2F,0x58,0x37,0xBD,0x96,0x3A,0x0B,0xBF, ++0x2F,0xC2,0x57,0xA1,0x5E,0xB5,0x6B,0xFC, ++0x2C,0xE0,0x77,0x20,0xE6,0x93,0xDE,0x89, ++0x07,0x0E,0x3C,0xD9,0xA8,0x0C,0x0E,0xEE, ++0x27,0x1A,0xFF,0xAB,0x16,0xCE,0xE9,0x4D, ++0x0F,0x5E,0x49,0xA5,0x70,0x6B,0x74,0x98, ++0x0F,0xD8,0x35,0xB2,0x21,0xC8,0xAA,0x75, ++0x27,0xFF,0xC2,0x41,0xED,0x83,0xE3,0x63, ++0x2F,0x0C,0x8F,0x40,0x81,0x22,0x31,0x47, ++0x2F,0x00,0x41,0xEB,0x9F,0x99,0x32,0x2E, ++0x27,0xA0,0x44,0x11,0xAF,0xE0,0x03,0xAD, ++0x2F,0xE6,0x17,0x58,0x9E,0xD9,0x9B,0x6E, ++0x25,0xA0,0x8D,0xF0,0x8A,0x48,0x5B,0xBD, ++0x0F,0x83,0xA9,0xE1,0xDC,0x46,0x62,0x86, ++0x0F,0xA8,0xAB,0xF2,0x07,0xBB,0x87,0xA6, ++0x07,0x1B,0xAF,0x1E,0xCC,0xD2,0x34,0x5D, ++0x27,0x34,0xD3,0x5A,0xC7,0x6A,0x40,0x4E, ++0x27,0x65,0x3D,0xF2,0xA4,0xEA,0x4C,0xFB, ++0x07,0x18,0xAE,0xE6,0x58,0xE3,0xF9,0xD4, ++0x27,0x13,0x1B,0x85,0x8C,0xF1,0xC1,0x9C, ++0x22,0xBF,0xF7,0xB8,0x53,0xE8,0x97,0xCF, ++0x07,0x4B,0xE5,0xA0,0x84,0x67,0xA8,0xA1, ++0x2F,0x84,0xD2,0x6E,0x57,0x23,0x89,0x3E, ++0x2F,0x19,0xE5,0xB7,0xF0,0xB6,0x36,0x3C, ++0x27,0xD2,0x97,0x3F,0x47,0x74,0xF0,0x13, ++0x22,0xA8,0xEA,0x8E,0x31,0xA4,0xF4,0xA5, ++0x07,0x4D,0x6E,0x59,0x3E,0x99,0x31,0x3D, ++0x07,0x37,0x6F,0x83,0x06,0x76,0xC1,0x44, ++0x07,0x67,0x2B,0x91,0x3D,0xC7,0x1A,0xE5, ++0x27,0xBC,0xBC,0x76,0xA0,0x3D,0x6F,0x69, ++0x2F,0x41,0xBF,0xC7,0xB5,0x1E,0x13,0x0D, ++0x07,0xC8,0x82,0xA0,0xFD,0xE8,0xD1,0xF1, ++0x0F,0x8F,0x3C,0x44,0xD0,0x6B,0xD9,0xAE, ++0x2F,0xA7,0x21,0x1E,0xDE,0x3F,0x3A,0x74, ++0x27,0x79,0xBD,0x5C,0xAC,0xDC,0x44,0xDF, ++0x27,0x89,0x5A,0xC9,0x99,0xBE,0x07,0xF8, ++0x2A,0x9B,0x11,0x8D,0xCD,0x9B,0x99,0x82, ++0x07,0x5D,0xFE,0xC5,0xF0,0x36,0xB5,0x2B, ++0x2F,0x82,0x40,0xA3,0xED,0x4F,0x2E,0xA1, ++0x2F,0x83,0xDC,0xB0,0x88,0xAC,0x15,0x2C, ++0x27,0xAF,0x43,0x4A,0x42,0x9F,0x5A,0x50, ++0x2A,0xE6,0x3F,0x0E,0x35,0xA5,0xFC,0x28, ++0x0F,0xF0,0x2B,0x7A,0x3D,0x4E,0xC8,0x8A, ++0x27,0x1D,0x72,0xD7,0x9A,0x40,0x98,0xEA, ++0x27,0x3D,0x1F,0xA8,0xD6,0xC4,0x03,0x88, ++0x27,0x4F,0x48,0xE9,0x82,0x03,0x57,0x19, ++0x29,0x4E,0xC4,0xE2,0x9B,0x96,0x18,0x06, ++0x07,0x1E,0xDE,0x8C,0xD9,0xF5,0xB6,0x48, ++0x2D,0x46,0x36,0xCD,0xDB,0x96,0x2D,0x6E, ++0x07,0xB6,0xF1,0x40,0xE9,0x23,0x71,0xAE, ++0x07,0x52,0x9C,0x83,0x0E,0x8D,0x47,0x40, ++0x07,0x71,0x98,0x49,0xD6,0xF1,0x88,0x51, ++0x07,0x1F,0x22,0x63,0x56,0x41,0xCD,0x4C, ++0x2F,0xA3,0xF3,0x02,0xF0,0x87,0xF3,0x05, ++0x2F,0xFD,0x4A,0x64,0x4C,0xA5,0x55,0x19, ++0x27,0xB0,0x8B,0x10,0x5F,0x65,0x68,0xC2, ++0x27,0xB3,0x21,0x8B,0xCB,0xF4,0xE3,0x0E, ++0x27,0x47,0x75,0x5E,0xB7,0x1E,0x9F,0xF8, ++0x2E,0x01,0xC9,0x0F,0x26,0xB7,0xA6,0x9C, ++0x07,0x0B,0xAD,0x07,0xA6,0xF6,0xC3,0xAD, ++0x22,0x19,0xB7,0x88,0x85,0x95,0x44,0x10, ++0x0F,0x5C,0xFD,0xCB,0x1B,0x66,0xCD,0xA7, ++0x07,0x42,0xAD,0xC2,0xD3,0xE6,0xE0,0x9D, ++0x07,0xA0,0x9B,0x44,0x03,0x54,0xAB,0x1C, ++0x07,0x55,0x55,0x65,0x32,0x9D,0xC9,0xF4, ++0x27,0x33,0xE4,0xED,0x63,0xFF,0x61,0x6D, ++0x2A,0xB9,0x32,0x31,0x75,0x20,0xAE,0x1E, ++0x0F,0xBB,0xEF,0xCE,0xAF,0x23,0x79,0xEB, ++0x2B,0x6B,0xA3,0xF8,0xAB,0x35,0x49,0xA2, ++0x0F,0x42,0xEA,0x72,0x5B,0xC0,0x65,0xA6, ++0x25,0xDA,0x6C,0x31,0x6B,0xC2,0x60,0x92, ++0x07,0xA5,0xCE,0x5C,0xB1,0xD7,0x95,0x2E, ++0x27,0x41,0xCC,0x30,0x61,0x48,0xB0,0xBB, ++0x2F,0xD7,0x5A,0x16,0x0D,0xAD,0x83,0xD1, ++0x2F,0x53,0x85,0x0B,0x54,0x37,0xB5,0x9D, ++0x27,0x47,0xA2,0xF5,0x48,0x09,0x1F,0x4F, ++0x2F,0xA4,0xCE,0x27,0xA1,0x67,0x49,0x06, ++0x27,0x8B,0x3B,0x0D,0x36,0x51,0x5F,0xB4, ++0x27,0x71,0xE4,0xCE,0x7E,0x2D,0xAF,0x84, ++0x2D,0x17,0x74,0x8D,0x47,0x11,0x60,0x77, ++0x0F,0xAC,0xED,0x36,0x16,0x91,0x86,0x1A, ++0x27,0x2F,0x1F,0x4B,0x91,0x40,0xD0,0xA8, ++0x2F,0xD9,0x65,0x9F,0x4F,0x07,0x34,0xD8, ++0x2F,0x0B,0xDA,0x25,0x46,0xC4,0xC0,0x8D, ++0x27,0x86,0xBE,0x26,0x4F,0xD0,0xB4,0x3C, ++0x29,0x05,0xE4,0x55,0x9E,0x2F,0xEE,0x12, ++0x07,0xD1,0x35,0xBC,0x90,0x8C,0x89,0x96, ++0x0F,0x82,0xA3,0xCE,0x30,0xFE,0x3B,0x84, ++0x0F,0xC3,0x13,0x33,0xBB,0x0D,0x43,0x84, ++0x07,0xE9,0x69,0xD1,0xCA,0xF5,0x56,0xD7, ++0x0F,0x60,0x19,0xE8,0x41,0xE2,0xA3,0x70, ++0x27,0xBE,0xD8,0x29,0x29,0x9B,0x63,0x4B, ++0x2F,0xA0,0x91,0xD7,0x54,0xC8,0x4A,0xB9, ++0x07,0x4C,0x89,0x15,0x1C,0x20,0x25,0x8A, ++0x07,0xA4,0x4F,0x42,0x59,0xC1,0x58,0x6B, ++0x07,0x41,0x62,0x28,0x73,0x87,0xEF,0x5A, ++0x27,0x42,0x72,0x1C,0xE3,0xBA,0xFB,0x27, ++0x2F,0x83,0x5C,0x8D,0x3F,0x2B,0xC7,0xF2, ++0x2F,0x0C,0xBB,0x85,0x96,0x1A,0xCF,0x3B, ++0x27,0xE1,0xB8,0x39,0xFE,0x30,0xDC,0x68, ++0x27,0xBD,0x90,0x8E,0x94,0x78,0xEA,0x6C, ++0x2F,0x9A,0xFE,0x85,0x9D,0xF2,0xC6,0x2D, ++0x27,0x71,0x36,0xFF,0x15,0x75,0x4A,0x36, ++0x27,0xDC,0x70,0x3C,0xAF,0xFD,0x6E,0x54, ++0x27,0x96,0x07,0x2E,0x50,0x9E,0xE5,0xFE, ++0x2F,0xBC,0x7E,0xCB,0x7B,0xB8,0xA9,0x9A, ++0x2F,0x26,0x82,0x68,0x6A,0x82,0xF7,0xD9, ++0x27,0x02,0xD5,0x79,0x01,0xE0,0x97,0x13, ++0x27,0xC8,0xFD,0x78,0xB3,0xF2,0xF2,0xDB, ++0x2F,0x09,0x03,0x67,0x8E,0xB7,0x9F,0x15, ++0x2F,0xCD,0xD1,0xCC,0x36,0x2D,0xDD,0xB1, ++0x27,0x3E,0x42,0xC2,0xB4,0xEE,0x8B,0xEC, ++0x2F,0x08,0x87,0x07,0x03,0xC7,0xFF,0x84, ++0x27,0xBC,0x71,0x93,0xD9,0xAB,0xC6,0xE4, ++0x2F,0x84,0x15,0xA1,0xF0,0x46,0xAA,0xB1, ++0x2F,0xDD,0x3D,0xDB,0xDC,0x70,0x2E,0xDE, ++0x2F,0x28,0x3A,0x17,0x2A,0xE1,0xCB,0x60, ++0x27,0x61,0x3C,0xCF,0x2F,0x21,0xD7,0x96, ++0x2F,0xB9,0x56,0x60,0xCF,0x0B,0xF2,0xCB, ++0x07,0xD3,0xA6,0xF9,0xCC,0xDD,0xC5,0xAC, ++0x07,0xC7,0xA6,0x5F,0x5D,0x32,0xBE,0x91, ++0x27,0x55,0x54,0x1F,0x91,0x85,0x76,0xFF, ++0x27,0xB2,0x9F,0x8F,0x9D,0x71,0xBA,0x9E, ++0x27,0xAF,0x0D,0xCE,0x7C,0xA9,0x83,0xD3, ++0x27,0x1D,0x1B,0x81,0x60,0x1A,0xEE,0x9A, ++0x2F,0xF4,0x4C,0x29,0xE2,0x22,0x4A,0x6E, ++0x27,0x52,0x8C,0xFE,0xE7,0x98,0xF7,0xF6, ++0x24,0x06,0xB4,0xDA,0x51,0x87,0x8F,0x43, ++0x07,0xA6,0x4C,0xB5,0x78,0xE0,0x9D,0xB8, ++0x27,0xAC,0x24,0x74,0x88,0xF0,0x02,0x73, ++0x2F,0x51,0xD3,0x63,0x2E,0xC0,0xC8,0x8F, ++0x27,0x5E,0xB1,0x90,0xA6,0x9E,0xA1,0xD6, ++0x27,0x5F,0x8F,0xBD,0xEC,0x2F,0xDE,0x6F, ++0x27,0x40,0x46,0x2C,0xED,0x29,0xD8,0xC7, ++0x2F,0x8C,0x53,0xE4,0x5E,0xC9,0xD6,0x62, ++0x2F,0x7B,0x5A,0x08,0x67,0x80,0x4B,0x17, ++0x2F,0x31,0x21,0x06,0x58,0x3E,0xC4,0x35, ++0x2F,0x5F,0xCB,0x13,0xB6,0xBD,0x89,0xAE, ++0x23,0xAA,0x75,0xDC,0x5B,0xBA,0xC4,0x63, ++0x07,0x6C,0xE8,0x2F,0x00,0xD6,0x14,0x74, ++0x2F,0x65,0x42,0x40,0x55,0x36,0x8C,0x79, ++0x2F,0xA2,0x2F,0x2F,0xDD,0xB7,0x4C,0x91, ++0x2A,0x20,0xF1,0xE9,0xAC,0xE1,0xE5,0xA2, ++0x07,0x1D,0xBD,0x68,0x65,0xE7,0xFE,0x54, ++0x05,0xC9,0x72,0xB8,0x85,0x42,0x17,0x93, ++0x2D,0xB8,0xAD,0xAF,0x93,0x9B,0xE6,0x65, ++0x0F,0xEC,0x5A,0x0A,0x08,0x3B,0x38,0xFD, ++0x27,0x33,0x56,0xB5,0xEA,0xE5,0xC8,0x12, ++0x2F,0x42,0x93,0x5C,0xDB,0x0C,0xFC,0x87, ++0x27,0xA3,0x46,0xED,0x25,0x93,0xF3,0xA8, ++0x27,0x25,0xEB,0x58,0xD1,0x38,0xEF,0x48, ++0x2F,0x19,0xCA,0x26,0x15,0x60,0x73,0x6E, ++0x27,0x5C,0x7A,0x54,0xC3,0x92,0xD2,0x7C, ++0x27,0x6F,0x36,0xE1,0xD4,0xCB,0xF0,0xA0, ++0x27,0xE6,0x68,0xB3,0x8C,0x1F,0x09,0x7F, ++0x27,0x5B,0xAD,0x4B,0x1E,0x90,0x18,0x8F, ++0x27,0xDE,0xD8,0x4A,0x0C,0xCC,0xBF,0x78, ++0x2F,0x4A,0x8B,0xB9,0xA4,0xCD,0x5F,0xF9, ++0x2F,0x8F,0x4F,0x37,0x5E,0x02,0x50,0xFF, ++0x2F,0xF3,0xE6,0xC6,0xA9,0x6D,0xB4,0xBE, ++0x2F,0x54,0x13,0x9A,0x7E,0xB1,0xDF,0xC9, ++0x2F,0x32,0xAA,0x5A,0x88,0x86,0x1F,0x17, ++0x27,0x71,0xD5,0xB8,0x42,0xF1,0xAC,0xB0, ++0x2F,0x50,0x9B,0x8F,0x99,0xBD,0x15,0x70, ++0x2F,0xBA,0x18,0xE8,0x71,0xCA,0x51,0xA2, ++0x27,0xE2,0xF7,0xB5,0xF7,0x45,0x23,0x97, ++0x2F,0x7E,0xC7,0x5C,0x9F,0x8A,0x25,0x40, ++0x27,0x15,0xE2,0x81,0x05,0x2D,0x46,0xD6, ++0x27,0x44,0xAD,0xA0,0xDB,0x83,0x83,0x2F, ++0x27,0xD8,0x41,0x1C,0x3B,0xBE,0xF9,0x9B, ++0x27,0xB5,0x16,0xEC,0x2E,0x29,0x5E,0x08, ++0x2F,0x40,0x96,0x7A,0xD8,0x95,0xE6,0xC0, ++0x27,0x38,0xE7,0xFE,0x9C,0xC9,0x57,0x26, ++0x27,0x97,0x19,0x8B,0x8E,0x54,0x3F,0xBB, ++0x27,0x4E,0x18,0xB4,0xE0,0x60,0x11,0x9B, ++0x2F,0x67,0xF4,0xFE,0xE7,0x03,0xBD,0x19, ++0x2F,0x4D,0x78,0x06,0xBC,0xD3,0xC4,0x11, ++0x27,0x34,0xF0,0x24,0x88,0x9D,0x5A,0xCB, ++0x2F,0xEF,0xD7,0x93,0x32,0xE1,0x18,0x07, ++0x27,0x87,0xAF,0x51,0x01,0xE1,0x95,0x7C, ++0x27,0x4A,0xE1,0x39,0xDC,0xF9,0xF0,0xC8, ++0x27,0x18,0x65,0x5C,0x1A,0xA4,0x8C,0x5B, ++0x2F,0xE4,0xE2,0xD2,0xC4,0xF5,0x9E,0x58, ++0x23,0x3F,0x4E,0x68,0xD8,0x35,0xC9,0x90, ++0x27,0x3D,0x43,0x65,0xEE,0xA7,0xD2,0x8C, ++0x2F,0x1E,0x50,0x2C,0x54,0x0D,0x8A,0xEA, ++0x27,0xE5,0xE8,0xCE,0xC4,0x56,0xF3,0xF2, ++0x27,0x51,0x42,0xB0,0x9D,0x96,0xFC,0x3E, ++0x2F,0x2F,0xAA,0x4E,0xA0,0xF6,0x4B,0xD3, ++0x2F,0x7D,0xE9,0x47,0x60,0x63,0xC9,0x21, ++0x27,0x36,0x31,0xAB,0x7A,0x89,0xA4,0x51, ++0x2F,0xC9,0x16,0x05,0x9D,0x0E,0xEB,0xC7, ++0x2F,0x4C,0x14,0x23,0x1E,0x8E,0x76,0x4F, ++0x2F,0x01,0x71,0xA1,0xFE,0x88,0xCD,0x3B, ++0x27,0x2C,0x71,0xAA,0x8F,0xCA,0x71,0x20, ++0x27,0xB9,0x5E,0x57,0xED,0x5F,0xBF,0x93, ++0x2F,0x33,0xB1,0xFF,0x1C,0xDA,0x6F,0x7A, ++0x2F,0x4A,0xC1,0x9E,0x84,0x87,0xB5,0x32, ++0x2F,0x4E,0xF8,0x25,0xDF,0x69,0xCA,0xAF, ++0x27,0x05,0x75,0x0F,0xDC,0xD3,0xD7,0x18, ++0x2F,0x37,0xCA,0x47,0xD8,0x9E,0xD3,0xAD, ++0x27,0x73,0xCE,0x0C,0xEC,0xF9,0xAC,0x79, ++0x27,0x1E,0x02,0xB1,0x21,0xF3,0xC0,0xFA, ++0x2F,0xCA,0x6E,0x29,0x6D,0xD1,0xD3,0xB6, ++0x27,0x7B,0x0B,0x11,0x9E,0xED,0x8F,0x02, ++0x27,0xD5,0x29,0x1A,0xE3,0xB7,0x7C,0x47, ++0x2F,0xC7,0x5D,0x86,0x7E,0xDC,0xB4,0x09, ++0x2F,0x29,0x08,0xC0,0x57,0x17,0x2F,0x3A, ++0x2F,0x0B,0x14,0xCB,0xB5,0xF7,0xC2,0xA2, ++0x2F,0x20,0x17,0x0A,0x80,0x98,0x56,0xBB, ++0x2F,0xA6,0x1A,0x8E,0x43,0xCA,0x20,0xE7, ++0x2F,0xE5,0xCE,0xA7,0xC3,0xA6,0x74,0xFC, ++0x27,0x4B,0xF2,0x16,0x88,0xA3,0x67,0xCE, ++0x2F,0xD6,0x0C,0xC7,0x39,0x88,0x87,0xBB, ++0x27,0x57,0x64,0xCF,0xDD,0x45,0x69,0x1E, ++0x27,0xE2,0xF5,0x2F,0x79,0x58,0x4B,0x95, ++0x27,0xD9,0x6A,0x7A,0x05,0x11,0x68,0x6E, ++0x27,0xDF,0x9B,0xDF,0xD8,0x89,0xDF,0x7B, ++0x27,0x55,0x47,0xA4,0x4D,0x1C,0xBD,0xC9, ++0x27,0x43,0x0A,0x75,0xC3,0xF9,0x59,0xBD, ++0x2B,0x30,0x1A,0x70,0x07,0xD7,0x3D,0xA5, ++0x27,0x84,0xA2,0x33,0xBC,0xE1,0x70,0x75, ++0x27,0x79,0x87,0xD8,0x4F,0x3F,0xEB,0x8C, ++0x27,0x76,0xCA,0xD2,0xA2,0x3B,0x35,0xD3, ++0x27,0x2D,0x06,0x13,0x76,0x7E,0xE3,0x57, ++0x27,0x90,0x99,0xE9,0x06,0x2A,0x71,0xF6, ++0x2F,0x70,0xB5,0x04,0x80,0x4B,0x07,0xCF, ++0x22,0x77,0x70,0x3F,0x96,0x4A,0x08,0xB7, ++0x07,0x6E,0x62,0xBA,0x1E,0x92,0xA1,0xE6, ++0x2F,0x31,0xB6,0x1D,0x0F,0x07,0x49,0x1B, ++0x2A,0xBC,0x52,0x35,0xAF,0x0E,0x17,0xE7, ++0x07,0x03,0xEB,0x38,0x38,0xBB,0x5B,0x08, ++0x26,0x2C,0x1F,0xEA,0x14,0xEB,0xB0,0x07, ++0x07,0xA6,0xAA,0x2C,0x3F,0x9C,0x1A,0x5C, ++0x07,0x7D,0x4F,0xDC,0x14,0x19,0x66,0x48, ++0x27,0xA3,0x39,0x90,0xE1,0xEE,0x81,0x90, ++0x21,0x73,0x87,0x44,0x11,0x85,0x49,0x25, ++0x0F,0xBA,0xAF,0x40,0x4D,0x9E,0x10,0x0F, ++0x27,0x90,0x52,0x55,0x09,0x8E,0x4A,0x5F, ++0x21,0xAA,0x3B,0x01,0xE8,0xC6,0x5E,0xDC, ++0x0F,0xC2,0xA5,0x37,0x21,0x06,0x94,0x69, ++0x0F,0x5F,0xCD,0x94,0xDB,0xF0,0x21,0x4C, ++0x27,0x69,0x34,0x86,0x82,0x8F,0xBD,0xB1, ++0x29,0x37,0xD2,0x8E,0x66,0x28,0x38,0x1A, ++0x0F,0x77,0xE4,0x2D,0xCC,0x34,0x01,0xC8, ++0x0F,0xC0,0x3A,0x74,0x78,0xC3,0x33,0xA9, ++0x2F,0x8D,0xB3,0x1D,0x0C,0x57,0xC2,0x5D, ++0x29,0x8E,0xC2,0xB5,0x31,0x34,0x12,0xB5, ++0x07,0x38,0xD7,0xF8,0x38,0x3A,0x6E,0xF0, ++0x27,0x8D,0x74,0xA2,0x55,0x38,0x5A,0xB9, ++0x29,0x21,0x4B,0x99,0xE7,0xFF,0xE2,0xCB, ++0x0F,0xA9,0xA2,0x82,0xC3,0xF1,0x07,0x74, ++0x27,0x98,0x2A,0xD3,0xE3,0x5E,0x22,0x98, ++0x21,0x0A,0x00,0x1A,0x44,0x72,0x8B,0x05, ++0x07,0xEA,0xEE,0xFA,0x3F,0xD3,0x17,0xBA, ++0x27,0xB1,0x89,0x44,0xB3,0x5F,0x88,0x5D, ++0x29,0x03,0x37,0x09,0x99,0xEC,0x8E,0xA0, ++0x07,0x38,0xE2,0x39,0x11,0x4C,0x80,0x2E, ++0x27,0x98,0x4E,0x18,0x70,0xA0,0x6E,0x8D, ++0x2A,0x24,0x82,0x6D,0xC9,0x5A,0x67,0x4D, ++0x07,0x34,0xAA,0x51,0xB5,0x4F,0x3C,0xE4, ++0x27,0x28,0xFD,0x15,0xFC,0x45,0x8A,0x03, ++0x21,0xE7,0x0E,0xD4,0x7B,0xDE,0x72,0x94, ++0x07,0xB6,0xE8,0xBD,0x35,0x8B,0x1B,0x64, ++0x2F,0x27,0x42,0x9B,0x7B,0xFA,0x51,0x1A, ++0x2A,0x5F,0x58,0xE1,0x84,0xB9,0x69,0xC3, ++0x0F,0xE2,0x1C,0xE3,0xB5,0xFD,0xEA,0xF3, ++0x27,0x6C,0x54,0x14,0x6B,0x39,0xEA,0xDC, ++0x22,0xA5,0xB0,0xBF,0x99,0xD7,0xBA,0x84, ++0x0F,0x13,0x40,0x0F,0x79,0x46,0xAD,0x4A, ++0x27,0xFD,0xF1,0xED,0x39,0x93,0x95,0xCE, ++0x22,0xAF,0xC3,0x8F,0x60,0xD7,0xB2,0x58, ++0x07,0x86,0xE6,0x0E,0x7C,0x1F,0x0B,0x80, ++0x27,0x05,0x0B,0xBA,0xDA,0xD9,0x03,0x13, ++0x2B,0x9F,0x2D,0x9E,0xC0,0x46,0x4C,0x59, ++0x07,0x6E,0x77,0x67,0x4C,0xAA,0xDE,0xBA, ++0x2F,0x24,0x45,0x78,0x63,0x12,0x6D,0x25, ++0x07,0x61,0x67,0x20,0xCE,0xA3,0xCC,0x1E, ++0x2F,0x92,0xCE,0x1A,0x19,0x01,0x9D,0x19, ++0x23,0xDD,0xF4,0x07,0x66,0x58,0xC2,0x12, ++0x07,0x90,0x94,0x02,0x67,0xAE,0x89,0xE6, ++0x2F,0x05,0xEF,0x23,0x1E,0x45,0x73,0xD9, ++0x22,0x55,0x57,0xAD,0xA0,0xEF,0x2C,0x65, ++0x0F,0x6B,0x35,0x28,0xBA,0xD8,0xA3,0x78, ++0x27,0xAF,0x24,0x92,0x35,0x57,0xA6,0x1A, ++0x22,0x81,0xB3,0x5D,0x1F,0x8C,0x94,0x00, ++0x07,0xE0,0xFF,0x89,0x43,0xB1,0x05,0x4C, ++0x27,0x92,0x16,0xFB,0x7E,0xE0,0xC4,0x6D, ++0x29,0xA9,0x2D,0x73,0xEB,0xD7,0x2E,0xC1, ++0x07,0x4D,0x86,0x93,0xF8,0xAD,0xAC,0x8C, ++0x2F,0xE7,0x47,0xDA,0xE6,0x47,0xEA,0xC8, ++0x2A,0x4A,0x0B,0xA4,0xF8,0x15,0x9A,0x70, ++0x07,0x96,0xB7,0x90,0x05,0x25,0xFE,0xFA, ++0x27,0x7C,0xB1,0xF3,0x81,0x6D,0xCA,0x96, ++0x22,0xC2,0x5F,0x96,0x8B,0x5F,0x96,0x86, ++0x07,0x6E,0xE8,0xEE,0xE9,0xC0,0xC7,0xBB, ++0x27,0xFF,0x8C,0x64,0xDC,0x9A,0xE2,0xAF, ++0x2A,0xA2,0xBF,0xE0,0x70,0x83,0xFF,0xDD, ++0x0F,0x5A,0xC2,0x91,0x0A,0x32,0x5C,0xA9, ++0x27,0xD8,0x1F,0x43,0x7C,0x93,0x0F,0xC6, ++0x22,0x0E,0x19,0x88,0x9F,0xAE,0xB0,0x86, ++0x0F,0x40,0xB2,0x76,0x77,0x64,0xD7,0x63, ++0x2F,0x52,0x03,0xFF,0xF6,0x05,0x4A,0x65, ++0x2A,0xE0,0xC0,0xEB,0xE4,0x0F,0x4C,0xCB, ++0x0F,0x55,0xC8,0xA7,0x01,0x72,0x78,0xF8, ++0x2F,0xC5,0x2A,0xD2,0x81,0x53,0x40,0xBC, ++0x21,0x52,0x1D,0xA4,0xB7,0x6D,0xC1,0xE6, ++0x07,0xF2,0x49,0x60,0x4E,0x77,0x27,0x8C, ++0x27,0x58,0x1B,0xFF,0x51,0xEF,0xA7,0xAA, ++0x22,0x32,0x08,0xEB,0x27,0x95,0x8D,0x28, ++0x0F,0x07,0x2C,0xFA,0x76,0xCB,0xC0,0xBE, ++0x2F,0x40,0xC8,0x89,0x62,0xCD,0xC3,0x2E, ++0x2A,0x2E,0xFE,0x62,0x40,0xA0,0x91,0x79, ++0x07,0xF1,0xFF,0xEF,0x77,0xEB,0x81,0x5B, ++0x2D,0x22,0x33,0xC0,0xE8,0x86,0xCA,0xD8, ++0x0F,0x6D,0xF8,0x2E,0x72,0xBA,0x29,0x56, ++0x2F,0x6F,0x81,0x79,0x57,0x24,0x42,0xC0, ++0x2A,0xC4,0xF3,0x1E,0x5B,0x3A,0x98,0x82, ++0x0F,0x49,0x64,0xE1,0x4A,0x1E,0x6A,0x05, ++0x2F,0x27,0xED,0x72,0xFD,0x1A,0x58,0xDC, ++0x22,0x9B,0x50,0xAA,0xFD,0x4F,0xA1,0x8E, ++0x0F,0xE9,0x5C,0xA9,0xB3,0x94,0xF0,0x68, ++0x27,0x1C,0x13,0x06,0xE1,0xC1,0xC3,0x12, ++0x22,0x70,0x8F,0xDA,0xC4,0x43,0x98,0xAF, ++0x0F,0x9B,0x10,0xAC,0x80,0x56,0xD7,0xD2, ++0x25,0xB1,0x56,0x71,0xC7,0x7A,0x35,0x91, ++0x07,0x21,0xE4,0x7D,0xE0,0xBA,0x73,0x2E, ++0x27,0x73,0x75,0xFE,0x9D,0xE6,0x1F,0x6D, ++0x2A,0x7B,0x5F,0x96,0x09,0x58,0x7F,0xC2, ++0x07,0x91,0xEB,0x89,0x43,0x58,0x2C,0x7F, ++0x2F,0xDE,0x00,0x58,0xC3,0xDE,0x74,0x0C, ++0x2A,0x94,0x21,0x74,0x45,0x2C,0x8A,0xC2, ++0x0F,0x01,0x39,0xC4,0xC6,0x64,0x79,0xFC, ++0x27,0xB5,0x64,0x24,0xFD,0xA6,0xE9,0x46, ++0x0F,0xD0,0x98,0x52,0xFF,0xDE,0x21,0xDC, ++0x27,0xCC,0x40,0x70,0xBD,0x24,0xB2,0x40, ++0x2A,0xFE,0x20,0x77,0xBC,0x73,0x6E,0x36, ++0x0F,0xC8,0x03,0xF3,0x3B,0x64,0x2E,0xC9, ++0x27,0x46,0x0F,0x46,0x8E,0x57,0x83,0xC4, ++0x2A,0x24,0xCD,0xCB,0x45,0xED,0xD1,0x23, ++0x07,0x2A,0x38,0x14,0xE8,0x9D,0x13,0x49, ++0x0F,0xDD,0xEF,0x67,0x1E,0x1E,0x83,0xAF, ++0x27,0x30,0x26,0xD9,0xD8,0x18,0x5A,0xA3, ++0x2B,0x3D,0x70,0xCC,0xFB,0xE2,0xDA,0x5D, ++0x0F,0xAF,0x77,0x5A,0x46,0x32,0x3B,0x28, ++0x2F,0x67,0x02,0xFA,0x0E,0x27,0x70,0x8A, ++0x23,0x62,0x15,0xFB,0xCE,0xD0,0xC6,0x4D, ++0x0F,0xA8,0xBF,0xEB,0x17,0xD2,0x6C,0xCC, ++0x2F,0xC1,0xE0,0x39,0xFE,0x3C,0x09,0x10, ++0x2B,0xC0,0xBE,0xDF,0x7E,0x61,0x6D,0xC5, ++0x0F,0x97,0x3F,0x8F,0xEE,0x9E,0x80,0xB2, ++0x2F,0x89,0x28,0xB5,0xCE,0x93,0x65,0x13, ++0x22,0x27,0x88,0x4D,0x02,0xDE,0x04,0x7D, ++0x0F,0x1A,0xA6,0x41,0x94,0x67,0xCA,0x79, ++0x27,0xFE,0x53,0xA1,0xBC,0xB2,0xC5,0x7D, ++0x23,0x4B,0xFF,0xF3,0x88,0x21,0x27,0x58, ++0x07,0xEB,0xAB,0x49,0x69,0x85,0xE8,0x2D, ++0x2F,0x1D,0xFE,0x8C,0x1B,0x08,0x7D,0x57, ++0x23,0xDF,0xD6,0x43,0xC7,0xD2,0x2A,0x3C, ++0x0F,0x59,0x85,0xAE,0x5E,0xBE,0xF1,0xE9, ++0x2F,0x4C,0x06,0x7A,0x2F,0xFC,0x8E,0x9F, ++0x07,0x13,0x4B,0x58,0x7C,0x7C,0xC7,0x70, ++0x2F,0x11,0x2A,0xF5,0xF3,0xF6,0x77,0x9C, ++0x22,0x1C,0xC9,0x3C,0x16,0xBA,0x17,0x4C, ++0x0F,0xF4,0xD5,0x22,0x81,0xAA,0xD4,0x13, ++0x27,0xF5,0x58,0x06,0xDB,0x06,0xD6,0x90, ++0x2D,0x10,0x92,0x8F,0x6D,0xB4,0x57,0x75, ++0x0F,0x20,0x11,0x86,0xB5,0x2A,0x68,0xF2, ++0x27,0x6E,0xFA,0x08,0xD6,0xEB,0xE7,0x9D, ++0x24,0x66,0x95,0xAC,0x68,0xF3,0xE0,0x03, ++0x07,0x78,0x8D,0xD1,0xD8,0x7A,0x4D,0x72, ++0x27,0x50,0xD3,0x8D,0xB3,0x58,0x04,0x26, ++0x27,0x9E,0xEF,0x7A,0xE5,0x40,0xF1,0x43, ++0x07,0x8E,0x8D,0xED,0xEA,0xCF,0xC7,0x3B, ++0x27,0xC3,0x59,0x7B,0xAB,0x73,0xC5,0x7C, ++0x27,0xC0,0xF2,0x8F,0xF7,0x07,0xFF,0x0D, ++0x07,0xCE,0x74,0x6C,0x2C,0xDD,0x68,0x6D, ++0x2F,0x69,0x21,0x1F,0xEF,0x9A,0xEE,0xF9, ++0x2F,0xEE,0x69,0x55,0xB3,0x15,0x58,0x35, ++0x07,0xF1,0x17,0x33,0x20,0xE8,0x41,0x80, ++0x2F,0x7D,0x4E,0x68,0x4E,0xA2,0x50,0x94, ++0x2F,0x31,0xB2,0x9A,0x37,0xF3,0xBB,0x05, ++0x07,0xBC,0x11,0xB1,0x3C,0xED,0xFF,0x44, ++0x27,0x93,0x2D,0x61,0x43,0x38,0x6B,0xC2, ++0x2F,0x1F,0x3E,0xEE,0x05,0xF2,0xCA,0x91, ++0x07,0x05,0x9A,0xFF,0x85,0xD3,0x21,0x17, ++0x27,0x22,0x3C,0x60,0x1C,0xBA,0xA2,0xD6, ++0x2F,0x07,0xFF,0x12,0xEE,0x5E,0x1C,0x1C, ++0x07,0x2F,0x39,0xA3,0x8E,0xDC,0x29,0xED, ++0x0F,0x78,0x1C,0x7E,0xF3,0x9B,0x8A,0xE5, ++0x0F,0xB3,0x57,0xCA,0xA5,0xC6,0x70,0x94, ++0x07,0x3F,0x54,0x83,0xF1,0x1D,0xEB,0x1C, ++0x0F,0x71,0xCB,0xCB,0x35,0x16,0x70,0xCF, ++0x07,0x9B,0x6C,0x52,0xBE,0xDC,0xE9,0x53, ++0x07,0x1E,0xA5,0xB4,0xE5,0xDB,0x90,0xC8, ++0x07,0x09,0x8A,0xC3,0xD0,0x44,0xA3,0xC2, ++0x27,0x88,0x28,0x62,0xFD,0x5D,0x04,0x32, ++0x23,0xE6,0xBE,0xD2,0x75,0x3D,0xF2,0x31, ++0x0F,0x24,0x16,0xFE,0x9F,0x59,0x7F,0xF6, ++0x0F,0x9D,0x27,0xEF,0x9B,0x9D,0x73,0x37, ++0x05,0xDC,0x6B,0xF9,0xA2,0xC7,0xD9,0x10, ++0x27,0x78,0x0D,0x95,0x0C,0x68,0xF1,0x1E, ++0x29,0x73,0x97,0x66,0x65,0xD2,0x5F,0xE3, ++0x07,0x6E,0xF8,0x1F,0xAA,0x15,0xA1,0x2D, ++0x0F,0xB3,0x8F,0x2C,0x08,0x51,0x96,0xE3, ++0x07,0xDF,0x6E,0x4A,0x2F,0x82,0x86,0x2D, ++0x0F,0x72,0xAA,0x0B,0xF3,0x22,0xF1,0x8E, ++0x07,0x84,0x6C,0x74,0xD3,0x32,0x80,0xE5, ++0x0F,0x62,0xC0,0x47,0xD5,0xF6,0xAB,0xDE, ++0x0F,0xBF,0xC1,0x20,0x97,0x19,0xBF,0x96, ++0x07,0x56,0x96,0xC3,0x74,0x0A,0x44,0x5A, ++0x26,0x93,0x78,0x0F,0x1F,0xF3,0x8B,0xC0, ++0x07,0xCC,0x52,0x10,0x0B,0x36,0x2E,0x4A, ++0x07,0x13,0x9D,0x25,0x52,0x95,0x90,0xE0, ++0x07,0xEF,0x65,0xC1,0x0E,0x43,0x18,0x49, ++0x05,0x19,0x6E,0xD4,0x67,0xBE,0x84,0xE9, ++0x27,0x7C,0x05,0xEA,0x57,0xBA,0x1E,0xEF, ++0x29,0x5A,0x88,0x54,0x89,0x9F,0x69,0x00, ++0x0F,0xE9,0xF6,0x6F,0x62,0xA0,0xA9,0x81, ++0x07,0x59,0xE1,0x41,0xBD,0x9B,0xAB,0x04, ++0x07,0xE4,0xD1,0x8E,0x35,0x9E,0xCD,0xD0, ++0x07,0x63,0x61,0x1A,0xD5,0x0B,0xED,0x8D, ++0x05,0xFA,0x25,0x5E,0x79,0x75,0x93,0x40, ++0x2D,0x56,0x6B,0x14,0x24,0x4F,0x62,0xCA, ++0x07,0x2F,0x0D,0x7D,0xB2,0xBA,0xD6,0xCC, ++0x0F,0x25,0xBA,0xD6,0x20,0x15,0xA2,0x8C, ++0x05,0x82,0x31,0x96,0x3A,0xD0,0x48,0x95, ++0x27,0xBD,0x4A,0x80,0x4C,0xD1,0x93,0x61, ++0x27,0x8A,0xD7,0x55,0xC2,0x82,0xBF,0x82, ++0x2F,0x34,0x42,0x4C,0x4F,0xAF,0x7C,0x57, ++0x27,0xB5,0x5B,0xE6,0x5B,0xA0,0x4D,0xFE, ++0x2C,0x1F,0x8E,0x76,0xB2,0xCF,0xD5,0xED, ++0x07,0x72,0x0F,0x0E,0x29,0x1C,0xD9,0xB0, ++0x2B,0xDC,0x0B,0x98,0xFA,0x34,0xD5,0x69, ++0x07,0x5F,0x24,0xAD,0x22,0xF9,0x90,0x2D, ++0x07,0xE3,0x21,0x4B,0xDF,0x46,0x09,0x62, ++0x07,0xF1,0x8A,0x19,0x92,0xF3,0x4C,0xAF, ++0x0F,0xBB,0xFA,0x83,0x0C,0x3F,0x49,0x79, ++0x07,0x16,0xF4,0xA4,0x4D,0x82,0x5C,0xF2, ++0x24,0x4B,0xE4,0x69,0xB1,0xD2,0x0D,0xDF, ++0x0F,0x21,0x9D,0xC8,0xCF,0xE2,0xB5,0x58, ++0x0F,0x2F,0xD6,0x94,0xCD,0x52,0x1E,0x5F, ++0x0F,0xFC,0xA6,0xC8,0x3C,0x20,0xAD,0x07, ++0x07,0x6A,0x13,0x7B,0xAD,0x5C,0x57,0x42, ++0x07,0xEC,0x4E,0x2A,0x3A,0x04,0xD3,0x86, ++0x27,0x72,0x2A,0x4D,0xC0,0xDA,0x3F,0xA5, ++0x24,0x32,0x26,0x8D,0xA2,0x66,0xDB,0x69, ++0x0F,0x58,0x83,0x18,0x14,0xFB,0x88,0x0C, ++0x0F,0x8A,0xE6,0x04,0x2C,0x71,0x0C,0x54, ++0x2F,0x34,0xC3,0xD8,0x00,0x1C,0x38,0xDD, ++0x21,0x1D,0x44,0x05,0x28,0xF8,0xC5,0x85, ++0x07,0xA3,0x17,0x50,0x3A,0x03,0x6A,0xF0, ++0x07,0x40,0xA7,0xFC,0x81,0x15,0x58,0x9E, ++0x0F,0xB2,0x91,0x6B,0xB9,0x17,0xCE,0xE2, ++0x0F,0xE5,0x50,0xDD,0x47,0xE6,0xEE,0x6D, ++0x07,0x84,0x20,0xD6,0xA9,0x5A,0x8C,0x02, ++0x0F,0xEE,0xA5,0x18,0xD6,0x38,0xD5,0x46, ++0x0F,0xBE,0xB4,0x03,0xE7,0x04,0x10,0x04, ++0x05,0x53,0xF1,0x43,0xCC,0xD1,0xCA,0x3E, ++0x2E,0x87,0xD9,0xD1,0x9A,0x54,0x46,0x77, ++0x05,0xB7,0xF5,0x3D,0x7C,0xE4,0x58,0xA3, ++0x27,0xE7,0xA3,0x7B,0xB8,0x2C,0xCC,0xB3, ++0x2A,0x8D,0x21,0xD6,0xC6,0xCF,0x99,0x7A, ++0x0F,0x27,0x92,0xE1,0x4A,0x9C,0x02,0x9D, ++0x07,0x52,0x8E,0x05,0xCC,0xC9,0xC3,0xFA, ++0x22,0x05,0xC3,0x5A,0x3D,0x72,0x70,0x0D, ++0x0F,0x52,0xEE,0x30,0x16,0xC0,0x8F,0xE7, ++0x0F,0x44,0x3E,0x46,0xE7,0xF6,0xD0,0x64, ++0x07,0x06,0xDD,0xCC,0xF8,0x4E,0x23,0x82, ++0x0F,0x9F,0x05,0xC0,0xA9,0x91,0x9E,0x0B, ++0x2F,0x60,0xD8,0x39,0x2B,0x95,0x38,0x22, ++0x22,0x9C,0x32,0xAC,0x8A,0x8F,0x89,0xCF, ++0x05,0xD2,0x48,0x9C,0x7A,0x99,0x9C,0xAC, ++0x2A,0xCD,0x32,0x74,0xED,0xF8,0x63,0xBA, ++0x0F,0xB2,0xFE,0x1B,0x00,0x53,0x0F,0x3A, ++0x24,0xAB,0xA2,0xC1,0x5B,0x1D,0xAD,0x83, ++0x07,0xDB,0x87,0x28,0x0E,0x1E,0x5A,0xEC, ++0x05,0x93,0x50,0x53,0x13,0x2C,0x0C,0xAD ++}; ++ ++#define FIRMWARE_LINES_0_Eb15 (sizeof(Si2158_FW_0_Eb15)/(8*sizeof(unsigned char))) ++ ++#endif /* _SI2158_FIRMWARE_0_E_BUILD_15_H_ */ +diff -urN a/drivers/media/dvb-frontends/si2158_firmware_2_0_build_x.h b/drivers/media/dvb-frontends/si2158_firmware_2_0_build_x.h +--- a/drivers/media/dvb-frontends/si2158_firmware_2_0_build_x.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2158_firmware_2_0_build_x.h 2013-02-17 18:09:10.000000000 +0800 +@@ -0,0 +1,19 @@ ++/****************************************************************************************/ ++#ifndef _Si2158_FIRMWARE_2_0_BUILD_X_H_ ++#define _Si2158_FIRMWARE_2_0_BUILD_X_H_ ++ ++#ifndef __FIRMWARE_STRUCT__ ++#define __FIRMWARE_STRUCT__ ++typedef struct firmware_struct { ++ unsigned char firmware_len; ++ unsigned char firmware_table[16]; ++} firmware_struct; ++#endif /* __FIRMWARE_STRUCT__ */ ++ ++firmware_struct Si2158_FW_2_0bx[] = { ++{ 0 , { 0x00} } ++}; ++ ++#define FIRMWARE_LINES_2_0bx (sizeof(Si2158_FW_2_0bx)/(sizeof(firmware_struct))) ++ ++#endif /* _Si2158_FIRMWARE_2_0_BUILD_X_H_ */ +diff -urN a/drivers/media/dvb-frontends/si2158_properties.h b/drivers/media/dvb-frontends/si2158_properties.h +--- a/drivers/media/dvb-frontends/si2158_properties.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2158_properties.h 2013-02-17 18:05:42.000000000 +0800 +@@ -0,0 +1,1468 @@ ++/*************************************************************************************/ ++#ifndef _Si2158_PROPERTIES_H_ ++#define _Si2158_PROPERTIES_H_ ++ ++/* _properties_defines_insertion_start */ ++/* Si2158 ATV_AFC_RANGE property definition */ ++#define Si2158_ATV_AFC_RANGE_PROP 0x0610 ++ ++#ifdef Si2158_ATV_AFC_RANGE_PROP ++ #define Si2158_ATV_AFC_RANGE_PROP_CODE 0x000610 ++ ++ ++ typedef struct { /* Si2158_ATV_AFC_RANGE_PROP_struct */ ++ unsigned int range_khz; ++ } Si2158_ATV_AFC_RANGE_PROP_struct; ++ ++ /* ATV_AFC_RANGE property, RANGE_KHZ field definition (NO TITLE)*/ ++ #define Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_LSB 0 ++ #define Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_MASK 0xffff ++ #define Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_DEFAULT 1000 ++ #define Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_RANGE_KHZ_MIN 0 ++ #define Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_RANGE_KHZ_MAX 65535 ++ ++#endif /* Si2158_ATV_AFC_RANGE_PROP */ ++ ++/* Si2158 ATV_AGC_SPEED property definition */ ++#define Si2158_ATV_AGC_SPEED_PROP 0x0611 ++ ++#ifdef Si2158_ATV_AGC_SPEED_PROP ++ #define Si2158_ATV_AGC_SPEED_PROP_CODE 0x000611 ++ ++ ++ typedef struct { /* Si2158_ATV_AGC_SPEED_PROP_struct */ ++ unsigned char if_agc_speed; ++ } Si2158_ATV_AGC_SPEED_PROP_struct; ++ ++ /* ATV_AGC_SPEED property, IF_AGC_SPEED field definition (NO TITLE)*/ ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_LSB 0 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_MASK 0xff ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_DEFAULT 0 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO 0 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_89 89 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_105 105 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_121 121 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_137 137 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_158 158 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_172 172 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_178 178 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_185 185 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_196 196 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_206 206 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_216 216 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_219 219 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_222 222 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_248 248 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_250 250 ++ #define Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_251 251 ++ ++#endif /* Si2158_ATV_AGC_SPEED_PROP */ ++ ++/* Si2158 ATV_AGC_SPEED_LOW_RSSI property definition */ ++#define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP 0x0623 ++ ++#ifdef Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_CODE 0x000623 ++ ++ ++ typedef struct { /* Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_struct */ ++ unsigned char if_agc_speed; ++ char thld; ++ } Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_struct; ++ ++ /* ATV_AGC_SPEED_LOW_RSSI property, IF_AGC_SPEED field definition (NO TITLE)*/ ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_LSB 0 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_MASK 0xff ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_DEFAULT 158 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_89 89 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_105 105 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_121 121 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_137 137 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_158 158 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_172 172 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_178 178 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_185 185 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_196 196 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_206 206 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_216 216 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_219 219 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_222 222 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_248 248 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_250 250 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_251 251 ++ ++ /* ATV_AGC_SPEED_LOW_RSSI property, THLD field definition (NO TITLE)*/ ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_LSB 8 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_MASK 0xff ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_DEFAULT -128 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_THLD_MIN -128 ++ #define Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_THLD_MAX 127 ++ ++#endif /* Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP */ ++ ++/* Si2158 ATV_ARTIFICIAL_SNOW property definition */ ++#define Si2158_ATV_ARTIFICIAL_SNOW_PROP 0x0624 ++ ++#ifdef Si2158_ATV_ARTIFICIAL_SNOW_PROP ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_CODE 0x000624 ++ ++ ++ typedef struct { /* Si2158_ATV_ARTIFICIAL_SNOW_PROP_struct */ ++ unsigned char gain; ++ char offset; ++ } Si2158_ATV_ARTIFICIAL_SNOW_PROP_struct; ++ ++ /* ATV_ARTIFICIAL_SNOW property, GAIN field definition (NO TITLE)*/ ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_LSB 0 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_MASK 0xff ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_DEFAULT 0 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_AUTO 0 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_0DB 1 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_6DB 2 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_12DB 3 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_18DB 4 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_24DB 5 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_30DB 6 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_36DB 7 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_42DB 8 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_OFF 9 ++ ++ /* ATV_ARTIFICIAL_SNOW property, OFFSET field definition (NO TITLE)*/ ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_LSB 8 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_MASK 0xff ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_DEFAULT 0 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_OFFSET_MIN -128 ++ #define Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_OFFSET_MAX 127 ++ ++#endif /* Si2158_ATV_ARTIFICIAL_SNOW_PROP */ ++ ++/* Si2158 ATV_CONFIG_IF_PORT property definition */ ++#define Si2158_ATV_CONFIG_IF_PORT_PROP 0x0603 ++ ++#ifdef Si2158_ATV_CONFIG_IF_PORT_PROP ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_CODE 0x000603 ++ ++ ++ typedef struct { /* Si2158_ATV_CONFIG_IF_PORT_PROP_struct */ ++ unsigned char atv_agc_source; ++ unsigned char atv_out_type; ++ } Si2158_ATV_CONFIG_IF_PORT_PROP_struct; ++ ++ /* ATV_CONFIG_IF_PORT property, ATV_AGC_SOURCE field definition (NO TITLE)*/ ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_LSB 8 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_MASK 0x07 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_DEFAULT 0 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_INTERNAL 0 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_AGC1_3DB 1 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_AGC2_3DB 2 ++ ++ /* ATV_CONFIG_IF_PORT property, ATV_OUT_TYPE field definition (NO TITLE)*/ ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LSB 0 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_MASK 0x0f ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_DEFAULT 8 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LIF_DIFF_IF1 8 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LIF_DIFF_IF2 10 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LIF_SE_IF1A 12 ++ #define Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LIF_SE_IF2A 14 ++ ++#endif /* Si2158_ATV_CONFIG_IF_PORT_PROP */ ++ ++/* Si2158 ATV_EXT_AGC property definition */ ++#define Si2158_ATV_EXT_AGC_PROP 0x0607 ++ ++#ifdef Si2158_ATV_EXT_AGC_PROP ++ #define Si2158_ATV_EXT_AGC_PROP_CODE 0x000607 ++ ++ ++ typedef struct { /* Si2158_ATV_EXT_AGC_PROP_struct */ ++ unsigned char max_10mv; ++ unsigned char min_10mv; ++ } Si2158_ATV_EXT_AGC_PROP_struct; ++ ++ /* ATV_EXT_AGC property, MAX_10MV field definition (NO TITLE)*/ ++ #define Si2158_ATV_EXT_AGC_PROP_MAX_10MV_LSB 8 ++ #define Si2158_ATV_EXT_AGC_PROP_MAX_10MV_MASK 0xff ++ #define Si2158_ATV_EXT_AGC_PROP_MAX_10MV_DEFAULT 200 ++ #define Si2158_ATV_EXT_AGC_PROP_MAX_10MV_MAX_10MV_MIN 0 ++ #define Si2158_ATV_EXT_AGC_PROP_MAX_10MV_MAX_10MV_MAX 255 ++ ++ /* ATV_EXT_AGC property, MIN_10MV field definition (NO TITLE)*/ ++ #define Si2158_ATV_EXT_AGC_PROP_MIN_10MV_LSB 0 ++ #define Si2158_ATV_EXT_AGC_PROP_MIN_10MV_MASK 0xff ++ #define Si2158_ATV_EXT_AGC_PROP_MIN_10MV_DEFAULT 50 ++ #define Si2158_ATV_EXT_AGC_PROP_MIN_10MV_MIN_10MV_MIN 0 ++ #define Si2158_ATV_EXT_AGC_PROP_MIN_10MV_MIN_10MV_MAX 255 ++ ++#endif /* Si2158_ATV_EXT_AGC_PROP */ ++ ++/* Si2158 ATV_IEN property definition */ ++#define Si2158_ATV_IEN_PROP 0x0601 ++ ++#ifdef Si2158_ATV_IEN_PROP ++ #define Si2158_ATV_IEN_PROP_CODE 0x000601 ++ ++ ++ typedef struct { /* Si2158_ATV_IEN_PROP_struct */ ++ unsigned char chlien; ++ unsigned char pclien; ++ } Si2158_ATV_IEN_PROP_struct; ++ ++ /* ATV_IEN property, CHLIEN field definition (NO TITLE)*/ ++ #define Si2158_ATV_IEN_PROP_CHLIEN_LSB 0 ++ #define Si2158_ATV_IEN_PROP_CHLIEN_MASK 0x01 ++ #define Si2158_ATV_IEN_PROP_CHLIEN_DEFAULT 1 ++ #define Si2158_ATV_IEN_PROP_CHLIEN_DISABLE 0 ++ #define Si2158_ATV_IEN_PROP_CHLIEN_ENABLE 1 ++ ++ /* ATV_IEN property, PCLIEN field definition (NO TITLE)*/ ++ #define Si2158_ATV_IEN_PROP_PCLIEN_LSB 1 ++ #define Si2158_ATV_IEN_PROP_PCLIEN_MASK 0x01 ++ #define Si2158_ATV_IEN_PROP_PCLIEN_DEFAULT 0 ++ #define Si2158_ATV_IEN_PROP_PCLIEN_DISABLE 0 ++ #define Si2158_ATV_IEN_PROP_PCLIEN_ENABLE 1 ++ ++#endif /* Si2158_ATV_IEN_PROP */ ++ ++/* Si2158 ATV_INT_SENSE property definition */ ++#define Si2158_ATV_INT_SENSE_PROP 0x0613 ++ ++#ifdef Si2158_ATV_INT_SENSE_PROP ++ #define Si2158_ATV_INT_SENSE_PROP_CODE 0x000613 ++ ++ ++ typedef struct { /* Si2158_ATV_INT_SENSE_PROP_struct */ ++ unsigned char chlnegen; ++ unsigned char chlposen; ++ unsigned char pclnegen; ++ unsigned char pclposen; ++ } Si2158_ATV_INT_SENSE_PROP_struct; ++ ++ /* ATV_INT_SENSE property, CHLNEGEN field definition (NO TITLE)*/ ++ #define Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_LSB 0 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_MASK 0x01 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_DEFAULT 0 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_DISABLE 0 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_ENABLE 1 ++ ++ /* ATV_INT_SENSE property, CHLPOSEN field definition (NO TITLE)*/ ++ #define Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_LSB 8 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_MASK 0x01 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_DEFAULT 1 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_DISABLE 0 ++ #define Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_ENABLE 1 ++ ++ /* ATV_INT_SENSE property, PCLNEGEN field definition (NO TITLE)*/ ++ #define Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_LSB 1 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_MASK 0x01 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_DEFAULT 0 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_DISABLE 0 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_ENABLE 1 ++ ++ /* ATV_INT_SENSE property, PCLPOSEN field definition (NO TITLE)*/ ++ #define Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_LSB 9 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_MASK 0x01 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_DEFAULT 1 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_DISABLE 0 ++ #define Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_ENABLE 1 ++ ++#endif /* Si2158_ATV_INT_SENSE_PROP */ ++ ++/* Si2158 ATV_LIF_FREQ property definition */ ++#define Si2158_ATV_LIF_FREQ_PROP 0x060c ++ ++#ifdef Si2158_ATV_LIF_FREQ_PROP ++ #define Si2158_ATV_LIF_FREQ_PROP_CODE 0x00060c ++ ++ ++ typedef struct { /* Si2158_ATV_LIF_FREQ_PROP_struct */ ++ unsigned int offset; ++ } Si2158_ATV_LIF_FREQ_PROP_struct; ++ ++ /* ATV_LIF_FREQ property, OFFSET field definition (NO TITLE)*/ ++ #define Si2158_ATV_LIF_FREQ_PROP_OFFSET_LSB 0 ++ #define Si2158_ATV_LIF_FREQ_PROP_OFFSET_MASK 0xffff ++ #define Si2158_ATV_LIF_FREQ_PROP_OFFSET_DEFAULT 5000 ++ #define Si2158_ATV_LIF_FREQ_PROP_OFFSET_OFFSET_MIN 0 ++ #define Si2158_ATV_LIF_FREQ_PROP_OFFSET_OFFSET_MAX 7000 ++ ++#endif /* Si2158_ATV_LIF_FREQ_PROP */ ++ ++/* Si2158 ATV_LIF_OUT property definition */ ++#define Si2158_ATV_LIF_OUT_PROP 0x060d ++ ++#ifdef Si2158_ATV_LIF_OUT_PROP ++ #define Si2158_ATV_LIF_OUT_PROP_CODE 0x00060d ++ ++ ++ typedef struct { /* Si2158_ATV_LIF_OUT_PROP_struct */ ++ unsigned char amp; ++ unsigned char offset; ++ } Si2158_ATV_LIF_OUT_PROP_struct; ++ ++ /* ATV_LIF_OUT property, AMP field definition (NO TITLE)*/ ++ #define Si2158_ATV_LIF_OUT_PROP_AMP_LSB 8 ++ #define Si2158_ATV_LIF_OUT_PROP_AMP_MASK 0xff ++ #define Si2158_ATV_LIF_OUT_PROP_AMP_DEFAULT 100 ++ #define Si2158_ATV_LIF_OUT_PROP_AMP_AMP_MIN 0 ++ #define Si2158_ATV_LIF_OUT_PROP_AMP_AMP_MAX 255 ++ ++ /* ATV_LIF_OUT property, OFFSET field definition (NO TITLE)*/ ++ #define Si2158_ATV_LIF_OUT_PROP_OFFSET_LSB 0 ++ #define Si2158_ATV_LIF_OUT_PROP_OFFSET_MASK 0xff ++ #define Si2158_ATV_LIF_OUT_PROP_OFFSET_DEFAULT 148 ++ #define Si2158_ATV_LIF_OUT_PROP_OFFSET_OFFSET_MIN 0 ++ #define Si2158_ATV_LIF_OUT_PROP_OFFSET_OFFSET_MAX 255 ++ ++#endif /* Si2158_ATV_LIF_OUT_PROP */ ++ ++/* Si2158 ATV_PGA_TARGET property definition */ ++#define Si2158_ATV_PGA_TARGET_PROP 0x0617 ++ ++#ifdef Si2158_ATV_PGA_TARGET_PROP ++ #define Si2158_ATV_PGA_TARGET_PROP_CODE 0x000617 ++ ++ ++ typedef struct { /* Si2158_ATV_PGA_TARGET_PROP_struct */ ++ unsigned char override_enable; ++ char pga_target; ++ } Si2158_ATV_PGA_TARGET_PROP_struct; ++ ++ /* ATV_PGA_TARGET property, OVERRIDE_ENABLE field definition (NO TITLE)*/ ++ #define Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_LSB 8 ++ #define Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_MASK 0x01 ++ #define Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_DEFAULT 0 ++ #define Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_DISABLE 0 ++ #define Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_ENABLE 1 ++ ++ /* ATV_PGA_TARGET property, PGA_TARGET field definition (NO TITLE)*/ ++ #define Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_LSB 0 ++ #define Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_MASK 0xff ++ #define Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_DEFAULT 0 ++ #define Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_PGA_TARGET_MIN -13 ++ #define Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_PGA_TARGET_MAX 7 ++ ++#endif /* Si2158_ATV_PGA_TARGET_PROP */ ++ ++/* Si2158 ATV_RF_TOP property definition */ ++#define Si2158_ATV_RF_TOP_PROP 0x0612 ++ ++#ifdef Si2158_ATV_RF_TOP_PROP ++ #define Si2158_ATV_RF_TOP_PROP_CODE 0x000612 ++ ++ ++ typedef struct { /* Si2158_ATV_RF_TOP_PROP_struct */ ++ unsigned char atv_rf_top; ++ } Si2158_ATV_RF_TOP_PROP_struct; ++ ++ /* ATV_RF_TOP property, ATV_RF_TOP field definition (NO TITLE)*/ ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_LSB 0 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_MASK 0xff ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_DEFAULT 0 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_AUTO 0 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_P2DB 4 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_P1DB 5 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_0DB 6 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M1DB 7 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M2DB 8 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M3DB 9 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M4DB 10 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M5DB 11 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M6DB 12 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M7DB 13 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M8DB 14 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M9DB 15 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M10DB 16 ++ #define Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_M11DB 17 ++ ++#endif /* Si2158_ATV_RF_TOP_PROP */ ++ ++/* Si2158 ATV_RSQ_RSSI_THRESHOLD property definition */ ++#define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP 0x0605 ++ ++#ifdef Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_CODE 0x000605 ++ ++ ++ typedef struct { /* Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_struct */ ++ char hi; ++ char lo; ++ } Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_struct; ++ ++ /* ATV_RSQ_RSSI_THRESHOLD property, HI field definition (NO TITLE)*/ ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_LSB 8 ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_MASK 0xff ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_DEFAULT 0 ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_HI_MIN -128 ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_HI_MAX 127 ++ ++ /* ATV_RSQ_RSSI_THRESHOLD property, LO field definition (NO TITLE)*/ ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_LSB 0 ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_MASK 0xff ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_DEFAULT -70 ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_LO_MIN -128 ++ #define Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_LO_MAX 127 ++ ++#endif /* Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP */ ++ ++/* Si2158 ATV_VIDEO_MODE property definition */ ++#define Si2158_ATV_VIDEO_MODE_PROP 0x0604 ++ ++#ifdef Si2158_ATV_VIDEO_MODE_PROP ++ #define Si2158_ATV_VIDEO_MODE_PROP_CODE 0x000604 ++ ++ ++ typedef struct { /* Si2158_ATV_VIDEO_MODE_PROP_struct */ ++ unsigned char color; ++ unsigned char invert_spectrum; ++ unsigned char video_sys; ++ } Si2158_ATV_VIDEO_MODE_PROP_struct; ++ ++ /* ATV_VIDEO_MODE property, COLOR field definition (NO TITLE)*/ ++ #define Si2158_ATV_VIDEO_MODE_PROP_COLOR_LSB 4 ++ #define Si2158_ATV_VIDEO_MODE_PROP_COLOR_MASK 0x01 ++ #define Si2158_ATV_VIDEO_MODE_PROP_COLOR_DEFAULT 0 ++ #define Si2158_ATV_VIDEO_MODE_PROP_COLOR_PAL_NTSC 0 ++ #define Si2158_ATV_VIDEO_MODE_PROP_COLOR_SECAM 1 ++ ++ /* ATV_VIDEO_MODE property, INVERT_SPECTRUM field definition (NO TITLE)*/ ++ #define Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_LSB 9 ++ #define Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_MASK 0x01 ++ #define Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_DEFAULT 1 ++ #define Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_NORMAL 0 ++ #define Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_INVERTED 1 ++ ++ /* ATV_VIDEO_MODE property, VIDEO_SYS field definition (NO TITLE)*/ ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_LSB 0 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_MASK 0x07 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_DEFAULT 0 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_B 0 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_GH 1 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_M 2 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_N 3 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_I 4 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_DK 5 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_L 6 ++ #define Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_LP 7 ++ ++#endif /* Si2158_ATV_VIDEO_MODE_PROP */ ++ ++/* Si2158 ATV_VSNR_CAP property definition */ ++#define Si2158_ATV_VSNR_CAP_PROP 0x0616 ++ ++#ifdef Si2158_ATV_VSNR_CAP_PROP ++ #define Si2158_ATV_VSNR_CAP_PROP_CODE 0x000616 ++ ++ ++ typedef struct { /* Si2158_ATV_VSNR_CAP_PROP_struct */ ++ unsigned char atv_vsnr_cap; ++ } Si2158_ATV_VSNR_CAP_PROP_struct; ++ ++ /* ATV_VSNR_CAP property, ATV_VSNR_CAP field definition (NO TITLE)*/ ++ #define Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_LSB 0 ++ #define Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_MASK 0xff ++ #define Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_DEFAULT 0 ++ #define Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_ATV_VSNR_CAP_MIN 0 ++ #define Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_ATV_VSNR_CAP_MAX 127 ++ ++#endif /* Si2158_ATV_VSNR_CAP_PROP */ ++ ++/* Si2158 CRYSTAL_TRIM property definition */ ++#define Si2158_CRYSTAL_TRIM_PROP 0x0402 ++ ++#ifdef Si2158_CRYSTAL_TRIM_PROP ++ #define Si2158_CRYSTAL_TRIM_PROP_CODE 0x000402 ++ ++ ++ typedef struct { /* Si2158_CRYSTAL_TRIM_PROP_struct */ ++ unsigned char xo_cap; ++ } Si2158_CRYSTAL_TRIM_PROP_struct; ++ ++ /* CRYSTAL_TRIM property, XO_CAP field definition (NO TITLE)*/ ++ #define Si2158_CRYSTAL_TRIM_PROP_XO_CAP_LSB 0 ++ #define Si2158_CRYSTAL_TRIM_PROP_XO_CAP_MASK 0x0f ++ #define Si2158_CRYSTAL_TRIM_PROP_XO_CAP_DEFAULT 8 ++ #define Si2158_CRYSTAL_TRIM_PROP_XO_CAP_XO_CAP_MIN 0 ++ #define Si2158_CRYSTAL_TRIM_PROP_XO_CAP_XO_CAP_MAX 15 ++ ++#endif /* Si2158_CRYSTAL_TRIM_PROP */ ++ ++/* Si2158 DTV_AGC_FREEZE_INPUT property definition */ ++#define Si2158_DTV_AGC_FREEZE_INPUT_PROP 0x0711 ++ ++#ifdef Si2158_DTV_AGC_FREEZE_INPUT_PROP ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_CODE 0x000711 ++ ++ ++ typedef struct { /* Si2158_DTV_AGC_FREEZE_INPUT_PROP_struct */ ++ unsigned char level; ++ unsigned char pin; ++ } Si2158_DTV_AGC_FREEZE_INPUT_PROP_struct; ++ ++ /* DTV_AGC_FREEZE_INPUT property, LEVEL field definition (NO TITLE)*/ ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_LSB 0 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_MASK 0x01 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_DEFAULT 0 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_LOW 0 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_HIGH 1 ++ ++ /* DTV_AGC_FREEZE_INPUT property, PIN field definition (NO TITLE)*/ ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_LSB 1 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_MASK 0x07 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_DEFAULT 0 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_NONE 0 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_GPIO1 1 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_GPIO2 2 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_RESERVED 3 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_AGC1 4 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_AGC2 5 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_LIF1A 6 ++ #define Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_LIF1B 7 ++ ++#endif /* Si2158_DTV_AGC_FREEZE_INPUT_PROP */ ++ ++/* Si2158 DTV_AGC_SPEED property definition */ ++#define Si2158_DTV_AGC_SPEED_PROP 0x0708 ++ ++#ifdef Si2158_DTV_AGC_SPEED_PROP ++ #define Si2158_DTV_AGC_SPEED_PROP_CODE 0x000708 ++ ++ ++ typedef struct { /* Si2158_DTV_AGC_SPEED_PROP_struct */ ++ unsigned char agc_decim; ++ unsigned char if_agc_speed; ++ } Si2158_DTV_AGC_SPEED_PROP_struct; ++ ++ /* DTV_AGC_SPEED property, AGC_DECIM field definition (NO TITLE)*/ ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_LSB 8 ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_MASK 0x03 ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_DEFAULT 0 ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_OFF 0 ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_2 1 ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_4 2 ++ #define Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_8 3 ++ ++ /* DTV_AGC_SPEED property, IF_AGC_SPEED field definition (NO TITLE)*/ ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_LSB 0 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_MASK 0xff ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_DEFAULT 0 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO 0 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_39 39 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_54 54 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_63 63 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_89 89 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_105 105 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_121 121 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_137 137 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_158 158 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_172 172 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_185 185 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_196 196 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_206 206 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_216 216 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_219 219 ++ #define Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_222 222 ++ ++#endif /* Si2158_DTV_AGC_SPEED_PROP */ ++ ++/* Si2158 DTV_CONFIG_IF_PORT property definition */ ++#define Si2158_DTV_CONFIG_IF_PORT_PROP 0x0702 ++ ++#ifdef Si2158_DTV_CONFIG_IF_PORT_PROP ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_CODE 0x000702 ++ ++ ++ typedef struct { /* Si2158_DTV_CONFIG_IF_PORT_PROP_struct */ ++ unsigned char dtv_agc_source; ++ unsigned char dtv_out_type; ++ } Si2158_DTV_CONFIG_IF_PORT_PROP_struct; ++ ++ /* DTV_CONFIG_IF_PORT property, DTV_AGC_SOURCE field definition (NO TITLE)*/ ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_LSB 8 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_MASK 0x07 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_DEFAULT 0 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_INTERNAL 0 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_AGC1_3DB 1 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_AGC2_3DB 2 ++ ++ /* DTV_CONFIG_IF_PORT property, DTV_OUT_TYPE field definition (NO TITLE)*/ ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LSB 0 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_MASK 0x0f ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_DEFAULT 1 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LIF_IF1 0 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LIF_IF2 1 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LIF_SE_IF1A 4 ++ #define Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LIF_SE_IF2A 5 ++ ++#endif /* Si2158_DTV_CONFIG_IF_PORT_PROP */ ++ ++/* Si2158 DTV_EXT_AGC property definition */ ++#define Si2158_DTV_EXT_AGC_PROP 0x0705 ++ ++#ifdef Si2158_DTV_EXT_AGC_PROP ++ #define Si2158_DTV_EXT_AGC_PROP_CODE 0x000705 ++ ++ ++ typedef struct { /* Si2158_DTV_EXT_AGC_PROP_struct */ ++ unsigned char max_10mv; ++ unsigned char min_10mv; ++ } Si2158_DTV_EXT_AGC_PROP_struct; ++ ++ /* DTV_EXT_AGC property, MAX_10MV field definition (NO TITLE)*/ ++ #define Si2158_DTV_EXT_AGC_PROP_MAX_10MV_LSB 8 ++ #define Si2158_DTV_EXT_AGC_PROP_MAX_10MV_MASK 0xff ++ #define Si2158_DTV_EXT_AGC_PROP_MAX_10MV_DEFAULT 200 ++ #define Si2158_DTV_EXT_AGC_PROP_MAX_10MV_MAX_10MV_MIN 0 ++ #define Si2158_DTV_EXT_AGC_PROP_MAX_10MV_MAX_10MV_MAX 255 ++ ++ /* DTV_EXT_AGC property, MIN_10MV field definition (NO TITLE)*/ ++ #define Si2158_DTV_EXT_AGC_PROP_MIN_10MV_LSB 0 ++ #define Si2158_DTV_EXT_AGC_PROP_MIN_10MV_MASK 0xff ++ #define Si2158_DTV_EXT_AGC_PROP_MIN_10MV_DEFAULT 50 ++ #define Si2158_DTV_EXT_AGC_PROP_MIN_10MV_MIN_10MV_MIN 0 ++ #define Si2158_DTV_EXT_AGC_PROP_MIN_10MV_MIN_10MV_MAX 255 ++ ++#endif /* Si2158_DTV_EXT_AGC_PROP */ ++ ++/* Si2158 DTV_FILTER_SELECT property definition */ ++#define Si2158_DTV_FILTER_SELECT_PROP 0x070c ++ ++#ifdef Si2158_DTV_FILTER_SELECT_PROP ++ #define Si2158_DTV_FILTER_SELECT_PROP_CODE 0x00070c ++ ++ ++ typedef struct { /* Si2158_DTV_FILTER_SELECT_PROP_struct */ ++ unsigned char filter; ++ } Si2158_DTV_FILTER_SELECT_PROP_struct; ++ ++ /* DTV_FILTER_SELECT property, FILTER field definition (NO TITLE)*/ ++ #define Si2158_DTV_FILTER_SELECT_PROP_FILTER_LSB 0 ++ #define Si2158_DTV_FILTER_SELECT_PROP_FILTER_MASK 0x03 ++ #define Si2158_DTV_FILTER_SELECT_PROP_FILTER_DEFAULT 1 ++ #define Si2158_DTV_FILTER_SELECT_PROP_FILTER_LEGACY 0 ++ #define Si2158_DTV_FILTER_SELECT_PROP_FILTER_CUSTOM1 1 ++ #define Si2158_DTV_FILTER_SELECT_PROP_FILTER_CUSTOM2 2 ++ ++#endif /* Si2158_DTV_FILTER_SELECT_PROP */ ++ ++/* Si2158 DTV_IEN property definition */ ++#define Si2158_DTV_IEN_PROP 0x0701 ++ ++#ifdef Si2158_DTV_IEN_PROP ++ #define Si2158_DTV_IEN_PROP_CODE 0x000701 ++ ++ ++ typedef struct { /* Si2158_DTV_IEN_PROP_struct */ ++ unsigned char chlien; ++ } Si2158_DTV_IEN_PROP_struct; ++ ++ /* DTV_IEN property, CHLIEN field definition (NO TITLE)*/ ++ #define Si2158_DTV_IEN_PROP_CHLIEN_LSB 0 ++ #define Si2158_DTV_IEN_PROP_CHLIEN_MASK 0x01 ++ #define Si2158_DTV_IEN_PROP_CHLIEN_DEFAULT 1 ++ #define Si2158_DTV_IEN_PROP_CHLIEN_DISABLE 0 ++ #define Si2158_DTV_IEN_PROP_CHLIEN_ENABLE 1 ++ ++#endif /* Si2158_DTV_IEN_PROP */ ++ ++/* Si2158 DTV_INITIAL_AGC_SPEED property definition */ ++#define Si2158_DTV_INITIAL_AGC_SPEED_PROP 0x070d ++ ++#ifdef Si2158_DTV_INITIAL_AGC_SPEED_PROP ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_CODE 0x00070d ++ ++ ++ typedef struct { /* Si2158_DTV_INITIAL_AGC_SPEED_PROP_struct */ ++ unsigned char agc_decim; ++ unsigned char if_agc_speed; ++ } Si2158_DTV_INITIAL_AGC_SPEED_PROP_struct; ++ ++ /* DTV_INITIAL_AGC_SPEED property, AGC_DECIM field definition (NO TITLE)*/ ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_LSB 8 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_MASK 0x03 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_DEFAULT 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_OFF 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_2 1 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_4 2 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_8 3 ++ ++ /* DTV_INITIAL_AGC_SPEED property, IF_AGC_SPEED field definition (NO TITLE)*/ ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_LSB 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_MASK 0xff ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_DEFAULT 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_39 39 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_54 54 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_63 63 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_89 89 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_105 105 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_121 121 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_137 137 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_158 158 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_172 172 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_185 185 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_196 196 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_206 206 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_216 216 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_219 219 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_222 222 ++ ++#endif /* Si2158_DTV_INITIAL_AGC_SPEED_PROP */ ++ ++/* Si2158 DTV_INITIAL_AGC_SPEED_PERIOD property definition */ ++#define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP 0x070e ++ ++#ifdef Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_CODE 0x00070e ++ ++ ++ typedef struct { /* Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_struct */ ++ unsigned int period; ++ } Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_struct; ++ ++ /* DTV_INITIAL_AGC_SPEED_PERIOD property, PERIOD field definition (NO TITLE)*/ ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_LSB 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_MASK 0xffff ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_DEFAULT 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_PERIOD_MIN 0 ++ #define Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_PERIOD_MAX 65535 ++ ++#endif /* Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP */ ++ ++/* Si2158 DTV_INTERNAL_ZIF property definition */ ++#define Si2158_DTV_INTERNAL_ZIF_PROP 0x0710 ++ ++#ifdef Si2158_DTV_INTERNAL_ZIF_PROP ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_CODE 0x000710 ++ ++ ++ typedef struct { /* Si2158_DTV_INTERNAL_ZIF_PROP_struct */ ++ unsigned char atsc; ++ unsigned char dtmb; ++ unsigned char dvbc; ++ unsigned char dvbt; ++ unsigned char isdbc; ++ unsigned char isdbt; ++ unsigned char qam_us; ++ } Si2158_DTV_INTERNAL_ZIF_PROP_struct; ++ ++ /* DTV_INTERNAL_ZIF property, ATSC field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_LSB 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_ZIF 1 ++ ++ /* DTV_INTERNAL_ZIF property, DTMB field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_LSB 6 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_ZIF 1 ++ ++ /* DTV_INTERNAL_ZIF property, DVBC field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_LSB 3 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_ZIF 1 ++ ++ /* DTV_INTERNAL_ZIF property, DVBT field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_LSB 2 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_ZIF 1 ++ ++ /* DTV_INTERNAL_ZIF property, ISDBC field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_LSB 5 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_ZIF 1 ++ ++ /* DTV_INTERNAL_ZIF property, ISDBT field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_LSB 4 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_ZIF 1 ++ ++ /* DTV_INTERNAL_ZIF property, QAM_US field definition (NO TITLE)*/ ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_LSB 1 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_MASK 0x01 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_DEFAULT 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_LIF 0 ++ #define Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_ZIF 1 ++ ++#endif /* Si2158_DTV_INTERNAL_ZIF_PROP */ ++ ++/* Si2158 DTV_INT_SENSE property definition */ ++#define Si2158_DTV_INT_SENSE_PROP 0x070a ++ ++#ifdef Si2158_DTV_INT_SENSE_PROP ++ #define Si2158_DTV_INT_SENSE_PROP_CODE 0x00070a ++ ++ ++ typedef struct { /* Si2158_DTV_INT_SENSE_PROP_struct */ ++ unsigned char chlnegen; ++ unsigned char chlposen; ++ } Si2158_DTV_INT_SENSE_PROP_struct; ++ ++ /* DTV_INT_SENSE property, CHLNEGEN field definition (NO TITLE)*/ ++ #define Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_LSB 0 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_MASK 0x01 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_DEFAULT 0 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_DISABLE 0 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_ENABLE 1 ++ ++ /* DTV_INT_SENSE property, CHLPOSEN field definition (NO TITLE)*/ ++ #define Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_LSB 8 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_MASK 0x01 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_DEFAULT 1 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_DISABLE 0 ++ #define Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_ENABLE 1 ++ ++#endif /* Si2158_DTV_INT_SENSE_PROP */ ++ ++/* Si2158 DTV_LIF_FREQ property definition */ ++#define Si2158_DTV_LIF_FREQ_PROP 0x0706 ++ ++#ifdef Si2158_DTV_LIF_FREQ_PROP ++ #define Si2158_DTV_LIF_FREQ_PROP_CODE 0x000706 ++ ++ ++ typedef struct { /* Si2158_DTV_LIF_FREQ_PROP_struct */ ++ unsigned int offset; ++ } Si2158_DTV_LIF_FREQ_PROP_struct; ++ ++ /* DTV_LIF_FREQ property, OFFSET field definition (NO TITLE)*/ ++ #define Si2158_DTV_LIF_FREQ_PROP_OFFSET_LSB 0 ++ #define Si2158_DTV_LIF_FREQ_PROP_OFFSET_MASK 0xffff ++ #define Si2158_DTV_LIF_FREQ_PROP_OFFSET_DEFAULT 5000 ++ #define Si2158_DTV_LIF_FREQ_PROP_OFFSET_OFFSET_MIN 0 ++ #define Si2158_DTV_LIF_FREQ_PROP_OFFSET_OFFSET_MAX 7000 ++ ++#endif /* Si2158_DTV_LIF_FREQ_PROP */ ++ ++/* Si2158 DTV_LIF_OUT property definition */ ++#define Si2158_DTV_LIF_OUT_PROP 0x0707 ++ ++#ifdef Si2158_DTV_LIF_OUT_PROP ++ #define Si2158_DTV_LIF_OUT_PROP_CODE 0x000707 ++ ++ ++ typedef struct { /* Si2158_DTV_LIF_OUT_PROP_struct */ ++ unsigned char amp; ++ unsigned char offset; ++ } Si2158_DTV_LIF_OUT_PROP_struct; ++ ++ /* DTV_LIF_OUT property, AMP field definition (NO TITLE)*/ ++ #define Si2158_DTV_LIF_OUT_PROP_AMP_LSB 8 ++ #define Si2158_DTV_LIF_OUT_PROP_AMP_MASK 0xff ++ #define Si2158_DTV_LIF_OUT_PROP_AMP_DEFAULT 27 ++ #define Si2158_DTV_LIF_OUT_PROP_AMP_AMP_MIN 0 ++ #define Si2158_DTV_LIF_OUT_PROP_AMP_AMP_MAX 255 ++ ++ /* DTV_LIF_OUT property, OFFSET field definition (NO TITLE)*/ ++ #define Si2158_DTV_LIF_OUT_PROP_OFFSET_LSB 0 ++ #define Si2158_DTV_LIF_OUT_PROP_OFFSET_MASK 0xff ++ #define Si2158_DTV_LIF_OUT_PROP_OFFSET_DEFAULT 148 ++ #define Si2158_DTV_LIF_OUT_PROP_OFFSET_OFFSET_MIN 0 ++ #define Si2158_DTV_LIF_OUT_PROP_OFFSET_OFFSET_MAX 255 ++ ++#endif /* Si2158_DTV_LIF_OUT_PROP */ ++ ++/* Si2158 DTV_MODE property definition */ ++#define Si2158_DTV_MODE_PROP 0x0703 ++ ++#ifdef Si2158_DTV_MODE_PROP ++ #define Si2158_DTV_MODE_PROP_CODE 0x000703 ++ ++ ++ typedef struct { /* Si2158_DTV_MODE_PROP_struct */ ++ unsigned char bw; ++ unsigned char invert_spectrum; ++ unsigned char modulation; ++ } Si2158_DTV_MODE_PROP_struct; ++ ++ /* DTV_MODE property, BW field definition (NO TITLE)*/ ++ #define Si2158_DTV_MODE_PROP_BW_LSB 0 ++ #define Si2158_DTV_MODE_PROP_BW_MASK 0x0f ++ #define Si2158_DTV_MODE_PROP_BW_DEFAULT 8 ++ #define Si2158_DTV_MODE_PROP_BW_BW_6MHZ 6 ++ #define Si2158_DTV_MODE_PROP_BW_BW_7MHZ 7 ++ #define Si2158_DTV_MODE_PROP_BW_BW_8MHZ 8 ++ ++ /* DTV_MODE property, INVERT_SPECTRUM field definition (NO TITLE)*/ ++ #define Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_LSB 8 ++ #define Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_MASK 0x01 ++ #define Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_DEFAULT 0 ++ #define Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_NORMAL 0 ++ #define Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_INVERTED 1 ++ ++ /* DTV_MODE property, MODULATION field definition (NO TITLE)*/ ++ #define Si2158_DTV_MODE_PROP_MODULATION_LSB 4 ++ #define Si2158_DTV_MODE_PROP_MODULATION_MASK 0x0f ++ #define Si2158_DTV_MODE_PROP_MODULATION_DEFAULT 2 ++ #define Si2158_DTV_MODE_PROP_MODULATION_ATSC 0 ++ #define Si2158_DTV_MODE_PROP_MODULATION_QAM_US 1 ++ #define Si2158_DTV_MODE_PROP_MODULATION_DVBT 2 ++ #define Si2158_DTV_MODE_PROP_MODULATION_DVBC 3 ++ #define Si2158_DTV_MODE_PROP_MODULATION_ISDBT 4 ++ #define Si2158_DTV_MODE_PROP_MODULATION_ISDBC 5 ++ #define Si2158_DTV_MODE_PROP_MODULATION_DTMB 6 ++ ++#endif /* Si2158_DTV_MODE_PROP */ ++ ++/* Si2158 DTV_PGA_LIMITS property definition */ ++#define Si2158_DTV_PGA_LIMITS_PROP 0x0713 ++ ++#ifdef Si2158_DTV_PGA_LIMITS_PROP ++ #define Si2158_DTV_PGA_LIMITS_PROP_CODE 0x000713 ++ ++ ++ typedef struct { /* Si2158_DTV_PGA_LIMITS_PROP_struct */ ++ char max; ++ char min; ++ } Si2158_DTV_PGA_LIMITS_PROP_struct; ++ ++ /* DTV_PGA_LIMITS property, MAX field definition (NO TITLE)*/ ++ #define Si2158_DTV_PGA_LIMITS_PROP_MAX_LSB 8 ++ #define Si2158_DTV_PGA_LIMITS_PROP_MAX_MASK 0xff ++ #define Si2158_DTV_PGA_LIMITS_PROP_MAX_DEFAULT -1 ++ #define Si2158_DTV_PGA_LIMITS_PROP_MAX_MAX_MIN -1 ++ #define Si2158_DTV_PGA_LIMITS_PROP_MAX_MAX_MAX 56 ++ ++ /* DTV_PGA_LIMITS property, MIN field definition (NO TITLE)*/ ++ #define Si2158_DTV_PGA_LIMITS_PROP_MIN_LSB 0 ++ #define Si2158_DTV_PGA_LIMITS_PROP_MIN_MASK 0xff ++ #define Si2158_DTV_PGA_LIMITS_PROP_MIN_DEFAULT -1 ++ #define Si2158_DTV_PGA_LIMITS_PROP_MIN_MIN_MIN -1 ++ #define Si2158_DTV_PGA_LIMITS_PROP_MIN_MIN_MAX 56 ++ ++#endif /* Si2158_DTV_PGA_LIMITS_PROP */ ++ ++/* Si2158 DTV_PGA_TARGET property definition */ ++#define Si2158_DTV_PGA_TARGET_PROP 0x070f ++ ++#ifdef Si2158_DTV_PGA_TARGET_PROP ++ #define Si2158_DTV_PGA_TARGET_PROP_CODE 0x00070f ++ ++ ++ typedef struct { /* Si2158_DTV_PGA_TARGET_PROP_struct */ ++ unsigned char override_enable; ++ char pga_target; ++ } Si2158_DTV_PGA_TARGET_PROP_struct; ++ ++ /* DTV_PGA_TARGET property, OVERRIDE_ENABLE field definition (NO TITLE)*/ ++ #define Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_LSB 8 ++ #define Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_MASK 0x01 ++ #define Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_DEFAULT 0 ++ #define Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_DISABLE 0 ++ #define Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_ENABLE 1 ++ ++ /* DTV_PGA_TARGET property, PGA_TARGET field definition (NO TITLE)*/ ++ #define Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_LSB 0 ++ #define Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_MASK 0xff ++ #define Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_DEFAULT 0 ++ #define Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_PGA_TARGET_MIN -13 ++ #define Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_PGA_TARGET_MAX 7 ++ ++#endif /* Si2158_DTV_PGA_TARGET_PROP */ ++ ++/* Si2158 DTV_RF_TOP property definition */ ++#define Si2158_DTV_RF_TOP_PROP 0x0709 ++ ++#ifdef Si2158_DTV_RF_TOP_PROP ++ #define Si2158_DTV_RF_TOP_PROP_CODE 0x000709 ++ ++ ++ typedef struct { /* Si2158_DTV_RF_TOP_PROP_struct */ ++ unsigned char dtv_rf_top; ++ } Si2158_DTV_RF_TOP_PROP_struct; ++ ++ /* DTV_RF_TOP property, DTV_RF_TOP field definition (NO TITLE)*/ ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_LSB 0 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_MASK 0xff ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_DEFAULT 0 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_AUTO 0 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P6DB 9 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P5P5DB 10 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P5DB 11 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P4P5DB 12 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P4DB 13 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P3P5DB 14 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P3DB 15 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P2P5DB 16 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P2DB 17 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P1P5DB 18 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P1DB 19 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_P0P5DB 20 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_0DB 21 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M0P5DB 22 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M1DB 23 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M1P5DB 24 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M2DB 25 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M2P5DB 26 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M3DB 27 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M3P5DB 28 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M4DB 29 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M4P5DB 30 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M5DB 31 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M5P5DB 32 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M6DB 33 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M6P5DB 34 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M7DB 35 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M7P5DB 36 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M8DB 37 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M8P5DB 38 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M9DB 39 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M9P5DB 40 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M10DB 41 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M10P5DB 42 ++ #define Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_M11DB 43 ++ ++#endif /* Si2158_DTV_RF_TOP_PROP */ ++ ++/* Si2158 DTV_RSQ_RSSI_THRESHOLD property definition */ ++#define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP 0x0704 ++ ++#ifdef Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_CODE 0x000704 ++ ++ ++ typedef struct { /* Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_struct */ ++ char hi; ++ char lo; ++ } Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_struct; ++ ++ /* DTV_RSQ_RSSI_THRESHOLD property, HI field definition (NO TITLE)*/ ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_LSB 8 ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_MASK 0xff ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_DEFAULT 0 ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_HI_MIN -128 ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_HI_MAX 127 ++ ++ /* DTV_RSQ_RSSI_THRESHOLD property, LO field definition (NO TITLE)*/ ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_LSB 0 ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_MASK 0xff ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_DEFAULT -80 ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_LO_MIN -128 ++ #define Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_LO_MAX 127 ++ ++#endif /* Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP */ ++ ++/* Si2158 DTV_ZIF_DC_CANCELLER_BW property definition */ ++#define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP 0x0712 ++ ++#ifdef Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_CODE 0x000712 ++ ++ ++ typedef struct { /* Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_struct */ ++ unsigned char bandwidth; ++ } Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_struct; ++ ++ /* DTV_ZIF_DC_CANCELLER_BW property, BANDWIDTH field definition (NO TITLE)*/ ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_LSB 0 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_MASK 0xff ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_DEFAULT 16 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_4_HZ 0 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_8_HZ 1 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_15_HZ 2 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_30_HZ 3 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_61_HZ 4 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_121_HZ 5 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_243_HZ 6 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_486_HZ 7 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_972_HZ 8 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_1943_HZ 9 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_3888_HZ 10 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_7779_HZ 11 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_15573_HZ 12 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_31207_HZ 13 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_62658_HZ 14 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_126303_HZ 15 ++ #define Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_DEFAULT 16 ++ ++#endif /* Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP */ ++ ++/* Si2158 MASTER_IEN property definition */ ++#define Si2158_MASTER_IEN_PROP 0x0401 ++ ++#ifdef Si2158_MASTER_IEN_PROP ++ #define Si2158_MASTER_IEN_PROP_CODE 0x000401 ++ ++ ++ typedef struct { /* Si2158_MASTER_IEN_PROP_struct */ ++ unsigned char atvien; ++ unsigned char ctsien; ++ unsigned char dtvien; ++ unsigned char errien; ++ unsigned char tunien; ++ } Si2158_MASTER_IEN_PROP_struct; ++ ++ /* MASTER_IEN property, ATVIEN field definition (NO TITLE)*/ ++ #define Si2158_MASTER_IEN_PROP_ATVIEN_LSB 1 ++ #define Si2158_MASTER_IEN_PROP_ATVIEN_MASK 0x01 ++ #define Si2158_MASTER_IEN_PROP_ATVIEN_DEFAULT 0 ++ #define Si2158_MASTER_IEN_PROP_ATVIEN_OFF 0 ++ #define Si2158_MASTER_IEN_PROP_ATVIEN_ON 1 ++ ++ /* MASTER_IEN property, CTSIEN field definition (NO TITLE)*/ ++ #define Si2158_MASTER_IEN_PROP_CTSIEN_LSB 7 ++ #define Si2158_MASTER_IEN_PROP_CTSIEN_MASK 0x01 ++ #define Si2158_MASTER_IEN_PROP_CTSIEN_DEFAULT 0 ++ #define Si2158_MASTER_IEN_PROP_CTSIEN_OFF 0 ++ #define Si2158_MASTER_IEN_PROP_CTSIEN_ON 1 ++ ++ /* MASTER_IEN property, DTVIEN field definition (NO TITLE)*/ ++ #define Si2158_MASTER_IEN_PROP_DTVIEN_LSB 2 ++ #define Si2158_MASTER_IEN_PROP_DTVIEN_MASK 0x01 ++ #define Si2158_MASTER_IEN_PROP_DTVIEN_DEFAULT 0 ++ #define Si2158_MASTER_IEN_PROP_DTVIEN_OFF 0 ++ #define Si2158_MASTER_IEN_PROP_DTVIEN_ON 1 ++ ++ /* MASTER_IEN property, ERRIEN field definition (NO TITLE)*/ ++ #define Si2158_MASTER_IEN_PROP_ERRIEN_LSB 6 ++ #define Si2158_MASTER_IEN_PROP_ERRIEN_MASK 0x01 ++ #define Si2158_MASTER_IEN_PROP_ERRIEN_DEFAULT 0 ++ #define Si2158_MASTER_IEN_PROP_ERRIEN_OFF 0 ++ #define Si2158_MASTER_IEN_PROP_ERRIEN_ON 1 ++ ++ /* MASTER_IEN property, TUNIEN field definition (NO TITLE)*/ ++ #define Si2158_MASTER_IEN_PROP_TUNIEN_LSB 0 ++ #define Si2158_MASTER_IEN_PROP_TUNIEN_MASK 0x01 ++ #define Si2158_MASTER_IEN_PROP_TUNIEN_DEFAULT 0 ++ #define Si2158_MASTER_IEN_PROP_TUNIEN_OFF 0 ++ #define Si2158_MASTER_IEN_PROP_TUNIEN_ON 1 ++ ++#endif /* Si2158_MASTER_IEN_PROP */ ++ ++/* Si2158 TUNER_BLOCKED_VCO property definition */ ++#define Si2158_TUNER_BLOCKED_VCO_PROP 0x0504 ++ ++#ifdef Si2158_TUNER_BLOCKED_VCO_PROP ++ #define Si2158_TUNER_BLOCKED_VCO_PROP_CODE 0x000504 ++ ++ ++ typedef struct { /* Si2158_TUNER_BLOCKED_VCO_PROP_struct */ ++ int vco_code; ++ } Si2158_TUNER_BLOCKED_VCO_PROP_struct; ++ ++ /* TUNER_BLOCKED_VCO property, VCO_CODE field definition (NO TITLE)*/ ++ #define Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_LSB 0 ++ #define Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_MASK 0xffff ++ #define Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_DEFAULT 0x8000 ++ #define Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_VCO_CODE_MIN -32768 ++ #define Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_VCO_CODE_MAX 32767 ++ ++#endif /* Si2158_TUNER_BLOCKED_VCO_PROP */ ++ ++/* Si2158 TUNER_IEN property definition */ ++#define Si2158_TUNER_IEN_PROP 0x0501 ++ ++#ifdef Si2158_TUNER_IEN_PROP ++ #define Si2158_TUNER_IEN_PROP_CODE 0x000501 ++ ++ ++ typedef struct { /* Si2158_TUNER_IEN_PROP_struct */ ++ unsigned char rssihien; ++ unsigned char rssilien; ++ unsigned char tcien; ++ } Si2158_TUNER_IEN_PROP_struct; ++ ++ /* TUNER_IEN property, RSSIHIEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_IEN_PROP_RSSIHIEN_LSB 2 ++ #define Si2158_TUNER_IEN_PROP_RSSIHIEN_MASK 0x01 ++ #define Si2158_TUNER_IEN_PROP_RSSIHIEN_DEFAULT 0 ++ #define Si2158_TUNER_IEN_PROP_RSSIHIEN_DISABLE 0 ++ #define Si2158_TUNER_IEN_PROP_RSSIHIEN_ENABLE 1 ++ ++ /* TUNER_IEN property, RSSILIEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_IEN_PROP_RSSILIEN_LSB 1 ++ #define Si2158_TUNER_IEN_PROP_RSSILIEN_MASK 0x01 ++ #define Si2158_TUNER_IEN_PROP_RSSILIEN_DEFAULT 0 ++ #define Si2158_TUNER_IEN_PROP_RSSILIEN_DISABLE 0 ++ #define Si2158_TUNER_IEN_PROP_RSSILIEN_ENABLE 1 ++ ++ /* TUNER_IEN property, TCIEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_IEN_PROP_TCIEN_LSB 0 ++ #define Si2158_TUNER_IEN_PROP_TCIEN_MASK 0x01 ++ #define Si2158_TUNER_IEN_PROP_TCIEN_DEFAULT 1 ++ #define Si2158_TUNER_IEN_PROP_TCIEN_DISABLE 0 ++ #define Si2158_TUNER_IEN_PROP_TCIEN_ENABLE 1 ++ ++#endif /* Si2158_TUNER_IEN_PROP */ ++ ++/* Si2158 TUNER_INT_SENSE property definition */ ++#define Si2158_TUNER_INT_SENSE_PROP 0x0505 ++ ++#ifdef Si2158_TUNER_INT_SENSE_PROP ++ #define Si2158_TUNER_INT_SENSE_PROP_CODE 0x000505 ++ ++ ++ typedef struct { /* Si2158_TUNER_INT_SENSE_PROP_struct */ ++ unsigned char rssihnegen; ++ unsigned char rssihposen; ++ unsigned char rssilnegen; ++ unsigned char rssilposen; ++ unsigned char tcnegen; ++ unsigned char tcposen; ++ } Si2158_TUNER_INT_SENSE_PROP_struct; ++ ++ /* TUNER_INT_SENSE property, RSSIHNEGEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_LSB 2 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_MASK 0x01 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_DEFAULT 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_DISABLE 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_ENABLE 1 ++ ++ /* TUNER_INT_SENSE property, RSSIHPOSEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_LSB 10 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_MASK 0x01 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_DEFAULT 1 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_DISABLE 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_ENABLE 1 ++ ++ /* TUNER_INT_SENSE property, RSSILNEGEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_LSB 1 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_MASK 0x01 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_DEFAULT 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_DISABLE 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_ENABLE 1 ++ ++ /* TUNER_INT_SENSE property, RSSILPOSEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_LSB 9 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_MASK 0x01 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_DEFAULT 1 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_DISABLE 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_ENABLE 1 ++ ++ /* TUNER_INT_SENSE property, TCNEGEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_LSB 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_MASK 0x01 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_DEFAULT 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_DISABLE 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_ENABLE 1 ++ ++ /* TUNER_INT_SENSE property, TCPOSEN field definition (NO TITLE)*/ ++ #define Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_LSB 8 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_MASK 0x01 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_DEFAULT 1 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_DISABLE 0 ++ #define Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_ENABLE 1 ++ ++#endif /* Si2158_TUNER_INT_SENSE_PROP */ ++ ++/* Si2158 TUNER_LO_INJECTION property definition */ ++#define Si2158_TUNER_LO_INJECTION_PROP 0x0506 ++ ++#ifdef Si2158_TUNER_LO_INJECTION_PROP ++ #define Si2158_TUNER_LO_INJECTION_PROP_CODE 0x000506 ++ ++ ++ typedef struct { /* Si2158_TUNER_LO_INJECTION_PROP_struct */ ++ unsigned char band_1; ++ unsigned char band_2; ++ unsigned char band_3; ++ } Si2158_TUNER_LO_INJECTION_PROP_struct; ++ ++ /* TUNER_LO_INJECTION property, BAND_1 field definition (NO TITLE)*/ ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_1_LSB 0 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_1_MASK 0x01 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_1_DEFAULT 1 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_1_LOW_SIDE 0 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_1_HIGH_SIDE 1 ++ ++ /* TUNER_LO_INJECTION property, BAND_2 field definition (NO TITLE)*/ ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_2_LSB 1 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_2_MASK 0x01 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_2_DEFAULT 0 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_2_LOW_SIDE 0 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_2_HIGH_SIDE 1 ++ ++ /* TUNER_LO_INJECTION property, BAND_3 field definition (NO TITLE)*/ ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_3_LSB 2 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_3_MASK 0x01 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_3_DEFAULT 0 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_3_LOW_SIDE 0 ++ #define Si2158_TUNER_LO_INJECTION_PROP_BAND_3_HIGH_SIDE 1 ++ ++#endif /* Si2158_TUNER_LO_INJECTION_PROP */ ++ ++/* Si2158 TUNER_RETURN_LOSS property definition */ ++#define Si2158_TUNER_RETURN_LOSS_PROP 0x0507 ++ ++#ifdef Si2158_TUNER_RETURN_LOSS_PROP ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CODE 0x000507 ++ ++ ++ typedef struct { /* Si2158_TUNER_RETURN_LOSS_PROP_struct */ ++ unsigned char config; ++ unsigned char mode; ++ } Si2158_TUNER_RETURN_LOSS_PROP_struct; ++ ++ /* TUNER_RETURN_LOSS property, CONFIG field definition (NO TITLE)*/ ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_LSB 0 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_MASK 0xff ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_DEFAULT 127 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_27 27 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_31 31 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_35 35 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_39 39 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_43 43 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_47 47 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_51 51 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_59 59 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_127 127 ++ ++ /* TUNER_RETURN_LOSS property, MODE field definition (NO TITLE)*/ ++ #define Si2158_TUNER_RETURN_LOSS_PROP_MODE_LSB 8 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_MODE_MASK 0xff ++ #define Si2158_TUNER_RETURN_LOSS_PROP_MODE_DEFAULT 0 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_MODE_TERRESTRIAL 0 ++ #define Si2158_TUNER_RETURN_LOSS_PROP_MODE_CABLE 1 ++ ++#endif /* Si2158_TUNER_RETURN_LOSS_PROP */ ++ ++/* _properties_defines_insertion_point */ ++ ++/* _properties_struct_insertion_start */ ++ ++ /* --------------------------------------------*/ ++ /* PROPERTIES STRUCT */ ++ /* This stores all property fields */ ++ /* --------------------------------------------*/ ++ typedef struct { ++ #ifdef Si2158_ATV_AFC_RANGE_PROP ++ Si2158_ATV_AFC_RANGE_PROP_struct atv_afc_range; ++ #endif /* Si2158_ATV_AFC_RANGE_PROP */ ++ #ifdef Si2158_ATV_AGC_SPEED_PROP ++ Si2158_ATV_AGC_SPEED_PROP_struct atv_agc_speed; ++ #endif /* Si2158_ATV_AGC_SPEED_PROP */ ++ #ifdef Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP ++ Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_struct atv_agc_speed_low_rssi; ++ #endif /* Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP */ ++ #ifdef Si2158_ATV_ARTIFICIAL_SNOW_PROP ++ Si2158_ATV_ARTIFICIAL_SNOW_PROP_struct atv_artificial_snow; ++ #endif /* Si2158_ATV_ARTIFICIAL_SNOW_PROP */ ++ #ifdef Si2158_ATV_CONFIG_IF_PORT_PROP ++ Si2158_ATV_CONFIG_IF_PORT_PROP_struct atv_config_if_port; ++ #endif /* Si2158_ATV_CONFIG_IF_PORT_PROP */ ++ #ifdef Si2158_ATV_EXT_AGC_PROP ++ Si2158_ATV_EXT_AGC_PROP_struct atv_ext_agc; ++ #endif /* Si2158_ATV_EXT_AGC_PROP */ ++ #ifdef Si2158_ATV_IEN_PROP ++ Si2158_ATV_IEN_PROP_struct atv_ien; ++ #endif /* Si2158_ATV_IEN_PROP */ ++ #ifdef Si2158_ATV_INT_SENSE_PROP ++ Si2158_ATV_INT_SENSE_PROP_struct atv_int_sense; ++ #endif /* Si2158_ATV_INT_SENSE_PROP */ ++ #ifdef Si2158_ATV_LIF_FREQ_PROP ++ Si2158_ATV_LIF_FREQ_PROP_struct atv_lif_freq; ++ #endif /* Si2158_ATV_LIF_FREQ_PROP */ ++ #ifdef Si2158_ATV_LIF_OUT_PROP ++ Si2158_ATV_LIF_OUT_PROP_struct atv_lif_out; ++ #endif /* Si2158_ATV_LIF_OUT_PROP */ ++ #ifdef Si2158_ATV_PGA_TARGET_PROP ++ Si2158_ATV_PGA_TARGET_PROP_struct atv_pga_target; ++ #endif /* Si2158_ATV_PGA_TARGET_PROP */ ++ #ifdef Si2158_ATV_RF_TOP_PROP ++ Si2158_ATV_RF_TOP_PROP_struct atv_rf_top; ++ #endif /* Si2158_ATV_RF_TOP_PROP */ ++ #ifdef Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP ++ Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_struct atv_rsq_rssi_threshold; ++ #endif /* Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP */ ++ #ifdef Si2158_ATV_VIDEO_MODE_PROP ++ Si2158_ATV_VIDEO_MODE_PROP_struct atv_video_mode; ++ #endif /* Si2158_ATV_VIDEO_MODE_PROP */ ++ #ifdef Si2158_ATV_VSNR_CAP_PROP ++ Si2158_ATV_VSNR_CAP_PROP_struct atv_vsnr_cap; ++ #endif /* Si2158_ATV_VSNR_CAP_PROP */ ++ #ifdef Si2158_CRYSTAL_TRIM_PROP ++ Si2158_CRYSTAL_TRIM_PROP_struct crystal_trim; ++ #endif /* Si2158_CRYSTAL_TRIM_PROP */ ++ #ifdef Si2158_DTV_AGC_FREEZE_INPUT_PROP ++ Si2158_DTV_AGC_FREEZE_INPUT_PROP_struct dtv_agc_freeze_input; ++ #endif /* Si2158_DTV_AGC_FREEZE_INPUT_PROP */ ++ #ifdef Si2158_DTV_AGC_SPEED_PROP ++ Si2158_DTV_AGC_SPEED_PROP_struct dtv_agc_speed; ++ #endif /* Si2158_DTV_AGC_SPEED_PROP */ ++ #ifdef Si2158_DTV_CONFIG_IF_PORT_PROP ++ Si2158_DTV_CONFIG_IF_PORT_PROP_struct dtv_config_if_port; ++ #endif /* Si2158_DTV_CONFIG_IF_PORT_PROP */ ++ #ifdef Si2158_DTV_EXT_AGC_PROP ++ Si2158_DTV_EXT_AGC_PROP_struct dtv_ext_agc; ++ #endif /* Si2158_DTV_EXT_AGC_PROP */ ++ #ifdef Si2158_DTV_FILTER_SELECT_PROP ++ Si2158_DTV_FILTER_SELECT_PROP_struct dtv_filter_select; ++ #endif /* Si2158_DTV_FILTER_SELECT_PROP */ ++ #ifdef Si2158_DTV_IEN_PROP ++ Si2158_DTV_IEN_PROP_struct dtv_ien; ++ #endif /* Si2158_DTV_IEN_PROP */ ++ #ifdef Si2158_DTV_INITIAL_AGC_SPEED_PROP ++ Si2158_DTV_INITIAL_AGC_SPEED_PROP_struct dtv_initial_agc_speed; ++ #endif /* Si2158_DTV_INITIAL_AGC_SPEED_PROP */ ++ #ifdef Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP ++ Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_struct dtv_initial_agc_speed_period; ++ #endif /* Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP */ ++ #ifdef Si2158_DTV_INTERNAL_ZIF_PROP ++ Si2158_DTV_INTERNAL_ZIF_PROP_struct dtv_internal_zif; ++ #endif /* Si2158_DTV_INTERNAL_ZIF_PROP */ ++ #ifdef Si2158_DTV_INT_SENSE_PROP ++ Si2158_DTV_INT_SENSE_PROP_struct dtv_int_sense; ++ #endif /* Si2158_DTV_INT_SENSE_PROP */ ++ #ifdef Si2158_DTV_LIF_FREQ_PROP ++ Si2158_DTV_LIF_FREQ_PROP_struct dtv_lif_freq; ++ #endif /* Si2158_DTV_LIF_FREQ_PROP */ ++ #ifdef Si2158_DTV_LIF_OUT_PROP ++ Si2158_DTV_LIF_OUT_PROP_struct dtv_lif_out; ++ #endif /* Si2158_DTV_LIF_OUT_PROP */ ++ #ifdef Si2158_DTV_MODE_PROP ++ Si2158_DTV_MODE_PROP_struct dtv_mode; ++ #endif /* Si2158_DTV_MODE_PROP */ ++ #ifdef Si2158_DTV_PGA_LIMITS_PROP ++ Si2158_DTV_PGA_LIMITS_PROP_struct dtv_pga_limits; ++ #endif /* Si2158_DTV_PGA_LIMITS_PROP */ ++ #ifdef Si2158_DTV_PGA_TARGET_PROP ++ Si2158_DTV_PGA_TARGET_PROP_struct dtv_pga_target; ++ #endif /* Si2158_DTV_PGA_TARGET_PROP */ ++ #ifdef Si2158_DTV_RF_TOP_PROP ++ Si2158_DTV_RF_TOP_PROP_struct dtv_rf_top; ++ #endif /* Si2158_DTV_RF_TOP_PROP */ ++ #ifdef Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP ++ Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_struct dtv_rsq_rssi_threshold; ++ #endif /* Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP */ ++ #ifdef Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP ++ Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_struct dtv_zif_dc_canceller_bw; ++ #endif /* Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP */ ++ #ifdef Si2158_MASTER_IEN_PROP ++ Si2158_MASTER_IEN_PROP_struct master_ien; ++ #endif /* Si2158_MASTER_IEN_PROP */ ++ #ifdef Si2158_TUNER_BLOCKED_VCO_PROP ++ Si2158_TUNER_BLOCKED_VCO_PROP_struct tuner_blocked_vco; ++ #endif /* Si2158_TUNER_BLOCKED_VCO_PROP */ ++ #ifdef Si2158_TUNER_IEN_PROP ++ Si2158_TUNER_IEN_PROP_struct tuner_ien; ++ #endif /* Si2158_TUNER_IEN_PROP */ ++ #ifdef Si2158_TUNER_INT_SENSE_PROP ++ Si2158_TUNER_INT_SENSE_PROP_struct tuner_int_sense; ++ #endif /* Si2158_TUNER_INT_SENSE_PROP */ ++ #ifdef Si2158_TUNER_LO_INJECTION_PROP ++ Si2158_TUNER_LO_INJECTION_PROP_struct tuner_lo_injection; ++ #endif /* Si2158_TUNER_LO_INJECTION_PROP */ ++ #ifdef Si2158_TUNER_RETURN_LOSS_PROP ++ Si2158_TUNER_RETURN_LOSS_PROP_struct tuner_return_loss; ++ #endif /* Si2158_TUNER_RETURN_LOSS_PROP */ ++ } Si2158_PropObj; ++/* _properties_struct_insertion_point */ ++ ++/* #define Si2158_GET_PROPERTY_STRING */ ++ ++#endif /* _Si2158_PROPERTIES_H_ */ ++ ++ ++ ++ ++ +diff -urN a/drivers/media/dvb-frontends/si2168_20_ROM2_Patch_2_0b5.h b/drivers/media/dvb-frontends/si2168_20_ROM2_Patch_2_0b5.h +--- a/drivers/media/dvb-frontends/si2168_20_ROM2_Patch_2_0b5.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_20_ROM2_Patch_2_0b5.h 2013-02-14 22:56:24.000000000 +0800 +@@ -0,0 +1,818 @@ ++#ifndef _Si2168_PATCH_2_0b5_TABLE_H_ ++#define _Si2168_PATCH_2_0b5_TABLE_H_ ++ ++#define Si2168_PATCH_2_0b5_PART 68 ++#define Si2168_PATCH_2_0b5_ROM 2 ++#define Si2168_PATCH_2_0b5_PMAJOR '2' ++#define Si2168_PATCH_2_0b5_PMINOR '0' ++#define Si2168_PATCH_2_0b5_PBUILD 3 ++ ++unsigned char Si2168_Patch_2_0b5[] = { ++0x04,0x01,0x00,0x00,0x00,0x00,0x6E,0x22, ++0x05,0x8A,0xC7,0x3F,0x6A,0x43,0x27,0x94, ++0x2A,0xA1,0x65,0x0E,0xAD,0x67,0x7B,0x0D, ++0x05,0x68,0x6B,0xE7,0xC3,0xAD,0xF0,0xDC, ++0x22,0xD7,0xDD,0x95,0x46,0x13,0xD0,0xF8, ++0x05,0x02,0x93,0x0D,0x17,0x9C,0x87,0x95, ++0x2A,0xBB,0xAB,0xDD,0x99,0xD4,0x4A,0x43, ++0x05,0x56,0x55,0x15,0x28,0xD5,0x94,0xD3, ++0x22,0x6B,0x94,0x09,0x42,0xE6,0x53,0xDE, ++0x05,0xD2,0xEA,0xAF,0x7F,0xF7,0x2A,0xC0, ++0x22,0xC9,0x77,0xE4,0x73,0x56,0x8C,0xF3, ++0x05,0x69,0xF9,0xE7,0x8B,0x9B,0xFF,0x89, ++0x27,0x96,0x91,0x8E,0x83,0x82,0xD5,0x5F, ++0x27,0x1E,0x9A,0x0A,0x10,0x48,0x01,0x85, ++0x2F,0xB4,0x9F,0xD3,0x54,0xEE,0x7E,0xEB, ++0x2F,0x08,0x68,0xC9,0x51,0xCA,0x35,0x14, ++0x27,0x83,0x90,0xA8,0xC1,0x7C,0xDE,0xD2, ++0x27,0x0D,0x5C,0xBF,0xCD,0xA0,0xCC,0x56, ++0x27,0xF8,0xBF,0x57,0x09,0x9E,0xCC,0x1B, ++0x27,0x67,0x1C,0x92,0x39,0xB0,0xD3,0x77, ++0x2F,0xEB,0x40,0xFF,0xFC,0x5D,0xC9,0x46, ++0x2F,0x81,0x3B,0x65,0x96,0xC1,0xC9,0x72, ++0x27,0x0D,0x5F,0x5B,0xD9,0xC1,0x1C,0xB4, ++0x27,0x6B,0xCA,0xF6,0x84,0xFC,0xEE,0xCE, ++0x2F,0xE8,0x3C,0x26,0xCF,0x1C,0xF6,0xBF, ++0x27,0x9F,0x7C,0x60,0xF8,0xF6,0x1F,0x6F, ++0x27,0xFB,0x6C,0xE2,0xF9,0xC7,0xA5,0x30, ++0x2F,0x31,0x78,0xFB,0xAD,0xFF,0xD1,0x7C, ++0x27,0x2C,0x79,0x51,0x3A,0x9E,0x70,0xB9, ++0x27,0x9C,0x91,0xBD,0xE7,0x23,0x1F,0x5E, ++0x27,0x0F,0x7D,0x82,0x09,0xD1,0xEF,0x48, ++0x2F,0x48,0x0B,0x3E,0x5B,0x58,0x4A,0xA3, ++0x27,0x1E,0xB3,0x41,0x81,0x59,0xDD,0x0F, ++0x2F,0xEC,0xA8,0x54,0x44,0x49,0x9C,0xF9, ++0x27,0xE4,0xAE,0x01,0xD1,0xDD,0x22,0x14, ++0x2F,0x3F,0xA9,0x3A,0x88,0xA8,0x7D,0xC5, ++0x27,0x04,0x3B,0x2A,0xD8,0x30,0x66,0xE9, ++0x27,0x58,0x6F,0x93,0xB2,0x4F,0x59,0x19, ++0x27,0x58,0xCC,0xDF,0x44,0xD0,0x58,0x89, ++0x2F,0x67,0x72,0xC0,0x15,0x4C,0x54,0x16, ++0x2F,0x5A,0xFE,0x0F,0x15,0x6C,0x27,0xC9, ++0x2F,0x23,0xC6,0x71,0xA7,0x70,0x24,0xE2, ++0x2F,0xDD,0xB0,0x33,0x71,0x6E,0x50,0x46, ++0x2F,0x32,0x95,0x38,0xD7,0x1E,0xD8,0x0B, ++0x2F,0x74,0x49,0x1B,0x1A,0x90,0x28,0x29, ++0x2F,0xC2,0x8C,0x74,0xA6,0xDB,0x54,0x33, ++0x2F,0x3A,0xE0,0x31,0x10,0x3F,0xC2,0x67, ++0x2F,0x86,0x34,0x8A,0x11,0x2D,0xD7,0x92, ++0x27,0xA7,0xF7,0x3D,0xE3,0x79,0x39,0x0F, ++0x2F,0xA0,0xAF,0xC6,0xD2,0xC7,0xD2,0x6D, ++0x2F,0xBD,0x30,0x5F,0x7B,0x54,0x94,0xB8, ++0x2F,0x0B,0x37,0x94,0xDB,0x7F,0x43,0x07, ++0x27,0xA5,0x7F,0xC4,0xC8,0x91,0xF3,0xC7, ++0x2F,0x5B,0xE5,0x75,0xA4,0x40,0x53,0x47, ++0x2F,0x5E,0x83,0xD0,0x22,0x99,0xB7,0xA6, ++0x2F,0xA5,0x2B,0x44,0x02,0x40,0x3C,0xF4, ++0x27,0x05,0xE0,0x90,0x42,0x6D,0xB6,0x2E, ++0x27,0xA8,0x6F,0x27,0x1B,0xAF,0xEA,0xB1, ++0x2F,0x56,0x9A,0x85,0xB5,0xFE,0x29,0x57, ++0x27,0x9B,0x53,0x9F,0x41,0x62,0x52,0x25, ++0x2F,0x2E,0xB2,0x16,0x14,0x95,0xE5,0xD9, ++0x27,0xD5,0x6C,0xB7,0xA7,0x21,0xE2,0xBB, ++0x27,0x9B,0x07,0x42,0xB7,0xFC,0xF5,0xC6, ++0x2F,0x77,0x36,0x47,0x57,0xF3,0x71,0x06, ++0x27,0xF4,0x25,0x41,0x87,0x5C,0xB6,0x70, ++0x27,0xC9,0x81,0xD3,0x7E,0xF2,0x6B,0x5E, ++0x2F,0xE8,0xD1,0x50,0x1F,0x94,0x4E,0xD0, ++0x27,0xCB,0x2F,0xE2,0x04,0x89,0x4E,0x4F, ++0x27,0xC5,0x09,0x09,0x0D,0x62,0x40,0x84, ++0x2F,0x24,0x4E,0xDA,0xBF,0x65,0x84,0x45, ++0x27,0x70,0x45,0x3B,0x16,0xA0,0xA4,0x92, ++0x2F,0xC6,0xB6,0x61,0x92,0x27,0x50,0x30, ++0x2F,0x79,0x9C,0x38,0xFE,0x72,0xD9,0x17, ++0x27,0x05,0xB5,0x57,0x86,0x73,0x31,0x8B, ++0x2F,0xA0,0x72,0xD1,0xD1,0x0F,0x71,0xAE, ++0x2F,0x58,0xE1,0x15,0x8C,0x41,0xE4,0x14, ++0x2F,0x79,0xE1,0x2F,0x04,0xD6,0xF7,0xE6, ++0x2F,0xDA,0xF1,0x99,0x1A,0x2A,0xFC,0x74, ++0x2F,0x4F,0x0F,0x4A,0xF8,0xDF,0x7E,0x31, ++0x27,0xB7,0x84,0x0E,0xE9,0x83,0xD3,0x1C, ++0x2F,0xC7,0x8B,0x37,0xCA,0xA4,0x99,0x2B, ++0x27,0x55,0xD9,0x0D,0xFC,0xE8,0xB2,0x45, ++0x2F,0xDC,0x96,0xE2,0x33,0xD7,0xD2,0x5A, ++0x27,0x44,0xEF,0xAF,0x34,0x75,0xF1,0xF0, ++0x2F,0x84,0x84,0x91,0x4B,0x0A,0x7B,0xD0, ++0x2F,0xDC,0x67,0x6F,0x5D,0x59,0xC2,0x9F, ++0x27,0xAC,0xF5,0xDB,0x23,0x46,0xFB,0xAF, ++0x27,0x17,0x3F,0x27,0x0C,0x34,0x6B,0x2F, ++0x27,0xCC,0x2F,0xD1,0xCB,0x8C,0xBE,0xD2, ++0x2F,0x2E,0x79,0x26,0xA5,0xEA,0x05,0x49, ++0x27,0x12,0x88,0x17,0x3A,0xD3,0x41,0x7E, ++0x27,0xCE,0xBC,0xFD,0x24,0x72,0xCE,0x77, ++0x27,0x91,0xF9,0x72,0x68,0x83,0xF7,0x5C, ++0x2F,0xFD,0xAC,0xE3,0x8B,0x59,0x4E,0x5D, ++0x2F,0x13,0xB3,0xA0,0xE9,0xDE,0x58,0xBD, ++0x27,0xF7,0x6A,0x2E,0x84,0xA7,0x14,0x48, ++0x27,0x08,0xE6,0xBC,0x96,0xDF,0xF9,0xE3, ++0x27,0x55,0xFF,0x97,0x69,0x40,0x12,0x9B, ++0x27,0x6E,0x73,0x46,0xA7,0xFD,0x24,0x0B, ++0x2F,0xC0,0x34,0x12,0xB9,0x86,0x80,0x99, ++0x2F,0x35,0x88,0xB7,0xE3,0x37,0xF6,0xB9, ++0x2F,0x0A,0x6E,0x26,0x63,0xA2,0x7F,0x73, ++0x27,0xC0,0x93,0x01,0x5A,0xB3,0x76,0x6F, ++0x2F,0x1A,0x12,0x1E,0xA5,0x2F,0x63,0x79, ++0x2F,0xF4,0x0E,0xCF,0xCC,0x5D,0x32,0x73, ++0x2F,0x74,0x3D,0xBC,0x18,0x30,0x6A,0xB0, ++0x27,0x3C,0xB7,0xAC,0xCC,0xB3,0x20,0x56, ++0x2F,0x76,0xAD,0x00,0x52,0xC9,0xA0,0xE1, ++0x27,0x15,0x3B,0xE4,0x7B,0xF6,0x0F,0xE2, ++0x2F,0x5D,0x70,0x35,0xDE,0x4B,0x3E,0x3B, ++0x2F,0x8D,0xE3,0x7B,0xBA,0xF0,0x7D,0xBF, ++0x27,0x35,0xFD,0xD3,0x2B,0x35,0x3B,0x9C, ++0x2F,0x6A,0x9C,0xD5,0x95,0x2C,0x86,0x1C, ++0x27,0x42,0x0C,0x1F,0xEA,0xCD,0xF5,0x97, ++0x27,0x65,0xB1,0x36,0x1D,0xDC,0x55,0x83, ++0x2F,0x88,0x89,0x23,0x65,0x4C,0x98,0xAA, ++0x2F,0x26,0x4F,0x6F,0x74,0xD3,0x93,0xBA, ++0x2F,0x94,0xA1,0x7D,0x61,0x84,0x1B,0xF9, ++0x27,0x8D,0xD3,0x85,0x70,0xE0,0xFC,0xF7, ++0x27,0x58,0xE6,0xAA,0x6C,0x2C,0x8E,0x13, ++0x2F,0x95,0xC3,0x8D,0xC0,0x8D,0x14,0x5E, ++0x2F,0xE2,0x71,0x93,0x92,0xF0,0xE7,0x4C, ++0x2F,0x2E,0x2D,0x14,0x4B,0x64,0x90,0x66, ++0x2F,0x9A,0x34,0x47,0xFA,0x2F,0x95,0xE9, ++0x2F,0xEE,0x30,0x62,0xE2,0x6C,0xED,0x87, ++0x2F,0xBC,0x86,0xDB,0xD5,0xB6,0x3F,0x24, ++0x27,0xC7,0x6B,0x9A,0xAB,0x63,0x7F,0x17, ++0x2F,0x1E,0xD2,0x78,0x27,0xE1,0x69,0x2A, ++0x27,0x64,0x69,0x37,0x1C,0x8D,0xBD,0x13, ++0x27,0x92,0x1B,0x30,0x48,0x10,0xC7,0x86, ++0x2F,0x29,0x03,0x95,0x97,0x23,0x1E,0x1C, ++0x27,0xD5,0x24,0x62,0x80,0xDC,0xE9,0x40, ++0x27,0xF1,0xAA,0x89,0x7A,0xFF,0xD4,0x85, ++0x2F,0x15,0x9B,0x5D,0x89,0xC8,0x9E,0x7A, ++0x2F,0x7A,0xA5,0xDD,0x4C,0xFC,0x33,0x98, ++0x2F,0x5D,0x3E,0xD4,0x38,0x49,0xB5,0x09, ++0x2F,0x8E,0xD6,0x1C,0x1B,0x9C,0x20,0x75, ++0x27,0x04,0x27,0x8B,0x02,0x5E,0x0F,0x83, ++0x27,0x4A,0xDB,0xDC,0xFF,0x1F,0xA8,0x7C, ++0x2F,0xEC,0x32,0x5B,0x7B,0xEB,0xBB,0xA4, ++0x27,0x04,0x64,0x47,0x68,0x0D,0x07,0xFC, ++0x27,0x62,0x0F,0x73,0xF0,0xF5,0x28,0x6C, ++0x27,0x19,0xCD,0x24,0x9B,0x4F,0x6C,0x38, ++0x27,0x06,0x42,0x9F,0xE3,0x8A,0xE8,0xE9, ++0x27,0xD8,0xC8,0xE4,0x90,0x15,0x8A,0xD6, ++0x27,0x1B,0xB3,0xE4,0x21,0x6F,0x56,0xEE, ++0x27,0xCF,0x92,0x4A,0x30,0x12,0x52,0xFE, ++0x27,0x11,0x3B,0x9B,0x78,0x43,0x76,0xF3, ++0x2F,0x11,0x06,0x5B,0xA4,0xCB,0xCD,0x06, ++0x2F,0x5D,0x07,0x26,0xEF,0xCF,0x8F,0x4E, ++0x2F,0xFA,0x47,0xA6,0x98,0x51,0x49,0x24, ++0x27,0x71,0x79,0x55,0x75,0x86,0x8C,0x08, ++0x27,0xE6,0x3F,0xD5,0x2B,0x73,0xE8,0xB4, ++0x2F,0x35,0xE7,0xE5,0xAB,0x21,0xBD,0x4F, ++0x2F,0xF7,0x12,0x32,0x50,0x55,0x17,0x69, ++0x27,0xF8,0x9F,0xF8,0x6F,0x16,0x66,0x76, ++0x27,0x0A,0x27,0x82,0xA0,0xF9,0x32,0xB7, ++0x2F,0x44,0x4B,0x76,0x26,0xD4,0x37,0x89, ++0x27,0x63,0x30,0xE8,0xBF,0x26,0x4E,0xAF, ++0x27,0x38,0xF9,0xFB,0xB8,0x2E,0x3B,0x23, ++0x27,0x4F,0x21,0x3E,0x7C,0x69,0x4D,0x6D, ++0x27,0x22,0xCB,0x6D,0x2B,0xF6,0xF1,0x0B, ++0x2F,0x75,0xCC,0xDD,0xA7,0x2A,0x3A,0x80, ++0x2F,0x6A,0x39,0x70,0x31,0xCC,0xEA,0x93, ++0x27,0x88,0xF1,0x1E,0x87,0x92,0x4A,0xAC, ++0x2F,0x14,0xAD,0x2F,0x55,0x46,0x60,0xAA, ++0x27,0xB0,0x01,0x00,0x2B,0x1C,0x3A,0x41, ++0x27,0xD5,0x6D,0x7C,0x2B,0xD7,0xDD,0xD8, ++0x27,0xFE,0x23,0x37,0xB3,0x10,0xAE,0x31, ++0x27,0xBC,0xAB,0x1A,0xCC,0x7F,0x14,0xE5, ++0x27,0x91,0x77,0x0C,0xDD,0xAB,0x3A,0x50, ++0x27,0x23,0x07,0x2F,0x00,0xC1,0x25,0x10, ++0x27,0xD7,0xFB,0x2D,0xE7,0xFB,0xFC,0x74, ++0x2F,0x82,0xB5,0x2A,0xEA,0x5D,0xD9,0x1A, ++0x27,0x83,0xEA,0xB7,0x9B,0x9C,0x4C,0xAB, ++0x2F,0x33,0x8D,0xD4,0xCA,0x4E,0xBF,0x9A, ++0x2F,0x3A,0x76,0xD6,0xC3,0xB8,0x99,0xA6, ++0x2F,0x13,0x48,0x1B,0x5F,0x2E,0xAC,0x01, ++0x27,0x1C,0xEE,0x4F,0xC3,0x57,0x13,0xFF, ++0x2F,0x47,0xD9,0xD3,0x05,0x19,0x47,0x81, ++0x27,0x4F,0x0C,0x06,0x4D,0x08,0x70,0x2A, ++0x2F,0xB9,0x54,0x46,0xFE,0x6B,0x72,0x90, ++0x27,0x69,0xDA,0xFC,0x92,0x94,0xA8,0x2F, ++0x27,0xB5,0x8A,0xC0,0x20,0xBD,0x70,0xA7, ++0x2F,0x0D,0x52,0xDC,0xFF,0x5A,0x32,0xCC, ++0x27,0x44,0xB1,0x2C,0x10,0x39,0x49,0x38, ++0x27,0x41,0xE7,0x37,0x7A,0x0C,0x30,0x89, ++0x2F,0x1C,0x7F,0x40,0xEA,0xE3,0xA0,0xDE, ++0x27,0xB6,0x5D,0xA1,0x1B,0x7E,0x1A,0xDD, ++0x2F,0x0B,0xC7,0xAF,0xA5,0xDA,0xFE,0xDA, ++0x27,0x33,0x32,0xFF,0x01,0x7D,0x29,0x22, ++0x2F,0x01,0x34,0xE2,0xD2,0x0A,0xAA,0x3F, ++0x27,0x87,0x24,0x77,0x6C,0xE9,0x1E,0xCB, ++0x27,0x92,0x62,0x8D,0x76,0xC2,0x8D,0x44, ++0x2F,0xFA,0xEE,0x3C,0xA9,0x62,0xCC,0x12, ++0x27,0x50,0xBE,0x4C,0xBC,0x8F,0xD4,0x2D, ++0x27,0xCF,0x8A,0x22,0xDD,0x31,0xC2,0x7C, ++0x2F,0xE4,0x95,0x2D,0xB7,0x97,0xEE,0x6B, ++0x2F,0xC5,0x00,0x8E,0xF8,0x31,0x22,0xC3, ++0x27,0x8F,0xD7,0x29,0x24,0xB3,0x25,0x39, ++0x27,0x45,0xD4,0x58,0x2A,0x98,0xA4,0x43, ++0x27,0xEC,0x9B,0xDF,0xBC,0x4F,0x6E,0xD9, ++0x2F,0xBD,0xCB,0xC2,0xCF,0x41,0x70,0xCF, ++0x27,0x43,0x2B,0x1A,0xDB,0x8D,0x63,0x26, ++0x2F,0xD5,0x9B,0xAB,0xC7,0x77,0x75,0x7E, ++0x27,0x1F,0x63,0xBC,0xF3,0x9B,0x9D,0xBE, ++0x2F,0xF4,0x65,0x69,0xA4,0x72,0x23,0xCA, ++0x21,0xFB,0x21,0x43,0x02,0xCB,0x99,0x36, ++0x05,0x00,0x47,0x01,0xF1,0x03,0x5F,0x8D, ++0x22,0x1E,0xC2,0x9B,0x4A,0x01,0xD1,0xCF, ++0x05,0x90,0x38,0xFC,0x96,0xC0,0x98,0x96, ++0x2C,0x24,0x41,0x26,0x01,0xA4,0x24,0x12, ++0x05,0xE0,0xED,0x23,0xAE,0x82,0xA9,0xE6, ++0x22,0xE5,0xB8,0xB5,0x95,0xAD,0x92,0xC6, ++0x05,0xCD,0xF6,0x39,0xB9,0x0B,0x09,0x76, ++0x22,0x1C,0x35,0x18,0x64,0xBB,0xC6,0x25, ++0x05,0x96,0xE2,0x75,0x4B,0x49,0x53,0x10, ++0x29,0x01,0x91,0x8E,0xCD,0x99,0x6B,0xAA, ++0x05,0x5F,0x76,0x90,0x4A,0x0F,0x04,0xEC, ++0x2B,0xF6,0x1E,0x90,0x2E,0xD8,0xD2,0x31, ++0x05,0xEE,0x77,0xFB,0x8B,0xA0,0x3D,0x9A, ++0x2C,0x85,0x2D,0xEF,0xDF,0x9E,0x35,0x69, ++0x05,0x57,0x62,0x2B,0x64,0x4A,0x23,0xC4, ++0x2F,0xAF,0x1B,0xB9,0x10,0x36,0x14,0xA2, ++0x29,0x38,0xE6,0x6C,0x1D,0x93,0x97,0xE7, ++0x05,0xEA,0xBC,0x84,0x3E,0x33,0x11,0xF3, ++0x2C,0x28,0x56,0x10,0x64,0x06,0x09,0x44, ++0x05,0xC9,0x29,0xB7,0x15,0xB0,0x97,0xD2, ++0x2C,0x8A,0xD4,0xE3,0x63,0x40,0xB3,0xAE, ++0x05,0xE3,0x86,0x83,0xD1,0xCE,0xA1,0xBE, ++0x2C,0x25,0x70,0x82,0x31,0x67,0x72,0x81, ++0x05,0xBC,0x44,0xFD,0xBF,0x1A,0xBC,0x26, ++0x2C,0x68,0x88,0x8F,0xDB,0xAE,0xF3,0xA4, ++0x05,0x31,0x20,0xF3,0x9A,0x08,0x16,0x96, ++0x2C,0xF4,0x7C,0xF2,0xF6,0xB2,0xAB,0xA3, ++0x05,0x1D,0xF8,0x32,0x13,0xF2,0xF2,0xBF, ++0x24,0xEE,0x67,0xEB,0xFF,0x9A,0x2D,0x76, ++0x05,0x20,0xB2,0x8A,0xE8,0x43,0x18,0x95, ++0x2F,0x3B,0x24,0xC3,0x10,0xB4,0x36,0x1C, ++0x25,0xE4,0xC4,0x15,0xFA,0x0F,0x0F,0x78, ++0x05,0x38,0x26,0x57,0x52,0xAF,0xD6,0xEE, ++0x24,0x5B,0x5E,0xC1,0xB3,0x2C,0x2F,0x76, ++0x05,0xEA,0x00,0x49,0xE7,0x46,0x05,0xAC, ++0x2F,0xBD,0x30,0x0D,0xB2,0x01,0x83,0x5E, ++0x21,0x94,0xA4,0xBD,0x13,0x18,0x3F,0xC0, ++0x05,0x1B,0x1A,0xE7,0xAB,0x7F,0xC3,0xFC, ++0x2C,0x88,0x2C,0xDF,0x7F,0xEE,0xCB,0x35, ++0x05,0xE7,0x50,0x23,0x65,0x4C,0x0F,0x54, ++0x27,0x1B,0x2A,0x66,0x07,0x17,0x03,0x3F, ++0x27,0xF6,0x0E,0x86,0x49,0xAB,0x49,0xA3, ++0x2A,0x0A,0x7D,0x1C,0x45,0x6E,0xD4,0xE4, ++0x05,0x1B,0x74,0xC9,0x7E,0x31,0xA7,0x0D, ++0x2C,0x8B,0xCD,0xC2,0x2F,0x3C,0x83,0x07, ++0x05,0x7A,0xB6,0x63,0xDB,0x9C,0xDB,0x43, ++0x2C,0x2C,0xE4,0x9B,0x16,0xF4,0x60,0xCE, ++0x05,0x5D,0x30,0x03,0x36,0x17,0x0E,0x09, ++0x2F,0x65,0x10,0xCD,0x8D,0xD9,0xDD,0x57, ++0x2F,0x0C,0x68,0x12,0x88,0x55,0xF0,0xE3, ++0x27,0xC5,0x28,0xF7,0xD8,0x4A,0x67,0x57, ++0x27,0x90,0x5B,0x0C,0x58,0xBE,0x9A,0x96, ++0x2F,0x3A,0x6C,0x51,0x6B,0x3B,0xC8,0xBA, ++0x2F,0x41,0xAB,0x98,0x0E,0x66,0x9D,0xC8, ++0x27,0x67,0x3B,0x7A,0xFD,0xF6,0xA5,0x02, ++0x2F,0xBF,0xB7,0x7E,0xEE,0xD6,0x18,0x5F, ++0x2F,0x3E,0x2A,0x8C,0xEC,0x38,0x54,0xF6, ++0x27,0x6C,0xAE,0x30,0x7E,0xF7,0x41,0x13, ++0x27,0x73,0x87,0x9B,0xD8,0x9F,0x1C,0xF8, ++0x2F,0xDB,0x2F,0xEE,0xDD,0x80,0x84,0xF7, ++0x2F,0x32,0xC1,0x02,0xCC,0xF4,0x96,0x41, ++0x27,0x26,0x88,0xD2,0xA3,0x41,0x29,0x4A, ++0x2F,0xDA,0x87,0xE5,0x99,0x02,0xE2,0x21, ++0x27,0xED,0xBA,0x64,0x4D,0xEF,0xFD,0xE6, ++0x2F,0xD4,0x60,0x17,0xC8,0x04,0xAF,0xCE, ++0x2F,0xF9,0xDB,0x5A,0xEC,0xFB,0x6D,0x73, ++0x2F,0xE5,0x20,0x60,0x25,0x5D,0x0A,0x90, ++0x2F,0xDF,0x7A,0xD8,0x74,0x51,0x63,0x20, ++0x27,0x9D,0x71,0xF5,0x77,0xA7,0xE2,0x6E, ++0x2F,0x28,0x11,0xD7,0x1C,0x7B,0x7E,0xDF, ++0x27,0xA0,0x54,0x05,0x46,0xB0,0x3D,0x01, ++0x27,0x90,0xD0,0x52,0xB5,0x7D,0xF1,0x11, ++0x27,0x9B,0x7C,0x31,0x2F,0xC7,0x45,0x75, ++0x2F,0xFB,0xCD,0x19,0x27,0x36,0xB0,0xFD, ++0x2F,0x9C,0xB2,0x3D,0x03,0x70,0xC5,0x8C, ++0x2F,0xEB,0x5A,0xB4,0xAA,0x2E,0x35,0xBF, ++0x27,0x0C,0x95,0x4D,0x2D,0xA6,0x1D,0x3C, ++0x27,0xC2,0xD4,0x96,0x87,0x93,0xDC,0x23, ++0x2F,0x4B,0x9F,0xEB,0x76,0xDE,0x30,0x5B, ++0x2F,0x41,0xCF,0x94,0x5E,0x42,0xA4,0x17, ++0x27,0xF8,0xF8,0x9F,0x37,0xA4,0x3E,0x4B, ++0x27,0x70,0xDC,0xB0,0x6F,0x82,0x67,0xFB, ++0x2F,0xA1,0x83,0xDB,0xB5,0x58,0x74,0x59, ++0x2F,0xA8,0x58,0xF7,0x19,0xCA,0x3B,0x48, ++0x2F,0x45,0x4E,0x36,0x74,0x58,0x8A,0x24, ++0x27,0x1F,0x50,0x3B,0xD1,0xBC,0x78,0xA4, ++0x2F,0xDB,0xFC,0x10,0x68,0x60,0x8B,0xA1, ++0x2F,0x63,0xB7,0xE7,0x72,0xED,0x3A,0xE0, ++0x27,0x6A,0x9E,0x2E,0x85,0x82,0x8F,0x31, ++0x27,0x6B,0x68,0x70,0x37,0xEA,0xD6,0xFA, ++0x27,0x2C,0x7F,0x43,0x4C,0x7C,0x8F,0x15, ++0x27,0xB6,0x35,0x88,0xB2,0x37,0xDF,0x38, ++0x27,0x85,0x44,0xA7,0x21,0xBC,0xE6,0x48, ++0x27,0x17,0x1D,0xD8,0xBE,0x7A,0x2D,0xE6, ++0x27,0x29,0x30,0x91,0x52,0x5B,0xBF,0x3D, ++0x2F,0xB0,0x8E,0xC4,0xE5,0xA5,0xA6,0x58, ++0x27,0xB3,0x55,0x7F,0x22,0xE2,0xEB,0xC8, ++0x27,0x7C,0xD6,0x09,0x3D,0x3F,0xED,0x55, ++0x2F,0x06,0xA9,0x47,0x47,0x9B,0xF7,0x86, ++0x2F,0x29,0x14,0xAB,0x3D,0x85,0x44,0x96, ++0x27,0x95,0x45,0x65,0x1B,0xAA,0xA9,0x8B, ++0x2F,0x2C,0x2C,0xF9,0xC6,0xFB,0xDB,0x97, ++0x27,0xB4,0x0E,0x69,0xDB,0xE7,0x43,0x22, ++0x27,0xF7,0x92,0x23,0x72,0x58,0xF1,0x53, ++0x27,0xD3,0x07,0xB0,0x2A,0xCD,0x94,0xA5, ++0x2F,0x05,0xE7,0xFA,0xC3,0xCC,0xC1,0x8B, ++0x2F,0x27,0x4B,0x0B,0xD2,0xAF,0x27,0x78, ++0x27,0x1B,0x7A,0x0C,0xED,0x82,0xB6,0xE0, ++0x2F,0x26,0xC1,0x71,0xA4,0xB4,0xE4,0x15, ++0x27,0x04,0xE1,0x94,0xBF,0xDA,0xB9,0xCF, ++0x27,0xF2,0x34,0x48,0x65,0x1D,0x67,0x5C, ++0x27,0x53,0x51,0xBF,0xFD,0x64,0x91,0xE8, ++0x27,0xB8,0x90,0xB6,0xCC,0xA1,0x50,0x9D, ++0x27,0x1B,0xEE,0xCA,0x15,0x33,0x36,0x6D, ++0x27,0x21,0x42,0xBB,0xAC,0x74,0x2C,0x82, ++0x27,0xAF,0xC2,0xBB,0x5B,0xE3,0x08,0xC4, ++0x27,0x5F,0xC5,0x1D,0x63,0xDC,0xF4,0x71, ++0x2F,0x70,0x43,0x4D,0x1E,0x6F,0xBA,0x87, ++0x2F,0x6E,0x07,0x53,0xAF,0xFF,0x72,0x0F, ++0x27,0x37,0x88,0x55,0x0F,0x90,0xD6,0xCA, ++0x2F,0xFE,0xF6,0xC6,0x5E,0xD5,0x99,0xC2, ++0x2F,0x48,0x03,0x89,0xBF,0xE3,0xE9,0x3D, ++0x2F,0xD0,0x29,0x0E,0x98,0xCB,0x9E,0x6C, ++0x2F,0x8A,0xBE,0x61,0x43,0x90,0x3A,0xB3, ++0x27,0x10,0x72,0xBD,0xA5,0xD9,0x52,0xDD, ++0x2F,0xF5,0x02,0x29,0x1A,0x3E,0x44,0x46, ++0x2F,0x64,0x6B,0xA4,0x87,0xED,0x76,0xBF, ++0x27,0x32,0xB0,0xC0,0xFD,0xE7,0x51,0xD9, ++0x27,0x64,0x46,0x90,0x4C,0xF2,0xAE,0x0A, ++0x27,0xE2,0x12,0x21,0x0D,0x5A,0xDD,0x86, ++0x27,0x9E,0x3B,0x96,0xF9,0xC9,0xCC,0xBC, ++0x27,0xFF,0x93,0x7C,0x2A,0x18,0xAB,0xAE, ++0x27,0xD2,0xA5,0x9E,0x97,0x0B,0xC6,0x8F, ++0x27,0xFB,0x44,0xF1,0x18,0x19,0x6B,0xD9, ++0x2F,0xC9,0xB0,0x3A,0x5E,0xE5,0xAB,0x8B, ++0x27,0x50,0x47,0x73,0xD2,0xE8,0x4E,0xD1, ++0x27,0x59,0xE9,0x8A,0xF0,0xAE,0x40,0xA8, ++0x2F,0xC0,0x6C,0x9A,0x0B,0x0C,0x40,0x68, ++0x27,0xB3,0x32,0x2D,0x0C,0x02,0x62,0x43, ++0x27,0x27,0x22,0x08,0x96,0x8A,0x72,0x19, ++0x27,0x91,0xA9,0x39,0x8E,0x2D,0x4E,0x61, ++0x2F,0xCD,0x85,0x01,0x22,0x5B,0x48,0x00, ++0x27,0xF8,0x4B,0x4F,0x3A,0xD5,0x08,0x09, ++0x27,0x85,0x83,0x53,0x21,0xB5,0x46,0xCF, ++0x2F,0xF7,0x4C,0xC7,0x73,0x41,0xDF,0x33, ++0x27,0x87,0x3B,0x21,0x76,0xA0,0x09,0x85, ++0x27,0x7F,0xD4,0xCB,0xA7,0x34,0xFD,0xF8, ++0x2F,0x0D,0x3A,0x59,0xB1,0xAF,0xA2,0x4E, ++0x27,0xAF,0x8F,0xE1,0xC6,0x64,0xCB,0x55, ++0x27,0x60,0x05,0x04,0xBB,0xAC,0x0D,0xAD, ++0x27,0xEA,0x05,0x76,0xC9,0x3B,0xD8,0x9C, ++0x27,0xF9,0x88,0x23,0x54,0x32,0x54,0x31, ++0x2F,0x94,0xE8,0xA9,0x69,0x06,0x83,0x7C, ++0x2F,0xC7,0x5C,0xAD,0xD8,0x8E,0x36,0xE3, ++0x27,0xF1,0x73,0x1C,0x3F,0x60,0x85,0x39, ++0x2F,0xFB,0x52,0xB5,0xFC,0xBC,0x34,0xA7, ++0x27,0x5F,0xDC,0x64,0x1A,0x8C,0xB8,0x33, ++0x27,0xF2,0x62,0x65,0x41,0xBB,0x1D,0x63, ++0x27,0x92,0x48,0x82,0x63,0xF8,0x54,0xE1, ++0x2F,0x29,0x16,0x18,0xF7,0x3B,0x7D,0x49, ++0x2F,0x68,0xD9,0x9B,0x3D,0x94,0xFC,0xA2, ++0x27,0xD5,0x46,0xDB,0x5B,0xAA,0x0B,0xC1, ++0x2F,0x6A,0x2A,0xF3,0xE9,0x15,0x59,0x4D, ++0x2F,0xC2,0xE7,0x42,0x01,0xE9,0x8E,0x7B, ++0x27,0x1C,0xDA,0x3F,0x17,0x22,0xC5,0x52, ++0x27,0xBF,0x51,0xA8,0xCE,0x7E,0xD7,0xBC, ++0x27,0x4B,0x17,0xFB,0x3E,0x7B,0x39,0x00, ++0x27,0x83,0xED,0xD1,0x40,0x8F,0x70,0xA3, ++0x27,0xEF,0xAF,0xB9,0x7F,0xDB,0x0F,0x7A, ++0x2F,0x25,0x2F,0x05,0x66,0xAE,0x2D,0x06, ++0x27,0x11,0xEE,0xC4,0x3E,0xD4,0x52,0x73, ++0x2F,0xE5,0xC9,0x0E,0xF2,0x72,0xD6,0xFE, ++0x2F,0x47,0x48,0x18,0x15,0x49,0x2D,0xC3, ++0x27,0xD7,0xF5,0x6E,0xA6,0x5F,0x5E,0xD9, ++0x2F,0x29,0x96,0x2A,0x30,0x27,0xE6,0x42, ++0x2F,0x22,0x8E,0xAD,0x79,0x66,0x87,0x96, ++0x2F,0xF2,0x99,0xEA,0x6B,0x01,0x99,0x8E, ++0x2F,0xAB,0xBC,0x18,0xE3,0x20,0xBD,0xC6, ++0x27,0xBB,0x24,0x79,0x72,0x20,0xA1,0xF6, ++0x2F,0xFE,0x07,0xF4,0x26,0x36,0x89,0x5F, ++0x2F,0x81,0x5A,0xB8,0xE8,0x27,0x54,0xDF, ++0x2F,0xDE,0x90,0xAF,0xCC,0xBE,0x3F,0x5B, ++0x2F,0x43,0x7F,0x3B,0x27,0x04,0x5C,0xD1, ++0x2F,0xE2,0x0F,0xA9,0x80,0xB9,0x68,0xC5, ++0x27,0xF4,0x77,0x69,0x74,0x68,0x35,0x36, ++0x2F,0x6B,0x30,0x2E,0xDD,0x1D,0xC7,0x1E, ++0x27,0xD9,0x82,0x48,0x32,0xB7,0xE3,0x5D, ++0x2F,0xD6,0xF8,0xA2,0x8C,0xC5,0x07,0x8F, ++0x2F,0x5B,0xB2,0xB2,0xAC,0x29,0x98,0x21, ++0x2F,0x8F,0x8C,0x75,0xEB,0x4B,0x88,0xE6, ++0x2F,0x28,0x61,0x8F,0x69,0x49,0xB5,0xCA, ++0x2F,0xCF,0xA0,0x81,0xFB,0xBB,0x46,0x7F, ++0x27,0x55,0x09,0x20,0x20,0x95,0x87,0x8B, ++0x27,0xE7,0x4F,0x59,0x55,0x6E,0xD3,0x98, ++0x2F,0x35,0x4B,0x2D,0x77,0xE3,0xFF,0xA0, ++0x27,0x5B,0x3E,0x3D,0xF5,0x24,0x33,0x56, ++0x27,0xF1,0xBF,0xDC,0x50,0x06,0x98,0x8C, ++0x2F,0x02,0x44,0x8A,0x82,0x53,0x09,0x80, ++0x2F,0xA7,0xEA,0x80,0x4D,0x2D,0x8F,0xE5, ++0x2F,0xD0,0x7A,0xCA,0xE6,0xAD,0xF0,0x7A, ++0x2F,0x96,0xBE,0xD8,0xF8,0x6E,0x77,0x59, ++0x2F,0x60,0xFD,0x93,0x86,0x36,0xD0,0x09, ++0x27,0x4C,0xFC,0xF6,0x96,0xC5,0xA4,0x2B, ++0x2F,0xDC,0x16,0xBE,0x99,0x7B,0xB2,0xAA, ++0x2F,0xC4,0x6D,0xD8,0x5F,0xC8,0xC7,0x98, ++0x2F,0x11,0x1F,0x0E,0x83,0x55,0x48,0x7D, ++0x27,0x43,0x9D,0xB6,0x86,0x33,0xBC,0xC9, ++0x2F,0x02,0xFF,0x83,0x0F,0xC3,0xE5,0xD3, ++0x27,0x29,0x2E,0xE3,0xCD,0xB5,0xD5,0xDC, ++0x2F,0xF9,0x02,0xE6,0xE6,0xEF,0x25,0x3E, ++0x27,0x57,0xDF,0xD7,0xE6,0x33,0xC5,0x7A, ++0x2F,0xB3,0x08,0x1C,0x71,0x55,0xA4,0xB7, ++0x2F,0xBB,0xC7,0x62,0x6D,0x6C,0x22,0x43, ++0x27,0xD5,0xD6,0xF5,0x72,0x87,0x59,0x2B, ++0x27,0xB9,0xD9,0x0D,0x75,0x60,0x56,0x65, ++0x27,0x49,0x1B,0x3A,0x5B,0xE3,0x9A,0x2A, ++0x27,0x87,0xDA,0xC8,0xB7,0x09,0x1F,0xCD, ++0x2F,0x18,0x67,0x96,0x32,0xCC,0x50,0x24, ++0x27,0x00,0x6B,0x09,0x31,0x52,0x7F,0xB1, ++0x2F,0x87,0x39,0x40,0xA1,0x5E,0xB7,0xE1, ++0x27,0xD3,0x6C,0x79,0xCC,0x17,0xC5,0x92, ++0x27,0xAE,0xE2,0xC7,0xAA,0xAF,0x45,0x81, ++0x2F,0xEA,0x4E,0xA6,0x4A,0x3B,0xC3,0x30, ++0x2F,0x07,0x44,0x02,0xFB,0xD4,0x84,0xA7, ++0x27,0xA4,0x47,0xC8,0x5C,0x71,0x7E,0x03, ++0x27,0xA6,0x46,0x52,0xA2,0x1C,0xC1,0x6A, ++0x2F,0x76,0xB2,0xC6,0x8E,0xA5,0x5E,0xEE, ++0x2F,0x22,0x87,0x42,0x3D,0x8B,0x75,0x5F, ++0x2F,0x82,0x23,0x4C,0xC2,0x2E,0x4A,0x53, ++0x27,0xB8,0x31,0x37,0x88,0x5D,0xFD,0xFF, ++0x27,0x00,0x19,0x13,0x34,0x78,0xFD,0xD5, ++0x2F,0xCE,0xD5,0xB1,0x21,0x15,0xE0,0xC4, ++0x2F,0xB6,0x80,0x3A,0x99,0x00,0x7E,0x73, ++0x27,0xC1,0x15,0x90,0x40,0xDA,0xB6,0x28, ++0x2F,0x1C,0x1B,0x6A,0x64,0x0B,0x14,0x39, ++0x2F,0xC6,0x86,0x8D,0x1E,0xBA,0x2E,0x1E, ++0x2F,0xFC,0xC2,0x4C,0x8D,0x34,0x18,0x84, ++0x27,0xEF,0xC4,0xF3,0xDE,0x04,0x51,0xD1, ++0x27,0x56,0xAA,0x3A,0xB5,0x13,0x6C,0x0F, ++0x27,0x01,0x04,0xA6,0xF3,0x29,0xF6,0x66, ++0x2F,0x7F,0x20,0xEE,0x87,0xAB,0x72,0x93, ++0x2F,0x3C,0xD1,0x9E,0x36,0x89,0xCC,0xAD, ++0x2F,0x84,0x31,0xEB,0x29,0x48,0x32,0x35, ++0x27,0xC8,0x02,0x2E,0xE6,0x67,0xD2,0x60, ++0x2F,0x0C,0x50,0x05,0x25,0x3F,0x19,0x65, ++0x27,0xF6,0xEE,0x88,0x9F,0xCF,0x32,0x9B, ++0x2F,0xE1,0x80,0x8D,0xB4,0xF3,0x83,0x6C, ++0x27,0x5F,0x7E,0xBF,0x7B,0x15,0x97,0xD8, ++0x27,0xFD,0x24,0xB0,0xC4,0xDE,0x16,0xBF, ++0x2F,0x78,0x2E,0x9C,0x9A,0xC3,0xF5,0x18, ++0x27,0x99,0x52,0x62,0x0C,0x7B,0x8D,0x37, ++0x2F,0x6B,0x7C,0x7F,0x5C,0x95,0x30,0x44, ++0x2F,0xAC,0xF8,0xBE,0xB3,0x6D,0x86,0x49, ++0x27,0x37,0x27,0xED,0xB1,0x90,0xD1,0x99, ++0x2F,0xFD,0xC5,0xB6,0xC7,0x7A,0x7C,0x54, ++0x27,0xD9,0xAB,0x8D,0x01,0xE7,0xD0,0x3F, ++0x27,0x1D,0x86,0x1E,0x11,0x09,0xEF,0x28, ++0x27,0x9F,0x63,0x69,0x6E,0xF0,0x5E,0x2B, ++0x2F,0xE3,0x93,0x6A,0xF3,0x25,0x6B,0xDC, ++0x2F,0x4F,0xE2,0x80,0xE7,0xB6,0x43,0x5D, ++0x27,0x00,0x86,0x12,0x17,0x66,0x5D,0x19, ++0x2F,0xAE,0xD5,0x79,0xC0,0x0A,0xB0,0xC5, ++0x27,0x0F,0x0D,0x3C,0x3D,0x49,0x9D,0xDD, ++0x2F,0x55,0x19,0x8A,0x50,0x9B,0x22,0x1B, ++0x2F,0x26,0xE8,0xFA,0xDE,0x56,0x39,0x98, ++0x27,0x70,0xAB,0x61,0x60,0xA4,0x9C,0x01, ++0x2F,0x2B,0x11,0x62,0x10,0xE9,0xEC,0x37, ++0x2F,0x4E,0x84,0x47,0x7D,0x0D,0x41,0x69, ++0x2F,0xF0,0x89,0x8F,0x01,0x46,0xBD,0x2D, ++0x2F,0x68,0xD0,0xA7,0x11,0x67,0x9B,0xB2, ++0x27,0x43,0xC7,0x2C,0xB2,0x11,0x50,0x6D, ++0x2F,0x3F,0x7B,0x81,0xA1,0xF3,0xEA,0x57, ++0x2F,0xF2,0x18,0xF2,0x0B,0x88,0x8A,0x14, ++0x2F,0x42,0x61,0xC6,0xDC,0x42,0x38,0x1D, ++0x2F,0xA8,0x51,0x25,0x14,0xF3,0x34,0x65, ++0x2F,0x1C,0x0C,0xE4,0x92,0x2F,0x23,0x9A, ++0x27,0x43,0x8E,0xBD,0xDA,0x0A,0xB4,0x06, ++0x2F,0xAF,0xC7,0x39,0x9E,0x41,0xD2,0x38, ++0x2F,0x30,0xA1,0x61,0xA5,0xAC,0xDC,0x0F, ++0x2F,0xCB,0xDB,0x55,0x31,0xAD,0xE0,0xAB, ++0x27,0x82,0x2C,0x7F,0x5E,0x4B,0x2E,0xB5, ++0x2F,0x8E,0xD3,0x65,0x63,0x14,0x8D,0x83, ++0x27,0x1B,0x59,0x08,0x1E,0xBE,0x74,0xA2, ++0x2F,0x16,0x24,0x28,0x4F,0x6B,0x4C,0x68, ++0x27,0x7A,0xFB,0x7E,0xE2,0x66,0x9B,0x26, ++0x27,0x22,0x27,0x25,0xA0,0x06,0x2C,0x0F, ++0x27,0x21,0xFC,0xED,0x20,0xC6,0x95,0xE1, ++0x27,0x5B,0x38,0x17,0x21,0x1F,0x64,0x3F, ++0x2F,0x35,0xE6,0x01,0xA9,0x7C,0x83,0x9E, ++0x2F,0xBF,0xF6,0x62,0xEC,0xB1,0xE1,0x9B, ++0x27,0x56,0x7E,0xF8,0x1C,0xF6,0xCD,0x51, ++0x27,0xDA,0x0C,0xFE,0x6A,0x8E,0xAF,0xB5, ++0x2F,0x76,0xAE,0x67,0x18,0x40,0xAF,0xAA, ++0x27,0xF3,0xAE,0xFF,0x4B,0x9B,0x16,0xDC, ++0x2F,0x6A,0x3D,0x75,0x25,0x12,0x8A,0x08, ++0x2F,0x6D,0x9D,0xCD,0x34,0x85,0x2C,0x6F, ++0x27,0x7C,0x10,0x02,0x63,0xD0,0xF6,0x1A, ++0x27,0xAC,0x42,0xC2,0x44,0x05,0xB1,0xE5, ++0x2F,0xC8,0xFF,0x44,0xE9,0x3F,0xE6,0x29, ++0x27,0x0C,0xE0,0x32,0x28,0xC9,0x54,0x8C, ++0x2F,0xB3,0xF5,0x8C,0x27,0x19,0xAF,0x65, ++0x2F,0x3A,0xD2,0x3E,0x22,0x33,0x1D,0x0B, ++0x27,0xD1,0x64,0x74,0xE1,0xD5,0xF3,0x88, ++0x27,0xBD,0x15,0xDE,0xE9,0xC3,0x14,0xAB, ++0x27,0xAA,0xB5,0xEF,0xE3,0x37,0xFD,0xE5, ++0x2F,0xDB,0x09,0xF8,0x4F,0x2E,0x30,0xB4, ++0x27,0x90,0x8E,0x40,0xC1,0xB5,0x4D,0x65, ++0x2F,0xA9,0x41,0x15,0x18,0xE5,0xD0,0xB7, ++0x27,0x36,0x11,0xD8,0x9C,0x84,0x5B,0x69, ++0x2F,0x3F,0x1E,0x2F,0xB1,0xFC,0x8C,0x07, ++0x2F,0x51,0xA9,0x92,0x9E,0xC9,0xA1,0x61, ++0x2F,0x4C,0xED,0xE0,0x62,0x6A,0x58,0xBA, ++0x2F,0x21,0x2E,0x5C,0xD8,0xAD,0xFC,0x4B, ++0x27,0x26,0x4D,0xB9,0x8A,0xC4,0xFD,0xA7, ++0x27,0x7B,0x51,0x77,0xB7,0x23,0x4E,0xE1, ++0x2F,0xD8,0x7A,0x9A,0x50,0x28,0xCC,0xC6, ++0x27,0x1A,0x0B,0xBC,0x18,0x37,0xC7,0xBE, ++0x27,0xC2,0x83,0xAA,0xDF,0x79,0xA7,0x5E, ++0x27,0xDA,0x6D,0xD4,0x8B,0xAA,0xF7,0xBE, ++0x2F,0xAF,0x27,0xEB,0x2C,0x25,0xE0,0xA6, ++0x27,0x62,0xC1,0x0F,0x6E,0xFF,0xA0,0x7A, ++0x27,0x72,0xCD,0x65,0xF3,0x6D,0x80,0x9C, ++0x27,0x4F,0x77,0xF5,0x4F,0xCF,0xEE,0x12, ++0x27,0x35,0xA0,0xE5,0xF8,0x21,0x15,0x53, ++0x2F,0x12,0x5B,0x45,0x13,0x55,0x2D,0xAB, ++0x2F,0xE0,0xE7,0xB1,0x21,0x85,0x4E,0xAA, ++0x2F,0xEB,0x6A,0x09,0xB5,0xED,0xAE,0xC1, ++0x2F,0x54,0x98,0xEF,0x44,0xED,0x0F,0xA6, ++0x2F,0x4C,0x6D,0x58,0x06,0x3F,0x3D,0xF3, ++0x27,0xF3,0x57,0x67,0x5B,0x89,0x41,0x44, ++0x2F,0xBE,0x84,0x2A,0x5A,0xAB,0x31,0xA2, ++0x2F,0x5E,0xE6,0x0D,0x03,0xDB,0x74,0xFC, ++0x27,0xDA,0x1C,0x4F,0x52,0x84,0x87,0xD6, ++0x2F,0x00,0xB5,0xB9,0x9C,0x44,0xB5,0xB9, ++0x2F,0xCD,0x34,0x41,0x25,0x85,0xA4,0x2F, ++0x27,0x00,0x20,0x72,0xB2,0x94,0xE5,0xB1, ++0x27,0xC3,0x04,0x82,0x9C,0x47,0x0C,0x02, ++0x27,0xCA,0x9E,0xDF,0x9D,0x3B,0x9D,0x97, ++0x2F,0x01,0x60,0xF6,0x11,0x2C,0xE3,0x8E, ++0x2F,0x14,0xE4,0x52,0xA4,0x26,0x81,0xA7, ++0x2F,0x70,0x30,0x9E,0x2F,0xDC,0xAA,0xEC, ++0x27,0x79,0xC0,0x86,0xB0,0x15,0xF3,0x94, ++0x2F,0x14,0xC7,0x59,0x4D,0x2B,0xD7,0xCF, ++0x2F,0x77,0x50,0x71,0x88,0xF6,0x03,0xAD, ++0x27,0x56,0x52,0x66,0x67,0x5C,0x08,0xB2, ++0x27,0x4C,0xB1,0x49,0x3F,0xC1,0xFF,0x9C, ++0x27,0x6E,0xAB,0xF8,0x72,0xD6,0x14,0x08, ++0x2F,0xED,0xD2,0x84,0x84,0x9A,0x73,0x9B, ++0x27,0x98,0x86,0x52,0xF1,0x33,0x2C,0xC8, ++0x2F,0x07,0x14,0xB5,0x17,0x48,0x90,0xB8, ++0x27,0x59,0x98,0x9D,0x8D,0x8A,0x62,0x40, ++0x27,0xDD,0xC1,0x4E,0x41,0x9C,0xE4,0x8B, ++0x2F,0xAC,0x4D,0x24,0x9C,0xCF,0x6A,0xF4, ++0x2F,0x03,0x0D,0x81,0x6E,0x7F,0x4D,0xFF, ++0x27,0xFF,0x40,0x0C,0xF7,0x82,0x33,0xB0, ++0x27,0x1B,0x8D,0xB7,0xCC,0xF7,0x76,0xE6, ++0x27,0xCD,0x54,0xEF,0x7C,0xDF,0x4D,0x3F, ++0x2F,0xE5,0x53,0xA3,0x04,0xF3,0x13,0x86, ++0x2F,0xCC,0xF6,0x8B,0xA3,0x8F,0x7A,0x4D, ++0x27,0x27,0xBA,0xB3,0x7E,0xD9,0x58,0x26, ++0x27,0x22,0x30,0x8A,0x97,0xAC,0x62,0x9C, ++0x27,0x77,0x7F,0xD3,0xDC,0x8C,0xB1,0x8F, ++0x27,0x69,0xE7,0xD8,0xAD,0xE4,0x71,0xB0, ++0x27,0xA6,0x8F,0x68,0xAB,0xBF,0xC8,0xED, ++0x2F,0xC6,0xDC,0x05,0xB1,0xC0,0x56,0x40, ++0x2F,0x32,0x5E,0x76,0x59,0x01,0xDE,0xFA, ++0x2F,0x96,0xD7,0x48,0xA2,0x39,0xB2,0xA2, ++0x2F,0xE1,0xA2,0x27,0x97,0xC3,0xB9,0x4C, ++0x2F,0x36,0x42,0x51,0xA4,0xF3,0xAF,0xC2, ++0x27,0x27,0x5B,0x5C,0xA4,0xAB,0xEE,0x23, ++0x27,0x6F,0xAB,0x76,0xFF,0x32,0x1D,0x1D, ++0x2F,0x61,0xF2,0x31,0xE7,0xAF,0x2D,0x28, ++0x27,0x5E,0xF6,0x2E,0x07,0xDE,0x7D,0xE1, ++0x27,0x63,0xE3,0x5B,0x91,0xF2,0x3A,0x5D, ++0x2F,0x25,0xA5,0xA9,0xAF,0x90,0x4D,0xC9, ++0x2F,0x08,0xD5,0x96,0xB8,0x31,0x87,0x01, ++0x2F,0xDD,0x90,0x5C,0x99,0x75,0x34,0x7A, ++0x2F,0x4D,0x82,0x22,0x1C,0x28,0x7D,0x71, ++0x2F,0xA2,0xF2,0x56,0xD8,0xB7,0xAC,0x93, ++0x2F,0x1E,0xAA,0x27,0xDA,0x47,0x78,0xA7, ++0x2F,0xE0,0x46,0x14,0x79,0xE4,0xE2,0x15, ++0x2F,0xC2,0xD0,0xE1,0xEE,0x1A,0xD7,0x8C, ++0x27,0x6B,0xDC,0x37,0xCA,0xD1,0xFE,0xF5, ++0x27,0x10,0x37,0x8F,0xC4,0x50,0x08,0xF7, ++0x27,0x16,0x52,0x3A,0xD2,0xB7,0x15,0xF0, ++0x27,0x32,0xA1,0xC7,0xB5,0x4B,0xE0,0x59, ++0x2F,0xB3,0xA2,0x98,0xCE,0x32,0x52,0x19, ++0x2F,0x9D,0x32,0x0D,0xFA,0x0D,0xCB,0xA1, ++0x27,0x6D,0xA4,0x96,0xAC,0x7E,0x79,0xF4, ++0x2F,0xCD,0x5D,0x82,0x45,0xD3,0xE2,0xB4, ++0x27,0xA0,0x8D,0x7B,0xA7,0xC8,0x3D,0x8D, ++0x27,0x23,0x32,0x30,0xC5,0x53,0x61,0xE2, ++0x2F,0xD8,0xF5,0xFE,0x22,0xD9,0xBE,0xA6, ++0x27,0xF3,0xD2,0xAA,0x31,0x14,0x0B,0x28, ++0x2F,0xF6,0x6D,0xD5,0xBA,0xE6,0x1A,0x5F, ++0x2F,0x74,0xA5,0x53,0x26,0x4D,0x7B,0xF6, ++0x27,0x39,0xC9,0xBB,0x85,0x98,0x1B,0xEA, ++0x27,0x29,0xA7,0x91,0x62,0xC4,0x02,0x18, ++0x27,0xCD,0x84,0x91,0xC4,0xC0,0x64,0x14, ++0x2F,0xDF,0x11,0x8C,0xCF,0xD3,0x63,0x6C, ++0x27,0x4A,0x86,0xE2,0xB5,0xD0,0x09,0xF1, ++0x27,0x88,0xFC,0x58,0x07,0x00,0x37,0x3D, ++0x2F,0x54,0xAA,0xED,0x73,0x5B,0x0B,0xBA, ++0x2F,0x48,0x97,0x68,0xC2,0x97,0xA4,0x69, ++0x2F,0xA1,0xE1,0xC2,0x0D,0x35,0x80,0xA8, ++0x27,0x89,0xC3,0xBD,0x8D,0x93,0x69,0x05, ++0x2F,0xF1,0x89,0x5E,0x19,0xB0,0xF7,0xFD, ++0x2F,0x9D,0x6D,0xBA,0xB6,0x0B,0x8D,0x59, ++0x27,0x78,0x80,0x55,0x1C,0xA3,0x16,0x2C, ++0x2F,0x7F,0x8B,0x0D,0x0A,0x4D,0x7C,0x86, ++0x27,0x9F,0x67,0x15,0x1C,0xAB,0x5B,0x58, ++0x2F,0x4B,0x26,0x58,0x7C,0xEE,0xF2,0x1C, ++0x27,0x93,0x3E,0xB9,0xFE,0x74,0xE1,0x12, ++0x27,0x21,0x1F,0x62,0x74,0x57,0x25,0x85, ++0x2F,0x77,0x8D,0x47,0x18,0x11,0xB4,0x65, ++0x27,0xDA,0xED,0x99,0x8A,0x5E,0xF3,0x95, ++0x27,0x09,0x03,0xE2,0x9A,0xF3,0x5F,0xE6, ++0x27,0x32,0xA3,0xB2,0xFB,0x5D,0x8F,0xA2, ++0x27,0xB2,0xB1,0x29,0xFE,0x32,0x3D,0x53, ++0x27,0x10,0xA8,0xB2,0x6A,0xED,0xC6,0xB7, ++0x2F,0xBA,0x14,0x8E,0x56,0x46,0xE5,0xA2, ++0x2F,0x91,0x4A,0xD9,0xD8,0xD1,0xEB,0x01, ++0x2F,0x95,0x8D,0x7D,0xDE,0xAC,0xD4,0x34, ++0x2F,0x09,0x3B,0xB1,0x4D,0xF0,0x93,0xA7, ++0x27,0xC4,0x95,0x54,0xF8,0xB6,0x4F,0xAB, ++0x27,0x7C,0xE2,0x27,0x33,0xB2,0x6B,0x7E, ++0x27,0x40,0x96,0x47,0x2C,0xDB,0xB3,0xBB, ++0x27,0x69,0xB0,0x44,0xD1,0x85,0x10,0x05, ++0x27,0x0A,0xF4,0x3E,0x0B,0x45,0xE6,0xBA, ++0x27,0xFD,0xA8,0x9A,0x00,0x02,0xED,0x46, ++0x27,0x4C,0xBB,0x7D,0x08,0x2F,0x28,0x5E, ++0x2F,0x2D,0x39,0xAA,0x6C,0x49,0x76,0x40, ++0x27,0xA4,0x3A,0x2B,0xEC,0x17,0x6E,0x0D, ++0x2F,0xB0,0xE3,0xDF,0x5B,0x49,0xE5,0x0B, ++0x2F,0x0F,0x1F,0x17,0x4E,0x1A,0xC1,0xD5, ++0x2F,0x8E,0x19,0x62,0xAF,0xC7,0xB2,0xB0, ++0x2F,0xA4,0x5E,0x37,0xAC,0x58,0xBD,0xA7, ++0x2F,0xDB,0x67,0x0E,0xAB,0xAB,0x27,0x83, ++0x2F,0x09,0xCE,0xF9,0x58,0x7A,0xCD,0x1C, ++0x27,0xE6,0xFA,0x28,0xE4,0x4D,0x21,0xBA, ++0x27,0xF7,0x6B,0x4A,0x20,0xDF,0xC4,0xA9, ++0x27,0x8A,0xF6,0x00,0x96,0x84,0x66,0x60, ++0x27,0x2B,0x75,0xB7,0x19,0xBA,0x17,0x00, ++0x2F,0xA7,0x02,0x99,0xB7,0xE3,0x57,0xAA, ++0x27,0xED,0x4F,0x43,0xF2,0x0B,0xC4,0xC9, ++0x27,0x49,0xC1,0xE9,0x2E,0x1D,0x07,0x10, ++0x2F,0x8F,0xFA,0x64,0x87,0x02,0xDB,0x74, ++0x2F,0x5D,0x6D,0x92,0x10,0xA6,0x87,0x64, ++0x2F,0xFD,0x36,0x25,0xC4,0xD6,0xE5,0x57, ++0x2F,0x27,0x2C,0x18,0x75,0xAF,0x76,0x2A, ++0x2F,0x9B,0x34,0xB9,0xB2,0x77,0x4D,0xD6, ++0x27,0x4D,0x09,0xC3,0xFD,0x1A,0xEB,0xF0, ++0x27,0xBC,0xF6,0x05,0xC6,0x34,0x37,0x6A, ++0x2F,0x83,0x66,0x8B,0x2B,0x9D,0x57,0x71, ++0x2F,0x2C,0xC0,0x89,0x45,0xB5,0xCD,0x4B, ++0x27,0x46,0xDC,0x28,0x47,0x89,0x2B,0x3E, ++0x27,0xA2,0xBB,0xAF,0xA7,0x1A,0xED,0x4D, ++0x2F,0x3A,0xB2,0xFC,0x1B,0xDC,0x6D,0x17, ++0x27,0x2A,0xAC,0x61,0x03,0x83,0x87,0x84, ++0x27,0x3D,0x12,0xA9,0xDD,0x18,0x6B,0x65, ++0x2F,0x2F,0x61,0x59,0xA1,0x7C,0x1A,0x40, ++0x2F,0xEB,0xEE,0x69,0xB2,0x55,0x77,0x85, ++0x2F,0x6C,0x9C,0x2E,0xBF,0xEA,0xBE,0x58, ++0x27,0x46,0xAC,0x4B,0x77,0xB7,0xDD,0xAA, ++0x2F,0xE9,0x23,0x10,0x76,0xF0,0x33,0x0B, ++0x27,0xCA,0x31,0xDF,0x11,0xCB,0x9A,0xC0, ++0x27,0xCE,0xB1,0xB1,0xEE,0xD3,0xAA,0x1C, ++0x27,0x34,0xC9,0xC7,0xFF,0x79,0x48,0x35, ++0x2F,0x85,0xA7,0x79,0x50,0x83,0x5A,0x40, ++0x27,0x74,0x72,0x9A,0x07,0x3C,0x12,0x80, ++0x27,0xD8,0x02,0x15,0x79,0xFE,0x55,0xCF, ++0x2F,0x97,0x94,0xE7,0x3F,0x0F,0xFA,0xA0, ++0x2F,0x2F,0x44,0xDF,0xC1,0x2C,0x84,0xCB, ++0x27,0x3D,0x54,0x59,0x5D,0x7A,0x05,0x8C, ++0x2F,0x31,0xAA,0xE6,0xE7,0xFB,0xA6,0x93, ++0x27,0xB5,0xAE,0x86,0xB5,0xC0,0xAA,0x10, ++0x27,0x0C,0x61,0xAA,0x25,0x17,0x90,0x3D, ++0x27,0x5F,0x59,0xDD,0x86,0x96,0x82,0x14, ++0x27,0x18,0x71,0xBE,0x78,0x38,0x27,0x6C, ++0x2F,0x64,0x1B,0x50,0x93,0xA9,0x6D,0xE7, ++0x2F,0x53,0xC1,0x70,0xD2,0x25,0xFB,0x8B, ++0x2F,0x1E,0xF5,0x5B,0x4E,0xF7,0x8F,0xC7, ++0x27,0x00,0x83,0x07,0x05,0xCE,0x43,0xFF, ++0x27,0x2F,0x5B,0x19,0xC9,0x44,0xDF,0x5E, ++0x27,0x18,0x84,0x8A,0xED,0xD0,0x7A,0xE3, ++0x2F,0xE7,0x89,0x84,0xA9,0x83,0x39,0x1E, ++0x2F,0xE3,0x29,0xE2,0x11,0xBE,0xBE,0x4C, ++0x2F,0xC4,0x2E,0x81,0xC6,0xAA,0x93,0x37, ++0x2F,0x73,0x3B,0x90,0x82,0xF3,0x7D,0x02, ++0x27,0x9E,0xE0,0x9E,0xB4,0x05,0xC0,0x61, ++0x2F,0x55,0xEE,0xB3,0x9F,0xE3,0x4C,0x60, ++0x27,0x3D,0xC6,0xCF,0x92,0x5B,0xA3,0xD9, ++0x27,0x47,0xA0,0xE9,0xB2,0xFD,0xED,0x5A, ++0x27,0x3D,0xF0,0x14,0x95,0x62,0x13,0x6A, ++0x2F,0x5E,0xDD,0xE7,0xB8,0x25,0xB3,0x78, ++0x27,0x29,0x47,0x48,0x82,0x22,0xE3,0xCD, ++0x2F,0xB8,0x0A,0x08,0x20,0xEF,0xA1,0xDB, ++0x2F,0xE4,0x35,0x52,0xEA,0xD7,0xC7,0x88, ++0x27,0xFC,0xBB,0xE1,0x0F,0x23,0x68,0xAA, ++0x27,0xE6,0xD3,0xF6,0x11,0xBE,0x59,0x90, ++0x2F,0x73,0x06,0xE9,0x2E,0xD4,0x1F,0xA3, ++0x27,0xDF,0x49,0x0B,0x31,0xE7,0x76,0x59, ++0x27,0x8D,0x0A,0xFB,0xB0,0x15,0x84,0x18, ++0x27,0x18,0x5F,0xCD,0x21,0xF4,0xF4,0x58, ++0x27,0x41,0x42,0xD5,0xA3,0x83,0x57,0xB8, ++0x2F,0x91,0xDF,0x32,0x9F,0x8B,0xCC,0xE0, ++0x27,0xE7,0xE6,0x5F,0xA4,0x62,0xB6,0xC4, ++0x27,0xFF,0x40,0x32,0x12,0xFF,0x69,0x5B, ++0x27,0x0B,0x1B,0x0C,0xB4,0x05,0xD5,0x98, ++0x27,0x9B,0xA5,0x7C,0xCC,0x97,0x50,0x17, ++0x2F,0x62,0xA0,0x04,0x7C,0xCF,0x90,0x12, ++0x27,0x26,0x8E,0xC7,0xFF,0x2B,0x4E,0x19, ++0x27,0x76,0x7B,0xCD,0xAE,0x18,0xF6,0xCC, ++0x27,0x2B,0x11,0x32,0xF1,0x9B,0xEA,0xB1, ++0x27,0x1D,0x8A,0x02,0xDE,0x1F,0x79,0x76, ++0x2F,0x65,0x5A,0x94,0xCB,0xED,0x3C,0x0D, ++0x27,0xD6,0xE2,0xFA,0x3D,0x76,0x0F,0xAE, ++0x27,0x6A,0xC5,0x93,0xD2,0x92,0x6A,0xE2, ++0x27,0x93,0x9A,0xF3,0x2B,0xEF,0x50,0xF8, ++0x27,0x02,0xF9,0x9B,0xB6,0xDD,0x21,0xAB, ++0x2F,0xE3,0xCB,0xFA,0x5C,0xC3,0x35,0x28, ++0x27,0x22,0xC1,0x4F,0xDF,0x21,0xF5,0x4E, ++0x27,0xDC,0xD4,0xEC,0xDE,0x37,0xB4,0xDD, ++0x27,0xF2,0x88,0xD5,0x5B,0x7C,0xFA,0x7D, ++0x27,0x2B,0x2C,0x5D,0xFD,0x6C,0x77,0xAD, ++0x2F,0x97,0x4F,0xFA,0xA8,0x6E,0xAD,0x4D, ++0x2F,0x62,0xDF,0x4A,0x76,0xE6,0x96,0x85, ++0x27,0x4B,0xC5,0x0B,0x9E,0x24,0xFA,0x6C, ++0x27,0x06,0xCA,0x8F,0x13,0xD1,0x8F,0x3A, ++0x2F,0x5F,0x8A,0x37,0xD2,0x84,0x32,0x71, ++0x2F,0xB2,0x75,0xF1,0x4B,0x69,0xAC,0x56, ++0x27,0xFB,0xC0,0x16,0x4C,0x7F,0xC4,0x6B, ++0x27,0x53,0x0B,0x18,0x0D,0x5B,0xE9,0x29, ++0x27,0x7A,0xB0,0xE2,0xAB,0xDB,0x37,0x9F, ++0x2F,0xCC,0x15,0x32,0x71,0x4B,0xAB,0x49, ++0x2F,0x03,0xC3,0x76,0xD7,0x70,0xDE,0x5A, ++0x27,0x30,0x11,0x82,0x54,0x80,0x26,0x88, ++0x27,0xCF,0x83,0xA8,0xFC,0x9C,0x20,0x9E, ++0x27,0x54,0xF4,0x3F,0xE9,0x00,0x82,0x2A, ++0x27,0xAA,0xF0,0x36,0xF6,0x46,0xC2,0x94, ++0x2F,0xAF,0xB1,0x02,0x03,0x57,0xF2,0x51, ++0x2F,0xC7,0x75,0x15,0x2E,0x16,0x73,0x3E, ++0x2F,0x02,0x2A,0xFC,0x8F,0x72,0xE4,0x34, ++0x2F,0xA3,0x03,0x27,0xFC,0x8E,0xE4,0xD2, ++0x2F,0xC5,0xBB,0x35,0x3C,0xC3,0xEB,0x48, ++0x2F,0x1B,0x2F,0x2D,0x1A,0x3D,0xF2,0xC9, ++0x2F,0xC7,0xDD,0x2F,0x0D,0x5D,0xEE,0xC2, ++0x2F,0x6E,0xD8,0x17,0x1F,0x51,0x40,0x57, ++0x27,0xFB,0xDE,0x2B,0xBD,0x61,0xCF,0xBB, ++0x2F,0x26,0x39,0x4B,0x18,0xC4,0x8D,0xC7, ++0x27,0x59,0xC1,0x25,0x63,0x99,0xC2,0x24, ++0x27,0x81,0xC5,0x33,0xE0,0x9E,0xD6,0xB0, ++0x27,0x86,0xA8,0xC1,0x73,0x79,0x3C,0x31, ++0x27,0xF1,0x48,0x78,0x4F,0x33,0x4B,0x4B, ++0x2F,0x66,0xF7,0x93,0x2A,0xB0,0xE2,0x72, ++0x27,0x53,0x6C,0xE5,0xEE,0xE0,0x9A,0xB8, ++0x2F,0x47,0x85,0x42,0x90,0x6A,0xDD,0xDE, ++0x2F,0x6B,0xF8,0x12,0x91,0xB9,0x42,0xDA, ++0x27,0x35,0x19,0x36,0x2F,0xB2,0xBB,0x0C, ++0x27,0x85,0x76,0xAE,0xDE,0x87,0xF5,0xC2, ++0x27,0xD0,0xE8,0x04,0x45,0x67,0x58,0xA0, ++0x2F,0x57,0x11,0xEC,0xC5,0x77,0x66,0xDB, ++0x27,0x00,0x13,0xF1,0xE5,0x26,0xCA,0x54, ++0x27,0x47,0x1C,0x62,0x4A,0xE5,0xE0,0xA8, ++0x27,0xD0,0x7B,0x59,0xFE,0x3D,0xEE,0x8D, ++0x2F,0xF9,0xC8,0x6F,0xEB,0x6F,0xB1,0x68, ++0x2F,0x0A,0x6B,0x08,0xBA,0x9C,0x56,0xA5, ++0x2F,0x29,0x51,0xBA,0x7D,0xBC,0xE0,0xEE, ++0x2F,0x65,0x13,0x87,0x5E,0xAE,0xBF,0x7F, ++0x27,0xC0,0x1F,0xAB,0x02,0xD4,0x03,0x0A, ++0x27,0xFF,0x6A,0x33,0xCF,0xA7,0x05,0xF2, ++0x2F,0x56,0x23,0x18,0x43,0xA8,0x22,0xC7, ++0x2F,0x44,0x92,0x17,0xE0,0x72,0x20,0xFB, ++0x2F,0x08,0x59,0x3E,0xB0,0xD7,0x78,0x53, ++0x27,0x2B,0x8D,0x75,0x48,0xD5,0x45,0xC9, ++0x2F,0x0B,0x01,0x27,0xBD,0x0A,0xAA,0x81, ++0x2F,0x56,0x1E,0x5C,0x48,0xE7,0x66,0x1E, ++0x2F,0x3C,0x21,0x90,0xF4,0xFE,0xF7,0x50, ++0x2F,0x2A,0x9A,0x64,0xF5,0x4E,0x56,0x66, ++0x2F,0x05,0x0C,0x39,0xDE,0x13,0x0B,0xC3, ++0x27,0xAF,0xC9,0x39,0x33,0x62,0xAE,0x50, ++0x2F,0xBB,0x6E,0xBF,0x2E,0x44,0x5C,0xAF, ++0x2F,0xB2,0xBA,0x9F,0xCA,0x34,0x3D,0x32, ++0x27,0x0B,0xF7,0xFE,0x54,0xBA,0x20,0x92, ++0x2F,0xAF,0xFD,0x3D,0xD9,0x96,0x64,0x54, ++0x27,0x79,0xA1,0xE0,0x95,0xE4,0x13,0x03, ++0x27,0xE7,0x7C,0x59,0xBB,0x9D,0xBE,0xDB, ++0x27,0x3E,0x68,0xEA,0xA5,0x19,0x13,0xD5, ++0x2F,0xDD,0x0D,0xD7,0xD0,0xDC,0xB2,0x28, ++0x2F,0x22,0x9E,0xA3,0xC1,0x79,0x63,0xBD, ++0x22,0xA5,0xBA,0xE9,0xC2,0x9D,0x5C,0x05, ++0x05,0x75,0xA7,0x65,0xAC,0xFA,0x4B,0xB5, ++0x2F,0xDA,0xC9,0x84,0x35,0xBB,0x41,0xD4, ++0x21,0x25,0xF3,0x5B,0x42,0xE7,0x79,0xCB, ++0x05,0x2B,0xF7,0x69,0x44,0xAD,0xBB,0x66 ++}; ++ ++#define Si2168_Patch_2_0b5_LINES (sizeof(Si2168_Patch_2_0b5)/(8*sizeof(unsigned char))) ++ ++#endif /* _Si2168_PATCH_2_0b5_TABLE_H_ */ +diff -urN a/drivers/media/dvb-frontends/si2168_commands.h b/drivers/media/dvb-frontends/si2168_commands.h +--- a/drivers/media/dvb-frontends/si2168_commands.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_commands.h 2013-02-17 18:06:12.000000000 +0800 +@@ -0,0 +1,2674 @@ ++/**************************************************************************************/ ++#ifndef Si2168_COMMANDS_H ++#define Si2168_COMMANDS_H ++ ++/* _status_defines_insertion_start */ ++ ++/* STATUS structure definition */ ++ typedef struct { /* Si2168_COMMON_REPLY_struct */ ++ unsigned char ddint; ++ unsigned char scanint; ++ unsigned char err; ++ unsigned char cts; ++ } Si2168_COMMON_REPLY_struct; ++ ++/* STATUS fields definition */ ++ /* STATUS, DDINT field definition (address 0, size 1, lsb 0, unsigned)*/ ++ #define Si2168_STATUS_DDINT_LSB 0 ++ #define Si2168_STATUS_DDINT_MASK 0x01 ++ #define Si2168_STATUS_DDINT_NOT_TRIGGERED 0 ++ #define Si2168_STATUS_DDINT_TRIGGERED 1 ++ /* STATUS, SCANINT field definition (address 0, size 1, lsb 1, unsigned)*/ ++ #define Si2168_STATUS_SCANINT_LSB 1 ++ #define Si2168_STATUS_SCANINT_MASK 0x01 ++ #define Si2168_STATUS_SCANINT_NOT_TRIGGERED 0 ++ #define Si2168_STATUS_SCANINT_TRIGGERED 1 ++ /* STATUS, ERR field definition (address 0, size 1, lsb 6, unsigned)*/ ++ #define Si2168_STATUS_ERR_LSB 6 ++ #define Si2168_STATUS_ERR_MASK 0x01 ++ #define Si2168_STATUS_ERR_ERROR 1 ++ #define Si2168_STATUS_ERR_NO_ERROR 0 ++ /* STATUS, CTS field definition (address 0, size 1, lsb 7, unsigned)*/ ++ #define Si2168_STATUS_CTS_LSB 7 ++ #define Si2168_STATUS_CTS_MASK 0x01 ++ #define Si2168_STATUS_CTS_COMPLETED 1 ++ #define Si2168_STATUS_CTS_WAIT 0 ++ ++/* _status_defines_insertion_point */ ++ ++/* _commands_defines_insertion_start */ ++/* Si2168_CONFIG_CLKIO command definition */ ++#define Si2168_CONFIG_CLKIO_CMD 0x18 ++ ++#ifdef Si2168_CONFIG_CLKIO_CMD ++ #define Si2168_CONFIG_CLKIO_CMD_CODE 0x010018 ++ ++ typedef struct { /* Si2168_CONFIG_CLKIO_CMD_struct */ ++ unsigned char output; ++ unsigned char pre_driver_str; ++ unsigned char driver_str; ++ } Si2168_CONFIG_CLKIO_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_CONFIG_CLKIO_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char mode; ++ unsigned char pre_driver_str; ++ unsigned char driver_str; ++ } Si2168_CONFIG_CLKIO_CMD_REPLY_struct; ++ ++ /* CONFIG_CLKIO command, OUTPUT field definition (address 1,size 2, lsb 0, unsigned) */ ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_LSB 0 ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_MASK 0x03 ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_MIN 0 ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_MAX 2 ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_NO_CHANGE 0 ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_OFF 2 ++ #define Si2168_CONFIG_CLKIO_CMD_OUTPUT_ON 1 ++ /* CONFIG_CLKIO command, PRE_DRIVER_STR field definition (address 1,size 2, lsb 2, unsigned) */ ++ #define Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_LSB 2 ++ #define Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_MASK 0x03 ++ #define Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_MIN 0 ++ #define Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_MAX 3 ++ #define Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_PRE_DRIVER_MIN 0 ++ #define Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_PRE_DRIVER_MAX 3 ++ /* CONFIG_CLKIO command, DRIVER_STR field definition (address 1,size 4, lsb 4, unsigned) */ ++ #define Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_LSB 4 ++ #define Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_MASK 0x0f ++ #define Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_MIN 0 ++ #define Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_MAX 15 ++ #define Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_DRIVER_MIN 0 ++ #define Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_DRIVER_MAX 15 ++ /* CONFIG_CLKIO command, MODE field definition (address 1, size 2, lsb 0, unsigned)*/ ++ #define Si2168_CONFIG_CLKIO_RESPONSE_MODE_LSB 0 ++ #define Si2168_CONFIG_CLKIO_RESPONSE_MODE_MASK 0x03 ++ #define Si2168_CONFIG_CLKIO_RESPONSE_MODE_CLK_INPUT 2 ++ #define Si2168_CONFIG_CLKIO_RESPONSE_MODE_CLK_OUTPUT 1 ++ #define Si2168_CONFIG_CLKIO_RESPONSE_MODE_UNUSED 0 ++ /* CONFIG_CLKIO command, PRE_DRIVER_STR field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_CONFIG_CLKIO_RESPONSE_PRE_DRIVER_STR_LSB 0 ++ #define Si2168_CONFIG_CLKIO_RESPONSE_PRE_DRIVER_STR_MASK 0xff ++ /* CONFIG_CLKIO command, DRIVER_STR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_CONFIG_CLKIO_RESPONSE_DRIVER_STR_LSB 0 ++ #define Si2168_CONFIG_CLKIO_RESPONSE_DRIVER_STR_MASK 0xff ++ ++#endif /* Si2168_CONFIG_CLKIO_CMD */ ++ ++/* Si2168_CONFIG_PINS command definition */ ++#define Si2168_CONFIG_PINS_CMD 0x12 ++ ++#ifdef Si2168_CONFIG_PINS_CMD ++ #define Si2168_CONFIG_PINS_CMD_CODE 0x010012 ++ ++ typedef struct { /* Si2168_CONFIG_PINS_CMD_struct */ ++ unsigned char gpio0_mode; ++ unsigned char gpio0_read; ++ unsigned char gpio1_mode; ++ unsigned char gpio1_read; ++ } Si2168_CONFIG_PINS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_CONFIG_PINS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char gpio0_mode; ++ unsigned char gpio0_state; ++ unsigned char gpio1_mode; ++ unsigned char gpio1_state; ++ } Si2168_CONFIG_PINS_CMD_REPLY_struct; ++ ++ /* CONFIG_PINS command, GPIO0_MODE field definition (address 1,size 7, lsb 0, unsigned) */ ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_LSB 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_MASK 0x7f ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_MIN 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_MAX 8 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_DISABLE 1 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_DRIVE_0 2 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_DRIVE_1 3 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_HW_LOCK 8 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_INT_FLAG 7 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_NO_CHANGE 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_MODE_TS_ERR 4 ++ /* CONFIG_PINS command, GPIO0_READ field definition (address 1,size 1, lsb 7, unsigned) */ ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_READ_LSB 7 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_READ_MASK 0x01 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_READ_MIN 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_READ_MAX 1 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_READ_DO_NOT_READ 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO0_READ_READ 1 ++ /* CONFIG_PINS command, GPIO1_MODE field definition (address 2,size 7, lsb 0, unsigned) */ ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_LSB 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_MASK 0x7f ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_MIN 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_MAX 8 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_DISABLE 1 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_DRIVE_0 2 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_DRIVE_1 3 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_HW_LOCK 8 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_INT_FLAG 7 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_NO_CHANGE 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_MODE_TS_ERR 4 ++ /* CONFIG_PINS command, GPIO1_READ field definition (address 2,size 1, lsb 7, unsigned) */ ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_READ_LSB 7 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_READ_MASK 0x01 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_READ_MIN 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_READ_MAX 1 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_READ_DO_NOT_READ 0 ++ #define Si2168_CONFIG_PINS_CMD_GPIO1_READ_READ 1 ++ /* CONFIG_PINS command, GPIO0_MODE field definition (address 1, size 7, lsb 0, unsigned)*/ ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_LSB 0 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_MASK 0x7f ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_DISABLE 1 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_DRIVE_0 2 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_DRIVE_1 3 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_HW_LOCK 8 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_INT_FLAG 7 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_TS_ERR 4 ++ /* CONFIG_PINS command, GPIO0_STATE field definition (address 1, size 1, lsb 7, unsigned)*/ ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_STATE_LSB 7 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_STATE_MASK 0x01 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_STATE_READ_0 0 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO0_STATE_READ_1 1 ++ /* CONFIG_PINS command, GPIO1_MODE field definition (address 2, size 7, lsb 0, unsigned)*/ ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_LSB 0 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_MASK 0x7f ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_DISABLE 1 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_DRIVE_0 2 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_DRIVE_1 3 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_HW_LOCK 8 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_INT_FLAG 7 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_TS_ERR 4 ++ /* CONFIG_PINS command, GPIO1_STATE field definition (address 2, size 1, lsb 7, unsigned)*/ ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_STATE_LSB 7 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_STATE_MASK 0x01 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_STATE_READ_0 0 ++ #define Si2168_CONFIG_PINS_RESPONSE_GPIO1_STATE_READ_1 1 ++ ++#endif /* Si2168_CONFIG_PINS_CMD */ ++ ++/* Si2168_DD_BER command definition */ ++#define Si2168_DD_BER_CMD 0x82 ++ ++#ifdef Si2168_DD_BER_CMD ++ #define Si2168_DD_BER_CMD_CODE 0x010082 ++ ++ typedef struct { /* Si2168_DD_BER_CMD_struct */ ++ unsigned char rst; ++ } Si2168_DD_BER_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_BER_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_BER_CMD_REPLY_struct; ++ ++ /* DD_BER command, RST field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DD_BER_CMD_RST_LSB 0 ++ #define Si2168_DD_BER_CMD_RST_MASK 0x01 ++ #define Si2168_DD_BER_CMD_RST_MIN 0 ++ #define Si2168_DD_BER_CMD_RST_MAX 1 ++ #define Si2168_DD_BER_CMD_RST_CLEAR 1 ++ #define Si2168_DD_BER_CMD_RST_RUN 0 ++ /* DD_BER command, EXP field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DD_BER_RESPONSE_EXP_LSB 0 ++ #define Si2168_DD_BER_RESPONSE_EXP_MASK 0x0f ++ #define Si2168_DD_BER_RESPONSE_EXP_EXP_MIN 0 ++ #define Si2168_DD_BER_RESPONSE_EXP_EXP_MAX 8 ++ /* DD_BER command, MANT field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_BER_RESPONSE_MANT_LSB 0 ++ #define Si2168_DD_BER_RESPONSE_MANT_MASK 0xff ++ #define Si2168_DD_BER_RESPONSE_MANT_MANT_MIN 0 ++ #define Si2168_DD_BER_RESPONSE_MANT_MANT_MAX 99 ++ ++#endif /* Si2168_DD_BER_CMD */ ++ ++/* Si2168_DD_CBER command definition */ ++#define Si2168_DD_CBER_CMD 0x81 ++ ++#ifdef Si2168_DD_CBER_CMD ++ #define Si2168_DD_CBER_CMD_CODE 0x010081 ++ ++ typedef struct { /* Si2168_DD_CBER_CMD_struct */ ++ unsigned char rst; ++ } Si2168_DD_CBER_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_CBER_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_CBER_CMD_REPLY_struct; ++ ++ /* DD_CBER command, RST field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DD_CBER_CMD_RST_LSB 0 ++ #define Si2168_DD_CBER_CMD_RST_MASK 0x01 ++ #define Si2168_DD_CBER_CMD_RST_MIN 0 ++ #define Si2168_DD_CBER_CMD_RST_MAX 1 ++ #define Si2168_DD_CBER_CMD_RST_CLEAR 1 ++ #define Si2168_DD_CBER_CMD_RST_RUN 0 ++ /* DD_CBER command, EXP field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DD_CBER_RESPONSE_EXP_LSB 0 ++ #define Si2168_DD_CBER_RESPONSE_EXP_MASK 0x0f ++ #define Si2168_DD_CBER_RESPONSE_EXP_EXP_MIN 0 ++ #define Si2168_DD_CBER_RESPONSE_EXP_EXP_MAX 8 ++ /* DD_CBER command, MANT field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_CBER_RESPONSE_MANT_LSB 0 ++ #define Si2168_DD_CBER_RESPONSE_MANT_MASK 0xff ++ #define Si2168_DD_CBER_RESPONSE_MANT_MANT_MIN 0 ++ #define Si2168_DD_CBER_RESPONSE_MANT_MANT_MAX 99 ++ ++#endif /* Si2168_DD_CBER_CMD */ ++ ++ ++/* Si2168_DD_EXT_AGC_TER command definition */ ++#define Si2168_DD_EXT_AGC_TER_CMD 0x89 ++ ++#ifdef Si2168_DD_EXT_AGC_TER_CMD ++ #define Si2168_DD_EXT_AGC_TER_CMD_CODE 0x010089 ++ ++ typedef struct { /* Si2168_DD_EXT_AGC_TER_CMD_struct */ ++ unsigned char agc_1_mode; ++ unsigned char agc_1_inv; ++ unsigned char agc_2_mode; ++ unsigned char agc_2_inv; ++ unsigned char agc_1_kloop; ++ unsigned char agc_2_kloop; ++ unsigned char agc_1_min; ++ unsigned char agc_2_min; ++ } Si2168_DD_EXT_AGC_TER_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_EXT_AGC_TER_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char agc_1_level; ++ unsigned char agc_2_level; ++ } Si2168_DD_EXT_AGC_TER_CMD_REPLY_struct; ++ ++ /* DD_EXT_AGC_TER command, AGC_1_MODE field definition (address 1,size 3, lsb 0, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MASK 0x07 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MAX 5 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MP_A 2 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MP_B 3 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MP_C 4 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MP_D 5 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_NOT_USED 1 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_NO_CHANGE 0 ++ /* DD_EXT_AGC_TER command, AGC_1_INV field definition (address 1,size 1, lsb 3, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_LSB 3 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_MASK 0x01 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_MAX 1 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_INVERTED 1 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_NOT_INVERTED 0 ++ /* DD_EXT_AGC_TER command, AGC_2_MODE field definition (address 1,size 3, lsb 4, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_LSB 4 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MASK 0x07 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MAX 5 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MP_A 2 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MP_B 3 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MP_C 4 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MP_D 5 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_NOT_USED 1 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_NO_CHANGE 0 ++ /* DD_EXT_AGC_TER command, AGC_2_INV field definition (address 1,size 1, lsb 7, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_LSB 7 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_MASK 0x01 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_MAX 1 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_INVERTED 1 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_NOT_INVERTED 0 ++ /* DD_EXT_AGC_TER command, AGC_1_KLOOP field definition (address 2,size 5, lsb 0, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MASK 0x1f ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MIN 6 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MAX 20 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_AGC_1_KLOOP_MIN 6 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_AGC_1_KLOOP_MAX 20 ++ /* DD_EXT_AGC_TER command, AGC_2_KLOOP field definition (address 3,size 5, lsb 0, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_MASK 0x1f ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_MIN 6 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_MAX 20 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_AGC_2_KLOOP_MIN 6 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_AGC_2_KLOOP_MAX 20 ++ /* DD_EXT_AGC_TER command, AGC_1_MIN field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_MASK 0xff ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_MAX 255 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_AGC_1_MIN_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_AGC_1_MIN_MAX 255 ++ /* DD_EXT_AGC_TER command, AGC_2_MIN field definition (address 5,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_MASK 0xff ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_MAX 255 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_AGC_2_MIN_MIN 0 ++ #define Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_AGC_2_MIN_MAX 255 ++ /* DD_EXT_AGC_TER command, AGC_1_LEVEL field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_1_LEVEL_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_1_LEVEL_MASK 0xff ++ /* DD_EXT_AGC_TER command, AGC_2_LEVEL field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_2_LEVEL_LSB 0 ++ #define Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_2_LEVEL_MASK 0xff ++ ++#endif /* Si2168_DD_EXT_AGC_TER_CMD */ ++ ++ ++/* Si2168_DD_FER command definition */ ++#define Si2168_DD_FER_CMD 0x86 ++ ++#ifdef Si2168_DD_FER_CMD ++ #define Si2168_DD_FER_CMD_CODE 0x010086 ++ ++ typedef struct { /* Si2168_DD_FER_CMD_struct */ ++ unsigned char rst; ++ } Si2168_DD_FER_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_FER_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_FER_CMD_REPLY_struct; ++ ++ /* DD_FER command, RST field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DD_FER_CMD_RST_LSB 0 ++ #define Si2168_DD_FER_CMD_RST_MASK 0x01 ++ #define Si2168_DD_FER_CMD_RST_MIN 0 ++ #define Si2168_DD_FER_CMD_RST_MAX 1 ++ #define Si2168_DD_FER_CMD_RST_CLEAR 1 ++ #define Si2168_DD_FER_CMD_RST_RUN 0 ++ /* DD_FER command, EXP field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DD_FER_RESPONSE_EXP_LSB 0 ++ #define Si2168_DD_FER_RESPONSE_EXP_MASK 0x0f ++ #define Si2168_DD_FER_RESPONSE_EXP_EXP_MIN 0 ++ #define Si2168_DD_FER_RESPONSE_EXP_EXP_MAX 8 ++ /* DD_FER command, MANT field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_FER_RESPONSE_MANT_LSB 0 ++ #define Si2168_DD_FER_RESPONSE_MANT_MASK 0xff ++ #define Si2168_DD_FER_RESPONSE_MANT_MANT_MIN 0 ++ #define Si2168_DD_FER_RESPONSE_MANT_MANT_MAX 99 ++ ++#endif /* Si2168_DD_FER_CMD */ ++ ++/* Si2168_DD_GET_REG command definition */ ++#define Si2168_DD_GET_REG_CMD 0x8f ++ ++#ifdef Si2168_DD_GET_REG_CMD ++ #define Si2168_DD_GET_REG_CMD_CODE 0x01008f ++ ++ typedef struct { /* Si2168_DD_GET_REG_CMD_struct */ ++ unsigned char reg_code_lsb; ++ unsigned char reg_code_mid; ++ unsigned char reg_code_msb; ++ } Si2168_DD_GET_REG_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_GET_REG_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char data1; ++ unsigned char data2; ++ unsigned char data3; ++ unsigned char data4; ++ } Si2168_DD_GET_REG_CMD_REPLY_struct; ++ ++ /* DD_GET_REG command, REG_CODE_LSB field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_LSB_LSB 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_LSB_MASK 0xff ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_LSB_MIN 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_LSB_MAX 255 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_LSB_REG_CODE_LSB_MIN 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_LSB_REG_CODE_LSB_MAX 255 ++ /* DD_GET_REG command, REG_CODE_MID field definition (address 2,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MID_LSB 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MID_MASK 0xff ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MID_MIN 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MID_MAX 255 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MID_REG_CODE_MID_MIN 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MID_REG_CODE_MID_MAX 255 ++ /* DD_GET_REG command, REG_CODE_MSB field definition (address 3,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MSB_LSB 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MSB_MASK 0xff ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MSB_MIN 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MSB_MAX 255 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MSB_REG_CODE_MSB_MIN 0 ++ #define Si2168_DD_GET_REG_CMD_REG_CODE_MSB_REG_CODE_MSB_MAX 255 ++ /* DD_GET_REG command, DATA1 field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_GET_REG_RESPONSE_DATA1_LSB 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA1_MASK 0xff ++ #define Si2168_DD_GET_REG_RESPONSE_DATA1_DATA1_MIN 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA1_DATA1_MAX 255 ++ /* DD_GET_REG command, DATA2 field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_GET_REG_RESPONSE_DATA2_LSB 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA2_MASK 0xff ++ #define Si2168_DD_GET_REG_RESPONSE_DATA2_DATA2_MIN 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA2_DATA2_MAX 255 ++ /* DD_GET_REG command, DATA3 field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_GET_REG_RESPONSE_DATA3_LSB 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA3_MASK 0xff ++ #define Si2168_DD_GET_REG_RESPONSE_DATA3_DATA3_MIN 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA3_DATA3_MAX 255 ++ /* DD_GET_REG command, DATA4 field definition (address 4, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_GET_REG_RESPONSE_DATA4_LSB 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA4_MASK 0xff ++ #define Si2168_DD_GET_REG_RESPONSE_DATA4_DATA4_MIN 0 ++ #define Si2168_DD_GET_REG_RESPONSE_DATA4_DATA4_MAX 255 ++ ++#endif /* Si2168_DD_GET_REG_CMD */ ++ ++/* Si2168_DD_MP_DEFAULTS command definition */ ++#define Si2168_DD_MP_DEFAULTS_CMD 0x88 ++ ++#ifdef Si2168_DD_MP_DEFAULTS_CMD ++ #define Si2168_DD_MP_DEFAULTS_CMD_CODE 0x010088 ++ ++ typedef struct { /* Si2168_DD_MP_DEFAULTS_CMD_struct */ ++ unsigned char mp_a_mode; ++ unsigned char mp_b_mode; ++ unsigned char mp_c_mode; ++ unsigned char mp_d_mode; ++ } Si2168_DD_MP_DEFAULTS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_MP_DEFAULTS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char mp_a_mode; ++ unsigned char mp_b_mode; ++ unsigned char mp_c_mode; ++ unsigned char mp_d_mode; ++ } Si2168_DD_MP_DEFAULTS_CMD_REPLY_struct; ++ ++ /* DD_MP_DEFAULTS command, MP_A_MODE field definition (address 1,size 7, lsb 0, unsigned) */ ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_MIN 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_MAX 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_DISABLE 1 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_DRIVE_0 2 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_DRIVE_1 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_NO_CHANGE 0 ++ /* DD_MP_DEFAULTS command, MP_B_MODE field definition (address 2,size 7, lsb 0, unsigned) */ ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_MIN 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_MAX 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_DISABLE 1 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_DRIVE_0 2 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_DRIVE_1 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_NO_CHANGE 0 ++ /* DD_MP_DEFAULTS command, MP_C_MODE field definition (address 3,size 7, lsb 0, unsigned) */ ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_MIN 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_MAX 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_DISABLE 1 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_DRIVE_0 2 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_DRIVE_1 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_NO_CHANGE 0 ++ /* DD_MP_DEFAULTS command, MP_D_MODE field definition (address 4,size 7, lsb 0, unsigned) */ ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_MIN 0 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_MAX 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_DISABLE 1 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_DRIVE_0 2 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_DRIVE_1 3 ++ #define Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_NO_CHANGE 0 ++ /* DD_MP_DEFAULTS command, MP_A_MODE field definition (address 1, size 7, lsb 0, unsigned)*/ ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_AGC_1 3 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_AGC_1_INVERTED 4 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_AGC_2 5 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_AGC_2_INVERTED 6 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_DISABLE 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_DRIVE_0 1 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_DRIVE_1 2 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_FEF 7 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_FEF_INVERTED 8 ++ /* DD_MP_DEFAULTS command, MP_B_MODE field definition (address 2, size 7, lsb 0, unsigned)*/ ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_AGC_1 3 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_AGC_1_INVERTED 4 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_AGC_2 5 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_AGC_2_INVERTED 6 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_DISABLE 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_DRIVE_0 1 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_DRIVE_1 2 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_FEF 7 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_FEF_INVERTED 8 ++ /* DD_MP_DEFAULTS command, MP_C_MODE field definition (address 3, size 7, lsb 0, unsigned)*/ ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_AGC_1 3 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_AGC_1_INVERTED 4 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_AGC_2 5 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_AGC_2_INVERTED 6 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_DISABLE 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_DRIVE_0 1 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_DRIVE_1 2 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_FEF 7 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_FEF_INVERTED 8 ++ /* DD_MP_DEFAULTS command, MP_D_MODE field definition (address 4, size 7, lsb 0, unsigned)*/ ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_LSB 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_MASK 0x7f ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_AGC_1 3 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_AGC_1_INVERTED 4 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_AGC_2 5 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_AGC_2_INVERTED 6 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_DISABLE 0 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_DRIVE_0 1 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_DRIVE_1 2 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_FEF 7 ++ #define Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_FEF_INVERTED 8 ++ ++#endif /* Si2168_DD_MP_DEFAULTS_CMD */ ++ ++/* Si2168_DD_PER command definition */ ++#define Si2168_DD_PER_CMD 0x83 ++ ++#ifdef Si2168_DD_PER_CMD ++ #define Si2168_DD_PER_CMD_CODE 0x010083 ++ ++ typedef struct { /* Si2168_DD_PER_CMD_struct */ ++ unsigned char rst; ++ } Si2168_DD_PER_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_PER_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_PER_CMD_REPLY_struct; ++ ++ /* DD_PER command, RST field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DD_PER_CMD_RST_LSB 0 ++ #define Si2168_DD_PER_CMD_RST_MASK 0x01 ++ #define Si2168_DD_PER_CMD_RST_MIN 0 ++ #define Si2168_DD_PER_CMD_RST_MAX 1 ++ #define Si2168_DD_PER_CMD_RST_CLEAR 1 ++ #define Si2168_DD_PER_CMD_RST_RUN 0 ++ /* DD_PER command, EXP field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DD_PER_RESPONSE_EXP_LSB 0 ++ #define Si2168_DD_PER_RESPONSE_EXP_MASK 0x0f ++ #define Si2168_DD_PER_RESPONSE_EXP_EXP_MIN 0 ++ #define Si2168_DD_PER_RESPONSE_EXP_EXP_MAX 8 ++ /* DD_PER command, MANT field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_PER_RESPONSE_MANT_LSB 0 ++ #define Si2168_DD_PER_RESPONSE_MANT_MASK 0xff ++ #define Si2168_DD_PER_RESPONSE_MANT_MANT_MIN 0 ++ #define Si2168_DD_PER_RESPONSE_MANT_MANT_MAX 99 ++ ++#endif /* Si2168_DD_PER_CMD */ ++ ++/* Si2168_DD_RESTART command definition */ ++#define Si2168_DD_RESTART_CMD 0x85 ++ ++#ifdef Si2168_DD_RESTART_CMD ++ #define Si2168_DD_RESTART_CMD_CODE 0x010085 ++ ++ typedef struct { /* Si2168_DD_RESTART_CMD_struct */ ++ unsigned char nothing; } Si2168_DD_RESTART_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_RESTART_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_DD_RESTART_CMD_REPLY_struct; ++ ++#endif /* Si2168_DD_RESTART_CMD */ ++ ++/* Si2168_DD_SET_REG command definition */ ++#define Si2168_DD_SET_REG_CMD 0x8e ++ ++#ifdef Si2168_DD_SET_REG_CMD ++ #define Si2168_DD_SET_REG_CMD_CODE 0x01008e ++ ++ typedef struct { /* Si2168_DD_SET_REG_CMD_struct */ ++ unsigned char reg_code_lsb; ++ unsigned char reg_code_mid; ++ unsigned char reg_code_msb; ++ unsigned long value; ++ } Si2168_DD_SET_REG_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_SET_REG_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_DD_SET_REG_CMD_REPLY_struct; ++ ++ /* DD_SET_REG command, REG_CODE_LSB field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_LSB_LSB 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_LSB_MASK 0xff ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_LSB_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_LSB_MAX 255 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_LSB_REG_CODE_LSB_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_LSB_REG_CODE_LSB_MAX 255 ++ /* DD_SET_REG command, REG_CODE_MID field definition (address 2,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MID_LSB 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MID_MASK 0xff ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MID_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MID_MAX 255 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MID_REG_CODE_MID_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MID_REG_CODE_MID_MAX 255 ++ /* DD_SET_REG command, REG_CODE_MSB field definition (address 3,size 8, lsb 0, unsigned) */ ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MSB_LSB 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MSB_MASK 0xff ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MSB_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MSB_MAX 255 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MSB_REG_CODE_MSB_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_REG_CODE_MSB_REG_CODE_MSB_MAX 255 ++ /* DD_SET_REG command, VALUE field definition (address 4,size 32, lsb 0, unsigned) */ ++ #define Si2168_DD_SET_REG_CMD_VALUE_LSB 0 ++ #define Si2168_DD_SET_REG_CMD_VALUE_MASK 0xffffffff ++ #define Si2168_DD_SET_REG_CMD_VALUE_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_VALUE_MAX 4294967295 ++ #define Si2168_DD_SET_REG_CMD_VALUE_VALUE_MIN 0 ++ #define Si2168_DD_SET_REG_CMD_VALUE_VALUE_MAX 4294967295 ++#endif /* Si2168_DD_SET_REG_CMD */ ++ ++/* Si2168_DD_SSI_SQI command definition */ ++#define Si2168_DD_SSI_SQI_CMD 0x8b ++ ++#ifdef Si2168_DD_SSI_SQI_CMD ++ #define Si2168_DD_SSI_SQI_CMD_CODE 0x01008b ++ ++ typedef struct { /* Si2168_DD_SSI_SQI_CMD_struct */ ++ char tuner_rssi; ++ } Si2168_DD_SSI_SQI_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_SSI_SQI_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ char ssi; ++ char sqi; ++ } Si2168_DD_SSI_SQI_CMD_REPLY_struct; ++ ++ /* DD_SSI_SQI command, TUNER_RSSI field definition (address 1,size 8, lsb 0, signed) */ ++ #define Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_LSB 0 ++ #define Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_MASK 0xff ++ #define Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_SHIFT 24 ++ #define Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_MIN -128.0 ++ #define Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_MAX 127.0 ++ /* DD_SSI_SQI command, SSI field definition (address 1, size 8, lsb 0, signed)*/ ++ #define Si2168_DD_SSI_SQI_RESPONSE_SSI_LSB 0 ++ #define Si2168_DD_SSI_SQI_RESPONSE_SSI_MASK 0xff ++ #define Si2168_DD_SSI_SQI_RESPONSE_SSI_SHIFT 24 ++ #define Si2168_DD_SSI_SQI_RESPONSE_SSI_SSI_MIN -1 ++ #define Si2168_DD_SSI_SQI_RESPONSE_SSI_SSI_MAX 100 ++ /* DD_SSI_SQI command, SQI field definition (address 2, size 8, lsb 0, signed)*/ ++ #define Si2168_DD_SSI_SQI_RESPONSE_SQI_LSB 0 ++ #define Si2168_DD_SSI_SQI_RESPONSE_SQI_MASK 0xff ++ #define Si2168_DD_SSI_SQI_RESPONSE_SQI_SHIFT 24 ++ #define Si2168_DD_SSI_SQI_RESPONSE_SQI_SQI_MIN -1 ++ #define Si2168_DD_SSI_SQI_RESPONSE_SQI_SQI_MAX 100 ++ ++#endif /* Si2168_DD_SSI_SQI_CMD */ ++ ++/* Si2168_DD_STATUS command definition */ ++#define Si2168_DD_STATUS_CMD 0x87 ++ ++#ifdef Si2168_DD_STATUS_CMD ++ #define Si2168_DD_STATUS_CMD_CODE 0x010087 ++ ++ typedef struct { /* Si2168_DD_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2168_DD_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_STATUS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char pclint; ++ unsigned char dlint; ++ unsigned char berint; ++ unsigned char uncorint; ++ unsigned char rsqint_bit5; ++ unsigned char rsqint_bit6; ++ unsigned char rsqint_bit7; ++ unsigned char pcl; ++ unsigned char dl; ++ unsigned char ber; ++ unsigned char uncor; ++ unsigned char rsqstat_bit5; ++ unsigned char rsqstat_bit6; ++ unsigned char rsqstat_bit7; ++ unsigned char modulation; ++ unsigned int ts_bit_rate; ++ unsigned int ts_clk_freq; ++ } Si2168_DD_STATUS_CMD_REPLY_struct; ++ ++ /* DD_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DD_STATUS_CMD_INTACK_LSB 0 ++ #define Si2168_DD_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2168_DD_STATUS_CMD_INTACK_MIN 0 ++ #define Si2168_DD_STATUS_CMD_INTACK_MAX 1 ++ #define Si2168_DD_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2168_DD_STATUS_CMD_INTACK_OK 0 ++ /* DD_STATUS command, PCLINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_PCLINT_LSB 1 ++ #define Si2168_DD_STATUS_RESPONSE_PCLINT_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_PCLINT_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_PCLINT_NO_CHANGE 0 ++ /* DD_STATUS command, DLINT field definition (address 1, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_DLINT_LSB 2 ++ #define Si2168_DD_STATUS_RESPONSE_DLINT_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_DLINT_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_DLINT_NO_CHANGE 0 ++ /* DD_STATUS command, BERINT field definition (address 1, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_BERINT_LSB 3 ++ #define Si2168_DD_STATUS_RESPONSE_BERINT_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_BERINT_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_BERINT_NO_CHANGE 0 ++ /* DD_STATUS command, UNCORINT field definition (address 1, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_UNCORINT_LSB 4 ++ #define Si2168_DD_STATUS_RESPONSE_UNCORINT_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_UNCORINT_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_UNCORINT_NO_CHANGE 0 ++ /* DD_STATUS command, RSQINT_BIT5 field definition (address 1, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_LSB 5 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_NO_CHANGE 0 ++ /* DD_STATUS command, RSQINT_BIT6 field definition (address 1, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT6_LSB 6 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT6_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT6_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT6_NO_CHANGE 0 ++ /* DD_STATUS command, RSQINT_BIT7 field definition (address 1, size 1, lsb 7, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT7_LSB 7 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT7_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT7_CHANGED 1 ++ #define Si2168_DD_STATUS_RESPONSE_RSQINT_BIT7_NO_CHANGE 0 ++ /* DD_STATUS command, PCL field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_PCL_LSB 1 ++ #define Si2168_DD_STATUS_RESPONSE_PCL_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_PCL_LOCKED 1 ++ #define Si2168_DD_STATUS_RESPONSE_PCL_NO_LOCK 0 ++ /* DD_STATUS command, DL field definition (address 2, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_DL_LSB 2 ++ #define Si2168_DD_STATUS_RESPONSE_DL_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_DL_LOCKED 1 ++ #define Si2168_DD_STATUS_RESPONSE_DL_NO_LOCK 0 ++ /* DD_STATUS command, BER field definition (address 2, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_BER_LSB 3 ++ #define Si2168_DD_STATUS_RESPONSE_BER_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_BER_BER_ABOVE 1 ++ #define Si2168_DD_STATUS_RESPONSE_BER_BER_BELOW 0 ++ /* DD_STATUS command, UNCOR field definition (address 2, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_UNCOR_LSB 4 ++ #define Si2168_DD_STATUS_RESPONSE_UNCOR_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_UNCOR_NO_UNCOR_FOUND 0 ++ #define Si2168_DD_STATUS_RESPONSE_UNCOR_UNCOR_FOUND 1 ++ /* DD_STATUS command, RSQSTAT_BIT5 field definition (address 2, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT5_LSB 5 ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT5_MASK 0x01 ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT5_NO_CHANGE 0 ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT5_CHANGE 1 ++ /* DD_STATUS command, RSQSTAT_BIT6 field definition (address 2, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT6_LSB 6 ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT6_MASK 0x01 ++ /* DD_STATUS command, RSQSTAT_BIT7 field definition (address 2, size 1, lsb 7, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT7_LSB 7 ++ #define Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT7_MASK 0x01 ++ /* DD_STATUS command, MODULATION field definition (address 3, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_LSB 0 ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_MASK 0x0f ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_DSS 10 ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_DVBC 3 ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_DVBS 8 ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_DVBS2 9 ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_DVBT 2 ++ #define Si2168_DD_STATUS_RESPONSE_MODULATION_DVBT2 7 ++ /* DD_STATUS command, TS_BIT_RATE field definition (address 4, size 16, lsb 0, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_TS_BIT_RATE_LSB 0 ++ #define Si2168_DD_STATUS_RESPONSE_TS_BIT_RATE_MASK 0xffff ++ /* DD_STATUS command, TS_CLK_FREQ field definition (address 6, size 16, lsb 0, unsigned)*/ ++ #define Si2168_DD_STATUS_RESPONSE_TS_CLK_FREQ_LSB 0 ++ #define Si2168_DD_STATUS_RESPONSE_TS_CLK_FREQ_MASK 0xffff ++ ++#endif /* Si2168_DD_STATUS_CMD */ ++ ++/* Si2168_DD_UNCOR command definition */ ++#define Si2168_DD_UNCOR_CMD 0x84 ++ ++#ifdef Si2168_DD_UNCOR_CMD ++ #define Si2168_DD_UNCOR_CMD_CODE 0x010084 ++ ++ typedef struct { /* Si2168_DD_UNCOR_CMD_struct */ ++ unsigned char rst; ++ } Si2168_DD_UNCOR_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DD_UNCOR_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char uncor_lsb; ++ unsigned char uncor_msb; ++ } Si2168_DD_UNCOR_CMD_REPLY_struct; ++ ++ /* DD_UNCOR command, RST field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DD_UNCOR_CMD_RST_LSB 0 ++ #define Si2168_DD_UNCOR_CMD_RST_MASK 0x01 ++ #define Si2168_DD_UNCOR_CMD_RST_MIN 0 ++ #define Si2168_DD_UNCOR_CMD_RST_MAX 1 ++ #define Si2168_DD_UNCOR_CMD_RST_CLEAR 1 ++ #define Si2168_DD_UNCOR_CMD_RST_RUN 0 ++ /* DD_UNCOR command, UNCOR_LSB field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_UNCOR_RESPONSE_UNCOR_LSB_LSB 0 ++ #define Si2168_DD_UNCOR_RESPONSE_UNCOR_LSB_MASK 0xff ++ /* DD_UNCOR command, UNCOR_MSB field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DD_UNCOR_RESPONSE_UNCOR_MSB_LSB 0 ++ #define Si2168_DD_UNCOR_RESPONSE_UNCOR_MSB_MASK 0xff ++ ++#endif /* Si2168_DD_UNCOR_CMD */ ++ ++/* Si2168_DOWNLOAD_DATASET_CONTINUE command definition */ ++#define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD 0xb9 ++ ++#ifdef Si2168_DOWNLOAD_DATASET_CONTINUE_CMD ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_CODE 0x0100b9 ++ ++ typedef struct { /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_struct */ ++ unsigned char data0; ++ unsigned char data1; ++ unsigned char data2; ++ unsigned char data3; ++ unsigned char data4; ++ unsigned char data5; ++ unsigned char data6; ++ } Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_REPLY_struct; ++ ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA0 field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_DATA0_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_DATA0_MAX 255 ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA1 field definition (address 2,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_DATA1_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_DATA1_MAX 255 ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA2 field definition (address 3,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_DATA2_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_DATA2_MAX 255 ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA3 field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_DATA3_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_DATA3_MAX 255 ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA4 field definition (address 5,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_DATA4_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_DATA4_MAX 255 ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA5 field definition (address 6,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_DATA5_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_DATA5_MAX 255 ++ /* DOWNLOAD_DATASET_CONTINUE command, DATA6 field definition (address 7,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_DATA6_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_DATA6_MAX 255 ++#endif /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD */ ++ ++/* Si2168_DOWNLOAD_DATASET_START command definition */ ++#define Si2168_DOWNLOAD_DATASET_START_CMD 0xb8 ++ ++#ifdef Si2168_DOWNLOAD_DATASET_START_CMD ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_CODE 0x0100b8 ++ ++ typedef struct { /* Si2168_DOWNLOAD_DATASET_START_CMD_struct */ ++ unsigned char dataset_id; ++ unsigned char dataset_checksum; ++ unsigned char data0; ++ unsigned char data1; ++ unsigned char data2; ++ unsigned char data3; ++ unsigned char data4; ++ } Si2168_DOWNLOAD_DATASET_START_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DOWNLOAD_DATASET_START_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_DOWNLOAD_DATASET_START_CMD_REPLY_struct; ++ ++ /* DOWNLOAD_DATASET_START command, DATASET_ID field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_MAX 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_RFU 0 ++ /* DOWNLOAD_DATASET_START command, DATASET_CHECKSUM field definition (address 2,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_DATASET_CHECKSUM_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_DATASET_CHECKSUM_MAX 255 ++ /* DOWNLOAD_DATASET_START command, DATA0 field definition (address 3,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_DATA0_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_DATA0_MAX 255 ++ /* DOWNLOAD_DATASET_START command, DATA1 field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_DATA1_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_DATA1_MAX 255 ++ /* DOWNLOAD_DATASET_START command, DATA2 field definition (address 5,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_DATA2_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_DATA2_MAX 255 ++ /* DOWNLOAD_DATASET_START command, DATA3 field definition (address 6,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_DATA3_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_DATA3_MAX 255 ++ /* DOWNLOAD_DATASET_START command, DATA4 field definition (address 7,size 8, lsb 0, unsigned) */ ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_LSB 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_MASK 0xff ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_MAX 255 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_DATA4_MIN 0 ++ #define Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_DATA4_MAX 255 ++#endif /* Si2168_DOWNLOAD_DATASET_START_CMD */ ++ ++/* Si2168_DVBC_STATUS command definition */ ++#define Si2168_DVBC_STATUS_CMD 0x90 ++ ++#ifdef Si2168_DVBC_STATUS_CMD ++ #define Si2168_DVBC_STATUS_CMD_CODE 0x010090 ++ ++ typedef struct { /* Si2168_DVBC_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2168_DVBC_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBC_STATUS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char pclint; ++ unsigned char dlint; ++ unsigned char berint; ++ unsigned char uncorint; ++ unsigned char pcl; ++ unsigned char dl; ++ unsigned char ber; ++ unsigned char uncor; ++ unsigned char cnr; ++ int afc_freq; ++ int timing_offset; ++ unsigned char constellation; ++ unsigned char sp_inv; ++ } Si2168_DVBC_STATUS_CMD_REPLY_struct; ++ ++ /* DVBC_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DVBC_STATUS_CMD_INTACK_LSB 0 ++ #define Si2168_DVBC_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2168_DVBC_STATUS_CMD_INTACK_MIN 0 ++ #define Si2168_DVBC_STATUS_CMD_INTACK_MAX 1 ++ #define Si2168_DVBC_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2168_DVBC_STATUS_CMD_INTACK_OK 0 ++ /* DVBC_STATUS command, PCLINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_PCLINT_LSB 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_PCLINT_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_PCLINT_CHANGED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_PCLINT_NO_CHANGE 0 ++ /* DVBC_STATUS command, DLINT field definition (address 1, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_DLINT_LSB 2 ++ #define Si2168_DVBC_STATUS_RESPONSE_DLINT_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_DLINT_CHANGED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_DLINT_NO_CHANGE 0 ++ /* DVBC_STATUS command, BERINT field definition (address 1, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_BERINT_LSB 3 ++ #define Si2168_DVBC_STATUS_RESPONSE_BERINT_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_BERINT_CHANGED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_BERINT_NO_CHANGE 0 ++ /* DVBC_STATUS command, UNCORINT field definition (address 1, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCORINT_LSB 4 ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCORINT_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCORINT_CHANGED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCORINT_NO_CHANGE 0 ++ /* DVBC_STATUS command, PCL field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_PCL_LSB 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_PCL_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_PCL_LOCKED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_PCL_NO_LOCK 0 ++ /* DVBC_STATUS command, DL field definition (address 2, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_DL_LSB 2 ++ #define Si2168_DVBC_STATUS_RESPONSE_DL_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_DL_LOCKED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_DL_NO_LOCK 0 ++ /* DVBC_STATUS command, BER field definition (address 2, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_BER_LSB 3 ++ #define Si2168_DVBC_STATUS_RESPONSE_BER_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_BER_BER_ABOVE 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_BER_BER_BELOW 0 ++ /* DVBC_STATUS command, UNCOR field definition (address 2, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCOR_LSB 4 ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCOR_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCOR_NO_UNCOR_FOUND 0 ++ #define Si2168_DVBC_STATUS_RESPONSE_UNCOR_UNCOR_FOUND 1 ++ /* DVBC_STATUS command, CNR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_CNR_LSB 0 ++ #define Si2168_DVBC_STATUS_RESPONSE_CNR_MASK 0xff ++ /* DVBC_STATUS command, AFC_FREQ field definition (address 4, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_AFC_FREQ_LSB 0 ++ #define Si2168_DVBC_STATUS_RESPONSE_AFC_FREQ_MASK 0xffff ++ #define Si2168_DVBC_STATUS_RESPONSE_AFC_FREQ_SHIFT 16 ++ /* DVBC_STATUS command, TIMING_OFFSET field definition (address 6, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_TIMING_OFFSET_LSB 0 ++ #define Si2168_DVBC_STATUS_RESPONSE_TIMING_OFFSET_MASK 0xffff ++ #define Si2168_DVBC_STATUS_RESPONSE_TIMING_OFFSET_SHIFT 16 ++ /* DVBC_STATUS command, CONSTELLATION field definition (address 8, size 6, lsb 0, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_LSB 0 ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_MASK 0x3f ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_QAM128 10 ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_QAM16 7 ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_QAM256 11 ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_QAM32 8 ++ #define Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_QAM64 9 ++ /* DVBC_STATUS command, SP_INV field definition (address 8, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DVBC_STATUS_RESPONSE_SP_INV_LSB 6 ++ #define Si2168_DVBC_STATUS_RESPONSE_SP_INV_MASK 0x01 ++ #define Si2168_DVBC_STATUS_RESPONSE_SP_INV_INVERTED 1 ++ #define Si2168_DVBC_STATUS_RESPONSE_SP_INV_NORMAL 0 ++ ++#endif /* Si2168_DVBC_STATUS_CMD */ ++ ++ ++ ++/* Si2168_DVBT2_FEF command definition */ ++#define Si2168_DVBT2_FEF_CMD 0x51 ++ ++#ifdef Si2168_DVBT2_FEF_CMD ++ #define Si2168_DVBT2_FEF_CMD_CODE 0x010051 ++ ++ typedef struct { /* Si2168_DVBT2_FEF_CMD_struct */ ++ unsigned char fef_tuner_flag; ++ unsigned char fef_tuner_flag_inv; ++ } Si2168_DVBT2_FEF_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT2_FEF_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char fef_type; ++ unsigned long fef_length; ++ unsigned long fef_repetition; ++ } Si2168_DVBT2_FEF_CMD_REPLY_struct; ++ ++ /* DVBT2_FEF command, FEF_TUNER_FLAG field definition (address 1,size 3, lsb 0, unsigned) */ ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_LSB 0 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MASK 0x07 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MIN 0 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MAX 5 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MP_A 2 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MP_B 3 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MP_C 4 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MP_D 5 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_NOT_USED 1 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_NO_CHANGE 0 ++ /* DVBT2_FEF command, FEF_TUNER_FLAG_INV field definition (address 1,size 1, lsb 3, unsigned) */ ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_LSB 3 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_MASK 0x01 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_MIN 0 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_MAX 1 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_FEF_HIGH 0 ++ #define Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_FEF_LOW 1 ++ /* DVBT2_FEF command, FEF_TYPE field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_FEF_RESPONSE_FEF_TYPE_LSB 0 ++ #define Si2168_DVBT2_FEF_RESPONSE_FEF_TYPE_MASK 0x0f ++ /* DVBT2_FEF command, FEF_LENGTH field definition (address 4, size 32, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_FEF_RESPONSE_FEF_LENGTH_LSB 0 ++ #define Si2168_DVBT2_FEF_RESPONSE_FEF_LENGTH_MASK 0xffffffff ++ /* DVBT2_FEF command, FEF_REPETITION field definition (address 8, size 32, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_FEF_RESPONSE_FEF_REPETITION_LSB 0 ++ #define Si2168_DVBT2_FEF_RESPONSE_FEF_REPETITION_MASK 0xffffffff ++ ++#endif /* Si2168_DVBT2_FEF_CMD */ ++ ++/* Si2168_DVBT2_PLP_INFO command definition */ ++#define Si2168_DVBT2_PLP_INFO_CMD 0x53 ++ ++#ifdef Si2168_DVBT2_PLP_INFO_CMD ++ #define Si2168_DVBT2_PLP_INFO_CMD_CODE 0x010053 ++ ++ typedef struct { /* Si2168_DVBT2_PLP_INFO_CMD_struct */ ++ unsigned char plp_index; ++ } Si2168_DVBT2_PLP_INFO_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT2_PLP_INFO_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char plp_id; ++ unsigned char reserved_1_1; ++ unsigned char in_band_b_flag; ++ unsigned char in_band_a_flag; ++ unsigned char static_flag; ++ unsigned char plp_mode; ++ unsigned char reserved_1_2; ++ unsigned char static_padding_flag; ++ unsigned char plp_payload_type; ++ unsigned char plp_type; ++ unsigned char first_frame_idx_msb; ++ unsigned char first_rf_idx; ++ unsigned char ff_flag; ++ unsigned char plp_group_id_msb; ++ unsigned char first_frame_idx_lsb; ++ unsigned char plp_mod_msb; ++ unsigned char plp_cod; ++ unsigned char plp_group_id_lsb; ++ unsigned char plp_num_blocks_max_msb; ++ unsigned char plp_fec_type; ++ unsigned char plp_rot; ++ unsigned char plp_mod_lsb; ++ unsigned char frame_interval_msb; ++ unsigned char plp_num_blocks_max_lsb; ++ unsigned char time_il_length_msb; ++ unsigned char frame_interval_lsb; ++ unsigned char time_il_type; ++ unsigned char time_il_length_lsb; ++ } Si2168_DVBT2_PLP_INFO_CMD_REPLY_struct; ++ ++ /* DVBT2_PLP_INFO command, PLP_INDEX field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_DVBT2_PLP_INFO_CMD_PLP_INDEX_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_CMD_PLP_INDEX_MASK 0xff ++ #define Si2168_DVBT2_PLP_INFO_CMD_PLP_INDEX_MIN 0 ++ #define Si2168_DVBT2_PLP_INFO_CMD_PLP_INDEX_MAX 255.0 ++ /* DVBT2_PLP_INFO command, PLP_ID field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ID_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ID_MASK 0xff ++ /* DVBT2_PLP_INFO command, RESERVED_1_1 field definition (address 10, size 6, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_1_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_1_MASK 0x3f ++ /* DVBT2_PLP_INFO command, IN_BAND_B_FLAG field definition (address 10, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_B_FLAG_LSB 6 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_B_FLAG_MASK 0x01 ++ /* DVBT2_PLP_INFO command, IN_BAND_A_FLAG field definition (address 10, size 1, lsb 7, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_A_FLAG_LSB 7 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_A_FLAG_MASK 0x01 ++ /* DVBT2_PLP_INFO command, STATIC_FLAG field definition (address 11, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_FLAG_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_FLAG_MASK 0x01 ++ /* DVBT2_PLP_INFO command, PLP_MODE field definition (address 11, size 2, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_LSB 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_MASK 0x03 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_HIGH_EFFICIENCY_MODE 2 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_NORMAL_MODE 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_NOT_SPECIFIED 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_RESERVED 3 ++ /* DVBT2_PLP_INFO command, RESERVED_1_2 field definition (address 11, size 5, lsb 3, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_2_LSB 3 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_2_MASK 0x1f ++ /* DVBT2_PLP_INFO command, STATIC_PADDING_FLAG field definition (address 12, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_PADDING_FLAG_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_PADDING_FLAG_MASK 0x01 ++ /* DVBT2_PLP_INFO command, PLP_PAYLOAD_TYPE field definition (address 2, size 5, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_MASK 0x1f ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_GCS 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_GFPS 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_GSE 2 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_TS 3 ++ /* DVBT2_PLP_INFO command, PLP_TYPE field definition (address 2, size 3, lsb 5, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_LSB 5 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_MASK 0x07 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_COMMON 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_DATA_TYPE1 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_DATA_TYPE2 2 ++ /* DVBT2_PLP_INFO command, FIRST_FRAME_IDX_MSB field definition (address 3, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_MSB_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_MSB_MASK 0x0f ++ /* DVBT2_PLP_INFO command, FIRST_RF_IDX field definition (address 3, size 3, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_RF_IDX_LSB 4 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_RF_IDX_MASK 0x07 ++ /* DVBT2_PLP_INFO command, FF_FLAG field definition (address 3, size 1, lsb 7, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FF_FLAG_LSB 7 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FF_FLAG_MASK 0x01 ++ /* DVBT2_PLP_INFO command, PLP_GROUP_ID_MSB field definition (address 4, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_MSB_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_MSB_MASK 0x0f ++ /* DVBT2_PLP_INFO command, FIRST_FRAME_IDX_LSB field definition (address 4, size 4, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_LSB_LSB 4 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_LSB_MASK 0x0f ++ /* DVBT2_PLP_INFO command, PLP_MOD_MSB field definition (address 5, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_MSB_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_MSB_MASK 0x01 ++ /* DVBT2_PLP_INFO command, PLP_COD field definition (address 5, size 3, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_LSB 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_MASK 0x07 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_1_2 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_2_3 2 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_3_4 3 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_3_5 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_4_5 4 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_5_6 5 ++ /* DVBT2_PLP_INFO command, PLP_GROUP_ID_LSB field definition (address 5, size 4, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_LSB_LSB 4 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_LSB_MASK 0x0f ++ /* DVBT2_PLP_INFO command, PLP_NUM_BLOCKS_MAX_MSB field definition (address 6, size 3, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_MSB_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_MSB_MASK 0x07 ++ /* DVBT2_PLP_INFO command, PLP_FEC_TYPE field definition (address 6, size 2, lsb 3, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_FEC_TYPE_LSB 3 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_FEC_TYPE_MASK 0x03 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_FEC_TYPE_16K_LDPC 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_FEC_TYPE_64K_LDPC 1 ++ /* DVBT2_PLP_INFO command, PLP_ROT field definition (address 6, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ROT_LSB 5 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ROT_MASK 0x01 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ROT_NOT_ROTATED 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ROT_ROTATED 1 ++ /* DVBT2_PLP_INFO command, PLP_MOD_LSB field definition (address 6, size 2, lsb 6, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_LSB_LSB 6 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_LSB_MASK 0x03 ++ /* DVBT2_PLP_INFO command, FRAME_INTERVAL_MSB field definition (address 7, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_MSB_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_MSB_MASK 0x01 ++ /* DVBT2_PLP_INFO command, PLP_NUM_BLOCKS_MAX_LSB field definition (address 7, size 7, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_LSB_LSB 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_LSB_MASK 0x7f ++ /* DVBT2_PLP_INFO command, TIME_IL_LENGTH_MSB field definition (address 8, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_MSB_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_MSB_MASK 0x01 ++ /* DVBT2_PLP_INFO command, FRAME_INTERVAL_LSB field definition (address 8, size 7, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_LSB_LSB 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_LSB_MASK 0x7f ++ /* DVBT2_PLP_INFO command, TIME_IL_TYPE field definition (address 9, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_TYPE_LSB 0 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_TYPE_MASK 0x01 ++ /* DVBT2_PLP_INFO command, TIME_IL_LENGTH_LSB field definition (address 9, size 7, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_LSB_LSB 1 ++ #define Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_LSB_MASK 0x7f ++ ++#endif /* Si2168_DVBT2_PLP_INFO_CMD */ ++ ++/* Si2168_DVBT2_PLP_SELECT command definition */ ++#define Si2168_DVBT2_PLP_SELECT_CMD 0x52 ++ ++#ifdef Si2168_DVBT2_PLP_SELECT_CMD ++ #define Si2168_DVBT2_PLP_SELECT_CMD_CODE 0x010052 ++ ++ typedef struct { /* Si2168_DVBT2_PLP_SELECT_CMD_struct */ ++ unsigned char plp_id; ++ unsigned char plp_id_sel_mode; ++ } Si2168_DVBT2_PLP_SELECT_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT2_PLP_SELECT_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_DVBT2_PLP_SELECT_CMD_REPLY_struct; ++ ++ /* DVBT2_PLP_SELECT command, PLP_ID field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_LSB 0 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_MASK 0xff ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_MIN 0 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_MAX 255.0 ++ /* DVBT2_PLP_SELECT command, PLP_ID_SEL_MODE field definition (address 2,size 1, lsb 0, unsigned) */ ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_LSB 0 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MASK 0x01 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MIN 0 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MAX 1 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_AUTO 0 ++ #define Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MANUAL 1 ++#endif /* Si2168_DVBT2_PLP_SELECT_CMD */ ++ ++/* Si2168_DVBT2_STATUS command definition */ ++#define Si2168_DVBT2_STATUS_CMD 0x50 ++ ++#ifdef Si2168_DVBT2_STATUS_CMD ++ #define Si2168_DVBT2_STATUS_CMD_CODE 0x010050 ++ ++ typedef struct { /* Si2168_DVBT2_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2168_DVBT2_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT2_STATUS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char pclint; ++ unsigned char dlint; ++ unsigned char berint; ++ unsigned char uncorint; ++ unsigned char notdvbt2int; ++ unsigned char num_plp; ++ unsigned char pilot_pattern; ++ unsigned char tx_mode; ++ unsigned char rotated; ++ unsigned char short_frame; ++ unsigned char code_rate; ++ unsigned char plp_id; ++ unsigned char pcl; ++ unsigned char dl; ++ unsigned char ber; ++ unsigned char uncor; ++ unsigned char notdvbt2; ++ unsigned char cnr; ++ int afc_freq; ++ int timing_offset; ++ unsigned char constellation; ++ unsigned char sp_inv; ++ unsigned char fef; ++ unsigned char fft_mode; ++ unsigned char guard_int; ++ unsigned char bw_ext; ++ } Si2168_DVBT2_STATUS_CMD_REPLY_struct; ++ ++ /* DVBT2_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DVBT2_STATUS_CMD_INTACK_LSB 0 ++ #define Si2168_DVBT2_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_CMD_INTACK_MIN 0 ++ #define Si2168_DVBT2_STATUS_CMD_INTACK_MAX 1 ++ #define Si2168_DVBT2_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2168_DVBT2_STATUS_CMD_INTACK_OK 0 ++ /* DVBT2_STATUS command, PCLINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCLINT_LSB 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCLINT_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCLINT_CHANGED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCLINT_NO_CHANGE 0 ++ /* DVBT2_STATUS command, DLINT field definition (address 1, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_DLINT_LSB 2 ++ #define Si2168_DVBT2_STATUS_RESPONSE_DLINT_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_DLINT_CHANGED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_DLINT_NO_CHANGE 0 ++ /* DVBT2_STATUS command, BERINT field definition (address 1, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_BERINT_LSB 3 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BERINT_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BERINT_CHANGED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BERINT_NO_CHANGE 0 ++ /* DVBT2_STATUS command, UNCORINT field definition (address 1, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCORINT_LSB 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCORINT_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCORINT_CHANGED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCORINT_NO_CHANGE 0 ++ /* DVBT2_STATUS command, NOTDVBT2INT field definition (address 1, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2INT_LSB 5 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2INT_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2INT_CHANGED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2INT_NO_CHANGE 0 ++ /* DVBT2_STATUS command, NUM_PLP field definition (address 10, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_NUM_PLP_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NUM_PLP_MASK 0xff ++ /* DVBT2_STATUS command, PILOT_PATTERN field definition (address 11, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_MASK 0x0f ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP1 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP2 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP3 2 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP4 3 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP5 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP6 5 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP7 6 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP8 7 ++ /* DVBT2_STATUS command, TX_MODE field definition (address 11, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_TX_MODE_LSB 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_TX_MODE_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_TX_MODE_MISO 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_TX_MODE_SISO 0 ++ /* DVBT2_STATUS command, ROTATED field definition (address 11, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_ROTATED_LSB 5 ++ #define Si2168_DVBT2_STATUS_RESPONSE_ROTATED_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_ROTATED_NORMAL 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_ROTATED_ROTATED 1 ++ /* DVBT2_STATUS command, SHORT_FRAME field definition (address 11, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_SHORT_FRAME_LSB 6 ++ #define Si2168_DVBT2_STATUS_RESPONSE_SHORT_FRAME_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_SHORT_FRAME_16K_LDPC 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_SHORT_FRAME_64K_LDPC 1 ++ /* DVBT2_STATUS command, CODE_RATE field definition (address 12, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_MASK 0x0f ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_1_2 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_2_3 2 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_3_4 3 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_3_5 13 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_4_5 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_5_6 5 ++ /* DVBT2_STATUS command, PLP_ID field definition (address 13, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_PLP_ID_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PLP_ID_MASK 0xff ++ /* DVBT2_STATUS command, PCL field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCL_LSB 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCL_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCL_LOCKED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_PCL_NO_LOCK 0 ++ /* DVBT2_STATUS command, DL field definition (address 2, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_DL_LSB 2 ++ #define Si2168_DVBT2_STATUS_RESPONSE_DL_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_DL_LOCKED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_DL_NO_LOCK 0 ++ /* DVBT2_STATUS command, BER field definition (address 2, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_BER_LSB 3 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BER_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BER_BER_ABOVE 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BER_BER_BELOW 0 ++ /* DVBT2_STATUS command, UNCOR field definition (address 2, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCOR_LSB 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCOR_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCOR_NO_UNCOR_FOUND 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_UNCOR_UNCOR_FOUND 1 ++ /* DVBT2_STATUS command, NOTDVBT2 field definition (address 2, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2_LSB 5 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2_DVBT2 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2_NOT_DVBT2 1 ++ /* DVBT2_STATUS command, CNR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_CNR_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CNR_MASK 0xff ++ /* DVBT2_STATUS command, AFC_FREQ field definition (address 4, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_AFC_FREQ_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_AFC_FREQ_MASK 0xffff ++ #define Si2168_DVBT2_STATUS_RESPONSE_AFC_FREQ_SHIFT 16 ++ /* DVBT2_STATUS command, TIMING_OFFSET field definition (address 6, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_TIMING_OFFSET_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_TIMING_OFFSET_MASK 0xffff ++ #define Si2168_DVBT2_STATUS_RESPONSE_TIMING_OFFSET_SHIFT 16 ++ /* DVBT2_STATUS command, CONSTELLATION field definition (address 8, size 6, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_MASK 0x3f ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_QAM128 10 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_QAM16 7 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_QAM256 11 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_QAM32 8 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_QAM64 9 ++ #define Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_QPSK 3 ++ /* DVBT2_STATUS command, SP_INV field definition (address 8, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_SP_INV_LSB 6 ++ #define Si2168_DVBT2_STATUS_RESPONSE_SP_INV_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_SP_INV_INVERTED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_SP_INV_NORMAL 0 ++ /* DVBT2_STATUS command, FEF field definition (address 8, size 1, lsb 7, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_FEF_LSB 7 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FEF_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FEF_FEF 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FEF_NO_FEF 0 ++ /* DVBT2_STATUS command, FFT_MODE field definition (address 9, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_LSB 0 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_MASK 0x0f ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_16K 14 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_1K 10 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_2K 11 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_32K 15 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_4K 12 ++ #define Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_8K 13 ++ /* DVBT2_STATUS command, GUARD_INT field definition (address 9, size 3, lsb 4, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_LSB 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_MASK 0x07 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_19_128 6 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_19_256 7 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_128 5 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_16 2 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_32 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_4 4 ++ #define Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_8 3 ++ /* DVBT2_STATUS command, BW_EXT field definition (address 9, size 1, lsb 7, unsigned)*/ ++ #define Si2168_DVBT2_STATUS_RESPONSE_BW_EXT_LSB 7 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BW_EXT_MASK 0x01 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BW_EXT_EXTENDED 1 ++ #define Si2168_DVBT2_STATUS_RESPONSE_BW_EXT_NORMAL 0 ++ ++#endif /* Si2168_DVBT2_STATUS_CMD */ ++ ++/* Si2168_DVBT2_TX_ID command definition */ ++#define Si2168_DVBT2_TX_ID_CMD 0x54 ++ ++#ifdef Si2168_DVBT2_TX_ID_CMD ++ #define Si2168_DVBT2_TX_ID_CMD_CODE 0x010054 ++ ++ typedef struct { /* Si2168_DVBT2_TX_ID_CMD_struct */ ++ unsigned char nothing; } Si2168_DVBT2_TX_ID_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT2_TX_ID_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char tx_id_availability; ++ unsigned int cell_id; ++ unsigned int network_id; ++ unsigned int t2_system_id; ++ } Si2168_DVBT2_TX_ID_CMD_REPLY_struct; ++ ++ /* DVBT2_TX_ID command, TX_ID_AVAILABILITY field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_TX_ID_RESPONSE_TX_ID_AVAILABILITY_LSB 0 ++ #define Si2168_DVBT2_TX_ID_RESPONSE_TX_ID_AVAILABILITY_MASK 0xff ++ /* DVBT2_TX_ID command, CELL_ID field definition (address 2, size 16, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_TX_ID_RESPONSE_CELL_ID_LSB 0 ++ #define Si2168_DVBT2_TX_ID_RESPONSE_CELL_ID_MASK 0xffff ++ /* DVBT2_TX_ID command, NETWORK_ID field definition (address 4, size 16, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_TX_ID_RESPONSE_NETWORK_ID_LSB 0 ++ #define Si2168_DVBT2_TX_ID_RESPONSE_NETWORK_ID_MASK 0xffff ++ /* DVBT2_TX_ID command, T2_SYSTEM_ID field definition (address 6, size 16, lsb 0, unsigned)*/ ++ #define Si2168_DVBT2_TX_ID_RESPONSE_T2_SYSTEM_ID_LSB 0 ++ #define Si2168_DVBT2_TX_ID_RESPONSE_T2_SYSTEM_ID_MASK 0xffff ++ ++#endif /* Si2168_DVBT2_TX_ID_CMD */ ++ ++ ++/* Si2168_DVBT_STATUS command definition */ ++#define Si2168_DVBT_STATUS_CMD 0xa0 ++ ++#ifdef Si2168_DVBT_STATUS_CMD ++ #define Si2168_DVBT_STATUS_CMD_CODE 0x0100a0 ++ ++ typedef struct { /* Si2168_DVBT_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2168_DVBT_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT_STATUS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char pclint; ++ unsigned char dlint; ++ unsigned char berint; ++ unsigned char uncorint; ++ unsigned char notdvbtint; ++ unsigned char fft_mode; ++ unsigned char guard_int; ++ unsigned char hierarchy; ++ char tps_length; ++ unsigned char pcl; ++ unsigned char dl; ++ unsigned char ber; ++ unsigned char uncor; ++ unsigned char notdvbt; ++ unsigned char cnr; ++ int afc_freq; ++ int timing_offset; ++ unsigned char constellation; ++ unsigned char sp_inv; ++ unsigned char rate_hp; ++ unsigned char rate_lp; ++ } Si2168_DVBT_STATUS_CMD_REPLY_struct; ++ ++ /* DVBT_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_DVBT_STATUS_CMD_INTACK_LSB 0 ++ #define Si2168_DVBT_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2168_DVBT_STATUS_CMD_INTACK_MIN 0 ++ #define Si2168_DVBT_STATUS_CMD_INTACK_MAX 1 ++ #define Si2168_DVBT_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2168_DVBT_STATUS_CMD_INTACK_OK 0 ++ /* DVBT_STATUS command, PCLINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_PCLINT_LSB 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_PCLINT_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_PCLINT_CHANGED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_PCLINT_NO_CHANGE 0 ++ /* DVBT_STATUS command, DLINT field definition (address 1, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_DLINT_LSB 2 ++ #define Si2168_DVBT_STATUS_RESPONSE_DLINT_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_DLINT_CHANGED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_DLINT_NO_CHANGE 0 ++ /* DVBT_STATUS command, BERINT field definition (address 1, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_BERINT_LSB 3 ++ #define Si2168_DVBT_STATUS_RESPONSE_BERINT_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_BERINT_CHANGED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_BERINT_NO_CHANGE 0 ++ /* DVBT_STATUS command, UNCORINT field definition (address 1, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCORINT_LSB 4 ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCORINT_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCORINT_CHANGED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCORINT_NO_CHANGE 0 ++ /* DVBT_STATUS command, NOTDVBTINT field definition (address 1, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBTINT_LSB 5 ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBTINT_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBTINT_CHANGED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBTINT_NO_CHANGE 0 ++ /* DVBT_STATUS command, FFT_MODE field definition (address 10, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_MASK 0x0f ++ #define Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_2K 11 ++ #define Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_4K 12 ++ #define Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_8K 13 ++ /* DVBT_STATUS command, GUARD_INT field definition (address 10, size 3, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_LSB 4 ++ #define Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_MASK 0x07 ++ #define Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_1_16 2 ++ #define Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_1_32 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_1_4 4 ++ #define Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_1_8 3 ++ /* DVBT_STATUS command, HIERARCHY field definition (address 11, size 3, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_MASK 0x07 ++ #define Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_ALFA1 2 ++ #define Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_ALFA2 3 ++ #define Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_ALFA4 5 ++ #define Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_NONE 1 ++ /* DVBT_STATUS command, TPS_LENGTH field definition (address 12, size 7, lsb 0, signed)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_TPS_LENGTH_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_TPS_LENGTH_MASK 0x7f ++ #define Si2168_DVBT_STATUS_RESPONSE_TPS_LENGTH_SHIFT 25 ++ /* DVBT_STATUS command, PCL field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_PCL_LSB 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_PCL_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_PCL_LOCKED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_PCL_NO_LOCK 0 ++ /* DVBT_STATUS command, DL field definition (address 2, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_DL_LSB 2 ++ #define Si2168_DVBT_STATUS_RESPONSE_DL_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_DL_LOCKED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_DL_NO_LOCK 0 ++ /* DVBT_STATUS command, BER field definition (address 2, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_BER_LSB 3 ++ #define Si2168_DVBT_STATUS_RESPONSE_BER_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_BER_BER_ABOVE 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_BER_BER_BELOW 0 ++ /* DVBT_STATUS command, UNCOR field definition (address 2, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCOR_LSB 4 ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCOR_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCOR_NO_UNCOR_FOUND 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_UNCOR_UNCOR_FOUND 1 ++ /* DVBT_STATUS command, NOTDVBT field definition (address 2, size 1, lsb 5, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBT_LSB 5 ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBT_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBT_DVBT 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_NOTDVBT_NOT_DVBT 1 ++ /* DVBT_STATUS command, CNR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_CNR_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_CNR_MASK 0xff ++ /* DVBT_STATUS command, AFC_FREQ field definition (address 4, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_AFC_FREQ_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_AFC_FREQ_MASK 0xffff ++ #define Si2168_DVBT_STATUS_RESPONSE_AFC_FREQ_SHIFT 16 ++ /* DVBT_STATUS command, TIMING_OFFSET field definition (address 6, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_TIMING_OFFSET_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_TIMING_OFFSET_MASK 0xffff ++ #define Si2168_DVBT_STATUS_RESPONSE_TIMING_OFFSET_SHIFT 16 ++ /* DVBT_STATUS command, CONSTELLATION field definition (address 8, size 6, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_MASK 0x3f ++ #define Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_QAM16 7 ++ #define Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_QAM64 9 ++ #define Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_QPSK 3 ++ /* DVBT_STATUS command, SP_INV field definition (address 8, size 1, lsb 6, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_SP_INV_LSB 6 ++ #define Si2168_DVBT_STATUS_RESPONSE_SP_INV_MASK 0x01 ++ #define Si2168_DVBT_STATUS_RESPONSE_SP_INV_INVERTED 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_SP_INV_NORMAL 0 ++ /* DVBT_STATUS command, RATE_HP field definition (address 9, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_LSB 0 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_MASK 0x0f ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_1_2 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_2_3 2 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_3_4 3 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_5_6 5 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_HP_7_8 7 ++ /* DVBT_STATUS command, RATE_LP field definition (address 9, size 4, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_LSB 4 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_MASK 0x0f ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_1_2 1 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_2_3 2 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_3_4 3 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_5_6 5 ++ #define Si2168_DVBT_STATUS_RESPONSE_RATE_LP_7_8 7 ++ ++#endif /* Si2168_DVBT_STATUS_CMD */ ++ ++/* Si2168_DVBT_TPS_EXTRA command definition */ ++#define Si2168_DVBT_TPS_EXTRA_CMD 0xa1 ++ ++#ifdef Si2168_DVBT_TPS_EXTRA_CMD ++ #define Si2168_DVBT_TPS_EXTRA_CMD_CODE 0x0100a1 ++ ++ typedef struct { /* Si2168_DVBT_TPS_EXTRA_CMD_struct */ ++ unsigned char nothing; } Si2168_DVBT_TPS_EXTRA_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_DVBT_TPS_EXTRA_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char lptimeslice; ++ unsigned char hptimeslice; ++ unsigned char lpmpefec; ++ unsigned char hpmpefec; ++ unsigned char dvbhinter; ++ int cell_id; ++ unsigned char tps_res1; ++ unsigned char tps_res2; ++ unsigned char tps_res3; ++ unsigned char tps_res4; ++ } Si2168_DVBT_TPS_EXTRA_CMD_REPLY_struct; ++ ++ /* DVBT_TPS_EXTRA command, LPTIMESLICE field definition (address 1, size 1, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPTIMESLICE_LSB 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPTIMESLICE_MASK 0x01 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPTIMESLICE_OFF 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPTIMESLICE_ON 1 ++ /* DVBT_TPS_EXTRA command, HPTIMESLICE field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPTIMESLICE_LSB 1 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPTIMESLICE_MASK 0x01 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPTIMESLICE_OFF 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPTIMESLICE_ON 1 ++ /* DVBT_TPS_EXTRA command, LPMPEFEC field definition (address 1, size 1, lsb 2, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPMPEFEC_LSB 2 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPMPEFEC_MASK 0x01 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPMPEFEC_OFF 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_LPMPEFEC_ON 1 ++ /* DVBT_TPS_EXTRA command, HPMPEFEC field definition (address 1, size 1, lsb 3, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPMPEFEC_LSB 3 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPMPEFEC_MASK 0x01 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPMPEFEC_OFF 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_HPMPEFEC_ON 1 ++ /* DVBT_TPS_EXTRA command, DVBHINTER field definition (address 1, size 1, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_DVBHINTER_LSB 4 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_DVBHINTER_MASK 0x01 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_DVBHINTER_IN_DEPTH 1 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_DVBHINTER_NATIVE 0 ++ /* DVBT_TPS_EXTRA command, CELL_ID field definition (address 2, size 16, lsb 0, signed)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_CELL_ID_LSB 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_CELL_ID_MASK 0xffff ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_CELL_ID_SHIFT 16 ++ /* DVBT_TPS_EXTRA command, TPS_RES1 field definition (address 4, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES1_LSB 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES1_MASK 0x0f ++ /* DVBT_TPS_EXTRA command, TPS_RES2 field definition (address 4, size 4, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES2_LSB 4 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES2_MASK 0x0f ++ /* DVBT_TPS_EXTRA command, TPS_RES3 field definition (address 5, size 4, lsb 0, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES3_LSB 0 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES3_MASK 0x0f ++ /* DVBT_TPS_EXTRA command, TPS_RES4 field definition (address 5, size 4, lsb 4, unsigned)*/ ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES4_LSB 4 ++ #define Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES4_MASK 0x0f ++ ++#endif /* Si2168_DVBT_TPS_EXTRA_CMD */ ++ ++ ++/* Si2168_EXIT_BOOTLOADER command definition */ ++#define Si2168_EXIT_BOOTLOADER_CMD 0x01 ++ ++#ifdef Si2168_EXIT_BOOTLOADER_CMD ++ #define Si2168_EXIT_BOOTLOADER_CMD_CODE 0x010001 ++ ++ typedef struct { /* Si2168_EXIT_BOOTLOADER_CMD_struct */ ++ unsigned char func; ++ unsigned char ctsien; ++ } Si2168_EXIT_BOOTLOADER_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_EXIT_BOOTLOADER_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_EXIT_BOOTLOADER_CMD_REPLY_struct; ++ ++ /* EXIT_BOOTLOADER command, FUNC field definition (address 1,size 4, lsb 0, unsigned) */ ++ #define Si2168_EXIT_BOOTLOADER_CMD_FUNC_LSB 0 ++ #define Si2168_EXIT_BOOTLOADER_CMD_FUNC_MASK 0x0f ++ #define Si2168_EXIT_BOOTLOADER_CMD_FUNC_MIN 0 ++ #define Si2168_EXIT_BOOTLOADER_CMD_FUNC_MAX 1 ++ #define Si2168_EXIT_BOOTLOADER_CMD_FUNC_BOOTLOADER 0 ++ #define Si2168_EXIT_BOOTLOADER_CMD_FUNC_NORMAL 1 ++ /* EXIT_BOOTLOADER command, CTSIEN field definition (address 1,size 1, lsb 7, unsigned) */ ++ #define Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_LSB 7 ++ #define Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_MASK 0x01 ++ #define Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_MIN 0 ++ #define Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_MAX 1 ++ #define Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_OFF 0 ++ #define Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_ON 1 ++#endif /* Si2168_EXIT_BOOTLOADER_CMD */ ++ ++/* Si2168_GET_PROPERTY command definition */ ++#define Si2168_GET_PROPERTY_CMD 0x15 ++ ++#ifdef Si2168_GET_PROPERTY_CMD ++ #define Si2168_GET_PROPERTY_CMD_CODE 0x010015 ++ ++ typedef struct { /* Si2168_GET_PROPERTY_CMD_struct */ ++ unsigned char reserved; ++ unsigned int prop; ++ } Si2168_GET_PROPERTY_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_GET_PROPERTY_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char reserved; ++ unsigned int data; ++ } Si2168_GET_PROPERTY_CMD_REPLY_struct; ++ ++ /* GET_PROPERTY command, RESERVED field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_GET_PROPERTY_CMD_RESERVED_LSB 0 ++ #define Si2168_GET_PROPERTY_CMD_RESERVED_MASK 0xff ++ #define Si2168_GET_PROPERTY_CMD_RESERVED_MIN 0 ++ #define Si2168_GET_PROPERTY_CMD_RESERVED_MAX 0 ++ #define Si2168_GET_PROPERTY_CMD_RESERVED_RESERVED_MIN 0 ++ #define Si2168_GET_PROPERTY_CMD_RESERVED_RESERVED_MAX 0 ++ /* GET_PROPERTY command, PROP field definition (address 2,size 16, lsb 0, unsigned) */ ++ #define Si2168_GET_PROPERTY_CMD_PROP_LSB 0 ++ #define Si2168_GET_PROPERTY_CMD_PROP_MASK 0xffff ++ #define Si2168_GET_PROPERTY_CMD_PROP_MIN 0 ++ #define Si2168_GET_PROPERTY_CMD_PROP_MAX 65535 ++ #define Si2168_GET_PROPERTY_CMD_PROP_PROP_MIN 0 ++ #define Si2168_GET_PROPERTY_CMD_PROP_PROP_MAX 65535 ++ /* GET_PROPERTY command, RESERVED field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_PROPERTY_RESPONSE_RESERVED_LSB 0 ++ #define Si2168_GET_PROPERTY_RESPONSE_RESERVED_MASK 0xff ++ /* GET_PROPERTY command, DATA field definition (address 2, size 16, lsb 0, unsigned)*/ ++ #define Si2168_GET_PROPERTY_RESPONSE_DATA_LSB 0 ++ #define Si2168_GET_PROPERTY_RESPONSE_DATA_MASK 0xffff ++ ++#endif /* Si2168_GET_PROPERTY_CMD */ ++ ++/* Si2168_GET_REV command definition */ ++#define Si2168_GET_REV_CMD 0x11 ++ ++#ifdef Si2168_GET_REV_CMD ++ #define Si2168_GET_REV_CMD_CODE 0x010011 ++ ++ typedef struct { /* Si2168_GET_REV_CMD_struct */ ++ unsigned char nothing; } Si2168_GET_REV_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_GET_REV_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char pn; ++ unsigned char fwmajor; ++ unsigned char fwminor; ++ unsigned int patch; ++ unsigned char cmpmajor; ++ unsigned char cmpminor; ++ unsigned char cmpbuild; ++ unsigned char chiprev; ++ } Si2168_GET_REV_CMD_REPLY_struct; ++ ++ /* GET_REV command, PN field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_PN_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_PN_MASK 0xff ++ /* GET_REV command, FWMAJOR field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_FWMAJOR_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_FWMAJOR_MASK 0xff ++ /* GET_REV command, FWMINOR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_FWMINOR_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_FWMINOR_MASK 0xff ++ /* GET_REV command, PATCH field definition (address 4, size 16, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_PATCH_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_PATCH_MASK 0xffff ++ /* GET_REV command, CMPMAJOR field definition (address 6, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_CMPMAJOR_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_CMPMAJOR_MASK 0xff ++ /* GET_REV command, CMPMINOR field definition (address 7, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_CMPMINOR_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_CMPMINOR_MASK 0xff ++ /* GET_REV command, CMPBUILD field definition (address 8, size 8, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_CMPBUILD_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_CMPBUILD_MASK 0xff ++ #define Si2168_GET_REV_RESPONSE_CMPBUILD_CMPBUILD_MIN 0 ++ #define Si2168_GET_REV_RESPONSE_CMPBUILD_CMPBUILD_MAX 255 ++ /* GET_REV command, CHIPREV field definition (address 9, size 4, lsb 0, unsigned)*/ ++ #define Si2168_GET_REV_RESPONSE_CHIPREV_LSB 0 ++ #define Si2168_GET_REV_RESPONSE_CHIPREV_MASK 0x0f ++ #define Si2168_GET_REV_RESPONSE_CHIPREV_A 1 ++ #define Si2168_GET_REV_RESPONSE_CHIPREV_B 2 ++ ++#endif /* Si2168_GET_REV_CMD */ ++ ++/* Si2168_I2C_PASSTHROUGH command definition */ ++#define Si2168_I2C_PASSTHROUGH_CMD 0xc0 ++ ++#ifdef Si2168_I2C_PASSTHROUGH_CMD ++ #define Si2168_I2C_PASSTHROUGH_CMD_CODE 0x0100c0 ++ ++ typedef struct { /* Si2168_I2C_PASSTHROUGH_CMD_struct */ ++ unsigned char subcode; ++ unsigned char i2c_passthru; ++ unsigned char reserved; ++ } Si2168_I2C_PASSTHROUGH_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_I2C_PASSTHROUGH_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_I2C_PASSTHROUGH_CMD_REPLY_struct; ++ ++ /* I2C_PASSTHROUGH command, SUBCODE field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_LSB 0 ++ #define Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_MASK 0xff ++ #define Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_MIN 13 ++ #define Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_MAX 13 ++ #define Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_CODE 13 ++ /* I2C_PASSTHROUGH command, I2C_PASSTHRU field definition (address 2,size 1, lsb 0, unsigned) */ ++ #define Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_LSB 0 ++ #define Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_MASK 0x01 ++ #define Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_MIN 0 ++ #define Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_MAX 1 ++ #define Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_CLOSE 1 ++ #define Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_OPEN 0 ++ /* I2C_PASSTHROUGH command, RESERVED field definition (address 2,size 7, lsb 1, unsigned) */ ++ #define Si2168_I2C_PASSTHROUGH_CMD_RESERVED_LSB 1 ++ #define Si2168_I2C_PASSTHROUGH_CMD_RESERVED_MASK 0x7f ++ #define Si2168_I2C_PASSTHROUGH_CMD_RESERVED_MIN 0 ++ #define Si2168_I2C_PASSTHROUGH_CMD_RESERVED_MAX 0 ++ #define Si2168_I2C_PASSTHROUGH_CMD_RESERVED_RESERVED 0 ++#endif /* Si2168_I2C_PASSTHROUGH_CMD */ ++ ++/* Si2168_PART_INFO command definition */ ++#define Si2168_PART_INFO_CMD 0x02 ++ ++#ifdef Si2168_PART_INFO_CMD ++ #define Si2168_PART_INFO_CMD_CODE 0x010002 ++ ++ typedef struct { /* Si2168_PART_INFO_CMD_struct */ ++ unsigned char nothing; } Si2168_PART_INFO_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_PART_INFO_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char chiprev; ++ unsigned char romid; ++ unsigned char part; ++ unsigned char pmajor; ++ unsigned char pminor; ++ unsigned char pbuild; ++ unsigned int reserved; ++ unsigned long serial; ++ } Si2168_PART_INFO_CMD_REPLY_struct; ++ ++ /* PART_INFO command, CHIPREV field definition (address 1, size 4, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_CHIPREV_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_CHIPREV_MASK 0x0f ++ #define Si2168_PART_INFO_RESPONSE_CHIPREV_A 1 ++ #define Si2168_PART_INFO_RESPONSE_CHIPREV_B 2 ++ /* PART_INFO command, ROMID field definition (address 12, size 8, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_ROMID_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_ROMID_MASK 0xff ++ /* PART_INFO command, PART field definition (address 2, size 8, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_PART_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_PART_MASK 0xff ++ /* PART_INFO command, PMAJOR field definition (address 3, size 8, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_PMAJOR_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_PMAJOR_MASK 0xff ++ /* PART_INFO command, PMINOR field definition (address 4, size 8, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_PMINOR_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_PMINOR_MASK 0xff ++ /* PART_INFO command, PBUILD field definition (address 5, size 8, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_PBUILD_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_PBUILD_MASK 0xff ++ /* PART_INFO command, RESERVED field definition (address 6, size 16, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_RESERVED_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_RESERVED_MASK 0xffff ++ /* PART_INFO command, SERIAL field definition (address 8, size 32, lsb 0, unsigned)*/ ++ #define Si2168_PART_INFO_RESPONSE_SERIAL_LSB 0 ++ #define Si2168_PART_INFO_RESPONSE_SERIAL_MASK 0xffffffff ++ ++#endif /* Si2168_PART_INFO_CMD */ ++ ++/* Si2168_POWER_DOWN command definition */ ++#define Si2168_POWER_DOWN_CMD 0x13 ++ ++#ifdef Si2168_POWER_DOWN_CMD ++ #define Si2168_POWER_DOWN_CMD_CODE 0x010013 ++ ++ typedef struct { /* Si2168_POWER_DOWN_CMD_struct */ ++ unsigned char nothing; } Si2168_POWER_DOWN_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_POWER_DOWN_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_POWER_DOWN_CMD_REPLY_struct; ++ ++#endif /* Si2168_POWER_DOWN_CMD */ ++ ++/* Si2168_POWER_UP command definition */ ++#define Si2168_POWER_UP_CMD 0xc0 ++ ++#ifdef Si2168_POWER_UP_CMD ++ #define Si2168_POWER_UP_CMD_CODE 0x0200c0 ++ ++ typedef struct { /* Si2168_POWER_UP_CMD_struct */ ++ unsigned char subcode; ++ unsigned char reset; ++ unsigned char reserved2; ++ unsigned char reserved4; ++ unsigned char reserved1; ++ unsigned char addr_mode; ++ unsigned char reserved5; ++ unsigned char func; ++ unsigned char clock_freq; ++ unsigned char ctsien; ++ unsigned char wake_up; ++ } Si2168_POWER_UP_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_POWER_UP_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_POWER_UP_CMD_REPLY_struct; ++ ++ /* POWER_UP command, SUBCODE field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_SUBCODE_LSB 0 ++ #define Si2168_POWER_UP_CMD_SUBCODE_MASK 0xff ++ #define Si2168_POWER_UP_CMD_SUBCODE_MIN 6 ++ #define Si2168_POWER_UP_CMD_SUBCODE_MAX 6 ++ #define Si2168_POWER_UP_CMD_SUBCODE_CODE 6 ++ /* POWER_UP command, RESET field definition (address 2,size 8, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_RESET_LSB 0 ++ #define Si2168_POWER_UP_CMD_RESET_MASK 0xff ++ #define Si2168_POWER_UP_CMD_RESET_MIN 1 ++ #define Si2168_POWER_UP_CMD_RESET_MAX 8 ++ #define Si2168_POWER_UP_CMD_RESET_RESET 1 ++ #define Si2168_POWER_UP_CMD_RESET_RESUME 8 ++ /* POWER_UP command, RESERVED2 field definition (address 3,size 8, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_RESERVED2_LSB 0 ++ #define Si2168_POWER_UP_CMD_RESERVED2_MASK 0xff ++ #define Si2168_POWER_UP_CMD_RESERVED2_MIN 15 ++ #define Si2168_POWER_UP_CMD_RESERVED2_MAX 15 ++ #define Si2168_POWER_UP_CMD_RESERVED2_RESERVED 15 ++ /* POWER_UP command, RESERVED4 field definition (address 4,size 8, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_RESERVED4_LSB 0 ++ #define Si2168_POWER_UP_CMD_RESERVED4_MASK 0xff ++ #define Si2168_POWER_UP_CMD_RESERVED4_MIN 0 ++ #define Si2168_POWER_UP_CMD_RESERVED4_MAX 0 ++ #define Si2168_POWER_UP_CMD_RESERVED4_RESERVED 0 ++ /* POWER_UP command, RESERVED1 field definition (address 5,size 4, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_RESERVED1_LSB 0 ++ #define Si2168_POWER_UP_CMD_RESERVED1_MASK 0x0f ++ #define Si2168_POWER_UP_CMD_RESERVED1_MIN 0 ++ #define Si2168_POWER_UP_CMD_RESERVED1_MAX 0 ++ #define Si2168_POWER_UP_CMD_RESERVED1_RESERVED 0 ++ /* POWER_UP command, ADDR_MODE field definition (address 5,size 1, lsb 4, unsigned) */ ++ #define Si2168_POWER_UP_CMD_ADDR_MODE_LSB 4 ++ #define Si2168_POWER_UP_CMD_ADDR_MODE_MASK 0x01 ++ #define Si2168_POWER_UP_CMD_ADDR_MODE_MIN 0 ++ #define Si2168_POWER_UP_CMD_ADDR_MODE_MAX 1 ++ #define Si2168_POWER_UP_CMD_ADDR_MODE_CAPTURE 1 ++ #define Si2168_POWER_UP_CMD_ADDR_MODE_CURRENT 0 ++ /* POWER_UP command, RESERVED5 field definition (address 5,size 1, lsb 5, unsigned) */ ++ #define Si2168_POWER_UP_CMD_RESERVED5_LSB 5 ++ #define Si2168_POWER_UP_CMD_RESERVED5_MASK 0x01 ++ #define Si2168_POWER_UP_CMD_RESERVED5_MIN 1 ++ #define Si2168_POWER_UP_CMD_RESERVED5_MAX 1 ++ #define Si2168_POWER_UP_CMD_RESERVED5_RESERVED 1 ++ /* POWER_UP command, FUNC field definition (address 6,size 4, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_FUNC_LSB 0 ++ #define Si2168_POWER_UP_CMD_FUNC_MASK 0x0f ++ #define Si2168_POWER_UP_CMD_FUNC_MIN 0 ++ #define Si2168_POWER_UP_CMD_FUNC_MAX 1 ++ #define Si2168_POWER_UP_CMD_FUNC_BOOTLOADER 0 ++ #define Si2168_POWER_UP_CMD_FUNC_NORMAL 1 ++ /* POWER_UP command, CLOCK_FREQ field definition (address 6,size 3, lsb 4, unsigned) */ ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_LSB 4 ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_MASK 0x07 ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_MIN 0 ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_MAX 4 ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_16MHZ 0 ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_24MHZ 2 ++ #define Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_27MHZ 3 ++ /* POWER_UP command, CTSIEN field definition (address 6,size 1, lsb 7, unsigned) */ ++ #define Si2168_POWER_UP_CMD_CTSIEN_LSB 7 ++ #define Si2168_POWER_UP_CMD_CTSIEN_MASK 0x01 ++ #define Si2168_POWER_UP_CMD_CTSIEN_MIN 0 ++ #define Si2168_POWER_UP_CMD_CTSIEN_MAX 1 ++ #define Si2168_POWER_UP_CMD_CTSIEN_DISABLE 0 ++ #define Si2168_POWER_UP_CMD_CTSIEN_ENABLE 1 ++ /* POWER_UP command, WAKE_UP field definition (address 7,size 1, lsb 0, unsigned) */ ++ #define Si2168_POWER_UP_CMD_WAKE_UP_LSB 0 ++ #define Si2168_POWER_UP_CMD_WAKE_UP_MASK 0x01 ++ #define Si2168_POWER_UP_CMD_WAKE_UP_MIN 1 ++ #define Si2168_POWER_UP_CMD_WAKE_UP_MAX 1 ++ #define Si2168_POWER_UP_CMD_WAKE_UP_WAKE_UP 1 ++#endif /* Si2168_POWER_UP_CMD */ ++ ++/* Si2168_RSSI_ADC command definition */ ++#define Si2168_RSSI_ADC_CMD 0x17 ++ ++#ifdef Si2168_RSSI_ADC_CMD ++ #define Si2168_RSSI_ADC_CMD_CODE 0x010017 ++ ++ typedef struct { /* Si2168_RSSI_ADC_CMD_struct */ ++ unsigned char on_off; ++ } Si2168_RSSI_ADC_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_RSSI_ADC_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char level; ++ } Si2168_RSSI_ADC_CMD_REPLY_struct; ++ ++ /* RSSI_ADC command, ON_OFF field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_RSSI_ADC_CMD_ON_OFF_LSB 0 ++ #define Si2168_RSSI_ADC_CMD_ON_OFF_MASK 0x01 ++ #define Si2168_RSSI_ADC_CMD_ON_OFF_MIN 0 ++ #define Si2168_RSSI_ADC_CMD_ON_OFF_MAX 1 ++ #define Si2168_RSSI_ADC_CMD_ON_OFF_OFF 0 ++ #define Si2168_RSSI_ADC_CMD_ON_OFF_ON 1 ++ /* RSSI_ADC command, LEVEL field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_RSSI_ADC_RESPONSE_LEVEL_LSB 0 ++ #define Si2168_RSSI_ADC_RESPONSE_LEVEL_MASK 0xff ++ ++#endif /* Si2168_RSSI_ADC_CMD */ ++ ++/* Si2168_SCAN_CTRL command definition */ ++#define Si2168_SCAN_CTRL_CMD 0x31 ++ ++#ifdef Si2168_SCAN_CTRL_CMD ++ #define Si2168_SCAN_CTRL_CMD_CODE 0x010031 ++ ++ typedef struct { /* Si2168_SCAN_CTRL_CMD_struct */ ++ unsigned char action; ++ unsigned long tuned_rf_freq; ++ } Si2168_SCAN_CTRL_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_SCAN_CTRL_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_SCAN_CTRL_CMD_REPLY_struct; ++ ++ /* SCAN_CTRL command, ACTION field definition (address 1,size 4, lsb 0, unsigned) */ ++ #define Si2168_SCAN_CTRL_CMD_ACTION_LSB 0 ++ #define Si2168_SCAN_CTRL_CMD_ACTION_MASK 0x0f ++ #define Si2168_SCAN_CTRL_CMD_ACTION_MIN 1 ++ #define Si2168_SCAN_CTRL_CMD_ACTION_MAX 3 ++ #define Si2168_SCAN_CTRL_CMD_ACTION_ABORT 3 ++ #define Si2168_SCAN_CTRL_CMD_ACTION_RESUME 2 ++ #define Si2168_SCAN_CTRL_CMD_ACTION_START 1 ++ /* SCAN_CTRL command, TUNED_RF_FREQ field definition (address 4,size 32, lsb 0, unsigned) */ ++ #define Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_LSB 0 ++ #define Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MASK 0xffffffff ++ #define Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MIN 0 ++ #define Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MAX 4294967 ++ #define Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_TUNED_RF_FREQ_MIN 0 ++ #define Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_TUNED_RF_FREQ_MAX 4294967 ++#endif /* Si2168_SCAN_CTRL_CMD */ ++ ++/* Si2168_SCAN_STATUS command definition */ ++#define Si2168_SCAN_STATUS_CMD 0x30 ++ ++#ifdef Si2168_SCAN_STATUS_CMD ++ #define Si2168_SCAN_STATUS_CMD_CODE 0x010030 ++ ++ typedef struct { /* Si2168_SCAN_STATUS_CMD_struct */ ++ unsigned char intack; ++ } Si2168_SCAN_STATUS_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_SCAN_STATUS_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char buzint; ++ unsigned char reqint; ++ unsigned char modulation; ++ unsigned char buz; ++ unsigned char req; ++ unsigned char scan_status; ++ unsigned long rf_freq; ++ unsigned int symb_rate; ++ } Si2168_SCAN_STATUS_CMD_REPLY_struct; ++ ++ /* SCAN_STATUS command, INTACK field definition (address 1,size 1, lsb 0, unsigned) */ ++ #define Si2168_SCAN_STATUS_CMD_INTACK_LSB 0 ++ #define Si2168_SCAN_STATUS_CMD_INTACK_MASK 0x01 ++ #define Si2168_SCAN_STATUS_CMD_INTACK_MIN 0 ++ #define Si2168_SCAN_STATUS_CMD_INTACK_MAX 1 ++ #define Si2168_SCAN_STATUS_CMD_INTACK_CLEAR 1 ++ #define Si2168_SCAN_STATUS_CMD_INTACK_OK 0 ++ /* SCAN_STATUS command, BUZINT field definition (address 1, size 1, lsb 0, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZINT_LSB 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZINT_MASK 0x01 ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZINT_CHANGED 1 ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZINT_NO_CHANGE 0 ++ /* SCAN_STATUS command, REQINT field definition (address 1, size 1, lsb 1, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_REQINT_LSB 1 ++ #define Si2168_SCAN_STATUS_RESPONSE_REQINT_MASK 0x01 ++ #define Si2168_SCAN_STATUS_RESPONSE_REQINT_CHANGED 1 ++ #define Si2168_SCAN_STATUS_RESPONSE_REQINT_NO_CHANGE 0 ++ /* SCAN_STATUS command, MODULATION field definition (address 10, size 4, lsb 0, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_LSB 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_MASK 0x0f ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_DSS 10 ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_DVBC 3 ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_DVBS 8 ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_DVBS2 9 ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_DVBT 2 ++ #define Si2168_SCAN_STATUS_RESPONSE_MODULATION_DVBT2 7 ++ /* SCAN_STATUS command, BUZ field definition (address 2, size 1, lsb 0, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZ_LSB 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZ_MASK 0x01 ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZ_BUSY 1 ++ #define Si2168_SCAN_STATUS_RESPONSE_BUZ_CTS 0 ++ /* SCAN_STATUS command, REQ field definition (address 2, size 1, lsb 1, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_REQ_LSB 1 ++ #define Si2168_SCAN_STATUS_RESPONSE_REQ_MASK 0x01 ++ #define Si2168_SCAN_STATUS_RESPONSE_REQ_NO_REQUEST 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_REQ_REQUEST 1 ++ /* SCAN_STATUS command, SCAN_STATUS field definition (address 3, size 6, lsb 0, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_LSB 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_MASK 0x3f ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_ANALOG_CHANNEL_FOUND 6 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_DEBUG 63 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_DIGITAL_CHANNEL_FOUND 5 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_ENDED 2 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_ERROR 3 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_IDLE 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_SEARCHING 1 ++ #define Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_TUNE_REQUEST 4 ++ /* SCAN_STATUS command, RF_FREQ field definition (address 4, size 32, lsb 0, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_RF_FREQ_LSB 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_RF_FREQ_MASK 0xffffffff ++ /* SCAN_STATUS command, SYMB_RATE field definition (address 8, size 16, lsb 0, unsigned)*/ ++ #define Si2168_SCAN_STATUS_RESPONSE_SYMB_RATE_LSB 0 ++ #define Si2168_SCAN_STATUS_RESPONSE_SYMB_RATE_MASK 0xffff ++ ++#endif /* Si2168_SCAN_STATUS_CMD */ ++ ++/* Si2168_SET_PROPERTY command definition */ ++#define Si2168_SET_PROPERTY_CMD 0x14 ++ ++#ifdef Si2168_SET_PROPERTY_CMD ++ #define Si2168_SET_PROPERTY_CMD_CODE 0x010014 ++ ++ typedef struct { /* Si2168_SET_PROPERTY_CMD_struct */ ++ unsigned char reserved; ++ unsigned int prop; ++ unsigned int data; ++ } Si2168_SET_PROPERTY_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_SET_PROPERTY_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ unsigned char reserved; ++ unsigned int data; ++ } Si2168_SET_PROPERTY_CMD_REPLY_struct; ++ ++ /* SET_PROPERTY command, RESERVED field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_SET_PROPERTY_CMD_RESERVED_LSB 0 ++ #define Si2168_SET_PROPERTY_CMD_RESERVED_MASK 0xff ++ #define Si2168_SET_PROPERTY_CMD_RESERVED_MIN 0 ++ #define Si2168_SET_PROPERTY_CMD_RESERVED_MAX 255.0 ++ /* SET_PROPERTY command, PROP field definition (address 2,size 16, lsb 0, unsigned) */ ++ #define Si2168_SET_PROPERTY_CMD_PROP_LSB 0 ++ #define Si2168_SET_PROPERTY_CMD_PROP_MASK 0xffff ++ #define Si2168_SET_PROPERTY_CMD_PROP_MIN 0 ++ #define Si2168_SET_PROPERTY_CMD_PROP_MAX 65535 ++ #define Si2168_SET_PROPERTY_CMD_PROP_PROP_MIN 0 ++ #define Si2168_SET_PROPERTY_CMD_PROP_PROP_MAX 65535 ++ /* SET_PROPERTY command, DATA field definition (address 4,size 16, lsb 0, unsigned) */ ++ #define Si2168_SET_PROPERTY_CMD_DATA_LSB 0 ++ #define Si2168_SET_PROPERTY_CMD_DATA_MASK 0xffff ++ #define Si2168_SET_PROPERTY_CMD_DATA_MIN 0 ++ #define Si2168_SET_PROPERTY_CMD_DATA_MAX 65535 ++ #define Si2168_SET_PROPERTY_CMD_DATA_DATA_MIN 0 ++ #define Si2168_SET_PROPERTY_CMD_DATA_DATA_MAX 65535 ++ /* SET_PROPERTY command, RESERVED field definition (address 1, size 8, lsb 0, unsigned)*/ ++ #define Si2168_SET_PROPERTY_RESPONSE_RESERVED_LSB 0 ++ #define Si2168_SET_PROPERTY_RESPONSE_RESERVED_MASK 0xff ++ #define Si2168_SET_PROPERTY_RESPONSE_RESERVED_RESERVED_MIN 0 ++ #define Si2168_SET_PROPERTY_RESPONSE_RESERVED_RESERVED_MAX 0 ++ /* SET_PROPERTY command, DATA field definition (address 2, size 16, lsb 0, unsigned)*/ ++ #define Si2168_SET_PROPERTY_RESPONSE_DATA_LSB 0 ++ #define Si2168_SET_PROPERTY_RESPONSE_DATA_MASK 0xffff ++ ++#endif /* Si2168_SET_PROPERTY_CMD */ ++ ++/* Si2168_START_CLK command definition */ ++#define Si2168_START_CLK_CMD 0xc0 ++ ++#ifdef Si2168_START_CLK_CMD ++ #define Si2168_START_CLK_CMD_CODE 0x0300c0 ++ ++ typedef struct { /* Si2168_START_CLK_CMD_struct */ ++ unsigned char subcode; ++ unsigned char reserved1; ++ unsigned char tune_cap; ++ unsigned char reserved2; ++ unsigned int clk_mode; ++ unsigned char reserved3; ++ unsigned char reserved4; ++ unsigned char start_clk; ++ } Si2168_START_CLK_CMD_struct; ++ ++ ++ typedef struct { /* Si2168_START_CLK_CMD_REPLY_struct */ ++ Si2168_COMMON_REPLY_struct * STATUS; ++ } Si2168_START_CLK_CMD_REPLY_struct; ++ ++ /* START_CLK command, SUBCODE field definition (address 1,size 8, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_SUBCODE_LSB 0 ++ #define Si2168_START_CLK_CMD_SUBCODE_MASK 0xff ++ #define Si2168_START_CLK_CMD_SUBCODE_MIN 18 ++ #define Si2168_START_CLK_CMD_SUBCODE_MAX 18 ++ #define Si2168_START_CLK_CMD_SUBCODE_CODE 18 ++ /* START_CLK command, RESERVED1 field definition (address 2,size 8, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_RESERVED1_LSB 0 ++ #define Si2168_START_CLK_CMD_RESERVED1_MASK 0xff ++ #define Si2168_START_CLK_CMD_RESERVED1_MIN 0 ++ #define Si2168_START_CLK_CMD_RESERVED1_MAX 0 ++ #define Si2168_START_CLK_CMD_RESERVED1_RESERVED 0 ++ /* START_CLK command, TUNE_CAP field definition (address 3,size 4, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_TUNE_CAP_LSB 0 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_MASK 0x0f ++ #define Si2168_START_CLK_CMD_TUNE_CAP_MIN 0 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_MAX 15 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_10P4 8 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_11P7 9 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_13P0 10 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_14P3 11 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_15P6 12 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_16P9 13 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_18P2 14 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_19P5 15 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_1P3 1 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_2P6 2 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_3P9 3 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_5P2 4 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_6P5 5 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_7P8 6 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_9P1 7 ++ #define Si2168_START_CLK_CMD_TUNE_CAP_EXT_CLK 0 ++ /* START_CLK command, RESERVED2 field definition (address 3,size 4, lsb 4, unsigned) */ ++ #define Si2168_START_CLK_CMD_RESERVED2_LSB 4 ++ #define Si2168_START_CLK_CMD_RESERVED2_MASK 0x0f ++ #define Si2168_START_CLK_CMD_RESERVED2_MIN 0 ++ #define Si2168_START_CLK_CMD_RESERVED2_MAX 0 ++ #define Si2168_START_CLK_CMD_RESERVED2_RESERVED 0 ++ /* START_CLK command, CLK_MODE field definition (address 4,size 12, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_CLK_MODE_LSB 0 ++ #define Si2168_START_CLK_CMD_CLK_MODE_MASK 0xfff ++ #define Si2168_START_CLK_CMD_CLK_MODE_MIN 575 ++ #define Si2168_START_CLK_CMD_CLK_MODE_MAX 3328 ++ #define Si2168_START_CLK_CMD_CLK_MODE_CLK_CLKIO 3328 ++ #define Si2168_START_CLK_CMD_CLK_MODE_CLK_XTAL_IN 1536 ++ #define Si2168_START_CLK_CMD_CLK_MODE_XTAL 575 ++ /* START_CLK command, RESERVED3 field definition (address 6,size 8, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_RESERVED3_LSB 0 ++ #define Si2168_START_CLK_CMD_RESERVED3_MASK 0xff ++ #define Si2168_START_CLK_CMD_RESERVED3_MIN 22 ++ #define Si2168_START_CLK_CMD_RESERVED3_MAX 22 ++ #define Si2168_START_CLK_CMD_RESERVED3_RESERVED 22 ++ /* START_CLK command, RESERVED4 field definition (address 7,size 1, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_RESERVED4_LSB 0 ++ #define Si2168_START_CLK_CMD_RESERVED4_MASK 0x01 ++ #define Si2168_START_CLK_CMD_RESERVED4_MIN 0 ++ #define Si2168_START_CLK_CMD_RESERVED4_MAX 0 ++ #define Si2168_START_CLK_CMD_RESERVED4_RESERVED 0 ++ /* START_CLK command, START_CLK field definition (address 12,size 1, lsb 0, unsigned) */ ++ #define Si2168_START_CLK_CMD_START_CLK_LSB 0 ++ #define Si2168_START_CLK_CMD_START_CLK_MASK 0x01 ++ #define Si2168_START_CLK_CMD_START_CLK_MIN 0 ++ #define Si2168_START_CLK_CMD_START_CLK_MAX 0 ++ #define Si2168_START_CLK_CMD_START_CLK_START_CLK 0 ++#endif /* Si2168_START_CLK_CMD */ ++ ++/* _commands_defines_insertion_point */ ++ ++/* _commands_struct_insertion_start */ ++ ++ /* --------------------------------------------*/ ++ /* COMMANDS STRUCT */ ++ /* This is used to store all command fields */ ++ /* --------------------------------------------*/ ++ typedef struct { /* Si2168_CmdObj struct */ ++ #ifdef Si2168_CONFIG_CLKIO_CMD ++ Si2168_CONFIG_CLKIO_CMD_struct config_clkio; ++ #endif /* Si2168_CONFIG_CLKIO_CMD */ ++ #ifdef Si2168_CONFIG_PINS_CMD ++ Si2168_CONFIG_PINS_CMD_struct config_pins; ++ #endif /* Si2168_CONFIG_PINS_CMD */ ++ #ifdef Si2168_DD_BER_CMD ++ Si2168_DD_BER_CMD_struct dd_ber; ++ #endif /* Si2168_DD_BER_CMD */ ++ #ifdef Si2168_DD_CBER_CMD ++ Si2168_DD_CBER_CMD_struct dd_cber; ++ #endif /* Si2168_DD_CBER_CMD */ ++ ++ #ifdef Si2168_DD_EXT_AGC_TER_CMD ++ Si2168_DD_EXT_AGC_TER_CMD_struct dd_ext_agc_ter; ++ #endif /* Si2168_DD_EXT_AGC_TER_CMD */ ++ ++ #ifdef Si2168_DD_FER_CMD ++ Si2168_DD_FER_CMD_struct dd_fer; ++ #endif /* Si2168_DD_FER_CMD */ ++ #ifdef Si2168_DD_GET_REG_CMD ++ Si2168_DD_GET_REG_CMD_struct dd_get_reg; ++ #endif /* Si2168_DD_GET_REG_CMD */ ++ #ifdef Si2168_DD_MP_DEFAULTS_CMD ++ Si2168_DD_MP_DEFAULTS_CMD_struct dd_mp_defaults; ++ #endif /* Si2168_DD_MP_DEFAULTS_CMD */ ++ #ifdef Si2168_DD_PER_CMD ++ Si2168_DD_PER_CMD_struct dd_per; ++ #endif /* Si2168_DD_PER_CMD */ ++ #ifdef Si2168_DD_RESTART_CMD ++ Si2168_DD_RESTART_CMD_struct dd_restart; ++ #endif /* Si2168_DD_RESTART_CMD */ ++ #ifdef Si2168_DD_SET_REG_CMD ++ Si2168_DD_SET_REG_CMD_struct dd_set_reg; ++ #endif /* Si2168_DD_SET_REG_CMD */ ++ #ifdef Si2168_DD_SSI_SQI_CMD ++ Si2168_DD_SSI_SQI_CMD_struct dd_ssi_sqi; ++ #endif /* Si2168_DD_SSI_SQI_CMD */ ++ #ifdef Si2168_DD_STATUS_CMD ++ Si2168_DD_STATUS_CMD_struct dd_status; ++ #endif /* Si2168_DD_STATUS_CMD */ ++ #ifdef Si2168_DD_UNCOR_CMD ++ Si2168_DD_UNCOR_CMD_struct dd_uncor; ++ #endif /* Si2168_DD_UNCOR_CMD */ ++ #ifdef Si2168_DOWNLOAD_DATASET_CONTINUE_CMD ++ Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_struct download_dataset_continue; ++ #endif /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD */ ++ #ifdef Si2168_DOWNLOAD_DATASET_START_CMD ++ Si2168_DOWNLOAD_DATASET_START_CMD_struct download_dataset_start; ++ #endif /* Si2168_DOWNLOAD_DATASET_START_CMD */ ++ #ifdef Si2168_DVBC_STATUS_CMD ++ Si2168_DVBC_STATUS_CMD_struct dvbc_status; ++ #endif /* Si2168_DVBC_STATUS_CMD */ ++ ++ ++ #ifdef Si2168_DVBT2_FEF_CMD ++ Si2168_DVBT2_FEF_CMD_struct dvbt2_fef; ++ #endif /* Si2168_DVBT2_FEF_CMD */ ++ #ifdef Si2168_DVBT2_PLP_INFO_CMD ++ Si2168_DVBT2_PLP_INFO_CMD_struct dvbt2_plp_info; ++ #endif /* Si2168_DVBT2_PLP_INFO_CMD */ ++ #ifdef Si2168_DVBT2_PLP_SELECT_CMD ++ Si2168_DVBT2_PLP_SELECT_CMD_struct dvbt2_plp_select; ++ #endif /* Si2168_DVBT2_PLP_SELECT_CMD */ ++ #ifdef Si2168_DVBT2_STATUS_CMD ++ Si2168_DVBT2_STATUS_CMD_struct dvbt2_status; ++ #endif /* Si2168_DVBT2_STATUS_CMD */ ++ #ifdef Si2168_DVBT2_TX_ID_CMD ++ Si2168_DVBT2_TX_ID_CMD_struct dvbt2_tx_id; ++ #endif /* Si2168_DVBT2_TX_ID_CMD */ ++ ++ #ifdef Si2168_DVBT_STATUS_CMD ++ Si2168_DVBT_STATUS_CMD_struct dvbt_status; ++ #endif /* Si2168_DVBT_STATUS_CMD */ ++ #ifdef Si2168_DVBT_TPS_EXTRA_CMD ++ Si2168_DVBT_TPS_EXTRA_CMD_struct dvbt_tps_extra; ++ #endif /* Si2168_DVBT_TPS_EXTRA_CMD */ ++ ++ #ifdef Si2168_EXIT_BOOTLOADER_CMD ++ Si2168_EXIT_BOOTLOADER_CMD_struct exit_bootloader; ++ #endif /* Si2168_EXIT_BOOTLOADER_CMD */ ++ #ifdef Si2168_GET_PROPERTY_CMD ++ Si2168_GET_PROPERTY_CMD_struct get_property; ++ #endif /* Si2168_GET_PROPERTY_CMD */ ++ #ifdef Si2168_GET_REV_CMD ++ Si2168_GET_REV_CMD_struct get_rev; ++ #endif /* Si2168_GET_REV_CMD */ ++ #ifdef Si2168_I2C_PASSTHROUGH_CMD ++ Si2168_I2C_PASSTHROUGH_CMD_struct i2c_passthrough; ++ #endif /* Si2168_I2C_PASSTHROUGH_CMD */ ++ #ifdef Si2168_PART_INFO_CMD ++ Si2168_PART_INFO_CMD_struct part_info; ++ #endif /* Si2168_PART_INFO_CMD */ ++ #ifdef Si2168_POWER_DOWN_CMD ++ Si2168_POWER_DOWN_CMD_struct power_down; ++ #endif /* Si2168_POWER_DOWN_CMD */ ++ #ifdef Si2168_POWER_UP_CMD ++ Si2168_POWER_UP_CMD_struct power_up; ++ #endif /* Si2168_POWER_UP_CMD */ ++ #ifdef Si2168_RSSI_ADC_CMD ++ Si2168_RSSI_ADC_CMD_struct rssi_adc; ++ #endif /* Si2168_RSSI_ADC_CMD */ ++ #ifdef Si2168_SCAN_CTRL_CMD ++ Si2168_SCAN_CTRL_CMD_struct scan_ctrl; ++ #endif /* Si2168_SCAN_CTRL_CMD */ ++ #ifdef Si2168_SCAN_STATUS_CMD ++ Si2168_SCAN_STATUS_CMD_struct scan_status; ++ #endif /* Si2168_SCAN_STATUS_CMD */ ++ #ifdef Si2168_SET_PROPERTY_CMD ++ Si2168_SET_PROPERTY_CMD_struct set_property; ++ #endif /* Si2168_SET_PROPERTY_CMD */ ++ #ifdef Si2168_START_CLK_CMD ++ Si2168_START_CLK_CMD_struct start_clk; ++ #endif /* Si2168_START_CLK_CMD */ ++ } Si2168_CmdObj; ++/* _commands_struct_insertion_point */ ++ ++/* _commands_reply_struct_insertion_start */ ++ ++ /* --------------------------------------------*/ ++ /* COMMANDS REPLY STRUCT */ ++ /* This stores all command reply fields */ ++ /* --------------------------------------------*/ ++ typedef struct { /* Si2168_CmdReplyObj struct */ ++ #ifdef Si2168_CONFIG_CLKIO_CMD ++ Si2168_CONFIG_CLKIO_CMD_REPLY_struct config_clkio; ++ #endif /* Si2168_CONFIG_CLKIO_CMD */ ++ #ifdef Si2168_CONFIG_PINS_CMD ++ Si2168_CONFIG_PINS_CMD_REPLY_struct config_pins; ++ #endif /* Si2168_CONFIG_PINS_CMD */ ++ #ifdef Si2168_DD_BER_CMD ++ Si2168_DD_BER_CMD_REPLY_struct dd_ber; ++ #endif /* Si2168_DD_BER_CMD */ ++ #ifdef Si2168_DD_CBER_CMD ++ Si2168_DD_CBER_CMD_REPLY_struct dd_cber; ++ #endif /* Si2168_DD_CBER_CMD */ ++ ++ #ifdef Si2168_DD_EXT_AGC_TER_CMD ++ Si2168_DD_EXT_AGC_TER_CMD_REPLY_struct dd_ext_agc_ter; ++ #endif /* Si2168_DD_EXT_AGC_TER_CMD */ ++ ++ #ifdef Si2168_DD_FER_CMD ++ Si2168_DD_FER_CMD_REPLY_struct dd_fer; ++ #endif /* Si2168_DD_FER_CMD */ ++ #ifdef Si2168_DD_GET_REG_CMD ++ Si2168_DD_GET_REG_CMD_REPLY_struct dd_get_reg; ++ #endif /* Si2168_DD_GET_REG_CMD */ ++ #ifdef Si2168_DD_MP_DEFAULTS_CMD ++ Si2168_DD_MP_DEFAULTS_CMD_REPLY_struct dd_mp_defaults; ++ #endif /* Si2168_DD_MP_DEFAULTS_CMD */ ++ #ifdef Si2168_DD_PER_CMD ++ Si2168_DD_PER_CMD_REPLY_struct dd_per; ++ #endif /* Si2168_DD_PER_CMD */ ++ #ifdef Si2168_DD_RESTART_CMD ++ Si2168_DD_RESTART_CMD_REPLY_struct dd_restart; ++ #endif /* Si2168_DD_RESTART_CMD */ ++ #ifdef Si2168_DD_SET_REG_CMD ++ Si2168_DD_SET_REG_CMD_REPLY_struct dd_set_reg; ++ #endif /* Si2168_DD_SET_REG_CMD */ ++ #ifdef Si2168_DD_SSI_SQI_CMD ++ Si2168_DD_SSI_SQI_CMD_REPLY_struct dd_ssi_sqi; ++ #endif /* Si2168_DD_SSI_SQI_CMD */ ++ #ifdef Si2168_DD_STATUS_CMD ++ Si2168_DD_STATUS_CMD_REPLY_struct dd_status; ++ #endif /* Si2168_DD_STATUS_CMD */ ++ #ifdef Si2168_DD_UNCOR_CMD ++ Si2168_DD_UNCOR_CMD_REPLY_struct dd_uncor; ++ #endif /* Si2168_DD_UNCOR_CMD */ ++ #ifdef Si2168_DOWNLOAD_DATASET_CONTINUE_CMD ++ Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_REPLY_struct download_dataset_continue; ++ #endif /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD */ ++ #ifdef Si2168_DOWNLOAD_DATASET_START_CMD ++ Si2168_DOWNLOAD_DATASET_START_CMD_REPLY_struct download_dataset_start; ++ #endif /* Si2168_DOWNLOAD_DATASET_START_CMD */ ++ #ifdef Si2168_DVBC_STATUS_CMD ++ Si2168_DVBC_STATUS_CMD_REPLY_struct dvbc_status; ++ #endif /* Si2168_DVBC_STATUS_CMD */ ++ ++ ++ #ifdef Si2168_DVBT2_FEF_CMD ++ Si2168_DVBT2_FEF_CMD_REPLY_struct dvbt2_fef; ++ #endif /* Si2168_DVBT2_FEF_CMD */ ++ #ifdef Si2168_DVBT2_PLP_INFO_CMD ++ Si2168_DVBT2_PLP_INFO_CMD_REPLY_struct dvbt2_plp_info; ++ #endif /* Si2168_DVBT2_PLP_INFO_CMD */ ++ #ifdef Si2168_DVBT2_PLP_SELECT_CMD ++ Si2168_DVBT2_PLP_SELECT_CMD_REPLY_struct dvbt2_plp_select; ++ #endif /* Si2168_DVBT2_PLP_SELECT_CMD */ ++ #ifdef Si2168_DVBT2_STATUS_CMD ++ Si2168_DVBT2_STATUS_CMD_REPLY_struct dvbt2_status; ++ #endif /* Si2168_DVBT2_STATUS_CMD */ ++ #ifdef Si2168_DVBT2_TX_ID_CMD ++ Si2168_DVBT2_TX_ID_CMD_REPLY_struct dvbt2_tx_id; ++ #endif /* Si2168_DVBT2_TX_ID_CMD */ ++ ++ #ifdef Si2168_DVBT_STATUS_CMD ++ Si2168_DVBT_STATUS_CMD_REPLY_struct dvbt_status; ++ #endif /* Si2168_DVBT_STATUS_CMD */ ++ #ifdef Si2168_DVBT_TPS_EXTRA_CMD ++ Si2168_DVBT_TPS_EXTRA_CMD_REPLY_struct dvbt_tps_extra; ++ #endif /* Si2168_DVBT_TPS_EXTRA_CMD */ ++ ++ #ifdef Si2168_EXIT_BOOTLOADER_CMD ++ Si2168_EXIT_BOOTLOADER_CMD_REPLY_struct exit_bootloader; ++ #endif /* Si2168_EXIT_BOOTLOADER_CMD */ ++ #ifdef Si2168_GET_PROPERTY_CMD ++ Si2168_GET_PROPERTY_CMD_REPLY_struct get_property; ++ #endif /* Si2168_GET_PROPERTY_CMD */ ++ #ifdef Si2168_GET_REV_CMD ++ Si2168_GET_REV_CMD_REPLY_struct get_rev; ++ #endif /* Si2168_GET_REV_CMD */ ++ #ifdef Si2168_I2C_PASSTHROUGH_CMD ++ Si2168_I2C_PASSTHROUGH_CMD_REPLY_struct i2c_passthrough; ++ #endif /* Si2168_I2C_PASSTHROUGH_CMD */ ++ #ifdef Si2168_PART_INFO_CMD ++ Si2168_PART_INFO_CMD_REPLY_struct part_info; ++ #endif /* Si2168_PART_INFO_CMD */ ++ #ifdef Si2168_POWER_DOWN_CMD ++ Si2168_POWER_DOWN_CMD_REPLY_struct power_down; ++ #endif /* Si2168_POWER_DOWN_CMD */ ++ #ifdef Si2168_POWER_UP_CMD ++ Si2168_POWER_UP_CMD_REPLY_struct power_up; ++ #endif /* Si2168_POWER_UP_CMD */ ++ #ifdef Si2168_RSSI_ADC_CMD ++ Si2168_RSSI_ADC_CMD_REPLY_struct rssi_adc; ++ #endif /* Si2168_RSSI_ADC_CMD */ ++ #ifdef Si2168_SCAN_CTRL_CMD ++ Si2168_SCAN_CTRL_CMD_REPLY_struct scan_ctrl; ++ #endif /* Si2168_SCAN_CTRL_CMD */ ++ #ifdef Si2168_SCAN_STATUS_CMD ++ Si2168_SCAN_STATUS_CMD_REPLY_struct scan_status; ++ #endif /* Si2168_SCAN_STATUS_CMD */ ++ #ifdef Si2168_SET_PROPERTY_CMD ++ Si2168_SET_PROPERTY_CMD_REPLY_struct set_property; ++ #endif /* Si2168_SET_PROPERTY_CMD */ ++ #ifdef Si2168_START_CLK_CMD ++ Si2168_START_CLK_CMD_REPLY_struct start_clk; ++ #endif /* Si2168_START_CLK_CMD */ ++ } Si2168_CmdReplyObj; ++/* _commands_reply_struct_insertion_point */ ++ ++#ifdef Si2168_COMMAND_PROTOTYPES ++#define Si2168_GET_COMMAND_STRINGS ++#endif /* Si2168_COMMAND_PROTOTYPES */ ++ ++#endif /* Si2168_COMMANDS_H */ ++ ++ ++ ++ ++ +diff -urN a/drivers/media/dvb-frontends/si2168_demod.c b/drivers/media/dvb-frontends/si2168_demod.c +--- a/drivers/media/dvb-frontends/si2168_demod.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_demod.c 2013-02-17 17:57:28.000000000 +0800 +@@ -0,0 +1,5100 @@ ++/****************************************************************/ ++#include "si2168_20_ROM2_Patch_2_0b5.h" ++#include "si2168_priv.h" ++ ++/*********************************************************************************************************************** ++ Si2168_CurrentResponseStatus function ++ Use: status checking function ++ Used to fill the Si2168_COMMON_REPLY_struct members with the ptDataBuffer byte's bits ++ Comments: The status byte definition being identical for all commands, ++ using this function to fill the status structure helps reducing the code size ++ Parameter: ptDataBuffer a single byte received when reading a command's response (the first byte) ++ Returns: 0 if the err bit (bit 6) is unset, 1 otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2168_CurrentResponseStatus (L1_Si2168_Context *api, unsigned char ptDataBuffer) ++{ ++/* _status_code_insertion_start */ ++ api->status->ddint = ((ptDataBuffer >> 0 ) & 0x01); ++ api->status->scanint = ((ptDataBuffer >> 1 ) & 0x01); ++ api->status->err = ((ptDataBuffer >> 6 ) & 0x01); ++ api->status->cts = ((ptDataBuffer >> 7 ) & 0x01); ++/* _status_code_insertion_point */ ++ return (api->status->err ? ERROR_Si2168_ERR : NO_Si2168_ERROR); ++} ++ ++ /* --------------------------------------------*/ ++ /* SEND_COMMAND2 FUNCTION */ ++ /* --------------------------------------------*/ ++unsigned char Si2168_L1_SendCommand2(L1_Si2168_Context *api, unsigned int cmd_code) { ++ switch (cmd_code) { ++ #ifdef Si2168_CONFIG_CLKIO_CMD ++ case Si2168_CONFIG_CLKIO_CMD_CODE: ++ return Si2168_L1_CONFIG_CLKIO (api, api->cmd->config_clkio.output, api->cmd->config_clkio.pre_driver_str, api->cmd->config_clkio.driver_str ); ++ break; ++ #endif /* Si2168_CONFIG_CLKIO_CMD */ ++ #ifdef Si2168_CONFIG_PINS_CMD ++ case Si2168_CONFIG_PINS_CMD_CODE: ++ return Si2168_L1_CONFIG_PINS (api, api->cmd->config_pins.gpio0_mode, api->cmd->config_pins.gpio0_read, api->cmd->config_pins.gpio1_mode, api->cmd->config_pins.gpio1_read ); ++ break; ++ #endif /* Si2168_CONFIG_PINS_CMD */ ++ #ifdef Si2168_DD_BER_CMD ++ case Si2168_DD_BER_CMD_CODE: ++ return Si2168_L1_DD_BER (api, api->cmd->dd_ber.rst ); ++ break; ++ #endif /* Si2168_DD_BER_CMD */ ++ #ifdef Si2168_DD_CBER_CMD ++ case Si2168_DD_CBER_CMD_CODE: ++ return Si2168_L1_DD_CBER (api, api->cmd->dd_cber.rst ); ++ break; ++ #endif /* Si2168_DD_CBER_CMD */ ++ ++ #ifdef Si2168_DD_EXT_AGC_TER_CMD ++ case Si2168_DD_EXT_AGC_TER_CMD_CODE: ++ return Si2168_L1_DD_EXT_AGC_TER (api, api->cmd->dd_ext_agc_ter.agc_1_mode, api->cmd->dd_ext_agc_ter.agc_1_inv, api->cmd->dd_ext_agc_ter.agc_2_mode, api->cmd->dd_ext_agc_ter.agc_2_inv, api->cmd->dd_ext_agc_ter.agc_1_kloop, api->cmd->dd_ext_agc_ter.agc_2_kloop, api->cmd->dd_ext_agc_ter.agc_1_min, api->cmd->dd_ext_agc_ter.agc_2_min ); ++ break; ++ #endif /* Si2168_DD_EXT_AGC_TER_CMD */ ++ ++ #ifdef Si2168_DD_FER_CMD ++ case Si2168_DD_FER_CMD_CODE: ++ return Si2168_L1_DD_FER (api, api->cmd->dd_fer.rst ); ++ break; ++ #endif /* Si2168_DD_FER_CMD */ ++ #ifdef Si2168_DD_GET_REG_CMD ++ case Si2168_DD_GET_REG_CMD_CODE: ++ return Si2168_L1_DD_GET_REG (api, api->cmd->dd_get_reg.reg_code_lsb, api->cmd->dd_get_reg.reg_code_mid, api->cmd->dd_get_reg.reg_code_msb ); ++ break; ++ #endif /* Si2168_DD_GET_REG_CMD */ ++ #ifdef Si2168_DD_MP_DEFAULTS_CMD ++ case Si2168_DD_MP_DEFAULTS_CMD_CODE: ++ return Si2168_L1_DD_MP_DEFAULTS (api, api->cmd->dd_mp_defaults.mp_a_mode, api->cmd->dd_mp_defaults.mp_b_mode, api->cmd->dd_mp_defaults.mp_c_mode, api->cmd->dd_mp_defaults.mp_d_mode ); ++ break; ++ #endif /* Si2168_DD_MP_DEFAULTS_CMD */ ++ #ifdef Si2168_DD_PER_CMD ++ case Si2168_DD_PER_CMD_CODE: ++ return Si2168_L1_DD_PER (api, api->cmd->dd_per.rst ); ++ break; ++ #endif /* Si2168_DD_PER_CMD */ ++ #ifdef Si2168_DD_RESTART_CMD ++ case Si2168_DD_RESTART_CMD_CODE: ++ return Si2168_L1_DD_RESTART (api ); ++ break; ++ #endif /* Si2168_DD_RESTART_CMD */ ++ #ifdef Si2168_DD_SET_REG_CMD ++ case Si2168_DD_SET_REG_CMD_CODE: ++ return Si2168_L1_DD_SET_REG (api, api->cmd->dd_set_reg.reg_code_lsb, api->cmd->dd_set_reg.reg_code_mid, api->cmd->dd_set_reg.reg_code_msb, api->cmd->dd_set_reg.value ); ++ break; ++ #endif /* Si2168_DD_SET_REG_CMD */ ++ #ifdef Si2168_DD_SSI_SQI_CMD ++ case Si2168_DD_SSI_SQI_CMD_CODE: ++ return Si2168_L1_DD_SSI_SQI (api, api->cmd->dd_ssi_sqi.tuner_rssi ); ++ break; ++ #endif /* Si2168_DD_SSI_SQI_CMD */ ++ #ifdef Si2168_DD_STATUS_CMD ++ case Si2168_DD_STATUS_CMD_CODE: ++ return Si2168_L1_DD_STATUS (api, api->cmd->dd_status.intack ); ++ break; ++ #endif /* Si2168_DD_STATUS_CMD */ ++ #ifdef Si2168_DD_UNCOR_CMD ++ case Si2168_DD_UNCOR_CMD_CODE: ++ return Si2168_L1_DD_UNCOR (api, api->cmd->dd_uncor.rst ); ++ break; ++ #endif /* Si2168_DD_UNCOR_CMD */ ++ #ifdef Si2168_DOWNLOAD_DATASET_CONTINUE_CMD ++ case Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_CODE: ++ return Si2168_L1_DOWNLOAD_DATASET_CONTINUE (api, api->cmd->download_dataset_continue.data0, api->cmd->download_dataset_continue.data1, api->cmd->download_dataset_continue.data2, api->cmd->download_dataset_continue.data3, api->cmd->download_dataset_continue.data4, api->cmd->download_dataset_continue.data5, api->cmd->download_dataset_continue.data6 ); ++ break; ++ #endif /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD */ ++ #ifdef Si2168_DOWNLOAD_DATASET_START_CMD ++ case Si2168_DOWNLOAD_DATASET_START_CMD_CODE: ++ return Si2168_L1_DOWNLOAD_DATASET_START (api, api->cmd->download_dataset_start.dataset_id, api->cmd->download_dataset_start.dataset_checksum, api->cmd->download_dataset_start.data0, api->cmd->download_dataset_start.data1, api->cmd->download_dataset_start.data2, api->cmd->download_dataset_start.data3, api->cmd->download_dataset_start.data4 ); ++ break; ++ #endif /* Si2168_DOWNLOAD_DATASET_START_CMD */ ++ #ifdef Si2168_DVBC_STATUS_CMD ++ case Si2168_DVBC_STATUS_CMD_CODE: ++ return Si2168_L1_DVBC_STATUS (api, api->cmd->dvbc_status.intack ); ++ break; ++ #endif /* Si2168_DVBC_STATUS_CMD */ ++ ++ ++ #ifdef Si2168_DVBT2_FEF_CMD ++ case Si2168_DVBT2_FEF_CMD_CODE: ++ return Si2168_L1_DVBT2_FEF (api, api->cmd->dvbt2_fef.fef_tuner_flag, api->cmd->dvbt2_fef.fef_tuner_flag_inv ); ++ break; ++ #endif /* Si2168_DVBT2_FEF_CMD */ ++ #ifdef Si2168_DVBT2_PLP_INFO_CMD ++ case Si2168_DVBT2_PLP_INFO_CMD_CODE: ++ return Si2168_L1_DVBT2_PLP_INFO (api, api->cmd->dvbt2_plp_info.plp_index ); ++ break; ++ #endif /* Si2168_DVBT2_PLP_INFO_CMD */ ++ #ifdef Si2168_DVBT2_PLP_SELECT_CMD ++ case Si2168_DVBT2_PLP_SELECT_CMD_CODE: ++ return Si2168_L1_DVBT2_PLP_SELECT (api, api->cmd->dvbt2_plp_select.plp_id, api->cmd->dvbt2_plp_select.plp_id_sel_mode ); ++ break; ++ #endif /* Si2168_DVBT2_PLP_SELECT_CMD */ ++ #ifdef Si2168_DVBT2_STATUS_CMD ++ case Si2168_DVBT2_STATUS_CMD_CODE: ++ return Si2168_L1_DVBT2_STATUS (api, api->cmd->dvbt2_status.intack ); ++ break; ++ #endif /* Si2168_DVBT2_STATUS_CMD */ ++ #ifdef Si2168_DVBT2_TX_ID_CMD ++ case Si2168_DVBT2_TX_ID_CMD_CODE: ++ return Si2168_L1_DVBT2_TX_ID (api ); ++ break; ++ #endif /* Si2168_DVBT2_TX_ID_CMD */ ++ ++ #ifdef Si2168_DVBT_STATUS_CMD ++ case Si2168_DVBT_STATUS_CMD_CODE: ++ return Si2168_L1_DVBT_STATUS (api, api->cmd->dvbt_status.intack ); ++ break; ++ #endif /* Si2168_DVBT_STATUS_CMD */ ++ #ifdef Si2168_DVBT_TPS_EXTRA_CMD ++ case Si2168_DVBT_TPS_EXTRA_CMD_CODE: ++ return Si2168_L1_DVBT_TPS_EXTRA (api ); ++ break; ++ #endif /* Si2168_DVBT_TPS_EXTRA_CMD */ ++ ++ #ifdef Si2168_EXIT_BOOTLOADER_CMD ++ case Si2168_EXIT_BOOTLOADER_CMD_CODE: ++ return Si2168_L1_EXIT_BOOTLOADER (api, api->cmd->exit_bootloader.func, api->cmd->exit_bootloader.ctsien ); ++ break; ++ #endif /* Si2168_EXIT_BOOTLOADER_CMD */ ++ #ifdef Si2168_GET_PROPERTY_CMD ++ case Si2168_GET_PROPERTY_CMD_CODE: ++ return Si2168_L1_GET_PROPERTY (api, api->cmd->get_property.reserved, api->cmd->get_property.prop ); ++ break; ++ #endif /* Si2168_GET_PROPERTY_CMD */ ++ #ifdef Si2168_GET_REV_CMD ++ case Si2168_GET_REV_CMD_CODE: ++ return Si2168_L1_GET_REV (api ); ++ break; ++ #endif /* Si2168_GET_REV_CMD */ ++ #ifdef Si2168_I2C_PASSTHROUGH_CMD ++ case Si2168_I2C_PASSTHROUGH_CMD_CODE: ++ return Si2168_L1_I2C_PASSTHROUGH (api, api->cmd->i2c_passthrough.subcode, api->cmd->i2c_passthrough.i2c_passthru, api->cmd->i2c_passthrough.reserved ); ++ break; ++ #endif /* Si2168_I2C_PASSTHROUGH_CMD */ ++ #ifdef Si2168_PART_INFO_CMD ++ case Si2168_PART_INFO_CMD_CODE: ++ return Si2168_L1_PART_INFO (api ); ++ break; ++ #endif /* Si2168_PART_INFO_CMD */ ++ #ifdef Si2168_POWER_DOWN_CMD ++ case Si2168_POWER_DOWN_CMD_CODE: ++ return Si2168_L1_POWER_DOWN (api ); ++ break; ++ #endif /* Si2168_POWER_DOWN_CMD */ ++ #ifdef Si2168_POWER_UP_CMD ++ case Si2168_POWER_UP_CMD_CODE: ++ return Si2168_L1_POWER_UP (api, api->cmd->power_up.subcode, api->cmd->power_up.reset, api->cmd->power_up.reserved2, api->cmd->power_up.reserved4, api->cmd->power_up.reserved1, api->cmd->power_up.addr_mode, api->cmd->power_up.reserved5, api->cmd->power_up.func, api->cmd->power_up.clock_freq, api->cmd->power_up.ctsien, api->cmd->power_up.wake_up ); ++ break; ++ #endif /* Si2168_POWER_UP_CMD */ ++ #ifdef Si2168_RSSI_ADC_CMD ++ case Si2168_RSSI_ADC_CMD_CODE: ++ return Si2168_L1_RSSI_ADC (api, api->cmd->rssi_adc.on_off ); ++ break; ++ #endif /* Si2168_RSSI_ADC_CMD */ ++ #ifdef Si2168_SCAN_CTRL_CMD ++ case Si2168_SCAN_CTRL_CMD_CODE: ++ return Si2168_L1_SCAN_CTRL (api, api->cmd->scan_ctrl.action, api->cmd->scan_ctrl.tuned_rf_freq ); ++ break; ++ #endif /* Si2168_SCAN_CTRL_CMD */ ++ #ifdef Si2168_SCAN_STATUS_CMD ++ case Si2168_SCAN_STATUS_CMD_CODE: ++ return Si2168_L1_SCAN_STATUS (api, api->cmd->scan_status.intack ); ++ break; ++ #endif /* Si2168_SCAN_STATUS_CMD */ ++ #ifdef Si2168_SET_PROPERTY_CMD ++ case Si2168_SET_PROPERTY_CMD_CODE: ++ return Si2168_L1_SET_PROPERTY (api, api->cmd->set_property.reserved, api->cmd->set_property.prop, api->cmd->set_property.data ); ++ break; ++ #endif /* Si2168_SET_PROPERTY_CMD */ ++ #ifdef Si2168_START_CLK_CMD ++ case Si2168_START_CLK_CMD_CODE: ++ return Si2168_L1_START_CLK (api, api->cmd->start_clk.subcode, api->cmd->start_clk.reserved1, api->cmd->start_clk.tune_cap, api->cmd->start_clk.reserved2, api->cmd->start_clk.clk_mode, api->cmd->start_clk.reserved3, api->cmd->start_clk.reserved4, api->cmd->start_clk.start_clk ); ++ break; ++ #endif /* Si2168_START_CLK_CMD */ ++ default : break; ++ } ++ return 0; ++ } ++ ++#ifdef Si2168_DD_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_STATUS (L1_Si2168_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[8]; ++ api->rsp->dd_status.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2168_DD_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2168_DD_STATUS_CMD_INTACK_MASK ) << Si2168_DD_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_STATUS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 8, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_status.pclint = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_PCLINT_LSB ) & Si2168_DD_STATUS_RESPONSE_PCLINT_MASK ); ++ api->rsp->dd_status.dlint = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_DLINT_LSB ) & Si2168_DD_STATUS_RESPONSE_DLINT_MASK ); ++ api->rsp->dd_status.berint = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_BERINT_LSB ) & Si2168_DD_STATUS_RESPONSE_BERINT_MASK ); ++ api->rsp->dd_status.uncorint = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_UNCORINT_LSB ) & Si2168_DD_STATUS_RESPONSE_UNCORINT_MASK ); ++ api->rsp->dd_status.rsqint_bit5 = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_LSB ) & Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_MASK ); ++ api->rsp->dd_status.rsqint_bit6 = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_RSQINT_BIT6_LSB ) & Si2168_DD_STATUS_RESPONSE_RSQINT_BIT6_MASK ); ++ api->rsp->dd_status.rsqint_bit7 = (( ( (rspByteBuffer[1] )) >> Si2168_DD_STATUS_RESPONSE_RSQINT_BIT7_LSB ) & Si2168_DD_STATUS_RESPONSE_RSQINT_BIT7_MASK ); ++ api->rsp->dd_status.pcl = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_PCL_LSB ) & Si2168_DD_STATUS_RESPONSE_PCL_MASK ); ++ api->rsp->dd_status.dl = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_DL_LSB ) & Si2168_DD_STATUS_RESPONSE_DL_MASK ); ++ api->rsp->dd_status.ber = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_BER_LSB ) & Si2168_DD_STATUS_RESPONSE_BER_MASK ); ++ api->rsp->dd_status.uncor = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_UNCOR_LSB ) & Si2168_DD_STATUS_RESPONSE_UNCOR_MASK ); ++ api->rsp->dd_status.rsqstat_bit5 = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT5_LSB ) & Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT5_MASK ); ++ api->rsp->dd_status.rsqstat_bit6 = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT6_LSB ) & Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT6_MASK ); ++ api->rsp->dd_status.rsqstat_bit7 = (( ( (rspByteBuffer[2] )) >> Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT7_LSB ) & Si2168_DD_STATUS_RESPONSE_RSQSTAT_BIT7_MASK ); ++ api->rsp->dd_status.modulation = (( ( (rspByteBuffer[3] )) >> Si2168_DD_STATUS_RESPONSE_MODULATION_LSB ) & Si2168_DD_STATUS_RESPONSE_MODULATION_MASK ); ++ api->rsp->dd_status.ts_bit_rate = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2168_DD_STATUS_RESPONSE_TS_BIT_RATE_LSB ) & Si2168_DD_STATUS_RESPONSE_TS_BIT_RATE_MASK ); ++ api->rsp->dd_status.ts_clk_freq = (( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2168_DD_STATUS_RESPONSE_TS_CLK_FREQ_LSB ) & Si2168_DD_STATUS_RESPONSE_TS_CLK_FREQ_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_STATUS_CMD */ ++ ++#ifdef Si2168_I2C_PASSTHROUGH_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_I2C_PASSTHROUGH COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_I2C_PASSTHROUGH (L1_Si2168_Context *api, ++ unsigned char subcode, ++ unsigned char i2c_passthru, ++ unsigned char reserved) ++{ ++ /*unsigned char error_code = 0;*/ ++ unsigned char cmdByteBuffer[3]; ++ api->rsp->i2c_passthrough.STATUS = api->status; ++ ++ SiTRACE("Si2168 I2C_PASSTHROUGH "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((subcode > Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_MAX ) || (subcode < Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("SUBCODE %d " , subcode ); ++ if ((i2c_passthru > Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("I2C_PASSTHRU %d ", i2c_passthru ); ++ if ((reserved > Si2168_I2C_PASSTHROUGH_CMD_RESERVED_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED %d " , reserved ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_I2C_PASSTHROUGH_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( subcode & Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_MASK ) << Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( i2c_passthru & Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_MASK ) << Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_LSB| ++ ( reserved & Si2168_I2C_PASSTHROUGH_CMD_RESERVED_MASK ) << Si2168_I2C_PASSTHROUGH_CMD_RESERVED_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 3, cmdByteBuffer) != 3) { ++ SiTRACE("Error writing I2C_PASSTHROUGH bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_I2C_PASSTHROUGH_CMD */ ++ ++#ifdef Si2168_CONFIG_CLKIO_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_CONFIG_CLKIO COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_CONFIG_CLKIO (L1_Si2168_Context *api, ++ unsigned char output, ++ unsigned char pre_driver_str, ++ unsigned char driver_str) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[4]; ++ api->rsp->config_clkio.STATUS = api->status; ++ ++ SiTRACE("Si2168 CONFIG_CLKIO "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((output > Si2168_CONFIG_CLKIO_CMD_OUTPUT_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("OUTPUT %d " , output ); ++ if ((pre_driver_str > Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PRE_DRIVER_STR %d ", pre_driver_str ); ++ if ((driver_str > Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("DRIVER_STR %d " , driver_str ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_CONFIG_CLKIO_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( output & Si2168_CONFIG_CLKIO_CMD_OUTPUT_MASK ) << Si2168_CONFIG_CLKIO_CMD_OUTPUT_LSB | ++ ( pre_driver_str & Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_MASK ) << Si2168_CONFIG_CLKIO_CMD_PRE_DRIVER_STR_LSB| ++ ( driver_str & Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_MASK ) << Si2168_CONFIG_CLKIO_CMD_DRIVER_STR_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing CONFIG_CLKIO bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 4, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling CONFIG_CLKIO response\n"); ++ return error_code; ++ } ++ ++ api->rsp->config_clkio.mode = (( ( (rspByteBuffer[1] )) >> Si2168_CONFIG_CLKIO_RESPONSE_MODE_LSB ) & Si2168_CONFIG_CLKIO_RESPONSE_MODE_MASK ); ++ api->rsp->config_clkio.pre_driver_str = (( ( (rspByteBuffer[2] )) >> Si2168_CONFIG_CLKIO_RESPONSE_PRE_DRIVER_STR_LSB ) & Si2168_CONFIG_CLKIO_RESPONSE_PRE_DRIVER_STR_MASK ); ++ api->rsp->config_clkio.driver_str = (( ( (rspByteBuffer[3] )) >> Si2168_CONFIG_CLKIO_RESPONSE_DRIVER_STR_LSB ) & Si2168_CONFIG_CLKIO_RESPONSE_DRIVER_STR_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_CONFIG_CLKIO_CMD */ ++#ifdef Si2168_CONFIG_PINS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_CONFIG_PINS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_CONFIG_PINS (L1_Si2168_Context *api, ++ unsigned char gpio0_mode, ++ unsigned char gpio0_read, ++ unsigned char gpio1_mode, ++ unsigned char gpio1_read) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[3]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->config_pins.STATUS = api->status; ++ ++ SiTRACE("Si2168 CONFIG_PINS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((gpio0_mode > Si2168_CONFIG_PINS_CMD_GPIO0_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO0_MODE %d ", gpio0_mode ); ++ if ((gpio0_read > Si2168_CONFIG_PINS_CMD_GPIO0_READ_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO0_READ %d ", gpio0_read ); ++ if ((gpio1_mode > Si2168_CONFIG_PINS_CMD_GPIO1_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO1_MODE %d ", gpio1_mode ); ++ if ((gpio1_read > Si2168_CONFIG_PINS_CMD_GPIO1_READ_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO1_READ %d ", gpio1_read ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_CONFIG_PINS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( gpio0_mode & Si2168_CONFIG_PINS_CMD_GPIO0_MODE_MASK ) << Si2168_CONFIG_PINS_CMD_GPIO0_MODE_LSB| ++ ( gpio0_read & Si2168_CONFIG_PINS_CMD_GPIO0_READ_MASK ) << Si2168_CONFIG_PINS_CMD_GPIO0_READ_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( gpio1_mode & Si2168_CONFIG_PINS_CMD_GPIO1_MODE_MASK ) << Si2168_CONFIG_PINS_CMD_GPIO1_MODE_LSB| ++ ( gpio1_read & Si2168_CONFIG_PINS_CMD_GPIO1_READ_MASK ) << Si2168_CONFIG_PINS_CMD_GPIO1_READ_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 3, cmdByteBuffer) != 3) { ++ SiTRACE("Error writing CONFIG_PINS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling CONFIG_PINS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->config_pins.gpio0_mode = (( ( (rspByteBuffer[1] )) >> Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_LSB ) & Si2168_CONFIG_PINS_RESPONSE_GPIO0_MODE_MASK ); ++ api->rsp->config_pins.gpio0_state = (( ( (rspByteBuffer[1] )) >> Si2168_CONFIG_PINS_RESPONSE_GPIO0_STATE_LSB ) & Si2168_CONFIG_PINS_RESPONSE_GPIO0_STATE_MASK ); ++ api->rsp->config_pins.gpio1_mode = (( ( (rspByteBuffer[2] )) >> Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_LSB ) & Si2168_CONFIG_PINS_RESPONSE_GPIO1_MODE_MASK ); ++ api->rsp->config_pins.gpio1_state = (( ( (rspByteBuffer[2] )) >> Si2168_CONFIG_PINS_RESPONSE_GPIO1_STATE_LSB ) & Si2168_CONFIG_PINS_RESPONSE_GPIO1_STATE_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_CONFIG_PINS_CMD */ ++ ++#ifdef Si2168_DD_BER_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_BER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_BER (L1_Si2168_Context *api, ++ unsigned char rst) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_ber.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_BER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((rst > Si2168_DD_BER_CMD_RST_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RST %d ", rst ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_BER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( rst & Si2168_DD_BER_CMD_RST_MASK ) << Si2168_DD_BER_CMD_RST_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_BER bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_BER response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_ber.exp = (( ( (rspByteBuffer[1] )) >> Si2168_DD_BER_RESPONSE_EXP_LSB ) & Si2168_DD_BER_RESPONSE_EXP_MASK ); ++ api->rsp->dd_ber.mant = (( ( (rspByteBuffer[2] )) >> Si2168_DD_BER_RESPONSE_MANT_LSB ) & Si2168_DD_BER_RESPONSE_MANT_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_BER_CMD */ ++ ++#ifdef Si2168_DD_CBER_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_CBER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_CBER (L1_Si2168_Context *api, ++ unsigned char rst) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_cber.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_CBER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((rst > Si2168_DD_CBER_CMD_RST_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RST %d ", rst ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_CBER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( rst & Si2168_DD_CBER_CMD_RST_MASK ) << Si2168_DD_CBER_CMD_RST_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_CBER bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_CBER response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_cber.exp = (( ( (rspByteBuffer[1] )) >> Si2168_DD_CBER_RESPONSE_EXP_LSB ) & Si2168_DD_CBER_RESPONSE_EXP_MASK ); ++ api->rsp->dd_cber.mant = (( ( (rspByteBuffer[2] )) >> Si2168_DD_CBER_RESPONSE_MANT_LSB ) & Si2168_DD_CBER_RESPONSE_MANT_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_CBER_CMD */ ++ ++#ifdef Si2168_DD_EXT_AGC_TER_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_EXT_AGC_TER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_EXT_AGC_TER (L1_Si2168_Context *api, ++ unsigned char agc_1_mode, ++ unsigned char agc_1_inv, ++ unsigned char agc_2_mode, ++ unsigned char agc_2_inv, ++ unsigned char agc_1_kloop, ++ unsigned char agc_2_kloop, ++ unsigned char agc_1_min, ++ unsigned char agc_2_min) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[6]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_ext_agc_ter.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_EXT_AGC_TER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((agc_1_mode > Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("AGC_1_MODE %d " , agc_1_mode ); ++ if ((agc_1_inv > Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("AGC_1_INV %d " , agc_1_inv ); ++ if ((agc_2_mode > Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("AGC_2_MODE %d " , agc_2_mode ); ++ if ((agc_2_inv > Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("AGC_2_INV %d " , agc_2_inv ); ++ if ((agc_1_kloop > Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MAX) || (agc_1_kloop < Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("AGC_1_KLOOP %d ", agc_1_kloop ); ++ if ((agc_2_kloop > Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_MAX) || (agc_2_kloop < Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("AGC_2_KLOOP %d ", agc_2_kloop ); ++ SiTRACE("AGC_1_MIN %d " , agc_1_min ); ++ SiTRACE("AGC_2_MIN %d " , agc_2_min ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_EXT_AGC_TER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( agc_1_mode & Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_LSB | ++ ( agc_1_inv & Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_LSB | ++ ( agc_2_mode & Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_LSB | ++ ( agc_2_inv & Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( agc_1_kloop & Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( agc_2_kloop & Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_2_KLOOP_LSB); ++ cmdByteBuffer[4] = (unsigned char) ( ( agc_1_min & Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ( ( agc_2_min & Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_MASK ) << Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 6, cmdByteBuffer) != 6) { ++ SiTRACE("Error writing DD_EXT_AGC_TER bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_EXT_AGC_TER response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_ext_agc_ter.agc_1_level = (( ( (rspByteBuffer[1] )) >> Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_1_LEVEL_LSB ) & Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_1_LEVEL_MASK ); ++ api->rsp->dd_ext_agc_ter.agc_2_level = (( ( (rspByteBuffer[2] )) >> Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_2_LEVEL_LSB ) & Si2168_DD_EXT_AGC_TER_RESPONSE_AGC_2_LEVEL_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_EXT_AGC_TER_CMD */ ++ ++#ifdef Si2168_DD_FER_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_FER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_FER (L1_Si2168_Context *api, ++ unsigned char rst) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_fer.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_FER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((rst > Si2168_DD_FER_CMD_RST_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RST %d ", rst ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_FER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( rst & Si2168_DD_FER_CMD_RST_MASK ) << Si2168_DD_FER_CMD_RST_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_FER bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_FER response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_fer.exp = (( ( (rspByteBuffer[1] )) >> Si2168_DD_FER_RESPONSE_EXP_LSB ) & Si2168_DD_FER_RESPONSE_EXP_MASK ); ++ api->rsp->dd_fer.mant = (( ( (rspByteBuffer[2] )) >> Si2168_DD_FER_RESPONSE_MANT_LSB ) & Si2168_DD_FER_RESPONSE_MANT_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_FER_CMD */ ++ ++#ifdef Si2168_DD_GET_REG_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_GET_REG COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_GET_REG (L1_Si2168_Context *api, ++ unsigned char reg_code_lsb, ++ unsigned char reg_code_mid, ++ unsigned char reg_code_msb) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[4]; ++ unsigned char rspByteBuffer[5]; ++ api->rsp->dd_get_reg.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_GET_REG "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("REG_CODE_LSB %d ", reg_code_lsb ); ++ SiTRACE("REG_CODE_MID %d ", reg_code_mid ); ++ SiTRACE("REG_CODE_MSB %d ", reg_code_msb ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_GET_REG_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( reg_code_lsb & Si2168_DD_GET_REG_CMD_REG_CODE_LSB_MASK ) << Si2168_DD_GET_REG_CMD_REG_CODE_LSB_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( reg_code_mid & Si2168_DD_GET_REG_CMD_REG_CODE_MID_MASK ) << Si2168_DD_GET_REG_CMD_REG_CODE_MID_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( reg_code_msb & Si2168_DD_GET_REG_CMD_REG_CODE_MSB_MASK ) << Si2168_DD_GET_REG_CMD_REG_CODE_MSB_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 4, cmdByteBuffer) != 4) { ++ SiTRACE("Error writing DD_GET_REG bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 5, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_GET_REG response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_get_reg.data1 = (( ( (rspByteBuffer[1] )) >> Si2168_DD_GET_REG_RESPONSE_DATA1_LSB ) & Si2168_DD_GET_REG_RESPONSE_DATA1_MASK ); ++ api->rsp->dd_get_reg.data2 = (( ( (rspByteBuffer[2] )) >> Si2168_DD_GET_REG_RESPONSE_DATA2_LSB ) & Si2168_DD_GET_REG_RESPONSE_DATA2_MASK ); ++ api->rsp->dd_get_reg.data3 = (( ( (rspByteBuffer[3] )) >> Si2168_DD_GET_REG_RESPONSE_DATA3_LSB ) & Si2168_DD_GET_REG_RESPONSE_DATA3_MASK ); ++ api->rsp->dd_get_reg.data4 = (( ( (rspByteBuffer[4] )) >> Si2168_DD_GET_REG_RESPONSE_DATA4_LSB ) & Si2168_DD_GET_REG_RESPONSE_DATA4_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_GET_REG_CMD */ ++ ++#ifdef Si2168_DD_MP_DEFAULTS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_MP_DEFAULTS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_MP_DEFAULTS (L1_Si2168_Context *api, ++ unsigned char mp_a_mode, ++ unsigned char mp_b_mode, ++ unsigned char mp_c_mode, ++ unsigned char mp_d_mode) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[5]; ++ unsigned char rspByteBuffer[5]; ++ api->rsp->dd_mp_defaults.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_MP_DEFAULTS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((mp_a_mode > Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("MP_A_MODE %d ", mp_a_mode ); ++ if ((mp_b_mode > Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("MP_B_MODE %d ", mp_b_mode ); ++ if ((mp_c_mode > Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("MP_C_MODE %d ", mp_c_mode ); ++ if ((mp_d_mode > Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("MP_D_MODE %d ", mp_d_mode ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_MP_DEFAULTS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( mp_a_mode & Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_MASK ) << Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( mp_b_mode & Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_MASK ) << Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( mp_c_mode & Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_MASK ) << Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_LSB); ++ cmdByteBuffer[4] = (unsigned char) ( ( mp_d_mode & Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_MASK ) << Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 5, cmdByteBuffer) != 5) { ++ SiTRACE("Error writing DD_MP_DEFAULTS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 5, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_MP_DEFAULTS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_mp_defaults.mp_a_mode = (( ( (rspByteBuffer[1] )) >> Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_LSB ) & Si2168_DD_MP_DEFAULTS_RESPONSE_MP_A_MODE_MASK ); ++ api->rsp->dd_mp_defaults.mp_b_mode = (( ( (rspByteBuffer[2] )) >> Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_LSB ) & Si2168_DD_MP_DEFAULTS_RESPONSE_MP_B_MODE_MASK ); ++ api->rsp->dd_mp_defaults.mp_c_mode = (( ( (rspByteBuffer[3] )) >> Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_LSB ) & Si2168_DD_MP_DEFAULTS_RESPONSE_MP_C_MODE_MASK ); ++ api->rsp->dd_mp_defaults.mp_d_mode = (( ( (rspByteBuffer[4] )) >> Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_LSB ) & Si2168_DD_MP_DEFAULTS_RESPONSE_MP_D_MODE_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_MP_DEFAULTS_CMD */ ++ ++#ifdef Si2168_DD_PER_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_PER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_PER (L1_Si2168_Context *api, ++ unsigned char rst) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_per.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_PER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((rst > Si2168_DD_PER_CMD_RST_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RST %d ", rst ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_PER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( rst & Si2168_DD_PER_CMD_RST_MASK ) << Si2168_DD_PER_CMD_RST_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_PER bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_PER response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_per.exp = (( ( (rspByteBuffer[1] )) >> Si2168_DD_PER_RESPONSE_EXP_LSB ) & Si2168_DD_PER_RESPONSE_EXP_MASK ); ++ api->rsp->dd_per.mant = (( ( (rspByteBuffer[2] )) >> Si2168_DD_PER_RESPONSE_MANT_LSB ) & Si2168_DD_PER_RESPONSE_MANT_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_PER_CMD */ ++#ifdef Si2168_DD_RESTART_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_RESTART COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_RESTART (L1_Si2168_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->dd_restart.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_RESTART "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_RESTART_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing DD_RESTART bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_RESTART response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_RESTART_CMD */ ++ ++#ifdef Si2168_DD_SET_REG_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_SET_REG COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_SET_REG (L1_Si2168_Context *api, ++ unsigned char reg_code_lsb, ++ unsigned char reg_code_mid, ++ unsigned char reg_code_msb, ++ unsigned long value) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[8]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->dd_set_reg.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_SET_REG "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("REG_CODE_LSB %d ", reg_code_lsb ); ++ SiTRACE("REG_CODE_MID %d ", reg_code_mid ); ++ SiTRACE("REG_CODE_MSB %d ", reg_code_msb ); ++ SiTRACE("VALUE %d " , value ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_SET_REG_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( reg_code_lsb & Si2168_DD_SET_REG_CMD_REG_CODE_LSB_MASK ) << Si2168_DD_SET_REG_CMD_REG_CODE_LSB_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( reg_code_mid & Si2168_DD_SET_REG_CMD_REG_CODE_MID_MASK ) << Si2168_DD_SET_REG_CMD_REG_CODE_MID_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( reg_code_msb & Si2168_DD_SET_REG_CMD_REG_CODE_MSB_MASK ) << Si2168_DD_SET_REG_CMD_REG_CODE_MSB_LSB); ++ cmdByteBuffer[4] = (unsigned char) ( ( value & Si2168_DD_SET_REG_CMD_VALUE_MASK ) << Si2168_DD_SET_REG_CMD_VALUE_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ((( value & Si2168_DD_SET_REG_CMD_VALUE_MASK ) << Si2168_DD_SET_REG_CMD_VALUE_LSB )>>8); ++ cmdByteBuffer[6] = (unsigned char) ((( value & Si2168_DD_SET_REG_CMD_VALUE_MASK ) << Si2168_DD_SET_REG_CMD_VALUE_LSB )>>16); ++ cmdByteBuffer[7] = (unsigned char) ((( value & Si2168_DD_SET_REG_CMD_VALUE_MASK ) << Si2168_DD_SET_REG_CMD_VALUE_LSB )>>24); ++ ++ if (L0_WriteCommandBytes(api->i2c, 8, cmdByteBuffer) != 8) { ++ SiTRACE("Error writing DD_SET_REG bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_SET_REG response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_SET_REG_CMD */ ++#ifdef Si2168_DD_SSI_SQI_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_SSI_SQI COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_SSI_SQI (L1_Si2168_Context *api, ++ char tuner_rssi) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_ssi_sqi.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_SSI_SQI "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("TUNER_RSSI %d ", tuner_rssi ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_SSI_SQI_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( tuner_rssi & Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_MASK ) << Si2168_DD_SSI_SQI_CMD_TUNER_RSSI_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_SSI_SQI bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_SSI_SQI response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_ssi_sqi.ssi = (((( ( (rspByteBuffer[1] )) >> Si2168_DD_SSI_SQI_RESPONSE_SSI_LSB ) & Si2168_DD_SSI_SQI_RESPONSE_SSI_MASK) <>Si2168_DD_SSI_SQI_RESPONSE_SSI_SHIFT ); ++ api->rsp->dd_ssi_sqi.sqi = (((( ( (rspByteBuffer[2] )) >> Si2168_DD_SSI_SQI_RESPONSE_SQI_LSB ) & Si2168_DD_SSI_SQI_RESPONSE_SQI_MASK) <>Si2168_DD_SSI_SQI_RESPONSE_SQI_SHIFT ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_SSI_SQI_CMD */ ++ ++#ifdef Si2168_DD_UNCOR_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DD_UNCOR COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DD_UNCOR (L1_Si2168_Context *api, ++ unsigned char rst) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[3]; ++ api->rsp->dd_uncor.STATUS = api->status; ++ ++ SiTRACE("Si2168 DD_UNCOR "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((rst > Si2168_DD_UNCOR_CMD_RST_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RST %d ", rst ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DD_UNCOR_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( rst & Si2168_DD_UNCOR_CMD_RST_MASK ) << Si2168_DD_UNCOR_CMD_RST_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DD_UNCOR bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 3, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DD_UNCOR response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dd_uncor.uncor_lsb = (( ( (rspByteBuffer[1] )) >> Si2168_DD_UNCOR_RESPONSE_UNCOR_LSB_LSB ) & Si2168_DD_UNCOR_RESPONSE_UNCOR_LSB_MASK ); ++ api->rsp->dd_uncor.uncor_msb = (( ( (rspByteBuffer[2] )) >> Si2168_DD_UNCOR_RESPONSE_UNCOR_MSB_LSB ) & Si2168_DD_UNCOR_RESPONSE_UNCOR_MSB_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DD_UNCOR_CMD */ ++#ifdef Si2168_DOWNLOAD_DATASET_CONTINUE_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DOWNLOAD_DATASET_CONTINUE COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DOWNLOAD_DATASET_CONTINUE (L1_Si2168_Context *api, ++ unsigned char data0, ++ unsigned char data1, ++ unsigned char data2, ++ unsigned char data3, ++ unsigned char data4, ++ unsigned char data5, ++ unsigned char data6) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[8]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->download_dataset_continue.STATUS = api->status; ++ ++ SiTRACE("Si2168 DOWNLOAD_DATASET_CONTINUE "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("DATA0 %d ", data0 ); ++ SiTRACE("DATA1 %d ", data1 ); ++ SiTRACE("DATA2 %d ", data2 ); ++ SiTRACE("DATA3 %d ", data3 ); ++ SiTRACE("DATA4 %d ", data4 ); ++ SiTRACE("DATA5 %d ", data5 ); ++ SiTRACE("DATA6 %d ", data6 ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DOWNLOAD_DATASET_CONTINUE_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( data0 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA0_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( data1 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA1_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( data2 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA2_LSB); ++ cmdByteBuffer[4] = (unsigned char) ( ( data3 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA3_LSB); ++ cmdByteBuffer[5] = (unsigned char) ( ( data4 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA4_LSB); ++ cmdByteBuffer[6] = (unsigned char) ( ( data5 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA5_LSB); ++ cmdByteBuffer[7] = (unsigned char) ( ( data6 & Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_MASK ) << Si2168_DOWNLOAD_DATASET_CONTINUE_CMD_DATA6_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 8, cmdByteBuffer) != 8) { ++ SiTRACE("Error writing DOWNLOAD_DATASET_CONTINUE bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DOWNLOAD_DATASET_CONTINUE response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DOWNLOAD_DATASET_CONTINUE_CMD */ ++#ifdef Si2168_DOWNLOAD_DATASET_START_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DOWNLOAD_DATASET_START COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DOWNLOAD_DATASET_START (L1_Si2168_Context *api, ++ unsigned char dataset_id, ++ unsigned char dataset_checksum, ++ unsigned char data0, ++ unsigned char data1, ++ unsigned char data2, ++ unsigned char data3, ++ unsigned char data4) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[8]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->download_dataset_start.STATUS = api->status; ++ ++ SiTRACE("Si2168 DOWNLOAD_DATASET_START "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((dataset_id > Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("DATASET_ID %d " , dataset_id ); ++ SiTRACE("DATASET_CHECKSUM %d ", dataset_checksum ); ++ SiTRACE("DATA0 %d " , data0 ); ++ SiTRACE("DATA1 %d " , data1 ); ++ SiTRACE("DATA2 %d " , data2 ); ++ SiTRACE("DATA3 %d " , data3 ); ++ SiTRACE("DATA4 %d " , data4 ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DOWNLOAD_DATASET_START_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( dataset_id & Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_ID_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( dataset_checksum & Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATASET_CHECKSUM_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( data0 & Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATA0_LSB ); ++ cmdByteBuffer[4] = (unsigned char) ( ( data1 & Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATA1_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ( ( data2 & Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATA2_LSB ); ++ cmdByteBuffer[6] = (unsigned char) ( ( data3 & Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATA3_LSB ); ++ cmdByteBuffer[7] = (unsigned char) ( ( data4 & Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_MASK ) << Si2168_DOWNLOAD_DATASET_START_CMD_DATA4_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 8, cmdByteBuffer) != 8) { ++ SiTRACE("Error writing DOWNLOAD_DATASET_START bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DOWNLOAD_DATASET_START response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DOWNLOAD_DATASET_START_CMD */ ++#ifdef Si2168_DVBC_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBC_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBC_STATUS (L1_Si2168_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[9]; ++ api->rsp->dvbc_status.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBC_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2168_DVBC_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBC_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2168_DVBC_STATUS_CMD_INTACK_MASK ) << Si2168_DVBC_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DVBC_STATUS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 9, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBC_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbc_status.pclint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBC_STATUS_RESPONSE_PCLINT_LSB ) & Si2168_DVBC_STATUS_RESPONSE_PCLINT_MASK ); ++ api->rsp->dvbc_status.dlint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBC_STATUS_RESPONSE_DLINT_LSB ) & Si2168_DVBC_STATUS_RESPONSE_DLINT_MASK ); ++ api->rsp->dvbc_status.berint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBC_STATUS_RESPONSE_BERINT_LSB ) & Si2168_DVBC_STATUS_RESPONSE_BERINT_MASK ); ++ api->rsp->dvbc_status.uncorint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBC_STATUS_RESPONSE_UNCORINT_LSB ) & Si2168_DVBC_STATUS_RESPONSE_UNCORINT_MASK ); ++ api->rsp->dvbc_status.pcl = (( ( (rspByteBuffer[2] )) >> Si2168_DVBC_STATUS_RESPONSE_PCL_LSB ) & Si2168_DVBC_STATUS_RESPONSE_PCL_MASK ); ++ api->rsp->dvbc_status.dl = (( ( (rspByteBuffer[2] )) >> Si2168_DVBC_STATUS_RESPONSE_DL_LSB ) & Si2168_DVBC_STATUS_RESPONSE_DL_MASK ); ++ api->rsp->dvbc_status.ber = (( ( (rspByteBuffer[2] )) >> Si2168_DVBC_STATUS_RESPONSE_BER_LSB ) & Si2168_DVBC_STATUS_RESPONSE_BER_MASK ); ++ api->rsp->dvbc_status.uncor = (( ( (rspByteBuffer[2] )) >> Si2168_DVBC_STATUS_RESPONSE_UNCOR_LSB ) & Si2168_DVBC_STATUS_RESPONSE_UNCOR_MASK ); ++ api->rsp->dvbc_status.cnr = (( ( (rspByteBuffer[3] )) >> Si2168_DVBC_STATUS_RESPONSE_CNR_LSB ) & Si2168_DVBC_STATUS_RESPONSE_CNR_MASK ); ++ api->rsp->dvbc_status.afc_freq = (((( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2168_DVBC_STATUS_RESPONSE_AFC_FREQ_LSB ) & Si2168_DVBC_STATUS_RESPONSE_AFC_FREQ_MASK) <>Si2168_DVBC_STATUS_RESPONSE_AFC_FREQ_SHIFT ); ++ api->rsp->dvbc_status.timing_offset = (((( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2168_DVBC_STATUS_RESPONSE_TIMING_OFFSET_LSB ) & Si2168_DVBC_STATUS_RESPONSE_TIMING_OFFSET_MASK) <>Si2168_DVBC_STATUS_RESPONSE_TIMING_OFFSET_SHIFT ); ++ api->rsp->dvbc_status.constellation = (( ( (rspByteBuffer[8] )) >> Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_LSB ) & Si2168_DVBC_STATUS_RESPONSE_CONSTELLATION_MASK ); ++ api->rsp->dvbc_status.sp_inv = (( ( (rspByteBuffer[8] )) >> Si2168_DVBC_STATUS_RESPONSE_SP_INV_LSB ) & Si2168_DVBC_STATUS_RESPONSE_SP_INV_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBC_STATUS_CMD */ ++#ifdef Si2168_DVBT2_FEF_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT2_FEF COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT2_FEF (L1_Si2168_Context *api, ++ unsigned char fef_tuner_flag, ++ unsigned char fef_tuner_flag_inv) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[12]; ++ api->rsp->dvbt2_fef.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT2_FEF "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((fef_tuner_flag > Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FEF_TUNER_FLAG %d " , fef_tuner_flag ); ++ if ((fef_tuner_flag_inv > Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FEF_TUNER_FLAG_INV %d ", fef_tuner_flag_inv ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT2_FEF_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( fef_tuner_flag & Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MASK ) << Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_LSB | ++ ( fef_tuner_flag_inv & Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_MASK ) << Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DVBT2_FEF bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 12, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT2_FEF response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbt2_fef.fef_type = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_FEF_RESPONSE_FEF_TYPE_LSB ) & Si2168_DVBT2_FEF_RESPONSE_FEF_TYPE_MASK ); ++ api->rsp->dvbt2_fef.fef_length = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 ) | (rspByteBuffer[6] << 16 ) | (rspByteBuffer[7] << 24 )) >> Si2168_DVBT2_FEF_RESPONSE_FEF_LENGTH_LSB ) & Si2168_DVBT2_FEF_RESPONSE_FEF_LENGTH_MASK ); ++ api->rsp->dvbt2_fef.fef_repetition = (( ( (rspByteBuffer[8] ) | (rspByteBuffer[9] << 8 ) | (rspByteBuffer[10] << 16 ) | (rspByteBuffer[11] << 24 )) >> Si2168_DVBT2_FEF_RESPONSE_FEF_REPETITION_LSB ) & Si2168_DVBT2_FEF_RESPONSE_FEF_REPETITION_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT2_FEF_CMD */ ++#ifdef Si2168_DVBT2_PLP_INFO_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT2_PLP_INFO COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT2_PLP_INFO (L1_Si2168_Context *api, ++ unsigned char plp_index) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[13]; ++ api->rsp->dvbt2_plp_info.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT2_PLP_INFO "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("PLP_INDEX %d ", plp_index ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT2_PLP_INFO_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( plp_index & Si2168_DVBT2_PLP_INFO_CMD_PLP_INDEX_MASK ) << Si2168_DVBT2_PLP_INFO_CMD_PLP_INDEX_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DVBT2_PLP_INFO bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 13, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT2_PLP_INFO response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbt2_plp_info.plp_id = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ID_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ID_MASK ); ++ api->rsp->dvbt2_plp_info.plp_payload_type = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_PAYLOAD_TYPE_MASK ); ++ api->rsp->dvbt2_plp_info.plp_type = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_TYPE_MASK ); ++ api->rsp->dvbt2_plp_info.first_frame_idx_msb = (( ( (rspByteBuffer[3] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_MSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_MSB_MASK ); ++ api->rsp->dvbt2_plp_info.first_rf_idx = (( ( (rspByteBuffer[3] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_RF_IDX_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_RF_IDX_MASK ); ++ api->rsp->dvbt2_plp_info.ff_flag = (( ( (rspByteBuffer[3] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_FF_FLAG_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_FF_FLAG_MASK ); ++ api->rsp->dvbt2_plp_info.plp_group_id_msb = (( ( (rspByteBuffer[4] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_MSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_MSB_MASK ); ++ api->rsp->dvbt2_plp_info.first_frame_idx_lsb = (( ( (rspByteBuffer[4] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_LSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_FIRST_FRAME_IDX_LSB_MASK ); ++ api->rsp->dvbt2_plp_info.plp_mod_msb = (( ( (rspByteBuffer[5] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_MSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_MSB_MASK ); ++ api->rsp->dvbt2_plp_info.plp_cod = (( ( (rspByteBuffer[5] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_COD_MASK ); ++ api->rsp->dvbt2_plp_info.plp_group_id_lsb = (( ( (rspByteBuffer[5] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_LSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_GROUP_ID_LSB_MASK ); ++ api->rsp->dvbt2_plp_info.plp_num_blocks_max_msb = (( ( (rspByteBuffer[6] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_MSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_MSB_MASK ); ++ api->rsp->dvbt2_plp_info.plp_fec_type = (( ( (rspByteBuffer[6] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_FEC_TYPE_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_FEC_TYPE_MASK ); ++ api->rsp->dvbt2_plp_info.plp_rot = (( ( (rspByteBuffer[6] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ROT_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_ROT_MASK ); ++ api->rsp->dvbt2_plp_info.plp_mod_lsb = (( ( (rspByteBuffer[6] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_LSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MOD_LSB_MASK ); ++ api->rsp->dvbt2_plp_info.frame_interval_msb = (( ( (rspByteBuffer[7] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_MSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_MSB_MASK ); ++ api->rsp->dvbt2_plp_info.plp_num_blocks_max_lsb = (( ( (rspByteBuffer[7] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_LSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_NUM_BLOCKS_MAX_LSB_MASK ); ++ api->rsp->dvbt2_plp_info.time_il_length_msb = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_MSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_MSB_MASK ); ++ api->rsp->dvbt2_plp_info.frame_interval_lsb = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_LSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_FRAME_INTERVAL_LSB_MASK ); ++ api->rsp->dvbt2_plp_info.time_il_type = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_TYPE_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_TYPE_MASK ); ++ api->rsp->dvbt2_plp_info.time_il_length_lsb = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_LSB_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_TIME_IL_LENGTH_LSB_MASK ); ++ api->rsp->dvbt2_plp_info.reserved_1_1 = (( ( (rspByteBuffer[10] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_1_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_1_MASK ); ++ api->rsp->dvbt2_plp_info.in_band_b_flag = (( ( (rspByteBuffer[10] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_B_FLAG_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_B_FLAG_MASK ); ++ api->rsp->dvbt2_plp_info.in_band_a_flag = (( ( (rspByteBuffer[10] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_A_FLAG_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_IN_BAND_A_FLAG_MASK ); ++ api->rsp->dvbt2_plp_info.static_flag = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_FLAG_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_FLAG_MASK ); ++ api->rsp->dvbt2_plp_info.plp_mode = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_PLP_MODE_MASK ); ++ api->rsp->dvbt2_plp_info.reserved_1_2 = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_2_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_RESERVED_1_2_MASK ); ++ api->rsp->dvbt2_plp_info.static_padding_flag = (( ( (rspByteBuffer[12] )) >> Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_PADDING_FLAG_LSB ) & Si2168_DVBT2_PLP_INFO_RESPONSE_STATIC_PADDING_FLAG_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT2_PLP_INFO_CMD */ ++#ifdef Si2168_DVBT2_PLP_SELECT_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT2_PLP_SELECT COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT2_PLP_SELECT (L1_Si2168_Context *api, ++ unsigned char plp_id, ++ unsigned char plp_id_sel_mode) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[3]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->dvbt2_plp_select.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT2_PLP_SELECT "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("PLP_ID %d " , plp_id ); ++ if ((plp_id_sel_mode > Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PLP_ID_SEL_MODE %d ", plp_id_sel_mode ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT2_PLP_SELECT_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( plp_id & Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_MASK ) << Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( plp_id_sel_mode & Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MASK ) << Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 3, cmdByteBuffer) != 3) { ++ SiTRACE("Error writing DVBT2_PLP_SELECT bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT2_PLP_SELECT response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT2_PLP_SELECT_CMD */ ++#ifdef Si2168_DVBT2_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT2_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT2_STATUS (L1_Si2168_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[14]; ++ api->rsp->dvbt2_status.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT2_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2168_DVBT2_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT2_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2168_DVBT2_STATUS_CMD_INTACK_MASK ) << Si2168_DVBT2_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DVBT2_STATUS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 14, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT2_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbt2_status.pclint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_STATUS_RESPONSE_PCLINT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_PCLINT_MASK ); ++ api->rsp->dvbt2_status.dlint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_STATUS_RESPONSE_DLINT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_DLINT_MASK ); ++ api->rsp->dvbt2_status.berint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_STATUS_RESPONSE_BERINT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_BERINT_MASK ); ++ api->rsp->dvbt2_status.uncorint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_STATUS_RESPONSE_UNCORINT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_UNCORINT_MASK ); ++ api->rsp->dvbt2_status.notdvbt2int = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2INT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2INT_MASK ); ++ api->rsp->dvbt2_status.pcl = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_STATUS_RESPONSE_PCL_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_PCL_MASK ); ++ api->rsp->dvbt2_status.dl = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_STATUS_RESPONSE_DL_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_DL_MASK ); ++ api->rsp->dvbt2_status.ber = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_STATUS_RESPONSE_BER_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_BER_MASK ); ++ api->rsp->dvbt2_status.uncor = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_STATUS_RESPONSE_UNCOR_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_UNCOR_MASK ); ++ api->rsp->dvbt2_status.notdvbt2 = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_NOTDVBT2_MASK ); ++ api->rsp->dvbt2_status.cnr = (( ( (rspByteBuffer[3] )) >> Si2168_DVBT2_STATUS_RESPONSE_CNR_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_CNR_MASK ); ++ api->rsp->dvbt2_status.afc_freq = (((( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2168_DVBT2_STATUS_RESPONSE_AFC_FREQ_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_AFC_FREQ_MASK) <>Si2168_DVBT2_STATUS_RESPONSE_AFC_FREQ_SHIFT ); ++ api->rsp->dvbt2_status.timing_offset = (((( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2168_DVBT2_STATUS_RESPONSE_TIMING_OFFSET_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_TIMING_OFFSET_MASK) <>Si2168_DVBT2_STATUS_RESPONSE_TIMING_OFFSET_SHIFT ); ++ api->rsp->dvbt2_status.constellation = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_CONSTELLATION_MASK ); ++ api->rsp->dvbt2_status.sp_inv = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT2_STATUS_RESPONSE_SP_INV_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_SP_INV_MASK ); ++ api->rsp->dvbt2_status.fef = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT2_STATUS_RESPONSE_FEF_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_FEF_MASK ); ++ api->rsp->dvbt2_status.fft_mode = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_MASK ); ++ api->rsp->dvbt2_status.guard_int = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_MASK ); ++ api->rsp->dvbt2_status.bw_ext = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT2_STATUS_RESPONSE_BW_EXT_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_BW_EXT_MASK ); ++ api->rsp->dvbt2_status.num_plp = (( ( (rspByteBuffer[10] )) >> Si2168_DVBT2_STATUS_RESPONSE_NUM_PLP_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_NUM_PLP_MASK ); ++ api->rsp->dvbt2_status.pilot_pattern = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_MASK ); ++ api->rsp->dvbt2_status.tx_mode = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_STATUS_RESPONSE_TX_MODE_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_TX_MODE_MASK ); ++ api->rsp->dvbt2_status.rotated = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_STATUS_RESPONSE_ROTATED_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_ROTATED_MASK ); ++ api->rsp->dvbt2_status.short_frame = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT2_STATUS_RESPONSE_SHORT_FRAME_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_SHORT_FRAME_MASK ); ++ api->rsp->dvbt2_status.code_rate = (( ( (rspByteBuffer[12] )) >> Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_MASK ); ++ api->rsp->dvbt2_status.plp_id = (( ( (rspByteBuffer[13] )) >> Si2168_DVBT2_STATUS_RESPONSE_PLP_ID_LSB ) & Si2168_DVBT2_STATUS_RESPONSE_PLP_ID_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT2_STATUS_CMD */ ++#ifdef Si2168_DVBT2_TX_ID_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT2_TX_ID COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT2_TX_ID (L1_Si2168_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[8]; ++ api->rsp->dvbt2_tx_id.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT2_TX_ID "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT2_TX_ID_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing DVBT2_TX_ID bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 8, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT2_TX_ID response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbt2_tx_id.tx_id_availability = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT2_TX_ID_RESPONSE_TX_ID_AVAILABILITY_LSB ) & Si2168_DVBT2_TX_ID_RESPONSE_TX_ID_AVAILABILITY_MASK ); ++ api->rsp->dvbt2_tx_id.cell_id = (( ( (rspByteBuffer[2] ) | (rspByteBuffer[3] << 8 )) >> Si2168_DVBT2_TX_ID_RESPONSE_CELL_ID_LSB ) & Si2168_DVBT2_TX_ID_RESPONSE_CELL_ID_MASK ); ++ api->rsp->dvbt2_tx_id.network_id = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2168_DVBT2_TX_ID_RESPONSE_NETWORK_ID_LSB ) & Si2168_DVBT2_TX_ID_RESPONSE_NETWORK_ID_MASK ); ++ api->rsp->dvbt2_tx_id.t2_system_id = (( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2168_DVBT2_TX_ID_RESPONSE_T2_SYSTEM_ID_LSB ) & Si2168_DVBT2_TX_ID_RESPONSE_T2_SYSTEM_ID_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT2_TX_ID_CMD */ ++#ifdef Si2168_DVBT_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT_STATUS (L1_Si2168_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[13]; ++ api->rsp->dvbt_status.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2168_DVBT_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2168_DVBT_STATUS_CMD_INTACK_MASK ) << Si2168_DVBT_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DVBT_STATUS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 13, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbt_status.pclint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_STATUS_RESPONSE_PCLINT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_PCLINT_MASK ); ++ api->rsp->dvbt_status.dlint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_STATUS_RESPONSE_DLINT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_DLINT_MASK ); ++ api->rsp->dvbt_status.berint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_STATUS_RESPONSE_BERINT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_BERINT_MASK ); ++ api->rsp->dvbt_status.uncorint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_STATUS_RESPONSE_UNCORINT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_UNCORINT_MASK ); ++ api->rsp->dvbt_status.notdvbtint = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_STATUS_RESPONSE_NOTDVBTINT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_NOTDVBTINT_MASK ); ++ api->rsp->dvbt_status.pcl = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT_STATUS_RESPONSE_PCL_LSB ) & Si2168_DVBT_STATUS_RESPONSE_PCL_MASK ); ++ api->rsp->dvbt_status.dl = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT_STATUS_RESPONSE_DL_LSB ) & Si2168_DVBT_STATUS_RESPONSE_DL_MASK ); ++ api->rsp->dvbt_status.ber = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT_STATUS_RESPONSE_BER_LSB ) & Si2168_DVBT_STATUS_RESPONSE_BER_MASK ); ++ api->rsp->dvbt_status.uncor = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT_STATUS_RESPONSE_UNCOR_LSB ) & Si2168_DVBT_STATUS_RESPONSE_UNCOR_MASK ); ++ api->rsp->dvbt_status.notdvbt = (( ( (rspByteBuffer[2] )) >> Si2168_DVBT_STATUS_RESPONSE_NOTDVBT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_NOTDVBT_MASK ); ++ api->rsp->dvbt_status.cnr = (( ( (rspByteBuffer[3] )) >> Si2168_DVBT_STATUS_RESPONSE_CNR_LSB ) & Si2168_DVBT_STATUS_RESPONSE_CNR_MASK ); ++ api->rsp->dvbt_status.afc_freq = (((( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2168_DVBT_STATUS_RESPONSE_AFC_FREQ_LSB ) & Si2168_DVBT_STATUS_RESPONSE_AFC_FREQ_MASK) <>Si2168_DVBT_STATUS_RESPONSE_AFC_FREQ_SHIFT ); ++ api->rsp->dvbt_status.timing_offset = (((( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2168_DVBT_STATUS_RESPONSE_TIMING_OFFSET_LSB ) & Si2168_DVBT_STATUS_RESPONSE_TIMING_OFFSET_MASK) <>Si2168_DVBT_STATUS_RESPONSE_TIMING_OFFSET_SHIFT ); ++ api->rsp->dvbt_status.constellation = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_LSB ) & Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_MASK ); ++ api->rsp->dvbt_status.sp_inv = (( ( (rspByteBuffer[8] )) >> Si2168_DVBT_STATUS_RESPONSE_SP_INV_LSB ) & Si2168_DVBT_STATUS_RESPONSE_SP_INV_MASK ); ++ api->rsp->dvbt_status.rate_hp = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT_STATUS_RESPONSE_RATE_HP_LSB ) & Si2168_DVBT_STATUS_RESPONSE_RATE_HP_MASK ); ++ api->rsp->dvbt_status.rate_lp = (( ( (rspByteBuffer[9] )) >> Si2168_DVBT_STATUS_RESPONSE_RATE_LP_LSB ) & Si2168_DVBT_STATUS_RESPONSE_RATE_LP_MASK ); ++ api->rsp->dvbt_status.fft_mode = (( ( (rspByteBuffer[10] )) >> Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_LSB ) & Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_MASK ); ++ api->rsp->dvbt_status.guard_int = (( ( (rspByteBuffer[10] )) >> Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_LSB ) & Si2168_DVBT_STATUS_RESPONSE_GUARD_INT_MASK ); ++ api->rsp->dvbt_status.hierarchy = (( ( (rspByteBuffer[11] )) >> Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_LSB ) & Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_MASK ); ++ api->rsp->dvbt_status.tps_length = (((( ( (rspByteBuffer[12] )) >> Si2168_DVBT_STATUS_RESPONSE_TPS_LENGTH_LSB ) & Si2168_DVBT_STATUS_RESPONSE_TPS_LENGTH_MASK) <>Si2168_DVBT_STATUS_RESPONSE_TPS_LENGTH_SHIFT ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT_STATUS_CMD */ ++#ifdef Si2168_DVBT_TPS_EXTRA_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_DVBT_TPS_EXTRA COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_DVBT_TPS_EXTRA (L1_Si2168_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[6]; ++ api->rsp->dvbt_tps_extra.STATUS = api->status; ++ ++ SiTRACE("Si2168 DVBT_TPS_EXTRA "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_DVBT_TPS_EXTRA_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing DVBT_TPS_EXTRA bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 6, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DVBT_TPS_EXTRA response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dvbt_tps_extra.lptimeslice = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_LPTIMESLICE_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_LPTIMESLICE_MASK ); ++ api->rsp->dvbt_tps_extra.hptimeslice = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_HPTIMESLICE_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_HPTIMESLICE_MASK ); ++ api->rsp->dvbt_tps_extra.lpmpefec = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_LPMPEFEC_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_LPMPEFEC_MASK ); ++ api->rsp->dvbt_tps_extra.hpmpefec = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_HPMPEFEC_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_HPMPEFEC_MASK ); ++ api->rsp->dvbt_tps_extra.dvbhinter = (( ( (rspByteBuffer[1] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_DVBHINTER_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_DVBHINTER_MASK ); ++ api->rsp->dvbt_tps_extra.cell_id = (((( ( (rspByteBuffer[2] ) | (rspByteBuffer[3] << 8 )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_CELL_ID_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_CELL_ID_MASK) <>Si2168_DVBT_TPS_EXTRA_RESPONSE_CELL_ID_SHIFT ); ++ api->rsp->dvbt_tps_extra.tps_res1 = (( ( (rspByteBuffer[4] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES1_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES1_MASK ); ++ api->rsp->dvbt_tps_extra.tps_res2 = (( ( (rspByteBuffer[4] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES2_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES2_MASK ); ++ api->rsp->dvbt_tps_extra.tps_res3 = (( ( (rspByteBuffer[5] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES3_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES3_MASK ); ++ api->rsp->dvbt_tps_extra.tps_res4 = (( ( (rspByteBuffer[5] )) >> Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES4_LSB ) & Si2168_DVBT_TPS_EXTRA_RESPONSE_TPS_RES4_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_DVBT_TPS_EXTRA_CMD */ ++#ifdef Si2168_EXIT_BOOTLOADER_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_EXIT_BOOTLOADER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_EXIT_BOOTLOADER (L1_Si2168_Context *api, ++ unsigned char func, ++ unsigned char ctsien) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->exit_bootloader.STATUS = api->status; ++ ++ SiTRACE("Si2168 EXIT_BOOTLOADER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((func > Si2168_EXIT_BOOTLOADER_CMD_FUNC_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FUNC %d " , func ); ++ if ((ctsien > Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CTSIEN %d ", ctsien ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_EXIT_BOOTLOADER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( func & Si2168_EXIT_BOOTLOADER_CMD_FUNC_MASK ) << Si2168_EXIT_BOOTLOADER_CMD_FUNC_LSB | ++ ( ctsien & Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_MASK ) << Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing EXIT_BOOTLOADER bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling EXIT_BOOTLOADER response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_EXIT_BOOTLOADER_CMD */ ++#ifdef Si2168_GET_PROPERTY_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_GET_PROPERTY COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_GET_PROPERTY (L1_Si2168_Context *api, ++ unsigned char reserved, ++ unsigned int prop) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[4]; ++ unsigned char rspByteBuffer[4]; ++ api->rsp->get_property.STATUS = api->status; ++ ++ SiTRACE("Si2168 GET_PROPERTY "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((reserved > Si2168_GET_PROPERTY_CMD_RESERVED_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED %d ", reserved ); ++ SiTRACE("PROP %d " , prop ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_GET_PROPERTY_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( reserved & Si2168_GET_PROPERTY_CMD_RESERVED_MASK ) << Si2168_GET_PROPERTY_CMD_RESERVED_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( prop & Si2168_GET_PROPERTY_CMD_PROP_MASK ) << Si2168_GET_PROPERTY_CMD_PROP_LSB ); ++ cmdByteBuffer[3] = (unsigned char) ((( prop & Si2168_GET_PROPERTY_CMD_PROP_MASK ) << Si2168_GET_PROPERTY_CMD_PROP_LSB )>>8); ++ ++ if (L0_WriteCommandBytes(api->i2c, 4, cmdByteBuffer) != 4) { ++ SiTRACE("Error writing GET_PROPERTY bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 4, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling GET_PROPERTY response\n"); ++ return error_code; ++ } ++ ++ api->rsp->get_property.reserved = (( ( (rspByteBuffer[1] )) >> Si2168_GET_PROPERTY_RESPONSE_RESERVED_LSB ) & Si2168_GET_PROPERTY_RESPONSE_RESERVED_MASK ); ++ api->rsp->get_property.data = (( ( (rspByteBuffer[2] ) | (rspByteBuffer[3] << 8 )) >> Si2168_GET_PROPERTY_RESPONSE_DATA_LSB ) & Si2168_GET_PROPERTY_RESPONSE_DATA_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_GET_PROPERTY_CMD */ ++#ifdef Si2168_GET_REV_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_GET_REV COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_GET_REV (L1_Si2168_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[10]; ++ api->rsp->get_rev.STATUS = api->status; ++ ++ SiTRACE("Si2168 GET_REV "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_GET_REV_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing GET_REV bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 10, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling GET_REV response\n"); ++ return error_code; ++ } ++ ++ api->rsp->get_rev.pn = (( ( (rspByteBuffer[1] )) >> Si2168_GET_REV_RESPONSE_PN_LSB ) & Si2168_GET_REV_RESPONSE_PN_MASK ); ++ api->rsp->get_rev.fwmajor = (( ( (rspByteBuffer[2] )) >> Si2168_GET_REV_RESPONSE_FWMAJOR_LSB ) & Si2168_GET_REV_RESPONSE_FWMAJOR_MASK ); ++ api->rsp->get_rev.fwminor = (( ( (rspByteBuffer[3] )) >> Si2168_GET_REV_RESPONSE_FWMINOR_LSB ) & Si2168_GET_REV_RESPONSE_FWMINOR_MASK ); ++ api->rsp->get_rev.patch = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2168_GET_REV_RESPONSE_PATCH_LSB ) & Si2168_GET_REV_RESPONSE_PATCH_MASK ); ++ api->rsp->get_rev.cmpmajor = (( ( (rspByteBuffer[6] )) >> Si2168_GET_REV_RESPONSE_CMPMAJOR_LSB ) & Si2168_GET_REV_RESPONSE_CMPMAJOR_MASK ); ++ api->rsp->get_rev.cmpminor = (( ( (rspByteBuffer[7] )) >> Si2168_GET_REV_RESPONSE_CMPMINOR_LSB ) & Si2168_GET_REV_RESPONSE_CMPMINOR_MASK ); ++ api->rsp->get_rev.cmpbuild = (( ( (rspByteBuffer[8] )) >> Si2168_GET_REV_RESPONSE_CMPBUILD_LSB ) & Si2168_GET_REV_RESPONSE_CMPBUILD_MASK ); ++ api->rsp->get_rev.chiprev = (( ( (rspByteBuffer[9] )) >> Si2168_GET_REV_RESPONSE_CHIPREV_LSB ) & Si2168_GET_REV_RESPONSE_CHIPREV_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_GET_REV_CMD */ ++#ifdef Si2168_PART_INFO_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_PART_INFO COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_PART_INFO (L1_Si2168_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[13]; ++ api->rsp->part_info.STATUS = api->status; ++ ++ SiTRACE("Si2168 PART_INFO "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_PART_INFO_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing PART_INFO bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 13, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling PART_INFO response\n"); ++ return error_code; ++ } ++ ++ api->rsp->part_info.chiprev = (( ( (rspByteBuffer[1] )) >> Si2168_PART_INFO_RESPONSE_CHIPREV_LSB ) & Si2168_PART_INFO_RESPONSE_CHIPREV_MASK ); ++ api->rsp->part_info.part = (( ( (rspByteBuffer[2] )) >> Si2168_PART_INFO_RESPONSE_PART_LSB ) & Si2168_PART_INFO_RESPONSE_PART_MASK ); ++ api->rsp->part_info.pmajor = (( ( (rspByteBuffer[3] )) >> Si2168_PART_INFO_RESPONSE_PMAJOR_LSB ) & Si2168_PART_INFO_RESPONSE_PMAJOR_MASK ); ++ api->rsp->part_info.pminor = (( ( (rspByteBuffer[4] )) >> Si2168_PART_INFO_RESPONSE_PMINOR_LSB ) & Si2168_PART_INFO_RESPONSE_PMINOR_MASK ); ++ api->rsp->part_info.pbuild = (( ( (rspByteBuffer[5] )) >> Si2168_PART_INFO_RESPONSE_PBUILD_LSB ) & Si2168_PART_INFO_RESPONSE_PBUILD_MASK ); ++ api->rsp->part_info.reserved = (( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2168_PART_INFO_RESPONSE_RESERVED_LSB ) & Si2168_PART_INFO_RESPONSE_RESERVED_MASK ); ++ api->rsp->part_info.serial = (( ( (rspByteBuffer[8] ) | (rspByteBuffer[9] << 8 ) | (rspByteBuffer[10] << 16 ) | (rspByteBuffer[11] << 24 )) >> Si2168_PART_INFO_RESPONSE_SERIAL_LSB ) & Si2168_PART_INFO_RESPONSE_SERIAL_MASK ); ++ api->rsp->part_info.romid = (( ( (rspByteBuffer[12] )) >> Si2168_PART_INFO_RESPONSE_ROMID_LSB ) & Si2168_PART_INFO_RESPONSE_ROMID_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_PART_INFO_CMD */ ++#ifdef Si2168_POWER_DOWN_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_POWER_DOWN COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_POWER_DOWN (L1_Si2168_Context *api) ++{ ++ unsigned char cmdByteBuffer[1]; ++ api->rsp->power_down.STATUS = api->status; ++ ++ SiTRACE("Si2168 POWER_DOWN "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_POWER_DOWN_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing POWER_DOWN bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_POWER_DOWN_CMD */ ++#ifdef Si2168_POWER_UP_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_POWER_UP COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_POWER_UP (L1_Si2168_Context *api, ++ unsigned char subcode, ++ unsigned char reset, ++ unsigned char reserved2, ++ unsigned char reserved4, ++ unsigned char reserved1, ++ unsigned char addr_mode, ++ unsigned char reserved5, ++ unsigned char func, ++ unsigned char clock_freq, ++ unsigned char ctsien, ++ unsigned char wake_up) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[8]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->power_up.STATUS = api->status; ++ ++ SiTRACE("Si2168 POWER_UP "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((subcode > Si2168_POWER_UP_CMD_SUBCODE_MAX ) || (subcode < Si2168_POWER_UP_CMD_SUBCODE_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("SUBCODE %d " , subcode ); ++ if ((reset > Si2168_POWER_UP_CMD_RESET_MAX ) || (reset < Si2168_POWER_UP_CMD_RESET_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESET %d " , reset ); ++ if ((reserved2 > Si2168_POWER_UP_CMD_RESERVED2_MAX ) || (reserved2 < Si2168_POWER_UP_CMD_RESERVED2_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED2 %d " , reserved2 ); ++ if ((reserved4 > Si2168_POWER_UP_CMD_RESERVED4_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED4 %d " , reserved4 ); ++ if ((reserved1 > Si2168_POWER_UP_CMD_RESERVED1_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED1 %d " , reserved1 ); ++ if ((addr_mode > Si2168_POWER_UP_CMD_ADDR_MODE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("ADDR_MODE %d " , addr_mode ); ++ if ((reserved5 > Si2168_POWER_UP_CMD_RESERVED5_MAX ) || (reserved5 < Si2168_POWER_UP_CMD_RESERVED5_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED5 %d " , reserved5 ); ++ if ((func > Si2168_POWER_UP_CMD_FUNC_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FUNC %d " , func ); ++ if ((clock_freq > Si2168_POWER_UP_CMD_CLOCK_FREQ_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CLOCK_FREQ %d ", clock_freq ); ++ if ((ctsien > Si2168_POWER_UP_CMD_CTSIEN_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CTSIEN %d " , ctsien ); ++ if ((wake_up > Si2168_POWER_UP_CMD_WAKE_UP_MAX ) || (wake_up < Si2168_POWER_UP_CMD_WAKE_UP_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("WAKE_UP %d " , wake_up ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_POWER_UP_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( subcode & Si2168_POWER_UP_CMD_SUBCODE_MASK ) << Si2168_POWER_UP_CMD_SUBCODE_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( reset & Si2168_POWER_UP_CMD_RESET_MASK ) << Si2168_POWER_UP_CMD_RESET_LSB ); ++ cmdByteBuffer[3] = (unsigned char) ( ( reserved2 & Si2168_POWER_UP_CMD_RESERVED2_MASK ) << Si2168_POWER_UP_CMD_RESERVED2_LSB ); ++ cmdByteBuffer[4] = (unsigned char) ( ( reserved4 & Si2168_POWER_UP_CMD_RESERVED4_MASK ) << Si2168_POWER_UP_CMD_RESERVED4_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ( ( reserved1 & Si2168_POWER_UP_CMD_RESERVED1_MASK ) << Si2168_POWER_UP_CMD_RESERVED1_LSB | ++ ( addr_mode & Si2168_POWER_UP_CMD_ADDR_MODE_MASK ) << Si2168_POWER_UP_CMD_ADDR_MODE_LSB | ++ ( reserved5 & Si2168_POWER_UP_CMD_RESERVED5_MASK ) << Si2168_POWER_UP_CMD_RESERVED5_LSB ); ++ cmdByteBuffer[6] = (unsigned char) ( ( func & Si2168_POWER_UP_CMD_FUNC_MASK ) << Si2168_POWER_UP_CMD_FUNC_LSB | ++ ( clock_freq & Si2168_POWER_UP_CMD_CLOCK_FREQ_MASK ) << Si2168_POWER_UP_CMD_CLOCK_FREQ_LSB| ++ ( ctsien & Si2168_POWER_UP_CMD_CTSIEN_MASK ) << Si2168_POWER_UP_CMD_CTSIEN_LSB ); ++ cmdByteBuffer[7] = (unsigned char) ( ( wake_up & Si2168_POWER_UP_CMD_WAKE_UP_MASK ) << Si2168_POWER_UP_CMD_WAKE_UP_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 8, cmdByteBuffer) != 8) { ++ SiTRACE("Error writing POWER_UP bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling POWER_UP response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_POWER_UP_CMD */ ++#ifdef Si2168_RSSI_ADC_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_RSSI_ADC COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_RSSI_ADC (L1_Si2168_Context *api, ++ unsigned char on_off) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[2]; ++ api->rsp->rssi_adc.STATUS = api->status; ++ ++ SiTRACE("Si2168 RSSI_ADC "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((on_off > Si2168_RSSI_ADC_CMD_ON_OFF_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("ON_OFF %d ", on_off ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_RSSI_ADC_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( on_off & Si2168_RSSI_ADC_CMD_ON_OFF_MASK ) << Si2168_RSSI_ADC_CMD_ON_OFF_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing RSSI_ADC bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 2, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling RSSI_ADC response\n"); ++ return error_code; ++ } ++ ++ api->rsp->rssi_adc.level = (( ( (rspByteBuffer[1] )) >> Si2168_RSSI_ADC_RESPONSE_LEVEL_LSB ) & Si2168_RSSI_ADC_RESPONSE_LEVEL_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_RSSI_ADC_CMD */ ++#ifdef Si2168_SCAN_CTRL_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_SCAN_CTRL COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_SCAN_CTRL (L1_Si2168_Context *api, ++ unsigned char action, ++ unsigned long tuned_rf_freq) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[8]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->scan_ctrl.STATUS = api->status; ++ ++ SiTRACE("Si2168 SCAN_CTRL "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((action > Si2168_SCAN_CTRL_CMD_ACTION_MAX ) || (action < Si2168_SCAN_CTRL_CMD_ACTION_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("ACTION %d " , action ); ++ SiTRACE("TUNED_RF_FREQ %d ", tuned_rf_freq ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_SCAN_CTRL_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( action & Si2168_SCAN_CTRL_CMD_ACTION_MASK ) << Si2168_SCAN_CTRL_CMD_ACTION_LSB ); ++ cmdByteBuffer[2] = (unsigned char)0x00; ++ cmdByteBuffer[3] = (unsigned char)0x00; ++ cmdByteBuffer[4] = (unsigned char) ( ( tuned_rf_freq & Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MASK ) << Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_LSB); ++ cmdByteBuffer[5] = (unsigned char) ((( tuned_rf_freq & Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MASK ) << Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_LSB)>>8); ++ cmdByteBuffer[6] = (unsigned char) ((( tuned_rf_freq & Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MASK ) << Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_LSB)>>16); ++ cmdByteBuffer[7] = (unsigned char) ((( tuned_rf_freq & Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_MASK ) << Si2168_SCAN_CTRL_CMD_TUNED_RF_FREQ_LSB)>>24); ++ ++ if (L0_WriteCommandBytes(api->i2c, 8, cmdByteBuffer) != 8) { ++ SiTRACE("Error writing SCAN_CTRL bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling SCAN_CTRL response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_SCAN_CTRL_CMD */ ++#ifdef Si2168_SCAN_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_SCAN_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_SCAN_STATUS (L1_Si2168_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[11]; ++ api->rsp->scan_status.STATUS = api->status; ++ ++ SiTRACE("Si2168 SCAN_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2168_SCAN_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_SCAN_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2168_SCAN_STATUS_CMD_INTACK_MASK ) << Si2168_SCAN_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing SCAN_STATUS bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 11, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling SCAN_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->scan_status.buzint = (( ( (rspByteBuffer[1] )) >> Si2168_SCAN_STATUS_RESPONSE_BUZINT_LSB ) & Si2168_SCAN_STATUS_RESPONSE_BUZINT_MASK ); ++ api->rsp->scan_status.reqint = (( ( (rspByteBuffer[1] )) >> Si2168_SCAN_STATUS_RESPONSE_REQINT_LSB ) & Si2168_SCAN_STATUS_RESPONSE_REQINT_MASK ); ++ api->rsp->scan_status.buz = (( ( (rspByteBuffer[2] )) >> Si2168_SCAN_STATUS_RESPONSE_BUZ_LSB ) & Si2168_SCAN_STATUS_RESPONSE_BUZ_MASK ); ++ api->rsp->scan_status.req = (( ( (rspByteBuffer[2] )) >> Si2168_SCAN_STATUS_RESPONSE_REQ_LSB ) & Si2168_SCAN_STATUS_RESPONSE_REQ_MASK ); ++ api->rsp->scan_status.scan_status = (( ( (rspByteBuffer[3] )) >> Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_LSB ) & Si2168_SCAN_STATUS_RESPONSE_SCAN_STATUS_MASK ); ++ api->rsp->scan_status.rf_freq = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 ) | (rspByteBuffer[6] << 16 ) | (rspByteBuffer[7] << 24 )) >> Si2168_SCAN_STATUS_RESPONSE_RF_FREQ_LSB ) & Si2168_SCAN_STATUS_RESPONSE_RF_FREQ_MASK ); ++ api->rsp->scan_status.symb_rate = (( ( (rspByteBuffer[8] ) | (rspByteBuffer[9] << 8 )) >> Si2168_SCAN_STATUS_RESPONSE_SYMB_RATE_LSB ) & Si2168_SCAN_STATUS_RESPONSE_SYMB_RATE_MASK ); ++ api->rsp->scan_status.modulation = (( ( (rspByteBuffer[10] )) >> Si2168_SCAN_STATUS_RESPONSE_MODULATION_LSB ) & Si2168_SCAN_STATUS_RESPONSE_MODULATION_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_SCAN_STATUS_CMD */ ++#ifdef Si2168_SET_PROPERTY_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_SET_PROPERTY COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_SET_PROPERTY (L1_Si2168_Context *api, ++ unsigned char reserved, ++ unsigned int prop, ++ unsigned int data) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[6]; ++ unsigned char rspByteBuffer[4]; ++ api->rsp->set_property.STATUS = api->status; ++ ++ SiTRACE("Si2168 SET_PROPERTY "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("RESERVED %d ", reserved ); ++ SiTRACE("PROP 0x%04x ", prop ); ++ SiTRACE("DATA %d " , data ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_SET_PROPERTY_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( reserved & Si2168_SET_PROPERTY_CMD_RESERVED_MASK ) << Si2168_SET_PROPERTY_CMD_RESERVED_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( prop & Si2168_SET_PROPERTY_CMD_PROP_MASK ) << Si2168_SET_PROPERTY_CMD_PROP_LSB ); ++ cmdByteBuffer[3] = (unsigned char) ((( prop & Si2168_SET_PROPERTY_CMD_PROP_MASK ) << Si2168_SET_PROPERTY_CMD_PROP_LSB )>>8); ++ cmdByteBuffer[4] = (unsigned char) ( ( data & Si2168_SET_PROPERTY_CMD_DATA_MASK ) << Si2168_SET_PROPERTY_CMD_DATA_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ((( data & Si2168_SET_PROPERTY_CMD_DATA_MASK ) << Si2168_SET_PROPERTY_CMD_DATA_LSB )>>8); ++ ++ if (L0_WriteCommandBytes(api->i2c, 6, cmdByteBuffer) != 6) { ++ SiTRACE("Error writing SET_PROPERTY bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ error_code = Si2168_pollForResponse(api, 4, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling SET_PROPERTY response\n"); ++ return error_code; ++ } ++ ++ api->rsp->set_property.reserved = (( ( (rspByteBuffer[1] )) >> Si2168_SET_PROPERTY_RESPONSE_RESERVED_LSB ) & Si2168_SET_PROPERTY_RESPONSE_RESERVED_MASK ); ++ api->rsp->set_property.data = (( ( (rspByteBuffer[2] ) | (rspByteBuffer[3] << 8 )) >> Si2168_SET_PROPERTY_RESPONSE_DATA_LSB ) & Si2168_SET_PROPERTY_RESPONSE_DATA_MASK ); ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_SET_PROPERTY_CMD */ ++#ifdef Si2168_START_CLK_CMD ++ /*---------------------------------------------------*/ ++/* Si2168_START_CLK COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2168_L1_START_CLK (L1_Si2168_Context *api, ++ unsigned char subcode, ++ unsigned char reserved1, ++ unsigned char tune_cap, ++ unsigned char reserved2, ++ unsigned int clk_mode, ++ unsigned char reserved3, ++ unsigned char reserved4, ++ unsigned char start_clk) ++{ ++ /*unsigned char error_code = 0;*/ ++ unsigned char cmdByteBuffer[13]; ++ api->rsp->start_clk.STATUS = api->status; ++ ++ SiTRACE("Si2168 START_CLK "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((subcode > Si2168_START_CLK_CMD_SUBCODE_MAX ) || (subcode < Si2168_START_CLK_CMD_SUBCODE_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("SUBCODE %d " , subcode ); ++ if ((reserved1 > Si2168_START_CLK_CMD_RESERVED1_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED1 %d ", reserved1 ); ++ if ((tune_cap > Si2168_START_CLK_CMD_TUNE_CAP_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("TUNE_CAP %d " , tune_cap ); ++ if ((reserved2 > Si2168_START_CLK_CMD_RESERVED2_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED2 %d ", reserved2 ); ++ if ((clk_mode > Si2168_START_CLK_CMD_CLK_MODE_MAX ) || (clk_mode < Si2168_START_CLK_CMD_CLK_MODE_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CLK_MODE %d " , clk_mode ); ++ if ((reserved3 > Si2168_START_CLK_CMD_RESERVED3_MAX) || (reserved3 < Si2168_START_CLK_CMD_RESERVED3_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED3 %d ", reserved3 ); ++ if ((reserved4 > Si2168_START_CLK_CMD_RESERVED4_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED4 %d ", reserved4 ); ++ if ((start_clk > Si2168_START_CLK_CMD_START_CLK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("START_CLK %d ", start_clk ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2168_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2168_START_CLK_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( subcode & Si2168_START_CLK_CMD_SUBCODE_MASK ) << Si2168_START_CLK_CMD_SUBCODE_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( reserved1 & Si2168_START_CLK_CMD_RESERVED1_MASK ) << Si2168_START_CLK_CMD_RESERVED1_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( tune_cap & Si2168_START_CLK_CMD_TUNE_CAP_MASK ) << Si2168_START_CLK_CMD_TUNE_CAP_LSB | ++ ( reserved2 & Si2168_START_CLK_CMD_RESERVED2_MASK ) << Si2168_START_CLK_CMD_RESERVED2_LSB); ++ cmdByteBuffer[4] = (unsigned char) ( ( clk_mode & Si2168_START_CLK_CMD_CLK_MODE_MASK ) << Si2168_START_CLK_CMD_CLK_MODE_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ((( clk_mode & Si2168_START_CLK_CMD_CLK_MODE_MASK ) << Si2168_START_CLK_CMD_CLK_MODE_LSB )>>8); ++ cmdByteBuffer[6] = (unsigned char) ( ( reserved3 & Si2168_START_CLK_CMD_RESERVED3_MASK ) << Si2168_START_CLK_CMD_RESERVED3_LSB); ++ cmdByteBuffer[7] = (unsigned char) ( ( reserved4 & Si2168_START_CLK_CMD_RESERVED4_MASK ) << Si2168_START_CLK_CMD_RESERVED4_LSB); ++ cmdByteBuffer[8] = (unsigned char)0x00; ++ cmdByteBuffer[9] = (unsigned char)0x00; ++ cmdByteBuffer[10] = (unsigned char)0x00; ++ cmdByteBuffer[11] = (unsigned char)0x00; ++ cmdByteBuffer[12] = (unsigned char) ( ( start_clk & Si2168_START_CLK_CMD_START_CLK_MASK ) << Si2168_START_CLK_CMD_START_CLK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 13, cmdByteBuffer) != 13) { ++ SiTRACE("Error writing START_CLK bytes!\n"); ++ return ERROR_Si2168_SENDING_COMMAND; ++ } ++ ++ return NO_Si2168_ERROR; ++} ++#endif /* Si2168_START_CLK_CMD */ ++ ++/*********************************************************************************************************************** ++ Si2168_L1_SetProperty function ++ Use: property set function ++ Used to call L1_SET_PROPERTY with the property Id and data provided. ++ Parameter: *api the Si2168 context ++ Parameter: prop the property Id ++ Parameter: data the property bytes ++ Returns: 0 if no error, an error code otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2168_L1_SetProperty(L1_Si2168_Context *api, unsigned int prop, int data) { ++ unsigned char reserved = 0; ++ return Si2168_L1_SET_PROPERTY (api, reserved, prop, data); ++} ++ ++ /* --------------------------------------------*/ ++ /* SET_PROPERTY2 FUNCTION */ ++ /* --------------------------------------------*/ ++unsigned char Si2168_L1_SetProperty2(L1_Si2168_Context *api, unsigned int prop_code) { ++ int data = 0; ++#ifdef Si2168_GET_PROPERTY_STRING ++ char msg[1000]; ++#endif /* Si2168_GET_PROPERTY_STRING */ ++ switch (prop_code) { ++ #ifdef Si2168_DD_BER_RESOL_PROP ++ case Si2168_DD_BER_RESOL_PROP_CODE: ++ data = (api->prop->dd_ber_resol.exp & Si2168_DD_BER_RESOL_PROP_EXP_MASK ) << Si2168_DD_BER_RESOL_PROP_EXP_LSB | ++ (api->prop->dd_ber_resol.mant & Si2168_DD_BER_RESOL_PROP_MANT_MASK) << Si2168_DD_BER_RESOL_PROP_MANT_LSB ; ++ break; ++ #endif /* Si2168_DD_BER_RESOL_PROP */ ++ #ifdef Si2168_DD_CBER_RESOL_PROP ++ case Si2168_DD_CBER_RESOL_PROP_CODE: ++ data = (api->prop->dd_cber_resol.exp & Si2168_DD_CBER_RESOL_PROP_EXP_MASK ) << Si2168_DD_CBER_RESOL_PROP_EXP_LSB | ++ (api->prop->dd_cber_resol.mant & Si2168_DD_CBER_RESOL_PROP_MANT_MASK) << Si2168_DD_CBER_RESOL_PROP_MANT_LSB ; ++ break; ++ #endif /* Si2168_DD_CBER_RESOL_PROP */ ++ ++ #ifdef Si2168_DD_FER_RESOL_PROP ++ case Si2168_DD_FER_RESOL_PROP_CODE: ++ data = (api->prop->dd_fer_resol.exp & Si2168_DD_FER_RESOL_PROP_EXP_MASK ) << Si2168_DD_FER_RESOL_PROP_EXP_LSB | ++ (api->prop->dd_fer_resol.mant & Si2168_DD_FER_RESOL_PROP_MANT_MASK) << Si2168_DD_FER_RESOL_PROP_MANT_LSB ; ++ break; ++ #endif /* Si2168_DD_FER_RESOL_PROP */ ++ #ifdef Si2168_DD_IEN_PROP ++ case Si2168_DD_IEN_PROP_CODE: ++ data = (api->prop->dd_ien.ien_bit0 & Si2168_DD_IEN_PROP_IEN_BIT0_MASK) << Si2168_DD_IEN_PROP_IEN_BIT0_LSB | ++ (api->prop->dd_ien.ien_bit1 & Si2168_DD_IEN_PROP_IEN_BIT1_MASK) << Si2168_DD_IEN_PROP_IEN_BIT1_LSB | ++ (api->prop->dd_ien.ien_bit2 & Si2168_DD_IEN_PROP_IEN_BIT2_MASK) << Si2168_DD_IEN_PROP_IEN_BIT2_LSB | ++ (api->prop->dd_ien.ien_bit3 & Si2168_DD_IEN_PROP_IEN_BIT3_MASK) << Si2168_DD_IEN_PROP_IEN_BIT3_LSB | ++ (api->prop->dd_ien.ien_bit4 & Si2168_DD_IEN_PROP_IEN_BIT4_MASK) << Si2168_DD_IEN_PROP_IEN_BIT4_LSB | ++ (api->prop->dd_ien.ien_bit5 & Si2168_DD_IEN_PROP_IEN_BIT5_MASK) << Si2168_DD_IEN_PROP_IEN_BIT5_LSB | ++ (api->prop->dd_ien.ien_bit6 & Si2168_DD_IEN_PROP_IEN_BIT6_MASK) << Si2168_DD_IEN_PROP_IEN_BIT6_LSB | ++ (api->prop->dd_ien.ien_bit7 & Si2168_DD_IEN_PROP_IEN_BIT7_MASK) << Si2168_DD_IEN_PROP_IEN_BIT7_LSB ; ++ break; ++ #endif /* Si2168_DD_IEN_PROP */ ++ #ifdef Si2168_DD_IF_INPUT_FREQ_PROP ++ case Si2168_DD_IF_INPUT_FREQ_PROP_CODE: ++ data = (api->prop->dd_if_input_freq.offset & Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_MASK) << Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_LSB ; ++ break; ++ #endif /* Si2168_DD_IF_INPUT_FREQ_PROP */ ++ #ifdef Si2168_DD_INT_SENSE_PROP ++ case Si2168_DD_INT_SENSE_PROP_CODE: ++ data = (api->prop->dd_int_sense.neg_bit0 & Si2168_DD_INT_SENSE_PROP_NEG_BIT0_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT0_LSB | ++ (api->prop->dd_int_sense.neg_bit1 & Si2168_DD_INT_SENSE_PROP_NEG_BIT1_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT1_LSB | ++ (api->prop->dd_int_sense.neg_bit2 & Si2168_DD_INT_SENSE_PROP_NEG_BIT2_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT2_LSB | ++ (api->prop->dd_int_sense.neg_bit3 & Si2168_DD_INT_SENSE_PROP_NEG_BIT3_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT3_LSB | ++ (api->prop->dd_int_sense.neg_bit4 & Si2168_DD_INT_SENSE_PROP_NEG_BIT4_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT4_LSB | ++ (api->prop->dd_int_sense.neg_bit5 & Si2168_DD_INT_SENSE_PROP_NEG_BIT5_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT5_LSB | ++ (api->prop->dd_int_sense.neg_bit6 & Si2168_DD_INT_SENSE_PROP_NEG_BIT6_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT6_LSB | ++ (api->prop->dd_int_sense.neg_bit7 & Si2168_DD_INT_SENSE_PROP_NEG_BIT7_MASK) << Si2168_DD_INT_SENSE_PROP_NEG_BIT7_LSB | ++ (api->prop->dd_int_sense.pos_bit0 & Si2168_DD_INT_SENSE_PROP_POS_BIT0_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT0_LSB | ++ (api->prop->dd_int_sense.pos_bit1 & Si2168_DD_INT_SENSE_PROP_POS_BIT1_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT1_LSB | ++ (api->prop->dd_int_sense.pos_bit2 & Si2168_DD_INT_SENSE_PROP_POS_BIT2_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT2_LSB | ++ (api->prop->dd_int_sense.pos_bit3 & Si2168_DD_INT_SENSE_PROP_POS_BIT3_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT3_LSB | ++ (api->prop->dd_int_sense.pos_bit4 & Si2168_DD_INT_SENSE_PROP_POS_BIT4_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT4_LSB | ++ (api->prop->dd_int_sense.pos_bit5 & Si2168_DD_INT_SENSE_PROP_POS_BIT5_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT5_LSB | ++ (api->prop->dd_int_sense.pos_bit6 & Si2168_DD_INT_SENSE_PROP_POS_BIT6_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT6_LSB | ++ (api->prop->dd_int_sense.pos_bit7 & Si2168_DD_INT_SENSE_PROP_POS_BIT7_MASK) << Si2168_DD_INT_SENSE_PROP_POS_BIT7_LSB ; ++ break; ++ #endif /* Si2168_DD_INT_SENSE_PROP */ ++ #ifdef Si2168_DD_MODE_PROP ++ case Si2168_DD_MODE_PROP_CODE: ++ data = (api->prop->dd_mode.bw & Si2168_DD_MODE_PROP_BW_MASK ) << Si2168_DD_MODE_PROP_BW_LSB | ++ (api->prop->dd_mode.modulation & Si2168_DD_MODE_PROP_MODULATION_MASK ) << Si2168_DD_MODE_PROP_MODULATION_LSB | ++ (api->prop->dd_mode.invert_spectrum & Si2168_DD_MODE_PROP_INVERT_SPECTRUM_MASK) << Si2168_DD_MODE_PROP_INVERT_SPECTRUM_LSB | ++ (api->prop->dd_mode.auto_detect & Si2168_DD_MODE_PROP_AUTO_DETECT_MASK ) << Si2168_DD_MODE_PROP_AUTO_DETECT_LSB ; ++ break; ++ #endif /* Si2168_DD_MODE_PROP */ ++ #ifdef Si2168_DD_PER_RESOL_PROP ++ case Si2168_DD_PER_RESOL_PROP_CODE: ++ data = (api->prop->dd_per_resol.exp & Si2168_DD_PER_RESOL_PROP_EXP_MASK ) << Si2168_DD_PER_RESOL_PROP_EXP_LSB | ++ (api->prop->dd_per_resol.mant & Si2168_DD_PER_RESOL_PROP_MANT_MASK) << Si2168_DD_PER_RESOL_PROP_MANT_LSB ; ++ break; ++ #endif /* Si2168_DD_PER_RESOL_PROP */ ++ #ifdef Si2168_DD_RSQ_BER_THRESHOLD_PROP ++ case Si2168_DD_RSQ_BER_THRESHOLD_PROP_CODE: ++ data = (api->prop->dd_rsq_ber_threshold.exp & Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_MASK ) << Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_LSB | ++ (api->prop->dd_rsq_ber_threshold.mant & Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_MASK) << Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_LSB ; ++ break; ++ #endif /* Si2168_DD_RSQ_BER_THRESHOLD_PROP */ ++ #ifdef Si2168_DD_TS_FREQ_PROP ++ case Si2168_DD_TS_FREQ_PROP_CODE: ++ data = (api->prop->dd_ts_freq.req_freq_10khz & Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_MASK) << Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_LSB ; ++ break; ++ #endif /* Si2168_DD_TS_FREQ_PROP */ ++ #ifdef Si2168_DD_TS_MODE_PROP ++ case Si2168_DD_TS_MODE_PROP_CODE: ++ data = (api->prop->dd_ts_mode.mode & Si2168_DD_TS_MODE_PROP_MODE_MASK ) << Si2168_DD_TS_MODE_PROP_MODE_LSB | ++ (api->prop->dd_ts_mode.clock & Si2168_DD_TS_MODE_PROP_CLOCK_MASK ) << Si2168_DD_TS_MODE_PROP_CLOCK_LSB | ++ (api->prop->dd_ts_mode.clk_gapped_en & Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_MASK ) << Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_LSB | ++ (api->prop->dd_ts_mode.ts_err_polarity & Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_MASK) << Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_LSB | ++ (api->prop->dd_ts_mode.special & Si2168_DD_TS_MODE_PROP_SPECIAL_MASK ) << Si2168_DD_TS_MODE_PROP_SPECIAL_LSB ; ++ break; ++ #endif /* Si2168_DD_TS_MODE_PROP */ ++ #ifdef Si2168_DD_TS_SETUP_PAR_PROP ++ case Si2168_DD_TS_SETUP_PAR_PROP_CODE: ++ data = (api->prop->dd_ts_setup_par.ts_data_strength & Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_STRENGTH_MASK) << Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_STRENGTH_LSB | ++ (api->prop->dd_ts_setup_par.ts_data_shape & Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_SHAPE_MASK ) << Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_SHAPE_LSB | ++ (api->prop->dd_ts_setup_par.ts_clk_strength & Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_STRENGTH_MASK ) << Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_STRENGTH_LSB | ++ (api->prop->dd_ts_setup_par.ts_clk_shape & Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHAPE_MASK ) << Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHAPE_LSB | ++ (api->prop->dd_ts_setup_par.ts_clk_invert & Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_MASK ) << Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_LSB | ++ (api->prop->dd_ts_setup_par.ts_clk_shift & Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHIFT_MASK ) << Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHIFT_LSB ; ++ break; ++ #endif /* Si2168_DD_TS_SETUP_PAR_PROP */ ++ #ifdef Si2168_DD_TS_SETUP_SER_PROP ++ case Si2168_DD_TS_SETUP_SER_PROP_CODE: ++ data = (api->prop->dd_ts_setup_ser.ts_data_strength & Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_STRENGTH_MASK) << Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_STRENGTH_LSB | ++ (api->prop->dd_ts_setup_ser.ts_data_shape & Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_SHAPE_MASK ) << Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_SHAPE_LSB | ++ (api->prop->dd_ts_setup_ser.ts_clk_strength & Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_STRENGTH_MASK ) << Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_STRENGTH_LSB | ++ (api->prop->dd_ts_setup_ser.ts_clk_shape & Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_SHAPE_MASK ) << Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_SHAPE_LSB | ++ (api->prop->dd_ts_setup_ser.ts_clk_invert & Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_MASK ) << Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_LSB | ++ (api->prop->dd_ts_setup_ser.ts_sync_duration & Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_MASK) << Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_LSB | ++ (api->prop->dd_ts_setup_ser.ts_byte_order & Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_MASK ) << Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_LSB ; ++ break; ++ #endif /* Si2168_DD_TS_SETUP_SER_PROP */ ++ #ifdef Si2168_DVBC_ADC_CREST_FACTOR_PROP ++ case Si2168_DVBC_ADC_CREST_FACTOR_PROP_CODE: ++ data = (api->prop->dvbc_adc_crest_factor.crest_factor & Si2168_DVBC_ADC_CREST_FACTOR_PROP_CREST_FACTOR_MASK) << Si2168_DVBC_ADC_CREST_FACTOR_PROP_CREST_FACTOR_LSB ; ++ break; ++ #endif /* Si2168_DVBC_ADC_CREST_FACTOR_PROP */ ++ #ifdef Si2168_DVBC_AFC_RANGE_PROP ++ case Si2168_DVBC_AFC_RANGE_PROP_CODE: ++ data = (api->prop->dvbc_afc_range.range_khz & Si2168_DVBC_AFC_RANGE_PROP_RANGE_KHZ_MASK) << Si2168_DVBC_AFC_RANGE_PROP_RANGE_KHZ_LSB ; ++ break; ++ #endif /* Si2168_DVBC_AFC_RANGE_PROP */ ++ #ifdef Si2168_DVBC_CONSTELLATION_PROP ++ case Si2168_DVBC_CONSTELLATION_PROP_CODE: ++ data = (api->prop->dvbc_constellation.constellation & Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_MASK) << Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_LSB ; ++ break; ++ #endif /* Si2168_DVBC_CONSTELLATION_PROP */ ++ #ifdef Si2168_DVBC_SYMBOL_RATE_PROP ++ case Si2168_DVBC_SYMBOL_RATE_PROP_CODE: ++ data = (api->prop->dvbc_symbol_rate.rate & Si2168_DVBC_SYMBOL_RATE_PROP_RATE_MASK) << Si2168_DVBC_SYMBOL_RATE_PROP_RATE_LSB ; ++ break; ++ #endif /* Si2168_DVBC_SYMBOL_RATE_PROP */ ++ ++ ++ #ifdef Si2168_DVBT2_ADC_CREST_FACTOR_PROP ++ case Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CODE: ++ data = (api->prop->dvbt2_adc_crest_factor.crest_factor & Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CREST_FACTOR_MASK) << Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CREST_FACTOR_LSB ; ++ break; ++ #endif /* Si2168_DVBT2_ADC_CREST_FACTOR_PROP */ ++ #ifdef Si2168_DVBT2_AFC_RANGE_PROP ++ case Si2168_DVBT2_AFC_RANGE_PROP_CODE: ++ data = (api->prop->dvbt2_afc_range.range_khz & Si2168_DVBT2_AFC_RANGE_PROP_RANGE_KHZ_MASK) << Si2168_DVBT2_AFC_RANGE_PROP_RANGE_KHZ_LSB ; ++ break; ++ #endif /* Si2168_DVBT2_AFC_RANGE_PROP */ ++ #ifdef Si2168_DVBT2_FEF_TUNER_PROP ++ case Si2168_DVBT2_FEF_TUNER_PROP_CODE: ++ data = (api->prop->dvbt2_fef_tuner.tuner_delay & Si2168_DVBT2_FEF_TUNER_PROP_TUNER_DELAY_MASK ) << Si2168_DVBT2_FEF_TUNER_PROP_TUNER_DELAY_LSB | ++ (api->prop->dvbt2_fef_tuner.tuner_freeze_time & Si2168_DVBT2_FEF_TUNER_PROP_TUNER_FREEZE_TIME_MASK ) << Si2168_DVBT2_FEF_TUNER_PROP_TUNER_FREEZE_TIME_LSB | ++ (api->prop->dvbt2_fef_tuner.tuner_unfreeze_time & Si2168_DVBT2_FEF_TUNER_PROP_TUNER_UNFREEZE_TIME_MASK) << Si2168_DVBT2_FEF_TUNER_PROP_TUNER_UNFREEZE_TIME_LSB ; ++ break; ++ #endif /* Si2168_DVBT2_FEF_TUNER_PROP */ ++ ++ #ifdef Si2168_DVBT_ADC_CREST_FACTOR_PROP ++ case Si2168_DVBT_ADC_CREST_FACTOR_PROP_CODE: ++ data = (api->prop->dvbt_adc_crest_factor.crest_factor & Si2168_DVBT_ADC_CREST_FACTOR_PROP_CREST_FACTOR_MASK) << Si2168_DVBT_ADC_CREST_FACTOR_PROP_CREST_FACTOR_LSB ; ++ break; ++ #endif /* Si2168_DVBT_ADC_CREST_FACTOR_PROP */ ++ #ifdef Si2168_DVBT_AFC_RANGE_PROP ++ case Si2168_DVBT_AFC_RANGE_PROP_CODE: ++ data = (api->prop->dvbt_afc_range.range_khz & Si2168_DVBT_AFC_RANGE_PROP_RANGE_KHZ_MASK) << Si2168_DVBT_AFC_RANGE_PROP_RANGE_KHZ_LSB ; ++ break; ++ #endif /* Si2168_DVBT_AFC_RANGE_PROP */ ++ #ifdef Si2168_DVBT_HIERARCHY_PROP ++ case Si2168_DVBT_HIERARCHY_PROP_CODE: ++ data = (api->prop->dvbt_hierarchy.stream & Si2168_DVBT_HIERARCHY_PROP_STREAM_MASK) << Si2168_DVBT_HIERARCHY_PROP_STREAM_LSB ; ++ break; ++ #endif /* Si2168_DVBT_HIERARCHY_PROP */ ++ ++ #ifdef Si2168_MASTER_IEN_PROP ++ case Si2168_MASTER_IEN_PROP_CODE: ++ data = (api->prop->master_ien.ddien & Si2168_MASTER_IEN_PROP_DDIEN_MASK ) << Si2168_MASTER_IEN_PROP_DDIEN_LSB | ++ (api->prop->master_ien.scanien & Si2168_MASTER_IEN_PROP_SCANIEN_MASK) << Si2168_MASTER_IEN_PROP_SCANIEN_LSB | ++ (api->prop->master_ien.errien & Si2168_MASTER_IEN_PROP_ERRIEN_MASK ) << Si2168_MASTER_IEN_PROP_ERRIEN_LSB | ++ (api->prop->master_ien.ctsien & Si2168_MASTER_IEN_PROP_CTSIEN_MASK ) << Si2168_MASTER_IEN_PROP_CTSIEN_LSB ; ++ break; ++ #endif /* Si2168_MASTER_IEN_PROP */ ++ #ifdef Si2168_SCAN_FMAX_PROP ++ case Si2168_SCAN_FMAX_PROP_CODE: ++ data = (api->prop->scan_fmax.scan_fmax & Si2168_SCAN_FMAX_PROP_SCAN_FMAX_MASK) << Si2168_SCAN_FMAX_PROP_SCAN_FMAX_LSB ; ++ break; ++ #endif /* Si2168_SCAN_FMAX_PROP */ ++ #ifdef Si2168_SCAN_FMIN_PROP ++ case Si2168_SCAN_FMIN_PROP_CODE: ++ data = (api->prop->scan_fmin.scan_fmin & Si2168_SCAN_FMIN_PROP_SCAN_FMIN_MASK) << Si2168_SCAN_FMIN_PROP_SCAN_FMIN_LSB ; ++ break; ++ #endif /* Si2168_SCAN_FMIN_PROP */ ++ #ifdef Si2168_SCAN_IEN_PROP ++ case Si2168_SCAN_IEN_PROP_CODE: ++ data = (api->prop->scan_ien.buzien & Si2168_SCAN_IEN_PROP_BUZIEN_MASK) << Si2168_SCAN_IEN_PROP_BUZIEN_LSB | ++ (api->prop->scan_ien.reqien & Si2168_SCAN_IEN_PROP_REQIEN_MASK) << Si2168_SCAN_IEN_PROP_REQIEN_LSB ; ++ break; ++ #endif /* Si2168_SCAN_IEN_PROP */ ++ #ifdef Si2168_SCAN_INT_SENSE_PROP ++ case Si2168_SCAN_INT_SENSE_PROP_CODE: ++ data = (api->prop->scan_int_sense.buznegen & Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_MASK) << Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_LSB | ++ (api->prop->scan_int_sense.reqnegen & Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_MASK) << Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_LSB | ++ (api->prop->scan_int_sense.buzposen & Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_MASK) << Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_LSB | ++ (api->prop->scan_int_sense.reqposen & Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_MASK) << Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_LSB ; ++ break; ++ #endif /* Si2168_SCAN_INT_SENSE_PROP */ ++ ++ #ifdef Si2168_SCAN_SYMB_RATE_MAX_PROP ++ case Si2168_SCAN_SYMB_RATE_MAX_PROP_CODE: ++ data = (api->prop->scan_symb_rate_max.scan_symb_rate_max & Si2168_SCAN_SYMB_RATE_MAX_PROP_SCAN_SYMB_RATE_MAX_MASK) << Si2168_SCAN_SYMB_RATE_MAX_PROP_SCAN_SYMB_RATE_MAX_LSB ; ++ break; ++ #endif /* Si2168_SCAN_SYMB_RATE_MAX_PROP */ ++ #ifdef Si2168_SCAN_SYMB_RATE_MIN_PROP ++ case Si2168_SCAN_SYMB_RATE_MIN_PROP_CODE: ++ data = (api->prop->scan_symb_rate_min.scan_symb_rate_min & Si2168_SCAN_SYMB_RATE_MIN_PROP_SCAN_SYMB_RATE_MIN_MASK) << Si2168_SCAN_SYMB_RATE_MIN_PROP_SCAN_SYMB_RATE_MIN_LSB ; ++ break; ++ #endif /* Si2168_SCAN_SYMB_RATE_MIN_PROP */ ++ #ifdef Si2168_SCAN_TER_CONFIG_PROP ++ case Si2168_SCAN_TER_CONFIG_PROP_CODE: ++ data = (api->prop->scan_ter_config.mode & Si2168_SCAN_TER_CONFIG_PROP_MODE_MASK ) << Si2168_SCAN_TER_CONFIG_PROP_MODE_LSB | ++ (api->prop->scan_ter_config.analog_bw & Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_MASK ) << Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_LSB | ++ (api->prop->scan_ter_config.search_analog & Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_MASK) << Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_LSB ; ++ break; ++ #endif /* Si2168_SCAN_TER_CONFIG_PROP */ ++ ++ default : break; ++ } ++#ifdef Si2168_GET_PROPERTY_STRING ++ Si2168_L1_FillPropertyStringText(api, prop_code, (char*)" ", msg); ++ SiTRACE("%s\n",msg); ++#endif /* Si2168_GET_PROPERTY_STRING */ ++ return Si2168_L1_SetProperty(api, prop_code & 0xffff , data); ++ } ++ ++/*********************************************************************************************************************** ++ Si2168_pollForResponse function ++ Use: command response retrieval function ++ Used to retrieve the command response in the provided buffer ++ Comments: The status byte definition being identical for all commands, ++ using this function to fill the status structure helps reducing the code size ++ max timeout = 1000 ms ++ ++ Parameter: nbBytes the number of response bytes to read ++ Parameter: pByteBuffer a buffer into which bytes will be stored ++ Returns: 0 if no error, an error code otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2168_pollForResponse (L1_Si2168_Context *api, unsigned int nbBytes, unsigned char *pByteBuffer) ++{ ++ //unsigned int start_time; ++ u32 ulCount, ulTick, ulDelay; ++ ulCount = 0; ++ ulTick = 50; ++ ulDelay = 1000/ulTick; ++ ++ //start_time = system_time(); ++ ++ //while (system_time() - start_time <1000) { /* wait a maximum of 1000ms */ ++ while(ulCount <= ulTick) { ++ if ((unsigned int)L0_ReadCommandBytes(api->i2c, nbBytes, pByteBuffer) != nbBytes) { ++ SiTRACE("Si2168_pollForResponse ERROR reading byte 0!\n"); ++ return ERROR_Si2168_POLLING_RESPONSE; ++ } ++ /* return response err flag if CTS set */ ++ if (pByteBuffer[0] & 0x80) { ++ return Si2168_CurrentResponseStatus(api, pByteBuffer[0]); ++ } ++ delayMS(ulDelay); ++ ulCount++; ++ } ++ ++ SiTRACE("Si2168_pollForResponse ERROR CTS Timeout!\n"); ++ return ERROR_Si2168_CTS_TIMEOUT; ++} ++/*********************************************************************************************************************** ++ Si2168_L1_API_ERROR_TEXT function ++ Use: Error information function ++ Used to retrieve a text based on an error code ++ Returns: the error text ++ Parameter: error_code the error code. ++ Porting: Useful for application development for debug purposes. ++ Porting: May not be required for the final application, can be removed if not used. ++ ***********************************************************************************************************************/ ++char* Si2168_L1_API_ERROR_TEXT(unsigned char error_code) { ++ switch (error_code) { ++ case NO_Si2168_ERROR : return (char *)"No Si2168 error"; ++ case ERROR_Si2168_ALLOCATING_CONTEXT : return (char *)"Error while allocating Si2168 context"; ++ case ERROR_Si2168_PARAMETER_OUT_OF_RANGE : return (char *)"Si2168 parameter(s) out of range"; ++ case ERROR_Si2168_SENDING_COMMAND : return (char *)"Error while sending Si2168 command"; ++ case ERROR_Si2168_CTS_TIMEOUT : return (char *)"Si2168 CTS timeout"; ++ case ERROR_Si2168_ERR : return (char *)"Si2168 Error (status 'err' bit 1)"; ++ case ERROR_Si2168_POLLING_CTS : return (char *)"Si2168 Error while polling CTS"; ++ case ERROR_Si2168_POLLING_RESPONSE : return (char *)"Si2168 Error while polling response"; ++ case ERROR_Si2168_LOADING_FIRMWARE : return (char *)"Si2168 Error while loading firmware"; ++ case ERROR_Si2168_LOADING_BOOTBLOCK : return (char *)"Si2168 Error while loading bootblock"; ++ case ERROR_Si2168_STARTING_FIRMWARE : return (char *)"Si2168 Error while starting firmware"; ++ case ERROR_Si2168_SW_RESET : return (char *)"Si2168 Error during software reset"; ++ case ERROR_Si2168_INCOMPATIBLE_PART : return (char *)"Si2168 Error Incompatible part"; ++/* _specific_error_text_string_insertion_start */ ++/* _specific_error_text_string_insertion_point */ ++ default : return (char *)"Unknown Si2168 error code"; ++ } ++} ++/*********************************************************************************************************************** ++ Si2168_L1_API_Patch function ++ Use: Patch information function ++ Used to send a number of bytes to the Si2168. Useful to download the firmware. ++ Returns: 0 if no error ++ Parameter: error_code the error code. ++ Porting: Useful for application development for debug purposes. ++ Porting: May not be required for the final application, can be removed if not used. ++ ***********************************************************************************************************************/ ++unsigned char Si2168_L1_API_Patch (L1_Si2168_Context *api, int iNbBytes, unsigned char *pucDataBuffer) { ++ unsigned char res; ++ unsigned char rspByteBuffer[1]; ++ ++// SiTRACE("Si2168 Patch %d bytes\n",iNbBytes); ++ ++ res = (unsigned char)L0_WriteCommandBytes(api->i2c, iNbBytes, pucDataBuffer); ++ if (res!=iNbBytes) { ++ SiTRACE("Si2168_L1_API_Patch error 0x%02x writing bytes: %s\n", res, Si2168_L1_API_ERROR_TEXT(res) ); ++ return res; ++ } ++ ++ res = Si2168_pollForResponse(api, 1, rspByteBuffer); ++ if (res != NO_Si2168_ERROR) { ++ SiTRACE("Si2168_L1_API_Patch error 0x%02x polling response: %s\n", res, Si2168_L1_API_ERROR_TEXT(res) ); ++ return ERROR_Si2168_POLLING_RESPONSE; ++ } ++ ++ return NO_Si2168_ERROR; ++} ++ ++/*********************************************************************************************************************** ++ Si2168_L1_API_Init function ++ Use: software initialisation function ++ Used to initialize the software context ++ Returns: 0 if no error ++ Comments: It should be called first and once only when starting the application ++ Parameter: **ppapi a pointer to the api context to initialize ++ Parameter: add the Si2168 I2C address ++ Porting: Allocation errors need to be properly managed. ++ Porting: I2C initialization needs to be adapted to use the available I2C functions ++ ***********************************************************************************************************************/ ++unsigned char Si2168_L1_API_Init (L1_Si2168_Context *api, int add) { ++ api->i2c = &(api->i2cObj); ++ ++ L0_Init(api->i2c); ++ L0_SetAddress(api->i2c, add, 0); ++ ++ api->cmd = &(api->cmdObj); ++ api->rsp = &(api->rspObj); ++ api->prop = &(api->propObj); ++ api->status = &(api->statusObj); ++ ++ api->tuner_ter_chip = 0; ++ api->tuner_ter_clock_input = Si2168_CLOCK_MODE_TER; ++ api->tuner_ter_clock_freq = Si2168_REF_FREQUENCY_TER; ++ ++ ++ return NO_Si2168_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_TerAutoDetect ++ DESCRIPTION: Set the Si2168 in Ter Auto Detect mode ++ ++ Parameter: Pointer to Si2168 Context ++ Returns: front_end->auto_detect_TER ++************************************************************************************************************************/ ++int Si2168_TerAutoDetect (Si2168_L2_Context *front_end) ++{ ++ front_end->auto_detect_TER = 1; ++ return front_end->auto_detect_TER; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_TerAutoDetectOff ++ DESCRIPTION: Set the Si2168 in Ter Auto Detect 'off' mode ++ ++ Parameter: Pointer to Si2168 Context ++ Returns: front_end->auto_detect_TER ++************************************************************************************************************************/ ++int Si2168_TerAutoDetectOff (Si2168_L2_Context *front_end) ++{ ++ front_end->auto_detect_TER = 0; ++ return front_end->auto_detect_TER; ++} ++ ++/************************************************************************************************************************ ++ Si2168_L2_Tuner_I2C_Enable function ++ Use: Tuner i2c bus connection ++ Used to allow communication with the tuners ++ Parameter: *front_end, the front-end handle ++************************************************************************************************************************/ ++unsigned char Si2168_L2_Tuner_I2C_Enable (Si2168_L2_Context *front_end) ++{ ++ return Si2168_L1_I2C_PASSTHROUGH(front_end->demod, Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_CODE, Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_CLOSE, Si2168_I2C_PASSTHROUGH_CMD_RESERVED_RESERVED); ++} ++/************************************************************************************************************************ ++ Si2168_L2_Tuner_I2C_Disable function ++ Use: Tuner i2c bus connection ++ Used to disconnect i2c communication with the tuners ++ Parameter: *front_end, the front-end handle ++************************************************************************************************************************/ ++unsigned char Si2168_L2_Tuner_I2C_Disable(Si2168_L2_Context *front_end) ++{ ++ return Si2168_L1_I2C_PASSTHROUGH(front_end->demod, Si2168_I2C_PASSTHROUGH_CMD_SUBCODE_CODE, Si2168_I2C_PASSTHROUGH_CMD_I2C_PASSTHRU_OPEN, Si2168_I2C_PASSTHROUGH_CMD_RESERVED_RESERVED); ++} ++/************************************************************************************************************************ ++ Si2168_L2_TER_FEF function ++ Use: TER tuner FEF activation function ++ Used to enable/disable the FEF mode in the terrestrial tuner ++ Comments: If the tuner is connected via the demodulator's I2C switch, enabling/disabling the i2c_passthru is required before/after tuning. ++ Parameter: *front_end, the front-end handle ++ Parameter: fef, a flag controlling the selection between FEF 'off'(0) and FEF 'on'(1) ++ Returns: 1 ++************************************************************************************************************************/ ++int Si2168_L2_TER_FEF (Si2168_L2_Context *front_end, int fef) ++{ ++ front_end = front_end; /* To avoid compiler warning if not used */ ++ SiTRACE("Si2168_L2_TER_FEF %d\n",fef); ++ ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN ++ if (front_end->demod->fef_mode == Si2168_FEF_MODE_FREEZE_PIN ) { ++ SiTRACE("FEF mode Si2168_FEF_MODE_FREEZE_PIN\n"); ++ L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN(front_end->tuner_ter, fef); ++ } ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN */ ++ ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP ++ if (front_end->demod->fef_mode == Si2168_FEF_MODE_SLOW_INITIAL_AGC) { ++ SiTRACE("FEF mode Si2168_FEF_MODE_SLOW_INITIAL_AGC (AGC slowed down after tuning)\n"); ++ } ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP */ ++ ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC_SETUP ++ if (front_end->demod->fef_mode == Si2168_FEF_MODE_SLOW_NORMAL_AGC ) { ++ SiTRACE("FEF mode Si2168_FEF_MODE_SLOW_NORMAL_AGC: AGC slowed down\n"); ++ L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC(front_end->tuner_ter, fef); ++ } ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC_SETUP */ ++ SiTRACE("Si2168_L2_TER_FEF done\n"); ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ Si2168_L2_TER_FEF_SETUP function ++ Use: TER tuner LPF setting function ++ Used to configure the FEF mode in the terrestrial tuner ++ Comments: If the tuner is connected via the demodulator's I2C switch, enabling/disabling the i2c_passthru is required before/after tuning. ++ Behavior: This function closes the Si2168's I2C switch then sets the TER FEF mode and finally reopens the I2C switch ++ Parameter: *front_end, the front-end handle ++ Parameter: fef, a flag controlling the selection between FEF 'off'(0) and FEF 'on'(1) ++ Returns: 1 ++************************************************************************************************************************/ ++int Si2168_L2_TER_FEF_SETUP (Si2168_L2_Context *front_end, int fef) ++{ ++ SiTRACE("Si2168_L2_TER_FEF_SETUP %d\n",fef); ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP ++ if (front_end->demod->fef_mode == Si2168_FEF_MODE_FREEZE_PIN ) { ++ SiTRACE("FEF mode Si2168_FEF_MODE_FREEZE_PIN\n"); ++ L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP(front_end->tuner_ter); ++} ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP */ ++ ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP ++ if (front_end->demod->fef_mode == Si2168_FEF_MODE_SLOW_INITIAL_AGC) { ++ SiTRACE("FEF mode Si2168_FEF_MODE_SLOW_INITIAL_AGC (AGC slowed down after tuning)\n"); ++ L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP(front_end->tuner_ter, fef); ++ } ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP */ ++ ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC_SETUP ++ if (front_end->demod->fef_mode == Si2168_FEF_MODE_SLOW_NORMAL_AGC ) { ++ SiTRACE("FEF mode Si2168_FEF_MODE_SLOW_NORMAL_AGC: AGC slowed down\n"); ++ L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC_SETUP(front_end->tuner_ter, fef); ++ } ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC */ ++ ++ Si2168_L2_TER_FEF(front_end, fef); ++ ++ SiTRACE("Si2168_L2_TER_FEF_SETUP done\n"); ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ Si2168_L2_SW_Init function ++ Use: software initialization function ++ Used to initialize the Si2168 and tuner structures ++ Behavior: This function performs all the steps necessary to initialize the Si2168 and tuner instances ++ Parameter: front_end, a pointer to the Si2168_L2_Context context to be initialized ++ Parameter: demodAdd, the I2C address of the demod ++ Parameter: tunerAdd, the I2C address of the tuner ++ Comments: It MUST be called first and once before using any other function. ++ It can be used to build a multi-demod/multi-tuner application, if called several times from the upper layer with different pointers and addresses ++ After execution, all demod and tuner functions are accessible. ++************************************************************************************************************************/ ++char Si2168_L2_SW_Init (Si2168_L2_Context *front_end ++ , int demodAdd ++ , int tunerAdd_Ter ++ ) ++{ ++ u32 fef_selection; ++ SiTRACE("Si2168_L2_SW_Init starting...\n"); ++ ++ /* Pointers initialization */ ++ front_end->demod = &(front_end->demodObj ); ++ front_end->first_init_done = 0; ++ front_end->tuner_ter = &(front_end->tuner_terObj); ++ front_end->TER_init_done = 0; ++ front_end->TER_tuner_init_done = 0; ++ front_end->auto_detect_TER = 0; ++ /* Calling underlying SW initialization functions */ ++ Si2168_L1_API_Init (front_end->demod, demodAdd); ++ L1_RF_TER_TUNER_Init (front_end->tuner_ter, tunerAdd_Ter); ++ front_end->demod->fef_mode = Si2168_FEF_MODE_SLOW_NORMAL_AGC; ++ fef_selection = Si2168_FEF_MODE; ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP ++ /* If the TER tuner has initial AGC speed control and it's the selected mode, activate it */ ++ if (fef_selection == Si2168_FEF_MODE_SLOW_INITIAL_AGC) { ++ SiTRACE("TER tuner FEF set to 'SLOW_INITIAL_AGC' mode\n"); ++ front_end->demod->fef_mode = Si2168_FEF_MODE_SLOW_INITIAL_AGC; ++ } ++ #ifdef L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP ++ /* If the TER tuner has an AGC freeze pin and it's the selected mode, activate it */ ++ if (fef_selection == Si2168_FEF_MODE_FREEZE_PIN ) { ++ SiTRACE("TER tuner FEF set to 'FREEZE_PIN' mode\n"); ++ front_end->demod->fef_mode = Si2168_FEF_MODE_FREEZE_PIN; ++ } ++ #else /* L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP */ ++ if (fef_selection == Si2168_FEF_MODE_FREEZE_PIN ) { ++ SiTRACE("TER tuner FEF can not use 'FREEZE_PIN' mode, using 'SLOW_INITIAL_AGC' mode instead\n"); ++ front_end->demod->fef_mode = Si2168_FEF_MODE_SLOW_INITIAL_AGC; ++ } ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP */ ++ #else /* L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP */ ++ SiTRACE("TER tuner FEF set to 'SLOW_NORMAL_AGC' mode\n"); ++ #endif /* L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP */ ++ ++ SiTRACE("Si2168_L2_SW_Init complete\n"); ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ NAME: SiLabs_API_TAG_TEXT ++ DESCRIPTION: SiLabs API information function used to retrieve the version information of the SiLabs API wrapper ++ Returns: the SiLabs API version information string ++************************************************************************************************************************/ ++char* SiLabs_API_TAG_TEXT (void) { return (char *)"V1.9.7"; } ++ ++/************************************************************************************************************************ ++ SiLabs_chip_detect function ++ Use: chip detection function ++ Used to detect whether the demodulator is a DTV demodulator ++ Behavior: This function uses raw i2c reads to check the presence of either a Si2167 or a Si2168 ++ Parameter: demodAdd, the I2C address of the demod ++ Returns: 2167 if there is a Si2167, 2168 if there is a 2168, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_chip_detect (int demodAdd) ++{ ++ int chip; ++ chip = 0; ++ SiTRACE("Detecting chip at address 0x%02x\n", demodAdd); ++ demodAdd = demodAdd; ++#ifdef Si2168_COMPATIBLE ++/* TODO (mdorval#2#): Find a way to detect the presence of a Si2168 */ ++ chip = 2168; ++#endif /* Si2168_COMPATIBLE */ ++ SiTRACE("Chip %d (%X)\n", chip, chip); ++ return chip; ++} ++ ++/************************************************************************************************************************ ++ NAME: SiLabs_API_TER_AutoDetect ++ DESCRIPTION: activation function for the TER auto detect mode ++ Parameter: front_end, Pointer to SILABS_FE_Context ++ Parameter: on_off, which is set to '0' to de-activate the TER auto-detect feature, ++ set to '1' to activate it and to any other value to retrieve the current status ++ Returns: the current state of auto_detect_TER ++************************************************************************************************************************/ ++int SiLabs_API_TER_AutoDetect (SILABS_FE_Context *front_end, int on_off) ++{ ++ front_end = front_end; /* To avoid compiler warning if not used */ ++ on_off = on_off; /* To avoid compiler warning if not used */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ if (on_off == 0) { Si2168_TerAutoDetectOff(front_end->Si2168_FE); } ++ if (on_off == 1) { Si2168_TerAutoDetect (front_end->Si2168_FE); } ++ return front_end->Si2168_FE->auto_detect_TER; ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_SW_Init function ++ Use: software initialization function ++ Used to initialize the DTV demodulator and tuner structures ++ Behavior: This function performs all the steps necessary to initialize the demod and tuner instances ++ Parameter: front_end, a pointer to the SILABS_FE_Context context to be initialized ++ Parameter: demodAdd, the I2C address of the demod ++ Parameter: tunerAdd, the I2C address of the tuner ++ Comments: It MUST be called first and once before using any other function. ++ It can be used to build a multi-demod/multi-tuner application, if called several times from the upper ++ layer with different pointers and addresses. ++ After execution, all demod and tuner functions are accessible. ++************************************************************************************************************************/ ++char SiLabs_API_SW_Init(SILABS_FE_Context *front_end, int demodAdd, int tunerAdd_Ter, int tunerAdd_Sat) ++ { ++ int chip; ++ ++// tunerAdd_Ter = tunerAdd_Ter; /* To avoid compiler warning */ ++// tunerAdd_Sat = tunerAdd_Sat; /* To avoid compiler warning */ ++ ++ SiTRACE("Wrapper Source code %s\n", SiLabs_API_TAG_TEXT() ); ++ SiTRACE("tunerAdd_Ter 0x%02x\n", tunerAdd_Ter); ++ SiTRACE("tunerAdd_Sat 0x%02x\n", tunerAdd_Sat); ++ /* Start by detecting the chip type */ ++ chip = SiLabs_chip_detect(demodAdd); ++ SiTRACE("chip '%d' ('%X')\n", chip, chip); ++ front_end->standard = -1; ++ ++ //WrapperI2C = &WrapperI2C_context; ++ //WrapperI2C->indexSize = 0; ++ //WrapperI2C->mustReadWithoutStop = 0; ++ ++#ifdef Si2168_COMPATIBLE ++ if (chip == 2168) { ++ front_end->Si2168_FE = &(front_end->Si2168_FE_Obj); ++ if (Si2168_L2_SW_Init (front_end->Si2168_FE ++ , demodAdd ++ , tunerAdd_Ter ++ ) ) { ++ front_end->chip = chip; ++ front_end->Silabs_init_done = 1; ++ return 1; ++ } else { ++ SiTRACE("ERROR initializing Si2168 context\n"); ++ return 0; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ SiTRACE("Unknown chip '%d'\n", front_end->chip); ++ SiERROR("SiLabs_API_SW_Init: Unknown chip !\n"); ++ return 0; ++} ++ ++/************************************************************************************************************************ ++ Silabs_Constel_Text function ++ Use: constel text retrieval function ++ Used to retrieve the constel text used by the DTV demodulator ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: constel, the value used by the top-level application (configurable in CUSTOM_Constel_Enum) ++************************************************************************************************************************/ ++char *Silabs_Constel_Text (CUSTOM_Constel_Enum constel) ++{ ++ switch (constel) { ++ case SILABS_QAMAUTO : { return (char *)"QAMAUTO"; break;} ++ case SILABS_QAM16 : { return (char *)"QAM16" ; break;} ++ case SILABS_QAM32 : { return (char *)"QAM32" ; break;} ++ case SILABS_QAM64 : { return (char *)"QAM64" ; break;} ++ case SILABS_QAM128 : { return (char *)"QAM128" ; break;} ++ case SILABS_QAM256 : { return (char *)"QAM256" ; break;} ++ case SILABS_QPSK : { return (char *)"QPSK" ; break;} ++ case SILABS_8PSK : { return (char *)"8PSK" ; break;} ++ default : { return (char *)"UNKNOWN"; break;} ++ } ++} ++/************************************************************************************************************************ ++ Silabs_Polarization_Text function ++ Use: polarization text retrieval function ++ Used to retrieve the polarization text used by the front-end ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: polarization, the value used by the top-level application (configurable in CUSTOM_Polarization_Enum) ++************************************************************************************************************************/ ++char *Silabs_Polarization_Text (CUSTOM_Polarization_Enum polarization) ++{ ++ switch (polarization) { ++ case SILABS_POLARIZATION_HORIZONTAL : { return (char *)"Horizontal"; break;} ++ case SILABS_POLARIZATION_VERTICAL : { return (char *)"Vertical" ; break;} ++ default : { return (char *)"UNKNOWN" ; break;} ++ } ++} ++ ++/************************************************************************************************************************ ++ Silabs_Band_Text function ++ Use: polarization text retrieval function ++ Used to retrieve the polarization text used by the front-end ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: polarization, the value used by the top-level application (configurable in CUSTOM_Band_Enum) ++************************************************************************************************************************/ ++char *Silabs_Band_Text (CUSTOM_Band_Enum band) ++{ ++ switch (band) { ++ case SILABS_BAND_LOW : { return (char *)"Low " ; break;} ++ case SILABS_BAND_HIGH: { return (char *)"High" ; break;} ++ default : { return (char *)"UNKNOWN"; break;} ++ } ++} ++/************************************************************************************************************************ ++ Silabs_Stream_Text function ++ Use: stream text retrieval function ++ Used to retrieve the stream text used by the DTV demodulator ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: stream, the value used by the top-level application (configurable in CUSTOM_Stream_Enum) ++************************************************************************************************************************/ ++char *Silabs_Stream_Text (CUSTOM_Stream_Enum stream) ++{ ++ switch (stream) { ++ case SILABS_HP : { return (char *)"HP" ; break;} ++ case SILABS_LP : { return (char *)"LP" ; break;} ++ default : { return (char *)"UNKNOWN"; break;} ++ } ++} ++/************************************************************************************************************************ ++ Silabs_Standard_Text function ++ Use: standard text retrieval function ++ Used to retrieve the standard text used by the DTV demodulator ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: standard, the value used by the top-level application (configurable in CUSTOM_Standard_Enum) ++************************************************************************************************************************/ ++char *Silabs_Standard_Text (CUSTOM_Standard_Enum standard) ++{ ++ switch (standard) { ++ case SILABS_ANALOG: {return (char *)"ANALOG" ;} ++ case SILABS_DVB_T : {return (char *)"DVB-T" ;} ++ case SILABS_DVB_T2: {return (char *)"DVB-T2" ;} ++ case SILABS_DVB_C : {return (char *)"DVB-C" ;} ++ case SILABS_DVB_C2: {return (char *)"DVB-C2" ;} ++ case SILABS_MCNS : {return (char *)"MCNS" ;} ++ case SILABS_DVB_S : {return (char *)"DVB-S" ;} ++ case SILABS_DVB_S2: {return (char *)"DVB-S2" ;} ++ case SILABS_DSS : {return (char *)"DSS" ;} ++ case SILABS_SLEEP : {return (char *)"SLEEP" ;} ++ default : {return (char *)"UNKNOWN";} ++ } ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_TS_Mode function ++ Use: Transport Stream control function ++ Used to switch the TS output in the desired mode ++ Parameter: mode the mode to switch to ++************************************************************************************************************************/ ++int SiLabs_API_TS_Mode (SILABS_FE_Context *front_end, int ts_mode) ++{ ++ int valid_mode; ++#ifdef USB_Capability ++ int gpif_on; ++ double retdval; ++ char rettxtBuffer[256]; ++ char *rettxt; ++ rettxt = rettxtBuffer; ++ gpif_on = 1; ++#endif /* USB_Capability */ ++ valid_mode = 0; ++#ifdef USB_Capability ++ if (ts_mode != SILABS_TS_GPIF) { L0_Cypress_Configure("-gpif" ,"off", 0 , &retdval, &rettxt);} ++#endif /* USB_Capability */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (ts_mode) { ++ case SILABS_TS_SERIAL : ++ { ++ SiTRACE("TS Mode = SILABS_TS_SERIAL!\n"); ++ front_end->Si2168_FE->demod->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_SERIAL; ++ break; ++ } ++ case SILABS_TS_PARALLEL: ++ { ++ SiTRACE("TS Mode = SILABS_TS_PARALLEL!\n"); ++ front_end->Si2168_FE->demod->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_PARALLEL; ++ break; ++ } ++ case SILABS_TS_GPIF : { front_end->Si2168_FE->demod->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_GPIF ; break; } ++ case SILABS_TS_TRISTATE: { front_end->Si2168_FE->demod->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_OFF ; break; } ++ default : { return SiLabs_API_TS_Mode(front_end, SILABS_TS_TRISTATE) ; break; } ++ } ++ ++ Si2168_L1_SetProperty2(front_end->Si2168_FE->demod, Si2168_DD_TS_MODE_PROP_CODE); ++ valid_mode = 1; ++ } ++#endif /* Si2168_COMPATIBLE */ ++ if (valid_mode) { ++#ifdef USB_Capability ++ if (ts_mode == SILABS_TS_GPIF ) { ++ L0_Cypress_Configure("-gpif" ,"on" , 0, &retdval, &rettxt); /* Starting Cypress gpif state machine */ ++ L0_Cypress_Configure("-gpif_clk" ,"on" , 0, &retdval, &rettxt); /* Starting Cypress gpif clock */ ++ L0_Cypress_Process ("ts" ,"start" , 0, &retdval, &rettxt); /* Starting Cypress TS transfer over USB */ ++ } else { ++ if (gpif_on) { ++ L0_Cypress_Process ("ts" ,"stop" , 0, &retdval, &rettxt); /* Stopping Cypress TS transfer over USB */ ++ L0_Cypress_Configure("-gpif" ,"off" , 0, &retdval, &rettxt); /* Stopping Cypress gpif state machine */ ++ L0_Cypress_Configure("-gpif_clk" ,"tristate", 0, &retdval, &rettxt); /* Stopping Cypress gpif clock */ ++ } ++ } ++#endif /* USB_Capability */ ++ return ts_mode; ++ } else { ++ return -1; ++ } ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_Tuner_I2C_Enable function ++ Use: Demdo Loop through control function ++ Used to switch the I2C loopthrough on, allowing commnication with the tuners ++ Return: the final mode (-1 if not known) ++************************************************************************************************************************/ ++int SiLabs_API_Tuner_I2C_Enable (SILABS_FE_Context *front_end) ++{ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { Si2168_L2_Tuner_I2C_Enable (front_end->Si2168_FE); return 1;} ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ SiLabs_API_Tuner_I2C_Disable function ++ Use: Demdo Loop through control function ++ Used to switch the I2C loopthrough off, stopping commnication with the tuners ++ Return: the final mode (-1 if not known) ++************************************************************************************************************************/ ++int SiLabs_API_Tuner_I2C_Disable (SILABS_FE_Context *front_end) ++{ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { Si2168_L2_Tuner_I2C_Disable (front_end->Si2168_FE); return 0;} ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ SiLabs_API_SAT_Tuner_status function ++ Use: Satellite tuner status function ++ Used to retrieve the status of the SAT tuner in a structure ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: status, a pointer to the status structure (configurable in CUSTOM_Status_Struct) ++ Return: 1 if successful, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_API_SAT_Tuner_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status) ++{ ++// int ref_level; ++// status = status; /* To avoid compiler warning */ ++// ref_level = 0; ++// front_end = front_end; /* To avoid compiler warning */ ++// status = status; /* To avoid compiler warning */ ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_TER_Tuner_status function ++ Use: Terrestrial tuner status function ++ Used to retrieve the status of the TER tuner in a structure ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: status, a pointer to the status structure (configurable in CUSTOM_Status_Struct) ++ Return: 1 if successful, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_API_TER_Tuner_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status) ++{ ++// SiLabs_API_Tuner_I2C_Enable (front_end); ++#ifdef TER_TUNER_CUSTOMTER ++ TUNERNAME_TER_Context *tuner_ter; ++#endif /* TER_TUNER_CUSTOMTER */ ++#ifdef TER_TUNER_DTT759x ++ DTT759x_Context *tuner_ter; ++#endif /* TER_TUNER_DTT759x */ ++#ifdef TER_TUNER_Si2146 ++ L1_Si2146_Context *tuner_ter; ++#endif /* TER_TUNER_Si2146 */ ++#ifdef TER_TUNER_Si2148 ++ L1_Si2148_Context *tuner_ter; ++#endif /* TER_TUNER_Si2148 */ ++#ifdef TER_TUNER_Si2156 ++ L1_Si2156_Context *tuner_ter; ++#endif /* TER_TUNER_Si2156 */ ++#ifdef TER_TUNER_Si2158 ++ L1_Si2158_Context *tuner_ter; ++#endif /* TER_TUNER_Si2158 */ ++#ifdef TER_TUNER_Si2173 ++ L1_Si2173_Context *tuner_ter; ++#endif /* TER_TUNER_Si2173 */ ++#ifdef TER_TUNER_Si2176 ++ L1_Si2176_Context *tuner_ter; ++#endif /* TER_TUNER_Si2176 */ ++#ifdef TER_TUNER_Si2178 ++ L1_Si2178_Context *tuner_ter; ++#endif /* TER_TUNER_Si2178 */ ++#ifdef TER_TUNER_Si2185 ++ L1_Si2185_Context *tuner_ter; ++#endif /* TER_TUNER_Si2185 */ ++#ifdef TER_TUNER_Si2196 ++ L1_Si2196_Context *tuner_ter; ++#endif /* TER_TUNER_Si2196 */ ++#ifdef TER_TUNER_NO_TER ++ TER_TUNER_CONTEXT *tuner_ter; ++#endif /* TER_TUNER_NO_TER */ ++ tuner_ter = NULL; ++ SiTRACE("SiLabs_API_TER_Tuner_status\n"); ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { tuner_ter = front_end->Si2168_FE->tuner_ter; } ++#endif /* Si2168_COMPATIBLE */ ++ if (tuner_ter == NULL) { ++ SiTRACE("No tuner_ter defined, SiLabs_API_TER_Tuner_status can't be executed!\n"); ++ return 0; ++ } ++ SiLabs_API_Tuner_I2C_Enable (front_end); ++#ifdef TER_TUNER_DTT759x ++ status->freq = tuner_ter->RF; ++#endif /* TER_TUNER_DTT759x */ ++#ifdef TER_TUNER_Si2146 ++ Si2146_L1_TUNER_STATUS (tuner_ter, Si2146_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2146_L1_ATV_STATUS (tuner_ter, Si2146_ATV_STATUS_CMD_INTACK_OK ); ++ } else { ++ Si2146_L1_DTV_STATUS (tuner_ter, Si2146_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++ status->RSSI = tuner_ter->rsp->tuner_status.rssi; ++#endif /* TER_TUNER_Si2146 */ ++#ifdef TER_TUNER_Si2148 ++ Si2148_L1_TUNER_STATUS (tuner_ter, Si2148_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ status->RSSI = tuner_ter->rsp->tuner_status.rssi; ++#endif /* TER_TUNER_Si2148 */ ++#ifdef TER_TUNER_Si2156 ++ Si2156_L1_TUNER_STATUS (tuner_ter, Si2156_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2156_L1_ATV_STATUS (tuner_ter, Si2156_ATV_STATUS_CMD_INTACK_OK ); ++ } else { ++ Si2156_L1_DTV_STATUS (tuner_ter, Si2156_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++ status->RSSI = tuner_ter->rsp->tuner_status.rssi; ++#endif /* TER_TUNER_Si2156 */ ++#ifdef TER_TUNER_Si2158 ++ Si2158_L1_TUNER_STATUS (tuner_ter, Si2158_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2158_L1_ATV_STATUS (tuner_ter, Si2158_ATV_STATUS_CMD_INTACK_OK ); ++ } else { ++ Si2158_L1_DTV_STATUS (tuner_ter, Si2158_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++ status->RSSI = tuner_ter->rsp->tuner_status.rssi; ++#endif /* TER_TUNER_Si2158 */ ++#ifdef TER_TUNER_Si2173 ++ Si2173_L1_TUNER_STATUS (tuner_ter, Si2173_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2173_L1_ATV_STATUS (tuner_ter, Si2173_ATV_STATUS_CMD_INTACK_OK ); ++ status->audio_chan_filt_bw = tuner_ter->rsp->atv_status.audio_chan_bw; ++ status->chl = tuner_ter->rsp->atv_status.chl; ++ status->ATV_Sync_Lock = tuner_ter->rsp->atv_status.pcl; ++ status->ATV_Master_Lock = tuner_ter->rsp->atv_status.dl; ++ status->snrl = tuner_ter->rsp->atv_status.snrl; ++ status->snrh = tuner_ter->rsp->atv_status.snrh; ++ status->video_snr = tuner_ter->rsp->atv_status.video_snr; ++ status->afc_freq = tuner_ter->rsp->atv_status.afc_freq; ++ status->video_sc_spacing = tuner_ter->rsp->atv_status.video_sc_spacing; ++ status->video_sys = tuner_ter->rsp->atv_status.video_sys; ++ status->color = tuner_ter->rsp->atv_status.color; ++ status->trans = tuner_ter->rsp->atv_status.trans; ++ status->audio_sys = tuner_ter->rsp->atv_status.audio_sys; ++ } else { ++ Si2173_L1_DTV_STATUS (tuner_ter, Si2173_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++#endif /* TER_TUNER_Si2173 */ ++#ifdef TER_TUNER_Si2176 ++ Si2176_L1_TUNER_STATUS (tuner_ter, Si2176_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2176_L1_ATV_STATUS (tuner_ter, Si2176_ATV_STATUS_CMD_INTACK_OK ); ++ status->audio_chan_filt_bw = tuner_ter->rsp->atv_status.audio_chan_bw; ++ status->chl = tuner_ter->rsp->atv_status.chl; ++ status->ATV_Sync_Lock = tuner_ter->rsp->atv_status.pcl; ++ status->ATV_Master_Lock = tuner_ter->rsp->atv_status.dl; ++ status->snrl = tuner_ter->rsp->atv_status.snrl; ++ status->snrh = tuner_ter->rsp->atv_status.snrh; ++ status->video_snr = tuner_ter->rsp->atv_status.video_snr; ++ status->afc_freq = tuner_ter->rsp->atv_status.afc_freq; ++ status->video_sc_spacing = tuner_ter->rsp->atv_status.video_sc_spacing; ++ status->video_sys = tuner_ter->rsp->atv_status.video_sys; ++ status->color = tuner_ter->rsp->atv_status.color; ++ status->trans = tuner_ter->rsp->atv_status.trans; ++ status->audio_sys = tuner_ter->rsp->atv_status.audio_sys; ++ status->audio_demod_mode = tuner_ter->rsp->atv_status.audio_demod_mode; ++ } else { ++ Si2176_L1_DTV_STATUS (tuner_ter, Si2176_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++#endif /* TER_TUNER_Si2176 */ ++#ifdef TER_TUNER_Si2178 ++ Si2178_L1_TUNER_STATUS (tuner_ter, Si2178_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2178_L1_ATV_STATUS (tuner_ter, Si2178_ATV_STATUS_CMD_INTACK_OK ); ++ status->audio_chan_filt_bw = tuner_ter->rsp->atv_status.audio_chan_bw; ++ status->chl = tuner_ter->rsp->atv_status.chl; ++ status->ATV_Sync_Lock = tuner_ter->rsp->atv_status.pcl; ++ status->ATV_Master_Lock = tuner_ter->rsp->atv_status.dl; ++ status->snrl = tuner_ter->rsp->atv_status.snrl; ++ status->snrh = tuner_ter->rsp->atv_status.snrh; ++ status->video_snr = tuner_ter->rsp->atv_status.video_snr; ++ status->afc_freq = tuner_ter->rsp->atv_status.afc_freq; ++ status->video_sc_spacing = tuner_ter->rsp->atv_status.video_sc_spacing; ++ status->video_sys = tuner_ter->rsp->atv_status.video_sys; ++ status->color = tuner_ter->rsp->atv_status.color; ++ status->audio_sys = tuner_ter->rsp->atv_status.audio_sys; ++ } else { ++ Si2178_L1_DTV_STATUS (tuner_ter, Si2178_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++#endif /* TER_TUNER_Si2178 */ ++#ifdef TER_TUNER_Si2196 ++ Si2196_L1_TUNER_STATUS (tuner_ter, Si2196_TUNER_STATUS_CMD_INTACK_OK ); ++ status->vco_code = tuner_ter->rsp->tuner_status.vco_code; ++ status->tc = tuner_ter->rsp->tuner_status.tc; ++ status->rssil = tuner_ter->rsp->tuner_status.rssil; ++ status->rssih = tuner_ter->rsp->tuner_status.rssih; ++ status->rssi = tuner_ter->rsp->tuner_status.rssi; ++ status->freq = tuner_ter->rsp->tuner_status.freq; ++ status->mode = tuner_ter->rsp->tuner_status.mode; ++ if (front_end->standard == SILABS_ANALOG) { ++ Si2196_L1_ATV_STATUS (tuner_ter, Si2196_ATV_STATUS_CMD_INTACK_OK ); ++ status->audio_chan_filt_bw = tuner_ter->rsp->atv_status.audio_chan_filt_bw; ++ status->chl = tuner_ter->rsp->atv_status.chl; ++ status->ATV_Sync_Lock = tuner_ter->rsp->atv_status.pcl; ++ status->ATV_Master_Lock = tuner_ter->rsp->atv_status.dl; ++ status->snrl = tuner_ter->rsp->atv_status.snrl; ++ status->snrh = tuner_ter->rsp->atv_status.snrh; ++ status->video_snr = tuner_ter->rsp->atv_status.video_snr; ++ status->afc_freq = tuner_ter->rsp->atv_status.afc_freq; ++ status->video_sc_spacing = tuner_ter->rsp->atv_status.video_sc_spacing; ++ status->video_sys = tuner_ter->rsp->atv_status.video_sys; ++ status->color = tuner_ter->rsp->atv_status.color; ++ status->trans = tuner_ter->rsp->atv_status.trans; ++ status->audio_sys = tuner_ter->rsp->atv_status.audio_sys; ++ } else { ++ Si2196_L1_DTV_STATUS (tuner_ter, Si2196_DTV_STATUS_CMD_INTACK_OK ); ++ status->chl = tuner_ter->rsp->dtv_status.chl; ++ status->bw = tuner_ter->rsp->dtv_status.bw; ++ status->modulation = tuner_ter->rsp->dtv_status.modulation; ++ } ++#endif /* TER_TUNER_Si2196 */ ++ SiLabs_API_Tuner_I2C_Disable (front_end); ++ front_end = front_end; /* To avoid compiler warning */ ++ status = status; /* To avoid compiler warning */ ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_Demod_status function ++ Use: stream code function ++ Used to retrieve the status of the demod in a structure ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: status, a pointer to the status structure (configurable in CUSTOM_Status_Struct) ++ Return: 1 if successful, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_API_Demod_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status) ++{ ++ SiTRACE("SiLabs_API_Demod_status %d\n", front_end->chip); ++ /* Set to 0 all info used to relock */ ++ status->demod_lock = 0; ++ status->fec_lock = 0; ++ status->bandwidth_Hz = 0; ++ status->symbol_rate = 0; ++ status->stream = 0; ++ status->constellation = 0; ++ status->c_n = 0; ++ status->freq_offset = 0; ++ status->timing_offset = 0; ++ status->code_rate = -1; ++ status->ber = -1; /* Set to '-1' to signal unavailability if not set later on */ ++ status->per = -1; /* Set to '-1' to signal unavailability if not set later on */ ++ status->fer = -1; /* Set to '-1' to signal unavailability if not set later on */ ++ status->uncorrs = -1; /* Set to '-1' to signal unavailability if not set later on */ ++ status->num_plp = -1; /* Set to '-1' to allow 'auto' plp mode selection */ ++ status->plp_id = 0; ++ status->RSSI = 0; ++ status->SSI = 0; ++ status->SQI = 0; ++ status->TS_bitrate_kHz = 0; ++ status->TS_clock_kHz = 0; ++ ++ if (front_end->standard == SILABS_SLEEP) {status->standard = SILABS_SLEEP; return 0;} ++ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ if (Si2168_L1_DD_STATUS (front_end->Si2168_FE->demod, Si2168_DD_STATUS_CMD_INTACK_OK) != NO_Si2168_ERROR) { ++ SiERROR("Si2168_L1_DD_STATUS ERROR\n"); ++ return 0; ++ } ++ status->standard = (CUSTOM_Standard_Enum)Custom_standardCode(front_end, front_end->Si2168_FE->demod->rsp->dd_status.modulation); ++ /* Retrieving TS values */ ++ status->TS_bitrate_kHz = front_end->Si2168_FE->demod->rsp->dd_status.ts_bit_rate*10; ++ status->TS_clock_kHz = front_end->Si2168_FE->demod->rsp->dd_status.ts_clk_freq*10; ++ SiTRACE("SiLabs_API_Demod_status, TS bitrate=%d, TS clock=%d\n", status->TS_bitrate_kHz, status->TS_clock_kHz); ++ ++ /* Retrieving AGC values */ ++ switch (status->standard) { ++ case SILABS_DVB_T : ++ case SILABS_DVB_C : ++ case SILABS_DVB_T2: ++ { ++ front_end->Si2168_FE->demod->cmd->dd_ext_agc_ter.agc_1_mode = Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_NO_CHANGE; ++ front_end->Si2168_FE->demod->cmd->dd_ext_agc_ter.agc_2_mode = Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_NO_CHANGE; ++ SiTRACE("Si2168_L1_SendCommand2(front_end->Si2168_FE->demod, Si2168_DD_EXT_AGC_TER_CMD_CODE)\n"); ++ Si2168_L1_SendCommand2(front_end->Si2168_FE->demod, Si2168_DD_EXT_AGC_TER_CMD_CODE); ++ status->RFagc = 0; ++ status->IFagc = front_end->Si2168_FE->demod->rsp->dd_ext_agc_ter.agc_2_level; ++ break; ++ } ++ default : { ++ status->RFagc = 0; ++ status->IFagc = 0; ++ break; ++ } ++ } ++ switch (status->standard) { ++ case SILABS_ANALOG: { ++ return 1; ++ break; ++ } ++ case SILABS_DVB_T : ++ case SILABS_DVB_C : ++ { ++ front_end->Si2168_FE->demod->tuner_rssi = status->rssi; ++ if ( Si2168_L1_DD_BER (front_end->Si2168_FE->demod, Si2168_DD_BER_CMD_RST_RUN ) != NO_Si2168_ERROR ) return 0; ++ /* Mimick Si2167 clock_mode register values */ ++ status->clock_mode = 33; ++ /* CHECK the exponent value to know if the BER is available or not */ ++ if(front_end->Si2168_FE->demod->rsp->dd_ber.exp!=0) { ++ //status->ber = (front_end->Si2168_FE->demod->rsp->dd_ber.mant/10.0) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_ber.exp); ++ status->ber = (front_end->Si2168_FE->demod->rsp->dd_ber.mant/10) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_ber.exp); ++ } ++ if ( Si2168_L1_DD_PER (front_end->Si2168_FE->demod, Si2168_DD_PER_CMD_RST_RUN ) != NO_Si2168_ERROR ) return 0; ++ /* CHECK the exponent value to know if the PER is available or not */ ++ if (front_end->Si2168_FE->demod->rsp->dd_per.exp!=0) { ++ //status->per = (front_end->Si2168_FE->demod->rsp->dd_per.mant/10.0) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_per.exp); ++ status->per = (front_end->Si2168_FE->demod->rsp->dd_per.mant/10) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_per.exp); ++ } ++ if ( Si2168_L1_DD_UNCOR (front_end->Si2168_FE->demod, Si2168_DD_UNCOR_CMD_RST_RUN) != NO_Si2168_ERROR ) return 0; ++ status->uncorrs = (front_end->Si2168_FE->demod->rsp->dd_uncor.uncor_msb<<16) + front_end->Si2168_FE->demod->rsp->dd_uncor.uncor_lsb; ++ break; ++ } ++ case SILABS_DVB_T2: ++ { ++ /* Mimick Si2167 clock_mode register values */ ++ switch (front_end->Si2168_FE->demod->cmd->start_clk.clk_mode) { ++ case Si2168_START_CLK_CMD_CLK_MODE_CLK_CLKIO : status->clock_mode = 32; break; ++ case Si2168_START_CLK_CMD_CLK_MODE_CLK_XTAL_IN : status->clock_mode = 34; break; ++ case Si2168_START_CLK_CMD_CLK_MODE_XTAL : status->clock_mode = 33; break; ++ default : status->clock_mode = 0; break; ++ } ++ if ( Si2168_L1_DD_BER (front_end->Si2168_FE->demod, Si2168_DD_BER_CMD_RST_RUN ) != NO_Si2168_ERROR ) return 0; ++ /* CHECK the exponent value to know if the BER is available or not*/ ++ if(front_end->Si2168_FE->demod->rsp->dd_ber.exp!=0) { ++ //status->ber = (front_end->Si2168_FE->demod->rsp->dd_ber.mant/10.0) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_ber.exp); ++ status->ber = (front_end->Si2168_FE->demod->rsp->dd_ber.mant/10) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_ber.exp); ++ } ++ if ( Si2168_L1_DD_FER (front_end->Si2168_FE->demod, Si2168_DD_FER_CMD_RST_RUN ) != NO_Si2168_ERROR ) return 0; ++ /* CHECK the exponent value to know if the FER is available or not*/ ++ if(front_end->Si2168_FE->demod->rsp->dd_fer.exp!=0) { ++ //status->fer = (front_end->Si2168_FE->demod->rsp->dd_fer.mant/10.0) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_fer.exp); ++ status->fer = (front_end->Si2168_FE->demod->rsp->dd_fer.mant/10) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_fer.exp); ++ } ++ if ( Si2168_L1_DD_PER (front_end->Si2168_FE->demod, Si2168_DD_PER_CMD_RST_RUN ) != NO_Si2168_ERROR ) return 0; ++ /* CHECK the exponent value to know if the PER is available or not*/ ++ if(front_end->Si2168_FE->demod->rsp->dd_per.exp!=0) { ++ //status->per = (front_end->Si2168_FE->demod->rsp->dd_per.mant/10.0) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_per.exp); ++ status->per = (front_end->Si2168_FE->demod->rsp->dd_per.mant/10) / power_of_n(10, front_end->Si2168_FE->demod->rsp->dd_per.exp); ++ } ++ if ( Si2168_L1_DD_UNCOR (front_end->Si2168_FE->demod, Si2168_DD_UNCOR_CMD_RST_RUN) != NO_Si2168_ERROR ) return 0; ++ status->uncorrs = (front_end->Si2168_FE->demod->rsp->dd_uncor.uncor_msb<<16) + front_end->Si2168_FE->demod->rsp->dd_uncor.uncor_lsb; ++ break; ++ } ++ default : { return 0; break; } ++ } ++ switch (status->standard) { ++ case SILABS_DVB_T : { ++ if (Si2168_L1_DVBT_STATUS (front_end->Si2168_FE->demod, Si2168_DVBT_STATUS_CMD_INTACK_OK) != NO_Si2168_ERROR) return 0; ++ if (Si2168_L1_DVBT_TPS_EXTRA (front_end->Si2168_FE->demod) != NO_Si2168_ERROR) return 0; ++#ifdef TUNERTER_API ++ status->RSSI = front_end->Si2168_FE->tuner_ter->rsp->tuner_status.rssi; ++#else /* TUNERTER_API */ ++ status->RSSI = front_end->Si2168_FE->tuner_ter->rssi; ++#endif /* TUNERTER_API */ ++ if (Si2168_L1_DD_SSI_SQI (front_end->Si2168_FE->demod, (char)status->RSSI) != NO_Si2168_ERROR) return 0; ++ status->demod_lock = front_end->Si2168_FE->demod->rsp->dvbt_status.pcl; ++ status->fec_lock = front_end->Si2168_FE->demod->rsp->dvbt_status.dl; ++ status->spectral_inversion = front_end->Si2168_FE->demod->rsp->dvbt_status.sp_inv; ++ //status->c_n = front_end->Si2168_FE->demod->rsp->dvbt_status.cnr/4.0; ++ status->c_n = front_end->Si2168_FE->demod->rsp->dvbt_status.cnr/4; ++ ++ status->freq_offset = front_end->Si2168_FE->demod->rsp->dvbt_status.afc_freq; ++ status->timing_offset = front_end->Si2168_FE->demod->rsp->dvbt_status.timing_offset; ++ status->bandwidth_Hz = front_end->Si2168_FE->demod->prop->dd_mode.bw*1000000; ++ status->stream = Custom_streamCode (front_end, front_end->Si2168_FE->demod->prop->dvbt_hierarchy.stream); ++ status->fft_mode = Custom_fftCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt_status.fft_mode); ++ status->guard_interval = Custom_giCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt_status.guard_int); ++ status->constellation = Custom_constelCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt_status.constellation); ++ status->hierarchy = Custom_hierarchyCode(front_end, front_end->Si2168_FE->demod->rsp->dvbt_status.hierarchy); ++ status->code_rate_hp = Custom_coderateCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt_status.rate_hp); ++ status->code_rate_lp = Custom_coderateCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt_status.rate_lp); ++ status->symbol_rate = 0; ++ status->SSI = front_end->Si2168_FE->demod->rsp->dd_ssi_sqi.ssi; ++ status->SQI = front_end->Si2168_FE->demod->rsp->dd_ssi_sqi.sqi; ++ break; ++ } ++ case SILABS_DVB_T2 : { ++ if (Si2168_L1_DVBT2_STATUS (front_end->Si2168_FE->demod, Si2168_DVBT2_STATUS_CMD_INTACK_OK) != NO_Si2168_ERROR) return 0; ++ status->demod_lock = front_end->Si2168_FE->demod->rsp->dvbt2_status.pcl; ++ status->fec_lock = front_end->Si2168_FE->demod->rsp->dvbt2_status.dl; ++ status->spectral_inversion = front_end->Si2168_FE->demod->rsp->dvbt2_status.sp_inv; ++ //status->c_n = front_end->Si2168_FE->demod->rsp->dvbt2_status.cnr/4.0; ++ status->c_n = front_end->Si2168_FE->demod->rsp->dvbt2_status.cnr/4; ++ ++ status->freq_offset = front_end->Si2168_FE->demod->rsp->dvbt2_status.afc_freq; ++ status->timing_offset = front_end->Si2168_FE->demod->rsp->dvbt2_status.timing_offset; ++ status->bandwidth_Hz = front_end->Si2168_FE->demod->prop->dd_mode.bw*1000000; ++ status->stream = Custom_streamCode (front_end, 0); ++ status->fft_mode = Custom_fftCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt2_status.fft_mode); ++ status->guard_interval = Custom_giCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt2_status.guard_int); ++ status->constellation = Custom_constelCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt2_status.constellation); ++ status->code_rate = Custom_coderateCode (front_end, front_end->Si2168_FE->demod->rsp->dvbt2_status.code_rate); ++ status->num_plp = front_end->Si2168_FE->demod->rsp->dvbt2_status.num_plp; ++ status->rotated = front_end->Si2168_FE->demod->rsp->dvbt2_status.rotated; ++ status->pilot_pattern = Custom_pilotPatternCode(front_end, front_end->Si2168_FE->demod->rsp->dvbt2_status.pilot_pattern); ++ status->bw_ext = front_end->Si2168_FE->demod->rsp->dvbt2_status.bw_ext; ++ status->num_plp = front_end->Si2168_FE->demod->rsp->dvbt2_status.num_plp; ++ status->plp_id = front_end->Si2168_FE->demod->rsp->dvbt2_status.plp_id; ++ status->tx_mode = front_end->Si2168_FE->demod->rsp->dvbt2_status.tx_mode; ++ status->short_frame = front_end->Si2168_FE->demod->rsp->dvbt2_status.short_frame; ++ status->fef = front_end->Si2168_FE->demod->rsp->dvbt2_status.fef; ++#ifdef TUNERTER_API ++ status->RSSI = front_end->Si2168_FE->tuner_ter->rsp->tuner_status.rssi; ++#else /* TUNERTER_API */ ++ status->RSSI = front_end->Si2168_FE->tuner_ter->rssi; ++#endif /* TUNERTER_API */ ++ if (Si2168_L1_DD_SSI_SQI (front_end->Si2168_FE->demod, (char)status->RSSI) != NO_Si2168_ERROR) return 0; ++ status->SSI = front_end->Si2168_FE->demod->rsp->dd_ssi_sqi.ssi; ++ status->SQI = front_end->Si2168_FE->demod->rsp->dd_ssi_sqi.sqi; ++ status->symbol_rate = 0; ++ break; ++ } ++ case SILABS_DVB_C : { ++ if (Si2168_L1_DVBC_STATUS (front_end->Si2168_FE->demod, Si2168_DVBC_STATUS_CMD_INTACK_OK) != NO_Si2168_ERROR) return 0; ++ status->demod_lock = front_end->Si2168_FE->demod->rsp->dvbc_status.pcl; ++ status->fec_lock = front_end->Si2168_FE->demod->rsp->dvbc_status.dl; ++ status->symbol_rate = front_end->Si2168_FE->demod->prop->dvbc_symbol_rate.rate*1000; ++ status->constellation = Custom_constelCode (front_end, front_end->Si2168_FE->demod->rsp->dvbc_status.constellation); ++ status->spectral_inversion = front_end->Si2168_FE->demod->rsp->dvbc_status.sp_inv; ++ //status->c_n = front_end->Si2168_FE->demod->rsp->dvbc_status.cnr/4.0; ++ status->c_n = front_end->Si2168_FE->demod->rsp->dvbc_status.cnr/4; ++ ++ status->freq_offset = front_end->Si2168_FE->demod->rsp->dvbc_status.afc_freq; ++ status->timing_offset = front_end->Si2168_FE->demod->rsp->dvbc_status.timing_offset; ++#ifdef TUNERTER_API ++ status->RSSI = front_end->Si2168_FE->tuner_ter->rsp->tuner_status.rssi; ++#else /* TUNERTER_API */ ++ status->RSSI = front_end->Si2168_FE->tuner_ter->rssi; ++#endif /* TUNERTER_API */ ++ status->SSI = 0; ++ status->SQI = 0; ++ break; ++ } ++ default : { ++ return 0; ++ break; ++ } ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return 0; ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_FE_status function ++ Use: Front-End status function ++ Used to retrieve the status of the front-end in a structure ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: status, a pointer to the status structure (configurable in CUSTOM_Status_Struct) ++ Return: 1 if successful, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_API_FE_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status) ++{ ++ ++ SiTRACE("SiLabs_API_FE_status in %s\n", Silabs_Standard_Text((CUSTOM_Standard_Enum)(front_end->standard))); ++ switch (front_end->standard) { ++ case SILABS_ANALOG: { ++ SiLabs_API_TER_Tuner_status (front_end, status); ++ return 1; ++ break; ++ } ++ case SILABS_DVB_T : ++ case SILABS_DVB_T2: ++ case SILABS_DVB_C : ++ case SILABS_DVB_C2: ++ case SILABS_MCNS : { ++ SiLabs_API_TER_Tuner_status (front_end, status); ++ break; ++ } ++ case SILABS_DVB_S : ++ case SILABS_DVB_S2: ++ case SILABS_DSS : { ++ SiLabs_API_SAT_Tuner_status (front_end, status); ++ break; ++ } ++ case SILABS_SLEEP : { ++ status->standard = SILABS_SLEEP; ++ return 0; break; ++ } ++ default : { return 0; break; } ++ } ++ SiLabs_API_Demod_status (front_end, status); ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ Silabs_standardCode function ++ Use: standard code function ++ Used to retrieve the standard value used by the DTV demodulator ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: standard, the value used by the top-level application (configurable in CUSTOM_Standard_Enum) ++************************************************************************************************************************/ ++int Silabs_standardCode (SILABS_FE_Context* front_end, CUSTOM_Standard_Enum standard) ++{ ++ front_end = front_end; /* to avoid compiler warning if not used */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (standard) { ++ case SILABS_DVB_T : return Si2168_DD_MODE_PROP_MODULATION_DVBT; ++ case SILABS_DVB_T2: return Si2168_DD_MODE_PROP_MODULATION_DVBT2; ++ case SILABS_DVB_C : return Si2168_DD_MODE_PROP_MODULATION_DVBC; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Silabs_constelCode function ++ Use: constel code function ++ Used to retrieve the constel value used by the DTV demodulator ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: constel, the value used by the top-level application (configurable in CUSTOM_Constel_Enum) ++************************************************************************************************************************/ ++int Silabs_constelCode (SILABS_FE_Context* front_end, CUSTOM_Constel_Enum constel) ++{ ++ front_end = front_end; /* to avoid compiler warning if not used */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (constel) { ++ case SILABS_QAMAUTO : return Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_AUTO ; ++ case SILABS_QAM16 : return Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM16 ; ++ case SILABS_QAM32 : return Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM32 ; ++ case SILABS_QAM64 : return Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM64 ; ++ case SILABS_QAM128 : return Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM128; ++ case SILABS_QAM256 : return Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM256; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Silabs_streamCode function ++ Use: stream code function ++ Used to retrieve the stream value used by the DTV demodulator ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: stream, the value used by the top-level application (configurable in CUSTOM_Stream_Enum) ++************************************************************************************************************************/ ++int Silabs_streamCode (SILABS_FE_Context* front_end, CUSTOM_Stream_Enum stream) ++{ ++ front_end = front_end; /* to avoid compiler warning if not used */ ++ stream = stream; /* to avoid compiler warning if not used */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (stream) { ++ case SILABS_HP : return Si2168_DVBT_HIERARCHY_PROP_STREAM_HP ; ++ case SILABS_LP : return Si2168_DVBT_HIERARCHY_PROP_STREAM_LP ; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++ ++/************************************************************************************************************************ ++ Custom_standardCode function ++ Use: standard code function ++ Used to retrieve the standard value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: standard, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_standardCode (SILABS_FE_Context* front_end, int standard) ++{ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (standard) { ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : return SILABS_DVB_T ; ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2: return SILABS_DVB_T2; ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : return SILABS_DVB_C ; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++ ++/************************************************************************************************************************ ++ Custom_streamCode function ++ Use: stream code function ++ Used to retrieve the stream value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: stream, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_streamCode (SILABS_FE_Context* front_end, int stream) ++{ ++ front_end = front_end; /* To avoid compiler warning if not supported */ ++ stream = stream; /* To avoid compiler warning if not supported */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (stream) { ++ case Si2168_DVBT_HIERARCHY_PROP_STREAM_HP: return SILABS_HP; ++ case Si2168_DVBT_HIERARCHY_PROP_STREAM_LP: return SILABS_LP; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Custom_fftCode function ++ Use: fft code function ++ Used to retrieve the fft value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: fft, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_fftCode (SILABS_FE_Context* front_end, int fft) ++{ ++ front_end = front_end; /* To avoid compiler warning if not supported */ ++ fft = fft; /* To avoid compiler warning if not supported */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (fft) { ++ case Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_1K : return SILABS_FFT_MODE_1K ; ++ case Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_2K : return SILABS_FFT_MODE_2K ; ++ case Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_4K : return SILABS_FFT_MODE_4K ; ++ case Si2168_DVBT_STATUS_RESPONSE_FFT_MODE_8K : return SILABS_FFT_MODE_8K ; ++ case Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_16K: return SILABS_FFT_MODE_16K; ++ case Si2168_DVBT2_STATUS_RESPONSE_FFT_MODE_32K: return SILABS_FFT_MODE_32K; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Custom_giCode function ++ Use: gi code function ++ Used to retrieve the gi value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: gi, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_giCode (SILABS_FE_Context* front_end, int gi) ++{ ++ front_end = front_end; /* To avoid compiler warning if not supported */ ++ gi = gi; /* To avoid compiler warning if not supported */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (gi) { ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_32 : return SILABS_GUARD_INTERVAL_1_32 ; ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_16 : return SILABS_GUARD_INTERVAL_1_16 ; ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_8 : return SILABS_GUARD_INTERVAL_1_8 ; ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_4 : return SILABS_GUARD_INTERVAL_1_4 ; ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_1_128 : return SILABS_GUARD_INTERVAL_1_128 ; ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_19_128: return SILABS_GUARD_INTERVAL_19_128; ++ case Si2168_DVBT2_STATUS_RESPONSE_GUARD_INT_19_256: return SILABS_GUARD_INTERVAL_19_256; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Custom_constelCode function ++ Use: constel code function ++ Used to retrieve the constel value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: constel, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_constelCode (SILABS_FE_Context* front_end, int constel) ++{ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (constel) { ++ case Si2168_DVBT_STATUS_RESPONSE_CONSTELLATION_QPSK : return SILABS_QPSK ; ++ case Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_AUTO : return SILABS_QAMAUTO ; ++ case Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM16 : return SILABS_QAM16 ; ++ case Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM32 : return SILABS_QAM32 ; ++ case Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM64 : return SILABS_QAM64 ; ++ case Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM128: return SILABS_QAM128 ; ++ case Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM256: return SILABS_QAM256 ; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Custom_hierarchyCode function ++ Use: hierarchy code function ++ Used to retrieve the hierarchy value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: hierarchy, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_hierarchyCode (SILABS_FE_Context* front_end, int hierarchy) ++{ ++ front_end = front_end; /* To avoid compiler warning if not supported */ ++ hierarchy = hierarchy; /* To avoid compiler warning if not supported */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (hierarchy) { ++ case Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_NONE : return SILABS_HIERARCHY_NONE; ++ case Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_ALFA1: return SILABS_HIERARCHY_ALFA1; ++ case Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_ALFA2: return SILABS_HIERARCHY_ALFA2; ++ case Si2168_DVBT_STATUS_RESPONSE_HIERARCHY_ALFA4: return SILABS_HIERARCHY_ALFA4; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Custom_coderateCode function ++ Use: coderate code function ++ Used to retrieve the coderate value used by the DTV demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: coderate, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_coderateCode (SILABS_FE_Context* front_end, int coderate) ++{ ++ front_end = front_end; /* To avoid compiler warning if not supported */ ++ coderate = coderate; /* To avoid compiler warning if not supported */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (coderate) { ++ case Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_3_5 : return SILABS_CODERATE_3_5; ++ case Si2168_DVBT2_STATUS_RESPONSE_CODE_RATE_4_5 : return SILABS_CODERATE_4_5; ++ case Si2168_DVBT_STATUS_RESPONSE_RATE_HP_1_2 : return SILABS_CODERATE_1_2; ++ case Si2168_DVBT_STATUS_RESPONSE_RATE_HP_2_3 : return SILABS_CODERATE_2_3; ++ case Si2168_DVBT_STATUS_RESPONSE_RATE_HP_3_4 : return SILABS_CODERATE_3_4; ++ case Si2168_DVBT_STATUS_RESPONSE_RATE_HP_5_6 : return SILABS_CODERATE_5_6; ++ case Si2168_DVBT_STATUS_RESPONSE_RATE_HP_7_8 : return SILABS_CODERATE_7_8; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ Custom_pilotPatternCode function ++ Use: pilot pattern code function ++ Used to retrieve the pilot pattern value used by the DVB-T2 demodulator in custom format ++ Parameter: front_end, a pointer to the SILABS_FE_Context context ++ Parameter: pilot_pattern, the value used by the top-level application (as returned by the demod) ++************************************************************************************************************************/ ++int Custom_pilotPatternCode (SILABS_FE_Context* front_end, int pilot_pattern) ++{ ++ front_end->chip = front_end->chip; /* To avoid compiler warning if not supported */ ++ pilot_pattern = pilot_pattern ; /* To avoid compiler warning if not supported */ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ switch (pilot_pattern) { ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP1: return SILABS_PILOT_PATTERN_PP1; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP2: return SILABS_PILOT_PATTERN_PP2; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP3: return SILABS_PILOT_PATTERN_PP3; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP4: return SILABS_PILOT_PATTERN_PP4; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP5: return SILABS_PILOT_PATTERN_PP5; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP6: return SILABS_PILOT_PATTERN_PP6; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP7: return SILABS_PILOT_PATTERN_PP7; ++ case Si2168_DVBT2_STATUS_RESPONSE_PILOT_PATTERN_PP8: return SILABS_PILOT_PATTERN_PP8; ++ default : return -1; ++ } ++ } ++#endif /* Si2168_COMPATIBLE */ ++ return -1; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_Configure ++ DESCRIPTION: Setup TER and SAT AGCs, Common Properties startup ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_Configure (L1_Si2168_Context *api) ++{ ++ int return_code; ++ return_code = NO_Si2168_ERROR; ++ ++ SiTRACE("media %d\n",api->media); ++ ++ /* AGC settings when not used */ ++ api->cmd->dd_mp_defaults.mp_a_mode = Si2168_DD_MP_DEFAULTS_CMD_MP_A_MODE_DISABLE; ++ if (api->fef_mode == Si2168_FEF_MODE_FREEZE_PIN) { ++ api->cmd->dd_mp_defaults.mp_b_mode = Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_DRIVE_0; ++ } else { ++ api->cmd->dd_mp_defaults.mp_b_mode = Si2168_DD_MP_DEFAULTS_CMD_MP_B_MODE_DISABLE; ++ } ++ api->cmd->dd_mp_defaults.mp_c_mode = Si2168_DD_MP_DEFAULTS_CMD_MP_C_MODE_DISABLE; ++ api->cmd->dd_mp_defaults.mp_d_mode = Si2168_DD_MP_DEFAULTS_CMD_MP_D_MODE_DISABLE; ++ Si2168_L1_SendCommand2(api, Si2168_DD_MP_DEFAULTS_CMD_CODE); ++ ++ /* LEDS MANAGEMENT */ ++ /* set hardware lock on green LED */ ++ api->cmd->config_pins.gpio0_mode = Si2168_CONFIG_PINS_CMD_GPIO0_MODE_HW_LOCK; ++ api->cmd->config_pins.gpio0_read = Si2168_CONFIG_PINS_CMD_GPIO0_READ_DO_NOT_READ; ++ ++ if (api->media == Si2168_TERRESTRIAL) { ++ /* Settings for TER AGC. These settings need to match the HW design for TER AGCs */ ++ api->cmd->dd_ext_agc_ter.agc_1_mode = Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MODE_NOT_USED; ++ #ifdef Si2168_TER_AGC_INVERTED ++ api->cmd->dd_ext_agc_ter.agc_1_inv = Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_INVERTED; ++ #else /* Si2168_TER_AGC_INVERTED */ ++ api->cmd->dd_ext_agc_ter.agc_1_inv = Si2168_DD_EXT_AGC_TER_CMD_AGC_1_INV_NOT_INVERTED; ++ #endif /* Si2168_TER_AGC_INVERTED */ ++ api->cmd->dd_ext_agc_ter.agc_1_kloop = Si2168_DD_EXT_AGC_TER_CMD_AGC_1_KLOOP_MIN; ++ api->cmd->dd_ext_agc_ter.agc_1_min = Si2168_DD_EXT_AGC_TER_CMD_AGC_1_MIN_MIN; ++ ++ api->cmd->dd_ext_agc_ter.agc_2_mode = Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MODE_MP_A; ++ #ifdef Si2168_TER_AGC_INVERTED ++ api->cmd->dd_ext_agc_ter.agc_2_inv = Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_INVERTED; ++ #else /* Si2168_TER_AGC_INVERTED */ ++ api->cmd->dd_ext_agc_ter.agc_2_inv = Si2168_DD_EXT_AGC_TER_CMD_AGC_2_INV_NOT_INVERTED; ++ #endif /* Si2168_TER_AGC_INVERTED */ ++ api->cmd->dd_ext_agc_ter.agc_2_kloop = 18; ++ api->cmd->dd_ext_agc_ter.agc_2_min = Si2168_DD_EXT_AGC_TER_CMD_AGC_2_MIN_MIN; ++ Si2168_L1_SendCommand2(api, Si2168_DD_EXT_AGC_TER_CMD_CODE); ++ ++ if (api->fef_mode == Si2168_FEF_MODE_FREEZE_PIN) { ++ /* SET FEF capability ON MP_B pins and Active HIGH*/ ++ api->cmd->dvbt2_fef.fef_tuner_flag = Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_MP_B; ++ api->cmd->dvbt2_fef.fef_tuner_flag_inv = Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_INV_FEF_HIGH; ++ } else { ++ api->cmd->dvbt2_fef.fef_tuner_flag = Si2168_DVBT2_FEF_CMD_FEF_TUNER_FLAG_NOT_USED; ++ } ++ Si2168_L1_SendCommand2(api, Si2168_DVBT2_FEF_CMD_CODE); ++ } ++ ++ ++ api->cmd->config_pins.gpio1_mode = Si2168_CONFIG_PINS_CMD_GPIO1_MODE_TS_ERR; ++ api->cmd->config_pins.gpio1_read = Si2168_CONFIG_PINS_CMD_GPIO1_READ_DO_NOT_READ; ++ Si2168_L1_SendCommand2(api, Si2168_CONFIG_PINS_CMD_CODE); ++ ++ /* Set All Properties startup configuration */ ++ Si2168_setupAllDefaults (api); ++ Si2168_downloadAllProperties(api); ++ ++ return return_code; ++} ++ ++/************************************************************************************************************************ ++ NAME: Si2168_STANDBY ++ DESCRIPTION: ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_STANDBY (L1_Si2168_Context *api) ++{ ++ return Si2168_L1_POWER_DOWN (api); ++} ++/************************************************************************************************************************ ++ NAME: Si2168_WAKEUP ++ DESCRIPTION: ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_WAKEUP (L1_Si2168_Context *api) ++{ ++ int return_code; ++ int media; ++ ++ return_code = NO_Si2168_ERROR; ++ media = Si2168_Media(api, api->standard); ++ SiTRACE ("Si2168_WAKEUP: media %d\n", media); ++ ++ /* Clock source selection */ ++ switch (media) { ++ default : ++ case Si2168_TERRESTRIAL : { ++ api->cmd->start_clk.clk_mode = api->tuner_ter_clock_input; ++ break; ++ } ++ } ++ ++ Si2168_L1_START_CLK (api, ++ Si2168_START_CLK_CMD_SUBCODE_CODE, ++ Si2168_START_CLK_CMD_RESERVED1_RESERVED, ++ Si2168_START_CLK_CMD_TUNE_CAP_15P6, ++ Si2168_START_CLK_CMD_RESERVED2_RESERVED, ++ api->cmd->start_clk.clk_mode, ++ Si2168_START_CLK_CMD_RESERVED3_RESERVED, ++ Si2168_START_CLK_CMD_RESERVED4_RESERVED, ++ Si2168_START_CLK_CMD_START_CLK_START_CLK); ++ /* Reference frequency selection */ ++ switch (media) { ++ default : ++ case Si2168_TERRESTRIAL : { ++ if (api->tuner_ter_clock_freq == 16) { ++ SiTRACE("Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_16MHZ\n"); ++ api->cmd->power_up.clock_freq = Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_16MHZ; ++ } else if (api->tuner_ter_clock_freq == 24) { ++ SiTRACE("Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_24MHZ\n"); ++ api->cmd->power_up.clock_freq = Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_24MHZ; ++ } else { ++ SiTRACE("Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_27MHZ\n"); ++ api->cmd->power_up.clock_freq = Si2168_POWER_UP_CMD_CLOCK_FREQ_CLK_27MHZ; ++ } ++ break; ++ } ++ } ++ ++ return_code = Si2168_L1_POWER_UP (api, ++ Si2168_POWER_UP_CMD_SUBCODE_CODE, ++ api->cmd->power_up.reset, ++ Si2168_POWER_UP_CMD_RESERVED2_RESERVED, ++ Si2168_POWER_UP_CMD_RESERVED4_RESERVED, ++ Si2168_POWER_UP_CMD_RESERVED1_RESERVED, ++ Si2168_POWER_UP_CMD_ADDR_MODE_CURRENT, ++ Si2168_POWER_UP_CMD_RESERVED5_RESERVED, ++ api->cmd->power_up.func, ++ api->cmd->power_up.clock_freq, ++ Si2168_POWER_UP_CMD_CTSIEN_DISABLE, ++ Si2168_POWER_UP_CMD_WAKE_UP_WAKE_UP); ++ ++ if (api->cmd->start_clk.clk_mode == Si2168_START_CLK_CMD_CLK_MODE_CLK_CLKIO ) { SiTRACE ("Si2168_START_CLK_CMD_CLK_MODE_CLK_CLKIO\n" );} ++ else if (api->cmd->start_clk.clk_mode == Si2168_START_CLK_CMD_CLK_MODE_CLK_XTAL_IN) { SiTRACE ("Si2168_START_CLK_CMD_CLK_MODE_CLK_XTAL_IN\n");} ++ else if (api->cmd->start_clk.clk_mode == Si2168_START_CLK_CMD_CLK_MODE_XTAL ) { SiTRACE ("Si2168_START_CLK_CMD_CLK_MODE_XTAL\n" );} ++ ++ if (api->cmd->power_up.reset == Si2168_POWER_UP_CMD_RESET_RESET ) { SiTRACE ("Si2168_POWER_UP_CMD_RESET_RESET\n" );} ++ else if (api->cmd->power_up.reset == Si2168_POWER_UP_CMD_RESET_RESUME ) { SiTRACE ("Si2168_POWER_UP_CMD_RESET_RESUME\n");} ++ ++ if (return_code != NO_Si2168_ERROR ) { ++ SiTRACE("Si2168_WAKEUP: POWER_UP ERROR!\n"); ++ SiERROR("Si2168_WAKEUP: POWER_UP ERROR!\n"); ++ return return_code; ++ } ++ /* After a successful POWER_UP, set values for 'resume' only */ ++ api->cmd->power_up.reset = Si2168_POWER_UP_CMD_RESET_RESUME; ++ api->cmd->power_up.func = Si2168_POWER_UP_CMD_FUNC_NORMAL; ++ ++ return NO_Si2168_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_PowerUpWithPatch ++ DESCRIPTION: Send Si2168 API PowerUp Command with PowerUp to bootloader, ++ Check the Chip rev and part, and ROMID are compared to expected values. ++ Load the Firmware Patch then Start the Firmware. ++ Programming Guide Reference: Flowchart A.2 (POWER_UP with patch flowchart) ++ ++ Parameter: pointer to Si2168 Context ++ Returns: Si2168/I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_PowerUpWithPatch (L1_Si2168_Context *api) ++{ ++ int return_code; ++ int fw_loaded; ++ return_code = NO_Si2168_ERROR; ++ fw_loaded = 0; ++ ++ /* Before patching, set POWER_UP values for 'RESET' and 'BOOTLOADER' */ ++ api->cmd->power_up.reset = Si2168_POWER_UP_CMD_RESET_RESET; ++ api->cmd->power_up.func = Si2168_POWER_UP_CMD_FUNC_BOOTLOADER, ++ ++ return_code = Si2168_WAKEUP(api); ++ ++ if (return_code != NO_Si2168_ERROR) { ++ SiERROR("Si2168_PowerUpWithPatch: WAKEUP error!\n"); ++ return return_code; ++ } ++ ++ /* Get the Part Info from the chip. This command is only valid in Bootloader mode */ ++ if ((return_code = Si2168_L1_PART_INFO(api)) != NO_Si2168_ERROR) { ++ SiTRACE ("Si2168_L1_PART_INFO error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ SiTRACE("chiprev %d\n", api->rsp->part_info.chiprev); ++ SiTRACE("part Si21%d\n", api->rsp->part_info.part ); ++ SiTRACE("romid %d\n", api->rsp->part_info.romid ); ++ SiTRACE("pmajor 0x%02x\n", api->rsp->part_info.pmajor ); ++ SiTRACE("pminor 0x%02x\n", api->rsp->part_info.pminor ); ++ SiTRACE("pbuild %d\n", api->rsp->part_info.pbuild ); ++ if ((api->rsp->part_info.pmajor >= 0x30) & (api->rsp->part_info.pminor >= 0x30)) { ++ SiTRACE("pmajor '%c'\n", api->rsp->part_info.pmajor ); ++ SiTRACE("pminor '%c'\n", api->rsp->part_info.pminor ); ++ SiTRACE("Full Info 'Si21%2d_ROM%x_%c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->part_info.romid, api->rsp->part_info.pmajor, api->rsp->part_info.pminor, api->rsp->part_info.pbuild ); ++ } ++ ++ /* Check part info values and load the proper firmware */ ++#ifdef Si2166B_00_COMPATIBLE ++ #ifdef Si2166B_Patch_1_Ab3_LINES ++ if (!fw_loaded) { ++ SiTRACE ("Is this part a 'Si21%2d_ROM%x_%c_%c_b%d'?\n", Si2166B_PATCH_1_Ab3_PART, Si2166B_PATCH_1_Ab3_ROM, Si2166B_PATCH_1_Ab3_PMAJOR, Si2166B_PATCH_1_Ab3_PMINOR, Si2166B_PATCH_1_Ab3_PBUILD ); ++ if ((api->rsp->part_info.romid == Si2166B_PATCH_1_Ab3_ROM ) ++ & (api->rsp->part_info.part == Si2166B_PATCH_1_Ab3_PART ) ++ & (api->rsp->part_info.pmajor == Si2166B_PATCH_1_Ab3_PMAJOR) ++ & (api->rsp->part_info.pminor == Si2166B_PATCH_1_Ab3_PMINOR) ++ & (api->rsp->part_info.pbuild == Si2166B_PATCH_1_Ab3_PBUILD)) { ++ SiTRACE("Downloading 'Si21%2d_FW_%c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->part_info.pmajor, api->rsp->part_info.pminor, api->rsp->part_info.pbuild ); ++ if ((return_code = Si2168_LoadFirmware(api, Si2166B_Patch_1_Ab3, Si2166B_Patch_1_Ab3_LINES)) != NO_Si2168_ERROR) { ++ SiTRACE ("Si2168_LoadPatch error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT(return_code) ); ++ return return_code; ++ } ++ fw_loaded++; ++ } ++ } ++ #endif /* Si2166B_Patch_1_Ab3_LINES */ ++#endif /* Si2166B_00_COMPATIBLE */ ++#ifdef Si2167B_00_COMPATIBLE ++ #ifdef Si2167B_Patch_1_Ab3_LINES ++ if (!fw_loaded) { ++ SiTRACE ("Is this part a 'Si21%2d_ROM%x_%c_%c_b%d'?\n", Si2167B_PATCH_1_Ab3_PART, Si2167B_PATCH_1_Ab3_ROM, Si2167B_PATCH_1_Ab3_PMAJOR, Si2167B_PATCH_1_Ab3_PMINOR, Si2167B_PATCH_1_Ab3_PBUILD ); ++ if ((api->rsp->part_info.romid == Si2167B_PATCH_1_Ab3_ROM ) ++ & (api->rsp->part_info.part == Si2167B_PATCH_1_Ab3_PART ) ++ & (api->rsp->part_info.pmajor == Si2167B_PATCH_1_Ab3_PMAJOR) ++ & (api->rsp->part_info.pminor == Si2167B_PATCH_1_Ab3_PMINOR) ++ & (api->rsp->part_info.pbuild == Si2167B_PATCH_1_Ab3_PBUILD)) { ++ SiTRACE("Downloading 'Si21%2d_FW_%c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->part_info.pmajor, api->rsp->part_info.pminor, api->rsp->part_info.pbuild ); ++ if ((return_code = Si2168_LoadFirmware(api, Si2167B_Patch_1_Ab3, Si2167B_Patch_1_Ab3_LINES)) != NO_Si2168_ERROR) { ++ SiTRACE ("Si2168_LoadPatch error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT(return_code) ); ++ return return_code; ++ } ++ fw_loaded++; ++ } ++ } ++ #endif /* Si2167B_Patch_1_Ab3_LINES */ ++#endif /* Si2167B_00_COMPATIBLE */ ++#ifdef Si2168_0B_COMPATIBLE ++ #ifdef Si2168_Firmware_0_Cb14_LINES ++ if (!fw_loaded) { ++ SiTRACE ("Is this part a 'Si21%2d_ROM%x_%c_%c_b%d'?\n", Si2168_FIRMWARE_0_Cb14_PART, Si2168_FIRMWARE_0_Cb14_ROM, Si2168_FIRMWARE_0_Cb14_PMAJOR, Si2168_FIRMWARE_0_Cb14_PMINOR, Si2168_FIRMWARE_0_Cb14_PBUILD ); ++ if ((api->rsp->part_info.romid == Si2168_FIRMWARE_0_Cb14_ROM ) ++ & (api->rsp->part_info.part == Si2168_FIRMWARE_0_Cb14_PART ) ++ & (api->rsp->part_info.pmajor == Si2168_FIRMWARE_0_Cb14_PMAJOR) ++ & (api->rsp->part_info.pminor == Si2168_FIRMWARE_0_Cb14_PMINOR) ++ & (api->rsp->part_info.pbuild == Si2168_FIRMWARE_0_Cb14_PBUILD)) { ++ SiTRACE("Updating FW for 'Si21%2d_FW_%c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->part_info.pmajor, api->rsp->part_info.pminor, api->rsp->part_info.pbuild ); ++ if ((return_code = Si2168_LoadFirmware(api, Si2168_Firmware_0_Cb14, Si2168_Firmware_0_Cb14_LINES)) != NO_Si2168_ERROR) { ++ SiTRACE ("Si2168_LoadFirmware error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT(return_code) ); ++ return return_code; ++ } ++ fw_loaded++; ++ } ++ } ++ #endif /* Si2168_Firmware_0_Cb14_LINES */ ++#endif /* Si2168_0B_COMPATIBLE */ ++#ifdef Si2168_10_COMPATIBLE ++ #ifdef Si2168_Patch_0_Cb14_LINES ++ if (!fw_loaded) { ++ SiTRACE ("Is this part a 'Si21%2d_ROM%x_%c_%c_b%d'?\n", Si2168_PATCH_0_Cb14_PART, Si2168_PATCH_0_Cb14_ROM, Si2168_PATCH_0_Cb14_PMAJOR, Si2168_PATCH_0_Cb14_PMINOR, Si2168_PATCH_0_Cb14_PBUILD ); ++ if ((api->rsp->part_info.romid == Si2168_PATCH_0_Cb14_ROM ) ++ & (api->rsp->part_info.part == Si2168_PATCH_0_Cb14_PART ) ++ & (api->rsp->part_info.pmajor == Si2168_PATCH_0_Cb14_PMAJOR) ++ & (api->rsp->part_info.pminor == Si2168_PATCH_0_Cb14_PMINOR) ++ & (api->rsp->part_info.pbuild == Si2168_PATCH_0_Cb14_PBUILD)) { ++ SiTRACE("Updating FW for 'Si21%2d_FW_%c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->part_info.pmajor, api->rsp->part_info.pminor, api->rsp->part_info.pbuild ); ++ if ((return_code = Si2168_LoadFirmware(api, Si2168_Patch_0_Cb14, Si2168_Patch_0_Cb14_LINES)) != NO_Si2168_ERROR) { ++ SiTRACE ("Si2168_LoadFirmware error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT(return_code) ); ++ return return_code; ++ } ++ fw_loaded++; ++ } ++ } ++ #endif /* Si2168_Patch_0_Cb14_LINES */ ++#endif /* Si2168_10_COMPATIBLE */ ++#ifdef Si2168_20_COMPATIBLE ++ #ifdef Si2168_Patch_2_0b5_LINES ++ if (!fw_loaded) { ++ SiTRACE ("Is this part a 'Si21%2d_ROM%x_%c_%c_b%d'?\n", Si2168_PATCH_2_0b5_PART, Si2168_PATCH_2_0b5_ROM, Si2168_PATCH_2_0b5_PMAJOR, Si2168_PATCH_2_0b5_PMINOR, Si2168_PATCH_2_0b5_PBUILD ); ++ if ((api->rsp->part_info.romid == Si2168_PATCH_2_0b5_ROM ) ++ & (api->rsp->part_info.part == Si2168_PATCH_2_0b5_PART ) ++ & (api->rsp->part_info.pmajor == Si2168_PATCH_2_0b5_PMAJOR) ++ & (api->rsp->part_info.pminor == Si2168_PATCH_2_0b5_PMINOR) ++ & (api->rsp->part_info.pbuild == Si2168_PATCH_2_0b5_PBUILD)) { ++ SiTRACE("Updating FW for 'Si21%2d_ROM%x %c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->part_info.romid, api->rsp->part_info.pmajor, api->rsp->part_info.pminor, api->rsp->part_info.pbuild ); ++ if ((return_code = Si2168_LoadFirmware(api, Si2168_Patch_2_0b5, Si2168_Patch_2_0b5_LINES)) != NO_Si2168_ERROR) { ++ SiTRACE ("Si2168_LoadFirmware error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ fw_loaded++; ++ } ++ } ++ #endif /* Si2168_Patch_2_0b5_LINES */ ++#endif /* Si2168_20_COMPATIBLE */ ++ ++ if (!fw_loaded) { ++ SiTRACE ("Si2168_LoadFirmware error: NO Firmware Loaded! Possible part/code incompatibility !\n"); ++ SiERROR ("Si2168_LoadFirmware error: NO Firmware Loaded! Possible part/code incompatibility !\n"); ++ return ERROR_Si2168_LOADING_FIRMWARE; ++ } ++ ++ /*Start the Firmware */ ++ if ((return_code = Si2168_StartFirmware(api)) != NO_Si2168_ERROR) { ++ /* Start firmware */ ++ SiTRACE ("Si2168_StartFirmware error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ ++ Si2168_L1_GET_REV (api); ++ SiTRACE("Si21%2d Part running 'FW_%c_%c_b%d'\n", api->rsp->part_info.part, api->rsp->get_rev.cmpmajor, api->rsp->get_rev.cmpminor, api->rsp->get_rev.cmpbuild ); ++ ++ return NO_Si2168_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_LoadFirmware ++ DESCRIPTON: Load firmware from FIRMWARE_TABLE array in Si2168_Firmware_x_y_build_z.h file into Si2168 ++ Requires Si2168 to be in bootloader mode after PowerUp ++ Programming Guide Reference: Flowchart A.3 (Download FW PATCH flowchart) ++ ++ Parameter: Si2168 Context (I2C address) ++ Parameter: pointer to firmware table array ++ Parameter: number of lines in firmware table array (size in bytes / BYTES_PER_LINE) ++ Returns: Si2168/I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_LoadFirmware (L1_Si2168_Context *api, unsigned char fw_table[], int nbLines) ++{ ++ int return_code; ++ int line; ++ return_code = NO_Si2168_ERROR; ++ ++ SiTRACE ("Si2168_LoadFirmware starting...\n"); ++ SiTRACE ("Si2168_LoadFirmware nbLines %d\n", nbLines); ++ ++ /* for each line in fw_table */ ++ for (line = 0; line < nbLines; line++) ++ { ++ /* send Si2168_BYTES_PER_LINE fw bytes to Si2168 */ ++ if ((return_code = Si2168_L1_API_Patch(api, Si2168_BYTES_PER_LINE, fw_table + Si2168_BYTES_PER_LINE*line)) != NO_Si2168_ERROR) ++ { ++ SiTRACE("Si2168_LoadFirmware error 0x%02x patching line %d: %s\n", return_code, line, Si2168_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ if (line == 0) { ++ SiTRACE("The firmware is incompatible with the part!\n"); ++ } ++ return ERROR_Si2168_LOADING_FIRMWARE; ++ } ++ //if (line==3) SiTraceConfiguration("traces suspend"); ++ } ++ //SiTraceConfiguration("traces resume"); ++ SiTRACE ("Si2168_LoadFirmware complete...\n"); ++ return NO_Si2168_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_StartFirmware ++ DESCRIPTION: Start Si2168 firmware (put the Si2168 into run mode) ++ Parameter: Si2168 Context (I2C address) ++ Parameter (passed by Reference): ExitBootloadeer Response Status byte : tunint, atvint, dtvint, err, cts ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_StartFirmware (L1_Si2168_Context *api) ++{ ++ ++ if (Si2168_L1_EXIT_BOOTLOADER(api, Si2168_EXIT_BOOTLOADER_CMD_FUNC_NORMAL, Si2168_EXIT_BOOTLOADER_CMD_CTSIEN_OFF) != NO_Si2168_ERROR) ++ { ++ return ERROR_Si2168_STARTING_FIRMWARE; ++ } ++ ++ return NO_Si2168_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2168_Init ++ DESCRIPTION:Reset and Initialize Si2168 ++ Parameter: Si2168 Context (I2C address) ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++************************************************************************************************************************/ ++int Si2168_Init (L1_Si2168_Context *api) ++{ ++ int return_code; ++ SiTRACE("Si2168_Init starting...\n"); ++ ++ if ((return_code = Si2168_PowerUpWithPatch(api)) != NO_Si2168_ERROR) { /* PowerUp into bootloader */ ++ SiTRACE ("Si2168_PowerUpWithPatch error 0x%02x: %s\n", return_code, Si2168_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ SiTRACE("Si2168_Init complete...\n"); ++ return NO_Si2168_ERROR; ++} ++/************************************************************************************************************************ ++ Si2168_Media function ++ Use: media retrieval function ++ Used to retrieve the media used by the Si2168 ++************************************************************************************************************************/ ++int Si2168_Media (L1_Si2168_Context *api, int modulation) ++{ ++ switch (modulation) { ++ default : ++ case Si2168_DD_MODE_PROP_MODULATION_AUTO_DETECT : { ++ switch (api->prop->dd_mode.auto_detect) { ++ default : ++ case Si2168_DD_MODE_PROP_AUTO_DETECT_AUTO_DVB_T_T2 : return Si2168_TERRESTRIAL; break; ++ } ++ } ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2: ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : return Si2168_TERRESTRIAL; break; ++ } ++ SiERROR("UNKNOWW media!\n"); ++ return 0; ++} ++/************************************************************************************************************************ ++ Si2168_L2_switch_to_standard function ++ Use: Standard switching function selection ++ Used to switch nicely to the wanted standard, taking into account the previous state ++ Parameter: new_standard the wanted standard to switch to ++ Behavior: This function positions a set of flags to easily decide what needs to be done to ++ switch between standards. ++************************************************************************************************************************/ ++int Si2168_L2_switch_to_standard (Si2168_L2_Context *front_end, int new_standard, unsigned char force_full_init) ++{ ++ /* previous state flags */ ++ int dtv_demod_already_used = 0; ++ int ter_tuner_already_used = 0; ++ int ter_clock_already_used = 0; ++ /* new state flags */ ++ int dtv_demod_needed = 0; ++ int ter_tuner_needed = 0; ++ int ter_clock_needed = 0; ++ int dtv_demod_sleep_request= 0; ++ int res; ++ ++#ifdef PROFILING ++ int start; ++ int ter_tuner_delay = 0; ++ int dtv_demod_delay = 0; ++ int switch_start; ++ char sequence[100]; ++ #define TER_DELAY ter_tuner_delay=ter_tuner_delay+system_time()-start;start=system_time(); ++ #define DTV_DELAY dtv_demod_delay=dtv_demod_delay+system_time()-start;start=system_time(); ++#else ++ #define TER_DELAY ++ #define DTV_DELAY ++#endif /* PROFILING */ ++ ++#ifdef PROFILING ++ start = switch_start = system_time(); ++ SiTRACE("%s->%s\n", Si2168_standardName(front_end->previous_standard), Si2168_standardName(new_standard) ); ++#endif /* PROFILING */ ++ ++ SiTRACE("Si2168_switch_to_standard starting...\n"); ++ SiTRACE("starting with Si2168_init_done %d, first_init_done %d ", front_end->Si2168_init_done, front_end->first_init_done); ++ SiTRACE("TER flags: TER_init_done %d, TER_tuner_init_done %d ", front_end->TER_init_done, front_end->TER_tuner_init_done); ++ ++ /* In this function is called for the first time, force a full init */ ++ if (front_end->first_init_done == 0) {force_full_init = 1;} ++ /* ------------------------------------------------------------ */ ++ /* Set Previous Flags */ ++ /* Setting flags representing the previous state */ ++ /* NB: Any value not matching a known standard will init as ATV */ ++ /* Logic applied: */ ++ /* dtv demod was used for TERRESTRIAL and SATELLITE reception */ ++ /* ter tuner was used for TERRESTRIAL reception */ ++ /* and for SATELLITE reception if it is the SAT clock source */ ++ /* sat tuner was used for SATELLITE reception */ ++ /* and for TERRESTRIAL reception if it is the TER clock source*/ ++ /* ------------------------------------------------------------ */ ++ switch (front_end->previous_standard) { ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2: ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : { ++ dtv_demod_already_used = 1; ++ ter_tuner_already_used = 1; ++ if ( Si2168_TER_CLOCK_SOURCE == Si2168_TER_Tuner_clock) { ++ ter_clock_already_used = 1; ++ } ++ break; ++ } ++ case Si2168_DD_MODE_PROP_MODULATION_ANALOG: { ++ ter_tuner_already_used = 1; ++ } ++ default : /* SLEEP */ { ++ ter_tuner_already_used = 0; ++ break; ++ } ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* Set Needed Flags */ ++ /* Setting flags representing the new state */ ++ /* Logic applied: */ ++ /* dtv demod is needed for TERRESTRIAL and SATELLITE reception */ ++ /* ter tuner is needed for TERRESTRIAL reception */ ++ /* and for SATELLITE reception if it is the SAT clock source */ ++ /* sat tuner is needed for SATELLITE reception */ ++ /* and for TERRESTRIAL reception if it is the TER clock source*/ ++ /* ------------------------------------------------------------ */ ++ switch (new_standard) { ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2: ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : { ++ dtv_demod_needed = 1; ++ ter_tuner_needed = 1; ++ if ( Si2168_TER_CLOCK_SOURCE == Si2168_TER_Tuner_clock) { ++ ter_clock_needed = 1; ++ } ++ break; ++ } ++ case Si2168_DD_MODE_PROP_MODULATION_ANALOG: { ++ ter_tuner_needed = 1; ++ } ++ default : /* SLEEP */ { ++ ter_tuner_needed = 0; ++ break; ++ } ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* if 'force' flag is set, set flags to trigger a full init */ ++ /* This can be used to re-init the NIM after a power cycle */ ++ /* or a HW reset */ ++ /* ------------------------------------------------------------ */ ++ if (force_full_init) { ++ SiTRACE("Forcing full init\n"); ++ /* set 'init_done' flags to force full init */ ++ front_end->first_init_done = 0; ++ front_end->Si2168_init_done = 0; ++ front_end->TER_init_done = 0; ++ front_end->TER_tuner_init_done = 0; ++ /* set 'already used' flags to force full init */ ++ ter_tuner_already_used = 0; ++ dtv_demod_already_used = 0; ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* Request demodulator sleep if its clock will be stopped */ ++ /* ------------------------------------------------------------ */ ++ if ((ter_clock_already_used == 1) & (ter_clock_needed == 0) ) { SiTRACE("TER clock 1->0 "); dtv_demod_sleep_request = 1; } ++ if ((ter_clock_already_used == 0) & (ter_clock_needed == 1) ) { SiTRACE("TER clock 0->1 "); dtv_demod_sleep_request = 1; } ++ /* ------------------------------------------------------------ */ ++ /* Request demodulator sleep if transition from '1' to '0' */ ++ /* ------------------------------------------------------------ */ ++ if ((dtv_demod_already_used == 1) & (dtv_demod_needed == 0) ) { dtv_demod_sleep_request = 1; } ++ SiTRACE("dtv_demod_already_used %d, dtv_demod_needed %d, dtv_demod_sleep_request %d\n", dtv_demod_already_used , dtv_demod_needed, dtv_demod_sleep_request); ++ /* ------------------------------------------------------------ */ ++ /* Sleep dtv demodulator if requested */ ++ /* ------------------------------------------------------------ */ ++ if (dtv_demod_sleep_request == 1) { ++ SiTRACE("Sleep DTV demod\n"); ++ Si2168_STANDBY (front_end->demod); ++ DTV_DELAY ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* Set media for new standard */ ++ /* ------------------------------------------------------------ */ ++ front_end->demod->prop->dd_mode.modulation = (unsigned char)new_standard; ++ front_end->demod->media = Si2168_Media(front_end->demod, front_end->demod->prop->dd_mode.modulation); ++ ++ /* ------------------------------------------------------------ */ ++ /* Allow i2c traffic to reach the tuners */ ++ /* ------------------------------------------------------------ */ ++ SiTRACE("Connect tuners i2c\n"); ++ Si2168_L2_Tuner_I2C_Enable(front_end); ++ DTV_DELAY ++ ++ /* ------------------------------------------------------------ */ ++ /* Sleep Ter Tuner */ ++ /* Sleep terrestrial tuner if transition from '1' to '0' */ ++ /* ------------------------------------------------------------ */ ++ if ((ter_tuner_already_used == 1) & (ter_tuner_needed == 0) ) { ++ SiTRACE("Sleep terrestrial tuner\n"); ++ #ifdef TER_TUNER_CLOCK_OFF ++ SiTRACE("Terrestrial tuner clock OFF\n"); ++ if ((res= TER_TUNER_CLOCK_OFF(front_end->tuner_ter)) !=0 ) { ++ SiTRACE("Terrestrial tuner CLOCK OFF error: 0x%02x : %s\n",res, TER_TUNER_ERROR_TEXT((unsigned char)res) ); ++ SiERROR("Terrestrial tuner CLOCK OFF error!\n"); ++ return 0; ++ }; ++ #endif /* TER_TUNER_CLOCK_OFF */ ++ #ifdef TER_TUNER_STANDBY ++ SiTRACE("Terrestrial tuner STANDBY\n"); ++ if ((res= TER_TUNER_STANDBY(front_end->tuner_ter)) !=0 ) { ++ SiTRACE("Terrestrial tuner Standby error: 0x%02x : %s\n",res, TER_TUNER_ERROR_TEXT((unsigned char)res) ); ++ SiERROR("Terrestrial tuner Standby error!\n"); ++ return 0; ++ }; ++ #endif /* TER_TUNER_STANDBY */ ++ TER_DELAY ++ } ++ ++ ++ /* ------------------------------------------------------------ */ ++ /* Wakeup Ter Tuner */ ++ /* Wake up terrestrial tuner if transition from '0' to '1' */ ++ /* ------------------------------------------------------------ */ ++ if ((ter_tuner_already_used == 0) & (ter_tuner_needed == 1)) { ++ /* Do a full init of the Ter Tuner only if it has not been already done */ ++ if (front_end->TER_tuner_init_done==0) { ++ SiTRACE("Init terrestrial tuner\n"); ++ #ifdef TER_TUNER_INIT ++ if ((res= TER_TUNER_INIT(front_end->tuner_ter)) !=0) { ++ #ifdef TER_TUNER_ERROR_TEXT ++ SiTRACE("Terrestrial tuner HW init error: 0x%02x : %s\n",res, TER_TUNER_ERROR_TEXT((unsigned char)res) ); ++ #endif /* TER_TUNER_ERROR_TEXT */ ++ SiERROR("Terrestrial tuner HW init error!\n"); ++ return 0; ++ }; ++ #endif /* TER_TUNER_INIT */ ++ front_end->TER_tuner_init_done++; ++ } else { ++ SiTRACE("Wakeup terrestrial tuner\n"); ++ #ifdef TER_TUNER_WAKEUP ++ if ((res= TER_TUNER_WAKEUP(front_end->tuner_ter)) !=0) { ++ SiTRACE("Terrestrial tuner wake up error: 0x%02x : %s\n",res, TER_TUNER_ERROR_TEXT((unsigned char)res) ); ++ SiERROR("Terrestrial tuner wake up error!\n"); ++ return 0; ++ }; ++ #endif /* TER_TUNER_WAKEUP */ ++ } ++ TER_DELAY ++ } ++ /* ------------------------------------------------------------ */ ++ /* If the terrestrial tuner's clock is required, activate it */ ++ /* ------------------------------------------------------------ */ ++ SiTRACE("ter_clock_needed %d\n",ter_clock_needed); ++ if (ter_clock_needed) { ++ SiTRACE("Turn terrestrial tuner clock on\n"); ++ #ifdef TER_TUNER_CLOCK_ON ++ SiTRACE("Terrestrial tuner CLOCK ON\n"); ++ if ((res= TER_TUNER_CLOCK_ON(front_end->tuner_ter) ) !=0) { ++ SiTRACE("Terrestrial tuner CLOCK ON error: 0x%02x : %s\n",res, TER_TUNER_ERROR_TEXT((unsigned char)res) ); ++ SiERROR("Terrestrial tuner CLOCK ON error!\n"); ++ return 0; ++ }; ++ #endif /* TER_TUNER_CLOCK_ON */ ++ TER_DELAY ++ } ++ if ((front_end->previous_standard != new_standard) & (dtv_demod_needed == 0) & (front_end->demod->media == Si2168_TERRESTRIAL)) { ++ if (front_end->demod->media == Si2168_TERRESTRIAL) { ++ #ifdef TER_TUNER_ATV_LO_INJECTION ++ TER_TUNER_ATV_LO_INJECTION(front_end->tuner_ter); ++ #endif /* TER_TUNER_ATV_LO_INJECTION */ ++ ++ } ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* Change Dtv Demod standard if required */ ++ /* ------------------------------------------------------------ */ ++ if ((front_end->previous_standard != new_standard) & (dtv_demod_needed == 1)) { ++ SiTRACE("Store demod standard (%d)\n", new_standard); ++ front_end->demod->standard = new_standard; ++ DTV_DELAY ++ /* Set flag to trigger Si2168 init or re_init, to complete */ ++ /* the standard change */ ++ dtv_demod_already_used = 0; ++ if (front_end->demod->media == Si2168_TERRESTRIAL) { ++ #ifdef TER_TUNER_DTV_LO_INJECTION ++ TER_TUNER_DTV_LO_INJECTION(front_end->tuner_ter); ++ #endif /* TER_TUNER_DTV_LO_INJECTION */ ++ } ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* Wakeup Dtv Demod */ ++ /* if it has been put in 'standby mode' and is needed */ ++ /* ------------------------------------------------------------ */ ++ if (front_end->Si2168_init_done) { ++ SiTRACE("dtv_demod_sleep_request %d\n",dtv_demod_sleep_request); ++ if ((dtv_demod_sleep_request == 1) & (dtv_demod_needed == 1) ) { ++ SiTRACE("Wake UP DTV demod\n"); ++ if (Si2168_WAKEUP (front_end->demod) == NO_Si2168_ERROR) { ++ SiTRACE("Wake UP DTV demod OK\n"); ++ } else { ++ SiERROR("Wake UP DTV demod failed!\n"); ++ SiTRACE("Wake UP DTV demod failed!\n"); ++ return 0; ++ } ++ } ++ } ++ /* ------------------------------------------------------------ */ ++ /* Setup Dtv Demod */ ++ /* Setup dtv demodulator if transition from '0' to '1' */ ++ /* ------------------------------------------------------------ */ ++ if ((dtv_demod_already_used == 0) & (dtv_demod_needed == 1)) { ++ /* Do the 'first init' only the first time, plus if requested */ ++ /* (when 'force' flag is 1, Si2168_init_done is set to '0') */ ++ if (!front_end->Si2168_init_done) { ++ SiTRACE("Init demod\n"); ++ if (Si2168_Init(front_end->demod) == NO_Si2168_ERROR) { ++ front_end->Si2168_init_done = 1; ++ SiTRACE("Demod init OK\n"); ++ } else { ++ SiTRACE("Demod init failed!\n"); ++ SiERROR("Demod init failed!\n"); ++ return 0; ++ } ++ } ++ if (front_end->demod->media == Si2168_TERRESTRIAL) { ++ SiTRACE("front_end->demod->media Si2168_TERRESTRIAL\n"); ++ if (front_end->TER_init_done == 0) { ++ SiTRACE("Configure demod for TER\n"); ++ if (Si2168_Configure(front_end->demod) == NO_Si2168_ERROR) { ++ /* set dd_mode.modulation again, as it is overwritten by Si2168_Configure */ ++ front_end->demod->prop->dd_mode.modulation = (unsigned char)new_standard; ++ /* set dd_mode.invert_spectrum again, as it is overwritten by Si2168_Configure */ ++ front_end->demod->prop->dd_mode.invert_spectrum = Si2168_DD_MODE_PROP_INVERT_SPECTRUM_NORMAL; ++ front_end->TER_init_done = 1; ++ } else { ++ SiTRACE("Demod TER configuration failed !\n"); ++ SiERROR("Demod TER configuration failed !\n"); ++ return 0; ++ } ++ } ++ DTV_DELAY ++ /* ------------------------------------------------------------ */ ++ /* Manage FEF mode in TER tuner */ ++ /* ------------------------------------------------------------ */ ++ if (new_standard == Si2168_DD_MODE_PROP_MODULATION_DVBT2) { ++ Si2168_L2_TER_FEF_SETUP (front_end, 1); ++ } else { ++ Si2168_L2_TER_FEF_SETUP (front_end, 0); ++ } ++ TER_DELAY ++ } ++ if (Si2168_L1_SetProperty2(front_end->demod, Si2168_DD_MODE_PROP_CODE)==0) { ++ Si2168_L1_DD_RESTART(front_end->demod); ++ } else { ++ SiTRACE("Demod restart failed !\n"); ++ return 0; ++ } ++ DTV_DELAY ++ } ++ ++ /* ------------------------------------------------------------ */ ++ /* Forbid i2c traffic to reach the tuners */ ++ /* ------------------------------------------------------------ */ ++ SiTRACE("Disconnect tuners i2c\n"); ++ Si2168_L2_Tuner_I2C_Disable(front_end); ++ DTV_DELAY ++ ++ /* ------------------------------------------------------------ */ ++ /* update value of previous_standard to prepare next call */ ++ /* ------------------------------------------------------------ */ ++ front_end->previous_standard = new_standard; ++ front_end->demod->standard = new_standard; ++ ++ front_end->first_init_done = 1; ++#ifdef PROFILING ++ sprintf(sequence,"%s",""); ++ sprintf(sequence,"%s| TER: %4d ms ", sequence, ter_tuner_delay); ++ sprintf(sequence,"%s| DTV: %4d ms ", sequence, dtv_demod_delay); ++ sprintf(sequence,"%s| (%5d ms) ", sequence, system_time()-switch_start); ++ SiTRACE("%s\n", sequence); ++#endif /* PROFILING */ ++ ++ SiTRACE("Si2168_switch_to_standard complete\n"); ++ return 1; ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_switch_to_standard function ++ Use: Standard switching function selection ++ Used to switch nicely to the wanted standard, taking into account the previous state ++ Parameter: new_standard the wanted standard to switch to ++ Return: 1 if sucessful, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_API_switch_to_standard (SILABS_FE_Context *front_end, int standard, unsigned char force_full_init) ++{ ++ front_end->init_ok = 0; ++ SiTRACE("Wrapper switching to %s\n", Silabs_Standard_Text((CUSTOM_Standard_Enum)standard) ); ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { front_end->init_ok = Si2168_L2_switch_to_standard (front_end->Si2168_FE , Silabs_standardCode(front_end, (CUSTOM_Standard_Enum)standard), force_full_init);} ++#endif /* Si2168_COMPATIBLE */ ++ if (front_end->init_ok == 0) { ++ SiTRACE("Problem switching to %s\n", Silabs_Standard_Text((CUSTOM_Standard_Enum)standard)); ++ } else { ++ front_end->standard = standard; ++ } ++ return front_end->init_ok; ++} ++ ++///////////////////////////////////////////////////////////////////////////////// ++void Si2168_setupCOMMONDefaults (L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_setupCOMMONDefaults \n"); ++ api->prop->master_ien.ddien = Si2168_MASTER_IEN_PROP_DDIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.scanien = Si2168_MASTER_IEN_PROP_SCANIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.errien = Si2168_MASTER_IEN_PROP_ERRIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.ctsien = Si2168_MASTER_IEN_PROP_CTSIEN_OFF ; /* (default 'OFF') */ ++ ++} ++ ++void Si2168_setupDDDefaults (L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_setupDDDefaults \n"); ++ api->prop->dd_ber_resol.exp = 7; /* (default 7) */ ++ api->prop->dd_ber_resol.mant = 1; /* (default 1) */ ++ ++ api->prop->dd_cber_resol.exp = 5; /* (default 5) */ ++ api->prop->dd_cber_resol.mant = 1; /* (default 1) */ ++ ++ ++ api->prop->dd_fer_resol.exp = 2; /* (default 3) */ ++ api->prop->dd_fer_resol.mant = 1; /* (default 1) */ ++ ++ api->prop->dd_ien.ien_bit0 = Si2168_DD_IEN_PROP_IEN_BIT0_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_ien.ien_bit1 = Si2168_DD_IEN_PROP_IEN_BIT1_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_ien.ien_bit2 = Si2168_DD_IEN_PROP_IEN_BIT2_ENABLE ; /* (default 'DISABLE') Used for DVB-T/T2 'LOCK' */ ++ api->prop->dd_ien.ien_bit3 = Si2168_DD_IEN_PROP_IEN_BIT3_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_ien.ien_bit4 = Si2168_DD_IEN_PROP_IEN_BIT4_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_ien.ien_bit5 = Si2168_DD_IEN_PROP_IEN_BIT5_ENABLE ; /* (default 'DISABLE') Used for DVB-T/T2 'NO_CHANNEL' */ ++ api->prop->dd_ien.ien_bit6 = Si2168_DD_IEN_PROP_IEN_BIT6_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_ien.ien_bit7 = Si2168_DD_IEN_PROP_IEN_BIT7_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->dd_if_input_freq.offset = 5000; /* (default 5000) */ ++ ++ api->prop->dd_int_sense.neg_bit0 = Si2168_DD_INT_SENSE_PROP_NEG_BIT0_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit1 = Si2168_DD_INT_SENSE_PROP_NEG_BIT1_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit2 = Si2168_DD_INT_SENSE_PROP_NEG_BIT2_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit3 = Si2168_DD_INT_SENSE_PROP_NEG_BIT3_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit4 = Si2168_DD_INT_SENSE_PROP_NEG_BIT4_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit5 = Si2168_DD_INT_SENSE_PROP_NEG_BIT5_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit6 = Si2168_DD_INT_SENSE_PROP_NEG_BIT6_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.neg_bit7 = Si2168_DD_INT_SENSE_PROP_NEG_BIT7_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.pos_bit0 = Si2168_DD_INT_SENSE_PROP_POS_BIT0_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.pos_bit1 = Si2168_DD_INT_SENSE_PROP_POS_BIT1_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.pos_bit2 = Si2168_DD_INT_SENSE_PROP_POS_BIT2_ENABLE ; /* (default 'DISABLE') Sense DVB-T/T2 'LOCK' changes from '0' to '1' */ ++ api->prop->dd_int_sense.pos_bit3 = Si2168_DD_INT_SENSE_PROP_POS_BIT3_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.pos_bit4 = Si2168_DD_INT_SENSE_PROP_POS_BIT4_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.pos_bit5 = Si2168_DD_INT_SENSE_PROP_POS_BIT5_ENABLE ; /* (default 'DISABLE') Sense DVB-T/T2 'NO_CHANNEL' changes from '0' to '1' */ ++ api->prop->dd_int_sense.pos_bit6 = Si2168_DD_INT_SENSE_PROP_POS_BIT6_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dd_int_sense.pos_bit7 = Si2168_DD_INT_SENSE_PROP_POS_BIT7_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->dd_mode.bw = Si2168_DD_MODE_PROP_BW_BW_8MHZ ; /* (default 'BW_8MHZ') */ ++ api->prop->dd_mode.modulation = Si2168_DD_MODE_PROP_MODULATION_DVBT ; /* (default 'DVBT') */ ++ api->prop->dd_mode.invert_spectrum = Si2168_DD_MODE_PROP_INVERT_SPECTRUM_NORMAL ; /* (default 'NORMAL') */ ++ api->prop->dd_mode.auto_detect = Si2168_DD_MODE_PROP_AUTO_DETECT_NONE ; /* (default 'NONE') */ ++ ++ api->prop->dd_per_resol.exp = 5; /* (default 5) */ ++ api->prop->dd_per_resol.mant = 1; /* (default 1) */ ++ ++ api->prop->dd_rsq_ber_threshold.exp = 1; /* (default 1) */ ++ api->prop->dd_rsq_ber_threshold.mant = 10; /* (default 10) */ ++ ++ api->prop->dd_ts_freq.req_freq_10khz = 760; /* (default 720) */ ++ ++ if(api->ts_bus_mode == SILABS_TS_SERIAL) { ++ api->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_SERIAL; ++ SiTRACE("Si2168_setupDDDefaults, Si2168_DD_TS_MODE_PROP_MODE_SERIAL\n"); ++ } else if(api->ts_bus_mode == SILABS_TS_PARALLEL) { ++ api->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_PARALLEL; ++ SiTRACE("Si2168_setupDDDefaults, Si2168_DD_TS_MODE_PROP_MODE_PARALLEL\n"); ++ } else { ++ api->prop->dd_ts_mode.mode = Si2168_DD_TS_MODE_PROP_MODE_TRISTATE; ++ SiTRACE("Si2168_setupDDDefaults, Si2168_DD_TS_MODE_PROP_MODE_TRISTATE\n"); ++ } ++ if(api->ts_clock_mode == 1) ++ api->prop->dd_ts_mode.clock = Si2168_DD_TS_MODE_PROP_CLOCK_MANUAL; ++ else ++ api->prop->dd_ts_mode.clock = Si2168_DD_TS_MODE_PROP_CLOCK_AUTO_ADAPT; ++ ++ api->prop->dd_ts_mode.clk_gapped_en = Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_DISABLED; ++ api->prop->dd_ts_mode.ts_err_polarity = Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_NOT_INVERTED ; /* (default 'NOT_INVERTED') */ ++ api->prop->dd_ts_mode.special = Si2168_DD_TS_MODE_PROP_SPECIAL_FULL_TS ; /* (default 'FULL_TS') */ ++ ++ api->prop->dd_ts_setup_par.ts_data_strength = 15;//3; /* (default 3) */ ++ api->prop->dd_ts_setup_par.ts_data_shape = 3;//2; /* (default 1) */ ++ api->prop->dd_ts_setup_par.ts_clk_strength = 15;//3; /* (default 3) */ ++ api->prop->dd_ts_setup_par.ts_clk_shape = 3;//2; /* (default 1) */ ++ api->prop->dd_ts_setup_par.ts_clk_invert = Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_INVERTED ; /* (default 'INVERTED') */ ++ api->prop->dd_ts_setup_par.ts_clk_shift = 0; /* (default 0) */ ++ ++ api->prop->dd_ts_setup_ser.ts_data_strength = 15;//3; /* (default 15) */ ++ api->prop->dd_ts_setup_ser.ts_data_shape = 3;//1; /* (default 3) */ ++ api->prop->dd_ts_setup_ser.ts_clk_strength = 15;//3; /* (default 15) */ ++ api->prop->dd_ts_setup_ser.ts_clk_shape = 3;//1; /* (default 3) */ ++ api->prop->dd_ts_setup_ser.ts_clk_invert = Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_INVERTED ; /* (default 'INVERTED') */ ++ api->prop->dd_ts_setup_ser.ts_sync_duration = Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_FIRST_BIT; /* (default 'FIRST_BYTE') */ ++ api->prop->dd_ts_setup_ser.ts_byte_order = Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_MSB_FIRST ; /* (default 'MSB_FIRST') */ ++ ++} ++ ++void Si2168_setupDVBCDefaults (L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_setupDVBCDefaults \n"); ++ api->prop->dvbc_adc_crest_factor.crest_factor = 112; /* (default 112) */ ++ ++ api->prop->dvbc_afc_range.range_khz = 100; /* (default 100) */ ++ ++ api->prop->dvbc_constellation.constellation = Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_AUTO ; /* (default 'AUTO') */ ++ ++ api->prop->dvbc_symbol_rate.rate = 6900; /* (default 6900) */ ++ ++} ++ ++void Si2168_setupDVBTDefaults (L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_setupDVBTDefaults \n"); ++ api->prop->dvbt_adc_crest_factor.crest_factor = 130; /* (default 130) */ ++ ++ api->prop->dvbt_afc_range.range_khz = 550; /* (default 550) */ ++ ++ api->prop->dvbt_hierarchy.stream = Si2168_DVBT_HIERARCHY_PROP_STREAM_HP ; /* (default 'HP') */ ++ ++} ++ ++void Si2168_setupDVBT2Defaults (L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_setupDVBT2Defaults \n"); ++ api->prop->dvbt2_adc_crest_factor.crest_factor = 130; /* (default 130) */ ++ ++ api->prop->dvbt2_afc_range.range_khz = 550; /* (default 550) */ ++ ++ api->prop->dvbt2_fef_tuner.tuner_delay = 1; /* (default 1) */ ++ api->prop->dvbt2_fef_tuner.tuner_freeze_time = 1; /* (default 1) */ ++ api->prop->dvbt2_fef_tuner.tuner_unfreeze_time = 1; /* (default 1) */ ++ ++} ++ ++ ++void Si2168_setupSCANDefaults (L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_setupSCANDefaults \n"); ++ api->prop->scan_fmax.scan_fmax = 0; /* (default 0) */ ++ ++ api->prop->scan_fmin.scan_fmin = 0; /* (default 0) */ ++ ++ api->prop->scan_ien.buzien = Si2168_SCAN_IEN_PROP_BUZIEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->scan_ien.reqien = Si2168_SCAN_IEN_PROP_REQIEN_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->scan_int_sense.buznegen = Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_ENABLE ; /* (default 'ENABLE') */ ++ api->prop->scan_int_sense.reqnegen = Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->scan_int_sense.buzposen = Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->scan_int_sense.reqposen = Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ ++ ++ api->prop->scan_symb_rate_max.scan_symb_rate_max = 0; /* (default 0) */ ++ ++ api->prop->scan_symb_rate_min.scan_symb_rate_min = 0; /* (default 0) */ ++ ++ api->prop->scan_ter_config.mode = Si2168_SCAN_TER_CONFIG_PROP_MODE_BLIND_SCAN ; /* (default 'BLIND_SCAN') */ ++ api->prop->scan_ter_config.analog_bw = Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_8MHZ ; /* (default '8MHZ') */ ++ api->prop->scan_ter_config.search_analog = Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_DISABLE ; /* (default 'DISABLE') */ ++} ++ ++void Si2168_setupAllDefaults (L1_Si2168_Context *api) ++{ ++ Si2168_setupCOMMONDefaults (api); ++ Si2168_setupDDDefaults (api); ++ Si2168_setupDVBCDefaults (api); ++ ++ ++ Si2168_setupDVBTDefaults (api); ++ ++ Si2168_setupDVBT2Defaults (api); ++ ++ Si2168_setupSCANDefaults (api); ++} ++ ++ /***************************************************************************************** ++ NAME: Si2168_downloadCOMMONProperties ++ DESCRIPTION: Setup Si2168 COMMON properties configuration ++ This function will download all the COMMON configuration properties. ++ The function SetupCOMMONDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++ Programming Guide Reference: COMMON setup flowchart ++******************************************************************************************/ ++int Si2168_downloadCOMMONProperties(L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_downloadCOMMONProperties \n"); ++#ifdef Si2168_MASTER_IEN_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_MASTER_IEN_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_MASTER_IEN_PROP */ ++return NO_Si2168_ERROR; ++} ++ /***************************************************************************************** ++ NAME: Si2168_downloadDDProperties ++ DESCRIPTION: Setup Si2168 DD properties configuration ++ This function will download all the DD configuration properties. ++ The function SetupDDDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++ Programming Guide Reference: DD setup flowchart ++******************************************************************************************/ ++int Si2168_downloadDDProperties(L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_downloadDDProperties \n"); ++#ifdef Si2168_DD_BER_RESOL_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_BER_RESOL_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_BER_RESOL_PROP */ ++#ifdef Si2168_DD_CBER_RESOL_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_CBER_RESOL_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_CBER_RESOL_PROP */ ++ ++#ifdef Si2168_DD_FER_RESOL_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_FER_RESOL_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_FER_RESOL_PROP */ ++#ifdef Si2168_DD_IEN_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_IEN_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_IEN_PROP */ ++#ifdef Si2168_DD_IF_INPUT_FREQ_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_IF_INPUT_FREQ_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_IF_INPUT_FREQ_PROP */ ++#ifdef Si2168_DD_INT_SENSE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_INT_SENSE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_INT_SENSE_PROP */ ++#ifdef Si2168_DD_MODE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_MODE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_MODE_PROP */ ++#ifdef Si2168_DD_PER_RESOL_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_PER_RESOL_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_PER_RESOL_PROP */ ++#ifdef Si2168_DD_RSQ_BER_THRESHOLD_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_RSQ_BER_THRESHOLD_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_RSQ_BER_THRESHOLD_PROP */ ++#ifdef Si2168_DD_TS_FREQ_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_TS_FREQ_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_TS_FREQ_PROP */ ++#ifdef Si2168_DD_TS_MODE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_TS_MODE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_TS_MODE_PROP */ ++#ifdef Si2168_DD_TS_SETUP_PAR_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_TS_SETUP_PAR_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_TS_SETUP_PAR_PROP */ ++#ifdef Si2168_DD_TS_SETUP_SER_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DD_TS_SETUP_SER_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DD_TS_SETUP_SER_PROP */ ++return NO_Si2168_ERROR; ++} ++ /***************************************************************************************** ++ NAME: Si2168_downloadDVBCProperties ++ DESCRIPTION: Setup Si2168 DVBC properties configuration ++ This function will download all the DVBC configuration properties. ++ The function SetupDVBCDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++ Programming Guide Reference: DVBC setup flowchart ++******************************************************************************************/ ++int Si2168_downloadDVBCProperties(L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_downloadDVBCProperties \n"); ++#ifdef Si2168_DVBC_ADC_CREST_FACTOR_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBC_ADC_CREST_FACTOR_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBC_ADC_CREST_FACTOR_PROP */ ++#ifdef Si2168_DVBC_AFC_RANGE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBC_AFC_RANGE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBC_AFC_RANGE_PROP */ ++#ifdef Si2168_DVBC_CONSTELLATION_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBC_CONSTELLATION_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBC_CONSTELLATION_PROP */ ++#ifdef Si2168_DVBC_SYMBOL_RATE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBC_SYMBOL_RATE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBC_SYMBOL_RATE_PROP */ ++return NO_Si2168_ERROR; ++} ++ /***************************************************************************************** ++ NAME: Si2168_downloadDVBTProperties ++ DESCRIPTION: Setup Si2168 DVBT properties configuration ++ This function will download all the DVBT configuration properties. ++ The function SetupDVBTDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++ Programming Guide Reference: DVBT setup flowchart ++******************************************************************************************/ ++int Si2168_downloadDVBTProperties(L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_downloadDVBTProperties \n"); ++#ifdef Si2168_DVBT_ADC_CREST_FACTOR_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBT_ADC_CREST_FACTOR_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBT_ADC_CREST_FACTOR_PROP */ ++#ifdef Si2168_DVBT_AFC_RANGE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBT_AFC_RANGE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBT_AFC_RANGE_PROP */ ++#ifdef Si2168_DVBT_HIERARCHY_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBT_HIERARCHY_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBT_HIERARCHY_PROP */ ++return NO_Si2168_ERROR; ++} ++ /***************************************************************************************** ++ NAME: Si2168_downloadDVBT2Properties ++ DESCRIPTION: Setup Si2168 DVBT2 properties configuration ++ This function will download all the DVBT2 configuration properties. ++ The function SetupDVBT2Defaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++ Programming Guide Reference: DVBT2 setup flowchart ++******************************************************************************************/ ++int Si2168_downloadDVBT2Properties(L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_downloadDVBT2Properties \n"); ++#ifdef Si2168_DVBT2_ADC_CREST_FACTOR_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CODE) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBT2_ADC_CREST_FACTOR_PROP */ ++#ifdef Si2168_DVBT2_AFC_RANGE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBT2_AFC_RANGE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBT2_AFC_RANGE_PROP */ ++#ifdef Si2168_DVBT2_FEF_TUNER_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_DVBT2_FEF_TUNER_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_DVBT2_FEF_TUNER_PROP */ ++return NO_Si2168_ERROR; ++} ++ /***************************************************************************************** ++ NAME: Si2168_downloadSCANProperties ++ DESCRIPTION: Setup Si2168 SCAN properties configuration ++ This function will download all the SCAN configuration properties. ++ The function SetupSCANDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2168 Context ++ Returns: I2C transaction error code, NO_Si2168_ERROR if successful ++ Programming Guide Reference: SCAN setup flowchart ++******************************************************************************************/ ++int Si2168_downloadSCANProperties(L1_Si2168_Context *api) ++{ ++ SiTRACE("Si2168_downloadSCANProperties \n"); ++#ifdef Si2168_SCAN_FMAX_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_FMAX_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_FMAX_PROP */ ++#ifdef Si2168_SCAN_FMIN_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_FMIN_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_FMIN_PROP */ ++#ifdef Si2168_SCAN_IEN_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_IEN_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_IEN_PROP */ ++#ifdef Si2168_SCAN_INT_SENSE_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_INT_SENSE_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_INT_SENSE_PROP */ ++ ++#ifdef Si2168_SCAN_SYMB_RATE_MAX_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_SYMB_RATE_MAX_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_SYMB_RATE_MAX_PROP */ ++#ifdef Si2168_SCAN_SYMB_RATE_MIN_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_SYMB_RATE_MIN_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_SYMB_RATE_MIN_PROP */ ++#ifdef Si2168_SCAN_TER_CONFIG_PROP ++ if (Si2168_L1_SetProperty2(api, Si2168_SCAN_TER_CONFIG_PROP_CODE ) != NO_Si2168_ERROR) {return ERROR_Si2168_SENDING_COMMAND;} ++#endif /* Si2168_SCAN_TER_CONFIG_PROP */ ++return NO_Si2168_ERROR; ++} ++//////////////////////////////////////////////////////////////////////////////// ++int Si2168_downloadAllProperties (L1_Si2168_Context *api) ++{ ++ Si2168_downloadCOMMONProperties (api); ++ Si2168_downloadDDProperties (api); ++ if (api->media == Si2168_TERRESTRIAL) { ++ Si2168_downloadDVBCProperties (api); ++ } ++ ++ ++ if (api->media == Si2168_TERRESTRIAL) { ++ Si2168_downloadDVBTProperties (api); ++ } ++ ++ if (api->media == Si2168_TERRESTRIAL) { ++ Si2168_downloadDVBT2Properties (api); ++ } ++ ++ Si2168_downloadSCANProperties (api); ++ return 0; ++} ++ ++/************************************************************************************************************************ ++ Si2168_standardName function ++ Use: standard text retrieval function ++ Used to retrieve the standard text used by the Si2168 ++ Parameter: standard, the value of the standard ++************************************************************************************************************************/ ++char *Si2168_standardName (int standard) ++{ ++ switch (standard) ++ { ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : {return (char*)"DVB-T" ;} ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : {return (char*)"DVB-C" ;} ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2 : {return (char*)"DVB-T2" ;} ++ default : {return (char*)"UNKNOWN";} ++ } ++} ++ ++/************************************************************************************************************************ ++ Si2168_L2_Tune function ++ Use: tuner current frequency retrieval function ++ Used to retrieve the current RF from the tuner's driver. ++ Porting: Replace the internal TUNER function calls by the final tuner's corresponding calls ++ Comments: If the tuner is connected via the demodulator's I2C switch, enabling/disabling the i2c_passthru is required before/after tuning. ++ Behavior: This function closes the Si2168's I2C switch then tunes and finally reopens the I2C switch ++ Parameter: *front_end, the front-end handle ++ Parameter: rf, the frequency to tune at ++ Returns: rf ++************************************************************************************************************************/ ++int Si2168_L2_Tune (Si2168_L2_Context *front_end, int rf) ++{ ++#ifdef TUNERTER_API ++ char bw; ++ char modulation; ++#endif /* TUNERTER_API */ ++ ++ SiTRACE("Si2168_L2_Tune at %d\n",rf); ++ ++ Si2168_L2_Tuner_I2C_Enable(front_end); ++ ++ if (front_end->demod->media == Si2168_TERRESTRIAL) { ++ Si2168_L2_TER_FEF (front_end, 0); ++#ifdef TUNERTER_API ++ if (front_end->demod->prop->dd_mode.modulation == Si2168_DD_MODE_PROP_MODULATION_DVBC ) { ++ modulation = L1_RF_TER_TUNER_MODULATION_DVBC; ++ bw = 8; ++ } else { ++ modulation = L1_RF_TER_TUNER_MODULATION_DVBT; ++ switch (front_end->demod->prop->dd_mode.bw) { ++ case Si2168_DD_MODE_PROP_BW_BW_1D7MHZ : bw = 6; break; ++ case Si2168_DD_MODE_PROP_BW_BW_5MHZ : bw = 6; break; ++ case Si2168_DD_MODE_PROP_BW_BW_6MHZ : bw = 6; break; ++ case Si2168_DD_MODE_PROP_BW_BW_7MHZ : bw = 7; break; ++ case Si2168_DD_MODE_PROP_BW_BW_8MHZ : bw = 8; break; ++ default: SiERROR("Invalid dd_mode.bw\n"); bw = 8; break; ++ } ++ } ++#endif /* TUNERTER_API */ ++ L1_RF_TER_TUNER_Tune (front_end->tuner_ter , rf); ++#ifdef TUNERTER_API ++ if (front_end->demod->prop->dd_mode.modulation == Si2168_DD_MODE_PROP_MODULATION_DVBT2) { Si2168_L2_TER_FEF (front_end, 1); } ++#endif /* TUNERTER_API */ ++ } ++ ++ ++ Si2168_L2_Tuner_I2C_Disable(front_end); ++ ++ return rf; ++} ++ ++/************************************************************************************************************************ ++ Si2168_lock_to_carrier function ++ Use: relocking function ++ Used to relock on a channel for the current standard ++ Parameter: standard the standard to lock to ++ Parameter: freq the frequency to lock to (in Hz for TER, in kHz for SAT) ++ Parameter: dvb_t_bandwidth_hz the channel bandwidth in Hz (only for DVB-T) ++ Parameter: dvb_t_stream the HP/LP stream (only for DVB-T) ++ Parameter: symbol_rate_bps the symbol rate (for DVB-S and SAT) ++ Parameter: dvb_c_constellation the DVB-C constellation (only for DVB-C) ++ Return: 1 if locked, 0 otherwise ++************************************************************************************************************************/ ++int Si2168_L2_lock_to_carrier (Si2168_L2_Context *front_end, int standard, int freq, int dvb_t_bandwidth_hz, int dvb_t_stream, unsigned int symbol_rate_bps, int dvb_c_constellation, int dvb_t2_plp_id) ++{ ++ int return_code; ++// int searchStartTime; ++// int searchDelay; ++ int lock; ++ int max_lock_time_ms; ++ int min_lock_time_ms; ++ u32 ulCount, ulTick, ulDelay; ++ ++ ++ SiTRACE ("relock to %s at %d\n", Si2168_standardName(standard), freq); ++ ++ ++ switch (standard) ++ { ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2: { ++ front_end->demod->prop->dd_mode.bw = dvb_t_bandwidth_hz/1000000; ++ if (front_end->auto_detect_TER) { ++ SiTRACE("DVB-T/T2 auto detect\n"); ++ max_lock_time_ms = Si2168_DVBT2_MAX_LOCK_TIME; ++ min_lock_time_ms = Si2168_DVBT_MIN_LOCK_TIME; ++ front_end->demod->prop->dvbt_hierarchy.stream = (unsigned char)dvb_t_stream; ++ front_end->demod->prop->dd_mode.modulation = Si2168_DD_MODE_PROP_MODULATION_AUTO_DETECT; ++ front_end->demod->prop->dd_mode.auto_detect = Si2168_DD_MODE_PROP_AUTO_DETECT_AUTO_DVB_T_T2; ++ Si2168_L1_SetProperty2(front_end->demod, Si2168_DVBT_HIERARCHY_PROP_CODE); ++ } else { ++ if (standard == Si2168_DD_MODE_PROP_MODULATION_DVBT ) { ++ max_lock_time_ms = Si2168_DVBT_MAX_LOCK_TIME; ++ min_lock_time_ms = Si2168_DVBT_MIN_LOCK_TIME; ++ front_end->demod->prop->dvbt_hierarchy.stream = (unsigned char)dvb_t_stream; ++ Si2168_L1_SetProperty2(front_end->demod, Si2168_DVBT_HIERARCHY_PROP_CODE); ++ } ++ if (standard == Si2168_DD_MODE_PROP_MODULATION_DVBT2) { ++ max_lock_time_ms = Si2168_DVBT2_MAX_LOCK_TIME; ++ min_lock_time_ms = Si2168_DVBT2_MIN_LOCK_TIME; ++ if (dvb_t_bandwidth_hz == 1700000) { ++ front_end->demod->prop->dd_mode.bw = Si2168_DD_MODE_PROP_BW_BW_1D7MHZ; ++ } ++ } ++ } ++ Si2168_L1_SetProperty2(front_end->demod, Si2168_DD_MODE_PROP_CODE); ++ SiTRACE("bw %d Hz\n", dvb_t_bandwidth_hz); ++ break; ++ } ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : { ++ max_lock_time_ms = Si2168_DVBC_MAX_LOCK_TIME; ++ min_lock_time_ms = Si2168_DVBC_MIN_LOCK_TIME; ++ front_end->demod->prop->dd_mode.bw = 8; ++ front_end->demod->prop->dvbc_symbol_rate.rate = symbol_rate_bps/1000; ++ front_end->demod->prop->dvbc_constellation.constellation = (unsigned char)dvb_c_constellation; ++ Si2168_L1_SetProperty2(front_end->demod, Si2168_DD_MODE_PROP_CODE); ++ Si2168_L1_SetProperty2(front_end->demod, Si2168_DVBC_SYMBOL_RATE_PROP_CODE); ++ Si2168_L1_SetProperty2(front_end->demod, Si2168_DVBC_CONSTELLATION_PROP_CODE); ++ SiTRACE("sr %d bps, constel %d\n", symbol_rate_bps, dvb_c_constellation); ++ break; ++ } ++ default : /* ATV */ { ++ SiTRACE("'%d' standard (%s) is not managed by Si2168_lock_to_carrier\n", standard, Si2168_standardName(standard)); ++ return 0; ++ break; ++ } ++ } ++ ++ if (front_end->demod->rsp->dd_status.modulation == Si2168_DD_MODE_PROP_MODULATION_DVBT2) { ++ front_end->demod->cmd->dvbt2_plp_select.plp_id = (unsigned char)dvb_t2_plp_id; ++ if (dvb_t2_plp_id != -1) { ++ Si2168_L1_DVBT2_PLP_SELECT (front_end->demod, (unsigned char)dvb_t2_plp_id, Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MANUAL); ++ } else { ++ Si2168_L1_DVBT2_PLP_SELECT (front_end->demod, (unsigned char)dvb_t2_plp_id, Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_AUTO); ++ } ++ } ++ ++// searchStartTime = system_time(); ++ Si2168_L2_Tune (front_end, freq); ++// SiTRACE ("Si2168_lock_to_carrier 'tune' took %3d ms\n" , system_time() - searchStartTime); ++ ++// searchStartTime = system_time(); ++ ++ Si2168_L1_DD_RESTART (front_end->demod); ++// SiTRACE ("Si2168_lock_to_carrier 'reset' took %3d ms\n" , system_time() - searchStartTime); ++ ++ lock = 0; ++// searchStartTime = system_time(); ++ ++ /* as we will not lock in less than min_lock_time_ms, wait a while...*/ ++// system_wait(min_lock_time_ms); ++ delayMS(min_lock_time_ms); ++ ++ ulCount = 0; ++ ulDelay = 10; ++ ulTick = max_lock_time_ms/ulDelay; ++ ++ while (1) { ++ ++ ulCount++; ++// searchDelay = system_time() - searchStartTime; ++ ++ /* Check the status for the current modulation */ ++ ++ switch (standard) { ++ default : ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT : ++ case Si2168_DD_MODE_PROP_MODULATION_DVBT2 : { ++ /* DVB-T/T2 auto detect seek loop, using Si2168_L1_DD_STATUS */ ++ /* if DL LOCKED : demod is locked on a dd_status->modulation signal */ ++ /* if DL NO_LOCK and rsqint_bit5 NO_CHANGE : demod is searching for a DVB-T/T2 signal */ ++ /* if DL NO_LOCK and rsqint_bit5 CHANGE : demod says this is not a DVB-T/T2 signal (= 'neverlock') */ ++ return_code = Si2168_L1_DD_STATUS(front_end->demod, Si2168_DD_STATUS_CMD_INTACK_CLEAR); ++ ++ if (return_code != NO_Si2168_ERROR) { ++ SiTRACE("Si2168_lock_to_carrier: Si2168_L1_DD_STATUS error\n"); ++ SiERROR("Si2168_lock_to_carrier: Si2168_L1_DD_STATUS error\n"); ++ goto exit_lock; ++ break; ++ } ++ ++ if ( front_end->demod->rsp->dd_status.dl == Si2168_DD_STATUS_RESPONSE_DL_LOCKED ) { ++ /* Return 1 to signal that the Si2168 is locked on a valid DVB-T/T2 channel */ ++ SiTRACE("Si2168_lock_to_carrier: locked on a %s signal\n", Si2168_standardName(front_end->demod->rsp->dd_status.modulation) ); ++ lock = 1; ++ if ( (front_end->demod->rsp->dd_status.modulation == Si2168_DD_MODE_PROP_MODULATION_DVBT2) && (standard == Si2168_DD_MODE_PROP_MODULATION_DVBT) ) { ++ if (dvb_t2_plp_id != -1) { ++ Si2168_L1_DVBT2_PLP_SELECT (front_end->demod, (unsigned char)dvb_t2_plp_id, Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_MANUAL); ++ } else { ++ Si2168_L1_DVBT2_PLP_SELECT (front_end->demod, (unsigned char)dvb_t2_plp_id, Si2168_DVBT2_PLP_SELECT_CMD_PLP_ID_SEL_MODE_AUTO); ++ } ++ //system_wait(340); ++ delayMS(340); ++ } ++ goto exit_lock; ++ } else { ++ if ( front_end->demod->rsp->dd_status.rsqint_bit5 == Si2168_DD_STATUS_RESPONSE_RSQINT_BIT5_CHANGED ) { ++ /* Return 0 if firmware signals 'no DVB-T/T2 channel' */ ++ //SiTRACE ("'no DVB-T/T2 channel': not locked after %3d ms\n", searchDelay); ++ SiTRACE ("'no DVB-T/T2 channel': not locked after %3d ms\n", ulCount*10); ++ goto exit_lock; ++ } ++ } ++ break; ++ } ++ case Si2168_DD_MODE_PROP_MODULATION_DVBC : { ++ return_code = Si2168_L1_DD_STATUS(front_end->demod, Si2168_DD_STATUS_CMD_INTACK_CLEAR); ++ ++ if (return_code != NO_Si2168_ERROR) { ++ SiTRACE("Si2168_lock_to_carrier: Si2168_L1_DD_STATUS error\n"); ++ SiERROR("Si2168_lock_to_carrier: Si2168_L1_DD_STATUS error\n"); ++ return return_code; ++ break; ++ } ++ ++ if ( (front_end->demod->rsp->dd_status.dl == Si2168_DD_STATUS_RESPONSE_DL_LOCKED ) ) { ++ /* Return 1 to signal that the Si2168 is locked on a valid SAT channel */ ++ SiTRACE("%s lock\n", Si2168_standardName(front_end->demod->rsp->dd_status.modulation)); ++ lock = 1; ++ goto exit_lock; ++ } ++ break; ++ } ++ } ++ ++ /* timeout management (this should never happen if timeout values are correctly set) */ ++ //if (searchDelay >= max_lock_time_ms) { ++ if (ulCount >= ulTick) { ++ //SiTRACE ("Si2168_lock_to_carrier timeout(%d) after %d ms\n", max_lock_time_ms,searchDelay); ++ SiTRACE ("Si2168_lock_to_carrier timeout(%d)\n", max_lock_time_ms); ++ break; ++ } ++ ++ /* Check status every 10 ms */ ++ //system_wait(10); ++ delayMS(10); ++ } ++ ++ exit_lock: ++ ++// searchDelay = system_time() - searchStartTime; ++ ++ if (lock) { ++ //SiTRACE ("Si2168_lock_to_carrier 'lock' took %3d ms\n" , searchDelay); ++ SiTRACE ("Si2168_lock_to_carrier 'lock' took %3d ms\n" , ulCount*10); ++ } else { ++ //SiTRACE ("Si2168_lock_to_carrier at %10d (%s) failed after %d ms\n",freq, Si2168_standardName(front_end->demod->rsp->dd_status.modulation), searchDelay); ++ SiTRACE ("Si2168_lock_to_carrier at %10d (%s) failed after %d ms\n",freq, Si2168_standardName(front_end->demod->rsp->dd_status.modulation), ulCount*10); ++ } ++ ++ return lock; ++} ++ ++/************************************************************************************************************************ ++ SiLabs_API_lock_to_carrier function ++ Use: relocking function ++ Used to relock on a channel for the required standard ++ Parameter: standard the standard to lock to ++ Parameter: freq the frequency to lock to (in Hz for TER, in kHz for SAT) ++ Parameter: bandwidth_Hz the channel bandwidth in Hz (only for DVB-T and DVB-T2) ++ Parameter: dvb_t_stream the HP/LP stream (only for DVB-T) ++ Parameter: symbol_rate_bps the symbol rate in baud/s (for DVB-C and SAT) ++ Parameter: dvb_c_constellation the DVB-C constellation (only for DVB-C) ++ Parameter: plp_id the PLP Id (only for DVB-T2 and DVB-C2 when num_plp > 1) ++ Return: 1 if locked, 0 otherwise ++************************************************************************************************************************/ ++int SiLabs_API_lock_to_carrier (SILABS_FE_Context *front_end, int standard, int freq, int bandwidth_Hz, int stream, unsigned int symbol_rate_bps, int constellation, int polarization, int band, int plp_id) ++{ ++ int standard_code; ++ int constel_code; ++ int stream_code; ++ plp_id = plp_id; /* to avoid compiler warining if not used */ ++ ++ SiTRACE("SiLabs_API_lock_to_carrier (front_end, %8d, %d, %d, %2d, %d, %d, %d, %d, %d)\n", standard, freq, bandwidth_Hz, stream, symbol_rate_bps, constellation, polarization, band, plp_id); ++ ++ standard_code = Silabs_standardCode(front_end, (CUSTOM_Standard_Enum)standard); ++ constel_code = Silabs_constelCode (front_end, (CUSTOM_Constel_Enum)constellation); ++ stream_code = Silabs_streamCode (front_end, (CUSTOM_Stream_Enum)stream); ++ ++ SiTRACE("SiLabs_API_lock_to_carrier (front_end, %8s, %d, %d, %2s, %d, %s, %s, %s, %d)\n", Silabs_Standard_Text((CUSTOM_Standard_Enum)standard), freq, bandwidth_Hz, Silabs_Stream_Text((CUSTOM_Stream_Enum)stream), symbol_rate_bps, Silabs_Constel_Text((CUSTOM_Constel_Enum)constellation), Silabs_Polarization_Text((CUSTOM_Polarization_Enum)polarization), Silabs_Band_Text((CUSTOM_Band_Enum)band) , plp_id ); ++ ++ /* Use the API wrapper function to switch standard if required. */ ++ if (standard != front_end->standard) { ++ if (SiLabs_API_switch_to_standard(front_end, standard, 0) == 0) { ++ return 0; ++ } ++ } ++ ++#ifdef Si2168_COMPATIBLE ++ if (front_end->chip == 2168 ) { ++ SiTRACE("Si2168_lock_to_carrier (front_end->Si2168_FE, %d, %d, %d, %d, %d, %d, %d)\n", standard_code, freq, bandwidth_Hz, stream_code, symbol_rate_bps, constel_code, plp_id); ++ return Si2168_L2_lock_to_carrier (front_end->Si2168_FE, standard_code, freq, bandwidth_Hz, stream_code, symbol_rate_bps, constel_code, plp_id); ++ } ++#endif /* Si2168_COMPATIBLE */ ++ SiTRACE("Unknown chip '%d'\n", front_end->chip); ++ return 0; ++} +diff -urN a/drivers/media/dvb-frontends/si2168_drv.c b/drivers/media/dvb-frontends/si2168_drv.c +--- a/drivers/media/dvb-frontends/si2168_drv.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_drv.c 2013-03-31 23:44:31.924797127 +0800 +@@ -0,0 +1,574 @@ ++/* ++ SI2168/SI2158 - DVB-T2/T/C demodulator and tuner ++ ++ Copyright (C) 2013 Max Nibble ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++*/ ++ ++#include "si2168_priv.h" ++#include "si2168.h" ++ ++int si2168_debug; ++module_param(si2168_debug, int, 0644); ++MODULE_PARM_DESC(si2168_debug, "Activates frontend debugging (default:0)"); ++ ++/*global state*/ ++struct si2168_state { ++ const struct si2168_config *config; ++ struct dvb_frontend frontend; ++ ++ SILABS_FE_Context fe_context; ++ CUSTOM_Status_Struct custom_status; ++ u32 standard; ++ u32 stream; ++ int plp_id; ++}; ++ ++/* L0 functions */ ++void L0_Init(L0_Context *i2c) ++{ ++ i2c->address = 0; ++ i2c->indexSize = 0; ++ i2c->connectionType = CUSTOMER; ++ i2c->trackWrite = 0; ++ i2c->trackRead = 0; ++ i2c->mustReadWithoutStop = 0; ++} ++ ++int L0_SetAddress(L0_Context* i2c, unsigned int add, int addSize) ++{ ++ i2c->address = (u8)add; ++ i2c->indexSize = addSize; ++ return 1; ++} ++ ++int L0_WriteCommandBytes(L0_Context* i2c, int iNbBytes, unsigned char *pucDataBuffer) ++{ ++ return L0_WriteBytes(i2c, 0x00, iNbBytes, pucDataBuffer); ++} ++ ++int L0_WriteBytes(L0_Context* i2c, unsigned int iI2CIndex, int iNbBytes, unsigned char *pucDataBuffer) ++{ ++ int r, i, nbWrittenBytes, ret; ++ struct i2c_msg msg = { .flags = 0 }; ++ nbWrittenBytes = 0; ++ if (i2c->indexSize > 0) { ++ for (i=0; i indexSize;i++) { ++ r = 8*(i2c->indexSize -1 -i); ++ i2c->pucBuffer[i] = (unsigned char)((iI2CIndex & (0xff<> r); ++ i2c->pucAddressBuffer[i] = i2c->pucBuffer[i]; ++ } ++ } ++ for (i=0; i < iNbBytes ; i++) { ++ i2c->pucBuffer[i+i2c->indexSize] = pucDataBuffer[i]; ++ } ++ ++ msg.addr = i2c->address; ++ msg.buf = i2c->pucBuffer; ++ msg.len = iNbBytes + i2c->indexSize; ++ ret = i2c_transfer(i2c->i2c, &msg, 1); ++ if (ret == 1) ++ nbWrittenBytes = iNbBytes + i2c->indexSize; ++ ++ return nbWrittenBytes - i2c->indexSize; ++} ++ ++int L0_ReadCommandBytes(L0_Context* i2c, int iNbBytes, unsigned char *pucDataBuffer) ++{ ++ return L0_ReadBytes (i2c, 0x00, iNbBytes, pucDataBuffer); ++} ++ ++int L0_ReadBytes(L0_Context* i2c, unsigned int iI2CIndex, int iNbBytes, unsigned char *pucDataBuffer) ++{ ++ int r,i,nbReadBytes, ret; ++ struct i2c_msg r_msg[1] = { ++ { ++ .addr = i2c->address, ++ .flags = I2C_M_RD, ++ .len = iNbBytes, ++ .buf = pucDataBuffer, ++ } ++ }; ++ struct i2c_msg wr_msg[2] = { ++ { ++ .addr = i2c->address, ++ .flags = 0, ++ .len = i2c->indexSize, ++ .buf = i2c->pucAddressBuffer, ++ }, { ++ .addr = i2c->address, ++ .flags = I2C_M_RD, ++ .len = iNbBytes, ++ .buf = pucDataBuffer, ++ } ++ }; ++ ++ nbReadBytes = 0; ++ if (i2c->indexSize > 0) { ++ for (i=0;iindexSize;i++) { ++ r = 8*(i2c->indexSize -1 -i); ++ i2c->pucAddressBuffer[i] = (unsigned char)((iI2CIndex & (0xff<> r); ++ } ++ ret = i2c_transfer(i2c->i2c, wr_msg, 2); ++ if (ret == 2) ++ nbReadBytes = iNbBytes; ++ } else { ++ ret = i2c_transfer(i2c->i2c, r_msg, 1); ++ if (ret == 1) ++ nbReadBytes = iNbBytes; ++ } ++ return nbReadBytes; ++} ++ ++int delayMS(int ms) ++{ ++ msleep(ms); ++ return 0; ++} ++ ++int power_of_n (int n, int m) ++{ ++ int i; ++ int p; ++ p = 1; ++ for (i=1; i<= m; i++) { ++ p = p*n; ++ } ++ return p; ++} ++ ++static int si2168_read_signal_strength(struct dvb_frontend *fe, u16 *strength) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ SiLabs_API_TER_Tuner_status(&state->fe_context, &state->custom_status); ++ *strength = state->custom_status.RSSI + 128; ++ /* scale value to 0x0000-0xffff from 0x0000-0x00ff */ ++ *strength = *strength * 0xffff / 0x00ff; ++ return 0; ++} ++ ++static int si2168_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ SiLabs_API_Demod_status(&state->fe_context, &state->custom_status); ++ *ucblocks = state->custom_status.uncorrs; ++ return 0; ++} ++ ++static int si2168_read_ber(struct dvb_frontend *fe, u32 *ber) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ SiLabs_API_Demod_status(&state->fe_context, &state->custom_status); ++ *ber = state->custom_status.ber; ++ return 0; ++} ++ ++static int si2168_read_snr(struct dvb_frontend *fe, u16 *snr) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ /* report SNR in dB * 10 */ ++ SiLabs_API_Demod_status(&state->fe_context, &state->custom_status); ++ *snr = state->custom_status.c_n/10; ++ return 0; ++} ++ ++static int si2168_read_status(struct dvb_frontend *fe, fe_status_t *status) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ *status = 0; ++ ++ SiLabs_API_Demod_status(&state->fe_context, &state->custom_status); ++ if (state->custom_status.demod_lock) ++ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER ++ | FE_HAS_SYNC | FE_HAS_VITERBI; ++ if (state->custom_status.fec_lock) ++ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER ++ | FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_LOCK; ++ return 0; ++} ++ ++static int si2168_get_frontend_algo(struct dvb_frontend *fe) ++{ ++ return DVBFE_ALGO_HW; ++} ++ ++static fe_modulation_t si2168_convert_modulation(int constellation) ++{ ++ fe_modulation_t ret; ++ switch (constellation) { ++ case SILABS_QAM16: ++ ret = QAM_16; ++ break; ++ case SILABS_QAM32: ++ ret = QAM_32; ++ break; ++ case SILABS_QAM64: ++ ret = QAM_64; ++ break; ++ case SILABS_QAM128: ++ ret = QAM_128; ++ break; ++ case SILABS_QAM256: ++ ret = QAM_256; ++ break; ++ case SILABS_QPSK: ++ ret = QPSK; ++ break; ++ default: ++ ret = QAM_AUTO; ++ break; ++ } ++ return ret; ++} ++ ++static fe_transmit_mode_t si2168_convert_fftcode(int fftcode) ++{ ++ fe_transmit_mode_t ret; ++ switch (fftcode) { ++ case SILABS_FFT_MODE_1K: ++ ret = TRANSMISSION_MODE_1K; ++ break; ++ case SILABS_FFT_MODE_2K: ++ ret = TRANSMISSION_MODE_2K; ++ break; ++ case SILABS_FFT_MODE_4K: ++ ret = TRANSMISSION_MODE_4K; ++ break; ++ case SILABS_FFT_MODE_8K: ++ ret = TRANSMISSION_MODE_8K; ++ break; ++ case SILABS_FFT_MODE_16K: ++ ret = TRANSMISSION_MODE_16K; ++ break; ++ case SILABS_FFT_MODE_32K: ++ ret = TRANSMISSION_MODE_32K; ++ break; ++ default: ++ ret = TRANSMISSION_MODE_AUTO; ++ } ++ return ret; ++} ++ ++static fe_guard_interval_t si2168_convert_gicode(int gicode) ++{ ++ fe_guard_interval_t ret; ++ switch (gicode) { ++ case SILABS_GUARD_INTERVAL_1_32: ++ ret = GUARD_INTERVAL_1_32; ++ break; ++ case SILABS_GUARD_INTERVAL_1_16: ++ ret = GUARD_INTERVAL_1_16; ++ break; ++ case SILABS_GUARD_INTERVAL_1_8: ++ ret = GUARD_INTERVAL_1_8; ++ break; ++ case SILABS_GUARD_INTERVAL_1_4: ++ ret = GUARD_INTERVAL_1_4; ++ break; ++ case SILABS_GUARD_INTERVAL_1_128: ++ ret = GUARD_INTERVAL_1_128; ++ break; ++ case SILABS_GUARD_INTERVAL_19_128: ++ ret = GUARD_INTERVAL_19_128; ++ break; ++ case SILABS_GUARD_INTERVAL_19_256: ++ ret = GUARD_INTERVAL_19_256; ++ break; ++ default: ++ ret = GUARD_INTERVAL_AUTO; ++ } ++ return ret; ++} ++ ++static fe_hierarchy_t si2168_convert_hierarchycode(int hierarchycode) ++{ ++ fe_hierarchy_t ret; ++ switch (hierarchycode) { ++ case SILABS_HIERARCHY_NONE: ++ ret = HIERARCHY_NONE; ++ break; ++ case SILABS_HIERARCHY_ALFA1: ++ ret = HIERARCHY_1; ++ break; ++ case SILABS_HIERARCHY_ALFA2: ++ ret = HIERARCHY_2; ++ break; ++ case SILABS_HIERARCHY_ALFA4: ++ ret = HIERARCHY_4; ++ break; ++ default: ++ ret = HIERARCHY_AUTO; ++ } ++ return ret; ++} ++ ++static fe_code_rate_t si2168_convert_coderate(int coderate) ++{ ++ fe_code_rate_t ret; ++ switch (coderate) { ++ case SILABS_CODERATE_1_2: ++ ret = FEC_1_2; ++ break; ++ case SILABS_CODERATE_2_3: ++ ret = FEC_2_3; ++ break; ++ case SILABS_CODERATE_3_4: ++ ret = FEC_3_4; ++ break; ++ case SILABS_CODERATE_5_6: ++ ret = FEC_5_6; ++ break; ++ case SILABS_CODERATE_7_8: ++ ret = FEC_7_8; ++ break; ++ case SILABS_CODERATE_4_5: ++ ret = FEC_4_5; ++ break; ++ case SILABS_CODERATE_3_5: ++ ret = FEC_3_5; ++ break; ++ default: ++ ret = FEC_AUTO; ++ } ++ return ret; ++} ++ ++static int si2168_get_frontend(struct dvb_frontend *fe) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ struct dtv_frontend_properties *c = &fe->dtv_property_cache; ++ int ret = 0; ++ ++ SiLabs_API_Demod_status(&state->fe_context, &state->custom_status); ++ ++ switch (c->delivery_system) { ++ case SYS_DVBT: ++ c->modulation = si2168_convert_modulation(state->custom_status.constellation); ++ c->transmission_mode = si2168_convert_fftcode(state->custom_status.fft_mode); ++ c->guard_interval = si2168_convert_gicode(state->custom_status.guard_interval); ++ c->hierarchy = si2168_convert_hierarchycode(state->custom_status.hierarchy); ++ c->code_rate_HP = si2168_convert_coderate(state->custom_status.code_rate_hp); ++ c->code_rate_LP = si2168_convert_coderate(state->custom_status.code_rate_lp); ++ c->inversion = ++ (state->custom_status.spectral_inversion == Si2168_DVBT_STATUS_RESPONSE_SP_INV_INVERTED) ? INVERSION_ON : INVERSION_OFF; ++ break; ++ case SYS_DVBT2: ++ c->modulation = si2168_convert_modulation(state->custom_status.constellation); ++ c->transmission_mode = si2168_convert_fftcode(state->custom_status.fft_mode); ++ c->guard_interval = si2168_convert_gicode(state->custom_status.guard_interval); ++ c->fec_inner = si2168_convert_coderate(state->custom_status.code_rate); ++ c->inversion = ++ (state->custom_status.spectral_inversion == Si2168_DVBT_STATUS_RESPONSE_SP_INV_INVERTED) ? INVERSION_ON : INVERSION_OFF; ++ break; ++ case SYS_DVBC_ANNEX_A: ++ c->symbol_rate = state->custom_status.symbol_rate; ++ c->modulation = si2168_convert_modulation(state->custom_status.constellation); ++ c->inversion = ++ (state->custom_status.spectral_inversion == Si2168_DVBT_STATUS_RESPONSE_SP_INV_INVERTED) ? INVERSION_ON : INVERSION_OFF; ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ return ret; ++} ++ ++static int si2168_set_frontend(struct dvb_frontend *fe) ++{ ++ struct dtv_frontend_properties *c = &fe->dtv_property_cache; ++ struct si2168_state *state = fe->demodulator_priv; ++ int ret, req_standard, req_qam, req_plp_id = 0; ++ printk(KERN_INFO ++ "%s: system=%d frequency=%d bandwidth=%d symrate=%d qam=%d stream_id=%d\n", ++ __func__, c->delivery_system, c->frequency, c->bandwidth_hz, c->symbol_rate, c->modulation, c->stream_id); ++ ++ switch (c->delivery_system) { ++ case SYS_DVBT: ++ case SYS_DVBT2: ++ req_standard = SILABS_DVB_T; ++ break; ++ case SYS_DVBC_ANNEX_A: ++ req_standard = SILABS_DVB_C; ++ break; ++ default: ++ printk(KERN_ERR "%s: %d is not supported!\n", __func__, c->delivery_system); ++ return -EINVAL; ++ } ++ if (state->standard != req_standard) { ++ ret = SiLabs_API_switch_to_standard(&state->fe_context, req_standard, 0); ++ if (ret == 0) ++ return -EREMOTEIO; ++ state->standard = req_standard; ++ } ++ switch (c->modulation) { ++ case QAM_64: ++ req_qam = SILABS_QAM64; ++ break; ++ case QAM_16: ++ req_qam = SILABS_QAM16; ++ break; ++ case QAM_32: ++ req_qam = SILABS_QAM32; ++ break; ++ case QAM_128: ++ req_qam = SILABS_QAM128; ++ break; ++ case QAM_256: ++ req_qam = SILABS_QAM256; ++ break; ++ default: /* QAM_AUTO */ ++ req_qam = SILABS_QAMAUTO; ++ break; ++ } ++ if (c->stream_id == NO_STREAM_ID_FILTER) ++ req_plp_id = state->plp_id; ++ else if ((c->stream_id >= 0) && (c->stream_id <= 255)) { ++ req_plp_id = c->stream_id; ++ state->plp_id = req_plp_id; ++ } ++ ret = SiLabs_API_lock_to_carrier(&state->fe_context, req_standard, c->frequency, ++ c->bandwidth_hz, state->stream, c->symbol_rate, req_qam, 0, 0, req_plp_id); ++ if (ret && state->config->start_ctrl) ++ state->config->start_ctrl(fe); ++ return 0; ++} ++ ++static int si2168_tune(struct dvb_frontend *fe, ++ bool re_tune, ++ unsigned int mode_flags, ++ unsigned int *delay, ++ fe_status_t *status) ++{ ++ *delay = HZ / 5; ++ if (re_tune) { ++ int ret = si2168_set_frontend(fe); ++ if (ret) ++ return ret; ++ } ++ return si2168_read_status(fe, status); ++} ++ ++static int si2168_init(struct dvb_frontend *fe) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ ++ SiLabs_API_switch_to_standard(&state->fe_context, state->fe_context.standard, 0); ++ state->standard = state->fe_context.standard; ++ if (state->standard != SILABS_SLEEP) ++ SiLabs_API_TS_Mode(&state->fe_context, state->config->ts_bus_mode); ++ return 0; ++} ++ ++static int si2168_sleep(struct dvb_frontend *fe) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ ++ SiLabs_API_switch_to_standard(&state->fe_context, SILABS_SLEEP, 0); ++ state->standard = SILABS_SLEEP; ++ return 0; ++} ++ ++static void si2168_release(struct dvb_frontend *fe) ++{ ++ struct si2168_state *state = fe->demodulator_priv; ++ kfree(state); ++} ++ ++static const struct dvb_frontend_ops si2168_ops = { ++ .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A }, ++ /*.delsys = { SYS_DVBC_ANNEX_A },*/ ++ /* default: DVB-T/T2 */ ++ .info = { ++ .name = "Si2168 DVB-T2/C", ++ .frequency_stepsize = 62500, ++ .frequency_min = 48000000, ++ .frequency_max = 870000000, ++ .symbol_rate_min = 870000, ++ .symbol_rate_max = 7500000, ++ .caps = FE_CAN_FEC_1_2 | ++ FE_CAN_FEC_2_3 | ++ FE_CAN_FEC_3_4 | ++ FE_CAN_FEC_5_6 | ++ FE_CAN_FEC_7_8 | ++ FE_CAN_FEC_AUTO | ++ FE_CAN_QPSK | ++ FE_CAN_QAM_16 | ++ FE_CAN_QAM_32 | ++ FE_CAN_QAM_64 | ++ FE_CAN_QAM_128 | ++ FE_CAN_QAM_256 | ++ FE_CAN_QAM_AUTO | ++ FE_CAN_TRANSMISSION_MODE_AUTO | ++ FE_CAN_GUARD_INTERVAL_AUTO | ++ FE_CAN_HIERARCHY_AUTO | ++ FE_CAN_MUTE_TS | ++ FE_CAN_2G_MODULATION | ++ FE_CAN_MULTISTREAM ++ }, ++ ++ .release = si2168_release, ++ .init = si2168_init, ++ .sleep = si2168_sleep, ++ ++ .tune = si2168_tune, ++ .set_frontend = si2168_set_frontend, ++ .get_frontend = si2168_get_frontend, ++ .get_frontend_algo = si2168_get_frontend_algo, ++ ++ .read_status = si2168_read_status, ++ .read_snr = si2168_read_snr, ++ .read_ber = si2168_read_ber, ++ .read_ucblocks = si2168_read_ucblocks, ++ .read_signal_strength = si2168_read_signal_strength, ++}; ++ ++struct dvb_frontend *si2168_attach(const struct si2168_config *config, ++ struct i2c_adapter *i2c) ++{ ++ struct si2168_state *state = NULL; ++ state = kzalloc(sizeof(struct si2168_state), GFP_KERNEL); ++ if (!state) { ++ dev_err(&i2c->dev, "%s: kzalloc() failed\n", ++ KBUILD_MODNAME); ++ goto error; ++ } ++ ++ state->config = config; ++ state->standard = 0xff; ++ state->stream = 0; ++ state->plp_id = 0; ++ state->fe_context.Silabs_init_done = 0; ++ SiLabs_API_SW_Init(&state->fe_context, SI2168_DEMOD_ADDRESS, SI2158_TUNER_ADDRESS, 0); ++ SiLabs_API_TER_AutoDetect(&state->fe_context, 1); ++ state->fe_context.Si2168_FE->demod->i2c->i2c = i2c; ++ state->fe_context.Si2168_FE->tuner_ter->i2c->i2c = i2c; ++ state->fe_context.Si2168_FE->demod->ts_bus_mode = state->config->ts_bus_mode; ++ state->fe_context.Si2168_FE->demod->ts_clock_mode = state->config->ts_clock_mode; ++ ++ memcpy(&state->frontend.ops, &si2168_ops, ++ sizeof(struct dvb_frontend_ops)); ++ state->frontend.demodulator_priv = state; ++ return &state->frontend; ++error: ++ kfree(state); ++ return NULL; ++} ++EXPORT_SYMBOL(si2168_attach); ++ ++MODULE_DESCRIPTION("SI2168 demodulator driver"); ++MODULE_AUTHOR("Max Nibble "); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION("1.00"); +diff -urN a/drivers/media/dvb-frontends/si2168.h b/drivers/media/dvb-frontends/si2168.h +--- a/drivers/media/dvb-frontends/si2168.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168.h 2013-02-14 23:21:25.000000000 +0800 +@@ -0,0 +1,45 @@ ++/* ++ SI2168/SI2158 - DVB-T2/T/C demodulator and tuner ++ ++ Copyright (C) 2013 Max Nibble ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++*/ ++ ++#ifndef SI2168_H ++#define SI2168_H ++ ++#include ++ ++struct si2168_config { ++ u8 ts_bus_mode; /*1-serial, 2-parallel.*/ ++ u8 ts_clock_mode; /*0-auto, 1-manual.*/ ++ ++ int (*start_ctrl)(struct dvb_frontend *fe); ++}; ++ ++#if defined(CONFIG_DVB_SI2168) || (defined(CONFIG_DVB_SI2168_MODULE) && defined(MODULE)) ++extern struct dvb_frontend *si2168_attach(const struct si2168_config *config, ++ struct i2c_adapter *i2c); ++#else ++static inline struct dvb_frontend *si2168_attach(const struct si2168_config *config, ++ struct i2c_adapter *i2c) ++{ ++ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); ++ return NULL; ++} ++#endif /* CONFIG_DVB_SI2168 */ ++ ++#endif /* SI2168_H */ +diff -urN a/drivers/media/dvb-frontends/si2168_priv.h b/drivers/media/dvb-frontends/si2168_priv.h +--- a/drivers/media/dvb-frontends/si2168_priv.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_priv.h 2013-03-31 23:44:39.928796846 +0800 +@@ -0,0 +1,944 @@ ++/* ++ SI2168/SI2158 - DVB-T2/T/C demodulator and tuner ++*/ ++ ++#ifndef SI2168_PRIV_H ++#define SI2168_PRIV_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "dvb_frontend.h" ++ ++#define Si2158_COMPATIBLE ++#define Si2158_COMMAND_PROTOTYPES ++#define TER_TUNER_Si2158 ++ ++#define Si2168_COMPATIBLE ++#define Si2168_COMMAND_PROTOTYPES ++#define Si2168_20_COMPATIBLE ++ ++#include "si2158_commands.h" ++#include "si2158_properties.h" ++#include "si2168_commands.h" ++#include "si2168_properties.h" ++ ++/*L0 typedef*/ ++typedef enum CONNECTION_TYPE ++{ ++ SIMU = 0, ++ USB, ++ CUSTOMER, ++ none ++} CONNECTION_TYPE; ++ ++typedef struct L0_Context ++{ ++ struct i2c_adapter *i2c; ++ u8 pucAddressBuffer[4]; ++ u8 pucBuffer[64]; ++ unsigned char address; ++ int indexSize; ++ CONNECTION_TYPE connectionType; ++ int trackWrite; ++ int trackRead; ++ int mustReadWithoutStop; ++} L0_Context; ++ ++/*si2158 typedef*/ ++#define Si2158_BYTES_PER_LINE 8 ++/*chip rev constants for integrity checking */ ++#define Si2158_chiprev 1 ++/* Last 2 digits of part number */ ++#define Si2158_part 58 /* Change this value if using a chip other than a Si2158 */ ++#define Si2158_partMajorVersion '2' ++#define Si2158_partMinorVersion '0' ++#define Si2158_partRomid 0x33 ++ ++#define NO_Si2158_ERROR 0x00 ++#define ERROR_Si2158_PARAMETER_OUT_OF_RANGE 0x01 ++#define ERROR_Si2158_ALLOCATING_CONTEXT 0x02 ++#define ERROR_Si2158_SENDING_COMMAND 0x03 ++#define ERROR_Si2158_CTS_TIMEOUT 0x04 ++#define ERROR_Si2158_ERR 0x05 ++#define ERROR_Si2158_POLLING_CTS 0x06 ++#define ERROR_Si2158_POLLING_RESPONSE 0x07 ++#define ERROR_Si2158_LOADING_FIRMWARE 0x08 ++#define ERROR_Si2158_LOADING_BOOTBLOCK 0x09 ++#define ERROR_Si2158_STARTING_FIRMWARE 0x0a ++#define ERROR_Si2158_SW_RESET 0x0b ++#define ERROR_Si2158_INCOMPATIBLE_PART 0x0c ++/* _specific_error_value_insertion_start */ ++#define ERROR_Si2158_TUNINT_TIMEOUT 0x0d ++#define ERROR_Si2158_xTVINT_TIMEOUT 0x0e ++ ++/* define the maximum possible channels (1002MHz - 43MHz) / 6MHz (required for the channelscan array)*/ ++#define MAX_POSSIBLE_CHANNELS 160 ++ ++typedef struct L1_Si2158_Context { ++ L0_Context *i2c; ++ L0_Context i2cObj; ++ Si2158_CmdObj *cmd; ++ Si2158_CmdObj cmdObj; ++ Si2158_CmdReplyObj *rsp; ++ Si2158_CmdReplyObj rspObj; ++ Si2158_PropObj *prop; ++ Si2158_PropObj propObj; ++ Si2158_COMMON_REPLY_struct *status; ++ Si2158_COMMON_REPLY_struct statusObj; ++ /*chip rev constants for integrity checking */ ++ unsigned char chiprev; ++ unsigned char part; ++ /* Last 2 digits of part number */ ++ unsigned char partMajorVersion; ++ unsigned char partMinorVersion; ++ unsigned char partRomid; ++ /* Channel Scan Globals */ ++ /* Global array to store the list of found channels */ ++ unsigned long ChannelList[MAX_POSSIBLE_CHANNELS]; ++ /* ChannelScanPal needs to store the PAL type also so allocate 4 chars each for that */ ++ char ChannelType[MAX_POSSIBLE_CHANNELS][4]; ++ /* Number of found channels from a channel scan */ ++ int ChannelListSize; ++} L1_Si2158_Context; ++ ++#ifndef __FIRMWARE_STRUCT__ ++#define __FIRMWARE_STRUCT__ ++typedef struct firmware_struct { ++ unsigned char firmware_len; ++ unsigned char firmware_table[16]; ++} firmware_struct; ++#endif /* __FIRMWARE_STRUCT__ */ ++ ++/*tuner definition for si2158*/ ++ #define Si2168_CLOCK_MODE_TER Si2168_START_CLK_CMD_CLK_MODE_CLK_CLKIO ++ #define Si2168_REF_FREQUENCY_TER 24 ++ ++ #define TUNERTER_API ++ #define TER_TUNER_CONTEXT L1_Si2158_Context ++ #define TUNER_ADDRESS_TER 0x60 /*0xc0*/ ++ ++ #define TER_TUNER_INIT(api) Si2158_Init(api) ++ #define TER_TUNER_WAKEUP(api) Si2158_pollForCTS(api) ++ /* Compatibility with Si2158 ROM12 & ROM13 APIs */ ++ #define TER_TUNER_STANDBY(api) Si2158_L1_STANDBY(api, Si2158_STANDBY_CMD_TYPE_MIN) ++ ++ #define TER_TUNER_CLOCK_OFF(api) Si2158_XoutOff(api) ++ #define TER_TUNER_CLOCK_ON(api) Si2158_XoutOn(api) ++ #define TER_TUNER_ERROR_TEXT(res) Si2158_L1_API_ERROR_TEXT(res) ++ ++ #define TER_TUNER_MODULATION_DVBT Si2158_DTV_MODE_PROP_MODULATION_DVBT ++ #define TER_TUNER_MODULATION_DVBC Si2158_DTV_MODE_PROP_MODULATION_DVBC ++ ++ #define L1_RF_TER_TUNER_Init(api,add) Si2158_L1_API_Init(api, add); ++ #define L1_RF_TER_TUNER_Tune(api,rf) Si2158_DTVTune(api, rf, bw, modulation, Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_NORMAL) ++ ++ #define L1_RF_TER_TUNER_Get_RF ++ ++ #define L1_RF_TER_TUNER_MODULATION_DVBC Si2158_DTV_MODE_PROP_MODULATION_DVBC ++ #define L1_RF_TER_TUNER_MODULATION_DVBT Si2158_DTV_MODE_PROP_MODULATION_DVBT ++ #define L1_RF_TER_TUNER_MODULATION_DVBT2 Si2158_DTV_MODE_PROP_MODULATION_DVBT ++ ++ #define L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN_SETUP(api) \ ++ api->cmd->config_pins.gpio1_mode = Si2158_CONFIG_PINS_CMD_GPIO1_MODE_DISABLE;\ ++ api->cmd->config_pins.gpio1_read = Si2158_CONFIG_PINS_CMD_GPIO1_READ_DO_NOT_READ;\ ++ api->cmd->config_pins.gpio2_mode = Si2158_CONFIG_PINS_CMD_GPIO2_MODE_DISABLE;\ ++ api->cmd->config_pins.gpio2_read = Si2158_CONFIG_PINS_CMD_GPIO2_READ_DO_NOT_READ;\ ++ api->cmd->config_pins.reserved1 = Si2158_CONFIG_PINS_CMD_RESERVED1_RESERVED;\ ++ api->cmd->config_pins.reserved2 = Si2158_CONFIG_PINS_CMD_RESERVED2_RESERVED;\ ++ api->cmd->config_pins.reserved3 = Si2158_CONFIG_PINS_CMD_RESERVED3_RESERVED;\ ++ api->prop->dtv_initial_agc_speed.agc_decim = Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_initial_agc_speed.if_agc_speed = Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ api->prop->dtv_initial_agc_speed_period.period = 0;\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ Si2158_L1_SendCommand2(api, Si2158_CONFIG_PINS_CMD_CODE);\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_CODE);\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_SPEED_PROP_CODE); ++ ++ #define L1_RF_TER_TUNER_FEF_MODE_FREEZE_PIN(api,fef) \ ++ api->prop->dtv_agc_freeze_input.level = Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_HIGH;\ ++ if (fef == 0) {\ ++ api->prop->dtv_agc_freeze_input.pin = Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_NONE;\ ++ } else {\ ++ api->prop->dtv_agc_freeze_input.pin = Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_GPIO1;\ ++ }\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_FREEZE_INPUT_PROP_CODE); ++ ++ #define L1_RF_TER_TUNER_FEF_MODE_SLOW_INITIAL_AGC_SETUP(api,fef) \ ++ if (fef == 0) {\ ++ api->prop->dtv_initial_agc_speed.agc_decim = Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_initial_agc_speed.if_agc_speed = Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ api->prop->dtv_initial_agc_speed_period.period = 0;\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ } else {\ ++ api->prop->dtv_initial_agc_speed.agc_decim = Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_initial_agc_speed.if_agc_speed = Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ api->prop->dtv_initial_agc_speed_period.period = 310;\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_4;\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_39;\ ++ }\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_CODE);\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_SPEED_PROP_CODE); ++ ++ ++ #define L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC_SETUP(api,fef) \ ++ api->prop->dtv_initial_agc_speed_period.period = 0;\ ++ if (fef == 0) {\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ } else {\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_39;\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_4;\ ++ }\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_CODE);\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_SPEED_PROP_CODE); ++ ++ #define L1_RF_TER_TUNER_FEF_MODE_SLOW_NORMAL_AGC(api,fef) \ ++ if (fef == 0) {\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_OFF;\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO;\ ++ } else {\ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_39;\ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_4;\ ++ }\ ++ Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_SPEED_PROP_CODE); ++ ++ #define TER_TUNER_ATV_LO_INJECTION(api) \ ++ api->prop->tuner_lo_injection.band_1 = Si2158_TUNER_LO_INJECTION_PROP_BAND_1_HIGH_SIDE;\ ++ api->prop->tuner_lo_injection.band_2 = Si2158_TUNER_LO_INJECTION_PROP_BAND_2_HIGH_SIDE;\ ++ api->prop->tuner_lo_injection.band_3 = Si2158_TUNER_LO_INJECTION_PROP_BAND_3_HIGH_SIDE;\ ++ Si2158_L1_SetProperty2(api, Si2158_TUNER_LO_INJECTION_PROP_CODE); ++ ++ #define TER_TUNER_DTV_LO_INJECTION(api) \ ++ api->prop->tuner_lo_injection.band_1 = Si2158_TUNER_LO_INJECTION_PROP_BAND_1_HIGH_SIDE;\ ++ api->prop->tuner_lo_injection.band_2 = Si2158_TUNER_LO_INJECTION_PROP_BAND_2_LOW_SIDE;\ ++ api->prop->tuner_lo_injection.band_3 = Si2158_TUNER_LO_INJECTION_PROP_BAND_3_LOW_SIDE;\ ++ Si2158_L1_SetProperty2(api, Si2158_TUNER_LO_INJECTION_PROP_CODE); ++ ++/*si2168 typedef*/ ++#define Si2168_BYTES_PER_LINE 8 ++ ++#define Si2168_TERRESTRIAL 1 ++ #define Si2168_DVBT_MIN_LOCK_TIME 100 ++ #define Si2168_DVBT_MAX_LOCK_TIME 5000 ++ ++ #define Si2168_DVBT2_MIN_LOCK_TIME 100 ++ #define Si2168_DVBT2_MAX_LOCK_TIME 5000 ++ ++ #define Si2168_DVBC_MIN_LOCK_TIME 80 ++ #define Si2168_DVBC_MAX_LOCK_TIME 2000 ++ #define Si2168_DVBC_MAX_SEARCH_TIME 5000 ++ ++ #define Si2168_TER_MAX_SEARCH_TIME 10000 ++ ++/******************************************************************************/ ++/* Clock sources definition (allows using 'clear' names for clock sources) */ ++/******************************************************************************/ ++typedef enum Si2168_CLOCK_SOURCE { ++ Si2168_Xtal_clock = 0, ++ Si2168_TER_Tuner_clock, ++ Si2168_SAT_Tuner_clock ++} Si2168_CLOCK_SOURCE; ++/******************************************************************************/ ++/* TER and SAT clock source selection (used by Si2168_switch_to_standard) */ ++/* ( possible values are those defined above in Si2168_CLOCK_SOURCE ) */ ++/******************************************************************************/ ++#define Si2168_TER_CLOCK_SOURCE Si2168_TER_Tuner_clock ++#define Si2168_SAT_CLOCK_SOURCE Si2168_TER_Tuner_clock ++ ++/******************************************************************************/ ++/* TER Tuner FEF management options */ ++/******************************************************************************/ ++#define Si2168_FEF_MODE_SLOW_NORMAL_AGC 0 ++#define Si2168_FEF_MODE_FREEZE_PIN 1 ++#define Si2168_FEF_MODE_SLOW_INITIAL_AGC 2 ++/******************************************************************************/ ++/* TER Tuner FEF management selection (possible values are defined above) */ ++/* NB : This selection is the referred?solution. */ ++/* The code will use more compilation flags to slect the final mode based */ ++/* on what the TER tuner can actually do. */ ++/******************************************************************************/ ++#define Si2168_FEF_MODE Si2168_FEF_MODE_FREEZE_PIN ++ ++#define NO_Si2168_ERROR 0x00 ++#define ERROR_Si2168_PARAMETER_OUT_OF_RANGE 0x01 ++#define ERROR_Si2168_ALLOCATING_CONTEXT 0x02 ++#define ERROR_Si2168_SENDING_COMMAND 0x03 ++#define ERROR_Si2168_CTS_TIMEOUT 0x04 ++#define ERROR_Si2168_ERR 0x05 ++#define ERROR_Si2168_POLLING_CTS 0x06 ++#define ERROR_Si2168_POLLING_RESPONSE 0x07 ++#define ERROR_Si2168_LOADING_FIRMWARE 0x08 ++#define ERROR_Si2168_LOADING_BOOTBLOCK 0x09 ++#define ERROR_Si2168_STARTING_FIRMWARE 0x0a ++#define ERROR_Si2168_SW_RESET 0x0b ++#define ERROR_Si2168_INCOMPATIBLE_PART 0x0c ++ ++typedef struct L1_Si2168_Context { ++ L0_Context *i2c; ++ L0_Context i2cObj; ++ Si2168_CmdObj *cmd; ++ Si2168_CmdObj cmdObj; ++ Si2168_CmdReplyObj *rsp; ++ Si2168_CmdReplyObj rspObj; ++ Si2168_PropObj *prop; ++ Si2168_PropObj propObj; ++ Si2168_COMMON_REPLY_struct *status; ++ Si2168_COMMON_REPLY_struct statusObj; ++ int standard; ++ int media; ++ unsigned int tuner_ter_chip; ++ unsigned int tuner_ter_clock_freq; ++ unsigned int tuner_ter_clock_input; ++ unsigned int tuner_rssi; ++ unsigned int fef_mode; ++ unsigned int ts_bus_mode; ++ unsigned int ts_clock_mode; ++} L1_Si2168_Context; ++ ++typedef struct Si2168_L2_Context { ++ L1_Si2168_Context *demod; ++ TER_TUNER_CONTEXT *tuner_ter; ++ L1_Si2168_Context demodObj; ++ TER_TUNER_CONTEXT tuner_terObj; ++ int first_init_done; ++ int Si2168_init_done; ++ int TER_init_done; ++ int TER_tuner_init_done; ++ unsigned char auto_detect_TER; ++ int standard; ++ int detected_rf; ++ int previous_standard; ++ int tuneUnitHz; ++ int rangeMin; ++ int rangeMax; ++ int seekBWHz; ++ int seekStepHz; ++ int minSRbps; ++ int maxSRbps; ++ int minRSSIdBm; ++ int maxRSSIdBm; ++ int minSNRHalfdB; ++ int maxSNRHalfdB; ++ int seekAbort; ++ unsigned char seekRunning; ++ int center_rf; ++} Si2168_L2_Context; ++ ++typedef struct SILABS_TER_TUNER_Config { ++ unsigned char nSel_dtv_out_type; ++ unsigned char nSel_dtv_agc_source; ++ int nSel_dtv_lif_freq_offset; ++ unsigned char nSel_dtv_mode_bw; ++ unsigned char nSel_dtv_mode_invert_spectrum; ++ unsigned char nSel_dtv_mode_modulation; ++ unsigned char nSel_atv_video_mode_video_sys; ++ unsigned char nSel_atv_audio_mode_audio_sys; ++ unsigned char nSel_atv_atv_video_mode_tran; ++ unsigned char nSel_atv_video_mod_color; ++ unsigned char nSel_atv_mode_invert_spectrum; ++ unsigned char nSel_atv_mode_invert_signal; ++ char nSel_atv_cvbs_out_fine_amp; ++ char nSel_atv_cvbs_out_fine_offset; ++ unsigned char nSel_atv_sif_out_amp; ++ unsigned char nSel_atv_sif_out_offset; ++ unsigned char if_agc_speed; ++ char nSel_dtv_rf_top; ++ char nSel_atv_rf_top; ++ unsigned long nLocked_Freq; ++ unsigned long nCenter_Freq; ++ int nCriteriaStep; ++ int nLeftMax; ++ int nRightMax; ++ int nReal_Step; ++ int nBeforeStep; ++} SILABS_TER_TUNER_Config; ++ ++typedef struct SILABS_SAT_TUNER_Config { ++ int RF; ++ int IF; ++ int minRF; ++ int maxRF; ++ u32 xtal; ++ u32 LPF; ++ int tunerBytesCount; ++ int I2CMuxChannel; ++ u32 RefDiv_value; ++ int Mash_Per; ++ CONNECTION_TYPE connType; ++ unsigned char tuner_log[40]; ++ unsigned char tuner_read[7]; ++ char nSel_att_top; ++} SILABS_SAT_TUNER_Config; ++ ++typedef struct SILABS_CARRIER_Config { ++ int freq; ++ int bandwidth; ++ int stream; ++ int symbol_rate; ++ int constellation; ++ int polarization; ++ int band; ++} SILABS_CARRIER_Config; ++ ++typedef struct SILABS_ANALOG_CARRIER_Config { ++ unsigned char video_sys; ++ unsigned char trans; ++ unsigned char color; ++ unsigned char invert_signal; ++ unsigned char invert_spectrum; ++} SILABS_ANALOG_CARRIER_Config; ++ ++typedef struct SILABS_ANALOG_SIF_Config { ++ unsigned char stereo_sys; ++} SILABS_ANALOG_SIF_Config; ++ ++typedef struct SILABS_FE_Context { ++ struct i2c_adapter *i2c; ++ u32 Silabs_init_done; ++ unsigned int chip; ++ unsigned int tuner_ter; ++ unsigned int tuner_sat; ++#ifdef Si2168_COMPATIBLE ++ Si2168_L2_Context *Si2168_FE; ++ Si2168_L2_Context Si2168_FE_Obj; ++#endif /* Si2168_COMPATIBLE */ ++ int standard; ++ int init_ok; ++ int polarization; ++ int band; ++ SILABS_TER_TUNER_Config TER_Tuner_Cfg; ++ SILABS_SAT_TUNER_Config SAT_Tuner_Cfg; ++ SILABS_CARRIER_Config Carrier_Cfg; ++ SILABS_ANALOG_CARRIER_Config Analog_Cfg; ++ SILABS_ANALOG_SIF_Config Analog_Sif_Cfg; ++} SILABS_FE_Context; ++ ++/* Standard code values used by the top-level application */ ++/* set these values to match the top-level application values */ ++typedef enum CUSTOM_Standard_Enum { ++ SILABS_ANALOG = 4, ++ SILABS_DVB_T = 0, ++ SILABS_DVB_C = 1, ++ SILABS_DVB_S = 2, ++ SILABS_DVB_S2 = 3, ++ SILABS_DVB_T2 = 5, ++ SILABS_DSS = 6, ++ SILABS_MCNS = 7, ++ SILABS_DVB_C2 = 8, ++ SILABS_SLEEP = 100, ++} CUSTOM_Standard_Enum; ++ ++typedef enum CUSTOM_Polarization_Enum { ++ SILABS_POLARIZATION_HORIZONTAL = 0, ++ SILABS_POLARIZATION_VERTICAL = 1, ++ ++} CUSTOM_Polarization_Enum; ++ ++typedef enum CUSTOM_Band_Enum { ++ SILABS_BAND_LOW = 0, ++ SILABS_BAND_HIGH = 1, ++ ++} CUSTOM_Band_Enum; ++ ++typedef enum CUSTOM_Stream_Enum { ++ SILABS_HP = 0, ++ SILABS_LP = 1 ++} CUSTOM_Stream_Enum; ++ ++typedef enum CUSTOM_FFT_Mode_Enum { ++ SILABS_FFT_MODE_2K = 0, ++ SILABS_FFT_MODE_4K = 1, ++ SILABS_FFT_MODE_8K = 2, ++ SILABS_FFT_MODE_16K = 3, ++ SILABS_FFT_MODE_32K = 4, ++ SILABS_FFT_MODE_1K = 5 ++} CUSTOM_FFT_Mode_Enum; ++ ++typedef enum CUSTOM_GI_Enum { ++ SILABS_GUARD_INTERVAL_1_32 = 0, ++ SILABS_GUARD_INTERVAL_1_16 = 1, ++ SILABS_GUARD_INTERVAL_1_8 = 2, ++ SILABS_GUARD_INTERVAL_1_4 = 3, ++ SILABS_GUARD_INTERVAL_1_128 = 4, ++ SILABS_GUARD_INTERVAL_19_128 = 5, ++ SILABS_GUARD_INTERVAL_19_256 = 6 ++} CUSTOM_GI_Enum; ++ ++typedef enum CUSTOM_Constel_Enum { ++ SILABS_QAMAUTO = -1, ++ SILABS_QAM16 = 0, ++ SILABS_QAM32 = 1, ++ SILABS_QAM64 = 2, ++ SILABS_QAM128 = 3, ++ SILABS_QAM256 = 4, ++ SILABS_QPSK = 5, ++ SILABS_8PSK = 6 ++} CUSTOM_Constel_Enum; ++ ++typedef enum CUSTOM_Hierarchy_Enum { ++ SILABS_HIERARCHY_NONE = 0, ++ SILABS_HIERARCHY_ALFA1 = 1, ++ SILABS_HIERARCHY_ALFA2 = 2, ++ SILABS_HIERARCHY_ALFA4 = 3 ++} CUSTOM_Hierarchy_Enum; ++ ++typedef enum CUSTOM_Coderate_Enum { ++ SILABS_CODERATE_1_2 = 0, ++ SILABS_CODERATE_2_3 = 1, ++ SILABS_CODERATE_3_4 = 2, ++ SILABS_CODERATE_4_5 = 3, ++ SILABS_CODERATE_5_6 = 4, ++ SILABS_CODERATE_7_8 = 5, ++ SILABS_CODERATE_8_9 = 6, ++ SILABS_CODERATE_9_10 = 7, ++ SILABS_CODERATE_1_3 = 8, ++ SILABS_CODERATE_1_4 = 9, ++ SILABS_CODERATE_2_5 = 10, ++ SILABS_CODERATE_3_5 = 11, ++} CUSTOM_Coderate_Enum; ++ ++typedef enum CUSTOM_Pilot_Pattern_Enum { ++ SILABS_PILOT_PATTERN_PP1 = 1, ++ SILABS_PILOT_PATTERN_PP2 = 2, ++ SILABS_PILOT_PATTERN_PP3 = 3, ++ SILABS_PILOT_PATTERN_PP4 = 4, ++ SILABS_PILOT_PATTERN_PP5 = 5, ++ SILABS_PILOT_PATTERN_PP6 = 6, ++ SILABS_PILOT_PATTERN_PP7 = 7, ++ SILABS_PILOT_PATTERN_PP8 = 8, ++} CUSTOM_Pilot_Pattern_Enum; ++ ++typedef enum CUSTOM_TS_Mode_Enum { ++ SILABS_TS_TRISTATE = 0, ++ SILABS_TS_SERIAL = 1, ++ SILABS_TS_PARALLEL = 2, ++ SILABS_TS_GPIF = 3 ++} CUSTOM_TS_Mode_Enum; ++ ++typedef struct CUSTOM_Status_Struct { ++ CUSTOM_Standard_Enum standard; ++ int clock_mode; ++ int demod_lock; ++ int fec_lock; ++ int fec_lock_in_range; ++ u32 c_n; ++ u32 ber; ++ u32 per; ++ u32 fer; ++ ++ int uncorrs; ++ int RFagc; ++ int IFagc; ++ int RFlevel; ++ long freq_offset; ++ long timing_offset; ++ int bandwidth_Hz; ++ int stream; ++ int fft_mode; ++ int guard_interval; ++ int constellation; ++ unsigned int symbol_rate; ++ int code_rate_hp; ++ int code_rate_lp; ++ int hierarchy; ++ int spectral_inversion; ++ int code_rate; ++ int pilots; ++ int cell_id; ++ int RSSI; ++ int SSI; ++ int SQI; ++ int tuner_lock; ++ int rotated; ++ int pilot_pattern; ++ int bw_ext; ++ int TS_bitrate_kHz; ++ int TS_clock_kHz; ++ /* T2/C2 specifics (PLP) */ ++ int num_plp; ++ int plp_id; ++ /* End of T2/C2 specifics (PLP) */ ++ int tx_mode; ++ int short_frame; ++ unsigned char attctrl; ++ /* TUNER_STATUS */ ++ unsigned char tcint; ++ unsigned char rssilint; ++ unsigned char rssihint; ++ int vco_code; ++ unsigned char tc; ++ unsigned char rssil; ++ unsigned char rssih; ++ char rssi; ++ unsigned long freq; ++ unsigned char mode; ++ /* ATV_STATUS & DTV_STATUS */ ++ unsigned char chl; ++ /* ATV_STATUS */ ++ int ATV_Sync_Lock; ++ int ATV_Master_Lock; ++ unsigned char audio_chan_filt_bw; ++ unsigned char snrl; ++ unsigned char snrh; ++ unsigned char video_snr; ++ int afc_freq; ++ int video_sc_spacing; ++ unsigned char video_sys; ++ unsigned char color; ++ unsigned char trans; ++ unsigned char audio_sys; ++ unsigned char audio_demod_mode; ++ /* DTV_STATUS */ ++ unsigned char chlint; ++ unsigned char bw; ++ unsigned char modulation; ++ unsigned char fef; ++ /* MCNS STATUS */ ++ unsigned char interleaving; ++} CUSTOM_Status_Struct; ++ ++/*SI2168 demod*/ ++unsigned char Si2168_CurrentResponseStatus (L1_Si2168_Context *api, unsigned char ptDataBuffer); ++unsigned char Si2168_L1_DD_STATUS (L1_Si2168_Context *api, ++ unsigned char intack); ++unsigned char Si2168_L1_I2C_PASSTHROUGH (L1_Si2168_Context *api, ++ unsigned char subcode, ++ unsigned char i2c_passthru, ++ unsigned char reserved); ++unsigned char Si2168_L1_CONFIG_CLKIO (L1_Si2168_Context *api, ++ unsigned char output, ++ unsigned char pre_driver_str, ++ unsigned char driver_str); ++unsigned char Si2168_L1_CONFIG_PINS (L1_Si2168_Context *api, ++ unsigned char gpio0_mode, ++ unsigned char gpio0_read, ++ unsigned char gpio1_mode, ++ unsigned char gpio1_read); ++unsigned char Si2168_L1_DD_BER (L1_Si2168_Context *api, ++ unsigned char rst); ++unsigned char Si2168_L1_DD_CBER (L1_Si2168_Context *api, ++ unsigned char rst); ++unsigned char Si2168_L1_DD_EXT_AGC_TER (L1_Si2168_Context *api, ++ unsigned char agc_1_mode, ++ unsigned char agc_1_inv, ++ unsigned char agc_2_mode, ++ unsigned char agc_2_inv, ++ unsigned char agc_1_kloop, ++ unsigned char agc_2_kloop, ++ unsigned char agc_1_min, ++ unsigned char agc_2_min); ++unsigned char Si2168_L1_DD_FER (L1_Si2168_Context *api, ++ unsigned char rst); ++unsigned char Si2168_L1_DD_GET_REG (L1_Si2168_Context *api, ++ unsigned char reg_code_lsb, ++ unsigned char reg_code_mid, ++ unsigned char reg_code_msb); ++unsigned char Si2168_L1_DD_MP_DEFAULTS (L1_Si2168_Context *api, ++ unsigned char mp_a_mode, ++ unsigned char mp_b_mode, ++ unsigned char mp_c_mode, ++ unsigned char mp_d_mode); ++unsigned char Si2168_L1_DD_PER (L1_Si2168_Context *api, ++ unsigned char rst); ++unsigned char Si2168_L1_DD_RESTART (L1_Si2168_Context *api); ++unsigned char Si2168_L1_DD_SET_REG (L1_Si2168_Context *api, ++ unsigned char reg_code_lsb, ++ unsigned char reg_code_mid, ++ unsigned char reg_code_msb, ++ unsigned long value); ++unsigned char Si2168_L1_DD_SSI_SQI (L1_Si2168_Context *api, ++ char tuner_rssi); ++unsigned char Si2168_L1_DD_UNCOR (L1_Si2168_Context *api, ++ unsigned char rst); ++unsigned char Si2168_L1_DOWNLOAD_DATASET_CONTINUE (L1_Si2168_Context *api, ++ unsigned char data0, ++ unsigned char data1, ++ unsigned char data2, ++ unsigned char data3, ++ unsigned char data4, ++ unsigned char data5, ++ unsigned char data6); ++unsigned char Si2168_L1_DOWNLOAD_DATASET_START (L1_Si2168_Context *api, ++ unsigned char dataset_id, ++ unsigned char dataset_checksum, ++ unsigned char data0, ++ unsigned char data1, ++ unsigned char data2, ++ unsigned char data3, ++ unsigned char data4); ++unsigned char Si2168_L1_DVBC_STATUS (L1_Si2168_Context *api, ++ unsigned char intack); ++unsigned char Si2168_L1_DVBT2_FEF (L1_Si2168_Context *api, ++ unsigned char fef_tuner_flag, ++ unsigned char fef_tuner_flag_inv); ++unsigned char Si2168_L1_DVBT2_PLP_INFO (L1_Si2168_Context *api, ++ unsigned char plp_index); ++unsigned char Si2168_L1_DVBT2_PLP_SELECT (L1_Si2168_Context *api, ++ unsigned char plp_id, ++ unsigned char plp_id_sel_mode); ++unsigned char Si2168_L1_DVBT2_STATUS (L1_Si2168_Context *api, ++ unsigned char intack); ++unsigned char Si2168_L1_DVBT2_TX_ID (L1_Si2168_Context *api); ++unsigned char Si2168_L1_DVBT_STATUS (L1_Si2168_Context *api, ++ unsigned char intack); ++unsigned char Si2168_L1_DVBT_TPS_EXTRA (L1_Si2168_Context *api); ++unsigned char Si2168_L1_EXIT_BOOTLOADER (L1_Si2168_Context *api, ++ unsigned char func, ++ unsigned char ctsien); ++unsigned char Si2168_L1_GET_PROPERTY (L1_Si2168_Context *api, ++ unsigned char reserved, ++ unsigned int prop); ++unsigned char Si2168_L1_GET_REV (L1_Si2168_Context *api); ++unsigned char Si2168_L1_PART_INFO (L1_Si2168_Context *api); ++unsigned char Si2168_L1_POWER_DOWN (L1_Si2168_Context *api); ++unsigned char Si2168_L1_POWER_UP (L1_Si2168_Context *api, ++ unsigned char subcode, ++ unsigned char reset, ++ unsigned char reserved2, ++ unsigned char reserved4, ++ unsigned char reserved1, ++ unsigned char addr_mode, ++ unsigned char reserved5, ++ unsigned char func, ++ unsigned char clock_freq, ++ unsigned char ctsien, ++ unsigned char wake_up); ++unsigned char Si2168_L1_RSSI_ADC (L1_Si2168_Context *api, ++ unsigned char on_off); ++unsigned char Si2168_L1_SCAN_CTRL (L1_Si2168_Context *api, ++ unsigned char action, ++ unsigned long tuned_rf_freq); ++unsigned char Si2168_L1_SCAN_STATUS (L1_Si2168_Context *api, ++ unsigned char intack); ++unsigned char Si2168_L1_SET_PROPERTY (L1_Si2168_Context *api, ++ unsigned char reserved, ++ unsigned int prop, ++ unsigned int data); ++unsigned char Si2168_L1_START_CLK (L1_Si2168_Context *api, ++ unsigned char subcode, ++ unsigned char reserved1, ++ unsigned char tune_cap, ++ unsigned char reserved2, ++ unsigned int clk_mode, ++ unsigned char reserved3, ++ unsigned char reserved4, ++ unsigned char start_clk); ++char* Si2168_L1_API_ERROR_TEXT(unsigned char error_code); ++unsigned char Si2168_L1_API_Patch (L1_Si2168_Context *api, int iNbBytes, unsigned char *pucDataBuffer); ++unsigned char Si2168_L1_SendCommand2(L1_Si2168_Context *api, unsigned int cmd_code); ++unsigned char Si2168_L1_API_Init (L1_Si2168_Context *api, int add); ++unsigned char Si2168_L1_SetProperty(L1_Si2168_Context *api, unsigned int prop, int data); ++unsigned char Si2168_L1_SetProperty2(L1_Si2168_Context *api, unsigned int prop_code); ++unsigned char Si2168_pollForResponse (L1_Si2168_Context *api, unsigned int nbBytes, unsigned char *pByteBuffer); ++ ++unsigned char Si2168_L2_Tuner_I2C_Enable (Si2168_L2_Context *front_end); ++unsigned char Si2168_L2_Tuner_I2C_Disable(Si2168_L2_Context *front_end); ++int Si2168_L2_TER_FEF (Si2168_L2_Context *front_end, int fef); ++int Si2168_L2_TER_FEF_SETUP (Si2168_L2_Context *front_end, int fef); ++int Si2168_TerAutoDetect (Si2168_L2_Context *front_end); ++int Si2168_TerAutoDetectOff (Si2168_L2_Context *front_end); ++char Si2168_L2_SW_Init(Si2168_L2_Context *front_end, int demodAdd, int tunerAdd_Ter); ++ ++char* SiLabs_API_TAG_TEXT (void); ++int SiLabs_chip_detect (int demodAdd); ++int SiLabs_API_TER_AutoDetect (SILABS_FE_Context *front_end, int on_off); ++char SiLabs_API_SW_Init(SILABS_FE_Context *front_end, int demodAdd, int tunerAdd_Ter, int tunerAdd_Sat); ++int SiLabs_API_TS_Mode (SILABS_FE_Context *front_end, int ts_mode); ++int SiLabs_API_Tuner_I2C_Enable (SILABS_FE_Context *front_end); ++int SiLabs_API_Tuner_I2C_Disable (SILABS_FE_Context *front_end); ++char *Silabs_Constel_Text (CUSTOM_Constel_Enum constel); ++char *Silabs_Polarization_Text (CUSTOM_Polarization_Enum polarization); ++char *Silabs_Band_Text (CUSTOM_Band_Enum band); ++char *Silabs_Stream_Text (CUSTOM_Stream_Enum stream); ++char *Silabs_Standard_Text (CUSTOM_Standard_Enum standard); ++char *Si2168_standardName (int standard); ++int SiLabs_API_SAT_Tuner_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status); ++int SiLabs_API_TER_Tuner_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status); ++int SiLabs_API_Demod_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status); ++int SiLabs_API_FE_status (SILABS_FE_Context* front_end, CUSTOM_Status_Struct *status); ++int Custom_standardCode (SILABS_FE_Context* front_end, int standard); ++int Custom_streamCode (SILABS_FE_Context* front_end, int stream); ++int Custom_fftCode (SILABS_FE_Context* front_end, int fft); ++int Custom_giCode (SILABS_FE_Context* front_end, int gi); ++int Custom_constelCode (SILABS_FE_Context* front_end, int constel); ++int Custom_hierarchyCode (SILABS_FE_Context* front_end, int hierarchy); ++int Custom_coderateCode (SILABS_FE_Context* front_end, int coderate); ++int Custom_pilotPatternCode (SILABS_FE_Context* front_end, int pilot_pattern); ++int Silabs_standardCode (SILABS_FE_Context* front_end, CUSTOM_Standard_Enum standard); ++int Silabs_constelCode (SILABS_FE_Context* front_end, CUSTOM_Constel_Enum constel); ++int Silabs_streamCode (SILABS_FE_Context* front_end, CUSTOM_Stream_Enum stream); ++ ++int Si2168_Configure (L1_Si2168_Context *api); ++int Si2168_STANDBY (L1_Si2168_Context *api); ++int Si2168_WAKEUP (L1_Si2168_Context *api); ++int Si2168_Media (L1_Si2168_Context *api, int modulation); ++int Si2168_PowerUpWithPatch (L1_Si2168_Context *api); ++int Si2168_LoadFirmware (L1_Si2168_Context *api, unsigned char fw_table[], int nbLines); ++int Si2168_StartFirmware (L1_Si2168_Context *api); ++int Si2168_Init (L1_Si2168_Context *api); ++ ++int Si2168_L2_switch_to_standard (Si2168_L2_Context *front_end, int new_standard, unsigned char force_full_init); ++int SiLabs_API_switch_to_standard (SILABS_FE_Context *front_end, int standard, unsigned char force_full_init); ++ ++void Si2168_setupCOMMONDefaults (L1_Si2168_Context *api); ++void Si2168_setupDDDefaults (L1_Si2168_Context *api); ++void Si2168_setupDVBCDefaults (L1_Si2168_Context *api); ++void Si2168_setupDVBTDefaults (L1_Si2168_Context *api); ++void Si2168_setupDVBT2Defaults (L1_Si2168_Context *api); ++void Si2168_setupSCANDefaults (L1_Si2168_Context *api); ++void Si2168_setupAllDefaults (L1_Si2168_Context *api); ++ ++int Si2168_downloadCOMMONProperties(L1_Si2168_Context *api); ++int Si2168_downloadDDProperties(L1_Si2168_Context *api); ++int Si2168_downloadDVBCProperties(L1_Si2168_Context *api); ++int Si2168_downloadDVBTProperties(L1_Si2168_Context *api); ++int Si2168_downloadDVBT2Properties(L1_Si2168_Context *api); ++int Si2168_downloadSCANProperties(L1_Si2168_Context *api); ++int Si2168_downloadAllProperties (L1_Si2168_Context *api); ++ ++int Si2168_L2_Tune (Si2168_L2_Context *front_end, int rf); ++int Si2168_L2_lock_to_carrier (Si2168_L2_Context *front_end, int standard, int freq, int dvb_t_bandwidth_hz, int dvb_t_stream, unsigned int symbol_rate_bps, int dvb_c_constellation, int dvb_t2_plp_id); ++int SiLabs_API_lock_to_carrier (SILABS_FE_Context *front_end, int standard, int freq, int bandwidth_Hz, int stream, unsigned int symbol_rate_bps, int constellation, int polarization, int band, int plp_id); ++ ++/* SI2158 Tuner*/ ++char* Si2158_L1_API_ERROR_TEXT(unsigned char error_code); ++unsigned char Si2158_L1_DTV_STATUS (L1_Si2158_Context *api, unsigned char intack); ++unsigned char Si2158_L1_ATV_STATUS (L1_Si2158_Context *api, unsigned char intack); ++unsigned char Si2158_L1_TUNER_STATUS (L1_Si2158_Context *api, unsigned char intack); ++unsigned char Si2158_L1_STANDBY (L1_Si2158_Context *api, unsigned char type); ++unsigned char Si2158_L1_AGC_OVERRIDE (L1_Si2158_Context *api, ++ unsigned char force_max_gain, ++ unsigned char force_top_gain); ++unsigned char Si2158_L1_ATV_CW_TEST (L1_Si2158_Context *api, ++ unsigned char pc_lock); ++unsigned char Si2158_L1_ATV_RESTART (L1_Si2158_Context *api); ++unsigned char Si2158_L1_CONFIG_PINS (L1_Si2158_Context *api, ++ unsigned char gpio1_mode, ++ unsigned char gpio1_read, ++ unsigned char gpio2_mode, ++ unsigned char gpio2_read, ++ unsigned char reserved1, ++ unsigned char reserved2, ++ unsigned char reserved3); ++unsigned char Si2158_L1_DTV_RESTART (L1_Si2158_Context *api); ++unsigned char Si2158_L1_EXIT_BOOTLOADER (L1_Si2158_Context *api, ++ unsigned char func, ++ unsigned char ctsien); ++unsigned char Si2158_L1_FINE_TUNE (L1_Si2158_Context *api, ++ unsigned char persistence, ++ unsigned char apply_to_lif, ++ int offset_500hz); ++unsigned char Si2158_L1_GET_PROPERTY (L1_Si2158_Context *api, ++ unsigned char reserved, ++ unsigned int prop); ++unsigned char Si2158_L1_GET_REV (L1_Si2158_Context *api); ++unsigned char Si2158_L1_PART_INFO (L1_Si2158_Context *api); ++unsigned char Si2158_L1_POWER_DOWN (L1_Si2158_Context *api); ++unsigned char Si2158_L1_POWER_DOWN_HW (L1_Si2158_Context *api, ++ unsigned char subcode, ++ unsigned char pd_xo_osc, ++ unsigned char reserved1, ++ unsigned char en_xout, ++ unsigned char reserved2, ++ unsigned char pd_ldo, ++ unsigned char reserved3, ++ unsigned char reserved4, ++ unsigned char reserved5, ++ unsigned char reserved6, ++ unsigned char reserved7, ++ unsigned char reserved8); ++unsigned char Si2158_L1_POWER_UP (L1_Si2158_Context *api, ++ unsigned char subcode, ++ unsigned char clock_mode, ++ unsigned char en_xout, ++ unsigned char pd_ldo, ++ unsigned char reserved2, ++ unsigned char reserved3, ++ unsigned char reserved4, ++ unsigned char reserved5, ++ unsigned char reserved6, ++ unsigned char reserved7, ++ unsigned char reset, ++ unsigned char clock_freq, ++ unsigned char reserved8, ++ unsigned char func, ++ unsigned char ctsien, ++ unsigned char wake_up); ++unsigned char Si2158_L1_TUNER_TUNE_FREQ (L1_Si2158_Context *api, ++ unsigned char mode, ++ unsigned long freq); ++unsigned char Si2158_L1_SendCommand2(L1_Si2158_Context *api, unsigned int cmd_code); ++unsigned char Si2158_CurrentResponseStatus (L1_Si2158_Context *api, unsigned char ptDataBuffer); ++unsigned char Si2158_pollForCTS (L1_Si2158_Context *api); ++unsigned char Si2158_pollForResponse (L1_Si2158_Context *api, unsigned int nbBytes, unsigned char *pByteBuffer); ++unsigned char Si2158_L1_API_Init (L1_Si2158_Context *api, int add); ++unsigned char Si2158_L1_API_Patch (L1_Si2158_Context *api, int iNbBytes, unsigned char *pucDataBuffer); ++unsigned char Si2158_L1_CheckStatus (L1_Si2158_Context *api); ++ ++int Si2158_XoutOn (L1_Si2158_Context *api); ++int Si2158_XoutOff (L1_Si2158_Context *api); ++int Si2158_Configure (L1_Si2158_Context *api); ++int Si2158_PowerUpWithPatch (L1_Si2158_Context *api); ++int Si2158_LoadFirmware_16 (L1_Si2158_Context *api, firmware_struct fw_table[], int nbLines); ++int Si2158_LoadFirmware (L1_Si2158_Context *api, unsigned char fw_table[], int nbLines); ++int Si2158_StartFirmware (L1_Si2158_Context *api); ++int Si2158_Init (L1_Si2158_Context *api); ++ ++unsigned char Si2158_L1_CONFIG_CLOCKS (L1_Si2158_Context *api, ++ unsigned char subcode, ++ unsigned char clock_mode, ++ unsigned char en_xout); ++unsigned char Si2158_L1_SET_PROPERTY (L1_Si2158_Context *api, ++ unsigned char reserved, ++ unsigned int prop, ++ unsigned int data); ++ ++unsigned char Si2158_L1_SetProperty(L1_Si2158_Context *api, unsigned int prop, int data); ++unsigned char Si2158_L1_SetProperty2(L1_Si2158_Context *api, unsigned int prop_code); ++ ++void Si2158_setupATVDefaults (L1_Si2158_Context *api); ++void Si2158_setupCOMMONDefaults (L1_Si2158_Context *api); ++void Si2158_setupDTVDefaults (L1_Si2158_Context *api); ++void Si2158_setupTUNERDefaults (L1_Si2158_Context *api); ++void Si2158_setupAllDefaults (L1_Si2158_Context *api); ++ ++int Si2158_downloadATVProperties(L1_Si2158_Context *api); ++int Si2158_downloadCOMMONProperties(L1_Si2158_Context *api); ++int Si2158_downloadDTVProperties(L1_Si2158_Context *api); ++int Si2158_downloadTUNERProperties(L1_Si2158_Context *api); ++int Si2158_downloadAllProperties (L1_Si2158_Context *api); ++ ++int Si2158_Tune (L1_Si2158_Context *api, unsigned char mode, unsigned long freq); ++int Si2158_DTVTune (L1_Si2158_Context *api, unsigned long freq, unsigned char bw, unsigned char modulation, unsigned char invert_spectrum); ++ ++/*i2c*/ ++void L0_Init (L0_Context *i2c); ++int L0_SetAddress (L0_Context* i2c, unsigned int add, int addSize); ++int L0_WriteCommandBytes (L0_Context* i2c, int iNbBytes, unsigned char *pucDataBuffer); ++int L0_WriteBytes (L0_Context* i2c, unsigned int iI2CIndex, int iNbBytes, unsigned char *pucDataBuffer); ++int L0_ReadCommandBytes (L0_Context* i2c, int iNbBytes, unsigned char *pucDataBuffer); ++int L0_ReadBytes (L0_Context* i2c, unsigned int iI2CIndex, int iNbBytes, unsigned char *pucDataBuffer); ++int delayMS(int ms); ++int power_of_n (int n, int m); ++ ++#define SI2168_DEMOD_ADDRESS 0x64 /*0xc8*/ ++#define SI2158_TUNER_ADDRESS 0x60 /*0xc0*/ ++ ++extern int si2168_debug; ++#define SiTRACE(args...) \ ++ do { \ ++ if (si2168_debug) \ ++ printk(KERN_INFO "si2168: " args); \ ++ } while (0) ++ ++#define SiERROR SiTRACE ++ ++#endif /* SI2168_PRIV_H */ +diff -urN a/drivers/media/dvb-frontends/si2168_properties.h b/drivers/media/dvb-frontends/si2168_properties.h +--- a/drivers/media/dvb-frontends/si2168_properties.h 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_properties.h 2013-02-17 18:09:43.000000000 +0800 +@@ -0,0 +1,1150 @@ ++/*************************************************************************/ ++#ifndef _Si2168_PROPERTIES_H_ ++#define _Si2168_PROPERTIES_H_ ++ ++/* _properties_defines_insertion_start */ ++/* Si2168 DD_BER_RESOL property definition */ ++#define Si2168_DD_BER_RESOL_PROP 0x1003 ++ ++#ifdef Si2168_DD_BER_RESOL_PROP ++ #define Si2168_DD_BER_RESOL_PROP_CODE 0x001003 ++ ++ ++ typedef struct { /* Si2168_DD_BER_RESOL_PROP_struct */ ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_BER_RESOL_PROP_struct; ++ ++ /* DD_BER_RESOL property, EXP field definition (NO TITLE)*/ ++ #define Si2168_DD_BER_RESOL_PROP_EXP_LSB 0 ++ #define Si2168_DD_BER_RESOL_PROP_EXP_MASK 0x0f ++ #define Si2168_DD_BER_RESOL_PROP_EXP_DEFAULT 7 ++ #define Si2168_DD_BER_RESOL_PROP_EXP_EXPLO_MIN 1 ++ #define Si2168_DD_BER_RESOL_PROP_EXP_EXPLO_MAX 8 ++ ++ /* DD_BER_RESOL property, MANT field definition (NO TITLE)*/ ++ #define Si2168_DD_BER_RESOL_PROP_MANT_LSB 4 ++ #define Si2168_DD_BER_RESOL_PROP_MANT_MASK 0x0f ++ #define Si2168_DD_BER_RESOL_PROP_MANT_DEFAULT 1 ++ #define Si2168_DD_BER_RESOL_PROP_MANT_MANTLO_MIN 1 ++ #define Si2168_DD_BER_RESOL_PROP_MANT_MANTLO_MAX 9 ++ ++#endif /* Si2168_DD_BER_RESOL_PROP */ ++ ++/* Si2168 DD_CBER_RESOL property definition */ ++#define Si2168_DD_CBER_RESOL_PROP 0x1002 ++ ++#ifdef Si2168_DD_CBER_RESOL_PROP ++ #define Si2168_DD_CBER_RESOL_PROP_CODE 0x001002 ++ ++ ++ typedef struct { /* Si2168_DD_CBER_RESOL_PROP_struct */ ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_CBER_RESOL_PROP_struct; ++ ++ /* DD_CBER_RESOL property, EXP field definition (NO TITLE)*/ ++ #define Si2168_DD_CBER_RESOL_PROP_EXP_LSB 0 ++ #define Si2168_DD_CBER_RESOL_PROP_EXP_MASK 0x0f ++ #define Si2168_DD_CBER_RESOL_PROP_EXP_DEFAULT 5 ++ #define Si2168_DD_CBER_RESOL_PROP_EXP_EXPLO_MIN 1 ++ #define Si2168_DD_CBER_RESOL_PROP_EXP_EXPLO_MAX 8 ++ ++ /* DD_CBER_RESOL property, MANT field definition (NO TITLE)*/ ++ #define Si2168_DD_CBER_RESOL_PROP_MANT_LSB 4 ++ #define Si2168_DD_CBER_RESOL_PROP_MANT_MASK 0x0f ++ #define Si2168_DD_CBER_RESOL_PROP_MANT_DEFAULT 1 ++ #define Si2168_DD_CBER_RESOL_PROP_MANT_MANTLO_MIN 1 ++ #define Si2168_DD_CBER_RESOL_PROP_MANT_MANTLO_MAX 9 ++ ++#endif /* Si2168_DD_CBER_RESOL_PROP */ ++ ++ ++/* Si2168 DD_FER_RESOL property definition */ ++#define Si2168_DD_FER_RESOL_PROP 0x100c ++ ++#ifdef Si2168_DD_FER_RESOL_PROP ++ #define Si2168_DD_FER_RESOL_PROP_CODE 0x00100c ++ ++ ++ typedef struct { /* Si2168_DD_FER_RESOL_PROP_struct */ ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_FER_RESOL_PROP_struct; ++ ++ /* DD_FER_RESOL property, EXP field definition (NO TITLE)*/ ++ #define Si2168_DD_FER_RESOL_PROP_EXP_LSB 0 ++ #define Si2168_DD_FER_RESOL_PROP_EXP_MASK 0x0f ++ #define Si2168_DD_FER_RESOL_PROP_EXP_DEFAULT 3 ++ #define Si2168_DD_FER_RESOL_PROP_EXP_EXP_MIN 1 ++ #define Si2168_DD_FER_RESOL_PROP_EXP_EXP_MAX 4 ++ ++ /* DD_FER_RESOL property, MANT field definition (NO TITLE)*/ ++ #define Si2168_DD_FER_RESOL_PROP_MANT_LSB 4 ++ #define Si2168_DD_FER_RESOL_PROP_MANT_MASK 0x0f ++ #define Si2168_DD_FER_RESOL_PROP_MANT_DEFAULT 1 ++ #define Si2168_DD_FER_RESOL_PROP_MANT_MANT_MIN 1 ++ #define Si2168_DD_FER_RESOL_PROP_MANT_MANT_MAX 9 ++ ++#endif /* Si2168_DD_FER_RESOL_PROP */ ++ ++/* Si2168 DD_IEN property definition */ ++#define Si2168_DD_IEN_PROP 0x1006 ++ ++#ifdef Si2168_DD_IEN_PROP ++ #define Si2168_DD_IEN_PROP_CODE 0x001006 ++ ++ ++ typedef struct { /* Si2168_DD_IEN_PROP_struct */ ++ unsigned char ien_bit0; ++ unsigned char ien_bit1; ++ unsigned char ien_bit2; ++ unsigned char ien_bit3; ++ unsigned char ien_bit4; ++ unsigned char ien_bit5; ++ unsigned char ien_bit6; ++ unsigned char ien_bit7; ++ } Si2168_DD_IEN_PROP_struct; ++ ++ /* DD_IEN property, IEN_BIT0 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT0_LSB 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT0_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT0_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT0_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT0_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT1 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT1_LSB 1 ++ #define Si2168_DD_IEN_PROP_IEN_BIT1_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT1_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT1_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT1_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT2 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT2_LSB 2 ++ #define Si2168_DD_IEN_PROP_IEN_BIT2_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT2_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT2_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT2_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT3 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT3_LSB 3 ++ #define Si2168_DD_IEN_PROP_IEN_BIT3_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT3_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT3_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT3_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT4 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT4_LSB 4 ++ #define Si2168_DD_IEN_PROP_IEN_BIT4_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT4_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT4_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT4_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT5 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT5_LSB 5 ++ #define Si2168_DD_IEN_PROP_IEN_BIT5_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT5_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT5_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT5_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT6 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT6_LSB 6 ++ #define Si2168_DD_IEN_PROP_IEN_BIT6_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT6_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT6_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT6_ENABLE 1 ++ ++ /* DD_IEN property, IEN_BIT7 field definition (NO TITLE)*/ ++ #define Si2168_DD_IEN_PROP_IEN_BIT7_LSB 7 ++ #define Si2168_DD_IEN_PROP_IEN_BIT7_MASK 0x01 ++ #define Si2168_DD_IEN_PROP_IEN_BIT7_DEFAULT 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT7_DISABLE 0 ++ #define Si2168_DD_IEN_PROP_IEN_BIT7_ENABLE 1 ++ ++#endif /* Si2168_DD_IEN_PROP */ ++ ++/* Si2168 DD_IF_INPUT_FREQ property definition */ ++#define Si2168_DD_IF_INPUT_FREQ_PROP 0x100b ++ ++#ifdef Si2168_DD_IF_INPUT_FREQ_PROP ++ #define Si2168_DD_IF_INPUT_FREQ_PROP_CODE 0x00100b ++ ++ ++ typedef struct { /* Si2168_DD_IF_INPUT_FREQ_PROP_struct */ ++ unsigned int offset; ++ } Si2168_DD_IF_INPUT_FREQ_PROP_struct; ++ ++ /* DD_IF_INPUT_FREQ property, OFFSET field definition (NO TITLE)*/ ++ #define Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_LSB 0 ++ #define Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_MASK 0xffff ++ #define Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_DEFAULT 5000 ++ #define Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_OFFSET_MIN 0 ++ #define Si2168_DD_IF_INPUT_FREQ_PROP_OFFSET_OFFSET_MAX 36000 ++ ++#endif /* Si2168_DD_IF_INPUT_FREQ_PROP */ ++ ++/* Si2168 DD_INT_SENSE property definition */ ++#define Si2168_DD_INT_SENSE_PROP 0x1007 ++ ++#ifdef Si2168_DD_INT_SENSE_PROP ++ #define Si2168_DD_INT_SENSE_PROP_CODE 0x001007 ++ ++ ++ typedef struct { /* Si2168_DD_INT_SENSE_PROP_struct */ ++ unsigned char neg_bit0; ++ unsigned char neg_bit1; ++ unsigned char neg_bit2; ++ unsigned char neg_bit3; ++ unsigned char neg_bit4; ++ unsigned char neg_bit5; ++ unsigned char neg_bit6; ++ unsigned char neg_bit7; ++ unsigned char pos_bit0; ++ unsigned char pos_bit1; ++ unsigned char pos_bit2; ++ unsigned char pos_bit3; ++ unsigned char pos_bit4; ++ unsigned char pos_bit5; ++ unsigned char pos_bit6; ++ unsigned char pos_bit7; ++ } Si2168_DD_INT_SENSE_PROP_struct; ++ ++ /* DD_INT_SENSE property, NEG_BIT0 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT0_LSB 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT0_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT0_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT0_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT0_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT1 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT1_LSB 1 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT1_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT1_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT1_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT1_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT2 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT2_LSB 2 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT2_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT2_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT2_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT2_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT3 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT3_LSB 3 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT3_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT3_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT3_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT3_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT4 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT4_LSB 4 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT4_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT4_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT4_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT4_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT5 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT5_LSB 5 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT5_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT5_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT5_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT5_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT6 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT6_LSB 6 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT6_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT6_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT6_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT6_ENABLE 1 ++ ++ /* DD_INT_SENSE property, NEG_BIT7 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT7_LSB 7 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT7_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT7_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT7_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_NEG_BIT7_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT0 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT0_LSB 8 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT0_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT0_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT0_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT0_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT1 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT1_LSB 9 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT1_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT1_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT1_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT1_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT2 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT2_LSB 10 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT2_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT2_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT2_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT2_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT3 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT3_LSB 11 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT3_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT3_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT3_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT3_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT4 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT4_LSB 12 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT4_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT4_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT4_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT4_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT5 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT5_LSB 13 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT5_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT5_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT5_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT5_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT6 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT6_LSB 14 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT6_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT6_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT6_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT6_ENABLE 1 ++ ++ /* DD_INT_SENSE property, POS_BIT7 field definition (NO TITLE)*/ ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT7_LSB 15 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT7_MASK 0x01 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT7_DEFAULT 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT7_DISABLE 0 ++ #define Si2168_DD_INT_SENSE_PROP_POS_BIT7_ENABLE 1 ++ ++#endif /* Si2168_DD_INT_SENSE_PROP */ ++ ++/* Si2168 DD_MODE property definition */ ++#define Si2168_DD_MODE_PROP 0x100a ++ ++#ifdef Si2168_DD_MODE_PROP ++ #define Si2168_DD_MODE_PROP_CODE 0x00100a ++ ++ ++ typedef struct { /* Si2168_DD_MODE_PROP_struct */ ++ unsigned char auto_detect; ++ unsigned char bw; ++ unsigned char invert_spectrum; ++ unsigned char modulation; ++ } Si2168_DD_MODE_PROP_struct; ++ ++ /* DD_MODE property, AUTO_DETECT field definition (NO TITLE)*/ ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_LSB 9 ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_MASK 0x07 ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_DEFAULT 0 ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_NONE 0 ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_AUTO_DVB_T_T2 1 ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_AUTO_DVB_S_S2 2 ++ #define Si2168_DD_MODE_PROP_AUTO_DETECT_AUTO_DVB_S_S2_DSS 3 ++ ++ /* DD_MODE property, BW field definition (NO TITLE)*/ ++ #define Si2168_DD_MODE_PROP_BW_LSB 0 ++ #define Si2168_DD_MODE_PROP_BW_MASK 0x0f ++ #define Si2168_DD_MODE_PROP_BW_DEFAULT 8 ++ #define Si2168_DD_MODE_PROP_BW_BW_5MHZ 5 ++ #define Si2168_DD_MODE_PROP_BW_BW_6MHZ 6 ++ #define Si2168_DD_MODE_PROP_BW_BW_7MHZ 7 ++ #define Si2168_DD_MODE_PROP_BW_BW_8MHZ 8 ++ #define Si2168_DD_MODE_PROP_BW_BW_1D7MHZ 2 ++ ++ /* DD_MODE property, INVERT_SPECTRUM field definition (NO TITLE)*/ ++ #define Si2168_DD_MODE_PROP_INVERT_SPECTRUM_LSB 8 ++ #define Si2168_DD_MODE_PROP_INVERT_SPECTRUM_MASK 0x01 ++ #define Si2168_DD_MODE_PROP_INVERT_SPECTRUM_DEFAULT 0 ++ #define Si2168_DD_MODE_PROP_INVERT_SPECTRUM_NORMAL 0 ++ #define Si2168_DD_MODE_PROP_INVERT_SPECTRUM_INVERTED 1 ++ ++ /* DD_MODE property, MODULATION field definition (NO TITLE)*/ ++ #define Si2168_DD_MODE_PROP_MODULATION_LSB 4 ++ #define Si2168_DD_MODE_PROP_MODULATION_MASK 0x0f ++ #define Si2168_DD_MODE_PROP_MODULATION_DEFAULT 2 ++ #define Si2168_DD_MODE_PROP_MODULATION_DVBT 2 ++ #define Si2168_DD_MODE_PROP_MODULATION_DVBC 3 ++ #define Si2168_DD_MODE_PROP_MODULATION_DVBT2 7 ++ #define Si2168_DD_MODE_PROP_MODULATION_DVBS 8 ++ #define Si2168_DD_MODE_PROP_MODULATION_DVBS2 9 ++ #define Si2168_DD_MODE_PROP_MODULATION_DSS 10 ++ #define Si2168_DD_MODE_PROP_MODULATION_AUTO_DETECT 15 ++ #define Si2168_DD_MODE_PROP_MODULATION_ANALOG 100 ++ ++#endif /* Si2168_DD_MODE_PROP */ ++ ++/* Si2168 DD_PER_RESOL property definition */ ++#define Si2168_DD_PER_RESOL_PROP 0x1004 ++ ++#ifdef Si2168_DD_PER_RESOL_PROP ++ #define Si2168_DD_PER_RESOL_PROP_CODE 0x001004 ++ ++ ++ typedef struct { /* Si2168_DD_PER_RESOL_PROP_struct */ ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_PER_RESOL_PROP_struct; ++ ++ /* DD_PER_RESOL property, EXP field definition (NO TITLE)*/ ++ #define Si2168_DD_PER_RESOL_PROP_EXP_LSB 0 ++ #define Si2168_DD_PER_RESOL_PROP_EXP_MASK 0x0f ++ #define Si2168_DD_PER_RESOL_PROP_EXP_DEFAULT 5 ++ #define Si2168_DD_PER_RESOL_PROP_EXP_EXPLO_MIN 1 ++ #define Si2168_DD_PER_RESOL_PROP_EXP_EXPLO_MAX 9 ++ ++ /* DD_PER_RESOL property, MANT field definition (NO TITLE)*/ ++ #define Si2168_DD_PER_RESOL_PROP_MANT_LSB 4 ++ #define Si2168_DD_PER_RESOL_PROP_MANT_MASK 0x0f ++ #define Si2168_DD_PER_RESOL_PROP_MANT_DEFAULT 1 ++ #define Si2168_DD_PER_RESOL_PROP_MANT_MANTLO_MIN 1 ++ #define Si2168_DD_PER_RESOL_PROP_MANT_MANTLO_MAX 9 ++ ++#endif /* Si2168_DD_PER_RESOL_PROP */ ++ ++/* Si2168 DD_RSQ_BER_THRESHOLD property definition */ ++#define Si2168_DD_RSQ_BER_THRESHOLD_PROP 0x1005 ++ ++#ifdef Si2168_DD_RSQ_BER_THRESHOLD_PROP ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_CODE 0x001005 ++ ++ ++ typedef struct { /* Si2168_DD_RSQ_BER_THRESHOLD_PROP_struct */ ++ unsigned char exp; ++ unsigned char mant; ++ } Si2168_DD_RSQ_BER_THRESHOLD_PROP_struct; ++ ++ /* DD_RSQ_BER_THRESHOLD property, EXP field definition (NO TITLE)*/ ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_LSB 0 ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_MASK 0x0f ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_DEFAULT 1 ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_EXP_MIN 1 ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_EXP_EXP_MAX 8 ++ ++ /* DD_RSQ_BER_THRESHOLD property, MANT field definition (NO TITLE)*/ ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_LSB 4 ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_MASK 0x0f ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_DEFAULT 10 ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_MANT_MIN 0 ++ #define Si2168_DD_RSQ_BER_THRESHOLD_PROP_MANT_MANT_MAX 99 ++ ++#endif /* Si2168_DD_RSQ_BER_THRESHOLD_PROP */ ++ ++/* Si2168 DD_TS_FREQ property definition */ ++#define Si2168_DD_TS_FREQ_PROP 0x100d ++ ++#ifdef Si2168_DD_TS_FREQ_PROP ++ #define Si2168_DD_TS_FREQ_PROP_CODE 0x00100d ++ ++ ++ typedef struct { /* Si2168_DD_TS_FREQ_PROP_struct */ ++ unsigned int req_freq_10khz; ++ } Si2168_DD_TS_FREQ_PROP_struct; ++ ++ /* DD_TS_FREQ property, REQ_FREQ_10KHZ field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_LSB 0 ++ #define Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_MASK 0x3fff ++ #define Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_DEFAULT 720 ++ #define Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_REQ_FREQ_10KHZ_MIN 0 ++ #define Si2168_DD_TS_FREQ_PROP_REQ_FREQ_10KHZ_REQ_FREQ_10KHZ_MAX 14550 ++ ++#endif /* Si2168_DD_TS_FREQ_PROP */ ++ ++/* Si2168 DD_TS_MODE property definition */ ++#define Si2168_DD_TS_MODE_PROP 0x1001 ++ ++#ifdef Si2168_DD_TS_MODE_PROP ++ #define Si2168_DD_TS_MODE_PROP_CODE 0x001001 ++ ++ ++ typedef struct { /* Si2168_DD_TS_MODE_PROP_struct */ ++ unsigned char clk_gapped_en; ++ unsigned char clock; ++ unsigned char mode; ++ unsigned char special; ++ unsigned char ts_err_polarity; ++ } Si2168_DD_TS_MODE_PROP_struct; ++ ++ /* DD_TS_MODE property, CLK_GAPPED_EN field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_LSB 6 ++ #define Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_MASK 0x01 ++ #define Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_DEFAULT 0 ++ #define Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_DISABLED 0 ++ #define Si2168_DD_TS_MODE_PROP_CLK_GAPPED_EN_ENABLED 1 ++ ++ /* DD_TS_MODE property, CLOCK field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_MODE_PROP_CLOCK_LSB 4 ++ #define Si2168_DD_TS_MODE_PROP_CLOCK_MASK 0x03 ++ #define Si2168_DD_TS_MODE_PROP_CLOCK_DEFAULT 0 ++ #define Si2168_DD_TS_MODE_PROP_CLOCK_AUTO_FIXED 0 ++ #define Si2168_DD_TS_MODE_PROP_CLOCK_AUTO_ADAPT 1 ++ #define Si2168_DD_TS_MODE_PROP_CLOCK_MANUAL 2 ++ ++ /* DD_TS_MODE property, MODE field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_MODE_PROP_MODE_LSB 0 ++ #define Si2168_DD_TS_MODE_PROP_MODE_MASK 0x0f ++ #define Si2168_DD_TS_MODE_PROP_MODE_DEFAULT 0 ++ #define Si2168_DD_TS_MODE_PROP_MODE_TRISTATE 0 ++ #define Si2168_DD_TS_MODE_PROP_MODE_OFF 1 ++ #define Si2168_DD_TS_MODE_PROP_MODE_SERIAL 3 ++ #define Si2168_DD_TS_MODE_PROP_MODE_PARALLEL 6 ++ #define Si2168_DD_TS_MODE_PROP_MODE_GPIF 7 ++ ++ /* DD_TS_MODE property, SPECIAL field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_MODE_PROP_SPECIAL_LSB 8 ++ #define Si2168_DD_TS_MODE_PROP_SPECIAL_MASK 0x03 ++ #define Si2168_DD_TS_MODE_PROP_SPECIAL_DEFAULT 0 ++ #define Si2168_DD_TS_MODE_PROP_SPECIAL_FULL_TS 0 ++ #define Si2168_DD_TS_MODE_PROP_SPECIAL_DATAS_TRISTATE 1 ++ ++ /* DD_TS_MODE property, TS_ERR_POLARITY field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_LSB 7 ++ #define Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_MASK 0x01 ++ #define Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_DEFAULT 0 ++ #define Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_NOT_INVERTED 0 ++ #define Si2168_DD_TS_MODE_PROP_TS_ERR_POLARITY_INVERTED 1 ++ ++#endif /* Si2168_DD_TS_MODE_PROP */ ++ ++/* Si2168 DD_TS_SETUP_PAR property definition */ ++#define Si2168_DD_TS_SETUP_PAR_PROP 0x1009 ++ ++#ifdef Si2168_DD_TS_SETUP_PAR_PROP ++ #define Si2168_DD_TS_SETUP_PAR_PROP_CODE 0x001009 ++ ++ ++ typedef struct { /* Si2168_DD_TS_SETUP_PAR_PROP_struct */ ++ unsigned char ts_clk_invert; ++ unsigned char ts_clk_shape; ++ unsigned char ts_clk_shift; ++ unsigned char ts_clk_strength; ++ unsigned char ts_data_shape; ++ unsigned char ts_data_strength; ++ } Si2168_DD_TS_SETUP_PAR_PROP_struct; ++ ++ /* DD_TS_SETUP_PAR property, TS_CLK_INVERT field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_LSB 12 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_MASK 0x01 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_DEFAULT 1 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_NOT_INVERTED 0 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_INVERT_INVERTED 1 ++ ++ /* DD_TS_SETUP_PAR property, TS_CLK_SHAPE field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHAPE_LSB 10 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHAPE_MASK 0x03 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHAPE_DEFAULT 1 ++ /* DD_TS_SETUP_PAR property, TS_CLK_SHIFT field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHIFT_LSB 13 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHIFT_MASK 0x07 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_SHIFT_DEFAULT 0 ++ /* DD_TS_SETUP_PAR property, TS_CLK_STRENGTH field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_STRENGTH_LSB 6 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_STRENGTH_MASK 0x0f ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_CLK_STRENGTH_DEFAULT 3 ++ /* DD_TS_SETUP_PAR property, TS_DATA_SHAPE field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_SHAPE_LSB 4 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_SHAPE_MASK 0x03 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_SHAPE_DEFAULT 1 ++ /* DD_TS_SETUP_PAR property, TS_DATA_STRENGTH field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_STRENGTH_LSB 0 ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_STRENGTH_MASK 0x0f ++ #define Si2168_DD_TS_SETUP_PAR_PROP_TS_DATA_STRENGTH_DEFAULT 3 ++#endif /* Si2168_DD_TS_SETUP_PAR_PROP */ ++ ++/* Si2168 DD_TS_SETUP_SER property definition */ ++#define Si2168_DD_TS_SETUP_SER_PROP 0x1008 ++ ++#ifdef Si2168_DD_TS_SETUP_SER_PROP ++ #define Si2168_DD_TS_SETUP_SER_PROP_CODE 0x001008 ++ ++ ++ typedef struct { /* Si2168_DD_TS_SETUP_SER_PROP_struct */ ++ unsigned char ts_byte_order; ++ unsigned char ts_clk_invert; ++ unsigned char ts_clk_shape; ++ unsigned char ts_clk_strength; ++ unsigned char ts_data_shape; ++ unsigned char ts_data_strength; ++ unsigned char ts_sync_duration; ++ } Si2168_DD_TS_SETUP_SER_PROP_struct; ++ ++ /* DD_TS_SETUP_SER property, TS_BYTE_ORDER field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_LSB 14 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_MASK 0x01 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_DEFAULT 0 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_MSB_FIRST 0 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_BYTE_ORDER_LSB_FIRST 1 ++ ++ /* DD_TS_SETUP_SER property, TS_CLK_INVERT field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_LSB 12 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_MASK 0x01 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_DEFAULT 1 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_NOT_INVERTED 0 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_INVERT_INVERTED 1 ++ ++ /* DD_TS_SETUP_SER property, TS_CLK_SHAPE field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_SHAPE_LSB 10 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_SHAPE_MASK 0x03 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_SHAPE_DEFAULT 3 ++ /* DD_TS_SETUP_SER property, TS_CLK_STRENGTH field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_STRENGTH_LSB 6 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_STRENGTH_MASK 0x0f ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_CLK_STRENGTH_DEFAULT 15 ++ /* DD_TS_SETUP_SER property, TS_DATA_SHAPE field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_SHAPE_LSB 4 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_SHAPE_MASK 0x03 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_SHAPE_DEFAULT 3 ++ /* DD_TS_SETUP_SER property, TS_DATA_STRENGTH field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_STRENGTH_LSB 0 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_STRENGTH_MASK 0x0f ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_DATA_STRENGTH_DEFAULT 15 ++ /* DD_TS_SETUP_SER property, TS_SYNC_DURATION field definition (NO TITLE)*/ ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_LSB 13 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_MASK 0x01 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_DEFAULT 0 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_FIRST_BYTE 0 ++ #define Si2168_DD_TS_SETUP_SER_PROP_TS_SYNC_DURATION_FIRST_BIT 1 ++ ++#endif /* Si2168_DD_TS_SETUP_SER_PROP */ ++ ++/* Si2168 DVBC_ADC_CREST_FACTOR property definition */ ++#define Si2168_DVBC_ADC_CREST_FACTOR_PROP 0x1104 ++ ++#ifdef Si2168_DVBC_ADC_CREST_FACTOR_PROP ++ #define Si2168_DVBC_ADC_CREST_FACTOR_PROP_CODE 0x001104 ++ ++ ++ typedef struct { /* Si2168_DVBC_ADC_CREST_FACTOR_PROP_struct */ ++ unsigned char crest_factor; ++ } Si2168_DVBC_ADC_CREST_FACTOR_PROP_struct; ++ ++ /* DVBC_ADC_CREST_FACTOR property, CREST_FACTOR field definition (NO TITLE)*/ ++ #define Si2168_DVBC_ADC_CREST_FACTOR_PROP_CREST_FACTOR_LSB 0 ++ #define Si2168_DVBC_ADC_CREST_FACTOR_PROP_CREST_FACTOR_MASK 0xff ++ #define Si2168_DVBC_ADC_CREST_FACTOR_PROP_CREST_FACTOR_DEFAULT 112 ++#endif /* Si2168_DVBC_ADC_CREST_FACTOR_PROP */ ++ ++/* Si2168 DVBC_AFC_RANGE property definition */ ++#define Si2168_DVBC_AFC_RANGE_PROP 0x1103 ++ ++#ifdef Si2168_DVBC_AFC_RANGE_PROP ++ #define Si2168_DVBC_AFC_RANGE_PROP_CODE 0x001103 ++ ++ ++ typedef struct { /* Si2168_DVBC_AFC_RANGE_PROP_struct */ ++ unsigned int range_khz; ++ } Si2168_DVBC_AFC_RANGE_PROP_struct; ++ ++ /* DVBC_AFC_RANGE property, RANGE_KHZ field definition (NO TITLE)*/ ++ #define Si2168_DVBC_AFC_RANGE_PROP_RANGE_KHZ_LSB 0 ++ #define Si2168_DVBC_AFC_RANGE_PROP_RANGE_KHZ_MASK 0xffff ++ #define Si2168_DVBC_AFC_RANGE_PROP_RANGE_KHZ_DEFAULT 100 ++#endif /* Si2168_DVBC_AFC_RANGE_PROP */ ++ ++/* Si2168 DVBC_CONSTELLATION property definition */ ++#define Si2168_DVBC_CONSTELLATION_PROP 0x1101 ++ ++#ifdef Si2168_DVBC_CONSTELLATION_PROP ++ #define Si2168_DVBC_CONSTELLATION_PROP_CODE 0x001101 ++ ++ ++ typedef struct { /* Si2168_DVBC_CONSTELLATION_PROP_struct */ ++ unsigned char constellation; ++ } Si2168_DVBC_CONSTELLATION_PROP_struct; ++ ++ /* DVBC_CONSTELLATION property, CONSTELLATION field definition (NO TITLE)*/ ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_LSB 0 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_MASK 0x3f ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_DEFAULT 0 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_AUTO 0 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM16 7 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM32 8 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM64 9 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM128 10 ++ #define Si2168_DVBC_CONSTELLATION_PROP_CONSTELLATION_QAM256 11 ++ ++#endif /* Si2168_DVBC_CONSTELLATION_PROP */ ++ ++/* Si2168 DVBC_SYMBOL_RATE property definition */ ++#define Si2168_DVBC_SYMBOL_RATE_PROP 0x1102 ++ ++#ifdef Si2168_DVBC_SYMBOL_RATE_PROP ++ #define Si2168_DVBC_SYMBOL_RATE_PROP_CODE 0x001102 ++ ++ ++ typedef struct { /* Si2168_DVBC_SYMBOL_RATE_PROP_struct */ ++ unsigned int rate; ++ } Si2168_DVBC_SYMBOL_RATE_PROP_struct; ++ ++ /* DVBC_SYMBOL_RATE property, RATE field definition (NO TITLE)*/ ++ #define Si2168_DVBC_SYMBOL_RATE_PROP_RATE_LSB 0 ++ #define Si2168_DVBC_SYMBOL_RATE_PROP_RATE_MASK 0xffff ++ #define Si2168_DVBC_SYMBOL_RATE_PROP_RATE_DEFAULT 6800 ++#endif /* Si2168_DVBC_SYMBOL_RATE_PROP */ ++ ++ ++ ++/* Si2168 DVBT2_ADC_CREST_FACTOR property definition */ ++#define Si2168_DVBT2_ADC_CREST_FACTOR_PROP 0x1303 ++ ++#ifdef Si2168_DVBT2_ADC_CREST_FACTOR_PROP ++ #define Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CODE 0x001303 ++ ++ ++ typedef struct { /* Si2168_DVBT2_ADC_CREST_FACTOR_PROP_struct */ ++ unsigned char crest_factor; ++ } Si2168_DVBT2_ADC_CREST_FACTOR_PROP_struct; ++ ++ /* DVBT2_ADC_CREST_FACTOR property, CREST_FACTOR field definition (NO TITLE)*/ ++ #define Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CREST_FACTOR_LSB 0 ++ #define Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CREST_FACTOR_MASK 0xff ++ #define Si2168_DVBT2_ADC_CREST_FACTOR_PROP_CREST_FACTOR_DEFAULT 130 ++#endif /* Si2168_DVBT2_ADC_CREST_FACTOR_PROP */ ++ ++/* Si2168 DVBT2_AFC_RANGE property definition */ ++#define Si2168_DVBT2_AFC_RANGE_PROP 0x1301 ++ ++#ifdef Si2168_DVBT2_AFC_RANGE_PROP ++ #define Si2168_DVBT2_AFC_RANGE_PROP_CODE 0x001301 ++ ++ ++ typedef struct { /* Si2168_DVBT2_AFC_RANGE_PROP_struct */ ++ unsigned int range_khz; ++ } Si2168_DVBT2_AFC_RANGE_PROP_struct; ++ ++ /* DVBT2_AFC_RANGE property, RANGE_KHZ field definition (NO TITLE)*/ ++ #define Si2168_DVBT2_AFC_RANGE_PROP_RANGE_KHZ_LSB 0 ++ #define Si2168_DVBT2_AFC_RANGE_PROP_RANGE_KHZ_MASK 0xffff ++ #define Si2168_DVBT2_AFC_RANGE_PROP_RANGE_KHZ_DEFAULT 550 ++#endif /* Si2168_DVBT2_AFC_RANGE_PROP */ ++ ++/* Si2168 DVBT2_FEF_TUNER property definition */ ++#define Si2168_DVBT2_FEF_TUNER_PROP 0x1302 ++ ++#ifdef Si2168_DVBT2_FEF_TUNER_PROP ++ #define Si2168_DVBT2_FEF_TUNER_PROP_CODE 0x001302 ++ ++ ++ typedef struct { /* Si2168_DVBT2_FEF_TUNER_PROP_struct */ ++ unsigned char tuner_delay; ++ unsigned char tuner_freeze_time; ++ unsigned char tuner_unfreeze_time; ++ } Si2168_DVBT2_FEF_TUNER_PROP_struct; ++ ++ /* DVBT2_FEF_TUNER property, TUNER_DELAY field definition (NO TITLE)*/ ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_DELAY_LSB 0 ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_DELAY_MASK 0xff ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_DELAY_DEFAULT 1 ++ /* DVBT2_FEF_TUNER property, TUNER_FREEZE_TIME field definition (NO TITLE)*/ ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_FREEZE_TIME_LSB 8 ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_FREEZE_TIME_MASK 0x0f ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_FREEZE_TIME_DEFAULT 1 ++ /* DVBT2_FEF_TUNER property, TUNER_UNFREEZE_TIME field definition (NO TITLE)*/ ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_UNFREEZE_TIME_LSB 12 ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_UNFREEZE_TIME_MASK 0x0f ++ #define Si2168_DVBT2_FEF_TUNER_PROP_TUNER_UNFREEZE_TIME_DEFAULT 1 ++#endif /* Si2168_DVBT2_FEF_TUNER_PROP */ ++ ++ ++/* Si2168 DVBT_ADC_CREST_FACTOR property definition */ ++#define Si2168_DVBT_ADC_CREST_FACTOR_PROP 0x1203 ++ ++#ifdef Si2168_DVBT_ADC_CREST_FACTOR_PROP ++ #define Si2168_DVBT_ADC_CREST_FACTOR_PROP_CODE 0x001203 ++ ++ ++ typedef struct { /* Si2168_DVBT_ADC_CREST_FACTOR_PROP_struct */ ++ unsigned char crest_factor; ++ } Si2168_DVBT_ADC_CREST_FACTOR_PROP_struct; ++ ++ /* DVBT_ADC_CREST_FACTOR property, CREST_FACTOR field definition (NO TITLE)*/ ++ #define Si2168_DVBT_ADC_CREST_FACTOR_PROP_CREST_FACTOR_LSB 0 ++ #define Si2168_DVBT_ADC_CREST_FACTOR_PROP_CREST_FACTOR_MASK 0xff ++ #define Si2168_DVBT_ADC_CREST_FACTOR_PROP_CREST_FACTOR_DEFAULT 130 ++#endif /* Si2168_DVBT_ADC_CREST_FACTOR_PROP */ ++ ++/* Si2168 DVBT_AFC_RANGE property definition */ ++#define Si2168_DVBT_AFC_RANGE_PROP 0x1202 ++ ++#ifdef Si2168_DVBT_AFC_RANGE_PROP ++ #define Si2168_DVBT_AFC_RANGE_PROP_CODE 0x001202 ++ ++ ++ typedef struct { /* Si2168_DVBT_AFC_RANGE_PROP_struct */ ++ unsigned int range_khz; ++ } Si2168_DVBT_AFC_RANGE_PROP_struct; ++ ++ /* DVBT_AFC_RANGE property, RANGE_KHZ field definition (NO TITLE)*/ ++ #define Si2168_DVBT_AFC_RANGE_PROP_RANGE_KHZ_LSB 0 ++ #define Si2168_DVBT_AFC_RANGE_PROP_RANGE_KHZ_MASK 0xffff ++ #define Si2168_DVBT_AFC_RANGE_PROP_RANGE_KHZ_DEFAULT 550 ++#endif /* Si2168_DVBT_AFC_RANGE_PROP */ ++ ++/* Si2168 DVBT_HIERARCHY property definition */ ++#define Si2168_DVBT_HIERARCHY_PROP 0x1201 ++ ++#ifdef Si2168_DVBT_HIERARCHY_PROP ++ #define Si2168_DVBT_HIERARCHY_PROP_CODE 0x001201 ++ ++ ++ typedef struct { /* Si2168_DVBT_HIERARCHY_PROP_struct */ ++ unsigned char stream; ++ } Si2168_DVBT_HIERARCHY_PROP_struct; ++ ++ /* DVBT_HIERARCHY property, STREAM field definition (NO TITLE)*/ ++ #define Si2168_DVBT_HIERARCHY_PROP_STREAM_LSB 0 ++ #define Si2168_DVBT_HIERARCHY_PROP_STREAM_MASK 0x01 ++ #define Si2168_DVBT_HIERARCHY_PROP_STREAM_DEFAULT 0 ++ #define Si2168_DVBT_HIERARCHY_PROP_STREAM_HP 0 ++ #define Si2168_DVBT_HIERARCHY_PROP_STREAM_LP 1 ++ ++#endif /* Si2168_DVBT_HIERARCHY_PROP */ ++ ++ ++/* Si2168 MASTER_IEN property definition */ ++#define Si2168_MASTER_IEN_PROP 0x0401 ++ ++#ifdef Si2168_MASTER_IEN_PROP ++ #define Si2168_MASTER_IEN_PROP_CODE 0x000401 ++ ++ ++ typedef struct { /* Si2168_MASTER_IEN_PROP_struct */ ++ unsigned char ctsien; ++ unsigned char ddien; ++ unsigned char errien; ++ unsigned char scanien; ++ } Si2168_MASTER_IEN_PROP_struct; ++ ++ /* MASTER_IEN property, CTSIEN field definition (NO TITLE)*/ ++ #define Si2168_MASTER_IEN_PROP_CTSIEN_LSB 7 ++ #define Si2168_MASTER_IEN_PROP_CTSIEN_MASK 0x01 ++ #define Si2168_MASTER_IEN_PROP_CTSIEN_DEFAULT 0 ++ #define Si2168_MASTER_IEN_PROP_CTSIEN_OFF 0 ++ #define Si2168_MASTER_IEN_PROP_CTSIEN_ON 1 ++ ++ /* MASTER_IEN property, DDIEN field definition (NO TITLE)*/ ++ #define Si2168_MASTER_IEN_PROP_DDIEN_LSB 0 ++ #define Si2168_MASTER_IEN_PROP_DDIEN_MASK 0x01 ++ #define Si2168_MASTER_IEN_PROP_DDIEN_DEFAULT 0 ++ #define Si2168_MASTER_IEN_PROP_DDIEN_OFF 0 ++ #define Si2168_MASTER_IEN_PROP_DDIEN_ON 1 ++ ++ /* MASTER_IEN property, ERRIEN field definition (NO TITLE)*/ ++ #define Si2168_MASTER_IEN_PROP_ERRIEN_LSB 6 ++ #define Si2168_MASTER_IEN_PROP_ERRIEN_MASK 0x01 ++ #define Si2168_MASTER_IEN_PROP_ERRIEN_DEFAULT 0 ++ #define Si2168_MASTER_IEN_PROP_ERRIEN_OFF 0 ++ #define Si2168_MASTER_IEN_PROP_ERRIEN_ON 1 ++ ++ /* MASTER_IEN property, SCANIEN field definition (NO TITLE)*/ ++ #define Si2168_MASTER_IEN_PROP_SCANIEN_LSB 1 ++ #define Si2168_MASTER_IEN_PROP_SCANIEN_MASK 0x01 ++ #define Si2168_MASTER_IEN_PROP_SCANIEN_DEFAULT 0 ++ #define Si2168_MASTER_IEN_PROP_SCANIEN_OFF 0 ++ #define Si2168_MASTER_IEN_PROP_SCANIEN_ON 1 ++ ++#endif /* Si2168_MASTER_IEN_PROP */ ++ ++/* Si2168 SCAN_FMAX property definition */ ++#define Si2168_SCAN_FMAX_PROP 0x0304 ++ ++#ifdef Si2168_SCAN_FMAX_PROP ++ #define Si2168_SCAN_FMAX_PROP_CODE 0x000304 ++ ++ ++ typedef struct { /* Si2168_SCAN_FMAX_PROP_struct */ ++ unsigned int scan_fmax; ++ } Si2168_SCAN_FMAX_PROP_struct; ++ ++ /* SCAN_FMAX property, SCAN_FMAX field definition (NO TITLE)*/ ++ #define Si2168_SCAN_FMAX_PROP_SCAN_FMAX_LSB 0 ++ #define Si2168_SCAN_FMAX_PROP_SCAN_FMAX_MASK 0xffff ++ #define Si2168_SCAN_FMAX_PROP_SCAN_FMAX_DEFAULT 0 ++#endif /* Si2168_SCAN_FMAX_PROP */ ++ ++/* Si2168 SCAN_FMIN property definition */ ++#define Si2168_SCAN_FMIN_PROP 0x0303 ++ ++#ifdef Si2168_SCAN_FMIN_PROP ++ #define Si2168_SCAN_FMIN_PROP_CODE 0x000303 ++ ++ ++ typedef struct { /* Si2168_SCAN_FMIN_PROP_struct */ ++ unsigned int scan_fmin; ++ } Si2168_SCAN_FMIN_PROP_struct; ++ ++ /* SCAN_FMIN property, SCAN_FMIN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_FMIN_PROP_SCAN_FMIN_LSB 0 ++ #define Si2168_SCAN_FMIN_PROP_SCAN_FMIN_MASK 0xffff ++ #define Si2168_SCAN_FMIN_PROP_SCAN_FMIN_DEFAULT 0 ++#endif /* Si2168_SCAN_FMIN_PROP */ ++ ++/* Si2168 SCAN_IEN property definition */ ++#define Si2168_SCAN_IEN_PROP 0x0308 ++ ++#ifdef Si2168_SCAN_IEN_PROP ++ #define Si2168_SCAN_IEN_PROP_CODE 0x000308 ++ ++ ++ typedef struct { /* Si2168_SCAN_IEN_PROP_struct */ ++ unsigned char buzien; ++ unsigned char reqien; ++ } Si2168_SCAN_IEN_PROP_struct; ++ ++ /* SCAN_IEN property, BUZIEN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_IEN_PROP_BUZIEN_LSB 0 ++ #define Si2168_SCAN_IEN_PROP_BUZIEN_MASK 0x01 ++ #define Si2168_SCAN_IEN_PROP_BUZIEN_DEFAULT 0 ++ #define Si2168_SCAN_IEN_PROP_BUZIEN_DISABLE 0 ++ #define Si2168_SCAN_IEN_PROP_BUZIEN_ENABLE 1 ++ ++ /* SCAN_IEN property, REQIEN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_IEN_PROP_REQIEN_LSB 1 ++ #define Si2168_SCAN_IEN_PROP_REQIEN_MASK 0x01 ++ #define Si2168_SCAN_IEN_PROP_REQIEN_DEFAULT 0 ++ #define Si2168_SCAN_IEN_PROP_REQIEN_DISABLE 0 ++ #define Si2168_SCAN_IEN_PROP_REQIEN_ENABLE 1 ++ ++#endif /* Si2168_SCAN_IEN_PROP */ ++ ++/* Si2168 SCAN_INT_SENSE property definition */ ++#define Si2168_SCAN_INT_SENSE_PROP 0x0307 ++ ++#ifdef Si2168_SCAN_INT_SENSE_PROP ++ #define Si2168_SCAN_INT_SENSE_PROP_CODE 0x000307 ++ ++ ++ typedef struct { /* Si2168_SCAN_INT_SENSE_PROP_struct */ ++ unsigned char buznegen; ++ unsigned char buzposen; ++ unsigned char reqnegen; ++ unsigned char reqposen; ++ } Si2168_SCAN_INT_SENSE_PROP_struct; ++ ++ /* SCAN_INT_SENSE property, BUZNEGEN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_LSB 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_MASK 0x01 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_DEFAULT 1 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_DISABLE 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZNEGEN_ENABLE 1 ++ ++ /* SCAN_INT_SENSE property, BUZPOSEN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_LSB 8 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_MASK 0x01 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_DEFAULT 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_DISABLE 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_BUZPOSEN_ENABLE 1 ++ ++ /* SCAN_INT_SENSE property, REQNEGEN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_LSB 1 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_MASK 0x01 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_DEFAULT 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_DISABLE 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQNEGEN_ENABLE 1 ++ ++ /* SCAN_INT_SENSE property, REQPOSEN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_LSB 9 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_MASK 0x01 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_DEFAULT 1 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_DISABLE 0 ++ #define Si2168_SCAN_INT_SENSE_PROP_REQPOSEN_ENABLE 1 ++ ++#endif /* Si2168_SCAN_INT_SENSE_PROP */ ++ ++ ++/* Si2168 SCAN_SYMB_RATE_MAX property definition */ ++#define Si2168_SCAN_SYMB_RATE_MAX_PROP 0x0306 ++ ++#ifdef Si2168_SCAN_SYMB_RATE_MAX_PROP ++ #define Si2168_SCAN_SYMB_RATE_MAX_PROP_CODE 0x000306 ++ ++ ++ typedef struct { /* Si2168_SCAN_SYMB_RATE_MAX_PROP_struct */ ++ unsigned int scan_symb_rate_max; ++ } Si2168_SCAN_SYMB_RATE_MAX_PROP_struct; ++ ++ /* SCAN_SYMB_RATE_MAX property, SCAN_SYMB_RATE_MAX field definition (NO TITLE)*/ ++ #define Si2168_SCAN_SYMB_RATE_MAX_PROP_SCAN_SYMB_RATE_MAX_LSB 0 ++ #define Si2168_SCAN_SYMB_RATE_MAX_PROP_SCAN_SYMB_RATE_MAX_MASK 0xffff ++ #define Si2168_SCAN_SYMB_RATE_MAX_PROP_SCAN_SYMB_RATE_MAX_DEFAULT 0 ++#endif /* Si2168_SCAN_SYMB_RATE_MAX_PROP */ ++ ++/* Si2168 SCAN_SYMB_RATE_MIN property definition */ ++#define Si2168_SCAN_SYMB_RATE_MIN_PROP 0x0305 ++ ++#ifdef Si2168_SCAN_SYMB_RATE_MIN_PROP ++ #define Si2168_SCAN_SYMB_RATE_MIN_PROP_CODE 0x000305 ++ ++ ++ typedef struct { /* Si2168_SCAN_SYMB_RATE_MIN_PROP_struct */ ++ unsigned int scan_symb_rate_min; ++ } Si2168_SCAN_SYMB_RATE_MIN_PROP_struct; ++ ++ /* SCAN_SYMB_RATE_MIN property, SCAN_SYMB_RATE_MIN field definition (NO TITLE)*/ ++ #define Si2168_SCAN_SYMB_RATE_MIN_PROP_SCAN_SYMB_RATE_MIN_LSB 0 ++ #define Si2168_SCAN_SYMB_RATE_MIN_PROP_SCAN_SYMB_RATE_MIN_MASK 0xffff ++ #define Si2168_SCAN_SYMB_RATE_MIN_PROP_SCAN_SYMB_RATE_MIN_DEFAULT 0 ++#endif /* Si2168_SCAN_SYMB_RATE_MIN_PROP */ ++ ++/* Si2168 SCAN_TER_CONFIG property definition */ ++#define Si2168_SCAN_TER_CONFIG_PROP 0x0301 ++ ++#ifdef Si2168_SCAN_TER_CONFIG_PROP ++ #define Si2168_SCAN_TER_CONFIG_PROP_CODE 0x000301 ++ ++ ++ typedef struct { /* Si2168_SCAN_TER_CONFIG_PROP_struct */ ++ unsigned char analog_bw; ++ unsigned char mode; ++ unsigned char search_analog; ++ } Si2168_SCAN_TER_CONFIG_PROP_struct; ++ ++ /* SCAN_TER_CONFIG property, ANALOG_BW field definition (NO TITLE)*/ ++ #define Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_LSB 2 ++ #define Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_MASK 0x03 ++ #define Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_DEFAULT 3 ++ #define Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_6MHZ 1 ++ #define Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_7MHZ 2 ++ #define Si2168_SCAN_TER_CONFIG_PROP_ANALOG_BW_8MHZ 3 ++ ++ /* SCAN_TER_CONFIG property, MODE field definition (NO TITLE)*/ ++ #define Si2168_SCAN_TER_CONFIG_PROP_MODE_LSB 0 ++ #define Si2168_SCAN_TER_CONFIG_PROP_MODE_MASK 0x03 ++ #define Si2168_SCAN_TER_CONFIG_PROP_MODE_DEFAULT 0 ++ #define Si2168_SCAN_TER_CONFIG_PROP_MODE_BLIND_SCAN 0 ++ #define Si2168_SCAN_TER_CONFIG_PROP_MODE_MAPPING_SCAN 1 ++ #define Si2168_SCAN_TER_CONFIG_PROP_MODE_BLIND_LOCK 2 ++ ++ /* SCAN_TER_CONFIG property, SEARCH_ANALOG field definition (NO TITLE)*/ ++ #define Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_LSB 4 ++ #define Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_MASK 0x01 ++ #define Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_DEFAULT 0 ++ #define Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_DISABLE 0 ++ #define Si2168_SCAN_TER_CONFIG_PROP_SEARCH_ANALOG_ENABLE 1 ++ ++#endif /* Si2168_SCAN_TER_CONFIG_PROP */ ++ ++ ++/* _properties_defines_insertion_point */ ++ ++/* _properties_struct_insertion_start */ ++ ++ /* --------------------------------------------*/ ++ /* PROPERTIES STRUCT */ ++ /* This stores all property fields */ ++ /* --------------------------------------------*/ ++ typedef struct { ++ #ifdef Si2168_DD_BER_RESOL_PROP ++ Si2168_DD_BER_RESOL_PROP_struct dd_ber_resol; ++ #endif /* Si2168_DD_BER_RESOL_PROP */ ++ #ifdef Si2168_DD_CBER_RESOL_PROP ++ Si2168_DD_CBER_RESOL_PROP_struct dd_cber_resol; ++ #endif /* Si2168_DD_CBER_RESOL_PROP */ ++ ++ #ifdef Si2168_DD_FER_RESOL_PROP ++ Si2168_DD_FER_RESOL_PROP_struct dd_fer_resol; ++ #endif /* Si2168_DD_FER_RESOL_PROP */ ++ #ifdef Si2168_DD_IEN_PROP ++ Si2168_DD_IEN_PROP_struct dd_ien; ++ #endif /* Si2168_DD_IEN_PROP */ ++ #ifdef Si2168_DD_IF_INPUT_FREQ_PROP ++ Si2168_DD_IF_INPUT_FREQ_PROP_struct dd_if_input_freq; ++ #endif /* Si2168_DD_IF_INPUT_FREQ_PROP */ ++ #ifdef Si2168_DD_INT_SENSE_PROP ++ Si2168_DD_INT_SENSE_PROP_struct dd_int_sense; ++ #endif /* Si2168_DD_INT_SENSE_PROP */ ++ #ifdef Si2168_DD_MODE_PROP ++ Si2168_DD_MODE_PROP_struct dd_mode; ++ #endif /* Si2168_DD_MODE_PROP */ ++ #ifdef Si2168_DD_PER_RESOL_PROP ++ Si2168_DD_PER_RESOL_PROP_struct dd_per_resol; ++ #endif /* Si2168_DD_PER_RESOL_PROP */ ++ #ifdef Si2168_DD_RSQ_BER_THRESHOLD_PROP ++ Si2168_DD_RSQ_BER_THRESHOLD_PROP_struct dd_rsq_ber_threshold; ++ #endif /* Si2168_DD_RSQ_BER_THRESHOLD_PROP */ ++ #ifdef Si2168_DD_TS_FREQ_PROP ++ Si2168_DD_TS_FREQ_PROP_struct dd_ts_freq; ++ #endif /* Si2168_DD_TS_FREQ_PROP */ ++ #ifdef Si2168_DD_TS_MODE_PROP ++ Si2168_DD_TS_MODE_PROP_struct dd_ts_mode; ++ #endif /* Si2168_DD_TS_MODE_PROP */ ++ #ifdef Si2168_DD_TS_SETUP_PAR_PROP ++ Si2168_DD_TS_SETUP_PAR_PROP_struct dd_ts_setup_par; ++ #endif /* Si2168_DD_TS_SETUP_PAR_PROP */ ++ #ifdef Si2168_DD_TS_SETUP_SER_PROP ++ Si2168_DD_TS_SETUP_SER_PROP_struct dd_ts_setup_ser; ++ #endif /* Si2168_DD_TS_SETUP_SER_PROP */ ++ #ifdef Si2168_DVBC_ADC_CREST_FACTOR_PROP ++ Si2168_DVBC_ADC_CREST_FACTOR_PROP_struct dvbc_adc_crest_factor; ++ #endif /* Si2168_DVBC_ADC_CREST_FACTOR_PROP */ ++ #ifdef Si2168_DVBC_AFC_RANGE_PROP ++ Si2168_DVBC_AFC_RANGE_PROP_struct dvbc_afc_range; ++ #endif /* Si2168_DVBC_AFC_RANGE_PROP */ ++ #ifdef Si2168_DVBC_CONSTELLATION_PROP ++ Si2168_DVBC_CONSTELLATION_PROP_struct dvbc_constellation; ++ #endif /* Si2168_DVBC_CONSTELLATION_PROP */ ++ #ifdef Si2168_DVBC_SYMBOL_RATE_PROP ++ Si2168_DVBC_SYMBOL_RATE_PROP_struct dvbc_symbol_rate; ++ #endif /* Si2168_DVBC_SYMBOL_RATE_PROP */ ++ ++ ++ #ifdef Si2168_DVBT2_ADC_CREST_FACTOR_PROP ++ Si2168_DVBT2_ADC_CREST_FACTOR_PROP_struct dvbt2_adc_crest_factor; ++ #endif /* Si2168_DVBT2_ADC_CREST_FACTOR_PROP */ ++ #ifdef Si2168_DVBT2_AFC_RANGE_PROP ++ Si2168_DVBT2_AFC_RANGE_PROP_struct dvbt2_afc_range; ++ #endif /* Si2168_DVBT2_AFC_RANGE_PROP */ ++ #ifdef Si2168_DVBT2_FEF_TUNER_PROP ++ Si2168_DVBT2_FEF_TUNER_PROP_struct dvbt2_fef_tuner; ++ #endif /* Si2168_DVBT2_FEF_TUNER_PROP */ ++ ++ #ifdef Si2168_DVBT_ADC_CREST_FACTOR_PROP ++ Si2168_DVBT_ADC_CREST_FACTOR_PROP_struct dvbt_adc_crest_factor; ++ #endif /* Si2168_DVBT_ADC_CREST_FACTOR_PROP */ ++ #ifdef Si2168_DVBT_AFC_RANGE_PROP ++ Si2168_DVBT_AFC_RANGE_PROP_struct dvbt_afc_range; ++ #endif /* Si2168_DVBT_AFC_RANGE_PROP */ ++ #ifdef Si2168_DVBT_HIERARCHY_PROP ++ Si2168_DVBT_HIERARCHY_PROP_struct dvbt_hierarchy; ++ #endif /* Si2168_DVBT_HIERARCHY_PROP */ ++ ++ #ifdef Si2168_MASTER_IEN_PROP ++ Si2168_MASTER_IEN_PROP_struct master_ien; ++ #endif /* Si2168_MASTER_IEN_PROP */ ++ #ifdef Si2168_SCAN_FMAX_PROP ++ Si2168_SCAN_FMAX_PROP_struct scan_fmax; ++ #endif /* Si2168_SCAN_FMAX_PROP */ ++ #ifdef Si2168_SCAN_FMIN_PROP ++ Si2168_SCAN_FMIN_PROP_struct scan_fmin; ++ #endif /* Si2168_SCAN_FMIN_PROP */ ++ #ifdef Si2168_SCAN_IEN_PROP ++ Si2168_SCAN_IEN_PROP_struct scan_ien; ++ #endif /* Si2168_SCAN_IEN_PROP */ ++ #ifdef Si2168_SCAN_INT_SENSE_PROP ++ Si2168_SCAN_INT_SENSE_PROP_struct scan_int_sense; ++ #endif /* Si2168_SCAN_INT_SENSE_PROP */ ++ ++ #ifdef Si2168_SCAN_SYMB_RATE_MAX_PROP ++ Si2168_SCAN_SYMB_RATE_MAX_PROP_struct scan_symb_rate_max; ++ #endif /* Si2168_SCAN_SYMB_RATE_MAX_PROP */ ++ #ifdef Si2168_SCAN_SYMB_RATE_MIN_PROP ++ Si2168_SCAN_SYMB_RATE_MIN_PROP_struct scan_symb_rate_min; ++ #endif /* Si2168_SCAN_SYMB_RATE_MIN_PROP */ ++ #ifdef Si2168_SCAN_TER_CONFIG_PROP ++ Si2168_SCAN_TER_CONFIG_PROP_struct scan_ter_config; ++ #endif /* Si2168_SCAN_TER_CONFIG_PROP */ ++ ++ } Si2168_PropObj; ++/* _properties_struct_insertion_point */ ++ ++#endif /* _Si2168_PROPERTIES_H_ */ ++ ++ ++ ++ ++ +diff -urN a/drivers/media/dvb-frontends/si2168_si2158.c b/drivers/media/dvb-frontends/si2168_si2158.c +--- a/drivers/media/dvb-frontends/si2168_si2158.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/dvb-frontends/si2168_si2158.c 2013-02-17 17:52:14.000000000 +0800 +@@ -0,0 +1,2294 @@ ++/****************************************************************/ ++#include "si2158_firmware_0_E_build_15.h" ++#include "si2158_firmware_2_0_build_x.h" ++#include "si2168_priv.h" ++ ++/************************************************************************************************************************ ++ NAME: Si2158_XoutOn ++ Parameter: Pointer to Si2158 Context (I2C address) ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_XoutOn (L1_Si2158_Context *api) ++{ ++ int return_code; ++ SiTRACE("Si2158_XoutOn: Turning Xout ON\n"); ++ ++ if ((return_code = Si2158_L1_CONFIG_CLOCKS(api, ++ Si2158_CONFIG_CLOCKS_CMD_SUBCODE_CODE, ++ Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_XTAL, ++ Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_EN_XOUT)) != NO_Si2158_ERROR) ++ return return_code; ++ ++ return NO_Si2158_ERROR; ++} ++ ++ /************************************************************************************************************************ ++ NAME: Si2158_XoutOff ++ Parameter: Pointer to Si2158 Context (I2C address) ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_XoutOff (L1_Si2158_Context *api) ++{ ++ int return_code; ++ SiTRACE("Si2158_XoutOff: Turning Xout OFF\n"); ++ if ((return_code = Si2158_L1_CONFIG_CLOCKS(api, ++ Si2158_CONFIG_CLOCKS_CMD_SUBCODE_CODE, ++ Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_XTAL, ++ Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_DIS_XOUT)) != NO_Si2158_ERROR) ++ ++ return return_code; ++ ++ return NO_Si2158_ERROR; ++} ++/*********************************************************************************************************************** ++ Si2158_CurrentResponseStatus function ++ Use: status checking function ++ Used to fill the Si2158_COMMON_REPLY_struct members with the ptDataBuffer byte's bits ++ Comments: The status byte definition being identical for all commands, ++ using this function to fill the status structure helps reducing the code size ++ Parameter: ptDataBuffer a single byte received when reading a command's response (the first byte) ++ Returns: 0 if the err bit (bit 6) is unset, 1 otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2158_CurrentResponseStatus (L1_Si2158_Context *api, unsigned char ptDataBuffer) ++{ ++/* _status_code_insertion_start */ ++ api->status->tunint = ((ptDataBuffer >> 0 ) & 0x01); ++ api->status->atvint = ((ptDataBuffer >> 1 ) & 0x01); ++ api->status->dtvint = ((ptDataBuffer >> 2 ) & 0x01); ++ api->status->err = ((ptDataBuffer >> 6 ) & 0x01); ++ api->status->cts = ((ptDataBuffer >> 7 ) & 0x01); ++/* _status_code_insertion_point */ ++ return (api->status->err ? ERROR_Si2158_ERR : NO_Si2158_ERROR); ++} ++ ++/*********************************************************************************************************************** ++ Si2158_pollForResponse function ++ Use: command response retrieval function ++ Used to retrieve the command response in the provided buffer ++ Comments: The status byte definition being identical for all commands, ++ using this function to fill the status structure helps reducing the code size ++ max timeout = 1000 ms ++ ++ Parameter: nbBytes the number of response bytes to read ++ Parameter: pByteBuffer a buffer into which bytes will be stored ++ Returns: 0 if no error, an error code otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2158_pollForResponse (L1_Si2158_Context *api, unsigned int nbBytes, unsigned char *pByteBuffer) ++{ ++ u32 ulCount, ulTick, ulDelay; ++ ulCount = 0; ++ ulTick = 50; ++ ulDelay = 1000/ulTick; ++ ++ //start_time = system_time(); ++ ++ //while (system_time() - start_time <1000) { /* wait a maximum of 1000ms */ ++ while(ulCount <= ulTick) { ++ if ((unsigned int)L0_ReadCommandBytes(api->i2c, nbBytes, pByteBuffer) != nbBytes) { ++ SiTRACE("Si2158_pollForResponse ERROR reading byte 0!\n"); ++ return ERROR_Si2158_POLLING_RESPONSE; ++ } ++ /* return response err flag if CTS set */ ++ if (pByteBuffer[0] & 0x80) { ++ return Si2158_CurrentResponseStatus(api, pByteBuffer[0]); ++ } ++ delayMS(ulDelay); ++ ulCount++; ++ } ++ ++ SiTRACE("Si2158_pollForResponse ERROR CTS Timeout!\n"); ++ return ERROR_Si2158_CTS_TIMEOUT; ++} ++/*********************************************************************************************************************** ++ Si2158_pollForCTS function ++ Use: CTS checking function ++ Used to check the CTS bit until it is set before sending the next command ++ Comments: The status byte definition being identical for all commands, ++ using this function to fill the status structure helps reducing the code size ++ max timeout = 1000 ms ++ ++ Returns: 1 if the CTS bit is set, 0 otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2158_pollForCTS (L1_Si2158_Context *api) ++{ ++ unsigned char rspByteBuffer[1]; ++ u32 ulCount, ulTick, ulDelay; ++ ulCount = 0; ++ ulTick = 50; ++ ulDelay = 1000/ulTick; ++ //start_time = system_time(); ++ ++ //while (system_time() - start_time <1000) { /* wait a maximum of 1000ms */ ++ while(ulCount <= ulTick) { ++ if (L0_ReadCommandBytes(api->i2c, 1, rspByteBuffer) != 1) { ++ SiTRACE("Si2158_pollForCTS ERROR reading byte 0!\n"); ++ return ERROR_Si2158_POLLING_CTS; ++ } ++ /* return OK if CTS set */ ++ if (rspByteBuffer[0] & 0x80) { ++ return NO_Si2158_ERROR; ++ } ++ delayMS(ulDelay); ++ ulCount++; ++ } ++ ++ SiTRACE("Si2158_pollForCTS ERROR CTS Timeout!\n"); ++ return ERROR_Si2158_CTS_TIMEOUT; ++} ++ ++#ifdef Si2158_CONFIG_CLOCKS_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_CONFIG_CLOCKS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_CONFIG_CLOCKS (L1_Si2158_Context *api, ++ unsigned char subcode, ++ unsigned char clock_mode, ++ unsigned char en_xout) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[3]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->config_clocks.STATUS = api->status; ++ ++ SiTRACE("Si2158 CONFIG_CLOCKS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((subcode > Si2158_CONFIG_CLOCKS_CMD_SUBCODE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("SUBCODE %d " , subcode ); ++ if ((clock_mode > Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CLOCK_MODE %d ", clock_mode ); ++ if ((en_xout > Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("EN_XOUT %d " , en_xout ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_CONFIG_CLOCKS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( subcode & Si2158_CONFIG_CLOCKS_CMD_SUBCODE_MASK ) << Si2158_CONFIG_CLOCKS_CMD_SUBCODE_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( clock_mode & Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_MASK ) << Si2158_CONFIG_CLOCKS_CMD_CLOCK_MODE_LSB| ++ ( en_xout & Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_MASK ) << Si2158_CONFIG_CLOCKS_CMD_EN_XOUT_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 3, cmdByteBuffer) != 3) { ++ SiTRACE("Error writing CONFIG_CLOCKS bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling CONFIG_CLOCKS response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_CONFIG_CLOCKS_CMD */ ++ ++#ifdef Si2158_DTV_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_DTV_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_DTV_STATUS (L1_Si2158_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[4]; ++ api->rsp->dtv_status.STATUS = api->status; ++ ++ SiTRACE("Si2158 DTV_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2158_DTV_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_DTV_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2158_DTV_STATUS_CMD_INTACK_MASK ) << Si2158_DTV_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing DTV_STATUS bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 4, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DTV_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->dtv_status.chlint = (( ( (rspByteBuffer[1] )) >> Si2158_DTV_STATUS_RESPONSE_CHLINT_LSB ) & Si2158_DTV_STATUS_RESPONSE_CHLINT_MASK ); ++ api->rsp->dtv_status.chl = (( ( (rspByteBuffer[2] )) >> Si2158_DTV_STATUS_RESPONSE_CHL_LSB ) & Si2158_DTV_STATUS_RESPONSE_CHL_MASK ); ++ api->rsp->dtv_status.bw = (( ( (rspByteBuffer[3] )) >> Si2158_DTV_STATUS_RESPONSE_BW_LSB ) & Si2158_DTV_STATUS_RESPONSE_BW_MASK ); ++ api->rsp->dtv_status.modulation = (( ( (rspByteBuffer[3] )) >> Si2158_DTV_STATUS_RESPONSE_MODULATION_LSB ) & Si2158_DTV_STATUS_RESPONSE_MODULATION_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_DTV_STATUS_CMD */ ++ ++#ifdef Si2158_ATV_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_ATV_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_ATV_STATUS (L1_Si2158_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[9]; ++ api->rsp->atv_status.STATUS = api->status; ++ ++ SiTRACE("Si2158 ATV_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2158_ATV_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_ATV_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2158_ATV_STATUS_CMD_INTACK_MASK ) << Si2158_ATV_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing ATV_STATUS bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 9, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling ATV_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->atv_status.chlint = (( ( (rspByteBuffer[1] )) >> Si2158_ATV_STATUS_RESPONSE_CHLINT_LSB ) & Si2158_ATV_STATUS_RESPONSE_CHLINT_MASK ); ++ api->rsp->atv_status.pclint = (( ( (rspByteBuffer[1] )) >> Si2158_ATV_STATUS_RESPONSE_PCLINT_LSB ) & Si2158_ATV_STATUS_RESPONSE_PCLINT_MASK ); ++ api->rsp->atv_status.chl = (( ( (rspByteBuffer[2] )) >> Si2158_ATV_STATUS_RESPONSE_CHL_LSB ) & Si2158_ATV_STATUS_RESPONSE_CHL_MASK ); ++ api->rsp->atv_status.pcl = (( ( (rspByteBuffer[2] )) >> Si2158_ATV_STATUS_RESPONSE_PCL_LSB ) & Si2158_ATV_STATUS_RESPONSE_PCL_MASK ); ++ api->rsp->atv_status.afc_freq = (((( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2158_ATV_STATUS_RESPONSE_AFC_FREQ_LSB ) & Si2158_ATV_STATUS_RESPONSE_AFC_FREQ_MASK) <>Si2158_ATV_STATUS_RESPONSE_AFC_FREQ_SHIFT ); ++ api->rsp->atv_status.video_sys = (( ( (rspByteBuffer[8] )) >> Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_LSB ) & Si2158_ATV_STATUS_RESPONSE_VIDEO_SYS_MASK ); ++ api->rsp->atv_status.color = (( ( (rspByteBuffer[8] )) >> Si2158_ATV_STATUS_RESPONSE_COLOR_LSB ) & Si2158_ATV_STATUS_RESPONSE_COLOR_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_ATV_STATUS_CMD */ ++ ++#ifdef Si2158_TUNER_STATUS_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_TUNER_STATUS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_TUNER_STATUS (L1_Si2158_Context *api, ++ unsigned char intack) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[12]; ++ api->rsp->tuner_status.STATUS = api->status; ++ ++ SiTRACE("Si2158 TUNER_STATUS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((intack > Si2158_TUNER_STATUS_CMD_INTACK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("INTACK %d ", intack ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_TUNER_STATUS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( intack & Si2158_TUNER_STATUS_CMD_INTACK_MASK ) << Si2158_TUNER_STATUS_CMD_INTACK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing TUNER_STATUS bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 12, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling TUNER_STATUS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->tuner_status.tcint = (( ( (rspByteBuffer[1] )) >> Si2158_TUNER_STATUS_RESPONSE_TCINT_LSB ) & Si2158_TUNER_STATUS_RESPONSE_TCINT_MASK ); ++ api->rsp->tuner_status.rssilint = (( ( (rspByteBuffer[1] )) >> Si2158_TUNER_STATUS_RESPONSE_RSSILINT_LSB ) & Si2158_TUNER_STATUS_RESPONSE_RSSILINT_MASK ); ++ api->rsp->tuner_status.rssihint = (( ( (rspByteBuffer[1] )) >> Si2158_TUNER_STATUS_RESPONSE_RSSIHINT_LSB ) & Si2158_TUNER_STATUS_RESPONSE_RSSIHINT_MASK ); ++ api->rsp->tuner_status.tc = (( ( (rspByteBuffer[2] )) >> Si2158_TUNER_STATUS_RESPONSE_TC_LSB ) & Si2158_TUNER_STATUS_RESPONSE_TC_MASK ); ++ api->rsp->tuner_status.rssil = (( ( (rspByteBuffer[2] )) >> Si2158_TUNER_STATUS_RESPONSE_RSSIL_LSB ) & Si2158_TUNER_STATUS_RESPONSE_RSSIL_MASK ); ++ api->rsp->tuner_status.rssih = (( ( (rspByteBuffer[2] )) >> Si2158_TUNER_STATUS_RESPONSE_RSSIH_LSB ) & Si2158_TUNER_STATUS_RESPONSE_RSSIH_MASK ); ++ api->rsp->tuner_status.rssi = (((( ( (rspByteBuffer[3] )) >> Si2158_TUNER_STATUS_RESPONSE_RSSI_LSB ) & Si2158_TUNER_STATUS_RESPONSE_RSSI_MASK) <>Si2158_TUNER_STATUS_RESPONSE_RSSI_SHIFT ); ++ api->rsp->tuner_status.freq = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 ) | (rspByteBuffer[6] << 16 ) | (rspByteBuffer[7] << 24 )) >> Si2158_TUNER_STATUS_RESPONSE_FREQ_LSB ) & Si2158_TUNER_STATUS_RESPONSE_FREQ_MASK ); ++ api->rsp->tuner_status.mode = (( ( (rspByteBuffer[8] )) >> Si2158_TUNER_STATUS_RESPONSE_MODE_LSB ) & Si2158_TUNER_STATUS_RESPONSE_MODE_MASK ); ++ api->rsp->tuner_status.vco_code = (((( ( (rspByteBuffer[10] ) | (rspByteBuffer[11] << 8 )) >> Si2158_TUNER_STATUS_RESPONSE_VCO_CODE_LSB ) & Si2158_TUNER_STATUS_RESPONSE_VCO_CODE_MASK) <>Si2158_TUNER_STATUS_RESPONSE_VCO_CODE_SHIFT ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_TUNER_STATUS_CMD */ ++#ifdef Si2158_STANDBY_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_STANDBY COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_STANDBY (L1_Si2158_Context *api, ++ unsigned char type) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->standby.STATUS = api->status; ++ ++ SiTRACE("Si2158 STANDBY "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((type > Si2158_STANDBY_CMD_TYPE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("TYPE %d ", type ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_STANDBY_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( type & Si2158_STANDBY_CMD_TYPE_MASK ) << Si2158_STANDBY_CMD_TYPE_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing STANDBY bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling STANDBY response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_STANDBY_CMD */ ++#ifdef Si2158_SET_PROPERTY_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_SET_PROPERTY COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_SET_PROPERTY (L1_Si2158_Context *api, ++ unsigned char reserved, ++ unsigned int prop, ++ unsigned int data) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[6]; ++ unsigned char rspByteBuffer[4]; ++ api->rsp->set_property.STATUS = api->status; ++ ++ SiTRACE("Si2158 SET_PROPERTY "); ++ #ifdef DEBUG_RANGE_CHECK ++ SiTRACE("RESERVED %d ", reserved ); ++ SiTRACE("PROP %d " , prop ); ++ SiTRACE("DATA %d " , data ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_SET_PROPERTY_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( reserved & Si2158_SET_PROPERTY_CMD_RESERVED_MASK ) << Si2158_SET_PROPERTY_CMD_RESERVED_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( prop & Si2158_SET_PROPERTY_CMD_PROP_MASK ) << Si2158_SET_PROPERTY_CMD_PROP_LSB ); ++ cmdByteBuffer[3] = (unsigned char) ((( prop & Si2158_SET_PROPERTY_CMD_PROP_MASK ) << Si2158_SET_PROPERTY_CMD_PROP_LSB )>>8); ++ cmdByteBuffer[4] = (unsigned char) ( ( data & Si2158_SET_PROPERTY_CMD_DATA_MASK ) << Si2158_SET_PROPERTY_CMD_DATA_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ((( data & Si2158_SET_PROPERTY_CMD_DATA_MASK ) << Si2158_SET_PROPERTY_CMD_DATA_LSB )>>8); ++ ++ if (L0_WriteCommandBytes(api->i2c, 6, cmdByteBuffer) != 6) { ++ SiTRACE("Error writing SET_PROPERTY bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 4, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling SET_PROPERTY response\n"); ++ return error_code; ++ } ++ ++ api->rsp->set_property.reserved = (( ( (rspByteBuffer[1] )) >> Si2158_SET_PROPERTY_RESPONSE_RESERVED_LSB ) & Si2158_SET_PROPERTY_RESPONSE_RESERVED_MASK ); ++ api->rsp->set_property.data = (( ( (rspByteBuffer[2] ) | (rspByteBuffer[3] << 8 )) >> Si2158_SET_PROPERTY_RESPONSE_DATA_LSB ) & Si2158_SET_PROPERTY_RESPONSE_DATA_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_SET_PROPERTY_CMD */ ++#ifdef Si2158_AGC_OVERRIDE_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_AGC_OVERRIDE COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_AGC_OVERRIDE (L1_Si2158_Context *api, ++ unsigned char force_max_gain, ++ unsigned char force_top_gain) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->agc_override.STATUS = api->status; ++ ++ SiTRACE("Si2158 AGC_OVERRIDE "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((force_max_gain > Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FORCE_MAX_GAIN %d ", force_max_gain ); ++ if ((force_top_gain > Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FORCE_TOP_GAIN %d ", force_top_gain ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_AGC_OVERRIDE_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( force_max_gain & Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_MASK ) << Si2158_AGC_OVERRIDE_CMD_FORCE_MAX_GAIN_LSB| ++ ( force_top_gain & Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_MASK ) << Si2158_AGC_OVERRIDE_CMD_FORCE_TOP_GAIN_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing AGC_OVERRIDE bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling AGC_OVERRIDE response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_AGC_OVERRIDE_CMD */ ++#ifdef Si2158_ATV_CW_TEST_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_ATV_CW_TEST COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_ATV_CW_TEST (L1_Si2158_Context *api, ++ unsigned char pc_lock) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->atv_cw_test.STATUS = api->status; ++ ++ SiTRACE("Si2158 ATV_CW_TEST "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((pc_lock > Si2158_ATV_CW_TEST_CMD_PC_LOCK_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PC_LOCK %d ", pc_lock ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_ATV_CW_TEST_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( pc_lock & Si2158_ATV_CW_TEST_CMD_PC_LOCK_MASK ) << Si2158_ATV_CW_TEST_CMD_PC_LOCK_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing ATV_CW_TEST bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling ATV_CW_TEST response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_ATV_CW_TEST_CMD */ ++#ifdef Si2158_ATV_RESTART_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_ATV_RESTART COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_ATV_RESTART (L1_Si2158_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->atv_restart.STATUS = api->status; ++ ++ SiTRACE("Si2158 ATV_RESTART "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_ATV_RESTART_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing ATV_RESTART bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling ATV_RESTART response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_ATV_RESTART_CMD */ ++#ifdef Si2158_CONFIG_PINS_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_CONFIG_PINS COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_CONFIG_PINS (L1_Si2158_Context *api, ++ unsigned char gpio1_mode, ++ unsigned char gpio1_read, ++ unsigned char gpio2_mode, ++ unsigned char gpio2_read, ++ unsigned char reserved1, ++ unsigned char reserved2, ++ unsigned char reserved3) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[6]; ++ unsigned char rspByteBuffer[6]; ++ api->rsp->config_pins.STATUS = api->status; ++ ++ SiTRACE("Si2158 CONFIG_PINS "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((gpio1_mode > Si2158_CONFIG_PINS_CMD_GPIO1_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO1_MODE %d ", gpio1_mode ); ++ if ((gpio1_read > Si2158_CONFIG_PINS_CMD_GPIO1_READ_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO1_READ %d ", gpio1_read ); ++ if ((gpio2_mode > Si2158_CONFIG_PINS_CMD_GPIO2_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO2_MODE %d ", gpio2_mode ); ++ if ((gpio2_read > Si2158_CONFIG_PINS_CMD_GPIO2_READ_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("GPIO2_READ %d ", gpio2_read ); ++ if ((reserved1 > Si2158_CONFIG_PINS_CMD_RESERVED1_MAX ) || (reserved1 < Si2158_CONFIG_PINS_CMD_RESERVED1_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED1 %d " , reserved1 ); ++ if ((reserved2 > Si2158_CONFIG_PINS_CMD_RESERVED2_MAX ) || (reserved2 < Si2158_CONFIG_PINS_CMD_RESERVED2_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED2 %d " , reserved2 ); ++ if ((reserved3 > Si2158_CONFIG_PINS_CMD_RESERVED3_MAX ) || (reserved3 < Si2158_CONFIG_PINS_CMD_RESERVED3_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED3 %d " , reserved3 ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_CONFIG_PINS_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( gpio1_mode & Si2158_CONFIG_PINS_CMD_GPIO1_MODE_MASK ) << Si2158_CONFIG_PINS_CMD_GPIO1_MODE_LSB| ++ ( gpio1_read & Si2158_CONFIG_PINS_CMD_GPIO1_READ_MASK ) << Si2158_CONFIG_PINS_CMD_GPIO1_READ_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( gpio2_mode & Si2158_CONFIG_PINS_CMD_GPIO2_MODE_MASK ) << Si2158_CONFIG_PINS_CMD_GPIO2_MODE_LSB| ++ ( gpio2_read & Si2158_CONFIG_PINS_CMD_GPIO2_READ_MASK ) << Si2158_CONFIG_PINS_CMD_GPIO2_READ_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( reserved1 & Si2158_CONFIG_PINS_CMD_RESERVED1_MASK ) << Si2158_CONFIG_PINS_CMD_RESERVED1_LSB ); ++ cmdByteBuffer[4] = (unsigned char) ( ( reserved2 & Si2158_CONFIG_PINS_CMD_RESERVED2_MASK ) << Si2158_CONFIG_PINS_CMD_RESERVED2_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ( ( reserved3 & Si2158_CONFIG_PINS_CMD_RESERVED3_MASK ) << Si2158_CONFIG_PINS_CMD_RESERVED3_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 6, cmdByteBuffer) != 6) { ++ SiTRACE("Error writing CONFIG_PINS bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 6, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling CONFIG_PINS response\n"); ++ return error_code; ++ } ++ ++ api->rsp->config_pins.gpio1_mode = (( ( (rspByteBuffer[1] )) >> Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_LSB ) & Si2158_CONFIG_PINS_RESPONSE_GPIO1_MODE_MASK ); ++ api->rsp->config_pins.gpio1_state = (( ( (rspByteBuffer[1] )) >> Si2158_CONFIG_PINS_RESPONSE_GPIO1_STATE_LSB ) & Si2158_CONFIG_PINS_RESPONSE_GPIO1_STATE_MASK ); ++ api->rsp->config_pins.gpio2_mode = (( ( (rspByteBuffer[2] )) >> Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_LSB ) & Si2158_CONFIG_PINS_RESPONSE_GPIO2_MODE_MASK ); ++ api->rsp->config_pins.gpio2_state = (( ( (rspByteBuffer[2] )) >> Si2158_CONFIG_PINS_RESPONSE_GPIO2_STATE_LSB ) & Si2158_CONFIG_PINS_RESPONSE_GPIO2_STATE_MASK ); ++ api->rsp->config_pins.reserved1 = (( ( (rspByteBuffer[3] )) >> Si2158_CONFIG_PINS_RESPONSE_RESERVED1_LSB ) & Si2158_CONFIG_PINS_RESPONSE_RESERVED1_MASK ); ++ api->rsp->config_pins.reserved2 = (( ( (rspByteBuffer[4] )) >> Si2158_CONFIG_PINS_RESPONSE_RESERVED2_LSB ) & Si2158_CONFIG_PINS_RESPONSE_RESERVED2_MASK ); ++ api->rsp->config_pins.reserved3 = (( ( (rspByteBuffer[5] )) >> Si2158_CONFIG_PINS_RESPONSE_RESERVED3_LSB ) & Si2158_CONFIG_PINS_RESPONSE_RESERVED3_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_CONFIG_PINS_CMD */ ++#ifdef Si2158_DTV_RESTART_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_DTV_RESTART COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_DTV_RESTART (L1_Si2158_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->dtv_restart.STATUS = api->status; ++ ++ SiTRACE("Si2158 DTV_RESTART "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_DTV_RESTART_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing DTV_RESTART bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling DTV_RESTART response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_DTV_RESTART_CMD */ ++#ifdef Si2158_EXIT_BOOTLOADER_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_EXIT_BOOTLOADER COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_EXIT_BOOTLOADER (L1_Si2158_Context *api, ++ unsigned char func, ++ unsigned char ctsien) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[2]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->exit_bootloader.STATUS = api->status; ++ ++ SiTRACE("Si2158 EXIT_BOOTLOADER "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((func > Si2158_EXIT_BOOTLOADER_CMD_FUNC_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FUNC %d " , func ); ++ if ((ctsien > Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CTSIEN %d ", ctsien ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_EXIT_BOOTLOADER_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( func & Si2158_EXIT_BOOTLOADER_CMD_FUNC_MASK ) << Si2158_EXIT_BOOTLOADER_CMD_FUNC_LSB | ++ ( ctsien & Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_MASK ) << Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 2, cmdByteBuffer) != 2) { ++ SiTRACE("Error writing EXIT_BOOTLOADER bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling EXIT_BOOTLOADER response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_EXIT_BOOTLOADER_CMD */ ++#ifdef Si2158_FINE_TUNE_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_FINE_TUNE COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_FINE_TUNE (L1_Si2158_Context *api, ++ unsigned char persistence, ++ unsigned char apply_to_lif, ++ int offset_500hz) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[4]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->fine_tune.STATUS = api->status; ++ ++ SiTRACE("Si2158 FINE_TUNE "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((persistence > Si2158_FINE_TUNE_CMD_PERSISTENCE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PERSISTENCE %d " , persistence ); ++ if ((apply_to_lif > Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("APPLY_TO_LIF %d ", apply_to_lif ); ++ if ((offset_500hz > Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MAX) || (offset_500hz < Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("OFFSET_500HZ %d ", offset_500hz ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_FINE_TUNE_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( persistence & Si2158_FINE_TUNE_CMD_PERSISTENCE_MASK ) << Si2158_FINE_TUNE_CMD_PERSISTENCE_LSB | ++ ( apply_to_lif & Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_MASK ) << Si2158_FINE_TUNE_CMD_APPLY_TO_LIF_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( offset_500hz & Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MASK ) << Si2158_FINE_TUNE_CMD_OFFSET_500HZ_LSB); ++ cmdByteBuffer[3] = (unsigned char) ((( offset_500hz & Si2158_FINE_TUNE_CMD_OFFSET_500HZ_MASK ) << Si2158_FINE_TUNE_CMD_OFFSET_500HZ_LSB)>>8); ++ ++ if (L0_WriteCommandBytes(api->i2c, 4, cmdByteBuffer) != 4) { ++ SiTRACE("Error writing FINE_TUNE bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling FINE_TUNE response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_FINE_TUNE_CMD */ ++#ifdef Si2158_GET_PROPERTY_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_GET_PROPERTY COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_GET_PROPERTY (L1_Si2158_Context *api, ++ unsigned char reserved, ++ unsigned int prop) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[4]; ++ unsigned char rspByteBuffer[4]; ++ api->rsp->get_property.STATUS = api->status; ++ ++ SiTRACE("Si2158 GET_PROPERTY "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((reserved > Si2158_GET_PROPERTY_CMD_RESERVED_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED %d ", reserved ); ++ SiTRACE("PROP %d " , prop ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_GET_PROPERTY_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( reserved & Si2158_GET_PROPERTY_CMD_RESERVED_MASK ) << Si2158_GET_PROPERTY_CMD_RESERVED_LSB); ++ cmdByteBuffer[2] = (unsigned char) ( ( prop & Si2158_GET_PROPERTY_CMD_PROP_MASK ) << Si2158_GET_PROPERTY_CMD_PROP_LSB ); ++ cmdByteBuffer[3] = (unsigned char) ((( prop & Si2158_GET_PROPERTY_CMD_PROP_MASK ) << Si2158_GET_PROPERTY_CMD_PROP_LSB )>>8); ++ ++ if (L0_WriteCommandBytes(api->i2c, 4, cmdByteBuffer) != 4) { ++ SiTRACE("Error writing GET_PROPERTY bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 4, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling GET_PROPERTY response\n"); ++ return error_code; ++ } ++ ++ api->rsp->get_property.reserved = (( ( (rspByteBuffer[1] )) >> Si2158_GET_PROPERTY_RESPONSE_RESERVED_LSB ) & Si2158_GET_PROPERTY_RESPONSE_RESERVED_MASK ); ++ api->rsp->get_property.data = (( ( (rspByteBuffer[2] ) | (rspByteBuffer[3] << 8 )) >> Si2158_GET_PROPERTY_RESPONSE_DATA_LSB ) & Si2158_GET_PROPERTY_RESPONSE_DATA_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_GET_PROPERTY_CMD */ ++#ifdef Si2158_GET_REV_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_GET_REV COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_GET_REV (L1_Si2158_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[10]; ++ api->rsp->get_rev.STATUS = api->status; ++ ++ SiTRACE("Si2158 GET_REV "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_GET_REV_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing GET_REV bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 10, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling GET_REV response\n"); ++ return error_code; ++ } ++ ++ api->rsp->get_rev.pn = (( ( (rspByteBuffer[1] )) >> Si2158_GET_REV_RESPONSE_PN_LSB ) & Si2158_GET_REV_RESPONSE_PN_MASK ); ++ api->rsp->get_rev.fwmajor = (( ( (rspByteBuffer[2] )) >> Si2158_GET_REV_RESPONSE_FWMAJOR_LSB ) & Si2158_GET_REV_RESPONSE_FWMAJOR_MASK ); ++ api->rsp->get_rev.fwminor = (( ( (rspByteBuffer[3] )) >> Si2158_GET_REV_RESPONSE_FWMINOR_LSB ) & Si2158_GET_REV_RESPONSE_FWMINOR_MASK ); ++ api->rsp->get_rev.patch = (( ( (rspByteBuffer[4] ) | (rspByteBuffer[5] << 8 )) >> Si2158_GET_REV_RESPONSE_PATCH_LSB ) & Si2158_GET_REV_RESPONSE_PATCH_MASK ); ++ api->rsp->get_rev.cmpmajor = (( ( (rspByteBuffer[6] )) >> Si2158_GET_REV_RESPONSE_CMPMAJOR_LSB ) & Si2158_GET_REV_RESPONSE_CMPMAJOR_MASK ); ++ api->rsp->get_rev.cmpminor = (( ( (rspByteBuffer[7] )) >> Si2158_GET_REV_RESPONSE_CMPMINOR_LSB ) & Si2158_GET_REV_RESPONSE_CMPMINOR_MASK ); ++ api->rsp->get_rev.cmpbuild = (( ( (rspByteBuffer[8] )) >> Si2158_GET_REV_RESPONSE_CMPBUILD_LSB ) & Si2158_GET_REV_RESPONSE_CMPBUILD_MASK ); ++ api->rsp->get_rev.chiprev = (( ( (rspByteBuffer[9] )) >> Si2158_GET_REV_RESPONSE_CHIPREV_LSB ) & Si2158_GET_REV_RESPONSE_CHIPREV_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_GET_REV_CMD */ ++#ifdef Si2158_PART_INFO_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_PART_INFO COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_PART_INFO (L1_Si2158_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[13]; ++ api->rsp->part_info.STATUS = api->status; ++ ++ SiTRACE("Si2158 PART_INFO "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_PART_INFO_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing PART_INFO bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 13, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling PART_INFO response\n"); ++ return error_code; ++ } ++ ++ api->rsp->part_info.chiprev = (( ( (rspByteBuffer[1] )) >> Si2158_PART_INFO_RESPONSE_CHIPREV_LSB ) & Si2158_PART_INFO_RESPONSE_CHIPREV_MASK ); ++ api->rsp->part_info.part = (( ( (rspByteBuffer[2] )) >> Si2158_PART_INFO_RESPONSE_PART_LSB ) & Si2158_PART_INFO_RESPONSE_PART_MASK ); ++ api->rsp->part_info.pmajor = (( ( (rspByteBuffer[3] )) >> Si2158_PART_INFO_RESPONSE_PMAJOR_LSB ) & Si2158_PART_INFO_RESPONSE_PMAJOR_MASK ); ++ api->rsp->part_info.pminor = (( ( (rspByteBuffer[4] )) >> Si2158_PART_INFO_RESPONSE_PMINOR_LSB ) & Si2158_PART_INFO_RESPONSE_PMINOR_MASK ); ++ api->rsp->part_info.pbuild = (( ( (rspByteBuffer[5] )) >> Si2158_PART_INFO_RESPONSE_PBUILD_LSB ) & Si2158_PART_INFO_RESPONSE_PBUILD_MASK ); ++ api->rsp->part_info.reserved = (( ( (rspByteBuffer[6] ) | (rspByteBuffer[7] << 8 )) >> Si2158_PART_INFO_RESPONSE_RESERVED_LSB ) & Si2158_PART_INFO_RESPONSE_RESERVED_MASK ); ++ api->rsp->part_info.serial = (( ( (rspByteBuffer[8] ) | (rspByteBuffer[9] << 8 ) | (rspByteBuffer[10] << 16 ) | (rspByteBuffer[11] << 24 )) >> Si2158_PART_INFO_RESPONSE_SERIAL_LSB ) & Si2158_PART_INFO_RESPONSE_SERIAL_MASK ); ++ api->rsp->part_info.romid = (( ( (rspByteBuffer[12] )) >> Si2158_PART_INFO_RESPONSE_ROMID_LSB ) & Si2158_PART_INFO_RESPONSE_ROMID_MASK ); ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_PART_INFO_CMD */ ++#ifdef Si2158_POWER_DOWN_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_POWER_DOWN COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_POWER_DOWN (L1_Si2158_Context *api) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[1]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->power_down.STATUS = api->status; ++ ++ SiTRACE("Si2158 POWER_DOWN "); ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_POWER_DOWN_CMD; ++ ++ if (L0_WriteCommandBytes(api->i2c, 1, cmdByteBuffer) != 1) { ++ SiTRACE("Error writing POWER_DOWN bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling POWER_DOWN response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_POWER_DOWN_CMD */ ++#ifdef Si2158_POWER_DOWN_HW_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_POWER_DOWN_HW COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_POWER_DOWN_HW (L1_Si2158_Context *api, ++ unsigned char subcode, ++ unsigned char pd_xo_osc, ++ unsigned char reserved1, ++ unsigned char en_xout, ++ unsigned char reserved2, ++ unsigned char pd_ldo, ++ unsigned char reserved3, ++ unsigned char reserved4, ++ unsigned char reserved5, ++ unsigned char reserved6, ++ unsigned char reserved7, ++ unsigned char reserved8) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[10]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->power_down_hw.STATUS = api->status; ++ ++ SiTRACE("Si2158 POWER_DOWN_HW "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((subcode > Si2158_POWER_DOWN_HW_CMD_SUBCODE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("SUBCODE %d " , subcode ); ++ if ((pd_xo_osc > Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PD_XO_OSC %d ", pd_xo_osc ); ++ if ((reserved1 > Si2158_POWER_DOWN_HW_CMD_RESERVED1_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED1 %d ", reserved1 ); ++ if ((en_xout > Si2158_POWER_DOWN_HW_CMD_EN_XOUT_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("EN_XOUT %d " , en_xout ); ++ if ((reserved2 > Si2158_POWER_DOWN_HW_CMD_RESERVED2_MAX) || (reserved2 < Si2158_POWER_DOWN_HW_CMD_RESERVED2_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED2 %d ", reserved2 ); ++ if ((pd_ldo > Si2158_POWER_DOWN_HW_CMD_PD_LDO_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PD_LDO %d " , pd_ldo ); ++ if ((reserved3 > Si2158_POWER_DOWN_HW_CMD_RESERVED3_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED3 %d ", reserved3 ); ++ if ((reserved4 > Si2158_POWER_DOWN_HW_CMD_RESERVED4_MAX) || (reserved4 < Si2158_POWER_DOWN_HW_CMD_RESERVED4_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED4 %d ", reserved4 ); ++ if ((reserved5 > Si2158_POWER_DOWN_HW_CMD_RESERVED5_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED5 %d ", reserved5 ); ++ if ((reserved6 > Si2158_POWER_DOWN_HW_CMD_RESERVED6_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED6 %d ", reserved6 ); ++ if ((reserved7 > Si2158_POWER_DOWN_HW_CMD_RESERVED7_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED7 %d ", reserved7 ); ++ if ((reserved8 > Si2158_POWER_DOWN_HW_CMD_RESERVED8_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED8 %d ", reserved8 ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_POWER_DOWN_HW_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( subcode & Si2158_POWER_DOWN_HW_CMD_SUBCODE_MASK ) << Si2158_POWER_DOWN_HW_CMD_SUBCODE_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( pd_xo_osc & Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_MASK ) << Si2158_POWER_DOWN_HW_CMD_PD_XO_OSC_LSB| ++ ( reserved1 & Si2158_POWER_DOWN_HW_CMD_RESERVED1_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED1_LSB| ++ ( en_xout & Si2158_POWER_DOWN_HW_CMD_EN_XOUT_MASK ) << Si2158_POWER_DOWN_HW_CMD_EN_XOUT_LSB | ++ ( reserved2 & Si2158_POWER_DOWN_HW_CMD_RESERVED2_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED2_LSB); ++ cmdByteBuffer[3] = (unsigned char) ( ( pd_ldo & Si2158_POWER_DOWN_HW_CMD_PD_LDO_MASK ) << Si2158_POWER_DOWN_HW_CMD_PD_LDO_LSB ); ++ cmdByteBuffer[4] = (unsigned char) ( ( reserved3 & Si2158_POWER_DOWN_HW_CMD_RESERVED3_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED3_LSB); ++ cmdByteBuffer[5] = (unsigned char) ( ( reserved4 & Si2158_POWER_DOWN_HW_CMD_RESERVED4_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED4_LSB); ++ cmdByteBuffer[6] = (unsigned char) ( ( reserved5 & Si2158_POWER_DOWN_HW_CMD_RESERVED5_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED5_LSB); ++ cmdByteBuffer[7] = (unsigned char) ( ( reserved6 & Si2158_POWER_DOWN_HW_CMD_RESERVED6_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED6_LSB); ++ cmdByteBuffer[8] = (unsigned char) ( ( reserved7 & Si2158_POWER_DOWN_HW_CMD_RESERVED7_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED7_LSB); ++ cmdByteBuffer[9] = (unsigned char) ( ( reserved8 & Si2158_POWER_DOWN_HW_CMD_RESERVED8_MASK ) << Si2158_POWER_DOWN_HW_CMD_RESERVED8_LSB); ++ ++ if (L0_WriteCommandBytes(api->i2c, 10, cmdByteBuffer) != 10) { ++ SiTRACE("Error writing POWER_DOWN_HW bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling POWER_DOWN_HW response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_POWER_DOWN_HW_CMD */ ++#ifdef Si2158_POWER_UP_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_POWER_UP COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_POWER_UP (L1_Si2158_Context *api, ++ unsigned char subcode, ++ unsigned char clock_mode, ++ unsigned char en_xout, ++ unsigned char pd_ldo, ++ unsigned char reserved2, ++ unsigned char reserved3, ++ unsigned char reserved4, ++ unsigned char reserved5, ++ unsigned char reserved6, ++ unsigned char reserved7, ++ unsigned char reset, ++ unsigned char clock_freq, ++ unsigned char reserved8, ++ unsigned char func, ++ unsigned char ctsien, ++ unsigned char wake_up) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[15]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->power_up.STATUS = api->status; ++ ++ SiTRACE("Si2158 POWER_UP "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((subcode > Si2158_POWER_UP_CMD_SUBCODE_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("SUBCODE %d " , subcode ); ++ if ((clock_mode > Si2158_POWER_UP_CMD_CLOCK_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CLOCK_MODE %d ", clock_mode ); ++ if ((en_xout > Si2158_POWER_UP_CMD_EN_XOUT_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("EN_XOUT %d " , en_xout ); ++ if ((pd_ldo > Si2158_POWER_UP_CMD_PD_LDO_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("PD_LDO %d " , pd_ldo ); ++ if ((reserved2 > Si2158_POWER_UP_CMD_RESERVED2_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED2 %d " , reserved2 ); ++ if ((reserved3 > Si2158_POWER_UP_CMD_RESERVED3_MAX ) || (reserved3 < Si2158_POWER_UP_CMD_RESERVED3_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED3 %d " , reserved3 ); ++ if ((reserved4 > Si2158_POWER_UP_CMD_RESERVED4_MAX ) || (reserved4 < Si2158_POWER_UP_CMD_RESERVED4_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED4 %d " , reserved4 ); ++ if ((reserved5 > Si2158_POWER_UP_CMD_RESERVED5_MAX ) || (reserved5 < Si2158_POWER_UP_CMD_RESERVED5_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED5 %d " , reserved5 ); ++ if ((reserved6 > Si2158_POWER_UP_CMD_RESERVED6_MAX ) || (reserved6 < Si2158_POWER_UP_CMD_RESERVED6_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED6 %d " , reserved6 ); ++ if ((reserved7 > Si2158_POWER_UP_CMD_RESERVED7_MAX ) || (reserved7 < Si2158_POWER_UP_CMD_RESERVED7_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED7 %d " , reserved7 ); ++ if ((reset > Si2158_POWER_UP_CMD_RESET_MAX ) || (reset < Si2158_POWER_UP_CMD_RESET_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESET %d " , reset ); ++ if ((clock_freq > Si2158_POWER_UP_CMD_CLOCK_FREQ_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CLOCK_FREQ %d ", clock_freq ); ++ if ((reserved8 > Si2158_POWER_UP_CMD_RESERVED8_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("RESERVED8 %d " , reserved8 ); ++ if ((func > Si2158_POWER_UP_CMD_FUNC_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FUNC %d " , func ); ++ if ((ctsien > Si2158_POWER_UP_CMD_CTSIEN_MAX ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("CTSIEN %d " , ctsien ); ++ if ((wake_up > Si2158_POWER_UP_CMD_WAKE_UP_MAX ) || (wake_up < Si2158_POWER_UP_CMD_WAKE_UP_MIN ) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("WAKE_UP %d " , wake_up ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_POWER_UP_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( subcode & Si2158_POWER_UP_CMD_SUBCODE_MASK ) << Si2158_POWER_UP_CMD_SUBCODE_LSB ); ++ cmdByteBuffer[2] = (unsigned char) ( ( clock_mode & Si2158_POWER_UP_CMD_CLOCK_MODE_MASK ) << Si2158_POWER_UP_CMD_CLOCK_MODE_LSB| ++ ( en_xout & Si2158_POWER_UP_CMD_EN_XOUT_MASK ) << Si2158_POWER_UP_CMD_EN_XOUT_LSB ); ++ cmdByteBuffer[3] = (unsigned char) ( ( pd_ldo & Si2158_POWER_UP_CMD_PD_LDO_MASK ) << Si2158_POWER_UP_CMD_PD_LDO_LSB ); ++ cmdByteBuffer[4] = (unsigned char) ( ( reserved2 & Si2158_POWER_UP_CMD_RESERVED2_MASK ) << Si2158_POWER_UP_CMD_RESERVED2_LSB ); ++ cmdByteBuffer[5] = (unsigned char) ( ( reserved3 & Si2158_POWER_UP_CMD_RESERVED3_MASK ) << Si2158_POWER_UP_CMD_RESERVED3_LSB ); ++ cmdByteBuffer[6] = (unsigned char) ( ( reserved4 & Si2158_POWER_UP_CMD_RESERVED4_MASK ) << Si2158_POWER_UP_CMD_RESERVED4_LSB ); ++ cmdByteBuffer[7] = (unsigned char) ( ( reserved5 & Si2158_POWER_UP_CMD_RESERVED5_MASK ) << Si2158_POWER_UP_CMD_RESERVED5_LSB ); ++ cmdByteBuffer[8] = (unsigned char) ( ( reserved6 & Si2158_POWER_UP_CMD_RESERVED6_MASK ) << Si2158_POWER_UP_CMD_RESERVED6_LSB ); ++ cmdByteBuffer[9] = (unsigned char) ( ( reserved7 & Si2158_POWER_UP_CMD_RESERVED7_MASK ) << Si2158_POWER_UP_CMD_RESERVED7_LSB ); ++ cmdByteBuffer[10] = (unsigned char) ( ( reset & Si2158_POWER_UP_CMD_RESET_MASK ) << Si2158_POWER_UP_CMD_RESET_LSB ); ++ cmdByteBuffer[11] = (unsigned char) ( ( clock_freq & Si2158_POWER_UP_CMD_CLOCK_FREQ_MASK ) << Si2158_POWER_UP_CMD_CLOCK_FREQ_LSB); ++ cmdByteBuffer[12] = (unsigned char) ( ( reserved8 & Si2158_POWER_UP_CMD_RESERVED8_MASK ) << Si2158_POWER_UP_CMD_RESERVED8_LSB ); ++ cmdByteBuffer[13] = (unsigned char) ( ( func & Si2158_POWER_UP_CMD_FUNC_MASK ) << Si2158_POWER_UP_CMD_FUNC_LSB | ++ ( ctsien & Si2158_POWER_UP_CMD_CTSIEN_MASK ) << Si2158_POWER_UP_CMD_CTSIEN_LSB ); ++ cmdByteBuffer[14] = (unsigned char) ( ( wake_up & Si2158_POWER_UP_CMD_WAKE_UP_MASK ) << Si2158_POWER_UP_CMD_WAKE_UP_LSB ); ++ ++ if (L0_WriteCommandBytes(api->i2c, 15, cmdByteBuffer) != 15) { ++ SiTRACE("Error writing POWER_UP bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling POWER_UP response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_POWER_UP_CMD */ ++#ifdef Si2158_TUNER_TUNE_FREQ_CMD ++ /*---------------------------------------------------*/ ++/* Si2158_TUNER_TUNE_FREQ COMMAND */ ++/*---------------------------------------------------*/ ++unsigned char Si2158_L1_TUNER_TUNE_FREQ (L1_Si2158_Context *api, ++ unsigned char mode, ++ unsigned long freq) ++{ ++ unsigned char error_code = 0; ++ unsigned char cmdByteBuffer[8]; ++ unsigned char rspByteBuffer[1]; ++ api->rsp->tuner_tune_freq.STATUS = api->status; ++ ++ SiTRACE("Si2158 TUNER_TUNE_FREQ "); ++ #ifdef DEBUG_RANGE_CHECK ++ if ((mode > Si2158_TUNER_TUNE_FREQ_CMD_MODE_MAX) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("MODE %d ", mode ); ++ if ((freq > Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MAX) || (freq < Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MIN) ) {error_code++; SiTRACE("\nOut of range: ");}; SiTRACE("FREQ %d ", freq ); ++ if (error_code) { ++ SiTRACE("%d out of range parameters\n", error_code); ++ return ERROR_Si2158_PARAMETER_OUT_OF_RANGE; ++ } ++ #endif /* DEBUG_RANGE_CHECK */ ++ ++ SiTRACE("\n"); ++ cmdByteBuffer[0] = Si2158_TUNER_TUNE_FREQ_CMD; ++ cmdByteBuffer[1] = (unsigned char) ( ( mode & Si2158_TUNER_TUNE_FREQ_CMD_MODE_MASK ) << Si2158_TUNER_TUNE_FREQ_CMD_MODE_LSB); ++ cmdByteBuffer[2] = (unsigned char)0x00; ++ cmdByteBuffer[3] = (unsigned char)0x00; ++ cmdByteBuffer[4] = (unsigned char) ( ( freq & Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MASK ) << Si2158_TUNER_TUNE_FREQ_CMD_FREQ_LSB); ++ cmdByteBuffer[5] = (unsigned char) ((( freq & Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MASK ) << Si2158_TUNER_TUNE_FREQ_CMD_FREQ_LSB)>>8); ++ cmdByteBuffer[6] = (unsigned char) ((( freq & Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MASK ) << Si2158_TUNER_TUNE_FREQ_CMD_FREQ_LSB)>>16); ++ cmdByteBuffer[7] = (unsigned char) ((( freq & Si2158_TUNER_TUNE_FREQ_CMD_FREQ_MASK ) << Si2158_TUNER_TUNE_FREQ_CMD_FREQ_LSB)>>24); ++ ++ if (L0_WriteCommandBytes(api->i2c, 8, cmdByteBuffer) != 8) { ++ SiTRACE("Error writing TUNER_TUNE_FREQ bytes!\n"); ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ error_code = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (error_code) { ++ SiTRACE("Error polling TUNER_TUNE_FREQ response\n"); ++ return error_code; ++ } ++ ++ ++ return NO_Si2158_ERROR; ++} ++#endif /* Si2158_TUNER_TUNE_FREQ_CMD */ ++ ++ /* --------------------------------------------*/ ++ /* SEND_COMMAND2 FUNCTION */ ++ /* --------------------------------------------*/ ++unsigned char Si2158_L1_SendCommand2(L1_Si2158_Context *api, unsigned int cmd_code) { ++ switch (cmd_code) { ++ #ifdef Si2158_AGC_OVERRIDE_CMD ++ case Si2158_AGC_OVERRIDE_CMD_CODE: ++ return Si2158_L1_AGC_OVERRIDE (api, api->cmd->agc_override.force_max_gain, api->cmd->agc_override.force_top_gain ); ++ break; ++ #endif /* Si2158_AGC_OVERRIDE_CMD */ ++ #ifdef Si2158_ATV_CW_TEST_CMD ++ case Si2158_ATV_CW_TEST_CMD_CODE: ++ return Si2158_L1_ATV_CW_TEST (api, api->cmd->atv_cw_test.pc_lock ); ++ break; ++ #endif /* Si2158_ATV_CW_TEST_CMD */ ++ #ifdef Si2158_ATV_RESTART_CMD ++ case Si2158_ATV_RESTART_CMD_CODE: ++ return Si2158_L1_ATV_RESTART (api ); ++ break; ++ #endif /* Si2158_ATV_RESTART_CMD */ ++ #ifdef Si2158_ATV_STATUS_CMD ++ case Si2158_ATV_STATUS_CMD_CODE: ++ return Si2158_L1_ATV_STATUS (api, api->cmd->atv_status.intack ); ++ break; ++ #endif /* Si2158_ATV_STATUS_CMD */ ++ #ifdef Si2158_CONFIG_CLOCKS_CMD ++ case Si2158_CONFIG_CLOCKS_CMD_CODE: ++ return Si2158_L1_CONFIG_CLOCKS (api, api->cmd->config_clocks.subcode, api->cmd->config_clocks.clock_mode, api->cmd->config_clocks.en_xout ); ++ break; ++ #endif /* Si2158_CONFIG_CLOCKS_CMD */ ++ #ifdef Si2158_CONFIG_PINS_CMD ++ case Si2158_CONFIG_PINS_CMD_CODE: ++ return Si2158_L1_CONFIG_PINS (api, api->cmd->config_pins.gpio1_mode, api->cmd->config_pins.gpio1_read, api->cmd->config_pins.gpio2_mode, api->cmd->config_pins.gpio2_read, api->cmd->config_pins.reserved1, api->cmd->config_pins.reserved2, api->cmd->config_pins.reserved3 ); ++ break; ++ #endif /* Si2158_CONFIG_PINS_CMD */ ++ #ifdef Si2158_DTV_RESTART_CMD ++ case Si2158_DTV_RESTART_CMD_CODE: ++ return Si2158_L1_DTV_RESTART (api ); ++ break; ++ #endif /* Si2158_DTV_RESTART_CMD */ ++ #ifdef Si2158_DTV_STATUS_CMD ++ case Si2158_DTV_STATUS_CMD_CODE: ++ return Si2158_L1_DTV_STATUS (api, api->cmd->dtv_status.intack ); ++ break; ++ #endif /* Si2158_DTV_STATUS_CMD */ ++ #ifdef Si2158_EXIT_BOOTLOADER_CMD ++ case Si2158_EXIT_BOOTLOADER_CMD_CODE: ++ return Si2158_L1_EXIT_BOOTLOADER (api, api->cmd->exit_bootloader.func, api->cmd->exit_bootloader.ctsien ); ++ break; ++ #endif /* Si2158_EXIT_BOOTLOADER_CMD */ ++ #ifdef Si2158_FINE_TUNE_CMD ++ case Si2158_FINE_TUNE_CMD_CODE: ++ return Si2158_L1_FINE_TUNE (api, api->cmd->fine_tune.persistence, api->cmd->fine_tune.apply_to_lif, api->cmd->fine_tune.offset_500hz ); ++ break; ++ #endif /* Si2158_FINE_TUNE_CMD */ ++ #ifdef Si2158_GET_PROPERTY_CMD ++ case Si2158_GET_PROPERTY_CMD_CODE: ++ return Si2158_L1_GET_PROPERTY (api, api->cmd->get_property.reserved, api->cmd->get_property.prop ); ++ break; ++ #endif /* Si2158_GET_PROPERTY_CMD */ ++ #ifdef Si2158_GET_REV_CMD ++ case Si2158_GET_REV_CMD_CODE: ++ return Si2158_L1_GET_REV (api ); ++ break; ++ #endif /* Si2158_GET_REV_CMD */ ++ #ifdef Si2158_PART_INFO_CMD ++ case Si2158_PART_INFO_CMD_CODE: ++ return Si2158_L1_PART_INFO (api ); ++ break; ++ #endif /* Si2158_PART_INFO_CMD */ ++ #ifdef Si2158_POWER_DOWN_CMD ++ case Si2158_POWER_DOWN_CMD_CODE: ++ return Si2158_L1_POWER_DOWN (api ); ++ break; ++ #endif /* Si2158_POWER_DOWN_CMD */ ++ #ifdef Si2158_POWER_DOWN_HW_CMD ++ case Si2158_POWER_DOWN_HW_CMD_CODE: ++ return Si2158_L1_POWER_DOWN_HW (api, api->cmd->power_down_hw.subcode, api->cmd->power_down_hw.pd_xo_osc, api->cmd->power_down_hw.reserved1, api->cmd->power_down_hw.en_xout, api->cmd->power_down_hw.reserved2, api->cmd->power_down_hw.pd_ldo, api->cmd->power_down_hw.reserved3, api->cmd->power_down_hw.reserved4, api->cmd->power_down_hw.reserved5, api->cmd->power_down_hw.reserved6, api->cmd->power_down_hw.reserved7, api->cmd->power_down_hw.reserved8 ); ++ break; ++ #endif /* Si2158_POWER_DOWN_HW_CMD */ ++ #ifdef Si2158_POWER_UP_CMD ++ case Si2158_POWER_UP_CMD_CODE: ++ return Si2158_L1_POWER_UP (api, api->cmd->power_up.subcode, api->cmd->power_up.clock_mode, api->cmd->power_up.en_xout, api->cmd->power_up.pd_ldo, api->cmd->power_up.reserved2, api->cmd->power_up.reserved3, api->cmd->power_up.reserved4, api->cmd->power_up.reserved5, api->cmd->power_up.reserved6, api->cmd->power_up.reserved7, api->cmd->power_up.reset, api->cmd->power_up.clock_freq, api->cmd->power_up.reserved8, api->cmd->power_up.func, api->cmd->power_up.ctsien, api->cmd->power_up.wake_up ); ++ break; ++ #endif /* Si2158_POWER_UP_CMD */ ++ #ifdef Si2158_SET_PROPERTY_CMD ++ case Si2158_SET_PROPERTY_CMD_CODE: ++ return Si2158_L1_SET_PROPERTY (api, api->cmd->set_property.reserved, api->cmd->set_property.prop, api->cmd->set_property.data ); ++ break; ++ #endif /* Si2158_SET_PROPERTY_CMD */ ++ #ifdef Si2158_STANDBY_CMD ++ case Si2158_STANDBY_CMD_CODE: ++ return Si2158_L1_STANDBY (api, api->cmd->standby.type ); ++ break; ++ #endif /* Si2158_STANDBY_CMD */ ++ #ifdef Si2158_TUNER_STATUS_CMD ++ case Si2158_TUNER_STATUS_CMD_CODE: ++ return Si2158_L1_TUNER_STATUS (api, api->cmd->tuner_status.intack ); ++ break; ++ #endif /* Si2158_TUNER_STATUS_CMD */ ++ #ifdef Si2158_TUNER_TUNE_FREQ_CMD ++ case Si2158_TUNER_TUNE_FREQ_CMD_CODE: ++ return Si2158_L1_TUNER_TUNE_FREQ (api, api->cmd->tuner_tune_freq.mode, api->cmd->tuner_tune_freq.freq ); ++ break; ++ #endif /* Si2158_TUNER_TUNE_FREQ_CMD */ ++ default : break; ++ } ++ return 0; ++ } ++ ++/*********************************************************************************************************************** ++ Si2158_L1_API_ERROR_TEXT function ++ Use: Error information function ++ Used to retrieve a text based on an error code ++ Returns: the error text ++ Parameter: error_code the error code. ++ Porting: Useful for application development for debug purposes. ++ Porting: May not be required for the final application, can be removed if not used. ++ ***********************************************************************************************************************/ ++char* Si2158_L1_API_ERROR_TEXT(unsigned char error_code) { ++ switch (error_code) { ++ case NO_Si2158_ERROR : return (char *)"No Si2158 error"; ++ case ERROR_Si2158_ALLOCATING_CONTEXT : return (char *)"Error while allocating Si2158 context"; ++ case ERROR_Si2158_PARAMETER_OUT_OF_RANGE : return (char *)"Si2158 parameter(s) out of range"; ++ case ERROR_Si2158_SENDING_COMMAND : return (char *)"Error while sending Si2158 command"; ++ case ERROR_Si2158_CTS_TIMEOUT : return (char *)"Si2158 CTS timeout"; ++ case ERROR_Si2158_ERR : return (char *)"Si2158 Error (status 'err' bit 1)"; ++ case ERROR_Si2158_POLLING_CTS : return (char *)"Si2158 Error while polling CTS"; ++ case ERROR_Si2158_POLLING_RESPONSE : return (char *)"Si2158 Error while polling response"; ++ case ERROR_Si2158_LOADING_FIRMWARE : return (char *)"Si2158 Error while loading firmware"; ++ case ERROR_Si2158_LOADING_BOOTBLOCK : return (char *)"Si2158 Error while loading bootblock"; ++ case ERROR_Si2158_STARTING_FIRMWARE : return (char *)"Si2158 Error while starting firmware"; ++ case ERROR_Si2158_SW_RESET : return (char *)"Si2158 Error during software reset"; ++ case ERROR_Si2158_INCOMPATIBLE_PART : return (char *)"Si2158 Error Incompatible part"; ++/* _specific_error_text_string_insertion_start */ ++ case ERROR_Si2158_TUNINT_TIMEOUT : return (char *)"Si2158 Error TUNINT Timeout"; ++ case ERROR_Si2158_xTVINT_TIMEOUT : return (char *)"Si2158 Error xTVINT Timeout"; ++/* _specific_error_text_string_insertion_point */ ++ default : return (char *)"Unknown Si2158 error code"; ++ } ++} ++/*********************************************************************************************************************** ++ Si2158_L1_CheckStatus function ++ Use: Status information function ++ Used to retrieve the status byte ++ Returns: 0 if no error ++ Parameter: error_code the error code. ++ ***********************************************************************************************************************/ ++unsigned char Si2158_L1_CheckStatus (L1_Si2158_Context *api) { ++ unsigned char rspByteBuffer[1]; ++ return Si2158_pollForResponse(api, 1, rspByteBuffer); ++} ++/*********************************************************************************************************************** ++ Si2158_L1_API_Init function ++ Use: software initialisation function ++ Used to initialize the software context ++ Returns: 0 if no error ++ Comments: It should be called first and once only when starting the application ++ Parameter: **ppapi a pointer to the api context to initialize ++ Parameter: add the Si2158 I2C address ++ Porting: Allocation errors need to be properly managed. ++ Porting: I2C initialization needs to be adapted to use the available I2C functions ++ ***********************************************************************************************************************/ ++unsigned char Si2158_L1_API_Init (L1_Si2158_Context *api, int add) { ++ api->i2c = &(api->i2cObj); ++ ++ L0_Init(api->i2c); ++ L0_SetAddress(api->i2c, add, 0); ++ ++ api->cmd = &(api->cmdObj); ++ api->rsp = &(api->rspObj); ++ api->prop = &(api->propObj); ++ api->status = &(api->statusObj); ++ ++ api->part = Si2158_part; ++ api->chiprev = Si2158_chiprev; ++ api->partMajorVersion = Si2158_partMajorVersion; ++ api->partMinorVersion = Si2158_partMinorVersion; ++ api->partRomid = Si2158_partRomid; ++ ++ return NO_Si2158_ERROR; ++} ++/*********************************************************************************************************************** ++ Si2158_L1_API_Patch function ++ Use: Patch information function ++ Used to send a number of bytes to the Si2158. Useful to download the firmware. ++ Returns: 0 if no error ++ Parameter: error_code the error code. ++ Porting: Useful for application development for debug purposes. ++ Porting: May not be required for the final application, can be removed if not used. ++ ***********************************************************************************************************************/ ++unsigned char Si2158_L1_API_Patch (L1_Si2158_Context *api, int iNbBytes, unsigned char *pucDataBuffer) { ++ unsigned char res; ++ unsigned char rspByteBuffer[1]; ++ ++ SiTRACE("Si2158 Patch %d bytes\n",iNbBytes); ++ ++ res = (unsigned char)L0_WriteCommandBytes(api->i2c, iNbBytes, pucDataBuffer); ++ if (res!=iNbBytes) { ++ SiTRACE("Si2158_L1_API_Patch error 0x%02x writing bytes: %s\n", res, Si2158_L1_API_ERROR_TEXT(res) ); ++ return res; ++ } ++ ++ res = Si2158_pollForResponse(api, 1, rspByteBuffer); ++ if (res != NO_Si2158_ERROR) { ++ SiTRACE("Si2158_L1_API_Patch error 0x%02x polling response: %s\n", res, Si2158_L1_API_ERROR_TEXT(res) ); ++ return ERROR_Si2158_POLLING_RESPONSE; ++ } ++ ++ return NO_Si2158_ERROR; ++} ++ ++/************************************************************************************************************************ ++ NAME: Si2158_Configure ++ DESCRIPTION: Setup Si2158 video filters, GPIOs/clocks, Common Properties startup, etc. ++ Parameter: Pointer to Si2158 Context ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_Configure (L1_Si2158_Context *api) ++{ ++ int return_code; ++ return_code = NO_Si2158_ERROR; ++/* _specific_configure_insertion_start */ ++ #ifdef USING_ALIF_FILTER ++ if ((return_code = Si2158_LoadVideofilter(api,ALIF_VIDFILT_TABLE,ALIF_VIDFILT_LINES)) != NO_Si2158_ERROR) ++ return return_code; ++ #endif ++ /* load DTV video filter file */ ++ #ifdef USING_DLIF_FILTER ++ if ((return_code = Si2158_LoadVideofilter(api,DLIF_VIDFILT_TABLE,DLIF_VIDFILT_LINES)) != NO_Si2158_ERROR) ++ return return_code; ++ #endif ++ /* _specific_configure_insertion_point */ ++ /* Set All Properties startup configuration */ ++ Si2158_setupAllDefaults (api); ++ Si2158_downloadAllProperties(api); ++ ++ return return_code; ++} ++/************************************************************************************************************************ ++ NAME: Si2158_PowerUpWithPatch ++ DESCRIPTION: Send Si2158 API PowerUp Command with PowerUp to bootloader, ++ Check the Chip rev and part, and ROMID are compared to expected values. ++ Load the Firmware Patch then Start the Firmware. ++ Programming Guide Reference: Flowchart A.2 (POWER_UP with patch flowchart) ++ ++ Parameter: pointer to Si2158 Context ++ Returns: Si2158/I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_PowerUpWithPatch (L1_Si2158_Context *api) ++{ ++ int return_code; ++ return_code = NO_Si2158_ERROR; ++ ++ /* always wait for CTS prior to POWER_UP command */ ++ if ((return_code = Si2158_pollForCTS (api)) != NO_Si2158_ERROR) { ++ SiTRACE ("Si2158_pollForCTS error 0x%02x\n", return_code); ++ return return_code; ++ } ++ ++ if ((return_code = Si2158_L1_POWER_UP (api, ++ Si2158_POWER_UP_CMD_SUBCODE_CODE, ++ Si2158_POWER_UP_CMD_CLOCK_MODE_XTAL, ++ Si2158_POWER_UP_CMD_EN_XOUT_DIS_XOUT, ++ Si2158_POWER_UP_CMD_PD_LDO_LDO_POWER_UP, ++ Si2158_POWER_UP_CMD_RESERVED2_RESERVED, ++ Si2158_POWER_UP_CMD_RESERVED3_RESERVED, ++ Si2158_POWER_UP_CMD_RESERVED4_RESERVED, ++ Si2158_POWER_UP_CMD_RESERVED5_RESERVED, ++ Si2158_POWER_UP_CMD_RESERVED6_RESERVED, ++ Si2158_POWER_UP_CMD_RESERVED7_RESERVED, ++ Si2158_POWER_UP_CMD_RESET_RESET, ++ Si2158_POWER_UP_CMD_CLOCK_FREQ_CLK_24MHZ, ++ Si2158_POWER_UP_CMD_RESERVED8_RESERVED, ++ Si2158_POWER_UP_CMD_FUNC_BOOTLOADER, ++ Si2158_POWER_UP_CMD_CTSIEN_DISABLE, ++ Si2158_POWER_UP_CMD_WAKE_UP_WAKE_UP ++ )) != NO_Si2158_ERROR) ++ { ++ SiTRACE ("Si2158_L1_POWER_UP error 0x%02x: %s\n", return_code, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ ++ /* Get the Part Info from the chip. This command is only valid in Bootloader mode */ ++ if ((return_code = Si2158_L1_PART_INFO(api)) != NO_Si2158_ERROR) { ++ SiTRACE ("Si2158_L1_PART_INFO error 0x%02x: %s\n", return_code, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ SiTRACE("chiprev %d\n", api->rsp->part_info.chiprev); ++ SiTRACE("part Si21%d\n", api->rsp->part_info.part ); ++ SiTRACE("pmajor %d\n", api->rsp->part_info.pmajor ); ++ if (api->rsp->part_info.pmajor >= 0x30) { ++ SiTRACE("pmajor '%c'\n", api->rsp->part_info.pmajor ); ++ } ++ SiTRACE("pminor %d\n", api->rsp->part_info.pminor ); ++ if (api->rsp->part_info.pminor >= 0x30) { ++ SiTRACE("pminor '%c'\n", api->rsp->part_info.pminor ); ++ } ++ SiTRACE("romid %3d/0x%02x\n", api->rsp->part_info.romid, api->rsp->part_info.romid ); ++#ifdef PART_INTEGRITY_CHECKS ++ /* Check the Chip revision, part and ROMID against expected values and report an error if incompatible */ ++ if (api->rsp->part_info.chiprev != api->chiprev) { ++ SiTRACE ("INCOMPATIBLE PART error chiprev %d (expected %d)\n", api->rsp->part_info.chiprev, api->chiprev); ++ return_code = ERROR_Si2158_INCOMPATIBLE_PART; ++ } ++ /* Part Number is represented as the last 2 digits */ ++ if (api->rsp->part_info.part != api->part) { ++ SiTRACE ("INCOMPATIBLE PART error part %d (expected %d)\n", api->rsp->part_info.part, api->part); ++ return_code = ERROR_Si2158_INCOMPATIBLE_PART; ++ } ++ /* Part Major Version in ASCII */ ++ if (api->rsp->part_info.pmajor != api->partMajorVersion) { ++ SiTRACE ("INCOMPATIBLE PART error pmajor %d (expected %d)\n", api->rsp->part_info.pmajor, api->partMajorVersion); ++ return_code = ERROR_Si2158_INCOMPATIBLE_PART; ++ } ++ /* Part Minor Version in ASCII */ ++ if (api->rsp->part_info.pminor != api->partMinorVersion) { ++ SiTRACE ("INCOMPATIBLE PART error pminor %d (expected %d)\n", api->rsp->part_info.pminor, api->partMinorVersion); ++ return_code = ERROR_Si2158_INCOMPATIBLE_PART; ++ } ++ /* ROMID in byte representation */ ++ if (api->rsp->part_info.romid != api->partRomid) { ++ SiTRACE ("INCOMPATIBLE PART error romid %3d (expected %2d)\n", api->rsp->part_info.romid, api->partRomid); ++ return_code = ERROR_Si2158_INCOMPATIBLE_PART; ++ } ++ if (return_code != NO_Si2158_ERROR) return return_code; ++#endif /* PART_INTEGRITY_CHECKS */ ++ /* Load the Firmware based on ROMID */ ++ if (api->rsp->part_info.romid == 0x32) ++ { ++ /* Load the Firmware */ ++ if ((return_code = Si2158_LoadFirmware(api, Si2158_FW_0_Eb15, FIRMWARE_LINES_0_Eb15)) != NO_Si2158_ERROR) { ++ SiTRACE ("Si2158_LoadFirmware error 0x%02x: %s\n", return_code, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ } ++ else if (api->rsp->part_info.romid == 0x33) /* if Si2158-A20 part load firmware patch (currently a dummy patch , 20bx) */ ++ { ++ /* This dummy patch (20bx) will skip the loadFirmware function and boot from NVM only. ++ When a new patch is available for the Si2158-A20, include the patch file and replace the firmware array and size in the function below */ ++ if ((return_code = Si2158_LoadFirmware_16(api, Si2158_FW_2_0bx, FIRMWARE_LINES_2_0bx)) != NO_Si2158_ERROR) ++ { ++ SiTRACE ("Si2158_LoadFirmware_16 error 0x%02x: %s\n", return_code, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ } ++ else ++ { ++ SiTRACE ("INCOMPATIBLE PART error ROMID 0x%02x (expected 0x%02x)\n", api->rsp->part_info.romid, api->partRomid); ++ return ERROR_Si2158_INCOMPATIBLE_PART; ++ } ++ ++ /*Start the Firmware */ ++ if ((return_code = Si2158_StartFirmware(api)) != NO_Si2158_ERROR) { /* Start firmware */ ++ SiTRACE ("Si2158_StartFirmware error 0x%02x: %s\n", return_code, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ ++ return NO_Si2158_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2158_LoadFirmware_16 ++ DESCRIPTON: Load firmware from firmware_struct array in Si2158_Firmware_x_y_build_z.h file into Si2158 ++ Requires Si2158 to be in bootloader mode after PowerUp ++ Programming Guide Reference: Flowchart A.3 (Download FW PATCH flowchart) ++ ++ Parameter: Si2158 Context (I2C address) ++ Parameter: pointer to firmware_struct array ++ Parameter: number of lines in firmware table array (size in bytes / firmware_struct) ++ Returns: Si2158/I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_LoadFirmware_16 (L1_Si2158_Context *api, firmware_struct fw_table[], int nbLines) ++{ ++ int return_code; ++ int line; ++ return_code = NO_Si2158_ERROR; ++ ++ SiTRACE ("Si2158_LoadFirmware_16 starting...\n"); ++ SiTRACE ("Si2158_LoadFirmware_16 nbLines %d\n", nbLines); ++ ++ /* for each line in fw_table */ ++ for (line = 0; line < nbLines; line++) ++ { ++ if (fw_table[line].firmware_len > 0) /* don't download if length is 0 , e.g. dummy firmware */ ++ { ++ /* send firmware_len bytes (up to 16) to Si2158 */ ++ if ((return_code = Si2158_L1_API_Patch(api, fw_table[line].firmware_len, fw_table[line].firmware_table)) != NO_Si2158_ERROR) ++ { ++ SiTRACE("Si2158_LoadFirmware_16 error 0x%02x patching line %d: %s\n", return_code, line, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ if (line == 0) { ++ SiTRACE("The firmware is incompatible with the part!\n"); ++ } ++ return ERROR_Si2158_LOADING_FIRMWARE; ++ } ++ //if (line==3) SiTraceConfiguration("traces suspend"); ++ } ++ } ++ //SiTraceConfiguration("traces resume"); ++ SiTRACE ("Si2158_LoadFirmware_16 complete...\n"); ++ return NO_Si2158_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2158_LoadFirmware ++ DESCRIPTON: Load firmware from FIRMWARE_TABLE array in Si2158_Firmware_x_y_build_z.h file into Si2158 ++ Requires Si2158 to be in bootloader mode after PowerUp ++ Programming Guide Reference: Flowchart A.3 (Download FW PATCH flowchart) ++ ++ Parameter: Si2158 Context (I2C address) ++ Parameter: pointer to firmware table array ++ Parameter: number of lines in firmware table array (size in bytes / BYTES_PER_LINE) ++ Returns: Si2158/I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_LoadFirmware (L1_Si2158_Context *api, unsigned char fw_table[], int nbLines) ++{ ++ int return_code; ++ int line; ++ return_code = NO_Si2158_ERROR; ++ ++ SiTRACE ("Si2158_LoadFirmware starting...\n"); ++ SiTRACE ("Si2158_LoadFirmware nbLines %d\n", nbLines); ++ ++ /* for each line in fw_table */ ++ for (line = 0; line < nbLines; line++) ++ { ++ /* send Si2158_BYTES_PER_LINE fw bytes to Si2158 */ ++ if ((return_code = Si2158_L1_API_Patch(api, Si2158_BYTES_PER_LINE, fw_table + Si2158_BYTES_PER_LINE*line)) != NO_Si2158_ERROR) ++ { ++ SiTRACE("Si2158_LoadFirmware error 0x%02x patching line %d: %s\n", return_code, line, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ if (line == 0) { ++ SiTRACE("The firmware is incompatible with the part!\n"); ++ } ++ return ERROR_Si2158_LOADING_FIRMWARE; ++ } ++ //if (line==3) SiTraceConfiguration("traces suspend"); ++ } ++ //SiTraceConfiguration("traces resume"); ++ SiTRACE ("Si2158_LoadFirmware complete...\n"); ++ return NO_Si2158_ERROR; ++} ++/************************************************************************************************************************ ++ NAME: Si2158_StartFirmware ++ DESCRIPTION: Start Si2158 firmware (put the Si2158 into run mode) ++ Parameter: Si2158 Context (I2C address) ++ Parameter (passed by Reference): ExitBootloadeer Response Status byte : tunint, atvint, dtvint, err, cts ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_StartFirmware (L1_Si2158_Context *api) ++{ ++ ++ if (Si2158_L1_EXIT_BOOTLOADER(api, Si2158_EXIT_BOOTLOADER_CMD_FUNC_TUNER, Si2158_EXIT_BOOTLOADER_CMD_CTSIEN_OFF) != NO_Si2158_ERROR) ++ { ++ return ERROR_Si2158_STARTING_FIRMWARE; ++ } ++ ++ return NO_Si2158_ERROR; ++} ++ ++/************************************************************************************************************************ ++ NAME: Si2158_Init ++ DESCRIPTION:Reset and Initialize Si2158 ++ Parameter: Si2158 Context (I2C address) ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++************************************************************************************************************************/ ++int Si2158_Init (L1_Si2158_Context *api) ++{ ++ int return_code; ++ SiTRACE("Si2158_Init starting...\n"); ++ ++ if ((return_code = Si2158_PowerUpWithPatch(api)) != NO_Si2158_ERROR) { /* PowerUp into bootloader */ ++ SiTRACE ("Si2158_PowerUpWithPatch error 0x%02x: %s\n", return_code, Si2158_L1_API_ERROR_TEXT((unsigned char)return_code) ); ++ return return_code; ++ } ++ /* At this point, FW is loaded and started. */ ++ Si2158_Configure(api); ++ SiTRACE("Si2158_Init complete...\n"); ++ return NO_Si2158_ERROR; ++} ++/*********************************************************************************************************************** ++ Si2158_L1_SetProperty function ++ Use: property set function ++ Used to call L1_SET_PROPERTY with the property Id and data provided. ++ Parameter: *api the Si2158 context ++ Parameter: prop the property Id ++ Parameter: data the property bytes ++ Returns: 0 if no error, an error code otherwise ++ ***********************************************************************************************************************/ ++unsigned char Si2158_L1_SetProperty(L1_Si2158_Context *api, unsigned int prop, int data) { ++ unsigned char reserved = 0; ++ return Si2158_L1_SET_PROPERTY (api, reserved, prop, data); ++} ++ /* --------------------------------------------*/ ++ /* SET_PROPERTY2 FUNCTION */ ++ /* --------------------------------------------*/ ++unsigned char Si2158_L1_SetProperty2(L1_Si2158_Context *api, unsigned int prop_code) { ++ int data; ++#ifdef Si2158_GET_PROPERTY_STRING ++ char msg[1000]; ++#endif /* Si2158_GET_PROPERTY_STRING */ ++ switch (prop_code) { ++ #ifdef Si2158_ATV_AFC_RANGE_PROP ++ case Si2158_ATV_AFC_RANGE_PROP_CODE: ++ data = (api->prop->atv_afc_range.range_khz & Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_MASK) << Si2158_ATV_AFC_RANGE_PROP_RANGE_KHZ_LSB ; ++ break; ++ #endif /* Si2158_ATV_AFC_RANGE_PROP */ ++ #ifdef Si2158_ATV_AGC_SPEED_PROP ++ case Si2158_ATV_AGC_SPEED_PROP_CODE: ++ data = (api->prop->atv_agc_speed.if_agc_speed & Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_MASK) << Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_LSB ; ++ break; ++ #endif /* Si2158_ATV_AGC_SPEED_PROP */ ++ #ifdef Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP ++ case Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_CODE: ++ data = (api->prop->atv_agc_speed_low_rssi.if_agc_speed & Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_MASK) << Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_LSB | ++ (api->prop->atv_agc_speed_low_rssi.thld & Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_MASK ) << Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_THLD_LSB ; ++ break; ++ #endif /* Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP */ ++ #ifdef Si2158_ATV_ARTIFICIAL_SNOW_PROP ++ case Si2158_ATV_ARTIFICIAL_SNOW_PROP_CODE: ++ data = (api->prop->atv_artificial_snow.gain & Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_MASK ) << Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_LSB | ++ (api->prop->atv_artificial_snow.offset & Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_MASK) << Si2158_ATV_ARTIFICIAL_SNOW_PROP_OFFSET_LSB ; ++ break; ++ #endif /* Si2158_ATV_ARTIFICIAL_SNOW_PROP */ ++ #ifdef Si2158_ATV_CONFIG_IF_PORT_PROP ++ case Si2158_ATV_CONFIG_IF_PORT_PROP_CODE: ++ data = (api->prop->atv_config_if_port.atv_out_type & Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_MASK ) << Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LSB | ++ (api->prop->atv_config_if_port.atv_agc_source & Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_MASK) << Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_LSB ; ++ break; ++ #endif /* Si2158_ATV_CONFIG_IF_PORT_PROP */ ++ #ifdef Si2158_ATV_EXT_AGC_PROP ++ case Si2158_ATV_EXT_AGC_PROP_CODE: ++ data = (api->prop->atv_ext_agc.min_10mv & Si2158_ATV_EXT_AGC_PROP_MIN_10MV_MASK) << Si2158_ATV_EXT_AGC_PROP_MIN_10MV_LSB | ++ (api->prop->atv_ext_agc.max_10mv & Si2158_ATV_EXT_AGC_PROP_MAX_10MV_MASK) << Si2158_ATV_EXT_AGC_PROP_MAX_10MV_LSB ; ++ break; ++ #endif /* Si2158_ATV_EXT_AGC_PROP */ ++ #ifdef Si2158_ATV_IEN_PROP ++ case Si2158_ATV_IEN_PROP_CODE: ++ data = (api->prop->atv_ien.chlien & Si2158_ATV_IEN_PROP_CHLIEN_MASK) << Si2158_ATV_IEN_PROP_CHLIEN_LSB | ++ (api->prop->atv_ien.pclien & Si2158_ATV_IEN_PROP_PCLIEN_MASK) << Si2158_ATV_IEN_PROP_PCLIEN_LSB ; ++ break; ++ #endif /* Si2158_ATV_IEN_PROP */ ++ #ifdef Si2158_ATV_INT_SENSE_PROP ++ case Si2158_ATV_INT_SENSE_PROP_CODE: ++ data = (api->prop->atv_int_sense.chlnegen & Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_MASK) << Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_LSB | ++ (api->prop->atv_int_sense.pclnegen & Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_MASK) << Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_LSB | ++ (api->prop->atv_int_sense.chlposen & Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_MASK) << Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_LSB | ++ (api->prop->atv_int_sense.pclposen & Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_MASK) << Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_LSB ; ++ break; ++ #endif /* Si2158_ATV_INT_SENSE_PROP */ ++ #ifdef Si2158_ATV_LIF_FREQ_PROP ++ case Si2158_ATV_LIF_FREQ_PROP_CODE: ++ data = (api->prop->atv_lif_freq.offset & Si2158_ATV_LIF_FREQ_PROP_OFFSET_MASK) << Si2158_ATV_LIF_FREQ_PROP_OFFSET_LSB ; ++ break; ++ #endif /* Si2158_ATV_LIF_FREQ_PROP */ ++ #ifdef Si2158_ATV_LIF_OUT_PROP ++ case Si2158_ATV_LIF_OUT_PROP_CODE: ++ data = (api->prop->atv_lif_out.offset & Si2158_ATV_LIF_OUT_PROP_OFFSET_MASK) << Si2158_ATV_LIF_OUT_PROP_OFFSET_LSB | ++ (api->prop->atv_lif_out.amp & Si2158_ATV_LIF_OUT_PROP_AMP_MASK ) << Si2158_ATV_LIF_OUT_PROP_AMP_LSB ; ++ break; ++ #endif /* Si2158_ATV_LIF_OUT_PROP */ ++ #ifdef Si2158_ATV_PGA_TARGET_PROP ++ case Si2158_ATV_PGA_TARGET_PROP_CODE: ++ data = (api->prop->atv_pga_target.pga_target & Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_MASK ) << Si2158_ATV_PGA_TARGET_PROP_PGA_TARGET_LSB | ++ (api->prop->atv_pga_target.override_enable & Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_MASK) << Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_LSB ; ++ break; ++ #endif /* Si2158_ATV_PGA_TARGET_PROP */ ++ #ifdef Si2158_ATV_RF_TOP_PROP ++ case Si2158_ATV_RF_TOP_PROP_CODE: ++ data = (api->prop->atv_rf_top.atv_rf_top & Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_MASK) << Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_LSB ; ++ break; ++ #endif /* Si2158_ATV_RF_TOP_PROP */ ++ #ifdef Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP ++ case Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_CODE: ++ data = (api->prop->atv_rsq_rssi_threshold.lo & Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_MASK) << Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_LO_LSB | ++ (api->prop->atv_rsq_rssi_threshold.hi & Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_MASK) << Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_HI_LSB ; ++ break; ++ #endif /* Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP */ ++ #ifdef Si2158_ATV_VIDEO_MODE_PROP ++ case Si2158_ATV_VIDEO_MODE_PROP_CODE: ++ data = (api->prop->atv_video_mode.video_sys & Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_MASK ) << Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_LSB | ++ (api->prop->atv_video_mode.color & Si2158_ATV_VIDEO_MODE_PROP_COLOR_MASK ) << Si2158_ATV_VIDEO_MODE_PROP_COLOR_LSB | ++ (api->prop->atv_video_mode.invert_spectrum & Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_MASK) << Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_LSB ; ++ break; ++ #endif /* Si2158_ATV_VIDEO_MODE_PROP */ ++ #ifdef Si2158_ATV_VSNR_CAP_PROP ++ case Si2158_ATV_VSNR_CAP_PROP_CODE: ++ data = (api->prop->atv_vsnr_cap.atv_vsnr_cap & Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_MASK) << Si2158_ATV_VSNR_CAP_PROP_ATV_VSNR_CAP_LSB ; ++ break; ++ #endif /* Si2158_ATV_VSNR_CAP_PROP */ ++ #ifdef Si2158_CRYSTAL_TRIM_PROP ++ case Si2158_CRYSTAL_TRIM_PROP_CODE: ++ data = (api->prop->crystal_trim.xo_cap & Si2158_CRYSTAL_TRIM_PROP_XO_CAP_MASK) << Si2158_CRYSTAL_TRIM_PROP_XO_CAP_LSB ; ++ break; ++ #endif /* Si2158_CRYSTAL_TRIM_PROP */ ++ #ifdef Si2158_DTV_AGC_FREEZE_INPUT_PROP ++ case Si2158_DTV_AGC_FREEZE_INPUT_PROP_CODE: ++ data = (api->prop->dtv_agc_freeze_input.level & Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_MASK) << Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_LSB | ++ (api->prop->dtv_agc_freeze_input.pin & Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_MASK ) << Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_LSB ; ++ break; ++ #endif /* Si2158_DTV_AGC_FREEZE_INPUT_PROP */ ++ #ifdef Si2158_DTV_AGC_SPEED_PROP ++ case Si2158_DTV_AGC_SPEED_PROP_CODE: ++ data = (api->prop->dtv_agc_speed.if_agc_speed & Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_MASK) << Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_LSB | ++ (api->prop->dtv_agc_speed.agc_decim & Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_MASK ) << Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_LSB ; ++ break; ++ #endif /* Si2158_DTV_AGC_SPEED_PROP */ ++ #ifdef Si2158_DTV_CONFIG_IF_PORT_PROP ++ case Si2158_DTV_CONFIG_IF_PORT_PROP_CODE: ++ data = (api->prop->dtv_config_if_port.dtv_out_type & Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_MASK ) << Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LSB | ++ (api->prop->dtv_config_if_port.dtv_agc_source & Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_MASK) << Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_AGC_SOURCE_LSB ; ++ break; ++ #endif /* Si2158_DTV_CONFIG_IF_PORT_PROP */ ++ #ifdef Si2158_DTV_EXT_AGC_PROP ++ case Si2158_DTV_EXT_AGC_PROP_CODE: ++ data = (api->prop->dtv_ext_agc.min_10mv & Si2158_DTV_EXT_AGC_PROP_MIN_10MV_MASK) << Si2158_DTV_EXT_AGC_PROP_MIN_10MV_LSB | ++ (api->prop->dtv_ext_agc.max_10mv & Si2158_DTV_EXT_AGC_PROP_MAX_10MV_MASK) << Si2158_DTV_EXT_AGC_PROP_MAX_10MV_LSB ; ++ break; ++ #endif /* Si2158_DTV_EXT_AGC_PROP */ ++ #ifdef Si2158_DTV_FILTER_SELECT_PROP ++ case Si2158_DTV_FILTER_SELECT_PROP_CODE: ++ data = (api->prop->dtv_filter_select.filter & Si2158_DTV_FILTER_SELECT_PROP_FILTER_MASK) << Si2158_DTV_FILTER_SELECT_PROP_FILTER_LSB ; ++ break; ++ #endif /* Si2158_DTV_FILTER_SELECT_PROP */ ++ #ifdef Si2158_DTV_IEN_PROP ++ case Si2158_DTV_IEN_PROP_CODE: ++ data = (api->prop->dtv_ien.chlien & Si2158_DTV_IEN_PROP_CHLIEN_MASK) << Si2158_DTV_IEN_PROP_CHLIEN_LSB ; ++ break; ++ #endif /* Si2158_DTV_IEN_PROP */ ++ #ifdef Si2158_DTV_INITIAL_AGC_SPEED_PROP ++ case Si2158_DTV_INITIAL_AGC_SPEED_PROP_CODE: ++ data = (api->prop->dtv_initial_agc_speed.if_agc_speed & Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_MASK) << Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_LSB | ++ (api->prop->dtv_initial_agc_speed.agc_decim & Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_MASK ) << Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_LSB ; ++ break; ++ #endif /* Si2158_DTV_INITIAL_AGC_SPEED_PROP */ ++ #ifdef Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP ++ case Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_CODE: ++ data = (api->prop->dtv_initial_agc_speed_period.period & Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_MASK) << Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_PERIOD_LSB ; ++ break; ++ #endif /* Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP */ ++ #ifdef Si2158_DTV_INTERNAL_ZIF_PROP ++ case Si2158_DTV_INTERNAL_ZIF_PROP_CODE: ++ data = (api->prop->dtv_internal_zif.atsc & Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_MASK ) << Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_LSB | ++ (api->prop->dtv_internal_zif.qam_us & Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_MASK) << Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_LSB | ++ (api->prop->dtv_internal_zif.dvbt & Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_MASK ) << Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_LSB | ++ (api->prop->dtv_internal_zif.dvbc & Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_MASK ) << Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_LSB | ++ (api->prop->dtv_internal_zif.isdbt & Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_MASK ) << Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_LSB | ++ (api->prop->dtv_internal_zif.isdbc & Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_MASK ) << Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_LSB | ++ (api->prop->dtv_internal_zif.dtmb & Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_MASK ) << Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_LSB ; ++ break; ++ #endif /* Si2158_DTV_INTERNAL_ZIF_PROP */ ++ #ifdef Si2158_DTV_INT_SENSE_PROP ++ case Si2158_DTV_INT_SENSE_PROP_CODE: ++ data = (api->prop->dtv_int_sense.chlnegen & Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_MASK) << Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_LSB | ++ (api->prop->dtv_int_sense.chlposen & Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_MASK) << Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_LSB ; ++ break; ++ #endif /* Si2158_DTV_INT_SENSE_PROP */ ++ #ifdef Si2158_DTV_LIF_FREQ_PROP ++ case Si2158_DTV_LIF_FREQ_PROP_CODE: ++ data = (api->prop->dtv_lif_freq.offset & Si2158_DTV_LIF_FREQ_PROP_OFFSET_MASK) << Si2158_DTV_LIF_FREQ_PROP_OFFSET_LSB ; ++ break; ++ #endif /* Si2158_DTV_LIF_FREQ_PROP */ ++ #ifdef Si2158_DTV_LIF_OUT_PROP ++ case Si2158_DTV_LIF_OUT_PROP_CODE: ++ data = (api->prop->dtv_lif_out.offset & Si2158_DTV_LIF_OUT_PROP_OFFSET_MASK) << Si2158_DTV_LIF_OUT_PROP_OFFSET_LSB | ++ (api->prop->dtv_lif_out.amp & Si2158_DTV_LIF_OUT_PROP_AMP_MASK ) << Si2158_DTV_LIF_OUT_PROP_AMP_LSB ; ++ break; ++ #endif /* Si2158_DTV_LIF_OUT_PROP */ ++ #ifdef Si2158_DTV_MODE_PROP ++ case Si2158_DTV_MODE_PROP_CODE: ++ data = (api->prop->dtv_mode.bw & Si2158_DTV_MODE_PROP_BW_MASK ) << Si2158_DTV_MODE_PROP_BW_LSB | ++ (api->prop->dtv_mode.modulation & Si2158_DTV_MODE_PROP_MODULATION_MASK ) << Si2158_DTV_MODE_PROP_MODULATION_LSB | ++ (api->prop->dtv_mode.invert_spectrum & Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_MASK) << Si2158_DTV_MODE_PROP_INVERT_SPECTRUM_LSB ; ++ break; ++ #endif /* Si2158_DTV_MODE_PROP */ ++ #ifdef Si2158_DTV_PGA_LIMITS_PROP ++ case Si2158_DTV_PGA_LIMITS_PROP_CODE: ++ data = (api->prop->dtv_pga_limits.min & Si2158_DTV_PGA_LIMITS_PROP_MIN_MASK) << Si2158_DTV_PGA_LIMITS_PROP_MIN_LSB | ++ (api->prop->dtv_pga_limits.max & Si2158_DTV_PGA_LIMITS_PROP_MAX_MASK) << Si2158_DTV_PGA_LIMITS_PROP_MAX_LSB ; ++ break; ++ #endif /* Si2158_DTV_PGA_LIMITS_PROP */ ++ #ifdef Si2158_DTV_PGA_TARGET_PROP ++ case Si2158_DTV_PGA_TARGET_PROP_CODE: ++ data = (api->prop->dtv_pga_target.pga_target & Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_MASK ) << Si2158_DTV_PGA_TARGET_PROP_PGA_TARGET_LSB | ++ (api->prop->dtv_pga_target.override_enable & Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_MASK) << Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_LSB ; ++ break; ++ #endif /* Si2158_DTV_PGA_TARGET_PROP */ ++ #ifdef Si2158_DTV_RF_TOP_PROP ++ case Si2158_DTV_RF_TOP_PROP_CODE: ++ data = (api->prop->dtv_rf_top.dtv_rf_top & Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_MASK) << Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_LSB ; ++ break; ++ #endif /* Si2158_DTV_RF_TOP_PROP */ ++ #ifdef Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP ++ case Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_CODE: ++ data = (api->prop->dtv_rsq_rssi_threshold.lo & Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_MASK) << Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_LO_LSB | ++ (api->prop->dtv_rsq_rssi_threshold.hi & Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_MASK) << Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_HI_LSB ; ++ break; ++ #endif /* Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP */ ++ #ifdef Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP ++ case Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_CODE: ++ data = (api->prop->dtv_zif_dc_canceller_bw.bandwidth & Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_MASK) << Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_LSB ; ++ break; ++ #endif /* Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP */ ++ #ifdef Si2158_MASTER_IEN_PROP ++ case Si2158_MASTER_IEN_PROP_CODE: ++ data = (api->prop->master_ien.tunien & Si2158_MASTER_IEN_PROP_TUNIEN_MASK) << Si2158_MASTER_IEN_PROP_TUNIEN_LSB | ++ (api->prop->master_ien.atvien & Si2158_MASTER_IEN_PROP_ATVIEN_MASK) << Si2158_MASTER_IEN_PROP_ATVIEN_LSB | ++ (api->prop->master_ien.dtvien & Si2158_MASTER_IEN_PROP_DTVIEN_MASK) << Si2158_MASTER_IEN_PROP_DTVIEN_LSB | ++ (api->prop->master_ien.errien & Si2158_MASTER_IEN_PROP_ERRIEN_MASK) << Si2158_MASTER_IEN_PROP_ERRIEN_LSB | ++ (api->prop->master_ien.ctsien & Si2158_MASTER_IEN_PROP_CTSIEN_MASK) << Si2158_MASTER_IEN_PROP_CTSIEN_LSB ; ++ break; ++ #endif /* Si2158_MASTER_IEN_PROP */ ++ #ifdef Si2158_TUNER_BLOCKED_VCO_PROP ++ case Si2158_TUNER_BLOCKED_VCO_PROP_CODE: ++ data = (api->prop->tuner_blocked_vco.vco_code & Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_MASK) << Si2158_TUNER_BLOCKED_VCO_PROP_VCO_CODE_LSB ; ++ break; ++ #endif /* Si2158_TUNER_BLOCKED_VCO_PROP */ ++ #ifdef Si2158_TUNER_IEN_PROP ++ case Si2158_TUNER_IEN_PROP_CODE: ++ data = (api->prop->tuner_ien.tcien & Si2158_TUNER_IEN_PROP_TCIEN_MASK ) << Si2158_TUNER_IEN_PROP_TCIEN_LSB | ++ (api->prop->tuner_ien.rssilien & Si2158_TUNER_IEN_PROP_RSSILIEN_MASK) << Si2158_TUNER_IEN_PROP_RSSILIEN_LSB | ++ (api->prop->tuner_ien.rssihien & Si2158_TUNER_IEN_PROP_RSSIHIEN_MASK) << Si2158_TUNER_IEN_PROP_RSSIHIEN_LSB ; ++ break; ++ #endif /* Si2158_TUNER_IEN_PROP */ ++ #ifdef Si2158_TUNER_INT_SENSE_PROP ++ case Si2158_TUNER_INT_SENSE_PROP_CODE: ++ data = (api->prop->tuner_int_sense.tcnegen & Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_MASK ) << Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_LSB | ++ (api->prop->tuner_int_sense.rssilnegen & Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_MASK) << Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_LSB | ++ (api->prop->tuner_int_sense.rssihnegen & Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_MASK) << Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_LSB | ++ (api->prop->tuner_int_sense.tcposen & Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_MASK ) << Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_LSB | ++ (api->prop->tuner_int_sense.rssilposen & Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_MASK) << Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_LSB | ++ (api->prop->tuner_int_sense.rssihposen & Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_MASK) << Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_LSB ; ++ break; ++ #endif /* Si2158_TUNER_INT_SENSE_PROP */ ++ #ifdef Si2158_TUNER_LO_INJECTION_PROP ++ case Si2158_TUNER_LO_INJECTION_PROP_CODE: ++ data = (api->prop->tuner_lo_injection.band_1 & Si2158_TUNER_LO_INJECTION_PROP_BAND_1_MASK) << Si2158_TUNER_LO_INJECTION_PROP_BAND_1_LSB | ++ (api->prop->tuner_lo_injection.band_2 & Si2158_TUNER_LO_INJECTION_PROP_BAND_2_MASK) << Si2158_TUNER_LO_INJECTION_PROP_BAND_2_LSB | ++ (api->prop->tuner_lo_injection.band_3 & Si2158_TUNER_LO_INJECTION_PROP_BAND_3_MASK) << Si2158_TUNER_LO_INJECTION_PROP_BAND_3_LSB ; ++ break; ++ #endif /* Si2158_TUNER_LO_INJECTION_PROP */ ++ #ifdef Si2158_TUNER_RETURN_LOSS_PROP ++ case Si2158_TUNER_RETURN_LOSS_PROP_CODE: ++ data = (api->prop->tuner_return_loss.config & Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_MASK) << Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_LSB | ++ (api->prop->tuner_return_loss.mode & Si2158_TUNER_RETURN_LOSS_PROP_MODE_MASK ) << Si2158_TUNER_RETURN_LOSS_PROP_MODE_LSB ; ++ break; ++ #endif /* Si2158_TUNER_RETURN_LOSS_PROP */ ++ default : break; ++ } ++#ifdef Si2158_GET_PROPERTY_STRING ++ Si2158_L1_FillPropertyStringText(api, prop_code, (char*)" ", msg); ++ SiTRACE("%s\n",msg); ++#endif /* Si2158_GET_PROPERTY_STRING */ ++ return Si2158_L1_SetProperty(api, prop_code & 0xffff , data); ++ } ++ ++///////////////////////////////////////////////////////////////////////////////////// ++void Si2158_setupATVDefaults (L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_setupATVDefaults \n"); ++ api->prop->atv_afc_range.range_khz = 1000; /* (default 1000) */ ++ ++ api->prop->atv_agc_speed.if_agc_speed = Si2158_ATV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO ; /* (default 'AUTO') */ ++ ++ api->prop->atv_agc_speed_low_rssi.if_agc_speed = Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_IF_AGC_SPEED_158 ; /* (default '158') */ ++ api->prop->atv_agc_speed_low_rssi.thld = -128; /* (default -128) */ ++ ++ api->prop->atv_artificial_snow.gain = Si2158_ATV_ARTIFICIAL_SNOW_PROP_GAIN_AUTO ; /* (default 'AUTO') */ ++ api->prop->atv_artificial_snow.offset = 0; /* (default 0) */ ++ ++ api->prop->atv_config_if_port.atv_out_type = Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_OUT_TYPE_LIF_DIFF_IF1 ; /* (default 'LIF_DIFF_IF1') */ ++ api->prop->atv_config_if_port.atv_agc_source = Si2158_ATV_CONFIG_IF_PORT_PROP_ATV_AGC_SOURCE_INTERNAL ; /* (default 'INTERNAL') */ ++ ++ api->prop->atv_ext_agc.min_10mv = 50; /* (default 50) */ ++ api->prop->atv_ext_agc.max_10mv = 200; /* (default 200) */ ++ ++ api->prop->atv_ien.chlien = Si2158_ATV_IEN_PROP_CHLIEN_ENABLE ; /* (default 'ENABLE') */ ++ api->prop->atv_ien.pclien = Si2158_ATV_IEN_PROP_PCLIEN_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->atv_int_sense.chlnegen = Si2158_ATV_INT_SENSE_PROP_CHLNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->atv_int_sense.pclnegen = Si2158_ATV_INT_SENSE_PROP_PCLNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->atv_int_sense.chlposen = Si2158_ATV_INT_SENSE_PROP_CHLPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ api->prop->atv_int_sense.pclposen = Si2158_ATV_INT_SENSE_PROP_PCLPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ ++ api->prop->atv_lif_freq.offset = 5000; /* (default 5000) */ ++ ++ api->prop->atv_lif_out.offset = 148; /* (default 148) */ ++ api->prop->atv_lif_out.amp = 100; /* (default 100) */ ++ ++ api->prop->atv_pga_target.pga_target = 0; /* (default 0) */ ++ api->prop->atv_pga_target.override_enable = Si2158_ATV_PGA_TARGET_PROP_OVERRIDE_ENABLE_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->atv_rf_top.atv_rf_top = Si2158_ATV_RF_TOP_PROP_ATV_RF_TOP_AUTO ; /* (default 'AUTO') */ ++ ++ api->prop->atv_rsq_rssi_threshold.lo = -70; /* (default -70) */ ++ api->prop->atv_rsq_rssi_threshold.hi = 0; /* (default 0) */ ++ ++ api->prop->atv_video_mode.video_sys = Si2158_ATV_VIDEO_MODE_PROP_VIDEO_SYS_B ; /* (default 'B') */ ++ api->prop->atv_video_mode.color = Si2158_ATV_VIDEO_MODE_PROP_COLOR_PAL_NTSC ; /* (default 'PAL_NTSC') */ ++ api->prop->atv_video_mode.invert_spectrum = Si2158_ATV_VIDEO_MODE_PROP_INVERT_SPECTRUM_INVERTED ; /* (default 'INVERTED') */ ++ ++ api->prop->atv_vsnr_cap.atv_vsnr_cap = 0; /* (default 0) */ ++ ++} ++ ++void Si2158_setupCOMMONDefaults (L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_setupCOMMONDefaults \n"); ++ api->prop->crystal_trim.xo_cap = 8; /* (default 8) */ ++ ++ api->prop->master_ien.tunien = Si2158_MASTER_IEN_PROP_TUNIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.atvien = Si2158_MASTER_IEN_PROP_ATVIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.dtvien = Si2158_MASTER_IEN_PROP_DTVIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.errien = Si2158_MASTER_IEN_PROP_ERRIEN_OFF ; /* (default 'OFF') */ ++ api->prop->master_ien.ctsien = Si2158_MASTER_IEN_PROP_CTSIEN_OFF ; /* (default 'OFF') */ ++ ++} ++ ++void Si2158_setupDTVDefaults (L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_setupDTVDefaults \n"); ++ api->prop->dtv_agc_freeze_input.level = Si2158_DTV_AGC_FREEZE_INPUT_PROP_LEVEL_LOW ; /* (default 'LOW') */ ++ api->prop->dtv_agc_freeze_input.pin = Si2158_DTV_AGC_FREEZE_INPUT_PROP_PIN_NONE ; /* (default 'NONE') */ ++ ++ api->prop->dtv_agc_speed.if_agc_speed = Si2158_DTV_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO ; /* (default 'AUTO') */ ++ api->prop->dtv_agc_speed.agc_decim = Si2158_DTV_AGC_SPEED_PROP_AGC_DECIM_OFF ; /* (default 'OFF') */ ++ ++ api->prop->dtv_config_if_port.dtv_out_type = Si2158_DTV_CONFIG_IF_PORT_PROP_DTV_OUT_TYPE_LIF_IF2 ; /* (default 'LIF_IF2') */ ++ api->prop->dtv_config_if_port.dtv_agc_source = 0; /* (default 0) */ ++ ++ api->prop->dtv_ext_agc.min_10mv = 50; /* (default 50) */ ++ api->prop->dtv_ext_agc.max_10mv = 200; /* (default 200) */ ++ ++ api->prop->dtv_filter_select.filter = Si2158_DTV_FILTER_SELECT_PROP_FILTER_CUSTOM1 ; /* (default 'CUSTOM1') */ ++ ++ api->prop->dtv_ien.chlien = Si2158_DTV_IEN_PROP_CHLIEN_ENABLE ; /* (default 'ENABLE') */ ++ ++ api->prop->dtv_initial_agc_speed.if_agc_speed = Si2158_DTV_INITIAL_AGC_SPEED_PROP_IF_AGC_SPEED_AUTO ; /* (default 'AUTO') */ ++ api->prop->dtv_initial_agc_speed.agc_decim = Si2158_DTV_INITIAL_AGC_SPEED_PROP_AGC_DECIM_OFF ; /* (default 'OFF') */ ++ ++ api->prop->dtv_initial_agc_speed_period.period = 0; /* (default 0) */ ++ ++ api->prop->dtv_internal_zif.atsc = Si2158_DTV_INTERNAL_ZIF_PROP_ATSC_LIF ; /* (default 'LIF') */ ++ api->prop->dtv_internal_zif.qam_us = Si2158_DTV_INTERNAL_ZIF_PROP_QAM_US_LIF ; /* (default 'LIF') */ ++ api->prop->dtv_internal_zif.dvbt = Si2158_DTV_INTERNAL_ZIF_PROP_DVBT_LIF ; /* (default 'LIF') */ ++ api->prop->dtv_internal_zif.dvbc = Si2158_DTV_INTERNAL_ZIF_PROP_DVBC_LIF ; /* (default 'LIF') */ ++ api->prop->dtv_internal_zif.isdbt = Si2158_DTV_INTERNAL_ZIF_PROP_ISDBT_LIF ; /* (default 'LIF') */ ++ api->prop->dtv_internal_zif.isdbc = Si2158_DTV_INTERNAL_ZIF_PROP_ISDBC_LIF ; /* (default 'LIF') */ ++ api->prop->dtv_internal_zif.dtmb = Si2158_DTV_INTERNAL_ZIF_PROP_DTMB_LIF ; /* (default 'LIF') */ ++ ++ api->prop->dtv_int_sense.chlnegen = Si2158_DTV_INT_SENSE_PROP_CHLNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->dtv_int_sense.chlposen = Si2158_DTV_INT_SENSE_PROP_CHLPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ ++ api->prop->dtv_lif_freq.offset = 5000; /* (default 5000) */ ++ ++ api->prop->dtv_lif_out.offset = 148; /* (default 148) */ ++ api->prop->dtv_lif_out.amp = 27; /* (default 27) */ ++ ++ api->prop->dtv_mode.bw = Si2158_DTV_MODE_PROP_BW_BW_8MHZ ; /* (default 'BW_8MHZ') */ ++ api->prop->dtv_mode.modulation = Si2158_DTV_MODE_PROP_MODULATION_DVBT ; /* (default 'DVBT') */ ++ api->prop->dtv_mode.invert_spectrum = 0; /* (default 0) */ ++ ++ api->prop->dtv_pga_limits.min = -1; /* (default -1) */ ++ api->prop->dtv_pga_limits.max = -1; /* (default -1) */ ++ ++ api->prop->dtv_pga_target.pga_target = 0; /* (default 0) */ ++ api->prop->dtv_pga_target.override_enable = Si2158_DTV_PGA_TARGET_PROP_OVERRIDE_ENABLE_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->dtv_rf_top.dtv_rf_top = Si2158_DTV_RF_TOP_PROP_DTV_RF_TOP_AUTO ; /* (default 'AUTO') */ ++ ++ api->prop->dtv_rsq_rssi_threshold.lo = -80; /* (default -80) */ ++ api->prop->dtv_rsq_rssi_threshold.hi = 0; /* (default 0) */ ++ ++ api->prop->dtv_zif_dc_canceller_bw.bandwidth = Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_BANDWIDTH_DEFAULT ; /* (default 'DEFAULT') */ ++ ++} ++ ++void Si2158_setupTUNERDefaults (L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_setupTUNERDefaults \n"); ++ api->prop->tuner_blocked_vco.vco_code = 0x8000; /* (default 0x8000) */ ++ ++ api->prop->tuner_ien.tcien = Si2158_TUNER_IEN_PROP_TCIEN_ENABLE ; /* (default 'ENABLE') */ ++ api->prop->tuner_ien.rssilien = Si2158_TUNER_IEN_PROP_RSSILIEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->tuner_ien.rssihien = Si2158_TUNER_IEN_PROP_RSSIHIEN_DISABLE ; /* (default 'DISABLE') */ ++ ++ api->prop->tuner_int_sense.tcnegen = Si2158_TUNER_INT_SENSE_PROP_TCNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->tuner_int_sense.rssilnegen = Si2158_TUNER_INT_SENSE_PROP_RSSILNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->tuner_int_sense.rssihnegen = Si2158_TUNER_INT_SENSE_PROP_RSSIHNEGEN_DISABLE ; /* (default 'DISABLE') */ ++ api->prop->tuner_int_sense.tcposen = Si2158_TUNER_INT_SENSE_PROP_TCPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ api->prop->tuner_int_sense.rssilposen = Si2158_TUNER_INT_SENSE_PROP_RSSILPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ api->prop->tuner_int_sense.rssihposen = Si2158_TUNER_INT_SENSE_PROP_RSSIHPOSEN_ENABLE ; /* (default 'ENABLE') */ ++ ++ api->prop->tuner_lo_injection.band_1 = Si2158_TUNER_LO_INJECTION_PROP_BAND_1_HIGH_SIDE ; /* (default 'HIGH_SIDE') */ ++ api->prop->tuner_lo_injection.band_2 = Si2158_TUNER_LO_INJECTION_PROP_BAND_2_LOW_SIDE ; /* (default 'LOW_SIDE') */ ++ api->prop->tuner_lo_injection.band_3 = Si2158_TUNER_LO_INJECTION_PROP_BAND_3_LOW_SIDE ; /* (default 'LOW_SIDE') */ ++ ++ api->prop->tuner_return_loss.config = Si2158_TUNER_RETURN_LOSS_PROP_CONFIG_127 ; /* (default '127') */ ++ api->prop->tuner_return_loss.mode = Si2158_TUNER_RETURN_LOSS_PROP_MODE_TERRESTRIAL ; /* (default 'TERRESTRIAL') */ ++ ++} ++ ++void Si2158_setupAllDefaults (L1_Si2158_Context *api) ++{ ++ Si2158_setupATVDefaults (api); ++ Si2158_setupCOMMONDefaults (api); ++ Si2158_setupDTVDefaults (api); ++ Si2158_setupTUNERDefaults (api); ++} ++ ++ /***************************************************************************************** ++ NAME: Si2158_downloadATVProperties ++ DESCRIPTION: Setup Si2158 ATV properties configuration ++ This function will download all the ATV configuration properties. ++ The function SetupATVDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2158 Context ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++ Programming Guide Reference: ATV setup flowchart ++******************************************************************************************/ ++int Si2158_downloadATVProperties(L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_downloadATVProperties \n"); ++#ifdef Si2158_ATV_AFC_RANGE_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_AFC_RANGE_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_AFC_RANGE_PROP */ ++#ifdef Si2158_ATV_AGC_SPEED_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_AGC_SPEED_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_AGC_SPEED_PROP */ ++#ifdef Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_AGC_SPEED_LOW_RSSI_PROP */ ++#ifdef Si2158_ATV_ARTIFICIAL_SNOW_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_ARTIFICIAL_SNOW_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_ARTIFICIAL_SNOW_PROP */ ++#ifdef Si2158_ATV_CONFIG_IF_PORT_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_CONFIG_IF_PORT_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_CONFIG_IF_PORT_PROP */ ++#ifdef Si2158_ATV_EXT_AGC_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_EXT_AGC_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_EXT_AGC_PROP */ ++#ifdef Si2158_ATV_IEN_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_IEN_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_IEN_PROP */ ++#ifdef Si2158_ATV_INT_SENSE_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_INT_SENSE_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_INT_SENSE_PROP */ ++#ifdef Si2158_ATV_LIF_FREQ_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_LIF_FREQ_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_LIF_FREQ_PROP */ ++#ifdef Si2158_ATV_LIF_OUT_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_LIF_OUT_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_LIF_OUT_PROP */ ++#ifdef Si2158_ATV_PGA_TARGET_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_PGA_TARGET_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_PGA_TARGET_PROP */ ++#ifdef Si2158_ATV_RF_TOP_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_RF_TOP_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_RF_TOP_PROP */ ++#ifdef Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_RSQ_RSSI_THRESHOLD_PROP */ ++#ifdef Si2158_ATV_VIDEO_MODE_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_VIDEO_MODE_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_VIDEO_MODE_PROP */ ++#ifdef Si2158_ATV_VSNR_CAP_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_ATV_VSNR_CAP_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_ATV_VSNR_CAP_PROP */ ++return NO_Si2158_ERROR; ++} ++ ++ /***************************************************************************************** ++ NAME: Si2158_downloadCOMMONProperties ++ DESCRIPTION: Setup Si2158 COMMON properties configuration ++ This function will download all the COMMON configuration properties. ++ The function SetupCOMMONDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2158 Context ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++ Programming Guide Reference: COMMON setup flowchart ++******************************************************************************************/ ++int Si2158_downloadCOMMONProperties(L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_downloadCOMMONProperties \n"); ++#ifdef Si2158_CRYSTAL_TRIM_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_CRYSTAL_TRIM_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_CRYSTAL_TRIM_PROP */ ++#ifdef Si2158_MASTER_IEN_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_MASTER_IEN_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_MASTER_IEN_PROP */ ++return NO_Si2158_ERROR; ++} ++ ++ /***************************************************************************************** ++ NAME: Si2158_downloadDTVProperties ++ DESCRIPTION: Setup Si2158 DTV properties configuration ++ This function will download all the DTV configuration properties. ++ The function SetupDTVDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2158 Context ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++ Programming Guide Reference: DTV setup flowchart ++******************************************************************************************/ ++int Si2158_downloadDTVProperties(L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_downloadDTVProperties \n"); ++#ifdef Si2158_DTV_AGC_FREEZE_INPUT_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_FREEZE_INPUT_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_AGC_FREEZE_INPUT_PROP */ ++#ifdef Si2158_DTV_AGC_SPEED_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_AGC_SPEED_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_AGC_SPEED_PROP */ ++#ifdef Si2158_DTV_CONFIG_IF_PORT_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_CONFIG_IF_PORT_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_CONFIG_IF_PORT_PROP */ ++#ifdef Si2158_DTV_EXT_AGC_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_EXT_AGC_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_EXT_AGC_PROP */ ++#ifdef Si2158_DTV_FILTER_SELECT_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_FILTER_SELECT_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_FILTER_SELECT_PROP */ ++#ifdef Si2158_DTV_IEN_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_IEN_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_IEN_PROP */ ++#ifdef Si2158_DTV_INITIAL_AGC_SPEED_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_INITIAL_AGC_SPEED_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_INITIAL_AGC_SPEED_PROP */ ++#ifdef Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP_CODE) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_INITIAL_AGC_SPEED_PERIOD_PROP */ ++#ifdef Si2158_DTV_INTERNAL_ZIF_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_INTERNAL_ZIF_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_INTERNAL_ZIF_PROP */ ++#ifdef Si2158_DTV_INT_SENSE_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_INT_SENSE_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_INT_SENSE_PROP */ ++#ifdef Si2158_DTV_LIF_FREQ_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_LIF_FREQ_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_LIF_FREQ_PROP */ ++#ifdef Si2158_DTV_LIF_OUT_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_LIF_OUT_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_LIF_OUT_PROP */ ++#ifdef Si2158_DTV_MODE_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_MODE_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_MODE_PROP */ ++#ifdef Si2158_DTV_PGA_LIMITS_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_PGA_LIMITS_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_PGA_LIMITS_PROP */ ++#ifdef Si2158_DTV_PGA_TARGET_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_PGA_TARGET_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_PGA_TARGET_PROP */ ++#ifdef Si2158_DTV_RF_TOP_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_RF_TOP_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_RF_TOP_PROP */ ++#ifdef Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_RSQ_RSSI_THRESHOLD_PROP */ ++#ifdef Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_DTV_ZIF_DC_CANCELLER_BW_PROP */ ++return NO_Si2158_ERROR; ++} ++ ++ /***************************************************************************************** ++ NAME: Si2158_downloadTUNERProperties ++ DESCRIPTION: Setup Si2158 TUNER properties configuration ++ This function will download all the TUNER configuration properties. ++ The function SetupTUNERDefaults() should be called before the first call to this function. ++ Parameter: Pointer to Si2158 Context ++ Returns: I2C transaction error code, NO_Si2158_ERROR if successful ++ Programming Guide Reference: TUNER setup flowchart ++******************************************************************************************/ ++int Si2158_downloadTUNERProperties(L1_Si2158_Context *api) ++{ ++ SiTRACE("Si2158_downloadTUNERProperties \n"); ++#ifdef Si2158_TUNER_BLOCKED_VCO_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_TUNER_BLOCKED_VCO_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_TUNER_BLOCKED_VCO_PROP */ ++#ifdef Si2158_TUNER_IEN_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_TUNER_IEN_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_TUNER_IEN_PROP */ ++#ifdef Si2158_TUNER_INT_SENSE_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_TUNER_INT_SENSE_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_TUNER_INT_SENSE_PROP */ ++#ifdef Si2158_TUNER_LO_INJECTION_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_TUNER_LO_INJECTION_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_TUNER_LO_INJECTION_PROP */ ++#ifdef Si2158_TUNER_RETURN_LOSS_PROP ++ if (Si2158_L1_SetProperty2(api, Si2158_TUNER_RETURN_LOSS_PROP_CODE ) != NO_Si2158_ERROR) {return ERROR_Si2158_SENDING_COMMAND;} ++#endif /* Si2158_TUNER_RETURN_LOSS_PROP */ ++return NO_Si2158_ERROR; ++} ++int Si2158_downloadAllProperties (L1_Si2158_Context *api) ++{ ++ Si2158_downloadATVProperties (api); ++ Si2158_downloadCOMMONProperties (api); ++ Si2158_downloadDTVProperties (api); ++ Si2158_downloadTUNERProperties (api); ++ return 0; ++} ++ /************************************************************************************************************************ ++ NAME: Si2158_Tune ++ DESCRIPTIION: Tune Si2158 in specified mode (ATV/DTV) at center frequency, wait for TUNINT and xTVINT with timeout ++ ++ Parameter: Pointer to Si2158 Context (I2C address) ++ Parameter: Mode (ATV or DTV) use Si2158_TUNER_TUNE_FREQ_CMD_MODE_ATV or Si2158_TUNER_TUNE_FREQ_CMD_MODE_DTV constants ++ Parameter: frequency (Hz) as a unsigned long integer ++ Parameter: rsp - commandResp structure to returns tune status info. ++ Returns: 0 if channel found. A nonzero value means either an error occurred or channel not locked. ++ Programming Guide Reference: Flowchart A.7 (Tune flowchart) ++************************************************************************************************************************/ ++ int Si2158_Tune (L1_Si2158_Context *api, unsigned char mode, unsigned long freq) ++{ ++ int return_code = 0; ++ int timeout = 150; ++ u32 ulCount, ulTick, ulDelay; ++ ulCount = 0; ++ ulTick = 3; ++ ulDelay = timeout/ulTick; ++ ++ //start_time = system_time(); ++ ++ if (Si2158_L1_TUNER_TUNE_FREQ (api, ++ mode, ++ freq) != NO_Si2158_ERROR) ++ { ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ /* wait for TUNINT, timeout is 150ms */ ++ //while ( (system_time() - start_time) < timeout ) ++ while ( ulCount <= ulTick ) ++ { ++ if ((return_code = Si2158_L1_CheckStatus(api)) != 0) ++ return return_code; ++ if (api->status->tunint) ++ break; ++ ++ delayMS(ulDelay); ++ ulCount++; ++ } ++ if (!api->status->tunint) { ++ SiTRACE("Timeout waiting for TUNINT\n"); ++ return ERROR_Si2158_TUNINT_TIMEOUT; ++ } ++ ++ /* wait for xTVINT, timeout is 350ms for ATVINT and 20 ms for DTVINT */ ++ //start_time = system_time(); ++ timeout = ((mode==Si2158_TUNER_TUNE_FREQ_CMD_MODE_ATV) ? 350 : 20); ++ ulCount = 0; ++ ulTick = 2; ++ ulDelay = timeout/ulTick; ++ ++ //while ( (system_time() - start_time) < timeout ) ++ while ( ulCount <= ulTick ) ++ { ++ if ((return_code = Si2158_L1_CheckStatus(api)) != 0) ++ return return_code; ++ if (mode==Si2158_TUNER_TUNE_FREQ_CMD_MODE_ATV) ++ { ++ if (api->status->atvint) ++ break; ++ } ++ else ++ { ++ if (api->status->dtvint) ++ break; ++ } ++ delayMS(ulDelay); ++ ulCount++; ++ } ++ ++ if (mode==Si2158_TUNER_TUNE_FREQ_CMD_MODE_ATV) ++ { ++ if (api->status->atvint) ++ { ++ SiTRACE("ATV Tune Successful\n"); ++ return NO_Si2158_ERROR; ++ } ++ else ++ SiTRACE("Timeout waiting for ATVINT\n"); ++ } ++ else ++ { ++ if (api->status->dtvint) ++ { ++ SiTRACE("DTV Tune Successful\n"); ++ return NO_Si2158_ERROR; ++ } ++ else ++ SiTRACE("Timeout waiting for DTVINT\n"); ++ } ++ ++ return ERROR_Si2158_xTVINT_TIMEOUT; ++} ++ ++ /************************************************************************************************************************ ++ NAME: Si2158_DTVTune ++ DESCRIPTION: Update DTV_MODE and tune DTV mode at center frequency ++ Parameter: Pointer to Si2158 Context (I2C address) ++ Parameter: frequency (Hz) ++ Parameter: bandwidth , 6,7 or 8 MHz ++ Parameter: modulation, e.g. use constant Si2158_DTV_MODE_PROP_MODULATION_DVBT for DVBT mode ++ Parameter: rsp - commandResp structure to returns tune status info. ++ Returns: I2C transaction error code, 0 if successful ++ Programming Guide Reference: Flowchart A.7 (Tune flowchart) ++************************************************************************************************************************/ ++int Si2158_DTVTune (L1_Si2158_Context *api, unsigned long freq, unsigned char bw, unsigned char modulation, unsigned char invert_spectrum) ++{ ++ int return_code; ++ return_code = NO_Si2158_ERROR; ++ ++ /* update DTV_MODE_PROP property */ ++ api->prop->dtv_mode.bw = bw; ++ api->prop->dtv_mode.invert_spectrum = invert_spectrum; ++ api->prop->dtv_mode.modulation = modulation; ++ if (Si2158_L1_SetProperty2(api, Si2158_DTV_MODE_PROP) != NO_Si2158_ERROR) ++ { ++ return ERROR_Si2158_SENDING_COMMAND; ++ } ++ ++ return_code = Si2158_Tune (api, Si2158_TUNER_TUNE_FREQ_CMD_MODE_DTV, freq); ++ ++ return return_code; ++} +diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c +--- a/drivers/media/pci/cx23885/cimax2.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cimax2.c 2013-03-31 22:03:29.000000000 +0800 +@@ -415,7 +415,7 @@ return state->status; } @@ -4575,7 +22319,7 @@ index 7344849..369ae7c 100644 { struct netup_ci_state *state; u8 cimax_init[34] = { -@@ -464,6 +464,11 @@ int netup_ci_init(struct cx23885_tsport *port) +@@ -464,6 +464,11 @@ goto err; } @@ -4587,7 +22331,7 @@ index 7344849..369ae7c 100644 port->port_priv = state; switch (port->nr) { -@@ -537,3 +542,19 @@ void netup_ci_exit(struct cx23885_tsport *port) +@@ -537,3 +542,19 @@ dvb_ca_en50221_release(&state->ca); kfree(state); } @@ -4607,11 +22351,10 @@ index 7344849..369ae7c 100644 + + return 1; +} -diff --git a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h -index 518744a..39f3db7 100644 ---- a/drivers/media/pci/cx23885/cimax2.h -+++ b/drivers/media/pci/cx23885/cimax2.h -@@ -41,7 +41,9 @@ extern int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot); +diff -urN a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h +--- a/drivers/media/pci/cx23885/cimax2.h 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cimax2.h 2013-01-30 12:34:37.000000000 +0800 +@@ -41,7 +41,9 @@ extern int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status); extern int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open); @@ -4622,11 +22365,10 @@ index 518744a..39f3db7 100644 +extern int dvbsky_ci_slot_status(struct cx23885_dev *dev); + #endif -diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c -index 6277e14..d163c41 100644 ---- a/drivers/media/pci/cx23885/cx23885-cards.c -+++ b/drivers/media/pci/cx23885/cx23885-cards.c -@@ -569,9 +569,32 @@ struct cx23885_board cx23885_boards[] = { +diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c +--- a/drivers/media/pci/cx23885/cx23885-cards.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cx23885-cards.c 2013-03-31 22:07:39.000000000 +0800 +@@ -569,9 +569,42 @@ .name = "TeVii S471", .portb = CX23885_MPEG_DVB, }, @@ -4655,13 +22397,23 @@ index 6277e14..d163c41 100644 + .name = "DVBSKY C2800E DVB-C CI", + .portb = CX23885_MPEG_DVB, + }, ++ [CX23885_BOARD_DVBSKY_T9580] = { ++ .name = "DVBSKY T9580", ++ .portb = CX23885_MPEG_DVB, ++ .portc = CX23885_MPEG_DVB, ++ }, ++ [CX23885_BOARD_DVBSKY_T980_CI] = { ++ .ci_type = 3, ++ .name = "DVBSKY T980CI DVB-T2/C CI", ++ .portb = CX23885_MPEG_DVB, ++ }, + [CX23885_BOARD_PROF_8000] = { + .name = "Prof Revolution DVB-S2 8000", + .portb = CX23885_MPEG_DVB, } }; const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); -@@ -785,9 +808,29 @@ struct cx23885_subid cx23885_subids[] = { +@@ -785,9 +818,37 @@ .subdevice = 0x9022, .card = CX23885_BOARD_TEVII_S471, }, { @@ -4687,6 +22439,14 @@ index 6277e14..d163c41 100644 + .subvendor = 0x4254, + .subdevice = 0x2800, + .card = CX23885_BOARD_DVBSKY_C2800E_CI, ++ }, { ++ .subvendor = 0x4254, ++ .subdevice = 0x9580, ++ .card = CX23885_BOARD_DVBSKY_T9580, ++ }, { ++ .subvendor = 0x4254, ++ .subdevice = 0x980C, ++ .card = CX23885_BOARD_DVBSKY_T980_CI, + }, { + .subvendor = 0x8000, + .subdevice = 0x3034, @@ -4694,7 +22454,7 @@ index 6277e14..d163c41 100644 }, }; const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); -@@ -1167,7 +1210,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) +@@ -1167,7 +1228,7 @@ cx_set(GP0_IO, 0x00040004); break; case CX23885_BOARD_TBS_6920: @@ -4703,7 +22463,7 @@ index 6277e14..d163c41 100644 cx_write(MC417_CTL, 0x00000036); cx_write(MC417_OEN, 0x00001000); cx_set(MC417_RWD, 0x00000002); -@@ -1301,9 +1344,83 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) +@@ -1301,9 +1362,85 @@ /* enable irq */ cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ break; @@ -4714,7 +22474,8 @@ index 6277e14..d163c41 100644 + msleep(100); + cx23885_gpio_set(dev, GPIO_2); + break; -+ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_T9580: + cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ + + cx23885_gpio_enable(dev, GPIO_2, 1); @@ -4728,6 +22489,7 @@ index 6277e14..d163c41 100644 + break; + case CX23885_BOARD_DVBSKY_S950_CI: + case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T980_CI: + /* GPIO-0 INTA from CiMax, input + GPIO-1 reset CiMax, output, high active + GPIO-2 reset demod, output, low active @@ -4787,7 +22549,7 @@ index 6277e14..d163c41 100644 int cx23885_ir_init(struct cx23885_dev *dev) { static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { -@@ -1388,6 +1505,22 @@ int cx23885_ir_init(struct cx23885_dev *dev) +@@ -1388,6 +1525,24 @@ v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, ir_rx_pin_cfg_count, ir_rx_pin_cfg); break; @@ -4795,7 +22557,9 @@ index 6277e14..d163c41 100644 + case CX23885_BOARD_DVBSKY_S950: + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: + dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); + if (dev->sd_ir == NULL) { + ret = -ENODEV; @@ -4810,7 +22574,7 @@ index 6277e14..d163c41 100644 case CX23885_BOARD_HAUPPAUGE_HVR1250: if (!enable_885_ir) break; -@@ -1420,6 +1553,11 @@ void cx23885_ir_fini(struct cx23885_dev *dev) +@@ -1420,6 +1575,13 @@ case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_HAUPPAUGE_HVR1250: @@ -4818,11 +22582,13 @@ index 6277e14..d163c41 100644 + case CX23885_BOARD_DVBSKY_S950: + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: cx23885_irq_remove(dev, PCI_MSK_AV_CORE); /* sd_ir is a duplicate pointer to the AV Core, just clear it */ dev->sd_ir = NULL; -@@ -1464,6 +1602,11 @@ void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) +@@ -1464,6 +1626,13 @@ case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_HAUPPAUGE_HVR1250: @@ -4830,11 +22596,13 @@ index 6277e14..d163c41 100644 + case CX23885_BOARD_DVBSKY_S950: + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: if (dev->sd_ir) cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); break; -@@ -1549,6 +1692,10 @@ void cx23885_card_setup(struct cx23885_dev *dev) +@@ -1549,6 +1718,11 @@ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; @@ -4842,10 +22610,11 @@ index 6277e14..d163c41 100644 + case CX23885_BOARD_DVBSKY_S950: + case CX23885_BOARD_DVBSKY_S950_CI: + case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T980_CI: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_TEVII_S471: case CX23885_BOARD_DVBWORLD_2005: -@@ -1581,6 +1728,14 @@ void cx23885_card_setup(struct cx23885_dev *dev) +@@ -1581,6 +1755,22 @@ ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; @@ -4857,10 +22626,18 @@ index 6277e14..d163c41 100644 + ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ + ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; + break; ++ case CX23885_BOARD_DVBSKY_T9580: ++ ts1->gen_ctrl_val = 0x5; /* Parallel */ ++ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ++ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; ++ ts2->gen_ctrl_val = 0x8; /* Serial bus */ ++ ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ++ ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; ++ break; case CX23885_BOARD_HAUPPAUGE_HVR1250: case CX23885_BOARD_HAUPPAUGE_HVR1500: case CX23885_BOARD_HAUPPAUGE_HVR1500Q: -@@ -1636,6 +1791,11 @@ void cx23885_card_setup(struct cx23885_dev *dev) +@@ -1636,6 +1826,13 @@ case CX23885_BOARD_MPX885: case CX23885_BOARD_MYGICA_X8507: case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: @@ -4869,14 +22646,15 @@ index 6277e14..d163c41 100644 + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: + case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_bus[2].i2c_adap, "cx25840", 0x88 >> 1, NULL); -diff --git a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c -index f0416a6..bb8130a 100644 ---- a/drivers/media/pci/cx23885/cx23885-core.c -+++ b/drivers/media/pci/cx23885/cx23885-core.c -@@ -1909,6 +1909,10 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id) +diff -urN a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c +--- a/drivers/media/pci/cx23885/cx23885-core.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cx23885-core.c 2013-03-31 22:10:36.000000000 +0800 +@@ -1909,6 +1909,10 @@ (pci_status & PCI_MSK_GPIO0)) handled += altera_ci_irq(dev); @@ -4887,29 +22665,30 @@ index f0416a6..bb8130a 100644 if (ts1_status) { if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) handled += cx23885_irq_ts(ts1, ts1_status); -@@ -2144,6 +2148,8 @@ static int cx23885_initdev(struct pci_dev *pci_dev, +@@ -2144,6 +2148,9 @@ cx23885_irq_add_enable(dev, PCI_MSK_GPIO1 | PCI_MSK_GPIO0); break; case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: + case CX23885_BOARD_DVBSKY_S950_CI: + case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T980_CI: cx23885_irq_add_enable(dev, PCI_MSK_GPIO0); break; } -diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c -index 2f5b902..4319f35 100644 ---- a/drivers/media/pci/cx23885/cx23885-dvb.c -+++ b/drivers/media/pci/cx23885/cx23885-dvb.c -@@ -51,6 +51,8 @@ +diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c +--- a/drivers/media/pci/cx23885/cx23885-dvb.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cx23885-dvb.c 2013-03-31 22:12:40.000000000 +0800 +@@ -51,6 +51,9 @@ #include "stv6110.h" #include "lnbh24.h" #include "cx24116.h" +#include "m88ds3103.h" +#include "m88dc2800.h" ++#include "si2168.h" #include "cimax2.h" #include "lgs8gxx.h" #include "netup-eeprom.h" -@@ -63,8 +65,8 @@ +@@ -63,8 +66,8 @@ #include "stv0367.h" #include "drxk.h" #include "mt2063.h" @@ -4920,7 +22699,7 @@ index 2f5b902..4319f35 100644 #include "stb6100_cfg.h" static unsigned int debug; -@@ -492,40 +494,76 @@ static struct xc5000_config mygica_x8506_xc5000_config = { +@@ -492,42 +495,142 @@ .if_khz = 5380, }; @@ -4939,6 +22718,71 @@ index 2f5b902..4319f35 100644 - .tuner_set_frequency = stb6100_set_frequency, - .tuner_set_bandwidth = stb6100_set_bandwidth, - .tuner_get_bandwidth = stb6100_get_bandwidth, +-}; +- +-static struct stb6100_config prof_8000_stb6100_config = { +- .tuner_address = 0x60, +- .refclock = 27000000, +-}; + +-static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++/* bst control */ ++int bst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) + { + struct cx23885_tsport *port = fe->dvb->priv; + struct cx23885_dev *dev = port->dev; ++ ++ cx23885_gpio_enable(dev, GPIO_1, 1); ++ cx23885_gpio_enable(dev, GPIO_0, 1); ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ cx23885_gpio_set(dev, GPIO_1); ++ cx23885_gpio_clear(dev, GPIO_0); ++ break; ++ case SEC_VOLTAGE_18: ++ cx23885_gpio_set(dev, GPIO_1); ++ cx23885_gpio_set(dev, GPIO_0); ++ break; ++ case SEC_VOLTAGE_OFF: ++ cx23885_gpio_clear(dev, GPIO_1); ++ cx23885_gpio_clear(dev, GPIO_0); ++ break; ++ } ++ return 0; ++} + +- if (voltage == SEC_VOLTAGE_18) +- cx_write(MC417_RWD, 0x00001e00); +- else if (voltage == SEC_VOLTAGE_13) +- cx_write(MC417_RWD, 0x00001a00); +- else +- cx_write(MC417_RWD, 0x00001800); ++int dvbsky_set_voltage_sec(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct cx23885_tsport *port = fe->dvb->priv; ++ struct cx23885_dev *dev = port->dev; ++ ++ cx23885_gpio_enable(dev, GPIO_12, 1); ++ cx23885_gpio_enable(dev, GPIO_13, 1); ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ cx23885_gpio_set(dev, GPIO_13); ++ cx23885_gpio_clear(dev, GPIO_12); ++ break; ++ case SEC_VOLTAGE_18: ++ cx23885_gpio_set(dev, GPIO_13); ++ cx23885_gpio_set(dev, GPIO_12); ++ break; ++ case SEC_VOLTAGE_OFF: ++ cx23885_gpio_clear(dev, GPIO_13); ++ cx23885_gpio_clear(dev, GPIO_12); ++ break; ++ } + return 0; + } + +/* bestunar single dvb-s2 */ +static struct m88ds3103_config bst_ds3103_config = { + .demod_address = 0x68, @@ -4961,34 +22805,32 @@ index 2f5b902..4319f35 100644 + .pin_ctrl = 0x82, + .ts_mode = 1, + .set_voltage = dvbsky_set_voltage_sec, - }; - --static struct stb6100_config prof_8000_stb6100_config = { -- .tuner_address = 0x60, -- .refclock = 27000000, ++}; ++ +static struct m88ds3103_config dvbsky_ds3103_ci_config = { + .demod_address = 0x68, + .ci_mode = 2, + .pin_ctrl = 0x82, + .ts_mode = 0, - }; - --static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) --{ -- struct cx23885_tsport *port = fe->dvb->priv; -- struct cx23885_dev *dev = port->dev; ++}; ++ +static struct m88dc2800_config dvbsky_dc2800_config = { + .demod_address = 0x1c, + .ts_mode = 3, +}; - -- if (voltage == SEC_VOLTAGE_18) -- cx_write(MC417_RWD, 0x00001e00); -- else if (voltage == SEC_VOLTAGE_13) -- cx_write(MC417_RWD, 0x00001a00); -- else -- cx_write(MC417_RWD, 0x00001800); -- return 0; ++ ++static struct si2168_config dvbsky_si2168_config_pci_p = { ++ .ts_bus_mode = 2, ++ .ts_clock_mode = 0, ++ .start_ctrl = NULL, ++}; ++ ++static struct si2168_config dvbsky_si2168_config_pci_s = { ++ .ts_bus_mode = 1, ++ .ts_clock_mode = 0, ++ .start_ctrl = NULL, ++}; ++ +static struct stv090x_config prof_8000_stv090x_config = { + .device = STV0903, + .demod_mode = STV090x_SINGLE, @@ -5023,10 +22865,12 @@ index 2f5b902..4319f35 100644 + else + cx_write(MC417_RWD, 0x00001800); + return 0; - } - ++} ++ static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) -@@ -1225,22 +1263,63 @@ static int dvb_register(struct cx23885_tsport *port) + { + struct dtv_frontend_properties *p = &fe->dtv_property_cache; +@@ -1225,23 +1328,90 @@ &tevii_ds3000_config, &i2c_bus->i2c_adap); break; @@ -5084,7 +22928,32 @@ index 2f5b902..4319f35 100644 + break; - fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; -- } ++ case CX23885_BOARD_DVBSKY_T9580: ++ switch (port->nr) { ++ /* port B */ ++ case 1: ++ i2c_bus = &dev->i2c_bus[1]; ++ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, ++ &dvbsky_ds3103_config_pri, ++ &i2c_bus->i2c_adap); ++ break; ++ /* port C */ ++ case 2: ++ i2c_bus = &dev->i2c_bus[0]; ++ fe0->dvb.frontend = dvb_attach(si2168_attach, ++ &dvbsky_si2168_config_pci_s, ++ &i2c_bus->i2c_adap); ++ break; + } + break; ++ ++ case CX23885_BOARD_DVBSKY_T980_CI: ++ i2c_bus = &dev->i2c_bus[1]; ++ fe0->dvb.frontend = dvb_attach(si2168_attach, ++ &dvbsky_si2168_config_pci_p, ++ &i2c_bus->i2c_adap); ++ break; ++ + case CX23885_BOARD_PROF_8000: + i2c_bus = &dev->i2c_bus[0]; + @@ -5101,10 +22970,11 @@ index 2f5b902..4319f35 100644 + + fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; + } - break; ++ break; default: printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " -@@ -1289,7 +1368,7 @@ static int dvb_register(struct cx23885_tsport *port) + " isn't supported yet\n", +@@ -1289,7 +1459,7 @@ printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", port->nr, port->frontends.adapter.proposed_mac); @@ -5113,13 +22983,14 @@ index 2f5b902..4319f35 100644 break; } case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { -@@ -1316,6 +1395,40 @@ static int dvb_register(struct cx23885_tsport *port) +@@ -1316,6 +1486,42 @@ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); break; } + case CX23885_BOARD_BST_PS8512: + case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952:{ ++ case CX23885_BOARD_DVBSKY_S952: ++ case CX23885_BOARD_DVBSKY_T9580:{ + u8 eeprom[256]; /* 24C02 i2c eeprom */ + + if(port->nr > 2) @@ -5147,104 +23018,54 @@ index 2f5b902..4319f35 100644 + netup_ci_init(port, true); + break; + } -+ case CX23885_BOARD_DVBSKY_C2800E_CI: { ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T980_CI: { + netup_ci_init(port, true); + break; + } } return ret; -@@ -1398,6 +1511,8 @@ int cx23885_dvb_unregister(struct cx23885_tsport *port) +@@ -1398,6 +1604,9 @@ switch (port->dev->board) { case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: + case CX23885_BOARD_DVBSKY_S950_CI: + case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T980_CI: netup_ci_exit(port); break; case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: -diff --git a/drivers/media/pci/cx23885/cx23885-f300.c b/drivers/media/pci/cx23885/cx23885-f300.c -index 5444cc5..1f4bf10 100644 ---- a/drivers/media/pci/cx23885/cx23885-f300.c -+++ b/drivers/media/pci/cx23885/cx23885-f300.c -@@ -176,3 +176,58 @@ int f300_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) +diff -urN a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h +--- a/drivers/media/pci/cx23885/cx23885.h 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cx23885.h 2013-03-31 22:18:05.000000000 +0800 +@@ -91,6 +91,13 @@ + #define CX23885_BOARD_TEVII_S471 35 + #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 + #define CX23885_BOARD_PROF_8000 37 ++#define CX23885_BOARD_BST_PS8512 38 ++#define CX23885_BOARD_DVBSKY_S952 39 ++#define CX23885_BOARD_DVBSKY_S950 40 ++#define CX23885_BOARD_DVBSKY_S950_CI 41 ++#define CX23885_BOARD_DVBSKY_C2800E_CI 42 ++#define CX23885_BOARD_DVBSKY_T9580 43 ++#define CX23885_BOARD_DVBSKY_T980_CI 44 - return f300_xfer(fe, buf); - } -+ -+/* bst control */ -+int bst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ cx23885_gpio_enable(dev, GPIO_1, 1); -+ cx23885_gpio_enable(dev, GPIO_0, 1); -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx23885_gpio_set(dev, GPIO_1); -+ cx23885_gpio_clear(dev, GPIO_0); -+ break; -+ case SEC_VOLTAGE_18: -+ cx23885_gpio_set(dev, GPIO_1); -+ cx23885_gpio_set(dev, GPIO_0); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx23885_gpio_clear(dev, GPIO_1); -+ cx23885_gpio_clear(dev, GPIO_0); -+ break; -+ } -+ -+ -+ return 0; -+} -+ -+int dvbsky_set_voltage_sec(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ cx23885_gpio_enable(dev, GPIO_12, 1); -+ cx23885_gpio_enable(dev, GPIO_13, 1); -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx23885_gpio_set(dev, GPIO_13); -+ cx23885_gpio_clear(dev, GPIO_12); -+ break; -+ case SEC_VOLTAGE_18: -+ cx23885_gpio_set(dev, GPIO_13); -+ cx23885_gpio_set(dev, GPIO_12); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx23885_gpio_clear(dev, GPIO_13); -+ cx23885_gpio_clear(dev, GPIO_12); -+ break; -+ } -+ -+ -+ return 0; -+} -\ No newline at end of file -diff --git a/drivers/media/pci/cx23885/cx23885-f300.h b/drivers/media/pci/cx23885/cx23885-f300.h -index e73344c..f93f37d 100644 ---- a/drivers/media/pci/cx23885/cx23885-f300.h -+++ b/drivers/media/pci/cx23885/cx23885-f300.h -@@ -1,2 +1,8 @@ -+extern int dvbsky_set_voltage_sec(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage); -+ -+extern int bst_set_voltage(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage); -+ - extern int f300_set_voltage(struct dvb_frontend *fe, - fe_sec_voltage_t voltage); -diff --git a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c -index 4f1055a..db3366b 100644 ---- a/drivers/media/pci/cx23885/cx23885-input.c -+++ b/drivers/media/pci/cx23885/cx23885-input.c -@@ -89,6 +89,11 @@ void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events) + #define GPIO_0 0x00000001 + #define GPIO_1 0x00000002 +@@ -229,7 +236,7 @@ + */ + u32 clk_freq; + struct cx23885_input input[MAX_CX23885_INPUT]; +- int ci_type; /* for NetUP */ ++ int ci_type; /* 1 and 2 for NetUP, 3 for DVBSky. */ + /* Force bottom field first during DMA (888 workaround) */ + u32 force_bff; + }; +diff -urN a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c +--- a/drivers/media/pci/cx23885/cx23885-input.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/cx23885-input.c 2013-03-31 22:15:04.000000000 +0800 +@@ -89,6 +89,13 @@ case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_HAUPPAUGE_HVR1250: @@ -5253,10 +23074,12 @@ index 4f1055a..db3366b 100644 + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: + case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: /* * The only boards we handle right now. However other boards * using the CX2388x integrated IR controller should be similar -@@ -140,6 +145,11 @@ static int cx23885_input_ir_start(struct cx23885_dev *dev) +@@ -140,6 +147,13 @@ case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290: case CX23885_BOARD_HAUPPAUGE_HVR1250: @@ -5264,11 +23087,13 @@ index 4f1055a..db3366b 100644 + case CX23885_BOARD_DVBSKY_S950: + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: /* * The IR controller on this board only returns pulse widths. * Any other mode setting will fail to set up the device. -@@ -289,6 +299,17 @@ int cx23885_input_init(struct cx23885_dev *dev) +@@ -289,6 +303,19 @@ /* A guess at the remote */ rc_map = RC_MAP_TEVII_NEC; break; @@ -5276,7 +23101,9 @@ index 4f1055a..db3366b 100644 + case CX23885_BOARD_DVBSKY_S950: + case CX23885_BOARD_DVBSKY_S952: + case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_C2800E_CI: ++ case CX23885_BOARD_DVBSKY_T9580: ++ case CX23885_BOARD_DVBSKY_T980_CI: + /* Integrated CX2388[58] IR controller */ + driver_type = RC_DRIVER_IR_RAW; + allowed_protos = RC_BIT_ALL; @@ -5286,50 +23113,23 @@ index 4f1055a..db3366b 100644 default: return -ENODEV; } -diff --git a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h -index 67f40d3..272dcab 100644 ---- a/drivers/media/pci/cx23885/cx23885.h -+++ b/drivers/media/pci/cx23885/cx23885.h -@@ -90,7 +90,12 @@ - #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 - #define CX23885_BOARD_TEVII_S471 35 - #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 --#define CX23885_BOARD_PROF_8000 37 -+#define CX23885_BOARD_BST_PS8512 37 -+#define CX23885_BOARD_DVBSKY_S952 38 -+#define CX23885_BOARD_DVBSKY_S950 39 -+#define CX23885_BOARD_DVBSKY_S950_CI 40 -+#define CX23885_BOARD_DVBSKY_C2800E_CI 41 -+#define CX23885_BOARD_PROF_8000 42 - - #define GPIO_0 0x00000001 - #define GPIO_1 0x00000002 -@@ -229,7 +234,7 @@ struct cx23885_board { - */ - u32 clk_freq; - struct cx23885_input input[MAX_CX23885_INPUT]; -- int ci_type; /* for NetUP */ -+ int ci_type; /* 1 and 2 for NetUP, 3 for DVBSky. */ - /* Force bottom field first during DMA (888 workaround) */ - u32 force_bff; - }; -diff --git a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig -index d27fccb..04d2099 100644 ---- a/drivers/media/pci/cx88/Kconfig -+++ b/drivers/media/pci/cx88/Kconfig -@@ -57,6 +57,7 @@ config VIDEO_CX88_DVB - select DVB_ISL6421 if MEDIA_SUBDRV_AUTOSELECT - select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT +diff -urN a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig +--- a/drivers/media/pci/cx23885/Kconfig 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx23885/Kconfig 2013-02-14 22:57:51.000000000 +0800 +@@ -23,6 +23,9 @@ + select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT + select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0299 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT -diff --git a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c -index 0c25524..4989f52 100644 ---- a/drivers/media/pci/cx88/cx88-cards.c -+++ b/drivers/media/pci/cx88/cx88-cards.c -@@ -2309,6 +2309,18 @@ static const struct cx88_board cx88_boards[] = { ++ select DVB_M88DC2800 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_SI2168 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT + select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0367 if MEDIA_SUBDRV_AUTOSELECT +diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c +--- a/drivers/media/pci/cx88/cx88-cards.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx88/cx88-cards.c 2013-03-31 21:55:58.000000000 +0800 +@@ -2309,6 +2309,18 @@ } }, .mpeg = CX88_MPEG_DVB, }, @@ -5339,7 +23139,7 @@ index 0c25524..4989f52 100644 + .radio_type = UNSET, + .tuner_addr = ADDR_UNSET, + .radio_addr = ADDR_UNSET, -+ .input = {{ ++ .input = { { + .type = CX88_VMUX_DVB, + .vmux = 0, + } }, @@ -5348,7 +23148,7 @@ index 0c25524..4989f52 100644 }; /* ------------------------------------------------------------------ */ -@@ -2813,6 +2825,10 @@ static const struct cx88_subid cx88_subids[] = { +@@ -2813,6 +2825,10 @@ .subvendor = 0x1822, .subdevice = 0x0023, .card = CX88_BOARD_TWINHAN_VP1027_DVBS, @@ -5359,7 +23159,7 @@ index 0c25524..4989f52 100644 }, }; -@@ -3547,6 +3563,12 @@ static void cx88_card_setup(struct cx88_core *core) +@@ -3547,6 +3563,12 @@ cx_write(MO_SRST_IO, 1); msleep(100); break; @@ -5367,15 +23167,14 @@ index 0c25524..4989f52 100644 + cx_write(MO_GP1_IO, 0x808000); + msleep(100); + cx_write(MO_GP1_IO, 0x808080); -+ msleep(100); -+ break; ++ msleep(100); ++ break; } /*end switch() */ -diff --git a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.c -index 666f83b..db48d51 100644 ---- a/drivers/media/pci/cx88/cx88-dvb.c -+++ b/drivers/media/pci/cx88/cx88-dvb.c +diff -urN a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.c +--- a/drivers/media/pci/cx88/cx88-dvb.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx88/cx88-dvb.c 2013-01-31 10:42:51.000000000 +0800 @@ -54,6 +54,7 @@ #include "stv0288.h" #include "stb6000.h" @@ -5384,7 +23183,7 @@ index 666f83b..db48d51 100644 #include "stv0900.h" #include "stb6100.h" #include "stb6100_proc.h" -@@ -458,6 +459,56 @@ static int tevii_dvbs_set_voltage(struct dvb_frontend *fe, +@@ -458,6 +459,56 @@ return core->prev_set_voltage(fe, voltage); return 0; } @@ -5441,7 +23240,7 @@ index 666f83b..db48d51 100644 static int vp1027_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -@@ -700,6 +751,11 @@ static struct ds3000_config tevii_ds3000_config = { +@@ -700,6 +751,11 @@ .set_ts_params = ds3000_set_ts_param, }; @@ -5453,7 +23252,7 @@ index 666f83b..db48d51 100644 static const struct stv0900_config prof_7301_stv0900_config = { .demod_address = 0x6a, /* demod_mode = 0,*/ -@@ -1470,6 +1526,35 @@ static int dvb_register(struct cx8802_dev *dev) +@@ -1470,6 +1526,35 @@ fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; break; @@ -5489,35 +23288,10 @@ index 666f83b..db48d51 100644 case CX88_BOARD_OMICOM_SS4_PCI: case CX88_BOARD_TBS_8920: case CX88_BOARD_PROF_7300: -diff --git a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c -index f29e18c..4de31ea 100644 ---- a/drivers/media/pci/cx88/cx88-input.c -+++ b/drivers/media/pci/cx88/cx88-input.c -@@ -419,6 +419,10 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) - rc_type = RC_BIT_NEC; - ir->sampling = 0xff00; /* address */ - break; -+ case CX88_BOARD_BST_PS8312: -+ ir_codes = RC_MAP_DVBSKY; -+ ir->sampling = 0xff00; /* address */ -+ break; - } - - if (!ir_codes) { -diff --git a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h -index ba0dba4..58f0c11 100644 ---- a/drivers/media/pci/cx88/cx88.h -+++ b/drivers/media/pci/cx88/cx88.h -@@ -141,7 +141,7 @@ struct sram_channel { - u32 cnt1_reg; - u32 cnt2_reg; - }; --extern const struct sram_channel cx88_sram_channels[]; -+extern const struct sram_channel const cx88_sram_channels[]; - - /* ----------------------------------------------------------- */ - /* card configuration */ -@@ -238,6 +238,7 @@ extern const struct sram_channel cx88_sram_channels[]; +diff -urN a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h +--- a/drivers/media/pci/cx88/cx88.h 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx88/cx88.h 2013-01-28 13:21:36.000000000 +0800 +@@ -238,6 +238,7 @@ #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88 #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89 #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90 @@ -5525,11 +23299,35 @@ index ba0dba4..58f0c11 100644 enum cx88_itype { CX88_VMUX_COMPOSITE1 = 1, -diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile -index ab84d66..d536fd8 100644 ---- a/drivers/media/rc/keymaps/Makefile -+++ b/drivers/media/rc/keymaps/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \ +diff -urN a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c +--- a/drivers/media/pci/cx88/cx88-input.c 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx88/cx88-input.c 2013-01-26 14:52:03.000000000 +0800 +@@ -419,6 +419,10 @@ + rc_type = RC_BIT_NEC; + ir->sampling = 0xff00; /* address */ + break; ++ case CX88_BOARD_BST_PS8312: ++ ir_codes = RC_MAP_DVBSKY; ++ ir->sampling = 0xff00; /* address */ ++ break; + } + + if (!ir_codes) { +diff -urN a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig +--- a/drivers/media/pci/cx88/Kconfig 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/pci/cx88/Kconfig 2013-01-31 10:42:58.000000000 +0800 +@@ -57,6 +57,7 @@ + select DVB_ISL6421 if MEDIA_SUBDRV_AUTOSELECT + select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT + select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0299 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT + select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT +diff -urN a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile +--- a/drivers/media/rc/keymaps/Makefile 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/rc/keymaps/Makefile 2013-03-31 22:22:13.000000000 +0800 +@@ -27,6 +27,7 @@ rc-dm1105-nec.o \ rc-dntv-live-dvb-t.o \ rc-dntv-live-dvbt-pro.o \ @@ -5537,11 +23335,9 @@ index ab84d66..d536fd8 100644 rc-em-terratec.o \ rc-encore-enltv2.o \ rc-encore-enltv.o \ -diff --git a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c -new file mode 100644 -index 0000000..9a75cdc ---- /dev/null -+++ b/drivers/media/rc/keymaps/rc-dvbsky.c +diff -urN a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c +--- a/drivers/media/rc/keymaps/rc-dvbsky.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/rc/keymaps/rc-dvbsky.c 2013-01-26 14:52:49.000000000 +0800 @@ -0,0 +1,78 @@ +/* rc-dvbsky.c - Keytable for Dvbsky Remote Controllers + * @@ -5572,11 +23368,11 @@ index 0000000..9a75cdc + { 0x0006, KEY_6 }, + { 0x0007, KEY_7 }, + { 0x0008, KEY_8 }, -+ { 0x0009, KEY_9 }, ++ { 0x0009, KEY_9 }, + { 0x000a, KEY_MUTE }, + { 0x000d, KEY_OK }, + { 0x000b, KEY_STOP }, -+ { 0x000c, KEY_EXIT }, ++ { 0x000c, KEY_EXIT }, + { 0x000e, KEY_CAMERA }, /*Snap shot*/ + { 0x000f, KEY_SUBTITLE }, /*PIP*/ + { 0x0010, KEY_VOLUMEUP }, @@ -5592,9 +23388,9 @@ index 0000000..9a75cdc + { 0x0026, KEY_REWIND }, + { 0x0027, KEY_FASTFORWARD }, + { 0x0029, KEY_LAST }, -+ { 0x002b, KEY_MENU }, ++ { 0x002b, KEY_MENU }, + { 0x002c, KEY_EPG }, -+ { 0x002d, KEY_ZOOM }, ++ { 0x002d, KEY_ZOOM }, +}; + +static struct rc_map_list rc5_dvbsky_map = { @@ -5621,39 +23417,557 @@ index 0000000..9a75cdc + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nibble Max "); -diff --git a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig -index fa0b293..60673c2 100644 ---- a/drivers/media/usb/dvb-usb/Kconfig -+++ b/drivers/media/usb/dvb-usb/Kconfig -@@ -262,6 +262,7 @@ config DVB_USB_DW2102 - select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT - select DVB_SI21XX if MEDIA_SUBDRV_AUTOSELECT - select DVB_TDA10023 if MEDIA_SUBDRV_AUTOSELECT - select DVB_MT312 if MEDIA_SUBDRV_AUTOSELECT -diff --git a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c -index 097c186..a028166 100644 ---- a/drivers/media/usb/dvb-usb/dw2102.c -+++ b/drivers/media/usb/dvb-usb/dw2102.c -@@ -19,6 +19,7 @@ - #include "stb6000.h" - #include "eds1547.h" - #include "cx24116.h" +diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2/dvbsky.c +--- a/drivers/media/usb/dvb-usb-v2/dvbsky.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/media/usb/dvb-usb-v2/dvbsky.c 2013-03-31 22:26:05.000000000 +0800 +@@ -0,0 +1,721 @@ ++/* ++ * Driver for DVBSky USB2.0 receiver ++ * ++ * Copyright (C) 2013 Max nibble ++ * ++ * CIMax code is copied and modified from: ++ * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card ++ * Copyright (C) 2009 NetUP Inc. ++ * Copyright (C) 2009 Igor M. Liplianin ++ * Copyright (C) 2009 Abylay Ospan ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include "dvb_ca_en50221.h" ++#include "dvb_usb.h" ++#include "si2168.h" +#include "m88ds3103.h" - #include "tda1002x.h" - #include "mt312.h" - #include "zl10039.h" -@@ -830,6 +831,39 @@ static int su3000_read_mac_address(struct dvb_usb_device *d, u8 mac[6]) - return 0; - } - -+static int dvbsky_read_mac_address(struct dvb_usb_device *d, u8 mac[6]) ++ ++static int dvbsky_debug; ++module_param(dvbsky_debug, int, 0644); ++MODULE_PARM_DESC(dvbsky_debug, "Activates dvbsky usb debugging (default:0)"); ++ ++#define DVBSKY_CI_CTL 0x04 ++#define DVBSKY_CI_RD 1 ++ ++#define dprintk(args...) \ ++ do { \ ++ if (dvbsky_debug) \ ++ printk(KERN_INFO "dvbsky_usb: " args); \ ++ } while (0) ++ ++DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); ++ ++struct dvbsky_state { ++ struct mutex stream_mutex; ++ u8 has_ci; ++ u8 ci_attached; ++ struct dvb_ca_en50221 ci; ++ unsigned long next_status_checked_time; ++ u8 ci_i2c_addr; ++ u8 current_ci_flag; ++ int ci_status; ++}; ++ ++static int dvbsky_stream_ctrl(struct dvb_usb_device *d, u8 onoff) +{ -+ int i; ++ struct dvbsky_state *state = d_to_priv(d); ++ int ret; ++ u8 obuf_pre[3] = { 0x37, 0, 0 }; ++ u8 obuf_post[3] = { 0x36, 3, 0 }; ++ dprintk("%s() -off \n", __func__); ++ mutex_lock(&state->stream_mutex); ++ ret = dvb_usbv2_generic_write(d, obuf_pre, 3); ++ if (!ret && onoff) { ++ msleep(10); ++ ret = dvb_usbv2_generic_write(d, obuf_post, 3); ++ dprintk("%s() -on \n", __func__); ++ } ++ mutex_unlock(&state->stream_mutex); ++ return ret; ++} ++ ++/* CI opertaions */ ++static int dvbsky_ci_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg, ++ u8 *buf, int len) ++{ ++ int ret; ++ struct i2c_msg msg[] = { ++ { ++ .addr = addr, ++ .flags = 0, ++ .buf = ®, ++ .len = 1 ++ }, { ++ .addr = addr, ++ .flags = I2C_M_RD, ++ .buf = buf, ++ .len = len ++ } ++ }; ++ ++ ret = i2c_transfer(i2c_adap, msg, 2); ++ ++ if (ret != 2) { ++ dprintk("%s: error, Reg = 0x%02x, Status = %d\n", __func__, reg, ret); ++ return -1; ++ } ++ return 0; ++} ++ ++static int dvbsky_ci_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg, ++ u8 *buf, int len) ++{ ++ int ret; ++ u8 buffer[len + 1]; ++ ++ struct i2c_msg msg = { ++ .addr = addr, ++ .flags = 0, ++ .buf = &buffer[0], ++ .len = len + 1 ++ }; ++ ++ buffer[0] = reg; ++ memcpy(&buffer[1], buf, len); ++ ++ ret = i2c_transfer(i2c_adap, &msg, 1); ++ ++ if (ret != 1) { ++ dprintk("%s: error, Reg=[0x%02x], Status=%d\n", __func__, reg, ret); ++ return -1; ++ } ++ return 0; ++} ++ ++static int dvbsky_ci_op_cam(struct dvb_ca_en50221 *ci, int slot, ++ u8 flag, u8 read, int addr, u8 data) ++{ ++ struct dvb_usb_device *d = ci->data; ++ struct dvbsky_state *state = d_to_priv(d); ++ u8 store; ++ int ret; ++ u8 command[4], respond[2], command_size, respond_size; ++ ++ /*dprintk("%s()\n", __func__);*/ ++ if (0 != slot) ++ return -EINVAL; ++ ++ if (state->current_ci_flag != flag) { ++ ret = dvbsky_ci_read_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &store, 1); ++ if (ret != 0) ++ return ret; ++ ++ store &= ~0x0c; ++ store |= flag; ++ ++ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &store, 1); ++ if (ret != 0) ++ return ret; ++ } ++ state->current_ci_flag = flag; ++ ++ command[1] = (u8)((addr >> 8) & 0xff); /*high part of address*/ ++ command[2] = (u8)(addr & 0xff); /*low part of address*/ ++ if (read) { ++ command[0] = 0x71; ++ command_size = 3; ++ respond_size = 2; ++ } else { ++ command[0] = 0x70; ++ command[3] = data; ++ command_size = 4; ++ respond_size = 1; ++ } ++ ret = dvb_usbv2_generic_rw(d, command, command_size, respond, respond_size); ++ ++ return (read) ? respond[1] : 0; ++} ++ ++static int dvbsky_ci_read_attribute_mem(struct dvb_ca_en50221 *ci, ++ int slot, int addr) ++{ ++ return dvbsky_ci_op_cam(ci, slot, 0, DVBSKY_CI_RD, addr, 0); ++} ++ ++static int dvbsky_ci_write_attribute_mem(struct dvb_ca_en50221 *ci, ++ int slot, int addr, u8 data) ++{ ++ return dvbsky_ci_op_cam(ci, slot, 0, 0, addr, data); ++} ++ ++static int dvbsky_ci_read_cam_ctl(struct dvb_ca_en50221 *ci, int slot, u8 addr) ++{ ++ return dvbsky_ci_op_cam(ci, slot, DVBSKY_CI_CTL, DVBSKY_CI_RD, addr, 0); ++} ++ ++static int dvbsky_ci_write_cam_ctl(struct dvb_ca_en50221 *ci, int slot, ++ u8 addr, u8 data) ++{ ++ return dvbsky_ci_op_cam(ci, slot, DVBSKY_CI_CTL, 0, addr, data); ++} ++ ++static int dvbsky_ci_slot_reset(struct dvb_ca_en50221 *ci, int slot) ++{ ++ struct dvb_usb_device *d = ci->data; ++ struct dvbsky_state *state = d_to_priv(d); ++ u8 buf = 0x80; ++ int ret; ++ dprintk("%s() slot=%d\n", __func__, slot); ++ ++ if (0 != slot) ++ return -EINVAL; ++ ++ udelay(500); ++ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &buf, 1); ++ ++ if (ret != 0) ++ return ret; ++ ++ udelay(500); ++ ++ buf = 0x00; ++ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &buf, 1); ++ msleep(1000); ++ dprintk("%s() slot=%d complete\n", __func__, slot); ++ return 0; ++ ++} ++ ++static int dvbsky_ci_slot_shutdown(struct dvb_ca_en50221 *ci, int slot) ++{ ++ /* not implemented */ ++ dprintk("%s()\n", __func__); ++ return 0; ++} ++ ++static int dvbsky_ci_slot_ts_enable(struct dvb_ca_en50221 *ci, int slot) ++{ ++ struct dvb_usb_device *d = ci->data; ++ struct dvbsky_state *state = d_to_priv(d); ++ u8 buf; ++ int ret; ++ ++ dprintk("%s()\n", __func__); ++ if (0 != slot) ++ return -EINVAL; ++ ++ dvbsky_ci_read_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &buf, 1); ++ buf |= 0x60; ++ ++ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &buf, 1); ++ return ret; ++} ++ ++static int dvbsky_ci_poll_slot_status(struct dvb_ca_en50221 *ci, int slot, ++ int open) ++{ ++ struct dvb_usb_device *d = ci->data; ++ struct dvbsky_state *state = d_to_priv(d); ++ int ret = 0; ++ u8 buf = 0; ++ /*dprintk("%s()\n", __func__);*/ ++ ++ /* CAM module INSERT/REMOVE processing. slow operation because of i2c ++ * transfers */ ++ if (time_after(jiffies, state->next_status_checked_time)) { ++ ret = dvbsky_ci_read_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &buf, 1); ++ ++ /*dprintk("%s() status=%x\n", __func__, buf);*/ ++ ++ state->next_status_checked_time = jiffies ++ + msecs_to_jiffies(1000); ++ ++ if (ret != 0) ++ return 0; ++ ++ if (buf & 1) { ++ state->ci_status = DVB_CA_EN50221_POLL_CAM_PRESENT | ++ DVB_CA_EN50221_POLL_CAM_READY; ++ } ++ else ++ state->ci_status = 0; ++ } ++ /*dprintk("%s() ret=%x\n", __func__, state->ci_status);*/ ++ return state->ci_status; ++} ++ ++static int dvbsky_ci_init(struct dvb_usb_device *d) ++{ ++ struct dvbsky_state *state = d_to_priv(d); ++ int ret; ++ u8 cimax_init[34] = { ++ 0x00, /* module A control*/ ++ 0x00, /* auto select mask high A */ ++ 0x00, /* auto select mask low A */ ++ 0x00, /* auto select pattern high A */ ++ 0x00, /* auto select pattern low A */ ++ 0x44, /* memory access time A */ ++ 0x00, /* invert input A */ ++ 0x00, /* RFU */ ++ 0x00, /* RFU */ ++ 0x00, /* module B control*/ ++ 0x00, /* auto select mask high B */ ++ 0x00, /* auto select mask low B */ ++ 0x00, /* auto select pattern high B */ ++ 0x00, /* auto select pattern low B */ ++ 0x44, /* memory access time B */ ++ 0x00, /* invert input B */ ++ 0x00, /* RFU */ ++ 0x00, /* RFU */ ++ 0x00, /* auto select mask high Ext */ ++ 0x00, /* auto select mask low Ext */ ++ 0x00, /* auto select pattern high Ext */ ++ 0x00, /* auto select pattern low Ext */ ++ 0x00, /* RFU */ ++ 0x02, /* destination - module A */ ++ 0x01, /* power on (use it like store place) */ ++ 0x00, /* RFU */ ++ 0x00, /* int status read only */ ++ 0x00, /* Max: Disable the interrupt in USB solution.*/ ++ 0x05, /* EXTINT=active-high, INT=push-pull */ ++ 0x00, /* USCG1 */ ++ 0x04, /* ack active low */ ++ 0x00, /* LOCK = 0 */ ++ 0x22, /* serial mode, rising in, rising out, MSB first*/ ++ 0x00 /* synchronization */ ++ }; ++ dprintk("%s()\n", __func__); ++ state->current_ci_flag = 0xff; ++ state->ci_status = 0; ++ state->next_status_checked_time = jiffies + msecs_to_jiffies(1000); ++ state->ci_i2c_addr = 0x40; ++ ++ state->ci.owner = THIS_MODULE; ++ state->ci.read_attribute_mem = dvbsky_ci_read_attribute_mem; ++ state->ci.write_attribute_mem = dvbsky_ci_write_attribute_mem; ++ state->ci.read_cam_control = dvbsky_ci_read_cam_ctl; ++ state->ci.write_cam_control = dvbsky_ci_write_cam_ctl; ++ state->ci.slot_reset = dvbsky_ci_slot_reset; ++ state->ci.slot_shutdown = dvbsky_ci_slot_shutdown; ++ state->ci.slot_ts_enable = dvbsky_ci_slot_ts_enable; ++ state->ci.poll_slot_status = dvbsky_ci_poll_slot_status; ++ state->ci.data = d; ++ ++ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0, &cimax_init[0], 34); ++ /* lock registers */ ++ ret |= dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0x1f, &cimax_init[0x18], 1); ++ /* power on slots */ ++ ret |= dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, ++ 0x18, &cimax_init[0x18], 1); ++ if (0 != ret) ++ return ret; ++ ++ ret = dvb_ca_en50221_init(&d->adapter[0].dvb_adap, &state->ci, 0, 1); ++ if (ret) ++ return ret; ++ state->ci_attached = 1; ++ dprintk("%s() complete.\n", __func__); ++ return 0; ++} ++ ++static void dvbsky_ci_release(struct dvb_usb_device *d) ++{ ++ struct dvbsky_state *state = d_to_priv(d); ++ ++ /* detach CI */ ++ if (state->ci_attached) ++ dvb_ca_en50221_release(&state->ci); ++ ++ return; ++} ++ ++static int dvbsky_streaming_ctrl(struct dvb_frontend *fe, int onoff) ++{ ++ struct dvb_usb_device *d = fe_to_d(fe); ++ /*dprintk("%s() %d\n", __func__, onoff);*/ ++ return dvbsky_stream_ctrl(d, (onoff == 0) ? 0 : 1); ++} ++ ++/* GPIO */ ++static int dvbsky_gpio_ctrl(struct dvb_usb_device *d, u8 gport, u8 value) ++{ ++ u8 obuf[64], ibuf[64]; ++ obuf[0] = 0x0e; ++ obuf[1] = gport; ++ obuf[2] = value; ++ return dvb_usbv2_generic_rw(d, obuf, 3, ibuf, 1); ++} ++ ++/* I2C */ ++static int dvbsky_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], ++ int num) ++{ ++ struct dvb_usb_device *d = i2c_get_adapdata(adap); ++ int ret = 0; ++ u8 ibuf[64], obuf[64]; ++ ++ if (mutex_lock_interruptible(&d->i2c_mutex) < 0) ++ return -EAGAIN; ++ ++ if (num > 2) { ++ printk(KERN_ERR "dvbsky_usb: too many i2c messages[%d] than 2.", num); ++ ret = -EOPNOTSUPP; ++ goto i2c_error; ++ } ++ ++ if(num == 1) { ++ if (msg[0].len > 60) { ++ printk(KERN_ERR "dvbsky_usb: too many i2c bytes[%d] than 60.", msg[0].len); ++ ret = -EOPNOTSUPP; ++ goto i2c_error; ++ } ++ if (msg[0].flags & I2C_M_RD) { ++ /* single read */ ++ obuf[0] = 0x09; ++ obuf[1] = 0; ++ obuf[2] = msg[0].len; ++ obuf[3] = msg[0].addr; ++ ret = dvb_usbv2_generic_rw(d, obuf, 4, ibuf, msg[0].len + 1); ++ /*dprintk("%s(): read status = %d\n", __func__, ibuf[0]);*/ ++ if (!ret) ++ memcpy(msg[0].buf, &ibuf[1], msg[0].len); ++ } else { ++ /* write */ ++ obuf[0] = 0x08; ++ obuf[1] = msg[0].addr; ++ obuf[2] = msg[0].len; ++ memcpy(&obuf[3], msg[0].buf, msg[0].len); ++ ret = dvb_usbv2_generic_rw(d, obuf, msg[0].len + 3, ibuf, 1); ++ /*dprintk("%s(): write status = %d\n", __func__, ibuf[0]);*/ ++ } ++ } else { ++ if ((msg[0].len > 60) || (msg[1].len > 60)) { ++ printk(KERN_ERR "dvbsky_usb: too many i2c bytes[w-%d][r-%d] than 60.", msg[0].len, msg[1].len); ++ ret = -EOPNOTSUPP; ++ goto i2c_error; ++ } ++ /* write then read */ ++ obuf[0] = 0x09; ++ obuf[1] = msg[0].len; ++ obuf[2] = msg[1].len; ++ obuf[3] = msg[0].addr; ++ memcpy(&obuf[4], msg[0].buf, msg[0].len); ++ ret = dvb_usbv2_generic_rw(d, obuf, msg[0].len + 4, ibuf, msg[1].len + 1); ++ /*dprintk("%s(): write then read status = %d\n", __func__, ibuf[0]);*/ ++ if (!ret) ++ memcpy(msg[1].buf, &ibuf[1], msg[1].len); ++ } ++i2c_error: ++ mutex_unlock(&d->i2c_mutex); ++ return (ret) ? ret : num; ++} ++ ++static u32 dvbsky_i2c_func(struct i2c_adapter *adapter) ++{ ++ return I2C_FUNC_I2C; ++} ++ ++static struct i2c_algorithm dvbsky_i2c_algo = { ++ .master_xfer = dvbsky_i2c_xfer, ++ .functionality = dvbsky_i2c_func, ++}; ++ ++static int dvbsky_rc_query(struct dvb_usb_device *d) ++{ ++ u32 code = 0xffff; ++ u8 obuf[2], ibuf[2], toggle; ++ int ret; ++ obuf[0] = 0x10; ++ ret = dvb_usbv2_generic_rw(d, obuf, 1, ibuf, 2); ++ if(ret == 0) ++ code = (ibuf[0] << 8) | ibuf[1]; ++ ++ if (code != 0xffff) { ++ dprintk("rc code: %x", code); ++ toggle = (code & 0x800) ? 1 : 0; ++ code &= 0x3f; ++ rc_keydown(d->rc_dev, code, toggle); ++ } ++ return 0; ++} ++ ++static int dvbsky_get_rc_config(struct dvb_usb_device *d, struct dvb_usb_rc *rc) ++{ ++ rc->allowed_protos = RC_BIT_RC5; ++ rc->query = dvbsky_rc_query; ++ rc->interval = 300; ++ return 0; ++} ++ ++static int dvbsky_sync_ctrl(struct dvb_frontend *fe) ++{ ++ struct dvb_usb_device *d = fe_to_d(fe); ++ return dvbsky_stream_ctrl(d, 1); ++} ++ ++static int dvbsky_usb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct dvb_usb_device *d = fe_to_d(fe); ++ u8 value; ++ ++ if (voltage == SEC_VOLTAGE_OFF) ++ value = 0; ++ else ++ value = 1; ++ return dvbsky_gpio_ctrl(d, 0x80, value); ++} ++ ++static struct si2168_config dvbsky_usb_si2168_config = { ++ .ts_bus_mode = 2, ++ .ts_clock_mode = 1, ++ .start_ctrl = NULL, ++}; ++ ++static int dvbsky_t680c_attach(struct dvb_usb_adapter *adap) ++{ ++ struct dvbsky_state *state = adap_to_priv(adap); ++ struct dvb_usb_device *d = adap_to_d(adap); ++ int ret = 0; ++ ++ dprintk("%s, build on %s %s()\n", __func__, __DATE__,__TIME__); ++ ++ dvbsky_gpio_ctrl(d, 0x83, 0); ++ msleep(50); ++ dvbsky_gpio_ctrl(d, 0x83, 1); ++ msleep(20); ++ ++ adap->fe[0] = dvb_attach(si2168_attach, ++ &dvbsky_usb_si2168_config, ++ &d->i2c_adap); ++ if (!adap->fe[0]) { ++ printk(KERN_ERR "dvbsky_t680c_attach fail."); ++ ret = -ENODEV; ++ } ++ ++ state->has_ci = 1; ++ ++ return ret; ++} ++ ++static int dvbsky_read_mac_addr(struct dvb_usb_adapter *adap, u8 mac[6]) ++{ ++ struct dvb_usb_device *d = adap_to_d(adap); + u8 obuf[] = { 0x1e, 0x00 }; -+ u8 ibuf[] = { 0 }; ++ u8 ibuf[6] = { 0 }; + struct i2c_msg msg[] = { + { + .addr = 0x51, @@ -5664,327 +23978,202 @@ index 097c186..a028166 100644 + .addr = 0x51, + .flags = I2C_M_RD, + .buf = ibuf, -+ .len = 1, ++ .len = 6, + + } + }; ++ ++ if (i2c_transfer(&d->i2c_adap, msg, 2) == 2) ++ memcpy(mac, ibuf, 6); + -+ for (i = 0; i < 6; i++) { -+ obuf[1] = i; -+ if (i2c_transfer(&d->i2c_adap, msg, 2) != 2) -+ break; -+ else -+ mac[i] = ibuf[0]; -+ -+ debug_dump(mac, 6, printk); -+ } -+ ++ printk(KERN_INFO "dvbsky_usb MAC address=%pM\n", mac); ++ + return 0; +} + - static int su3000_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, -@@ -878,6 +912,43 @@ static int s660_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) - return 0; - } - -+static int bstusb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ -+ struct dvb_usb_adapter *udev_adap = -+ (struct dvb_usb_adapter *)(fe->dvb->priv); -+ -+ u8 obuf[3] = { 0xe, 0x80, 0 }; -+ u8 ibuf[] = { 0 }; -+ -+ info("US6830: %s!\n", __func__); -+ -+ if (voltage == SEC_VOLTAGE_OFF) -+ obuf[2] = 0; -+ else -+ obuf[2] = 1; -+ -+ if (dvb_usb_generic_rw(udev_adap->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ return 0; -+} -+ -+static int bstusb_restart(struct dvb_frontend *fe) -+{ -+ -+ struct dvb_usb_adapter *udev_adap = -+ (struct dvb_usb_adapter *)(fe->dvb->priv); -+ -+ u8 obuf[3] = { 0x36, 3, 0 }; -+ u8 ibuf[] = { 0 }; -+ -+ if (dvb_usb_generic_rw(udev_adap->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x36 transfer failed."); -+ -+ return 0; -+} -+ - static void dw210x_led_ctrl(struct dvb_frontend *fe, int offon) - { - static u8 led_off[] = { 0 }; -@@ -983,6 +1054,24 @@ static struct ds3000_config su3000_ds3000_config = { - .ci_mode = 1, - }; - -+static struct m88ds3103_config US6830_ds3103_config = { ++static struct m88ds3103_config dvbsky_usb_ds3103_config = { + .demod_address = 0x68, + .ci_mode = 1, + .pin_ctrl = 0x83, + .ts_mode = 0, -+ .start_ctrl = bstusb_restart, -+ .set_voltage = bstusb_set_voltage, ++ .start_ctrl = dvbsky_sync_ctrl, ++ .set_voltage = dvbsky_usb_set_voltage, +}; + -+static struct m88ds3103_config US6832_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 1, -+ .pin_ctrl = 0x80, -+ .ts_mode = 0, -+ .start_ctrl = bstusb_restart, -+ .set_voltage = bstusb_set_voltage, -+}; -+ - static int dw2104_frontend_attach(struct dvb_usb_adapter *d) - { - struct dvb_tuner_ops *tuner_ops = NULL; -@@ -1217,6 +1306,87 @@ static int su3000_frontend_attach(struct dvb_usb_adapter *d) - return 0; - } - -+static int US6830_frontend_attach(struct dvb_usb_adapter *d) ++static int dvbsky_s960_attach(struct dvb_usb_adapter *adap) +{ -+ u8 obuf[3] = { 0xe, 0x04, 1 }; -+ u8 ibuf[] = { 0 }; -+ -+ info("US6830: %s!\n", __func__); -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 0; ++ struct dvbsky_state *state = adap_to_priv(adap); ++ struct dvb_usb_device *d = adap_to_d(adap); ++ int ret = 0; + -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); ++ dprintk("%s()\n", __func__); + ++ dvbsky_gpio_ctrl(d, 0x04, 1); ++ ++ dvbsky_gpio_ctrl(d, 0x83, 0); ++ msleep(50); ++ dvbsky_gpio_ctrl(d, 0x83, 1); + msleep(20); ++ ++ adap->fe[0] = dvb_attach(m88ds3103_attach, ++ &dvbsky_usb_ds3103_config, ++ &d->i2c_adap); ++ if (!adap->fe[0]) { ++ printk(KERN_ERR "dvbsky_s960_attach fail."); ++ ret = -ENODEV; ++ } ++ ++ state->has_ci = 0; + -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 1; ++ return ret; ++} + -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); ++static int dvbsky_identify_state(struct dvb_usb_device *d, const char **name) ++{ ++ return WARM; ++} + -+ obuf[0] = 0x51; ++static int dvbsky_init(struct dvb_usb_device *d) ++{ ++ struct dvbsky_state *state = d_to_priv(d); ++ int ret; + -+ if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0) -+ err("command 0x51 transfer failed."); -+ -+ d->fe_adap[0].fe = dvb_attach(m88ds3103_attach, &US6830_ds3103_config, -+ &d->dev->i2c_adap); -+ if (d->fe_adap[0].fe == NULL) -+ return -EIO; -+ -+ info("Attached M88DS3103!\n"); ++ /* use default interface */ ++ ret = usb_set_interface(d->udev, 0, 0); ++ if (ret) ++ return ret; + ++ mutex_init(&state->stream_mutex); ++ ++ /* attach CI */ ++ if (state->has_ci) { ++ dvbsky_gpio_ctrl(d, 0xc0, 1); ++ msleep(100); ++ dvbsky_gpio_ctrl(d, 0xc0, 0); ++ msleep(50); ++ state->ci_attached = 0; ++ ret = dvbsky_ci_init(d); ++ if (ret) ++ return ret; ++ } + return 0; +} + -+static int US6832_frontend_attach(struct dvb_usb_adapter *d) ++static void dvbsky_exit(struct dvb_usb_device *d) +{ -+ u8 obuf[3] = { 0xe, 0x04, 1 }; -+ u8 ibuf[] = { 0 }; -+ -+ info("US6832: %s!\n", __func__); -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 0; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ msleep(20); -+ obuf[0] = 0xe; -+ obuf[1] = 0x83; -+ obuf[2] = 1; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0) -+ err("command 0x0e transfer failed."); -+ -+ obuf[0] = 0x51; -+ -+ if (dvb_usb_generic_rw(d->dev, obuf, 1, ibuf, 1, 0) < 0) -+ err("command 0x51 transfer failed."); -+ -+ d->fe_adap[0].fe = dvb_attach(m88ds3103_attach, &US6832_ds3103_config, -+ &d->dev->i2c_adap); -+ if (d->fe_adap[0].fe == NULL) -+ return -EIO; -+ -+ info("Attached M88DS3103!\n"); -+ -+ return 0; ++ return dvbsky_ci_release(d); +} + - static int dw2102_tuner_attach(struct dvb_usb_adapter *adap) - { - dvb_attach(dvb_pll_attach, adap->fe_adap[0].fe, 0x60, -@@ -1455,6 +1625,9 @@ enum dw2102_table_entry { - TEVII_S480_1, - TEVII_S480_2, - X3M_SPC1400HD, -+ BST_US6830HD, -+ BST_US6831HD, -+ BST_US6832HD, - }; - - static struct usb_device_id dw2102_table[] = { -@@ -1474,6 +1647,9 @@ static struct usb_device_id dw2102_table[] = { - [TEVII_S480_1] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_1)}, - [TEVII_S480_2] = {USB_DEVICE(0x9022, USB_PID_TEVII_S480_2)}, - [X3M_SPC1400HD] = {USB_DEVICE(0x1f4d, 0x3100)}, -+ [BST_US6830HD] = {USB_DEVICE(0x0572, 0x6830)}, -+ [BST_US6831HD] = {USB_DEVICE(0x0572, 0x6831)}, -+ [BST_US6832HD] = {USB_DEVICE(0x0572, 0x6832)}, - { } - }; - -@@ -1883,6 +2059,106 @@ static struct dvb_usb_device_properties su3000_properties = { - } - }; - -+static struct dvb_usb_device_properties US6830_properties = { -+ .caps = DVB_USB_IS_AN_I2C_ADAPTER, -+ .usb_ctrl = DEVICE_SPECIFIC, -+ .size_of_priv = sizeof(struct su3000_state), -+ .power_ctrl = su3000_power_ctrl, -+ .num_adapters = 1, -+ .identify_state = su3000_identify_state, -+ .i2c_algo = &su3000_i2c_algo, -+ -+ .rc.legacy = { -+ .rc_map_table = rc_map_su3000_table, -+ .rc_map_size = ARRAY_SIZE(rc_map_su3000_table), -+ .rc_interval = 150, -+ .rc_query = dw2102_rc_query, -+ }, -+ -+ .read_mac_address = dvbsky_read_mac_address, ++/* DVB USB Driver stuff */ ++static struct dvb_usb_device_properties dvbsky_t680c_props = { ++ .driver_name = KBUILD_MODNAME, ++ .owner = THIS_MODULE, ++ .adapter_nr = adapter_nr, ++ .size_of_priv = sizeof(struct dvbsky_state), + + .generic_bulk_ctrl_endpoint = 0x01, -+ ++ .generic_bulk_ctrl_endpoint_response = 0x81, ++ ++ .i2c_algo = &dvbsky_i2c_algo, ++ .frontend_attach = dvbsky_t680c_attach, ++ .init = dvbsky_init, ++ .get_rc_config = dvbsky_get_rc_config, ++ .streaming_ctrl = dvbsky_streaming_ctrl, ++ .identify_state = dvbsky_identify_state, ++ .exit = dvbsky_exit, ++ ++ .num_adapters = 1, + .adapter = { + { -+ .num_frontends = 1, -+ .fe = {{ -+ .streaming_ctrl = su3000_streaming_ctrl, -+ .frontend_attach = US6830_frontend_attach, -+ .stream = { -+ .type = USB_BULK, -+ .count = 8, -+ .endpoint = 0x82, -+ .u = { -+ .bulk = { -+ .buffersize = 4096, -+ } -+ } -+ } -+ }}, ++ .stream = DVB_USB_STREAM_BULK(0x82, 8, 4096), + } -+ }, -+ .num_device_descs = 2, -+ .devices = { -+ { "Bestunar US6830 HD", -+ { &dw2102_table[BST_US6830HD], NULL }, -+ { NULL }, -+ }, -+ { "Bestunar US6831 HD", -+ { &dw2102_table[BST_US6831HD], NULL }, -+ { NULL }, -+ }, + } +}; + -+static struct dvb_usb_device_properties US6832_properties = { -+ .caps = DVB_USB_IS_AN_I2C_ADAPTER, -+ .usb_ctrl = DEVICE_SPECIFIC, -+ .size_of_priv = sizeof(struct su3000_state), -+ .power_ctrl = su3000_power_ctrl, -+ .num_adapters = 1, -+ .identify_state = su3000_identify_state, -+ .i2c_algo = &su3000_i2c_algo, -+ -+ .rc.legacy = { -+ .rc_map_table = rc_map_su3000_table, -+ .rc_map_size = ARRAY_SIZE(rc_map_su3000_table), -+ .rc_interval = 150, -+ .rc_query = dw2102_rc_query, -+ }, -+ -+ .read_mac_address = dvbsky_read_mac_address, ++static struct dvb_usb_device_properties dvbsky_s960_props = { ++ .driver_name = KBUILD_MODNAME, ++ .owner = THIS_MODULE, ++ .adapter_nr = adapter_nr, ++ .size_of_priv = sizeof(struct dvbsky_state), + + .generic_bulk_ctrl_endpoint = 0x01, ++ .generic_bulk_ctrl_endpoint_response = 0x81, + ++ .i2c_algo = &dvbsky_i2c_algo, ++ .frontend_attach = dvbsky_s960_attach, ++ .init = dvbsky_init, ++ .get_rc_config = dvbsky_get_rc_config, ++ .streaming_ctrl = dvbsky_streaming_ctrl, ++ .identify_state = dvbsky_identify_state, ++ .exit = dvbsky_exit, ++ .read_mac_address = dvbsky_read_mac_addr, ++ ++ .num_adapters = 1, + .adapter = { + { -+ .num_frontends = 1, -+ .fe = {{ -+ .streaming_ctrl = su3000_streaming_ctrl, -+ .frontend_attach = US6832_frontend_attach, -+ .stream = { -+ .type = USB_BULK, -+ .count = 8, -+ .endpoint = 0x82, -+ .u = { -+ .bulk = { -+ .buffersize = 4096, -+ } -+ } -+ } -+ }}, ++ .stream = DVB_USB_STREAM_BULK(0x82, 8, 4096), + } -+ }, -+ .num_device_descs = 1, -+ .devices = { -+ { "Bestunar US6832 HD", -+ { &dw2102_table[BST_US6832HD], NULL }, -+ { NULL }, -+ }, + } +}; + - static int dw2102_probe(struct usb_interface *intf, - const struct usb_device_id *id) - { -@@ -1939,6 +2215,10 @@ static int dw2102_probe(struct usb_interface *intf, - 0 == dvb_usb_device_init(intf, p7500, - THIS_MODULE, NULL, adapter_nr) || - 0 == dvb_usb_device_init(intf, &su3000_properties, -+ THIS_MODULE, NULL, adapter_nr) || -+ 0 == dvb_usb_device_init(intf, &US6830_properties, -+ THIS_MODULE, NULL, adapter_nr) || -+ 0 == dvb_usb_device_init(intf, &US6832_properties, - THIS_MODULE, NULL, adapter_nr)) - return 0; ++static const struct usb_device_id dvbsky_id_table[] = { ++ { DVB_USB_DEVICE(0x0572, 0x680c, ++ &dvbsky_t680c_props, "DVBSky T680C", RC_MAP_DVBSKY) }, ++ { DVB_USB_DEVICE(0x0572, 0x6831, ++ &dvbsky_s960_props, "DVBSky S960/S860", RC_MAP_DVBSKY) }, ++ { } ++}; ++MODULE_DEVICE_TABLE(usb, dvbsky_id_table); ++ ++static struct usb_driver dvbsky_usb_driver = { ++ .name = KBUILD_MODNAME, ++ .id_table = dvbsky_id_table, ++ .probe = dvb_usbv2_probe, ++ .disconnect = dvb_usbv2_disconnect, ++ .suspend = dvb_usbv2_suspend, ++ .resume = dvb_usbv2_resume, ++ .reset_resume = dvb_usbv2_reset_resume, ++ .no_dynamic_id = 1, ++ .soft_unbind = 1, ++}; ++ ++module_usb_driver(dvbsky_usb_driver); ++ ++MODULE_AUTHOR("Max nibble "); ++MODULE_DESCRIPTION("Driver for DVBSky USB2.0"); ++MODULE_LICENSE("GPL"); +diff -urN a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/Kconfig +--- a/drivers/media/usb/dvb-usb-v2/Kconfig 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/usb/dvb-usb-v2/Kconfig 2013-03-31 22:29:20.000000000 +0800 +@@ -147,3 +147,11 @@ + help + Say Y here to support the Realtek RTL28xxU DVB USB receiver. -diff --git a/include/media/rc-map.h b/include/media/rc-map.h -index 74f55a3..1817662 100644 ---- a/include/media/rc-map.h -+++ b/include/media/rc-map.h -@@ -118,6 +118,7 @@ void rc_map_init(void); ++config DVB_USB_DVBSKY ++ tristate "DVBSky USB2.0 support" ++ depends on DVB_USB_V2 ++ select DVB_SI2168 if MEDIA_SUBDRV_AUTOSELECT ++ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT ++ help ++ Say Y here to support the USB receivers from DVBSky. ++ +diff -urN a/drivers/media/usb/dvb-usb-v2/Makefile b/drivers/media/usb/dvb-usb-v2/Makefile +--- a/drivers/media/usb/dvb-usb-v2/Makefile 2013-03-21 04:11:19.000000000 +0800 ++++ b/drivers/media/usb/dvb-usb-v2/Makefile 2013-02-17 12:03:00.000000000 +0800 +@@ -43,6 +43,9 @@ + dvb-usb-rtl28xxu-objs := rtl28xxu.o + obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o + ++dvb-usb-dvbsky-objs := dvbsky.o ++obj-$(CONFIG_DVB_USB_DVBSKY) += dvb-usb-dvbsky.o ++ + ccflags-y += -I$(srctree)/drivers/media/dvb-core + ccflags-y += -I$(srctree)/drivers/media/dvb-frontends + ccflags-y += -I$(srctree)/drivers/media/tuners +diff -urN a/include/media/rc-map.h b/include/media/rc-map.h +--- a/include/media/rc-map.h 2013-03-21 04:11:19.000000000 +0800 ++++ b/include/media/rc-map.h 2013-03-31 21:42:43.000000000 +0800 +@@ -118,6 +118,7 @@ #define RC_MAP_DM1105_NEC "rc-dm1105-nec" #define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro" #define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t" @@ -5992,6 +24181,3 @@ index 74f55a3..1817662 100644 #define RC_MAP_EMPTY "rc-empty" #define RC_MAP_EM_TERRATEC "rc-em-terratec" #define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2" --- -1.7.2.5 - From 1a4d358a0f4e1ae71b28b2f6412bc4e9cf293128 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 19:32:12 +0300 Subject: [PATCH 098/104] projects/*/linux/linux.*.conf: sync kernel config --- projects/Fusion/linux/linux.i386.conf | 1 + projects/Fusion/linux/linux.x86_64.conf | 1 + projects/Generic/linux/linux.i386.conf | 1 + projects/Generic_OSS/linux/linux.i386.conf | 1 + projects/ION/linux/linux.i386.conf | 1 + projects/ION/linux/linux.x86_64.conf | 1 + projects/Intel/linux/linux.i386.conf | 1 + projects/Intel/linux/linux.x86_64.conf | 1 + projects/Virtual/linux/linux.i386.conf | 1 + projects/Virtual/linux/linux.x86_64.conf | 1 + 10 files changed, 10 insertions(+) diff --git a/projects/Fusion/linux/linux.i386.conf b/projects/Fusion/linux/linux.i386.conf index 30d981e05e..1d05617535 100644 --- a/projects/Fusion/linux/linux.i386.conf +++ b/projects/Fusion/linux/linux.i386.conf @@ -2302,6 +2302,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Fusion/linux/linux.x86_64.conf b/projects/Fusion/linux/linux.x86_64.conf index e6ce4557e7..ccd8b67768 100644 --- a/projects/Fusion/linux/linux.x86_64.conf +++ b/projects/Fusion/linux/linux.x86_64.conf @@ -2258,6 +2258,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Generic/linux/linux.i386.conf b/projects/Generic/linux/linux.i386.conf index b246263bb4..e4398d3f0e 100644 --- a/projects/Generic/linux/linux.i386.conf +++ b/projects/Generic/linux/linux.i386.conf @@ -2387,6 +2387,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Generic_OSS/linux/linux.i386.conf b/projects/Generic_OSS/linux/linux.i386.conf index 325931b68a..a73faee39f 100644 --- a/projects/Generic_OSS/linux/linux.i386.conf +++ b/projects/Generic_OSS/linux/linux.i386.conf @@ -2385,6 +2385,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index e6440e0061..6cbb2de0fb 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -2305,6 +2305,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/ION/linux/linux.x86_64.conf b/projects/ION/linux/linux.x86_64.conf index ff520056b6..1e15912647 100644 --- a/projects/ION/linux/linux.x86_64.conf +++ b/projects/ION/linux/linux.x86_64.conf @@ -2244,6 +2244,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Intel/linux/linux.i386.conf b/projects/Intel/linux/linux.i386.conf index d99d376bf5..930f168074 100644 --- a/projects/Intel/linux/linux.i386.conf +++ b/projects/Intel/linux/linux.i386.conf @@ -2331,6 +2331,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Intel/linux/linux.x86_64.conf b/projects/Intel/linux/linux.x86_64.conf index 681c013e7e..207b7d2d8a 100644 --- a/projects/Intel/linux/linux.x86_64.conf +++ b/projects/Intel/linux/linux.x86_64.conf @@ -2271,6 +2271,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Virtual/linux/linux.i386.conf b/projects/Virtual/linux/linux.i386.conf index c99eae2921..84b1ddf3c7 100644 --- a/projects/Virtual/linux/linux.i386.conf +++ b/projects/Virtual/linux/linux.i386.conf @@ -2333,6 +2333,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m diff --git a/projects/Virtual/linux/linux.x86_64.conf b/projects/Virtual/linux/linux.x86_64.conf index 5e62b8b376..e548d67399 100644 --- a/projects/Virtual/linux/linux.x86_64.conf +++ b/projects/Virtual/linux/linux.x86_64.conf @@ -2272,6 +2272,7 @@ CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m CONFIG_DVB_M88DC2800=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m From 4b46cf4253c4da94454a926138d0b858bb61a1e0 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 20:16:26 +0300 Subject: [PATCH 099/104] projects/*/linux/linux.*.conf: sync kernel config (again) --- projects/ARCTIC_MC/linux/linux.x86_64.conf | 6 +++++- projects/ATV/linux/linux.i386.conf | 6 ++++-- projects/Fusion/linux/linux.i386.conf | 8 +++----- projects/Fusion/linux/linux.x86_64.conf | 8 +++----- projects/Generic/linux/linux.i386.conf | 8 +++----- projects/Generic_OSS/linux/linux.i386.conf | 8 +++----- projects/ION/linux/linux.i386.conf | 8 +++----- projects/ION/linux/linux.x86_64.conf | 8 +++----- projects/Intel/linux/linux.i386.conf | 8 +++----- projects/Intel/linux/linux.x86_64.conf | 8 +++----- projects/Ultra/linux/linux.x86_64.conf | 9 ++++----- projects/Virtual/linux/linux.i386.conf | 10 ++++------ projects/Virtual/linux/linux.x86_64.conf | 8 +++----- 13 files changed, 44 insertions(+), 59 deletions(-) diff --git a/projects/ARCTIC_MC/linux/linux.x86_64.conf b/projects/ARCTIC_MC/linux/linux.x86_64.conf index 7d16bb0a50..9cb8b1be2c 100644 --- a/projects/ARCTIC_MC/linux/linux.x86_64.conf +++ b/projects/ARCTIC_MC/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.8.4 Kernel Configuration +# Linux/x86_64 3.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -1949,6 +1949,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2066,6 +2067,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m @@ -2094,6 +2096,8 @@ CONFIG_DVB_TUNER_ITD1000=m CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_CX24116=m +CONFIG_DVB_M88DS3103=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_TDA10071=m diff --git a/projects/ATV/linux/linux.i386.conf b/projects/ATV/linux/linux.i386.conf index efb523afcd..d6ebdbd107 100644 --- a/projects/ATV/linux/linux.i386.conf +++ b/projects/ATV/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -1862,6 +1862,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -1887,7 +1888,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # common driver options # CONFIG_DVB_B2C2_FLEXCOP=m -# CONFIG_SAA716X_SUPPORT is not set CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -1979,6 +1979,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m @@ -2008,6 +2009,7 @@ CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_TDA10071=m diff --git a/projects/Fusion/linux/linux.i386.conf b/projects/Fusion/linux/linux.i386.conf index 1d05617535..ee30507240 100644 --- a/projects/Fusion/linux/linux.i386.conf +++ b/projects/Fusion/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -2078,6 +2078,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2163,10 +2164,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2264,6 +2261,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Fusion/linux/linux.x86_64.conf b/projects/Fusion/linux/linux.x86_64.conf index ccd8b67768..58c8c2e574 100644 --- a/projects/Fusion/linux/linux.x86_64.conf +++ b/projects/Fusion/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.8.4 Kernel Configuration +# Linux/x86_64 3.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -2034,6 +2034,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2119,10 +2120,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2220,6 +2217,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Generic/linux/linux.i386.conf b/projects/Generic/linux/linux.i386.conf index e4398d3f0e..c983adc2bb 100644 --- a/projects/Generic/linux/linux.i386.conf +++ b/projects/Generic/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -2162,6 +2162,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2248,10 +2249,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2349,6 +2346,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Generic_OSS/linux/linux.i386.conf b/projects/Generic_OSS/linux/linux.i386.conf index a73faee39f..81ef220d2f 100644 --- a/projects/Generic_OSS/linux/linux.i386.conf +++ b/projects/Generic_OSS/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -2160,6 +2160,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2246,10 +2247,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2347,6 +2344,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index 6cbb2de0fb..b90ba84a41 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -2080,6 +2080,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2166,10 +2167,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2267,6 +2264,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/ION/linux/linux.x86_64.conf b/projects/ION/linux/linux.x86_64.conf index 1e15912647..64ce8f23b7 100644 --- a/projects/ION/linux/linux.x86_64.conf +++ b/projects/ION/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.8.4 Kernel Configuration +# Linux/x86_64 3.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -2019,6 +2019,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2105,10 +2106,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2206,6 +2203,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Intel/linux/linux.i386.conf b/projects/Intel/linux/linux.i386.conf index 930f168074..dae7391269 100644 --- a/projects/Intel/linux/linux.i386.conf +++ b/projects/Intel/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -2106,6 +2106,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2192,10 +2193,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2293,6 +2290,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Intel/linux/linux.x86_64.conf b/projects/Intel/linux/linux.x86_64.conf index 207b7d2d8a..becd7626e2 100644 --- a/projects/Intel/linux/linux.x86_64.conf +++ b/projects/Intel/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.8.4 Kernel Configuration +# Linux/x86_64 3.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -2046,6 +2046,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2132,10 +2133,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2233,6 +2230,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Ultra/linux/linux.x86_64.conf b/projects/Ultra/linux/linux.x86_64.conf index 59058a8bdc..1a8a4c0ffb 100644 --- a/projects/Ultra/linux/linux.x86_64.conf +++ b/projects/Ultra/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.8.4 Kernel Configuration +# Linux/x86_64 3.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -1935,6 +1935,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -1960,10 +1961,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # common driver options # CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2055,6 +2052,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m @@ -2084,6 +2082,7 @@ CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_CX24116=m CONFIG_DVB_M88DS3103=m +CONFIG_DVB_SI2168=m CONFIG_DVB_SI21XX=m CONFIG_DVB_DS3000=m CONFIG_DVB_TDA10071=m diff --git a/projects/Virtual/linux/linux.i386.conf b/projects/Virtual/linux/linux.i386.conf index 84b1ddf3c7..6d7f3af80a 100644 --- a/projects/Virtual/linux/linux.i386.conf +++ b/projects/Virtual/linux/linux.i386.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/i386 3.8.4 Kernel Configuration +# Linux/i386 3.8.5 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y @@ -2108,6 +2108,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2185,19 +2186,15 @@ CONFIG_SMS_SDIO_DRV=m # Supported FireWire (IEEE 1394) Adapters # CONFIG_DVB_FIREDTV=m +CONFIG_DVB_FIREDTV_INPUT=y CONFIG_MEDIA_COMMON_OPTIONS=y # # common driver options # -CONFIG_DVB_FIREDTV_INPUT=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2295,6 +2292,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m diff --git a/projects/Virtual/linux/linux.x86_64.conf b/projects/Virtual/linux/linux.x86_64.conf index e548d67399..3b3122e54e 100644 --- a/projects/Virtual/linux/linux.x86_64.conf +++ b/projects/Virtual/linux/linux.x86_64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.8.4 Kernel Configuration +# Linux/x86_64 3.8.5 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -2047,6 +2047,7 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m # CONFIG_DVB_USB_MXL111SF is not set CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_DVBSKY=m # CONFIG_DVB_TTUSB_BUDGET is not set # CONFIG_DVB_TTUSB_DEC is not set CONFIG_SMS_USB_DRV=m @@ -2133,10 +2134,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m -CONFIG_SAA716X_SUPPORT=y -CONFIG_SAA716X_CORE=m -CONFIG_DVB_SAA716X_BUDGET=m -CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y @@ -2234,6 +2231,7 @@ CONFIG_MEDIA_TUNER_TUA9001=m # # Multistandard (satellite) frontends # +CONFIG_DVB_CX24120=m CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m From fb6fecca1f22c7a845e4ffe33d6397bdd23eaaab Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 21:17:36 +0300 Subject: [PATCH 100/104] linux: re-add fixed -saa716x_PCIe_interface_chipset.patch --- ...x-950-saa716x_PCIe_interface_chipset.patch | 12914 ++++++++++++++++ 1 file changed, 12914 insertions(+) create mode 100644 packages/linux/patches/3.8.5/linux-950-saa716x_PCIe_interface_chipset.patch diff --git a/packages/linux/patches/3.8.5/linux-950-saa716x_PCIe_interface_chipset.patch b/packages/linux/patches/3.8.5/linux-950-saa716x_PCIe_interface_chipset.patch new file mode 100644 index 0000000000..d2ee6111cc --- /dev/null +++ b/packages/linux/patches/3.8.5/linux-950-saa716x_PCIe_interface_chipset.patch @@ -0,0 +1,12914 @@ +diff -Naur linux-3.7.2/drivers/media/common/Kconfig linux-3.7.2.patch/drivers/media/common/Kconfig +--- linux-3.7.2/drivers/media/common/Kconfig 2013-01-11 18:19:28.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/Kconfig 2013-01-16 10:52:04.586923233 +0100 +@@ -1,3 +1,4 @@ + source "drivers/media/common/b2c2/Kconfig" + source "drivers/media/common/saa7146/Kconfig" ++source "drivers/media/common/saa716x/Kconfig" + source "drivers/media/common/siano/Kconfig" +diff -Naur linux-3.7.2/drivers/media/common/Makefile linux-3.7.2.patch/drivers/media/common/Makefile +--- linux-3.7.2/drivers/media/common/Makefile 2013-01-11 18:19:28.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/Makefile 2013-01-16 10:52:15.443844483 +0100 +@@ -1 +1 @@ +-obj-y += b2c2/ saa7146/ siano/ ++obj-y += b2c2/ saa7146/ saa716x/ siano/ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/Kconfig linux-3.7.2.patch/drivers/media/common/saa716x/Kconfig +--- linux-3.7.2/drivers/media/common/saa716x/Kconfig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/Kconfig 2013-01-16 10:41:10.906798319 +0100 +@@ -0,0 +1,67 @@ ++menuconfig SAA716X_SUPPORT ++ bool "Support for SAA716x family from NXP/Philips" ++ depends on PCI && I2C ++ help ++ support for saa716x ++ ++if SAA716X_SUPPORT ++config SAA716X_CORE ++ tristate "SAA7160/1/2 PCI Express bridge based devices" ++ depends on PCI && I2C ++ ++ help ++ Support for PCI cards based on the SAA7160/1/2 PCI Express bridge. ++ ++ Say Y if you own such a device and want to use it. ++ ++config DVB_SAA716X_BUDGET ++ tristate "SAA7160/1/2 based Budget PCIe cards (DVB only)" ++ depends on SAA716X_CORE && DVB_CORE ++ select DVB_DS3000 if !DVB_FE_CUSTOMISE ++ select DVB_DS3103 if !DVB_FE_CUSTOMISE ++ select DVB_TS2022 if !DVB_FE_CUSTOMISE ++ ++ help ++ Support for the SAA7160/1/2 based Budget PCIe DVB cards ++ Currently supported devices are: ++ ++ * KNC1 Dual S2 (DVB-S, DVB-S/S2) ++ * Twinhan/Azurewave VP-1028 (DVB-S) ++ * Twinhan/Azurewave VP-3071 (DVB-T x2) ++ * Twinhan/Azurewave VP-6002 (DVB-S) ++ ++ Say Y if you own such a device and want to use it. ++ ++config DVB_SAA716X_HYBRID ++ tristate "SAA7160/1/2 based Hybrid PCIe cards (DVB + Analog)" ++ depends on SAA716X_CORE && DVB_CORE ++ ++ help ++ Support for the SAA7160/1/2 based Hybrid PCIe DVB cards ++ Currently supported devices are: ++ ++ * Avermedia H-788 (DVB-T) ++ * Avermedia HC-82 (DVB-T) ++ * NXP Reference (Atlantis) (DVB-T x2) ++ * NXP Reference (Nemo) (DVB-T) ++ * Twinhan/Azurewave VP-6090 (DVB-S x2, DVB-T x2) ++ ++ Say Y if you own such a device and want to use it. ++ ++#config DVB_SAA716X_FF ++# tristate "SAA7160/1/2 based Full Fledged PCIe cards" ++# depends on SAA716X_CORE && DVB_CORE ++# depends on INPUT # IR ++# default n ++ ++# help ++# Support for the SAA7160/1/2 based Full fledged PCIe DVB cards ++# These cards do feature a hardware MPEG decoder and other ++# peripherals. Also known as Premium cards. ++# Currently supported devices are: ++ ++# * Technotrend S2 6400 Dual S2 HD (DVB-S/S2 x2) ++ ++# Say Y if you own such a device and want to use it. ++ ++endif # SAA716X_SUPPORT +diff -Naur linux-3.7.2/drivers/media/common/saa716x/Makefile linux-3.7.2.patch/drivers/media/common/saa716x/Makefile +--- linux-3.7.2/drivers/media/common/saa716x/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/Makefile 2013-01-16 10:54:20.634929700 +0100 +@@ -0,0 +1,26 @@ ++saa716x_core-objs := saa716x_pci.o \ ++ saa716x_i2c.o \ ++ saa716x_cgu.o \ ++ saa716x_msi.o \ ++ saa716x_dma.o \ ++ saa716x_vip.o \ ++ saa716x_aip.o \ ++ saa716x_phi.o \ ++ saa716x_boot.o \ ++ saa716x_fgpi.o \ ++ saa716x_adap.o \ ++ saa716x_gpio.o \ ++ saa716x_greg.o \ ++ saa716x_rom.o \ ++ saa716x_spi.o ++ ++#saa716x_ff-objs := saa716x_ff_main.o \ ++# saa716x_ff_cmd.o \ ++# saa716x_ff_ir.o ++ ++obj-$(CONFIG_SAA716X_CORE) += saa716x_core.o ++obj-$(CONFIG_DVB_SAA716X_BUDGET) += saa716x_budget.o ++obj-$(CONFIG_DVB_SAA716X_HYBRID) += saa716x_hybrid.o ++#obj-$(CONFIG_DVB_SAA716X_FF) += saa716x_ff.o ++ ++EXTRA_CFLAGS = -Idrivers/media/dvb-core/ -Idrivers/media/dvb-frontends/ -Idrivers/media/tuners/ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.c 2013-01-16 10:41:10.907798312 +0100 +@@ -0,0 +1,274 @@ ++#include ++ ++#include "dmxdev.h" ++#include "dvbdev.h" ++#include "dvb_demux.h" ++#include "dvb_frontend.h" ++ ++#include "saa716x_mod.h" ++#include "saa716x_spi.h" ++#include "saa716x_adap.h" ++#include "saa716x_i2c.h" ++#include "saa716x_gpio.h" ++#include "saa716x_priv.h" ++#include "saa716x_budget.h" ++ ++ ++DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); ++ ++ ++void saa716x_dma_start(struct saa716x_dev *saa716x, u8 adapter) ++{ ++ struct fgpi_stream_params params; ++ ++ dprintk(SAA716x_DEBUG, 1, "SAA716x Start DMA engine for Adapter:%d", adapter); ++ ++ params.bits = 8; ++ params.samples = 188; ++ params.lines = 348; ++ params.pitch = 188; ++ params.offset = 0; ++ params.page_tables = 0; ++ params.stream_type = FGPI_TRANSPORT_STREAM; ++ params.stream_flags = 0; ++ ++ saa716x_fgpi_start(saa716x, saa716x->config->adap_config[adapter].ts_port, ¶ms); ++} ++ ++void saa716x_dma_stop(struct saa716x_dev *saa716x, u8 adapter) ++{ ++ dprintk(SAA716x_DEBUG, 1, "SAA716x Stop DMA engine for Adapter:%d", adapter); ++ ++ saa716x_fgpi_stop(saa716x, saa716x->config->adap_config[adapter].ts_port); ++} ++ ++static int saa716x_dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed) ++{ ++ struct dvb_demux *dvbdmx = dvbdmxfeed->demux; ++ struct saa716x_adapter *saa716x_adap = dvbdmx->priv; ++ struct saa716x_dev *saa716x = saa716x_adap->saa716x; ++ ++ dprintk(SAA716x_DEBUG, 1, "SAA716x DVB Start feed"); ++ if (!dvbdmx->dmx.frontend) { ++ dprintk(SAA716x_DEBUG, 1, "no frontend ?"); ++ return -EINVAL; ++ } ++ saa716x_adap->feeds++; ++ dprintk(SAA716x_DEBUG, 1, "SAA716x start feed, feeds=%d", ++ saa716x_adap->feeds); ++ ++ if (saa716x_adap->feeds == 1) { ++ dprintk(SAA716x_DEBUG, 1, "SAA716x start feed & dma"); ++ saa716x_dma_start(saa716x, saa716x_adap->count); ++ } ++ ++ return saa716x_adap->feeds; ++} ++ ++static int saa716x_dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed) ++{ ++ struct dvb_demux *dvbdmx = dvbdmxfeed->demux; ++ struct saa716x_adapter *saa716x_adap = dvbdmx->priv; ++ struct saa716x_dev *saa716x = saa716x_adap->saa716x; ++ ++ dprintk(SAA716x_DEBUG, 1, "SAA716x DVB Stop feed"); ++ if (!dvbdmx->dmx.frontend) { ++ dprintk(SAA716x_DEBUG, 1, "no frontend ?"); ++ return -EINVAL; ++ } ++ saa716x_adap->feeds--; ++ if (saa716x_adap->feeds == 0) { ++ dprintk(SAA716x_DEBUG, 1, "saa716x stop feed and dma"); ++ saa716x_dma_stop(saa716x, saa716x_adap->count); ++ } ++ ++ return 0; ++} ++ ++int saa716x_dvb_init(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; ++ struct saa716x_config *config = saa716x->config; ++ int result, i; ++ ++ mutex_init(&saa716x->adap_lock); ++ ++ for (i = 0; i < config->adapters; i++) { ++ ++ dprintk(SAA716x_DEBUG, 1, "dvb_register_adapter"); ++ if (dvb_register_adapter(&saa716x_adap->dvb_adapter, ++ "SAA716x dvb adapter", ++ THIS_MODULE, ++ &saa716x->pdev->dev, ++ adapter_nr) < 0) { ++ ++ dprintk(SAA716x_ERROR, 1, "Error registering adapter"); ++ return -ENODEV; ++ } ++ ++ saa716x_adap->count = i; ++ ++ saa716x_adap->dvb_adapter.priv = saa716x_adap; ++ saa716x_adap->demux.dmx.capabilities = DMX_TS_FILTERING | ++ DMX_SECTION_FILTERING | ++ DMX_MEMORY_BASED_FILTERING; ++ ++ saa716x_adap->demux.priv = saa716x_adap; ++ saa716x_adap->demux.filternum = 256; ++ saa716x_adap->demux.feednum = 256; ++ saa716x_adap->demux.start_feed = saa716x_dvb_start_feed; ++ saa716x_adap->demux.stop_feed = saa716x_dvb_stop_feed; ++ saa716x_adap->demux.write_to_decoder = NULL; ++ switch (saa716x->pdev->subsystem_device) { ++ case TEVII_S472: { ++ struct saa716x_i2c *i2c = saa716x->i2c; ++ struct i2c_adapter *adapter = &i2c[SAA716x_I2C_BUS_B].i2c_adapter; ++ u8 mac[6]; ++ u8 b0[] = { 0, 9 }; ++ struct i2c_msg msg[] = { ++ { ++ .addr = 0x50, ++ .flags = 0, ++ .buf = b0, ++ .len = 2 ++ }, { ++ .addr = 0x50, ++ .flags = I2C_M_RD, ++ .buf = mac, ++ .len = 6 ++ } ++ }; ++ ++ i2c_transfer(adapter, msg, 2); ++ dprintk(SAA716x_INFO, 1, "TeVii S472 MAC= %pM\n", mac); ++ memcpy(saa716x_adap->dvb_adapter.proposed_mac, mac, 6); ++ } ++ } ++ ++ dprintk(SAA716x_DEBUG, 1, "dvb_dmx_init"); ++ if ((result = dvb_dmx_init(&saa716x_adap->demux)) < 0) { ++ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); ++ goto err0; ++ } ++ ++ saa716x_adap->dmxdev.filternum = 256; ++ saa716x_adap->dmxdev.demux = &saa716x_adap->demux.dmx; ++ saa716x_adap->dmxdev.capabilities = 0; ++ ++ dprintk(SAA716x_DEBUG, 1, "dvb_dmxdev_init"); ++ if ((result = dvb_dmxdev_init(&saa716x_adap->dmxdev, ++ &saa716x_adap->dvb_adapter)) < 0) { ++ ++ dprintk(SAA716x_ERROR, 1, "dvb_dmxdev_init failed, ERROR=%d", result); ++ goto err1; ++ } ++ ++ saa716x_adap->fe_hw.source = DMX_FRONTEND_0; ++ ++ if ((result = saa716x_adap->demux.dmx.add_frontend(&saa716x_adap->demux.dmx, ++ &saa716x_adap->fe_hw)) < 0) { ++ ++ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); ++ goto err2; ++ } ++ ++ saa716x_adap->fe_mem.source = DMX_MEMORY_FE; ++ ++ if ((result = saa716x_adap->demux.dmx.add_frontend(&saa716x_adap->demux.dmx, ++ &saa716x_adap->fe_mem)) < 0) { ++ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); ++ goto err3; ++ } ++ ++ if ((result = saa716x_adap->demux.dmx.connect_frontend(&saa716x_adap->demux.dmx, ++ &saa716x_adap->fe_hw)) < 0) { ++ ++ dprintk(SAA716x_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result); ++ goto err4; ++ } ++ ++ dvb_net_init(&saa716x_adap->dvb_adapter, &saa716x_adap->dvb_net, &saa716x_adap->demux.dmx); ++// tasklet_init(&saa716x_adap->tasklet, saa716x_dma_xfer, (unsigned long) saa716x); ++ dprintk(SAA716x_DEBUG, 1, "Frontend Init"); ++ saa716x_adap->saa716x = saa716x; ++ ++ if (config->frontend_attach) { ++ result = config->frontend_attach(saa716x_adap, i); ++ if (result < 0) ++ dprintk(SAA716x_ERROR, 1, "SAA716x frontend attach failed"); ++ ++ if (saa716x_adap->fe == NULL) { ++ dprintk(SAA716x_ERROR, 1, "A frontend driver was not found for [%04x:%04x] subsystem [%04x:%04x]\n", ++ saa716x->pdev->vendor, ++ saa716x->pdev->device, ++ saa716x->pdev->subsystem_vendor, ++ saa716x->pdev->subsystem_device); ++ } else { ++ result = dvb_register_frontend(&saa716x_adap->dvb_adapter, saa716x_adap->fe); ++ if (result < 0) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x register frontend failed"); ++ goto err6; ++ } ++ } ++ ++ } else { ++ dprintk(SAA716x_ERROR, 1, "Frontend attach = NULL"); ++ } ++ ++ saa716x_fgpi_init(saa716x, config->adap_config[i].ts_port, ++ config->adap_config[i].worker); ++ ++ saa716x_adap++; ++ } ++ ++ ++ return 0; ++ ++ /* Error conditions */ ++err6: ++ dvb_frontend_detach(saa716x_adap->fe); ++err4: ++ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_mem); ++err3: ++ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_hw); ++err2: ++ dvb_dmxdev_release(&saa716x_adap->dmxdev); ++err1: ++ dvb_dmx_release(&saa716x_adap->demux); ++err0: ++ dvb_unregister_adapter(&saa716x_adap->dvb_adapter); ++ ++ return result; ++} ++EXPORT_SYMBOL(saa716x_dvb_init); ++ ++void saa716x_dvb_exit(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; ++ int i; ++ ++ for (i = 0; i < saa716x->config->adapters; i++) { ++ ++ saa716x_fgpi_exit(saa716x, saa716x->config->adap_config[i].ts_port); ++ ++ if (saa716x_adap->fe) { ++ dvb_unregister_frontend(saa716x_adap->fe); ++ dvb_frontend_detach(saa716x_adap->fe); ++ } ++ ++// tasklet_kill(&saa716x->tasklet); ++ dvb_net_release(&saa716x_adap->dvb_net); ++ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_mem); ++ saa716x_adap->demux.dmx.remove_frontend(&saa716x_adap->demux.dmx, &saa716x_adap->fe_hw); ++ dvb_dmxdev_release(&saa716x_adap->dmxdev); ++ dvb_dmx_release(&saa716x_adap->demux); ++ ++ dprintk(SAA716x_DEBUG, 1, "dvb_unregister_adapter"); ++ dvb_unregister_adapter(&saa716x_adap->dvb_adapter); ++ ++ saa716x_adap++; ++ } ++ ++ return; ++} ++EXPORT_SYMBOL(saa716x_dvb_exit); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_adap.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_adap.h 2013-01-16 10:41:10.907798312 +0100 +@@ -0,0 +1,9 @@ ++#ifndef __SAA716x_ADAP_H ++#define __SAA716x_ADAP_H ++ ++struct saa716x_dev; ++ ++extern int saa716x_dvb_init(struct saa716x_dev *saa716x); ++extern void saa716x_dvb_exit(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_ADAP_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.c 2013-01-16 10:41:10.907798312 +0100 +@@ -0,0 +1,20 @@ ++#include ++ ++#include "saa716x_mod.h" ++#include "saa716x_aip_reg.h" ++#include "saa716x_spi.h" ++#include "saa716x_aip.h" ++#include "saa716x_priv.h" ++ ++int saa716x_aip_status(struct saa716x_dev *saa716x, u32 dev) ++{ ++ return SAA716x_EPRD(dev, AI_CTL) == 0 ? 0 : -1; ++} ++EXPORT_SYMBOL_GPL(saa716x_aip_status); ++ ++void saa716x_aip_disable(struct saa716x_dev *saa716x) ++{ ++ SAA716x_EPWR(AI0, AI_CTL, 0x00); ++ SAA716x_EPWR(AI1, AI_CTL, 0x00); ++} ++EXPORT_SYMBOL_GPL(saa716x_aip_disable); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_aip.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip.h 2013-01-16 10:41:10.907798312 +0100 +@@ -0,0 +1,9 @@ ++#ifndef __SAA716x_AIP_H ++#define __SAA716x_AIP_H ++ ++struct saa716x_dev; ++ ++extern int saa716x_aip_status(struct saa716x_dev *saa716x, u32 dev); ++extern void saa716x_aip_disable(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_AIP_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_aip_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_aip_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_aip_reg.h 2013-01-16 10:41:10.908798304 +0100 +@@ -0,0 +1,62 @@ ++#ifndef __SAA716x_AIP_REG_H ++#define __SAA716x_AIP_REG_H ++ ++/* -------------- AI Registers ---------------- */ ++ ++#define AI_STATUS 0x000 ++#define AI_BUF1_ACTIVE (0x00000001 << 4) ++#define AI_OVERRUN (0x00000001 << 3) ++#define AI_HBE (0x00000001 << 2) ++#define AI_BUF2_FULL (0x00000001 << 1) ++#define AI_BUF1_FULL (0x00000001 << 0) ++ ++#define AI_CTL 0x004 ++#define AI_RESET (0x00000001 << 31) ++#define AI_CAP_ENABLE (0x00000001 << 30) ++#define AI_CAP_MODE (0x00000003 << 28) ++#define AI_SIGN_CONVERT (0x00000001 << 27) ++#define AI_EARLYMODE (0x00000001 << 26) ++#define AI_DIAGMODE (0x00000001 << 25) ++#define AI_RAWMODE (0x00000001 << 24) ++#define AI_OVR_INTEN (0x00000001 << 7) ++#define AI_HBE_INTEN (0x00000001 << 6) ++#define AI_BUF2_INTEN (0x00000001 << 5) ++#define AI_BUF1_INTEN (0x00000001 << 4) ++#define AI_ACK_OVR (0x00000001 << 3) ++#define AI_ACK_HBE (0x00000001 << 2) ++#define AI_ACK2 (0x00000001 << 1) ++#define AI_ACK1 (0x00000001 << 0) ++ ++#define AI_SERIAL 0x008 ++#define AI_SER_MASTER (0x00000001 << 31) ++#define AI_DATAMODE (0x00000001 << 30) ++#define AI_FRAMEMODE (0x00000003 << 28) ++#define AI_CLOCK_EDGE (0x00000001 << 27) ++#define AI_SSPOS4 (0x00000001 << 19) ++#define AI_NR_CHAN (0x00000003 << 17) ++#define AI_WSDIV (0x000001ff << 8) ++#define AI_SCKDIV (0x000000ff << 0) ++ ++#define AI_FRAMING 0x00c ++#define AI_VALIDPOS (0x000001ff << 22) ++#define AI_LEFTPOS (0x000001ff << 13) ++#define AI_RIGHTPOS (0x000001ff << 4) ++#define AI_SSPOS_3_0 (0x0000000f << 0) ++ ++#define AI_BASE1 0x014 ++#define AI_BASE2 0x018 ++#define AI_BASE (0x03ffffff << 6) ++ ++#define AI_SIZE 0x01c ++#define AI_SAMPLE_SIZE (0x03ffffff << 6) ++ ++#define AI_INT_ACK 0x020 ++#define AI_ACK_OVR (0x00000001 << 3) ++#define AI_ACK_HBE (0x00000001 << 2) ++#define AI_ACK2 (0x00000001 << 1) ++#define AI_ACK1 (0x00000001 << 0) ++ ++#define AI_PWR_DOWN 0xff4 ++#define AI_PWR_DWN (0x00000001 << 0) ++ ++#endif /* __SAA716x_AIP_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.c 2013-01-16 10:41:10.908798304 +0100 +@@ -0,0 +1,319 @@ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_greg_reg.h" ++#include "saa716x_cgu_reg.h" ++#include "saa716x_vip_reg.h" ++#include "saa716x_aip_reg.h" ++#include "saa716x_msi_reg.h" ++#include "saa716x_dma_reg.h" ++#include "saa716x_gpio_reg.h" ++#include "saa716x_fgpi_reg.h" ++#include "saa716x_dcs_reg.h" ++ ++#include "saa716x_boot.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++static int saa716x_ext_boot(struct saa716x_dev *saa716x) ++{ ++ /* Write GREG boot_ready to 0 ++ * DW_0 = 0x0001_2018 ++ * DW_1 = 0x0000_0000 ++ */ ++ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00000000); ++ ++ /* Clear VI0 interrupt ++ * DW_2 = 0x0000_0fe8 ++ * DW_3 = 0x0000_03ff ++ */ ++ SAA716x_EPWR(VI0, INT_CLR_STATUS, 0x000003ff); ++ ++ /* Clear VI1 interrupt ++ * DW_4 = 0x0000_1fe8 ++ * DW_5 = 0x0000_03ff ++ */ ++ SAA716x_EPWR(VI1, INT_CLR_STATUS, 0x000003ff); ++ ++ /* CLear FGPI0 interrupt ++ * DW_6 = 0x0000_2fe8 ++ * DW_7 = 0x0000_007f ++ */ ++ SAA716x_EPWR(FGPI0, INT_CLR_STATUS, 0x0000007f); ++ ++ /* Clear FGPI1 interrupt ++ * DW_8 = 0x0000_3fe8 ++ * DW_9 = 0x0000_007f ++ */ ++ SAA716x_EPWR(FGPI1, INT_CLR_STATUS, 0x0000007f); ++ ++ /* Clear FGPI2 interrupt ++ * DW_10 = 0x0000_4fe8 ++ * DW_11 = 0x0000_007f ++ */ ++ SAA716x_EPWR(FGPI2, INT_CLR_STATUS, 0x0000007f); ++ ++ /* Clear FGPI3 interrupt ++ * DW_12 = 0x0000_5fe8 ++ * DW_13 = 0x0000_007f ++ */ ++ SAA716x_EPWR(FGPI3, INT_CLR_STATUS, 0x0000007f); ++ ++ /* Clear AI0 interrupt ++ * DW_14 = 0x0000_6020 ++ * DW_15 = 0x0000_000f ++ */ ++ SAA716x_EPWR(AI0, AI_INT_ACK, 0x0000000f); ++ ++ /* Clear AI1 interrupt ++ * DW_16 = 0x0000_7020 ++ * DW_17 = 0x0000_200f ++ */ ++ SAA716x_EPWR(AI1, AI_INT_ACK, 0x0000000f); ++ ++ /* Set GREG boot_ready bit to 1 ++ * DW_18 = 0x0001_2018 ++ * DW_19 = 0x0000_2000 ++ */ ++ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00002000); ++#if 0 ++ /* End of Boot script command ++ * DW_20 = 0x0000_0006 ++ * Where to write this value ?? ++ * This seems very odd an address to trigger the ++ * Boot Control State Machine ! ++ */ ++ SAA716x_EPWR(VI0, 0x00000006, 0xffffffff); ++#endif ++ return 0; ++} ++ ++/* Internal Bootscript configuration */ ++static void saa716x_int_boot(struct saa716x_dev *saa716x) ++{ ++ /* #1 Configure PCI COnfig space ++ * GREG_JETSTR_CONFIG_0 ++ */ ++ SAA716x_EPWR(GREG, GREG_SUBSYS_CONFIG, saa716x->pdev->subsystem_vendor); ++ ++ /* GREG_JETSTR_CONFIG_1 ++ * pmcsr_scale:7 = 0x00 ++ * pmcsr_scale:6 = 0x00 ++ * pmcsr_scale:5 = 0x00 ++ * pmcsr_scale:4 = 0x00 ++ * pmcsr_scale:3 = 0x00 ++ * pmcsr_scale:2 = 0x00 ++ * pmcsr_scale:1 = 0x00 ++ * pmcsr_scale:0 = 0x00 ++ * BAR mask = 20 bit ++ * BAR prefetch = no ++ * MSI capable = 32 messages ++ */ ++ SAA716x_EPWR(GREG, GREG_MSI_BAR_PMCSR, 0x00001005); ++ ++ /* GREG_JETSTR_CONFIG_2 ++ * pmcsr_data:3 = 0x0 ++ * pmcsr_data:2 = 0x0 ++ * pmcsr_data:1 = 0x0 ++ * pmcsr_data:0 = 0x0 ++ */ ++ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_1, 0x00000000); ++ ++ /* GREG_JETSTR_CONFIG_3 ++ * pmcsr_data:7 = 0x0 ++ * pmcsr_data:6 = 0x0 ++ * pmcsr_data:5 = 0x0 ++ * pmcsr_data:4 = 0x0 ++ */ ++ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_2, 0x00000000); ++ ++ /* #2 Release GREG resets ++ * ip_rst_an ++ * dpa1_rst_an ++ * jetsream_reset_an ++ */ ++ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00000e00); ++ ++ /* #3 GPIO Setup ++ * GPIO 25:24 = Output ++ * GPIO Output "0" after Reset ++ */ ++ SAA716x_EPWR(GPIO, GPIO_OEN, 0xfcffffff); ++ ++ /* #4 Custom stuff goes in here */ ++ ++ /* #5 Disable CGU Clocks ++ * except for PHY, Jetstream, DPA1, DCS, Boot, GREG ++ * CGU_PCR_0_3: pss_mmu_clk:0 = 0x0 ++ */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_3, 0x00000006); ++ ++ /* CGU_PCR_0_4: pss_dtl2mtl_mmu_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_4, 0x00000006); ++ ++ /* CGU_PCR_0_5: pss_msi_ck:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_5, 0x00000006); ++ ++ /* CGU_PCR_0_7: pss_gpio_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_7, 0x00000006); ++ ++ /* CGU_PCR_2_1: spi_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_2_1, 0x00000006); ++ ++ /* CGU_PCR_3_2: i2c_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_3_2, 0x00000006); ++ ++ /* CGU_PCR_4_1: phi_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_4_1, 0x00000006); ++ ++ /* CGU_PCR_5: vip0_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_5, 0x00000006); ++ ++ /* CGU_PCR_6: vip1_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_6, 0x00000006); ++ ++ /* CGU_PCR_7: fgpi0_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_7, 0x00000006); ++ ++ /* CGU_PCR_8: fgpi1_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_8, 0x00000006); ++ ++ /* CGU_PCR_9: fgpi2_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_9, 0x00000006); ++ ++ /* CGU_PCR_10: fgpi3_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_10, 0x00000006); ++ ++ /* CGU_PCR_11: ai0_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_11, 0x00000006); ++ ++ /* CGU_PCR_12: ai1_clk:0 = 0x0 */ ++ SAA716x_EPWR(CGU, CGU_PCR_12, 0x00000006); ++ ++ /* #6 Set GREG boot_ready = 0x1 */ ++ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, 0x00002000); ++ ++ /* #7 Disable GREG CGU Clock */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_6, 0x00000006); ++ ++ /* End of Bootscript command ?? */ ++} ++ ++int saa716x_core_boot(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_config *config = saa716x->config; ++ ++ switch (config->boot_mode) { ++ case SAA716x_EXT_BOOT: ++ dprintk(SAA716x_DEBUG, 1, "Using External Boot from config"); ++ saa716x_ext_boot(saa716x); ++ break; ++ case SAA716x_INT_BOOT: ++ dprintk(SAA716x_DEBUG, 1, "Using Internal Boot from config"); ++ saa716x_int_boot(saa716x); ++ break; ++ default: ++ dprintk(SAA716x_ERROR, 1, "Unknown configuration %d", config->boot_mode); ++ break; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_core_boot); ++ ++static void saa716x_bus_report(struct pci_dev *pdev, int enable) ++{ ++ u32 reg; ++ ++ pci_read_config_dword(pdev, 0x04, ®); ++ if (enable) ++ reg |= 0x00000100; /* enable SERR */ ++ else ++ reg &= 0xfffffeff; /* disable SERR */ ++ pci_write_config_dword(pdev, 0x04, reg); ++ ++ pci_read_config_dword(pdev, 0x58, ®); ++ reg &= 0xfffffffd; ++ pci_write_config_dword(pdev, 0x58, reg); ++} ++ ++int saa716x_jetpack_init(struct saa716x_dev *saa716x) ++{ ++ /* ++ * configure PHY through config space not to report ++ * non-fatal error messages to avoid problems with ++ * quirky BIOS'es ++ */ ++ saa716x_bus_report(saa716x->pdev, 0); ++ ++ /* ++ * create time out for blocks that have no clock ++ * helps with lower bitrates on FGPI ++ */ ++ SAA716x_EPWR(DCS, DCSC_CTRL, ENABLE_TIMEOUT); ++ ++ /* Reset all blocks */ ++ SAA716x_EPWR(MSI, MSI_SW_RST, MSI_SW_RESET); ++ SAA716x_EPWR(MMU, MMU_SW_RST, MMU_SW_RESET); ++ SAA716x_EPWR(BAM, BAM_SW_RST, BAM_SW_RESET); ++ ++ switch (saa716x->pdev->device) { ++ case SAA7162: ++ dprintk(SAA716x_DEBUG, 1, "SAA%02x Decoder disable", saa716x->pdev->device); ++ SAA716x_EPWR(GPIO, GPIO_OEN, 0xfcffffff); ++ SAA716x_EPWR(GPIO, GPIO_WR, 0x00000000); /* Disable decoders */ ++ msleep(10); ++ SAA716x_EPWR(GPIO, GPIO_WR, 0x03000000); /* Enable decoders */ ++ break; ++ case SAA7161: ++ dprintk(SAA716x_DEBUG, 1, "SAA%02x Decoder disable", saa716x->pdev->device); ++ SAA716x_EPWR(GPIO, GPIO_OEN, 0xfeffffff); ++ SAA716x_EPWR(GPIO, GPIO_WR, 0x00000000); /* Disable decoders */ ++ msleep(10); ++ SAA716x_EPWR(GPIO, GPIO_WR, 0x01000000); /* Enable decoder */ ++ break; ++ case SAA7160: ++ saa716x->i2c_rate = SAA716x_I2C_RATE_100; ++ break; ++ default: ++ dprintk(SAA716x_ERROR, 1, "Unknown device (0x%02x)", saa716x->pdev->device); ++ return -ENODEV; ++ } ++ ++ /* General setup for MMU */ ++ SAA716x_EPWR(MMU, MMU_MODE, 0x14); ++ dprintk(SAA716x_DEBUG, 1, "SAA%02x Jetpack Successfully initialized", saa716x->pdev->device); ++ ++ return 0; ++} ++EXPORT_SYMBOL(saa716x_jetpack_init); ++ ++void saa716x_core_reset(struct saa716x_dev *saa716x) ++{ ++ dprintk(SAA716x_DEBUG, 1, "RESET Modules"); ++ ++ /* VIP */ ++ SAA716x_EPWR(VI0, VI_MODE, SOFT_RESET); ++ SAA716x_EPWR(VI1, VI_MODE, SOFT_RESET); ++ ++ /* FGPI */ ++ SAA716x_EPWR(FGPI0, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); ++ SAA716x_EPWR(FGPI1, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); ++ SAA716x_EPWR(FGPI2, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); ++ SAA716x_EPWR(FGPI3, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); ++ ++ /* AIP */ ++ SAA716x_EPWR(AI0, AI_CTL, AI_RESET); ++ SAA716x_EPWR(AI1, AI_CTL, AI_RESET); ++ ++ /* BAM */ ++ SAA716x_EPWR(BAM, BAM_SW_RST, BAM_SW_RESET); ++ ++ /* MMU */ ++ SAA716x_EPWR(MMU, MMU_SW_RST, MMU_SW_RESET); ++ ++ /* MSI */ ++ SAA716x_EPWR(MSI, MSI_SW_RST, MSI_SW_RESET); ++} ++EXPORT_SYMBOL_GPL(saa716x_core_reset); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_boot.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_boot.h 2013-01-16 10:41:10.908798304 +0100 +@@ -0,0 +1,18 @@ ++#ifndef __SAA716x_BOOT_H ++#define __SAA716x_BOOT_H ++ ++#define DISABLE_TIMEOUT 0x17 ++#define ENABLE_TIMEOUT 0x16 ++ ++enum saa716x_boot_mode { ++ SAA716x_EXT_BOOT = 1, ++ SAA716x_INT_BOOT, /* GPIO[31:30] = 0x01 */ ++}; ++ ++struct saa716x_dev; ++ ++extern int saa716x_core_boot(struct saa716x_dev *saa716x); ++extern int saa716x_jetpack_init(struct saa716x_dev *saa716x); ++extern void saa716x_core_reset(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_BOOT_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.c 2013-01-16 10:41:10.909798296 +0100 +@@ -0,0 +1,717 @@ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_gpio_reg.h" ++#include "saa716x_greg_reg.h" ++#include "saa716x_msi_reg.h" ++ ++#include "saa716x_adap.h" ++#include "saa716x_i2c.h" ++#include "saa716x_msi.h" ++#include "saa716x_budget.h" ++#include "saa716x_gpio.h" ++#include "saa716x_rom.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++#include "mb86a16.h" ++#include "stv6110x.h" ++#include "stv090x.h" ++#include "ds3103.h" ++#include "ts2022.h" ++ ++unsigned int verbose; ++module_param(verbose, int, 0644); ++MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); ++ ++unsigned int int_type; ++module_param(int_type, int, 0644); ++MODULE_PARM_DESC(int_type, "force Interrupt Handler type: 0=INT-A, 1=MSI, 2=MSI-X. default INT-A mode"); ++ ++#define DRIVER_NAME "SAA716x Budget" ++ ++static int saa716x_budget_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) ++{ ++ struct saa716x_dev *saa716x; ++ int err = 0; ++ ++ saa716x = kzalloc(sizeof (struct saa716x_dev), GFP_KERNEL); ++ if (saa716x == NULL) { ++ printk(KERN_ERR "saa716x_budget_pci_probe ERROR: out of memory\n"); ++ err = -ENOMEM; ++ goto fail0; ++ } ++ ++ saa716x->verbose = verbose; ++ saa716x->int_type = int_type; ++ saa716x->pdev = pdev; ++ saa716x->config = (struct saa716x_config *) pci_id->driver_data; ++ ++ err = saa716x_pci_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x PCI Initialization failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_cgu_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x CGU Init failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_core_boot(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x Core Boot failed"); ++ goto fail2; ++ } ++ dprintk(SAA716x_DEBUG, 1, "SAA716x Core Boot Success"); ++ ++ err = saa716x_msi_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x MSI Init failed"); ++ goto fail2; ++ } ++ ++ err = saa716x_jetpack_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x Jetpack core initialization failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_i2c_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x I2C Initialization failed"); ++ goto fail3; ++ } ++ ++ saa716x_gpio_init(saa716x); ++ ++ err = saa716x_dump_eeprom(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); ++ } ++ ++ err = saa716x_eeprom_data(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM read failed"); ++ } ++ ++ /* set default port mapping */ ++ SAA716x_EPWR(GREG, GREG_VI_CTRL, 0x04080FA9); ++ /* enable FGPI3 and FGPI1 for TS input from Port 2 and 6 */ ++ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, 0x321); ++ ++ err = saa716x_dvb_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x DVB initialization failed"); ++ goto fail4; ++ } ++ ++ return 0; ++ ++fail4: ++ saa716x_dvb_exit(saa716x); ++fail3: ++ saa716x_i2c_exit(saa716x); ++fail2: ++ saa716x_pci_exit(saa716x); ++fail1: ++ kfree(saa716x); ++fail0: ++ return err; ++} ++ ++static void saa716x_budget_pci_remove(struct pci_dev *pdev) ++{ ++ struct saa716x_dev *saa716x = pci_get_drvdata(pdev); ++ ++ saa716x_dvb_exit(saa716x); ++ saa716x_i2c_exit(saa716x); ++ saa716x_pci_exit(saa716x); ++ kfree(saa716x); ++} ++ ++static irqreturn_t saa716x_budget_pci_irq(int irq, void *dev_id) ++{ ++ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; ++ ++ u32 stat_h, stat_l, mask_h, mask_l; ++ ++ if (unlikely(saa716x == NULL)) { ++ printk("%s: saa716x=NULL", __func__); ++ return IRQ_NONE; ++ } ++ ++ stat_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); ++ stat_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); ++ mask_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); ++ mask_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); ++ ++ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", ++ stat_l, stat_h, mask_l, mask_h); ++ ++ if (!((stat_l & mask_l) || (stat_h & mask_h))) ++ return IRQ_NONE; ++ ++ if (stat_l) ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, stat_l); ++ ++ if (stat_h) ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, stat_h); ++ ++ saa716x_msi_event(saa716x, stat_l, stat_h); ++#if 0 ++ dprintk(SAA716x_DEBUG, 1, "VI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", ++ SAA716x_EPRD(VI0, INT_STATUS), ++ SAA716x_EPRD(VI1, INT_STATUS), ++ SAA716x_EPRD(VI0, INT_ENABLE), ++ SAA716x_EPRD(VI1, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", ++ SAA716x_EPRD(FGPI0, INT_STATUS), ++ SAA716x_EPRD(FGPI1, INT_STATUS), ++ SAA716x_EPRD(FGPI0, INT_ENABLE), ++ SAA716x_EPRD(FGPI0, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 2=<%02x> 3=<%02x>, CTL 2=<%02x> 3=<%02x>", ++ SAA716x_EPRD(FGPI2, INT_STATUS), ++ SAA716x_EPRD(FGPI3, INT_STATUS), ++ SAA716x_EPRD(FGPI2, INT_ENABLE), ++ SAA716x_EPRD(FGPI3, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "AI STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(AI0, AI_STATUS), ++ SAA716x_EPRD(AI1, AI_STATUS), ++ SAA716x_EPRD(AI0, AI_CTL), ++ SAA716x_EPRD(AI1, AI_CTL)); ++ ++ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(I2C_A, INT_STATUS), ++ SAA716x_EPRD(I2C_B, INT_STATUS), ++ SAA716x_EPRD(I2C_A, INT_ENABLE), ++ SAA716x_EPRD(I2C_B, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "DCS STAT=<%02x>, CTL=<%02x>", ++ SAA716x_EPRD(DCS, DCSC_INT_STATUS), ++ SAA716x_EPRD(DCS, DCSC_INT_ENABLE)); ++#endif ++ ++ if (stat_l) { ++ if (stat_l & MSI_INT_TAGACK_FGPI_0) { ++ tasklet_schedule(&saa716x->fgpi[0].tasklet); ++ } ++ if (stat_l & MSI_INT_TAGACK_FGPI_1) { ++ tasklet_schedule(&saa716x->fgpi[1].tasklet); ++ } ++ if (stat_l & MSI_INT_TAGACK_FGPI_2) { ++ tasklet_schedule(&saa716x->fgpi[2].tasklet); ++ } ++ if (stat_l & MSI_INT_TAGACK_FGPI_3) { ++ tasklet_schedule(&saa716x->fgpi[3].tasklet); ++ } ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void demux_worker(unsigned long data) ++{ ++ struct saa716x_fgpi_stream_port *fgpi_entry = (struct saa716x_fgpi_stream_port *)data; ++ struct saa716x_dev *saa716x = fgpi_entry->saa716x; ++ struct dvb_demux *demux; ++ u32 fgpi_index; ++ u32 i; ++ u32 write_index; ++ ++ fgpi_index = fgpi_entry->dma_channel - 6; ++ demux = NULL; ++ for (i = 0; i < saa716x->config->adapters; i++) { ++ if (saa716x->config->adap_config[i].ts_port == fgpi_index) { ++ demux = &saa716x->saa716x_adap[i].demux; ++ break; ++ } ++ } ++ if (demux == NULL) { ++ printk(KERN_ERR "%s: unexpected channel %u\n", ++ __func__, fgpi_entry->dma_channel); ++ return; ++ } ++ ++ write_index = saa716x_fgpi_get_write_index(saa716x, fgpi_index); ++ if (write_index < 0) ++ return; ++ ++ dprintk(SAA716x_DEBUG, 1, "dma buffer = %d", write_index); ++ ++ if (write_index == fgpi_entry->read_index) { ++ printk(KERN_DEBUG "%s: called but nothing to do\n", __func__); ++ return; ++ } ++ ++ do { ++ u8 *data = (u8 *)fgpi_entry->dma_buf[fgpi_entry->read_index].mem_virt; ++ ++ pci_dma_sync_sg_for_cpu(saa716x->pdev, ++ fgpi_entry->dma_buf[fgpi_entry->read_index].sg_list, ++ fgpi_entry->dma_buf[fgpi_entry->read_index].list_len, ++ PCI_DMA_FROMDEVICE); ++ ++ dvb_dmx_swfilter(demux, data, 348 * 188); ++ ++ fgpi_entry->read_index = (fgpi_entry->read_index + 1) & 7; ++ } while (write_index != fgpi_entry->read_index); ++} ++ ++ ++#define SAA716x_MODEL_TWINHAN_VP3071 "Twinhan/Azurewave VP-3071" ++#define SAA716x_DEV_TWINHAN_VP3071 "2x DVB-T" ++ ++static int saa716x_vp3071_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_vp3071_config = { ++ .model_name = SAA716x_MODEL_TWINHAN_VP3071, ++ .dev_type = SAA716x_DEV_TWINHAN_VP3071, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 2, ++ .frontend_attach = saa716x_vp3071_frontend_attach, ++ .irq_handler = saa716x_budget_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++ ++#define SAA716x_MODEL_TWINHAN_VP1028 "Twinhan/Azurewave VP-1028" ++#define SAA716x_DEV_TWINHAN_VP1028 "DVB-S" ++ ++static int vp1028_dvbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct saa716x_dev *saa716x = fe->dvb->priv; ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ dprintk(SAA716x_ERROR, 1, "Polarization=[13V]"); ++ break; ++ case SEC_VOLTAGE_18: ++ dprintk(SAA716x_ERROR, 1, "Polarization=[18V]"); ++ break; ++ case SEC_VOLTAGE_OFF: ++ dprintk(SAA716x_ERROR, 1, "Frontend (dummy) POWERDOWN"); ++ break; ++ default: ++ dprintk(SAA716x_ERROR, 1, "Invalid = (%d)", (u32 ) voltage); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++struct mb86a16_config vp1028_mb86a16_config = { ++ .demod_address = 0x08, ++ .set_voltage = vp1028_dvbs_set_voltage, ++}; ++ ++static int saa716x_vp1028_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *i2c = &saa716x->i2c[1]; ++ ++ if (count == 0) { ++ ++ mutex_lock(&saa716x->adap_lock); ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Power ON", count); ++ saa716x_gpio_set_output(saa716x, 10); ++ msleep(1); ++ ++ /* VP-1028 has inverted power supply control */ ++ saa716x_gpio_write(saa716x, 10, 1); /* set to standby */ ++ saa716x_gpio_write(saa716x, 10, 0); /* switch it on */ ++ msleep(100); ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Reset", count); ++ saa716x_gpio_set_output(saa716x, 12); ++ msleep(1); ++ ++ /* reset demodulator (Active LOW) */ ++ saa716x_gpio_write(saa716x, 12, 1); ++ msleep(100); ++ saa716x_gpio_write(saa716x, 12, 0); ++ msleep(100); ++ saa716x_gpio_write(saa716x, 12, 1); ++ msleep(100); ++ ++ mutex_unlock(&saa716x->adap_lock); ++ ++ dprintk(SAA716x_ERROR, 1, "Probing for MB86A16 (DVB-S/DSS)"); ++ adapter->fe = mb86a16_attach(&vp1028_mb86a16_config, &i2c->i2c_adapter); ++ if (adapter->fe) { ++ dprintk(SAA716x_ERROR, 1, "found MB86A16 DVB-S/DSS frontend @0x%02x", ++ vp1028_mb86a16_config.demod_address); ++ ++ } else { ++ goto exit; ++ } ++ dprintk(SAA716x_ERROR, 1, "Done!"); ++ } ++ ++ return 0; ++exit: ++ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_vp1028_config = { ++ .model_name = SAA716x_MODEL_TWINHAN_VP1028, ++ .dev_type = SAA716x_DEV_TWINHAN_VP1028, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_vp1028_frontend_attach, ++ .irq_handler = saa716x_budget_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++ ++#define SAA716x_MODEL_TWINHAN_VP6002 "Twinhan/Azurewave VP-6002" ++#define SAA716x_DEV_TWINHAN_VP6002 "DVB-S" ++ ++static int saa716x_vp6002_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_vp6002_config = { ++ .model_name = SAA716x_MODEL_TWINHAN_VP6002, ++ .dev_type = SAA716x_DEV_TWINHAN_VP6002, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_vp6002_frontend_attach, ++ .irq_handler = saa716x_budget_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++ ++#define SAA716x_MODEL_KNC1_DUALS2 "KNC One Dual S2" ++#define SAA716x_DEV_KNC1_DUALS2 "1xDVB-S + 1xDVB-S/S2" ++ ++static int saa716x_knc1_duals2_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_knc1_duals2_config = { ++ .model_name = SAA716x_MODEL_KNC1_DUALS2, ++ .dev_type = SAA716x_DEV_KNC1_DUALS2, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 2, ++ .frontend_attach = saa716x_knc1_duals2_frontend_attach, ++ .irq_handler = saa716x_budget_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++ ++#define SAA716x_MODEL_SKYSTAR2_EXPRESS_HD "SkyStar 2 eXpress HD" ++#define SAA716x_DEV_SKYSTAR2_EXPRESS_HD "DVB-S/S2" ++ ++static struct stv090x_config skystar2_stv090x_config = { ++ .device = STV0903, ++ .demod_mode = STV090x_SINGLE, ++ .clk_mode = STV090x_CLK_EXT, ++ ++ .xtal = 8000000, ++ .address = 0x68, ++ ++ .ts1_mode = STV090x_TSMODE_DVBCI, ++ .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, ++ ++ .repeater_level = STV090x_RPTLEVEL_16, ++ ++ .tuner_init = NULL, ++ .tuner_sleep = NULL, ++ .tuner_set_mode = NULL, ++ .tuner_set_frequency = NULL, ++ .tuner_get_frequency = NULL, ++ .tuner_set_bandwidth = NULL, ++ .tuner_get_bandwidth = NULL, ++ .tuner_set_bbgain = NULL, ++ .tuner_get_bbgain = NULL, ++ .tuner_set_refclk = NULL, ++ .tuner_get_status = NULL, ++}; ++ ++static int skystar2_set_voltage(struct dvb_frontend *fe, ++ enum fe_sec_voltage voltage) ++{ ++ int err; ++ u8 en = 0; ++ u8 sel = 0; ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_OFF: ++ en = 0; ++ break; ++ ++ case SEC_VOLTAGE_13: ++ en = 1; ++ sel = 0; ++ break; ++ ++ case SEC_VOLTAGE_18: ++ en = 1; ++ sel = 1; ++ break; ++ ++ default: ++ break; ++ } ++ ++ err = stv090x_set_gpio(fe, 2, 0, en, 0); ++ if (err < 0) ++ goto exit; ++ err = stv090x_set_gpio(fe, 3, 0, sel, 0); ++ if (err < 0) ++ goto exit; ++ ++ return 0; ++exit: ++ return err; ++} ++ ++static int skystar2_voltage_boost(struct dvb_frontend *fe, long arg) ++{ ++ int err; ++ u8 value; ++ ++ if (arg) ++ value = 1; ++ else ++ value = 0; ++ ++ err = stv090x_set_gpio(fe, 4, 0, value, 0); ++ if (err < 0) ++ goto exit; ++ ++ return 0; ++exit: ++ return err; ++} ++ ++static struct stv6110x_config skystar2_stv6110x_config = { ++ .addr = 0x60, ++ .refclk = 16000000, ++ .clk_div = 2, ++}; ++ ++static int skystar2_express_hd_frontend_attach(struct saa716x_adapter *adapter, ++ int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *i2c = &saa716x->i2c[SAA716x_I2C_BUS_B]; ++ struct stv6110x_devctl *ctl; ++ ++ if (count < saa716x->config->adapters) { ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", ++ count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, ++ saa716x->pdev->subsystem_device); ++ ++ saa716x_gpio_set_output(saa716x, 26); ++ ++ /* Reset the demodulator */ ++ saa716x_gpio_write(saa716x, 26, 1); ++ msleep(10); ++ saa716x_gpio_write(saa716x, 26, 0); ++ msleep(10); ++ saa716x_gpio_write(saa716x, 26, 1); ++ msleep(10); ++ ++ adapter->fe = dvb_attach(stv090x_attach, ++ &skystar2_stv090x_config, ++ &i2c->i2c_adapter, ++ STV090x_DEMODULATOR_0); ++ ++ if (adapter->fe) { ++ dprintk(SAA716x_NOTICE, 1, "found STV0903 @0x%02x", ++ skystar2_stv090x_config.address); ++ } else { ++ goto exit; ++ } ++ ++ adapter->fe->ops.set_voltage = skystar2_set_voltage; ++ adapter->fe->ops.enable_high_lnb_voltage = skystar2_voltage_boost; ++ ++ ctl = dvb_attach(stv6110x_attach, ++ adapter->fe, ++ &skystar2_stv6110x_config, ++ &i2c->i2c_adapter); ++ ++ if (ctl) { ++ dprintk(SAA716x_NOTICE, 1, "found STV6110(A) @0x%02x", ++ skystar2_stv6110x_config.addr); ++ ++ skystar2_stv090x_config.tuner_init = ctl->tuner_init; ++ skystar2_stv090x_config.tuner_sleep = ctl->tuner_sleep; ++ skystar2_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; ++ skystar2_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; ++ skystar2_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; ++ skystar2_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; ++ skystar2_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; ++ skystar2_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; ++ skystar2_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; ++ skystar2_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; ++ skystar2_stv090x_config.tuner_get_status = ctl->tuner_get_status; ++ ++ /* call the init function once to initialize ++ tuner's clock output divider and demod's ++ master clock */ ++ if (adapter->fe->ops.init) ++ adapter->fe->ops.init(adapter->fe); ++ } else { ++ goto exit; ++ } ++ ++ dprintk(SAA716x_ERROR, 1, "Done!"); ++ return 0; ++ } ++exit: ++ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); ++ return -ENODEV; ++} ++ ++static struct saa716x_config skystar2_express_hd_config = { ++ .model_name = SAA716x_MODEL_SKYSTAR2_EXPRESS_HD, ++ .dev_type = SAA716x_DEV_SKYSTAR2_EXPRESS_HD, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = skystar2_express_hd_frontend_attach, ++ .irq_handler = saa716x_budget_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++ .adap_config = { ++ { ++ /* Adapter 0 */ ++ .ts_port = 1, /* using FGPI 1 */ ++ .worker = demux_worker ++ } ++ } ++}; ++ ++static struct ds3103_config s472_ds3103_config = { ++ .demod_address = 0x68, ++ .ci_mode = 1, ++}; ++ ++static int saa716x_s472_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *i2c = &saa716x->i2c[1]; ++ ++ if (count != 0) ++ return 0; ++ ++ dprintk(SAA716x_ERROR, 1, "Probing for DS3103 (DVB-S/S2)"); ++ adapter->fe = dvb_attach(ds3103_attach, &s472_ds3103_config, ++ &i2c->i2c_adapter); ++ ++ if (adapter->fe == NULL) { ++ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); ++ return -ENODEV; ++ } ++ ++ dprintk(SAA716x_ERROR, 1, "found DS3103 DVB-S/S2 frontend @0x%02x", ++ s472_ds3103_config.demod_address); ++ if (NULL == dvb_attach(ts2022_attach, adapter->fe, 0x60, &i2c->i2c_adapter)) ++ dprintk(SAA716x_ERROR, 1, "ts2022 attach failed"); ++ else ++ dprintk(SAA716x_ERROR, 1, "ts2022 attached!"); ++ ++ dprintk(SAA716x_ERROR, 1, "Done!"); ++ return 0; ++ ++} ++ ++static struct saa716x_config tevii_s472_config = { ++ .model_name = "TeVii S472 DVB-S2", ++ .dev_type = "DVB-S/S2", ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_s472_frontend_attach, ++ .irq_handler = saa716x_budget_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++ .adap_config = { ++ { ++ /* Adapter 0 */ ++ .ts_port = 1, /* using FGPI 1 */ ++ .worker = demux_worker ++ } ++ } ++}; ++ ++static struct pci_device_id saa716x_budget_pci_table[] = { ++ ++ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_1028, SAA7160, &saa716x_vp1028_config), /* VP-1028 */ ++ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_3071, SAA7160, &saa716x_vp3071_config), /* VP-3071 */ ++ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_6002, SAA7160, &saa716x_vp6002_config), /* VP-6002 */ ++ MAKE_ENTRY(KNC_One, KNC_Dual_S2, SAA7160, &saa716x_knc1_duals2_config), ++ MAKE_ENTRY(TECHNISAT, SKYSTAR2_EXPRESS_HD, SAA7160, &skystar2_express_hd_config), ++ MAKE_ENTRY(TEVII, TEVII_S472, SAA7160, &tevii_s472_config), ++ { } ++}; ++MODULE_DEVICE_TABLE(pci, saa716x_budget_pci_table); ++ ++static struct pci_driver saa716x_budget_pci_driver = { ++ .name = DRIVER_NAME, ++ .id_table = saa716x_budget_pci_table, ++ .probe = saa716x_budget_pci_probe, ++ .remove = saa716x_budget_pci_remove, ++}; ++ ++static int saa716x_budget_init(void) ++{ ++ return pci_register_driver(&saa716x_budget_pci_driver); ++} ++ ++static void saa716x_budget_exit(void) ++{ ++ return pci_unregister_driver(&saa716x_budget_pci_driver); ++} ++ ++module_init(saa716x_budget_init); ++module_exit(saa716x_budget_exit); ++ ++MODULE_DESCRIPTION("SAA716x Budget driver"); ++MODULE_AUTHOR("Manu Abraham"); ++MODULE_LICENSE("GPL"); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_budget.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_budget.h 2013-01-16 10:41:10.910798289 +0100 +@@ -0,0 +1,17 @@ ++#ifndef __SAA716x_BUDGET_H ++#define __SAA716x_BUDGET_H ++ ++#define TWINHAN_TECHNOLOGIES 0x1822 ++#define TWINHAN_VP_3071 0x0039 ++#define TWINHAN_VP_1028 0x0044 ++#define TWINHAN_VP_6002 0x0047 ++ ++#define KNC_One 0x1894 ++#define KNC_Dual_S2 0x0110 ++ ++#define TECHNISAT 0x1AE4 ++#define SKYSTAR2_EXPRESS_HD 0x0700 ++#define TEVII 0x9022 ++#define TEVII_S472 0xd472 ++ ++#endif /* __SAA716x_BUDGET_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.c 2013-01-16 10:41:10.910798289 +0100 +@@ -0,0 +1,539 @@ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_cgu_reg.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++u32 cgu_clk[14] = { ++ CGU_FDC_0, ++ CGU_FDC_1, ++ CGU_FDC_2, ++ CGU_FDC_3, ++ CGU_FDC_4, ++ CGU_FDC_5, ++ CGU_FDC_6, ++ CGU_FDC_7, ++ CGU_FDC_8, ++ CGU_FDC_9, ++ CGU_FDC_10, ++ CGU_FDC_11, ++ CGU_FDC_12, ++ CGU_FDC_13 ++}; ++ ++char *clk_desc[14] = { ++ "Clk PSS", ++ "Clk DCS", ++ "Clk SPI", ++ "Clk I2C/Boot", ++ "Clk PHI", ++ "Clk VI0", ++ "Clk VI1", ++ "Clk FGPI0", ++ "Clk FGPI1", ++ "Clk FGPI2", ++ "Clk FGPI3", ++ "Clk AI0", ++ "Clk AI1", ++ "Clk Phy" ++}; ++ ++int saa716x_getbootscript_setup(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_cgu *cgu = &saa716x->cgu; ++ ++ u8 i; ++ s8 N = 0; ++ s16 M = 0; ++ ++ SAA716x_EPWR(CGU, CGU_PCR_0_6, CGU_PCR_RUN); /* GREG */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_3, CGU_PCR_RUN); /* PSS_MMU */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_4, CGU_PCR_RUN); /* PSS_DTL2MTL */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_5, CGU_PCR_RUN); /* MSI */ ++ SAA716x_EPWR(CGU, CGU_PCR_3_2, CGU_PCR_RUN); /* I2C */ ++ SAA716x_EPWR(CGU, CGU_PCR_4_1, CGU_PCR_RUN); /* PHI */ ++ SAA716x_EPWR(CGU, CGU_PCR_0_7, CGU_PCR_RUN); /* GPIO */ ++ SAA716x_EPWR(CGU, CGU_PCR_2_1, CGU_PCR_RUN); /* SPI */ ++ SAA716x_EPWR(CGU, CGU_PCR_1_1, CGU_PCR_RUN); /* DCS */ ++ SAA716x_EPWR(CGU, CGU_PCR_3_1, CGU_PCR_RUN); /* BOOT */ ++ ++ /* get all dividers */ ++ for (i = 0; i < CGU_CLKS; i++) { ++ cgu->clk_boot_div[i] = SAA716x_EPRD(CGU, cgu_clk[i]); ++ cgu->clk_curr_div[i] = cgu->clk_boot_div[i]; ++ ++ N = (cgu->clk_boot_div[i] >> 11) & 0xff; ++ N *= -1; ++ M = ((cgu->clk_boot_div[i] >> 3) & 0xff) + N; ++ ++ if (M) ++ cgu->clk_freq[i] = (u32 ) N * PLL_FREQ / (u32 ) M; ++ else ++ cgu->clk_freq[i] = 0; ++ ++ dprintk(SAA716x_DEBUG, 1, "Domain %d: %s <0x%02x> Divider: 0x%x --> N=%d, M=%d, freq=%d", ++ i, clk_desc[i], cgu_clk[i], cgu->clk_boot_div[i], N, M, cgu->clk_freq[i]); ++ } ++ /* store clock settings */ ++ cgu->clk_vi_0[0] = cgu->clk_freq[CLK_DOMAIN_VI0]; ++ cgu->clk_vi_0[1] = cgu->clk_freq[CLK_DOMAIN_VI0]; ++ cgu->clk_vi_0[2] = cgu->clk_freq[CLK_DOMAIN_VI0]; ++ cgu->clk_vi_1[0] = cgu->clk_freq[CLK_DOMAIN_VI1]; ++ cgu->clk_vi_1[1] = cgu->clk_freq[CLK_DOMAIN_VI1]; ++ cgu->clk_vi_1[2] = cgu->clk_freq[CLK_DOMAIN_VI1]; ++ ++ return 0; ++} ++ ++int saa716x_set_clk_internal(struct saa716x_dev *saa716x, u32 port) ++{ ++ struct saa716x_cgu *cgu = &saa716x->cgu; ++ ++ u8 delay = 1; ++ ++ switch (port) { ++ case PORT_VI0_VIDEO: ++ cgu->clk_int_port[PORT_VI0_VIDEO] = 1; ++ ++ if (!cgu->clk_int_port[PORT_VI0_VBI]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_CGU_CLKRUN(5); ++ break; ++ ++ case PORT_VI0_VBI: ++ cgu->clk_int_port[PORT_VI0_VBI] = 1; ++ ++ if (!cgu->clk_int_port[PORT_VI0_VIDEO]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_CGU_CLKRUN(5); ++ break; ++ ++ case PORT_VI1_VIDEO: ++ cgu->clk_int_port[PORT_VI1_VIDEO] = 1; ++ ++ if (!cgu->clk_int_port[PORT_VI1_VBI]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_CGU_CLKRUN(6); ++ break; ++ ++ case PORT_VI1_VBI: ++ cgu->clk_int_port[PORT_VI1_VBI] = 1; ++ ++ if (!cgu->clk_int_port[PORT_VI1_VIDEO]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_CGU_CLKRUN(6); ++ break; ++ ++ case PORT_FGPI0: ++ cgu->clk_int_port[PORT_FGPI0] = 1; ++ SAA716x_CGU_CLKRUN(7); ++ break; ++ ++ case PORT_FGPI1: ++ cgu->clk_int_port[PORT_FGPI1] = 1; ++ SAA716x_CGU_CLKRUN(8); ++ break; ++ ++ case PORT_FGPI2: ++ cgu->clk_int_port[PORT_FGPI2] = 1; ++ SAA716x_CGU_CLKRUN(9); ++ break; ++ ++ case PORT_FGPI3: ++ cgu->clk_int_port[PORT_FGPI3] = 1; ++ SAA716x_CGU_CLKRUN(10); ++ break; ++ ++ case PORT_AI0: ++ cgu->clk_int_port[PORT_AI0] = 1; ++ SAA716x_CGU_CLKRUN(11); ++ break; ++ ++ case PORT_AI1: ++ cgu->clk_int_port[PORT_AI1] = 1; ++ SAA716x_CGU_CLKRUN(12); ++ break; ++ ++ case PORT_ALL: ++ SAA716x_CGU_CLKRUN(5); ++ SAA716x_CGU_CLKRUN(6); ++ SAA716x_CGU_CLKRUN(7); ++ SAA716x_CGU_CLKRUN(8); ++ SAA716x_CGU_CLKRUN(9); ++ SAA716x_CGU_CLKRUN(10); ++ SAA716x_CGU_CLKRUN(11); ++ SAA716x_CGU_CLKRUN(12); ++ ++ cgu->clk_int_port[PORT_VI0_VIDEO] = 1; ++ cgu->clk_int_port[PORT_VI0_VBI] = 1; ++ cgu->clk_int_port[PORT_VI1_VIDEO] = 1; ++ cgu->clk_int_port[PORT_VI1_VBI] = 1; ++ cgu->clk_int_port[PORT_FGPI0] = 1; ++ cgu->clk_int_port[PORT_FGPI1] = 1; ++ cgu->clk_int_port[PORT_FGPI2] = 1; ++ cgu->clk_int_port[PORT_FGPI3] = 1; ++ cgu->clk_int_port[PORT_AI0] = 1; ++ cgu->clk_int_port[PORT_AI1] = 1; ++ break; ++ ++ default: ++ dprintk(SAA716x_ERROR, 1, "Unknown port <%02x>", port); ++ delay = 0; ++ break; ++ } ++ ++ /* wait for PLL */ ++ if (delay) ++ msleep(1); ++ ++ return 0; ++} ++ ++int saa716x_set_clk_external(struct saa716x_dev *saa716x, u32 port) ++{ ++ struct saa716x_cgu *cgu = &saa716x->cgu; ++ ++ u8 delay = 1; ++ ++ switch (port) { ++ case PORT_VI0_VIDEO: ++ cgu->clk_int_port[PORT_VI0_VIDEO] = 0; ++ ++ if (!cgu->clk_int_port[PORT_VI0_VBI]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_EPWR(CGU, CGU_FS1_5, 0x2); /* VI 0 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_5, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_VI0_VBI: ++ cgu->clk_int_port[PORT_VI0_VBI] = 0; ++ ++ if (!cgu->clk_int_port[PORT_VI0_VIDEO]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_EPWR(CGU, CGU_FS1_5, 0x2); /* VI 0 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_5, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_VI1_VIDEO: ++ cgu->clk_int_port[PORT_VI1_VIDEO] = 0; ++ ++ if (!cgu->clk_int_port[PORT_VI1_VBI]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_EPWR(CGU, CGU_FS1_6, 0x3); /* VI 1 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_6, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_VI1_VBI: ++ cgu->clk_int_port[PORT_VI1_VBI] = 0; ++ ++ if (!cgu->clk_int_port[PORT_VI1_VIDEO]) { ++ delay = 0; ++ break; ++ } ++ ++ SAA716x_EPWR(CGU, CGU_FS1_6, 0x3); /* VI 1 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_6, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_FGPI0: ++ cgu->clk_int_port[PORT_FGPI0] = 0; ++ ++ SAA716x_EPWR(CGU, CGU_FS1_7, 0x4); /* FGPI 0 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_7, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_FGPI1: ++ cgu->clk_int_port[PORT_FGPI1] = 0; ++ ++ SAA716x_EPWR(CGU, CGU_FS1_8, 0x5); /* FGPI 1 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_8, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_FGPI2: ++ cgu->clk_int_port[PORT_FGPI2] = 0; ++ ++ SAA716x_EPWR(CGU, CGU_FS1_9, 0x6); /* FGPI 2 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_9, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_FGPI3: ++ cgu->clk_int_port[PORT_FGPI3] = 0; ++ ++ SAA716x_EPWR(CGU, CGU_FS1_10, 0x7); /* FGPI 3 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_10, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_AI0: ++ cgu->clk_int_port[PORT_AI0] = 1; ++ ++ SAA716x_EPWR(CGU, CGU_FS1_11, 0x8); /* AI 0 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_11, 0x0); /* disable divider */ ++ break; ++ ++ case PORT_AI1: ++ cgu->clk_int_port[PORT_AI1] = 1; ++ ++ SAA716x_EPWR(CGU, CGU_FS1_12, 0x9); /* AI 1 clk */ ++ SAA716x_EPWR(CGU, CGU_ESR_12, 0x0); /* disable divider */ ++ break; ++ ++ default: ++ dprintk(SAA716x_ERROR, 1, "Unknown port <%02x>", port); ++ delay = 0; ++ break; ++ ++ } ++ ++ if (delay) ++ msleep(1); ++ ++ return 0; ++} ++ ++int saa716x_get_clk(struct saa716x_dev *saa716x, ++ enum saa716x_clk_domain domain, ++ u32 *frequency) ++{ ++ struct saa716x_cgu *cgu = &saa716x->cgu; ++ ++ switch (domain) { ++ case CLK_DOMAIN_PSS: ++ case CLK_DOMAIN_DCS: ++ case CLK_DOMAIN_SPI: ++ case CLK_DOMAIN_I2C: ++ case CLK_DOMAIN_PHI: ++ case CLK_DOMAIN_VI0: ++ case CLK_DOMAIN_VI1: ++ case CLK_DOMAIN_FGPI0: ++ case CLK_DOMAIN_FGPI1: ++ case CLK_DOMAIN_FGPI2: ++ case CLK_DOMAIN_FGPI3: ++ case CLK_DOMAIN_AI0: ++ case CLK_DOMAIN_AI1: ++ case CLK_DOMAIN_PHY: ++ *frequency = cgu->clk_freq[domain]; ++ break; ++ ++ case CLK_DOMAIN_VI0VBI: ++ *frequency = cgu->clk_freq[CLK_DOMAIN_VI0]; ++ break; ++ ++ case CLK_DOMAIN_VI1VBI: ++ *frequency =cgu->clk_freq[CLK_DOMAIN_VI1]; ++ break; ++ default: ++ dprintk(SAA716x_ERROR, 1, "Error Clock domain <%02x>", domain); ++ break; ++ } ++ ++ return 0; ++} ++ ++int saa716x_set_clk(struct saa716x_dev *saa716x, ++ enum saa716x_clk_domain domain, ++ u32 frequency) ++{ ++ struct saa716x_cgu *cgu = &saa716x->cgu; ++ ++ u32 M = 1, N = 1, reset, i; ++ s8 N_tmp, M_tmp, sub, add, lsb; ++ ++ ++ if (cgu->clk_freq_min > frequency) ++ frequency = cgu->clk_freq_min; ++ ++ if (cgu->clk_freq_max < frequency) ++ frequency = cgu->clk_freq_max; ++ ++ switch (domain) { ++ case CLK_DOMAIN_PSS: ++ case CLK_DOMAIN_DCS: ++ case CLK_DOMAIN_SPI: ++ case CLK_DOMAIN_I2C: ++ case CLK_DOMAIN_PHI: ++ case CLK_DOMAIN_FGPI0: ++ case CLK_DOMAIN_FGPI1: ++ case CLK_DOMAIN_FGPI2: ++ case CLK_DOMAIN_FGPI3: ++ case CLK_DOMAIN_AI0: ++ case CLK_DOMAIN_AI1: ++ case CLK_DOMAIN_PHY: ++ ++ if (frequency == cgu->clk_freq[domain]) ++ return 0; /* same frequency */ ++ break; ++ ++ case CLK_DOMAIN_VI0: ++ ++ if (frequency == cgu->clk_vi_0[1]) { ++ return 0; ++ ++ } else if (frequency == cgu->clk_vi_0[0]) { ++ cgu->clk_vi_0[1] = frequency; /* store */ ++ ++ if (frequency == cgu->clk_vi_0[2]) ++ return 0; ++ ++ } else { ++ cgu->clk_vi_0[1] = frequency; ++ ++ if (frequency != cgu->clk_vi_0[2]) ++ return 0; ++ ++ } ++ break; ++ ++ case CLK_DOMAIN_VI1: ++ if (frequency == cgu->clk_vi_1[1]) { ++ return 0; ++ ++ } else if (frequency == cgu->clk_vi_1[0]) { ++ cgu->clk_vi_1[1] = frequency; /* store */ ++ ++ if (frequency == cgu->clk_vi_1[2]) ++ return 0; ++ ++ } else { ++ cgu->clk_vi_1[1] = frequency; ++ ++ if (frequency != cgu->clk_vi_1[2]) ++ return 0; ++ ++ } ++ break; ++ ++ case CLK_DOMAIN_VI0VBI: ++ if (frequency == cgu->clk_vi_0[2]) { ++ return 0; ++ ++ } else if (frequency == cgu->clk_vi_0[0]) { ++ cgu->clk_vi_0[2] = frequency; /* store */ ++ ++ if (frequency == cgu->clk_vi_0[1]) ++ return 0; ++ ++ } else { ++ cgu->clk_vi_0[2] = frequency; /* store */ ++ ++ if (frequency != cgu->clk_vi_0[1]) ++ return 0; ++ ++ } ++ domain = CLK_DOMAIN_VI0; /* change domain */ ++ break; ++ ++ case CLK_DOMAIN_VI1VBI: ++ if (frequency == cgu->clk_vi_1[2]) { ++ return 0; ++ ++ } else if (frequency == cgu->clk_vi_1[0]) { ++ cgu->clk_vi_1[2] = frequency; /* store */ ++ ++ if (frequency == cgu->clk_vi_1[1]) ++ return 0; ++ ++ } else { ++ cgu->clk_vi_1[2] = frequency; /* store */ ++ ++ if (frequency != cgu->clk_vi_1[1]) ++ return 0; ++ ++ } ++ domain = CLK_DOMAIN_VI1; /* change domain */ ++ break; ++ } ++ ++ /* calculate divider */ ++ do { ++ M = (N * PLL_FREQ) / frequency; ++ if (M == 0) ++ N++; ++ ++ } while (M == 0); ++ ++ /* calculate frequency */ ++ cgu->clk_freq[domain] = (N * PLL_FREQ) / M; ++ ++ N_tmp = N & 0xff; ++ M_tmp = M & 0xff; ++ sub = -N_tmp; ++ add = M_tmp - N_tmp; ++ lsb = 4; /* run */ ++ ++ if (((10 * N) / M) < 5) ++ lsb |= 1; /* stretch */ ++ ++ /* store new divider */ ++ cgu->clk_curr_div[domain] = sub & 0xff; ++ cgu->clk_curr_div[domain] <<= 8; ++ cgu->clk_curr_div[domain] = add & 0xff; ++ cgu->clk_curr_div[domain] <<= 3; ++ cgu->clk_curr_div[domain] |= lsb; ++ ++ dprintk(SAA716x_DEBUG, 1, "Domain <0x%02x> Frequency <%d> Set Freq <%d> N=%d M=%d Divider <0x%02x>", ++ domain, ++ frequency, ++ cgu->clk_freq[domain], ++ N, ++ M, ++ cgu->clk_curr_div[domain]); ++ ++ reset = 0; ++ ++ /* Reset */ ++ SAA716x_EPWR(CGU, cgu_clk[domain], cgu->clk_curr_div[domain] | 0x2); ++ ++ /* Reset disable */ ++ for (i = 0; i < 1000; i++) { ++ msleep(10); ++ reset = SAA716x_EPRD(CGU, cgu_clk[domain]); ++ ++ if (cgu->clk_curr_div[domain == reset]) ++ break; ++ } ++ ++ if (cgu->clk_curr_div[domain] != reset) ++ SAA716x_EPWR(CGU, cgu_clk[domain], cgu->clk_curr_div[domain]); ++ ++ return 0; ++} ++ ++int saa716x_cgu_init(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_cgu *cgu = &saa716x->cgu; ++ ++ cgu->clk_freq_min = PLL_FREQ / 255; ++ if (PLL_FREQ > (cgu->clk_freq_min * 255)) ++ cgu->clk_freq_min++; ++ ++ cgu->clk_freq_max = PLL_FREQ; ++ ++ saa716x_getbootscript_setup(saa716x); ++ saa716x_set_clk_internal(saa716x, PORT_ALL); ++ ++ return 0; ++} ++EXPORT_SYMBOL(saa716x_cgu_init); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu.h 2013-01-16 10:41:10.911798282 +0100 +@@ -0,0 +1,61 @@ ++#ifndef __SAA716x_CGU_H ++#define __SAA716x_CGU_H ++ ++#define PLL_FREQ 2500 ++ ++#define SAA716x_CGU_CLKRUN(__reg) do { \ ++ SAA716x_EPWR(CGU, CGU_PCR_##__reg, CGU_PCR_RUN); /* Run */ \ ++ SAA716x_EPWR(CGU, CGU_SCR_##__reg, CGU_SCR_ENF1); /* Switch */ \ ++ SAA716x_EPWR(CGU, CGU_FS1_##__reg, 0x00000000); /* PLL Clk */ \ ++ SAA716x_EPWR(CGU, CGU_ESR_##__reg, CGU_ESR_FD_EN); /* Frac div */ \ ++} while (0) ++ ++enum saa716x_clk_domain { ++ CLK_DOMAIN_PSS = 0, ++ CLK_DOMAIN_DCS = 1, ++ CLK_DOMAIN_SPI = 2, ++ CLK_DOMAIN_I2C = 3, ++ CLK_DOMAIN_PHI = 4, ++ CLK_DOMAIN_VI0 = 5, ++ CLK_DOMAIN_VI1 = 6, ++ CLK_DOMAIN_FGPI0 = 7, ++ CLK_DOMAIN_FGPI1 = 8, ++ CLK_DOMAIN_FGPI2 = 9, ++ CLK_DOMAIN_FGPI3 = 10, ++ CLK_DOMAIN_AI0 = 11, ++ CLK_DOMAIN_AI1 = 12, ++ CLK_DOMAIN_PHY = 13, ++ CLK_DOMAIN_VI0VBI = 14, ++ CLK_DOMAIN_VI1VBI = 15 ++}; ++ ++#define PORT_VI0_VIDEO 0 ++#define PORT_VI0_VBI 2 ++#define PORT_VI1_VIDEO 3 ++#define PORT_VI1_VBI 5 ++#define PORT_FGPI0 6 ++#define PORT_FGPI1 7 ++#define PORT_FGPI2 8 ++#define PORT_FGPI3 9 ++#define PORT_AI0 10 ++#define PORT_AI1 11 ++#define PORT_ALL 12 ++ ++#define CGU_CLKS 14 ++ ++struct saa716x_cgu { ++ u8 clk_int_port[12]; ++ u32 clk_vi_0[3]; ++ u32 clk_vi_1[3]; ++ u32 clk_boot_div[CGU_CLKS]; ++ u32 clk_curr_div[CGU_CLKS]; ++ u32 clk_freq[CGU_CLKS]; ++ u32 clk_freq_min; ++ u32 clk_freq_max; ++}; ++ ++extern int saa716x_cgu_init(struct saa716x_dev *saa716x); ++extern int saa716x_set_clk_internal(struct saa716x_dev *saa716x, u32 port); ++extern int saa716x_set_clk_external(struct saa716x_dev *saa716x, u32 port); ++ ++#endif /* __SAA716x_CGU_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_cgu_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_cgu_reg.h 2013-01-16 10:41:10.911798282 +0100 +@@ -0,0 +1,178 @@ ++#ifndef __SAA716x_CGU_REG_H ++#define __SAA716x_CGU_REG_H ++ ++/* -------------- CGU Registers -------------- */ ++ ++#define CGU_SCR_0 0x000 ++#define CGU_SCR_1 0x004 ++#define CGU_SCR_2 0x008 ++#define CGU_SCR_3 0x00c ++#define CGU_SCR_4 0x010 ++#define CGU_SCR_5 0x014 ++#define CGU_SCR_6 0x018 ++#define CGU_SCR_7 0x01c ++#define CGU_SCR_8 0x020 ++#define CGU_SCR_9 0x024 ++#define CGU_SCR_10 0x028 ++#define CGU_SCR_11 0x02c ++#define CGU_SCR_12 0x030 ++#define CGU_SCR_13 0x034 ++#define CGU_SCR_STOP (0x00000001 << 3) ++#define CGU_SCR_RESET (0x00000001 << 2) ++#define CGU_SCR_ENF2 (0x00000001 << 1) ++#define CGU_SCR_ENF1 (0x00000001 << 0) ++ ++#define CGU_FS1_0 0x038 ++#define CGU_FS1_1 0x03c ++#define CGU_FS1_2 0x040 ++#define CGU_FS1_3 0x044 ++#define CGU_FS1_4 0x048 ++#define CGU_FS1_5 0x04c ++#define CGU_FS1_6 0x050 ++#define CGU_FS1_7 0x054 ++#define CGU_FS1_8 0x058 ++#define CGU_FS1_9 0x05c ++#define CGU_FS1_10 0x060 ++#define CGU_FS1_11 0x064 ++#define CGU_FS1_12 0x068 ++#define CGU_FS1_13 0x06c ++#define CGU_FS1_PLL (0x00000000 << 0) ++ ++ ++#define CGU_FS2_0 0x070 ++#define CGU_FS2_1 0x074 ++#define CGU_FS2_2 0x078 ++#define CGU_FS2_3 0x07c ++#define CGU_FS2_4 0x080 ++#define CGU_FS2_5 0x084 ++#define CGU_FS2_6 0x088 ++#define CGU_FS2_7 0x08c ++#define CGU_FS2_8 0x090 ++#define CGU_FS2_9 0x094 ++#define CGU_FS2_10 0x098 ++#define CGU_FS2_11 0x09c ++#define CGU_FS2_12 0x0a0 ++#define CGU_FS2_13 0x0a4 ++ ++#define CGU_SSR_0 0x0a8 ++#define CGU_SSR_1 0x0ac ++#define CGU_SSR_2 0x0b0 ++#define CGU_SSR_3 0x0b4 ++#define CGU_SSR_4 0x0b8 ++#define CGU_SSR_5 0x0bc ++#define CGU_SSR_6 0x0c0 ++#define CGU_SSR_7 0x0c4 ++#define CGU_SSR_8 0x0c8 ++#define CGU_SSR_9 0x0cc ++#define CGU_SSR_10 0x0d0 ++#define CGU_SSR_11 0x0d4 ++#define CGU_SSR_12 0x0d8 ++#define CGU_SSR_13 0x0dc ++ ++#define CGU_PCR_0_0 0x0e0 ++#define CGU_PCR_0_1 0x0e4 ++#define CGU_PCR_0_2 0x0e8 ++#define CGU_PCR_0_3 0x0ec ++#define CGU_PCR_0_4 0x0f0 ++#define CGU_PCR_0_5 0x0f4 ++#define CGU_PCR_0_6 0x0f8 ++#define CGU_PCR_0_7 0x0fc ++#define CGU_PCR_1_0 0x100 ++#define CGU_PCR_1_1 0x104 ++#define CGU_PCR_2_0 0x108 ++#define CGU_PCR_2_1 0x10c ++#define CGU_PCR_3_0 0x110 ++#define CGU_PCR_3_1 0x114 ++#define CGU_PCR_3_2 0x118 ++#define CGU_PCR_4_0 0x11c ++#define CGU_PCR_4_1 0x120 ++#define CGU_PCR_5 0x124 ++#define CGU_PCR_6 0x128 ++#define CGU_PCR_7 0x12c ++#define CGU_PCR_8 0x130 ++#define CGU_PCR_9 0x134 ++#define CGU_PCR_10 0x138 ++#define CGU_PCR_11 0x13c ++#define CGU_PCR_12 0x140 ++#define CGU_PCR_13 0x144 ++#define CGU_PCR_WAKE_EN (0x00000001 << 2) ++#define CGU_PCR_AUTO (0x00000001 << 1) ++#define CGU_PCR_RUN (0x00000001 << 0) ++ ++ ++#define CGU_PSR_0_0 0x148 ++#define CGU_PSR_0_1 0x14c ++#define CGU_PSR_0_2 0x150 ++#define CGU_PSR_0_3 0x154 ++#define CGU_PSR_0_4 0x158 ++#define CGU_PSR_0_5 0x15c ++#define CGU_PSR_0_6 0x160 ++#define CGU_PSR_0_7 0x164 ++#define CGU_PSR_1_0 0x168 ++#define CGU_PSR_1_1 0x16c ++#define CGU_PSR_2_0 0x170 ++#define CGU_PSR_2_1 0x174 ++#define CGU_PSR_3_0 0x178 ++#define CGU_PSR_3_1 0x17c ++#define CGU_PSR_3_2 0x180 ++#define CGU_PSR_4_0 0x184 ++#define CGU_PSR_4_1 0x188 ++#define CGU_PSR_5 0x18c ++#define CGU_PSR_6 0x190 ++#define CGU_PSR_7 0x194 ++#define CGU_PSR_8 0x198 ++#define CGU_PSR_9 0x19c ++#define CGU_PSR_10 0x1a0 ++#define CGU_PSR_11 0x1a4 ++#define CGU_PSR_12 0x1a8 ++#define CGU_PSR_13 0x1ac ++ ++#define CGU_ESR_0_0 0x1b0 ++#define CGU_ESR_0_1 0x1b4 ++#define CGU_ESR_0_2 0x1b8 ++#define CGU_ESR_0_3 0x1bc ++#define CGU_ESR_0_4 0x1c0 ++#define CGU_ESR_0_5 0x1c4 ++#define CGU_ESR_0_6 0x1c8 ++#define CGU_ESR_0_7 0x1cc ++#define CGU_ESR_1_0 0x1d0 ++#define CGU_ESR_1_1 0x1d4 ++#define CGU_ESR_2_0 0x1d8 ++#define CGU_ESR_2_1 0x1dc ++#define CGU_ESR_3_0 0x1e0 ++#define CGU_ESR_3_1 0x1e4 ++#define CGU_ESR_3_2 0x1e8 ++#define CGU_ESR_4_0 0x1ec ++#define CGU_ESR_4_1 0x1f0 ++#define CGU_ESR_5 0x1f4 ++#define CGU_ESR_6 0x1f8 ++#define CGU_ESR_7 0x1fc ++#define CGU_ESR_8 0x200 ++#define CGU_ESR_9 0x204 ++#define CGU_ESR_10 0x208 ++#define CGU_ESR_11 0x20c ++#define CGU_ESR_12 0x210 ++#define CGU_ESR_13 0x214 ++#define CGU_ESR_FD_EN (0x00000001 << 0) ++ ++#define CGU_FDC_0 0x218 ++#define CGU_FDC_1 0x21c ++#define CGU_FDC_2 0x220 ++#define CGU_FDC_3 0x224 ++#define CGU_FDC_4 0x228 ++#define CGU_FDC_5 0x22c ++#define CGU_FDC_6 0x230 ++#define CGU_FDC_7 0x234 ++#define CGU_FDC_8 0x238 ++#define CGU_FDC_9 0x23c ++#define CGU_FDC_10 0x240 ++#define CGU_FDC_11 0x244 ++#define CGU_FDC_12 0x248 ++#define CGU_FDC_13 0x24c ++#define CGU_FDC_STRETCH (0x00000001 << 0) ++#define CGU_FDC_RESET (0x00000001 << 1) ++#define CGU_FDC_RUN1 (0x00000001 << 2) ++#define CGU_FDC_MADD (0x000000ff << 3) ++#define CGU_FDC_MSUB (0x000000ff << 11) ++ ++#endif /* __SAA716x_CGU_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dcs_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dcs_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_dcs_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dcs_reg.h 2013-01-16 10:41:10.912798275 +0100 +@@ -0,0 +1,56 @@ ++#ifndef __SAA716x_DCS_REG_H ++#define __SAA716x_DCS_REG_H ++ ++/* -------------- DCS Registers -------------- */ ++ ++#define DCSC_CTRL 0x000 ++#define DCSC_SEL_PLLDI (0x03ffffff << 5) ++#define DCSC_TOUT_SEL (0x0000000f << 1) ++#define DCSC_TOUT_OFF (0x00000001 << 0) ++ ++#define DCSC_ADDR 0x00c ++#define DCSC_ERR_TOUT_ADDR (0x3fffffff << 2) ++ ++#define DCSC_STAT 0x010 ++#define DCSC_ERR_TOUT_GNT (0x0000001f << 24) ++#define DCSC_ERR_TOUT_SEL (0x0000007f << 10) ++#define DCSC_ERR_TOUT_READ (0x00000001 << 8) ++#define DCSC_ERR_TOUT_MASK (0x0000000f << 4) ++#define DCSC_ERR_ACK (0x00000001 << 1) ++ ++#define DCSC_FEATURES 0x040 ++#define DCSC_UNIQUE_ID (0x00000007 << 16) ++#define DCSC_SECURITY (0x00000001 << 14) ++#define DCSC_NUM_BASE_REGS (0x00000003 << 11) ++#define DCSC_NUM_TARGETS (0x0000001f << 5) ++#define DCSC_NUM_INITIATORS (0x0000001f << 0) ++ ++#define DCSC_BASE_REG0 0x100 ++#define DCSC_BASE_N_REG (0x00000fff << 20) ++ ++#define DCSC_INT_CLR_ENABLE 0xfd8 ++#define DCSC_INT_CLR_ENABLE_TOUT (0x00000001 << 1) ++#define DCSC_INT_CLR_ENABLE_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_SET_ENABLE 0xfdc ++#define DCSC_INT_SET_ENABLE_TOUT (0x00000001 << 1) ++#define DCSC_INT_SET_ENABLE_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_STATUS 0xfe0 ++#define DCSC_INT_STATUS_TOUT (0x00000001 << 1) ++#define DCSC_INT_STATUS_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_ENABLE 0xfe4 ++#define DCSC_INT_ENABLE_TOUT (0x00000001 << 1) ++#define DCSC_INT_ENABLE_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_CLR_STATUS 0xfe8 ++#define DCSC_INT_CLEAR_TOUT (0x00000001 << 1) ++#define DCSC_INT_CLEAR_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_SET_STATUS 0xfec ++#define DCSC_INT_SET_TOUT (0x00000001 << 1) ++#define DCSC_INT_SET_ERROR (0x00000001 << 0) ++ ++ ++#endif /* __SAA716x_DCS_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.c 2013-01-16 10:41:10.912798275 +0100 +@@ -0,0 +1,306 @@ ++#include ++#include ++#include ++#include ++#include ++ ++#include "saa716x_dma.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++/* Allocates one page of memory, which is stores the data of one ++ * 716x page table. The result gets stored in the passed DMA buffer ++ * structure. ++ */ ++static int saa716x_allocate_ptable(struct saa716x_dmabuf *dmabuf) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ dprintk(SAA716x_DEBUG, 1, "SG Page table allocate"); ++ dmabuf->mem_ptab_virt = (void *) __get_free_page(GFP_KERNEL); ++ ++ if (dmabuf->mem_ptab_virt == NULL) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Out of pages !"); ++ return -ENOMEM; ++ } ++ ++ dmabuf->mem_ptab_phys = dma_map_single(&pdev->dev, ++ dmabuf->mem_ptab_virt, ++ SAA716x_PAGE_SIZE, ++ DMA_TO_DEVICE); ++ ++ if (dmabuf->mem_ptab_phys == 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: map memory failed !"); ++ return -ENOMEM; ++ } ++ ++ BUG_ON(!(((unsigned long) dmabuf->mem_ptab_phys % SAA716x_PAGE_SIZE) == 0)); ++ ++ return 0; ++} ++ ++static void saa716x_free_ptable(struct saa716x_dmabuf *dmabuf) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ BUG_ON(dmabuf == NULL); ++ dprintk(SAA716x_DEBUG, 1, "SG Page table free"); ++ ++ /* free physical PCI memory */ ++ if (dmabuf->mem_ptab_phys != 0) { ++ dma_unmap_single(&pdev->dev, ++ dmabuf->mem_ptab_phys, ++ SAA716x_PAGE_SIZE, ++ DMA_TO_DEVICE); ++ ++ dmabuf->mem_ptab_phys = 0; ++ } ++ ++ /* free kernel memory */ ++ if (dmabuf->mem_ptab_virt != NULL) { ++ free_page((unsigned long) dmabuf->mem_ptab_virt); ++ dmabuf->mem_ptab_virt = NULL; ++ } ++} ++ ++static void saa716x_dmabuf_sgfree(struct saa716x_dmabuf *dmabuf) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ ++ BUG_ON(dmabuf == NULL); ++ dprintk(SAA716x_DEBUG, 1, "SG free"); ++ ++ dmabuf->mem_virt = NULL; ++ if (dmabuf->mem_virt_noalign != NULL) { ++ if (dmabuf->dma_type == SAA716x_DMABUF_INT) ++ vfree(dmabuf->mem_virt_noalign); ++ ++ dmabuf->mem_virt_noalign = NULL; ++ } ++ ++ if (dmabuf->sg_list != NULL) { ++ kfree(dmabuf->sg_list); ++ dmabuf->sg_list = NULL; ++ } ++} ++ ++/* ++ * Create a SG, when an allocated buffer is passed to it, ++ * otherwise the needed memory gets allocated by itself ++ */ ++static int saa716x_dmabuf_sgalloc(struct saa716x_dmabuf *dmabuf, void *buf, int size) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ struct scatterlist *list; ++ struct page *pg; ++ ++ int i, pages; ++ ++ BUG_ON(!(size > 0)); ++ BUG_ON(dmabuf == NULL); ++ dprintk(SAA716x_DEBUG, 1, "SG allocate"); ++ ++ if ((size % SAA716x_PAGE_SIZE) != 0) /* calculate required pages */ ++ pages = size / SAA716x_PAGE_SIZE + 1; ++ else ++ pages = size / SAA716x_PAGE_SIZE; ++ ++ /* Allocate memory for SG list */ ++ dmabuf->sg_list = kzalloc(sizeof (struct scatterlist) * pages, GFP_KERNEL); ++ if (dmabuf->sg_list == NULL) { ++ dprintk(SAA716x_ERROR, 1, "Failed to allocate memory for scatterlist."); ++ return -ENOMEM; ++ } ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing SG table"); ++ sg_init_table(dmabuf->sg_list, pages); ++ ++ if (buf == NULL) { ++ ++ /* allocate memory, unaligned */ ++ dmabuf->mem_virt_noalign = vmalloc((pages + 1) * SAA716x_PAGE_SIZE); ++ if (dmabuf->mem_virt_noalign == NULL) { ++ dprintk(SAA716x_ERROR, 1, "Failed to allocate memory for buffer"); ++ return -ENOMEM; ++ } ++ ++ /* align memory to page */ ++ dmabuf->mem_virt = (void *) PAGE_ALIGN (((unsigned long) dmabuf->mem_virt_noalign)); ++ ++ BUG_ON(!((((unsigned long) dmabuf->mem_virt) % SAA716x_PAGE_SIZE) == 0)); ++ } else { ++ dmabuf->mem_virt = buf; ++ } ++ ++ dmabuf->list_len = pages; /* scatterlist length */ ++ list = dmabuf->sg_list; ++ ++ dprintk(SAA716x_DEBUG, 1, "Allocating SG pages"); ++ for (i = 0; i < pages; i++) { ++ if (buf == NULL) ++ pg = vmalloc_to_page(dmabuf->mem_virt + i * SAA716x_PAGE_SIZE); ++ else ++ pg = virt_to_page(dmabuf->mem_virt + i * SAA716x_PAGE_SIZE); ++ ++ BUG_ON(pg == NULL); ++ sg_set_page(&list[i], pg, SAA716x_PAGE_SIZE, 0); ++ } ++ ++ dprintk(SAA716x_DEBUG, 1, "Done!"); ++ return 0; ++} ++ ++/* Fill the "page table" page with the pointers to the specified SG buffer */ ++static void saa716x_dmabuf_sgpagefill(struct saa716x_dmabuf *dmabuf, struct scatterlist *sg_list, int pages, int offset) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ struct pci_dev *pdev = saa716x->pdev; ++ struct scatterlist *sg_cur; ++ ++ u32 *page; ++ int i, j, k = 0; ++ dma_addr_t addr = 0; ++ ++ BUG_ON(dmabuf == NULL); ++ BUG_ON(sg_list == NULL); ++ BUG_ON(pages == 0); ++ dprintk(SAA716x_DEBUG, 1, "SG page fill"); ++ ++ /* make page writable for the PC */ ++ dma_sync_single_for_cpu(&pdev->dev, dmabuf->mem_ptab_phys, SAA716x_PAGE_SIZE, DMA_TO_DEVICE); ++ page = dmabuf->mem_ptab_virt; ++ ++ /* create page table */ ++ for (i = 0; i < pages; i++) { ++ sg_cur = &sg_list[i]; ++ BUG_ON(!(((sg_cur->length + sg_cur->offset) % SAA716x_PAGE_SIZE) == 0)); ++ ++ if (i == 0) ++ dmabuf->offset = (sg_cur->length + sg_cur->offset) % SAA716x_PAGE_SIZE; ++ else ++ BUG_ON(sg_cur->offset != 0); ++ ++ for (j = 0; (j * SAA716x_PAGE_SIZE) < sg_dma_len(sg_cur); j++) { ++ ++ if ((offset + sg_cur->offset) >= SAA716x_PAGE_SIZE) { ++ offset -= SAA716x_PAGE_SIZE; ++ continue; ++ } ++ ++ addr = ((u64)sg_dma_address(sg_cur)) + (j * SAA716x_PAGE_SIZE) - sg_cur->offset; ++ ++ BUG_ON(addr == 0); ++ page[k * 2] = (u32 )addr; /* Low */ ++ page[k * 2 + 1] = (u32 )(((u64) addr) >> 32); /* High */ ++ BUG_ON(page[k * 2] % SAA716x_PAGE_SIZE); ++ k++; ++ } ++ } ++ ++ for (; k < (SAA716x_PAGE_SIZE / 8); k++) { ++ page[k * 2] = (u32 ) addr; ++ page[k * 2 + 1] = (u32 ) (((u64 ) addr) >> 32); ++ } ++ ++ /* make "page table" page writable for the PC */ ++ dma_sync_single_for_device(&pdev->dev, ++ dmabuf->mem_ptab_phys, ++ SAA716x_PAGE_SIZE, ++ DMA_TO_DEVICE); ++ ++} ++ ++void saa716x_dmabufsync_dev(struct saa716x_dmabuf *dmabuf) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ dprintk(SAA716x_DEBUG, 1, "DMABUF sync DEVICE"); ++ BUG_ON(dmabuf->sg_list == NULL); ++ ++ dma_sync_sg_for_device(&pdev->dev, ++ dmabuf->sg_list, ++ dmabuf->list_len, ++ DMA_FROM_DEVICE); ++ ++} ++ ++void saa716x_dmabufsync_cpu(struct saa716x_dmabuf *dmabuf) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ dprintk(SAA716x_DEBUG, 1, "DMABUF sync CPU"); ++ BUG_ON(dmabuf->sg_list == NULL); ++ ++ dma_sync_sg_for_cpu(&pdev->dev, ++ dmabuf->sg_list, ++ dmabuf->list_len, ++ DMA_FROM_DEVICE); ++} ++ ++/* Allocates a DMA buffer for the specified external linear buffer. */ ++int saa716x_dmabuf_alloc(struct saa716x_dev *saa716x, struct saa716x_dmabuf *dmabuf, int size) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ int ret; ++ ++ BUG_ON(saa716x == NULL); ++ BUG_ON(dmabuf == NULL); ++ BUG_ON(! (size > 0)); ++ ++ dmabuf->dma_type = SAA716x_DMABUF_INT; ++ ++ dmabuf->mem_virt_noalign = NULL; ++ dmabuf->mem_virt = NULL; ++ dmabuf->mem_ptab_phys = 0; ++ dmabuf->mem_ptab_virt = NULL; ++ ++ dmabuf->list_len = 0; ++ dmabuf->saa716x = saa716x; ++ ++ /* Allocate page table */ ++ ret = saa716x_allocate_ptable(dmabuf); ++ if (ret < 0) { ++ dprintk(SAA716x_ERROR, 1, "PT alloc failed, Out of memory"); ++ goto err1; ++ } ++ ++ /* Allocate buffer as SG */ ++ ret = saa716x_dmabuf_sgalloc(dmabuf, NULL, size); ++ if (ret < 0) { ++ dprintk(SAA716x_ERROR, 1, "SG alloc failed"); ++ goto err2; ++ } ++ ++ ret = dma_map_sg(&pdev->dev, dmabuf->sg_list, dmabuf->list_len, DMA_FROM_DEVICE); ++ if (ret < 0) { ++ dprintk(SAA716x_ERROR, 1, "SG map failed"); ++ goto err3; ++ } ++ ++ saa716x_dmabuf_sgpagefill(dmabuf, dmabuf->sg_list, ret, 0); ++ ++ return 0; ++err3: ++ saa716x_dmabuf_sgfree(dmabuf); ++err2: ++ saa716x_free_ptable(dmabuf); ++err1: ++ return ret; ++} ++ ++void saa716x_dmabuf_free(struct saa716x_dev *saa716x, struct saa716x_dmabuf *dmabuf) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ BUG_ON(saa716x == NULL); ++ BUG_ON(dmabuf == NULL); ++ ++ dma_unmap_sg(&pdev->dev, dmabuf->sg_list, dmabuf->list_len, DMA_FROM_DEVICE); ++ saa716x_dmabuf_sgfree(dmabuf); ++ saa716x_free_ptable(dmabuf); ++} +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_dma.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma.h 2013-01-16 10:41:10.913798268 +0100 +@@ -0,0 +1,38 @@ ++#ifndef __SAA716x_DMA_H ++#define __SAA716x_DMA_H ++ ++#define SAA716x_PAGE_SIZE 4096 ++ ++enum saa716x_dma_type { ++ SAA716x_DMABUF_EXT_LIN, /* Linear external */ ++ SAA716x_DMABUF_EXT_SG, /* SG external */ ++ SAA716x_DMABUF_INT /* Linear internal */ ++}; ++ ++struct saa716x_dev; ++ ++struct saa716x_dmabuf { ++ enum saa716x_dma_type dma_type; ++ ++ void *mem_virt_noalign; ++ void *mem_virt; /* page aligned */ ++ dma_addr_t mem_ptab_phys; ++ void *mem_ptab_virt; ++ void *sg_list; /* SG list */ ++ ++ struct saa716x_dev *saa716x; ++ ++ int list_len; /* buffer len */ ++ int offset; /* page offset */ ++}; ++ ++extern int saa716x_dmabuf_alloc(struct saa716x_dev *saa716x, ++ struct saa716x_dmabuf *dmabuf, ++ int size); ++extern void saa716x_dmabuf_free(struct saa716x_dev *saa716x, ++ struct saa716x_dmabuf *dmabuf); ++ ++extern void saa716x_dmabufsync_dev(struct saa716x_dmabuf *dmabuf); ++extern void saa716x_dmabufsync_cpu(struct saa716x_dmabuf *dmabuf); ++ ++#endif /* __SAA716x_DMA_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_dma_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_dma_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_dma_reg.h 2013-01-16 10:41:10.913798268 +0100 +@@ -0,0 +1,200 @@ ++#ifndef __SAA716x_DMA_REG_H ++#define __SAA716x_DMA_REG_H ++ ++/* -------------- BAM Registers -------------- */ ++ ++#define BAM_VI0_0_DMA_BUF_MODE 0x000 ++ ++#define BAM_VI0_0_ADDR_OFFST_0 0x004 ++#define BAM_VI0_0_ADDR_OFFST_1 0x008 ++#define BAM_VI0_0_ADDR_OFFST_2 0x00c ++#define BAM_VI0_0_ADDR_OFFST_3 0x010 ++#define BAM_VI0_0_ADDR_OFFST_4 0x014 ++#define BAM_VI0_0_ADDR_OFFST_5 0x018 ++#define BAM_VI0_0_ADDR_OFFST_6 0x01c ++#define BAM_VI0_0_ADDR_OFFST_7 0x020 ++ ++#define BAM_VI0_1_DMA_BUF_MODE 0x024 ++#define BAM_VI0_1_ADDR_OFFST_0 0x028 ++#define BAM_VI0_1_ADDR_OFFST_1 0x02c ++#define BAM_VI0_1_ADDR_OFFST_2 0x030 ++#define BAM_VI0_1_ADDR_OFFST_3 0x034 ++#define BAM_VI0_1_ADDR_OFFST_4 0x038 ++#define BAM_VI0_1_ADDR_OFFST_5 0x03c ++#define BAM_VI0_1_ADDR_OFFST_6 0x040 ++#define BAM_VI0_1_ADDR_OFFST_7 0x044 ++ ++#define BAM_VI0_2_DMA_BUF_MODE 0x048 ++#define BAM_VI0_2_ADDR_OFFST_0 0x04c ++#define BAM_VI0_2_ADDR_OFFST_1 0x050 ++#define BAM_VI0_2_ADDR_OFFST_2 0x054 ++#define BAM_VI0_2_ADDR_OFFST_3 0x058 ++#define BAM_VI0_2_ADDR_OFFST_4 0x05c ++#define BAM_VI0_2_ADDR_OFFST_5 0x060 ++#define BAM_VI0_2_ADDR_OFFST_6 0x064 ++#define BAM_VI0_2_ADDR_OFFST_7 0x068 ++ ++ ++#define BAM_VI1_0_DMA_BUF_MODE 0x06c ++#define BAM_VI1_0_ADDR_OFFST_0 0x070 ++#define BAM_VI1_0_ADDR_OFFST_1 0x074 ++#define BAM_VI1_0_ADDR_OFFST_2 0x078 ++#define BAM_VI1_0_ADDR_OFFST_3 0x07c ++#define BAM_VI1_0_ADDR_OFFST_4 0x080 ++#define BAM_VI1_0_ADDR_OFFST_5 0x084 ++#define BAM_VI1_0_ADDR_OFFST_6 0x088 ++#define BAM_VI1_0_ADDR_OFFST_7 0x08c ++ ++#define BAM_VI1_1_DMA_BUF_MODE 0x090 ++#define BAM_VI1_1_ADDR_OFFST_0 0x094 ++#define BAM_VI1_1_ADDR_OFFST_1 0x098 ++#define BAM_VI1_1_ADDR_OFFST_2 0x09c ++#define BAM_VI1_1_ADDR_OFFST_3 0x0a0 ++#define BAM_VI1_1_ADDR_OFFST_4 0x0a4 ++#define BAM_VI1_1_ADDR_OFFST_5 0x0a8 ++#define BAM_VI1_1_ADDR_OFFST_6 0x0ac ++#define BAM_VI1_1_ADDR_OFFST_7 0x0b0 ++ ++#define BAM_VI1_2_DMA_BUF_MODE 0x0b4 ++#define BAM_VI1_2_ADDR_OFFST_0 0x0b8 ++#define BAM_VI1_2_ADDR_OFFST_1 0x0bc ++#define BAM_VI1_2_ADDR_OFFST_2 0x0c0 ++#define BAM_VI1_2_ADDR_OFFST_3 0x0c4 ++#define BAM_VI1_2_ADDR_OFFST_4 0x0c8 ++#define BAM_VI1_2_ADDR_OFFST_5 0x0cc ++#define BAM_VI1_2_ADDR_OFFST_6 0x0d0 ++#define BAM_VI1_2_ADDR_OFFST_7 0x0d4 ++ ++ ++#define BAM_FGPI0_DMA_BUF_MODE 0x0d8 ++#define BAM_FGPI0_ADDR_OFFST_0 0x0dc ++#define BAM_FGPI0_ADDR_OFFST_1 0x0e0 ++#define BAM_FGPI0_ADDR_OFFST_2 0x0e4 ++#define BAM_FGPI0_ADDR_OFFST_3 0x0e8 ++#define BAM_FGPI0_ADDR_OFFST_4 0x0ec ++#define BAM_FGPI0_ADDR_OFFST_5 0x0f0 ++#define BAM_FGPI0_ADDR_OFFST_6 0x0f4 ++#define BAM_FGPI0_ADDR_OFFST_7 0x0f8 ++ ++#define BAM_FGPI1_DMA_BUF_MODE 0x0fc ++#define BAM_FGPI1_ADDR_OFFST_0 0x100 ++#define BAM_FGPI1_ADDR_OFFST_1 0x104 ++#define BAM_FGPI1_ADDR_OFFST_2 0x108 ++#define BAM_FGPI1_ADDR_OFFST_3 0x10c ++#define BAM_FGPI1_ADDR_OFFST_4 0x110 ++#define BAM_FGPI1_ADDR_OFFST_5 0x114 ++#define BAM_FGPI1_ADDR_OFFST_6 0x118 ++#define BAM_FGPI1_ADDR_OFFST_7 0x11c ++ ++#define BAM_FGPI2_DMA_BUF_MODE 0x120 ++#define BAM_FGPI2_ADDR_OFFST_0 0x124 ++#define BAM_FGPI2_ADDR_OFFST_1 0x128 ++#define BAM_FGPI2_ADDR_OFFST_2 0x12c ++#define BAM_FGPI2_ADDR_OFFST_3 0x130 ++#define BAM_FGPI2_ADDR_OFFST_4 0x134 ++#define BAM_FGPI2_ADDR_OFFST_5 0x138 ++#define BAM_FGPI2_ADDR_OFFST_6 0x13c ++#define BAM_FGPI2_ADDR_OFFST_7 0x140 ++ ++#define BAM_FGPI3_DMA_BUF_MODE 0x144 ++#define BAM_FGPI3_ADDR_OFFST_0 0x148 ++#define BAM_FGPI3_ADDR_OFFST_1 0x14c ++#define BAM_FGPI3_ADDR_OFFST_2 0x150 ++#define BAM_FGPI3_ADDR_OFFST_3 0x154 ++#define BAM_FGPI3_ADDR_OFFST_4 0x158 ++#define BAM_FGPI3_ADDR_OFFST_5 0x15c ++#define BAM_FGPI3_ADDR_OFFST_6 0x160 ++#define BAM_FGPI3_ADDR_OFFST_7 0x164 ++ ++ ++#define BAM_AI0_DMA_BUF_MODE 0x168 ++#define BAM_AI0_ADDR_OFFST_0 0x16c ++#define BAM_AI0_ADDR_OFFST_1 0x170 ++#define BAM_AI0_ADDR_OFFST_2 0x174 ++#define BAM_AI0_ADDR_OFFST_3 0x178 ++#define BAM_AI0_ADDR_OFFST_4 0x17c ++#define BAM_AIO_ADDR_OFFST_5 0x180 ++#define BAM_AI0_ADDR_OFFST_6 0x184 ++#define BAM_AIO_ADDR_OFFST_7 0x188 ++ ++#define BAM_AI1_DMA_BUF_MODE 0x18c ++#define BAM_AI1_ADDR_OFFST_0 0x190 ++#define BAM_AI1_ADDR_OFFST_1 0x194 ++#define BAM_AI1_ADDR_OFFST_2 0x198 ++#define BAM_AI1_ADDR_OFFST_3 0x19c ++#define BAM_AI1_ADDR_OFFST_4 0x1a0 ++#define BAM_AI1_ADDR_OFFST_5 0x1a4 ++#define BAM_AI1_ADDR_OFFST_6 0x1a8 ++#define BAM_AI1_ADDR_OFFST_7 0x1ac ++ ++#define BAM_SW_RST 0xff0 ++#define BAM_SW_RESET (0x00000001 << 0) ++ ++ ++ ++ ++ ++/* -------------- MMU Registers -------------- */ ++ ++#define MMU_MODE 0x000 ++ ++#define MMU_DMA_CONFIG0 0x004 ++#define MMU_DMA_CONFIG1 0x008 ++#define MMU_DMA_CONFIG2 0x00c ++#define MMU_DMA_CONFIG3 0x010 ++#define MMU_DMA_CONFIG4 0x014 ++#define MMU_DMA_CONFIG5 0x018 ++#define MMU_DMA_CONFIG6 0x01c ++#define MMU_DMA_CONFIG7 0x020 ++#define MMU_DMA_CONFIG8 0x024 ++#define MMU_DMA_CONFIG9 0x028 ++#define MMU_DMA_CONFIG10 0x02c ++#define MMU_DMA_CONFIG11 0x030 ++#define MMU_DMA_CONFIG12 0x034 ++#define MMU_DMA_CONFIG13 0x038 ++#define MMU_DMA_CONFIG14 0x03c ++#define MMU_DMA_CONFIG15 0x040 ++ ++#define MMU_SW_RST 0xff0 ++#define MMU_SW_RESET (0x0001 << 0) ++ ++#define MMU_PTA_BASE0 0x044 /* DMA 0 */ ++#define MMU_PTA_BASE1 0x084 /* DMA 1 */ ++#define MMU_PTA_BASE2 0x0c4 /* DMA 2 */ ++#define MMU_PTA_BASE3 0x104 /* DMA 3 */ ++#define MMU_PTA_BASE4 0x144 /* DMA 4 */ ++#define MMU_PTA_BASE5 0x184 /* DMA 5 */ ++#define MMU_PTA_BASE6 0x1c4 /* DMA 6 */ ++#define MMU_PTA_BASE7 0x204 /* DMA 7 */ ++#define MMU_PTA_BASE8 0x244 /* DMA 8 */ ++#define MMU_PTA_BASE9 0x284 /* DMA 9 */ ++#define MMU_PTA_BASE10 0x2c4 /* DMA 10 */ ++#define MMU_PTA_BASE11 0x304 /* DMA 11 */ ++#define MMU_PTA_BASE12 0x344 /* DMA 12 */ ++#define MMU_PTA_BASE13 0x384 /* DMA 13 */ ++#define MMU_PTA_BASE14 0x3c4 /* DMA 14 */ ++#define MMU_PTA_BASE15 0x404 /* DMA 15 */ ++ ++#define MMU_PTA_BASE 0x044 /* DMA 0 */ ++#define MMU_PTA_OFFSET 0x40 ++ ++#define PTA_BASE(__ch) (MMU_PTA_BASE + (MMU_PTA_OFFSET * __ch)) ++ ++#define MMU_PTA0_LSB(__ch) PTA_BASE(__ch) + 0x00 ++#define MMU_PTA0_MSB(__ch) PTA_BASE(__ch) + 0x04 ++#define MMU_PTA1_LSB(__ch) PTA_BASE(__ch) + 0x08 ++#define MMU_PTA1_MSB(__ch) PTA_BASE(__ch) + 0x0c ++#define MMU_PTA2_LSB(__ch) PTA_BASE(__ch) + 0x10 ++#define MMU_PTA2_MSB(__ch) PTA_BASE(__ch) + 0x14 ++#define MMU_PTA3_LSB(__ch) PTA_BASE(__ch) + 0x18 ++#define MMU_PTA3_MSB(__ch) PTA_BASE(__ch) + 0x1c ++#define MMU_PTA4_LSB(__ch) PTA_BASE(__ch) + 0x20 ++#define MMU_PTA4_MSB(__ch) PTA_BASE(__ch) + 0x24 ++#define MMU_PTA5_LSB(__ch) PTA_BASE(__ch) + 0x28 ++#define MMU_PTA5_MSB(__ch) PTA_BASE(__ch) + 0x2c ++#define MMU_PTA6_LSB(__ch) PTA_BASE(__ch) + 0x30 ++#define MMU_PTA6_MSB(__ch) PTA_BASE(__ch) + 0x34 ++#define MMU_PTA7_LSB(__ch) PTA_BASE(__ch) + 0x38 ++#define MMU_PTA7_MSB(__ch) PTA_BASE(__ch) + 0x3c ++ ++#endif /* __SAA716x_DMA_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.c 2013-01-16 10:41:10.914798261 +0100 +@@ -0,0 +1,412 @@ ++#include ++ ++#include ++#include ++ ++#include "saa716x_phi_reg.h" ++ ++#include "saa716x_phi.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++#include "saa716x_ff.h" ++#include "saa716x_ff_cmd.h" ++ ++ ++int sti7109_cmd_init(struct sti7109_dev *sti7109) ++{ ++ mutex_init(&sti7109->cmd_lock); ++ mutex_init(&sti7109->osd_cmd_lock); ++ mutex_init(&sti7109->data_lock); ++ ++ init_waitqueue_head(&sti7109->boot_finish_wq); ++ sti7109->boot_finished = 0; ++ ++ init_waitqueue_head(&sti7109->cmd_ready_wq); ++ sti7109->cmd_ready = 0; ++ ++ init_waitqueue_head(&sti7109->result_avail_wq); ++ sti7109->result_avail = 0; ++ ++ init_waitqueue_head(&sti7109->osd_cmd_ready_wq); ++ sti7109->osd_cmd_ready = 0; ++ init_waitqueue_head(&sti7109->osd_result_avail_wq); ++ sti7109->osd_result_avail = 0; ++ ++ sti7109->data_handle = 0; ++ sti7109->data_buffer = (u8 *) (sti7109->iobuf + TSOUT_LEN + TSBUF_LEN); ++ init_waitqueue_head(&sti7109->data_ready_wq); ++ sti7109->data_ready = 0; ++ init_waitqueue_head(&sti7109->block_done_wq); ++ sti7109->block_done = 0; ++ return 0; ++} ++ ++static int sti7109_do_raw_cmd(struct sti7109_dev * sti7109) ++{ ++ struct saa716x_dev * saa716x = sti7109->dev; ++ unsigned long timeout; ++ ++ timeout = 1 * HZ; ++ timeout = wait_event_interruptible_timeout(sti7109->cmd_ready_wq, ++ sti7109->cmd_ready == 1, ++ timeout); ++ ++ if (timeout == -ERESTARTSYS || sti7109->cmd_ready == 0) { ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ dprintk(SAA716x_ERROR, 1, "cmd ERESTARTSYS"); ++ return -ERESTARTSYS; ++ } ++ dprintk(SAA716x_ERROR, 1, ++ "timed out waiting for command ready"); ++ return -EIO; ++ } ++ ++ sti7109->cmd_ready = 0; ++ sti7109->result_avail = 0; ++ saa716x_phi_write(saa716x, ADDR_CMD_DATA, sti7109->cmd_data, ++ sti7109->cmd_len); ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_PHI_ISET, ISR_CMD_MASK); ++ ++ if (sti7109->result_max_len > 0) { ++ timeout = 1 * HZ; ++ timeout = wait_event_interruptible_timeout( ++ sti7109->result_avail_wq, ++ sti7109->result_avail == 1, ++ timeout); ++ ++ if (timeout == -ERESTARTSYS || sti7109->result_avail == 0) { ++ sti7109->result_len = 0; ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ dprintk(SAA716x_ERROR, 1, "result ERESTARTSYS"); ++ return -ERESTARTSYS; ++ } ++ dprintk(SAA716x_ERROR, 1, ++ "timed out waiting for command result"); ++ return -EIO; ++ } ++ ++ if (sti7109->result_len > sti7109->result_max_len) { ++ sti7109->result_len = sti7109->result_max_len; ++ dprintk(SAA716x_NOTICE, 1, ++ "not enough space in result buffer"); ++ } ++ } ++ ++ return 0; ++} ++ ++int sti7109_raw_cmd(struct sti7109_dev * sti7109, osd_raw_cmd_t * cmd) ++{ ++ struct saa716x_dev * saa716x = sti7109->dev; ++ int err; ++ ++ if (cmd->cmd_len > SIZE_CMD_DATA) { ++ dprintk(SAA716x_ERROR, 1, "command too long"); ++ return -EFAULT; ++ } ++ ++ mutex_lock(&sti7109->cmd_lock); ++ ++ err = -EFAULT; ++ if (copy_from_user(sti7109->cmd_data, (void __user *)cmd->cmd_data, ++ cmd->cmd_len)) ++ goto out; ++ ++ sti7109->cmd_len = cmd->cmd_len; ++ sti7109->result_max_len = cmd->result_len; ++ ++ err = sti7109_do_raw_cmd(sti7109); ++ if (err) ++ goto out; ++ ++ cmd->result_len = sti7109->result_len; ++ if (sti7109->result_len > 0) { ++ if (copy_to_user((void __user *)cmd->result_data, ++ sti7109->result_data, ++ sti7109->result_len)) ++ err = -EFAULT; ++ } ++ ++out: ++ mutex_unlock(&sti7109->cmd_lock); ++ return err; ++} ++ ++static int sti7109_do_raw_osd_cmd(struct sti7109_dev * sti7109) ++{ ++ struct saa716x_dev * saa716x = sti7109->dev; ++ unsigned long timeout; ++ ++ timeout = 1 * HZ; ++ timeout = wait_event_interruptible_timeout(sti7109->osd_cmd_ready_wq, ++ sti7109->osd_cmd_ready == 1, ++ timeout); ++ ++ if (timeout == -ERESTARTSYS || sti7109->osd_cmd_ready == 0) { ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ dprintk(SAA716x_ERROR, 1, "osd cmd ERESTARTSYS"); ++ return -ERESTARTSYS; ++ } ++ dprintk(SAA716x_ERROR, 1, ++ "timed out waiting for osd command ready"); ++ return -EIO; ++ } ++ ++ sti7109->osd_cmd_ready = 0; ++ sti7109->osd_result_avail = 0; ++ saa716x_phi_write(saa716x, ADDR_OSD_CMD_DATA, sti7109->osd_cmd_data, ++ sti7109->osd_cmd_len); ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_PHI_ISET, ISR_OSD_CMD_MASK); ++ ++ if (sti7109->osd_result_max_len > 0) { ++ timeout = 1 * HZ; ++ timeout = wait_event_interruptible_timeout( ++ sti7109->osd_result_avail_wq, ++ sti7109->osd_result_avail == 1, ++ timeout); ++ ++ if (timeout == -ERESTARTSYS || sti7109->osd_result_avail == 0) { ++ sti7109->osd_result_len = 0; ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ dprintk(SAA716x_ERROR, 1, ++ "osd result ERESTARTSYS"); ++ return -ERESTARTSYS; ++ } ++ dprintk(SAA716x_ERROR, 1, ++ "timed out waiting for osd command result"); ++ return -EIO; ++ } ++ ++ if (sti7109->osd_result_len > sti7109->osd_result_max_len) { ++ sti7109->osd_result_len = sti7109->osd_result_max_len; ++ dprintk(SAA716x_NOTICE, 1, ++ "not enough space in result buffer"); ++ } ++ } ++ ++ return 0; ++} ++ ++int sti7109_raw_osd_cmd(struct sti7109_dev * sti7109, osd_raw_cmd_t * cmd) ++{ ++ struct saa716x_dev * saa716x = sti7109->dev; ++ int err; ++ ++ if (cmd->cmd_len > SIZE_OSD_CMD_DATA) { ++ dprintk(SAA716x_ERROR, 1, "command too long"); ++ return -EFAULT; ++ } ++ ++ mutex_lock(&sti7109->osd_cmd_lock); ++ ++ err = -EFAULT; ++ if (copy_from_user(sti7109->osd_cmd_data, (void __user *)cmd->cmd_data, ++ cmd->cmd_len)) ++ goto out; ++ ++ sti7109->osd_cmd_len = cmd->cmd_len; ++ sti7109->osd_result_max_len = cmd->result_len; ++ ++ err = sti7109_do_raw_osd_cmd(sti7109); ++ if (err) ++ goto out; ++ ++ cmd->result_len = sti7109->osd_result_len; ++ if (sti7109->osd_result_len > 0) { ++ if (copy_to_user((void __user *)cmd->result_data, ++ sti7109->osd_result_data, ++ sti7109->osd_result_len)) ++ err = -EFAULT; ++ } ++ ++out: ++ mutex_unlock(&sti7109->osd_cmd_lock); ++ return err; ++} ++ ++static int sti7109_do_raw_data(struct sti7109_dev * sti7109, osd_raw_data_t * data) ++{ ++ struct saa716x_dev * saa716x = sti7109->dev; ++ unsigned long timeout; ++ u16 blockSize; ++ u16 lastBlockSize; ++ u16 numBlocks; ++ u16 blockIndex; ++ u8 blockHeader[SIZE_BLOCK_HEADER]; ++ u8 * blockPtr; ++ int activeBlock; ++ ++ timeout = 1 * HZ; ++ timeout = wait_event_interruptible_timeout(sti7109->data_ready_wq, ++ sti7109->data_ready == 1, ++ timeout); ++ ++ if (timeout == -ERESTARTSYS || sti7109->data_ready == 0) { ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ dprintk(SAA716x_ERROR, 1, "data ERESTARTSYS"); ++ return -ERESTARTSYS; ++ } ++ dprintk(SAA716x_ERROR, 1, "timed out waiting for data ready"); ++ return -EIO; ++ } ++ ++ sti7109->data_ready = 0; ++ ++ /* ++ * 8 bytes is the size of the block header. Block header structure is: ++ * 16 bit - block index ++ * 16 bit - number of blocks ++ * 16 bit - current block data size ++ * 16 bit - block handle. This is used to reference the data in the ++ * command that uses it. ++ */ ++ blockSize = (SIZE_BLOCK_DATA / 2) - SIZE_BLOCK_HEADER; ++ numBlocks = data->data_length / blockSize; ++ lastBlockSize = data->data_length % blockSize; ++ if (lastBlockSize > 0) ++ numBlocks++; ++ ++ blockHeader[2] = (u8) (numBlocks >> 8); ++ blockHeader[3] = (u8) numBlocks; ++ blockHeader[6] = (u8) (sti7109->data_handle >> 8); ++ blockHeader[7] = (u8) sti7109->data_handle; ++ blockPtr = sti7109->data_buffer; ++ activeBlock = 0; ++ for (blockIndex = 0; blockIndex < numBlocks; blockIndex++) { ++ u32 addr; ++ ++ if (lastBlockSize && (blockIndex == (numBlocks - 1))) ++ blockSize = lastBlockSize; ++ ++ blockHeader[0] = (uint8_t) (blockIndex >> 8); ++ blockHeader[1] = (uint8_t) blockIndex; ++ blockHeader[4] = (uint8_t) (blockSize >> 8); ++ blockHeader[5] = (uint8_t) blockSize; ++ ++ addr = ADDR_BLOCK_DATA + activeBlock * (SIZE_BLOCK_DATA / 2); ++ saa716x_phi_write(saa716x, addr, blockHeader, ++ SIZE_BLOCK_HEADER); ++ saa716x_phi_write(saa716x, addr + SIZE_BLOCK_HEADER, blockPtr, ++ blockSize); ++ activeBlock = (activeBlock + 1) & 1; ++ if (blockIndex > 0) { ++ timeout = 1 * HZ; ++ timeout = wait_event_timeout(sti7109->block_done_wq, ++ sti7109->block_done == 1, ++ timeout); ++ ++ if (sti7109->block_done == 0) { ++ dprintk(SAA716x_ERROR, 1, ++ "timed out waiting for block done"); ++ return -EIO; ++ } ++ } ++ sti7109->block_done = 0; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_PHI_ISET, ISR_BLOCK_MASK); ++ blockPtr += blockSize; ++ } ++ timeout = 1 * HZ; ++ timeout = wait_event_timeout(sti7109->block_done_wq, ++ sti7109->block_done == 1, ++ timeout); ++ ++ if (sti7109->block_done == 0) { ++ dprintk(SAA716x_ERROR, 1, "timed out waiting for block done"); ++ return -EIO; ++ } ++ sti7109->block_done = 0; ++ ++ data->data_handle = sti7109->data_handle; ++ sti7109->data_handle++; ++ return 0; ++} ++ ++int sti7109_raw_data(struct sti7109_dev * sti7109, osd_raw_data_t * data) ++{ ++ struct saa716x_dev * saa716x = sti7109->dev; ++ int err; ++ ++ if (data->data_length > MAX_DATA_LEN) { ++ dprintk(SAA716x_ERROR, 1, "data too big"); ++ return -EFAULT; ++ } ++ ++ mutex_lock(&sti7109->data_lock); ++ ++ err = -EFAULT; ++ if (copy_from_user(sti7109->data_buffer, ++ (void __user *)data->data_buffer, ++ data->data_length)) ++ goto out; ++ ++ err = sti7109_do_raw_data(sti7109, data); ++ if (err) ++ goto out; ++ ++out: ++ mutex_unlock(&sti7109->data_lock); ++ return err; ++} ++ ++int sti7109_cmd_get_fw_version(struct sti7109_dev *sti7109, u32 *fw_version) ++{ ++ int ret_val = -EINVAL; ++ ++ mutex_lock(&sti7109->cmd_lock); ++ ++ sti7109->cmd_data[0] = 0x00; ++ sti7109->cmd_data[1] = 0x04; ++ sti7109->cmd_data[2] = 0x00; ++ sti7109->cmd_data[3] = 0x00; ++ sti7109->cmd_data[4] = 0x00; ++ sti7109->cmd_data[5] = 0x00; ++ sti7109->cmd_len = 6; ++ sti7109->result_max_len = MAX_RESULT_LEN; ++ ++ ret_val = sti7109_do_raw_cmd(sti7109); ++ if (ret_val == 0) { ++ *fw_version = (sti7109->result_data[6] << 16) ++ | (sti7109->result_data[7] << 8) ++ | sti7109->result_data[8]; ++ } ++ ++ mutex_unlock(&sti7109->cmd_lock); ++ ++ return ret_val; ++} ++ ++int sti7109_cmd_get_video_format(struct sti7109_dev *sti7109, video_size_t *vs) ++{ ++ int ret_val = -EINVAL; ++ ++ mutex_lock(&sti7109->cmd_lock); ++ ++ sti7109->cmd_data[0] = 0x00; ++ sti7109->cmd_data[1] = 0x05; /* command length */ ++ sti7109->cmd_data[2] = 0x00; ++ sti7109->cmd_data[3] = 0x01; /* A/V decoder command group */ ++ sti7109->cmd_data[4] = 0x00; ++ sti7109->cmd_data[5] = 0x10; /* get video format info command */ ++ sti7109->cmd_data[6] = 0x00; /* decoder index 0 */ ++ sti7109->cmd_len = 7; ++ sti7109->result_max_len = MAX_RESULT_LEN; ++ ++ ret_val = sti7109_do_raw_cmd(sti7109); ++ if (ret_val == 0) { ++ vs->w = (sti7109->result_data[7] << 8) ++ | sti7109->result_data[8]; ++ vs->h = (sti7109->result_data[9] << 8) ++ | sti7109->result_data[10]; ++ vs->aspect_ratio = sti7109->result_data[11] >> 4; ++ } ++ ++ mutex_unlock(&sti7109->cmd_lock); ++ ++ return ret_val; ++} ++ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_cmd.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_cmd.h 2013-01-16 10:41:10.914798261 +0100 +@@ -0,0 +1,16 @@ ++#ifndef __SAA716x_FF_CMD_H ++#define __SAA716x_FF_CMD_H ++ ++extern int sti7109_cmd_init(struct sti7109_dev *sti7109); ++extern int sti7109_raw_cmd(struct sti7109_dev * sti7109, ++ osd_raw_cmd_t * cmd); ++extern int sti7109_raw_osd_cmd(struct sti7109_dev * sti7109, ++ osd_raw_cmd_t * cmd); ++extern int sti7109_raw_data(struct sti7109_dev * sti7109, ++ osd_raw_data_t * data); ++extern int sti7109_cmd_get_fw_version(struct sti7109_dev *sti7109, ++ u32 *fw_version); ++extern int sti7109_cmd_get_video_format(struct sti7109_dev *sti7109, ++ video_size_t *vs); ++ ++#endif /* __SAA716x_FF_CMD_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff.h 2013-01-16 10:41:10.915798254 +0100 +@@ -0,0 +1,158 @@ ++#ifndef __SAA716x_FF_H ++#define __SAA716x_FF_H ++ ++#include "dvb_filter.h" ++#include "dvb_ringbuffer.h" ++ ++#define TECHNOTREND 0x13c2 ++#define S2_6400_DUAL_S2_PREMIUM_DEVEL 0x3009 ++#define S2_6400_DUAL_S2_PREMIUM_PROD 0x300A ++ ++#define TT_PREMIUM_GPIO_POWER_ENABLE 27 ++#define TT_PREMIUM_GPIO_RESET_BACKEND 26 ++#define TT_PREMIUM_GPIO_FPGA_CS1 17 ++#define TT_PREMIUM_GPIO_FPGA_CS0 16 ++#define TT_PREMIUM_GPIO_FPGA_PROGRAMN 15 ++#define TT_PREMIUM_GPIO_FPGA_DONE 14 ++#define TT_PREMIUM_GPIO_FPGA_INITN 13 ++ ++/* fpga interrupt register addresses */ ++#define FPGA_ADDR_PHI_ICTRL 0x8000 /* PHI General control of the PC => STB interrupt controller */ ++#define FPGA_ADDR_PHI_ISR 0x8010 /* PHI Interrupt Status Register */ ++#define FPGA_ADDR_PHI_ISET 0x8020 /* PHI Interrupt Set Register */ ++#define FPGA_ADDR_PHI_ICLR 0x8030 /* PHI Interrupt Clear Register */ ++#define FPGA_ADDR_EMI_ICTRL 0x8100 /* EMI General control of the STB => PC interrupt controller */ ++#define FPGA_ADDR_EMI_ISR 0x8110 /* EMI Interrupt Status Register */ ++#define FPGA_ADDR_EMI_ISET 0x8120 /* EMI Interrupt Set Register */ ++#define FPGA_ADDR_EMI_ICLR 0x8130 /* EMI Interrupt Clear Register */ ++ ++/* fpga TS router register addresses */ ++#define FPGA_ADDR_TSR_CTRL 0x8200 /* TS router control register */ ++#define FPGA_ADDR_TSR_MUX1 0x8210 /* TS multiplexer 1 selection register */ ++#define FPGA_ADDR_TSR_MUX2 0x8220 /* TS multiplexer 2 selection register */ ++#define FPGA_ADDR_TSR_MUX3 0x8230 /* TS multiplexer 3 selection register */ ++#define FPGA_ADDR_TSR_MUXCI1 0x8240 /* TS multiplexer CI 1 selection register */ ++#define FPGA_ADDR_TSR_MUXCI2 0x8250 /* TS multiplexer CI 2 selection register */ ++ ++#define FPGA_ADDR_TSR_BRFE1 0x8280 /* bit rate for TS coming from frontend 1 */ ++#define FPGA_ADDR_TSR_BRFE2 0x8284 /* bit rate for TS coming from frontend 2 */ ++#define FPGA_ADDR_TSR_BRFF1 0x828C /* bit rate for TS coming from FIFO 1 */ ++#define FPGA_ADDR_TSR_BRO1 0x8294 /* bit rate for TS going to output 1 */ ++#define FPGA_ADDR_TSR_BRO2 0x8298 /* bit rate for TS going to output 2 */ ++#define FPGA_ADDR_TSR_BRO3 0x829C /* bit rate for TS going to output 3 */ ++ ++/* fpga TS FIFO register addresses */ ++#define FPGA_ADDR_FIFO_CTRL 0x8300 /* FIFO control register */ ++#define FPGA_ADDR_FIFO_STAT 0x8310 /* FIFO status register */ ++ ++#define FPGA_ADDR_VERSION 0x80F0 /* FPGA bitstream version register */ ++ ++#define FPGA_ADDR_PIO_CTRL 0x8500 /* FPGA GPIO control register */ ++ ++#define ISR_CMD_MASK 0x0001 /* interrupt source for normal cmds (osd, fre, av, ...) */ ++#define ISR_READY_MASK 0x0002 /* interrupt source for command acknowledge */ ++#define ISR_BLOCK_MASK 0x0004 /* interrupt source for single block transfers and acknowledge */ ++#define ISR_DATA_MASK 0x0008 /* interrupt source for data transfer acknowledge */ ++#define ISR_BOOT_FINISH_MASK 0x0010 /* interrupt source for boot finish indication */ ++#define ISR_AUDIO_PTS_MASK 0x0020 /* interrupt source for audio PTS */ ++#define ISR_VIDEO_PTS_MASK 0x0040 /* interrupt source for video PTS */ ++#define ISR_CURRENT_STC_MASK 0x0080 /* interrupt source for current system clock */ ++#define ISR_REMOTE_EVENT_MASK 0x0100 /* interrupt source for remote events */ ++#define ISR_DVO_FORMAT_MASK 0x0200 /* interrupt source for DVO format change */ ++#define ISR_OSD_CMD_MASK 0x0400 /* interrupt source for OSD cmds */ ++#define ISR_OSD_READY_MASK 0x0800 /* interrupt source for OSD command acknowledge */ ++#define ISR_FE_CMD_MASK 0x1000 /* interrupt source for frontend cmds */ ++#define ISR_FE_READY_MASK 0x2000 /* interrupt source for frontend command acknowledge */ ++#define ISR_LOG_MESSAGE_MASK 0x4000 /* interrupt source for log messages */ ++#define ISR_FIFO1_EMPTY_MASK 0x8000 /* interrupt source for FIFO1 empty */ ++ ++#define ADDR_CMD_DATA 0x0000 /* address for cmd data in fpga dpram */ ++#define ADDR_OSD_CMD_DATA 0x01A0 /* address for OSD cmd data */ ++#define ADDR_FE_CMD_DATA 0x05C0 /* address for frontend cmd data */ ++#define ADDR_BLOCK_DATA 0x0600 /* address for block data */ ++#define ADDR_AUDIO_PTS 0x3E00 /* address for audio PTS (64 Bits) */ ++#define ADDR_VIDEO_PTS 0x3E08 /* address for video PTS (64 Bits) */ ++#define ADDR_CURRENT_STC 0x3E10 /* address for system clock (64 Bits) */ ++#define ADDR_DVO_FORMAT 0x3E18 /* address for DVO format 32 Bits) */ ++#define ADDR_REMOTE_EVENT 0x3F00 /* address for remote events (32 Bits) */ ++#define ADDR_LOG_MESSAGE 0x3F80 /* address for log messages */ ++ ++#define SIZE_CMD_DATA 0x01A0 /* maximum size for command data (416 Bytes) */ ++#define SIZE_OSD_CMD_DATA 0x0420 /* maximum size for OSD command data (1056 Bytes) */ ++#define SIZE_FE_CMD_DATA 0x0040 /* maximum size for frontend command data (64 Bytes) */ ++#define SIZE_BLOCK_DATA 0x3800 /* maximum size for block data (14 kB) */ ++#define SIZE_LOG_MESSAGE_DATA 0x0080 /* maximum size for log message data (128 Bytes) */ ++ ++#define SIZE_BLOCK_HEADER 8 /* block header size */ ++ ++#define MAX_RESULT_LEN 256 ++#define MAX_DATA_LEN (1024 * 1024) ++ ++#define TSOUT_LEN (1024 * TS_SIZE) ++#define TSBUF_LEN (8 * 1024) ++ ++/* place to store all the necessary device information */ ++struct sti7109_dev { ++ struct saa716x_dev *dev; ++ struct dvb_device *osd_dev; ++ struct dvb_device *video_dev; ++ struct dvb_device *audio_dev; ++ ++ void *iobuf; /* memory for all buffers */ ++ struct dvb_ringbuffer tsout; /* buffer for TS output */ ++ u8 *tsbuf; /* temp ts buffer */ ++ ++ struct tasklet_struct fifo_tasklet; ++ ++ wait_queue_head_t boot_finish_wq; ++ int boot_finished; ++ ++ wait_queue_head_t cmd_ready_wq; ++ int cmd_ready; ++ u8 cmd_data[SIZE_CMD_DATA]; ++ u32 cmd_len; ++ ++ wait_queue_head_t result_avail_wq; ++ int result_avail; ++ u8 result_data[MAX_RESULT_LEN]; ++ u32 result_len; ++ u32 result_max_len; ++ ++ wait_queue_head_t osd_cmd_ready_wq; ++ int osd_cmd_ready; ++ u8 osd_cmd_data[SIZE_OSD_CMD_DATA]; ++ u32 osd_cmd_len; ++ ++ wait_queue_head_t osd_result_avail_wq; ++ int osd_result_avail; ++ u8 osd_result_data[MAX_RESULT_LEN]; ++ u32 osd_result_len; ++ u32 osd_result_max_len; ++ ++ u16 data_handle; ++ u8 *data_buffer; /* raw data transfer buffer */ ++ wait_queue_head_t data_ready_wq; ++ int data_ready; ++ wait_queue_head_t block_done_wq; ++ int block_done; ++ ++ struct mutex cmd_lock; ++ struct mutex osd_cmd_lock; ++ struct mutex data_lock; ++ ++ u64 audio_pts; ++ u64 video_pts; ++ u64 current_stc; ++ ++ u32 int_count_enable; ++ u32 total_int_count; ++ u32 fgpi_int_count[2]; ++ u32 i2c_int_count[2]; ++ u32 ext_int_total_count; ++ u32 ext_int_source_count[16]; ++ u32 last_int_ticks; ++ ++ u16 fpga_version; ++}; ++ ++#endif /* __SAA716x_FF_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_ir.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_ir.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_ir.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_ir.c 2013-01-16 10:41:10.915798254 +0100 +@@ -0,0 +1,265 @@ ++/* ++ * Driver for the remote control of the TT6400 DVB-S2 card ++ * ++ * Copyright (C) 2010 Oliver Endriss ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * Or, point your browser to http://www.gnu.org/copyleft/gpl.html ++ * ++ */ ++ ++#include ++#include ++ ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++#include "saa716x_ff.h" ++ ++ ++/* infrared remote control */ ++struct infrared { ++ u16 key_map[128]; ++ struct input_dev *input_dev; ++ char input_phys[32]; ++ struct timer_list keyup_timer; ++ struct tasklet_struct tasklet; ++ u32 command; ++ u32 device_mask; ++ u8 protocol; ++ u16 last_key; ++ u16 last_toggle; ++ bool delay_timer_finished; ++}; ++ ++#define IR_RC5 0 ++#define UP_TIMEOUT (HZ*7/25) ++ ++ ++/* key-up timer */ ++static void ir_emit_keyup(unsigned long parm) ++{ ++ struct infrared *ir = (struct infrared *) parm; ++ ++ if (!ir || !test_bit(ir->last_key, ir->input_dev->key)) ++ return; ++ ++ input_report_key(ir->input_dev, ir->last_key, 0); ++ input_sync(ir->input_dev); ++} ++ ++ ++/* tasklet */ ++static void ir_emit_key(unsigned long parm) ++{ ++ struct saa716x_dev *saa716x = (struct saa716x_dev *) parm; ++ struct infrared *ir = saa716x->ir_priv; ++ u32 ircom = ir->command; ++ u8 data; ++ u8 addr; ++ u16 toggle; ++ u16 keycode; ++ ++ /* extract device address and data */ ++ if (ircom & 0x80000000) { /* CEC remote command */ ++ addr = 0; ++ data = ircom & 0x7F; ++ toggle = 0; ++ } else { ++ switch (ir->protocol) { ++ case IR_RC5: /* extended RC5: 5 bits device address, 7 bits data */ ++ addr = (ircom >> 6) & 0x1f; ++ /* data bits 1..6 */ ++ data = ircom & 0x3f; ++ /* data bit 7 (inverted) */ ++ if (!(ircom & 0x1000)) ++ data |= 0x40; ++ toggle = ircom & 0x0800; ++ break; ++ ++ default: ++ printk(KERN_ERR "%s: invalid protocol %x\n", ++ __func__, ir->protocol); ++ return; ++ } ++ } ++ ++ input_event(ir->input_dev, EV_MSC, MSC_RAW, (addr << 16) | data); ++ input_event(ir->input_dev, EV_MSC, MSC_SCAN, data); ++ ++ keycode = ir->key_map[data]; ++ ++ dprintk(SAA716x_DEBUG, 0, ++ "%s: code %08x -> addr %i data 0x%02x -> keycode %i\n", ++ __func__, ircom, addr, data, keycode); ++ ++ /* check device address */ ++ if (!(ir->device_mask & (1 << addr))) ++ return; ++ ++ if (!keycode) { ++ printk(KERN_WARNING "%s: code %08x -> addr %i data 0x%02x -> unknown key!\n", ++ __func__, ircom, addr, data); ++ return; ++ } ++ ++ if (timer_pending(&ir->keyup_timer)) { ++ del_timer(&ir->keyup_timer); ++ if (ir->last_key != keycode || toggle != ir->last_toggle) { ++ ir->delay_timer_finished = false; ++ input_event(ir->input_dev, EV_KEY, ir->last_key, 0); ++ input_event(ir->input_dev, EV_KEY, keycode, 1); ++ input_sync(ir->input_dev); ++ } else if (ir->delay_timer_finished) { ++ input_event(ir->input_dev, EV_KEY, keycode, 2); ++ input_sync(ir->input_dev); ++ } ++ } else { ++ ir->delay_timer_finished = false; ++ input_event(ir->input_dev, EV_KEY, keycode, 1); ++ input_sync(ir->input_dev); ++ } ++ ++ ir->last_key = keycode; ++ ir->last_toggle = toggle; ++ ++ ir->keyup_timer.expires = jiffies + UP_TIMEOUT; ++ add_timer(&ir->keyup_timer); ++ ++} ++ ++ ++/* register with input layer */ ++static void ir_register_keys(struct infrared *ir) ++{ ++ int i; ++ ++ set_bit(EV_KEY, ir->input_dev->evbit); ++ set_bit(EV_REP, ir->input_dev->evbit); ++ set_bit(EV_MSC, ir->input_dev->evbit); ++ ++ set_bit(MSC_RAW, ir->input_dev->mscbit); ++ set_bit(MSC_SCAN, ir->input_dev->mscbit); ++ ++ memset(ir->input_dev->keybit, 0, sizeof(ir->input_dev->keybit)); ++ ++ for (i = 0; i < ARRAY_SIZE(ir->key_map); i++) { ++ if (ir->key_map[i] > KEY_MAX) ++ ir->key_map[i] = 0; ++ else if (ir->key_map[i] > KEY_RESERVED) ++ set_bit(ir->key_map[i], ir->input_dev->keybit); ++ } ++ ++ ir->input_dev->keycode = ir->key_map; ++ ir->input_dev->keycodesize = sizeof(ir->key_map[0]); ++ ir->input_dev->keycodemax = ARRAY_SIZE(ir->key_map); ++} ++ ++ ++/* called by the input driver after rep[REP_DELAY] ms */ ++static void ir_repeat_key(unsigned long parm) ++{ ++ struct infrared *ir = (struct infrared *) parm; ++ ++ ir->delay_timer_finished = true; ++} ++ ++ ++/* interrupt handler */ ++void saa716x_ir_handler(struct saa716x_dev *saa716x, u32 ir_cmd) ++{ ++ struct infrared *ir = saa716x->ir_priv; ++ ++ if (!ir) ++ return; ++ ++ ir->command = ir_cmd; ++ tasklet_schedule(&ir->tasklet); ++} ++ ++ ++int saa716x_ir_init(struct saa716x_dev *saa716x) ++{ ++ struct input_dev *input_dev; ++ struct infrared *ir; ++ int rc; ++ int i; ++ ++ if (!saa716x) ++ return -ENOMEM; ++ ++ ir = kzalloc(sizeof(struct infrared), GFP_KERNEL); ++ if (!ir) ++ return -ENOMEM; ++ ++ init_timer(&ir->keyup_timer); ++ ir->keyup_timer.function = ir_emit_keyup; ++ ir->keyup_timer.data = (unsigned long) ir; ++ ++ input_dev = input_allocate_device(); ++ if (!input_dev) ++ goto err; ++ ++ ir->input_dev = input_dev; ++ input_dev->name = "TT6400 DVB IR receiver"; ++ snprintf(ir->input_phys, sizeof(ir->input_phys), ++ "pci-%s/ir0", pci_name(saa716x->pdev)); ++ input_dev->phys = ir->input_phys; ++ input_dev->id.bustype = BUS_PCI; ++ input_dev->id.version = 1; ++ input_dev->id.vendor = saa716x->pdev->subsystem_vendor; ++ input_dev->id.product = saa716x->pdev->subsystem_device; ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22) ++ input_dev->dev.parent = &saa716x->pdev->dev; ++#else ++ input_dev->cdev.dev = &saa716x->pdev->dev; ++#endif ++ rc = input_register_device(input_dev); ++ if (rc) ++ goto err; ++ ++ /* TODO: fix setup/keymap */ ++ ir->protocol = IR_RC5; ++ ir->device_mask = 0xffffffff; ++ for (i = 0; i < ARRAY_SIZE(ir->key_map); i++) ++ ir->key_map[i] = i+1; ++ ir_register_keys(ir); ++ ++ /* override repeat timer */ ++ input_dev->timer.function = ir_repeat_key; ++ input_dev->timer.data = (unsigned long) ir; ++ ++ tasklet_init(&ir->tasklet, ir_emit_key, (unsigned long) saa716x); ++ saa716x->ir_priv = ir; ++ ++ return 0; ++ ++err: ++ if (ir->input_dev) ++ input_free_device(ir->input_dev); ++ kfree(ir); ++ return -ENOMEM; ++} ++ ++ ++void saa716x_ir_exit(struct saa716x_dev *saa716x) ++{ ++ struct infrared *ir = saa716x->ir_priv; ++ ++ saa716x->ir_priv = NULL; ++ tasklet_kill(&ir->tasklet); ++ del_timer_sync(&ir->keyup_timer); ++ input_unregister_device(ir->input_dev); ++ kfree(ir); ++} +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_main.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_main.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_ff_main.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_ff_main.c 2013-01-16 10:41:10.917798240 +0100 +@@ -0,0 +1,1535 @@ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_dma_reg.h" ++#include "saa716x_fgpi_reg.h" ++#include "saa716x_greg_reg.h" ++#include "saa716x_phi_reg.h" ++#include "saa716x_spi_reg.h" ++#include "saa716x_msi_reg.h" ++ ++#include "saa716x_vip.h" ++#include "saa716x_aip.h" ++#include "saa716x_msi.h" ++#include "saa716x_adap.h" ++#include "saa716x_gpio.h" ++#include "saa716x_phi.h" ++#include "saa716x_rom.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++#include "saa716x_ff.h" ++#include "saa716x_ff_cmd.h" ++ ++#include "stv6110x.h" ++#include "stv090x.h" ++#include "isl6423.h" ++ ++unsigned int verbose; ++module_param(verbose, int, 0644); ++MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); ++ ++unsigned int int_type; ++module_param(int_type, int, 0644); ++MODULE_PARM_DESC(int_type, "force Interrupt Handler type: 0=INT-A, 1=MSI, 2=MSI-X. default INT-A mode"); ++ ++unsigned int int_count_enable; ++module_param(int_count_enable, int, 0644); ++MODULE_PARM_DESC(int_count_enable, "enable counting of interrupts"); ++ ++#define DRIVER_NAME "SAA716x FF" ++ ++static int saa716x_ff_fpga_init(struct saa716x_dev *saa716x) ++{ ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ int fpgaInit; ++ int fpgaDone; ++ int rounds; ++ int ret; ++ const struct firmware *fw; ++ ++ /* request the FPGA firmware, this will block until someone uploads it */ ++ ret = request_firmware(&fw, "dvb-ttpremium-fpga-01.fw", &saa716x->pdev->dev); ++ if (ret) { ++ if (ret == -ENOENT) { ++ printk(KERN_ERR "dvb-ttpremium: could not load FPGA firmware," ++ " file not found: dvb-ttpremium-fpga-01.fw\n"); ++ printk(KERN_ERR "dvb-ttpremium: usually this should be in " ++ "/usr/lib/hotplug/firmware or /lib/firmware\n"); ++ } else ++ printk(KERN_ERR "dvb-ttpremium: cannot request firmware" ++ " (error %i)\n", ret); ++ return -EINVAL; ++ } ++ ++ /* set FPGA PROGRAMN high */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN, 1); ++ msleep(10); ++ ++ /* set FPGA PROGRAMN low to set it into configuration mode */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN, 0); ++ msleep(10); ++ ++ /* set FPGA PROGRAMN high to start configuration process */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN, 1); ++ ++ rounds = 0; ++ fpgaInit = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_INITN); ++ while (fpgaInit == 0 && rounds < 5000) { ++ //msleep(1); ++ fpgaInit = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_INITN); ++ rounds++; ++ } ++ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA INITN=%d, rounds=%d", ++ fpgaInit, rounds); ++ ++ SAA716x_EPWR(SPI, SPI_CLOCK_COUNTER, 0x08); ++ SAA716x_EPWR(SPI, SPI_CONTROL_REG, SPI_MODE_SELECT); ++ ++ msleep(10); ++ ++ fpgaDone = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_DONE); ++ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA DONE=%d", fpgaDone); ++ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA write bitstream"); ++ saa716x_spi_write(saa716x, fw->data, fw->size); ++ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA write bitstream done"); ++ fpgaDone = saa716x_gpio_read(saa716x, TT_PREMIUM_GPIO_FPGA_DONE); ++ dprintk(SAA716x_INFO, 1, "SAA716x FF FPGA DONE=%d", fpgaDone); ++ ++ msleep(10); ++ ++ release_firmware(fw); ++ ++ if (!fpgaDone) { ++ printk(KERN_ERR "SAA716x FF FPGA is not responding, did you " ++ "connect the power supply?\n"); ++ return -EINVAL; ++ } ++ ++ sti7109->fpga_version = SAA716x_EPRD(PHI_1, FPGA_ADDR_VERSION); ++ printk(KERN_INFO "SAA716x FF FPGA version %X.%02X\n", ++ sti7109->fpga_version >> 8, sti7109->fpga_version & 0xFF); ++ ++ return 0; ++} ++ ++static int saa716x_ff_st7109_init(struct saa716x_dev *saa716x) ++{ ++ int i; ++ int length; ++ u32 requestedBlock; ++ u32 writtenBlock; ++ u32 numBlocks; ++ u32 blockSize; ++ u32 lastBlockSize; ++ u64 startTime; ++ u64 currentTime; ++ u64 waitTime; ++ int ret; ++ const struct firmware *fw; ++ u32 loaderVersion; ++ ++ /* request the st7109 loader, this will block until someone uploads it */ ++ ret = request_firmware(&fw, "dvb-ttpremium-loader-01.fw", &saa716x->pdev->dev); ++ if (ret) { ++ if (ret == -ENOENT) { ++ printk(KERN_ERR "dvb-ttpremium: could not load ST7109 loader," ++ " file not found: dvb-ttpremium-loader-01.fw\n"); ++ printk(KERN_ERR "dvb-ttpremium: usually this should be in " ++ "/usr/lib/hotplug/firmware or /lib/firmware\n"); ++ } else ++ printk(KERN_ERR "dvb-ttpremium: cannot request firmware" ++ " (error %i)\n", ret); ++ return -EINVAL; ++ } ++ loaderVersion = (fw->data[0x1385] << 8) | fw->data[0x1384]; ++ printk(KERN_INFO "SAA716x FF loader version %X.%02X\n", ++ loaderVersion >> 8, loaderVersion & 0xFF); ++ ++ saa716x_phi_write(saa716x, 0, fw->data, fw->size); ++ msleep(10); ++ ++ release_firmware(fw); ++ ++ /* take ST out of reset */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_RESET_BACKEND, 1); ++ ++ startTime = jiffies; ++ waitTime = 0; ++ do { ++ requestedBlock = SAA716x_EPRD(PHI_1, 0x3ffc); ++ if (requestedBlock == 1) ++ break; ++ ++ currentTime = jiffies; ++ waitTime = currentTime - startTime; ++ } while (waitTime < (1 * HZ)); ++ ++ if (waitTime >= 1 * HZ) { ++ dprintk(SAA716x_ERROR, 1, "STi7109 seems to be DEAD!"); ++ return -1; ++ } ++ dprintk(SAA716x_INFO, 1, "STi7109 ready after %llu ticks", waitTime); ++ ++ /* request the st7109 firmware, this will block until someone uploads it */ ++ ret = request_firmware(&fw, "dvb-ttpremium-st7109-01.fw", &saa716x->pdev->dev); ++ if (ret) { ++ if (ret == -ENOENT) { ++ printk(KERN_ERR "dvb-ttpremium: could not load ST7109 firmware," ++ " file not found: dvb-ttpremium-st7109-01.fw\n"); ++ printk(KERN_ERR "dvb-ttpremium: usually this should be in " ++ "/usr/lib/hotplug/firmware or /lib/firmware\n"); ++ } else ++ printk(KERN_ERR "dvb-ttpremium: cannot request firmware" ++ " (error %i)\n", ret); ++ return -EINVAL; ++ } ++ ++ dprintk(SAA716x_INFO, 1, "SAA716x FF download ST7109 firmware"); ++ writtenBlock = 0; ++ blockSize = 0x3c00; ++ length = fw->size; ++ numBlocks = length / blockSize; ++ lastBlockSize = length % blockSize; ++ for (i = 0; i < length; i += blockSize) { ++ writtenBlock++; ++ /* write one block (last may differ from blockSize) */ ++ if (lastBlockSize && writtenBlock == (numBlocks + 1)) ++ saa716x_phi_write(saa716x, 0, &fw->data[i], lastBlockSize); ++ else ++ saa716x_phi_write(saa716x, 0, &fw->data[i], blockSize); ++ ++ SAA716x_EPWR(PHI_1, 0x3ff8, writtenBlock); ++ startTime = jiffies; ++ waitTime = 0; ++ do { ++ requestedBlock = SAA716x_EPRD(PHI_1, 0x3ffc); ++ if (requestedBlock == (writtenBlock + 1)) ++ break; ++ ++ currentTime = jiffies; ++ waitTime = currentTime - startTime; ++ } while (waitTime < (1 * HZ)); ++ ++ if (waitTime >= 1 * HZ) { ++ dprintk(SAA716x_ERROR, 1, "STi7109 seems to be DEAD!"); ++ release_firmware(fw); ++ return -1; ++ } ++ } ++ ++ /* disable frontend support through ST firmware */ ++ SAA716x_EPWR(PHI_1, 0x3ff4, 1); ++ ++ /* indicate end of transfer */ ++ writtenBlock++; ++ writtenBlock |= 0x80000000; ++ SAA716x_EPWR(PHI_1, 0x3ff8, writtenBlock); ++ ++ dprintk(SAA716x_INFO, 1, "SAA716x FF download ST7109 firmware done"); ++ ++ release_firmware(fw); ++ ++ return 0; ++} ++ ++static int saa716x_usercopy(struct dvb_device *dvbdev, ++ unsigned int cmd, unsigned long arg, ++ int (*func)(struct dvb_device *dvbdev, ++ unsigned int cmd, void *arg)) ++{ ++ char sbuf[128]; ++ void *mbuf = NULL; ++ void *parg = NULL; ++ int err = -EINVAL; ++ ++ /* Copy arguments into temp kernel buffer */ ++ switch (_IOC_DIR(cmd)) { ++ case _IOC_NONE: ++ /* ++ * For this command, the pointer is actually an integer ++ * argument. ++ */ ++ parg = (void *) arg; ++ break; ++ case _IOC_READ: /* some v4l ioctls are marked wrong ... */ ++ case _IOC_WRITE: ++ case (_IOC_WRITE | _IOC_READ): ++ if (_IOC_SIZE(cmd) <= sizeof(sbuf)) { ++ parg = sbuf; ++ } else { ++ /* too big to allocate from stack */ ++ mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL); ++ if (NULL == mbuf) ++ return -ENOMEM; ++ parg = mbuf; ++ } ++ ++ err = -EFAULT; ++ if (copy_from_user(parg, (void __user *)arg, _IOC_SIZE(cmd))) ++ goto out; ++ break; ++ } ++ ++ /* call driver */ ++ if ((err = func(dvbdev, cmd, parg)) == -ENOIOCTLCMD) ++ err = -EINVAL; ++ ++ if (err < 0) ++ goto out; ++ ++ /* Copy results into user buffer */ ++ switch (_IOC_DIR(cmd)) ++ { ++ case _IOC_READ: ++ case (_IOC_WRITE | _IOC_READ): ++ if (copy_to_user((void __user *)arg, parg, _IOC_SIZE(cmd))) ++ err = -EFAULT; ++ break; ++ } ++ ++out: ++ kfree(mbuf); ++ return err; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) ++static int dvb_osd_ioctl(struct inode *inode, struct file *file, ++#else ++static long dvb_osd_ioctl(struct file *file, ++#endif ++ unsigned int cmd, unsigned long arg) ++{ ++ struct dvb_device *dvbdev = file->private_data; ++ struct sti7109_dev *sti7109 = dvbdev->priv; ++ int err = -EINVAL; ++ ++ if (!dvbdev) ++ return -ENODEV; ++ ++ if (cmd == OSD_RAW_CMD) { ++ osd_raw_cmd_t raw_cmd; ++ u8 hdr[4]; ++ ++ err = -EFAULT; ++ if (copy_from_user(&raw_cmd, (void __user *)arg, ++ _IOC_SIZE(cmd))) ++ goto out; ++ ++ if (copy_from_user(hdr, (void __user *)raw_cmd.cmd_data, 4)) ++ goto out; ++ ++ if (hdr[3] == 4) ++ err = sti7109_raw_osd_cmd(sti7109, &raw_cmd); ++ else ++ err = sti7109_raw_cmd(sti7109, &raw_cmd); ++ ++ if (err) ++ goto out; ++ ++ if (copy_to_user((void __user *)arg, &raw_cmd, _IOC_SIZE(cmd))) ++ err = -EFAULT; ++ } ++ else if (cmd == OSD_RAW_DATA) { ++ osd_raw_data_t raw_data; ++ ++ err = -EFAULT; ++ if (copy_from_user(&raw_data, (void __user *)arg, ++ _IOC_SIZE(cmd))) ++ goto out; ++ ++ err = sti7109_raw_data(sti7109, &raw_data); ++ if (err) ++ goto out; ++ ++ if (copy_to_user((void __user *)arg, &raw_data, _IOC_SIZE(cmd))) ++ err = -EFAULT; ++ } ++ ++out: ++ return err; ++} ++ ++static struct file_operations dvb_osd_fops = { ++ .owner = THIS_MODULE, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) ++ .ioctl = dvb_osd_ioctl, ++#else ++ .unlocked_ioctl = dvb_osd_ioctl, ++#endif ++ .open = dvb_generic_open, ++ .release = dvb_generic_release, ++}; ++ ++static struct dvb_device dvbdev_osd = { ++ .priv = NULL, ++ .users = 2, ++ .writers = 2, ++ .fops = &dvb_osd_fops, ++ .kernel_ioctl = NULL, ++}; ++ ++static int saa716x_ff_osd_exit(struct saa716x_dev *saa716x) ++{ ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ dvb_unregister_device(sti7109->osd_dev); ++ return 0; ++} ++ ++static int saa716x_ff_osd_init(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ dvb_register_device(&saa716x_adap->dvb_adapter, ++ &sti7109->osd_dev, ++ &dvbdev_osd, ++ sti7109, ++ DVB_DEVICE_OSD); ++ ++ return 0; ++} ++ ++static int do_dvb_audio_ioctl(struct dvb_device *dvbdev, ++ unsigned int cmd, void *parg) ++{ ++ struct sti7109_dev *sti7109 = dvbdev->priv; ++ //struct saa716x_dev *saa716x = sti7109->dev; ++ int ret = 0; ++ ++ switch (cmd) { ++ case AUDIO_GET_PTS: ++ { ++ *(u64 *)parg = sti7109->audio_pts; ++ break; ++ } ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) ++static int dvb_audio_ioctl(struct inode *inode, struct file *file, ++#else ++static long dvb_audio_ioctl(struct file *file, ++#endif ++ unsigned int cmd, unsigned long arg) ++{ ++ struct dvb_device *dvbdev = file->private_data; ++ ++ if (!dvbdev) ++ return -ENODEV; ++ ++ return saa716x_usercopy (dvbdev, cmd, arg, do_dvb_audio_ioctl); ++} ++ ++static struct file_operations dvb_audio_fops = { ++ .owner = THIS_MODULE, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) ++ .ioctl = dvb_audio_ioctl, ++#else ++ .unlocked_ioctl = dvb_audio_ioctl, ++#endif ++ .open = dvb_generic_open, ++ .release = dvb_generic_release, ++}; ++ ++static struct dvb_device dvbdev_audio = { ++ .priv = NULL, ++ .users = 1, ++ .writers = 1, ++ .fops = &dvb_audio_fops, ++ .kernel_ioctl = NULL, ++}; ++ ++static int saa716x_ff_audio_exit(struct saa716x_dev *saa716x) ++{ ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ dvb_unregister_device(sti7109->audio_dev); ++ return 0; ++} ++ ++static int saa716x_ff_audio_init(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ dvb_register_device(&saa716x_adap->dvb_adapter, ++ &sti7109->audio_dev, ++ &dvbdev_audio, ++ sti7109, ++ DVB_DEVICE_AUDIO); ++ ++ return 0; ++} ++ ++static void fifo_worker(unsigned long data) ++{ ++ struct saa716x_dev *saa716x = (struct saa716x_dev *) data; ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ u32 fifoCtrl; ++ u32 fifoStat; ++ u16 fifoSize; ++ u16 fifoUsage; ++ u16 fifoFree; ++ int len; ++ ++ fifoCtrl = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_CTRL); ++ fifoStat = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_STAT); ++ fifoSize = (u16) (fifoStat >> 16); ++ fifoUsage = (u16) fifoStat; ++ fifoFree = fifoSize - fifoUsage; ++ spin_lock(&sti7109->tsout.lock); ++ len = dvb_ringbuffer_avail(&sti7109->tsout); ++ if (len > fifoFree) ++ len = fifoFree; ++ if (len >= TS_SIZE) ++ { ++ while (len >= TS_SIZE) ++ { ++ dvb_ringbuffer_read(&sti7109->tsout, sti7109->tsbuf, (size_t) TS_SIZE); ++ saa716x_phi_write_fifo(saa716x, sti7109->tsbuf, TS_SIZE); ++ len -= TS_SIZE; ++ } ++ wake_up(&sti7109->tsout.queue); ++ fifoCtrl |= 0x4; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, fifoCtrl); ++ } ++ spin_unlock(&sti7109->tsout.lock); ++} ++ ++#define FREE_COND_TS (dvb_ringbuffer_free(&sti7109->tsout) >= TS_SIZE) ++ ++static ssize_t dvb_video_write(struct file *file, const char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct dvb_device *dvbdev = file->private_data; ++ struct sti7109_dev *sti7109 = dvbdev->priv; ++ struct saa716x_dev *saa716x = sti7109->dev; ++ unsigned long todo = count; ++ ++ if ((file->f_flags & O_ACCMODE) == O_RDONLY) ++ return -EPERM; ++/* ++ if (av7110->videostate.stream_source != VIDEO_SOURCE_MEMORY) ++ return -EPERM; ++*/ ++ if ((file->f_flags & O_NONBLOCK) && !FREE_COND_TS) ++ return -EWOULDBLOCK; ++ ++ while (todo >= TS_SIZE) { ++ if (!FREE_COND_TS) { ++ if (file->f_flags & O_NONBLOCK) ++ break; ++ if (wait_event_interruptible(sti7109->tsout.queue, FREE_COND_TS)) ++ break; ++ } ++ dvb_ringbuffer_write(&sti7109->tsout, buf, TS_SIZE); ++ todo -= TS_SIZE; ++ buf += TS_SIZE; ++ } ++ ++ if (count > todo) { ++ u32 fifoCtrl; ++ ++ fifoCtrl = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_CTRL); ++ fifoCtrl |= 0x4; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, fifoCtrl); ++ } ++ ++ return count - todo; ++} ++ ++static unsigned int dvb_video_poll(struct file *file, poll_table *wait) ++{ ++ struct dvb_device *dvbdev = file->private_data; ++ struct sti7109_dev *sti7109 = dvbdev->priv; ++ unsigned int mask = 0; ++ ++ if ((file->f_flags & O_ACCMODE) != O_RDONLY) ++ poll_wait(file, &sti7109->tsout.queue, wait); ++ ++ if ((file->f_flags & O_ACCMODE) != O_RDONLY) { ++ if (1/*sti7109->playing*/) { ++ if (FREE_COND_TS) ++ mask |= (POLLOUT | POLLWRNORM); ++ } else /* if not playing: may play if asked for */ ++ mask |= (POLLOUT | POLLWRNORM); ++ } ++ ++ return mask; ++} ++ ++static int do_dvb_video_ioctl(struct dvb_device *dvbdev, ++ unsigned int cmd, void *parg) ++{ ++ struct sti7109_dev *sti7109 = dvbdev->priv; ++ struct saa716x_dev *saa716x = sti7109->dev; ++ int ret = 0; ++ ++ switch (cmd) { ++ case VIDEO_SELECT_SOURCE: ++ { ++ video_stream_source_t stream_source; ++ ++ stream_source = (video_stream_source_t) parg; ++ if (stream_source == VIDEO_SOURCE_DEMUX) { ++ /* stop and reset FIFO 1 */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, 1); ++ } ++ else { ++ dvb_ringbuffer_flush_spinlock_wakeup(&sti7109->tsout); ++ /* reset FIFO 1 */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, 1); ++ /* start FIFO 1 */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, 2); ++ } ++ break; ++ } ++ case VIDEO_CLEAR_BUFFER: ++ { ++ dvb_ringbuffer_flush_spinlock_wakeup(&sti7109->tsout); ++ break; ++ } ++ case VIDEO_GET_PTS: ++ { ++ *(u64 *)parg = sti7109->video_pts; ++ break; ++ } ++ case VIDEO_GET_SIZE: ++ { ++ ret = sti7109_cmd_get_video_format(sti7109, (video_size_t *) parg); ++ break; ++ } ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) ++static int dvb_video_ioctl(struct inode *inode, struct file *file, ++#else ++static long dvb_video_ioctl(struct file *file, ++#endif ++ unsigned int cmd, unsigned long arg) ++{ ++ struct dvb_device *dvbdev = file->private_data; ++ ++ if (!dvbdev) ++ return -ENODEV; ++ ++ return saa716x_usercopy (dvbdev, cmd, arg, do_dvb_video_ioctl); ++} ++ ++static struct file_operations dvb_video_fops = { ++ .owner = THIS_MODULE, ++ .write = dvb_video_write, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 36) && !defined(EXPERIMENTAL_TREE) ++ .ioctl = dvb_video_ioctl, ++#else ++ .unlocked_ioctl = dvb_video_ioctl, ++#endif ++ .open = dvb_generic_open, ++ .release = dvb_generic_release, ++ .poll = dvb_video_poll, ++}; ++ ++static struct dvb_device dvbdev_video = { ++ .priv = NULL, ++ .users = 1, ++ .writers = 1, ++ .fops = &dvb_video_fops, ++ .kernel_ioctl = NULL, ++}; ++ ++static int saa716x_ff_video_exit(struct saa716x_dev *saa716x) ++{ ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ tasklet_kill(&sti7109->fifo_tasklet); ++ dvb_unregister_device(sti7109->video_dev); ++ return 0; ++} ++ ++static int saa716x_ff_video_init(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_adapter *saa716x_adap = saa716x->saa716x_adap; ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ dvb_ringbuffer_init(&sti7109->tsout, sti7109->iobuf, TSOUT_LEN); ++ sti7109->tsbuf = (u8 *) (sti7109->iobuf + TSOUT_LEN); ++ ++ dvb_register_device(&saa716x_adap->dvb_adapter, ++ &sti7109->video_dev, ++ &dvbdev_video, ++ sti7109, ++ DVB_DEVICE_VIDEO); ++ ++ tasklet_init(&sti7109->fifo_tasklet, fifo_worker, ++ (unsigned long)saa716x); ++ ++ return 0; ++} ++ ++static int saa716x_ff_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) ++{ ++ struct saa716x_dev *saa716x; ++ struct sti7109_dev *sti7109; ++ int err = 0; ++ u32 value; ++ unsigned long timeout; ++ u32 fw_version; ++ ++ saa716x = kzalloc(sizeof (struct saa716x_dev), GFP_KERNEL); ++ if (saa716x == NULL) { ++ printk(KERN_ERR "saa716x_budget_pci_probe ERROR: out of memory\n"); ++ err = -ENOMEM; ++ goto fail0; ++ } ++ ++ saa716x->verbose = verbose; ++ saa716x->int_type = int_type; ++ saa716x->pdev = pdev; ++ saa716x->config = (struct saa716x_config *) pci_id->driver_data; ++ ++ err = saa716x_pci_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x PCI Initialization failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_cgu_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x CGU Init failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_core_boot(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x Core Boot failed"); ++ goto fail2; ++ } ++ dprintk(SAA716x_DEBUG, 1, "SAA716x Core Boot Success"); ++ ++ err = saa716x_msi_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x MSI Init failed"); ++ goto fail2; ++ } ++ ++ err = saa716x_jetpack_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x Jetpack core initialization failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_i2c_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x I2C Initialization failed"); ++ goto fail3; ++ } ++ ++ err = saa716x_phi_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x PHI Initialization failed"); ++ goto fail3; ++ } ++ ++ saa716x_gpio_init(saa716x); ++ ++ /* prepare the sti7109 device struct */ ++ sti7109 = kzalloc(sizeof(struct sti7109_dev), GFP_KERNEL); ++ if (!sti7109) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x: out of memory"); ++ goto fail3; ++ } ++ ++ sti7109->dev = saa716x; ++ ++ sti7109->iobuf = vmalloc(TSOUT_LEN + TSBUF_LEN + MAX_DATA_LEN); ++ if (!sti7109->iobuf) ++ goto fail4; ++ ++ sti7109_cmd_init(sti7109); ++ ++ sti7109->int_count_enable = int_count_enable; ++ sti7109->total_int_count = 0; ++ memset(sti7109->fgpi_int_count, 0, sizeof(sti7109->fgpi_int_count)); ++ memset(sti7109->i2c_int_count, 0, sizeof(sti7109->i2c_int_count)); ++ sti7109->ext_int_total_count = 0; ++ memset(sti7109->ext_int_source_count, 0, sizeof(sti7109->ext_int_source_count)); ++ sti7109->last_int_ticks = jiffies; ++ ++ saa716x->priv = sti7109; ++ ++ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE); ++ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_RESET_BACKEND); ++ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_FPGA_CS0); ++ saa716x_gpio_set_mode(saa716x, TT_PREMIUM_GPIO_FPGA_CS0, 1); ++ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_FPGA_CS1); ++ saa716x_gpio_set_mode(saa716x, TT_PREMIUM_GPIO_FPGA_CS1, 1); ++ saa716x_gpio_set_output(saa716x, TT_PREMIUM_GPIO_FPGA_PROGRAMN); ++ saa716x_gpio_set_input(saa716x, TT_PREMIUM_GPIO_FPGA_DONE); ++ saa716x_gpio_set_input(saa716x, TT_PREMIUM_GPIO_FPGA_INITN); ++ ++ /* hold ST in reset */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_RESET_BACKEND, 0); ++ ++ /* enable board power */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE, 1); ++ msleep(100); ++ ++ err = saa716x_ff_fpga_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x FF FPGA Initialization failed"); ++ goto fail5; ++ } ++ ++ /* configure TS muxer */ ++ if (sti7109->fpga_version < 0x110) { ++ /* select FIFO 1 for TS mux 3 */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_TSR_MUX3, 4); ++ } else { ++ /* select FIFO 1 for TS mux 3 */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_TSR_MUX3, 1); ++ } ++ ++ /* enable interrupts from ST7109 -> PC */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICTRL, 0x3); ++ ++ value = SAA716x_EPRD(MSI, MSI_CONFIG33); ++ value &= 0xFCFFFFFF; ++ value |= MSI_INT_POL_EDGE_FALL; ++ SAA716x_EPWR(MSI, MSI_CONFIG33, value); ++ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, MSI_INT_EXTINT_0); ++ ++ /* enable tuner reset */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_PIO_CTRL, 0); ++ msleep(50); ++ /* disable tuner reset */ ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_PIO_CTRL, 1); ++ ++ err = saa716x_ff_st7109_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x FF STi7109 initialization failed"); ++ goto fail5; ++ } ++ ++ err = saa716x_dump_eeprom(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); ++ } ++ ++ err = saa716x_eeprom_data(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); ++ } ++ ++ /* enable FGPI2 and FGPI3 for TS inputs */ ++ SAA716x_EPWR(GREG, GREG_VI_CTRL, 0x0689F04); ++ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, 0x280); ++ ++ err = saa716x_dvb_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x DVB initialization failed"); ++ goto fail6; ++ } ++ ++ /* wait a maximum of 10 seconds for the STi7109 to boot */ ++ timeout = 10 * HZ; ++ timeout = wait_event_interruptible_timeout(sti7109->boot_finish_wq, ++ sti7109->boot_finished == 1, ++ timeout); ++ ++ if (timeout == -ERESTARTSYS || sti7109->boot_finished == 0) { ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ goto fail6; ++ } ++ dprintk(SAA716x_ERROR, 1, "timed out waiting for boot finish"); ++ err = -1; ++ goto fail6; ++ } ++ dprintk(SAA716x_INFO, 1, "STi7109 finished booting"); ++ ++ err = saa716x_ff_video_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x FF VIDEO initialization failed"); ++ goto fail7; ++ } ++ ++ err = saa716x_ff_audio_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x FF AUDIO initialization failed"); ++ goto fail8; ++ } ++ ++ err = saa716x_ff_osd_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x FF OSD initialization failed"); ++ goto fail9; ++ } ++ ++ err = sti7109_cmd_get_fw_version(sti7109, &fw_version); ++ if (!err) { ++ printk(KERN_INFO "SAA716x FF firmware version %X.%X.%X\n", ++ (fw_version >> 16) & 0xFF, (fw_version >> 8) & 0xFF, ++ fw_version & 0xFF); ++ } ++ ++ err = saa716x_ir_init(saa716x); ++ if (err) ++ goto fail9; ++ ++ return 0; ++ ++fail9: ++ saa716x_ff_osd_exit(saa716x); ++fail8: ++ saa716x_ff_audio_exit(saa716x); ++fail7: ++ saa716x_ff_video_exit(saa716x); ++fail6: ++ saa716x_dvb_exit(saa716x); ++fail5: ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, MSI_INT_EXTINT_0); ++ ++ /* disable board power */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE, 0); ++ ++ vfree(sti7109->iobuf); ++fail4: ++ kfree(sti7109); ++fail3: ++ saa716x_i2c_exit(saa716x); ++fail2: ++ saa716x_pci_exit(saa716x); ++fail1: ++ kfree(saa716x); ++fail0: ++ return err; ++} ++ ++static void saa716x_ff_pci_remove(struct pci_dev *pdev) ++{ ++ struct saa716x_dev *saa716x = pci_get_drvdata(pdev); ++ struct sti7109_dev *sti7109 = saa716x->priv; ++ ++ saa716x_ir_exit(saa716x); ++ ++ saa716x_ff_osd_exit(saa716x); ++ ++ saa716x_ff_audio_exit(saa716x); ++ ++ saa716x_ff_video_exit(saa716x); ++ ++ saa716x_dvb_exit(saa716x); ++ ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, MSI_INT_EXTINT_0); ++ ++ /* disable board power */ ++ saa716x_gpio_write(saa716x, TT_PREMIUM_GPIO_POWER_ENABLE, 0); ++ ++ vfree(sti7109->iobuf); ++ ++ saa716x->priv = NULL; ++ kfree(sti7109); ++ ++ saa716x_i2c_exit(saa716x); ++ saa716x_pci_exit(saa716x); ++ kfree(saa716x); ++} ++ ++static void demux_worker(unsigned long data) ++{ ++ struct saa716x_fgpi_stream_port *fgpi_entry = (struct saa716x_fgpi_stream_port *)data; ++ struct saa716x_dev *saa716x = fgpi_entry->saa716x; ++ struct dvb_demux *demux; ++ u32 fgpi_index; ++ u32 i; ++ u32 write_index; ++ ++ fgpi_index = fgpi_entry->dma_channel - 6; ++ demux = NULL; ++ for (i = 0; i < saa716x->config->adapters; i++) { ++ if (saa716x->config->adap_config[i].ts_port == fgpi_index) { ++ demux = &saa716x->saa716x_adap[i].demux; ++ break; ++ } ++ } ++ if (demux == NULL) { ++ printk(KERN_ERR "%s: unexpected channel %u\n", ++ __func__, fgpi_entry->dma_channel); ++ return; ++ } ++ ++ write_index = saa716x_fgpi_get_write_index(saa716x, fgpi_index); ++ if (write_index < 0) ++ return; ++ ++ dprintk(SAA716x_DEBUG, 1, "dma buffer = %d", write_index); ++ ++ if (write_index == fgpi_entry->read_index) { ++ printk(KERN_DEBUG "%s: called but nothing to do\n", __func__); ++ return; ++ } ++ ++ do { ++ u8 *data = (u8 *)fgpi_entry->dma_buf[fgpi_entry->read_index].mem_virt; ++ ++ pci_dma_sync_sg_for_cpu(saa716x->pdev, ++ fgpi_entry->dma_buf[fgpi_entry->read_index].sg_list, ++ fgpi_entry->dma_buf[fgpi_entry->read_index].list_len, ++ PCI_DMA_FROMDEVICE); ++ ++ dvb_dmx_swfilter(demux, data, 348 * 188); ++ ++ fgpi_entry->read_index = (fgpi_entry->read_index + 1) & 7; ++ } while (write_index != fgpi_entry->read_index); ++} ++ ++static irqreturn_t saa716x_ff_pci_irq(int irq, void *dev_id) ++{ ++ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; ++ struct sti7109_dev *sti7109; ++ u32 msiStatusL; ++ u32 msiStatusH; ++ u32 phiISR; ++ ++ if (unlikely(saa716x == NULL)) { ++ printk("%s: saa716x=NULL", __func__); ++ return IRQ_NONE; ++ } ++ sti7109 = saa716x->priv; ++ if (unlikely(sti7109 == NULL)) { ++ printk("%s: sti7109=NULL", __func__); ++ return IRQ_NONE; ++ } ++ if (sti7109->int_count_enable) ++ sti7109->total_int_count++; ++#if 0 ++ dprintk(SAA716x_DEBUG, 1, "VI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", ++ SAA716x_EPRD(VI0, INT_STATUS), ++ SAA716x_EPRD(VI1, INT_STATUS), ++ SAA716x_EPRD(VI0, INT_ENABLE), ++ SAA716x_EPRD(VI1, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", ++ SAA716x_EPRD(FGPI0, INT_STATUS), ++ SAA716x_EPRD(FGPI1, INT_STATUS), ++ SAA716x_EPRD(FGPI0, INT_ENABLE), ++ SAA716x_EPRD(FGPI0, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 2=<%02x> 3=<%02x>, CTL 2=<%02x> 3=<%02x>", ++ SAA716x_EPRD(FGPI2, INT_STATUS), ++ SAA716x_EPRD(FGPI3, INT_STATUS), ++ SAA716x_EPRD(FGPI2, INT_ENABLE), ++ SAA716x_EPRD(FGPI3, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "AI STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(AI0, AI_STATUS), ++ SAA716x_EPRD(AI1, AI_STATUS), ++ SAA716x_EPRD(AI0, AI_CTL), ++ SAA716x_EPRD(AI1, AI_CTL)); ++ ++ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", ++ SAA716x_EPRD(MSI, MSI_INT_STATUS_L), ++ SAA716x_EPRD(MSI, MSI_INT_STATUS_H), ++ SAA716x_EPRD(MSI, MSI_INT_ENA_L), ++ SAA716x_EPRD(MSI, MSI_INT_ENA_H)); ++ ++ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(I2C_A, INT_STATUS), ++ SAA716x_EPRD(I2C_B, INT_STATUS), ++ SAA716x_EPRD(I2C_A, INT_ENABLE), ++ SAA716x_EPRD(I2C_B, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "DCS STAT=<%02x>, CTL=<%02x>", ++ SAA716x_EPRD(DCS, DCSC_INT_STATUS), ++ SAA716x_EPRD(DCS, DCSC_INT_ENABLE)); ++#endif ++ msiStatusL = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, msiStatusL); ++ msiStatusH = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, msiStatusH); ++ ++ if (msiStatusL) { ++ if (msiStatusL & MSI_INT_TAGACK_FGPI_2) { ++ if (sti7109->int_count_enable) ++ sti7109->fgpi_int_count[0]++; ++ tasklet_schedule(&saa716x->fgpi[2].tasklet); ++ } ++ if (msiStatusL & MSI_INT_TAGACK_FGPI_3) { ++ if (sti7109->int_count_enable) ++ sti7109->fgpi_int_count[1]++; ++ tasklet_schedule(&saa716x->fgpi[3].tasklet); ++ } ++ } ++ if (msiStatusH) { ++ //dprintk(SAA716x_INFO, 1, "msiStatusH: %08X", msiStatusH); ++ } ++ ++ if (msiStatusH & MSI_INT_I2CINT_0) { ++ if (sti7109->int_count_enable) ++ sti7109->i2c_int_count[0]++; ++ saa716x->i2c[0].i2c_op = 0; ++ wake_up(&saa716x->i2c[0].i2c_wq); ++ } ++ if (msiStatusH & MSI_INT_I2CINT_1) { ++ if (sti7109->int_count_enable) ++ sti7109->i2c_int_count[1]++; ++ saa716x->i2c[1].i2c_op = 0; ++ wake_up(&saa716x->i2c[1].i2c_wq); ++ } ++ ++ if (msiStatusH & MSI_INT_EXTINT_0) { ++ ++ phiISR = SAA716x_EPRD(PHI_1, FPGA_ADDR_EMI_ISR); ++ //dprintk(SAA716x_INFO, 1, "interrupt status register: %08X", phiISR); ++ ++ if (sti7109->int_count_enable) { ++ int i; ++ sti7109->ext_int_total_count++; ++ for (i = 0; i < 16; i++) ++ if (phiISR & (1 << i)) ++ sti7109->ext_int_source_count[i]++; ++ } ++ ++ if (phiISR & ISR_CMD_MASK) { ++ ++ u32 value; ++ u32 length; ++ /*dprintk(SAA716x_INFO, 1, "CMD interrupt source");*/ ++ ++ value = SAA716x_EPRD(PHI_1, ADDR_CMD_DATA); ++ value = __cpu_to_be32(value); ++ length = (value >> 16) + 2; ++ ++ /*dprintk(SAA716x_INFO, 1, "CMD length: %d", length);*/ ++ ++ if (length > MAX_RESULT_LEN) { ++ dprintk(SAA716x_ERROR, 1, "CMD length %d > %d", length, MAX_RESULT_LEN); ++ length = MAX_RESULT_LEN; ++ } ++ ++ saa716x_phi_read(saa716x, ADDR_CMD_DATA, sti7109->result_data, length); ++ sti7109->result_len = length; ++ sti7109->result_avail = 1; ++ wake_up(&sti7109->result_avail_wq); ++ ++ phiISR &= ~ISR_CMD_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_CMD_MASK); ++ } ++ ++ if (phiISR & ISR_READY_MASK) { ++ /*dprintk(SAA716x_INFO, 1, "READY interrupt source");*/ ++ sti7109->cmd_ready = 1; ++ wake_up(&sti7109->cmd_ready_wq); ++ phiISR &= ~ISR_READY_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_READY_MASK); ++ } ++ ++ if (phiISR & ISR_OSD_CMD_MASK) { ++ ++ u32 value; ++ u32 length; ++ /*dprintk(SAA716x_INFO, 1, "OSD CMD interrupt source");*/ ++ ++ value = SAA716x_EPRD(PHI_1, ADDR_OSD_CMD_DATA); ++ value = __cpu_to_be32(value); ++ length = (value >> 16) + 2; ++ ++ /*dprintk(SAA716x_INFO, 1, "OSD CMD length: %d", length);*/ ++ ++ if (length > MAX_RESULT_LEN) { ++ dprintk(SAA716x_ERROR, 1, "OSD CMD length %d > %d", length, MAX_RESULT_LEN); ++ length = MAX_RESULT_LEN; ++ } ++ ++ saa716x_phi_read(saa716x, ADDR_OSD_CMD_DATA, sti7109->osd_result_data, length); ++ sti7109->osd_result_len = length; ++ sti7109->osd_result_avail = 1; ++ wake_up(&sti7109->osd_result_avail_wq); ++ ++ phiISR &= ~ISR_OSD_CMD_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_OSD_CMD_MASK); ++ } ++ ++ if (phiISR & ISR_OSD_READY_MASK) { ++ /*dprintk(SAA716x_INFO, 1, "OSD_READY interrupt source");*/ ++ sti7109->osd_cmd_ready = 1; ++ wake_up(&sti7109->osd_cmd_ready_wq); ++ phiISR &= ~ISR_OSD_READY_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_OSD_READY_MASK); ++ } ++ ++ if (phiISR & ISR_BLOCK_MASK) { ++ /*dprintk(SAA716x_INFO, 1, "BLOCK interrupt source");*/ ++ sti7109->block_done = 1; ++ wake_up(&sti7109->block_done_wq); ++ phiISR &= ~ISR_BLOCK_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_BLOCK_MASK); ++ } ++ ++ if (phiISR & ISR_DATA_MASK) { ++ /*dprintk(SAA716x_INFO, 1, "DATA interrupt source");*/ ++ sti7109->data_ready = 1; ++ wake_up(&sti7109->data_ready_wq); ++ phiISR &= ~ISR_DATA_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_DATA_MASK); ++ } ++ ++ if (phiISR & ISR_BOOT_FINISH_MASK) { ++ /*dprintk(SAA716x_INFO, 1, "BOOT FINISH interrupt source");*/ ++ sti7109->boot_finished = 1; ++ wake_up(&sti7109->boot_finish_wq); ++ phiISR &= ~ISR_BOOT_FINISH_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_BOOT_FINISH_MASK); ++ } ++ ++ if (phiISR & ISR_AUDIO_PTS_MASK) { ++ u8 data[8]; ++ ++ saa716x_phi_read(saa716x, ADDR_AUDIO_PTS, data, 8); ++ sti7109->audio_pts = (((u64) data[3] & 0x01) << 32) ++ | ((u64) data[4] << 24) ++ | ((u64) data[5] << 16) ++ | ((u64) data[6] << 8) ++ | ((u64) data[7]); ++ ++ phiISR &= ~ISR_AUDIO_PTS_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_AUDIO_PTS_MASK); ++ ++ /*dprintk(SAA716x_INFO, 1, "AUDIO PTS: %llX", sti7109->audio_pts);*/ ++ } ++ ++ if (phiISR & ISR_VIDEO_PTS_MASK) { ++ u8 data[8]; ++ ++ saa716x_phi_read(saa716x, ADDR_VIDEO_PTS, data, 8); ++ sti7109->video_pts = (((u64) data[3] & 0x01) << 32) ++ | ((u64) data[4] << 24) ++ | ((u64) data[5] << 16) ++ | ((u64) data[6] << 8) ++ | ((u64) data[7]); ++ ++ phiISR &= ~ISR_VIDEO_PTS_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_VIDEO_PTS_MASK); ++ ++ /*dprintk(SAA716x_INFO, 1, "VIDEO PTS: %llX", sti7109->video_pts);*/ ++ } ++ ++ if (phiISR & ISR_CURRENT_STC_MASK) { ++ u8 data[8]; ++ ++ saa716x_phi_read(saa716x, ADDR_CURRENT_STC, data, 8); ++ sti7109->current_stc = (((u64) data[3] & 0x01) << 32) ++ | ((u64) data[4] << 24) ++ | ((u64) data[5] << 16) ++ | ((u64) data[6] << 8) ++ | ((u64) data[7]); ++ ++ phiISR &= ~ISR_CURRENT_STC_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_CURRENT_STC_MASK); ++ ++ /*dprintk(SAA716x_INFO, 1, "CURRENT STC: %llu", sti7109->current_stc);*/ ++ } ++ ++ if (phiISR & ISR_REMOTE_EVENT_MASK) { ++ u8 data[4]; ++ u32 remote_event; ++ ++ saa716x_phi_read(saa716x, ADDR_REMOTE_EVENT, data, 4); ++ remote_event = (data[3] << 24) ++ | (data[2] << 16) ++ | (data[1] << 8) ++ | (data[0]); ++ memset(data, 0, sizeof(data)); ++ saa716x_phi_write(saa716x, ADDR_REMOTE_EVENT, data, 4); ++ ++ phiISR &= ~ISR_REMOTE_EVENT_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_REMOTE_EVENT_MASK); ++ ++ if (remote_event == 0) { ++ dprintk(SAA716x_ERROR, 1, "REMOTE EVENT: %X ignored", remote_event); ++ } else { ++ dprintk(SAA716x_INFO, 1, "REMOTE EVENT: %X", remote_event); ++ saa716x_ir_handler(saa716x, remote_event); ++ } ++ } ++ ++ if (phiISR & ISR_DVO_FORMAT_MASK) { ++ u8 data[4]; ++ u32 format; ++ ++ saa716x_phi_read(saa716x, ADDR_DVO_FORMAT, data, 4); ++ format = (data[0] << 24) ++ | (data[1] << 16) ++ | (data[2] << 8) ++ | (data[3]); ++ ++ phiISR &= ~ISR_DVO_FORMAT_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_DVO_FORMAT_MASK); ++ ++ dprintk(SAA716x_INFO, 1, "DVO FORMAT CHANGE: %u", format); ++ } ++ ++ if (phiISR & ISR_LOG_MESSAGE_MASK) { ++ char message[SIZE_LOG_MESSAGE_DATA]; ++ ++ saa716x_phi_read(saa716x, ADDR_LOG_MESSAGE, message, ++ SIZE_LOG_MESSAGE_DATA); ++ ++ phiISR &= ~ISR_LOG_MESSAGE_MASK; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, ISR_LOG_MESSAGE_MASK); ++ ++ dprintk(SAA716x_INFO, 1, "LOG MESSAGE: %.*s", ++ SIZE_LOG_MESSAGE_DATA, message); ++ } ++ ++ if (phiISR & ISR_FIFO1_EMPTY_MASK) { ++ u32 fifoCtrl; ++ ++ /*dprintk(SAA716x_INFO, 1, "FIFO EMPTY interrupt source");*/ ++ fifoCtrl = SAA716x_EPRD(PHI_1, FPGA_ADDR_FIFO_CTRL); ++ fifoCtrl &= ~0x4; ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_FIFO_CTRL, fifoCtrl); ++ tasklet_schedule(&sti7109->fifo_tasklet); ++ phiISR &= ~ISR_FIFO1_EMPTY_MASK; ++ } ++ ++ if (phiISR) { ++ dprintk(SAA716x_INFO, 1, "unknown interrupt source"); ++ SAA716x_EPWR(PHI_1, FPGA_ADDR_EMI_ICLR, phiISR); ++ } ++ } ++ ++ if (sti7109->int_count_enable) { ++ if (jiffies - sti7109->last_int_ticks >= HZ) { ++ dprintk(SAA716x_INFO, 1, "int count: t: %d, f:%d %d, i:%d %d," ++ "e: %d (%d %d %d %d %d %d %d %d %d %d %d %d %d %d %d %d)", ++ sti7109->total_int_count, ++ sti7109->fgpi_int_count[0], ++ sti7109->fgpi_int_count[1], ++ sti7109->i2c_int_count[0], ++ sti7109->i2c_int_count[1], ++ sti7109->ext_int_total_count, ++ sti7109->ext_int_source_count[0], ++ sti7109->ext_int_source_count[1], ++ sti7109->ext_int_source_count[2], ++ sti7109->ext_int_source_count[3], ++ sti7109->ext_int_source_count[4], ++ sti7109->ext_int_source_count[5], ++ sti7109->ext_int_source_count[6], ++ sti7109->ext_int_source_count[7], ++ sti7109->ext_int_source_count[8], ++ sti7109->ext_int_source_count[9], ++ sti7109->ext_int_source_count[10], ++ sti7109->ext_int_source_count[11], ++ sti7109->ext_int_source_count[12], ++ sti7109->ext_int_source_count[13], ++ sti7109->ext_int_source_count[14], ++ sti7109->ext_int_source_count[15]); ++ sti7109->total_int_count = 0; ++ memset(sti7109->fgpi_int_count, 0, sizeof(sti7109->fgpi_int_count)); ++ memset(sti7109->i2c_int_count, 0, sizeof(sti7109->i2c_int_count)); ++ sti7109->ext_int_total_count = 0; ++ memset(sti7109->ext_int_source_count, 0, sizeof(sti7109->ext_int_source_count)); ++ sti7109->last_int_ticks = jiffies; ++ } ++ } ++ return IRQ_HANDLED; ++} ++ ++#define SAA716x_MODEL_S2_6400_DUAL "Technotrend S2 6400 Dual S2 Premium" ++#define SAA716x_DEV_S2_6400_DUAL "2x DVB-S/S2 + Hardware decode" ++ ++static struct stv090x_config tt6400_stv090x_config = { ++ .device = STV0900, ++ .demod_mode = STV090x_DUAL, ++ .clk_mode = STV090x_CLK_EXT, ++ ++ .xtal = 13500000, ++ .address = 0x68, ++ ++ .ts1_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, ++ .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, ++ .ts1_clk = 135000000, ++ .ts2_clk = 135000000, ++ ++ .repeater_level = STV090x_RPTLEVEL_16, ++ ++ .tuner_init = NULL, ++ .tuner_set_mode = NULL, ++ .tuner_set_frequency = NULL, ++ .tuner_get_frequency = NULL, ++ .tuner_set_bandwidth = NULL, ++ .tuner_get_bandwidth = NULL, ++ .tuner_set_bbgain = NULL, ++ .tuner_get_bbgain = NULL, ++ .tuner_set_refclk = NULL, ++ .tuner_get_status = NULL, ++}; ++ ++static struct stv6110x_config tt6400_stv6110x_config = { ++ .addr = 0x60, ++ .refclk = 27000000, ++ .clk_div = 2, ++}; ++ ++static struct isl6423_config tt6400_isl6423_config[2] = { ++ { ++ .current_max = SEC_CURRENT_515m, ++ .curlim = SEC_CURRENT_LIM_ON, ++ .mod_extern = 1, ++ .addr = 0x09, ++ }, ++ { ++ .current_max = SEC_CURRENT_515m, ++ .curlim = SEC_CURRENT_LIM_ON, ++ .mod_extern = 1, ++ .addr = 0x08, ++ } ++}; ++ ++ ++static int saa716x_s26400_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *i2c = saa716x->i2c; ++ struct i2c_adapter *i2c_adapter = &i2c[SAA716x_I2C_BUS_A].i2c_adapter; ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++ if (count == 0 || count == 1) { ++ adapter->fe = dvb_attach(stv090x_attach, ++ &tt6400_stv090x_config, ++ i2c_adapter, ++ STV090x_DEMODULATOR_0 + count); ++ ++ if (adapter->fe) { ++ struct stv6110x_devctl *ctl; ++ ctl = dvb_attach(stv6110x_attach, ++ adapter->fe, ++ &tt6400_stv6110x_config, ++ i2c_adapter); ++ ++ tt6400_stv090x_config.tuner_init = ctl->tuner_init; ++ tt6400_stv090x_config.tuner_sleep = ctl->tuner_sleep; ++ tt6400_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; ++ tt6400_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; ++ tt6400_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; ++ tt6400_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; ++ tt6400_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; ++ tt6400_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; ++ tt6400_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; ++ tt6400_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; ++ tt6400_stv090x_config.tuner_get_status = ctl->tuner_get_status; ++ ++ if (count == 1) { ++ /* call the init function once to initialize ++ tuner's clock output divider and demod's ++ master clock */ ++ /* The second tuner drives the STV0900 so ++ call it only for adapter 1 */ ++ if (adapter->fe->ops.init) ++ adapter->fe->ops.init(adapter->fe); ++ } ++ ++ dvb_attach(isl6423_attach, ++ adapter->fe, ++ i2c_adapter, ++ &tt6400_isl6423_config[count]); ++ ++ } ++ } ++ return 0; ++} ++ ++static struct saa716x_config saa716x_s26400_config = { ++ .model_name = SAA716x_MODEL_S2_6400_DUAL, ++ .dev_type = SAA716x_DEV_S2_6400_DUAL, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 2, ++ .frontend_attach = saa716x_s26400_frontend_attach, ++ .irq_handler = saa716x_ff_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++ .i2c_mode = SAA716x_I2C_MODE_IRQ_BUFFERED, ++ ++ .adap_config = { ++ { ++ /* Adapter 0 */ ++ .ts_port = 2, ++ .worker = demux_worker ++ },{ ++ /* Adapter 1 */ ++ .ts_port = 3, ++ .worker = demux_worker ++ } ++ } ++}; ++ ++ ++static struct pci_device_id saa716x_ff_pci_table[] = { ++ ++ MAKE_ENTRY(TECHNOTREND, S2_6400_DUAL_S2_PREMIUM_DEVEL, SAA7160, &saa716x_s26400_config), /* S2 6400 Dual development version */ ++ MAKE_ENTRY(TECHNOTREND, S2_6400_DUAL_S2_PREMIUM_PROD, SAA7160, &saa716x_s26400_config), /* S2 6400 Dual production version */ ++ { } ++}; ++MODULE_DEVICE_TABLE(pci, saa716x_ff_pci_table); ++ ++static struct pci_driver saa716x_ff_pci_driver = { ++ .name = DRIVER_NAME, ++ .id_table = saa716x_ff_pci_table, ++ .probe = saa716x_ff_pci_probe, ++ .remove = saa716x_ff_pci_remove, ++}; ++ ++static int saa716x_ff_init(void) ++{ ++ return pci_register_driver(&saa716x_ff_pci_driver); ++} ++ ++static void saa716x_ff_exit(void) ++{ ++ return pci_unregister_driver(&saa716x_ff_pci_driver); ++} ++ ++module_init(saa716x_ff_init); ++module_exit(saa716x_ff_exit); ++ ++MODULE_DESCRIPTION("SAA716x FF driver"); ++MODULE_AUTHOR("Manu Abraham"); ++MODULE_LICENSE("GPL"); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.c 2013-01-16 10:41:10.917798240 +0100 +@@ -0,0 +1,389 @@ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_fgpi_reg.h" ++#include "saa716x_dma_reg.h" ++#include "saa716x_msi_reg.h" ++ ++#include "saa716x_dma.h" ++#include "saa716x_fgpi.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++static const u32 mmu_pta_base[] = { ++ MMU_PTA_BASE0, ++ MMU_PTA_BASE1, ++ MMU_PTA_BASE2, ++ MMU_PTA_BASE3, ++ MMU_PTA_BASE4, ++ MMU_PTA_BASE5, ++ MMU_PTA_BASE6, ++ MMU_PTA_BASE7, ++ MMU_PTA_BASE8, ++ MMU_PTA_BASE9, ++ MMU_PTA_BASE10, ++ MMU_PTA_BASE11, ++ MMU_PTA_BASE12, ++ MMU_PTA_BASE13, ++ MMU_PTA_BASE14, ++ MMU_PTA_BASE15, ++}; ++ ++static const u32 mmu_dma_cfg[] = { ++ MMU_DMA_CONFIG0, ++ MMU_DMA_CONFIG1, ++ MMU_DMA_CONFIG2, ++ MMU_DMA_CONFIG3, ++ MMU_DMA_CONFIG4, ++ MMU_DMA_CONFIG5, ++ MMU_DMA_CONFIG6, ++ MMU_DMA_CONFIG7, ++ MMU_DMA_CONFIG8, ++ MMU_DMA_CONFIG9, ++ MMU_DMA_CONFIG10, ++ MMU_DMA_CONFIG11, ++ MMU_DMA_CONFIG12, ++ MMU_DMA_CONFIG13, ++ MMU_DMA_CONFIG14, ++ MMU_DMA_CONFIG15, ++}; ++ ++static const u32 fgpi_ch[] = { ++ FGPI0, ++ FGPI1, ++ FGPI2, ++ FGPI3 ++}; ++ ++static const u32 bamdma_bufmode[] = { ++ BAM_FGPI0_DMA_BUF_MODE, ++ BAM_FGPI1_DMA_BUF_MODE, ++ BAM_FGPI2_DMA_BUF_MODE, ++ BAM_FGPI3_DMA_BUF_MODE ++}; ++ ++static const u32 msi_int_tagack[] = { ++ MSI_INT_TAGACK_FGPI_0, ++ MSI_INT_TAGACK_FGPI_1, ++ MSI_INT_TAGACK_FGPI_2, ++ MSI_INT_TAGACK_FGPI_3 ++}; ++ ++static const u32 msi_int_ovrflw[] = { ++ MSI_INT_OVRFLW_FGPI_0, ++ MSI_INT_OVRFLW_FGPI_1, ++ MSI_INT_OVRFLW_FGPI_2, ++ MSI_INT_OVRFLW_FGPI_3 ++}; ++ ++static const u32 msi_int_avint[] = { ++ MSI_INT_AVINT_FGPI_0, ++ MSI_INT_AVINT_FGPI_1, ++ MSI_INT_AVINT_FGPI_2, ++ MSI_INT_AVINT_FGPI_3 ++}; ++ ++void saa716x_fgpiint_disable(struct saa716x_dmabuf *dmabuf, int channel) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ ++ u32 fgpi_port; ++ ++ fgpi_port = fgpi_ch[channel]; ++ ++ SAA716x_EPWR(fgpi_port, INT_ENABLE, 0); /* disable FGPI IRQ */ ++ SAA716x_EPWR(fgpi_port, INT_CLR_STATUS, 0x7f); /* clear status */ ++} ++EXPORT_SYMBOL_GPL(saa716x_fgpiint_disable); ++ ++int saa716x_fgpi_get_write_index(struct saa716x_dev *saa716x, u32 fgpi_index) ++{ ++ u32 fgpi_base; ++ u32 buf_mode_reg; ++ u32 buf_mode; ++ ++ switch (fgpi_index) { ++ case 0: /* FGPI_0 */ ++ fgpi_base = FGPI0; ++ buf_mode_reg = BAM_FGPI0_DMA_BUF_MODE; ++ break; ++ ++ case 1: /* FGPI_1 */ ++ fgpi_base = FGPI1; ++ buf_mode_reg = BAM_FGPI1_DMA_BUF_MODE; ++ break; ++ ++ case 2: /* FGPI_2 */ ++ fgpi_base = FGPI2; ++ buf_mode_reg = BAM_FGPI2_DMA_BUF_MODE; ++ break; ++ ++ case 3: /* FGPI_3 */ ++ fgpi_base = FGPI3; ++ buf_mode_reg = BAM_FGPI3_DMA_BUF_MODE; ++ break; ++ ++ default: ++ printk(KERN_ERR "%s: unexpected fgpi %u\n", ++ __func__, fgpi_index); ++ return -1; ++ } ++ ++ buf_mode = SAA716x_EPRD(BAM, buf_mode_reg); ++ if (saa716x->revision < 2) { ++ /* workaround for revision 1: restore buffer numbers on BAM */ ++ SAA716x_EPWR(fgpi_base, INT_CLR_STATUS, 0x7F); ++ SAA716x_EPWR(BAM, buf_mode_reg, buf_mode | 7); ++ } ++ return (buf_mode >> 3) & 0x7; ++} ++EXPORT_SYMBOL_GPL(saa716x_fgpi_get_write_index); ++ ++static u32 saa716x_init_ptables(struct saa716x_dmabuf *dmabuf, int channel) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ ++ u32 config, i; ++ ++ for (i = 0; i < FGPI_BUFFERS; i++) ++ BUG_ON((dmabuf[i].mem_ptab_phys == 0)); ++ ++ config = mmu_dma_cfg[channel]; /* DMACONFIGx */ ++ ++ SAA716x_EPWR(MMU, config, (FGPI_BUFFERS - 1)); ++ SAA716x_EPWR(MMU, MMU_PTA0_LSB(channel), PTA_LSB(dmabuf[0].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA0_MSB(channel), PTA_MSB(dmabuf[0].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA1_LSB(channel), PTA_LSB(dmabuf[1].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA1_MSB(channel), PTA_MSB(dmabuf[1].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA2_LSB(channel), PTA_LSB(dmabuf[2].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA2_MSB(channel), PTA_MSB(dmabuf[2].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA3_LSB(channel), PTA_LSB(dmabuf[3].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA3_MSB(channel), PTA_MSB(dmabuf[3].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA4_LSB(channel), PTA_LSB(dmabuf[4].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA4_MSB(channel), PTA_MSB(dmabuf[4].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA5_LSB(channel), PTA_LSB(dmabuf[5].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA5_MSB(channel), PTA_MSB(dmabuf[5].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA6_LSB(channel), PTA_LSB(dmabuf[6].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA6_MSB(channel), PTA_MSB(dmabuf[6].mem_ptab_phys)); /* High */ ++ SAA716x_EPWR(MMU, MMU_PTA7_LSB(channel), PTA_LSB(dmabuf[7].mem_ptab_phys)); /* Low */ ++ SAA716x_EPWR(MMU, MMU_PTA7_MSB(channel), PTA_MSB(dmabuf[7].mem_ptab_phys)); /* High */ ++ ++ return 0; ++} ++ ++int saa716x_fgpi_setparams(struct saa716x_dmabuf *dmabuf, ++ struct fgpi_stream_params *stream_params, ++ int port) ++{ ++ struct saa716x_dev *saa716x = dmabuf->saa716x; ++ ++ u32 fgpi_port, buf_mode, val, mid; ++ u32 D1_XY_END, offst_1, offst_2; ++ int i = 0; ++ ++ fgpi_port = fgpi_ch[port]; ++ buf_mode = bamdma_bufmode[port]; ++ ++ /* Reset FGPI block */ ++ SAA716x_EPWR(fgpi_port, FGPI_SOFT_RESET, FGPI_SOFTWARE_RESET); ++ ++ /* Reset DMA channel */ ++ SAA716x_EPWR(BAM, buf_mode, 0x00000040); ++ saa716x_init_ptables(dmabuf, saa716x->fgpi[port].dma_channel); ++ ++ ++ /* monitor BAM reset */ ++ val = SAA716x_EPRD(BAM, buf_mode); ++ while (val && (i < 100)) { ++ msleep(30); ++ val = SAA716x_EPRD(BAM, buf_mode); ++ i++; ++ } ++ ++ if (val) { ++ dprintk(SAA716x_ERROR, 1, "Error: BAM FGPI Reset failed!"); ++ return -EIO; ++ } ++ ++ /* set buffer count */ ++ SAA716x_EPWR(BAM, buf_mode, FGPI_BUFFERS - 1); ++ ++ /* initialize all available address offsets */ ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_0(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_1(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_2(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_3(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_4(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_5(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_6(port), 0x0); ++ SAA716x_EPWR(BAM, BAM_FGPI_ADDR_OFFST_7(port), 0x0); ++ ++ /* get module ID */ ++ mid = SAA716x_EPRD(fgpi_port, FGPI_MODULE_ID); ++ if (mid != 0x14b0100) ++ dprintk(SAA716x_ERROR, 1, "FGPI Id<%04x> is not supported", mid); ++ ++ /* Initialize FGPI block */ ++ SAA716x_EPWR(fgpi_port, FGPI_REC_SIZE, stream_params->samples * (stream_params->bits / 8)); ++ SAA716x_EPWR(fgpi_port, FGPI_STRIDE, stream_params->pitch); ++ ++ offst_1 = 0; ++ offst_2 = 0; ++ switch (stream_params->stream_type) { ++ case FGPI_TRANSPORT_STREAM: ++ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000080); ++ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines); ++ break; ++ ++ case FGPI_PROGRAM_STREAM: ++ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000088); ++ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines); ++ break; ++ ++ case FGPI_VIDEO_STREAM: ++ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000088); ++ SAA716x_EPWR(fgpi_port, FGPI_D1_XY_START, 0x00000002); ++ ++ if ((stream_params->stream_flags & FGPI_INTERLACED) && ++ (stream_params->stream_flags & FGPI_ODD_FIELD) && ++ (stream_params->stream_flags & FGPI_EVEN_FIELD)) { ++ ++ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines / 2); ++ SAA716x_EPWR(fgpi_port, FGPI_STRIDE, 768 * 4); /* interlaced stride of 2 lines */ ++ ++ D1_XY_END = (stream_params->samples << 16); ++ D1_XY_END |= (stream_params->lines / 2) + 2; ++ ++ if (stream_params->stream_flags & FGPI_PAL) ++ offst_1 = 768 * 2; ++ else ++ offst_2 = 768 * 2; ++ ++ } else { ++ SAA716x_EPWR(fgpi_port, FGPI_SIZE, stream_params->lines); ++ SAA716x_EPWR(fgpi_port, FGPI_STRIDE, 768 * 2); /* stride of 1 line */ ++ ++ D1_XY_END = stream_params->samples << 16; ++ D1_XY_END |= stream_params->lines + 2; ++ } ++ ++ SAA716x_EPWR(fgpi_port, FGPI_D1_XY_END, D1_XY_END); ++ break; ++ ++ default: ++ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, 0x00000080); ++ break; ++ } ++ ++ SAA716x_EPWR(fgpi_port, FGPI_BASE_1, ((saa716x->fgpi[port].dma_channel) << 21) + offst_1); ++ SAA716x_EPWR(fgpi_port, FGPI_BASE_2, ((saa716x->fgpi[port].dma_channel) << 21) + offst_2); ++ ++ return 0; ++} ++ ++int saa716x_fgpi_start(struct saa716x_dev *saa716x, int port, ++ struct fgpi_stream_params *stream_params) ++{ ++ u32 fgpi_port; ++ u32 config; ++ u32 val; ++ u32 i; ++ ++ fgpi_port = fgpi_ch[port]; ++ ++ SAA716x_EPWR(fgpi_port, FGPI_INTERFACE, 0); ++ msleep(10); ++ ++ if (saa716x_fgpi_setparams(saa716x->fgpi[port].dma_buf, stream_params, port) != 0) { ++ return -EIO; ++ } ++ ++ config = mmu_dma_cfg[saa716x->fgpi[port].dma_channel]; /* DMACONFIGx */ ++ ++ val = SAA716x_EPRD(MMU, config); ++ SAA716x_EPWR(MMU, config, val & ~0x40); ++ SAA716x_EPWR(MMU, config, val | 0x40); ++ ++ SAA716x_EPWR(fgpi_port, INT_ENABLE, 0x7F); ++ ++ val = SAA716x_EPRD(MMU, config); ++ i = 0; ++ while (i < 500) { ++ if (val & 0x80) ++ break; ++ msleep(10); ++ val = SAA716x_EPRD(MMU, config); ++ i++; ++ } ++ ++ if (!(val & 0x80)) { ++ dprintk(SAA716x_ERROR, 1, "Error: PTE pre-fetch failed!"); ++ return -EIO; ++ } ++ ++ val = SAA716x_EPRD(fgpi_port, FGPI_CONTROL); ++ val |= 0x3000; ++ ++ saa716x_set_clk_external(saa716x, saa716x->fgpi[port].dma_channel); ++ ++ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, val); ++ ++ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_L, msi_int_tagack[port]); ++ ++ return 0; ++} ++ ++int saa716x_fgpi_stop(struct saa716x_dev *saa716x, int port) ++{ ++ u32 fgpi_port; ++ u32 val; ++ ++ fgpi_port = fgpi_ch[port]; ++ ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_L, msi_int_tagack[port]); ++ ++ val = SAA716x_EPRD(fgpi_port, FGPI_CONTROL); ++ val &= ~0x3000; ++ SAA716x_EPWR(fgpi_port, FGPI_CONTROL, val); ++ ++ saa716x_set_clk_internal(saa716x, saa716x->fgpi[port].dma_channel); ++ ++ return 0; ++} ++ ++int saa716x_fgpi_init(struct saa716x_dev *saa716x, int port, ++ void (*worker)(unsigned long)) ++{ ++ int i; ++ int ret; ++ ++ saa716x->fgpi[port].dma_channel = port + 6; ++ for (i = 0; i < FGPI_BUFFERS; i++) ++ { ++ /* TODO: what is a good size for TS DMA buffer? */ ++ ret = saa716x_dmabuf_alloc(saa716x, &saa716x->fgpi[port].dma_buf[i], 16 * SAA716x_PAGE_SIZE); ++ if (ret < 0) { ++ return ret; ++ } ++ } ++ saa716x->fgpi[port].saa716x = saa716x; ++ tasklet_init(&saa716x->fgpi[port].tasklet, worker, ++ (unsigned long)&saa716x->fgpi[port]); ++ saa716x->fgpi[port].read_index = 0; ++ ++ return 0; ++} ++ ++int saa716x_fgpi_exit(struct saa716x_dev *saa716x, int port) ++{ ++ int i; ++ ++ tasklet_kill(&saa716x->fgpi[port].tasklet); ++ for (i = 0; i < FGPI_BUFFERS; i++) ++ { ++ saa716x_dmabuf_free(saa716x, &saa716x->fgpi[port].dma_buf[i]); ++ } ++ ++ return 0; ++} +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi.h 2013-01-16 10:41:10.917798240 +0100 +@@ -0,0 +1,112 @@ ++#ifndef __SAA716x_FGPI_H ++#define __SAA716x_FGPI_H ++ ++#include ++ ++#define FGPI_BUFFERS 8 ++#define PTA_LSB(__mem) ((u32 ) (__mem)) ++#define PTA_MSB(__mem) ((u32 ) ((u64)(__mem) >> 32)) ++ ++#define BAM_DMA_BUF_MODE_BASE 0x0d8 ++#define BAM_DMA_BUF_MODE_OFFSET 0x24 ++ ++#define BAM_DMA_BUF_MODE(__ch) (BAM_DMA_BUF_MODE_BASE + (BAM_DMA_BUF_MODE_OFFSET * __ch)) ++ ++#define BAM_FGPI_ADDR_OFFST_BASE 0x0dc ++#define BAM_FGPI_ADDR_OFFST_OFFSET 0x24 ++ ++#define BAM_FGPI_ADDR_OFFSET(__ch) (BAM_FGPI_ADDR_OFFST_BASE + (BAM_FGPI_ADDR_OFFST_OFFSET * __ch)) ++ ++#define BAM_FGPI_ADDR_OFFST_0(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x00 ++#define BAM_FGPI_ADDR_OFFST_1(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x04 ++#define BAM_FGPI_ADDR_OFFST_2(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x08 ++#define BAM_FGPI_ADDR_OFFST_3(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x0c ++#define BAM_FGPI_ADDR_OFFST_4(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x10 ++#define BAM_FGPI_ADDR_OFFST_5(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x14 ++#define BAM_FGPI_ADDR_OFFST_6(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x18 ++#define BAM_FGPI_ADDR_OFFST_7(__ch) BAM_FGPI_ADDR_OFFSET(__ch) + 0x1c ++ ++struct saa716x_dmabuf; ++ ++/* ++ * Port supported streams ++ * ++ * FGPI_AUDIO_STREAM ++ * FGPI_VIDEO_STREAM ++ * FGPI_VBI_STREAM ++ * FGPI_TRANSPORT_STREAM ++ * FGPI_PROGRAM_STREAM ++ */ ++enum fgpi_stream_type { ++ FGPI_AUDIO_STREAM = 0x01, ++ FGPI_VIDEO_STREAM = 0x02, ++ FGPI_VBI_STREAM = 0x04, ++ FGPI_TRANSPORT_STREAM = 0x08, ++ FGPI_PROGRAM_STREAM = 0x10 ++}; ++ ++/* ++ * Stream port flags ++ * ++ * FGPI_ODD_FIELD ++ * FGPI_EVEN_FIELD ++ * FGPI_HD_0 ++ * FGPI_HD_1 ++ * FGPI_PAL ++ * FGPI_NTSC ++ */ ++enum fgpi_stream_flags { ++ FGPI_ODD_FIELD = 0x0001, ++ FGPI_EVEN_FIELD = 0x0002, ++ FGPI_INTERLACED = 0x0004, ++ FGPI_HD0 = 0x0010, ++ FGPI_HD1 = 0x0020, ++ FGPI_PAL = 0x0040, ++ FGPI_NTSC = 0x0080, ++ FGPI_NO_SCALER = 0x0100, ++}; ++ ++/* ++ * Stream port parameters ++ * bits: Bits per sample ++ * samples: samples perline ++ * lines: number of lines ++ * pitch: stream pitch in bytes ++ * offset: offset to first valid line ++ */ ++struct fgpi_stream_params { ++ u32 bits; ++ u32 samples; ++ u32 lines; ++ ++ s32 pitch; ++ ++ u32 offset; ++ u32 page_tables; ++ ++ enum fgpi_stream_flags stream_flags; ++ enum fgpi_stream_type stream_type; ++}; ++ ++struct saa716x_dmabuf; ++ ++struct saa716x_fgpi_stream_port { ++ u8 dma_channel; ++ struct saa716x_dmabuf dma_buf[FGPI_BUFFERS]; ++ struct saa716x_dev *saa716x; ++ struct tasklet_struct tasklet; ++ u8 read_index; ++}; ++ ++extern void saa716x_fgpiint_disable(struct saa716x_dmabuf *dmabuf, int channel); ++extern int saa716x_fgpi_get_write_index(struct saa716x_dev *saa716x, ++ u32 fgpi_index); ++extern int saa716x_fgpi_start(struct saa716x_dev *saa716x, int port, ++ struct fgpi_stream_params *stream_params); ++extern int saa716x_fgpi_stop(struct saa716x_dev *saa716x, int port); ++ ++extern int saa716x_fgpi_init(struct saa716x_dev *saa716x, int port, ++ void (*worker)(unsigned long)); ++extern int saa716x_fgpi_exit(struct saa716x_dev *saa716x, int port); ++ ++#endif /* __SAA716x_FGPI_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_fgpi_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_fgpi_reg.h 2013-01-16 10:41:10.918798233 +0100 +@@ -0,0 +1,74 @@ ++#ifndef __SAA716x_FGPI_REG_H ++#define __SAA716x_FGPI_REG_H ++ ++/* -------------- FGPI Registers -------------- */ ++ ++#define FGPI_CONTROL 0x000 ++#define FGPI_CAPTURE_ENABLE_2 (0x00000001 << 13) ++#define FGPI_CAPTURE_ENABLE_1 (0x00000001 << 12) ++#define FGPI_MODE (0x00000001 << 11) ++#define FGPI_SAMPLE_SIZE (0x00000003 << 8) ++#define FGPI_BUF_SYNC_MSG_STOP (0x00000003 << 5) ++#define FGPI_REC_START_MSG_START (0x00000003 << 2) ++#define FGPI_TSTAMP_SELECT (0x00000001 << 1) ++#define FGPI_VAR_LENGTH (0x00000001 << 0) ++ ++#define FGPI_BASE_1 0x004 ++#define FGPI_BASE_2 0x008 ++#define FGPI_SIZE 0x00c ++#define FGPI_REC_SIZE 0x010 ++#define FGPI_STRIDE 0x014 ++#define FGPI_NUM_RECORD_1 0x018 ++#define FGPI_NUM_RECORD_2 0x01c ++#define FGPI_THRESHOLD_1 0x020 ++#define FGPI_THRESHOLD_2 0x024 ++#define FGPI_D1_XY_START 0x028 ++#define FGPI_D1_XY_END 0x02c ++ ++#define INT_STATUS 0xfe0 ++#define FGPI_BUF1_ACTIVE (0x00000001 << 7) ++#define FGPI_OVERFLOW (0x00000001 << 6) ++#define FGPI_MBE (0x00000001 << 5) ++#define FGPI_UNDERRUN (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED (0x00000001 << 2) ++#define FGPI_BUF2_FULL (0x00000001 << 1) ++#define FGPI_BUF1_FULL (0x00000001 << 0) ++ ++#define INT_ENABLE 0xfe4 ++#define FGPI_OVERFLOW_ENA (0x00000001 << 6) ++#define FGPI_MBE_ENA (0x00000001 << 5) ++#define FGPI_UNDERRUN_ENA (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED_ENA (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED_ENA (0x00000001 << 2) ++#define FGPI_BUF2_FULL_ENA (0x00000001 << 1) ++#define FGPI_BUF1_FULL_ENA (0x00000001 << 0) ++ ++#define INT_CLR_STATUS 0xfe8 ++#define FGPI_OVERFLOW_ACK (0x00000001 << 6) ++#define FGPI_MBE_ACK (0x00000001 << 5) ++#define FGPI_UNDERRUN_ACK (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED_ACK (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED_ACK (0x00000001 << 2) ++#define FGPI_BUF2_DONE_ACK (0x00000001 << 1) ++#define FGPI_BUF1_DONE_ACK (0x00000001 << 0) ++ ++#define INT_SET_STATUS 0xfec ++#define FGPI_OVERFLOW_SET (0x00000001 << 6) ++#define FGPI_MBE_SET (0x00000001 << 5) ++#define FGPI_UNDERRUN_SET (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED_SET (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED_SET (0x00000001 << 2) ++#define FGPI_BUF2_DONE_SET (0x00000001 << 1) ++#define FGPI_BUF1_DONE_SET (0x00000001 << 0) ++ ++#define FGPI_SOFT_RESET 0xff0 ++#define FGPI_SOFTWARE_RESET (0x00000001 << 0) ++ ++#define FGPI_INTERFACE 0xff4 ++#define FGPI_DISABLE_BUS_IF (0x00000001 << 0) ++ ++#define FGPI_MOD_ID_EXT 0xff8 ++#define FGPI_MODULE_ID 0xffc ++ ++#endif /* __SAA716x_FGPI_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.c 2013-01-16 10:41:10.918798233 +0100 +@@ -0,0 +1,140 @@ ++#include ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_gpio_reg.h" ++ ++#include "saa716x_gpio.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++void saa716x_gpio_init(struct saa716x_dev *saa716x) ++{ ++ spin_lock_init(&saa716x->gpio_lock); ++} ++EXPORT_SYMBOL_GPL(saa716x_gpio_init); ++ ++int saa716x_get_gpio_mode(struct saa716x_dev *saa716x, u32 *config) ++{ ++ *config = SAA716x_EPRD(GPIO, GPIO_WR_MODE); ++ ++ return 0; ++} ++ ++int saa716x_set_gpio_mode(struct saa716x_dev *saa716x, u32 mask, u32 config) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&saa716x->gpio_lock, flags); ++ reg = SAA716x_EPRD(GPIO, GPIO_WR_MODE); ++ reg &= ~mask; ++ reg |= (config & mask); ++ SAA716x_EPWR(GPIO, GPIO_WR_MODE, reg); ++ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); ++ ++ return 0; ++} ++ ++u32 saa716x_gpio_rd(struct saa716x_dev *saa716x) ++{ ++ return SAA716x_EPRD(GPIO, GPIO_RD); ++} ++ ++void saa716x_gpio_wr(struct saa716x_dev *saa716x, u32 data) ++{ ++ SAA716x_EPWR(GPIO, GPIO_WR, data); ++} ++ ++void saa716x_gpio_ctl(struct saa716x_dev *saa716x, u32 mask, u32 bits) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&saa716x->gpio_lock, flags); ++ ++ reg = SAA716x_EPRD(GPIO, GPIO_OEN); ++ reg &= mask; ++ reg |= bits; ++ SAA716x_EPWR(GPIO, GPIO_OEN, reg); ++ ++ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); ++} ++ ++void saa716x_gpio_bits(struct saa716x_dev *saa716x, u32 bits) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&saa716x->gpio_lock, flags); ++ ++ reg = SAA716x_EPRD(GPIO, GPIO_WR); ++ reg &= ~bits; ++ /* TODO ! add maskable config bits in here */ ++ /* reg |= (config->mask & bits) */ ++ reg |= bits; ++ SAA716x_EPWR(GPIO, GPIO_WR, reg); ++ ++ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); ++} ++ ++void saa716x_gpio_set_output(struct saa716x_dev *saa716x, int gpio) ++{ ++ uint32_t value; ++ ++ value = SAA716x_EPRD(GPIO, GPIO_OEN); ++ value &= ~(1 << gpio); ++ SAA716x_EPWR(GPIO, GPIO_OEN, value); ++} ++EXPORT_SYMBOL_GPL(saa716x_gpio_set_output); ++ ++void saa716x_gpio_set_input(struct saa716x_dev *saa716x, int gpio) ++{ ++ uint32_t value; ++ ++ value = SAA716x_EPRD(GPIO, GPIO_OEN); ++ value |= 1 << gpio; ++ SAA716x_EPWR(GPIO, GPIO_OEN, value); ++} ++EXPORT_SYMBOL_GPL(saa716x_gpio_set_input); ++ ++void saa716x_gpio_set_mode(struct saa716x_dev *saa716x, int gpio, int mode) ++{ ++ uint32_t value; ++ ++ value = SAA716x_EPRD(GPIO, GPIO_WR_MODE); ++ if (mode) ++ value |= 1 << gpio; ++ else ++ value &= ~(1 << gpio); ++ SAA716x_EPWR(GPIO, GPIO_WR_MODE, value); ++} ++EXPORT_SYMBOL_GPL(saa716x_gpio_set_mode); ++ ++void saa716x_gpio_write(struct saa716x_dev *saa716x, int gpio, int set) ++{ ++ uint32_t value; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&saa716x->gpio_lock, flags); ++ value = SAA716x_EPRD(GPIO, GPIO_WR); ++ if (set) ++ value |= 1 << gpio; ++ else ++ value &= ~(1 << gpio); ++ SAA716x_EPWR(GPIO, GPIO_WR, value); ++ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); ++} ++EXPORT_SYMBOL_GPL(saa716x_gpio_write); ++ ++int saa716x_gpio_read(struct saa716x_dev *saa716x, int gpio) ++{ ++ uint32_t value; ++ ++ value = SAA716x_EPRD(GPIO, GPIO_RD); ++ if (value & (1 << gpio)) ++ return 1; ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_gpio_read); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio.h 2013-01-16 10:41:10.918798233 +0100 +@@ -0,0 +1,26 @@ ++#ifndef __SAA716x_GPIO_H ++#define __SAA716x_GPIO_H ++ ++#define BOOT_MODE GPIO_31 | GPIO_30 ++#define AV_UNIT_B GPIO_25 ++#define AV_UNIT_A GPIO_24 ++#define AV_INTR_B GPIO_01 ++#define AV_INTR_A GPIO_00 ++ ++struct saa716x_dev; ++ ++extern void saa716x_gpio_init(struct saa716x_dev *saa716x); ++ ++extern u32 saa716x_gpio_rd(struct saa716x_dev *saa716x); ++extern void saa716x_gpio_wr(struct saa716x_dev *saa716x, u32 data); ++extern void saa716x_gpio_ctl(struct saa716x_dev *saa716x, u32 mask, u32 bits); ++ ++extern void saa716x_gpio_bits(struct saa716x_dev *saa716x, u32 bits); ++ ++extern void saa716x_gpio_set_output(struct saa716x_dev *saa716x, int gpio); ++extern void saa716x_gpio_set_input(struct saa716x_dev *saa716x, int gpio); ++extern void saa716x_gpio_set_mode(struct saa716x_dev *saa716x, int gpio, int mode); ++extern void saa716x_gpio_write(struct saa716x_dev *saa716x, int gpio, int set); ++extern int saa716x_gpio_read(struct saa716x_dev *saa716x, int gpio); ++ ++#endif /* __SAA716x_GPIO_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_gpio_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_gpio_reg.h 2013-01-16 10:41:10.919798225 +0100 +@@ -0,0 +1,47 @@ ++#ifndef __SAA716x_GPIO_REG_H ++#define __SAA716x_GPIO_REG_H ++ ++/* -------------- GPIO Registers -------------- */ ++ ++#define GPIO_RD 0x000 ++#define GPIO_WR 0x004 ++#define GPIO_WR_MODE 0x008 ++#define GPIO_OEN 0x00c ++ ++#define GPIO_SW_RST 0xff0 ++#define GPIO_SW_RESET (0x00000001 << 0) ++ ++#define GPIO_31 (1 << 31) ++#define GPIO_30 (1 << 30) ++#define GPIO_29 (1 << 29) ++#define GPIO_28 (1 << 28) ++#define GPIO_27 (1 << 27) ++#define GPIO_26 (1 << 26) ++#define GPIO_25 (1 << 25) ++#define GPIO_24 (1 << 24) ++#define GPIO_23 (1 << 23) ++#define GPIO_22 (1 << 22) ++#define GPIO_21 (1 << 21) ++#define GPIO_20 (1 << 20) ++#define GPIO_19 (1 << 19) ++#define GPIO_18 (1 << 18) ++#define GPIO_17 (1 << 17) ++#define GPIO_16 (1 << 16) ++#define GPIO_15 (1 << 15) ++#define GPIO_14 (1 << 14) ++#define GPIO_13 (1 << 13) ++#define GPIO_12 (1 << 12) ++#define GPIO_11 (1 << 11) ++#define GPIO_10 (1 << 10) ++#define GPIO_09 (1 << 9) ++#define GPIO_08 (1 << 8) ++#define GPIO_07 (1 << 7) ++#define GPIO_06 (1 << 6) ++#define GPIO_05 (1 << 5) ++#define GPIO_04 (1 << 4) ++#define GPIO_03 (1 << 3) ++#define GPIO_02 (1 << 2) ++#define GPIO_01 (1 << 1) ++#define GPIO_00 (1 << 0) ++ ++#endif /* __SAA716x_GPIO_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.c 2013-01-16 10:41:10.919798225 +0100 +@@ -0,0 +1,42 @@ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_greg_reg.h" ++#include "saa716x_greg.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++static u32 g_save[12]; ++ ++void saa716x_greg_save(struct saa716x_dev *saa716x) ++{ ++ g_save[0] = SAA716x_EPRD(GREG, GREG_SUBSYS_CONFIG); ++ g_save[1] = SAA716x_EPRD(GREG, GREG_MSI_BAR_PMCSR); ++ g_save[2] = SAA716x_EPRD(GREG, GREG_PMCSR_DATA_1); ++ g_save[3] = SAA716x_EPRD(GREG, GREG_PMCSR_DATA_2); ++ g_save[4] = SAA716x_EPRD(GREG, GREG_VI_CTRL); ++ g_save[5] = SAA716x_EPRD(GREG, GREG_FGPI_CTRL); ++ g_save[6] = SAA716x_EPRD(GREG, GREG_RSTU_CTRL); ++ g_save[7] = SAA716x_EPRD(GREG, GREG_I2C_CTRL); ++ g_save[8] = SAA716x_EPRD(GREG, GREG_OVFLW_CTRL); ++ g_save[9] = SAA716x_EPRD(GREG, GREG_TAG_ACK_FLEN); ++ ++ g_save[10] = SAA716x_EPRD(GREG, GREG_VIDEO_IN_CTRL); ++} ++ ++void saa716x_greg_restore(struct saa716x_dev *saa716x) ++{ ++ SAA716x_EPWR(GREG, GREG_SUBSYS_CONFIG, g_save[0]); ++ SAA716x_EPWR(GREG, GREG_MSI_BAR_PMCSR, g_save[1]); ++ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_1, g_save[2]); ++ SAA716x_EPWR(GREG, GREG_PMCSR_DATA_2, g_save[3]); ++ SAA716x_EPWR(GREG, GREG_VI_CTRL, g_save[4]); ++ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, g_save[5]); ++ SAA716x_EPWR(GREG, GREG_RSTU_CTRL, g_save[6]); ++ SAA716x_EPWR(GREG, GREG_I2C_CTRL, g_save[7]); ++ SAA716x_EPWR(GREG, GREG_OVFLW_CTRL, g_save[8]); ++ SAA716x_EPWR(GREG, GREG_TAG_ACK_FLEN, g_save[9]); ++ ++ SAA716x_EPWR(GREG, GREG_VIDEO_IN_CTRL, g_save[10]); ++} +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_greg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg.h 2013-01-16 10:41:10.919798225 +0100 +@@ -0,0 +1,9 @@ ++#ifndef __SAA716x_GREG_H ++#define __SAA716x_GREG_H ++ ++struct saa716x_dev; ++ ++extern void saa716x_greg_save(struct saa716x_dev *saa716x); ++extern void saa716x_greg_restore(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_GREG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_greg_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_greg_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_greg_reg.h 2013-01-16 10:41:10.919798225 +0100 +@@ -0,0 +1,91 @@ ++#ifndef __SAA716x_GREG_REG_H ++#define __SAA716x_GREG_REG_H ++ ++/* -------------- GREG Registers -------------- */ ++ ++#define GREG_SUBSYS_CONFIG 0x000 ++#define GREG_SUBSYS_ID (0x0000ffff << 16) ++#define GREG_SUBSYS_VID (0x0000ffff << 0) ++ ++#define GREG_MSI_BAR_PMCSR 0x004 ++#define GREG_PMCSR_SCALE_7 (0x00000003 << 30) ++#define GREG_PMCSR_SCALE_6 (0x00000003 << 28) ++#define GREG_PMCSR_SCALE_5 (0x00000003 << 26) ++#define GREG_PMCSR_SCALE_4 (0x00000003 << 24) ++#define GREG_PMCSR_SCALE_3 (0x00000003 << 22) ++#define GREG_PMCSR_SCALE_2 (0x00000003 << 20) ++#define GREG_PMCSR_SCALE_1 (0x00000003 << 18) ++#define GREG_PMCSR_SCALE_0 (0x00000003 << 16) ++ ++#define GREG_BAR_WIDTH_17 (0x0000001e << 8) ++#define GREG_BAR_WIDTH_18 (0x0000001c << 8) ++#define GREG_BAR_WIDTH_19 (0x00000018 << 8) ++#define GREG_BAR_WIDTH_20 (0x00000010 << 8) ++ ++#define GREG_BAR_PREFETCH (0x00000001 << 3) ++#define GREG_MSI_MM_CAP1 (0x00000000 << 0) // FIXME ! ++#define GREG_MSI_MM_CAP2 (0x00000001 << 0) ++#define GREG_MSI_MM_CAP4 (0x00000002 << 0) ++#define GREG_MSI_MM_CAP8 (0x00000003 << 0) ++#define GREG_MSI_MM_CAP16 (0x00000004 << 0) ++#define GREG_MSI_MM_CAP32 (0x00000005 << 0) ++ ++#define GREG_PMCSR_DATA_1 0x008 ++#define GREG_PMCSR_DATA_2 0x00c ++#define GREG_VI_CTRL 0x010 ++#define GREG_FGPI_CTRL 0x014 ++ ++#define GREG_RSTU_CTRL 0x018 ++#define GREG_BOOT_READY (0x00000001 << 13) ++#define GREG_RESET_REQ (0x00000001 << 12) ++#define GREG_IP_RST_RELEASE (0x00000001 << 11) ++#define GREG_ADAPTER_RST_RELEASE (0x00000001 << 10) ++#define GREG_PCIE_CORE_RST_RELEASE (0x00000001 << 9) ++#define GREG_BOOT_IP_RST_RELEASE (0x00000001 << 8) ++#define GREG_BOOT_RST_RELEASE (0x00000001 << 7) ++#define GREG_CGU_RST_RELEASE (0x00000001 << 6) ++#define GREG_IP_RST_ASSERT (0x00000001 << 5) ++#define GREG_ADAPTER_RST_ASSERT (0x00000001 << 4) ++#define GREG_RST_ASSERT (0x00000001 << 3) ++#define GREG_BOOT_IP_RST_ASSERT (0x00000001 << 2) ++#define GREG_BOOT_RST_ASSERT (0x00000001 << 1) ++#define GREG_CGU_RST_ASSERT (0x00000001 << 0) ++ ++#define GREG_I2C_CTRL 0x01c ++#define GREG_I2C_SLAVE_ADDR (0x0000007f << 0) ++ ++#define GREG_OVFLW_CTRL 0x020 ++#define GREG_OVERFLOW_ENABLE (0x00001fff << 0) ++ ++#define GREG_TAG_ACK_FLEN 0x024 ++#define GREG_TAG_ACK_FLEN_1B (0x00000000 << 0) ++#define GREG_TAG_ACK_FLEN_2B (0x00000001 << 0) ++#define GREG_TAG_ACK_FLEN_4B (0x00000002 << 0) ++#define GREG_TAG_ACK_FLEN_8B (0x00000003 << 0) ++ ++#define GREG_VIDEO_IN_CTRL 0x028 ++ ++#define GREG_SPARE_1 0x02c ++#define GREG_SPARE_2 0x030 ++#define GREG_SPARE_3 0x034 ++#define GREG_SPARE_4 0x038 ++#define GREG_SPARE_5 0x03c ++#define GREG_SPARE_6 0x040 ++#define GREG_SPARE_7 0x044 ++#define GREG_SPARE_8 0x048 ++#define GREG_SPARE_9 0x04c ++#define GREG_SPARE_10 0x050 ++#define GREG_SPARE_11 0x054 ++#define GREG_SPARE_12 0x058 ++#define GREG_SPARE_13 0x05c ++#define GREG_SPARE_14 0x060 ++#define GREG_SPARE_15 0x064 ++ ++#define GREG_FAIL_DISABLE 0x068 ++#define GREG_BOOT_FAIL_DISABLE (0x00000001 << 0) ++ ++#define GREG_SW_RST 0xff0 ++#define GREG_SW_RESET (0x00000001 << 0) ++ ++ ++#endif /* __SAA716x_GREG_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.c 2013-01-16 10:41:10.920798217 +0100 +@@ -0,0 +1,726 @@ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_gpio_reg.h" ++#include "saa716x_greg_reg.h" ++#include "saa716x_msi_reg.h" ++ ++#include "saa716x_adap.h" ++#include "saa716x_i2c.h" ++#include "saa716x_msi.h" ++#include "saa716x_hybrid.h" ++#include "saa716x_gpio.h" ++#include "saa716x_rom.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++#include "zl10353.h" ++#include "mb86a16.h" ++#include "tda1004x.h" ++#include "tda827x.h" ++ ++unsigned int verbose; ++module_param(verbose, int, 0644); ++MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)"); ++ ++unsigned int int_type; ++module_param(int_type, int, 0644); ++MODULE_PARM_DESC(int_type, "force Interrupt Handler type: 0=INT-A, 1=MSI, 2=MSI-X. default INT-A mode"); ++ ++#define DRIVER_NAME "SAA716x Hybrid" ++ ++static int saa716x_hybrid_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) ++{ ++ struct saa716x_dev *saa716x; ++ int err = 0; ++ ++ saa716x = kzalloc(sizeof (struct saa716x_dev), GFP_KERNEL); ++ if (saa716x == NULL) { ++ printk(KERN_ERR "saa716x_hybrid_pci_probe ERROR: out of memory\n"); ++ err = -ENOMEM; ++ goto fail0; ++ } ++ ++ saa716x->verbose = verbose; ++ saa716x->int_type = int_type; ++ saa716x->pdev = pdev; ++ saa716x->config = (struct saa716x_config *) pci_id->driver_data; ++ ++ err = saa716x_pci_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x PCI Initialization failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_cgu_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x CGU Init failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_core_boot(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x Core Boot failed"); ++ goto fail2; ++ } ++ dprintk(SAA716x_DEBUG, 1, "SAA716x Core Boot Success"); ++ ++ err = saa716x_msi_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x MSI Init failed"); ++ goto fail2; ++ } ++ ++ err = saa716x_jetpack_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x Jetpack core Initialization failed"); ++ goto fail1; ++ } ++ ++ err = saa716x_i2c_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x I2C Initialization failed"); ++ goto fail3; ++ } ++ ++ saa716x_gpio_init(saa716x); ++ ++ err = saa716x_dump_eeprom(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); ++ } ++ ++ err = saa716x_eeprom_data(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x EEPROM dump failed"); ++ } ++ ++ /* enable decoders on 7162 */ ++ if (pdev->device == SAA7162) { ++ saa716x_gpio_set_output(saa716x, 24); ++ saa716x_gpio_set_output(saa716x, 25); ++ ++ saa716x_gpio_write(saa716x, 24, 0); ++ saa716x_gpio_write(saa716x, 25, 0); ++ ++ msleep(10); ++ ++ saa716x_gpio_write(saa716x, 24, 1); ++ saa716x_gpio_write(saa716x, 25, 1); ++ } ++ ++ /* set default port mapping */ ++ SAA716x_EPWR(GREG, GREG_VI_CTRL, 0x2C688F44); ++ /* enable FGPI3 and FGPI0 for TS input from Port 3 and 6 */ ++ SAA716x_EPWR(GREG, GREG_FGPI_CTRL, 0x894); ++ ++ err = saa716x_dvb_init(saa716x); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x DVB initialization failed"); ++ goto fail4; ++ } ++ ++ return 0; ++ ++fail4: ++ saa716x_dvb_exit(saa716x); ++fail3: ++ saa716x_i2c_exit(saa716x); ++fail2: ++ saa716x_pci_exit(saa716x); ++fail1: ++ kfree(saa716x); ++fail0: ++ return err; ++} ++ ++static void saa716x_hybrid_pci_remove(struct pci_dev *pdev) ++{ ++ struct saa716x_dev *saa716x = pci_get_drvdata(pdev); ++ ++ saa716x_dvb_exit(saa716x); ++ saa716x_i2c_exit(saa716x); ++ saa716x_pci_exit(saa716x); ++ kfree(saa716x); ++} ++ ++static irqreturn_t saa716x_hybrid_pci_irq(int irq, void *dev_id) ++{ ++ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; ++ ++ u32 stat_h, stat_l, mask_h, mask_l; ++ ++ if (unlikely(saa716x == NULL)) { ++ printk("%s: saa716x=NULL", __func__); ++ return IRQ_NONE; ++ } ++ ++ stat_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); ++ stat_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); ++ mask_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); ++ mask_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); ++ ++ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", ++ stat_l, stat_h, mask_l, mask_h); ++ ++ if (!((stat_l & mask_l) || (stat_h & mask_h))) ++ return IRQ_NONE; ++ ++ if (stat_l) ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, stat_l); ++ ++ if (stat_h) ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, stat_h); ++ ++ saa716x_msi_event(saa716x, stat_l, stat_h); ++#if 0 ++ dprintk(SAA716x_DEBUG, 1, "VI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", ++ SAA716x_EPRD(VI0, INT_STATUS), ++ SAA716x_EPRD(VI1, INT_STATUS), ++ SAA716x_EPRD(VI0, INT_ENABLE), ++ SAA716x_EPRD(VI1, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 0=<%02x> 1=<%02x>, CTL 1=<%02x> 2=<%02x>", ++ SAA716x_EPRD(FGPI0, INT_STATUS), ++ SAA716x_EPRD(FGPI1, INT_STATUS), ++ SAA716x_EPRD(FGPI0, INT_ENABLE), ++ SAA716x_EPRD(FGPI0, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "FGPI STAT 2=<%02x> 3=<%02x>, CTL 2=<%02x> 3=<%02x>", ++ SAA716x_EPRD(FGPI2, INT_STATUS), ++ SAA716x_EPRD(FGPI3, INT_STATUS), ++ SAA716x_EPRD(FGPI2, INT_ENABLE), ++ SAA716x_EPRD(FGPI3, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "AI STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(AI0, AI_STATUS), ++ SAA716x_EPRD(AI1, AI_STATUS), ++ SAA716x_EPRD(AI0, AI_CTL), ++ SAA716x_EPRD(AI1, AI_CTL)); ++ ++ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(I2C_A, INT_STATUS), ++ SAA716x_EPRD(I2C_B, INT_STATUS), ++ SAA716x_EPRD(I2C_A, INT_ENABLE), ++ SAA716x_EPRD(I2C_B, INT_ENABLE)); ++ ++ dprintk(SAA716x_DEBUG, 1, "DCS STAT=<%02x>, CTL=<%02x>", ++ SAA716x_EPRD(DCS, DCSC_INT_STATUS), ++ SAA716x_EPRD(DCS, DCSC_INT_ENABLE)); ++#endif ++ ++ if (stat_l) { ++ if (stat_l & MSI_INT_TAGACK_FGPI_0) { ++ tasklet_schedule(&saa716x->fgpi[0].tasklet); ++ } ++ if (stat_l & MSI_INT_TAGACK_FGPI_1) { ++ tasklet_schedule(&saa716x->fgpi[1].tasklet); ++ } ++ if (stat_l & MSI_INT_TAGACK_FGPI_2) { ++ tasklet_schedule(&saa716x->fgpi[2].tasklet); ++ } ++ if (stat_l & MSI_INT_TAGACK_FGPI_3) { ++ tasklet_schedule(&saa716x->fgpi[3].tasklet); ++ } ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void demux_worker(unsigned long data) ++{ ++ struct saa716x_fgpi_stream_port *fgpi_entry = (struct saa716x_fgpi_stream_port *)data; ++ struct saa716x_dev *saa716x = fgpi_entry->saa716x; ++ struct dvb_demux *demux; ++ u32 fgpi_index; ++ u32 i; ++ u32 write_index; ++ ++ fgpi_index = fgpi_entry->dma_channel - 6; ++ demux = NULL; ++ for (i = 0; i < saa716x->config->adapters; i++) { ++ if (saa716x->config->adap_config[i].ts_port == fgpi_index) { ++ demux = &saa716x->saa716x_adap[i].demux; ++ break; ++ } ++ } ++ if (demux == NULL) { ++ printk(KERN_ERR "%s: unexpected channel %u\n", ++ __func__, fgpi_entry->dma_channel); ++ return; ++ } ++ ++ write_index = saa716x_fgpi_get_write_index(saa716x, fgpi_index); ++ if (write_index < 0) ++ return; ++ ++ dprintk(SAA716x_DEBUG, 1, "dma buffer = %d", write_index); ++ ++ if (write_index == fgpi_entry->read_index) { ++ printk(KERN_DEBUG "%s: called but nothing to do\n", __func__); ++ return; ++ } ++ ++ do { ++ u8 *data = (u8 *)fgpi_entry->dma_buf[fgpi_entry->read_index].mem_virt; ++ ++ pci_dma_sync_sg_for_cpu(saa716x->pdev, ++ fgpi_entry->dma_buf[fgpi_entry->read_index].sg_list, ++ fgpi_entry->dma_buf[fgpi_entry->read_index].list_len, ++ PCI_DMA_FROMDEVICE); ++ ++ dvb_dmx_swfilter(demux, data, 348 * 188); ++ ++ fgpi_entry->read_index = (fgpi_entry->read_index + 1) & 7; ++ } while (write_index != fgpi_entry->read_index); ++} ++ ++/* ++ * Twinhan/Azurewave VP-6090 ++ * DVB-S Frontend: 2x MB86A16 ++ * DVB-T Frontend: 2x TDA10046 + TDA8275 ++ */ ++#define SAA716x_MODEL_TWINHAN_VP6090 "Twinhan/Azurewave VP-6090" ++#define SAA716x_DEV_TWINHAN_VP6090 "2xDVB-S + 2xDVB-T + 2xAnalog" ++ ++static int tda1004x_vp6090_request_firmware(struct dvb_frontend *fe, ++ const struct firmware **fw, ++ char *name) ++{ ++ struct saa716x_adapter *adapter = fe->dvb->priv; ++ ++ return request_firmware(fw, name, &adapter->saa716x->pdev->dev); ++} ++ ++static struct tda1004x_config tda1004x_vp6090_config = { ++ .demod_address = 0x8, ++ .invert = 0, ++ .invert_oclk = 0, ++ .xtal_freq = TDA10046_XTAL_4M, ++ .agc_config = TDA10046_AGC_DEFAULT, ++ .if_freq = TDA10046_FREQ_3617, ++ .request_firmware = tda1004x_vp6090_request_firmware, ++}; ++ ++static int vp6090_dvbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) ++{ ++ struct saa716x_dev *saa716x = fe->dvb->priv; ++ ++ switch (voltage) { ++ case SEC_VOLTAGE_13: ++ dprintk(SAA716x_ERROR, 1, "Polarization=[13V]"); ++ break; ++ case SEC_VOLTAGE_18: ++ dprintk(SAA716x_ERROR, 1, "Polarization=[18V]"); ++ break; ++ case SEC_VOLTAGE_OFF: ++ dprintk(SAA716x_ERROR, 1, "Frontend (dummy) POWERDOWN"); ++ break; ++ default: ++ dprintk(SAA716x_ERROR, 1, "Invalid = (%d)", (u32 ) voltage); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++struct mb86a16_config vp6090_mb86a16_config = { ++ .demod_address = 0x08, ++ .set_voltage = vp6090_dvbs_set_voltage, ++}; ++ ++static int saa716x_vp6090_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *i2c = &saa716x->i2c[count]; ++ ++ dprintk(SAA716x_ERROR, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++ dprintk(SAA716x_ERROR, 1, "Adapter (%d) Power ON", count); ++ ++ saa716x_gpio_set_output(saa716x, 11); ++ saa716x_gpio_set_output(saa716x, 10); ++ saa716x_gpio_write(saa716x, 11, 1); ++ saa716x_gpio_write(saa716x, 10, 1); ++ msleep(100); ++#if 0 ++ dprintk(SAA716x_ERROR, 1, "Probing for MB86A16 (DVB-S/DSS)"); ++ adapter->fe = mb86a16_attach(&vp6090_mb86a16_config, &i2c->i2c_adapter); ++ if (adapter->fe) { ++ dprintk(SAA716x_ERROR, 1, "found MB86A16 DVB-S/DSS frontend @0x%02x", ++ vp6090_mb86a16_config.demod_address); ++ ++ } else { ++ goto exit; ++ } ++#endif ++ adapter->fe = tda10046_attach(&tda1004x_vp6090_config, &i2c->i2c_adapter); ++ if (adapter->fe == NULL) { ++ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); ++ return -ENODEV; ++ } else { ++ dprintk(SAA716x_ERROR, 1, "Done!"); ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static struct saa716x_config saa716x_vp6090_config = { ++ .model_name = SAA716x_MODEL_TWINHAN_VP6090, ++ .dev_type = SAA716x_DEV_TWINHAN_VP6090, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_vp6090_frontend_attach, ++ .irq_handler = saa716x_hybrid_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++/* ++ * NXP Reference design (Atlantis) ++ * 2x DVB-T Frontend: 2x TDA10046 ++ * Analog Decoder: 2x Internal ++ */ ++#define SAA716x_MODEL_NXP_ATLANTIS "Atlantis reference board" ++#define SAA716x_DEV_NXP_ATLANTIS "2x DVB-T + 2x Analog" ++ ++static int tda1004x_atlantis_request_firmware(struct dvb_frontend *fe, ++ const struct firmware **fw, ++ char *name) ++{ ++ struct saa716x_adapter *adapter = fe->dvb->priv; ++ ++ return request_firmware(fw, name, &adapter->saa716x->pdev->dev); ++} ++ ++static struct tda1004x_config tda1004x_atlantis_config = { ++ .demod_address = 0x8, ++ .invert = 0, ++ .invert_oclk = 0, ++ .xtal_freq = TDA10046_XTAL_16M, ++ .agc_config = TDA10046_AGC_TDA827X, ++ .if_freq = TDA10046_FREQ_045, ++ .request_firmware = tda1004x_atlantis_request_firmware, ++ .tuner_address = 0x60, ++}; ++ ++static struct tda827x_config tda827x_atlantis_config = { ++ .init = NULL, ++ .sleep = NULL, ++ .config = 0, ++ .switch_addr = 0, ++ .agcf = NULL, ++}; ++ ++static int saa716x_atlantis_frontend_attach(struct saa716x_adapter *adapter, ++ int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *i2c; ++ u8 i2c_buf[3] = { 0x05, 0x23, 0x01 }; /* activate the silent I2C bus */ ++ struct i2c_msg msg = { ++ .addr = 0x42 >> 1, ++ .flags = 0, ++ .buf = i2c_buf, ++ .len = sizeof(i2c_buf) ++ }; ++ ++ if (count < saa716x->config->adapters) { ++ u32 reset_gpio; ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", ++ count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, ++ saa716x->pdev->subsystem_device); ++ ++ if (count == 0) { ++ reset_gpio = 14; ++ i2c = &saa716x->i2c[SAA716x_I2C_BUS_A]; ++ } else { ++ reset_gpio = 15; ++ i2c = &saa716x->i2c[SAA716x_I2C_BUS_B]; ++ } ++ ++ /* activate the silent I2C bus */ ++ i2c_transfer(&i2c->i2c_adapter, &msg, 1); ++ ++ saa716x_gpio_set_output(saa716x, reset_gpio); ++ ++ /* Reset the demodulator */ ++ saa716x_gpio_write(saa716x, reset_gpio, 1); ++ msleep(10); ++ saa716x_gpio_write(saa716x, reset_gpio, 0); ++ msleep(10); ++ saa716x_gpio_write(saa716x, reset_gpio, 1); ++ msleep(10); ++ ++ adapter->fe = tda10046_attach(&tda1004x_atlantis_config, ++ &i2c->i2c_adapter); ++ if (adapter->fe == NULL) ++ goto exit; ++ ++ dprintk(SAA716x_ERROR, 1, ++ "found TDA10046 DVB-T frontend @0x%02x", ++ tda1004x_atlantis_config.demod_address); ++ ++ if (dvb_attach(tda827x_attach, adapter->fe, ++ tda1004x_atlantis_config.tuner_address, ++ &i2c->i2c_adapter, &tda827x_atlantis_config)) { ++ dprintk(SAA716x_ERROR, 1, "found TDA8275 tuner @0x%02x", ++ tda1004x_atlantis_config.tuner_address); ++ } else { ++ goto exit; ++ } ++ ++ dprintk(SAA716x_ERROR, 1, "Done!"); ++ return 0; ++ } ++ ++exit: ++ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_atlantis_config = { ++ .model_name = SAA716x_MODEL_NXP_ATLANTIS, ++ .dev_type = SAA716x_DEV_NXP_ATLANTIS, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 2, ++ .frontend_attach = saa716x_atlantis_frontend_attach, ++ .irq_handler = saa716x_hybrid_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++ .adap_config = { ++ { ++ /* Adapter 0 */ ++ .ts_port = 3, /* using FGPI 3 */ ++ .worker = demux_worker ++ }, ++ { ++ /* Adapter 1 */ ++ .ts_port = 0, /* using FGPI 0 */ ++ .worker = demux_worker ++ } ++ } ++}; ++ ++/* ++ * NXP Reference design (NEMO) ++ * DVB-T Frontend: 1x TDA10046 + TDA8275 ++ * Analog Decoder: External SAA7136 ++ */ ++#define SAA716x_MODEL_NXP_NEMO "NEMO reference board" ++#define SAA716x_DEV_NXP_NEMO "DVB-T + Analog" ++ ++static int tda1004x_nemo_request_firmware(struct dvb_frontend *fe, ++ const struct firmware **fw, ++ char *name) ++{ ++ struct saa716x_adapter *adapter = fe->dvb->priv; ++ ++ return request_firmware(fw, name, &adapter->saa716x->pdev->dev); ++} ++ ++static struct tda1004x_config tda1004x_nemo_config = { ++ .demod_address = 0x8, ++ .invert = 0, ++ .invert_oclk = 0, ++ .xtal_freq = TDA10046_XTAL_16M, ++ .agc_config = TDA10046_AGC_TDA827X, ++ .if_freq = TDA10046_FREQ_045, ++ .request_firmware = tda1004x_nemo_request_firmware, ++ .tuner_address = 0x60, ++}; ++ ++static struct tda827x_config tda827x_nemo_config = { ++ .init = NULL, ++ .sleep = NULL, ++ .config = 0, ++ .switch_addr = 0, ++ .agcf = NULL, ++}; ++ ++static int saa716x_nemo_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ struct saa716x_i2c *demod_i2c = &saa716x->i2c[SAA716x_I2C_BUS_B]; ++ struct saa716x_i2c *tuner_i2c = &saa716x->i2c[SAA716x_I2C_BUS_A]; ++ ++ ++ if (count == 0) { ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ dprintk(SAA716x_ERROR, 1, "Adapter (%d) Power ON", count); ++ ++ /* GPIO 26 controls a +15dB gain */ ++ saa716x_gpio_set_output(saa716x, 26); ++ saa716x_gpio_write(saa716x, 26, 0); ++ ++ saa716x_gpio_set_output(saa716x, 14); ++ ++ /* Reset the demodulator */ ++ saa716x_gpio_write(saa716x, 14, 1); ++ msleep(10); ++ saa716x_gpio_write(saa716x, 14, 0); ++ msleep(10); ++ saa716x_gpio_write(saa716x, 14, 1); ++ msleep(10); ++ ++ adapter->fe = tda10046_attach(&tda1004x_nemo_config, ++ &demod_i2c->i2c_adapter); ++ if (adapter->fe) { ++ dprintk(SAA716x_ERROR, 1, "found TDA10046 DVB-T frontend @0x%02x", ++ tda1004x_nemo_config.demod_address); ++ ++ } else { ++ goto exit; ++ } ++ if (dvb_attach(tda827x_attach, adapter->fe, ++ tda1004x_nemo_config.tuner_address, ++ &tuner_i2c->i2c_adapter, &tda827x_nemo_config)) { ++ dprintk(SAA716x_ERROR, 1, "found TDA8275 tuner @0x%02x", ++ tda1004x_nemo_config.tuner_address); ++ } else { ++ goto exit; ++ } ++ dprintk(SAA716x_ERROR, 1, "Done!"); ++ } ++ ++ return 0; ++exit: ++ dprintk(SAA716x_ERROR, 1, "Frontend attach failed"); ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_nemo_config = { ++ .model_name = SAA716x_MODEL_NXP_NEMO, ++ .dev_type = SAA716x_DEV_NXP_NEMO, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_nemo_frontend_attach, ++ .irq_handler = saa716x_hybrid_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++ ++ .adap_config = { ++ { ++ /* Adapter 0 */ ++ .ts_port = 3, /* using FGPI 3 */ ++ .worker = demux_worker ++ } ++ } ++}; ++ ++ ++#define SAA716x_MODEL_AVERMEDIA_HC82 "Avermedia HC82 Express-54" ++#define SAA716x_DEV_AVERMEDIA_HC82 "DVB-T + Analog" ++ ++#if 0 ++static struct zl10353_config saa716x_averhc82_zl10353_config = { ++ .demod_address = 0x1f, ++ .adc_clock = 450560, ++ .if2 = 361667, ++ .no_tuner = 1, ++ .parallel_ts = 1, ++}; ++#endif ++ ++static int saa716x_averhc82_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++// adapter->fe = zl10353_attach(&saa716x_averhc82_zl10353_config, &i2c->i2c_adapter); ++ ++ ++ return 0; ++} ++ ++static struct saa716x_config saa716x_averhc82_config = { ++ .model_name = SAA716x_MODEL_AVERMEDIA_HC82, ++ .dev_type = SAA716x_DEV_AVERMEDIA_HC82, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_averhc82_frontend_attach, ++ .irq_handler = saa716x_hybrid_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++#define SAA716x_MODEL_AVERMEDIA_H788 "Avermedia H788" ++#define SAA716x_DEV_AVERMEDIA_H788 "DVB-T + Analaog" ++ ++static int saa716x_averh88_frontend_attach(struct saa716x_adapter *adapter, int count) ++{ ++ struct saa716x_dev *saa716x = adapter->saa716x; ++ ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) SAA716x frontend Init", count); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%d) Device ID=%02x", count, saa716x->pdev->subsystem_device); ++ ++ return -ENODEV; ++} ++ ++static struct saa716x_config saa716x_averh788_config = { ++ .model_name = SAA716x_MODEL_AVERMEDIA_H788, ++ .dev_type = SAA716x_DEV_AVERMEDIA_H788, ++ .boot_mode = SAA716x_EXT_BOOT, ++ .adapters = 1, ++ .frontend_attach = saa716x_averh88_frontend_attach, ++ .irq_handler = saa716x_hybrid_pci_irq, ++ .i2c_rate = SAA716x_I2C_RATE_100, ++}; ++ ++static struct pci_device_id saa716x_hybrid_pci_table[] = { ++ ++ MAKE_ENTRY(TWINHAN_TECHNOLOGIES, TWINHAN_VP_6090, SAA7162, &saa716x_vp6090_config), ++ MAKE_ENTRY(AVERMEDIA, AVERMEDIA_HC82, SAA7160, &saa716x_averhc82_config), ++ MAKE_ENTRY(AVERMEDIA, AVERMEDIA_H788, SAA7160, &saa716x_averh788_config), ++ MAKE_ENTRY(KWORLD, KWORLD_DVB_T_PE310, SAA7162, &saa716x_atlantis_config), ++ MAKE_ENTRY(NXP_REFERENCE_BOARD, PCI_ANY_ID, SAA7162, &saa716x_atlantis_config), ++ MAKE_ENTRY(NXP_REFERENCE_BOARD, PCI_ANY_ID, SAA7160, &saa716x_nemo_config), ++ { } ++}; ++MODULE_DEVICE_TABLE(pci, saa716x_hybrid_pci_table); ++ ++static struct pci_driver saa716x_hybrid_pci_driver = { ++ .name = DRIVER_NAME, ++ .id_table = saa716x_hybrid_pci_table, ++ .probe = saa716x_hybrid_pci_probe, ++ .remove = saa716x_hybrid_pci_remove, ++}; ++ ++static int saa716x_hybrid_init(void) ++{ ++ return pci_register_driver(&saa716x_hybrid_pci_driver); ++} ++ ++static void saa716x_hybrid_exit(void) ++{ ++ return pci_unregister_driver(&saa716x_hybrid_pci_driver); ++} ++ ++module_init(saa716x_hybrid_init); ++module_exit(saa716x_hybrid_exit); ++ ++MODULE_DESCRIPTION("SAA716x Hybrid driver"); ++MODULE_AUTHOR("Manu Abraham"); ++MODULE_LICENSE("GPL"); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_hybrid.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_hybrid.h 2013-01-16 10:41:10.920798217 +0100 +@@ -0,0 +1,13 @@ ++#ifndef __SAA716x_HYBRID_H ++#define __SAA716x_HYBRID_H ++ ++#define TWINHAN_TECHNOLOGIES 0x1822 ++#define AVERMEDIA 0x1461 ++#define KWORLD 0x17DE ++ ++#define TWINHAN_VP_6090 0x0027 ++#define AVERMEDIA_HC82 0x2355 ++#define AVERMEDIA_H788 0x1455 ++#define KWORLD_DVB_T_PE310 0x7521 ++ ++#endif /* __SAA716x_HYBRID_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.c 2013-01-16 10:41:10.921798210 +0100 +@@ -0,0 +1,738 @@ ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_i2c_reg.h" ++#include "saa716x_msi_reg.h" ++#include "saa716x_cgu_reg.h" ++ ++#include "saa716x_i2c.h" ++#include "saa716x_msi.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++#define SAA716x_I2C_TXFAIL (I2C_ERROR_IBE | \ ++ I2C_ACK_INTER_MTNA | \ ++ I2C_FAILURE_INTER_MAF) ++ ++#define SAA716x_I2C_TXBUSY (I2C_TRANSMIT | \ ++ I2C_TRANSMIT_PROG) ++ ++#define SAA716x_I2C_RXBUSY (I2C_RECEIVE | \ ++ I2C_RECEIVE_CLEAR) ++ ++static const char* state[] = { ++ "Idle", ++ "DoneStop", ++ "Busy", ++ "TOscl", ++ "TOarb", ++ "DoneWrite", ++ "DoneRead", ++ "DoneWriteTO", ++ "DoneReadTO", ++ "NoDevice", ++ "NoACK", ++ "BUSErr", ++ "ArbLost", ++ "SEQErr", ++ "STErr" ++}; ++ ++int saa716x_i2c_irqevent(struct saa716x_dev *saa716x, u8 bus) ++{ ++ u32 stat, mask; ++ u32 *I2C_DEV; ++ ++ BUG_ON(saa716x == NULL); ++ I2C_DEV = saa716x->I2C_DEV; ++ ++ stat = SAA716x_EPRD(I2C_DEV[bus], INT_STATUS); ++ mask = SAA716x_EPRD(I2C_DEV[bus], INT_ENABLE); ++ saa716x->i2c[bus].i2c_stat = stat; ++ dprintk(SAA716x_DEBUG, 0, "Bus(%d) I2C event: Status=<%s> --> Stat=<%02x> Mask=<%02x>", ++ bus, state[stat], stat, mask); ++ ++ if (!(stat & mask)) ++ return -1; ++ ++ SAA716x_EPWR(I2C_DEV[bus], INT_CLR_STATUS, stat); ++ ++ if (stat & I2C_INTERRUPT_STFNF) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_INTERRUPT_MTFNF) { ++ dprintk(SAA716x_DEBUG, 0, " "); ++ } ++ ++ if (stat & I2C_INTERRUPT_RFDA) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_INTERRUPTE_RFF) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_SLAVE_INTERRUPT_STDR) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_MASTER_INTERRUPT_MTDR) { ++ dprintk(SAA716x_DEBUG, 0, " "); ++ } ++ ++ if (stat & I2C_ERROR_IBE) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_MODE_CHANGE_INTER_MSMC) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_SLAVE_RECEIVE_INTER_SRSD) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_SLAVE_TRANSMIT_INTER_STSD) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_ACK_INTER_MTNA) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_FAILURE_INTER_MAF) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ if (stat & I2C_INTERRUPT_MTD) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ return 0; ++} ++ ++static irqreturn_t saa716x_i2c_irq(int irq, void *dev_id) ++{ ++ struct saa716x_dev *saa716x = (struct saa716x_dev *) dev_id; ++ ++ if (unlikely(saa716x == NULL)) { ++ printk("%s: saa716x=NULL", __func__); ++ return IRQ_NONE; ++ } ++ dprintk(SAA716x_DEBUG, 1, "MSI STAT L=<%02x> H=<%02x>, CTL L=<%02x> H=<%02x>", ++ SAA716x_EPRD(MSI, MSI_INT_STATUS_L), ++ SAA716x_EPRD(MSI, MSI_INT_STATUS_H), ++ SAA716x_EPRD(MSI, MSI_INT_ENA_L), ++ SAA716x_EPRD(MSI, MSI_INT_ENA_H)); ++ ++ dprintk(SAA716x_DEBUG, 1, "I2C STAT 0=<%02x> 1=<%02x>, CTL 0=<%02x> 1=<%02x>", ++ SAA716x_EPRD(I2C_A, INT_STATUS), ++ SAA716x_EPRD(I2C_B, INT_STATUS), ++ SAA716x_EPRD(I2C_A, INT_CLR_STATUS), ++ SAA716x_EPRD(I2C_B, INT_CLR_STATUS)); ++ ++ return IRQ_HANDLED; ++} ++ ++static void saa716x_term_xfer(struct saa716x_i2c *i2c, u32 I2C_DEV) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xc0); /* Start: SCL/SDA High */ ++ msleep(10); ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0x80); ++ msleep(10); ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0x00); ++ msleep(10); ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0x80); ++ msleep(10); ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xc0); ++ ++ return; ++} ++ ++static void saa716x_i2c_hwdeinit(struct saa716x_i2c *i2c, u32 I2C_DEV) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ ++ /* Disable all interrupts and clear status */ ++ SAA716x_EPWR(I2C_DEV, INT_CLR_ENABLE, 0x1fff); ++ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); ++} ++ ++static int saa716x_i2c_hwinit(struct saa716x_i2c *i2c, u32 I2C_DEV) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ struct i2c_adapter *adapter = &i2c->i2c_adapter; ++ ++ int i, err = 0; ++ u32 reg; ++ ++ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); ++ if (!(reg & 0xd)) { ++ dprintk(SAA716x_ERROR, 1, "Adapter (%02x) %s RESET failed, Exiting !", ++ I2C_DEV, adapter->name); ++ err = -EIO; ++ goto exit; ++ } ++ ++ /* Flush queue */ ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xcc); ++ ++ /* Disable all interrupts and clear status */ ++ SAA716x_EPWR(I2C_DEV, INT_CLR_ENABLE, 0x1fff); ++ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); ++ ++ /* Reset I2C Core and generate a delay */ ++ SAA716x_EPWR(I2C_DEV, I2C_CONTROL, 0xc1); ++ ++ for (i = 0; i < 100; i++) { ++ reg = SAA716x_EPRD(I2C_DEV, I2C_CONTROL); ++ if (reg == 0xc0) { ++ dprintk(SAA716x_ERROR, 1, "Adapter (%02x) %s RESET", ++ I2C_DEV, adapter->name); ++ break; ++ } ++ msleep(1); ++ ++ if (i == 99) ++ err = -EIO; ++ } ++ ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "Adapter (%02x) %s RESET failed", ++ I2C_DEV, adapter->name); ++ ++ saa716x_term_xfer(i2c, I2C_DEV); ++ err = -EIO; ++ goto exit; ++ } ++ ++ /* I2C Rate Setup */ ++ switch (i2c->i2c_rate) { ++ case SAA716x_I2C_RATE_400: ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing Adapter %s @ 400k", adapter->name); ++ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_HIGH, 0x1a); /* 0.5 * 27MHz/400kHz */ ++ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_LOW, 0x21); /* 0.5 * 27MHz/400kHz */ ++ SAA716x_EPWR(I2C_DEV, I2C_SDA_HOLD, 0x19); ++ break; ++ ++ case SAA716x_I2C_RATE_100: ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing Adapter %s @ 100k", adapter->name); ++ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_HIGH, 0x68); /* 0.5 * 27MHz/100kHz */ ++ SAA716x_EPWR(I2C_DEV, I2C_CLOCK_DIVISOR_LOW, 0x87); /* 0.5 * 27MHz/100kHz */ ++ SAA716x_EPWR(I2C_DEV, I2C_SDA_HOLD, 0x60); ++ break; ++ ++ default: ++ ++ dprintk(SAA716x_ERROR, 1, "Adapter %s Unknown Rate (Rate=0x%02x)", ++ adapter->name, ++ i2c->i2c_rate); ++ ++ break; ++ } ++ ++ /* Disable all interrupts and clear status */ ++ SAA716x_EPWR(I2C_DEV, INT_CLR_ENABLE, 0x1fff); ++ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); ++ ++ if (i2c->i2c_mode >= SAA716x_I2C_MODE_IRQ) { ++ /* Enabled interrupts: ++ * Master Transaction Done, ++ * Master Transaction Data Request ++ * (0x81) ++ */ ++ msleep(5); ++ ++ SAA716x_EPWR(I2C_DEV, INT_SET_ENABLE, ++ I2C_SET_ENABLE_MTDR | I2C_SET_ENABLE_MTD); ++ ++ /* Check interrupt enable status */ ++ reg = SAA716x_EPRD(I2C_DEV, INT_ENABLE); ++ if (reg != 0x81) { ++ ++ dprintk(SAA716x_ERROR, 1, ++ "Adapter (%d) %s Interrupt enable failed, Exiting !", ++ i, ++ adapter->name); ++ ++ err = -EIO; ++ goto exit; ++ } ++ } ++ ++ /* Check status */ ++ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); ++ if (!(reg & 0xd)) { ++ ++ dprintk(SAA716x_ERROR, 1, ++ "Adapter (%02x) %s has bad state, Exiting !", ++ I2C_DEV, ++ adapter->name); ++ ++ err = -EIO; ++ goto exit; ++ } ++#if 0 ++ saa716x_add_irqvector(saa716x, ++ i2c_vec[i].vector, ++ i2c_vec[i].edge, ++ i2c_vec[i].handler, ++ SAA716x_I2C_ADAPTER(i)); ++#endif ++ reg = SAA716x_EPRD(CGU, CGU_SCR_3); ++ dprintk(SAA716x_DEBUG, 1, "Adapter (%02x) Autowake <%d> Active <%d>", ++ I2C_DEV, ++ (reg >> 1) & 0x01, ++ reg & 0x01); ++ ++ return 0; ++exit: ++ return err; ++} ++ ++static int saa716x_i2c_send(struct saa716x_i2c *i2c, u32 I2C_DEV, u32 data) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ int i, err = 0; ++ u32 reg; ++ ++ if (i2c->i2c_mode >= SAA716x_I2C_MODE_IRQ) { ++ /* Write to FIFO */ ++ SAA716x_EPWR(I2C_DEV, TX_FIFO, data); ++ return 0; ++ } ++ ++ /* Check FIFO status before TX */ ++ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); ++ i2c->stat_tx_prior = reg; ++ if (reg & SAA716x_I2C_TXBUSY) { ++ for (i = 0; i < 100; i++) { ++ /* TODO! check for hotplug devices */ ++ msleep(10); ++ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); ++ ++ if (reg & SAA716x_I2C_TXBUSY) { ++ dprintk(SAA716x_ERROR, 1, "FIFO full or Blocked"); ++ ++ err = saa716x_i2c_hwinit(i2c, I2C_DEV); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Error Reinit"); ++ err = -EIO; ++ goto exit; ++ } ++ } else { ++ break; ++ } ++ } ++ } ++ ++ /* Write to FIFO */ ++ SAA716x_EPWR(I2C_DEV, TX_FIFO, data); ++ ++ /* Check for data write */ ++ for (i = 0; i < 1000; i++) { ++ /* TODO! check for hotplug devices */ ++ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); ++ if (reg & I2C_TRANSMIT_CLEAR) { ++ break; ++ } ++ } ++ i2c->stat_tx_done = reg; ++ ++ if (!(reg & I2C_TRANSMIT_CLEAR)) { ++ dprintk(SAA716x_ERROR, 1, "TXFIFO not empty after Timeout, tried %d loops!", i); ++ err = -EIO; ++ goto exit; ++ } ++ ++ return err; ++ ++exit: ++ dprintk(SAA716x_ERROR, 1, "I2C Send failed (Err=%d)", err); ++ return err; ++} ++ ++static int saa716x_i2c_recv(struct saa716x_i2c *i2c, u32 I2C_DEV, u32 *data) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ int i, err = 0; ++ u32 reg; ++ ++ /* Check FIFO status before RX */ ++ for (i = 0; i < 1000; i++) { ++ reg = SAA716x_EPRD(I2C_DEV, I2C_STATUS); ++ if (!(reg & SAA716x_I2C_RXBUSY)) { ++ break; ++ } ++ } ++ if (reg & SAA716x_I2C_RXBUSY) { ++ dprintk(SAA716x_INFO, 1, "FIFO empty"); ++ err = -EIO; ++ goto exit; ++ } ++ ++ /* Read from FIFO */ ++ *data = SAA716x_EPRD(I2C_DEV, RX_FIFO); ++ ++ return 0; ++exit: ++ dprintk(SAA716x_ERROR, 1, "Error Reading data, err=%d", err); ++ return err; ++} ++ ++static void saa716x_i2c_irq_start(struct saa716x_i2c *i2c, u32 I2C_DEV) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ ++ if (i2c->i2c_mode == SAA716x_I2C_MODE_POLLING) ++ return; ++ ++ i2c->i2c_op = 1; ++ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); ++} ++ ++static int saa716x_i2c_irq_wait(struct saa716x_i2c *i2c, u32 I2C_DEV) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ unsigned long timeout; ++ int err = 0; ++ ++ if (i2c->i2c_mode == SAA716x_I2C_MODE_POLLING) ++ return 0; ++ ++ timeout = HZ/100 + 1; /* 10ms */ ++ timeout = wait_event_interruptible_timeout(i2c->i2c_wq, i2c->i2c_op == 0, timeout); ++ if (timeout == -ERESTARTSYS || i2c->i2c_op) { ++ SAA716x_EPWR(I2C_DEV, INT_CLR_STATUS, 0x1fff); ++ if (timeout == -ERESTARTSYS) { ++ /* a signal arrived */ ++ err = -ERESTARTSYS; ++ } else { ++ dprintk(SAA716x_ERROR, 1, "timed out waiting for end of xfer!"); ++ err = -EIO; ++ } ++ } ++ return err; ++} ++ ++static int saa716x_i2c_write_msg(struct saa716x_i2c *i2c, u32 I2C_DEV, ++ u16 addr, u8 *buf, u16 len, u8 add_stop) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ u32 data; ++ int err; ++ int i; ++ int bytes; ++ ++ saa716x_i2c_irq_start(i2c, I2C_DEV); ++ ++ /* first write START with I2C address */ ++ data = I2C_START_BIT | (addr << 1); ++ dprintk(SAA716x_DEBUG, 1, "length=%d Addr:0x%02x", len, data); ++ err = saa716x_i2c_send(i2c, I2C_DEV, data); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Address write failed"); ++ goto exit; ++ } ++ ++ bytes = i2c->block_size - 1; ++ ++ /* now write the data */ ++ while (len > 0) { ++ if (bytes == i2c->block_size) { ++ /* this is not the first round, so restart irq */ ++ saa716x_i2c_irq_start(i2c, I2C_DEV); ++ } ++ ++ if (bytes > len) ++ bytes = len; ++ ++ for (i = 0; i < bytes; i++) { ++ data = buf[i]; ++ dprintk(SAA716x_DEBUG, 0, " 0x%02x\n", i, data); ++ if (add_stop && i == (len - 1)) ++ data |= I2C_STOP_BIT; ++ err = saa716x_i2c_send(i2c, I2C_DEV, data); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Data send failed"); ++ goto exit; ++ } ++ } ++ ++ err = saa716x_i2c_irq_wait(i2c, I2C_DEV); ++ if (err < 0) { ++ goto exit; ++ } ++ ++ len -= bytes; ++ buf += bytes; ++ bytes = i2c->block_size; ++ } ++ ++ return 0; ++ ++exit: ++ dprintk(SAA716x_ERROR, 1, "Error writing data, err=%d", err); ++ return err; ++} ++ ++static int saa716x_i2c_read_msg(struct saa716x_i2c *i2c, u32 I2C_DEV, ++ u16 addr, u8 *buf, u16 len, u8 add_stop) ++{ ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ u32 data; ++ int err; ++ int i; ++ int bytes; ++ ++ saa716x_i2c_irq_start(i2c, I2C_DEV); ++ ++ /* first write START with I2C address */ ++ data = I2C_START_BIT | (addr << 1) | 1; ++ dprintk(SAA716x_DEBUG, 1, "length=%d Addr:0x%02x", len, data); ++ err = saa716x_i2c_send(i2c, I2C_DEV, data); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Address write failed"); ++ goto exit; ++ } ++ ++ bytes = i2c->block_size - 1; ++ ++ /* now read the data */ ++ while (len > 0) { ++ if (bytes == i2c->block_size) { ++ /* this is not the first round, so restart irq */ ++ saa716x_i2c_irq_start(i2c, I2C_DEV); ++ } ++ ++ if (bytes > len) ++ bytes = len; ++ ++ for (i = 0; i < bytes; i++) { ++ data = 0x00; /* dummy write for reading */ ++ if (add_stop && i == (len - 1)) ++ data |= I2C_STOP_BIT; ++ err = saa716x_i2c_send(i2c, I2C_DEV, data); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Data send failed"); ++ goto exit; ++ } ++ } ++ ++ err = saa716x_i2c_irq_wait(i2c, I2C_DEV); ++ if (err < 0) { ++ goto exit; ++ } ++ ++ for (i = 0; i < bytes; i++) { ++ err = saa716x_i2c_recv(i2c, I2C_DEV, &data); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Data receive failed"); ++ goto exit; ++ } ++ dprintk(SAA716x_DEBUG, 0, " 0x%02x\n\n", i, data); ++ buf[i] = data; ++ } ++ ++ len -= bytes; ++ buf += bytes; ++ bytes = i2c->block_size; ++ } ++ ++ return 0; ++ ++exit: ++ dprintk(SAA716x_ERROR, 1, "Error reading data, err=%d", err); ++ return err; ++} ++ ++static int saa716x_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) ++{ ++ struct saa716x_i2c *i2c = i2c_get_adapdata(adapter); ++ struct saa716x_dev *saa716x = i2c->saa716x; ++ ++ u32 DEV = SAA716x_I2C_BUS(i2c->i2c_dev); ++ int i, j, err = 0; ++ int t; ++ ++ dprintk(SAA716x_DEBUG, 0, "\n"); ++ dprintk(SAA716x_DEBUG, 1, "Bus(%02x) I2C transfer", DEV); ++ mutex_lock(&i2c->i2c_lock); ++ ++ for (t = 0; t < 3; t++) { ++ for (i = 0; i < num; i++) { ++ if (msgs[i].flags & I2C_M_RD) ++ err = saa716x_i2c_read_msg(i2c, DEV, ++ msgs[i].addr, msgs[i].buf, msgs[i].len, ++ i == (num - 1)); ++ else ++ err = saa716x_i2c_write_msg(i2c, DEV, ++ msgs[i].addr, msgs[i].buf, msgs[i].len, ++ i == (num - 1)); ++ if (err < 0) { ++ err = -EIO; ++ goto retry; ++ } ++ } ++ break; ++retry: ++ dprintk(SAA716x_INFO, 1, "Error in Transfer, try %d", t); ++ for (i = 0; i < num; i++) { ++ dprintk(SAA716x_INFO, 1, "msg %d, addr = 0x%02x, len=%d, flags=0x%x", ++ i, msgs[i].addr, msgs[i].len, msgs[i].flags); ++ if (!(msgs[i].flags & I2C_M_RD)) { ++ for (j = 0; j < msgs[i].len; j++) { ++ dprintk(SAA716x_INFO, 1, " 0x%02x", ++ j, msgs[i].buf[j]); ++ } ++ } ++ } ++ err = saa716x_i2c_hwinit(i2c, DEV); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Error Reinit"); ++ err = -EIO; ++ goto bail_out; ++ } ++ } ++ ++ mutex_unlock(&i2c->i2c_lock); ++ return num; ++ ++bail_out: ++ dprintk(SAA716x_ERROR, 1, "ERROR: Bailing out <%d>", err); ++ mutex_unlock(&i2c->i2c_lock); ++ return err; ++} ++ ++static u32 saa716x_i2c_func(struct i2c_adapter *adapter) ++{ ++ return I2C_FUNC_SMBUS_EMUL; ++} ++ ++static const struct i2c_algorithm saa716x_algo = { ++ .master_xfer = saa716x_i2c_xfer, ++ .functionality = saa716x_i2c_func, ++}; ++ ++struct saa716x_i2cvec { ++ u32 vector; ++ enum saa716x_edge edge; ++ irqreturn_t (*handler)(int irq, void *dev_id); ++}; ++ ++static const struct saa716x_i2cvec i2c_vec[] = { ++ { ++ .vector = I2CINT_0, ++ .edge = SAA716x_EDGE_RISING, ++ .handler = saa716x_i2c_irq ++ }, { ++ .vector = I2CINT_1, ++ .edge = SAA716x_EDGE_RISING, ++ .handler = saa716x_i2c_irq ++ } ++}; ++ ++int saa716x_i2c_init(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ struct saa716x_i2c *i2c = saa716x->i2c; ++ struct i2c_adapter *adapter = NULL; ++ ++ int i, err = 0; ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing SAA%02x I2C Core", ++ saa716x->pdev->device); ++ ++ for (i = 0; i < SAA716x_I2C_ADAPTERS; i++) { ++ ++ mutex_init(&i2c->i2c_lock); ++ ++ init_waitqueue_head(&i2c->i2c_wq); ++ i2c->i2c_op = 0; ++ ++ i2c->i2c_dev = i; ++ i2c->i2c_rate = saa716x->config->i2c_rate; ++ i2c->i2c_mode = saa716x->config->i2c_mode; ++ adapter = &i2c->i2c_adapter; ++ ++ if (i2c->i2c_mode == SAA716x_I2C_MODE_IRQ_BUFFERED) ++ i2c->block_size = 8; ++ else ++ i2c->block_size = 1; ++ ++ if (adapter != NULL) { ++ ++ i2c_set_adapdata(adapter, i2c); ++ ++ strcpy(adapter->name, SAA716x_I2C_ADAPTER(i)); ++ ++ adapter->owner = THIS_MODULE; ++ adapter->algo = &saa716x_algo; ++ adapter->algo_data = NULL; ++ adapter->timeout = 500; /* FIXME ! */ ++ adapter->retries = 3; /* FIXME ! */ ++ adapter->dev.parent = &pdev->dev; ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing adapter (%d) %s", ++ i, ++ adapter->name); ++ ++ err = i2c_add_adapter(adapter); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Adapter (%d) %s init failed", i, adapter->name); ++ goto exit; ++ } ++ ++ i2c->saa716x = saa716x; ++ saa716x_i2c_hwinit(i2c, SAA716x_I2C_BUS(i)); ++ } ++ i2c++; ++ } ++ ++ if (saa716x->config->i2c_mode >= SAA716x_I2C_MODE_IRQ) { ++ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, MSI_INT_I2CINT_0); ++ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, MSI_INT_I2CINT_1); ++ } ++ ++ dprintk(SAA716x_DEBUG, 1, "SAA%02x I2C Core succesfully initialized", ++ saa716x->pdev->device); ++ ++ return 0; ++exit: ++ return err; ++} ++EXPORT_SYMBOL_GPL(saa716x_i2c_init); ++ ++int saa716x_i2c_exit(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_i2c *i2c = saa716x->i2c; ++ struct i2c_adapter *adapter = NULL; ++ int i, err = 0; ++ ++ dprintk(SAA716x_DEBUG, 1, "Removing SAA%02x I2C Core", saa716x->pdev->device); ++ ++ for (i = 0; i < SAA716x_I2C_ADAPTERS; i++) { ++ ++ adapter = &i2c->i2c_adapter; ++#if 0 ++ saa716x_remove_irqvector(saa716x, i2c_vec[i].vector); ++#endif ++ saa716x_i2c_hwdeinit(i2c, SAA716x_I2C_BUS(i)); ++ dprintk(SAA716x_DEBUG, 1, "Removing adapter (%d) %s", i, adapter->name); ++ ++ err = i2c_del_adapter(adapter); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "Adapter (%d) %s remove failed", i, adapter->name); ++ goto exit; ++ } ++ i2c++; ++ } ++ dprintk(SAA716x_DEBUG, 1, "SAA%02x I2C Core succesfully removed", saa716x->pdev->device); ++ ++ return 0; ++ ++exit: ++ return err; ++} ++EXPORT_SYMBOL_GPL(saa716x_i2c_exit); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c.h 2013-01-16 10:41:10.921798210 +0100 +@@ -0,0 +1,52 @@ ++#ifndef __SAA716x_I2C_H ++#define __SAA716x_I2C_H ++ ++#define SAA716x_I2C_ADAPTERS 2 ++ ++#define SAA716x_I2C_ADAPTER(__dev) (( \ ++ (__dev == 1) ? \ ++ "SAA716x I2C Core 1" : \ ++ "SAA716x I2C Core 0")) ++ ++#define SAA716x_I2C_BUS(__x) ((__x == 1) ? 0x0000c000 : 0x0000b000) ++ ++#define SAA716x_I2C_BUS_A 0x01 ++#define SAA716x_I2C_BUS_B 0x00 ++ ++struct saa716x_dev; ++ ++enum saa716x_i2c_rate { ++ SAA716x_I2C_RATE_400 = 1, ++ SAA716x_I2C_RATE_100, ++}; ++ ++enum saa716x_i2c_mode { ++ SAA716x_I2C_MODE_POLLING = 0, ++ SAA716x_I2C_MODE_IRQ, ++ SAA716x_I2C_MODE_IRQ_BUFFERED ++}; ++ ++struct saa716x_i2c { ++ struct i2c_adapter i2c_adapter; ++ struct mutex i2c_lock; ++ struct saa716x_dev *saa716x; ++ u8 i2c_dev; ++ ++ enum saa716x_i2c_rate i2c_rate; /* run time */ ++ enum saa716x_i2c_mode i2c_mode; ++ u32 block_size; /* block size for buffered ++ mode, 1 otherwise */ ++ u32 i2c_stat; ++ ++ u32 stat_tx_prior; ++ u32 stat_tx_done; ++ wait_queue_head_t i2c_wq; ++ int i2c_op; ++}; ++ ++extern int saa716x_i2c_init(struct saa716x_dev *saa716x); ++extern int saa716x_i2c_exit(struct saa716x_dev *saa716x); ++extern void saa716x_i2cint_disable(struct saa716x_dev *saa716x); ++extern int saa716x_i2c_irqevent(struct saa716x_dev *saa716x, u8 bus); ++ ++#endif /* __SAA716x_I2C_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_i2c_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_i2c_reg.h 2013-01-16 10:41:10.922798203 +0100 +@@ -0,0 +1,145 @@ ++#ifndef __SAA716x_I2C_REG_H ++#define __SAA716x_I2C_REG_H ++ ++/* -------------- I2C Registers -------------- */ ++ ++#define RX_FIFO 0x000 ++#define I2C_RX_BYTE (0x000000ff << 0) ++ ++#define TX_FIFO 0x000 ++#define I2C_STOP_BIT (0x00000001 << 9) ++#define I2C_START_BIT (0x00000001 << 8) ++#define I2C_TX_BYTE (0x000000ff << 0) ++ ++#define I2C_STATUS 0x008 ++#define I2C_TRANSMIT (0x00000001 << 11) ++#define I2C_RECEIVE (0x00000001 << 10) ++#define I2C_TRANSMIT_S_PROG (0x00000001 << 9) ++#define I2C_TRANSMIT_S_CLEAR (0x00000001 << 8) ++#define I2C_TRANSMIT_PROG (0x00000001 << 7) ++#define I2C_TRANSMIT_CLEAR (0x00000001 << 6) ++#define I2C_RECEIVE_PROG (0x00000001 << 5) ++#define I2C_RECEIVE_CLEAR (0x00000001 << 4) ++#define I2C_SDA_LINE (0x00000001 << 3) ++#define I2C_SCL_LINE (0x00000001 << 2) ++#define I2C_START_STOP_FLAG (0x00000001 << 1) ++#define I2C_MODE_STATUS (0x00000001 << 0) ++ ++#define I2C_CONTROL 0x00c ++#define I2C_SCL_CONTROL (0x00000001 << 7) ++#define I2C_SDA_CONTROL (0x00000001 << 6) ++#define I2C_RECEIVE_PROTECT (0x00000001 << 5) ++#define I2C_RECEIVE_PRO_READ (0x00000001 << 4) ++#define I2C_TRANS_SELF_CLEAR (0x00000001 << 3) ++#define I2C_TRANS_S_SELF_CLEAR (0x00000001 << 2) ++#define I2C_SLAVE_ADDR_10BIT (0x00000001 << 1) ++#define I2C_RESET (0x00000001 << 0) ++ ++#define I2C_CLOCK_DIVISOR_HIGH 0x010 ++#define I2C_CLOCK_HIGH (0x0000ffff << 0) ++ ++#define I2C_CLOCK_DIVISOR_LOW 0x014 ++#define I2C_CLOCK_LOW (0x0000ffff << 0) ++ ++#define I2C_RX_LEVEL 0x01c ++#define I2C_RECEIVE_RANGE (0x0000007f << 0) ++ ++#define I2C_TX_LEVEL 0x020 ++#define I2C_TRANSMIT_RANGE (0x0000007f << 0) ++ ++#define I2C_SDA_HOLD 0x028 ++#define I2C_HOLD_TIME (0x0000007f << 0) ++ ++#define MODULE_CONF 0xfd4 ++#define INT_CLR_ENABLE 0xfd8 ++#define I2C_CLR_ENABLE_STFNF (0x00000001 << 12) ++#define I2C_CLR_ENABLE_MTFNF (0x00000001 << 11) ++#define I2C_CLR_ENABLE_RFDA (0x00000001 << 10) ++#define I2C_CLR_ENABLE_RFF (0x00000001 << 9) ++#define I2C_CLR_ENABLE_STDR (0x00000001 << 8) ++#define I2C_CLR_ENABLE_MTDR (0x00000001 << 7) ++#define I2C_CLR_ENABLE_IBE (0x00000001 << 6) ++#define I2C_CLR_ENABLE_MSMC (0x00000001 << 5) ++#define I2C_CLR_ENABLE_SRSD (0x00000001 << 4) ++#define I2C_CLR_ENABLE_STSD (0x00000001 << 3) ++#define I2C_CLR_ENABLE_MTNA (0x00000001 << 2) ++#define I2C_CLR_ENABLE_MAF (0x00000001 << 1) ++#define I2C_CLR_ENABLE_MTD (0x00000001 << 0) ++ ++#define INT_SET_ENABLE 0xfdc ++#define I2C_SET_ENABLE_STFNF (0x00000001 << 12) ++#define I2C_SET_ENABLE_MTFNF (0x00000001 << 11) ++#define I2C_SET_ENABLE_RFDA (0x00000001 << 10) ++#define I2C_SET_ENABLE_RFF (0x00000001 << 9) ++#define I2C_SET_ENABLE_STDR (0x00000001 << 8) ++#define I2C_SET_ENABLE_MTDR (0x00000001 << 7) ++#define I2C_SET_ENABLE_IBE (0x00000001 << 6) ++#define I2C_SET_ENABLE_MSMC (0x00000001 << 5) ++#define I2C_SET_ENABLE_SRSD (0x00000001 << 4) ++#define I2C_SET_ENABLE_STSD (0x00000001 << 3) ++#define I2C_SET_ENABLE_MTNA (0x00000001 << 2) ++#define I2C_SET_ENABLE_MAF (0x00000001 << 1) ++#define I2C_SET_ENABLE_MTD (0x00000001 << 0) ++ ++#define INT_STATUS 0xfe0 ++#define I2C_INTERRUPT_STFNF (0x00000001 << 12) ++#define I2C_INTERRUPT_MTFNF (0x00000001 << 11) ++#define I2C_INTERRUPT_RFDA (0x00000001 << 10) ++#define I2C_INTERRUPTE_RFF (0x00000001 << 9) ++#define I2C_SLAVE_INTERRUPT_STDR (0x00000001 << 8) ++#define I2C_MASTER_INTERRUPT_MTDR (0x00000001 << 7) ++#define I2C_ERROR_IBE (0x00000001 << 6) ++#define I2C_MODE_CHANGE_INTER_MSMC (0x00000001 << 5) ++#define I2C_SLAVE_RECEIVE_INTER_SRSD (0x00000001 << 4) ++#define I2C_SLAVE_TRANSMIT_INTER_STSD (0x00000001 << 3) ++#define I2C_ACK_INTER_MTNA (0x00000001 << 2) ++#define I2C_FAILURE_INTER_MAF (0x00000001 << 1) ++#define I2C_INTERRUPT_MTD (0x00000001 << 0) ++ ++#define INT_ENABLE 0xfe4 ++#define I2C_ENABLE_STFNF (0x00000001 << 12) ++#define I2C_ENABLE_MTFNF (0x00000001 << 11) ++#define I2C_ENABLE_RFDA (0x00000001 << 10) ++#define I2C_ENABLE_RFF (0x00000001 << 9) ++#define I2C_ENABLE_STDR (0x00000001 << 8) ++#define I2C_ENABLE_MTDR (0x00000001 << 7) ++#define I2C_ENABLE_IBE (0x00000001 << 6) ++#define I2C_ENABLE_MSMC (0x00000001 << 5) ++#define I2C_ENABLE_SRSD (0x00000001 << 4) ++#define I2C_ENABLE_STSD (0x00000001 << 3) ++#define I2C_ENABLE_MTNA (0x00000001 << 2) ++#define I2C_ENABLE_MAF (0x00000001 << 1) ++#define I2C_ENABLE_MTD (0x00000001 << 0) ++ ++#define INT_CLR_STATUS 0xfe8 ++#define I2C_CLR_STATUS_STFNF (0x00000001 << 12) ++#define I2C_CLR_STATUS_MTFNF (0x00000001 << 11) ++#define I2C_CLR_STATUS_RFDA (0x00000001 << 10) ++#define I2C_CLR_STATUS_RFF (0x00000001 << 9) ++#define I2C_CLR_STATUS_STDR (0x00000001 << 8) ++#define I2C_CLR_STATUS_MTDR (0x00000001 << 7) ++#define I2C_CLR_STATUS_IBE (0x00000001 << 6) ++#define I2C_CLR_STATUS_MSMC (0x00000001 << 5) ++#define I2C_CLR_STATUS_SRSD (0x00000001 << 4) ++#define I2C_CLR_STATUS_STSD (0x00000001 << 3) ++#define I2C_CLR_STATUS_MTNA (0x00000001 << 2) ++#define I2C_CLR_STATUS_MAF (0x00000001 << 1) ++#define I2C_CLR_STATIS_MTD (0x00000001 << 0) ++ ++#define INT_SET_STATUS 0xfec ++#define I2C_SET_STATUS_STFNF (0x00000001 << 12) ++#define I2C_SET_STATUS_MTFNF (0x00000001 << 11) ++#define I2C_SET_STATUS_RFDA (0x00000001 << 10) ++#define I2C_SET_STATUS_RFF (0x00000001 << 9) ++#define I2C_SET_STATUS_STDR (0x00000001 << 8) ++#define I2C_SET_STATUS_MTDR (0x00000001 << 7) ++#define I2C_SET_STATUS_IBE (0x00000001 << 6) ++#define I2C_SET_STATUS_MSMC (0x00000001 << 5) ++#define I2C_SET_STATUS_SRSD (0x00000001 << 4) ++#define I2C_SET_STATUS_STSD (0x00000001 << 3) ++#define I2C_SET_STATUS_MTNA (0x00000001 << 2) ++#define I2C_SET_STATUS_MAF (0x00000001 << 1) ++#define I2C_SET_STATIS_MTD (0x00000001 << 0) ++ ++ ++#endif /* __SAA716x_I2C_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_mod.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_mod.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_mod.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_mod.h 2013-01-16 10:41:10.922798203 +0100 +@@ -0,0 +1,50 @@ ++#ifndef __SAA716x_MOD_H ++#define __SAA716x_MOD_H ++ ++/* BAR = 17 bits */ ++/* ++ VI0 0x00000000 ++ VI1 0x00001000 ++ FGPI0 0x00002000 ++ FGPI1 0x00003000 ++ FGPI2 0x00004000 ++ FGPI3 0x00005000 ++ AI0 0x00006000 ++ AI1 0x00007000 ++ BAM 0x00008000 ++ MMU 0x00009000 ++ MSI 0x0000a000 ++ I2C_B 0x0000b000 ++ I2C_A 0x0000c000 ++ SPI 0x0000d000 ++ GPIO 0x0000e000 ++ PHI_0 0x0000f000 ++ CGU 0x00013000 ++ DCS 0x00014000 ++ GREG 0x00012000 ++ ++ PHI_1 0x00020000 ++*/ ++ ++#define VI0 0x00000000 ++#define VI1 0x00001000 ++#define FGPI0 0x00002000 ++#define FGPI1 0x00003000 ++#define FGPI2 0x00004000 ++#define FGPI3 0x00005000 ++#define AI0 0x00006000 ++#define AI1 0x00007000 ++#define BAM 0x00008000 ++#define MMU 0x00009000 ++#define MSI 0x0000a000 ++#define I2C_B 0x0000b000 ++#define I2C_A 0x0000c000 ++#define SPI 0x0000d000 ++#define GPIO 0x0000e000 ++#define PHI_0 0x0000f000 ++#define GREG 0x00012000 ++#define CGU 0x00013000 ++#define DCS 0x00014000 ++#define PHI_1 0x00020000 ++ ++#endif /* __SAA716x_MOD_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.c 2013-01-16 10:41:10.923798196 +0100 +@@ -0,0 +1,479 @@ ++#include ++ ++#include ++#include ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_msi_reg.h" ++#include "saa716x_msi.h" ++#include "saa716x_spi.h" ++ ++#include "saa716x_priv.h" ++ ++#define SAA716x_MSI_VECTORS 50 ++ ++static const char *vector_name[] = { ++ "TAGACK_VI0_0", ++ "TAGACK_VI0_1", ++ "TAGACK_VI0_2", ++ "TAGACK_VI1_0", ++ "TAGACK_VI1_1", ++ "TAGACK_VI1_2", ++ "TAGACK_FGPI_0", ++ "TAGACK_FGPI_1", ++ "TAGACK_FGPI_2", ++ "TAGACK_FGPI_3", ++ "TAGACK_AI_0", ++ "TAGACK_AI_1", ++ "OVRFLW_VI0_0", ++ "OVRFLW_VI0_1", ++ "OVRFLW_VI0_2", ++ "OVRFLW_VI1_0", ++ "OVRFLW_VI1_1", ++ "OVRFLW_VI1_2", ++ "OVRFLW_FGPI_O", ++ "OVRFLW_FGPI_1", ++ "OVRFLW_FGPI_2", ++ "OVRFLW_FGPI_3", ++ "OVRFLW_AI_0", ++ "OVRFLW_AI_1", ++ "AVINT_VI0", ++ "AVINT_VI1", ++ "AVINT_FGPI_0", ++ "AVINT_FGPI_1", ++ "AVINT_FGPI_2", ++ "AVINT_FGPI_3", ++ "AVINT_AI_0", ++ "AVINT_AI_1", ++ "UNMAPD_TC_INT", ++ "EXTINT_0", ++ "EXTINT_1", ++ "EXTINT_2", ++ "EXTINT_3", ++ "EXTINT_4", ++ "EXTINT_5", ++ "EXTINT_6", ++ "EXTINT_7", ++ "EXTINT_8", ++ "EXTINT_9", ++ "EXTINT_10", ++ "EXTINT_11", ++ "EXTINT_12", ++ "EXTINT_13", ++ "EXTINT_14", ++ "EXTINT_15", ++ "I2CINT_0", ++ "I2CINT_1" ++}; ++ ++static u32 MSI_CONFIG_REG[51] = { ++ MSI_CONFIG0, ++ MSI_CONFIG1, ++ MSI_CONFIG2, ++ MSI_CONFIG3, ++ MSI_CONFIG4, ++ MSI_CONFIG5, ++ MSI_CONFIG6, ++ MSI_CONFIG7, ++ MSI_CONFIG8, ++ MSI_CONFIG9, ++ MSI_CONFIG10, ++ MSI_CONFIG11, ++ MSI_CONFIG12, ++ MSI_CONFIG13, ++ MSI_CONFIG14, ++ MSI_CONFIG15, ++ MSI_CONFIG16, ++ MSI_CONFIG17, ++ MSI_CONFIG18, ++ MSI_CONFIG19, ++ MSI_CONFIG20, ++ MSI_CONFIG21, ++ MSI_CONFIG22, ++ MSI_CONFIG23, ++ MSI_CONFIG24, ++ MSI_CONFIG25, ++ MSI_CONFIG26, ++ MSI_CONFIG27, ++ MSI_CONFIG28, ++ MSI_CONFIG29, ++ MSI_CONFIG30, ++ MSI_CONFIG31, ++ MSI_CONFIG32, ++ MSI_CONFIG33, ++ MSI_CONFIG34, ++ MSI_CONFIG35, ++ MSI_CONFIG36, ++ MSI_CONFIG37, ++ MSI_CONFIG38, ++ MSI_CONFIG39, ++ MSI_CONFIG40, ++ MSI_CONFIG41, ++ MSI_CONFIG42, ++ MSI_CONFIG43, ++ MSI_CONFIG44, ++ MSI_CONFIG45, ++ MSI_CONFIG46, ++ MSI_CONFIG47, ++ MSI_CONFIG48, ++ MSI_CONFIG49, ++ MSI_CONFIG50 ++}; ++ ++int saa716x_msi_event(struct saa716x_dev *saa716x, u32 stat_l, u32 stat_h) ++{ ++ dprintk(SAA716x_DEBUG, 0, "%s: MSI event ", __func__); ++ ++ if (stat_l & MSI_INT_TAGACK_VI0_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[0]); ++ ++ if (stat_l & MSI_INT_TAGACK_VI0_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[1]); ++ ++ if (stat_l & MSI_INT_TAGACK_VI0_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[2]); ++ ++ if (stat_l & MSI_INT_TAGACK_VI1_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[3]); ++ ++ if (stat_l & MSI_INT_TAGACK_VI1_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[4]); ++ ++ if (stat_l & MSI_INT_TAGACK_VI1_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[5]); ++ ++ if (stat_l & MSI_INT_TAGACK_FGPI_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[6]); ++ ++ if (stat_l & MSI_INT_TAGACK_FGPI_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[7]); ++ ++ if (stat_l & MSI_INT_TAGACK_FGPI_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[8]); ++ ++ if (stat_l & MSI_INT_TAGACK_FGPI_3) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[9]); ++ ++ if (stat_l & MSI_INT_TAGACK_AI_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[10]); ++ ++ if (stat_l & MSI_INT_TAGACK_AI_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[11]); ++ ++ if (stat_l & MSI_INT_OVRFLW_VI0_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[12]); ++ ++ if (stat_l & MSI_INT_OVRFLW_VI0_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[13]); ++ ++ if (stat_l & MSI_INT_OVRFLW_VI0_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[14]); ++ ++ if (stat_l & MSI_INT_OVRFLW_VI1_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[15]); ++ ++ if (stat_l & MSI_INT_OVRFLW_VI1_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[16]); ++ ++ if (stat_l & MSI_INT_OVRFLW_VI1_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[17]); ++ ++ if (stat_l & MSI_INT_OVRFLW_FGPI_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[18]); ++ ++ if (stat_l & MSI_INT_OVRFLW_FGPI_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[19]); ++ ++ if (stat_l & MSI_INT_OVRFLW_FGPI_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[20]); ++ ++ if (stat_l & MSI_INT_OVRFLW_FGPI_3) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[21]); ++ ++ if (stat_l & MSI_INT_OVRFLW_AI_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[22]); ++ ++ if (stat_l & MSI_INT_OVRFLW_AI_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[23]); ++ ++ if (stat_l & MSI_INT_AVINT_VI0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[24]); ++ ++ if (stat_l & MSI_INT_AVINT_VI1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[25]); ++ ++ if (stat_l & MSI_INT_AVINT_FGPI_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[26]); ++ ++ if (stat_l & MSI_INT_AVINT_FGPI_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[27]); ++ ++ if (stat_l & MSI_INT_AVINT_FGPI_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[28]); ++ ++ if (stat_l & MSI_INT_AVINT_FGPI_3) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[29]); ++ ++ if (stat_l & MSI_INT_AVINT_AI_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[30]); ++ ++ if (stat_l & MSI_INT_AVINT_AI_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[31]); ++ ++ if (stat_h & MSI_INT_UNMAPD_TC_INT) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[32]); ++ ++ if (stat_h & MSI_INT_EXTINT_0) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[33]); ++ ++ if (stat_h & MSI_INT_EXTINT_1) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[34]); ++ ++ if (stat_h & MSI_INT_EXTINT_2) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[35]); ++ ++ if (stat_h & MSI_INT_EXTINT_3) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[36]); ++ ++ if (stat_h & MSI_INT_EXTINT_4) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[37]); ++ ++ if (stat_h & MSI_INT_EXTINT_5) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[38]); ++ ++ if (stat_h & MSI_INT_EXTINT_6) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[39]); ++ ++ if (stat_h & MSI_INT_EXTINT_7) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[40]); ++ ++ if (stat_h & MSI_INT_EXTINT_8) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[41]); ++ ++ if (stat_h & MSI_INT_EXTINT_9) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[42]); ++ ++ if (stat_h & MSI_INT_EXTINT_10) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[43]); ++ ++ if (stat_h & MSI_INT_EXTINT_11) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[44]); ++ ++ if (stat_h & MSI_INT_EXTINT_12) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[45]); ++ ++ if (stat_h & MSI_INT_EXTINT_13) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[46]); ++ ++ if (stat_h & MSI_INT_EXTINT_14) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[47]); ++ ++ if (stat_h & MSI_INT_EXTINT_15) ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[48]); ++ ++ if (stat_h & MSI_INT_I2CINT_0) { ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[49]); ++ saa716x_i2c_irqevent(saa716x, 0); ++ } ++ ++ if (stat_h & MSI_INT_I2CINT_1) { ++ dprintk(SAA716x_DEBUG, 0, "<%s> ", vector_name[50]); ++ saa716x_i2c_irqevent(saa716x, 1); ++ } ++ ++ dprintk(SAA716x_DEBUG, 0, "\n"); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_msi_event); ++ ++int saa716x_msi_init(struct saa716x_dev *saa716x) ++{ ++ u32 ena_l, ena_h, sta_l, sta_h, mid; ++ int i; ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing MSI .."); ++ saa716x->handlers = 0; ++ ++ /* get module id & version */ ++ mid = SAA716x_EPRD(MSI, MSI_MODULE_ID); ++ if (mid != 0x30100) ++ dprintk(SAA716x_ERROR, 1, "MSI Id<%04x> is not supported", mid); ++ ++ /* let HW take care of MSI race */ ++ SAA716x_EPWR(MSI, MSI_DELAY_TIMER, 0x0); ++ ++ /* INTA Polarity: Active High */ ++ SAA716x_EPWR(MSI, MSI_INTA_POLARITY, MSI_INTA_POLARITY_HIGH); ++ ++ /* ++ * IRQ Edge Rising: 25:24 = 0x01 ++ * Traffic Class: 18:16 = 0x00 ++ * MSI ID: 4:0 = 0x00 ++ */ ++ for (i = 0; i < SAA716x_MSI_VECTORS; i++) ++ SAA716x_EPWR(MSI, MSI_CONFIG_REG[i], MSI_INT_POL_EDGE_RISE); ++ ++ /* get Status */ ++ ena_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); ++ ena_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); ++ sta_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); ++ sta_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); ++ ++ /* disable and clear enabled and asserted IRQ's */ ++ if (sta_l) ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, sta_l); ++ ++ if (sta_h) ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_H, sta_h); ++ ++ if (ena_l) ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_L, ena_l); ++ ++ if (ena_h) ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, ena_h); ++ ++ msleep(5); ++ ++ /* Check IRQ's really disabled */ ++ ena_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); ++ ena_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); ++ sta_l = SAA716x_EPRD(MSI, MSI_INT_STATUS_L); ++ sta_h = SAA716x_EPRD(MSI, MSI_INT_STATUS_H); ++ ++ if ((ena_l == 0) && (ena_h == 0) && (sta_l == 0) && (sta_h == 0)) { ++ dprintk(SAA716x_DEBUG, 1, "Interrupts ena_l <%02x> ena_h <%02x> sta_l <%02x> sta_h <%02x>", ++ ena_l, ena_h, sta_l, sta_h); ++ ++ return 0; ++ } else { ++ dprintk(SAA716x_DEBUG, 1, "I/O error"); ++ return -EIO; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_msi_init); ++ ++void saa716x_msiint_disable(struct saa716x_dev *saa716x) ++{ ++ dprintk(SAA716x_DEBUG, 1, "Disabling Interrupts ..."); ++ ++ SAA716x_EPWR(MSI, MSI_INT_ENA_L, 0x0); ++ SAA716x_EPWR(MSI, MSI_INT_ENA_H, 0x0); ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, 0xffffffff); ++ SAA716x_EPWR(MSI, MSI_INT_STATUS_CLR_L, 0x0000ffff); ++} ++EXPORT_SYMBOL_GPL(saa716x_msiint_disable); ++ ++ ++/* Map the given vector Id to the hardware bitmask. */ ++static void saa716x_map_vector(struct saa716x_dev *saa716x, int vector, u32 *mask_l, u32 *mask_h) ++{ ++ u32 tmp = 1; ++ ++ if (vector < 32) { ++ /* Bits 0 - 31 */ ++ tmp <<= vector; ++ *mask_l = tmp; ++ *mask_h = 0; ++ } else { ++ /* Bits 32 - 48 */ ++ tmp <<= vector - 32; ++ *mask_l = 0; ++ *mask_h = tmp; ++ } ++} ++ ++int saa716x_add_irqvector(struct saa716x_dev *saa716x, ++ int vector, ++ enum saa716x_edge edge, ++ irqreturn_t (*handler)(int irq, void *dev_id), ++ char *desc) ++{ ++ struct saa716x_msix_entry *msix_handler = NULL; ++ ++ u32 config, mask_l, mask_h, ena_l, ena_h; ++ ++ BUG_ON(saa716x == NULL); ++ BUG_ON(vector > SAA716x_MSI_VECTORS); ++ dprintk(SAA716x_DEBUG, 1, "Adding Vector %d <%s>", vector, vector_name[vector]); ++ ++ if ((vector > 32) && (vector < 49)) { ++ config = SAA716x_EPRD(MSI, MSI_CONFIG_REG[vector]); ++ config &= 0xfcffffff; /* clear polarity */ ++ ++ switch (edge) { ++ default: ++ case SAA716x_EDGE_RISING: ++ SAA716x_EPWR(MSI, MSI_CONFIG_REG[vector], config | 0x01000000); ++ break; ++ ++ case SAA716x_EDGE_FALLING: ++ SAA716x_EPWR(MSI, MSI_CONFIG_REG[vector], config | 0x02000000); ++ break; ++ ++ case SAA716x_EDGE_ANY: ++ SAA716x_EPWR(MSI, MSI_CONFIG_REG[vector], config | 0x03000000); ++ break; ++ } ++ } ++ ++ saa716x_map_vector(saa716x, vector, &mask_l, &mask_h); ++ ++ /* add callback */ ++ msix_handler = &saa716x->saa716x_msix_handler[saa716x->handlers]; ++ strcpy(msix_handler->desc, desc); ++ msix_handler->vector = vector; ++ msix_handler->handler = handler; ++ saa716x->handlers++; ++ ++ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_L, mask_l); ++ SAA716x_EPWR(MSI, MSI_INT_ENA_SET_H, mask_h); ++ ++ ena_l = SAA716x_EPRD(MSI, MSI_INT_ENA_L); ++ ena_h = SAA716x_EPRD(MSI, MSI_INT_ENA_H); ++ dprintk(SAA716x_DEBUG, 1, "Interrupts ena_l <%02x> ena_h <%02x>", ena_l, ena_h); ++ ++ return 0; ++} ++ ++int saa716x_remove_irqvector(struct saa716x_dev *saa716x, int vector) ++{ ++ struct saa716x_msix_entry *msix_handler; ++ int i; ++ u32 mask_l, mask_h; ++ ++ msix_handler = &saa716x->saa716x_msix_handler[saa716x->handlers]; ++ BUG_ON(msix_handler == NULL); ++ dprintk(SAA716x_DEBUG, 1, "Removing Vector %d <%s>", vector, vector_name[vector]); ++ ++ /* loop through the registered handlers */ ++ for (i = 0; i < saa716x->handlers; i++) { ++ ++ /* we found our vector */ ++ if (msix_handler->vector == vector) { ++ BUG_ON(msix_handler->handler == NULL); /* no handler yet */ ++ dprintk(SAA716x_DEBUG, 1, "Vector %d <%s> removed", ++ msix_handler->vector, ++ msix_handler->desc); ++ ++ /* check whether it is already released */ ++ if (msix_handler->handler) { ++ msix_handler->vector = 0; ++ msix_handler->handler = NULL; ++ saa716x->handlers--; ++ } ++ } ++ } ++ ++ saa716x_map_vector(saa716x, vector, &mask_l, &mask_h); ++ ++ /* disable vector */ ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_L, mask_l); ++ SAA716x_EPWR(MSI, MSI_INT_ENA_CLR_H, mask_h); ++ ++ return 0; ++} +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_msi.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi.h 2013-01-16 10:41:10.923798196 +0100 +@@ -0,0 +1,87 @@ ++#ifndef __SAA716x_MSI_H ++#define __SAA716x_MSI_H ++ ++#define TAGACK_VI0_0 0x000 ++#define TAGACK_VI0_1 0x001 ++#define TAGACK_VI0_2 0x002 ++#define TAGACK_VI1_0 0x003 ++#define TAGACK_VI1_1 0x004 ++#define TAGACK_VI1_2 0x005 ++#define TAGACK_FGPI_0 0x006 ++#define TAGACK_FGPI_1 0x007 ++#define TAGACK_FGPI_2 0x008 ++#define TAGACK_FGPI_3 0x009 ++#define TAGACK_AI_0 0x00a ++#define TAGACK_AI_1 0x00b ++#define OVRFLW_VI0_0 0x00c ++#define OVRFLW_VI0_1 0x00d ++#define OVRFLW_VI0_2 0x00e ++#define OVRFLW_VI1_0 0x00f ++#define OVRFLW_VI1_1 0x010 ++#define OVRFLW_VI1_2 0x011 ++#define OVRFLW_FGPI_O 0x012 ++#define OVRFLW_FGPI_1 0x013 ++#define OVRFLW_FGPI_2 0x014 ++#define OVRFLW_FGPI_3 0x015 ++#define OVRFLW_AI_0 0x016 ++#define OVRFLW_AI_1 0x017 ++#define AVINT_VI0 0x018 ++#define AVINT_VI1 0x019 ++#define AVINT_FGPI_0 0x01a ++#define AVINT_FGPI_1 0x01b ++#define AVINT_FGPI_2 0x01c ++#define AVINT_FGPI_3 0x01d ++#define AVINT_AI_0 0x01e ++#define AVINT_AI_1 0x01f ++#define UNMAPD_TC_INT 0x020 ++#define EXTINT_0 0x021 ++#define EXTINT_1 0x022 ++#define EXTINT_2 0x023 ++#define EXTINT_3 0x024 ++#define EXTINT_4 0x025 ++#define EXTINT_5 0x026 ++#define EXTINT_6 0x027 ++#define EXTINT_7 0x028 ++#define EXTINT_8 0x029 ++#define EXTINT_9 0x02a ++#define EXTINT_10 0x02b ++#define EXTINT_11 0x02c ++#define EXTINT_12 0x02d ++#define EXTINT_13 0x02e ++#define EXTINT_14 0x02f ++#define EXTINT_15 0x030 ++#define I2CINT_0 0x031 ++#define I2CINT_1 0x032 ++ ++#define SAA716x_TC0 0x000 ++#define SAA716x_TC1 0x001 ++#define SAA716x_TC2 0x002 ++#define SAA716x_TC3 0x003 ++#define SAA716x_TC4 0x004 ++#define SAA716x_TC5 0x005 ++#define SAA716x_TC6 0x006 ++#define SAA716x_TC7 0x007 ++ ++ ++enum saa716x_edge { ++ SAA716x_EDGE_RISING = 1, ++ SAA716x_EDGE_FALLING = 2, ++ SAA716x_EDGE_ANY = 3 ++}; ++ ++struct saa716x_dev; ++ ++extern int saa716x_msi_event(struct saa716x_dev *saa716x, u32 stat_l, u32 stat_h); ++ ++extern int saa716x_msi_init(struct saa716x_dev *saa716x); ++extern void saa716x_msiint_disable(struct saa716x_dev *saa716x); ++ ++extern int saa716x_add_irqvector(struct saa716x_dev *saa716x, ++ int vector, ++ enum saa716x_edge edge, ++ irqreturn_t (*handler)(int irq, void *dev_id), ++ char *desc); ++ ++extern int saa716x_remove_irqvector(struct saa716x_dev *saa716x, int vector); ++ ++#endif /* __SAA716x_MSI_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_msi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_msi_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_msi_reg.h 2013-01-16 10:41:10.923798196 +0100 +@@ -0,0 +1,143 @@ ++#ifndef __SAA716x_MSI_REG_H ++#define __SAA716x_MSI_REG_H ++ ++/* -------------- MSI Registers -------------- */ ++ ++#define MSI_DELAY_TIMER 0x000 ++#define MSI_DELAY_1CLK (0x00000001 << 0) ++#define MSI_DELAY_2CLK (0x00000002 << 0) ++ ++#define MSI_INTA_POLARITY 0x004 ++#define MSI_INTA_POLARITY_HIGH (0x00000001 << 0) ++ ++#define MSI_CONFIG0 0x008 ++#define MSI_CONFIG1 0x00c ++#define MSI_CONFIG2 0x010 ++#define MSI_CONFIG3 0x014 ++#define MSI_CONFIG4 0x018 ++#define MSI_CONFIG5 0x01c ++#define MSI_CONFIG6 0x020 ++#define MSI_CONFIG7 0x024 ++#define MSI_CONFIG8 0x028 ++#define MSI_CONFIG9 0x02c ++#define MSI_CONFIG10 0x030 ++#define MSI_CONFIG11 0x034 ++#define MSI_CONFIG12 0x038 ++#define MSI_CONFIG13 0x03c ++#define MSI_CONFIG14 0x040 ++#define MSI_CONFIG15 0x044 ++#define MSI_CONFIG16 0x048 ++#define MSI_CONFIG17 0x04c ++#define MSI_CONFIG18 0x050 ++#define MSI_CONFIG19 0x054 ++#define MSI_CONFIG20 0x058 ++#define MSI_CONFIG21 0x05c ++#define MSI_CONFIG22 0x060 ++#define MSI_CONFIG23 0x064 ++#define MSI_CONFIG24 0x068 ++#define MSI_CONFIG25 0x06c ++#define MSI_CONFIG26 0x070 ++#define MSI_CONFIG27 0x074 ++#define MSI_CONFIG28 0x078 ++#define MSI_CONFIG29 0x07c ++#define MSI_CONFIG30 0x080 ++#define MSI_CONFIG31 0x084 ++#define MSI_CONFIG32 0x088 ++#define MSI_CONFIG33 0x08c ++#define MSI_CONFIG34 0x090 ++#define MSI_CONFIG35 0x094 ++#define MSI_CONFIG36 0x098 ++#define MSI_CONFIG37 0x09c ++#define MSI_CONFIG38 0x0a0 ++#define MSI_CONFIG39 0x0a4 ++#define MSI_CONFIG40 0x0a8 ++#define MSI_CONFIG41 0x0ac ++#define MSI_CONFIG42 0x0b0 ++#define MSI_CONFIG43 0x0b4 ++#define MSI_CONFIG44 0x0b8 ++#define MSI_CONFIG45 0x0bc ++#define MSI_CONFIG46 0x0c0 ++#define MSI_CONFIG47 0x0c4 ++#define MSI_CONFIG48 0x0c8 ++#define MSI_CONFIG49 0x0cc ++#define MSI_CONFIG50 0x0d0 ++ ++#define MSI_INT_POL_EDGE_RISE (0x00000001 << 24) ++#define MSI_INT_POL_EDGE_FALL (0x00000002 << 24) ++#define MSI_INT_POL_EDGE_ANY (0x00000003 << 24) ++#define MSI_TC (0x00000007 << 16) ++#define MSI_ID (0x0000000f << 0) ++ ++#define MSI_INT_STATUS_L 0xfc0 ++#define MSI_INT_TAGACK_VI0_0 (0x00000001 << 0) ++#define MSI_INT_TAGACK_VI0_1 (0x00000001 << 1) ++#define MSI_INT_TAGACK_VI0_2 (0x00000001 << 2) ++#define MSI_INT_TAGACK_VI1_0 (0x00000001 << 3) ++#define MSI_INT_TAGACK_VI1_1 (0x00000001 << 4) ++#define MSI_INT_TAGACK_VI1_2 (0x00000001 << 5) ++#define MSI_INT_TAGACK_FGPI_0 (0x00000001 << 6) ++#define MSI_INT_TAGACK_FGPI_1 (0x00000001 << 7) ++#define MSI_INT_TAGACK_FGPI_2 (0x00000001 << 8) ++#define MSI_INT_TAGACK_FGPI_3 (0x00000001 << 9) ++#define MSI_INT_TAGACK_AI_0 (0x00000001 << 10) ++#define MSI_INT_TAGACK_AI_1 (0x00000001 << 11) ++#define MSI_INT_OVRFLW_VI0_0 (0x00000001 << 12) ++#define MSI_INT_OVRFLW_VI0_1 (0x00000001 << 13) ++#define MSI_INT_OVRFLW_VI0_2 (0x00000001 << 14) ++#define MSI_INT_OVRFLW_VI1_0 (0x00000001 << 15) ++#define MSI_INT_OVRFLW_VI1_1 (0x00000001 << 16) ++#define MSI_INT_OVRFLW_VI1_2 (0x00000001 << 17) ++#define MSI_INT_OVRFLW_FGPI_0 (0x00000001 << 18) ++#define MSI_INT_OVRFLW_FGPI_1 (0x00000001 << 19) ++#define MSI_INT_OVRFLW_FGPI_2 (0x00000001 << 20) ++#define MSI_INT_OVRFLW_FGPI_3 (0x00000001 << 21) ++#define MSI_INT_OVRFLW_AI_0 (0x00000001 << 22) ++#define MSI_INT_OVRFLW_AI_1 (0x00000001 << 23) ++#define MSI_INT_AVINT_VI0 (0x00000001 << 24) ++#define MSI_INT_AVINT_VI1 (0x00000001 << 25) ++#define MSI_INT_AVINT_FGPI_0 (0x00000001 << 26) ++#define MSI_INT_AVINT_FGPI_1 (0x00000001 << 27) ++#define MSI_INT_AVINT_FGPI_2 (0x00000001 << 28) ++#define MSI_INT_AVINT_FGPI_3 (0x00000001 << 29) ++#define MSI_INT_AVINT_AI_0 (0x00000001 << 30) ++#define MSI_INT_AVINT_AI_1 (0x00000001 << 31) ++ ++#define MSI_INT_STATUS_H 0xfc4 ++#define MSI_INT_UNMAPD_TC_INT (0x00000001 << 0) ++#define MSI_INT_EXTINT_0 (0x00000001 << 1) ++#define MSI_INT_EXTINT_1 (0x00000001 << 2) ++#define MSI_INT_EXTINT_2 (0x00000001 << 3) ++#define MSI_INT_EXTINT_3 (0x00000001 << 4) ++#define MSI_INT_EXTINT_4 (0x00000001 << 5) ++#define MSI_INT_EXTINT_5 (0x00000001 << 6) ++#define MSI_INT_EXTINT_6 (0x00000001 << 7) ++#define MSI_INT_EXTINT_7 (0x00000001 << 8) ++#define MSI_INT_EXTINT_8 (0x00000001 << 9) ++#define MSI_INT_EXTINT_9 (0x00000001 << 10) ++#define MSI_INT_EXTINT_10 (0x00000001 << 11) ++#define MSI_INT_EXTINT_11 (0x00000001 << 12) ++#define MSI_INT_EXTINT_12 (0x00000001 << 13) ++#define MSI_INT_EXTINT_13 (0x00000001 << 14) ++#define MSI_INT_EXTINT_14 (0x00000001 << 15) ++#define MSI_INT_EXTINT_15 (0x00000001 << 16) ++#define MSI_INT_I2CINT_0 (0x00000001 << 17) ++#define MSI_INT_I2CINT_1 (0x00000001 << 18) ++ ++#define MSI_INT_STATUS_CLR_L 0xfc8 ++#define MSI_INT_STATUS_CLR_H 0xfcc ++#define MSI_INT_STATUS_SET_L 0xfd0 ++#define MSI_INT_STATUS_SET_H 0xfd4 ++#define MSI_INT_ENA_L 0xfd8 ++#define MSI_INT_ENA_H 0xfdc ++#define MSI_INT_ENA_CLR_L 0xfe0 ++#define MSI_INT_ENA_CLR_H 0xfe4 ++#define MSI_INT_ENA_SET_L 0xfe8 ++#define MSI_INT_ENA_SET_H 0xfec ++ ++#define MSI_SW_RST 0xff0 ++#define MSI_SW_RESET (0x0001 << 0) ++ ++#define MSI_MODULE_ID 0xffc ++ ++ ++#endif /* __SAA716x_MSI_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_pci.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_pci.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_pci.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_pci.c 2013-01-16 10:41:10.924798189 +0100 +@@ -0,0 +1,275 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "saa716x_spi.h" ++#include "saa716x_msi.h" ++#include "saa716x_priv.h" ++ ++#define DRIVER_NAME "SAA716x Core" ++ ++static irqreturn_t saa716x_msi_handler(int irq, void *dev_id) ++{ ++ return IRQ_HANDLED; ++} ++ ++static int saa716x_enable_msi(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ int err; ++ ++ err = pci_enable_msi(pdev); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "MSI enable failed <%d>", err); ++ return err; ++ } ++ ++ return err; ++} ++ ++static int saa716x_enable_msix(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ int i, ret = 0; ++ ++ for (i = 0; i < SAA716x_MSI_MAX_VECTORS; i++) ++ saa716x->msix_entries[i].entry = i; ++ ++ ret = pci_enable_msix(pdev, saa716x->msix_entries, SAA716x_MSI_MAX_VECTORS); ++ if (ret < 0) ++ dprintk(SAA716x_ERROR, 1, "MSI-X request failed <%d>", ret); ++ if (ret > 0) ++ dprintk(SAA716x_ERROR, 1, "Request exceeds available IRQ's <%d>", ret); ++ ++ return ret; ++} ++ ++static int saa716x_request_irq(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ struct saa716x_config *config = saa716x->config; ++ int i, ret = 0; ++ ++ if (saa716x->int_type == MODE_MSI) { ++ dprintk(SAA716x_DEBUG, 1, "Using MSI mode"); ++ ret = saa716x_enable_msi(saa716x); ++ } else if (saa716x->int_type == MODE_MSI_X) { ++ dprintk(SAA716x_DEBUG, 1, "Using MSI-X mode"); ++ ret = saa716x_enable_msix(saa716x); ++ } ++ ++ if (ret) { ++ dprintk(SAA716x_ERROR, 1, "INT-A Mode"); ++ saa716x->int_type = MODE_INTA; ++ } ++ ++ if (saa716x->int_type == MODE_MSI) { ++ ret = request_irq(pdev->irq, ++ config->irq_handler, ++ 0, ++ DRIVER_NAME, ++ saa716x); ++ ++ if (ret) { ++ pci_disable_msi(pdev); ++ dprintk(SAA716x_ERROR, 1, "MSI registration failed"); ++ ret = -EIO; ++ } ++ } ++ ++ if (saa716x->int_type == MODE_MSI_X) { ++ for (i = 0; SAA716x_MSI_MAX_VECTORS; i++) { ++ ret = request_irq(saa716x->msix_entries[i].vector, ++ saa716x->saa716x_msix_handler[i].handler, ++ IRQF_SHARED, ++ saa716x->saa716x_msix_handler[i].desc, ++ saa716x); ++ ++ dprintk(SAA716x_ERROR, 1, "%s @ 0x%p", saa716x->saa716x_msix_handler[i].desc, saa716x->saa716x_msix_handler[i].handler); ++ if (ret) { ++ dprintk(SAA716x_ERROR, 1, "%s MSI-X-%d registration failed <%d>", saa716x->saa716x_msix_handler[i].desc, i, ret); ++ return -1; ++ } ++ } ++ } ++ ++ if (saa716x->int_type == MODE_INTA) { ++ ret = request_irq(pdev->irq, ++ config->irq_handler, ++ IRQF_SHARED, ++ DRIVER_NAME, ++ saa716x); ++ if (ret < 0) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x IRQ registration failed <%d>", ret); ++ ret = -ENODEV; ++ } ++ } ++ ++ return ret; ++} ++ ++static void saa716x_free_irq(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ int i, vector; ++ ++ if (saa716x->int_type == MODE_MSI_X) { ++ ++ for (i = 0; i < SAA716x_MSI_MAX_VECTORS; i++) { ++ vector = saa716x->msix_entries[i].vector; ++ free_irq(vector, saa716x); ++ } ++ ++ pci_disable_msix(pdev); ++ ++ } else { ++ free_irq(pdev->irq, saa716x); ++ if (saa716x->int_type == MODE_MSI) ++ pci_disable_msi(pdev); ++ } ++} ++ ++int saa716x_pci_init(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ int err = 0, ret = -ENODEV, i, use_dac, pm_cap; ++ u32 msi_cap; ++ u8 revision; ++ ++ dprintk(SAA716x_ERROR, 1, "found a %s PCIe card", saa716x->config->model_name); ++ ++ err = pci_enable_device(pdev); ++ if (err != 0) { ++ ret = -ENODEV; ++ dprintk(SAA716x_ERROR, 1, "ERROR: PCI enable failed (%i)", err); ++ goto fail0; ++ } ++ ++ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { ++ use_dac = 1; ++ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); ++ if (err) { ++ dprintk(SAA716x_ERROR, 1, "Unable to obtain 64bit DMA"); ++ goto fail1; ++ } ++ } else if ((err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) { ++ dprintk(SAA716x_ERROR, 1, "Unable to obtain 32bit DMA"); ++ goto fail1; ++ } ++ ++ pci_set_master(pdev); ++ ++ pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); ++ if (pm_cap == 0) { ++ dprintk(SAA716x_ERROR, 1, "Cannot find Power Management Capability"); ++ err = -EIO; ++ goto fail1; ++ } ++ ++ if (!request_mem_region(pci_resource_start(pdev, 0), ++ pci_resource_len(pdev, 0), ++ DRIVER_NAME)) { ++ ++ dprintk(SAA716x_ERROR, 1, "BAR0 Request failed"); ++ ret = -ENODEV; ++ goto fail1; ++ } ++ saa716x->mmio = ioremap(pci_resource_start(pdev, 0), ++ pci_resource_len(pdev, 0)); ++ ++ if (!saa716x->mmio) { ++ dprintk(SAA716x_ERROR, 1, "Mem 0 remap failed"); ++ ret = -ENODEV; ++ goto fail2; ++ } ++ ++ for (i = 0; i < SAA716x_MSI_MAX_VECTORS; i++) ++ saa716x->msix_entries[i].entry = i; ++ ++ err = saa716x_request_irq(saa716x); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "SAA716x IRQ registration failed, err=%d", err); ++ ret = -ENODEV; ++ goto fail3; ++ } ++ ++ pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision); ++ pci_read_config_dword(pdev, 0x40, &msi_cap); ++ ++ saa716x->revision = revision; ++ ++ dprintk(SAA716x_ERROR, 0, " SAA%02x Rev %d [%04x:%04x], ", ++ saa716x->pdev->device, ++ revision, ++ saa716x->pdev->subsystem_vendor, ++ saa716x->pdev->subsystem_device); ++ ++ dprintk(SAA716x_ERROR, 0, ++ "irq: %d,\n mmio: 0x%p\n", ++ saa716x->pdev->irq, ++ saa716x->mmio); ++ ++ dprintk(SAA716x_ERROR, 0, " SAA%02x %sBit, MSI %s, MSI-X=%d msgs", ++ saa716x->pdev->device, ++ (((msi_cap >> 23) & 0x01) == 1 ? "64":"32"), ++ (((msi_cap >> 16) & 0x01) == 1 ? "Enabled" : "Disabled"), ++ (1 << ((msi_cap >> 17) & 0x07))); ++ ++ dprintk(SAA716x_ERROR, 0, "\n"); ++ ++ pci_set_drvdata(pdev, saa716x); ++ ++ return 0; ++ ++fail3: ++ dprintk(SAA716x_ERROR, 1, "Err: IO Unmap"); ++ if (saa716x->mmio) ++ iounmap(saa716x->mmio); ++fail2: ++ dprintk(SAA716x_ERROR, 1, "Err: Release regions"); ++ release_mem_region(pci_resource_start(pdev, 0), ++ pci_resource_len(pdev, 0)); ++ ++fail1: ++ dprintk(SAA716x_ERROR, 1, "Err: Disabling device"); ++ pci_disable_device(pdev); ++ ++fail0: ++ pci_set_drvdata(pdev, NULL); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(saa716x_pci_init); ++ ++void saa716x_pci_exit(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ ++ saa716x_free_irq(saa716x); ++ ++ dprintk(SAA716x_NOTICE, 1, "SAA%02x mem0: 0x%p", ++ saa716x->pdev->device, ++ saa716x->mmio); ++ ++ if (saa716x->mmio) { ++ iounmap(saa716x->mmio); ++ release_mem_region(pci_resource_start(pdev, 0), ++ pci_resource_len(pdev, 0)); ++ } ++ ++ pci_disable_device(pdev); ++ pci_set_drvdata(pdev, NULL); ++} ++EXPORT_SYMBOL_GPL(saa716x_pci_exit); ++ ++MODULE_DESCRIPTION("SAA716x bridge driver"); ++MODULE_AUTHOR("Manu Abraham"); ++MODULE_LICENSE("GPL"); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.c 2013-01-16 10:41:10.924798189 +0100 +@@ -0,0 +1,152 @@ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_phi_reg.h" ++ ++#include "saa716x_spi.h" ++#include "saa716x_phi.h" ++#include "saa716x_priv.h" ++ ++u32 PHI_0_REGS[] = { ++ PHI_0_MODE, ++ PHI_0_0_CONFIG, ++ PHI_0_1_CONFIG, ++ PHI_0_2_CONFIG, ++ PHI_0_3_CONFIG ++}; ++ ++u32 PHI_1_REGS[] = { ++ PHI_1_MODE, ++ PHI_1_0_CONFIG, ++ PHI_1_1_CONFIG, ++ PHI_1_2_CONFIG, ++ PHI_1_3_CONFIG, ++ PHI_1_4_CONFIG, ++ PHI_1_5_CONFIG, ++ PHI_1_6_CONFIG, ++ PHI_1_7_CONFIG ++}; ++ ++#define PHI_BASE(__port) (( \ ++ (__port == PHI_1) ? \ ++ PHI_1_BASE : \ ++ PHI_0_BASE \ ++)) ++ ++#define PHI_APERTURE(_port) (( \ ++ (__port == PHI_1) ? \ ++ PHI_1_APERTURE: \ ++ PHI_0_APERTURE \ ++)) ++ ++#define PHI_REG(__port, __reg) (( \ ++ (__port == PHI_1) ? \ ++ PHI_1_REGS[__reg] : \ ++ PHI_0_REGS[__reg] \ ++)) ++ ++#define PHI_SLAVE(__port, __slave) (( \ ++ PHI_BASE(__port) + (__slave * (PHI_APERTURE(__port))) \ ++)) ++ ++/* // Read SAA716x registers ++ * SAA716x_EPRD(PHI_0, PHI_REG(__port, __reg)) ++ * SAA716x_EPWR(PHI_1, PHI_REG(__port, __reg), __data) ++ * ++ * // Read slave registers ++ * SAA716x_EPRD(PHI_0, PHI_SLAVE(__port, __slave, __offset)) ++ * SAA716x_EPWR(PHI_1, PHI_SLAVE(__port, __slave, _offset), __data) ++ */ ++ ++int saa716x_init_phi(struct saa716x_dev *saa716x, u32 port, u8 slave) ++{ ++ int i; ++ ++ /* Reset */ ++ SAA716x_EPWR(PHI_0, PHI_SW_RST, 0x1); ++ ++ for (i = 0; i < 20; i++) { ++ msleep(1); ++ if (!(SAA716x_EPRD(PHI_0, PHI_SW_RST))) ++ break; ++ } ++ ++ return 0; ++} ++ ++int saa716x_phi_init(struct saa716x_dev *saa716x) ++{ ++ uint32_t value; ++ ++ /* init PHI 0 to FIFO mode */ ++ value = 0; ++ value |= PHI_FIFO_MODE; ++ SAA716x_EPWR(PHI_0, PHI_0_MODE, value); ++ ++ value = 0; ++ value |= 0x02; /* chip select 1 */ ++ value |= 0x00 << 8; /* ready mask */ ++ value |= 0x03 << 12; /* strobe time */ ++ value |= 0x06 << 20; /* cycle time */ ++ SAA716x_EPWR(PHI_0, PHI_0_0_CONFIG, value); ++ ++ /* init PHI 1 to SRAM mode, auto increment on */ ++ value = 0; ++ value |= PHI_AUTO_INCREMENT; ++ SAA716x_EPWR(PHI_0, PHI_1_MODE, value); ++ ++ value = 0; ++ value |= 0x01; /* chip select 0 */ ++ value |= 0x00 << 8; /* ready mask */ ++ value |= 0x03 << 12; /* strobe time */ ++ value |= 0x05 << 20; /* cycle time */ ++ SAA716x_EPWR(PHI_0, PHI_1_0_CONFIG, value); ++ ++ value = 0; ++ value |= PHI_ALE_POL; /* ALE is active high */ ++ SAA716x_EPWR(PHI_0, PHI_POLARITY, value); ++ ++ SAA716x_EPWR(PHI_0, PHI_TIMEOUT, 0x2a); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_phi_init); ++ ++int saa716x_phi_write(struct saa716x_dev *saa716x, u32 address, const u8 * data, int length) ++{ ++ int i; ++ ++ for (i = 0; i < length; i += 4) { ++ SAA716x_EPWR(PHI_1, address, *((u32 *) &data[i])); ++ address += 4; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_phi_write); ++ ++int saa716x_phi_read(struct saa716x_dev *saa716x, u32 address, u8 * data, int length) ++{ ++ int i; ++ ++ for (i = 0; i < length; i += 4) { ++ *((u32 *) &data[i]) = SAA716x_EPRD(PHI_1, address); ++ address += 4; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_phi_read); ++ ++int saa716x_phi_write_fifo(struct saa716x_dev *saa716x, const u8 * data, int length) ++{ ++ int i; ++ ++ for (i = 0; i < length; i += 4) { ++ SAA716x_EPWR(PHI_0, PHI_0_0_RW_0, *((u32 *) &data[i])); ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_phi_write_fifo); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_phi.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi.h 2013-01-16 10:41:10.924798189 +0100 +@@ -0,0 +1,39 @@ ++#ifndef __SAA716x_PHI_H ++#define __SAA716x_PHI_H ++ ++/* PHI SLAVE */ ++#define PHI_SLAVE_0 0 ++#define PHI_SLAVE_1 1 ++#define PHI_SLAVE_2 2 ++#define PHI_SLAVE_3 3 ++#define PHI_SLAVE_4 4 ++#define PHI_SLAVE_5 5 ++#define PHI_SLAVE_6 6 ++#define PHI_SLAVE_7 7 ++ ++/* PHI_REG */ ++#define PHI_MODE 0 ++#define PHI_CONFIG_0 1 ++#define PHI_CONFIG_1 2 ++#define PHI_CONFIG_2 3 ++#define PHI_CONFIG_3 4 ++#define PHI_CONFIG_4 5 ++#define PHI_CONFIG_5 6 ++#define PHI_CONFIG_6 7 ++#define PHI_CONFIG_7 8 ++ ++#define PHI_0_BASE 0x1000 ++#define PHI_0_APERTURE 0x0800 ++ ++#define PHI_1_BASE 0x0000 ++#define PHI_1_APERTURE 0xfffc ++ ++struct saa716x_dev; ++ ++extern int saa716x_init_phi(struct saa716x_dev *saa716x, u32 port, u8 slave); ++extern int saa716x_phi_init(struct saa716x_dev *saa716x); ++extern int saa716x_phi_write(struct saa716x_dev *saa716x, u32 address, const u8 *data, int length); ++extern int saa716x_phi_read(struct saa716x_dev *saa716x, u32 address, u8 *data, int length); ++extern int saa716x_phi_write_fifo(struct saa716x_dev *saa716x, const u8 * data, int length); ++ ++#endif /* __SAA716x_PHI_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_phi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_phi_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_phi_reg.h 2013-01-16 10:41:10.925798182 +0100 +@@ -0,0 +1,100 @@ ++#ifndef __SAA716x_PHI_REG_H ++#define __SAA716x_PHI_REG_H ++ ++/* -------------- PHI_0 Registers -------------- */ ++ ++#define PHI_0_MODE 0x0000 ++#define PHI_0_0_CONFIG 0x0008 ++#define PHI_0_1_CONFIG 0x000c ++#define PHI_0_2_CONFIG 0x0010 ++#define PHI_0_3_CONFIG 0x0014 ++ ++#define PHI_POLARITY 0x0038 ++#define PHI_TIMEOUT 0x003c ++#define PHI_SW_RST 0x0ff0 ++ ++#define PHI_0_0_RW_0 0x1000 ++#define PHI_0_0_RW_511 0x17fc ++ ++#define PHI_0_1_RW_0 0x1800 ++#define PHI_0_1_RW_511 0x1ffc ++ ++#define PHI_0_2_RW_0 0x2000 ++#define PHI_0_2_RW_511 0x27fc ++ ++#define PHI_0_3_RW_0 0x2800 ++#define PHI_0_3_RW_511 0x2ffc ++ ++#define PHI_CSN_DEASSERT (0x00000001 << 2) ++#define PHI_AUTO_INCREMENT (0x00000001 << 1) ++#define PHI_FIFO_MODE (0x00000001 << 0) ++ ++#define PHI_DELAY_RD_WR (0x0000001f << 27) ++#define PHI_EXTEND_RDY3 (0x00000003 << 25) ++#define PHI_EXTEND_RDY2 (0x00000003 << 23) ++#define PHI_EXTEND_RDY1 (0x00000003 << 21) ++#define PHI_EXTEND_RDY0 (0x00000003 << 19) ++#define PHI_RDY3_OD (0x00000001 << 18) ++#define PHI_RDY2_OD (0x00000001 << 17) ++#define PHI_RDY1_OD (0x00000001 << 16) ++#define PHI_RDY0_OD (0x00000001 << 15) ++#define PHI_ALE_POL (0x00000001 << 14) ++#define PHI_WRN_POL (0x00000001 << 13) ++#define PHI_RDN_POL (0x00000001 << 12) ++#define PHI_RDY3_POL (0x00000001 << 11) ++#define PHI_RDY2_POL (0x00000001 << 10) ++#define PHI_RDY1_POL (0x00000001 << 9) ++#define PHI_RDY0_POL (0x00000001 << 8) ++#define PHI_CSN7_POL (0x00000001 << 7) ++#define PHI_CSN6_POL (0x00000001 << 6) ++#define PHI_CSN5_POL (0x00000001 << 5) ++#define PHI_CSN4_POL (0x00000001 << 4) ++#define PHI_CSN3_POL (0x00000001 << 3) ++#define PHI_CSN2_POL (0x00000001 << 2) ++#define PHI_CSN1_POL (0x00000001 << 1) ++#define PHI_CSN0_POL (0x00000001 << 0) ++ ++/* -------------- PHI_1 Registers -------------- */ ++ ++#define PHI_1 0x00020000 ++ ++#define PHI_1_MODE 0x00004 ++#define PHI_1_0_CONFIG 0x00018 ++#define PHI_1_1_CONFIG 0x0001c ++#define PHI_1_2_CONFIG 0x00020 ++#define PHI_1_3_CONFIG 0x00024 ++#define PHI_1_4_CONFIG 0x00028 ++#define PHI_1_5_CONFIG 0x0002c ++#define PHI_1_6_CONFIG 0x00030 ++#define PHI_1_7_CONFIG 0x00034 ++ ++#define PHI_1_0_RW_0 0x00000 ++#define PHI_1_0_RW_16383 0x0fffc ++ ++#define PHI_1_1_RW_0 0x1000 ++#define PHI_1_1_RW_16383 0x1ffc ++ ++#define PHI_1_2_RW_0 0x2000 ++#define PHI_1_2_RW_16383 0x2ffc ++ ++#define PHI_1_3_RW_0 0x3000 ++#define PHI_1_3_RW_16383 0x3ffc ++ ++#define PHI_1_4_RW_0 0x4000 ++#define PHI_1_4_RW_16383 0x4ffc ++ ++#define PHI_1_5_RW_0 0x5000 ++#define PHI_1_5_RW_16383 0x5ffc ++ ++#define PHI_1_6_RW_0 0x6000 ++#define PHI_1_6_RW_16383 0x6ffc ++ ++#define PHI_1_7_RW_0 0x7000 ++#define PHI_1_7_RW_16383 0x7ffc ++ ++ ++/* BAR = 20 bits */ ++/* -------------- PHI1 Registers -------------- */ ++ ++ ++#endif /* __SAA716x_PHI_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_priv.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_priv.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_priv.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_priv.h 2013-01-16 10:41:10.925798182 +0100 +@@ -0,0 +1,194 @@ ++#ifndef __SAA716x_PRIV_H ++#define __SAA716x_PRIV_H ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include "saa716x_i2c.h" ++#include "saa716x_boot.h" ++#include "saa716x_cgu.h" ++#include "saa716x_dma.h" ++#include "saa716x_fgpi.h" ++ ++#include "dvbdev.h" ++#include "dvb_demux.h" ++#include "dmxdev.h" ++#include "dvb_frontend.h" ++#include "dvb_net.h" ++ ++#define SAA716x_ERROR 0 ++#define SAA716x_NOTICE 1 ++#define SAA716x_INFO 2 ++#define SAA716x_DEBUG 3 ++ ++#define SAA716x_DEV (saa716x)->num ++#define SAA716x_VERBOSE (saa716x)->verbose ++#define SAA716x_MAX_ADAPTERS 4 ++ ++#define dprintk(__x, __y, __fmt, __arg...) do { \ ++ if (__y) { \ ++ if ((SAA716x_VERBOSE > SAA716x_ERROR) && (SAA716x_VERBOSE > __x)) \ ++ printk(KERN_ERR "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ ++ else if ((SAA716x_VERBOSE > SAA716x_NOTICE) && (SAA716x_VERBOSE > __x)) \ ++ printk(KERN_NOTICE "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ ++ else if ((SAA716x_VERBOSE > SAA716x_INFO) && (SAA716x_VERBOSE > __x)) \ ++ printk(KERN_INFO "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ ++ else if ((SAA716x_VERBOSE > SAA716x_DEBUG) && (SAA716x_VERBOSE > __x)) \ ++ printk(KERN_DEBUG "%s (%d): " __fmt "\n" , __func__ , SAA716x_DEV , ##__arg); \ ++ } else { \ ++ if (SAA716x_VERBOSE > __x) \ ++ printk(__fmt , ##__arg); \ ++ } \ ++} while(0) ++ ++ ++#define NXP_SEMICONDUCTOR 0x1131 ++#define SAA7160 0x7160 ++#define SAA7161 0x7161 ++#define SAA7162 0x7162 ++ ++#define NXP_REFERENCE_BOARD 0x1131 ++ ++#define MAKE_ENTRY(__subven, __subdev, __chip, __configptr) { \ ++ .vendor = NXP_SEMICONDUCTOR, \ ++ .device = (__chip), \ ++ .subvendor = (__subven), \ ++ .subdevice = (__subdev), \ ++ .driver_data = (unsigned long) (__configptr) \ ++} ++ ++#define SAA716x_EPWR(__offst, __addr, __data) writel((__data), (saa716x->mmio + (__offst + __addr))) ++#define SAA716x_EPRD(__offst, __addr) readl((saa716x->mmio + (__offst + __addr))) ++ ++#define SAA716x_RCWR(__offst, __addr, __data) writel((__data), (saa716x->mmio + (__offst + __addr))) ++#define SAA716x_RCRD(__offst, __addr) readl((saa716x->mmio + (__offst + __addr))) ++ ++ ++#define SAA716x_MSI_MAX_VECTORS 16 ++ ++struct saa716x_msix_entry { ++ int vector; ++ u8 desc[32]; ++ irqreturn_t (*handler)(int irq, void *dev_id); ++}; ++ ++struct saa716x_dev; ++struct saa716x_adapter; ++struct saa716x_spi_config; ++ ++struct saa716x_adap_config { ++ u32 ts_port; ++ void (*worker)(unsigned long); ++}; ++ ++struct saa716x_config { ++ char *model_name; ++ char *dev_type; ++ ++ enum saa716x_boot_mode boot_mode; ++ ++ int adapters; ++ int frontends; ++ ++ int (*frontend_attach)(struct saa716x_adapter *adapter, int count); ++ irqreturn_t (*irq_handler)(int irq, void *dev_id); ++ ++ struct saa716x_adap_config adap_config[SAA716x_MAX_ADAPTERS]; ++ enum saa716x_i2c_rate i2c_rate; ++ enum saa716x_i2c_mode i2c_mode; ++}; ++ ++struct saa716x_adapter { ++ struct dvb_adapter dvb_adapter; ++ struct dvb_frontend *fe; ++ struct dvb_demux demux; ++ struct dmxdev dmxdev; ++ struct dmx_frontend fe_hw; ++ struct dmx_frontend fe_mem; ++ struct dvb_net dvb_net; ++ ++ struct saa716x_dev *saa716x; ++ ++ u8 feeds; ++ u8 count; ++}; ++ ++struct saa716x_dev { ++ struct saa716x_config *config; ++ struct pci_dev *pdev; ++ ++ int num; /* device count */ ++ int verbose; ++ ++ u8 revision; ++ ++ /* PCI */ ++ void __iomem *mmio; ++ ++#define MODE_INTA 0 ++#define MODE_MSI 1 ++#define MODE_MSI_X 2 ++ u8 int_type; ++ ++ struct msix_entry msix_entries[SAA716x_MSI_MAX_VECTORS]; ++ struct saa716x_msix_entry saa716x_msix_handler[56]; ++ u8 handlers; /* no. of active handlers */ ++ ++ /* I2C */ ++ struct saa716x_i2c i2c[2]; ++ u32 i2c_rate; /* init time */ ++ u32 I2C_DEV[2]; ++ ++ struct saa716x_spi_state *saa716x_spi; ++ struct saa716x_spi_config spi_config; ++ ++ struct saa716x_adapter saa716x_adap[SAA716x_MAX_ADAPTERS]; ++ struct mutex adap_lock; ++ struct saa716x_cgu cgu; ++ ++ spinlock_t gpio_lock; ++ /* DMA */ ++ ++ struct saa716x_fgpi_stream_port fgpi[4]; ++ ++ u32 id_offst; ++ u32 id_len; ++ void *priv; ++ ++ /* remote control */ ++ void *ir_priv; ++}; ++ ++/* PCI */ ++extern int saa716x_pci_init(struct saa716x_dev *saa716x); ++extern void saa716x_pci_exit(struct saa716x_dev *saa716x); ++ ++/* MSI */ ++extern int saa716x_msi_init(struct saa716x_dev *saa716x); ++extern void saa716x_msi_exit(struct saa716x_dev *saa716x); ++extern void saa716x_msiint_disable(struct saa716x_dev *saa716x); ++ ++/* DMA */ ++extern int saa716x_dma_init(struct saa716x_dev *saa716x); ++extern void saa716x_dma_exit(struct saa716x_dev *saa716x); ++ ++/* AUDIO */ ++extern int saa716x_audio_init(struct saa716x_dev *saa716x); ++extern void saa716x_audio_exit(struct saa716x_dev *saa716x); ++ ++/* Boot */ ++extern int saa716x_core_boot(struct saa716x_dev *saa716x); ++extern int saa716x_jetpack_init(struct saa716x_dev *saa716x); ++ ++/* Remote control */ ++extern int saa716x_ir_init(struct saa716x_dev *saa716x); ++extern void saa716x_ir_exit(struct saa716x_dev *saa716x); ++extern void saa716x_ir_handler(struct saa716x_dev *saa716x, u32 ir_cmd); ++ ++#endif /* __SAA716x_PRIV_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_reg.h 2013-01-16 10:41:10.925798182 +0100 +@@ -0,0 +1,1279 @@ ++#ifndef __SAA716x_REG_H ++#define __SAA716x_REG_H ++ ++/* BAR = 17 bits */ ++/* ++ VI0 0x00000000 ++ VI1 0x00001000 ++ FGPI0 0x00002000 ++ FGPI1 0x00003000 ++ FGPI2 0x00004000 ++ FGPI3 0x00005000 ++ AI0 0x00006000 ++ AI1 0x00007000 ++ BAM 0x00008000 ++ MMU 0x00009000 ++ MSI 0x0000a000 ++ I2C_B 0x0000b000 ++ I2C_A 0x0000c000 ++ SPI 0x0000d000 ++ GPIO 0x0000e000 ++ PHI_0 0x0000f000 ++ CGU 0x00013000 ++ DCS 0x00014000 ++ GREG 0x00012000 ++ ++ PHI_1 0x00020000 ++*/ ++ ++/* -------------- VIP Registers -------------- */ ++ ++#define VI0 0x00000000 ++#define VI1 0x00001000 ++ ++#define VI_MODE 0x000 ++#define VID_CFEN (0x00000003 << 30) ++#define VID_OSM (0x00000001 << 29) ++#define VID_FSEQ (0x00000001 << 28) ++#define AUX_CFEN (0x00000003 << 26) ++#define AUX_OSM (0x00000001 << 25) ++#define AUX_FSEQ (0x00000001 << 24) ++#define AUX_ANC_DATA (0x00000003 << 22) ++#define AUX_ANC_RAW (0x00000001 << 21) ++#define RST_ON_ERR (0x00000001 << 17) ++#define SOFT_RESET (0x00000001 << 16) ++#define IFF_CLAMP (0x00000001 << 14) ++#define IFF_MODE (0x00000003 << 12) ++#define DFF_CLAMP (0x00000001 << 10) ++#define DFF_MODE (0x00000003 << 8) ++#define HSP_CLAMP (0x00000001 << 3) ++#define HSP_RGB (0x00000001 << 2) ++#define HSP_MODE (0x00000003 << 0) ++ ++#define RCRB_CTRL 0x004 ++#define RCRB_CFG_ADDR 0x008 ++#define RCRB_CFG_EXT_ADDR 0x00c ++#define RCRB_IO_ADDR 0x010 ++#define RCRB_MEM_LADDR 0x014 ++#define RCRB_MEM_UADDR 0x018 ++#define RCRB_DATA 0x01c ++#define RCRB_MASK 0x020 ++#define RCRB_MSG_HDR 0x040 ++#define RCRB_MSG_PL0 0x044 ++#define RCRB_MSG_PL1 0x048 ++ ++#define ID_MASK0 0x020 ++#define VI_ID_MASK_0 (0x000000ff << 8) ++#define VI_DATA_ID_0 (0x000000ff << 0) ++ ++#define ID_MASK1 0x024 ++#define VI_ID_MASK_1 (0x000000ff << 8) ++#define VI_DATA_ID_1 (0x000000ff << 0) ++ ++#define VIP_LINE_THRESH 0x040 ++#define VI_LCTHR (0x000007ff << 0) ++ ++#define VIN_FORMAT 0x100 ++#define VI_VSRA (0x00000003 << 30) ++#define VI_SYNCHD (0x00000001 << 25) ++#define VI_DUAL_STREAM (0x00000001 << 24) ++#define VI_NHDAUX (0x00000001 << 20) ++#define VI_NPAR (0x00000001 << 19) ++#define VI_VSEL (0x00000003 << 14) ++#define VI_TWOS (0x00000001 << 13) ++#define VI_TPG (0x00000001 << 12) ++#define VI_FREF (0x00000001 << 10) ++#define VI_FTGL (0x00000001 << 9) ++#define VI_SF (0x00000001 << 3) ++#define VI_FZERO (0x00000001 << 2) ++#define VI_REVS (0x00000001 << 1) ++#define VI_REHS (0x00000001 << 0) ++ ++#define TC76543210 0x800 ++#define TCFEDCBA98 0x804 ++#define PHYCFG 0x900 ++#define CONFIG 0xfd4 ++#define INT_ENABLE_CLR 0xfd8 ++#define INT_ENABLE_SET 0xfdc ++ ++ ++#define INT_STATUS 0xfe0 ++#define VI_STAT_FID_AUX (0x00000001 << 31) ++#define VI_STAT_FID_VID (0x00000001 << 30) ++#define VI_STAT_FID_VPI (0x00000001 << 29) ++#define VI_STAT_LINE_COUNT (0x00000fff << 16) ++#define VI_STAT_AUX_OVRFLW (0x00000001 << 9) ++#define VI_STAT_VID_OVRFLW (0x00000001 << 8) ++#define VI_STAT_WIN_SEQBRK (0x00000001 << 7) ++#define VI_STAT_FID_SEQBRK (0x00000001 << 6) ++#define VI_STAT_LINE_THRESH (0x00000001 << 5) ++#define VI_STAT_AUX_WRAP (0x00000001 << 4) ++#define VI_STAT_AUX_START_IN (0x00000001 << 3) ++#define VI_STAT_AUX_END_OUT (0x00000001 << 2) ++#define VI_STAT_VID_START_IN (0x00000001 << 1) ++#define VI_STAT_VID_END_OUT (0x00000001 << 0) ++ ++#define INT_ENABLE 0xfe4 ++#define VI_ENABLE_AUX_OVRFLW (0x00000001 << 9) ++#define VI_ENABLE_VID_OVRFLW (0x00000001 << 8) ++#define VI_ENABLE_WIN_SEQBRK (0x00000001 << 7) ++#define VI_ENABLE_FID_SEQBRK (0x00000001 << 6) ++#define VI_ENABLE_LINE_THRESH (0x00000001 << 5) ++#define VI_ENABLE_AUX_WRAP (0x00000001 << 4) ++#define VI_ENABLE_AUX_START_IN (0x00000001 << 3) ++#define VI_ENABLE_AUX_END_OUT (0x00000001 << 2) ++#define VI_ENABLE_VID_START_IN (0x00000001 << 1) ++#define VI_ENABLE_VID_END_OUT (0x00000001 << 0) ++ ++#define INT_CLR_STATUS 0xfe8 ++#define VI_CLR_STATUS_AUX_OVRFLW (0x00000001 << 9) ++#define VI_CLR_STATUS_VID_OVRFLW (0x00000001 << 8) ++#define VI_CLR_STATUS_WIN_SEQBRK (0x00000001 << 7) ++#define VI_CLR_STATUS_FID_SEQBRK (0x00000001 << 6) ++#define VI_CLR_STATUS_LINE_THRESH (0x00000001 << 5) ++#define VI_CLR_STATUS_AUX_WRAP (0x00000001 << 4) ++#define VI_CLR_STATUS_AUX_START_IN (0x00000001 << 3) ++#define VI_CLR_STATUS_AUX_END_OUT (0x00000001 << 2) ++#define VI_CLR_STATUS_VID_START_IN (0x00000001 << 1) ++#define VI_CLR_STATUS_VID_END_OUT (0x00000001 << 0) ++ ++#define INT_SET_STATUS 0xfec ++#define VI_SET_STATUS_AUX_OVRFLW (0x00000001 << 9) ++#define VI_SET_STATUS_VID_OVRFLW (0x00000001 << 8) ++#define VI_SET_STATUS_WIN_SEQBRK (0x00000001 << 7) ++#define VI_SET_STATUS_FID_SEQBRK (0x00000001 << 6) ++#define VI_SET_STATUS_LINE_THRESH (0x00000001 << 5) ++#define VI_SET_STATUS_AUX_WRAP (0x00000001 << 4) ++#define VI_SET_STATUS_AUX_START_IN (0x00000001 << 3) ++#define VI_SET_STATUS_AUX_END_OUT (0x00000001 << 2) ++#define VI_SET_STATUS_VID_START_IN (0x00000001 << 1) ++#define VI_SET_STATUS_VID_END_OUT (0x00000001 << 0) ++ ++#define VIP_POWER_DOWN 0xff4 ++#define VI_PWR_DWN (0x00000001 << 31) ++ ++ ++ ++ ++/* -------------- FGPI Registers -------------- */ ++ ++#define FGPI0 0x00002000 ++#define FGPI1 0x00003000 ++#define FGPI2 0x00004000 ++#define FGPI3 0x00005000 ++ ++#define FGPI_CONTROL 0x000 ++#define FGPI_CAPTURE_ENABLE_2 (0x00000001 << 13) ++#define FGPI_CAPTURE_ENABLE_1 (0x00000001 << 12) ++#define FGPI_MODE (0x00000001 << 11) ++#define FGPI_SAMPLE_SIZE (0x00000003 << 8) ++#define FGPI_BUF_SYNC_MSG_STOP (0x00000003 << 5) ++#define FGPI_REC_START_MSG_START (0x00000003 << 2) ++#define FGPI_TSTAMP_SELECT (0x00000001 << 1) ++#define FGPI_VAR_LENGTH (0x00000001 << 0) ++ ++#define FGPI_BASE_1 0x004 ++#define FGPI_BASE_2 0x008 ++#define FGPI_SIZE 0x00c ++#define FGPI_REC_SIZE 0x010 ++#define FGPI_STRIDE 0x014 ++#define FGPI_NUM_RECORD_1 0x018 ++#define FGPI_NUM_RECORD_2 0x01c ++#define FGPI_THRESHOLD_1 0x020 ++#define FGPI_THRESHOLD_2 0x024 ++#define FGPI_D1_XY_START 0x028 ++#define FGPI_D1_XY_END 0x02c ++ ++#define INT_STATUS 0xfe0 ++#define FGPI_BUF1_ACTIVE (0x00000001 << 7) ++#define FGPI_OVERFLOW (0x00000001 << 6) ++#define FGPI_MBE (0x00000001 << 5) ++#define FGPI_UNDERRUN (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED (0x00000001 << 2) ++#define FGPI_BUF2_FULL (0x00000001 << 1) ++#define FGPI_BUF1_FULL (0x00000001 << 0) ++ ++#define INT_ENABLE 0xfe4 ++#define FGPI_OVERFLOW_ENA (0x00000001 << 6) ++#define FGPI_MBE_ENA (0x00000001 << 5) ++#define FGPI_UNDERRUN_ENA (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED_ENA (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED_ENA (0x00000001 << 2) ++#define FGPI_BUF2_FULL_ENA (0x00000001 << 1) ++#define FGPI_BUF1_FULL_ENA (0x00000001 << 0) ++ ++#define INT_CLR_STATUS 0xfe8 ++#define FGPI_OVERFLOW_ACK (0x00000001 << 6) ++#define FGPI_MBE_ACK (0x00000001 << 5) ++#define FGPI_UNDERRUN_ACK (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED_ACK (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED_ACK (0x00000001 << 2) ++#define FGPI_BUF2_DONE_ACK (0x00000001 << 1) ++#define FGPI_BUF1_DONE_ACK (0x00000001 << 0) ++ ++#define INT_SET_STATUS 0xfec ++#define FGPI_OVERFLOW_SET (0x00000001 << 6) ++#define FGPI_MBE_SET (0x00000001 << 5) ++#define FGPI_UNDERRUN_SET (0x00000001 << 4) ++#define FGPI_THRESH2_REACHED_SET (0x00000001 << 3) ++#define FGPI_THRESH1_REACHED_SET (0x00000001 << 2) ++#define FGPI_BUF2_DONE_SET (0x00000001 << 1) ++#define FGPI_BUF1_DONE_SET (0x00000001 << 0) ++ ++#define FGPI_SOFT_RESET 0xff0 ++#define FGPI_SOFTWARE_RESET (0x00000001 << 0) ++ ++#define FGPI_INTERFACE 0xff4 ++#define FGPI_DISABLE_BUS_IF (0x00000001 << 0) ++ ++#define FGPI_MOD_ID_EXT 0xff8 ++#define FGPI_MODULE_ID 0xffc ++ ++ ++/* -------------- AI Registers ---------------- */ ++ ++#define AI0 0x00006000 ++#define AI1 0x00007000 ++ ++#define AI_STATUS 0x000 ++#define AI_BUF1_ACTIVE (0x00000001 << 4) ++#define AI_OVERRUN (0x00000001 << 3) ++#define AI_HBE (0x00000001 << 2) ++#define AI_BUF2_FULL (0x00000001 << 1) ++#define AI_BUF1_FULL (0x00000001 << 0) ++ ++#define AI_CTL 0x004 ++#define AI_RESET (0x00000001 << 31) ++#define AI_CAP_ENABLE (0x00000001 << 30) ++#define AI_CAP_MODE (0x00000003 << 28) ++#define AI_SIGN_CONVERT (0x00000001 << 27) ++#define AI_EARLYMODE (0x00000001 << 26) ++#define AI_DIAGMODE (0x00000001 << 25) ++#define AI_RAWMODE (0x00000001 << 24) ++#define AI_OVR_INTEN (0x00000001 << 7) ++#define AI_HBE_INTEN (0x00000001 << 6) ++#define AI_BUF2_INTEN (0x00000001 << 5) ++#define AI_BUF1_INTEN (0x00000001 << 4) ++#define AI_ACK_OVR (0x00000001 << 3) ++#define AI_ACK_HBE (0x00000001 << 2) ++#define AI_ACK2 (0x00000001 << 1) ++#define AI_ACK1 (0x00000001 << 0) ++ ++#define AI_SERIAL 0x008 ++#define AI_SER_MASTER (0x00000001 << 31) ++#define AI_DATAMODE (0x00000001 << 30) ++#define AI_FRAMEMODE (0x00000003 << 28) ++#define AI_CLOCK_EDGE (0x00000001 << 27) ++#define AI_SSPOS4 (0x00000001 << 19) ++#define AI_NR_CHAN (0x00000003 << 17) ++#define AI_WSDIV (0x000001ff << 8) ++#define AI_SCKDIV (0x000000ff << 0) ++ ++#define AI_FRAMING 0x00c ++#define AI_VALIDPOS (0x000001ff << 22) ++#define AI_LEFTPOS (0x000001ff << 13) ++#define AI_RIGHTPOS (0x000001ff << 4) ++#define AI_SSPOS_3_0 (0x0000000f << 0) ++ ++#define AI_BASE1 0x014 ++#define AI_BASE2 0x018 ++#define AI_BASE (0x03ffffff << 6) ++ ++#define AI_SIZE 0x01c ++#define AI_SAMPLE_SIZE (0x03ffffff << 6) ++ ++#define AI_INT_ACK 0x020 ++#define AI_ACK_OVR (0x00000001 << 3) ++#define AI_ACK_HBE (0x00000001 << 2) ++#define AI_ACK2 (0x00000001 << 1) ++#define AI_ACK1 (0x00000001 << 0) ++ ++#define AI_PWR_DOWN 0xff4 ++#define AI_PWR_DWN (0x00000001 << 0) ++ ++/* -------------- BAM Registers -------------- */ ++ ++#define BAM 0x00008000 ++ ++#define BAM_VI0_0_DMA_BUF_MODE 0x000 ++ ++#define BAM_VI0_0_ADDR_OFFST_0 0x004 ++#define BAM_VI0_0_ADDR_OFFST_1 0x008 ++#define BAM_VI0_0_ADDR_OFFST_2 0x00c ++#define BAM_VI0_0_ADDR_OFFST_3 0x010 ++#define BAM_VI0_0_ADDR_OFFST_4 0x014 ++#define BAM_VI0_0_ADDR_OFFST_5 0x018 ++#define BAM_VI0_0_ADDR_OFFST_6 0x01c ++#define BAM_VI0_0_ADDR_OFFST_7 0x020 ++ ++#define BAM_VI0_1_DMA_BUF_MODE 0x024 ++#define BAM_VI0_1_ADDR_OFFST_0 0x028 ++#define BAM_VI0_1_ADDR_OFFST_1 0x02c ++#define BAM_VI0_1_ADDR_OFFST_2 0x030 ++#define BAM_VI0_1_ADDR_OFFST_3 0x034 ++#define BAM_VI0_1_ADDR_OFFST_4 0x038 ++#define BAM_VI0_1_ADDR_OFFST_5 0x03c ++#define BAM_VI0_1_ADDR_OFFST_6 0x040 ++#define BAM_VI0_1_ADDR_OFFST_7 0x044 ++ ++#define BAM_VI0_2_DMA_BUF_MODE 0x048 ++#define BAM_VI0_2_ADDR_OFFST_0 0x04c ++#define BAM_VI0_2_ADDR_OFFST_1 0x050 ++#define BAM_VI0_2_ADDR_OFFST_2 0x054 ++#define BAM_VI0_2_ADDR_OFFST_3 0x058 ++#define BAM_VI0_2_ADDR_OFFST_4 0x05c ++#define BAM_VI0_2_ADDR_OFFST_5 0x060 ++#define BAM_VI0_2_ADDR_OFFST_6 0x064 ++#define BAM_VI0_2_ADDR_OFFST_7 0x068 ++ ++ ++#define BAM_VI1_0_DMA_BUF_MODE 0x06c ++#define BAM_VI1_0_ADDR_OFFST_0 0x070 ++#define BAM_VI1_0_ADDR_OFFST_1 0x074 ++#define BAM_VI1_0_ADDR_OFFST_2 0x078 ++#define BAM_VI1_0_ADDR_OFFST_3 0x07c ++#define BAM_VI1_0_ADDR_OFFST_4 0x080 ++#define BAM_VI1_0_ADDR_OFFST_5 0x084 ++#define BAM_VI1_0_ADDR_OFFST_6 0x088 ++#define BAM_VI1_0_ADDR_OFFST_7 0x08c ++ ++#define BAM_VI1_1_DMA_BUF_MODE 0x090 ++#define BAM_VI1_1_ADDR_OFFST_0 0x094 ++#define BAM_VI1_1_ADDR_OFFST_1 0x098 ++#define BAM_VI1_1_ADDR_OFFST_2 0x09c ++#define BAM_VI1_1_ADDR_OFFST_3 0x0a0 ++#define BAM_VI1_1_ADDR_OFFST_4 0x0a4 ++#define BAM_VI1_1_ADDR_OFFST_5 0x0a8 ++#define BAM_VI1_1_ADDR_OFFST_6 0x0ac ++#define BAM_VI1_1_ADDR_OFFST_7 0x0b0 ++ ++#define BAM_VI1_2_DMA_BUF_MODE 0x0b4 ++#define BAM_VI1_2_ADDR_OFFST_0 0x0b8 ++#define BAM_VI1_2_ADDR_OFFST_1 0x0bc ++#define BAM_VI1_2_ADDR_OFFST_2 0x0c0 ++#define BAM_VI1_2_ADDR_OFFST_3 0x0c4 ++#define BAM_VI1_2_ADDR_OFFST_4 0x0c8 ++#define BAM_VI1_2_ADDR_OFFST_5 0x0cc ++#define BAM_VI1_2_ADDR_OFFST_6 0x0d0 ++#define BAM_VI1_2_ADDR_OFFST_7 0x0d4 ++ ++ ++#define BAM_FGPI0_DMA_BUF_MODE 0x0d8 ++#define BAM_FGPI0_ADDR_OFFST_0 0x0dc ++#define BAM_FGPI0_ADDR_OFFST_1 0x0e0 ++#define BAM_FGPI0_ADDR_OFFST_2 0x0e4 ++#define BAM_FGPI0_ADDR_OFFST_3 0x0e8 ++#define BAM_FGPI0_ADDR_OFFST_4 0x0ec ++#define BAM_FGPI0_ADDR_OFFST_5 0x0f0 ++#define BAM_FGPI0_ADDR_OFFST_6 0x0f4 ++#define BAM_FGPI0_ADDR_OFFST_7 0x0f8 ++ ++#define BAM_FGPI1_DMA_BUF_MODE 0x0fc ++#define BAM_FGPI1_ADDR_OFFST_0 0x100 ++#define BAM_FGPI1_ADDR_OFFST_1 0x104 ++#define BAM_FGPI1_ADDR_OFFST_2 0x108 ++#define BAM_FGPI1_ADDR_OFFST_3 0x10c ++#define BAM_FGPI1_ADDR_OFFST_4 0x110 ++#define BAM_FGPI1_ADDR_OFFST_5 0x114 ++#define BAM_FGPI1_ADDR_OFFST_6 0x118 ++#define BAM_FGPI1_ADDR_OFFST_7 0x11c ++ ++#define BAM_FGPI2_DMA_BUF_MODE 0x120 ++#define BAM_FGPI2_ADDR_OFFST_0 0x124 ++#define BAM_FGPI2_ADDR_OFFST_1 0x128 ++#define BAM_FGPI2_ADDR_OFFST_2 0x12c ++#define BAM_FGPI2_ADDR_OFFST_3 0x130 ++#define BAM_FGPI2_ADDR_OFFST_4 0x134 ++#define BAM_FGPI2_ADDR_OFFST_5 0x138 ++#define BAM_FGPI2_ADDR_OFFST_6 0x13c ++#define BAM_FGPI2_ADDR_OFFST_7 0x140 ++ ++#define BAM_FGPI3_DMA_BUF_MODE 0x144 ++#define BAM_FGPI3_ADDR_OFFST_0 0x148 ++#define BAM_FGPI3_ADDR_OFFST_1 0x14c ++#define BAM_FGPI3_ADDR_OFFST_2 0x150 ++#define BAM_FGPI3_ADDR_OFFST_3 0x154 ++#define BAM_FGPI3_ADDR_OFFST_4 0x158 ++#define BAM_FGPI3_ADDR_OFFST_5 0x15c ++#define BAM_FGPI3_ADDR_OFFST_6 0x160 ++#define BAM_FGPI3_ADDR_OFFST_7 0x164 ++ ++ ++#define BAM_AI0_DMA_BUF_MODE 0x168 ++#define BAM_AI0_ADDR_OFFST_0 0x16c ++#define BAM_AI0_ADDR_OFFST_1 0x170 ++#define BAM_AI0_ADDR_OFFST_2 0x174 ++#define BAM_AI0_ADDR_OFFST_3 0x178 ++#define BAM_AI0_ADDR_OFFST_4 0x17c ++#define BAM_AIO_ADDR_OFFST_5 0x180 ++#define BAM_AI0_ADDR_OFFST_6 0x184 ++#define BAM_AIO_ADDR_OFFST_7 0x188 ++ ++#define BAM_AI1_DMA_BUF_MODE 0x18c ++#define BAM_AI1_ADDR_OFFST_0 0x190 ++#define BAM_AI1_ADDR_OFFST_1 0x194 ++#define BAM_AI1_ADDR_OFFST_2 0x198 ++#define BAM_AI1_ADDR_OFFST_3 0x19c ++#define BAM_AI1_ADDR_OFFST_4 0x1a0 ++#define BAM_AI1_ADDR_OFFST_5 0x1a4 ++#define BAM_AI1_ADDR_OFFST_6 0x1a8 ++#define BAM_AI1_ADDR_OFFST_7 0x1ac ++ ++#define BAM_SW_RST 0xff0 ++#define BAM_SW_RESET (0x00000001 << 0) ++ ++ ++ ++ ++ ++/* -------------- MMU Registers -------------- */ ++ ++#define MMU 0x00009000 ++ ++#define MMU_MODE 0x000 ++ ++#define MMU_DMA_CONFIG0 0x004 ++#define MMU_DMA_CONFIG1 0x008 ++#define MMU_DMA_CONFIG2 0x00c ++#define MMU_DMA_CONFIG3 0x010 ++#define MMU_DMA_CONFIG4 0x014 ++#define MMU_DMA_CONFIG5 0x018 ++#define MMU_DMA_CONFIG6 0x01c ++#define MMU_DMA_CONFIG7 0x020 ++#define MMU_DMA_CONFIG8 0x024 ++#define MMU_DMA_CONFIG9 0x028 ++#define MMU_DMA_CONFIG10 0x02c ++#define MMU_DMA_CONFIG11 0x030 ++#define MMU_DMA_CONFIG12 0x034 ++#define MMU_DMA_CONFIG13 0x038 ++#define MMU_DMA_CONFIG14 0x03c ++#define MMU_DMA_CONFIG15 0x040 ++ ++#define MMU_SW_RST 0xff0 ++#define MMU_SW_RESET (0x0001 << 0) ++ ++#define MMU_PTA_BASE0 0x044 /* DMA 0 */ ++#define MMU_PTA_BASE1 0x084 /* DMA 1 */ ++#define MMU_PTA_BASE2 0x0c4 /* DMA 2 */ ++#define MMU_PTA_BASE3 0x104 /* DMA 3 */ ++#define MMU_PTA_BASE4 0x144 /* DMA 4 */ ++#define MMU_PTA_BASE5 0x184 /* DMA 5 */ ++#define MMU_PTA_BASE6 0x1c4 /* DMA 6 */ ++#define MMU_PTA_BASE7 0x204 /* DMA 7 */ ++#define MMU_PTA_BASE8 0x244 /* DMA 8 */ ++#define MMU_PTA_BASE9 0x284 /* DMA 9 */ ++#define MMU_PTA_BASE10 0x2c4 /* DMA 10 */ ++#define MMU_PTA_BASE11 0x304 /* DMA 11 */ ++#define MMU_PTA_BASE12 0x344 /* DMA 12 */ ++#define MMU_PTA_BASE13 0x384 /* DMA 13 */ ++#define MMU_PTA_BASE14 0x3c4 /* DMA 14 */ ++#define MMU_PTA_BASE15 0x404 /* DMA 15 */ ++ ++#define MMU_PTA_BASE 0x044 /* DMA 0 */ ++#define MMU_PTA_OFFSET 0x40 ++ ++#define PTA_BASE(__ch) (MMU_PTA_BASE + (MMU_PTA_OFFSET * __ch)) ++ ++#define MMU_PTA0_LSB(__ch) PTA_BASE(__ch) + 0x00 ++#define MMU_PTA0_MSB(__ch) PTA_BASE(__ch) + 0x04 ++#define MMU_PTA1_LSB(__ch) PTA_BASE(__ch) + 0x08 ++#define MMU_PTA1_MSB(__ch) PTA_BASE(__ch) + 0x0c ++#define MMU_PTA2_LSB(__ch) PTA_BASE(__ch) + 0x10 ++#define MMU_PTA2_MSB(__ch) PTA_BASE(__ch) + 0x14 ++#define MMU_PTA3_LSB(__ch) PTA_BASE(__ch) + 0x18 ++#define MMU_PTA3_MSB(__ch) PTA_BASE(__ch) + 0x1c ++#define MMU_PTA4_LSB(__ch) PTA_BASE(__ch) + 0x20 ++#define MMU_PTA4_MSB(__ch) PTA_BASE(__ch) + 0x24 ++#define MMU_PTA5_LSB(__ch) PTA_BASE(__ch) + 0x28 ++#define MMU_PTA5_MSB(__ch) PTA_BASE(__ch) + 0x2c ++#define MMU_PTA6_LSB(__ch) PTA_BASE(__ch) + 0x30 ++#define MMU_PTA6_MSB(__ch) PTA_BASE(__ch) + 0x34 ++#define MMU_PTA7_LSB(__ch) PTA_BASE(__ch) + 0x38 ++#define MMU_PTA7_MSB(__ch) PTA_BASE(__ch) + 0x3c ++ ++ ++/* -------------- MSI Registers -------------- */ ++ ++#define MSI 0x0000a000 ++ ++#define MSI_DELAY_TIMER 0x000 ++#define MSI_DELAY_1CLK (0x00000001 << 0) ++#define MSI_DELAY_2CLK (0x00000002 << 0) ++ ++#define MSI_INTA_POLARITY 0x004 ++#define MSI_INTA_POLARITY_HIGH (0x00000001 << 0) ++ ++#define MSI_CONFIG0 0x008 ++#define MSI_CONFIG1 0x00c ++#define MSI_CONFIG2 0x010 ++#define MSI_CONFIG3 0x014 ++#define MSI_CONFIG4 0x018 ++#define MSI_CONFIG5 0x01c ++#define MSI_CONFIG6 0x020 ++#define MSI_CONFIG7 0x024 ++#define MSI_CONFIG8 0x028 ++#define MSI_CONFIG9 0x02c ++#define MSI_CONFIG10 0x030 ++#define MSI_CONFIG11 0x034 ++#define MSI_CONFIG12 0x038 ++#define MSI_CONFIG13 0x03c ++#define MSI_CONFIG14 0x040 ++#define MSI_CONFIG15 0x044 ++#define MSI_CONFIG16 0x048 ++#define MSI_CONFIG17 0x04c ++#define MSI_CONFIG18 0x050 ++#define MSI_CONFIG19 0x054 ++#define MSI_CONFIG20 0x058 ++#define MSI_CONFIG21 0x05c ++#define MSI_CONFIG22 0x060 ++#define MSI_CONFIG23 0x064 ++#define MSI_CONFIG24 0x068 ++#define MSI_CONFIG25 0x06c ++#define MSI_CONFIG26 0x070 ++#define MSI_CONFIG27 0x074 ++#define MSI_CONFIG28 0x078 ++#define MSI_CONFIG29 0x07c ++#define MSI_CONFIG30 0x080 ++#define MSI_CONFIG31 0x084 ++#define MSI_CONFIG32 0x088 ++#define MSI_CONFIG33 0x08c ++#define MSI_CONFIG34 0x090 ++#define MSI_CONFIG35 0x094 ++#define MSI_CONFIG36 0x098 ++#define MSI_CONFIG37 0x09c ++#define MSI_CONFIG38 0x0a0 ++#define MSI_CONFIG39 0x0a4 ++#define MSI_CONFIG40 0x0a8 ++#define MSI_CONFIG41 0x0ac ++#define MSI_CONFIG42 0x0b0 ++#define MSI_CONFIG43 0x0b4 ++#define MSI_CONFIG44 0x0b8 ++#define MSI_CONFIG45 0x0bc ++#define MSI_CONFIG46 0x0c0 ++#define MSI_CONFIG47 0x0c4 ++#define MSI_CONFIG48 0x0c8 ++#define MSI_CONFIG49 0x0cc ++#define MSI_CONFIG50 0x0d0 ++ ++#define MSI_INT_POL_EDGE_RISE (0x00000001 << 24) ++#define MSI_INT_POL_EDGE_FALL (0x00000002 << 24) ++#define MSI_INT_POL_EDGE_ANY (0x00000003 << 24) ++#define MSI_TC (0x00000007 << 16) ++#define MSI_ID (0x0000000f << 0) ++ ++#define MSI_INT_STATUS_L 0xfc0 ++#define MSI_INT_TAGACK_VI0_0 (0x00000001 << 0) ++#define MSI_INT_TAGACK_VI0_1 (0x00000001 << 1) ++#define MSI_INT_TAGACK_VI0_2 (0x00000001 << 2) ++#define MSI_INT_TAGACK_VI1_0 (0x00000001 << 3) ++#define MSI_INT_TAGACK_VI1_1 (0x00000001 << 4) ++#define MSI_INT_TAGACK_VI1_2 (0x00000001 << 5) ++#define MSI_INT_TAGACK_FGPI_0 (0x00000001 << 6) ++#define MSI_INT_TAGACK_FGPI_1 (0x00000001 << 7) ++#define MSI_INT_TAGACK_FGPI_2 (0x00000001 << 8) ++#define MSI_INT_TAGACK_FGPI_3 (0x00000001 << 9) ++#define MSI_INT_TAGACK_AI_0 (0x00000001 << 10) ++#define MSI_INT_TAGACK_AI_1 (0x00000001 << 11) ++#define MSI_INT_OVRFLW_VI0_0 (0x00000001 << 12) ++#define MSI_INT_OVRFLW_VI0_1 (0x00000001 << 13) ++#define MSI_INT_OVRFLW_VI0_2 (0x00000001 << 14) ++#define MSI_INT_OVRFLW_VI1_0 (0x00000001 << 15) ++#define MSI_INT_OVRFLW_VI1_1 (0x00000001 << 16) ++#define MSI_INT_OVRFLW_VI1_2 (0x00000001 << 17) ++#define MSI_INT_OVRFLW_FGPI_O (0x00000001 << 18) ++#define MSI_INT_OVRFLW_FGPI_1 (0x00000001 << 19) ++#define MSI_INT_OVRFLW_FGPI_2 (0x00000001 << 20) ++#define MSI_INT_OVRFLW_FGPI_3 (0x00000001 << 21) ++#define MSI_INT_OVRFLW_AI_0 (0x00000001 << 22) ++#define MSI_INT_OVRFLW_AI_1 (0x00000001 << 23) ++#define MSI_INT_AVINT_VI0 (0x00000001 << 24) ++#define MSI_INT_AVINT_VI1 (0x00000001 << 25) ++#define MSI_INT_AVINT_FGPI_0 (0x00000001 << 26) ++#define MSI_INT_AVINT_FGPI_1 (0x00000001 << 27) ++#define MSI_INT_AVINT_FGPI_2 (0x00000001 << 28) ++#define MSI_INT_AVINT_FGPI_3 (0x00000001 << 29) ++#define MSI_INT_AVINT_AI_0 (0x00000001 << 30) ++#define MSI_INT_AVINT_AI_1 (0x00000001 << 31) ++ ++#define MSI_INT_STATUS_H 0xfc4 ++#define MSI_INT_UNMAPD_TC_INT (0x00000001 << 0) ++#define MSI_INT_EXTINT_0 (0x00000001 << 1) ++#define MSI_INT_EXTINT_1 (0x00000001 << 2) ++#define MSI_INT_EXTINT_2 (0x00000001 << 3) ++#define MSI_INT_EXTINT_3 (0x00000001 << 4) ++#define MSI_INT_EXTINT_4 (0x00000001 << 5) ++#define MSI_INT_EXTINT_5 (0x00000001 << 6) ++#define MSI_INT_EXTINT_6 (0x00000001 << 7) ++#define MSI_INT_EXTINT_7 (0x00000001 << 8) ++#define MSI_INT_EXTINT_8 (0x00000001 << 9) ++#define MSI_INT_EXTINT_9 (0x00000001 << 10) ++#define MSI_INT_EXTINT_10 (0x00000001 << 11) ++#define MSI_INT_EXTINT_11 (0x00000001 << 12) ++#define MSI_INT_EXTINT_12 (0x00000001 << 13) ++#define MSI_INT_EXTINT_13 (0x00000001 << 14) ++#define MSI_INT_EXTINT_14 (0x00000001 << 15) ++#define MSI_INT_EXTINT_15 (0x00000001 << 16) ++#define MSI_INT_I2CINT_0 (0x00000001 << 17) ++#define MSI_INT_I2CINT_1 (0x00000001 << 18) ++ ++#define MSI_INT_STATUS_CLR_L 0xfc8 ++#define MSI_INT_STATUS_CLR_H 0xfcc ++#define MSI_INT_STATUS_SET_L 0xfd0 ++#define MSI_INT_STATUS_SET_H 0xfd4 ++#define MSI_INT_ENA_L 0xfd8 ++#define MSI_INT_ENA_H 0xfdc ++#define MSI_INT_ENA_CLR_L 0xfe0 ++#define MSI_INT_ENA_CLR_H 0xfe4 ++#define MSI_INT_ENA_SET_L 0xfe8 ++#define MSI_INT_ENA_SET_H 0xfec ++ ++#define MSI_SW_RST 0xff0 ++#define MSI_SW_RESET (0x0001 << 0) ++ ++#define MSI_MODULE_ID 0xffc ++ ++ ++/* -------------- I2C Registers -------------- */ ++ ++#define I2C_B 0x0000b000 ++#define I2C_A 0x0000c000 ++ ++#define RX_FIFO 0x000 ++#define I2C_RX_BYTE (0x000000ff << 0) ++ ++#define TX_FIFO 0x000 ++#define I2C_STOP_BIT (0x00000001 << 9) ++#define I2C_START_BIT (0x00000001 << 8) ++#define I2C_TX_BYTE (0x000000ff << 0) ++ ++#define I2C_STATUS 0x008 ++#define I2C_TRANSMIT (0x00000001 << 11) ++#define I2C_RECEIVE (0x00000001 << 10) ++#define I2C_TRANSMIT_S_PROG (0x00000001 << 9) ++#define I2C_TRANSMIT_S_CLEAR (0x00000001 << 8) ++#define I2C_TRANSMIT_PROG (0x00000001 << 7) ++#define I2C_TRANSMIT_CLEAR (0x00000001 << 6) ++#define I2C_RECEIVE_PROG (0x00000001 << 5) ++#define I2C_RECEIVE_CLEAR (0x00000001 << 4) ++#define I2C_SDA_LINE (0x00000001 << 3) ++#define I2C_SCL_LINE (0x00000001 << 2) ++#define I2C_START_STOP_FLAG (0x00000001 << 1) ++#define I2C_MODE_STATUS (0x00000001 << 0) ++ ++#define I2C_CONTROL 0x00c ++#define I2C_SCL_CONTROL (0x00000001 << 7) ++#define I2C_SDA_CONTROL (0x00000001 << 6) ++#define I2C_RECEIVE_PROTECT (0x00000001 << 5) ++#define I2C_RECEIVE_PRO_READ (0x00000001 << 4) ++#define I2C_TRANS_SELF_CLEAR (0x00000001 << 3) ++#define I2C_TRANS_S_SELF_CLEAR (0x00000001 << 2) ++#define I2C_SLAVE_ADDR_10BIT (0x00000001 << 1) ++#define I2C_RESET (0x00000001 << 0) ++ ++#define I2C_CLOCK_DIVISOR_HIGH 0x010 ++#define I2C_CLOCK_HIGH (0x0000ffff << 0) ++ ++#define I2C_CLOCK_DIVISOR_LOW 0x014 ++#define I2C_CLOCK_LOW (0x0000ffff << 0) ++ ++#define I2C_RX_LEVEL 0x01c ++#define I2C_RECEIVE_RANGE (0x0000007f << 0) ++ ++#define I2C_TX_LEVEL 0x020 ++#define I2C_TRANSMIT_RANGE (0x0000007f << 0) ++ ++#define I2C_SDA_HOLD 0x028 ++#define I2C_HOLD_TIME (0x0000007f << 0) ++ ++#define MODULE_CONF 0xfd4 ++#define INT_CLR_ENABLE 0xfd8 ++#define I2C_CLR_ENABLE_STFNF (0x00000001 << 12) ++#define I2C_CLR_ENABLE_MTFNF (0x00000001 << 11) ++#define I2C_CLR_ENABLE_RFDA (0x00000001 << 10) ++#define I2C_CLR_ENABLE_RFF (0x00000001 << 9) ++#define I2C_CLR_ENABLE_STDR (0x00000001 << 8) ++#define I2C_CLR_ENABLE_MTDR (0x00000001 << 7) ++#define I2C_CLR_ENABLE_IBE (0x00000001 << 6) ++#define I2C_CLR_ENABLE_MSMC (0x00000001 << 5) ++#define I2C_CLR_ENABLE_SRSD (0x00000001 << 4) ++#define I2C_CLR_ENABLE_STSD (0x00000001 << 3) ++#define I2C_CLR_ENABLE_MTNA (0x00000001 << 2) ++#define I2C_CLR_ENABLE_MAF (0x00000001 << 1) ++#define I2C_CLR_ENABLE_MTD (0x00000001 << 0) ++ ++#define INT_SET_ENABLE 0xfdc ++#define I2C_SET_ENABLE_STFNF (0x00000001 << 12) ++#define I2C_SET_ENABLE_MTFNF (0x00000001 << 11) ++#define I2C_SET_ENABLE_RFDA (0x00000001 << 10) ++#define I2C_SET_ENABLE_RFF (0x00000001 << 9) ++#define I2C_SET_ENABLE_STDR (0x00000001 << 8) ++#define I2C_SET_ENABLE_MTDR (0x00000001 << 7) ++#define I2C_SET_ENABLE_IBE (0x00000001 << 6) ++#define I2C_SET_ENABLE_MSMC (0x00000001 << 5) ++#define I2C_SET_ENABLE_SRSD (0x00000001 << 4) ++#define I2C_SET_ENABLE_STSD (0x00000001 << 3) ++#define I2C_SET_ENABLE_MTNA (0x00000001 << 2) ++#define I2C_SET_ENABLE_MAF (0x00000001 << 1) ++#define I2C_SET_ENABLE_MTD (0x00000001 << 0) ++ ++#define INT_STATUS 0xfe0 ++#define I2C_INTERRUPT_STFNF (0x00000001 << 12) ++#define I2C_INTERRUPT_MTFNF (0x00000001 << 11) ++#define I2C_INTERRUPT_RFDA (0x00000001 << 10) ++#define I2C_INTERRUPTE_RFF (0x00000001 << 9) ++#define I2C_SLAVE_INTERRUPT_STDR (0x00000001 << 8) ++#define I2C_MASTER_INTERRUPT_MTDR (0x00000001 << 7) ++#define I2C_ERROR_IBE (0x00000001 << 6) ++#define I2C_MODE_CHANGE_INTER_MSMC (0x00000001 << 5) ++#define I2C_SLAVE_RECEIVE_INTER_SRSD (0x00000001 << 4) ++#define I2C_SLAVE_TRANSMIT_INTER_STSD (0x00000001 << 3) ++#define I2C_ACK_INTER_MTNA (0x00000001 << 2) ++#define I2C_FAILURE_INTER_MAF (0x00000001 << 1) ++#define I2C_INTERRUPT_MTD (0x00000001 << 0) ++ ++#define INT_ENABLE 0xfe4 ++#define I2C_ENABLE_STFNF (0x00000001 << 12) ++#define I2C_ENABLE_MTFNF (0x00000001 << 11) ++#define I2C_ENABLE_RFDA (0x00000001 << 10) ++#define I2C_ENABLE_RFF (0x00000001 << 9) ++#define I2C_ENABLE_STDR (0x00000001 << 8) ++#define I2C_ENABLE_MTDR (0x00000001 << 7) ++#define I2C_ENABLE_IBE (0x00000001 << 6) ++#define I2C_ENABLE_MSMC (0x00000001 << 5) ++#define I2C_ENABLE_SRSD (0x00000001 << 4) ++#define I2C_ENABLE_STSD (0x00000001 << 3) ++#define I2C_ENABLE_MTNA (0x00000001 << 2) ++#define I2C_ENABLE_MAF (0x00000001 << 1) ++#define I2C_ENABLE_MTD (0x00000001 << 0) ++ ++#define INT_CLR_STATUS 0xfe8 ++#define I2C_CLR_STATUS_STFNF (0x00000001 << 12) ++#define I2C_CLR_STATUS_MTFNF (0x00000001 << 11) ++#define I2C_CLR_STATUS_RFDA (0x00000001 << 10) ++#define I2C_CLR_STATUS_RFF (0x00000001 << 9) ++#define I2C_CLR_STATUS_STDR (0x00000001 << 8) ++#define I2C_CLR_STATUS_MTDR (0x00000001 << 7) ++#define I2C_CLR_STATUS_IBE (0x00000001 << 6) ++#define I2C_CLR_STATUS_MSMC (0x00000001 << 5) ++#define I2C_CLR_STATUS_SRSD (0x00000001 << 4) ++#define I2C_CLR_STATUS_STSD (0x00000001 << 3) ++#define I2C_CLR_STATUS_MTNA (0x00000001 << 2) ++#define I2C_CLR_STATUS_MAF (0x00000001 << 1) ++#define I2C_CLR_STATIS_MTD (0x00000001 << 0) ++ ++#define INT_SET_STATUS 0xfec ++#define I2C_SET_STATUS_STFNF (0x00000001 << 12) ++#define I2C_SET_STATUS_MTFNF (0x00000001 << 11) ++#define I2C_SET_STATUS_RFDA (0x00000001 << 10) ++#define I2C_SET_STATUS_RFF (0x00000001 << 9) ++#define I2C_SET_STATUS_STDR (0x00000001 << 8) ++#define I2C_SET_STATUS_MTDR (0x00000001 << 7) ++#define I2C_SET_STATUS_IBE (0x00000001 << 6) ++#define I2C_SET_STATUS_MSMC (0x00000001 << 5) ++#define I2C_SET_STATUS_SRSD (0x00000001 << 4) ++#define I2C_SET_STATUS_STSD (0x00000001 << 3) ++#define I2C_SET_STATUS_MTNA (0x00000001 << 2) ++#define I2C_SET_STATUS_MAF (0x00000001 << 1) ++#define I2C_SET_STATIS_MTD (0x00000001 << 0) ++ ++ ++ ++ ++/* -------------- SPI Registers -------------- */ ++ ++#define SPI 0x0000d000 ++ ++#define SPI_CONTROL_REG 0x000 ++#define SPI_SERIAL_INTER_ENABLE (0x00000001 << 7) ++#define SPI_LSB_FIRST_ENABLE (0x00000001 << 6) ++#define SPI_MODE_SELECT (0x00000001 << 5) ++#define SPI_CLOCK_POLARITY (0x00000001 << 4) ++#define SPI_CLOCK_PHASE (0x00000001 << 3) ++ ++#define SPI_STATUS 0x004 ++#define SPI_TRANSFER_FLAG (0x00000001 << 7) ++#define SPI_WRITE_COLLISSION (0x00000001 << 6) ++#define SPI_READ_OVERRUN (0x00000001 << 5) ++#define SPI_MODE_FAULT (0x00000001 << 4) ++#define SPI_SLAVE_ABORT (0x00000001 << 3) ++ ++#define SPI_DATA 0x008 ++#define SPI_BIDI_DATA (0x000000ff << 0) ++ ++#define SPI_CLOCK_COUNTER 0x00c ++#define SPI_CLOCK (0x00000001 << 0) ++ ++ ++ ++ ++/* -------------- GPIO Registers -------------- */ ++ ++#define GPIO 0x0000e000 ++ ++#define GPIO_RD 0x000 ++#define GPIO_WR 0x004 ++#define GPIO_WR_MODE 0x008 ++#define GPIO_OEN 0x00c ++ ++#define GPIO_SW_RST 0xff0 ++#define GPIO_SW_RESET (0x00000001 << 0) ++ ++#define GPIO_31 (1 << 31) ++#define GPIO_30 (1 << 30) ++#define GPIO_29 (1 << 29) ++#define GPIO_28 (1 << 28) ++#define GPIO_27 (1 << 27) ++#define GPIO_26 (1 << 26) ++#define GPIO_25 (1 << 25) ++#define GPIO_24 (1 << 24) ++#define GPIO_23 (1 << 23) ++#define GPIO_22 (1 << 22) ++#define GPIO_21 (1 << 21) ++#define GPIO_20 (1 << 20) ++#define GPIO_19 (1 << 19) ++#define GPIO_18 (1 << 18) ++#define GPIO_17 (1 << 17) ++#define GPIO_16 (1 << 16) ++#define GPIO_15 (1 << 15) ++#define GPIO_14 (1 << 14) ++#define GPIO_13 (1 << 13) ++#define GPIO_12 (1 << 12) ++#define GPIO_11 (1 << 11) ++#define GPIO_10 (1 << 10) ++#define GPIO_09 (1 << 9) ++#define GPIO_08 (1 << 8) ++#define GPIO_07 (1 << 7) ++#define GPIO_06 (1 << 6) ++#define GPIO_05 (1 << 5) ++#define GPIO_04 (1 << 4) ++#define GPIO_03 (1 << 3) ++#define GPIO_02 (1 << 2) ++#define GPIO_01 (1 << 1) ++#define GPIO_00 (1 << 0) ++ ++/* -------------- PHI_0 Registers -------------- */ ++ ++#define PHI_0 0x0000f000 ++ ++#define PHI_0_MODE 0x0000 ++#define PHI_0_0_CONFIG 0x0008 ++#define PHI_0_1_CONFIG 0x000c ++#define PHI_0_2_CONFIG 0x0010 ++#define PHI_0_3_CONFIG 0x0014 ++ ++#define PHI_POLARITY 0x0038 ++#define PHI_TIMEOUT 0x003c ++#define PHI_SW_RST 0x0ff0 ++ ++#define PHI_0_0_RW_0 0x1000 ++#define PHI_0_0_RW_511 0x17fc ++ ++#define PHI_0_1_RW_0 0x1800 ++#define PHI_0_1_RW_511 0x1ffc ++ ++#define PHI_0_2_RW_0 0x2000 ++#define PHI_0_2_RW_511 0x27fc ++ ++#define PHI_0_3_RW_0 0x2800 ++#define PHI_0_3_RW_511 0x2ffc ++ ++#define PHI_CSN_DEASSERT (0x00000001 << 2) ++#define PHI_AUTO_INCREMENT (0x00000001 << 1) ++#define PHI_FIFO_MODE (0x00000001 << 0) ++ ++#define PHI_DELAY_RD_WR (0x0000001f << 27) ++#define PHI_EXTEND_RDY3 (0x00000003 << 25) ++#define PHI_EXTEND_RDY2 (0x00000003 << 23) ++#define PHI_EXTEND_RDY1 (0x00000003 << 21) ++#define PHI_EXTEND_RDY0 (0x00000003 << 19) ++#define PHI_RDY3_OD (0x00000001 << 18) ++#define PHI_RDY2_OD (0x00000001 << 17) ++#define PHI_RDY1_OD (0x00000001 << 16) ++#define PHI_RDY0_OD (0x00000001 << 15) ++#define PHI_ALE_POL (0x00000001 << 14) ++#define PHI_WRN_POL (0x00000001 << 13) ++#define PHI_RDN_POL (0x00000001 << 12) ++#define PHI_RDY3_POL (0x00000001 << 11) ++#define PHI_RDY2_POL (0x00000001 << 10) ++#define PHI_RDY1_POL (0x00000001 << 9) ++#define PHI_RDY0_POL (0x00000001 << 8) ++#define PHI_CSN7_POL (0x00000001 << 7) ++#define PHI_CSN6_POL (0x00000001 << 6) ++#define PHI_CSN5_POL (0x00000001 << 5) ++#define PHI_CSN4_POL (0x00000001 << 4) ++#define PHI_CSN3_POL (0x00000001 << 3) ++#define PHI_CSN2_POL (0x00000001 << 2) ++#define PHI_CSN1_POL (0x00000001 << 1) ++#define PHI_CSN0_POL (0x00000001 << 0) ++ ++/* -------------- PHI_1 Registers -------------- */ ++ ++#define PHI_1 0x00020000 ++ ++#define PHI_1_MODE 0x00004 ++#define PHI_1_0_CONFIG 0x00018 ++#define PHI_1_1_CONFIG 0x0001c ++#define PHI_1_2_CONFIG 0x00020 ++#define PHI_1_3_CONFIG 0x00024 ++#define PHI_1_4_CONFIG 0x00028 ++#define PHI_1_5_CONFIG 0x0002c ++#define PHI_1_6_CONFIG 0x00030 ++#define PHI_1_7_CONFIG 0x00034 ++ ++#define PHI_1_0_RW_0 0x00000 ++#define PHI_1_0_RW_16383 0x0fffc ++ ++#define PHI_1_1_RW_0 0x1000 ++#define PHI_1_1_RW_16383 0x1ffc ++ ++#define PHI_1_2_RW_0 0x2000 ++#define PHI_1_2_RW_16383 0x2ffc ++ ++#define PHI_1_3_RW_0 0x3000 ++#define PHI_1_3_RW_16383 0x3ffc ++ ++#define PHI_1_4_RW_0 0x4000 ++#define PHI_1_4_RW_16383 0x4ffc ++ ++#define PHI_1_5_RW_0 0x5000 ++#define PHI_1_5_RW_16383 0x5ffc ++ ++#define PHI_1_6_RW_0 0x6000 ++#define PHI_1_6_RW_16383 0x6ffc ++ ++#define PHI_1_7_RW_0 0x7000 ++#define PHI_1_7_RW_16383 0x7ffc ++ ++/* -------------- CGU Registers -------------- */ ++ ++#define CGU 0x00013000 ++ ++#define CGU_SCR_0 0x000 ++#define CGU_SCR_1 0x004 ++#define CGU_SCR_2 0x008 ++#define CGU_SCR_3 0x00c ++#define CGU_SCR_4 0x010 ++#define CGU_SCR_5 0x014 ++#define CGU_SCR_6 0x018 ++#define CGU_SCR_7 0x01c ++#define CGU_SCR_8 0x020 ++#define CGU_SCR_9 0x024 ++#define CGU_SCR_10 0x028 ++#define CGU_SCR_11 0x02c ++#define CGU_SCR_12 0x030 ++#define CGU_SCR_13 0x034 ++#define CGU_SCR_STOP (0x00000001 << 3) ++#define CGU_SCR_RESET (0x00000001 << 2) ++#define CGU_SCR_ENF2 (0x00000001 << 1) ++#define CGU_SCR_ENF1 (0x00000001 << 0) ++ ++#define CGU_FS1_0 0x038 ++#define CGU_FS1_1 0x03c ++#define CGU_FS1_2 0x040 ++#define CGU_FS1_3 0x044 ++#define CGU_FS1_4 0x048 ++#define CGU_FS1_5 0x04c ++#define CGU_FS1_6 0x050 ++#define CGU_FS1_7 0x054 ++#define CGU_FS1_8 0x058 ++#define CGU_FS1_9 0x05c ++#define CGU_FS1_10 0x060 ++#define CGU_FS1_11 0x064 ++#define CGU_FS1_12 0x068 ++#define CGU_FS1_13 0x06c ++#define CGU_FS1_PLL (0x00000000 << 0) ++ ++ ++#define CGU_FS2_0 0x070 ++#define CGU_FS2_1 0x074 ++#define CGU_FS2_2 0x078 ++#define CGU_FS2_3 0x07c ++#define CGU_FS2_4 0x080 ++#define CGU_FS2_5 0x084 ++#define CGU_FS2_6 0x088 ++#define CGU_FS2_7 0x08c ++#define CGU_FS2_8 0x090 ++#define CGU_FS2_9 0x094 ++#define CGU_FS2_10 0x098 ++#define CGU_FS2_11 0x09c ++#define CGU_FS2_12 0x0a0 ++#define CGU_FS2_13 0x0a4 ++ ++#define CGU_SSR_0 0x0a8 ++#define CGU_SSR_1 0x0ac ++#define CGU_SSR_2 0x0b0 ++#define CGU_SSR_3 0x0b4 ++#define CGU_SSR_4 0x0b8 ++#define CGU_SSR_5 0x0bc ++#define CGU_SSR_6 0x0c0 ++#define CGU_SSR_7 0x0c4 ++#define CGU_SSR_8 0x0c8 ++#define CGU_SSR_9 0x0cc ++#define CGU_SSR_10 0x0d0 ++#define CGU_SSR_11 0x0d4 ++#define CGU_SSR_12 0x0d8 ++#define CGU_SSR_13 0x0dc ++ ++#define CGU_PCR_0_0 0x0e0 ++#define CGU_PCR_0_1 0x0e4 ++#define CGU_PCR_0_2 0x0e8 ++#define CGU_PCR_0_3 0x0ec ++#define CGU_PCR_0_4 0x0f0 ++#define CGU_PCR_0_5 0x0f4 ++#define CGU_PCR_0_6 0x0f8 ++#define CGU_PCR_0_7 0x0fc ++#define CGU_PCR_1_0 0x100 ++#define CGU_PCR_1_1 0x104 ++#define CGU_PCR_2_0 0x108 ++#define CGU_PCR_2_1 0x10c ++#define CGU_PCR_3_0 0x110 ++#define CGU_PCR_3_1 0x114 ++#define CGU_PCR_3_2 0x118 ++#define CGU_PCR_4_0 0x11c ++#define CGU_PCR_4_1 0x120 ++#define CGU_PCR_5 0x124 ++#define CGU_PCR_6 0x128 ++#define CGU_PCR_7 0x12c ++#define CGU_PCR_8 0x130 ++#define CGU_PCR_9 0x134 ++#define CGU_PCR_10 0x138 ++#define CGU_PCR_11 0x13c ++#define CGU_PCR_12 0x140 ++#define CGU_PCR_13 0x144 ++#define CGU_PCR_WAKE_EN (0x00000001 << 2) ++#define CGU_PCR_AUTO (0x00000001 << 1) ++#define CGU_PCR_RUN (0x00000001 << 0) ++ ++ ++#define CGU_PSR_0_0 0x148 ++#define CGU_PSR_0_1 0x14c ++#define CGU_PSR_0_2 0x150 ++#define CGU_PSR_0_3 0x154 ++#define CGU_PSR_0_4 0x158 ++#define CGU_PSR_0_5 0x15c ++#define CGU_PSR_0_6 0x160 ++#define CGU_PSR_0_7 0x164 ++#define CGU_PSR_1_0 0x168 ++#define CGU_PSR_1_1 0x16c ++#define CGU_PSR_2_0 0x170 ++#define CGU_PSR_2_1 0x174 ++#define CGU_PSR_3_0 0x178 ++#define CGU_PSR_3_1 0x17c ++#define CGU_PSR_3_2 0x180 ++#define CGU_PSR_4_0 0x184 ++#define CGU_PSR_4_1 0x188 ++#define CGU_PSR_5 0x18c ++#define CGU_PSR_6 0x190 ++#define CGU_PSR_7 0x194 ++#define CGU_PSR_8 0x198 ++#define CGU_PSR_9 0x19c ++#define CGU_PSR_10 0x1a0 ++#define CGU_PSR_11 0x1a4 ++#define CGU_PSR_12 0x1a8 ++#define CGU_PSR_13 0x1ac ++ ++#define CGU_ESR_0_0 0x1b0 ++#define CGU_ESR_0_1 0x1b4 ++#define CGU_ESR_0_2 0x1b8 ++#define CGU_ESR_0_3 0x1bc ++#define CGU_ESR_0_4 0x1c0 ++#define CGU_ESR_0_5 0x1c4 ++#define CGU_ESR_0_6 0x1c8 ++#define CGU_ESR_0_7 0x1cc ++#define CGU_ESR_1_0 0x1d0 ++#define CGU_ESR_1_1 0x1d4 ++#define CGU_ESR_2_0 0x1d8 ++#define CGU_ESR_2_1 0x1dc ++#define CGU_ESR_3_0 0x1e0 ++#define CGU_ESR_3_1 0x1e4 ++#define CGU_ESR_3_2 0x1e8 ++#define CGU_ESR_4_0 0x1ec ++#define CGU_ESR_4_1 0x1f0 ++#define CGU_ESR_5 0x1f4 ++#define CGU_ESR_6 0x1f8 ++#define CGU_ESR_7 0x1fc ++#define CGU_ESR_8 0x200 ++#define CGU_ESR_9 0x204 ++#define CGU_ESR_10 0x208 ++#define CGU_ESR_11 0x20c ++#define CGU_ESR_12 0x210 ++#define CGU_ESR_13 0x214 ++#define CGU_ESR_FD_EN (0x00000001 << 0) ++ ++#define CGU_FDC_0 0x218 ++#define CGU_FDC_1 0x21c ++#define CGU_FDC_2 0x220 ++#define CGU_FDC_3 0x224 ++#define CGU_FDC_4 0x228 ++#define CGU_FDC_5 0x22c ++#define CGU_FDC_6 0x230 ++#define CGU_FDC_7 0x234 ++#define CGU_FDC_8 0x238 ++#define CGU_FDC_9 0x23c ++#define CGU_FDC_10 0x240 ++#define CGU_FDC_11 0x244 ++#define CGU_FDC_12 0x248 ++#define CGU_FDC_13 0x24c ++#define CGU_FDC_STRETCH (0x00000001 << 0) ++#define CGU_FDC_RESET (0x00000001 << 1) ++#define CGU_FDC_RUN1 (0x00000001 << 2) ++#define CGU_FDC_MADD (0x000000ff << 3) ++#define CGU_FDC_MSUB (0x000000ff << 11) ++ ++/* -------------- DCS Registers -------------- */ ++ ++#define DCS 0x00014000 ++ ++#define DCSC_CTRL 0x000 ++#define DCSC_SEL_PLLDI (0x03ffffff << 5) ++#define DCSC_TOUT_SEL (0x0000000f << 1) ++#define DCSC_TOUT_OFF (0x00000001 << 0) ++ ++#define DCSC_ADDR 0x00c ++#define DCSC_ERR_TOUT_ADDR (0x3fffffff << 2) ++ ++#define DCSC_STAT 0x010 ++#define DCSC_ERR_TOUT_GNT (0x0000001f << 24) ++#define DCSC_ERR_TOUT_SEL (0x0000007f << 10) ++#define DCSC_ERR_TOUT_READ (0x00000001 << 8) ++#define DCSC_ERR_TOUT_MASK (0x0000000f << 4) ++#define DCSC_ERR_ACK (0x00000001 << 1) ++ ++#define DCSC_FEATURES 0x040 ++#define DCSC_UNIQUE_ID (0x00000007 << 16) ++#define DCSC_SECURITY (0x00000001 << 14) ++#define DCSC_NUM_BASE_REGS (0x00000003 << 11) ++#define DCSC_NUM_TARGETS (0x0000001f << 5) ++#define DCSC_NUM_INITIATORS (0x0000001f << 0) ++ ++#define DCSC_BASE_REG0 0x100 ++#define DCSC_BASE_N_REG (0x00000fff << 20) ++ ++#define DCSC_INT_CLR_ENABLE 0xfd8 ++#define DCSC_INT_CLR_ENABLE_TOUT (0x00000001 << 1) ++#define DCSC_INT_CLR_ENABLE_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_SET_ENABLE 0xfdc ++#define DCSC_INT_SET_ENABLE_TOUT (0x00000001 << 1) ++#define DCSC_INT_SET_ENABLE_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_STATUS 0xfe0 ++#define DCSC_INT_STATUS_TOUT (0x00000001 << 1) ++#define DCSC_INT_STATUS_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_ENABLE 0xfe4 ++#define DCSC_INT_ENABLE_TOUT (0x00000001 << 1) ++#define DCSC_INT_ENABLE_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_CLR_STATUS 0xfe8 ++#define DCSC_INT_CLEAR_TOUT (0x00000001 << 1) ++#define DCSC_INT_CLEAR_ERROR (0x00000001 << 0) ++ ++#define DCSC_INT_SET_STATUS 0xfec ++#define DCSC_INT_SET_TOUT (0x00000001 << 1) ++#define DCSC_INT_SET_ERROR (0x00000001 << 0) ++ ++ ++ ++ ++/* -------------- GREG Registers -------------- */ ++ ++#define GREG 0x00012000 ++ ++#define GREG_SUBSYS_CONFIG 0x000 ++#define GREG_SUBSYS_ID (0x0000ffff << 16) ++#define GREG_SUBSYS_VID (0x0000ffff << 0) ++ ++#define GREG_MSI_BAR_PMCSR 0x004 ++#define GREG_PMCSR_SCALE_7 (0x00000003 << 30) ++#define GREG_PMCSR_SCALE_6 (0x00000003 << 28) ++#define GREG_PMCSR_SCALE_5 (0x00000003 << 26) ++#define GREG_PMCSR_SCALE_4 (0x00000003 << 24) ++#define GREG_PMCSR_SCALE_3 (0x00000003 << 22) ++#define GREG_PMCSR_SCALE_2 (0x00000003 << 20) ++#define GREG_PMCSR_SCALE_1 (0x00000003 << 18) ++#define GREG_PMCSR_SCALE_0 (0x00000003 << 16) ++ ++#define GREG_BAR_WIDTH_17 (0x0000001e << 8) ++#define GREG_BAR_WIDTH_18 (0x0000001c << 8) ++#define GREG_BAR_WIDTH_19 (0x00000018 << 8) ++#define GREG_BAR_WIDTH_20 (0x00000010 << 8) ++ ++#define GREG_BAR_PREFETCH (0x00000001 << 3) ++#define GREG_MSI_MM_CAP1 (0x00000000 << 0) // FIXME ! ++#define GREG_MSI_MM_CAP2 (0x00000001 << 0) ++#define GREG_MSI_MM_CAP4 (0x00000002 << 0) ++#define GREG_MSI_MM_CAP8 (0x00000003 << 0) ++#define GREG_MSI_MM_CAP16 (0x00000004 << 0) ++#define GREG_MSI_MM_CAP32 (0x00000005 << 0) ++ ++#define GREG_PMCSR_DATA_1 0x008 ++#define GREG_PMCSR_DATA_2 0x00c ++#define GREG_VI_CTRL 0x010 ++#define GREG_FGPI_CTRL 0x014 ++ ++#define GREG_RSTU_CTRL 0x018 ++#define GREG_BOOT_READY (0x00000001 << 13) ++#define GREG_RESET_REQ (0x00000001 << 12) ++#define GREG_IP_RST_RELEASE (0x00000001 << 11) ++#define GREG_ADAPTER_RST_RELEASE (0x00000001 << 10) ++#define GREG_PCIE_CORE_RST_RELEASE (0x00000001 << 9) ++#define GREG_BOOT_IP_RST_RELEASE (0x00000001 << 8) ++#define GREG_BOOT_RST_RELEASE (0x00000001 << 7) ++#define GREG_CGU_RST_RELEASE (0x00000001 << 6) ++#define GREG_IP_RST_ASSERT (0x00000001 << 5) ++#define GREG_ADAPTER_RST_ASSERT (0x00000001 << 4) ++#define GREG_RST_ASSERT (0x00000001 << 3) ++#define GREG_BOOT_IP_RST_ASSERT (0x00000001 << 2) ++#define GREG_BOOT_RST_ASSERT (0x00000001 << 1) ++#define GREG_CGU_RST_ASSERT (0x00000001 << 0) ++ ++#define GREG_I2C_CTRL 0x01c ++#define GREG_I2C_SLAVE_ADDR (0x0000007f << 0) ++ ++#define GREG_OVFLW_CTRL 0x020 ++#define GREG_OVERFLOW_ENABLE (0x00001fff << 0) ++ ++#define GREG_TAG_ACK_FLEN 0x024 ++#define GREG_TAG_ACK_FLEN_1B (0x00000000 << 0) ++#define GREG_TAG_ACK_FLEN_2B (0x00000001 << 0) ++#define GREG_TAG_ACK_FLEN_4B (0x00000002 << 0) ++#define GREG_TAG_ACK_FLEN_8B (0x00000003 << 0) ++ ++#define GREG_VIDEO_IN_CTRL 0x028 ++ ++#define GREG_SPARE_1 0x02c ++#define GREG_SPARE_2 0x030 ++#define GREG_SPARE_3 0x034 ++#define GREG_SPARE_4 0x038 ++#define GREG_SPARE_5 0x03c ++#define GREG_SPARE_6 0x040 ++#define GREG_SPARE_7 0x044 ++#define GREG_SPARE_8 0x048 ++#define GREG_SPARE_9 0x04c ++#define GREG_SPARE_10 0x050 ++#define GREG_SPARE_11 0x054 ++#define GREG_SPARE_12 0x058 ++#define GREG_SPARE_13 0x05c ++#define GREG_SPARE_14 0x060 ++#define GREG_SPARE_15 0x064 ++ ++#define GREG_FAIL_DISABLE 0x068 ++#define GREG_BOOT_FAIL_DISABLE (0x00000001 << 0) ++ ++#define GREG_SW_RST 0xff0 ++#define GREG_SW_RESET (0x00000001 << 0) ++ ++ ++ ++ ++/* BAR = 20 bits */ ++ ++/* -------------- PHI1 Registers -------------- */ ++ ++#define PHI_1 0x00020000 ++ ++ ++ ++#endif /* __SAA716x_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.c 2013-01-16 10:41:10.926798175 +0100 +@@ -0,0 +1,1071 @@ ++#include ++#include ++ ++#include "saa716x_rom.h" ++#include "saa716x_adap.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++int i; ++ ++static int eeprom_read_bytes(struct saa716x_dev *saa716x, u16 reg, u16 len, u8 *val) ++{ ++ struct saa716x_i2c *i2c = saa716x->i2c; ++ struct i2c_adapter *adapter = &i2c[SAA716x_I2C_BUS_B].i2c_adapter; ++ ++ u8 b0[] = { MSB(reg), LSB(reg) }; ++ int ret; ++ ++ struct i2c_msg msg[] = { ++ { .addr = 0x50, .flags = 0, .buf = b0, .len = sizeof (b0) }, ++ { .addr = 0x50, .flags = I2C_M_RD, .buf = val, .len = len } ++ }; ++ ++ ret = i2c_transfer(adapter, msg, 2); ++ if (ret != 2) { ++ dprintk(SAA716x_ERROR, 1, "read error ", reg, ret); ++ return -EREMOTEIO; ++ } ++ ++ return ret; ++} ++ ++static int saa716x_read_rombytes(struct saa716x_dev *saa716x, u16 reg, u16 len, u8 *val) ++{ ++ struct saa716x_i2c *i2c = saa716x->i2c; ++ struct i2c_adapter *adapter = &i2c[SAA716x_I2C_BUS_B].i2c_adapter; ++ struct i2c_msg msg[2]; ++ ++ u8 b0[2]; ++ int ret, count; ++ ++ count = len / DUMP_BYTES; ++ if (len % DUMP_BYTES) ++ count++; ++ ++ count *= 2; ++ ++ for (i = 0; i < count; i += 2) { ++ dprintk(SAA716x_DEBUG, 1, "Length=%d, Count=%d, Reg=0x%02x", ++ len, ++ count, ++ reg); ++ ++ b0[0] = MSB(reg); ++ b0[1] = LSB(reg); ++ ++ /* Write */ ++ msg[0].addr = 0x50; ++ msg[0].flags = 0; ++ msg[0].buf = b0; ++ msg[0].len = 2; ++ ++ /* Read */ ++ msg[1].addr = 0x50; ++ msg[1].flags = I2C_M_RD; ++ msg[1].buf = val; ++ ++ if (i == (count - 2)) { ++ /* last message */ ++ if (len % DUMP_BYTES) { ++ msg[1].len = len % DUMP_BYTES; ++ dprintk(SAA716x_DEBUG, 1, "Last Message length=%d", len % DUMP_BYTES); ++ } else { ++ msg[1].len = DUMP_BYTES; ++ } ++ } else { ++ msg[1].len = DUMP_BYTES; ++ } ++ ++ ret = i2c_transfer(adapter, msg, 2); ++ if (ret != 2) { ++ dprintk(SAA716x_ERROR, 1, "read error ", reg, ret); ++ return -EREMOTEIO; ++ } ++ ++ reg += DUMP_BYTES; ++ val += DUMP_BYTES; ++ } ++ ++ return 0; ++} ++ ++static int saa716x_get_offset(struct saa716x_dev *saa716x, u8 *buf, u32 *offset) ++{ ++ int i; ++ ++ *offset = 0; ++ for (i = 0; i < 256; i++) { ++ if (!(strncmp("START", buf + i, 5))) ++ break; ++ } ++ dprintk(SAA716x_INFO, 1, "Offset @ %d", i); ++ *offset = i; ++ ++ return 0; ++} ++ ++static int saa716x_eeprom_header(struct saa716x_dev *saa716x, ++ struct saa716x_romhdr *rom_header, ++ u8 *buf, ++ u32 *offset) ++{ ++ memcpy(rom_header, &buf[*offset], sizeof (struct saa716x_romhdr)); ++ if (rom_header->header_size != sizeof (struct saa716x_romhdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ (int)sizeof (struct saa716x_romhdr), ++ rom_header->header_size); ++ ++ return -1; ++ } ++ *offset += sizeof (struct saa716x_romhdr); ++ ++ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Data=%d bytes\n", ++ saa716x->pdev->device, ++ rom_header->data_size); ++ ++ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Version=%d\n", ++ saa716x->pdev->device, ++ rom_header->version); ++ ++ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Devices=%d\n", ++ saa716x->pdev->device, ++ rom_header->devices); ++ ++ dprintk(SAA716x_NOTICE, 0, "SAA%02x ROM: Compressed=%d\n\n", ++ saa716x->pdev->device, ++ rom_header->compression); ++ ++ return 0; ++} ++ ++int saa716x_dump_eeprom(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_romhdr rom_header; ++ u8 buf[DUMP_BYTES]; ++ int i, err = 0; ++ u32 offset = 0; ++ ++ err = eeprom_read_bytes(saa716x, DUMP_OFFST, DUMP_BYTES, buf); ++ if (err < 0) { ++ dprintk(SAA716x_ERROR, 1, "EEPROM Read error"); ++ return err; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, " Card: %s\n", ++ saa716x->config->model_name); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " ---------------- SAA%02x ROM @ Offset 0x%02x ----------------", ++ saa716x->pdev->device, ++ DUMP_OFFST); ++ ++ for (i = 0; i < DUMP_BYTES; i++) { ++ if ((i % 16) == 0) { ++ dprintk(SAA716x_NOTICE, 0, "\n "); ++ dprintk(SAA716x_NOTICE, 0, "%04x: ", i); ++ } ++ ++ if ((i % 8) == 0) ++ dprintk(SAA716x_NOTICE, 0, " "); ++ if ((i % 4) == 0) ++ dprintk(SAA716x_NOTICE, 0, " "); ++ dprintk(SAA716x_NOTICE, 0, "%02x ", buf[i]); ++ } ++ dprintk(SAA716x_NOTICE, 0, "\n"); ++ dprintk(SAA716x_NOTICE, 0, ++ " ---------------- SAA%02x ROM Dump end ---------------------\n\n", ++ saa716x->pdev->device); ++ ++ err = saa716x_get_offset(saa716x, buf, &offset); ++ if (err != 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Descriptor not found <%d>", err); ++ return err; ++ } ++ offset += 5; ++ saa716x->id_offst = offset; ++ /* Get header */ ++ err = saa716x_eeprom_header(saa716x, &rom_header, buf, &offset); ++ if (err != 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Header Read failed <%d>", err); ++ return -1; ++ } ++ saa716x->id_len = rom_header.data_size; ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(saa716x_dump_eeprom); ++ ++static void saa716x_descriptor_dbg(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset, ++ u8 size, ++ u8 ext_size) ++{ ++ int i; ++ ++ dprintk(SAA716x_INFO, 0, " "); ++ for (i = 0; i < 49; i++) ++ dprintk(SAA716x_INFO, 0, "-"); ++ ++ for (i = 0; i < size + ext_size; i++) { ++ if ((i % 16) == 0) ++ dprintk(SAA716x_INFO, 0, "\n "); ++ if ((i % 8) == 0) ++ dprintk(SAA716x_INFO, 0, " "); ++ if ((i % 4) == 0) ++ dprintk(SAA716x_INFO, 0, " "); ++ ++ dprintk(SAA716x_INFO, 0, "%02x ", buf[*offset + i]); ++ } ++ ++ dprintk(SAA716x_INFO, 0, "\n "); ++ for (i = 0; i < 49; i++) ++ dprintk(SAA716x_INFO, 0, "-"); ++ dprintk(SAA716x_INFO, 0, "\n"); ++ ++} ++ ++static int saa716x_decoder_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_decoder_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_decoder_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_decoder_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_decoder_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext Data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_gpio_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_gpio_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_gpio_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_gpio_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_gpio_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Pins=%d\n", ++ saa716x->pdev->device, ++ header.pins); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ ++ return 0; ++} ++ ++static int saa716x_video_decoder_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_video_decoder_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_video_decoder_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_video_decoder_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_video_decoder_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: PORT 0=0x%02x\n", ++ saa716x->pdev->device, ++ header.video_port0); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: PORT 1=0x%02x\n", ++ saa716x->pdev->device, ++ header.video_port1); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: PORT 2=0x%02x\n", ++ saa716x->pdev->device, ++ header.video_port2); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: VBI PORT ID=0x%02x\n", ++ saa716x->pdev->device, ++ header.vbi_port_id); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Video PORT Type=0x%02x\n", ++ saa716x->pdev->device, ++ header.video_port_type); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: VBI PORT Type=0x%02x\n", ++ saa716x->pdev->device, ++ header.vbi_port_type); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Encoder PORT Type=0x%02x\n", ++ saa716x->pdev->device, ++ header.encoder_port_type); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Video Output=0x%02x\n", ++ saa716x->pdev->device, ++ header.video_output); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: VBI Output=0x%02x\n", ++ saa716x->pdev->device, ++ header.vbi_output); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Encoder Output=0x%02x\n", ++ saa716x->pdev->device, ++ header.encoder_output); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_audio_decoder_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_audio_decoder_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_audio_decoder_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_audio_decoder_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_audio_decoder_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_event_source_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_evsrc_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_evsrc_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_evsrc_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_evsrc_hdr)); ++ ++ return -1; ++ } ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_crossbar_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_xbar_hdr header; ++ struct saa716x_xbar_pair_info pair_info; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_xbar_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_xbar_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_xbar_hdr)); ++ ++ return -1; ++ } ++ ++ memcpy(&pair_info, &buf[*offset], sizeof (struct saa716x_xbar_pair_info)); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Pairs=%d\n", ++ saa716x->pdev->device, ++ header.pair_inputs); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data + (sizeof (struct saa716x_xbar_pair_info) * header.pair_inputs); ++ return 0; ++} ++ ++static int saa716x_tuner_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_tuner_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_tuner_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_tuner_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_tuner_hdr)); ++ ++ return -1; ++ } ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_pll_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_pll_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_pll_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_pll_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_pll_hdr)); ++ ++ return -1; ++ } ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_channel_decoder_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_channel_decoder_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_channel_decoder_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_channel_decoder_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_channel_decoder_hdr)); ++ ++ return -1; ++ } ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_encoder_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_encoder_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_encoder_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_encoder_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_encoder_hdr)); ++ ++ return -1; ++ } ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_ir_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_ir_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_ir_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_ir_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_ir_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_eeprom_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_eeprom_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_eeprom_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_eeprom_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof (struct saa716x_eeprom_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_filter_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_filter_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_filter_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_filter_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof(struct saa716x_filter_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_streamdev_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ struct saa716x_streamdev_hdr header; ++ ++ memcpy(&header, &buf[*offset], sizeof (struct saa716x_streamdev_hdr)); ++ saa716x_descriptor_dbg(saa716x, buf, offset, header.size, header.ext_data); ++ if (header.size != sizeof (struct saa716x_streamdev_hdr)) { ++ dprintk(SAA716x_ERROR, 1, ++ "ERROR: Header size mismatch! Read size=%d bytes, Expected=%d", ++ header.size, ++ (int)sizeof(struct saa716x_streamdev_hdr)); ++ ++ return -1; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ header.size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n", ++ saa716x->pdev->device, ++ header.ext_data); ++ ++ *offset += header.size + header.ext_data; ++ return 0; ++} ++ ++static int saa716x_unknown_device_info(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset) ++{ ++ u8 size; ++ u8 ext_size = 0; ++ ++ size = buf[*offset]; ++ if (size > 1) ++ ext_size = buf[*offset + size -1]; ++ ++ saa716x_descriptor_dbg(saa716x, buf, offset, size, ext_size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ size); ++ ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Ext data=%d bytes\n\n", ++ saa716x->pdev->device, ++ ext_size); ++ ++ *offset += size + ext_size; ++ return 0; ++} ++ ++ ++static void saa716x_device_dbg(struct saa716x_dev *saa716x, ++ u8 *buf, ++ u32 *offset, ++ u8 size, ++ u8 ext_size, ++ u8 addr_size) ++{ ++ int i; ++ ++ dprintk(SAA716x_INFO, 0, " "); ++ for (i = 0; i < 53; i++) ++ dprintk(SAA716x_INFO, 0, "-"); ++ ++ for (i = 0; i < size + ext_size + addr_size; i++) { ++ if ((i % 16) == 0) ++ dprintk(SAA716x_INFO, 0, "\n "); ++ if ((i % 8) == 0) ++ dprintk(SAA716x_INFO, 0, " "); ++ if ((i % 4) == 0) ++ dprintk(SAA716x_INFO, 0, " "); ++ ++ dprintk(SAA716x_INFO, 0, "%02x ", buf[*offset + i]); ++ } ++ ++ dprintk(SAA716x_INFO, 0, "\n "); ++ for (i = 0; i < 53; i++) ++ dprintk(SAA716x_INFO, 0, "-"); ++ dprintk(SAA716x_INFO, 0, "\n"); ++ ++} ++ ++ ++static int saa716x_device_info(struct saa716x_dev *saa716x, ++ struct saa716x_devinfo *device, ++ u8 *buf, ++ u32 *offset) ++{ ++ u8 address = 0; ++ ++ memcpy(device, &buf[*offset], sizeof(struct saa716x_devinfo)); ++ if (device->struct_size != sizeof(struct saa716x_devinfo)) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Device size mismatch! Read=%d bytes, expected=%d bytes", ++ device->struct_size, ++ (int)sizeof(struct saa716x_devinfo)); ++ ++ return -1; ++ } ++ ++ saa716x_device_dbg(saa716x, ++ buf, ++ offset, ++ device->struct_size, ++ device->extd_data_size, ++ device->addr_size); ++ ++ *offset += device->struct_size; ++ ++ if (device->addr_size) { ++ address = buf[*offset]; ++ address >>= 1; ++ *offset += device->addr_size; ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Device @ 0x%02x\n", ++ saa716x->pdev->device, ++ address); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Size=%d bytes\n", ++ saa716x->pdev->device, ++ device->struct_size); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Device ID=0x%02x\n", ++ saa716x->pdev->device, ++ device->device_id); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Master ID=0x%02x\n", ++ saa716x->pdev->device, ++ device->master_devid); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Bus ID=0x%02x\n", ++ saa716x->pdev->device, ++ device->master_busid); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Device type=0x%02x\n", ++ saa716x->pdev->device, ++ device->device_type); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Implementation ID=0x%02x\n", ++ saa716x->pdev->device, ++ device->implem_id); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Path ID=0x%02x\n", ++ saa716x->pdev->device, ++ device->path_id); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: GPIO ID=0x%02x\n", ++ saa716x->pdev->device, ++ device->gpio_id); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Address=%d bytes\n", ++ saa716x->pdev->device, ++ device->addr_size); ++ ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: Extended data=%d bytes\n\n", ++ saa716x->pdev->device, ++ device->extd_data_size); ++ ++ if (device->extd_data_size) { ++ u32 mask; ++ ++ mask = 0x00000001; ++ while (mask) { ++ if (device->device_type & mask) { ++ switch (mask) { ++ case DECODER_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found decoder device\n", ++ saa716x->pdev->device); ++ ++ saa716x_decoder_info(saa716x, buf, offset); ++ break; ++ ++ case GPIO_SOURCE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found GPIO device\n", ++ saa716x->pdev->device); ++ ++ saa716x_gpio_info(saa716x, buf, offset); ++ break; ++ ++ case VIDEO_DECODER: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Video Decoder device\n", ++ saa716x->pdev->device); ++ ++ saa716x_video_decoder_info(saa716x, buf, offset); ++ break; ++ ++ case AUDIO_DECODER: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Audio Decoder device\n", ++ saa716x->pdev->device); ++ ++ saa716x_audio_decoder_info(saa716x, buf, offset); ++ break; ++ ++ case EVENT_SOURCE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Event source\n", ++ saa716x->pdev->device); ++ ++ saa716x_event_source_info(saa716x, buf, offset); ++ break; ++ ++ case CROSSBAR: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Crossbar device\n", ++ saa716x->pdev->device); ++ ++ saa716x_crossbar_info(saa716x, buf, offset); ++ break; ++ ++ case TUNER_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Tuner device\n", ++ saa716x->pdev->device); ++ ++ saa716x_tuner_info(saa716x, buf, offset); ++ break; ++ ++ case PLL_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found PLL device\n", ++ saa716x->pdev->device); ++ ++ saa716x_pll_info(saa716x, buf, offset); ++ break; ++ ++ case CHANNEL_DECODER: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Channel Demodulator device\n", ++ saa716x->pdev->device); ++ ++ saa716x_channel_decoder_info(saa716x, buf, offset); ++ break; ++ ++ case RDS_DECODER: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found RDS Decoder device\n", ++ saa716x->pdev->device); ++ ++ saa716x_unknown_device_info(saa716x, buf, offset); ++ break; ++ ++ case ENCODER_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Encoder device\n", ++ saa716x->pdev->device); ++ ++ saa716x_encoder_info(saa716x, buf, offset); ++ break; ++ ++ case IR_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found IR device\n", ++ saa716x->pdev->device); ++ ++ saa716x_ir_info(saa716x, buf, offset); ++ break; ++ ++ case EEPROM_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found EEPROM device\n", ++ saa716x->pdev->device); ++ ++ saa716x_eeprom_info(saa716x, buf, offset); ++ break; ++ ++ case NOISE_FILTER: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Noise filter device\n", ++ saa716x->pdev->device); ++ ++ saa716x_filter_info(saa716x, buf, offset); ++ break; ++ ++ case LNx_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found LNx device\n", ++ saa716x->pdev->device); ++ ++ saa716x_unknown_device_info(saa716x, buf, offset); ++ break; ++ ++ case STREAM_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found streaming device\n", ++ saa716x->pdev->device); ++ ++ saa716x_streamdev_info(saa716x, buf, offset); ++ break; ++ ++ case CONFIGSPACE_DEVICE: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found Configspace device\n", ++ saa716x->pdev->device); ++ ++ saa716x_unknown_device_info(saa716x, buf, offset); ++ break; ++ ++ default: ++ dprintk(SAA716x_NOTICE, 0, ++ " SAA%02x ROM: Found unknown device\n", ++ saa716x->pdev->device); ++ ++ saa716x_unknown_device_info(saa716x, buf, offset); ++ break; ++ } ++ } ++ mask <<= 1; ++ } ++ } ++ ++ dprintk(SAA716x_NOTICE, 0, "\n"); ++ ++ return 0; ++} ++ ++int saa716x_eeprom_data(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_romhdr rom_header; ++ struct saa716x_devinfo *device; ++ ++ u8 buf[1024]; ++ int i, ret = 0; ++ u32 offset = 0; ++ ++ /* dump */ ++ ret = saa716x_read_rombytes(saa716x, saa716x->id_offst, saa716x->id_len + 8, buf); ++ if (ret < 0) { ++ dprintk(SAA716x_ERROR, 1, "EEPROM Read error <%d>", ret); ++ goto err0; ++ } ++ ++ /* Get header */ ++ ret = saa716x_eeprom_header(saa716x, &rom_header, buf, &offset); ++ if (ret != 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Header Read failed <%d>", ret); ++ goto err0; ++ } ++ ++ /* allocate for device info */ ++ device = kzalloc(sizeof (struct saa716x_devinfo) * rom_header.devices, GFP_KERNEL); ++ if (device == NULL) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: out of memory"); ++ goto err0; ++ } ++ ++ for (i = 0; i < rom_header.devices; i++) { ++ dprintk(SAA716x_NOTICE, 0, " SAA%02x ROM: ===== Device %d =====\n", ++ saa716x->pdev->device, ++ i); ++ ++ ret = saa716x_device_info(saa716x, &device[i], buf, &offset); ++ if (ret != 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Device info read failed <%d>", ret); ++ goto err1; ++ } ++ } ++ ++ kfree(device); ++ ++ return 0; ++ ++err1: ++ kfree(device); ++ ++err0: ++ return ret; ++} ++EXPORT_SYMBOL_GPL(saa716x_eeprom_data); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_rom.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_rom.h 2013-01-16 10:41:10.926798175 +0100 +@@ -0,0 +1,253 @@ ++#ifndef __SAA716x_ROM_H ++#define __SAA716x_ROM_H ++ ++ ++#define MSB(__x) ((__x >> 8) & 0xff) ++#define LSB(__x) (__x & 0xff) ++ ++#define DUMP_BYTES 0xf0 ++#define DUMP_OFFST 0x000 ++ ++struct saa716x_dev; ++ ++struct saa716x_romhdr { ++ u16 header_size; ++ u8 compression; ++ u8 version; ++ u16 data_size; ++ u8 devices; ++ u8 checksum; ++} __attribute__((packed)); ++ ++struct saa716x_devinfo { ++ u8 struct_size; ++ u8 device_id; ++ u8 master_devid; ++ u8 master_busid; ++ u32 device_type; ++ u16 implem_id; ++ u8 path_id; ++ u8 gpio_id; ++ u16 addr_size; ++ u16 extd_data_size; ++} __attribute__((packed)); ++ ++enum saa716x_device_types { ++ DECODER_DEVICE = 0x00000001, ++ GPIO_SOURCE = 0x00000002, ++ VIDEO_DECODER = 0x00000004, ++ AUDIO_DECODER = 0x00000008, ++ EVENT_SOURCE = 0x00000010, ++ CROSSBAR = 0x00000020, ++ TUNER_DEVICE = 0x00000040, ++ PLL_DEVICE = 0x00000080, ++ CHANNEL_DECODER = 0x00000100, ++ RDS_DECODER = 0x00000200, ++ ENCODER_DEVICE = 0x00000400, ++ IR_DEVICE = 0x00000800, ++ EEPROM_DEVICE = 0x00001000, ++ NOISE_FILTER = 0x00002000, ++ LNx_DEVICE = 0x00004000, ++ STREAM_DEVICE = 0x00010000, ++ CONFIGSPACE_DEVICE = 0x80000000 ++}; ++ ++struct saa716x_decoder_hdr { ++ u8 size; ++ u8 ext_data; ++}; ++ ++struct saa716x_decoder_info { ++ struct saa716x_decoder_hdr decoder_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_gpio_hdr { ++ u8 size; ++ u8 pins; ++ u8 rsvd; ++ u8 ext_data; ++}; ++ ++struct saa716x_gpio_info { ++ struct saa716x_gpio_hdr gpio_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_video_decoder_hdr { ++ u8 size; ++ u8 video_port0; ++ u8 video_port1; ++ u8 video_port2; ++ u8 vbi_port_id; ++ u8 video_port_type; ++ u8 vbi_port_type; ++ u8 encoder_port_type; ++ u8 video_output; ++ u8 vbi_output; ++ u8 encoder_output; ++ u8 ext_data; ++}; ++ ++struct saa716x_video_decoder_info { ++ struct saa716x_video_decoder_hdr decoder_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_audio_decoder_hdr { ++ u8 size; ++ u8 port; ++ u8 output; ++ u8 ext_data; ++}; ++ ++struct saa716x_audio_decoder_info { ++ struct saa716x_audio_decoder_hdr decoder_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_evsrc_hdr { ++ u8 size; ++ u8 master_devid; ++ u16 condition_id; ++ u8 rsvd; ++ u8 ext_data; ++}; ++ ++struct saa716x_evsrc_info { ++ struct saa716x_evsrc_hdr evsrc_hdr; ++ u8 *ext_data; ++}; ++ ++enum saa716x_input_pair_type { ++ TUNER_SIF = 0x00, ++ TUNER_LINE = 0x01, ++ TUNER_SPDIF = 0x02, ++ TUNER_NONE = 0x03, ++ CVBS_LINE = 0x04, ++ CVBS_SPDIF = 0x05, ++ CVBS_NONE = 0x06, ++ YC_LINE = 0x07, ++ YC_SPDIF = 0x08, ++ YC_NONE = 0x09, ++ YPbPr_LINE = 0x0a, ++ YPbPr_SPDIF = 0x0b, ++ YPbPr_NONE = 0x0c, ++ NO_LINE = 0x0d, ++ NO_SPDIF = 0x0e, ++ RGB_LINE = 0x0f, ++ RGB_SPDIF = 0x10, ++ RGB_NONE = 0x11 ++}; ++ ++struct saa716x_xbar_pair_info { ++ u8 pair_input_type; ++ u8 video_input_id; ++ u8 audio_input_id; ++}; ++ ++struct saa716x_xbar_hdr { ++ u8 size; ++ u8 pair_inputs; ++ u8 pair_route_default; ++ u8 ext_data; ++}; ++ ++struct saa716x_xbar_info { ++ struct saa716x_xbar_hdr xbar_hdr; ++ struct saa716x_xbar_pair_info *pair_info; ++ u8 *ext_data; ++}; ++ ++struct saa716x_tuner_hdr { ++ u8 size; ++ u8 ext_data; ++}; ++ ++struct saa716x_tuner_info { ++ struct saa716x_tuner_hdr tuner_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_pll_hdr { ++ u8 size; ++ u8 ext_data; ++}; ++ ++struct saa716x_pll_info { ++ struct saa716x_pll_hdr pll_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_channel_decoder_hdr { ++ u8 size; ++ u8 port; ++ u8 ext_data; ++}; ++ ++struct saa716x_channel_decoder_info { ++ struct saa716x_channel_decoder_hdr channel_dec_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_encoder_hdr { ++ u8 size; ++ u8 stream_port0; ++ u8 stream_port1; ++ u8 ext_data; ++}; ++ ++struct saa716x_encoder_info { ++ struct saa716x_encoder_hdr encoder_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_ir_hdr { ++ u8 size; ++ u8 ir_caps; ++ u8 ext_data; ++}; ++ ++struct saa716x_ir_info { ++ struct saa716x_ir_hdr ir_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_eeprom_hdr { ++ u8 size; ++ u8 rel_device; ++ u8 ext_data; ++}; ++ ++struct saa716x_eeprom_info { ++ struct saa716x_eeprom_hdr eeprom_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_filter_hdr { ++ u8 size; ++ u8 video_decoder; ++ u8 audio_decoder; ++ u8 event_source; ++ u8 ext_data; ++}; ++ ++struct saa716x_filter_info { ++ struct saa716x_filter_hdr filter_hdr; ++ u8 *ext_data; ++}; ++ ++struct saa716x_streamdev_hdr { ++ u8 size; ++ u8 ext_data; ++}; ++ ++struct saa716x_streamdev_info { ++ struct saa716x_streamdev_hdr streamdev_hdr; ++ u8 *ext_data; ++}; ++ ++extern int saa716x_dump_eeprom(struct saa716x_dev *saa716x); ++extern int saa716x_eeprom_data(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_ROM_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.c 2013-01-16 10:41:10.926798175 +0100 +@@ -0,0 +1,313 @@ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_spi_reg.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++#if 0 // not needed atm ++int saa716x_spi_irqevent(struct saa716x_dev *saa716x) ++{ ++ u32 stat, mask; ++ ++ BUG_ON(saa716x == NULL); ++ ++ stat = SAA716x_EPRD(SPI, SPI_STATUS); ++ mask = SAA716x_EPRD(SPI, SPI_CONTROL_REG) & SPI_SERIAL_INTER_ENABLE; ++ if ((!stat && !mask)) ++ return -1; ++ ++ dprintk(SAA716x_DEBUG, 0, "SPI event: Stat=<%02x>", stat); ++ ++ if (stat & SPI_TRANSFER_FLAG) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ if (stat & SPI_WRITE_COLLISSION) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ if (stat & SPI_READ_OVERRUN) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ if (stat & SPI_MODE_FAULT) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ if (stat & SPI_SLAVE_ABORT) ++ dprintk(SAA716x_DEBUG, 0, " "); ++ ++ return 0; ++} ++#endif ++ ++void saa716x_spi_write(struct saa716x_dev *saa716x, const u8 *data, int length) ++{ ++ int i; ++ u32 value; ++ int rounds; ++ ++ for (i = 0; i < length; i++) { ++ SAA716x_EPWR(SPI, SPI_DATA, data[i]); ++ rounds = 0; ++ value = SAA716x_EPRD(SPI, SPI_STATUS); ++ ++ while ((value & SPI_TRANSFER_FLAG) == 0 && rounds < 5000) { ++ value = SAA716x_EPRD(SPI, SPI_STATUS); ++ rounds++; ++ } ++ } ++} ++EXPORT_SYMBOL_GPL(saa716x_spi_write); ++ ++#if 0 // not needed atm ++static int saa716x_spi_status(struct saa716x_dev *saa716x, u32 *status) ++{ ++ u32 stat; ++ ++ stat = SAA716x_EPRD(SPI, SPI_STATUS); ++ ++ if (stat & SPI_TRANSFER_FLAG) ++ dprintk(SAA716x_DEBUG, 1, "Transfer complete <%02x>", stat); ++ ++ if (stat & SPI_WRITE_COLLISSION) ++ dprintk(SAA716x_DEBUG, 1, "Write collission <%02x>", stat); ++ ++ if (stat & SPI_READ_OVERRUN) ++ dprintk(SAA716x_DEBUG, 1, "Read Overrun <%02x>", stat); ++ ++ if (stat & SPI_MODE_FAULT) ++ dprintk(SAA716x_DEBUG, 1, "MODE fault <%02x>", stat); ++ ++ if (stat & SPI_SLAVE_ABORT) ++ dprintk(SAA716x_DEBUG, 1, "SLAVE abort <%02x>", stat); ++ ++ *status = stat; ++ ++ return 0; ++} ++ ++#define SPI_CYCLE_TIMEOUT 100 ++ ++static int saa716x_spi_xfer(struct saa716x_dev *saa716x, u32 *data) ++{ ++ u32 i, status = 0; ++ ++ /* write data and wait for completion */ ++ SAA716x_EPWR(SPI, SPI_DATA, data[i]); ++ for (i = 0; i < SPI_CYCLE_TIMEOUT; i++) { ++ msleep(10); ++ saa716x_spi_status(saa716x, &status); ++#if 0 ++ if (status & SPI_TRANSFER_FLAG) { ++ data = SAA716x_EPRD(SPI, SPI_DATA); ++ return 0; ++ } ++#endif ++ if (status & (SPI_WRITE_COLLISSION | ++ SPI_READ_OVERRUN | ++ SPI_MODE_FAULT | ++ SPI_SLAVE_ABORT)) ++ ++ return -EIO; ++ } ++ ++ return -EIO; ++} ++ ++#if 0 ++static int saa716x_spi_wr(struct saa716x_dev *saa716x, const u8 *data, int length) ++{ ++ struct saa716x_spi_config *config = saa716x->spi_config; ++ u32 gpio_mask; ++ int ret = 0; ++ ++ // protect against multiple access ++ spin_lock(&saa716x->gpio_lock); ++ ++ // configure the module ++ saa716x_spi_config(saa716x); ++ ++ // check input ++ ++ // change polarity of GPIO if active high ++ if (config->active_hi) { ++ select = 1; ++ release = 0; ++ } ++ ++ // configure GPIO, first set output register to low selected level ++ saa716x_gpio_write(saa716x, gpio, select); ++ ++ // set mode register to register controlled (0) ++ gpio_mask = (1 << gpio); ++ saa716x_set_gpio_mode(saa716x, gpio_mask, 0); ++ ++ // configure bit as output (0) ++ saa716x_gpio_ctl(saa716x, gpio_mask, 0); ++ ++ // wait at least 500ns before sending a byte ++ msleep(1); ++ ++ // send command ++ for (i = 0; i < dwCommandSize; i++) { ++ ucData = 0; ++// dwStatus = TransferData(pucCommand[i], &ucData); ++ ret = saa716x_spi_xfer(saa716x); ++ //tmDBGPRINTEx(4,("Info: Command 0x%x ", pucCommand[i] )); ++ ++ /* If command length > 1, disable CS at the end of each command. ++ * But after the last command byte CS must be left active! ++ */ ++ if ((dwCommandSize > 1) && (i < dwCommandSize - 1)) { ++ ++ saa716x_gpio_write(saa716x, gpio, release); ++ msleep(1); /* 500 nS minimum */ ++ saa716x_gpio_write(saa716x, gpio, select); ++ } ++ ++ if (ret != 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Command transfer failed"); ++ msleep(1); /* 500 nS minimum */ ++ saa716x_gpio_write(saa716x, gpio, release); /* release GPIO */ ++ spin_unlock(&saa716x->spi_lock); ++ return ret; ++ } ++ ++ if (config->LSB_first) ++ dwTransferByte++; ++ else ++ dwTransferByte--; ++ } ++ ++// assume that the byte order is the same as the bit order ++ ++// send read address ++ ++// send data ++ ++// wait at least 500ns before releasing slave ++ ++// release GPIO pin ++ ++ // release spinlock ++ spin_unlock(&saa716x->gpio_lock); ++} ++#endif ++ ++#define MODEBITS (SPI_CPOL | SPI_CPHA) ++ ++static int saa716x_spi_setup(struct spi_device *spi) ++{ ++ struct spi_master *master = spi->master; ++ struct saa716x_spi_state *saa716x_spi = spi_master_get_devdata(master); ++ struct saa716x_dev *saa716x = saa716x_spi->saa716x; ++ struct saa716x_spi_config *config = &saa716x->spi_config; ++ ++ u8 control = 0; ++ ++ if (spi->mode & ~MODEBITS) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Unsupported MODE bits <%x>", ++ spi->mode & ~MODEBITS); ++ ++ return -EINVAL; ++ } ++ ++ SAA716x_EPWR(SPI, SPI_CLOCK_COUNTER, config->clk_count); ++ ++ control |= SPI_MODE_SELECT; /* SPI Master */ ++ ++ if (config->LSB_first) ++ control |= SPI_LSB_FIRST_ENABLE; ++ ++ if (config->clk_pol) ++ control |= SPI_CLOCK_POLARITY; ++ ++ if (config->clk_pha) ++ control |= SPI_CLOCK_PHASE; ++ ++ SAA716x_EPWR(SPI, SPI_CONTROL_REG, control); ++ ++ return 0; ++} ++ ++static void saa716x_spi_cleanup(struct spi_device *spi) ++{ ++ ++} ++ ++static int saa716x_spi_transfer(struct spi_device *spi, struct spi_message *msg) ++{ ++ struct spi_master *master = spi->master; ++ struct saa716x_spi_state *saa716x_spi = spi_master_get_devdata(master); ++ struct saa716x_dev *saa716x = saa716x_spi->saa716x; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&saa716x->gpio_lock, flags); ++#if 0 ++ if (saa716x_spi->run == QUEUE_STOPPED) { ++ spin_unlock_irqrestore(&saa716x_spi->lock, flags); ++ return -ESHUTDOWN; ++ } ++ ++ msg->actual_length = 0; ++ msg->status = -EINPROGRESS; ++ msg->state = START_STATE; ++ ++ list_add_tail(&msg->queue, &saa716x_spi->queue); ++ ++ if (saa716x_spi->run == QUEUE_RUNNING && !saa716x_spi->busy) ++ queue_work(saa716x_spi->workqueue, &saa716x_spi->pump_messages); ++#endif ++ spin_unlock_irqrestore(&saa716x->gpio_lock, flags); ++ ++ return 0; ++} ++ ++int saa716x_spi_init(struct saa716x_dev *saa716x) ++{ ++ struct pci_dev *pdev = saa716x->pdev; ++ struct spi_master *master; ++ struct saa716x_spi_state *saa716x_spi; ++ int ret; ++ ++ dprintk(SAA716x_DEBUG, 1, "Initializing SAA%02x I2C Core", ++ saa716x->pdev->device); ++ ++ master = spi_alloc_master(&pdev->dev, sizeof (struct saa716x_spi_state)); ++ if (master == NULL) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: Cannot allocate SPI Master!"); ++ return -ENOMEM; ++ } ++ ++ saa716x_spi = spi_master_get_devdata(master); ++ saa716x_spi->master = master; ++ saa716x_spi->saa716x = saa716x; ++ saa716x->saa716x_spi = saa716x_spi; ++ ++ master->bus_num = pdev->bus->number; ++ master->num_chipselect = 1; /* TODO! use config */ ++ master->cleanup = saa716x_spi_cleanup; ++ master->setup = saa716x_spi_setup; ++ master->transfer = saa716x_spi_transfer; ++ ++ ret = spi_register_master(master); ++ if (ret != 0) { ++ dprintk(SAA716x_ERROR, 1, "ERROR: registering SPI Master!"); ++ goto err; ++ } ++err: ++ spi_master_put(master); ++ return ret; ++} ++EXPORT_SYMBOL(saa716x_spi_init); ++ ++void saa716x_spi_exit(struct saa716x_dev *saa716x) ++{ ++ struct saa716x_spi_state *saa716x_spi = saa716x->saa716x_spi; ++ ++ spi_unregister_master(saa716x_spi->master); ++ dprintk(SAA716x_DEBUG, 1, "SAA%02x SPI succesfully removed", saa716x->pdev->device); ++} ++EXPORT_SYMBOL(saa716x_spi_exit); ++#endif ++ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_spi.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi.h 2013-01-16 10:41:10.926798175 +0100 +@@ -0,0 +1,23 @@ ++#ifndef __SAA716x_SPI_H ++#define __SAA716x_SPI_H ++ ++struct saa716x_dev; ++ ++struct saa716x_spi_config { ++ u8 clk_count; ++ u8 clk_pol:1; ++ u8 clk_pha:1; ++ u8 LSB_first:1; ++}; ++ ++struct saa716x_spi_state { ++ struct spi_master *master; ++ struct saa716x_dev *saa716x; ++}; ++ ++extern void saa716x_spi_write(struct saa716x_dev *saa716x, const u8 *data, int length); ++ ++extern int saa716x_spi_init(struct saa716x_dev *saa716x); ++extern void saa716x_spi_exit(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_SPI_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_spi_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_spi_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_spi_reg.h 2013-01-16 10:41:10.926798175 +0100 +@@ -0,0 +1,27 @@ ++#ifndef __SAA716x_SPI_REG_H ++#define __SAA716x_SPI_REG_H ++ ++/* -------------- SPI Registers -------------- */ ++ ++#define SPI_CONTROL_REG 0x000 ++#define SPI_SERIAL_INTER_ENABLE (0x00000001 << 7) ++#define SPI_LSB_FIRST_ENABLE (0x00000001 << 6) ++#define SPI_MODE_SELECT (0x00000001 << 5) ++#define SPI_CLOCK_POLARITY (0x00000001 << 4) ++#define SPI_CLOCK_PHASE (0x00000001 << 3) ++ ++#define SPI_STATUS 0x004 ++#define SPI_TRANSFER_FLAG (0x00000001 << 7) ++#define SPI_WRITE_COLLISSION (0x00000001 << 6) ++#define SPI_READ_OVERRUN (0x00000001 << 5) ++#define SPI_MODE_FAULT (0x00000001 << 4) ++#define SPI_SLAVE_ABORT (0x00000001 << 3) ++ ++#define SPI_DATA 0x008 ++#define SPI_BIDI_DATA (0x000000ff << 0) ++ ++#define SPI_CLOCK_COUNTER 0x00c ++#define SPI_CLOCK (0x00000001 << 0) ++ ++ ++#endif /* __SAA716x_SPI_REG_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.c linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.c +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.c 2013-01-16 10:41:10.926798175 +0100 +@@ -0,0 +1,23 @@ ++#include ++ ++#include "saa716x_mod.h" ++ ++#include "saa716x_vip_reg.h" ++#include "saa716x_spi.h" ++#include "saa716x_priv.h" ++ ++void saa716x_vipint_disable(struct saa716x_dev *saa716x) ++{ ++ SAA716x_EPWR(VI0, INT_ENABLE, 0); /* disable VI 0 IRQ */ ++ SAA716x_EPWR(VI1, INT_ENABLE, 0); /* disable VI 1 IRQ */ ++ SAA716x_EPWR(VI0, INT_CLR_STATUS, 0x3ff); /* clear IRQ */ ++ SAA716x_EPWR(VI1, INT_CLR_STATUS, 0x3ff); /* clear IRQ */ ++} ++EXPORT_SYMBOL_GPL(saa716x_vipint_disable); ++ ++void saa716x_vip_disable(struct saa716x_dev *saa716x) ++{ ++ SAA716x_EPWR(VI0, VIP_POWER_DOWN, VI_PWR_DWN); ++ SAA716x_EPWR(VI1, VIP_POWER_DOWN, VI_PWR_DWN); ++} ++EXPORT_SYMBOL_GPL(saa716x_vip_disable); +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_vip.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip.h 2013-01-16 10:41:10.927798168 +0100 +@@ -0,0 +1,9 @@ ++#ifndef __SAA716x_VIP_H ++#define __SAA716x_VIP_H ++ ++struct saa716x_dev; ++ ++extern void saa716x_vipint_disable(struct saa716x_dev *saa716x); ++extern void saa716x_vip_disable(struct saa716x_dev *saa716x); ++ ++#endif /* __SAA716x_VIP_H */ +diff -Naur linux-3.7.2/drivers/media/common/saa716x/saa716x_vip_reg.h linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip_reg.h +--- linux-3.7.2/drivers/media/common/saa716x/saa716x_vip_reg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/common/saa716x/saa716x_vip_reg.h 2013-01-16 10:41:10.927798168 +0100 +@@ -0,0 +1,127 @@ ++#ifndef __SAA716x_VIP_REG_H ++#define __SAA716x_VIP_REG_H ++ ++/* -------------- VIP Registers -------------- */ ++ ++#define VI_MODE 0x000 ++#define VID_CFEN (0x00000003 << 30) ++#define VID_OSM (0x00000001 << 29) ++#define VID_FSEQ (0x00000001 << 28) ++#define AUX_CFEN (0x00000003 << 26) ++#define AUX_OSM (0x00000001 << 25) ++#define AUX_FSEQ (0x00000001 << 24) ++#define AUX_ANC_DATA (0x00000003 << 22) ++#define AUX_ANC_RAW (0x00000001 << 21) ++#define RST_ON_ERR (0x00000001 << 17) ++#define SOFT_RESET (0x00000001 << 16) ++#define IFF_CLAMP (0x00000001 << 14) ++#define IFF_MODE (0x00000003 << 12) ++#define DFF_CLAMP (0x00000001 << 10) ++#define DFF_MODE (0x00000003 << 8) ++#define HSP_CLAMP (0x00000001 << 3) ++#define HSP_RGB (0x00000001 << 2) ++#define HSP_MODE (0x00000003 << 0) ++ ++#define RCRB_CTRL 0x004 ++#define RCRB_CFG_ADDR 0x008 ++#define RCRB_CFG_EXT_ADDR 0x00c ++#define RCRB_IO_ADDR 0x010 ++#define RCRB_MEM_LADDR 0x014 ++#define RCRB_MEM_UADDR 0x018 ++#define RCRB_DATA 0x01c ++#define RCRB_MASK 0x020 ++#define RCRB_MSG_HDR 0x040 ++#define RCRB_MSG_PL0 0x044 ++#define RCRB_MSG_PL1 0x048 ++ ++#define ID_MASK0 0x020 ++#define VI_ID_MASK_0 (0x000000ff << 8) ++#define VI_DATA_ID_0 (0x000000ff << 0) ++ ++#define ID_MASK1 0x024 ++#define VI_ID_MASK_1 (0x000000ff << 8) ++#define VI_DATA_ID_1 (0x000000ff << 0) ++ ++#define VIP_LINE_THRESH 0x040 ++#define VI_LCTHR (0x000007ff << 0) ++ ++#define VIN_FORMAT 0x100 ++#define VI_VSRA (0x00000003 << 30) ++#define VI_SYNCHD (0x00000001 << 25) ++#define VI_DUAL_STREAM (0x00000001 << 24) ++#define VI_NHDAUX (0x00000001 << 20) ++#define VI_NPAR (0x00000001 << 19) ++#define VI_VSEL (0x00000003 << 14) ++#define VI_TWOS (0x00000001 << 13) ++#define VI_TPG (0x00000001 << 12) ++#define VI_FREF (0x00000001 << 10) ++#define VI_FTGL (0x00000001 << 9) ++#define VI_SF (0x00000001 << 3) ++#define VI_FZERO (0x00000001 << 2) ++#define VI_REVS (0x00000001 << 1) ++#define VI_REHS (0x00000001 << 0) ++ ++#define TC76543210 0x800 ++#define TCFEDCBA98 0x804 ++#define PHYCFG 0x900 ++#define CONFIG 0xfd4 ++#define INT_ENABLE_CLR 0xfd8 ++#define INT_ENABLE_SET 0xfdc ++ ++ ++#define INT_STATUS 0xfe0 ++#define VI_STAT_FID_AUX (0x00000001 << 31) ++#define VI_STAT_FID_VID (0x00000001 << 30) ++#define VI_STAT_FID_VPI (0x00000001 << 29) ++#define VI_STAT_LINE_COUNT (0x00000fff << 16) ++#define VI_STAT_AUX_OVRFLW (0x00000001 << 9) ++#define VI_STAT_VID_OVRFLW (0x00000001 << 8) ++#define VI_STAT_WIN_SEQBRK (0x00000001 << 7) ++#define VI_STAT_FID_SEQBRK (0x00000001 << 6) ++#define VI_STAT_LINE_THRESH (0x00000001 << 5) ++#define VI_STAT_AUX_WRAP (0x00000001 << 4) ++#define VI_STAT_AUX_START_IN (0x00000001 << 3) ++#define VI_STAT_AUX_END_OUT (0x00000001 << 2) ++#define VI_STAT_VID_START_IN (0x00000001 << 1) ++#define VI_STAT_VID_END_OUT (0x00000001 << 0) ++ ++#define INT_ENABLE 0xfe4 ++#define VI_ENABLE_AUX_OVRFLW (0x00000001 << 9) ++#define VI_ENABLE_VID_OVRFLW (0x00000001 << 8) ++#define VI_ENABLE_WIN_SEQBRK (0x00000001 << 7) ++#define VI_ENABLE_FID_SEQBRK (0x00000001 << 6) ++#define VI_ENABLE_LINE_THRESH (0x00000001 << 5) ++#define VI_ENABLE_AUX_WRAP (0x00000001 << 4) ++#define VI_ENABLE_AUX_START_IN (0x00000001 << 3) ++#define VI_ENABLE_AUX_END_OUT (0x00000001 << 2) ++#define VI_ENABLE_VID_START_IN (0x00000001 << 1) ++#define VI_ENABLE_VID_END_OUT (0x00000001 << 0) ++ ++#define INT_CLR_STATUS 0xfe8 ++#define VI_CLR_STATUS_AUX_OVRFLW (0x00000001 << 9) ++#define VI_CLR_STATUS_VID_OVRFLW (0x00000001 << 8) ++#define VI_CLR_STATUS_WIN_SEQBRK (0x00000001 << 7) ++#define VI_CLR_STATUS_FID_SEQBRK (0x00000001 << 6) ++#define VI_CLR_STATUS_LINE_THRESH (0x00000001 << 5) ++#define VI_CLR_STATUS_AUX_WRAP (0x00000001 << 4) ++#define VI_CLR_STATUS_AUX_START_IN (0x00000001 << 3) ++#define VI_CLR_STATUS_AUX_END_OUT (0x00000001 << 2) ++#define VI_CLR_STATUS_VID_START_IN (0x00000001 << 1) ++#define VI_CLR_STATUS_VID_END_OUT (0x00000001 << 0) ++ ++#define INT_SET_STATUS 0xfec ++#define VI_SET_STATUS_AUX_OVRFLW (0x00000001 << 9) ++#define VI_SET_STATUS_VID_OVRFLW (0x00000001 << 8) ++#define VI_SET_STATUS_WIN_SEQBRK (0x00000001 << 7) ++#define VI_SET_STATUS_FID_SEQBRK (0x00000001 << 6) ++#define VI_SET_STATUS_LINE_THRESH (0x00000001 << 5) ++#define VI_SET_STATUS_AUX_WRAP (0x00000001 << 4) ++#define VI_SET_STATUS_AUX_START_IN (0x00000001 << 3) ++#define VI_SET_STATUS_AUX_END_OUT (0x00000001 << 2) ++#define VI_SET_STATUS_VID_START_IN (0x00000001 << 1) ++#define VI_SET_STATUS_VID_END_OUT (0x00000001 << 0) ++ ++#define VIP_POWER_DOWN 0xff4 ++#define VI_PWR_DWN (0x00000001 << 31) ++ ++#endif /* __SAA716x_VIP_REG_H */ +diff -Naur linux-3.7.2/drivers/media/dvb-frontends/ds3103.h linux-3.7.2.patch/drivers/media/dvb-frontends/ds3103.h +--- linux-3.7.2/drivers/media/dvb-frontends/ds3103.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/dvb-frontends/ds3103.h 2013-01-16 10:41:10.927798168 +0100 +@@ -0,0 +1,47 @@ ++/* ++ Montage Technology DS3103 - DVBS/S2 Demodulator driver ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++*/ ++ ++#ifndef DS3103_H ++#define DS3103_H ++ ++#include ++ ++struct ds3103_config { ++ /* the demodulator's i2c address */ ++ u8 demod_address; ++ u8 ci_mode; ++ /* Set device param to start dma */ ++ int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured); ++ /* Hook for Lock LED */ ++ void (*set_lock_led)(struct dvb_frontend *fe, int offon); ++}; ++ ++#if defined(CONFIG_DVB_DS3103) || \ ++ (defined(CONFIG_DVB_DS3103_MODULE) && defined(MODULE)) ++extern struct dvb_frontend *ds3103_attach(const struct ds3103_config *config, ++ struct i2c_adapter *i2c); ++#else ++static inline ++struct dvb_frontend *ds3103_attach(const struct ds3103_config *config, ++ struct i2c_adapter *i2c) ++{ ++ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); ++ return NULL; ++} ++#endif /* CONFIG_DVB_DS3103 */ ++#endif /* DS3103_H */ +diff -Naur linux-3.7.2/drivers/media/dvb-frontends/ts2022.h linux-3.7.2.patch/drivers/media/dvb-frontends/ts2022.h +--- linux-3.7.2/drivers/media/dvb-frontends/ts2022.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-3.7.2.patch/drivers/media/dvb-frontends/ts2022.h 2013-01-16 10:41:10.927798168 +0100 +@@ -0,0 +1,51 @@ ++ /* ++ Driver for Montage TS2022 DVBS/S2 Silicon tuner ++ ++ Copyright (C) 2012 Tomazzo Muzumici ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ ++ */ ++ ++#ifndef __DVB_TS2022_H__ ++#define __DVB_TS2022_H__ ++ ++#include ++#include "dvb_frontend.h" ++ ++/** ++ * Attach a ts2022 tuner to the supplied frontend structure. ++ * ++ * @param fe Frontend to attach to. ++ * @param addr i2c address of the tuner. ++ * @param i2c i2c adapter to use. ++ * @return FE pointer on success, NULL on failure. ++ */ ++#if defined(CONFIG_DVB_TS2022) || (defined(CONFIG_DVB_TS2022_MODULE) \ ++ && defined(MODULE)) ++extern struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe, int addr, ++ struct i2c_adapter *i2c); ++#else ++static inline struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe, ++ int addr, ++ struct i2c_adapter *i2c) ++{ ++ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); ++ return NULL; ++} ++#endif /* CONFIG_DVB_TS2022 */ ++ ++#endif /* __DVB_TS2022_H__ */ +diff -Naur linux-3.7.2/include/uapi/linux/dvb/osd.h linux-3.7.2.patch/include/uapi/linux/dvb/osd.h +--- linux-3.7.2/include/uapi/linux/dvb/osd.h 2013-01-11 18:19:28.000000000 +0100 ++++ linux-3.7.2.patch/include/uapi/linux/dvb/osd.h 2013-01-16 10:41:21.992712972 +0100 +@@ -141,4 +141,20 @@ + #define OSD_SEND_CMD _IOW('o', 160, osd_cmd_t) + #define OSD_GET_CAPABILITY _IOR('o', 161, osd_cap_t) + ++typedef struct osd_raw_cmd_s { ++ const void __user *cmd_data; ++ int cmd_len; ++ void __user *result_data; ++ int result_len; ++} osd_raw_cmd_t; ++ ++typedef struct osd_raw_data_s { ++ const void __user *data_buffer; ++ int data_length; ++ int data_handle; ++} osd_raw_data_t; ++ ++#define OSD_RAW_CMD _IOWR('o', 162, osd_raw_cmd_t) ++#define OSD_RAW_DATA _IOWR('o', 163, osd_raw_data_t) ++ + #endif From 00cbc1be25bcece72a69e0b48fd16b08660c050c Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Sun, 31 Mar 2013 21:18:19 +0300 Subject: [PATCH 101/104] projects/*/linux/linux.*.conf: sync kernel config (saa716x) --- projects/ARCTIC_MC/linux/linux.x86_64.conf | 4 ++++ projects/ATV/linux/linux.i386.conf | 1 + projects/Fusion/linux/linux.i386.conf | 4 ++++ projects/Fusion/linux/linux.x86_64.conf | 4 ++++ projects/Generic/linux/linux.i386.conf | 4 ++++ projects/Generic_OSS/linux/linux.i386.conf | 4 ++++ projects/ION/linux/linux.i386.conf | 4 ++++ projects/ION/linux/linux.x86_64.conf | 4 ++++ projects/Intel/linux/linux.i386.conf | 4 ++++ projects/Intel/linux/linux.x86_64.conf | 4 ++++ projects/Ultra/linux/linux.x86_64.conf | 1 + projects/Virtual/linux/linux.i386.conf | 4 ++++ projects/Virtual/linux/linux.x86_64.conf | 4 ++++ 13 files changed, 46 insertions(+) diff --git a/projects/ARCTIC_MC/linux/linux.x86_64.conf b/projects/ARCTIC_MC/linux/linux.x86_64.conf index 9cb8b1be2c..a58406de1c 100644 --- a/projects/ARCTIC_MC/linux/linux.x86_64.conf +++ b/projects/ARCTIC_MC/linux/linux.x86_64.conf @@ -1976,6 +1976,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # common driver options # CONFIG_DVB_B2C2_FLEXCOP=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/ATV/linux/linux.i386.conf b/projects/ATV/linux/linux.i386.conf index d6ebdbd107..0812c67ef0 100644 --- a/projects/ATV/linux/linux.i386.conf +++ b/projects/ATV/linux/linux.i386.conf @@ -1888,6 +1888,7 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # common driver options # CONFIG_DVB_B2C2_FLEXCOP=m +# CONFIG_SAA716X_SUPPORT is not set CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Fusion/linux/linux.i386.conf b/projects/Fusion/linux/linux.i386.conf index ee30507240..e6c29b96ba 100644 --- a/projects/Fusion/linux/linux.i386.conf +++ b/projects/Fusion/linux/linux.i386.conf @@ -2164,6 +2164,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Fusion/linux/linux.x86_64.conf b/projects/Fusion/linux/linux.x86_64.conf index 58c8c2e574..4745d324cd 100644 --- a/projects/Fusion/linux/linux.x86_64.conf +++ b/projects/Fusion/linux/linux.x86_64.conf @@ -2120,6 +2120,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Generic/linux/linux.i386.conf b/projects/Generic/linux/linux.i386.conf index c983adc2bb..977c95f0bf 100644 --- a/projects/Generic/linux/linux.i386.conf +++ b/projects/Generic/linux/linux.i386.conf @@ -2249,6 +2249,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Generic_OSS/linux/linux.i386.conf b/projects/Generic_OSS/linux/linux.i386.conf index 81ef220d2f..eaf1bc9cc0 100644 --- a/projects/Generic_OSS/linux/linux.i386.conf +++ b/projects/Generic_OSS/linux/linux.i386.conf @@ -2247,6 +2247,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/ION/linux/linux.i386.conf b/projects/ION/linux/linux.i386.conf index b90ba84a41..26751cfae4 100644 --- a/projects/ION/linux/linux.i386.conf +++ b/projects/ION/linux/linux.i386.conf @@ -2167,6 +2167,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/ION/linux/linux.x86_64.conf b/projects/ION/linux/linux.x86_64.conf index 64ce8f23b7..8050d5afee 100644 --- a/projects/ION/linux/linux.x86_64.conf +++ b/projects/ION/linux/linux.x86_64.conf @@ -2106,6 +2106,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Intel/linux/linux.i386.conf b/projects/Intel/linux/linux.i386.conf index dae7391269..88e3af56e9 100644 --- a/projects/Intel/linux/linux.i386.conf +++ b/projects/Intel/linux/linux.i386.conf @@ -2193,6 +2193,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Intel/linux/linux.x86_64.conf b/projects/Intel/linux/linux.x86_64.conf index becd7626e2..6accc0fc3d 100644 --- a/projects/Intel/linux/linux.x86_64.conf +++ b/projects/Intel/linux/linux.x86_64.conf @@ -2133,6 +2133,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Ultra/linux/linux.x86_64.conf b/projects/Ultra/linux/linux.x86_64.conf index 1a8a4c0ffb..c6e489a6fc 100644 --- a/projects/Ultra/linux/linux.x86_64.conf +++ b/projects/Ultra/linux/linux.x86_64.conf @@ -1961,6 +1961,7 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # common driver options # CONFIG_DVB_B2C2_FLEXCOP=m +# CONFIG_SAA716X_SUPPORT is not set CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Virtual/linux/linux.i386.conf b/projects/Virtual/linux/linux.i386.conf index 6d7f3af80a..6118e28b16 100644 --- a/projects/Virtual/linux/linux.i386.conf +++ b/projects/Virtual/linux/linux.i386.conf @@ -2195,6 +2195,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y diff --git a/projects/Virtual/linux/linux.x86_64.conf b/projects/Virtual/linux/linux.x86_64.conf index 3b3122e54e..fc586bb147 100644 --- a/projects/Virtual/linux/linux.x86_64.conf +++ b/projects/Virtual/linux/linux.x86_64.conf @@ -2134,6 +2134,10 @@ CONFIG_MEDIA_COMMON_OPTIONS=y CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m +CONFIG_SAA716X_SUPPORT=y +CONFIG_SAA716X_CORE=m +CONFIG_DVB_SAA716X_BUDGET=m +CONFIG_DVB_SAA716X_HYBRID=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y From b7673eb756d7de1b7d2f7191be4e5884b5265a93 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Mon, 1 Apr 2013 12:27:35 +0300 Subject: [PATCH 102/104] package: add package 'hd-idle' --- packages/sysutils/hd-idle/build | 27 +++++++++++++++++++++++ packages/sysutils/hd-idle/install | 27 +++++++++++++++++++++++ packages/sysutils/hd-idle/meta | 36 +++++++++++++++++++++++++++++++ packages/sysutils/hd-idle/rename | 25 +++++++++++++++++++++ 4 files changed, 115 insertions(+) create mode 100755 packages/sysutils/hd-idle/build create mode 100755 packages/sysutils/hd-idle/install create mode 100644 packages/sysutils/hd-idle/meta create mode 100755 packages/sysutils/hd-idle/rename diff --git a/packages/sysutils/hd-idle/build b/packages/sysutils/hd-idle/build new file mode 100755 index 0000000000..20eee195e2 --- /dev/null +++ b/packages/sysutils/hd-idle/build @@ -0,0 +1,27 @@ +#!/bin/sh + +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2011 Stephan Raue (stephan@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ + +. config/options $1 + +cd $PKG_BUILD + +make diff --git a/packages/sysutils/hd-idle/install b/packages/sysutils/hd-idle/install new file mode 100755 index 0000000000..c654c7aef6 --- /dev/null +++ b/packages/sysutils/hd-idle/install @@ -0,0 +1,27 @@ +#!/bin/sh + +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2011 Stephan Raue (stephan@openelec.tv) +# Copyright (C) 2011-2011 Gregor Fuis (gujs@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty ofMLTV_LOCATION +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ + +. config/options $1 + +mkdir -p $INSTALL/usr/bin + cp -P $PKG_BUILD/hd-idle $INSTALL/usr/bin diff --git a/packages/sysutils/hd-idle/meta b/packages/sysutils/hd-idle/meta new file mode 100644 index 0000000000..00e8bed006 --- /dev/null +++ b/packages/sysutils/hd-idle/meta @@ -0,0 +1,36 @@ +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2011 Stephan Raue (stephan@openelec.tv) +# Copyright (C) 2011-2011 Gregor Fuis (gujs@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. +# http://www.gnu.org/copyleft/gpl.htmlLooking for the latest version? +################################################################################ + +PKG_NAME="hd-idle" +PKG_VERSION="1.04" +PKG_REV="1" +PKG_ARCH="any" +PKG_LICENSE="GPL" +PKG_SITE="http://hd-idle.sourceforge.net/" +PKG_URL="http://downloads.sourceforge.net/project/hd-idle/${PKG_NAME}-${PKG_VERSION}.tgz" +PKG_DEPENDS="" +PKG_BUILD_DEPENDS="toolchain" +PKG_PRIORITY="optional" +PKG_SECTION="system" +PKG_SHORTDESC="hd-idle is a [Linux] utility program for spinning-down external disks after a period of idle time." +PKG_LONGDESC="hd-idle is a utility program for spinning-down external disks after a period of idle time. Since most external IDE disk enclosures don't support setting the IDE idle timer, a program like hd-idle is required to spin down idle disks automatically." +PKG_IS_ADDON="no" +PKG_AUTORECONF="no" diff --git a/packages/sysutils/hd-idle/rename b/packages/sysutils/hd-idle/rename new file mode 100755 index 0000000000..57a9901168 --- /dev/null +++ b/packages/sysutils/hd-idle/rename @@ -0,0 +1,25 @@ +#!/bin/sh + +################################################################################ +# This file is part of OpenELEC - http://www.openelec.tv +# Copyright (C) 2009-2012 Stephan Raue (stephan@openelec.tv) +# +# This Program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This Program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with OpenELEC.tv; see the file COPYING. If not, write to +# the Free Software Foundation, 51 Franklin Street, Suite 500, Boston, MA 02110, USA. +# http://www.gnu.org/copyleft/gpl.html +################################################################################ + +. config/options $1 + +mv $BUILD/$PKG_NAME $BUILD/$PKG_NAME-$PKG_VERSION From 865355aa163626afe8de95cc17173cad1540f9a1 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Mon, 1 Apr 2013 12:28:04 +0300 Subject: [PATCH 103/104] xbmc-addon-settings: depend on hd-idle --- packages/mediacenter/xbmc-addon-settings/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/xbmc-addon-settings/meta index 07c4957c84..906a19306c 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/xbmc-addon-settings/meta @@ -25,7 +25,7 @@ PKG_ARCH="any" PKG_LICENSE="prop." PKG_SITE="http://www.openelec.tv" PKG_URL="http://www.fiebach.de/xbmc/addons/service.openelec.settings/service.openelec.settings-$PKG_VERSION.zip" -PKG_DEPENDS="connman" +PKG_DEPENDS="connman hd-idle" PKG_BUILD_DEPENDS="toolchain python" PKG_PRIORITY="optional" PKG_SECTION="mediacenter" From 8b0c53e5da3cb09af53071198fe9603db48616e0 Mon Sep 17 00:00:00 2001 From: Stefan Saraev Date: Mon, 1 Apr 2013 16:53:10 +0300 Subject: [PATCH 104/104] xbmc-addon-settings: rename to 'service.openelec.settings', update to 0.1.7 --- .../build | 10 ++++------ .../init.d/00_reset | 0 .../install | 4 ++-- .../meta | 10 +++++----- .../unpack | 0 packages/mediacenter/xbmc/meta | 2 +- 6 files changed, 12 insertions(+), 14 deletions(-) rename packages/mediacenter/{xbmc-addon-settings => service.openelec.settings}/build (84%) rename packages/mediacenter/{xbmc-addon-settings => service.openelec.settings}/init.d/00_reset (100%) rename packages/mediacenter/{xbmc-addon-settings => service.openelec.settings}/install (87%) rename packages/mediacenter/{xbmc-addon-settings => service.openelec.settings}/meta (81%) rename packages/mediacenter/{xbmc-addon-settings => service.openelec.settings}/unpack (100%) diff --git a/packages/mediacenter/xbmc-addon-settings/build b/packages/mediacenter/service.openelec.settings/build similarity index 84% rename from packages/mediacenter/xbmc-addon-settings/build rename to packages/mediacenter/service.openelec.settings/build index 6c76578d6d..73831c3b0e 100755 --- a/packages/mediacenter/xbmc-addon-settings/build +++ b/packages/mediacenter/service.openelec.settings/build @@ -23,10 +23,8 @@ . config/options $1 cd $PKG_BUILD - rm -rf `find . -name "*.pyo"` + python -Wi -t -B $ROOT/$TOOLCHAIN/lib/python2.7/compileall.py ./resources/lib/ -f + rm -rf `find ./resources/lib/ -name "*.py"` - python -Wi -t -B $ROOT/$TOOLCHAIN/lib/python2.7/compileall.py ./service.openelec.settings/resources/lib/ -f - rm -rf `find ./service.openelec.settings/resources/lib/ -name "*.py"` - - python -Wi -t -B $ROOT/$TOOLCHAIN/lib/python2.7/compileall.py ./service.openelec.settings/oe.py -f - rm -rf ./service.openelec.settings/oe.py + python -Wi -t -B $ROOT/$TOOLCHAIN/lib/python2.7/compileall.py ./oe.py -f + rm -rf ./oe.py diff --git a/packages/mediacenter/xbmc-addon-settings/init.d/00_reset b/packages/mediacenter/service.openelec.settings/init.d/00_reset similarity index 100% rename from packages/mediacenter/xbmc-addon-settings/init.d/00_reset rename to packages/mediacenter/service.openelec.settings/init.d/00_reset diff --git a/packages/mediacenter/xbmc-addon-settings/install b/packages/mediacenter/service.openelec.settings/install similarity index 87% rename from packages/mediacenter/xbmc-addon-settings/install rename to packages/mediacenter/service.openelec.settings/install index 2f078388e4..466342dd86 100755 --- a/packages/mediacenter/xbmc-addon-settings/install +++ b/packages/mediacenter/service.openelec.settings/install @@ -22,5 +22,5 @@ . config/options $1 -mkdir -p $INSTALL/usr/share/xbmc/addons/xbmc-addon-settings - cp -R $PKG_BUILD/service.openelec.settings/* $INSTALL/usr/share/xbmc/addons/xbmc-addon-settings +mkdir -p $INSTALL/usr/share/xbmc/addons/service.openelec.settings + cp -R $PKG_BUILD/* $INSTALL/usr/share/xbmc/addons/service.openelec.settings diff --git a/packages/mediacenter/xbmc-addon-settings/meta b/packages/mediacenter/service.openelec.settings/meta similarity index 81% rename from packages/mediacenter/xbmc-addon-settings/meta rename to packages/mediacenter/service.openelec.settings/meta index 906a19306c..ae4b454475 100644 --- a/packages/mediacenter/xbmc-addon-settings/meta +++ b/packages/mediacenter/service.openelec.settings/meta @@ -18,19 +18,19 @@ # http://www.gnu.org/copyleft/gpl.html ################################################################################ -PKG_NAME="xbmc-addon-settings" -PKG_VERSION="0.1.6" +PKG_NAME="service.openelec.settings" +PKG_VERSION="0.1.7" PKG_REV="1" PKG_ARCH="any" PKG_LICENSE="prop." PKG_SITE="http://www.openelec.tv" -PKG_URL="http://www.fiebach.de/xbmc/addons/service.openelec.settings/service.openelec.settings-$PKG_VERSION.zip" +PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.zip" PKG_DEPENDS="connman hd-idle" PKG_BUILD_DEPENDS="toolchain python" PKG_PRIORITY="optional" PKG_SECTION="mediacenter" -PKG_SHORTDESC="xbmc-addon-settings: Settings dialog for OpenELEC" -PKG_LONGDESC="xbmc-addon-settings: is a settings dialog for OpenELEC" +PKG_SHORTDESC="service.openelec.settings: Settings dialog for OpenELEC" +PKG_LONGDESC="service.openelec.settings: is a settings dialog for OpenELEC" PKG_IS_ADDON="no" PKG_AUTORECONF="no" diff --git a/packages/mediacenter/xbmc-addon-settings/unpack b/packages/mediacenter/service.openelec.settings/unpack similarity index 100% rename from packages/mediacenter/xbmc-addon-settings/unpack rename to packages/mediacenter/service.openelec.settings/unpack diff --git a/packages/mediacenter/xbmc/meta b/packages/mediacenter/xbmc/meta index 2da82caac6..6417432f69 100644 --- a/packages/mediacenter/xbmc/meta +++ b/packages/mediacenter/xbmc/meta @@ -25,7 +25,7 @@ PKG_ARCH="any" PKG_LICENSE="GPL" PKG_SITE="http://www.xbmc.org" PKG_URL="$DISTRO_SRC/$PKG_NAME-$PKG_VERSION.tar.xz" -PKG_DEPENDS="boost Python zlib bzip2 systemd pcre ffmpeg libass curl libssh rtmpdump fontconfig tinyxml freetype libmad libogg libmodplug faad2 flac libmpeg2 taglib yajl sqlite xbmc-addon-settings" +PKG_DEPENDS="boost Python zlib bzip2 systemd pcre ffmpeg libass curl libssh rtmpdump fontconfig tinyxml freetype libmad libogg libmodplug faad2 flac libmpeg2 taglib yajl sqlite service.openelec.settings" PKG_BUILD_DEPENDS="toolchain boost Python zlib bzip2 systemd lzo pcre swig ffmpeg libass enca curl libssh rtmpdump fontconfig fribidi tinyxml libjpeg-turbo libpng tiff freetype jasper libmad libsamplerate libogg libcdio libmodplug faad2 flac libmpeg2 taglib yajl sqlite" PKG_PRIORITY="optional" PKG_SECTION="mediacenter"