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u-boot: add Amlogic 2021.04-rc2 option for testing
This commit is contained in:
Christian Hewitt
parent
ef80de4fa2
commit
aa335d515d
@ -22,6 +22,12 @@ PKG_NEED_UNPACK="${PROJECT_DIR}/${PROJECT}/bootloader"
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[ -n "${DEVICE}" ] && PKG_NEED_UNPACK+=" ${PROJECT_DIR}/${PROJECT}/devices/${DEVICE}/bootloader"
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case "${PROJECT}" in
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Amlogic)
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PKG_VERSION="807482107a6d426dbcd6457d9ccf8b3ce6ca887b" # 2021.04-rc2 custodians/u-boot-amlogic-test
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PKG_SHA256="a10430d2c1a1d9e83e66bed342433ddfe4f3d6f16d9fa8b4d4c034b600baffd3"
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PKG_URL="https://github.com/chewitt/u-boot/archive/${PKG_VERSION}.tar.gz"
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PKG_PATCH_DIRS="amlogic"
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;;
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Rockchip)
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PKG_VERSION="8659d08d2b589693d121c1298484e861b7dafc4f"
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PKG_SHA256="3f9f2bbd0c28be6d7d6eb909823fee5728da023aca0ce37aef3c8f67d1179ec1"
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@ -1,7 +1,7 @@
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From 9f81b716f4f1f92c7d7e717736763c885ca592f3 Mon Sep 17 00:00:00 2001
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From 91f485c24fb55a7e0fcaa627fe71bb2ebd9033d5 Mon Sep 17 00:00:00 2001
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From: Christian Hewitt <christianshewitt@gmail.com>
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Date: Fri, 13 Nov 2020 02:09:36 +0000
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Subject: [PATCH 01/21] HACK: configs: meson64: prevent stdout/stderr on
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Subject: [PATCH 01/10] HACK: configs: meson64: prevent stdout/stderr on
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videoconsole
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Several devices have CONFIG_DM_VIDEO enabled which causes stdout/stderr
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@ -1,25 +0,0 @@
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From f9af8e2b20d319dc49f0732d0619dd622f2bf02d Mon Sep 17 00:00:00 2001
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From: chewitt <christianshewitt@gmail.com>
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Date: Fri, 24 Apr 2020 15:15:04 +0000
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Subject: [PATCH 02/21] HACK: mmc: meson-gx: limit to 24MHz
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---
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drivers/mmc/meson_gx_mmc.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
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index a5e9ac5637..4d90343271 100644
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--- a/drivers/mmc/meson_gx_mmc.c
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+++ b/drivers/mmc/meson_gx_mmc.c
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@@ -283,7 +283,7 @@ static int meson_mmc_probe(struct udevice *dev)
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cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |
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MMC_MODE_HS_52MHz | MMC_MODE_HS;
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cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
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- cfg->f_max = 100000000; /* 100 MHz */
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+ cfg->f_max = SD_EMMC_CLKSRC_24M;
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cfg->b_max = 511; /* max 512 - 1 blocks */
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cfg->name = dev->name;
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--
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2.17.1
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File diff suppressed because it is too large
Load Diff
@ -1,92 +0,0 @@
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From 239659a0a90ca7763970c3764726a606755e1ae9 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Wed, 30 Sep 2020 11:52:49 +0200
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Subject: [PATCH 04/21] FROMGIT: power: domain: meson-ee-pwrc: add support for
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the Meson GX SoCs
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This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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drivers/power/domain/meson-ee-pwrc.c | 26 ++++++++++++++++++++++++--
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1 file changed, 24 insertions(+), 2 deletions(-)
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diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c
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index 8349a9c158..dfedddd950 100644
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--- a/drivers/power/domain/meson-ee-pwrc.c
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+++ b/drivers/power/domain/meson-ee-pwrc.c
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@@ -14,6 +14,7 @@
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#include <reset.h>
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#include <clk.h>
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#include <dt-bindings/power/meson-g12a-power.h>
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+#include <dt-bindings/power/meson-gxbb-power.h>
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#include <dt-bindings/power/meson-sm1-power.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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@@ -68,7 +69,7 @@ struct meson_ee_pwrc_domain_data {
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/* TOP Power Domains */
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-static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = {
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+static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = {
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.sleep_reg = AO_RTI_GEN_PWR_SLEEP0,
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.sleep_mask = BIT(8),
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.iso_reg = AO_RTI_GEN_PWR_SLEEP0,
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@@ -126,6 +127,12 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = {
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VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
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};
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+static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = {
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+ VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
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+ VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
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+ VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
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+};
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+
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static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_eth[] = {
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{ HHI_MEM_PD_REG0, GENMASK(3, 2) },
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};
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@@ -201,11 +208,17 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {
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static bool pwrc_ee_get_power(struct power_domain *power_domain);
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static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
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- [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu,
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+ [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,
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pwrc_ee_get_power, 11, 2),
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[PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
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};
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+static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
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+ [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu,
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+ pwrc_ee_get_power, 12, 2),
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+ [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
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+};
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+
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static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = {
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[PWRC_SM1_VPU_ID] = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu,
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pwrc_ee_get_power, 11, 2),
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@@ -369,6 +382,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = {
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.domains = g12a_pwrc_domains,
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};
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+static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = {
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+ .count = ARRAY_SIZE(gxbb_pwrc_domains),
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+ .domains = gxbb_pwrc_domains,
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+};
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+
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static struct meson_ee_pwrc_domain_data meson_ee_sm1_pwrc_data = {
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.count = ARRAY_SIZE(sm1_pwrc_domains),
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.domains = sm1_pwrc_domains,
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@@ -379,6 +397,10 @@ static const struct udevice_id meson_ee_pwrc_ids[] = {
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.compatible = "amlogic,meson-g12a-pwrc",
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.data = (unsigned long)&meson_ee_g12a_pwrc_data,
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},
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+ {
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+ .compatible = "amlogic,meson-gxbb-pwrc",
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+ .data = (unsigned long)&meson_ee_gxbb_pwrc_data,
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+ },
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{
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.compatible = "amlogic,meson-sm1-pwrc",
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.data = (unsigned long)&meson_ee_sm1_pwrc_data,
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--
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2.17.1
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@ -1,88 +0,0 @@
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From 8849236317c68808262cb02e086c5a83520a8724 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Wed, 30 Sep 2020 11:55:50 +0200
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Subject: [PATCH 05/21] FROMGIT: power: domain: meson-ee-pwrc: add support for
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the Meson AXG SoCs
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This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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drivers/power/domain/meson-ee-pwrc.c | 26 ++++++++++++++++++++++++++
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1 file changed, 26 insertions(+)
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diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c
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index dfedddd950..fa1ee93837 100644
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--- a/drivers/power/domain/meson-ee-pwrc.c
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+++ b/drivers/power/domain/meson-ee-pwrc.c
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@@ -13,6 +13,7 @@
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#include <syscon.h>
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#include <reset.h>
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#include <clk.h>
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+#include <dt-bindings/power/meson-axg-power.h>
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#include <dt-bindings/power/meson-g12a-power.h>
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#include <dt-bindings/power/meson-gxbb-power.h>
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#include <dt-bindings/power/meson-sm1-power.h>
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@@ -127,6 +128,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = {
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VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
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};
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+static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_vpu[] = {
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+ VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
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+ VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
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+};
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+
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static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = {
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VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
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VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
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@@ -166,6 +172,10 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_ge2d[] = {
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{ HHI_MEM_PD_REG0, GENMASK(25, 18) },
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};
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+static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_audio[] = {
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+ { HHI_MEM_PD_REG0, GENMASK(5, 4) },
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+};
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+
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static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {
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{ HHI_MEM_PD_REG0, GENMASK(5, 4) },
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{ HHI_AUDIO_MEM_PD_REG0, GENMASK(1, 0) },
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@@ -213,6 +223,13 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
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[PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
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};
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+static struct meson_ee_pwrc_domain_desc axg_pwrc_domains[] = {
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+ [PWRC_AXG_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, axg_pwrc_mem_vpu,
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+ pwrc_ee_get_power, 5, 2),
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+ [PWRC_AXG_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
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+ [PWRC_AXG_AUDIO_ID] = MEM_PD("AUDIO", axg_pwrc_mem_audio),
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+};
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+
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static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
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[PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu,
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pwrc_ee_get_power, 12, 2),
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@@ -382,6 +399,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = {
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.domains = g12a_pwrc_domains,
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};
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+static struct meson_ee_pwrc_domain_data meson_ee_axg_pwrc_data = {
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+ .count = ARRAY_SIZE(axg_pwrc_domains),
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+ .domains = axg_pwrc_domains,
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+};
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+
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static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = {
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.count = ARRAY_SIZE(gxbb_pwrc_domains),
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.domains = gxbb_pwrc_domains,
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@@ -401,6 +423,10 @@ static const struct udevice_id meson_ee_pwrc_ids[] = {
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.compatible = "amlogic,meson-gxbb-pwrc",
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.data = (unsigned long)&meson_ee_gxbb_pwrc_data,
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},
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+ {
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+ .compatible = "amlogic,meson-axg-pwrc",
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+ .data = (unsigned long)&meson_ee_axg_pwrc_data,
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+ },
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{
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.compatible = "amlogic,meson-sm1-pwrc",
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.data = (unsigned long)&meson_ee_sm1_pwrc_data,
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--
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2.17.1
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@ -1,86 +0,0 @@
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From ba156073da5a34441657fef6d36ccc0767e1a3e8 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Fri, 6 Nov 2020 11:11:08 +0100
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Subject: [PATCH 06/21] FROMGIT: configs: use the new MESON_EE_POWER_DOMAIN
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driver for Amlogic GXBB/GXL/GXM boards
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Linux 5.10-rc1 uses the new generic driver, so switch to it since GXBB and
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later is now supported.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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---
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configs/libretech-ac_defconfig | 2 +-
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configs/libretech-cc_defconfig | 2 +-
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configs/libretech-s905d-pc_defconfig | 2 +-
|
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configs/libretech-s912-pc_defconfig | 2 +-
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configs/odroid-c2_defconfig | 2 +-
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5 files changed, 5 insertions(+), 5 deletions(-)
|
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diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
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index 171d793ae3..ca61591bd7 100644
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--- a/configs/libretech-ac_defconfig
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+++ b/configs/libretech-ac_defconfig
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@@ -51,7 +51,7 @@ CONFIG_MESON_GXL_USB_PHY=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_MESON_GXL=y
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CONFIG_POWER_DOMAIN=y
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-CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
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+CONFIG_MESON_EE_POWER_DOMAIN=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_RESET=y
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diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
|
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index aaab1a2d08..fb4bf4c929 100644
|
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--- a/configs/libretech-cc_defconfig
|
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+++ b/configs/libretech-cc_defconfig
|
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@@ -38,7 +38,7 @@ CONFIG_MESON_GXL_USB_PHY=y
|
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CONFIG_PINCTRL=y
|
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CONFIG_PINCTRL_MESON_GXL=y
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CONFIG_POWER_DOMAIN=y
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-CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
|
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+CONFIG_MESON_EE_POWER_DOMAIN=y
|
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CONFIG_DM_REGULATOR=y
|
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CONFIG_DM_REGULATOR_FIXED=y
|
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CONFIG_DM_RESET=y
|
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diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
|
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index f4e289aca1..9d4c880a3b 100644
|
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--- a/configs/libretech-s905d-pc_defconfig
|
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+++ b/configs/libretech-s905d-pc_defconfig
|
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@@ -46,7 +46,7 @@ CONFIG_MESON_GXL_USB_PHY=y
|
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CONFIG_PINCTRL=y
|
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CONFIG_PINCTRL_MESON_GXL=y
|
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CONFIG_POWER_DOMAIN=y
|
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-CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
|
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+CONFIG_MESON_EE_POWER_DOMAIN=y
|
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CONFIG_DM_REGULATOR=y
|
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CONFIG_DM_REGULATOR_FIXED=y
|
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CONFIG_DM_RESET=y
|
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diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
|
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index 24e410c5aa..cf600c1cbe 100644
|
||||
--- a/configs/libretech-s912-pc_defconfig
|
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+++ b/configs/libretech-s912-pc_defconfig
|
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@@ -45,7 +45,7 @@ CONFIG_MESON_GXL_USB_PHY=y
|
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CONFIG_PINCTRL=y
|
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CONFIG_PINCTRL_MESON_GXL=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
-CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
|
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+CONFIG_MESON_EE_POWER_DOMAIN=y
|
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CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_RESET=y
|
||||
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
|
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index 14e840547f..5c02fa1e62 100644
|
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--- a/configs/odroid-c2_defconfig
|
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+++ b/configs/odroid-c2_defconfig
|
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@@ -38,7 +38,7 @@ CONFIG_MESON_GXBB_USB_PHY=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_MESON_GXBB=y
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CONFIG_POWER_DOMAIN=y
|
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-CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
|
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+CONFIG_MESON_EE_POWER_DOMAIN=y
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CONFIG_DM_REGULATOR=y
|
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CONFIG_DM_REGULATOR_FIXED=y
|
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CONFIG_DM_REGULATOR_GPIO=y
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--
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2.17.1
|
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|
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@ -1,375 +0,0 @@
|
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From 6974cd60b954cbd3b5288333384e763aad326c45 Mon Sep 17 00:00:00 2001
|
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From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 3 Nov 2020 02:30:18 +0000
|
||||
Subject: [PATCH 07/21] FROMGIT: ARM: dts: import WeTek Core2 DTs from Linux
|
||||
5.10
|
||||
|
||||
Import the WeTek Core2 and supporting meson-gx-p23x-q20x.dtsi files
|
||||
from Linux 5.10.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/Makefile | 1 +
|
||||
arch/arm/dts/meson-gx-p23x-q20x.dtsi | 228 ++++++++++++++++++
|
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.../arm/dts/meson-gxm-wetek-core2-u-boot.dtsi | 7 +
|
||||
arch/arm/dts/meson-gxm-wetek-core2.dts | 87 +++++++
|
||||
4 files changed, 323 insertions(+)
|
||||
create mode 100644 arch/arm/dts/meson-gx-p23x-q20x.dtsi
|
||||
create mode 100644 arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi
|
||||
create mode 100644 arch/arm/dts/meson-gxm-wetek-core2.dts
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index 4044c3c87a..cd624950ab 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -165,6 +165,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
|
||||
meson-gxl-s905d-libretech-pc.dtb \
|
||||
meson-gxm-khadas-vim2.dtb \
|
||||
meson-gxm-s912-libretech-pc.dtb \
|
||||
+ meson-gxm-wetek-core2.dtb \
|
||||
meson-axg-s400.dtb \
|
||||
meson-g12a-u200.dtb \
|
||||
meson-g12a-sei510.dtb \
|
||||
diff --git a/arch/arm/dts/meson-gx-p23x-q20x.dtsi b/arch/arm/dts/meson-gx-p23x-q20x.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..52525fcc59
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gx-p23x-q20x.dtsi
|
||||
@@ -0,0 +1,228 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 Endless Computers, Inc.
|
||||
+ * Author: Carlo Caione <carlo@endlessm.com>
|
||||
+ */
|
||||
+
|
||||
+/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either
|
||||
+ * the pin-compatible S912 (GXM) or S905D (GXL) SoCs.
|
||||
+ */
|
||||
+
|
||||
+/ {
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ ethernet0 = ðmac;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>;
|
||||
+ };
|
||||
+
|
||||
+ hdmi_5v: regulator-hdmi-5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "HDMI_5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddio_ao18: regulator-vddio_ao18 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_AO18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vddio_boot: regulator-vddio_boot {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_BOOT";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3: regulator-vddao_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-vcc_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ wifi32k: wifi32k {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ cvbs-connector {
|
||||
+ compatible = "composite-video-connector";
|
||||
+
|
||||
+ port {
|
||||
+ cvbs_connector_in: endpoint {
|
||||
+ remote-endpoint = <&cvbs_vdac_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&ao_cec_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cvbs_vdac_port {
|
||||
+ cvbs_vdac_out: endpoint {
|
||||
+ remote-endpoint = <&cvbs_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-supply = <&hdmi_5v>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
+ clock-names = "clkin0";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vddio_ao18>;
|
||||
+};
|
||||
+
|
||||
+/* Wireless SDIO Module */
|
||||
+&sd_emmc_a {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdio_pins>;
|
||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
||||
+ keep-power-in-suspend;
|
||||
+
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+};
|
||||
+
|
||||
+/* This UART is brought out to the DB9 connector */
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi b/arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..39270ea71c
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxm-wetek-core2-u-boot.dtsi
|
||||
@@ -0,0 +1,7 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-gxl-u-boot.dtsi"
|
||||
diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts
|
||||
new file mode 100644
|
||||
index 0000000000..ec794c134c
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxm-wetek-core2.dts
|
||||
@@ -0,0 +1,87 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxm.dtsi"
|
||||
+#include "meson-gx-p23x-q20x.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "wetek,core2", "amlogic,s912", "amlogic,meson-gxm";
|
||||
+ model = "WeTek Core 2";
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ blue {
|
||||
+ color = <LED_COLOR_ID_BLUE>;
|
||||
+ function = LED_FUNCTION_STATUS;
|
||||
+ gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "on";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ adc-keys {
|
||||
+ compatible = "adc-keys";
|
||||
+ io-channels = <&saradc 0>;
|
||||
+ io-channel-names = "buttons";
|
||||
+ keyup-threshold-microvolt = <1710000>;
|
||||
+
|
||||
+ button-update {
|
||||
+ label = "update";
|
||||
+ linux,code = <KEY_VENDOR>;
|
||||
+ press-threshold-microvolt = <10000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys-polled {
|
||||
+ compatible = "gpio-keys-polled";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ poll-interval = <100>;
|
||||
+
|
||||
+ button-power {
|
||||
+ label = "power";
|
||||
+ linux,code = <KEY_POWER>;
|
||||
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* Disabled as Realtek RTL8152 USB provides Ethernet */
|
||||
+ðmac {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&internal_phy {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ linux,rc-map-name = "rc-wetek-play2";
|
||||
+};
|
||||
+
|
||||
+/* This is connected to the Bluetooth module: */
|
||||
+&uart_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ max-speed = <2000000>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "lpo";
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,92 +0,0 @@
|
||||
From 71c65979ded70b70ae537f426f4c08a387682a79 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 3 Nov 2020 02:48:41 +0000
|
||||
Subject: [PATCH 08/21] FROMGIT: boards: amlogic: add WeTek Core2 support
|
||||
|
||||
Add a config for the WeTek Core2, largely based on the VIM2 config.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
configs/wetek-core2_defconfig | 70 +++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 70 insertions(+)
|
||||
create mode 100644 configs/wetek-core2_defconfig
|
||||
|
||||
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..706abff962
|
||||
--- /dev/null
|
||||
+++ b/configs/wetek-core2_defconfig
|
||||
@@ -0,0 +1,70 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_ENV_SIZE=0x2000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_MESON_GXM=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xc81004c0
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" wetek-core2"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_CONSOLE_MUX=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_ADC=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_SF_TEST=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_SARADC_MESON=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_MTD=y
|
||||
+CONFIG_DM_MTD=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_MESON_GXL_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_GXL=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_MESON=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+# CONFIG_VIDEO_BPP16 is not set
|
||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
+CONFIG_USB_DWC3_MESON_GXL=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,152 +0,0 @@
|
||||
From d8bdcbf312e0cd740ead1dd2a590e179b5092c6a Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 3 Nov 2020 03:06:57 +0000
|
||||
Subject: [PATCH 09/21] FROMGIT: boards: amlogic: update documentation for
|
||||
WeTek Core2
|
||||
|
||||
Update the device matrix and add build instructions.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
doc/board/amlogic/index.rst | 5 +-
|
||||
doc/board/amlogic/wetek-core2.rst | 101 ++++++++++++++++++++++++++++++
|
||||
2 files changed, 104 insertions(+), 2 deletions(-)
|
||||
create mode 100644 doc/board/amlogic/wetek-core2.rst
|
||||
|
||||
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
|
||||
index 9e780ba47c..82ad7a2f1a 100644
|
||||
--- a/doc/board/amlogic/index.rst
|
||||
+++ b/doc/board/amlogic/index.rst
|
||||
@@ -17,7 +17,7 @@ This matrix concerns the actual source code version.
|
||||
+===============================+===========+==============+==============+============+============+=============+==============+
|
||||
| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
|
||||
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
|
||||
-| | P200 | LibreTech-CC | | | | | Odroid-C4 |
|
||||
+| | P200 | LibreTech-CC | WeTek Core2 | | | | Odroid-C4 |
|
||||
| | P201 | LibreTech-AC | | | | | |
|
||||
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
@@ -36,7 +36,7 @@ This matrix concerns the actual source code version.
|
||||
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** |
|
||||
+| Fuse access | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No |
|
||||
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
@@ -96,3 +96,4 @@ Board Documentation
|
||||
sei610
|
||||
u200
|
||||
w400
|
||||
+ wetek-core2
|
||||
diff --git a/doc/board/amlogic/wetek-core2.rst b/doc/board/amlogic/wetek-core2.rst
|
||||
new file mode 100644
|
||||
index 0000000000..f8faf48259
|
||||
--- /dev/null
|
||||
+++ b/doc/board/amlogic/wetek-core2.rst
|
||||
@@ -0,0 +1,101 @@
|
||||
+.. SPDX-License-Identifier: GPL-2.0+
|
||||
+
|
||||
+U-Boot for WeTek Core2
|
||||
+======================
|
||||
+
|
||||
+WeTek Core2 is an Android STB based on the Q200 reference design with
|
||||
+the following specifications:
|
||||
+
|
||||
+ - Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
|
||||
+ - ARM Mali T820 GPU
|
||||
+ - 3GB DDR4 SDRAM
|
||||
+ - 10/100 Realtek RTL8152 Ethernet (internal USB)
|
||||
+ - HDMI 2.0 4K/60Hz display
|
||||
+ - 2x USB 2.0 Host, 1x USB 2.0 OTG (internal)
|
||||
+ - 32GB eMMC
|
||||
+ - microSD
|
||||
+ - SDIO Wifi Module, Bluetooth
|
||||
+ - Two channel IR receiver
|
||||
+
|
||||
+U-Boot compilation
|
||||
+------------------
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ $ make wetek-core2_defconfig
|
||||
+ $ make
|
||||
+
|
||||
+Image creation
|
||||
+--------------
|
||||
+
|
||||
+Amlogic does not provide sources for the firmware or the tools needed
|
||||
+to create the bootloader image, and WeTek has not publicly shared the
|
||||
+precompiled FIP binaries. However the public Khadas VIM2 sources also
|
||||
+work with the Core2 box so we can use the Khadas git tree:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
|
||||
+ $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
|
||||
+ $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
|
||||
+ $ git clone https://github.com/khadas/u-boot -b khadas-vim-v2015.01 vim-u-boot
|
||||
+ $ cd vim-u-boot
|
||||
+ $ make kvim2_defconfig
|
||||
+ $ make
|
||||
+ $ export FIPDIR=$PWD/fip
|
||||
+
|
||||
+Go back to mainline U-Boot source tree then :
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ mkdir fip
|
||||
+
|
||||
+ $ cp $FIPDIR/gxl/bl2.bin fip/
|
||||
+ $ cp $FIPDIR/gxl/acs.bin fip/
|
||||
+ $ cp $FIPDIR/gxl/bl21.bin fip/
|
||||
+ $ cp $FIPDIR/gxl/bl30.bin fip/
|
||||
+ $ cp $FIPDIR/gxl/bl301.bin fip/
|
||||
+ $ cp $FIPDIR/gxl/bl31.img fip/
|
||||
+ $ cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ $ $FIPDIR/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
|
||||
+
|
||||
+ $ $FIPDIR/blx_fix.sh \
|
||||
+ fip/bl2_acs.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/bl21.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
|
||||
+ $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
|
||||
+ $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
|
||||
+ $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
|
||||
+ $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
|
||||
+ --output fip/u-boot.bin \
|
||||
+ --bl2 fip/bl2.n.bin.sig \
|
||||
+ --bl30 fip/bl30_new.bin.enc \
|
||||
+ --bl31 fip/bl31.img.enc \
|
||||
+ --bl33 fip/bl33.bin.enc
|
||||
+
|
||||
+then write the image to SD with:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ DEV=/dev/your_sd_device
|
||||
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,749 +0,0 @@
|
||||
From 45783c1c41307527a84ecbed78eb11e72ecbfadb Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 17 Dec 2020 13:16:18 +0000
|
||||
Subject: [PATCH 10/21] FROMGIT: ARM: dts: import Beelink GT-King/Pro DTs from
|
||||
Linux 5.10
|
||||
|
||||
Import the Beelink GT-King/Pro and supporting meson-g12b-w400.dtsi file
|
||||
from Linux 5.10.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/Makefile | 2 +
|
||||
arch/arm/dts/meson-g12b-gtking-pro.dts | 125 ++++++++
|
||||
arch/arm/dts/meson-g12b-gtking.dts | 145 +++++++++
|
||||
arch/arm/dts/meson-g12b-w400.dtsi | 425 +++++++++++++++++++++++++
|
||||
4 files changed, 697 insertions(+)
|
||||
create mode 100644 arch/arm/dts/meson-g12b-gtking-pro.dts
|
||||
create mode 100644 arch/arm/dts/meson-g12b-gtking.dts
|
||||
create mode 100644 arch/arm/dts/meson-g12b-w400.dtsi
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index cd624950ab..5756f47a3f 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -169,6 +169,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
|
||||
meson-axg-s400.dtb \
|
||||
meson-g12a-u200.dtb \
|
||||
meson-g12a-sei510.dtb \
|
||||
+ meson-g12b-gtking.dtb \
|
||||
+ meson-g12b-gtking-pro.dtb \
|
||||
meson-g12b-odroid-n2.dtb \
|
||||
meson-g12b-odroid-n2-plus.dtb \
|
||||
meson-g12b-a311d-khadas-vim3.dtb \
|
||||
diff --git a/arch/arm/dts/meson-g12b-gtking-pro.dts b/arch/arm/dts/meson-g12b-gtking-pro.dts
|
||||
new file mode 100644
|
||||
index 0000000000..f0c56a16af
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-g12b-gtking-pro.dts
|
||||
@@ -0,0 +1,125 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12b-w400.dtsi"
|
||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "azw,gtking", "amlogic,g12b";
|
||||
+ model = "Beelink GT-King Pro";
|
||||
+
|
||||
+ gpio-keys-polled {
|
||||
+ compatible = "gpio-keys-polled";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ poll-interval = <100>;
|
||||
+
|
||||
+ power-button {
|
||||
+ label = "power";
|
||||
+ linux,code = <KEY_POWER>;
|
||||
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ white {
|
||||
+ label = "power:white";
|
||||
+ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "on";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,axg-sound-card";
|
||||
+ model = "G12B-GTKING-PRO";
|
||||
+ audio-aux-devs = <&tdmout_b>;
|
||||
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
+ <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&frddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&frddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&frddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&arb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-g12b-gtking.dts b/arch/arm/dts/meson-g12b-gtking.dts
|
||||
new file mode 100644
|
||||
index 0000000000..eeb7bc5539
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-g12b-gtking.dts
|
||||
@@ -0,0 +1,145 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12b-w400.dtsi"
|
||||
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "azw,gtking", "amlogic,g12b";
|
||||
+ model = "Beelink GT-King";
|
||||
+
|
||||
+ spdif_dit: audio-codec-1 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "linux,spdif-dit";
|
||||
+ status = "okay";
|
||||
+ sound-name-prefix = "DIT";
|
||||
+ };
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,axg-sound-card";
|
||||
+ model = "G12B-GTKING";
|
||||
+ audio-aux-devs = <&tdmout_b>;
|
||||
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "SPDIFOUT IN 0", "FRDDR_A OUT 3",
|
||||
+ "SPDIFOUT IN 1", "FRDDR_B OUT 3",
|
||||
+ "SPDIFOUT IN 2", "FRDDR_C OUT 3";
|
||||
+
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
+ <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&frddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&frddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&frddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&tdmif_b>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
+ dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif hdmi or toslink interface */
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&spdifout>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&spdif_dit>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* spdif hdmi interface */
|
||||
+ dai-link-5 {
|
||||
+ sound-dai = <&spdifout_b>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* hdmi glue */
|
||||
+ dai-link-6 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&arb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&clkc_audio {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&frddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spdifout {
|
||||
+ pinctrl-0 = <&spdif_out_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&spdifout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-g12b-w400.dtsi b/arch/arm/dts/meson-g12b-w400.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..2802ddbb83
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-g12b-w400.dtsi
|
||||
@@ -0,0 +1,425 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-g12b.dtsi"
|
||||
+#include "meson-g12b-s922x.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
+
|
||||
+/ {
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ ethernet0 = ðmac;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ flash_1v8: regulator-flash_1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "FLASH_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ main_12v: regulator-main_12v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "12V";
|
||||
+ regulator-min-microvolt = <12000000>;
|
||||
+ regulator-max-microvolt = <12000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_5v: regulator-vcc_5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&main_12v>;
|
||||
+
|
||||
+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: regulator-vcc_1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-vcc_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ /* FIXME: actually controlled by VDDCPU_B_EN */
|
||||
+ };
|
||||
+
|
||||
+ vddcpu_a: regulator-vddcpu-a {
|
||||
+ /*
|
||||
+ * MP1653 Regulator.
|
||||
+ */
|
||||
+ compatible = "pwm-regulator";
|
||||
+
|
||||
+ regulator-name = "VDDCPU_A";
|
||||
+ regulator-min-microvolt = <721000>;
|
||||
+ regulator-max-microvolt = <1022000>;
|
||||
+
|
||||
+ vin-supply = <&main_12v>;
|
||||
+
|
||||
+ pwms = <&pwm_ab 0 1250 0>;
|
||||
+ pwm-dutycycle-range = <100 0>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddcpu_b: regulator-vddcpu-b {
|
||||
+ /*
|
||||
+ * MP1652 Regulator.
|
||||
+ */
|
||||
+ compatible = "pwm-regulator";
|
||||
+
|
||||
+ regulator-name = "VDDCPU_B";
|
||||
+ regulator-min-microvolt = <721000>;
|
||||
+ regulator-max-microvolt = <1022000>;
|
||||
+
|
||||
+ vin-supply = <&main_12v>;
|
||||
+
|
||||
+ pwms = <&pwm_AO_cd 1 1250 0>;
|
||||
+ pwm-dutycycle-range = <100 0>;
|
||||
+
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ usb1_pow: regulator-usb1-pow {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "USB1_POW";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc_5v>;
|
||||
+
|
||||
+ /* connected to SY6280A Power Switch */
|
||||
+ gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ usb_pwr_en: regulator-usb-pwr-en {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "USB_PWR_EN";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc_5v>;
|
||||
+
|
||||
+ /* Connected to USB3 Type-A Port power enable */
|
||||
+ gpio = <&gpio GPIOAO_7 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ vddao_1v8: regulator-vddao-1v8 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vddao_3v3>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3: regulator-vddao-3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&main_12v>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ cvbs-connector {
|
||||
+ compatible = "composite-video-connector";
|
||||
+
|
||||
+ port {
|
||||
+ cvbs_connector_in: endpoint {
|
||||
+ remote-endpoint = <&cvbs_vdac_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wifi32k: wifi32k {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ pinctrl-0 = <&cec_ao_a_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "disabled";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cecb_AO {
|
||||
+ pinctrl-0 = <&cec_ao_b_h_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vddcpu_b>;
|
||||
+ operating-points-v2 = <&cpu_opp_table_0>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vddcpu_b>;
|
||||
+ operating-points-v2 = <&cpu_opp_table_0>;
|
||||
+ clocks = <&clkc CLKID_CPU_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu100 {
|
||||
+ cpu-supply = <&vddcpu_a>;
|
||||
+ operating-points-v2 = <&cpub_opp_table_1>;
|
||||
+ clocks = <&clkc CLKID_CPUB_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu101 {
|
||||
+ cpu-supply = <&vddcpu_a>;
|
||||
+ operating-points-v2 = <&cpub_opp_table_1>;
|
||||
+ clocks = <&clkc CLKID_CPUB_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu102 {
|
||||
+ cpu-supply = <&vddcpu_a>;
|
||||
+ operating-points-v2 = <&cpub_opp_table_1>;
|
||||
+ clocks = <&clkc CLKID_CPUB_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cpu103 {
|
||||
+ cpu-supply = <&vddcpu_a>;
|
||||
+ operating-points-v2 = <&cpub_opp_table_1>;
|
||||
+ clocks = <&clkc CLKID_CPUB_CLK>;
|
||||
+ clock-latency = <50000>;
|
||||
+};
|
||||
+
|
||||
+&cvbs_vdac_port {
|
||||
+ cvbs_vdac_out: endpoint {
|
||||
+ remote-endpoint = <&cvbs_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ext_mdio {
|
||||
+ external_phy: ethernet-phy@0 {
|
||||
+ /* Realtek RTL8211F (0x001cc916) */
|
||||
+ reg = <0>;
|
||||
+ max-speed = <1000>;
|
||||
+
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <30000>;
|
||||
+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio_intc>;
|
||||
+ /* MAC_INTR on GPIOZ_14 */
|
||||
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-handle = <&external_phy>;
|
||||
+ amlogic,tx-delay-ns = <2>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-supply = <&vcc_5v>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&pwm_ab {
|
||||
+ pinctrl-0 = <&pwm_a_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin0";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm_AO_cd {
|
||||
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin1";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&xtal>;
|
||||
+ clock-names = "clkin0";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* SDIO */
|
||||
+&sd_emmc_a {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdio_pins>;
|
||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <100000000>;
|
||||
+
|
||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
||||
+ keep-power-in-suspend;
|
||||
+
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddao_1v8>;
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_c_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddao_3v3>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <100000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&flash_1v8>;
|
||||
+};
|
||||
+
|
||||
+&uart_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ max-speed = <2000000>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "lpo";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ status = "okay";
|
||||
+ dr_mode = "host";
|
||||
+ vbus-supply = <&usb_pwr_en>;
|
||||
+};
|
||||
+
|
||||
+&usb2_phy0 {
|
||||
+ phy-supply = <&usb1_pow>;
|
||||
+};
|
||||
+
|
||||
+&usb2_phy1 {
|
||||
+ phy-supply = <&usb1_pow>;
|
||||
+};
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,108 +0,0 @@
|
||||
From 028be6ea0ba9197a9bcd6bfeb613df2412d73217 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 18 Dec 2020 03:16:17 +0000
|
||||
Subject: [PATCH 11/21] FROMGIT: boards: amlogic: add Beelink S922X board
|
||||
family support
|
||||
|
||||
Copied from Odroid N2. Add myself as maintainer.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
board/amlogic/beelink-s922x/MAINTAINERS | 9 ++++
|
||||
board/amlogic/beelink-s922x/Makefile | 6 +++
|
||||
board/amlogic/beelink-s922x/beelink-s922x.c | 54 +++++++++++++++++++++
|
||||
3 files changed, 69 insertions(+)
|
||||
create mode 100644 board/amlogic/beelink-s922x/MAINTAINERS
|
||||
create mode 100644 board/amlogic/beelink-s922x/Makefile
|
||||
create mode 100644 board/amlogic/beelink-s922x/beelink-s922x.c
|
||||
|
||||
diff --git a/board/amlogic/beelink-s922x/MAINTAINERS b/board/amlogic/beelink-s922x/MAINTAINERS
|
||||
new file mode 100644
|
||||
index 0000000000..7f223df4ae
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/beelink-s922x/MAINTAINERS
|
||||
@@ -0,0 +1,9 @@
|
||||
+BEELINK-S922X
|
||||
+M: Christian Hewitt <christianshewitt@gmail.com>
|
||||
+S: Maintained
|
||||
+L: u-boot-amlogic@groups.io
|
||||
+F: board/amlogic/beelink-s922x/
|
||||
+F: configs/beelink-gtking_defconfig
|
||||
+F: configs/beelink-gtkingpro_defconfig
|
||||
+F: doc/board/amlogic/beelink-gtking.rst
|
||||
+F: doc/board/amlogic/beelink-gtkingpro.rst
|
||||
diff --git a/board/amlogic/beelink-s922x/Makefile b/board/amlogic/beelink-s922x/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..27b1a74105
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/beelink-s922x/Makefile
|
||||
@@ -0,0 +1,6 @@
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+# (C) Copyright 2020 BayLibre, SAS
|
||||
+# Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+
|
||||
+obj-y := beelink-s922x.o
|
||||
diff --git a/board/amlogic/beelink-s922x/beelink-s922x.c b/board/amlogic/beelink-s922x/beelink-s922x.c
|
||||
new file mode 100644
|
||||
index 0000000000..dc0d933a39
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/beelink-s922x/beelink-s922x.c
|
||||
@@ -0,0 +1,54 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * Copyright (C) 2020 BayLibre, SAS
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <dm.h>
|
||||
+#include <env.h>
|
||||
+#include <init.h>
|
||||
+#include <net.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/arch/sm.h>
|
||||
+#include <asm/arch/eth.h>
|
||||
+#include <asm/arch/boot.h>
|
||||
+
|
||||
+#define EFUSE_MAC_OFFSET 20
|
||||
+#define EFUSE_MAC_SIZE 12
|
||||
+#define MAC_ADDR_LEN 6
|
||||
+
|
||||
+int misc_init_r(void)
|
||||
+{
|
||||
+ u8 mac_addr[MAC_ADDR_LEN];
|
||||
+ char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
|
||||
+ ssize_t len;
|
||||
+
|
||||
+ if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) &&
|
||||
+ meson_get_soc_rev(tmp, sizeof(tmp)) > 0)
|
||||
+ env_set("soc_rev", tmp);
|
||||
+
|
||||
+ meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
|
||||
+
|
||||
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
+ efuse_mac_addr, EFUSE_MAC_SIZE);
|
||||
+ if (len != EFUSE_MAC_SIZE)
|
||||
+ return 0;
|
||||
+
|
||||
+ /* MAC is stored in ASCII format, 1bytes = 2characters */
|
||||
+ for (int i = 0; i < 6; i++) {
|
||||
+ tmp[0] = efuse_mac_addr[i * 2];
|
||||
+ tmp[1] = efuse_mac_addr[i * 2 + 1];
|
||||
+ tmp[2] = '\0';
|
||||
+ mac_addr[i] = simple_strtoul(tmp, NULL, 16);
|
||||
+ }
|
||||
+
|
||||
+ if (is_valid_ethaddr(mac_addr))
|
||||
+ eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
+ else
|
||||
+ meson_generate_serial_ethaddr();
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,94 +0,0 @@
|
||||
From 7a0a86a0a7e82b616ed25a0513432605953217fd Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 17 Dec 2020 13:23:09 +0000
|
||||
Subject: [PATCH 12/21] FROMGIT: boards: amlogic: add Beelink GT-King defconfig
|
||||
|
||||
Add a defconfig for the Beelink GT-King Android STB, which is based
|
||||
on the Amlogic W400 reference design.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
configs/beelink-gtking_defconfig | 71 ++++++++++++++++++++++++++++++++
|
||||
1 file changed, 71 insertions(+)
|
||||
create mode 100644 configs/beelink-gtking_defconfig
|
||||
|
||||
diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..ea428874af
|
||||
--- /dev/null
|
||||
+++ b/configs/beelink-gtking_defconfig
|
||||
@@ -0,0 +1,71 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SYS_BOARD="beelink-s922x"
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_ENV_SIZE=0x2000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_MESON_G12A=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" beelink"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_SF_TEST=y
|
||||
+CONFIG_CMD_SPI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_MTD=y
|
||||
+CONFIG_DM_MTD=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_MESON_G12A_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_G12A=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+# CONFIG_VIDEO_BPP16 is not set
|
||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_SPLASH_SCREEN=y
|
||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,95 +0,0 @@
|
||||
From 4e781d8567168a132282c4153736fe16621e12c3 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 17 Dec 2020 13:24:47 +0000
|
||||
Subject: [PATCH 13/21] FROMGIT: boards: amlogic: add Beelink GT-King Pro
|
||||
defconfig
|
||||
|
||||
Add a defconfig for the Beelink GT-King Pro Android STB, which is based
|
||||
on the Amlogic W400 reference design.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
configs/beelink-gtkingpro_defconfig | 71 +++++++++++++++++++++++++++++
|
||||
1 file changed, 71 insertions(+)
|
||||
create mode 100644 configs/beelink-gtkingpro_defconfig
|
||||
|
||||
diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..569031600a
|
||||
--- /dev/null
|
||||
+++ b/configs/beelink-gtkingpro_defconfig
|
||||
@@ -0,0 +1,71 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SYS_BOARD="beelink-s922x"
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_ENV_SIZE=0x2000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_MESON_G12A=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" beelink"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_SF_TEST=y
|
||||
+CONFIG_CMD_SPI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_MTD=y
|
||||
+CONFIG_DM_MTD=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_MESON_G12A_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_G12A=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+# CONFIG_VIDEO_BPP16 is not set
|
||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_SPLASH_SCREEN=y
|
||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,403 +0,0 @@
|
||||
From 1c4431cf75268c4d5813411045d3e3dd310cc0d7 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 18 Dec 2020 02:39:38 +0000
|
||||
Subject: [PATCH 14/21] FROMGIT: boards: amlogic: update documentation for
|
||||
Beelink GT-King/Pro
|
||||
|
||||
Update the device matrix and add build instructions.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
doc/board/amlogic/beelink-gtking.rst | 115 ++++++++++++++++++++++
|
||||
doc/board/amlogic/beelink-gtkingpro.rst | 116 ++++++++++++++++++++++
|
||||
doc/board/amlogic/index.rst | 122 ++++++++++++------------
|
||||
3 files changed, 293 insertions(+), 60 deletions(-)
|
||||
create mode 100644 doc/board/amlogic/beelink-gtking.rst
|
||||
create mode 100644 doc/board/amlogic/beelink-gtkingpro.rst
|
||||
|
||||
diff --git a/doc/board/amlogic/beelink-gtking.rst b/doc/board/amlogic/beelink-gtking.rst
|
||||
new file mode 100644
|
||||
index 0000000000..56ce2cb273
|
||||
--- /dev/null
|
||||
+++ b/doc/board/amlogic/beelink-gtking.rst
|
||||
@@ -0,0 +1,115 @@
|
||||
+.. SPDX-License-Identifier: GPL-2.0+
|
||||
+
|
||||
+U-Boot for Beelink GT-King
|
||||
+==========================
|
||||
+
|
||||
+The Shenzen AZW (Beelink) GT-King is based on the Amlogic W400 reference
|
||||
+board with an S922X-H chip.
|
||||
+
|
||||
+- 4GB LPDDR4 RAM
|
||||
+- 64GB eMMC storage
|
||||
+- 10/100/1000 Base-T Ethernet
|
||||
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
|
||||
+- HDMI 2.1 video
|
||||
+- S/PDIF optical output
|
||||
+- Analogue audio output
|
||||
+- 1x USB 2.0 port
|
||||
+- 2x USB 3.0 ports
|
||||
+- IR receiver
|
||||
+- 1x micro SD card slot
|
||||
+
|
||||
+Beelink do not provide public schematics, but have been willing
|
||||
+to share them with known distro developers on request.
|
||||
+
|
||||
+U-Boot compilation
|
||||
+------------------
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ $ make beelink-gtking_defconfig
|
||||
+ $ make
|
||||
+
|
||||
+Image creation
|
||||
+--------------
|
||||
+
|
||||
+Amlogic does not provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image. Beelink have provided the Amlogic "SDK"
|
||||
+in their forums, but the u-boot sources included result in 2GB RAM being
|
||||
+detected. The following FIPs were generated with newer private sources
|
||||
+and give correct (4GB) RAM detection:
|
||||
+
|
||||
+https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x
|
||||
+
|
||||
+NB: Beelink use a common board config for GT-King, GT-King Pro and the
|
||||
+GS-King-X model, hence the "beelink-s922x" name.
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
|
||||
+ $ unzip master.zip
|
||||
+ $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x
|
||||
+
|
||||
+Go back to the mainline U-Boot source tree then:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ mkdir fip
|
||||
+ $ cp $FIPDIR/* fip/
|
||||
+ $ cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ $ sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ $ sh fip/blx_fix.sh \
|
||||
+ fip/bl2.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/acs.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
|
||||
+ --output fip/bl30_new.bin.g12a.enc \
|
||||
+ --level v3
|
||||
+ $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
|
||||
+ --output fip/bl30_new.bin.enc \
|
||||
+ --level v3 --type bl30
|
||||
+ $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
|
||||
+ --output fip/bl31.img.enc \
|
||||
+ --level v3 --type bl31
|
||||
+ $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
|
||||
+ --output fip/bl33.bin.enc \
|
||||
+ --level v3 --type bl33
|
||||
+ $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
|
||||
+ --output fip/bl2.n.bin.sig
|
||||
+ $ fip/aml_encrypt_g12b --bootmk \
|
||||
+ --output fip/u-boot.bin \
|
||||
+ --bl2 fip/bl2.n.bin.sig \
|
||||
+ --bl30 fip/bl30_new.bin.enc \
|
||||
+ --bl31 fip/bl31.img.enc \
|
||||
+ --bl33 fip/bl33.bin.enc \
|
||||
+ --ddrfw1 fip/ddr4_1d.fw \
|
||||
+ --ddrfw2 fip/ddr4_2d.fw \
|
||||
+ --ddrfw3 fip/ddr3_1d.fw \
|
||||
+ --ddrfw4 fip/piei.fw \
|
||||
+ --ddrfw5 fip/lpddr4_1d.fw \
|
||||
+ --ddrfw6 fip/lpddr4_2d.fw \
|
||||
+ --ddrfw7 fip/diag_lpddr4.fw \
|
||||
+ --ddrfw8 fip/aml_ddr.fw \
|
||||
+ --level v3
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ DEV=/dev/your_sd_device
|
||||
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
diff --git a/doc/board/amlogic/beelink-gtkingpro.rst b/doc/board/amlogic/beelink-gtkingpro.rst
|
||||
new file mode 100644
|
||||
index 0000000000..d750351361
|
||||
--- /dev/null
|
||||
+++ b/doc/board/amlogic/beelink-gtkingpro.rst
|
||||
@@ -0,0 +1,116 @@
|
||||
+.. SPDX-License-Identifier: GPL-2.0+
|
||||
+
|
||||
+U-Boot for Beelink GT-King Pro
|
||||
+==============================
|
||||
+
|
||||
+The Shenzen AZW (Beelink) GT-King Pro is based on the Amlogic W400 reference
|
||||
+board with an S922X-H chip.
|
||||
+
|
||||
+- 4GB LPDDR4 RAM
|
||||
+- 64GB eMMC storage
|
||||
+- 10/100/1000 Base-T Ethernet
|
||||
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
|
||||
+- HDMI 2.1 video
|
||||
+- Analogue audio output
|
||||
+- 1x RS232 port
|
||||
+- 2x USB 2.0 port
|
||||
+- 2x USB 3.0 ports
|
||||
+- IR receiver
|
||||
+- 1x SD card slot
|
||||
+- 1x Power on/off button
|
||||
+
|
||||
+Beelink do not provide public schematics, but have been willing
|
||||
+to share them with known distro developers on request.
|
||||
+
|
||||
+U-Boot compilation
|
||||
+------------------
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ $ make beelink-gtkingpro_defconfig
|
||||
+ $ make
|
||||
+
|
||||
+Image creation
|
||||
+--------------
|
||||
+
|
||||
+Amlogic does not provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image. Beelink have provided the Amlogic "SDK"
|
||||
+in their forums, but the u-boot sources included result in 2GB RAM being
|
||||
+detected. The following FIPs were generated with newer private sources
|
||||
+and give correct (4GB) RAM detection:
|
||||
+
|
||||
+https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x
|
||||
+
|
||||
+NB: Beelink use a common board config for GT-King, GT-King Pro and the
|
||||
+GS-King-X model, hence the "beelink-s922x" name.
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
|
||||
+ $ unzip master.zip
|
||||
+ $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x
|
||||
+
|
||||
+Go back to the mainline U-Boot source tree then:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ mkdir fip
|
||||
+ $ cp $FIPDIR/* fip/
|
||||
+ $ cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ $ sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ $ sh fip/blx_fix.sh \
|
||||
+ fip/bl2.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/acs.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
|
||||
+ --output fip/bl30_new.bin.g12a.enc \
|
||||
+ --level v3
|
||||
+ $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
|
||||
+ --output fip/bl30_new.bin.enc \
|
||||
+ --level v3 --type bl30
|
||||
+ $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
|
||||
+ --output fip/bl31.img.enc \
|
||||
+ --level v3 --type bl31
|
||||
+ $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
|
||||
+ --output fip/bl33.bin.enc \
|
||||
+ --level v3 --type bl33
|
||||
+ $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
|
||||
+ --output fip/bl2.n.bin.sig
|
||||
+ $ fip/aml_encrypt_g12b --bootmk \
|
||||
+ --output fip/u-boot.bin \
|
||||
+ --bl2 fip/bl2.n.bin.sig \
|
||||
+ --bl30 fip/bl30_new.bin.enc \
|
||||
+ --bl31 fip/bl31.img.enc \
|
||||
+ --bl33 fip/bl33.bin.enc \
|
||||
+ --ddrfw1 fip/ddr4_1d.fw \
|
||||
+ --ddrfw2 fip/ddr4_2d.fw \
|
||||
+ --ddrfw3 fip/ddr3_1d.fw \
|
||||
+ --ddrfw4 fip/piei.fw \
|
||||
+ --ddrfw5 fip/lpddr4_1d.fw \
|
||||
+ --ddrfw6 fip/lpddr4_2d.fw \
|
||||
+ --ddrfw7 fip/diag_lpddr4.fw \
|
||||
+ --ddrfw8 fip/aml_ddr.fw \
|
||||
+ --level v3
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ DEV=/dev/your_sd_device
|
||||
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
|
||||
index 82ad7a2f1a..d4148b1a1e 100644
|
||||
--- a/doc/board/amlogic/index.rst
|
||||
+++ b/doc/board/amlogic/index.rst
|
||||
@@ -10,66 +10,66 @@ An up-do-date matrix is also available on: http://linux-meson.com
|
||||
|
||||
This matrix concerns the actual source code version.
|
||||
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 |
|
||||
-| | | S805X | S905D | | S905D2 | A311D | S905D3 |
|
||||
-| | | | | | S905Y2 | | |
|
||||
-+===============================+===========+==============+==============+============+============+=============+==============+
|
||||
-| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
|
||||
-| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
|
||||
-| | P200 | LibreTech-CC | WeTek Core2 | | | | Odroid-C4 |
|
||||
-| | P201 | LibreTech-AC | | | | | |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Infrared Decoder | No | No | No | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Fuse access | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| SPI (CC) | No | No | No | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| NAND | No | No | No | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| CEC | No | No | No | *N/A* | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| Thermal Sensor | No | No | No | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| LCD/LVDS Output | No | *N/A* | No | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
-| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
-+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 |
|
||||
+| | | S805X | S905D | | S905D2 | A311D | S905D3 |
|
||||
+| | | | | | S905Y2 | | |
|
||||
++===============================+===========+=================+==============+============+============+=============+==============+
|
||||
+| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
|
||||
+| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
|
||||
+| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
|
||||
+| | P201 | LibreTech-AC v2 | | | | | |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Infrared Decoder | No | No | No | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| SPI (CC) | No | No | No | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| NAND | No | No | No | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| CEC | No | No | No | *N/A* | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| Thermal Sensor | No | No | No | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| LCD/LVDS Output | No | *N/A* | No | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
+| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
++-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
|
||||
Board Documentation
|
||||
-------------------
|
||||
@@ -77,6 +77,8 @@ Board Documentation
|
||||
.. toctree::
|
||||
:maxdepth: 1
|
||||
|
||||
+ beelink-gtking
|
||||
+ beelink-gtkingpro
|
||||
khadas-vim2
|
||||
khadas-vim3l
|
||||
khadas-vim3
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,28 +0,0 @@
|
||||
From 7b1b86f67f42bc79017fab0798b3fa5f98135ea4 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 18 Dec 2020 14:15:14 +0000
|
||||
Subject: [PATCH 15/21] ARM: dts: meson: switch TFLASH_VDD_EN pin to open drain
|
||||
on Odroid-N2
|
||||
|
||||
Experimental copying the fix from C4.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi b/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi
|
||||
index 236f2468dc..acb9b13aac 100644
|
||||
--- a/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/meson-g12b-odroid-n2-u-boot.dtsi
|
||||
@@ -5,3 +5,7 @@
|
||||
*/
|
||||
|
||||
#include "meson-g12-common-u-boot.dtsi"
|
||||
+
|
||||
+&tflash_vdd {
|
||||
+ gpio = <&gpio_ao GPIOAO_8 GPIO_OPEN_DRAIN>;
|
||||
+};
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,456 +0,0 @@
|
||||
From a53bdf37555976897766f21003c9fb63b3e01ba3 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 16 Nov 2020 19:02:20 +0000
|
||||
Subject: [PATCH 16/21] ARM: dts: import WeTek Hub/Play2 DTs from Linux 5.10
|
||||
|
||||
Import the WeTek dtsi and Hub/Play2 device-trees from Linux 5.10.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/Makefile | 2 +
|
||||
arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 +
|
||||
arch/arm/dts/meson-gxbb-wetek-hub.dts | 23 ++
|
||||
.../dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 +
|
||||
arch/arm/dts/meson-gxbb-wetek-play2.dts | 65 ++++
|
||||
arch/arm/dts/meson-gxbb-wetek.dtsi | 286 ++++++++++++++++++
|
||||
6 files changed, 390 insertions(+)
|
||||
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts
|
||||
create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
|
||||
create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts
|
||||
create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
|
||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
||||
index 5756f47a3f..18e5b4b8dd 100644
|
||||
--- a/arch/arm/dts/Makefile
|
||||
+++ b/arch/arm/dts/Makefile
|
||||
@@ -158,6 +158,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
|
||||
meson-gxbb-nanopi-k2.dtb \
|
||||
meson-gxbb-p200.dtb \
|
||||
meson-gxbb-p201.dtb \
|
||||
+ meson-gxbb-wetek-hub.dtb \
|
||||
+ meson-gxbb-wetek-play2.dtb \
|
||||
meson-gxl-s905x-p212.dtb \
|
||||
meson-gxl-s805x-libretech-ac.dtb \
|
||||
meson-gxl-s905x-libretech-cc.dtb \
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..c35158d7e9
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
@@ -0,0 +1,7 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-gx-u-boot.dtsi"
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts b/arch/arm/dts/meson-gxbb-wetek-hub.dts
|
||||
new file mode 100644
|
||||
index 0000000000..781414ccac
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek-hub.dts
|
||||
@@ -0,0 +1,23 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 BayLibre, Inc.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxbb-wetek.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "wetek,hub", "amlogic,meson-gxbb";
|
||||
+ model = "WeTek Hub";
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ linux,rc-map-name = "rc-wetek-hub";
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..c35158d7e9
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
|
||||
@@ -0,0 +1,7 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-gx-u-boot.dtsi"
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts b/arch/arm/dts/meson-gxbb-wetek-play2.dts
|
||||
new file mode 100644
|
||||
index 0000000000..8a55c203d9
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek-play2.dts
|
||||
@@ -0,0 +1,65 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 BayLibre, Inc.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "meson-gxbb-wetek.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "wetek,play2", "amlogic,meson-gxbb";
|
||||
+ model = "WeTek Play 2";
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x80000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ led-wifi {
|
||||
+ label = "wetek-play:wifi-status";
|
||||
+ gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+
|
||||
+ led-ethernet {
|
||||
+ label = "wetek-play:ethernet-status";
|
||||
+ gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "off";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys-polled {
|
||||
+ compatible = "gpio-keys-polled";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ poll-interval = <100>;
|
||||
+
|
||||
+ button@0 {
|
||||
+ label = "reset";
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&i2c_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb1_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ linux,rc-map-name = "rc-wetek-play2";
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..ad812854a1
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
@@ -0,0 +1,286 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2016 Andreas Färber
|
||||
+ * Copyright (c) 2016 BayLibre, Inc.
|
||||
+ * Author: Kevin Hilman <khilman@kernel.org>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-gxbb.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ aliases {
|
||||
+ serial0 = &uart_AO;
|
||||
+ ethernet0 = ðmac;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial0:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@0 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x0 0x0 0x0 0x40000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led-system {
|
||||
+ label = "wetek-play:system-status";
|
||||
+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
|
||||
+ default-state = "on";
|
||||
+ panic-indicator;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb_pwr: regulator-usb-pwrs {
|
||||
+ compatible = "regulator-fixed";
|
||||
+
|
||||
+ regulator-name = "USB_PWR";
|
||||
+
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ vddio_boot: regulator-vddio_boot {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_BOOT";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vddao_3v3: regulator-vddao_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDAO_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ vddio_ao18: regulator-vddio_ao18 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VDDIO_AO18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-vcc_3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "VCC_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
+
|
||||
+ emmc_pwrseq: emmc-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-emmc";
|
||||
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ wifi32k: wifi32k {
|
||||
+ compatible = "pwm-clock";
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
+ clocks = <&wifi32k>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ };
|
||||
+
|
||||
+ cvbs-connector {
|
||||
+ compatible = "composite-video-connector";
|
||||
+
|
||||
+ port {
|
||||
+ cvbs_connector_in: endpoint {
|
||||
+ remote-endpoint = <&cvbs_vdac_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ hdmi-connector {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_connector_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_tx_tmds_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cec_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&ao_cec_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-phandle = <&hdmi_tx>;
|
||||
+};
|
||||
+
|
||||
+&cvbs_vdac_port {
|
||||
+ cvbs_vdac_out: endpoint {
|
||||
+ remote-endpoint = <&cvbs_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+ðmac {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <ð_rgmii_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ phy-handle = <ð_phy0>;
|
||||
+ phy-mode = "rgmii";
|
||||
+
|
||||
+ amlogic,tx-delay-ns = <2>;
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ eth_phy0: ethernet-phy@0 {
|
||||
+ /* Realtek RTL8211F (0x001cc916) */
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <30000>;
|
||||
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio_intc>;
|
||||
+ /* MAC_INTR on GPIOZ_15 */
|
||||
+ interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&pwm_ef {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
+ clock-names = "clkin0";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ status = "okay";
|
||||
+ vref-supply = <&vddio_ao18>;
|
||||
+};
|
||||
+
|
||||
+/* Wireless SDIO Module */
|
||||
+&sd_emmc_a {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdio_pins>;
|
||||
+ pinctrl-1 = <&sdio_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ /* WiFi firmware requires power to be kept while in suspend */
|
||||
+ keep-power-in-suspend;
|
||||
+
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ vmmc-supply = <&vddao_3v3>;
|
||||
+ vqmmc-supply = <&vcc_3v3>;
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ disable-wp;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vddio_boot>;
|
||||
+};
|
||||
+
|
||||
+/* This is connected to the Bluetooth module: */
|
||||
+&uart_A {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* This UART is brought out to the DB9 connector */
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb0_phy {
|
||||
+ status = "okay";
|
||||
+ phy-supply = <&usb_pwr>;
|
||||
+};
|
||||
+
|
||||
+&usb0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,35 +0,0 @@
|
||||
From 917ebcd4f6fc93fdfe4d08b51c39c50ef00c2b71 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 29 Dec 2020 06:45:02 +0000
|
||||
Subject: [PATCH 17/21] ARM: dts: backport gpio binding and ethernet assert
|
||||
timing fixes for meson-gxbb-wetek.dtsi
|
||||
|
||||
These changes are not in the Linux 5.10 device tree files.
|
||||
---
|
||||
arch/arm/dts/meson-gxbb-wetek.dtsi | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
index ad812854a1..10a4320885 100644
|
||||
--- a/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
@@ -6,6 +6,7 @@
|
||||
*/
|
||||
|
||||
#include "meson-gxbb.dtsi"
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
@@ -147,7 +148,7 @@
|
||||
reg = <0>;
|
||||
|
||||
reset-assert-us = <10000>;
|
||||
- reset-deassert-us = <30000>;
|
||||
+ reset-deassert-us = <80000>;
|
||||
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
|
||||
|
||||
interrupt-parent = <&gpio_intc>;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,275 +0,0 @@
|
||||
From b3b5e711f8408ceef812201cd956025be2ab4542 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 18 Dec 2020 11:13:38 +0000
|
||||
Subject: [PATCH 18/21] boards: amlogic: update documentation for WeTek
|
||||
Hub/Play2
|
||||
|
||||
Update the device matrix and add build instructions.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
board/amlogic/p200/MAINTAINERS | 5 +-
|
||||
doc/board/amlogic/index.rst | 6 +-
|
||||
doc/board/amlogic/wetek-hub.rst | 101 +++++++++++++++++++++++++++++
|
||||
doc/board/amlogic/wetek-play2.rst | 103 ++++++++++++++++++++++++++++++
|
||||
4 files changed, 213 insertions(+), 2 deletions(-)
|
||||
create mode 100644 doc/board/amlogic/wetek-hub.rst
|
||||
create mode 100644 doc/board/amlogic/wetek-play2.rst
|
||||
|
||||
diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS
|
||||
index 1df9b8b24b..f74d3cc4a4 100644
|
||||
--- a/board/amlogic/p200/MAINTAINERS
|
||||
+++ b/board/amlogic/p200/MAINTAINERS
|
||||
@@ -6,7 +6,10 @@ L: u-boot-amlogic@groups.io
|
||||
F: board/amlogic/p200/
|
||||
F: configs/nanopi-k2_defconfig
|
||||
F: configs/odroid-c2_defconfig
|
||||
-F: configs/p200_defconfig
|
||||
+F: configs/wetek-hub_defconfig
|
||||
+F: configs/wetek-play2_defconfig
|
||||
F: doc/board/amlogic/p200.rst
|
||||
F: doc/board/amlogic/nanopi-k2.rst
|
||||
F: doc/board/amlogic/odroid-c2.rst
|
||||
+F: doc/board/amlogic/wetek-hub.rst
|
||||
+F: doc/board/amlogic/wetek-play2.rst
|
||||
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
|
||||
index d4148b1a1e..2adfa6d65b 100644
|
||||
--- a/doc/board/amlogic/index.rst
|
||||
+++ b/doc/board/amlogic/index.rst
|
||||
@@ -19,6 +19,8 @@ This matrix concerns the actual source code version.
|
||||
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
|
||||
| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 |
|
||||
| | P201 | LibreTech-AC v2 | | | | | |
|
||||
+| | WeTek Hub | | | | | | |
|
||||
+| | WeTek Play2| | | | | | |
|
||||
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
|
||||
+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+
|
||||
@@ -97,5 +99,7 @@ Board Documentation
|
||||
sei510
|
||||
sei610
|
||||
u200
|
||||
- w400
|
||||
wetek-core2
|
||||
+ wetek-hub
|
||||
+ wetek-play2
|
||||
+ w400
|
||||
diff --git a/doc/board/amlogic/wetek-hub.rst b/doc/board/amlogic/wetek-hub.rst
|
||||
new file mode 100644
|
||||
index 0000000000..982dfc0650
|
||||
--- /dev/null
|
||||
+++ b/doc/board/amlogic/wetek-hub.rst
|
||||
@@ -0,0 +1,101 @@
|
||||
+U-Boot for WeTek Hub
|
||||
+====================
|
||||
+
|
||||
+WeTek Hub is an Android/Linux STB with the following specifications:
|
||||
+
|
||||
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
|
||||
+ - ARM Mali 450 GPU
|
||||
+ - 1GB DDR3 SDRAM
|
||||
+ - Gigabit Ethernet
|
||||
+ - HDMI 2.0 4K/60Hz display
|
||||
+ - 1x USB 2.0
|
||||
+ - eMMC
|
||||
+ - microSD
|
||||
+ - IR receiver
|
||||
+
|
||||
+u-boot compilation
|
||||
+==================
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ export ARCH=arm
|
||||
+ $ export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ $ make wetek-hub_defconfig
|
||||
+ $ make
|
||||
+
|
||||
+Image creation
|
||||
+==============
|
||||
+
|
||||
+Amlogic does not provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image, and WeTek have never publicly released
|
||||
+the u-boot sources. These FIPs were generated from private sources:
|
||||
+
|
||||
+https://github.com/LibreELEC/amlogic-boot-fip/tree/master/wetek-hub
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
|
||||
+ $ unzip master.zip
|
||||
+ $ export FIPDIR=$PWD/amlogic-boot-fip/wetek-hub
|
||||
+
|
||||
+Go back to the mainline U-Boot source tree then:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ mkdir fip
|
||||
+ $ cp $FIPDIR/* fip/
|
||||
+ $ cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ $ sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ $ fip/fip_create \
|
||||
+ --bl30 fip/bl30_new.bin \
|
||||
+ --bl31 fip/bl31.img \
|
||||
+ --bl33 fip/bl33.bin \
|
||||
+ fip/fip.bin
|
||||
+
|
||||
+ $ python fip/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
|
||||
+
|
||||
+ $ fip/blx_fix.sh \
|
||||
+ fip/bl2_acs.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/bl21.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
|
||||
+
|
||||
+ $ fip/aml_encrypt_gxb --bootsig \
|
||||
+ --input fip/boot_new.bin
|
||||
+ --output fip/u-boot.bin
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ DEV=/dev/your_sd_device
|
||||
+ $ dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ $ dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
+
|
||||
+Bootnote
|
||||
+========
|
||||
+
|
||||
+On GXBB devices BL1 checks for BL2 in sector 1 of emmc and sector 512 of
|
||||
+SD and USB media. You can install mainline u-boot to the emmc device, but
|
||||
+you cannot partition the emmc storage with MBR/GUID schemes as these will
|
||||
+overwrite sector 1 breaking BL2. You can still partition and run an OS
|
||||
+from emmc, but the device MUST boot from u-boot on SD card. The Amlogic
|
||||
+u-boot works around this by using a custom partition scheme; MBR with all
|
||||
+data structures offset to avoid sector 1. This limitation was removed in
|
||||
+Amlogic GXL and newer SoCs which additionally check for BL2 in sector 512
|
||||
+on emmc allowing MBR/GUI structures to reside in sector 1 as normal with
|
||||
+BL2 starting from sector 512.
|
||||
diff --git a/doc/board/amlogic/wetek-play2.rst b/doc/board/amlogic/wetek-play2.rst
|
||||
new file mode 100644
|
||||
index 0000000000..b1a58d4419
|
||||
--- /dev/null
|
||||
+++ b/doc/board/amlogic/wetek-play2.rst
|
||||
@@ -0,0 +1,103 @@
|
||||
+U-Boot for WeTek Play2
|
||||
+======================
|
||||
+
|
||||
+WeTek Play2 is an Android/Linux STB with the following specifications:
|
||||
+
|
||||
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
|
||||
+ - ARM Mali 450 GPU
|
||||
+ - 2GB DDR3 SDRAM
|
||||
+ - Gigabit Ethernet
|
||||
+ - HDMI 2.0 4K/60Hz display
|
||||
+ - 2x USB 2.0 Host, 1x USB OTG
|
||||
+ - eMMC, microSD
|
||||
+ - IR receiver
|
||||
+ - S/PDIF optical output
|
||||
+ - DVB-S, DVB-T, or ATSC tuner module
|
||||
+
|
||||
+u-boot compilation
|
||||
+==================
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ export ARCH=arm
|
||||
+ $ export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ $ make wetek-play2_defconfig
|
||||
+ $ make
|
||||
+
|
||||
+Image creation
|
||||
+==============
|
||||
+
|
||||
+Amlogic does not provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image, and WeTek have never publicly released
|
||||
+the u-boot sources. These FIPs were generated from private sources:
|
||||
+
|
||||
+https://github.com/LibreELEC/amlogic-boot-fip/tree/master/wetek-play2
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
|
||||
+ $ unzip master.zip
|
||||
+ $ export FIPDIR=$PWD/amlogic-boot-fip/wetek-play2
|
||||
+
|
||||
+Go back to the mainline U-Boot source tree then:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ mkdir fip
|
||||
+ $ cp $FIPDIR/* fip/
|
||||
+ $ cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ $ sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ $ fip/fip_create \
|
||||
+ --bl30 fip/bl30_new.bin \
|
||||
+ --bl31 fip/bl31.img \
|
||||
+ --bl32 fip/bl32.bin \
|
||||
+ --bl33 fip/bl33.bin \
|
||||
+ fip/fip.bin
|
||||
+
|
||||
+ $ python fip/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
|
||||
+
|
||||
+ $ fip/blx_fix.sh \
|
||||
+ fip/bl2_acs.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/bl21.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
|
||||
+
|
||||
+ $ fip/aml_encrypt_gxb --bootsig \
|
||||
+ --input fip/boot_new.bin
|
||||
+ --output fip/u-boot.bin
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+.. code-block:: bash
|
||||
+
|
||||
+ $ DEV=/dev/your_sd_device
|
||||
+ $ dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ $ dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
+
|
||||
+Bootnote
|
||||
+========
|
||||
+
|
||||
+On GXBB devices BL1 checks for BL2 in sector 1 of emmc and sector 512 of
|
||||
+SD and USB media. You can install mainline u-boot to the emmc device, but
|
||||
+you cannot partition the emmc storage with MBR/GUID schemes as these will
|
||||
+overwrite sector 1 breaking BL2. You can still partition and run an OS
|
||||
+from emmc, but the device MUST boot from u-boot on SD card. The Amlogic
|
||||
+u-boot works around this by using a custom partition scheme; MBR with all
|
||||
+data structures offset to avoid sector 1. This limitation was removed in
|
||||
+Amlogic GXL and newer SoCs which additionally check for BL2 in sector 512
|
||||
+on emmc allowing MBR/GUI structures to reside in sector 1 as normal with
|
||||
+BL2 starting from sector 512.
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,87 +0,0 @@
|
||||
From af8d2d9e6ae2e50b19b9d41979704a0b33efb74b Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 28 Dec 2019 07:45:11 +0000
|
||||
Subject: [PATCH 19/21] boards: amlogic: add WeTek Hub defconfig
|
||||
|
||||
Signed-of-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
configs/wetek-hub_defconfig | 67 +++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 67 insertions(+)
|
||||
create mode 100644 configs/wetek-hub_defconfig
|
||||
|
||||
diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..27daa0d85e
|
||||
--- /dev/null
|
||||
+++ b/configs/wetek-hub_defconfig
|
||||
@@ -0,0 +1,67 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_ENV_SIZE=0x2000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xc81004c0
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" wetek"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_ADC=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_SARADC_MESON=y
|
||||
+CONFIG_DM_I2C=y
|
||||
+CONFIG_SYS_I2C_MESON=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_PHY=y
|
||||
+CONFIG_MESON_GXBB_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_GXBB=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_REGULATOR_GPIO=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_SYSINFO=y
|
||||
+CONFIG_SYSINFO_SMBIOS=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_DWC2=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+# CONFIG_VIDEO_BPP16 is not set
|
||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_SPLASH_SCREEN=y
|
||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
||||
+CONFIG_VIDEO_BMP_RLE8=y
|
||||
+CONFIG_BMP_16BPP=y
|
||||
+CONFIG_BMP_24BPP=y
|
||||
+CONFIG_BMP_32BPP=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,87 +0,0 @@
|
||||
From 9e0867d82f5438d1c1d963782a011d4eb16463c9 Mon Sep 17 00:00:00 2001
|
||||
From: chewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 28 Dec 2019 04:53:49 +0000
|
||||
Subject: [PATCH 20/21] boards: amlogic: add WeTek Play2 defconfig
|
||||
|
||||
Signed-off-by: Christian Hewittt <christianshewitt@gmail.com>
|
||||
---
|
||||
configs/wetek-play2_defconfig | 67 +++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 67 insertions(+)
|
||||
create mode 100644 configs/wetek-play2_defconfig
|
||||
|
||||
diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..204566bb6e
|
||||
--- /dev/null
|
||||
+++ b/configs/wetek-play2_defconfig
|
||||
@@ -0,0 +1,67 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_ENV_SIZE=0x2000
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xc81004c0
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" wetek"
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_ADC=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_SARADC_MESON=y
|
||||
+CONFIG_DM_I2C=y
|
||||
+CONFIG_SYS_I2C_MESON=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_PHY=y
|
||||
+CONFIG_MESON_GXBB_USB_PHY=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_GXBB=y
|
||||
+CONFIG_POWER_DOMAIN=y
|
||||
+CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_REGULATOR_GPIO=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_SYSINFO=y
|
||||
+CONFIG_SYSINFO_SMBIOS=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_DWC2=y
|
||||
+CONFIG_USB_KEYBOARD=y
|
||||
+CONFIG_DM_VIDEO=y
|
||||
+# CONFIG_VIDEO_BPP8 is not set
|
||||
+# CONFIG_VIDEO_BPP16 is not set
|
||||
+CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
+CONFIG_VIDEO_MESON=y
|
||||
+CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
+CONFIG_SPLASH_SCREEN=y
|
||||
+CONFIG_SPLASH_SCREEN_ALIGN=y
|
||||
+CONFIG_VIDEO_BMP_RLE8=y
|
||||
+CONFIG_BMP_16BPP=y
|
||||
+CONFIG_BMP_24BPP=y
|
||||
+CONFIG_BMP_32BPP=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,24 +0,0 @@
|
||||
From 4e721e722d7ae92eaddab3ea1d24439cfbf92d5a Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 7 Jan 2021 05:12:44 +0000
|
||||
Subject: [PATCH 21/21] fixup wetek dtsi
|
||||
|
||||
---
|
||||
arch/arm/dts/meson-gxbb-wetek.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
index 10a4320885..9c2f3c43ee 100644
|
||||
--- a/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek.dtsi
|
||||
@@ -146,6 +146,7 @@
|
||||
eth_phy0: ethernet-phy@0 {
|
||||
/* Realtek RTL8211F (0x001cc916) */
|
||||
reg = <0>;
|
||||
+ eee-broken-1000t;
|
||||
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <80000>;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user