mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
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Merge pull request #10249 from heitbaum/atfuboot
[le12.2] update atf and u-boot
This commit is contained in:
commit
b13605ee0e
@ -2,12 +2,12 @@
|
||||
# Copyright (C) 2018-present Team LibreELEC
|
||||
|
||||
PKG_NAME="atf"
|
||||
PKG_VERSION="2.10.0"
|
||||
PKG_SHA256="696b8e53923aac4474532da7dd681f0bd044b329732facd65aeabea3e61adca9"
|
||||
PKG_VERSION="2.13.0"
|
||||
PKG_SHA256="28bc15daeeed000ecd30819ecc4851bf9ffc2d33e1d4553a71985c17f47a999e"
|
||||
PKG_ARCH="arm aarch64"
|
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PKG_LICENSE="BSD-3c"
|
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PKG_SITE="https://github.com/ARM-software/arm-trusted-firmware"
|
||||
PKG_URL="https://github.com/ARM-software/arm-trusted-firmware/archive/v${PKG_VERSION}.tar.gz"
|
||||
PKG_URL="https://github.com/TrustedFirmware-A/trusted-firmware-a/archive/v${PKG_VERSION}.tar.gz"
|
||||
PKG_DEPENDS_TARGET="toolchain"
|
||||
PKG_LONGDESC="ARM Trusted Firmware is a reference implementation of secure world software, including a Secure Monitor executing at Exception Level 3 and various Arm interface standards."
|
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PKG_TOOLCHAIN="manual"
|
||||
@ -20,10 +20,14 @@ if [ "${ATF_PLATFORM}" = "rk3399" ]; then
|
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fi
|
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|
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make_target() {
|
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# As of atf 2.11.0 - the supported compile for .S is gcc (not as.)
|
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unset AR AS CC CPP CXX LD NM OBJCOPY OBJDUMP STRIP RANLIB
|
||||
unset CPPFLAGS CFLAGS CXXFLAGS LDFLAGS
|
||||
if [ "${ATF_PLATFORM}" = "imx8mq" ]; then
|
||||
CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" LDFLAGS="" CFLAGS="" make PLAT=${ATF_PLATFORM} LOG_LEVEL=0 bl31
|
||||
CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" make PLAT=${ATF_PLATFORM} LOG_LEVEL=0 bl31
|
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else
|
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CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" LDFLAGS="" CFLAGS="" make PLAT=${ATF_PLATFORM} bl31
|
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# as of atf 2.12.0 - sun50i_a64 builds use LTO, include -ffat-lto-objects to support this
|
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CROSS_COMPILE="${TARGET_KERNEL_PREFIX}" CFLAGS="-ffat-lto-objects" make PLAT=${ATF_PLATFORM} bl31
|
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fi
|
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}
|
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|
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|
@ -3,8 +3,8 @@
|
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# Copyright (C) 2017-present Team LibreELEC (https://libreelec.tv)
|
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|
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PKG_NAME="u-boot"
|
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PKG_VERSION="2024.01"
|
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PKG_SHA256="b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3"
|
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PKG_VERSION="2025.04"
|
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PKG_SHA256="439d3bef296effd54130be6a731c5b118be7fddd7fcc663ccbc5fb18294d8718"
|
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PKG_ARCH="arm aarch64"
|
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PKG_LICENSE="GPL"
|
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PKG_SITE="https://www.denx.de/wiki/U-Boot"
|
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|
@ -1,7 +1,7 @@
|
||||
From 470309271de34eb8c24138f1ac15bd37966ed01a Mon Sep 17 00:00:00 2001
|
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From 03db81bb312e8a9503f52779da4b2007bc08954a Mon Sep 17 00:00:00 2001
|
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From: Samuel Holland <samuel@sholland.org>
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Date: Sat, 9 Oct 2021 23:01:05 -0500
|
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Subject: [PATCH 13/13] [DO NOT MERGE] sunxi: psci: Delegate PSCI to SCPI
|
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Subject: [PATCH 12/13] [DO NOT MERGE] sunxi: psci: Delegate PSCI to SCPI
|
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|
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This adds a new PSCI implementation which communicates with SCP firmware
|
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running on the AR100 using the SCPI protocol. This allows it to support
|
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@ -10,53 +10,54 @@ suspend, and multiple reset methods.
|
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|
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Signed-off-by: Samuel Holland <samuel@sholland.org>
|
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---
|
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arch/arm/cpu/armv7/Kconfig | 2 +-
|
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arch/arm/cpu/armv7/sunxi/Makefile | 2 +-
|
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arch/arm/cpu/armv7/sunxi/psci-scpi.c | 451 +++++++++++++++++++++++++++
|
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3 files changed, 453 insertions(+), 2 deletions(-)
|
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arch/arm/cpu/armv7/Kconfig | 1 +
|
||||
arch/arm/cpu/armv7/sunxi/Makefile | 4 +
|
||||
arch/arm/cpu/armv7/sunxi/psci-scpi.c | 453 +++++++++++++++++++++++++++
|
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3 files changed, 468 insertions(+)
|
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create mode 100644 arch/arm/cpu/armv7/sunxi/psci-scpi.c
|
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|
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diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
|
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index 06b477619334..948f4e8276fe 100644
|
||||
index ec3d31e750..9dccc12253 100644
|
||||
--- a/arch/arm/cpu/armv7/Kconfig
|
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+++ b/arch/arm/cpu/armv7/Kconfig
|
||||
@@ -44,7 +44,7 @@ config ARMV7_PSCI
|
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@@ -86,6 +86,7 @@ config ARMV7_PSCI
|
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choice
|
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prompt "Supported PSCI version"
|
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depends on ARMV7_PSCI
|
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- default ARMV7_PSCI_0_1 if ARCH_SUNXI
|
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+ default ARMV7_PSCI_1_1 if ARCH_SUNXI
|
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+ default ARMV7_PSCI_1_1 if MACH_SUN8I_H3
|
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default ARMV7_PSCI_0_1 if ARCH_SUNXI
|
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default ARMV7_PSCI_1_0
|
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help
|
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Select the supported PSCI version.
|
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diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
|
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index 1d40d6a18dca..4a0c16deb459 100644
|
||||
index 3e975b366c..6473b9acbd 100644
|
||||
--- a/arch/arm/cpu/armv7/sunxi/Makefile
|
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+++ b/arch/arm/cpu/armv7/sunxi/Makefile
|
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@@ -11,7 +11,7 @@ obj-$(CONFIG_MACH_SUN6I) += tzpc.o
|
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obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o
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@@ -13,8 +13,12 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o
|
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obj-$(CONFIG_MACH_SUN8I) += sram.o
|
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|
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ifndef CONFIG_SPL_BUILD
|
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-obj-$(CONFIG_ARMV7_PSCI) += psci.o
|
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ifndef CONFIG_XPL_BUILD
|
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+ifdef CONFIG_MACH_SUN8I_H3
|
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+obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o
|
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+else
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obj-$(CONFIG_ARMV7_PSCI) += psci.o
|
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endif
|
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+endif
|
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|
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ifdef CONFIG_SPL_BUILD
|
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ifdef CONFIG_XPL_BUILD
|
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obj-y += fel_utils.o
|
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diff --git a/arch/arm/cpu/armv7/sunxi/psci-scpi.c b/arch/arm/cpu/armv7/sunxi/psci-scpi.c
|
||||
new file mode 100644
|
||||
index 000000000000..b3849b366e31
|
||||
index 0000000000..fea51eb456
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/cpu/armv7/sunxi/psci-scpi.c
|
||||
@@ -0,0 +1,451 @@
|
||||
@@ -0,0 +1,453 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
|
||||
+ * Copyright (C) 2018-2021 Samuel Holland <samuel@sholland.org>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <asm/arch/cpu.h>
|
||||
+#include <asm/arch/cpucfg.h>
|
||||
+#include <asm/armv7.h>
|
||||
+#include <asm/gic.h>
|
||||
+#include <asm/io.h>
|
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@ -67,6 +68,19 @@ index 000000000000..b3849b366e31
|
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+#define GICD_BASE (SUNXI_GIC400_BASE + GIC_DIST_OFFSET)
|
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+#define GICC_BASE (SUNXI_GIC400_BASE + GIC_CPU_OFFSET_A15)
|
||||
+
|
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+/*
|
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+ * Offsets into the CPUCFG block applicable to most SUNXIs.
|
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+ */
|
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+#define SUNXI_CPU_RST(cpu) (0x40 + (cpu) * 0x40 + 0x0)
|
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+#define SUNXI_CPU_STATUS(cpu) (0x40 + (cpu) * 0x40 + 0x8)
|
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+#define SUNXI_GEN_CTRL (0x184)
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+#define SUNXI_SUPER_STANDY_FLAG (0x1a0)
|
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+#define SUNXI_PRIV0 (0x1a4)
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+#define SUNXI_PRIV1 (0x1a8)
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+#define SUN7I_CPU1_PWR_CLAMP (0x1b0)
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+#define SUN7I_CPU1_PWROFF (0x1b4)
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+#define SUNXI_DBG_CTRL1 (0x1e4)
|
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+
|
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+#define HW_ON 0
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+#define HW_OFF 1
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+#define HW_STANDBY 2
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@ -158,15 +172,6 @@ index 000000000000..b3849b366e31
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+
|
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+static u32 __secure_data lock;
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+
|
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+static inline u32 __secure read_mpidr(void)
|
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+{
|
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+ u32 val;
|
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+
|
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+ asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (val));
|
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+
|
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+ return val;
|
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+}
|
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+
|
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+static void __secure scpi_begin_command(void)
|
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+{
|
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+ u32 mpidr = read_mpidr();
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@ -446,14 +451,14 @@ index 000000000000..b3849b366e31
|
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+ struct sunxi_cpucfg_reg *cpucfg =
|
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+ (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
|
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+
|
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+ writel((u32)entry, &cpucfg->priv0);
|
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+ writel((u32)entry, SUNXI_CPUCFG_BASE + SUNXI_PRIV0);
|
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+
|
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+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3)) {
|
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+ /* Redirect CPU 0 to the secure monitor via the resume shim. */
|
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+ writel(0x16aaefe8, &cpucfg->super_standy_flag);
|
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+ writel(0xaa16efe8, &cpucfg->super_standy_flag);
|
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+ writel(SUNXI_RESUME_BASE, &cpucfg->priv1);
|
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+ }
|
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+#ifdef CONFIG_MACH_SUN8I_H3
|
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+ /* Redirect CPU 0 to the secure monitor via the resume shim. */
|
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+ writel(0x16aaefe8, SUNXI_CPUCFG_BASE + SUNXI_SUPER_STANDY_FLAG);
|
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+ writel(0xaa16efe8, SUNXI_CPUCFG_BASE + SUNXI_SUPER_STANDY_FLAG);
|
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+ writel(CONFIG_SUNXI_RESUME_BASE, SUNXI_CPUCFG_BASE + SUNXI_PRIV1);
|
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+#endif
|
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+}
|
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+#endif
|
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+
|
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@ -500,5 +505,5 @@ index 000000000000..b3849b366e31
|
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+ writel(0xff, GICC_BASE + GICC_PMR);
|
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+}
|
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--
|
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2.33.0
|
||||
2.34.1
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
From f15f4f36e023aaaeacdbebe16736119d1be3ac6b Mon Sep 17 00:00:00 2001
|
||||
From e814c64fcbd08fb588b7e52b7e968ed9feb2d747 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sat, 9 Oct 2021 17:12:57 -0500
|
||||
Subject: [PATCH 07/13] sunxi: psci: Add support for H3 CPU 0 hotplug
|
||||
Subject: [PATCH 06/13] sunxi: psci: Add support for H3 CPU 0 hotplug
|
||||
|
||||
Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
|
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written, resuming CPU 0 requires using the "Super Standby" code path in
|
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@ -21,17 +21,17 @@ PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
Makefile | 17 +++++++++++++++++
|
||||
arch/arm/cpu/armv7/sunxi/psci.c | 31 +++++++++++++++++++++++++++++++
|
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arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++++++-
|
||||
include/configs/sun8i.h | 4 ++++
|
||||
4 files changed, 74 insertions(+), 1 deletion(-)
|
||||
arch/arm/cpu/armv7/sunxi/psci.c | 32 ++++++++++++++++++++++++++++++++
|
||||
arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++++---
|
||||
arch/arm/mach-sunxi/Kconfig | 7 +++++++
|
||||
4 files changed, 76 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/Makefile b/Makefile
|
||||
index f911f7034430..9edcadfa9c47 100644
|
||||
index 8a04dfcf36..670c87c2ff 100644
|
||||
--- a/Makefile
|
||||
+++ b/Makefile
|
||||
@@ -984,6 +984,23 @@ endif
|
||||
endif
|
||||
@@ -1024,6 +1024,23 @@ ifeq ($(CONFIG_ARCH_ROCKCHIP)_$(CONFIG_SPL_FRAMEWORK),y_)
|
||||
INPUTS-y += u-boot.img
|
||||
endif
|
||||
|
||||
+ifeq ($(CONFIG_MACH_SUN8I_H3)$(CONFIG_ARMV7_PSCI),yy)
|
||||
@ -55,7 +55,7 @@ index f911f7034430..9edcadfa9c47 100644
|
||||
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
|
||||
$(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin)
|
||||
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
|
||||
index 3448fe2edcaa..299bd3ba65e0 100644
|
||||
index 098e2b12bf..d76266d9c2 100644
|
||||
--- a/arch/arm/cpu/armv7/sunxi/psci.c
|
||||
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
|
||||
@@ -10,6 +10,7 @@
|
||||
@ -64,38 +64,45 @@ index 3448fe2edcaa..299bd3ba65e0 100644
|
||||
|
||||
+#include <asm/arch/clock.h>
|
||||
#include <asm/arch/cpu.h>
|
||||
#include <asm/arch/cpucfg.h>
|
||||
#include <asm/arch/prcm.h>
|
||||
@@ -141,6 +142,13 @@ static void __secure sunxi_set_entry_address(void *entry)
|
||||
(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
|
||||
|
||||
writel((u32)entry, &cpucfg->priv0);
|
||||
#include <asm/armv7.h>
|
||||
#include <asm/gic.h>
|
||||
@@ -31,7 +32,9 @@
|
||||
#define SUNXI_CPU_RST(cpu) (0x40 + (cpu) * 0x40 + 0x0)
|
||||
#define SUNXI_CPU_STATUS(cpu) (0x40 + (cpu) * 0x40 + 0x8)
|
||||
#define SUNXI_GEN_CTRL (0x184)
|
||||
+#define SUNXI_SUPER_STANDBY_FLAG (0x1a0)
|
||||
#define SUNXI_PRIV0 (0x1a4)
|
||||
+#define SUNXI_PRIV1 (0x1a8)
|
||||
#define SUN7I_CPU1_PWR_CLAMP (0x1b0)
|
||||
#define SUN7I_CPU1_PWROFF (0x1b4)
|
||||
#define SUNXI_DBG_CTRL1 (0x1e4)
|
||||
@@ -139,6 +142,13 @@ static void __secure sunxi_cpu_set_entry(int __always_unused cpu, void *entry)
|
||||
} else {
|
||||
writel((u32)entry, SUNXI_CPUCFG_BASE + SUNXI_PRIV0);
|
||||
}
|
||||
+
|
||||
+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3)) {
|
||||
+ if (CONFIG_SUNXI_RESUME_BASE) {
|
||||
+ /* Redirect CPU 0 to the secure monitor via the resume shim. */
|
||||
+ writel(0x16aaefe8, &cpucfg->super_standy_flag);
|
||||
+ writel(0xaa16efe8, &cpucfg->super_standy_flag);
|
||||
+ writel(SUNXI_RESUME_BASE, &cpucfg->priv1);
|
||||
+ writel(0x16aaefe8, SUNXI_R_CPUCFG_BASE + SUNXI_SUPER_STANDBY_FLAG);
|
||||
+ writel(0xaa16efe8, SUNXI_R_CPUCFG_BASE + SUNXI_SUPER_STANDBY_FLAG);
|
||||
+ writel(CONFIG_SUNXI_RESUME_BASE, SUNXI_R_CPUCFG_BASE + SUNXI_PRIV1);
|
||||
+ }
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -255,9 +263,12 @@ out:
|
||||
static void __secure sunxi_cpu_set_power(int cpu, bool on)
|
||||
@@ -307,7 +317,9 @@ out:
|
||||
int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc,
|
||||
u32 context_id)
|
||||
{
|
||||
+ struct sunxi_ccm_reg *ccu = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
|
||||
struct sunxi_cpucfg_reg *cpucfg =
|
||||
(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
|
||||
u32 cpu = (mpidr & 0x3);
|
||||
+ u32 cpu_clk;
|
||||
+ u32 bus_clk;
|
||||
+ u32 bus_clk, cpu_clk;
|
||||
|
||||
/* store target PC and context id */
|
||||
psci_save(cpu, pc, context_id);
|
||||
@@ -274,12 +285,32 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc,
|
||||
@@ -324,12 +336,32 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc,
|
||||
/* Lock CPU (Disable external debug access) */
|
||||
clrbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu));
|
||||
sunxi_cpu_set_locking(cpu, true);
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) {
|
||||
+ /* Save registers that will be clobbered by the BROM. */
|
||||
@ -110,7 +117,7 @@ index 3448fe2edcaa..299bd3ba65e0 100644
|
||||
sunxi_cpu_set_power(cpu, true);
|
||||
|
||||
/* De-assert reset on target CPU */
|
||||
writel(BIT(1) | BIT(0), &cpucfg->cpu[cpu].rst);
|
||||
sunxi_cpu_set_reset(cpu, false);
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) {
|
||||
+ /* Spin until the BROM has clobbered the clock registers. */
|
||||
@ -123,37 +130,24 @@ index 3448fe2edcaa..299bd3ba65e0 100644
|
||||
+ clrbits_le32(&ccu->pll6_cfg, BIT(25));
|
||||
+ }
|
||||
+
|
||||
/* Unlock CPU (Disable external debug access) */
|
||||
setbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu));
|
||||
/* Unlock CPU (Reenable external debug access) */
|
||||
sunxi_cpu_set_locking(cpu, false);
|
||||
|
||||
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
index ad1f97632979..a2c74da81aa9 100644
|
||||
index ed1cb91eeb..8c6d36d4ac 100644
|
||||
--- a/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
@@ -6,7 +6,11 @@
|
||||
#define ARCH "arm"
|
||||
#endif
|
||||
|
||||
-#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5)
|
||||
+#if defined(CONFIG_MACH_SUN8I_H3)
|
||||
+#ifdef CONFIG_ARMV7_PSCI
|
||||
+#define RESUME_ADDR SUNXI_RESUME_BASE
|
||||
+#endif
|
||||
+#elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5)
|
||||
#define BL31_ADDR 0x00044000
|
||||
#define SCP_ADDR 0x00050000
|
||||
#elif defined(CONFIG_MACH_SUN50I_H6)
|
||||
@@ -74,6 +78,20 @@
|
||||
@@ -77,6 +77,20 @@
|
||||
};
|
||||
#endif
|
||||
|
||||
+#ifdef RESUME_ADDR
|
||||
+#if CONFIG_SUNXI_RESUME_BASE
|
||||
+ resume {
|
||||
+ description = "Super Standby resume image";
|
||||
+ type = "standalone";
|
||||
+ arch = ARCH;
|
||||
+ compression = "none";
|
||||
+ load = <RESUME_ADDR>;
|
||||
+ load = <CONFIG_SUNXI_RESUME_BASE>;
|
||||
+
|
||||
+ blob-ext {
|
||||
+ filename = "u-boot-resume.img";
|
||||
@ -161,36 +155,46 @@ index ad1f97632979..a2c74da81aa9 100644
|
||||
+ };
|
||||
+#endif
|
||||
+
|
||||
#ifdef SCP_ADDR
|
||||
#if CONFIG_SUNXI_SCP_BASE
|
||||
scp {
|
||||
description = "SCP firmware";
|
||||
@@ -107,6 +125,9 @@
|
||||
@@ -108,12 +122,15 @@
|
||||
firmware = "atf";
|
||||
#else
|
||||
firmware = "uboot";
|
||||
#endif
|
||||
loadables =
|
||||
+#ifdef RESUME_ADDR
|
||||
+#endif
|
||||
+ loadables =
|
||||
+#if CONFIG_SUNXI_RESUME_BASE
|
||||
+ "resume",
|
||||
+#endif
|
||||
#ifdef SCP_ADDR
|
||||
"scp",
|
||||
#endif
|
||||
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
|
||||
index 563635636624..2f0d69bdfce2 100644
|
||||
--- a/include/configs/sunxi-common.h
|
||||
+++ b/include/configs/sunxi-common.h
|
||||
@@ -15,6 +15,12 @@
|
||||
#include <asm/arch/cpu.h>
|
||||
#include <linux/stringify.h>
|
||||
#if CONFIG_SUNXI_SCP_BASE
|
||||
- loadables = "scp", "uboot";
|
||||
-#else
|
||||
- loadables = "uboot";
|
||||
+ "scp",
|
||||
#endif
|
||||
+ "uboot";
|
||||
fdt = "fdt-SEQ";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
|
||||
index b0fbda0aa0..48e750d070 100644
|
||||
--- a/arch/arm/mach-sunxi/Kconfig
|
||||
+++ b/arch/arm/mach-sunxi/Kconfig
|
||||
@@ -164,6 +164,13 @@ config SUNXI_BL31_BASE
|
||||
help
|
||||
Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
|
||||
|
||||
+#ifdef SUNXI_SRAM_A2_SIZE
|
||||
+#define SUNXI_RESUME_BASE (CONFIG_ARMV7_SECURE_BASE + \
|
||||
+ CONFIG_ARMV7_SECURE_MAX_SIZE)
|
||||
+#define SUNXI_RESUME_SIZE 1024
|
||||
+#endif
|
||||
+config SUNXI_RESUME_BASE
|
||||
+ hex
|
||||
+ default 0x00047c00 if MACH_SUN8I_H3
|
||||
+ default 0x0
|
||||
+ help
|
||||
+ Address where the resume shim is loaded, or zero if it is not used.
|
||||
+
|
||||
/* Serial & console */
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
/* ns16550 reg in the low bits of cpu reg */
|
||||
config SUNXI_SCP_BASE
|
||||
hex
|
||||
default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
|
||||
--
|
||||
2.33.0
|
||||
2.34.1
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 92657de6d2ac3ae100a4d78cc37c729142f1a59b Mon Sep 17 00:00:00 2001
|
||||
From 2f330ad98dfb70c245b285d4d2d2a1fe5029fda8 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sat, 17 Apr 2021 13:33:54 -0500
|
||||
Subject: [PATCH 10/13] sunxi: Enable support for SCP firmware on H3
|
||||
Subject: [PATCH 09/13] sunxi: Enable support for SCP firmware on H3
|
||||
|
||||
Now that issues with the BROM have been sorted out, we can implement
|
||||
PSCI system suspend on H3 by delegating to SCP firmware. Let's start by
|
||||
@ -10,28 +10,27 @@ valid firmware is loaded.
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm/dts/sunxi-u-boot.dtsi | 1 +
|
||||
board/sunxi/board.c | 8 ++++++++
|
||||
include/configs/sun8i.h | 3 +++
|
||||
3 files changed, 12 insertions(+)
|
||||
arch/arm/mach-sunxi/Kconfig | 1 +
|
||||
board/sunxi/board.c | 8 ++++++++
|
||||
2 files changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
index a2c74da81aa9..ce062fe94052 100644
|
||||
--- a/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
@@ -9,6 +9,7 @@
|
||||
#if defined(CONFIG_MACH_SUN8I_H3)
|
||||
#ifdef CONFIG_ARMV7_PSCI
|
||||
#define RESUME_ADDR SUNXI_RESUME_BASE
|
||||
+#define SCP_ADDR SUNXI_SCP_BASE
|
||||
#endif
|
||||
#elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5)
|
||||
#define BL31_ADDR 0x00044000
|
||||
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
|
||||
index 48e750d070..a6d5de9e3b 100644
|
||||
--- a/arch/arm/mach-sunxi/Kconfig
|
||||
+++ b/arch/arm/mach-sunxi/Kconfig
|
||||
@@ -173,6 +173,7 @@ config SUNXI_RESUME_BASE
|
||||
|
||||
config SUNXI_SCP_BASE
|
||||
hex
|
||||
+ default 0x00048000 if MACH_SUN8I_H3
|
||||
default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
|
||||
default 0x00114000 if MACH_SUN50I_H6
|
||||
default 0x0
|
||||
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
|
||||
index 2b7d655678d0..a25cd11f1124 100644
|
||||
index 39ecbe988f..b83d21ef08 100644
|
||||
--- a/board/sunxi/board.c
|
||||
+++ b/board/sunxi/board.c
|
||||
@@ -18,6 +18,7 @@
|
||||
@@ -19,6 +19,7 @@
|
||||
#include <init.h>
|
||||
#include <log.h>
|
||||
#include <mmc.h>
|
||||
@ -39,12 +38,12 @@ index 2b7d655678d0..a25cd11f1124 100644
|
||||
#include <axp_pmic.h>
|
||||
#include <generic-phy.h>
|
||||
#include <phy-sun4i-usb.h>
|
||||
@@ -957,6 +958,13 @@ int board_late_init(void)
|
||||
@@ -851,6 +852,13 @@ int board_late_init(void)
|
||||
usb_ether_init();
|
||||
#endif
|
||||
|
||||
+#ifdef SUNXI_SCP_BASE
|
||||
+ if (!rproc_load(0, SUNXI_SCP_BASE, SUNXI_SCP_MAX_SIZE)) {
|
||||
+#ifdef CONFIG_REMOTEPROC_SUN6I_AR100
|
||||
+ if (!rproc_load(0, CONFIG_SUNXI_SCP_BASE, 1)) {
|
||||
+ puts("Starting SCP...\n");
|
||||
+ rproc_start(0);
|
||||
+ }
|
||||
@ -53,20 +52,6 @@ index 2b7d655678d0..a25cd11f1124 100644
|
||||
return 0;
|
||||
}
|
||||
|
||||
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
|
||||
index 2f0d69bdfce2..fda5b235a3e0 100644
|
||||
--- a/include/configs/sunxi-common.h
|
||||
+++ b/include/configs/sunxi-common.h
|
||||
@@ -26,6 +26,9 @@
|
||||
#define SUNXI_RESUME_BASE (CONFIG_ARMV7_SECURE_BASE + \
|
||||
CONFIG_ARMV7_SECURE_MAX_SIZE)
|
||||
#define SUNXI_RESUME_SIZE 1024
|
||||
+
|
||||
+#define SUNXI_SCP_BASE (SUNXI_RESUME_BASE + SUNXI_RESUME_SIZE)
|
||||
+#define SUNXI_SCP_MAX_SIZE (16 * 1024)
|
||||
#endif
|
||||
|
||||
/*
|
||||
--
|
||||
2.33.0
|
||||
2.34.1
|
||||
|
||||
|
@ -12,7 +12,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm/cpu/armv7/Kconfig | 1 +
|
||||
arch/arm/cpu/armv7/sunxi/Makefile | 4 +
|
||||
arch/arm/cpu/armv7/sunxi/psci-scpi.c | 463 +++++++++++++++++++++++++++
|
||||
arch/arm/cpu/armv7/sunxi/psci-scpi.c | 453 +++++++++++++++++++++++++++
|
||||
3 files changed, 468 insertions(+)
|
||||
create mode 100644 arch/arm/cpu/armv7/sunxi/psci-scpi.c
|
||||
|
||||
@ -35,7 +35,7 @@ index 3e975b366c..6473b9acbd 100644
|
||||
@@ -13,8 +13,12 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o
|
||||
obj-$(CONFIG_MACH_SUN8I) += sram.o
|
||||
|
||||
ifndef CONFIG_SPL_BUILD
|
||||
ifndef CONFIG_XPL_BUILD
|
||||
+ifdef CONFIG_MACH_SUN8I_H3
|
||||
+obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o
|
||||
+else
|
||||
@ -43,21 +43,20 @@ index 3e975b366c..6473b9acbd 100644
|
||||
endif
|
||||
+endif
|
||||
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
ifdef CONFIG_XPL_BUILD
|
||||
obj-y += fel_utils.o
|
||||
diff --git a/arch/arm/cpu/armv7/sunxi/psci-scpi.c b/arch/arm/cpu/armv7/sunxi/psci-scpi.c
|
||||
new file mode 100644
|
||||
index 0000000000..fea51eb456
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/cpu/armv7/sunxi/psci-scpi.c
|
||||
@@ -0,0 +1,463 @@
|
||||
@@ -0,0 +1,453 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
|
||||
+ * Copyright (C) 2018-2021 Samuel Holland <samuel@sholland.org>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <asm/arch/cpu.h>
|
||||
+#include <asm/armv7.h>
|
||||
+#include <asm/gic.h>
|
||||
@ -173,15 +172,6 @@ index 0000000000..fea51eb456
|
||||
+
|
||||
+static u32 __secure_data lock;
|
||||
+
|
||||
+static inline u32 __secure read_mpidr(void)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (val));
|
||||
+
|
||||
+ return val;
|
||||
+}
|
||||
+
|
||||
+static void __secure scpi_begin_command(void)
|
||||
+{
|
||||
+ u32 mpidr = read_mpidr();
|
||||
|
@ -32,7 +32,7 @@ index 6473b9acbd..033042666f 100644
|
||||
@@ -13,7 +13,7 @@ obj-$(CONFIG_MACH_SUN6I) += sram.o
|
||||
obj-$(CONFIG_MACH_SUN8I) += sram.o
|
||||
|
||||
ifndef CONFIG_SPL_BUILD
|
||||
ifndef CONFIG_XPL_BUILD
|
||||
-ifdef CONFIG_MACH_SUN8I_H3
|
||||
+ifneq ($(CONFIG_MACH_SUN8I_A33)$(CONFIG_MACH_SUN8I_H3),)
|
||||
obj-$(CONFIG_ARMV7_PSCI) += psci-scpi.o
|
||||
|
@ -0,0 +1,157 @@
|
||||
From dec5528de024e8ddd1dafd8461df3a1bdcfc4bad Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sat, 15 Mar 2025 09:57:57 +0100
|
||||
Subject: [PATCH] Revert "arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC
|
||||
connection"
|
||||
|
||||
Hardware that uses I2C wasn't designed with high speeds in mind, so
|
||||
communication with PMIC via RSB can intermittently fail. Go back to I2C
|
||||
as higher speed and efficiency isn't worth the trouble.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm/dts/sun50i-h6-beelink-gs1.dts | 38 +++++++++++++-------------
|
||||
arch/arm/dts/sun50i-h6-orangepi-3.dts | 14 +++++-----
|
||||
arch/arm/dts/sun50i-h6-orangepi.dtsi | 22 +++++++--------
|
||||
3 files changed, 37 insertions(+), 37 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
|
||||
index 529285fc34fd..8359a8ac2a33 100644
|
||||
--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
|
||||
+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
|
||||
@@ -151,28 +151,12 @@
|
||||
vcc-pg-supply = <®_aldo1>;
|
||||
};
|
||||
|
||||
-&r_ir {
|
||||
- linux,rc-map-name = "rc-beelink-gs1";
|
||||
+&r_i2c {
|
||||
status = "okay";
|
||||
-};
|
||||
|
||||
-&r_pio {
|
||||
- /*
|
||||
- * FIXME: We can't add that supply for now since it would
|
||||
- * create a circular dependency between pinctrl, the regulator
|
||||
- * and the RSB Bus.
|
||||
- *
|
||||
- * vcc-pl-supply = <®_aldo1>;
|
||||
- */
|
||||
- vcc-pm-supply = <®_aldo1>;
|
||||
-};
|
||||
-
|
||||
-&r_rsb {
|
||||
- status = "okay";
|
||||
-
|
||||
- axp805: pmic@745 {
|
||||
+ axp805: pmic@36 {
|
||||
compatible = "x-powers,axp805", "x-powers,axp806";
|
||||
- reg = <0x745>;
|
||||
+ reg = <0x36>;
|
||||
interrupt-parent = <&r_intc>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
@@ -290,6 +274,22 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&r_ir {
|
||||
+ linux,rc-map-name = "rc-beelink-gs1";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&r_pio {
|
||||
+ /*
|
||||
+ * PL0 and PL1 are used for PMIC I2C
|
||||
+ * don't enable the pl-supply else
|
||||
+ * it will fail at boot
|
||||
+ *
|
||||
+ * vcc-pl-supply = <®_aldo1>;
|
||||
+ */
|
||||
+ vcc-pm-supply = <®_aldo1>;
|
||||
+};
|
||||
+
|
||||
&spdif {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spdif_tx_pin>;
|
||||
diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts
|
||||
index bdcec466246f..f920f8f0a4dd 100644
|
||||
--- a/arch/arm/dts/sun50i-h6-orangepi-3.dts
|
||||
+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
|
||||
@@ -175,16 +175,12 @@
|
||||
vcc-pg-supply = <®_vcc_wifi_io>;
|
||||
};
|
||||
|
||||
-&r_ir {
|
||||
+&r_i2c {
|
||||
status = "okay";
|
||||
-};
|
||||
|
||||
-&r_rsb {
|
||||
- status = "okay";
|
||||
-
|
||||
- axp805: pmic@745 {
|
||||
+ axp805: pmic@36 {
|
||||
compatible = "x-powers,axp805", "x-powers,axp806";
|
||||
- reg = <0x745>;
|
||||
+ reg = <0x36>;
|
||||
interrupt-parent = <&r_intc>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
@@ -295,6 +291,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&r_ir {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&rtc {
|
||||
clocks = <&ext_osc32k>;
|
||||
};
|
||||
diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi
|
||||
index 4403769fc36e..6846797a8afd 100644
|
||||
--- a/arch/arm/dts/sun50i-h6-orangepi.dtsi
|
||||
+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi
|
||||
@@ -112,20 +112,12 @@
|
||||
vcc-pg-supply = <®_aldo1>;
|
||||
};
|
||||
|
||||
-&r_ir {
|
||||
+&r_i2c {
|
||||
status = "okay";
|
||||
-};
|
||||
|
||||
-&r_pio {
|
||||
- vcc-pm-supply = <®_bldo3>;
|
||||
-};
|
||||
-
|
||||
-&r_rsb {
|
||||
- status = "okay";
|
||||
-
|
||||
- axp805: pmic@745 {
|
||||
+ axp805: pmic@36 {
|
||||
compatible = "x-powers,axp805", "x-powers,axp806";
|
||||
- reg = <0x745>;
|
||||
+ reg = <0x36>;
|
||||
interrupt-parent = <&r_intc>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
@@ -240,6 +232,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&r_ir {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&r_pio {
|
||||
+ vcc-pm-supply = <®_bldo3>;
|
||||
+};
|
||||
+
|
||||
&rtc {
|
||||
clocks = <&ext_osc32k>;
|
||||
};
|
||||
--
|
||||
2.48.1
|
||||
|
@ -1,41 +0,0 @@
|
||||
From 8674b92c48a528ec82a548bb677d0231316f5aa4 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sun, 22 Jan 2023 14:29:17 -0600
|
||||
Subject: [PATCH 01/13] sunxi: spl: Disable padding from SPL_PAD_TO
|
||||
|
||||
Starting with H6, Allwinner removed the artificial 32 KiB SPL size limit
|
||||
from the boot ROM. Now SPL size is only limited by the available SRAM.
|
||||
This limit ranges from 152 KiB on H6 to a whopping 2052 KiB on R329. To
|
||||
take advantage of this additional space, we must increase SPL_MAX_SIZE.
|
||||
Since we do not want to unnecessarily pad SPL out to these giant sizes,
|
||||
we must set SPL_PAD_TO to zero. This causes no problems because binman
|
||||
already takes care of appending the SPL payload at the right offset.
|
||||
|
||||
Commit-changes: 2
|
||||
- New patch for v2
|
||||
|
||||
Cover-changes: 2
|
||||
- Disable padding from SPL_PAD_TO
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
common/spl/Kconfig | 3 +--
|
||||
1 file changed, 1 insertion(+), 2 deletions(-)
|
||||
|
||||
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
|
||||
index 25cd18afda..a0968ff106 100644
|
||||
--- a/common/spl/Kconfig
|
||||
+++ b/common/spl/Kconfig
|
||||
@@ -97,8 +97,7 @@ config SPL_PAD_TO
|
||||
default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
|
||||
default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
|
||||
default 0x10000 if ARCH_KEYSTONE
|
||||
- default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
|
||||
- default 0x0 if ARCH_MTMIPS
|
||||
+ default 0x0 if ARCH_MTMIPS || ARCH_SUNXI
|
||||
default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
|
||||
default SPL_MAX_SIZE
|
||||
help
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,112 +0,0 @@
|
||||
From fa31297e5f79d6eb97aed3cf94326124b308e337 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sun, 22 Jan 2023 11:46:34 -0600
|
||||
Subject: [PATCH 02/13] sunxi: binman: Move BL31 and SCP firmware addresses to
|
||||
Kconfig
|
||||
|
||||
This is easier to read than the #ifdef staircase, provides better
|
||||
visibility into the memory map (alongside the other Kconfig
|
||||
definitions), and allows these addresses to be reused from code.
|
||||
|
||||
Commit-changes: 2
|
||||
- New patch for v2, split from the .dtsi changes
|
||||
|
||||
Reviewed-by: Simon Glass <sjg@chromium.org>
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm/dts/sunxi-u-boot.dtsi | 24 +++++++-----------------
|
||||
arch/arm/mach-sunxi/Kconfig | 17 +++++++++++++++++
|
||||
2 files changed, 24 insertions(+), 17 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
index a0c8abb703..7a8764e463 100644
|
||||
--- a/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
@@ -1,15 +1,5 @@
|
||||
#include <config.h>
|
||||
|
||||
-#ifdef CONFIG_MACH_SUN50I_H6
|
||||
-#define BL31_ADDR 0x104000
|
||||
-#define SCP_ADDR 0x114000
|
||||
-#elif defined(CONFIG_MACH_SUN50I_H616)
|
||||
-#define BL31_ADDR 0x40000000
|
||||
-#else
|
||||
-#define BL31_ADDR 0x44000
|
||||
-#define SCP_ADDR 0x50000
|
||||
-#endif
|
||||
-
|
||||
/ {
|
||||
aliases {
|
||||
mmc0 = &mmc0;
|
||||
@@ -69,8 +59,8 @@
|
||||
os = "arm-trusted-firmware";
|
||||
arch = "arm64";
|
||||
compression = "none";
|
||||
- load = <BL31_ADDR>;
|
||||
- entry = <BL31_ADDR>;
|
||||
+ load = <CONFIG_SUNXI_BL31_BASE>;
|
||||
+ entry = <CONFIG_SUNXI_BL31_BASE>;
|
||||
|
||||
atf-bl31 {
|
||||
filename = "bl31.bin";
|
||||
@@ -78,13 +68,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
-#ifdef SCP_ADDR
|
||||
+#if CONFIG_SUNXI_SCP_BASE
|
||||
scp {
|
||||
description = "SCP firmware";
|
||||
type = "firmware";
|
||||
arch = "or1k";
|
||||
compression = "none";
|
||||
- load = <SCP_ADDR>;
|
||||
+ load = <CONFIG_SUNXI_SCP_BASE>;
|
||||
|
||||
scp {
|
||||
filename = "scp.bin";
|
||||
@@ -106,10 +96,10 @@
|
||||
@config-SEQ {
|
||||
description = "NAME";
|
||||
firmware = "atf";
|
||||
-#ifndef SCP_ADDR
|
||||
- loadables = "uboot";
|
||||
-#else
|
||||
+#if CONFIG_SUNXI_SCP_BASE
|
||||
loadables = "scp", "uboot";
|
||||
+#else
|
||||
+ loadables = "uboot";
|
||||
#endif
|
||||
fdt = "fdt-SEQ";
|
||||
};
|
||||
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
|
||||
index a10e4c06b6..b0fbda0aa0 100644
|
||||
--- a/arch/arm/mach-sunxi/Kconfig
|
||||
+++ b/arch/arm/mach-sunxi/Kconfig
|
||||
@@ -155,6 +155,23 @@ config SUNXI_RVBAR_ALTERNATIVE
|
||||
for all other SoCs, so the content of the SRAM_VER_REG becomes
|
||||
irrelevant there, and we can use the same code.
|
||||
|
||||
+config SUNXI_BL31_BASE
|
||||
+ hex
|
||||
+ default 0x00044000 if MACH_SUN50I || MACH_SUN50I_H5
|
||||
+ default 0x00104000 if MACH_SUN50I_H6
|
||||
+ default 0x40000000 if MACH_SUN50I_H616
|
||||
+ default 0x0
|
||||
+ help
|
||||
+ Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
|
||||
+
|
||||
+config SUNXI_SCP_BASE
|
||||
+ hex
|
||||
+ default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
|
||||
+ default 0x00114000 if MACH_SUN50I_H6
|
||||
+ default 0x0
|
||||
+ help
|
||||
+ Address where SCP firmware is loaded, or zero if it is not used.
|
||||
+
|
||||
config SUNXI_A64_TIMER_ERRATUM
|
||||
bool
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,99 +0,0 @@
|
||||
From 50ec5566a9eb50288c7aca9d85182e152aaf47d9 Mon Sep 17 00:00:00 2001
|
||||
From: Samuel Holland <samuel@sholland.org>
|
||||
Date: Sun, 22 Jan 2023 11:57:42 -0600
|
||||
Subject: [PATCH 03/13] sunxi: binman: Support FIT generation for 32-bit SoCs
|
||||
|
||||
Some 32-bit SoCs can use SCP firmware to implement additional PSCI
|
||||
functionality, such as system suspend. In order to load this firmware
|
||||
from SPL, we need to generate and use a FIT instead of a legacy image.
|
||||
|
||||
Adjust the binman FIT definition so it does not rely on TF-A BL31, as
|
||||
this is not used on 32-bit SoCs. Instead, after loading the firmware,
|
||||
U-Boot proper is executed directly.
|
||||
|
||||
Series-changes: 2
|
||||
- Rely on binman min-size instead of using explicit offsets
|
||||
- Use Kconfig for firmware addresses instead of an #ifdef staircase
|
||||
|
||||
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||||
---
|
||||
arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++-----
|
||||
1 file changed, 18 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
index 7a8764e463..ed1cb91eeb 100644
|
||||
--- a/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
|
||||
@@ -1,5 +1,11 @@
|
||||
#include <config.h>
|
||||
|
||||
+#ifdef CONFIG_ARM64
|
||||
+#define ARCH "arm64"
|
||||
+#else
|
||||
+#define ARCH "arm"
|
||||
+#endif
|
||||
+
|
||||
/ {
|
||||
aliases {
|
||||
mmc0 = &mmc0;
|
||||
@@ -34,30 +40,32 @@
|
||||
filename = "spl/sunxi-spl.bin";
|
||||
};
|
||||
|
||||
-#ifdef CONFIG_ARM64
|
||||
+#ifdef CONFIG_SPL_LOAD_FIT
|
||||
fit {
|
||||
- description = "Configuration to load ATF before U-Boot";
|
||||
+ description = "Configuration to load U-Boot and firmware";
|
||||
#address-cells = <1>;
|
||||
fit,fdt-list = "of-list";
|
||||
|
||||
images {
|
||||
uboot {
|
||||
- description = "U-Boot (64-bit)";
|
||||
+ description = "U-Boot";
|
||||
type = "standalone";
|
||||
os = "u-boot";
|
||||
- arch = "arm64";
|
||||
+ arch = ARCH;
|
||||
compression = "none";
|
||||
load = <CONFIG_TEXT_BASE>;
|
||||
+ entry = <CONFIG_TEXT_BASE>;
|
||||
|
||||
u-boot-nodtb {
|
||||
};
|
||||
};
|
||||
|
||||
+#if CONFIG_SUNXI_BL31_BASE
|
||||
atf {
|
||||
description = "ARM Trusted Firmware";
|
||||
type = "firmware";
|
||||
os = "arm-trusted-firmware";
|
||||
- arch = "arm64";
|
||||
+ arch = ARCH;
|
||||
compression = "none";
|
||||
load = <CONFIG_SUNXI_BL31_BASE>;
|
||||
entry = <CONFIG_SUNXI_BL31_BASE>;
|
||||
@@ -67,6 +75,7 @@
|
||||
missing-msg = "atf-bl31-sunxi";
|
||||
};
|
||||
};
|
||||
+#endif
|
||||
|
||||
#if CONFIG_SUNXI_SCP_BASE
|
||||
scp {
|
||||
@@ -95,7 +104,11 @@
|
||||
|
||||
@config-SEQ {
|
||||
description = "NAME";
|
||||
+#if CONFIG_SUNXI_BL31_BASE
|
||||
firmware = "atf";
|
||||
+#else
|
||||
+ firmware = "uboot";
|
||||
+#endif
|
||||
#if CONFIG_SUNXI_SCP_BASE
|
||||
loadables = "scp", "uboot";
|
||||
#else
|
||||
--
|
||||
2.34.1
|
||||
|
@ -58,20 +58,6 @@ index d812685c98..42781d02f0 100644
|
||||
imply SPL_MMC if MMC
|
||||
imply SPL_POWER
|
||||
imply SPL_SERIAL
|
||||
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
|
||||
index a0968ff106..aebbfbf99d 100644
|
||||
--- a/common/spl/Kconfig
|
||||
+++ b/common/spl/Kconfig
|
||||
@@ -567,8 +567,7 @@ config SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
|
||||
config SPL_FIT_IMAGE_TINY
|
||||
bool "Remove functionality from SPL FIT loading to reduce size"
|
||||
depends on SPL_FIT
|
||||
- default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
|
||||
- default y if ARCH_IMX8M || ARCH_IMX9
|
||||
+ default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI
|
||||
help
|
||||
Enable this to reduce the size of the FIT image loading code
|
||||
in SPL, if space for the SPL binary is very tight.
|
||||
--
|
||||
2.34.1
|
||||
|
||||
|
@ -1,46 +0,0 @@
|
||||
From: Gunjan Gupta <viraniac@gmail.com>
|
||||
Subject: [PATCH 1/1] sunxi: dram: Fix incorrect ram size detection for some H6
|
||||
boards
|
||||
Date: Sun, 1 Oct 2023 21:43:32 +0530
|
||||
|
||||
On some H6 boards like Orange Pi 3 LTS, some times U-Boot fails to detect
|
||||
ram size correctly. Instead of 2GB thats available, it detects 4GB of ram
|
||||
and then SPL just hangs there making board not to boot further.
|
||||
|
||||
On debugging, I found that the rows value were being determined correctly,
|
||||
but columns were sometimes off by one value. I found that adding some
|
||||
delay after the mctl_core_init call along with making use of dsb in the
|
||||
start of the mctl_mem_matches solves the issue.
|
||||
|
||||
Signed-off-by: Gunjan Gupta <viraniac@gmail.com>
|
||||
---
|
||||
|
||||
arch/arm/mach-sunxi/dram_helpers.c | 1 +
|
||||
arch/arm/mach-sunxi/dram_sun50i_h6.c | 2 ++
|
||||
2 files changed, 3 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
|
||||
index cdf2750f1c..5758c58e07 100644
|
||||
--- a/arch/arm/mach-sunxi/dram_helpers.c
|
||||
+++ b/arch/arm/mach-sunxi/dram_helpers.c
|
||||
@@ -32,6 +32,7 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
|
||||
#ifndef CONFIG_MACH_SUNIV
|
||||
bool mctl_mem_matches(u32 offset)
|
||||
{
|
||||
+ dsb();
|
||||
/* Try to write different values to RAM at two addresses */
|
||||
writel(0, CFG_SYS_SDRAM_BASE);
|
||||
writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset);
|
||||
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
|
||||
index bff2e42513..a031a845f5 100644
|
||||
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
|
||||
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
|
||||
@@ -623,6 +623,8 @@ static void mctl_auto_detect_dram_size(struct dram_para *para)
|
||||
para->cols = 11;
|
||||
mctl_core_init(para);
|
||||
|
||||
+ udelay(50);
|
||||
+
|
||||
for (para->cols = 8; para->cols < 11; para->cols++) {
|
||||
/* 8 bits per byte and 16/32 bit width */
|
||||
if (mctl_mem_matches(1 << (para->cols + 1 +
|
@ -0,0 +1,132 @@
|
||||
From dacaffdf195c924b33c6ad0a7f93de18dfed92b4 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sat, 15 Mar 2025 19:52:31 +0100
|
||||
Subject: [PATCH] sunxi: h6: Fix DRAM size detection
|
||||
|
||||
This is based on submitted patches for newer SoCs. It needs to be
|
||||
properly reworked once they are merged.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm/mach-sunxi/dram_sun50i_h6.c | 97 ++++++++++++++++++++++------
|
||||
1 file changed, 79 insertions(+), 18 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
|
||||
index e7862bd06ea3..f5ee64cfead4 100644
|
||||
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
|
||||
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
|
||||
@@ -601,32 +601,93 @@ static void mctl_auto_detect_rank_width(struct dram_para *para)
|
||||
panic("This DRAM setup is currently not supported.\n");
|
||||
}
|
||||
|
||||
+static void mctl_write_pattern(void)
|
||||
+{
|
||||
+ unsigned int i;
|
||||
+ u32 *ptr, val;
|
||||
+
|
||||
+ ptr = (u32*)CFG_SYS_SDRAM_BASE;
|
||||
+ for (i = 0; i < 16; ptr++, i++) {
|
||||
+ if (i & 1)
|
||||
+ val = ~(ulong)ptr;
|
||||
+ else
|
||||
+ val = (ulong)ptr;
|
||||
+ writel(val, ptr);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static bool mctl_check_pattern(ulong offset)
|
||||
+{
|
||||
+ unsigned int i;
|
||||
+ u32 *ptr, val;
|
||||
+
|
||||
+ ptr = (u32*)CFG_SYS_SDRAM_BASE;
|
||||
+ for (i = 0; i < 16; ptr++, i++) {
|
||||
+ if (i & 1)
|
||||
+ val = ~(ulong)ptr;
|
||||
+ else
|
||||
+ val = (ulong)ptr;
|
||||
+ if (val != *(ptr + offset / 4))
|
||||
+ return false;
|
||||
+ }
|
||||
+
|
||||
+ return true;
|
||||
+}
|
||||
+
|
||||
static void mctl_auto_detect_dram_size(struct dram_para *para)
|
||||
{
|
||||
- /* TODO: non-(LP)DDR3 */
|
||||
+ unsigned int shift, cols, rows;
|
||||
+ u32 buffer[16];
|
||||
|
||||
- /* detect row address bits */
|
||||
- para->cols = 8;
|
||||
- para->rows = 18;
|
||||
- mctl_core_init(para);
|
||||
-
|
||||
- for (para->rows = 13; para->rows < 18; para->rows++) {
|
||||
- /* 8 banks, 8 bit per byte and 16/32 bit width */
|
||||
- if (mctl_mem_matches((1 << (para->rows + para->cols +
|
||||
- 4 + para->bus_full_width))))
|
||||
- break;
|
||||
- }
|
||||
-
|
||||
- /* detect column address bits */
|
||||
+ /* max. config for columns, but not rows */
|
||||
para->cols = 11;
|
||||
+ para->rows = 13;
|
||||
mctl_core_init(para);
|
||||
|
||||
- for (para->cols = 8; para->cols < 11; para->cols++) {
|
||||
- /* 8 bits per byte and 16/32 bit width */
|
||||
- if (mctl_mem_matches(1 << (para->cols + 1 +
|
||||
- para->bus_full_width)))
|
||||
+ /*
|
||||
+ * Store content so it can be restored later. This is important
|
||||
+ * if controller was already initialized and holds any data
|
||||
+ * which is important for restoring system.
|
||||
+ */
|
||||
+ memcpy(buffer, (u32*)CFG_SYS_SDRAM_BASE, sizeof(buffer));
|
||||
+
|
||||
+ mctl_write_pattern();
|
||||
+
|
||||
+ shift = para->bus_full_width + 1;
|
||||
+
|
||||
+ /* detect column address bits */
|
||||
+ for (cols = 8; cols < 11; cols++) {
|
||||
+ if (mctl_check_pattern(1ULL << (cols + shift)))
|
||||
break;
|
||||
}
|
||||
+ debug("detected %u columns\n", cols);
|
||||
+
|
||||
+ /* restore data */
|
||||
+ memcpy((u32*)CFG_SYS_SDRAM_BASE, buffer, sizeof(buffer));
|
||||
+
|
||||
+ /* reconfigure to make sure that all active rows are accessible */
|
||||
+ para->cols = 8;
|
||||
+ para->rows = 17;
|
||||
+ mctl_core_init(para);
|
||||
+
|
||||
+ /* store data again as it might be moved */
|
||||
+ memcpy(buffer, (u32*)CFG_SYS_SDRAM_BASE, sizeof(buffer));
|
||||
+
|
||||
+ mctl_write_pattern();
|
||||
+
|
||||
+ /* detect row address bits */
|
||||
+ shift = para->bus_full_width + 4 + para->cols;
|
||||
+ for (rows = 13; rows < 17; rows++) {
|
||||
+ if (mctl_check_pattern(1ULL << (rows + shift)))
|
||||
+ break;
|
||||
+ }
|
||||
+ debug("detected %u rows\n", rows);
|
||||
+
|
||||
+ /* restore data again */
|
||||
+ memcpy((u32*)CFG_SYS_SDRAM_BASE, buffer, sizeof(buffer));
|
||||
+
|
||||
+ para->cols = cols;
|
||||
+ para->rows = rows;
|
||||
}
|
||||
|
||||
unsigned long mctl_calc_size(struct dram_para *para)
|
||||
--
|
||||
2.48.1
|
||||
|
@ -50,7 +50,7 @@ mkimage_extlinux_fdtdir(){
|
||||
cat << EOF > "${LE_TMP}/extlinux/extlinux.conf"
|
||||
LABEL ${DISTRO}
|
||||
LINUX /${KERNEL_NAME}
|
||||
FDTDIR /amlogic/
|
||||
FDTDIR /
|
||||
APPEND boot=LABEL=${DISTRO_BOOTLABEL} disk=LABEL=${DISTRO_DISKLABEL} quiet ${EXTRA_CMDLINE}
|
||||
EOF
|
||||
mcopy -s -o "${LE_TMP}/extlinux" ::
|
||||
|
@ -1,7 +1,7 @@
|
||||
From db00d83004cdd497b491ce348f1ccd53f1394c9a Mon Sep 17 00:00:00 2001
|
||||
From f9ed5a1383237e7f8142d24227b82d2e95abdd76 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 13 Nov 2020 02:09:36 +0000
|
||||
Subject: [PATCH 1/7] LOCAL: configs: meson64: prevent stdout/stderr on
|
||||
Subject: [PATCH 1/2] LOCAL: configs: meson64: prevent stdout/stderr on
|
||||
videoconsole
|
||||
|
||||
Several devices have CONFIG_VIDEO enabled which causes stdout/stderr
|
||||
@ -14,7 +14,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
|
||||
index efab9a624dc..0976774e5c8 100644
|
||||
index f3275b37a51..72d3caa30be 100644
|
||||
--- a/include/configs/meson64.h
|
||||
+++ b/include/configs/meson64.h
|
||||
@@ -28,7 +28,7 @@
|
||||
|
@ -1,29 +0,0 @@
|
||||
From 80acdb7f8b027db8953b7067d29ee2283bde42bb Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 3 Aug 2021 18:42:55 +0000
|
||||
Subject: [PATCH 2/7] LOCAL: board: amlogic: odroid-n2: remove /amlogic/ prefix
|
||||
for dtb path
|
||||
|
||||
Remove the /amlogic/ prefix to align with current LE dtb locations.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
board/amlogic/odroid-n2/odroid-n2.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
|
||||
index 2135457edd9..ec1f4efc113 100644
|
||||
--- a/board/amlogic/odroid-n2/odroid-n2.c
|
||||
+++ b/board/amlogic/odroid-n2/odroid-n2.c
|
||||
@@ -63,7 +63,7 @@ static void odroid_set_fdtfile(char *soc, char *variant)
|
||||
{
|
||||
char s[128];
|
||||
|
||||
- snprintf(s, sizeof(s), "amlogic/meson-%s-odroid-%s.dtb", soc, variant);
|
||||
+ snprintf(s, sizeof(s), "meson-%s-odroid-%s.dtb", soc, variant);
|
||||
env_set("fdtfile", s);
|
||||
}
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,55 @@
|
||||
From c1ea5300b2ab0a1cdf5b89989971834555ee2302 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 8 Oct 2024 06:48:13 +0000
|
||||
Subject: [PATCH 2/2] LOCAL: test uart_ao_a_pins bias disable on Odroid C2 and
|
||||
WeTek Hub
|
||||
|
||||
This resolves reports of non-booting C2 boards. The long term fix
|
||||
is [0] which is merged for Linux 6.16 and will appear in u-boot
|
||||
with a future upstream device-tree sync.
|
||||
|
||||
[0] https://patchwork.kernel.org/project/linux-amlogic/cover/20250329185855.854186-1-martin.blumenstingl@googlemail.com/
|
||||
|
||||
Suggested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 7 +++++++
|
||||
arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 +++++++
|
||||
2 files changed, 14 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
|
||||
index 5a2be8171e1..b73ce8378c9 100644
|
||||
--- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
|
||||
@@ -35,6 +35,13 @@
|
||||
snps,reset-active-low;
|
||||
};
|
||||
|
||||
+&uart_ao_a_pins {
|
||||
+ mux {
|
||||
+ /delete-property/ bias-disable;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&usb0 {
|
||||
status = "disabled";
|
||||
};
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
index 3743053eb9c..857007a134b 100644
|
||||
--- a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
@@ -11,3 +11,10 @@
|
||||
snps,reset-delays-us = <0 10000 1000000>;
|
||||
snps,reset-active-low;
|
||||
};
|
||||
+
|
||||
+&uart_ao_a_pins {
|
||||
+ mux {
|
||||
+ /delete-property/ bias-disable;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,197 +0,0 @@
|
||||
From 91a49a0d363d5437b8e2f2dc4757e89cb7f46d94 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Wed, 13 Dec 2023 10:30:12 +0100
|
||||
Subject: [PATCH 3/7] FROMGIT: net: Add Amlogic GXL MDIO Mux driver
|
||||
|
||||
Port the mdio-mux-meson-gxl.c Linux driver introduced in [1],
|
||||
and adapt it to U-Boot.
|
||||
|
||||
This driver is needed to boot U-Boot with Linux DT since v6.4,
|
||||
since it switched the MDIO mux from the mmio to a proper GXL driver.
|
||||
|
||||
[1] 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support")
|
||||
|
||||
Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-1-c56bb02a75ea@linaro.org
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/net/Kconfig | 7 ++
|
||||
drivers/net/Makefile | 1 +
|
||||
drivers/net/mdio_mux_meson_gxl.c | 138 +++++++++++++++++++++++++++++++
|
||||
3 files changed, 146 insertions(+)
|
||||
create mode 100644 drivers/net/mdio_mux_meson_gxl.c
|
||||
|
||||
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
|
||||
index ebab4d9f2e5..18ec910d12f 100644
|
||||
--- a/drivers/net/Kconfig
|
||||
+++ b/drivers/net/Kconfig
|
||||
@@ -988,4 +988,11 @@ config MDIO_MUX_MESON_G12A
|
||||
This driver is used for the MDIO mux found on the Amlogic G12A & compatible
|
||||
SoCs.
|
||||
|
||||
+config MDIO_MUX_MESON_GXL
|
||||
+ bool "MDIO MUX for Amlogic Meson GXL SoCs"
|
||||
+ depends on DM_MDIO_MUX
|
||||
+ help
|
||||
+ This driver is used for the MDIO mux found on the Amlogic GXL & compatible
|
||||
+ SoCs.
|
||||
+
|
||||
endif # NETDEVICES
|
||||
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
|
||||
index 1ce6fea323c..3794609fd2f 100644
|
||||
--- a/drivers/net/Makefile
|
||||
+++ b/drivers/net/Makefile
|
||||
@@ -58,6 +58,7 @@ obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
|
||||
obj-$(CONFIG_MDIO_IPQ4019) += mdio-ipq4019.o
|
||||
obj-$(CONFIG_MDIO_MUX_I2CREG) += mdio_mux_i2creg.o
|
||||
obj-$(CONFIG_MDIO_MUX_MESON_G12A) += mdio_mux_meson_g12a.o
|
||||
+obj-$(CONFIG_MDIO_MUX_MESON_GXL) += mdio_mux_meson_gxl.o
|
||||
obj-$(CONFIG_MDIO_MUX_MMIOREG) += mdio_mux_mmioreg.o
|
||||
obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o
|
||||
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
|
||||
diff --git a/drivers/net/mdio_mux_meson_gxl.c b/drivers/net/mdio_mux_meson_gxl.c
|
||||
new file mode 100644
|
||||
index 00000000000..8ef3ae598b7
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/mdio_mux_meson_gxl.c
|
||||
@@ -0,0 +1,138 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (c) 2022 Baylibre, SAS.
|
||||
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
|
||||
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
|
||||
+ */
|
||||
+
|
||||
+#include <dm.h>
|
||||
+#include <errno.h>
|
||||
+#include <log.h>
|
||||
+#include <miiphy.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <linux/bitfield.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
+#define ETH_REG2 0x0
|
||||
+#define REG2_PHYID GENMASK(21, 0)
|
||||
+#define EPHY_GXL_ID 0x110181
|
||||
+#define REG2_LEDACT GENMASK(23, 22)
|
||||
+#define REG2_LEDLINK GENMASK(25, 24)
|
||||
+#define REG2_DIV4SEL BIT(27)
|
||||
+#define REG2_ADCBYPASS BIT(30)
|
||||
+#define REG2_CLKINSEL BIT(31)
|
||||
+#define ETH_REG3 0x4
|
||||
+#define REG3_ENH BIT(3)
|
||||
+#define REG3_CFGMODE GENMASK(6, 4)
|
||||
+#define REG3_AUTOMDIX BIT(7)
|
||||
+#define REG3_PHYADDR GENMASK(12, 8)
|
||||
+#define REG3_PWRUPRST BIT(21)
|
||||
+#define REG3_PWRDOWN BIT(22)
|
||||
+#define REG3_LEDPOL BIT(23)
|
||||
+#define REG3_PHYMDI BIT(26)
|
||||
+#define REG3_CLKINEN BIT(29)
|
||||
+#define REG3_PHYIP BIT(30)
|
||||
+#define REG3_PHYEN BIT(31)
|
||||
+#define ETH_REG4 0x8
|
||||
+#define REG4_PWRUPRSTSIG BIT(0)
|
||||
+
|
||||
+#define MESON_GXL_MDIO_EXTERNAL_ID 0
|
||||
+#define MESON_GXL_MDIO_INTERNAL_ID 1
|
||||
+
|
||||
+struct mdio_mux_meson_gxl_priv {
|
||||
+ phys_addr_t regs;
|
||||
+};
|
||||
+
|
||||
+static int meson_gxl_enable_internal_mdio(struct mdio_mux_meson_gxl_priv *priv)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ /* Setup the internal phy */
|
||||
+ val = (REG3_ENH |
|
||||
+ FIELD_PREP(REG3_CFGMODE, 0x7) |
|
||||
+ REG3_AUTOMDIX |
|
||||
+ FIELD_PREP(REG3_PHYADDR, 8) |
|
||||
+ REG3_LEDPOL |
|
||||
+ REG3_PHYMDI |
|
||||
+ REG3_CLKINEN |
|
||||
+ REG3_PHYIP);
|
||||
+
|
||||
+ writel(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4);
|
||||
+ writel(val, priv->regs + ETH_REG3);
|
||||
+ mdelay(10);
|
||||
+
|
||||
+ /* NOTE: The HW kept the phy id configurable at runtime.
|
||||
+ * The id below is arbitrary. It is the one used in the vendor code.
|
||||
+ * The only constraint is that it must match the one in
|
||||
+ * drivers/net/phy/meson-gxl.c to properly match the PHY.
|
||||
+ */
|
||||
+ writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
|
||||
+ priv->regs + ETH_REG2);
|
||||
+
|
||||
+ /* Enable the internal phy */
|
||||
+ val |= REG3_PHYEN;
|
||||
+ writel(val, priv->regs + ETH_REG3);
|
||||
+ writel(0, priv->regs + ETH_REG4);
|
||||
+
|
||||
+ /* The phy needs a bit of time to power up */
|
||||
+ mdelay(10);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int meson_gxl_enable_external_mdio(struct mdio_mux_meson_gxl_priv *priv)
|
||||
+{
|
||||
+ /* Reset the mdio bus mux to the external phy */
|
||||
+ writel(0, priv->regs + ETH_REG3);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int mdio_mux_meson_gxl_select(struct udevice *mux, int cur, int sel)
|
||||
+{
|
||||
+ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(mux);
|
||||
+
|
||||
+ debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel);
|
||||
+
|
||||
+ /* if last selection didn't change we're good to go */
|
||||
+ if (cur == sel)
|
||||
+ return 0;
|
||||
+
|
||||
+ switch (sel) {
|
||||
+ case MESON_GXL_MDIO_EXTERNAL_ID:
|
||||
+ return meson_gxl_enable_external_mdio(priv);
|
||||
+ case MESON_GXL_MDIO_INTERNAL_ID:
|
||||
+ return meson_gxl_enable_internal_mdio(priv);
|
||||
+ default:
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct mdio_mux_ops mdio_mux_meson_gxl_ops = {
|
||||
+ .select = mdio_mux_meson_gxl_select,
|
||||
+};
|
||||
+
|
||||
+static int mdio_mux_meson_gxl_probe(struct udevice *dev)
|
||||
+{
|
||||
+ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(dev);
|
||||
+
|
||||
+ priv->regs = dev_read_addr(dev);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct udevice_id mdio_mux_meson_gxl_ids[] = {
|
||||
+ { .compatible = "amlogic,gxl-mdio-mux" },
|
||||
+ { }
|
||||
+};
|
||||
+
|
||||
+U_BOOT_DRIVER(mdio_mux_meson_gxl) = {
|
||||
+ .name = "mdio_mux_meson_gxl",
|
||||
+ .id = UCLASS_MDIO_MUX,
|
||||
+ .of_match = mdio_mux_meson_gxl_ids,
|
||||
+ .probe = mdio_mux_meson_gxl_probe,
|
||||
+ .ops = &mdio_mux_meson_gxl_ops,
|
||||
+ .priv_auto = sizeof(struct mdio_mux_meson_gxl_priv),
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,785 +0,0 @@
|
||||
From 0e5c2f955fb3029a9bd2194bd4d87fa56601e573 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Wed, 13 Dec 2023 10:30:13 +0100
|
||||
Subject: [PATCH 4/7] FROMGIT: ARM: dts: sync Amlogic GX DT to Linux v6.4
|
||||
|
||||
Sync Amlogic GXBB, GXL & GXM DTs from Linux v6.4, and also
|
||||
switch to GXL MDIO MUX driver to adapt to DT change,
|
||||
|
||||
Most of the changes are only cosmetic or doesn't concern U-Boot,
|
||||
the most important change for U-Boot is the GXL mdio mux compatible
|
||||
switch to amlogic,gxl-mdio-mux.
|
||||
|
||||
Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-2-c56bb02a75ea@linaro.org
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
arch/arm/dts/meson-gx-libretech-pc.dtsi | 4 +-
|
||||
arch/arm/dts/meson-gx.dtsi | 21 ++++--
|
||||
arch/arm/dts/meson-gxbb-nanopi-k2.dts | 13 +++-
|
||||
arch/arm/dts/meson-gxbb-odroidc2.dts | 26 +++----
|
||||
arch/arm/dts/meson-gxbb.dtsi | 18 ++++-
|
||||
arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 2 +-
|
||||
.../meson-gxl-s905w-jethome-jethub-j80.dts | 12 +++-
|
||||
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 16 +----
|
||||
.../dts/meson-gxl-s905x-libretech-cc-v2.dts | 3 +-
|
||||
arch/arm/dts/meson-gxl-s905x-p212.dts | 68 +++++++++++++++++++
|
||||
arch/arm/dts/meson-gxl-s905x-p212.dtsi | 21 +++---
|
||||
arch/arm/dts/meson-gxl.dtsi | 43 ++++++++----
|
||||
arch/arm/dts/meson-gxm-khadas-vim2.dts | 15 ++--
|
||||
arch/arm/dts/meson-gxm-wetek-core2.dts | 2 -
|
||||
configs/beelink-gt1-ultimate_defconfig | 2 +-
|
||||
configs/jethub_j80_defconfig | 2 +-
|
||||
configs/khadas-vim2_defconfig | 2 +-
|
||||
configs/khadas-vim_defconfig | 2 +-
|
||||
configs/libretech-ac_defconfig | 2 +-
|
||||
configs/libretech-cc_defconfig | 2 +-
|
||||
configs/libretech-cc_v2_defconfig | 2 +-
|
||||
configs/libretech-s905d-pc_defconfig | 2 +-
|
||||
configs/libretech-s912-pc_defconfig | 2 +-
|
||||
configs/p212_defconfig | 2 +-
|
||||
configs/wetek-core2_defconfig | 2 +-
|
||||
25 files changed, 196 insertions(+), 90 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi
|
||||
index 2d7032f41e4..4e84ab87cc7 100644
|
||||
--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi
|
||||
+++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi
|
||||
@@ -17,7 +17,7 @@
|
||||
io-channel-names = "buttons";
|
||||
keyup-threshold-microvolt = <1800000>;
|
||||
|
||||
- update-button {
|
||||
+ button-update {
|
||||
label = "update";
|
||||
linux,code = <KEY_VENDOR>;
|
||||
press-threshold-microvolt = <1300000>;
|
||||
@@ -416,7 +416,7 @@
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
- gd25lq128: spi-flash@0 {
|
||||
+ gd25lq128: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
|
||||
index 6b457b2c30a..11f89bfecb5 100644
|
||||
--- a/arch/arm/dts/meson-gx.dtsi
|
||||
+++ b/arch/arm/dts/meson-gx.dtsi
|
||||
@@ -49,6 +49,12 @@
|
||||
no-map;
|
||||
};
|
||||
|
||||
+ /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
|
||||
+ secmon_reserved_bl32: secmon@5300000 {
|
||||
+ reg = <0x0 0x05300000 0x0 0x2000000>;
|
||||
+ no-map;
|
||||
+ };
|
||||
+
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
@@ -126,6 +132,7 @@
|
||||
|
||||
l2: l2-cache0 {
|
||||
compatible = "cache";
|
||||
+ cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -226,7 +233,7 @@
|
||||
reg = <0x14 0x10>;
|
||||
};
|
||||
|
||||
- eth_mac: eth_mac@34 {
|
||||
+ eth_mac: eth-mac@34 {
|
||||
reg = <0x34 0x10>;
|
||||
};
|
||||
|
||||
@@ -243,7 +250,7 @@
|
||||
scpi_clocks: clocks {
|
||||
compatible = "arm,scpi-clocks";
|
||||
|
||||
- scpi_dvfs: scpi_clocks@0 {
|
||||
+ scpi_dvfs: clocks-0 {
|
||||
compatible = "arm,scpi-dvfs-clocks";
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <0>;
|
||||
@@ -444,7 +451,7 @@
|
||||
|
||||
sysctrl_AO: sys-ctrl@0 {
|
||||
compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
|
||||
- reg = <0x0 0x0 0x0 0x100>;
|
||||
+ reg = <0x0 0x0 0x0 0x100>;
|
||||
|
||||
clkc_AO: clock-controller {
|
||||
compatible = "amlogic,meson-gx-aoclkc";
|
||||
@@ -525,7 +532,7 @@
|
||||
#size-cells = <2>;
|
||||
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
|
||||
|
||||
- hwrng: rng {
|
||||
+ hwrng: rng@0 {
|
||||
compatible = "amlogic,meson-rng";
|
||||
reg = <0x0 0x0 0x0 0x4>;
|
||||
};
|
||||
@@ -596,21 +603,21 @@
|
||||
sd_emmc_a: mmc@70000 {
|
||||
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
|
||||
reg = <0x0 0x70000 0x0 0x800>;
|
||||
- interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
|
||||
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sd_emmc_b: mmc@72000 {
|
||||
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
|
||||
reg = <0x0 0x72000 0x0 0x800>;
|
||||
- interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
|
||||
+ interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sd_emmc_c: mmc@74000 {
|
||||
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
|
||||
reg = <0x0 0x74000 0x0 0x800>;
|
||||
- interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
|
||||
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
|
||||
index 7273eed5292..7d94160f580 100644
|
||||
--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts
|
||||
+++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
|
||||
@@ -385,9 +385,20 @@
|
||||
|
||||
/* Bluetooth on AP6212 */
|
||||
&uart_A {
|
||||
- status = "disabled";
|
||||
+ status = "okay";
|
||||
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
pinctrl-names = "default";
|
||||
+ uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "brcm,bcm43438-bt";
|
||||
+ clocks = <&wifi_32k>;
|
||||
+ clock-names = "lpo";
|
||||
+ vbat-supply = <&vddio_ao3v3>;
|
||||
+ vddio-supply = <&vddio_ao18>;
|
||||
+ host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
|
||||
+ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
};
|
||||
|
||||
/* 40-pin CON1 */
|
||||
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts
|
||||
index 201596247fd..01356437a07 100644
|
||||
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
|
||||
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
|
||||
@@ -250,21 +250,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
-&gpio_ao {
|
||||
- /*
|
||||
- * WARNING: The USB Hub on the Odroid-C2 needs a reset signal
|
||||
- * to be turned high in order to be detected by the USB Controller
|
||||
- * This signal should be handled by a USB specific power sequence
|
||||
- * in order to reset the Hub when USB bus is powered down.
|
||||
- */
|
||||
- hog-0 {
|
||||
- gpio-hog;
|
||||
- gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
|
||||
- output-high;
|
||||
- line-name = "usb-hub-reset";
|
||||
- };
|
||||
-};
|
||||
-
|
||||
&hdmi_tx {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
|
||||
@@ -414,5 +399,16 @@
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
+ dr_mode = "host";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
status = "okay";
|
||||
+
|
||||
+ hub@1 {
|
||||
+ /* Genesys Logic GL852G USB 2.0 hub */
|
||||
+ compatible = "usb5e3,610";
|
||||
+ reg = <1>;
|
||||
+ vdd-supply = <&p5v0>;
|
||||
+ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
};
|
||||
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
|
||||
index 7c029f552a2..12ef6e81c8b 100644
|
||||
--- a/arch/arm/dts/meson-gxbb.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxbb.dtsi
|
||||
@@ -300,8 +300,8 @@
|
||||
};
|
||||
|
||||
&gpio_intc {
|
||||
- compatible = "amlogic,meson-gpio-intc",
|
||||
- "amlogic,meson-gxbb-gpio-intc";
|
||||
+ compatible = "amlogic,meson-gxbb-gpio-intc",
|
||||
+ "amlogic,meson-gpio-intc";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -427,6 +427,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ spi_idle_high_pins: spi-idle-high-pins {
|
||||
+ mux {
|
||||
+ groups = "spi_sclk";
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ spi_idle_low_pins: spi-idle-low-pins {
|
||||
+ mux {
|
||||
+ groups = "spi_sclk";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
spi_ss0_pins: spi-ss0 {
|
||||
mux {
|
||||
groups = "spi_ss0";
|
||||
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
|
||||
index 2d769203f67..213a0705ebd 100644
|
||||
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
|
||||
+++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
|
||||
@@ -298,7 +298,7 @@
|
||||
pinctrl-0 = <&nor_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
- w25q32: spi-flash@0 {
|
||||
+ w25q32: flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
|
||||
index 6eafb908695..a18d6d241a5 100644
|
||||
--- a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
|
||||
+++ b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
|
||||
@@ -86,11 +86,11 @@
|
||||
};
|
||||
|
||||
&efuse {
|
||||
- bt_mac: bt_mac@6 {
|
||||
+ bt_mac: bt-mac@6 {
|
||||
reg = <0x6 0x6>;
|
||||
};
|
||||
|
||||
- wifi_mac: wifi_mac@C {
|
||||
+ wifi_mac: wifi-mac@c {
|
||||
reg = <0xc 0x6>;
|
||||
};
|
||||
};
|
||||
@@ -213,6 +213,12 @@
|
||||
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
||||
pinctrl-names = "default";
|
||||
uart-has-rtscts;
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "realtek,rtl8822cs-bt";
|
||||
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
+ host-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&uart_C {
|
||||
@@ -233,7 +239,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c_b_pins>;
|
||||
|
||||
- pcf8563: pcf8563@51 {
|
||||
+ pcf8563: rtc@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
status = "okay";
|
||||
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
|
||||
index 60feac0179c..02f81839d4e 100644
|
||||
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
|
||||
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
|
||||
@@ -140,7 +140,6 @@
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
- clock-frequency = <32768>;
|
||||
clock-output-names = "xin32k";
|
||||
};
|
||||
};
|
||||
@@ -218,20 +217,7 @@
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
- reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
- };
|
||||
-};
|
||||
-
|
||||
-&uart_A {
|
||||
- bluetooth {
|
||||
- compatible = "brcm,bcm43438-bt";
|
||||
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
- max-speed = <2000000>;
|
||||
- clocks = <&wifi32k>;
|
||||
- clock-names = "lpo";
|
||||
- };
|
||||
+ max-frequency = <100000000>;
|
||||
};
|
||||
|
||||
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
|
||||
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
|
||||
index 93d8f8aff70..6c4e68e0e62 100644
|
||||
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
|
||||
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
|
||||
@@ -284,7 +284,7 @@
|
||||
pinctrl-0 = <&nor_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
- nor_4u1: spi-flash@0 {
|
||||
+ nor_4u1: flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
@@ -305,7 +305,6 @@
|
||||
};
|
||||
|
||||
&usb2_phy0 {
|
||||
- pinctrl-names = "default";
|
||||
phy-supply = <&vcc5v>;
|
||||
};
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dts b/arch/arm/dts/meson-gxl-s905x-p212.dts
|
||||
index 2602940c207..9b4ea6a4939 100644
|
||||
--- a/arch/arm/dts/meson-gxl-s905x-p212.dts
|
||||
+++ b/arch/arm/dts/meson-gxl-s905x-p212.dts
|
||||
@@ -7,11 +7,19 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "meson-gxl-s905x-p212.dtsi"
|
||||
+#include <dt-bindings/sound/meson-aiu.h>
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
|
||||
model = "Amlogic Meson GXL (S905X) P212 Development Board";
|
||||
|
||||
+ dio2133: analog-amplifier {
|
||||
+ compatible = "simple-audio-amplifier";
|
||||
+ sound-name-prefix = "AU2";
|
||||
+ VCC-supply = <&hdmi_5v>;
|
||||
+ enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
cvbs-connector {
|
||||
compatible = "composite-video-connector";
|
||||
|
||||
@@ -32,6 +40,66 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
+
|
||||
+ sound {
|
||||
+ compatible = "amlogic,gx-sound-card";
|
||||
+ model = "S905X-P212";
|
||||
+ audio-aux-devs = <&dio2133>;
|
||||
+ audio-widgets = "Line", "Lineout";
|
||||
+ audio-routing = "AU2 INL", "ACODEC LOLN",
|
||||
+ "AU2 INR", "ACODEC LORN",
|
||||
+ "Lineout", "AU2 OUTL",
|
||||
+ "Lineout", "AU2 OUTR";
|
||||
+ assigned-clocks = <&clkc CLKID_MPLL0>,
|
||||
+ <&clkc CLKID_MPLL1>,
|
||||
+ <&clkc CLKID_MPLL2>;
|
||||
+ assigned-clock-parents = <0>, <0>, <0>;
|
||||
+ assigned-clock-rates = <294912000>,
|
||||
+ <270950400>,
|
||||
+ <393216000>;
|
||||
+ dai-link-0 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-1 {
|
||||
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
|
||||
+ dai-format = "i2s";
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-2 {
|
||||
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&hdmi_tx>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dai-link-3 {
|
||||
+ sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&acodec>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&acodec {
|
||||
+ AVDD-supply = <&vddio_ao18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&aiu {
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&cec_AO {
|
||||
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
|
||||
index 05cb2f5e5c3..a150cc0e18f 100644
|
||||
--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
|
||||
@@ -97,6 +97,14 @@
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
+&pwm_ef {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pwm_e_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
+ clock-names = "clkin0";
|
||||
+};
|
||||
+
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vddio_ao18>;
|
||||
@@ -125,6 +133,11 @@
|
||||
|
||||
vmmc-supply = <&vddao_3v3>;
|
||||
vqmmc-supply = <&vddio_boot>;
|
||||
+
|
||||
+ brcmf: wifi@1 {
|
||||
+ reg = <1>;
|
||||
+ compatible = "brcm,bcm4329-fmac";
|
||||
+ };
|
||||
};
|
||||
|
||||
/* SD card */
|
||||
@@ -165,14 +178,6 @@
|
||||
vqmmc-supply = <&vddio_boot>;
|
||||
};
|
||||
|
||||
-&pwm_ef {
|
||||
- status = "okay";
|
||||
- pinctrl-0 = <&pwm_e_pins>;
|
||||
- pinctrl-names = "default";
|
||||
- clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
- clock-names = "clkin0";
|
||||
-};
|
||||
-
|
||||
/* This is connected to the Bluetooth module: */
|
||||
&uart_A {
|
||||
status = "okay";
|
||||
diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi
|
||||
index c3ac531c4f8..17bcfa4702e 100644
|
||||
--- a/arch/arm/dts/meson-gxl.dtsi
|
||||
+++ b/arch/arm/dts/meson-gxl.dtsi
|
||||
@@ -312,8 +312,8 @@
|
||||
};
|
||||
|
||||
&gpio_intc {
|
||||
- compatible = "amlogic,meson-gpio-intc",
|
||||
- "amlogic,meson-gxl-gpio-intc";
|
||||
+ compatible = "amlogic,meson-gxl-gpio-intc",
|
||||
+ "amlogic,meson-gpio-intc";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -429,6 +429,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ spi_idle_high_pins: spi-idle-high-pins {
|
||||
+ mux {
|
||||
+ groups = "spi_sclk";
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ spi_idle_low_pins: spi-idle-low-pins {
|
||||
+ mux {
|
||||
+ groups = "spi_sclk";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
spi_ss0_pins: spi-ss0 {
|
||||
mux {
|
||||
groups = "spi_ss0";
|
||||
@@ -759,16 +773,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
- eth-phy-mux {
|
||||
- compatible = "mdio-mux-mmioreg", "mdio-mux";
|
||||
+ eth_phy_mux: mdio@558 {
|
||||
+ reg = <0x0 0x558 0x0 0xc>;
|
||||
+ compatible = "amlogic,gxl-mdio-mux";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
- reg = <0x0 0x55c 0x0 0x4>;
|
||||
- mux-mask = <0xffffffff>;
|
||||
+ clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
+ clock-names = "ref";
|
||||
mdio-parent-bus = <&mdio0>;
|
||||
|
||||
- internal_mdio: mdio@e40908ff {
|
||||
- reg = <0xe40908ff>;
|
||||
+ external_mdio: mdio@0 {
|
||||
+ reg = <0x0>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ internal_mdio: mdio@1 {
|
||||
+ reg = <0x1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@@ -779,12 +800,6 @@
|
||||
max-speed = <100>;
|
||||
};
|
||||
};
|
||||
-
|
||||
- external_mdio: mdio@2009087f {
|
||||
- reg = <0x2009087f>;
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
- };
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts
|
||||
index 18a4b7a6c5d..74897a15489 100644
|
||||
--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts
|
||||
+++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts
|
||||
@@ -52,10 +52,11 @@
|
||||
gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH
|
||||
&gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
|
||||
/* Dummy RPM values since fan is optional */
|
||||
- gpio-fan,speed-map = <0 0
|
||||
- 1 1
|
||||
- 2 2
|
||||
- 3 3>;
|
||||
+ gpio-fan,speed-map =
|
||||
+ <0 0>,
|
||||
+ <1 1>,
|
||||
+ <2 2>,
|
||||
+ <3 3>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
@@ -270,7 +271,6 @@
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
- clock-frequency = <32768>;
|
||||
clock-output-names = "xin32k";
|
||||
};
|
||||
};
|
||||
@@ -307,7 +307,8 @@
|
||||
#size-cells = <0>;
|
||||
|
||||
bus-width = <4>;
|
||||
- max-frequency = <60000000>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <100000000>;
|
||||
|
||||
non-removable;
|
||||
disable-wp;
|
||||
@@ -373,7 +374,7 @@
|
||||
pinctrl-0 = <&nor_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
- w25q32: spi-flash@0 {
|
||||
+ w25q32: flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "winbond,w25q16", "jedec,spi-nor";
|
||||
diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts
|
||||
index 1e7f77f9b53..f8c40340b9c 100644
|
||||
--- a/arch/arm/dts/meson-gxm-wetek-core2.dts
|
||||
+++ b/arch/arm/dts/meson-gxm-wetek-core2.dts
|
||||
@@ -45,8 +45,6 @@
|
||||
|
||||
gpio-keys-polled {
|
||||
compatible = "gpio-keys-polled";
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
poll-interval = <100>;
|
||||
|
||||
button-power {
|
||||
diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig
|
||||
index 1313dde92f5..00fdad8544b 100644
|
||||
--- a/configs/beelink-gt1-ultimate_defconfig
|
||||
+++ b/configs/beelink-gt1-ultimate_defconfig
|
||||
@@ -46,7 +46,7 @@ CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig
|
||||
index b370e5d1d4d..15e410de829 100644
|
||||
--- a/configs/jethub_j80_defconfig
|
||||
+++ b/configs/jethub_j80_defconfig
|
||||
@@ -54,7 +54,7 @@ CONFIG_PHY_MESON_GXL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
|
||||
index 28e90522451..59ef33723e4 100644
|
||||
--- a/configs/khadas-vim2_defconfig
|
||||
+++ b/configs/khadas-vim2_defconfig
|
||||
@@ -51,7 +51,7 @@ CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
|
||||
index d27ab6f5907..5ed7c1a4083 100644
|
||||
--- a/configs/khadas-vim_defconfig
|
||||
+++ b/configs/khadas-vim_defconfig
|
||||
@@ -45,7 +45,7 @@ CONFIG_PHY_MESON_GXL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
|
||||
index bc17b423a2d..f0ab19580c6 100644
|
||||
--- a/configs/libretech-ac_defconfig
|
||||
+++ b/configs/libretech-ac_defconfig
|
||||
@@ -57,7 +57,7 @@ CONFIG_PHY_MESON_GXL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
|
||||
index baa9b1b3dbc..bb1a37a0cda 100644
|
||||
--- a/configs/libretech-cc_defconfig
|
||||
+++ b/configs/libretech-cc_defconfig
|
||||
@@ -44,7 +44,7 @@ CONFIG_PHY_MESON_GXL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig
|
||||
index b1c267a7917..8949e240c93 100644
|
||||
--- a/configs/libretech-cc_v2_defconfig
|
||||
+++ b/configs/libretech-cc_v2_defconfig
|
||||
@@ -52,7 +52,7 @@ CONFIG_PHY_MESON_GXL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
|
||||
index cd138d696e7..a5dc3115fcb 100644
|
||||
--- a/configs/libretech-s905d-pc_defconfig
|
||||
+++ b/configs/libretech-s905d-pc_defconfig
|
||||
@@ -53,7 +53,7 @@ CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
|
||||
index dabb4ca4ece..68f462eeff0 100644
|
||||
--- a/configs/libretech-s912-pc_defconfig
|
||||
+++ b/configs/libretech-s912-pc_defconfig
|
||||
@@ -52,7 +52,7 @@ CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
|
||||
index b90391d9b5f..6b73607d641 100644
|
||||
--- a/configs/p212_defconfig
|
||||
+++ b/configs/p212_defconfig
|
||||
@@ -40,7 +40,7 @@ CONFIG_PHY_MESON_GXL=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
|
||||
index 9bf3de9e7aa..01ffb8bbd75 100644
|
||||
--- a/configs/wetek-core2_defconfig
|
||||
+++ b/configs/wetek-core2_defconfig
|
||||
@@ -46,7 +46,7 @@ CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_DM_MDIO_MUX=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
-CONFIG_MDIO_MUX_MMIOREG=y
|
||||
+CONFIG_MDIO_MUX_MESON_GXL=y
|
||||
CONFIG_MESON_GXL_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXL=y
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,269 +0,0 @@
|
||||
From 5feaed938c81cff592dbb7843fecba98a24ed105 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Wed, 20 Mar 2024 09:46:11 +0100
|
||||
Subject: [PATCH 5/7] FROMGIT: board: amlogic: fix buffler overflow in serial,
|
||||
mac & usid read
|
||||
|
||||
While meson_sm_read_efuse() doesn't overflow, the string is not
|
||||
zero terminated and env_set*() will buffer overflow and add random
|
||||
characters to environment.
|
||||
|
||||
Acked-by: Viacheslav Bocharov <adeep@lexina.in>
|
||||
Link: https://lore.kernel.org/r/20240320-u-boot-fix-p200-serial-v2-1-972be646a301@linaro.org
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
board/amlogic/beelink-s922x/beelink-s922x.c | 3 ++-
|
||||
board/amlogic/jethub-j100/jethub-j100.c | 3 ++-
|
||||
board/amlogic/jethub-j80/jethub-j80.c | 9 ++++++---
|
||||
board/amlogic/odroid-n2/odroid-n2.c | 3 ++-
|
||||
board/amlogic/p200/p200.c | 6 ++++--
|
||||
board/amlogic/p201/p201.c | 6 ++++--
|
||||
board/amlogic/p212/p212.c | 6 ++++--
|
||||
board/amlogic/q200/q200.c | 6 ++++--
|
||||
board/amlogic/vim3/vim3.c | 3 ++-
|
||||
9 files changed, 30 insertions(+), 15 deletions(-)
|
||||
|
||||
diff --git a/board/amlogic/beelink-s922x/beelink-s922x.c b/board/amlogic/beelink-s922x/beelink-s922x.c
|
||||
index adae27fc7e7..c2776310a3d 100644
|
||||
--- a/board/amlogic/beelink-s922x/beelink-s922x.c
|
||||
+++ b/board/amlogic/beelink-s922x/beelink-s922x.c
|
||||
@@ -20,7 +20,7 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[MAC_ADDR_LEN];
|
||||
+ u8 mac_addr[MAC_ADDR_LEN + 1];
|
||||
char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
|
||||
ssize_t len;
|
||||
|
||||
@@ -41,6 +41,7 @@ int misc_init_r(void)
|
||||
tmp[2] = '\0';
|
||||
mac_addr[i] = hextoul(tmp, NULL);
|
||||
}
|
||||
+ mac_addr[MAC_ADDR_LEN] = '\0';
|
||||
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
diff --git a/board/amlogic/jethub-j100/jethub-j100.c b/board/amlogic/jethub-j100/jethub-j100.c
|
||||
index 6a2c4ad4c3c..010fc0df7d1 100644
|
||||
--- a/board/amlogic/jethub-j100/jethub-j100.c
|
||||
+++ b/board/amlogic/jethub-j100/jethub-j100.c
|
||||
@@ -17,7 +17,7 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[ARP_HLEN];
|
||||
+ u8 mac_addr[ARP_HLEN + 1];
|
||||
char serial[SM_SERIAL_SIZE];
|
||||
u32 sid;
|
||||
|
||||
@@ -34,6 +34,7 @@ int misc_init_r(void)
|
||||
mac_addr[3] = (sid >> 16) & 0xff;
|
||||
mac_addr[4] = (sid >> 8) & 0xff;
|
||||
mac_addr[5] = (sid >> 0) & 0xff;
|
||||
+ mac_addr[ARP_HLEN] = '\0';
|
||||
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
}
|
||||
diff --git a/board/amlogic/jethub-j80/jethub-j80.c b/board/amlogic/jethub-j80/jethub-j80.c
|
||||
index 185880de139..0b781666e98 100644
|
||||
--- a/board/amlogic/jethub-j80/jethub-j80.c
|
||||
+++ b/board/amlogic/jethub-j80/jethub-j80.c
|
||||
@@ -27,9 +27,9 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[EFUSE_MAC_SIZE];
|
||||
- char serial[EFUSE_SN_SIZE];
|
||||
- char usid[EFUSE_USID_SIZE];
|
||||
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
|
||||
+ char serial[EFUSE_SN_SIZE + 1];
|
||||
+ char usid[EFUSE_USID_SIZE + 1];
|
||||
ssize_t len;
|
||||
unsigned int adcval;
|
||||
int ret;
|
||||
@@ -37,6 +37,7 @@ int misc_init_r(void)
|
||||
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
mac_addr, EFUSE_MAC_SIZE);
|
||||
+ mac_addr[len] = '\0';
|
||||
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
else
|
||||
@@ -46,6 +47,7 @@ int misc_init_r(void)
|
||||
if (!env_get("serial")) {
|
||||
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
|
||||
EFUSE_SN_SIZE);
|
||||
+ serial[len] = '\0';
|
||||
if (len == EFUSE_SN_SIZE)
|
||||
env_set("serial", serial);
|
||||
}
|
||||
@@ -53,6 +55,7 @@ int misc_init_r(void)
|
||||
if (!env_get("usid")) {
|
||||
len = meson_sm_read_efuse(EFUSE_USID_OFFSET, usid,
|
||||
EFUSE_USID_SIZE);
|
||||
+ usid[len] = '\0';
|
||||
if (len == EFUSE_USID_SIZE)
|
||||
env_set("usid", usid);
|
||||
}
|
||||
diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
|
||||
index ec1f4efc113..f840afbfd67 100644
|
||||
--- a/board/amlogic/odroid-n2/odroid-n2.c
|
||||
+++ b/board/amlogic/odroid-n2/odroid-n2.c
|
||||
@@ -107,7 +107,7 @@ static int odroid_detect_variant(void)
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[MAC_ADDR_LEN];
|
||||
+ u8 mac_addr[MAC_ADDR_LEN + 1];
|
||||
char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
|
||||
ssize_t len;
|
||||
|
||||
@@ -128,6 +128,7 @@ int misc_init_r(void)
|
||||
tmp[2] = '\0';
|
||||
mac_addr[i] = hextoul(tmp, NULL);
|
||||
}
|
||||
+ mac_addr[MAC_ADDR_LEN] = '\0';
|
||||
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c
|
||||
index 7c432f9d281..769e2735d27 100644
|
||||
--- a/board/amlogic/p200/p200.c
|
||||
+++ b/board/amlogic/p200/p200.c
|
||||
@@ -21,13 +21,14 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[EFUSE_MAC_SIZE];
|
||||
- char serial[EFUSE_SN_SIZE];
|
||||
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
|
||||
+ char serial[EFUSE_SN_SIZE + 1];
|
||||
ssize_t len;
|
||||
|
||||
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
mac_addr, EFUSE_MAC_SIZE);
|
||||
+ mac_addr[len] = '\0';
|
||||
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
}
|
||||
@@ -35,6 +36,7 @@ int misc_init_r(void)
|
||||
if (!env_get("serial#")) {
|
||||
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
|
||||
EFUSE_SN_SIZE);
|
||||
+ serial[len] = '\0';
|
||||
if (len == EFUSE_SN_SIZE)
|
||||
env_set("serial#", serial);
|
||||
}
|
||||
diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c
|
||||
index 7c432f9d281..769e2735d27 100644
|
||||
--- a/board/amlogic/p201/p201.c
|
||||
+++ b/board/amlogic/p201/p201.c
|
||||
@@ -21,13 +21,14 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[EFUSE_MAC_SIZE];
|
||||
- char serial[EFUSE_SN_SIZE];
|
||||
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
|
||||
+ char serial[EFUSE_SN_SIZE + 1];
|
||||
ssize_t len;
|
||||
|
||||
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
mac_addr, EFUSE_MAC_SIZE);
|
||||
+ mac_addr[len] = '\0';
|
||||
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
}
|
||||
@@ -35,6 +36,7 @@ int misc_init_r(void)
|
||||
if (!env_get("serial#")) {
|
||||
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
|
||||
EFUSE_SN_SIZE);
|
||||
+ serial[len] = '\0';
|
||||
if (len == EFUSE_SN_SIZE)
|
||||
env_set("serial#", serial);
|
||||
}
|
||||
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
|
||||
index fcef90bce56..f6e60ae3af1 100644
|
||||
--- a/board/amlogic/p212/p212.c
|
||||
+++ b/board/amlogic/p212/p212.c
|
||||
@@ -22,13 +22,14 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[EFUSE_MAC_SIZE];
|
||||
- char serial[EFUSE_SN_SIZE];
|
||||
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
|
||||
+ char serial[EFUSE_SN_SIZE + 1];
|
||||
ssize_t len;
|
||||
|
||||
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
mac_addr, EFUSE_MAC_SIZE);
|
||||
+ mac_addr[len] = '\0';
|
||||
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
else
|
||||
@@ -38,6 +39,7 @@ int misc_init_r(void)
|
||||
if (!env_get("serial#")) {
|
||||
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
|
||||
EFUSE_SN_SIZE);
|
||||
+ serial[len] = '\0';
|
||||
if (len == EFUSE_SN_SIZE)
|
||||
env_set("serial#", serial);
|
||||
}
|
||||
diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c
|
||||
index 3aa6d8f200e..47f1566a9d3 100644
|
||||
--- a/board/amlogic/q200/q200.c
|
||||
+++ b/board/amlogic/q200/q200.c
|
||||
@@ -22,13 +22,14 @@
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[EFUSE_MAC_SIZE];
|
||||
- char serial[EFUSE_SN_SIZE];
|
||||
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
|
||||
+ char serial[EFUSE_SN_SIZE + 1];
|
||||
ssize_t len;
|
||||
|
||||
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
|
||||
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
|
||||
mac_addr, EFUSE_MAC_SIZE);
|
||||
+ mac_addr[len] = '\0';
|
||||
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
else
|
||||
@@ -38,6 +39,7 @@ int misc_init_r(void)
|
||||
if (!env_get("serial#")) {
|
||||
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
|
||||
EFUSE_SN_SIZE);
|
||||
+ serial[len] = '\0';
|
||||
if (len == EFUSE_SN_SIZE)
|
||||
env_set("serial#", serial);
|
||||
}
|
||||
diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c
|
||||
index 8bdfb302f72..43d7a8e84f6 100644
|
||||
--- a/board/amlogic/vim3/vim3.c
|
||||
+++ b/board/amlogic/vim3/vim3.c
|
||||
@@ -151,7 +151,7 @@ int meson_ft_board_setup(void *blob, struct bd_info *bd)
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
- u8 mac_addr[MAC_ADDR_LEN];
|
||||
+ u8 mac_addr[MAC_ADDR_LEN + 1];
|
||||
char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
|
||||
char serial_string[EFUSE_MAC_SIZE + 1];
|
||||
ssize_t len;
|
||||
@@ -169,6 +169,7 @@ int misc_init_r(void)
|
||||
tmp[2] = '\0';
|
||||
mac_addr[i] = hextoul(tmp, NULL);
|
||||
}
|
||||
+ mac_addr[MAC_ADDR_LEN] = '\0';
|
||||
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,44 +0,0 @@
|
||||
From 8c848d4d2cf809d94c5cde3feafe156a4d4f6faf Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 7 Mar 2024 16:11:17 +0000
|
||||
Subject: [PATCH 6/7] FROMGIT: ARM: dts: fix Ethernet on WeTek Hub/Play2
|
||||
|
||||
Placing the snps,reset content needed for Ethernet to probe in a common uboot.dtsi
|
||||
results in the content not being used and broken Ethernet. Fix this by creating two
|
||||
board specific dtsi files with the right content.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 14 ++++++++++++++
|
||||
...oot.dtsi => meson-gxbb-wetek-play2-u-boot.dtsi} | 0
|
||||
2 files changed, 14 insertions(+)
|
||||
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
rename arch/arm/dts/{meson-gxbb-wetek-u-boot.dtsi => meson-gxbb-wetek-play2-u-boot.dtsi} (100%)
|
||||
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
new file mode 100644
|
||||
index 00000000000..3675ffb701f
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
|
||||
@@ -0,0 +1,14 @@
|
||||
+
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS.
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-gx-u-boot.dtsi"
|
||||
+
|
||||
+ðmac {
|
||||
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
|
||||
+ snps,reset-delays-us = <0 10000 1000000>;
|
||||
+ snps,reset-active-low;
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
|
||||
similarity index 100%
|
||||
rename from arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi
|
||||
rename to arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,30 +0,0 @@
|
||||
From 860810facd7b4cdeb212edbd915d00c848f4d966 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 23 Mar 2024 09:59:30 +0000
|
||||
Subject: [PATCH 7/7] FROMGIT: board: amlogic: add
|
||||
meson_generate_serial_ethaddr fallback to p200
|
||||
|
||||
Add a fall-back method to generate ethaddr from CPU serial on p200 boards
|
||||
if the MAC cannot be read from efuse.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
board/amlogic/p200/p200.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c
|
||||
index 769e2735d27..754242e4a9f 100644
|
||||
--- a/board/amlogic/p200/p200.c
|
||||
+++ b/board/amlogic/p200/p200.c
|
||||
@@ -31,6 +31,8 @@ int misc_init_r(void)
|
||||
mac_addr[len] = '\0';
|
||||
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
+ else
|
||||
+ meson_generate_serial_ethaddr();
|
||||
}
|
||||
|
||||
if (!env_get("serial#")) {
|
||||
--
|
||||
2.34.1
|
||||
|
1
projects/NXP/devices/iMX6/bootloader/config
Normal file
1
projects/NXP/devices/iMX6/bootloader/config
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_EFI_LOADER is not set
|
1
projects/NXP/devices/iMX8/bootloader/config
Normal file
1
projects/NXP/devices/iMX8/bootloader/config
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_EFI_LOADER is not set
|
@ -1,124 +0,0 @@
|
||||
diff --git a/plat/imx/imx8m/ddr/dram.c b/plat/imx/imx8m/ddr/dram.c
|
||||
index b5f697334e91..6adbdbf92eff 100644
|
||||
--- a/plat/imx/imx8m/ddr/dram.c
|
||||
+++ b/plat/imx/imx8m/ddr/dram.c
|
||||
@@ -21,11 +21,6 @@ struct dram_info dram_info;
|
||||
/* lock used for DDR DVFS */
|
||||
spinlock_t dfs_lock;
|
||||
|
||||
-#if defined(PLAT_imx8mq)
|
||||
-/* ocram used to dram timing */
|
||||
-static uint8_t dram_timing_saved[13 * 1024] __aligned(8);
|
||||
-#endif
|
||||
-
|
||||
static volatile uint32_t wfe_done;
|
||||
static volatile bool wait_ddrc_hwffc_done = true;
|
||||
static unsigned int dev_fsp = 0x1;
|
||||
@@ -36,31 +31,6 @@ static uint32_t fsp_init_reg[3][4] = {
|
||||
{ DDRC_FREQ2_INIT3(0), DDRC_FREQ2_INIT4(0), DDRC_FREQ2_INIT6(0), DDRC_FREQ2_INIT7(0) },
|
||||
};
|
||||
|
||||
-#if defined(PLAT_imx8mq)
|
||||
-static inline struct dram_cfg_param *get_cfg_ptr(void *ptr,
|
||||
- void *old_base, void *new_base)
|
||||
-{
|
||||
- uintptr_t offset = (uintptr_t)ptr & ~((uintptr_t)old_base);
|
||||
-
|
||||
- return (struct dram_cfg_param *)(offset + new_base);
|
||||
-}
|
||||
-
|
||||
-/* copy the dram timing info from DRAM to OCRAM */
|
||||
-void imx8mq_dram_timing_copy(struct dram_timing_info *from)
|
||||
-{
|
||||
- struct dram_timing_info *info = (struct dram_timing_info *)dram_timing_saved;
|
||||
-
|
||||
- /* copy the whole 13KB content used for dram timing info */
|
||||
- memcpy(dram_timing_saved, from, sizeof(dram_timing_saved));
|
||||
-
|
||||
- /* correct the header after copied into ocram */
|
||||
- info->ddrc_cfg = get_cfg_ptr(info->ddrc_cfg, from, dram_timing_saved);
|
||||
- info->ddrphy_cfg = get_cfg_ptr(info->ddrphy_cfg, from, dram_timing_saved);
|
||||
- info->ddrphy_trained_csr = get_cfg_ptr(info->ddrphy_trained_csr, from, dram_timing_saved);
|
||||
- info->ddrphy_pie = get_cfg_ptr(info->ddrphy_pie, from, dram_timing_saved);
|
||||
-}
|
||||
-#endif
|
||||
-
|
||||
#if defined(PLAT_imx8mp)
|
||||
static uint32_t lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr)
|
||||
{
|
||||
@@ -231,10 +201,6 @@ void dram_info_init(unsigned long dram_timing_base)
|
||||
dram_info.boot_fsp = current_fsp;
|
||||
dram_info.current_fsp = current_fsp;
|
||||
|
||||
-#if defined(PLAT_imx8mq)
|
||||
- imx8mq_dram_timing_copy((struct dram_timing_info *)dram_timing_base);
|
||||
- dram_timing_base = (unsigned long) dram_timing_saved;
|
||||
-#endif
|
||||
get_mr_values(dram_info.mr_table);
|
||||
|
||||
dram_info.timing_info = (struct dram_timing_info *)dram_timing_base;
|
||||
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
|
||||
index 7065a658614f..3c66baa291d6 100644
|
||||
--- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
|
||||
+++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
|
||||
@@ -21,7 +21,6 @@
|
||||
#include <lib/xlat_tables/xlat_tables_v2.h>
|
||||
#include <plat/common/platform.h>
|
||||
|
||||
-#include <dram.h>
|
||||
#include <gpc.h>
|
||||
#include <imx_aipstz.h>
|
||||
#include <imx_uart.h>
|
||||
@@ -49,8 +48,6 @@ static const mmap_region_t imx_mmap[] = {
|
||||
MAP_REGION_FLAT(IMX_ROM_BASE, IMX_ROM_SIZE, MT_MEMORY | MT_RO), /* ROM map */
|
||||
MAP_REGION_FLAT(IMX_AIPS_BASE, IMX_AIPS_SIZE, MT_DEVICE | MT_RW), /* AIPS map */
|
||||
MAP_REGION_FLAT(IMX_GIC_BASE, IMX_GIC_SIZE, MT_DEVICE | MT_RW), /* GIC map */
|
||||
- MAP_REGION_FLAT(IMX_DDRPHY_BASE, IMX_DDR_IPS_SIZE, MT_DEVICE | MT_RW), /* DDRMIX map */
|
||||
- MAP_REGION_FLAT(IMX_DRAM_BASE, IMX_DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS),
|
||||
{0},
|
||||
};
|
||||
|
||||
@@ -229,8 +226,6 @@ void bl31_platform_setup(void)
|
||||
|
||||
/* gpc init */
|
||||
imx_gpc_init();
|
||||
-
|
||||
- dram_info_init(SAVED_DRAM_TIMING_BASE);
|
||||
}
|
||||
|
||||
entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)
|
||||
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_psci.c b/plat/imx/imx8m/imx8mq/imx8mq_psci.c
|
||||
index 3375ce71bc95..e5c54261a5f9 100644
|
||||
--- a/plat/imx/imx8m/imx8mq/imx8mq_psci.c
|
||||
+++ b/plat/imx/imx8m/imx8mq/imx8mq_psci.c
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
- * Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved.
|
||||
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
@@ -13,7 +13,6 @@
|
||||
#include <lib/mmio.h>
|
||||
#include <lib/psci/psci.h>
|
||||
|
||||
-#include <dram.h>
|
||||
#include <gpc.h>
|
||||
#include <imx8m_psci.h>
|
||||
#include <plat_imx8.h>
|
||||
@@ -80,7 +79,6 @@ void imx_domain_suspend(const psci_power_state_t *target_state)
|
||||
|
||||
if (is_local_state_retn(SYSTEM_PWR_STATE(target_state))) {
|
||||
imx_set_sys_lpm(core_id, true);
|
||||
- dram_enter_retention();
|
||||
imx_anamix_override(true);
|
||||
}
|
||||
}
|
||||
@@ -93,7 +91,6 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state)
|
||||
/* check the system level status */
|
||||
if (is_local_state_retn(SYSTEM_PWR_STATE(target_state))) {
|
||||
imx_anamix_override(false);
|
||||
- dram_exit_retention();
|
||||
imx_set_sys_lpm(core_id, false);
|
||||
imx_clear_rbc_count();
|
||||
}
|
1
projects/Qualcomm/devices/Dragonboard/bootloader/config
Normal file
1
projects/Qualcomm/devices/Dragonboard/bootloader/config
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_EFI_LOADER is not set
|
@ -12,6 +12,7 @@ This is a SoC device for RK3399
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=rock960 make image`
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=rock-pi-4 make image`
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=rock-pi-4-plus make image`
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=rock-4c-plus make image`
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=rock-pi-n10 make image`
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=rockpro64 make image`
|
||||
* `PROJECT=Rockchip DEVICE=RK3399 ARCH=aarch64 UBOOT_SYSTEM=roc-pc make image`
|
||||
|
@ -1,13 +0,0 @@
|
||||
diff --git a/plat/rockchip/rk3399/rk3399_def.h b/plat/rockchip/rk3399/rk3399_def.h
|
||||
index ba83242ebe..8d6ecfbe66 100644
|
||||
--- a/plat/rockchip/rk3399/rk3399_def.h
|
||||
+++ b/plat/rockchip/rk3399/rk3399_def.h
|
||||
@@ -17,7 +17,7 @@
|
||||
/**************************************************************************
|
||||
* UART related constants
|
||||
**************************************************************************/
|
||||
-#define RK3399_BAUDRATE 115200
|
||||
+#define RK3399_BAUDRATE 1500000
|
||||
#define RK3399_UART_CLOCK 24000000
|
||||
|
||||
/******************************************************************************
|
@ -1,102 +0,0 @@
|
||||
From 5708e8eeae53ad8ce605afdf61e5a83162dc5131 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 7 Jan 2024 18:18:33 +0000
|
||||
Subject: [PATCH] rockchip: rk3328: Set efuse auto mode and timing control
|
||||
|
||||
Reading from efuse return zero when mainline TF-A is used.
|
||||
|
||||
=> dump_efuse
|
||||
00000000: 00 00 00 00 ....
|
||||
00000004: 00 00 00 00 ....
|
||||
00000008: 00 00 00 00 ....
|
||||
0000000c: 00 00 00 00 ....
|
||||
00000010: 00 00 00 00 ....
|
||||
00000014: 00 00 00 00 ....
|
||||
00000018: 00 00 00 00 ....
|
||||
0000001c: 00 00 00 00 ....
|
||||
|
||||
However, when vendor TF-A blobs is used reading from efuse works.
|
||||
|
||||
Change to use auto mode, enable finish and auto access err interrupts
|
||||
and set timing control using same values that vendor TF-A blob use to
|
||||
fix this.
|
||||
|
||||
With this efuse can be read when either of mainline TF-A or vendor blob
|
||||
is used.
|
||||
|
||||
=> dump_efuse
|
||||
00000000: 52 4b 33 82 RK3.
|
||||
00000004: 00 fe 21 55 ..!U
|
||||
00000008: 52 4b 57 34 RKW4
|
||||
0000000c: 35 30 32 39 5029
|
||||
00000010: 00 00 00 00 ....
|
||||
00000014: 08 25 0c 0f .%..
|
||||
00000018: 02 0d 08 00 ....
|
||||
0000001c: 00 00 f0 00 ....
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
|
||||
---
|
||||
arch/arm/mach-rockchip/rk3328/rk3328.c | 38 ++++++++++++++++++++++++++
|
||||
1 file changed, 38 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
|
||||
index de17b886827..ca623c0d3d0 100644
|
||||
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
|
||||
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
|
||||
@@ -19,6 +19,23 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
#define GRF_BASE 0xFF100000
|
||||
#define UART2_BASE 0xFF130000
|
||||
#define FW_DDR_CON_REG 0xFF7C0040
|
||||
+#define EFUSE_NS_BASE 0xFF260000
|
||||
+
|
||||
+#define EFUSE_MOD 0x0000
|
||||
+#define EFUSE_INT_CON 0x0014
|
||||
+#define EFUSE_T_CSB_P 0x0028
|
||||
+#define EFUSE_T_PGENB_P 0x002C
|
||||
+#define EFUSE_T_LOAD_P 0x0030
|
||||
+#define EFUSE_T_ADDR_P 0x0034
|
||||
+#define EFUSE_T_STROBE_P 0x0038
|
||||
+#define EFUSE_T_CSB_R 0x003C
|
||||
+#define EFUSE_T_PGENB_R 0x0040
|
||||
+#define EFUSE_T_LOAD_R 0x0044
|
||||
+#define EFUSE_T_ADDR_R 0x0048
|
||||
+#define EFUSE_T_STROBE_R 0x004C
|
||||
+
|
||||
+#define EFUSE_USER_MODE 0x1
|
||||
+#define EFUSE_TIMING(s, l) (((s) << 16) | (l))
|
||||
|
||||
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
|
||||
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
|
||||
@@ -50,10 +67,31 @@ struct mm_region *mem_map = rk3328_mem_map;
|
||||
int arch_cpu_init(void)
|
||||
{
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
+ u32 reg;
|
||||
+
|
||||
/* We do some SoC one time setting here. */
|
||||
|
||||
/* Disable the ddr secure region setting to make it non-secure */
|
||||
rk_setreg(FW_DDR_CON_REG, 0x200);
|
||||
+
|
||||
+ /* Use efuse auto mode */
|
||||
+ reg = readl(EFUSE_NS_BASE + EFUSE_MOD);
|
||||
+ writel(reg & ~EFUSE_USER_MODE, EFUSE_NS_BASE + EFUSE_MOD);
|
||||
+
|
||||
+ /* Enable efuse finish and auto access err interrupt */
|
||||
+ writel(0x07, EFUSE_NS_BASE + EFUSE_INT_CON);
|
||||
+
|
||||
+ /* Set efuse timing control */
|
||||
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_CSB_P);
|
||||
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_PGENB_P);
|
||||
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_LOAD_P);
|
||||
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_ADDR_P);
|
||||
+ writel(EFUSE_TIMING(2, 240), EFUSE_NS_BASE + EFUSE_T_STROBE_P);
|
||||
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_CSB_R);
|
||||
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_PGENB_R);
|
||||
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_LOAD_R);
|
||||
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_ADDR_R);
|
||||
+ writel(EFUSE_TIMING(2, 3), EFUSE_NS_BASE + EFUSE_T_STROBE_R);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
@ -1,37 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Mon, 31 Oct 2022 17:16:07 +0100
|
||||
Subject: [PATCH 6/6] Rockchip: rk3399-evb: Don't initalize i2c bus in SPL
|
||||
|
||||
Since we are using this device as fallback for boards which are not supported
|
||||
by mainline u-boot in combination with vendor TPL/SPL, we need to make sure
|
||||
that i2c is initalized in BL33 because vendor bootchain doesn't do that in
|
||||
an earlier level.
|
||||
---
|
||||
arch/arm/dts/rk3399-evb-u-boot.dtsi | 10 +---------
|
||||
1 file changed, 1 insertion(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
|
||||
index 5e39b1493d..18733da7f9 100644
|
||||
--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
|
||||
@@ -9,18 +9,10 @@
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
|
||||
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
|
||||
};
|
||||
};
|
||||
|
||||
-&i2c0 {
|
||||
- bootph-all;
|
||||
-};
|
||||
-
|
||||
-&rk808 {
|
||||
- bootph-all;
|
||||
-};
|
||||
-
|
||||
&tcphy1 {
|
||||
status = "okay";
|
||||
};
|
@ -0,0 +1,26 @@
|
||||
From 2e54840fd3de7a791669bf20fc7b576b806167b8 Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Sun, 19 May 2024 18:48:57 -0400
|
||||
Subject: [PATCH] arm64: dts: rockchip: roc-3328-cc: use 1600 ddr4 timing
|
||||
|
||||
Swap the ROC-3328-CC from DDR4 666 to 1600 timing to boost performance.
|
||||
|
||||
Signed-off-by: Da Xue <da@libre.computer>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
|
||||
index 582d6ba49b4e..c47d29c59de9 100644
|
||||
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
|
||||
@@ -4,7 +4,7 @@
|
||||
*/
|
||||
|
||||
#include "rk3328-u-boot.dtsi"
|
||||
-#include "rk3328-sdram-ddr4-666.dtsi"
|
||||
+#include "rk3328-sdram-ddr4-1600.dtsi"
|
||||
|
||||
/ {
|
||||
smbios {
|
@ -0,0 +1,247 @@
|
||||
From 825863d08ce323ebcefc03af20fb1e37cdac0eaa Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Mon, 19 Sep 2022 13:40:01 -0400
|
||||
Subject: [PATCH] ram: rk3328: add ddr4-1600 sdram timing
|
||||
|
||||
Add DDR4 1600MHz SDRAM timing data from LibreComputer u-boot sources
|
||||
for the ROC-3328-CC board.
|
||||
|
||||
Signed-off-by: Da Xue <da@libre.computer>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi | 226 +++++++++++++++++++++++
|
||||
1 file changed, 226 insertions(+)
|
||||
create mode 100644 arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi
|
||||
|
||||
diff --git a/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi
|
||||
new file mode 100644
|
||||
index 000000000000..9594bb428399
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi
|
||||
@@ -0,0 +1,226 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
|
||||
+
|
||||
+&dmc {
|
||||
+ rockchip,sdram-params = <
|
||||
+ 0x1
|
||||
+ 0xA
|
||||
+ 0x2
|
||||
+ 0x1
|
||||
+ 0x0
|
||||
+ 0x0
|
||||
+ 0x11
|
||||
+ 0x0
|
||||
+ 0x11
|
||||
+ 0x0
|
||||
+ 0
|
||||
+
|
||||
+ 0x94496354
|
||||
+ 0x00000000
|
||||
+ 0x0000002a
|
||||
+ 0x000004e2
|
||||
+ 0x00000015
|
||||
+ 0x0000034a
|
||||
+ 0x000000ff
|
||||
+
|
||||
+ 800
|
||||
+ 0
|
||||
+ 1
|
||||
+ 0
|
||||
+ 0
|
||||
+
|
||||
+ 0x00000000
|
||||
+ 0x43041010
|
||||
+ 0x00000064
|
||||
+ 0x0061008c
|
||||
+ 0x000000d0
|
||||
+ 0x000200c5
|
||||
+ 0x000000d4
|
||||
+ 0x00500000
|
||||
+ 0x000000d8
|
||||
+ 0x00000100
|
||||
+ 0x000000dc
|
||||
+ 0x03140401
|
||||
+ 0x000000e0
|
||||
+ 0x00000000
|
||||
+ 0x000000e4
|
||||
+ 0x00110000
|
||||
+ 0x000000e8
|
||||
+ 0x00000420
|
||||
+ 0x000000ec
|
||||
+ 0x00000400
|
||||
+ 0x000000f4
|
||||
+ 0x000f011f
|
||||
+ 0x00000100
|
||||
+ 0x0c0e1b0e
|
||||
+ 0x00000104
|
||||
+ 0x00030314
|
||||
+ 0x00000108
|
||||
+ 0x0506050b
|
||||
+ 0x0000010c
|
||||
+ 0x0040400c
|
||||
+ 0x00000110
|
||||
+ 0x06030307
|
||||
+ 0x00000114
|
||||
+ 0x04040302
|
||||
+ 0x00000120
|
||||
+ 0x06060b06
|
||||
+ 0x00000124
|
||||
+ 0x00020308
|
||||
+ 0x00000180
|
||||
+ 0x01000040
|
||||
+ 0x00000184
|
||||
+ 0x00000000
|
||||
+ 0x00000190
|
||||
+ 0x07040003
|
||||
+ 0x00000198
|
||||
+ 0x05001100
|
||||
+ 0x000001a0
|
||||
+ 0xc0400003
|
||||
+ 0x00000240
|
||||
+ 0x0600060c
|
||||
+ 0x00000244
|
||||
+ 0x00000201
|
||||
+ 0x00000250
|
||||
+ 0x00000f00
|
||||
+ 0x00000490
|
||||
+ 0x00000001
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+
|
||||
+ 0x00000004
|
||||
+ 0x0000000c
|
||||
+ 0x00000028
|
||||
+ 0x0000000c
|
||||
+ 0x0000002c
|
||||
+ 0x00000000
|
||||
+ 0x00000030
|
||||
+ 0x00000009
|
||||
+ 0xffffffff
|
||||
+ 0xffffffff
|
||||
+
|
||||
+ 0x77
|
||||
+ 0x88
|
||||
+ 0x79
|
||||
+ 0x79
|
||||
+ 0x87
|
||||
+ 0x97
|
||||
+ 0x87
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x87
|
||||
+ 0x88
|
||||
+ 0x87
|
||||
+ 0x87
|
||||
+ 0x77
|
||||
+
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x69
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x79
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x69
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x79
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x69
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x79
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x78
|
||||
+ 0x69
|
||||
+ 0x9
|
||||
+
|
||||
+ 0x77
|
||||
+ 0x78
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x77
|
||||
+ 0x79
|
||||
+ 0x9
|
||||
+ >;
|
||||
+};
|
@ -1,3 +1,4 @@
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
CONFIG_LZ4=y
|
||||
CONFIG_LZO=y
|
||||
CONFIG_LZMA=y
|
||||
|
@ -1,43 +1,43 @@
|
||||
From 802c90563efe1c04b401ad27fd63c628eb647d8d Mon Sep 17 00:00:00 2001
|
||||
From 0fa059a03304da39883f4e8df64edfcf4b93cef9 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 30 Apr 2025 13:30:27 +0000
|
||||
Date: Wed, 30 Apr 2025 12:45:16 +0000
|
||||
Subject: [PATCH] add odroid-xu4_defconfig and tweak odroid-xu3_defconfig
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
configs/odroid-xu3_defconfig | 4 +-
|
||||
configs/odroid-xu4_defconfig | 75 ++++++++++++++++++++++++++++++++++++
|
||||
2 files changed, 77 insertions(+), 2 deletions(-)
|
||||
configs/odroid-xu4_defconfig | 74 ++++++++++++++++++++++++++++++++++++
|
||||
2 files changed, 76 insertions(+), 2 deletions(-)
|
||||
create mode 100644 configs/odroid-xu4_defconfig
|
||||
|
||||
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
|
||||
index 718ec96cfbb..086fdbe3976 100644
|
||||
index 6431f59568c..1cadf0f943f 100644
|
||||
--- a/configs/odroid-xu3_defconfig
|
||||
+++ b/configs/odroid-xu3_defconfig
|
||||
@@ -13,7 +13,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x42e00000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
@@ -14,7 +14,7 @@ CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_ENV_OFFSET=0x310000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
|
||||
CONFIG_SYS_LOAD_ADDR=0x43e00000
|
||||
-CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2"
|
||||
+CONFIG_IDENT_STRING=" for ODROID-XU3"
|
||||
CONFIG_SYS_MEM_TOP_HIDE=0x01600000
|
||||
CONFIG_SYS_LOAD_ADDR=0x43e00000
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
@@ -27,7 +27,7 @@ CONFIG_BOARD_TYPES=y
|
||||
CONFIG_FIT=y
|
||||
@@ -28,7 +28,7 @@ CONFIG_BOARD_TYPES=y
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
-CONFIG_SYS_PROMPT="ODROID-XU3 # "
|
||||
+CONFIG_SYS_PROMPT="XU3 # "
|
||||
CONFIG_SYS_PBSIZE=1024
|
||||
+CONFIG_SYS_PROMPT="XU3# "
|
||||
CONFIG_CMD_THOR_DOWNLOAD=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
diff --git a/configs/odroid-xu4_defconfig b/configs/odroid-xu4_defconfig
|
||||
new file mode 100644
|
||||
index 00000000000..029a41bb87f
|
||||
index 00000000000..1da725e9118
|
||||
--- /dev/null
|
||||
+++ b/configs/odroid-xu4_defconfig
|
||||
@@ -0,0 +1,75 @@
|
||||
@@ -0,0 +1,74 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
+CONFIG_ARCH_CPU_INIT=y
|
||||
@ -53,13 +53,14 @@ index 00000000000..029a41bb87f
|
||||
+CONFIG_ENV_SIZE=0x4000
|
||||
+CONFIG_ENV_OFFSET=0x310000
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"
|
||||
+CONFIG_SYS_LOAD_ADDR=0x43e00000
|
||||
+CONFIG_IDENT_STRING=" for ODROID-XU4"
|
||||
+CONFIG_SYS_MEM_TOP_HIDE=0x01600000
|
||||
+CONFIG_SYS_LOAD_ADDR=0x43e00000
|
||||
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
+CONFIG_FIT=y
|
||||
+CONFIG_FIT_BEST_MATCH=y
|
||||
+CONFIG_DISTRO_DEFAULTS=y
|
||||
+CONFIG_SYS_PBSIZE=1024
|
||||
+CONFIG_SILENT_CONSOLE=y
|
||||
+CONFIG_CONSOLE_MUX=y
|
||||
+CONFIG_BOARD_TYPES=y
|
||||
@ -67,8 +68,7 @@ index 00000000000..029a41bb87f
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+CONFIG_BOARD_LATE_INIT=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+CONFIG_SYS_PROMPT="XU4 # "
|
||||
+CONFIG_SYS_PBSIZE=1024
|
||||
+CONFIG_SYS_PROMPT="XU4# "
|
||||
+CONFIG_CMD_THOR_DOWNLOAD=y
|
||||
+CONFIG_CMD_DFU=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
@ -94,7 +94,6 @@ index 00000000000..029a41bb87f
|
||||
+CONFIG_SYS_I2C_S3C24X0=y
|
||||
+CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MTD=y
|
||||
+CONFIG_SMC911X=y
|
||||
+CONFIG_DM_PMIC=y
|
||||
+CONFIG_PMIC_S2MPS11=y
|
||||
|
@ -164,6 +164,10 @@ devices = \
|
||||
'dtb': '',
|
||||
'config': 'p212_defconfig'
|
||||
},
|
||||
'alta': {
|
||||
'dtb': 'meson-g12b-a311d-libretech-cc.dtb',
|
||||
'config': 'aml-a311d-cc_defconfig'
|
||||
},
|
||||
'bananapi-m2s': {
|
||||
'dtb': 'meson-g12b-a311d-bananapi-m2s.dtb',
|
||||
'config': 'bananapi-m2s_defconfig'
|
||||
@ -228,6 +232,10 @@ devices = \
|
||||
'dtb': 'meson-g12b-radxa-zero2.dtb',
|
||||
'config': 'radxa-zero2_defconfig'
|
||||
},
|
||||
'solitude': {
|
||||
'dtb': 'meson-sm1-s905d3-libretech-cc.dtb',
|
||||
'config': 'aml-s905d3-cc_defconfig'
|
||||
},
|
||||
'wetek-core2': {
|
||||
'dtb': 'meson-gxm-wetek-core2.dtb',
|
||||
'config': 'wetek-core2_defconfig'
|
||||
@ -336,6 +344,14 @@ devices = \
|
||||
'dtb': 'rk3399-rock-pi-4b-plus.dtb',
|
||||
'config': 'rock-pi-4-rk3399_defconfig'
|
||||
},
|
||||
'rock-4c-plus': {
|
||||
'dtb': 'rk3399-rock-4c-plus.dtb',
|
||||
'config': 'rock-4c-plus-rk3399_defconfig'
|
||||
},
|
||||
'rock-4se': {
|
||||
'dtb': 'rk3399-rock-4se.dtb',
|
||||
'config': 'rock-4se-rk3399_defconfig'
|
||||
},
|
||||
'rock-pi-n10': {
|
||||
'dtb': 'rk3399pro-rock-pi-n10.dtb',
|
||||
'config': 'rock-pi-n10-rk3399pro_defconfig'
|
||||
|
Loading…
x
Reference in New Issue
Block a user