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Merge pull request #8221 from jernejsk/fix-de2
[LE12] Allwinner: linux: fix drm plane rendering for older SoCs
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b512ce4b0f
@ -1,211 +0,0 @@
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From e9a6924289b7ba7ca604272cbe52756f385d26df Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Fri, 20 Dec 2019 08:12:43 +0000
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Subject: [PATCH 12/23] WIP: drm/bridge: dw-hdmi: limit mode and bus format to
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max_tmds_clock
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---
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drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 113 ++++++++++++++--------
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1 file changed, 73 insertions(+), 40 deletions(-)
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diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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index da2641a65e75..9c8c17827956 100644
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--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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@@ -1989,6 +1989,21 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi,
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HDMI_FC_PACKET_TX_EN_DRM_MASK, HDMI_FC_PACKET_TX_EN);
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}
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+static unsigned int
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+hdmi_get_tmdsclock(unsigned int bus_format, unsigned int pixelclock)
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+{
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+ int color_depth = hdmi_bus_fmt_color_depth(bus_format);
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+ unsigned int tmdsclock = pixelclock;
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+
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+ if (!hdmi_bus_fmt_is_yuv422(bus_format) && color_depth > 8)
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+ tmdsclock = (u64)pixelclock * color_depth / 8;
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+
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+ if (hdmi_bus_fmt_is_yuv420(bus_format))
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+ tmdsclock /= 2;
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+
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+ return tmdsclock;
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+}
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+
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static void hdmi_av_composer(struct dw_hdmi *hdmi,
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const struct drm_display_info *display,
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const struct drm_display_mode *mode)
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@@ -2000,29 +2015,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
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unsigned int vdisplay, hdisplay;
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vmode->mpixelclock = mode->clock * 1000;
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+ vmode->mtmdsclock =
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+ hdmi_get_tmdsclock(hdmi->hdmi_data.enc_out_bus_format,
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+ vmode->mpixelclock);
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dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);
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-
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- vmode->mtmdsclock = vmode->mpixelclock;
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-
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- if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
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- switch (hdmi_bus_fmt_color_depth(
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- hdmi->hdmi_data.enc_out_bus_format)) {
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- case 16:
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- vmode->mtmdsclock = vmode->mpixelclock * 2;
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- break;
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- case 12:
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- vmode->mtmdsclock = vmode->mpixelclock * 3 / 2;
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- break;
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- case 10:
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- vmode->mtmdsclock = vmode->mpixelclock * 5 / 4;
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- break;
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- }
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- }
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-
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- if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
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- vmode->mtmdsclock /= 2;
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-
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dev_dbg(hdmi->dev, "final tmdsclock = %d\n", vmode->mtmdsclock);
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/* Set up HDMI_FC_INVIDCONF */
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@@ -2646,8 +2643,21 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
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* - MEDIA_BUS_FMT_RGB888_1X24,
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*/
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-/* Can return a maximum of 11 possible output formats for a mode/connector */
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-#define MAX_OUTPUT_SEL_FORMATS 11
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+/* Can return a maximum of 15 possible output formats for a mode/connector */
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+#define MAX_OUTPUT_SEL_FORMATS 15
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+
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+static bool is_tmds_allowed(struct drm_display_info *info,
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+ struct drm_display_mode *mode,
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+ u32 bus_format)
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+{
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+ unsigned long tmdsclock = hdmi_get_tmdsclock(bus_format, mode->clock);
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+ int max_tmds_clock = info->max_tmds_clock ? info->max_tmds_clock : 340000;
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+
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+ if (max_tmds_clock >= tmdsclock)
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+ return true;
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+
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+ return false;
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+}
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static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
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struct drm_bridge_state *bridge_state,
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@@ -2690,19 +2700,23 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
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/* Order bus formats from 16bit to 8bit if supported */
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if (max_bpc >= 16 && info->bpc == 16 &&
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- (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_48))
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+ (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_48) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYYVYY16_0_5X48))
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output_fmts[i++] = MEDIA_BUS_FMT_UYYVYY16_0_5X48;
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if (max_bpc >= 12 && info->bpc >= 12 &&
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- (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36))
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+ (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYYVYY12_0_5X36))
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output_fmts[i++] = MEDIA_BUS_FMT_UYYVYY12_0_5X36;
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if (max_bpc >= 10 && info->bpc >= 10 &&
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- (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30))
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+ (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYYVYY10_0_5X30))
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output_fmts[i++] = MEDIA_BUS_FMT_UYYVYY10_0_5X30;
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/* Default 8bit fallback */
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- output_fmts[i++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24;
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+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYYVYY8_0_5X24))
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+ output_fmts[i++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24;
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if (drm_mode_is_420_only(info, mode)) {
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*num_output_fmts = i;
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@@ -2715,42 +2729,52 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
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* if supported. In any case the default RGB888 format is added
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*/
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- /* Default 8bit RGB fallback */
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- output_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
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-
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if (max_bpc >= 16 && info->bpc == 16) {
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV16_1X48))
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output_fmts[i++] = MEDIA_BUS_FMT_YUV16_1X48;
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- output_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
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+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB161616_1X48))
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+ output_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
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}
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if (max_bpc >= 12 && info->bpc >= 12) {
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY12_1X24))
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output_fmts[i++] = MEDIA_BUS_FMT_UYVY12_1X24;
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV12_1X36))
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output_fmts[i++] = MEDIA_BUS_FMT_YUV12_1X36;
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- output_fmts[i++] = MEDIA_BUS_FMT_RGB121212_1X36;
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+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB121212_1X36))
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+ output_fmts[i++] = MEDIA_BUS_FMT_RGB121212_1X36;
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}
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if (max_bpc >= 10 && info->bpc >= 10) {
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY10_1X20))
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output_fmts[i++] = MEDIA_BUS_FMT_UYVY10_1X20;
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV10_1X30))
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output_fmts[i++] = MEDIA_BUS_FMT_YUV10_1X30;
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- output_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
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+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB101010_1X30))
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+ output_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
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}
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY8_1X16))
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output_fmts[i++] = MEDIA_BUS_FMT_UYVY8_1X16;
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- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
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+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
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+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV8_1X24))
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output_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
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+ /* Default 8bit RGB fallback */
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+ output_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
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+
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*num_output_fmts = i;
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return output_fmts;
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@@ -2930,11 +2954,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
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struct dw_hdmi *hdmi = bridge->driver_private;
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const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
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enum drm_mode_status mode_status = MODE_OK;
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+ int max_tmds_clock = info->max_tmds_clock ? info->max_tmds_clock : 340000;
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+ int clock = mode->clock;
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/* We don't support double-clocked modes */
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if (mode->flags & DRM_MODE_FLAG_DBLCLK)
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return MODE_BAD;
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+ if (pdata->ycbcr_420_allowed && drm_mode_is_420(info, mode) &&
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+ (info->color_formats & DRM_COLOR_FORMAT_YCBCR420))
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+ clock /= 2;
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+
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+ if (clock > max_tmds_clock)
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+ return MODE_CLOCK_HIGH;
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+
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if (pdata->mode_valid)
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mode_status = pdata->mode_valid(hdmi, pdata->priv_data, info,
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mode);
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--
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2.42.0
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@ -1,7 +1,7 @@
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From 75f9a78d91a37c0eadf952e97e93d3f51bfda1b6 Mon Sep 17 00:00:00 2001
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From 98b6e69f14c6c670a4156d92860500f5adfb530f Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@gmail.com>
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Date: Sun, 8 Oct 2023 13:01:01 +0200
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Subject: [PATCH 19/23] drm/sun4i: de3: Implement AFBC support
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Subject: [PATCH] drm/sun4i: de3: Implement AFBC support
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Buffers, compressed with AFBC, are generally more efficient for memory
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transfers. Add support for them.
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@ -15,8 +15,8 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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drivers/gpu/drm/sun4i/Makefile | 2 +-
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drivers/gpu/drm/sun4i/sun50i_afbc.c | 240 +++++++++++++++++++++++++
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drivers/gpu/drm/sun4i/sun50i_afbc.h | 87 +++++++++
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drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 81 +++++++--
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4 files changed, 397 insertions(+), 13 deletions(-)
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drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 84 +++++++--
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4 files changed, 400 insertions(+), 13 deletions(-)
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create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.c
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create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.h
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@ -373,7 +373,7 @@ index 000000000000..cea685c86855
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+
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+#endif
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diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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index 329e8bf8cd20..28a2c44843e6 100644
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index 329e8bf8cd20..bda91c3e2bb7 100644
|
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--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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@@ -11,8 +11,10 @@
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@ -430,15 +430,16 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
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static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,
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struct drm_atomic_state *state)
|
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{
|
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@@ -399,6 +410,7 @@ static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane,
|
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@@ -399,6 +410,8 @@ static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane,
|
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|
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sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0,
|
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old_zpos);
|
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+ sun50i_afbc_disable(mixer, layer->channel);
|
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+ if (mixer->cfg->is_de3)
|
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+ sun50i_afbc_disable(mixer, layer->channel);
|
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}
|
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|
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static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
|
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@@ -411,26 +423,51 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
|
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@@ -411,26 +424,53 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
|
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struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
|
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unsigned int zpos = new_state->normalized_zpos;
|
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unsigned int old_zpos = old_state->normalized_zpos;
|
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@ -449,7 +450,8 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
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if (!new_state->visible) {
|
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sun8i_vi_layer_enable(mixer, layer->channel,
|
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layer->overlay, false, 0, old_zpos);
|
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+ sun50i_afbc_disable(mixer, layer->channel);
|
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+ if (mixer->cfg->is_de3)
|
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+ sun50i_afbc_disable(mixer, layer->channel);
|
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return;
|
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}
|
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|
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@ -465,7 +467,8 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
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+ plane->state->color_encoding,
|
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+ plane->state->color_range);
|
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+ } else {
|
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+ sun50i_afbc_disable(mixer, layer->channel);
|
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+ if (mixer->cfg->is_de3)
|
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+ sun50i_afbc_disable(mixer, layer->channel);
|
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+ sun8i_vi_layer_update_alpha(mixer, layer->channel,
|
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+ layer->overlay, plane);
|
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+ sun8i_vi_layer_update_formats(mixer, layer->channel,
|
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@ -497,7 +500,7 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
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static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = {
|
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.atomic_check = sun8i_vi_layer_atomic_check,
|
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.atomic_disable = sun8i_vi_layer_atomic_disable,
|
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@@ -444,6 +481,7 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = {
|
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@@ -444,6 +484,7 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = {
|
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.disable_plane = drm_atomic_helper_disable_plane,
|
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.reset = drm_atomic_helper_plane_reset,
|
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.update_plane = drm_atomic_helper_update_plane,
|
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@ -505,7 +508,7 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
||||
};
|
||||
|
||||
/*
|
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@@ -527,6 +565,11 @@ static const u32 sun8i_vi_layer_de3_formats[] = {
|
||||
@@ -527,6 +568,11 @@ static const u32 sun8i_vi_layer_de3_formats[] = {
|
||||
DRM_FORMAT_YVU411,
|
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DRM_FORMAT_YVU420,
|
||||
DRM_FORMAT_YVU422,
|
||||
@ -517,7 +520,7 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
||||
};
|
||||
|
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static const uint64_t sun8i_layer_modifiers[] = {
|
||||
@@ -534,6 +577,18 @@ static const uint64_t sun8i_layer_modifiers[] = {
|
||||
@@ -534,6 +580,18 @@ static const uint64_t sun8i_layer_modifiers[] = {
|
||||
DRM_FORMAT_MOD_INVALID
|
||||
};
|
||||
|
||||
@ -536,7 +539,7 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
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struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||||
struct sun8i_mixer *mixer,
|
||||
int index)
|
||||
@@ -542,6 +597,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||||
@@ -542,6 +600,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
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u32 supported_encodings, supported_ranges;
|
||||
unsigned int plane_cnt, format_count;
|
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struct sun8i_vi_layer *layer;
|
||||
@ -544,7 +547,7 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
||||
const u32 *formats;
|
||||
int ret;
|
||||
|
||||
@@ -556,9 +612,11 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||||
@@ -556,9 +615,11 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||||
if (mixer->cfg->is_de3) {
|
||||
formats = sun8i_vi_layer_de3_formats;
|
||||
format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats);
|
||||
@ -556,7 +559,7 @@ index 329e8bf8cd20..28a2c44843e6 100644
|
||||
}
|
||||
|
||||
if (!mixer->cfg->ui_num && index == 0)
|
||||
@@ -568,8 +626,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||||
@@ -568,8 +629,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||||
ret = drm_universal_plane_init(drm, &layer->plane, 0,
|
||||
&sun8i_vi_layer_funcs,
|
||||
formats, format_count,
|
||||
|
||||
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Reference in New Issue
Block a user